code stringlengths 35 6.69k | score float64 6.5 11.5 |
|---|---|
module Add_rca_4_6 (
sum,
c_out,
a,
b,
c_in
);
output [3:0] sum;
input [3:0] a;
input [3:0] b;
input c_in;
output c_out;
wire c_in2, c_in3, c_in4;
Add_full_24 M1 (
.sum(sum[0]),
.c_out(c_in2),
.a(a[0]),
.b(b[0]),
.c_in(c_in)
);
Add_full_23 M2 (
... | 6.857422 |
module Add_full_20 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_40 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_39 M2 (
.sum(sum),
.c_o... | 7.06258 |
module Add_full_19 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_38 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_37 M2 (
.sum(sum),
.c_o... | 7.326513 |
module Add_full_18 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_36 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_35 M2 (
.sum(sum),
.c_o... | 6.931267 |
module Add_full_17 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_34 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_33 M2 (
.sum(sum),
.c_o... | 7.298444 |
module Add_rca_4_5 (
sum,
c_out,
a,
b,
c_in
);
output [3:0] sum;
input [3:0] a;
input [3:0] b;
input c_in;
output c_out;
wire c_in2, c_in3, c_in4;
Add_full_20 M1 (
.sum(sum[0]),
.c_out(c_in2),
.a(a[0]),
.b(b[0]),
.c_in(c_in)
);
Add_full_19 M2 (
... | 6.829083 |
module Add_full_16 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_32 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_31 M2 (
.sum(sum),
.c_o... | 7.262265 |
module Add_full_15 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_30 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_29 M2 (
.sum(sum),
.c_o... | 6.973073 |
module Add_full_14 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_28 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_27 M2 (
.sum(sum),
.c_o... | 7.326838 |
module Add_full_13 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_26 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_25 M2 (
.sum(sum),
.c_o... | 6.86246 |
module Add_rca_4_4 (
sum,
c_out,
a,
b,
c_in
);
output [3:0] sum;
input [3:0] a;
input [3:0] b;
input c_in;
output c_out;
wire c_in2, c_in3, c_in4;
Add_full_16 M1 (
.sum(sum[0]),
.c_out(c_in2),
.a(a[0]),
.b(b[0]),
.c_in(c_in)
);
Add_full_15 M2 (
... | 7.250321 |
module Add_full_12 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_24 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_23 M2 (
.sum(sum),
.c_o... | 7.246159 |
module Add_full_11 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_22 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_21 M2 (
.sum(sum),
.c_o... | 6.996495 |
module Add_full_10 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_20 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_19 M2 (
.sum(sum),
.c_o... | 6.784429 |
module Add_full_9 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_18 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_17 M2 (
.sum(sum),
.c_ou... | 7.055693 |
module Add_rca_4_3 (
sum,
c_out,
a,
b,
c_in
);
output [3:0] sum;
input [3:0] a;
input [3:0] b;
input c_in;
output c_out;
wire c_in2, c_in3, c_in4;
Add_full_12 M1 (
.sum(sum[0]),
.c_out(c_in2),
.a(a[0]),
.b(b[0]),
.c_in(c_in)
);
Add_full_11 M2 (
... | 7.172254 |
module Add_full_8 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_16 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_15 M2 (
.sum(sum),
.c_ou... | 7.221736 |
module Add_full_7 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_14 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_13 M2 (
.sum(sum),
.c_ou... | 7.428688 |
module Add_full_6 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_12 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_11 M2 (
.sum(sum),
.c_ou... | 7.571522 |
module Add_full_5 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_10 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_9 M2 (
.sum(sum),
.c_out... | 7.112192 |
module Add_rca_4_2 (
sum,
c_out,
a,
b,
c_in
);
output [3:0] sum;
input [3:0] a;
input [3:0] b;
input c_in;
output c_out;
wire c_in2, c_in3, c_in4;
Add_full_8 M1 (
.sum(sum[0]),
.c_out(c_in2),
.a(a[0]),
.b(b[0]),
.c_in(c_in)
);
Add_full_7 M2 (
.s... | 6.977847 |
module Add_full_4 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_8 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_7 M2 (
.sum(sum),
.c_out(... | 7.766813 |
module Add_full_3 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_6 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_5 M2 (
.sum(sum),
.c_out(... | 7.81088 |
module Add_full_2 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_4 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_3 M2 (
.sum(sum),
.c_out(... | 7.865445 |
module Add_full_1 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_2 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_1 M2 (
.sum(sum),
.c_out(... | 7.393351 |
module Add_rca_4_1 (
sum,
c_out,
a,
b,
c_in
);
output [3:0] sum;
input [3:0] a;
input [3:0] b;
input c_in;
output c_out;
wire c_in2, c_in3, c_in4;
Add_full_4 M1 (
.sum(sum[0]),
.c_out(c_in2),
.a(a[0]),
.b(b[0]),
.c_in(c_in)
);
Add_full_3 M2 (
.s... | 7.110536 |
module Add_rca_1 (
sum,
c_out,
a,
b,
c_in
);
output [31:0] sum;
input [31:0] a;
input [31:0] b;
input c_in;
output c_out;
wire c_in4, c_in8, c_in12, c_in16, c_in20, c_in24, c_in28;
Add_rca_4_8 M1 (
.sum(sum[3:0]),
.c_out(c_in4),
.a(a[3:0]),
.b(b[3:0]),
.c... | 6.536181 |
module Add_rca64_1 (
sum,
c_out,
a,
b,
c_in
);
output [63:0] sum;
input [63:0] a;
input [63:0] b;
input c_in;
output c_out;
wire c_in32;
tri c_in;
Add_rca_2 M1 (
.sum(sum[31:0]),
.c_out(c_in32),
.a(a[31:0]),
.b(b[31:0]),
.c_in(c_in)
);
Add_rca_1 M2... | 7.356379 |
module Add_full_192 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_384 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_383 M2 (
.sum(sum),
.... | 7.699036 |
module Add_full_191 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_382 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_381 M2 (
.sum(sum),
.... | 7.655399 |
module Add_full_190 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_380 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_379 M2 (
.sum(sum),
.... | 7.934214 |
module Add_full_189 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_378 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_377 M2 (
.sum(sum),
.... | 7.783108 |
module Add_rca_4_48 (
sum,
c_out,
a,
b,
c_in
);
output [3:0] sum;
input [3:0] a;
input [3:0] b;
input c_in;
output c_out;
wire c_in2, c_in3, c_in4;
Add_full_192 M1 (
.sum(sum[0]),
.c_out(c_in2),
.a(a[0]),
.b(b[0]),
.c_in(c_in)
);
Add_full_191 M2 (
... | 7.100194 |
module Add_full_188 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_376 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_375 M2 (
.sum(sum),
.... | 7.595987 |
module Add_full_187 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_374 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_373 M2 (
.sum(sum),
.... | 7.835958 |
module Add_full_186 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_372 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_371 M2 (
.sum(sum),
.... | 7.845959 |
module Add_full_185 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_370 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_369 M2 (
.sum(sum),
.... | 7.595972 |
module Add_rca_4_47 (
sum,
c_out,
a,
b,
c_in
);
output [3:0] sum;
input [3:0] a;
input [3:0] b;
input c_in;
output c_out;
wire c_in2, c_in3, c_in4;
Add_full_188 M1 (
.sum(sum[0]),
.c_out(c_in2),
.a(a[0]),
.b(b[0]),
.c_in(c_in)
);
Add_full_187 M2 (
... | 6.733743 |
module Add_full_184 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_368 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_367 M2 (
.sum(sum),
.... | 7.858248 |
module Add_full_183 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_366 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_365 M2 (
.sum(sum),
.... | 7.547288 |
module Add_full_182 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_364 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_363 M2 (
.sum(sum),
.... | 7.352912 |
module Add_full_181 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_362 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_361 M2 (
.sum(sum),
.... | 7.200891 |
module Add_rca_4_46 (
sum,
c_out,
a,
b,
c_in
);
output [3:0] sum;
input [3:0] a;
input [3:0] b;
input c_in;
output c_out;
wire c_in2, c_in3, c_in4;
Add_full_184 M1 (
.sum(sum[0]),
.c_out(c_in2),
.a(a[0]),
.b(b[0]),
.c_in(c_in)
);
Add_full_183 M2 (
... | 6.91982 |
module Add_full_180 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_360 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_359 M2 (
.sum(sum),
.... | 7.661626 |
module Add_full_179 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_358 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_357 M2 (
.sum(sum),
.... | 7.442043 |
module Add_full_178 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_356 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_355 M2 (
.sum(sum),
.... | 7.563947 |
module Add_full_177 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_354 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_353 M2 (
.sum(sum),
.... | 7.548047 |
module Add_rca_4_45 (
sum,
c_out,
a,
b,
c_in
);
output [3:0] sum;
input [3:0] a;
input [3:0] b;
input c_in;
output c_out;
wire c_in2, c_in3, c_in4;
Add_full_180 M1 (
.sum(sum[0]),
.c_out(c_in2),
.a(a[0]),
.b(b[0]),
.c_in(c_in)
);
Add_full_179 M2 (
... | 6.919713 |
module Add_full_176 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_352 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_351 M2 (
.sum(sum),
.... | 7.575032 |
module Add_full_175 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_350 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_349 M2 (
.sum(sum),
.... | 7.559948 |
module Add_full_174 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_348 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_347 M2 (
.sum(sum),
.... | 8.061177 |
module Add_full_173 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_346 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_345 M2 (
.sum(sum),
.... | 7.50908 |
module Add_rca_4_44 (
sum,
c_out,
a,
b,
c_in
);
output [3:0] sum;
input [3:0] a;
input [3:0] b;
input c_in;
output c_out;
wire c_in2, c_in3, c_in4;
Add_full_176 M1 (
.sum(sum[0]),
.c_out(c_in2),
.a(a[0]),
.b(b[0]),
.c_in(c_in)
);
Add_full_175 M2 (
... | 7.173014 |
module Add_full_172 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_344 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_343 M2 (
.sum(sum),
.... | 7.496899 |
module Add_full_171 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_342 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_341 M2 (
.sum(sum),
.... | 7.48979 |
module Add_full_170 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_340 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_339 M2 (
.sum(sum),
.... | 7.431352 |
module Add_full_169 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_338 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_337 M2 (
.sum(sum),
.... | 7.481078 |
module Add_rca_4_43 (
sum,
c_out,
a,
b,
c_in
);
output [3:0] sum;
input [3:0] a;
input [3:0] b;
input c_in;
output c_out;
wire c_in2, c_in3, c_in4;
Add_full_172 M1 (
.sum(sum[0]),
.c_out(c_in2),
.a(a[0]),
.b(b[0]),
.c_in(c_in)
);
Add_full_171 M2 (
... | 7.058253 |
module Add_full_168 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_336 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_335 M2 (
.sum(sum),
.... | 7.572476 |
module Add_full_167 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_334 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_333 M2 (
.sum(sum),
.... | 7.899759 |
module Add_full_166 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_332 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_331 M2 (
.sum(sum),
.... | 7.459843 |
module Add_full_165 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_330 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_329 M2 (
.sum(sum),
.... | 7.728889 |
module Add_rca_4_42 (
sum,
c_out,
a,
b,
c_in
);
output [3:0] sum;
input [3:0] a;
input [3:0] b;
input c_in;
output c_out;
wire c_in2, c_in3, c_in4;
Add_full_168 M1 (
.sum(sum[0]),
.c_out(c_in2),
.a(a[0]),
.b(b[0]),
.c_in(c_in)
);
Add_full_167 M2 (
... | 6.992077 |
module Add_full_164 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_328 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_327 M2 (
.sum(sum),
.... | 7.838165 |
module Add_full_163 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_326 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_325 M2 (
.sum(sum),
.... | 7.209208 |
module Add_full_162 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_324 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_323 M2 (
.sum(sum),
.... | 7.536228 |
module Add_full_161 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_322 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_321 M2 (
.sum(sum),
.... | 7.422227 |
module Add_rca_4_41 (
sum,
c_out,
a,
b,
c_in
);
output [3:0] sum;
input [3:0] a;
input [3:0] b;
input c_in;
output c_out;
wire c_in2, c_in3, c_in4;
Add_full_164 M1 (
.sum(sum[0]),
.c_out(c_in2),
.a(a[0]),
.b(b[0]),
.c_in(c_in)
);
Add_full_163 M2 (
... | 7.178472 |
module Add_full_160 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_320 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_319 M2 (
.sum(sum),
.... | 7.763915 |
module Add_full_159 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_318 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_317 M2 (
.sum(sum),
.... | 7.313746 |
module Add_full_158 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_316 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_315 M2 (
.sum(sum),
.... | 7.702666 |
module Add_full_157 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_314 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_313 M2 (
.sum(sum),
.... | 7.667532 |
module Add_rca_4_40 (
sum,
c_out,
a,
b,
c_in
);
output [3:0] sum;
input [3:0] a;
input [3:0] b;
input c_in;
output c_out;
wire c_in2, c_in3, c_in4;
Add_full_160 M1 (
.sum(sum[0]),
.c_out(c_in2),
.a(a[0]),
.b(b[0]),
.c_in(c_in)
);
Add_full_159 M2 (
... | 6.89495 |
module Add_full_156 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_312 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_311 M2 (
.sum(sum),
.... | 7.859966 |
module Add_full_155 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_310 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_309 M2 (
.sum(sum),
.... | 7.898728 |
module Add_full_154 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_308 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_307 M2 (
.sum(sum),
.... | 7.609777 |
module Add_full_153 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_306 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_305 M2 (
.sum(sum),
.... | 7.26956 |
module Add_rca_4_39 (
sum,
c_out,
a,
b,
c_in
);
output [3:0] sum;
input [3:0] a;
input [3:0] b;
input c_in;
output c_out;
wire c_in2, c_in3, c_in4;
Add_full_156 M1 (
.sum(sum[0]),
.c_out(c_in2),
.a(a[0]),
.b(b[0]),
.c_in(c_in)
);
Add_full_155 M2 (
... | 6.972907 |
module Add_full_152 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_304 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_303 M2 (
.sum(sum),
.... | 7.929491 |
module Add_full_151 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_302 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_301 M2 (
.sum(sum),
.... | 7.384741 |
module Add_full_150 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_300 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_299 M2 (
.sum(sum),
.... | 7.350708 |
module Add_full_149 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_298 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_297 M2 (
.sum(sum),
.... | 7.475361 |
module Add_rca_4_38 (
sum,
c_out,
a,
b,
c_in
);
output [3:0] sum;
input [3:0] a;
input [3:0] b;
input c_in;
output c_out;
wire c_in2, c_in3, c_in4;
Add_full_152 M1 (
.sum(sum[0]),
.c_out(c_in2),
.a(a[0]),
.b(b[0]),
.c_in(c_in)
);
Add_full_151 M2 (
... | 6.743521 |
module Add_full_148 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_296 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_295 M2 (
.sum(sum),
.... | 7.937416 |
module Add_full_147 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_294 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_293 M2 (
.sum(sum),
.... | 7.541129 |
module Add_full_146 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_292 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_291 M2 (
.sum(sum),
.... | 7.424887 |
module Add_full_145 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_290 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_289 M2 (
.sum(sum),
.... | 7.521083 |
module Add_rca_4_37 (
sum,
c_out,
a,
b,
c_in
);
output [3:0] sum;
input [3:0] a;
input [3:0] b;
input c_in;
output c_out;
wire c_in2, c_in3, c_in4;
Add_full_148 M1 (
.sum(sum[0]),
.c_out(c_in2),
.a(a[0]),
.b(b[0]),
.c_in(c_in)
);
Add_full_147 M2 (
... | 7.008252 |
module Add_full_144 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_288 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_287 M2 (
.sum(sum),
.... | 8.088049 |
module Add_full_143 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_286 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_285 M2 (
.sum(sum),
.... | 7.079757 |
module Add_full_142 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_284 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_283 M2 (
.sum(sum),
.... | 7.3382 |
module Add_full_141 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_282 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_281 M2 (
.sum(sum),
.... | 7.296295 |
module Add_rca_4_36 (
sum,
c_out,
a,
b,
c_in
);
output [3:0] sum;
input [3:0] a;
input [3:0] b;
input c_in;
output c_out;
wire c_in2, c_in3, c_in4;
Add_full_144 M1 (
.sum(sum[0]),
.c_out(c_in2),
.a(a[0]),
.b(b[0]),
.c_in(c_in)
);
Add_full_143 M2 (
... | 7.262355 |
module Add_full_140 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_280 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_279 M2 (
.sum(sum),
.... | 7.429093 |
module Add_full_139 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_278 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_277 M2 (
.sum(sum),
.... | 7.083309 |
module Add_full_138 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_276 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_275 M2 (
.sum(sum),
.... | 7.147347 |
module Add_full_137 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_274 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_273 M2 (
.sum(sum),
.... | 7.443198 |
module Add_rca_4_35 (
sum,
c_out,
a,
b,
c_in
);
output [3:0] sum;
input [3:0] a;
input [3:0] b;
input c_in;
output c_out;
wire c_in2, c_in3, c_in4;
Add_full_140 M1 (
.sum(sum[0]),
.c_out(c_in2),
.a(a[0]),
.b(b[0]),
.c_in(c_in)
);
Add_full_139 M2 (
... | 6.899965 |
module Add_full_136 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_272 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_271 M2 (
.sum(sum),
.... | 7.472425 |
module Add_full_135 (
sum,
c_out,
a,
b,
c_in
);
input a, b, c_in;
output sum, c_out;
wire w1, w2, w3;
COR2X1 U1 (
.A(w2),
.B(w3),
.Z(c_out)
);
Add_half_270 M1 (
.sum(w1),
.c_out(w2),
.a(a),
.b(b)
);
Add_half_269 M2 (
.sum(sum),
.... | 7.378352 |
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