text stringlengths 9 39.2M | dir stringlengths 25 226 | lang stringclasses 163
values | created_date timestamp[s] | updated_date timestamp[s] | repo_name stringclasses 751
values | repo_full_name stringclasses 752
values | star int64 1.01k 183k | len_tokens int64 1 18.5M |
|---|---|---|---|---|---|---|---|---|
```c
/*
*
*/
#include <zephyr/arch/arm64/arm_mmu.h>
#include <zephyr/devicetree.h>
#include <zephyr/sys/util.h>
static const struct arm_mmu_region mmu_regions[] = {
MMU_REGION_FLAT_ENTRY("GIC",
DT_REG_ADDR_BY_IDX(DT_INST(0, arm_gic), 0),
DT_REG_SIZE_BY_IDX(DT_INST(0, arm_gic), 0),
MT_DEV... | /content/code_sandbox/soc/arm/fvp_aemv8a/mmu_regions.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 224 |
```c
/*
*
*/
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <zephyr/pm/pm.h>
#include <soc.h>
#include <soc_power.h>
#include <zephyr/arch/cpu.h>
#if DT_NODE_HAS_STATUS(DT_NODELABEL(gpio0), okay)
#define CLK_BIT_GPIO0 _BEETLE_GPIO0
#else
#define CLK_BIT_GPIO0 0
#endif
#if DT_NODE_HAS_STATUS(DT_NODELA... | /content/code_sandbox/soc/arm/beetle/power.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 768 |
```unknown
if SOC_SERIES_FVP_AEMV8A
config SYS_CLOCK_HW_CYCLES_PER_SEC
default 100000000
config NUM_IRQS
default 16384 if GIC_V3_ITS
default 128 if !GIC_V3_ITS
if SOC_FVP_BASE_REVC_2XAEMV8A
# Workaround for not being able to have commas in macro arguments
DT_CHOSEN_Z_FLASH := zephyr,flash
config FLASH_SIZE
de... | /content/code_sandbox/soc/arm/fvp_aemv8a/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 173 |
```unknown
config SOC_SERIES_FVP_AEMV8A
select ARM64
help
Enable support for ARM FVP AEMv8A AArch64 Series
config SOC_FVP_BASE_REVC_2XAEMV8A
select CPU_CORTEX_A53
``` | /content/code_sandbox/soc/arm/fvp_aemv8a/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 59 |
```unknown
config SOC_QEMU_CORTEX_A53
bool
select SOC_FAMILY_ARM64
config SOC
default "qemu_cortex_a53" if SOC_QEMU_CORTEX_A53
``` | /content/code_sandbox/soc/arm/qemu_cortex_a53/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 40 |
```unknown
if SOC_QEMU_CORTEX_A53
config NUM_IRQS
# must be >= the highest interrupt number used
# - include the UART interrupts
# - LPIs (starting at 8192) if GIC_V3_ITS is used
default 16384 if GIC_V3_ITS
default 220 if !GIC_V3_ITS
config SYS_CLOCK_HW_CYCLES_PER_SEC
default 62500000
# Workaround for not bei... | /content/code_sandbox/soc/arm/qemu_cortex_a53/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 178 |
```c
/*
* The term "Broadcom" refers to Broadcom Inc. and/or its subsidiaries.
*
*/
#include <zephyr/arch/arm64/arm_mmu.h>
#include <zephyr/devicetree.h>
#include <zephyr/sys/util.h>
static const struct arm_mmu_region mmu_regions[] = {
MMU_REGION_FLAT_ENTRY("GIC",
DT_REG_ADDR_BY_IDX(DT_INST(0, arm_gic), ... | /content/code_sandbox/soc/arm/qemu_cortex_a53/mmu_regions.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 241 |
```unknown
config SOC_QEMU_CORTEX_A53
select ARM64
select CPU_CORTEX_A53
select QEMU_TARGET
``` | /content/code_sandbox/soc/arm/qemu_cortex_a53/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 27 |
```unknown
if SOC_SERIES_FVP_AEMV8R
config SYS_CLOCK_HW_CYCLES_PER_SEC
default 100000000
config NUM_IRQS
default 128
# Workaround for not being able to have commas in macro arguments
DT_CHOSEN_Z_FLASH := zephyr,flash
config FLASH_SIZE
default $(dt_chosen_reg_size_int,$(DT_CHOSEN_Z_FLASH),0,K)
config FLASH_BASE... | /content/code_sandbox/soc/arm/fvp_aemv8r/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 163 |
```unknown
config SOC_SERIES_FVP_AEMV8R
bool
help
Enable support for ARM FVP AEMv8R AArch64 Series
config SOC_FVP_AEMV8R_AARCH64
bool
select SOC_SERIES_FVP_AEMV8R
select SOC_FAMILY_ARM64
config SOC_FVP_AEMV8R_AARCH32
bool
select SOC_SERIES_FVP_AEMV8R
select SOC_FAMILY_ARM
config SOC_FVP_AEMV8R_SIMULATE_C... | /content/code_sandbox/soc/arm/fvp_aemv8r/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 285 |
```unknown
config SOC_FVP_AEMV8R_AARCH64
select CPU_CORTEX_R82
select CPU_HAS_MPU
select GIC_SINGLE_SECURITY_STATE
select ARM64
config SOC_FVP_AEMV8R_AARCH32
select CPU_CORTEX_R52
select CPU_HAS_ARM_MPU
select CPU_HAS_MPU
select VFP_DP_D32_FP16_FMAC if !USE_SWITCH
select GIC_SINGLE_SECURITY_STATE
select PLA... | /content/code_sandbox/soc/arm/fvp_aemv8r/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 103 |
```c
/*
*/
#include <zephyr/kernel.h>
#ifdef CONFIG_SOC_FVP_AEMV8R_SIMULATE_CPU_PM
/*
* fvp can work on the mode that all core run together when it start.
* So an implementation for FVP is needed.
*/
int pm_cpu_on(unsigned long cpuid, uintptr_t entry_point)
{
return 0;
}
#endif
``` | /content/code_sandbox/soc/arm/fvp_aemv8r/aarch64/soc.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 77 |
```c
/*
*/
#include <stdint.h>
#include <zephyr/arch/arm64/cortex_r/arm_mpu.h>
#include <zephyr/linker/linker-defs.h>
#include <zephyr/sys/util.h>
static const struct arm_mpu_region mpu_regions[] = {
/* Region 0 */
MPU_REGION_ENTRY("FLASH_0",
CONFIG_FLASH_BASE_ADDRESS,
CONFIG_FLASH_BASE_ADDRESS +
KB(C... | /content/code_sandbox/soc/arm/fvp_aemv8r/aarch64/arm_mpu_regions.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 286 |
```c
/*
*
*/
#include <zephyr/kernel.h>
#include <cmsis_core.h>
#include <zephyr/sys/barrier.h>
void z_arm_platform_init(void)
{
if (IS_ENABLED(CONFIG_ICACHE)) {
if (!(__get_SCTLR() & SCTLR_I_Msk)) {
L1C_InvalidateICacheAll();
__set_SCTLR(__get_SCTLR() | SCTLR_I_Msk);
barrier_isync_fence_full();
}
}
... | /content/code_sandbox/soc/arm/fvp_aemv8r/aarch32/soc.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 172 |
```objective-c
/*
*/
#ifndef _SOC_H_
#define _SOC_H_
/* Do not let CMSIS to handle GIC and Timer */
#define __GIC_PRESENT 0
#define __TIM_PRESENT 0
#endif /* _SOC_H_ */
``` | /content/code_sandbox/soc/arm/fvp_aemv8r/aarch32/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 48 |
```c
/*
*/
#include <zephyr/sys/slist.h>
#include <zephyr/linker/linker-defs.h>
#include <zephyr/arch/arm/mpu/arm_mpu.h>
#define DEVICE_REGION_START 0x80000000UL
#define DEVICE_REGION_END 0xFFFFFFFFUL
static const struct arm_mpu_region mpu_regions[] = {
/* Region 0 zephyr vector */
MPU_REGION_ENTRY("vector",
... | /content/code_sandbox/soc/arm/fvp_aemv8r/aarch32/arm_mpu_regions.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 311 |
```unknown
config SOC_SERIES_MUSCA
bool
select SOC_FAMILY_ARM
help
ARM v2m MUSCA MCU Series
config SOC_V2M_MUSCA_B1
bool
select SOC_SERIES_MUSCA
help
ARM Cortex-M33 SMM-SSE-200 on V2M-MUSCA-B1
config SOC_V2M_MUSCA_S1
bool
select SOC_SERIES_MUSCA
help
ARM Cortex-M33 SMM-SSE-200 on V2M-MUSCA-S1
con... | /content/code_sandbox/soc/arm/musca/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 175 |
```unknown
config SYS_CLOCK_HW_CYCLES_PER_SEC
default 40000000 if SOC_V2M_MUSCA_B1
default 50000000 if SOC_V2M_MUSCA_S1
config NUM_IRQS
default 96 if SOC_SERIES_MUSCA
``` | /content/code_sandbox/soc/arm/musca/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 60 |
```unknown
config SOC_SERIES_MUSCA
select ARM
select BUILD_OUTPUT_HEX
config SOC_V2M_MUSCA_B1
select CPU_CORTEX_M33
select CPU_HAS_ARM_SAU
select CPU_HAS_ARM_MPU
select CPU_CORTEX_M_HAS_DWT
config SOC_V2M_MUSCA_S1
select CPU_CORTEX_M33
select CPU_HAS_ARM_SAU
select CPU_HAS_ARM_MPU
select CPU_CORTEX_M_HAS_D... | /content/code_sandbox/soc/arm/musca/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 113 |
```objective-c
/*
*
*/
#ifndef _SOC_H_
#define _SOC_H_
#ifndef _ASMLANGUAGE
#include "system_cmsdk_musca_s1.h"
#include <zephyr/sys/util.h>
#endif
#endif /* _SOC_H_ */
``` | /content/code_sandbox/soc/arm/musca/s1/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 51 |
```objective-c
/*
*
*/
/*
* This file is derivative of CMSIS V5.01 Device\_Template_Vendor\Vendor\Device\Include\Device.h
*/
#ifndef SYSTEM_CMSDK_MUSCA_S1_H
#define SYSTEM_CMSDK_MUSCA_S1_H
#ifdef __cplusplus
extern "C" {
#endif
/* =================================================================================... | /content/code_sandbox/soc/arm/musca/s1/system_cmsdk_musca_s1.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,059 |
```objective-c
/*
*
*/
/*
* This file is derivative of CMSIS V5.01 Device\_Template_Vendor\Vendor\Device\Include\Device.h
*/
#ifndef SYSTEM_CMSDK_MUSCA_B1_H
#define SYSTEM_CMSDK_MUSCA_B1_H
#ifdef __cplusplus
extern "C" {
#endif
/* =================================================================================... | /content/code_sandbox/soc/arm/musca/b1/system_cmsdk_musca_b1.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,063 |
```c
/*
*
*/
#include <soc.h>
#include <zephyr/linker/linker-defs.h>
/* (Secure System Control) Base Address */
#define SSE_200_SYSTEM_CTRL_S_BASE (0x50021000UL)
#define SSE_200_SYSTEM_CTRL_INITSVTOR1 (SSE_200_SYSTEM_CTRL_S_BASE + 0x114)
#define SSE_200_SYSTEM_CTRL_CPU_WAIT (SSE_200_SYSTEM_CTRL_S_BASE + 0x118)
#def... | /content/code_sandbox/soc/arm/musca/b1/soc.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 337 |
```objective-c
/*
*
*/
#ifndef _SOC_H_
#define _SOC_H_
#ifndef _ASMLANGUAGE
#include "system_cmsdk_musca_b1.h"
#include <zephyr/sys/util.h>
#endif
extern void wakeup_cpu1(void);
extern uint32_t sse_200_platform_get_cpu_id(void);
#endif /* _SOC_H_ */
``` | /content/code_sandbox/soc/arm/musca/b1/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 72 |
```unknown
if SOC_MPS2_AN385
config NUM_IRQS
default 32
endif
``` | /content/code_sandbox/soc/arm/mps2/Kconfig.defconfig.an385 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 21 |
```unknown
config SOC_SERIES_MPS2
bool
select SOC_FAMILY_ARM
help
Enable support for ARM MPS2 MCU Series
config SOC_MPS2_AN385
bool
select SOC_SERIES_MPS2
help
ARM Cortex-M3 SMM on V2M-MPS2 (Application Note AN385)
config SOC_MPS2_AN521
bool
select SOC_SERIES_MPS2
config SOC_MPS2_AN521_CPU0
bool
sel... | /content/code_sandbox/soc/arm/mps2/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 230 |
```c
/*
*
* Initial contents based on soc/soc_legacy/arm/ti_lm3s6965/soc.c which is:
*
*/
#include <zephyr/drivers/gpio/gpio_mmio32.h>
#include <soc.h>
#include <zephyr/linker/linker-defs.h>
/* Setup GPIO drivers for accessing FPGAIO registers */
#define FPGAIO_NODE(n) DT_INST(n, arm_mps2_fpgaio_gpio)
#define FP... | /content/code_sandbox/soc/arm/mps2/soc.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 549 |
```objective-c
/*
*
*/
/**
* @file SoC configuration macros for the ARM Ltd MPS2.
*
*/
#ifndef _ARM_MPS2_REGS_H_
#define _ARM_MPS2_REGS_H_
#include <zephyr/sys/util.h>
#include <zephyr/types.h>
/* Registers in the FPGA system control block */
struct mps2_fpgaio {
/* Offset: 0x000 LED connections */
volatile ... | /content/code_sandbox/soc/arm/mps2/soc_registers.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 480 |
```objective-c
/*
*
*/
#ifndef _SOC_H_
#define _SOC_H_
#include <cmsis_core_m_defaults.h>
#include <soc_registers.h>
extern void wakeup_cpu1(void);
extern uint32_t sse_200_platform_get_cpu_id(void);
#endif /* _SOC_H_ */
``` | /content/code_sandbox/soc/arm/mps2/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 57 |
```unknown
config SOC_SERIES_MPS2
select ARM
select GPIO_MMIO32 if GPIO
config SOC_MPS2_AN521
select CPU_CORTEX_M33
select CPU_HAS_ARM_MPU
config SOC_MPS2_AN385
select CPU_CORTEX_M3
select CPU_HAS_ARM_MPU
config SOC_MPS2_AN521_CPU0
select CPU_HAS_ARM_SAU
config SOC_MPS2_AN521_CPU1
select CPU_HAS_FPU
selec... | /content/code_sandbox/soc/arm/mps2/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 105 |
```unknown
if SOC_SERIES_MPS2
config SYS_CLOCK_HW_CYCLES_PER_SEC
default 25000000
rsource "Kconfig.defconfig.*"
endif # SOC_SERIES_MPS2
``` | /content/code_sandbox/soc/arm/mps2/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 44 |
```unknown
if SOC_MPS2_AN521
config NUM_IRQS
default 96
endif
``` | /content/code_sandbox/soc/arm/mps2/Kconfig.defconfig.an521 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 21 |
```unknown
#
#
config SOC_FAMILY_BCMVK
bool
config SOC_FAMILY
default "bcmvk" if SOC_FAMILY_BCMVK
rsource "*/Kconfig.soc"
``` | /content/code_sandbox/soc/brcm/bcmvk/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 37 |
```unknown
#
#
if SOC_FAMILY_BCMVK
rsource "*/Kconfig.defconfig"
endif # SOC_FAMILY_BCMVK
``` | /content/code_sandbox/soc/brcm/bcmvk/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 27 |
```yaml
family:
- name: bcmvk
series:
- name: valkyrie
socs:
- name: bcm58400
- name: viper
socs:
- name: bcm58402
cpuclusters:
- name: m7
- name: a72
``` | /content/code_sandbox/soc/brcm/bcmvk/soc.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 69 |
```unknown
#
#
if SOC_FAMILY_BCMVK
rsource "*/Kconfig"
endif
``` | /content/code_sandbox/soc/brcm/bcmvk/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 19 |
```unknown
if SOC_BCM58402_A72
config NUM_IRQS
int
default 260
config SYS_CLOCK_HW_CYCLES_PER_SEC
int
default 25000000
endif
``` | /content/code_sandbox/soc/brcm/bcmvk/viper/Kconfig.defconfig.viper_bcm58402_a72 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 42 |
```unknown
if SOC_SERIES_VIPER
rsource "Kconfig.defconfig.viper*"
endif # SOC_SERIES_VIPER
``` | /content/code_sandbox/soc/brcm/bcmvk/viper/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 30 |
```unknown
config SOC_SERIES_VIPER
bool
select SOC_FAMILY_BCMVK
help
Enable support for Broadcom Viper Series.
config SOC_BCM58402_M7
bool
select SOC_SERIES_VIPER
help
Broadcom BCM58402 M7
config SOC_BCM58402_A72
bool
select SOC_SERIES_VIPER
help
Broadcom BCM58402 A72
config SOC_SERIES
default "v... | /content/code_sandbox/soc/brcm/bcmvk/viper/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 132 |
```unknown
config SOC_BCM58402_M7
select ARM
select CPU_CORTEX_M7
select CPU_CORTEX_M_HAS_SYSTICK
select CPU_HAS_ARM_MPU
config SOC_BCM58402_A72
select ARM64
select CPU_CORTEX_A72
select ARM_ARCH_TIMER if SYS_CLOCK_EXISTS
``` | /content/code_sandbox/soc/brcm/bcmvk/viper/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 67 |
```unknown
if SOC_BCM58402_M7
config NUM_IRQS
int
default 240
config SYS_CLOCK_HW_CYCLES_PER_SEC
int
default 500000000
endif
``` | /content/code_sandbox/soc/brcm/bcmvk/viper/Kconfig.defconfig.viper_bcm58402_m7 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 42 |
```c
/*
*
*/
#include <zephyr/devicetree.h>
#include <zephyr/sys/util.h>
#include <zephyr/arch/arm64/arm_mmu.h>
#define PCIE_OB_HIGHMEM_ADDR DT_REG_ADDR_BY_NAME(DT_NODELABEL(pcie0_ep), \
map_highmem)
#define PCIE_OB_HIGHMEM_SIZE DT_REG_SIZE_BY_NAME(DT_NODELABEL(pcie0_ep), \
map_highmem)
static ... | /content/code_sandbox/soc/brcm/bcmvk/viper/a72/mmu_regions.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 274 |
```c
/*
*
*/
#include <zephyr/toolchain.h>
#include <zephyr/linker/sections.h>
#include <zephyr/arch/cpu.h>
#include <zephyr/sys/barrier.h>
void z_arm64_el3_plat_init(void)
{
uint64_t reg, val;
/* Enable access control configuration from lower EL */
reg = read_actlr_el3();
reg |= (ACTLR_EL3_L2ACTLR_BIT |
ACT... | /content/code_sandbox/soc/brcm/bcmvk/viper/a72/plat_core.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 460 |
```c
/*
*
*/
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <soc.h>
#include <zephyr/arch/cpu.h>
/**
* @brief Perform basic hardware initialization at boot.
*
* This needs to be run from the very beginning.
* So the init priority has to be 0 (zero).
*
* @return 0
*/
static int viper_init(void)
... | /content/code_sandbox/soc/brcm/bcmvk/viper/a72/soc.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 220 |
```objective-c
/*
*
*/
#ifndef SOC_H
#define SOC_H
#include <zephyr/sys/util_macro.h>
/* Registers block */
#define CRMU_MCU_EXTRA_EVENT_STATUS 0x40070054
#define CRMU_MCU_EXTRA_EVENT_CLEAR 0x4007005c
#define CRMU_MCU_EXTRA_EVENT_MASK 0x40070064
#define PCIE0_PERST_INTR BIT(4)
#define PCIE0_PERST_INB_INTR BIT(6)... | /content/code_sandbox/soc/brcm/bcmvk/viper/a72/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 235 |
```c
/*
*
*/
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <soc.h>
#include <zephyr/arch/cpu.h>
/**
* @brief Perform basic hardware initialization at boot.
*
* This needs to be run from the very beginning.
* So the init priority has to be 0 (zero).
*
* @return 0
*/
static int viper_init(void)
... | /content/code_sandbox/soc/brcm/bcmvk/viper/m7/soc.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 205 |
```unknown
#
#
config SOC_SERIES_VALKYRIE
bool
select SOC_FAMILY_BCMVK
help
Enable support for Broadcom Valkyrie Series
config SOC_BCM58400
bool
select SOC_SERIES_VALKYRIE
help
Broadcom BCM58400
config SOC_SERIES
default "valkyrie" if SOC_SERIES_VALKYRIE
config SOC
default "bcm58400" if SOC_BCM58400
... | /content/code_sandbox/soc/brcm/bcmvk/valkyrie/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 95 |
```objective-c
/*
*
*/
#ifndef SOC_H
#define SOC_H
#include <zephyr/sys/util.h>
#include <zephyr/toolchain.h>
#include <zephyr/arch/arm/cortex_m/nvic.h>
#ifndef _ASMLANGUAGE
/* Interrupt Number Definition */
typedef enum IRQn {
/* CORTEX-M7 Processor Exceptions Numbers */
NonMaskableInt_IRQn = -14, /*< 2 ... | /content/code_sandbox/soc/brcm/bcmvk/viper/m7/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 3,670 |
```objective-c
/*
*/
#ifndef SOC_H
#define SOC_H
#include <zephyr/sys/util.h>
#include <zephyr/toolchain.h>
#ifndef _ASMLANGUAGE
/* Interrupt Number Definition */
typedef enum IRQn {
/* CORTEX-M7 Processor Exceptions Numbers */
NonMaskableInt_IRQn = -14, /*< 2 Non Maskable Interrupt */
HardFa... | /content/code_sandbox/soc/brcm/bcmvk/valkyrie/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 3,556 |
```unknown
#
#
if SOC_SERIES_VALKYRIE
config NUM_IRQS
int
default 240
config SYS_CLOCK_HW_CYCLES_PER_SEC
int
default 500000000
endif # SOC_SERIES_VALKYRIE
``` | /content/code_sandbox/soc/brcm/bcmvk/valkyrie/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 51 |
```unknown
#
#
config SOC_SERIES_VALKYRIE
select ARM
select CPU_CORTEX_M7
select CPU_CORTEX_M_HAS_SYSTICK
select CPU_HAS_ARM_MPU
``` | /content/code_sandbox/soc/brcm/bcmvk/valkyrie/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 39 |
```yaml
series:
- name: bcm2711
socs:
- name: bcm2711
``` | /content/code_sandbox/soc/brcm/bcm2711/soc.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 22 |
```unknown
config SOC_BCM2711
bool
config SOC
default "bcm2711" if SOC_BCM2711
``` | /content/code_sandbox/soc/brcm/bcm2711/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 27 |
```unknown
if SOC_BCM2711
config NUM_IRQS
int
default 260
config SYS_CLOCK_HW_CYCLES_PER_SEC
int
default 54000000
endif
``` | /content/code_sandbox/soc/brcm/bcm2711/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 40 |
```c
/*
*
*/
#include <zephyr/devicetree.h>
#include <zephyr/sys/util.h>
#include <zephyr/arch/arm64/arm_mmu.h>
static const struct arm_mmu_region mmu_regions[] = {
MMU_REGION_FLAT_ENTRY("GIC",
DT_REG_ADDR_BY_IDX(DT_INST(0, arm_gic), 0),
DT_REG_SIZE_BY_IDX(DT_INST(0, arm_gic), 0),
MT_DEVI... | /content/code_sandbox/soc/brcm/bcm2711/mmu_regions.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 224 |
```unknown
config SOC_BCM2711
select ARM64
select CPU_CORTEX_A72
select ARM_ARCH_TIMER if SYS_CLOCK_EXISTS
``` | /content/code_sandbox/soc/brcm/bcm2711/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 29 |
```unknown
config SOC_BCM2712
bool
config SOC
default "bcm2712" if SOC_BCM2712
``` | /content/code_sandbox/soc/brcm/bcm2712/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 27 |
```yaml
series:
- name: bcm2712
socs:
- name: bcm2712
``` | /content/code_sandbox/soc/brcm/bcm2712/soc.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 22 |
```unknown
if SOC_BCM2712
config NUM_IRQS
int
default 280
config SYS_CLOCK_HW_CYCLES_PER_SEC
int
default 54000000
endif
``` | /content/code_sandbox/soc/brcm/bcm2712/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 40 |
```unknown
config SOC_BCM2712
select ARM64
select CPU_CORTEX_A76
select ARM_ARCH_TIMER if SYS_CLOCK_EXISTS
``` | /content/code_sandbox/soc/brcm/bcm2712/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 29 |
```unknown
config SOC_TI_LM3S6965
bool
help
TI LM3S6965
config SOC_TI_LM3S6965_QEMU
def_bool y
depends on SOC_TI_LM3S6965
# Platform has only been tested on QEMU, not on real hardware, so always
# assume it is used for a QEMU target.
config SOC
default "ti_lm3s6965" if SOC_TI_LM3S6965
``` | /content/code_sandbox/soc/ti/lm3s6965/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 105 |
```c
/*
*
*/
#include <zephyr/arch/arm64/arm_mmu.h>
#include <zephyr/devicetree.h>
#include <zephyr/sys/util.h>
static const struct arm_mmu_region mmu_regions[] = {
MMU_REGION_FLAT_ENTRY("GIC",
DT_REG_ADDR_BY_IDX(DT_INST(0, arm_gic), 0),
DT_REG_SIZE_BY_IDX(DT_INST(0, arm_gic), 0),
MT_DEV... | /content/code_sandbox/soc/brcm/bcm2712/mmu_regions.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 224 |
```yaml
socs:
- name: ti_lm3s6965
``` | /content/code_sandbox/soc/ti/lm3s6965/soc.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 14 |
```c
/*
*
*/
/**
* @file Board config file
*/
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <zephyr/kernel.h>
#include "soc.h"
#ifdef CONFIG_UART_STELLARIS
#include <zephyr/drivers/uart.h>
#define RCGC1 (*((volatile uint32_t *)0x400FE104))
#define RCGC1_UART0_EN 0x00000001
#define RCGC1_UART1_... | /content/code_sandbox/soc/ti/lm3s6965/soc_config.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 364 |
```unknown
/*
*
*/
#include <zephyr/toolchain.h>
#include <zephyr/linker/sections.h>
#include <zephyr/arch/cpu.h>
#include <offsets_short.h>
_ASM_FILE_PROLOGUE
GDATA(z_interrupt_stacks)
GTEXT(z_do_software_reboot)
SECTION_FUNC(TEXT,z_do_software_reboot)
eors r0, r0
/* move exception table back to 0 */
ldr r1... | /content/code_sandbox/soc/ti/lm3s6965/reboot.S | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 421 |
```c
/*
*
*/
#include <zephyr/kernel.h>
#include <zephyr/arch/cpu.h>
#include <zephyr/sys/util.h>
#include <cmsis_core.h>
/**
*
* @brief Reset the system
*
* This routine resets the processor.
*
*/
void sys_arch_reboot(int type)
{
ARG_UNUSED(type);
/*
* QEMU is missing the support for rebooting th... | /content/code_sandbox/soc/ti/lm3s6965/sys_arch_reboot.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 272 |
```objective-c
/*
*
*/
/**
* @file
* @brief Board configuration macros for the QEMU for arm platform
*
* This header file is used to specify and describe board-level aspects for
* the 'QEMU' platform.
*/
#ifndef _BOARD__H_
#define _BOARD__H_
#include <cmsis_core_m_defaults.h>
#include <zephyr/sys/util.h>
/*... | /content/code_sandbox/soc/ti/lm3s6965/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 449 |
```unknown
# TI LM3S6965 platform configuration options
if SOC_TI_LM3S6965
config NUM_IRQS
# must be >= the highest interrupt number used
# - include the UART interrupts and ethernet interrupts
default 43
config SYS_CLOCK_HW_CYCLES_PER_SEC
default 12000000
if UART_STELLARIS
config UART_STELLARIS_PORT_0
defau... | /content/code_sandbox/soc/ti/lm3s6965/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 125 |
```unknown
config SOC_TI_LM3S6965
select ARM
select CPU_CORTEX_M3
select CPU_CORTEX_M_HAS_DWT
``` | /content/code_sandbox/soc/ti/lm3s6965/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 31 |
```unknown
config SOC_FAMILY_TI_K3
bool
config SOC_FAMILY
default "ti_k3" if SOC_FAMILY_TI_K3
rsource "*/Kconfig.soc"
``` | /content/code_sandbox/soc/ti/k3/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 37 |
```yaml
family:
- name: ti_k3
series:
- name: am6x
socs:
- name: am6234
cpuclusters:
- name: m4
- name: a53
- name: am6442
cpuclusters:
- name: m4
``` | /content/code_sandbox/soc/ti/k3/soc.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 70 |
```unknown
if SOC_FAMILY_TI_K3
rsource "*/Kconfig"
endif # SOC_FAMILY_TI_K3
``` | /content/code_sandbox/soc/ti/k3/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 24 |
```unknown
if SOC_FAMILY_TI_K3
rsource "*/Kconfig.defconfig"
endif # SOC_FAMILY_TI_K3
``` | /content/code_sandbox/soc/ti/k3/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 26 |
```unknown
config SOC_SERIES_AM6X
bool
select SOC_FAMILY_TI_K3
config SOC_SERIES_AM6X_A53
bool
select SOC_SERIES_AM6X
help
Enable support for AM6X A53 Series.
config SOC_SERIES_AM6X_M4
bool
select SOC_SERIES_AM6X
help
Enable support for AM62X M4 Series.
config SOC_AM6234_A53
bool
select SOC_SERIES_A... | /content/code_sandbox/soc/ti/k3/am6x/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 202 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_SOC_ARM64_TI_K3_PINCTRL_SOC_H_
#define ZEPHYR_SOC_ARM64_TI_K3_PINCTRL_SOC_H_
#include <zephyr/devicetree.h>
#include <zephyr/types.h>
#ifdef __cplusplus
extern "C" {
#endif
struct pinctrl_soc_pin {
uint32_t offset;
uint32_t value;
};
typedef struct pinctrl_soc_pin pinctrl_... | /content/code_sandbox/soc/ti/k3/am6x/pinctrl_soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 250 |
```unknown
if SOC_SERIES_AM6X
# Workaround for not being able to have commas in macro arguments
DT_CHOSEN_Z_FLASH := zephyr,flash
config FLASH_SIZE
default $(dt_chosen_reg_size_int,$(DT_CHOSEN_Z_FLASH),0,K)
config FLASH_BASE_ADDRESS
default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_FLASH))
config NUM_IRQS
int
def... | /content/code_sandbox/soc/ti/k3/am6x/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 265 |
```unknown
config SOC_SERIES_AM6X_A53
select ARM64
select CPU_CORTEX_A53
select ARM_ARCH_TIMER if SYS_CLOCK_EXISTS
config SOC_SERIES_AM6X_M4
select ARM
select CPU_CORTEX_M4
select CPU_CORTEX_M_HAS_SYSTICK
select DYNAMIC_INTERRUPTS
select CPU_CORTEX_M_HAS_DWT
select OPENAMP_RSC_TABLE
select UART_NS16550_ACCE... | /content/code_sandbox/soc/ti/k3/am6x/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 157 |
```c
/*
*
*/
#include <zephyr/arch/arm64/arm_mmu.h>
#include <zephyr/devicetree.h>
#include <zephyr/sys/util.h>
static const struct arm_mmu_region mmu_regions[] = {
MMU_REGION_FLAT_ENTRY("GIC",
DT_REG_ADDR_BY_IDX(DT_NODELABEL(gic), 0),
DT_REG_SIZE_BY_IDX(DT_NODELABEL(gic), 0),
MT_DEVICE... | /content/code_sandbox/soc/ti/k3/am6x/a53/mmu_regions.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 208 |
```objective-c
/*
*
*/
#ifndef __SOC_H_
#define __SOC_H_
#include <cmsis_core_m_defaults.h>
#include <zephyr/drivers/mm/rat.h>
#endif /* __SOC_H */
``` | /content/code_sandbox/soc/ti/k3/am6x/m4/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 40 |
```linker script
/* linker.ld - Linker command/script file
*
*
*/
#include <zephyr/arch/arm/cortex_m/scripts/linker.ld>
SECTIONS
{
#ifdef CONFIG_OPENAMP_RSC_TABLE
SECTION_PROLOGUE(.resource_table,, SUBALIGN(4))
{
KEEP(*(.resource_table*))
} GROUP_LINK_IN(DDR)
#endif
}
``` | /content/code_sandbox/soc/ti/k3/am6x/m4/linker.ld | linker script | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 77 |
```unknown
# Texas Instruments SimpleLink Family
config SOC_FAMILY_TI_SIMPLELINK
bool
config SOC_FAMILY
default "ti_simplelink" if SOC_FAMILY_TI_SIMPLELINK
rsource "*/Kconfig.soc"
``` | /content/code_sandbox/soc/ti/simplelink/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 43 |
```c
/*
*
*/
#include <zephyr/arch/cpu.h>
#include <zephyr/kernel.h>
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <soc.h>
#define ADDR_TRANSLATE_RAT_BASE_ADDR (0x044200000u)
#define PINCTRL_BASE_ADDR (0x4080000u)
#define KICK0_UNLOCK_VAL (0x68EF3490U)
#define KICK1_UNLOCK_VAL (0xD172BC5AU)
#d... | /content/code_sandbox/soc/ti/k3/am6x/m4/soc.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 592 |
```unknown
if SOC_FAMILY_TI_SIMPLELINK
rsource "*/Kconfig.defconfig"
endif # SOC_FAMILY_TI_SIMPLELINK
``` | /content/code_sandbox/soc/ti/simplelink/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 26 |
```yaml
family:
- name: ti_simplelink
series:
- name: cc13x2_cc26x2
socs:
- name: cc1352p
- name: cc1352r
- name: cc2652p
- name: cc2652r
- name: cc13x2x7_cc26x2x7
socs:
- name: cc1352p7
- name: cc1352r7
- name: cc2652p7
- name: cc2652r7
- name: cc32xx
socs:
- nam... | /content/code_sandbox/soc/ti/simplelink/soc.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 183 |
```unknown
# Texas Instruments SimpleLink Family
if SOC_FAMILY_TI_SIMPLELINK
rsource "*/Kconfig"
config HAS_TI_CCFG
bool
help
Selected when CCFG (Customer Configuration) registers
appear at the end of flash
endif # SOC_FAMILY_TI_SIMPLELINK
``` | /content/code_sandbox/soc/ti/simplelink/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 59 |
```unknown
# Texas Instruments SimpleLink CC13x2 / CC26x2
config SOC_SERIES_CC13X2_CC26X2
bool
select SOC_FAMILY_TI_SIMPLELINK
help
Enable support for TI SimpleLink CC13x2 / CC26x2 SoCs
config SOC_CC1352P
bool
select SOC_SERIES_CC13X2_CC26X2
help
CC1352P
config SOC_CC1352R
bool
select SOC_SERIES_CC13X... | /content/code_sandbox/soc/ti/simplelink/cc13x2_cc26x2/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 267 |
```linker script
/*
* Organisation (CSIRO) ABN 41 687 119 230.
*
*/
GROUP_START(FLASH_CCFG)
SECTION_PROLOGUE(.ti_ccfg,,)
{
KEEP(*(_TI_CCFG_SECTION_NAME))
} GROUP_LINK_IN(LINKER_DT_NODE_REGION_NAME(DT_NODELABEL(ti_ccfg_partition)))
GROUP_END(FLASH_CCFG)
``` | /content/code_sandbox/soc/ti/simplelink/cc13x2_cc26x2/ccfg.ld | linker script | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 76 |
```c
/*
*/
#include <zephyr/sys/poweroff.h>
#include <zephyr/toolchain.h>
#include <ti/drivers/Power.h>
void z_sys_poweroff(void)
{
Power_shutdown(0, 0);
CODE_UNREACHABLE;
}
``` | /content/code_sandbox/soc/ti/simplelink/cc13x2_cc26x2/poweroff.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 55 |
```c
/*
*
*/
#include <zephyr/init.h>
#include <driverlib/setup.h>
static int ti_cc13x2_cc26x2_init(void)
{
/* Performs necessary trim of the device. */
SetupTrimDevice();
return 0;
}
SYS_INIT(ti_cc13x2_cc26x2_init, PRE_KERNEL_1, 0);
``` | /content/code_sandbox/soc/ti/simplelink/cc13x2_cc26x2/soc.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 75 |
```c
/*
*
*/
#ifdef CONFIG_CC13X2_CC26X2_BOOST_MODE
#define CCFG_FORCE_VDDR_HH 1
#endif
#ifdef CONFIG_CC13X2_CC26X2_BOOTLOADER_ENABLE
#define SET_CCFG_BL_CONFIG_BOOTLOADER_ENABLE 0xC5
#else
#define SET_CCFG_BL_CONFIG_BOOTLOADER_ENABLE 0x00
#endif /* CONFIG_CC13X2_CC26X2_BOOTLOADER_ENABLE */
#ifdef CONFIG_CC13X2_CC... | /content/code_sandbox/soc/ti/simplelink/cc13x2_cc26x2/ccfg.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 337 |
```objective-c
/*
*
*/
#ifndef TI_SIMPLELINK_CC13X2_CC26X2_SOC_H_
#define TI_SIMPLELINK_CC13X2_CC26X2_SOC_H_
#include <zephyr/arch/arm/cortex_m/nvic.h>
/* CMSIS required values */
typedef enum {
Reset_IRQn = -15,
NonMaskableInt_IRQn = -14,
HardFault_IRQn = -13,
MemoryManagement_IRQn = -12,
... | /content/code_sandbox/soc/ti/simplelink/cc13x2_cc26x2/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 230 |
```objective-c
/*
*
*/
#ifndef TI_SIMPLELINK_CC13XX_CC26XX_SOC_PINCTRL_H_
#define TI_SIMPLELINK_CC13XX_CC26XX_SOC_PINCTRL_H_
#include <zephyr/types.h>
#include <driverlib/ioc.h>
typedef struct pinctrl_soc_pin {
uint32_t pin;
uint32_t iofunc;
uint32_t iomode;
} pinctrl_soc_pin_t;
/* Convert DT flags to SoC fla... | /content/code_sandbox/soc/ti/simplelink/cc13x2_cc26x2/pinctrl_soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 443 |
```unknown
# Texas Instruments SimpleLink CC13x2 / CC26x2
if SOC_SERIES_CC13X2_CC26X2
config SYS_CLOCK_HW_CYCLES_PER_SEC
default 32768
# Note that when using the RTC as system clock, this needs to be 32768
# to reduce truncation errors from accumulating due to conversion to/from
# time, ticks, and HW cycles
config ... | /content/code_sandbox/soc/ti/simplelink/cc13x2_cc26x2/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 279 |
```unknown
# Texas Instruments SimpleLink CC13x2 / CC26x2
config SOC_SERIES_CC13X2_CC26X2
select ARM
select CPU_CORTEX_M4
select CPU_HAS_ARM_MPU
select DYNAMIC_INTERRUPTS
select CPU_CORTEX_M_HAS_DWT
select CPU_HAS_FPU
select HAS_CC13X2_CC26X2_SDK
select HAS_TI_CCFG if !BOOTLOADER_MCUBOOT
select HAS_SEGGER_RTT... | /content/code_sandbox/soc/ti/simplelink/cc13x2_cc26x2/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 575 |
```unknown
# Texas Instruments MSP432P401R
config SOC_SERIES_MSP432P4XX
bool
select SOC_FAMILY_TI_SIMPLELINK
help
Enable support for TI SimpleLink MSP432P4XX.
config SOC_MSP432P401R
bool
select SOC_SERIES_MSP432P4XX
help
MSP432P401R
config SOC_SERIES
default "msp432p4xx" if SOC_SERIES_MSP432P4XX
config... | /content/code_sandbox/soc/ti/simplelink/msp432p4xx/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 120 |
```unknown
# TI SimpleLink MSP432P401R SoC
if SOC_MSP432P401R
config SYS_CLOCK_HW_CYCLES_PER_SEC
default 48000000
config NUM_IRQS
default 64
endif # SOC_MSP432P401R
``` | /content/code_sandbox/soc/ti/simplelink/msp432p4xx/Kconfig.defconfig.msp432p401r | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 57 |
```c
/*
*
*/
#include <zephyr/kernel.h>
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <soc.h>
static int ti_msp432p4xx_init(void)
{
SystemInit();
return 0;
}
SYS_INIT(ti_msp432p4xx_init, PRE_KERNEL_1, 0);
``` | /content/code_sandbox/soc/ti/simplelink/msp432p4xx/soc.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 73 |
```objective-c
/*
*
*/
#include <ti/devices/msp432p4xx/inc/msp.h>
``` | /content/code_sandbox/soc/ti/simplelink/msp432p4xx/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 19 |
```unknown
# TI SimpleLink MSP432P4XX
if SOC_SERIES_MSP432P4XX
rsource "Kconfig.defconfig.msp432p4*"
endif # SOC_SERIES_MSP432P4XX
``` | /content/code_sandbox/soc/ti/simplelink/msp432p4xx/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 48 |
```unknown
# Texas Instruments MSP432P401R
config SOC_SERIES_MSP432P4XX
select ARM
select CPU_CORTEX_M4
select CPU_CORTEX_M_HAS_DWT
select DYNAMIC_INTERRUPTS
select CPU_HAS_FPU
select CPU_HAS_ARM_MPU
config SOC_MSP432P401R
select HAS_MSP432P4XXSDK
``` | /content/code_sandbox/soc/ti/simplelink/msp432p4xx/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 78 |
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