text stringlengths 9 39.2M | dir stringlengths 25 226 | lang stringclasses 163
values | created_date timestamp[s] | updated_date timestamp[s] | repo_name stringclasses 751
values | repo_full_name stringclasses 752
values | star int64 1.01k 183k | len_tokens int64 1 18.5M |
|---|---|---|---|---|---|---|---|---|
```unknown
# EFR32FG1P (Flex Gecko) MCU line
config SOC_SERIES_EFR32FG1P
select ARM
select HAS_SILABS_GECKO
select HAS_SWO
select CPU_CORTEX_M4
select CPU_CORTEX_M_HAS_DWT
select CPU_HAS_FPU
select CPU_HAS_ARM_MPU
select SOC_GECKO_HAS_RADIO
select SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION
select SOC_GECKO_HAS_H... | /content/code_sandbox/soc/silabs/silabs_s1/efr32fg1p/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 161 |
```objective-c
/*
*
*/
/**
* @file
* @brief Board configuration macros for the EFM32GG12B SoC family.
*
*/
#ifndef _SOC__H_
#define _SOC__H_
#include <zephyr/sys/util.h>
#ifdef __cplusplus
extern "C" {
#endif
#ifndef _ASMLANGUAGE
#include <em_bus.h>
#include <em_common.h>
#include "soc_pinmap.h"
#include ... | /content/code_sandbox/soc/silabs/silabs_s1/efm32gg12b/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 116 |
```unknown
# EFM32GG12B series configuration options
if SOC_SERIES_EFM32GG12B
config NUM_IRQS
int
# must be >= the highest interrupt number used
default 68
config GPIO_GECKO
default y
depends on GPIO || LOG_BACKEND_SWO
endif # SOC_SERIES_EFM32GG12B
``` | /content/code_sandbox/soc/silabs/silabs_s1/efm32gg12b/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 76 |
```objective-c
/*
*
*/
/** @file
* @brief Silabs EFM32GG12B MCU pin definitions.
*
* This file contains pin configuration data required by different MCU
* modules to correctly configure GPIO controller.
*/
#ifndef _SILABS_EFM32GG12B_SOC_PINMAP_H_
#define _SILABS_EFM32GG12B_SOC_PINMAP_H_
#include <zephyr/devic... | /content/code_sandbox/soc/silabs/silabs_s1/efm32gg12b/soc_pinmap.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 317 |
```unknown
# EFM32GG12B (Giant Gecko) MCU line
config SOC_SERIES_EFM32GG12B
select ARM
select HAS_SILABS_GECKO
select HAS_SWO
select CPU_CORTEX_M4
select CPU_HAS_FPU
select CPU_HAS_ARM_MPU
select SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION
select SOC_GECKO_HAS_HFRCO_FREQRANGE
select SOC_GECKO_CMU
select SOC_GECKO_... | /content/code_sandbox/soc/silabs/silabs_s1/efm32gg12b/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 144 |
```unknown
# EFM32GG11B (Giant Gecko) MCU line
config SOC_SERIES_EFM32GG11B
bool
select SOC_FAMILY_SILABS_S1
help
EFM32GG11B Series MCU
config SOC_PART_NUMBER_EFM32GG11B820F2048GL192
bool
select SOC_SERIES_EFM32GG11B
config SOC_PART_NUMBER_EFM32GG11B820F2048GM64
bool
select SOC_SERIES_EFM32GG11B
config SO... | /content/code_sandbox/soc/silabs/silabs_s1/efm32gg11b/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 271 |
```objective-c
/*
*
*/
/** @file
* @brief Silabs EFM32GG11B MCU pin definitions.
*
* This file contains pin configuration data required by different MCU
* modules to correctly configure GPIO controller.
*/
#ifndef _SILABS_EFM32GG11B_SOC_PINMAP_H_
#define _SILABS_EFM32GG11B_SOC_PINMAP_H_
#include <zephyr/devic... | /content/code_sandbox/soc/silabs/silabs_s1/efm32gg11b/soc_pinmap.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 317 |
```objective-c
/*
*
*/
/**
* @file
* @brief Board configuration macros for the efm32gg soc
*
*/
#ifndef _SOC__H_
#define _SOC__H_
#include <zephyr/sys/util.h>
#ifdef __cplusplus
extern "C" {
#endif
#ifndef _ASMLANGUAGE
#include <em_bus.h>
#include <em_common.h>
#include "soc_pinmap.h"
#include "../common/... | /content/code_sandbox/soc/silabs/silabs_s1/efm32gg11b/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 112 |
```unknown
# EFM32GG11B series configuration options
if SOC_SERIES_EFM32GG11B
config NUM_IRQS
int
# must be >= the highest interrupt number used
default 68
config GPIO_GECKO
default y
depends on GPIO || LOG_BACKEND_SWO
endif # SOC_SERIES_EFM32GG11B
``` | /content/code_sandbox/soc/silabs/silabs_s1/efm32gg11b/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 76 |
```unknown
# EFM32GG11B (Giant Gecko) MCU line
config SOC_SERIES_EFM32GG11B
select ARM
select HAS_SILABS_GECKO
select HAS_SWO
select CPU_CORTEX_M4
select CPU_HAS_FPU
select CPU_HAS_ARM_MPU
select SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION
select SOC_GECKO_HAS_HFRCO_FREQRANGE
select SOC_GECKO_CMU
select SOC_GECKO_... | /content/code_sandbox/soc/silabs/silabs_s1/efm32gg11b/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 144 |
```unknown
# EFM32PG12B (Pearl Gecko) MCU line
config SOC_SERIES_EFM32PG12B
bool
select SOC_FAMILY_SILABS_S1
help
EFM32PG12B Series MCU
config SOC_PART_NUMBER_EFM32PG12B500F1024GL125
bool
select SOC_SERIES_EFM32PG12B
config SOC_SERIES
default "efm32pg12b" if SOC_SERIES_EFM32PG12B
config SOC
default "efm3... | /content/code_sandbox/soc/silabs/silabs_s1/efm32pg12b/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 177 |
```objective-c
/*
*
*/
/**
* @file
* @brief Board configuration macros for the efm32pg12b soc
*
*/
#ifndef _SOC__H_
#define _SOC__H_
#include <zephyr/sys/util.h>
#ifndef _ASMLANGUAGE
#include <em_bus.h>
#include <em_common.h>
#include "soc_pinmap.h"
#include "../common/soc_gpio.h"
#endif /* !_ASMLANGUAGE ... | /content/code_sandbox/soc/silabs/silabs_s1/efm32pg12b/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 96 |
```objective-c
/*
*/
/** @file
* @brief Silabs EFM32PG12B MCU pin definitions.
*
* This file contains pin configuration data required by different MCU
* modules to correctly configure GPIO controller.
*/
#ifndef _SILABS_EFM32PG12B_SOC_PINMAP_H_
#define _SILABS_EFM32PG12B_SOC_PINMAP_H_
#include <zephyr/devicetr... | /content/code_sandbox/soc/silabs/silabs_s1/efm32pg12b/soc_pinmap.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 301 |
```unknown
# EFM32PG12B series configuration options
if SOC_SERIES_EFM32PG12B
config NUM_IRQS
# must be >= the highest interrupt number used
default 50
endif # SOC_SERIES_EFM32PG12B
``` | /content/code_sandbox/soc/silabs/silabs_s1/efm32pg12b/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 55 |
```unknown
# EFM32PG12B (Pearl Gecko) MCU line
config SOC_SERIES_EFM32PG12B
select ARM
select HAS_SILABS_GECKO
select HAS_SWO
select CPU_CORTEX_M4
select CPU_CORTEX_M_HAS_DWT
select CPU_HAS_FPU
select CPU_HAS_ARM_MPU
select SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION
select SOC_GECKO_HAS_HFRCO_FREQRANGE
select SO... | /content/code_sandbox/soc/silabs/silabs_s1/efm32pg12b/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 164 |
```unknown
# Silicon Labs EFR32BG13P (Blue Gecko) MCU series
config SOC_SERIES_EFR32BG13P
bool
select SOC_FAMILY_SILABS_S1
help
EFR32BG13P Series MCU
config SOC_PART_NUMBER_EFR32BG13P632F512GM48
bool
select SOC_SERIES_EFR32BG13P
config SOC_SERIES
default "efr32bg13p" if SOC_SERIES_EFR32BG13P
config SOC
d... | /content/code_sandbox/soc/silabs/silabs_s1/efr32bg13p/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 172 |
```objective-c
/*
*
*/
/**
* @file
* @brief Register access macros for the EFR32BG13P SoC
*
*/
#ifndef EFR32BG13P_SOC_H_
#define EFR32BG13P_SOC_H_
#include <zephyr/sys/util.h>
#ifndef _ASMLANGUAGE
#include <em_common.h>
#include "soc_pinmap.h"
#include "../common/soc_gpio.h"
#endif /* !_ASMLANGUAGE */
#e... | /content/code_sandbox/soc/silabs/silabs_s1/efr32bg13p/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 103 |
```objective-c
/*
*/
/** @file
* @brief Silabs EFR32BG13P MCU pin definitions.
*/
#ifndef SOC_PINMAP_H_
#define SOC_PINMAP_H_
#include <zephyr/devicetree.h>
#include <em_gpio.h>
#define GPIO_NODE DT_INST(0, silabs_gecko_gpio)
#if DT_NODE_HAS_PROP(GPIO_NODE, location_swo)
#define SWO_LOCATION DT_PROP(GPIO_NODE, l... | /content/code_sandbox/soc/silabs/silabs_s1/efr32bg13p/soc_pinmap.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 245 |
```unknown
# Silicon Labs EFR32BG13P (Blue Gecko) MCU configuration options
if SOC_SERIES_EFR32BG13P
config NUM_IRQS
# must be >= the highest interrupt number used
default 47
endif # SOC_SERIES_EFR32BG13P
``` | /content/code_sandbox/soc/silabs/silabs_s1/efr32bg13p/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 61 |
```unknown
# Silicon Labs EFR32BG13P (Blue Gecko) MCU series
config SOC_SERIES_EFR32BG13P
select ARM
select CPU_CORTEX_M4
select CPU_CORTEX_M_HAS_DWT
select CPU_HAS_FPU
select CPU_HAS_ARM_MPU
select SOC_GECKO_HAS_RADIO
select HAS_SILABS_GECKO
select HAS_SWO
select SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION
selec... | /content/code_sandbox/soc/silabs/silabs_s1/efr32bg13p/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 144 |
```unknown
# EFR32MG12P (Mighty Gecko) MCU line
config SOC_SERIES_EFR32MG12P
bool
select SOC_FAMILY_SILABS_S1
help
EFR32MG12P Series MCU
config SOC_PART_NUMBER_EFR32MG12P332F1024GL125
bool
select SOC_SERIES_EFR32MG12P
config SOC_PART_NUMBER_EFR32MG12P433F1024GM68
bool
select SOC_SERIES_EFR32MG12P
config ... | /content/code_sandbox/soc/silabs/silabs_s1/efr32mg12p/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 363 |
```objective-c
/*
*/
/** @file
* @brief Silabs EFR32MG MCU pin definitions.
*
* This file contains pin configuration data required by different MCU
* modules to correctly configure GPIO controller.
*/
#ifndef _SOC_PINMAP_H_
#define _SOC_PINMAP_H_
#include <zephyr/devicetree.h>
#include <em_gpio.h>
#define GPI... | /content/code_sandbox/soc/silabs/silabs_s1/efr32mg12p/soc_pinmap.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 267 |
```objective-c
/*
*
*/
/**
* @file
* @brief Board configuration macros for the efm32wg soc
*
*/
#ifndef _SOC__H_
#define _SOC__H_
#include <zephyr/sys/util.h>
#ifndef _ASMLANGUAGE
#include <em_common.h>
#include "soc_pinmap.h"
#include "../common/soc_gpio.h"
#endif /* !_ASMLANGUAGE */
#endif /* _SOC__H_ ... | /content/code_sandbox/soc/silabs/silabs_s1/efr32mg12p/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 88 |
```unknown
# EFM32WG series configuration options
if SOC_SERIES_EFR32MG12P
config NUM_IRQS
# must be >= the highest interrupt number used
default 49
endif # SOC_SERIES_EFR32MG12P
``` | /content/code_sandbox/soc/silabs/silabs_s1/efr32mg12p/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 53 |
```unknown
# EFR32MG12P (Mighty Gecko) MCU line
config SOC_SERIES_EFR32MG12P
select ARM
select CPU_CORTEX_M4
select CPU_CORTEX_M_HAS_DWT
select CPU_HAS_FPU
select CPU_HAS_ARM_MPU
select SOC_GECKO_HAS_RADIO
select HAS_SILABS_GECKO
select HAS_SWO
select SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION
select SOC_GECKO_H... | /content/code_sandbox/soc/silabs/silabs_s1/efr32mg12p/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 166 |
```c
/*
*
*/
#include <zephyr/kernel.h>
#include <zephyr/logging/log.h>
#include <zephyr/pm/pm.h>
#include <sl_power_manager.h>
LOG_MODULE_DECLARE(soc, CONFIG_SOC_LOG_LEVEL);
/*
* Power state map:
* PM_STATE_RUNTIME_IDLE: EM1 Sleep
* PM_STATE_SUSPEND_TO_IDLE: EM2 Deep Sleep
* PM_STATE_STANDBY: EM3 Stop
* PM_ST... | /content/code_sandbox/soc/silabs/common/soc_power_pmgr.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 751 |
```c
/*
*
*/
#include <zephyr/kernel.h>
#include <zephyr/logging/log.h>
#include <zephyr/pm/pm.h>
#include <em_emu.h>
LOG_MODULE_DECLARE(soc, CONFIG_SOC_LOG_LEVEL);
/*
* Power state map:
* PM_STATE_RUNTIME_IDLE: EM1 Sleep
* PM_STATE_SUSPEND_TO_IDLE: EM2 Deep Sleep
* PM_STATE_STANDBY: EM3 Stop
* PM_STATE_SOFT_O... | /content/code_sandbox/soc/silabs/common/soc_power.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 403 |
```c
/*
*
*/
/**
* @file
* @brief Common SoC initialization for the Silabs products
*/
#include <zephyr/init.h>
#include <zephyr/kernel.h>
#include <zephyr/logging/log.h>
#include <em_chip.h>
#include <em_cmu.h>
#include <em_emu.h>
#include <soc.h>
#include <cmsis_core.h>
#ifdef CONFIG_SOC_GECKO_DEV_INIT
#incl... | /content/code_sandbox/soc/silabs/common/soc.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,998 |
```objective-c
/*
*
*/
/**
* @file
* Silabs SoC specific helpers for pinctrl driver
*/
#ifndef ZEPHYR_SOC_ARM_SILABS_GECKO_COMMON_PINCTRL_SOC_H_
#define ZEPHYR_SOC_ARM_SILABS_GECKO_COMMON_PINCTRL_SOC_H_
#include <stdint.h>
#include <zephyr/devicetree.h>
#if CONFIG_SOC_FAMILY_SILABS_S1
#include <zephyr/dt-bindi... | /content/code_sandbox/soc/silabs/common/pinctrl_soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 622 |
```objective-c
/*
*/
/** @file
* @brief Silabs MCU family General Purpose Input Output (GPIO)
* module HAL driver.
*/
#ifndef _SILABS_COMMON_SOC_GPIO_H_
#define _SILABS_COMMON_SOC_GPIO_H_
#include <soc.h>
#include <em_gpio.h>
#ifdef __cplusplus
extern "C" {
#endif
struct soc_gpio_pin {
GPIO_Port_TypeDef port;... | /content/code_sandbox/soc/silabs/common/soc_gpio.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 143 |
```unknown
config SOC_FAMILY_SILABS_S0
bool
rsource "*/Kconfig.soc"
``` | /content/code_sandbox/soc/silabs/silabs_s0/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 22 |
```objective-c
/*
*
*/
#ifndef SL_DEVICE_INIT_HFXO_CONFIG_H
#define SL_DEVICE_INIT_HFXO_CONFIG_H
#include <zephyr/devicetree.h>
#define SL_DEVICE_INIT_HFXO_MODE cmuHfxoOscMode_Crystal
#define SL_DEVICE_INIT_HFXO_FREQ DT_PROP(DT_NODELABEL(clk_hfxo), clock_frequency)
#define SL_DEVICE_INIT_HFXO_C... | /content/code_sandbox/soc/silabs/common/sl_device_init_hfxo_config.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 140 |
```unknown
#
config SOC_FAMILY_SILABS_S0
select HAS_SEGGER_RTT if ZEPHYR_SEGGER_MODULE
select BUILD_OUTPUT_HEX
if SOC_FAMILY_SILABS_S0
rsource "*/Kconfig"
endif # SOC_FAMILY_SILABS_S0
``` | /content/code_sandbox/soc/silabs/silabs_s0/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 57 |
```unknown
# EFM32WG (Wonder Gecko) MCU line
config SOC_SERIES_EFM32WG
bool
select SOC_FAMILY_SILABS_S0
help
EFM32WG Series MCU
config SOC_PART_NUMBER_EFM32WG990F256
bool
select SOC_SERIES_EFM32WG
config SOC_SERIES
default "efm32wg" if SOC_SERIES_EFM32WG
config SOC
default "efm32wg990f256" if SOC_PART_NU... | /content/code_sandbox/soc/silabs/silabs_s0/efm32wg/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 139 |
```objective-c
/*
*/
/** @file
* @brief Silabs EFM32WG MCU pin definitions.
*
* This file contains pin configuration data required by different MCU
* modules to correctly configure GPIO controller.
*/
#ifndef _SILABS_EFM32WG_SOC_PINMAP_H_
#define _SILABS_EFM32WG_SOC_PINMAP_H_
#include <soc.h>
#include <em_gpio... | /content/code_sandbox/soc/silabs/silabs_s0/efm32wg/soc_pinmap.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 97 |
```objective-c
/*
*
*/
/**
* @file
* @brief Board configuration macros for the efm32wg soc
*
*/
#ifndef _SOC__H_
#define _SOC__H_
#include <zephyr/sys/util.h>
#ifndef _ASMLANGUAGE
#include <em_bus.h>
#include <em_common.h>
#include "soc_pinmap.h"
#include "../common/soc_gpio.h"
#endif /* !_ASMLANGUAGE */
... | /content/code_sandbox/soc/silabs/silabs_s0/efm32wg/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 94 |
```unknown
# EFM32WG series configuration options
if SOC_SERIES_EFM32WG
config NUM_IRQS
# must be >= the highest interrupt number used
default 39
endif # SOC_SERIES_EFM32WG
``` | /content/code_sandbox/soc/silabs/silabs_s0/efm32wg/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 49 |
```unknown
# EFM32WG (Wonder Gecko) MCU line
config SOC_SERIES_EFM32WG
select ARM
select CPU_CORTEX_M4
select CPU_CORTEX_M_HAS_DWT
select CPU_HAS_FPU
select CPU_HAS_ARM_MPU
select HAS_SILABS_GECKO
select SOC_GECKO_CMU
select SOC_GECKO_GPIO
select HAS_PM
config SOC_GECKO_SDID
default 74 if SOC_SERIES_EFM32W... | /content/code_sandbox/soc/silabs/silabs_s0/efm32wg/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 102 |
```unknown
# EFM32HG (Happy Gecko) MCU line
config SOC_SERIES_EFM32HG
bool
select SOC_FAMILY_SILABS_S0
help
EFM32HG Series MCU
config SOC_PART_NUMBER_EFM32HG322F64
bool
select SOC_SERIES_EFM32HG
config SOC_SERIES
default "efm32hg" if SOC_SERIES_EFM32HG
config SOC
default "efm32hg322f64" if SOC_PART_NUMBE... | /content/code_sandbox/soc/silabs/silabs_s0/efm32hg/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 139 |
```objective-c
/*
*/
/** @file
* @brief Silabs EFM32HG MCU pin definitions.
*
* This file contains pin configuration data required by different MCU
* modules to correctly configure GPIO controller.
*/
#ifndef _SILABS_EFM32HG_SOC_PINMAP_H_
#define _SILABS_EFM32HG_SOC_PINMAP_H_
#include <soc.h>
#include <em_gpio... | /content/code_sandbox/soc/silabs/silabs_s0/efm32hg/soc_pinmap.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 97 |
```objective-c
/*
*
*/
/**
* @file
* @brief Board configuration macros for the efm32hg soc
*
*/
#ifndef _SOC__H_
#define _SOC__H_
#include <zephyr/sys/util.h>
#ifndef _ASMLANGUAGE
#include <em_common.h>
#include <zephyr/device.h>
#include "soc_pinmap.h"
#include "../common/soc_gpio.h"
#endif /* !_ASMLANGUA... | /content/code_sandbox/soc/silabs/silabs_s0/efm32hg/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 96 |
```unknown
# EFM32HG (Happy Gecko) MCU line
config SOC_SERIES_EFM32HG
select ARM
select CPU_CORTEX_M0PLUS
select CPU_CORTEX_M_HAS_SYSTICK
select CPU_CORTEX_M_HAS_VTOR
select HAS_SILABS_GECKO
select SOC_GECKO_CMU
select SOC_GECKO_GPIO
select HAS_PM
config SOC_GECKO_SDID
default 77 if SOC_SERIES_EFM32HG
``` | /content/code_sandbox/soc/silabs/silabs_s0/efm32hg/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 100 |
```unknown
# EFM32HG series configuration options
if SOC_SERIES_EFM32HG
config NUM_IRQS
# must be >= the highest interrupt number used
default 20
endif # SOC_SERIES_EFM32HG
``` | /content/code_sandbox/soc/silabs/silabs_s0/efm32hg/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 49 |
```unknown
config SOC_FAMILY_SILABS_S2
bool
rsource "*/Kconfig.soc"
``` | /content/code_sandbox/soc/silabs/silabs_s2/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 22 |
```unknown
#
config SOC_FAMILY_SILABS_S2
select HAS_SEGGER_RTT if ZEPHYR_SEGGER_MODULE
select BUILD_OUTPUT_HEX
if SOC_FAMILY_SILABS_S2
rsource "*/Kconfig"
endif # SOC_FAMILY_SILABS_S2
``` | /content/code_sandbox/soc/silabs/silabs_s2/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 57 |
```objective-c
/*
*/
/** @file
* @brief Silabs EFR32MG24 MCU pin definitions.
*
* This file contains pin configuration data required by different MCU
* modules to correctly configure GPIO controller.
*/
#ifndef _SILABS_EFR32MG24_SOC_PINMAP_H_
#define _SILABS_EFR32MG24_SOC_PINMAP_H_
#include <em_gpio.h>
#ifdef... | /content/code_sandbox/soc/silabs/silabs_s2/efr32mg24/soc_pinmap.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 133 |
```unknown
# Silicon Labs EFR32MG24 (Mighty Gecko) MCU line
config SOC_SERIES_EFR32MG24
bool
select SOC_FAMILY_SILABS_S2
help
EFR32MG24 Series MCU
config SOC_PART_NUMBER_EFR32MG24B020F1536IM40
bool
select SOC_SERIES_EFR32MG24
config SOC_PART_NUMBER_EFR32MG24B220F1536IM48
bool
select SOC_SERIES_EFR32MG24
... | /content/code_sandbox/soc/silabs/silabs_s2/efr32mg24/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 357 |
```objective-c
/*
*
*/
/**
* @file
* @brief Board configuration macros for the EFR32MG24 SoC
*
*/
#ifndef _SILABS_EFR32MG24_SOC_H
#define _SILABS_EFR32MG24_SOC_H
#include <zephyr/sys/util.h>
#ifndef _ASMLANGUAGE
#include <em_common.h>
#include "soc_pinmap.h"
#include "../common/soc_gpio.h"
/* Add include f... | /content/code_sandbox/soc/silabs/silabs_s2/efr32mg24/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 132 |
```unknown
# Silicon Labs EFR32MG24 (Mighty Gecko) MCU configuration options
if SOC_SERIES_EFR32MG24
config NUM_IRQS
# must be >= the highest interrupt number used
default 75
config PM
default n
select COUNTER
select UART_INTERRUPT_DRIVEN if SERIAL_SUPPORT_INTERRUPT
choice PM_POLICY
default PM_POLICY_DEFAULT... | /content/code_sandbox/soc/silabs/silabs_s2/efr32mg24/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 97 |
```unknown
# Silicon Labs EFR32MG24 (Mighty Gecko) MCU line
config SOC_SERIES_EFR32MG24
select ARM
select CPU_CORTEX_M33
select CPU_HAS_FPU
select CPU_HAS_ARM_MPU
select CPU_HAS_ARM_SAU
select CPU_CORTEX_M_HAS_DWT
select ARMV8_M_DSP
select ARM_TRUSTZONE_M
select SOC_GECKO_HAS_RADIO
select HAS_SILABS_GECKO
... | /content/code_sandbox/soc/silabs/silabs_s2/efr32mg24/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 166 |
```unknown
# Silicon Labs EFR32MG21 (Mighty Gecko) MCU line
config SOC_SERIES_EFR32MG21
bool
select SOC_FAMILY_SILABS_S2
help
EFR32MG21 Series MCU
config SOC_PART_NUMBER_EFR32MG21A020F1024IM32
bool
select SOC_SERIES_EFR32MG21
config SOC_SERIES
default "efr32mg21" if SOC_SERIES_EFR32MG21
config SOC
defaul... | /content/code_sandbox/soc/silabs/silabs_s2/efr32mg21/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 173 |
```objective-c
/*
*/
/** @file
* @brief Silabs EFR32MG21 MCU pin definitions.
*
* This file contains pin configuration data required by different MCU
* modules to correctly configure GPIO controller.
*/
#ifndef _SILABS_EFR32MG21_SOC_PINMAP_H_
#define _SILABS_EFR32MG21_SOC_PINMAP_H_
#include <em_gpio.h>
#ifdef... | /content/code_sandbox/soc/silabs/silabs_s2/efr32mg21/soc_pinmap.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 133 |
```objective-c
/*
*
*/
/**
* @file
* @brief Board configuration macros for the EFR32MG21 SoC
*
*/
#ifndef _SILABS_EFR32MG21_SOC_H
#define _SILABS_EFR32MG21_SOC_H
#include <zephyr/sys/util.h>
#ifndef _ASMLANGUAGE
#include <em_common.h>
#include "soc_pinmap.h"
#include "../common/soc_gpio.h"
#endif /* !_AS... | /content/code_sandbox/soc/silabs/silabs_s2/efr32mg21/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 112 |
```unknown
# Silicon Labs EFR32MG21 (Might Gecko) series configuration options
if SOC_SERIES_EFR32MG21
config NUM_IRQS
int
# must be >= the highest interrupt number used
default 61
config GPIO_GECKO
default y
depends on GPIO || LOG_BACKEND_SWO
endif # SOC_SERIES_EFR32MG21
``` | /content/code_sandbox/soc/silabs/silabs_s2/efr32mg21/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 80 |
```unknown
# Silicon Labs EFR32MG21 (Mighty Gecko) MCU line
config SOC_SERIES_EFR32MG21
select ARM
select CPU_CORTEX_M33
select CPU_CORTEX_M_HAS_DWT
select ARMV8_M_DSP
select CPU_HAS_FPU
select CPU_HAS_ARM_MPU
select CPU_HAS_ARM_SAU
select SOC_GECKO_HAS_RADIO
select HAS_SILABS_GECKO
select HAS_SWO
select S... | /content/code_sandbox/soc/silabs/silabs_s2/efr32mg21/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 151 |
```unknown
# Silicon Labs EFR32BG27 (Blue Gecko) MCU series
config SOC_SERIES_EFR32BG27
bool
select SOC_FAMILY_SILABS_S2
help
EFR32BG27 Series MCU
config SOC_PART_NUMBER_EFR32BG27C140F768IM40
bool
select SOC_SERIES_EFR32BG27
config SOC_SERIES
default "efr32bg27" if SOC_SERIES_EFR32BG27
config SOC
default... | /content/code_sandbox/soc/silabs/silabs_s2/efr32bg27/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 166 |
```objective-c
*/
/**
* @file
* @brief Register access macros for the EFR32BG27 SoC
*/
#ifndef EFR32BG27_SOC_H_
#define EFR32BG27_SOC_H_
#ifndef _ASMLANGUAGE
#include <em_common.h>
#include "../common/soc_gpio.h"
#endif /* _ASMLANGUAGE */
#endif /* EFR32BG27_SOC_H_ */
``` | /content/code_sandbox/soc/silabs/silabs_s2/efr32bg27/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 80 |
```unknown
# Silicon Labs EFR32BG27 (Blue Gecko) MCU configuration options
if SOC_SERIES_EFR32BG27
config NUM_IRQS
# must be >= the highest interrupt number used
default 66
config PM
select COUNTER
config GPIO_GECKO
default y
endif # SOC_SERIES_EFR32BG27
``` | /content/code_sandbox/soc/silabs/silabs_s2/efr32bg27/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 74 |
```unknown
# Silicon Labs EFR32BG27 (Blue Gecko) MCU series
config SOC_SERIES_EFR32BG27
select ARM
select ARMV8_M_DSP
select ARM_TRUSTZONE_M
select CPU_CORTEX_M33
select CPU_HAS_ARM_MPU
select CPU_HAS_ARM_SAU
select CPU_HAS_FPU
select HAS_SILABS_GECKO
select HAS_SWO
select SOC_GECKO_HAS_RADIO
select SOC_GE... | /content/code_sandbox/soc/silabs/silabs_s2/efr32bg27/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 147 |
```unknown
# Silicon Labs EFR32BG22 (Blue Gecko) MCU series
config SOC_SERIES_EFR32BG22
bool
select SOC_FAMILY_SILABS_S2
help
EFR32BG22P Series MCU
config SOC_PART_NUMBER_EFR32BG22C224F512IM40
bool
select SOC_SERIES_EFR32BG22
config SOC_SERIES
default "efr32bg22" if SOC_SERIES_EFR32BG22
config SOC
defaul... | /content/code_sandbox/soc/silabs/silabs_s2/efr32bg22/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 167 |
```objective-c
/*
*
*/
/**
* @file
* @brief Register access macros for the EFR32BG22 SoC
*
*/
#ifndef EFR32BG22_SOC_H_
#define EFR32BG22_SOC_H_
#ifndef _ASMLANGUAGE
#include <em_common.h>
#include "../common/soc_gpio.h"
#endif /* !_ASMLANGUAGE */
#endif /* EFR32BG22_SOC_H_ */
``` | /content/code_sandbox/soc/silabs/silabs_s2/efr32bg22/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 83 |
```unknown
# Silicon Labs EFR32BG22 (Blue Gecko) MCU configuration options
if SOC_SERIES_EFR32BG22
config NUM_IRQS
# must be >= the highest interrupt number used
default 60
config PM
select COUNTER
select UART_INTERRUPT_DRIVEN
config GPIO_GECKO
default y
endif # SOC_SERIES_EFR32BG22
``` | /content/code_sandbox/soc/silabs/silabs_s2/efr32bg22/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 80 |
```unknown
config SOC_FAMILY_ATMEL_SAM0
bool
config SOC_FAMILY
default "atmel_sam0" if SOC_FAMILY_ATMEL_SAM0
config SOC_SERIES_REVISION_N
bool
depends on SOC_FAMILY_ATMEL_SAM0
config SOC_SERIES_REVISION
string
default "n" if SOC_SERIES_REVISION_N
default ""
depends on SOC_FAMILY_ATMEL_SAM0
rsource "*/Kconf... | /content/code_sandbox/soc/atmel/sam0/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 102 |
```unknown
# Silicon Labs EFR32BG22 (Blue Gecko) MCU series
config SOC_SERIES_EFR32BG22
select ARM
select ARMV8_M_DSP
select ARM_TRUSTZONE_M
select CPU_CORTEX_M33
select CPU_HAS_ARM_MPU
select CPU_HAS_ARM_SAU
select CPU_HAS_FPU
select HAS_SILABS_GECKO
select HAS_SWO
select SOC_GECKO_HAS_RADIO
select SOC_GE... | /content/code_sandbox/soc/silabs/silabs_s2/efr32bg22/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 154 |
```unknown
# Atmel SAM0 MCU family default configuration options
if SOC_FAMILY_ATMEL_SAM0
rsource "*/Kconfig.defconfig"
config GPIO
default y
config HWINFO_SAM0
default HWINFO
config PINCTRL
default y
config SYS_CLOCK_HW_CYCLES_PER_SEC
default $(dt_node_int_prop_int,/cpus/cpu@0,clock-frequency)
if USB_DEVIC... | /content/code_sandbox/soc/atmel/sam0/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 118 |
```unknown
# Atmel SAM0 MCU family configuration options
config SOC_FAMILY_ATMEL_SAM0
select ASF
select HAS_SEGGER_RTT if ZEPHYR_SEGGER_MODULE
if SOC_FAMILY_ATMEL_SAM0
rsource "common/Kconfig.sam*"
rsource "*/Kconfig"
endif # SOC_FAMILY_ATMEL_SAM0
``` | /content/code_sandbox/soc/atmel/sam0/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 76 |
```unknown
# Atmel SAMC21 MCU series
config SOC_SERIES_SAMC21
bool
select SOC_FAMILY_ATMEL_SAM0
help
Enable support for Atmel SAMC21 Cortex-M0+ microcontrollers.
config SOC_SERIES
default "samc21" if SOC_SERIES_SAMC21
config SOC_SAMC21E15A
bool
select SOC_SERIES_SAMC21
config SOC_SAMC21E16A
bool
select ... | /content/code_sandbox/soc/atmel/sam0/samc21/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 728 |
```yaml
family:
- name: atmel_sam0
series:
- name: samc20
socs:
- name: samc20e15a
- name: samc20e16a
- name: samc20e17a
- name: samc20e18a
- name: samc20g15a
- name: samc20g16a
- name: samc20g17a
- name: samc20g18a
- name: samc20j15a
- name: samc20j16a
- name: samc20... | /content/code_sandbox/soc/atmel/sam0/soc.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,348 |
```unknown
# Atmel SAMC21 MCU series configuration options
if SOC_SERIES_SAMC21
config NUM_IRQS
default 32
endif # SOC_SERIES_SAMC21
``` | /content/code_sandbox/soc/atmel/sam0/samc21/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 40 |
```unknown
# Atmel SAMC21 MCU series
config SOC_SERIES_SAMC21
select ARM
select CPU_CORTEX_M0PLUS
select CPU_CORTEX_M_HAS_SYSTICK
select CPU_CORTEX_M_HAS_VTOR
select CPU_HAS_ARM_MPU
select PLATFORM_SPECIFIC_INIT
``` | /content/code_sandbox/soc/atmel/sam0/samc21/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 62 |
```objective-c
/*
*
*/
#ifndef _SOC_ATMEL_SAM0_SAMC21_SOC_H_
#define _SOC_ATMEL_SAM0_SAMC21_SOC_H_
#ifndef _ASMLANGUAGE
#define DONT_USE_CMSIS_INIT
#include <zephyr/types.h>
#if defined(CONFIG_SOC_SAMC21E15A)
#include <samc21e15a.h>
#elif defined(CONFIG_SOC_SAMC21E16A)
#include <samc21e16a.h>
#elif defined(CONFI... | /content/code_sandbox/soc/atmel/sam0/samc21/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 621 |
```objective-c
/*
*
*/
#ifdef MCLK_APBAMASK_TC0
#define MCLK_TC0 (&MCLK->APBAMASK.reg)
#define MCLK_TC0_MASK ((1 << MCLK_APBAMASK_TC0_Pos) | (1 << MCLK_APBAMASK_TC1_Pos))
#endif
#ifdef MCLK_APBBMASK_TC0
#define MCLK_TC0 (&MCLK->APBBMASK.reg)
#define MCLK_TC0_MASK ((1 << MCLK_APBBMASK_TC0_Pos) | (1 << MCLK_APBBMASK_T... | /content/code_sandbox/soc/atmel/sam0/common/tc_fixup_samd5x.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 908 |
```unknown
if SOC_SERIES_SAML21 || SOC_SERIES_SAMR34 || SOC_SERIES_SAMR35
config SOC_ATMEL_SAML_DEBUG_PAUSE
bool "Insert a pause at boot, to allow a debugger to attach"
default y
help
Issues have been observed while attempting to attach a debugger.
These can be mitigated by inserting a small delay during the... | /content/code_sandbox/soc/atmel/sam0/common/Kconfig.saml2x | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 760 |
```c
/*
*
*/
#include <zephyr/devicetree.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/init.h>
static int radio_off_setup(void)
{
int ret;
const struct gpio_dt_spec reset = GPIO_DT_SPEC_GET(DT_NODELABEL(lora), reset_gpios);
const struct gpio_dt_spec cs = GPIO_DT_SPEC_GET(DT_NODELABEL(sercom4), cs_gpios);
... | /content/code_sandbox/soc/atmel/sam0/common/soc_samr3x_radio_off.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 191 |
```c
/*
*/
/** @file
* @brief Atmel SAM0 MCU family I/O Pin Controller (PORT)
*/
#include <stdbool.h>
#include "soc_port.h"
int soc_port_pinmux_set(PortGroup *pg, uint32_t pin, uint32_t func)
{
bool is_odd = pin & 1;
int idx = pin / 2U;
/* Each pinmux register holds the config for two pins. The
* even num... | /content/code_sandbox/soc/atmel/sam0/common/soc_port.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 544 |
```objective-c
/*
*
*/
#ifndef _ATMEL_SAM_ADC_FIXUP_H_
#define _ATMEL_SAM_ADC_FIXUP_H_
#if defined(ADC_SYNCBUSY_MASK)
#define ADC_SYNC(adc) ((adc)->SYNCBUSY.reg)
#define ADC_SYNC_MASK (ADC_SYNCBUSY_MASK)
#elif defined(ADC_STATUS_SYNCBUSY)
#define ADC_SYNC(adc) ((adc)->STATUS.reg)
#define ADC_SYNC_MASK (ADC_STATUS_S... | /content/code_sandbox/soc/atmel/sam0/common/adc_fixup_sam0.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,485 |
```c
/*
*
*/
/**
* @file
* @brief Atmel SAMD MCU series initialization code
*/
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <zephyr/kernel.h>
#include <soc.h>
#define SAM0_DFLL_FREQ_HZ (48000000U)
#define SAM0_DPLL_FREQ_MIN_HZ (96000000U)
#define SAM0_DPLL_FREQ_MAX_HZ (200000000U)
#if CONFIG... | /content/code_sandbox/soc/atmel/sam0/common/soc_samd5x.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,212 |
```unknown
if SOC_SERIES_SAMD51 || SOC_SERIES_SAME51 || SOC_SERIES_SAME53 || SOC_SERIES_SAME54
config SOC_ATMEL_SAMD5X_XOSC32K
bool "The external 32 kHz crystal oscillator"
help
Say y to enable the external 32 kHZ crystal oscillator at
startup. This can then be selected as the main clock source
for the SO... | /content/code_sandbox/soc/atmel/sam0/common/Kconfig.samd5x | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 260 |
```objective-c
/*
*
*/
/** @file
* @brief Atmel SAM0 MCU family devicetree helper macros
*/
#ifndef _ATMEL_SAM0_DT_H_
#define _ATMEL_SAM0_DT_H_
/* Helper macro to get MCLK register address for corresponding
* that has corresponding clock enable bit.
*/
#define MCLK_MASK_DT_INT_REG_ADDR(n) \
(DT_REG_ADDR(DT_IN... | /content/code_sandbox/soc/atmel/sam0/common/atmel_sam0_dt.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 496 |
```c
/*
*
*/
/**
* @file
* @brief Atmel SAML MCU series initialization code
*/
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <zephyr/kernel.h>
#include <soc.h>
#include <cmsis_core.h>
/* the SAML21 currently operates only in Performance Level 2... sleep
* and low-power operation are not currentl... | /content/code_sandbox/soc/atmel/sam0/common/soc_saml2x.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,283 |
```c
/*
*
*/
/**
* @file
* @brief Atmel SAMC MCU series initialization code
*/
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <zephyr/kernel.h>
#include <soc.h>
static void flash_waitstates_init(void)
{
/* One wait state at 48 MHz. */
NVMCTRL->CTRLB.bit.RWS = NVMCTRL_CTRLB_RWS_HALF_Val;
}
stati... | /content/code_sandbox/soc/atmel/sam0/common/soc_samc2x.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 274 |
```objective-c
/*
*
*/
/**
* @file
* Atmel SAM SoC specific helpers for pinctrl driver
*/
#ifndef ZEPHYR_SOC_ARM_ATMEL_SAM_COMMON_PINCTRL_SOC_H_
#define ZEPHYR_SOC_ARM_ATMEL_SAM_COMMON_PINCTRL_SOC_H_
#include <zephyr/drivers/pinctrl/pinctrl_soc_sam_common.h>
#endif /* ZEPHYR_SOC_ARM_ATMEL_SAM_COMMON_PINCTRL_SO... | /content/code_sandbox/soc/atmel/sam0/common/pinctrl_soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 98 |
```objective-c
/*
*
*/
/*
* The following GMAC clock configuration fix-up symbols map to the applicable
* APB-specific symbols, in order to accommodate different SoC series with the
* GMAC core connected to different APBs.
*/
#ifdef MCLK_APBAMASK_GMAC
#define MCLK_GMAC (&MCLK->APBAMASK.reg)
#define MCLK_GMAC_MAS... | /content/code_sandbox/soc/atmel/sam0/common/gmac_fixup_samd5x.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 210 |
```c
/*
*
*/
#include <soc.h>
#include <zephyr/drivers/uart/cdc_acm.h>
#include <zephyr/drivers/usb/usb_dc.h>
#include <zephyr/init.h>
#include <zephyr/usb/class/usb_cdc.h>
/*
* Magic value that causes the bootloader to stay in bootloader mode instead of
* starting the application.
*/
#if CONFIG_BOOTLOADER_BOSSA... | /content/code_sandbox/soc/atmel/sam0/common/bossa.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 354 |
```unknown
if SOC_SERIES_SAMD20 || SOC_SERIES_SAMD21 || SOC_SERIES_SAMR21
config SOC_ATMEL_SAMD_NVM_WAIT_STATES
int "NVM wait states"
default 1
help
Wait states to set for NVM. Consult the datasheet as these are highly
dependent on the device operationg conditions.
config SOC_ATMEL_SAMD_OSC32K
bool "Intern... | /content/code_sandbox/soc/atmel/sam0/common/Kconfig.samd2x | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 763 |
```objective-c
/*
*/
/** @file
* @brief Atmel SAM0 MCU family I/O Pin Controller (PORT)
*/
#ifndef ATMEL_SAM0_SOC_PORT_H_
#define ATMEL_SAM0_SOC_PORT_H_
#include <soc.h>
/*
* Pin flags/attributes
*/
#define SOC_PORT_DEFAULT (0)
#define SOC_PORT_FLAGS_POS (0)
#define SOC_PORT_FLAGS_... | /content/code_sandbox/soc/atmel/sam0/common/soc_port.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,210 |
```objective-c
/*
*
*/
#ifdef MCLK_APBAMASK_SERCOM0
#define MCLK_SERCOM0 (&MCLK->APBAMASK.reg)
#define MCLK_SERCOM0_MASK (MCLK_APBAMASK_SERCOM0)
#endif
#ifdef MCLK_APBBMASK_SERCOM0
#define MCLK_SERCOM0 (&MCLK->APBBMASK.reg)
#define MCLK_SERCOM0_MASK (MCLK_APBBMASK_SERCOM0)
#endif
#ifdef MCLK_APBCMASK_SERCOM0
#define... | /content/code_sandbox/soc/atmel/sam0/common/sercom_fixup_samd5x.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,428 |
```c
/*
*
*/
/**
* @file
* @brief Atmel SAMD MCU series initialization code
*/
/* The CPU clock will be configured to the DT requested value,
* and run via DFLL48M.
*
* Reference -> GCLK Gen 1 -> DFLL48M -> GCLK Gen 0 -> GCLK_MAIN
*
* GCLK Gen 0 -> GCLK_MAIN
* GCLK Gen 1 -> DFLL48M (variable)
* GCLK Gen 2... | /content/code_sandbox/soc/atmel/sam0/common/soc_samd2x.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,387 |
```unknown
# Atmel SAMD20 MCU series
config SOC_SERIES_SAMD20
bool
select SOC_FAMILY_ATMEL_SAM0
help
Enable support for Atmel SAMD20 Cortex-M0+ microcontrollers.
config SOC_SERIES
default "samd20" if SOC_SERIES_SAMD20
config SOC_SAMD20E14
bool
select SOC_SERIES_SAMD20
config SOC_SAMD20E15
bool
select SO... | /content/code_sandbox/soc/atmel/sam0/samd20/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 646 |
```unknown
# Atmel SAMD20 MCU series configuration options
if SOC_SERIES_SAMD20
config NUM_IRQS
default 25
endif # SOC_SERIES_SAMD20
``` | /content/code_sandbox/soc/atmel/sam0/samd20/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 38 |
```unknown
# Atmel SAMD20 MCU series
config SOC_SERIES_SAMD20
select ARM
select CPU_CORTEX_M0PLUS
select CPU_CORTEX_M_HAS_SYSTICK
select CPU_CORTEX_M_HAS_VTOR
select PLATFORM_SPECIFIC_INIT
``` | /content/code_sandbox/soc/atmel/sam0/samd20/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 54 |
```unknown
# Atmel SAMD21 MCU series
config SOC_SERIES_SAMD21
bool
select SOC_FAMILY_ATMEL_SAM0
help
Enable support for Atmel SAMD21 Cortex-M0+ microcontrollers.
config SOC_SERIES
default "samd21" if SOC_SERIES_SAMD21
config SOC_SAMD21E15A
bool
select SOC_SERIES_SAMD21
config SOC_SAMD21E16A
bool
select ... | /content/code_sandbox/soc/atmel/sam0/samd21/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 607 |
```objective-c
/*
*
*/
#ifndef _SOC_ATMEL_SAM0_SAMD20_SOC_H_
#define _SOC_ATMEL_SAM0_SAMD20_SOC_H_
#ifndef _ASMLANGUAGE
#define DONT_USE_CMSIS_INIT
#include <zephyr/types.h>
#if defined(CONFIG_SOC_SAMD20E14)
#include <samd20e14.h>
#elif defined(CONFIG_SOC_SAMD20E15)
#include <samd20e15.h>
#elif defined(CONFIG_SO... | /content/code_sandbox/soc/atmel/sam0/samd20/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,377 |
```unknown
# Atmel SAMD21 MCU series configuration options
if SOC_SERIES_SAMD21
config NUM_IRQS
default 28
endif # SOC_SERIES_SAMD21
``` | /content/code_sandbox/soc/atmel/sam0/samd21/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 38 |
```unknown
# Atmel SAMD21 MCU series
config SOC_SERIES_SAMD21
select ARM
select CPU_CORTEX_M0PLUS
select CPU_CORTEX_M_HAS_SYSTICK
select CPU_CORTEX_M_HAS_VTOR
select PLATFORM_SPECIFIC_INIT
``` | /content/code_sandbox/soc/atmel/sam0/samd21/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 54 |
```unknown
# Atmel SAMD51 MCU series
config SOC_SERIES_SAMD51
bool
select SOC_FAMILY_ATMEL_SAM0
help
Enable support for Atmel SAMD51 Cortex-M4F microcontrollers.
config SOC_SERIES
default "samd51" if SOC_SERIES_SAMD51
config SOC_SAMD51G18A
bool
select SOC_SERIES_SAMD51
config SOC_SAMD51G19A
bool
select ... | /content/code_sandbox/soc/atmel/sam0/samd51/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 405 |
```objective-c
/*
*
*/
#ifndef _SOC_ATMEL_SAM0_SAMD21_SOC_H_
#define _SOC_ATMEL_SAM0_SAMD21_SOC_H_
#ifndef _ASMLANGUAGE
#define DONT_USE_CMSIS_INIT
#include <zephyr/types.h>
#if defined(CONFIG_SOC_SAMD21E15A)
#include <samd21e15a.h>
#elif defined(CONFIG_SOC_SAMD21E16A)
#include <samd21e16a.h>
#elif defined(CONFI... | /content/code_sandbox/soc/atmel/sam0/samd21/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,344 |
```unknown
# Atmel SAMD51 MCU series configuration options
if SOC_SERIES_SAMD51
config NUM_IRQS
int
default 137
config ROM_START_OFFSET
default 0x400 if BOOTLOADER_MCUBOOT
endif # SOC_SERIES_SAMD51
``` | /content/code_sandbox/soc/atmel/sam0/samd51/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 58 |
```unknown
# Atmel SAMD51 MCU series
config SOC_SERIES_SAMD51
select ARM
select CPU_CORTEX_M4
select CPU_CORTEX_M_HAS_DWT
select CPU_HAS_ARM_MPU
select CPU_HAS_FPU
select PLATFORM_SPECIFIC_INIT
``` | /content/code_sandbox/soc/atmel/sam0/samd51/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 56 |
```objective-c
/*
*
*/
#ifndef _SOC_ATMEL_SAM0_SAMD51_SOC_H_
#define _SOC_ATMEL_SAM0_SAMD51_SOC_H_
#ifndef _ASMLANGUAGE
#define DONT_USE_CMSIS_INIT
#include <zephyr/types.h>
#if defined(CONFIG_SOC_SAMD51G18A)
#include <samd51g18a.h>
#elif defined(CONFIG_SOC_SAMD51G19A)
#include <samd51g19a.h>
#elif defined(CONFI... | /content/code_sandbox/soc/atmel/sam0/samd51/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 467 |
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