text stringlengths 9 39.2M | dir stringlengths 25 226 | lang stringclasses 163 values | created_date timestamp[s] | updated_date timestamp[s] | repo_name stringclasses 751 values | repo_full_name stringclasses 752 values | star int64 1.01k 183k | len_tokens int64 1 18.5M |
|---|---|---|---|---|---|---|---|---|
```unknown
config BUILD_OUTPUT_BIN
default y if BOARD_RCAR_SPIDER_S4_R8A779F0_A55
``` | /content/code_sandbox/boards/renesas/rcar_spider_s4/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 26 |
```unknown
/*
*
*/
#include <dt-bindings/pinctrl/renesas/pinctrl-r8a779f0.h>
&pfc {
scif0_data_tx_default: scif0_data_tx_default {
pin = <PIN_RX0 FUNC_RX0>;
};
scif0_data_rx_default: scif0_data_rx_default {
pin = <PIN_TX0 FUNC_TX0>;
};
scif3_data_tx_default: scif3_data_tx_default {
pin = <PIN_HTX0 FUNC_TX3>;
};
scif3_data_rx_default: scif3_data_rx_default {
pin = <PIN_HRX0 FUNC_RX3>;
};
};
``` | /content/code_sandbox/boards/renesas/rcar_spider_s4/rcar_spider_s4_r8a779f0_r52-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 145 |
```unknown
/*
*
*/
#include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-r8a779f0.h>
&pfc {
hscif0_data_tx_default: hscif0_data_tx_default {
pin = <PIN_HTX0 FUNC_HTX0>;
};
hscif0_data_rx_default: hscif0_data_rx_default {
pin = <PIN_HRX0 FUNC_HRX0>;
};
mmc_clk: mmc_clk {
pin = <PIN_MMC_SD_CLK FUNC_MMC_SD_CLK>;
power-source = <PIN_VOLTAGE_1P8V>;
};
mmc_cmd: mmc_cmd {
pin = <PIN_MMC_SD_CMD FUNC_MMC_SD_CMD>;
power-source = <PIN_VOLTAGE_1P8V>;
};
mmc_data0: mmc_data0 {
pin = <PIN_MMC_SD_D0 FUNC_MMC_SD_D0>;
power-source = <PIN_VOLTAGE_1P8V>;
};
mmc_data1: mmc_data1 {
pin = <PIN_MMC_SD_D1 FUNC_MMC_SD_D1>;
power-source = <PIN_VOLTAGE_1P8V>;
};
mmc_data2: mmc_data2 {
pin = <PIN_MMC_SD_D2 FUNC_MMC_SD_D2>;
power-source = <PIN_VOLTAGE_1P8V>;
};
mmc_data3: mmc_data3 {
pin = <PIN_MMC_SD_D3 FUNC_MMC_SD_D3>;
power-source = <PIN_VOLTAGE_1P8V>;
};
mmc_data4: mmc_data4 {
pin = <PIN_MMC_D4 FUNC_MMC_D4>;
power-source = <PIN_VOLTAGE_1P8V>;
};
mmc_data5: mmc_data5 {
pin = <PIN_MMC_D5 FUNC_MMC_D5>;
power-source = <PIN_VOLTAGE_1P8V>;
};
mmc_data6: mmc_data6 {
pin = <PIN_MMC_D6 FUNC_MMC_D6>;
power-source = <PIN_VOLTAGE_1P8V>;
};
mmc_data7: mmc_data7 {
pin = <PIN_MMC_D7 FUNC_MMC_D7>;
power-source = <PIN_VOLTAGE_1P8V>;
};
mmc_ds: mmc_ds {
pin = <PIN_MMC_DS FUNC_MMC_DS>;
};
};
``` | /content/code_sandbox/boards/renesas/rcar_spider_s4/rcar_spider_s4_r8a779f0_a55-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 546 |
```ini
# Renesas R-Car Spider S4 Cortex-R52 Board Config
source [find interface/ftdi/olimex-arm-usb-ocd-h.cfg]
source [find target/renesas_rcar_reset_common.cfg]
set _CHIPNAME r8a779f0
set _CORE_NAME r52
set _TARGETNAME $_CHIPNAME.$_CORE_NAME
set _CTINAME $_TARGETNAME.cti
set _DAPNAME $_CHIPNAME.dap
set DAP_TAPID 0x5ba00477
set CR52_DBGBASE 0x80c10000
set CR52_CTIBASE 0x80c20000
adapter srst delay 1000
adapter speed 20000
global $_CHIPNAME
transport select jtag
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x01 -irmask 0x0f -expected-id $DAP_TAPID
dap create $_DAPNAME -chain-position $_CHIPNAME.cpu
cti create $_CTINAME -dap $_DAPNAME -ap-num 1 -baseaddr $CR52_CTIBASE
target create $_TARGETNAME armv8r -dap $_DAPNAME -ap-num 1 -dbgbase $CR52_DBGBASE -cti $_CTINAME
$_TARGETNAME configure -rtos auto
``` | /content/code_sandbox/boards/renesas/rcar_spider_s4/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 295 |
```restructuredtext
.. _rcar_spider_a55:
R-CAR Spider S4 (ARM64)
#######################
Overview
********
R-Car S4 enables to launch Car Server/CoGW with high performance, high-speed networking,
high security and high functional safety levels that are required as E/E architectures
evolve into domains and zones. The R-Car S4 solution allows designers to re-use up to 88
percent of software code developed for 3rd generation R-Car SoCs and RH850 MCU applications.
The software package supports the real-time cores with various drivers and basic software
such as Linux BSP and hypervisors.
Hardware
********
The R-Car S4 includes:
* eight 1.2GHz Arm Cortex-A55 cores, 2 cores x 4 clusters;
* 1.0 GHz Arm Cortex-R52 core (hardware Lock step is supported);
* two 400MHz G4MH cores (hardware Lock step is supported);
* memory controller for LPDDR4X-3200 with 32bit bus (16bit x 1ch + 16bit x 1ch) with ECC;
* SD card host interface / eMMC;
* UFS 3.0 x 1 channel;
* PCI Express Gen4.0 interface (Dual lane x 2ch);
* ICUMX;
* ICUMH;
* SHIP-S x 3 channels;
* AES Accerator x 8 channels;
* CAN FD interface x 16 channels;
* R-Switch2 (Ether);
* 100base EtherAVB x 1 channel;
* Gbit-EtherTSN x 3 channels;
* 1 unit FlexRay (A,B 2ch) interface.
Supported Features
==================
The Renesas ``rcar_spider_s4/r8a779f0/a55`` board configuration supports the following
hardware features:
+-----------+------------------------------+--------------------------------+
| Interface | Driver/components | Support level |
+===========+==============================+================================+
| PINCTRL | pinctrl | |
+-----------+------------------------------+--------------------------------+
| CLOCK | clock_control | |
+-----------+------------------------------+--------------------------------+
| UART | serial | interrupt-driven/polling |
+-----------+------------------------------+--------------------------------+
Other hardware features have not been enabled yet for this board.
Programming and Debugging
*************************
The onboard flash is not supported by Zephyr at this time. However, it is possible to
load the Zephyr binary using U-Boot commands.
One of the ways to load Zephyr is shown below.
.. code-block:: console
tftp 0x48000000 <tftp_server_path/zephyr.bin>
booti 0x48000000
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: rcar_spider_s4/r8a779f0/a55
:goals: build
References
**********
- `Renesas R-Car Development Support website`_
- `eLinux Spider page`_
.. _Renesas R-Car Development Support website:
path_to_url
.. _eLinux Spider page:
path_to_url
``` | /content/code_sandbox/boards/renesas/rcar_spider_s4/doc/rcar_spider_a55.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 685 |
```cmake
board_runner_args(jlink "--device=R7FA6M4AF")
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/renesas/ek_ra6m4/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 33 |
```unknown
/*
*/
&pinctrl {
sci0_default: sci0_default {
group1 {
/* tx rx */
psels = <RA_PSEL(RA_PSEL_SCI_0, 4, 11)>,
<RA_PSEL(RA_PSEL_SCI_0, 4, 10)>;
};
};
};
``` | /content/code_sandbox/boards/renesas/ek_ra6m4/ek_ra6m4-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 78 |
```unknown
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=200000000
# Enable GPIO
CONFIG_GPIO=y
CONFIG_PINCTRL=y
# Enable Console
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_BUILD_OUTPUT_HEX=y
CONFIG_BUILD_NO_GAP_FILL=y
CONFIG_CLOCK_CONTROL=y
``` | /content/code_sandbox/boards/renesas/ek_ra6m4/ek_ra6m4_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 71 |
```yaml
identifier: ek_ra6m4
name: Renesas EK-RA6M4
type: mcu
arch: arm
ram: 256
flash: 1024
toolchain:
- zephyr
- gnuarmemb
supported:
- gpio
``` | /content/code_sandbox/boards/renesas/ek_ra6m4/ek_ra6m4.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 63 |
```yaml
board:
name: ek_ra6m4
vendor: renesas
socs:
- name: r7fa6m4af3cfb
``` | /content/code_sandbox/boards/renesas/ek_ra6m4/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 38 |
```unknown
/*
*/
/dts-v1/;
#include <renesas/ra/ra6/r7fa6m4af3cfb.dtsi>
#include <dt-bindings/gpio/gpio.h>
#include "ek_ra6m4-pinctrl.dtsi"
/ {
model = "Renesas EK-RA6M4";
compatible = "renesas,ra6m4", "renesas,ra";
chosen {
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
};
leds {
compatible = "gpio-leds";
led1: led1 {
gpios = <&ioport4 15 GPIO_ACTIVE_HIGH>;
label = "LED1";
};
led2: led2 {
gpios = <&ioport4 4 GPIO_ACTIVE_HIGH>;
label = "LED2";
};
led3: led3 {
gpios = <&ioport4 0 GPIO_ACTIVE_HIGH>;
label = "LED3";
};
};
aliases {
led0 = &led1;
};
};
&sci0 {
pinctrl-0 = <&sci0_default>;
pinctrl-names = "default";
status = "okay";
uart0: uart {
current-speed = <115200>;
status = "okay";
};
};
&ioport4 {
status = "okay";
};
&xtal {
clock-frequency = <DT_FREQ_M(24)>;
mosel = <0>;
#clock-cells = <0>;
status = "okay";
};
&subclk {
status = "okay";
};
&pll {
source = <RA_PLL_SOURCE_MAIN_OSC>;
div = <RA_PLL_DIV_3>;
mul = <25 0>;
status = "okay";
};
&pclka {
clk_src = <RA_CLOCK_SOURCE_PLL>;
clk_div = <RA_SYS_CLOCK_DIV_2>;
status = "okay";
};
``` | /content/code_sandbox/boards/renesas/ek_ra6m4/ek_ra6m4.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 450 |
```unknown
config BOARD_EK_RA6M4
select SOC_R7FA6M4AF3CFB
``` | /content/code_sandbox/boards/renesas/ek_ra6m4/Kconfig.ek_ra6m4 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 24 |
```restructuredtext
.. _rcar_spider_boards:
Renesas R-Car Spider
####################
Overview
********
| R-Car S4 enables the launch of Car Server/CoGW with high performance, high-speed networking,
| high security and high functional safety levels that are required as E/E architectures
| evolve into domains and zones.
| The R-Car S4 solution allows designers to re-use up to 88 percent of software code developed
| for 3rd generation R-Car SoCs and RH850 MCU applications.\
| The software package supports the real-time cores with various drivers and basic software
| such as Linux BSP and hypervisors.
The Renesas R-Car Spider board is the Renesas R-Car S4 reference board and is designed for
evaluating features and performance of this SoC.
.. figure:: img/rcar_s4_spider_full.jpg
:align: center
:alt: R-Car S4 Spider
More information about the board can be found at `Renesas R-Car S4 Spider`_ website.
Hardware
********
Hardware capabilities for the S4 Spider board can be found on the `eLinux S4 Spider`_ page.
.. figure:: img/rcar_s4_block_diagram.jpg
:align: center
:alt: R-Car S4 Spider block diagram
.. note:: We support Zephyr running on the CR52 processor that is provided for RTOS purpose.
More information about the SoC that equips the board can be found here:
- `Renesas R-Car S4 chip`_
Supported Features
==================
Here are the current supported features when running Zephyr Project on the R-Car S4 Spider CR52:
+-----------+------------------------------+--------------------------------+
| Interface | Driver/components | Support level |
+===========+==============================+================================+
| PINMUX | pinmux | |
+-----------+------------------------------+--------------------------------+
| CLOCK | clock_control | |
+-----------+------------------------------+--------------------------------+
| GPIO | gpio | |
+-----------+------------------------------+--------------------------------+
| UART | uart | serial port-polling |
+ + + +
| | FT232RQ | serial port-interrupt |
+-----------+------------------------------+--------------------------------+
| I2C | i2c | interrupt driven |
+-----------+------------------------------+--------------------------------+
| PWM | pwm | All channels |
+-----------+------------------------------+--------------------------------+
It is also currently possible to write on the ram console.
More features will be supported soon.
Connections and IOs
===================
| The "Spider board" consists of a CPU board and a Breakout board.
| The CPU board is stuck on top of the Breakout board.
Here are the official IOs figures from eLinux for S4 board:
`S4 Spider CPU board IOs`_
`S4 Spider breakout board IOs`_
GPIO
----
By running Zephyr on S4 Spider, the software controllable LED 'LED8' can be used as output.
UART
----
Here is information about both serial ports provided on the S4 Spider board :
+--------------------+----------+--------------------+-------------+------------------------+
| Physical Interface | Location | Software Interface | Converter | Further Information |
+====================+==========+====================+=============+========================+
| CN20 USB Port | CPU Board| SCIF0/HSCIF1 | FT232HQ | Default Zephyr serial |
+--------------------+----------+--------------------+-------------+------------------------+
| CN21 USB Port | CPU Board| SCIF3/HSCIF0 | FT2232H-56Q | Used by U-BOOT & Linux |
+--------------------+----------+--------------------+-------------+------------------------+
.. note::
The Zephyr console output is assigned to SCIF0 (CN20 USB Port) with settings:
115200 8N1 without hardware flow control by default.
I2C
---
I2C is mainly used to manage and power-on some onboard chips on the S4 Spider board.
Embedded I2C devices and I/O expanders are not yet supported.
The current I2C support therefore does not make any devices available to the user at this time.
Programming and Debugging
*************************
Build and flash applications as usual (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Supported Debug Probe
=====================
| The "Olimex ARM-USB-OCD-H" probe is the only officially supported probe.
| This probe is supported by OpenOCD that is shipped with the Zephyr SDK.
The "Olimex ARM-USB-OCD-H" probe needs to be connected with a "Coresight 20 pins"
adapter to CN1 connector on Spider board.
Configuring a Console
=====================
Connect a USB cable from your PC to CN20 USB port of your Spider board.
Use the following settings with your serial terminal of choice (minicom, putty,
etc.):
- Speed: 115200
- Data: 8 bits
- Parity: None
- Stop bits: 1
Flashing
========
First of all, open your serial terminal.
Applications for the ``rcar_spider_s4/r8a779f0/r52`` board configuration can be built in the
usual way (see :ref:`build_an_application` for more details).
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: rcar_spider_s4/r8a779f0/r52
:goals: flash
You should see the following message in the terminal:
.. code-block:: console
*** Booting Zephyr OS build v3.3.0-rc2 ***
Hello World! rcar_spider_s4
Debugging
=========
First of all, open your serial terminal.
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: rcar_spider_s4/r8a779f0/r52
:goals: debug
You will then get access to a GDB session for debugging.
By continuing the app, you should see the following message in the terminal:
.. code-block:: console
*** Booting Zephyr OS build v3.3.0-rc2 ***
Hello World! rcar_spider_s4
References
**********
- `Renesas R-Car S4 Spider`_
- `Renesas R-Car S4 chip`_
- `eLinux S4 Spider`_
.. _Renesas R-Car S4 Spider:
path_to_url
.. _Renesas R-Car S4 chip:
path_to_url
.. _eLinux S4 Spider:
path_to_url
.. _S4 Spider CPU board IOs:
path_to_url
.. _S4 Spider breakout board IOs:
path_to_url
``` | /content/code_sandbox/boards/renesas/rcar_spider_s4/doc/rcar_spider_r52.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,483 |
```restructuredtext
.. _boards-particle:
Particle Industries
###################
.. toctree::
:maxdepth: 1
:glob:
**/*
``` | /content/code_sandbox/boards/particle/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```unknown
/*
*/
&pinctrl {
uart1_default: uart1_default {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 5)>,
<NRF_PSEL(UART_RX, 1, 4)>,
<NRF_PSEL(UART_RTS, 1, 7)>,
<NRF_PSEL(UART_CTS, 1, 6)>;
};
};
uart1_sleep: uart1_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 5)>,
<NRF_PSEL(UART_RX, 1, 4)>,
<NRF_PSEL(UART_RTS, 1, 7)>,
<NRF_PSEL(UART_CTS, 1, 6)>;
low-power-enable;
};
};
};
``` | /content/code_sandbox/boards/particle/argon/particle_argon-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 196 |
```cmake
#
#
board_runner_args(pyocd "--target=nrf52840" "--frequency=4000000")
board_runner_args(nrfjprog "--softreset")
board_runner_args(jlink "--device=nRF52840_xxAA" "--speed=4000")
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/particle/argon/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 105 |
```unknown
/*
*
*/
/dts-v1/;
#include <nordic/nrf52840_qiaa.dtsi>
#include "mesh_feather.dtsi"
#include "particle_argon-pinctrl.dtsi"
/ {
model = "Particle Argon";
compatible = "particle,argon", "particle,feather";
sky13351: sky13351 {
compatible = "skyworks,sky13351";
vctl1-gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
vctl2-gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
};
vbatt {
compatible = "voltage-divider";
io-channels = <&adc 3>;
output-ohms = <2100000>;
full-ohms = <(2100000 + 806000)>;
};
aliases {
watchdog0 = &wdt0;
};
};
®1 {
regulator-initial-mode = <NRF5X_REG_MODE_DCDC>;
};
&uicr {
gpio-as-nreset;
};
&uart1 { /* ESP32 */
compatible = "nordic,nrf-uarte";
current-speed = <921600>;
status = "okay";
pinctrl-0 = <&uart1_default>;
pinctrl-1 = <&uart1_sleep>;
pinctrl-names = "default", "sleep";
};
``` | /content/code_sandbox/boards/particle/argon/particle_argon.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 296 |
```unknown
#
#
# Enable MPU
CONFIG_ARM_MPU=y
# enable GPIO
CONFIG_GPIO=y
# enable uart driver
CONFIG_SERIAL=y
# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
``` | /content/code_sandbox/boards/particle/argon/particle_argon_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 43 |
```restructuredtext
.. _ek_ra6m4:
RA6M4 Evaluation Kit
####################
Overview
********
The Renesas RA6M4 group uses the high-performance Arm Cortex-M33
core with TrustZone. Secure element functionality providing better
performance, unlimited secure key storage, key management, and lower
BOM cost, as well as the integrated Ethernet MAC with individual DMA
ensures high data throughput. The RA6M4 is suitable for IoT applications
requiring Ethernet, future proof security, large embedded RAM, and low
active power consumption down to 99uA/MHz running the CoreMark
algorithm from Flash.
The key features of the EK-RA6M4 board are categorized in three groups as follow:
**MCU Native Pin Access**
- 200MHz Arm Cortex-M33 based RA6M4 MCU in 144 pins, LQFP package
- Native pin access through 4 x 40-pin male headers
- MCU current measurement points for precision current consumption measurement
- Multiple clock sources - RA6M4 MCU oscillator and sub-clock oscillator crystals,
providing precision 24.000 MHz and 32,768 Hz reference clock.
Additional low precision clocks are avaialbe internal to the RA6M4 MCU
**System Control and Ecosystem Access**
- USB Full Speed Host and Device (micro-AB connector)
- Three 5 V input sources
- USB (Debug, Full Speed)
- External power supply (using surface mount clamp test points and power input vias)
- Three Debug modes
- Debug on-board (SWD)
- Debug in (ETM, SWD and JTAG)
- Debug out (SWD)
- User LEDs and buttons
- Three User LEDs (red, blue, green)
- Power LED (white) indicating availability of regulated power
- Debug LED (yellow) indicating the debug connection
- Two User buttons
- One Reset button
- Five most popular ecosystems expansions
- Two Seeed Grove system (I2C/Analog) connectors
- One SparkFun Qwiic connector
- Two Digilent Pmod (SPI and UART) connectors
- Arduino (Uno R3) connector
- MikroElektronika mikroBUS connector
- MCU boot configuration jumper
**Special Feature Access**
- Ethernet (RJ45 RMII interface)
- 32 Mb (256 Mb) External Quad-SPI Flash
- 64 Mb (512 Mb) External Octo-SPI Flash
.. figure:: ek-ra6m4-board.webp
:align: center
:alt: RA6M4 Evaluation Kit
EK-RA6M4 Board Functional Area Definitions (Credit: Renesas Electronics Corporation)
Hardware
********
Detailed hardware feature for the RA6M4 MCU group can be found at `RA6M4 Group User's Manual Hardware`_
.. figure:: ra6m4-block-diagram.webp
:width: 442px
:align: center
:alt: RA6M4 MCU group feature
RA6M4 Block diagram (Credit: Renesas Electronics Corporation)
Detailed hardware feature for the EK-RA6M4 MCU can be found at `EK-RA6M4 - User's Manual`_
Supported Features
==================
The below features are currently supported on Zephyr OS for EK-RA6M4 board:
+-----------+------------+----------------------+
| Interface | Controller | Driver/Component |
+===========+============+======================+
| GPIO | on-chip | gpio |
+-----------+------------+----------------------+
| MPU | on-chip | arch/arm |
+-----------+------------+----------------------+
| NVIC | on-chip | arch/arm |
+-----------+------------+----------------------+
| UART | on-chip | serial |
+-----------+------------+----------------------+
| CLOCK | on-chip | clock control |
+-----------+------------+----------------------+
Other hardware features are currently not supported by the port.
Programming and Debugging
*************************
Applications for the ``ek_ra6m4`` board target configuration can be
built, flashed, and debugged in the usual way. See
:ref:`build_an_application` and :ref:`application_run` for more details on
building and running.
Flashing
========
Program can be flashed to EK-RA6M4 via the on-board SEGGER J-Link debugger.
SEGGER J-link's drivers are avaialbe at path_to_url
To flash the program to board
1. Connect to J-Link OB via USB port to host PC
2. Make sure J-Link OB jumper is in default configuration as describe in `EK-RA6M4 - User's Manual`_
3. Execute west command
.. code-block:: console
west flash -r jlink
Debugging
=========
You can use Segger Ozone (`Segger Ozone Download`_) for a visual debug interface
Once downloaded and installed, open Segger Ozone and configure the debug project
like so:
* Target Device: R7FA6M4AF
* Target Interface: SWD
* Target Interface Speed: 4 MHz
* Host Interface: USB
* Program File: <path/to/your/build/zephyr.elf>
**Note:** It's verified that we can debug OK on Segger Ozone v3.30d so please use this or later
version of Segger Ozone
References
**********
- `EK-RA6M4 Website`_
- `RA6M4 MCU group Website`_
.. _EK-RA6M4 Website:
path_to_url
.. _RA6M4 MCU group Website:
path_to_url
.. _EK-RA6M4 - User's Manual:
path_to_url
.. _RA6M4 Group User's Manual Hardware:
path_to_url
.. _Segger Ozone Download:
path_to_url#Ozone
``` | /content/code_sandbox/boards/renesas/ek_ra6m4/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,276 |
```cmake
# Suppress "unique_unit_address_if_enabled" to handle the following overlaps:
# - power@40000000 & clock@40000000 & bprot@40000000
# - acl@4001e000 & flash-controller@4001e000
list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled")
``` | /content/code_sandbox/boards/particle/argon/pre_dt_board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 72 |
```yaml
identifier: particle_argon
name: Particle Argon
type: mcu
arch: arm
ram: 512
flash: 1024
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- i2c
- spi
- gpio
- usb_device
- ble
- feather_serial
- feather_i2c
- feather_spi
vendor: particle
``` | /content/code_sandbox/boards/particle/argon/particle_argon.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 100 |
```yaml
board:
name: particle_argon
vendor: particle
socs:
- name: nrf52840
``` | /content/code_sandbox/boards/particle/argon/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 28 |
```unknown
# Particle Argon configuration
config BOARD_PARTICLE_ARGON
select SOC_NRF52840_QIAA
``` | /content/code_sandbox/boards/particle/argon/Kconfig.particle_argon | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 24 |
```c
/*
*
*/
#include <zephyr/init.h>
#include <zephyr/drivers/gpio.h>
#define SKY_UFLn_GPIO_SPEC GPIO_DT_SPEC_GET(DT_NODELABEL(sky13351), vctl1_gpios)
#define SKY_PCBn_GPIO_SPEC GPIO_DT_SPEC_GET(DT_NODELABEL(sky13351), vctl2_gpios)
static inline void external_antenna(bool on)
{
struct gpio_dt_spec ufl_gpio = SKY_UFLn_GPIO_SPEC;
struct gpio_dt_spec pcb_gpio = SKY_PCBn_GPIO_SPEC;
if (!gpio_is_ready_dt(&ufl_gpio)) {
return;
}
if (!gpio_is_ready_dt(&pcb_gpio)) {
return;
}
gpio_pin_configure_dt(&ufl_gpio, (on ? GPIO_OUTPUT_ACTIVE : GPIO_OUTPUT_INACTIVE));
gpio_pin_configure_dt(&pcb_gpio, (on ? GPIO_OUTPUT_INACTIVE : GPIO_OUTPUT_ACTIVE));
}
static int board_particle_argon_init(void)
{
/*
* On power-up the SKY13351 is left uncontrolled, so neither
* PCB nor external antenna is selected. Select the PCB
* antenna.
*/
external_antenna(false);
return 0;
}
/* needs to be done after GPIO driver init, which is at
* POST_KERNEL:KERNEL_INIT_PRIORITY_DEFAULT.
*/
SYS_INIT(board_particle_argon_init, POST_KERNEL, 99);
``` | /content/code_sandbox/boards/particle/argon/board.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 290 |
```unknown
# Particle Argon board configuration
if BOARD_PARTICLE_ARGON
config BT_CTLR
default BT
endif # BOARD_PARTICLE_ARGON
``` | /content/code_sandbox/boards/particle/argon/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 31 |
```unknown
/*
*
*/
/* Add SPI support on Particle Mesh via nRF52840 SPI1
*
* NOTE: This file is replicated in particle_{argon,xenon}.
* Changes should be made in all instances. */
&pinctrl {
spi1_default: spi1_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 1, 15)>,
<NRF_PSEL(SPIM_MOSI, 1, 13)>,
<NRF_PSEL(SPIM_MISO, 1, 14)>;
};
};
spi1_sleep: spi1_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 1, 15)>,
<NRF_PSEL(SPIM_MOSI, 1, 13)>,
<NRF_PSEL(SPIM_MISO, 1, 14)>;
low-power-enable;
};
};
};
feather_spi: &spi1 { /* feather SPI */
compatible = "nordic,nrf-spim";
status = "okay";
pinctrl-0 = <&spi1_default>;
pinctrl-1 = <&spi1_sleep>;
pinctrl-names = "default", "sleep";
cs-gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
};
``` | /content/code_sandbox/boards/particle/argon/dts/mesh_feather_spi_spi1.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 287 |
```unknown
/*
*/
&pinctrl {
i2c0_default: i2c0_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
<NRF_PSEL(TWIM_SCL, 0, 27)>;
};
};
i2c0_sleep: i2c0_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
<NRF_PSEL(TWIM_SCL, 0, 27)>;
low-power-enable;
};
};
spi2_default: spi2_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 19)>,
<NRF_PSEL(SPIM_MOSI, 0, 20)>,
<NRF_PSEL(SPIM_MISO, 0, 21)>;
};
};
spi2_sleep: spi2_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 19)>,
<NRF_PSEL(SPIM_MOSI, 0, 20)>,
<NRF_PSEL(SPIM_MISO, 0, 21)>;
low-power-enable;
};
};
uart0_default: uart0_default {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 6)>,
<NRF_PSEL(UART_RX, 0, 8)>;
};
};
uart0_sleep: uart0_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 6)>,
<NRF_PSEL(UART_RX, 0, 8)>;
low-power-enable;
};
};
};
``` | /content/code_sandbox/boards/particle/argon/dts/mesh_feather-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 410 |
```unknown
/*
*
*/
/* Add I2C1 support on Particle Mesh via nRF52840 TWI1
*
* NOTE: This file is replicated in particle_{argon,xenon}.
* Changes should be made in all instances. */
&pinctrl {
i2c1_default: i2c1_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 1, 1)>,
<NRF_PSEL(TWIM_SCL, 1, 2)>;
};
};
i2c1_sleep: i2c1_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 1, 1)>,
<NRF_PSEL(TWIM_SCL, 1, 2)>;
low-power-enable;
};
};
};
&i2c1 { /* feather I2C1 */
status = "okay";
pinctrl-0 = <&i2c1_default>;
pinctrl-1 = <&i2c1_sleep>;
pinctrl-names = "default", "sleep";
};
``` | /content/code_sandbox/boards/particle/argon/dts/mesh_feather_i2c1_twi1.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 240 |
```unknown
/*
*
*/
/* Add SPI1 support on Particle Mesh via nRF52840 SPI3
*
* NOTE: This file is replicated in particle_{argon,boron,xenon}.
* Changes should be made in all instances. */
&pinctrl {
spi3_default: spi3_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 1, 1)>,
<NRF_PSEL(SPIM_MOSI, 1, 2)>,
<NRF_PSEL(SPIM_MISO, 1, 8)>;
};
};
spi3_sleep: spi3_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 1, 1)>,
<NRF_PSEL(SPIM_MOSI, 1, 2)>,
<NRF_PSEL(SPIM_MISO, 1, 8)>;
low-power-enable;
};
};
};
&spi3 { /* feather SPI */
compatible = "nordic,nrf-spim";
status = "okay";
pinctrl-0 = <&spi3_default>;
pinctrl-1 = <&spi3_sleep>;
pinctrl-names = "default", "sleep";
};
``` | /content/code_sandbox/boards/particle/argon/dts/mesh_feather_spi1_spi3.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 272 |
```unknown
/*
*
*/
/* Add SPI support on Particle Mesh via nRF52840 SPI3
*
* NOTE: This file is replicated in particle_{argon,boron,xenon}.
* Changes should be made in all instances. */
&pinctrl {
spi3_default: spi3_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 1, 15)>,
<NRF_PSEL(SPIM_MOSI, 1, 13)>,
<NRF_PSEL(SPIM_MISO, 1, 14)>;
};
};
spi3_sleep: spi3_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 1, 15)>,
<NRF_PSEL(SPIM_MOSI, 1, 13)>,
<NRF_PSEL(SPIM_MISO, 1, 14)>;
low-power-enable;
};
};
};
feather_spi: &spi3 { /* feather SPI */
compatible = "nordic,nrf-spim";
status = "okay";
pinctrl-0 = <&spi3_default>;
pinctrl-1 = <&spi3_sleep>;
pinctrl-names = "default", "sleep";
cs-gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
};
``` | /content/code_sandbox/boards/particle/argon/dts/mesh_feather_spi_spi3.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 289 |
```unknown
/*
*
*/
/* Add hardware flow control to UART1 on Feather-based mesh boards
*
* NOTE: This file is replicated in particle_{argon,boron,xenon}.
* Changes should be made in all instances. */
&pinctrl {
uart0_default_alt: uart0_default_alt {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 6)>,
<NRF_PSEL(UART_RX, 0, 8)>,
<NRF_PSEL(UART_RTS, 1, 1)>,
<NRF_PSEL(UART_CTS, 1, 2)>;
};
};
uart0_sleep_alt: uart0_sleep_alt {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 6)>,
<NRF_PSEL(UART_RX, 0, 8)>,
<NRF_PSEL(UART_RTS, 1, 1)>,
<NRF_PSEL(UART_CTS, 1, 2)>;
low-power-enable;
};
};
};
&uart0 {
pinctrl-0 = <&uart0_default_alt>;
pinctrl-1 = <&uart0_sleep_alt>;
pinctrl-names = "default", "sleep";
};
``` | /content/code_sandbox/boards/particle/argon/dts/mesh_feather_uart1_rtscts.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 285 |
```unknown
/*
*
*/
/* Assignments common to all Feather-based Particle mesh boards.
*
* NOTE: This file is replicated in particle_{argon,boron,xenon}.
* Changes should be made in all instances. */
#include "mesh_feather-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
aliases {
led0 = &user_led;
led1 = &status_red;
led2 = &status_green;
led3 = &status_blue;
sw0 = &mode_button;
sw1 = &reset_button;
};
chosen {
zephyr,console = &uart0;
zephyr,uart-mcumgr = &uart0;
zephyr,shell-uart = &uart0;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,ieee802154 = &ieee802154;
};
leds {
compatible = "gpio-leds";
user_led: led_0 {
gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
label = "User LED";
};
status_red: led_1 {
gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
label = "Red LED";
};
status_green: led_2 {
gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
label = "Green LED";
};
status_blue: led_3 {
gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
label = "Blue LED";
};
};
gpio_keys {
compatible = "gpio-keys";
mode_button: button_0 {
gpios = <&gpio0 11 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "Mode Button";
zephyr,code = <INPUT_BTN_MODE>;
};
reset_button: button_1 {
gpios = <&gpio0 18 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "Reset Button";
zephyr,code = <INPUT_KEY_0>;
};
};
mesh_header: connector {
compatible = "particle-gen3-header";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpio0 26 0>, /* SDA */
<1 0 &gpio0 27 0>, /* SCL */
<2 0 &gpio1 1 0>, /* PWM3 */
<3 0 &gpio1 2 0>, /* PWM3 */
<4 0 &gpio1 8 0>, /* PWM1 */
<5 0 &gpio1 10 0>, /* PWM1 */
<6 0 &gpio1 11 0>, /* PWM1 */
<7 0 &gpio1 12 0>, /* PWM0 */
<8 0 &gpio1 3 0>, /* PWM1 */
<9 0 &gpio0 6 0>, /* TX */
<10 0 &gpio0 8 0>, /* RX */
<11 0 &gpio1 14 0>, /* MISO */
<12 0 &gpio1 13 0>, /* MOSI */
<13 0 &gpio1 15 0>, /* SCK */
<14 0 &gpio0 31 0>, /* SS */
<15 0 &gpio0 30 0>, /* ADC4 = AIN6 */
<16 0 &gpio0 29 0>, /* ADC3 = AIN5 */
<17 0 &gpio0 28 0>, /* ADC2 = AIN4 */
<18 0 &gpio0 4 0>, /* ADC1 = AIN2 */
<19 0 &gpio0 3 0>, /* ADC0 = AIN1 */
<20 0 &gpio0 11 0>, /* MODEn */
<21 0 &gpio0 18 0>; /* RESETn */
};
feather_header: feather_connector {
compatible = "adafruit-feather-header";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <12 0 &gpio0 26 0>, /* SDA */
<13 0 &gpio0 27 0>, /* SCL */
<14 0 &gpio1 1 0>, /* PWM3 */
<15 0 &gpio1 2 0>, /* PWM3 */
<16 0 &gpio1 8 0>, /* PWM1 */
<17 0 &gpio1 10 0>, /* PWM1 */
<18 0 &gpio1 11 0>, /* PWM1 */
<19 0 &gpio1 12 0>, /* PWM0 */
<20 0 &gpio1 3 0>, /* PWM1 */
/* 11 not connected */
<10 0 &gpio0 6 0>, /* TX */
<9 0 &gpio0 8 0>, /* RX */
<8 0 &gpio1 14 0>, /* MISO */
<7 0 &gpio1 13 0>, /* MOSI */
<6 0 &gpio1 15 0>, /* SCK */
<5 0 &gpio0 31 0>, /* SS */
<4 0 &gpio0 30 0>, /* ADC4 = AIN6 */
<3 0 &gpio0 29 0>, /* ADC3 = AIN5 */
<2 0 &gpio0 28 0>, /* ADC2 = AIN4 */
<1 0 &gpio0 4 0>, /* ADC1 = AIN2 */
<0 0 &gpio0 3 0>; /* ADC0 = AIN1 */
};
};
feather_adc: &adc { /* feather ADC */
status = "okay";
};
&ieee802154 {
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 0x0000C000>;
};
slot0_partition: partition@c000 {
label = "image-0";
reg = <0x0000C000 0x00067000>;
};
slot1_partition: partition@73000 {
label = "image-1";
reg = <0x00073000 0x00067000>;
};
scratch_partition: partition@da000 {
label = "image-scratch";
reg = <0x000da000 0x0001e000>;
};
/*
* The flash starting at 0x000f8000 and ending at
* 0x000fffff is reserved for use by the application.
*/
/*
* Storage partition will be used by FCB/LittleFS/NVS
* if enabled.
*/
storage_partition: partition@f8000 {
label = "storage";
reg = <0x000f8000 0x00008000>;
};
};
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&gpiote {
status = "okay";
};
arduino_i2c: &i2c0 { /* feather I2C */
compatible = "nordic,nrf-twi";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
pinctrl-0 = <&i2c0_default>;
pinctrl-1 = <&i2c0_sleep>;
pinctrl-names = "default", "sleep";
};
feather_i2c: &i2c0 { };
/* TWI1 used on Boron; also see mesh_feather_spi_spi1.dtsi */
&spi2 { /* dedicated MX25L */
compatible = "nordic,nrf-spi";
status = "okay";
cs-gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&spi2_default>;
pinctrl-1 = <&spi2_sleep>;
pinctrl-names = "default", "sleep";
mx25l32: mx25l3233f@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <80000000>;
wp-gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
hold-gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
size = <0x2000000>;
has-dpd;
t-enter-dpd = <10000>;
t-exit-dpd = <100000>;
jedec-id = [c2 20 16];
sfdp-bfp = [
e5 20 f1 ff ff ff ff 01 44 eb 08 6b 08 3b 04 bb
ee ff ff ff ff ff 00 ff ff ff 00 ff 0c 20 0f 52
10 d8 00 ff
];
};
};
/* see mesh_feather_spi1_spi3.dtsi */
feather_serial: &uart0 { /* feather UART1 */
compatible = "nordic,nrf-uarte";
current-speed = <115200>;
status = "okay";
/* optional mesh_feather_uart1_rtscts.dtsi */
pinctrl-0 = <&uart0_default>;
pinctrl-1 = <&uart0_sleep>;
pinctrl-names = "default", "sleep";
};
zephyr_udc0: &usbd {
compatible = "nordic,nrf-usbd";
status = "okay";
};
``` | /content/code_sandbox/boards/particle/argon/dts/mesh_feather.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,286 |
```restructuredtext
.. _particle_argon:
Particle Argon
##############
Overview
********
The Particle Argon is a Wi-Fi enabled development board with a Nordic
Semiconductor nRF52840 for mesh support and an ESP32 for Wi-Fi. The
board was developed by Particle Industries and has a SWD connector on it
for programming.
It is equipped with a onboard LIPO circuit and conforms to the
Adafruit Feather formfactor.
The Particle Argon provides support for the Nordic Semiconductor nRF52840 ARM
|reg| Cortex |reg|-M4F SoC with an integrated 2.4 GHz transceiver supporting
Bluetooth |reg| Low Energy and IEEE |reg| 802.15.4.
For more information about the Particle Argon board:
- `Argon Datasheet`_
- `Argon Hardware Files`_
Hardware
********
On the front of the board are RGB-LED, LED and LIPO circuitry.
The RGB-LED is controlled by the nRF52840 via GPIO pins.
.. figure:: img/particle_argon.jpg
:align: center
:alt: Particle Argon
Particle Argon (Credit: Particle Industries)
Power supply
============
The board is optimized for low power applications and supports two
power source configurations: battery and micro USB connector.
It contains circuitry for LIPO usage and can be charged via the USB port.
Supported Features
==================
The particle_argon board configuration supports the following
hardware features:
+-----------+------------+----------------------+
| Interface | Controller | Driver/Component |
+===========+============+======================+
| NVIC | on-chip | nested vectored |
| | | interrupt controller |
+-----------+------------+----------------------+
| RTC | on-chip | system clock |
+-----------+------------+----------------------+
| UART | on-chip | serial port |
+-----------+------------+----------------------+
| I2C | on-chip | i2c |
+-----------+------------+----------------------+
| SPI | on-chip | spi |
+-----------+------------+----------------------+
| GPIO | on-chip | gpio |
+-----------+------------+----------------------+
| FLASH | on-chip | flash |
+-----------+------------+----------------------+
| RADIO | on-chip | Bluetooth |
+-----------+------------+----------------------+
Other hardware features have not been enabled yet for this board.
Connections and IOs
===================
Please see the `Argon Datasheet`_ for header pin assignments, which are
common to all Feather-compatible Particle boards. Some peripherals are
available to applications through DTS overlay include directives:
- ``mesh_feather_i2c1_twi1.dtsi`` exposes TWI1 on labeled Feather
SDA1/SCL1 pins
- ``mesh_feather_spi_spi1.dtsi`` exposes SPI1 on labeled Feather
SPI pins
- ``mesh_feather_spi_spi3.dtsi`` exposes SPI3 on labeled Feather
SPI pins
- ``mesh_feather_spi1_spi3.dtsi`` exposes SPI3 on labeled Feather
SPI1 pins
- ``mesh_feather_uart1_rtscts.dtsi`` adds hardware flow control to
labeled Feather UART pins
LED
---
* LED0 (blue)
* LED1 (red)
* LED2 (green)
* LED3 (blue)
Push buttons
------------
* SW0 via MODE
* SW1 via RESET
I2C
---
* TWI0 enabled on labeled header (SDA/SCL)
* TWI1 selectable with overlay (SDA1/SCL1)
SPI
---
* SPI0 disabled due to TWI0 conflict
* SPI1 selectable with overlay (SPI)
* SPI2 internal to 32 Mb CFI flash chip
* SPI3 selectable with overlay (SPI or SPI1)
UART
----
* UARTE0 enabled RX/TX on labeled header (UART1); add RTS/CTS with overlay
* UARTE1 internal to ESP32
Programming and Debugging
*************************
Applications for the ``particle_argon`` board configuration can be
built and flashed in the usual way (see :ref:`build_an_application`
and :ref:`application_run` for more details).
Flashing
========
Build and flash an application in the usual way, for example:
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: particle_argon
:goals: build flash
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: particle_argon
:maybe-skip-config:
:goals: debug
Testing the LEDs and buttons
****************************
There are 2 samples that allow you to test that the buttons (switches) and
LEDs on the board are working properly with Zephyr:
* :zephyr:code-sample:`blinky`
* :zephyr:code-sample:`button`
You can build and flash the examples to make sure Zephyr is running correctly on
your board.
.. _Argon Datasheet:
path_to_url
.. _Argon Hardware Files:
path_to_url
``` | /content/code_sandbox/boards/particle/argon/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,147 |
```cmake
#
#
board_runner_args(pyocd "--target=nrf52840" "--frequency=4000000")
board_runner_args(nrfjprog "--softreset")
board_runner_args(jlink "--device=nRF52840_xxAA" "--speed=4000")
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/particle/xenon/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 105 |
```yaml
#
#
identifier: particle_xenon
name: particle-xenon
type: mcu
arch: arm
ram: 512
flash: 1024
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- i2c
- spi
- gpio
- usb_device
- ble
- feather_serial
- feather_i2c
- feather_spi
vendor: particle
``` | /content/code_sandbox/boards/particle/xenon/particle_xenon.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 104 |
```unknown
/*
*/
&pinctrl {
uart1_default: uart1_default {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 8)>,
<NRF_PSEL(UART_RX, 1, 10)>;
};
};
uart1_sleep: uart1_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 8)>,
<NRF_PSEL(UART_RX, 1, 10)>;
low-power-enable;
};
};
};
``` | /content/code_sandbox/boards/particle/xenon/particle_xenon-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 124 |
```cmake
# Suppress "unique_unit_address_if_enabled" to handle the following overlaps:
# - power@40000000 & clock@40000000 & bprot@40000000
# - acl@4001e000 & flash-controller@4001e000
list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled")
``` | /content/code_sandbox/boards/particle/xenon/pre_dt_board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 72 |
```yaml
board:
name: particle_xenon
vendor: particle
socs:
- name: nrf52840
``` | /content/code_sandbox/boards/particle/xenon/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 29 |
```c
/*
*
*/
#include <zephyr/init.h>
#include <zephyr/drivers/gpio.h>
#define SKY_UFLn_GPIO_SPEC GPIO_DT_SPEC_GET(DT_NODELABEL(sky13351), vctl1_gpios)
#define SKY_PCBn_GPIO_SPEC GPIO_DT_SPEC_GET(DT_NODELABEL(sky13351), vctl2_gpios)
static inline void external_antenna(bool on)
{
struct gpio_dt_spec ufl_gpio = SKY_UFLn_GPIO_SPEC;
struct gpio_dt_spec pcb_gpio = SKY_PCBn_GPIO_SPEC;
if (!gpio_is_ready_dt(&ufl_gpio)) {
return;
}
if (!gpio_is_ready_dt(&pcb_gpio)) {
return;
}
gpio_pin_configure_dt(&ufl_gpio, (on ? GPIO_OUTPUT_ACTIVE : GPIO_OUTPUT_INACTIVE));
gpio_pin_configure_dt(&pcb_gpio, (on ? GPIO_OUTPUT_INACTIVE : GPIO_OUTPUT_ACTIVE));
}
static int board_particle_xenon_init(void)
{
/*
* On power-up the SKY13351 is left uncontrolled, so neither
* PCB nor external antenna is selected. Select the PCB
* antenna.
*/
external_antenna(false);
return 0;
}
/* needs to be done after GPIO driver init, which is at
* POST_KERNEL:KERNEL_INIT_PRIORITY_DEFAULT.
*/
SYS_INIT(board_particle_xenon_init, POST_KERNEL, 99);
``` | /content/code_sandbox/boards/particle/xenon/board.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 292 |
```unknown
# Particle Xenon configuration
config BOARD_PARTICLE_XENON
select SOC_NRF52840_QIAA
``` | /content/code_sandbox/boards/particle/xenon/Kconfig.particle_xenon | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 25 |
```unknown
/*
*
*/
/dts-v1/;
#include <nordic/nrf52840_qiaa.dtsi>
#include "mesh_feather.dtsi"
#include "particle_xenon-pinctrl.dtsi"
/ {
model = "Particle Xenon";
compatible = "particle,xenon", "particle,feather";
sky13351: sky13351 {
compatible = "skyworks,sky13351";
vctl1-gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
vctl2-gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
};
vbatt {
compatible = "voltage-divider";
io-channels = <&adc 3>;
output-ohms = <2100000>;
full-ohms = <(2100000 + 806000)>;
};
aliases {
watchdog0 = &wdt0;
};
};
®1 {
regulator-initial-mode = <NRF5X_REG_MODE_DCDC>;
};
&uicr {
gpio-as-nreset;
};
&uart1 { /* feather UART2 */
compatible = "nordic,nrf-uarte";
current-speed = <115200>;
status = "disabled";
pinctrl-0 = <&uart1_default>;
pinctrl-1 = <&uart1_sleep>;
pinctrl-names = "default", "sleep";
};
``` | /content/code_sandbox/boards/particle/xenon/particle_xenon.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 299 |
```unknown
#
#
# Enable MPU
CONFIG_ARM_MPU=y
# enable GPIO
CONFIG_GPIO=y
# enable uart driver
CONFIG_SERIAL=y
# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
``` | /content/code_sandbox/boards/particle/xenon/particle_xenon_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 43 |
```unknown
# Particle Xenon board configuration
if BOARD_PARTICLE_XENON
config BT_CTLR
default BT
endif # BOARD_PARTICLE_XENON
``` | /content/code_sandbox/boards/particle/xenon/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 33 |
```unknown
/*
*
*/
/* Add SPI support on Particle Mesh via nRF52840 SPI1
*
* NOTE: This file is replicated in particle_{argon,xenon}.
* Changes should be made in all instances. */
&pinctrl {
spi1_default: spi1_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 1, 15)>,
<NRF_PSEL(SPIM_MOSI, 1, 13)>,
<NRF_PSEL(SPIM_MISO, 1, 14)>;
};
};
spi1_sleep: spi1_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 1, 15)>,
<NRF_PSEL(SPIM_MOSI, 1, 13)>,
<NRF_PSEL(SPIM_MISO, 1, 14)>;
low-power-enable;
};
};
};
feather_spi: &spi1 { /* feather SPI */
compatible = "nordic,nrf-spim";
status = "okay";
pinctrl-0 = <&spi1_default>;
pinctrl-1 = <&spi1_sleep>;
pinctrl-names = "default", "sleep";
cs-gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
};
``` | /content/code_sandbox/boards/particle/xenon/dts/mesh_feather_spi_spi1.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 287 |
```unknown
/*
*/
&pinctrl {
i2c0_default: i2c0_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
<NRF_PSEL(TWIM_SCL, 0, 27)>;
};
};
i2c0_sleep: i2c0_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
<NRF_PSEL(TWIM_SCL, 0, 27)>;
low-power-enable;
};
};
spi2_default: spi2_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 19)>,
<NRF_PSEL(SPIM_MOSI, 0, 20)>,
<NRF_PSEL(SPIM_MISO, 0, 21)>;
};
};
spi2_sleep: spi2_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 19)>,
<NRF_PSEL(SPIM_MOSI, 0, 20)>,
<NRF_PSEL(SPIM_MISO, 0, 21)>;
low-power-enable;
};
};
uart0_default: uart0_default {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 6)>,
<NRF_PSEL(UART_RX, 0, 8)>;
};
};
uart0_sleep: uart0_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 6)>,
<NRF_PSEL(UART_RX, 0, 8)>;
low-power-enable;
};
};
};
``` | /content/code_sandbox/boards/particle/xenon/dts/mesh_feather-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 410 |
```unknown
/*
*
*/
/* Add I2C1 support on Particle Mesh via nRF52840 TWI1
*
* NOTE: This file is replicated in particle_{argon,xenon}.
* Changes should be made in all instances. */
&pinctrl {
i2c1_default: i2c1_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 1, 1)>,
<NRF_PSEL(TWIM_SCL, 1, 2)>;
};
};
i2c1_sleep: i2c1_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 1, 1)>,
<NRF_PSEL(TWIM_SCL, 1, 2)>;
low-power-enable;
};
};
};
&i2c1 { /* feather I2C1 */
status = "okay";
pinctrl-0 = <&i2c1_default>;
pinctrl-1 = <&i2c1_sleep>;
pinctrl-names = "default", "sleep";
};
``` | /content/code_sandbox/boards/particle/xenon/dts/mesh_feather_i2c1_twi1.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 240 |
```unknown
/*
*
*/
/* Add UART2 support on particle_xenon via nRF52840 UARTE1 */
&pinctrl {
uart1_default: uart1_default {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 8)>,
<NRF_PSEL(UART_RX, 1, 10)>,
<NRF_PSEL(UART_RTS, 1, 3)>,
<NRF_PSEL(UART_CTS, 1, 11)>;
};
};
uart1_sleep: uart1_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 8)>,
<NRF_PSEL(UART_RX, 1, 10)>,
<NRF_PSEL(UART_RTS, 1, 3)>,
<NRF_PSEL(UART_CTS, 1, 11)>;
low-power-enable;
};
};
};
&uart1 {
compatible = "nordic,nrf-uarte";
current-speed = <115200>;
status = "okay";
pinctrl-0 = <&uart1_default>;
pinctrl-1 = <&uart1_sleep>;
pinctrl-names = "default", "sleep";
};
``` | /content/code_sandbox/boards/particle/xenon/dts/mesh_xenon_uart2.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 281 |
```unknown
/*
*
*/
/* Add SPI1 support on Particle Mesh via nRF52840 SPI3
*
* NOTE: This file is replicated in particle_{argon,boron,xenon}.
* Changes should be made in all instances. */
&pinctrl {
spi3_default: spi3_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 1, 1)>,
<NRF_PSEL(SPIM_MOSI, 1, 2)>,
<NRF_PSEL(SPIM_MISO, 1, 8)>;
};
};
spi3_sleep: spi3_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 1, 1)>,
<NRF_PSEL(SPIM_MOSI, 1, 2)>,
<NRF_PSEL(SPIM_MISO, 1, 8)>;
low-power-enable;
};
};
};
&spi3 { /* feather SPI */
compatible = "nordic,nrf-spim";
status = "okay";
pinctrl-0 = <&spi3_default>;
pinctrl-1 = <&spi3_sleep>;
pinctrl-names = "default", "sleep";
};
``` | /content/code_sandbox/boards/particle/xenon/dts/mesh_feather_spi1_spi3.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 272 |
```unknown
/*
*
*/
/* Add SPI support on Particle Mesh via nRF52840 SPI3
*
* NOTE: This file is replicated in particle_{argon,boron,xenon}.
* Changes should be made in all instances. */
&pinctrl {
spi3_default: spi3_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 1, 15)>,
<NRF_PSEL(SPIM_MOSI, 1, 13)>,
<NRF_PSEL(SPIM_MISO, 1, 14)>;
};
};
spi3_sleep: spi3_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 1, 15)>,
<NRF_PSEL(SPIM_MOSI, 1, 13)>,
<NRF_PSEL(SPIM_MISO, 1, 14)>;
low-power-enable;
};
};
};
feather_spi: &spi3 { /* feather SPI */
compatible = "nordic,nrf-spim";
status = "okay";
pinctrl-0 = <&spi3_default>;
pinctrl-1 = <&spi3_sleep>;
pinctrl-names = "default", "sleep";
cs-gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
};
``` | /content/code_sandbox/boards/particle/xenon/dts/mesh_feather_spi_spi3.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 289 |
```unknown
/*
*
*/
/* Add hardware flow control to UART1 on Feather-based mesh boards
*
* NOTE: This file is replicated in particle_{argon,boron,xenon}.
* Changes should be made in all instances. */
&pinctrl {
uart0_default_alt: uart0_default_alt {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 6)>,
<NRF_PSEL(UART_RX, 0, 8)>,
<NRF_PSEL(UART_RTS, 1, 1)>,
<NRF_PSEL(UART_CTS, 1, 2)>;
};
};
uart0_sleep_alt: uart0_sleep_alt {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 6)>,
<NRF_PSEL(UART_RX, 0, 8)>,
<NRF_PSEL(UART_RTS, 1, 1)>,
<NRF_PSEL(UART_CTS, 1, 2)>;
low-power-enable;
};
};
};
&uart0 {
pinctrl-0 = <&uart0_default_alt>;
pinctrl-1 = <&uart0_sleep_alt>;
pinctrl-names = "default", "sleep";
};
``` | /content/code_sandbox/boards/particle/xenon/dts/mesh_feather_uart1_rtscts.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 285 |
```unknown
/*
*
*/
/* Assignments common to all Feather-based Particle mesh boards.
*
* NOTE: This file is replicated in particle_{argon,boron,xenon}.
* Changes should be made in all instances. */
#include "mesh_feather-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
aliases {
led0 = &user_led;
led1 = &status_red;
led2 = &status_green;
led3 = &status_blue;
sw0 = &mode_button;
sw1 = &reset_button;
};
chosen {
zephyr,console = &uart0;
zephyr,uart-mcumgr = &uart0;
zephyr,shell-uart = &uart0;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,ieee802154 = &ieee802154;
};
leds {
compatible = "gpio-leds";
user_led: led_0 {
gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
label = "User LED";
};
status_red: led_1 {
gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
label = "Red LED";
};
status_green: led_2 {
gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
label = "Green LED";
};
status_blue: led_3 {
gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
label = "Blue LED";
};
};
gpio_keys {
compatible = "gpio-keys";
mode_button: button_0 {
gpios = <&gpio0 11 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "Mode Button";
zephyr,code = <INPUT_BTN_MODE>;
};
reset_button: button_1 {
gpios = <&gpio0 18 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "Reset Button";
zephyr,code = <INPUT_KEY_1>;
};
};
mesh_header: connector {
compatible = "particle-gen3-header";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpio0 26 0>, /* SDA */
<1 0 &gpio0 27 0>, /* SCL */
<2 0 &gpio1 1 0>, /* PWM3 */
<3 0 &gpio1 2 0>, /* PWM3 */
<4 0 &gpio1 8 0>, /* PWM1 */
<5 0 &gpio1 10 0>, /* PWM1 */
<6 0 &gpio1 11 0>, /* PWM1 */
<7 0 &gpio1 12 0>, /* PWM0 */
<8 0 &gpio1 3 0>, /* PWM1 */
<9 0 &gpio0 6 0>, /* TX */
<10 0 &gpio0 8 0>, /* RX */
<11 0 &gpio1 14 0>, /* MISO */
<12 0 &gpio1 13 0>, /* MOSI */
<13 0 &gpio1 15 0>, /* SCK */
<14 0 &gpio0 31 0>, /* SS */
<15 0 &gpio0 30 0>, /* ADC4 = AIN6 */
<16 0 &gpio0 29 0>, /* ADC3 = AIN5 */
<17 0 &gpio0 28 0>, /* ADC2 = AIN4 */
<18 0 &gpio0 4 0>, /* ADC1 = AIN2 */
<19 0 &gpio0 3 0>, /* ADC0 = AIN1 */
<20 0 &gpio0 11 0>, /* MODEn */
<21 0 &gpio0 18 0>; /* RESETn */
};
feather_header: feather_connector {
compatible = "adafruit-feather-header";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <12 0 &gpio0 26 0>, /* SDA */
<13 0 &gpio0 27 0>, /* SCL */
<14 0 &gpio1 1 0>, /* PWM3 */
<15 0 &gpio1 2 0>, /* PWM3 */
<16 0 &gpio1 8 0>, /* PWM1 */
<17 0 &gpio1 10 0>, /* PWM1 */
<18 0 &gpio1 11 0>, /* PWM1 */
<19 0 &gpio1 12 0>, /* PWM0 */
<20 0 &gpio1 3 0>, /* PWM1 */
/* 11 not connected */
<10 0 &gpio0 6 0>, /* TX */
<9 0 &gpio0 8 0>, /* RX */
<8 0 &gpio1 14 0>, /* MISO */
<7 0 &gpio1 13 0>, /* MOSI */
<6 0 &gpio1 15 0>, /* SCK */
<5 0 &gpio0 31 0>, /* SS */
<4 0 &gpio0 30 0>, /* ADC4 = AIN6 */
<3 0 &gpio0 29 0>, /* ADC3 = AIN5 */
<2 0 &gpio0 28 0>, /* ADC2 = AIN4 */
<1 0 &gpio0 4 0>, /* ADC1 = AIN2 */
<0 0 &gpio0 3 0>; /* ADC0 = AIN1 */
};
};
feather_adc: &adc { /* feather ADC */
status = "okay";
};
&ieee802154 {
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 0x0000C000>;
};
slot0_partition: partition@c000 {
label = "image-0";
reg = <0x0000C000 0x00067000>;
};
slot1_partition: partition@73000 {
label = "image-1";
reg = <0x00073000 0x00067000>;
};
scratch_partition: partition@da000 {
label = "image-scratch";
reg = <0x000da000 0x0001e000>;
};
/*
* The flash starting at 0x000f8000 and ending at
* 0x000fffff is reserved for use by the application.
*/
/*
* Storage partition will be used by FCB/LittleFS/NVS
* if enabled.
*/
storage_partition: partition@f8000 {
label = "storage";
reg = <0x000f8000 0x00008000>;
};
};
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&gpiote {
status = "okay";
};
arduino_i2c: &i2c0 { /* feather I2C */
compatible = "nordic,nrf-twi";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
pinctrl-0 = <&i2c0_default>;
pinctrl-1 = <&i2c0_sleep>;
pinctrl-names = "default", "sleep";
};
feather_i2c: &i2c0 { };
/* TWI1 used on Boron; also see mesh_feather_spi_spi1.dtsi */
&spi2 { /* dedicated MX25L */
compatible = "nordic,nrf-spi";
status = "okay";
cs-gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&spi2_default>;
pinctrl-1 = <&spi2_sleep>;
pinctrl-names = "default", "sleep";
mx25l32: mx25l3233f@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <80000000>;
wp-gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
hold-gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
size = <0x2000000>;
has-dpd;
t-enter-dpd = <10000>;
t-exit-dpd = <100000>;
jedec-id = [c2 20 16];
sfdp-bfp = [
e5 20 f1 ff ff ff ff 01 44 eb 08 6b 08 3b 04 bb
ee ff ff ff ff ff 00 ff ff ff 00 ff 0c 20 0f 52
10 d8 00 ff
];
};
};
/* see mesh_feather_spi1_spi3.dtsi */
feather_serial: &uart0 { /* feather UART1 */
compatible = "nordic,nrf-uarte";
current-speed = <115200>;
status = "okay";
/* optional mesh_feather_uart1_rtscts.dtsi */
pinctrl-0 = <&uart0_default>;
pinctrl-1 = <&uart0_sleep>;
pinctrl-names = "default", "sleep";
};
zephyr_udc0: &usbd {
compatible = "nordic,nrf-usbd";
status = "okay";
};
``` | /content/code_sandbox/boards/particle/xenon/dts/mesh_feather.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,286 |
```cmake
#
#
board_runner_args(pyocd "--target=nrf52840" "--frequency=4000000")
board_runner_args(nrfjprog "--softreset")
board_runner_args(jlink "--device=nRF52840_xxAA" "--speed=4000")
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/particle/boron/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 105 |
```restructuredtext
.. _particle_xenon:
Particle Xenon
##############
Overview
********
The Particle Xenon is a low-cost mesh-enabled development board based on the
Nordic Semiconductor nRF52840 SoC. The board was developed by Particle
Industries and has an SWD connector on it for programming.
It is equipped with a onboard LIPO circuit and conforms to the
Adafruit Feather formfactor.
The Particle Xenon board provides support for the Nordic Semiconductor nRF52840
ARM |reg| Cortex |reg|-M4F SoC with an integrated 2.4 GHz transceiver supporting
Bluetooth |reg| Low Energy and IEEE |reg| 802.15.4.
For more information about the Particle Xenon board:
- `Xenon Datasheet`_
- `Xenon Hardware Files`_
Hardware
********
On the front of the board are RGB-LED, LED and LIPO circuitry.
The RGB-LED is controlled by the nRF52840 via GPIO pins.
.. figure:: img/particle_xenon.jpg
:align: center
:alt: Particle Xenon
Particle Xenon (Credit: Particle Industries)
Power supply
============
The board is optimized for low power applications and supports two
power source configurations, battery and micro USB connector.
It contains circuitry for LIPO usage and can be charged via the USB port.
Supported Features
==================
The particle_xenon board configuration supports the following
hardware features:
+-----------+------------+----------------------+
| Interface | Controller | Driver/Component |
+===========+============+======================+
| NVIC | on-chip | nested vectored |
| | | interrupt controller |
+-----------+------------+----------------------+
| RTC | on-chip | system clock |
+-----------+------------+----------------------+
| UART | on-chip | serial port |
+-----------+------------+----------------------+
| I2C | on-chip | i2c |
+-----------+------------+----------------------+
| SPI | on-chip | spi |
+-----------+------------+----------------------+
| GPIO | on-chip | gpio |
+-----------+------------+----------------------+
| FLASH | on-chip | flash |
+-----------+------------+----------------------+
| RADIO | on-chip | Bluetooth |
+-----------+------------+----------------------+
Other hardware features have not been enabled yet for this board.
Connections and IOs
===================
Please see the `Xenon Datasheet`_ for header pin assignments, which are
common to all Feather-compatible Particle boards. Some peripherals are
available to applications through DTS overlay include directives:
- ``mesh_feather_i2c1_twi1.dtsi`` exposes TWI1 on labeled Feather
SDA1/SCL1 pins
- ``mesh_feather_spi_spi1.dtsi`` exposes SPI1 on labeled Feather
SPI pins
- ``mesh_feather_spi_spi3.dtsi`` exposes SPI3 on labeled Feather
SPI pins
- ``mesh_feather_spi1_spi3.dtsi`` exposes SPI3 on labeled Feather
SPI1 pins
- ``mesh_feather_uart1_rtscts.dtsi`` adds hardware flow control to
labeled Feather UART pins
- ``mesh_xenon_uart2.dtsi`` exposes UARTE1 on labeled Feather
UART2 pins
LED
---
* LED0 (blue)
* LED1 (red)
* LED2 (green)
* LED3 (blue)
Push buttons
------------
* SW0 via MODE
* SW1 via RESET
I2C
---
* TWI0 enabled on labeled header (SDA/SCL)
* TWI1 selectable with overlay (SDA1/SCL1)
SPI
---
* SPI0 disabled due to TWI0 conflict
* SPI1 selectable with overlay (SPI)
* SPI2 internal to 32 Mb CFI flash chip
* SPI3 selectable with overlay (SPI or SPI1)
UART
----
* UARTE0 enabled RX/TX on labeled header (UART1); add RTS/CTS with overlay
* UARTE1 selectable with overlay (UART2)
Programming and Debugging
*************************
Applications for the ``particle_xenon`` board configuration can be
built and flashed in the usual way (see :ref:`build_an_application`
and :ref:`application_run` for more details).
Flashing
========
Build and flash an application in the usual way, for example:
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: particle_xenon
:goals: build flash
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: particle_xenon
:maybe-skip-config:
:goals: debug
Testing the LEDs and buttons
****************************
There are 2 samples that allow you to test that the buttons (switches) and
LEDs on the board are working properly with Zephyr:
* :zephyr:code-sample:`blinky`
* :zephyr:code-sample:`button`
You can build and flash the examples to make sure Zephyr is running correctly on
your board.
.. _Xenon Datasheet:
path_to_url
.. _Xenon Hardware Files:
path_to_url
``` | /content/code_sandbox/boards/particle/xenon/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,182 |
```unknown
#
#
# Enable MPU
CONFIG_ARM_MPU=y
# enable GPIO
CONFIG_GPIO=y
# enable uart driver
CONFIG_SERIAL=y
# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# Fix the priority to enable the modem line's serial buffer
# before the modem driver starts (gsm_ppp or ublox-sara-r4).
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_INIT_PRIORITY=41
``` | /content/code_sandbox/boards/particle/boron/particle_boron_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 89 |
```cmake
# Suppress "unique_unit_address_if_enabled" to handle the following overlaps:
# - power@40000000 & clock@40000000 & bprot@40000000
# - acl@4001e000 & flash-controller@4001e000
list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled")
``` | /content/code_sandbox/boards/particle/boron/pre_dt_board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 72 |
```unknown
/*
*
*/
/dts-v1/;
#include <nordic/nrf52840_qiaa.dtsi>
#include <zephyr/dt-bindings/gpio/gpio.h>
#include "mesh_feather.dtsi"
#include "particle_boron-pinctrl.dtsi"
/ {
model = "Particle Boron";
compatible = "particle,boron", "particle,feather";
sky13351: sky13351 {
compatible = "skyworks,sky13351";
vctl1-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
/* on Boron VCTL2 is inverted VCTL1 signal via SN74LVC1G04
* single inverter gate -- requires a definition below,
* but is not used in board.c */
vctl2-gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
};
/* Power to the level shifter for uart1 */
en_buff_pwr: enable-buff-pwr {
compatible = "regulator-fixed";
regulator-name = "en_buff_pwr";
enable-gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
regulator-boot-on;
};
aliases {
watchdog0 = &wdt0;
};
};
®1 {
regulator-initial-mode = <NRF5X_REG_MODE_DCDC>;
};
&uicr {
gpio-as-nreset;
};
&i2c1 { /* power monitoring */
compatible = "nordic,nrf-twi";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
pinctrl-0 = <&i2c1_default>;
pinctrl-1 = <&i2c1_sleep>;
pinctrl-names = "default", "sleep";
};
&uart1 { /* u-blox SARA-U2 or SARA-R4 */
compatible = "nordic,nrf-uarte";
current-speed = <115200>;
status = "okay";
hw-flow-control;
pinctrl-0 = <&uart1_default>;
pinctrl-1 = <&uart1_sleep>;
pinctrl-names = "default", "sleep";
sara_r4 {
compatible = "u-blox,sara-r4";
status = "okay";
mdm-power-gpios = <&gpio0 16 0>;
mdm-reset-gpios = <&gpio0 12 0>;
mdm-vint-gpios = <&gpio0 2 0>;
};
};
``` | /content/code_sandbox/boards/particle/boron/particle_boron.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 536 |
```unknown
# Particle Boron configuration
config BOARD_PARTICLE_BORON
select SOC_NRF52840_QIAA
``` | /content/code_sandbox/boards/particle/boron/Kconfig.particle_boron | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 25 |
```yaml
board:
name: particle_boron
vendor: particle
socs:
- name: nrf52840
``` | /content/code_sandbox/boards/particle/boron/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 28 |
```c
/*
*
*/
#include <zephyr/init.h>
#include <zephyr/drivers/gpio.h>
#define ANT_UFLn_GPIO_SPEC GPIO_DT_SPEC_GET(DT_NODELABEL(sky13351), vctl1_gpios)
static inline void external_antenna(bool on)
{
struct gpio_dt_spec ufl_gpio = ANT_UFLn_GPIO_SPEC;
/*
* On power-up the SKY13351 is left uncontrolled, so neither
* PCB nor external antenna is selected. Select the PCB
* antenna.
*/
if (!gpio_is_ready_dt(&ufl_gpio)) {
return;
}
gpio_pin_configure_dt(&ufl_gpio, (on ? GPIO_OUTPUT_ACTIVE : GPIO_OUTPUT_INACTIVE));
}
static int board_particle_boron_init(void)
{
external_antenna(false);
return 0;
}
SYS_INIT(board_particle_boron_init, POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE);
``` | /content/code_sandbox/boards/particle/boron/board.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 189 |
```yaml
identifier: particle_boron
name: Particle Boron
type: mcu
arch: arm
ram: 512
flash: 1024
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- i2c
- spi
- gpio
- usb_device
- ble
- feather_serial
- feather_i2c
- feather_spi
vendor: particle
``` | /content/code_sandbox/boards/particle/boron/particle_boron.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 100 |
```unknown
# Particle Boron board configuration
if BOARD_PARTICLE_BORON
config BT_CTLR
default BT
if MODEM
config MODEM_UBLOX_SARA
default y
choice MODEM_UBLOX_SARA_VARIANT
default MODEM_UBLOX_SARA_R4
endchoice
config UART_INTERRUPT_DRIVEN
default y
endif # MODEM
endif # BOARD_PARTICLE_BORON
``` | /content/code_sandbox/boards/particle/boron/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 91 |
```unknown
/*
*/
&pinctrl {
i2c1_default: i2c1_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 24)>,
<NRF_PSEL(TWIM_SCL, 1, 9)>;
};
};
i2c1_sleep: i2c1_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 24)>,
<NRF_PSEL(TWIM_SCL, 1, 9)>;
low-power-enable;
};
};
uart1_default: uart1_default {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 5)>,
<NRF_PSEL(UART_RX, 1, 4)>,
<NRF_PSEL(UART_RTS, 1, 7)>,
<NRF_PSEL(UART_CTS, 1, 6)>;
};
};
uart1_sleep: uart1_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 5)>,
<NRF_PSEL(UART_RX, 1, 4)>,
<NRF_PSEL(UART_RTS, 1, 7)>,
<NRF_PSEL(UART_CTS, 1, 6)>;
low-power-enable;
};
};
};
``` | /content/code_sandbox/boards/particle/boron/particle_boron-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 324 |
```unknown
/*
*/
&pinctrl {
i2c0_default: i2c0_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
<NRF_PSEL(TWIM_SCL, 0, 27)>;
};
};
i2c0_sleep: i2c0_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
<NRF_PSEL(TWIM_SCL, 0, 27)>;
low-power-enable;
};
};
spi2_default: spi2_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 19)>,
<NRF_PSEL(SPIM_MOSI, 0, 20)>,
<NRF_PSEL(SPIM_MISO, 0, 21)>;
};
};
spi2_sleep: spi2_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 19)>,
<NRF_PSEL(SPIM_MOSI, 0, 20)>,
<NRF_PSEL(SPIM_MISO, 0, 21)>;
low-power-enable;
};
};
uart0_default: uart0_default {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 6)>,
<NRF_PSEL(UART_RX, 0, 8)>;
};
};
uart0_sleep: uart0_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 6)>,
<NRF_PSEL(UART_RX, 0, 8)>;
low-power-enable;
};
};
};
``` | /content/code_sandbox/boards/particle/boron/dts/mesh_feather-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 410 |
```unknown
/*
*
*/
/* Add SPI1 support on Particle Mesh via nRF52840 SPI3
*
* NOTE: This file is replicated in particle_{argon,boron,xenon}.
* Changes should be made in all instances. */
&pinctrl {
spi3_default: spi3_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 1, 1)>,
<NRF_PSEL(SPIM_MOSI, 1, 2)>,
<NRF_PSEL(SPIM_MISO, 1, 8)>;
};
};
spi3_sleep: spi3_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 1, 1)>,
<NRF_PSEL(SPIM_MOSI, 1, 2)>,
<NRF_PSEL(SPIM_MISO, 1, 8)>;
low-power-enable;
};
};
};
&spi3 { /* feather SPI */
compatible = "nordic,nrf-spim";
status = "okay";
pinctrl-0 = <&spi3_default>;
pinctrl-1 = <&spi3_sleep>;
pinctrl-names = "default", "sleep";
};
``` | /content/code_sandbox/boards/particle/boron/dts/mesh_feather_spi1_spi3.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 272 |
```unknown
/*
*
*/
/* Add SPI support on Particle Mesh via nRF52840 SPI3
*
* NOTE: This file is replicated in particle_{argon,boron,xenon}.
* Changes should be made in all instances. */
&pinctrl {
spi3_default: spi3_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 1, 15)>,
<NRF_PSEL(SPIM_MOSI, 1, 13)>,
<NRF_PSEL(SPIM_MISO, 1, 14)>;
};
};
spi3_sleep: spi3_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 1, 15)>,
<NRF_PSEL(SPIM_MOSI, 1, 13)>,
<NRF_PSEL(SPIM_MISO, 1, 14)>;
low-power-enable;
};
};
};
feather_spi: &spi3 { /* feather SPI */
compatible = "nordic,nrf-spim";
status = "okay";
pinctrl-0 = <&spi3_default>;
pinctrl-1 = <&spi3_sleep>;
pinctrl-names = "default", "sleep";
cs-gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
};
``` | /content/code_sandbox/boards/particle/boron/dts/mesh_feather_spi_spi3.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 289 |
```unknown
/*
*
*/
/* Add hardware flow control to UART1 on Feather-based mesh boards
*
* NOTE: This file is replicated in particle_{argon,boron,xenon}.
* Changes should be made in all instances. */
&pinctrl {
uart0_default_alt: uart0_default_alt {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 6)>,
<NRF_PSEL(UART_RX, 0, 8)>,
<NRF_PSEL(UART_RTS, 1, 1)>,
<NRF_PSEL(UART_CTS, 1, 2)>;
};
};
uart0_sleep_alt: uart0_sleep_alt {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 6)>,
<NRF_PSEL(UART_RX, 0, 8)>,
<NRF_PSEL(UART_RTS, 1, 1)>,
<NRF_PSEL(UART_CTS, 1, 2)>;
low-power-enable;
};
};
};
&uart0 {
pinctrl-0 = <&uart0_default_alt>;
pinctrl-1 = <&uart0_sleep_alt>;
pinctrl-names = "default", "sleep";
};
``` | /content/code_sandbox/boards/particle/boron/dts/mesh_feather_uart1_rtscts.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 285 |
```unknown
/*
*
*/
/* Assignments common to all Feather-based Particle mesh boards.
*
* NOTE: This file is replicated in particle_{argon,boron,xenon}.
* Changes should be made in all instances. */
#include "mesh_feather-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
aliases {
led0 = &user_led;
led1 = &status_red;
led2 = &status_green;
led3 = &status_blue;
sw0 = &mode_button;
sw1 = &reset_button;
};
chosen {
zephyr,console = &uart0;
zephyr,uart-mcumgr = &uart0;
zephyr,shell-uart = &uart0;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,ieee802154 = &ieee802154;
};
leds {
compatible = "gpio-leds";
user_led: led_0 {
gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
label = "User LED";
};
status_red: led_1 {
gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
label = "Red LED";
};
status_green: led_2 {
gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
label = "Green LED";
};
status_blue: led_3 {
gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
label = "Blue LED";
};
};
gpio_keys {
compatible = "gpio-keys";
mode_button: button_0 {
gpios = <&gpio0 11 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "Mode Button";
zephyr,code = <INPUT_BTN_MODE>;
};
reset_button: button_1 {
gpios = <&gpio0 18 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "Reset Button";
zephyr,code = <INPUT_KEY_1>;
};
};
mesh_header: connector {
compatible = "particle-gen3-header";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpio0 26 0>, /* SDA */
<1 0 &gpio0 27 0>, /* SCL */
<2 0 &gpio1 1 0>, /* PWM3 */
<3 0 &gpio1 2 0>, /* PWM3 */
<4 0 &gpio1 8 0>, /* PWM1 */
<5 0 &gpio1 10 0>, /* PWM1 */
<6 0 &gpio1 11 0>, /* PWM1 */
<7 0 &gpio1 12 0>, /* PWM0 */
<8 0 &gpio1 3 0>, /* PWM1 */
<9 0 &gpio0 6 0>, /* TX */
<10 0 &gpio0 8 0>, /* RX */
<11 0 &gpio1 14 0>, /* MISO */
<12 0 &gpio1 13 0>, /* MOSI */
<13 0 &gpio1 15 0>, /* SCK */
<14 0 &gpio0 31 0>, /* SS */
<15 0 &gpio0 30 0>, /* ADC4 = AIN6 */
<16 0 &gpio0 29 0>, /* ADC3 = AIN5 */
<17 0 &gpio0 28 0>, /* ADC2 = AIN4 */
<18 0 &gpio0 4 0>, /* ADC1 = AIN2 */
<19 0 &gpio0 3 0>, /* ADC0 = AIN1 */
<20 0 &gpio0 11 0>, /* MODEn */
<21 0 &gpio0 18 0>; /* RESETn */
};
feather_header: feather_connector {
compatible = "adafruit-feather-header";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <12 0 &gpio0 26 0>, /* SDA */
<13 0 &gpio0 27 0>, /* SCL */
<14 0 &gpio1 1 0>, /* PWM3 */
<15 0 &gpio1 2 0>, /* PWM3 */
<16 0 &gpio1 8 0>, /* PWM1 */
<17 0 &gpio1 10 0>, /* PWM1 */
<18 0 &gpio1 11 0>, /* PWM1 */
<19 0 &gpio1 12 0>, /* PWM0 */
<20 0 &gpio1 3 0>, /* PWM1 */
/* 11 not connected */
<10 0 &gpio0 6 0>, /* TX */
<9 0 &gpio0 8 0>, /* RX */
<8 0 &gpio1 14 0>, /* MISO */
<7 0 &gpio1 13 0>, /* MOSI */
<6 0 &gpio1 15 0>, /* SCK */
<5 0 &gpio0 31 0>, /* SS */
<4 0 &gpio0 30 0>, /* ADC4 = AIN6 */
<3 0 &gpio0 29 0>, /* ADC3 = AIN5 */
<2 0 &gpio0 28 0>, /* ADC2 = AIN4 */
<1 0 &gpio0 4 0>, /* ADC1 = AIN2 */
<0 0 &gpio0 3 0>; /* ADC0 = AIN1 */
};
};
feather_adc: &adc { /* feather ADC */
status = "okay";
};
&ieee802154 {
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 0x0000C000>;
};
slot0_partition: partition@c000 {
label = "image-0";
reg = <0x0000C000 0x00067000>;
};
slot1_partition: partition@73000 {
label = "image-1";
reg = <0x00073000 0x00067000>;
};
scratch_partition: partition@da000 {
label = "image-scratch";
reg = <0x000da000 0x0001e000>;
};
/*
* The flash starting at 0x000f8000 and ending at
* 0x000fffff is reserved for use by the application.
*/
/*
* Storage partition will be used by FCB/LittleFS/NVS
* if enabled.
*/
storage_partition: partition@f8000 {
label = "storage";
reg = <0x000f8000 0x00008000>;
};
};
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&gpiote {
status = "okay";
};
arduino_i2c: &i2c0 { /* feather I2C */
compatible = "nordic,nrf-twi";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
pinctrl-0 = <&i2c0_default>;
pinctrl-1 = <&i2c0_sleep>;
pinctrl-names = "default", "sleep";
};
feather_i2c: &i2c0 { };
/* TWI1 used on Boron; also see mesh_feather_spi_spi1.dtsi */
&spi2 { /* dedicated MX25L */
compatible = "nordic,nrf-spi";
status = "okay";
cs-gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&spi2_default>;
pinctrl-1 = <&spi2_sleep>;
pinctrl-names = "default", "sleep";
mx25l32: mx25l3233f@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <80000000>;
wp-gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
hold-gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
size = <0x2000000>;
has-dpd;
t-enter-dpd = <10000>;
t-exit-dpd = <100000>;
jedec-id = [c2 20 16];
sfdp-bfp = [
e5 20 f1 ff ff ff ff 01 44 eb 08 6b 08 3b 04 bb
ee ff ff ff ff ff 00 ff ff ff 00 ff 0c 20 0f 52
10 d8 00 ff
];
};
};
/* see mesh_feather_spi1_spi3.dtsi */
feather_serial: &uart0 { /* feather UART1 */
compatible = "nordic,nrf-uarte";
current-speed = <115200>;
status = "okay";
/* optional mesh_feather_uart1_rtscts.dtsi */
pinctrl-0 = <&uart0_default>;
pinctrl-1 = <&uart0_sleep>;
pinctrl-names = "default", "sleep";
};
zephyr_udc0: &usbd {
compatible = "nordic,nrf-usbd";
status = "okay";
};
``` | /content/code_sandbox/boards/particle/boron/dts/mesh_feather.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,286 |
```unknown
# Enable MPU
CONFIG_ARM_MPU=y
# enable GPIO
CONFIG_GPIO=y
# enable uart driver
CONFIG_SERIAL=y
# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
``` | /content/code_sandbox/boards/particle/nrf52_blenano2/nrf52_blenano2_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 42 |
```cmake
board_runner_args(pyocd "--target=nrf52832")
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
``` | /content/code_sandbox/boards/particle/nrf52_blenano2/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```unknown
# nRF52 BLENANO 2 board configuration
config BOARD_NRF52_BLENANO2
select SOC_NRF52832_QFAA
``` | /content/code_sandbox/boards/particle/nrf52_blenano2/Kconfig.nrf52_blenano2 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 33 |
```cmake
# Suppress "unique_unit_address_if_enabled" to handle the following overlaps:
# - power@40000000 & clock@40000000 & bprot@40000000
# - acl@4001e000 & flash-controller@4001e000
list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled")
``` | /content/code_sandbox/boards/particle/nrf52_blenano2/pre_dt_board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 72 |
```yaml
board:
name: nrf52_blenano2
vendor: particle
socs:
- name: nrf52832
``` | /content/code_sandbox/boards/particle/nrf52_blenano2/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```restructuredtext
.. _particle_boron:
Particle Boron
##############
Overview
********
The Particle Boron is a cellular-enabled development board with a
Nordic Semiconductor nRF52840 for mesh support and an LTE or 2G/3G
modem. The board was developed by Particle Industries and has a SWD
connector on it for programming.
It is equipped with a onboard LIPO circuit and conforms to the
Adafruit Feather formfactor.
The Particle Boron board provides support for the Nordic Semiconductor nRF52840
ARM |reg| Cortex |reg|-M4F SoC with an integrated 2.4 GHz transceiver supporting
Bluetooth |reg| Low Energy and IEEE |reg| 802.15.4.
For more information about the Particle Boron board:
- `Boron Datasheet`_
- `Boron Hardware Files`_
Hardware
********
On the front of the board are RGB-LED, LED and LIPO circuitry.
The RGB-LED is controlled by the nRF52840 via GPIO pins.
.. figure:: img/particle_boron.jpg
:align: center
:alt: Particle Boron
Particle Boron (Credit: Particle Industries)
Power supply
============
The board is optimized for low power applications and supports two
power source configurations: battery and micro USB connector.
It contains circuitry for LIPO usage and can be charged via the USB port.
Supported Features
==================
The particle_boron board configuration supports the following
hardware features:
+-----------+------------+----------------------+
| Interface | Controller | Driver/Component |
+===========+============+======================+
| NVIC | on-chip | nested vectored |
| | | interrupt controller |
+-----------+------------+----------------------+
| RTC | on-chip | system clock |
+-----------+------------+----------------------+
| UART | on-chip | serial port |
+-----------+------------+----------------------+
| I2C | on-chip | i2c |
+-----------+------------+----------------------+
| SPI | on-chip | spi |
+-----------+------------+----------------------+
| GPIO | on-chip | gpio |
+-----------+------------+----------------------+
| FLASH | on-chip | flash |
+-----------+------------+----------------------+
| RADIO | on-chip | Bluetooth |
+-----------+------------+----------------------+
Other hardware features have not been enabled yet for this board.
Connections and IOs
===================
Please see the `Boron Datasheet`_ for header pin assignments, which are
common to all Feather-compatible Particle boards. Some peripherals are
available to applications through DTS overlay include directives:
- ``mesh_feather_spi_spi3.dtsi`` exposes SPI3 on labeled Feather
SPI pins
- ``mesh_feather_spi1_spi3.dtsi`` exposes SPI3 on labeled Feather
SPI1 pins
- ``mesh_feather_uart1_rtscts.dtsi`` adds hardware flow control to
labeled Feather UART pins
LED
---
* LED0 (blue)
* LED1 (red)
* LED2 (green)
* LED3 (blue)
Push buttons
------------
* SW0 via MODE
* SW1 via RESET
I2C
---
* TWI0 enabled on labeled header (SDA/SCL)
* TWI1 enabled for internal power management ICs
SPI
---
* SPI0 disabled due to TWI0 conflict
* SPI1 disabled due to TWI1 conflict
* SPI2 internal to 32 Mb CFI flash chip
* SPI3 selectable with overlay (SPI or SPI1)
UART
----
* UARTE0 enabled RX/TX on labeled header (UART1); add RTS/CTS with overlay
* UARTE1 internal to u-blox cellular modem
Programming and Debugging
*************************
Applications for the ``particle_boron`` board configuration can be
built and flashed in the usual way (see :ref:`build_an_application`
and :ref:`application_run` for more details).
Flashing
========
Build and flash an application in the usual way, for example:
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: particle_boron
:goals: build flash
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: particle_boron
:maybe-skip-config:
:goals: debug
Testing the LEDs and buttons
****************************
There are 2 samples that allow you to test that the buttons (switches) and
LEDs on the board are working properly with Zephyr:
* :zephyr:code-sample:`blinky`
* :zephyr:code-sample:`button`
You can build and flash the examples to make sure Zephyr is running correctly on
your board.
.. _Boron Datasheet:
path_to_url
.. _Boron Hardware Files:
path_to_url
``` | /content/code_sandbox/boards/particle/boron/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,099 |
```unknown
# nRF52 BLENANO 2 board configuration
if BOARD_NRF52_BLENANO2
config BT_CTLR
default BT
endif # BOARD_NRF52_BLENANO2
``` | /content/code_sandbox/boards/particle/nrf52_blenano2/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 42 |
```unknown
/*
*/
&pinctrl {
uart0_default: uart0_default {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 29)>,
<NRF_PSEL(UART_RX, 0, 30)>,
<NRF_PSEL(UART_RTS, 0, 2)>,
<NRF_PSEL(UART_CTS, 0, 28)>;
};
};
uart0_sleep: uart0_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 29)>,
<NRF_PSEL(UART_RX, 0, 30)>,
<NRF_PSEL(UART_RTS, 0, 2)>,
<NRF_PSEL(UART_CTS, 0, 28)>;
low-power-enable;
};
};
i2c0_default: i2c0_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 28)>,
<NRF_PSEL(TWIM_SCL, 0, 2)>;
};
};
i2c0_sleep: i2c0_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 28)>,
<NRF_PSEL(TWIM_SCL, 0, 2)>;
low-power-enable;
};
};
};
``` | /content/code_sandbox/boards/particle/nrf52_blenano2/nrf52_blenano2-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 324 |
```yaml
identifier: nrf52_blenano2
name: BLE Nano 2
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 64
flash: 512
``` | /content/code_sandbox/boards/particle/nrf52_blenano2/nrf52_blenano2.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 58 |
```unknown
/*
*
*/
/dts-v1/;
#include <nordic/nrf52832_qfaa.dtsi>
#include "nrf52_blenano2-pinctrl.dtsi"
/ {
model = "Redbear BLE Nano 2";
compatible = "redbear,blenano2";
chosen {
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,bt-mon-uart = &uart0;
zephyr,bt-c2h-uart = &uart0;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
};
/* These aliases are provided for compatibility with samples */
aliases {
led0 = &led0;
watchdog0 = &wdt0;
};
leds {
compatible = "gpio-leds";
led0: led_0 {
gpios = <&gpio0 11 0>;
label = "LED";
};
};
};
&gpiote {
status = "okay";
};
&gpio0 {
status = "okay";
};
&uart0 {
compatible = "nordic,nrf-uart";
current-speed = <115200>;
status = "okay";
pinctrl-0 = <&uart0_default>;
pinctrl-1 = <&uart0_sleep>;
pinctrl-names = "default", "sleep";
};
&i2c0 {
compatible = "nordic,nrf-twim";
status = "okay";
pinctrl-0 = <&i2c0_default>;
pinctrl-1 = <&i2c0_sleep>;
pinctrl-names = "default", "sleep";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 0x8000>;
};
slot0_partition: partition@8000 {
label = "image-0";
reg = <0x00008000 0x34000>;
};
slot1_partition: partition@3c000 {
label = "image-1";
reg = <0x0003c000 0x34000>;
};
scratch_partition: partition@70000 {
label = "image-scratch";
reg = <0x00070000 0xa000>;
};
/*
* The flash starting at 0x0007a000 and ending at
* 0x0007ffff (sectors 122-127) is reserved for use
* by the application.
* Storage partition will be used by FCB/LittleFS/NVS
* if enabled.
*/
storage_partition: partition@7a000 {
label = "storage";
reg = <0x0007a000 0x00006000>;
};
};
};
``` | /content/code_sandbox/boards/particle/nrf52_blenano2/nrf52_blenano2.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 682 |
```cmake
board_runner_args(pyocd "--target=nrf51822")
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
``` | /content/code_sandbox/boards/particle/nrf51_blenano/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```unknown
# nRF51 BLENANO board configuration
config BOARD_NRF51_BLENANO
select SOC_NRF51822_QFAA
``` | /content/code_sandbox/boards/particle/nrf51_blenano/Kconfig.nrf51_blenano | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 30 |
```yaml
identifier: nrf51_blenano
name: BLE Nano
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 16
supported:
- ble
testing:
ignore_tags:
- net
``` | /content/code_sandbox/boards/particle/nrf51_blenano/nrf51_blenano.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 66 |
```unknown
/*
*
*/
/dts-v1/;
#include <nordic/nrf51822_qfaa.dtsi>
#include "nrf51_blenano-pinctrl.dtsi"
/ {
model = "Redbear BLE Nano";
compatible = "redbear,blenano";
chosen {
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,bt-mon-uart = &uart0;
zephyr,bt-c2h-uart = &uart0;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
};
aliases {
led0 = &led0;
watchdog0 = &wdt0;
};
leds {
compatible = "gpio-leds";
led0: led_0 {
gpios = <&gpio0 19 0>;
label = "LED";
};
};
};
&gpiote {
status = "okay";
};
&gpio0 {
status = "okay";
};
&uart0 {
current-speed = <115200>;
status = "okay";
pinctrl-0 = <&uart0_default>;
pinctrl-1 = <&uart0_sleep>;
pinctrl-names = "default", "sleep";
};
``` | /content/code_sandbox/boards/particle/nrf51_blenano/nrf51_blenano.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 288 |
```restructuredtext
.. _nrf52_blenano2:
Redbear Labs Nano v2
####################
Overview
********
The Nano v2 is a development board equipped with Nordic's next generation nRF52832 Bluetooth Low Energy SOC.
This board was designed as a 'drop-in' replacement of BLE Nano with exactly the same form factor.
Hardware
********
- nRF52832 SoC is built around a 32-bit ARM Cortex-M4F CPU with 512kB flash + 64kB RAM
- 11 x Digital I/0
- 1 UART with hardware flow control ( 4 I/O pins occupied )
- 1 I2C ( 2 I/O pins occupied )
Supported Features
==================
The BLE Nano v2 board configuration supports the following hardware features:
+-----------+------------+--------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+======================================+
| NVIC | on-chip | nested vectored interrupt controller |
+-----------+------------+--------------------------------------+
| UART | on-chip | serial port |
+-----------+------------+--------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+--------------------------------------+
| FLASH | on-chip | flash |
+-----------+------------+--------------------------------------+
| RADIO | on-chip | Bluetooth |
+-----------+------------+--------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+--------------------------------------+
Connections and IOs
====================
BLE nano v2 pinout
.. image:: nrf52_blenano2.jpg
:align: center
:alt: NANO2
DAPLink board
.. image:: dap.jpg
:align: center
:alt: DAP
The DAPLink USB board acts as a dongle. DAPLink debug probes appear on the host computer as a USB disk.
It also regulates 5V from USB to 3.3V via the onboard LDO to power Nano v2.
Programming and Debugging
*************************
Applications for the ``nrf52_blenano2`` board configuration can be built and
flashed in the usual way (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Flashing
========
To flash an application, you'll need to connect your BLE Nano 2 with the
DAPLink board, then attach that to your computer via USB.
.. warning::
Be careful to mount the BLE Nano 2 correctly! The side of the board
with the VIN and GND pins should face **towards** the USB
connector.
Now build and flash applications as usual. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nrf52_blenano2
:goals: build flash
Debugging
=========
After mounting the BLE Nano 2 on its DAPLink board as described above,
you can debug an application in the usual way. Here is an example for
the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nrf52_blenano2
:maybe-skip-config:
:goals: debug
References
**********
.. target-notes::
.. _Kickstarter: path_to_url
.. _Github: path_to_url
.. _RedBear Forum: discuss.redbear.cc
``` | /content/code_sandbox/boards/particle/nrf52_blenano2/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 756 |
```cmake
# Suppress "unique_unit_address_if_enabled" to handle the following overlaps:
# - power@40000000 & clock@40000000 & nrf-mpu@40000000
list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled")
``` | /content/code_sandbox/boards/particle/nrf51_blenano/pre_dt_board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 58 |
```yaml
board:
name: nrf51_blenano
vendor: particle
socs:
- name: nrf51822
``` | /content/code_sandbox/boards/particle/nrf51_blenano/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 31 |
```unknown
# enable GPIO
CONFIG_GPIO=y
# enable uart driver
CONFIG_SERIAL=y
# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
``` | /content/code_sandbox/boards/particle/nrf51_blenano/nrf51_blenano_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```unknown
# nRF51 BLENANO board configuration
if BOARD_NRF51_BLENANO
config BT_CTLR
default BT
endif # BOARD_NRF51_BLENANO
``` | /content/code_sandbox/boards/particle/nrf51_blenano/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 38 |
```unknown
/*
*/
&pinctrl {
uart0_default: uart0_default {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 9)>,
<NRF_PSEL(UART_RX, 0, 11)>,
<NRF_PSEL(UART_RTS, 0, 8)>,
<NRF_PSEL(UART_CTS, 0, 10)>;
};
};
uart0_sleep: uart0_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 9)>,
<NRF_PSEL(UART_RX, 0, 11)>,
<NRF_PSEL(UART_RTS, 0, 8)>,
<NRF_PSEL(UART_CTS, 0, 10)>;
low-power-enable;
};
};
};
``` | /content/code_sandbox/boards/particle/nrf51_blenano/nrf51_blenano-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 196 |
```restructuredtext
.. _boards-telink:
Telink Semiconductor
####################
.. toctree::
:maxdepth: 1
:glob:
**/*
``` | /content/code_sandbox/boards/telink/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 35 |
```restructuredtext
.. _nrf51_blenano:
Redbear Labs Nano
#################
Overview
********
The Nano is a development board equipped with Nordic's nRF51822 Bluetooth Low Energy SOC.
This board is available on `RedBear Store`_.
Hardware
********
nRF51 BLE Nano has two external oscillators. The frequency of the slow clock
is 32.768 kHz. The frequency of the main clock is 16 MHz.
Supported Features
==================
The nrf51_blenano board configuration supports the following nRF51
hardware features:
+-----------+------------+----------------------+
| Interface | Controller | Driver/Component |
+===========+============+======================+
| NVIC | on-chip | nested vectored |
| | | interrupt controller |
+-----------+------------+----------------------+
| RTC | on-chip | system clock |
+-----------+------------+----------------------+
| UART | on-chip | serial port |
+-----------+------------+----------------------+
| GPIO | on-chip | gpio |
+-----------+------------+----------------------+
| FLASH | on-chip | flash |
+-----------+------------+----------------------+
| RADIO | on-chip | Bluetooth |
+-----------+------------+----------------------+
Connections and IOs
====================
BLE nano pinout
.. image:: img/nrf51_blenano.jpg
:align: center
:alt: BLE Nano
DAPLink board
.. image:: img/daplink.jpg
:align: center
:alt: DAPLink
The DAPLink USB board acts as a dongle. DAPLink debug probes appear on the host computer as a USB disk.
It also regulates 5V from USB to 3.3V via the onboard LDO to power Nano.
More information about Nano and DAPLink can be found at the `RedBear Github`_.
Programming and Debugging
*************************
Applications for the ``nrf51_blenano`` board configuration can be built and
flashed in the usual way (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Flashing
========
To flash an application, you'll need to connect your BLE Nano with the
DAPLink board, then attach that to your computer via USB.
.. warning::
Be careful to mount the BLE Nano correctly! The side of the board
with the VIN and GND pins should face **towards** the USB connector.
The `RedBear Store`_ page links to a tutorial video that shows how to
properly solder headers and assemble the DAPLink and BLE Nano boards.
Now build and flash applications as usual. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nrf51_blenano
:goals: build flash
Debugging
=========
After mounting the BLE Nano on its DAPLink board as described above,
you can debug an application in the usual way. Here is an example for
the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nrf51_blenano
:maybe-skip-config:
:goals: debug
References
**********
.. target-notes::
.. _RedBear Store: path_to_url
.. _RedBear Github: path_to_url
``` | /content/code_sandbox/boards/particle/nrf51_blenano/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 747 |
```cmake
board_runner_args(spi_burn)
include(${ZEPHYR_BASE}/boards/common/spi_burn.board.cmake)
``` | /content/code_sandbox/boards/telink/tlsr9518adk80d/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 28 |
```unknown
/*
*
*/
#include <zephyr/dt-bindings/pinctrl/b91-pinctrl.h>
&pinctrl {
/* Set pad-mul-sel register value.
* Note: Pins functions below (pinmux = <...>) depend on this value.
*/
pad-mul-sel = <1>;
/* UART0: TX(PB2), RX(PB3) */
uart0_tx_pb2_default: uart0_tx_pb2_default {
pinmux = <B91_PINMUX_SET(B91_PORT_B, B91_PIN_2, B91_FUNC_C)>;
};
uart0_rx_pb3_default: uart0_rx_pb3_default {
pinmux = <B91_PINMUX_SET(B91_PORT_B, B91_PIN_3, B91_FUNC_C)>;
};
/* UART1: TX(PC6), RX(PC7) */
uart1_tx_pc6_default: uart1_tx_pc6_default {
pinmux = <B91_PINMUX_SET(B91_PORT_C, B91_PIN_6, B91_FUNC_C)>;
};
uart1_rx_pc7_default: uart1_rx_pc7_default {
pinmux = <B91_PINMUX_SET(B91_PORT_C, B91_PIN_7, B91_FUNC_C)>;
};
/* PWM Channel 0 (PB4) */
pwm_ch0_pb4_default: pwm_ch0_pb4_default {
pinmux = <B91_PINMUX_SET(B91_PORT_B, B91_PIN_4, B91_FUNC_B)>;
};
/* PSPI: CLK(PC5), MOSI(PC7), MISO(PC6) */
pspi_clk_pc5_default: pspi_clk_pc5_default {
pinmux = <B91_PINMUX_SET(B91_PORT_C, B91_PIN_5, B91_FUNC_A)>;
};
pspi_mosi_pc7_default: pspi_mosi_pc7_default {
pinmux = <B91_PINMUX_SET(B91_PORT_C, B91_PIN_7, B91_FUNC_A)>;
};
pspi_miso_pc6_default: pspi_miso_pc6_default {
pinmux = <B91_PINMUX_SET(B91_PORT_C, B91_PIN_6, B91_FUNC_A)>;
};
/* HSPI: CLK(PA2), MOSI(PA4), MISO(PA3) */
hspi_clk_pa2_default: hspi_clk_pa2_default {
pinmux = <B91_PINMUX_SET(B91_PORT_A, B91_PIN_2, B91_FUNC_C)>;
};
hspi_mosi_pa4_default: hspi_mosi_pa4_default {
pinmux = <B91_PINMUX_SET(B91_PORT_A, B91_PIN_4, B91_FUNC_C)>;
};
hspi_miso_pa3_default: hspi_miso_pa3_default {
pinmux = <B91_PINMUX_SET(B91_PORT_A, B91_PIN_3, B91_FUNC_C)>;
};
/* Define I2C pins: SCL(PE1), SDA(PE3) */
i2c_scl_pe1_default: i2c_scl_pe1_default {
pinmux = <B91_PINMUX_SET(B91_PORT_E, B91_PIN_1, B91_FUNC_A)>;
};
i2c_sda_pe3_default: i2c_sda_pe3_default {
pinmux = <B91_PINMUX_SET(B91_PORT_E, B91_PIN_3, B91_FUNC_A)>;
};
};
``` | /content/code_sandbox/boards/telink/tlsr9518adk80d/tlsr9518adk80d-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 768 |
```yaml
identifier: tlsr9518adk80d
name: Telink TLSR9518ADK80D
type: mcu
arch: riscv
toolchain:
- cross-compile
- zephyr
ram: 128
flash: 1024
supported:
- gpio
- i2c
- pwm
- spi
- netif:openthread
vendor: telink
``` | /content/code_sandbox/boards/telink/tlsr9518adk80d/tlsr9518adk80d.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 96 |
```unknown
config BOARD_TLSR9518ADK80D
select SOC_TLSR9518
``` | /content/code_sandbox/boards/telink/tlsr9518adk80d/Kconfig.tlsr9518adk80d | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 20 |
```unknown
CONFIG_GPIO=y
CONFIG_SYS_CLOCK_TICKS_PER_SEC=1000
CONFIG_HEAP_MEM_POOL_SIZE=4096
CONFIG_UART_INTERRUPT_DRIVEN=y
CONFIG_SERIAL=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# HW DSP options
CONFIG_TELINK_B91_HWDSP=n
``` | /content/code_sandbox/boards/telink/tlsr9518adk80d/tlsr9518adk80d_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 62 |
```yaml
board:
name: tlsr9518adk80d
vendor: telink
socs:
- name: tlsr9518
``` | /content/code_sandbox/boards/telink/tlsr9518adk80d/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 34 |
```unknown
if BOARD_TLSR9518ADK80D
config SOC_FLASH_TELINK_B91
default y if FLASH
# Workaround for not being able to have commas in macro arguments
DT_CHOSEN_Z_CODE_PARTITION := zephyr,code-partition
config FLASH_LOAD_OFFSET
default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_CODE_PARTITION)) if USE_DT_CODE_PARTITION
# Buffer for image writter shall be less(multiple of access alignment) or
# equal to flash page. tlsr9518adk80d boards use external P25Q16 IC as
# flesh memory. Flash page size of the IC is 256 bytes. So that, it is
# maximum image writer buffer size for such kind of boards.
config IMG_BLOCK_BUF_SIZE
default 256 if MCUBOOT_IMG_MANAGER
endif
``` | /content/code_sandbox/boards/telink/tlsr9518adk80d/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 176 |
```unknown
/*
*
*/
/dts-v1/;
#include <freq.h>
#include <telink/telink_b91.dtsi>
#include "tlsr9518adk80d-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "telink,b91";
compatible = "telink,tlsr9518adk80d";
aliases {
led0 = &led_blue;
led1 = &led_green;
led2 = &led_white;
led3 = &led_red;
sw0 = &key_1;
pwm-led0 = &pwm_led_blue;
pwm-0 = &pwm0;
};
leds {
compatible = "gpio-leds";
led_blue: led_0 {
gpios = <&gpiob 4 GPIO_ACTIVE_HIGH>;
label = "LED Blue";
};
led_green: led_1 {
gpios = <&gpiob 5 GPIO_ACTIVE_HIGH>;
label = "LED Green";
};
led_white: led_2 {
gpios = <&gpiob 6 GPIO_ACTIVE_HIGH>;
label = "LED White";
};
led_red: led_3 {
gpios = <&gpiob 7 GPIO_ACTIVE_HIGH>;
label = "LED Red";
};
};
pwm_leds {
compatible = "pwm-leds";
pwm_led_blue: pwm_led_0 {
pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
label = "PWM LED Blue";
};
};
keys {
compatible = "gpio-keys";
key_1: button_1 {
label = "User KEY1";
gpios = <&gpioc 2 GPIO_PULL_DOWN>;
zephyr,code = <INPUT_KEY_0>;
};
};
chosen {
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,sram = &ram_dlm;
zephyr,flash = &flash;
zephyr,flash-controller = &flash_mspi;
zephyr,entropy = &trng0;
zephyr,code-partition = &slot0_partition;
zephyr,ieee802154 = &ieee802154;
};
};
&cpu0 {
clock-frequency = <48000000>;
};
&ram_ilm {
reg = <0x00000000 0x00020000>;
};
&ram_dlm {
reg = <0x00080000 0x00020000>;
};
&flash {
reg = <0x20000000 0x100000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 0x10000>;
};
slot0_partition: partition@10000 {
label = "image-0";
reg = <0x10000 0x70000>;
};
slot1_partition: partition@80000 {
label = "image-1";
reg = <0x80000 0x70000>;
};
scratch_partition: partition@f0000 {
label = "image-scratch";
reg = <0xf0000 0x4000>;
};
storage_partition: partition@f4000 {
label = "storage";
reg = <0xf4000 0x0000b000>;
/* region <0xff000 0x1000> is reserved for Telink B91 SDK's data */
};
};
};
&gpiob {
status = "okay";
};
&gpioc {
interrupts = <25 1>;
status = "okay";
};
&uart0 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart0_tx_pb2_default &uart0_rx_pb3_default>;
pinctrl-names = "default";
};
&trng0 {
status = "okay";
};
&ieee802154 {
status = "okay";
};
&pwm0 {
status = "okay";
clock-frequency = <93750>;
pinctrl-0 = <&pwm_ch0_pb4_default>;
pinctrl-names = "default";
};
&pspi {
status = "okay";
cs0-pin = "PSPI_CSN_PC4";
pinctrl-0 = <&pspi_clk_pc5_default &pspi_miso_pc6_default &pspi_mosi_pc7_default>;
pinctrl-names = "default";
};
&hspi {
status = "okay";
cs0-pin = "HSPI_CSN_PA1";
pinctrl-0 = <&hspi_clk_pa2_default &hspi_miso_pa3_default &hspi_mosi_pa4_default>;
pinctrl-names = "default";
};
&i2c {
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
pinctrl-0 = <&i2c_scl_pe1_default &i2c_sda_pe3_default>;
pinctrl-names = "default";
};
&adc {
status = "okay";
vref-internal-mv = <1200>;
sample-freq = <DT_FREQ_K(96)>;
};
``` | /content/code_sandbox/boards/telink/tlsr9518adk80d/tlsr9518adk80d.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,199 |
```restructuredtext
.. _boards-innblue:
innblue
#######
.. toctree::
:maxdepth: 1
:glob:
**/*
``` | /content/code_sandbox/boards/innblue/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 33 |
```cmake
board_runner_args(jlink "--device=nRF9160_xxAA" "--speed=4000")
include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/innblue/innblue22/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 56 |
```unknown
# Enable MPU
CONFIG_ARM_MPU=y
# Enable TrustZone-M
CONFIG_ARM_TRUSTZONE_M=y
# Enable GPIO
CONFIG_GPIO=y
# Enable UART driver
CONFIG_SERIAL=y
# Enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
``` | /content/code_sandbox/boards/innblue/innblue22/innblue22_nrf9160_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 56 |
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