text stringlengths 9 39.2M | dir stringlengths 25 226 | lang stringclasses 163 values | created_date timestamp[s] | updated_date timestamp[s] | repo_name stringclasses 751 values | repo_full_name stringclasses 752 values | star int64 1.01k 183k | len_tokens int64 1 18.5M |
|---|---|---|---|---|---|---|---|---|
```restructuredtext
.. _boards-udoo:
UDOO
####
.. toctree::
:maxdepth: 1
:glob:
**/*
``` | /content/code_sandbox/boards/udoo/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 33 |
```unknown
#
#
#
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
CONFIG_GPIO=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=227000000
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/udoo/udoo_neo_full/udoo_neo_full_mcimx6x_m4_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 47 |
```cmake
#
#
#
board_runner_args(jlink "--device=Cortex-M4")
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/udoo/udoo_neo_full/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```yaml
#
#
#
identifier: udoo_neo_full/mcimx6x/m4
name: UDOO Neo Full
type: mcu
arch: arm
ram: 32
flash: 512
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- counter
- gpio
- uart
vendor: nxp
``` | /content/code_sandbox/boards/udoo/udoo_neo_full/udoo_neo_full_mcimx6x_m4.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 87 |
```yaml
board:
name: udoo_neo_full
vendor: udoo
socs:
- name: mcimx6x
``` | /content/code_sandbox/boards/udoo/udoo_neo_full/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```unknown
config BOARD_UDOO_NEO_FULL
select SOC_PART_NUMBER_MCIMX6X4EVM10AB
select SOC_MCIMX6X_M4 if BOARD_UDOO_NEO_FULL_MCIMX6X_M4
``` | /content/code_sandbox/boards/udoo/udoo_neo_full/Kconfig.udoo_neo_full | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 49 |
```unknown
/*
*
*/
/dts-v1/;
#include <mem.h>
/*
* Determines the address and size for code memory which will be applied
* when "zephyr,flash = &flash". Use this to select a custom region,
* usually within DDR.
*/
#define DT_FLASH_SIZE DT_SIZE_K(512)
#define DT_FLASH_ADDR 84000000 /* DT_ADDR will add leading 0x where needed */
/*
* Determines the address and size for data memory which will be applied
* when "zephyr,sram = &sram". Use this to select a custom region,
* usually within DDR.
*/
#define DT_SRAM_SIZE DT_SIZE_K(128)
#define DT_SRAM_ADDR 84080000 /* DT_ADDR will add leading 0x where needed */
#include <nxp/nxp_imx6sx_m4.dtsi>
#include "udoo_neo_full-pinctrl.dtsi"
/ {
model = "UDOO Neo Full board";
compatible = "nxp,mcmcimx6x_m4";
aliases {
led0 = &red_led;
};
chosen {
zephyr,flash = &flash;
zephyr,sram = &tcmu;
zephyr,console = &uart5;
zephyr,shell-uart = &uart5;
};
leds {
compatible = "gpio-leds";
red_led: led_0 {
gpios = <&gpio4 6 0>;
label = "User LD1";
};
};
};
&uart5 {
status = "okay";
current-speed = <115200>;
modem-mode = <0>;
pinctrl-0 = <&uart5_default>;
pinctrl-names = "default";
};
&gpio4 {
status = "okay";
};
&gpio5 {
status = "okay";
};
&gpio6 {
status = "okay";
};
&mub {
status = "okay";
};
&epit1 {
status = "okay";
};
&epit2 {
status = "okay";
};
``` | /content/code_sandbox/boards/udoo/udoo_neo_full/udoo_neo_full_mcimx6x_m4.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 437 |
```unknown
/*
*
*/
#include <nxp/nxp_imx/mimx6sx-pinctrl.dtsi>
&pinctrl {
uart5_default: uart5_default {
group0 {
pinmux = <&mx6sx_pad_sd4_data4__uart5_dte_tx>,
<&mx6sx_pad_sd4_data5__uart5_dte_rx>;
input-schmitt-enable;
slew-rate = "fast";
drive-strength = "r0-6";
nxp,speed = "150-mhz";
bias-pull-up;
bias-pull-up-value="100k";
};
};
};
``` | /content/code_sandbox/boards/udoo/udoo_neo_full/udoo_neo_full-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 143 |
```restructuredtext
.. _heltec_wifi_lora32_v2:
Heltec WiFi LoRa 32 (V2)
########################
Overview
********
Heltec WiFi LoRa 32 is a classic IoT dev-board designed & produced by Heltec Automation(TM), it's a highly
integrated product based on ESP32 + SX127x, it has Wi-Fi, BLE, LoRa functions, also Li-Po battery management
system, 0.96" OLED are also included. [1]_
The features include the following:
- Microprocessor: ESP32 (dual-core 32-bit MCU + ULP core)
- LoRa node chip SX1276/SX1278
- Micro USB interface with a complete voltage regulator, ESD protection, short circuit protection,
RF shielding, and other protection measures
- Onboard SH1.25-2 battery interface, integrated lithium battery management system
- Integrated WiFi, LoRa, Bluetooth three network connections, onboard Wi-Fi, Bluetooth dedicated 2.4GHz
metal 3D antenna, reserved IPEX (U.FL) interface for LoRa use
- Onboard 0.96-inch 128*64 dot matrix OLED display
- Integrated CP2102 USB to serial port chip
System requirements
*******************
Prerequisites
=============
Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command
below to retrieve those files.
.. code-block:: console
west blobs fetch hal_espressif
.. note::
It is recommended running the command above after :file:`west update`.
Building & Flashing
*******************
Simple boot
===========
The board could be loaded using the single binary image, without 2nd stage bootloader.
It is the default option when building the application without additional configuration.
.. note::
Simple boot does not provide any security features nor OTA updates.
MCUboot bootloader
==================
User may choose to use MCUboot bootloader instead. In that case the bootloader
must be build (and flash) at least once.
There are two options to be used when building an application:
1. Sysbuild
2. Manual build
.. note::
User can select the MCUboot bootloader by adding the following line
to the board default configuration file.
.. code:: cfg
CONFIG_BOOTLOADER_MCUBOOT=y
Sysbuild
========
The sysbuild makes possible to build and flash all necessary images needed to
bootstrap the board with the ESP32 SoC.
To build the sample application using sysbuild use the command:
.. zephyr-app-commands::
:tool: west
:app: samples/hello_world
:board: heltec_wifi_lora32_v2
:goals: build
:west-args: --sysbuild
:compact:
By default, the ESP32 sysbuild creates bootloader (MCUboot) and application
images. But it can be configured to create other kind of images.
Build directory structure created by sysbuild is different from traditional
Zephyr build. Output is structured by the domain subdirectories:
.. code-block::
build/
hello_world
zephyr
zephyr.elf
zephyr.bin
mcuboot
zephyr
zephyr.elf
zephyr.bin
domains.yaml
.. note::
With ``--sysbuild`` option the bootloader will be re-build and re-flash
every time the pristine build is used.
For more information about the system build please read the :ref:`sysbuild` documentation.
Manual build
============
During the development cycle, it is intended to build & flash as quickly possible.
For that reason, images can be build one at a time using traditional build.
The instructions following are relevant for both manual build and sysbuild.
The only difference is the structure of the build directory.
.. note::
Remember that bootloader (MCUboot) needs to be flash at least once.
Build and flash applications as usual (see :ref:`build_an_application` and
:ref:`application_run` for more details).
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: heltec_wifi_lora32_v2/esp32/procpu
:goals: build
The usual ``flash`` target will work with the ``heltec_wifi_lora32_v2`` board
configuration. Here is an example for the :ref:`hello_world`
application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: heltec_wifi_lora32_v2/esp32/procpu
:goals: flash
Open the serial monitor using the following command:
.. code-block:: shell
west espressif monitor
After the board has automatically reset and booted, you should see the following
message in the monitor:
.. code-block:: console
***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx *****
Hello World! heltec_wifi_lora32_v2
Debugging
*********
As with much custom hardware, the ESP32 modules require patches to
OpenOCD that are not upstreamed yet. Espressif maintains their own fork of
the project. The custom OpenOCD can be obtained at `OpenOCD ESP32`_
The Zephyr SDK uses a bundled version of OpenOCD by default. You can overwrite that behavior by adding the
``-DOPENOCD=<path/to/bin/openocd> -DOPENOCD_DEFAULT_PATH=<path/to/openocd/share/openocd/scripts>``
parameter when building.
Here is an example for building the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: heltec_wifi_lora32_v2/esp32/procpu
:goals: build flash
:gen-args: -DOPENOCD=<path/to/bin/openocd> -DOPENOCD_DEFAULT_PATH=<path/to/openocd/share/openocd/scripts>
You can debug an application in the usual way. Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: heltec_wifi_lora32_v2/esp32/procpu
:goals: debug
Utilizing Hardware Features
***************************
Onboard OLED display
====================
The onboard OLED display is of type ``ssd1306``, has 128*64 pixels and is
connected via I2C. It can therefore be used by enabling the
:ref:`ssd1306_128_shield` as shown in the following for the :zephyr:code-sample:`lvgl` sample:
.. zephyr-app-commands::
:zephyr-app: samples/subsys/display/lvgl
:board: heltec_wifi_lora32_v2/esp32/procpu
:shield: ssd1306_128x64
:goals: flash
References
**********
- `Heltec WiFi LoRa (v2) Pinout Diagram <path_to_url`_
- `Heltec WiFi LoRa (v2) Schematic Diagrams <path_to_url`_
- `ESP32 Toolchain <path_to_url#xtensa-esp32-elf>`_
- `esptool documentation <path_to_url`_
- `OpenOCD ESP32 <path_to_url`_
.. [1] path_to_url
``` | /content/code_sandbox/boards/heltec/heltec_wifi_lora32_v2/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,586 |
```restructuredtext
.. _boards-raspberrypi:
Raspberry Pi Foundation
#######################
.. toctree::
:maxdepth: 1
:glob:
**/*
``` | /content/code_sandbox/boards/raspberrypi/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 38 |
```unknown
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=125000000
CONFIG_SERIAL=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_GPIO=y
CONFIG_USE_DT_CODE_PARTITION=y
CONFIG_BUILD_OUTPUT_UF2=y
CONFIG_BUILD_OUTPUT_HEX=y
CONFIG_UART_INTERRUPT_DRIVEN=y
CONFIG_RESET=y
CONFIG_CLOCK_CONTROL=y
``` | /content/code_sandbox/boards/raspberrypi/rpi_pico/rpi_pico_rp2040_w_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 69 |
```unknown
/*
*
*/
#include <freq.h>
#include <rpi_pico/rp2040.dtsi>
#include "rpi_pico-pinctrl.dtsi"
#include <zephyr/dt-bindings/pwm/pwm.h>
#include <zephyr/dt-bindings/i2c/i2c.h>
/ {
chosen {
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,flash-controller = &ssi;
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,code-partition = &code_partition;
};
aliases {
rtc = &rtc;
watchdog0 = &wdt0;
};
pico_header: connector {
compatible = "raspberrypi,pico-header";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpio0 0 0>, /* GP0 */
<1 0 &gpio0 1 0>, /* GP1 */
<2 0 &gpio0 2 0>, /* GP2 */
<3 0 &gpio0 3 0>, /* GP3 */
<4 0 &gpio0 4 0>, /* GP4 */
<5 0 &gpio0 5 0>, /* GP5 */
<6 0 &gpio0 6 0>, /* GP6 */
<7 0 &gpio0 7 0>, /* GP7 */
<8 0 &gpio0 8 0>, /* GP8 */
<9 0 &gpio0 9 0>, /* GP9 */
<10 0 &gpio0 10 0>, /* GP10 */
<11 0 &gpio0 11 0>, /* GP11 */
<12 0 &gpio0 12 0>, /* GP12 */
<13 0 &gpio0 13 0>, /* GP13 */
<14 0 &gpio0 14 0>, /* GP14 */
<15 0 &gpio0 15 0>, /* GP15 */
<16 0 &gpio0 16 0>, /* GP16 */
<17 0 &gpio0 17 0>, /* GP17 */
<18 0 &gpio0 18 0>, /* GP18 */
<19 0 &gpio0 19 0>, /* GP19 */
<20 0 &gpio0 20 0>, /* GP20 */
<21 0 &gpio0 21 0>, /* GP21 */
<22 0 &gpio0 22 0>, /* GP22 */
<26 0 &gpio0 26 0>, /* GP26 */
<27 0 &gpio0 27 0>, /* GP27 */
<28 0 &gpio0 28 0>; /* GP28 */
};
};
&flash0 {
reg = <0x10000000 DT_SIZE_M(2)>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* Reserved memory for the second stage bootloader */
second_stage_bootloader: partition@0 {
label = "second_stage_bootloader";
reg = <0x00000000 0x100>;
read-only;
};
/*
* Usable flash. Starts at 0x100, after the bootloader. The partition
* size is 2MB minus the 0x100 bytes taken by the bootloader.
*/
code_partition: partition@100 {
label = "code-partition";
reg = <0x100 (DT_SIZE_M(2) - 0x100)>;
read-only;
};
};
};
&clocks {
pinctrl-0 = <&clocks_default>;
pinctrl-names = "default";
};
&uart0 {
current-speed = <115200>;
status = "okay";
pinctrl-0 = <&uart0_default>;
pinctrl-names = "default";
};
&gpio0 {
status = "okay";
};
&i2c0 {
clock-frequency = <I2C_BITRATE_STANDARD>;
status = "okay";
pinctrl-0 = <&i2c0_default>;
pinctrl-names = "default";
};
&i2c1 {
pinctrl-0 = <&i2c1_default>;
pinctrl-names = "default";
status = "disabled";
clock-frequency = <I2C_BITRATE_FAST>;
};
&spi0 {
clock-frequency = <DT_FREQ_M(8)>;
status = "okay";
pinctrl-0 = <&spi0_default>;
pinctrl-names = "default";
};
&timer {
status = "okay";
};
&wdt0 {
status = "okay";
};
&rtc {
clocks = <&clocks RPI_PICO_CLKID_CLK_RTC>;
status = "okay";
};
&adc {
status = "okay";
pinctrl-0 = <&adc_default>;
pinctrl-names = "default";
};
zephyr_udc0: &usbd {
status = "okay";
};
&pwm {
pinctrl-0 = <&pwm_ch4b_default>;
pinctrl-names = "default";
divider-int-0 = <255>;
};
&vreg {
regulator-always-on;
regulator-allowed-modes = <REGULATOR_RPI_PICO_MODE_NORMAL>;
};
pico_spi: &spi0 {};
pico_i2c0: &i2c0 {};
pico_i2c1: &i2c1 {};
pico_serial: &uart0 {};
``` | /content/code_sandbox/boards/raspberrypi/rpi_pico/rpi_pico-common.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,319 |
```cmake
# This configuration allows selecting what debug adapter debugging rpi_pico
# by a command-line argument.
# It is mainly intended to support both the 'picoprobe' and 'raspberrypi-swd'
# adapter described in "Getting started with Raspberry Pi Pico".
# And any other SWD debug adapter might also be usable with this configuration.
# Set RPI_PICO_DEBUG_ADAPTER to select debug adapter by command-line arguments.
# e.g.) west build -b rpi_pico -- -DRPI_PICO_DEBUG_ADAPTER=raspberrypi-swd
# The value is treated as a part of an interface file name that
# the debugger's configuration file.
# The value must be the 'stem' part of the name of one of the files
# in the openocd interface configuration file.
# The setting is store to CMakeCache.txt.
if ("${RPI_PICO_DEBUG_ADAPTER}" STREQUAL "")
set(RPI_PICO_DEBUG_ADAPTER "cmsis-dap")
endif()
board_runner_args(openocd --cmd-pre-init "source [find interface/${RPI_PICO_DEBUG_ADAPTER}.cfg]")
board_runner_args(openocd --cmd-pre-init "transport select swd")
board_runner_args(openocd --cmd-pre-init "source [find target/rp2040.cfg]")
# The adapter speed is expected to be set by interface configuration.
# But if not so, set 2000 to adapter speed.
board_runner_args(openocd --cmd-pre-init "set_adapter_speed_if_not_set 2000")
board_runner_args(jlink "--device=RP2040_M0_0")
board_runner_args(uf2 "--board-id=RPI-RP2")
board_runner_args(pyocd "--target=rp2040")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
include(${ZEPHYR_BASE}/boards/common/uf2.board.cmake)
include(${ZEPHYR_BASE}/boards/common/blackmagicprobe.board.cmake)
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
``` | /content/code_sandbox/boards/raspberrypi/rpi_pico/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 450 |
```yaml
identifier: rpi_pico/rp2040/w
name: RaspberryPi-Pico-w
type: mcu
arch: arm
flash: 2048
ram: 264
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- uart
- gpio
- adc
- i2c
- spi
- hwinfo
- watchdog
- pwm
- flash
- dma
- pio
- counter
- clock
``` | /content/code_sandbox/boards/raspberrypi/rpi_pico/rpi_pico_rp2040_w.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 120 |
```unknown
/*
*
*/
/dts-v1/;
#include "rpi_pico-common.dtsi"
/ {
leds {
compatible = "gpio-leds";
led0: led_0 {
gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>;
label = "LED";
};
};
pwm_leds {
compatible = "pwm-leds";
status = "disabled";
pwm_led0: pwm_led_0 {
pwms = <&pwm 9 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
label = "PWM_LED";
};
};
aliases {
led0 = &led0;
pwm-led0 = &pwm_led0;
};
};
``` | /content/code_sandbox/boards/raspberrypi/rpi_pico/rpi_pico.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 163 |
```unknown
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=125000000
CONFIG_SERIAL=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_GPIO=y
CONFIG_USE_DT_CODE_PARTITION=y
CONFIG_BUILD_OUTPUT_UF2=y
CONFIG_BUILD_OUTPUT_HEX=y
CONFIG_UART_INTERRUPT_DRIVEN=y
CONFIG_RESET=y
CONFIG_CLOCK_CONTROL=y
``` | /content/code_sandbox/boards/raspberrypi/rpi_pico/rpi_pico_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 69 |
```yaml
identifier: rpi_pico
name: RaspberryPi-Pico
type: mcu
arch: arm
flash: 2048
ram: 264
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- uart
- gpio
- adc
- i2c
- spi
- hwinfo
- watchdog
- pwm
- flash
- dma
- counter
- clock
``` | /content/code_sandbox/boards/raspberrypi/rpi_pico/rpi_pico.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 109 |
```unknown
/*
*/
#include <zephyr/dt-bindings/pinctrl/rpi-pico-rp2040-pinctrl.h>
&pinctrl {
uart0_default: uart0_default {
group1 {
pinmux = <UART0_TX_P0>;
};
group2 {
pinmux = <UART0_RX_P1>;
input-enable;
};
};
i2c0_default: i2c0_default {
group1 {
pinmux = <I2C0_SDA_P4>, <I2C0_SCL_P5>;
input-enable;
input-schmitt-enable;
};
};
i2c1_default: i2c1_default {
group1 {
pinmux = <I2C1_SDA_P6>, <I2C1_SCL_P7>;
input-enable;
input-schmitt-enable;
};
};
spi0_default: spi0_default {
group1 {
pinmux = <SPI0_CSN_P17>, <SPI0_SCK_P18>, <SPI0_TX_P19>;
};
group2 {
pinmux = <SPI0_RX_P16>;
input-enable;
};
};
pwm_ch4b_default: pwm_ch4b_default {
group1 {
pinmux = <PWM_4B_P25>;
};
};
adc_default: adc_default {
group1 {
pinmux = <ADC_CH0_P26>, <ADC_CH1_P27>, <ADC_CH2_P28>, <ADC_CH3_P29>;
input-enable;
};
};
clocks_default: clocks_default {
};
};
``` | /content/code_sandbox/boards/raspberrypi/rpi_pico/rpi_pico-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 364 |
```yaml
board:
name: rpi_pico
vendor: raspberrypi
socs:
- name: rp2040
variants:
- name: w
``` | /content/code_sandbox/boards/raspberrypi/rpi_pico/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 40 |
```unknown
if BOARD_RPI_PICO
config RP2_FLASH_W25Q080
default y
if I2C_DW
config I2C_DW_CLOCK_SPEED
default 125
endif # I2C_DW
config USB_SELF_POWERED
default n
endif # BOARD_RPI_PICO
``` | /content/code_sandbox/boards/raspberrypi/rpi_pico/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 66 |
```unknown
/*
*
*/
/dts-v1/;
#include "rpi_pico-common.dtsi"
``` | /content/code_sandbox/boards/raspberrypi/rpi_pico/rpi_pico_rp2040_w.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 21 |
```restructuredtext
.. _udoo_neo_full:
UDOO Neo Full
#############
Overview
********
UDOO Neo Full is an open source Arduino Uno compatible single board computer.
It is equipped with an NXP |reg| i.MX 6SoloX hybrid multicore processor
composed of one ARM |reg| Cortex-A9 core running up to 1 GHz and one Cortex-M4
core running up to 227 MHz for high CPU performance and real-time response.
Zephyr was ported to run on the Cortex-M4 core only. In a future release, it
will also communicate with the Cortex-A9 core (running Linux) via OpenAMP.
.. figure:: udoo_neo_full_mcimx6x_m4.jpg
:align: center
:alt: UDOO-Neo-Full
UDOO Neo Full (Credit: udoo.org)
Hardware
********
- MCIMX6X MCU with a single Cortex-A9 (1 GHz) core and single Cortex-M4 (227 MHz) core
- Memory
- 1 GB RAM
- 128 KB OCRAM
- 256 KB L2 cache (can be switched into OCRAM instead)
- 16 KB OCRAM_S
- 32 KB TCML
- 32 KB TCMU
- 32 KB CAAM (secure RAM)
- A9 Boot Devices
- NOR flash
- NAND flash
- OneNAND flash
- SD/MMC
- Serial (I2C/SPI) NOR flash and EEPROM
- QuadSPI (QSPI) flash
- Display
- Micro HDMI connector
- LVDS display connector
- Touch (I2C signals)
- Multimedia
- Integrated 2d/3d graphics controller
- 8-bit parallel interface for analog camera supporting NTSC and PAL
- HDMI audio transmitter
- S/PDIF
- I2S
- Connectivity
- USB 2.0 Type A port
- USB OTG (micro-AB connector)
- 10/100 Mbit/s Ethernet PHY
- Wi-Fi 802.11 b/g/n
- Bluetooth 4.0 Low Energy
- 3x UART ports
- 2x CAN Bus interfaces
- 8x PWM signals
- 3x I2C interface
- 1x SPI interface
- 6x multiplexable signals
- 32x GPIO (A9)
- 22x GPIO (M4)
- Other
- MicroSD card slot (8-bit SDIO interface)
- Power status LED (green)
- 2x user LED (red and orange)
- Power
- 5 V DC Micro USB
- 6-15 V DC jack
- RTC battery connector
- Debug
- pads for soldering of JTAG 14-pin connector
- Sensor
- 3-Axis Accelerometer
- 3-Axis Magnetometer
- 3-Axis Digital Gyroscope
- 1x Sensor Snap-In I2C connector
- Expansion port
- Arduino interface
For more information about the MCIMX6X SoC and UDOO Neo Full board,
see these references:
- `NXP i.MX 6SoloX Website`_
- `NXP i.MX 6SoloX Datasheet`_
- `NXP i.MX 6SoloX Reference Manual`_
- `UDOO Neo Website`_
- `UDOO Neo Getting Started`_
- `UDOO Neo Documentation`_
- `UDOO Neo Datasheet`_
- `UDOO Neo Schematics`_
Supported Features
==================
The UDOO Neo Full board configuration supports the following hardware
features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | general purpose input/output |
+-----------+------------+-------------------------------------+
| COUNTER | on-chip | counter |
+-----------+------------+-------------------------------------+
The default configuration can be found in the defconfig file:
:zephyr_file:`boards/udoo/udoo_neo_full/udoo_neo_full_mcimx6x_m4_defconfig`
Other hardware features are not currently supported by the port.
Connections and IOs
===================
The UDOO Neo Full board was tested with the following pinmux
controller configuration.
+---------------+-----------------+---------------------------+
| Board Name | SoC Name | Usage |
+===============+=================+===========================+
| J4 RX | UART5_RX_DATA | UART Console |
+---------------+-----------------+---------------------------+
| J4 TX | UART5_TX_DATA | UART Console |
+---------------+-----------------+---------------------------+
System Clock
============
The MCIMX6X SoC is configured to use the 24 MHz external oscillator
on the board with the on-chip PLL to generate core clock.
PLL settings for M4 core are set via code running on the A9 core.
Serial Port
===========
The MCIMX6X SoC has six UARTs. UART5 is configured for the M4 core and the
remaining are used by the A9 core or not used.
Programming and Debugging
*************************
The M4 core does not have a flash memory and is not provided a clock
at power-on-reset. Therefore it needs to be started by the A9 core.
The A9 core is responsible to load the M4 binary application into the RAM,
put the M4 in reset, set the M4 Program Counter and Stack Pointer, and get
the M4 out of reset. The A9 can perform these steps at the bootloader level
or after the Linux system has booted.
The M4 core can use up to 5 different RAMs (some other types of memory like
a secure RAM are not currently implemented in Zephyr).
These are the memory mappings for A9 and M4:
+------------+-----------------------+-----------------------+-----------------------+
| Region | Cortex-A9 | Cortex-M4 | Size |
+============+=======================+=======================+=======================+
| TCML | 0x007F8000-0x007FFFFF | 0x1FFF8000-0x1FFFFFFF | 32 KB |
+------------+-----------------------+-----------------------+-----------------------+
| TCMU | 0x00800000-0x00807FFF | 0x20000000-0x20007FFF | 32 KB |
+------------+-----------------------+-----------------------+-----------------------+
| OCRAM_S | 0x008F8000-0x008FBFFF | 0x208F8000-0x208FBFFF | 16 KB |
+------------+-----------------------+-----------------------+-----------------------+
| OCRAM | 0x00900000-0x0091FFFF | 0x20900000-0x2091FFFF | 128 KB |
+------------+-----------------------+-----------------------+-----------------------+
| DDR | 0x80000000-0xFFFFFFFF | 0x80000000-0xDFFFFFFF | 2048 MB (1536 for M4) |
+------------+-----------------------+-----------------------+-----------------------+
References
==========
- `NXP i.MX 6SoloX Reference Manual`_ Chapter 2 - Memory Maps
You have to choose which RAM will be used at compilation time. This configuration
is done in the file :zephyr_file:`boards/udoo/udoo_neo_full/udoo_neo_full_mcimx6x_m4.dts`.
If you want to have the code placed in the subregion of a memory, which will
likely be the case when using DDR, select "zephyr,flash=&flash" and set the
DT_FLASH_SIZE macro to determine the region size and DT_FLASH_ADDR to determine
the address where the region begins.
If you want to have the data placed in the subregion of a memory, which will
likely be the case when using DDR, select "zephyr,sram = &sram", which sets the
CONFIG_SRAM_SIZE macro to determine the region size and
CONFIG_SRAM_BASE_ADDRESS to determine the address where the region begins.
Otherwise set "zephyr,flash" and/or "zephyr,sram" to one of the predefined
regions:
.. code-block:: none
"zephyr,flash"
- &tcml
- &ocram_s
- &ocram
- &ddr
"zephyr,sram"
- &tcmu
- &ocram_s
- &ocram
- &ddr
Below you will find the instructions how a Linux user space application running
on the A9 core can be used to load and run Zephyr application on the M4 core.
The UDOOBuntu Linux distribution contains a `udooneo-m4uploader`_ utility,
but its purpose is to load UDOO Neo "Arduino-like" sketches, so it doesn't
work with Zephyr applications in most cases. The reason is that there is
an exchange of information between this utility and the program running on the
M4 core using hardcoded shared memory locations. The utility writes a flag which
is read by the program running on the M4 core. The program is then supposed to
end safely and write the status to the shared memory location for the main core.
The utility then loads the new application and reads its status from the shared
memory location to determine if it has successfully launched. Since this
functionality is specific for the UDOO Neo "Arduino-like" sketches, it is not
implemented in Zephyr. However Zephyr applications can support it on their own
if planned to be used along with the UDOOBuntu Linux running on the A9 core.
The udooneo-uploader utility calls another executable named
mqx_upload_on_m4SoloX which can be called directly to load Zephyr applications.
Copy the Zephyr binary image into the Linux filesystem and invoke the utility
as a root user:
.. code-block:: console
mqx_upload_on_m4SoloX zephyr.bin
If the output looks like below, the mqx_upload_on_m4SoloX could not read
the status of the stopped application. This is expected if the previously
loaded application is not a UDOO Neo "Arduino-like" sketch and ignores the
shared memory communication:
.. code-block:: console
UDOONeo - mqx_upload_on_m4SoloX 1.1.0
UDOONeo - Waiting M4 Stop, m4TraceFlags: 00000000
UDOONeo - Waiting M4 Stop, m4TraceFlags: 00000000
UDOONeo - Waiting M4 Stop, m4TraceFlags: 00000000
UDOONeo - Waiting M4 Stop, m4TraceFlags: 00000000
UDOONeo - Failed to Stop M4 sketch: reboot system !
In such situation, the mqx_upload_on_m4SoloX utility has reset the trace flags,
so it will succeed when called again. Then it can have this output below:
.. code-block:: console
UDOONeo - mqx_upload_on_m4SoloX 1.1.0
UDOONeo - FILENAME = zephyr.bin; loadaddr = 0x84000000
UDOONeo - start - end (0x84000000 - 0x84080000)
UDOONeo - Waiting M4 Run, m4TraceFlags: 000001E0
UDOONeo - M4 sketch is running
Or the one below, if the utility cannot read the status flag that the M4 core
applications has started. It can be ignored as the application should be
running, the utility just doesn't know it:
.. code-block:: console
UDOONeo - mqx_upload_on_m4SoloX 1.1.0
UDOONeo - FILENAME = zephyr.bin; loadaddr = 0x84000000
UDOONeo - start - end (0x84000000 - 0x84080000)
UDOONeo - Waiting M4 Run, m4TraceFlags: 00000000
UDOONeo - Waiting M4 Run, m4TraceFlags: 00000000
UDOONeo - Waiting M4 Run, m4TraceFlags: 00000000
UDOONeo - Waiting M4 Run, m4TraceFlags: 00000000
UDOONeo - Failed to Start M4 sketch: reboot system !
The stack pointer and the program counter values are read from the binary.
The memory address where binary will be placed is calculated from the program
counter as its value aligned to 64 KB down, or it can be provided as a second
command line argument:
.. code-block:: console
mqx_upload_on_m4SoloX zephyr.bin 0x84000000
It is necessary to provide the address if the binary is copied into a memory
region which has different mapping between the A9 and the M4 core. The address
calculated from the stack pointer value in the binary file would be wrong.
It is possible to modify the mqx_upload_on_m4SoloX utility source code
to not exchange the information with the M4 core application using shared
memory.
It is also possible to use the `imx-m4fwloader`_ utility to load the M4 core
application.
One option applicable in UDOOBuntu Linux is to copy the binary file into the
file /var/opt/m4/m4last.fw in the Linux filesystem. The next time the system is
booted, Das U-Boot will load it from there.
Another option is to directly use Das U-Boot to load the code.
Debugging
=========
The UDOO Neo Full board includes pads for soldering the 14-pin JTAG
connector. Zephyr applications running on the M4 core have only been
tested by observing UART console output.
References
==========
.. target-notes::
.. _UDOO Neo Website:
path_to_url
.. _UDOO Neo Getting Started:
path_to_url
.. _UDOO Neo Documentation:
path_to_url
.. _UDOO Neo Datasheet:
path_to_url
.. _UDOO Neo Schematics:
path_to_url
.. _Udoo Neo Linux or Android Images for the A9 Core:
path_to_url
.. _udooneo-m4uploader:
path_to_url
.. _imx-m4fwloader:
path_to_url
.. _NXP i.MX 6SoloX Website:
path_to_url
.. _NXP i.MX 6SoloX Datasheet:
path_to_url
.. _NXP i.MX 6SoloX Reference Manual:
path_to_url
.. _Loading Code on Cortex-M4 from Linux for the i.MX 6SoloX and i.MX 7Dual/7Solo Application Processors:
path_to_url
``` | /content/code_sandbox/boards/udoo/udoo_neo_full/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 3,369 |
```unknown
config BOARD_RPI_PICO
select SOC_RP2040
``` | /content/code_sandbox/boards/raspberrypi/rpi_pico/Kconfig.rpi_pico | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 16 |
```ini
# Checking and set 'adapter speed'.
# Set the adaptor speed, if unset, and given as an argument.
proc set_adapter_speed_if_not_set { speed } {
puts "checking adapter speed..."
if { [catch {adapter speed} ret] } {
adapter speed $speed
}
}
``` | /content/code_sandbox/boards/raspberrypi/rpi_pico/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 64 |
```cmake
``` | /content/code_sandbox/boards/raspberrypi/rpi_4b/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1 |
```unknown
/*
*
*/
/dts-v1/;
#include <broadcom/bcm2711.dtsi>
#include <zephyr/dt-bindings/gpio/gpio.h>
/ {
model = "Raspberry Pi 4 Model B";
compatible = "raspberrypi,4-model-b", "brcm,bcm2838";
#address-cells = <1>;
#size-cells = <1>;
aliases {
led0 = &led_act;
};
chosen {
zephyr,console = &uart1;
zephyr,shell-uart = &uart1;
zephyr,sram = &sram0;
};
leds {
compatible = "gpio-leds";
led_act: led-act {
gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; /* GPIO 42 */
label = "ACT";
};
};
};
&gpio1 {
status = "okay";
};
&uart1 {
status = "okay";
current-speed = <115200>;
};
``` | /content/code_sandbox/boards/raspberrypi/rpi_4b/rpi_4b.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 224 |
```unknown
# Platform Configuration
CONFIG_ARM64_VA_BITS_36=y
CONFIG_ARM64_PA_BITS_36=y
# Zephyr Kernel Configuration
CONFIG_XIP=n
CONFIG_FLASH_SIZE=0
CONFIG_FLASH_BASE_ADDRESS=0x0
# Serial Drivers
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
# Enable Console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# Timer Drivers
CONFIG_TIMER_READS_ITS_FREQUENCY_AT_RUNTIME=y
``` | /content/code_sandbox/boards/raspberrypi/rpi_4b/rpi_4b_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 95 |
```unknown
config BOARD_RPI_4B
select SOC_BCM2711
``` | /content/code_sandbox/boards/raspberrypi/rpi_4b/Kconfig.rpi_4b | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 17 |
```yaml
board:
name: rpi_4b
vendor: raspberrypi
socs:
- name: bcm2711
``` | /content/code_sandbox/boards/raspberrypi/rpi_4b/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```yaml
identifier: rpi_4b
name: Raspberry Pi 4 Model B
type: mcu
arch: arm64
toolchain:
- zephyr
- cross-compile
``` | /content/code_sandbox/boards/raspberrypi/rpi_4b/rpi_4b.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 43 |
```unknown
``` | /content/code_sandbox/boards/raspberrypi/rpi_4b/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1 |
```restructuredtext
.. rpi_4b:
Raspberry Pi 4 Model B (Cortex-A72)
###################################
Overview
********
see <path_to_url
Hardware
********
see <path_to_url
Supported Features
==================
The Raspberry Pi 4 Model B board configuration supports the following
hardware features:
.. list-table::
:header-rows: 1
* - Peripheral
- Kconfig option
- Devicetree compatible
* - GIC-400
- N/A
- :dtcompatible:`arm,gic-v2`
* - GPIO
- :kconfig:option:`CONFIG_GPIO`
- :dtcompatible:`brcm,bcm2711-gpio`
* - UART (Mini UART)
- :kconfig:option:`CONFIG_SERIAL`
- :dtcompatible:`brcm,bcm2711-aux-uart`
Other hardware features have not been enabled yet for this board.
The default configuration can be found in
:zephyr_file:`boards/raspberrypi/rpi_4b/rpi_4b_defconfig`
Programming and Debugging
*************************
TF Card
=======
Prepare a TF card with MBR and FAT32. In the root directory of the TF card:
1. Download and place these firmware files:
* `bcm2711-rpi-4-b.dtb <path_to_url`_
* `bootcode.bin <path_to_url`_
* `start4.elf <path_to_url`_
2. Copy ``build/zephyr/zephyr.bin``
3. Create a ``config.txt``:
.. code-block:: text
kernel=zephyr.bin
arm_64bit=1
enable_uart=1
uart_2ndstage=1
Insert the card and power on the board. You should see the following output on
the serial console (GPIO 14/15):
.. code-block:: text
*** Booting Zephyr OS build XXXXXXXXXXXX ***
Hello World! Raspberry Pi 4 Model B!
``` | /content/code_sandbox/boards/raspberrypi/rpi_4b/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 437 |
```yaml
identifier: rpi_5
name: Raspberry Pi 5
type: mcu
arch: arm64
toolchain:
- zephyr
- cross-compile
``` | /content/code_sandbox/boards/raspberrypi/rpi_5/rpi_5.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 40 |
```unknown
/*
*
*/
/dts-v1/;
#include <broadcom/bcm2712.dtsi>
#include <zephyr/dt-bindings/gpio/gpio.h>
/ {
compatible = "raspberrypi,5-model-b", "brcm,bcm2712";
model = "Raspberry Pi 5";
#address-cells = <2>;
#size-cells = <1>;
aliases {
led0 = &led_act;
};
chosen {
zephyr,sram = &sram0;
zephyr,console = &uart10;
zephyr,shell-uart = &uart10;
};
leds {
compatible = "gpio-leds";
led_act: led-act {
gpios = <&gio_aon 9 GPIO_ACTIVE_LOW>;
label = "ACT";
};
};
};
&gio_aon {
status = "okay";
};
&uart10 {
status = "okay";
current-speed = <115200>;
};
``` | /content/code_sandbox/boards/raspberrypi/rpi_5/rpi_5.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 219 |
```unknown
config BOARD_RPI_5
select SOC_BCM2712
``` | /content/code_sandbox/boards/raspberrypi/rpi_5/Kconfig.rpi_5 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 16 |
```yaml
board:
name: rpi_5
vendor: raspberrypi
socs:
- name: bcm2712
``` | /content/code_sandbox/boards/raspberrypi/rpi_5/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 31 |
```unknown
CONFIG_ARM64_VA_BITS_40=y
CONFIG_ARM64_PA_BITS_40=y
CONFIG_TIMER_READS_ITS_FREQUENCY_AT_RUNTIME=y
# Enable serial console.
CONFIG_SERIAL=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
``` | /content/code_sandbox/boards/raspberrypi/rpi_5/rpi_5_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 50 |
```restructuredtext
.. _rpi_pico:
Raspberry Pi Pico
#################
Overview
********
The Raspberry Pi Pico and Pico W are small, low-cost, versatile boards from
Raspberry Pi. They are equipped with an RP2040 SoC, an on-board LED,
a USB connector, and an SWD interface. The Pico W additionally contains an
Infineon CYW43439 2.4 GHz Wi-Fi/Bluetooth module. The USB bootloader allows the
ability to flash without any adapter, in a drag-and-drop manner.
It is also possible to flash and debug the boards with their SWD interface,
using an external adapter.
Hardware
********
- Dual core Arm Cortex-M0+ processor running up to 133MHz
- 264KB on-chip SRAM
- 2MB on-board QSPI flash with XIP capabilities
- 26 GPIO pins
- 3 Analog inputs
- 2 UART peripherals
- 2 SPI controllers
- 2 I2C controllers
- 16 PWM channels
- USB 1.1 controller (host/device)
- 8 Programmable I/O (PIO) for custom peripherals
- On-board LED
- 1 Watchdog timer peripheral
- Infineon CYW43439 2.4 GHz Wi-Fi chip (Pico W only)
.. figure:: img/rpi_pico.jpg
:align: center
:alt: Raspberry Pi Pico
.. figure:: img/rpi_pico_w.jpg
:align: center
:alt: Raspberry Pi Pico W
Raspberry Pi Pico (above) and Pico W (below)
(Images courtesy of Raspberry Pi)
Supported Features
==================
The rpi_pico board configuration supports the following
hardware features:
.. list-table::
:header-rows: 1
* - Peripheral
- Kconfig option
- Devicetree compatible
* - NVIC
- N/A
- :dtcompatible:`arm,v6m-nvic`
* - UART
- :kconfig:option:`CONFIG_SERIAL`
- :dtcompatible:`raspberrypi,pico-uart`
* - GPIO
- :kconfig:option:`CONFIG_GPIO`
- :dtcompatible:`raspberrypi,pico-gpio`
* - ADC
- :kconfig:option:`CONFIG_ADC`
- :dtcompatible:`raspberrypi,pico-adc`
* - I2C
- :kconfig:option:`CONFIG_I2C`
- :dtcompatible:`snps,designware-i2c`
* - SPI
- :kconfig:option:`CONFIG_SPI`
- :dtcompatible:`raspberrypi,pico-spi`
* - USB Device
- :kconfig:option:`CONFIG_USB_DEVICE_STACK`
- :dtcompatible:`raspberrypi,pico-usbd`
* - HWINFO
- :kconfig:option:`CONFIG_HWINFO`
- N/A
* - Watchdog Timer (WDT)
- :kconfig:option:`CONFIG_WATCHDOG`
- :dtcompatible:`raspberrypi,pico-watchdog`
* - PWM
- :kconfig:option:`CONFIG_PWM`
- :dtcompatible:`raspberrypi,pico-pwm`
* - Flash
- :kconfig:option:`CONFIG_FLASH`
- :dtcompatible:`raspberrypi,pico-flash`
* - Clock controller
- :kconfig:option:`CONFIG_CLOCK_CONTROL`
- :dtcompatible:`raspberrypi,pico-clock-controller`
* - UART (PIO)
- :kconfig:option:`CONFIG_SERIAL`
- :dtcompatible:`raspberrypi,pico-uart-pio`
* - SPI (PIO)
- :kconfig:option:`CONFIG_SPI`
- :dtcompatible:`raspberrypi,pico-spi-pio`
Pin Mapping
===========
The peripherals of the RP2040 SoC can be routed to various pins on the board.
The configuration of these routes can be modified through DTS. Please refer to
the datasheet to see the possible routings for each peripheral.
External pin mapping on the Pico W is identical to the Pico, but note that internal
RP2040 GPIO lines 23, 24, 25, and 29 are routed to the Infineon module on the W.
Since GPIO 25 is routed to the on-board LED on the Pico, but to the Infineon module
on the Pico W, the "blinky" sample program does not work on the W (use hello_world for
a simple test program instead).
Default Zephyr Peripheral Mapping:
----------------------------------
.. rst-class:: rst-columns
- UART0_TX : P0
- UART0_RX : P1
- I2C0_SDA : P4
- I2C0_SCL : P5
- I2C1_SDA : P14
- I2C1_SCL : P15
- SPI0_RX : P16
- SPI0_CSN : P17
- SPI0_SCK : P18
- SPI0_TX : P19
- ADC_CH0 : P26
- ADC_CH1 : P27
- ADC_CH2 : P28
- ADC_CH3 : P29
Programmable I/O (PIO)
**********************
The RP2040 SoC comes with two PIO periherals. These are two simple
co-processors that are designed for I/O operations. The PIOs run
a custom instruction set, generated from a custom assembly language.
PIO programs are assembled using `pioasm`, a tool provided by Raspberry Pi.
Zephyr does not (currently) assemble PIO programs. Rather, they should be
manually assembled and embedded in source code. An example of how this is done
can be found at `drivers/serial/uart_rpi_pico_pio.c`.
Sample: SPI via PIO
====================
The :zephyr_file:`samples/sensor/bme280/README.rst` sample includes a
demonstration of using the PIO SPI driver to communicate with an
environmental sensor. The PIO SPI driver supports using any
combination of GPIO pins for an SPI bus, as well as allowing up to
four independent SPI buses on a single board (using the two SPI
devices as well as both PIO devices).
Programming and Debugging
*************************
Flashing
========
Using SEGGER JLink
------------------
You can Flash the rpi_pico with a SEGGER JLink debug probe as described in
:ref:`Building, Flashing and Debugging <west-flashing>`.
Here is an example of building and flashing the :zephyr:code-sample:`blinky` application.
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: rpi_pico
:goals: build
.. code-block:: bash
west flash --runner jlink
Using OpenOCD
-------------
To use CMSIS-DAP, You must configure **udev**.
Create a file in /etc/udev.rules.d with any name, and write the line below.
.. code-block:: bash
ATTRS{idVendor}=="2e8a", ATTRS{idProduct}=="000c", MODE="660", GROUP="plugdev", TAG+="uaccess"
This example is valid for the case that the user joins to `plugdev` groups.
The Raspberry Pi Pico has an SWD interface that can be used to program
and debug the on board RP2040. This interface can be utilized by OpenOCD.
To use it with the RP2040, OpenOCD version 0.12.0 or later is needed.
If you are using a Debian based system (including RaspberryPi OS, Ubuntu. and more),
using the `pico_setup.sh`_ script is a convenient way to set up the forked version of OpenOCD.
Depending on the interface used (such as JLink), you might need to
checkout to a branch that supports this interface, before proceeding.
Build and install OpenOCD as described in the README.
Here is an example of building and flashing the :zephyr:code-sample:`blinky` application.
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: rpi_pico
:goals: build flash
:gen-args: -DOPENOCD=/usr/local/bin/openocd -DOPENOCD_DEFAULT_PATH=/usr/local/share/openocd/scripts -DRPI_PICO_DEBUG_ADAPTER=cmsis-dap
Set the environment variables **OPENOCD** to `/usr/local/bin/openocd`
and **OPENOCD_DEFAULT_PATH** to `/usr/local/share/openocd/scripts`. This should work
with the OpenOCD that was installed with the default configuration.
This configuration also works with an environment that is set up by the `pico_setup.sh`_ script.
**RPI_PICO_DEBUG_ADAPTER** specifies what debug adapter is used for debugging.
If **RPI_PICO_DEBUG_ADAPTER** was not assigned, `cmsis-dap` is used by default.
The other supported adapters are `raspberrypi-swd`, `jlink` and `blackmagicprobe`.
How to connect `cmsis-dap` and `raspberrypi-swd` is described in `Getting Started with Raspberry Pi Pico`_.
Any other SWD debug adapter maybe also work with this configuration.
The value of **RPI_PICO_DEBUG_ADAPTER** is cached, so it can be omitted from
`west flash` and `west debug` if it was previously set while running `west build`.
**RPI_PICO_DEBUG_ADAPTER** is used in an argument to OpenOCD as `"source [find interface/${RPI_PICO_DEBUG_ADAPTER}.cfg]"`.
Thus, **RPI_PICO_DEBUG_ADAPTER** needs to be assigned the file name of the debug adapter.
You can also flash the board with the following
command that directly calls OpenOCD (assuming a SEGGER JLink adapter is used):
.. code-block:: console
$ openocd -f interface/jlink.cfg -c 'transport select swd' -f target/rp2040.cfg -c "adapter speed 2000" -c 'targets rp2040.core0' -c 'program path/to/zephyr.elf verify reset exit'
Using UF2
---------
If you don't have an SWD adapter, you can flash the Raspberry Pi Pico with
a UF2 file. By default, building an app for this board will generate a
`build/zephyr/zephyr.uf2` file. If the Pico is powered on with the `BOOTSEL`
button pressed, it will appear on the host as a mass storage device. The
UF2 file should be drag-and-dropped to the device, which will flash the Pico.
Debugging
=========
The SWD interface can also be used to debug the board. To achieve this, you can
either use SEGGER JLink or OpenOCD.
Using SEGGER JLink
------------------
Use a SEGGER JLink debug probe and follow the instruction in
:ref:`Building, Flashing and Debugging<west-debugging>`.
Using OpenOCD
-------------
Install OpenOCD as described for flashing the board.
Here is an example for debugging the :zephyr:code-sample:`blinky` application.
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: rpi_pico
:maybe-skip-config:
:goals: debug
:gen-args: -DOPENOCD=/usr/local/bin/openocd -DOPENOCD_DEFAULT_PATH=/usr/local/share/openocd/scripts -DRPI_PICO_DEBUG_ADAPTER=raspberrypi-swd
As with flashing, you can specify the debug adapter by specifying **RPI_PICO_DEBUG_ADAPTER**
at `west build` time. No needs to specify it at `west debug` time.
You can also debug with OpenOCD and gdb launching from command-line.
Run the following command:
.. code-block:: console
$ openocd -f interface/jlink.cfg -c 'transport select swd' -f target/rp2040.cfg -c "adapter speed 2000" -c 'targets rp2040.core0'
On another terminal, run:
.. code-block:: console
$ gdb-multiarch
Inside gdb, run:
.. code-block:: console
(gdb) tar ext :3333
(gdb) file path/to/zephyr.elf
You can then start debugging the board.
.. target-notes::
.. _pico_setup.sh:
path_to_url
.. _Getting Started with Raspberry Pi Pico:
path_to_url
``` | /content/code_sandbox/boards/raspberrypi/rpi_pico/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,729 |
```restructuredtext
.. _boards-wurth-elektronik:
Wrth Elektronik
################
.. toctree::
:maxdepth: 1
:glob:
**/*
``` | /content/code_sandbox/boards/we/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 41 |
```restructuredtext
.. _rpi_5:
Raspberry Pi 5 (Cortex-A76)
###########################
Overview
********
`Raspberry Pi 5 product-brief`_
Hardware
********
- Broadcom BCM2712 2.4GHz quad-core 64-bit Arm Cortex-A76 CPU, with cryptography extensions, 512KB per-core L2 caches and a 2MB shared L3 cache
- VideoCore VII GPU, supporting OpenGL ES 3.1, Vulkan 1.2
- Dual 4Kp60 HDMI display output with HDR support
- 4Kp60 HEVC decoder
- LPDDR4X-4267 SDRAM (4GB and 8GB SKUs available at launch)
- Dual-band 802.11ac Wi-Fi
- Bluetooth 5.0 / Bluetooth Low Energy (BLE)
- microSD card slot, with support for high-speed SDR104 mode
- 2 x USB 3.0 ports, supporting simultaneous 5Gbps operation
- 2 x USB 2.0 ports
- Gigabit Ethernet, with PoE+ support (requires separate PoE+ HAT)
- 2 x 4-lane MIPI camera/display transceivers
- PCIe 2.0 x1 interface for fast peripherals (requires separate M.2 HAT or other adapter)
- 5V/5A DC power via USB-C, with Power Delivery support
- Raspberry Pi standard 40-pin header
- Real-time clock (RTC), powered from external battery
- Power button
Supported Features
==================
The Raspberry Pi 5 board configuration supports the following hardware features:
.. list-table::
:header-rows: 1
* - Peripheral
- Kconfig option
- Devicetree compatible
* - GIC-400
- N/A
- :dtcompatible:`arm,gic-v2`
* - GPIO
- :kconfig:option:`CONFIG_GPIO`
- :dtcompatible:`brcm,brcmstb-gpio`
* - UART
- :kconfig:option:`CONFIG_SERIAL`
- :dtcompatible:`arm,pl011`
Not all hardware features are supported yet. See `Raspberry Pi hardware`_ for the complete list of hardware features.
The default configuration can be found in
:zephyr_file:`boards/raspberrypi/rpi_5/rpi_5_defconfig`.
Programming and Debugging
*************************
Blinky
======
In brief,
1. Format your Micro SD card with MBR and FAT32.
2. Save three files below in the root directory.
* config.txt
* zephyr.bin
* `bcm2712-rpi-5.dtb`_
3. Insert the Micro SD card and power on the Raspberry Pi 5.
then, You will see the Raspberry Pi 5 running the `zephyr.bin`.
config.txt
----------
.. code-block:: text
kernel=zephyr.bin
arm_64bit=1
zephyr.bin
----------
Build an app `samples/basic/blinky`
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: rpi_5
:goals: build
Copy `zephyr.bin` from `build/zephyr` directory to the root directory of the Micro SD card.
Insert the Micro SD card and power on the Raspberry Pi 5. And then, the STAT LED will start to blink.
Serial Communication
====================
wiring
------
You will need the following items:
* `Raspberry Pi Debug Probe`_
* JST cable: 3-pin JST connector to 3-pin JST connector cable
* USB cable: USB A male - Micro USB B male
Use the JST cable to connect the Raspberry Pi Debug Probe UART port to the Raspberry Pi 5 UART port between the HDMI ports.
Then connect the Raspberry Pi Debug Probe to your computer with a USB cable.
config.txt
----------
.. code-block:: text
kernel=zephyr.bin
arm_64bit=1
enable_uart=1
uart_2ndstage=1
zephyr.bin
----------
Build an app `samples/hello_world`
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: rpi_5
:goals: build
Copy `zephyr.bin` from `build/zephyr` directory to the root directory of the Micro SD card.
Insert the Micro SD card into your Raspberry Pi 5.
serial terminal emulator
------------------------
When you power on the Raspberry Pi 5, you will see the following output in the serial console:
.. code-block:: text
*** Booting Zephyr OS build XXXXXXXXXXXX ***
Hello World! rpi_5/bcm2712
.. _Raspberry Pi 5 product-brief:
path_to_url
.. _Raspberry Pi hardware:
path_to_url
.. _bcm2712-rpi-5.dtb:
path_to_url
.. _Raspberry Pi Debug Probe:
path_to_url
``` | /content/code_sandbox/boards/raspberrypi/rpi_5/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,093 |
```cmake
board_runner_args(jlink "--device=nRF52832_xxAA" "--speed=4000")
board_runner_args(pyocd "--target=nrf52832" "--frequency=4000000")
include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
``` | /content/code_sandbox/boards/we/proteus2ev/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 93 |
```unknown
# Enable MPU
CONFIG_ARM_MPU=y
# Enable hardware stack protection
CONFIG_HW_STACK_PROTECTION=y
# Enable RTT
CONFIG_USE_SEGGER_RTT=y
# enable GPIO
CONFIG_GPIO=y
# enable uart driver
CONFIG_SERIAL=y
# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# Use internal oscillator
CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC=y
``` | /content/code_sandbox/boards/we/proteus2ev/we_proteus2ev_nrf52832_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 84 |
```yaml
identifier: we_proteus2ev/nrf52832
name: we_proteus2ev_nrf52832
type: mcu
arch: arm
ram: 64
flash: 512
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- adc
- gpio
- i2c
- pwm
- spi
vendor: we
``` | /content/code_sandbox/boards/we/proteus2ev/we_proteus2ev_nrf52832.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 96 |
```unknown
/dts-v1/;
#include <nordic/nrf52832_ciaa.dtsi>
#include "we_proteus2ev_nrf52832-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "we_proteus2ev_nrf52832";
compatible = "we,we-proteus2ev-nrf52832";
chosen {
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,uart-mcumgr = &uart0;
zephyr,bt-mon-uart = &uart0;
zephyr,bt-c2h-uart = &uart0;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
};
leds {
compatible = "gpio-leds";
led0: led_0 {
gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
label = "LED 0";
};
led1: led_1 {
gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
label = "LED 1";
};
};
buttons {
compatible = "gpio-keys";
button0: button_0 {
gpios = <&gpio0 29 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "Wake-up";
zephyr,code = <INPUT_KEY_0>;
};
};
/* These aliases are provided for compatibility with samples */
aliases {
led0 = &led0;
led1 = &led1;
sw0 = &button0;
bootloader-led0 = &led0;
watchdog0 = &wdt0;
};
};
® {
regulator-initial-mode = <NRF5X_REG_MODE_DCDC>;
};
&adc {
status = "okay";
};
&uicr {
gpio-as-nreset;
};
&gpiote {
status = "okay";
};
&gpio0 {
status = "okay";
};
&uart0 {
compatible = "nordic,nrf-uarte";
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart0_default>;
pinctrl-1 = <&uart0_sleep>;
pinctrl-names = "default", "sleep";
};
&i2c0 {
compatible = "nordic,nrf-twi";
/* Cannot be used together with spi1. */
/* status = "okay"; */
pinctrl-0 = <&i2c0_default>;
pinctrl-1 = <&i2c0_sleep>;
pinctrl-names = "default", "sleep";
};
&spi0 {
compatible = "nordic,nrf-spi";
/* Cannot be used together with i2c0. */
/* status = "okay"; */
pinctrl-0 = <&spi0_default>;
pinctrl-1 = <&spi0_sleep>;
pinctrl-names = "default", "sleep";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 0xc000>;
};
slot0_partition: partition@c000 {
label = "image-0";
reg = <0x0000C000 0x32000>;
};
slot1_partition: partition@3e000 {
label = "image-1";
reg = <0x0003E000 0x32000>;
};
scratch_partition: partition@70000 {
label = "image-scratch";
reg = <0x00070000 0xa000>;
};
storage_partition: partition@7a000 {
label = "storage";
reg = <0x0007a000 0x00006000>;
};
};
};
``` | /content/code_sandbox/boards/we/proteus2ev/we_proteus2ev_nrf52832.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 905 |
```yaml
board:
name: we_proteus2ev
vendor: wurth
socs:
- name: nrf52832
``` | /content/code_sandbox/boards/we/proteus2ev/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```unknown
if BOARD_WE_PROTEUS2EV_NRF52832
config BT_CTLR
default BT
endif
``` | /content/code_sandbox/boards/we/proteus2ev/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 25 |
```cmake
# Suppress "unique_unit_address_if_enabled" to handle the following overlaps:
# - power@40000000 & clock@40000000 & bprot@40000000
# - acl@4001e000 & flash-controller@4001e000
list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled")
``` | /content/code_sandbox/boards/we/proteus2ev/pre_dt_board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 72 |
```unknown
config BOARD_WE_PROTEUS2EV
select SOC_NRF52832_CIAA
``` | /content/code_sandbox/boards/we/proteus2ev/Kconfig.we_proteus2ev | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 21 |
```unknown
&pinctrl {
uart0_default: uart0_default {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 2)>,
<NRF_PSEL(UART_RTS, 0, 4)>;
};
group2 {
psels = <NRF_PSEL(UART_RX, 0, 3)>,
<NRF_PSEL(UART_CTS, 0, 28)>;
bias-pull-up;
};
};
uart0_sleep: uart0_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 2)>,
<NRF_PSEL(UART_RX, 0, 3)>,
<NRF_PSEL(UART_RTS, 0, 4)>,
<NRF_PSEL(UART_CTS, 0, 28)>;
low-power-enable;
};
};
i2c0_default: i2c0_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 2)>,
<NRF_PSEL(TWIM_SCL, 0, 3)>;
};
};
i2c0_sleep: i2c0_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 2)>,
<NRF_PSEL(TWIM_SCL, 0, 3)>;
low-power-enable;
};
};
spi0_default: spi0_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 28)>,
<NRF_PSEL(SPIM_MOSI, 0, 2)>,
<NRF_PSEL(SPIM_MISO, 0, 3)>;
};
};
spi0_sleep: spi0_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 28)>,
<NRF_PSEL(SPIM_MOSI, 0, 2)>,
<NRF_PSEL(SPIM_MISO, 0, 3)>;
low-power-enable;
};
};
};
``` | /content/code_sandbox/boards/we/proteus2ev/we_proteus2ev_nrf52832-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 497 |
```cmake
board_runner_args(jlink "--device=nRF52840_xxAA" "--speed=4000")
board_runner_args(pyocd "--target=nrf52840" "--frequency=4000000")
include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/openocd-nrf5.board.cmake)
``` | /content/code_sandbox/boards/we/proteus3ev/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 113 |
```unknown
# Enable MPU
CONFIG_ARM_MPU=y
# Enable hardware stack protection
CONFIG_HW_STACK_PROTECTION=y
# Enable RTT
CONFIG_USE_SEGGER_RTT=y
# enable GPIO
CONFIG_GPIO=y
# enable uart driver
CONFIG_SERIAL=y
# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# Use internal oscillator
CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC=y
``` | /content/code_sandbox/boards/we/proteus3ev/we_proteus3ev_nrf52840_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 84 |
```yaml
identifier: we_proteus3ev/nrf52840
name: we_proteus3ev_nrf52840
type: mcu
arch: arm
ram: 256
flash: 1024
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- adc
- ble
- gpio
- i2c
- spi
vendor: we
``` | /content/code_sandbox/boards/we/proteus3ev/we_proteus3ev_nrf52840.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 97 |
```cmake
# Suppress "unique_unit_address_if_enabled" to handle the following overlaps:
# - power@40000000 & clock@40000000 & bprot@40000000
# - acl@4001e000 & flash-controller@4001e000
list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled")
``` | /content/code_sandbox/boards/we/proteus3ev/pre_dt_board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 72 |
```unknown
&pinctrl {
uart0_default: uart0_default {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 8)>,
<NRF_PSEL(UART_RTS, 0, 11)>;
};
group2 {
psels = <NRF_PSEL(UART_RX, 1, 9)>,
<NRF_PSEL(UART_CTS, 0, 12)>;
bias-pull-up;
};
};
uart0_sleep: uart0_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 8)>,
<NRF_PSEL(UART_RX, 1, 9)>,
<NRF_PSEL(UART_RTS, 0, 11)>,
<NRF_PSEL(UART_CTS, 0, 12)>;
low-power-enable;
};
};
i2c0_default: i2c0_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 1, 9)>,
<NRF_PSEL(TWIM_SCL, 1, 8)>;
};
};
i2c0_sleep: i2c0_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 1, 9)>,
<NRF_PSEL(TWIM_SCL, 1, 8)>;
low-power-enable;
};
};
spi0_default: spi0_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 12)>,
<NRF_PSEL(SPIM_MOSI, 1, 8)>,
<NRF_PSEL(SPIM_MISO, 1, 9)>;
};
};
spi0_sleep: spi0_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 12)>,
<NRF_PSEL(SPIM_MOSI, 1, 8)>,
<NRF_PSEL(SPIM_MISO, 1, 9)>;
low-power-enable;
};
};
};
``` | /content/code_sandbox/boards/we/proteus3ev/we_proteus3ev_nrf52840-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 497 |
```yaml
board:
name: we_proteus3ev
vendor: wurth
socs:
- name: nrf52840
``` | /content/code_sandbox/boards/we/proteus3ev/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```restructuredtext
.. _we_proteus2ev_nrf52832:
Wrth Elektronik Proteus-II-EV
##############################
Overview
********
The Proteus-II-EV hardware provides
support for the Proteus-II radio module that uses the Nordic Semiconductor nRF52832 ARM Cortex-M4F CPU and
the following devices:
* :abbr:`ADC (Analog to Digital Converter)`
* CLOCK
* FLASH
* :abbr:`GPIO (General Purpose Input Output)`
* :abbr:`I2C (Inter-Integrated Circuit)`
* :abbr:`MPU (Memory Protection Unit)`
* :abbr:`NVIC (Nested Vectored Interrupt Controller)`
* :abbr:`PWM (Pulse Width Modulation)`
* RADIO (Bluetooth Low Energy)
* :abbr:`RTC (nRF RTC System Clock)`
* Segger RTT (RTT Console)
* :abbr:`SPI (Serial Peripheral Interface)`
* :abbr:`UART (Universal asynchronous receiver-transmitter)`
* :abbr:`WDT (Watchdog Timer)`
.. figure:: img/we_proteus2ev_nrf52832.jpg
:align: center
:alt: Proteus-II EV
Proteus-II-EV (Credit: Wrth Elektronik)
More information about the radio module can be found the Wrth Elektronik web page path_to_url .
Hardware
********
Proteus-II radio module provides only the internal oscillators. The frequency of the slow clock
is 32.768 kHz. The frequency of the main clock is 32 MHz.
Supported Features
==================
The we_proteus2ev/nrf52832 board configuration supports the following
hardware features:
+-----------+------------+----------------------+
| Interface | Controller | Driver/Component |
+===========+============+======================+
| ADC | on-chip | adc |
+-----------+------------+----------------------+
| CLOCK | on-chip | clock_control |
+-----------+------------+----------------------+
| FLASH | on-chip | flash |
+-----------+------------+----------------------+
| GPIO | on-chip | gpio |
+-----------+------------+----------------------+
| I2C(M) | on-chip | i2c |
+-----------+------------+----------------------+
| MPU | on-chip | arch/arm |
+-----------+------------+----------------------+
| NVIC | on-chip | arch/arm |
+-----------+------------+----------------------+
| PWM | on-chip | pwm |
+-----------+------------+----------------------+
| RADIO | on-chip | Bluetooth |
+-----------+------------+----------------------+
| RTC | on-chip | system clock |
+-----------+------------+----------------------+
| RTT | Segger | console |
+-----------+------------+----------------------+
| SPI(M/S) | on-chip | spi |
+-----------+------------+----------------------+
| UART | on-chip | serial |
+-----------+------------+----------------------+
| WDT | on-chip | watchdog |
+-----------+------------+----------------------+
Other hardware features are not supported by the Zephyr kernel.
Connections and IOs
===================
LED
---
* LED1 = P0.00
* LED2 = P0.01
Push buttons
------------
* BUTTON1 = SW1 = P0.29
Programming and Debugging
*************************
Applications for the ``we_proteus2ev/nrf52832`` board configuration can be
built, flashed, and debugged in the usual way. See
:ref:`build_an_application` and :ref:`application_run` for more details on
building and running.
Flashing
========
Follow the instructions in the :ref:`nordic_segger` page to install
and configure all the necessary software. Further information can be
found in :ref:`nordic_segger_flashing`. Then build and flash
applications as usual (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Here is an example for the :ref:`hello_world` application.
First, run your favorite terminal program to listen for output.
.. code-block:: console
$ minicom -D <tty_device> -b 115200
Replace :code:`<tty_device>` with the port where the board Proteus-II-EV
can be found. For example, under Linux, :code:`/dev/ttyACM0`.
Then build and flash the application in the usual way.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: we_proteus2ev/nrf52832
:goals: build flash
Debugging
=========
Refer to the :ref:`nordic_segger` page to learn about debugging Nordic boards with a
Segger IC.
Testing the LEDs and buttons in the Proteus-II-EV
*************************************************
There are 2 samples that allow you to test that the buttons (switches) and LEDs on
the board are working properly with Zephyr:
.. code-block:: console
samples/basic/blinky
samples/basic/button
You can build and flash the examples to make sure Zephyr is running correctly on
your board. The button and LED definitions can be found in
:zephyr_file:`boards/we/proteus2ev/we_proteus2ev_nrf52832.dts`.
References
**********
.. target-notes::
.. _Proteus-II radio module website: path_to_url
.. _nRF52 DK website: path_to_url
.. _Nordic Semiconductor Infocenter: path_to_url
``` | /content/code_sandbox/boards/we/proteus2ev/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,209 |
```unknown
config BOARD_WE_PROTEUS3EV
select SOC_NRF52840_QIAA
``` | /content/code_sandbox/boards/we/proteus3ev/Kconfig.we_proteus3ev | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 21 |
```unknown
if BOARD_WE_PROTEUS3EV
config BT_CTLR
default BT
endif # BOARD_WE_PROTEUS3EV
``` | /content/code_sandbox/boards/we/proteus3ev/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 29 |
```unknown
/dts-v1/;
#include <nordic/nrf52840_qiaa.dtsi>
#include "we_proteus3ev_nrf52840-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "we_proteus3ev_nrf52840";
compatible = "we,we-proteus3ev-nrf52840";
chosen {
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,uart-mcumgr = &uart0;
zephyr,bt-mon-uart = &uart0;
zephyr,bt-c2h-uart = &uart0;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
};
leds {
compatible = "gpio-leds";
led0: led_0 {
gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
label = "LED 0";
};
led1: led_1 {
gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
label = "LED 1";
};
};
buttons {
compatible = "gpio-keys";
button0: button_0 {
gpios = <&gpio0 3 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "Wake-up";
zephyr,code = <INPUT_KEY_0>;
};
};
/* These aliases are provided for compatibility with samples */
aliases {
led0 = &led0;
led1 = &led1;
sw0 = &button0;
bootloader-led0 = &led0;
watchdog0 = &wdt0;
};
};
®0 {
status = "okay";
};
®1 {
regulator-initial-mode = <NRF5X_REG_MODE_DCDC>;
};
&adc {
status = "okay";
};
&uicr {
gpio-as-nreset;
};
&gpiote {
status = "okay";
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&uart0 {
compatible = "nordic,nrf-uarte";
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart0_default>;
pinctrl-1 = <&uart0_sleep>;
pinctrl-names = "default", "sleep";
};
&i2c0 {
compatible = "nordic,nrf-twi";
/* Cannot be used together with spi1. */
/* status = "okay"; */
pinctrl-0 = <&i2c0_default>;
pinctrl-1 = <&i2c0_sleep>;
pinctrl-names = "default", "sleep";
};
&spi0 {
compatible = "nordic,nrf-spi";
/* Cannot be used together with i2c0. */
/* status = "okay"; */
pinctrl-0 = <&spi0_default>;
pinctrl-1 = <&spi0_sleep>;
pinctrl-names = "default", "sleep";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 0x0000C000>;
};
slot0_partition: partition@c000 {
label = "image-0";
reg = <0x0000C000 0x00067000>;
};
slot1_partition: partition@73000 {
label = "image-1";
reg = <0x00073000 0x00067000>;
};
scratch_partition: partition@da000 {
label = "image-scratch";
reg = <0x000da000 0x0001e000>;
};
/*
* The flash starting at 0x000f8000 and ending at
* 0x000fffff is reserved for use by the application.
*/
/*
* Storage partition will be used by FCB/LittleFS/NVS
* if enabled.
*/
storage_partition: partition@f8000 {
label = "storage";
reg = <0x000f8000 0x00008000>;
};
};
};
``` | /content/code_sandbox/boards/we/proteus3ev/we_proteus3ev_nrf52840.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 996 |
```cmake
board_runner_args(jlink "--device=nRF52805_xxAA" "--speed=4000")
board_runner_args(pyocd "--target=nrf52805" "--frequency=4000000")
include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
``` | /content/code_sandbox/boards/we/ophelia1ev/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 93 |
```unknown
/*
*
*/
/dts-v1/;
#include <nordic/nrf52805_caaa.dtsi>
#include "we_ophelia1ev_nrf52805-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "we_ophelia1ev_nrf52805";
compatible = "we,we-ophelia1ev-nrf52805";
chosen {
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,uart-mcumgr = &uart0;
zephyr,bt-mon-uart = &uart0;
zephyr,bt-c2h-uart = &uart0;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
};
leds {
compatible = "gpio-leds";
led0: led_0 {
gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
label = "LED 0";
};
led1: led_1 {
gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
label = "LED 1";
};
};
buttons {
compatible = "gpio-keys";
button0: button_0 {
label = "Example button";
gpios = <&gpio0 20 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
zephyr,code = <INPUT_KEY_0>;
};
};
/* These aliases are provided for compatibility with samples */
aliases {
led0 = &led0;
led1 = &led1;
sw0 = &button0;
bootloader-led0 = &led0;
mcuboot-button0 = &button0;
mcuboot-led0 = &led0;
watchdog0 = &wdt0;
};
};
® {
regulator-initial-mode = <NRF5X_REG_MODE_DCDC>;
};
&adc {
status = "okay";
};
&uicr {
gpio-as-nreset;
};
&gpio0 {
status = "okay";
};
&gpiote {
status = "okay";
};
&i2c0 {
compatible = "nordic,nrf-twi";
status = "okay";
pinctrl-0 = <&i2c0_default>;
pinctrl-1 = <&i2c0_sleep>;
pinctrl-names = "default", "sleep";
};
&spi0 {
compatible = "nordic,nrf-spi";
status = "okay";
pinctrl-0 = <&spi0_default>;
pinctrl-1 = <&spi0_sleep>;
pinctrl-names = "default", "sleep";
};
&uart0 {
compatible = "nordic,nrf-uarte";
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart0_default>;
pinctrl-1 = <&uart0_sleep>;
pinctrl-names = "default", "sleep";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 0xc000>;
};
slot0_partition: partition@c000 {
label = "image-0";
reg = <0x0000C000 0xd000>;
};
slot1_partition: partition@19000 {
label = "image-1";
reg = <0x00019000 0xd000>;
};
scratch_partition: partition@26000 {
label = "image-scratch";
reg = <0x00026000 0x3000>;
};
storage_partition: partition@29000 {
label = "storage";
reg = <0x00029000 0x00007000>;
};
};
};
``` | /content/code_sandbox/boards/we/ophelia1ev/we_ophelia1ev_nrf52805.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 893 |
```restructuredtext
.. _we_proteus3ev_nrf52840:
Wrth Elektronik Proteus-III-EV
###############################
Overview
********
The Proteus-III-EV (evaluation board) hardware provides support
for the Proteus-III radio module that uses the Nordic Semiconductor
nRF52840 ARM Cortex-M4F CPU and the following devices:
* :abbr:`ADC (Analog to Digital Converter)`
* CLOCK
* FLASH
* :abbr:`GPIO (General Purpose Input Output)`
* :abbr:`I2C (Inter-Integrated Circuit)`
* :abbr:`MPU (Memory Protection Unit)`
* :abbr:`NVIC (Nested Vectored Interrupt Controller)`
* :abbr:`PWM (Pulse Width Modulation)`
* RADIO (Bluetooth Low Energy and 802.15.4)
* :abbr:`RTC (nRF RTC System Clock)`
* Segger RTT (RTT Console)
* :abbr:`SPI (Serial Peripheral Interface)`
* :abbr:`UART (Universal asynchronous receiver-transmitter)`
* :abbr:`WDT (Watchdog Timer)`
.. figure:: img/we_proteus3ev_nrf52840.jpg
:align: center
:alt: Proteus-III EV
Proteus-III EV (Credit: Wrth Elektronik)
More information about the radio module can be found the Wrth Elektronik
web page path_to_url .
Hardware
********
Proteus-III radio module provides only the internal oscillators. The
frequency of the slow clock is 32.768 kHz. The frequency of the main
clock is 32 MHz.
Supported Features
==================
The we_proteus3ev/nrf52840 board configuration supports the following
hardware features:
+-----------+------------+----------------------+
| Interface | Controller | Driver/Component |
+===========+============+======================+
| ADC | on-chip | adc |
+-----------+------------+----------------------+
| CLOCK | on-chip | clock_control |
+-----------+------------+----------------------+
| FLASH | on-chip | flash |
+-----------+------------+----------------------+
| GPIO | on-chip | gpio |
+-----------+------------+----------------------+
| I2C(M) | on-chip | i2c |
+-----------+------------+----------------------+
| MPU | on-chip | arch/arm |
+-----------+------------+----------------------+
| NVIC | on-chip | arch/arm |
+-----------+------------+----------------------+
| PWM | on-chip | pwm |
+-----------+------------+----------------------+
| RADIO | on-chip | Bluetooth, |
| | | ieee802154 |
+-----------+------------+----------------------+
| RTC | on-chip | system clock |
+-----------+------------+----------------------+
| RTT | Segger | console |
+-----------+------------+----------------------+
| SPI(M/S) | on-chip | spi |
+-----------+------------+----------------------+
| UART | on-chip | serial |
+-----------+------------+----------------------+
| WDT | on-chip | watchdog |
+-----------+------------+----------------------+
Other hardware features are not supported by the Zephyr kernel.
Connections and IOs
===================
LED
---
* LED1 = P0.00
* LED2 = P0.01
Push buttons
------------
* BUTTON1 = SW1 = P0.03
Programming and Debugging
*************************
Applications for the ``we_proteus3ev/nrf52840`` board configuration can be
built, flashed, and debugged in the usual way. See
:ref:`build_an_application` and :ref:`application_run` for more details on
building and running.
Flashing
========
Follow the instructions in the :ref:`nordic_segger` page to install
and configure all the necessary software. Further information can be
found in :ref:`nordic_segger_flashing`. Then build and flash
applications as usual (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Here is an example for the :ref:`hello_world` application.
First, run your favorite terminal program to listen for output.
.. code-block:: console
$ minicom -D <tty_device> -b 115200
Replace :code:`<tty_device>` with the port where the board Proteus-III-EV
can be found. For example, under Linux, :code:`/dev/ttyACM0`.
Then build and flash the application in the usual way.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: we_proteus3ev/nrf52840
:goals: build flash
Debugging
=========
Refer to the :ref:`nordic_segger` page to learn about debugging Nordic
boards with a Segger IC.
Testing the LEDs and buttons in the Proteus-III-EV
**************************************************
There are 2 samples that allow you to test that the buttons (switches) and
LEDs on the board are working properly with Zephyr:
.. code-block:: console
samples/basic/blinky
samples/basic/button
You can build and flash the examples to make sure Zephyr is running correctly
on your board. The button and LED definitions can be found in
:zephyr_file:`boards/we/proteus3ev/we_proteus3ev_nrf52840.dts`.
References
**********
.. target-notes::
.. _Proteus-III radio module website: path_to_url
.. _Nordic Semiconductor Infocenter: path_to_url
.. _J-Link Software and documentation pack: path_to_url
.. _nRF52840 Product Specification: path_to_url
``` | /content/code_sandbox/boards/we/proteus3ev/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,257 |
```yaml
board:
name: we_ophelia1ev
vendor: wurth
socs:
- name: nrf52805
``` | /content/code_sandbox/boards/we/ophelia1ev/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```unknown
# Enable MPU
CONFIG_ARM_MPU=y
# Enable hardware stack protection
CONFIG_HW_STACK_PROTECTION=y
# Enable GPIO
CONFIG_GPIO=y
# Enable UART driver
CONFIG_SERIAL=y
# Enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# Use internal oscillator
CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC=y
``` | /content/code_sandbox/boards/we/ophelia1ev/we_ophelia1ev_nrf52805_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 71 |
```yaml
identifier: we_ophelia1ev/nrf52805
name: we_ophelia1ev_nrf52805
type: mcu
arch: arm
ram: 24
flash: 192
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- counter
- i2c
- spi
- uart
vendor: we
``` | /content/code_sandbox/boards/we/ophelia1ev/we_ophelia1ev_nrf52805.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 92 |
```unknown
if BOARD_WE_OPHELIA1EV
config BT_CTLR
default BT
endif
``` | /content/code_sandbox/boards/we/ophelia1ev/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 21 |
```unknown
config BOARD_WE_OPHELIA1EV
select SOC_NRF52805_CAAA
``` | /content/code_sandbox/boards/we/ophelia1ev/Kconfig.we_ophelia1ev | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 20 |
```unknown
&pinctrl {
i2c0_default: i2c0_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 16)>,
<NRF_PSEL(TWIM_SCL, 0, 18)>;
};
};
i2c0_sleep: i2c0_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 16)>,
<NRF_PSEL(TWIM_SCL, 0, 18)>;
low-power-enable;
};
};
spi0_default: spi0_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 14)>,
<NRF_PSEL(SPIM_MOSI, 0, 16)>,
<NRF_PSEL(SPIM_MISO, 0, 18)>;
};
};
spi0_sleep: spi0_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 14)>,
<NRF_PSEL(SPIM_MOSI, 0, 16)>,
<NRF_PSEL(SPIM_MISO, 0, 18)>;
low-power-enable;
};
};
uart0_default: uart0_default {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 16)>,
<NRF_PSEL(UART_RTS, 0, 4)>;
};
group2 {
psels = <NRF_PSEL(UART_RX, 0, 18)>,
<NRF_PSEL(UART_CTS, 0, 14)>;
bias-pull-up;
};
};
uart0_sleep: uart0_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 16)>,
<NRF_PSEL(UART_RX, 0, 18)>,
<NRF_PSEL(UART_RTS, 0, 4)>,
<NRF_PSEL(UART_CTS, 0, 14)>;
low-power-enable;
};
};
};
``` | /content/code_sandbox/boards/we/ophelia1ev/we_ophelia1ev_nrf52805-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 497 |
```restructuredtext
.. _boards-nuvoton:
Nuvoton Technology Corporation
##############################
.. toctree::
:maxdepth: 1
:glob:
**/*
``` | /content/code_sandbox/boards/nuvoton/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 36 |
```cmake
board_runner_args(openocd --cmd-load "npcx_write_image")
board_runner_args(openocd --cmd-verify "npcx_verify_image")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
``` | /content/code_sandbox/boards/nuvoton/npcx4m8f_evb/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 50 |
```unknown
/*
*
*/
#include <nuvoton/npcx/npcx4/npcx4-pinctrl.dtsi>
&i2c0_0_sda_scl_gpb4_b5 {
bias-pull-up; /* Enable internal pull-up for i2c0_0 */
pinmux-locked; /* Lock pinmuxing */
};
&pwm6_gpc0 {
drive-open-drain;
};
``` | /content/code_sandbox/boards/nuvoton/npcx4m8f_evb/npcx4m8f_evb-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 90 |
```restructuredtext
.. _we_ophelia1ev_nrf52805:
Ophelia-I EV NRF52805
#####################
Overview
********
The we_ophelia1ev_nrf52805 board is an evaluation board of the Ophelia-I radio module.
It provides support for the Nordic Semiconductor nRF52805 ARM CPU and
the following devices:
* CLOCK
* FLASH
* :abbr:`GPIO (General Purpose Input Output)`
* :abbr:`I2C (Inter-Integrated Circuit)`
* :abbr:`NVIC (Nested Vectored Interrupt Controller)`
* RADIO (Bluetooth Low Energy)
* :abbr:`RTC (nRF RTC System Clock)`
* Segger RTT (RTT Console)
* :abbr:`SPI (Serial Peripheral Interface)`
* :abbr:`UART (Universal asynchronous receiver-transmitter)`
* :abbr:`WDT (Watchdog Timer)`
.. figure:: img/we_ophelia1ev_nrf52805.jpg
:align: center
:alt: Ophelia-I EV
Ophelia-I EV (Credit: Wrth Elektronik)
Hardware
********
The Ophelia-I uses the internal low frequency RC oscillator
and provides the so called smart antenna connection, that allows
to choose between the module's integrated PCB antenna and an external
antenna that can be connected to the available SMA connector.
Supported Features
==================
The we_ophelia1ev_nrf52805 board configuration supports the following
hardware features:
+-----------+------------+----------------------+
| Interface | Controller | Driver/Component |
+===========+============+======================+
| CLOCK | on-chip | clock_control |
+-----------+------------+----------------------+
| FLASH | on-chip | flash |
+-----------+------------+----------------------+
| GPIO | on-chip | gpio |
+-----------+------------+----------------------+
| I2C(M) | on-chip | i2c |
+-----------+------------+----------------------+
| MPU | on-chip | arch/arm |
+-----------+------------+----------------------+
| NVIC | on-chip | arch/arm |
+-----------+------------+----------------------+
| RADIO | on-chip | Bluetooth |
+-----------+------------+----------------------+
| RTC | on-chip | system clock |
+-----------+------------+----------------------+
| RTT | Segger | console |
+-----------+------------+----------------------+
| SPI(M/S) | on-chip | spi |
+-----------+------------+----------------------+
| UART | on-chip | serial |
+-----------+------------+----------------------+
| WDT | on-chip | watchdog |
+-----------+------------+----------------------+
Programming and Debugging
*************************
Flashing
========
Follow the instructions in the :ref:`nordic_segger` page to install
and configure all the necessary software. Further information can be
found in :ref:`nordic_segger_flashing`. Then build and flash
applications as usual (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Here is an example for the :ref:`hello_world` application.
First, run your favorite terminal program to listen for output.
.. code-block:: console
$ minicom -D <tty_device> -b 115200
Replace :code:`<tty_device>` with the port where the board nRF52 DK
can be found. For example, under Linux, :code:`/dev/ttyACM0`.
Then build and flash the application in the usual way.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: we_ophelia1ev/nrf52805
:goals: build flash
Debugging
=========
Refer to the :ref:`nordic_segger` page to learn about debugging Nordic boards with a
Segger IC.
References
**********
.. target-notes::
.. _Ophelia-I radio module website: path_to_url
.. _nRF52805 website: path_to_url
``` | /content/code_sandbox/boards/we/ophelia1ev/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 877 |
```yaml
board:
name: npcx4m8f_evb
vendor: nuvoton
socs:
- name: npcx4m8f
``` | /content/code_sandbox/boards/nuvoton/npcx4m8f_evb/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 37 |
```unknown
config BOARD_NPCX4M8F_EVB
select SOC_NPCX4M8F
``` | /content/code_sandbox/boards/nuvoton/npcx4m8f_evb/Kconfig.npcx4m8f_evb | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 22 |
```unknown
#
#
#
# Enable NPCX firmware header
CONFIG_NPCX_HEADER=y
CONFIG_NPCX_IMAGE_OUTPUT_HEX=y
CONFIG_NPCX_HEADER_SPI_MAX_CLOCK_50=y
CONFIG_NPCX_HEADER_SPI_READ_MODE_DUAL=y
# Enable MPU
CONFIG_ARM_MPU=y
# Clock configuration
CONFIG_CLOCK_CONTROL=y
# General Kernel Options
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=15000000
# UART Driver
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
# GPIO Driver
CONFIG_GPIO=y
# Pin Controller Driver
CONFIG_PINCTRL=y
# Console Driver
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
``` | /content/code_sandbox/boards/nuvoton/npcx4m8f_evb/npcx4m8f_evb_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 131 |
```unknown
config SYS_CLOCK_TICKS_PER_SEC
default 1000
config INPUT
default y if KSCAN
``` | /content/code_sandbox/boards/nuvoton/npcx4m8f_evb/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 24 |
```unknown
/*
*
*/
/dts-v1/;
#include <nuvoton/npcx4m8f.dtsi>
#include "npcx4m8f_evb-pinctrl.dtsi"
/ {
model = "Nuvoton NPCX4M8F evaluation board";
chosen {
zephyr,sram = &sram0;
zephyr,console = &uart1;
zephyr,flash = &flash0;
zephyr,keyboard-scan = &kscan_input;
};
aliases {
pwm-led0 = &pwm_led0_green;
led0 = &gpio_led_red;
pwm-0 = &pwm6;
i2c-0 = &i2c0_0;
watchdog0 = &twd0;
peci-0 = &peci0;
kscan0 = &kscan_input;
};
leds-pwm {
compatible = "pwm-leds";
pwm_led0_green: pwm_led_0 {
pwms = <&pwm6 0 PWM_MSEC(20) PWM_POLARITY_INVERTED>;
label = "User D7 green";
};
};
leds-gpio {
compatible = "gpio-leds";
gpio_led_red: led_0 {
gpios = <&gpio6 0 GPIO_ACTIVE_LOW>;
label = "User D8 red";
};
};
};
/* Overwrite default device properties with overlays in board dt file here. */
&uart1 {
status = "okay";
current-speed = <115200>;
/* Use UART1_SL2 ie. PIN64.65 */
pinctrl-0 = <&uart1_2_sin_gp64 &uart1_2_sout_gp65>;
pinctrl-names = "default";
};
&pwm6 {
status = "okay";
pinctrl-0 = <&pwm6_gpc0>;
pinctrl-names = "default";
};
&adc0 {
status = "okay";
/* Use adc0 channel 0 and 2 for 'adc_api' driver tests */
pinctrl-0 = <&adc0_chan0_gp45 &adc0_chan2_gp43>;
pinctrl-names = "default";
};
&espi0 {
status = "okay";
pinctrl-0 = <&espi_lpc_gp46_47_51_52_53_54_55_57>;
pinctrl-names = "default";
};
&i2c0_0 {
status = "okay";
pinctrl-0 = <&i2c0_0_sda_scl_gpb4_b5>;
pinctrl-names = "default";
clock-frequency = <I2C_BITRATE_FAST>;
};
&i2c_ctrl0 {
status = "okay";
};
&tach1 {
status = "okay";
pinctrl-0 = <&ta1_1_in_gp40>;
pinctrl-names = "default";
port = <NPCX_TACH_PORT_A>;
sample-clk = <NPCX_TACH_FREQ_LFCLK>;
pulses-per-round = <1>;
};
&peci0 {
status = "okay";
pinctrl-0 = <&peci_dat_gp81>;
pinctrl-names = "default";
};
&kbd {
/* Demonstrate a 13 x 8 keyboard matrix on evb */
pinctrl-0 = <&ksi0_gp31 &ksi1_gp30 &ksi2_gp27 &ksi3_gp26
&ksi4_gp25 &ksi5_gp24 &ksi6_gp23 &ksi7_gp22
&kso00_gp21 &kso01_gp20 &kso02_gp17 &kso03_gp16
&kso04_gp15 &kso05_gp14 &kso06_gp13 &kso07_gp12
&kso08_gp11 &kso09_gp10 &kso10_gp07 &kso11_gp06
&kso12_gp05>;
pinctrl-names = "default";
row-size = <8>;
col-size = <13>;
status = "okay";
kscan_input: kscan-input {
compatible = "zephyr,kscan-input";
};
};
&i3c0 {
pinctrl-0 = <&i3c1_sda_scl_gpe3_e4>;
pinctrl-names = "default";
};
&i3c1 {
pinctrl-0 = <&i3c2_sda_scl_gp50_56>;
pinctrl-names = "default";
};
&i3c2 {
pinctrl-0 = <&i3c3_sda_scl_gpf4_f5>;
pinctrl-names = "default";
};
``` | /content/code_sandbox/boards/nuvoton/npcx4m8f_evb/npcx4m8f_evb.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,022 |
```ini
# script for Nuvoton NPCX Cortex-M4 Series
source [find interface/jlink.cfg]
transport select swd
set FIUNAME npcx_v2.fiu
source [find target/npcx.cfg]
proc npcx_write_image {target_image} {
flash write_image erase $target_image 0x64000000 ihex
}
proc npcx_verify_image {target_image} {
verify_image $target_image 0x64000000 ihex
}
``` | /content/code_sandbox/boards/nuvoton/npcx4m8f_evb/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 101 |
```yaml
#
#
#
identifier: npcx4m8f_evb
name: Nuvoton NPCX4M8F EVB
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
ram: 114
flash: 384
supported:
- adc
- clock
- gpio
- i2c
- pm
- pwm
- psl
- tach
- uart
- watchdog
``` | /content/code_sandbox/boards/nuvoton/npcx4m8f_evb/npcx4m8f_evb.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 110 |
```cmake
board_runner_args(pyocd "--target=m467hjhae")
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
``` | /content/code_sandbox/boards/nuvoton/numaker_pfm_m467/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 51 |
```yaml
identifier: numaker_pfm_m467
name: NUVOTON NUMAKER-PFM-M467 Kit
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 512
flash: 1024
supported:
- gpio
- usbd
vendor: nuvoton
``` | /content/code_sandbox/boards/nuvoton/numaker_pfm_m467/numaker_pfm_m467.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 83 |
```unknown
/*
*
*/
/dts-v1/;
#include <nuvoton/m46x.dtsi>
#include "numaker_pfm_m467-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "Nuvoton PFM M467 board";
compatible = "nuvoton,pfm-m467", "nuvoton,m467";
aliases {
led0 = &green_led;
led1 = &blue_led;
led2 = &red_led;
sw0 = &user_button_1;
sw1 = &user_button_2;
};
chosen {
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,canbus = &canfd0;
};
leds {
compatible = "gpio-leds";
red_led: led_0 {
gpios = <&gpioh 4 GPIO_ACTIVE_LOW>;
label = "User LD1";
};
green_led: led_1 {
gpios = <&gpioh 6 GPIO_ACTIVE_LOW>;
label = "User LD2";
};
blue_led: led_2 {
gpios = <&gpioh 5 GPIO_ACTIVE_LOW>;
label = "User LD3";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button_1: button_1 {
label = "User SW2";
gpios = <&gpioh 1 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_0>;
};
user_button_2: button_2 {
label = "User SW3";
gpios = <&gpioh 0 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_1>;
};
};
};
&scc {
core-clock = <192000000>;
};
&gpiob {
status = "okay";
};
&gpioh {
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
slot0_partition: partition@0 {
label = "image-0";
reg = <0x00000000 0x00080000>;
};
slot1_partition: partition@80000 {
label = "image-1";
reg = <0x00080000 0x0007e000>;
};
storage_partition: partition@fe000 {
label = "storage";
reg = <0x000fe000 0x00002000>;
};
};
};
&sram0 {
reg = <0x20000000 DT_SIZE_K(512)>;
};
&uart0 {
current-speed = <115200>;
pinctrl-0 = <&uart0_default>;
pinctrl-names = "default";
status = "okay";
};
&canfd0 {
pinctrl-0 = <&canfd0_default>;
pinctrl-names = "default";
status = "okay";
};
&emac {
pinctrl-0 = <&emac_default>;
pinctrl-names = "default";
status = "okay";
};
/* On enabled, usbd is required to be clocked in 48MHz. */
zephyr_udc0: &usbd {
pinctrl-0 = <&usbd_default>;
pinctrl-names = "default";
status = "okay";
};
``` | /content/code_sandbox/boards/nuvoton/numaker_pfm_m467/numaker_pfm_m467.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 799 |
```restructuredtext
.. _npcx4m8f_evb:
Nuvoton NPCX4M8F_EVB
####################
Overview
********
The NPCX4M8F_EVB kit is a development platform to evaluate the
Nuvoton NPCX4 series microcontrollers. This board needs to be mated with
part number NPCX498F.
.. image:: npcx4m8f_evb.jpg
:align: center
:alt: NPCX4M8F Evaluation Board
Hardware
********
- ARM Cortex-M4F Processor
- 512 KB RAM and 64 KB boot ROM
- ADC & GPIO headers
- UART0 and UART1
- FAN PWM interface
- Jtag interface
- Intel Modular Embedded Controller Card (MECC) headers
Supported Features
==================
The following features are supported:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| ADC | on-chip | adc controller |
+-----------+------------+-------------------------------------+
| CLOCK | on-chip | reset and clock control |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c port/controller |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| PM | on-chip | power management |
+-----------+------------+-------------------------------------+
| PSL | on-chip | power switch logic |
+-----------+------------+-------------------------------------+
| PWM | on-chip | pulse width modulator |
+-----------+------------+-------------------------------------+
| TACH | on-chip | tachometer sensor |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| WDT | on-chip | watchdog |
+-----------+------------+-------------------------------------+
Other hardware features are not currently supported by Zephyr (at the moment)
The default configuration can be found in the defconfig file:
:zephyr_file:`boards/nuvoton/npcx4m8f_evb/npcx4m8f_evb_defconfig`
Connections and IOs
===================
Nuvoton to provide the schematic for this board.
System Clock
============
The NPCX4M8F MCU is configured to use the 120Mhz internal oscillator with the
on-chip PLL to generate a resulting EC clock rate of 15 MHz. See Processor clock
control register (chapter 4 in user manual)
Serial Port
===========
UART1 is configured for serial logs.
Programming and Debugging
*************************
This board comes with a Cortex ETM port which facilitates tracing and debugging
using a single physical connection. In addition, it comes with sockets for
JTAG-only sessions.
Flashing
========
If the correct headers are installed, this board supports both J-TAG and also
the ChromiumOS servo.
To flash using Servo V2, Servo, or Servo V4 (CCD), see the
`Chromium EC Flashing Documentation`_ for more information.
To flash with J-TAG, install the drivers for your programmer, for example:
SEGGER J-link's drivers are at path_to_url
The openocd from Zephyr SDK 0.16.1 doesn't include npcx4 support, so build openocd from source.::
sudo apt-get install libftdi-dev libusb-1.0.0-dev
git clone path_to_url ~/openocd
cd ~/openocd
./bootstrap
./configure --enable-jlink --enable-ftdi
make clean
make
sudo make install
Build and flash the blinky sample.::
west build -t clean && \
west build -c -p auto -b npcx4m8f_evb samples/basic/blinky && \
west flash --openocd /usr/local/bin/openocd
Debugging
=========
Use JTAG/SWD with a J-Link
References
**********
.. target-notes::
.. _Chromium EC Flashing Documentation:
path_to_url#Flashing-via-the-servo-debug-board
``` | /content/code_sandbox/boards/nuvoton/npcx4m8f_evb/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 973 |
```yaml
board:
name: numaker_pfm_m467
vendor: nuvoton
socs:
- name: m467
``` | /content/code_sandbox/boards/nuvoton/numaker_pfm_m467/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 31 |
```unknown
CONFIG_PINCTRL=y
CONFIG_GPIO=y
# Enable system clock controller driver
CONFIG_CLOCK_CONTROL=y
CONFIG_CLOCK_CONTROL_NUMAKER_SCC=y
# Enable MPU
CONFIG_ARM_MPU=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=200000000
# Enable UART driver
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
# Console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# Enable FMC
CONFIG_FLASH=y
``` | /content/code_sandbox/boards/nuvoton/numaker_pfm_m467/numaker_pfm_m467_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 93 |
```unknown
#
# Nuvoton PFM M467 board configuration
#
if BOARD_NUMAKER_PFM_M467
if NETWORKING
config NET_L2_ETHERNET
default y if !MODEM
endif # NETWORKING
endif # BOARD_NUMAKER_PFM_M467
``` | /content/code_sandbox/boards/nuvoton/numaker_pfm_m467/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 57 |
```unknown
/*
*
*/
#include "pinctrl/m467hjhae-pinctrl.h"
&pinctrl {
uart0_default: uart0_default {
group0 {
pinmux = <PB12MFP_UART0_RXD>,
<PB13MFP_UART0_TXD>;
};
};
/* TX/RX/RTS/CTS/RST --> D1/D0/A2/A3/D2 --> PB3/PB2/PB8/PB9/PC9 */
uart1_default: uart1_default {
group0 {
pinmux = <PB9MFP_UART1_nCTS>,
<PB8MFP_UART1_nRTS>,
<PB2MFP_UART1_RXD>,
<PB3MFP_UART1_TXD>,
<PC9MFP_GPIO>;
};
};
/* CAN TX/RX --> PJ10/PJ11 */
canfd0_default: canfd0_default {
group0 {
pinmux = <PJ10MFP_CAN0_TXD>,
<PJ11MFP_CAN0_RXD>;
};
};
/* EMAC multi-function pins for MDIO, TX, REFCLK, RX pins */
emac_default: emac_default {
group0 {
pinmux = <PE8MFP_EMAC0_RMII_MDC>,
<PE9MFP_EMAC0_RMII_MDIO>,
<PE10MFP_EMAC0_RMII_TXD0>,
<PE11MFP_EMAC0_RMII_TXD1>,
<PE12MFP_EMAC0_RMII_TXEN>,
<PC8MFP_EMAC0_RMII_REFCLK>,
<PC7MFP_EMAC0_RMII_RXD0>,
<PC6MFP_EMAC0_RMII_RXD1>,
<PA7MFP_EMAC0_RMII_CRSDV>,
<PA6MFP_EMAC0_RMII_RXERR>,
<PB6MFP_EMAC0_PPS>;
};
};
/* USBD multi-function pins for VBUS, D+, D-, and ID pins */
usbd_default: usbd_default {
group0 {
pinmux = <PA12MFP_USB_VBUS>,
<PA13MFP_USB_D_N>,
<PA14MFP_USB_D_P>,
<PA15MFP_USB_OTG_ID>;
};
};
};
``` | /content/code_sandbox/boards/nuvoton/numaker_pfm_m467/numaker_pfm_m467-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 519 |
```unknown
#
# Nuvoton PFM M467 board configuration
#
config BOARD_NUMAKER_PFM_M467
select SOC_M467
``` | /content/code_sandbox/boards/nuvoton/numaker_pfm_m467/Kconfig.numaker_pfm_m467 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 28 |
```unknown
#
# Nuvoton PFM M467 board configuration
#
config BOARD_NUMAKER_PFM_M467
select SOC_FLASH_NUMAKER
``` | /content/code_sandbox/boards/nuvoton/numaker_pfm_m467/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 29 |
```ini
source [find interface/nulink.cfg]
source [find target/numicro.cfg]
``` | /content/code_sandbox/boards/nuvoton/numaker_pfm_m467/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 19 |
```cmake
board_runner_args(openocd --cmd-load "npcx_write_image")
board_runner_args(openocd --cmd-verify "npcx_verify_image")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
``` | /content/code_sandbox/boards/nuvoton/npcx9m6f_evb/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 50 |
```yaml
#
#
#
identifier: npcx9m6f_evb
name: Nuvoton NPCX9M6F EVB
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
ram: 64
flash: 256
supported:
- adc
- clock
- gpio
- i2c
- pm
- pwm
- psl
- tach
- uart
- watchdog
``` | /content/code_sandbox/boards/nuvoton/npcx9m6f_evb/npcx9m6f_evb.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 110 |
```unknown
/*
*
*/
#include <nuvoton/npcx/npcx9/npcx9-pinctrl.dtsi>
&i2c0_0_sda_scl_gpb4_b5 {
bias-pull-up; /* Enable internal pull-up for i2c0_0 */
pinmux-locked; /* Lock pinmuxing */
};
&pwm6_gpc0 {
drive-open-drain;
};
``` | /content/code_sandbox/boards/nuvoton/npcx9m6f_evb/npcx9m6f_evb-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 90 |
```restructuredtext
.. _nuvoton_pfm_m467:
NUVOTON NUMAKER PFM M467
########################
Overview
********
The NuMaker PFM M467 is an Internet of Things (IoT) application focused platform
specially developed by Nuvoton. The PFM-M467 is based on the NuMicro M467
Ethernet series MCU with ARM -Cortex-M4F core.
.. image:: ./pfm_m467.jpeg
:width: 720px
:align: center
:alt: PFM-M467
Features:
=========
- 32-bit Arm Cortex-M4 M467HJHAE MCU
- Core clock up to 200 MHz
- 1024 KB embedded Dual Bank Flash and 512 KB SRAM
- Ethernet (IP101GR) for network application
- USB 2.0 High-Speed OTG / Host / Device
- USB 1.1 Full-Speed OTG / Host / Device
- External SPI Flash (Winbond W25Q20) which can be regarded as ROM module
- MicroSD Card slot for T-Flash
- Arduino UNO compatible interface
- Three push-buttons: one is for reset and the other two are for user-defined
- Four LEDs: one is for power indication and the other three are for user-defined
- On-board NU-Link2 ICE debugger/programmer with SWD connector
More information about the board can be found at the `PFM M467 User Manual`_.
Supported Features
==================
* The on-board 12-MHz crystal allows the device to run at its maximum operating speed of 200MHz.
The development board configuration supports the following hardware features:
+-----------+------------+-----------------------+
| Interface | Controller | Driver/Component |
+===========+============+=======================+
| NVIC | on-chip | nested vectored |
| | | interrupt controller |
+-----------+------------+-----------------------+
| SYSTICK | on-chip | system clock |
+-----------+------------+-----------------------+
| UART | on-chip | serial port |
+-----------+------------+-----------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-----------------------+
Other hardware features are not yet supported on Zephyr porting.
More details about the supported peripherals are available in `M460 TRM`_
Other hardware features are not currently supported by the Zephyr kernel.
Building and Flashing
*********************
Flashing
========
Here is an example for the :ref:`hello_world` application.
On board debugger Nu-link2 can emulate UART0 as a virtual COM port over usb,
To enable this, set ISW1 DIP switch 1-3 (TXD RXD VOM) to ON.
Connect the PFM M467 IoT to your host computer using the USB port, then
run a serial host program to connect with your board. For example:
.. code-block:: console
$ minicom -D /dev/ttyACM0
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: numaker_pfm_m467
:goals: flash
Debugging
=========
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: numaker_pfm_m467
:goals: debug
Step through the application in your debugger.
References
**********
.. _PFM M467 User Manual:
path_to_url
.. _M460 TRM:
path_to_url
``` | /content/code_sandbox/boards/nuvoton/numaker_pfm_m467/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 768 |
```unknown
config BOARD_NPCX9M6F_EVB
select SOC_NPCX9M6F
``` | /content/code_sandbox/boards/nuvoton/npcx9m6f_evb/Kconfig.npcx9m6f_evb | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 22 |
```unknown
#
#
#
# Enable NPCX firmware header
CONFIG_NPCX_HEADER=y
CONFIG_NPCX_IMAGE_OUTPUT_HEX=y
CONFIG_NPCX_HEADER_SPI_MAX_CLOCK_50=y
CONFIG_NPCX_HEADER_SPI_READ_MODE_DUAL=y
# Enable MPU
CONFIG_ARM_MPU=y
# Clock configuration
CONFIG_CLOCK_CONTROL=y
# General Kernel Options
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=15000000
# UART Driver
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
# GPIO Driver
CONFIG_GPIO=y
# Pin Controller Driver
CONFIG_PINCTRL=y
# Console Driver
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
``` | /content/code_sandbox/boards/nuvoton/npcx9m6f_evb/npcx9m6f_evb_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 131 |
```yaml
board:
name: npcx9m6f_evb
vendor: nuvoton
socs:
- name: npcx9m6f
``` | /content/code_sandbox/boards/nuvoton/npcx9m6f_evb/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 37 |
```unknown
config SYS_CLOCK_TICKS_PER_SEC
default 1000
config INPUT
default y if KSCAN
``` | /content/code_sandbox/boards/nuvoton/npcx9m6f_evb/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 24 |
```ini
# script for Nuvoton NPCX Cortex-M4 Series
source [find interface/jlink.cfg]
transport select swd
source [find target/npcx.cfg]
proc npcx_write_image {target_image} {
flash write_image erase $target_image 0x64000000 ihex
}
proc npcx_verify_image {target_image} {
verify_image $target_image 0x64000000 ihex
}
``` | /content/code_sandbox/boards/nuvoton/npcx9m6f_evb/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 90 |
```unknown
/*
*
*/
/dts-v1/;
#include <nuvoton/npcx9m6f.dtsi>
#include "npcx9m6f_evb-pinctrl.dtsi"
/ {
model = "Nuvoton NPCX9M6F evaluation board";
chosen {
zephyr,sram = &sram0;
zephyr,console = &uart1;
zephyr,flash = &flash0;
zephyr,keyboard-scan = &kscan_input;
};
aliases {
/* For samples/basic/blinky_pwm */
pwm-led0 = &pwm_led0_green;
/* For gpio test suites */
led0 = &gpio_led_red;
/* For pwm test suites */
pwm-0 = &pwm6;
/* For i2c test suites */
i2c-0 = &i2c0_0;
/* For watchdog sample */
watchdog0 = &twd0;
peci-0 = &peci0;
/* For kscan test suites */
kscan0 = &kscan_input;
};
leds-pwm {
compatible = "pwm-leds";
pwm_led0_green: pwm_led_0 {
pwms = <&pwm6 0 PWM_MSEC(20) PWM_POLARITY_INVERTED>;
label = "User D7 green";
};
};
leds-gpio {
compatible = "gpio-leds";
gpio_led_red: led_0 {
gpios = <&gpio6 0 GPIO_ACTIVE_LOW>;
label = "User D8 red";
};
};
};
/* Overwrite default device properties with overlays in board dt file here. */
&uart1 {
status = "okay";
current-speed = <115200>;
/* Use UART1_SL2 ie. PIN64.65 */
pinctrl-0 = <&uart1_2_sin_gp64
&uart1_2_sout_gp65>;
pinctrl-names = "default";
};
&pwm6 {
status = "okay";
pinctrl-0 = <&pwm6_gpc0>;
pinctrl-names = "default";
};
&adc0 {
status = "okay";
/* Use adc0 channel 0 and 2 for 'adc_api' driver tests */
pinctrl-0 = <&adc0_chan0_gp45
&adc0_chan2_gp43>;
pinctrl-names = "default";
};
&espi0 {
status = "okay";
pinctrl-0 = <&espi_lpc_gp46_47_51_52_53_54_55_57>;
pinctrl-names = "default";
};
&i2c0_0 {
status = "okay";
pinctrl-0 = <&i2c0_0_sda_scl_gpb4_b5>;
pinctrl-names = "default";
clock-frequency = <I2C_BITRATE_FAST>;
};
&i2c_ctrl0 {
status = "okay";
};
&tach1 {
status = "okay";
pinctrl-0 = <&ta1_1_in_gp40>;
pinctrl-names = "default";
port = <NPCX_TACH_PORT_A>; /* port-A is selected */
sample-clk = <NPCX_TACH_FREQ_LFCLK>; /* Use LFCLK as sampling clock */
pulses-per-round = <1>; /* number of pulses per round of encoder */
};
&peci0 {
status = "okay";
pinctrl-0 = <&peci_dat_gp81>;
pinctrl-names = "default";
};
&kbd {
/* Demonstrate a 13 x 8 keyboard matrix on evb */
pinctrl-0 = <&ksi0_gp31 /* KSI0 PIN31 */
&ksi1_gp30 /* KSI1 PIN30 */
&ksi2_gp27 /* KSI2 PIN27 */
&ksi3_gp26 /* KSI3 PIN26 */
&ksi4_gp25 /* KSI4 PIN25 */
&ksi5_gp24 /* KSI5 PIN24 */
&ksi6_gp23 /* KSI6 PIN23 */
&ksi7_gp22 /* KSI7 PIN22 */
&kso00_gp21 /* KSO00 PIN21 */
&kso01_gp20 /* KSO01 PIN20 */
&kso02_gp17 /* KSO02 PIN17 */
&kso03_gp16 /* KSO03 PIN16 */
&kso04_gp15 /* KSO04 PIN15 */
&kso05_gp14 /* KSO05 PIN14 */
&kso06_gp13 /* KSO06 PIN13 */
&kso07_gp12 /* KSO07 PIN12 */
&kso08_gp11 /* KSO08 PIN11 */
&kso09_gp10 /* KSO09 PIN10 */
&kso10_gp07 /* KSO10 PIN07 */
&kso11_gp06 /* KSO11 PIN06 */
&kso12_gp05 /* KSO12 PIN05 */
>;
pinctrl-names = "default";
row-size = <8>;
col-size = <13>;
status = "okay";
kscan_input: kscan-input {
compatible = "zephyr,kscan-input";
};
};
``` | /content/code_sandbox/boards/nuvoton/npcx9m6f_evb/npcx9m6f_evb.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,150 |
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