text stringlengths 9 39.2M | dir stringlengths 25 226 | lang stringclasses 163 values | created_date timestamp[s] | updated_date timestamp[s] | repo_name stringclasses 751 values | repo_full_name stringclasses 752 values | star int64 1.01k 183k | len_tokens int64 1 18.5M |
|---|---|---|---|---|---|---|---|---|
```restructuredtext
.. _npcx9m6f_evb:
Nuvoton NPCX9M6F_EVB
####################
Overview
********
The NPCX9M6F_EVB kit is a development platform to evaluate the
Nuvoton NPCX9 series microcontrollers. This board needs to be mated with
part number NPCX996F.
.. image:: npcx9m6f_evb.jpg
:align: center
:alt: NPCX9M6F Evaluation Board
Hardware
********
- ARM Cortex-M4F Processor
- 256 KB RAM and 64 KB boot ROM
- ADC & GPIO headers
- UART0 and UART1
- FAN PWM interface
- Jtag interface
- Intel Modular Embedded Controller Card (MECC) headers
Supported Features
==================
The following features are supported:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| ADC | on-chip | adc controller |
+-----------+------------+-------------------------------------+
| CLOCK | on-chip | reset and clock control |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c port/controller |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| PM | on-chip | power management |
+-----------+------------+-------------------------------------+
| PSL | on-chip | power switch logic |
+-----------+------------+-------------------------------------+
| PWM | on-chip | pulse width modulator |
+-----------+------------+-------------------------------------+
| TACH | on-chip | tachometer sensor |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| WDT | on-chip | watchdog |
+-----------+------------+-------------------------------------+
Other hardware features are not currently supported by Zephyr (at the moment)
The default configuration can be found in the defconfig file:
:zephyr_file:`boards/nuvoton/npcx9m6f_evb/npcx9m6f_evb_defconfig`
Connections and IOs
===================
Nuvoton to provide the schematic for this board.
System Clock
============
The NPCX9M6F MCU is configured to use the 90Mhz internal oscillator with the
on-chip PLL to generate a resulting EC clock rate of 15 MHz. See Processor clock
control register (chapter 4 in user manual)
Serial Port
===========
UART1 is configured for serial logs.
Programming and Debugging
*************************
This board comes with a Cortex ETM port which facilitates tracing and debugging
using a single physical connection. In addition, it comes with sockets for
JTAG-only sessions.
Flashing
========
If the correct IDC headers are installed, this board supports both J-TAG and
also the ChromiumOS servo.
To flash using Servo V2, Servo, or Servo V4 (CCD), see the
`Chromium EC Flashing Documentation`_ for more information.
To flash with J-TAG, install the drivers for your programmer, for example:
SEGGER J-link's drivers are at path_to_url
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: npcx9m6f_evb
:maybe-skip-config:
:goals: build flash
Debugging
=========
Use JTAG/SWD with a J-Link
References
**********
.. target-notes::
.. _Chromium EC Flashing Documentation:
path_to_url#Flashing-via-the-servo-debug-board
``` | /content/code_sandbox/boards/nuvoton/npcx9m6f_evb/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 868 |
```cmake
board_runner_args(openocd --cmd-load "npcx_write_image")
board_runner_args(openocd --cmd-verify "npcx_verify_image")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
``` | /content/code_sandbox/boards/nuvoton/npcx7m6fb_evb/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 50 |
```unknown
/*
*
*/
/dts-v1/;
#include <nuvoton/npcx7m6fb.dtsi>
#include "npcx7m6fb_evb-pinctrl.dtsi"
/ {
model = "Nuvoton NPCX7M6FB evaluation board";
chosen {
zephyr,sram = &sram0;
zephyr,console = &uart1;
zephyr,flash = &flash0;
zephyr,keyboard-scan = &kscan_input;
};
aliases {
/* For samples/basic/blinky_pwm */
pwm-led0 = &pwm_led0_green;
/* For pwm test suites */
pwm-0 = &pwm6;
/* For i2c test suites */
i2c-0 = &i2c0_0;
watchdog0 = &twd0;
peci-0 = &peci0;
/* For kscan test suites */
kscan0 = &kscan_input;
};
pwmleds {
compatible = "pwm-leds";
pwm_led0_green: pwm_led_0 {
pwms = <&pwm6 0 PWM_MSEC(20) PWM_POLARITY_INVERTED>;
label = "User D7 green";
};
};
};
/* Overwrite default device properties with overlays in board dt file here. */
&uart1 {
status = "okay";
current-speed = <115200>;
/* Use UART1_SL2 ie. PIN64.65 */
pinctrl-0 = <&uart1_2_sin_sout_gp64_65>;
pinctrl-names = "default";
};
&pwm6 {
status = "okay";
pinctrl-0 = <&pwm6_gpc0>;
pinctrl-names = "default";
};
&adc0 {
status = "okay";
/* Use adc0 channel 0 and 2 for 'adc_api' driver tests */
pinctrl-0 = <&adc0_chan0_gp45
&adc0_chan2_gp43>;
pinctrl-names = "default";
};
&espi0 {
status = "okay";
pinctrl-0 = <&espi_lpc_gp46_47_51_52_53_54_55_57>;
pinctrl-names = "default";
};
&i2c0_0 {
status = "okay";
pinctrl-0 = <&i2c0_0_sda_scl_gpb4_b5>;
pinctrl-names = "default";
clock-frequency = <I2C_BITRATE_FAST>;
};
&i2c_ctrl0 {
status = "okay";
};
&tach1 {
status = "okay";
pinctrl-0 = <&ta1_1_in_gp40>;
pinctrl-names = "default";
port = <NPCX_TACH_PORT_A>; /* port-A is selected */
sample-clk = <NPCX_TACH_FREQ_LFCLK>; /* Use LFCLK as sampling clock */
pulses-per-round = <1>; /* number of pulses per round of encoder */
};
&peci0 {
status = "okay";
pinctrl-0 = <&peci_dat_gp81>;
pinctrl-names = "default";
};
&kbd {
/* Demonstrate a 6 x 8 keyboard matrix on evb */
pinctrl-0 = <&ksi0_gp31 /* KSI0 PIN31 */
&ksi1_gp30 /* KSI1 PIN30 */
&ksi2_gp27 /* KSI2 PIN27 */
&ksi3_gp26 /* KSI3 PIN26 */
&ksi4_gp25 /* KSI4 PIN25 */
&ksi5_gp24 /* KSI5 PIN24 */
&ksi6_gp23 /* KSI6 PIN23 */
&ksi7_gp22 /* KSI7 PIN22 */
&kso00_gp21 /* KSO00 PIN21 */
&kso01_gp20 /* KSO01 PIN20 */
&kso02_gp17 /* KSO02 PIN17 */
&kso03_gp16 /* KSO03 PIN16 */
&kso04_gp15 /* KSO04 PIN15 */
&kso05_gp14 /* KSO05 PIN14 */
>;
pinctrl-names = "default";
row-size = <8>;
col-size = <6>;
status = "okay";
kscan_input: kscan-input {
compatible = "zephyr,kscan-input";
};
};
``` | /content/code_sandbox/boards/nuvoton/npcx7m6fb_evb/npcx7m6fb_evb.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 967 |
```unknown
config BOARD_NPCX7M6FB_EVB
select SOC_NPCX7M6FB
``` | /content/code_sandbox/boards/nuvoton/npcx7m6fb_evb/Kconfig.npcx7m6fb_evb | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 22 |
```unknown
#
#
#
# Enable NPCX firmware header
CONFIG_NPCX_HEADER=y
CONFIG_NPCX_IMAGE_OUTPUT_HEX=y
CONFIG_NPCX_HEADER_SPI_MAX_CLOCK_50=y
CONFIG_NPCX_HEADER_SPI_READ_MODE_DUAL=y
# Enable MPU
CONFIG_ARM_MPU=y
# General Kernel Options
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=15000000
# Clock configuration
CONFIG_CLOCK_CONTROL=y
# UART Driver
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
# GPIO Driver
CONFIG_GPIO=y
# Pin Controller Driver
CONFIG_PINCTRL=y
# Console Driver
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
``` | /content/code_sandbox/boards/nuvoton/npcx7m6fb_evb/npcx7m6fb_evb_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 131 |
```unknown
/*
*
*/
#include <nuvoton/npcx/npcx7/npcx7-pinctrl.dtsi>
&i2c0_0_sda_scl_gpb4_b5 {
bias-pull-up; /* Enable internal pull-up for i2c0_0 */
pinmux-locked; /* Lock pinmuxing */
};
&pwm6_gpc0 {
drive-open-drain;
};
``` | /content/code_sandbox/boards/nuvoton/npcx7m6fb_evb/npcx7m6fb_evb-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 90 |
```yaml
board:
name: npcx7m6fb_evb
vendor: nuvoton
socs:
- name: npcx7m6fb
``` | /content/code_sandbox/boards/nuvoton/npcx7m6fb_evb/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 37 |
```yaml
#
#
#
identifier: npcx7m6fb_evb
name: Nuvoton NPCX7M6FB EVB
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
ram: 64
flash: 192
supported:
- adc
- i2c
``` | /content/code_sandbox/boards/nuvoton/npcx7m6fb_evb/npcx7m6fb_evb.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 76 |
```unknown
config SYS_CLOCK_TICKS_PER_SEC
default 1000
config INPUT
default y if KSCAN
``` | /content/code_sandbox/boards/nuvoton/npcx7m6fb_evb/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 24 |
```ini
# script for Nuvoton NPCX Cortex-M4 Series
source [find interface/jlink.cfg]
transport select swd
source [find target/npcx.cfg]
proc npcx_write_image {target_image} {
flash write_image erase $target_image 0x64000000 ihex
}
proc npcx_verify_image {target_image} {
verify_image $target_image 0x64000000 ihex
}
``` | /content/code_sandbox/boards/nuvoton/npcx7m6fb_evb/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 90 |
```cmake
board_runner_args(nulink "-f")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/nulink.board.cmake)
``` | /content/code_sandbox/boards/nuvoton/numaker_pfm_m487/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 45 |
```unknown
# Enable MPU
CONFIG_ARM_MPU=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=192000000
# Enable GPIO and pinctrl drivers
CONFIG_GPIO=y
CONFIG_PINCTRL=y
# Enable UART driver
CONFIG_SERIAL=y
# Console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
``` | /content/code_sandbox/boards/nuvoton/numaker_pfm_m487/numaker_pfm_m487_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 65 |
```restructuredtext
.. _npcx7m6fb_evb:
Nuvoton NPCX7M6FB_EVB
#####################
Overview
********
The NPCX7M6FB_EVB kit is a development platform to evaluate the
Nuvoton NPCX7 series microcontrollers. This board needs to be mated with
part number NPCX796FB.
.. image:: npcx7m6fb_evb.jpg
:align: center
:alt: NPCX7M6FB Evaluation Board
Hardware
********
- ARM Cortex-M4F Processor
- 256 KB RAM and 64 KB boot ROM
- ADC & GPIO headers
- UART0 and UART1
- FAN PWM interface
- Jtag interface
- Intel Modular Embedded Controller Card (MECC) headers
Supported Features
==================
The following features are supported:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| CLOCK | on-chip | reset and clock control |
+-----------+------------+-------------------------------------+
Other hardware features are not currently supported by Zephyr (at the moment)
The default configuration can be found in the defconfig file:
:zephyr_file:`boards/nuvoton/npcx7m6fb_evb/npcx7m6fb_evb_defconfig`
Connections and IOs
===================
Nuvoton to provide the schematic for this board.
System Clock
============
The NPCX7M6FB MCU is configured to use the 90Mhz internal oscillator with the
on-chip PLL to generate a resulting EC clock rate of 15 MHz. See Processor clock
control register (chapter 4 in user manual)
Serial Port
===========
UART1 is configured for serial logs.
Programming and Debugging
*************************
This board comes with a Cortex ETM port which facilitates tracing and debugging
using a single physical connection. In addition, it comes with sockets for
JTAG only sessions.
Flashing
========
If the correct IDC headers are installed, this board supports both J-TAG and
also the ChromiumOS servo.
To flash using Servo V2, Servo, or Servo V4 (CCD), see the
`Chromium EC Flashing Documentation`_ for more information.
To flash with J-TAG, install the drivers for your programmer, for example:
SEGGER J-link's drivers are at path_to_url
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: npcx7m6fb_evb
:maybe-skip-config:
:goals: build flash
Debugging
=========
Use JTAG/SWD with a J-Link
References
**********
.. target-notes::
.. _Chromium EC Flashing Documentation:
path_to_url#Flashing-via-the-servo-debug-board
``` | /content/code_sandbox/boards/nuvoton/npcx7m6fb_evb/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 710 |
```unknown
/*
*
*/
/dts-v1/;
#include <nuvoton/m48x.dtsi>
#include "numaker_pfm_m487-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "Nuvoton PFM M487 board";
compatible = "nuvoton,pfm-m487", "nuvoton,m487";
aliases {
led0 = &red_led;
led1 = &yellow_led;
led2 = &green_led;
sw0 = &sw2;
sw1 = &sw3;
};
chosen {
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
};
leds {
compatible = "gpio-leds";
red_led: led_0 {
gpios = <&gpioh 0 GPIO_ACTIVE_LOW>;
label = "User LED Red";
};
yellow_led: led_1 {
gpios = <&gpioh 1 GPIO_ACTIVE_LOW>;
label = "User LED Yellow";
};
green_led: led_2 {
gpios = <&gpioh 2 GPIO_ACTIVE_LOW>;
label = "User LED Green";
};
};
gpio_keys {
compatible = "gpio-keys";
sw2: button_0 {
gpios = <&gpiog 15 GPIO_ACTIVE_LOW>;
label = "User SW2";
zephyr,code = <INPUT_KEY_0>;
};
sw3: button_1 {
gpios = <&gpiof 11 GPIO_ACTIVE_LOW>;
label = "User SW3";
zephyr,code = <INPUT_KEY_1>;
};
};
};
&flash0 {
reg = <0x0 DT_SIZE_K(512)>;
};
&sram0 {
reg = <0x20000000 DT_SIZE_K(160)>;
};
&gpiob {
status = "okay";
};
&gpiof {
status = "okay";
};
&gpiog {
status = "okay";
};
&gpioh {
status = "okay";
};
&uart0 {
current-speed = <115200>;
status = "okay";
pinctrl-0 = <&uart0_default>;
pinctrl-names = "default";
};
``` | /content/code_sandbox/boards/nuvoton/numaker_pfm_m487/numaker_pfm_m487.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 526 |
```unknown
/*
*
*/
#include <nuvoton/numicro/M48x-pinctrl.h>
&pinctrl {
uart0_default: uart0_default {
group0 {
pinmux = <UART0_RXD_PB12>, <UART0_TXD_PB13>;
};
};
};
``` | /content/code_sandbox/boards/nuvoton/numaker_pfm_m487/numaker_pfm_m487-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 64 |
```yaml
board:
name: numaker_pfm_m487
vendor: nuvoton
socs:
- name: m487
``` | /content/code_sandbox/boards/nuvoton/numaker_pfm_m487/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 31 |
```unknown
#
# Nuvoton PFM M467 board configuration
#
config BOARD_NUMAKER_PFM_M487
select SOC_M487
``` | /content/code_sandbox/boards/nuvoton/numaker_pfm_m487/Kconfig.numaker_pfm_m487 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 28 |
```ini
source [find interface/nulink.cfg]
source [find target/numicroM4.cfg]
``` | /content/code_sandbox/boards/nuvoton/numaker_pfm_m487/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 21 |
```yaml
identifier: numaker_pfm_m487
name: NUVOTON-PFM-M487
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 160
flash: 512
vendor: nuvoton
``` | /content/code_sandbox/boards/nuvoton/numaker_pfm_m487/numaker_pfm_m487.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 67 |
```cmake
board_runner_args(pyocd "--target=m2l31kidae")
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
``` | /content/code_sandbox/boards/nuvoton/numaker_m2l31ki/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 51 |
```unknown
#
# Nuvoton NuMaker M2L31KI board configuration
#
config BOARD_NUMAKER_M2L31KI
select SOC_M2L31XXX
``` | /content/code_sandbox/boards/nuvoton/numaker_m2l31ki/Kconfig.numaker_m2l31ki | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 35 |
```yaml
board:
name: numaker_m2l31ki
vendor: nuvoton
socs:
- name: m2l31xxx
``` | /content/code_sandbox/boards/nuvoton/numaker_m2l31ki/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 35 |
```unknown
/*
*
*/
/dts-v1/;
#include <nuvoton/m2l31kid.dtsi>
#include "numaker_m2l31ki-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "Nuvoton NuMaker M2L31KI board";
compatible = "nuvoton,numaker-m2l31ki";
aliases {
led0 = &red_led;
};
chosen {
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
};
leds {
compatible = "gpio-leds";
red_led: led_0 {
gpios = <&gpioc 14 GPIO_ACTIVE_LOW>;
label = "User LD1";
};
};
};
&scc {
/* For USB 1.1 Host/Device/OTG, configure to 192MHz, which can generate necessary 48MHz. */
/* For USB 2.0 Host/Device/OTG or no USB application, comment out to use default. */
core-clock = <DT_FREQ_M(192)>;
};
&gpioc {
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 0x00008000>;
};
slot0_partition: partition@8000 {
label = "image-0";
reg = <0x00008000 0x00038000>;
};
slot1_partition: partition@40000 {
label = "image-1";
reg = <0x00040000 0x00038000>;
};
storage_partition: partition@78000 {
label = "storage";
reg = <0x00078000 0x00008000>;
};
};
};
&sram0 {
reg = <0x20000000 DT_SIZE_K(168)>;
};
&uart0 {
current-speed = <115200>;
pinctrl-0 = <&uart0_default>;
pinctrl-names = "default";
status = "okay";
};
``` | /content/code_sandbox/boards/nuvoton/numaker_m2l31ki/numaker_m2l31ki.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 542 |
```restructuredtext
.. _nuvoton_pfm_m487:
NUVOTON NUMAKER PFM M487
########################
Overview
********
The NuMaker PFM M487 is an Internet of Things (IoT) application focused platform
specially developed by Nuvoton. The PFM-M487 is based on the NuMicro M487
Ethernet series MCU with ARM -Cortex-M4F core.
.. image:: pfm_m487.jpg
:align: center
:alt: PFM-M487
Features:
=========
- 32-bit Arm Cortex-M4 M487JIDAE MCU
- Core clock up to 192 MHz
- 512 KB embedded Dual Bank Flash and 160 KB SRAM
- Audio codec (NAU88L25) with Microphone In and Headphone Out
- Ethernet (IP101GR) for network application
- USB 2.0 High-Speed OTG / Host / Device
- USB 1.1 Full-Speed OTG / Host / Device
- External SPI Flash (Winbond W25Q20) which can be regarded as ROM module
- MicroSD Card slot for T-Flash
- M487 extended interface 4 connector with 36 pins each
- Arduino UNO compatible interface
- Three push-buttons: one is for reset and the other two are for user-defined
- Four LEDs: one is for power indication and the other three are for user-defined
- On-board NU-Link-Me ICE debugger/programmer with SWD connector
More information about the board can be found at the `PFM M487 User Manual`_.
Supported Features
==================
* The on-board 12-MHz crystal allows the device to run at its maximum operating speed of 192MHz.
The development board configuration supports the following hardware features:
+-----------+------------+-----------------------+
| Interface | Controller | Driver/Component |
+===========+============+=======================+
| NVIC | on-chip | nested vectored |
| | | interrupt controller |
+-----------+------------+-----------------------+
| SYSTICK | on-chip | system clock |
+-----------+------------+-----------------------+
| UART | on-chip | serial port |
+-----------+------------+-----------------------+
Other hardware features are not yet supported on Zephyr porting.
More details about the supported peripherals are available in `M480 TRM`_
Other hardware features are not currently supported by the Zephyr kernel.
Building and Flashing
*********************
Flashing
========
Here is an example for the :ref:`hello_world` application.
On board debugger Nu-link-Me can emulate UART0 as a virtual COM port over usb,
To enable this, set ISW1 DIP switch 1-3 (TXD RXD VOM) to ON.
Connect the PFM M487 IoT to your host computer using the USB port, then
run a serial host program to connect with your board. For example:
.. code-block:: console
$ minicom -D /dev/ttyACM0
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: numaker_pfm_m487
:goals: flash
Debugging
=========
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: numaker_pfm_m487
:goals: debug
Step through the application in your debugger.
References
**********
.. _PFM M487 User Manual:
path_to_url
.. _M480 TRM:
path_to_url
``` | /content/code_sandbox/boards/nuvoton/numaker_pfm_m487/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 772 |
```yaml
identifier: numaker_m2l31ki
name: NUVOTON NUMAKER-M2L31KI Kit
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 168
flash: 512
supported:
- gpio
vendor: nuvoton
``` | /content/code_sandbox/boards/nuvoton/numaker_m2l31ki/numaker_m2l31ki.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 79 |
```unknown
/*
*
*/
#include "pinctrl/m2l31ki-pinctrl.h"
&pinctrl {
uart0_default: uart0_default {
group0 {
pinmux = <PB12MFP_UART0_RXD>,
<PB13MFP_UART0_TXD>;
};
};
/* TX/RX/RTS/CTS/RST --> D1/D0/A2/A3/D2 --> PB3/PB2/PB8/PB9/PC9 */
uart1_default: uart1_default {
group0 {
pinmux = <PB9MFP_UART1_nCTS>,
<PB8MFP_UART1_nRTS>,
<PB2MFP_UART1_RXD>,
<PB3MFP_UART1_TXD>,
<PC9MFP_GPIO>;
};
};
};
``` | /content/code_sandbox/boards/nuvoton/numaker_m2l31ki/numaker_m2l31ki-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 182 |
```unknown
#
# Nuvoton NuMaker M2L31KI board configuration
#
config BOARD_NUMAKER_M2L31KI
select SOC_FLASH_NUMAKER_RMC
``` | /content/code_sandbox/boards/nuvoton/numaker_m2l31ki/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 35 |
```ini
source [find interface/nulink.cfg]
source [find target/numicro.cfg]
``` | /content/code_sandbox/boards/nuvoton/numaker_m2l31ki/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 19 |
```unknown
CONFIG_PINCTRL=y
CONFIG_GPIO=y
# Enable system clock controller driver
CONFIG_CLOCK_CONTROL=y
CONFIG_CLOCK_CONTROL_NUMAKER_SCC=y
# Enable MPU
CONFIG_ARM_MPU=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000
# Enable UART driver
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
# Console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# Enable RMC
CONFIG_FLASH=y
``` | /content/code_sandbox/boards/nuvoton/numaker_m2l31ki/numaker_m2l31ki_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 93 |
```cmake
#
board_runner_args(jlink "--device=npcm400" "--speed=4000")
board_runner_args(jlink "--file=./build/zephyr/${CONFIG_KERNEL_BIN_NAME}.npcm.bin")
board_runner_args(jlink "--reset-after-load")
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/nuvoton/npcm400_evb/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 67 |
```unknown
/*
*
*/
/dts-v1/;
#include <nuvoton/npcm400.dtsi>
/ {
model = "Nuvoton NPCM400 evaluation board";
chosen {
zephyr,sram = &sram0;
zephyr,flash = &flash0;
};
aliases {
};
};
``` | /content/code_sandbox/boards/nuvoton/npcm400_evb/npcm400_evb.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 70 |
```unknown
config BOARD_NPCM400_EVB
select SOC_NPCM400
``` | /content/code_sandbox/boards/nuvoton/npcm400_evb/Kconfig.npcm400_evb | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 16 |
```yaml
#
#
#
identifier: npcm400_evb
name: Nuvoton NPCM400 EVB
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
ram: 768
flash: 1024
vendor: nuvoton
``` | /content/code_sandbox/boards/nuvoton/npcm400_evb/npcm400_evb.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 65 |
```yaml
board:
name: npcm400_evb
vendor: nuvoton
socs:
- name: npcm400
``` | /content/code_sandbox/boards/nuvoton/npcm400_evb/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 31 |
```restructuredtext
.. _nuvoton_m2l31ki:
NUVOTON NUMAKER M2L31KI
########################
Overview
********
The NuMaker M2L31KI is an Internet of Things (IoT) application focused platform
specially developed by Nuvoton. The NuMaker-M2L31KI is based on the NuMicro M2L31
series MCU with ARM -Cortex-M23 core.
.. image:: ./m2l31ki.webp
:align: center
:alt: M2L31KI
Features:
=========
- 32-bit Arm Cortex-M23 M2L31KIDAE MCU
- Core clock up to 72 MHz
- 512 KB embedded Dual Bank Flash and 168 KB SRAM
- USB 2.0 Full-Speed OTG / Device
- USB 1.1 Host
- Arduino UNO compatible interface
- One push-button is for reset
- Two LEDs: one is for power indication and the other is for user-defined
- On-board NU-Link2 ICE debugger/programmer with SWD connector
More information about the board can be found at the `NuMaker M2L31KI User Manual`_.
Supported Features
==================
* The on-board 12-MHz crystal allows the device to run at its maximum operating speed of 72MHz.
The development board configuration supports the following hardware features:
+-----------+------------+-----------------------+
| Interface | Controller | Driver/Component |
+===========+============+=======================+
| NVIC | on-chip | nested vectored |
| | | interrupt controller |
+-----------+------------+-----------------------+
| SYSTICK | on-chip | system clock |
+-----------+------------+-----------------------+
| UART | on-chip | serial port |
+-----------+------------+-----------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-----------------------+
Other hardware features are not yet supported on Zephyr porting.
More details about the supported peripherals are available in `M2L31 TRM`_
Other hardware features are not currently supported by the Zephyr kernel.
Building and Flashing
*********************
Flashing
========
Here is an example for the :ref:`hello_world` application.
On board debugger Nu-link2 can emulate UART0 as a virtual COM port over usb,
To enable this, set ISW1 DIP switch 1-3 (TXD RXD VOM) to ON.
Connect the NuMaker-M2L31KI to your host computer using the USB port, then
run a serial host program to connect with your board. For example:
.. code-block:: console
$ minicom -D /dev/ttyACM0
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: numaker_m2l31ki
:goals: flash
Debugging
=========
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: numaker_m2l31ki
:goals: debug
Step through the application in your debugger.
References
**********
.. _NuMaker M2L31KI User Manual:
path_to_url
.. _M2L31 TRM:
path_to_url
``` | /content/code_sandbox/boards/nuvoton/numaker_m2l31ki/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 722 |
```unknown
#
config SYS_CLOCK_TICKS_PER_SEC
default 1000
``` | /content/code_sandbox/boards/nuvoton/npcm400_evb/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 15 |
```unknown
#
CONFIG_SRAM_VECTOR_TABLE=y
# General Kernel Options
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=96000000
CONFIG_XIP=y
# UART Driver
CONFIG_SERIAL=n
# Console Driver
CONFIG_CONSOLE=n
CONFIG_UART_CONSOLE=n
``` | /content/code_sandbox/boards/nuvoton/npcm400_evb/npcm400_evb_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 54 |
```restructuredtext
.. _boards-tdk:
TDK
###
.. toctree::
:maxdepth: 1
:glob:
**/*
``` | /content/code_sandbox/boards/tdk/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```unknown
/*
*
*/
/dts-v1/;
#include <atmel/same70q21b.dtsi>
#include "robokit1-common.dtsi"
/ {
model = "TDK RoboKit1";
compatible = "tdk,robokit1", "atmel,same70q21b", "atmel,same70";
};
``` | /content/code_sandbox/boards/tdk/robokit1/robokit1.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 75 |
```cmake
board_runner_args(jlink "--device=ATSAME70Q21")
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
board_runner_args(openocd --cmd-post-verify "atsamv gpnvm set 1")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
``` | /content/code_sandbox/boards/tdk/robokit1/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 71 |
```unknown
CONFIG_BUILD_OUTPUT_HEX=y
CONFIG_ARM_MPU=y
CONFIG_HW_STACK_PROTECTION=y
CONFIG_WDT_DISABLE_AT_BOOT=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
``` | /content/code_sandbox/boards/tdk/robokit1/robokit1_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 42 |
```unknown
config BOARD_ROBOKIT1
select SOC_SAME70Q21B
``` | /content/code_sandbox/boards/tdk/robokit1/Kconfig.robokit1 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 19 |
```restructuredtext
.. _npcm400_evb:
Nuvoton NPCM400_EVB
####################
Overview
********
The NPCM400_EVB kit is a development platform to evaluate the
Nuvoton NPCM4 series microcontrollers. This board needs to be mated with
part number NPCM400 Satellite Management Controller (SMC).
.. image:: npcm400_evb.webp
:align: center
:alt: NPCM400 Evaluation Board
Hardware
********
- ARM Cortex-M4F Processor
- Core clock up to 100 MHz
- 1MB Integrated Flash
- 32KB cache for XIP and Data
- 768 KB RAM and 64 KB boot ROM
- ADC & GPIO headers
- UART0 and UART1
- I2C/I3C
- RMII
- USB2.0 Device
- USB1.1 Host
- Secure Boot is supported
Supported Features
==================
The following features are supported:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| ADC | on-chip | adc controller |
+-----------+------------+-------------------------------------+
| CLOCK | on-chip | reset and clock control |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c port/controller |
+-----------+------------+-------------------------------------+
| I3C | on-chip | i3c port/controller |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| WDT | on-chip | watchdog |
+-----------+------------+-------------------------------------+
The default configuration can be found in the defconfig file:
:zephyr_file:`boards/nuvoton/npcm400_evb/npcm400_evb_defconfig`
Connections and IOs
===================
Nuvoton to provide the schematic for this board.
Serial Port
===========
UART0 is configured for serial logs. The default serial setup is 115200 8N1.
Programming and Debugging
*************************
This board comes with a Cortex ETM port which facilitates tracing and debugging
using a single physical connection. In addition, it comes with sockets for
JTAG-only sessions.
Flashing
========
If the correct headers are installed, this board supports J-TAG.
To flash with J-TAG, install the drivers for your programmer, for example:
SEGGER J-link's drivers are at path_to_url
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: npcm400_evb
:goals: flash
Open a serial terminal, and you should see the following message in the terminal:
.. code-block:: console
Hello World! npcm400_evb/npcm400
Debugging
=========
Use JTAG/SWD with a J-Link
References
**********
``` | /content/code_sandbox/boards/nuvoton/npcm400_evb/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 726 |
```unknown
/*
*/
#include <dt-bindings/pinctrl/same70q-pinctrl.h>
&pinctrl {
afec0_default: afec0_default { /* ADCL - J502 */
group1 {
pinmux = <PD30X_AFE0_AD0>,
<PA19X_AFE0_AD8>,
<PA17X_AFE0_AD6>;
};
};
can0_default: can0_default {
group1 {
pinmux = <PB3A_CAN0_RX>,
<PB2A_CAN0_TX>;
};
};
gmac_rmii: gmac_rmii {
group1 {
pinmux = <PD0A_GMAC_GTXCK>,
<PD1A_GMAC_GTXEN>,
<PD2A_GMAC_GTX0>,
<PD3A_GMAC_GTX1>,
<PD4A_GMAC_GRXDV>,
<PD5A_GMAC_GRX0>,
<PD6A_GMAC_GRX1>,
<PD7A_GMAC_GRXER>;
};
};
mdio_default: mdio_default {
group1 {
pinmux = <PD8A_GMAC_GMDC>,
<PD9A_GMAC_GMDIO>;
};
};
pwm_default: pwm_default {
group1 {
pinmux = <PA0A_PWMC0_PWMH0>,
<PC19B_PWMC0_PWMH2>,
<PD26A_PWMC0_PWML2>;
};
};
spi0_default: spi0_default {
group1 {
pinmux = <PD20B_SPI0_MISO>,
<PD21B_SPI0_MOSI>,
<PD22B_SPI0_SPCK>;
};
};
spi1_default: spi1_default {
group1 {
pinmux = <PC26C_SPI1_MISO>,
<PC27C_SPI1_MOSI>,
<PC24C_SPI1_SPCK>,
<PC25C_SPI1_NPCS0>;
};
};
ssc_default: ssc_default {
group1 {
pinmux = <PD24B_SSC_RF>,
<PA22A_SSC_RK>,
<PA10C_SSC_RD>,
<PB0D_SSC_TF>,
<PB1D_SSC_TK>,
<PB5D_SSC_TD>;
};
};
tc0_qdec_default: tc0_qdec_default {
group1 {
pinmux = <PA0B_TC0_TIOA0>,
<PA1B_TC0_TIOB0>;
};
};
twihs0_default: twihs0_default {
group1 {
pinmux = <PA4A_TWI0_TWCK>,
<PA3A_TWI0_TWD>;
};
};
twihs1_default: twihs1_default {
group1 {
pinmux = <PB5A_TWI1_TWCK>,
<PB4A_TWI1_TWD>;
};
};
twihs2_default: twihs2_default {
group1 {
pinmux = <PD28C_TWI2_TWCK>,
<PD27C_TWI2_TWD>;
};
};
uart0_default: uart0_default {
group1 {
pinmux = <PA9A_UART0_RXD>,
<PA10A_UART0_TXD>;
};
};
uart1_default: uart1_default {
group1 {
pinmux = <PA5C_UART1_RXD>,
<PA6C_UART1_TXD>;
};
};
uart2_default: uart2_default {
group1 {
pinmux = <PD25C_UART2_RXD>,
<PD26C_UART2_TXD>;
};
};
uart3_default: uart3_default {
group1 {
pinmux = <PD28A_UART3_RXD>,
<PD30A_UART3_TXD>;
};
};
uart4_default: uart4_default {
group1 {
pinmux = <PD19C_UART4_TXD>,
<PD18C_UART4_RXD>;
};
};
usart0_default: usart0_default {
group1 {
pinmux = <PB0C_USART0_RXD>,
<PB1C_USART0_TXD>;
};
};
usart0_hw_ctrl_flow_clk: usart0_hw_ctrl_flow_clk {
group1 {
pinmux = <PB0C_USART0_RXD>,
<PB3C_USART0_RTS>;
bias-pull-up;
};
group2 {
pinmux = <PB1C_USART0_TXD>,
<PB2C_USART0_CTS>,
<PB13C_USART0_SCK>;
};
};
usart1_default: usart1_default {
group1 {
pinmux = <PA21A_USART1_RXD>,
<PB4D_USART1_TXD>;
};
};
usart1_hw_ctrl_flow: usart1_hw_ctrl_flow {
group1 {
pinmux = <PA21A_USART1_RXD>,
<PA24A_USART1_RTS>;
bias-pull-up;
};
group2 {
pinmux = <PB4D_USART1_TXD>,
<PA25A_USART1_CTS>;
};
};
usart2_default: usart2_default {
group1 {
pinmux = <PD15B_USART2_RXD>,
<PD16B_USART2_TXD>;
};
};
usart2_hw_ctrl_flow_clk: usart2_hw_ctrl_flow_clk {
group1 {
pinmux = <PD15B_USART2_RXD>,
<PD18B_USART2_RTS>;
bias-pull-up;
};
group2 {
pinmux = <PD16B_USART2_TXD>,
<PD19B_USART2_CTS>,
<PD17B_USART2_SCK>;
};
};
};
``` | /content/code_sandbox/boards/tdk/robokit1/robokit1-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,345 |
```yaml
identifier: robokit1
name: TDK RoboKit1
type: mcu
arch: arm
flash: 2048
ram: 384
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- can
- dma
- hwinfo
- gpio
- i2c
- pwm
- spi
- usb_device
- watchdog
vendor: tdk
``` | /content/code_sandbox/boards/tdk/robokit1/robokit1.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 104 |
```yaml
board:
name: robokit1
vendor: tdk
socs:
- name: same70q21b
``` | /content/code_sandbox/boards/tdk/robokit1/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 30 |
```ini
if {[info exists env(OPENOCD_INTERFACE)]} {
set INTERFACE $env(OPENOCD_INTERFACE)
} else {
# By default connect over Debug USB port using the EDBG chip
set INTERFACE "cmsis-dap"
}
source [find interface/$INTERFACE.cfg]
transport select swd
set CHIPNAME atsame70q21
source [find target/atsamv.cfg]
reset_config srst_only
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
``` | /content/code_sandbox/boards/tdk/robokit1/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 143 |
```unknown
/*
*
*/
#include "robokit1-pinctrl.dtsi"
/ {
aliases {
led0 = &led_0;
magn0 = &akm09918c;
accel0 = &icm42688;
die-temp0 = &icm42688;
ambient-temp0 = &temp_sensor;
};
chosen {
zephyr,console = &uart2;
zephyr,shell-uart = &uart2;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
};
leds {
compatible = "gpio-leds";
led_0: led_0 {
gpios = <&pioa 11 GPIO_ACTIVE_HIGH>;
label = "User LED";
};
led_1: led_1 {
gpios = <&pioa 12 GPIO_ACTIVE_HIGH>;
label = "User LED";
};
led_2: led_2 {
gpios = <&pioa 13 GPIO_ACTIVE_HIGH>;
label = "User LED";
};
led_3: led_3 {
gpios = <&pioa 14 GPIO_ACTIVE_HIGH>;
label = "User LED";
};
};
temp_sensor: ambient_temp_sensor {
compatible = "epcos,b57861s0103a039";
io-channels = <&spi_adc 0>;
pullup-uv = <3300000>;
pullup-ohm = <0>;
pulldown-ohm = <10000>;
connected-positive;
};
};
&cpu0 {
clock-frequency = <300000000>;
};
&afec0 {
pinctrl-0 = <&afec0_default>;
pinctrl-names = "default";
status = "okay";
};
&dacc {
status = "okay";
};
&twihs0 {
pinctrl-0 = <&twihs0_default>;
pinctrl-names = "default";
status = "okay";
};
&twihs1 {
pinctrl-0 = <&twihs1_default>;
pinctrl-names = "default";
status = "okay";
};
&twihs2 {
pinctrl-0 = <&twihs2_default>;
pinctrl-names = "default";
status = "okay";
akm09918c: akm09918c@c {
compatible = "asahi-kasei,akm09918c";
reg = <0xc>;
};
};
#include <zephyr/dt-bindings/sensor/icm42688.h>
&spi0 {
pinctrl-0 = <&spi0_default>;
pinctrl-names = "default";
dmas = <&xdmac 0 DMA_PERID_SPI0_TX>, <&xdmac 1 DMA_PERID_SPI0_RX>;
dma-names = "tx", "rx";
cs-gpios =<&pioa 31 GPIO_ACTIVE_LOW>,
<&pioc 31 GPIO_ACTIVE_LOW>;
status = "okay";
icm42688: icm42688p@0 {
compatible = "invensense,icm42688";
reg = <0>;
int-gpios = <&pioc 5 GPIO_ACTIVE_HIGH>;
spi-max-frequency = <24000000>;
accel-pwr-mode = <ICM42688_DT_ACCEL_LN>;
accel-odr = <ICM42688_DT_ACCEL_ODR_2000>;
accel-fs = <ICM42688_DT_ACCEL_FS_16>;
gyro-pwr-mode = <ICM42688_DT_GYRO_LN>;
gyro-odr = <ICM42688_DT_GYRO_ODR_2000>;
gyro-fs = <ICM42688_DT_GYRO_FS_2000>;
};
spi_adc: adc@1 {
compatible = "ti,ads7052";
reg = <1>;
#io-channel-cells = <1>;
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <24000000>;
channel@0 {
reg = <0>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_VDD_1";
zephyr,vref-mv = <3300>;
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
zephyr,resolution = <14>;
};
};
};
&spi1 {
pinctrl-0 = <&spi1_default>;
pinctrl-names = "default";
cs-gpios = <&pioc 25 GPIO_ACTIVE_LOW>;
status = "okay";
};
&uart0 {
current-speed = <115200>;
pinctrl-0 = <&uart0_default>;
pinctrl-names = "default";
status = "okay";
};
&uart1 {
current-speed = <115200>;
pinctrl-0 = <&uart1_default>;
pinctrl-names = "default";
status = "okay";
};
&uart2 {
current-speed = <115200>;
pinctrl-0 = <&uart2_default>;
pinctrl-names = "default";
status = "okay";
};
&usart2 {
current-speed = <115200>;
pinctrl-0 = <&usart2_default>;
pinctrl-names = "default";
status = "okay";
};
&wdt {
status = "okay";
};
zephyr_udc0: &usbhs {
status = "okay";
};
&mdio {
pinctrl-0 = <&mdio_default>;
pinctrl-names = "default";
status = "okay";
};
&pwm0 {
pinctrl-0 = <&pwm_default>;
pinctrl-names = "default";
status = "okay";
};
&xdmac {
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/*
* The first half of sector 0 (64 kbytes)
* is reserved for the bootloader
*/
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x0 0x00010000>;
read-only;
};
/* From sector 1 to sector 7 (included): slot0 (896 kbytes) */
slot0_partition: partition@20000 {
label = "image-0";
reg = <0x00020000 0x000e0000>;
};
/* From sector 8 to sector 14 (included): slot1 (896 kbytes) */
slot1_partition: partition@100000 {
label = "image-1";
reg = <0x00100000 0x000e0000>;
};
/* Sector 15: scratch (128 kbytes) */
scratch_partition: partition@1e0000 {
label = "image-scratch";
reg = <0x001e0000 0x00020000>;
};
};
};
``` | /content/code_sandbox/boards/tdk/robokit1/robokit1-common.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,576 |
```restructuredtext
.. _boards-01space:
01space
#######
.. toctree::
:maxdepth: 1
:glob:
**/*
``` | /content/code_sandbox/boards/01space/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 33 |
```unknown
/*
*
*/
/dts-v1/;
#include <espressif/esp32c3/esp32c3_fx4.dtsi>
#include "esp32c3_042_oled-pinctrl.dtsi"
/ {
model = "01space ESP32C3 0.42 OLED";
chosen {
zephyr,sram = &sram0;
zephyr,console = &usb_serial;
zephyr,shell-uart = &usb_serial;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,canbus = &twai;
zephyr,bt-hci = &esp32_bt_hci;
zephyr,display = &eastrising_72x40;
};
aliases {
i2c-0 = &i2c0;
watchdog0 = &wdt0;
};
/* WS2812B LED connected to GPIO2 */
};
/* Have to use uart1 as some tests are hardcoded for that DTS node :/ */
&uart1 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart1_default>;
pinctrl-names = "default";
};
&i2c0 {
status = "okay";
clock-frequency = <I2C_BITRATE_STANDARD>;
pinctrl-0 = <&i2c0_default>;
pinctrl-names = "default";
eastrising_72x40: ssd1306@3c {
compatible = "solomon,ssd1306fb";
reg = <0x3c>;
width = <72>;
height = <40>;
segment-offset = <28>;
page-offset = <0>;
display-offset = <0>;
multiplex-ratio = <0x27>;
prechargep = <0x22>;
ready-time-ms = <10>;
segment-remap;
com-invdir;
use-internal-iref;
};
};
&spi2 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
pinctrl-0 = <&spim2_default>;
pinctrl-names = "default";
};
&usb_serial {
status = "okay";
};
&trng0 {
status = "okay";
};
&gpio0 {
status = "okay";
};
&wdt0 {
status = "okay";
};
&timer0 {
status = "okay";
};
&timer1 {
status = "okay";
};
&wifi {
status = "okay";
};
&esp32_bt_hci {
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 0x0000F000>;
read-only;
};
slot0_partition: partition@10000 {
label = "image-0";
reg = <0x00010000 0x00100000>;
};
slot1_partition: partition@110000 {
label = "image-1";
reg = <0x00110000 0x00100000>;
};
scratch_partition: partition@210000 {
label = "image-scratch";
reg = <0x00210000 0x00040000>;
};
storage_partition: partition@250000 {
label = "storage";
reg = <0x00250000 0x00006000>;
};
};
};
``` | /content/code_sandbox/boards/01space/esp32c3_042_oled/esp32c3_042_oled.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 802 |
```cmake
if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*")
set(OPENOCD OPENOCD-NOTFOUND)
endif()
find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH)
include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake)
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
``` | /content/code_sandbox/boards/01space/esp32c3_042_oled/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 102 |
```restructuredtext
.. _robokit1:
TDK RoboKit 1
#############
Overview
********
The TDK RoboKit1 is a development board for use primarily with ROS2 and provides a large
number of small ground robotics useful sensors including chirp sensors for time of flight
(e.g. ultrasonic obstacle detection).
It pairs a 300MHz Cortex-M7 ATSAME70Q21 with an array of TDK sensors and pin headers useful for robotics.
.. image:: img/tdk_robokit1.jpg
:align: center
:alt: TDK RoboKit1
Hardware
********
- ATSAME70Q21 ARM Cortex-M7 Processor
- 12 MHz crystal oscillator (Pres)
- 32.768 kHz crystal oscillator
- Micro-AB USB device
- Micro-AB USB debug (Microchip EDBG) interface supporting CMSIS-DAP, Virtual COM Port and Data
- JTAG interface connector
- One reset pushbutton
- One red user LED
- TDK ICM 42688-P 6-Axis 32KHz IMU
- TDK ICP-10111 Pressure Sensor
- TDK NTC Thermistor for Temperature
- AKM AK09918C Magnetometer
- 2 TDK HVCi-4223 Cortex-M3 Dedicated Motor Controller
- 3 TDK ICS-43434 Stereo Microphones
- Connector for Industrial Dual IMU (TDK IIM-46230)
- TDK CH101 Ultrasonic Range Sensor Array (9 Connectors, comes with 3)
Supported Features
==================
The TDK RoboKit1 board supports the following hardware
features:
.. list-table::
: header-rows: 1
* - Peripheral
- Kconfig option
- Devicetree compatible
* - GPIO
- :kconfig:option:`CONFIG_GPIO_SAM`
- :dtcompatible:`atmel,sam-gpio`
* - USART
- :kconfig:option:`CONFIG_USART_SAM`
- :dtcompatible:`atmel,sam-usart`
* - UART
- :kconfig:option:`CONFIG_UART_SAM`
- :dtcompatible:`atmel,sam-uart`
* - SPI
- :kconfig:option:`CONFIG_SPI_SAM`
- :dtcompatible:`atmel,sam-spi`
* - I2C
- :kconfig:option:`CONFIG_I2C_SAM_TWIHS`
- :dtcompatible:`atmel,sam-i2c-twihs`
* - I2S
- :kconfig:option:`CONFIG_I2S_SAM_SSC`
- :dtcompatible:`atmel,sam-ssc`
* - ADC
- :kconfig:option:`CONFIG_ADC_SAM_AFEC`
- :dtcompatible:`atmel,sam-afec`
* - DAC
- :kconfig:option:`CONFIG_DAC_SAM`
- :dtcompatible:`atmel,sam-dac`
* - PWM
- :kconfig:option:`CONFIG_PWM_SAM`
- :dtcompatible:`atmel,sam-pwm`
* - CAN
- :kconfig:option:`CONFIG_CAN_SAM`
- :dtcompatible:`atmel,sam-can`
* - USB
- :kconfig:option:`CONFIG_USB_DC_SAM_USBHS`
- :dtcompatible:`atmel,sam-usbhs`
* - WATCHDOG
- :kconfig:option:`CONFIG_WDT_SAM`
- :dtcompatible:`atmel,sam-watchdog`
* - NVIC
- N/A
- :dtcompatible:`arm,v7m-nvic`
* - SYSTICK
- N/A
- N/A
* - COUNTER
- :kconfig:option:`CONFIG_COUNTER_SAM_TC`
- :dtcompatible:`atmel,sam-tc`
* - DMA
- :kconfig:option:`CONFIG_DMA_SAM_XDMAC`
- :dtcompatible:`atmel,sam-xdmac`
* - ENTROPY
- :kconfig:option:`CONFIG_ENTROPY_SAM_RNG`
- :dtcompatible:`atmel,sam-trng`
* - HWINFO (reset cause)
- :kconfig:option:`CONFIG_HWINFO_SAM_RSTC`
- :dtcompatible:`atmel,sam-rstc`
* - HWINFO (device id)
- :kconfig:option:`CONFIG_HWINFO_SAM`
- N/A
The default configuration can be found in the Kconfig
:zephyr_file:`boards/tdk/robokit1/robokit1_defconfig`.
Connections and IOs
===================
The TDK RoboKit Hardware Guide has detailed information about board connections.
System Clock
============
The SAM E70 MCU is configured to use the 12 MHz external oscillator on the board
with the on-chip PLL to generate a 300 MHz system clock.
Serial Port
===========
The ATSAME70Q21 MCU has five UARTs and three USARTs. One of the UARTs is
configured for the console and is available as a Virtual COM Port via the USB2 connector.
Programming and Debugging
*************************
Flashing the Zephyr project onto SAM E70 MCU requires the `OpenOCD tool`_.
Both west flash and west debug commands should correctly work with both USB0 and USB1
connected and the board powered.
Flashing
========
#. Run your favorite terminal program to listen for output. Under Linux the
terminal should be :code:`/dev/ttyACM0`. For example:
.. code-block:: console
$ minicom -D /dev/ttyUSB0 -o
The -o option tells minicom not to send the modem initialization
string. Connection should be configured as follows:
- Speed: 115200
- Data: 8 bits
- Parity: None
- Stop bits: 1
#. Connect the TDK RoboKit1 board to your host computer using the
USB debug port (USB1), USB2 for a serial console, and remaining micro USB for
power. Then build and flash the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: robokit1
:goals: build flash
You should see "Hello World! robokit1" in your terminal.
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: robokit1
:maybe-skip-config:
:goals: debug
References
**********
TDK RoboKit1 Product Page:
path_to_url
.. _OpenOCD tool:
path_to_url
``` | /content/code_sandbox/boards/tdk/robokit1/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,505 |
```unknown
CONFIG_MAIN_STACK_SIZE=2048
CONFIG_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_UART_CONSOLE=y
CONFIG_GPIO=y
``` | /content/code_sandbox/boards/01space/esp32c3_042_oled/esp32c3_042_oled_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 27 |
```unknown
config BOARD_ESP32C3_042_OLED
select SOC_ESP32C3_FX4
``` | /content/code_sandbox/boards/01space/esp32c3_042_oled/Kconfig.esp32c3_042_oled | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 25 |
```yaml
identifier: esp32c3_042_oled
name: ESP32C3 0.42 OLED
type: mcu
arch: riscv
toolchain:
- zephyr
supported:
- display
- gpio
- i2c
- spi
- uart
- watchdog
testing:
ignore_tags:
- net
- bluetooth
vendor: 01space
``` | /content/code_sandbox/boards/01space/esp32c3_042_oled/esp32c3_042_oled.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 92 |
```unknown
choice BOOTLOADER
default BOOTLOADER_MCUBOOT
endchoice
choice BOOT_SIGNATURE_TYPE
default BOOT_SIGNATURE_TYPE_NONE
endchoice
``` | /content/code_sandbox/boards/01space/esp32c3_042_oled/Kconfig.sysbuild | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```yaml
board:
name: esp32c3_042_oled
vendor: 01space
socs:
- name: esp32c3
``` | /content/code_sandbox/boards/01space/esp32c3_042_oled/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 35 |
```unknown
/*
*
*/
#include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
#include <dt-bindings/pinctrl/esp32c3-pinctrl.h>
#include <zephyr/dt-bindings/pinctrl/esp32c3-gpio-sigmap.h>
&pinctrl {
uart1_default: uart1_default {
group1 {
pinmux = <UART1_TX_GPIO21>;
output-high;
};
group2 {
pinmux = <UART1_RX_GPIO20>;
bias-pull-up;
};
};
spim2_default: spim2_default {
group1 {
pinmux = <SPIM2_MISO_GPIO8>,
<SPIM2_SCLK_GPIO10>;
};
group2 {
pinmux = <SPIM2_MOSI_GPIO7>;
output-low;
};
};
i2c0_default: i2c0_default {
group1 {
pinmux = <I2C0_SDA_GPIO5>,
<I2C0_SCL_GPIO6>;
bias-pull-up;
drive-open-drain;
output-high;
};
};
};
``` | /content/code_sandbox/boards/01space/esp32c3_042_oled/esp32c3_042_oled-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 264 |
```unknown
config HEAP_MEM_POOL_ADD_SIZE_BOARD
int
default 65535 if WIFI && BT
default 51200 if WIFI
default 40960 if BT
default 4096
``` | /content/code_sandbox/boards/01space/esp32c3_042_oled/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 40 |
```ini
set ESP_RTOS none
source [find interface/esp_usb_jtag.cfg]
source [find target/esp32c3.cfg]
adapter speed 5000
``` | /content/code_sandbox/boards/01space/esp32c3_042_oled/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 35 |
```restructuredtext
.. _boards-vcc-gnd:
VCC-GND
#######
.. toctree::
:maxdepth: 1
:glob:
**/*
``` | /content/code_sandbox/boards/vcc-gnd/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 36 |
```unknown
/*
*
*/
/dts-v1/;
#include <espressif/esp32/esp32_appcpu.dtsi>
/ {
model = "VCC-GND Studio YD-ESP32 APPCPU";
compatible = "espressif,esp32";
chosen {
zephyr,sram = &sram0;
zephyr,ipc_shm = &shm0;
zephyr,ipc = &ipm0;
};
};
&ipm0 {
status = "okay";
};
&trng0 {
status = "okay";
};
&flash0 {
status = "okay";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* Reserve 60kB for the bootloader */
boot_partition: partition@1000 {
label = "mcuboot";
reg = <0x00001000 0x0000F000>;
read-only;
};
/* Reserve 1024kB for the application in slot 0 */
slot0_partition: partition@10000 {
label = "image-0";
reg = <0x00010000 0x00100000>;
};
/* Reserve 1024kB for the application in slot 1 */
slot1_partition: partition@110000 {
label = "image-1";
reg = <0x00110000 0x00100000>;
};
/* Reserve 256kB for the scratch partition */
scratch_partition: partition@210000 {
label = "image-scratch";
reg = <0x00210000 0x00040000>;
};
storage_partition: partition@250000 {
label = "storage";
reg = <0x00250000 0x00006000>;
};
};
};
``` | /content/code_sandbox/boards/vcc-gnd/yd_esp32/yd_esp32_appcpu.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 408 |
```cmake
if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*")
set(OPENOCD OPENOCD-NOTFOUND)
endif()
find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH)
include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake)
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
``` | /content/code_sandbox/boards/vcc-gnd/yd_esp32/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 102 |
```unknown
CONFIG_MAIN_STACK_SIZE=2048
CONFIG_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_UART_CONSOLE=y
CONFIG_GPIO=y
``` | /content/code_sandbox/boards/vcc-gnd/yd_esp32/yd_esp32_procpu_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 27 |
```restructuredtext
.. _01space_esp32c3_042_oled:
ESP32C3 0.42 OLED
#################
Overview
********
ESP32C3 0.42 OLED is a mini development board based on the `Espressif ESP32-C3`_
RISC-V WiFi/Bluetooth dual-mode chip.
For more details see the `01space ESP32C3 0.42 OLED`_ Github repo.
.. figure:: img/esp32c3_042_oled.webp
:align: center
:alt: 01space ESP32C3 0.42 OLED
01space ESP32C3 0.42 OLED
Hardware
********
This board is based on the ESP32-C3-FH4 with WiFi and BLE support.
It features:
* RISC-V SoC @ 160MHz with 4MB flash and 400kB RAM
* WS2812B RGB serial LED
* 0.42-inch OLED over I2C
* Qwiic I2C connector
* One pushbutton
* Onboard ceramic chip antenna
* On-chip USB-UART converter
.. note::
The RGB led is not supported on this Zephyr board yet.
.. note::
The ESP32-C3 does not have native USB, it has an on-chip USB-serial converter
instead.
Supported Features
==================
The 01space ESP32C3 0.42 OLED board configuration supports the following hardware features:
+-----------+------------+------------------+
| Interface | Controller | Driver/Component |
+===========+============+==================+
| PMP | on-chip | arch/riscv |
+-----------+------------+------------------+
| INTMTRX | on-chip | intc_esp32c3 |
+-----------+------------+------------------+
| PINMUX | on-chip | pinctrl_esp32 |
+-----------+------------+------------------+
| USB UART | on-chip | serial_esp32_usb |
+-----------+------------+------------------+
| GPIO | on-chip | gpio_esp32 |
+-----------+------------+------------------+
| UART | on-chip | uart_esp32 |
+-----------+------------+------------------+
| I2C | on-chip | i2c_esp32 |
+-----------+------------+------------------+
| SPI | on-chip | spi_esp32_spim |
+-----------+------------+------------------+
| RADIO | on-chip | Bluetooth |
+-----------+------------+------------------+
| DISPLAY | off-chip | display |
+-----------+------------+------------------+
Connections and IOs
===================
See the following image:
.. figure:: img/esp32c3_042_oled_pinout.webp
:align: center
:alt: 01space ESP32C3 0.42 OLED Pinout
01space ESP32C3 0.42 OLED Pinout
It also features a 0.42 inch OLED display, driven by a SSD1306-compatible chip.
It is connected over I2C: SDA on GPIO5, SCL on GPIO6.
Prerequisites
=============
Espressif HAL requires WiFi and Bluetooth binary blobs. Run the command below to
retrieve those files.
.. code-block:: console
west blobs fetch hal_espressif
.. note::
It is recommended running the command above after :file:`west update`.
Programming and Debugging
*************************
Standalone application
======================
The board can be loaded using a single binary image, without 2nd stage bootloader.
It is the default option when building the application without additional configuration.
.. note::
This mode does not provide any security features nor OTA updates.
Use the following command to build a sample hello_world application:
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: esp32c3_042_oled
:goals: build
Sysbuild
========
:ref:`sysbuild` makes it possible to build and flash all necessary images needed to
bootstrap the board.
By default, the ESP32 sysbuild configuration creates bootloader (MCUboot) and
application images.
To build the sample application using sysbuild, use this command:
.. zephyr-app-commands::
:tool: west
:app: samples/hello_world
:board: esp32c3_042_oled
:goals: build
:west-args: --sysbuild
:compact:
Flashing
========
For the :code:`Hello, world!` application, follow the instructions below.
Assuming the board is connected to ``/dev/ttyACM0`` on Linux.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: esp32c3_042_oled
:goals: flash
:flash-args: --esp-device /dev/ttyACM0
Since the Zephyr console is by default on the ``usb_serial`` device, we use
the espressif monitor utility to connect to the console.
.. code-block:: console
$ west espressif monitor -p /dev/ttyACM0
After the board has automatically reset and booted, you should see the following
message in the monitor:
.. code-block:: console
***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx *****
Hello World! esp32c3_042_oled
References
**********
.. target-notes::
.. _`Espressif ESP32-C3`: path_to_url
.. _`01space ESP32C3 0.42 OLED`: path_to_url
``` | /content/code_sandbox/boards/01space/esp32c3_042_oled/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,232 |
```yaml
identifier: yd_esp32/esp32/appcpu
name: YD-ESP32 APPCPU
type: mcu
arch: xtensa
toolchain:
- zephyr
supported:
- uart
testing:
ignore_tags:
- net
- bluetooth
- flash
- cpp
- posix
- watchdog
- logging
- kernel
- pm
- gpio
- crypto
- eeprom
- heap
- cmsis_rtos
- jwt
- zdsp
vendor: espressif
``` | /content/code_sandbox/boards/vcc-gnd/yd_esp32/yd_esp32_appcpu.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 130 |
```unknown
choice BOOTLOADER
default BOOTLOADER_MCUBOOT
endchoice
choice BOOT_SIGNATURE_TYPE
default BOOT_SIGNATURE_TYPE_NONE
endchoice
``` | /content/code_sandbox/boards/vcc-gnd/yd_esp32/Kconfig.sysbuild | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```unknown
CONFIG_MAIN_STACK_SIZE=2048
CONFIG_CLOCK_CONTROL=y
``` | /content/code_sandbox/boards/vcc-gnd/yd_esp32/yd_esp32_appcpu_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 15 |
```yaml
identifier: yd_esp32/esp32/procpu
name: YD-ESP32 PROCPU
type: mcu
arch: xtensa
toolchain:
- zephyr
supported:
- adc
- dac
- gpio
- i2c
- watchdog
- uart
- nvs
- pwm
- dac
- spi
- counter
- entropy
testing:
ignore_tags:
- net
- bluetooth
vendor: vcc-gnd
``` | /content/code_sandbox/boards/vcc-gnd/yd_esp32/yd_esp32_procpu.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 117 |
```unknown
# YD-ESP32 board configuration
config BOARD_YD_ESP32
select SOC_ESP32_WROOM_32UE_N4
select SOC_ESP32_PROCPU if BOARD_YD_ESP32_ESP32_PROCPU
select SOC_ESP32_APPCPU if BOARD_YD_ESP32_ESP32_APPCPU
``` | /content/code_sandbox/boards/vcc-gnd/yd_esp32/Kconfig.yd_esp32 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 71 |
```yaml
board:
name: yd_esp32
vendor: vcc-gnd
socs:
- name: esp32
``` | /content/code_sandbox/boards/vcc-gnd/yd_esp32/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 31 |
```unknown
# YD-ESP32 board configuration
if BOARD_YD_ESP32_ESP32_PROCPU
config HEAP_MEM_POOL_ADD_SIZE_BOARD
int
default 65535 if WIFI && BT
default 51200 if WIFI
default 40960 if BT
default 4096
endif # BOARD_YD_ESP32_ESP32_PROCPU
if BOARD_YD_ESP32_ESP32_APPCPU
config HEAP_MEM_POOL_ADD_SIZE_BOARD
default 256
endif # BOARD_YD_ESP32_ESP32_PROCPU
``` | /content/code_sandbox/boards/vcc-gnd/yd_esp32/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 114 |
```unknown
/*
*
*/
#include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
#include <dt-bindings/pinctrl/esp32-pinctrl.h>
#include <zephyr/dt-bindings/pinctrl/esp32-gpio-sigmap.h>
&pinctrl {
uart0_default: uart0_default {
group1 {
pinmux = <UART0_TX_GPIO1>;
output-high;
};
group2 {
pinmux = <UART0_RX_GPIO3>;
bias-pull-up;
};
};
uart1_default: uart1_default {
group1 {
pinmux = <UART1_TX_GPIO10>;
};
group2 {
pinmux = <UART1_RX_GPIO9>;
bias-pull-up;
};
};
uart2_default: uart2_default {
group1 {
pinmux = <UART2_TX_GPIO17>;
};
group2 {
pinmux = <UART2_RX_GPIO16>;
bias-pull-up;
};
};
spim2_default: spim2_default {
group1 {
pinmux = <SPIM2_MISO_GPIO12>,
<SPIM2_SCLK_GPIO14>,
<SPIM2_CSEL_GPIO15>;
};
group2 {
pinmux = <SPIM2_MOSI_GPIO13>;
output-low;
};
};
spim3_default: spim3_default {
group1 {
pinmux = <SPIM3_MISO_GPIO19>,
<SPIM3_SCLK_GPIO18>,
<SPIM3_CSEL_GPIO5>;
};
group2 {
pinmux = <SPIM3_MOSI_GPIO23>;
output-low;
};
};
i2c0_default: i2c0_default {
group1 {
pinmux = <I2C0_SDA_GPIO21>,
<I2C0_SCL_GPIO22>;
bias-pull-up;
drive-open-drain;
output-high;
};
};
};
``` | /content/code_sandbox/boards/vcc-gnd/yd_esp32/yd_esp32-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 461 |
```ini
set ESP_RTOS none
set ESP32_ONLYCPU 1
source [find interface/ftdi/esp32_devkitj_v1.cfg]
source [find target/esp32.cfg]
``` | /content/code_sandbox/boards/vcc-gnd/yd_esp32/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 41 |
```unknown
/*
*/
/dts-v1/;
#include <espressif/esp32/esp32_wroom_32ue_n16.dtsi>
#include <zephyr/dt-bindings/led/led.h>
#include "yd_esp32-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "VCC-GND Studio YD-ESP32 PROCPU";
compatible = "espressif,esp32";
aliases {
uart-0 = &uart0;
i2c-0 = &i2c0;
sw0 = &button0;
watchdog0 = &wdt0;
led-strip = &rgb_led;
};
buttons {
compatible = "gpio-keys";
button0: button_0 {
gpios = <&gpio0 0 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "BOOT Button";
zephyr,code = <INPUT_KEY_0>;
};
};
chosen {
zephyr,sram = &sram0;
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,bt-hci = &esp32_bt_hci;
};
};
&pinctrl {
spim2_default: spim2_default {
group2 {
pinmux = <SPIM2_MOSI_GPIO16>;
output-low;
};
};
};
&uart0 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart0_default>;
pinctrl-names = "default";
};
&uart1 {
current-speed = <115200>;
pinctrl-0 = <&uart1_default>;
pinctrl-names = "default";
};
&uart2 {
current-speed = <115200>;
pinctrl-0 = <&uart2_default>;
pinctrl-names = "default";
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&i2c0 {
status = "okay";
clock-frequency = <I2C_BITRATE_STANDARD>;
sda-gpios = <&gpio0 21 GPIO_OPEN_DRAIN>;
scl-gpios = <&gpio0 22 GPIO_OPEN_DRAIN>;
pinctrl-0 = <&i2c0_default>;
pinctrl-names = "default";
};
&spi2 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
pinctrl-0 = <&spim2_default>;
pinctrl-names = "default";
rgb_led: ws2812@0 {
compatible = "worldsemi,ws2812-spi";
/* SPI */
reg = <0>; /* ignored, but necessary for SPI bindings */
spi-max-frequency = <6400000>;
/* XL-5050RGBC-WS2812B */
chain-length = <1>;
spi-one-frame = <0xfc>; /* 11111100: 0.937 us high and 0.313 us low */
spi-zero-frame = <0xc0>; /* 11000000: 0.313 us high and 0.937 us low */
color-mapping = <LED_COLOR_ID_GREEN
LED_COLOR_ID_RED
LED_COLOR_ID_BLUE>;
};
};
&spi3 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
pinctrl-0 = <&spim3_default>;
pinctrl-names = "default";
};
&timer0 {
status = "disabled";
};
&timer1 {
status = "disabled";
};
&timer2 {
status = "disabled";
};
&timer3 {
status = "disabled";
};
&trng0 {
status = "okay";
};
&flash0 {
status = "okay";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* Reserve 60kB for the bootloader */
boot_partition: partition@1000 {
label = "mcuboot";
reg = <0x00001000 0x0000F000>;
read-only;
};
/* Reserve 1024kB for the application in slot 0 */
slot0_partition: partition@10000 {
label = "image-0";
reg = <0x00010000 0x00100000>;
};
/* Reserve 1024kB for the application in slot 1 */
slot1_partition: partition@110000 {
label = "image-1";
reg = <0x00110000 0x00100000>;
};
/* Reserve 256kB for the scratch partition */
scratch_partition: partition@210000 {
label = "image-scratch";
reg = <0x00210000 0x00040000>;
};
storage_partition: partition@250000 {
label = "storage";
reg = <0x00250000 0x00006000>;
};
};
};
&esp32_bt_hci {
status = "okay";
};
``` | /content/code_sandbox/boards/vcc-gnd/yd_esp32/yd_esp32_procpu.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,160 |
```restructuredtext
.. _boards-raytac:
Raytac Corporation
##################
.. toctree::
:maxdepth: 1
:glob:
**/*
``` | /content/code_sandbox/boards/raytac/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 35 |
```unknown
/*
*/
&pinctrl {
uart0_default: uart0_default {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 6)>,
<NRF_PSEL(UART_RTS, 0, 5)>;
};
group2 {
psels = <NRF_PSEL(UART_RX, 0, 8)>,
<NRF_PSEL(UART_CTS, 0, 7)>;
bias-pull-up;
};
};
uart0_sleep: uart0_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 6)>,
<NRF_PSEL(UART_RX, 0, 8)>,
<NRF_PSEL(UART_RTS, 0, 5)>,
<NRF_PSEL(UART_CTS, 0, 7)>;
low-power-enable;
};
};
uart1_default: uart1_default {
group1 {
psels = <NRF_PSEL(UART_RX, 1, 1)>;
bias-pull-up;
};
group2 {
psels = <NRF_PSEL(UART_TX, 1, 2)>;
};
};
uart1_sleep: uart1_sleep {
group1 {
psels = <NRF_PSEL(UART_RX, 1, 1)>,
<NRF_PSEL(UART_TX, 1, 2)>;
low-power-enable;
};
};
i2c0_default: i2c0_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
<NRF_PSEL(TWIM_SCL, 0, 27)>;
};
};
i2c0_sleep: i2c0_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
<NRF_PSEL(TWIM_SCL, 0, 27)>;
low-power-enable;
};
};
i2c1_default: i2c1_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 30)>,
<NRF_PSEL(TWIM_SCL, 0, 31)>;
};
};
i2c1_sleep: i2c1_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 30)>,
<NRF_PSEL(TWIM_SCL, 0, 31)>;
low-power-enable;
};
};
pwm0_default: pwm0_default {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 0, 13)>;
nordic,invert;
};
};
pwm0_sleep: pwm0_sleep {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 0, 13)>;
low-power-enable;
};
};
spi0_default: spi0_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 27)>,
<NRF_PSEL(SPIM_MOSI, 0, 26)>,
<NRF_PSEL(SPIM_MISO, 0, 29)>;
};
};
spi0_sleep: spi0_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 27)>,
<NRF_PSEL(SPIM_MOSI, 0, 26)>,
<NRF_PSEL(SPIM_MISO, 0, 29)>;
low-power-enable;
};
};
spi1_default: spi1_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 31)>,
<NRF_PSEL(SPIM_MOSI, 0, 30)>,
<NRF_PSEL(SPIM_MISO, 1, 8)>;
};
};
spi1_sleep: spi1_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 31)>,
<NRF_PSEL(SPIM_MOSI, 0, 30)>,
<NRF_PSEL(SPIM_MISO, 1, 8)>;
low-power-enable;
};
};
};
``` | /content/code_sandbox/boards/raytac/mdbt50q_db_33/raytac_mdbt50q_db_33_nrf52833-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,009 |
```cmake
board_runner_args(jlink "--device=nRF52833_xxAA" "--speed=4000")
board_runner_args(pyocd "--target=nrf52833" "--frequency=4000000")
include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/openocd-nrf5.board.cmake)
``` | /content/code_sandbox/boards/raytac/mdbt50q_db_33/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 113 |
```cmake
# Suppress "unique_unit_address_if_enabled" to handle the following overlaps:
# - power@40000000 & clock@40000000 & bprot@40000000
# - acl@4001e000 & flash-controller@4001e000
list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled")
``` | /content/code_sandbox/boards/raytac/mdbt50q_db_33/pre_dt_board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 72 |
```restructuredtext
.. _yd_esp32:
YD-ESP32
########
Overview
********
The YD-ESP32 development board is one of VCC-GND Studios official boards.
This board is based on the ESP32-WROOM-32E module, with the ESP32 as the core.
.. figure:: img/yd_esp32.png
:align: center
:alt: YD-ESP32
YD-ESP32 DevKit with ESP32-WROOM-32E Module
ESP32
=====
ESP32 is a series of low cost, low power system on a chip microcontrollers
with integrated Wi-Fi & dual-mode Bluetooth. The ESP32 series employs a
Tensilica Xtensa LX6 microprocessor in both dual-core and single-core
variations. ESP32 is created and developed by Espressif Systems, a
Shanghai-based Chinese company, and is manufactured by TSMC using their 40nm
process. [1]_
The features include the following:
- Dual core Xtensa microprocessor (LX6), running at 160 or 240MHz
- 520KB of SRAM
- 802.11b/g/n/e/i
- Bluetooth v4.2 BR/EDR and BLE
- Various peripherals:
- 12-bit ADC with up to 18 channels
- 2x 8-bit DACs
- 10x touch sensors
- Temperature sensor
- 4x SPI
- 2x I2S
- 2x I2C
- 3x UART
- SD/SDIO/MMC host
- Slave (SDIO/SPI)
- Ethernet MAC
- CAN bus 2.0
- IR (RX/TX)
- Motor PWM
- LED PWM with up to 16 channels
- Hall effect sensor
- Cryptographic hardware acceleration (RNG, ECC, RSA, SHA-2, AES)
- 5uA deep sleep current
Supported Features
==================
Current Zephyr's YD-ESP32 board supports the following features:
+------------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+============+============+=====================================+
| UART | on-chip | serial port |
+------------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+------------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+------------+------------+-------------------------------------+
| USB-JTAG | on-chip | hardware interface |
+------------+------------+-------------------------------------+
| SPI Master | on-chip | spi |
+------------+------------+-------------------------------------+
| Timers | on-chip | counter |
+------------+------------+-------------------------------------+
| Watchdog | on-chip | watchdog |
+------------+------------+-------------------------------------+
| TRNG | on-chip | entropy |
+------------+------------+-------------------------------------+
| LEDC | on-chip | pwm |
+------------+------------+-------------------------------------+
| MCPWM | on-chip | pwm |
+------------+------------+-------------------------------------+
| PCNT | on-chip | qdec |
+------------+------------+-------------------------------------+
| SPI DMA | on-chip | spi |
+------------+------------+-------------------------------------+
| TWAI | on-chip | can |
+------------+------------+-------------------------------------+
| ADC | on-chip | adc |
+------------+------------+-------------------------------------+
| DAC | on-chip | dac |
+------------+------------+-------------------------------------+
| Wi-Fi | on-chip | |
+------------+------------+-------------------------------------+
| Bluetooth | on-chip | |
+------------+------------+-------------------------------------+
System requirements
===================
Prerequisites
-------------
Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command
below to retrieve those files.
.. code-block:: console
west blobs fetch hal_espressif
.. note::
It is recommended running the command above after :file:`west update`.
Building & Flashing
*******************
Simple boot
===========
The board could be loaded using the single binary image, without 2nd stage bootloader.
It is the default option when building the application without additional configuration.
.. note::
Simple boot does not provide any security features nor OTA updates.
MCUboot bootloader
==================
User may choose to use MCUboot bootloader instead. In that case the bootloader
must be build (and flash) at least once.
There are two options to be used when building an application:
1. Sysbuild
2. Manual build
.. note::
User can select the MCUboot bootloader by adding the following line
to the board default configuration file.
.. code:: cfg
CONFIG_BOOTLOADER_MCUBOOT=y
Sysbuild
========
The sysbuild makes possible to build and flash all necessary images needed to
bootstrap the board with the ESP32 SoC.
To build the sample application using sysbuild use the command:
.. zephyr-app-commands::
:tool: west
:app: samples/hello_world
:board: yd_esp32
:goals: build
:west-args: --sysbuild
:compact:
By default, the ESP32 sysbuild creates bootloader (MCUboot) and application
images. But it can be configured to create other kind of images.
Build directory structure created by sysbuild is different from traditional
Zephyr build. Output is structured by the domain subdirectories:
.. code-block::
build/
hello_world
zephyr
zephyr.elf
zephyr.bin
mcuboot
zephyr
zephyr.elf
zephyr.bin
domains.yaml
.. note::
With ``--sysbuild`` option the bootloader will be re-build and re-flash
every time the pristine build is used.
For more information about the system build please read the :ref:`sysbuild` documentation.
Manual build
============
During the development cycle, it is intended to build & flash as quickly possible.
For that reason, images can be build one at a time using traditional build.
The instructions following are relevant for both manual build and sysbuild.
The only difference is the structure of the build directory.
.. note::
Remember that bootloader (MCUboot) needs to be flash at least once.
Build and flash applications as usual (see :ref:`build_an_application` and
:ref:`application_run` for more details).
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: yd_esp32/esp32/procpu
:goals: build
The usual ``flash`` target will work with the ``yd_esp32`` board
configuration. Here is an example for the :ref:`hello_world`
application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: yd_esp32/esp32/procpu
:goals: flash
Open the serial monitor using the following command:
.. code-block:: shell
west espressif monitor
After the board has automatically reset and booted, you should see the following
message in the monitor:
.. code-block:: console
***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx *****
Hello World! yd_esp32
RGB LED
=======
The board contains an addressable RGB LED (`XL-5050RGBC-WS2812B`_), driven by GPIO16.
Here is an example of how to test it using the :zephyr:code-sample:`led-strip` application.
.. zephyr-app-commands::
:zephyr-app: samples/drivers/led_strip
:board: yd_esp32/esp32/procpu
:goals: flash
.. _`XL-5050RGBC-WS2812B`: path_to_url
Debugging
*********
ESP32 support on OpenOCD is available upstream as of version 0.12.0.
Download and install OpenOCD from `OpenOCD`_.
On the YD-ESP32 board, the JTAG pins are not run to a
standard connector (e.g. ARM 20-pin) and need to be manually connected
to the external programmer (e.g. a Flyswatter2):
+------------+-----------+
| ESP32 pin | JTAG pin |
+============+===========+
| 3V3 | VTRef |
+------------+-----------+
| EN | nTRST |
+------------+-----------+
| IO14 | TMS |
+------------+-----------+
| IO12 | TDI |
+------------+-----------+
| GND | GND |
+------------+-----------+
| IO13 | TCK |
+------------+-----------+
| IO15 | TDO |
+------------+-----------+
Further documentation can be obtained from the SoC vendor in `JTAG debugging
for ESP32`_.
Here is an example for building the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: yd_esp32/esp32/procpu
:goals: build flash
You can debug an application in the usual way. Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: yd_esp32/esp32/procpu
:goals: debug
Note on Debugging with GDB Stub
===============================
GDB stub is enabled on ESP32.
* When adding breakpoints, please use hardware breakpoints with command
``hbreak``. Command ``break`` uses software breakpoints which requires
modifying memory content to insert break/trap instructions.
This does not work as the code is on flash which cannot be randomly
accessed for modification.
.. _`JTAG debugging for ESP32`: path_to_url
.. _`OpenOCD`: path_to_url
References
**********
.. [1] path_to_url
.. _ESP32 Technical Reference Manual: path_to_url
.. _Hardware Reference: path_to_url
``` | /content/code_sandbox/boards/vcc-gnd/yd_esp32/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,227 |
```yaml
board:
name: raytac_mdbt50q_db_33
vendor: raytac
socs:
- name: nrf52833
``` | /content/code_sandbox/boards/raytac/mdbt50q_db_33/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 38 |
```unknown
# Raytac MDBT50Q_DB_33 NRF52833 board configuration
# Enable MPU
CONFIG_ARM_MPU=y
# Enable hardware stack protection
CONFIG_HW_STACK_PROTECTION=y
# Enable RTT
CONFIG_USE_SEGGER_RTT=y
# enable GPIO
CONFIG_GPIO=y
# enable uart driver
CONFIG_SERIAL=y
# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
``` | /content/code_sandbox/boards/raytac/mdbt50q_db_33/raytac_mdbt50q_db_33_nrf52833_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 84 |
```unknown
# Raytac MDBT50Q-DB-33 NRF52833 board configuration
if BOARD_RAYTAC_MDBT50Q_DB_33
config BT_CTLR
default BT
endif # BOARD_RAYTAC_MDBT50Q_DB_33
``` | /content/code_sandbox/boards/raytac/mdbt50q_db_33/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 58 |
```yaml
identifier: raytac_mdbt50q_db_33/nrf52833
name: Raytac MDBT50Q-DB-33 nRF52833
type: mcu
arch: arm
ram: 128
flash: 512
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- adc
- ble
- counter
- gpio
- i2c
- i2s
- ieee802154
- pwm
- spi
- usb_device
- watchdog
- netif:openthread
``` | /content/code_sandbox/boards/raytac/mdbt50q_db_33/raytac_mdbt50q_db_33_nrf52833.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 140 |
```unknown
# Raytac MDBT50Q-DB-33 nRF52833 board configuration
config BOARD_RAYTAC_MDBT50Q_DB_33
select SOC_NRF52833_QIAA
``` | /content/code_sandbox/boards/raytac/mdbt50q_db_33/Kconfig.raytac_mdbt50q_db_33 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 45 |
```unknown
/*
*
*/
/dts-v1/;
#include <nordic/nrf52833_qiaa.dtsi>
#include "raytac_mdbt50q_db_33_nrf52833-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "Raytac MDBT50Q-DB-33 nRF52833";
compatible = "raytac,raytac-mdbt50q-db-33-nrf52833";
chosen {
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,uart-mcumgr = &uart0;
zephyr,bt-mon-uart = &uart0;
zephyr,bt-c2h-uart = &uart0;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,ieee802154 = &ieee802154;
};
leds {
compatible = "gpio-leds";
led0: led_0 {
gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
label = "Green LED 0";
};
led1: led_1 {
gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
label = "Red LED 1";
};
led2: led_2 {
gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
label = "Blue LED 2";
};
};
pwmleds {
compatible = "pwm-leds";
pwm_led0: pwm_led_0 {
pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_INVERTED>;
};
};
buttons {
compatible = "gpio-keys";
button0: button_0 {
gpios = <&gpio0 11 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "Push button switch 0";
zephyr,code = <INPUT_KEY_0>;
};
button1: button_1 {
gpios = <&gpio0 12 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "Push button switch 1";
zephyr,code = <INPUT_KEY_1>;
};
button2: button_2 {
gpios = <&gpio0 24 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "Push button switch 2";
zephyr,code = <INPUT_KEY_2>;
};
button3: button_3 {
gpios = <&gpio0 25 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "Push button switch 3";
zephyr,code = <INPUT_KEY_3>;
};
};
/* These aliases are provided for compatibility with samples */
aliases {
led0 = &led0;
led1 = &led1;
led2 = &led2;
pwm-led0 = &pwm_led0;
sw0 = &button0;
sw1 = &button1;
sw2 = &button2;
sw3 = &button3;
bootloader-led0 = &led0;
mcuboot-button0 = &button0;
mcuboot-led0 = &led0;
watchdog0 = &wdt0;
};
};
®1 {
regulator-initial-mode = <NRF5X_REG_MODE_DCDC>;
};
&adc {
status = "okay";
};
&uicr {
gpio-as-nreset;
};
&gpiote {
status = "okay";
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&uart0 {
compatible = "nordic,nrf-uarte";
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart0_default>;
pinctrl-1 = <&uart0_sleep>;
pinctrl-names = "default", "sleep";
};
&uart1 {
compatible = "nordic,nrf-uarte";
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart1_default>;
pinctrl-1 = <&uart1_sleep>;
pinctrl-names = "default", "sleep";
};
&i2c0 {
compatible = "nordic,nrf-twi";
status = "okay";
pinctrl-0 = <&i2c0_default>;
pinctrl-1 = <&i2c0_sleep>;
pinctrl-names = "default", "sleep";
};
&i2c1 {
compatible = "nordic,nrf-twi";
/* Cannot be used together with spi1. */
/* status = "okay"; */
pinctrl-0 = <&i2c1_default>;
pinctrl-1 = <&i2c1_sleep>;
pinctrl-names = "default", "sleep";
};
&pwm0 {
status = "okay";
pinctrl-0 = <&pwm0_default>;
pinctrl-1 = <&pwm0_sleep>;
pinctrl-names = "default", "sleep";
};
&spi0 {
compatible = "nordic,nrf-spi";
/* Cannot be used together with i2c0. */
/* status = "okay"; */
pinctrl-0 = <&spi0_default>;
pinctrl-1 = <&spi0_sleep>;
pinctrl-names = "default", "sleep";
};
&spi1 {
compatible = "nordic,nrf-spi";
status = "okay";
pinctrl-0 = <&spi1_default>;
pinctrl-1 = <&spi1_sleep>;
pinctrl-names = "default", "sleep";
};
&ieee802154 {
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x0 0xc000>;
};
slot0_partition: partition@c000 {
label = "image-0";
reg = <0xc000 0x37000>;
};
slot1_partition: partition@43000 {
label = "image-1";
reg = <0x43000 0x37000>;
};
storage_partition: partition@7a000 {
label = "storage";
reg = <0x7a000 0x6000>;
};
};
};
zephyr_udc0: &usbd {
compatible = "nordic,nrf-usbd";
status = "okay";
};
``` | /content/code_sandbox/boards/raytac/mdbt50q_db_33/raytac_mdbt50q_db_33_nrf52833.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,500 |
```cmake
board_runner_args(jlink "--device=nrf52840_xxAA" "--speed=4000")
board_runner_args(pyocd "--target=nrf52840" "--frequency=4000000")
include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/openocd-nrf5.board.cmake)
``` | /content/code_sandbox/boards/raytac/mdbt50q_db_40/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 113 |
```restructuredtext
.. _raytac_mdbt50q_db_33_nrf52833:
Raytac MDBT50Q-DB-33
####################
Overview
********
The Raytac MDBT50Q-DB-33 hardware provides support for the
Nordic Semiconductor nRF52833 ARM Cortex-M4F CPU and the following devices:
* :abbr:`ADC (Analog to Digital Converter)`
* CLOCK
* FLASH
* :abbr:`GPIO (General Purpose Input Output)`
* :abbr:`I2C (Inter-Integrated Circuit)`
* :abbr:`MPU (Memory Protection Unit)`
* :abbr:`NVIC (Nested Vectored Interrupt Controller)`
* :abbr:`PWM (Pulse Width Modulation)`
* RADIO (Bluetooth Low Energy and 802.15.4)
* :abbr:`RTC (nRF RTC System Clock)`
* Segger RTT (RTT Console)
* :abbr:`SPI (Serial Peripheral Interface)`
* :abbr:`UART (Universal asynchronous receiver-transmitter)`
* :abbr:`USB (Universal Serial Bus)`
* :abbr:`WDT (Watchdog Timer)`
.. figure:: img/mdbt50q_db_33.jpg
:width: 442px
:align: center
:alt: MDBT50Q-DB-33
More information about the board can be found at the `MDBT50Q-DB-33 website`_.
The `MDBT50Q-DB-33 Specification`_ contains the demo board's datasheet.
The `MDBT50Q-DB-33 Schematic`_ contains the demo board's schematic.
Hardware
********
- Module Demo Board build by MDBT50Q-512K
- Nordic nRF52833 SoC Solution
- A recommnded 3rd-party module by Nordic Semiconductor.
- BT5.2&BT5.1&BT5 Bluetooth Specification Cerified
- Supports BT5 Long Range Features
- Cerifications: FCC, IC, CE, Telec(MIC), KC, SRRC, NCC, RCM, WPC
- 32-bit ARM Cortex M4F CPU
- 512kB Flash Memory/128kB RAM
- RoHs & Reach Compiant.
- 42 GPIO
- Chip Antenna
- Interfaces: SPI, UART, I2C, I2S, PWM, ADC, NFC, and USB
- Highly flexible multiprotocol SoC ideally suited for Bluetooth Low Energy, ANT+, Zigbee, Thread (802.15.4) ultra low-power wireless applications.
- 3 User LEDs
- 4 User buttons
- 1 Mini USB connector for power supply and USB communication
- SWD connector for FW programing
- J-Link interface for FW programing
- UART interface for UART communication
Supported Features
==================
The raytac_mdbt50q_db_33/nrf52833 board configuration supports the following
hardware features:
+-----------+------------+----------------------+
| Interface | Controller | Driver/Component |
+===========+============+======================+
| ADC | on-chip | adc |
+-----------+------------+----------------------+
| CLOCK | on-chip | clock_control |
+-----------+------------+----------------------+
| FLASH | on-chip | flash |
+-----------+------------+----------------------+
| GPIO | on-chip | gpio |
+-----------+------------+----------------------+
| I2C(M) | on-chip | i2c |
+-----------+------------+----------------------+
| MPU | on-chip | arch/arm |
+-----------+------------+----------------------+
| NVIC | on-chip | arch/arm |
+-----------+------------+----------------------+
| PWM | on-chip | pwm |
+-----------+------------+----------------------+
| RADIO | on-chip | Bluetooth, |
| | | ieee802154 |
+-----------+------------+----------------------+
| RTC | on-chip | system clock |
+-----------+------------+----------------------+
| RTT | Segger | console |
+-----------+------------+----------------------+
| SPI(M/S) | on-chip | spi |
+-----------+------------+----------------------+
| UART | on-chip | serial |
+-----------+------------+----------------------+
| USB | on-chip | usb |
+-----------+------------+----------------------+
| WDT | on-chip | watchdog |
+-----------+------------+----------------------+
Other hardware features have not been enabled yet for this board.
See `MDBT50Q-DB-33 website`_ and `MDBT50Q-DB-33 Specification`_
for a complete list of Raytac MDBT50Q-DB-33 board hardware features.
Connections and IOs
===================
LED
---
* LED1 (green) = P0.13
* LED2 (red) = P0.14
* LED3 (blue) = P0.15
Push buttons
------------
* BUTTON1 = SW1 = P0.11
* BUTTON2 = SW2 = P0.12
* BUTTON3 = SW3 = P0.24
* BUTTON4 = SW4 = P0.25
UART
----
* RXD = P0.08
* TXD = P0.06
* RTS = P0.05
* CTS = P0.07
Programming and Debugging
*************************
Applications for the ``raytac_mdbt50q_db_33/nrf52833`` board configuration can be
built, flashed, and debugged in the usual way. See :ref:`build_an_application` and
:ref:`application_run` for more details on building and running.
.. note::
Flashing and Debugging Zephyr onto the raytac_mdbt50q_db_33/nrf52833 board
requires an external J-Link programmer. The programmer is attached to the J1
or J9 SWD connector.
Flashing
========
Follow the instructions in the :ref:`nordic_segger` page to install
and configure all the necessary software. Further information can be
found in :ref:`nordic_segger_flashing`. Then build and flash
applications as usual (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Here is an example for the :ref:`hello_world` application.
Use a USB to TTL converter to connect the computer and raytac_mdbt50q_db_33/nrf52833
J10 connector. Then run your favorite terminal program to listen for output.
.. code-block:: console
$ minicom -D <tty_device> -b 115200
Replace :code:`<tty_device>` with the port where the USB to TTL converter
can be found. For example, under Linux, :code:`/dev/ttyUSB0`.
Then build and flash the application in the usual way.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: raytac_mdbt50q_db_33/nrf52833
:goals: build flash
Debugging
=========
The ``raytac_mdbt50q_db_33/nrf52833`` board does not have an on-board-J-Link debug IC,
however, instructions from the :ref:`nordic_segger` page also apply to this board.
Use the Debug out connector of nRF52x DK to connect to the J1 connector, and use SEGGER
J-Link OB IF to debug.
Testing the LEDs and buttons in the Raytac MDBT50Q-DB-33
********************************************************
There are 2 samples that allow you to test that the buttons (switches) and LEDs on
the board are working properly with Zephyr:
.. code-block:: console
samples/basic/blinky
samples/basic/button
You can build and flash the examples to make sure Zephyr is running correctly on
your board. The button and LED definitions can be found in
:zephyr_file:`boards/raytac/mdbt50q_db_33/raytac_mdbt50q_db_33_nrf52833.dts`.
Selecting the pins
==================
Pins can be configured in the board pinctrl file. To see the available mappings,
open the `MDBT50Q-DB-33 Specification`_, chapter 2.5 'Pin Assignment'.
Select the pins marked 'General-purpose I/O'. Note that pins marked as 'low-frequency I/O
only' can only be used in under-10KHz applications. They are not suitable for SPI, I2C,
UART, and PWM.
References
**********
.. target-notes::
.. _MDBT50Q-DB-33 website:
path_to_url
.. _MDBT50Q-DB-33 Specification:
path_to_url
.. _MDBT50Q-DB-33 Schematic:
path_to_url
.. _J-Link Software and documentation pack:
path_to_url
``` | /content/code_sandbox/boards/raytac/mdbt50q_db_33/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,940 |
```unknown
/*
*
*/
/dts-v1/;
#include <nordic/nrf52840_qiaa.dtsi>
#include "raytac_mdbt50q_db_40_nrf52840-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "Raytac MDBT50Q-DB-40_nRF52840";
compatible = "raytac,raytac-mdbt50q-db-40-nrf52840";
chosen {
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,uart-mcumgr = &uart0;
zephyr,bt-mon-uart = &uart0;
zephyr,bt-c2h-uart = &uart0;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,ieee802154 = &ieee802154;
};
leds {
compatible = "gpio-leds";
led0: led_0 {
gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
label = "Green LED 0";
};
led1: led_1 {
gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
label = "Red LED 1";
};
led2: led_2 {
gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
label = "Blue LED 2";
};
};
pwmleds {
compatible = "pwm-leds";
pwm_led0: pwm_led_0 {
pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_INVERTED>;
};
};
buttons {
compatible = "gpio-keys";
button0: button_0 {
gpios = <&gpio0 11 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "Push button switch 0";
zephyr,code = <INPUT_KEY_0>;
};
button1: button_1 {
gpios = <&gpio0 12 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "Push button switch 1";
zephyr,code = <INPUT_KEY_1>;
};
button2: button_2 {
gpios = <&gpio0 24 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "Push button switch 2";
zephyr,code = <INPUT_KEY_2>;
};
button3: button_3 {
gpios = <&gpio0 25 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "Push button switch 3";
zephyr,code = <INPUT_KEY_3>;
};
};
/* These aliases are provided for compatibility with samples */
aliases {
led0 = &led0;
led1 = &led1;
led2 = &led2;
pwm-led0 = &pwm_led0;
sw0 = &button0;
sw1 = &button1;
sw2 = &button2;
sw3 = &button3;
bootloader-led0 = &led0;
mcuboot-button0 = &button0;
mcuboot-led0 = &led0;
watchdog0 = &wdt0;
};
};
®0 {
status = "okay";
};
®1 {
regulator-initial-mode = <NRF5X_REG_MODE_DCDC>;
};
&adc {
status = "okay";
};
&uicr {
gpio-as-nreset;
};
&gpiote {
status = "okay";
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&uart0 {
compatible = "nordic,nrf-uarte";
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart0_default>;
pinctrl-1 = <&uart0_sleep>;
pinctrl-names = "default", "sleep";
};
&uart1 {
compatible = "nordic,nrf-uarte";
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart1_default>;
pinctrl-1 = <&uart1_sleep>;
pinctrl-names = "default", "sleep";
};
&i2c0 {
compatible = "nordic,nrf-twi";
status = "okay";
pinctrl-0 = <&i2c0_default>;
pinctrl-1 = <&i2c0_sleep>;
pinctrl-names = "default", "sleep";
};
&i2c1 {
compatible = "nordic,nrf-twi";
/* Cannot be used together with spi1. */
/* status = "okay"; */
pinctrl-0 = <&i2c1_default>;
pinctrl-1 = <&i2c1_sleep>;
pinctrl-names = "default", "sleep";
};
&pwm0 {
status = "okay";
pinctrl-0 = <&pwm0_default>;
pinctrl-1 = <&pwm0_sleep>;
pinctrl-names = "default", "sleep";
};
&spi0 {
compatible = "nordic,nrf-spi";
/* Cannot be used together with i2c0. */
/* status = "okay"; */
pinctrl-0 = <&spi0_default>;
pinctrl-1 = <&spi0_sleep>;
pinctrl-names = "default", "sleep";
};
&spi1 {
compatible = "nordic,nrf-spi";
status = "okay";
pinctrl-0 = <&spi1_default>;
pinctrl-1 = <&spi1_sleep>;
pinctrl-names = "default", "sleep";
};
&spi2 {
compatible = "nordic,nrf-spi";
status = "disabled";
pinctrl-0 = <&spi2_default>;
pinctrl-1 = <&spi2_sleep>;
pinctrl-names = "default", "sleep";
};
&qspi {
status = "okay";
pinctrl-0 = <&qspi_default>;
pinctrl-1 = <&qspi_sleep>;
pinctrl-names = "default", "sleep";
};
&ieee802154 {
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 0x0000C000>;
};
slot0_partition: partition@c000 {
label = "image-0";
reg = <0x0000C000 0x00076000>;
};
slot1_partition: partition@82000 {
label = "image-1";
reg = <0x00082000 0x00076000>;
};
/*
* The flash starting at 0x000f8000 and ending at
* 0x000fffff is reserved for use by the application.
*/
/*
* Storage partition will be used by FCB/LittleFS/NVS
* if enabled.
*/
storage_partition: partition@f8000 {
label = "storage";
reg = <0x000f8000 0x00008000>;
};
};
};
zephyr_udc0: &usbd {
compatible = "nordic,nrf-usbd";
status = "okay";
};
``` | /content/code_sandbox/boards/raytac/mdbt50q_db_40/raytac_mdbt50q_db_40_nrf52840.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,688 |
```cmake
# Suppress "unique_unit_address_if_enabled" to handle the following overlaps:
# - power@40000000 & clock@40000000 & bprot@40000000
# - acl@4001e000 & flash-controller@4001e000
list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled")
``` | /content/code_sandbox/boards/raytac/mdbt50q_db_40/pre_dt_board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 72 |
```unknown
# Raytac MDBT50Q-DB-40 nRF52840 board configuration
config BOARD_RAYTAC_MDBT50Q_DB_40
select SOC_NRF52840_QIAA
``` | /content/code_sandbox/boards/raytac/mdbt50q_db_40/Kconfig.raytac_mdbt50q_db_40 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 45 |
```yaml
board:
name: raytac_mdbt50q_db_40
vendor: raytac
socs:
- name: nrf52840
``` | /content/code_sandbox/boards/raytac/mdbt50q_db_40/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 38 |
```yaml
# Raytac MDBT50Q_DB_40_NRF52840 board configuration
identifier: raytac_mdbt50q_db_40/nrf52840
name: Raytac MDBT50Q_DB_40_NRF52840
type: mcu
arch: arm
ram: 256
flash: 1024
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- adc
- ble
- counter
- gpio
- i2c
- i2s
- ieee802154
- pwm
- spi
- usb_device
- watchdog
- netif:openthread
``` | /content/code_sandbox/boards/raytac/mdbt50q_db_40/raytac_mdbt50q_db_40_nrf52840.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 157 |
```unknown
# Raytac MDBT50Q-DB-40 NRF52840 board configuration
if BOARD_RAYTAC_MDBT50Q_DB_40
config BT_CTLR
default BT
endif # BOARD_RAYTAC_MDBT50Q_DB_40
``` | /content/code_sandbox/boards/raytac/mdbt50q_db_40/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 58 |
```unknown
# Raytac MDBT50Q_DB_40 NRF52840 board configuration
# Enable MPU
CONFIG_ARM_MPU=y
# Enable hardware stack protection
CONFIG_HW_STACK_PROTECTION=y
# Enable RTT
CONFIG_USE_SEGGER_RTT=y
# enable GPIO
CONFIG_GPIO=y
# enable uart driver
CONFIG_SERIAL=y
# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
``` | /content/code_sandbox/boards/raytac/mdbt50q_db_40/raytac_mdbt50q_db_40_nrf52840_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 84 |
```unknown
/*
*/
&pinctrl {
uart0_default: uart0_default {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 6)>,
<NRF_PSEL(UART_RTS, 0, 5)>;
};
group2 {
psels = <NRF_PSEL(UART_RX, 0, 8)>,
<NRF_PSEL(UART_CTS, 0, 7)>;
bias-pull-up;
};
};
uart0_sleep: uart0_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 6)>,
<NRF_PSEL(UART_RX, 0, 8)>,
<NRF_PSEL(UART_RTS, 0, 5)>,
<NRF_PSEL(UART_CTS, 0, 7)>;
low-power-enable;
};
};
uart1_default: uart1_default {
group1 {
psels = <NRF_PSEL(UART_RX, 1, 1)>;
bias-pull-up;
};
group2 {
psels = <NRF_PSEL(UART_TX, 1, 2)>;
};
};
uart1_sleep: uart1_sleep {
group1 {
psels = <NRF_PSEL(UART_RX, 1, 1)>,
<NRF_PSEL(UART_TX, 1, 2)>;
low-power-enable;
};
};
i2c0_default: i2c0_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
<NRF_PSEL(TWIM_SCL, 0, 27)>;
};
};
i2c0_sleep: i2c0_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
<NRF_PSEL(TWIM_SCL, 0, 27)>;
low-power-enable;
};
};
i2c1_default: i2c1_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 30)>,
<NRF_PSEL(TWIM_SCL, 0, 31)>;
};
};
i2c1_sleep: i2c1_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 30)>,
<NRF_PSEL(TWIM_SCL, 0, 31)>;
low-power-enable;
};
};
pwm0_default: pwm0_default {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 0, 13)>,
<NRF_PSEL(PWM_OUT1, 0, 14)>,
<NRF_PSEL(PWM_OUT2, 0, 15)>;
nordic,invert;
};
};
pwm0_sleep: pwm0_sleep {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 0, 13)>,
<NRF_PSEL(PWM_OUT1, 0, 14)>,
<NRF_PSEL(PWM_OUT2, 0, 15)>;
low-power-enable;
};
};
spi0_default: spi0_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 27)>,
<NRF_PSEL(SPIM_MOSI, 0, 26)>,
<NRF_PSEL(SPIM_MISO, 0, 29)>;
};
};
spi0_sleep: spi0_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 27)>,
<NRF_PSEL(SPIM_MOSI, 0, 26)>,
<NRF_PSEL(SPIM_MISO, 0, 29)>;
low-power-enable;
};
};
spi1_default: spi1_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 31)>,
<NRF_PSEL(SPIM_MOSI, 0, 30)>,
<NRF_PSEL(SPIM_MISO, 1, 8)>;
};
};
spi1_sleep: spi1_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 31)>,
<NRF_PSEL(SPIM_MOSI, 0, 30)>,
<NRF_PSEL(SPIM_MISO, 1, 8)>;
low-power-enable;
};
};
spi2_default: spi2_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 19)>,
<NRF_PSEL(SPIM_MOSI, 0, 20)>,
<NRF_PSEL(SPIM_MISO, 0, 21)>;
};
};
spi2_sleep: spi2_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 19)>,
<NRF_PSEL(SPIM_MOSI, 0, 20)>,
<NRF_PSEL(SPIM_MISO, 0, 21)>;
low-power-enable;
};
};
qspi_default: qspi_default {
group1 {
psels = <NRF_PSEL(QSPI_SCK, 0, 19)>,
<NRF_PSEL(QSPI_IO0, 0, 20)>,
<NRF_PSEL(QSPI_IO1, 0, 21)>,
<NRF_PSEL(QSPI_IO2, 0, 22)>,
<NRF_PSEL(QSPI_IO3, 0, 23)>,
<NRF_PSEL(QSPI_CSN, 0, 17)>;
};
};
qspi_sleep: qspi_sleep {
group1 {
psels = <NRF_PSEL(QSPI_SCK, 0, 19)>,
<NRF_PSEL(QSPI_IO0, 0, 20)>,
<NRF_PSEL(QSPI_IO1, 0, 21)>,
<NRF_PSEL(QSPI_IO2, 0, 22)>,
<NRF_PSEL(QSPI_IO3, 0, 23)>;
low-power-enable;
};
group2 {
psels = <NRF_PSEL(QSPI_CSN, 0, 17)>;
low-power-enable;
bias-pull-up;
};
};
};
``` | /content/code_sandbox/boards/raytac/mdbt50q_db_40/raytac_mdbt50q_db_40_nrf52840-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,524 |
```unknown
/*
*
*/
&pinctrl {
uart0_default: uart0_default {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 31)>,
<NRF_PSEL(UART_RTS, 1, 13)>,
<NRF_PSEL(UART_RX, 1, 11)>,
<NRF_PSEL(UART_CTS, 1, 12)>;
};
};
uart0_sleep: uart0_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 31)>,
<NRF_PSEL(UART_RX, 1, 13)>,
<NRF_PSEL(UART_RTS, 1, 11)>,
<NRF_PSEL(UART_CTS, 1, 12)>;
low-power-enable;
};
};
};
``` | /content/code_sandbox/boards/raytac/mdbt53v_db_40/raytac_mdbt53v_db_40_nrf5340_cpunet-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 197 |
```unknown
/*
*
*/
/dts-v1/;
#include <nordic/nrf5340_cpunet_qkaa.dtsi>
#include "raytac_mdbt53v_db_40_nrf5340_cpunet-pinctrl.dtsi"
#include "raytac_mdbt53v_db_40_nrf5340_cpunet_common.dts"
/ {
model = "Raytac MDBT53V-DB-40 NRF5340 Network";
compatible = "raytac,raytac-mdbt53v-db-40-nrf5340-cpunet";
chosen {
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,uart-mcumgr = &uart0;
zephyr,bt-mon-uart = &uart0;
zephyr,bt-c2h-uart = &uart0;
zephyr,sram = &sram1;
zephyr,flash = &flash1;
zephyr,code-partition = &slot0_partition;
zephyr,bt-hci-ipc = &ipc0;
};
/* These aliases are provided for compatibility with samples */
aliases {
watchdog0 = &wdt0;
};
};
&uart0 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart0_default>;
pinctrl-1 = <&uart0_sleep>;
pinctrl-names = "default", "sleep";
};
``` | /content/code_sandbox/boards/raytac/mdbt53v_db_40/raytac_mdbt53v_db_40_nrf5340_cpunet.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 332 |
```cmake
if(CONFIG_BOARD_RAYTAC_MDBT53V_DB_40_NRF5340_CPUAPP OR CONFIG_BOARD_RAYTAC_MDBT53V_DB_40_NRF5340_CPUAPP_NS)
board_runner_args(jlink "--device=nrf5340_xxaa_app" "--speed=4000")
elseif(BOARD_RAYTAC_MDBT53V_DB_40_NRF5340_CPUNET)
board_runner_args(jlink "--device=nrf5340_xxaa_net" "--speed=4000")
endif()
include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
include(${ZEPHYR_BASE}/boards/common/nrfutil.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/raytac/mdbt53v_db_40/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 165 |
```unknown
/*
*
*/
/dts-v1/;
#include <nordic/nrf5340_cpuappns_qkaa.dtsi>
#include "raytac_mdbt53v_db_40_nrf5340_cpuapp_common.dts"
/ {
model = "Raytac MDBT53V-DB-40 NRF5340 Application";
compatible = "raytac,raytac-mdbt53v-db-40-nrf5340-cpuapp";
chosen {
zephyr,sram = &sram0_ns;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_ns_partition;
};
};
``` | /content/code_sandbox/boards/raytac/mdbt53v_db_40/raytac_mdbt53v_db_40_nrf5340_cpuapp_ns.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 144 |
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