text stringlengths 9 39.2M | dir stringlengths 25 226 | lang stringclasses 163 values | created_date timestamp[s] | updated_date timestamp[s] | repo_name stringclasses 751 values | repo_full_name stringclasses 752 values | star int64 1.01k 183k | len_tokens int64 1 18.5M |
|---|---|---|---|---|---|---|---|---|
```yaml
#
#
#
identifier: mimxrt1060_evk@hyperflash
name: NXP MIMXRT1060-EVK-HYPERFLASH
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 32768
flash: 65536
supported:
- arduino_gpio
- arduino_i2c
- arduino_serial
- arduino_spi
- counter
- display
- dma
- gpio
- i2c
- netif:eth
- pwm
- sdhc
- spi
- usb_device
- usbd
- watchdog
vendor: nxp
``` | /content/code_sandbox/boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_hyperflash.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 165 |
```cmake
if (NOT DEFINED BOARD_REVISION)
set(BOARD_REVISION "qspi")
else ()
if (NOT (BOARD_REVISION STREQUAL "hyperflash") AND NOT (BOARD_REVISION STREQUAL "qspi"))
message(FATAL_ERROR "Invalid board revision, ${BOARD_REVISION}, valid revisions are: hyperflash, qspi")
elseif (BOARD_REVISION STREQUAL "hyperflash" AND CONFIG_BOARD_MIMXRT1060_EVKB)
message(FATAL_ERROR "hyperflash not supported on RT1060 EVKB")
endif()
endif()
``` | /content/code_sandbox/boards/nxp/mimxrt1060_evk/revision.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 122 |
```cmake
#
#
#
board_runner_args(pyocd "--target=mimxrt1060")
board_runner_args(jlink "--device=MIMXRT1062xxx6A")
board_runner_args(linkserver "--device=MIMXRT1062xxxxA:EVK-MIMXRT1060")
if (("${BOARD_REVISION}" STREQUAL "qspi") OR CONFIG_BOARD_MIMXRT1060_EVKB)
board_runner_args(jlink "--loader=BankAddr=0x60000000&Loader=QSPI")
elseif ("${BOARD_REVISION}" STREQUAL "hyperflash")
board_runner_args(jlink "--loader=BankAddr=0x60000000&Loader=HyperFlash")
endif()
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/linkserver.board.cmake)
``` | /content/code_sandbox/boards/nxp/mimxrt1060_evk/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 199 |
```unknown
/*
*
*/
#include "mimxrt1060_evk.dts"
#include "mimxrt1060_evk_mimxrt1062_qspi.overlay"
/* FLEXPWM not routed to LED on this EVK */
&flexpwm2_pwm3 {
status = "disabled";
};
&green_led {
gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
label = "User LED1";
};
``` | /content/code_sandbox/boards/nxp/mimxrt1060_evk/mimxrt1060_evkb.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 90 |
```restructuredtext
.. _frdm_rw612:
NXP FRDM_RW612
##############
Overview
********
The RW612 is a highly integrated, low-power tri-radio wireless MCU with an
integrated 260 MHz ARM Cortex-M33 MCU and Wi-Fi 6 + Bluetooth Low Energy (LE) 5.3 / 802.15.4
radios designed for a broad array of applications, including connected smart home devices,
gaming controllers, enterprise and industrial automation, smart accessories and smart energy.
The RW612 MCU subsystem includes 1.2 MB of on-chip SRAM and a high-bandwidth Quad SPI interface
with an on-the-fly decryption engine for securely accessing off-chip XIP flash.
The advanced design of the RW612 delivers tight integration, low power and highly secure
operation in a space- and cost-efficient wireless MCU requiring only a single 3.3V power supply.
Hardware
********
- 260 MHz ARM Cortex-M33, tri-radio cores for Wifi 6 + BLE 5.3 + 802.15.4
- 1.2 MB on-chip SRAM
Supported Features
==================
+-----------+------------+-----------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+===================================+
| NVIC | on-chip | nested vector interrupt controller|
+-----------+------------+-----------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+-----------------------------------+
| MCI_IOMUX | on-chip | pinmux |
+-----------+------------+-----------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-----------------------------------+
| USART | on-chip | serial |
+-----------+------------+-----------------------------------+
| BLE | on-chip | Bluetooth |
+-----------+------------+-----------------------------------+
| DMA | on-chip | dma |
+-----------+------------+-----------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-----------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-----------------------------------+
| TRNG | on-chip | entropy |
+-----------+------------+-----------------------------------+
| WWDT | on-chip | watchdog |
+-----------+------------+-----------------------------------+
| USBOTG | on-chip | usb |
+-----------+------------+-----------------------------------+
| CTIMER | on-chip | counter |
+-----------+------------+-----------------------------------+
| MRT | on-chip | counter |
+-----------+------------+-----------------------------------+
| OS_TIMER | on-chip | os timer |
+-----------+------------+-----------------------------------+
The default configuration can be found in the defconfig file:
:zephyr_file:`boards/nxp/frdm_rw612/frdm_rw612_defconfig`
Other hardware features are not currently supported
Fetch Binary Blobs
******************
To support Bluetooth, frdm_rw612 requires fetching binary blobs, which can be
achieved by running the following command:
.. code-block:: console
west blobs fetch hal_nxp
Programming and Debugging
*************************
Build and flash applications as usual (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Configuring a Debug Probe
=========================
A debug probe is used for both flashing and debugging the board. This board is
configured by default to use the JLink Firmware.
Configuring a Console
=====================
Connect a USB cable from your PC to J10, and use the serial terminal of your choice
(minicom, putty, etc.) with the following settings:
- Speed: 115200
- Data: 8 bits
- Parity: None
- Stop bits: 1
Flashing
========
Here is an example for the :ref:`hello_world` application. This example uses the
:ref:`jlink-debug-host-tools` as default.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: frdm_rw612
:goals: flash
Open a serial terminal, reset the board (press the RESET button), and you should
see the following message in the terminal:
.. code-block:: console
***** Booting Zephyr OS v3.6.0 *****
Hello World! frdm_rw612
Debugging
=========
Here is an example for the :ref:`hello_world` application. This example uses the
:ref:`jlink-debug-host-tools` as default.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: frdm_rw612
:goals: debug
Open a serial terminal, step through the application in your debugger, and you
should see the following message in the terminal:
.. code-block:: console
***** Booting Zephyr OS zephyr-v3.6.0 *****
Hello World! frdm_rw612
Bluetooth
=========
BLE functionality requires to fetch binary blobs, so make sure to follow
the ``Fetch Binary Blobs`` section first.
Those binary blobs can be used in two different ways, depending if :kconfig:option:`CONFIG_NXP_MONOLITHIC_BT`
is enabled or not:
- :kconfig:option:`CONFIG_NXP_MONOLITHIC_BT` is enabled (default):
The required binary blob will be linked with the application image directly, forming
one single monolithic image.
The user has nothing else to do other than flashing the application to the board.
- :kconfig:option:`CONFIG_NXP_MONOLITHIC_BT` is disabled:
In this case, the BLE blob won't be linked with the application, so the user needs to manually
flash the BLE binary blob to the board at the address ``0x18540000``.
The binary blob will be located here: ``<zephyr workspace>/modules/hal/nxp/zephyr/blobs/rw61x/rw61x_sb_ble_a2.bin``
Resources
=========
.. _RW612 Website:
path_to_url
``` | /content/code_sandbox/boards/nxp/frdm_rw612/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,300 |
```yaml
#
#
#
identifier: mimxrt1060_evkb
name: NXP MIMXRT1060-EVKB
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 32768
flash: 8192
supported:
- arduino_gpio
- arduino_i2c
- arduino_serial
- arduino_spi
- counter
- display
- gpio
- i2c
- netif:eth
- sdhc
- spi
- usb_device
- dma
- can
- watchdog
- adc
vendor: nxp
``` | /content/code_sandbox/boards/nxp/mimxrt1060_evk/mimxrt1060_evkb.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 158 |
```unknown
config BOARD_MIMXRT1060_EVK
select SOC_PART_NUMBER_MIMXRT1062DVL6A
``` | /content/code_sandbox/boards/nxp/mimxrt1060_evk/Kconfig.mimxrt1060_evk | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 28 |
```unknown
#
#
#
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_GPIO=y
CONFIG_ARM_MPU=y
CONFIG_HW_STACK_PROTECTION=y
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/nxp/mimxrt1060_evk/mimxrt1060_evkb_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 39 |
```yaml
boards:
- name: mimxrt1060_evk
vendor: nxp
socs:
- name: mimxrt1062
revision:
format: "custom"
- name: mimxrt1060_evkb
vendor: nxp
socs:
- name: mimxrt1062
``` | /content/code_sandbox/boards/nxp/mimxrt1060_evk/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 76 |
```unknown
config BOARD_MIMXRT1060_EVKB
select SOC_PART_NUMBER_MIMXRT1062DVL6A
``` | /content/code_sandbox/boards/nxp/mimxrt1060_evk/Kconfig.mimxrt1060_evkb | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 28 |
```unknown
# MIMXRT1060-EVK board
if BOARD_MIMXRT1060_EVK || BOARD_MIMXRT1060_EVKB
config DEVICE_CONFIGURATION_DATA
default y
config NXP_IMX_EXTERNAL_SDRAM
default y
if NETWORKING
config NET_L2_ETHERNET
default y
if ETH_MCUX
config ETH_MCUX_PHY_RESET
default y
endif # ETH_MCUX
endif # NETWORKING
endif # BOARD_MIMXRT1060_EVK || BOARD_MIMXRT1060_EVKB
``` | /content/code_sandbox/boards/nxp/mimxrt1060_evk/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 116 |
```yaml
#
#
#
identifier: mimxrt1060_evk
name: NXP MIMXRT1060-EVK
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 32768
flash: 8192
supported:
- arduino_gpio
- arduino_i2c
- arduino_serial
- arduino_spi
- adc
- can
- counter
- display
- dma
- gpio
- i2c
- netif:eth
- pwm
- sdhc
- spi
- usb_device
- usbd
- watchdog
vendor: nxp
``` | /content/code_sandbox/boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_qspi.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 166 |
```unknown
/*
*
*/
/ {
chosen {
zephyr,flash-controller = &is25wp064;
zephyr,flash = &is25wp064;
zephyr,code-partition = &slot0_partition;
};
};
&flexspi {
status = "okay";
pinctrl-0 = <&pinmux_flexspi1>;
pinctrl-names = "default";
ahb-prefetch;
ahb-read-addr-opt;
rx-clock-source = <1>;
reg = <0x402a8000 0x4000>, <0x60000000 DT_SIZE_M(8)>;
is25wp064: is25wp064@0 {
compatible = "nxp,imx-flexspi-nor";
size = <67108864>;
reg = <0>;
spi-max-frequency = <133000000>;
status = "okay";
jedec-id = [9d 70 17];
erase-block-size = <4096>;
write-block-size = <1>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 DT_SIZE_K(128)>;
};
/* The MCUBoot swap-move algorithm uses the last 2 sectors
* of the primary slot0 for swap status and move.
*/
slot0_partition: partition@20000 {
label = "image-0";
reg = <0x00020000 (DT_SIZE_M(3) + DT_SIZE_K(8))>;
};
slot1_partition: partition@322000 {
label = "image-1";
reg = <0x00322000 DT_SIZE_M(3)>;
};
storage_partition: partition@622000 {
label = "storage";
reg = <0x00622000 (DT_SIZE_M(2) - DT_SIZE_K(136))>;
};
};
};
};
``` | /content/code_sandbox/boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_qspi.overlay | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 457 |
```unknown
/*
*
*/
/dts-v1/;
#include <nxp/nxp_rt1060.dtsi>
#include "mimxrt1060_evk-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "NXP MIMXRT1060-EVK board";
compatible = "nxp,mimxrt1062";
aliases {
led0 = &green_led;
pwm-led0 = &green_pwm_led;
sw0 = &user_button;
watchdog0 = &wdog0;
sdhc0 = &usdhc1;
};
chosen {
zephyr,sram = &sdram0;
zephyr,itcm = &itcm;
zephyr,dtcm = &dtcm;
zephyr,console = &lpuart1;
zephyr,shell-uart = &lpuart1;
zephyr,canbus = &flexcan3;
};
sdram0: memory@80000000 {
/* Micron MT48LC16M16A2B4-6AIT:G */
device_type = "memory";
reg = <0x80000000 DT_SIZE_M(32)>;
};
/*
* This node describes the GPIO pins of the parallel FPC interface,
* This interface is standard to several NXP EVKs, and is used with
* several parallel LCD displays (available as zephyr shields)
*/
nxp_parallel_lcd_connector: parallel-connector {
compatible = "nxp,parallel-lcd-connector";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpio2 31 0>; /* Pin 1, BL+ */
};
/*
* This node describes the GPIO pins of the I2C display FPC interface,
* This interface is standard to several NXP EVKs, and is used with
* several parallel LCD displays (available as zephyr shields)
*/
nxp_i2c_touch_fpc: i2c-touch-connector {
compatible = "nxp,i2c-tsc-fpc";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <1 0 &gpio1 2 0>, /* Pin 2, LCD touch RST */
<2 0 &gpio1 11 0>; /* Pin 3, LCD touch INT */
};
leds {
compatible = "gpio-leds";
green_led: led-1 {
gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
label = "User LED1";
};
};
pwmleds {
compatible = "pwm-leds";
green_pwm_led: green_pwm_led {
pwms = <&flexpwm2_pwm3 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button-1 {
label = "User SW8";
gpios = <&gpio5 0 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
zephyr,code = <INPUT_KEY_0>;
};
};
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpio1 26 0>, /* A0 */
<1 0 &gpio1 27 0>, /* A1 */
<2 0 &gpio1 20 0>, /* A2 */
<3 0 &gpio1 21 0>, /* A3 */
<4 0 &gpio1 17 0>, /* A4 */
<5 0 &gpio1 16 0>, /* A5 */
<6 0 &gpio1 23 0>, /* D0 */
<7 0 &gpio1 22 0>, /* D1 */
<8 0 &gpio1 11 0>, /* D2 */
<9 0 &gpio1 24 0>, /* D3 */
<10 0 &gpio1 9 0>, /* D4 */
<11 0 &gpio1 10 0>, /* D5 */
<12 0 &gpio1 18 0>, /* D6 */
<13 0 &gpio1 19 0>, /* D7 */
<14 0 &gpio1 3 0>, /* D8 */
<15 0 &gpio1 2 0>, /* D9 */
<16 0 &gpio3 13 0>, /* D10 */
<17 0 &gpio3 14 0>, /* D11 */
<18 0 &gpio3 15 0>, /* D12 */
<19 0 &gpio3 12 0>, /* D13 */
<20 0 &gpio1 17 0>, /* D14 */
<21 0 &gpio1 16 0>; /* D15 */
};
};
arduino_serial: &lpuart3 {
pinctrl-0 = <&pinmux_lpuart3>;
pinctrl-1 = <&pinmux_lpuart3_flow_control>;
pinctrl-2 = <&pinmux_lpuart3_sleep>;
pinctrl-names = "default", "flowcontrol", "sleep";
};
zephyr_lcdif: &lcdif {
pinctrl-0 = <&pinmux_lcdif>;
pinctrl-names = "default";
};
nxp_touch_i2c: &lpi2c1 {};
arduino_i2c: &lpi2c1 {
status = "okay";
pinctrl-0 = <&pinmux_lpi2c1>;
pinctrl-names = "default";
};
&lpuart1 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&pinmux_lpuart1>;
pinctrl-1 = <&pinmux_lpuart1_sleep>;
pinctrl-names = "default", "sleep";
};
&enet_mac {
status = "okay";
pinctrl-0 = <&pinmux_enet>;
pinctrl-names = "default";
phy-handle = <&phy>;
zephyr,random-mac-address;
phy-connection-type = "rmii";
};
&enet_mdio {
status = "okay";
pinctrl-0 = <&pinmux_enet_mdio>;
pinctrl-names = "default";
phy: phy@0 {
compatible = "microchip,ksz8081";
reg = <0>;
status = "okay";
reset-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
int-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
microchip,interface-type = "rmii";
};
};
&enet_ptp_clock {
status = "okay";
pinctrl-0 = <&pinmux_ptp>;
pinctrl-names = "default";
};
&adc1 {
status = "okay";
pinctrl-0 = <&pinmux_adc1>;
pinctrl-names = "default";
};
zephyr_udc0: &usb1 {
status = "okay";
phy_handle = <&usbphy1>;
};
&usbphy1 {
status = "okay";
tx-d-cal = <12>;
tx-cal-45-dp-ohms = <6>;
tx-cal-45-dm-ohms = <6>;
};
&csi {
pinctrl-0 = <&pinmux_csi>;
pinctrl-names = "default";
};
&flexpwm2_pwm3 {
status = "okay";
pinctrl-0 = <&pinmux_flexpwm2_3>;
pinctrl-names = "default";
};
&flexpwm1_pwm0 {
pinctrl-0 = <&pinmux_flexpwm1_0>;
pinctrl-names = "default";
};
&flexpwm1_pwm3 {
pinctrl-0 = <&pinmux_flexpwm1>;
pinctrl-names = "default";
};
&usdhc1 {
status = "okay";
power-delay-ms = <1000>;
pwr-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
cd-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
status = "okay";
pinctrl-0 = <&pinmux_usdhc1>;
pinctrl-1 = <&pinmux_usdhc1_slow>;
pinctrl-2 = <&pinmux_usdhc1_med>;
pinctrl-3 = <&pinmux_usdhc1_fast>;
pinctrl-names = "default", "slow", "med", "fast";
sdmmc {
compatible = "zephyr,sdmmc-disk";
status = "okay";
};
};
&edma0 {
status = "okay";
};
&flexcan3 {
status = "okay";
pinctrl-0 = <&pinmux_flexcan3>;
pinctrl-names = "default";
can-transceiver {
max-bitrate = <5000000>;
};
};
&wdog0 {
status = "okay";
};
arduino_spi: &lpspi1 {
status = "okay";
/* DMA channels 0 and 1, muxed to LPSPI1 RX and TX */
dmas = <&edma0 0 13>, <&edma0 1 14>;
dma-names = "rx", "tx";
pinctrl-0 = <&pinmux_lpspi1>;
pinctrl-names = "default";
};
&lpspi3 {
status = "okay";
/* DMA channels 2 and 3, muxed to LPSPI3 RX and TX */
dmas = <&edma0 2 15>, <&edma0 3 16>;
dma-names = "rx", "tx";
pinctrl-0 = <&pinmux_lpspi3>;
pinctrl-names = "default";
};
&sai1 {
status = "okay";
pinctrl-0 = <&pinmux_sai1>;
pinctrl-names = "default";
};
/* GPT and Systick are enabled. If power management is enabled, the GPT
* timer will be used instead of systick, as allows the core clock to
* be gated.
*/
&gpt_hw_timer {
status = "okay";
};
&systick {
status = "okay";
};
&iomuxcgpr {
status = "okay";
};
&itm {
pinctrl-0 = <&pinmux_swo>;
pinctrl-names = "default";
};
&pxp {
status = "okay";
};
&pit0 {
status = "okay";
};
dvp_fpc24_i2c: &lpi2c1 {};
dvp_fpc24_interface: &csi {};
``` | /content/code_sandbox/boards/nxp/mimxrt1060_evk/mimxrt1060_evk.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,479 |
```unknown
/*
*
*/
/ {
chosen {
zephyr,flash-controller = &s26ks512s0;
zephyr,flash = &s26ks512s0;
zephyr,code-partition = &slot0_partition;
};
};
&flexspi {
status = "okay";
ahb-prefetch;
ahb-read-addr-opt;
ahb-bufferable;
ahb-cacheable;
sck-differential-clock;
combination-mode;
rx-clock-source = <3>;
reg = <0x402a8000 0x4000>, <0x60000000 DT_SIZE_M(64)>;
s26ks512s0: s26ks512s@0 {
compatible = "nxp,imx-flexspi-hyperflash";
size = <DT_SIZE_M(64*8)>;
reg = <0>;
spi-max-frequency = <166000000>;
word-addressable;
cs-interval-unit = <1>;
cs-interval = <2>;
cs-hold-time = <0>;
cs-setup-time = <3>;
data-valid-time = <1>;
column-space = <3>;
ahb-write-wait-unit = <2>;
ahb-write-wait-interval = <20>;
status = "okay";
erase-block-size = <4096>;
write-block-size = <16>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 DT_SIZE_K(128)>;
};
/* The MCUBoot swap-move algorithm uses the last 14 sectors
* of the primary slot0 for swap status and move.
*/
slot0_partition: partition@20000 {
label = "image-0";
reg = <0x00020000 (DT_SIZE_M(3) + DT_SIZE_K(56))>;
};
slot1_partition: partition@32E000 {
label = "image-1";
reg = <0x0032E000 DT_SIZE_M(3)>;
};
storage_partition: partition@62E000 {
label = "storage";
reg = <0x0062E000 (DT_SIZE_M(58) - DT_SIZE_K(184))>;
};
};
};
};
``` | /content/code_sandbox/boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_hyperflash.overlay | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 538 |
```unknown
/*
*
* Note: File generated by gen_board_pinctrl.py
* from mimxrt1060_evk.mex
*/
#include <nxp/nxp_imx/rt/mimxrt1062dvl6a-pinctrl.dtsi>
&pinctrl {
/* ADC1 inputs 0 and 15 */
pinmux_adc1: pinmux_adc1 {
group0 {
pinmux = <&iomuxc_gpio_ad_b1_11_adc1_in0>,
<&iomuxc_gpio_ad_b1_10_adc1_in15>;
bias-disable;
drive-strength = "r0-6";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
};
/* conflicts with lpuart3 */
pinmux_csi: pinmux_csi {
group0 {
pinmux = <&iomuxc_gpio_ad_b0_04_gpio1_io04>;
drive-strength = "r0-6";
bias-pull-down;
bias-pull-down-value = "100k";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
group1 {
pinmux = <&iomuxc_gpio_ad_b1_04_csi_pixclk>,
<&iomuxc_gpio_ad_b1_05_csi_mclk>,
<&iomuxc_gpio_ad_b1_06_csi_vsync>,
<&iomuxc_gpio_ad_b1_07_csi_hsync>,
<&iomuxc_gpio_ad_b1_08_csi_data09>,
<&iomuxc_gpio_ad_b1_09_csi_data08>,
<&iomuxc_gpio_ad_b1_10_csi_data07>,
<&iomuxc_gpio_ad_b1_11_csi_data06>,
<&iomuxc_gpio_ad_b1_12_csi_data05>,
<&iomuxc_gpio_ad_b1_13_csi_data04>,
<&iomuxc_gpio_ad_b1_14_csi_data03>,
<&iomuxc_gpio_ad_b1_15_csi_data02>;
drive-strength = "r0-6";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
};
pinmux_enet: pinmux_enet {
group0 {
pinmux = <&iomuxc_gpio_b1_10_enet_ref_clk>;
bias-disable;
drive-strength = "r0-6";
slew-rate = "fast";
nxp,speed = "50-mhz";
input-enable;
};
group1 {
pinmux = <&iomuxc_gpio_b1_04_enet_rx_data0>,
<&iomuxc_gpio_b1_05_enet_rx_data1>,
<&iomuxc_gpio_b1_06_enet_rx_en>,
<&iomuxc_gpio_b1_07_enet_tx_data0>,
<&iomuxc_gpio_b1_08_enet_tx_data1>,
<&iomuxc_gpio_b1_09_enet_tx_en>,
<&iomuxc_gpio_b1_11_enet_rx_er>;
drive-strength = "r0-5";
bias-pull-up;
bias-pull-up-value = "100k";
slew-rate = "fast";
nxp,speed = "200-mhz";
};
};
pinmux_enet_mdio: pinmux_enet_mdio {
group0 {
pinmux = <&iomuxc_gpio_emc_40_enet_mdc>,
<&iomuxc_gpio_emc_41_enet_mdio>,
<&iomuxc_gpio_ad_b0_10_gpio1_io10>,
<&iomuxc_gpio_ad_b0_09_gpio1_io09>;
drive-strength = "r0-5";
bias-pull-up;
bias-pull-up-value = "100k";
slew-rate = "fast";
nxp,speed = "200-mhz";
};
};
pinmux_ptp: pinmux_ptp {
group0 {
pinmux = <&iomuxc_gpio_ad_b1_02_enet_1588_event2_out>,
<&iomuxc_gpio_ad_b1_03_enet_1588_event2_in>;
drive-strength = "r0-6";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
};
pinmux_flexcan3: pinmux_flexcan3 {
group0 {
pinmux = <&iomuxc_gpio_ad_b0_14_flexcan3_tx>,
<&iomuxc_gpio_ad_b0_15_flexcan3_rx>;
drive-strength = "r0-6";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
};
/* flexpwm output for board LED */
pinmux_flexpwm2_3: pinmux_flexpwm2_3 {
group0 {
pinmux = <&iomuxc_gpio_ad_b0_09_flexpwm2_pwma3>;
drive-strength = "r0-4";
bias-pull-up;
bias-pull-up-value = "47k";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
};
/* Conflicts with SD and SPI pins. Requires R281/R356 be populated */
pinmux_flexpwm1_0: pinmux_flexpwm1_0 {
group0 {
pinmux = <&iomuxc_gpio_sd_b0_01_flexpwm1_pwmb0>;
drive-strength = "r0-4";
bias-pull-up;
bias-pull-up-value = "47k";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
};
pinmux_flexpwm1: pinmux_flexpwm1 {
group0 {
pinmux = <&iomuxc_gpio_ad_b0_10_flexpwm1_pwma3>;
drive-strength = "r0-4";
bias-pull-up;
bias-pull-up-value = "47k";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
};
pinmux_flexspi1: pinmux_flexspi1 {
group0 {
pinmux = <&iomuxc_gpio_sd_b1_05_flexspi_a_dqs>;
drive-strength = "r0-6";
input-schmitt-enable;
bias-pull-down;
bias-pull-down-value = "100k";
slew-rate = "fast";
nxp,speed = "200-mhz";
input-enable;
};
group1 {
pinmux = <&iomuxc_gpio_sd_b1_03_flexspi_b_data0>,
<&iomuxc_gpio_sd_b1_00_flexspi_b_data3>,
<&iomuxc_gpio_sd_b1_01_flexspi_b_data2>,
<&iomuxc_gpio_sd_b1_02_flexspi_b_data1>,
<&iomuxc_gpio_sd_b1_04_flexspi_b_sclk>,
<&iomuxc_gpio_sd_b1_06_flexspi_a_ss0_b>,
<&iomuxc_gpio_sd_b1_07_flexspi_a_sclk>,
<&iomuxc_gpio_sd_b1_08_flexspi_a_data0>,
<&iomuxc_gpio_sd_b1_09_flexspi_a_data1>,
<&iomuxc_gpio_sd_b1_10_flexspi_a_data2>,
<&iomuxc_gpio_sd_b1_11_flexspi_a_data3>;
drive-strength = "r0-6";
slew-rate = "fast";
nxp,speed = "200-mhz";
input-enable;
};
};
/* Configures pin routing and optionally pin electrical features. */
pinmux_lcdif: pinmux_lcdif {
group0 {
pinmux = <&iomuxc_gpio_b0_00_lcdif_clk>,
<&iomuxc_gpio_b0_01_lcdif_enable>,
<&iomuxc_gpio_b0_02_lcdif_hsync>,
<&iomuxc_gpio_b0_03_lcdif_vsync>,
<&iomuxc_gpio_b0_04_lcdif_data00>,
<&iomuxc_gpio_b0_05_lcdif_data01>,
<&iomuxc_gpio_b0_06_lcdif_data02>,
<&iomuxc_gpio_b0_07_lcdif_data03>,
<&iomuxc_gpio_b0_08_lcdif_data04>,
<&iomuxc_gpio_b0_09_lcdif_data05>,
<&iomuxc_gpio_b0_10_lcdif_data06>,
<&iomuxc_gpio_b0_11_lcdif_data07>,
<&iomuxc_gpio_b0_12_lcdif_data08>,
<&iomuxc_gpio_b0_13_lcdif_data09>,
<&iomuxc_gpio_b0_14_lcdif_data10>,
<&iomuxc_gpio_b0_15_lcdif_data11>,
<&iomuxc_gpio_b1_00_lcdif_data12>,
<&iomuxc_gpio_b1_01_lcdif_data13>,
<&iomuxc_gpio_b1_02_lcdif_data14>,
<&iomuxc_gpio_b1_03_lcdif_data15>;
drive-strength = "r0-6";
input-schmitt-enable;
bias-pull-up;
bias-pull-up-value = "100k";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
group1 {
pinmux = <&iomuxc_gpio_ad_b0_02_gpio1_io02>,
<&iomuxc_gpio_b1_15_gpio2_io31>;
drive-strength = "r0-6";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
};
pinmux_lpi2c1: pinmux_lpi2c1 {
group0 {
pinmux = <&iomuxc_gpio_ad_b1_01_lpi2c1_sda>,
<&iomuxc_gpio_ad_b1_00_lpi2c1_scl>;
drive-strength = "r0-6";
drive-open-drain;
slew-rate = "slow";
nxp,speed = "100-mhz";
input-enable;
};
};
/* Conflicts with USDHC pins. Connect R278, R279, R280, and R281 on evk board */
pinmux_lpspi1: pinmux_lpspi1 {
group0 {
pinmux = <&iomuxc_gpio_sd_b0_01_lpspi1_pcs0>,
<&iomuxc_gpio_sd_b0_00_lpspi1_sck>,
<&iomuxc_gpio_sd_b0_03_lpspi1_sdi>,
<&iomuxc_gpio_sd_b0_02_lpspi1_sdo>;
drive-strength = "r0-6";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
};
/* conflicts with lcdif pins */
pinmux_lpspi3: pinmux_lpspi3 {
group0 {
pinmux = <&iomuxc_gpio_ad_b0_03_lpspi3_pcs0>,
<&iomuxc_gpio_ad_b0_00_lpspi3_sck>,
<&iomuxc_gpio_ad_b0_02_lpspi3_sdi>,
<&iomuxc_gpio_ad_b0_01_lpspi3_sdo>;
drive-strength = "r0-6";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
};
pinmux_lpuart1: pinmux_lpuart1 {
group0 {
pinmux = <&iomuxc_gpio_ad_b0_13_lpuart1_rx>,
<&iomuxc_gpio_ad_b0_12_lpuart1_tx>;
drive-strength = "r0-6";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
};
pinmux_lpuart1_sleep: pinmux_lpuart1_sleep {
group0 {
pinmux = <&iomuxc_gpio_ad_b0_13_gpio1_io13>;
drive-strength = "r0";
bias-pull-up;
bias-pull-up-value = "100k";
slew-rate = "slow";
nxp,speed = "50-mhz";
};
group1 {
pinmux = <&iomuxc_gpio_ad_b0_12_lpuart1_tx>;
drive-strength = "r0-6";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
};
pinmux_lpuart3: pinmux_lpuart3 {
group0 {
pinmux = <&iomuxc_gpio_ad_b1_06_lpuart3_tx>,
<&iomuxc_gpio_ad_b1_07_lpuart3_rx>;
drive-strength = "r0-6";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
};
/* Flow control for lpuart3 */
pinmux_lpuart3_flow_control: pinmux_lpuart3_flow_control {
group0 {
pinmux = <&iomuxc_gpio_ad_b1_06_lpuart3_tx>,
<&iomuxc_gpio_ad_b1_07_lpuart3_rx>,
<&iomuxc_gpio_ad_b1_04_lpuart3_cts_b>,
<&iomuxc_gpio_ad_b1_05_lpuart3_rts_b>;
drive-strength = "r0-6";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
};
pinmux_lpuart3_sleep: pinmux_lpuart3_sleep {
group0 {
pinmux = <&iomuxc_gpio_ad_b1_06_gpio1_io22>;
drive-strength = "r0";
bias-pull-up;
bias-pull-up-value = "100k";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
group1 {
pinmux = <&iomuxc_gpio_ad_b1_07_lpuart3_rx>;
drive-strength = "r0-6";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
};
pinmux_sai1: pinmux_sai1 {
group0 {
pinmux = <&iomuxc_gpio_ad_b1_09_sai1_mclk>,
<&iomuxc_gpio_ad_b1_13_sai1_tx_data0>,
<&iomuxc_gpio_ad_b1_12_sai1_rx_data0>,
<&iomuxc_gpio_ad_b1_14_sai1_tx_bclk>,
<&iomuxc_gpio_ad_b1_15_sai1_tx_sync>;
drive-strength = "r0-6";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
};
/* Note SWO is configured with a cpu frequency of 132MHz and SWO frequency of 7500KHz */
pinmux_swo: pinmux_swo {
group0 {
pinmux = <&iomuxc_gpio_ad_b0_10_arm_trace_swo>;
bias-disable;
drive-strength = "r0-7";
slew-rate = "fast";
nxp,speed = "200-mhz";
};
};
pinmux_usdhc1: pinmux_usdhc1 {
group0 {
pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>;
bias-disable;
drive-strength = "r0";
input-schmitt-enable;
slew-rate = "fast";
nxp,speed = "100-mhz";
};
group1 {
pinmux = <&iomuxc_gpio_b1_12_gpio2_io28>,
<&iomuxc_gpio_sd_b0_00_usdhc1_cmd>,
<&iomuxc_gpio_sd_b0_02_usdhc1_data0>,
<&iomuxc_gpio_sd_b0_03_usdhc1_data1>,
<&iomuxc_gpio_sd_b0_04_usdhc1_data2>,
<&iomuxc_gpio_sd_b0_05_usdhc1_data3>;
drive-strength = "r0";
input-schmitt-enable;
bias-pull-up;
bias-pull-up-value = "47k";
slew-rate = "fast";
nxp,speed = "100-mhz";
};
group2 {
pinmux = <&iomuxc_gpio_b1_14_usdhc1_vselect>;
drive-strength = "r0-4";
input-schmitt-enable;
bias-pull-up;
bias-pull-up-value = "47k";
slew-rate = "fast";
nxp,speed = "100-mhz";
};
group3 {
pinmux = <&iomuxc_gpio_ad_b0_05_gpio1_io05>;
drive-strength = "r0-6";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
};
/* fast pinmux settings for USDHC (over 100 Mhz) */
pinmux_usdhc1_fast: pinmux_usdhc1_fast {
group0 {
pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>;
bias-disable;
drive-strength = "r0-7";
input-schmitt-enable;
slew-rate = "fast";
nxp,speed = "200-mhz";
};
group1 {
pinmux = <&iomuxc_gpio_sd_b0_00_usdhc1_cmd>,
<&iomuxc_gpio_sd_b0_02_usdhc1_data0>,
<&iomuxc_gpio_sd_b0_03_usdhc1_data1>,
<&iomuxc_gpio_sd_b0_04_usdhc1_data2>,
<&iomuxc_gpio_sd_b0_05_usdhc1_data3>;
drive-strength = "r0-7";
input-schmitt-enable;
bias-pull-up;
bias-pull-up-value = "47k";
slew-rate = "fast";
nxp,speed = "200-mhz";
};
};
/* medium pinmux settings for USDHC (under 100 Mhz) */
pinmux_usdhc1_med: pinmux_usdhc1_med {
group0 {
pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>;
bias-disable;
drive-strength = "r0-7";
input-schmitt-enable;
slew-rate = "fast";
nxp,speed = "100-mhz";
};
group1 {
pinmux = <&iomuxc_gpio_sd_b0_00_usdhc1_cmd>,
<&iomuxc_gpio_sd_b0_02_usdhc1_data0>,
<&iomuxc_gpio_sd_b0_03_usdhc1_data1>,
<&iomuxc_gpio_sd_b0_04_usdhc1_data2>,
<&iomuxc_gpio_sd_b0_05_usdhc1_data3>;
drive-strength = "r0-7";
input-schmitt-enable;
bias-pull-up;
bias-pull-up-value = "47k";
slew-rate = "fast";
nxp,speed = "100-mhz";
};
};
/* slow pinmux settings for USDHC (under 50 Mhz) */
pinmux_usdhc1_slow: pinmux_usdhc1_slow {
group0 {
pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>;
bias-disable;
drive-strength = "r0-7";
input-schmitt-enable;
slew-rate = "fast";
nxp,speed = "50-mhz";
};
group1 {
pinmux = <&iomuxc_gpio_sd_b0_00_usdhc1_cmd>,
<&iomuxc_gpio_sd_b0_02_usdhc1_data0>,
<&iomuxc_gpio_sd_b0_03_usdhc1_data1>,
<&iomuxc_gpio_sd_b0_04_usdhc1_data2>,
<&iomuxc_gpio_sd_b0_05_usdhc1_data3>;
drive-strength = "r0-7";
input-schmitt-enable;
bias-pull-up;
bias-pull-up-value = "47k";
slew-rate = "fast";
nxp,speed = "50-mhz";
};
};
};
``` | /content/code_sandbox/boards/nxp/mimxrt1060_evk/mimxrt1060_evk-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 4,834 |
```cmake
#
#
#
board_runner_args(linkserver "--device=LPC55S28:LPCXpresso55S28")
board_runner_args(pyocd "--target=lpc55s28")
board_runner_args(jlink "--device=LPC55S28" "--reset-after-load")
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
include(${ZEPHYR_BASE}/boards/common/linkserver.board.cmake)
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
``` | /content/code_sandbox/boards/nxp/lpcxpresso55s28/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 106 |
```unknown
#
config BOARD_LPCXPRESSO55S28
select SOC_LPC55S28
select SOC_PART_NUMBER_LPC55S28JBD100
``` | /content/code_sandbox/boards/nxp/lpcxpresso55s28/Kconfig.lpcxpresso55s28 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 34 |
```unknown
/*
*
*/
#include "lpcxpresso55s28-pinctrl.dtsi"
/ {
aliases{
led0 = &red_led;
led1 = &green_led;
led2 = &blue_led;
spi-8 = &hs_lspi;
usart-0 = &flexcomm0;
accel0 = &mma8652fc;
};
leds {
compatible = "gpio-leds";
green_led: led_1 {
gpios = <&gpio1 7 0>;
label = "User LD2";
status = "disabled";
};
blue_led: led_2 {
gpios = <&gpio1 4 0>;
label = "User LD3";
status = "disabled";
};
red_led: led_3 {
gpios = <&gpio1 6 0>;
label = "User LD4";
status = "disabled";
};
};
mikrobus_header: mikrobus-connector {
compatible = "mikro-bus";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpio0 16 0>, /* AN */
/* Not a GPIO*/ /* RST */
<2 0 &gpio1 1 0>, /* CS */
<3 0 &gpio1 2 0>, /* SCK */
<4 0 &gpio1 3 0>, /* MISO */
<5 0 &gpio0 26 0>, /* MOSI */
/* +3.3V */
/* GND */
<6 0 &gpio1 5 0>, /* PWM */
<7 0 &gpio1 18 0>, /* INT */
<8 0 &gpio1 24 0>, /* RX */
<9 0 &gpio0 27 0>, /* TX */
<10 0 &gpio1 20 0>, /* SCL */
<11 0 &gpio1 21 0>; /* SDA */
/* +5V */
/* GND */
};
arduino_header: arduino-connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpio0 16 0>, /* A0 */
<1 0 &gpio0 23 0>, /* A1 */
<2 0 &gpio0 0 0>, /* A2 */
<3 0 &gpio1 31 0>, /* A3 */
<4 0 &gpio0 13 0>, /* A4 */
<5 0 &gpio0 14 0>, /* A5 */
<6 0 &gpio1 24 0>, /* D0 */
<7 0 &gpio0 27 0>, /* D1 */
<8 0 &gpio0 15 0>, /* D2 */
<9 0 &gpio1 6 0>, /* D3 */
<10 0 &gpio1 7 0>, /* D4 */
<11 0 &gpio1 4 0>, /* D5 */
<12 0 &gpio1 10 0>, /* D6 */
<13 0 &gpio1 9 0>, /* D7 */
<14 0 &gpio1 8 0>, /* D8 */
<15 0 &gpio1 5 0>, /* D9 */
<16 0 &gpio1 1 0>, /* D10 */
<17 0 &gpio0 26 0>, /* D11 */
<18 0 &gpio1 3 0>, /* D12 */
<19 0 &gpio1 2 0>, /* D13 */
<20 0 &gpio1 21 0>, /* D14 */
<21 0 &gpio1 20 0>; /* D15 */
};
};
&flexcomm0 {
compatible = "nxp,lpc-usart";
current-speed = <115200>;
pinctrl-0 = <&pinmux_flexcomm0_usart>;
pinctrl-names = "default";
dmas = <&dma0 4>, <&dma0 5>;
dma-names = "rx", "tx";
};
arduino_i2c: &flexcomm4 {
compatible = "nxp,lpc-i2c";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&pinmux_flexcomm4_i2c>;
pinctrl-names = "default";
mma8652fc: mma8652fc@1d {
compatible = "nxp,fxos8700","nxp,mma8652fc";
reg = <0x1d>;
int1-gpios = <&gpio1 19 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
};
};
arduino_spi: &hs_lspi {
pinctrl-0 = <&pinmux_hs_lspi>;
pinctrl-names = "default";
};
arduino_gpio: &gpio1 {
};
mikrobus_spi: &hs_lspi {
};
``` | /content/code_sandbox/boards/nxp/lpcxpresso55s28/lpcxpresso55s28_common.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,295 |
```unknown
choice MCUBOOT_MODE
default MCUBOOT_MODE_OVERWRITE_ONLY
endchoice
``` | /content/code_sandbox/boards/nxp/lpcxpresso55s28/Kconfig.sysbuild | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 20 |
```unknown
/*
*
*/
/dts-v1/;
#include <nxp/nxp_lpc55S2x.dtsi>
#include "lpcxpresso55s28_common.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "NXP LPCXpresso55S28 board";
compatible = "nxp,lpc55xxx", "nxp,lpc";
aliases{
sw0 = &user_button_1;
sw1 = &user_button_2;
sw2 = &user_button_3;
watchdog0 = &wwdt0;
accel0 = &mma8652fc;
};
chosen {
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,console = &flexcomm0;
zephyr,shell-uart = &flexcomm0;
zephyr,entropy = &rng;
zephyr,flash-controller = &iap;
};
gpio_keys {
compatible = "gpio-keys";
user_button_1: button_0 {
label = "User SW1";
gpios = <&gpio0 5 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>;
zephyr,code = <INPUT_KEY_0>;
};
user_button_2: button_1 {
label = "User SW2";
gpios = <&gpio1 18 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
zephyr,code = <INPUT_KEY_1>;
};
user_button_3: button_2 {
label = "User SW3";
gpios = <&gpio1 9 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
zephyr,code = <INPUT_KEY_2>;
};
};
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&green_led {
status = "okay";
};
&red_led {
status = "okay";
};
&flexcomm0 {
status = "okay";
};
&flexcomm4 {
status = "okay";
};
&hs_lspi {
status = "okay";
dmas = <&dma0 2>, <&dma0 3>;
dma-names = "rx", "tx";
};
&wwdt0 {
status = "okay";
};
&adc0 {
status = "okay";
pinctrl-0 = <&pinmux_lpadc0>;
pinctrl-names = "default";
};
&dma0 {
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x0 DT_SIZE_K(32)>;
};
slot0_partition: partition@8000 {
label = "image-0";
reg = <0x00008000 DT_SIZE_K(208)>;
};
slot1_partition: partition@3C000 {
label = "image-1";
reg = <0x0003C000 DT_SIZE_K(208)>;
};
storage_partition: partition@70000 {
label = "storage";
reg = <0x00070000 DT_SIZE_K(52)>;
};
/* The last 12KBs are reserved for PFR. */
};
};
zephyr_udc0: &usbhs {
status = "okay";
};
``` | /content/code_sandbox/boards/nxp/lpcxpresso55s28/lpcxpresso55s28.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 781 |
```unknown
#
#
#
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
CONFIG_GPIO=y
CONFIG_PINCTRL=y
CONFIG_ARM_MPU=y
CONFIG_HW_STACK_PROTECTION=y
CONFIG_RUNTIME_NMI=y
CONFIG_BUILD_OUTPUT_HEX=y
``` | /content/code_sandbox/boards/nxp/lpcxpresso55s28/lpcxpresso55s28_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 58 |
```restructuredtext
.. _mimxrt1060_evk:
NXP MIMXRT1060-EVK
##################
Overview
********
The i.MX RT1060 adds to the industry's first crossover
processor series and expands the i.MX RT series to three scalable families.
The i.MX RT1060 doubles the On-Chip SRAM to 1MB while keeping pin-to-pin
compatibility with i.MX RT1050. This series introduces additional features
ideal for real-time applications such as High-Speed GPIO, CAN FD, and
synchronous parallel NAND/NOR/PSRAM controller. The i.MX RT1060 runs on the
Arm Cortex-M7 core up to 600 MHz.
.. image:: mimxrt1060_evk.jpg
:align: center
:alt: MIMXRT1060-EVK
Hardware
********
- MIMXRT1062DVL6A MCU (600 MHz, 1024 KB on-chip memory)
- Memory
- 256 Mbit SDRAM
- 64 Mbit QSPI Flash
- 512 Mbit Hyper Flash
- TF socket for SD card
- Display
- LCD connector
- Ethernet
- 10/100 Mbit/s Ethernet PHY
- USB
- USB 2.0 OTG connector
- USB 2.0 host connector
- Audio
- 3.5 mm audio stereo headphone jack
- Board-mounted microphone
- Left and right speaker out connectors
- Power
- 5 V DC jack
- Debug
- JTAG 20-pin connector
- OpenSDA with DAPLink
- Sensor
- FXOS8700CQ 6-axis e-compass
- CMOS camera sensor interface
- Expansion port
- Arduino interface
- CAN bus connector
For more information about the MIMXRT1060 SoC and MIMXRT1060-EVK board, see
these references:
- `i.MX RT1060 Website`_
- `i.MX RT1060 Datasheet`_
- `i.MX RT1060 Reference Manual`_
- `MIMXRT1060-EVK Website`_
- `MIMXRT1060-EVK User Guide`_
- `MIMXRT1060-EVK Schematics`_
- `MIMXRT1060-EVK Debug Firmware`_
External Memory
===============
This platform has the following external memories:
+--------------------+------------+-------------------------------------+
| Device | Controller | Status |
+====================+============+=====================================+
| IS25WP064AJBLE | SEMC | Enabled via device configuration |
| | | data block, which sets up SEMC at |
| | | boot time |
+--------------------+------------+-------------------------------------+
| IS42S16160J | FLEXSPI | Enabled via flash configurationn |
| | | block, which sets up FLEXSPI at |
| | | boot time. |
+--------------------+------------+-------------------------------------+
Supported Features
==================
The mimxrt1060_evk board configuration supports the hardware features listed
below. For additional features not yet supported, please also refer to the
:ref:`mimxrt1064_evk` , which is the superset board in NXP's i.MX RT10xx family.
NXP prioritizes enabling the superset board with NXP's Full Platform Support for
Zephyr. Therefore, the mimxrt1064_evk board may have additional features
already supported, which can also be re-used on this mimxrt1060_evk board:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+-------------------------------------+
| DISPLAY | on-chip | eLCDIF. Tested with |
| | | :ref:`rk043fn02h_ct`, and |
| | | :ref:`rk043fn66hs_ctg` shields |
+-----------+------------+-------------------------------------+
| FLASH | on-chip | QSPI flash |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | watchdog |
+-----------+------------+-------------------------------------+
| SDHC | on-chip | disk access |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| ENET | on-chip | ethernet |
+-----------+------------+-------------------------------------+
| USB | on-chip | USB device |
+-----------+------------+-------------------------------------+
| CAN | on-chip | can |
+-----------+------------+-------------------------------------+
| DMA | on-chip | dma |
+-----------+------------+-------------------------------------+
| ADC | on-chip | adc |
+-----------+------------+-------------------------------------+
| SAI | on-chip | i2s |
+-----------+------------+-------------------------------------+
| GPT | on-chip | gpt |
+-----------+------------+-------------------------------------+
| TRNG | on-chip | entropy |
+-----------+------------+-------------------------------------+
| FLEXSPI | on-chip | flash programming |
+-----------+------------+-------------------------------------+
| PIT | on-chip | pit |
+-----------+------------+-------------------------------------+
The default configuration can be found in
:zephyr_file:`boards/nxp/mimxrt1060_evk/mimxrt1060_evk_defconfig`
Other hardware features are not currently supported by the port.
Connections and I/Os
====================
The MIMXRT1060 SoC has five pairs of pinmux/gpio controllers.
+---------------+-----------------+---------------------------+
| Name | Function | Usage |
+===============+=================+===========================+
| GPIO_AD_B0_00 | LPSPI1_SCK | SPI |
+---------------+-----------------+---------------------------+
| GPIO_AD_B0_01 | LPSPI1_SDO | SPI |
+---------------+-----------------+---------------------------+
| GPIO_AD_B0_02 | LPSPI3_SDI/LCD_RST| SPI/LCD Display |
+---------------+-----------------+---------------------------+
| GPIO_AD_B0_03 | LPSPI3_PCS0 | SPI |
+---------------+-----------------+---------------------------+
| GPIO_AD_B0_05 | GPIO | SD Card |
+---------------+-----------------+---------------------------+
| GPIO_AD_B0_09 | GPIO/ENET_RST | LED |
+---------------+-----------------+---------------------------+
| GPIO_AD_B0_10 | GPIO/ENET_INT | GPIO/Ethernet |
+---------------+-----------------+---------------------------+
| GPIO_AD_B0_11 | GPIO | Touch Interrupt |
+---------------+-----------------+---------------------------+
| GPIO_AD_B0_12 | LPUART1_TX | UART Console |
+---------------+-----------------+---------------------------+
| GPIO_AD_B0_13 | LPUART1_RX | UART Console |
+---------------+-----------------+---------------------------+
| GPIO_AD_B1_00 | LPI2C1_SCL | I2C |
+---------------+-----------------+---------------------------+
| GPIO_AD_B1_01 | LPI2C1_SDA | I2C |
+---------------+-----------------+---------------------------+
| GPIO_AD_B1_06 | LPUART3_TX | UART BT HCI |
+---------------+-----------------+---------------------------+
| GPIO_AD_B1_07 | LPUART3_RX | UART BT HCI |
+---------------+-----------------+---------------------------+
| WAKEUP | GPIO | SW0 |
+---------------+-----------------+---------------------------+
| GPIO_B0_00 | LCD_CLK | LCD Display |
+---------------+-----------------+---------------------------+
| GPIO_B0_01 | LCD_ENABLE | LCD Display |
+---------------+-----------------+---------------------------+
| GPIO_B0_02 | LCD_HSYNC | LCD Display |
+---------------+-----------------+---------------------------+
| GPIO_B0_03 | LCD_VSYNC | LCD Display |
+---------------+-----------------+---------------------------+
| GPIO_B0_04 | LCD_DATA00 | LCD Display |
+---------------+-----------------+---------------------------+
| GPIO_B0_05 | LCD_DATA01 | LCD Display |
+---------------+-----------------+---------------------------+
| GPIO_B0_06 | LCD_DATA02 | LCD Display |
+---------------+-----------------+---------------------------+
| GPIO_B0_07 | LCD_DATA03 | LCD Display |
+---------------+-----------------+---------------------------+
| GPIO_B0_08 | LCD_DATA04 | LCD Display |
+---------------+-----------------+---------------------------+
| GPIO_B0_09 | LCD_DATA05 | LCD Display |
+---------------+-----------------+---------------------------+
| GPIO_B0_10 | LCD_DATA06 | LCD Display |
+---------------+-----------------+---------------------------+
| GPIO_B0_11 | LCD_DATA07 | LCD Display |
+---------------+-----------------+---------------------------+
| GPIO_B0_12 | LCD_DATA08 | LCD Display |
+---------------+-----------------+---------------------------+
| GPIO_B0_13 | LCD_DATA09 | LCD Display |
+---------------+-----------------+---------------------------+
| GPIO_B0_14 | LCD_DATA10 | LCD Display |
+---------------+-----------------+---------------------------+
| GPIO_B0_15 | LCD_DATA11 | LCD Display |
+---------------+-----------------+---------------------------+
| GPIO_B1_00 | LCD_DATA12 | LCD Display |
+---------------+-----------------+---------------------------+
| GPIO_B1_01 | LCD_DATA13 | LCD Display |
+---------------+-----------------+---------------------------+
| GPIO_B1_02 | LCD_DATA14 | LCD Display |
+---------------+-----------------+---------------------------+
| GPIO_B1_03 | LCD_DATA15 | LCD Display |
+---------------+-----------------+---------------------------+
| GPIO_B1_04 | ENET_RX_DATA00 | Ethernet |
+---------------+-----------------+---------------------------+
| GPIO_B1_05 | ENET_RX_DATA01 | Ethernet |
+---------------+-----------------+---------------------------+
| GPIO_B1_06 | ENET_RX_EN | Ethernet |
+---------------+-----------------+---------------------------+
| GPIO_B1_07 | ENET_TX_DATA00 | Ethernet |
+---------------+-----------------+---------------------------+
| GPIO_B1_08 | ENET_TX_DATA01 | Ethernet |
+---------------+-----------------+---------------------------+
| GPIO_B1_09 | ENET_TX_EN | Ethernet |
+---------------+-----------------+---------------------------+
| GPIO_B1_10 | ENET_REF_CLK | Ethernet |
+---------------+-----------------+---------------------------+
| GPIO_B1_11 | ENET_RX_ER | Ethernet |
+---------------+-----------------+---------------------------+
| GPIO_B1_12 | GPIO | SD Card |
+---------------+-----------------+---------------------------+
| GPIO_B1_14 | USDHC1_VSELECT | SD Card |
+---------------+-----------------+---------------------------+
| GPIO_B1_15 | BACKLIGHT_CTL | LCD Display |
+---------------+-----------------+---------------------------+
| GPIO_EMC_40 | ENET_MDC | Ethernet |
+---------------+-----------------+---------------------------+
| GPIO_EMC_41 | ENET_MDIO | Ethernet |
+---------------+-----------------+---------------------------+
| GPIO_AD_B0_09 | ENET_RST | Ethernet |
+---------------+-----------------+---------------------------+
| GPIO_AD_B0_10 | ENET_INT | Ethernet |
+---------------+-----------------+---------------------------+
| GPIO_SD_B0_00 | USDHC1_CMD/LPSPI1_SCK | SD Card/SPI |
+---------------+-----------------+---------------------------+
| GPIO_SD_B0_01 | USDHC1_CLK/LPSPI1_PCS0 | SD Card/SPI |
+---------------+-----------------+---------------------------+
| GPIO_SD_B0_02 | USDHC1_DATA0/LPSPI1_SDO | SD Card/SPI |
+---------------+-----------------+---------------------------+
| GPIO_SD_B0_03 | USDHC1_DATA1/LPSPI1_SDI | SD Card/SPI |
+---------------+-----------------+---------------------------+
| GPIO_SD_B0_04 | USDHC1_DATA2 | SD Card |
+---------------+-----------------+---------------------------+
| GPIO_SD_B0_05 | USDHC1_DATA3 | SD Card |
+---------------+-----------------+---------------------------+
| GPIO_AD_B1_11 | ADC | ADC1 Channel 0 |
+---------------+-----------------+---------------------------+
| GPIO_AD_B1_10 | ADC | ADC1 Channel 15 |
+---------------+-----------------+---------------------------+
| GPIO_AD_B1_09 | SAI1_MCLK | I2S |
+---------------+-----------------+---------------------------+
| GPIO_AD_B1_12 | SAI1_RX | I2S |
+---------------+-----------------+---------------------------+
| GPIO_AD_B1_13 | SAI1_TX | I2S |
+---------------+-----------------+---------------------------+
| GPIO_AD_B1_14 | SAI1_TX_BCLK | I2S |
+---------------+-----------------+---------------------------+
| GPIO_AD_B1_15 | SAI1_TX_SYNC | I2S |
+---------------+-----------------+---------------------------+
| GPIO_AD_B1_02 | 1588_EVENT2_OUT | 1588 |
+---------------+-----------------+---------------------------+
| GPIO_AD_B1_03 | 1588_EVENT2_IN | 1588 |
+---------------+-----------------+---------------------------+
.. note::
In order to use the SPI peripheral on this board, resistors R278, R279,
R280 and R281 must be populated with zero ohm resistors.
System Clock
============
The MIMXRT1060 SoC is configured to use SysTick as the system clock source,
running at 600MHz.
When power management is enabled, the 32 KHz low frequency
oscillator on the board will be used as a source for the GPT timer to
generate a system clock. This clock enables lower power states, at the
cost of reduced resolution
Serial Port
===========
The MIMXRT1060 SoC has eight UARTs. ``LPUART1`` is configured for the console,
``LPUART3`` for the Bluetooth Host Controller Interface (BT HCI), and the
remaining are not used.
Programming and Debugging
*************************
This board supports 3 debug host tools. Please install your preferred host
tool, then follow the instructions in `Configuring a Debug Probe`_ to
configure the board appropriately.
* :ref:`jlink-debug-host-tools` (Default, Supported by NXP)
* :ref:`linkserver-debug-host-tools` (Supported by NXP)
* :ref:`pyocd-debug-host-tools` (Not Supported by NXP)
Once the host tool and board are configured, build and flash applications
as usual (see :ref:`build_an_application` and :ref:`application_run` for more
details).
Configuring a Debug Probe
=========================
Two revisions of the RT1060 EVK exist. For the RT1060 EVK, J47/J48 are the SWD
isolation jumpers, J42 is the DFU mode jumper, and the 20 pin JTAG/SWD header
is present on J21. For the RT1060 EVKB, J9/J10 are the SWD isolation jumpers,
J12 is the DFU mode jumper, and the 20 pin JTAG/SWD header is present on J2.
.. include:: ../../common/rt1xxx-lpclink2-debug.rst
:start-after: rt1xxx-lpclink2-probes
See `Using J-Link with MIMXRT1060-EVK or MIMXRT1064-EVK`_ or `Using J-Link with
MIMXRT1060-EVKB`_ for more details.
Configuring a Console
=====================
Regardless of your choice in debug probe, we will use the OpenSDA
microcontroller as a usb-to-serial adapter for the serial console. Check that
jumpers J45 and J46 are **on** (they are on by default when boards ship from
the factory) to connect UART signals to the OpenSDA microcontroller.
Connect a USB cable from your PC to J41.
Use the following settings with your serial terminal of choice (minicom, putty,
etc.):
- Speed: 115200
- Data: 8 bits
- Parity: None
- Stop bits: 1
Using SWO
---------
SWO can be used as a logging backend, by setting ``CONFIG_LOG_BACKEND_SWO=y``.
Your SWO viewer should be configured with a CPU frequency of 132MHz, and
SWO frequency of 7500KHz.
Flashing
========
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: mimxrt1060_evk
:goals: flash
Open a serial terminal, reset the board (press the SW9 button), and you should
see the following message in the terminal:
.. code-block:: console
***** Booting Zephyr OS v1.14.0-rc1 *****
Hello World! mimxrt1060_evk
Debugging
=========
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: mimxrt1060_evk
:goals: debug
Open a serial terminal, step through the application in your debugger, and you
should see the following message in the terminal:
.. code-block:: console
***** Booting Zephyr OS v1.14.0-rc1 *****
Hello World! mimxrt1060_evk
Troubleshooting
===============
If the debug probe fails to connect with the following error, it's possible
that the boot header in QSPI flash is invalid or corrupted. The boot header is
configured by :kconfig:option:`CONFIG_NXP_IMXRT_BOOT_HEADER`.
.. code-block:: console
Remote debugging using :2331
Remote communication error. Target disconnected.: Connection reset by peer.
"monitor" command not supported by this target.
"monitor" command not supported by this target.
You can't do that when your target is `exec'
(gdb) Could not connect to target.
Please check power, connection and settings.
You can fix it by erasing and reprogramming the QSPI flash with the following
steps:
#. Set the SW7 DIP switches to ON-OFF-ON-OFF to prevent booting from QSPI flash.
#. Reset by pressing SW9
#. Run ``west debug`` or ``west flash`` again with a known working Zephyr
application.
#. Set the SW7 DIP switches to OFF-OFF-ON-OFF to boot from QSPI flash.
#. Reset by pressing SW9
If the west flash or debug commands fail, and the command hangs while executing
runners.jlink, confirm the J-Link debug probe is configured, powered, and
connected to the EVK properly.
.. _MIMXRT1060-EVK Website:
path_to_url
.. _MIMXRT1060-EVK User Guide:
path_to_url
.. _MIMXRT1060-EVK Debug Firmware:
path_to_url
.. _MIMXRT1060-EVK Schematics:
path_to_url
.. _i.MX RT1060 Website:
path_to_url
.. _i.MX RT1060 Datasheet:
path_to_url
.. _i.MX RT1060 Reference Manual:
path_to_url
.. _Using J-Link with MIMXRT1060-EVK or MIMXRT1064-EVK:
path_to_url
.. _Using J-Link with MIMXRT1060-EVKB:
path_to_url
``` | /content/code_sandbox/boards/nxp/mimxrt1060_evk/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 4,580 |
```yaml
board:
name: lpcxpresso55s28
vendor: nxp
socs:
- name: lpc55s28
``` | /content/code_sandbox/boards/nxp/lpcxpresso55s28/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 34 |
```unknown
/*
* NOTE: File generated by gen_board_pinctrl.py
* from LPCXpresso55S28.mex
*
*/
#include <nxp/lpc/LPC55S28JBD100-pinctrl.h>
&pinctrl {
pinmux_flexcomm0_usart: pinmux_flexcomm0_usart {
group0 {
pinmux = <FC0_RXD_SDA_MOSI_DATA_PIO0_29>,
<FC0_TXD_SCL_MISO_WS_PIO0_30>;
slew-rate = "standard";
};
};
pinmux_flexcomm4_i2c: pinmux_flexcomm4_i2c {
group0 {
pinmux = <FC4_RXD_SDA_MOSI_DATA_PIO1_21>,
<FC4_TXD_SCL_MISO_WS_PIO1_20>;
slew-rate = "standard";
};
};
pinmux_hs_lspi: pinmux_hs_lspi {
group0 {
pinmux = <HS_SPI_MOSI_PIO0_26>,
<HS_SPI_SSEL1_PIO1_1>,
<HS_SPI_SCK_PIO1_2>,
<HS_SPI_MISO_PIO1_3>;
bias-pull-up;
slew-rate = "standard";
};
};
pinmux_lpadc0: pinmux_lpadc0 {
group0 {
pinmux = <ADC0_CH0_PIO0_23>,
<ADC0_CH1_PIO0_10>;
slew-rate = "standard";
nxp,analog-mode;
};
};
};
``` | /content/code_sandbox/boards/nxp/lpcxpresso55s28/lpcxpresso55s28-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 367 |
```unknown
# LPCXpresso55S28 board
if BOARD_LPCXPRESSO55S28
if FXOS8700
choice FXOS8700_MODE
default FXOS8700_MODE_ACCEL
endchoice
config FXOS8700_DRDY_INT1
default y
depends on FXOS8700_TRIGGER
endif # FXOS8700
# For the secure version of the board the firmware is linked at the beginning
# of the flash, or into the code-partition defined in DT if it is intended to
# be loaded by MCUboot. If the secure firmware is to be combined with a non-
# secure image (TRUSTED_EXECUTION_SECURE=y), the secure FW image shall always
# be restricted to the size of its code partition.
# For the non-secure version of the board, the firmware
# must be linked into the code-partition (non-secure) defined in DT, regardless.
# Apply this configuration below by setting the Kconfig symbols used by
# the linker according to the information extracted from DT partitions.
# Workaround for not being able to have commas in macro arguments
DT_CHOSEN_Z_CODE_PARTITION := zephyr,code-partition
config FLASH_LOAD_SIZE
default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
depends on BOARD_LPCXPRESSO55S28 && TRUSTED_EXECUTION_SECURE
if BOOTLOADER_MCUBOOT
choice MCUBOOT_BOOTLOADER_MODE
# Board only supports MCUBoot via "upgrade only" method:
default MCUBOOT_BOOTLOADER_MODE_OVERWRITE_ONLY
endchoice
endif #BOOTLOADER_MCUBOOT
endif # BOARD_LPCXPRESSO55S28
``` | /content/code_sandbox/boards/nxp/lpcxpresso55s28/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 358 |
```yaml
#
#
#
identifier: lpcxpresso55s28
name: NXP LPCXpresso55S28
type: mcu
arch: arm
ram: 64
flash: 256
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- adc
- arduino_i2c
- arduino_spi
- gpio
- i2c
- spi
- usb_device
- watchdog
vendor: nxp
``` | /content/code_sandbox/boards/nxp/lpcxpresso55s28/lpcxpresso55s28.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 113 |
```unknown
/*
*
*/
/dts-v1/;
#include "rd_rw612_bga.dtsi"
/*
* To use ethernet on RD_RW612_BGA board:
*
* Load R485, R486, R487, R488, R489, R491, R490,
* R522, R521, R520, R524, R523, R508, R505
* Remove R518, R507, R506
*/
&enet_mac {
status = "okay";
pinctrl-0 = <&pinmux_enet>;
pinctrl-names = "default";
phy-handle = <&phy>;
zephyr,random-mac-address;
phy-connection-type = "rmii";
};
&enet_mdio {
status = "okay";
pinctrl-0 = <&pinmux_mdio>;
pinctrl-names = "default";
phy: phy@2 {
compatible = "microchip,ksz8081";
reg = <2>;
status = "okay";
reset-gpios = <&hsgpio1 23 GPIO_ACTIVE_HIGH>;
int-gpios = <&hsgpio0 21 GPIO_ACTIVE_HIGH>;
microchip,interface-type = "rmii";
};
};
/* XTAL is disconnected */
/* TODO: this should be uncommented once it is added */
/*
* &rtc {
* status = "disabled";
* };
*/
``` | /content/code_sandbox/boards/nxp/rd_rw612_bga/rd_rw612_bga_rw612_ethernet.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 295 |
```cmake
board_runner_args(jlink "--device=RW612" "--reset-after-load")
board_runner_args(linkserver "--device=RW612:RDRW612")
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
include(${ZEPHYR_BASE}/boards/common/linkserver.board.cmake)
``` | /content/code_sandbox/boards/nxp/rd_rw612_bga/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 67 |
```unknown
/*
*
*/
/dts-v1/;
#include "rd_rw612_bga.dtsi"
``` | /content/code_sandbox/boards/nxp/rd_rw612_bga/rd_rw612_bga.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 21 |
```unknown
/*
*
*/
#include <nxp/rw/RW612-pinctrl.h>
&pinctrl {
pinmux_flexcomm3_usart: pinmux_flexcomm3_usart {
group0 {
pinmux = <IO_MUX_FC3_USART_DATA>;
slew-rate = "normal";
};
};
pinmux_flexcomm0_usart: pinmux_flexcomm0_usart {
group0 {
pinmux = <IO_MUX_FC0_USART_DATA>;
slew-rate = "normal";
};
};
pinmux_flexcomm0_spi: pinmux_flexcomm0_spi {
group0 {
pinmux = <IO_MUX_FC0_SPI_SS0_IO0>,
<IO_MUX_FC0_SPI_SS0_IO2>,
<IO_MUX_FC0_SPI_SS0_IO3>,
<IO_MUX_FC0_SPI_SS0_IO4>;
slew-rate = "ultra";
};
};
pinmux_flexcomm2_i2c: pinmux_flexcomm2_i2c {
group0 {
pinmux = <IO_MUX_FC2_I2C_16_17>;
slew-rate = "normal";
bias-pull-up;
};
};
pinmux_dmic0: pinmux_dmic0 {
group0 {
pinmux = <IO_MUX_PDM_IO51
IO_MUX_PDM_IO52
IO_MUX_PDM_IO53
IO_MUX_PDM_IO54>;
slew-rate = "fast";
};
};
pinmux_lcdic: pinmux_lcdic {
group0 {
pinmux = <IO_MUX_LCD_SPI_IO44>,
<IO_MUX_LCD_SPI_IO45>,
<IO_MUX_LCD_SPI_IO46>,
<IO_MUX_LCD_SPI_IO47>,
<IO_MUX_LCD_SPI_IO48>,
<IO_MUX_LCD_SPI_IO49>;
slew-rate = "ultra";
};
};
pinmux_flexspi: pinmux_flexspi {
group0 {
pinmux = <IO_MUX_QUAD_SPI_FLASH_IO28
IO_MUX_QUAD_SPI_FLASH_IO30
IO_MUX_QUAD_SPI_FLASH_IO31
IO_MUX_QUAD_SPI_FLASH_IO32
IO_MUX_QUAD_SPI_FLASH_IO33
IO_MUX_QUAD_SPI_FLASH_IO34>;
slew-rate = "ultra";
};
group1 {
pinmux = <IO_MUX_QUAD_SPI_FLASH_IO29>;
slew-rate = "ultra";
bias-pull-down;
};
group2 {
pinmux = <IO_MUX_QUAD_SPI_PSRAM_IO35
IO_MUX_QUAD_SPI_PSRAM_IO36
IO_MUX_QUAD_SPI_PSRAM_IO38
IO_MUX_QUAD_SPI_PSRAM_IO39
IO_MUX_QUAD_SPI_PSRAM_IO40
IO_MUX_QUAD_SPI_PSRAM_IO41>;
slew-rate = "normal";
};
group3 {
pinmux = <IO_MUX_QUAD_SPI_PSRAM_IO37>;
slew-rate = "normal";
bias-pull-down;
};
};
pinmux_enet: pinmux_enet {
group0 {
pinmux = <IO_MUX_ENET_CLK
IO_MUX_ENET_RX
IO_MUX_ENET_TX
IO_MUX_GPIO21
IO_MUX_GPIO55>;
slew-rate = "fast";
};
};
pinmux_mdio: pinmux_mdio {
group0 {
pinmux = <IO_MUX_ENET_MDIO>;
slew-rate = "fast";
};
};
};
``` | /content/code_sandbox/boards/nxp/rd_rw612_bga/rd_rw612_bga-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 822 |
```unknown
config BOARD_RD_RW612_BGA
select SOC_PART_NUMBER_RW612ETA2I
``` | /content/code_sandbox/boards/nxp/rd_rw612_bga/Kconfig.rd_rw612_bga | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 20 |
```yaml
#
#
#
identifier: rd_rw612_bga/rw612/ethernet
name: NXP RD_RW612_BGA ETHERNET
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 960
flash: 65536
supported:
- netif:eth
testing:
default: false
``` | /content/code_sandbox/boards/nxp/rd_rw612_bga/rd_rw612_bga_rw612_ethernet.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 88 |
```restructuredtext
.. _lpcxpresso55s28:
NXP LPCXpresso55S28
###################
Overview
********
The LPCXpresso55S28 development board provides the ideal platform for evaluation
of and development with the LPC552x/S2x MCU based on the Arm Cortex-M33
architecture. The board includes a high-performance onboard debug probe, audio
subsystem and accelerometer, with several options for adding off-the-shelf
add-on boards for networking, sensors, displays, and other interfaces.
.. image:: LPC55S28-EVK.jpg
:align: center
:alt: LPCXpresso55S28
Hardware
********
- LPC55S28 Arm Cortex-M33 microcontroller running at up to 150 MHz
- 512 KB flash and 256 KB SRAM on-chip
- Onboard, high-speed USB, Link2 debug probe with CMSIS-DAP and SEGGER J-Link
protocol options
- UART and SPI port bridging from LPC55S28 target to USB via the onboard debug
probe
- Hardware support for external debug probe
- 3 x user LEDs, plus Reset, ISP (3) and user buttons
- Micro SD card slot (4-bit SDIO)
- NXP MMA8652FCR1 accelerometer
- Stereo audio codec with line in/out
- High and full speed USB ports with micro A/B connector for host or device
functionality
- MikroEletronika Click expansion option
- LPCXpresso-V3 expansion option compatible with Arduino UNO
- PMod compatible expansion / host connector
For more information about the LPC55S28 SoC and LPCXPresso55S28 board, see:
- `LPC55S28 SoC Website`_
- `LPC55S28 Datasheet`_
- `LPC55S28 User Manual`_
- `LPCXpresso55S28 Website`_
- `LPCXpresso55S28 User Manual`_
- `LPCXpresso55S28 Development Board Design Files`_
Supported Features
==================
The lpcxpresso55s28 board configuration supports the hardware features listed
below. For additional features not yet supported, please also refer to the
:ref:`lpcxpresso55s69` , which is the superset board in NXP's LPC55xx series.
NXP prioritizes enabling the superset board with NXP's Full Platform Support for
Zephyr. Therefore, the lpcxpresso55s69 board may have additional features
already supported, which can also be re-used on this lpcxpresso55s28 board:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+-------------------------------------+
| IOCON | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| USART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| WWDT | on-chip | windowed watchdog timer |
+-----------+------------+-------------------------------------+
| ADC | on-chip | adc |
+-----------+------------+-------------------------------------+
| CLOCK | on-chip | clock_control |
+-----------+------------+-------------------------------------+
| RNG | on-chip | entropy; |
| | | random |
+-----------+------------+-------------------------------------+
| IAP | on-chip | flash programming |
+-----------+------------+-------------------------------------+
Other hardware features are not currently enabled.
The default configuration file
:zephyr_file:`boards/nxp/lpcxpresso55s28/lpcxpresso55s28_defconfig`
Connections and IOs
===================
The LPC55S28 SoC has IOCON registers, which can be used to configure
the functionality of a pin.
+---------+-----------------+----------------------------+
| Name | Function | Usage |
+=========+=================+============================+
| PIO0_26 | SPI | SPI MOSI |
+---------+-----------------+----------------------------+
| PIO0_29 | USART | USART RX |
+---------+-----------------+----------------------------+
| PIO0_30 | USART | USART TX |
+---------+-----------------+----------------------------+
| PIO1_1 | SPI | SPI SSEL |
+---------+-----------------+----------------------------+
| PIO1_2 | SPI | SPI SCK |
+---------+-----------------+----------------------------+
| PIO1_3 | SPI | SPI MISO |
+---------+-----------------+----------------------------+
| PIO1_4 | GPIO | RED LED |
+---------+-----------------+----------------------------+
| PIO1_6 | GPIO | BLUE_LED |
+---------+-----------------+----------------------------+
| PIO1_7 | GPIO | GREEN LED |
+---------+-----------------+----------------------------+
| PIO1_20 | I2C | I2C SCL |
+---------+-----------------+----------------------------+
| PIO1_21 | I2C | I2C SDA |
+---------+-----------------+----------------------------+
System Clock
============
The LPC55S28 SoC is configured to use PLL1 clocked from the external 24MHz
crystal, running at 144MHz as a source for the system clock. When the flash
controller is enabled, the core clock will be reduced to 96MHz. The application
may reconfigure clocks after initialization, provided that the core clock is
always set to 96MHz when flash programming operations are performed.
Serial Port
===========
The LPC55S28 SoC has 8 FLEXCOMM interfaces for serial communication. One is
configured as USART for the console and the remaining are not used.
Programming and Debugging
*************************
Build and flash applications as usual (see :ref:`build_an_application`
and :ref:`application_run` for more details).
Configuring a Debug Probe
=========================
A debug probe is used for both flashing and debugging the board. This
board is configured by default to use the LPC-Link2 CMSIS-DAP Onboard
Debug Probe.
Configuring a Console
=====================
Connect a USB cable from your PC to P6, and use the serial terminal of your
choice (minicom, putty, etc.) with the following settings:
- Speed: 115200
- Data: 8 bits
- Parity: None
- Stop bits: 1
Flashing
========
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: lpcxpresso55s28
:goals: flash
Open a serial terminal, reset the board (press the RESET button), and you should
see the following message in the terminal:
.. code-block:: console
***** Booting Zephyr OS v2.4.0 *****
Hello World! lpcxpresso55s28
Debugging
=========
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: lpcxpresso55s28
:goals: debug
Open a serial terminal, step through the application in your debugger, and you
should see the following message in the terminal:
.. code-block:: console
***** Booting Zephyr OS zephyr-v2.4.0 *****
Hello World! lpcxpresso55s28
.. _LPC55S28 SoC Website:
path_to_url
.. _LPC55S28 Datasheet:
path_to_url
.. _LPC55S28 User Manual:
path_to_url
.. _LPCxpresso55S28 Website:
path_to_url
.. _LPCXpresso55S28 User Manual:
path_to_url
.. _LPCXpresso55S28 Development Board Design Files:
path_to_url
``` | /content/code_sandbox/boards/nxp/lpcxpresso55s28/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,828 |
```unknown
#
#
#
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_PINCTRL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
CONFIG_GPIO=y
CONFIG_ARM_MPU=y
CONFIG_HW_STACK_PROTECTION=y
CONFIG_TRUSTED_EXECUTION_SECURE=y
``` | /content/code_sandbox/boards/nxp/rd_rw612_bga/rd_rw612_bga_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 55 |
```cmake
# Suppress "spi_bus_bridge" as flexcomm node can be used as a SPI device.
list(APPEND EXTRA_DTC_FLAGS "-Wno-spi_bus_bridge")
``` | /content/code_sandbox/boards/nxp/rd_rw612_bga/pre_dt_board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 36 |
```yaml
#
#
#
identifier: rd_rw612_bga
name: NXP RD_RW612_BGA
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 960
flash: 65536
supported:
- dma
- dmic
- gpio
- spi
- i2c
- entropy
- usb_device
- watchdog
- counter
- hwinfo
- adc
- dac
``` | /content/code_sandbox/boards/nxp/rd_rw612_bga/rd_rw612_bga.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 118 |
```yaml
board:
name: rd_rw612_bga
vendor: nxp
socs:
- name: rw612
variants:
- name: ethernet
``` | /content/code_sandbox/boards/nxp/rd_rw612_bga/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 38 |
```unknown
#
#
#
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_PINCTRL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
CONFIG_GPIO=y
CONFIG_ARM_MPU=y
CONFIG_HW_STACK_PROTECTION=y
CONFIG_TRUSTED_EXECUTION_SECURE=y
``` | /content/code_sandbox/boards/nxp/rd_rw612_bga/rd_rw612_bga_rw612_ethernet_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 55 |
```unknown
# RD_RW612_BGA board
if BOARD_RD_RW612_BGA
if LVGL
# Enable DMA for LCDIC
config MIPI_DBI_NXP_LCDIC_DMA
default y if MIPI_DBI
# Increase descriptor count. LVGL will allocate a 30KB buffer,
# and the SPI driver sets up RX and TX side. Since LPC DMA has
# 1KB limit per descriptor, we need 60
config DMA_MCUX_LPC_NUMBER_OF_DESCRIPTORS
default 60
# Allocate buffer that is 10% of screen size
config LV_Z_VDB_SIZE
default 10
# Enable double buffering and offloaded render thread to improve performance
config LV_Z_DOUBLE_VDB
default y
config LV_Z_FLUSH_THREAD
default y
endif # LVGL
# Enable interrupt support when using FT5336 driver
config INPUT_FT5336_INTERRUPT
default y if INPUT
if DT_HAS_NXP_ENET_MAC_ENABLED && NETWORKING
config NET_L2_ETHERNET
default y
endif # DT_HAS_NXP_ENET_MAC_ENABLED && NETWORKING
endif # BOARD_RD_RW612_BGA
``` | /content/code_sandbox/boards/nxp/rd_rw612_bga/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 238 |
```unknown
#include <zephyr/dt-bindings/spi/spi.h>
/ {
chosen {
zephyr,display = &st7796s_lcdic;
};
lvgl_pointer {
compatible = "zephyr,lvgl-pointer-input";
input = <&ft7401>;
swap-xy;
invert-y;
};
};
&lcdic {
status = "okay";
nxp,swap-bytes;
/*
* Settings to connect this display:
* Populate the following resistors:
* - R125, R123, R12, R124, R15, R243, R239, R236, R233, R286, R246
* Remove the following resistors:
* - R9, R11, R20, R19, R242, R241, R237, R235, R245
* Remove JP30 to disconnect Flexcomm SPI CS
* Display can be connected to Arduino header (J5/J6)
* Pin # | Signal | Header
* -------------------------------
* 1 | VDD | J5.8 (+3.3V)
* 2 | RST | J6.8 (LCD_SPI_RESETN)
* 3 | SDO | J5.5 (SPI_MISO)
* 4 | CS | J5.3 (LCD_SPI_SS)
* 5 | SCLK | J5.6 (LCD_SPI_SCK)
* 6 | GND | J5.7 (GND)
* 7 | MOSI | J5.4 (LCD_SPI_SDIO)
* 8 | CD | J5.1 (LCD_SPI_DC)
* 9 | TE | J5.2 (LCD_SPI_TE, not enabled)
*
* Pins 10 and 11 correspond to the backlight anode and cathode,
* and must be driven by an external circuit
*/
st7796s_lcdic: st7796s@0 {
compatible = "sitronix,st7796s";
status = "okay";
reg = <0>;
mipi-max-frequency = <23000000>;
duplex = <SPI_HALF_DUPLEX>;
height = <320>;
width = <480>;
invert-mode = "1-dot";
frmctl1 = [80 10];
bpc = [1F 50 00 20];
dfc = [8A 07 3B];
pwr1 = [80 64];
pwr2 = <0x13>;
pwr3 = <0xA7>;
vcmpctl = <0x09>;
doca = [40 8A 00 00 29 19 A5 38];
pgc = [F0 06 0B 07 06 05 2E 33 47 3A 17 16 2E 31];
ngc = [F0 09 0D 09 08 23 2E 33 46 38 13 13 2C 32];
madctl = <0x28>;
};
};
&flexcomm2 {
status = "okay";
ft7401: ft7401@38 {
/*
* Settings to connect this touch controller:
* Populate JP3 and JP50 to connect I2C
* Controller can be connected to Arduino Header (J8/J5)
* Pin #1 | Signal | Header
* -------------------------------
* 1 | VDD | J8.2 (+3.3V)
* 2 | IOVDD | J8.4 (+3.3V)
* 3 | SCL | J5.10 (SCL)
* 4 | SDA | J5.9 (SDA)
* 5 | INT | J6.3 (D2)
* 6 | RST | J6.4 (D3)
* 7 | GND | J8.6 (GND)
* 8 | GND | J8.7 (GND)
*
* Note- the actual controller present on this IC is a FT7401,
* but the FT5336 driver in Zephyr supports this IC.
*/
compatible = "focaltech,ft5336";
reg = <0x38>;
reset-gpios = <&hsgpio0 15 GPIO_ACTIVE_LOW>;
int-gpios = <&hsgpio0 11 GPIO_ACTIVE_HIGH>;
};
};
``` | /content/code_sandbox/boards/nxp/rd_rw612_bga/dts/goworld_16880_lcm.overlay | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,025 |
```unknown
/*
*
*/
#include <nxp/nxp_rw6xx.dtsi>
#include "rd_rw612_bga-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "nxp,rd_rw612_bga";
compatible = "nxp,rd_rw612_bga";
aliases {
usart-0 = &flexcomm3;
led0 = &green_led;
sw0 = &sw_4;
i2c-0 = &flexcomm2;
watchdog0 = &wwdt;
dmic-dev = &dmic0;
};
chosen {
zephyr,sram = &sram_data;
zephyr,flash = &mx25u51245g;
zephyr,code-partition = &slot0_partition;
zephyr,flash-controller = &mx25u51245g;
zephyr,console = &flexcomm3;
zephyr,shell-uart = &flexcomm3;
};
leds {
compatible = "gpio-leds";
green_led: led_1 {
gpios = <&hsgpio1 20 0>;
label = "User LED_GREEN";
};
};
gpio_keys {
compatible = "gpio-keys";
sw_4: sw_4 {
label = "User SW4";
gpios = <&hsgpio0 25 0>;
zephyr,code = <INPUT_KEY_0>;
};
};
arduino_header: arduino-connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &hsgpio1 14 0>, /* A0 */
<1 0 &hsgpio1 15 0>, /* A1 */
<2 0 &hsgpio1 16 0>, /* A2 */
<3 0 &hsgpio1 17 0>, /* A3 */
<4 0 &hsgpio0 16 0>, /* A4 */
<5 0 &hsgpio0 17 0>, /* A5 */
<6 0 &hsgpio0 24 0>, /* D0 */
<7 0 &hsgpio0 26 0>, /* D1 */
<8 0 &hsgpio0 11 0>, /* D2 */
<9 0 &hsgpio0 15 0>, /* D3 */
<10 0 &hsgpio0 18 0>, /* D4 */
<11 0 &hsgpio0 27 0>, /* D5 */
<12 0 &hsgpio0 6 0>, /* D6 */
<13 0 &hsgpio0 10 0>, /* D7 */
<14 0 &hsgpio1 18 0>, /* D8 */
<15 0 &hsgpio1 13 0>, /* D9 */
<16 0 &hsgpio0 0 0>, /* D10 */
<17 0 &hsgpio0 2 0>, /* D11 */
<18 0 &hsgpio0 3 0>, /* D12 */
<19 0 &hsgpio0 4 0>, /* D13 */
<20 0 &hsgpio0 16 0>, /* D14 */
<21 0 &hsgpio0 17 0>; /* D15 */
};
};
&wwdt {
status = "okay";
};
arduino_spi: &flexcomm0 {
compatible = "nxp,lpc-spi";
pinctrl-0 = <&pinmux_flexcomm0_spi>;
pinctrl-names = "default";
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
};
arduino_i2c: &flexcomm2 {
compatible = "nxp,lpc-i2c";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&pinmux_flexcomm2_i2c>;
pinctrl-names = "default";
};
&flexcomm3 {
compatible = "nxp,lpc-usart";
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&pinmux_flexcomm3_usart>;
pinctrl-names = "default";
};
&hsgpio0 {
status = "okay";
};
&flexspi {
status = "okay";
ahb-bufferable;
ahb-prefetch;
ahb-cacheable;
ahb-read-addr-opt;
rx-clock-source = <1>;
rx-clock-source-b = <3>;
pinctrl-0 = <&pinmux_flexspi>;
pinctrl-names = "default";
status = "okay";
mx25u51245g: mx25u51245g@0 {
compatible = "nxp,imx-flexspi-nor";
spi-max-frequency = <133000000>;
reg = <0>;
/* MX25UM51245G is 64MB, 512MBit flash part */
size = <DT_SIZE_M(64 * 8)>;
status = "okay";
jedec-id = [c2 25 3a];
erase-block-size = <4096>;
write-block-size = <1>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 DT_SIZE_K(128)>;
};
/* Note slot 0 has one additional sector,
* this is intended for use with the swap move algorithm
*/
slot0_partition: partition@20000 {
label = "image-0";
reg = <0x00020000 0x3e0000>;
};
/* This partition is reserved for connectivity firmwares storage
* and shouldn't be moved.
*/
fw_storage: partition@400000 {
label = "fw_storage";
reg = <0x400000 0x280000>;
read-only;
};
slot1_partition: partition@680000 {
label = "image-1";
reg = <0x680000 0x3e0000>;
};
storage_partition: partition@a60000 {
label = "storage";
reg = <0xa60000 0x35a0000>;
};
};
};
is66wvq8m4: is66wvq8m4@2 {
compatible = "nxp,imx-flexspi-is66wvq8m4";
/* IS66WVQ8M4 is 4MB, 32MBit pSRAM */
size = <DT_SIZE_M(32)>;
reg = <2>;
spi-max-frequency = <256000000>;
/* PSRAM cannot be enabled while board is in default XIP
* configuration, as it will conflict with flash chip.
*/
status = "disabled";
cs-interval-unit = <1>;
cs-interval = <5>;
cs-hold-time = <2>;
cs-setup-time = <3>;
data-valid-time = <1>;
column-space = <14>;
ahb-write-wait-unit = <2>;
ahb-write-wait-interval = <0>;
};
};
&dmic0 {
pinctrl-0 = <&pinmux_dmic0>;
pinctrl-names = "default";
use2fs;
status = "okay";
};
/* Configure pdm channels 0-3 with gain, and cutoff settings
* appropriate for the attached MEMS microphones.
* Note that PDMC0/PDMC1 and PDMC2/PDMC3 are each connected to the same
* microphone. For best results, read from PDM HW channel 0 as left channel,
* and PDM HW channel 1 as right channel.
*/
&pdmc0 {
status = "okay";
gainshift = <3>;
dc-cutoff = "155hz";
dc-gain = <1>;
};
&pdmc1 {
status = "okay";
gainshift = <3>;
dc-cutoff = "155hz";
dc-gain = <1>;
};
&pdmc2 {
status = "okay";
gainshift = <3>;
dc-cutoff = "155hz";
dc-gain = <1>;
};
&pdmc3 {
status = "okay";
gainshift = <3>;
dc-cutoff = "155hz";
dc-gain = <1>;
};
zephyr_udc0: &usb_otg {
status = "okay";
};
&dma0 {
status = "okay";
};
&lcdic {
status = "okay";
pinctrl-0 = <&pinmux_lcdic>;
pinctrl-names = "default";
};
&mrt0_channel0 {
status = "okay";
};
&ctimer0 {
status = "okay";
};
&pmu {
reset-causes-en = <PMU_RESET_CM33_LOCKUP>,
<PMU_RESET_ITRC>,
<PMU_RESET_AP_RESET>;
};
&adc0 {
status = "okay";
};
&dac0 {
status = "okay";
};
/* OS Timer is the wakeup source for PM mode 2 */
&os_timer {
status = "okay";
wakeup-source;
};
&systick {
status = "disabled";
};
&hci {
status = "okay";
wakeup-source;
};
&pin1 {
status = "okay";
wakeup-level = "low";
};
``` | /content/code_sandbox/boards/nxp/rd_rw612_bga/rd_rw612_bga.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,228 |
```unknown
#
#
#
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_GPIO=y
CONFIG_ARM_MPU=y
CONFIG_HW_STACK_PROTECTION=y
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/nxp/mimxrt1170_evk/mimxrt1170_evk_mimxrt1176_cm7_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 39 |
```unknown
/*
*
*/
/ {
chosen {
zephyr,flash = &w25q512nw;
zephyr,flash-controller = &w25q512nw;
zephyr,flash = &w25q512nw;
zephyr,code-partition = &slot0_partition;
zephyr,bt-hci = &bt_hci_uart;
};
aliases {
/delete-property/ magn0;
/delete-property/ accel0;
};
};
&flexspi {
/* RT1170 EVKB uses a different QSPI flash chip */
/delete-node/ is25wp128@0;
status = "okay";
reg = <0x400cc000 0x4000>, <0x30000000 DT_SIZE_M(64)>;
w25q512nw:w25q512nw@0 {
compatible = "nxp,imx-flexspi-nor";
size = <DT_SIZE_M(64*8)>;
reg = <0>;
spi-max-frequency = <133000000>;
status = "okay";
jedec-id = [ef 60 20];
erase-block-size = <4096>;
write-block-size = <1>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 DT_SIZE_K(128)>;
};
/* The MCUBoot swap-move algorithm uses the last 3 sectors
* of the primary slot0 for swap status and move.
*/
slot0_partition: partition@20000 {
label = "image-0";
reg = <0x00020000 (DT_SIZE_M(7) + DT_SIZE_K(12))>;
};
slot1_partition: partition@723000 {
label = "image-1";
reg = <0x00723000 DT_SIZE_M(7)>;
};
storage_partition: partition@E23000 {
label = "storage";
reg = <0x00E23000 (DT_SIZE_M(50) - DT_SIZE_K(140))>;
};
};
};
};
&lpi2c5 {
/* FXOS accelerometer is not present in this board */
/delete-node/ fxos8700@1f;
};
&enet_mdio {
/delete-node/ phy@0;
phy: phy@0 {
compatible = "ethernet-phy";
reg = <0>;
status = "okay";
};
};
m2_hci_uart: &lpuart2 {
pinctrl-0 = <&pinmux_lpuart2_flowcontrol>;
pinctrl-1 = <&pinmux_lpuart2_sleep>;
pinctrl-names = "default", "sleep";
bt_hci_uart: bt_hci_uart {
compatible = "zephyr,bt-hci-uart";
m2_bt_module {
compatible = "nxp,bt-hci-uart";
sdio-reset-gpios = <&gpio9 15 GPIO_ACTIVE_HIGH>;
w-disable-gpios = <&gpio9 30 GPIO_ACTIVE_HIGH>;
hci-operation-speed = <115200>;
hw-flow-control;
fw-download-primary-speed = <115200>;
fw-download-secondary-speed = <3000000>;
fw-download-secondary-flowcontrol;
};
};
};
&m2_hci_uart {
status = "okay";
current-speed = <115200>;
};
``` | /content/code_sandbox/boards/nxp/mimxrt1170_evk/mimxrt1170_evk_mimxrt1176_cm7_B.overlay | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 778 |
```restructuredtext
.. _rd_rw612_bga:
NXP RD-RW612-BGA
################
Overview
********
The RW612 is a highly integrated, low-power tri-radio wireless MCU with an
integrated 260 MHz ARM Cortex-M33 MCU and Wi-Fi 6 + Bluetooth Low Energy (LE) 5.3 / 802.15.4
radios designed for a broad array of applications, including connected smart home devices,
gaming controllers, enterprise and industrial automation, smart accessories and smart energy.
The RW612 MCU subsystem includes 1.2 MB of on-chip SRAM and a high-bandwidth Quad SPI interface
with an on-the-fly decryption engine for securely accessing off-chip XIP flash.
The advanced design of the RW612 delivers tight integration, low power and highly secure
operation in a space- and cost-efficient wireless MCU requiring only a single 3.3V power supply.
Hardware
********
- 260 MHz ARM Cortex-M33, tri-radio cores for Wifi 6 + BLE 5.3 + 802.15.4
- 1.2 MB on-chip SRAM
Supported Features
==================
+-----------+------------+-----------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+===================================+
| NVIC | on-chip | nested vector interrupt controller|
+-----------+------------+-----------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+-----------------------------------+
| MCI_IOMUX | on-chip | pinmux |
+-----------+------------+-----------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-----------------------------------+
| USART | on-chip | serial |
+-----------+------------+-----------------------------------+
| DMA | on-chip | dma |
+-----------+------------+-----------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-----------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-----------------------------------+
| FLEXSPI | on-chip | flash/memc |
+-----------+------------+-----------------------------------+
| TRNG | on-chip | entropy |
+-----------+------------+-----------------------------------+
| DMIC | on-chip | dmic |
+-----------+------------+-----------------------------------+
| LCDIC | on-chip | mipi-dbi |
+-----------+------------+-----------------------------------+
| WWDT | on-chip | watchdog |
+-----------+------------+-----------------------------------+
| USBOTG | on-chip | usb |
+-----------+------------+-----------------------------------+
| CTIMER | on-chip | counter |
+-----------+------------+-----------------------------------+
| MRT | on-chip | counter |
+-----------+------------+-----------------------------------+
| OS_TIMER | on-chip | os timer |
+-----------+------------+-----------------------------------+
| PM | on-chip | power management; uses SoC Power |
| | | Modes 1 and 2 |
+-----------+------------+-----------------------------------+
| BLE | on-chip | Bluetooth |
+-----------+------------+-----------------------------------+
The default configuration can be found in the defconfig file:
:zephyr_file:`boards/nxp/rd_rw612_bga/rd_rw612_bga_defconfig/`
Other hardware features are not currently supported
Fetch Binary Blobs
******************
To support Bluetooth, rd_rw612_bga requires fetching binary blobs, which can be
achieved by running the following command:
.. code-block:: console
west blobs fetch hal_nxp
Programming and Debugging
*************************
Build and flash applications as usual (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Configuring a Debug Probe
=========================
A debug probe is used for both flashing and debugging the board. This board is
configured by default to use the JLink Firmware.
Configuring a Console
=====================
Connect a USB cable from your PC to J7, and use the serial terminal of your choice
(minicom, putty, etc.) with the following settings:
- Speed: 115200
- Data: 8 bits
- Parity: None
- Stop bits: 1
Flashing
========
Here is an example for the :ref:`hello_world` application. This example uses the
:ref:`jlink-debug-host-tools` as default.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: rd_rw612_bga
:goals: flash
Open a serial terminal, reset the board (press the RESET button), and you should
see the following message in the terminal:
.. code-block:: console
***** Booting Zephyr OS v3.4.0 *****
Hello World! rd_rw612_bga
Debugging
=========
Here is an example for the :ref:`hello_world` application. This example uses the
:ref:`jlink-debug-host-tools` as default.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: rd_rw612_bga
:goals: debug
Open a serial terminal, step through the application in your debugger, and you
should see the following message in the terminal:
.. code-block:: console
***** Booting Zephyr OS zephyr-v3.6.0 *****
Hello World! rd_rw612_bga
Bluetooth
*********
BLE functionality requires to fetch binary blobs, so make sure to follow
the ``Fetch Binary Blobs`` section first.
Those binary blobs can be used in two different ways, depending if :kconfig:option:`CONFIG_NXP_MONOLITHIC_BT`
is enabled or not:
- :kconfig:option:`CONFIG_NXP_MONOLITHIC_BT` is enabled (default):
The required binary blob will be linked with the application image directly, forming
one single monolithic image.
The user has nothing else to do other than flashing the application to the board.
- :kconfig:option:`CONFIG_NXP_MONOLITHIC_BT` is disabled:
In this case, the BLE blob won't be linked with the application, so the user needs to manually
flash the BLE binary blob to the board at the address ``0x18540000``.
The binary blob will be located here: ``<zephyr workspace>/modules/hal/nxp/zephyr/blobs/rw61x/rw61x_sb_ble_a2.bin``
Board variants
**************
Ethernet
========
To use ethernet on the RD_RW612_BGA board, you first need to make the following
modifications to the board hardware:
Add resistors:
- R485
- R486
- R487
- R488
- R489
- R491
- R490
Remove resistors:
- R522
- R521
- R520
- R524
- R523
- R508
- R505
Then, build for the board target `rd_rw612_bga//ethernet`.
Resources
*********
.. _RW612 Website:
path_to_url
``` | /content/code_sandbox/boards/nxp/rd_rw612_bga/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,540 |
```cmake
#
#
#
if(CONFIG_SOC_MIMXRT1176_CM7 OR CONFIG_SECOND_CORE_MCUX)
board_runner_args(pyocd "--target=mimxrt1170_cm7")
board_runner_args(jlink "--device=MIMXRT1176xxxA_M7" "--reset-after-load")
if(${BOARD_REVISION} STREQUAL "A")
board_runner_args(linkserver "--device=MIMXRT1176xxxxx:MIMXRT1170-EVK")
elseif(${BOARD_REVISION} STREQUAL "B")
board_runner_args(linkserver "--device=MIMXRT1176xxxxx:MIMXRT1170-EVKB")
endif()
board_runner_args(linkserver "--core=cm7")
elseif(CONFIG_SOC_MIMXRT1176_CM4)
board_runner_args(pyocd "--target=mimxrt1170_cm4")
# Note: Please use JLINK above V7.50 (Only support run cm4 image when debugging due to default boot core on board is cm7 core)
board_runner_args(jlink "--device=MIMXRT1176xxxA_M4")
if(${BOARD_REVISION} STREQUAL "A")
board_runner_args(linkserver "--device=MIMXRT1176xxxxx:MIMXRT1170-EVK")
elseif(${BOARD_REVISION} STREQUAL "B")
board_runner_args(linkserver "--device=MIMXRT1176xxxxx:MIMXRT1170-EVKB")
endif()
board_runner_args(linkserver "--core=cm4")
endif()
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/linkserver.board.cmake)
``` | /content/code_sandbox/boards/nxp/mimxrt1170_evk/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 370 |
```unknown
#
#
#
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_GPIO=y
CONFIG_ARM_MPU=y
CONFIG_HW_STACK_PROTECTION=y
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/nxp/mimxrt1170_evk/mimxrt1170_evk_mimxrt1176_cm4_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 39 |
```yaml
#
#
#
identifier: mimxrt1170_evk/mimxrt1176/cm4
name: NXP MIMXRT1170-EVK CM4
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 128
flash: 128
supported:
- dma
- gpio
- i2c
- pwm
vendor: nxp
``` | /content/code_sandbox/boards/nxp/mimxrt1170_evk/mimxrt1170_evk_mimxrt1176_cm4.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 102 |
```unknown
choice MCUBOOT_MODE
default MCUBOOT_MODE_SWAP_WITHOUT_SCRATCH if BOARD_MIMXRT1170_EVK_MIMXRT1176_CM7
endchoice
``` | /content/code_sandbox/boards/nxp/mimxrt1170_evk/Kconfig.sysbuild | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 40 |
```yaml
#
#
#
identifier: mimxrt1170_evk@B/mimxrt1176/cm4
name: NXP MIMXRT1170-EVKB CM4
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 128
flash: 128
supported:
- dma
- gpio
- i2c
- spi
- pwm
vendor: nxp
``` | /content/code_sandbox/boards/nxp/mimxrt1170_evk/mimxrt1170_evk_mimxrt1176_cm4_B.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 109 |
```unknown
#
#
config BOARD_MIMXRT1170_EVK
select SOC_PART_NUMBER_MIMXRT1176DVMAA
select SOC_MIMXRT1176_CM7 if BOARD_MIMXRT1170_EVK_MIMXRT1176_CM7
select SOC_MIMXRT1176_CM4 if BOARD_MIMXRT1170_EVK_MIMXRT1176_CM4
``` | /content/code_sandbox/boards/nxp/mimxrt1170_evk/Kconfig.mimxrt1170_evk | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 86 |
```yaml
board:
name: mimxrt1170_evk
vendor: nxp
socs:
- name: mimxrt1176
revision:
format: "letter"
default: "A"
revisions:
- name: "A"
- name: "B"
``` | /content/code_sandbox/boards/nxp/mimxrt1170_evk/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 66 |
```unknown
/*
*
*/
/ {
chosen {
/delete-property/ zephyr,flash-controller;
/delete-property/ zephyr,code-partition;
};
aliases {
/delete-property/ magn0;
/delete-property/ accel0;
};
};
&flexspi {
/* RT1170 EVKB uses a different QSPI flash chip */
/delete-node/ is25wp128@0;
status = "okay";
reg = <0x400cc000 0x4000>, <0x30000000 DT_SIZE_M(64)>;
w25q512nw:w25q512nw@0 {
compatible = "nxp,imx-flexspi-nor";
size = <DT_SIZE_M(64*8)>;
reg = <0>;
spi-max-frequency = <133000000>;
status = "okay";
jedec-id = [ef 60 20];
erase-block-size = <4096>;
write-block-size = <1>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 DT_SIZE_K(128)>;
};
/* The MCUBoot swap-move algorithm uses the last 3 sectors
* of the primary slot0 for swap status and move.
*/
slot0_partition: partition@20000 {
label = "image-0";
reg = <0x00020000 (DT_SIZE_M(7) + DT_SIZE_K(12))>;
};
slot1_partition: partition@723000 {
label = "image-1";
reg = <0x00723000 DT_SIZE_M(7)>;
};
storage_partition: partition@E23000 {
label = "storage";
reg = <0x00E23000 (DT_SIZE_M(50) - DT_SIZE_K(140))>;
};
};
};
};
&lpspi1 {
dmas = <&edma_lpsr0 0 36>, <&edma_lpsr0 1 37>;
dma-names = "rx", "tx";
status = "okay";
};
&lpi2c5 {
/* FXOS accelerometer is not present in this board */
/delete-node/ fxos8700@1f;
};
/* Disable ethernet, as PHY is not supported */
&enet {
status = "disabled";
};
``` | /content/code_sandbox/boards/nxp/mimxrt1170_evk/mimxrt1170_evk_mimxrt1176_cm4_B.overlay | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 550 |
```unknown
/*
*
*/
/dts-v1/;
#include <nxp/nxp_rt11xx_cm4.dtsi>
#include "mimxrt1170_evk.dtsi"
/ {
model = "NXP MIMXRT1170-EVK board";
compatible = "nxp,mimxrt1176";
chosen {
/*
* Note: when using DMA, the SRAM region must be set to
* a memory region that is not cached by the chip. If the chosen
* sram region is changed and DMA is in use, you will
* encounter issues!
*/
zephyr,sram = &sram1;
zephyr,console = &lpuart1;
zephyr,shell-uart = &lpuart1;
zephyr,canbus = &flexcan2;
zephyr,flash-controller = &is25wp128;
zephyr,flash = &sram0;
nxp,m4-partition = &slot1_partition;
zephyr,ipc = &mailbox_b;
};
sdram0: memory@80000000 {
/* Winbond W9825G6KH-5I */
device_type = "memory";
reg = <0x80000000 DT_SIZE_M(64)>;
};
};
&lpuart1 {
status = "okay";
current-speed = <115200>;
};
&lpi2c1 {
status = "okay";
};
/* GPT and Systick are enabled. If power management is enabled, the GPT
* timer will be used instead of systick, as allows the core clock to
* be gated.
*/
&gpt_hw_timer {
status = "okay";
};
&systick {
status = "okay";
};
&sai1 {
status = "okay";
};
&edma_lpsr0 {
status = "okay";
};
&mailbox_b {
status = "okay";
};
``` | /content/code_sandbox/boards/nxp/mimxrt1170_evk/mimxrt1170_evk_mimxrt1176_cm4.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 416 |
```yaml
#
#
#
identifier: mimxrt1170_evk/mimxrt1176/cm7
name: NXP MIMXRT1170-EVK CM7
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 256
flash: 16384
supported:
- adc
- counter
- can
- dma
- gpio
- hwinfo
- i2c
- mipi_dsi
- netif:eth
- pwm
- spi
- usb_device
- watchdog
- video
- usbd
vendor: nxp
``` | /content/code_sandbox/boards/nxp/mimxrt1170_evk/mimxrt1170_evk_mimxrt1176_cm7.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 156 |
```unknown
# MIMXRT1170-EVK board
if BOARD_MIMXRT1170_EVK
# Use External Memory Configuration Data (XMCD) by default when booting primary core (M7)
config EXTERNAL_MEM_CONFIG_DATA
default y if CPU_CORTEX_M7
config NXP_IMX_EXTERNAL_SDRAM
default y if CPU_CORTEX_M7
if SECOND_CORE_MCUX && CPU_CORTEX_M4
config BUILD_OUTPUT_INFO_HEADER
default y
DT_CHOSEN_IMAGE_M4 = nxp,m4-partition
# Adjust the offset of the output image if building for RT11xx SOC
config BUILD_OUTPUT_ADJUST_LMA
default "($(dt_chosen_reg_addr_hex,$(DT_CHOSEN_IMAGE_M4)) + \
$(dt_node_reg_addr_hex,/soc/spi@400cc000,1)) - \
$(dt_node_reg_addr_hex,/soc/ocram@20200000)"
endif
if DISK_DRIVERS
config IMX_USDHC_DAT3_PWR_TOGGLE
default y
endif # DISK_DRIVERS
if FLASH_MCUX_FLEXSPI_XIP && MEMC_MCUX_FLEXSPI
choice FLASH_MCUX_FLEXSPI_XIP_MEM_TARGET
default FLASH_MCUX_FLEXSPI_XIP_MEM_ITCM if CPU_CORTEX_M7
default FLASH_MCUX_FLEXSPI_XIP_MEM_SRAM if CPU_CORTEX_M4
endchoice
endif # FLASH_MCUX_FLEXSPI_XIP && MEMC_MCUX_FLEXSPI
if NETWORKING
config NET_L2_ETHERNET
default y if CPU_CORTEX_M7 # No cache memory support is required for driver
config ETH_MCUX_PHY_RESET
default y
endif # NETWORKING
endif
``` | /content/code_sandbox/boards/nxp/mimxrt1170_evk/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 360 |
```unknown
/*
*
*/
/dts-v1/;
#include <nxp/nxp_rt11xx_cm7.dtsi>
#include "mimxrt1170_evk.dtsi"
/ {
model = "NXP MIMXRT1170-EVK board";
compatible = "nxp,mimxrt1176";
aliases {
mipi-dsi = &mipi_dsi;
watchdog0 = &wdog1;
};
chosen {
zephyr,sram = &sdram0;
zephyr,dtcm = &dtcm;
zephyr,itcm = &itcm;
zephyr,console = &lpuart1;
zephyr,shell-uart = &lpuart1;
zephyr,canbus = &flexcan3;
zephyr,flash-controller = &is25wp128;
zephyr,flash = &is25wp128;
zephyr,code-partition = &slot0_partition;
zephyr,cpu1-region = &ocram;
zephyr,ipc = &mailbox_a;
};
sdram0: memory@80000000 {
/* Winbond W9825G6KH-5I */
device_type = "memory";
reg = <0x80000000 DT_SIZE_M(64)>;
};
/*
* This node describes the GPIO pins of the MIPI FPC interface,
* J48 on the EVK. This interface is standard to several
* NXP EVKs, and is used with several MIPI displays
* (available as zephyr shields)
*/
nxp_mipi_connector: mipi-connector {
compatible = "gpio-nexus";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpio9 29 0>, /* Pin 1, LEDK */
<21 0 &gpio9 1 0>, /* Pin 21, RESET */
<22 0 &gpio9 4 0>, /* Pin 22, LPTE */
<26 0 &gpio6 4 0>, /* Pin 26, CTP_I2C SDA */
<27 0 &gpio6 5 0>, /* Pin 27, CTP_I2C SCL */
<28 0 &gpio9 0 0>, /* Pin 28, CTP_RST */
<29 0 &gpio2 31 0>, /* Pin 29, CTP_INT */
<32 0 &gpio11 16 0>, /* Pin 32, PWR_EN */
<34 0 &gpio9 29 0>; /* Pin 34, BL_PWM */
};
/*
* This node describes the GPIO pins mapping of the 44-pin camera
* connector, J2 on the EVK. This camera interface is supported
* on several NXP RT11xx EVKs, such as RT1170 and RT1160 EVK and
* is used with an ov5640 camera module available as a Zephyr shield
*/
nxp_cam_connector: cam-connector {
compatible = "nxp,cam-44pins-connector";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <9 0 &gpio11 15 0>, /* Pin 9, RESETB */
<17 0 &gpio9 25 0>; /* Pin 17, PWDN */
};
};
zephyr_lcdif: &lcdif {};
zephyr_mipi_dsi: &mipi_dsi {
dphy-ref-frequency = <24000000>;
};
&lpuart1 {
status = "okay";
current-speed = <115200>;
};
&flexcan3 {
status = "okay";
can-transceiver {
max-bitrate = <5000000>;
};
};
&lpspi1 {
dmas = <&edma0 0 36>, <&edma0 1 37>;
dma-names = "rx", "tx";
status = "okay";
};
nxp_mipi_i2c: &lpi2c5 {
pinctrl-0 = <&pinmux_lpi2c5>;
pinctrl-names = "default";
#address-cells = <1>;
#size-cells = <0>;
};
&lpadc0 {
status = "okay";
};
&usdhc1 {
status = "okay";
detect-dat3;
pwr-gpios = <&gpio10 2 GPIO_ACTIVE_LOW>;
sdmmc {
compatible = "zephyr,sdmmc-disk";
status = "okay";
};
};
&edma0 {
status = "okay";
};
/* GPT and Systick are enabled. If power management is enabled, the GPT
* timer will be used instead of systick, as allows the core clock to
* be gated.
*/
&gpt_hw_timer {
status = "okay";
};
&systick {
status = "okay";
};
&wdog1 {
status = "okay";
};
&sai1 {
status = "okay";
};
zephyr_udc0: &usb1 {
status = "okay";
phy_handle = <&usbphy1>;
};
&usbphy1 {
status = "okay";
tx-d-cal = <7>;
tx-cal-45-dp-ohms = <6>;
tx-cal-45-dm-ohms = <6>;
};
&mailbox_a {
status = "okay";
};
&pit1 {
status = "okay";
};
&pit2 {
status = "okay";
};
nxp_cam_i2c: &lpi2c6 {};
nxp_mipi_csi: &mipi_csi2rx {};
nxp_csi: &csi {};
``` | /content/code_sandbox/boards/nxp/mimxrt1170_evk/mimxrt1170_evk_mimxrt1176_cm7.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,329 |
```unknown
/*
*
* Note: File generated by gen_board_pinctrl.py
* from mimxrt1170_evk.mex
*/
#include <nxp/nxp_imx/rt/mimxrt1176dvmaa-pinctrl.dtsi>
&pinctrl {
/* conflicts with fxos8700 sensor */
pinmux_csi: pinmux_csi {
group0 {
pinmux = <&iomuxc_gpio_disp_b2_14_gpio11_io15>;
drive-strength = "high";
bias-pull-down;
slew-rate = "fast";
};
group1 {
pinmux = <&iomuxc_gpio_ad_26_gpio9_io25>;
drive-strength = "high";
bias-pull-up;
slew-rate = "fast";
};
};
pinmux_lpi2c6: pinmux_lpi2c6 {
group0 {
pinmux = <&iomuxc_lpsr_gpio_lpsr_07_lpi2c6_scl>,
<&iomuxc_lpsr_gpio_lpsr_06_lpi2c6_sda>;
drive-strength = "high";
slew-rate = "fast";
input-enable;
};
};
pinmux_enet: pinmux_enet {
group0 {
pinmux = <&iomuxc_gpio_ad_12_gpio9_io11>,
<&iomuxc_gpio_disp_b2_08_enet_rx_en>,
<&iomuxc_gpio_disp_b2_09_enet_rx_er>;
drive-strength = "high";
bias-pull-down;
slew-rate = "fast";
};
group1 {
pinmux = <&iomuxc_gpio_disp_b2_06_enet_rdata00>,
<&iomuxc_gpio_disp_b2_07_enet_rdata01>;
drive-strength = "high";
bias-pull-down;
slew-rate = "fast";
input-enable;
};
group2 {
pinmux = <&iomuxc_lpsr_gpio_lpsr_12_gpio12_io12>;
drive-strength = "high";
bias-pull-up;
slew-rate = "fast";
};
group3 {
pinmux = <&iomuxc_gpio_disp_b2_02_enet_tdata00>,
<&iomuxc_gpio_disp_b2_03_enet_tdata01>,
<&iomuxc_gpio_disp_b2_04_enet_tx_en>;
drive-strength = "high";
slew-rate = "fast";
};
group4 {
pinmux = <&iomuxc_gpio_disp_b2_05_enet_ref_clk>;
drive-strength = "high";
slew-rate = "slow";
input-enable;
};
};
pinmux_enet_mdio: pinmux_enet_mdio {
group0 {
pinmux = <&iomuxc_gpio_ad_32_enet_mdc>,
<&iomuxc_gpio_ad_33_enet_mdio>;
drive-strength = "high";
slew-rate = "fast";
};
};
pinmux_ptp: pinmux_ptp {
};
pinmux_enet1g: pinmux_enet1g {
group0 {
pinmux = <&iomuxc_gpio_disp_b1_11_enet_1g_tx_clk_io>, // ENET_RGMII_TXC
<&iomuxc_gpio_disp_b1_01_enet_1g_rx_clk>; // ENET_RGMII_RXC
bias-disable;
drive-strength = "high";
slew-rate = "fast";
input-enable;
};
group1 {
pinmux = <&iomuxc_gpio_disp_b1_09_enet_1g_tdata00>, // ENET_RGMII_TXD0
<&iomuxc_gpio_disp_b1_08_enet_1g_tdata01>, // ENET_RGMII_TXD1
<&iomuxc_gpio_disp_b1_07_enet_1g_tdata02>, // ENET_RGMII_TXD2
<&iomuxc_gpio_disp_b1_06_enet_1g_tdata03>, // ENET_RGMII_TXD3
<&iomuxc_gpio_disp_b1_10_enet_1g_tx_en>; // ENET_RGMII_TX_EN
drive-strength = "high";
bias-pull-up;
slew-rate = "fast";
};
group2 {
pinmux = <&iomuxc_gpio_disp_b1_02_enet_1g_rdata00>, // ENET_RGMII_RXD0
<&iomuxc_gpio_disp_b1_03_enet_1g_rdata01>, // ENET_RGMII_RXD1
<&iomuxc_gpio_disp_b1_04_enet_1g_rdata02>, // ENET_RGMII_RXD2
<&iomuxc_gpio_disp_b1_05_enet_1g_rdata03>, // ENET_RGMII_RXD3
<&iomuxc_gpio_disp_b1_00_enet_1g_rx_en>; // ENET_RGMII_RX_EN
drive-strength = "high";
bias-pull-down;
slew-rate = "fast";
input-enable;
};
};
pinmux_enet1g_mdio: pinmux_enet1g_mdio {
group0 {
pinmux = <&iomuxc_gpio_disp_b2_13_gpio11_io14>; // ETHPHY_RST_B
drive-strength = "high";
bias-pull-down;
slew-rate = "slow";
};
group1 {
pinmux = <&iomuxc_gpio_disp_b2_12_gpio_mux5_io13>; // RGMII1_PHY_INTB
drive-strength = "high";
bias-pull-down;
slew-rate = "fast";
input-enable;
};
group2 {
pinmux = <&iomuxc_gpio_emc_b2_19_enet_1g_mdc>, // ENET_RGMII_MDC
<&iomuxc_gpio_emc_b2_20_enet_1g_mdio>; // ENET_RGMII_MDIO
drive-strength = "high";
bias-pull-down;
slew-rate = "fast";
};
};
pinmux_enet1g_ptp: pinmux_enet1g_ptp {
};
pinmux_flexcan3: pinmux_flexcan3 {
group0 {
pinmux = <&iomuxc_lpsr_gpio_lpsr_01_can3_rx>,
<&iomuxc_lpsr_gpio_lpsr_00_can3_tx>;
drive-strength = "high";
slew-rate = "fast";
};
};
pinmux_flexpwm1: pinmux_flexpwm1 {
group0 {
pinmux = <&iomuxc_gpio_ad_04_flexpwm1_pwm2_a>;
drive-strength = "high";
slew-rate = "fast";
};
};
pinmux_flexspi1: pinmux_flexspi1 {
group0 {
pinmux = <&iomuxc_gpio_sd_b2_05_flexspi1_a_dqs>,
<&iomuxc_gpio_sd_b2_06_flexspi1_a_ss0_b>,
<&iomuxc_gpio_sd_b2_07_flexspi1_a_sclk>,
<&iomuxc_gpio_sd_b2_08_flexspi1_a_data00>,
<&iomuxc_gpio_sd_b2_09_flexspi1_a_data01>,
<&iomuxc_gpio_sd_b2_10_flexspi1_a_data02>,
<&iomuxc_gpio_sd_b2_11_flexspi1_a_data03>;
bias-pull-down;
input-enable;
};
};
/* interrupt gpios for fxos8700 */
pinmux_fxos8700_int: pinmux_fxos8700_int {
group0 {
pinmux = <&iomuxc_gpio_disp_b2_14_gpio11_io15>,
<&iomuxc_gpio_disp_b2_13_gpio11_io14>;
drive-strength = "high";
slew-rate = "fast";
};
};
/* conflicts with lpspi1 */
pinmux_lcdif: pinmux_lcdif {
group0 {
pinmux = <&iomuxc_gpio_ad_30_gpio9_io29>,
<&iomuxc_gpio_ad_02_gpio9_io01>;
drive-strength = "high";
bias-pull-down;
slew-rate = "fast";
};
group1 {
pinmux = <&iomuxc_gpio_disp_b2_15_gpio11_io16>;
drive-strength = "high";
bias-pull-up;
slew-rate = "fast";
};
};
pinmux_lpadc0: pinmux_lpadc0 {
group0 {
pinmux = <&iomuxc_gpio_ad_06_adc1_ch0a>;
drive-strength = "high";
bias-pull-down;
slew-rate = "fast";
};
};
pinmux_lpi2c1: pinmux_lpi2c1 {
group0 {
pinmux = <&iomuxc_gpio_ad_08_lpi2c1_scl>,
<&iomuxc_gpio_ad_09_lpi2c1_sda>;
drive-strength = "normal";
drive-open-drain;
slew-rate = "fast";
input-enable;
};
};
/* Connected to FXOS8700 */
pinmux_lpi2c5: pinmux_lpi2c5 {
group0 {
pinmux = <&iomuxc_lpsr_gpio_lpsr_05_lpi2c5_scl>,
<&iomuxc_lpsr_gpio_lpsr_04_lpi2c5_sda>;
drive-strength = "normal";
drive-open-drain;
slew-rate = "fast";
input-enable;
};
};
pinmux_lpspi1: pinmux_lpspi1 {
group0 {
pinmux = <&iomuxc_gpio_ad_29_lpspi1_pcs0>,
<&iomuxc_gpio_ad_28_lpspi1_sck>,
<&iomuxc_gpio_ad_31_lpspi1_sdi>,
<&iomuxc_gpio_ad_30_lpspi1_sdo>;
drive-strength = "high";
slew-rate = "fast";
};
};
pinmux_lpuart1: pinmux_lpuart1 {
group0 {
pinmux = <&iomuxc_gpio_ad_25_lpuart1_rx>,
<&iomuxc_gpio_ad_24_lpuart1_tx>;
drive-strength = "high";
slew-rate = "fast";
};
};
pinmux_lpuart1_sleep: pinmux_lpuart1_sleep {
group0 {
pinmux = <&iomuxc_gpio_ad_25_gpio_mux3_io24>;
drive-strength = "high";
bias-pull-up;
slew-rate = "fast";
};
group1 {
pinmux = <&iomuxc_gpio_ad_24_lpuart1_tx>;
drive-strength = "high";
slew-rate = "fast";
};
};
pinmux_lpuart2: pinmux_lpuart2 {
group0 {
pinmux = <&iomuxc_gpio_disp_b2_11_lpuart2_rx>,
<&iomuxc_gpio_disp_b2_10_lpuart2_tx>;
drive-strength = "high";
slew-rate = "fast";
};
};
pinmux_lpuart2_sleep: pinmux_lpuart2_sleep {
group0 {
pinmux = <&iomuxc_gpio_disp_b2_11_gpio_mux5_io12>;
drive-strength = "high";
bias-pull-up;
slew-rate = "fast";
};
group1 {
pinmux = <&iomuxc_gpio_disp_b2_10_lpuart2_tx>;
drive-strength = "high";
slew-rate = "fast";
};
};
pinmux_lpuart2_flowcontrol: pinmux_lpuart2_flowcontrol {
group0 {
pinmux = <&iomuxc_gpio_disp_b2_11_lpuart2_rx>,
<&iomuxc_gpio_disp_b2_10_lpuart2_tx>,
<&iomuxc_gpio_disp_b2_12_lpuart2_cts_b>,
<&iomuxc_gpio_disp_b2_13_lpuart2_rts_b>;
drive-strength = "high";
slew-rate = "fast";
};
};
pinmux_sai1: pinmux_sai1 {
group0 {
pinmux = <&iomuxc_gpio_ad_17_sai1_mclk>,
<&iomuxc_gpio_ad_18_sai1_rx_sync>,
<&iomuxc_gpio_ad_19_sai1_rx_bclk>,
<&iomuxc_gpio_ad_20_sai1_rx_data00>,
<&iomuxc_gpio_ad_21_sai1_tx_data00>,
<&iomuxc_gpio_ad_22_sai1_tx_bclk>,
<&iomuxc_gpio_ad_23_sai1_tx_sync>;
drive-strength = "high";
slew-rate = "fast";
input-enable;
};
};
pinmux_sai4: pinmux_sai4 {
group0 {
pinmux = <&iomuxc_lpsr_gpio_lpsr_09_sai4_tx_data>,
<&iomuxc_lpsr_gpio_lpsr_10_sai4_tx_sync>,
<&iomuxc_lpsr_gpio_lpsr_12_sai4_tx_bclk>;
drive-strength = "high";
slew-rate = "fast";
input-enable;
};
};
/* conflicts with enet pins */
pinmux_usdhc1: pinmux_usdhc1 {
group0 {
pinmux = <&iomuxc_gpio_sd_b1_00_usdhc1_cmd>,
<&iomuxc_gpio_sd_b1_01_usdhc1_clk>,
<&iomuxc_gpio_sd_b1_02_usdhc1_data0>,
<&iomuxc_gpio_sd_b1_03_usdhc1_data1>,
<&iomuxc_gpio_sd_b1_04_usdhc1_data2>,
<&iomuxc_gpio_sd_b1_05_usdhc1_data3>;
bias-pull-up;
input-enable;
};
group1 {
pinmux = <&iomuxc_gpio_ad_34_usdhc1_vselect>,
<&iomuxc_gpio_ad_32_gpio_mux3_io31_cm7>;
drive-strength = "high";
bias-pull-down;
slew-rate = "fast";
};
group2 {
pinmux = <&iomuxc_gpio_ad_35_gpio10_io02>;
drive-strength = "high";
bias-pull-up;
slew-rate = "fast";
};
};
/* removes pull on dat3 for card detect */
pinmux_usdhc1_dat3_nopull: pinmux_usdhc1_dat3_nopull {
group0 {
pinmux = <&iomuxc_gpio_sd_b1_05_usdhc1_data3>;
bias-disable;
input-enable;
};
group1 {
pinmux = <&iomuxc_gpio_sd_b1_00_usdhc1_cmd>,
<&iomuxc_gpio_sd_b1_01_usdhc1_clk>,
<&iomuxc_gpio_sd_b1_02_usdhc1_data0>,
<&iomuxc_gpio_sd_b1_03_usdhc1_data1>,
<&iomuxc_gpio_sd_b1_04_usdhc1_data2>;
bias-pull-up;
input-enable;
};
group2 {
pinmux = <&iomuxc_gpio_ad_34_usdhc1_vselect>,
<&iomuxc_gpio_ad_32_gpio_mux3_io31_cm7>;
drive-strength = "high";
bias-pull-down;
slew-rate = "fast";
};
group3 {
pinmux = <&iomuxc_gpio_ad_35_gpio10_io02>;
drive-strength = "high";
bias-pull-up;
slew-rate = "fast";
};
};
};
``` | /content/code_sandbox/boards/nxp/mimxrt1170_evk/mimxrt1170_evk-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 3,827 |
```yaml
#
#
#
identifier: mimxrt1170_evk@B/mimxrt1176/cm7
name: NXP MIMXRT1170-EVKB CM7
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 65536
flash: 65536
supported:
- adc
- counter
- can
- dma
- gpio
- hwinfo
- i2c
- mipi_dsi
- spi
- usb_device
- watchdog
- video
vendor: nxp
``` | /content/code_sandbox/boards/nxp/mimxrt1170_evk/mimxrt1170_evk_mimxrt1176_cm7_B.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 144 |
```unknown
/*
*
* ENET_1G binding overlay
*/
/ {
soc {
/delete-node/ ethernet@40424000;
};
};
&enet1g {
status = "okay";
};
&enet1g_mac {
status = "okay";
};
&enet1g_mdio {
status = "okay";
enet1g_phy: phy@1 {
status = "okay";
};
};
&enet1g_ptp_clock {
status = "okay";
};
&pinctrl {
/delete-node/ pinmux_enet;
/delete-node/ pinmux_enet_mdio;
/delete-node/ pinmux_ptp;
};
``` | /content/code_sandbox/boards/nxp/mimxrt1170_evk/dts/nxp,enet1g.overlay | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 134 |
```unknown
/*
*
*/
#include "mimxrt1170_evk-pinctrl.dtsi"
#include <nxp/nxp_rt1170.dtsi>
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
aliases {
led0 = &green_led;
led1 = &red_led;
sw0 = &user_button;
magn0 = &fxos8700;
accel0 = &fxos8700;
sdhc0 = &usdhc1;
pwm-led0 = &green_pwm_led;
};
leds {
compatible = "gpio-leds";
green_led: led-1 {
gpios = <&gpio9 3 GPIO_ACTIVE_HIGH>;
label = "User LED D6";
};
red_led: led-2 {
gpios = <&gpio9 25 GPIO_ACTIVE_LOW>;
label = "User LED D34";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button-1 {
label = "User SW7";
gpios = <&gpio13 0 GPIO_ACTIVE_HIGH>;
zephyr,code = <INPUT_KEY_0>;
};
};
pwmleds {
compatible = "pwm-leds";
green_pwm_led: green_pwm_led {
pwms = <&flexpwm1_pwm2 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
};
};
};
&lpi2c5 {
status = "okay";
pinctrl-0 = <&pinmux_lpi2c5>;
pinctrl-names = "default";
fxos8700: fxos8700@1f {
compatible = "nxp,fxos8700";
reg = <0x1f>;
/* Two zero ohm resistors (R256 and R270) isolate sensor
* interrupt gpios from the soc and are unpopulated by default.
* Note that if you populate them, they conflict with camera and
* ethernet PHY reset signals.
*/
int1-gpios = <&gpio11 14 GPIO_ACTIVE_LOW>;
int2-gpios = <&gpio11 15 GPIO_ACTIVE_LOW>;
};
};
&lpuart1 {
status = "okay";
pinctrl-0 = <&pinmux_lpuart1>;
pinctrl-1 = <&pinmux_lpuart1_sleep>;
pinctrl-names = "default", "sleep";
current-speed = <115200>;
};
&lpuart2 {
pinctrl-0 = <&pinmux_lpuart2>;
pinctrl-1 = <&pinmux_lpuart2_sleep>;
pinctrl-names = "default", "sleep";
};
&user_button {
status = "okay";
};
&green_led {
status = "okay";
};
&flexpwm1_pwm2 {
status = "okay";
pinctrl-0 = <&pinmux_flexpwm1>;
pinctrl-names = "default";
};
&enet_mac {
status = "okay";
pinctrl-0 = <&pinmux_enet>;
pinctrl-names = "default";
phy-handle = <&phy>;
phy-connection-type = "rmii";
zephyr,random-mac-address;
};
&enet_mdio {
status = "okay";
pinctrl-0 = <&pinmux_enet_mdio>;
pinctrl-names = "default";
phy: phy@0 {
compatible = "microchip,ksz8081";
reg = <0>;
status = "okay";
reset-gpios = <&gpio12 12 GPIO_ACTIVE_HIGH>;
int-gpios = <&gpio9 11 GPIO_ACTIVE_HIGH>;
microchip,interface-type = "rmii";
};
};
&enet_ptp_clock {
status = "okay";
pinctrl-0 = <&pinmux_ptp>;
pinctrl-names = "default";
};
&enet1g_mac {
status = "disabled";
pinctrl-0 = <&pinmux_enet1g>;
pinctrl-names = "default";
phy-handle = <&enet1g_phy>;
phy-connection-type = "rgmii";
zephyr,random-mac-address;
};
&enet1g_mdio {
status = "disabled";
pinctrl-0 = <&pinmux_enet1g_mdio>;
pinctrl-names = "default";
enet1g_phy: phy@1 {
compatible = "realtek,rtl8211f";
reg = <1>;
status = "disabled";
reset-gpios = <&gpio11 14 GPIO_ACTIVE_HIGH>;
int-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
};
};
&enet1g_ptp_clock {
status = "disabled";
pinctrl-0 = <&pinmux_enet1g_ptp>;
pinctrl-names = "default";
};
&csi {
pinctrl-0 = <&pinmux_csi>;
pinctrl-names = "default";
};
&lpi2c6 {
pinctrl-0 = <&pinmux_lpi2c6>;
pinctrl-names = "default";
};
&flexcan3 {
pinctrl-0 = <&pinmux_flexcan3>;
pinctrl-names = "default";
};
&lcdif {
pinctrl-0 = <&pinmux_lcdif>;
pinctrl-names = "default";
};
&lpi2c1 {
pinctrl-0 =<&pinmux_lpi2c1>;
pinctrl-names = "default";
};
&lpspi1 {
pinctrl-0 = <&pinmux_lpspi1>;
pinctrl-names = "default";
};
&lpuart2 {
pinctrl-0 = <&pinmux_lpuart2>;
pinctrl-1 = <&pinmux_lpuart2_sleep>;
pinctrl-names = "default", "sleep";
};
&sai1 {
pinctrl-0 = <&pinmux_sai1>;
pinctrl-names = "default";
};
&lpadc0 {
pinctrl-0 = <&pinmux_lpadc0>;
pinctrl-names = "default";
};
&flexspi {
pinctrl-0 = <&pinmux_flexspi1>;
pinctrl-names = "default";
};
&usdhc1 {
pinctrl-0 = <&pinmux_usdhc1>;
pinctrl-1 = <&pinmux_usdhc1_dat3_nopull>;
pinctrl-names = "default", "nopull";
};
&flexspi {
status = "okay";
ahb-prefetch;
ahb-read-addr-opt;
rx-clock-source = <1>;
reg = <0x400cc000 0x4000>, <0x30000000 DT_SIZE_M(16)>;
is25wp128: is25wp128@0 {
compatible = "nxp,imx-flexspi-nor";
size = <DT_SIZE_M(16*8)>;
reg = <0>;
spi-max-frequency = <133000000>;
status = "okay";
jedec-id = [9d 70 17];
erase-block-size = <4096>;
write-block-size = <1>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 DT_SIZE_K(128)>;
};
/* The MCUBoot swap-move algorithm uses the last 3 sectors
* of the primary slot0 for swap status and move.
*/
slot0_partition: partition@20000 {
label = "image-0";
reg = <0x00020000 (DT_SIZE_M(7) + DT_SIZE_K(12))>;
};
slot1_partition: partition@723000 {
label = "image-1";
reg = <0x00723000 DT_SIZE_M(7)>;
};
storage_partition: partition@E23000 {
label = "storage";
reg = <0x00E23000 (DT_SIZE_M(2) - DT_SIZE_K(140))>;
};
};
};
};
&pxp {
status = "okay";
};
``` | /content/code_sandbox/boards/nxp/mimxrt1170_evk/mimxrt1170_evk.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,832 |
```cmake
board_runner_args(jlink
"--device=S32K146"
"--speed=4000"
"--iface=swd"
"--reset"
)
board_runner_args(trace32
"--startup-args" "elfFile=${PROJECT_BINARY_DIR}/${KERNEL_ELF_NAME}"
)
if(${CONFIG_XIP})
board_runner_args(trace32 "loadTo=flash")
else()
board_runner_args(trace32 "loadTo=sram")
endif()
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
include(${ZEPHYR_BASE}/boards/common/trace32.board.cmake)
``` | /content/code_sandbox/boards/nxp/ucans32k1sic/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 128 |
```yaml
identifier: ucans32k1sic
name: NXP UCANS32K1SIC
vendor: nxp
type: mcu
arch: arm
ram: 124
flash: 1024
toolchain:
- zephyr
supported:
- mpu
- gpio
- uart
- pinctrl
- i2c
- spi
- pwm
- can
- watchdog
- counter
``` | /content/code_sandbox/boards/nxp/ucans32k1sic/ucans32k1sic.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 104 |
```unknown
/*
*
*/
/dts-v1/;
#include <zephyr/dt-bindings/gpio/gpio.h>
#include <zephyr/dt-bindings/input/input-event-codes.h>
#include <zephyr/dt-bindings/pwm/pwm.h>
#include <arm/nxp/nxp_s32k146.dtsi>
#include "ucans32k1sic-pinctrl.dtsi"
/ {
model = "NXP UCANS32K1SIC";
compatible = "nxp,ucans32k1sic";
chosen {
zephyr,sram = &sram_l;
zephyr,flash = &flash0;
zephyr,console = &lpuart1;
zephyr,shell-uart = &lpuart1;
zephyr,uart-pipe = &lpuart1;
zephyr,canbus = &flexcan0;
};
aliases {
led0 = &led1_red;
led1 = &led1_green;
led2 = &led1_blue;
pwm-led0 = &led1_red_pwm;
pwm-led1 = &led1_green_pwm;
pwm-led2 = &led1_blue_pwm;
red-pwm-led = &led1_red_pwm;
green-pwm-led = &led1_green_pwm;
blue-pwm-led = &led1_blue_pwm;
pwm-0 = &ftm0;
sw0 = &button_3;
i2c-0 = &lpi2c0;
};
leds {
compatible = "gpio-leds";
led1_red: led_0 {
gpios = <&gpiod 15 GPIO_ACTIVE_LOW>;
label = "LED1_RGB_RED";
};
led1_green: led_1 {
gpios = <&gpiod 16 GPIO_ACTIVE_LOW>;
label = "LED1_RGB_GREEN";
};
led1_blue: led_2 {
gpios = <&gpiod 0 GPIO_ACTIVE_LOW>;
label = "LED1_RGB_BLUE";
};
};
pwmleds {
compatible = "pwm-leds";
led1_red_pwm: led_pwm_0 {
pwms = <&ftm0 0 PWM_MSEC(20) PWM_POLARITY_INVERTED>;
label = "LED1_RGB_RED_PWM";
};
led1_green_pwm: led_pwm_1 {
pwms = <&ftm0 1 PWM_MSEC(20) PWM_POLARITY_INVERTED>;
label = "LED1_RGB_GREEN_PWM";
};
led1_blue_pwm: led_pwm_2 {
pwms = <&ftm0 2 PWM_MSEC(20) PWM_POLARITY_INVERTED>;
label = "LED1_RGB_BLUE_PWM";
};
};
gpio_keys {
compatible = "gpio-keys";
button_3: button_0 {
label = "SW3";
gpios = <&gpioc 14 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_0>;
};
};
can_phy0: can-phy0 {
compatible = "nxp,tja1463", "nxp,tja1443", "nxp,tja1153", "can-transceiver-gpio";
enable-gpios = <&gpioa 10 GPIO_ACTIVE_HIGH>;
max-bitrate = <8000000>;
#phy-cells = <0>;
};
can_phy1: can-phy1 {
compatible = "nxp,tja1463", "nxp,tja1443", "nxp,tja1153", "can-transceiver-gpio";
enable-gpios = <&gpioe 2 GPIO_ACTIVE_HIGH>;
max-bitrate = <8000000>;
#phy-cells = <0>;
};
};
&cpu0 {
clock-frequency = <80000000>;
};
&gpioa {
status = "okay";
};
&gpiob {
status = "okay";
};
&gpioc {
status = "okay";
};
&gpiod {
status = "okay";
};
&gpioe {
status = "okay";
};
&lpuart0 {
pinctrl-0 = <&lpuart0_default>;
pinctrl-names = "default";
current-speed = <115200>;
};
&lpuart1 {
pinctrl-0 = <&lpuart1_default>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&lpi2c0 {
pinctrl-0 = <&lpi2c0_default>;
pinctrl-names = "default";
scl-gpios = <&gpioa 3 GPIO_ACTIVE_HIGH>;
sda-gpios = <&gpioa 2 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&lpspi0 {
pinctrl-0 = <&lpspi0_default>;
pinctrl-names = "default";
status = "okay";
};
&ftm0 {
compatible = "nxp,kinetis-ftm-pwm";
pinctrl-0 = <&ftm0_default>;
pinctrl-names = "default";
clock-source = "system";
prescaler = <4>;
#pwm-cells = <3>;
status = "okay";
};
&ftm1 {
compatible = "nxp,kinetis-ftm-pwm";
pinctrl-0 = <&ftm1_default>;
pinctrl-names = "default";
clock-source = "system";
prescaler = <4>;
#pwm-cells = <3>;
status = "okay";
};
&ftm2 {
compatible = "nxp,kinetis-ftm-pwm";
pinctrl-0 = <&ftm2_default>;
pinctrl-names = "default";
clock-source = "system";
prescaler = <4>;
#pwm-cells = <3>;
status = "okay";
};
&flexcan0 {
pinctrl-0 = <&flexcan0_default>;
pinctrl-names = "default";
phys = <&can_phy0>;
status = "okay";
};
&flexcan1 {
pinctrl-0 = <&flexcan1_default>;
pinctrl-names = "default";
phys = <&can_phy1>;
status = "okay";
};
``` | /content/code_sandbox/boards/nxp/ucans32k1sic/ucans32k1sic.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,393 |
```unknown
CONFIG_BUILD_OUTPUT_HEX=y
# Run from internal program flash
CONFIG_XIP=y
# Enable MPU
CONFIG_ARM_MPU=y
CONFIG_PINCTRL=y
CONFIG_SERIAL=y
CONFIG_CONSOLE=y
``` | /content/code_sandbox/boards/nxp/ucans32k1sic/ucans32k1sic_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 43 |
```yaml
board:
name: ucans32k1sic
vendor: nxp
socs:
- name: s32k146
``` | /content/code_sandbox/boards/nxp/ucans32k1sic/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```unknown
config BOARD_UCANS32K1SIC
select SOC_S32K146
select SOC_PART_NUMBER_FS32K146UAT0VLHT
``` | /content/code_sandbox/boards/nxp/ucans32k1sic/Kconfig.ucans32k1sic | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 33 |
```unknown
/*
*
*/
#include <nxp/s32/S32K146_LQFP64-pinctrl.h>
&pinctrl {
lpuart0_default: lpuart0_default {
group0 {
pinmux = <LPUART0_RX_PTB0>, <LPUART0_TX_PTB1>;
drive-strength = "low";
};
};
lpuart1_default: lpuart1_default {
group0 {
pinmux = <LPUART1_RX_PTC6>, <LPUART1_TX_PTC7>;
drive-strength = "low";
};
};
lpi2c0_default: lpi2c0_default {
group1 {
pinmux = <LPI2C0_SDA_PTA2>, <LPI2C0_SCL_PTA3>;
drive-strength = "low";
};
};
lpspi0_default: lpspi0_default {
group0 {
pinmux = <LPSPI0_SCK_PTB2>,
<LPSPI0_SIN_PTB3>,
<LPSPI0_SOUT_PTB4>,
<LPSPI0_PCS0_PTB5>;
drive-strength = "low";
};
};
ftm0_default: ftm0_default {
group0 {
pinmux = <FTM0_CH0_PTD15>,
<FTM0_CH1_PTD16>,
<FTM0_CH2_PTD0>;
drive-strength = "low";
};
};
ftm1_default: ftm1_default {
group0 {
pinmux = <FTM1_CH1_PTA1>;
drive-strength = "low";
};
};
ftm2_default: ftm2_default {
group0 {
pinmux = <FTM2_CH1_PTA0>;
drive-strength = "low";
};
};
flexcan0_default: flexcan0_default {
group0 {
pinmux = <CAN0_RX_PTE4>, <CAN0_TX_PTE5>;
drive-strength = "low";
};
};
flexcan1_default: flexcan1_default {
group0 {
pinmux = <CAN1_RX_PTA12>, <CAN1_TX_PTA13>;
drive-strength = "low";
};
};
};
``` | /content/code_sandbox/boards/nxp/ucans32k1sic/ucans32k1sic-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 532 |
```unknown
if BOARD_UCANS32K1SIC
if SERIAL
config UART_CONSOLE
default y
endif # SERIAL
endif # BOARD_UCANS32K1SIC
``` | /content/code_sandbox/boards/nxp/ucans32k1sic/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 37 |
```unknown
;*******************************************************************************
; *
; Lauterbach TRACE32 start-up script for debugging ucans32k1sic *
; *
;*******************************************************************************
ENTRY %LINE &args
DO ~~~~/startup.cmm command=debug &args
ENDDO
``` | /content/code_sandbox/boards/nxp/ucans32k1sic/support/debug.cmm | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 58 |
```unknown
;*******************************************************************************
; *
; Lauterbach Trace32 start-up script for S32K146 / Cortex-M4F *
; *
; Parameters: *
; - command operation to execute *
; valid values: flash, debug *
; - elfFile filepath of ELF to load *
; - loadTo if "flash", the application will be downloaded to SoC *
; program flash by a flash programming routine; if "sram" it *
; will be downloaded to SoC SRAM. *
; valid values: flash, sram *
; default: flash *
; - eraseFlash if set to "yes", the whole content in Flash device will be *
; erased before the application is downloaded to either Flash *
; or SRAM. This routine takes time to execute *
; default: "no" *
; - verifyFlash if set to "yes", verify after program application to Flash *
; default: "no" *
;*******************************************************************************
ENTRY %LINE &args
&command=STRing.SCANAndExtract("&args","command=","")
&elfFile=STRing.SCANAndExtract("&args","elfFile=","")
&loadTo=STRing.SCANAndExtract("&args","loadTo=","flash")
&eraseFlash=STRing.SCANAndExtract("&args","eraseFlash=","no")
&verifyFlash=STRing.SCANAndExtract("&args","verifyFlash=","no")
IF ("&elfFile"=="")
(
AREA.view
PRINT %ERROR "Missing ELF file path"
PLIST
STOP
ENDDO
)
; Initialize debugger
RESet
SYStem.RESet
SYStem.CPU S32K146
SYStem.CONFIG.DEBUGPORTTYPE SWD
SYStem.Option DUALPORT ON
SYStem.MemAccess DAP
SYStem.JtagClock CTCK 10MHz
Trace.DISable
SYStem.Up
GOSUB DisableBootrom
; Only declares flash, does not execute flash programming
DO ~~/demo/arm/flash/s32k.cmm PREPAREONLY
IF ("&eraseFlash"=="yes")
(
FLASH.Erase ALL
)
IF ("&loadTo"=="flash")
(
; Switch target flash to reprogramming state, erase virtual flash programming memory,
; all target non-empty flash sectors are marked as pending, to be reprogrammed.
FLASH.ReProgram ALL /Erase
; Write contents of the file to virtual Flash programming memory
Data.LOAD.Elf &elfFile
; Program only changed sectors to target flash and erase obsolete code
FLASH.ReProgram off
IF ("&verifyFlash"=="yes")
(
Data.LOAD.Elf &elfFile /DIFF
IF FOUND()
(
AREA.view
PRINT %ERROR "Failed to download the code to flash"
Data.LOAD.Elf &elfFile /ComPare
ENDDO
)
)
; Reset the processor again
SYStem.Up
GOSUB DisableBootrom
)
ELSE
(
; Load program to SRAM
Data.LOAD.Elf &elfFile
)
IF ("&command"=="flash")
(
; Execute the application and quit
Go
QUIT
)
ELSE IF ("&command"=="debug")
(
; Setup minimal debug environment
WinCLEAR
SETUP.Var.%SpotLight
WinPOS 0. 0. 120. 30.
List.auto
WinPOS 125. 0. 80. 10.
Frame.view
WinPOS 125. 18.
Register.view /SpotLight
)
ELSE
(
AREA.view
PRINT %ERROR "Invalid command: &command"
)
ENDDO
DisableBootrom:
(
Data.Set SD:0x4007F010 %LE %Long 0x6
Data.Set SD:0x4007F014 %LE %Long 0x0
RETURN
)
``` | /content/code_sandbox/boards/nxp/ucans32k1sic/support/startup.cmm | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 879 |
```unknown
;*******************************************************************************
; *
; Lauterbach TRACE32 start-up script for flashing ucans32k1sic *
; *
;*******************************************************************************
ENTRY %LINE &args
DO ~~~~/startup.cmm command=flash &args
ENDDO
``` | /content/code_sandbox/boards/nxp/ucans32k1sic/support/flash.cmm | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 58 |
```restructuredtext
.. _mimxrt1170_evk:
NXP MIMXRT1170-EVK/EVKB
#######################
Overview
********
The dual core i.MX RT1170 runs on the Cortex-M7 core at 1 GHz and on the Cortex-M4
at 400 MHz. The i.MX RT1170 MCU offers support over a wide temperature range
and is qualified for consumer, industrial and automotive markets. Zephyr
supports the initial revision of this EVK, as well as rev EVKB.
.. image:: mimxrt1170_evk.jpg
:align: center
:alt: MIMXRT1170-EVK
Hardware
********
- MIMXRT1176DVMAA MCU
- 1GHz Cortex-M7 & 400Mhz Cortex-M4
- 2MB SRAM with 512KB of TCM for Cortex-M7 and 256KB of TCM for Cortex-M4
- Memory
- 512 Mbit SDRAM
- 128 Mbit QSPI Flash
- 512 Mbit Octal Flash
- 2 Gbit raw NAND flash
- 64 Mbit LPSPI flash
- TF socket for SD card
- Display
- MIPI LCD connector
- Ethernet
- 10/100 Mbit/s Ethernet PHY
- 10/100/1000 Mbit/s Ethernet PHY
- USB
- USB 2.0 OTG connector
- USB 2.0 host connector
- Audio
- 3.5 mm audio stereo headphone jack
- Board-mounted microphone
- Left and right speaker out connectors
- Power
- 5 V DC jack
- Debug
- JTAG 20-pin connector
- on-board debugger
- Sensor
- FXOS8700CQ 6-axis e-compass
- MIPI camera sensor connector
- Expansion port
- Arduino interface
- M.2 WIFI/BT interface
- CAN bus connector
For more information about the MIMXRT1170 SoC and MIMXRT1170-EVK board, see
these references:
- `i.MX RT1170 Website`_
- `i.MX RT1170 Datasheet`_
- `i.MX RT1170 Reference Manual`_
- `MIMXRT1170-EVK Website`_
- `MIMXRT1170-EVK Board Hardware User's Guide`_
External Memory
===============
This platform has the following external memories:
+--------------------+------------+-------------------------------------+
| Device | Controller | Status |
+====================+============+=====================================+
| W9825G6KH | SEMC | Enabled via device configuration |
| SDRAM | | data (DCD) block, which sets up |
| | | the SEMC at boot time |
+--------------------+------------+-------------------------------------+
| IS25WP128 | FLEXSPI | Enabled via flash configuration |
| QSPI flash | | block (FCB), which sets up the |
| (RT1170 EVK) | | FLEXSPI at boot time. |
+--------------------+------------+-------------------------------------+
| W25Q512NWEIQ | FLEXSPI | Enabled via flash configuration |
| QSPI flash | | block (FCB), which sets up the |
| (RT1170 EVKB) | | FLEXSPI at boot time. Supported for |
| | | XIP only. |
+--------------------+------------+-------------------------------------+
Supported Features
==================
NXP considers the MIMXRT1170-EVK as the superset board for the i.MX RT11xx
family of MCUs. This board is a focus for NXP's Full Platform Support for
Zephyr, to better enable the entire RT11xx family. NXP prioritizes enabling
this board with new support for Zephyr features. Note that this table
covers two boards: the RT1170 EVK (`mimxrt1170_evk//cm7/cm4`), and
RT1170 EVKB (`mimxrt1170_evk@B//cm7/cm4`)
+-----------+------------+-------------------------------------+-----------------+-----------------+
| Interface | Controller | Driver/Component | RT1170 EVK | RT1170 EVKB |
+===========+============+=====================================+=================+=================+
| NVIC | on-chip | nested vector interrupt controller | Supported | Supported |
+-----------+------------+-------------------------------------+-----------------+-----------------+
| SYSTICK | on-chip | systick | Supported | Supported |
+-----------+------------+-------------------------------------+-----------------+-----------------+
| GPIO | on-chip | gpio | Supported | Supported |
+-----------+------------+-------------------------------------+-----------------+-----------------+
| COUNTER | on-chip | gpt | Supported | Supported |
+-----------+------------+-------------------------------------+-----------------+-----------------+
| TIMER | on-chip | gpt | Supported | Supported |
+-----------+------------+-------------------------------------+-----------------+-----------------+
| CAN | on-chip | flexcan | Supported (M7) | Supported (M7) |
+-----------+------------+-------------------------------------+-----------------+-----------------+
| SPI | on-chip | spi | Supported (M7) | Supported |
+-----------+------------+-------------------------------------+-----------------+-----------------+
| I2C | on-chip | i2c | Supported | Supported |
+-----------+------------+-------------------------------------+-----------------+-----------------+
| PWM | on-chip | pwm | Supported | Supported |
+-----------+------------+-------------------------------------+-----------------+-----------------+
| ADC | on-chip | adc | Supported (M7) | Supported (M7) |
+-----------+------------+-------------------------------------+-----------------+-----------------+
| UART | on-chip | serial port-polling; | Supported | Supported |
| | | serial port-interrupt; | | |
| | | serial port-async | | |
+-----------+------------+-------------------------------------+-----------------+-----------------+
| DMA | on-chip | dma | Supported | Supported |
+-----------+------------+-------------------------------------+-----------------+-----------------+
| WATCHDOG | on-chip | watchdog | Supported (M7) | Supported (M7) |
+-----------+------------+-------------------------------------+-----------------+-----------------+
| ENET | on-chip | ethernet - 10/100M | Supported (M7) | No support |
+-----------+------------+-------------------------------------+-----------------+-----------------+
| ENET1G | on-chip | ethernet - 10/100/1000M | Supported (M7) | No support |
+-----------+------------+-------------------------------------+-----------------+-----------------+
| SAI | on-chip | i2s | Supported | No support |
+-----------+------------+-------------------------------------+-----------------+-----------------+
| USB | on-chip | USB Device | Supported (M7) | Supported (M7) |
+-----------+------------+-------------------------------------+-----------------+-----------------+
| HWINFO | on-chip | Unique device serial number | Supported (M7) | Supported (M7) |
+-----------+------------+-------------------------------------+-----------------+-----------------+
| DISPLAY | on-chip | eLCDIF; MIPI-DSI. Tested with | Supported (M7) | Supported (M7) |
| | | :ref:`rk055hdmipi4m`, | | |
| | | :ref:`rk055hdmipi4ma0`, | | |
| | | and :ref:`g1120b0mipi` shields | | |
+-----------+------------+-------------------------------------+-----------------+-----------------+
| ACMP | on-chip | analog comparator | Supported | No support |
+-----------+------------+-------------------------------------+-----------------+-----------------+
| CAAM RNG | on-chip | entropy | Supported (M7) | No support |
+-----------+------------+-------------------------------------+-----------------+-----------------+
| FLEXSPI | on-chip | flash programming | Supported (M7) | No support |
+-----------+------------+-------------------------------------+-----------------+-----------------+
| SDHC | on-chip | SD host controller | Supported (M7) | Supported (M7) |
+-----------+------------+-------------------------------------+-----------------+-----------------+
| PIT | on-chip | pit | Supported (M7) | Supported (M7) |
+-----------+------------+-------------------------------------+-----------------+-----------------+
| VIDEO | on-chip | CSI; MIPI CSI-2 Rx. Tested with | Supported (M7) | Supported (M7) |
| | | :ref:`nxp_btb44_ov5640` shield | | |
+-----------+------------+-------------------------------------+-----------------+-----------------+
| UART | NXP NW61x | M.2 WIFI/BT module | Unsupported | Supported (M7) |
+-----------+------------+-------------------------------------+-----------------+-----------------+
The default configuration can be found in the defconfig files:
:zephyr_file:`boards/nxp/mimxrt1170_evk/mimxrt1170_evk_mimxrt1176_cm7_defconfig`
:zephyr_file:`boards/nxp/mimxrt1170_evk/mimxrt1170_evk_mimxrt1176_cm4_defconfig`
Connections and I/Os
====================
The MIMXRT1170 SoC has six pairs of pinmux/gpio controllers.
+---------------------------+----------------+------------------+
| Name | Function | Usage |
+---------------------------+----------------+------------------+
| WAKEUP | GPIO | SW7 |
+---------------------------+----------------+------------------+
| GPIO_AD_04 | GPIO | LED |
+---------------------------+----------------+------------------+
| GPIO_AD_24 | LPUART1_TX | UART Console |
+---------------------------+----------------+------------------+
| GPIO_AD_25 | LPUART1_RX | UART Console |
+---------------------------+----------------+------------------+
| GPIO_LPSR_00 | CAN3_TX | flexcan |
+---------------------------+----------------+------------------+
| GPIO_LPSR_01 | CAN3_RX | flexcan |
+---------------------------+----------------+------------------+
| GPIO_AD_29 | SPI1_CS0 | spi |
+---------------------------+----------------+------------------+
| GPIO_AD_28 | SPI1_CLK | spi |
+---------------------------+----------------+------------------+
| GPIO_AD_30 | SPI1_SDO | spi |
+---------------------------+----------------+------------------+
| GPIO_AD_31 | SPI1_SDI | spi |
+---------------------------+----------------+------------------+
| GPIO_AD_08 | LPI2C1_SCL | i2c |
+---------------------------+----------------+------------------+
| GPIO_AD_09 | LPI2C1_SDA | i2c |
+---------------------------+----------------+------------------+
| GPIO_LPSR_05 | LPI2C5_SCL | i2c |
+---------------------------+----------------+------------------+
| GPIO_LPSR_04 | LPI2C5_SDA | i2c |
+---------------------------+----------------+------------------+
| GPIO_AD_04 | FLEXPWM1_PWM2 | pwm |
+---------------------------+----------------+------------------+
| GPIO_AD_32 | ENET_MDC | Ethernet |
+---------------------------+----------------+------------------+
| GPIO_AD_33 | ENET_MDIO | Ethernet |
+---------------------------+----------------+------------------+
| GPIO_DISP_B2_02 | ENET_TX_DATA00 | Ethernet |
+---------------------------+----------------+------------------+
| GPIO_DISP_B2_03 | ENET_TX_DATA01 | Ethernet |
+---------------------------+----------------+------------------+
| GPIO_DISP_B2_04 | ENET_TX_EN | Ethernet |
+---------------------------+----------------+------------------+
| GPIO_DISP_B2_05 | ENET_REF_CLK | Ethernet |
+---------------------------+----------------+------------------+
| GPIO_DISP_B2_06 | ENET_RX_DATA00 | Ethernet |
+---------------------------+----------------+------------------+
| GPIO_DISP_B2_07 | ENET_RX_DATA01 | Ethernet |
+---------------------------+----------------+------------------+
| GPIO_DISP_B2_08 | ENET_RX_EN | Ethernet |
+---------------------------+----------------+------------------+
| GPIO_DISP_B2_09 | ENET_RX_ER | Ethernet |
+---------------------------+----------------+------------------+
| GPIO_AD_17_SAI1_MCLK | SAI_MCLK | SAI |
+---------------------------+----------------+------------------+
| GPIO_AD_21_SAI1_TX_DATA00 | SAI1_TX_DATA | SAI |
+---------------------------+----------------+------------------+
| GPIO_AD_22_SAI1_TX_BCLK | SAI1_TX_BCLK | SAI |
+---------------------------+----------------+------------------+
| GPIO_AD_23_SAI1_TX_SYNC | SAI1_TX_SYNC | SAI |
+---------------------------+----------------+------------------+
| GPIO_AD_17_SAI1_MCLK | SAI1_MCLK | SAI |
+---------------------------+----------------+------------------+
| GPIO_AD_20_SAI1_RX_DATA00 | SAI1_RX_DATA00 | SAI |
+---------------------------+----------------+------------------+
| GPIO_DISP_B2_10 | LPUART2_TX | M.2 BT HCI |
+---------------------------+----------------+------------------+
| GPIO_DISP_B2_11 | LPUART2_RX | M.2 BT HCI |
+---------------------------+----------------+------------------+
| GPIO_DISP_B2_12 | LPUART2_CTS_B | M.2 BT HCI |
+---------------------------+----------------+------------------+
| GPIO_DISP_B2_13 | LPUART1_RTS_B | M.2 BT HCI |
+---------------------------+----------------+------------------+
Dual Core samples
*****************
+-----------+------------------+----------------------------+
| Core | Boot Address | Comment |
+===========+==================+============================+
| Cortex M7 | 0x30000000[630K] | primary core |
+-----------+------------------+----------------------------+
| Cortex M4 | 0x20020000[96k] | boots from OCRAM |
+-----------+------------------+----------------------------+
+----------+------------------+-----------------------+
| Memory | Address[Size] | Comment |
+==========+==================+=======================+
| flexspi1 | 0x30000000[16M] | Cortex M7 flash |
+----------+------------------+-----------------------+
| sdram0 | 0x80030000[64M] | Cortex M7 ram |
+----------+------------------+-----------------------+
| ocram | 0x20020000[512K] | Cortex M4 "flash" |
+----------+------------------+-----------------------+
| sram1 | 0x20000000[128K] | Cortex M4 ram |
+----------+------------------+-----------------------+
| ocram2 | 0x200C0000[512K] | Mailbox/shared memory |
+----------+------------------+-----------------------+
Only the first 16K of ocram2 has the correct MPU region attributes set to be
used as shared memory
System Clock
============
The MIMXRT1170 SoC is configured to use SysTick as the system clock source,
running at 996MHz. When targeting the M4 core, SysTick will also be used,
running at 400MHz
When power management is enabled, the 32 KHz low frequency
oscillator on the board will be used as a source for the GPT timer to
generate a system clock. This clock enables lower power states, at the
cost of reduced resolution
Serial Port
===========
The MIMXRT1170 SoC has 12 UARTs. ``LPUART1`` is configured for the console,
``LPUART2`` for the Bluetooth Host Controller Interface (BT HCI), and the
remaining are not used.
Fetch Binary Blobs
==================
The board Bluetooth/WiFi module requires fetching some binary blob files, to do
that run the command:
.. code-block:: console
west blobs fetch hal_nxp
.. note:: Only Bluetooth functionality is currently supported.
Programming and Debugging
*************************
Build and flash applications as usual (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Building a Dual-Core Image
==========================
Dual core samples load the M4 core image from flash into the shared ``ocram``
region. The M7 core then sets the M4 boot address to this region. The only
sample currently enabled for dual core builds is the ``openamp`` sample.
To flash a dual core sample, the M4 image must be flashed first, so that it is
written to flash. Then, the M7 image must be flashed. The openamp sysbuild
sample will do this automatically by setting the image order.
The secondary core can be debugged normally in single core builds
(where the target is ``mimxrt1170_evk/mimxrt1176/cm4``). For dual core builds, the
secondary core should be placed into a loop, then a debugger can be attached
(see `AN13264`_, section 4.2.3 for more information)
Configuring a Debug Probe
=========================
A debug probe is used for both flashing and debugging the board. The on-board
debugger listed below works with the LinkServer runner by default, or can be
reprogrammed with JLink firmware.
- MIMXRT1170-EVKB: :ref:`mcu-link-cmsis-onboard-debug-probe`
- MIMXRT1170-EVK: :ref:`opensda-daplink-onboard-debug-probe`
Using J-Link
------------
JLink is the default runner for this board. Install the
:ref:`jlink-debug-host-tools` and make sure they are in your search path.
There are two options: the onboard debug circuit can be updated with Segger
J-Link firmware, or :ref:`jlink-external-debug-probe` can be attached to the
EVK. See `Using J-Link with MIMXRT1170-EVKB`_ or
`Using J-Link with MIMXRT1160-EVK or MIMXRT1170-EVK`_ for more details.
Using LinkServer
----------------
Known limitations with LinkServer and these boards include:
- ``west flash`` will not write images to non-flash locations. The flash
command only works when all data in the image is written to flash memory
regions.
Install the :ref:`linkserver-debug-host-tools` and make sure they are in your
search path. LinkServer works with the default CMSIS-DAP firmware included in
the on-board debugger.
Use the ``-r linkserver`` option with West to use the LinkServer runner.
.. code-block:: console
west flash -r linkserver
Alternatively, pyOCD can be used to flash and debug the board by using the
``-r pyocd`` option with West. pyOCD is installed when you complete the
:ref:`gs_python_deps` step in the Getting Started Guide. The runners supported
by NXP are LinkServer and JLink. pyOCD is another potential option, but NXP
does not test or support the pyOCD runner.
Configuring a Console
=====================
We will use the on-board debugger
microcontroller as a usb-to-serial adapter for the serial console. The following
jumper settings are default on these boards, and are required to connect the
UART signals to the USB bridge circuit:
- MIMXRT1170-EVKB: JP2 open (default)
- MIMXRT1170-EVK: J31 and J32 shorted (default)
Connect a USB cable from your PC to the on-board debugger USB port:
- MIMXRT1170-EVKB: J86
- MIMXRT1170-EVK: J11
Use the following settings with your serial terminal of choice (minicom, putty,
etc.):
- Speed: 115200
- Data: 8 bits
- Parity: None
- Stop bits: 1
Flashing
========
Here is an example for the :ref:`hello_world` application.
Before powering the board, make sure SW1 is set to 0001b
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: mimxrt1170_evk/mimxrt1176/cm7
:goals: flash
Power off the board, and change SW1 to 0010b. Then power on the board and
open a serial terminal, reset the board (press the SW4 button), and you should
see the following message in the terminal:
.. code-block:: console
***** Booting Zephyr OS v3.4.0-xxxx-xxxxxxxxxxxxx *****
Hello World! mimxrt1170_evk
Debugging
=========
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: mimxrt1170_evk/mimxrt1176/cm7
:goals: debug
Open a serial terminal, step through the application in your debugger, and you
should see the following message in the terminal:
.. code-block:: console
***** Booting Zephyr OS v3.4.0-xxxx-xxxxxxxxxxxxx *****
Hello World! mimxrt1170_evk
.. _MIMXRT1170-EVK Website:
path_to_url
.. _MIMXRT1170-EVK Board Hardware User's Guide:
path_to_url
.. _i.MX RT1170 Website:
path_to_url
.. _i.MX RT1170 Datasheet:
path_to_url
.. _i.MX RT1170 Reference Manual:
path_to_url
.. _Using J-Link with MIMXRT1160-EVK or MIMXRT1170-EVK:
path_to_url
.. _Using J-Link with MIMXRT1170-EVKB:
path_to_url
.. _AN13264:
path_to_url
.. _NXP MCUXpresso for Visual Studio Code:
path_to_url
ENET1G Driver
=============
Current default of ethernet driver is to use 100M Ethernet instance ENET.
To use the 1G Ethernet instance ENET1G, include the overlay to west build with
the option `-DEXTRA_DTC_OVERLAY_FILE=nxp,enet1g.overlay` instead.
``` | /content/code_sandbox/boards/nxp/mimxrt1170_evk/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 5,151 |
```restructuredtext
.. _ucans32k1sic:
NXP UCANS32K1SIC
################
Overview
********
`NXP UCANS32K1SIC`_ is a CAN signal improvement capability (SIC) evaluation
board designed for both automotive and industrial applications. The UCANS32K1SIC
provides two CAN SIC interfaces and is based on the 32-bit Arm Cortex-M4F
`NXP S32K146`_ microcontroller.
.. image:: img/ucans32k1sic_top.webp
:align: center
:alt: NXP UCANS32K1SIC (TOP)
Hardware
********
- NXP S32K146
- Arm Cortex-M4F @ up to 112 Mhz
- 1 MB Flash
- 128 KB SRAM
- up to 127 I/Os
- 3x FlexCAN with 2x FD
- eDMA, 12-bit ADC, MPU, ECC and more.
- Interfaces:
- DCD-LZ debug interface with SWD + Console / UART
- Dual CAN FD PHYs with dual connectors for daisy chain operation
- JST-GH DroneCode compliant standard connectors and I/O headers
- user RGB LED and button.
More information about the hardware and design resources can be found at
`NXP UCANS32K1SIC`_ website.
Supported Features
==================
The ``ucans32k1sic`` board configuration supports the following hardware features:
============ ========== ================================
Interface Controller Driver/Component
============ ========== ================================
SYSMPU on-chip mpu
PORT on-chip pinctrl
GPIO on-chip gpio
LPUART on-chip serial
LPI2C on-chip i2c
LPSPI on-chip spi
FTM on-chip pwm
FlexCAN on-chip can
Watchdog on-chip watchdog
RTC on-chip counter
============ ========== ================================
The default configuration can be found in the Kconfig file
:zephyr_file:`boards/nxp/ucans32k1sic/ucans32k1sic_defconfig`.
Connections and IOs
===================
This board has 5 GPIO ports named from ``gpioa`` to ``gpioe``.
Pin control can be further configured from your application overlay by adding
children nodes with the desired pinmux configuration to the singleton node
``pinctrl``. Supported properties are described in
:zephyr_file:`dts/bindings/pinctrl/nxp,kinetis-pinctrl.yaml`.
LEDs
----
The UCANS32K1SIC board has one user RGB LED that can be used either as a GPIO
LED or as a PWM LED.
.. table:: RGB LED as GPIO LED
:widths: auto
=============== ================ =============== =====
Devicetree node Devicetree alias Label Pin
=============== ================ =============== =====
led1_red led0 LED1_RGB_RED PTD15
led1_green led1 LED1_RGB_GREEN PTD16
led1_blue led2 LED1_RGB_BLUE PTD0
=============== ================ =============== =====
.. table:: RGB LED as PWM LED
:widths: auto
=============== ======================== ================== ================
Devicetree node Devicetree alias Label Pin
=============== ======================== ================== ================
led1_red_pwm pwm-led0 / red-pwm-led LED1_RGB_RED_PWM PTD15 / FTM0_CH0
led1_green_pwm pwm-led1 / green-pwm-led LED1_RGB_GREEN_PWM PTD16 / FTM0_CH1
led1_blue_pwm pwm-led2 / blue-pwm-led LED1_RGB_BLUE_PWM PTD0 / FTM0_CH2
=============== ======================== ================== ================
The user can control the LEDs in any way. An output of ``0`` illuminates the LED.
Buttons
-------
The UCANS32K1SIC board has one user button:
======================= ============== =====
Devicetree node Label Pin
======================= ============== =====
sw0 / button_3 SW3 PTD15
======================= ============== =====
Serial Console
==============
The serial console is provided via ``lpuart1`` on the 7-pin DCD-LZ debug
connector ``P6``.
========= ===== ============
Connector Pin Pin Function
========= ===== ============
P6.2 PTC7 LPUART1_TX
P6.3 PTC6 LPUART1_RX
========= ===== ============
System Clock
============
The Arm Cortex-M4F core is configured to run at 80 MHz (RUN mode).
Programming and Debugging
*************************
Applications for the ``ucans32k1sic`` board can be built in the usual way as
documented in :ref:`build_an_application`.
This board configuration supports `Lauterbach TRACE32`_ and `SEGGER J-Link`_
West runners for flashing and debugging applications. Follow the steps described
in :ref:`lauterbach-trace32-debug-host-tools` and :ref:`jlink-debug-host-tools`,
to setup the flash and debug host tools for these runners, respectively. The
default runner is J-Link.
Flashing
========
Run the ``west flash`` command to flash the application using SEGGER J-Link.
Alternatively, run ``west flash -r trace32`` to use Lauterbach TRACE32.
The Lauterbach TRACE32 runner supports additional options that can be passed
through command line:
.. code-block:: console
west flash -r trace32 --startup-args elfFile=<elf_path> loadTo=<flash/sram>
eraseFlash=<yes/no> verifyFlash=<yes/no>
Where:
- ``<elf_path>`` is the path to the Zephyr application ELF in the output
directory
- ``loadTo=flash`` loads the application to the SoC internal program flash
(:kconfig:option:`CONFIG_XIP` must be set), and ``loadTo=sram`` load the
application to SRAM. The default is ``flash``.
- ``eraseFlash=yes`` erases the whole content of SoC internal flash before the
application is downloaded to either Flash or SRAM. This routine takes time to
execute. The default is ``no``.
- ``verifyFlash=yes`` verify the SoC internal flash content after programming
(use together with ``loadTo=flash``). The default is ``no``.
For example, to erase and verify flash content:
.. code-block:: console
west flash -r trace32 --startup-args elfFile=build/zephyr/zephyr.elf loadTo=flash eraseFlash=yes verifyFlash=yes
Debugging
=========
Run the ``west debug`` command to start a GDB session using SEGGER J-Link.
Alternatively, run ``west debug -r trace32`` to launch the Lauterbach TRACE32
software debugging interface.
References
**********
.. target-notes::
.. _NXP UCANS32K1SIC:
path_to_url
.. _NXP S32K146:
path_to_url
.. _Lauterbach TRACE32:
path_to_url
.. _SEGGER J-Link:
path_to_url
``` | /content/code_sandbox/boards/nxp/ucans32k1sic/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,652 |
```cmake
#
#
#
if(CONFIG_BOARD_LPCXPRESSO54114_LPC54114_M4 OR CONFIG_SECOND_CORE_MCUX)
board_runner_args(jlink "--device=LPC54114J256_M4" "--reset-after-load")
elseif(CONFIG_BOARD_LPCXPRESSO54114_LPC54114_M0)
board_runner_args(jlink "--device=LPC54114J256_M0" "--reset-after-load")
endif()
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/nxp/lpcxpresso54114/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 106 |
```unknown
#
#
#
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
CONFIG_GPIO=y
CONFIG_PINCTRL=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000
CONFIG_ARM_MPU=y
CONFIG_HW_STACK_PROTECTION=y
``` | /content/code_sandbox/boards/nxp/lpcxpresso54114/lpcxpresso54114_lpc54114_m4_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 60 |
```yaml
#
#
#
identifier: lpcxpresso54114/lpc54114/m4
name: NXP LPCXpresso54114 M4
type: mcu
arch: arm
ram: 64
flash: 256
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- arduino_i2c
- arduino_spi
- gpio
- i2c
- spi
vendor: nxp
``` | /content/code_sandbox/boards/nxp/lpcxpresso54114/lpcxpresso54114_lpc54114_m4.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 106 |
```unknown
# LPCXpresso54114 board
config BOARD_LPCXPRESSO54114
select SOC_LPC54114_M4 if BOARD_LPCXPRESSO54114_LPC54114_M4
select SOC_LPC54114_M0 if BOARD_LPCXPRESSO54114_LPC54114_M0
select SOC_PART_NUMBER_LPC54114J256BD64
``` | /content/code_sandbox/boards/nxp/lpcxpresso54114/Kconfig.lpcxpresso54114 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 80 |
```unknown
/*
* NOTE: File generated by gen_board_pinctrl.py
* from LPCXpresso54114.mex
*
*/
#include <nxp/lpc/LPC54114J256BD64-pinctrl.h>
&pinctrl {
pinmux_flexcomm0_usart: pinmux_flexcomm0_usart {
group0 {
pinmux = <FC0_RXD_SDA_MOSI_PIO0_0>,
<FC0_TXD_SCL_MISO_PIO0_1>;
slew-rate = "standard";
};
};
pinmux_flexcomm4_i2c: pinmux_flexcomm4_i2c {
group0 {
pinmux = <FC4_RTS_SCL_SSEL1_PIO0_25>,
<FC4_CTS_SDA_SSEL0_PIO0_26>;
};
};
pinmux_flexcomm5_spi: pinmux_flexcomm5_spi {
group0 {
pinmux = <FC5_SSEL2_PIO1_1>;
bias-pull-up;
};
group1 {
pinmux = <FC5_TXD_SCL_MISO_PIO0_18>,
<FC5_SCK_PIO0_19>,
<FC5_RXD_SDA_MOSI_PIO0_20>;
bias-pull-up;
slew-rate = "standard";
};
};
};
``` | /content/code_sandbox/boards/nxp/lpcxpresso54114/lpcxpresso54114-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 314 |
```yaml
#
#
#
identifier: lpcxpresso54114/lpc54114/m0
name: NXP LPCXpresso54114 M0
type: mcu
arch: arm
ram: 32
flash: 64
testing:
ignore_tags:
- net
toolchain:
- xtools
- zephyr
- gnuarmemb
vendor: nxp
``` | /content/code_sandbox/boards/nxp/lpcxpresso54114/lpcxpresso54114_lpc54114_m0.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 86 |
```yaml
board:
name: lpcxpresso54114
vendor: nxp
socs:
- name: lpc54114
``` | /content/code_sandbox/boards/nxp/lpcxpresso54114/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```unknown
/*
*
*/
#include "lpcxpresso54114-pinctrl.dtsi"
/ {
aliases{
led0 = &red_led;
led1 = &green_led;
led2 = &blue_led;
spi-5 = &flexcomm5;
usart-0 = &flexcomm0;
};
leds {
compatible = "gpio-leds";
red_led: led_0 {
gpios = <&gpio0 29 GPIO_PULL_UP>;
label = "User LD1";
status = "disabled";
};
green_led: led_1 {
gpios = <&gpio1 10 GPIO_PULL_UP>;
label = "User LD2";
status = "disabled";
};
blue_led: led_2 {
gpios = <&gpio1 9 0>;
label = "User LD3";
status = "disabled";
};
};
};
&flexcomm0 {
compatible = "nxp,lpc-usart";
current-speed = <115200>;
pinctrl-0 = <&pinmux_flexcomm0_usart>;
pinctrl-names = "default";
};
arduino_i2c: &flexcomm4 {
compatible = "nxp,lpc-i2c";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&pinmux_flexcomm4_i2c>;
pinctrl-names = "default";
};
arduino_spi: &flexcomm5 {
compatible = "nxp,lpc-spi";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&pinmux_flexcomm5_spi>;
pinctrl-names = "default";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
slot0_partition: partition@0 {
label = "image-0";
reg = <0x00000000 0x00010000>;
};
slot1_partition: partition@10000 {
label = "image-1";
reg = <0x00010000 0x00010000>;
};
};
};
``` | /content/code_sandbox/boards/nxp/lpcxpresso54114/lpcxpresso54114.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 511 |
```unknown
#
#
#
CONFIG_USE_SEGGER_RTT=y
CONFIG_SERIAL=n
CONFIG_GPIO=n
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/nxp/lpcxpresso54114/lpcxpresso54114_lpc54114_m0_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 39 |
```unknown
# LPCXpresso54114 board
#
# Place size restrictions on first image if dual core is enabled
if SECOND_CORE_MCUX && BOARD_LPCXPRESSO54114_LPC54114_M4
# Workaround for not being able to have commas in macro arguments
DT_CHOSEN_Z_CODE_PARTITION := zephyr,code-partition
config FLASH_LOAD_SIZE
default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
endif # SECOND_CORE_MCUX && BOARD_LPCXPRESSO54114_LPC54114_M4
``` | /content/code_sandbox/boards/nxp/lpcxpresso54114/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 117 |
```unknown
/*
*
*/
/dts-v1/;
#include <nxp/nxp_lpc54xxx_m0.dtsi>
#include "lpcxpresso54114.dtsi"
/ {
model = "NXP LPCXPRESSO54114 board";
compatible = "nxp,lpc54xxx","nxp,lpc";
chosen {
zephyr,sram = &sram2;
zephyr,flash = &sram1;
zephyr,code-cpu1-partition = &slot1_partition;
/*zephyr,console = &flexcomm0; uncomment to use console on M0 */
/*zephyr,shell-uart = &flexcomm0; uncomment to use shell on M0 */
};
};
&cpu1 {
clock-frequency = <48000000>;
};
&mailbox0 {
status = "okay";
};
``` | /content/code_sandbox/boards/nxp/lpcxpresso54114/lpcxpresso54114_lpc54114_m0.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 186 |
```unknown
/*
*
*/
/dts-v1/;
#include <nxp/nxp_lpc54xxx_m4.dtsi>
#include "lpcxpresso54114.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "NXP LPCXpresso54114 board";
compatible = "nxp,lpc54xxx", "nxp,lpc";
aliases{
sw0 = &user_button_1;
sw1 = &user_button_2;
sw2 = &user_button_3;
};
chosen {
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,console = &flexcomm0;
zephyr,shell-uart = &flexcomm0;
zephyr,code-partition = &slot0_partition;
};
gpio_keys {
compatible = "gpio-keys";
user_button_1: button_0 {
label = "User SW1";
gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_0>;
};
user_button_2: button_1 {
label = "User SW2";
gpios = <&gpio0 31 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
zephyr,code = <INPUT_KEY_1>;
};
user_button_3: button_2 {
label = "User SW3";
gpios = <&gpio0 4 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
zephyr,code = <INPUT_KEY_2>;
};
};
};
/*
* Default for this board is to allocate SRAM0-1 to M4 CPU but the
* application can have an application specific device tree to
* allocate the SRAM0-3 differently.
*
*/
&sram0 {
compatible = "mmio-sram";
reg = <0x20000000 DT_SIZE_K(128)>;
};
&cpu0 {
clock-frequency = <48000000>;
};
&mailbox0 {
status = "okay";
};
&red_led {
status = "okay";
};
&green_led {
status = "okay";
};
&blue_led {
status = "okay";
};
&flexcomm0 {
status = "okay";
};
&flexcomm4 {
status = "okay";
};
&flexcomm5 {
status = "okay";
};
&flash0 {
/*
* LPC flash controller requires minimum 256 byte write to flash,
* so MCUBoot is not supported. Just provide storage and code partition.
*/
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
slot0_partition: partition@0 {
label = "image-0";
reg = <0x00000000 DT_SIZE_K(196)>;
};
storage_partition: partition@30000 {
label = "storage";
reg = <0x00030000 DT_SIZE_K(64)>;
};
};
};
``` | /content/code_sandbox/boards/nxp/lpcxpresso54114/lpcxpresso54114_lpc54114_m4.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 661 |
```unknown
/*
*
*/
/dts-v1/;
#include <nxp/nxp_rt1015.dtsi>
#include "mimxrt1015_evk-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "NXP MIMXRT1015-EVK board";
compatible = "nxp,mimxrt1015";
aliases {
led0 = &green_led;
sw0 = &user_button;
};
chosen {
zephyr,sram = &ocram;
zephyr,itcm = &itcm;
zephyr,dtcm = &dtcm;
zephyr,console = &lpuart1;
zephyr,shell-uart = &lpuart1;
zephyr,flash = &at25sf128a;
zephyr,flash-controller = &at25sf128a;
zephyr,code-partition = &slot0_partition;
};
leds {
compatible = "gpio-leds";
green_led: led-1 {
gpios = <&gpio3 21 GPIO_ACTIVE_LOW>;
label = "User LD1";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button-1 {
label = "User SW4";
gpios = <&gpio2 9 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_0>;
};
};
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpio1 29 0>, /* A0 */
<1 0 &gpio1 14 0>, /* A1 */
<2 0 &gpio1 28 0>, /* A2 */
<3 0 &gpio1 26 0>, /* A3 */
<4 0 &gpio1 31 0>, /* A4 */
<5 0 &gpio1 30 0>, /* A5 */
<6 0 &gpio3 1 0>, /* D0 */
<7 0 &gpio3 0 0>, /* D1 */
<8 0 &gpio2 20 0>, /* D2 */
<9 0 &gpio2 26 0>, /* D3 */
<10 0 &gpio3 2 0>, /* D4 */
<11 0 &gpio2 27 0>, /* D5 */
<12 0 &gpio1 27 0>, /* D6 */
<13 0 &gpio1 15 0>, /* D7 */
<14 0 &gpio2 21 0>, /* D8 */
<15 0 &gpio2 22 0>, /* D9 */
<16 0 &gpio1 11 0>, /* D10 */
<17 0 &gpio1 12 0>, /* D11 */
<18 0 &gpio1 13 0>, /* D12 */
<19 0 &gpio1 10 0>, /* D13 */
<20 0 &gpio1 31 0>, /* D14 */
<21 0 &gpio1 30 0>; /* D15 */
};
};
arduino_serial: &lpuart4 {
pinctrl-0 = <&pinmux_lpuart4>;
pinctrl-1 = <&pinmux_lpuart4_sleep>;
pinctrl-names = "default", "sleep";
};
&flexspi {
status = "okay";
reg = <0x402a8000 0x4000>, <0x60000000 DT_SIZE_M(16)>;
at25sf128a: at25sf128a@0 {
compatible = "nxp,imx-flexspi-nor";
size = <DT_SIZE_M(16 * 8)>;
reg = <0>;
spi-max-frequency = <133000000>;
status = "okay";
jedec-id = [1f 89 01];
erase-block-size = <4096>;
write-block-size = <1>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 DT_SIZE_K(128)>;
};
/* The MCUBoot swap-move algorithm uses the last 3 sectors
* of the primary slot0 for swap status and move.
*/
slot0_partition: partition@20000 {
label = "image-0";
reg = <0x00020000 (DT_SIZE_M(7) + DT_SIZE_K(12))>;
};
slot1_partition: partition@723000 {
label = "image-1";
reg = <0x00723000 DT_SIZE_M(7)>;
};
storage_partition: partition@E23000 {
label = "storage";
reg = <0x00E23000 (DT_SIZE_M(2) - DT_SIZE_K(140))>;
};
};
};
};
&lpi2c1 {
status = "okay";
pinctrl-0 = <&pinmux_lpi2c1>;
pinctrl-names = "default";
};
&lpuart1 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&pinmux_lpuart1>;
pinctrl-1 = <&pinmux_lpuart1_sleep>;
pinctrl-names = "default", "sleep";
};
&lpspi1 {
status = "okay";
/* DMA channels 0 and 1, muxed to LPSPI1 RX and TX */
dmas = <&edma0 0 13>, <&edma0 1 14>;
dma-names = "rx", "tx";
pinctrl-0 = <&pinmux_lpspi1>;
pinctrl-names = "default";
};
zephyr_udc0: &usb1 {
status = "okay";
};
&adc1 {
status = "okay";
pinctrl-0 = <&pinmux_adc1>;
pinctrl-names = "default";
};
&edma0 {
status = "okay";
};
&sai1 {
pinctrl-0 = <&pinmux_sai1>;
pinctrl-names = "default";
};
/* GPT and Systick are enabled. If power management is enabled, the GPT
* timer will be used instead of systick, as allows the core clock to
* be gated.
*/
&gpt_hw_timer {
status = "okay";
};
&systick {
status = "okay";
};
``` | /content/code_sandbox/boards/nxp/mimxrt1015_evk/mimxrt1015_evk.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,538 |
```cmake
#
#
#
board_runner_args(pyocd "--target=mimxrt1015")
board_runner_args(jlink "--device=MIMXRT1015")
board_runner_args(linkserver "--device=MIMXRT1015xxxxx:EVK-MIMXRT1015")
include(${ZEPHYR_BASE}/boards/common/linkserver.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
``` | /content/code_sandbox/boards/nxp/mimxrt1015_evk/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 108 |
```unknown
#
#
#
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_GPIO=y
CONFIG_ARM_MPU=y
CONFIG_HW_STACK_PROTECTION=y
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/nxp/mimxrt1015_evk/mimxrt1015_evk_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 39 |
```unknown
config BOARD_MIMXRT1015_EVK
select SOC_PART_NUMBER_MIMXRT1015DAF5A
``` | /content/code_sandbox/boards/nxp/mimxrt1015_evk/Kconfig.mimxrt1015_evk | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 28 |
```restructuredtext
.. _lpcxpresso54114:
NXP LPCXPRESSO54114
###################
Overview
********
The LPCXpresso54114 board has been developed by NXP to enable evaluation of and
prototyping with the low-power LPC54110 family of MCUs. LPCXpresso* is a
low-cost development platform available from NXP supporting NXP's ARM-based
microcontrollers. LPCXpresso is an end-to-end solution enabling embedded
engineers to develop their applications from initial evaluation to final
production.
.. image:: lpcxpresso54114_m4.jpg
:align: center
:alt: LPCXPRESSO54114
Hardware
********
- LPC54114 dual-core (M4F and dual M0) MCU running at up to 100 MHz
- On-board high-speed USB based debug probe with CMSIS-DAP and J-Link protocol
support, can debug the on-board LPC54114 or an external target
- External debug probe option
- Tri-color LED, target Reset, ISP & interrupt/user buttons for easy testing of
software functionality
- Expansion options based on Arduino UNO and Pmod, plus additional expansion
port pins
- On-board 1.8 V and 3.3 V regulators plus external power supply option
- 8 Mb Macronix MX25R SPI flash
- Built-in MCU power consumption and supply voltage measurement
- UART, IC and SPI port bridging from LPC54114 target to USB via the on-board
debug probe
- FTDI UART connector
For more information about the LPC54114 SoC and LPCXPRESSO54114 board:
- `LPC54114 SoC Website`_
- `LPC54114 Datasheet`_
- `LPC54114 Reference Manual`_
- `LPCXPRESSO54114 Website`_
- `LPCXPRESSO54114 User Guide`_
- `LPCXPRESSO54114 Schematics`_
Supported Features
==================
The lpcxpresso54114 board configuration supports the following hardware
features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+-------------------------------------+
| IOCON | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| USART | on-chip | serial port-polling |
+-----------+------------+-------------------------------------+
| CLOCK | on-chip | clock_control |
+-----------+------------+-------------------------------------+
| IAP | on-chip | flash programming |
+-----------+------------+-------------------------------------+
The default configuration for each core can be found in the defconfig files:
`boards/nxp/lpcxpresso54114/lpcxpresso54114_lpc54114_m4_defconfig`
`boards/nxp/lpcxpresso54114/lpcxpresso54114_lpc54114_m0_defconfig`
Other hardware features are not currently supported by the port.
Connections and IOs
===================
The LPC54114 SoC has IOCON registers, which can be used to configure the
functionality of a pin.
+---------+-----------------+----------------------------+
| Name | Function | Usage |
+=========+=================+============================+
| PIO0_0 | USART | USART RX |
+---------+-----------------+----------------------------+
| PIO0_1 | USART | USART TX |
+---------+-----------------+----------------------------+
| PIO0_18 | SPI | SPI MISO |
+---------+-----------------+----------------------------+
| PIO0_19 | SPI | SPI SCK |
+---------+-----------------+----------------------------+
| PIO0_20 | SPI | SPI MOSI |
+---------+-----------------+----------------------------+
| PIO0_25 | I2C | I2C SCL |
+---------+-----------------+----------------------------+
| PIO0_26 | I2C | I2C SDA |
+---------+-----------------+----------------------------+
| PIO0_29 | GPIO | RED LED |
+---------+-----------------+----------------------------+
| PIO1_1 | SPI | SPI SSEL2 |
+---------+-----------------+----------------------------+
| PIO1_9 | GPIO | BLUE_LED |
+---------+-----------------+----------------------------+
| PIO1_10 | GPIO | GREEN LED |
+---------+-----------------+----------------------------+
System Clock
============
The LPC54114 SoC is configured to use the internal FRO at 48MHz as a source for
the system clock. Other sources for the system clock are provided in the SOC,
depending on your system requirements.
Serial Port
===========
The LPC54114 SoC has 8 FLEXCOMM interfaces for serial communication. One is
configured as USART for the console and the remaining are not used.
Programming and Debugging
*************************
Build and flash applications as usual (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Configuring a Debug Probe
=========================
A debug probe is used for both flashing and debugging the board. This board is
configured by default to use the LPC-Link2 CMSIS-DAP Onboard Debug Probe,
however the :ref:`pyocd-debug-host-tools` do not support this probe so you must
reconfigure the board for one of the following debug probes instead.
:ref:`lpclink2-jlink-onboard-debug-probe`
-----------------------------------------
Install the :ref:`jlink-debug-host-tools` and make sure they are in your search
path.
Follow the instructions in :ref:`lpclink2-jlink-onboard-debug-probe` to program
the J-Link firmware.
Configuring a Console
=====================
Regardless of your choice in debug probe, we will use the LPC-Link2
microcontroller as a usb-to-serial adapter for the serial console.
Connect a USB cable from your PC to J5
Use the following settings with your serial terminal of choice (minicom, putty,
etc.):
- Speed: 115200
- Data: 8 bits
- Parity: None
- Stop bits: 1
Flashing
========
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: lpcxpresso54114/lpc54114/m4
:goals: flash
Open a serial terminal, reset the board (press the SW4 button), and you should
see the following message in the terminal:
.. code-block:: console
***** Booting Zephyr OS v1.14.0-rc1 *****
Hello World! lpcxpresso54114_m4
Debugging
=========
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: lpcxpresso54114/lpc54114/m4
:goals: debug
Open a serial terminal, step through the application in your debugger, and you
should see the following message in the terminal:
.. code-block:: console
***** Booting Zephyr OS v1.14.0-rc1 *****
Hello World! lpcxpresso54114_m4
.. _LPC54114 SoC Website:
path_to_url
.. _LPC54114 Datasheet:
path_to_url
.. _LPC54114 Reference Manual:
path_to_url
.. _LPCXPRESSO54114 Website:
path_to_url
.. _LPCXPRESSO54114 User Guide:
path_to_url
.. _LPCXPRESSO54114 Schematics:
path_to_url
``` | /content/code_sandbox/boards/nxp/lpcxpresso54114/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,765 |
```yaml
#
#
#
identifier: mimxrt1015_evk
name: NXP MIMXRT1015-EVK
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 32
flash: 16384
supported:
- arduino_gpio
- arduino_serial
- counter
- dma
- gpio
- i2c
- usb_device
- spi
- adc
vendor: nxp
``` | /content/code_sandbox/boards/nxp/mimxrt1015_evk/mimxrt1015_evk.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 118 |
```yaml
board:
name: mimxrt1015_evk
vendor: nxp
socs:
- name: mimxrt1015
``` | /content/code_sandbox/boards/nxp/mimxrt1015_evk/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 34 |
```unknown
/*
*
* Note: File generated by gen_board_pinctrl.py
* from mimxrt1015_evk.mex
*/
#include <nxp/nxp_imx/rt/mimxrt1015daf5a-pinctrl.dtsi>
&pinctrl {
/* adc1 inputs 1 and 13 */
pinmux_adc1: pinmux_adc1 {
group0 {
pinmux = <&iomuxc_gpio_ad_b0_14_adc1_in1>,
<&iomuxc_gpio_ad_b1_13_adc1_in13>;
drive-strength = "r0-6";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
};
pinmux_lpi2c1: pinmux_lpi2c1 {
group0 {
pinmux = <&iomuxc_gpio_ad_b1_14_lpi2c1_scl>,
<&iomuxc_gpio_ad_b1_15_lpi2c1_sda>;
drive-strength = "r0-6";
drive-open-drain;
slew-rate = "slow";
nxp,speed = "100-mhz";
input-enable;
};
};
pinmux_lpspi1: pinmux_lpspi1 {
group0 {
pinmux = <&iomuxc_gpio_ad_b0_10_lpspi1_sck>,
<&iomuxc_gpio_ad_b0_11_lpspi1_pcs0>,
<&iomuxc_gpio_ad_b0_12_lpspi1_sdo>,
<&iomuxc_gpio_ad_b0_13_lpspi1_sdi>;
drive-strength = "r0-6";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
};
pinmux_lpuart1: pinmux_lpuart1 {
group0 {
pinmux = <&iomuxc_gpio_ad_b0_07_lpuart1_rx>,
<&iomuxc_gpio_ad_b0_06_lpuart1_tx>;
drive-strength = "r0-6";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
};
pinmux_lpuart1_sleep: pinmux_lpuart1_sleep {
group0 {
pinmux = <&iomuxc_gpio_ad_b0_07_gpio1_io07>;
drive-strength = "r0-6";
bias-pull-up;
bias-pull-up-value = "100k";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
group1 {
pinmux = <&iomuxc_gpio_ad_b0_06_lpuart1_tx>;
drive-strength = "r0-6";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
};
pinmux_lpuart4: pinmux_lpuart4 {
group0 {
pinmux = <&iomuxc_gpio_emc_33_lpuart4_rx>,
<&iomuxc_gpio_emc_32_lpuart4_tx>;
drive-strength = "r0-6";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
};
pinmux_lpuart4_sleep: pinmux_lpuart4_sleep {
group0 {
pinmux = <&iomuxc_gpio_emc_33_gpio3_io01>;
drive-strength = "r0-6";
bias-pull-up;
bias-pull-up-value = "100k";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
group1 {
pinmux = <&iomuxc_gpio_emc_32_lpuart4_tx>;
drive-strength = "r0-6";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
};
pinmux_sai1: pinmux_sai1 {
group0 {
pinmux = <&iomuxc_gpio_emc_20_sai1_mclk>,
<&iomuxc_gpio_emc_26_sai1_tx_bclk>,
<&iomuxc_gpio_emc_25_sai1_tx_data0>,
<&iomuxc_gpio_emc_21_sai1_rx_data0>,
<&iomuxc_gpio_emc_27_sai1_tx_sync>;
drive-strength = "r0-6";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
};
/* user led and board SW4 */
pinmux_user: pinmux_user {
group0 {
pinmux = <&iomuxc_gpio_emc_09_gpio2_io09>;
drive-strength = "r0-4";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
group1 {
pinmux = <&iomuxc_gpio_sd_b1_01_gpio3_io21>;
drive-strength = "r0-6";
slew-rate = "slow";
nxp,speed = "100-mhz";
};
};
};
``` | /content/code_sandbox/boards/nxp/mimxrt1015_evk/mimxrt1015_evk-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,190 |
```restructuredtext
:orphan:
.. nxp-opensda-probes
A debug probe is used for both flashing and debugging the board. This board has
an :ref:`opensda-onboard-debug-probe`. The default firmware present on this
probe is the :ref:`opensda-daplink-onboard-debug-probe`.
Based on the host tool installed, please use the following instructions
to setup your debug probe:
* :ref:`jlink-debug-host-tools`: `Using J-Link on NXP OpenSDA Boards`_
* :ref:`linkserver-debug-host-tools`: `Using DAPLink on NXP OpenSDA Boards`_
* :ref:`pyocd-debug-host-tools`: `Using DAPLink on NXP OpenSDA Boards`_
Using DAPLink on NXP OpenSDA Boards
-----------------------------------
1. If the debug firmware has been modified, follow the instructions provided at
:ref:`opensda-daplink-onboard-debug-probe` to reprogram the default debug
probe firmware on this board.
#. Ensure the SWD isolation jumpers are populated
Using J-Link on NXP OpenSDA Boards
----------------------------------
There are two options: the onboard debug circuit can be updated with Segger
J-Link firmware, or a :ref:`jlink-external-debug-probe` can be attached to the
board.
To update the onboard debug circuit, please do the following:
1. If the debug firmware has been modified, follow the instructions provided at
:ref:`opensda-jlink-onboard-debug-probe` to reprogram the default debug
probe firmware on this board.
#. Ensure the SWD isolation jumpers are removed.
To attach an external J-Link probe, ensure the SWD isolation jumpers are
removed, and connect the external probe to the JTAG/SWD header.
``` | /content/code_sandbox/boards/nxp/common/opensda-debug.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 385 |
```restructuredtext
:orphan:
.. rt1xxx-lpclink2-probes
A debug probe is used for both flashing and debugging the board. This board has
an :ref:`lpc-link2-onboard-debug-probe`. The default firmware present on this
probe is the :ref:`lpclink2-daplink-onboard-debug-probe`.
Based on the host tool installed, please use the following instructions
to setup your debug probe:
* :ref:`jlink-debug-host-tools`:
`Using J-Link with LPC-Link2 Probe`_
* :ref:`linkserver-debug-host-tools`:
`Using CMSIS-DAP with LPC-Link2 Probe`_
* :ref:`pyocd-debug-host-tools`:
`Using CMSIS-DAP with LPC-Link2 Probe`_
Using CMSIS-DAP with LPC-Link2 Probe
------------------------------------
1. Follow the instructions provided at
:ref:`lpclink2-cmsis-onboard-debug-probe` to reprogram the default debug
probe firmware on this board.
#. Ensure the SWD isolation jumpers are populated
Using J-Link with LPC-Link2 Probe
---------------------------------
There are two options: the onboard debug circuit can be updated with Segger
J-Link firmware, or a :ref:`jlink-external-debug-probe` can be attached to the
EVK.
To update the onboard debug circuit, please do the following:
1. Switch the power source for the EVK to a different source than the
debug USB, as the J-Link firmware does not power the EVK via the
debug USB.
#. Follow the instructions provided at
:ref:`lpclink2-jlink-onboard-debug-probe` to reprogram the default debug
probe firmware on this board.
#. Ensure the SWD isolation jumpers are populated.
To attach an external J-Link probe, ensure the SWD isolation jumpers are
removed, then connect the probe to the external JTAG/SWD header
``` | /content/code_sandbox/boards/nxp/common/rt1xxx-lpclink2-debug.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 423 |
```cmake
#
#
#
board_runner_args(pyocd "--target=mimxrt1010")
board_runner_args(jlink "--device=MIMXRT1011")
board_runner_args(linkserver "--device=MIMXRT1011xxxxx:EVK-MIMXRT1010")
include(${ZEPHYR_BASE}/boards/common/linkserver.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
``` | /content/code_sandbox/boards/nxp/mimxrt1010_evk/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 108 |
```restructuredtext
.. _mimxrt1015_evk:
NXP MIMXRT1015-EVK
##################
Overview
********
The i.MX RT1015 expands the i.MX RT crossover processor families by providing
high-performance feature set in low-cost LQFP packages, further simplifying
board design and layout for customers. The i.MX RT1015 runs on the Arm
Cortex-M7 core at 500 MHz.
.. image:: mimxrt1015_evk.jpg
:align: center
:alt: MIMXRT1015-EVK
Hardware
********
- MIMXRT1015DAF5A MCU
- Memory
- 128 Mbit QSPI Flash
- Connectivity
- Micro USB host and OTG connectors
- Arduino interface
- Audio
- Audio Codec
- 4-pole audio headphone jack
- External speaker connection
- Microphone
- Debug
- JTAG 10-pin connector
- OpenSDA with DAPLink
For more information about the MIMXRT1015 SoC and MIMXRT1015-EVK board, see
these references:
- `i.MX RT1015 Website`_
- `i.MX RT1015 Datasheet`_
- `i.MX RT1015 Reference Manual`_
- `MIMXRT1015-EVK Website`_
- `MIMXRT1015-EVK Quick Reference Guide`_
- `MIMXRT1015-EVK Design Files`_
External Memory
===============
This platform has the following external memories:
+--------------------+------------+-------------------------------------+
| Device | Controller | Status |
+====================+============+=====================================+
| AT25SF128A | FLEXSPI | Enabled via flash configurationn |
| | | block, which sets up FLEXSPI at |
| | | boot time. |
+--------------------+------------+-------------------------------------+
Supported Features
==================
The mimxrt1015_evk board configuration supports the hardware features listed
below. For additional features not yet supported, please also refer to the
:ref:`mimxrt1064_evk` , which is the superset board in NXP's i.MX RT10xx family.
NXP prioritizes enabling the superset board with NXP's Full Platform Support for
Zephyr. Therefore, the mimxrt1064_evk board may have additional features
already supported, which can also be re-used on this mimxrt1015_evk board:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| USB | on-chip | USB device |
+-----------+------------+-------------------------------------+
| ADC | on-chip | ADC |
+-----------+------------+-------------------------------------+
| GPT | on-chip | gpt |
+-----------+------------+-------------------------------------+
| TRNG | on-chip | entropy |
+-----------+------------+-------------------------------------+
The default configuration can be found in
:zephyr_file:`boards/nxp/mimxrt1015_evk/mimxrt1015_evk_defconfig`
Other hardware features are not currently supported by the port.
Connections and I/Os
====================
The MIMXRT1015 SoC has five pairs of pinmux/gpio controllers.
+---------------+-----------------+---------------------------+
| Name | Function | Usage |
+===============+=================+===========================+
| GPIO_AD_B0_05 | GPIO | LED |
+---------------+-----------------+---------------------------+
| GPIO_EMC_09 | GPIO | SW4 |
+---------------+-----------------+---------------------------+
| GPIO_AD_B0_06 | LPUART1_TX | UART Console |
+---------------+-----------------+---------------------------+
| GPIO_AD_B0_07 | LPUART1_RX | UART Console |
+---------------+-----------------+---------------------------+
| GPIO_EMC_32 | LPUART4_TX | UART Console |
+---------------+-----------------+---------------------------+
| GPIO_EMC_33 | LPUART4_RX | UART Console |
+---------------+-----------------+---------------------------+
| GPIO_AD_B1_15 | LPI2C1_SDA | I2C SDA |
+---------------+-----------------+---------------------------+
| GPIO_AD_B1_14 | LPI2C1_CLK | I2C SCL |
+---------------+-----------------+---------------------------+
| GPIO_AD_B0_10 | LPSPI1_SCK | SPI |
+---------------+-----------------+---------------------------+
| GPIO_AD_B0_11 | LPSPI1_PCS0 | SPI |
+---------------+-----------------+---------------------------+
| GPIO_AD_B0_12 | LPSPI1_SDO | SPI |
+---------------+-----------------+---------------------------+
| GPIO_AD_B0_13 | LPSPI1_SDI | SPI |
+---------------+-----------------+---------------------------+
| GPIO_AD_B0_14 | ADC | ADC1 Channel 1 |
+---------------+-----------------+---------------------------+
| GPIO_AD_B1_13 | ADC | ADC1 Channel 13 |
+---------------+-----------------+---------------------------+
System Clock
============
The MIMXRT1015 SoC is configured to use SysTick as the system clock source,
running at 500MHz.
When power management is enabled, the 32 KHz low frequency
oscillator on the board will be used as a source for the GPT timer to
generate a system clock. This clock enables lower power states, at the
cost of reduced resolution
Serial Port
===========
The MIMXRT1015 SoC has four UARTs. ``LPUART1`` is configured for the console,
and the remaining are not used.
Programming and Debugging
*************************
This board supports 3 debug host tools. Please install your preferred host
tool, then follow the instructions in `Configuring a Debug Probe`_ to
configure the board appropriately.
* :ref:`linkserver-debug-host-tools` (Default, Supported by NXP)
* :ref:`jlink-debug-host-tools` (Supported by NXP)
* :ref:`pyocd-debug-host-tools` (Not supported by NXP)
Once the host tool and board are configured, build and flash applications
as usual (see :ref:`build_an_application` and :ref:`application_run` for more
details).
Configuring a Debug Probe
=========================
For the RT1015, J47/J48 are the SWD isolation jumpers, J42 is the DFU
mode jumper, and J34 is the 10 pin JTAG/SWD header.
.. include:: ../../common/rt1xxx-lpclink2-debug.rst
:start-after: rt1xxx-lpclink2-probes
Configuring a Console
=====================
Regardless of your choice in debug probe, we will use the OpenSDA
microcontroller as a usb-to-serial adapter for the serial console. Check that
jumpers J45 and J46 are **on** (they are on by default when boards ship from
the factory) to connect UART signals to the OpenSDA microcontroller.
Connect a USB cable from your PC to J41.
Use the following settings with your serial terminal of choice (minicom, putty,
etc.):
- Speed: 115200
- Data: 8 bits
- Parity: None
- Stop bits: 1
Flashing
========
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: mimxrt1015_evk
:goals: flash
Open a serial terminal, reset the board (press the SW9 button), and you should
see the following message in the terminal:
.. code-block:: console
***** Booting Zephyr OS v1.14.0-rc1-1297-g312d75f2459e *****
Hello World! mimxrt1015_evk
.. _MIMXRT1015-EVK Website:
path_to_url
.. _MIMXRT1015-EVK Quick Reference Guide:
path_to_url
.. _MIMXRT1015-EVK Design Files:
path_to_url
.. _i.MX RT1015 Website:
path_to_url
.. _i.MX RT1015 Datasheet:
path_to_url
.. _i.MX RT1015 Reference Manual:
path_to_url
``` | /content/code_sandbox/boards/nxp/mimxrt1015_evk/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,008 |
```unknown
/*
*
*/
/dts-v1/;
#include <nxp/nxp_rt1010.dtsi>
#include "mimxrt1010_evk-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "NXP MIMXRT1010-EVK board";
compatible = "nxp,mimxrt1010";
aliases {
led0 = &green_led;
sw0 = &user_button;
};
chosen {
zephyr,sram = &ocram;
zephyr,itcm = &itcm;
zephyr,dtcm = &dtcm;
zephyr,console = &lpuart1;
zephyr,shell-uart = &lpuart1;
zephyr,flash = &at25sf128a;
zephyr,flash-controller = &at25sf128a;
zephyr,code-partition = &slot0_partition;
};
leds {
compatible = "gpio-leds";
green_led: led-1 {
gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
label = "User LD1";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button-1 {
label = "User SW4";
gpios = <&gpio2 5 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
zephyr,code = <INPUT_KEY_0>;
};
};
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpio1 21 0>, /* A0 */
<1 0 &gpio1 23 0>, /* A1 */
<2 0 &gpio1 24 0>, /* A2 */
<3 0 &gpio1 28 0>, /* A3 */
<4 0 &gpio1 15 0>, /* A4 (shared with D6) */
<5 0 &gpio1 16 0>, /* A5 (shared with D7) */
<6 0 &gpio1 9 0>, /* D0 */
<7 0 &gpio1 10 0>, /* D1 */
<8 0 &gpio1 19 0>, /* D2 (shared with D10) */
<9 0 &gpio1 20 0>, /* D3 (shared with D13) */
/* R800 not populated, D4 */
/* R793 not populated, D5 (shared with D14) */
<12 0 &gpio1 15 0>, /* D6 (shared with A4) */
<13 0 &gpio1 16 0>, /* D7 (shared with A5) */
<14 0 &gpio2 2 0>, /* D8 */
/* R795 not populated, D9 */
<16 0 &gpio1 19 0>, /* D10 (shared with D2) */
<17 0 &gpio1 18 0>, /* D11 */
<18 0 &gpio1 17 0>, /* D12 */
<19 0 &gpio1 20 0>, /* D13 (shared with D3) */
<20 0 &gpio1 1 0>, /* D14 */
<21 0 &gpio1 2 0>; /* D15 */
};
};
arduino_serial: &lpuart1 {};
&lpuart4 {
pinctrl-0 = <&pinmux_lpuart4>;
pinctrl-1 = <&pinmux_lpuart4_sleep>;
pinctrl-names = "default", "sleep";
};
&flexspi {
status = "okay";
reg = <0x400a0000 0x4000>, <0x60000000 DT_SIZE_M(16)>;
at25sf128a: at25sf128a@0 {
compatible = "nxp,imx-flexspi-nor";
size = <DT_SIZE_M(16 * 8)>;
reg = <0>;
spi-max-frequency = <133000000>;
status = "okay";
jedec-id = [1f 89 01];
erase-block-size = <4096>;
write-block-size = <1>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 DT_SIZE_K(128)>;
};
/* The MCUBoot swap-move algorithm uses the last 3 sectors
* of the primary slot0 for swap status and move.
*/
slot0_partition: partition@20000 {
label = "image-0";
reg = <0x00020000 (DT_SIZE_M(7) + DT_SIZE_K(12))>;
};
slot1_partition: partition@723000 {
label = "image-1";
reg = <0x00723000 DT_SIZE_M(7)>;
};
storage_partition: partition@E23000 {
label = "storage";
reg = <0x00E23000 (DT_SIZE_M(2) - DT_SIZE_K(140))>;
};
};
};
};
arduino_i2c: &lpi2c1 {
status = "okay";
pinctrl-0 = <&pinmux_lpi2c1>;
pinctrl-names = "default";
};
&lpuart1 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&pinmux_lpuart1>;
pinctrl-1 = <&pinmux_lpuart1_sleep>;
pinctrl-names = "default", "sleep";
};
arduino_spi: &lpspi1 {
status = "okay";
/* DMA channels 0 and 1, muxed to LPSPI1 RX and TX */
dmas = <&edma0 0 13>, <&edma0 1 14>;
dma-names = "rx", "tx";
pinctrl-0 = <&pinmux_lpspi1>;
pinctrl-names = "default";
};
zephyr_udc0: &usb1 {
status = "okay";
};
&adc1 {
status = "okay";
pinctrl-0 = <&pinmux_adc1>;
pinctrl-names = "default";
};
&sai1 {
pinctrl-0 = <&pinmux_sai1>;
pinctrl-names = "default";
};
&edma0 {
status = "okay";
};
/* GPT and Systick are enabled. If power management is enabled, the GPT
* timer will be used instead of systick, as allows the core clock to
* be gated.
*/
&gpt_hw_timer {
status = "okay";
};
&systick {
status = "okay";
};
&pit0 {
status = "okay";
};
``` | /content/code_sandbox/boards/nxp/mimxrt1010_evk/mimxrt1010_evk.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,601 |
```unknown
config BOARD_MIMXRT1010_EVK
select SOC_PART_NUMBER_MIMXRT1011DAE5A
``` | /content/code_sandbox/boards/nxp/mimxrt1010_evk/Kconfig.mimxrt1010_evk | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 28 |
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