text stringlengths 9 39.2M | dir stringlengths 25 226 | lang stringclasses 163 values | created_date timestamp[s] | updated_date timestamp[s] | repo_name stringclasses 751 values | repo_full_name stringclasses 752 values | star int64 1.01k 183k | len_tokens int64 1 18.5M |
|---|---|---|---|---|---|---|---|---|
```unknown
/*
*
*/
/dts-v1/;
#include <espressif/esp32c3/esp32c3_fx4.dtsi>
#include "stamp_c3-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "M5Stack STAMP-C3";
compatible = "m5stack,stamp_c3";
chosen {
zephyr,sram = &sram0;
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,bt-hci = &esp32_bt_hci;
};
aliases {
sw0 = &button0;
i2c-0 = &i2c0;
watchdog0 = &wdt0;
};
gpio_keys {
compatible = "gpio-keys";
button0: button0 {
label = "BTN";
gpios = <&gpio0 3 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
zephyr,code = <INPUT_KEY_0>;
};
};
};
&uart0 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart0_default>;
pinctrl-names = "default";
};
&usb_serial {
status = "okay";
};
&i2c0 {
status = "okay";
clock-frequency = <I2C_BITRATE_STANDARD>;
pinctrl-0 = <&i2c0_default>;
pinctrl-names = "default";
};
&trng0 {
status = "okay";
};
&spi2 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
pinctrl-0 = <&spim2_default>;
pinctrl-names = "default";
};
&gpio0 {
status = "okay";
};
&wdt0 {
status = "okay";
};
&timer0 {
status = "disabled";
};
&timer1 {
status = "disabled";
};
&twai {
/* requires external CAN transceiver or jumper on RX and TX pins for loopback testing */
status = "disabled";
pinctrl-0 = <&twai_default>;
pinctrl-names = "default";
};
&flash0 {
status = "okay";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* Reserve 60kB for the bootloader */
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 0x0000F000>;
read-only;
};
/* Reserve 1024kB for the application in slot 0 */
slot0_partition: partition@10000 {
label = "image-0";
reg = <0x00010000 0x00100000>;
};
/* Reserve 1024kB for the application in slot 1 */
slot1_partition: partition@110000 {
label = "image-1";
reg = <0x00110000 0x00100000>;
};
/* Reserve 256kB for the scratch partition */
scratch_partition: partition@210000 {
label = "image-scratch";
reg = <0x00210000 0x00040000>;
};
storage_partition: partition@250000 {
label = "storage";
reg = <0x00250000 0x00006000>;
};
};
};
&esp32_bt_hci {
status = "okay";
};
``` | /content/code_sandbox/boards/m5stack/stamp_c3/stamp_c3.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 807 |
```ini
set ESP_RTOS none
source [find interface/esp_usb_jtag.cfg]
source [find target/esp32c3.cfg]
adapter speed 5000
``` | /content/code_sandbox/boards/m5stack/stamp_c3/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 36 |
```cmake
if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*")
set(OPENOCD OPENOCD-NOTFOUND)
endif()
find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH)
include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake)
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
``` | /content/code_sandbox/boards/m5stack/m5stack_core2/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 102 |
```restructuredtext
.. _stamp_c3:
M5Stack STAMP-C3
##################
Overview
********
STAMP-C3 featuring ESPRESSIF ESP32-C3 RISC-V MCU with Wi-Fi connectivity
for IoT edge devices such as home appliances and Industrial Automation.
For more details see the `M5Stack STAMP-C3`_ page.
Supported Features
==================
The STAMP-C3 board configuration supports the following hardware features:
+-----------+------------+------------------+
| Interface | Controller | Driver/Component |
+===========+============+==================+
| PMP | on-chip | arch/riscv |
+-----------+------------+------------------+
| INTMTRX | on-chip | intc_esp32c3 |
+-----------+------------+------------------+
| PINMUX | on-chip | pinctrl_esp32 |
+-----------+------------+------------------+
| USB UART | on-chip | serial_esp32_usb |
+-----------+------------+------------------+
| GPIO | on-chip | gpio_esp32 |
+-----------+------------+------------------+
| UART | on-chip | uart_esp32 |
+-----------+------------+------------------+
| I2C | on-chip | i2c_esp32 |
+-----------+------------+------------------+
| SPI | on-chip | spi_esp32_spim |
+-----------+------------+------------------+
| TWAI | on-chip | can_esp32_twai |
+-----------+------------+------------------+
Prerequisites
*************
Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command
below to retrieve those files.
.. code-block:: console
west blobs fetch hal_espressif
.. note::
It is recommended running the command above after :file:`west update`.
Building & Flashing
*******************
ESP-IDF bootloader
==================
The board is using the ESP-IDF bootloader as the default 2nd stage bootloader.
It is build as a subproject at each application build. No further attention
is expected from the user.
MCUboot bootloader
==================
User may choose to use MCUboot bootloader instead. In that case the bootloader
must be build (and flash) at least once.
There are two options to be used when building an application:
1. Sysbuild
2. Manual build
.. note::
User can select the MCUboot bootloader by adding the following line
to the board default configuration file.
.. code:: cfg
CONFIG_BOOTLOADER_MCUBOOT=y
Sysbuild
========
The sysbuild makes possible to build and flash all necessary images needed to
bootstrap the board with the ESP32 SoC.
To build the sample application using sysbuild use the command:
.. zephyr-app-commands::
:tool: west
:app: samples/hello_world
:board: stamp_c3
:goals: build
:west-args: --sysbuild
:compact:
By default, the ESP32 sysbuild creates bootloader (MCUboot) and application
images. But it can be configured to create other kind of images.
Build directory structure created by sysbuild is different from traditional
Zephyr build. Output is structured by the domain subdirectories:
.. code-block::
build/
hello_world
zephyr
zephyr.elf
zephyr.bin
mcuboot
zephyr
zephyr.elf
zephyr.bin
domains.yaml
.. note::
With ``--sysbuild`` option the bootloader will be re-build and re-flash
every time the pristine build is used.
For more information about the system build please read the :ref:`sysbuild` documentation.
Manual build
============
During the development cycle, it is intended to build & flash as quickly possible.
For that reason, images can be build one at a time using traditional build.
The instructions following are relevant for both manual build and sysbuild.
The only difference is the structure of the build directory.
.. note::
Remember that bootloader (MCUboot) needs to be flash at least once.
Build and flash applications as usual (see :ref:`build_an_application` and
:ref:`application_run` for more details).
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: stamp_c3
:goals: build
The usual ``flash`` target will work with the ``stamp_c3`` board
configuration. Here is an example for the :ref:`hello_world`
application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: stamp_c3
:goals: flash
Open the serial monitor using the following command:
.. code-block:: shell
west espressif monitor
After the board has automatically reset and booted, you should see the following
message in the monitor:
.. code-block:: console
***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx *****
Hello World! stamp_c3
Debugging
*********
As with much custom hardware, the ESP32 modules require patches to
OpenOCD that are not upstreamed yet. Espressif maintains their own fork of
the project. The custom OpenOCD can be obtained at `OpenOCD ESP32`_
The Zephyr SDK uses a bundled version of OpenOCD by default. You can overwrite that behavior by adding the
``-DOPENOCD=<path/to/bin/openocd> -DOPENOCD_DEFAULT_PATH=<path/to/openocd/share/openocd/scripts>``
parameter when building.
Here is an example for building the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: stamp_c3
:goals: build flash
:gen-args: -DOPENOCD=<path/to/bin/openocd> -DOPENOCD_DEFAULT_PATH=<path/to/openocd/share/openocd/scripts>
You can debug an application in the usual way. Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: stamp_c3
:goals: debug
References
**********
.. target-notes::
.. _`M5Stack STAMP-C3`: path_to_url
.. _`ESP32C3 Technical Reference Manual`: path_to_url
.. _`ESP32C3 Datasheet`: path_to_url
.. _`OpenOCD ESP32`: path_to_url
``` | /content/code_sandbox/boards/m5stack/stamp_c3/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,429 |
```unknown
# M5Stack Core2 board configuration
config BOARD_M5STACK_CORE2
select SOC_ESP32_D0WD_V3
select SOC_ESP32_PROCPU if BOARD_M5STACK_CORE2_ESP32_PROCPU
select SOC_ESP32_APPCPU if BOARD_M5STACK_CORE2_ESP32_APPCPU
``` | /content/code_sandbox/boards/m5stack/m5stack_core2/Kconfig.m5stack_core2 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 69 |
```unknown
CONFIG_MAIN_STACK_SIZE=2048
CONFIG_ESP_HEAP_MEM_POOL_REGION_1_SIZE=0
CONFIG_GPIO=y
CONFIG_REGULATOR=y
CONFIG_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_UART_CONSOLE=y
# for debugging
CONFIG_SHELL=y
``` | /content/code_sandbox/boards/m5stack/m5stack_core2/m5stack_core2_procpu_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 54 |
```yaml
board:
name: m5stack_core2
vendor: m5stack
socs:
- name: esp32
``` | /content/code_sandbox/boards/m5stack/m5stack_core2/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 30 |
```unknown
/*
*/
/ {
m5stack_mbus_header: m5stack_mbus_connector {
compatible = "m5stack,mbus-header";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = /* 0 GND */
<1 0 &gpio1 4 0>, /* ADC0 */
/* 2 GND */
<3 0 &gpio1 5 0>, /* ADC1 */
/* 4 GND */
/* 5 RESET */
<6 0 &gpio0 23 0>, /* MOSI */
<7 0 &gpio0 25 0>, /* DAC0 */
<8 0 &gpio1 7 0>, /* MISO */
<9 0 &gpio0 26 0>, /* DAC1 */
<10 0 &gpio0 18 0>, /* SCK */
/* 11 3.3V */
<12 0 &gpio0 3 0>, /* RXD0 */
<13 0 &gpio0 1 0>, /* TXD0 */
<14 0 &gpio0 13 0>, /* RXD1 */
<15 0 &gpio0 14 0>, /* TXD1 */
<16 0 &gpio0 21 0>, /* intSDA */
<17 0 &gpio0 22 0>, /* intSCL */
<18 0 &gpio1 0 0>, /* SDA */
<19 0 &gpio1 1 0>, /* SCL */
<20 0 &gpio0 27 0>, /* GPIO */
<21 0 &gpio0 19 0>, /* GPIO */
<22 0 &gpio0 2 0>, /* GPIO */
<23 0 &gpio0 0 0>, /* GPIO */
/* 24 NC */
<25 0 &gpio1 3 0>; /* GPIO */
/* 26 NC */
/* 27 5V */
/* 28 NC */
/* 29 BAT */
};
};
m5stack_mbus_i2c0: &i2c0 {};
m5stack_mbus_i2c1: &i2c1 {};
m5stack_mbus_uart0: &uart1 {};
m5stack_mbus_uart1: &uart2 {};
m5stack_mbus_spi: &spi3 {};
``` | /content/code_sandbox/boards/m5stack/m5stack_core2/m5stack_mbus_connectors.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 575 |
```unknown
/*
*
*/
/dts-v1/;
#include <espressif/esp32/esp32_d0wd_v3.dtsi>
#include "m5stack_core2-pinctrl.dtsi"
#include "grove_connectors.dtsi"
#include "m5stack_mbus_connectors.dtsi"
#include <zephyr/dt-bindings/display/ili9xxx.h>
#include <zephyr/dt-bindings/regulator/axp192.h>
/ {
model = "M5Stack Core2 PROCPU";
compatible = "m5stack,core2";
aliases {
pwr-led = &pwr_led;
uart-0 = &uart0;
i2c-0 = &i2c0;
watchdog0 = &wdt0;
rtc = &pfc8563_rtc;
led0 = &led_pwr;
sdhc0 = &sd0;
};
chosen {
zephyr,sram = &sram0;
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,flash = &flash0;
zephyr,display = &ili9342c;
zephyr,code-partition = &slot0_partition;
zephyr,rtc = &pfc8563_rtc;
zephyr,bt-hci = &esp32_bt_hci;
};
leds {
compatible = "gpio-leds";
led_pwr: led_pwr {
gpios = <&axp192_gpio 1 (GPIO_OPEN_DRAIN | GPIO_ACTIVE_LOW)>;
label = "Power LED";
};
};
lvgl_pointer {
compatible = "zephyr,lvgl-pointer-input";
input = <&ft5336_touch>;
swap-xy;
};
mipi_dbi {
compatible = "zephyr,mipi-dbi-spi";
dc-gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
reset-gpios = <&axp192_gpio 4 (GPIO_OPEN_DRAIN | GPIO_ACTIVE_LOW)>;
spi-dev = <&spi3>;
write-only;
#address-cells = <1>;
#size-cells = <0>;
ili9342c: ili9342c@0 {
compatible = "ilitek,ili9342c";
mipi-max-frequency = <30000000>;
reg = <0>;
vin-supply = <&lcd_bg>;
pixel-format = <ILI9XXX_PIXEL_FORMAT_RGB565>;
display-inversion;
width = <320>;
height = <240>;
rotation = <0>;
};
};
};
&psram0 {
reg = <0x3f800000 DT_SIZE_M(8)>;
status = "disabled";
};
&uart0 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart0_tx_gpio1 &uart0_rx_gpio3>;
pinctrl-names = "default";
};
&uart1 {
status = "disabled";
current-speed = <115200>;
pinctrl-0 = <&uart1_rx_gpio33 &uart1_tx_gpio32>;
pinctrl-names = "default";
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&i2c0 {
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
sda-gpios = <&gpio0 21 GPIO_OPEN_DRAIN>;
scl-gpios = <&gpio0 22 GPIO_OPEN_DRAIN>;
pinctrl-0 = <&i2c0_default>;
scl-timeout-us = <0>;
pinctrl-names = "default";
pfc8563_rtc: pfc8563@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
status = "okay";
};
axp192_pmic: axp192@34 {
compatible = "x-powers,axp192";
reg = <0x34>;
status = "okay";
axp192_regulator: axp192_regulator {
compatible = "x-powers,axp192-regulator";
status = "okay";
vdd_mcu: DCDC1 {
regulator-init-microvolt = <3350000>;
regulator-min-microvolt = <3200000>;
regulator-max-microvolt = <3400000>;
regulator-initial-mode = <AXP192_DCDC_MODE_AUTO>;
regulator-boot-on;
regulator-always-on;
};
lcd_bg: DCDC3 {
regulator-init-microvolt = <2800000>;
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
};
v_peri: LDO2 {
regulator-init-microvolt = <3300000>;
regulator-min-microvolt = <3200000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
};
vib_motor: LDO3 {
regulator-init-microvolt = <2800000>;
};
};
axp192_gpio: axp192_gpio {
compatible = "x-powers,axp192-gpio";
gpio-controller;
#gpio-cells = <2>;
ngpios = <6>;
status = "okay";
pwr_led: axp192_gpio1 {
gpio-hog;
gpios = <1 (GPIO_OPEN_DRAIN | GPIO_ACTIVE_LOW)>;
output-high;
line-name = "pwr-led";
};
bus_pwr_en: axp192_gpio0 {
gpio-hog;
gpios = <0 0>;
output-high;
line-name = "bus_pwr_en";
};
};
};
bus_5v: bus_5v {
compatible = "regulator-fixed";
regulator-name = "bus_5v";
enable-gpios = <&axp192_gpio 5 GPIO_ACTIVE_HIGH>;
};
ft5336_touch: ft5336@38 {
compatible = "focaltech,ft5336";
reg = <0x38>;
int-gpios = <&gpio1 7 0>;
};
};
&i2c1 {
status = "disabled";
clock-frequency = <I2C_BITRATE_STANDARD>;
sda-gpios = <&gpio1 0 GPIO_OPEN_DRAIN>;
scl-gpios = <&gpio1 1 GPIO_OPEN_DRAIN>;
pinctrl-0 = <&i2c1_default>;
pinctrl-names = "default";
};
&spi3 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
pinctrl-0 = <&spim3_default>;
pinctrl-names = "default";
dma-enabled;
clock-frequency = <20000000>;
cs-gpios = <&gpio0 5 GPIO_ACTIVE_LOW>,
<&gpio0 4 GPIO_ACTIVE_LOW>;
sd0: sd@1 {
compatible = "zephyr,sdhc-spi-slot";
reg = <1>;
status = "okay";
spi-max-frequency = <20000000>;
mmc {
compatible = "zephyr,sdmmc-disk";
status = "okay";
};
};
};
&timer0 {
status = "okay";
};
&timer1 {
status = "okay";
};
&timer2 {
status = "okay";
};
&timer3 {
status = "okay";
};
&trng0 {
status = "okay";
};
&flash0 {
status = "okay";
reg = <0 DT_SIZE_M(16)>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* Reserve 60kB for the bootloader */
boot_partition: partition@1000 {
label = "mcuboot";
reg = <0x00001000 0x0000F000>;
read-only;
};
/* Reserve 1024kB for the application in slot 0 */
slot0_partition: partition@10000 {
label = "image-0";
reg = <0x00010000 0x00100000>;
};
/* Reserve 1024kB for the application in slot 1 */
slot1_partition: partition@110000 {
label = "image-1";
reg = <0x00110000 0x00100000>;
};
/* Reserve 256kB for the scratch partition */
scratch_partition: partition@210000 {
label = "image-scratch";
reg = <0x00210000 0x00040000>;
};
/* 14MB storage */
storage_partition: partition@250000 {
label = "storage";
reg = <0x00250000 0x00db0000>;
};
};
};
&esp32_bt_hci {
status = "okay";
};
``` | /content/code_sandbox/boards/m5stack/m5stack_core2/m5stack_core2_procpu.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,018 |
```unknown
CONFIG_MAIN_STACK_SIZE=2048
CONFIG_CLOCK_CONTROL=y
``` | /content/code_sandbox/boards/m5stack/m5stack_core2/m5stack_core2_appcpu_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 15 |
```yaml
identifier: m5stack_core2/esp32/procpu
name: M5Stack Core2 PROCPU
type: mcu
arch: xtensa
toolchain:
- zephyr
supported:
- gpio
- i2c
- spi
- watchdog
- regulator
- uart
- pinmux
- nvs
testing:
ignore_tags:
- net
- bluetooth
vendor: m5stack
``` | /content/code_sandbox/boards/m5stack/m5stack_core2/m5stack_core2_procpu.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 101 |
```unknown
/*
*/
/ {
grove_header: grove_header {
compatible = "grove-header";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpio1 1 0>, /* D0/SCL/RX */
<1 0 &gpio1 0 0>; /* D1/SDA/TX */
};
};
grove_i2c: &i2c1 {};
grove_uart: &uart1 {};
``` | /content/code_sandbox/boards/m5stack/m5stack_core2/grove_connectors.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 133 |
```unknown
# M5Stack Core2 board configuration
if BOARD_M5STACK_CORE2_ESP32_PROCPU
config HEAP_MEM_POOL_ADD_SIZE_BOARD
int
default 65535 if WIFI && BT
default 51200 if WIFI
default 65536 if BT
default 4096
config KERNEL_MEM_POOL
default y
config GPIO_HOGS_INIT_PRIORITY
default 70
config MFD_INIT_PRIORITY
default 70
config REGULATOR_AXP192_INIT_PRIORITY
default 71
config GPIO_AXP192_INIT_PRIORITY
default 72
config REGULATOR_FIXED_INIT_PRIORITY
default 75
config INPUT_FT5336_INTERRUPT
default y if INPUT
config INPUT
default y
config LV_COLOR_16_SWAP
default y if LVGL
# Increase initialization priority of MIPI DBI device, so that it initializes
# after the GPIO controller
if MIPI_DBI
config MIPI_DBI_INIT_PRIORITY
default 82
endif # MIPI_DBI
endif # BOARD_M5STACK_CORE2_ESP32_PROCPU
if BOARD_M5STACK_CORE2_ESP32_APPCPU
config HEAP_MEM_POOL_ADD_SIZE_BOARD
default 256
endif # BOARD_M5STACK_CORE2_ESP32_APPCPU
``` | /content/code_sandbox/boards/m5stack/m5stack_core2/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 258 |
```yaml
identifier: m5stack_core2/esp32/appcpu
name: M5Stack Core2 APPCPU
type: mcu
arch: xtensa
toolchain:
- zephyr
supported:
- uart
testing:
ignore_tags:
- net
- bluetooth
- flash
- cpp
- posix
- watchdog
- logging
- kernel
- pm
- gpio
- crypto
- eeprom
- heap
- cmsis_rtos
- jwt
- zdsp
vendor: m5stack
``` | /content/code_sandbox/boards/m5stack/m5stack_core2/m5stack_core2_appcpu.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 130 |
```unknown
/*
*
*/
#include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
#include <dt-bindings/pinctrl/esp32-pinctrl.h>
#include <zephyr/dt-bindings/pinctrl/esp32-gpio-sigmap.h>
&pinctrl {
uart0_tx_gpio1: uart0_tx_gpio1 {
pinmux = <UART0_TX_GPIO1>;
};
uart0_rx_gpio3: uart0_rx_gpio3 {
pinmux = <UART0_RX_GPIO3>;
bias-pull-up;
};
uart1_rx_gpio33: uart1_rx_gpio33 {
pinmux = <UART1_RX_GPIO33>;
};
uart2_rx_gpio13: uart2_rx_gpio13 {
pinmux = <UART2_RX_GPIO13>;
};
uart2_tx_gpio14: uart2_rx_gpio14 {
pinmux = <UART2_TX_GPIO14>;
};
uart1_tx_gpio32: uart1_tx_gpio32 {
pinmux = <UART1_TX_GPIO32>;
};
spim3_default: spim3_default {
group1 {
pinmux = <SPIM3_MISO_GPIO38>,
<SPIM3_SCLK_GPIO18>;
};
group2 {
pinmux = <SPIM3_MOSI_GPIO23>;
output-low;
};
};
i2c0_default: i2c0_default {
group1 {
pinmux = <I2C0_SDA_GPIO21>,
<I2C0_SCL_GPIO22>;
drive-open-drain;
output-high;
};
};
i2c1_default: i2c1_default {
group1 {
pinmux = <I2C1_SDA_GPIO32>,
<I2C1_SCL_GPIO33>;
drive-open-drain;
output-high;
};
};
};
``` | /content/code_sandbox/boards/m5stack/m5stack_core2/m5stack_core2-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 419 |
```ini
set ESP_RTOS none
set ESP32_ONLYCPU 1
source [find interface/ftdi/esp32_devkitj_v1.cfg]
source [find target/esp32.cfg]
``` | /content/code_sandbox/boards/m5stack/m5stack_core2/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 41 |
```unknown
/*
*
*/
/dts-v1/;
#include <espressif/esp32/esp32_appcpu.dtsi>
/ {
model = "M5Stack Core2 APPCPU";
compatible = "espressif,esp32";
chosen {
zephyr,sram = &sram0;
zephyr,ipc_shm = &shm0;
zephyr,ipc = &ipm0;
};
};
&ipm0 {
status = "okay";
};
&trng0 {
status = "okay";
};
&flash0 {
status = "okay";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* Reserve 60kB for the bootloader */
boot_partition: partition@1000 {
label = "mcuboot";
reg = <0x00001000 0x0000F000>;
read-only;
};
/* Reserve 1024kB for the application in slot 0 */
slot0_partition: partition@10000 {
label = "image-0";
reg = <0x00010000 0x00100000>;
};
/* Reserve 1024kB for the application in slot 1 */
slot1_partition: partition@110000 {
label = "image-1";
reg = <0x00110000 0x00100000>;
};
/* Reserve 256kB for the scratch partition */
scratch_partition: partition@210000 {
label = "image-scratch";
reg = <0x00210000 0x00040000>;
};
storage_partition: partition@250000 {
label = "storage";
reg = <0x00250000 0x00006000>;
};
};
};
``` | /content/code_sandbox/boards/m5stack/m5stack_core2/m5stack_core2_appcpu.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 403 |
```unknown
CONFIG_MAIN_STACK_SIZE=2048
CONFIG_CLOCK_CONTROL=y
``` | /content/code_sandbox/boards/m5stack/m5stack_atom_lite/m5stack_atom_lite_appcpu_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 15 |
```unknown
/*
*
*/
#include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
#include <dt-bindings/pinctrl/esp32-pinctrl.h>
#include <zephyr/dt-bindings/pinctrl/esp32-gpio-sigmap.h>
&pinctrl {
uart0_default: uart0_default {
group1 {
pinmux = <UART0_TX_GPIO1>;
output-high;
};
group2 {
pinmux = <UART0_RX_GPIO3>;
bias-pull-up;
};
};
i2c0_default: i2c0_default {
group1 {
pinmux = <I2C0_SDA_GPIO25>,
<I2C0_SCL_GPIO21>;
bias-pull-up;
drive-open-drain;
output-high;
};
};
i2c1_default: i2c1_default {
group1 {
pinmux = <I2C0_SDA_GPIO26>,
<I2C0_SCL_GPIO32>;
bias-pull-up;
drive-open-drain;
output-high;
};
};
spim2_default: spim2_default {
group1 {
pinmux = <SPIM2_MISO_GPIO33>,
<SPIM2_SCLK_GPIO23>,
<SPIM2_CSEL_GPIO22>;
};
group2 {
pinmux = <SPIM2_MOSI_GPIO19>;
output-low;
};
};
/* used for SK6812 */
spim3_ws2812_led: spim3_ws2812_led {
group1 {
pinmux = <SPIM3_MOSI_GPIO27>;
output-low;
};
};
};
``` | /content/code_sandbox/boards/m5stack/m5stack_atom_lite/m5stack_atom_lite-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 381 |
```cmake
if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*")
set(OPENOCD OPENOCD-NOTFOUND)
endif()
find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH)
include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake)
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
# the default ESP32 baud rate is not supported
board_runner_args(esp32 "--esp-baud-rate=1500000")
``` | /content/code_sandbox/boards/m5stack/m5stack_atom_lite/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 129 |
```yaml
identifier: m5stack_atom_lite/esp32/procpu
name: M5Stack ATOM Lite
type: mcu
arch: xtensa
toolchain:
- zephyr
supported:
- gpio
- i2c
- spi
- watchdog
- uart
- pinmux
- nvs
testing:
ignore_tags:
- net
- bluetooth
vendor: m5stack
``` | /content/code_sandbox/boards/m5stack/m5stack_atom_lite/m5stack_atom_lite_procpu.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 96 |
```unknown
# M5Stack Atom Lite board configuration
config BOARD_M5STACK_ATOM_LITE
select SOC_ESP32_PICO_D4
select SOC_ESP32_PROCPU if BOARD_M5STACK_ATOM_LITE_ESP32_PROCPU
select SOC_ESP32_APPCPU if BOARD_M5STACK_ATOM_LITE_ESP32_APPCPU
``` | /content/code_sandbox/boards/m5stack/m5stack_atom_lite/Kconfig.m5stack_atom_lite | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 71 |
```yaml
identifier: m5stack_atom_lite/esp32/appcpu
name: M5Stack ATOM Lite
type: mcu
arch: xtensa
toolchain:
- zephyr
supported:
- uart
testing:
ignore_tags:
- net
- bluetooth
- flash
- cpp
- posix
- watchdog
- logging
- kernel
- pm
- gpio
- crypto
- eeprom
- heap
- cmsis_rtos
- jwt
- zdsp
vendor: m5stack
``` | /content/code_sandbox/boards/m5stack/m5stack_atom_lite/m5stack_atom_lite_appcpu.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 129 |
```yaml
board:
name: m5stack_atom_lite
vendor: m5stack
socs:
- name: esp32
``` | /content/code_sandbox/boards/m5stack/m5stack_atom_lite/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 30 |
```unknown
/*
*
*/
/dts-v1/;
#include <espressif/esp32/esp32_appcpu.dtsi>
/ {
model = "M5Stack Atom Lite APPCPU";
compatible = "espressif,esp32";
chosen {
zephyr,sram = &sram0;
zephyr,ipc_shm = &shm0;
zephyr,ipc = &ipm0;
};
};
&ipm0 {
status = "okay";
};
&trng0 {
status = "okay";
};
&flash0 {
status = "okay";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* Reserve 60kB for the bootloader */
boot_partition: partition@1000 {
label = "mcuboot";
reg = <0x00001000 0x0000F000>;
read-only;
};
/* Reserve 1024kB for the application in slot 0 */
slot0_partition: partition@10000 {
label = "image-0";
reg = <0x00010000 0x00100000>;
};
/* Reserve 1024kB for the application in slot 1 */
slot1_partition: partition@110000 {
label = "image-1";
reg = <0x00110000 0x00100000>;
};
/* Reserve 256kB for the scratch partition */
scratch_partition: partition@210000 {
label = "image-scratch";
reg = <0x00210000 0x00040000>;
};
storage_partition: partition@250000 {
label = "storage";
reg = <0x00250000 0x00006000>;
};
};
};
``` | /content/code_sandbox/boards/m5stack/m5stack_atom_lite/m5stack_atom_lite_appcpu.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 403 |
```unknown
# M5Stack ATOM Lite board configuration
if BOARD_M5STACK_ATOM_LITE_ESP32_PROCPU
config HEAP_MEM_POOL_ADD_SIZE_BOARD
int
default 65535 if WIFI && BT
default 51200 if WIFI
default 40960 if BT
default 4096
endif # BOARD_M5STACK_ATOM_LITE_ESP32_PROCPU
if BOARD_M5STACK_ATOM_LITE_ESP32_APPCPU
config HEAP_MEM_POOL_ADD_SIZE_BOARD
default 256
endif # BOARD_M5STACK_ATOM_LITE_ESP32_APPCPU
``` | /content/code_sandbox/boards/m5stack/m5stack_atom_lite/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 119 |
```restructuredtext
.. _m5stack_core2:
M5Stack Core2
#############
Overview
********
M5Stack Core2 is an ESP32-based development board from M5Stack. It is the successor for the Core module.
M5Stack Core2 features the following integrated components:
- ESP32-D0WDQ6-V3 chip (240MHz dual core, 600 DMIPS, 520KB SRAM, Wi-Fi)
- PSRAM 8MB
- Flash 16MB
- LCD IPS TFT 2", 320x240 px screen (ILI9342C)
- Touch screen (FT6336U)
- PMU AXP192
- Audio NS4168 amplifier (1W-092 speaker)
- Vibration motor
- RTC BM8563
- USB CP2104
- SD-Card slot
- Grove connector
- IMO 6-axis IMU MPU6886
- MIC SPM1423
- Battery 390mAh 3,7V
.. figure:: img/m5stack_core2.webp
:align: center
:alt: M5Stack-Core2
:width: 400 px
M5Stack-Core2 module
Functional Description
**********************
The following table below describes the key components, interfaces, and controls
of the M5Stack Core2 board.
.. _M5Core2 Schematic: path_to_url
.. _MPU-ESP32: path_to_url
.. _TOUCH-FT6336U: path_to_url_20151112-%20EN.xlsx
.. _SND-NS4168: path_to_url
.. _MPU-6886: path_to_url
.. _LCD-ILI9342C: path_to_url
.. _SPM-1423: path_to_url
.. _RTC-BM8563: path_to_url
.. _SY7088: path_to_url
.. _PMU-AXP192: path_to_url
.. _VIB-1072_RFN01: path_to_url
+------------------+your_sha256_hash----------+-----------+
| Key Component | Description | Status |
+==================+==========================================================================+===========+
| ESP32-D0WDQ6-V2 | This `MPU-ESP32`_ module provides complete Wi-Fi and Bluetooth | supported |
| module | functionalities and integrates a 16-MB SPI flash. | |
+------------------+your_sha256_hash----------+-----------+
| 32.768 kHz RTC | External precision 32.768 kHz crystal oscillator serves as a clock with | supported |
| | low-power consumption while the chip is in Deep-sleep mode. | |
+------------------+your_sha256_hash----------+-----------+
| Status LED | One user LED connected to the GPIO pin. | supported |
+------------------+your_sha256_hash----------+-----------+
| USB Port | USB interface. Power supply for the board as well as the | supported |
| | communication interface between a computer and the board. | |
| | Contains: TypeC x 1, GROVE(I2C+I/O+UART) x 1 | |
+------------------+your_sha256_hash----------+-----------+
| Reset button | Reset button | supported |
+------------------+your_sha256_hash----------+-----------+
| Power Switch | Power on/off button. | supported |
+------------------+your_sha256_hash----------+-----------+
| LCD screen | Built-in LCD TFT display \(`LCD-ILI9342C`_, 2", 320x240 px\) | supported |
| | controlled via SPI interface | |
+------------------+your_sha256_hash----------+-----------+
| SD-Card slot | SD-Card connection via SPI-mode. | supported |
+------------------+your_sha256_hash----------+-----------+
| 6-axis IMU | The `MPU-6886`_ is a 6-axis motion tracker (6DOF IMU) device that | supported |
| MPU6886 | combines a 3-axis gyroscope and a 3-axis accelerometer. | |
| | For details please refer to :ref:`m5stack_core2_ext` | |
+------------------+your_sha256_hash----------+-----------+
| Grove port | Note: Grove port requires 5V to be enabled via `bus_5v` regulator | supported |
+------------------+your_sha256_hash----------+-----------+
| Built-in | The `SPM-1423`_ I2S driven microphone. | todo |
| microphone | | |
+------------------+your_sha256_hash----------+-----------+
| Built-in speaker | 1W speaker for audio output via I2S interface. | todo |
+------------------+your_sha256_hash----------+-----------+
| Battery-support | Power supply via battery is supported automatically. But there is no | todo |
| | possibility to query current battery status. | |
+------------------+your_sha256_hash----------+-----------+
Power supply
============
M5Stack Core2 module is equipped with the feature-rich power management IC
(:dtcompatible:`x-powers,axp192-regulator`).
Following regulators are utilized on this module:
- **vdd_mcu**:
Main power supply for the MCU.
- **lcd_bg**:
Display backlight voltage.
- **v_peri**:
Periphal supply. This regulator controls supply for the display, SD-Card.
- **vib_motor**:
Vibration motor regulator.
- **bus_5v**
BUS_5V supply for Grove port.
Note: This fixed regulator supply is disabled by default.
These voltages can be controlled via regulator api.
Supported Features
==================
The Zephyr m5stack_core2 board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| CLOCK | on-chip | reset and clock control |
+-----------+------------+-------------------------------------+
| COUNTER | on-chip | rtc |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | independent watchdog |
+-----------+------------+-------------------------------------+
| PWM | on-chip | pwm |
+-----------+------------+-------------------------------------+
| ADC | on-chip | adc |
+-----------+------------+-------------------------------------+
| DAC | on-chip | dac |
+-----------+------------+-------------------------------------+
| die-temp | on-chip | die temperature sensor |
+-----------+------------+-------------------------------------+
Start Application Development
*****************************
Before powering up your M5Stack Core2, please make sure that the board is in good
condition with no obvious signs of damage.
System requirements
===================
Prerequisites
-------------
Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command
below to retrieve those files.
.. code-block:: console
west blobs fetch hal_espressif
.. note::
It is recommended running the command above after :file:`west update`.
Building & Flashing
-------------------
Build and flash applications as usual (see :ref:`build_an_application` and
:ref:`application_run` for more details).
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: m5stack_core2/esp32/procpu
:goals: build
The usual ``flash`` target will work with the ``m5stack_core2`` board
configuration. Here is an example for the :ref:`hello_world`
application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: m5stack_core2/esp32/procpu
:goals: flash
The baud rate of 921600bps is set by default. If experiencing issues when flashing,
try using different values by using ``--esp-baud-rate <BAUD>`` option during
``west flash`` (e.g. ``west flash --esp-baud-rate 115200``).
You can also open the serial monitor using the following command:
.. code-block:: shell
west espressif monitor
After the board has automatically reset and booted, you should see the following
message in the monitor:
.. code-block:: console
***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx *****
Hello World! m5stack_core2
Debugging
---------
M5Stack Core2 debugging is not supported due to pinout limitations.
Related Documents
*****************
- `M5Stack-Core2 schematic <path_to_url`_ (PDF)
- `ESP32-PICO-D4 Datasheet <path_to_url`_ (PDF)
- `M5Stack-Core2 docs <path_to_url`_
- `ESP32 Datasheet <path_to_url`_ (PDF)
- `ESP32 Hardware Reference <path_to_url`_
``` | /content/code_sandbox/boards/m5stack/m5stack_core2/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,060 |
```unknown
CONFIG_MAIN_STACK_SIZE=2048
CONFIG_GPIO=y
CONFIG_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_UART_CONSOLE=y
``` | /content/code_sandbox/boards/m5stack/m5stack_atom_lite/m5stack_atom_lite_procpu_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 27 |
```unknown
/*
*/
/ {
grove_header: grove_header {
compatible = "grove-header";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpio0 26 0>,
<1 0 &gpio1 0 0>;
};
};
grove_i2c1: &i2c1 {};
``` | /content/code_sandbox/boards/m5stack/m5stack_atom_lite/grove_connectors.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 106 |
```unknown
/*
*
*/
/dts-v1/;
#include <espressif/esp32/esp32_pico_d4.dtsi>
#include "m5stack_atom_lite-pinctrl.dtsi"
#include "grove_connectors.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
#include <zephyr/dt-bindings/led/led.h>
#include <zephyr/dt-bindings/led/worldsemi_ws2812c.h>
/ {
model = "M5Stack ATOM Lite PROCPU";
compatible = "m5stack,m5stack-atom-lite";
chosen {
zephyr,sram = &sram0;
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,bt-hci = &esp32_bt_hci;
};
aliases {
sw0 = &user_button_0;
watchdog0 = &wdt0;
i2c-0 = &i2c0;
led-strip = &status_rgb_led;
};
leds {
compatible = "gpio-leds";
ir_led: led_0 {
gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
label = "Infrared LED";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button_0: button_0 {
label = "User button 0";
gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; // G39
zephyr,code = <INPUT_KEY_0>;
};
};
};
&uart0 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart0_default>;
pinctrl-names = "default";
};
&i2c0 {
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
pinctrl-0 = <&i2c0_default>;
pinctrl-names = "default";
sda-gpios = <&gpio0 25 GPIO_OPEN_DRAIN>;
scl-gpios = <&gpio0 21 GPIO_OPEN_DRAIN>;
};
&i2c1 {
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
pinctrl-0 = <&i2c1_default>;
pinctrl-names = "default";
sda-gpios = <&gpio0 26 GPIO_OPEN_DRAIN>;
scl-gpios = <&gpio1 0 GPIO_OPEN_DRAIN>;
};
&timer0 {
status = "okay";
};
&timer1 {
status = "okay";
};
&timer2 {
status = "okay";
};
&timer3 {
status = "okay";
};
&trng0 {
status = "okay";
};
&spi2 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&spim2_default>;
pinctrl-names = "default";
};
/* used for SK6812 */
&spi3 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
line-idle-low;
pinctrl-0 = <&spim3_ws2812_led>;
pinctrl-names = "default";
status_rgb_led: ws2812@0 {
compatible = "worldsemi,ws2812-spi";
reg = <0>;
spi-max-frequency = <WS2812C_SPI_FREQ>;
chain-length = <1>;
color-mapping = <LED_COLOR_ID_GREEN>,
<LED_COLOR_ID_RED>,
<LED_COLOR_ID_BLUE>;
spi-one-frame = <WS2812C_ONE_FRAME>;
spi-zero-frame = <WS2812C_ZERO_FRAME>;
};
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&wdt0 {
status = "okay";
};
&flash0 {
status = "okay";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* Reserve 60kB for the bootloader */
boot_partition: partition@1000 {
label = "mcuboot";
reg = <0x00001000 0x0000F000>;
read-only;
};
/* Reserve 1024kB for the application in slot 0 */
slot0_partition: partition@10000 {
label = "image-0";
reg = <0x00010000 0x00100000>;
};
/* Reserve 1024kB for the application in slot 1 */
slot1_partition: partition@110000 {
label = "image-1";
reg = <0x00110000 0x00100000>;
};
/* Reserve 256kB for the scratch partition */
scratch_partition: partition@210000 {
label = "image-scratch";
reg = <0x00210000 0x00040000>;
};
storage_partition: partition@250000 {
label = "storage";
reg = <0x00250000 0x00006000>;
};
};
};
&esp32_bt_hci {
status = "okay";
};
``` | /content/code_sandbox/boards/m5stack/m5stack_atom_lite/m5stack_atom_lite_procpu.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,170 |
```cmake
if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*")
set(OPENOCD OPENOCD-NOTFOUND)
endif()
find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH)
include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake)
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
``` | /content/code_sandbox/boards/m5stack/m5stack_atoms3_lite/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 102 |
```restructuredtext
.. _m5stack_atom_lite:
M5Stack ATOM Lite
#################
Overview
********
M5Stack ATOM Lite is an ESP32-based development board from M5Stack.
It features the following integrated components:
- ESP32-PICO-D4 chip (240MHz dual core, Wi-Fi/BLE 5.0)
- 520KB SRAM
- SK6812 RGB LED
- Infrared LED
- 1x Grove extension port
.. figure:: img/m5stack_atom_lite.webp
:align: center
:alt: M5Stack ATOM Lite
M5Stack ATOM Lite
Supported Features
==================
The Zephyr m5stack_atom_lite board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| CLOCK | on-chip | reset and clock control |
+-----------+------------+-------------------------------------+
| COUNTER | on-chip | rtc |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | independent watchdog |
+-----------+------------+-------------------------------------+
| PWM | on-chip | pwm |
+-----------+------------+-------------------------------------+
| ADC | on-chip | adc |
+-----------+------------+-------------------------------------+
| DAC | on-chip | dac |
+-----------+------------+-------------------------------------+
| die-temp | on-chip | die temperature sensor |
+-----------+------------+-------------------------------------+
Start Application Development
*****************************
Before powering up your M5Stack ATOM Lite, please make sure that the board is in good
condition with no obvious signs of damage.
System requirements
===================
Prerequisites
-------------
Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command
below to retrieve those files.
.. code-block:: shell
west blobs fetch hal_espressif
.. note::
It is recommended running the command above after :file:`west update`.
Building & Flashing
-------------------
Build and flash applications as usual (see :ref:`build_an_application` and
:ref:`application_run` for more details).
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: m5stack_atom_lite/esp32/procpu
:goals: build
The usual ``flash`` target will work with the ``m5stack_atom_lite`` board
configuration. Here is an example for the :ref:`hello_world`
application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: m5stack_atom_lite/esp32/procpu
:goals: flash
The baud rate of 921600bps is set by default. If experiencing issues when flashing,
try using different values by using ``--esp-baud-rate <BAUD>`` option during
``west flash`` (e.g. ``west flash --esp-baud-rate 115200``).
You can also open the serial monitor using the following command:
.. code-block:: shell
west espressif monitor
After the board has automatically reset and booted, you should see the following
message in the monitor:
.. code-block:: console
***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx *****
Hello World! m5stack_atom_lite
Debugging
---------
M5Stack ATOM Lite debugging is not supported due to pinout limitations.
Related Documents
*****************
- `M5Stack ATOM Lite docs <path_to_url`_
- `M5Stack ATOM Lite schematic <path_to_url`_
- `ESP32-PICO-D4 Datasheet <path_to_url`_ (PDF)
``` | /content/code_sandbox/boards/m5stack/m5stack_atom_lite/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 947 |
```yaml
identifier: m5stack_atoms3_lite/esp32s3/appcpu
name: M5Stack AtomS3-Lite APPCPU
type: mcu
arch: xtensa
toolchain:
- zephyr
supported:
- uart
testing:
ignore_tags:
- net
- bluetooth
- flash
- cpp
- posix
- watchdog
- logging
- kernel
- pm
- gpio
- crypto
- eeprom
- heap
- cmsis_rtos
- jwt
- zdsp
vendor: m5stack
``` | /content/code_sandbox/boards/m5stack/m5stack_atoms3_lite/m5stack_atoms3_lite_appcpu.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 136 |
```yaml
identifier: m5stack_atoms3_lite/esp32s3/procpu
name: M5Stack AtomS3-Lite PROCPU
type: mcu
arch: xtensa
toolchain:
- zephyr
supported:
- gpio
- uart
- i2c
- spi
- counter
- watchdog
- entropy
- pwm
- pinmux
- nvs
- dma
testing:
ignore_tags:
- net
- bluetooth
vendor: m5stack
``` | /content/code_sandbox/boards/m5stack/m5stack_atoms3_lite/m5stack_atoms3_lite_procpu.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 119 |
```unknown
choice BOOTLOADER
default BOOTLOADER_MCUBOOT
endchoice
choice BOOT_SIGNATURE_TYPE
default BOOT_SIGNATURE_TYPE_NONE
endchoice
``` | /content/code_sandbox/boards/m5stack/m5stack_atoms3_lite/Kconfig.sysbuild | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```unknown
# M5Stack AtomS3 Lite board configuration
config BOARD_M5STACK_ATOMS3_LITE
select SOC_ESP32S3_FN8
select SOC_ESP32S3_PROCPU if BOARD_M5STACK_ATOMS3_LITE_ESP32S3_PROCPU
select SOC_ESP32S3_APPCPU if BOARD_M5STACK_ATOMS3_LITE_ESP32S3_APPCPU
``` | /content/code_sandbox/boards/m5stack/m5stack_atoms3_lite/Kconfig.m5stack_atoms3_lite | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 87 |
```unknown
/*
*
*/
/dts-v1/;
#include <espressif/esp32s3/esp32s3_fn8.dtsi>
#include "m5stack_atoms3_lite-pinctrl.dtsi"
#include <dt-bindings/led/led.h>
#include <dt-bindings/led/worldsemi_ws2812c.h>
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "M5Stack AtomS3 Lite PROCPU";
compatible = "m5stack,atoms3_lite";
chosen {
zephyr,sram = &sram0;
zephyr,console = &usb_serial;
zephyr,shell-uart = &usb_serial;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,bt-hci = &esp32_bt_hci;
};
aliases {
sw0 = &user_button_0;
watchdog0 = &wdt0;
i2c-0 = &i2c0;
led-strip = &status_rgb_led;
};
buttons {
compatible = "gpio-keys";
debounce-interval-ms = <100>;
user_button_0: button_0 {
label = "User button 0";
gpios = <&gpio1 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
zephyr,code = <INPUT_KEY_0>;
};
};
};
&usb_serial {
status = "okay";
};
&uart0 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart0_default>;
pinctrl-names = "default";
};
&i2c0 {
status = "okay";
clock-frequency = <I2C_BITRATE_STANDARD>;
pinctrl-0 = <&i2c0_default>;
pinctrl-names = "default";
};
&i2c1 {
status = "okay";
clock-frequency = <I2C_BITRATE_STANDARD>;
pinctrl-0 = <&i2c1_default>;
pinctrl-names = "default";
};
&trng0 {
status = "okay";
};
&spi3 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
line-idle-low;
pinctrl-0 = <&spim3_ws2812_led>;
pinctrl-names = "default";
status_rgb_led: ws2812@0 {
compatible = "worldsemi,ws2812-spi";
reg = <0>;
spi-max-frequency = <WS2812C_SPI_FREQ>;
chain-length = <1>;
color-mapping = <LED_COLOR_ID_GREEN>,
<LED_COLOR_ID_RED>,
<LED_COLOR_ID_BLUE>;
spi-one-frame = <WS2812C_ONE_FRAME>;
spi-zero-frame = <WS2812C_ZERO_FRAME>;
};
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&wdt0 {
status = "okay";
};
&timer0 {
status = "okay";
};
&timer1 {
status = "okay";
};
&flash0 {
status = "okay";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 0x0000F000>;
read-only;
};
slot0_partition: partition@10000 {
label = "image-0";
reg = <0x00010000 0x00100000>;
};
slot1_partition: partition@110000 {
label = "image-1";
reg = <0x00110000 0x00100000>;
};
scratch_partition: partition@210000 {
label = "image-scratch";
reg = <0x00210000 0x00040000>;
};
storage_partition: partition@250000 {
label = "storage";
reg = <0x00250000 0x00006000>;
};
};
};
&esp32_bt_hci {
status = "okay";
};
``` | /content/code_sandbox/boards/m5stack/m5stack_atoms3_lite/m5stack_atoms3_lite_procpu.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 935 |
```unknown
CONFIG_MAIN_STACK_SIZE=2048
CONFIG_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_UART_CONSOLE=y
CONFIG_GPIO=y
CONFIG_CLOCK_CONTROL=y
``` | /content/code_sandbox/boards/m5stack/m5stack_atoms3_lite/m5stack_atoms3_lite_procpu_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```unknown
CONFIG_MAIN_STACK_SIZE=2048
CONFIG_CLOCK_CONTROL=y
``` | /content/code_sandbox/boards/m5stack/m5stack_atoms3_lite/m5stack_atoms3_lite_appcpu_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 15 |
```unknown
/*
*
*/
#include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
#include <dt-bindings/pinctrl/esp32s3-pinctrl.h>
#include <zephyr/dt-bindings/pinctrl/esp32s3-gpio-sigmap.h>
&pinctrl {
uart0_default: uart0_default {
group1 {
pinmux = <UART0_TX_GPIO43>;
output-high;
};
group2 {
pinmux = <UART0_RX_GPIO44>;
bias-pull-up;
};
};
i2c0_default: i2c0_default {
group1 {
pinmux = <I2C0_SDA_GPIO38>,
<I2C0_SCL_GPIO39>;
bias-pull-up;
drive-open-drain;
output-high;
};
};
i2c1_default: i2c1_default {
group1 {
pinmux = <I2C1_SDA_GPIO2>,
<I2C1_SCL_GPIO1>;
bias-pull-up;
drive-open-drain;
output-high;
};
};
spim3_ws2812_led: spim3_ws2812_led {
group1 {
pinmux = <SPIM3_MOSI_GPIO35>;
output-low;
};
};
};
``` | /content/code_sandbox/boards/m5stack/m5stack_atoms3_lite/m5stack_atoms3_lite-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 298 |
```yaml
board:
name: m5stack_atoms3_lite
vendor: m5stack
socs:
- name: esp32s3
``` | /content/code_sandbox/boards/m5stack/m5stack_atoms3_lite/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 33 |
```unknown
# M5Stack AtomS3 Lite board configuration
if BOARD_M5STACK_ATOMS3_LITE_ESP32S3_PROCPU
config HEAP_MEM_POOL_ADD_SIZE_BOARD
int
default 65535 if WIFI && BT
default 51200 if WIFI
default 40960 if BT
default 4096
config KERNEL_MEM_POOL
default y
endif # BOARD_M5STACK_ATOMS3_LITE_ESP32S3_PROCPU
if BOARD_M5STACK_ATOMS3_LITE_ESP32S3_APPCPU
config HEAP_MEM_POOL_ADD_SIZE_BOARD
default 256
endif # BOARD_M5STACK_ATOMS3_LITE_ESP32S3_APPCPU
``` | /content/code_sandbox/boards/m5stack/m5stack_atoms3_lite/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 144 |
```unknown
/*
*/
/ {
grove_header: grove_header {
compatible = "grove-header";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpio0 1 0>,
<1 0 &gpio0 2 0>;
};
};
grove_i2c1: &i2c1 {};
``` | /content/code_sandbox/boards/m5stack/m5stack_atoms3_lite/grove_connectors.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 106 |
```unknown
/*
*
*/
/dts-v1/;
#include <espressif/esp32s3/esp32s3_appcpu.dtsi>
/ {
model = "M5Stack AtomS3 Lite APPCPU";
compatible = "espressif,esp32s3";
chosen {
zephyr,sram = &sram0;
zephyr,ipc_shm = &shm0;
zephyr,ipc = &ipm0;
};
};
&trng0 {
status = "okay";
};
&ipm0 {
status = "okay";
};
&flash0 {
status = "okay";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* Reserve 64kB for the bootloader */
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 0x00010000>;
read-only;
};
/* Reserve 1024kB for the application in slot 0 */
slot0_partition: partition@10000 {
label = "image-0";
reg = <0x00010000 0x00100000>;
};
/* Reserve 1024kB for the application in slot 1 */
slot1_partition: partition@110000 {
label = "image-1";
reg = <0x00110000 0x00100000>;
};
/* Reserve 256kB for the scratch partition */
scratch_partition: partition@210000 {
label = "image-scratch";
reg = <0x00210000 0x00040000>;
};
storage_partition: partition@250000 {
label = "storage";
reg = <0x00250000 0x00006000>;
};
};
};
``` | /content/code_sandbox/boards/m5stack/m5stack_atoms3_lite/m5stack_atoms3_lite_appcpu.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 409 |
```cmake
if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*")
set(OPENOCD OPENOCD-NOTFOUND)
endif()
find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH)
include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake)
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
``` | /content/code_sandbox/boards/m5stack/m5stack_atoms3/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 102 |
```unknown
/*
*
*/
#include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
#include <dt-bindings/pinctrl/esp32s3-pinctrl.h>
#include <zephyr/dt-bindings/pinctrl/esp32s3-gpio-sigmap.h>
&pinctrl {
uart0_default: uart0_default {
group1 {
pinmux = <UART0_TX_GPIO43>;
output-high;
};
group2 {
pinmux = <UART0_RX_GPIO44>;
bias-pull-up;
};
};
i2c0_default: i2c0_default {
group1 {
pinmux = <I2C0_SDA_GPIO38>,
<I2C0_SCL_GPIO39>;
bias-pull-up;
drive-open-drain;
output-high;
};
};
i2c1_default: i2c1_default {
group1 {
pinmux = <I2C1_SDA_GPIO2>,
<I2C1_SCL_GPIO1>;
bias-pull-up;
drive-open-drain;
output-high;
};
};
spim2_default: spim2_default {
group1 {
pinmux = <SPIM2_SCLK_GPIO17>,
<SPIM2_CSEL_GPIO15>;
};
group2 {
pinmux = <SPIM2_MOSI_GPIO21>;
output-low;
};
};
};
``` | /content/code_sandbox/boards/m5stack/m5stack_atoms3/m5stack_atoms3-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 326 |
```yaml
identifier: m5stack_atoms3/esp32s3/procpu
name: M5Stack AtomS3 PROCPU
type: mcu
arch: xtensa
toolchain:
- zephyr
supported:
- gpio
- i2c
- spi
- watchdog
- regulator
- uart
- pinmux
- nvs
- display
testing:
ignore_tags:
- net
- bluetooth
vendor: m5stack
``` | /content/code_sandbox/boards/m5stack/m5stack_atoms3/m5stack_atoms3_procpu.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 108 |
```unknown
CONFIG_MAIN_STACK_SIZE=2048
CONFIG_CLOCK_CONTROL=y
``` | /content/code_sandbox/boards/m5stack/m5stack_atoms3/m5stack_atoms3_appcpu_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 15 |
```unknown
CONFIG_MAIN_STACK_SIZE=2048
CONFIG_GPIO=y
CONFIG_REGULATOR=y # for LCD backlight
CONFIG_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_UART_CONSOLE=y
``` | /content/code_sandbox/boards/m5stack/m5stack_atoms3/m5stack_atoms3_procpu_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 36 |
```unknown
choice BOOTLOADER
default BOOTLOADER_MCUBOOT
endchoice
choice BOOT_SIGNATURE_TYPE
default BOOT_SIGNATURE_TYPE_NONE
endchoice
``` | /content/code_sandbox/boards/m5stack/m5stack_atoms3/Kconfig.sysbuild | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```restructuredtext
.. _m5stack_atoms3_lite:
M5Stack AtomS3 Lite
###################
Overview
********
M5Stack AtomS3 Lite is an ESP32-based development board from M5Stack.
It features the following integrated components:
- ESP32-S3FN8 chip (240MHz dual core, Wi-Fi/BLE 5.0)
- 512KB of SRAM
- 384KB of ROM
- 8MB of Flash
- RGB Status-LED
.. figure:: img/m5stack_atoms3_lite.webp
:align: center
:alt: M5Stack AtomS3 Lite
M5Stack AtomS3 Lite
Supported Features
==================
The Zephyr m5stack_atoms3_lite board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| CLOCK | on-chip | reset and clock control |
+-----------+------------+-------------------------------------+
| COUNTER | on-chip | rtc |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | independent watchdog |
+-----------+------------+-------------------------------------+
| PWM | on-chip | pwm |
+-----------+------------+-------------------------------------+
| ADC | on-chip | adc |
+-----------+------------+-------------------------------------+
| DAC | on-chip | dac |
+-----------+------------+-------------------------------------+
| die-temp | on-chip | die temperature sensor |
+-----------+------------+-------------------------------------+
Start Application Development
*****************************
Before powering up your M5Stack AtomS3 Lite, please make sure that the board is in good
condition with no obvious signs of damage.
System requirements
===================
Prerequisites
-------------
Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command
below to retrieve those files.
.. code-block:: shell
west blobs fetch hal_espressif
.. note::
It is recommended running the command above after :file:`west update`.
Building & Flashing
-------------------
Build and flash applications as usual (see :ref:`build_an_application` and
:ref:`application_run` for more details).
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: m5stack_atoms3_lite/esp32s3/procpu
:goals: build
The usual ``flash`` target will work with the ``m5stack_atoms3_lite`` board
configuration. Here is an example for the :ref:`hello_world`
application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: m5stack_atoms3_lite/esp32s3/procpu
:goals: flash
The baud rate of 921600bps is set by default. If experiencing issues when flashing,
try using different values by using ``--esp-baud-rate <BAUD>`` option during
``west flash`` (e.g. ``west flash --esp-baud-rate 115200``).
You can also open the serial monitor using the following command:
.. code-block:: shell
west espressif monitor
After the board has automatically reset and booted, you should see the following
message in the monitor:
.. code-block:: console
***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx *****
Hello World! m5stack_atoms3_lite
Debugging
---------
M5Stack AtomS3 Lite debugging is not supported due to pinout limitations.
Related Documents
*****************
- `M5Stack AtomS3 Lite schematic <path_to_url`_
- `ESP32S3 Datasheet <path_to_url`_
``` | /content/code_sandbox/boards/m5stack/m5stack_atoms3_lite/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 946 |
```yaml
identifier: m5stack_atoms3/esp32s3/appcpu
name: M5Stack AtomS3 APPCPU
type: mcu
arch: xtensa
toolchain:
- zephyr
supported:
- uart
testing:
ignore_tags:
- net
- bluetooth
- flash
- cpp
- posix
- watchdog
- logging
- kernel
- pm
- gpio
- crypto
- eeprom
- heap
- cmsis_rtos
- jwt
- zdsp
vendor: m5stack
``` | /content/code_sandbox/boards/m5stack/m5stack_atoms3/m5stack_atoms3_appcpu.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 133 |
```unknown
/*
*
*/
/dts-v1/;
#include <espressif/esp32s3/esp32s3_appcpu.dtsi>
/ {
model = "M5Stack AtomS3 APPCPU";
compatible = "espressif,esp32s3";
chosen {
zephyr,sram = &sram0;
zephyr,ipc_shm = &shm0;
zephyr,ipc = &ipm0;
};
};
&trng0 {
status = "okay";
};
&ipm0 {
status = "okay";
};
&flash0 {
status = "okay";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* Reserve 64kB for the bootloader */
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 0x00010000>;
read-only;
};
/* Reserve 1024kB for the application in slot 0 */
slot0_partition: partition@10000 {
label = "image-0";
reg = <0x00010000 0x00100000>;
};
/* Reserve 1024kB for the application in slot 1 */
slot1_partition: partition@110000 {
label = "image-1";
reg = <0x00110000 0x00100000>;
};
/* Reserve 256kB for the scratch partition */
scratch_partition: partition@210000 {
label = "image-scratch";
reg = <0x00210000 0x00040000>;
};
storage_partition: partition@250000 {
label = "storage";
reg = <0x00250000 0x00006000>;
};
};
};
``` | /content/code_sandbox/boards/m5stack/m5stack_atoms3/m5stack_atoms3_appcpu.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 408 |
```yaml
board:
name: m5stack_atoms3
vendor: m5stack
socs:
- name: esp32s3
``` | /content/code_sandbox/boards/m5stack/m5stack_atoms3/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```unknown
# M5Stack AtomS3 board configuration
if BOARD_M5STACK_ATOMS3_ESP32S3_PROCPU
config LV_COLOR_16_SWAP
default y if LVGL
config HEAP_MEM_POOL_ADD_SIZE_BOARD
int
default 65535 if WIFI && BT
default 51200 if WIFI
default 40960 if BT
default 4096
endif # BOARD_M5STACK_ATOMS3_ESP32S3_PROCPU
if BOARD_M5STACK_ATOMS3_ESP32S3_APPCPU
config HEAP_MEM_POOL_ADD_SIZE_BOARD
default 256
endif # BOARD_M5STACK_ATOMS3_ESP32S3_APPCPU
``` | /content/code_sandbox/boards/m5stack/m5stack_atoms3/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 140 |
```unknown
# M5Stack AtomS3 board configuration
config BOARD_M5STACK_ATOMS3
select SOC_ESP32S3_FN8
select SOC_ESP32S3_PROCPU if BOARD_M5STACK_ATOMS3_ESP32S3_PROCPU
select SOC_ESP32S3_APPCPU if BOARD_M5STACK_ATOMS3_ESP32S3_APPCPU
``` | /content/code_sandbox/boards/m5stack/m5stack_atoms3/Kconfig.m5stack_atoms3 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 80 |
```unknown
/*
*/
/ {
grove_header: grove_header {
compatible = "grove-header";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpio0 1 0>,
<1 0 &gpio0 2 0>;
};
};
grove_i2c1: &i2c1 {};
``` | /content/code_sandbox/boards/m5stack/m5stack_atoms3/grove_connectors.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 106 |
```unknown
/*
*
*/
/dts-v1/;
#include <espressif/esp32s3/esp32s3_fn8.dtsi>
#include "m5stack_atoms3-pinctrl.dtsi"
#include "grove_connectors.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
#include <zephyr/dt-bindings/mipi_dbi/mipi_dbi.h>
/ {
model = "M5Stack AtomS3 PROCPU";
compatible = "m5stack,atoms3";
chosen {
zephyr,sram = &sram0;
zephyr,console = &usb_serial;
zephyr,shell-uart = &usb_serial;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,display = &st7789v;
zephyr,bt-hci = &esp32_bt_hci;
};
aliases {
sw0 = &user_button_0;
watchdog0 = &wdt0;
accel0 = &mpu6886;
};
gpio_keys {
compatible = "gpio-keys";
/* This is the button that's underneath the LCD display */
user_button_0: button_0 {
label = "User button 0";
gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; // G42
zephyr,code = <INPUT_KEY_0>;
};
};
/* Regulators */
lcd_backlight_en {
compatible = "regulator-fixed";
regulator-name = "lcd_backlight_enable";
enable-gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
regulator-boot-on;
};
mipi_dbi {
compatible = "zephyr,mipi-dbi-spi";
spi-dev = <&spi2>;
dc-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>; /* G33 */
reset-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; /* G34 */
write-only;
#address-cells = <1>;
#size-cells = <0>;
st7789v: st7789v@0 {
compatible = "sitronix,st7789v";
reg = <0>;
mipi-max-frequency = <27000000>;
width = <128>;
height = <128>;
x-offset = <2>;
y-offset = <1>;
vcom = <0x28>;
gctrl = <0x35>;
vrhs = <0x10>;
vdvs = <0x20>;
mdac = <0x00>;
gamma = <0x01>;
colmod = <0x55>;
lcm = <0x0c>;
porch-param = [0c 0c 00 33 33];
cmd2en-param = [5a 69 02 00];
pwctrl1-param = [a4 a1];
pvgam-param = [d0 00 02 07 0a 28 32 44 42 06 0e 12 14 17];
nvgam-param = [d0 00 02 07 0a 28 31 54 47 0e 1c 17 1b 1e];
ram-param = [00 E0];
rgb-param = [40 02 14];
mipi-mode = <MIPI_DBI_MODE_SPI_4WIRE>;
};
};
};
&usb_serial {
status = "okay";
};
&uart0 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart0_default>;
pinctrl-names = "default";
};
&i2c0 {
status = "okay";
clock-frequency = <I2C_BITRATE_STANDARD>;
pinctrl-0 = <&i2c0_default>;
pinctrl-names = "default";
mpu6886: mpu6886@68 {
compatible = "invensense,mpu6050";
reg = <0x68>;
status = "okay";
};
};
&i2c1 {
status = "okay";
clock-frequency = <I2C_BITRATE_STANDARD>;
pinctrl-0 = <&i2c1_default>;
pinctrl-names = "default";
};
&trng0 {
status = "okay";
};
&spi2 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
pinctrl-0 = <&spim2_default>;
pinctrl-names = "default";
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&wdt0 {
status = "okay";
};
&timer0 {
status = "okay";
};
&timer1 {
status = "okay";
};
&flash0 {
status = "okay";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 0x0000F000>;
read-only;
};
slot0_partition: partition@10000 {
label = "image-0";
reg = <0x00010000 0x00100000>;
};
slot1_partition: partition@110000 {
label = "image-1";
reg = <0x00110000 0x00100000>;
};
scratch_partition: partition@210000 {
label = "image-scratch";
reg = <0x00210000 0x00040000>;
};
storage_partition: partition@250000 {
label = "storage";
reg = <0x00250000 0x00006000>;
};
};
};
&esp32_bt_hci {
status = "okay";
};
``` | /content/code_sandbox/boards/m5stack/m5stack_atoms3/m5stack_atoms3_procpu.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,323 |
```restructuredtext
.. _boards-andes:
Andes Technology
################
.. toctree::
:maxdepth: 1
:glob:
**/*
``` | /content/code_sandbox/boards/andestech/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 33 |
```yaml
identifier: adp_xc7k/ae350
name: Andes ADP-XC7K AE350
type: mcu
arch: riscv
toolchain:
- zephyr
- cross-compile
ram: 512
supported:
- gpio
- counter
- i2c
- spi
- eeprom
- watchdog
- mbox
- flash
- dma
- led
- syscon
- hwinfo
testing:
ignore_tags:
- bluetooth
vendor: andestech
``` | /content/code_sandbox/boards/andestech/adp_xc7k_ae350/adp_xc7k_ae350.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 128 |
```unknown
config BOARD_ADP_XC7K
select SOC_ANDES_AE350 if BOARD_ADP_XC7K_AE350
``` | /content/code_sandbox/boards/andestech/adp_xc7k_ae350/Kconfig.adp_xc7k | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 30 |
```yaml
board:
name: adp_xc7k
vendor: andestech
socs:
- name: ae350
``` | /content/code_sandbox/boards/andestech/adp_xc7k_ae350/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 31 |
```restructuredtext
.. _m5stack_atoms3:
M5Stack AtomS3
##############
Overview
********
M5Stack AtomS3 is an ESP32-based development board from M5Stack.
It features the following integrated components:
- ESP32-S3FN8 chip (240MHz dual core, Wi-Fi/BLE 5.0)
- 512KB of SRAM
- 384KB of ROM
- 8MB of Flash
- LCD IPS TFT 0.85", 128x128 px screen (ST7789 compatible)
- 6-axis IMU MPU6886
- Infrared emitter
.. figure:: img/m5stack_atoms3.webp
:align: center
:alt: M5Stack AtomS3
M5Stack AtomS3
Supported Features
==================
The Zephyr m5stack_atoms3 board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| CLOCK | on-chip | reset and clock control |
+-----------+------------+-------------------------------------+
| COUNTER | on-chip | rtc |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | independent watchdog |
+-----------+------------+-------------------------------------+
| PWM | on-chip | pwm |
+-----------+------------+-------------------------------------+
| ADC | on-chip | adc |
+-----------+------------+-------------------------------------+
| DAC | on-chip | dac |
+-----------+------------+-------------------------------------+
| die-temp | on-chip | die temperature sensor |
+-----------+------------+-------------------------------------+
Start Application Development
*****************************
Before powering up your M5Stack AtomS3, please make sure that the board is in good
condition with no obvious signs of damage.
System requirements
===================
Prerequisites
-------------
Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command
below to retrieve those files.
.. code-block:: shell
west blobs fetch hal_espressif
.. note::
It is recommended running the command above after :file:`west update`.
Building & Flashing
-------------------
Build and flash applications as usual (see :ref:`build_an_application` and
:ref:`application_run` for more details).
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: m5stack_atoms3/esp32s3/procpu
:goals: build
The usual ``flash`` target will work with the ``m5stack_atoms3`` board
configuration. Here is an example for the :ref:`hello_world`
application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: m5stack_atoms3/esp32s3/procpu
:goals: flash
The baud rate of 921600bps is set by default. If experiencing issues when flashing,
try using different values by using ``--esp-baud-rate <BAUD>`` option during
``west flash`` (e.g. ``west flash --esp-baud-rate 115200``).
You can also open the serial monitor using the following command:
.. code-block:: shell
west espressif monitor
After the board has automatically reset and booted, you should see the following
message in the monitor:
.. code-block:: console
***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx *****
Hello World! m5stack_atoms3
Debugging
---------
M5Stack AtomS3 debugging is not supported due to pinout limitations.
Related Documents
*****************
- `M5Stack AtomS3 schematic <path_to_url`_
- `ESP32S3 Datasheet <path_to_url`_
``` | /content/code_sandbox/boards/m5stack/m5stack_atoms3/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 962 |
```unknown
CONFIG_XIP=n
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# Serial driver options
CONFIG_SERIAL=y
# GPIO driver options
CONFIG_GPIO=y
# Syscon driver options
CONFIG_SYSCON=y
# hwinfo driver options
CONFIG_HWINFO=y
CONFIG_HWINFO_ANDES=y
# RV64 options
#CONFIG_RV64I_CPU=y
# FPU (single precision) options
#CONFIG_FPU=y
#CONFIG_FPU_SHARING=y
#CONFIG_FLOAT_HARD=y
#CONFIG_SINGLE_PRECISION_FPU=y
# FPU (double precision) options
#CONFIG_FPU=y
#CONFIG_FPU_SHARING=y
#CONFIG_FLOAT_HARD=y
#CONFIG_DOUBLE_PRECISION_FPU=y
# PMP granularity options
CONFIG_PMP_GRANULARITY=8
# HW DSP options
#CONFIG_SOC_ANDES_V5_HWDSP=y
# EXEC.IT options
#CONFIG_SOC_ANDES_V5_EXECIT=y
# Nocache memory options
#CONFIG_SOC_ANDES_V5_PMA=y
#CONFIG_NOCACHE_MEMORY=y
# I/O Coherence Port options
#CONFIG_SOC_ANDES_V5_IOCP=y
``` | /content/code_sandbox/boards/andestech/adp_xc7k_ae350/adp_xc7k_ae350_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 246 |
```unknown
/*
*
*/
/dts-v1/;
#include <andes/andes_v5_ae350.dtsi>
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "Andes ADP-XC7K AE350";
compatible = "andestech,adp_xc7k_ae350";
aliases {
gpio-0 = &gpio0;
counter-0 = &pit0;
i2c-0 = &i2c0;
led0 = &seg7_led1_g;
led1 = &seg7_led2_g;
sw0 = &user_button1;
eeprom-0 = &eeprom;
};
chosen {
zephyr,console = &uart1;
zephyr,shell-uart = &uart1;
zephyr,sram = &dram;
zephyr,flash = &mx25u16;
zephyr,flash-controller = &mx25u16;
};
leds {
compatible = "gpio-leds";
seg7_led1_a: led_1 {
label = "7SEG LED1 A";
gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
};
seg7_led1_b: led_2 {
label = "7SEG LED1 B";
gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
};
seg7_led1_c: led_3 {
label = "7SEG LED1 C";
gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
};
seg7_led1_d: led_4 {
label = "7SEG LED1 D";
gpios = <&gpio0 19 GPIO_ACTIVE_LOW>;
};
seg7_led1_e: led_5 {
label = "7SEG LED1 E";
gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
};
seg7_led1_f: led_6 {
label = "7SEG LED1 F";
gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
};
seg7_led1_g: led_7 {
label = "7SEG LED1 G";
gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
};
seg7_led1_dp: led_8 {
label = "7SEG LED1 DP";
gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
};
seg7_led2_a: led_9 {
label = "7SEG LED2 A";
gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
};
seg7_led2_b: led_10 {
label = "7SEG LED2 B";
gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
};
seg7_led2_c: led_11 {
label = "7SEG LED2 C";
gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
};
seg7_led2_d: led_12 {
label = "7SEG LED2 D";
gpios = <&gpio0 27 GPIO_ACTIVE_LOW>;
};
seg7_led2_e: led_13 {
label = "7SEG LED2 E";
gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
};
seg7_led2_f: led_14 {
label = "7SEG LED2 F";
gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
};
seg7_led2_g: led_15 {
label = "7SEG LED2 G";
gpios = <&gpio0 30 GPIO_ACTIVE_LOW>;
};
seg7_led2_dp: led_16 {
label = "7SEG LED2 DP";
gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
};
};
gpio_keys {
compatible = "gpio-keys";
user_button1: button_1 {
label = "User SW1";
gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_0>;
};
user_button2: button_2 {
label = "User SW2";
gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_1>;
};
user_button3: button_3 {
label = "User SW3";
gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_2>;
};
user_button4: button_4 {
label = "User SW4";
gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_3>;
};
user_button5: button_5 {
label = "User SW5";
gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_4>;
};
user_button6: button_6 {
label = "User SW6";
gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_5>;
};
user_button7: button_7 {
label = "User SW7";
gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_6>;
};
};
};
&l2_cache {
status = "okay";
};
&syscon {
status = "okay";
};
&uart1 {
status = "okay";
clock-frequency = <19660800>;
current-speed = <115200>;
};
&gpio0 {
status = "okay";
};
&pit0 {
status = "okay";
};
&spi0 {
status = "okay";
mx25u16: qspi-nor-flash@0 {
compatible = "jedec,spi-nor", "andestech,qspi-nor";
size = <16777216>;
spi-max-frequency = <10000000>;
jedec-id = [c2 25 35];
status = "okay";
reg = <0>;
sfdp-bfp = [
e5 20 f1 ff ff ff ff 00 44 eb 08 6b 08 3b 04 bb
fe ff ff ff ff ff 00 ff ff ff 44 eb 0c 20 0f 52
10 d8 00 ff
];
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
storage_partition: partition@0 {
label = "storage";
reg = <0x0 DT_SIZE_K(1024)>;
};
};
};
};
&i2c0 {
status = "okay";
eeprom: eeprom@50 {
compatible = "atmel,at24";
reg = <0x50>;
status = "okay";
size = <16384>;
pagesize = <64>;
address-width = <16>;
timeout = <5>;
};
};
&spi1 {
status = "okay";
cs-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
};
&wdt {
status = "okay";
};
&dma0 {
status = "okay";
};
``` | /content/code_sandbox/boards/andestech/adp_xc7k_ae350/adp_xc7k_ae350.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,629 |
```restructuredtext
.. _boards-sparkfun-electronics:
SparkFun Electronics
####################
.. toctree::
:maxdepth: 1
:glob:
**/*
``` | /content/code_sandbox/boards/sparkfun/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 37 |
```cmake
#
board_runner_args(jlink "--device=EFR32MG24BxxxF1536")
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/sparkfun/thing_plus_matter_mgm240p/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 37 |
```unknown
# EFR32XG24 MGM240P board
config BOARD_SPARKFUN_THING_PLUS_MATTER_MGM240P
select SOC_PART_NUMBER_EFR32MG24B020F1536IM40
``` | /content/code_sandbox/boards/sparkfun/thing_plus_matter_mgm240p/Kconfig.sparkfun_thing_plus_matter_mgm240p | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 45 |
```unknown
/*
*
*/
#include <zephyr/dt-bindings/input/input-event-codes.h>
#include <dt-bindings/pinctrl/gecko-pinctrl.h>
&pinctrl {
/* configuration for uart0 device, default state */
usart0_default: usart0_default {
group1 {
/* configure PA.6 as UART_RX and PA.5 as UART_TX */
psels = <GECKO_PSEL(UART_TX, A, 5)>,
<GECKO_PSEL(UART_RX, A, 6)>,
<GECKO_LOC(UART, 0)>;
};
};
i2c0_default: i2c0_default {
group1 {
psels = <GECKO_PSEL(I2C_SDA, B, 3)>,
<GECKO_PSEL(I2C_SCL, B, 4)>,
<GECKO_LOC(I2C_SDA, 5)>,
<GECKO_LOC(I2C_SCL, 5)>;
};
};
};
``` | /content/code_sandbox/boards/sparkfun/thing_plus_matter_mgm240p/sparkfun_thing_plus_matter_mgm240p-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 235 |
```unknown
/*
*
*/
/dts-v1/;
#include <silabs/efr32mg24b020f1536im40.dtsi>
#include "sparkfun_thing_plus_matter_mgm240p-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "Sparkfun MGM240P (Sparkfun Thing Plus Matter)";
compatible = "sparkfun,sparkfun_thing_plus_mgm240p", "silabs,efr32mg24";
chosen {
zephyr,console = &usart0;
zephyr,shell-uart = &usart0;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,bt-hci = &bt_hci_silabs;
};
aliases {
led0 = &blue_led;
watchdog0 = &wdog0;
};
leds {
compatible = "gpio-leds";
blue_led: led_1 {
gpios = <&gpioa GECKO_PIN(8) GPIO_ACTIVE_LOW>;
};
};
wake_up_trigger: gpio-wake-up {
compatible = "silabs,gecko-wake-up-trigger";
gpios = <&gpioa GECKO_PIN(5) GPIO_ACTIVE_LOW>;
};
};
&cpu0 {
clock-frequency = <78000000>;
};
&usart0 {
current-speed = <115200>;
pinctrl-0 = <&usart0_default>;
pinctrl-names = "default";
status = "okay";
};
&i2c0 {
pinctrl-0 = <&i2c0_default>;
pinctrl-names = "default";
status = "okay";
};
&gpio {
status = "okay";
};
&gpioa {
status = "okay";
};
&gpiob {
status = "okay";
};
&gpioc {
status = "okay";
};
&gpiod {
status = "okay";
};
&wdog0 {
status = "okay";
};
&se {
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* Reserve 48 kB for the bootloader */
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x0 0x0000c000>;
read-only;
};
/* Reserve 464 kB for the application in slot 0 */
slot0_partition: partition@c000 {
label = "storage";
reg = <0x0000c000 0x00074000>;
};
/* Reserve 464 kB for the application in slot 1 */
slot1_partition: partition@80000 {
label = "image-0";
reg = <0x00080000 0x00074000>;
};
/* Reserve 32 kB for the scratch partition */
scratch_partition: partition@f4000 {
label = "image-1";
reg = <0x000f4000 0x00008000>;
};
/* Set 528Kb of storage at the end of the 1024Kb of flash */
storage_partition: partition@fc000 {
label = "image-scratch";
reg = <0x000fc000 0x00084000>;
};
};
};
&adc0 {
status = "okay";
};
&stimer0 {
status = "okay";
};
&bt_hci_silabs {
status = "okay";
};
``` | /content/code_sandbox/boards/sparkfun/thing_plus_matter_mgm240p/sparkfun_thing_plus_matter_mgm240p.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 810 |
```yaml
identifier: sparkfun_thing_plus_matter_mgm240p
name: MGM240P
type: mcu
arch: arm
ram: 256
flash: 1536
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- counter
- gpio
- uart
- spi
- watchdog
testing:
ignore_tags:
- net
- bluetooth
- pm
- hwinfo
vendor: sparkfun
``` | /content/code_sandbox/boards/sparkfun/thing_plus_matter_mgm240p/sparkfun_thing_plus_matter_mgm240p.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 112 |
```cmake
# SPI is implemented via usart so node name isn't spi@...
list(APPEND EXTRA_DTC_FLAGS "-Wno-spi_bus_bridge")
``` | /content/code_sandbox/boards/sparkfun/thing_plus_matter_mgm240p/pre_dt_board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```restructuredtext
.. _adp_xc7k_ae350:
Andes ADP-XC7K AE350
####################
Overview
********
ADP-XC7K AE350 board is for AndeShape AE350 platform on ADP-XC7K series
FPGA-based development boards.
ADP-XC7K series are FPGA-based development and prototyping boards for evaluation of
variety of AndesCore processors and AndeShape SoC platform IPs.
AE350 is a RISC-V platform which can integrate AndesCore CPUs with a collection
of fundamental peripheral IPs.
1st figure shows the green PCB is ADP-XC7K160 and 2nd figure shows the red PCB is ADP-XC7K410.
.. image:: img/adp_xc7k160.jpg
:align: center
:alt: ADP-XC7K160
.. image:: img/adp_xc7k410.jpg
:align: center
:alt: ADP-XC7K410
More information can be found on `ADP-XC7K160/410`_ and `AndeShape AE350`_ websites.
Hardware
********
The ADP-XC7K AE350 platform integrates 1 ~ 4 cores 32/64-bit 60MHz RISC-V CPUs, DSP,
1GB RAM, Cache, SPI flash memory, ethernet controller and other peripherals.
The ADP-XC7K AE350 platform provides following hardware components:
- 1 ~ 4 cores 32/64-bit 60MHz AndeStar v5 RISC-V CPUs
- 1GB on-board SDRAM
- 2MB SPI flash memory (1MB can be used for XIP)
- UART
- I2C
- SPI
- GPIO
- PWM
- DMA
- 10/100 Ethernet RJ45 port
- LCD module connector
- 16KB I2C EEPROM
- SD memory card slot
- MIC-in, Line-in, and Line-out with AC97 audio codec
Supported Features
==================
The ``adp_xc7k/ae350`` board configuration supports the following hardware features:
+----------------+------------+----------------------+
| Interface | Controller | Driver/Component |
+================+============+======================+
| PLIC | on-chip | interrupt_controller |
+----------------+------------+----------------------+
| RISC-V Machine | on-chip | timer |
| Timer | | |
+----------------+------------+----------------------+
| GPIO | on-chip | gpio |
+----------------+------------+----------------------+
| UART | on-chip | serial |
+----------------+------------+----------------------+
| COUNTER | on-chip | counter |
+----------------+------------+----------------------+
| SPI | on-chip | spi |
+----------------+------------+----------------------+
| I2C | on-chip | i2c |
+----------------+------------+----------------------+
| EEPROM | on-chip | eeprom |
+----------------+------------+----------------------+
| FLASH | on-chip | flash |
+----------------+------------+----------------------+
| HWINFO | on-chip | syscon |
+----------------+------------+----------------------+
| MAILBOX | on-chip | mbox |
+----------------+------------+----------------------+
| DMA | on-chip | dma |
+----------------+------------+----------------------+
| WATCHDOG | on-chip | wdt |
+----------------+------------+----------------------+
Other hardware features are not supported yet.
Connections and IOs
===================
The ADP-XC7K AE350 platform has 1 GPIO controller. It providing 32 bits of IO.
It is responsible for pin input/output, pull-up, etc.
Mapping from GPIO controller to the ADP-XC7K board pins:
+--------------------+--------------------+
| GPIO controller | Usage / Board pins |
+====================+====================+
| **Push Buttons** | |
+--------------------+--------------------+
| GPIO.0 | SW1 |
+--------------------+--------------------+
| GPIO.1 | SW2 |
+--------------------+--------------------+
| GPIO.2 | SW3 |
+--------------------+--------------------+
| GPIO.3 | SW4 |
+--------------------+--------------------+
| GPIO.4 | SW5 |
+--------------------+--------------------+
| GPIO.5 | SW6 |
+--------------------+--------------------+
| GPIO.6 | SW7 |
+--------------------+--------------------+
| **7-Segment LED1** | |
+--------------------+--------------------+
| GPIO.16 | 7SEG1.A |
+--------------------+--------------------+
| GPIO.17 | 7SEG1.B |
+--------------------+--------------------+
| GPIO.18 | 7SEG1.C |
+--------------------+--------------------+
| GPIO.19 | 7SEG1.D |
+--------------------+--------------------+
| GPIO.20 | 7SEG1.E |
+--------------------+--------------------+
| GPIO.21 | 7SEG1.F |
+--------------------+--------------------+
| GPIO.22 | 7SEG1.G |
+--------------------+--------------------+
| GPIO.23 | 7SEG1.DP |
+--------------------+--------------------+
| **7-Segment LED2** | |
+--------------------+--------------------+
| GPIO.24 | 7SEG2.A |
+--------------------+--------------------+
| GPIO.25 | 7SEG2.B |
+--------------------+--------------------+
| GPIO.26 | 7SEG2.C |
+--------------------+--------------------+
| GPIO.27 | 7SEG2.D |
+--------------------+--------------------+
| GPIO.28 | 7SEG2.E |
+--------------------+--------------------+
| GPIO.29 | 7SEG2.F |
+--------------------+--------------------+
| GPIO.30 | 7SEG2.G |
+--------------------+--------------------+
| GPIO.31 | 7SEG2.DP |
+--------------------+--------------------+
| **GPIO pins** | |
+--------------------+--------------------+
| GPIO.7 | IDE_CON1.4 |
+--------------------+--------------------+
| GPIO.8 | IDE_CON1.6 |
+--------------------+--------------------+
| GPIO.9 | IDE_CON1.8 |
+--------------------+--------------------+
| GPIO.10 | IDE_CON1.10 |
+--------------------+--------------------+
| GPIO.11 | IDE_CON1.11 |
+--------------------+--------------------+
| GPIO.12 | IDE_CON1.12 |
+--------------------+--------------------+
| GPIO.13 | IDE_CON1.13 |
+--------------------+--------------------+
| GPIO.14 | IDE_CON1.14 |
+--------------------+--------------------+
| GPIO.15 | IDE_CON1.15 |
+--------------------+--------------------+
Other peripheral mapping are listed below:
+-------------+---------------------------------+
| Peripherals | Usage / Board pins |
+=============+=================================+
| SPI_1 | internal connected to SPI Flash |
+-------------+---------------------------------+
| SPI_2_CS | IDE_CON1.37 |
+-------------+---------------------------------+
| SPI_2_MOSI | IDE_CON1.36 |
+-------------+---------------------------------+
| SPI_2_MISO | IDE_CON1.38 |
+-------------+---------------------------------+
| SPI_2_SCLK | IDE_CON1.35 |
+-------------+---------------------------------+
| I2C_SDA | J27.1 |
+-------------+---------------------------------+
| I2C_SCL | J27.2 |
+-------------+---------------------------------+
System Clock
------------
The ADP-XC7K AE350 platform has 60MHz core clock.
Serial Port
-----------
The ADP-XC7K AE350 platform has 2 UARTs.
The Zephyr console output is by default assigned to UART2 and the default
settings are 115200 8N1.
Programming and debugging
*************************
For debugging zephyr applications or burning them into a flash, you will need to
connect Andes ICE from host computer to ADP-XC7K board and execute the
Andes ICE management software, ICEman, on this host computer.
Connecting Andes ICE (AICE)
===========================
AICE is used for flashing and debugging the board. Please connect AICE to both
ADP-XC7K board and the host computer as shown in the figure.
.. image:: img/connect_aice.jpg
:align: center
:alt: Connect AICE
More information can be found on `AICE-MINI+`_, `AICE-MICRO`_ website
Building
========
You can build applications in the usual way. Here is an example for
the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: adp_xc7k/ae350
:goals: build
Flashing
========
Before flashing, you have to download ICEman (``ice.zip``) from the
`Andes Development Kit`_.
If you want to use XIP mode (``CONFIG_XIP=y``), you also need to download
the flash burner (``flash.zip``).
At first, you should run ICEman when flashing and debugging program.
.. code-block:: console
# Enable execute file permission of ICEman
chmod a+x ./ICEman
# Running the ICEman server
sudo ./ICEman -Z v5
.. note::
To run ICEman commands as a normal user, you will need to install the
:file:`70-ndsusb-v1.rules` udev rules file (usually by placing it in
:file:`/etc/udev/rules.d`, then unplugging and plugging the
AICE adapter in again via USB.).
If ``CONFIG_XIP=n``, you can load the program (``zephyr.elf``) into RAM directly
and execute it.
.. code-block:: console
# Check the ICEman server is running
# Load the program into RAM and execute it
riscv64-zephyr-elf-gdb build/zephyr/zephyr.elf
(gdb) target remote :1111
(gdb) monitor reset halt
(gdb) load
(gdb) quit
If ``CONFIG_XIP=y``, you need to burn the program (``zephyr.bin``) into flash memory
and execute it.
.. code-block:: console
# Check the ICEman server is running
# Burn the program into flash and execute it
<FLASH>/bin/target_burn_frontend \
-P 4444 --unlock --verify --image=build/zephyr/zephyr.bin \
--algorithm-bin=<FLASH>/target_bin/target_SPI_v5_[32|64].bin
# Note:
# 1. Assume the flash burner is downloaded to <FLASH> directory
# 2. For algorithm-bin file, use target_SPI_v5_32.bin in RV32 platform and
# use target_SPI_v5_64.bin in RV64 platform
Open a serial terminal with the following settings:
- Speed: 115200
- Data: 8 bits
- Parity: None
- Stop bits: 1
you should see the following message in the terminal:
.. code-block:: console
***** Booting Zephyr OS v2.4.0 *****
Hello World! adp_xc7k
Debugging
=========
.. code-block:: console
# Check the ICEman server is running
# Load and debug program
./riscv64-zephyr-elf-gdb build/zephyr/zephyr.elf
(gdb) target remote :1111
(gdb) monitor reset halt
(gdb) load
If ``CONFIG_XIP=y``, please follow the flashing section to burn the program into
flash memory first.
Then, you can use GDB to debug program by above commands but do NOT execute ``load``
command since the program has been placed in the flash memory.
References
**********
.. target-notes::
.. _ADP-XC7K160/410: path_to_url
.. _AndeShape AE350: path_to_url
.. _AICE-MINI+: path_to_url
.. _AICE-MICRO: path_to_url
.. _Andes Development Kit: path_to_url
``` | /content/code_sandbox/boards/andestech/adp_xc7k_ae350/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,683 |
```c
/*
*
*/
#include <zephyr/init.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/sys/printk.h>
#include <zephyr/logging/log.h>
#ifdef CONFIG_SOC_GECKO_DEV_INIT
#include "em_cmu.h"
#endif
LOG_MODULE_REGISTER(sparkfun_thing_plus_mgm240p,
CONFIG_BOARD_SPARKFUN_THING_PLUS_MATTER_MGM240P_LOG_LEVEL);
static int sparkfun_thing_plus_mgm240p_init_clocks(void);
static int sparkfun_thing_plus_mgm240p_init(void)
{
int ret;
#ifdef CONFIG_SOC_GECKO_DEV_INIT
sparkfun_thing_plus_mgm240p_init_clocks();
#endif
static struct gpio_dt_spec wake_up_gpio_dev =
GPIO_DT_SPEC_GET(DT_NODELABEL(wake_up_trigger), gpios);
if (!gpio_is_ready_dt(&wake_up_gpio_dev)) {
LOG_ERR("Wake-up GPIO device was not found!\n");
return -ENODEV;
}
ret = gpio_pin_configure_dt(&wake_up_gpio_dev, GPIO_OUTPUT_ACTIVE);
if (ret < 0)
return ret;
return 0;
}
#ifdef CONFIG_SOC_GECKO_DEV_INIT
static int sparkfun_thing_plus_mgm240p_init_clocks(void)
{
CMU_ClockSelectSet(cmuClock_SYSCLK, cmuSelect_HFRCODPLL);
#if defined(_CMU_EM01GRPACLKCTRL_MASK)
CMU_ClockSelectSet(cmuClock_EM01GRPACLK, cmuSelect_HFRCODPLL);
#endif
#if defined(_CMU_EM01GRPBCLKCTRL_MASK)
CMU_ClockSelectSet(cmuClock_EM01GRPBCLK, cmuSelect_HFRCODPLL);
#endif
CMU_ClockSelectSet(cmuClock_EM23GRPACLK, cmuSelect_LFRCO);
CMU_ClockSelectSet(cmuClock_EM4GRPACLK, cmuSelect_LFRCO);
#if defined(RTCC_PRESENT)
CMU_ClockSelectSet(cmuClock_RTCC, cmuSelect_LFRCO);
#endif
#if defined(SYSRTC_PRESENT)
CMU_ClockSelectSet(cmuClock_SYSRTC, cmuSelect_LFRCO);
#endif
CMU_ClockSelectSet(cmuClock_WDOG0, cmuSelect_LFRCO);
#if WDOG_COUNT > 1
CMU_ClockSelectSet(cmuClock_WDOG1, cmuSelect_LFRCO);
#endif
return 0;
}
#endif
/* needs to be done after GPIO driver init */
SYS_INIT(sparkfun_thing_plus_mgm240p_init, POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE);
``` | /content/code_sandbox/boards/sparkfun/thing_plus_matter_mgm240p/board.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 562 |
```yaml
board:
name: sparkfun_thing_plus_matter_mgm240p
vendor: sparkfun
socs:
- name: efr32mg24b020f1536im40
``` | /content/code_sandbox/boards/sparkfun/thing_plus_matter_mgm240p/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 45 |
```unknown
# SPARKFUN THING PLUS MGM240P board
module = BOARD_SPARKFUN_THING_PLUS_MATTER_MGM240P
module-str = Board Control
source "subsys/logging/Kconfig.template.log_config"
``` | /content/code_sandbox/boards/sparkfun/thing_plus_matter_mgm240p/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 46 |
```unknown
# SPARKFUN THING PLUS MGM240P board
if BOARD_SPARKFUN_THING_PLUS_MATTER_MGM240P
config CMU_HFXO_FREQ
default 40000000
config CMU_LFXO_FREQ
default 32768
config FLASH_BASE_ADDRESS
hex
default 0x08000000
if SOC_GECKO_USE_RAIL
config FPU
default y
endif # SOC_GECKO_USE_RAIL
if BT
config FPU
default y
config COMMON_LIBC_MALLOC_ARENA_SIZE
default 8192
config MAIN_STACK_SIZE
default 2304
if SHELL
config SHELL_STACK_SIZE
default 4096
endif # SHELL
endif # BT
endif # BOARD_SPARKFUN_THING_PLUS_MGM240P
``` | /content/code_sandbox/boards/sparkfun/thing_plus_matter_mgm240p/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 170 |
```yaml
description: GPIO Wake Up Trigger for EFR32MG24
compatible: "silabs,gecko-wake-up-trigger"
include: base.yaml
properties:
gpios:
type: phandle-array
required: true
description: |
GPIO used as wake up trigger from EM4 sleep
``` | /content/code_sandbox/boards/sparkfun/thing_plus_matter_mgm240p/dts/bindings/silabs,gecko-wake-up-trigger.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 67 |
```unknown
CONFIG_ARM_MPU=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_CORTEX_M_SYSTICK=y
CONFIG_GPIO=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=76800000
CONFIG_CMU_HFCLK_HFXO=y
CONFIG_SOC_GECKO_EMU_DCDC=y
CONFIG_SOC_GECKO_EMU_DCDC_MODE_ON=y
CONFIG_CMU_HFCLK_LFXO=y
CONFIG_HW_STACK_PROTECTION=y
CONFIG_PINCTRL=y
CONFIG_REGULATOR=y
``` | /content/code_sandbox/boards/sparkfun/thing_plus_matter_mgm240p/sparkfun_thing_plus_matter_mgm240p_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 111 |
```yaml
identifier: sparkfun_red_v_things_plus
name: SparkFun RED-V Things Plus
type: mcu
arch: riscv
toolchain:
- zephyr
ram: 16
testing:
ignore_tags:
- net
- bluetooth
supported:
- uart
- gpio
- i2c
- spi
- pwm
- watchdog
vendor: sparkfun
``` | /content/code_sandbox/boards/sparkfun/red_v_things_plus/sparkfun_red_v_things_plus.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 92 |
```cmake
board_runner_args(jlink "--device=FE310")
board_runner_args(jlink "--iface=JTAG")
board_runner_args(jlink "--speed=4000")
board_runner_args(jlink "--tool-opt=-jtagconf -1,-1")
board_runner_args(jlink "--tool-opt=-autoconnect 1")
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/sparkfun/red_v_things_plus/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 82 |
```unknown
config BOARD_SPARKFUN_RED_V_THINGS_PLUS
select SOC_SIFIVE_FREEDOM_FE310
``` | /content/code_sandbox/boards/sparkfun/red_v_things_plus/Kconfig.sparkfun_red_v_things_plus | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 24 |
```unknown
/*
*
*/
#include <zephyr/dt-bindings/pinctrl/sifive-pinctrl.h>
&pinctrl {
/* UART0 */
uart0_rx_default: uart0_rx_default {
pinmux = <16 SIFIVE_PINMUX_IOF0>;
};
uart0_tx_default: uart0_tx_default {
pinmux = <17 SIFIVE_PINMUX_IOF0>;
};
/* SPI1 */
spi1_cs0_default: spi1_cs0_default {
pinmux = <2 SIFIVE_PINMUX_IOF0>;
};
spi1_mosi_default: spi1_mosi_default {
pinmux = <3 SIFIVE_PINMUX_IOF0>;
};
spi1_miso_default: spi1_miso_default {
pinmux = <4 SIFIVE_PINMUX_IOF0>;
};
spi1_sck_default: spi1_sck_default {
pinmux = <5 SIFIVE_PINMUX_IOF0>;
};
spi1_cs2_default: spi1_cs2_default {
pinmux = <9 SIFIVE_PINMUX_IOF0>;
};
spi1_cs3_default: spi1_cs3_default {
pinmux = <10 SIFIVE_PINMUX_IOF0>;
};
/* PWM0 */
pwm0_0_default: pwm0_0_default {
pinmux = <0 SIFIVE_PINMUX_IOF1>;
};
pwm0_1_default: pwm0_1_default {
pinmux = <1 SIFIVE_PINMUX_IOF1>;
};
pwm0_2_default: pwm0_2_default {
pinmux = <2 SIFIVE_PINMUX_IOF1>;
};
pwm0_3_default: pwm0_3_default {
pinmux = <3 SIFIVE_PINMUX_IOF1>;
};
/* PWM1 */
pwm1_0_default: pwm1_0_default {
pinmux = <20 SIFIVE_PINMUX_IOF1>;
};
pwm1_1_default: pwm1_1_default {
pinmux = <19 SIFIVE_PINMUX_IOF1>;
};
pwm1_2_default: pwm1_2_default {
pinmux = <21 SIFIVE_PINMUX_IOF1>;
};
pwm1_3_default: pwm1_3_default {
pinmux = <22 SIFIVE_PINMUX_IOF1>;
};
/* PWM2 */
pwm2_0_default: pwm2_0_default {
pinmux = <10 SIFIVE_PINMUX_IOF1>;
};
pwm2_1_default: pwm2_1_default {
pinmux = <11 SIFIVE_PINMUX_IOF1>;
};
pwm2_2_default: pwm2_2_default {
pinmux = <12 SIFIVE_PINMUX_IOF1>;
};
pwm2_3_default: pwm2_3_default {
pinmux = <13 SIFIVE_PINMUX_IOF1>;
};
/* I2C0 */
i2c0_0_default: i2c0_0_default {
pinmux = <12 SIFIVE_PINMUX_IOF0>;
};
i2c0_1_default: i2c0_1_default {
pinmux = <13 SIFIVE_PINMUX_IOF0>;
};
};
``` | /content/code_sandbox/boards/sparkfun/red_v_things_plus/sparkfun_red_v_things_plus-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 745 |
```restructuredtext
.. _sparkfun_thing_plus_mgm240p:
SPARKFUN THING PLUS MATTER
###########################
Overview
********
The MGM240P Mighty Sparkfun Think Plus Matter contains
a Wireless System-On-Chip from the EFR32MG24 family built on an
ARM Cortex-M33F processor with excellent low power capabilities.
.. figure:: ./img/MGM240P_Thing_Plus.jpg
:height: 260px
:align: center
:alt: MGM240P Sparkfun Think Plus Matter
xG24-MGM240P (image courtesy of Sparkfun)
Hardware
********
- Based on the Series 2 EFR32MG24 SoC
- CPU core: 32-bit ARM Cortex-M33 core at 39 MHz
- Flash memory: 1536 kB
- RAM: 256 kB
- Supports Multiple 802.15.4 Wireless Protocols (Zigbee and OpenThread)
- Bluetooth Low Energy 5.3
- Crystals for LFXO (32 kHz) and HFXO (39 MHz).
For more information about the EFR32MG24 SoC and BRD2601B board, refer to these
documents:
- `EFR32MG24 Website`_
- `EFR32MG24 Datasheet`_
- `EFR32xG24 Reference Manual`_
- `MGM240P Datasheet`_
- `MGM240P Schematics`_
Supported Features
==================
The board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| COUNTER | on-chip | stimer |
+-----------+------------+-------------------------------------+
| FLASH | on-chip | flash memory |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial |
+-----------+------------+-------------------------------------+
| TRNG | on-chip | semailbox |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | watchdog |
+-----------+------------+-------------------------------------+
| I2C(M/S) | on-chip | i2c |
+-----------+------------+-------------------------------------+
| RADIO | on-chip | bluetooth |
+-----------+------------+-------------------------------------+
Other hardware features are currently not supported by the port.
Connections and IOs
===================
In the following table, the column **Name** contains Pin names. For example, PA2
means Pin number 2 on PORTA, as used in the board's datasheets and manuals.
+-------+-------------+-------------------------------------+
| Name | Function | Usage |
+=======+=============+=====================================+
| PA8 | GPIO | LED0 |
+-------+-------------+-------------------------------------+
| PA5 | USART0_TX | UART Console EFM_BC_TX US0_TX |
+-------+-------------+-------------------------------------+
| PA6 | USART0_RX | UART Console EFM_BC_RX US0_RX |
+-------+-------------+-------------------------------------+
The default configuration can be found in
:zephyr_file:`boards/silabs/sparkfun_thing_plus_mgm240p/sparkfun_thing_plus_mgm240p_defconfig`
System Clock
============
The EFR32MG24 SoC is configured to use the 39 MHz external oscillator on the
board.
Serial Port
===========
The EFR32MG24 SoC has one USART and two EUSARTs.
USART0 is connected to the board controller and is used for the console.
Programming and Debugging
*************************
.. note::
Before using the kit the first time, you should update the J-Link firmware
from `J-Link-Downloads`_
Flashing
========
The sample application :ref:`hello_world` is used for this example.
Build the Zephyr kernel and application:
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: sparkfun_thing_plus_mgm240p
:goals: build
Connect the sparkfun_thing_plus_mgm240p to your host computer using the USB port and you
should see a USB connection.
Open a serial terminal (minicom, putty, etc.) with the following settings:
- Speed: 115200
- Data: 8 bits
- Parity: None
- Stop bits: 1
Reset the board and you'll see the following message on the corresponding serial port
terminal session:
.. code-block:: console
Hello World! _sparkfun_thing_plus_mgm240p
Bluetooth
=========
To use the BLE function, run the command below to retrieve necessary binary
blobs from the SiLabs HAL repository.
.. code-block:: console
west blobs fetch silabs
Then build the Zephyr kernel and a Bluetooth sample with the following
command. The :ref:`bluetooth-observer-sample` sample application is used in
this example.
.. zephyr-app-commands::
:zephyr-app: samples/bluetooth/observer
:board: sparkfun_thing_plus_mgm240p
:goals: build
.. _EFR32MG24 Website:
path_to_url#
.. _EFR32MG24 Datasheet:
path_to_url
.. _EFR32xG24 Reference Manual:
path_to_url
.. _MGM240P Datasheet:
path_to_url
.. _MGM240P Schematics:
path_to_url
.. _J-Link-Downloads:
path_to_url
``` | /content/code_sandbox/boards/sparkfun/thing_plus_matter_mgm240p/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,215 |
```yaml
board:
name: sparkfun_red_v_things_plus
vendor: sparkfun
socs:
- name: fe310
``` | /content/code_sandbox/boards/sparkfun/red_v_things_plus/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 31 |
```unknown
CONFIG_GPIO=y
CONFIG_PINCTRL=y
CONFIG_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_UART_SIFIVE_PORT_0=y
CONFIG_UART_CONSOLE=y
``` | /content/code_sandbox/boards/sparkfun/red_v_things_plus/sparkfun_red_v_things_plus_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 34 |
```unknown
if BOARD_SPARKFUN_RED_V_THINGS_PLUS
config SYS_CLOCK_TICKS_PER_SEC
default 128
config HAS_FLASH_LOAD_OFFSET
default y
config FLASH_LOAD_OFFSET
default 0x0
config FLASH_BASE_ADDRESS
default $(dt_node_reg_addr_hex,/soc/spi@10014000,1)
endif # BOARD_SPARKFUN_RED_V_THINGS_PLUS
``` | /content/code_sandbox/boards/sparkfun/red_v_things_plus/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 80 |
```unknown
/dts-v1/;
#include <sifive/riscv32-fe310.dtsi>
#include "sparkfun_red_v_things_plus-pinctrl.dtsi"
/ {
model = "SparkFun RED-V Things Plus";
compatible = "sparkfun,red-v_things_plus";
aliases {
led0 = &led0;
watchdog0 = &wdog0;
};
chosen {
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,sram = &dtim;
zephyr,flash = &flash0;
};
leds {
compatible = "gpio-leds";
led0: led_0 {
gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
label = "Blue LED";
};
};
};
&gpio0 {
status = "okay";
};
&uart0 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart0_rx_default &uart0_tx_default>;
pinctrl-names = "default";
};
/* disabled (used by Flash ROM by default) */
&spi0 {
reg = <0x10014000 0x1000 0x20010000 0x3c0900>;
flash0: flash@0 {
compatible = "issi,is25lp032", "jedec,spi-nor";
status = "disabled";
size = <33554432>;
jedec-id = [96 60 16];
reg = <0>;
spi-max-frequency = <133000000>;
};
};
&spi1 {
status = "okay";
pinctrl-0 = <&spi1_cs0_default &spi1_cs2_default &spi1_cs3_default
&spi1_mosi_default &spi1_miso_default &spi1_sck_default>;
pinctrl-names = "default";
};
&i2c0 {
status = "okay";
clock-frequency = <100000>;
pinctrl-0 = <&i2c0_0_default &i2c0_1_default>;
pinctrl-names = "default";
};
``` | /content/code_sandbox/boards/sparkfun/red_v_things_plus/sparkfun_red_v_things_plus.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 473 |
```cmake
board_runner_args(jlink "--device=nRF52840_xxAA" "--speed=4000")
board_runner_args(pyocd "--target=nrf52840" "--frequency=4000000")
include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
include(${ZEPHYR_BASE}/boards/common/openocd-nrf5.board.cmake)
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/sparkfun/micromod/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 113 |
```cmake
# Suppress "unique_unit_address_if_enabled" to handle the following overlaps:
# - power@40000000 & clock@40000000 & bprot@40000000
# - acl@4001e000 & flash-controller@4001e000
list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled")
``` | /content/code_sandbox/boards/sparkfun/micromod/pre_dt_board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 72 |
```restructuredtext
.. _sparkfun_red_v_things_plus:
SparkFun RED-V Things Plus
##########################
Overview
********
The SparkFun RED-V Things Plus is a development board with
a SiFive FE310-G002 RISC-V SoC.
.. image:: img/sparkfun_red_v_things_plus.jpg
:align: center
:alt: SparkFun RED-V Things Plus board
For more information about the SparkFun RED-V Things Plus and SiFive FE310-G002:
- `SparkFun RED-V Things Plus Website`_
- `SiFive FE310-G002 Datasheet`_
- `SiFive FE310-G002 User Manual`_
Programming and debugging
*************************
Building
========
Applications for the ``sparkfun_red_v_things_plus`` board configuration can be built as usual
(see :ref:`build_an_application`) using the corresponding board name:
.. zephyr-app-commands::
:board: sparkfun_red_v_things_plus
:goals: build
Flashing
========
The SparkFun RED-V Things Plus uses Segger J-Link OB for flashing and debugging.
To flash and debug the board, you'll need to install the
`Segger J-Link Software and Documentation Pack
<path_to_url#J-LinkSoftwareAndDocumentationPack>`_
and choose version V6.46a or later (Downloads for Windows, Linux, and macOS are
available).
With the Segger J-Link Software installed, you can flash the application as usual
(see :ref:`build_an_application` and :ref:`application_run` for more details):
.. zephyr-app-commands::
:board: sparkfun_red_v_things_plus
:goals: flash
Debugging
=========
Refer to the detailed overview about :ref:`application_debugging`.
.. _SparkFun RED-V Things Plus Website:
path_to_url
.. _SiFive FE310-G002 Datasheet:
path_to_url
.. _SiFive FE310-G002 User Manual:
path_to_url
``` | /content/code_sandbox/boards/sparkfun/red_v_things_plus/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 423 |
```yaml
board:
name: micromod
vendor: sparkfun
socs:
- name: nrf52840
``` | /content/code_sandbox/boards/sparkfun/micromod/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 29 |
```unknown
# Enable MPU
CONFIG_ARM_MPU=y
# Enable hardware stack protection
CONFIG_HW_STACK_PROTECTION=y
# Enable RTT
CONFIG_USE_SEGGER_RTT=y
# Enable GPIO
CONFIG_GPIO=y
# Enable console
CONFIG_CONSOLE=y
# Enable UART
CONFIG_SERIAL=y
``` | /content/code_sandbox/boards/sparkfun/micromod/micromod_nrf52840_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 62 |
```unknown
# Sparkfun micromod board configuration
if BOARD_MICROMOD_NRF52840
config BT_CTLR
default BT
endif # BOARD_MICROMOD_NRF52840
``` | /content/code_sandbox/boards/sparkfun/micromod/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 39 |
```unknown
/*
*
*/
&pinctrl {
uart0_default: uart0_default {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 3)>,
<NRF_PSEL(UART_RX, 1, 10)>,
<NRF_PSEL(UART_RTS, 1, 2)>,
<NRF_PSEL(UART_CTS, 1, 9)>;
};
};
uart0_sleep: uart0_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 3)>,
<NRF_PSEL(UART_RX, 1, 10)>,
<NRF_PSEL(UART_RTS, 1, 2)>,
<NRF_PSEL(UART_CTS, 1, 9)>;
low-power-enable;
};
};
uart1_default: uart1_default {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 7)>,
<NRF_PSEL(UART_RX, 1, 5)>;
};
};
uart1_sleep: uart1_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 7)>,
<NRF_PSEL(UART_RX, 1, 5)>;
low-power-enable;
};
};
i2c0_default: i2c0_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 8)>,
<NRF_PSEL(TWIM_SCL, 0, 11)>;
};
};
i2c0_sleep: i2c0_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 8)>,
<NRF_PSEL(TWIM_SCL, 0, 11)>;
low-power-enable;
};
};
i2c1_default: i2c1_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 1, 1)>,
<NRF_PSEL(TWIM_SCL, 0, 24)>;
};
};
i2c1_sleep: i2c1_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 1, 1)>,
<NRF_PSEL(TWIM_SCL, 0, 24)>;
low-power-enable;
};
};
spi0_default: spi0_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 28)>,
<NRF_PSEL(SPIM_MOSI, 0, 31)>,
<NRF_PSEL(SPIM_MISO, 0, 2)>;
};
};
spi0_sleep: spi0_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 28)>,
<NRF_PSEL(SPIM_MOSI, 0, 31)>,
<NRF_PSEL(SPIM_MISO, 0, 2)>;
low-power-enable;
};
};
qspi_default: qspi_default {
group1 {
psels = <NRF_PSEL(QSPI_SCK, 0, 19)>,
<NRF_PSEL(QSPI_IO0, 0, 14)>,
<NRF_PSEL(QSPI_IO1, 0, 21)>,
<NRF_PSEL(QSPI_IO2, 0, 23)>,
<NRF_PSEL(QSPI_IO3, 1, 0)>,
<NRF_PSEL(QSPI_CSN, 0, 12)>;
nordic,drive-mode = <NRF_DRIVE_H0H1>;
};
};
qspi_sleep: qspi_sleep {
group1 {
psels = <NRF_PSEL(QSPI_SCK, 0, 19)>,
<NRF_PSEL(QSPI_IO0, 0, 14)>,
<NRF_PSEL(QSPI_IO1, 0, 21)>,
<NRF_PSEL(QSPI_IO2, 0, 23)>,
<NRF_PSEL(QSPI_IO3, 1, 0)>;
low-power-enable;
};
group2 {
psels = <NRF_PSEL(QSPI_CSN, 0, 12)>;
low-power-enable;
bias-pull-up;
};
};
};
``` | /content/code_sandbox/boards/sparkfun/micromod/micromod_nrf52840-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,029 |
```yaml
identifier: micromod/nrf52840
name: Sparkfun Micromod nRF52840 board
type: mcu
arch: arm
ram: 256
flash: 1024
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- ble
- gpio
- spi
- qspi
- i2c
- pwm
- adc
- usb_device
- usb_cdc
- watchdog
- micromod_gpio
- micromod_uart
- micromod_i2c
- micromod_spi
vendor: Sparkfun
``` | /content/code_sandbox/boards/sparkfun/micromod/micromod_nrf52840.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 148 |
```unknown
config BOARD_MICROMOD
select SOC_NRF52840_QIAA if BOARD_MICROMOD_NRF52840
``` | /content/code_sandbox/boards/sparkfun/micromod/Kconfig.micromod | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 27 |
```unknown
/*
*
*/
/dts-v1/;
#include <nordic/nrf52840_qiaa.dtsi>
#include "micromod_nrf52840-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "Sparkfun Micrmod nRF52840 board";
compatible = "sparkfun,micromod-nrf52840";
chosen {
zephyr,console = &uart0;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,ieee802154 = &ieee802154;
};
/* These aliases are provided for compatibility with samples */
aliases {
led0 = &led0;
watchdog0 = &wdt0;
};
leds {
compatible = "gpio-leds";
led0: led_0 {
gpios = <&gpio0 13 0>;
label = "Blue LED";
};
};
micromod_header: connector {
compatible = "sparkfun,micromod-gpio";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpio0 4 0>, /* A0 */
<1 0 &gpio0 5 0>, /* A1 */
<2 0 &gpio0 27 0>, /* D0 */
<3 0 &gpio1 8 0>, /* D1/CAM_TRIG */
<4 0 &gpio0 15 0>, /* I2C_INT# */
<5 0 &gpio0 29 0>, /* G0/BUS0 */
<6 0 &gpio0 3 0>, /* G1/BUS1 */
<7 0 &gpio1 13 0>, /* G2/BUS2 */
<8 0 &gpio1 12 0>, /* G3/BUS3 */
<9 0 &gpio1 11 0>, /* G4/BUS4 */
<10 0 &gpio0 17 0>, /* G5/BUS5 */
<11 0 &gpio1 6 0>, /* G6/BUS6 */
<12 0 &gpio1 4 0>, /* G7/BUS7 */
<13 0 &gpio1 14 0>, /* G8 */
<14 0 &gpio0 9 0>, /* G9/ADC_D-/CAM_HSYNC */
<15 0 &gpio0 10 0>, /* G10/ADC_D+/CAM_VSYNC */
//<16 NO CONNECTED /* G11/SWO */
<17 0 &gpio0 20 0>; /* SPI_CS */
};
};
®0 {
status = "okay";
};
®1 {
regulator-initial-mode = <NRF5X_REG_MODE_DCDC>;
};
&adc {
status = "okay";
};
&gpiote {
status = "okay";
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&uicr {
nfct-pins-as-gpios;
gpio-as-nreset;
};
&uart0 {
compatible = "nordic,nrf-uarte";
current-speed = <115200>;
status = "okay";
pinctrl-0 = <&uart0_default>;
pinctrl-1 = <&uart0_sleep>;
pinctrl-names = "default", "sleep";
};
&uart1 {
compatible = "nordic,nrf-uarte";
current-speed = <115200>;
status = "okay";
pinctrl-0 = <&uart1_default>;
pinctrl-1 = <&uart1_sleep>;
pinctrl-names = "default", "sleep";
};
&i2c0 {
compatible = "nordic,nrf-twi";
status = "okay";
pinctrl-0 = <&i2c0_default>;
pinctrl-1 = <&i2c0_sleep>;
pinctrl-names = "default", "sleep";
};
&i2c1 {
compatible = "nordic,nrf-twi";
status = "okay";
pinctrl-0 = <&i2c1_default>;
pinctrl-1 = <&i2c1_sleep>;
pinctrl-names = "default", "sleep";
};
&spi2 {
compatible = "nordic,nrf-spi";
status = "okay";
cs-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&spi0_default>;
pinctrl-1 = <&spi0_sleep>;
pinctrl-names = "default", "sleep";
};
&qspi {
status = "okay";
pinctrl-0 = <&qspi_default>;
pinctrl-1 = <&qspi_sleep>;
pinctrl-names = "default", "sleep";
w25q128jv: w25q128jv@0 {
status="okay";
compatible = "nordic,qspi-nor";
reg = <0>;
writeoc = "pp4io";
readoc = "read4io";
sck-frequency = <DT_FREQ_M(32)>;
jedec-id = [ef 70 18];
size = <DT_SIZE_M(128)>;
has-dpd;
t-enter-dpd = <3000>;
t-exit-dpd = <3000>;
};
};
&ieee802154 {
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 0x00010000>;
};
slot0_partition: partition@10000 {
label = "image-0";
reg = <0x00010000 0x00076000>;
};
slot1_partition: partition@86000 {
label = "image-1";
reg = <0x00086000 0x00074000>;
};
/*
* The flash starting at 0x000f8000 and ending at
* 0x000fffff is reserved for use by the application.
*/
/*
* Storage partition will be used by FCB/LittleFS/NVS
* if enabled.
*/
storage_partition: partition@fA000 {
label = "storage";
reg = <0x000fA000 0x00006000>;
};
};
};
zephyr_udc0: &usbd {
compatible = "nordic,nrf-usbd";
status = "okay";
};
// Sparkfun Micromod compatible pins
micromod_1_uart: &uart0 {};
micromod_2_uart: &uart1 {};
micromod_0_i2c: &i2c0 {};
micromod_1_i2c: &i2c1 {};
micromod_0_spi: &spi2 {};
``` | /content/code_sandbox/boards/sparkfun/micromod/micromod_nrf52840.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,613 |
```unknown
/*
*
*/
/ {
pro_micro: connector {
compatible = "sparkfun,pro-micro";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map
= <1 0 &gpio0 0 0> /* D1 */
, <0 0 &gpio0 1 0> /* D0 */
, <2 0 &gpio0 2 0> /* D2 */
, <3 0 &gpio0 3 0> /* D3 */
, <4 0 &gpio0 4 0> /* D4/A6 */
, <5 0 &gpio0 5 0> /* D5 */
, <6 0 &gpio0 6 0> /* D6/A7 */
, <7 0 &gpio0 7 0> /* D7 */
, <8 0 &gpio0 8 0> /* D8/A8 */
, <9 0 &gpio0 9 0> /* D9/A9 */
, <10 0 &gpio0 21 0> /* D10/A10 */
, <16 0 &gpio0 23 0> /* D16 */
, <14 0 &gpio0 20 0> /* D14 */
, <15 0 &gpio0 22 0> /* D15 */
, <18 0 &gpio0 26 0> /* D18/A0 */
, <19 0 &gpio0 27 0> /* D19/A1 */
, <20 0 &gpio0 28 0> /* D20/A2 */
, <21 0 &gpio0 29 0> /* D21/A3 */
;
};
};
pro_micro_i2c: &i2c1 {};
pro_micro_spi: &spi0 {};
pro_micro_serial: &uart0 {};
``` | /content/code_sandbox/boards/sparkfun/pro_micro_rp2040/sparkfun_pro_micro_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 490 |
```restructuredtext
.. _boardname_linkname:
SparkFun MicroMod board Processor
#################################
Overview
********
MicroMod is a solderless, modular interface ecosystem that uses the M.2 standard
to mix and match your choice of processor with specific Function Boards or
stand-alone Carrier Boards. A MicroMod processor board is approximately 22x22 mm,
and can insert into any MicroMod carrier board. More information can be found in
the `Micromod specification website`_.
All Micromod board targets support the following hardware features:
- USB host mode compliant to 2.0 specification
- GPIO
- 2 UART
- 2 I2C
- 2 SPI
- 2 ADC
- 2 PWM
- Watchdog Timer (WDT)
.. figure:: img/sparkfun_micromod.webp
:align: center
:alt: Sparkfun Micromod board
Sparkfun Micromod board (Credit: path_to_url
Zephyr currently supports the following SoCs:
- ``micromod/nrf52840``
SparkFun MicroMod nRF52840 board Processor
##########################################
Overview
********
The ``micromod/nrf52840`` board target features the nRF52840 SoC
from Nordic Semiconductor, the SparkFun MicroMod nRF52840 Processor offers
a powerful combination of ARM Cortex-M4 CPU and 2.4 GHz Bluetooth transceiver
in the MicroMod form-factor. More information can be found in
the `Micromod nRF52840 guide`_.
Hardware
********
The ``micromod/nrf52840`` board target supports the following
hardware features:
- ARM Cortex-M4 CPU with floating point unit (FPU)
- 1MB internal Flash
- 256kB internal RAM
- Integrated 2.4GHz radio with support for Bluetooth Low Energy (BLE) and ieee802154
- USB 2.0 full speed (12 Mbps) controller
- QSPI with 128Mb flash memory
- ARM TrustZone Cryptocell 310 security subsystem
- USB host mode compliant to 2.0 specification
- GPIO
- 2 UART
- 2 I2C
- 2 SPI
- 2 ADC
- 2 PWM
- Watchdog Timer (WDT)
Supported Features
==================
The Zephyr ``micromod/nrf52840`` board target supports the following hardware
features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| SYSTICK | on-chip | system clock |
+-----------+------------+-------------------------------------+
| RADIO | on-chip | Bluetooth, |
| | | ieee802154 |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| FLASH | on-chip | flash |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| USB | on-chip | usb |
+-----------+------------+-------------------------------------+
| QSPI | on-chip | nordic,nrf-qspi |
+-----------+------------+-------------------------------------+
Connections and IOs
===================
LED
---
* Led0 (blue) = P0.13
Micromod header
---------------
* micromod_1_uart = uart0
* micromod_2_uart = uart1
* micromod_0_i2c = i2c0
* micromod_1_i2c = i2c1
* micromod_0_spi = spi2
* micromod_header compatible with ``sparkfun,micromod-gpio``
Programming and Debugging
*************************
Applications for the ``micromod/nrf52840`` board target can be
built, flashed, and debugged in the usual way. See
:ref:`build_an_application` and :ref:`application_run` for more details on
building and running.
Flashing
========
Follow the instructions in the :ref:`nordic_segger` page to install
and configure all the necessary software. Further information can be
found in :ref:`nordic_segger_flashing`. Then build and flash
applications as usual (see :ref:`build_an_application` and
:ref:`application_run` for more details).
The flashing tool will depend on the carrier used along with the board.
In the case of `Sparkfun asset tracking carrier`, it is possible to use
the SWD interface along with a J-Link.
Here is an example for the :ref:`hello_world` application.
First, run your favorite terminal program to listen for output.
.. code-block:: console
$ minicom -D <tty_device> -b 115200
Replace :code:`<tty_device>` with the port where the board nRF52840 DK
can be found. For example, under Linux, :code:`/dev/ttyACM0`.
Then build and flash the application in the usual way.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: micromod/nrf52840
:goals: build flash
Debugging
=========
Refer to the :ref:`nordic_segger` page to learn about debugging Nordic boards with a
Segger IC.
In case of using a Nordic Segger Jlink, it is possible to configure the app to use Segger Real
Time Transfer (RTT) for debugging. In this case, build your app with the
:ref:`RTT snippet <snippet-rtt-console>`.
Testing the on-board LED
************************
There is a sample that allow you to test the LED on the board is working properly
with Zephyr:
* :zephyr:code-sample:`blinky`
You can build and flash the example to make sure Zephyr is running correctly on
your board. The button and LED definitions can be found in
:zephyr_file:`boards/sparkfun/micromod/micromod_nrf52840.dts`.
Testing the 128Mb qspi memory flash
***********************************
The ``micromod/nrf52840`` board target has a built-in NOR flash memory connected
to the qspi interface. It can be tested with the samples/drivers/jesd216 app.
.. zephyr-app-commands::
:zephyr-app: samples/drivers/jesd216
:board: micromod/nrf52840
:goals: build flash
References
**********
.. target-notes::
.. _Micromod specification website: path_to_url
.. _Micromod nRF52840 guide: path_to_url
.. _J-Link Software and documentation pack: path_to_url
.. _nRF52840 Product Specification: path_to_url
``` | /content/code_sandbox/boards/sparkfun/micromod/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,564 |
Subsets and Splits
No community queries yet
The top public SQL queries from the community will appear here once available.