text stringlengths 9 39.2M | dir stringlengths 25 226 | lang stringclasses 163 values | created_date timestamp[s] | updated_date timestamp[s] | repo_name stringclasses 751 values | repo_full_name stringclasses 752 values | star int64 1.01k 183k | len_tokens int64 1 18.5M |
|---|---|---|---|---|---|---|---|---|
```unknown
config BOARD_96B_CARBON
select SOC_STM32F401XE if BOARD_96B_CARBON_STM32F401XE
select SOC_NRF51822_QFAC if BOARD_96B_CARBON_NRF51822
``` | /content/code_sandbox/boards/96boards/carbon/Kconfig.96b_carbon | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 56 |
```unknown
/*
*/
&pinctrl {
i2c0_default: i2c0_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 28)>,
<NRF_PSEL(TWIM_SCL, 0, 2)>;
};
};
i2c0_sleep: i2c0_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 28)>,
<NRF_PSEL(TWIM_SCL, 0, 2)>;
low-power-enable;
};
};
uart0_default: uart0_default {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 29)>,
<NRF_PSEL(UART_RX, 0, 11)>;
};
};
uart0_sleep: uart0_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 29)>,
<NRF_PSEL(UART_RX, 0, 11)>;
low-power-enable;
};
};
spi1_default: spi1_default {
group1 {
psels = <NRF_PSEL(SPIS_SCK, 0, 7)>,
<NRF_PSEL(SPIS_MOSI, 0, 0)>,
<NRF_PSEL(SPIS_MISO, 0, 30)>,
<NRF_PSEL(SPIS_CSN, 0, 25)>;
};
};
};
``` | /content/code_sandbox/boards/96boards/carbon/96b_carbon_nrf51822-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 346 |
```restructuredtext
.. _96b_neonkey:
96Boards Neonkey
################
Overview
********
96Boards Neonkey board is based on the STMicroelectronics STM32F411CE
Cortex M4 CPU.
.. figure:: img/96b_neonkey.jpg
:align: center
:alt: 96Boards Neonkey
96Boards Neonkey
This board acts as a sensor hub platform for all 96Boards compliant
family products. It can also be used as a standalone board.
Hardware
********
96Boards Neonkey provides the following hardware components:
- STM32F411CE in UFQFPN48 package
- ARM |reg| 32-bit Cortex |reg|-M4 CPU with FPU
- 84 MHz max CPU frequency
- 1.8V work voltage
- 512 KB Flash
- 128 KB SRAM
- On board sensors:
- Temperature/Humidity: SI7034-A10
- Pressure: BMP280
- ALS/Proximity: RPR-0521RS
- Geomagnetic: BMM150
- Accelerometer/Gyroscope: BMI160
- AMR Hall sensor: MRMS501A
- Microphone: SPK0415HM4H-B
- 4 User LEDs
- 15 General purpose LEDs
- GPIO with external interrupt capability
- I2C (3)
- SPI (1)
- I2S (1)
Supported Features
==================
The Zephyr 96b_neonkey board configuration supports the following hardware
features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| SYSTICK | on-chip | system clock |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| FLASH | on-chip | flash |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
More details about the board can be found at `96Boards website`_.
The default board configuration can be found in
:zephyr_file:`boards/96boards/neonkey/96b_neonkey_defconfig`
Connections and IOs
===================
LED
---
- LED1 / User1 LED = PB12
- LED2 / User2 LED = PB13
- LED3 / User3 LED = PB14
- LED4 / User4 LED = PB15
Push buttons
------------
- BUTTON = RST (SW1)
- BUTTON = USR (SW2)
System Clock
============
96Boards Neonkey can be driven by an internal oscillator as well as the main
PLL clock. By default System clock is sourced by PLL clock at 84MHz, driven
by internal oscillator.
Serial Port
===========
On 96Boards Neonkey Zephyr console output is assigned to USART1.
Default settings are 115200 8N1.
I2C
---
96Boards Neonkey board has up to 3 I2Cs. The default I2C mapping for Zephyr is:
- I2C1_SCL : PB6
- I2C1_SDA : PB7
- I2C2_SCL : PB10
- I2C2_SDA : PB3
- I2C3_SCL : PA8
- I2C3_SCL : PB4
SPI
---
96Boards Neonkey board has one SPI. The default SPI mapping for Zephyr is:
- SPI1_NSS : PA4
- SPI1_SCK : PA5
- SPI1_MISO : PA6
- SPI1_MOSI : PA7
Programming and Debugging
*************************
Building
========
Here is an example for building the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: 96b_neonkey
:goals: build
Flashing
========
96Boards Neonkey can be flashed by two methods, one using the ROM
bootloader and another using the SWD debug port (which requires additional
hardware).
Using ROM bootloader:
---------------------
ROM bootloader can be triggered by the following pattern:
1. Connect BOOT0 to VDD (link JTAG pins 1 and 5 on P4 header)
2. Press and hold the USR button
3. Press and release the RST button
More detailed information on activating the ROM bootloader can be found in
Chapter 29 of Application note `AN2606`_. The ROM bootloader supports flashing
via UART, I2C and SPI protocols.
For flashing, `stm32flash`_ command line utility can be used. The following
command will flash the ``zephyr.bin`` binary to the Neonkey board using UART
and starts its execution:
.. code-block:: console
$ stm32flash -w zephyr.bin -v -g 0x08000000 /dev/ttyS0
.. note::
The above command assumes that Neonkey board is connected to
serial port ``/dev/ttyS0``.
Using SWD debugger:
-------------------
For flashing via SWD debug port, 0.1" male header must be soldered at P4
header available at the bottom of the board, near RST button.
Use the `Black Magic Debug Probe`_ as an SWD programmer, which can
be connected to the P4 header using its flying leads and its 20 Pin
JTAG Adapter Board Kit. When plugged into your host PC, the Black
Magic Debug Probe enumerates as a USB serial device as documented on
its `Getting started page`_.
It also uses the GDB binary provided with the Zephyr SDK,
``arm-zephyr-eabi-gdb``. Other GDB binaries, such as the GDB from GCC
ARM Embedded, can be used as well.
.. code-block:: console
$ arm-zephyr-eabi-gdb -q zephyr.elf
(gdb) target extended-remote /dev/ttyACM0
Remote debugging using /dev/ttyACM0
(gdb) monitor swdp_scan
Target voltage: 1.8V
Available Targets:
No. Att Driver
1 STM32F4xx
(gdb) attach 1
Attaching to Remote target
0x080005d0 in ?? ()
(gdb) load
Debugging
=========
After flashing 96Boards Neonkey, it can be debugged using the same
GDB instance. To reattach, just follow the same steps above, till
"attach 1". You can then debug as usual with GDB. In particular, type
"run" at the GDB prompt to restart the program you've flashed.
References
**********
.. _96Boards website:
path_to_url
.. _AN2606:
path_to_url
.. _stm32flash:
path_to_url
.. _Black Magic Debug Probe:
path_to_url
.. _Getting started page:
path_to_url
``` | /content/code_sandbox/boards/96boards/neonkey/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,632 |
```yaml
board:
name: 96b_carbon
vendor: 96boards
socs:
- name: stm32f401xe
- name: nrf51822
``` | /content/code_sandbox/boards/96boards/carbon/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 42 |
```unknown
/*
*
*/
/dts-v1/;
#include <nordic/nrf51822_qfac.dtsi>
#include "96b_carbon_nrf51822-pinctrl.dtsi"
/ {
model = "Seeed Studio Carbon nRF51 96board";
compatible = "seeed,carbon_nrf51";
chosen {
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,bt-mon-uart = &uart0;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
};
aliases {
watchdog0 = &wdt0;
};
};
&gpiote {
status = "okay";
};
&gpio0 {
status = "okay";
};
&i2c0 {
status = "okay";
pinctrl-0 = <&i2c0_default>;
pinctrl-1 = <&i2c0_sleep>;
pinctrl-names = "default", "sleep";
};
&uart0 {
current-speed = <115200>;
status = "okay";
pinctrl-0 = <&uart0_default>;
pinctrl-1 = <&uart0_sleep>;
pinctrl-names = "default", "sleep";
};
&spi1 {
compatible = "nordic,nrf-spis";
status = "okay";
def-char = <0x00>;
pinctrl-0 = <&spi1_default>;
pinctrl-names = "default";
bt-hci@0 {
compatible = "zephyr,bt-hci-spi-slave";
reg = <0>;
irq-gpios = <&gpio0 28 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
};
};
``` | /content/code_sandbox/boards/96boards/carbon/96b_carbon_nrf51822.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 379 |
```yaml
identifier: 96b_carbon/stm32f401xe
name: 96Boards Carbon
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- gpio
- ble
- i2c
- counter
- spi
- usb_device
ram: 96
flash: 512
vendor: 96boards
``` | /content/code_sandbox/boards/96boards/carbon/96b_carbon_stm32f401xe.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 98 |
```unknown
# 96boards Carbon board configuration
if BOARD_96B_CARBON_STM32F401XE
config SPI_STM32_INTERRUPT
default y
depends on SPI
if BT
config SPI
default y
config BT_SPI
default y
endif # BT
endif # BOARD_96B_CARBON_STM32F401XE
if BOARD_96B_CARBON_NRF51822
config BT_CTLR
default BT
endif # BOARD_96B_CARBON_NRF51822
``` | /content/code_sandbox/boards/96boards/carbon/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 110 |
```yaml
identifier: 96b_carbon/nrf51822
name: 96Boards Carbon (nRF51)
type: mcu
arch: arm
ram: 32
flash: 256
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- ble
vendor: seeed
``` | /content/code_sandbox/boards/96boards/carbon/96b_carbon_nrf51822.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 76 |
```unknown
/*
*
*/
/ {
lscon_96b: connector {
compatible = "linaro,96b-lscon-3v3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <13 0 &gpioc 2 0>, /* GPIO-A */
<14 0 &gpioc 3 0>, /* GPIO-B */
<15 0 &gpioc 4 0>, /* GPIO-C */
<16 0 &gpioc 5 0>, /* GPIO-D */
<17 0 &gpioc 6 0>, /* GPIO-E */
<18 0 &gpioc 7 0>, /* GPIO-F */
<19 0 &gpioc 8 0>, /* GPIO-G */
<20 0 &gpioc 9 0>; /* GPIO-H */
};
};
lscon_96b_i2c0: &i2c1 {};
lscon_96b_spi0: &spi2 {};
lscon_96b_uart0: &usart2 {};
lscon_96b_uart1: &usart1 {};
``` | /content/code_sandbox/boards/96boards/carbon/96b_lscon.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 284 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/f4/stm32f401Xe.dtsi>
#include <st/f4/stm32f401r(d-e)tx-pinctrl.dtsi>
#include "96b_lscon.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "Seeed Studio Carbon 96boards";
compatible = "seeed,carbon";
chosen {
zephyr,console = &usart1;
zephyr,shell-uart = &usart1;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,bt-hci = &hci_spi;
};
leds {
compatible = "gpio-leds";
green_led_1: led_1 {
gpios = <&gpiod 2 GPIO_ACTIVE_HIGH>;
label = "USR1 LED";
};
green_led_2: led_2 {
gpios = <&gpioa 15 GPIO_ACTIVE_HIGH>;
label = "USR2 LED";
};
bt_blue_led: led_3 {
gpios = <&gpiob 5 GPIO_ACTIVE_HIGH>;
label = "BT LED";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button {
label = "User";
gpios = <&gpiob 2 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_0>;
};
};
aliases {
led0 = &green_led_1;
led1 = &green_led_2;
led2 = &bt_blue_led;
sw0 = &user_button;
};
};
&clk_lsi {
status = "okay";
};
&clk_hse {
clock-frequency = <DT_FREQ_M(16)>;
status = "okay";
};
&pll {
div-m = <16>;
mul-n = <336>;
div-p = <4>;
div-q = <7>;
clocks = <&clk_hse>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(84)>;
ahb-prescaler = <1>;
apb1-prescaler = <2>;
apb2-prescaler = <1>;
};
&usart1 {
pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&usart2 {
pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa3>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&usart6 {
pinctrl-0 = <&usart6_tx_pc6 &usart6_rx_pc7>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&i2c1 {
pinctrl-0 = <&i2c1_scl_pb6 &i2c1_sda_pb7>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
&i2c2 {
pinctrl-0 = <&i2c2_scl_pb10 &i2c2_sda_pb3>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
&spi1 {
status = "okay";
pinctrl-0 = <&spi1_miso_pa6 &spi1_mosi_pa7
&spi1_sck_pa5 &spi1_nss_pa4>;
pinctrl-names = "default";
/* Nordic nRF51822-QFAC */
hci_spi: bt-hci@0 {
compatible = "zephyr,bt-hci-spi";
reg = <0>;
reset-gpios = <&gpiob 4 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
irq-gpios = <&gpiob 1 GPIO_ACTIVE_HIGH>;
spi-max-frequency = <2000000>;
};
};
&spi2 {
pinctrl-0 = <&spi2_nss_pb12 &spi2_sck_pb13
&spi2_miso_pb14 &spi2_mosi_pb15>;
pinctrl-names = "default";
status = "okay";
};
zephyr_udc0: &usbotg_fs {
pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12>;
pinctrl-names = "default";
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 DT_SIZE_K(32)>;
read-only;
};
/*
* The flash starting at offset 0x00008000 and ending at
* offset 0x0001ffff (sectors 2 through 4) is reserved for
* use by the application.
*/
slot0_partition: partition@20000 {
label = "image-0";
reg = <0x00020000 DT_SIZE_K(128)>;
};
slot1_partition: partition@40000 {
label = "image-1";
reg = <0x00040000 DT_SIZE_K(128)>;
};
scratch_partition: partition@60000 {
label = "image-scratch";
reg = <0x00060000 DT_SIZE_K(128)>;
};
};
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>,
<&rcc STM32_SRC_LSI RTC_SEL(2)>;
status = "okay";
};
``` | /content/code_sandbox/boards/96boards/carbon/96b_carbon_stm32f401xe.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,326 |
```unknown
# Enable GPIO
CONFIG_GPIO=y
# Enable UART driver
CONFIG_SERIAL=y
# Enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
``` | /content/code_sandbox/boards/96boards/carbon/96b_carbon_nrf51822_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```restructuredtext
.. _96b_carbon_nrf51_board:
96Boards Carbon nRF51
#####################
Overview
********
This is the secondary nRF51822 chip on the 96Boards Carbon and provides
Bluetooth functionality to the main STM32F401RET chip via SPI.
.. note::
If you're looking to reprogram the main STMicro part, see
:ref:`96b_carbon_board`. Users should not use this configuration
unless they want to reprogram the secondary chip which provides
Bluetooth connectivity.
Hardware
********
The 96Boards Carbon nRF51 has two external oscillators. The frequency
of the slow clock is 32.768 kHz. The frequency of the main clock is 16
MHz.
See :ref:`96b_carbon_board` for other general information about the
board; that configuration is for the same physical board, just a
different chip.
Supported Features
==================
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| RTC | on-chip | system clock |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| FLASH | on-chip | flash |
+-----------+------------+-------------------------------------+
| SPIS | on-chip | SPI slave |
+-----------+------------+-------------------------------------+
| RADIO | on-chip | Bluetooth |
+-----------+------------+-------------------------------------+
The default configuration can be found in
:zephyr_file:`boards/96boards/carbon/96b_carbon_nrf51822_defconfig`
Connections and IOs
===================
SPI
---
96Boards Carbon nRF51 has one SPI, which for providing Bluetooth
communication. The default SPI mapping for Zephyr is:
- SPI1_NSS : P0.25
- SPI1_SCK : P0.07
- SPI1_MISO : P0.30
- SPI1_MOSI : P0.00
The SWD debug pins are broken out to an external header; all other
connected pins are to the main STM32F401RET chip.
.. _96b_carbon_nrf51_programming:
Programming and Debugging
*************************
Flashing
========
The 96Boards Carbon nRF51 can be flashed using an external SWD
debugger, via the debug header labeled "BLE" on the board's
silkscreen. The header is not populated; 0.1" male header must be
soldered on first.
.. figure:: img/96b_carbon_nrf51.jpg
:align: center
:alt: 96Boards Carbon nRF51 Debug
96Boards Carbon nRF51 Debug
The following example assumes a Zephyr binary ``zephyr.elf`` will be
flashed to the board.
It uses the `Black Magic Debug Probe`_ as an SWD programmer, which can
be connected to the BLE debug header using flying leads and its 20 Pin
JTAG Adapter Board Kit. When plugged into your host PC, the Black
Magic Debug Probe enumerates as a USB serial device as documented on
its `Getting started page`_.
It also uses the GDB binary provided with the Zephyr SDK,
``arm-zephyr-eabi-gdb``. Other GDB binaries, such as the GDB from GCC
ARM Embedded, can be used as well.
.. code-block:: console
$ arm-zephyr-eabi-gdb -q zephyr.elf
(gdb) target extended-remote /dev/ttyACM0
Remote debugging using /dev/ttyACM0
(gdb) monitor swdp_scan
Target voltage: 3.3V
Available Targets:
No. Att Driver
1 nRF51
(gdb) attach 1
Attaching to Remote target
0xabcdef12 in ?? ()
(gdb) load
Debugging
=========
After you've flashed the chip, you can keep debugging using the same
GDB instance. To reattach, just follow the same steps above, but don't
run "load". You can then debug as usual with GDB. In particular, type
"run" at the GDB prompt to restart the program you've flashed.
As an aid to debugging, this board configuration directs a console
output to a currently unused pin connected to the STM32F401RET. Users
who are experienced in electronics rework can remove a resistor (R22)
on the board and attach a wire to the nRF51822's UART output.
.. _96b_carbon_nrf51_bluetooth:
Providing Bluetooth to 96b_carbon
*********************************
This ``96b_carbon/nrf51822`` Zephyr board configuration can be used to provide
Bluetooth functionality from the secondary nRF51822 chip to the
primary STM32F401RE chip on the :ref:`96b_carbon_board`.
To do this, build the ``samples/bluetooth/hci_spi/`` application
provided with Zephyr with ``BOARD=96b_carbon/nrf51822``, then flash it to
the nRF51822 chip using the instructions :ref:`above
<96b_carbon_nrf51_programming>`. (For instructions on how to build a
Zephyr application, see :ref:`build_an_application`.)
.. warning::
Be sure to flash the hci_spi application to the nRF51822 chip and
not to the main STM32F401RET chip. While both chips are supported
by Zephyr, the hci_spi application providing Bluetooth support will
only run on the nRF51822 chip.
References
**********
- `Board documentation from 96Boards`_
- `nRF51822 information from Nordic Semiconductor`_
.. _Black Magic Debug Probe:
path_to_url
.. _Getting started page:
path_to_url
.. _Board documentation from 96Boards:
path_to_url
.. _nRF51822 information from Nordic Semiconductor:
path_to_url
``` | /content/code_sandbox/boards/96boards/carbon/doc/nrf51822.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,365 |
```restructuredtext
.. _boards-renode:
Renode
######
.. toctree::
:maxdepth: 1
:glob:
**/*
``` | /content/code_sandbox/boards/renode/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```cmake
set(SUPPORTED_EMU_PLATFORMS renode)
set(RENODE_SCRIPT ${CMAKE_CURRENT_LIST_DIR}/support/riscv32_virtual.resc)
set(RENODE_UART sysbus.uart0)
``` | /content/code_sandbox/boards/renode/riscv32_virtual/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 42 |
```unknown
config BOARD_RISCV32_VIRTUAL
select SOC_RISCV_VIRTUAL_RENODE
``` | /content/code_sandbox/boards/renode/riscv32_virtual/Kconfig.riscv32_virtual | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 19 |
```yaml
identifier: riscv32_virtual
name: Renode RISC-V 32-bit Virtual Board
type: mcu
arch: riscv
toolchain:
- zephyr
ram: 4096
flash: 4096
simulation: renode
simulation_exec: renode
testing:
ignore_tags:
- net
- bluetooth
renode:
uart: sysbus.uart0
resc: boards/renode/riscv32_virtual/support/riscv32_virtual.resc
supported:
- uart
``` | /content/code_sandbox/boards/renode/riscv32_virtual/riscv32_virtual.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 119 |
```unknown
CONFIG_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_UART_CONSOLE=y
CONFIG_GPIO=n
CONFIG_XIP=y
# Workaround for incorrect SYS_CLOCK_HW_CYCLES_PER_SEC
CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
``` | /content/code_sandbox/boards/renode/riscv32_virtual/riscv32_virtual_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 48 |
```yaml
board:
name: riscv32_virtual
vendor: renode
socs:
- name: riscv_virtual_renode
``` | /content/code_sandbox/boards/renode/riscv32_virtual/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 33 |
```unknown
/*
*
*/
/dts-v1/;
#include <renode_riscv32_virt.dtsi>
/ {
model = "Renode RISCV32 Virtual target";
compatible = "renode,riscv32-virtual";
chosen {
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,flash = &flash0;
zephyr,sram = &sram0;
};
};
&uart0 {
status = "okay";
};
``` | /content/code_sandbox/boards/renode/riscv32_virtual/riscv32_virtual.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 114 |
```unknown
flash: Memory.MappedMemory @ sysbus 0x80000000
size: 0x400000
ddr: Memory.MappedMemory @ sysbus 0x80400000
size: 0x400000
uart0: UART.NS16550 @ sysbus 0x10000000
IRQ -> plic0@10
uart1: UART.NS16550 @ sysbus 0x10000100
IRQ -> plic1@10
cpu: CPU.RiscV32 @ sysbus
cpuType: "rv32imac_zicsr_zifencei"
privilegeArchitecture: PrivilegeArchitecture.Priv1_10
timeProvider: clint
plic0: IRQControllers.PlatformLevelInterruptController @ sysbus 0x0C000000
0 -> cpu@11
numberOfSources: 1023
numberOfContexts: 1
plic1: IRQControllers.PlatformLevelInterruptController @ sysbus 0x08000000
0 -> cpu@4
numberOfSources: 1023
numberOfContexts: 1
clint: IRQControllers.CoreLevelInterruptor @ sysbus 0x02000000
[0,1] -> cpu@[3,7]
frequency: 4000000
``` | /content/code_sandbox/boards/renode/riscv32_virtual/support/riscv32_virtual.repl | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 285 |
```unknown
:name: RISCV32-Virtual
:description: This script is prepared to run Zephyr on a Renode RISCV32 board.
$name?="RISCV32-Virtual"
using sysbus
mach create $name
machine LoadPlatformDescription $ORIGIN/riscv32_virtual.repl
showAnalyzer uart0
cpu PerformanceInMips 4
macro reset
"""
sysbus LoadELF $elf
"""
runMacro $reset
``` | /content/code_sandbox/boards/renode/riscv32_virtual/support/riscv32_virtual.resc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 97 |
```restructuredtext
.. _riscv32-virtual:
RISCV32 Virtual
###############
Overview
********
The RISCV32 Virtual board is a virtual platform made with Renode as an alternative to QEMU.
Contrary to QEMU, the peripherals of this platform can be easily configured by editing the
``riscv32_virtual.repl`` script and the devicetree files accordingly, this allows certain hardware
configurations that only exist in proprietary boards/SoCs to be tested in upstream CI.
Programming and debugging
*************************
Building
========
Applications for the ``riscv32_virtual`` board configuration can be built as usual
(see :ref:`build_an_application`):
.. zephyr-app-commands::
:board: riscv32_virtual
:goals: build
Flashing
========
While this board is emulated and you can't "flash" it, you can use this
configuration to run basic Zephyr applications and kernel tests in the Renode
emulated environment. For example, with the :zephyr:code-sample:`synchronization` sample:
.. zephyr-app-commands::
:zephyr-app: samples/synchronization
:host-os: unix
:board: riscv32_virtual
:goals: run
This will build an image with the synchronization sample app, boot it using
Renode, and display the following console output:
.. code-block:: console
*** Booting Zephyr OS build zephyr-v3.5.0-1511-g56f73bde0fb0 ***
thread_a: Hello World from cpu 0 on riscv32_virtual!
thread_b: Hello World from cpu 0 on riscv32_virtual!
thread_a: Hello World from cpu 0 on riscv32_virtual!
thread_b: Hello World from cpu 0 on riscv32_virtual!
Exit Renode by pressing :kbd:`CTRL+C`.
Debugging
=========
Refer to the detailed overview about :ref:`application_debugging`.
``` | /content/code_sandbox/boards/renode/riscv32_virtual/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 431 |
```restructuredtext
.. _96b_carbon_board:
96Boards Carbon
###############
Overview
********
The 96Boards is based on the STMicroelectronics STM32F401RET Cortex-M4 CPU and
also contains a nRF51822 chip connected over SPI for BLE connectivity.
The 96Boards Carbon board is built with two chips: an STMicroelectronics
STM32F401RET Cortex-M4 CPU and an nRF51822 chip connected to
the Cortex-M4 CPU over SPI for Bluetooth LE connectivity. Even though
both chips exist on the same physical board, they must be programmed
separately:
- The ``96b_carbon/stm32f401xe`` configuration is used when developing programs for
the main chip on the board, the STM32F401RET. Users will likely want to
write applications targeting this chip, using the ``96b_carbon``
configuration, since it is connected to all of the breakout
I/O headers.
- The ``96b_carbon/nrf51822`` configuration should be used for programming
the secondary nRF51822 chip. Most users will likely not develop
applications for this chip, since Zephyr already provides a
sample application that can be flashed onto the nRF51822
to provide Bluetooth functionality to applications on the main
STM32F401RET chip.
For instructions on how to set up the nRF51822 to develop Bluetooth
applications, see :ref:`96b_carbon_nrf51_bluetooth`.
After you have flashed your nRF51, you can perform basic validation
of this Bluetooth setup using the instructions
:ref:`below <96b_carbon_verify_bluetooth>`.
.. figure:: img/96b_carbon.jpg
:align: center
:alt: 96Boards Carbon
96Boards Carbon
Hardware
********
96Boards Carbon provides the following hardware components:
- STM32F401RET6 in LQFP64 package
- ARM |reg| 32-bit Cortex |reg|-M4 CPU with FPU
- 84 MHz max CPU frequency
- VDD from 1.7 V to 3.6 V
- 512 KB Flash
- 96 KB SRAM
- GPIO with external interrupt capability
- 12-bit ADC with 16 channels
- RTC
- Advanced-control Timer
- General Purpose Timers (7)
- Watchdog Timers (2)
- USART/UART (4)
- I2C (3)
- SPI (3)
- SDIO
- USB 2.0 OTG FS
- DMA Controller
- Bluetooth LE over SPI, provided by nRF51822
More information about STM32F401RE can be found here:
- `STM32F401RE on www.st.com`_
- `STM32F401 reference manual`_
Supported Features
==================
The Zephyr ``96b_carbon/stm32f401xe`` board configuration supports the following
hardware features:
+------------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+============+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+------------+------------+-------------------------------------+
| SYSTICK | on-chip | system clock |
+------------+------------+-------------------------------------+
| UART | on-chip | serial port |
+------------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+------------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+------------+------------+-------------------------------------+
| FLASH | on-chip | flash |
+------------+------------+-------------------------------------+
| SPI | on-chip | spi |
+------------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+------------+------------+-------------------------------------+
| USB OTG FS | on-chip | USB device |
+------------+------------+-------------------------------------+
More details about the board can be found at `96Boards website`_.
The default configuration can be found in
:zephyr_file:`boards/96boards/carbon/96b_carbon_stm32f401xe_defconfig`
Connections and IOs
===================
LED
---
- LED1 / User1 LED = PD2
- LED2 / User2 LED = PA15
- LED3 / BT LED = PB5
- LED4 / Power LED = VCC
Push buttons
------------
- BUTTON = BOOT0 (SW1)
- BUTTON = RST
External Connectors
-------------------
Low Speed Header
+--------+-------------+----------------------+
| PIN # | Signal Name | STM32F401 Functions |
+========+=============+======================+
| 1 | UART2_CTS | PA0 |
+--------+-------------+----------------------+
| 3 | UART2_TX | PA2 |
+--------+-------------+----------------------+
| 5 | UART2_RX | PA3 |
+--------+-------------+----------------------+
| 7 | UART2_RTS | PA1 |
+--------+-------------+----------------------+
| 9 | GND | GND |
+--------+-------------+----------------------+
| 11 | USB5V | USB5V |
+--------+-------------+----------------------+
| 13 | AIN12 | PC2 |
+--------+-------------+----------------------+
| 15 | AIN14 | PC4 |
+--------+-------------+----------------------+
| 17 | UART6_TX | PC6 |
+--------+-------------+----------------------+
| 19 | GPIO | PC8 |
+--------+-------------+----------------------+
| 21 | I2C1_SCL | PB6 |
+--------+-------------+----------------------+
| 23 | I2C1_SCA | PB7 |
+--------+-------------+----------------------+
| 25 | I2C2_SCA | PB3 |
+--------+-------------+----------------------+
| 27 | I2C2_SCL | PB10 |
+--------+-------------+----------------------+
| 29 | RST_BTN | RST_BTN |
+--------+-------------+----------------------+
+--------+-------------+----------------------+
| PIN # | Signal Name | STM32F401 Functions |
+========+=============+======================+
| 2 | SPI2_SS | PB12 |
+--------+-------------+----------------------+
| 4 | SPI2_MOSI | PB15 |
+--------+-------------+----------------------+
| 6 | SPI2_MISO | PB14 |
+--------+-------------+----------------------+
| 8 | SPI2_SCK | PB13 |
+--------+-------------+----------------------+
| 10 | GND | GND |
+--------+-------------+----------------------+
| 12 | VCC2 | VCC2 |
+--------+-------------+----------------------+
| 14 | AIN13 | PC3 |
+--------+-------------+----------------------+
| 16 | AIN15 | PC5 |
+--------+-------------+----------------------+
| 18 | UART6_RX | PC7 |
+--------+-------------+----------------------+
| 20 | GPIO | PC9 |
+--------+-------------+----------------------+
| 22 | I2C1_SCL | PB8 |
+--------+-------------+----------------------+
| 24 | I2C1_SDA | PB9 |
+--------+-------------+----------------------+
| 26 | AIN10 | PC0 |
+--------+-------------+----------------------+
| 28 | AIN11 | PC1 |
+--------+-------------+----------------------+
| 30 | NC | NC |
+--------+-------------+----------------------+
More detailed information about the connectors can be found in
`96Boards IE Specification`_.
External Clock Sources
----------------------
STM32F4 has two external oscillators. The frequency of the slow clock is
32.768 kHz. The frequency of the main clock is 16 MHz.
Serial Port
-----------
96Boards Carbon board has up to 4 U(S)ARTs. The Zephyr console output is
assigned to USART1. Default settings are 115200 8N1.
I2C
---
96Boards Carbon board has up to 2 I2Cs. The default I2C mapping for Zephyr is:
- I2C1_SCL : PB6
- I2C1_SDA : PB7
- I2C2_SCL : PB10
- I2C2_SDA : PB3
SPI
---
96Boards Carbon board has up to 2 SPIs. SPI1 is used for Bluetooth communication
over HCI. The default SPI mapping for Zephyr is:
- SPI1_NSS : PA4
- SPI1_SCK : PA5
- SPI1_MISO : PA6
- SPI1_MOSI : PA7
- SPI2_NSS : PB12
- SPI2_SCK : PB13
- SPI2_MISO : PB14
- SPI2_MOSI : PB15
USB
===
96Boards Carbon board has a USB OTG dual-role device (DRD) controller that
supports both device and host functions through its mini "OTG" USB connector.
Only USB device functions are supported in Zephyr at the moment.
- USB_DM : PA11
- USB_DP : PA12
Programming and Debugging
*************************
There are 2 main entry points for flashing STM32F4X SoCs, one using the ROM
bootloader, and another by using the SWD debug port (which requires additional
hardware). Flashing using the ROM bootloader requires a special activation
pattern, which can be triggered by using the BOOT0 pin. The ROM bootloader
supports flashing via USB (DFU), UART, I2C and SPI. You can read more about
how to enable and use the ROM bootloader by checking the application
note `AN2606`_, page 109.
Flashing
========
Installing dfu-util
-------------------
It is recommended to use at least v0.8 of `dfu-util`_. The package available in
debian/ubuntu can be quite old, so you might have to build dfu-util from source.
Flashing an Application to 96Boards Carbon
------------------------------------------
Connect the micro-USB cable to the USB OTG Carbon port and to your computer.
The board should power ON. Force the board into DFU mode by keeping the BOOT0
switch pressed while pressing and releasing the RST switch.
Confirm that the board is in DFU mode:
.. code-block:: console
$ sudo dfu-util -l
dfu-util 0.8
This program is Free Software and has ABSOLUTELY NO WARRANTY
Please report bugs to dfu-util@lists.gnumonks.org
Found DFU: [0483:df11] ver=2200, devnum=15, cfg=1, intf=0, alt=3, name="@Device Feature/0xFFFF0000/01*004 e", serial="3574364C3034"
Found DFU: [0483:df11] ver=2200, devnum=15, cfg=1, intf=0, alt=2, name="@OTP Memory /0x1FFF7800/01*512 e,01*016 e", serial="3574364C3034"
Found DFU: [0483:df11] ver=2200, devnum=15, cfg=1, intf=0, alt=1, name="@Option Bytes /0x1FFFC000/01*016 e", serial="3574364C3034"
Found DFU: [0483:df11] ver=2200, devnum=15, cfg=1, intf=0, alt=0, name="@Internal Flash /0x08000000/04*016Kg,01*064Kg,03*128Kg", serial="3574364C3034"
Found Runtime: [05ac:8290] ver=0104, devnum=2, cfg=1, intf=5, alt=0, name="UNKNOWN", serial="UNKNOWN"
You should see following confirmation on your Linux host:
.. code-block:: console
$ dmesg
usb 1-2.1: new full-speed USB device number 14 using xhci_hcd
usb 1-2.1: New USB device found, idVendor=0483, idProduct=df11
usb 1-2.1: New USB device strings: Mfr=1, Product=2, SerialNumber=3
usb 1-2.1: Product: STM32 BOOTLOADER
usb 1-2.1: Manufacturer: STMicroelectronics
usb 1-2.1: SerialNumber: 3574364C3034
Then build and flash an application. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: 96b_carbon/stm32f401xe
:goals: build flash
Connect the micro-USB cable to the USB UART (FTDI) port and to your computer.
Run your favorite terminal program to listen for output.
.. code-block:: console
$ minicom -D <tty_device> -b 115200
Replace :code:`<tty_device>` with the port where the board 96Boards Carbon
can be found. For example, under Linux, :code:`/dev/ttyUSB0`.
The ``-b`` option sets baud rate ignoring the value from config.
Press the Reset button and you should see the following message in your
terminal:
.. code-block:: console
Hello World! arm
.. _96b_carbon_verify_bluetooth:
Verifying Bluetooth Functionality
---------------------------------
This section contains instructions for verifying basic Bluetooth
functionality on the board. For help on Zephyr applications
in general, see :ref:`build_an_application`.
1. Flash the nRF51 with the hci_spi sample application as described in
:ref:`96b_carbon_nrf51_bluetooth`.
#. Install the dfu-util flashing app, as described above.
#. Build and flash the ``samples/bluetooth/peripheral_hr`` application for
96b_carbon. See the instructions above for how to put your board
into DFU mode if you haven't done this before:
.. zephyr-app-commands::
:zephyr-app: samples/bluetooth/peripheral_hr
:board: 96b_carbon/stm32f401xe
:goals: build flash
#. Refer to the instructions in :ref:`peripheral_hr` for how
to verify functionality.
Congratulations! Your 96Boards Carbon now has Bluetooth
connectivity. Refer to :ref:`bluetooth` for additional information on
further Bluetooth application development.
Debugging
=========
The ``96b_carbon/stm32f401xe`` board can be debugged by installing a 100 mil (0.1 inch) header
into the header at the bottom right hand side of the board, and
attaching an SWD debugger to the 3V3 (3.3V), GND, CLK, DIO, and RST
pins on that header. Then apply power to the 96Boards Carbon via one
of its USB connectors. You can now attach your debugger to the
STM32F401RET using an SWD scan.
.. _dfu-util:
path_to_url
.. _AN2606:
path_to_url
.. _96Boards website:
path_to_url
.. _STM32F401RE on www.st.com:
path_to_url
.. _STM32F401 reference manual:
path_to_url
.. _96Boards IE Specification:
path_to_url
``` | /content/code_sandbox/boards/96boards/carbon/doc/stm32f401xe.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 3,483 |
```restructuredtext
.. _boards-khadas:
Khadas
######
.. toctree::
:maxdepth: 1
:glob:
**/*
``` | /content/code_sandbox/boards/khadas/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 33 |
```cmake
``` | /content/code_sandbox/boards/khadas/edgev/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1 |
```unknown
/*
*
*/
/dts-v1/;
#include <rockchip/rk3399.dtsi>
/ {
model = "Khadas Edge-V";
compatible = "khadas,edgev";
chosen {
zephyr,sram = &sram0;
zephyr,console = &uart2;
zephyr,shell-uart = &uart2;
};
cpus {
/delete-node/ cpu@1;
/delete-node/ cpu@2;
/delete-node/ cpu@3;
/delete-node/ cpu@4;
/delete-node/ cpu@5;
};
};
&uart2 {
status = "okay";
};
``` | /content/code_sandbox/boards/khadas/edgev/khadas_edgev.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 144 |
```yaml
identifier: khadas_edgev
name: Khadas Edge-V (single core, non SMP)
type: mcu
arch: arm64
toolchain:
- zephyr
- cross-compile
ram: 8192
vendor: khadas
``` | /content/code_sandbox/boards/khadas/edgev/khadas_edgev.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 57 |
```unknown
# Platform Configuration
CONFIG_ARM64_VA_BITS_40=y
CONFIG_ARM64_PA_BITS_40=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=24000000
CONFIG_CACHE_MANAGEMENT=y
CONFIG_ARMV8_A_NS=y
# Serial Drivers
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
# Enable Console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
``` | /content/code_sandbox/boards/khadas/edgev/khadas_edgev_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 81 |
```unknown
#
#
config BOARD_KHADAS_EDGEV
select SOC_RK3399
``` | /content/code_sandbox/boards/khadas/edgev/Kconfig.khadas_edgev | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 19 |
```yaml
board:
name: khadas_edgev
vendor: khadas
socs:
- name: rk3399
``` | /content/code_sandbox/boards/khadas/edgev/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 29 |
```restructuredtext
.. _boards-electronut-labs:
Electronut Labs
###############
.. toctree::
:maxdepth: 1
:glob:
**/*
``` | /content/code_sandbox/boards/electronut/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 37 |
```cmake
board_runner_args(nrfjprog "--softreset")
include(${ZEPHYR_BASE}/boards/common/blackmagicprobe.board.cmake)
include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
``` | /content/code_sandbox/boards/electronut/nrf52840_papyr/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 48 |
```yaml
identifier: nrf52840_papyr
name: Electronut Labs Papyr
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- adc
- usb_device
- ble
- pwm
- watchdog
vendor: electronutlabs
``` | /content/code_sandbox/boards/electronut/nrf52840_papyr/nrf52840_papyr.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 79 |
```unknown
# Enable MPU
CONFIG_ARM_MPU=y
# enable GPIO
CONFIG_GPIO=y
# enable uart driver
CONFIG_SERIAL=y
# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
``` | /content/code_sandbox/boards/electronut/nrf52840_papyr/nrf52840_papyr_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 42 |
```cmake
# Suppress "unique_unit_address_if_enabled" to handle the following overlaps:
# - power@40000000 & clock@40000000 & bprot@40000000
# - acl@4001e000 & flash-controller@4001e000
list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled")
``` | /content/code_sandbox/boards/electronut/nrf52840_papyr/pre_dt_board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 72 |
```restructuredtext
.. _khadas_edgev:
Khadas Edge-V
#################################
Overview
********
See <path_to_url
Hardware
********
See <path_to_url#Edge-V-1>
Supported Features
==================
Khadas Edge-V board default configuration supports the following
hardware features:
+-----------+------------+--------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+======================================+
| GIC-500 | on-chip | GICv3 interrupt controller |
+-----------+------------+--------------------------------------+
| ARM TIMER | on-chip | System Clock |
+-----------+------------+--------------------------------------+
| UART | on-chip | Synopsys DesignWare 8250 serial port |
+-----------+------------+--------------------------------------+
Other hardware features have not been enabled yet for this board.
The default configuration can be found in (NON-SMP)
:zephyr_file:`boards/khadas/edgev/khadas_edgev_defconfig`
There are multiple serial ports on the board: Zephyr is using
uart2 as serial console.
Programming and Debugging
*************************
Use the following configuration to run basic Zephyr applications and
kernel tests on Khadas Edge-V board. For example, with the :ref:`hello_world`:
1. Non-SMP mode
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:host-os: unix
:board: khadas_edgev
:goals: build
This will build an image with the synchronization sample app.
Build the zephyr image:
.. code-block:: console
mkimage -C none -A arm64 -O linux -a 0x10000000 -e 0x10000000 -d build/zephyr/zephyr.bin build/zephyr/zephyr.img
Use u-boot to load and kick Zephyr.bin to CPU Core0:
.. code-block:: console
tftpboot ${pxefile_addr_r} zephyr.img; bootm start ${pxefile_addr_r}; bootm loados; bootm go
It will display the following console output:
.. code-block:: console
*** Booting Zephyr OS build XXXXXXXXXXXX ***
Hello World! khadas_edgev
Flashing
========
Zephyr image can be loaded in DDR memory at address 0x10000000 from SD Card,
EMMC, QSPI Flash or downloaded from network in uboot.
References
==========
`Documentation: <path_to_url`_
``` | /content/code_sandbox/boards/khadas/edgev/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 538 |
```yaml
board:
name: nrf52840_papyr
vendor: electronut
socs:
- name: nrf52840
``` | /content/code_sandbox/boards/electronut/nrf52840_papyr/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 33 |
```unknown
# Electronut Labs Papyr board configuration
config BOARD_NRF52840_PAPYR
select SOC_NRF52840_QIAA
``` | /content/code_sandbox/boards/electronut/nrf52840_papyr/Kconfig.nrf52840_papyr | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```unknown
# Electronut Labs Papyr board configuration
if BOARD_NRF52840_PAPYR
config BT_CTLR
default BT
endif # BOARD_NRF52840_PAPYR
``` | /content/code_sandbox/boards/electronut/nrf52840_papyr/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 42 |
```unknown
/*
*/
&pinctrl {
uart0_default: uart0_default {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 8)>,
<NRF_PSEL(UART_RX, 0, 7)>;
};
};
uart0_sleep: uart0_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 8)>,
<NRF_PSEL(UART_RX, 0, 7)>;
low-power-enable;
};
};
i2c0_default: i2c0_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 5)>,
<NRF_PSEL(TWIM_SCL, 0, 6)>;
};
};
i2c0_sleep: i2c0_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 5)>,
<NRF_PSEL(TWIM_SCL, 0, 6)>;
low-power-enable;
};
};
spi1_default: spi1_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 31)>,
<NRF_PSEL(SPIM_MOSI, 0, 29)>,
<NRF_PSEL(SPIM_MISO, 1, 1)>;
};
};
spi1_sleep: spi1_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 31)>,
<NRF_PSEL(SPIM_MOSI, 0, 29)>,
<NRF_PSEL(SPIM_MISO, 1, 1)>;
low-power-enable;
};
};
pwm0_default: pwm0_default {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 0, 13)>,
<NRF_PSEL(PWM_OUT1, 0, 14)>,
<NRF_PSEL(PWM_OUT2, 0, 15)>;
nordic,invert;
};
};
pwm0_sleep: pwm0_sleep {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 0, 13)>,
<NRF_PSEL(PWM_OUT1, 0, 14)>,
<NRF_PSEL(PWM_OUT2, 0, 15)>;
low-power-enable;
};
};
};
``` | /content/code_sandbox/boards/electronut/nrf52840_papyr/nrf52840_papyr-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 573 |
```unknown
/*
*
*/
/dts-v1/;
#include <nordic/nrf52840_qiaa.dtsi>
#include "nrf52840_papyr-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "Papyr";
compatible = "nordic,pca10056-dk";
chosen {
zephyr,code-partition = &slot0_partition;
zephyr,console = &uart0;
zephyr,uart-mcumgr = &uart0;
zephyr,shell-uart = &uart0;
zephyr,bt-mon-uart = &uart0;
zephyr,bt-c2h-uart = &uart0;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,ieee802154 = &ieee802154;
};
leds {
compatible = "gpio-leds";
led0: led_0 {
gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
label = "Green LED 0";
};
led1: led_1 {
gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
label = "Blue LED 1";
};
led2: led_2 {
gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
label = "Red LED 2";
};
};
pwmleds {
compatible = "pwm-leds";
pwm_led0: pwm_led_0 {
pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_INVERTED>;
label = "Green PWM LED 0";
};
pwm_led1: pwm_led_1 {
pwms = <&pwm0 2 PWM_MSEC(20) PWM_POLARITY_INVERTED>;
label = "Blue PWM LED 1";
};
pwm_led2: pwm_led_2 {
pwms = <&pwm0 1 PWM_MSEC(20) PWM_POLARITY_INVERTED>;
label = "Red PWM LED 2";
};
};
buttons {
compatible = "gpio-keys";
button0: button_0 {
gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
label = "Push button switch 0";
zephyr,code = <INPUT_KEY_0>;
};
};
/* These aliases are provided for compatibility with samples */
aliases {
led0 = &led0;
led1 = &led1;
led2 = &led2;
pwm-led0 = &pwm_led0;
pwm-led1 = &pwm_led1;
pwm-led2 = &pwm_led2;
green-pwm-led = &pwm_led0;
blue-pwm-led = &pwm_led1;
red-pwm-led = &pwm_led2;
sw0 = &button0;
watchdog0 = &wdt0;
};
};
®1 {
regulator-initial-mode = <NRF5X_REG_MODE_DCDC>;
};
&adc {
status = "okay";
};
&uicr {
gpio-as-nreset;
};
&gpiote {
status = "okay";
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&uart0 {
compatible = "nordic,nrf-uart";
current-speed = <115200>;
status = "okay";
pinctrl-0 = <&uart0_default>;
pinctrl-1 = <&uart0_sleep>;
pinctrl-names = "default", "sleep";
};
&i2c0 {
compatible = "nordic,nrf-twi";
status = "okay";
pinctrl-0 = <&i2c0_default>;
pinctrl-1 = <&i2c0_sleep>;
pinctrl-names = "default", "sleep";
};
&spi1 {
compatible = "nordic,nrf-spi";
status = "okay";
pinctrl-0 = <&spi1_default>;
pinctrl-1 = <&spi1_sleep>;
pinctrl-names = "default", "sleep";
};
&pwm0 {
status = "okay";
pinctrl-0 = <&pwm0_default>;
pinctrl-1 = <&pwm0_sleep>;
pinctrl-names = "default", "sleep";
};
&ieee802154 {
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 0x0000C000>;
};
slot0_partition: partition@c000 {
label = "image-0";
reg = <0x0000C000 0x00067000>;
};
slot1_partition: partition@73000 {
label = "image-1";
reg = <0x00073000 0x00067000>;
};
scratch_partition: partition@da000 {
label = "image-scratch";
reg = <0x000da000 0x0001e000>;
};
/*
* The flash starting at 0x000f8000 and ending at
* 0x000fffff is reserved for use by the application.
*/
/*
* Storage partition will be used by FCB/LittleFS/NVS
* if enabled.
*/
storage_partition: partition@f8000 {
label = "storage";
reg = <0x000f8000 0x00008000>;
};
};
};
zephyr_udc0: &usbd {
compatible = "nordic,nrf-usbd";
status = "okay";
};
``` | /content/code_sandbox/boards/electronut/nrf52840_papyr/nrf52840_papyr.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,317 |
```cmake
include(${ZEPHYR_BASE}/boards/common/blackmagicprobe.board.cmake)
``` | /content/code_sandbox/boards/electronut/nrf52840_blip/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 19 |
```yaml
identifier: nrf52840_blip
name: Electronut Labs Blip
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- adc
- i2c
- usb_device
- ble
vendor: electronutlabs
``` | /content/code_sandbox/boards/electronut/nrf52840_blip/nrf52840_blip.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 75 |
```unknown
/*
*/
&pinctrl {
uart0_default: uart0_default {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 6)>,
<NRF_PSEL(UART_RX, 0, 8)>,
<NRF_PSEL(UART_RTS, 0, 5)>,
<NRF_PSEL(UART_CTS, 0, 7)>;
};
};
uart0_sleep: uart0_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 6)>,
<NRF_PSEL(UART_RX, 0, 8)>,
<NRF_PSEL(UART_RTS, 0, 5)>,
<NRF_PSEL(UART_CTS, 0, 7)>;
low-power-enable;
};
};
i2c0_default: i2c0_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 12)>,
<NRF_PSEL(TWIM_SCL, 0, 11)>;
};
};
i2c0_sleep: i2c0_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 12)>,
<NRF_PSEL(TWIM_SCL, 0, 11)>;
low-power-enable;
};
};
i2c1_default: i2c1_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 2)>,
<NRF_PSEL(TWIM_SCL, 0, 3)>;
};
};
i2c1_sleep: i2c1_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 2)>,
<NRF_PSEL(TWIM_SCL, 0, 3)>;
low-power-enable;
};
};
spi0_default: spi0_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 19)>,
<NRF_PSEL(SPIM_MOSI, 0, 20)>,
<NRF_PSEL(SPIM_MISO, 0, 21)>;
};
};
spi0_sleep: spi0_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 19)>,
<NRF_PSEL(SPIM_MOSI, 0, 20)>,
<NRF_PSEL(SPIM_MISO, 0, 21)>;
low-power-enable;
};
};
spi1_default: spi1_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 25)>,
<NRF_PSEL(SPIM_MOSI, 1, 2)>,
<NRF_PSEL(SPIM_MISO, 0, 24)>;
};
};
spi1_sleep: spi1_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 25)>,
<NRF_PSEL(SPIM_MOSI, 1, 2)>,
<NRF_PSEL(SPIM_MISO, 0, 24)>;
low-power-enable;
};
};
spi2_default: spi2_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 26)>,
<NRF_PSEL(SPIM_MOSI, 0, 23)>,
<NRF_PSEL(SPIM_MISO, 0, 27)>;
};
};
spi2_sleep: spi2_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 26)>,
<NRF_PSEL(SPIM_MOSI, 0, 23)>,
<NRF_PSEL(SPIM_MISO, 0, 27)>;
low-power-enable;
};
};
spi3_default: spi3_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 29)>,
<NRF_PSEL(SPIM_MOSI, 0, 30)>,
<NRF_PSEL(SPIM_MISO, 0, 31)>;
};
};
spi3_sleep: spi3_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 29)>,
<NRF_PSEL(SPIM_MOSI, 0, 30)>,
<NRF_PSEL(SPIM_MISO, 0, 31)>;
low-power-enable;
};
};
};
``` | /content/code_sandbox/boards/electronut/nrf52840_blip/nrf52840_blip-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,084 |
```restructuredtext
.. _nrf52840_papyr:
Electronut Labs Papyr
#####################
Overview
********
Zephyr applications use the nrf52840_papyr board configuration
to run on Electronut Labs Papyr hardware. It provides
support for the Nordic Semiconductor nRF52840 ARM Cortex-M4F CPU and
the following devices:
* :abbr:`ADC (Analog to Digital Converter)`
* CLOCK
* FLASH
* :abbr:`GPIO (General Purpose Input Output)`
* :abbr:`I2C (Inter-Integrated Circuit)`
* :abbr:`MPU (Memory Protection Unit)`
* :abbr:`NVIC (Nested Vectored Interrupt Controller)`
* :abbr:`PWM (Pulse Width Modulation)`
* RADIO (Bluetooth Low Energy and 802.15.4)
* :abbr:`RTC (nRF RTC System Clock)`
* :abbr:`SPI (Serial Peripheral Interface)`
* :abbr:`UART (Universal asynchronous receiver-transmitter)`
* :abbr:`USB (Universal Serial Bus)`
* :abbr:`WDT (Watchdog Timer)`
* COUNTER
.. figure:: img/nrf52840_papyr.jpg
:align: center
:alt: Electronut Labs Papyr
Electronut Labs Papyr (Credit: Electronut Labs)
More information about the board is available at path_to_url
Hardware
********
Papyr has two external oscillators. The frequency of
the slow clock is 32.768 kHz. The frequency of the main clock
is 32 MHz.
Supported Features
==================
The nrf52840_papyr board configuration supports the following
hardware features currently:
+-----------+------------+----------------------+
| Interface | Controller | Driver/Component |
+===========+============+======================+
| ADC | on-chip | adc |
+-----------+------------+----------------------+
| CLOCK | on-chip | clock_control |
+-----------+------------+----------------------+
| FLASH | on-chip | flash |
+-----------+------------+----------------------+
| GPIO | on-chip | gpio |
+-----------+------------+----------------------+
| I2C(M) | on-chip | i2c |
+-----------+------------+----------------------+
| MPU | on-chip | arch/arm |
+-----------+------------+----------------------+
| NVIC | on-chip | arch/arm |
+-----------+------------+----------------------+
| PWM | on-chip | pwm |
+-----------+------------+----------------------+
| RADIO | on-chip | Bluetooth, |
| | | ieee802154 |
+-----------+------------+----------------------+
| RTC | on-chip | system clock |
+-----------+------------+----------------------+
| SPI(M/S) | on-chip | spi |
+-----------+------------+----------------------+
| UART | on-chip | serial |
+-----------+------------+----------------------+
| USB | on-chip | usb |
+-----------+------------+----------------------+
| WDT | on-chip | watchdog |
+-----------+------------+----------------------+
Connections and IOs
===================
LED
---
* LED1 (green) = P0.13
* LED2 (blue) = P0.15
* LED3 (red) = P0.14
Push buttons
------------
* Reset = SW0 = P0.18 (can be used as GPIO also)
UART
----
* TX = P0.8
* RX = P0.7
I2C
---
I2C pins connected to onboard sensors (I2C_0):
* SDA = P0.5
* SCL = P0.6
SPI
---
The e-paper display is connected to the chip via SPI on the following pins (SPI_1):
* SCK = P0.31
* MOSI = P0.29
* MISO = P1.1 (not used by the display)
NOTE: P1.1 is pin 33 in absolute enumeration.
Other pins used by the e-paper display are:
* E-ink enable = P0.11 (cuts off power to the display with MOSFET)
* CS = P0.30
* BUSY = P0.3
* D/C = P0.28
* RES = P0.2
Programming and Debugging
*************************
Applications for the ``nrf52840_papyr`` board configuration can be
built and flashed in the usual way (see :ref:`build_an_application`
and :ref:`application_run` for more details); Black Magic
Probe debugger presents itself as two USB-serial ports. On Linux,
they may come up as ``/dev/ttyACM0`` and ``/dev/ttyACM1``. The first
one of these (``/dev/ttyACM0`` here) is the debugger port.
GDB can directly connect to this port without requiring a GDB server by specifying
``target external /dev/ttyACM0``. The second port acts as a
serial port, connected to the SoC.
Flashing
========
By default, papyr is configured to be used with a blackmagicprobe compatible
debugger (see _Bumpy).
Applications are flashed and run as usual (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Here is an example for the :ref:`hello_world` application.
First, run your favorite terminal program to listen for output.
.. code-block:: console
$ minicom -D <tty_device> -b 115200
Replace :code:`<tty_device>` with the serial port of Black Magic Probe.
For example, under Linux, :code:`/dev/ttyACM1`.
Then build and flash the application in the usual way.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nrf52840_papyr
:goals: build flash
Debugging
=========
Debug and attach configurations are available using Black Magic Probe, and
``ninja debug``, or ``ninja attach`` (or with ``make``) are available.
NOTE: You may need to press the reset button once after using ``ninja flash``
to start executing the code. (not required with ``debug`` or ``attach``)
References
**********
.. target-notes::
.. _Electronut Labs website: path_to_url
.. _Store link: path_to_url
.. _Papyr website: path_to_url
.. _Schematic: path_to_url
.. _Datasheet: path_to_url
.. _Nordic Semiconductor Infocenter: path_to_url
.. _Black Magic Probe website: path_to_url
.. _Bumpy website: path_to_url
``` | /content/code_sandbox/boards/electronut/nrf52840_papyr/doc/nrf52840_papyr.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,462 |
```cmake
# Suppress "unique_unit_address_if_enabled" to handle the following overlaps:
# - power@40000000 & clock@40000000 & bprot@40000000
# - acl@4001e000 & flash-controller@4001e000
list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled")
``` | /content/code_sandbox/boards/electronut/nrf52840_blip/pre_dt_board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 72 |
```unknown
# Enable MPU
CONFIG_ARM_MPU=y
# enable GPIO
CONFIG_GPIO=y
# enable uart driver
CONFIG_SERIAL=y
# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
``` | /content/code_sandbox/boards/electronut/nrf52840_blip/nrf52840_blip_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 42 |
```yaml
board:
name: nrf52840_blip
vendor: electronut
socs:
- name: nrf52840
``` | /content/code_sandbox/boards/electronut/nrf52840_blip/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```unknown
# Electronut Labs Blip board configuration
if BOARD_NRF52840_BLIP
config BT_CTLR
default BT
endif # BOARD_NRF52840_BLIP
``` | /content/code_sandbox/boards/electronut/nrf52840_blip/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 37 |
```unknown
# Electronut Labs Blip board configuration
config BOARD_NRF52840_BLIP
select SOC_NRF52840_QIAA
``` | /content/code_sandbox/boards/electronut/nrf52840_blip/Kconfig.nrf52840_blip | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 29 |
```unknown
/*
*
* Based on nrf52840dk_nrf52840.dts
* modified 2018 Tavish Naruka <tavishnaruka@gmail.com>
*
*/
/dts-v1/;
#include <nordic/nrf52840_qiaa.dtsi>
#include "nrf52840_blip-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "Electronut Labs Blip";
compatible = "nordic,pca10056-dk";
chosen {
zephyr,code-partition = &slot0_partition;
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,uart-mcumgr = &uart0;
zephyr,bt-mon-uart = &uart0;
zephyr,bt-c2h-uart = &uart0;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,ieee802154 = &ieee802154;
};
leds {
compatible = "gpio-leds";
led0: led_0 {
gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
label = "Green LED 0";
};
led1: led_1 {
gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
label = "Red LED 1";
};
led2: led_2 {
gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
label = "Blue LED 2";
};
};
buttons {
compatible = "gpio-keys";
button0: button_0 {
gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
label = "Push button switch 0";
zephyr,code = <INPUT_KEY_0>;
};
};
/* These aliases are provided for compatibility with samples */
aliases {
led0 = &led0;
led1 = &led1;
led2 = &led2;
sw0 = &button0;
watchdog0 = &wdt0;
};
};
®1 {
regulator-initial-mode = <NRF5X_REG_MODE_DCDC>;
};
&adc {
status = "okay";
};
&uicr {
gpio-as-nreset;
};
&gpiote {
status = "okay";
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&uart0 {
compatible = "nordic,nrf-uart";
current-speed = <115200>;
status = "okay";
pinctrl-0 = <&uart0_default>;
pinctrl-1 = <&uart0_sleep>;
pinctrl-names = "default", "sleep";
};
&i2c0 {
compatible = "nordic,nrf-twi";
status = "okay";
pinctrl-0 = <&i2c0_default>;
pinctrl-1 = <&i2c0_sleep>;
pinctrl-names = "default", "sleep";
};
&i2c1 {
compatible = "nordic,nrf-twi";
/* Cannot be used together with spi1. */
/* status = "okay"; */
pinctrl-0 = <&i2c1_default>;
pinctrl-1 = <&i2c1_sleep>;
pinctrl-names = "default", "sleep";
};
&spi0 {
compatible = "nordic,nrf-spi";
/* Cannot be used together with i2c0. */
/* status = "okay"; */
pinctrl-0 = <&spi0_default>;
pinctrl-1 = <&spi0_sleep>;
pinctrl-names = "default", "sleep";
};
&spi1 {
compatible = "nordic,nrf-spi";
status = "okay";
pinctrl-0 = <&spi1_default>;
pinctrl-1 = <&spi1_sleep>;
pinctrl-names = "default", "sleep";
};
&spi2 {
compatible = "nordic,nrf-spi";
status = "okay";
pinctrl-0 = <&spi2_default>;
pinctrl-1 = <&spi2_sleep>;
pinctrl-names = "default", "sleep";
};
&spi3 {
status = "okay";
pinctrl-0 = <&spi3_default>;
pinctrl-1 = <&spi3_sleep>;
pinctrl-names = "default", "sleep";
};
&ieee802154 {
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 0x0000C000>;
};
slot0_partition: partition@c000 {
label = "image-0";
reg = <0x0000C000 0x00067000>;
};
slot1_partition: partition@73000 {
label = "image-1";
reg = <0x00073000 0x00067000>;
};
scratch_partition: partition@da000 {
label = "image-scratch";
reg = <0x000da000 0x0001e000>;
};
/*
* The flash starting at 0x000f8000 and ending at
* 0x000fffff is reserved for use by the application.
*/
/*
* Storage partition will be used by FCB/LittleFS/NVS
* if enabled.
*/
storage_partition: partition@f8000 {
label = "storage";
reg = <0x000f8000 0x00008000>;
};
};
};
zephyr_udc0: &usbd {
compatible = "nordic,nrf-usbd";
status = "okay";
};
``` | /content/code_sandbox/boards/electronut/nrf52840_blip/nrf52840_blip.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,320 |
```restructuredtext
.. _boards-xen:
Xen Hypervisor
##############
.. toctree::
:maxdepth: 1
:glob:
**/*
``` | /content/code_sandbox/boards/xen/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 34 |
```unknown
# Enable UART driver
CONFIG_SERIAL=y
CONFIG_MAX_XLAT_TABLES=24
# Enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# Enable logging subsys
CONFIG_LOG=y
CONFIG_LOG_MODE_MINIMAL=n
CONFIG_TIMER_READS_ITS_FREQUENCY_AT_RUNTIME=y
``` | /content/code_sandbox/boards/xen/xenvm/xenvm_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 60 |
```yaml
identifier: xenvm/xenvm/gicv3
name: ARMv8 Xen Virtual Machine With GICv3
type: mcu
arch: arm64
toolchain:
- zephyr
- cross-compile
ram: 16384
vendor: xen
``` | /content/code_sandbox/boards/xen/xenvm/xenvm_xenvm_gicv3.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 63 |
```yaml
identifier: xenvm
name: ARMv8 Xen Virtual Machine
type: mcu
arch: arm64
toolchain:
- zephyr
- cross-compile
ram: 16384
vendor: xen
``` | /content/code_sandbox/boards/xen/xenvm/xenvm.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 51 |
```unknown
/*
*/
#include "xenvm.dts"
&gic {
compatible = "arm,gic-v3", "arm,gic";
reg = <0x00 0x3001000 0x00 0x10000 0x00 0x3020000 0x00 0x1000000>;
};
``` | /content/code_sandbox/boards/xen/xenvm/xenvm_xenvm_gicv3.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 73 |
```yaml
board:
name: xenvm
vendor: xen
socs:
- name: xenvm
variants:
- name: gicv3
``` | /content/code_sandbox/boards/xen/xenvm/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 39 |
```unknown
config BOARD_XENVM
select SOC_XENVM
``` | /content/code_sandbox/boards/xen/xenvm/Kconfig.xenvm | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 14 |
```restructuredtext
.. _nrf52840_blip:
Electronut Labs Blip
####################
Overview
********
The Electronut Labs Blip hardware provides support for the Nordic Semiconductor
nRF52840 ARM Cortex-M4F CPU and the following devices:
* :abbr:`ADC (Analog to Digital Converter)`
* CLOCK
* FLASH
* :abbr:`GPIO (General Purpose Input Output)`
* :abbr:`I2C (Inter-Integrated Circuit)`
* :abbr:`MPU (Memory Protection Unit)`
* :abbr:`NVIC (Nested Vectored Interrupt Controller)`
* :abbr:`PWM (Pulse Width Modulation)`
* RADIO (Bluetooth Low Energy and 802.15.4)
* :abbr:`RTC (nRF RTC System Clock)`
* Segger RTT (RTT Console)
* :abbr:`SPI (Serial Peripheral Interface)`
* :abbr:`UART (Universal asynchronous receiver-transmitter)`
* :abbr:`USB (Universal Serial Bus)`
* :abbr:`WDT (Watchdog Timer)`
.. figure:: img/nrf52840_blip.jpg
:align: center
:alt: Electronut Labs Blip
Electronut Labs Blip (Credit: Electronut Labs)
More information about the board is available at path_to_url
Hardware
********
Blip has two external oscillators. The frequency of
the slow clock is 32.768 kHz. The frequency of the main clock
is 32 MHz.
Supported Features
==================
The nrf52840_blip board configuration supports the following
hardware features currently:
+-----------+------------+----------------------+
| Interface | Controller | Driver/Component |
+===========+============+======================+
| ADC | on-chip | adc |
+-----------+------------+----------------------+
| CLOCK | on-chip | clock_control |
+-----------+------------+----------------------+
| FLASH | on-chip | flash |
+-----------+------------+----------------------+
| GPIO | on-chip | gpio |
+-----------+------------+----------------------+
| I2C(M) | on-chip | i2c |
+-----------+------------+----------------------+
| MPU | on-chip | arch/arm |
+-----------+------------+----------------------+
| NVIC | on-chip | arch/arm |
+-----------+------------+----------------------+
| PWM | on-chip | pwm |
+-----------+------------+----------------------+
| RADIO | on-chip | Bluetooth, |
| | | ieee802154 |
+-----------+------------+----------------------+
| RTC | on-chip | system clock |
+-----------+------------+----------------------+
| RTT | Segger | console |
+-----------+------------+----------------------+
| SPI(M/S) | on-chip | spi |
+-----------+------------+----------------------+
| UART | on-chip | serial |
+-----------+------------+----------------------+
| USB | on-chip | usb |
+-----------+------------+----------------------+
| WDT | on-chip | watchdog |
+-----------+------------+----------------------+
Connections and IOs
===================
LED
---
* LED1 (green) = P0.13
* LED2 (red) = P0.14
* LED3 (blue) = P0.15
Push buttons
------------
* BUTTON1 = SW1 = P1.07
* Reset = SW5 = P0.18 (can be used as GPIO also)
UART
----
BMP does not support hardware flow control, so only RX/TX pins are connected.
* TX = P0.6
* RX = P0.8
I2C
---
I2C pins connected to onboard sensors:
* SDA = P0.12
* SCL = P0.11
SPI
---
* SCK = P0.25
* MOSI = P1.02
* MISO = P0.24
MicroSD is connected to these pins, and CS pin is connected to P0.17.
Programming and Debugging
*************************
Applications for the ``nrf52840_blip`` board configuration can be
built and flashed in the usual way (see :ref:`build_an_application`
and :ref:`application_run` for more details); The onboard Black Magic
Probe debugger presents itself as two USB-serial ports. On Linux,
they may come up as ``/dev/ttyACM0`` and ``/dev/ttyACM1``. The first
one of these (``/dev/ttyACM0`` here) is the debugger port.
GDB can directly connect to this port without requiring a GDB server by specifying
``target external /dev/ttyACM0``. The second port acts as a
serial port, connected to the SoC.
Flashing
========
Applications are flashed and run as usual (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Here is an example for the :ref:`hello_world` application.
First, run your favorite terminal program to listen for output.
.. code-block:: console
$ minicom -D <tty_device> -b 115200
Replace :code:`<tty_device>` with the serial port of Black Magic Probe.
For example, under Linux, :code:`/dev/ttyACM1`.
Then build and flash the application in the usual way.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nrf52840_blip
:goals: build flash
Debugging
=========
Debug and attach configurations are available using Black Magic Probe, and
``ninja debug``, or ``ninja attach`` (or with ``make``) are available.
NOTE: You may need to press the reset button once after using ``ninja flash``
to start executing the code. (not required with ``debug`` or ``attach``)
Testing the LEDs and buttons in the nRF52840 PDK
************************************************
There are 2 samples that allow you to test that the buttons (switches) and LEDs on
the board are working properly with Zephyr:
* :zephyr:code-sample:`blinky`
* :zephyr:code-sample:`button`
You can build and flash the examples to make sure Zephyr is running correctly on
your board. The button and LED definitions can be found in
:zephyr_file:`boards/electronut/nrf52840_blip/nrf52840_blip.dts`.
References
**********
.. target-notes::
.. _Electronut Labs website: path_to_url
.. _Store link: path_to_url
.. _Blip website: path_to_url
.. _Schematic: path_to_url
.. _Nordic Semiconductor Infocenter: path_to_url
.. _Black Magic Probe website: path_to_url
``` | /content/code_sandbox/boards/electronut/nrf52840_blip/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,474 |
```unknown
if BOARD_XENVM
config BUILD_OUTPUT_BIN
default y
config HEAP_MEM_POOL_SIZE
default 16384 if BOARD_XENVM_XENVM
endif # BOARD_XENVM
``` | /content/code_sandbox/boards/xen/xenvm/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 42 |
```unknown
/*
*
*
* This file was created by running
*
* # LIBXL_DEBUG_DUMP_DTB=domu-libxl.dtb xl create zephyr.conf
*
* decompiling resulting domu-libxl.dtb and then manually aligning it
* with zephyr requirements.
*/
/dts-v1/;
#include <mem.h>
#include <arm64/armv8-a.dtsi>
#include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
/ {
model = "XENVM";
compatible = "xen,xenvm";
interrupt-parent = <&gic>;
#address-cells = <0x02>;
#size-cells = <0x02>;
chosen {
zephyr,sram = &ram;
zephyr,console = &xen_hvc;
};
cpus {
#address-cells = <0x01>;
#size-cells = <0x00>;
cpu@0 {
device_type = "cpu";
compatible = "arm,armv8";
enable-method = "psci";
reg = <0x00>;
};
};
psci {
compatible = "arm,psci-1.0", "arm,psci-0.2", "arm,psci";
method = "hvc";
};
ram: memory@40000000 {
device_type = "mmio-sram";
reg = <0x00 0x40000000 0x00 DT_SIZE_M(16)>;
};
gic: interrupt-controller@3001000 {
compatible = "arm,gic-v2", "arm,gic";
#interrupt-cells = <0x04>;
#address-cells = <0x00>;
interrupt-controller;
reg = <0x00 0x3001000 0x00 0x1000 0x00 0x3002000 0x00 0x2000>;
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 0x0d IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY
GIC_PPI 0x0e IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY
GIC_PPI 0x0b IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
interrupt-parent = <&gic>;
};
hypervisor: hypervisor@38000000 {
compatible = "xen,xen";
reg = <0x00 0x38000000 0x00 0x1000000>;
interrupts = <GIC_PPI 0x0f IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>;
interrupt-parent = <&gic>;
};
xen_hvc: hvc {
compatible = "xen,hvc-uart";
status = "okay";
};
};
``` | /content/code_sandbox/boards/xen/xenvm/xenvm.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 628 |
```restructuredtext
.. _boards-panasonic:
Panasonic Corporation
#####################
.. toctree::
:maxdepth: 1
:glob:
**/*
``` | /content/code_sandbox/boards/panasonic/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 35 |
```cmake
# PAN1780 EVB configuration
board_runner_args(jlink "--device=nrf52" "--speed=4000")
board_runner_args(pyocd "--target=nrf52840" "--frequency=4000000")
include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
``` | /content/code_sandbox/boards/panasonic/pan1780_evb/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 97 |
```yaml
# PAN1780 EVB configuration
identifier: pan1780_evb
name: pan1780-evb
type: mcu
arch: arm
ram: 256
flash: 1024
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- adc
- arduino_gpio
- arduino_i2c
- arduino_spi
- ble
- counter
- gpio
- i2c
- i2s
- pwm
- spi
- usb_device
- watchdog
- netif:openthread
``` | /content/code_sandbox/boards/panasonic/pan1780_evb/pan1780_evb.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 142 |
```restructuredtext
.. xenvm:
ARMv8 Xen Virtual Machine Example
#################################
Overview
********
This board allows to run Zephyr as Xen guest on any ARMv8 board that supports
ARM Virtualization Extensions. This is example configuration, as almost any VM
configuration is unique in many aspects.
It provides minimal set of devices:
* ARM Generic timer
* GICv2/GICv3
Hardware
********
Supported Features
==================
The following hardware features are supported:
+--------------+-------------+----------------------+
| Interface | Controller | Driver/Component |
+==============+=============+======================+
| GIC | virtualized | interrupt controller |
+--------------+-------------+----------------------+
| ARM TIMER | virtualized | system clock |
+--------------+-------------+----------------------+
The kernel currently does not support other hardware features on this platform.
The default configuration for this board can be found in these files:
- :zephyr_file:`boards/xen/xenvm/Kconfig.defconfig`
- :zephyr_file:`boards/xen/xenvm/xenvm_defconfig`
Devices
========
System Clock
------------
This board configuration uses a system clock frequency of 8.32 MHz. This is the
default value, which should be corrected for user's actual hardware.
You can determine clock frequency of your ARM Generic Timer by inspecting Xen
boot log:
::
(XEN) [ 0.147541] Generic Timer IRQ: phys=30 hyp=26 virt=27 Freq: 8320 KHz
Interrupt Controller
--------------------
Depending on the version of the GIC on your hardware, you may choose one of the
following board configuration variants:
- ``xenvm`` selects GICv2
- ``xenvm//gicv3`` selects GICv3
CPU Core type
-------------
Default core in this configuration is Cortex A72. Depending on yours actual
hardware you might want to change this option in the same way as Interrupt
Controller configuration.
Known Problems or Limitations
==============================
Xen configures guests in runtime by providing device tree that describes guest
environment. On other hand, Zephyr uses static configuration that should be know
at build time. So there are chances, that Zephyr image created with default
configuration would not boot on your hardware. In this case you need to update
configuration by altering device tree and Kconfig options. This will be covered
in detail in next section.
Most of Xen-specific features are not supported at the moment. This includes:
* XenBus (under development)
* Xen PV drivers
Now only following features are supported:
* Xen Enlighten memory page
* Xen event channels
* Xen PV console (2 versions: regular ring buffer based for DomU and consoleio for Dom0)
* Xen early console_io interface (mainly for debug purposes - requires debug version of Xen)
* Xen grant tables (granting access for own grants and map/unmap foreign grants)
Building and Running
********************
Use this configuration to run basic Zephyr applications and kernel tests as Xen
guest, for example, with the :zephyr:code-sample:`synchronization` sample:
- if your hardware is based on GICv2:
.. code-block::
$ west build -b xenvm samples/synchronization
- if your hardware is based on GICv3:
.. code-block::
$ west build -b xenvm//gicv3 samples/synchronization
This will build an image with the synchronization sample app. Next, you need to
create guest configuration file :code:`zephyr.conf`. There is example:
.. code-block::
kernel="zephyr.bin"
name="zephyr"
vcpus=1
memory=16
gic_version="v2"
on_crash="preserve"
When using ``xenvm//gicv3`` configuration, you need to remove the ``gic_version``
parameter or set it to ``"v3"``.
You need to upload both :code:`zephyr.bin` and :code:`zephyr.conf` to your Dom0
and then you can run Zephyr by issuing
.. code-block::
$ xl create zephyr.conf
Next you need to attach to PV console:
.. code-block::
$ xl console zephyr
Also this can be performed via single command:
.. code-block::
$ xl create -c zephyr.conf
You will see Zephyr output:
.. code-block:: console
*** Booting Zephyr OS build zephyr-v2.4.0-1137-g5803ee1e8183 ***
thread_a: Hello World from cpu 0 on xenvm!
thread_b: Hello World from cpu 0 on xenvm!
thread_a: Hello World from cpu 0 on xenvm!
thread_b: Hello World from cpu 0 on xenvm!
thread_a: Hello World from cpu 0 on xenvm!
Exit xen virtual console by pressing :kbd:`CTRL+]`
Updating configuration
**********************
As was said earlier, Xen describes hardware using device tree and expects that
guest will parse device tree in runtime. On other hand, Zephyr supports only
static, build time configuration. While provided configuration should work on
almost any ARMv8 host running in aarch64 mode, there is no guarantee, that Xen
will not change some values (like RAM base address) in the future.
Also, frequency of system timer is board specific and should be updated when running
Zephyr xenvm image on new hardware.
One can make Xen to dump generated DTB by using :code:`LIBXL_DEBUG_DUMP_DTB`
environment variable, like so:
.. code-block::
$ LIBXL_DEBUG_DUMP_DTB=domu-libxl.dtb xl create zephyr.conf
Then, generated "domu-libxl.dtb" file can be de-compiled using "dtc" tool.
Use information from de-compiled DTB file to update all related entries in
provided "xenvm.dts" file. If memory layout is also changed, you may need to
update :code:`CONFIG_SRAM_BASE_ADDRESS` as well.
References
**********
`Xen ARM with Virtualization Extensions <path_to_url`_
`xl.conf (guest configuration file) manual <path_to_url`_
``` | /content/code_sandbox/boards/xen/xenvm/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,346 |
```cmake
# Suppress "unique_unit_address_if_enabled" to handle the following overlaps:
# - power@40000000 & clock@40000000 & bprot@40000000
# - acl@4001e000 & flash-controller@4001e000
list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled")
``` | /content/code_sandbox/boards/panasonic/pan1780_evb/pre_dt_board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 72 |
```unknown
/*
* PAN1780 EVB configuration
*
*/
&pinctrl {
uart0_default: uart0_default {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 6)>,
<NRF_PSEL(UART_RTS, 0, 5)>;
};
group2 {
psels = <NRF_PSEL(UART_RX, 0, 8)>,
<NRF_PSEL(UART_CTS, 0, 7)>;
bias-pull-up;
};
};
uart0_sleep: uart0_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 6)>,
<NRF_PSEL(UART_RX, 0, 8)>,
<NRF_PSEL(UART_RTS, 0, 5)>,
<NRF_PSEL(UART_CTS, 0, 7)>;
low-power-enable;
};
};
uart1_default: uart1_default {
group1 {
psels = <NRF_PSEL(UART_RX, 1, 2)>;
bias-pull-up;
};
group2 {
psels = <NRF_PSEL(UART_TX, 1, 1)>;
};
};
uart1_sleep: uart1_sleep {
group1 {
psels = <NRF_PSEL(UART_RX, 1, 2)>,
<NRF_PSEL(UART_TX, 1, 1)>;
low-power-enable;
};
};
i2c0_default: i2c0_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
<NRF_PSEL(TWIM_SCL, 0, 27)>;
};
};
i2c0_sleep: i2c0_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
<NRF_PSEL(TWIM_SCL, 0, 27)>;
low-power-enable;
};
};
i2c1_default: i2c1_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 30)>,
<NRF_PSEL(TWIM_SCL, 0, 31)>;
};
};
i2c1_sleep: i2c1_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 30)>,
<NRF_PSEL(TWIM_SCL, 0, 31)>;
low-power-enable;
};
};
pwm0_default: pwm0_default {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 0, 13)>;
nordic,invert;
};
};
pwm0_sleep: pwm0_sleep {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 0, 13)>;
low-power-enable;
};
};
spi0_default: spi0_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 27)>,
<NRF_PSEL(SPIM_MOSI, 0, 26)>,
<NRF_PSEL(SPIM_MISO, 0, 29)>;
};
};
spi0_sleep: spi0_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 27)>,
<NRF_PSEL(SPIM_MOSI, 0, 26)>,
<NRF_PSEL(SPIM_MISO, 0, 29)>;
low-power-enable;
};
};
spi1_default: spi1_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 31)>,
<NRF_PSEL(SPIM_MOSI, 0, 30)>,
<NRF_PSEL(SPIM_MISO, 1, 8)>;
};
};
spi1_sleep: spi1_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 31)>,
<NRF_PSEL(SPIM_MOSI, 0, 30)>,
<NRF_PSEL(SPIM_MISO, 1, 8)>;
low-power-enable;
};
};
spi2_default: spi2_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 19)>,
<NRF_PSEL(SPIM_MOSI, 0, 20)>,
<NRF_PSEL(SPIM_MISO, 0, 21)>;
};
};
spi2_sleep: spi2_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 19)>,
<NRF_PSEL(SPIM_MOSI, 0, 20)>,
<NRF_PSEL(SPIM_MISO, 0, 21)>;
low-power-enable;
};
};
qspi_default: qspi_default {
group1 {
psels = <NRF_PSEL(QSPI_SCK, 0, 19)>,
<NRF_PSEL(QSPI_IO0, 0, 20)>,
<NRF_PSEL(QSPI_IO1, 0, 21)>,
<NRF_PSEL(QSPI_IO2, 0, 22)>,
<NRF_PSEL(QSPI_IO3, 0, 23)>,
<NRF_PSEL(QSPI_CSN, 0, 17)>;
};
};
qspi_sleep: qspi_sleep {
group1 {
psels = <NRF_PSEL(QSPI_SCK, 0, 19)>,
<NRF_PSEL(QSPI_IO0, 0, 20)>,
<NRF_PSEL(QSPI_IO1, 0, 21)>,
<NRF_PSEL(QSPI_IO2, 0, 22)>,
<NRF_PSEL(QSPI_IO3, 0, 23)>,
<NRF_PSEL(QSPI_CSN, 0, 17)>;
low-power-enable;
};
};
spi3_default: spi3_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 15)>,
<NRF_PSEL(SPIM_MISO, 0, 14)>,
<NRF_PSEL(SPIM_MOSI, 0, 13)>;
};
};
spi3_sleep: spi3_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 15)>,
<NRF_PSEL(SPIM_MISO, 0, 14)>,
<NRF_PSEL(SPIM_MOSI, 0, 13)>;
low-power-enable;
};
};
};
``` | /content/code_sandbox/boards/panasonic/pan1780_evb/pan1780_evb-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,596 |
```unknown
# PAN1780 EVB configuration
config BOARD_PAN1780_EVB
select SOC_NRF52840_QIAA
``` | /content/code_sandbox/boards/panasonic/pan1780_evb/Kconfig.pan1780_evb | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 28 |
```yaml
board:
name: pan1780_evb
vendor: panasonic
socs:
- name: nrf52840
``` | /content/code_sandbox/boards/panasonic/pan1780_evb/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 31 |
```unknown
/*
* PAN1780 EVB configuration
*
*/
/dts-v1/;
#include <nordic/nrf52840_qiaa.dtsi>
#include "pan1780_evb-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "pan1780-evb";
compatible = "panasonic-industrial-devices-europe-gmbh,pan1780-evb";
chosen {
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,uart-mcumgr = &uart0;
zephyr,bt-mon-uart = &uart0;
zephyr,bt-c2h-uart = &uart0;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,ieee802154 = &ieee802154;
};
leds {
compatible = "gpio-leds";
evb_led1: evb_led_1 {
gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
label = "LED1 on EVB";
};
evb_led2: evb_led_2 {
gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
label = "LED2 on EVB";
};
evb_led3: evb_led_3 {
gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
label = "LED3 on EVB";
};
evb_led4: evb_led_4 {
gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
label = "LED4 on EVB";
};
};
pwmleds {
compatible = "pwm-leds";
pwm_evb_led1: pwm_evb_led_1 {
pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_INVERTED>;
};
};
buttons {
compatible = "gpio-keys";
evb_sw1: evb_sw_1 {
gpios = <&gpio0 11 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "SW1 on EVB";
zephyr,code = <INPUT_KEY_0>;
};
evb_sw2: evb_sw_2 {
gpios = <&gpio0 12 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "SW2 on EVB";
zephyr,code = <INPUT_KEY_1>;
};
evb_sw3: evb_sw_3 {
gpios = <&gpio0 24 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "SW3 on EVB";
zephyr,code = <INPUT_KEY_2>;
};
evb_sw4: evb_sw_4 {
gpios = <&gpio0 25 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "SW4 on EVB";
zephyr,code = <INPUT_KEY_3>;
};
};
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpio0 3 0>, /* A0 */
<1 0 &gpio0 4 0>, /* A1 */
<2 0 &gpio0 28 0>, /* A2 */
<3 0 &gpio0 29 0>, /* A3 */
<4 0 &gpio0 30 0>, /* A4 */
<5 0 &gpio0 31 0>, /* A5 */
<6 0 &gpio1 1 0>, /* D0 */
<7 0 &gpio1 2 0>, /* D1 */
<8 0 &gpio1 3 0>, /* D2 */
<9 0 &gpio1 4 0>, /* D3 */
<10 0 &gpio1 5 0>, /* D4 */
<11 0 &gpio1 6 0>, /* D5 */
<12 0 &gpio1 7 0>, /* D6 */
<13 0 &gpio1 8 0>, /* D7 */
<14 0 &gpio1 10 0>, /* D8 */
<15 0 &gpio1 11 0>, /* D9 */
<16 0 &gpio0 12 0>, /* D10 */
<17 0 &gpio0 13 0>, /* D11 */
<18 0 &gpio0 14 0>, /* D12 */
<19 0 &gpio0 15 0>, /* D13 */
<20 0 &gpio0 26 0>, /* D14 */
<21 0 &gpio0 27 0>; /* D15 */
};
arduino_adc: analog-connector {
compatible = "arduino,uno-adc";
#io-channel-cells = <1>;
io-channel-map = <0 &adc 1>, /* A0 = P0.3 = AIN1 */
<1 &adc 2>, /* A1 = P0.4 = AIN2 */
<2 &adc 4>, /* A2 = P0.28 = AIN4 */
<3 &adc 5>, /* A3 = P0.29 = AIN5 */
<4 &adc 6>, /* A4 = P0.30 = AIN6 */
<5 &adc 7>; /* A5 = P0.31 = AIN7 */
};
/* These aliases are provided for compatibility with samples */
aliases {
led0 = &evb_led1;
led1 = &evb_led2;
led2 = &evb_led3;
led3 = &evb_led4;
pwm-led0 = &pwm_evb_led1;
sw0 = &evb_sw1;
sw1 = &evb_sw2;
sw2 = &evb_sw3;
sw3 = &evb_sw4;
bootloader-led0 = &evb_led1;
watchdog0 = &wdt0;
};
};
®0 {
status = "okay";
};
®1 {
regulator-initial-mode = <NRF5X_REG_MODE_DCDC>;
};
&adc {
status = "okay";
};
&uicr {
gpio-as-nreset;
};
&gpiote {
status = "okay";
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&uart0 {
compatible = "nordic,nrf-uarte";
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart0_default>;
pinctrl-1 = <&uart0_sleep>;
pinctrl-names = "default", "sleep";
};
arduino_serial: &uart1 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart1_default>;
pinctrl-1 = <&uart1_sleep>;
pinctrl-names = "default", "sleep";
};
arduino_i2c: &i2c0 {
compatible = "nordic,nrf-twi";
status = "okay";
pinctrl-0 = <&i2c0_default>;
pinctrl-1 = <&i2c0_sleep>;
pinctrl-names = "default", "sleep";
};
&i2c1 {
compatible = "nordic,nrf-twi";
/* Cannot be used together with spi1, so disabled by default. */
pinctrl-0 = <&i2c1_default>;
pinctrl-1 = <&i2c1_sleep>;
pinctrl-names = "default", "sleep";
};
&pwm0 {
status = "okay";
pinctrl-0 = <&pwm0_default>;
pinctrl-1 = <&pwm0_sleep>;
pinctrl-names = "default", "sleep";
};
&spi0 {
compatible = "nordic,nrf-spi";
/* Cannot be used together with i2c0, so disabled by default. */
pinctrl-0 = <&spi0_default>;
pinctrl-1 = <&spi0_sleep>;
pinctrl-names = "default", "sleep";
};
&spi1 {
compatible = "nordic,nrf-spi";
status = "okay";
pinctrl-0 = <&spi1_default>;
pinctrl-1 = <&spi1_sleep>;
pinctrl-names = "default", "sleep";
};
&spi2 {
compatible = "nordic,nrf-spi";
/* Disabled by default in nrf52840.dtsi. */
pinctrl-0 = <&spi2_default>;
pinctrl-1 = <&spi2_sleep>;
pinctrl-names = "default", "sleep";
};
&qspi {
/* Disabled by default in nrf52840.dtsi. */
pinctrl-0 = <&qspi_default>;
pinctrl-1 = <&qspi_sleep>;
pinctrl-names = "default", "sleep";
};
arduino_spi: &spi3 {
status = "disabled";
/* Cannot be used together with evb_led1, evb_led2, evb_led3, evb_sw2
* and pwm0 so disabled by default.
*/
cs-gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; /* D10 */
pinctrl-0 = <&spi3_default>;
pinctrl-1 = <&spi3_sleep>;
pinctrl-names = "default", "sleep";
};
&ieee802154 {
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x000000000 0x0000C000>;
};
slot0_partition: partition@c000 {
label = "image-0";
reg = <0x0000C000 0x00067000>;
};
slot1_partition: partition@73000 {
label = "image-1";
reg = <0x00073000 0x00067000>;
};
scratch_partition: partition@da000 {
label = "image-scratch";
reg = <0x000da000 0x0001e000>;
};
storage_partition: partition@f8000 {
label = "storage";
reg = <0x000f8000 0x00008000>;
};
};
};
zephyr_udc0: &usbd {
compatible = "nordic,nrf-usbd";
status = "okay";
};
``` | /content/code_sandbox/boards/panasonic/pan1780_evb/pan1780_evb.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,466 |
```unknown
# PAN1780 EVB configuration
# Enable MPU
CONFIG_ARM_MPU=y
# Enable hardware stack protection
CONFIG_HW_STACK_PROTECTION=y
# Enable RTT
CONFIG_USE_SEGGER_RTT=y
# enable GPIO
CONFIG_GPIO=y
# enable uart driver
CONFIG_SERIAL=y
# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
``` | /content/code_sandbox/boards/panasonic/pan1780_evb/pan1780_evb_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 75 |
```unknown
# PAN1780 EVB configuration
if BOARD_PAN1780_EVB
config BT_CTLR
default BT
endif # BOARD_PAN1780_EVB
``` | /content/code_sandbox/boards/panasonic/pan1780_evb/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 36 |
```cmake
# PAN1782 EVB configuration
board_runner_args(jlink "--device=nrf52" "--speed=4000")
board_runner_args(pyocd "--target=nrf52833" "--frequency=4000000")
include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
``` | /content/code_sandbox/boards/panasonic/pan1782_evb/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 97 |
```unknown
# PAN1782 EVB configuration
# Enable MPU
CONFIG_ARM_MPU=y
# Enable hardware stack protection
CONFIG_HW_STACK_PROTECTION=y
# Enable RTT
CONFIG_USE_SEGGER_RTT=y
# enable GPIO
CONFIG_GPIO=y
# enable uart driver
CONFIG_SERIAL=y
# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# using rc for slow clock
CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC=y
``` | /content/code_sandbox/boards/panasonic/pan1782_evb/pan1782_evb_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 93 |
```restructuredtext
.. _pan1780_evb:
PAN1780 Evaluation Board
########################
Overview
********
The PAN1780 Evaluation Board is a development tool for the PAN1780 module which
is based on the nRF52840 chipset from Nordic Semiconductor.
It is basically a clone of the official nRF52840 development kit (PCA10056)
from Nordic Semiconductor. Please refer to :ref:`nrf52840dk_nrf52840` for
further information.
.. figure:: pan1780_evaluation_board.jpg
:align: center
:alt: PAN1780 Evaluation Board
You can find more information about the PAN1780 module and the PAN1780
evaluation board on the `product website`_.
The PAN1780 evaluation board is closely linked to these other evaluation
boards:
* :ref:`pan1781_evb`
* :ref:`pan1782_evb`
Usage
*****
You can find the `user guide`_ for the PAN1780 Evaluation Board in the
`Panasonic Wireless Connectivity Development Hub`_.
The user guide contains (amongst other things) detailed information about
* pin mapping
* powering options
* breakout pin header interface
* current consumption measurement
* software development
and other things.
The schematics for the PAN1780 Evaluation Board are available in the
`download section`_ of the `Panasonic Wireless Connectivity Development Hub`_.
Programming and Debugging
*************************
Please use the ``pan1780_evb`` board configuration when
:ref:`build_an_application` and :ref:`application_run`.
.. target-notes::
.. _product website: path_to_url
.. _Panasonic Wireless Connectivity Development Hub: path_to_url
.. _user guide: path_to_url
.. _download section: path_to_url
``` | /content/code_sandbox/boards/panasonic/pan1780_evb/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 371 |
```yaml
board:
name: pan1782_evb
vendor: panasonic
socs:
- name: nrf52833
``` | /content/code_sandbox/boards/panasonic/pan1782_evb/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 31 |
```unknown
# PAN1782 EVB configuration
config BOARD_PAN1782_EVB
select SOC_NRF52833_QIAA
``` | /content/code_sandbox/boards/panasonic/pan1782_evb/Kconfig.pan1782_evb | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 28 |
```yaml
# PAN1782 EVB configuration
identifier: pan1782_evb
name: pan1782-evb
type: mcu
arch: arm
ram: 128
flash: 512
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- adc
- arduino_gpio
- arduino_i2c
- arduino_spi
- usb_device
- ble
- gpio
- i2c
- spi
- pwm
- watchdog
- counter
``` | /content/code_sandbox/boards/panasonic/pan1782_evb/pan1782_evb.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 126 |
```unknown
# PAN1782 EVB configuration
if BOARD_PAN1782_EVB
config BT_CTLR
default BT
endif # BOARD_PAN1782_EVB
``` | /content/code_sandbox/boards/panasonic/pan1782_evb/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 36 |
```unknown
/*
* PAN1782 EVB configuration
*
*/
/dts-v1/;
#include <nordic/nrf52833_qiaa.dtsi>
#include "pan1782_evb-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "pan1782-evb";
compatible = "panasonic-industrial-devices-europe-gmbh,pan1782-evb";
chosen {
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,uart-mcumgr = &uart0;
zephyr,bt-mon-uart = &uart0;
zephyr,bt-c2h-uart = &uart0;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,ieee802154 = &ieee802154;
};
leds {
compatible = "gpio-leds";
evb_led1: evb_led_1 {
gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
label = "LED1 on EVB";
};
evb_led2: evb_led_2 {
gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
label = "LED2 on EVB";
};
};
pwmleds {
compatible = "pwm-leds";
pwm_evb_led1: pwm_evb_led_1 {
pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_INVERTED>;
};
};
buttons {
compatible = "gpio-keys";
evb_sw1: evb_sw1 {
gpios = <&gpio0 4 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "SW1 on EVB";
zephyr,code = <INPUT_KEY_0>;
};
evb_sw2: evb_sw2 {
gpios = <&gpio0 5 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "SW2 on EVB";
zephyr,code = <INPUT_KEY_1>;
};
};
arduino_header: connector {
compatible = "panasonic,reduced-arduino-header";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpio0 31 0>, /* A0 */
<1 0 &gpio0 30 0>, /* A1 */
<2 0 &gpio0 4 0>, /* A2 */
<3 0 &gpio0 5 0>, /* A3 */
<6 0 &gpio1 9 0>, /* D0 */
<7 0 &gpio1 3 0>, /* D1 */
<8 0 &gpio1 15 0>, /* D2 */
<9 0 &gpio1 17 0>, /* D3 */
<10 0 &gpio1 4 0>, /* D4 */
<11 0 &gpio1 5 0>, /* D5 */
<16 0 &gpio0 30 0>, /* D10 */
<17 0 &gpio0 20 0>, /* D11 */
<18 0 &gpio0 2 0>, /* D12 */
<19 0 &gpio0 29 0>, /* D13 */
<20 0 &gpio0 11 0>, /* D14 */
<21 0 &gpio0 28 0>; /* D15 */
};
/* These aliases are provided for compatibility with samples */
aliases {
led0 = &evb_led1;
led1 = &evb_led2;
pwm-led0 = &pwm_evb_led1;
sw0 = &evb_sw1;
sw1 = &evb_sw2;
bootloader-led0 = &evb_led1;
watchdog0 = &wdt0;
};
};
®1 {
regulator-initial-mode = <NRF5X_REG_MODE_DCDC>;
};
&adc {
status = "okay";
};
&uicr {
gpio-as-nreset;
};
&gpiote {
status = "okay";
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
arduino_serial: &uart0 {
compatible = "nordic,nrf-uarte";
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart0_default>;
pinctrl-1 = <&uart0_sleep>;
pinctrl-names = "default", "sleep";
};
arduino_i2c: &i2c0 {
compatible = "nordic,nrf-twi";
status = "okay";
pinctrl-0 = <&i2c0_default>;
pinctrl-1 = <&i2c0_sleep>;
pinctrl-names = "default", "sleep";
};
&i2c1 {
compatible = "nordic,nrf-twi";
/* Cannot be used together with spi1, so disabled by default. */
pinctrl-0 = <&i2c1_default>;
pinctrl-1 = <&i2c1_sleep>;
pinctrl-names = "default", "sleep";
};
&pwm0 {
status = "okay";
pinctrl-0 = <&pwm0_default>;
pinctrl-1 = <&pwm0_sleep>;
pinctrl-names = "default", "sleep";
};
&spi0 {
compatible = "nordic,nrf-spi";
/* Cannot be used together with i2c0, so disabled by default. */
pinctrl-0 = <&spi0_default>;
pinctrl-1 = <&spi0_sleep>;
pinctrl-names = "default", "sleep";
};
&spi1 {
compatible = "nordic,nrf-spi";
status = "okay";
pinctrl-0 = <&spi1_default>;
pinctrl-1 = <&spi1_sleep>;
pinctrl-names = "default", "sleep";
};
arduino_spi: &spi3 {
status = "okay";
cs-gpios = <&gpio0 30 GPIO_ACTIVE_LOW>; /* D10 */
pinctrl-0 = <&spi3_default>;
pinctrl-1 = <&spi3_sleep>;
pinctrl-names = "default", "sleep";
};
&ieee802154 {
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x000000000 0xC000>;
};
slot0_partition: partition@c000 {
label = "image-0";
reg = <0x0000C000 0x32000>;
};
slot1_partition: partition@3e000 {
label = "image-1";
reg = <0x0003E000 0x32000>;
};
scratch_partition: partition@70000 {
label = "image-scratch";
reg = <0x00070000 0xA000>;
};
storage_partition: partition@7a000 {
label = "storage";
reg = <0x0007A000 0x00006000>;
};
};
};
zephyr_udc0: &usbd {
compatible = "nordic,nrf-usbd";
status = "okay";
};
``` | /content/code_sandbox/boards/panasonic/pan1782_evb/pan1782_evb.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,726 |
```unknown
/*
* PAN1782 EVB configuration
*
*/
&pinctrl {
/* flow control cannot be used together with i2c0,
* so not added to uart0_default by default
*/
uart0_default: uart0_default {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 9)>;
};
group2 {
psels = <NRF_PSEL(UART_RX, 0, 3)>;
bias-pull-up;
};
};
/* flow control cannot be used together with i2c0,
* so not added to uart0_sleep by default
*/
uart0_sleep: uart0_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 9)>,
<NRF_PSEL(UART_RX, 0, 3)>;
low-power-enable;
};
};
i2c0_default: i2c0_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 11)>,
<NRF_PSEL(TWIM_SCL, 0, 28)>;
};
};
i2c0_sleep: i2c0_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 11)>,
<NRF_PSEL(TWIM_SCL, 0, 28)>;
low-power-enable;
};
};
i2c1_default: i2c1_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 30)>,
<NRF_PSEL(TWIM_SCL, 0, 31)>;
};
};
i2c1_sleep: i2c1_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 30)>,
<NRF_PSEL(TWIM_SCL, 0, 31)>;
low-power-enable;
};
};
pwm0_default: pwm0_default {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 0, 15)>;
nordic,invert;
};
};
pwm0_sleep: pwm0_sleep {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 0, 15)>;
low-power-enable;
};
};
spi0_default: spi0_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 27)>,
<NRF_PSEL(SPIM_MOSI, 0, 26)>,
<NRF_PSEL(SPIM_MISO, 0, 29)>;
};
};
spi0_sleep: spi0_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 27)>,
<NRF_PSEL(SPIM_MOSI, 0, 26)>,
<NRF_PSEL(SPIM_MISO, 0, 29)>;
low-power-enable;
};
};
spi1_default: spi1_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 31)>,
<NRF_PSEL(SPIM_MOSI, 0, 30)>,
<NRF_PSEL(SPIM_MISO, 1, 8)>;
};
};
spi1_sleep: spi1_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 31)>,
<NRF_PSEL(SPIM_MOSI, 0, 30)>,
<NRF_PSEL(SPIM_MISO, 1, 8)>;
low-power-enable;
};
};
spi3_default: spi3_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 29)>,
<NRF_PSEL(SPIM_MISO, 0, 2)>,
<NRF_PSEL(SPIM_MOSI, 0, 20)>;
};
};
spi3_sleep: spi3_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 29)>,
<NRF_PSEL(SPIM_MISO, 0, 2)>,
<NRF_PSEL(SPIM_MOSI, 0, 20)>;
low-power-enable;
};
};
};
``` | /content/code_sandbox/boards/panasonic/pan1782_evb/pan1782_evb-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,027 |
```restructuredtext
.. _pan1782_evb:
PAN1782 Evaluation Board
########################
Overview
********
The PAN1782 Evaluation Board is a development tool for the PAN1782 module
which is based on the nRF52833 chipset from Nordic Semiconductor.
.. figure:: pan1782_evaluation_board.jpg
:align: center
:alt: PAN1782 Evaluation Board
You can find more information about the PAN1782 module and the PAN1782
evaluation board on the `product website`_.
Please also refer to :ref:`nrf52833dk_nrf52833` for general information about
development kits for the nRF52833 from Nordic Semiconductor.
The PAN1782 evaluation board is closely linked to these other evaluation
boards:
* :ref:`pan1780_evb`
* :ref:`pan1781_evb`
Usage
*****
You can find the `user guide`_ for the PAN1782 Evaluation Board in the
`Panasonic Wireless Connectivity Development Hub`_.
The user guide contains (amongst other things) detailed information about
* pin mapping
* powering options
* breakout pin header interface
* current consumption measurement
* software development
and other things.
The schematics for the PAN1782 Evaluation Board are available in the
`download section`_ of the `Panasonic Wireless Connectivity Development Hub`_.
Programming and Debugging
*************************
Please use the ``pan1782_evb`` board configuration when
:ref:`build_an_application` and :ref:`application_run`.
.. target-notes::
.. _product website: path_to_url
.. _Panasonic Wireless Connectivity Development Hub: path_to_url
.. _user guide: path_to_url
.. _download section: path_to_url
``` | /content/code_sandbox/boards/panasonic/pan1782_evb/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 360 |
```cmake
# PAN1770 EVB configuration
board_runner_args(jlink "--device=nrf52" "--speed=4000")
board_runner_args(pyocd "--target=nrf52840" "--frequency=4000000")
include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
``` | /content/code_sandbox/boards/panasonic/pan1770_evb/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 97 |
```unknown
# PAN1770 EVB configuration
# Enable MPU
CONFIG_ARM_MPU=y
# Enable hardware stack protection
CONFIG_HW_STACK_PROTECTION=y
# Enable RTT
CONFIG_USE_SEGGER_RTT=y
# enable GPIO
CONFIG_GPIO=y
# enable uart driver
CONFIG_SERIAL=y
# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
``` | /content/code_sandbox/boards/panasonic/pan1770_evb/pan1770_evb_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 75 |
```unknown
/*
* PAN1770 EVB configuration
*
*/
&pinctrl {
uart0_default: uart0_default {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 6)>,
<NRF_PSEL(UART_RTS, 0, 5)>;
};
group2 {
psels = <NRF_PSEL(UART_RX, 0, 8)>,
<NRF_PSEL(UART_CTS, 0, 7)>;
bias-pull-up;
};
};
uart0_sleep: uart0_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 6)>,
<NRF_PSEL(UART_RX, 0, 8)>,
<NRF_PSEL(UART_RTS, 0, 5)>,
<NRF_PSEL(UART_CTS, 0, 7)>;
low-power-enable;
};
};
uart1_default: uart1_default {
group1 {
psels = <NRF_PSEL(UART_RX, 1, 2)>;
bias-pull-up;
};
group2 {
psels = <NRF_PSEL(UART_TX, 1, 1)>;
};
};
uart1_sleep: uart1_sleep {
group1 {
psels = <NRF_PSEL(UART_RX, 1, 2)>,
<NRF_PSEL(UART_TX, 1, 1)>;
low-power-enable;
};
};
i2c0_default: i2c0_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
<NRF_PSEL(TWIM_SCL, 0, 27)>;
};
};
i2c0_sleep: i2c0_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
<NRF_PSEL(TWIM_SCL, 0, 27)>;
low-power-enable;
};
};
i2c1_default: i2c1_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 30)>,
<NRF_PSEL(TWIM_SCL, 0, 31)>;
};
};
i2c1_sleep: i2c1_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 30)>,
<NRF_PSEL(TWIM_SCL, 0, 31)>;
low-power-enable;
};
};
pwm0_default: pwm0_default {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 0, 13)>;
nordic,invert;
};
};
pwm0_sleep: pwm0_sleep {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 0, 13)>;
low-power-enable;
};
};
spi0_default: spi0_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 27)>,
<NRF_PSEL(SPIM_MOSI, 0, 26)>,
<NRF_PSEL(SPIM_MISO, 0, 29)>;
};
};
spi0_sleep: spi0_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 27)>,
<NRF_PSEL(SPIM_MOSI, 0, 26)>,
<NRF_PSEL(SPIM_MISO, 0, 29)>;
low-power-enable;
};
};
spi1_default: spi1_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 31)>,
<NRF_PSEL(SPIM_MOSI, 0, 30)>,
<NRF_PSEL(SPIM_MISO, 1, 8)>;
};
};
spi1_sleep: spi1_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 31)>,
<NRF_PSEL(SPIM_MOSI, 0, 30)>,
<NRF_PSEL(SPIM_MISO, 1, 8)>;
low-power-enable;
};
};
spi2_default: spi2_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 19)>,
<NRF_PSEL(SPIM_MOSI, 0, 20)>,
<NRF_PSEL(SPIM_MISO, 0, 21)>;
};
};
spi2_sleep: spi2_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 19)>,
<NRF_PSEL(SPIM_MOSI, 0, 20)>,
<NRF_PSEL(SPIM_MISO, 0, 21)>;
low-power-enable;
};
};
qspi_default: qspi_default {
group1 {
psels = <NRF_PSEL(QSPI_SCK, 0, 19)>,
<NRF_PSEL(QSPI_IO0, 0, 20)>,
<NRF_PSEL(QSPI_IO1, 0, 21)>,
<NRF_PSEL(QSPI_IO2, 0, 22)>,
<NRF_PSEL(QSPI_IO3, 0, 23)>,
<NRF_PSEL(QSPI_CSN, 0, 17)>;
};
};
qspi_sleep: qspi_sleep {
group1 {
psels = <NRF_PSEL(QSPI_SCK, 0, 19)>,
<NRF_PSEL(QSPI_IO0, 0, 20)>,
<NRF_PSEL(QSPI_IO1, 0, 21)>,
<NRF_PSEL(QSPI_IO2, 0, 22)>,
<NRF_PSEL(QSPI_IO3, 0, 23)>,
<NRF_PSEL(QSPI_CSN, 0, 17)>;
low-power-enable;
};
};
spi3_default: spi3_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 15)>,
<NRF_PSEL(SPIM_MISO, 0, 14)>,
<NRF_PSEL(SPIM_MOSI, 0, 13)>;
};
};
spi3_sleep: spi3_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 15)>,
<NRF_PSEL(SPIM_MISO, 0, 14)>,
<NRF_PSEL(SPIM_MOSI, 0, 13)>;
low-power-enable;
};
};
};
``` | /content/code_sandbox/boards/panasonic/pan1770_evb/pan1770_evb-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,596 |
```cmake
# Suppress "unique_unit_address_if_enabled" to handle the following overlaps:
# - power@40000000 & clock@40000000 & bprot@40000000
# - acl@4001e000 & flash-controller@4001e000
list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled")
``` | /content/code_sandbox/boards/panasonic/pan1770_evb/pre_dt_board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 72 |
```unknown
# PAN1770 EVB configuration
config BOARD_PAN1770_EVB
select SOC_NRF52840_QIAA
``` | /content/code_sandbox/boards/panasonic/pan1770_evb/Kconfig.pan1770_evb | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 28 |
```yaml
board:
name: pan1770_evb
vendor: panasonic
socs:
- name: nrf52840
``` | /content/code_sandbox/boards/panasonic/pan1770_evb/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 31 |
```unknown
# PAN1770 EVB configuration
if BOARD_PAN1770_EVB
config BT_CTLR
default BT
endif # BOARD_PAN1770_EVB
``` | /content/code_sandbox/boards/panasonic/pan1770_evb/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 36 |
```unknown
/*
* PAN1770 EVB configuration
*
*/
/dts-v1/;
#include <nordic/nrf52840_qiaa.dtsi>
#include "pan1770_evb-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "pan1770-evb";
compatible = "panasonic-industrial-devices-europe-gmbh,pan1770-evb";
chosen {
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,uart-mcumgr = &uart0;
zephyr,bt-mon-uart = &uart0;
zephyr,bt-c2h-uart = &uart0;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,ieee802154 = &ieee802154;
};
leds {
compatible = "gpio-leds";
evb_led1: evb_led_1 {
gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
label = "LED1 on EVB";
};
evb_led2: evb_led_2 {
gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
label = "LED2 on EVB";
};
evb_led3: evb_led_3 {
gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
label = "LED3 on EVB";
};
evb_led4: evb_led_4 {
gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
label = "LED4 on EVB";
};
};
pwmleds {
compatible = "pwm-leds";
pwm_evb_led1: pwm_evb_led_1 {
pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_INVERTED>;
};
};
buttons {
compatible = "gpio-keys";
evb_sw1: evb_sw_1 {
gpios = <&gpio0 11 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "SW1 on EVB";
zephyr,code = <INPUT_KEY_0>;
};
evb_sw2: evb_sw_2 {
gpios = <&gpio0 12 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "SW2 on EVB";
zephyr,code = <INPUT_KEY_1>;
};
evb_sw3: evb_sw_3 {
gpios = <&gpio0 24 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "SW3 on EVB";
zephyr,code = <INPUT_KEY_2>;
};
evb_sw4: evb_sw_4 {
gpios = <&gpio0 25 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "SW4 on EVB";
zephyr,code = <INPUT_KEY_3>;
};
};
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpio0 3 0>, /* A0 */
<1 0 &gpio0 4 0>, /* A1 */
<2 0 &gpio0 28 0>, /* A2 */
<3 0 &gpio0 29 0>, /* A3 */
<4 0 &gpio0 30 0>, /* A4 */
<5 0 &gpio0 31 0>, /* A5 */
<6 0 &gpio1 1 0>, /* D0 */
<7 0 &gpio1 2 0>, /* D1 */
<8 0 &gpio1 3 0>, /* D2 */
<9 0 &gpio1 4 0>, /* D3 */
<10 0 &gpio1 5 0>, /* D4 */
<11 0 &gpio1 6 0>, /* D5 */
<12 0 &gpio1 7 0>, /* D6 */
<13 0 &gpio1 8 0>, /* D7 */
<14 0 &gpio1 10 0>, /* D8 */
<15 0 &gpio1 11 0>, /* D9 */
<16 0 &gpio0 12 0>, /* D10 */
<17 0 &gpio0 13 0>, /* D11 */
<18 0 &gpio0 14 0>, /* D12 */
<19 0 &gpio0 15 0>, /* D13 */
<20 0 &gpio0 26 0>, /* D14 */
<21 0 &gpio0 27 0>; /* D15 */
};
arduino_adc: analog-connector {
compatible = "arduino,uno-adc";
#io-channel-cells = <1>;
io-channel-map = <0 &adc 1>, /* A0 = P0.3 = AIN1 */
<1 &adc 2>, /* A1 = P0.4 = AIN2 */
<2 &adc 4>, /* A2 = P0.28 = AIN4 */
<3 &adc 5>, /* A3 = P0.29 = AIN5 */
<4 &adc 6>, /* A4 = P0.30 = AIN6 */
<5 &adc 7>; /* A5 = P0.31 = AIN7 */
};
/* These aliases are provided for compatibility with samples */
aliases {
led0 = &evb_led1;
led1 = &evb_led2;
led2 = &evb_led3;
led3 = &evb_led4;
pwm-led0 = &pwm_evb_led1;
sw0 = &evb_sw1;
sw1 = &evb_sw2;
sw2 = &evb_sw3;
sw3 = &evb_sw4;
bootloader-led0 = &evb_led1;
watchdog0 = &wdt0;
};
};
®0 {
status = "okay";
};
®1 {
regulator-initial-mode = <NRF5X_REG_MODE_DCDC>;
};
&adc {
status = "okay";
};
&uicr {
gpio-as-nreset;
};
&gpiote {
status = "okay";
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&uart0 {
compatible = "nordic,nrf-uarte";
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart0_default>;
pinctrl-1 = <&uart0_sleep>;
pinctrl-names = "default", "sleep";
};
arduino_serial: &uart1 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart1_default>;
pinctrl-1 = <&uart1_sleep>;
pinctrl-names = "default", "sleep";
};
arduino_i2c: &i2c0 {
compatible = "nordic,nrf-twi";
status = "okay";
pinctrl-0 = <&i2c0_default>;
pinctrl-1 = <&i2c0_sleep>;
pinctrl-names = "default", "sleep";
};
&i2c1 {
compatible = "nordic,nrf-twi";
/* Cannot be used together with spi1, so disabled by default. */
pinctrl-0 = <&i2c1_default>;
pinctrl-1 = <&i2c1_sleep>;
pinctrl-names = "default", "sleep";
};
&pwm0 {
status = "okay";
pinctrl-0 = <&pwm0_default>;
pinctrl-1 = <&pwm0_sleep>;
pinctrl-names = "default", "sleep";
};
&spi0 {
compatible = "nordic,nrf-spi";
/* Cannot be used together with i2c0, so disabled by default. */
pinctrl-0 = <&spi0_default>;
pinctrl-1 = <&spi0_sleep>;
pinctrl-names = "default", "sleep";
};
&spi1 {
compatible = "nordic,nrf-spi";
status = "okay";
pinctrl-0 = <&spi1_default>;
pinctrl-1 = <&spi1_sleep>;
pinctrl-names = "default", "sleep";
};
&spi2 {
compatible = "nordic,nrf-spi";
/* Disabled by default in nrf52840.dtsi. */
pinctrl-0 = <&spi2_default>;
pinctrl-1 = <&spi2_sleep>;
pinctrl-names = "default", "sleep";
};
&qspi {
/* Disabled by default in nrf52840.dtsi. */
pinctrl-0 = <&qspi_default>;
pinctrl-1 = <&qspi_sleep>;
pinctrl-names = "default", "sleep";
};
arduino_spi: &spi3 {
status = "disabled";
/* Cannot be used together with evb_led1, evb_led2, evb_led3, evb_sw2
* and pwm0 so disabled by default.
*/
cs-gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; /* D10 */
pinctrl-0 = <&spi3_default>;
pinctrl-1 = <&spi3_sleep>;
pinctrl-names = "default", "sleep";
};
&ieee802154 {
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x000000000 0x0000C000>;
};
slot0_partition: partition@c000 {
label = "image-0";
reg = <0x0000C000 0x00067000>;
};
slot1_partition: partition@73000 {
label = "image-1";
reg = <0x00073000 0x00067000>;
};
scratch_partition: partition@da000 {
label = "image-scratch";
reg = <0x000da000 0x0001e000>;
};
storage_partition: partition@f8000 {
label = "storage";
reg = <0x000f8000 0x00008000>;
};
};
};
zephyr_udc0: &usbd {
compatible = "nordic,nrf-usbd";
status = "okay";
};
``` | /content/code_sandbox/boards/panasonic/pan1770_evb/pan1770_evb.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,466 |
```yaml
# PAN1770 EVB configuration
identifier: pan1770_evb
name: pan1770-evb
type: mcu
arch: arm
ram: 256
flash: 1024
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- adc
- arduino_gpio
- arduino_i2c
- arduino_spi
- ble
- counter
- gpio
- i2c
- i2s
- pwm
- spi
- usb_device
- watchdog
- netif:openthread
``` | /content/code_sandbox/boards/panasonic/pan1770_evb/pan1770_evb.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 142 |
```cmake
# PAN1781 EVB configuration
board_runner_args(jlink "--device=nrf52" "--speed=4000")
board_runner_args(pyocd "--target=nrf52820" "--frequency=4000000")
include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
``` | /content/code_sandbox/boards/panasonic/pan1781_evb/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 97 |
```restructuredtext
.. _pan1770_evb:
PAN1770 Evaluation Board
########################
Overview
********
The PAN1770 Evaluation Board is a development tool for the PAN1770 module
which is based on the nRF52840 chipset from Nordic Semiconductor.
It is basically a clone of the official nRF52840 development kit (PCA10056)
from Nordic Semiconductor. Please refer to :ref:`nrf52840dk_nrf52840` for
further information.
.. figure:: pan1770_evaluation_board.jpg
:align: center
:alt: PAN1770 Evaluation Board
You can find more information about the PAN1770 module and the PAN1770
evaluation board on the `product website`_.
The PAN1770 evaluation board is closely linked to these other evaluation
boards:
* :ref:`pan1780_evb`
* :ref:`pan1781_evb`
* :ref:`pan1782_evb`
Usage
*****
You can find the `user guide`_ for the PAN1770 Evaluation Board in the
`Panasonic Wireless Connectivity Development Hub`_.
The user guide contains (amongst other things) detailed information about
* pin mapping
* powering options
* breakout pin header interface
* current consumption measurement
* software development
and other things.
The schematics for the PAN1770 Evaluation Board are available in the
`download section`_ of the `Panasonic Wireless Connectivity Development Hub`_.
Programming and Debugging
*************************
Please use the ``pan1770_evb`` board configuration when
:ref:`build_an_application` and :ref:`application_run`.
.. target-notes::
.. _product website: path_to_url
.. _Panasonic Wireless Connectivity Development Hub: path_to_url
.. _user guide: path_to_url
.. _download section: path_to_url
``` | /content/code_sandbox/boards/panasonic/pan1770_evb/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 381 |
```unknown
# PAN1781 EVB configuration
config BOARD_PAN1781_EVB
select SOC_NRF52820_QDAA
``` | /content/code_sandbox/boards/panasonic/pan1781_evb/Kconfig.pan1781_evb | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 28 |
```yaml
board:
name: pan1781_evb
vendor: panasonic
socs:
- name: nrf52820
``` | /content/code_sandbox/boards/panasonic/pan1781_evb/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 31 |
```unknown
# PAN1781 EVB configuration
# Enable MPU
CONFIG_ARM_MPU=y
# Enable hardware stack protection
CONFIG_HW_STACK_PROTECTION=y
# Enable RTT
CONFIG_USE_SEGGER_RTT=y
# enable GPIO
CONFIG_GPIO=y
# enable uart driver
CONFIG_SERIAL=y
# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
``` | /content/code_sandbox/boards/panasonic/pan1781_evb/pan1781_evb_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 75 |
```yaml
# PAN1781 EVB configuration
identifier: pan1781_evb
name: pan1781-evb
type: mcu
arch: arm
ram: 32
flash: 256
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- arduino_gpio
- arduino_i2c
- arduino_spi
- ble
- gpio
- i2c
- spi
- watchdog
- counter
``` | /content/code_sandbox/boards/panasonic/pan1781_evb/pan1781_evb.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 113 |
```unknown
# PAN1781 EVB configuration
if BOARD_PAN1781_EVB
config BT_CTLR
default BT
endif # BOARD_PAN1781_EVB
``` | /content/code_sandbox/boards/panasonic/pan1781_evb/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 36 |
```unknown
/*
* PAN1781 EVB configuration
*
*/
&pinctrl {
/* flow control cannot be used together with i2c0,
* so not added to uart0_default by default
*/
uart0_default: uart0_default {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 6)>;
};
group2 {
psels = <NRF_PSEL(UART_RX, 0, 8)>;
bias-pull-up;
};
};
/* flow control cannot be used together with i2c0,
* so not added to uart0_sleep by default
*/
uart0_sleep: uart0_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 6)>,
<NRF_PSEL(UART_RX, 0, 8)>;
low-power-enable;
};
};
i2c0_default: i2c0_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 7)>,
<NRF_PSEL(TWIM_SCL, 0, 30)>;
};
};
i2c0_sleep: i2c0_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 7)>,
<NRF_PSEL(TWIM_SCL, 0, 30)>;
low-power-enable;
};
};
spi1_default: spi1_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 28)>,
<NRF_PSEL(SPIM_MISO, 0, 29)>,
<NRF_PSEL(SPIM_MOSI, 0, 20)>;
};
};
spi1_sleep: spi1_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 28)>,
<NRF_PSEL(SPIM_MISO, 0, 29)>,
<NRF_PSEL(SPIM_MOSI, 0, 20)>;
low-power-enable;
};
};
};
``` | /content/code_sandbox/boards/panasonic/pan1781_evb/pan1781_evb-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 492 |
```restructuredtext
.. _pan1781_evb:
PAN1781 Evaluation Board
########################
Overview
********
The PAN1781 Evaluation Board is a development tool for the PAN1781 module
which is based on the nRF52820 chipset from Nordic Semiconductor.
.. figure:: pan1781_evaluation_board.jpg
:align: center
:alt: PAN1781 Evaluation Board
You can find more information about the PAN1781 module and the PAN1781
evaluation board on the `product website`_.
Please also refer to :ref:`nrf52833dk_nrf52820` for general information about
development kits for the nRF52820 from Nordic Semiconductor.
The PAN1781 evaluation board is closely linked to these other evaluation
boards:
* :ref:`pan1780_evb`
* :ref:`pan1782_evb`
Usage
*****
You can find the `user guide`_ for the PAN1781 Evaluation Board in the
`Panasonic Wireless Connectivity Development Hub`_.
The user guide contains (amongst other things) detailed information about
* pin mapping
* powering options
* breakout pin header interface
* current consumption measurement
* software development
and other things.
The schematics for the PAN1781 Evaluation Board are available in the
`download section`_ of the `Panasonic Wireless Connectivity Development Hub`_.
Programming and Debugging
*************************
Please use the ``pan1781_evb`` board configuration when
:ref:`build_an_application` and :ref:`application_run`.
.. target-notes::
.. _product website: path_to_url
.. _Panasonic Wireless Connectivity Development Hub: path_to_url
.. _user guide: path_to_url
.. _download section: path_to_url
``` | /content/code_sandbox/boards/panasonic/pan1781_evb/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 360 |
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