text stringlengths 9 39.2M | dir stringlengths 25 226 | lang stringclasses 163
values | created_date timestamp[s] | updated_date timestamp[s] | repo_name stringclasses 751
values | repo_full_name stringclasses 752
values | star int64 1.01k 183k | len_tokens int64 1 18.5M |
|---|---|---|---|---|---|---|---|---|
```objective-c
/*
*
*/
#ifndef __DAI_PARAMS_INTEL_IPC3_H__
#define __DAI_PARAMS_INTEL_IPC3_H__
#include <stdint.h>
#define DAI_INTEL_IPC3_SSP_FMT_I2S 1 /**< I2S mode */
#define DAI_INTEL_IPC3_SSP_FMT_RIGHT_J 2 /**< Right Justified mode */
#define DAI_INTEL_IPC3_SSP_FMT_LEFT_J 3 /**< Left Justified mode */
#define ... | /content/code_sandbox/drivers/dai/intel/ssp/dai-params-intel-ipc3.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,597 |
```objective-c
/*
*
*/
#ifndef __DAI_PARAMS_INTEL_IPC4_H__
#define __DAI_PARAMS_INTEL_IPC4_H__
#include <stdint.h>
#define DAI_INTEL_I2S_TDM_MAX_SLOT_MAP_COUNT 8
#define I2SIPCMC 8
#define I2SOPCMC 8
/**< Type of the gateway. */
enum dai_intel_ipc4_connector_node_id_type {
/**< HD/A host output (-> DSP). */
da... | /content/code_sandbox/drivers/dai/intel/ssp/dai-params-intel-ipc4.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,565 |
```objective-c
/*
*
*/
#ifndef __INTEL_DAI_DRIVER_SSP_REGSV3_H__
#define __INTEL_DAI_DRIVER_SSP_REGSV3_H__
/* SSP register offsets */
#define SSCR0 0x00
#define SSCR1 0x04
#define SSSR 0x08
#define SSITR 0x0C
#define SSTO 0x28
#define SSPSP 0x2C
#define SSTSS 0x38
#define SSCR2 0x40
#define SSPSP2 ... | /content/code_sandbox/drivers/dai/intel/ssp/ssp_regs_v3.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 3,174 |
```unknown
# SOF HDA configuration options
config DAI_INTEL_HDA
bool "Intel HDA driver for Dai interface"
default y
depends on DT_HAS_INTEL_HDA_DAI_ENABLED
select DMA
help
Select this to enable Intel HDA driver.
``` | /content/code_sandbox/drivers/dai/intel/hda/Kconfig.hda | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 58 |
```c
/*
*
*/
#include <errno.h>
#include <stdbool.h>
#include <stdint.h>
#include <zephyr/spinlock.h>
#include <zephyr/devicetree.h>
#include <zephyr/logging/log.h>
#define DT_DRV_COMPAT intel_hda_dai
#define LOG_DOMAIN dai_intel_hda
LOG_MODULE_REGISTER(LOG_DOMAIN);
#include "hda.h"
static int dai_hda_trigger(co... | /content/code_sandbox/drivers/dai/intel/hda/hda.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 883 |
```objective-c
/*
*
*/
#ifndef __INTEL_DAI_DRIVER_HDA_H__
#define __INTEL_DAI_DRIVER_HDA_H__
#include <stdint.h>
#include <zephyr/drivers/dai.h>
#define dai_get_drvdata(dai) &dai->priv_data
#define dai_base(dai) dai->plat_data.base
#define DAI_INTEL_HDA_DEFAULT_WORD_SIZE 16
struct dai_intel_ipc_hda_params {
uin... | /content/code_sandbox/drivers/dai/intel/hda/hda.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 176 |
```c
/*
*
*/
#include <errno.h>
#include <zephyr/sys/util_macro.h>
#include <stdbool.h>
#include <stdint.h>
#include <zephyr/spinlock.h>
#include <zephyr/devicetree.h>
#include <zephyr/pm/device.h>
#include <zephyr/pm/device_runtime.h>
#define LOG_DOMAIN dai_intel_ssp
#include <zephyr/logging/log.h>
LOG_MODULE_REGIS... | /content/code_sandbox/drivers/dai/intel/ssp/ssp.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 24,749 |
```objective-c
/*
*
*/
#ifndef __INTEL_DAI_DRIVER_DMIC_H__
#define __INTEL_DAI_DRIVER_DMIC_H__
#include <zephyr/sys/util_macro.h>
/* The microphones create a low frequecy thump sound when clock is enabled.
* The unmute linear gain ramp chacteristic is defined here.
* NOTE: Do not set any of these to 0.
*/
#defi... | /content/code_sandbox/drivers/dai/intel/dmic/dmic.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,320 |
```c
/*
*
*/
#define DT_DRV_COMPAT intel_dai_dmic
#define LOG_DOMAIN dai_intel_dmic
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(LOG_DOMAIN);
#include <errno.h>
#include <stdbool.h>
#include <stdint.h>
#include <zephyr/kernel.h>
#include <zephyr/spinlock.h>
#include <zephyr/devicetree.h>
#include <zephyr/pm/... | /content/code_sandbox/drivers/dai/intel/dmic/dmic.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 8,113 |
```objective-c
/*
*
* Author: Adrian Warecki <adrian.warecki@intel.com>
*/
#ifndef __INTEL_DAI_DRIVER_DMIC_NHLT_H__
#define __INTEL_DAI_DRIVER_DMIC_NHLT_H__
/* For NHLT DMIC configuration parsing */
#define DMIC_HW_CONTROLLERS_MAX 4
#define DMIC_HW_FIFOS_MAX 2
struct nhlt_dmic_gateway_attributes {
uint32_t dw;
}... | /content/code_sandbox/drivers/dai/intel/dmic/dmic_nhlt.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 924 |
```unknown
# SOF DMIC configuration options
config DAI_INTEL_DMIC
bool "Intel digital PDM microphone driver support for DAI interface"
default y
depends on DT_HAS_INTEL_DAI_DMIC_ENABLED
depends on PM_DEVICE_RUNTIME
help
Enable Intel digital PDM microphone driver for DAI interface
if DAI_INTEL_DMIC
choice
p... | /content/code_sandbox/drivers/dai/intel/dmic/Kconfig.dmic | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 553 |
```c
/*
*
*/
#include <stdint.h>
#include <errno.h>
#include <zephyr/spinlock.h>
#define LOG_DOMAIN dai_intel_dmic_nhlt
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(LOG_DOMAIN);
#include <zephyr/drivers/dai.h>
#include <adsp_clk.h>
#include "dmic.h"
#include <dmic_regs.h>
#include "dmic_nhlt.h"
extern stru... | /content/code_sandbox/drivers/dai/intel/dmic/dmic_nhlt.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 7,925 |
```unknown
config DAI_NXP_ESAI
bool "NXP Enhanced Serial Audio Interface (ESAI) driver"
default y
depends on DT_HAS_NXP_DAI_ESAI_ENABLED
help
Select this to enable NXP ESAI driver.
``` | /content/code_sandbox/drivers/dai/nxp/esai/Kconfig.esai | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 54 |
```c
/*
*
*/
#include "esai.h"
/* TODO:
* 1) Some pin functions can be inferred from software ctx. For instance,
* if you use more than 1 data line, it's obvious you're going
* to want to keep the pins of the data lines in ESAI mode.
*
* 2) Add function for handling underrun/overrun. Preferably
* we should do... | /content/code_sandbox/drivers/dai/nxp/esai/esai.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 6,392 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_DRIVERS_DAI_NXP_ESAI_H_
#define ZEPHYR_DRIVERS_DAI_NXP_ESAI_H_
#include <zephyr/logging/log.h>
#include <zephyr/drivers/dai.h>
#include <zephyr/device.h>
#include <zephyr/dt-bindings/dai/esai.h>
#include <fsl_esai.h>
LOG_MODULE_REGISTER(nxp_dai_esai);
/* used for binding the... | /content/code_sandbox/drivers/dai/nxp/esai/esai.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 4,544 |
```unknown
config DAI_NXP_SAI
bool "NXP Synchronous Audio Interface (SAI) driver"
default y
depends on DT_HAS_NXP_DAI_SAI_ENABLED
select PINCTRL
help
Select this to enable NXP SAI driver.
if DAI_NXP_SAI
config SAI_HAS_MCLK_CONFIG_OPTION
bool "Set if SAI has MCLK configuration options"
default n
help
Sele... | /content/code_sandbox/drivers/dai/nxp/sai/Kconfig.sai | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 323 |
```objective-c
*
*/
#ifndef ZEPHYR_DRIVERS_DAI_NXP_SAI_H_
#define ZEPHYR_DRIVERS_DAI_NXP_SAI_H_
#include <zephyr/drivers/clock_control.h>
#include <zephyr/drivers/pinctrl.h>
#include <zephyr/logging/log.h>
#include <fsl_sai.h>
LOG_MODULE_REGISTER(nxp_dai_sai);
#ifdef CONFIG_SAI_HAS_MCLK_CONFIG_OPTION
#define SAI_... | /content/code_sandbox/drivers/dai/nxp/sai/sai.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 4,988 |
```c
/*
*
*/
#include <zephyr/drivers/dai.h>
#include <zephyr/device.h>
#include <zephyr/kernel.h>
#include "sai.h"
/* used for binding the driver */
#define DT_DRV_COMPAT nxp_dai_sai
#define SAI_TX_RX_HW_DISABLE_TIMEOUT 50
/* TODO list:
*
* 1) No busy waiting should be performed in any of the operations.
* I... | /content/code_sandbox/drivers/dai/nxp/sai/sai.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 8,119 |
```unknown
config AUXDISPLAY_PT6314
bool "PTC PT6314 dot character VFD driver"
default y
select SPI
depends on DT_HAS_PTC_PT6314_ENABLED
help
Enable driver for PTC PT6314.
``` | /content/code_sandbox/drivers/auxdisplay/Kconfig.pt6314 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 52 |
```c
/*
*
*/
#define DT_DRV_COMPAT sparkfun_serlcd
#include <stdlib.h>
#include <string.h>
#include <zephyr/device.h>
#include <zephyr/devicetree.h>
#include <zephyr/drivers/i2c.h>
#include <zephyr/drivers/auxdisplay.h>
#include <zephyr/kernel.h>
#include <zephyr/sys/util.h>
#include <zephyr/logging/log.h>
LOG_MOD... | /content/code_sandbox/drivers/auxdisplay/auxdisplay_serlcd.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,967 |
```unknown
config AUXDISPLAY_JHD1313
bool "Jinghua Display JHD1313 driver"
default y
select I2C
depends on DT_HAS_JHD_JHD1313_ENABLED
help
Enable driver for Jinghua Display JHD1313 display.
``` | /content/code_sandbox/drivers/auxdisplay/Kconfig.jhd1313 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 58 |
```c
/*
*
*/
#define DT_DRV_COMPAT jhd_jhd1313
#include <string.h>
#include <zephyr/device.h>
#include <zephyr/devicetree.h>
#include <zephyr/drivers/i2c.h>
#include <zephyr/drivers/auxdisplay.h>
#include <zephyr/kernel.h>
#include <zephyr/sys/util.h>
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(auxdisplay_... | /content/code_sandbox/drivers/auxdisplay/auxdisplay_jhd1313.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 3,190 |
```unknown
config AUXDISPLAY_ITRON
bool "Noritake Itron VFD driver"
default y
select GPIO
select SERIAL
depends on DT_HAS_NORITAKE_ITRON_ENABLED
help
Enable driver for Noritake Itron VFD.
``` | /content/code_sandbox/drivers/auxdisplay/Kconfig.itron | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 55 |
```unknown
config AUXDISPLAY_HD44780
bool "Hitachi HD44780 LCD driver"
default y
depends on DT_HAS_HIT_HD44780_ENABLED
help
Enable driver for Hitachi HD44780 and compatible LCDs.
``` | /content/code_sandbox/drivers/auxdisplay/Kconfig.hd44780 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 51 |
```c
/*
*
*/
#define DT_DRV_COMPAT noritake_itron
#include <string.h>
#include <zephyr/device.h>
#include <zephyr/devicetree.h>
#include <zephyr/drivers/auxdisplay.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/drivers/uart.h>
#include <zephyr/sys/byteorder.h>
#include <zephyr/logging/log.h>
#include "auxdisp... | /content/code_sandbox/drivers/auxdisplay/auxdisplay_itron.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 3,170 |
```c
/*
*
*/
#define DT_DRV_COMPAT ptc_pt6314
#include <string.h>
#include <zephyr/device.h>
#include <zephyr/devicetree.h>
#include <zephyr/drivers/spi.h>
#include <zephyr/drivers/auxdisplay.h>
#include <zephyr/kernel.h>
#include <zephyr/sys/util.h>
/* Defines for the PT6314_INST_DISPLAY_ON_OFF */
#define PT6314_... | /content/code_sandbox/drivers/auxdisplay/auxdisplay_pt6314.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,605 |
```c
/*
*
*/
#include <zephyr/drivers/auxdisplay.h>
#include <zephyr/internal/syscall_handler.h>
static inline int z_vrfy_auxdisplay_display_on(const struct device *dev)
{
K_OOPS(K_SYSCALL_OBJ(dev, K_OBJ_DRIVER_AUXDISPLAY));
return z_impl_auxdisplay_display_on(dev);
}
#include <zephyr/syscalls/auxdisplay_display_... | /content/code_sandbox/drivers/auxdisplay/auxdisplay_handlers.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,372 |
```objective-c
/*
*
*/
#ifndef H_AUXDISPLAY_ITRON_
#define H_AUXDISPLAY_ITRON_
#define AUXDISPLAY_ITRON_BRIGHTNESS_MIN 1
#define AUXDISPLAY_ITRON_BRIGHTNESS_MAX 8
#define AUXDISPLAY_ITRON_CHARACTER_MIN 0x20
#define AUXDISPLAY_ITRON_CHARACTER_BACK_SPACE 0x08
#define AUXDISPLAY_ITRON_CHARACTER_TAB 0x09
#define AUXDI... | /content/code_sandbox/drivers/auxdisplay/auxdisplay_itron.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 141 |
```unknown
# Auxiliary Display drivers
menuconfig AUXDISPLAY
bool "Auxiliary (textual) Display Drivers"
help
Enable auxiliary/texual display drivers (e.g. alphanumerical displays)
if AUXDISPLAY
config AUXDISPLAY_INIT_PRIORITY
int "Auxiliary display devices init priority"
default 85
help
Auxiliary (textua... | /content/code_sandbox/drivers/auxdisplay/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 163 |
```unknown
config AUXDISPLAY_SERLCD
bool "SparkFun SerLCD dot character LCD driver"
default y
select I2C
depends on DT_HAS_SPARKFUN_SERLCD_ENABLED
help
Enable driver for SparkFun SerLCD.
``` | /content/code_sandbox/drivers/auxdisplay/Kconfig.serlcd | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 50 |
```unknown
config PINCTRL_SAM
bool "Atmel SAM pin controller driver"
default y
depends on DT_HAS_ATMEL_SAM_PINCTRL_ENABLED
help
Atmel pin controller driver is used on SAM and SAM4L SoC series
``` | /content/code_sandbox/drivers/pinctrl/Kconfig.sam | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 54 |
```c
/*
*
*/
#include <zephyr/dt-bindings/pinctrl/max32-pinctrl.h>
#include <zephyr/dt-bindings/gpio/adi-max32-gpio.h>
#include <zephyr/drivers/pinctrl.h>
#include <gpio.h>
#define ADI_MAX32_GET_PORT_ADDR_OR_NONE(nodelabel) \
IF_ENABLED(DT_NODE_EXISTS(DT_NODELABEL(n... | /content/code_sandbox/drivers/pinctrl/pinctrl_max32.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 855 |
```c
/*
*
*/
#define DT_DRV_COMPAT quicklogic_eos_s3_pinctrl
#include <zephyr/arch/cpu.h>
#include <zephyr/devicetree.h>
#include <zephyr/drivers/pinctrl.h>
#include <zephyr/logging/log.h>
#include <zephyr/dt-bindings/pinctrl/quicklogic-eos-s3-pinctrl.h>
#include <soc.h>
LOG_MODULE_REGISTER(pinctrl_eos_s3, CONFIG_... | /content/code_sandbox/drivers/pinctrl/pinctrl_eos_s3.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,043 |
```c
/*
*
*/
#define DT_DRV_COMPAT openisa_rv32m1_pinmux
#include <zephyr/drivers/pinctrl.h>
#include <fsl_clock.h>
#include <soc.h>
/* Port register addresses. */
static PORT_Type *ports[] = {
(PORT_Type *)DT_REG_ADDR(DT_NODELABEL(porta)),
(PORT_Type *)DT_REG_ADDR(DT_NODELABEL(portb)),
(PORT_Type *)DT_REG_ADD... | /content/code_sandbox/drivers/pinctrl/pinctrl_rv32m1.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 537 |
```c
/*
*
*/
#define DT_DRV_COMPAT sifive_pinctrl
#include <zephyr/arch/cpu.h>
#include <zephyr/devicetree.h>
#include <zephyr/drivers/pinctrl.h>
#include <zephyr/dt-bindings/pinctrl/sifive-pinctrl.h>
#include <soc.h>
#define MAX_PIN_NUM DT_PROP(DT_INST_PARENT(0), ngpios)
#define PINCTRL_BASE_ADDR DT_INST_REG_AD... | /content/code_sandbox/drivers/pinctrl/pinctrl_sifive.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 384 |
```unknown
config PINCTRL_TI_CC32XX
bool "TI CC32XX pinctrl driver"
default y
depends on DT_HAS_TI_CC32XX_PINCTRL_ENABLED
help
Enable the TI CC32XX pinctrl driver
``` | /content/code_sandbox/drivers/pinctrl/Kconfig.ti_cc32xx | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 51 |
```unknown
config PINCTRL_NXP_IOCON
bool "IOCON Pin controller driver for NXP LPC MCUs"
default y
depends on DT_HAS_NXP_LPC_IOCON_PINCTRL_ENABLED || \
DT_HAS_NXP_LPC11U6X_PINCTRL_ENABLED || \
DT_HAS_NXP_RT_IOCON_PINCTRL_ENABLED
help
Enable pin controller driver for NXP LPC MCUs
``` | /content/code_sandbox/drivers/pinctrl/Kconfig.lpc_iocon | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 85 |
```unknown
#
config PINCTRL_AMBIQ
bool "Ambiq Apollo pin controller driver"
default y
depends on DT_HAS_AMBIQ_APOLLO4_PINCTRL_ENABLED || DT_HAS_AMBIQ_APOLLO3_PINCTRL_ENABLED
select AMBIQ_HAL
select AMBIQ_HAL_USE_GPIO
help
Ambiq Apollo pinctrl driver
``` | /content/code_sandbox/drivers/pinctrl/Kconfig.ambiq | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 75 |
```c
/*
*
*/
#include <zephyr/drivers/pinctrl.h>
/* pico-sdk includes */
#include <hardware/gpio.h>
static void pinctrl_configure_pin(const pinctrl_soc_pin_t *pin)
{
gpio_init(pin->pin_num);
gpio_set_function(pin->pin_num, pin->alt_func);
gpio_set_pulls(pin->pin_num, pin->pullup, pin->pulldown);
gpio_set_drive... | /content/code_sandbox/drivers/pinctrl/pinctrl_rpi_pico.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 250 |
```unknown
config PINCTRL_GECKO
bool "Gecko pin controller driver"
default y
depends on DT_HAS_SILABS_GECKO_PINCTRL_ENABLED
select PINCTRL_STORE_REG
help
Gecko pin controller driver
``` | /content/code_sandbox/drivers/pinctrl/Kconfig.gecko | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 49 |
```unknown
config PINCTRL_CC13XX_CC26XX
bool "TI SimpleLink CC13xx / CC26xx pinctrl driver"
default y
depends on DT_HAS_TI_CC13XX_CC26XX_PINCTRL_ENABLED
help
Enable the TI SimpleLink CC13xx / CC26xx pinctrl driver
``` | /content/code_sandbox/drivers/pinctrl/Kconfig.cc13xx_cc26xx | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 68 |
```unknown
config PINCTRL_STM32
bool "Pin controller driver for STM32 MCUs"
default y
depends on DT_HAS_ST_STM32_PINCTRL_ENABLED || DT_HAS_ST_STM32F1_PINCTRL_ENABLED
help
Enable pin controller driver for STM32 MCUs
config PINCTRL_STM32_REMAP_INIT_PRIORITY
int "Remap initialization priority"
default 2
depend... | /content/code_sandbox/drivers/pinctrl/Kconfig.stm32 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 116 |
```c
/*
*
*/
#define DT_DRV_COMPAT hit_hd44780
#include <string.h>
#include <zephyr/device.h>
#include <zephyr/devicetree.h>
#include <zephyr/drivers/auxdisplay.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/pm/device.h>
#include <zephyr/sys/byteorder.h>
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(au... | /content/code_sandbox/drivers/auxdisplay/auxdisplay_hd44780.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 5,041 |
```unknown
config PINCTRL_NXP_KINETIS
bool "Pin controller driver for NXP Kinetis MCUs"
default y
depends on DT_HAS_NXP_KINETIS_PINMUX_ENABLED
help
Enable pin controller driver for NXP Kinetis MCUs
``` | /content/code_sandbox/drivers/pinctrl/Kconfig.kinetis | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 58 |
```c
/*
* an affiliate of Cypress Semiconductor Corporation
*
*/
/**
* @brief Pin control driver for Infineon CAT1 MCU family.
*/
#include <zephyr/drivers/pinctrl.h>
#include <cy_gpio.h>
#define GPIO_PORT_OR_NULL(node_id) \
COND_CODE_1(DT_NODE_EXISTS(node_id), ((GPIO_PRT_Type *)DT_REG_ADDR(node_id)), (NULL))
... | /content/code_sandbox/drivers/pinctrl/pinctrl_ifx_cat1.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,073 |
```c
/*
*
*/
#define DT_DRV_COMPAT ti_cc13xx_cc26xx_pinctrl
#include <zephyr/drivers/pinctrl.h>
static int pinctrl_c13xx_cc26xx_set(uint32_t pin, uint32_t func, uint32_t mode)
{
if (pin >= NUM_IO_MAX || func >= NUM_IO_PORTS) {
return -EINVAL;
}
IOCPortConfigureSet(pin, func, mode);
return 0;
}
int pinctrl... | /content/code_sandbox/drivers/pinctrl/pinctrl_cc13xx_cc26xx.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 183 |
```unknown
config PINCTRL_NXP_S32
bool "Pin controller driver for NXP S32 processors"
default y
depends on DT_HAS_NXP_S32ZE_PINCTRL_ENABLED || DT_HAS_NXP_S32K3_PINCTRL_ENABLED
help
Enable pin controller driver for NXP S32 processors.
``` | /content/code_sandbox/drivers/pinctrl/Kconfig.nxp_s32 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 65 |
```unknown
config PINCTRL_MAX32
bool "Analog Devices MAX32 MCUs pin controller driver"
default y
depends on DT_HAS_ADI_MAX32_PINCTRL_ENABLED
help
Pin controller driver support for max32 SoC series
``` | /content/code_sandbox/drivers/pinctrl/Kconfig.max32 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 51 |
```unknown
config PINCTRL_NRF
bool "nRF pin controller driver"
default y
depends on DT_HAS_NORDIC_NRF_PINCTRL_ENABLED
select PINCTRL_STORE_REG
help
nRF pin controller driver
``` | /content/code_sandbox/drivers/pinctrl/Kconfig.nrf | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 48 |
```unknown
config PINCTRL_ESP32
bool "ESP32 pin controller"
default y
depends on DT_HAS_ESPRESSIF_ESP32_PINCTRL_ENABLED
help
Enables ESP32 pin controller
``` | /content/code_sandbox/drivers/pinctrl/Kconfig.esp32 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 43 |
```c
/*
*
*/
#define DT_DRV_COMPAT nxp_kinetis_pinmux
#include <zephyr/drivers/clock_control.h>
#include <zephyr/drivers/pinctrl.h>
#include <zephyr/logging/log.h>
#include <fsl_clock.h>
LOG_MODULE_REGISTER(pinctrl_kinetis, CONFIG_PINCTRL_LOG_LEVEL);
/* Port register addresses. */
static PORT_Type *ports[] = {
... | /content/code_sandbox/drivers/pinctrl/pinctrl_kinetis.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 827 |
```c
/*
*
*/
/* Include esp-idf headers first to avoid redefining BIT() macro */
#include <hal/gpio_ll.h>
#include <hal/rtc_io_hal.h>
#include <soc.h>
#include <zephyr/drivers/pinctrl.h>
#include <zephyr/drivers/pinctrl/pinctrl_esp32_common.h>
#ifdef CONFIG_SOC_SERIES_ESP32C2
#define out out.val
#define in in.val
... | /content/code_sandbox/drivers/pinctrl/pinctrl_esp32.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,248 |
```c
/*
*
*/
#include <zephyr/init.h>
#include <zephyr/drivers/clock_control/stm32_clock_control.h>
#include <zephyr/drivers/pinctrl.h>
#include <gpio/gpio_stm32.h>
#include <stm32_ll_bus.h>
#include <stm32_ll_gpio.h>
#include <stm32_ll_system.h>
/** Helper to extract IO port number from STM32PIN() encoded value *... | /content/code_sandbox/drivers/pinctrl/pinctrl_stm32.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,707 |
```c
/*
*
*/
#define DT_DRV_COMPAT ti_k3_pinctrl
#include <zephyr/arch/cpu.h>
#include <zephyr/drivers/pinctrl.h>
#define PINCTRL_NODE DT_NODELABEL(pinctrl)
static struct pinctrl_ti_k3_dev_data {
DEVICE_MMIO_RAM;
} pinctrl_ti_k3_dev;
static struct pinctrl_ti_k3_cfg_data {
DEVICE_MMIO_ROM;
} pinctrl_ti_k3_cfg =... | /content/code_sandbox/drivers/pinctrl/pinctrl_ti_k3.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 303 |
```unknown
config PINCTRL_SIFIVE
bool "SiFive Freedom SoC pinmux driver"
default y
depends on DT_HAS_SIFIVE_PINCTRL_ENABLED
help
Enable driver for the SiFive Freedom SoC pinctrl driver
``` | /content/code_sandbox/drivers/pinctrl/Kconfig.sifive | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 52 |
```unknown
config PINCTRL_MCI_IO_MUX
bool "NXP MCI IO MUX Pinctrl Driver"
default y
depends on DT_HAS_NXP_MCI_IO_MUX_ENABLED
help
Enable pin controller driver for NXP MCI_IO_MUX
``` | /content/code_sandbox/drivers/pinctrl/Kconfig.mci_io_mux | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 55 |
```unknown
# Nuvoton NuMaker Pin Controller configuration options
config PINCTRL_NUMAKER
bool "Nuvoton NuMaker pin controller driver"
default y
depends on DT_HAS_NUVOTON_NUMAKER_PINCTRL_ENABLED
help
This option enables the pin controller driver for Nuvoton NuMaker MCUs.
``` | /content/code_sandbox/drivers/pinctrl/Kconfig.numaker | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 66 |
```unknown
config PINCTRL_TI_K3
bool "TI K3 pinctrl driver"
default y
depends on DT_HAS_TI_K3_PINCTRL_ENABLED
help
Enable the TI K3 pinctrl driver
``` | /content/code_sandbox/drivers/pinctrl/Kconfig.ti_k3 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 47 |
```unknown
config PINCTRL_ITE_IT8XXX2
bool "ITE IT8XXX2 pin controller driver"
default y
depends on DT_HAS_ITE_IT8XXX2_PINCTRL_FUNC_ENABLED
help
Enable IT8XXX2 pin controller driver.
``` | /content/code_sandbox/drivers/pinctrl/Kconfig.it8xxx2 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 54 |
```unknown
config PINCTRL_NUMICRO
bool "Pin controller driver for Nuvoton NuMicro MCUs"
default y
depends on DT_HAS_NUVOTON_NUMICRO_PINCTRL_ENABLED
help
Enable pin controller driver for Nuvoton NuMicro MCUs
``` | /content/code_sandbox/drivers/pinctrl/Kconfig.numicro | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 58 |
```c
/*
*
*/
#define DT_DRV_COMPAT nuvoton_numaker_pinctrl
#include <zephyr/drivers/pinctrl.h>
#include <NuMicro.h>
/* Get mfp_base, it should be == (&SYS->GPA_MFP0) */
#define MFP_BASE DT_INST_REG_ADDR_BY_NAME(0, mfp)
#define MFOS_BASE DT_INST_REG_ADDR_BY_NAME(0, mfos)
#define GPA_BASE DT_REG_ADDR(DT_NODE... | /content/code_sandbox/drivers/pinctrl/pinctrl_numaker.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 735 |
```c
/*
*
*/
#include <zephyr/drivers/pinctrl.h>
#include <zephyr/drivers/clock_control/atmel_sam_pmc.h>
#include <soc_gpio.h>
/** Utility macro that expands to the GPIO port address if it exists */
#define SAM_PORT_ADDR_OR_NONE(nodelabel) \
IF_ENABLED(DT_NODE_EXISTS(DT_NODELABEL(nodelabel)), \
(DT_REG_... | /content/code_sandbox/drivers/pinctrl/pinctrl_sam.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 678 |
```c
/*
*
*/
#include <zephyr/drivers/pinctrl.h>
#include <svc/pad/pad_api.h>
#include <main/ipc.h>
int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins,
uint8_t pin_cnt, uintptr_t reg)
{
sc_ipc_t ipc_handle;
int ret, i;
ret = sc_ipc_open(&ipc_handle, DT_REG_ADDR(DT_NODELABEL(scu_mu)));
if (ret != SC... | /content/code_sandbox/drivers/pinctrl/pinctrl_imx_scu.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 267 |
```unknown
config PINCTRL_XLNX_ZYNQ
bool "Xilinx Zynq 7000 processor system MIO pin controller driver"
default y
depends on DT_HAS_XLNX_PINCTRL_ZYNQ_ENABLED
depends on SYSCON
help
Enable the Xilinx Zynq 7000 processor system MIO pin controller driver.
``` | /content/code_sandbox/drivers/pinctrl/Kconfig.xlnx | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 76 |
```unknown
config PINCTRL_QUICKLOGIC_EOS_S3
bool "QuickLogic EOS S3 SoC pinctrl driver"
default y
depends on DT_HAS_QUICKLOGIC_EOS_S3_PINCTRL_ENABLED
help
Enable driver for the QuickLogic EOS S3 SoC pinctrl driver
``` | /content/code_sandbox/drivers/pinctrl/Kconfig.eos_s3 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 67 |
```c
/*
*
*/
#include <zephyr/drivers/clock_control.h>
#include <zephyr/drivers/clock_control/gd32.h>
#include <zephyr/drivers/pinctrl.h>
#include <gd32_gpio.h>
BUILD_ASSERT((GD32_PUPD_NONE == GPIO_PUPD_NONE) &&
(GD32_PUPD_PULLUP == GPIO_PUPD_PULLUP) &&
(GD32_PUPD_PULLDOWN == GPIO_PUPD_PULLDOWN),
... | /content/code_sandbox/drivers/pinctrl/pinctrl_gd32_af.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,014 |
```c
/*
*
*/
#include <zephyr/kernel.h>
#include <zephyr/drivers/pinctrl.h>
/* SIUL2 Multiplexed Signal Configuration Register */
#define SIUL2_MSCR(n) (0x240 + 0x4 * (n))
/* SIUL2 Input Multiplexed Signal Configuration Register */
#define SIUL2_IMCR(n) (0xa40 + 0x4 * (n))
#define SIUL2_MSCR_MAX_IDX 512U
#define S... | /content/code_sandbox/drivers/pinctrl/pinctrl_nxp_s32.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 585 |
```c
/*
*
*/
#include <zephyr/drivers/pinctrl.h>
/* ambiq-sdk includes */
#include <am_mcu_apollo.h>
static void pinctrl_configure_pin(const pinctrl_soc_pin_t *pin)
{
am_hal_gpio_pincfg_t pin_config = {0};
#if defined(CONFIG_SOC_SERIES_APOLLO3X)
pin_config.uFuncSel = pin->alt_func;
pin_config.eGPInput =
pin-... | /content/code_sandbox/drivers/pinctrl/pinctrl_ambiq.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 680 |
```c
/*
*
*/
#define DT_DRV_COMPAT ene_kb1200_pinctrl
#include <zephyr/devicetree.h>
#include <zephyr/drivers/pinctrl.h>
#include <zephyr/sys/util_macro.h>
#include <zephyr/dt-bindings/pinctrl/ene-kb1200-pinctrl.h>
#include <zephyr/sys/util.h>
#include <reg/gcfg.h>
#include <reg/gpio.h>
/*
* PINMUX_FUNC_A : GPIO... | /content/code_sandbox/drivers/pinctrl/pinctrl_ene_kb1200.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,764 |
```c
/*
*
*/
#include <zephyr/drivers/pinctrl.h>
#include <soc_gpio.h>
int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uintptr_t reg)
{
USART_TypeDef *base = (USART_TypeDef *)reg;
uint8_t loc;
#ifdef CONFIG_SOC_FAMILY_SILABS_S1
LEUART_TypeDef *lebase = (LEUART_TypeDef *)reg;
#else
#i... | /content/code_sandbox/drivers/pinctrl/pinctrl_gecko.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 3,515 |
```c
/*
*
*/
#include <zephyr/drivers/pinctrl.h>
#include <zephyr/init.h>
#if !defined(CONFIG_SOC_SERIES_LPC11U6X)
#include <fsl_clock.h>
#endif
#define OFFSET(mux) (((mux) & 0xFFF00000) >> 20)
#define TYPE(mux) (((mux) & 0xC0000) >> 18)
#define IOCON_TYPE_D 0x0
#define IOCON_TYPE_I 0x1
#define IOCON_TYPE_A 0x2
... | /content/code_sandbox/drivers/pinctrl/pinctrl_lpc_iocon.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 468 |
```unknown
config PINCTRL_GD32_AF
bool "GD32 AF pin controller driver"
default y
depends on DT_HAS_GD_GD32_PINCTRL_AF_ENABLED
help
GD32 AF pin controller driver. This driver is used by series using the
AF pin multiplexing model.
config PINCTRL_GD32_AFIO
bool "GD32 AFIO pin controller driver"
default y
de... | /content/code_sandbox/drivers/pinctrl/Kconfig.gd32 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 131 |
```unknown
config PINCTRL_RV32M1
bool "RV32M1 pin controller driver"
default y
depends on DT_HAS_OPENISA_RV32M1_PINMUX_ENABLED
help
Enable the RV32M1 pin controller driver.
config PINCTRL_RV32M1_INIT_PRIORITY
int "RV32M1 initialization priority"
default 35
depends on PINCTRL_RV32M1
help
RV32M1 pin contr... | /content/code_sandbox/drivers/pinctrl/Kconfig.rv32m1 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 100 |
```c
/*
*
*/
#define DT_DRV_COMPAT nuvoton_numicro_pinctrl
#include <stdint.h>
#include <zephyr/devicetree.h>
#include <zephyr/drivers/pinctrl.h>
#include <zephyr/dt-bindings/pinctrl/numicro-pinctrl.h>
#include <NuMicro.h>
#define MODE_PIN_SHIFT(pin) ((pin) * 2)
#define MODE_MASK(pin) (3 << MODE_PIN_SHIFT(pin))
#... | /content/code_sandbox/drivers/pinctrl/pinctrl_numicro.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,103 |
```unknown
config PINCTRL_MCHP_XEC
bool "Pin controller driver for MCHP XEC MCUs"
default y
depends on DT_HAS_MICROCHIP_XEC_PINCTRL_ENABLED
help
Enable pin controller driver for Microchip XEC MCUs
``` | /content/code_sandbox/drivers/pinctrl/Kconfig.xec | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 57 |
```c
/*
*
*/
#include <zephyr/drivers/pinctrl.h>
#include <soc_port.h>
/** Utility macro that expands to the PORT port address if it exists */
#define SAM_PORT_ADDR_OR_NONE(nodelabel) \
IF_ENABLED(DT_NODE_EXISTS(DT_NODELABEL(nodelabel)), \
(DT_REG_ADDR(DT_NODELABEL(nodelabel)),))
/** SAM0 port addresse... | /content/code_sandbox/drivers/pinctrl/pinctrl_sam0.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 394 |
```unknown
# NPCX Pin Controller configuration options
config PINCTRL_NPCX
bool "Nuvoton NPCX embedded controller (EC) pin controller driver"
default y
depends on DT_HAS_NUVOTON_NPCX_PINCTRL_ENABLED
help
This option enables the pin controller driver for NPCX family of
processors.
``` | /content/code_sandbox/drivers/pinctrl/Kconfig.npcx | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 68 |
```unknown
config PINCTRL_EMSDP
bool "EMSDP pinmux driver"
default y
depends on DT_HAS_SNPS_EMSDP_PINCTRL_ENABLED
help
Enable driver for the synopsys ARC EMSDP pinctrl driver
``` | /content/code_sandbox/drivers/pinctrl/Kconfig.emsdp | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 53 |
```c
/*
*
*/
#define DT_DRV_COMPAT infineon_xmc4xxx_pinctrl
#include <zephyr/devicetree.h>
#include <zephyr/drivers/pinctrl.h>
#include <zephyr/dt-bindings/pinctrl/xmc4xxx-pinctrl.h>
#include <xmc_gpio.h>
#define GPIO_REG_SIZE 0x100
static int pinctrl_configure_pin(const pinctrl_soc_pin_t pinmux)
{
int port_id,... | /content/code_sandbox/drivers/pinctrl/pinctrl_xmc4xxx.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 654 |
```unknown
config PINCTRL_XLNX_ZYNQMP
bool "Xilinx ZynqMP pin controller driver"
default y
depends on DT_HAS_XLNX_PINCTRL_ZYNQMP_ENABLED
help
Enable the Xilinx ZynqMP processor system MIO pin controller driver.
``` | /content/code_sandbox/drivers/pinctrl/Kconfig.zynqmp | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 63 |
```c
/*
*
*/
#define DT_DRV_COMPAT ite_it8xxx2_pinctrl_func
#include <zephyr/drivers/gpio.h>
#include <zephyr/drivers/pinctrl.h>
#include <zephyr/logging/log.h>
#include <chip_chipregs.h>
LOG_MODULE_REGISTER(pinctrl_ite_it8xxx2, LOG_LEVEL_ERR);
#define GPIO_IT8XXX2_REG_BASE \
((struct gpio_it8xxx2_regs *)DT_REG... | /content/code_sandbox/drivers/pinctrl/pinctrl_ite_it8xxx2.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 4,237 |
```c
/*
*
*/
#include <zephyr/drivers/pinctrl.h>
#include <hal/nrf_gpio.h>
BUILD_ASSERT(((NRF_PULL_NONE == NRF_GPIO_PIN_NOPULL) &&
(NRF_PULL_DOWN == NRF_GPIO_PIN_PULLDOWN) &&
(NRF_PULL_UP == NRF_GPIO_PIN_PULLUP)),
"nRF pinctrl pull settings do not match HAL values");
#if defined(GPIO_PIN_CNF_... | /content/code_sandbox/drivers/pinctrl/pinctrl_nrf.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 3,540 |
```c
/*
*
*/
#include <zephyr/arch/cpu.h>
#include <zephyr/init.h>
#include <zephyr/drivers/pinctrl.h>
int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt,
uintptr_t reg)
{
/* configure all pins */
for (uint8_t i = 0U; i < pin_cnt; i++) {
uint32_t mux_register = pins[i].pinmux.mux_re... | /content/code_sandbox/drivers/pinctrl/pinctrl_imx.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 980 |
```c
/*
*
*/
#include <zephyr/drivers/pinctrl.h>
int pinctrl_lookup_state(const struct pinctrl_dev_config *config, uint8_t id,
const struct pinctrl_state **state)
{
*state = &config->states[0];
while (*state < &config->states[config->state_cnt]) {
if (id == (*state)->id) {
return 0;
}
(*state)++;
}... | /content/code_sandbox/drivers/pinctrl/common.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 302 |
```c
/*
*
*/
#include <zephyr/init.h>
#include <zephyr/drivers/clock_control.h>
#include <zephyr/drivers/clock_control/gd32.h>
#include <zephyr/drivers/pinctrl.h>
#include <gd32_gpio.h>
/** AFIO DT node */
#define AFIO_NODE DT_NODELABEL(afio)
/** GPIO mode: input floating (CTL bits) */
#define GPIO_MODE_INP_FLOAT... | /content/code_sandbox/drivers/pinctrl/pinctrl_gd32_afio.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,610 |
```c
/*
*
*/
#define DT_DRV_COMPAT microchip_xec_pinctrl
#include <zephyr/drivers/pinctrl.h>
#include <soc.h>
/*
* Microchip XEC: each GPIO pin has two 32-bit control register.
* The first 32-bit register contains all pin features except
* slew rate and driver strength in the second control register.
* We comp... | /content/code_sandbox/drivers/pinctrl/pinctrl_mchp_xec.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,708 |
```unknown
config PINCTRL_IMX
bool "Pin controller driver for iMX MCUs"
depends on DT_HAS_NXP_IMX_IOMUXC_ENABLED
depends on HAS_MCUX_IOMUXC || HAS_IMX_IOMUXC
default y
help
Enable pin controller driver for NXP iMX series MCUs
config PINCTRL_IMX_SCU
bool "Pin controller driver for SCU-based i.MX SoCs"
depend... | /content/code_sandbox/drivers/pinctrl/Kconfig.imx | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 178 |
```unknown
menuconfig PINCTRL
bool "Pin controller drivers"
if PINCTRL
module = PINCTRL
module-str = PINCTRL
source "subsys/logging/Kconfig.template.log_config"
config PINCTRL_STORE_REG
bool
help
This option must be selected by drivers that require access to the device
register address. This can happen, fo... | /content/code_sandbox/drivers/pinctrl/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 627 |
```c
/*
*
*/
#include <zephyr/device.h>
#include <zephyr/drivers/syscon.h>
#include <zephyr/drivers/pinctrl.h>
#include <zephyr/kernel.h>
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(pinctrl_xlnx_zynq, CONFIG_PINCTRL_LOG_LEVEL);
#define DT_DRV_COMPAT xlnx_pinctrl_zynq
BUILD_ASSERT(DT_NUM_INST_STATUS_OKAY(D... | /content/code_sandbox/drivers/pinctrl/pinctrl_xlnx_zynq.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 613 |
```c
/*
*
*/
#include "analog.h"
#include <zephyr/drivers/pinctrl.h>
#include <zephyr/dt-bindings/pinctrl/b91-pinctrl.h>
#include <zephyr/init.h>
#define DT_DRV_COMPAT telink_b91_pinctrl
/**
* GPIO Function Enable Register
* ADDR PINS
* gpio_en: PORT_A[0-7]
* gpio_e... | /content/code_sandbox/drivers/pinctrl/pinctrl_b91.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,562 |
```c
/*
*
*/
#include <assert.h>
#include <zephyr/drivers/pinctrl.h>
#include <soc.h>
/* Driver config */
struct npcx_pinctrl_config {
/* Device base address used for pinctrl driver */
uintptr_t base_scfg;
uintptr_t base_glue;
};
static const struct npcx_pinctrl_config npcx_pinctrl_cfg = {
.base_scfg = NPCX_SCF... | /content/code_sandbox/drivers/pinctrl/pinctrl_npcx.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,590 |
```c
/*
*/
#define DT_DRV_COMPAT ti_cc32xx_pinctrl
#include <zephyr/arch/cpu.h>
#include <zephyr/devicetree.h>
#include <zephyr/drivers/pinctrl.h>
#include <zephyr/dt-bindings/pinctrl/ti-cc32xx-pinctrl.h>
#define MEM_GPIO_PAD_CONFIG_MSK 0xFFFU
/* pin to pad mapping (255 indicates invalid pin) */
static const uint8... | /content/code_sandbox/drivers/pinctrl/pinctrl_ti_cc32xx.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 596 |
```c
/*
*
*/
#include <zephyr/drivers/pinctrl.h>
#include <soc.h>
static MCI_IO_MUX_Type *mci_iomux =
(MCI_IO_MUX_Type *)DT_REG_ADDR(DT_NODELABEL(pinctrl));
static SOCCIU_Type *soc_ctrl =
(SOCCIU_Type *)DT_REG_ADDR(DT_NODELABEL(soc_ctrl));
static AON_SOC_CIU_Type *aon_soc_ciu =
(AON_SOC_CIU_Type *)DT_REG_ADDR(D... | /content/code_sandbox/drivers/pinctrl/pinctrl_mci_io_mux.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,777 |
```c
/*
*
*/
#include <zephyr/dt-bindings/pinctrl/pinctrl-zynqmp.h>
#include <zephyr/logging/log.h>
#include "pinctrl_soc.h"
LOG_MODULE_REGISTER(pinctrl_xlnx_zynqmp, CONFIG_PINCTRL_LOG_LEVEL);
#define DT_DRV_COMPAT xlnx_pinctrl_zynqmp
static mm_reg_t base = DT_INST_REG_ADDR(0);
static uint8_t mio_pin_offset = 0x0... | /content/code_sandbox/drivers/pinctrl/pinctrl_xlnx_zynqmp.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 234 |
```unknown
# Infineon CAT1 Pin controller configuration options
# an affiliate of Cypress Semiconductor Corporation
config PINCTRL_INFINEON_CAT1
bool "Pin controller driver for Infineon CAT1 MCUs"
default y
depends on DT_HAS_INFINEON_CAT1_PINCTRL_ENABLED
help
Enable Pin controller driver for Infineon CAT1 MCUs... | /content/code_sandbox/drivers/pinctrl/Kconfig.ifx_cat1 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 76 |
```c
/*
*
*/
#define DT_DRV_COMPAT snps_emsdp_pinctrl
#include <zephyr/arch/cpu.h>
#include <zephyr/devicetree.h>
#include <zephyr/drivers/pinctrl.h>
#include <zephyr/dt-bindings/pinctrl/emsdp-pinctrl.h>
/**
* Mux Control Register Index
*/
#define PMOD_MUX_CTRL 0 /*!< 32-bits, offset 0x0 */
#define ARDUINO_MUX_C... | /content/code_sandbox/drivers/pinctrl/pinctrl_emsdp.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,569 |
```unknown
config PINCTRL_XMC4XXX
bool "XMC4XXX pin controller driver"
default y
depends on DT_HAS_INFINEON_XMC4XXX_PINCTRL_ENABLED
help
Enables XMC4XXX pin controller driver.
``` | /content/code_sandbox/drivers/pinctrl/Kconfig.xmc4xxx | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 51 |
```unknown
config PINCTRL_ENE_KB1200
bool "ENE KB1200 Pin controller driver"
default y
depends on DT_HAS_ENE_KB1200_PINCTRL_ENABLED
help
Enable pin controller driver for ENE KB1200 MCUs
``` | /content/code_sandbox/drivers/pinctrl/Kconfig.ene | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 56 |
```unknown
config PINCTRL_SAM0
bool "Atmel SAM0 pin controller driver"
default y
depends on DT_HAS_ATMEL_SAM0_PINCTRL_ENABLED
help
Atmel pin controller driver is used on SAM0 SoC series
``` | /content/code_sandbox/drivers/pinctrl/Kconfig.sam0 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 54 |
```unknown
config PINCTRL_TELINK_B91
bool "Telink B91 pin controller driver"
default y
depends on DT_HAS_TELINK_B91_PINCTRL_ENABLED
help
Enables Telink B91 pin controller driver
``` | /content/code_sandbox/drivers/pinctrl/Kconfig.b91 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 50 |
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