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9
163k
functions
void do_flush(struct intelfb_info *dinfo) { START_RING(2); OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE); OUT_RING(MI_NOOP); ADVANCE_RING(); }
functions
void intelfbhw_do_sync(struct intelfb_info *dinfo) { #if VERBOSE > 0 DBG_MSG("intelfbhw_do_sync\n"); #endif if (!dinfo->accel) return; /* * Send a flush, then wait until the ring is empty. This is what * the XFree86 driver does, and actually it doesn't seem a lot worse * than the recommended m...
functions
void refresh_ring(struct intelfb_info *dinfo) { #if VERBOSE > 0 DBG_MSG("refresh_ring\n"); #endif dinfo->ring_head = INREG(PRI_RING_HEAD) & RING_HEAD_MASK; dinfo->ring_tail = INREG(PRI_RING_TAIL) & RING_TAIL_MASK; dinfo->ring_space = get_ring_space(dinfo); }
functions
void reset_state(struct intelfb_info *dinfo) { int i; u32 tmp; #if VERBOSE > 0 DBG_MSG("reset_state\n"); #endif for (i = 0; i < FENCE_NUM; i++) OUTREG(FENCE + (i << 2), 0); /* Flush the ring buffer if it's enabled. */ tmp = INREG(PRI_RING_LENGTH); if (tmp & RING_ENABLE) { #if VERBOSE > 0 D...
functions
void intelfbhw_2d_stop(struct intelfb_info *dinfo) { #if VERBOSE > 0 DBG_MSG("intelfbhw_2d_stop: accel: %d, ring_active: %d\n", dinfo->accel, dinfo->ring_active); #endif if (!dinfo->accel) return; dinfo->ring_active = 0; reset_state(dinfo); }
functions
void intelfbhw_2d_start(struct intelfb_info *dinfo) { #if VERBOSE > 0 DBG_MSG("intelfbhw_2d_start: accel: %d, ring_active: %d\n", dinfo->accel, dinfo->ring_active); #endif if (!dinfo->accel) return; /* Initialise the primary ring buffer. */ OUTREG(PRI_RING_LENGTH, 0); OUTREG(PRI_RING_TAIL, 0); ...
functions
void intelfbhw_do_fillrect(struct intelfb_info *dinfo, u32 x, u32 y, u32 w, u32 h, u32 color, u32 pitch, u32 bpp, u32 rop) { u32 br00, br09, br13, br14, br16; #if VERBOSE > 0 DBG_MSG("intelfbhw_do_fillrect: (%d,%d) %dx%d, c 0x%06x, p %d bpp %d, " "rop 0x%02x\n", x, y, w, h, color, pitch, bpp, rop); #...
functions
void intelfbhw_do_bitblt(struct intelfb_info *dinfo, u32 curx, u32 cury, u32 dstx, u32 dsty, u32 w, u32 h, u32 pitch, u32 bpp) { u32 br00, br09, br11, br12, br13, br22, br23, br26; #if VERBOSE > 0 DBG_MSG("intelfbhw_do_bitblt: (%d,%d)->(%d,%d) %dx%d, p %d bpp %d\n", curx, cury, dstx, dsty, w, h, pitc...
functions
int intelfbhw_do_drawglyph(struct intelfb_info *dinfo, u32 fg, u32 bg, u32 w, u32 h, const u8* cdat, u32 x, u32 y, u32 pitch, u32 bpp) { int nbytes, ndwords, pad, tmp; u32 br00, br09, br13, br18, br19, br22, br23; int dat, ix, iy, iw; int i, j; #if VERBOSE > 0 DBG_MSG("intelfbhw_do_drawglyph...
functions
void intelfbhw_cursor_init(struct intelfb_info *dinfo) { u32 tmp; #if VERBOSE > 0 DBG_MSG("intelfbhw_cursor_init\n"); #endif if (dinfo->mobile || IS_I9XX(dinfo)) { if (!dinfo->cursor.physical) return; tmp = INREG(CURSOR_A_CONTROL); tmp &= ~(CURSOR_MODE_MASK | CURSOR_MOBILE_GAMMA_ENABLE | ...
functions
void intelfbhw_cursor_hide(struct intelfb_info *dinfo) { u32 tmp; #if VERBOSE > 0 DBG_MSG("intelfbhw_cursor_hide\n"); #endif dinfo->cursor_on = 0; if (dinfo->mobile || IS_I9XX(dinfo)) { if (!dinfo->cursor.physical) return; tmp = INREG(CURSOR_A_CONTROL); tmp &= ~CURSOR_MODE_MASK; tmp |= CU...
functions
void intelfbhw_cursor_show(struct intelfb_info *dinfo) { u32 tmp; #if VERBOSE > 0 DBG_MSG("intelfbhw_cursor_show\n"); #endif dinfo->cursor_on = 1; if (dinfo->cursor_blanked) return; if (dinfo->mobile || IS_I9XX(dinfo)) { if (!dinfo->cursor.physical) return; tmp = INREG(CURSOR_A_CONTROL...
functions
void intelfbhw_cursor_setpos(struct intelfb_info *dinfo, int x, int y) { u32 tmp; #if VERBOSE > 0 DBG_MSG("intelfbhw_cursor_setpos: (%d, %d)\n", x, y); #endif /* * Sets the position. The coordinates are assumed to already * have any offset adjusted. Assume that the cursor is never * completely off...
functions
void intelfbhw_cursor_setcolor(struct intelfb_info *dinfo, u32 bg, u32 fg) { #if VERBOSE > 0 DBG_MSG("intelfbhw_cursor_setcolor\n"); #endif OUTREG(CURSOR_A_PALETTE0, bg & CURSOR_PALETTE_MASK); OUTREG(CURSOR_A_PALETTE1, fg & CURSOR_PALETTE_MASK); OUTREG(CURSOR_A_PALETTE2, fg & CURSOR_PALETTE_MASK); OUTREG...
functions
void intelfbhw_cursor_load(struct intelfb_info *dinfo, int width, int height, u8 *data) { u8 __iomem *addr = (u8 __iomem *)dinfo->cursor.virtual; int i, j, w = width / 8; int mod = width % 8, t_mask, d_mask; #if VERBOSE > 0 DBG_MSG("intelfbhw_cursor_load\n"); #endif if (!dinfo->cursor.virtual) ...
functions
void intelfbhw_cursor_reset(struct intelfb_info *dinfo) { u8 __iomem *addr = (u8 __iomem *)dinfo->cursor.virtual; int i, j; #if VERBOSE > 0 DBG_MSG("intelfbhw_cursor_reset\n"); #endif if (!dinfo->cursor.virtual) return; for (i = 64; i--; ) { for (j = 0; j < 8; j++) { writeb(0xff, addr + j+0...
functions
irqreturn_t intelfbhw_irq(int irq, void *dev_id) { u16 tmp; struct intelfb_info *dinfo = dev_id; spin_lock(&dinfo->int_lock); tmp = INREG16(IIR); if (dinfo->info->var.vmode & FB_VMODE_INTERLACED) tmp &= PIPE_A_EVENT_INTERRUPT; else tmp &= VSYNC_PIPE_A_INTERRUPT; /* non-interlaced */ if (tmp =...
functions
int intelfbhw_enable_irq(struct intelfb_info *dinfo) { u16 tmp; if (!test_and_set_bit(0, &dinfo->irq_flags)) { if (request_irq(dinfo->pdev->irq, intelfbhw_irq, IRQF_SHARED, "intelfb", dinfo)) { clear_bit(0, &dinfo->irq_flags); return -EINVAL; }
functions
void intelfbhw_disable_irq(struct intelfb_info *dinfo) { if (test_and_clear_bit(0, &dinfo->irq_flags)) { if (dinfo->vsync.pan_display) { dinfo->vsync.pan_display = 0; OUTREG(DSPABASE, dinfo->vsync.pan_offset); }
functions
int intelfbhw_wait_for_vsync(struct intelfb_info *dinfo, u32 pipe) { struct intelfb_vsync *vsync; unsigned int count; int ret; switch (pipe) { case 0: vsync = &dinfo->vsync; break; default: return -ENODEV; }
includes
#include <linux/bug.h>
includes
#include <linux/kernel.h>
includes
#include <linux/mm.h>
includes
#include <linux/bootmem.h>
includes
#include <linux/export.h>
includes
#include <linux/init.h>
includes
#include <linux/types.h>
includes
#include <linux/pci.h>
includes
#include <linux/of_address.h>
includes
#include <asm/cpu-info.h>
functions
resource_size_t pcibios_align_resource(void *data, const struct resource *res, resource_size_t size, resource_size_t align) { struct pci_dev *dev = data; struct pci_controller *hose = dev->sysdata; resource_size_t start = res->start; if (res->flags & IORESOURCE_IO) { /* Make sure we start at our min on ...
functions
else if (res->flags & IORESOURCE_MEM) { /* Make sure we start at our min on all hoses */ if (start < PCIBIOS_MIN_MEM + hose->mem_resource->start) start = PCIBIOS_MIN_MEM + hose->mem_resource->start; }
functions
void pcibios_scanbus(struct pci_controller *hose) { static int next_busno; static int need_domain_info; LIST_HEAD(resources); struct pci_bus *bus; if (!hose->iommu) PCI_DMA_BUS_IS_PHYS = 1; if (hose->get_busno && pci_has_flag(PCI_PROBE_ONLY)) next_busno = (*hose->get_busno)(); pci_add_resource_offset(&res...
functions
void pci_load_of_ranges(struct pci_controller *hose, struct device_node *node) { const __be32 *ranges; int rlen; int pna = of_n_addr_cells(node); int np = pna + 5; pr_info("PCI host bridge %s ranges:\n", node->full_name); ranges = of_get_property(node, "ranges", &rlen); if (ranges == NULL) return; hose->of_n...
functions
void register_pci_controller(struct pci_controller *hose) { struct resource *parent; parent = hose->mem_resource->parent; if (!parent) parent = &iomem_resource; if (request_resource(parent, hose->mem_resource) < 0) goto out; parent = hose->io_resource->parent; if (!parent) parent = &ioport_resource; i...
functions
__init pcibios_set_cache_line_size(void) { struct cpuinfo_mips *c = &current_cpu_data; unsigned int lsize; /* * Set PCI cacheline size to that of the highest level in the * cache hierarchy. */ lsize = c->dcache.linesz; lsize = c->scache.linesz ? : lsize; lsize = c->tcache.linesz ? : lsize; BUG_ON(!lsize)...
functions
__init pcibios_init(void) { struct pci_controller *hose; pcibios_set_cache_line_size(); /* Scan all of the recorded PCI controllers. */ for (hose = hose_head; hose; hose = hose->next) pcibios_scanbus(hose); pci_fixup_irqs(pci_common_swizzle, pcibios_map_irq); pci_initialized = 1; return 0; }
functions
int pcibios_enable_resources(struct pci_dev *dev, int mask) { u16 cmd, old_cmd; int idx; struct resource *r; pci_read_config_word(dev, PCI_COMMAND, &cmd); old_cmd = cmd; for (idx=0; idx < PCI_NUM_RESOURCES; idx++) { /* Only set up the requested stuff */ if (!(mask & (1<<idx))) continue; r = &dev->resou...
functions
int pcibios_assign_all_busses(void) { return 1; }
functions
int pcibios_enable_device(struct pci_dev *dev, int mask) { int err; if ((err = pcibios_enable_resources(dev, mask)) < 0) return err; return pcibios_plat_dev_init(dev); }
functions
void pcibios_fixup_bus(struct pci_bus *bus) { struct pci_dev *dev = bus->self; if (pci_has_flag(PCI_PROBE_ONLY) && dev && (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) { pci_read_bridge_bases(bus); }
functions
int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, enum pci_mmap_state mmap_state, int write_combine) { unsigned long prot; /* * I/O space can be accessed via normal processor loads and stores on * this platform but for now we elect not to do this and portable * drivers should not do t...
functions
__init pcibios_setup(char *str) { if (pcibios_plat_setup) return pcibios_plat_setup(str); return str; }
includes
#include <linux/module.h>
includes
#include <linux/fb.h>
includes
#include <linux/file.h>
includes
#include <linux/fs.h>
includes
#include <linux/list.h>
includes
#include <linux/debugfs.h>
includes
#include <linux/uaccess.h>
includes
#include <linux/interrupt.h>
includes
#include <linux/workqueue.h>
includes
#include <linux/dma-buf.h>
includes
#include <linux/vmalloc.h>
includes
#include <linux/pm_runtime.h>
includes
#include <linux/genlock.h>
includes
#include <linux/rbtree.h>
includes
#include <linux/ashmem.h>
includes
#include <linux/major.h>
includes
#include <linux/io.h>
includes
#include <mach/socinfo.h>
includes
#include <linux/mman.h>
includes
#include <linux/sort.h>
includes
#include <linux/security.h>
includes
#include <asm/cacheflush.h>
defines
#define MODULE_PARAM_PREFIX "kgsl."
defines
#define arch_mmap_check(addr, len, flags) (0)
defines
#define KGSL_DMA_BIT_MASK DMA_BIT_MASK(64)
defines
#define KGSL_DMA_BIT_MASK DMA_BIT_MASK(32)
defines
#define MEMFREE_ENTRIES 512
defines
#define KGSL_MAX_ALIGN (32 * SZ_1M)
defines
#define KGSL_IOCTL_FUNC(_cmd, _func) \
structs
struct kgsl_dma_buf_meta { struct dma_buf_attachment *attach; struct dma_buf *dmabuf; struct sg_table *table; };
structs
struct memfree_entry { unsigned long gpuaddr; unsigned long size; pid_t pid; unsigned int flags; };
structs
struct kgsl_cmdbatch_sync_event { int type; struct list_head node; struct kgsl_cmdbatch *cmdbatch; struct kgsl_context *context; unsigned int timestamp; struct kgsl_sync_fence_waiter *handle; struct kgsl_device *device; struct kref refcount; };
structs
struct kgsl_genlock_event_priv { struct genlock_handle *handle; struct genlock *lock; };
functions
void kgsl_trace_issueibcmds(struct kgsl_device *device, int id, struct kgsl_cmdbatch *cmdbatch, unsigned int numibs, unsigned int timestamp, unsigned int flags, int result, unsigned int type) { trace_kgsl_issueibcmds(device, id, cmdbatch, numibs, timestamp, flags, result, type); }
functions
void kgsl_trace_regwrite(struct kgsl_device *device, unsigned int offset, unsigned int value) { trace_kgsl_regwrite(device, offset, value); }
functions
int kgsl_memfree_init(void) { memfree.list = kzalloc(MEMFREE_ENTRIES * sizeof(struct memfree_entry), GFP_KERNEL); return (memfree.list) ? 0 : -ENOMEM; }
functions
void kgsl_memfree_exit(void) { kfree(memfree.list); memset(&memfree, 0, sizeof(memfree)); }
functions
int kgsl_memfree_find_entry(pid_t pid, unsigned long *gpuaddr, unsigned long *size, unsigned int *flags) { int ptr; if (memfree.list == NULL) return 0; spin_lock(&memfree_lock); ptr = memfree.head - 1; if (ptr < 0) ptr = MEMFREE_ENTRIES - 1; /* Walk backwards through the list looking for the last match ...
functions
void kgsl_memfree_add(pid_t pid, unsigned int gpuaddr, unsigned int size, int flags) { struct memfree_entry *entry; if (memfree.list == NULL) return; spin_lock(&memfree_lock); entry = &memfree.list[memfree.head]; entry->pid = pid; entry->gpuaddr = gpuaddr; entry->size = size; entry->flags = flags; me...
functions
__must_check kgsl_get_mem_entry(struct kgsl_device *device, phys_addr_t ptbase, unsigned int gpuaddr, unsigned int size) { struct kgsl_process_private *priv; struct kgsl_mem_entry *entry; mutex_lock(&kgsl_driver.process_mutex); list_for_each_entry(priv, &kgsl_driver.process_list, list) { if (!kgsl_mmu_pt_equal...
functions
void kgsl_destroy_ion(struct kgsl_dma_buf_meta *meta) { dma_buf_unmap_attachment(meta->attach, meta->table, DMA_FROM_DEVICE); dma_buf_detach(meta->dmabuf, meta->attach); dma_buf_put(meta->dmabuf); kfree(meta); }
functions
void kgsl_mem_entry_destroy(struct kref *kref) { struct kgsl_mem_entry *entry = container_of(kref, struct kgsl_mem_entry, refcount); /* Detach from process list */ kgsl_mem_entry_detach_process(entry); if (entry->memtype != KGSL_MEM_ENTRY_KERNEL) atomic_sub(entry->memdesc.size, &kgsl_driv...
functions
int kgsl_mem_entry_track_gpuaddr(struct kgsl_process_private *process, struct kgsl_mem_entry *entry) { int ret = 0; assert_spin_locked(&process->mem_lock); /* * If cpu=gpu map is used then caller needs to set the * gpu address */ if (kgsl_memdesc_use_cpu_map(&entry->memdesc)) { /* cpu map flag is enabl...
functions
void kgsl_mem_entry_untrack_gpuaddr(struct kgsl_process_private *process, struct kgsl_mem_entry *entry) { assert_spin_locked(&process->mem_lock); if (entry->memdesc.gpuaddr) { kgsl_mmu_put_gpuaddr(process->pagetable, &entry->memdesc); rb_erase(&entry->node, &entry->priv->mem_rb); }
functions
void kgsl_mem_entry_commit_mem_list(struct kgsl_process_private *process, struct kgsl_mem_entry *entry) { struct rb_node **node; struct rb_node *parent = NULL; if (!entry->memdesc.gpuaddr) return; /* Insert mem entry in mem_rb tree */ node = &process->mem_rb.rb_node; while (*node) { struct kgsl_mem_entr...
functions
void kgsl_mem_entry_commit_process(struct kgsl_process_private *process, struct kgsl_mem_entry *entry) { if (!entry) return; spin_lock(&entry->priv->mem_lock); /* Insert mem entry in mem_rb tree */ kgsl_mem_entry_commit_mem_list(process, entry); /* Replace mem entry in mem_idr using id */ idr_replace(&entr...
functions
int kgsl_mem_entry_attach_process(struct kgsl_mem_entry *entry, struct kgsl_device_private *dev_priv) { int ret; struct kgsl_process_private *process = dev_priv->process_priv; ret = kgsl_process_private_get(process); if (!ret) return -EBADF; while (1) { if (idr_pre_get(&process->mem_idr, GFP_KERNEL) =...
functions
void kgsl_mem_entry_detach_process(struct kgsl_mem_entry *entry) { if (entry == NULL) return; /* Unmap here so that below we can call kgsl_mmu_put_gpuaddr */ kgsl_mmu_unmap(entry->priv->pagetable, &entry->memdesc); spin_lock(&entry->priv->mem_lock); kgsl_mem_entry_untrack_gpuaddr(entry->priv, entry); if (ent...
functions
void kgsl_context_dump(struct kgsl_context *context) { struct kgsl_device *device; if (_kgsl_context_get(context) == 0) return; device = context->device; if (kgsl_context_detached(context)) { dev_err(device->dev, " context[%d]: context detached\n", context->id); }
functions
int kgsl_context_init(struct kgsl_device_private *dev_priv, struct kgsl_context *context) { int ret = 0, id; struct kgsl_device *device = dev_priv->device; while (1) { if (idr_pre_get(&device->context_idr, GFP_KERNEL) == 0) { KGSL_DRV_INFO(device, "idr_pre_get: ENOMEM\n"); ret = -ENOMEM; break; }
functions
int kgsl_context_detach(struct kgsl_context *context) { int ret; if (context == NULL) return -EINVAL; /* * Mark the context as detached to keep others from using * the context before it gets fully removed, and to make sure * we don't try to detach twice. */ if (test_and_set_bit(KGSL_CONTEXT_DETACHED, &c...
functions
void kgsl_context_destroy(struct kref *kref) { struct kgsl_context *context = container_of(kref, struct kgsl_context, refcount); struct kgsl_device *device = context->device; trace_kgsl_context_destroy(device, context); BUG_ON(!kgsl_context_detached(context)); write_lock(&device->context_lock); if (c...
functions
int kgsl_check_timestamp(struct kgsl_device *device, struct kgsl_context *context, unsigned int timestamp) { unsigned int ts_processed; ts_processed = kgsl_readtimestamp(device, context, KGSL_TIMESTAMP_RETIRED); return (timestamp_cmp(ts_processed, timestamp) >= 0); }
functions
int kgsl_suspend_device(struct kgsl_device *device, pm_message_t state) { int status = -EINVAL; if (!device) return -EINVAL; KGSL_PWR_WARN(device, "suspend start\n"); kgsl_mutex_lock(&device->mutex, &device->mutex_owner); kgsl_pwrctrl_request_state(device, KGSL_STATE_SUSPEND); /* Tell the device to drain th...
functions
int kgsl_resume_device(struct kgsl_device *device) { if (!device) return -EINVAL; KGSL_PWR_WARN(device, "resume start\n"); kgsl_mutex_lock(&device->mutex, &device->mutex_owner); if (device->state == KGSL_STATE_SUSPEND) { kgsl_pwrctrl_set_state(device, KGSL_STATE_SLUMBER); complete_all(&device->hwaccess_gate)...
functions
else if (device->state != KGSL_STATE_INIT) { /* * This is an error situation,so wait for the device * to idle and then put the device to SLUMBER state. * This will put the device to the right state when * we resume. */ if (device->state == KGSL_STATE_ACTIVE) device->ftbl->idle(device); kgsl_pwrc...
functions
int kgsl_suspend(struct device *dev) { pm_message_t arg = {0}