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8ebd31f7b46e6e9aef319d164e0cfdc5367fd0f9
700
asm
Assembly
oeis/267/A267599.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/267/A267599.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/267/A267599.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A267599: Binary representation of the n-th iteration of the "Rule 177" elementary cellular automaton starting with a single ON (black) cell. ; 1,1,1001,101001,10101001,1010101001,101010101001,10101010101001,1010101010101001,101010101010101001,10101010101010101001,1010101010101010101001,101010101010101010101001,10101010101010101010101001,1010101010101010101010101001,101010101010101010101010101001,10101010101010101010101010101001,1010101010101010101010101010101001,101010101010101010101010101010101001,10101010101010101010101010101010101001,1010101010101010101010101010101010101001,101010101010101010101010101010101010101001 mov $1,100 pow $1,$0 sub $1,11 div $1,99 mul $1,10 add $1,1 mov $0,$1
63.636364
485
0.878571
62428ae868f341b8f0d4ec0c97b7fff512edf9e3
638
asm
Assembly
oeis/213/A213772.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/213/A213772.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/213/A213772.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A213772: Principal diagonal of the convolution array A213771. ; 1,11,42,106,215,381,616,932,1341,1855,2486,3246,4147,5201,6420,7816,9401,11187,13186,15410,17871,20581,23552,26796,30325,34151,38286,42742,47531,52665,58156,64016,70257,76891,83930,91386,99271,107597,116376,125620,135341,145551,156262,167486,179235,191521,204356,217752,231721,246275,261426,277186,293567,310581,328240,346556,365541,385207,405566,426630,448411,470921,494172,518176,542945,568491,594826,621962,649911,678685,708296,738756,770077,802271,835350,869326,904211,940017,976756,1014440 mul $0,4 mov $1,$0 add $1,3 pow $1,3 add $1,$0 mov $0,$1 div $0,32 add $0,1
53.166667
496
0.796238
0e6f909c33cdf24eaa1928bcb704f0273e4ffad8
105
asm
Assembly
Find_Max/Find_Max/find_maxasm.asm
FMoller/Racing_the_Dragon
7972e8b17edfa29b83d12c1fe0de6205fee8b81f
[ "MIT" ]
null
null
null
Find_Max/Find_Max/find_maxasm.asm
FMoller/Racing_the_Dragon
7972e8b17edfa29b83d12c1fe0de6205fee8b81f
[ "MIT" ]
null
null
null
Find_Max/Find_Max/find_maxasm.asm
FMoller/Racing_the_Dragon
7972e8b17edfa29b83d12c1fe0de6205fee8b81f
[ "MIT" ]
null
null
null
.386 .model flat,c .code find_maxasm PROC push ebp mov ebp, esp pop ebp ret find_maxasm endp end
9.545455
16
0.714286
f2d358315d2c8119edb81766c279243db2062888
511
asm
Assembly
data/maps/objects/SeafoamIslandsB4F.asm
opiter09/ASM-Machina
75d8e457b3e82cc7a99b8e70ada643ab02863ada
[ "CC0-1.0" ]
1
2022-02-15T00:19:44.000Z
2022-02-15T00:19:44.000Z
data/maps/objects/SeafoamIslandsB4F.asm
opiter09/ASM-Machina
75d8e457b3e82cc7a99b8e70ada643ab02863ada
[ "CC0-1.0" ]
null
null
null
data/maps/objects/SeafoamIslandsB4F.asm
opiter09/ASM-Machina
75d8e457b3e82cc7a99b8e70ada643ab02863ada
[ "CC0-1.0" ]
null
null
null
SeafoamIslandsB4F_Object: db $7d ; border block def_warps warp 20, 17, 5, SEAFOAM_ISLANDS_B3F warp 21, 17, 6, SEAFOAM_ISLANDS_B3F warp 11, 7, 1, SEAFOAM_ISLANDS_B3F warp 25, 4, 2, SEAFOAM_ISLANDS_B3F def_signs sign 9, 15, 4 ; SeafoamIslands5Text4 sign 23, 1, 5 ; SeafoamIslands5Text5 def_objects object SPRITE_BOULDER, 4, 15, STAY, NONE, 1 ; person object SPRITE_BOULDER, 5, 15, STAY, NONE, 2 ; person object SPRITE_BIRD, 6, 1, STAY, DOWN, 3, ARTICUNO, 50 def_warps_to SEAFOAM_ISLANDS_B4F
25.55
54
0.741683
d54f3bc7f9bfdc640dc092b629a4d5bfe763e631
4,388
asm
Assembly
Transynther/x86/_processed/P/_zr_/i3-7100_9_0x84_notsx.log_2_1386.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
9
2020-08-13T19:41:58.000Z
2022-03-30T12:22:51.000Z
Transynther/x86/_processed/P/_zr_/i3-7100_9_0x84_notsx.log_2_1386.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
1
2021-04-29T06:29:35.000Z
2021-05-13T21:02:30.000Z
Transynther/x86/_processed/P/_zr_/i3-7100_9_0x84_notsx.log_2_1386.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
3
2020-07-14T17:07:07.000Z
2022-03-21T01:12:22.000Z
.global s_prepare_buffers s_prepare_buffers: push %r13 push %r14 push %r8 push %rax push %rcx push %rdi push %rdx push %rsi lea addresses_D_ht+0x19bb, %r14 nop nop sub %rax, %rax movb (%r14), %dl nop nop nop nop xor $44074, %r8 lea addresses_UC_ht+0x113b0, %rsi lea addresses_WT_ht+0x14e30, %rdi nop nop nop nop nop sub %r13, %r13 mov $15, %rcx rep movsl nop nop nop nop and %r13, %r13 lea addresses_normal_ht+0xcf30, %rsi lea addresses_WT_ht+0x31f6, %rdi nop nop inc %rdx mov $60, %rcx rep movsw nop nop sub $36418, %r13 lea addresses_WC_ht+0x13f30, %rsi clflush (%rsi) nop nop sub $45841, %rdx movl $0x61626364, (%rsi) nop nop nop nop and %r13, %r13 lea addresses_WC_ht+0x38d8, %rsi clflush (%rsi) nop nop xor %r14, %r14 movb $0x61, (%rsi) nop cmp %rax, %rax lea addresses_UC_ht+0xe730, %rsi lea addresses_UC_ht+0x2930, %rdi nop nop nop nop cmp $33086, %rdx mov $2, %rcx rep movsl nop nop nop nop nop cmp %r14, %r14 lea addresses_WT_ht+0xfad0, %rsi lea addresses_A_ht+0x14930, %rdi nop nop add %r13, %r13 mov $97, %rcx rep movsq nop nop nop dec %r13 lea addresses_WT_ht+0x2b50, %rsi lea addresses_normal_ht+0xbbb0, %rdi nop nop nop sub %rdx, %rdx mov $82, %rcx rep movsl sub %rcx, %rcx lea addresses_WC_ht+0x77e0, %r8 nop nop nop nop nop cmp $52906, %rcx movb $0x61, (%r8) nop nop nop nop add $12021, %rdx lea addresses_normal_ht+0x12f30, %rdi xor %r13, %r13 mov $0x6162636465666768, %rsi movq %rsi, %xmm2 movups %xmm2, (%rdi) nop nop nop add $223, %rdx lea addresses_A_ht+0x184e0, %rsi lea addresses_D_ht+0x295c, %rdi sub %r8, %r8 mov $96, %rcx rep movsw nop sub %r14, %r14 lea addresses_normal_ht+0x7f7c, %rsi lea addresses_normal_ht+0x10458, %rdi nop add %rax, %rax mov $100, %rcx rep movsq nop nop nop nop nop and %r8, %r8 pop %rsi pop %rdx pop %rdi pop %rcx pop %rax pop %r8 pop %r14 pop %r13 ret .global s_faulty_load s_faulty_load: push %r10 push %r11 push %r13 push %r8 push %rax push %rsi // Store lea addresses_normal+0x9730, %r8 nop nop sub %rsi, %rsi mov $0x5152535455565758, %r13 movq %r13, (%r8) nop nop nop add $52891, %rsi // Faulty Load mov $0xf30, %r13 nop nop nop nop dec %r11 mov (%r13), %r10 lea oracles, %r13 and $0xff, %r10 shlq $12, %r10 mov (%r13,%r10,1), %r10 pop %rsi pop %rax pop %r8 pop %r13 pop %r11 pop %r10 ret /* <gen_faulty_load> [REF] {'src': {'type': 'addresses_P', 'same': False, 'size': 2, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'} {'dst': {'type': 'addresses_normal', 'same': False, 'size': 8, 'congruent': 11, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'} [Faulty Load] {'src': {'type': 'addresses_P', 'same': True, 'size': 8, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'} <gen_prepare_buffer> {'src': {'type': 'addresses_D_ht', 'same': False, 'size': 1, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'} {'src': {'type': 'addresses_UC_ht', 'congruent': 7, 'same': True}, 'dst': {'type': 'addresses_WT_ht', 'congruent': 6, 'same': False}, 'OP': 'REPM'} {'src': {'type': 'addresses_normal_ht', 'congruent': 11, 'same': False}, 'dst': {'type': 'addresses_WT_ht', 'congruent': 0, 'same': False}, 'OP': 'REPM'} {'dst': {'type': 'addresses_WC_ht', 'same': False, 'size': 4, 'congruent': 10, 'NT': True, 'AVXalign': False}, 'OP': 'STOR'} {'dst': {'type': 'addresses_WC_ht', 'same': False, 'size': 1, 'congruent': 0, 'NT': False, 'AVXalign': True}, 'OP': 'STOR'} {'src': {'type': 'addresses_UC_ht', 'congruent': 11, 'same': False}, 'dst': {'type': 'addresses_UC_ht', 'congruent': 9, 'same': False}, 'OP': 'REPM'} {'src': {'type': 'addresses_WT_ht', 'congruent': 0, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 5, 'same': False}, 'OP': 'REPM'} {'src': {'type': 'addresses_WT_ht', 'congruent': 5, 'same': False}, 'dst': {'type': 'addresses_normal_ht', 'congruent': 7, 'same': False}, 'OP': 'REPM'} {'dst': {'type': 'addresses_WC_ht', 'same': False, 'size': 1, 'congruent': 3, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'} {'dst': {'type': 'addresses_normal_ht', 'same': False, 'size': 16, 'congruent': 11, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'} {'src': {'type': 'addresses_A_ht', 'congruent': 4, 'same': False}, 'dst': {'type': 'addresses_D_ht', 'congruent': 2, 'same': False}, 'OP': 'REPM'} {'src': {'type': 'addresses_normal_ht', 'congruent': 1, 'same': False}, 'dst': {'type': 'addresses_normal_ht', 'congruent': 2, 'same': False}, 'OP': 'REPM'} {'00': 2} 00 00 */
20.409302
156
0.655424
41e1d8abaf40372d4b762396d5920842cfe7afec
4,297
asm
Assembly
third-party/gmp/gmp-src/mpn/x86_64/bt1/aorsmul_1.asm
jhh67/chapel
f041470e9b88b5fc4914c75aa5a37efcb46aa08f
[ "ECL-2.0", "Apache-2.0" ]
1,602
2015-01-06T11:26:31.000Z
2022-03-30T06:17:21.000Z
third-party/gmp/gmp-src/mpn/x86_64/bt1/aorsmul_1.asm
jhh67/chapel
f041470e9b88b5fc4914c75aa5a37efcb46aa08f
[ "ECL-2.0", "Apache-2.0" ]
11,789
2015-01-05T04:50:15.000Z
2022-03-31T23:39:19.000Z
third-party/gmp/gmp-src/mpn/x86_64/bt1/aorsmul_1.asm
jhh67/chapel
f041470e9b88b5fc4914c75aa5a37efcb46aa08f
[ "ECL-2.0", "Apache-2.0" ]
498
2015-01-08T18:58:18.000Z
2022-03-20T15:37:45.000Z
dnl AMD64 mpn_addmul_1 and mpn_submul_1 optimised for AMD bt1/bt2. dnl Copyright 2003-2005, 2007, 2008, 2011, 2012, 2018-2019 Free Software dnl Foundation, Inc. dnl This file is part of the GNU MP Library. dnl dnl The GNU MP Library is free software; you can redistribute it and/or modify dnl it under the terms of either: dnl dnl * the GNU Lesser General Public License as published by the Free dnl Software Foundation; either version 3 of the License, or (at your dnl option) any later version. dnl dnl or dnl dnl * the GNU General Public License as published by the Free Software dnl Foundation; either version 2 of the License, or (at your option) any dnl later version. dnl dnl or both in parallel, as here. dnl dnl The GNU MP Library is distributed in the hope that it will be useful, but dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License dnl for more details. dnl dnl You should have received copies of the GNU General Public License and the dnl GNU Lesser General Public License along with the GNU MP Library. If not, dnl see https://www.gnu.org/licenses/. include(`../config.m4') C cycles/limb C AMD K8,K9 4.52 old measurement C AMD K10 4.51 old measurement C AMD bd1 4.66 old measurement C AMD bd2 4.57 old measurement C AMD bd3 ? C AMD bd4 ? C AMD zen ? C AMD bt1 5.04 C AMD bt2 5.07 C Intel P4 16.8 18.6 old measurement C Intel PNR 5.59 old measurement C Intel NHM 5.39 old measurement C Intel SBR 3.93 old measurement C Intel IBR 3.59 old measurement C Intel HWL 3.61 old measurement C Intel BWL 2.76 old measurement C Intel SKL 2.77 old measurement C Intel atom 23 old measurement C Intel SLM 8 old measurement C Intel GLM ? C VIA nano 5.63 old measurement C The ALIGNment here might look completely ad-hoc. They are not. ABI_SUPPORT(DOS64) ABI_SUPPORT(STD64) ifdef(`OPERATION_addmul_1',` define(`ADDSUB', `add') define(`func', `mpn_addmul_1') ') ifdef(`OPERATION_submul_1',` define(`ADDSUB', `sub') define(`func', `mpn_submul_1') ') MULFUNC_PROLOGUE(mpn_addmul_1 mpn_submul_1) C Standard parameters define(`rp', `%rdi') define(`up', `%rsi') define(`n_param', `%rdx') define(`v0', `%rcx') C Standard allocations define(`n', `%rbx') define(`w0', `%r8') define(`w1', `%r9') define(`w2', `%r10') define(`w3', `%r11') C DOS64 parameters IFDOS(` define(`rp', `%rcx') ') dnl IFDOS(` define(`up', `%rsi') ') dnl IFDOS(` define(`n_param', `%r8') ') dnl IFDOS(` define(`v0', `%r9') ') dnl C DOS64 allocations IFDOS(` define(`n', `%rbx') ') dnl IFDOS(` define(`w0', `%r8') ') dnl IFDOS(` define(`w1', `%rdi') ') dnl IFDOS(` define(`w2', `%r10') ') dnl IFDOS(` define(`w3', `%r11') ') dnl ASM_START() TEXT ALIGN(64) PROLOGUE(func) IFDOS(` push %rsi ') IFDOS(` push %rdi ') IFDOS(` mov %rdx, %rsi ') push %rbx mov (up), %rax lea (rp,n_param,8), rp lea (up,n_param,8), up mov n_param, n test $1, R8(n_param) jne L(bx1) L(bx0): mul v0 neg n mov %rax, w0 mov %rdx, w1 test $2, R8(n) jne L(L2) L(b00): add $2, n jmp L(L0) ALIGN(16) L(bx1): mul v0 test $2, R8(n) je L(b01) L(b11): mov %rax, w2 mov %rdx, w3 neg n inc n jmp L(L3) ALIGN(16) L(b01): sub $3, n jc L(n1) mov %rax, w2 mov %rdx, w3 neg n ALIGN(16) L(top): mov -16(up,n,8), %rax mul v0 mov %rax, w0 mov %rdx, w1 ADDSUB w2, -24(rp,n,8) adc w3, w0 adc $0, w1 L(L0): mov -8(up,n,8), %rax mul v0 mov %rax, w2 mov %rdx, w3 ADDSUB w0, -16(rp,n,8) adc w1, w2 adc $0, w3 L(L3): mov (up,n,8), %rax mul v0 mov %rax, w0 mov %rdx, w1 ADDSUB w2, -8(rp,n,8) adc w3, w0 adc $0, w1 L(L2): mov 8(up,n,8), %rax mul v0 mov %rax, w2 mov %rdx, w3 ADDSUB w0, (rp,n,8) adc w1, w2 adc $0, w3 add $4, n js L(top) L(end): xor R32(%rax), R32(%rax) ADDSUB w2, -8(rp) adc w3, %rax pop %rbx IFDOS(` pop %rdi ') IFDOS(` pop %rsi ') ret ALIGN(32) L(n1): ADDSUB %rax, -8(rp) mov $0, R32(%rax) adc %rdx, %rax pop %rbx IFDOS(` pop %rdi ') IFDOS(` pop %rsi ') ret EPILOGUE()
22.380208
79
0.626716
65a5e096decf461083a5074c10d345fc5d958d94
2,772
asm
Assembly
Counter with display/Display_SRC.asm
bardia-p/ARM-Processor-Simulator
6c3f540f0789823c770993bb2461d09778b4d788
[ "MIT" ]
null
null
null
Counter with display/Display_SRC.asm
bardia-p/ARM-Processor-Simulator
6c3f540f0789823c770993bb2461d09778b4d788
[ "MIT" ]
null
null
null
Counter with display/Display_SRC.asm
bardia-p/ARM-Processor-Simulator
6c3f540f0789823c770993bb2461d09778b4d788
[ "MIT" ]
null
null
null
EQU breakpoint, #0xFFFFFFFF EQU endOfStack, #0x800 B Main ; All I/O addresses are predefined by the Debugger: IOswitchAddress DCD #0x80000200 ; Address to query the Switch IO component IOhexControlAddress DCD #0x80000300 ; Address to toggle the Hex Display IO component on or off IOhexDataAddress DCD #0x80000301 ; Address to change the Hex Display values ; This subroutine needs to be called once to turn the Digit Displays on. ToggleDisplayOn PUSH { R0, R1, R14 } LDR R0, [ IOhexControlAddress ]; get Hex Display IO address MOV R1, #0b11 ; 2 bits on = turns both hex digit displays on STR R1, [R0] ; Send the 2 bits control signal to the display POP { R0, R1, R15 } Main MOV R13, endOfStack ; initialize Stack Pointer MOV R1 , #0 ; R1 is the ticks counter. Initialize to 0 BL ToggleDisplayOn ; Turn the Display on (once) ; for (R1 = 0; -1<R1<100; R1++ or R1-- depending on Switch state) { TickAgain ; BCD-encoding [ same as your Fragment 1 soln ] DIV R0 , R1 , #10 ; generate BCD digits (review DIV instruction in lab doc if needed) AND R4 , R0, #0xFFFF ; Store the tens digit in R4 LSR R12, R0, #16 ; Store the units digit in R12 ; Format the decimal digits (R4, R12) for the Hex Display IO component LSL R6 , R4 , #4 ; shift the tens digits to second-least significant nybble ADD R6 , R6, R12 ; combine both digits into R6's least significant byte ; Bits 0-3: units digit. Bits 4-7: tens digit. LDR R3, [ IOhexDataAddress ] ; load Hex Display data control address STR R6, [R3] ; display the formatted value ; Detect current Switch IO component state [from Fragment 2 solution] LDR R3, [IOswitchAddress] ; load IOswitch address into R3 LDR R2, [R3] ; read Switch state (0 or 1) into R2 CMP R2, #1 ; (0=increment ticks; 1=decrement ticks) BEQ decrement ; Loop test [ same as your Fragment 1 soln ] ADD R1, R1, #1 ; Increment ticks count CMP R1, #100 ; Under 100 ticks? BNE TickAgain ; If so: tick again MOV R1, #0 ; else: reset counter to 0 B TickAgain ; then tick again decrement ; insert complete instructions (with their respective operands) SUB R1, R1, #1 ; Decrement ticks count CMP R1, #0 ; Greater than or equal to 0 ticks? BGE TickAgain ; If so: tick again MOV R1, #99 ; else: reset counter to 99 B TickAgain ; then tick again ; } end for loop DCD breakpoint ; Equivalent to DCD #0xFFFFFFFF
46.2
95
0.613276
b16ecf183970e31bafd7df8887dd1771a76a4c94
260
asm
Assembly
libsrc/_DEVELOPMENT/arch/zxn/esxdos/c/sdcc_iy/esx_f_rename.asm
jpoikela/z88dk
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
[ "ClArtistic" ]
640
2017-01-14T23:33:45.000Z
2022-03-30T11:28:42.000Z
libsrc/_DEVELOPMENT/arch/zxn/esxdos/c/sdcc_iy/esx_f_rename.asm
jpoikela/z88dk
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
[ "ClArtistic" ]
1,600
2017-01-15T16:12:02.000Z
2022-03-31T12:11:12.000Z
libsrc/_DEVELOPMENT/arch/zxn/esxdos/c/sdcc_iy/esx_f_rename.asm
jpoikela/z88dk
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
[ "ClArtistic" ]
215
2017-01-17T10:43:03.000Z
2022-03-23T17:25:02.000Z
; unsigned char esx_f_rename(unsigned char *old, unsigned char *new) SECTION code_esxdos PUBLIC _esx_f_rename EXTERN l0_esx_f_rename_callee _esx_f_rename: pop af pop hl pop de push de push hl push af jp l0_esx_f_rename_callee
13
68
0.726923
fc43e6b47210fa12000a311a1fddc527d8bc99dd
396
asm
Assembly
programs/oeis/006/A006048.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
22
2018-02-06T19:19:31.000Z
2022-01-17T21:53:31.000Z
programs/oeis/006/A006048.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
41
2021-02-22T19:00:34.000Z
2021-08-28T10:47:47.000Z
programs/oeis/006/A006048.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
5
2021-02-24T21:14:16.000Z
2021-08-09T19:48:05.000Z
; A006048: Number of entries in first n rows of Pascal's triangle not divisible by 3. ; 1,3,6,8,12,18,21,27,36,38,42,48,52,60,72,78,90,108,111,117,126,132,144,162,171,189,216,218,222,228,232,240,252,258,270,288,292,300,312,320,336,360,372,396 lpb $0 mov $2,$0 sub $0,1 seq $2,6047 ; Number of entries in n-th row of Pascal's triangle not divisible by 3. add $1,$2 lpe add $1,1 mov $0,$1
33
156
0.686869
b64696f4f462cc0f107ddc6ff19105b1402dab03
10,825
asm
Assembly
Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xca_notsx.log_21017_1038.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
9
2020-08-13T19:41:58.000Z
2022-03-30T12:22:51.000Z
Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xca_notsx.log_21017_1038.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
1
2021-04-29T06:29:35.000Z
2021-05-13T21:02:30.000Z
Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xca_notsx.log_21017_1038.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
3
2020-07-14T17:07:07.000Z
2022-03-21T01:12:22.000Z
.global s_prepare_buffers s_prepare_buffers: push %r10 push %r14 push %rax push %rbp push %rcx push %rdi push %rdx push %rsi lea addresses_normal_ht+0xfc2, %rax nop nop sub $63843, %rdx movups (%rax), %xmm3 vpextrq $1, %xmm3, %rbp nop nop dec %r10 lea addresses_D_ht+0x124da, %r14 nop nop nop nop nop dec %rax movl $0x61626364, (%r14) nop nop nop nop nop sub %r14, %r14 lea addresses_D_ht+0x12d82, %rsi lea addresses_UC_ht+0x10cc2, %rdi nop nop add %rdx, %rdx mov $124, %rcx rep movsl add $3377, %rax lea addresses_WC_ht+0x1b0c2, %rsi lea addresses_D_ht+0x1c642, %rdi nop nop inc %rax mov $34, %rcx rep movsb xor %r10, %r10 lea addresses_WC_ht+0x9d42, %r10 clflush (%r10) nop nop nop inc %rbp mov (%r10), %di nop nop nop nop nop cmp %rdx, %rdx lea addresses_A_ht+0xbb42, %r10 add %rsi, %rsi mov (%r10), %cx nop nop nop cmp %rdx, %rdx lea addresses_WC_ht+0x16302, %rbp nop nop sub %r10, %r10 movl $0x61626364, (%rbp) nop nop nop cmp %rdx, %rdx lea addresses_D_ht+0x130c2, %rdi nop nop add %r14, %r14 movb $0x61, (%rdi) nop nop nop nop inc %rcx lea addresses_D_ht+0x4f62, %rbp nop nop nop sub $33711, %rdx and $0xffffffffffffffc0, %rbp movaps (%rbp), %xmm4 vpextrq $1, %xmm4, %rax sub $35160, %rbp lea addresses_UC_ht+0x9ac2, %rsi nop nop nop nop cmp %r10, %r10 movups (%rsi), %xmm3 vpextrq $1, %xmm3, %rax nop xor $16444, %rsi lea addresses_WT_ht+0x54c2, %rsi lea addresses_D_ht+0x19102, %rdi nop nop add $1321, %r10 mov $62, %rcx rep movsq nop nop nop nop nop cmp $5983, %rbp lea addresses_A_ht+0xa542, %r14 nop nop nop and $60494, %rcx mov (%r14), %bp nop nop cmp $57127, %rsi lea addresses_UC_ht+0x301e, %rsi lea addresses_A_ht+0x1e20e, %rdi nop nop sub %rbp, %rbp mov $34, %rcx rep movsl sub %r10, %r10 lea addresses_WC_ht+0x11be2, %rcx nop nop nop nop nop inc %rbp mov $0x6162636465666768, %r10 movq %r10, (%rcx) nop nop nop nop nop cmp $54061, %rax pop %rsi pop %rdx pop %rdi pop %rcx pop %rbp pop %rax pop %r14 pop %r10 ret .global s_faulty_load s_faulty_load: push %r12 push %r13 push %r14 push %r15 push %r8 push %rcx push %rdi // Store lea addresses_normal+0x1e242, %r14 clflush (%r14) nop nop xor %rcx, %rcx mov $0x5152535455565758, %r8 movq %r8, %xmm6 vmovups %ymm6, (%r14) nop nop nop nop nop add %r15, %r15 // Store lea addresses_WT+0x9c82, %r15 nop nop nop sub $2600, %r14 mov $0x5152535455565758, %r13 movq %r13, %xmm2 vmovups %ymm2, (%r15) nop nop nop nop nop add %r8, %r8 // Store lea addresses_normal+0xdad7, %r8 nop nop and $9870, %rdi mov $0x5152535455565758, %rcx movq %rcx, %xmm1 movups %xmm1, (%r8) nop nop add %r12, %r12 // Store lea addresses_WT+0x180c2, %r15 nop cmp $18245, %r13 movb $0x51, (%r15) sub %r12, %r12 // Load lea addresses_US+0x1cfda, %rcx xor $62446, %r15 movups (%rcx), %xmm5 vpextrq $0, %xmm5, %r14 nop nop nop nop nop add $19879, %rcx // Store lea addresses_D+0x170c2, %r15 clflush (%r15) nop nop nop nop and $5851, %r8 movw $0x5152, (%r15) nop nop nop nop sub $18363, %r13 // Store lea addresses_RW+0x1dd62, %r8 nop nop cmp %r14, %r14 mov $0x5152535455565758, %r12 movq %r12, %xmm0 vmovups %ymm0, (%r8) add $43899, %r13 // Store lea addresses_normal+0x477c, %r12 nop nop inc %rcx movl $0x51525354, (%r12) nop nop nop nop nop add %r13, %r13 // Store lea addresses_WC+0x17242, %r12 nop nop nop nop cmp $30529, %rcx movw $0x5152, (%r12) cmp $44317, %r14 // Store lea addresses_normal+0xaa2a, %r13 nop add %rdi, %rdi mov $0x5152535455565758, %r12 movq %r12, %xmm6 vmovups %ymm6, (%r13) nop nop nop nop nop sub $44434, %r14 // Store lea addresses_WC+0x1e1e2, %r8 and %r12, %r12 movb $0x51, (%r8) and $46311, %rdi // Load lea addresses_A+0x1b52e, %r14 nop nop sub $10064, %r13 mov (%r14), %r8w nop nop nop nop cmp %r14, %r14 // Store lea addresses_PSE+0xd662, %r15 xor $57669, %r12 mov $0x5152535455565758, %r13 movq %r13, %xmm2 movups %xmm2, (%r15) nop nop nop nop nop cmp %r12, %r12 // Faulty Load lea addresses_RW+0x8c2, %rdi nop inc %r8 movb (%rdi), %cl lea oracles, %rdi and $0xff, %rcx shlq $12, %rcx mov (%rdi,%rcx,1), %rcx pop %rdi pop %rcx pop %r8 pop %r15 pop %r14 pop %r13 pop %r12 ret /* <gen_faulty_load> [REF] {'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_RW', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 0}} {'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_normal', 'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 7}} {'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_WT', 'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 6}} {'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_normal', 'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 0}} {'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_WT', 'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 7}} {'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_US', 'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 1}} {'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_D', 'NT': True, 'AVXalign': False, 'size': 2, 'congruent': 10}} {'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_RW', 'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 4}} {'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_normal', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 0}} {'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_WC', 'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 7}} {'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_normal', 'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 1}} {'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_WC', 'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 4}} {'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_A', 'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 2}} {'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_PSE', 'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 3}} [Faulty Load] {'OP': 'LOAD', 'src': {'same': True, 'type': 'addresses_RW', 'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 0}} <gen_prepare_buffer> {'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_normal_ht', 'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 7}} {'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_D_ht', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 3}} {'OP': 'REPM', 'src': {'same': False, 'congruent': 6, 'type': 'addresses_D_ht'}, 'dst': {'same': False, 'congruent': 9, 'type': 'addresses_UC_ht'}} {'OP': 'REPM', 'src': {'same': False, 'congruent': 10, 'type': 'addresses_WC_ht'}, 'dst': {'same': False, 'congruent': 7, 'type': 'addresses_D_ht'}} {'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_WC_ht', 'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 6}} {'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_A_ht', 'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 7}} {'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_WC_ht', 'NT': False, 'AVXalign': True, 'size': 4, 'congruent': 5}} {'OP': 'STOR', 'dst': {'same': True, 'type': 'addresses_D_ht', 'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 10}} {'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_D_ht', 'NT': False, 'AVXalign': True, 'size': 16, 'congruent': 4}} {'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_UC_ht', 'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 7}} {'OP': 'REPM', 'src': {'same': False, 'congruent': 9, 'type': 'addresses_WT_ht'}, 'dst': {'same': True, 'congruent': 5, 'type': 'addresses_D_ht'}} {'OP': 'LOAD', 'src': {'same': True, 'type': 'addresses_A_ht', 'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 7}} {'OP': 'REPM', 'src': {'same': False, 'congruent': 1, 'type': 'addresses_UC_ht'}, 'dst': {'same': False, 'congruent': 1, 'type': 'addresses_A_ht'}} {'OP': 'STOR', 'dst': {'same': True, 'type': 'addresses_WC_ht', 'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 4}} {'32': 21017} 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 */
28.190104
2,999
0.649423
302bc96cf001c4f88985954257779325d26d6c0a
384
asm
Assembly
programs/oeis/160/A160973.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
22
2018-02-06T19:19:31.000Z
2022-01-17T21:53:31.000Z
programs/oeis/160/A160973.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
41
2021-02-22T19:00:34.000Z
2021-08-28T10:47:47.000Z
programs/oeis/160/A160973.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
5
2021-02-24T21:14:16.000Z
2021-08-09T19:48:05.000Z
; A160973: a(n) is the number of positive integers of the form (n-3k)/(2k+1), 1 <= k <= (n-1)/5. ; 0,0,0,0,0,0,1,0,0,1,0,1,1,0,0,1,2,0,1,0,0,3,0,1,1,0,2,1,0,0,3,2,0,1,0,0,3,2,0,2,0,2,1,0,2,1,2,0,3,0,0,5,0,0,1,0,2,3,2,1,1,2,0,1,0,2,5,0,0,1,2,2,3,0,0,3,2,0,1,2,0,5,0,1,3,0,4,1,0,0,1 trn $0,3 mul $0,2 add $0,8 seq $0,321014 ; Number of divisors of n which are greater than 3. sub $0,1
42.666667
183
0.567708
e90f434fc6ecd00e15ed47f886e93e70c527e8fb
1,019
asm
Assembly
_maps/obj53.asm
vladjester2020/Sonic1TMR
22e749a2aab74cc725729e476d6252b071c12e42
[ "Apache-2.0" ]
null
null
null
_maps/obj53.asm
vladjester2020/Sonic1TMR
22e749a2aab74cc725729e476d6252b071c12e42
[ "Apache-2.0" ]
2
2019-06-13T14:26:59.000Z
2019-10-10T13:15:14.000Z
_maps/obj53.asm
vladjester2020/Sonic1TMR
22e749a2aab74cc725729e476d6252b071c12e42
[ "Apache-2.0" ]
null
null
null
; --------------------------------------------------------------------------- ; Sprite mappings - collapsing floors (MZ, SLZ, SBZ) ; --------------------------------------------------------------------------- dc.w byte_874E-Map_obj53, byte_8763-Map_obj53 dc.w byte_878C-Map_obj53, byte_87A1-Map_obj53 byte_874E: dc.b 4 dc.b $F8, $D, 0, 0, $E0 ; MZ and SBZ blocks dc.b 8, $D, 0, 0, $E0 dc.b $F8, $D, 0, 0, 0 dc.b 8, $D, 0, 0, 0 byte_8763: dc.b 8 dc.b $F8, 5, 0, 0, $E0 dc.b $F8, 5, 0, 0, $F0 dc.b $F8, 5, 0, 0, 0 dc.b $F8, 5, 0, 0, $10 dc.b 8, 5, 0, 0, $E0 dc.b 8, 5, 0, 0, $F0 dc.b 8, 5, 0, 0, 0 dc.b 8, 5, 0, 0, $10 byte_878C: dc.b 4 dc.b $F8, $D, 0, 0, $E0 ; SLZ blocks dc.b 8, $D, 0, 8, $E0 dc.b $F8, $D, 0, 0, 0 dc.b 8, $D, 0, 8, 0 byte_87A1: dc.b 8 dc.b $F8, 5, 0, 0, $E0 dc.b $F8, 5, 0, 4, $F0 dc.b $F8, 5, 0, 0, 0 dc.b $F8, 5, 0, 4, $10 dc.b 8, 5, 0, 8, $E0 dc.b 8, 5, 0, $C, $F0 dc.b 8, 5, 0, 8, 0 dc.b 8, 5, 0, $C, $10 even
29.970588
78
0.407262
c52099369245c5e52ad3397a08513da3119110c9
84
asm
Assembly
src/main/fragment/mos6502-common/vdum1=vwum2_dword_vwuc1.asm
jbrandwood/kickc
d4b68806f84f8650d51b0e3ef254e40f38b0ffad
[ "MIT" ]
2
2022-03-01T02:21:14.000Z
2022-03-01T04:33:35.000Z
src/main/fragment/mos6502-common/vdum1=vwum2_dword_vwuc1.asm
jbrandwood/kickc
d4b68806f84f8650d51b0e3ef254e40f38b0ffad
[ "MIT" ]
null
null
null
src/main/fragment/mos6502-common/vdum1=vwum2_dword_vwuc1.asm
jbrandwood/kickc
d4b68806f84f8650d51b0e3ef254e40f38b0ffad
[ "MIT" ]
null
null
null
lda #<{c1} sta {m1} lda #>{c1} sta {m1}+1 lda {m2} sta {m1}+2 lda {m2}+1 sta {m1}+3
9.333333
10
0.52381
a0d88819a6a72327f21cda518b74516cbc7a0e7b
7,227
asm
Assembly
Transynther/x86/_processed/AVXALIGN/_st_zr_/i7-8650U_0xd2_notsx.log_21829_1073.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
9
2020-08-13T19:41:58.000Z
2022-03-30T12:22:51.000Z
Transynther/x86/_processed/AVXALIGN/_st_zr_/i7-8650U_0xd2_notsx.log_21829_1073.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
1
2021-04-29T06:29:35.000Z
2021-05-13T21:02:30.000Z
Transynther/x86/_processed/AVXALIGN/_st_zr_/i7-8650U_0xd2_notsx.log_21829_1073.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
3
2020-07-14T17:07:07.000Z
2022-03-21T01:12:22.000Z
.global s_prepare_buffers s_prepare_buffers: push %r11 push %r13 push %r14 push %rbp push %rcx push %rdi push %rsi lea addresses_UC_ht+0x93a9, %rsi lea addresses_UC_ht+0xeb01, %rdi nop and %rbp, %rbp mov $6, %rcx rep movsl nop nop nop dec %r13 lea addresses_normal_ht+0x1c101, %rcx clflush (%rcx) nop nop add $48523, %r11 mov (%rcx), %rsi nop nop nop cmp %rsi, %rsi lea addresses_WC_ht+0xc701, %rsi lea addresses_normal_ht+0x1eea1, %rdi nop nop nop nop nop inc %r14 mov $113, %rcx rep movsb nop nop nop nop inc %rcx lea addresses_WC_ht+0x16b01, %r11 xor %rbp, %rbp mov (%r11), %cx nop nop nop nop nop sub %rsi, %rsi lea addresses_WC_ht+0xc901, %r14 nop and $40009, %r11 mov (%r14), %r13d nop nop and $63006, %rcx lea addresses_A_ht+0x12101, %r11 clflush (%r11) nop nop nop nop nop sub %r14, %r14 vmovups (%r11), %ymm6 vextracti128 $1, %ymm6, %xmm6 vpextrq $1, %xmm6, %r13 nop nop nop dec %r14 lea addresses_normal_ht+0x1b501, %r11 xor $58696, %rbp movb $0x61, (%r11) nop nop nop sub $25697, %r11 pop %rsi pop %rdi pop %rcx pop %rbp pop %r14 pop %r13 pop %r11 ret .global s_faulty_load s_faulty_load: push %r10 push %r13 push %r14 push %r15 push %rax push %rcx push %rdi push %rsi // Load lea addresses_WT+0xbac5, %r13 clflush (%r13) nop nop nop nop xor %r14, %r14 mov (%r13), %r10w nop nop xor $24820, %rdi // Store lea addresses_WT+0x10c01, %rdi nop nop nop nop nop xor %r10, %r10 movb $0x51, (%rdi) nop nop nop nop nop dec %r10 // REPMOV lea addresses_normal+0x62d1, %rsi lea addresses_normal+0x3c01, %rdi nop nop nop nop sub $5530, %r13 mov $19, %rcx rep movsq nop nop add %r10, %r10 // Store lea addresses_A+0x5e27, %rdi add $47212, %rcx mov $0x5152535455565758, %r14 movq %r14, (%rdi) add $34382, %rcx // REPMOV lea addresses_WC+0x19101, %rsi lea addresses_WC+0x1e2f7, %rdi and $22090, %r13 mov $122, %rcx rep movsw add %r13, %r13 // Store lea addresses_normal+0x9701, %rax inc %rdi movb $0x51, (%rax) nop nop add $19916, %rsi // Faulty Load lea addresses_A+0x16901, %r13 nop nop sub %r15, %r15 movb (%r13), %r10b lea oracles, %rcx and $0xff, %r10 shlq $12, %r10 mov (%rcx,%r10,1), %r10 pop %rsi pop %rdi pop %rcx pop %rax pop %r15 pop %r14 pop %r13 pop %r10 ret /* <gen_faulty_load> [REF] {'OP': 'LOAD', 'src': {'type': 'addresses_A', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}} {'OP': 'LOAD', 'src': {'type': 'addresses_WT', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 2, 'same': True}} {'OP': 'STOR', 'dst': {'type': 'addresses_WT', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 5, 'same': False}} {'OP': 'REPM', 'src': {'type': 'addresses_normal', 'congruent': 3, 'same': False}, 'dst': {'type': 'addresses_normal', 'congruent': 8, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_A', 'size': 8, 'AVXalign': True, 'NT': False, 'congruent': 1, 'same': False}} {'OP': 'REPM', 'src': {'type': 'addresses_WC', 'congruent': 10, 'same': False}, 'dst': {'type': 'addresses_WC', 'congruent': 1, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_normal', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 9, 'same': False}} [Faulty Load] {'OP': 'LOAD', 'src': {'type': 'addresses_A', 'size': 1, 'AVXalign': False, 'NT': True, 'congruent': 0, 'same': True}} <gen_prepare_buffer> {'OP': 'REPM', 'src': {'type': 'addresses_UC_ht', 'congruent': 2, 'same': False}, 'dst': {'type': 'addresses_UC_ht', 'congruent': 8, 'same': False}} {'OP': 'LOAD', 'src': {'type': 'addresses_normal_ht', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 7, 'same': False}} {'OP': 'REPM', 'src': {'type': 'addresses_WC_ht', 'congruent': 9, 'same': False}, 'dst': {'type': 'addresses_normal_ht', 'congruent': 3, 'same': False}} {'OP': 'LOAD', 'src': {'type': 'addresses_WC_ht', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 9, 'same': False}} {'OP': 'LOAD', 'src': {'type': 'addresses_WC_ht', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 9, 'same': False}} {'OP': 'LOAD', 'src': {'type': 'addresses_A_ht', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 11, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'size': 1, 'AVXalign': False, 'NT': True, 'congruent': 9, 'same': True}} {'00': 1, '35': 21828} 00 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 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34.089623
2,999
0.65449
093cb3dc0e4d0feee547ec3f1d61cb9ba6f8ac77
384
asm
Assembly
libsrc/_DEVELOPMENT/arch/ts2068/misc/c/sdcc_ix/tshc_visit_wc_attr_callee.asm
jpoikela/z88dk
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
[ "ClArtistic" ]
640
2017-01-14T23:33:45.000Z
2022-03-30T11:28:42.000Z
libsrc/_DEVELOPMENT/arch/ts2068/misc/c/sdcc_ix/tshc_visit_wc_attr_callee.asm
jpoikela/z88dk
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
[ "ClArtistic" ]
1,600
2017-01-15T16:12:02.000Z
2022-03-31T12:11:12.000Z
libsrc/_DEVELOPMENT/arch/ts2068/misc/c/sdcc_ix/tshc_visit_wc_attr_callee.asm
jpoikela/z88dk
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
[ "ClArtistic" ]
215
2017-01-17T10:43:03.000Z
2022-03-23T17:25:02.000Z
; void tshc_visit_wc_attr(struct r_Rect8 *r, void *function) SECTION code_clib SECTION code_arch PUBLIC _tshc_visit_wc_attr_callee PUBLIC l0_tshc_visit_wc_attr_callee EXTERN asm_tshc_visit_wc_attr _tshc_visit_wc_attr_callee: pop af pop bc pop de push af l0_tshc_visit_wc_attr_callee: push bc ex (sp),ix call asm_tshc_visit_wc_attr pop ix ret
14.222222
60
0.768229
843df6ef734e88910d6309562c11194e193f256e
8,961
asm
Assembly
VivienneTests/test_ept_breakpoint_manager_asm.asm
fengjixuchui/VivienneVMM
0d8ecef1123d0ea1620c7156f3ea0f4c1aab1447
[ "MIT" ]
621
2018-07-29T17:01:54.000Z
2022-03-28T19:20:25.000Z
VivienneTests/test_ept_breakpoint_manager_asm.asm
fengjixuchui/VivienneVMM
0d8ecef1123d0ea1620c7156f3ea0f4c1aab1447
[ "MIT" ]
15
2019-01-06T03:57:20.000Z
2021-05-29T02:56:31.000Z
VivienneTests/test_ept_breakpoint_manager_asm.asm
fengjixuchui/VivienneVMM
0d8ecef1123d0ea1620c7156f3ea0f4c1aab1447
[ "MIT" ]
147
2018-07-29T17:10:09.000Z
2022-03-11T17:00:56.000Z
;============================================================================== ; Types ;============================================================================== ; ; NOTE This struct must match 'GENERAL_PURPOSE_REGISTERS' defined in ; arch_x64.h. ; GENERAL_PURPOSE_REGISTERS struct gp_r15 qword 0 gp_r14 qword 0 gp_r13 qword 0 gp_r12 qword 0 gp_r11 qword 0 gp_r10 qword 0 gp_r9 qword 0 gp_r8 qword 0 gp_rdi qword 0 gp_rsi qword 0 gp_rbp qword 0 gp_rsp qword 0 gp_rbx qword 0 gp_rdx qword 0 gp_rcx qword 0 gp_rax qword 0 GENERAL_PURPOSE_REGISTERS ends ;============================================================================== ; Macros ;============================================================================== LOAD_GENERAL_PURPOSE_REGISTERS macro mov r15, (GENERAL_PURPOSE_REGISTERS ptr [rax]).gp_r15 mov r14, (GENERAL_PURPOSE_REGISTERS ptr [rax]).gp_r14 mov r13, (GENERAL_PURPOSE_REGISTERS ptr [rax]).gp_r13 mov r12, (GENERAL_PURPOSE_REGISTERS ptr [rax]).gp_r12 mov r11, (GENERAL_PURPOSE_REGISTERS ptr [rax]).gp_r11 mov r10, (GENERAL_PURPOSE_REGISTERS ptr [rax]).gp_r10 mov r9, (GENERAL_PURPOSE_REGISTERS ptr [rax]).gp_r9 mov r8, (GENERAL_PURPOSE_REGISTERS ptr [rax]).gp_r8 mov rdi, (GENERAL_PURPOSE_REGISTERS ptr [rax]).gp_rdi mov rsi, (GENERAL_PURPOSE_REGISTERS ptr [rax]).gp_rsi mov rbp, (GENERAL_PURPOSE_REGISTERS ptr [rax]).gp_rbp ;mov rsp, (GENERAL_PURPOSE_REGISTERS ptr [rax]).gp_rsp mov rbx, (GENERAL_PURPOSE_REGISTERS ptr [rax]).gp_rbx mov rdx, (GENERAL_PURPOSE_REGISTERS ptr [rax]).gp_rdx mov rcx, (GENERAL_PURPOSE_REGISTERS ptr [rax]).gp_rcx push (GENERAL_PURPOSE_REGISTERS ptr [rax]).gp_rax pop rax endm ;============================================================================== ; Globals ;============================================================================== .data public Test_Ebm_ReadByte public Test_Ebm_ReadWord public Test_Ebm_ReadDword public Test_Ebm_ReadQword public Test_Ebm_WriteByte public Test_Ebm_WriteWord public Test_Ebm_WriteDword public Test_Ebm_WriteQword public Test_Ebm_ExecuteBasic public Test_Ebm_VmCall public Test_Ebm_SetTrapFlag public g_Test_Ebm_SetTrapFlag_StaticExceptionAddress_Location public g_Test_Ebm_SetTrapFlag_StaticExceptionAddress_EptBreakpointTarget_1 public g_Test_Ebm_SetTrapFlag_StaticExceptionAddress_EptBreakpointTarget_2 public g_Test_Ebm_SetTrapFlag_StaticExceptionAddress_EptBreakpointTarget_3 public g_Test_Ebm_SetTrapFlag_StaticExceptionAddress_LastAddress public g_Test_Ebm_SetTrapFlag_StaticExceptionAddress_Count public Test_Ebm_SetTrapFlag_ReturnExceptionAddress public Test_Ebm_SetTrapFlag_StaticExceptionAddress public g_Test_Ebm_SetRegisterContextTriggerExecutionBreakpoint_Location public Test_Ebm_SetRegisterContextTriggerExecutionBreakpoint g_Test_Ebm_SetTrapFlag_StaticExceptionAddress_Count qword 0 public Test_Ebm_Stress_DebugExceptions_Asm public g_Test_Ebm_Stress_DebugExceptions_Asm_Location_Execute public g_Test_Ebm_Stress_DebugExceptions_Asm_Location_Read public g_Test_Ebm_Stress_DebugExceptions_Asm_Location_Return public g_Test_Ebm_Stress_DebugExceptions_Asm_Variable_Read public g_Test_Ebm_Stress_DebugExceptions_Asm_Count_1 public g_Test_Ebm_Stress_DebugExceptions_Asm_Count_2 g_Test_Ebm_Stress_DebugExceptions_Asm_Variable_Read word 0 g_Test_Ebm_Stress_DebugExceptions_Asm_Count_1 dword 0 g_Test_Ebm_Stress_DebugExceptions_Asm_Count_2 dword 0 ;============================================================================== ; Assembly Code Interface ;============================================================================== _ASM_C$1 segment align(4096) 'CODE' ; ; BYTE ; NTAPI ; Test_Ebm_ReadByte( ; _In_ PBYTE pByte ; ); ; Test_Ebm_ReadByte: mov al, byte ptr [rcx] ret ; ; WORD ; NTAPI ; Test_Ebm_ReadWord( ; _In_ PWORD pWord ; ); ; Test_Ebm_ReadWord: mov ax, word ptr [rcx] ret ; ; DWORD ; NTAPI ; Test_Ebm_ReadDword( ; _In_ PDWORD pDword ; ); ; Test_Ebm_ReadDword: mov eax, dword ptr [rcx] ret ; ; NTAPI ; Test_Ebm_ReadQword( ; _In_ PDWORD64 pQword ; ); ; Test_Ebm_ReadQword: mov rax, qword ptr [rcx] ret ; ; VOID ; NTAPI ; Test_Ebm_WriteByte( ; PBYTE pByte, ; BYTE Value ; ); ; Test_Ebm_WriteByte: mov byte ptr [rcx], dl ret ; ; VOID ; NTAPI ; Test_Ebm_WriteWord( ; PWORD pWord, ; WORD Value ; ); ; Test_Ebm_WriteWord: mov word ptr [rcx], dx ret ; ; VOID ; NTAPI ; Test_Ebm_WriteDword( ; PDWORD pDword, ; DWORD Value ; ); ; Test_Ebm_WriteDword: mov dword ptr [rcx], edx ret ; ; VOID ; NTAPI ; Test_Ebm_WriteQword( ; PDWORD64 pQword, ; DWORD64 Value ; ); ; Test_Ebm_WriteQword: mov qword ptr [rcx], rdx ret ; ; VOID ; NTAPI ; Test_Ebm_ExecuteBasic(); ; Test_Ebm_ExecuteBasic: ret ; ; ULONG_PTR ; NTAPI ; Test_Ebm_VmCall( ; _In_ ULONG_PTR HypercallNumber, ; _In_ ULONG_PTR Context ; ); ; Test_Ebm_VmCall: vmcall ret ; ; VOID ; NTAPI ; Test_Ebm_SetTrapFlag(); ; Test_Ebm_SetTrapFlag: pushfq or qword ptr [rsp], 100h popfq ret ; ; VOID ; NTAPI ; Test_Ebm_SetTrapFlag_ReturnExceptionAddress( ; _Out_ PVOID* ppExceptionAddress ; ); ; ; On return, a single-step exception is generated and '*ppExceptionAddress' is ; set to the exception address. ; Test_Ebm_SetTrapFlag_ReturnExceptionAddress: ; ; Store the return address in the output parameter. ; mov rax, qword ptr [rsp] mov [rcx], rax ; ; Push the current EFLAGS value to the stack, set the trap flag, pop the ; modified EFLAGS value into the EFLAGS register. The trap flag will take ; effect after the return instruction is executed. ; pushfq or qword ptr [rsp], 100h popfq ret ; ; VOID ; NTAPI ; Test_Ebm_SetTrapFlag_StaticExceptionAddress_Helper(); ; ; Recreation of 'Test_Ebm_SetTrapFlag' with labels for ept breakpoints. ; Test_Ebm_SetTrapFlag_StaticExceptionAddress_Helper: pushfq or qword ptr [rsp], 100h popfq g_Test_Ebm_SetTrapFlag_StaticExceptionAddress_EptBreakpointTarget_1: ret ; ; VOID ; NTAPI ; Test_Ebm_SetTrapFlag_StaticExceptionAddress(); ; ; Trigger a single-step exception where the exception address is the address ; of the 'g_Test_Ebm_SetTrapFlag_StaticExceptionAddress_Location' variable. ; Test_Ebm_SetTrapFlag_StaticExceptionAddress: call Test_Ebm_SetTrapFlag_StaticExceptionAddress_Helper g_Test_Ebm_SetTrapFlag_StaticExceptionAddress_Location: g_Test_Ebm_SetTrapFlag_StaticExceptionAddress_EptBreakpointTarget_2: inc g_Test_Ebm_SetTrapFlag_StaticExceptionAddress_Count g_Test_Ebm_SetTrapFlag_StaticExceptionAddress_EptBreakpointTarget_3: g_Test_Ebm_SetTrapFlag_StaticExceptionAddress_LastAddress: ret ; ; VOID ; NTAPI ; Test_Ebm_SetRegisterContextTriggerExecutionBreakpoint( ; _In_ PGENERAL_PURPOSE_REGISTERS pContext ; ); ; Test_Ebm_SetRegisterContextTriggerExecutionBreakpoint: ; ; Save non-volatile registers. ; push rbx push rbp push rdi push rsi push r12 push r13 push r14 push r15 ; ; Load the expected register context. ; mov rax, rcx LOAD_GENERAL_PURPOSE_REGISTERS ; ; Trigger the ept breakpoint. ; g_Test_Ebm_SetRegisterContextTriggerExecutionBreakpoint_Location: nop ; ; Restore non-volatile registers. ; pop r15 pop r14 pop r13 pop r12 pop rsi pop rdi pop rbp pop rbx ret ; ; VOID ; NTAPI ; Test_Ebm_Stress_DebugExceptions_Asm( ; _In_ BOOL fSingleStep ; ); ; Test_Ebm_Stress_DebugExceptions_Asm: cmp ecx, 0 jz g_Test_Ebm_Stress_DebugExceptions_Asm_Location_Execute ; ; Single-step through this routine. 'Test_Ebm_Stress_DebugExceptions_VEH' ; will set the trap flag until we get to ; 'g_Test_Ebm_Stress_DebugExceptions_Asm_Location_Return'. ; call Test_Ebm_SetTrapFlag g_Test_Ebm_Stress_DebugExceptions_Asm_Location_Execute: inc g_Test_Ebm_Stress_DebugExceptions_Asm_Count_1 ; ; NOTE Data hardware breakpoints are trap exceptions so the exception ; address is the address of the instruction after the access. ; mov ax, g_Test_Ebm_Stress_DebugExceptions_Asm_Variable_Read g_Test_Ebm_Stress_DebugExceptions_Asm_Location_Read: inc g_Test_Ebm_Stress_DebugExceptions_Asm_Count_2 g_Test_Ebm_Stress_DebugExceptions_Asm_Location_Return: ret _ASM_C$1 ends end
23.396867
79
0.673139
3f9343a566c68c3d64e759ee63d071d365d77f68
748
asm
Assembly
data/wildPokemon/route11.asm
etdv-thevoid/pokemon-rgb-enhanced
5b244c1cf46aab98b9c820d1b7888814eb7fa53f
[ "MIT" ]
1
2022-01-09T05:28:52.000Z
2022-01-09T05:28:52.000Z
data/wildPokemon/route11.asm
ETDV-TheVoid/pokemon-rgb-enhanced
5b244c1cf46aab98b9c820d1b7888814eb7fa53f
[ "MIT" ]
null
null
null
data/wildPokemon/route11.asm
ETDV-TheVoid/pokemon-rgb-enhanced
5b244c1cf46aab98b9c820d1b7888814eb7fa53f
[ "MIT" ]
null
null
null
Route11Mons: db $0F IF DEF(_RED) db 14,EKANS db 15,SPEAROW db 12,EKANS db 9,DROWZEE db 13,SPEAROW db 13,DROWZEE db 15,EKANS db 17,SPEAROW db 11,DROWZEE db 15,DROWZEE ENDC IF DEF(_GREEN) db 14,SANDSHREW db 15,SPEAROW db 12,SANDSHREW db 9,DROWZEE db 13,SPEAROW db 13,DROWZEE db 15,SANDSHREW db 17,SPEAROW db 11,DROWZEE db 15,DROWZEE ENDC IF DEF(_BLUE) db 14,SANDSHREW db 15,SPEAROW db 12,SANDSHREW db 9,DROWZEE db 13,SPEAROW db 13,DROWZEE db 15,SANDSHREW db 17,SPEAROW db 11,DROWZEE db 15,DROWZEE ENDC db $05 db 15,TENTACOOL db 10,TENTACOOL db 15,TENTACOOL db 10,TENTACOOL db 15,TENTACOOL db 20,TENTACOOL db 25,TENTACOOL db 30,TENTACRUEL db 35,TENTACRUEL db 40,TENTACRUEL
14.96
17
0.704545
8ea7150c4af52f7db3dd8944a3670fa5bd4a26fa
3,141
asm
Assembly
start_up/Elf_64.asm
DosDevs/zoom-zoom
c3c37c4b9b38ba81f55fcd79e6ff07fddbc3a5c5
[ "BSD-3-Clause" ]
null
null
null
start_up/Elf_64.asm
DosDevs/zoom-zoom
c3c37c4b9b38ba81f55fcd79e6ff07fddbc3a5c5
[ "BSD-3-Clause" ]
null
null
null
start_up/Elf_64.asm
DosDevs/zoom-zoom
c3c37c4b9b38ba81f55fcd79e6ff07fddbc3a5c5
[ "BSD-3-Clause" ]
null
null
null
; --------------------------------------------------------------- ; ------- Copyright 2015 Daniel Valencia, All Rights Reserved. -- ; ------- -- ; ------- Elf64.asm -- ; ------- -- ; ------- Interprets and executes simple ELF programs. -- ; ------- -- ; ------- RSI - Pointer to start of buffer. -- ; ------- RCX - Size of buffer in bytes. -- ; --------------------------------------------------------------- [BITS 64] Elf_64_Entry: ; ; Find program Table. ; lodsd cmp eax, ELF_64_MAGIC jne Elf_64_Not_Elf lodsd ; Assume 64-bit Little-Endian; ignore. lodsq ; Ignore Padding. lodsq ; Ignore Type, Machine, Program_Version. lodsq ; Program entry point. mov [Elf_64_Program_Entry_Point], rax lodsq ; Program header offset. mov [Elf_64_Program_Table], rax lodsq ; Section header offset. mov [Elf_64_Section_Table], rax lodsd ; Ignore flags lodsw ; Elf header size in bytes. mov [Elf_64_Header_Size], ax lodsw ; Program header entry size. mov [Elf_64_Program_Header_Entry_Size], ax lodsw ; Program header entry count. mov [Elf_64_Program_Header_Entry_Count], ax lodsw ; Section header entry size. mov [Elf_64_Section_Header_Entry_Size], ax lodsw ; Section header entry count. mov [Elf_64_Section_Header_Entry_Count], ax ; ; Parse the Program Table. ; mov rsi, [Elf_64_Program_Table] add rsi, EL_ADDRESS lodsd mov [Elf_64_Segment_Type], eax lodsd mov [Elf_64_Segment_Flags], eax lodsq mov [Elf_64_Segment_Offset], rax lodsq mov [Elf_64_Segment_Address], rax lodsq ; Ignore physical address. lodsq mov [Elf_64_Segment_File_Size], rax lodsq mov [Elf_64_Segment_Memory_Size], rax lodsq mov [Elf_64_Segment_Alignment], rax mov rax, [Elf_64_Program_Entry_Point] ret Elf_64_Not_Elf: stc mov rax, 0ffffffffffffffffh ret ELF_64_MAGIC EQU 0464c457fh Elf_64_Program_Entry_Point dq 0 Elf_64_Program_Table dq 0 Elf_64_Section_Table dq 0 Elf_64_Header_Size dw 0 Elf_64_Program_Header_Entry_Size dw 0 Elf_64_Program_Header_Entry_Count dw 0 Elf_64_Section_Header_Entry_Size dw 0 Elf_64_Section_Header_Entry_Count dw 0 Elf_64_Segment_Type dd 0 Elf_64_Segment_Flags dd 0 Elf_64_Segment_Offset dq 0 Elf_64_Segment_Address dq 0 Elf_64_Segment_File_Size dq 0 Elf_64_Segment_Memory_Size dq 0 Elf_64_Segment_Alignment dq 0 msgProgramEntry db "Program entry point: ", 0 msgProgramTableOffset db "Program table offset: ", 0 msgSectionTableOffset db "Section table offset: ", 0 msgSegmentOffset db "Segment offset: ", 0 msgSegmentAddress db "Segment address: ", 0 msgSegmentFileSize db "Segment size in file: ", 0 msgSegmentMemory db "Segment size in memory: ", 0
27.552632
65
0.598217
19a028255f503f24096160d1ebf90e89e177f735
157
asm
Assembly
bootloader/asm/movestack.asm
mstniy/cerius
ac8a0e3e68243f3e38b2a259e7a7b6f87e6787e3
[ "MIT" ]
2
2018-01-28T19:04:56.000Z
2018-12-12T20:59:40.000Z
bootloader/asm/movestack.asm
mstniy/cerius
ac8a0e3e68243f3e38b2a259e7a7b6f87e6787e3
[ "MIT" ]
null
null
null
bootloader/asm/movestack.asm
mstniy/cerius
ac8a0e3e68243f3e38b2a259e7a7b6f87e6787e3
[ "MIT" ]
null
null
null
[BITS 64] global MoveStack MoveStack: sub rbp, rsp add rbp, rdi mov rcx, rsi mov rsi, rsp mov rdi, rdi mov rsp, rdi rep movsb ret
13.083333
17
0.605096
479741781813c08f80e92d624da631d66da873f0
559
asm
Assembly
data/baseStats/wooper.asm
longlostsoul/EvoYellow
fe5d0d372c4e90d384c4005a93f19d7968f2ff13
[ "Unlicense" ]
16
2018-08-28T21:47:01.000Z
2022-02-20T20:29:59.000Z
data/baseStats/wooper.asm
longlostsoul/EvoYellow
fe5d0d372c4e90d384c4005a93f19d7968f2ff13
[ "Unlicense" ]
5
2019-04-03T19:53:11.000Z
2022-03-11T22:49:34.000Z
data/baseStats/wooper.asm
longlostsoul/EvoYellow
fe5d0d372c4e90d384c4005a93f19d7968f2ff13
[ "Unlicense" ]
2
2019-12-09T19:46:02.000Z
2020-12-05T21:36:30.000Z
db DEX_WOOPER ; pokedex id db 55 ; base hp db 45 ; base attack db 45 ; base defense db 15 ; base speed db 25 ; base special db WATER ; species type 1 db GROUND ; species type 2 db 190 ; catch rate db 210 ; base exp yield INCBIN "pic/ymon/wooper.pic",0,1 ; 77, sprite dimensions dw WooperPicFront dw WooperPicBack ; attacks known at lvl 0 db BUBBLE db LEER db 0 db 0 db 3 ; growth rate ; learnset tmlearn 1,5,6,8 tmlearn 9,10,11,12,13,14,15 tmlearn 17,18,19,20 tmlearn 26,27,28,31,32 tmlearn 33,34,40 tmlearn 44 tmlearn 50,53,54 db BANK(WooperPicFront)
19.275862
56
0.729875
57ec7721ab189597c1d5c474dcf5cd31bbfac1e4
2,588
nasm
Assembly
2017/day02_x86/part2.nasm
nikklassen/advent-of-code
b681844ee5ad19f59b66301a5cdc28fd97d8e2d0
[ "MIT" ]
3
2017-12-01T14:28:42.000Z
2018-02-14T14:58:14.000Z
2017/day02_x86/part2.nasm
nikklassen/advent-of-code-2017
d0d1ac0242e5bdd203bd9f72c3fb2dddb2497013
[ "MIT" ]
null
null
null
2017/day02_x86/part2.nasm
nikklassen/advent-of-code-2017
d0d1ac0242e5bdd203bd9f72c3fb2dddb2497013
[ "MIT" ]
null
null
null
global _start, buffer, buffer_len extern parse_int, print_char, print_int, print_str, read %define nums_len 16 section .data checksum_msg db 'Checksum: ', 0 buffer times 4000 db 0 buffer_len equ $ - buffer nums times 16 dd 0 section .text %macro PRINTC 1 mov rax, %1 call print_char %endmacro %macro PRINTI 1 mov rax, %1 push rax call print_int add rsp, 8 %endmacro %macro PRINTS 1 mov rax, %1 push rax call print_str add rsp, 8 %endmacro _start: call read mov rbx, rax %define checksum r8 mov checksum, DWORD 0 .read_line: mov rsi, nums cmp [rbx], BYTE 0 je .end push rbx push rsi call parse_line add rsp, 16 mov rbx, rax push rbx ; save the string pointer so we can use rbx in the loop .finished_line: mov rsi, nums mov rdi, nums_len dec rdi .scan_nums: test rdi, rdi ; for rdi = nums_len - 1; rdi >= 0; rdi-- jl .next_line mov rcx, rdi ; for rcx = rdi - 1; rcx >= 0; rcx-- dec rcx .find_divisible: test rcx, rcx jl .scan_nums_end mov rax, rdi imul rax, 4 add rax, rsi movzx eax, WORD [rax] mov rbx, rcx imul rbx, 4 add rbx, rsi movzx ebx, WORD [rbx] cdq div rbx test rdx, rdx jne .flip_args add checksum, rax jmp .done_find_divisible .flip_args: mov rax, rcx imul rax, 4 add rax, rsi movzx eax, WORD [rax] mov rbx, rdi imul rbx, 4 add rbx, rsi movzx ebx, WORD [rbx] cdq div rbx test rdx, rdx jne .done_find_divisible add checksum, rax .done_find_divisible: dec rcx jmp .find_divisible .scan_nums_end: dec rdi jmp .scan_nums .next_line: pop rbx inc rbx ; skip the newline jmp .read_line .end: PRINTS checksum_msg PRINTI checksum PRINTC 0xa mov rax, 60 ; exit mov rdi, 0 syscall parse_line: enter 64, 0 push rbx push rsi ; args ; - s: string to parse ; - a: output array ; output ; - rax: the start of the unparsed string mov rbx, [rbp+24] mov rsi, [rbp+16] .parse: push rbx call parse_int add rsp, 8 mov [rsi], eax add rsi, 4 mov rbx, rdx ; update position in the string .next_token: ; parse the next number cmp [rbx], BYTE 0xa je .finished_line cmp [rbx], BYTE 0x20 jne .parse inc rbx jmp .next_token .finished_line: ; set return value mov rax, rbx pop rsi pop rbx leave ret
15.497006
68
0.590031
6c5604f77b7ca35612bfc709eb79cef3922232b2
472
asm
Assembly
oeis/312/A312891.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/312/A312891.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/312/A312891.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A312891: Coordination sequence Gal.6.216.5 where G.u.t.v denotes the coordination sequence for a vertex of type v in tiling number t in the Galebach list of u-uniform tilings. ; Submitted by Jamie Morken(s1) ; 1,4,9,13,17,21,25,29,33,37,42,46,50,55,59,63,67,71,75,79,83,88,92,96,101,105,109,113,117,121,125,129,134,138,142,147,151,155,159,163,167,171,175,180,184,188,193,197,201,205 mov $1,$0 mul $0,3 add $0,5 div $0,11 mul $1,43 sub $1,6 div $1,11 add $1,1 add $0,$1
33.714286
177
0.709746
c92275c869694a6fac2ab2aaf8d8734f3933d6e5
6,779
asm
Assembly
Transynther/x86/_processed/NONE/_xt_sm_/i7-7700_9_0x48.log_21829_965.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
9
2020-08-13T19:41:58.000Z
2022-03-30T12:22:51.000Z
Transynther/x86/_processed/NONE/_xt_sm_/i7-7700_9_0x48.log_21829_965.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
1
2021-04-29T06:29:35.000Z
2021-05-13T21:02:30.000Z
Transynther/x86/_processed/NONE/_xt_sm_/i7-7700_9_0x48.log_21829_965.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
3
2020-07-14T17:07:07.000Z
2022-03-21T01:12:22.000Z
.global s_prepare_buffers s_prepare_buffers: push %r10 push %r12 push %r14 push %rbx push %rcx push %rdi push %rdx push %rsi lea addresses_WT_ht+0x1e4d3, %rcx nop nop nop nop inc %r14 mov (%rcx), %r12d nop cmp %rsi, %rsi lea addresses_D_ht+0x96f6, %rdx nop add $30670, %rbx movups (%rdx), %xmm5 vpextrq $0, %xmm5, %rdi nop nop nop cmp %rcx, %rcx lea addresses_WT_ht+0x18eb, %rbx nop nop nop nop inc %rdi mov (%rbx), %edx nop nop nop add $65124, %rcx lea addresses_UC_ht+0x1e1f5, %r14 clflush (%r14) nop nop nop and %rdx, %rdx mov $0x6162636465666768, %rbx movq %rbx, %xmm0 and $0xffffffffffffffc0, %r14 vmovaps %ymm0, (%r14) nop nop nop nop sub %r12, %r12 lea addresses_UC_ht+0x1e8a5, %r12 nop nop add $4325, %rdi movb (%r12), %dl nop nop nop cmp %rsi, %rsi lea addresses_WC_ht+0x14533, %rsi lea addresses_A_ht+0xd453, %rdi clflush (%rdi) nop nop nop nop and $3700, %rbx mov $5, %rcx rep movsw nop sub $10489, %rsi lea addresses_WT_ht+0x213, %rsi lea addresses_normal_ht+0xca53, %rdi nop nop nop nop cmp $12385, %r10 mov $89, %rcx rep movsw nop nop nop nop nop dec %r10 lea addresses_UC_ht+0x1df83, %r10 nop nop nop xor $149, %rdx mov $0x6162636465666768, %rcx movq %rcx, %xmm5 movups %xmm5, (%r10) nop cmp $12256, %rdx pop %rsi pop %rdx pop %rdi pop %rcx pop %rbx pop %r14 pop %r12 pop %r10 ret .global s_faulty_load s_faulty_load: push %r10 push %r11 push %r13 push %rax push %rbp push %rdi push %rsi // Store lea addresses_WC+0x7253, %rax clflush (%rax) cmp %r10, %r10 movw $0x5152, (%rax) nop nop nop add $19937, %rbp // Store mov $0x504e9d0000000c53, %r11 nop add %r10, %r10 mov $0x5152535455565758, %rsi movq %rsi, (%r11) nop nop cmp %rsi, %rsi // Load lea addresses_PSE+0x1ebd1, %rbp nop xor %rdi, %rdi movups (%rbp), %xmm5 vpextrq $1, %xmm5, %r11 nop xor %rax, %rax // Faulty Load lea addresses_WC+0x7253, %rbp nop nop and $39959, %rdi movups (%rbp), %xmm4 vpextrq $0, %xmm4, %rsi lea oracles, %rbp and $0xff, %rsi shlq $12, %rsi mov (%rbp,%rsi,1), %rsi pop %rsi pop %rdi pop %rbp pop %rax pop %r13 pop %r11 pop %r10 ret /* <gen_faulty_load> [REF] {'OP': 'LOAD', 'src': {'type': 'addresses_WC', 'AVXalign': False, 'congruent': 0, 'size': 16, 'same': False, 'NT': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_WC', 'AVXalign': True, 'congruent': 0, 'size': 2, 'same': True, 'NT': True}} {'OP': 'STOR', 'dst': {'type': 'addresses_NC', 'AVXalign': False, 'congruent': 9, 'size': 8, 'same': False, 'NT': True}} {'OP': 'LOAD', 'src': {'type': 'addresses_PSE', 'AVXalign': False, 'congruent': 1, 'size': 16, 'same': False, 'NT': False}} [Faulty Load] {'OP': 'LOAD', 'src': {'type': 'addresses_WC', 'AVXalign': False, 'congruent': 0, 'size': 16, 'same': True, 'NT': False}} <gen_prepare_buffer> {'OP': 'LOAD', 'src': {'type': 'addresses_WT_ht', 'AVXalign': False, 'congruent': 7, 'size': 4, 'same': False, 'NT': False}} {'OP': 'LOAD', 'src': {'type': 'addresses_D_ht', 'AVXalign': False, 'congruent': 0, 'size': 16, 'same': False, 'NT': False}} {'OP': 'LOAD', 'src': {'type': 'addresses_WT_ht', 'AVXalign': False, 'congruent': 3, 'size': 4, 'same': False, 'NT': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_UC_ht', 'AVXalign': True, 'congruent': 0, 'size': 32, 'same': False, 'NT': False}} {'OP': 'LOAD', 'src': {'type': 'addresses_UC_ht', 'AVXalign': False, 'congruent': 1, 'size': 1, 'same': False, 'NT': False}} {'OP': 'REPM', 'src': {'type': 'addresses_WC_ht', 'congruent': 4, 'same': True}, 'dst': {'type': 'addresses_A_ht', 'congruent': 9, 'same': False}} {'OP': 'REPM', 'src': {'type': 'addresses_WT_ht', 'congruent': 6, 'same': False}, 'dst': {'type': 'addresses_normal_ht', 'congruent': 10, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_UC_ht', 'AVXalign': False, 'congruent': 1, 'size': 16, 'same': False, 'NT': False}} {'52': 21829} 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 */
35.492147
2,999
0.656144
f1d5d7cd2533a694eaac92f5e5bd07e2c0106035
151
asm
Assembly
libsrc/_DEVELOPMENT/math/float/math32/c/sccz80/cm32_sccz80_cos.asm
jpoikela/z88dk
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
[ "ClArtistic" ]
640
2017-01-14T23:33:45.000Z
2022-03-30T11:28:42.000Z
libsrc/_DEVELOPMENT/math/float/math32/c/sccz80/cm32_sccz80_cos.asm
jpoikela/z88dk
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
[ "ClArtistic" ]
1,600
2017-01-15T16:12:02.000Z
2022-03-31T12:11:12.000Z
libsrc/_DEVELOPMENT/math/float/math32/c/sccz80/cm32_sccz80_cos.asm
jpoikela/z88dk
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
[ "ClArtistic" ]
215
2017-01-17T10:43:03.000Z
2022-03-23T17:25:02.000Z
SECTION code_fp_math32 PUBLIC cm32_sccz80_cos EXTERN cm32_sccz80_fsread1, _m32_cosf cm32_sccz80_cos: call cm32_sccz80_fsread1 jp _m32_cosf
13.727273
37
0.827815
395f6084b38d1d3e20527e44fe3b8522b7825021
146
asm
Assembly
other.7z/SFC.7z/SFC/ソースデータ/ゼルダの伝説神々のトライフォース/フランス_NES/N_F_asm/zel_gnd1.asm
prismotizm/gigaleak
d082854866186a05fec4e2fdf1def0199e7f3098
[ "MIT" ]
null
null
null
other.7z/SFC.7z/SFC/ソースデータ/ゼルダの伝説神々のトライフォース/フランス_NES/N_F_asm/zel_gnd1.asm
prismotizm/gigaleak
d082854866186a05fec4e2fdf1def0199e7f3098
[ "MIT" ]
null
null
null
other.7z/SFC.7z/SFC/ソースデータ/ゼルダの伝説神々のトライフォース/フランス_NES/N_F_asm/zel_gnd1.asm
prismotizm/gigaleak
d082854866186a05fec4e2fdf1def0199e7f3098
[ "MIT" ]
null
null
null
Name: zel_gnd1.asm Type: file Size: 13793 Last-Modified: '2016-05-13T04:22:15Z' SHA-1: 76C8B4B93F571E235C77CD8894FD515307FF0B21 Description: null
20.857143
47
0.815068
b55df5aef79aacb2c06734c16122f8399f4f17b9
561
asm
Assembly
libsrc/enterprise/exos_open_channel_callee.asm
meesokim/z88dk
5763c7778f19a71d936b3200374059d267066bb2
[ "ClArtistic" ]
null
null
null
libsrc/enterprise/exos_open_channel_callee.asm
meesokim/z88dk
5763c7778f19a71d936b3200374059d267066bb2
[ "ClArtistic" ]
null
null
null
libsrc/enterprise/exos_open_channel_callee.asm
meesokim/z88dk
5763c7778f19a71d936b3200374059d267066bb2
[ "ClArtistic" ]
null
null
null
; ; Enterprise 64/128 specific routines ; by Stefano Bodrato, 2011 ; ; exos_open_channel(unsigned char ch_number, char *device); ; ; ; $Id: exos_open_channel_callee.asm,v 1.4 2015/01/19 01:32:42 pauloscustodio Exp $ ; PUBLIC exos_open_channel_callee PUBLIC ASMDISP_EXOS_OPEN_CHANNEL_CALLEE exos_open_channel_callee: pop hl pop de ex (sp),hl ; enter : de = char *device ; l = channel number .asmentry ld a,l ; channel rst 30h defb 1 ld h,0 ld l,a ret DEFC ASMDISP_EXOS_OPEN_CHANNEL_CALLEE = # asmentry - exos_open_channel_callee
15.583333
82
0.730838
8a53905a7d7b94c3577ced7323eac11aaace01c3
15,571
asm
Assembly
lib/am335x_sdk/ti/drv/icss_emac/firmware/icss_switch/src/switch_collision_task.asm
brandonbraun653/Apollo
a1ece2cc3f1d3dae48fdf8fe94f0bbb59d405fce
[ "MIT" ]
2
2021-12-27T10:19:01.000Z
2022-03-15T07:09:06.000Z
lib/am335x_sdk/ti/drv/icss_emac/firmware/icss_switch/src/switch_collision_task.asm
brandonbraun653/Apollo
a1ece2cc3f1d3dae48fdf8fe94f0bbb59d405fce
[ "MIT" ]
null
null
null
lib/am335x_sdk/ti/drv/icss_emac/firmware/icss_switch/src/switch_collision_task.asm
brandonbraun653/Apollo
a1ece2cc3f1d3dae48fdf8fe94f0bbb59d405fce
[ "MIT" ]
null
null
null
; ; TEXAS INSTRUMENTS TEXT FILE LICENSE ; ; Copyright (c) 2017 Texas Instruments Incorporated ; ; All rights reserved not granted herein. ; ; Limited License. ; ; Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive ; license under copyrights and patents it now or hereafter owns or controls to ; make, have made, use, import, offer to sell and sell ("Utilize") this software ; subject to the terms herein. With respect to the foregoing patent license, ; such license is granted solely to the extent that any such patent is necessary ; to Utilize the software alone. The patent license shall not apply to any ; combinations which include this software, other than combinations with devices ; manufactured by or for TI (“TI Devices”). No hardware patent is licensed hereunder. ; ; Redistributions must preserve existing copyright notices and reproduce this license ; (including the above copyright notice and the disclaimer and (if applicable) source ; code license limitations below) in the documentation and/or other materials provided ; with the distribution. ; ; Redistribution and use in binary form, without modification, are permitted provided ; that the following conditions are met: ; No reverse engineering, decompilation, or disassembly of this software is ; permitted with respect to any software provided in binary form. ; Any redistribution and use are licensed by TI for use only with TI Devices. ; Nothing shall obligate TI to provide you with source code for the software ; licensed and provided to you in object code. ; ; If software source code is provided to you, modification and redistribution of the ; source code are permitted provided that the following conditions are met: ; Any redistribution and use of the source code, including any resulting derivative ; works, are licensed by TI for use only with TI Devices. ; Any redistribution and use of any object code compiled from the source code ; and any resulting derivative works, are licensed by TI for use only with TI Devices. ; ; Neither the name of Texas Instruments Incorporated nor the names of its suppliers ; may be used to endorse or promote products derived from this software without ; specific prior written permission. ; ; DISCLAIMER. ; ; THIS SOFTWARE IS PROVIDED BY TI AND TI’S LICENSORS "AS IS" AND ANY EXPRESS OR IMPLIED ; WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY ; AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL TI AND TI’S ; LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR ; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE ; GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER ; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, ; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ; ; file: switch_collision_task.asm ; ; brief: Task to be called from micro scheduler every 2.56us which clears collision buffer ; There is max one packet per queue per task, i.e. max 3 packets to be cleared at a time ; Min cycles if no collision is pending: 10 ; Max cycles if all three queues have pending packets: xxx ; Total number of instructions: yyy ; ; ; description: ; Collision flag and queue is filled by tasks filling the queue which can be receive or host. ; Host can deceide whether to put in collision or wait for queue not busy. ; There is only one collision packet at a time. Collision buffer must be cleared before now packet ; can be inserted into collision buffer. Collision task will reset pending flag after buffer is ; transfered with no errors. If packet from collision does not fit then packet is dropped and ; overflow counter is increased. .if !$defined("__switch_collision_task_h") __switch_collision_task_h .set 1 .if $defined("TWO_PORT_CFG") ;///////////////////////////////////////////////////////// ; Includes Section ;///////////////////////////////////////////////////////// .include "icss_switch.h" .include "icss_defines.h" .include "icss_switch_macros.h" .include "emac_MII_Rcv.h" .include "icss_miirt_regs.h" .global COLLISION_TASK_EXEC QUEUE_DESCRIPTOR_REG .sassign R10, struct_queue COLLISION_QUEUE_DESCRIPTOR_REG .sassign R12, struct_queue ;COLLISION_STATUS_REG .set R14 ; collision status register loaded from memory .asg R15.w0, QUEUE_DSC_PTR_REG1 ; lower word of queue descriptor .asg R16.w0, QUEUE_DSC_PTR_REG2 ; higher word of queue descriptor .asg R17.w0, COLLQ_DSC_PTR_REG ; 16 bit address pointer to collision descriptor .asg R18 , QUEUE_SIZE_REG ; actual size in bytes of current queue .asg R9 , BD_REG ; actual buffer descriptor for current queue and port .asg R8.b0, PORT_REG ; port number 0,1 or 2 .asg R8.b1, QUEUE_REG ; queue number 0..3 .asg R8.w2, COL_BD_LENGTH ; length of packet in collision buffer in bytes .asg R7, COL_CONST ; address of PRU memory where collision buffer is located .asg R6 , COL_BD_REG ; collision buffer descriptor ;///////////////////////////////////////////////////////// ; Task Execution Entry Point (called by scheduler) ;///////////////////////////////////////////////////////// COLLISION_TASK_EXEC: LDI R0, COLLISION_STATUS_ADDR LBCO &COLLISION_STATUS_REG, PRU1_DMEM_CONST, R0, 4 AND L1_CALL_REG , CALL_REG , CALL_REG LDI R2.b0, 0x00 ; used for clearing .if $defined("PRU0") ; parse for collision on all three ports QBBS P0_COLLISION,COLLISION_STATUS_REG, 0 ;P0_COLLISION_PENDING - t0 QBBS P2_COLLISION,COLLISION_STATUS_REG, 16 ;P2_COLLISION_PENDING - t16 .else QBBS P1_COLLISION,COLLISION_STATUS_REG, 8 ;P1_COLLISION_PENDING - t8 .endif FINISH_COLLISION_CHECK: AND CALL_REG , L1_CALL_REG , L1_CALL_REG ; no collision pending, return to scheduler, consumes 9 cycles JMP CALL_REG .if $defined("PRU0") ; collision detected on port 0 P0_COLLISION: ; extract queue number from collision status into QUEUE_REG ; load port number into PORT_REG LSR QUEUE_REG, COLLISION_STATUS_REG.b0, 1 LDI PORT_REG, 0 LDI COL_CONST.w0 , ICSS_SHARED & 0xFFFF LDI COL_CONST.w2 , ICSS_SHARED >> 16 JAL CALL_REG, FN_PROCESS_COLLISION JMP FINISH_COLLISION_CHECK .endif .if $defined("PRU1") P1_COLLISION: ; extract queue number from collision status into QUEUE_REG ; load port number into PORT_REG LSR QUEUE_REG, COLLISION_STATUS_REG.b1, 1 LDI PORT_REG, 0x20 ;LDI COL_CONST, PRU0_DMEM JAL CALL_REG, FN_PROCESS_COLLISION JMP FINISH_COLLISION_CHECK .endif .if $defined("PRU0") P2_COLLISION: ; extract queue number from collision status into QUEUE_REG ; load port number into PORT_REG LSR QUEUE_REG, COLLISION_STATUS_REG.b2, 1 LDI PORT_REG, 0x40 ;LDI COL_CONST, PRU1_DMEM JAL CALL_REG, FN_PROCESS_COLLISION JMP FINISH_COLLISION_CHECK .endif ; end of taks section ;**************************************************************************** ; ; NAME : FN_PROCESS_COLLISION ; DESCRIPTION : Clears pending collision on all queues. Operates one collision at a time. ; RETURNS : ; ARGS : PORT_REG, QUEUE_REG ; USES : register, no scratch ; INVOKES : ; ;**************************************************************************** FN_PROCESS_COLLISION: ; get queue descriptor from PRU Data Memory ; start with P0 address, add offset for port and then add offset for queue ; PORT_REG is port*32, R2 is local LDI R2.w0, P0_QUEUE_DESC_OFFSET ADD R2.w0, R2.w0, PORT_REG LSL R2.b2, QUEUE_REG, 3 ADD QUEUE_DSC_PTR_REG1, R2.w0, R2.b2 LBCO &QUEUE_DESCRIPTOR_REG, PRU1_DMEM_CONST, QUEUE_DSC_PTR_REG1, 8 ; get collision queue descriptor by adding 8 byte offset to P0 ; need to shift right by 2 first as it was 32 byte offset before ; PORT_REG is now port*8, r2 is local LDI R2.w0, P0_COL_QUEUE_DESC_OFFSET LSR PORT_REG, PORT_REG, 2 ADD COLLQ_DSC_PTR_REG, R2.w0, PORT_REG LBCO &COLLISION_QUEUE_DESCRIPTOR_REG, PRU1_DMEM_CONST, COLLQ_DSC_PTR_REG, 8 ; check on queue busy_s flag set in status register QBBS QUEUE_BUSY, QUEUE_DESCRIPTOR_REG.busy_s, 0 ; Check on queue busy_m flag set in status register.. this is bcoz same PRU might be receiving a packet in that Queue QBBS QUEUE_BUSY, QUEUE_DESCRIPTOR_REG.status, 0 ;busy_m - t0 ; set busy flag for master which resides in upper 4 bytes ; QUEUE_DSC_PTR_REG2 points now to upper half of descriptor, use byte write for atomic operation ; R2 is local LDI R2.b0, 1 ADD QUEUE_DSC_PTR_REG2, QUEUE_DSC_PTR_REG1, 4 ADD QUEUE_DSC_PTR_REG2, QUEUE_DSC_PTR_REG2, 1 SBCO &R2.b0, PRU1_DMEM_CONST, QUEUE_DSC_PTR_REG2, 1 ; as slave we need to read and check busy_m again ; QUEUE_DSC_PTR_REG1 is still pointing to the right queue descriptor ;LBCO R11, PRU1_DMEM_CONST, QUEUE_DSC_PTR_REG2, 4 ;QBBS QUEUE_BUSY, QUEUE_DESCRIPTOR_REG.status.busy_m ; need to check on space available, i.e. free space in queue ; first get queue length from pre-initialized table ; PORT_REG is now port*1, QUEUE_SIZE is in 32 byte blocks -> need to * 8 to get to 4 bytes ptr LSR PORT_REG, PORT_REG, 3 M_GET_QUEUE_LENGTH PORT_REG, QUEUE_REG, QUEUE_SIZE_REG LSL QUEUE_SIZE_REG.w0, QUEUE_SIZE_REG, 2 QBLE Px_LENGTH_CHECK_WRAP, QUEUE_DESCRIPTOR_REG.wr_ptr, QUEUE_DESCRIPTOR_REG.rd_ptr SUB R2.w0, QUEUE_DESCRIPTOR_REG.rd_ptr, QUEUE_DESCRIPTOR_REG.wr_ptr JMP SKIP_Px_LENGTH_CHECK_WRAP Px_LENGTH_CHECK_WRAP: ; add queue size to rd_ptr and then subtract wr_ptr ADD R2.w0, QUEUE_DESCRIPTOR_REG.rd_ptr, QUEUE_SIZE_REG.w0 SUB R2.w0, R2.w0, QUEUE_DESCRIPTOR_REG.wr_ptr SKIP_Px_LENGTH_CHECK_WRAP: ; free space is in R2.w0 in 4 byte blocks, i.e. pointer to bd ; now check on required space from collision buffer queue values ; which is in length field (bit 18..28) of descriptor in rd_ptr LBCO &COL_BD_REG, ICSS_SHARED_CONST, COLLISION_QUEUE_DESCRIPTOR_REG.rd_ptr, 4 ; extract length field which is in bytes ; shift left by 3 clears the upper 3 bits LSL COL_BD_LENGTH, COL_BD_REG.w2, 3 ; shift right by 5 moves length 16 bit aligned and byte pointer LSR COL_BD_LENGTH, COL_BD_LENGTH, 5 ; Add 31 for rounding up to next block ADD COL_BD_LENGTH, COL_BD_LENGTH, 31 LSR COL_BD_LENGTH, COL_BD_LENGTH, 5 LSL COL_BD_LENGTH, COL_BD_LENGTH, 2 ; exit on overflow ;QBGT COLLISION_OVERFLOW, R2.w2, COL_BD_LENGTH QBGT COLLISION_OVERFLOW, R2.w0, COL_BD_LENGTH ; save max_fill_level ; new fill_level = (free_space - COL_BD_LENGTH) >> 5 ; free space in queue is in R2.w2 (byte) ; max_fill_level is in 32 byte blocks unit SUB R2.w0, R2.w0, COL_BD_LENGTH SUB R2.w2, QUEUE_SIZE_REG.w0, R2.w0 LSR R2.w2, R2.w2, 2 QBGE COL_SKIP_NEW_FILL_LEVEL, R2.w2, QUEUE_DESCRIPTOR_REG.max_fill_level AND QUEUE_DESCRIPTOR_REG.max_fill_level , R2.w2 , R2.w2 ADD r3.w0, QUEUE_DSC_PTR_REG1, 6 ;OFFSET(QUEUE_DESCRIPTOR_REG.max_fill_level) SBCO &QUEUE_DESCRIPTOR_REG.max_fill_level, PRU1_DMEM_CONST, r3.w0, 1 COL_SKIP_NEW_FILL_LEVEL: ; copy packet descriptor to queue ; write collision buffer descriptor to port queue ;Set the Shadow bit SET COL_BD_REG, COL_BD_REG.t14 SBCO &COL_BD_REG, ICSS_SHARED_CONST, QUEUE_DESCRIPTOR_REG.wr_ptr, 4 ADD R2.w2, QUEUE_DESCRIPTOR_REG.wr_ptr, COL_BD_LENGTH ; is new wr_ptr going above queue size, QUEUE_SIZE_REG is still 4 byte pointer M_GET_DESCRIPTOR_OFFSET PORT_REG, QUEUE_REG, r3 ADD R2.w0, r3.w0, QUEUE_SIZE_REG.w0 QBLT COL_UPDATE_WR_PTR_WRAP, R2.w0, R2.w2 ; then adjust by queue size ;SUB QUEUE_DESCRIPTOR_REG.wr_ptr, QUEUE_DESCRIPTOR_REG.wr_ptr, QUEUE_SIZE_REG SUB R2.w2, R2.w2, R2.w0 ADD R2.w2, R2.w2, r3.w0 COL_UPDATE_WR_PTR_WRAP: ; store new write pointer ;ADD r1.w2, QUEUE_DSC_PTR_REG1, OFFSET(QUEUE_DESCRIPTOR_REG.wr_ptr) ;REG1 is reserved ADD r2.w0, QUEUE_DSC_PTR_REG1, 2 ;OFFSET(QUEUE_DESCRIPTOR_REG.wr_ptr) ;SBCO R2.w2, PRU1_DMEM_CONST, r1.w2, 2 SBCO &R2.w2, PRU1_DMEM_CONST, r2.w0, 2 ; pointer on collision queue will be updated when packet is taken out of queue ; this avoids additional PRU copy of large packets. xmt function needs to check collision flag first before it ; start to copy data from regular queue. drawback is that collision buffer is blocked until packet is taken out ; of host queueu. ;Clear the busy_m bit LBCO &R2.b0, PRU1_DMEM_CONST, QUEUE_DSC_PTR_REG2, 1 AND R2.b0, R2.b0, 0xFC ; !(1<<Q_BUSY_M_BIT | 1<<Q_COLLISION_BIT) SBCO &R2.b0, PRU1_DMEM_CONST, QUEUE_DSC_PTR_REG2, 1 ;Clear the "collision occured" bit in collision status .if $defined("PRU0") QBBC CLEAR_P2_COLLISION, COLLISION_STATUS_REG, 0 ;replaced: QBBC CLEAR_P2_COLLISION, COLLISION_STATUS_REG.P0_COLLISION_PENDING SBCO &R2.b0, PRU1_DMEM_CONST, R0, 1 LDI R2.b0 , 1 ADD R0, R0, 3 SBCO &R2.b0, PRU1_DMEM_CONST, R0, 1 ;set bit which indicates that host is yet to empty the collision queue ; Give a Interrupt to indicate that a Packet has been received LDI R31, 0x24 ; Maps to system event 20, 0x24 = 10 0100 QBA FINISH_COLLISION_CHECK CLEAR_P2_COLLISION: ADD R0, R0, 2 SBCO &R2.b0, PRU1_DMEM_CONST, R0, 1 .else ADD R0, R0, 1 SBCO &R2.b0, PRU1_DMEM_CONST, R0, 1 .endif QUEUE_BUSY: ; need to clear busy_s flag in queue descriptor ;LDI R2.b0, 0 ;SBCO R2.b0, PRU1_DMEM_CONST, QUEUE_DSC_PTR_REG2, 1 QBNE FINISH_COLLISION_CHECK, PORT_REG, 0 ; Give a Interrupt to indicate that a Packet has been received ;LDI R31, 0x24 ; Maps to system event 20, 0x24 = 10 0100 ; set flag for stats update "collision busy" JMP FINISH_COLLISION_CHECK COLLISION_OVERFLOW: ; increment overflow_cnt in queue descriptor of port ADD QUEUE_DESCRIPTOR_REG.overflow_cnt, QUEUE_DESCRIPTOR_REG.overflow_cnt, 1 ADD R2.w0, QUEUE_DSC_PTR_REG2, 7 ;OFFSET(QUEUE_DESCRIPTOR_REG.overflow_cnt) SBCO &QUEUE_DESCRIPTOR_REG.overflow_cnt, PRU1_DMEM_CONST, R2.w0, 1 ;Clear the busy_m bit and set the overflow bit LDI R2.b0, 0x04 SBCO &R2.b0, PRU1_DMEM_CONST, QUEUE_DSC_PTR_REG2, 1 ; set overflow flag in status update register - optional as it is already in queue descriptor ; clear busy flag JMP QUEUE_BUSY ;.leave COLLISION_TASK_PROCESSING .endif ;TWO_PORT_CFG .endif
44.488571
132
0.683643
1f53950d6617aa3078c1aa897b7bfd1a1b0cdec0
539
asm
Assembly
tests/bank/test.asm
segfaultdev/sgcpu
e8d3abf8c7d931b8790a5859ecde19213fc83a65
[ "MIT" ]
20
2021-06-22T17:36:50.000Z
2021-11-08T16:00:21.000Z
tests/bank/test.asm
DamieFC/sgcpu
6dfc92068fa2ad0ff6b01e530968fc38d2a95a20
[ "MIT" ]
4
2021-06-22T17:39:16.000Z
2021-06-30T09:06:24.000Z
tests/bank/test.asm
DamieFC/sgcpu
6dfc92068fa2ad0ff6b01e530968fc38d2a95a20
[ "MIT" ]
4
2021-06-22T17:35:24.000Z
2021-06-29T20:51:06.000Z
org 0x0000 start: lds 0x5000 ldx 0x4001 ldl $x jsr print_hex ldx string jsr print_str inf_loop: jmp inf_loop print_hex: ldx 0x4002 ldh 0x00 mad ana 0x000F ldb 0x000A jls low_dec ada 0x0007 low_dec: ada 0x0030 tad sla sla sla sla ana 0x0F00 ldb 0x0A00 jls high_dec ada 0x0700 high_dec: ada 0x3000 ora d mda sth $x stl $x ret print_str: ldy 0x4002 ldh 0x00 str_loop: ldl $x mad jaz str_end stl $y inx jmp str_loop str_end: ret string: str "*32K RAM found\n"
9.981481
24
0.660482
e518cf1c0c8b23d6a29d464eaa82f2d721bca88f
178
asm
Assembly
ComputerStructure/SPARTAN6/Chapter4_Exercise8.asm
frisinacho/UMA
f50d5d6912937f1ffb0bc243234985ffc6a84bb0
[ "MIT" ]
1
2016-04-12T08:55:30.000Z
2016-04-12T08:55:30.000Z
ComputerStructure/SPARTAN6/Chapter4_Exercise8.asm
frisinacho/UMA
f50d5d6912937f1ffb0bc243234985ffc6a84bb0
[ "MIT" ]
null
null
null
ComputerStructure/SPARTAN6/Chapter4_Exercise8.asm
frisinacho/UMA
f50d5d6912937f1ffb0bc243234985ffc6a84bb0
[ "MIT" ]
null
null
null
.text lui $3,0x0001 lui $4,0x0002 addi $1,$0,1 addi $17,$0,0x7FFF0000 comprobacion:lb $5,3($4) nop nop nop beq $5,$1, suma j:comprobacion suma:add $17,$17,$17 .ktext sb $1,1($3)
11.866667
24
0.668539
5a8ecabdef3811c9cf782c9a0482c009b22048d9
821
asm
Assembly
programs/oeis/174/A174275.asm
jmorken/loda
99c09d2641e858b074f6344a352d13bc55601571
[ "Apache-2.0" ]
1
2021-03-15T11:38:20.000Z
2021-03-15T11:38:20.000Z
programs/oeis/174/A174275.asm
jmorken/loda
99c09d2641e858b074f6344a352d13bc55601571
[ "Apache-2.0" ]
null
null
null
programs/oeis/174/A174275.asm
jmorken/loda
99c09d2641e858b074f6344a352d13bc55601571
[ "Apache-2.0" ]
null
null
null
; A174275: a(n) = 2^n mod M(n) where M(n) = A014963(n) is the exponential of the Mangoldt function. ; 0,0,1,0,1,0,1,0,1,0,1,0,1,0,0,0,1,0,1,0,0,0,1,0,1,0,1,0,1,0,1,0,0,0,0,0,1,0,0,0,1,0,1,0,0,0,1,0,1,0,0,0,1,0,0,0,0,0,1,0,1,0,0,0,0,0,1,0,0,0,1,0,1,0,0,0,0,0,1,0,1,0,1,0,0,0,0,0,1,0,0,0,0,0,0,0,1,0,0,0,1,0,1,0,0,0,1,0,1,0,0,0,1,0,0,0,0,0,0,0,1,0,0,0,1,0,1,0,0,0,1,0,0,0,0,0,1,0,1,0,0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0,1,0,0,0,0,0,1,0,0,0,1,0,1,0,0,0,1,0,0,0,0,0,1,0,1,0,0,0,0,0,0,0,0,0,1,0,1,0,0,0,1,0,1,0,0,0,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0,0,0,1,0,0,0,1,0,1,0,0,0,1,0,0,0,0,0,1,0,1,0,1,0,0,0,0,0,0,0 mov $1,$0 cal $0,287841 ; Number of iterations of number of distinct prime factors (A001221) needed to reach 1 starting at n (n is counted). add $0,1 mov $2,3 add $2,$1 mov $1,$0 mul $1,$2 mov $0,$1 mod $0,2 mov $1,$0
58.642857
501
0.563946
e987ac415df1687fad340ccf05283110368cad31
177
asm
Assembly
libsrc/_DEVELOPMENT/adt/w_vector/c/sccz80/w_vector_data.asm
meesokim/z88dk
5763c7778f19a71d936b3200374059d267066bb2
[ "ClArtistic" ]
null
null
null
libsrc/_DEVELOPMENT/adt/w_vector/c/sccz80/w_vector_data.asm
meesokim/z88dk
5763c7778f19a71d936b3200374059d267066bb2
[ "ClArtistic" ]
null
null
null
libsrc/_DEVELOPMENT/adt/w_vector/c/sccz80/w_vector_data.asm
meesokim/z88dk
5763c7778f19a71d936b3200374059d267066bb2
[ "ClArtistic" ]
null
null
null
; void *w_vector_data(b_vector_t *v) SECTION code_adt_w_vector PUBLIC w_vector_data defc w_vector_data = asm_w_vector_data INCLUDE "adt/w_vector/z80/asm_w_vector_data.asm"
16.090909
48
0.824859
5e0e9b5ea80fae5b719b75128348011a4470ba8b
791
asm
Assembly
spring semester 2 course/operatin_system_labs/lab_4/proc_output.asm
andrwnv/study-progs
902c4ede0b273d91fd87c93e861b40439847c1a9
[ "MIT" ]
4
2020-01-02T08:38:55.000Z
2020-11-12T19:46:22.000Z
spring semester 2 course/operatin_system_labs/lab_4/proc_output.asm
andrwnv/StudyProgs
902c4ede0b273d91fd87c93e861b40439847c1a9
[ "MIT" ]
null
null
null
spring semester 2 course/operatin_system_labs/lab_4/proc_output.asm
andrwnv/StudyProgs
902c4ede0b273d91fd87c93e861b40439847c1a9
[ "MIT" ]
null
null
null
public output_proc data segment para public 'data' text db 'Input two number w/o space:$' new_line db 13, 10, '$' data ends code segment para public 'code' assume cs:code, ds:data input_start: output_proc proc near push bp mov bp, sp mov ax, [bp+4] m3: mov cx, 10h mov bx, ax mov ax, data mov ds, ax mov ah, 9h mov dx, offset new_line int 21h m4: xor dx, dx sal bx, 1 adc dl, 30h mov ah, 02h int 21h loop m4 mov sp, bp pop bp ret output_proc endp code ends end output_proc
17.977273
42
0.436157
33451cb22509b1918e551817237468db237eb7db
336
asm
Assembly
programs/oeis/108/A108594.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
22
2018-02-06T19:19:31.000Z
2022-01-17T21:53:31.000Z
programs/oeis/108/A108594.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
41
2021-02-22T19:00:34.000Z
2021-08-28T10:47:47.000Z
programs/oeis/108/A108594.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
5
2021-02-24T21:14:16.000Z
2021-08-09T19:48:05.000Z
; A108594: Numbers n such that 10*n + 101 is prime. ; 0,3,5,8,9,11,14,15,17,18,21,23,30,32,33,36,39,42,44,47,50,53,54,56,59,60,65,66,71,72,78,81,84,87,89,92,93,95,96,99,105,107,108,110,113,119,120,122,126,128,135,137,138,141,143,147,150,152,162,164,170,171,173 add $0,5 seq $0,126785 ; Numbers k such that 10*k + 11 is prime. sub $0,9
48
208
0.678571
711714ba375398017b6a9af4263a254b6c525ea4
1,581
asm
Assembly
micro2_3.asm
landofthelotophagi/Open-loop-Control-of-DC-motor-speed
3accb97b88f55794bcb6f13c9e271b23aa377868
[ "MIT" ]
null
null
null
micro2_3.asm
landofthelotophagi/Open-loop-Control-of-DC-motor-speed
3accb97b88f55794bcb6f13c9e271b23aa377868
[ "MIT" ]
null
null
null
micro2_3.asm
landofthelotophagi/Open-loop-Control-of-DC-motor-speed
3accb97b88f55794bcb6f13c9e271b23aa377868
[ "MIT" ]
null
null
null
.include "m16def.inc" .cseg .def temp = r16 .def state = r17 .def temp2 = r18 .def d1 = r19 .def d2 = r20 .def counter = r21 .def state2 = r22 .def flag = r23 .org 0x0000 rjmp reset .org 0x0012 rjmp TIM0_OVFL reset: ;initialize Stack Pointer ldi temp, high(RAMEND) out SPH, temp ldi temp, low(RAMEND) out SPL, temp ;**set Ports (I/O)** ;PortD ldi counter, 16 ldi temp, 0b00100000 out DDRD, temp ;PortA ldi temp, 0b01111110 out DDRA, temp ;PORTB ldi temp, 0b11111111 out DDRB, temp ;init TIMSK -> TOIE0==1 ldi temp, 1<<TOIE0 out TIMSK, temp ;TIMER0 ;init TCNT0 ldi temp, 12 out TCNT0, temp ;init TCCR0 ldi temp, 0b00000101 out TCCR0, temp ;TIMER1 ;TCCR1B/A ldi temp, 0b11000010 out TCCR1A, temp ldi temp, 0b00000001 out TCCR1B, temp ;OCR1AH/L ldi temp, 1 out OCR1AH, temp ldi temp, 54 out OCR1AL, temp ;init state ldi state, 0 out PORTB, state ;init flag ldi flag, 0xFF sei loop: rjmp loop increament: in temp2, OCR1AH out PORTB, state in temp, OCR1AL subi temp, 26 brcc no_carry dec temp2 no_carry: out OCR1AH, temp2 out OCR1AL, temp ret decreament: in temp2, OCR1AH out PORTB, state in temp, OCR1AL ldi d1, 26 add temp, d1 brcc no_carry inc temp2 no_carry2: out OCR1AH, temp2 out OCR1AL, temp ret TIM0_OVFL: dec counter brne restart ldi counter,16 cpi state, 10 breq inverse df: inc state cpi flag, 0 breq decreas call increament rjmp restart decreas: call decreament rjmp restart inverse: com flag clr state rjmp df restart: ldi temp, 12 out TCNT0,temp reti
10.979167
26
0.691967
a09dc845b5b970812f1c7eb7195db2290eb5f5e3
6,085
asm
Assembly
lib/third_party/mcu_vendor/renesas/rz_mcu_boards/core_package/generate/compiler/asm/initsect.asm
renesas-rx/amazon-freertos
1f50ef5b1971183c29c6d6748b4a0a3635de2fdf
[ "MIT" ]
7
2018-06-27T10:53:02.000Z
2020-08-07T05:32:13.000Z
lib/third_party/mcu_vendor/renesas/rz_mcu_boards/core_package/generate/compiler/asm/initsect.asm
renesas-rx/amazon-freertos
1f50ef5b1971183c29c6d6748b4a0a3635de2fdf
[ "MIT" ]
19
2018-12-07T03:41:15.000Z
2020-02-05T14:42:04.000Z
lib/third_party/mcu_vendor/renesas/rz_mcu_boards/core_package/generate/compiler/asm/initsect.asm
renesas-rx/amazon-freertos
1f50ef5b1971183c29c6d6748b4a0a3635de2fdf
[ "MIT" ]
11
2018-08-03T10:15:33.000Z
2020-12-07T03:26:10.000Z
@/******************************************************************************* @* DISCLAIMER @* This software is supplied by Renesas Electronics Corporation and is only @* intended for use with Renesas products. No other uses are authorized. This @* software is owned by Renesas Electronics Corporation and is protected under @* all applicable laws, including copyright laws. @* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING @* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT @* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE @* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. @* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS @* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE @* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR @* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE @* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. @* Renesas reserves the right, without notice, to make changes to this software @* and to discontinue the availability of this software. By using this software, @* you agree to the additional terms and conditions found by accessing the @* following link: @* http://www.renesas.com/disclaimer @* Copyright (C) 2018 Renesas Electronics Corporation. All rights reserved. @*******************************************************************************/ @/******************************************************************************* @* File Name : initsect.asm @* Description : copy and fill the variables @*******************************************************************************/ .section INIT_SECTION, "ax" .global INITSCT .type INITSCT, %function @@ This program need the stack area (40bytes) INITSCT: PUSH {lr} MOV r4, r0 @ 1st parameter : copy table PUSH {r1} CMP r4, #0 BLNE _COPYVAR @ copy the variables POP {r4} @ 2nd parameter : zero table CMP r4, #0 BLNE _ZEROVAR @ fill the variables with zero POP {pc} @ return from subroutine @@@ @@@ Copy the vaiables @@@ This program gets from the table of coping area "DTBL[]" _COPYVAR: _CVAR01: LDR r0, [r4], #4 @ r0 = top of source block LDR r1, [r4], #4 @ r1 = end of source block SUB r2, r1, r0 @ r2 = bytes to copy LDR r1, [r4], #4 @ r1 = top of destination block CMP r0, #0 @ check terminator BXEQ lr @ return MOVS r3,r2, LSR #(3+2) @ Number of eight word multiples BEQ _CVAR03 @ Fewer than eight words to move? PUSH {r4-r11} @ Save some working registers B _CVAR02 .align 7 @ alignment for loop optimization @ 7 : 2^7 = 128bytes boundary _CVAR02: LDM r0!, {r4-r11} @ Load 8 words from the source STM r1!, {r4-r11} @ and put them at the destination SUBS r3, r3, #1 @ Decrement the counter BNE _CVAR02 @ ... copy more POP {r4-r11} @ Don't require these now - restore @ originals _CVAR03: ANDS r2, r2, #0x1f @ Number of bytes to copy BEQ _CVAR05 @ No byte left to copy? B _CVAR04 .align 7 @ alignment for loop optimization @ 7 : 2^7 = 128bytes boundary _CVAR04: LDRB r3, [r0], #1 @ Load a word from the source and STRB r3, [r1], #1 @ store it to the destination SUBS r2, r2, #1 @ Decrement the counter BNE _CVAR04 @ ... copy more _CVAR05: B _CVAR01 @ copy the next block @@@ @@@ Fill the vaiables @@@ This program gets from the table of coping area "BTBL[]" _ZEROVAR: _ZVAR01: LDR r1, [r4], #4 @ r1 = top of block LDR r2, [r4], #4 @ r2 = end of block SUB r2, r2, r1 @ r2 = number of bytes to fill zero CMP r1, #0 @ check terminator BXEQ lr @ return MOV r0, #0 @ fill value MOVS r3,r2, LSR #(3+2) @ Number of eight word multiples BEQ _ZVAR03 @ Fewer than eight words to clean? PUSH {r4-r11} @ Save some working registers MOV r4, r0 @ fill zero MOV r5, r0 @ MOV r6, r0 @ MOV r7, r0 @ MOV r8, r0 @ MOV r9, r0 @ MOV r10, r0 @ MOV r11, r0 @ B _ZVAR02 .align 7 @ alignment for loop optimization @ 7 : 2^7 = 128bytes boundary _ZVAR02: STM r1!, {r4-r11} @ fill the block SUBS r3, r3, #1 @ Decrement the counter BNE _ZVAR02 @ ... fill more POP {r4-r11} @ Don't require these now - restore @ originals _ZVAR03: ANDS r2, r2, #0x1f @ Number of bytes to copy BEQ _ZVAR05 @ No words left to copy? B _ZVAR04 .align 7 @ alignment for loop optimization @ 7 : 2^7 = 128bytes boundary _ZVAR04: STRB r0, [r1], #1 @ Fill the block SUBS r2, r2, #1 @ Decrement the counter BNE _ZVAR04 @ ... fill more _ZVAR05: B _ZVAR01 @ fill the next block .END
41.114865
81
0.487921
e879e7032705c0e738447ea496a348ec21ac8967
476
asm
Assembly
oeis/110/A110356.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/110/A110356.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/110/A110356.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A110356: Array read by antidiagonals: T(n,k) (n>=3, k>=3) = minimal number of polygonal pieces in a dissection of a regular n-gon to a regular k-gon (conjectured). ; 1,4,4,6,1,6,5,6,6,5 mov $1,-3 mov $2,1 mov $3,$0 mul $3,5 lpb $3 mul $2,$3 add $1,$2 lpb $2,2 mov $5,$0 div $5,3 sub $2,$5 mov $26,$5 cmp $26,0 add $5,$26 div $1,$5 div $2,$5 sub $3,1 lpe lpe mov $26,$2 cmp $26,0 add $2,$26 div $1,$2 mov $0,$1 add $0,4 mod $0,10
15.866667
165
0.55042
bd4a55b002d4207883823b33660985aa64bc17eb
678
asm
Assembly
oeis/059/A059505.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/059/A059505.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/059/A059505.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A059505: Transform of A059502 applied to sequence 2,3,4,... ; Submitted by Jon Maiga ; 2,5,14,40,114,323,910,2551,7120,19796,54852,151525,417434,1147145,3145394,8606848,23507190,64093031,174474790,474261691,1287398452,3490267820,9451319304,25565098825,69080289074,186483295373,502955866070,1355335582936,3649318454010,9818471212811,26397381914302,70921683286015,190420407481624,510949749016580,1370206729603404,3672393900041773,9837367461231050,26338162495530641,70482089570289530,188524560838244656,504035987268235902,1347000129314930735,3598270191398167894,9608311088695940035 mov $1,$0 add $0,10 mov $2,3 lpb $1 sub $1,1 add $2,$0 add $0,$2 add $2,$1 lpe div $0,5
45.2
493
0.825959
292042635b9e7bbf4d4e7523a9eac40da3eb91d2
288
asm
Assembly
SecondYear/SecondSemester/OS/1/Lab1/Source.asm
arturboyun/University
2d0dcd05d3e3422fd92061210c6c29aa3129edde
[ "MIT" ]
null
null
null
SecondYear/SecondSemester/OS/1/Lab1/Source.asm
arturboyun/University
2d0dcd05d3e3422fd92061210c6c29aa3129edde
[ "MIT" ]
null
null
null
SecondYear/SecondSemester/OS/1/Lab1/Source.asm
arturboyun/University
2d0dcd05d3e3422fd92061210c6c29aa3129edde
[ "MIT" ]
null
null
null
.686P .MODEL FLAT, STDCALL .STACK 4096 .DATA MB_OK EQU 0 STR1 DB "Assembler program", 0 STR2 DB "Hello, Artur Boyn!", 0 HW DD ? EXTERN MessageBoxA@16:NEAR .CODE START: PUSH MB_OK PUSH OFFSET STR1 PUSH OFFSET STR2 PUSH HW CALL MessageBoxA@16 RET END START
13.714286
33
0.670139
6c6123b5e5aad6928304f5e7aa634c7287a9ed06
561
asm
Assembly
oeis/315/A315452.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/315/A315452.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/315/A315452.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A315452: Coordination sequence Gal.4.55.3 where G.u.t.v denotes the coordination sequence for a vertex of type v in tiling number t in the Galebach list of u-uniform tilings. ; Submitted by Simon Strandgaard ; 1,6,11,16,20,25,30,36,42,47,52,56,61,66,72,78,83,88,92,97,102,108,114,119,124,128,133,138,144,150,155,160,164,169,174,180,186,191,196,200,205,210,216,222,227,232,236,241,246,252 mov $1,4 mov $2,$0 add $0,4 lpb $0 trn $0,3 sub $3,$0 trn $0,4 trn $3,1 sub $1,$3 add $1,1 mov $3,3 lpe lpb $2 add $1,5 sub $2,1 lpe sub $1,4 mov $0,$1
24.391304
179
0.673797
2f15ecf4209b568849b704ce9413ae6f91ddab83
1,944
asm
Assembly
Examples/ch10/Struct1.asm
satadriver/LiunuxOS_t
c6222f04b6e734002cbf1aa366eb62e51f0ebbe5
[ "Apache-2.0" ]
null
null
null
Examples/ch10/Struct1.asm
satadriver/LiunuxOS_t
c6222f04b6e734002cbf1aa366eb62e51f0ebbe5
[ "Apache-2.0" ]
null
null
null
Examples/ch10/Struct1.asm
satadriver/LiunuxOS_t
c6222f04b6e734002cbf1aa366eb62e51f0ebbe5
[ "Apache-2.0" ]
null
null
null
TITLE Intro to STRUCT (Struct1.asm) ; This program demonstrates the STRUC directive. ; 32-bit version. ; Last update: 8/13/01. INCLUDE Irvine32.inc COORD STRUCT X WORD ? Y WORD ? COORD ENDS typEmployee STRUCT Idnum BYTE 9 DUP(0) Lastname BYTE 30 DUP(0) Years WORD 0 SalaryHistory DWORD 10 DUP(0) typEmployee ENDS .data ; Create instances of the COORD structure, ; assigning values to both X and Y: point1 COORD <5,10> point2 COORD <10,20> worker typEmployee <> ; override all fields. Either angle brackets ; or curly braces can be used: person1 typEmployee {"555223333"} person2 typEmployee <"555223333"> ; override only the second field: person3 typEmployee <,"Jones"> ; skip the first three fields, and ; use DUP to initialize the last field: person4 typEmployee <,,,3 DUP(20000)> ; Create an array of COORD objects: NumPoints = 3 AllPoints COORD NumPoints DUP(<0,0>) .code main PROC ; Get the offset of a field within a structure: mov edx,OFFSET typEmployee.SalaryHistory ; The following generates an "undefined identifier" error: ;mov edx,OFFSET Salary ; The TYPE, LENGTH, and SIZE operators can be applied ; to the structure and its fields: mov eax,TYPE typEmployee ; 82 mov eax,SIZE typEmployee mov eax,SIZE worker mov eax,SIZEOF worker mov eax,TYPE typEmployee.SalaryHistory ; 4 mov eax,LENGTH typEmployee.SalaryHistory ; 10 mov eax,SIZE typEmployee.SalaryHistory ; 40 ; The TYPE, LENGTH and SIZE operators can be applied ; to instances of the structure: mov eax,TYPE worker ; 82 mov eax,TYPE worker.Years ; 2 ; Indirect operands require the PTR operator: mov esi,offset worker mov ax,(typEmployee PTR [esi]).Years ; Loop through the array of points and set their ; X and Y values: mov edi,0 mov ecx,NumPoints mov ax,1 L1: mov (COORD PTR AllPoints[edi]).X,ax mov (COORD PTR AllPoints[edi]).X,ax add edi,TYPE COORD inc ax Loop L1 quit: exit main ENDP END main
21.362637
58
0.736111
4bd54b5f401a005e8f65456ab9dcd9b31d45abf6
707
asm
Assembly
programs/oeis/181/A181288.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
22
2018-02-06T19:19:31.000Z
2022-01-17T21:53:31.000Z
programs/oeis/181/A181288.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
41
2021-02-22T19:00:34.000Z
2021-08-28T10:47:47.000Z
programs/oeis/181/A181288.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
5
2021-02-24T21:14:16.000Z
2021-08-09T19:48:05.000Z
; A181288: Numbers of the form i*6^j-1 (i=1..5, j >= 0). ; 0,1,2,3,4,5,11,17,23,29,35,71,107,143,179,215,431,647,863,1079,1295,2591,3887,5183,6479,7775,15551,23327,31103,38879,46655,93311,139967,186623,233279,279935,559871,839807,1119743,1399679,1679615,3359231,5038847,6718463,8398079,10077695,20155391,30233087 mov $2,1 lpb $2 sub $2,1 mov $3,$0 mov $5,$0 lpb $3 mov $0,$5 sub $3,1 sub $0,$3 mov $7,2 mov $8,0 lpb $7 sub $7,1 add $0,$7 sub $0,1 mov $4,12 lpb $0 trn $0,5 mul $4,6 mov $9,$4 lpe mov $6,$7 mul $6,$9 add $8,$6 lpe mov $4,$8 div $4,72 add $1,$4 lpe lpe mov $0,$1
20.2
255
0.541726
a0aeb486a4f08e20d5f7803baf1f6040a38a54d1
783
asm
Assembly
oeis/142/A142103.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/142/A142103.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/142/A142103.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A142103: Primes congruent to 11 mod 36. ; Submitted by Jon Maiga ; 11,47,83,191,227,263,443,479,587,659,839,911,947,983,1019,1091,1163,1307,1451,1487,1523,1559,1667,1811,1847,2027,2063,2099,2207,2243,2351,2423,2459,2531,2711,2819,2927,2963,2999,3251,3323,3359,3467,3539,3719,3863,4007,4079,4259,4547,4583,4691,4799,4871,4943,5051,5087,5231,5303,5483,5519,5591,5807,5843,5879,5987,6131,6203,6311,6491,6563,6599,6779,6959,7103,7211,7247,7283,7499,7607,7643,7823,8039,8111,8147,8219,8291,8363,8543,8831,8867,9011,9227,9371,9479,9551,9587,9623,9767,9803 mov $2,$0 pow $2,2 mov $4,10 lpb $2 mov $3,$4 seq $3,10051 ; Characteristic function of primes: 1 if n is prime, else 0. sub $0,$3 mov $1,$0 max $1,0 cmp $1,$0 mul $2,$1 sub $2,1 add $4,36 lpe mov $0,$4 add $0,1
37.285714
484
0.717752
219198860707d1b38e5ebceaa47081745bc45f96
24
asm
Assembly
tests/fn_le/12.asm
NullMember/customasm
6e34d6432583a41278e6b3596f1817ae82149531
[ "Apache-2.0" ]
414
2016-10-14T22:39:20.000Z
2022-03-30T07:52:44.000Z
tests/fn_le/12.asm
NullMember/customasm
6e34d6432583a41278e6b3596f1817ae82149531
[ "Apache-2.0" ]
100
2018-03-22T16:12:24.000Z
2022-03-26T09:19:23.000Z
tests/fn_le/12.asm
NullMember/customasm
6e34d6432583a41278e6b3596f1817ae82149531
[ "Apache-2.0" ]
47
2017-06-29T15:12:13.000Z
2022-03-10T04:50:51.000Z
#d le(0x0123) ; = 0x2301
24
24
0.625
ce5d3fdd187d48eeeb5a3a2c8fdbba6237974e82
3,620
asm
Assembly
libsrc/target/zx/stdio/generic_console_printc.asm
w5Mike/z88dk
f5090488e1d74ead8c865afe6df48231cd5c70ba
[ "ClArtistic" ]
null
null
null
libsrc/target/zx/stdio/generic_console_printc.asm
w5Mike/z88dk
f5090488e1d74ead8c865afe6df48231cd5c70ba
[ "ClArtistic" ]
null
null
null
libsrc/target/zx/stdio/generic_console_printc.asm
w5Mike/z88dk
f5090488e1d74ead8c865afe6df48231cd5c70ba
[ "ClArtistic" ]
null
null
null
; ; Print a character for the ZX/TS2068 screen ; MODULE generic_console_printc SECTION code_driver PUBLIC generic_console_printc EXTERN __zx_console_attr EXTERN __zx_32col_udgs EXTERN __zx_32col_font EXTERN __zx_64col_font EXTERN __console_w EXTERN __zx_printc32 EXTERN __zx_printc64 EXTERN generic_console_flags EXTERN __zx_screenmode EXTERN __zx_mode0_console_w EXTERN __zx_print_routine EXTERN generic_console_zxn_tile_printc EXTERN __sam_printc IF FORsam EXTERN SCREEN_BASE ENDIF ; Entry: ; a = charcter ; hl = expect_flags handle_controls: ; Extra codes cp 18 ld d,1 jr z,start_code ld d,2 cp 19 jr z,start_code ld d,16 cp 1 jr z,start_code cp 2 ret nz ld d,12 start_code: ld a,(hl) or d ld (hl),a ret set_flash: res 0,(hl) ld hl,__zx_console_attr res 7,(hl) rrca ret nc set 7,(hl) ret set_bright: res 1,(hl) ld hl,__zx_console_attr res 6,(hl) rrca ret nc set 6,(hl) ret set_switch: res 4,(hl) ld hl,__zx_printc32 cp 64 ld de,$4020 jr nz,set_switch1 ld hl,__zx_printc64 ld de,$8040 set_switch1: IF FORsam ; For SAM we only support 64column printing in mode0 ld a,(__zx_screenmode) and a ret nz ENDIF IF FORts2068|FORzxn ; In the Timex hires mode, we need to double the number of columns ld a,(__zx_screenmode) IF FORzxn ; When in tilemap mode, we can't switch between 64/32 bit 6,a ret nz ENDIF cp 6 ld a,d jr z,set_width ENDIF ld a,e set_width: ld (__zx_print_routine),hl ld ( __console_w),a ld ( __zx_mode0_console_w),a ret set_font_hi: res 2,(hl) ld (__zx_32col_font+1),a ret set_font_lo: res 3,(hl) ld (__zx_32col_font),a ret ; c = x ; b = y ; a = d character to print ; e = raw generic_console_printc: rr e jr c,skip_control_codes ld hl,expect_flags bit 0,(hl) jr nz,set_flash bit 1,(hl) jr nz,set_bright bit 2,(hl) jr nz,set_font_hi bit 3,(hl) jr nz,set_font_lo bit 4,(hl) jr nz,set_switch cp 32 jp c,handle_controls skip_control_codes: IF FORsam ld a,(__zx_screenmode) and a jp nz,__sam_printc ELIF FORzxn ld a,(__zx_screenmode) bit 6,a jp nz,generic_console_zxn_tile_printc ENDIF ld hl,(__zx_print_routine) jp (hl) SECTION bss_driver expect_flags: defb 0 ; bit 0 - expect flash ; bit 1 - expect bright ; bit 2 - expect font low ; bit 3 - expect font high ; bit 4 - expect switch SECTION code_crt_init ; If we've forced 32 column mode at the crt0 level, then ; switch to it EXTERN __CLIB_ZX_CONIO32 IF FORsam ld hl,__zx_printc64 ld (__zx_print_routine),hl ld a,64 ld (__zx_mode0_console_w),a ELSE ld a,__CLIB_ZX_CONIO32 and a ld a,64 ld hl,__zx_printc64 jr z,no_set_32col ld a,32 ld hl,__zx_printc32 no_set_32col: ld (__zx_print_routine),hl ld (__console_w),a ld (__zx_mode0_console_w),a ENDIF
20.223464
70
0.562155
f21182715c4ca2bcd0752b8d83fd48788593a022
1,597
asm
Assembly
1571/64tass/frets.asm
silverdr/assembly
c2851f7033223e089285dce22443b7e219ed4f61
[ "Unlicense" ]
23
2015-03-23T15:16:57.000Z
2022-03-18T12:43:42.000Z
1571/64tass/frets.asm
silverdr/assembly
c2851f7033223e089285dce22443b7e219ed4f61
[ "Unlicense" ]
null
null
null
1571/64tass/frets.asm
silverdr/assembly
c2851f7033223e089285dce22443b7e219ed4f61
[ "Unlicense" ]
8
2016-04-13T11:19:35.000Z
2021-12-22T07:39:00.000Z
jsr wrtbm frets jmp ptch33 frets2 sec bne fre10 ; free already lda (bmpnt),y ; not free, free it ora bmask,x sta (bmpnt),y jsr dtybam ldy t0 ; point to blks free clc lda (bmpnt),y adc #1 ; add one sta (bmpnt),y lda track cmp dirtrk beq use10 fre20 inc ndbl,x bne fre10 inc ndbh,x fre10 rts dtybam ldx drvnum lda #1 sta mdirty,x rts wused jsr wrtbm ; get bam index usedts jmp ptch34 rtch34 beq + ; used, no action lda (bmpnt),y ; get bits eor bmask,x ; mark sec used sta (bmpnt),y jsr dtybam ; set it dirty ldy t0 lda (bmpnt),y ; count -1 sec sbc #1 sta (bmpnt),y ; save it lda track cmp dirtrk beq use20 use30 lda ndbl,x bne use10 dec ndbh,x use10 dec ndbl,x use20 lda ndbh,x bne + lda ndbl,x jmp ptch66 nop lda #dskful jsr errmsg + rts freuse jsr setbam tya sta temp bambit lda sector ; get sector bit in bam lsr a ; sectr/8 lsr a lsr a sec ; adjust it adc temp tay lda sector ; get remainder and #$07 tax ; bit mask index lda (bmpnt),y and bmask,x rts bmask .byte 1,2,4,8,16,32,64,128
19.240964
47
0.447088
bff06294c3229c445417970324127ae3befd44b7
347
asm
Assembly
oeis/137/A137521.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/137/A137521.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/137/A137521.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A137521: Prime numbers concatenated with 45. ; Submitted by Jamie Morken(s3) ; 245,345,545,745,1145,1345,1745,1945,2345,2945,3145,3745,4145,4345,4745,5345,5945,6145,6745,7145,7345,7945,8345,8945,9745,10145,10345,10745,10945,11345 mul $0,2 max $0,1 seq $0,173919 ; Numbers that are prime or one less than a prime. sub $0,2 mul $0,100 add $0,245
31.545455
152
0.746398
288679f28175ca558f3a94214de852af55ddef1e
5,117
asm
Assembly
Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca.log_21829_1236.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
9
2020-08-13T19:41:58.000Z
2022-03-30T12:22:51.000Z
Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca.log_21829_1236.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
1
2021-04-29T06:29:35.000Z
2021-05-13T21:02:30.000Z
Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca.log_21829_1236.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
3
2020-07-14T17:07:07.000Z
2022-03-21T01:12:22.000Z
.global s_prepare_buffers s_prepare_buffers: push %r11 push %r14 push %r9 push %rbx push %rcx push %rdi push %rsi lea addresses_WC_ht+0x1c887, %rsi lea addresses_A_ht+0xd667, %rdi nop nop xor %r9, %r9 mov $62, %rcx rep movsq nop nop nop lfence lea addresses_UC_ht+0xff97, %r14 nop nop xor %r11, %r11 mov (%r14), %si nop nop xor %rsi, %rsi lea addresses_UC_ht+0xebc7, %rsi clflush (%rsi) nop nop add %rbx, %rbx mov (%rsi), %edi nop xor $13114, %rsi pop %rsi pop %rdi pop %rcx pop %rbx pop %r9 pop %r14 pop %r11 ret .global s_faulty_load s_faulty_load: push %r13 push %r8 push %rax push %rcx push %rdi push %rsi // Store lea addresses_WC+0x8377, %rsi nop nop nop xor %rcx, %rcx movl $0x51525354, (%rsi) nop nop nop nop nop xor %rsi, %rsi // Store lea addresses_UC+0x3727, %rsi nop inc %r8 mov $0x5152535455565758, %r13 movq %r13, %xmm2 movups %xmm2, (%rsi) cmp %rcx, %rcx // Faulty Load lea addresses_RW+0x14927, %r8 nop nop sub %rsi, %rsi vmovups (%r8), %ymm1 vextracti128 $1, %ymm1, %xmm1 vpextrq $1, %xmm1, %rdi lea oracles, %r13 and $0xff, %rdi shlq $12, %rdi mov (%r13,%rdi,1), %rdi pop %rsi pop %rdi pop %rcx pop %rax pop %r8 pop %r13 ret /* <gen_faulty_load> [REF] {'src': {'congruent': 0, 'AVXalign': False, 'same': False, 'size': 4, 'NT': False, 'type': 'addresses_RW'}, 'OP': 'LOAD'} {'OP': 'STOR', 'dst': {'congruent': 3, 'AVXalign': False, 'same': False, 'size': 4, 'NT': True, 'type': 'addresses_WC'}} {'OP': 'STOR', 'dst': {'congruent': 9, 'AVXalign': False, 'same': False, 'size': 16, 'NT': False, 'type': 'addresses_UC'}} [Faulty Load] {'src': {'congruent': 0, 'AVXalign': False, 'same': True, 'size': 32, 'NT': False, 'type': 'addresses_RW'}, 'OP': 'LOAD'} <gen_prepare_buffer> {'src': {'congruent': 5, 'same': False, 'type': 'addresses_WC_ht'}, 'OP': 'REPM', 'dst': {'congruent': 5, 'same': False, 'type': 'addresses_A_ht'}} {'src': {'congruent': 2, 'AVXalign': False, 'same': False, 'size': 2, 'NT': False, 'type': 'addresses_UC_ht'}, 'OP': 'LOAD'} {'src': {'congruent': 3, 'AVXalign': False, 'same': False, 'size': 4, 'NT': False, 'type': 'addresses_UC_ht'}, 'OP': 'LOAD'} {'32': 21829} 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 */
45.283186
2,999
0.657807
568a2a44e8f6df2cea83f3188cb0c312a961bd84
1,688
asm
Assembly
libtool/src/gmp-6.1.2/mpn/s390_32/esame/bdiv_dbm1c.asm
kroggen/aergo
05af317eaa1b62b21dc0144ef74a9e7acb14fb87
[ "MIT" ]
1,602
2015-01-06T11:26:31.000Z
2022-03-30T06:17:21.000Z
libtool/src/gmp-6.1.2/mpn/s390_32/esame/bdiv_dbm1c.asm
kroggen/aergo
05af317eaa1b62b21dc0144ef74a9e7acb14fb87
[ "MIT" ]
11,789
2015-01-05T04:50:15.000Z
2022-03-31T23:39:19.000Z
libtool/src/gmp-6.1.2/mpn/s390_32/esame/bdiv_dbm1c.asm
kroggen/aergo
05af317eaa1b62b21dc0144ef74a9e7acb14fb87
[ "MIT" ]
498
2015-01-08T18:58:18.000Z
2022-03-20T15:37:45.000Z
dnl S/390-32 mpn_bdiv_dbm1c for systems with MLR instruction. dnl Copyright 2011 Free Software Foundation, Inc. dnl This file is part of the GNU MP Library. dnl dnl The GNU MP Library is free software; you can redistribute it and/or modify dnl it under the terms of either: dnl dnl * the GNU Lesser General Public License as published by the Free dnl Software Foundation; either version 3 of the License, or (at your dnl option) any later version. dnl dnl or dnl dnl * the GNU General Public License as published by the Free Software dnl Foundation; either version 2 of the License, or (at your option) any dnl later version. dnl dnl or both in parallel, as here. dnl dnl The GNU MP Library is distributed in the hope that it will be useful, but dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License dnl for more details. dnl dnl You should have received copies of the GNU General Public License and the dnl GNU Lesser General Public License along with the GNU MP Library. If not, dnl see https://www.gnu.org/licenses/. include(`../config.m4') C cycles/limb C z900 14 C z990 10 C z9 ? C z10 ? C z196 ? C INPUT PARAMETERS define(`qp', `%r2') define(`up', `%r3') define(`n', `%r4') define(`bd', `%r5') define(`cy', `%r6') ASM_START() TEXT ALIGN(16) PROLOGUE(mpn_bdiv_dbm1c) stm %r6, %r7, 24(%r15) lhi %r7, 0 C zero index register L(top): l %r1, 0(%r7,up) mlr %r0, bd slr %r6, %r1 st %r6, 0(%r7,qp) slbr %r6, %r0 la %r7, 4(%r7) brct n, L(top) lr %r2, %r6 lm %r6, %r7, 24(%r15) br %r14 EPILOGUE()
25.575758
79
0.694313
31610094ed374c718bf7c7f9a3acfd92e3e55003
291
asm
Assembly
programs/oeis/180/A180596.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
1
2021-03-15T11:38:20.000Z
2021-03-15T11:38:20.000Z
programs/oeis/180/A180596.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
null
null
null
programs/oeis/180/A180596.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
null
null
null
; A180596: Digital root of 6n. ; 0,6,3,9,6,3,9,6,3,9,6,3,9,6,3,9,6,3,9,6,3,9,6,3,9,6,3,9,6,3,9,6,3,9,6,3,9,6,3,9,6,3,9,6,3,9,6,3,9,6,3,9,6,3,9,6,3,9,6,3,9,6,3,9,6,3,9,6,3,9,6,3,9,6,3,9,6,3,9,6,3,9,6,3,9,6,3,9,6,3,9,6,3,9,6,3,9,6,3,9,6,3,9,6,3 mul $0,15 sub $0,1 mod $0,9 add $0,1 mov $1,$0
32.333333
211
0.525773
039366e1b6324a677f7d3bbf0d4970ab757a3539
5,880
asm
Assembly
Transynther/x86/_processed/NONE/_xt_/i7-8650U_0xd2.log_637_10.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
9
2020-08-13T19:41:58.000Z
2022-03-30T12:22:51.000Z
Transynther/x86/_processed/NONE/_xt_/i7-8650U_0xd2.log_637_10.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
1
2021-04-29T06:29:35.000Z
2021-05-13T21:02:30.000Z
Transynther/x86/_processed/NONE/_xt_/i7-8650U_0xd2.log_637_10.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
3
2020-07-14T17:07:07.000Z
2022-03-21T01:12:22.000Z
.global s_prepare_buffers s_prepare_buffers: push %r12 push %r14 push %r9 push %rbx push %rcx push %rdi push %rdx push %rsi lea addresses_WC_ht+0xc625, %rsi clflush (%rsi) nop nop nop nop sub $2581, %r9 mov (%rsi), %bx nop nop nop nop sub $58258, %r9 lea addresses_D_ht+0xe67, %rsi lea addresses_WC_ht+0x1db47, %rdi nop nop dec %r14 mov $99, %rcx rep movsl nop nop nop xor $37734, %r9 lea addresses_A_ht+0x554b, %r14 nop nop sub $34782, %r12 mov (%r14), %ebx nop sub $2587, %r14 lea addresses_D_ht+0x1e1a7, %rsi lea addresses_D_ht+0xe891, %rdi nop nop nop nop nop xor $11275, %rdx mov $81, %rcx rep movsq nop nop sub $48511, %rdx lea addresses_normal_ht+0xe267, %rsi lea addresses_WC_ht+0x5a67, %rdi nop nop xor $20799, %r9 mov $87, %rcx rep movsb and $48269, %rdi lea addresses_WC_ht+0x1ea73, %rsi nop nop nop nop nop and %rdx, %rdx movups (%rsi), %xmm7 vpextrq $1, %xmm7, %rcx nop nop nop nop nop add %rdi, %rdi lea addresses_D_ht+0xb0a7, %rdx nop nop nop inc %r9 movw $0x6162, (%rdx) nop xor %rbx, %rbx lea addresses_WC_ht+0x3367, %r12 nop nop nop nop nop xor %r14, %r14 mov (%r12), %rdx add $29105, %rdx lea addresses_UC_ht+0x158c1, %rdx nop nop nop nop sub $3572, %r14 movw $0x6162, (%rdx) nop nop xor $52998, %rcx pop %rsi pop %rdx pop %rdi pop %rcx pop %rbx pop %r9 pop %r14 pop %r12 ret .global s_faulty_load s_faulty_load: push %r11 push %r13 push %r15 push %rax push %rbp push %rdi push %rsi // Store lea addresses_normal+0x1fe67, %rbp clflush (%rbp) nop nop xor $49901, %rax mov $0x5152535455565758, %r13 movq %r13, %xmm1 vmovups %ymm1, (%rbp) nop nop nop nop cmp %r11, %r11 // Store lea addresses_D+0x53e7, %rax nop nop nop nop nop xor $26183, %r15 movl $0x51525354, (%rax) nop nop nop add $30141, %rax // Load lea addresses_PSE+0x7be7, %rdi nop nop nop nop and %rsi, %rsi mov (%rdi), %r13 nop nop nop nop nop add $58475, %rax // Faulty Load lea addresses_D+0x12e67, %rsi nop nop nop nop cmp $19183, %rbp mov (%rsi), %ax lea oracles, %rsi and $0xff, %rax shlq $12, %rax mov (%rsi,%rax,1), %rax pop %rsi pop %rdi pop %rbp pop %rax pop %r15 pop %r13 pop %r11 ret /* <gen_faulty_load> [REF] {'OP': 'LOAD', 'src': {'type': 'addresses_D', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_normal', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 11, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_D', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 7, 'same': False}} {'OP': 'LOAD', 'src': {'type': 'addresses_PSE', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 7, 'same': False}} [Faulty Load] {'OP': 'LOAD', 'src': {'type': 'addresses_D', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}} <gen_prepare_buffer> {'OP': 'LOAD', 'src': {'type': 'addresses_WC_ht', 'size': 2, 'AVXalign': False, 'NT': True, 'congruent': 1, 'same': False}} {'OP': 'REPM', 'src': {'type': 'addresses_D_ht', 'congruent': 11, 'same': False}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 4, 'same': True}} {'OP': 'LOAD', 'src': {'type': 'addresses_A_ht', 'size': 4, 'AVXalign': True, 'NT': False, 'congruent': 1, 'same': False}} {'OP': 'REPM', 'src': {'type': 'addresses_D_ht', 'congruent': 6, 'same': True}, 'dst': {'type': 'addresses_D_ht', 'congruent': 1, 'same': False}} {'OP': 'REPM', 'src': {'type': 'addresses_normal_ht', 'congruent': 10, 'same': False}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 10, 'same': False}} {'OP': 'LOAD', 'src': {'type': 'addresses_WC_ht', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 2, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_D_ht', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 6, 'same': False}} {'OP': 'LOAD', 'src': {'type': 'addresses_WC_ht', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 8, 'same': True}} {'OP': 'STOR', 'dst': {'type': 'addresses_UC_ht', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 1, 'same': False}} {'36': 637} 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 */
27.735849
1,910
0.653401
bb07cc60af205ee0887f127fe6fca02c0c3c6003
258
asm
Assembly
libsrc/_DEVELOPMENT/adt/p_forward_list/c/sdcc_iy/p_forward_list_remove_after_fastcall.asm
meesokim/z88dk
5763c7778f19a71d936b3200374059d267066bb2
[ "ClArtistic" ]
null
null
null
libsrc/_DEVELOPMENT/adt/p_forward_list/c/sdcc_iy/p_forward_list_remove_after_fastcall.asm
meesokim/z88dk
5763c7778f19a71d936b3200374059d267066bb2
[ "ClArtistic" ]
null
null
null
libsrc/_DEVELOPMENT/adt/p_forward_list/c/sdcc_iy/p_forward_list_remove_after_fastcall.asm
meesokim/z88dk
5763c7778f19a71d936b3200374059d267066bb2
[ "ClArtistic" ]
null
null
null
; void *p_forward_list_remove_after_fastcall(void *list_item) SECTION code_adt_p_forward_list PUBLIC _p_forward_list_remove_after_fastcall _p_forward_list_remove_after_fastcall: INCLUDE "adt/p_forward_list/z80/asm_p_forward_list_remove_after.asm"
23.454545
71
0.868217
2136618489f56f76fb2e84ee77dad71eae72cd8c
3,036
asm
Assembly
Src/math.asm
slowcorners/Minimal-FORTH
afb1bcac3018f5a72c5dcafa37c5dee497382d15
[ "MIT" ]
1
2021-06-13T18:31:19.000Z
2021-06-13T18:31:19.000Z
Src/math.asm
slowcorners/Minimal-FORTH
afb1bcac3018f5a72c5dcafa37c5dee497382d15
[ "MIT" ]
null
null
null
Src/math.asm
slowcorners/Minimal-FORTH
afb1bcac3018f5a72c5dcafa37c5dee497382d15
[ "MIT" ]
null
null
null
; ---------------------------------------------------------------------- ; MATHEMATICS WORDS HSTOD: DB ^4 "S->" ^'D' ; ***** S->D DW HCOLD STOD: DW STOD0 STOD0: CLW R1 ; Assume high word zero INW SP ; Get operand high byte LDR SP ; : CPI 0 ; Negative? BMI STOD10 ; YES: Push 0xFFFF DEW SP ; : JPA PUSH ; NO: Push 0x0000 STOD10: DEW SP ; : DEW R1 ; Make 0x0000 into 0xFFFF JPA PUSH ; Done HPM: DB ^2 "+" ^'-' ; ***** +- DW HSTOD PM: DW DOCOL ZLESS ZBRAN +PM10 DW MINUS PM10: DW SEMIS HDPM: DB ^3 "D+" ^'-' ; ***** D+- DW HPM DPM: DW DOCOL ZLESS ZBRAN +DPM10 DW DMINU DPM10: DW SEMIS HABS: DB ^3 "AB" ^'S' ; ***** ABS DW HDPM ABS: DW DOCOL DUP PM SEMIS HDABS: DB ^4 "DAB" ^'S' ; ***** DABS DW HABS DABS: DW DOCOL DUP DPM SEMIS HMIN: DB ^3 "MI" ^'N' ; ***** MIN DW HDABS MIN: DW DOCOL OVER OVER GREAT ZBRAN +MIN10 DW SWAP MIN10: DW DROP SEMIS HMAX: DB ^3 "MA" ^'X' ; ***** MAX DW HMIN MAX: DW DOCOL OVER OVER LESS ZBRAN +MAX10 DW SWAP MAX10: DW DROP SEMIS HMSTAR: DB ^2 "M" ^'*' ; ****** M* DW HMAX MSTAR: DW DOCOL OVER OVER XOR TOR ABS SWAP ABS DW USTAR FROMR DPM SEMIS HMSLAS: DB ^2 "M" ^'/' ; ***** M/ DW HMSTAR MSLAS: DW DOCOL OVER TOR TOR DABS R ABS DW USLAS FROMR R XOR PM SWAP DW FROMR PM SWAP SEMIS HSTAR: DB ^1 ^'*' ; ***** * DW HMSLAS STAR: DW DOCOL MSTAR DROP SEMIS HSLMOD: DB ^4 "/MO" ^'D' ; ***** /MOD DW HSTAR SLMOD: DW DOCOL TOR STOD FROMR MSLAS SEMIS HSLAS: DB ^1 ^'/' ; ***** / DW HSLMOD SLASH: DW DOCOL SLMOD SWAP DROP SEMIS HMOD: DB ^3 "MO" ^'D' ; ***** MOD DW HSLAS MOD: DW DOCOL SLMOD DROP SEMIS HSSMOD: DB ^5 "*/MO" ^'D' ; ***** */MOD DW HMOD SSMOD: DW DOCOL TOR MSTAR FROMR MSLAS SEMIS HSSLA: DB ^2 "*" ^'/' ; ***** */ DW HSSMOD SSLA: DW DOCOL SSMOD SWAP DROP SEMIS HMSMOD: DB ^5 "M/MO" ^'D' ; ***** M/MOD DW HSSMOD MSMOD: DW DOCOL TOR ZERO R USLAS FROMR DW SWAP TOR USLAS FROMR SEMIS
34.11236
72
0.355402
2d6aa20abb293e024ea6d07742d96642d9a4ea55
268
asm
Assembly
programs/oeis/060/A060621.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
22
2018-02-06T19:19:31.000Z
2022-01-17T21:53:31.000Z
programs/oeis/060/A060621.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
41
2021-02-22T19:00:34.000Z
2021-08-28T10:47:47.000Z
programs/oeis/060/A060621.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
5
2021-02-24T21:14:16.000Z
2021-08-09T19:48:05.000Z
; A060621: Number of flips between the d-dimensional tilings of the unary zonotope Z(D,d). Here the codimension D-d is equal to 3 and d varies. ; 12,36,100,264,672,1664,4032,9600,22528,52224 add $0,6 mov $1,2 pow $1,$0 bin $0,2 sub $0,3 mul $0,$1 div $0,256 mul $0,4
22.333333
143
0.697761
74aa4f78201e28cb552a44bc2359d81cdc94c572
379
asm
Assembly
programs/oeis/262/A262725.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
22
2018-02-06T19:19:31.000Z
2022-01-17T21:53:31.000Z
programs/oeis/262/A262725.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
41
2021-02-22T19:00:34.000Z
2021-08-28T10:47:47.000Z
programs/oeis/262/A262725.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
5
2021-02-24T21:14:16.000Z
2021-08-09T19:48:05.000Z
; A262725: The unique function f with f(1)=1 and f(jD!+k)=(-1)^j f(k) for all D, j=1..D, and k=1..D!. ; 1,-1,-1,1,1,-1,-1,1,1,-1,-1,1,1,-1,-1,1,1,-1,-1,1,1,-1,-1,1,-1,1,1,-1,-1,1,1,-1,-1,1,1,-1,-1,1,1,-1,-1,1,1,-1,-1,1,1,-1,1,-1,-1,1,1,-1,-1,1,1,-1,-1,1,1,-1,-1,1,1,-1,-1,1,1,-1,-1,1 mov $1,$0 div $0,24 sub $0,3 mov $2,3 add $2,$1 div $2,2 sub $0,$2 mod $0,2 mul $0,2 add $0,1
27.071429
181
0.480211
5dd2a662c153d2fde98150308f3b55003f0264fc
5,769
asm
Assembly
Transynther/x86/_processed/NONE/_xt_sm_/i3-7100_9_0x84_notsx.log_2_2560.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
9
2020-08-13T19:41:58.000Z
2022-03-30T12:22:51.000Z
Transynther/x86/_processed/NONE/_xt_sm_/i3-7100_9_0x84_notsx.log_2_2560.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
1
2021-04-29T06:29:35.000Z
2021-05-13T21:02:30.000Z
Transynther/x86/_processed/NONE/_xt_sm_/i3-7100_9_0x84_notsx.log_2_2560.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
3
2020-07-14T17:07:07.000Z
2022-03-21T01:12:22.000Z
.global s_prepare_buffers s_prepare_buffers: push %r13 push %r14 push %rbp push %rcx push %rdi push %rdx push %rsi lea addresses_WC_ht+0x136b4, %rsi lea addresses_D_ht+0x420b, %rdi add %r13, %r13 mov $35, %rcx rep movsl nop sub %rdi, %rdi lea addresses_UC_ht+0x175a4, %rdx nop sub $26877, %rbp movw $0x6162, (%rdx) nop nop nop dec %rcx lea addresses_A_ht+0x5bd8, %rdi nop nop nop nop nop xor $47840, %rsi mov $0x6162636465666768, %rcx movq %rcx, (%rdi) nop nop nop xor %rbp, %rbp lea addresses_WC_ht+0x19d24, %rcx nop nop nop nop nop add $46110, %rsi movw $0x6162, (%rcx) nop nop nop nop cmp $27897, %rcx lea addresses_A_ht+0x5984, %rsi lea addresses_WT_ht+0xb984, %rdi nop nop nop nop xor $36172, %r14 mov $122, %rcx rep movsl nop nop nop nop mfence lea addresses_UC_ht+0x1c834, %r14 clflush (%r14) nop nop nop nop nop add $41937, %rsi mov (%r14), %rdx nop nop nop nop nop cmp %rdi, %rdi pop %rsi pop %rdx pop %rdi pop %rcx pop %rbp pop %r14 pop %r13 ret .global s_faulty_load s_faulty_load: push %r10 push %r13 push %r14 push %r9 push %rax push %rbx push %rcx // Store lea addresses_A+0x7c04, %rcx nop nop nop nop nop add $62538, %rax movw $0x5152, (%rcx) nop cmp $48208, %rbx // Store lea addresses_UC+0xd044, %r10 nop nop nop nop nop and $46453, %rax mov $0x5152535455565758, %r14 movq %r14, (%r10) nop nop xor $40622, %r14 // Store lea addresses_normal+0xdb84, %rax nop nop nop nop sub %rbx, %rbx movl $0x51525354, (%rax) nop nop nop nop nop xor $459, %rbx // Store lea addresses_normal+0x2f84, %rbx nop xor $4482, %r9 movb $0x51, (%rbx) nop nop nop nop and $17078, %rbx // Load lea addresses_normal+0x1a244, %r13 nop nop nop nop nop dec %r14 movups (%r13), %xmm5 vpextrq $1, %xmm5, %rcx nop nop nop nop add %r13, %r13 // Store lea addresses_WT+0x1ef04, %r9 nop nop nop nop cmp $62135, %rax movw $0x5152, (%r9) nop cmp %rcx, %rcx // Store lea addresses_normal+0x14184, %r13 nop nop nop nop dec %r9 movl $0x51525354, (%r13) nop nop nop nop and $49443, %r13 // Store mov $0x150ba80000000024, %rcx nop nop nop nop and %rbx, %rbx movl $0x51525354, (%rcx) // Exception!!! nop nop nop mov (0), %r13 nop nop nop nop nop sub $59018, %rcx // Store lea addresses_D+0xfa0c, %rcx nop nop nop nop and $60665, %r13 movb $0x51, (%rcx) nop nop nop nop nop sub $28708, %rbx // Store lea addresses_RW+0x19d84, %r10 nop nop nop nop nop add %rcx, %rcx movb $0x51, (%r10) nop nop nop dec %rax // Store lea addresses_A+0x2084, %r10 nop nop nop nop nop xor %rcx, %rcx mov $0x5152535455565758, %r9 movq %r9, %xmm2 vmovups %ymm2, (%r10) // Exception!!! mov (0), %rbx cmp %rax, %rax // Store lea addresses_WC+0xdede, %rax nop nop sub %rcx, %rcx movl $0x51525354, (%rax) inc %rax // Store lea addresses_PSE+0x6184, %rax nop nop add $21690, %r13 mov $0x5152535455565758, %rcx movq %rcx, (%rax) nop inc %r10 // Faulty Load lea addresses_normal+0x14184, %r9 nop nop nop nop xor $60447, %r14 mov (%r9), %eax lea oracles, %r9 and $0xff, %rax shlq $12, %rax mov (%r9,%rax,1), %rax pop %rcx pop %rbx pop %rax pop %r9 pop %r14 pop %r13 pop %r10 ret /* <gen_faulty_load> [REF] {'src': {'type': 'addresses_normal', 'same': False, 'size': 32, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'} {'dst': {'type': 'addresses_A', 'same': False, 'size': 2, 'congruent': 6, 'NT': False, 'AVXalign': True}, 'OP': 'STOR'} {'dst': {'type': 'addresses_UC', 'same': False, 'size': 8, 'congruent': 5, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'} {'dst': {'type': 'addresses_normal', 'same': False, 'size': 4, 'congruent': 9, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'} {'dst': {'type': 'addresses_normal', 'same': False, 'size': 1, 'congruent': 6, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'} {'src': {'type': 'addresses_normal', 'same': False, 'size': 16, 'congruent': 5, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'} {'dst': {'type': 'addresses_WT', 'same': False, 'size': 2, 'congruent': 6, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'} {'dst': {'type': 'addresses_normal', 'same': True, 'size': 4, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'} {'dst': {'type': 'addresses_NC', 'same': False, 'size': 4, 'congruent': 5, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'} {'dst': {'type': 'addresses_D', 'same': False, 'size': 1, 'congruent': 3, 'NT': False, 'AVXalign': True}, 'OP': 'STOR'} {'dst': {'type': 'addresses_RW', 'same': False, 'size': 1, 'congruent': 10, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'} {'dst': {'type': 'addresses_A', 'same': False, 'size': 32, 'congruent': 8, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'} {'dst': {'type': 'addresses_WC', 'same': False, 'size': 4, 'congruent': 1, 'NT': False, 'AVXalign': True}, 'OP': 'STOR'} {'dst': {'type': 'addresses_PSE', 'same': False, 'size': 8, 'congruent': 9, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'} [Faulty Load] {'src': {'type': 'addresses_normal', 'same': True, 'size': 4, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'} <gen_prepare_buffer> {'src': {'type': 'addresses_WC_ht', 'congruent': 3, 'same': False}, 'dst': {'type': 'addresses_D_ht', 'congruent': 0, 'same': False}, 'OP': 'REPM'} {'dst': {'type': 'addresses_UC_ht', 'same': False, 'size': 2, 'congruent': 5, 'NT': False, 'AVXalign': True}, 'OP': 'STOR'} {'dst': {'type': 'addresses_A_ht', 'same': False, 'size': 8, 'congruent': 1, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'} {'dst': {'type': 'addresses_WC_ht', 'same': False, 'size': 2, 'congruent': 4, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'} {'src': {'type': 'addresses_A_ht', 'congruent': 10, 'same': False}, 'dst': {'type': 'addresses_WT_ht', 'congruent': 11, 'same': False}, 'OP': 'REPM'} {'src': {'type': 'addresses_UC_ht', 'same': False, 'size': 8, 'congruent': 4, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'} {'54': 2} 54 54 */
17.696319
149
0.641706
2232f74acdd0b2d2d8bc83d0ce78ef0752c58271
417
asm
Assembly
programs/oeis/211/A211263.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
1
2021-03-15T11:38:20.000Z
2021-03-15T11:38:20.000Z
programs/oeis/211/A211263.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
null
null
null
programs/oeis/211/A211263.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
null
null
null
; A211263: Number of integer pairs (x,y) such that 0<x<y<=n and x*y=floor(n/2). ; 0,0,0,1,1,1,1,1,1,1,1,2,2,1,1,2,2,1,1,2,2,1,1,3,3,1,1,2,2,2,2,2,2,1,1,3,3,1,1,3,3,2,2,2,2,1,1,4,4,1,1,2,2,2,2,3,3,1,1,4,4,1,1,3,3,2,2,2,2,2,2,4,4,1,1,2,2,2,2,4,4,1,1,4,4,1,1,3,3,3,3,2,2,1,1,5,5,1,1 sub $0,1 div $0,2 cal $0,5 ; d(n) (also called tau(n) or sigma_0(n)), the number of divisors of n. add $0,4 mov $1,$0 div $1,2 sub $1,2
37.909091
199
0.563549
a06660c5a067848f1246e35193d124a33b057af0
206
asm
Assembly
test/pipeline.asm
sinofp/napalm
d06abf10d5dd8ec0ad35560a45b73c01323a9451
[ "MIT" ]
4
2020-10-10T06:47:44.000Z
2021-11-16T14:35:39.000Z
test/pipeline.asm
sinofp/napalm
d06abf10d5dd8ec0ad35560a45b73c01323a9451
[ "MIT" ]
null
null
null
test/pipeline.asm
sinofp/napalm
d06abf10d5dd8ec0ad35560a45b73c01323a9451
[ "MIT" ]
1
2021-03-08T11:49:07.000Z
2021-03-08T11:49:07.000Z
.data var: .word 1000 .text la $t0, var lw $t1, ($t0) nop add $t2, $t1, $t1 addi $t3, $t1, 2000 lui $t3, 3000 add $t4, $t3, $t2 lb $t4, ($t0) add $t5, $t4, $t3 addi $t5, $0, 11 sb $t5, ($t0) sw $t3, ($t0)
12.117647
19
0.533981
ab4d1f3801e48eb7645d4bc2c356b4081a63fa9d
999
asm
Assembly
src/GameLogic.asm
gregor434/SnakeV
fa150d4966d8f42dd87dc4bf0ddffe8e147d1073
[ "MIT" ]
null
null
null
src/GameLogic.asm
gregor434/SnakeV
fa150d4966d8f42dd87dc4bf0ddffe8e147d1073
[ "MIT" ]
null
null
null
src/GameLogic.asm
gregor434/SnakeV
fa150d4966d8f42dd87dc4bf0ddffe8e147d1073
[ "MIT" ]
null
null
null
logic: .data addi s0, zero, zero #Leftborder addi s1, zero, zero #Rightborder addi s2, zero, zero #Bottomborder addi s3, zero, zero #Topborder addi s4, zero, zero #Gameover addi s5, zero, zero #Score addi s6, zero, zero #Snakelength addi s7, zero, zero #SnakeX addi s8, zero,zero #SnakeY addi s9,zero,zero #FruitX addi s10,zero,zero #FruitY .word snake 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 .text #function checking for the borders collision: beq s7,s0,gameover #Leftborder Kollision beq s7,s1,gameover #Rightborder Kollision beq s8,s2,gameover #Bottomborder Kollision beq s8,s3,gameover #Topborder Kollision fruitpickup: #function checking for fruitpickup beq s7,s9,pickup pickup: beq s8,s10,score #Jump back to main score: #Score hochzählen und Pickup neu setzen addi s5,s5,10 #Rand um X und Y neu zu setzen addi s9,s9,30 addi s10,s10,30 selfkollision: #Array durchchecken und mit X&Y vegleichen #Im 2. Schritt vergleichen ob Arrayelement auf 1 gesetzt ist #Jump back to main gameover:
18.5
60
0.756757
2614048adc21d1c81881f65f49d1d0b3e7763c9e
306
asm
Assembly
oeis/097/A097200.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/097/A097200.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/097/A097200.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A097200: Numbers of the form p^5 + 5^p for p prime. ; 57,368,6250,94932,48989176,1221074418,762940872982,19073488804224,11920928961514468,186264514923116214274,4656612873077421207276,72759576141834259102547082,45474735088646411895867809326 seq $0,40 ; The prime numbers. seq $0,1593 ; a(n) = 5^n + n^5.
51
187
0.797386
85aa3546c165a815969e7a62cbaab16204f58090
346
asm
Assembly
programs/oeis/029/A029115.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
22
2018-02-06T19:19:31.000Z
2022-01-17T21:53:31.000Z
programs/oeis/029/A029115.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
41
2021-02-22T19:00:34.000Z
2021-08-28T10:47:47.000Z
programs/oeis/029/A029115.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
5
2021-02-24T21:14:16.000Z
2021-08-09T19:48:05.000Z
; A029115: Expansion of 1/((1-x)(1-x^6)(1-x^10)(1-x^11)). ; 1,1,1,1,1,1,2,2,2,2,3,4,5,5,5,5,6,7,8,8,9,10,12,13,14,14,15,16,18,19,21,22,24,26,28,29,31,32,34,36,39,41,44,46,49,51,54,56,59,61,65,68,72,75,79,82,86,89,93,96,101 lpb $0 mov $2,$0 sub $0,6 seq $2,25793 ; Expansion of 1/((1-x)(1-x^10)(1-x^11)). add $1,$2 lpe add $1,1 mov $0,$1
28.833333
164
0.569364
b0c40f17e937fdffc80a863e916c878241f1dfa5
673
asm
Assembly
oeis/086/A086331.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/086/A086331.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/086/A086331.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A086331: E.g.f.: exp(x)/(1 + LambertW(-x)). ; Submitted by Jamie Morken(w2) ; 1,2,7,43,393,4721,69853,1225757,24866481,572410513,14738647221,419682895325,13094075689225,444198818128313,16278315877572141,640854237634448101,26973655480577228769,1208724395795734172705,57453178877303382607717,2887169565412587866031533,152941483481236379047479801,8517746992912603097394307657,497544721915562629045306767837,30416117631729054411122611747253,1942130403073488604888407149637457,129290510945062813482020976151841201,8958650994769933077662934688841949333 mov $4,$0 lpb $0 mov $2,$0 pow $2,$0 mov $3,$4 bin $3,$0 sub $0,1 mul $3,$2 add $5,$3 lpe mov $0,$5 add $0,1
39.588235
470
0.812779
0f06a1c59ece3828542dcbdccdd62f386f05ecf3
350
asm
Assembly
oeis/194/A194826.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/194/A194826.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/194/A194826.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A194826: Units' digits of the nonzero 9-gonal (nonagonal) numbers. ; Submitted by Christian Krause ; 1,9,4,6,5,1,4,4,1,5,6,4,9,1,0,6,9,9,6,0,1,9,4,6,5,1,4,4,1,5,6,4,9,1,0,6,9,9,6,0,1,9,4,6,5,1,4,4,1,5,6,4,9,1,0,6,9,9,6,0,1,9,4,6,5,1,4,4,1,5,6,4,9,1,0,6,9,9,6,0,1,9,4,6,5,1,4,4,1,5,6,4,9,1,0,6,9,9,6,0 add $0,4 bin $0,2 sub $0,3 mul $0,7 mod $0,10
35
201
0.582857
3d90ac6d4e7cd54e5e4322f52fafcba94eef943a
85
asm
Assembly
libsrc/math/daimath32/c/asm/___dai32_xasin.asm
ahjelm/z88dk
c4de367f39a76b41f6390ceeab77737e148178fa
[ "ClArtistic" ]
640
2017-01-14T23:33:45.000Z
2022-03-30T11:28:42.000Z
libsrc/math/daimath32/c/asm/___dai32_xasin.asm
C-Chads/z88dk
a4141a8e51205c6414b4ae3263b633c4265778e6
[ "ClArtistic" ]
1,600
2017-01-15T16:12:02.000Z
2022-03-31T12:11:12.000Z
libsrc/math/daimath32/c/asm/___dai32_xasin.asm
C-Chads/z88dk
a4141a8e51205c6414b4ae3263b633c4265778e6
[ "ClArtistic" ]
215
2017-01-17T10:43:03.000Z
2022-03-23T17:25:02.000Z
SECTION code_fp_dai32 PUBLIC ___dai32_xasin EXTERN xasin defc ___dai32_xasin = xasin
17
27
0.870588
7e7fd7e77127f91a687c9551cf81f6128a0520a8
841
asm
Assembly
tests/test_multiple_instruments.asm
moitias/sointu
7e3dc19c83b8518f01cd384fef213ade7116d2e3
[ "MIT" ]
null
null
null
tests/test_multiple_instruments.asm
moitias/sointu
7e3dc19c83b8518f01cd384fef213ade7116d2e3
[ "MIT" ]
null
null
null
tests/test_multiple_instruments.asm
moitias/sointu
7e3dc19c83b8518f01cd384fef213ade7116d2e3
[ "MIT" ]
null
null
null
%define BPM 100 %include "../src/sointu.inc" BEGIN_PATTERNS PATTERN 64,HLD,HLD,HLD,HLD,HLD,HLD,HLD, 0, 0, 0,0,0,0,0,0, PATTERN 0, 0, 0, 0, 0, 0, 0, 0,64,HLD,HLD,0,0,0,0,0, END_PATTERNS BEGIN_TRACKS TRACK VOICES(1),0 TRACK VOICES(1),1 END_TRACKS BEGIN_PATCH BEGIN_INSTRUMENT VOICES(1) ; Instrument0 SU_ENVELOPE MONO,ATTAC(64),DECAY(64),SUSTAIN(64),RELEASE(80),GAIN(128) SU_ENVELOPE MONO,ATTAC(64),DECAY(64),SUSTAIN(64),RELEASE(80),GAIN(0) SU_OUT STEREO,GAIN(128) END_INSTRUMENT BEGIN_INSTRUMENT VOICES(1) ; Instrument1 SU_ENVELOPE MONO,ATTAC(32),DECAY(32),SUSTAIN(64),RELEASE(80),GAIN(0) SU_ENVELOPE MONO,ATTAC(32),DECAY(32),SUSTAIN(64),RELEASE(80),GAIN(128) SU_OUT STEREO,GAIN(128) END_INSTRUMENT END_PATCH %include "../src/sointu.asm"
29
78
0.661118
1cb908339e4507f00f3c7c51a2bacdb672688cbe
604
asm
Assembly
programs/oeis/285/A285384.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
1
2021-03-15T11:38:20.000Z
2021-03-15T11:38:20.000Z
programs/oeis/285/A285384.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
null
null
null
programs/oeis/285/A285384.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
null
null
null
; A285384: Limiting 1-word of the morphism 0 -> 11, 1 -> 01. ; 1,1,0,1,1,1,0,1,0,1,0,1,1,1,0,1,1,1,0,1,1,1,0,1,0,1,0,1,1,1,0,1,0,1,0,1,1,1,0,1,0,1,0,1,1,1,0,1,1,1,0,1,1,1,0,1,0,1,0,1,1,1,0,1,1,1,0,1,1,1,0,1,0,1,0,1,1,1,0,1,1,1,0,1,1,1,0,1,0,1,0,1,1,1,0,1,0,1,0,1,1,1,0,1,0,1,0,1,1,1,0,1,1,1,0,1,1,1,0,1,0,1,0,1,1,1,0,1,0,1,0,1,1,1,0,1,0,1,0,1,1,1,0,1,1,1,0,1,1,1,0,1,0,1,0,1,1,1,0,1,0,1,0,1,1,1,0,1,0,1,0,1,1,1,0,1,1,1,0,1,1,1,0,1,0,1,0,1,1,1,0,1,1,1,0,1,1,1,0,1,0,1,0,1,1,1,0,1,1,1,0,1,1,1,0,1,0,1,0,1,1,1,0,1,0,1,0,1,1,1,0,1,0,1,0,1,1,1,0,1,1,1,0,1,1,1,0,1,0,1 gcd $0,4096 mod $0,3 mov $1,1 div $1,$0
75.5
501
0.516556
7b3ee2f8bba0eeec6b6fa4816d1219a8944da12c
4,962
asm
Assembly
Transynther/x86/_processed/AVXALIGN/_zr_/i7-7700_9_0xca_notsx.log_1056_1069.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
9
2020-08-13T19:41:58.000Z
2022-03-30T12:22:51.000Z
Transynther/x86/_processed/AVXALIGN/_zr_/i7-7700_9_0xca_notsx.log_1056_1069.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
1
2021-04-29T06:29:35.000Z
2021-05-13T21:02:30.000Z
Transynther/x86/_processed/AVXALIGN/_zr_/i7-7700_9_0xca_notsx.log_1056_1069.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
3
2020-07-14T17:07:07.000Z
2022-03-21T01:12:22.000Z
.global s_prepare_buffers s_prepare_buffers: push %r13 push %r8 push %r9 push %rcx push %rdi push %rsi lea addresses_normal_ht+0x71bc, %rsi lea addresses_A_ht+0x793c, %rdi clflush (%rsi) nop nop nop nop xor %r9, %r9 mov $68, %rcx rep movsl and %r13, %r13 lea addresses_A_ht+0xa13c, %r8 nop nop nop nop nop xor $5196, %r13 movw $0x6162, (%r8) nop nop nop xor %rsi, %rsi pop %rsi pop %rdi pop %rcx pop %r9 pop %r8 pop %r13 ret .global s_faulty_load s_faulty_load: push %r10 push %r11 push %r12 push %r9 push %rax push %rdi push %rsi // Store lea addresses_UC+0x1c05c, %rdi sub $29492, %rsi mov $0x5152535455565758, %r12 movq %r12, %xmm5 vmovaps %ymm5, (%rdi) nop nop nop xor $25935, %r12 // Store lea addresses_US+0x101c4, %rdi cmp %r11, %r11 mov $0x5152535455565758, %r12 movq %r12, %xmm0 vmovups %ymm0, (%rdi) nop nop nop nop nop xor $6979, %rsi // Faulty Load mov $0x3c, %rax clflush (%rax) nop nop nop nop nop sub $61246, %r10 movaps (%rax), %xmm6 vpextrq $0, %xmm6, %rdi lea oracles, %rax and $0xff, %rdi shlq $12, %rdi mov (%rax,%rdi,1), %rdi pop %rsi pop %rdi pop %rax pop %r9 pop %r12 pop %r11 pop %r10 ret /* <gen_faulty_load> [REF] {'src': {'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 0, 'same': True, 'type': 'addresses_P'}, 'OP': 'LOAD'} {'dst': {'NT': False, 'AVXalign': True, 'size': 32, 'congruent': 5, 'same': False, 'type': 'addresses_UC'}, 'OP': 'STOR'} {'dst': {'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 3, 'same': False, 'type': 'addresses_US'}, 'OP': 'STOR'} [Faulty Load] {'src': {'NT': False, 'AVXalign': True, 'size': 16, 'congruent': 0, 'same': True, 'type': 'addresses_P'}, 'OP': 'LOAD'} <gen_prepare_buffer> {'src': {'congruent': 7, 'same': False, 'type': 'addresses_normal_ht'}, 'dst': {'congruent': 8, 'same': False, 'type': 'addresses_A_ht'}, 'OP': 'REPM'} {'dst': {'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 8, 'same': False, 'type': 'addresses_A_ht'}, 'OP': 'STOR'} {'00': 1056} 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 */
44.303571
2,999
0.659412
be28a2e5abc84cad71cddfe10756fc7b04e8ea4d
939
asm
Assembly
vccc2021/treesta.asm
blu/m68k-misc
e2443976e4fec63f17c28b3d88fccee7a35d927a
[ "MIT" ]
3
2021-12-25T20:08:09.000Z
2022-01-15T08:39:29.000Z
vccc2021/treesta.asm
blu/m68k-misc
e2443976e4fec63f17c28b3d88fccee7a35d927a
[ "MIT" ]
null
null
null
vccc2021/treesta.asm
blu/m68k-misc
e2443976e4fec63f17c28b3d88fccee7a35d927a
[ "MIT" ]
null
null
null
ea_user equ $020000 ea_stack equ $080000 ea_vicky equ $c40000 ea_text0 equ $c60000 ea_texa0 equ $c68000 ea_text1 equ $ca0000 ea_texa1 equ $ca8000 tx0_w equ 72 tx0_h equ 56 tx1_w equ 80 tx1_h equ 60 ; we want absolute addresses -- with moto/vasm that means ; just use org; don't use sections as they cause resetting ; of the current offset for generation of relocatable code org ea_user ; we get injected right into supervisor mode, interrupt-style ; demote ourselves to user mode movea.l #ea_stack,a1 move.l a1,usp andi.w #$dfff,sr ; draw symmetrically by static definition lea arr,a0 movea.l #ea_text1,a1 moveq #0,d0 row: move.b (a0)+,d0 beq quit symmetrical_dots: neg.w d0 move.b #'*',15(a1,d0.w) neg.w d0 move.b #'*',13(a1,d0.w) subi.w #1,d0 bne symmetrical_dots lea tx1_w(a1),a1 bra row quit: moveq #0,d0 ; syscall_exit trap #15 arr: dc.b $1, $2, $3, $4, $2, $4, $6, $8 dc.b $3, $6, $9, $c, $2, $2, $0
19.5625
62
0.696486
dcae22a06d36518f48f929256d32c360d51237e2
3,020
asm
Assembly
Transynther/x86/_processed/US/_zr_/i9-9900K_12_0xca_notsx.log_7_1238.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
9
2020-08-13T19:41:58.000Z
2022-03-30T12:22:51.000Z
Transynther/x86/_processed/US/_zr_/i9-9900K_12_0xca_notsx.log_7_1238.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
1
2021-04-29T06:29:35.000Z
2021-05-13T21:02:30.000Z
Transynther/x86/_processed/US/_zr_/i9-9900K_12_0xca_notsx.log_7_1238.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
3
2020-07-14T17:07:07.000Z
2022-03-21T01:12:22.000Z
.global s_prepare_buffers s_prepare_buffers: push %r10 push %r14 push %r15 push %rax push %rbx push %rcx push %rdi push %rdx push %rsi lea addresses_UC_ht+0x17a5a, %rbx nop nop cmp $51913, %r15 mov $0x6162636465666768, %r14 movq %r14, (%rbx) sub $38561, %rdx lea addresses_normal_ht+0x9f6a, %r14 nop nop nop dec %r10 movb $0x61, (%r14) nop nop nop nop add %rdx, %rdx lea addresses_D_ht+0xfcfa, %r14 nop nop and $45297, %rcx movl $0x61626364, (%r14) nop nop nop nop and $23323, %rbx lea addresses_WC_ht+0xcc6a, %r15 and $59182, %rdx mov $0x6162636465666768, %r10 movq %r10, %xmm7 and $0xffffffffffffffc0, %r15 movntdq %xmm7, (%r15) add $63365, %rax lea addresses_WC_ht+0x10627, %rax nop nop and $10420, %rbx mov (%rax), %r14d nop nop nop cmp %rcx, %rcx lea addresses_D_ht+0x1226a, %rdx nop nop nop nop inc %r15 mov $0x6162636465666768, %rax movq %rax, %xmm7 and $0xffffffffffffffc0, %rdx movntdq %xmm7, (%rdx) nop nop nop nop nop xor %rax, %rax lea addresses_UC_ht+0x1da6a, %rsi lea addresses_normal_ht+0x10ce, %rdi nop and %rax, %rax mov $17, %rcx rep movsw cmp $27310, %rsi pop %rsi pop %rdx pop %rdi pop %rcx pop %rbx pop %rax pop %r15 pop %r14 pop %r10 ret .global s_faulty_load s_faulty_load: push %r11 push %r12 push %r13 push %rax push %rcx push %rdx // Store lea addresses_A+0xca6a, %rax nop nop nop nop nop and %r13, %r13 mov $0x5152535455565758, %rcx movq %rcx, %xmm3 vmovups %ymm3, (%rax) nop cmp %r13, %r13 // Faulty Load lea addresses_US+0xa26a, %rcx nop nop nop nop nop cmp %rdx, %rdx mov (%rcx), %r13d lea oracles, %r12 and $0xff, %r13 shlq $12, %r13 mov (%r12,%r13,1), %r13 pop %rdx pop %rcx pop %rax pop %r13 pop %r12 pop %r11 ret /* <gen_faulty_load> [REF] {'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_US', 'NT': True, 'AVXalign': False, 'size': 8, 'congruent': 0}} {'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_A', 'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 11}} [Faulty Load] {'OP': 'LOAD', 'src': {'same': True, 'type': 'addresses_US', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 0}} <gen_prepare_buffer> {'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_UC_ht', 'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 4}} {'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_normal_ht', 'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 8}} {'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_D_ht', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 3}} {'OP': 'STOR', 'dst': {'same': True, 'type': 'addresses_WC_ht', 'NT': True, 'AVXalign': False, 'size': 16, 'congruent': 9}} {'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_WC_ht', 'NT': True, 'AVXalign': False, 'size': 4, 'congruent': 0}} {'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_D_ht', 'NT': True, 'AVXalign': False, 'size': 16, 'congruent': 11}} {'OP': 'REPM', 'src': {'same': False, 'congruent': 9, 'type': 'addresses_UC_ht'}, 'dst': {'same': False, 'congruent': 1, 'type': 'addresses_normal_ht'}} {'00': 7} 00 00 00 00 00 00 00 */
19.868421
152
0.655298
8ecb2c7cff828f10848dafbba39be9db340eabed
191
asm
Assembly
Old Programmes/8085/Division/DIV_8.asm
illuminati-inc-2020/school
f22d640abd5505889bcfa9f7880c90a1b6e79635
[ "CC0-1.0" ]
null
null
null
Old Programmes/8085/Division/DIV_8.asm
illuminati-inc-2020/school
f22d640abd5505889bcfa9f7880c90a1b6e79635
[ "CC0-1.0" ]
null
null
null
Old Programmes/8085/Division/DIV_8.asm
illuminati-inc-2020/school
f22d640abd5505889bcfa9f7880c90a1b6e79635
[ "CC0-1.0" ]
null
null
null
LDA 00A1H CPI 00H JZ FAILURE ;Divide by zero MOV B,A LDA 00A0H MVI C,00H LOOP: CMP B JC SUCCESS SUB B INR C JMP LOOP SUCCESS: STA 00B1H MOV A,C STA 00B0H FAILURE: HLT
12.733333
28
0.65445
74b584631e5d2e1acee3d113eb6288932c54b332
124
asm
Assembly
src/kernel/cs_set.asm
jinet-vm/vmm
fb3c162ff48878d20d62d4d2ad4b87fabf13460a
[ "MIT" ]
6
2017-11-30T14:59:24.000Z
2020-05-13T18:23:55.000Z
src/kernel/cs_set.asm
jinet-vm/vmm
fb3c162ff48878d20d62d4d2ad4b87fabf13460a
[ "MIT" ]
null
null
null
src/kernel/cs_set.asm
jinet-vm/vmm
fb3c162ff48878d20d62d4d2ad4b87fabf13460a
[ "MIT" ]
2
2018-01-04T17:15:20.000Z
2020-09-21T23:52:27.000Z
format ELF64 use64 public cs_set section '.text' executable cs_set: mov rax, alpha push rdi push rax retf alpha: ret
9.538462
26
0.741935
98f90b21e041fc31264d65d51c163a9b60d41a64
7,934
asm
Assembly
Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0.log_21829_1337.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
9
2020-08-13T19:41:58.000Z
2022-03-30T12:22:51.000Z
Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0.log_21829_1337.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
1
2021-04-29T06:29:35.000Z
2021-05-13T21:02:30.000Z
Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0.log_21829_1337.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
3
2020-07-14T17:07:07.000Z
2022-03-21T01:12:22.000Z
.global s_prepare_buffers s_prepare_buffers: push %r11 push %r12 push %r13 push %r15 push %rbx push %rcx push %rdi push %rsi lea addresses_UC_ht+0x89d4, %r15 clflush (%r15) mfence mov (%r15), %r12w nop nop nop nop nop xor $2756, %r15 lea addresses_D_ht+0x6c8e, %rsi lea addresses_WC_ht+0xf77e, %rdi nop nop nop nop nop cmp %r13, %r13 mov $48, %rcx rep movsq cmp $24003, %r13 lea addresses_WC_ht+0x153fe, %rdi nop and %r11, %r11 movw $0x6162, (%rdi) nop nop nop nop nop add %r13, %r13 lea addresses_UC_ht+0x7eee, %rsi nop nop xor %r12, %r12 movb $0x61, (%rsi) nop inc %r13 lea addresses_A_ht+0x14bce, %rsi lea addresses_UC_ht+0x5302, %rdi clflush (%rdi) nop nop nop nop and $44730, %rbx mov $0, %rcx rep movsq dec %rbx lea addresses_WT_ht+0x1b1ce, %rsi lea addresses_D_ht+0x9ece, %rdi nop nop nop and $21732, %rbx mov $69, %rcx rep movsb nop nop and $23412, %r11 lea addresses_A_ht+0x161ce, %rsi lea addresses_A_ht+0x87ce, %rdi clflush (%rsi) nop nop cmp $27341, %rbx mov $103, %rcx rep movsb nop cmp %rdi, %rdi lea addresses_WT_ht+0xb7ce, %rsi lea addresses_WT_ht+0x1114e, %rdi nop nop nop nop sub $32028, %r11 mov $107, %rcx rep movsb nop nop sub $65264, %rbx lea addresses_WT_ht+0x97ce, %rsi lea addresses_WC_ht+0x40ae, %rdi clflush (%rsi) nop and $39792, %r13 mov $53, %rcx rep movsw nop add $42435, %r13 pop %rsi pop %rdi pop %rcx pop %rbx pop %r15 pop %r13 pop %r12 pop %r11 ret .global s_faulty_load s_faulty_load: push %r10 push %r11 push %r12 push %r14 push %r8 push %rcx push %rsi // Store lea addresses_WC+0xd7ce, %r14 nop add $62160, %r10 mov $0x5152535455565758, %r11 movq %r11, %xmm1 vmovups %ymm1, (%r14) nop dec %r11 // Load lea addresses_normal+0x79de, %r11 nop add $61673, %rsi movups (%r11), %xmm5 vpextrq $0, %xmm5, %r10 nop nop nop sub $44625, %rcx // Store lea addresses_WC+0x11976, %r12 nop nop nop nop cmp $65256, %r14 movl $0x51525354, (%r12) nop nop nop nop and $33801, %r11 // Store lea addresses_WT+0x123ce, %r8 nop nop nop nop cmp $44005, %r14 mov $0x5152535455565758, %r11 movq %r11, (%r8) nop nop nop add %rsi, %rsi // Store mov $0x1ce, %rcx nop nop nop nop nop xor %rsi, %rsi mov $0x5152535455565758, %r14 movq %r14, %xmm5 movups %xmm5, (%rcx) nop nop nop nop nop dec %r14 // Load lea addresses_A+0x1f47e, %r14 nop sub $25406, %r11 movups (%r14), %xmm5 vpextrq $1, %xmm5, %rsi nop nop nop nop nop add %r10, %r10 // Faulty Load lea addresses_PSE+0x1f9ce, %rcx nop cmp $42474, %r8 movups (%rcx), %xmm7 vpextrq $0, %xmm7, %r12 lea oracles, %r11 and $0xff, %r12 shlq $12, %r12 mov (%r11,%r12,1), %r12 pop %rsi pop %rcx pop %r8 pop %r14 pop %r12 pop %r11 pop %r10 ret /* <gen_faulty_load> [REF] {'src': {'NT': False, 'same': False, 'congruent': 0, 'type': 'addresses_PSE', 'AVXalign': False, 'size': 8}, 'OP': 'LOAD'} {'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 8, 'type': 'addresses_WC', 'AVXalign': False, 'size': 32}} {'src': {'NT': False, 'same': False, 'congruent': 3, 'type': 'addresses_normal', 'AVXalign': False, 'size': 16}, 'OP': 'LOAD'} {'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 1, 'type': 'addresses_WC', 'AVXalign': False, 'size': 4}} {'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 6, 'type': 'addresses_WT', 'AVXalign': False, 'size': 8}} {'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 9, 'type': 'addresses_P', 'AVXalign': False, 'size': 16}} {'src': {'NT': False, 'same': False, 'congruent': 0, 'type': 'addresses_A', 'AVXalign': False, 'size': 16}, 'OP': 'LOAD'} [Faulty Load] {'src': {'NT': False, 'same': True, 'congruent': 0, 'type': 'addresses_PSE', 'AVXalign': False, 'size': 16}, 'OP': 'LOAD'} <gen_prepare_buffer> {'src': {'NT': False, 'same': False, 'congruent': 1, 'type': 'addresses_UC_ht', 'AVXalign': False, 'size': 2}, 'OP': 'LOAD'} {'src': {'same': False, 'congruent': 6, 'type': 'addresses_D_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 2, 'type': 'addresses_WC_ht'}} {'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 4, 'type': 'addresses_WC_ht', 'AVXalign': False, 'size': 2}} {'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 5, 'type': 'addresses_UC_ht', 'AVXalign': False, 'size': 1}} {'src': {'same': False, 'congruent': 9, 'type': 'addresses_A_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 2, 'type': 'addresses_UC_ht'}} {'src': {'same': True, 'congruent': 10, 'type': 'addresses_WT_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 8, 'type': 'addresses_D_ht'}} {'src': {'same': True, 'congruent': 10, 'type': 'addresses_A_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 8, 'type': 'addresses_A_ht'}} {'src': {'same': False, 'congruent': 9, 'type': 'addresses_WT_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 6, 'type': 'addresses_WT_ht'}} {'src': {'same': False, 'congruent': 8, 'type': 'addresses_WT_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 2, 'type': 'addresses_WC_ht'}} {'33': 21829} 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 */
32.252033
2,999
0.655911
8bf14794f0508d22a038b894472bf3ad4f7cd374
518
asm
Assembly
programs/oeis/246/A246839.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
22
2018-02-06T19:19:31.000Z
2022-01-17T21:53:31.000Z
programs/oeis/246/A246839.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
41
2021-02-22T19:00:34.000Z
2021-08-28T10:47:47.000Z
programs/oeis/246/A246839.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
5
2021-02-24T21:14:16.000Z
2021-08-09T19:48:05.000Z
; A246839: Number of trailing zeros in A002109(n). ; 0,0,0,0,0,5,5,5,5,5,15,15,15,15,15,30,30,30,30,30,50,50,50,50,50,100,100,100,100,100,130,130,130,130,130,165,165,165,165,165,205,205,205,205,205,250,250,250,250,250,350,350,350,350,350,405,405,405,405,405,465,465,465,465,465,530,530,530,530,530,600,600,600,600,600,750,750,750,750,750,830,830,830,830,830,915,915,915,915,915,1005,1005,1005,1005,1005,1100,1100,1100,1100,1100 div $0,5 seq $0,246817 ; Possible number of trailing zeros in hyperfactorials (A002109).
86.333333
376
0.735521
d151e52dc69c45511f429937212cd2344211a7f3
2,980
asm
Assembly
Driver/Printer/Fax/CComRem/ccomremDriverInfo.asm
steakknife/pcgeos
95edd7fad36df400aba9bab1d56e154fc126044a
[ "Apache-2.0" ]
504
2018-11-18T03:35:53.000Z
2022-03-29T01:02:51.000Z
Driver/Printer/Fax/CComRem/ccomremDriverInfo.asm
steakknife/pcgeos
95edd7fad36df400aba9bab1d56e154fc126044a
[ "Apache-2.0" ]
96
2018-11-19T21:06:50.000Z
2022-03-06T10:26:48.000Z
Driver/Printer/Fax/CComRem/ccomremDriverInfo.asm
steakknife/pcgeos
95edd7fad36df400aba9bab1d56e154fc126044a
[ "Apache-2.0" ]
73
2018-11-19T20:46:53.000Z
2022-03-29T00:59:26.000Z
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% Copyright (c) GeoWorks 1990 -- All Rights Reserved PROJECT: PC GEOS MODULE: Printer/Fax/CCom FILE: ccomDriverInfo.asm AUTHOR: Don Reeves, April 26, 1991 REVISION HISTORY: Name Date Description ---- ---- ----------- Don 4/26/91 Initial revision DESCRIPTION: Driver info for the Complete Communicator fax driver The file "printerDriver.def" should be included before this one $Id: ccomremDriverInfo.asm,v 1.1 97/04/18 11:52:49 newdeal Exp $ %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% Driver Info Resource This part of the file contains the information that pertains to all device supported by the driver. It includes device names and a table of the resource handles for the specific device info. A pointer to this info is provided by the DriverInfo function. %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ DriverInfo segment lmem LMEM_TYPE_GENERAL ;---------------------------------------------------------------------------- ; Device Enumerations ;---------------------------------------------------------------------------- ; This etype defined in printDriver.def ; PrintDevice etype word, 0, 2 ; PD_COMPLETE_COMM enum PrintDevice,0 DefPrinter PD_COMPLETE_COMM, "Remote Complete Communicator Fax Modem", ccomDeviceInfo ;---------------------------------------------------------------------------- ; Driver Info Header ;---------------------------------------------------------------------------- ccomDriverInfo DriverExtendedInfoTable < {}, ; lmem hdr PrintDevice/2, ; # devices offset deviceStrings, ; devices offset deviceInfoTab ; info blocks > ccomInfo PrintDriverInfo < 1, ; timeout (sec) PR_DONT_RESEND, isoSubstitutions, asciiTransTable, PDT_FACSIMILE, TRUE > ;---------------------------------------------------------------------------- ; ASCII Translation List for Foreign Language Versions ;---------------------------------------------------------------------------- asciiTransTable chunk.char ";;",0 isoSubstitutions chunk.word 0ffffh ;no ISO subs. ;---------------------------------------------------------------------------- ; Device String Table and Strings ;---------------------------------------------------------------------------- ;create the tables... PrinterTables ;---------------------------------------------------------------------------- ; Device Info Table and Info Structures ;---------------------------------------------------------------------------- ;deviceInfoTab label word ; hptr handle ccomDeviceInfo ; Complete Communicator ; word 0 ; table terminator DriverInfo ends
31.702128
86
0.44094
7052a02984f5f054a28cd872ae5127e0c931261b
36,199
asm
Assembly
examples/c/src/linkertest.asm
toby1984/javr
8d7c3573ffb7daacd6b266326e1a9f1584120b68
[ "Apache-2.0" ]
3
2020-02-27T02:55:56.000Z
2020-11-12T06:56:12.000Z
examples/c/src/linkertest.asm
toby1984/javr
8d7c3573ffb7daacd6b266326e1a9f1584120b68
[ "Apache-2.0" ]
null
null
null
examples/c/src/linkertest.asm
toby1984/javr
8d7c3573ffb7daacd6b266326e1a9f1584120b68
[ "Apache-2.0" ]
null
null
null
#include "m328Pdef.inc" /* - An argument is passed either completely in registers or completely in memory. - To find the register where a function argument is passed, initialize the register number Rn with R26 and follow this procedure: - If the argument size is an odd number of bytes, round up the size to the next even number. - Subtract the rounded size from the register number Rn. - If the new Rn is at least R8 and the size of the object is non-zero, then the low-byte of the argument is passed in Rn. Subsequent bytes of the argument are passed in the subsequent registers, i.e. in increasing register numbers. - If the new register number Rn is smaller than R8 or the size of the argument is zero, the argument will be passed in memory. - If the current argument is passed in memory, stop the procedure: All subsequent arguments will also be passed in memory. - If there are arguments left, goto 1. and proceed with the next argument. - Return values with a size of 1 byte up to and including a size of 8 bytes will be returned in registers. Return values whose size is outside that range will be returned in memory. - If a return value cannot be returned in registers, the caller will allocate stack space and pass the address as implicit first pointer argument to the callee. The callee will put the return value into the space provided by the caller. - If the return value of a function is returned in registers, the same registers are used as if the value was the first parameter of a non-varargs function. For example, an 8-bit value is returned in R24 and an 32-bit value is returned R22...R25. - Arguments of varargs functions are passed on the stack. This applies even to the named arguments. Call-used registers (r18-r27, r30-r31): May be allocated by gcc for local data. You may use them freely in assembler subroutines. Calling C subroutines can clobber any of them - the caller is responsible for saving and restoring. Call-saved registers (r2-r17, r28-r29): May be allocated by gcc for local data. Calling C subroutines leaves them unchanged. Assembler subroutines are responsible for saving and restoring these registers, if changed. r29:r28 (Y pointer) is used as a frame pointer (points to local data on stack) if necessary. The requirement for the callee to save/preserve the contents of these registers even applies in situations where the compiler assigns them for argument passing. r0 - temporary register, can be clobbered by any C code (except interrupt handlers which save it), may be used to remember something for a while within one piece of assembler code r1 - assumed to be always zero in any C code, may be used to remember something for a while within one piece of assembler code, but must then be cleared after use (clr r1). This includes any use of the [f]mul[s[u]] instructions, which return their result in r1:r0. Interrupt handlers save and clear r1 on entry, and restore r1 on exit (in case it was non-zero). Function call conventions: Arguments - Allocated left to right, r25 to r8. All arguments are aligned to start in even-numbered registers (odd-sized arguments, including char, have one free register above them). This allows making better use of the movw instruction on the enhanced core. If too many, those that don't fit are passed on the stack. Return values: => 8-bit in r24 (not r25!), 16-bit in r25:r24, up to 32 bits in r22-r25, up to 64 bits in r18-r25. => 8-bit return values are zero/sign-extended to 16 bits by the called function (unsigned char is more efficient than signed char - just clr r25). => Arguments to functions with variable argument lists (printf etc.) are all passed on stack, and char is extended to int. */ .equ CPU_FREQUENCY = 16000000 ; 16 Mhz .equ CYCLES_PER_MS = CPU_FREQUENCY/1000 .equ KEYBOARD_BUFFER_SIZE = 16 .equ DISPLAY_WIDTH_IN_PIXEL = 128 .equ DISPLAY_HEIGHT_IN_PIXEL = 64 .equ GLYPH_WIDTH_IN_BITS = 8 .equ GLYPH_HEIGHT_IN_BITS = 8 ; see sleep_one_ms .equ loop_count = (CPU_FREQUENCY/1000)/3-3 ; - 3 loop iterations (=9 cycles) for instructions before/after loop ; PINs .equ PS2_CLK_PIN = 2 .equ PS2_DATA_PIN = 3 .equ DISPLAY_RESET_PIN = 4 .equ GREEN_LED_PIN = 6 .equ RED_LED_PIN = 7 #define LCD_ADR %01111000 #define RX_TIMEOUT_STARTBIT 0xff .equ FRAMEBUFFER_SIZE = 1024 .equ BYTES_PER_ROW = DISPLAY_WIDTH_IN_PIXEL/GLYPH_WIDTH_IN_BITS .equ BYTES_PER_GLYPH = (GLYPH_WIDTH_IN_BITS*GLYPH_HEIGHT_IN_BITS)/8 ; Display commands .equ CMD_DISPLAY_ON = 0 .equ CMD_ROW_ADDRESSING_MODE = 1 .equ CMD_PAGE_ADDRESSING_MODE = 2 ; SSD1306 request types .equ REQ_SINGLE_COMMAND = 0x80 .equ REQ_COMMAND_STREAM = 0x00 .equ REQ_SINGLE_DATA = 0xc0 .equ REQ_DATA_STREAM = 0x40 ; ========= ; send a single byte with error checking ; INPUT: r24 - byte to send ; SCRATCHED: r24,r25 ; RETURN: r24 != 0 => no error, r24 == 0 => error ; ========= i2c_send_byte: rcall send_byte brcs error ldi r24,1 ret .error clr r24 ret ; ========= ; send a single byte with error checking ; INPUT: r24 - byte to send ; SCRATCHED: r24 ; RETURN: carry set => error , carry clear => no error ; ========= send_byte: sts TWDR, r24 ldi r24, (1<<TWINT) | (1<<TWEN) sts TWCR, r24 .wait_data lds r24,TWCR sbrs r24,TWINT rjmp wait_data ; check transmission lds r24,TWSR andi r24, 0xF8 cpi r24, 0x28 ; 0x28 = status code: data transmitted,ACK received brne send_failed clc ret .send_failed sec ret ; ========= ; Send i2c start command. ; ; INPUT: r24 - device address ; SCRATCHED: r24,r25 ; RETURN: r24 == 0 => TX error, r24 != 0 => no errors ; ========= i2c_send_start: rcall send_start brcs error ldi r24,1 ret .error clr r24 ret ; =================== ; Send Start command and slave address ; SCRATCHED: r24 ; RETURN: carry set => TX error, carry clear => no errors ; ==================== send_start: ; send START ldi r24, (1<<TWINT)|(1<<TWSTA)|(1<<TWEN) sts TWCR, r24 ; wait for START transmitted .wait_start lds r24,TWCR sbrs r24,TWINT rjmp wait_start ; check for transmission error lds r24,TWSR andi r24, 0xF8 cpi r24, 0x08 ; 0x08 = status code: START transmitted brne send_failed ; transmit address (first byte) ; ldi r24,LCD_ADR lds r24,deviceAdr sts TWDR, r24 ldi r24, (1<<TWINT) | (1<<TWEN) sts TWCR, r24 ; wait for address transmission .wait_adr lds r24,TWCR sbrs r24,TWINT rjmp wait_adr ; check status lds r24,TWSR andi r24, 0xF8 cpi r24, 0x18 ; 0x18 = status code: Adress transmitted,ACK received brne send_failed clc ret .send_failed sec ret ; ===== ; send stop ; SCRATCHED: r24 ; ============= i2c_send_stop: ldi r24, (1<<TWINT)|(1<<TWEN)| (1<<TWSTO) ; 1 cycle sts TWCR, r24 ; 2 cycles .wait_tx lds r24,TWCR andi r24,(1<<TWSTO) brne wait_tx ret ; ==== ; Setup MCU for I2C communication ; INPUT: r24 - I2C address of LCD display ; SCRATCHED: r24 ; ==== i2c_setup: ; store device address sts deviceAdr,r24 ; setup TWI rate lds r24,TWSR andi r24,%11111100 sts TWSR,r24 ; prescaler bits = 00 => factor 1x ldi r24,12 ; 400 kHz ; ldi r24,19 ; 300 kHz ; ldi r24,32 ; 200 kHz ; ldi r24,72 ; 100 kHz sts TWBR,r24 ; factor ldi r24,100 rcall util_msleep ret ; ============ ; scroll up one line ; SCRATCHED: r18 ; ============ framebuffer_scroll_up: push r28 push r29 ldi r27 , HIGH(FRAMEBUFFER_SIZE-128) ; X ldi r26 , LOW(FRAMEBUFFER_SIZE-128) ; X ldi r29, HIGH(framebuffer) ; Y ldi r28, LOW(framebuffer) ; Y ldi r31, HIGH(framebuffer+128) ; Z ldi r30, LOW(framebuffer+128) ; Z .loop ld r18,Z+ st Y+,r18 sbiw r27:r26,1 brne loop ; clear last line ldi r31, HIGH(framebuffer+7*8*BYTES_PER_ROW) ; Z ldi r30, LOW(framebuffer+7*8*BYTES_PER_ROW) ; Z ldi r27 , HIGH(BYTES_PER_ROW*8) ; X ldi r26 , LOW(BYTES_PER_ROW*8) ldi r18,0x00 .clrloop st Z+,r18 sbiw r27:r26,1 brne clrloop ldi r18,0xff ; vertical scrolling dirties all regions of the display sts dirtyregions,r18 ; pop r29 pop r28 ret ; =============== ; Sends all dirty regions to the display ; and prepares for the next redraw ; SCRATCHED: r20,r21,r19, ; RESULT: r24 != 0 => no errors , r24 == 0 => tx error ; =============== framebuffer_update_display: lds r21,dirtyregions tst r21 breq nothingtodo lds r20,previousdirtyregions sts previousdirtyregions,r21 ; previousdirtyregions = dirtyregions or r20,r21 sts dirtyregions,r20 ; transmit union of this and the previous frame rcall send_framebuffer brcs error clr r21 sts dirtyregions,r21 ; lds r21,previousdirtyregions ; rcall clear_pages ldi r24,1 ; success rjmp return .error clr r24 ; error .return clr r1 ; C code needs this .nothingtodo ret ; ============================ ; Zeros the frame buffer. ; SCRATCHED: r0,r1,r18,r19,r20,r21,r30,r31 ; ============================ framebuffer_clear: ldi r21,0xff sts dirtyregions,r21 rcall clear_pages clr r1 ; C code needs this ret ; ============================ ; Clears only the framebuffer regions that are marked dirty ; INPUT: r21 - dirty page mask ( bit 0 = page0 , bit 1 = page1 etc. bit set = page dirty) ; SCRATCHED: r0,r1,r18,r19,r20,r21,r30,r31 ; ============================ clear_pages: ldi r19,8 ; page no .clr_loop dec r19 lsl r21 brcc pagenotdirty rcall clear_page .pagenotdirty tst r19 brne clr_loop ret ; ============================ ; Clears only the framebuffer regions that are marked dirty ; INPUT: r19 - page no to clear (0...7) ; SCRATCHED: r0,r1,r18,r20,r30,r31 ; ============================ clear_page: ldi r18,128 mul r18,r19 ldi r31, HIGH(framebuffer) ; Z ldi r30, LOW(framebuffer) ; Z add r30,r0 adc r31,r1 ldi r20,16 ; 16 * 8 bytes to clear = 128 bytes = 1 page ldi r18,0x00 .clr_loop st Z+, r18 st Z+, r18 st Z+, r18 st Z+, r18 st Z+, r18 st Z+, r18 st Z+, r18 st Z+, r18 dec r20 brne clr_loop ret ; ====== ; Send full framebuffer ; RETURN: Carry clear => transmission successful , Carry set => Transmission failed ; SCRATCHED: r18,r19,r20 ; ====== send_framebuffer: lds r18,dirtyregions ; load dirty regions bit-mask (bit X = page X) ldi r19,8 ; number of page we're currently checking .send_pages dec r19 lsl r18 ; shift bit 7 into carry brcc pagenotdirty mov r20,r19 rcall send_page ; SCRATCHED: r0,r1,r16,r17,r31:r30 brcs error .pagenotdirty tst r19 brne send_pages clc .error ret ; ============================= ; INPUT: r20 - no. of page to send (0...7) ; SCRATCHED: r0,r1,r20,r21,r24,r30,r31 ; RETURN: carry set => TX error, carry clear => no errors ; ============================= send_page: rcall send_start brcs error ldi r24,REQ_COMMAND_STREAM rcall send_byte brcs error ; select page ldi r24,0xb0 ; 0xb0 | page no => switch to page x or r24,r20 rcall send_byte brcs error ; select lower 4 bits of start column (0..128) ldi r24,0x00 rcall send_byte brcs error ; select upper 4 bits of start column (0..128) ldi r24,0x10 rcall send_byte brcs error rcall i2c_send_stop ; initiate GDDRAM transfer rcall send_start brcs error ldi r24,REQ_DATA_STREAM rcall send_byte brcs error ; calculate offset in frame buffer ldi r21,128 mul r21,r20 ; r1:r0 = 128 * pageNo ldi r31,HIGH(framebuffer) ldi r30,LOW(framebuffer) add r30,r0 adc r31,r1 ; + carry ldi r20,16 ; 16*8 bytes=128 bytes per page to transmit .send_loop ld r24,Z+ rcall send_byte_fast ld r24,Z+ rcall send_byte_fast ld r24,Z+ rcall send_byte_fast ld r24,Z+ rcall send_byte_fast ld r24,Z+ rcall send_byte_fast ld r24,Z+ rcall send_byte_fast ld r24,Z+ rcall send_byte_fast ld r24,Z+ rcall send_byte brcs error dec r20 brne send_loop rcall i2c_send_stop clc ret .error rcall i2c_send_stop sec ret ; ========= ; Sends a single byte without any error checking ; INPUT: r24 - byte to send ; SCRATCHED: r24 ; ========= send_byte_fast: sts TWDR, r24 ldi r24, (1<<TWINT) | (1<<TWEN) sts TWCR, r24 .wait_data lds r24,TWCR sbrs r24,TWINT rjmp wait_data ret ; ======== ; write one ASCII glyph into the framebuffer ; INPUT: r24 - char to write ; INPUT: r22 - column (X) ; INPUT: r20 - column (Y) ; SCRATCHED: r0,r1,r18,r19,r24,r28,r29,r30,r31 ; ======= framebuffer_write_char: ; map ASCII code to glyph ; look-up glyph index push r28 push r29 ldi r31,HIGH(charset_mapping) ldi r30,LOW(charset_mapping) add r30,r24 ; add character ldi r24,0 adc r31,r24 ; + carry lpm r0 , Z ; r0 = glyph index ; multiply glyph index by size of one glyph to calculate charset ROM offset ldi r24, BYTES_PER_GLYPH ; 8x8 pixel per glyph mul r24,r0 ; r1:r0 now hold offset of glyph in flash memory ; add start address of charset ROM ldi r31,HIGH(charset) ldi r30,LOW(charset) add r30,r0 adc r31,r1 ; Z now points to start of glyph in font ROM ldi r24,8 mul r22,r24 ; r1:r0 = X * GLYPH_WIDTH_IN_PIXELS movw r19:r18,r1:r0 ; backup result ldi r24,128 mul r20,r24 ; r1:r0 = Y * 128 add r0,r18 adc r1,r19 ; r1:r0 now hold offset into framebuffer ldi r29,HIGH(framebuffer) ldi r28,LOW(framebuffer) add r28,r0 adc r29,r1 mov r18,r20 rcall mark_page_dirty ; r29:r28 holds pointer into framebuffer where to write glyph data ldi r24 , GLYPH_HEIGHT_IN_BITS .row_loop lpm r18,Z+ st Y+,r18 dec r24 brne row_loop clr r1 ; C code needs this pop r29 pop r28 ret ; =========================== ; Mark page as dirty ; INPUT: r18 - page no (0..7) to mark dirty ; SCRATCHED: r19,r20 ; =========================== mark_page_dirty: mov r19,r18 ldi r20,0x01 tst r19 .loop breq end lsl r20 dec r19 rjmp loop .end lds r19,dirtyregions or r19,r20 sts dirtyregions,r19 ret ; ================== ; Switch LCD displays on ; SCRATCHED: r18,r22,r23,r24,r26,r27,r30,r31 ; RESULT: r24 != 0 => no errors, r24 = 0 => tx errors ; ================== lcd_display_on: ldi r24,CMD_DISPLAY_ON rcall send_command ret ; ====== ; Reset display ; SCRATCHED: r18,r22,r23,r24,r26,r27,r30,r31 ; RESULT: r24 = 0 => TX error, r24 != 0 => no errors ; ====== lcd_reset_display: ; cbi DDRD,^ ; set to input ; sbi PORTD,DISPLAY_RESET_PIN ; Enable pull-up resisstor ; cbi DDRB,TRIGGER_PIN ; set to input sbi DDRD,DISPLAY_RESET_PIN ; set to output cbi PORTD, DISPLAY_RESET_PIN ldi r24,20 rcall util_msleep sbi PORTD, DISPLAY_RESET_PIN ldi r24,200 rcall util_msleep ; mark all regions dirty so display RAM gets written completely ldi r24,0xff sts dirtyregions,r24 clr r24 sts previousdirtyregions,r24 ; switch to page addressing mode ldi r24,CMD_PAGE_ADDRESSING_MODE rcall send_command ret ; ==== debugging helper debug_toggle_green_led: sbic PIND,GREEN_LED_PIN ; skip if LED is off rjmp debug_green_led_off rjmp debug_green_led_on debug_toggle_red_led: sbic PIND,RED_LED_PIN ; skip if LED is off rjmp debug_red_led_off rjmp debug_red_led_on ; ====== ; Switch green LED. ; INPUT: r24 - either 0 to disable or anything else to enable ; ====== debug_green_led: tst r24 breq debug_green_led_off debug_green_led_on: sbi DDRD,GREEN_LED_PIN ; set to output sbi PORTD,GREEN_LED_PIN ret debug_green_led_off: sbi DDRD,GREEN_LED_PIN ; set to output cbi PORTD,GREEN_LED_PIN ret ; ====== ; Switch red LED. ; INPUT: r24 - either 0 to disable or anything else to enable ; ====== debug_red_led: tst r24 breq debug_red_led_off debug_red_led_on: sbi DDRD,RED_LED_PIN ; set to output sbi PORTD,RED_LED_PIN ret debug_red_led_off: sbi DDRD,RED_LED_PIN ; set to output cbi PORTD,RED_LED_PIN ret ; ====== ; Blink red LED. ; INPUT: r24 - number of times to blink ; ====== debug_blink_red: .loop rcall debug_red_led_off tst r24 breq back rcall debug_red_led_on rcall sleep_500_ms dec r24 rjmp loop .back ret ; ====== ; Sleep 500 ms. ; SCRATCHED: r24 ; ====== sleep_500_ms: push r24 ldi r24, 250 rcall util_msleep ldi r24, 250 rcall util_msleep pop r24 ret ; ==== ; send command. ; INPUT: r24 - command table entry index ; SCRATCHED: r22,r23,r24,r26,r27,r30,r31 ; RETURN: r24 != 0 => no errors, r24 == 0 => tx error ; ==== send_command: ldi r31 , HIGH(commands) ldi r30 , LOW(commands) lsl r24 ; * 4 bytes per table entry ( 16-bit address + 16 bit byte count) lsl r24 add r30,r24 clr r18 adc r31,r18 ; +carry ; Z now contains ptr to start of cmd entry in table lpm r22,Z+ ; cmd address low lpm r23,Z+ ; cmd address hi lpm r26,Z+ ; +LOW(number of bytes in cmd ) lpm r27,Z+ ; +HIGH(number of bytes in cmd ) movw Z,r23:r22 ; Z = r17:r16 call send_bytes ldi r24,1 brcc no_errors clr r24 .no_errors ret ; ====== send bytes ; Assumption: CLK HI , DATA HI when method is entered ; INPUT: r31:r30 (Z register) start address of bytes to transmit ; INPUT: r27:r26 - number of bytes to transmit ; SCRATCHED: r22,r23,r24,r30,r31 ; RETURN: Carry clear => transmission successful , Carry set => Transmission failed ; ====== send_bytes: ; send START rcall send_start ; clobbers r24 brcs send_failed .data_loop lpm r24,Z+ rcall send_byte brcs send_failed sbiw r27:r26,1 ; decrement byte counter brne data_loop ; transmission successful rcall i2c_send_stop ; clobbers r24 clc ret .send_failed rcall i2c_send_stop ; clobbers r24 sec ret ; ======= ; Sleep up to 255 millseconds ; INPUT: r24 - time to sleep in ms ; ======= util_msleep: push r24 push r26 push r27 .loop rcall sleep_one_ms dec r24 brne loop pop r27 pop r26 pop r24 ret ; ===== ; sleep one millisecond ; SCRATCHED: r26,r27 sleep_one_ms: ldi r26, LOW(loop_count) ; 1 cycle ldi r27, HIGH(loop_count) ; 1 cycle tst r27 ; waste 2 cycle cycles so tst r27 ; that cycles spend outside the loop (9 cycles) are a multiple of the loop duration (3 cycles) .loop1 sbiw r27:r26,1 ; 2 cycles brne loop1 ; 1 if condition is false, otherwise 2 ret ; 4 cycles ; ===== ; Resets the PS/2 configuration ; SCRATCHED: nothing ; ===== ps2_reset: cli ; disable interrupts cbi DDRD,PS2_CLK_PIN ; set to input cbi DDRD,PS2_DATA_PIN ; set to input ldi r24,0 sts keybuffer_ptr,r24 sts keybuffer_lost,r24 sts keybuffer_error,r24 ; trigger interrupt when PS2_DATA_PIN goes low rcall ps2_enable_irq ret ; ===== ; Enable PS/2 interrupt ; ===== ps2_enable_irq: cli push r24 ; setup INT1 external interrupt lds r24,EICRA andi r24,%11110011 ori r24,%1000 ; falling edge on INT1 triggers interrupt sts EICRA,r24 ; clear pending interrupts sbi EIFR,INTF1 ; enable IRQ sbi EIMSK,INT1 pop r24 sei ret ; ===== ; Disable PS/2 interrupt ; ===== ps2_disable_irq: cli cbi EIMSK,INT1 sbi EIFR,INTF1 ; clear pending interrupts that will have accumulated in the meantime ret ; ====== ; Read one byte from the PS/2 interface. ; RESULT: r24 - Byte read if carry clear (=success), error code if carry set (=rx error) ; SCRATCHED: r18,r20,r21,r24,r26,r27 ; ====== ps2_read_byte: ; wait for data line to go low ldi r26,0xff ldi r27,0xff .wait_data_low sbis PIND,PS2_DATA_PIN ; skip if bit set rjmp ps2_irq_read_byte ; => bit clear sbiw r27:r26,1 brne wait_data_low ldi r24,RX_TIMEOUT_STARTBIT sec ret ; ====== ; Called by IRQ routine after PS/2 DATA line went low. ; RESULT: r24 - Byte read , carry set => RX error, carry clear => success ; SCRATCHED: r18,r20,r21,r24,r26,r27 ; ====== ps2_irq_read_byte: ; read start bit (this one is always zero) rcall ps2_read_bit ; scratches r20,r26,r27 tst r20 breq timeout_error_start ; timeout brcs start_bit_error ; error, start bit should be a zero bit ; read 8 data bits ldi r18,8 ; bit count ldi r24,0x00 ; received byte .data_loop rcall ps2_read_bit ; scratches r20,r26,r27 tst r20 breq timeout_error_data ror r24 ; shift-in carry bit dec r18 brne data_loop ; read parity bit ldi r21,0 ;=> temp parity bit storage rcall ps2_read_bit tst r20 breq timeout_error_parity brcc parity_not_set ldi r21,1 ; parity bit set ; The parity bit is set if there is an even number of 1's in the data bits and reset (0) if there is an odd number of 1's in the data bits .parity_not_set ; check parity rcall ps2_calc_parity ; scratches r18,r19,r20 cp r21,r18 brne parity_error ; read stop bit (always 1) rcall ps2_read_bit ; scratches r20,r26,r27 tst r20 breq timeout_error_stop brcc stop_bit_error clc ret .timeout_error_start ldi r24,RX_TIMEOUT_STARTBIT rjmp error_return .parity_error ldi r24,0xfe rjmp error_return .start_bit_error ldi r24,0xfd rjmp error_return .stop_bit_error ldi r24,0xfc rjmp error_return .timeout_error_stop ldi r24,0xfa rjmp error_return .timeout_error_data ldi r24,0xf9 rjmp error_return .timeout_error_parity ldi r24,0xf8 rjmp error_return .buffer_overflow_error ldi r24,0xfb .error_return sts keybuffer_error,r24 sec ret ; ==== Calculate odd parity ; INPUT: r24 - byte to calculate parity for ; RESULT: r18 - parity ; SCRATCHED: r18,r19,r20 ; ===== ; The parity bit is set if there is an even number of 1's in the data bits and reset (0) if there is an odd number of 1's in the data bits ps2_calc_parity: mov r19,r24 clr r1 ldi r18,0xff ldi r20,8 .calc_loop rol r19 sbc r18,r1 dec r20 brne calc_loop andi r18,1 ret ; ===== ; Read one bit from PS/2. ; RESULT: Carry set = 1-bit , Carry clear = 0-bit ; RESULT: r20 - not zero => ok , zero => timeout ; SCRATCHED: r20,r26,r27 ; ===== ps2_read_bit: ldi r26,0xff ldi r27,0xff .wait_clk_low sbis PIND,PS2_CLK_PIN ; skip if bit set rjmp clk_low ; => bit clear sbiw r27:r26,1 brne wait_clk_low rjmp timeout .clk_low ; now read data line (abuse r20 for storage) sbic PIND,PS2_DATA_PIN rjmp one_bit .zero_bit ldi r20,0 rjmp cont .one_bit ldi r20,1 .cont ldi r26,0xff ldi r27,0xff .wait_clk_hi sbic PIND,PS2_CLK_PIN ; skip if bit clear rjmp return sbiw r27:r26,1 brne wait_clk_hi rjmp timeout .return clc ; carry indicates received bit tst r20 breq received_zero_bit sec ; received one bit .received_zero_bit ldi r20,1 ; => success ret .timeout clr r20 ; => failure ret ; ==================== ; wait for data line to go low ; SCRATCHED: r26,r27 ; RESULT: Carry clear => success , Carry set => timeout ; =================== ps2_wait_data_low: ldi r26,0xff ldi r27,0xff .loop sbis PIND,PS2_DATA_PIN ; skip if bit set rjmp data_low ; => bit clear sbiw r27:r26,1 brne loop sec ret .data_low clc ret ; ==== EXTINT1 IRQ routine .irq 2 extint1_irq: push r0 in r0, SREG push r0 ; push flags push r1 push r18 push r19 push r20 push r21 push r22 push r23 push r24 push r25 push r26 push r27 push r30 push r31 ; --- START: actual IRQ routine rcall ps2_irq_read_byte ; byte is in r24 ; carry set = RX error, carry clear = success brcs error rcall ps2_keybuffer_write .error ; --- END: actual IRQ routine sbi EIFR,INTF1 ; clear pending interrupts that will have accumulated in the meantime pop r31 pop r30 pop r27 pop r26 pop r25 pop r24 pop r23 pop r22 pop r21 pop r20 pop r19 pop r18 pop r1 ;pop flags pop r0 out SREG,r0 ; pop r0 ; restore r0 reti ; ===== ; write a byte to the keybuffer ; INPUT: r24 - byte to write ; SCRATCHED: r0,r1,r18,r30,r31 ; ===== ps2_keybuffer_write: ldi r31,HIGH(keybuffer) ldi r30,LOW(keybuffer) lds r18,keybuffer_ptr cpi r18,KEYBOARD_BUFFER_SIZE breq buffer_full mov r0,r18 clr r1 add r30,r0 adc r31,r1 st Z,r24 inc r18 sts keybuffer_ptr,r18 ret ; buffer already at capacity .buffer_full lds r18,keybuffer_lost cpi r18,0xff breq cnt_overflow ; do not overflow to zero, otherwise caller would not realize the loss inc r18 sts keybuffer_lost,r18 .cnt_overflow ret ; ===== ; Read keyboard buffer. ; ; Side effects: ; ; - resets last error flags ; - resets buffer overflow counter ; ; INPUT: r25:r24 - ptr to SRAM where to store keyboard buffer contents ; INPUT: r22 - size of destination area ; RESULT: r24 - number of bytes READ ; SCRATCHED: r18,r19,r26,r27,r30,r31 ; ======================== DATA ====================== ps2_keybuffer_read: cli ; disable IRQs while we're reading from the buffer ldi r31,HIGH(keybuffer) ldi r30,LOW(keybuffer) movw r27:r26,r25:r24 lds r18,keybuffer_ptr mov r24,r18 ; copy buffer size to result register tst r18 breq buffer_empty .copy_loop ld r19,Z+ st r27:r26+,r19 dec r18 brne copy_loop .buffer_empty sts keybuffer_ptr,r18 sts keybuffer_lost,r18 sts keybuffer_error,r18 sei ; re-enable IRQs ret ; ==== ; Send a single byte command and receives the response from the ; keyboard controller. ; INPUT: r24 - byte to send to keyboard controller ; RESULT: r24 - 0 on error, 1 on success ; ==== ps2_write_byte: ; calculate parity to send later rcall ps2_calc_parity ; SCRATCHED: r18,r19,r20 ; parity bit was returned in r18 rcall ps2_disable_irq ; disable interrupts so we don't interfere with keyboard reads ldi r31,HIGH(8*1600/4) ; looked good with 16*1600/4 ldi r30,LOW(8*1600/4) .delay1 sbiw r31:r30,1 brne delay1 ; LOW: To sink current, set the data direction pin DDxn to 1 (output). Then set the bit in the output PORTxn register to 0. ; HIGH: To change this to a high-impedance open-drain, set the data direction pin DDxn to 0 (input), while leaving the PORTxn bit 0. ; So instead of toggling the PORT pin, you are toggling the data directionpin. ; set clock low sbi DDRD,PS2_CLK_PIN cbi PORTD,PS2_CLK_PIN ldi r31,HIGH(16*1600/4) ldi r30,LOW(16*1600/4) .delay2 sbiw r31:r30,1 brne delay2 ; set clock high cbi DDRD,PS2_CLK_PIN ; *** transmission starts here *** ; set data low sbi DDRD,PS2_DATA_PIN cbi PORTD,PS2_DATA_PIN ; send 8 bits (MSB first) ldi r19,8 .send_loop ror r24 rcall ps2_write_bit dec r19 brne send_loop ; send parity bit ror r18 ; shift parity bit into carry rcall ps2_write_bit ; send stop bit (1) cbi DDRD,PS2_DATA_PIN ; set data to input .wait_data_low sbic PIND,PS2_DATA_PIN rjmp wait_data_low .wait_clk_low sbic PIND,PS2_CLK_PIN rjmp wait_clk_low ; wait for CLK and DATA to go high again .wait_data_high sbic PIND,PS2_DATA_PIN rjmp wait_clk_hi rjmp wait_data_high .wait_clk_hi sbis PIND,PS2_CLK_PIN rjmp wait_clk_hi ; now read the response cbi DDRD,PS2_DATA_PIN ; set data to input rcall ps2_read_byte ; SCRATCHED: r18,r20,r21,r24,r26,r27 brcs error cpi r24,0xfa ; PS/2 SUCCESS brne error ldi r24,1 rjmp back .error clr r24 .back rcall ps2_enable_irq ret ; ====== ; Write bit in carry. ; INPUT: carry bit ; ====== ; LOW: To sink current, set the data direction pin DDxn to 1 (output). Then set the bit in the output PORTxn register to 0. ; HIGH: To change this to a high-impedance open-drain, set the data direction pin DDxn to 0 (input), while leaving the PORTxn bit 0. ; So instead of toggling the PORT pin, you are toggling the data directionpin. ps2_write_bit: ; wait for clock to be low .wait_low sbic PIND,PS2_CLK_PIN rjmp wait_low ; clock is now low, load bit brcc send_0_bit ; send 1 bit cbi DDRD,PS2_DATA_PIN rjmp wait_high .send_0_bit sbi DDRD,PS2_DATA_PIN .wait_high sbis PIND,PS2_CLK_PIN rjmp wait_high ret ; ==== ; Returns the last PS/2 error and resets all error flags. ; RESULT: r24 - last error code ; ==== ps2_get_last_error: cli lds r24,keybuffer_error clr r1 sts keybuffer_error,r1 sei ret ; ==== ; Returns the number of bytes lost due to ; keyboard buffer overflows and resets this counter. ; RESULT: r24 - number of bytes lost due to buffer overflow ; ==== ps2_get_overflow_counter: cli lds r24,keybuffer_lost clr r1 sts keybuffer_lost,r1 sei ret commands: .dw cmd1,2 .dw cmd2,3 .dw cmd3,3 cmd1: .db REQ_SINGLE_COMMAND,0xaf ; switch display on cmd2: .db REQ_COMMAND_STREAM,0x20, %00 ; set horizontal addressing mode (00), vertical = (01),page = 10 cmd3: .db REQ_COMMAND_STREAM,0x20, %10 ; set horizontal addressing mode (00), vertical = (01),page = 10) charset: .db 0x00,0x3e,0x7f,0x41,0x4d,0x4f,0x2e,0x00 ; '@' (offset 0) .db 0x00,0x7c,0x7e,0x0b,0x0b,0x7e,0x7c,0x00 ; 'a' (offset 8) .db 0x00,0x7f,0x7f,0x49,0x49,0x7f,0x36,0x00 ; 'b' (offset 16) .db 0x00,0x3e,0x7f,0x41,0x41,0x63,0x22,0x00 ; 'c' (offset 24) .db 0x00,0x7f,0x7f,0x41,0x63,0x3e,0x1c,0x00 ; 'd' (offset 32) .db 0x00,0x7f,0x7f,0x49,0x49,0x41,0x41,0x00 ; 'e' (offset 40) .db 0x00,0x7f,0x7f,0x09,0x09,0x01,0x01,0x00 ; 'f' (offset 48) .db 0x00,0x3e,0x7f,0x41,0x49,0x7b,0x3a,0x00 ; 'g' (offset 56) .db 0x00,0x7f,0x7f,0x08,0x08,0x7f,0x7f,0x00 ; 'h' (offset 64) .db 0x00,0x00,0x41,0x7f,0x7f,0x41,0x00,0x00 ; 'i' (offset 72) .db 0x00,0x20,0x60,0x41,0x7f,0x3f,0x01,0x00 ; 'j' (offset 80) .db 0x00,0x7f,0x7f,0x1c,0x36,0x63,0x41,0x00 ; 'k' (offset 88) .db 0x00,0x7f,0x7f,0x40,0x40,0x40,0x40,0x00 ; 'l' (offset 96) .db 0x00,0x7f,0x7f,0x06,0x0c,0x06,0x7f,0x7f ; 'm' (offset 104) .db 0x00,0x7f,0x7f,0x0e,0x1c,0x7f,0x7f,0x00 ; 'n' (offset 112) .db 0x00,0x3e,0x7f,0x41,0x41,0x7f,0x3e,0x00 ; 'o' (offset 120) .db 0x00,0x7f,0x7f,0x09,0x09,0x0f,0x06,0x00 ; 'p' (offset 128) .db 0x00,0x1e,0x3f,0x21,0x61,0x7f,0x5e,0x00 ; 'q' (offset 136) .db 0x00,0x7f,0x7f,0x19,0x39,0x6f,0x46,0x00 ; 'r' (offset 144) .db 0x00,0x26,0x6f,0x49,0x49,0x7b,0x32,0x00 ; 's' (offset 152) .db 0x00,0x01,0x01,0x7f,0x7f,0x01,0x01,0x00 ; 't' (offset 160) .db 0x00,0x3f,0x7f,0x40,0x40,0x7f,0x3f,0x00 ; 'u' (offset 168) .db 0x00,0x1f,0x3f,0x60,0x60,0x3f,0x1f,0x00 ; 'v' (offset 176) .db 0x00,0x7f,0x7f,0x30,0x18,0x30,0x7f,0x7f ; 'w' (offset 184) .db 0x00,0x63,0x77,0x1c,0x1c,0x77,0x63,0x00 ; 'x' (offset 192) .db 0x00,0x07,0x0f,0x10,0x78,0x0f,0x07,0x00 ; 'y' (offset 200) .db 0x00,0x61,0x71,0x59,0x4d,0x47,0x43,0x00 ; 'z' (offset 208) .db 0x00,0x00,0x7f,0x7f,0x41,0x41,0x00,0x00 ; '[' (offset 216) .db 0x00,0x00,0x41,0x41,0x7f,0x7f,0x00,0x00 ; ']' (offset 224) .db 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 ; ' ' (offset 232) .db 0x00,0x00,0x00,0x4f,0x4f,0x00,0x00,0x00 ; '!' (offset 240) .db 0x00,0x07,0x07,0x00,0x00,0x07,0x07,0x00 ; '"' (offset 248) .db 0x14,0x7f,0x7f,0x14,0x14,0x7f,0x7f,0x14 ; '#' (offset 256) .db 0x00,0x24,0x2e,0x6b,0x6b,0x3a,0x12,0x00 ; '$' (offset 264) .db 0x00,0x63,0x33,0x18,0x0c,0x66,0x63,0x00 ; '%' (offset 272) .db 0x00,0x32,0x7f,0x4d,0x4d,0x77,0x72,0x50 ; '&' (offset 280) .db 0x00,0x00,0x00,0x04,0x06,0x03,0x01,0x00 ; ''' (offset 288) .db 0x00,0x00,0x1c,0x3e,0x63,0x41,0x00,0x00 ; '(' (offset 296) .db 0x00,0x00,0x41,0x63,0x3e,0x1c,0x00,0x00 ; ')' (offset 304) .db 0x08,0x2a,0x3e,0x1c,0x1c,0x3e,0x2a,0x08 ; '*' (offset 312) .db 0x00,0x08,0x08,0x3e,0x3e,0x08,0x08,0x00 ; '+' (offset 320) .db 0x00,0x00,0x80,0xe0,0x60,0x00,0x00,0x00 ; ',' (offset 328) .db 0x00,0x08,0x08,0x08,0x08,0x08,0x08,0x00 ; '-' (offset 336) .db 0x00,0x00,0x00,0x60,0x60,0x00,0x00,0x00 ; '.' (offset 344) .db 0x00,0x40,0x60,0x30,0x18,0x0c,0x06,0x02 ; '/' (offset 352) .db 0x00,0x3e,0x7f,0x49,0x45,0x7f,0x3e,0x00 ; '0' (offset 360) .db 0x00,0x40,0x44,0x7f,0x7f,0x40,0x40,0x00 ; '1' (offset 368) .db 0x00,0x62,0x73,0x51,0x49,0x4f,0x46,0x00 ; '2' (offset 376) .db 0x00,0x22,0x63,0x49,0x49,0x7f,0x36,0x00 ; '3' (offset 384) .db 0x00,0x18,0x18,0x14,0x16,0x7f,0x7f,0x10 ; '4' (offset 392) .db 0x00,0x27,0x67,0x45,0x45,0x7d,0x39,0x00 ; '5' (offset 400) .db 0x00,0x3e,0x7f,0x49,0x49,0x7b,0x32,0x00 ; '6' (offset 408) .db 0x00,0x03,0x03,0x79,0x7d,0x07,0x03,0x00 ; '7' (offset 416) .db 0x00,0x36,0x7f,0x49,0x49,0x7f,0x36,0x00 ; '8' (offset 424) .db 0x00,0x26,0x6f,0x49,0x49,0x7f,0x3e,0x00 ; '9' (offset 432) .db 0x00,0x00,0x00,0x24,0x24,0x00,0x00,0x00 ; ':' (offset 440) .db 0x00,0x00,0x80,0xe4,0x64,0x00,0x00,0x00 ; ';' (offset 448) .db 0x00,0x08,0x1c,0x36,0x63,0x41,0x41,0x00 ; '<' (offset 456) .db 0x00,0x14,0x14,0x14,0x14,0x14,0x14,0x00 ; '=' (offset 464) .db 0x00,0x41,0x41,0x63,0x36,0x1c,0x08,0x00 ; '>' (offset 472) .db 0x00,0x02,0x03,0x51,0x59,0x0f,0x06,0x00 ; '?' (offset 480) charset_mapping: .db 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 .db 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 .db 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 .db 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 .db 0x1d,0x1e,0x1f,0x20,0x21,0x22,0x23,0x24 .db 0x25,0x26,0x27,0x28,0x29,0x2a,0x2b,0x2c .db 0x2d,0x2e,0x2f,0x30,0x31,0x32,0x33,0x34 .db 0x35,0x36,0x37,0x38,0x39,0x3a,0x3b,0x3c .db 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 .db 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 .db 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 .db 0x00,0x00,0x00,0x1b,0x00,0x1c,0x00,0x00 .db 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07 .db 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f .db 0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17 .db 0x18,0x19,0x1a,0x00,0x00,0x00,0x00,0x00 .db 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 .db 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 .db 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 .db 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 .db 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 .db 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 .db 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 .db 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 .db 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 .db 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 .db 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 .db 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 .db 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 .db 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 .db 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 .db 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 .dseg framebuffer: .byte FRAMEBUFFER_SIZE ; stores bytes received from the PS/2 keyboard keybuffer: .byte KEYBOARD_BUFFER_SIZE ; offset relative to start of key buffer ; where the next received byte will be stored keybuffer_ptr: .byte 1 ; number of bytes that were lost ; because the key buffer ran out of space keybuffer_lost: .byte 1 ; most recent error since the last time ; the buffer was read using ps2_keybuffer_read() keybuffer_error: .byte 1 ; dirty-page tracking (0 bit per display page, bit 0 = page0 , bit set = page dirty) ; only dirty pages are transmitted to display controller dirtyregions: .byte 1 previousdirtyregions: .byte 1 deviceAdr: .byte 1
27.381997
259
0.659438
5548752347e261f6771c4d54535a9b21bcd4152d
681
asm
Assembly
oeis/314/A314189.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/314/A314189.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/314/A314189.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A314189: Coordination sequence Gal.6.636.5 where G.u.t.v denotes the coordination sequence for a vertex of type v in tiling number t in the Galebach list of u-uniform tilings. ; Submitted by Christian Krause ; 1,5,11,17,21,27,32,37,43,47,53,59,64,69,75,81,85,91,96,101,107,111,117,123,128,133,139,145,149,155,160,165,171,175,181,187,192,197,203,209,213,219,224,229,235,239,245,251,256,261 mov $2,$0 seq $0,313829 ; Coordination sequence Gal.6.203.5 where G.u.t.v denotes the coordination sequence for a vertex of type v in tiling number t in the Galebach list of u-uniform tilings. mov $1,5 sub $1,$0 sub $0,$1 div $0,3 mov $1,$0 mov $3,$2 add $3,1 mul $3,2 add $1,$3 mov $0,$1
40.058824
182
0.723935
2b5c72bd0eac5f4bb707ca6785d63a9f4d632fc4
780
asm
Assembly
oeis/251/A251924.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/251/A251924.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/251/A251924.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A251924: Numbers n such that the sum of the triangular numbers T(n) and T(n+1) is equal to a hexagonal number H(m) for some m. ; Submitted by Jamie Morken(s1.) ; 0,34,1188,40390,1372104,46611178,1583407980,53789260174,1827251437968,62072759630770,2108646576008244,71631910824649558,2433376321462076760,82663163018885960314,2808114166320660573948,95393218491883573553950,3240561314557720840260384,110083691476470624995299138,3739604948885443528999910340,127036484570628609361001652454,4315500870452487274745056273128,146599993110813938731970911633930,4980084264897221429612265939280524,169176265013394714668085071023903918,5747012926190523077285280148873452720 mov $1,1 mov $2,1 lpb $0 sub $0,1 add $2,$1 add $1,$2 add $1,$2 add $2,$1 lpe mul $1,$2 mov $0,$1 sub $0,1
45.882353
499
0.830769
8960eeba53fbaf9b2e93d058ed0891aa24d6da6c
398
asm
Assembly
libsrc/osca/get_file_size.asm
andydansby/z88dk-mk2
51c15f1387293809c496f5eaf7b196f8a0e9b66b
[ "ClArtistic" ]
1
2020-09-15T08:35:49.000Z
2020-09-15T08:35:49.000Z
libsrc/osca/get_file_size.asm
andydansby/z88dk-MK2
51c15f1387293809c496f5eaf7b196f8a0e9b66b
[ "ClArtistic" ]
null
null
null
libsrc/osca/get_file_size.asm
andydansby/z88dk-MK2
51c15f1387293809c496f5eaf7b196f8a0e9b66b
[ "ClArtistic" ]
null
null
null
; ; Old School Computer Architecture - interfacing FLOS ; Stefano Bodrato, 2011 ; ; Get the size for the given file ; ; $Id: get_file_size.asm,v 1.3 2012/03/08 07:16:46 stefano Exp $ ; INCLUDE "flos.def" XLIB get_file_size get_file_size: ; __FASTCALL__, HL points to filename push iy call kjt_find_file push ix pop de push iy pop hl pop iy ret z ld hl,0 ld d,h ld e,l ret
13.724138
64
0.693467
87c594008d33516624173ea49f6425784809e887
808
asm
Assembly
QEMU files/kernel.asm
mtfbs/RealMode-x86-asm-Debugger
f01d8b61a47f6ebbda522d92e879139ce7b15950
[ "MIT" ]
5
2021-06-14T11:19:09.000Z
2022-03-08T00:43:25.000Z
QEMU files/kernel.asm
mtfbs/RealMode-x86-asm-QEMU-Debugger-frontend
f01d8b61a47f6ebbda522d92e879139ce7b15950
[ "MIT" ]
10
2021-06-08T19:46:55.000Z
2021-06-10T23:25:48.000Z
QEMU files/kernel.asm
mtfbs/RealMode-x86-asm-QEMU-Debugger
f01d8b61a47f6ebbda522d92e879139ce7b15950
[ "MIT" ]
null
null
null
org 0x7e00 jmp 0x0000:start print_hi: mov ah, 0eh mov al, 'H' int 10h mov al, 'i' int 10h mov al, ' ' int 10h ret start: ; 8 bit registers + print characters xor ax, ax mov ah, 0eh mov al, 'c' int 10h mov al, 'a' int 10h mov al, 's' int 10h mov al, 'a' int 10h mov al, ' ' int 10h ; push and pop push 'A' push 'B' push 'C' push 'D' pop ax pop bx pop cx pop dx ; push and add push 1 push 2 push 3 add sp, 6 ; call function call print_hi ; input mov ah, 00h ; (argumento do int 16h) int 16h ; http://www.ctyme.com/intr/rb-1754.htm --> guarda o caractere ASCII em al mov ah, 0eh ; 0eh = 14 em hexadecimal --> modo de impressão do int 10h int 10h ; char to int sub ax, 48 ; ??? mov ax, 'A' mov bx, 10 mov bx, 10 jmp end end: jmp $
10.227848
85
0.595297
32f483d83ecd00dbde88f562262c70411606958b
703
asm
Assembly
oeis/344/A344508.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
11
2021-08-22T19:44:55.000Z
2022-03-20T16:47:57.000Z
oeis/344/A344508.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
9
2021-08-29T13:15:54.000Z
2022-03-09T19:52:31.000Z
oeis/344/A344508.asm
neoneye/loda-programs
84790877f8e6c2e821b183d2e334d612045d29c0
[ "Apache-2.0" ]
3
2021-08-22T20:56:47.000Z
2021-09-29T06:26:12.000Z
; A344508: a(n) = Sum_{k=1..n} k * lcm(k,n). ; Submitted by Jon Maiga ; 1,6,24,64,175,270,686,928,1647,2150,4356,3792,8619,8526,11250,14592,25721,19926,40432,31200,44835,53966,87814,58272,108125,106470,132678,124656,224547,132750,294066,232960,284229,316166,372400,291168,600991,496014,560742,484000,909421,531846,1102004,791824,868725,1073870,1577226,921600,1678299,1303750,1664640,1562912,2558999,1596510,2365550,1939616,2611113,2736614,3940492,1940400,4506131,3580686,3482136,3727360,4668625,3386790,6571896,4642496,5651307,4427150,8297486,4540320,9277789,7302246 add $0,1 mov $2,$0 lpb $0 gcd $3,$0 mov $4,$0 div $4,$3 mov $3,$4 mul $3,$0 sub $0,1 mul $3,$2 add $1,$3 lpe mov $0,$1
39.055556
496
0.745377
eae8dd1f15419c1682eddc9e9a2f70cc592ccc13
6,021
asm
Assembly
Transynther/x86/_processed/AVXALIGN/_zr_/i9-9900K_12_0xa0_notsx.log_43_1444.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
9
2020-08-13T19:41:58.000Z
2022-03-30T12:22:51.000Z
Transynther/x86/_processed/AVXALIGN/_zr_/i9-9900K_12_0xa0_notsx.log_43_1444.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
1
2021-04-29T06:29:35.000Z
2021-05-13T21:02:30.000Z
Transynther/x86/_processed/AVXALIGN/_zr_/i9-9900K_12_0xa0_notsx.log_43_1444.asm
ljhsiun2/medusa
67d769b8a2fb42c538f10287abaf0e6dbb463f0c
[ "MIT" ]
3
2020-07-14T17:07:07.000Z
2022-03-21T01:12:22.000Z
.global s_prepare_buffers s_prepare_buffers: push %r11 push %r12 push %rax push %rbp push %rcx push %rdi push %rdx push %rsi lea addresses_normal_ht+0x1a59e, %rax sub %rdx, %rdx mov $0x6162636465666768, %rdi movq %rdi, (%rax) nop cmp $65324, %r11 lea addresses_WT_ht+0x1501e, %r12 nop nop nop nop sub $5653, %rsi movb (%r12), %r11b nop nop nop dec %r11 lea addresses_A_ht+0x90e, %rsi lea addresses_WC_ht+0xc3fe, %rdi nop nop nop nop cmp $17706, %rbp mov $46, %rcx rep movsq nop nop nop and $9225, %rdi lea addresses_normal_ht+0x1a02a, %rdi nop nop nop nop dec %rdx mov $0x6162636465666768, %rcx movq %rcx, %xmm7 vmovups %ymm7, (%rdi) nop nop nop xor $25228, %rsi lea addresses_A_ht+0x26fc, %rsi lea addresses_WT_ht+0x1090e, %rdi nop xor %r11, %r11 mov $34, %rcx rep movsq nop nop nop nop cmp %rbp, %rbp lea addresses_WC_ht+0x870, %r12 nop nop xor %rcx, %rcx movw $0x6162, (%r12) nop nop nop nop nop add %rdx, %rdx lea addresses_normal_ht+0x1745e, %rsi lea addresses_D_ht+0x6d8a, %rdi nop and %rdx, %rdx mov $8, %rcx rep movsl nop nop add $14872, %r12 lea addresses_UC_ht+0x1d9c2, %rsi lea addresses_D_ht+0x15a1e, %rdi nop nop inc %rdx mov $89, %rcx rep movsl nop nop dec %rbp lea addresses_WC_ht+0xe89e, %rcx nop nop nop nop nop xor $11263, %rax mov (%rcx), %edi cmp $50888, %rdi lea addresses_D_ht+0x19c1e, %rdi nop nop nop and $36705, %rbp mov $0x6162636465666768, %rcx movq %rcx, %xmm3 and $0xffffffffffffffc0, %rdi movaps %xmm3, (%rdi) nop nop nop nop and $56358, %rax lea addresses_WC_ht+0x1c29e, %rsi lea addresses_WT_ht+0xf3c4, %rdi nop xor $64957, %r11 mov $84, %rcx rep movsq and $62523, %rcx lea addresses_UC_ht+0x1dede, %rsi lea addresses_normal_ht+0xae5e, %rdi nop nop sub %rdx, %rdx mov $106, %rcx rep movsb nop cmp $39096, %rdi lea addresses_WC_ht+0x1c44c, %rdx nop nop nop xor $38104, %rcx movw $0x6162, (%rdx) xor $50700, %r12 pop %rsi pop %rdx pop %rdi pop %rcx pop %rbp pop %rax pop %r12 pop %r11 ret .global s_faulty_load s_faulty_load: push %r12 push %r13 push %r14 push %r15 push %rbx push %rdi push %rdx // Store lea addresses_RW+0x815e, %rbx add $41976, %r12 mov $0x5152535455565758, %rdx movq %rdx, %xmm0 vmovntdq %ymm0, (%rbx) nop add %rbx, %rbx // Store lea addresses_D+0x1109e, %r13 inc %r14 mov $0x5152535455565758, %rbx movq %rbx, (%r13) nop nop nop nop nop cmp $64975, %r15 // Store lea addresses_D+0xd09e, %r15 dec %r12 mov $0x5152535455565758, %rdi movq %rdi, %xmm2 vmovups %ymm2, (%r15) nop cmp $22678, %rdx // Load mov $0xa745f000000009e, %rbx nop nop nop nop nop sub $57115, %r12 movb (%rbx), %r13b inc %r12 // Load mov $0x497445000000029e, %rdi nop xor $64530, %r14 movups (%rdi), %xmm4 vpextrq $0, %xmm4, %r15 nop nop nop sub $47623, %r15 // Store mov $0x89e, %r13 nop and %rdx, %rdx mov $0x5152535455565758, %rdi movq %rdi, %xmm7 movups %xmm7, (%r13) sub %rbx, %rbx // Faulty Load lea addresses_D+0x1109e, %r13 cmp %rdi, %rdi movaps (%r13), %xmm4 vpextrq $1, %xmm4, %rbx lea oracles, %r15 and $0xff, %rbx shlq $12, %rbx mov (%r15,%rbx,1), %rbx pop %rdx pop %rdi pop %rbx pop %r15 pop %r14 pop %r13 pop %r12 ret /* <gen_faulty_load> [REF] {'src': {'type': 'addresses_D', 'AVXalign': False, 'size': 8, 'NT': False, 'same': False, 'congruent': 0}, 'OP': 'LOAD'} {'OP': 'STOR', 'dst': {'type': 'addresses_RW', 'AVXalign': False, 'size': 32, 'NT': True, 'same': False, 'congruent': 3}} {'OP': 'STOR', 'dst': {'type': 'addresses_D', 'AVXalign': False, 'size': 8, 'NT': False, 'same': True, 'congruent': 0}} {'OP': 'STOR', 'dst': {'type': 'addresses_D', 'AVXalign': False, 'size': 32, 'NT': False, 'same': False, 'congruent': 10}} {'src': {'type': 'addresses_NC', 'AVXalign': False, 'size': 1, 'NT': False, 'same': False, 'congruent': 11}, 'OP': 'LOAD'} {'src': {'type': 'addresses_NC', 'AVXalign': False, 'size': 16, 'NT': False, 'same': False, 'congruent': 8}, 'OP': 'LOAD'} {'OP': 'STOR', 'dst': {'type': 'addresses_P', 'AVXalign': False, 'size': 16, 'NT': False, 'same': False, 'congruent': 11}} [Faulty Load] {'src': {'type': 'addresses_D', 'AVXalign': True, 'size': 16, 'NT': False, 'same': True, 'congruent': 0}, 'OP': 'LOAD'} <gen_prepare_buffer> {'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'AVXalign': False, 'size': 8, 'NT': False, 'same': False, 'congruent': 8}} {'src': {'type': 'addresses_WT_ht', 'AVXalign': False, 'size': 1, 'NT': False, 'same': False, 'congruent': 7}, 'OP': 'LOAD'} {'src': {'type': 'addresses_A_ht', 'congruent': 3, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_WC_ht', 'congruent': 5, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'AVXalign': False, 'size': 32, 'NT': False, 'same': False, 'congruent': 1}} {'src': {'type': 'addresses_A_ht', 'congruent': 1, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_WT_ht', 'congruent': 2, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_WC_ht', 'AVXalign': False, 'size': 2, 'NT': False, 'same': False, 'congruent': 1}} {'src': {'type': 'addresses_normal_ht', 'congruent': 4, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_D_ht', 'congruent': 2, 'same': True}} {'src': {'type': 'addresses_UC_ht', 'congruent': 2, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_D_ht', 'congruent': 7, 'same': False}} {'src': {'type': 'addresses_WC_ht', 'AVXalign': True, 'size': 4, 'NT': False, 'same': True, 'congruent': 11}, 'OP': 'LOAD'} {'OP': 'STOR', 'dst': {'type': 'addresses_D_ht', 'AVXalign': True, 'size': 16, 'NT': False, 'same': False, 'congruent': 5}} {'src': {'type': 'addresses_WC_ht', 'congruent': 5, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_WT_ht', 'congruent': 0, 'same': False}} {'src': {'type': 'addresses_UC_ht', 'congruent': 6, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_normal_ht', 'congruent': 6, 'same': False}} {'OP': 'STOR', 'dst': {'type': 'addresses_WC_ht', 'AVXalign': False, 'size': 2, 'NT': False, 'same': False, 'congruent': 1}} {'00': 43} 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 */
22.3829
152
0.650556
0a0eef09cda8757753926fb1925f24d6e35d522b
106
asm
Assembly
libsrc/_DEVELOPMENT/math/float/math48/lm/c/sccz80/fma.asm
jpoikela/z88dk
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
[ "ClArtistic" ]
640
2017-01-14T23:33:45.000Z
2022-03-30T11:28:42.000Z
libsrc/_DEVELOPMENT/math/float/math48/lm/c/sccz80/fma.asm
jpoikela/z88dk
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
[ "ClArtistic" ]
1,600
2017-01-15T16:12:02.000Z
2022-03-31T12:11:12.000Z
libsrc/_DEVELOPMENT/math/float/math48/lm/c/sccz80/fma.asm
jpoikela/z88dk
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
[ "ClArtistic" ]
215
2017-01-17T10:43:03.000Z
2022-03-23T17:25:02.000Z
SECTION code_clib SECTION code_fp_math48 PUBLIC fma EXTERN cm48_sccz80_fma defc fma = cm48_sccz80_fma
10.6
26
0.839623
f15e6e6a531bf5e39145acf15b1776f7df09cd5b
288
asm
Assembly
programs/oeis/271/A271519.asm
jmorken/loda
99c09d2641e858b074f6344a352d13bc55601571
[ "Apache-2.0" ]
1
2021-03-15T11:38:20.000Z
2021-03-15T11:38:20.000Z
programs/oeis/271/A271519.asm
jmorken/loda
99c09d2641e858b074f6344a352d13bc55601571
[ "Apache-2.0" ]
null
null
null
programs/oeis/271/A271519.asm
jmorken/loda
99c09d2641e858b074f6344a352d13bc55601571
[ "Apache-2.0" ]
null
null
null
; A271519: Let n = (2*i + 1)*2^j; then a(n) = i + j. ; 0,1,1,2,2,2,3,3,4,3,5,3,6,4,7,4,8,5,9,4,10,6,11,4,12,7,13,5,14,8,15,5,16,9,17,6,18,10,19,5,20,11,21,7,22,12,23,5,24,13,25,8,26,14,27,6,28,15,29,9,30,16,31,6 mov $2,1 lpb $0 sub $0,$2 add $1,4 gcd $2,$0 mul $2,2 lpe div $1,4
24
158
0.534722
3136df058ea4ef71fdd15bf3d417e9edbd842d07
108
asm
Assembly
software/profi/net-tools/src/pqdos/wget/dos/msxdos.asm
andykarpov/karabas-pro
11d897e51a7a66fddcdfb97fc7b785ca535d48dd
[ "MIT" ]
26
2020-07-25T15:00:32.000Z
2022-03-22T19:30:04.000Z
software/profi/net-tools/src/pqdos/wget/dos/msxdos.asm
zxrepo/andykarpov.karabas-pro
ab84aa2c95c206b2384d99054eb23cbe6aeec56b
[ "MIT" ]
42
2020-07-29T14:29:18.000Z
2022-03-22T11:34:28.000Z
software/profi/net-tools/src/pqdos/wget/dos/msxdos.asm
zxrepo/andykarpov.karabas-pro
ab84aa2c95c206b2384d99054eb23cbe6aeec56b
[ "MIT" ]
7
2020-09-07T14:21:31.000Z
2022-01-24T17:18:56.000Z
BDOS = 5 CLI_PARAMS_COUNT = #80 CLI_PARAMS = #81 include "files.asm" include "console.asm"
15.428571
25
0.62037
31524deea175b4935971f72866d8cf72ac74e543
28,376
asm
Assembly
Library/Spreadsheet/Spreadsheet/spreadsheetRowColumn.asm
steakknife/pcgeos
95edd7fad36df400aba9bab1d56e154fc126044a
[ "Apache-2.0" ]
504
2018-11-18T03:35:53.000Z
2022-03-29T01:02:51.000Z
Library/Spreadsheet/Spreadsheet/spreadsheetRowColumn.asm
steakknife/pcgeos
95edd7fad36df400aba9bab1d56e154fc126044a
[ "Apache-2.0" ]
96
2018-11-19T21:06:50.000Z
2022-03-06T10:26:48.000Z
Library/Spreadsheet/Spreadsheet/spreadsheetRowColumn.asm
steakknife/pcgeos
95edd7fad36df400aba9bab1d56e154fc126044a
[ "Apache-2.0" ]
73
2018-11-19T20:46:53.000Z
2022-03-29T00:59:26.000Z
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% Copyright (c) GeoWorks 1992 -- All Rights Reserved PROJECT: PC GEOS MODULE: FILE: spreadsheetColumn.asm AUTHOR: Gene Anderson, Aug 27, 1992 ROUTINES: Name Description ---- ----------- MSG_SPREADSHEET_SET_ROW_HEIGHT MSG_SPREADSHEET_CHANGE_ROW_HEIGHT MSG_SPREADSHEET_SET_COLUMN_WIDTH MSG_SPREADSHEET_CHANGE_COLUMN_WIDTH INT RecalcRowHeights Recalculate row heights and baseline for selected rows INT RecalcRowHeightsInRange Recalculate the row-heights for a range of rows INT CalcRowHeight Calculate the row height based on pointsizes in use INT FindMaxPointsize Find the maximum pointsize of a row INT GetColumnsFromParams Get columns to use from message parameters INT GetRowsFromParams Get rows to use from message parameters INT GetColumnBestFit Get the best fit for a column INT CellBestFit Calculate the column width needed for one cell REVISION HISTORY: Name Date Description ---- ---- ----------- Gene 8/27/92 Initial revision DESCRIPTION: Routines and method handlers for rows and columns. $Id: spreadsheetRowColumn.asm,v 1.1 97/04/07 11:13:18 newdeal Exp $ %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ AttrCode segment resource COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SpreadsheetSetRowHeight %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SYNOPSIS: Set the row height of the current selection CALLED BY: MSG_SPREADSHEET_SET_ROW_HEIGHT PASS: *ds:si - instance data ds:di - *ds:si es - seg addr of SpreadsheetClass ax - the method cx - row height (ROW_HEIGHT_AUTOMATIC or'd for automatic) dx - SPREADSHEET_ADDRESS_USE_SELECTION or row # RETURN: none DESTROYED: bx, si, di, ds, es (method handler) PSEUDO CODE/STRATEGY: The general rule for the baseline KNOWN BUGS/SIDE EFFECTS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- eca 3/10/91 Initial version %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ SpreadsheetSetRowHeight method dynamic SpreadsheetClass, \ MSG_SPREADSHEET_SET_ROW_HEIGHT .enter call SpreadsheetMarkBusy mov si, di ;ds:si <- ptr to instance data call GetRowsFromParams ;(ax,cx) <- range of rows jc done ; ; For each row selected, set the height ; mov bx, dx andnf dx, not (ROW_HEIGHT_AUTOMATIC) ;dx <- height andnf bx, (ROW_HEIGHT_AUTOMATIC) ;bx <- flag push ax rowLoop: call RowSetHeight inc ax ;ax <- next row cmp ax, cx ;at end? jbe rowLoop ;branch while more rows pop ax ; ; Recalculate the row heights ; call RecalcRowHeightsInRange ; ; Recalcuate the document size for the view, update the UI, ; and redraw ; mov ax, mask SNF_CELL_WIDTH_HEIGHT call UpdateDocUIRedrawAll done: call SpreadsheetMarkNotBusy .leave ret SpreadsheetSetRowHeight endm COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SpreadsheetChangeRowHeight %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SYNOPSIS: Change height of a row CALLED BY: MSG_SPREADSHEET_CHANGE_ROW_HEIGHT PASS: *ds:si - instance data ds:di - *ds:si es - seg addr of SpreadsheetClass ax - the message cx - change in row height dx - SPREADSHEET_ADDRESS_USE_SELECTION or row # RETURN: DESTROYED: bx, si, di, ds, es (method handler) PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- eca 7/29/92 Initial version %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ SpreadsheetChangeRowHeight method dynamic SpreadsheetClass, \ MSG_SPREADSHEET_CHANGE_ROW_HEIGHT call SpreadsheetMarkBusy mov si, di ;ds:si <- ptr to spreadsheet mov bp, cx ;bp <- change in height call GetRowsFromParams ;(ax,cx) <- range of rows jc done ; ; For each row, change the height ; clr bx ;bx <- no baseline push ax rowLoop: call RowGetHeightFar ;dx <- current height add dx, bp ;dx <- new height call RowSetHeight inc ax ;ax <- next row cmp ax, cx ;at end? jbe rowLoop pop ax ; ; Recalculate the row heights ; call RecalcRowHeightsInRange ; ; Recalculate the document size for the view, update the UI, ; and redraw ; mov ax, mask SNF_CELL_WIDTH_HEIGHT call UpdateDocUIRedrawAll done: call SpreadsheetMarkNotBusy ret SpreadsheetChangeRowHeight endm COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% RecalcRowHeights %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SYNOPSIS: Recalculate row heights and baseline for selected rows CALLED BY: SpreadsheetSetRowHeight(), SpreadsheetSetPointsize() PASS: ds:si - ptr to Spreadsheet instance RETURN: none DESTROYED: ax, bx, cx, dx PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- eca 3/22/91 Initial version %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ RecalcRowHeightsFar proc far class SpreadsheetClass .enter EC < call ECCheckInstancePtr ;> ; ; For each selected row, see if we should recalculate ; the height based on the pointsize change. ; mov ax, ds:[si].SSI_selected.CR_start.CR_row mov cx, ds:[si].SSI_selected.CR_end.CR_row call RecalcRowHeightsInRange .leave ret RecalcRowHeightsFar endp COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% RecalcRowHeightsInRange %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SYNOPSIS: Recalculate the row-heights for a range of rows. CALLED BY: RecalcRowHeights, SpreadsheetInsertSpace PASS: ds:si = Spreadsheet instance ax = Top row of range cx = Bottom row of range RETURN: nothing DESTROYED: bx, cx, dx PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- jcw 7/12/91 Initial version %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ RecalcRowHeightsInRange proc far uses di .enter EC < call ECCheckInstancePtr ;> sub cx, ax inc cx ;cx <- # of rows to set rowLoop: call RowGetBaseline ;bx <- baseline and flag test dx, ROW_HEIGHT_AUTOMATIC ;automatic height? jz manualHeight ;branch if manual call CalcRowHeight ;calculate row height ornf bx, ROW_HEIGHT_AUTOMATIC ;bx <- set as automatic setHeight: call RowSetHeight inc ax ;ax <- next row loop rowLoop .leave ret ; ; The row height is marked as manual. We still ; need to calculate the baseline, but the height ; remains unchanged. ; manualHeight: push ax call RowGetHeightFar ;dx <- current row height push dx call CalcRowHeight ;bx <- baseline mov ax, dx ;ax <- calculated height pop dx ;dx <- current row height add bx, dx ;bx <- baseline = baseline sub bx, ax ; + (height - calculated) pop ax jns setHeight ;baseline above bottom ; of cell? clr bx ;if not, Sbaseline = 0 jmp setHeight RecalcRowHeightsInRange endp COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% CalcRowHeight %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SYNOPSIS: Calculate the row height based on pointsizes in use CALLED BY: SpreadsheetSetRowHeight() PASS: ds:si - ptr to Spreadsheet instance data ax - row # RETURN: dx - new row height bx - new baseline offset DESTROYED: bx, dx, di PSEUDO CODE/STRATEGY: row_height = MAX(pointsize) * 1.25 baseline = MAX(pointsize) - 1 NOTE: in order to include pointsize in the optimizations used for setting attributes on an entire column, this routine will need to change a fair amount... KNOWN BUGS/SIDE EFFECTS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- eca 3/11/91 Initial version %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ CalcRowHeight proc near uses ax, cx, es class SpreadsheetClass locals local CellLocals .enter EC < call ECCheckInstancePtr ;> mov bx, ax mov cx, MIN_ROW mov dx, ds:[si].SSI_maxCol ;(ax,bx,cx,dx) <- range to enum mov ss:locals.CL_data1, cx ;pass data word #1 clr di ;di <- RangeEnumFlags mov ss:locals.CL_data2, di ;pass data word #2 mov ss:locals.CL_params.REP_callback.segment, SEGMENT_CS mov ss:locals.CL_params.REP_callback.offset, offset FindMaxPointsize call CallRangeEnum ;ax <- max pointsize * 8 ; ; See if all cells had data. If not, we need to take into account ; the default pointsize, as that is what empty cells have. ; cmp ss:locals.CL_data2, dx ;all cells have data? je noEmptyCells ;branch if all cells filled mov ax, DEFAULT_STYLE_TOKEN ;ax <- style to get mov bx, offset CA_pointsize ;bx <- CellAttrs field call StyleGetAttrByTokenFar ;ax <- pointsize cmp ax, ss:locals.CL_data1 ;larger than maximum? ja defaultIsMax ;branch if new maximum noEmptyCells: mov ax, ss:locals.CL_data1 ;ax <- (pointsize * 8) defaultIsMax: mov dx, ax ;dx <- (pointsize * 8) mov bx, ax shr bx, 1 shr bx, 1 ;bx <- (pointsize * 8) / 4 add dx, bx ;dx <- (pointsize * 8) * 1.25 dec ax ;ax <- pointsize - 1 mov bx, ax ;bx <- pointsize - 1 shr dx, 1 shr dx, 1 shr dx, 1 ;dx <- new row height shr bx, 1 shr bx, 1 shr bx, 1 ;bx <- new baseline .leave ret CalcRowHeight endp COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% FindMaxPointsize %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SYNOPSIS: Find the maximum pointsize of a row. CALLED BY: CalcRowHeight() via RangeEnum() PASS: (ax,cx) - current cell (r,c) bx - handle of file ss:bp - ptr to CellLocals variables CL_data1 - maximum pointsize CL_data2 - # of cells called back for *es:di - ptr to cell data, if any ds:si - ptr to Spreadsheet instance carry - set if cell has data RETURN: carry - set to abort enumeration CL_data1 - (new) maximum pointsize CL_data2 - # of cells, updated DESTROYED: dh PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- eca 3/12/91 Initial version %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ FindMaxPointsize proc far uses ax, bx, cx, dx, si, di, ds, es locals local CellLocals .enter inherit EC < ERROR_NC BAD_CALLBACK_FOR_EMPTY_CELL ;> EC < call ECCheckInstancePtr ;> mov di, es:[di] ;es:di <- ptr to cell mov ax, es:[di].CC_attrs ;ax <- style token segmov es, ss lea di, ss:locals.CL_cellAttrs ;es:di <- ptr to style buffer call StyleGetStyleByTokenFar mov ax, ss:locals.CL_cellAttrs.CA_pointsize cmp ax, ss:locals.CL_data1 ;larger pointsize? jbe notBigger mov ss:locals.CL_data1, ax ;store new maximum pointsize notBigger: clc ;carry <- don't abort .leave ret FindMaxPointsize endp COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SpreadsheetSetColumnWidth %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SYNOPSIS: Set the column width for selected columns CALLED BY: MSG_SPREADSHEET_SET_COLUMN_WIDTH PASS: *ds:si - instance data ds:di - *ds:si es - seg addr of SpreadsheetClass ax - the method cx - column width COLUMN_WIDTH_BEST_FIT - OR'ed for best fit dx - SPREADSHEET_ADDRESS_USE_SELECTION or row # RETURN: none DESTROYED: bx, si, di, ds, es (method handler) PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- eca 3/22/91 Initial version %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ SpreadsheetSetColumnWidth method dynamic SpreadsheetClass, \ MSG_SPREADSHEET_SET_COLUMN_WIDTH .enter call SpreadsheetMarkBusy mov si, di ;ds:si <- ptr to instance call GetColumnsFromParams ;(cx,ax) <- columns jc done test dx, COLUMN_WIDTH_BEST_FIT jnz getBestFit RoundToByte dx ;dx <- round to byte multiple ; ; HACK: if the rounding the new column will give the current column ; width, send out bogus notification with the unrounded column width ; so that when we send out notification with the rounded column ; width, the GCN list mechanism won't ignore it because the new column ; width notification is the same as the current column width ; notification. We want the new column width notification to occur ; because the column width controller is still display the unrounded ; column width that the user just entered - brianc 10/11/94 ; dx = new rounded column width ; mov bx, dx ;bx = new rounded column width call ColumnGetWidthFar ;dx = current width xchg bx, dx ;dx = new rounded column width ;bx = current width cmp bx, dx ;same? jne columnLoop ;nope, notification will work call SS_SendNotificationBogusWidth ;else, send bogus notif first columnLoop: call ColumnSetWidth inc cx ;cx <- next column cmp cx, ax ;end of selection? jbe columnLoop ;branch while more columns ; ; Recalcuate the document size for the view, update the UI, ; and redraw ; doneColumns: mov ax, mask SNF_CELL_WIDTH_HEIGHT call UpdateDocUIRedrawAll done: call SpreadsheetMarkNotBusy .leave ret ; ; Find the width of all the strings in the column and set the ; width based on them. ; getBestFit: call GetColumnBestFit cmp dx, 0 ;no data? je noData ;branch if no data add dx, 7 ;dx <- always round up RoundToByte dx ;dx <- round to byte multiple cmp dx, SS_COLUMN_WIDTH_MAX ;width too large? jbe widthOK ;branch if OK mov dx, SS_COLUMN_WIDTH_MAX ;dx <- set to maximum width widthOK: call ColumnSetWidth inc cx ;cx <- next column cmp cx, ax ;end of selection? jbe getBestFit jmp doneColumns ; ; The column had no data -- set the width to the default ; noData: mov dx, COLUMN_WIDTH_DEFAULT jmp widthOK SpreadsheetSetColumnWidth endm COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SpreadsheetChangeColumnWidth %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SYNOPSIS: Make the selected columns wider/narrower CALLED BY: MSG_SPREADSHEET_CHANGE_COLUMN_WIDTH PASS: *ds:si - instance data ds:di - *ds:si es - seg addr of SpreadsheetClass ax - the method cx - change in column widths dx - SPREADSHEET_ADDRESS_USE_SELECTION or column # RETURN: none DESTROYED: bx, si, di, ds, es (method handler) PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- eca 3/22/91 Initial version %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ SpreadsheetChangeColumnWidth method dynamic SpreadsheetClass, \ MSG_SPREADSHEET_CHANGE_COLUMN_WIDTH .enter call SpreadsheetMarkBusy mov bx, cx ;bx <- delta for widths mov si, di ;ds:si <- ptr to instance call GetColumnsFromParams ;(cx,ax) <- columns to use jc done columnLoop: ; ; bx = Amount to change the column width by. ; call ColumnGetWidthFar ;dx <- column width add dx, bx ;dx <- new column width ; ; Make sure that the column isn't too narrow/wide. ; jns notTooNarrow ;branch if not too negative clr dx ;new width notTooNarrow: cmp dx, SS_COLUMN_WIDTH_MAX ;check for too wide jbe notTooWide ;branch if not too wide mov dx, SS_COLUMN_WIDTH_MAX ;new width notTooWide: RoundToByte dx ;dx <- round to byte multiple ; ; dx = new column width. ; call ColumnSetWidth ;set new width inc cx ;cx <- next column cmp cx, ax ;end of selection? jbe columnLoop ;branch while more columns ; ; Recalcuate the document size for the view, update the UI, ; and redraw ; mov ax, mask SNF_CELL_WIDTH_HEIGHT call UpdateDocUIRedrawAll done: call SpreadsheetMarkNotBusy .leave ret SpreadsheetChangeColumnWidth endm COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% GetColumnsFromParams %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SYNOPSIS: Get columns to use from message parameters CALLED BY: UTILITY PASS: ds:si - ptr to Spreadsheet instance dx - SPREADSHEET_ADDRESS_USE_SELECTION or column # RETURN: dx - old cx cx - start column ax - end column carry SET if column range invalid DESTROYED: nothing PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- eca 7/29/92 Initial version %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ GetColumnsFromParams proc near class SpreadsheetClass uses bx .enter push cx ; ; Assume using the passed column ; mov cx, dx ;cx <- start column mov ax, dx ;ax <- end column cmp ax, SPREADSHEET_ADDRESS_USE_SELECTION jne done ; ; Use current selection ; mov cx, ds:[si].SSI_selected.CR_start.CR_column mov ax, ds:[si].SSI_selected.CR_end.CR_column done: pop dx ;dx <- old cx xchg ax, cx mov bx, offset SDO_rowCol.CR_column call CheckMinRowOrColumn xchg ax, cx .leave ret GetColumnsFromParams endp COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% GetRowsFromParams %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SYNOPSIS: Get rows to use from message parameters CALLED BY: UTILITY PASS: ds:si - ptr to Spreadsheet instance dx - SPREADSHEET_ADDRESS_USE_SELECTION or row # RETURN: dx - old cx ax - start row cx - end row carry SET if range invalid DESTROYED: none PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- eca 7/29/92 Initial version %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ GetRowsFromParams proc near class SpreadsheetClass uses bx .enter push cx ; ; Assume using the passed row ; mov ax, dx ;ax <- start row mov cx, dx ;cx <- end row cmp ax, SPREADSHEET_ADDRESS_USE_SELECTION jne done ; ; Use current selection ; mov ax, ds:[si].SSI_selected.CR_start.CR_row mov cx, ds:[si].SSI_selected.CR_end.CR_row done: pop dx ;dx <- old cx mov bx, offset SDO_rowCol.CR_row call CheckMinRowOrColumn .leave ret GetRowsFromParams endp COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% CheckMinRowOrColumn %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SYNOPSIS: Check the passed pair of rows or columns against the spreadsheet's minimum CALLED BY: GetRowsFromParams, GetColumnsFromParams PASS: (ax, cx) - min, max pair bx - offset to vardata to check ds:si - pointer to spreadsheet instance data RETURN: if range invalid: carry SET else: ax - fixed up if necessary DESTROYED: bx PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- chrisb 12/ 1/94 Initial version. %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ CheckMinRowOrColumn proc near class SpreadsheetClass uses si .enter test ds:[si].SSI_flags, mask SF_NONZERO_DOC_ORIGIN jz checkZero push ax, bx ; offset to vardata field mov si, ds:[si].SSI_chunk mov ax, TEMP_SPREADSHEET_DOC_ORIGIN call ObjVarFindData pop ax, si jnc checkZero mov bx, ds:[bx][si] ; min row or column checkMin: cmp cx, bx stc jl done ; entire range is bad cmp ax, bx jg done ; ; Beginning of range needs to be moved up ; mov ax, bx done: .leave ret checkZero: clr bx jmp checkMin CheckMinRowOrColumn endp COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% GetColumnBestFit %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SYNOPSIS: Get the best fit for a column CALLED BY: SpreadsheetSetColumnWidth() PASS: ds:si - ptr to Spreadsheet instance cx - column # RETURN: dx - best column width DESTROYED: bx, di PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- gene 8/27/92 Initial version %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ GetColumnBestFit proc near uses ax class SpreadsheetClass locals local CellLocals .enter clr ax mov bx, ds:[si].SSI_maxRow mov dx, cx ;(ax,cx),(bx,dx) <- range call CreateGStateFar mov ss:locals.CL_gstate, di ;pass GState mov ss:locals.CL_params.REP_callback.segment, SEGMENT_CS mov ss:locals.CL_params.REP_callback.offset, offset CellBestFit clr ss:locals.CL_data1 ;<- maximum width so far clr di ;di <- RangeEnumFlags call CallRangeEnum ; ; Return the maximum we found ; mov dx, ss:locals.CL_data1 ;dx <- maximum width found call DestroyGStateFar .leave ret GetColumnBestFit endp COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% CellBestFit %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SYNOPSIS: Calculate the column width needed for one cell CALLED BY: GetColumnBestFit() via RangeEnum() PASS: ss:bp - ptr to CallRangeEnum() local variables ds:si - ptr to SpreadsheetInstance data (ax,cx) - cell coordinates (r,c) carry - set if cell has data *es:di - ptr to cell data, if any CL_data1 - maximum width so far RETURN: carry - set to abort enum DESTROYED: none PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- gene 8/27/92 Initial version %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ SizeBadCellType proc near EC < ERROR ILLEGAL_CELL_TYPE > NEC < ret > SizeBadCellType endp cellSizeRoutines nptr \ SizeTextCell, ;CT_TEXT SizeConstantCell, ;CT_CONSTANT SizeFormulaCell, ;CT_FORMULA SizeBadCellType, ;CT_NAME SizeBadCellType, ;CT_CHART SizeBadCellType, ;CT_EMPTY SizeDisplayFormulaCell ;CT_DISPLAY_FORMULA CheckHack <(size cellSizeRoutines) eq CellType> CellBestFit proc far uses ax, bx, cx, dx, si, di, ds, es locals local CellLocals .enter inherit EC < ERROR_NC BAD_CALLBACK_FOR_EMPTY_CELL ;> mov bx, ss:locals.CL_gstate ;bx <- GState to draw with xchg bx, di ;*es:bx <- ptr to cell data ;di <- GState to use ; ; Set up the GState based on the current cell attributes ; mov bx, es:[bx] ;es:bx <- ptr to cell data mov dx, es:[bx].CC_attrs ;dx <- cell style attrs call SetCellGStateAttrsFar ;setup GState, locals correctly ; ; Get a pointer to the cell data and the type ; mov dx, bx ;es:dx <- ptr to cell data mov bl, es:[bx].CC_type cmp bl, CT_EMPTY ;no data? je done ;branch if empty clr bh ;bx <- cell type ; ; Get the data in text format ; call cs:cellSizeRoutines[bx] ;ds:si <- ptr to text ; ; Get the width of the text string, and see if it is a new largest value ; clr cx ;cx <- text is NULL terminated call GrTextWidth ;dx <- width add dx, (CELL_INSET)*2 cmp dx, ss:locals.CL_data1 ;largest so far? jbe done ;branch if not largest mov ss:locals.CL_data1, dx ;store new largest done: clc ;carry <- don't abort .leave ret CellBestFit endp COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SizeTextCell %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SYNOPSIS: Get text for a text cell for calculating size CALLED BY: CellBestFit() PASS: es:dx - ptr to cell data RETURN: ds:si - ptr text string DESTROYED: none PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- gene 8/27/92 Initial version %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ SizeTextCell proc near .enter segmov ds, es mov si, dx ;ds:si <- ptr to cell data add si, (size CellText) ;ds:si <- ptr to string .leave ret SizeTextCell endp COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SizeConstantCell %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SYNOPSIS: Get text for a constant cell CALLED BY: CellBestFit() PASS: es:dx - ptr to cell data ds:si - ptr to Spreadsheet instance ss:bp - inherited CellLocals RETURN: ds:si - ptr to text string DESTROYED: ax, bx, cx, es PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- gene 8/27/92 Initial version %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ SizeConstantCell proc near class SpreadsheetClass uses di locals local CellLocals .enter inherit mov bx, ds:[si].SSI_cellParams.CFP_file mov cx, ds:[si].SSI_formatArray segmov ds, es, ax mov si, dx add si, offset CC_current ;ds:si <- ptr to float number segmov es, ss, ax lea di, ss:locals.CL_buffer ;es:di <- ptr to the buffer mov ax, ss:locals.CL_cellAttrs.CA_format call FloatFormatNumber ;convert to ASCII segmov ds, ss mov si, di ;ds:si <- ptr to result string .leave ret SizeConstantCell endp COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SizeFormulaCell %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SYNOPSIS: Get text for a formula cell CALLED BY: CellBestFit() PASS: es:dx - ptr to cell data (ax,cx) - (r,c) of cell ds:si - ptr to Spreadsheet instance ss:bp - inherited CellLocals RETURN: ds:si - ptr to text string DESTROYED: ax, bx, cx, dx, es PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- gene 8/27/92 Initial version %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ SizeFormulaCell proc near uses di, bp locals local CellLocals .enter inherit lea di, ss:locals.CL_buffer ;ss:di <- ptr to dest buffer mov bp, dx ;dx:bp <- ptr to cell data mov dx, es segmov es, ss ;es:di <- ptr to dest buffer call FormulaCellGetResult segmov ds, es, si mov si, di ;ds:si <- ptr to text .leave ret SizeFormulaCell endp COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SizeDisplayFormulaCell %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% SYNOPSIS: Get text for a display formula cell CALLED BY: CellBestFit() PASS: es:dx - ptr to cell data (ax,cx) - (r,c) of cell ds:si - ptr to Spreadsheet instance ss:bp - inherited CellLocals RETURN: ds:si - ptr to text string DESTROYED: ax, bx, cx, dx, es PSEUDO CODE/STRATEGY: KNOWN BUGS/SIDE EFFECTS/IDEAS: REVISION HISTORY: Name Date Description ---- ---- ----------- gene 8/27/92 Initial version %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ SizeDisplayFormulaCell proc near uses di, bp locals local CellLocals .enter inherit lea di, ss:locals.CL_buffer ;ss:di <- ptr to dest buffer mov bp, dx ;dx:bp <- ptr to cell data mov dx, es segmov es, ss ;es:di <- ptr to dest buffer call FormulaDisplayCellGetResult segmov ds, es, si mov si, di ;ds:si <- ptr to text .leave ret SizeDisplayFormulaCell endp AttrCode ends
25.843352
79
0.589583
0eb019c1f8900f1725797a08d2dff0306870a6ea
229
asm
Assembly
libsrc/target/lm80c/stdio/getk.asm
ahjelm/z88dk
c4de367f39a76b41f6390ceeab77737e148178fa
[ "ClArtistic" ]
640
2017-01-14T23:33:45.000Z
2022-03-30T11:28:42.000Z
libsrc/target/lm80c/stdio/getk.asm
C-Chads/z88dk
a4141a8e51205c6414b4ae3263b633c4265778e6
[ "ClArtistic" ]
1,600
2017-01-15T16:12:02.000Z
2022-03-31T12:11:12.000Z
libsrc/target/lm80c/stdio/getk.asm
C-Chads/z88dk
a4141a8e51205c6414b4ae3263b633c4265778e6
[ "ClArtistic" ]
215
2017-01-17T10:43:03.000Z
2022-03-23T17:25:02.000Z
SECTION code_clib PUBLIC getk PUBLIC _getk EXTERN LASTKEYPRSD .getk ._getk ld h,0 ld a,(LASTKEYPRSD) ld l,a IF STANDARDESCAPECHARS cp 13 jr nz,not_return ld l,10 .not_return ENDIF xor a ld (LASTKEYPRSD),a ret
10.409091
22
0.720524
f2155cdc9e5c4b610790696a9616037242786430
11,597
asm
Assembly
transformy/tables/outro/0006.asm
mborik/regression
25b5f2204ce668594449e8ce804779288b895ac0
[ "MIT" ]
3
2019-09-18T05:34:22.000Z
2020-12-04T17:46:52.000Z
transformy/tables/outro/0006.asm
mborik/regression
25b5f2204ce668594449e8ce804779288b895ac0
[ "MIT" ]
null
null
null
transformy/tables/outro/0006.asm
mborik/regression
25b5f2204ce668594449e8ce804779288b895ac0
[ "MIT" ]
1
2020-01-17T01:04:24.000Z
2020-01-17T01:04:24.000Z
xor a ld hl, basescradr + #0a32 ld (hl), a inc h ld (hl), a inc h ld (hl), a ld hl, basescradr + #0a33 ld (hl), a inc h ld (hl), a inc h ld (hl), a ld hl, basescradr + #0a34 ld (hl), a inc h ld (hl), a inc h ld (hl), a ld hl, basescradr + #0a35 ld (hl), a inc h ld (hl), a inc h ld (hl), a ld hl, basescradr + #0a36 ld (hl), a inc h ld (hl), a inc h ld (hl), a ld hl, basescradr + #0a37 ld (hl), a inc h ld (hl), a inc h ld (hl), a ld hl, basescradr + #102e ld (hl), a inc h ld (hl), a inc h ld (hl), a ld hl, basescradr + #1036 ld (hl), a inc h ld (hl), a inc h ld (hl), a ld d,a ld e,a ld (basescradr + #0b30), de ld (basescradr + #0b50), de ld (basescradr + #0baf), de ld (basescradr + #0c8f), de ld (basescradr + #0f30), de ld (basescradr + #0f8f), de ld (basescradr + #05cb), a ld (basescradr + #06cb), a ld (basescradr + #0850), a ld (basescradr + #0870), a ld (basescradr + #0890), a ld (basescradr + #08af), a ld (basescradr + #08cf), a ld (basescradr + #08ef), a ld (basescradr + #094a), a ld (basescradr + #09ea), a ld (basescradr + #0aea), a ld (basescradr + #0b70), a ld (basescradr + #0b90), a ld (basescradr + #0bcf), a ld (basescradr + #0bef), a ld (basescradr + #0c30), a ld (basescradr + #0c50), a ld (basescradr + #0c70), a ld (basescradr + #0caf), a ld (basescradr + #0ccf), a ld (basescradr + #0cef), a ld (basescradr + #0d2a), a ld (basescradr + #0dc9), a ld (basescradr + #0deb), a ld (basescradr + #0e2a), a ld (basescradr + #0eeb), a ld (basescradr + #0f50), a ld (basescradr + #0f70), a ld (basescradr + #0faf), a ld (basescradr + #0fcf), a ld (basescradr + #0fef), a ld (basescradr + #110c), a ld (basescradr + #130f), a ld (basescradr + #150d), a ld (basescradr + #160d), a ld (basescradr + #170f), a ld a, 100 ld (basescradr + #01ed), a ld (basescradr + #02ed), a ld (basescradr + #05cc), a ld (basescradr + #06cc), a ld a, 2 ld (basescradr + #01eb), a ld (basescradr + #02eb), a ld (basescradr + #0a4a), a ld (basescradr + #0aa9), a ld (basescradr + #0d4a), a ld a, 102 ld d,a ld e,a ld (basescradr + #0950), de ld (basescradr + #0a50), de ld (basescradr + #0a8f), de ld (basescradr + #0aaf), de ld (basescradr + #0d30), de ld (basescradr + #0d50), de ld (basescradr + #0e30), de ld (basescradr + #0e50), de ld (basescradr + #0e8f), de ld (basescradr + #0eaf), de ld (basescradr + #01ec), a ld (basescradr + #02ec), a ld (basescradr + #05ed), a ld (basescradr + #090e), a ld (basescradr + #0930), a ld (basescradr + #0970), a ld (basescradr + #0990), a ld (basescradr + #09b0), a ld (basescradr + #09cf), a ld (basescradr + #09ef), a ld (basescradr + #0a30), a ld (basescradr + #0a70), a ld (basescradr + #0acf), a ld (basescradr + #0aef), a ld (basescradr + #0d0f), a ld (basescradr + #0d70), a ld (basescradr + #0d90), a ld (basescradr + #0db0), a ld (basescradr + #0dcf), a ld (basescradr + #0def), a ld (basescradr + #0e0f), a ld (basescradr + #0e70), a ld (basescradr + #0ecf), a ld (basescradr + #0eef), a ld (basescradr + #110f), a ld (basescradr + #112f), a ld (basescradr + #120f), a ld (basescradr + #122f), a ld (basescradr + #150f), a ld (basescradr + #160f), a ld a, 6 ld (basescradr + #05eb), a ld (basescradr + #06eb), a ld (basescradr + #090b), a ld (basescradr + #09c9), a ld (basescradr + #0a0b), a ld (basescradr + #0ac9), a ld (basescradr + #0aeb), a ld (basescradr + #0d6a), a ld (basescradr + #0da9), a ld (basescradr + #0ea9), a ld (basescradr + #0eca), a ld (basescradr + #0eec), a ld (basescradr + #120d), a ld a, 64 ld (basescradr + #05f4), a ld (basescradr + #0915), a ld (basescradr + #0937), a ld (basescradr + #0d16), a ld a, 96 ld (basescradr + #06ee), a ld (basescradr + #0a0f), a ld (basescradr + #0a31), a ld (basescradr + #0e10), a ld a, 38 ld (basescradr + #092b), a ld (basescradr + #0d0b), a ld (basescradr + #0dca), a ld (basescradr + #0dec), a ld (basescradr + #0e0b), a ld a, 4 ld (basescradr + #0931), a ld a, 1 ld (basescradr + #08b0), a ld (basescradr + #0c31), a ld (basescradr + #100f), a ld a, 192 ld (basescradr + #0958), a ld (basescradr + #09b7), a ld (basescradr + #0a58), a ld (basescradr + #0ab7), a ld (basescradr + #0d38), a ld (basescradr + #0e38), a ld (basescradr + #1116), a ld (basescradr + #1216), a ld (basescradr + #1416), a ld a, 238 ld hl, basescradr + #0a52 ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a ld hl, basescradr + #0a72 ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a ld hl, basescradr + #0a92 ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a ld hl, basescradr + #0ab1 ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a ld hl, basescradr + #0ad1 ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a ld hl, basescradr + #0af1 ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a ld hl, basescradr + #0e32 ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a ld hl, basescradr + #0e52 ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a ld hl, basescradr + #0e72 ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a ld hl, basescradr + #0e91 ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a ld hl, basescradr + #0eb1 ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a ld hl, basescradr + #0ed1 ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a ld hl, basescradr + #0ef0 ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a ld hl, basescradr + #1210 ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a ld hl, basescradr + #1230 ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a ld hl, basescradr + #1610 ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a ld (basescradr + #0957), a ld (basescradr + #0977), a ld (basescradr + #0d57), a ld a, 136 ld hl, basescradr + #0b52 ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a ld hl, basescradr + #0b72 ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a ld hl, basescradr + #0b91 ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a ld hl, basescradr + #0bb1 ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a ld hl, basescradr + #0bd1 ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a ld hl, basescradr + #0bf0 ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a ld hl, basescradr + #0f32 ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a ld hl, basescradr + #0f52 ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a ld hl, basescradr + #0f72 ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a ld hl, basescradr + #0f91 ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a ld hl, basescradr + #0fb1 ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a ld hl, basescradr + #0fd1 ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a ld hl, basescradr + #0ff0 ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a ld hl, basescradr + #1310 ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a ld hl, basescradr + #1330 ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a ld hl, basescradr + #1710 ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a ld a, 128 ld hl, basescradr + #0b58 ld (hl), a inc h ld (hl), a inc h ld (hl), a inc h ld (hl), a ld hl, basescradr + #0bb7 ld (hl), a inc h ld (hl), a inc h ld (hl), a ld (basescradr + #0bf6), a ld (basescradr + #0f38), a ld (basescradr + #0ff6), a ld (basescradr + #1316), a ld (basescradr + #1516), a ld (basescradr + #1616), a ld a, 3 ld (basescradr + #0851), a ld (basescradr + #140f), a ld a, 255 ld hl, basescradr + #1430 ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a inc hl ld (hl), a ld (basescradr + #0857), a ld (basescradr + #0877), a ld (basescradr + #08d6), a ld (basescradr + #0c57), a ld a, 224 ld (basescradr + #0858), a ld (basescradr + #08b7), a ld (basescradr + #0d97), a ld (basescradr + #0e97), a ld (basescradr + #0ef6), a ld (basescradr + #1016), a ld a, 7 ld (basescradr + #0c51), a ld (basescradr + #0cb0), a ld (basescradr + #102f), a ld (basescradr + #142f), a inc a ld (basescradr + #0b71), a ld (basescradr + #0bd0), a ld (basescradr + #0f51), a ld (basescradr + #0f71), a ld (basescradr + #0fb0), a ld (basescradr + #0fd0), a ld a, 15 ld (basescradr + #0871), a ld (basescradr + #08d0), a ld a, 110 ld (basescradr + #0971), a ld (basescradr + #0991), a ld (basescradr + #09d0), a ld (basescradr + #09f0), a ld (basescradr + #0a71), a ld (basescradr + #0a91), a ld (basescradr + #0ad0), a ld (basescradr + #0af0), a ld (basescradr + #0d71), a ld (basescradr + #0dd0), a ld (basescradr + #0e71), a ld (basescradr + #0ed0), a ld a, 63 ld (basescradr + #08f0), a ld (basescradr + #0c71), a ld a, 254 ld (basescradr + #0c77), a ld a, 236 ld (basescradr + #0d77), a ld (basescradr + #0e77), a ld (basescradr + #0ed6), a ld a, 127 ld (basescradr + #0891), a ld a, 248 ld (basescradr + #0897), a ld a, 232 ld (basescradr + #0997), a ld (basescradr + #0a97), a ld (basescradr + #0af6), a ld a, 240 ld (basescradr + #0c97), a ld a, 31 ld (basescradr + #0cd0), a ld a, 252 ld (basescradr + #1435), a ret
17.231798
29
0.533241
0500c0326d58b61e392db29d6c5b50857f00183f
776
asm
Assembly
programs/oeis/184/A184114.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
22
2018-02-06T19:19:31.000Z
2022-01-17T21:53:31.000Z
programs/oeis/184/A184114.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
41
2021-02-22T19:00:34.000Z
2021-08-28T10:47:47.000Z
programs/oeis/184/A184114.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
5
2021-02-24T21:14:16.000Z
2021-08-09T19:48:05.000Z
; A184114: n + floor(5*sqrt(n-1)); complement of A184115. ; 1,7,10,12,15,17,19,21,23,25,26,28,30,32,33,35,37,38,40,41,43,44,46,47,49,51,52,53,55,56,58,59,61,62,64,65,67,68,69,71,72,74,75,76,78,79,80,82,83,85,86,87,89,90,91,93,94,95,97,98,99,101,102,103,105,106,107,108,110,111,112,114,115,116,118,119,120,121,123,124,125,127,128,129,130,132,133,134,135,137,138,139,140,142,143,144,145,147,148,149 mov $2,$0 add $2,1 mov $8,$0 lpb $2 mov $0,$8 sub $2,1 sub $0,$2 mov $4,$0 mov $5,0 mov $6,2 lpb $6 mov $0,$4 sub $6,1 add $0,$6 sub $0,1 mul $0,5 max $0,0 seq $0,202305 ; Floor(sqrt(5*n)). mov $3,$0 mov $7,$6 mul $7,$0 add $5,$7 lpe min $4,1 mul $4,$3 mov $3,$5 sub $3,$4 add $3,1 add $1,$3 lpe mov $0,$1
22.171429
338
0.568299
af8fad68bc4cd2211b649f03fe5048e7ae8e039d
791
nasm
Assembly
Assignment_6/unlink_poly.nasm
SLAE-705/SLAE-646
0093536c5d9250643b4330a1125cf9e1eecc169f
[ "MIT" ]
null
null
null
Assignment_6/unlink_poly.nasm
SLAE-705/SLAE-646
0093536c5d9250643b4330a1125cf9e1eecc169f
[ "MIT" ]
null
null
null
Assignment_6/unlink_poly.nasm
SLAE-705/SLAE-646
0093536c5d9250643b4330a1125cf9e1eecc169f
[ "MIT" ]
null
null
null
global _start _start: jmp short call_shellcode shellcode: pop ebx xor eax,eax mov ecx,ebx restore_rol: cmp BYTE [ecx],al je end_of_string rol byte [ecx],2 inc ecx jmp restore_rol end_of_string: mov al,0x5 add al,0x5 int 0x80 mov al,0x1 int 0x80 call_shellcode: call shellcode filepath db 0xcb, 0x1a, 0xdb, 0x5b, 0x59,0xcb,0x58, 0xcb, 0x1d,0x59, 0xdc,0x1d,0x8b,0x1d,0x1e,0x1d,0x00 ;filepath is encoded version von "/home/a/test.txt". Every byte is rotated to the right by 2.
27.275862
105
0.465234
b5c1112074e0839871f3d3fde9266e6cc6707958
665
asm
Assembly
linux64/lesson30.asm
mashingan/notes-asmtutor
88532e0b364a63cd1e7578a537807795d429fc2f
[ "MIT" ]
1
2021-11-05T06:41:49.000Z
2021-11-05T06:41:49.000Z
linux64/lesson30.asm
mashingan/notes-asmtutor
88532e0b364a63cd1e7578a537807795d429fc2f
[ "MIT" ]
null
null
null
linux64/lesson30.asm
mashingan/notes-asmtutor
88532e0b364a63cd1e7578a537807795d429fc2f
[ "MIT" ]
null
null
null
format ELF64 executable 3 entry start include 'procs.inc' segment readable executable start: xorc rax xorc rdx xorc rdi xorc rsi .socket: mov rdx, 6 ; IPPROTO_TCP mov rsi, 1 ; SOCK_STREAM mov rdi, 2 ; PF_INET mov rax, 41 ; SYS_SOCKET syscall .bind: mov rdi, rax ; SOCKET FD mov rdx, 0 ; IP_ADDRESS 0.0.0.0 push word 0x2923 ; struct sockaddr.sa_data push word 2 ; struct sockaddr.sa_family mov rsi, rsp ; move the pointer from struct sockaddr on stack mov rax, 49 ; SYS_BIND kernel opcode 49 syscall call quitProgram
22.166667
72
0.593985
a8e3d58e2b4293abf4d5d0090c1dc6fef00413ae
118
asm
Assembly
test/times.asm
tizenorg/platform.upstream.nasm
67c86d7d2b36d10b89610ec7e17f9222cbc7e3ed
[ "BSD-2-Clause" ]
5
2015-05-07T10:18:01.000Z
2020-02-16T12:57:12.000Z
test/times.asm
tizenorg/platform.upstream.nasm
67c86d7d2b36d10b89610ec7e17f9222cbc7e3ed
[ "BSD-2-Clause" ]
2
2015-05-07T10:16:14.000Z
2016-09-03T19:25:21.000Z
test/times.asm
tizenorg/platform.upstream.nasm
67c86d7d2b36d10b89610ec7e17f9222cbc7e3ed
[ "BSD-2-Clause" ]
6
2015-05-30T11:34:51.000Z
2021-05-22T11:49:29.000Z
bits 64 ; Broken per BR 3392278 times 4 paddd xmm8, xmm11 ; Broken per BR 3392279 bswap r12d times 4 bswap r12d
13.111111
26
0.728814
dc4d98f94ba131904af5f04f80a9191ff05a8dc9
1,398
asm
Assembly
libsrc/target/tiki100/graphics/w_pixel.asm
ahjelm/z88dk
c4de367f39a76b41f6390ceeab77737e148178fa
[ "ClArtistic" ]
640
2017-01-14T23:33:45.000Z
2022-03-30T11:28:42.000Z
libsrc/target/tiki100/graphics/w_pixel.asm
C-Chads/z88dk
a4141a8e51205c6414b4ae3263b633c4265778e6
[ "ClArtistic" ]
1,600
2017-01-15T16:12:02.000Z
2022-03-31T12:11:12.000Z
libsrc/target/tiki100/graphics/w_pixel.asm
C-Chads/z88dk
a4141a8e51205c6414b4ae3263b633c4265778e6
[ "ClArtistic" ]
215
2017-01-17T10:43:03.000Z
2022-03-23T17:25:02.000Z
EXTERN w_pixeladdress EXTERN getmaxy EXTERN getmaxx EXTERN l_graphics_cmp EXTERN swapgfxbk EXTERN swapgfxbk1 EXTERN generic_console_get_mode EXTERN __gfx_coords EXTERN __MODE2_attr EXTERN __MODE3_attr ; Generic code to handle the pixel commands ; Define NEEDxxx before including push hl ;save x call getmaxy ;hl = maxy inc hl call l_graphics_cmp pop hl ret nc ex de,hl ;de = x, hl = y push hl ;save y call getmaxx inc hl call l_graphics_cmp pop hl ret nc ex de,hl ld (__gfx_coords),hl ld (__gfx_coords+2),de push bc call generic_console_get_mode ld b,@00000001 ld c,@11111110 cp 1 jr z,calc_address add hl,hl ld bc,(__MODE2_attr-1) ld c,@11111100 cp 2 jr z,calc_address add hl,hl ld bc,(__MODE3_attr-1) ld c,@11110000 calc_address: call w_pixeladdress ;leaves bc ld d,b ;ink ld b,a jr z,rotated ; pixel is at bit 0... .plot_position rlc c ; pixel mask sla d ; ink colour djnz plot_position rotated: ; c = byte holding pixel mask ; d = ink to use ; hl = address call swapgfxbk IF NEEDplot ld a,(hl) and c or d ld (hl),a ENDIF IF NEEDunplot ld a,(hl) and c ld (hl),a ENDIF IF NEEDxor ld a,c cpl and (hl) jr z,do_xor_plot ; We need to reset ld d,0 do_xor_plot: ld a,(hl) and c or d ld (hl),a ENDIF IF NEEDpoint ld a,c cpl and (hl) ENDIF call swapgfxbk1 pop bc ;Restore callers ret
14.121212
43
0.695279
bd7b0fa91035901a59b12ac4f1527a15372c747b
425
asm
Assembly
libsrc/_DEVELOPMENT/arch/ts2068/display/z80/asm_tshr_saddrpup.asm
jpoikela/z88dk
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
[ "ClArtistic" ]
640
2017-01-14T23:33:45.000Z
2022-03-30T11:28:42.000Z
libsrc/_DEVELOPMENT/arch/ts2068/display/z80/asm_tshr_saddrpup.asm
jpoikela/z88dk
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
[ "ClArtistic" ]
1,600
2017-01-15T16:12:02.000Z
2022-03-31T12:11:12.000Z
libsrc/_DEVELOPMENT/arch/ts2068/display/z80/asm_tshr_saddrpup.asm
jpoikela/z88dk
7108b2d7e3a98a77de99b30c9a7c9199da9c75cb
[ "ClArtistic" ]
215
2017-01-17T10:43:03.000Z
2022-03-23T17:25:02.000Z
; =============================================================== ; May 2107 ; =============================================================== ; ; void *tshr_saddrpup(void *saddr) ; ; Modify screen address to move up one pixel. ; ; =============================================================== SECTION code_clib SECTION code_arch PUBLIC asm_tshr_saddrpup EXTERN asm_zx_saddrpup defc asm_tshr_saddrpup = asm_zx_saddrpup
22.368421
65
0.423529
51bd3e4acfa89fff4b1ee412b767e2d3c3c5014e
675
asm
Assembly
programs/oeis/024/A024398.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
22
2018-02-06T19:19:31.000Z
2022-01-17T21:53:31.000Z
programs/oeis/024/A024398.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
41
2021-02-22T19:00:34.000Z
2021-08-28T10:47:47.000Z
programs/oeis/024/A024398.asm
neoneye/loda
afe9559fb53ee12e3040da54bd6aa47283e0d9ec
[ "Apache-2.0" ]
5
2021-02-24T21:14:16.000Z
2021-08-09T19:48:05.000Z
; A024398: a(n) = [ (2nd elementary symmetric function of S(n))/(first elementary symmetric function of S(n)) ], where S(n) = {first n+1 positive integers congruent to 2 mod 3}. ; 0,1,4,8,14,22,31,41,53,67,82,98,116,136,157,179,203,229,256,284,314,346,379,413,449,487,526,566,608,652,697,743,791,841,892,944,998,1054,1111,1169,1229,1291,1354,1418,1484,1552,1621,1691,1763,1837,1912,1988,2066,2146,2227,2309,2393,2479,2566,2654,2744,2836,2929,3023,3119,3217,3316,3416,3518,3622,3727,3833,3941,4051,4162,4274,4388,4504,4621,4739,4859,4981,5104,5228,5354,5482,5611,5741,5873,6007,6142,6278,6416,6556,6697,6839,6983,7129,7276,7424 mul $0,6 add $0,3 pow $0,2 sub $0,16 div $0,48
75
448
0.739259
a577e4eedaed6c3fe27fbac564b50115aae83970
263
asm
Assembly
programs/oeis/167/A167176.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
1
2021-03-15T11:38:20.000Z
2021-03-15T11:38:20.000Z
programs/oeis/167/A167176.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
null
null
null
programs/oeis/167/A167176.asm
karttu/loda
9c3b0fc57b810302220c044a9d17db733c76a598
[ "Apache-2.0" ]
null
null
null
; A167176: n^3 mod 9. ; 0,1,8,0,1,8,0,1,8,0,1,8,0,1,8,0,1,8,0,1,8,0,1,8,0,1,8,0,1,8,0,1,8,0,1,8,0,1,8,0,1,8,0,1,8,0,1,8,0,1,8,0,1,8,0,1,8,0,1,8,0,1,8,0,1,8,0,1,8,0,1,8,0,1,8,0,1,8,0,1,8,0,1,8,0,1,8,0,1,8,0,1,8,0,1,8,0,1,8,0,1,8,0,1,8 mov $1,$0 mod $1,3 pow $1,3
37.571429
211
0.505703
2e18b3bbcc173c2318aa5f9dff7b137c437fc8ce
6,695
asm
Assembly
Driver/Video/VGAlike/MEGA/megaTables.asm
steakknife/pcgeos
95edd7fad36df400aba9bab1d56e154fc126044a
[ "Apache-2.0" ]
504
2018-11-18T03:35:53.000Z
2022-03-29T01:02:51.000Z
Driver/Video/VGAlike/MEGA/megaTables.asm
steakknife/pcgeos
95edd7fad36df400aba9bab1d56e154fc126044a
[ "Apache-2.0" ]
96
2018-11-19T21:06:50.000Z
2022-03-06T10:26:48.000Z
Driver/Video/VGAlike/MEGA/megaTables.asm
steakknife/pcgeos
95edd7fad36df400aba9bab1d56e154fc126044a
[ "Apache-2.0" ]
73
2018-11-19T20:46:53.000Z
2022-03-29T00:59:26.000Z
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% Copyright (c) GeoWorks 1988 -- All Rights Reserved PROJECT: PC GEOS MODULE: MEGA video driver FILE: megaTables.asm AUTHOR: Jim DeFrisco, Jeremy Dashe REVISION HISTORY: Name Date Description ---- ---- ----------- jad 4/88 initial version jeremy 5/91 monochrome version DESCRIPTION: This file contains a few tables used by the MEGA screen driver. It is included in the file Kernel/Screen/mega.asm $Id: megaTables.asm,v 1.1 97/04/18 11:42:19 newdeal Exp $ %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@ ;*************************************************************************** ; TABLES ;*************************************************************************** ; this table maps grDrawMode to the appropriate EGA function ; EQUATE OPERATION SAME AS... ; ------ --------- ---------- ; 0 - CLEAR dst <- 0 $00 COPY ; 1 - COPY dst <- src src COPY ; 2 - NOP dst <- dst $ff AND dst ; 3 - AND dst <- (src) AND (dst) src AND dst ; 4 - INVERT dst <- NOT (dst) $ff XOR dst ; 5 - XOR dst <- (src) XOR (dst) src XOR dst ; 6 - SET dst <- 1 $ff COPY ; 7 - OR dst <- (src) OR (dst) src OR dst ; mapping drawMode to ega function number egaFunc db DR_COPY ; drawing mode 0: COPY db DR_COPY ; drawing mode 1: COPY db DR_AND ; drawing mode 2: AND db DR_AND ; drawing mode 3: AND db DR_XOR ; drawing mode 4: XOR db DR_XOR ; drawing mode 5: XOR db DR_COPY ; drawing mode 6: COPY db DR_OR ; drawing mode 7: OR ; since some of the drawing modes don't require a source, but do ; require some constant (see table above), we provide these constants ; here. The drawing mode equates are set up so that the odd numbered ; modes require a constant source value. constSrcTab db 0, 0, 0ffh, 0, 0ffh, 0, 0ffh, 0 ; left mask table leftMaskTable label byte db 11111111b db 01111111b db 00111111b db 00011111b db 00001111b db 00000111b db 00000011b db 00000001b ; right mask table rightMaskTable label byte db 10000000b db 11000000b db 11100000b db 11110000b db 11111000b db 11111100b db 11111110b db 11111111b VideoMisc segment resource ; this table holds the offsets to the test routines for the devices vidTestRoutines label nptr nptr offset VidTestMEGA ; VD_MEGA nptr offset VidTestMEGA ; ; this table holds the offsets to the test routines for the devices vidSetRoutines label nptr nptr offset VidSetMEGA ; VD_MEGA nptr offset VidSetMEGAInverse ; VD_MEGA_INVERSE VideoMisc ends VidSegment Bitmap ; this is a table of routines to put a single bitmap scan ; line. The B_type field passed in PutBitsArgs is used to ; index into the table (the lower 5 bits). The low three ; bits are the bitmap format, the next bit (BMT_COMPLEX) is ; used by the kernel bitmap code to signal that it is a ; monochrome bitmap that should be filled with the current ; area color. The fifth bit is set if there is a mask storeed ; with the bitmap. putbitsTable label nptr ; FORMAT mask? fill? nptr offset PutBWScan ; BMF_MONO no no nptr offset NullBMScan ; BMF_CLR4 no no nptr offset NullBMScan ; BMF_CLR8 no no nptr offset NullBMScan ; BMF_CLR24 no no nptr offset NullBMScan ; BMF_CMYK no no nptr offset NullBMScan ; UNUSED no no nptr offset NullBMScan ; UNUSED no no nptr offset NullBMScan ; UNUSED no no nptr offset FillBWScan ; BMF_MONO no yes nptr offset NullBMScan ; BMF_CLR4 no yes nptr offset NullBMScan ; BMF_CLR8 no yes nptr offset NullBMScan ; BMF_CLR24 no yes nptr offset NullBMScan ; BMF_CMYK no yes nptr offset NullBMScan ; UNUSED no yes nptr offset NullBMScan ; UNUSED no yes nptr offset NullBMScan ; UNUSED no yes nptr offset PutBWScanMask ; BMF_MONO yes no nptr offset NullBMScan ; BMF_CLR4 yes no nptr offset NullBMScan ; BMF_CLR8 yes no nptr offset NullBMScan ; BMF_CLR24 yes no nptr offset NullBMScan ; BMF_CMYK yes no nptr offset NullBMScan ; UNUSED yes no nptr offset NullBMScan ; UNUSED yes no nptr offset NullBMScan ; UNUSED yes no nptr offset FillBWScan ; BMF_MONO yes yes nptr offset FillBWScan ; BMF_CLR4 yes yes nptr offset FillBWScan ; BMF_CLR8 yes yes nptr offset FillBWScan ; BMF_CLR24 yes yes nptr offset FillBWScan ; BMF_CMYK yes yes VidEnds Bitmap VidSegment PutLine ; this is a table of routines to put a single bitmap scan ; line. The B_type field passed in PutBitsArgs is used to ; index into the table (the lower 5 bits). The low three ; bits are the bitmap format, the next bit (BMT_COMPLEX) is ; used by the kernel bitmap code to signal that it is a ; monochrome bitmap that should be filled with the current ; area color. The fifth bit is set if there is a mask storeed ; with the bitmap. putlineTable label nptr ; FORMAT mask? fill? nptr offset PutBWScan ; BMF_MONO no no nptr offset NullBMScan ; BMF_CLR4 no no nptr offset NullBMScan ; BMF_CLR8 no no nptr offset NullBMScan ; BMF_CLR24 no no nptr offset NullBMScan ; BMF_CMYK no no nptr offset NullBMScan ; UNUSED no no nptr offset NullBMScan ; UNUSED no no nptr offset NullBMScan ; UNUSED no no nptr offset FillBWScan ; BMF_MONO no yes nptr offset NullBMScan ; BMF_CLR4 no yes nptr offset NullBMScan ; BMF_CLR8 no yes nptr offset NullBMScan ; BMF_CLR24 no yes nptr offset NullBMScan ; BMF_CMYK no yes nptr offset NullBMScan ; UNUSED no yes nptr offset NullBMScan ; UNUSED no yes nptr offset NullBMScan ; UNUSED no yes nptr offset PutBWScanMask ; BMF_MONO yes no nptr offset NullBMScan ; BMF_CLR4 yes no nptr offset NullBMScan ; BMF_CLR8 yes no nptr offset NullBMScan ; BMF_CLR24 yes no nptr offset NullBMScan ; BMF_CMYK yes no nptr offset NullBMScan ; UNUSED yes no nptr offset NullBMScan ; UNUSED yes no nptr offset NullBMScan ; UNUSED yes no nptr offset FillBWScan ; BMF_MONO yes yes nptr offset FillBWScan ; BMF_CLR4 yes yes nptr offset FillBWScan ; BMF_CLR8 yes yes nptr offset FillBWScan ; BMF_CLR24 yes yes nptr offset FillBWScan ; BMF_CMYK yes yes VidEnds PutLine
35.236842
79
0.6354
a158993235fc263b7737aea9a62fe5f6edb1506b
11,722
asm
Assembly
forth-x64.asm
mras0/forth
24b76c06969958d37582237e9372e809a207bd2b
[ "MIT" ]
10
2019-09-25T18:16:17.000Z
2021-12-06T11:48:48.000Z
forth-x64.asm
mras0/forth
24b76c06969958d37582237e9372e809a207bd2b
[ "MIT" ]
null
null
null
forth-x64.asm
mras0/forth
24b76c06969958d37582237e9372e809a207bd2b
[ "MIT" ]
1
2021-05-14T17:18:53.000Z
2021-05-14T17:18:53.000Z
bits 64 global Latest global Base global State global InputFile global OutputFile global WordBuffer global StdoutFile %define NUM_CELLS 4096 %define RSIZE 128 %define S0 (Cells + NUM_CELLS*8) %define R0 (Cells + RSIZE*8) %define S_IMMEDIATE 0x00 %define S_COMPILE 0x01 %define F_HIDDEN 0x80 %define F_IMMED 0x40 %define F_LENMASK 0x1F ; Chosen to match Linux values %define O_RDONLY 0 %define O_WRONLY 1 %define O_RDWR 2 %define O_CREAT 0x40 %macro NEXT 0 lodsq jmp [rax] %endmacro %xdefine LAST_LINK 0 %xdefine WORD_FLAGS 0 %macro WORD_HEADER 1-2 %if %0 == 1 %defstr Name %1 %else %define Name %2 %endif %strlen NameLen Name align 8 %%Link: dq LAST_LINK db NameLen | WORD_FLAGS db Name align 8 %1: %xdefine LAST_LINK %%Link %xdefine WORD_FLAGS 0 %endmacro %macro NATIVE 1-2 WORD_HEADER %{1:-1} dq %%Code %%Code: %endmacro section .text %ifdef WIN32 %include "sys-win32-x64.asm" %else %include "sys-linux-x64.asm" %endif ; After initialization we jump here and start intepreting StartInterpreter: mov rax, [rel StdoutFile] mov [rel OutputFile], rax mov rax, [rel StdinFile] mov [rel InputFile], rax mov rax, [rel ArgV] mov rax, [rax+8] and rax, rax jz .HasFile mov rcx, O_RDONLY call NativeOpen ; TODO: Check return value mov [rel InputFile], rax .HasFile: mov rsp, S0 mov rbp, R0 mov rsi, .Start NEXT .Start: dq QUIT ReadKey: push rcx push rdi sub rsp, 8 mov rdi, rsp mov rcx, 1 mov rax, [rel InputFile] call NativeReadFile and eax, eax jz .Ret xor rax, rax mov al, [rsp] .Ret: add rsp, 8 pop rdi pop rcx ret ReadWord: xor rcx, rcx mov rdi, WordBuffer .SkipSpaces: call ReadKey and al, al jz .Done cmp al, ' ' jbe .SkipSpaces cmp al, '\' jne .Read .SkipToNL: call ReadKey and al, al jz .Done cmp al, 10 jne .SkipToNL jmp .SkipSpaces .Read: mov [rdi+rcx], al inc rcx call ReadKey cmp al, ' ' ja .Read .Done: mov byte [rdi+rcx], 0 ret FindWord: push rsi mov rdx, [rel Latest] .Loop: test rdx, rdx jz .Return mov al, [rdx+8] and al, F_LENMASK|F_HIDDEN cmp cl, al jne .Next push rcx push rdi lea rsi, [rdx+9] repe cmpsb pop rdi pop rcx je .Return .Next: mov rdx, [rdx] jmp .Loop .Return: pop rsi mov rax, rdx ret ConvertNumber: xor rax, rax and rcx, rcx jz .Err mov rdx, [rel Base] xor rbx, rbx mov bl, [rdi] push rbx cmp bl, '-' jne .Cvt inc rdi dec ecx jnz .Cvt pop rbx .Err: mov rcx, -1 ret .Cvt: mov bl, [rdi] cmp bl, '0' jb .Out cmp bl, '9' ja .Letter sub bl, '0' jmp .NextDig .Letter: cmp bl, 'A' jb .Out cmp bl, 'Z' ja .Out sub bl, 'A'-10 .NextDig: cmp bl, dl jae .Out imul rax, rdx add rax, rbx inc rdi dec rcx jnz .Cvt .Out: pop rbx cmp bl, '-' jne .Ret neg rax .Ret: ret Emit: push rax mov rdi, rsp mov rcx, 1 mov rax, [rel OutputFile] call NativeWriteFile add rsp, 8 ret EmitZStr: lodsb and al, al jnz .P1 ret .P1: call Emit jmp EmitZStr WordCFA: xor rcx, rcx mov cl, [rax+8] and cl, F_LENMASK lea rax, [rax+rcx+9+7] and rax, -8 ret DoComma: mov rdi, [rel Here] stosq mov [rel Here], rdi ret NATIVE EXIT mov rsi, [rbp] add rbp, 8 NEXT NATIVE BRANCH add rsi, [rsi] NEXT NATIVE ZBRANCH, "0BRANCH" pop rax and rax, rax jz BRANCH+8 lodsq NEXT NATIVE EXECUTE pop rax jmp [rax] NATIVE LIT lodsq push rax NEXT NATIVE LITSTRING lodsq push rsi push rax lea rsi, [rsi+rax+7] and rsi, -8 NEXT NATIVE CHAR call ReadWord xor rax, rax mov al, [rdi] push rax NEXT NATIVE COMMA, "," pop rax call DoComma NEXT NATIVE EMIT pop rax call Emit NEXT NATIVE KEY call ReadKey push rax NEXT NATIVE OPENFILE, "OPEN-FILE" pop rcx pop rax call NativeOpen push rax NEXT NATIVE CLOSEFILE, "CLOSE-FILE" pop rax call NativeClose NEXT NATIVE READFILE, "READ-FILE" pop rax pop rcx pop rdi call NativeReadFile push rax NEXT NATIVE WRITEFILE, "WRITE-FILE" pop rax pop rcx pop rdi call NativeWriteFile push rax NEXT NATIVE GETWORD, "WORD" call ReadWord push rdi push rcx NEXT NATIVE CREATE pop rcx pop rbx mov rdi, [rel Here] mov rax, [rel Latest] mov [rel Latest], rdi stosq mov al, cl stosb push rsi mov rsi, rbx rep movsb pop rsi lea rdi, [rdi+7] and rdi, -8 mov [rel Here], rdi NEXT NATIVE FIND pop rcx pop rdi call FindWord push rax NEXT NATIVE CFA, ">CFA" pop rax call WordCFA push rax NEXT NATIVE HIDDEN pop rax xor byte [rax+8], F_HIDDEN NEXT %define WORD_FLAGS F_IMMED NATIVE IMMEDIATE mov rax, [rel Latest] xor byte [rax+8], F_IMMED NEXT %define WORD_FLAGS F_IMMED NATIVE LBRACKET, "[" mov qword [rel State], S_IMMEDIATE NEXT NATIVE RBRACKET, "]" mov qword [rel State], S_COMPILE NEXT NATIVE TICK, "'" lodsq push rax NEXT NATIVE FETCH, "@" pop rax push qword [rax] NEXT NATIVE STORE, "!" pop rdi pop rax stosq NEXT NATIVE CFETCH, "C@" pop rdi xor rax, rax mov al, [rdi] push rax NEXT NATIVE CSTORE, "C!" pop rdi pop rax stosb NEXT NATIVE DSPFETCH, "DSP@" push rsp NEXT NATIVE DSPSTORE, "DSP!" pop rsp NEXT NATIVE RSPFETCH, "RSP@" push rbp NEXT NATIVE RSPSTORE, "RSP!" pop rbp NEXT NATIVE TOR, ">R" sub rbp, 8 pop qword [rbp] NEXT NATIVE FROMR, "R>" push qword [rbp] add rbp, 8 NEXT NATIVE SWAP pop rax pop rbx push rax push rbx NEXT NATIVE ROT pop rcx pop rbx pop rax push rbx push rcx push rax NEXT NATIVE ADD, "+" pop rax add [rsp], rax NEXT NATIVE SUB, "-" pop rax sub [rsp], rax NEXT NATIVE MUL, "*" pop rax pop rbx imul rax, rbx push rax NEXT NATIVE DIVMOD, "/MOD" pop rbx pop rax cqo idiv rbx push rdx push rax NEXT NATIVE UDIVMOD, "U/MOD" xor rdx, rdx pop rbx pop rax div rbx push rdx push rax NEXT NATIVE BAND, "AND" pop rax and [rsp], rax NEXT NATIVE BOR, "OR" pop rax or [rsp], rax NEXT NATIVE BXOR, "XOR" pop rax xor [rsp], rax NEXT NATIVE INVERT not qword [rsp] NEXT NATIVE ALIGNED pop rax add rax, 7 and rax, -8 push rax NEXT %macro NATIVECOMPARE 2 NATIVE CMP%1, %2 pop rax pop rbx cmp rbx, rax j%1 %%True push 0 jmp %%Done %%True: push -1 %%Done: NEXT %endmacro NATIVECOMPARE E , "=" NATIVECOMPARE NE , "<>" NATIVECOMPARE L , "<" NATIVECOMPARE G , ">" NATIVECOMPARE LE , "<=" NATIVECOMPARE GE , ">=" NATIVE INTERPRET .InterpreterLoop: call ReadWord and ecx, ecx jnz .NotEmpty xor eax, eax jmp NativeExit .NotEmpty: call FindWord and rax, rax jz .Number test byte [rax+8], F_IMMED pushf call WordCFA popf jnz .ExecuteWord cmp qword [rel State], S_IMMEDIATE je .ExecuteWord call DoComma jmp .InterpreterLoop .ExecuteWord: jmp [rax] .Number: call ConvertNumber and ecx, ecx jnz .Error push rax cmp qword [rel State], S_IMMEDIATE je .InterpreterLoop mov rax, LIT call DoComma pop rax call DoComma jmp .InterpreterLoop .Error: mov rsi, .InvalidWordMsg call EmitZStr mov rsi, WordBuffer call EmitZStr mov eax, 10 call Emit mov eax, 1 jmp NativeExit .InvalidWordMsg: db 'Invalid Word: ', 0 DOCOL: sub rbp, 8 mov [rbp], rsi lea rsi, [rax+8] NEXT %macro DEFWORD 1-2 WORD_HEADER %{1:-1} dq DOCOL %endmacro DEFWORD QUIT dq LIT, R0, RSPSTORE ; Clear return stack dq INTERPRET dq BRANCH, -16 DEFWORD COLON, ":" dq GETWORD, CREATE dq LIT, DOCOL, COMMA dq LIT, Latest, FETCH, HIDDEN dq RBRACKET dq EXIT %xdefine WORD_FLAGS F_IMMED DEFWORD SEMICOLON, ";" dq LIT, EXIT, COMMA dq LIT, Latest, FETCH, HIDDEN dq LBRACKET dq EXIT %macro DEFLIT 3 NATIVE %1, %2 mov rax, %3 push rax NEXT %endmacro DEFLIT VAR_LATEST , "LATEST" , Latest DEFLIT VAR_STATE , "STATE" , State DEFLIT VAR_HERE , "HERE" , Here DEFLIT VAR_BASE , "BASE" , Base DEFLIT CONST_DOCOL , "DOCOL" , DOCOL DEFLIT CONST_R0 , "R0" , R0 DEFLIT CONST_S0 , "S0" , S0 DEFLIT CONST_CELLSIZE , "CELL-SIZE" , 8 DEFLIT CONST_F_LENMASK , "F_LENMASK" , F_LENMASK DEFLIT CONST_F_IMMED , "F_IMMED" , F_IMMED DEFLIT CONST_F_HIDDEN , "F_HIDDEN" , F_HIDDEN DEFLIT CONST_O_RDONLY , "O_RDONLY" , O_RDONLY DEFLIT CONST_O_WRONLY , "O_WRONLY" , O_WRONLY DEFLIT CONST_O_RDWR , "O_RDWR" , O_RDWR DEFLIT CONST_O_CREAT , "O_CREAT" , O_CREAT DEFLIT CONST_STDIN , "STDIN" , [rel StdinFile] DEFLIT CONST_STDOUT , "STDOUT" , [rel StdoutFile] DEFLIT HACK_DSP , "DSP" , 0 ; TODO FIXME DEFLIT HACK_KERNEL32 , "KERNEL32" , 0 ; TODO FIXME DEFLIT HACK_GETPROC , "GETPROC" , 0 ; TODO FIXME section .data Latest: dq LAST_LINK State: dq S_IMMEDIATE Here: dq R0 Base: dq 10 section .bss ArgC: resq 1 ArgV: resq 1 StdinFile: resq 1 StdoutFile: resq 1 InputFile: resq 1 OutputFile: resq 1 Cells: resq NUM_CELLS WordBuffer: resb F_LENMASK+1
17.896183
57
0.501365
eb19f1a349bf47bf2a0bf60b1b4385faa20b4cb0
15,408
asm
Assembly
Examples/Recursive_Fibonacci.asm
Pyxxil/rust-lc3-as
a1ad3072e8da93ba7806cdfc56d319863b1b1038
[ "MIT" ]
3
2020-08-18T00:56:57.000Z
2022-03-05T05:08:01.000Z
Examples/Recursive_Fibonacci.asm
Pyxxil/rust-lc3-as
a1ad3072e8da93ba7806cdfc56d319863b1b1038
[ "MIT" ]
1
2020-08-27T03:20:34.000Z
2020-08-27T03:20:34.000Z
Examples/Recursive_Fibonacci.asm
Pyxxil/rust-lc3-as
a1ad3072e8da93ba7806cdfc56d319863b1b1038
[ "MIT" ]
null
null
null
; ; A program that recursively calaculates and outputs a given amount of fibonacci numbers ; (3 to 23 inclusively). ; ; -------------------------------------------------------------- ; What each Register is used for in the three parts of the program ; -- Getting input ; -- Converting the current fibonacci number to ASCII ; -- Recursively finding the Nth Fibonacci Number ; -------------------------------------------------------------- ; ; Getting input | Converting to ASCII | Recursion ; R0 -- Input and output | R0 -- Output | R0 -- Result stack pointer ; R1 -- The current input | R1 -- Unused | R1 -- Unused ; R2 -- Unused | R2 -- The digit position | R2 -- Stack pointer ; R3 -- Used to compare values | R3 -- Number of digits output | R3 -- The current N ; R4 -- Used to multiply by ten | R4 -- The current place | R4 -- Temporary Value stack pointer ; R5 -- Used as the character count | R5 -- The number to convert | R5 -- The fibonacci number ; R6 -- Used to multiply by ten | R6 -- The current digit | R6 -- Temporary Values ; R7 -- Return address | R7 -- Return address | R7 -- Return address ; .ORIG 0x3000 ; Start by putting the prompt to the screen. OUT_PROMPT: LEA R0, PROMPT ; Load the prompt into R0. PUTS ; Put it to the display. ; Initialise Registers for the first part of the program. .SET R5, #10 ; Set R5 to ten, its our character counter. LD R1, NUMBER ; Load the number into R1. JSR CLEAR_FLAG ; Clear any flags added. ; Repeatedly retrieve a character as input until a newline is pressed, or 10 ; characters have been input. GET_INPUT: GETC ; Get a character. OUT ; Put the character to the output. ADD R3, R0, #-10 ; Check if the input was the newline character. BRz CHECK_INPUT ; If yes, check what the input was. ; Compare input character against 9. LD R3, NINE ; Load the value in NINE into R3. .SUB R3, R0, R3 ; Check that R0 is < '9' BRp FLAG_THAT ; If the character's ascii value is greater ; than 9's, flag it. ; Compare input character against 0. LD R3, ZERO ; Load the value of ZER0 into R3. .SUB R3, R0, R3 ; Check that R0 > '0' BRn FLAG_THAT ; If the character's ascii value is less than 0's, ; flag it. ; So, the character is a digit. Update the number. ADD R6, R5, #-10 ; Check the amount of characters input. BRn CHECK_ZERO ; Make sure that if the first character was a 0, ; pass it. BRz SET_TO ; If this is the first character, then set the ; count to this number. BR MULTIPLY_BY_TEN ; Always multiply the current number by ten if ; it doesn't get updated by the above. ; The user entered too many characters, so print a prompt telling them so, and go back ; to the beginning of the program. TOO_MANY_CHARS: LEA R0, TOO_MANY PUTS BR OUT_PROMPT TOO_MANY .STRINGZ "\nEntered too many characters (Max 10).\n" ; Decrement the input counter by one. DECREMENT_INPUT_COUNTER: ADD R5, R5, #-1 ; Subtract 1 from the loop counter stored in R5. BRz TOO_MANY_CHARS ; We've reached the max character count, so start ; again. BR GET_INPUT ; Set the number to the input. SET_TO: ADD R1, R3, #0 ; Set the number to the current input. BR DECREMENT_INPUT_COUNTER ; Multiply the number by 10 MULTIPLY_BY_TEN: JSR CHECK_FLAG ; Jump to check if we have flagged something, ; this will only return here if we have not flagged something. ADD R4, R1, R1 ; Store 2x R1 in R4. .LSHIFT R1, 3 ; R1 = R1 << 3 ADD R1, R4, R1 ; R1 = 8xR1 + 2xR1 ADD R1, R1, R3 ; Add the current number. ADD R4, R1, #-16 ; We don't want numbers greater than 23. ADD R4, R4, #-7 ; Because we can't add numbers less than -16, ; we do this twice. BRp FLAG_THAT ; If the number is greater than 23, no need to ; keep going. BR DECREMENT_INPUT_COUNTER ; Check if we've flagged something, and if so then skip over the input. CHECK_FLAG: LD R4, FLAG ; Load the value in FLAG into R4. ADD R4, R4, #-1 ; Add -1 to it. ; If the value in R4 is 0, then the FLAG was set. BRz DECREMENT_INPUT_COUNTER RET ; Check if the previous number input was a zero, and if so just flag it because ; its not useable. CHECK_ZERO: ADD R6, R1, #-1 ; Set R6 to be equal to R1 - 1. BRn FLAG_THAT ; If R6 is less than 0, then R1 must have been 0, ; so flag it. BR MULTIPLY_BY_TEN ; Otherwise, multiply the current number by 10. ; Something incorrect was entered. FLAG_THAT: LEA R4, FLAG ; Load the address of FLAG into R4. .SET R6, #1 ; Reset R6. STR R6, R4, #0 ; Set the flag. BR DECREMENT_INPUT_COUNTER ; Clear the flag CLEAR_FLAG: LEA R4, FLAG ; Load the address of FLAG into R4. AND R6, R6, #0 ; Reset R6. STR R6, R4, #0 ; Store R6's value (0) into the address of R4, ; with offset 0. RET ; Check the input for anything incorrect CHECK_INPUT: LD R3, FLAG ; Load whats in FLAG to R3. ADD R3, R3, #-1 ; If R3 == 1, then something went wrong BRzp OUT_PROMPT ; so start again. ADD R4, R1, #-1 ; We also don't want numbers less than 1 BRn OUT_PROMPT ; so start again. ; Note, we don't have to check if the number is greater than 23 because ; we already did that in MULTIPLY_BY_TEN. ST R1, NUMBER ; Store the value of R1 into the address. BR INIT_LOOP ; Get ready to find the Nth Fibonacci number. ; Take a number in R5 and convert each digit to ASCII to print to the display. CONVERT_TO_ASCII: ST R7, SAVER7 ; Store the return address. LEA R2, NUMBERS ; Load the numbers to use into R2. AND R6, R6, #0 ; The digit in the current place. AND R3, R3, #0 ; The number of digits displayed. ; Outer loop to initialise for the inner loop OUTER_LOOP: LDR R4, R2, #0 ; Load the current place into R4. BRz END ; If that number is 0, we're done. .NEG R4 ; Negate R4 ; Inner loop which handles all of the subtracting INNER_LOOP: ADD R5, R5, R4 ; Subtract the current number from R5. BRn CHECK_DIGIT ; and if R5 is now negative, then we've got the ; digit in R6. ADD R6, R6, #1 ; Otherwise, add 1 the digit in the current place. BR INNER_LOOP ; And loop again. ; We've found what the digit is, so lets check some things. CHECK_DIGIT: ADD R6, R6, #0 ; If R6 is greater than 0, output it. BRp OUTPUT ADD R3, R3, #0 ; Otherwise, if there are no other digits output BRz INCREMENT ; then skip. ; Output the digit at the current place. OUTPUT: LD R0, ZERO ; Load the ascii value for 0 into R0. ADD R0, R0, R6 ; Add the digit to get the ascii value for it. OUT ; Display it. ADD R3, R3, #1 ; We've output a digit, so increment the amount ; of digits we've output. ; The end of a loop, so lets increment a few things. INCREMENT: ADD R2, R2, #1 ; Increment the pointer to the numbers. AND R6, R6, #0 ; Clear R6 so it can be used again. .SUB R5, R5, R4 ; Make R5 the positive value BR OUTER_LOOP ; We've reached the last digit, so display it and return. END: LD R0, ZERO ; We want to find the digits ascii value, so add ADD R0, R0, R5 ; it to the ascii value for 0. OUT LD R0, SPACE ; Print a space character between each fibonacci OUT ; number. LD R7, SAVER7 ; Reload the return address. RET ; These have to go here, otherwise their offset will be too great for the 9 bit ; offset that can be provided to most of the memory access/writer instructions. SAVER7 .FILL 0 ; Strings that will be used throughout the program PROMPT .STRINGZ "\nEnter a number from 1 to 23: " SPACE .FILL 0x20 ; A space character has the ascii value of 0x20, too large ; for an immediate offset to ADD. NUMBER .FILL 0 ; The number that we will use as the number of fibonacci ; numbers we want. FLAG .FILL 0 ; A way to tell the program we've received input we don't want. ; ASCII values that will be used to check input, as well as convert to ASCII. ZERO .FILL #48 NINE .FILL #57 ; Values that we will use to output the current fibonacci number to the screen. NUMBERS .FILL #10000 .FILL #1000 .FILL #100 .FILL #10 .FILL #0 ; So we can tell when we've reached the last digit. ; Getting input | Converting to ASCII | Recursion ; R0 -- Input and output | R0 -- Output | R0 -- Result stack pointer ; R1 -- The current input | R1 -- Unused | R1 -- Unused ; R2 -- Unused | R2 -- The digit position | R2 -- Stack pointer ; R3 -- Used to compare values | R3 -- Number of digits output | R3 -- The current N ; R4 -- Used to multiply by ten | R4 -- The current place | R4 -- Temporary Value stack pointer ; R5 -- Used as the character count | R5 -- The number to convert | R5 -- The fibonacci number ; R6 -- Used to multiply by ten | R6 -- The current digit | R6 -- Temporary Values ; R7 -- Return address | R7 -- Return address | R7 -- Return address ; ---------------------------------------------------; ; Recursive function to find the Nth fibonacci number; ;----------------------------------------------------; RECURSIVE_FIBONACCI: STR R7, R2, #0 ; Store return address. ADD R2, R2, #1 ; Increment stack pointer. ADD R6, R3, #-3 ; If the current number is 0, BRn BASE_CASE ; then we've reached one of the base cases. ADD R3, R3, #-1 ; N - 1. STR R3, R4, #0 ; Save R3 to temp. ADD R4, R4, #1 ; Increment the Temporary stack pointer. JSR RECURSIVE_FIBONACCI ; Recurse with N - 1. ADD R4, R4, #-1 ; Decrement the Temporary stack pointer. LDR R3, R4, #0 ; Retrieve N from the stack. ADD R3, R3, #-1 ; N = N - 2. JSR RECURSIVE_FIBONACCI ; Recurse with N - 2. LDR R3, R0, #-1 ; Load result of Fib(N - 1). LDR R5, R0, #-2 ; Load result of Fib(N - 2). ADD R0, R0, #-2 ; Reset stack pointer. ADD R5, R5, R3 ; Add the recursive results together BR RETURN ; and return. BASE_CASE: AND R5, R5, #0 ; We hit a base case, ADD R5, R5, #1 ; so we want to return 1. ; We've found this fibonacci number, so return to the last return address stored ; in the stack. RETURN: ADD R2, R2, #-1 ; Decrement the stack pointer. LDR R7, R2, #0 ; Load return address from stack. STR R5, R0, #0 ; Save the result to the Result stack. ADD R0, R0, #1 ; Increment result stack. RET ; Result is in Result stack, so return. ; Initialise some registers. INIT_LOOP: LD R3, COUNT ; The fibonacci sequence number we want to compute. ; Start looping upwards towards the number input by the user. LOOP: LEA R2, STACK ; R2 is now the stack pointer. LEA R0, RESULT_STACK ; R0 is now the pointer to the result stack. LEA R4, TEMP_VAL_STACK ; R4 is now the pointer to the temporary value stack. JSR RECURSIVE_FIBONACCI ; Find the fibonacci number. ADD R0, R0,#-1 ; Decrement the stack pointer, as the result is at ; the top. LDR R5, R0,#0 ; Load R5 from stack. JSR CONVERT_TO_ASCII ; Display the fibonacci number. LD R3, COUNT ; Load the current count into R3. LD R6, NUMBER ; Load the original input into R6. .SUB R6, R3, R6 ; Compare input and count BRz FINISH ; If so, then finish the program. ADD R3, R3, #1 ; Otherwise, add 1 to the count ST R3, COUNT ; store the new count into NUMBER BR LOOP ; and loop again. ; We've finished finding the fibonacci numbers, so end the program. FINISH: HALT ; The loop count (will also be used to find the fibonacci number we want). COUNT .FILL 1 SAVER .FILL SAVER7 LOOPER .FILL INIT_LOOP ; Our stack pointers. STACK .BLKW #100 0 ; Return address and frame stack pointer. RESULT_STACK .BLKW #100 0 ; Result stack pointer, holds all results during ; the recursion. TEMP_VAL_STACK .BLKW #100 0 ; To store all temporary values we use. .END
48.45283
105
0.503894
4ec7e45af513547003bc42c9226097d8e403ae8a
152
asm
Assembly
other.7z/NEWS.7z/NEWS/テープリストア/NEWS_05/NEWS_05.tar/home/kimura/kart/risc.lzh/risc/join/Driver-point-p.asm
prismotizm/gigaleak
d082854866186a05fec4e2fdf1def0199e7f3098
[ "MIT" ]
null
null
null
other.7z/NEWS.7z/NEWS/テープリストア/NEWS_05/NEWS_05.tar/home/kimura/kart/risc.lzh/risc/join/Driver-point-p.asm
prismotizm/gigaleak
d082854866186a05fec4e2fdf1def0199e7f3098
[ "MIT" ]
null
null
null
other.7z/NEWS.7z/NEWS/テープリストア/NEWS_05/NEWS_05.tar/home/kimura/kart/risc.lzh/risc/join/Driver-point-p.asm
prismotizm/gigaleak
d082854866186a05fec4e2fdf1def0199e7f3098
[ "MIT" ]
null
null
null
Name: Driver-point-p.asm Type: file Size: 40022 Last-Modified: '1992-07-20T04:24:16Z' SHA-1: F3C05327F077A37B9C2C311C06A26B81AD1B38A7 Description: null
21.714286
47
0.809211
131f93112297e471f4c322ead7553987b6ddcf52
90
asm
Assembly
global/func.asm
llamaking136/CAC
d60305f4d6ea1658d9207a58efb7e66856b59e02
[ "MIT" ]
7
2021-09-21T17:33:17.000Z
2022-01-09T14:05:03.000Z
global/func.asm
llamaking136/CAC
d60305f4d6ea1658d9207a58efb7e66856b59e02
[ "MIT" ]
1
2021-08-24T13:56:16.000Z
2021-08-24T13:56:16.000Z
global/func.asm
llamaking136/CAC
d60305f4d6ea1658d9207a58efb7e66856b59e02
[ "MIT" ]
1
2021-08-17T12:50:38.000Z
2021-08-17T12:50:38.000Z
define_global: push ebp mov ebp, esp mov eax, [ebp + 8] global eax ret
15
22
0.566667
4beb7b50253d6cc9eda049feac6674f4296fc7de
388
asm
Assembly
libsrc/osca/find_file.asm
andydansby/z88dk-mk2
51c15f1387293809c496f5eaf7b196f8a0e9b66b
[ "ClArtistic" ]
1
2020-09-15T08:35:49.000Z
2020-09-15T08:35:49.000Z
libsrc/osca/find_file.asm
andydansby/z88dk-MK2
51c15f1387293809c496f5eaf7b196f8a0e9b66b
[ "ClArtistic" ]
null
null
null
libsrc/osca/find_file.asm
andydansby/z88dk-MK2
51c15f1387293809c496f5eaf7b196f8a0e9b66b
[ "ClArtistic" ]
null
null
null
; int find_file (char *filename, struct flos_file file); ; CALLER linkage for function pointers ; ; $Id: find_file.asm,v 1.2 2012/03/08 07:16:46 stefano Exp $ ; XLIB find_file LIB find_file_callee XREF ASMDISP_FIND_FILE_CALLEE find_file: pop bc pop de ; ptr to file struct pop hl ; ptr to file name push hl push de push bc jp find_file_callee + ASMDISP_FIND_FILE_CALLEE
18.47619
60
0.742268