hexsha stringlengths 40 40 | size int64 6 1.05M | ext stringclasses 3 values | lang stringclasses 1 value | max_stars_repo_path stringlengths 4 232 | max_stars_repo_name stringlengths 7 106 | max_stars_repo_head_hexsha stringlengths 40 40 | max_stars_repo_licenses listlengths 1 7 | max_stars_count int64 1 33.5k ⌀ | max_stars_repo_stars_event_min_datetime stringlengths 24 24 ⌀ | max_stars_repo_stars_event_max_datetime stringlengths 24 24 ⌀ | max_issues_repo_path stringlengths 4 232 | max_issues_repo_name stringlengths 7 106 | max_issues_repo_head_hexsha stringlengths 40 40 | max_issues_repo_licenses listlengths 1 7 | max_issues_count int64 1 37.5k ⌀ | max_issues_repo_issues_event_min_datetime stringlengths 24 24 ⌀ | max_issues_repo_issues_event_max_datetime stringlengths 24 24 ⌀ | max_forks_repo_path stringlengths 4 232 | max_forks_repo_name stringlengths 7 106 | max_forks_repo_head_hexsha stringlengths 40 40 | max_forks_repo_licenses listlengths 1 7 | max_forks_count int64 1 12.6k ⌀ | max_forks_repo_forks_event_min_datetime stringlengths 24 24 ⌀ | max_forks_repo_forks_event_max_datetime stringlengths 24 24 ⌀ | content stringlengths 6 1.05M | avg_line_length float64 1.16 19.7k | max_line_length int64 2 938k | alphanum_fraction float64 0 1 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
553f395a8a1c2c496888736976736e87fb9b2255 | 560 | asm | Assembly | oeis/017/A017294.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/017/A017294.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/017/A017294.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A017294: a(n) = (10*n+2)^2.
; 4,144,484,1024,1764,2704,3844,5184,6724,8464,10404,12544,14884,17424,20164,23104,26244,29584,33124,36864,40804,44944,49284,53824,58564,63504,68644,73984,79524,85264,91204,97344,103684,110224,116964,123904,131044,138384,145924,153664,161604,169744,178084,186624,195364,204304,213444,222784,232324,242064,252004,262144,272484,283024,293764,304704,315844,327184,338724,350464,362404,374544,386884,399424,412164,425104,438244,451584,465124,478864,492804,506944,521284,535824,550564,565504,580644,595984
mul $0,10
add $0,2
pow $0,2
| 80 | 500 | 0.805357 |
3c0fd57af97a2375d87003f87c39ed9f28c468b4 | 614 | asm | Assembly | oeis/048/A048395.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/048/A048395.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/048/A048395.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A048395: Sum of consecutive nonsquares.
; 0,5,26,75,164,305,510,791,1160,1629,2210,2915,3756,4745,5894,7215,8720,10421,12330,14459,16820,19425,22286,25415,28824,32525,36530,40851,45500,50489,55830,61535,67616,74085,80954,88235,95940,104081,112670,121719,131240,141245,151746,162755,174284,186345,198950,212111,225840,240149,255050,270555,286676,303425,320814,338855,357560,376941,397010,417779,439260,461465,484406,508095,532544,557765,583770,610571,638180,666609,695870,725975,756936,788765,821474,855075,889580,925001,961350,998639,1036880
mov $1,2
add $1,$0
add $1,$0
mul $1,$0
mul $1,$0
add $1,$0
mov $0,$1
| 55.818182 | 501 | 0.79316 |
e638bdd89cf3989bb0999a310705c55cee0886ca | 3,604 | asm | Assembly | Transynther/x86/_processed/NONE/_st_/i7-8650U_0xd2.log_1_1236.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_st_/i7-8650U_0xd2.log_1_1236.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_st_/i7-8650U_0xd2.log_1_1236.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r14
push %r8
push %rax
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_normal_ht+0x1ed3, %rsi
lea addresses_WC_ht+0x2f13, %rdi
nop
nop
inc %r8
mov $19, %rcx
rep movsq
nop
nop
nop
nop
cmp $11060, %rsi
lea addresses_UC_ht+0x1aec7, %rcx
nop
nop
nop
nop
nop
cmp $50855, %rax
movb (%rcx), %r14b
nop
nop
nop
nop
inc %rsi
lea addresses_UC_ht+0x19693, %r14
nop
nop
nop
and %r10, %r10
movw $0x6162, (%r14)
nop
nop
xor %rdi, %rdi
lea addresses_A_ht+0x2353, %rsi
nop
cmp %r10, %r10
movb (%rsi), %cl
nop
nop
nop
dec %rcx
lea addresses_UC_ht+0x168bb, %r10
dec %rdi
mov $0x6162636465666768, %r8
movq %r8, %xmm4
vmovups %ymm4, (%r10)
nop
nop
nop
and %rcx, %rcx
lea addresses_normal_ht+0x19ad3, %rsi
lea addresses_UC_ht+0x13213, %rdi
sub %rbx, %rbx
mov $85, %rcx
rep movsq
nop
nop
nop
nop
nop
add $26309, %rbx
lea addresses_UC_ht+0x11453, %r8
nop
sub $20407, %rax
mov (%r8), %r14w
nop
add %r14, %r14
lea addresses_WT_ht+0xa2d3, %rdi
nop
cmp $4197, %rbx
mov (%rdi), %rcx
nop
nop
nop
nop
nop
inc %r10
lea addresses_UC_ht+0x115e3, %rcx
nop
nop
nop
nop
xor %r8, %r8
mov $0x6162636465666768, %r10
movq %r10, %xmm7
and $0xffffffffffffffc0, %rcx
movaps %xmm7, (%rcx)
xor $10762, %rax
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %rax
pop %r8
pop %r14
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r8
push %rax
push %rcx
push %rdi
push %rdx
push %rsi
// Store
mov $0x1e3, %rax
nop
inc %rdi
movb $0x51, (%rax)
nop
and $1508, %r8
// Store
lea addresses_normal+0x42d3, %rdi
nop
nop
nop
nop
nop
add %r10, %r10
movl $0x51525354, (%rdi)
nop
nop
nop
nop
nop
xor $24597, %rax
// Faulty Load
lea addresses_UC+0x72d3, %rcx
sub $15889, %r8
movb (%rcx), %al
lea oracles, %rdx
and $0xff, %rax
shlq $12, %rax
mov (%rdx,%rax,1), %rax
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rax
pop %r8
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_UC', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_P', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 4, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_normal', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 11, 'same': False}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_UC', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}}
<gen_prepare_buffer>
{'OP': 'REPM', 'src': {'type': 'addresses_normal_ht', 'congruent': 10, 'same': False}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 6, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_UC_ht', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 1, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC_ht', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 6, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_A_ht', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 7, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC_ht', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 1, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_normal_ht', 'congruent': 10, 'same': False}, 'dst': {'type': 'addresses_UC_ht', 'congruent': 5, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_UC_ht', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 7, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WT_ht', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 7, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC_ht', 'size': 16, 'AVXalign': True, 'NT': False, 'congruent': 3, 'same': False}}
{'54': 1}
54
*/
| 19.802198 | 153 | 0.647614 |
b9dd605147412d3e6464a559dfc88a31c8ed3e27 | 174 | asm | Assembly | data/wild/kanto_water.asm | Trap-Master/spacworld97-thingy | a144827abecacdfec6cdc3baa32098e9290adf70 | [
"blessing"
] | null | null | null | data/wild/kanto_water.asm | Trap-Master/spacworld97-thingy | a144827abecacdfec6cdc3baa32098e9290adf70 | [
"blessing"
] | null | null | null | data/wild/kanto_water.asm | Trap-Master/spacworld97-thingy | a144827abecacdfec6cdc3baa32098e9290adf70 | [
"blessing"
] | null | null | null | ; Kanto Pokémon in water
KantoWaterWildMons:
map_id CINNABAR_ISLAND
db 6 percent ; encounter rate
dbw 35, TENTACOOL
dbw 30, TENTACOOL
dbw 35, TENTACRUEL
db -1 ; end
| 14.5 | 30 | 0.747126 |
cfabdfe64457aba26f03ff66ab4a4e1802453952 | 45 | asm | Assembly | MEMZ/NyanMBR/Source/Stage2/Setup/setupTimer.asm | johnmelodyme/viruses | c8c4b628a6ae725a45312b4365fa8a6876509706 | [
"BSD-2-Clause"
] | 4 | 2018-11-15T08:23:06.000Z | 2019-04-29T13:30:44.000Z | MEMZ/NyanMBR/Source/Stage2/Setup/setupTimer.asm | johnmelodyme/Viruses | c8c4b628a6ae725a45312b4365fa8a6876509706 | [
"BSD-2-Clause"
] | null | null | null | MEMZ/NyanMBR/Source/Stage2/Setup/setupTimer.asm | johnmelodyme/Viruses | c8c4b628a6ae725a45312b4365fa8a6876509706 | [
"BSD-2-Clause"
] | 2 | 2019-02-13T19:53:26.000Z | 2021-05-30T19:04:43.000Z | mov al, 00110100b
out 0x43, al
call setTimer | 11.25 | 17 | 0.777778 |
cdb98bf54629f0fd44daded4e3836961daffb9dd | 7,482 | asm | Assembly | Transynther/x86/_processed/US/_ht_zr_/i9-9900K_12_0xca_notsx.log_21829_26.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/US/_ht_zr_/i9-9900K_12_0xca_notsx.log_21829_26.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/US/_ht_zr_/i9-9900K_12_0xca_notsx.log_21829_26.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r12
push %r15
push %r9
push %rax
push %rcx
push %rdi
push %rsi
lea addresses_WT_ht+0x8e6b, %r9
nop
nop
nop
nop
xor $37825, %rsi
movb $0x61, (%r9)
nop
nop
and %r15, %r15
lea addresses_A_ht+0x1dbf9, %rsi
lea addresses_normal_ht+0x5df9, %rdi
nop
and %rax, %rax
mov $28, %rcx
rep movsl
nop
nop
nop
nop
nop
xor %rsi, %rsi
lea addresses_A_ht+0x5379, %r10
nop
nop
nop
nop
add $32329, %rdi
mov $0x6162636465666768, %r9
movq %r9, %xmm3
movups %xmm3, (%r10)
nop
nop
nop
xor %r9, %r9
lea addresses_WT_ht+0x3a49, %rsi
nop
nop
and $48866, %rcx
movl $0x61626364, (%rsi)
nop
nop
and $60552, %rdi
lea addresses_A_ht+0x13519, %r10
add $34330, %rax
and $0xffffffffffffffc0, %r10
vmovaps (%r10), %ymm3
vextracti128 $0, %ymm3, %xmm3
vpextrq $1, %xmm3, %rcx
nop
nop
nop
cmp %r15, %r15
lea addresses_A_ht+0xf9a8, %rax
nop
nop
nop
nop
and $50440, %r15
mov (%rax), %rsi
nop
nop
nop
nop
xor %r15, %r15
lea addresses_UC_ht+0xf3f9, %rcx
nop
and $14569, %rsi
and $0xffffffffffffffc0, %rcx
vmovaps (%rcx), %ymm5
vextracti128 $0, %ymm5, %xmm5
vpextrq $1, %xmm5, %rax
inc %r9
lea addresses_D_ht+0x1b3f9, %rsi
nop
nop
nop
nop
nop
xor $22626, %rdi
movl $0x61626364, (%rsi)
nop
cmp %rcx, %rcx
lea addresses_WC_ht+0x1b539, %rsi
lea addresses_normal_ht+0x15429, %rdi
nop
nop
nop
add %r12, %r12
mov $127, %rcx
rep movsb
nop
nop
nop
nop
cmp %r10, %r10
lea addresses_A_ht+0x23f9, %r12
nop
nop
nop
dec %rdi
movb $0x61, (%r12)
nop
nop
add $43445, %r12
lea addresses_UC_ht+0x29f9, %rsi
lea addresses_WC_ht+0x1330d, %rdi
nop
xor %r10, %r10
mov $116, %rcx
rep movsq
nop
nop
nop
nop
nop
and %rax, %rax
pop %rsi
pop %rdi
pop %rcx
pop %rax
pop %r9
pop %r15
pop %r12
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r13
push %r14
push %r8
push %rcx
push %rdi
push %rdx
push %rsi
// Store
lea addresses_WC+0x14049, %rdx
nop
nop
nop
and %r14, %r14
mov $0x5152535455565758, %r8
movq %r8, %xmm3
movups %xmm3, (%rdx)
xor $16826, %rdx
// REPMOV
lea addresses_US+0x7bf9, %rsi
lea addresses_D+0x1c779, %rdi
clflush (%rdi)
nop
nop
nop
sub $27419, %r13
mov $31, %rcx
rep movsw
nop
sub %r10, %r10
// Faulty Load
lea addresses_US+0x1bf9, %rsi
nop
nop
nop
inc %rcx
vmovups (%rsi), %ymm4
vextracti128 $1, %ymm4, %xmm4
vpextrq $0, %xmm4, %rdi
lea oracles, %rdx
and $0xff, %rdi
shlq $12, %rdi
mov (%rdx,%rdi,1), %rdi
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %r8
pop %r14
pop %r13
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_US', 'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_WC', 'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 4}}
{'OP': 'REPM', 'src': {'same': False, 'congruent': 9, 'type': 'addresses_US'}, 'dst': {'same': False, 'congruent': 7, 'type': 'addresses_D'}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'same': True, 'type': 'addresses_US', 'NT': False, 'AVXalign': False, 'size': 32, 'congruent': 0}}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_WT_ht', 'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 0}}
{'OP': 'REPM', 'src': {'same': False, 'congruent': 9, 'type': 'addresses_A_ht'}, 'dst': {'same': False, 'congruent': 7, 'type': 'addresses_normal_ht'}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_A_ht', 'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 5}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_WT_ht', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 4}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_A_ht', 'NT': False, 'AVXalign': True, 'size': 32, 'congruent': 4}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_A_ht', 'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 0}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_UC_ht', 'NT': False, 'AVXalign': True, 'size': 32, 'congruent': 9}}
{'OP': 'STOR', 'dst': {'same': True, 'type': 'addresses_D_ht', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 10}}
{'OP': 'REPM', 'src': {'same': True, 'congruent': 6, 'type': 'addresses_WC_ht'}, 'dst': {'same': False, 'congruent': 4, 'type': 'addresses_normal_ht'}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_A_ht', 'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 9}}
{'OP': 'REPM', 'src': {'same': False, 'congruent': 9, 'type': 'addresses_UC_ht'}, 'dst': {'same': False, 'congruent': 1, 'type': 'addresses_WC_ht'}}
{'00': 20939, '45': 2, '48': 857, '47': 31}
48 48 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 48 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 48 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 48 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 48 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 48 00 00 00 00 00 00 00 00 00 00 00 00 00 47 48 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 48 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 48 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 48 48 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 48 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 48 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 48 48 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 48 48 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 48 00 00 00 00 00 00 00 00 00 48 48 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 48 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 48 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 48 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 48 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 48 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 48 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 48 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 45 48 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 48 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 48 00 00 00 00 00 00 00 00 00 48 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 48 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 48 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 48 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 48 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 48 00 00 00 00 00 00 00 00 00 00 00 00 48 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 47 48 48 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 48 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 48 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 48 00 00 00 00 00 00 00 00 00 00 00 00 00 00 48 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
| 34.164384 | 2,999 | 0.657044 |
ae3edaa3111dc2033bf388a5bdbc2c2f8d99730f | 49 | asm | Assembly | src/kernel/drivers/soc/timer2_dseg.asm | rostislav-nikitin/socOS | 75e3bbaa16086df5dd1a476ee86052b3073ce075 | [
"MIT"
] | 1 | 2020-07-29T12:30:42.000Z | 2020-07-29T12:30:42.000Z | src/kernel/drivers/soc/timer2_dseg.asm | rostislav-nikitin/socOS | 75e3bbaa16086df5dd1a476ee86052b3073ce075 | [
"MIT"
] | null | null | null | src/kernel/drivers/soc/timer2_dseg.asm | rostislav-nikitin/socOS | 75e3bbaa16086df5dd1a476ee86052b3073ce075 | [
"MIT"
] | null | null | null | .dseg
timer2_static_instance: .BYTE SZ_ST_TIMER2 | 24.5 | 43 | 0.857143 |
b9c07844de96f2474bdb5a527493bcf8b0dc94d3 | 5,026 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0x48_notsx.log_72_896.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0x48_notsx.log_72_896.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0x48_notsx.log_72_896.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r14
push %r8
push %r9
push %rax
push %rbp
push %rcx
push %rdi
push %rsi
lea addresses_WT_ht+0x530f, %r14
nop
xor %r8, %r8
mov $0x6162636465666768, %r9
movq %r9, %xmm3
and $0xffffffffffffffc0, %r14
movaps %xmm3, (%r14)
nop
nop
nop
nop
sub $8480, %rax
lea addresses_A_ht+0x1ae0f, %rsi
lea addresses_UC_ht+0x9fc0, %rdi
clflush (%rdi)
nop
nop
nop
nop
nop
cmp %rbp, %rbp
mov $80, %rcx
rep movsl
nop
nop
nop
nop
nop
xor %r8, %r8
lea addresses_D_ht+0xc48f, %rsi
lea addresses_WC_ht+0x9f5f, %rdi
clflush (%rdi)
nop
xor $56261, %r8
mov $62, %rcx
rep movsw
cmp $15959, %r8
lea addresses_UC_ht+0x1da0f, %rsi
nop
xor $15935, %r9
movups (%rsi), %xmm3
vpextrq $0, %xmm3, %rbp
nop
nop
add %r8, %r8
lea addresses_A_ht+0x1789f, %rsi
lea addresses_WT_ht+0x1e80f, %rdi
nop
nop
nop
nop
dec %r8
mov $85, %rcx
rep movsw
xor $36542, %rcx
lea addresses_UC_ht+0x3ed7, %rsi
lea addresses_normal_ht+0x15c0f, %rdi
nop
nop
nop
nop
cmp $16277, %rbp
mov $67, %rcx
rep movsb
nop
cmp %rcx, %rcx
lea addresses_WT_ht+0x340f, %rax
clflush (%rax)
nop
nop
nop
nop
nop
cmp %r9, %r9
mov $0x6162636465666768, %rdi
movq %rdi, %xmm6
vmovups %ymm6, (%rax)
and $10862, %rbp
lea addresses_UC_ht+0x17e0f, %r9
nop
and %rax, %rax
mov $0x6162636465666768, %rbp
movq %rbp, %xmm6
and $0xffffffffffffffc0, %r9
movaps %xmm6, (%r9)
nop
dec %r14
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %rax
pop %r9
pop %r8
pop %r14
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r11
push %r13
push %r9
push %rbx
push %rdx
push %rsi
// Store
lea addresses_PSE+0x1fd2f, %r11
nop
nop
sub $9343, %r10
mov $0x5152535455565758, %r9
movq %r9, %xmm4
vmovups %ymm4, (%r11)
nop
nop
dec %r10
// Store
mov $0x3c1f600000000b0f, %r10
nop
nop
nop
nop
and $55767, %rdx
mov $0x5152535455565758, %r11
movq %r11, (%r10)
nop
nop
nop
cmp $4050, %r9
// Store
lea addresses_D+0x215f, %rdx
nop
add %r9, %r9
mov $0x5152535455565758, %rsi
movq %rsi, %xmm1
vmovntdq %ymm1, (%rdx)
nop
nop
nop
nop
sub $63971, %r13
// Store
lea addresses_D+0x1010f, %rsi
clflush (%rsi)
nop
nop
nop
nop
sub %rbx, %rbx
movb $0x51, (%rsi)
nop
nop
cmp $52133, %rdx
// Store
lea addresses_RW+0x1fe5f, %r9
nop
inc %rbx
mov $0x5152535455565758, %r10
movq %r10, %xmm6
vmovups %ymm6, (%r9)
and %r9, %r9
// Store
lea addresses_D+0x8f8f, %r9
nop
nop
nop
cmp $51993, %r10
mov $0x5152535455565758, %rbx
movq %rbx, %xmm3
movups %xmm3, (%r9)
// Exception!!!
nop
nop
mov (0), %r10
cmp %rbx, %rbx
// Faulty Load
lea addresses_D+0x16e0f, %rbx
nop
nop
and %rsi, %rsi
movb (%rbx), %r13b
lea oracles, %r9
and $0xff, %r13
shlq $12, %r13
mov (%r9,%r13,1), %r13
pop %rsi
pop %rdx
pop %rbx
pop %r9
pop %r13
pop %r11
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 1, 'type': 'addresses_D', 'congruent': 0}}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 32, 'type': 'addresses_PSE', 'congruent': 4}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 8, 'type': 'addresses_NC', 'congruent': 4}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': True, 'AVXalign': False, 'size': 32, 'type': 'addresses_D', 'congruent': 2}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 1, 'type': 'addresses_D', 'congruent': 8}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 32, 'type': 'addresses_RW', 'congruent': 4}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 16, 'type': 'addresses_D', 'congruent': 7}, 'OP': 'STOR'}
[Faulty Load]
{'OP': 'LOAD', 'src': {'same': True, 'NT': False, 'AVXalign': False, 'size': 1, 'type': 'addresses_D', 'congruent': 0}}
<gen_prepare_buffer>
{'dst': {'same': False, 'NT': False, 'AVXalign': True, 'size': 16, 'type': 'addresses_WT_ht', 'congruent': 6}, 'OP': 'STOR'}
{'dst': {'same': False, 'congruent': 0, 'type': 'addresses_UC_ht'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 10, 'type': 'addresses_A_ht'}}
{'dst': {'same': False, 'congruent': 4, 'type': 'addresses_WC_ht'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 7, 'type': 'addresses_D_ht'}}
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 16, 'type': 'addresses_UC_ht', 'congruent': 9}}
{'dst': {'same': False, 'congruent': 9, 'type': 'addresses_WT_ht'}, 'OP': 'REPM', 'src': {'same': True, 'congruent': 4, 'type': 'addresses_A_ht'}}
{'dst': {'same': True, 'congruent': 9, 'type': 'addresses_normal_ht'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 2, 'type': 'addresses_UC_ht'}}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 32, 'type': 'addresses_WT_ht', 'congruent': 9}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': False, 'AVXalign': True, 'size': 16, 'type': 'addresses_UC_ht', 'congruent': 11}, 'OP': 'STOR'}
{'36': 72}
36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36
*/
| 21.117647 | 215 | 0.650418 |
1b2f7192c0d95dd9f1354374098e231be830a5ae | 1,707 | asm | Assembly | programs/oeis/291/A291385.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/291/A291385.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/291/A291385.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A291385: a(n) = (1/4)*A073388(n+1).
; 1,4,14,47,152,480,1488,4548,13744,41152,122272,360944,1059584,3095552,9005568,26101824,75404544,217191424,623928832,1788071680,5113137152,14592352256,41569120256,118219097088,335685021696,951817715712,2695241605120,7622609858560,21533157621760,60763426783232,171291861843968,482411746967552,1357406943117312,3816239170584576,10720495259222016,30093078504079360,84412772879171584,236622172760571904,662862081972764672,1855773830841368576,5192466849764212736,14520482052232445952,40584289234307776512,113374326815751929856,316563583446091300864,883498091700973207552,2464660595340646285312,6872636406530847014912,19156306558731237195776,53373949105395885670400,148656062787974181421056,413883253055923440058368,1151916193145601726087168,3204920473857029910298624,8913991619828835395043328,24785103921926834011242496,68893387124268689858232320,191441933643015956631388160,531830936717333812855439360,1477036234187478396510928896,4101035919108711173559681024,11383728448124110364869656576,31591300172127279035969437696,87648768398889513169356587008,243121102334130325064230371328,674219094167006626509687357440,1869321028788401284540018982912,5181720222885004484968806612992,14360643728867443627540806107136,39791130308494537727804323135488,110233475335744509893306763706368,305321870620498472613025379516416,845515865098567814119503708553216,2341031136474337026420343432019968,6480615679590382285203943637123072,17937048315090992737407643362000896,49637880708175003481789811157630976,137342472850079607539846321805459456,379951042161228959119308365777338368
add $0,1
seq $0,73388 ; Convolution of A002605(n) (generalized (2,2)-Fibonacci), n >= 0, with itself.
div $0,4
| 243.857143 | 1,556 | 0.919742 |
d3ef04c7ec266348f4cf0b9283ced934d67e20cc | 13,894 | asm | Assembly | cpm2/RomWBW/Source/HBIOS/asci.asm | grancier/z180 | e83f35e36c9b4d1457e40585019430e901c86ed9 | [
"ClArtistic"
] | null | null | null | cpm2/RomWBW/Source/HBIOS/asci.asm | grancier/z180 | e83f35e36c9b4d1457e40585019430e901c86ed9 | [
"ClArtistic"
] | null | null | null | cpm2/RomWBW/Source/HBIOS/asci.asm | grancier/z180 | e83f35e36c9b4d1457e40585019430e901c86ed9 | [
"ClArtistic"
] | 1 | 2019-12-03T23:57:48.000Z | 2019-12-03T23:57:48.000Z | ;
;==================================================================================================
; ASCI DRIVER (Z180 SERIAL PORTS)
;==================================================================================================
;
; SETUP PARAMETER WORD:
; +-------+---+-------------------+ +---+---+-----------+---+-------+
; | |RTS| ENCODED BAUD RATE | |DTR|XON| PARITY |STP| 8/7/6 |
; +-------+---+---+---------------+ ----+---+-----------+---+-------+
; F E D C B A 9 8 7 6 5 4 3 2 1 0
; -- MSB (D REGISTER) -- -- LSB (E REGISTER) --
;
; STAT:
; 7 6 5 4 3 2 1 0
; R O P F R C T T
; 0 0 0 0 0 0 0 0 DEFAULT VALUES
; | | | | | | | |
; | | | | | | | +-- TIE: TRANSMIT INTERRUPT ENABLE
; | | | | | | +---- TDRE: TRANSMIT DATA REGISTER EMPTY
; | | | | | +------ DCD0/CTS1E: CH0 CARRIER DETECT, CH1 CTS ENABLE
; | | | | +-------- RIE: RECEIVE INTERRUPT ENABLE
; | | | +---------- FE: FRAMING ERROR
; | | +------------ PE: PARITY ERROR
; | +-------------- OVRN: OVERRUN ERROR
; +---------------- RDRF: RECEIVE DATA REGISTER FULL
;
; CNTLA:
; 7 6 5 4 3 2 1 0
; M R T R E M M M
; 0 1 1 0 0 1 0 0 DEFAULT VALUES
; | | | | | | | |
; | | | | | | | +-- MOD0: STOP BITS: 0=1 BIT, 1=2 BITS
; | | | | | | +---- MOD1: PARITY: 0=NONE, 1=ENABLED
; | | | | | +------ MOD2: DATA BITS: 0=7 BITS, 1=8 BITS
; | | | | +-------- MPBR/EFR: MULTIPROCESSOR BIT RECEIVE / ERROR FLAG RESET
; | | | +---------- RTS0/CKA1D: CH0 RTS, CH1 CLOCK DISABLE
; | | +------------ TE: TRANSMITTER ENABLE
; | +-------------- RE: RECEIVER ENABLE
; +---------------- MPE: MULTI-PROCESSOR MODE ENABLE
;
; CNTLB:
; 7 6 5 4 3 2 1 0
; T M P R D S S S
; 0 0 X 0 X X X X DEFAULT VALUES
; | | | | | | | |
; | | | | | + + +-- SS: SOURCE/SPEED SELECT (R/W)
; | | | | +-------- DR: DIVIDE RATIO (R/W)
; | | | +---------- PEO: PARITY EVEN ODD (R/W)
; | | +------------ PS: ~CTS/PS: CLEAR TO SEND(R) / PRESCALE(W)
; | +-------------- MP: MULTIPROCESSOR MODE (R/W)
; +---------------- MPBT: MULTIPROCESSOR BIT TRANSMIT (R/W)
;
; ASEXT:
; 7 6 5 4 3 2 1 0
; R D C X B F D S
; 0 1 1 0 0 1 1 0 DEFAULT VALUES
; | | | | | | | |
; | | | | | | | +-- SEND BREAK
; | | | | | | +---- BREAK DETECT (RO)
; | | | | | +------ BREAK FEATURE ENABLE
; | | | | +-------- BRG MODE
; | | | +---------- X1 BIT CLK ASCI
; | | +------------ CTS0 DISABLE
; | +-------------- DCD0 DISABLE
; +---------------- RDRF INT INHIBIT
;
ASCI_PREINIT:
;
; SETUP THE DISPATCH TABLE ENTRIES
;
; LD B,2 ; ALWAYS 2 ASCI UNITS ON Z180
; LD C,0 ; PHYSICAL UNIT INDEX
;ASCI_PREINIT1:
; PUSH BC ; SAVE LOOP CONTROL
; LD D,C ; PHYSICAL UNIT
; LD E,CIODEV_ASCI ; DEVICE TYPE
; LD BC,ASCI_FNTBL ; BC := FUNCTION TABLE ADDRESS
; CALL CIO_ADDENT ; ADD ENTRY, BC IS NOT DESTROYED
; POP BC ; RESTORE LOOP CONTROL
; INC C ; NEXT PHYSICAL UNIT
; DJNZ ASCI_PREINIT1 ; LOOP UNTIL DONE
;
; ASCI0 CHANNEL
LD D,0 ; DEVICE ID
LD E,CIODEV_ASCI ; DEVICE TYPE
LD BC,ASCI0_FNTBL ; ASCI0 FUNCTION TABLE PTR
CALL CIO_ADDENT
LD DE,-1 ; DE := -1 TO INIT DEFAULT CONFIG
CALL ASCI0_INITDEV ; INIT DEVICE
;
; ASCI1 CHANNEL
LD D,1 ; DEVICE ID
LD E,CIODEV_ASCI ; DEVICE TYPE
LD BC,ASCI1_FNTBL ; ASCI1 FUNCTION TABLE PTR
CALL CIO_ADDENT
LD DE,-1 ; DE := -1 TO INIT DEFAULT CONFIG
CALL ASCI1_INITDEV ; INIT DEVICE
;
XOR A ; SIGNAL SUCCESS
RET
;
;
;
ASCI_INIT:
;
; ASCI0
CALL NEWLINE ; FORMATTING
PRTS("ASCI0: IO=0x$") ; PREFIX
LD A,Z180_TDR0 ; LOAD TDR PORT ADDRESS
CALL PRTHEXBYTE ; PRINT IT
CALL PC_COMMA ; FORMATTING
LD A,Z180_RDR0 ; LOAD RDR PORT ADDRESS
CALL PRTHEXBYTE ; PRINT IT
PRTS(" MODE=$") ; FORMATTING
LD DE,(ASCI0_CONFIG) ; LOAD CONFIG
CALL PS_PRTSC0 ; PRINT IT
;
; ASCI1
CALL NEWLINE ; FORMATTING
PRTS("ASCI1: IO=0x$") ; PREFIX
LD A,Z180_TDR1 ; LOAD TDR PORT ADDRESS
CALL PRTHEXBYTE ; PRINT IT
CALL PC_COMMA ; FORMATTING
LD A,Z180_RDR1 ; LOAD RDR PORT ADDRESS
CALL PRTHEXBYTE ; PRINT IT
PRTS(" MODE=$") ; FORMATTING
LD DE,(ASCI1_CONFIG) ; LOAD CONFIG
CALL PS_PRTSC0 ; PRINT IT
;
XOR A
RET
;
; DRIVER ASCI0 FUNCTION TABLE
;
ASCI0_FNTBL:
.DW ASCI0_IN
.DW ASCI0_OUT
.DW ASCI0_IST
.DW ASCI0_OST
.DW ASCI0_INITDEV
.DW ASCI0_QUERY
.DW ASCI0_DEVICE
#IF (($ - ASCI0_FNTBL) != (CIO_FNCNT * 2))
.ECHO "*** INVALID ASCI0 FUNCTION TABLE ***\n"
#ENDIF
;
ASCI0_IN:
CALL ASCI0_IST
OR A
JR Z,ASCI0_IN
IN0 A,(Z180_RDR0) ; READ THE CHAR
LD E,A
RET
;
ASCI0_IST:
; CHECK FOR ERROR FLAGS
IN0 A,(Z180_STAT0)
AND 70H ; PARITY, FRAMING, OR OVERRUN ERROR
JR Z,ASCI0_IST1 ; ALL IS WELL, CHECK FOR DATA
;
; CLEAR ERROR(S) OR NOTHING FURTHER CAN BE RECEIVED!!!
IN0 A,(Z180_CNTLA0)
RES 3,A ; CLEAR EFR (ERROR FLAG RESET)
OUT0 (Z180_CNTLA0),A
;
ASCI0_IST1:
; CHECK FOR STAT0.RDRF (DATA READY)
IN0 A,(Z180_STAT0) ; READ LINE STATUS REGISTER
AND $80 ; TEST IF DATA IN RECEIVE BUFFER
JP Z,CIO_IDLE ; DO IDLE PROCESSING AND RETURN
XOR A
INC A ; SIGNAL CHAR READY, A = 1
RET
;
ASCI0_OUT:
CALL ASCI0_OST
OR A
JR Z,ASCI0_OUT
LD A,E
OUT0 (Z180_TDR0),A
RET
;
ASCI0_OST:
IN0 A,(Z180_STAT0)
AND $02
JP Z,CIO_IDLE ; DO IDLE PROCESSING AND RETURN
XOR A
INC A ; SIGNAL BUFFER EMPTY, A = 1
RET
;
ASCI0_INITDEV:
; TEST FOR -1 WHICH MEANS USE CURRENT CONFIG (JUST REINIT)
LD A,D ; TEST DE FOR
AND E ; ... VALUE OF -1
INC A ; ... SO Z SET IF -1
JR NZ,ASCI0_INITDEV1 ; IF NEW CONFIG (NOT -1), IMPLEMENT IT
LD DE,(ASCI0_CONFIG) ; OTHERWISE, LOAD EXISTING CONFIG
;
ASCI0_INITDEV1:
; DETERMINE APPROPRIATE CNTLB VALUE (BASED ON BAUDRATE & CPU SPEED)
LD A,D ; BYTE W/ ENCODED BAUD RATE
AND $1F ; ISOLATE BITS
LD L,A ; MOVE TO L
LD H,0 ; CLEAR MSB
PUSH DE ; SAVE CONFIG
CALL ASCI_CNTLB ; DERIVE CNTLB VALUE IN C
POP DE ; RESTORE CONFIG
;CALL TSTPT
RET NZ ; ABORT ON ERROR
;
LD B,$64 ; B := DEFAULT CNTLB VALUE
; DATA BITS
LD A,E ; LOAD CONFIG BYTE
AND $03 ; ISOLATE DATA BITS
CP $03 ; 8 DATA BITS?
JR Z,ASCI0_INITDEV2 ; IF SO, NO CHG, CONTINUE
RES 2,B ; RESET CNTLA BIT 2 FOR 7 DATA BITS
ASCI0_INITDEV2:
; STOP BITS
BIT 2,E ; TEST STOP BITS CONFIG BIT
JR Z,ASCI0_INITDEV3 ; IF CLEAR, NO CHG, CONTINUE
SET 0,B ; SET CNTLA BIT 0 FOR 2 STOP BITS
ASCI0_INITDEV3:
; PARITY ENABLE
BIT 3,E ; TEST PARITY ENABLE CONFIG BIT
JR Z,ASCI0_INITDEV4 ; NO PARITY, SKIP ALL PARITY CHGS
SET 1,B ; SET CNTLA BIT 1 FOR PARITY ENABLE
; PARITY EVEN/ODD
BIT 4,E ; TEST EVEN PARITY CONFIG BIT
JR NZ,ASCI0_INITDEV4 ; EVEN PARITY, NO CHG, CONTINUE
SET 4,C ; SET CNTLB BIT 4 FOR ODD PARITY
ASCI0_INITDEV4:
; IMPLEMENT CONFIGURATION
LD A,$66 ; LOAD DEFAULT ASEXT VALUE
OUT0 (Z180_ASEXT0),A ; SET IT
LD A,B ; FINAL CNTLA VALUE TO ACCUM
OUT0 (Z180_CNTLA0),A ; WRITE TO CNTLA REGISTER
LD A,C ; FINAL CNTLB VALUE TO ACCUM
OUT0 (Z180_CNTLB0),A ; WRITE TO CNTLA REGISTER
;
LD (ASCI0_CONFIG),DE ; RECORD UPDATED CONFIG
XOR A ; SIGNAL SUCCESS
RET ; DONE
;
ASCI0_QUERY:
LD DE,(ASCI0_CONFIG)
XOR A
RET
;
ASCI0_DEVICE:
LD D,CIODEV_ASCI ; D := DEVICE TYPE
LD E,0 ; E := PHYSICAL UNIT
XOR A ; SIGNAL SUCCESS
RET
;
; DRIVER ASCI1 FUNCTION TABLE
;
ASCI1_FNTBL:
.DW ASCI1_IN
.DW ASCI1_OUT
.DW ASCI1_IST
.DW ASCI1_OST
.DW ASCI1_INITDEV
.DW ASCI1_QUERY
.DW ASCI1_DEVICE
#IF (($ - ASCI1_FNTBL) != (CIO_FNCNT * 2))
.ECHO "*** INVALID ASCI1 FUNCTION TABLE ***\n"
#ENDIF
ASCI1:
LD A,B ; GET REQUESTED FUNCTION
AND $0F ; ISOLATE SUB-FUNCTION
JR Z,ASCI1_IN
DEC A
JR Z,ASCI1_OUT
DEC A
JR Z,ASCI1_IST
DEC A
JR Z,ASCI1_OST
DEC A
JP Z,ASCI1_INITDEV
DEC A
JP Z,ASCI1_QUERY
DEC A
JP Z,ASCI1_DEVICE
CALL PANIC
;
ASCI1_IN:
CALL ASCI1_IST
OR A
JR Z,ASCI1_IN
IN0 A,(Z180_RDR1) ; READ THE CHAR
LD E,A
RET
;
ASCI1_IST:
; CHECK FOR ERROR FLAGS
IN0 A,(Z180_STAT1)
AND 70H ; PARITY, FRAMING, OR OVERRUN ERROR
JR Z,ASCI1_IST1 ; ALL IS WELL, CHECK FOR DATA
;
; CLEAR ERROR(S) OR NOTHING FURTHER CAN BE RECEIVED!!!
IN0 A,(Z180_CNTLA1)
RES 3,A ; CLEAR EFR (ERROR FLAG RESET)
OUT0 (Z180_CNTLA1),A
;
ASCI1_IST1: ; CHECK FOR STAT0.RDRF (DATA READY)
IN0 A,(Z180_STAT1) ; READ LINE STATUS REGISTER
AND $80 ; TEST IF DATA IN RECEIVE BUFFER
JP Z,CIO_IDLE ; DO IDLE PROCESSING AND RETURN
XOR A
INC A ; SIGNAL CHAR READY, A = 1
RET
;
ASCI1_OUT:
CALL ASCI1_OST
OR A
JR Z,ASCI1_OUT
LD A,E
OUT0 (Z180_TDR1),A
RET
;
ASCI1_OST:
IN0 A,(Z180_STAT1)
AND $02
JR Z,ASCI1_OST
JP Z,CIO_IDLE ; DO IDLE PROCESSING AND RETURN
XOR A
INC A ; SIGNAL BUFFER EMPTY, A = 1
RET
;
ASCI1_INITDEV:
; TEST FOR -1 WHICH MEANS USE CURRENT CONFIG (JUST REINIT)
LD A,D ; TEST DE FOR
AND E ; ... VALUE OF -1
INC A ; ... SO Z SET IF -1
JR NZ,ASCI1_INITDEV1 ; IF NEW CONFIG (NOT -1), IMPLEMENT IT
LD DE,(ASCI1_CONFIG) ; OTHERWISE, LOAD EXISTING CONFIG
;
ASCI1_INITDEV1:
; DETERMINE APPROPRIATE CNTLB VALUE (BASED ON BAUDRATE & CPU SPEED)
LD A,D ; BYTE W/ ENCODED BAUD RATE
AND $1F ; ISOLATE BITS
LD L,A ; MOVE TO L
LD H,0 ; CLEAR MSB
PUSH DE ; SAVE CONFIG
CALL ASCI_CNTLB ; DERIVE CNTLB VALUE
POP DE ; RESTORE CONFIG
;CALL TSTPT
RET NZ ; ABORT ON ERROR
;
LD B,$64 ; B := DEFAULT CNTLB VALUE
; DATA BITS
LD A,E ; LOAD CONFIG BYTE
AND $03 ; ISOLATE DATA BITS
CP $03 ; 8 DATA BITS?
JR Z,ASCI1_INITDEV2 ; IF SO, NO CHG, CONTINUE
RES 2,B ; RESET CNTLA BIT 2 FOR 7 DATA BITS
ASCI1_INITDEV2:
; STOP BITS
BIT 2,E ; TEST STOP BITS CONFIG BIT
JR Z,ASCI1_INITDEV3 ; IF CLEAR, NO CHG, CONTINUE
SET 0,B ; SET CNTLA BIT 0 FOR 2 STOP BITS
ASCI1_INITDEV3:
; PARITY ENABLE
BIT 3,E ; TEST PARITY ENABLE CONFIG BIT
JR Z,ASCI1_INITDEV4 ; NO PARITY, SKIP ALL PARITY CHGS
SET 1,B ; SET CNTLA BIT 1 FOR PARITY ENABLE
; PARITY EVEN/ODD
BIT 4,E ; TEST EVEN PARITY CONFIG BIT
JR NZ,ASCI1_INITDEV4 ; EVEN PARITY, NO CHG, CONTINUE
SET 4,C ; SET CNTLB BIT 4 FOR ODD PARITY
ASCI1_INITDEV4:
; IMPLEMENT CONFIGURATION
LD A,$66 ; LOAD DEFAULT ASEXT VALUE
OUT0 (Z180_ASEXT1),A ; SET IT
LD A,B ; FINAL CNTLA VALUE TO ACCUM
OUT0 (Z180_CNTLA1),A ; WRITE TO CNTLA REGISTER
LD A,C ; FINAL CNTLB VALUE TO ACCUM
OUT0 (Z180_CNTLB1),A ; WRITE TO CNTLA REGISTER
;
LD (ASCI1_CONFIG),DE ; RECORD UPDATED CONFIG
XOR A ; SIGNAL SUCCESS
RET ; DONE
;
ASCI1_QUERY:
LD DE,(ASCI1_CONFIG)
XOR A
RET
;
ASCI1_DEVICE:
LD D,CIODEV_ASCI ; D := DEVICE TYPE
LD E,1 ; E := PHYSICAL UNIT
XOR A ; SIGNAL SUCCESS
RET
;
; LOCAL DATA
;
ASCI0_CONFIG .DW DEFSERCFG ; SAVED CONFIG FOR ASCI0
ASCI1_CONFIG .DW DEFSERCFG ; SAVED CONFIG FOR ASCI1
;
; DERIVE A CNTLB VALUE BASED ON AN ENCODED BAUD RATE AND CURRENT CPU SPEED
; ENTRY: HL = ENCODED BAUD RATE
; EXIT: C = CNTLB VALUE, A=0/Z IFF SUCCESS
;
; DESIRED DIVISOR == CPUHZ / BAUD
; DUE TO ENCODING BAUD IS ALWAYS DIVISIBLE BY 75
; Z180 DIVISOR IS ALWAYS A FACTOR OF 160
;
; X = CPU_HZ / 160 / 75 ==> SIMPLIFIED ==> X = CPU_KHZ / 12
; X = X / (BAUD / 75)
; IF X % 3 == 0, THEN (PS=1, X := X / 3) ELSE PS=0
; IF X % 4 == 0, THEN (DR=1, X := X / 4) ELSE DR=0
; SS := LOG2(X)
;
ASCI_CNTLB:
LD DE,1 ; USE DECODE CONSTANT OF 1 TO GET BAUD RATE ALREADY DIVIDED BY 75
CALL DECODE ; DECODE THE BAUDATE INTO DE:HL, DE IS DISCARDED
;CALL TSTPT
RET NZ ; ABORT ON ERROR
PUSH HL ; HL HAS (BAUD / 75), SAVE IT
LD HL,(CB_CPUKHZ) ; GET CPU CLK IN KHZ
;LD HL,CPUKHZ ; CPU CLK IN KHZ
;LD HL,9216 ; *DEBUG*
; DUE TO THE LIMITED DIVISORS POSSIBLE WITH CNTLB, YOU PRETTY MUCH
; NEED TO USE A CPU SPEED THAT IS A MULTIPLE OF 128KHZ. BELOW, WE
; ATTEMPT TO ROUND THE CPU SPEED DETECTED TO A MULTIPLE OF 128KHZ
; WITH ROUNDING. THIS JUST MAXIMIZES POSSIBILITY OF SUCCESS COMPUTING
; THE DIVISOR.
LD DE,$0040 ; HALF OF 128 IS 64
ADD HL,DE ; ADD FOR ROUNDING
LD A,L ; MOVE TO ACCUM
AND $80 ; STRIP LOW ORDER 7 BITS
LD L,A ; ... AND PUT IT BACK
LD DE,12 ; PREPARE TO DIVIDE BY 12
CALL DIV16 ; BC := (CPU_KHZ / 12), REM IN HL, ZF
;CALL TSTPT
POP DE ; RESTORE (BAUD / 75)
RET NZ ; ABORT IF REMAINDER
PUSH BC ; MOVE WORKING VALUE
POP HL ; ... BACK TO HL
CALL DIV16 ; BC := X / (BAUD / 75)
;CALL TSTPT
RET NZ ; ABORT IF REMAINDER
;
; DETERMINE PS BIT BY ATTEMPTING DIVIDE BY 3
PUSH BC ; SAVE WORKING VALUE ON STACK
PUSH BC ; MOVE WORKING VALUE
POP HL ; ... TO HL
LD DE,3 ; SETUP TO DIVIDE BY 3
CALL DIV16 ; BC := X / 3, REM IN HL, ZF
;CALL TSTPT
POP HL ; HL := PRIOR WORKING VALUE
LD E,0 ; INIT E := 0 AS WORKING CNTLB VALUE
JR NZ,ASCI_CNTLB1 ; DID NOT WORK, LEAVE PS==0, SKIP AHEAD
SET 5,E ; SET PS BIT
PUSH BC ; MOVE NEW WORKING
POP HL ; ... VALUE TO HL
;
ASCI_CNTLB1:
;CALL TSTPT
; DETERMINE DR BIT BY ATTEMPTING DIVIDE BY 4
LD A,L ; LOAD LSB OF WORKING VALUE
AND $03 ; ISOLATE LOW ORDER BITS
JR NZ,ASCI_CNTLB2 ; NOT DIVISIBLE BY 4, SKIP AHEAD
SET 3,E ; SET PS BIT
SRL H ; DIVIDE HL BY 4
RR L ; ...
SRL H ; ...
RR L ; ...
;
ASCI_CNTLB2:
;CALL TSTPT
; DETERMINE SS BITS BY RIGHT SHIFTING AND INCREMENTING
LD B,7 ; LOOP COUNTER, MAX VALUE OF SS IS 7
LD C,E ; MOVE WORKING CNTLB VALUE TO C
ASCI_CNTLB3:
BIT 0,L ; CAN WE SHIFT AGAIN?
JR NZ,ASCI_CNTLB4 ; NOPE, DONE
SRL H ; IMPLEMENT THE
RR L ; ... SHIFT OPERATION
INC C ; INCREMENT SS BITS
DJNZ ASCI_CNTLB3 ; LOOP IF MORE SHIFTING POSSIBLE
;
; AT THIS POINT HL MUST BE EQUAL TO 1 OR WE FAILED!
DEC HL ; IF HL == 1, SHOULD BECOME ZERO
LD A,H ; TEST HL
OR L ; ... FOR ZERO
RET NZ ; ABORT IF NOT ZERO
;
ASCI_CNTLB4:
;CALL TSTPT
XOR A
RET
;
| 27.189824 | 100 | 0.596445 |
80aedb6c967202fc132a020cf432b3cde041fa74 | 93,294 | asm | Assembly | stressfs.asm | tzulang/os2 | 331769c4f7d2bd57346dc5583ee077e97b24f391 | [
"Xnet",
"X11"
] | null | null | null | stressfs.asm | tzulang/os2 | 331769c4f7d2bd57346dc5583ee077e97b24f391 | [
"Xnet",
"X11"
] | null | null | null | stressfs.asm | tzulang/os2 | 331769c4f7d2bd57346dc5583ee077e97b24f391 | [
"Xnet",
"X11"
] | null | null | null |
_stressfs: file format elf32-i386
Disassembly of section .text:
00000000 <main>:
#include "fs.h"
#include "fcntl.h"
int
main(int argc, char *argv[])
{
0: 55 push %ebp
1: 89 e5 mov %esp,%ebp
3: 83 e4 f0 and $0xfffffff0,%esp
6: 81 ec 30 02 00 00 sub $0x230,%esp
int fd, i;
char path[] = "stressfs0";
c: c7 84 24 1e 02 00 00 movl $0x65727473,0x21e(%esp)
13: 73 74 72 65
17: c7 84 24 22 02 00 00 movl $0x73667373,0x222(%esp)
1e: 73 73 66 73
22: 66 c7 84 24 26 02 00 movw $0x30,0x226(%esp)
29: 00 30 00
char data[512];
printf(1, "stressfs starting\n");
2c: c7 44 24 04 7d 11 00 movl $0x117d,0x4(%esp)
33: 00
34: c7 04 24 01 00 00 00 movl $0x1,(%esp)
3b: e8 a3 05 00 00 call 5e3 <printf>
memset(data, 'a', sizeof(data));
40: c7 44 24 08 00 02 00 movl $0x200,0x8(%esp)
47: 00
48: c7 44 24 04 61 00 00 movl $0x61,0x4(%esp)
4f: 00
50: 8d 44 24 1e lea 0x1e(%esp),%eax
54: 89 04 24 mov %eax,(%esp)
57: e8 12 02 00 00 call 26e <memset>
for(i = 0; i < 4; i++)
5c: c7 84 24 2c 02 00 00 movl $0x0,0x22c(%esp)
63: 00 00 00 00
67: eb 13 jmp 7c <main+0x7c>
if(fork() > 0)
69: e8 a5 03 00 00 call 413 <fork>
6e: 85 c0 test %eax,%eax
70: 7e 02 jle 74 <main+0x74>
break;
72: eb 12 jmp 86 <main+0x86>
char data[512];
printf(1, "stressfs starting\n");
memset(data, 'a', sizeof(data));
for(i = 0; i < 4; i++)
74: 83 84 24 2c 02 00 00 addl $0x1,0x22c(%esp)
7b: 01
7c: 83 bc 24 2c 02 00 00 cmpl $0x3,0x22c(%esp)
83: 03
84: 7e e3 jle 69 <main+0x69>
if(fork() > 0)
break;
printf(1, "write %d\n", i);
86: 8b 84 24 2c 02 00 00 mov 0x22c(%esp),%eax
8d: 89 44 24 08 mov %eax,0x8(%esp)
91: c7 44 24 04 90 11 00 movl $0x1190,0x4(%esp)
98: 00
99: c7 04 24 01 00 00 00 movl $0x1,(%esp)
a0: e8 3e 05 00 00 call 5e3 <printf>
path[8] += i;
a5: 0f b6 84 24 26 02 00 movzbl 0x226(%esp),%eax
ac: 00
ad: 89 c2 mov %eax,%edx
af: 8b 84 24 2c 02 00 00 mov 0x22c(%esp),%eax
b6: 01 d0 add %edx,%eax
b8: 88 84 24 26 02 00 00 mov %al,0x226(%esp)
fd = open(path, O_CREATE | O_RDWR);
bf: c7 44 24 04 02 02 00 movl $0x202,0x4(%esp)
c6: 00
c7: 8d 84 24 1e 02 00 00 lea 0x21e(%esp),%eax
ce: 89 04 24 mov %eax,(%esp)
d1: e8 85 03 00 00 call 45b <open>
d6: 89 84 24 28 02 00 00 mov %eax,0x228(%esp)
for(i = 0; i < 20; i++)
dd: c7 84 24 2c 02 00 00 movl $0x0,0x22c(%esp)
e4: 00 00 00 00
e8: eb 27 jmp 111 <main+0x111>
// printf(fd, "%d\n", i);
write(fd, data, sizeof(data));
ea: c7 44 24 08 00 02 00 movl $0x200,0x8(%esp)
f1: 00
f2: 8d 44 24 1e lea 0x1e(%esp),%eax
f6: 89 44 24 04 mov %eax,0x4(%esp)
fa: 8b 84 24 28 02 00 00 mov 0x228(%esp),%eax
101: 89 04 24 mov %eax,(%esp)
104: e8 32 03 00 00 call 43b <write>
printf(1, "write %d\n", i);
path[8] += i;
fd = open(path, O_CREATE | O_RDWR);
for(i = 0; i < 20; i++)
109: 83 84 24 2c 02 00 00 addl $0x1,0x22c(%esp)
110: 01
111: 83 bc 24 2c 02 00 00 cmpl $0x13,0x22c(%esp)
118: 13
119: 7e cf jle ea <main+0xea>
// printf(fd, "%d\n", i);
write(fd, data, sizeof(data));
close(fd);
11b: 8b 84 24 28 02 00 00 mov 0x228(%esp),%eax
122: 89 04 24 mov %eax,(%esp)
125: e8 19 03 00 00 call 443 <close>
printf(1, "read\n");
12a: c7 44 24 04 9a 11 00 movl $0x119a,0x4(%esp)
131: 00
132: c7 04 24 01 00 00 00 movl $0x1,(%esp)
139: e8 a5 04 00 00 call 5e3 <printf>
fd = open(path, O_RDONLY);
13e: c7 44 24 04 00 00 00 movl $0x0,0x4(%esp)
145: 00
146: 8d 84 24 1e 02 00 00 lea 0x21e(%esp),%eax
14d: 89 04 24 mov %eax,(%esp)
150: e8 06 03 00 00 call 45b <open>
155: 89 84 24 28 02 00 00 mov %eax,0x228(%esp)
for (i = 0; i < 20; i++)
15c: c7 84 24 2c 02 00 00 movl $0x0,0x22c(%esp)
163: 00 00 00 00
167: eb 27 jmp 190 <main+0x190>
read(fd, data, sizeof(data));
169: c7 44 24 08 00 02 00 movl $0x200,0x8(%esp)
170: 00
171: 8d 44 24 1e lea 0x1e(%esp),%eax
175: 89 44 24 04 mov %eax,0x4(%esp)
179: 8b 84 24 28 02 00 00 mov 0x228(%esp),%eax
180: 89 04 24 mov %eax,(%esp)
183: e8 ab 02 00 00 call 433 <read>
close(fd);
printf(1, "read\n");
fd = open(path, O_RDONLY);
for (i = 0; i < 20; i++)
188: 83 84 24 2c 02 00 00 addl $0x1,0x22c(%esp)
18f: 01
190: 83 bc 24 2c 02 00 00 cmpl $0x13,0x22c(%esp)
197: 13
198: 7e cf jle 169 <main+0x169>
read(fd, data, sizeof(data));
close(fd);
19a: 8b 84 24 28 02 00 00 mov 0x228(%esp),%eax
1a1: 89 04 24 mov %eax,(%esp)
1a4: e8 9a 02 00 00 call 443 <close>
wait();
1a9: e8 75 02 00 00 call 423 <wait>
exit();
1ae: e8 68 02 00 00 call 41b <exit>
000001b3 <stosb>:
"cc");
}
static inline void
stosb(void *addr, int data, int cnt)
{
1b3: 55 push %ebp
1b4: 89 e5 mov %esp,%ebp
1b6: 57 push %edi
1b7: 53 push %ebx
asm volatile("cld; rep stosb" :
1b8: 8b 4d 08 mov 0x8(%ebp),%ecx
1bb: 8b 55 10 mov 0x10(%ebp),%edx
1be: 8b 45 0c mov 0xc(%ebp),%eax
1c1: 89 cb mov %ecx,%ebx
1c3: 89 df mov %ebx,%edi
1c5: 89 d1 mov %edx,%ecx
1c7: fc cld
1c8: f3 aa rep stos %al,%es:(%edi)
1ca: 89 ca mov %ecx,%edx
1cc: 89 fb mov %edi,%ebx
1ce: 89 5d 08 mov %ebx,0x8(%ebp)
1d1: 89 55 10 mov %edx,0x10(%ebp)
"=D" (addr), "=c" (cnt) :
"0" (addr), "1" (cnt), "a" (data) :
"memory", "cc");
}
1d4: 5b pop %ebx
1d5: 5f pop %edi
1d6: 5d pop %ebp
1d7: c3 ret
000001d8 <strcpy>:
#include "user.h"
#include "x86.h"
char*
strcpy(char *s, char *t)
{
1d8: 55 push %ebp
1d9: 89 e5 mov %esp,%ebp
1db: 83 ec 10 sub $0x10,%esp
char *os;
os = s;
1de: 8b 45 08 mov 0x8(%ebp),%eax
1e1: 89 45 fc mov %eax,-0x4(%ebp)
while((*s++ = *t++) != 0)
1e4: 90 nop
1e5: 8b 45 08 mov 0x8(%ebp),%eax
1e8: 8d 50 01 lea 0x1(%eax),%edx
1eb: 89 55 08 mov %edx,0x8(%ebp)
1ee: 8b 55 0c mov 0xc(%ebp),%edx
1f1: 8d 4a 01 lea 0x1(%edx),%ecx
1f4: 89 4d 0c mov %ecx,0xc(%ebp)
1f7: 0f b6 12 movzbl (%edx),%edx
1fa: 88 10 mov %dl,(%eax)
1fc: 0f b6 00 movzbl (%eax),%eax
1ff: 84 c0 test %al,%al
201: 75 e2 jne 1e5 <strcpy+0xd>
;
return os;
203: 8b 45 fc mov -0x4(%ebp),%eax
}
206: c9 leave
207: c3 ret
00000208 <strcmp>:
int
strcmp(const char *p, const char *q)
{
208: 55 push %ebp
209: 89 e5 mov %esp,%ebp
while(*p && *p == *q)
20b: eb 08 jmp 215 <strcmp+0xd>
p++, q++;
20d: 83 45 08 01 addl $0x1,0x8(%ebp)
211: 83 45 0c 01 addl $0x1,0xc(%ebp)
}
int
strcmp(const char *p, const char *q)
{
while(*p && *p == *q)
215: 8b 45 08 mov 0x8(%ebp),%eax
218: 0f b6 00 movzbl (%eax),%eax
21b: 84 c0 test %al,%al
21d: 74 10 je 22f <strcmp+0x27>
21f: 8b 45 08 mov 0x8(%ebp),%eax
222: 0f b6 10 movzbl (%eax),%edx
225: 8b 45 0c mov 0xc(%ebp),%eax
228: 0f b6 00 movzbl (%eax),%eax
22b: 38 c2 cmp %al,%dl
22d: 74 de je 20d <strcmp+0x5>
p++, q++;
return (uchar)*p - (uchar)*q;
22f: 8b 45 08 mov 0x8(%ebp),%eax
232: 0f b6 00 movzbl (%eax),%eax
235: 0f b6 d0 movzbl %al,%edx
238: 8b 45 0c mov 0xc(%ebp),%eax
23b: 0f b6 00 movzbl (%eax),%eax
23e: 0f b6 c0 movzbl %al,%eax
241: 29 c2 sub %eax,%edx
243: 89 d0 mov %edx,%eax
}
245: 5d pop %ebp
246: c3 ret
00000247 <strlen>:
uint
strlen(char *s)
{
247: 55 push %ebp
248: 89 e5 mov %esp,%ebp
24a: 83 ec 10 sub $0x10,%esp
int n;
for(n = 0; s[n]; n++)
24d: c7 45 fc 00 00 00 00 movl $0x0,-0x4(%ebp)
254: eb 04 jmp 25a <strlen+0x13>
256: 83 45 fc 01 addl $0x1,-0x4(%ebp)
25a: 8b 55 fc mov -0x4(%ebp),%edx
25d: 8b 45 08 mov 0x8(%ebp),%eax
260: 01 d0 add %edx,%eax
262: 0f b6 00 movzbl (%eax),%eax
265: 84 c0 test %al,%al
267: 75 ed jne 256 <strlen+0xf>
;
return n;
269: 8b 45 fc mov -0x4(%ebp),%eax
}
26c: c9 leave
26d: c3 ret
0000026e <memset>:
void*
memset(void *dst, int c, uint n)
{
26e: 55 push %ebp
26f: 89 e5 mov %esp,%ebp
271: 83 ec 0c sub $0xc,%esp
stosb(dst, c, n);
274: 8b 45 10 mov 0x10(%ebp),%eax
277: 89 44 24 08 mov %eax,0x8(%esp)
27b: 8b 45 0c mov 0xc(%ebp),%eax
27e: 89 44 24 04 mov %eax,0x4(%esp)
282: 8b 45 08 mov 0x8(%ebp),%eax
285: 89 04 24 mov %eax,(%esp)
288: e8 26 ff ff ff call 1b3 <stosb>
return dst;
28d: 8b 45 08 mov 0x8(%ebp),%eax
}
290: c9 leave
291: c3 ret
00000292 <strchr>:
char*
strchr(const char *s, char c)
{
292: 55 push %ebp
293: 89 e5 mov %esp,%ebp
295: 83 ec 04 sub $0x4,%esp
298: 8b 45 0c mov 0xc(%ebp),%eax
29b: 88 45 fc mov %al,-0x4(%ebp)
for(; *s; s++)
29e: eb 14 jmp 2b4 <strchr+0x22>
if(*s == c)
2a0: 8b 45 08 mov 0x8(%ebp),%eax
2a3: 0f b6 00 movzbl (%eax),%eax
2a6: 3a 45 fc cmp -0x4(%ebp),%al
2a9: 75 05 jne 2b0 <strchr+0x1e>
return (char*)s;
2ab: 8b 45 08 mov 0x8(%ebp),%eax
2ae: eb 13 jmp 2c3 <strchr+0x31>
}
char*
strchr(const char *s, char c)
{
for(; *s; s++)
2b0: 83 45 08 01 addl $0x1,0x8(%ebp)
2b4: 8b 45 08 mov 0x8(%ebp),%eax
2b7: 0f b6 00 movzbl (%eax),%eax
2ba: 84 c0 test %al,%al
2bc: 75 e2 jne 2a0 <strchr+0xe>
if(*s == c)
return (char*)s;
return 0;
2be: b8 00 00 00 00 mov $0x0,%eax
}
2c3: c9 leave
2c4: c3 ret
000002c5 <gets>:
char*
gets(char *buf, int max)
{
2c5: 55 push %ebp
2c6: 89 e5 mov %esp,%ebp
2c8: 83 ec 28 sub $0x28,%esp
int i, cc;
char c;
for(i=0; i+1 < max; ){
2cb: c7 45 f4 00 00 00 00 movl $0x0,-0xc(%ebp)
2d2: eb 4c jmp 320 <gets+0x5b>
cc = read(0, &c, 1);
2d4: c7 44 24 08 01 00 00 movl $0x1,0x8(%esp)
2db: 00
2dc: 8d 45 ef lea -0x11(%ebp),%eax
2df: 89 44 24 04 mov %eax,0x4(%esp)
2e3: c7 04 24 00 00 00 00 movl $0x0,(%esp)
2ea: e8 44 01 00 00 call 433 <read>
2ef: 89 45 f0 mov %eax,-0x10(%ebp)
if(cc < 1)
2f2: 83 7d f0 00 cmpl $0x0,-0x10(%ebp)
2f6: 7f 02 jg 2fa <gets+0x35>
break;
2f8: eb 31 jmp 32b <gets+0x66>
buf[i++] = c;
2fa: 8b 45 f4 mov -0xc(%ebp),%eax
2fd: 8d 50 01 lea 0x1(%eax),%edx
300: 89 55 f4 mov %edx,-0xc(%ebp)
303: 89 c2 mov %eax,%edx
305: 8b 45 08 mov 0x8(%ebp),%eax
308: 01 c2 add %eax,%edx
30a: 0f b6 45 ef movzbl -0x11(%ebp),%eax
30e: 88 02 mov %al,(%edx)
if(c == '\n' || c == '\r')
310: 0f b6 45 ef movzbl -0x11(%ebp),%eax
314: 3c 0a cmp $0xa,%al
316: 74 13 je 32b <gets+0x66>
318: 0f b6 45 ef movzbl -0x11(%ebp),%eax
31c: 3c 0d cmp $0xd,%al
31e: 74 0b je 32b <gets+0x66>
gets(char *buf, int max)
{
int i, cc;
char c;
for(i=0; i+1 < max; ){
320: 8b 45 f4 mov -0xc(%ebp),%eax
323: 83 c0 01 add $0x1,%eax
326: 3b 45 0c cmp 0xc(%ebp),%eax
329: 7c a9 jl 2d4 <gets+0xf>
break;
buf[i++] = c;
if(c == '\n' || c == '\r')
break;
}
buf[i] = '\0';
32b: 8b 55 f4 mov -0xc(%ebp),%edx
32e: 8b 45 08 mov 0x8(%ebp),%eax
331: 01 d0 add %edx,%eax
333: c6 00 00 movb $0x0,(%eax)
return buf;
336: 8b 45 08 mov 0x8(%ebp),%eax
}
339: c9 leave
33a: c3 ret
0000033b <stat>:
int
stat(char *n, struct stat *st)
{
33b: 55 push %ebp
33c: 89 e5 mov %esp,%ebp
33e: 83 ec 28 sub $0x28,%esp
int fd;
int r;
fd = open(n, O_RDONLY);
341: c7 44 24 04 00 00 00 movl $0x0,0x4(%esp)
348: 00
349: 8b 45 08 mov 0x8(%ebp),%eax
34c: 89 04 24 mov %eax,(%esp)
34f: e8 07 01 00 00 call 45b <open>
354: 89 45 f4 mov %eax,-0xc(%ebp)
if(fd < 0)
357: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
35b: 79 07 jns 364 <stat+0x29>
return -1;
35d: b8 ff ff ff ff mov $0xffffffff,%eax
362: eb 23 jmp 387 <stat+0x4c>
r = fstat(fd, st);
364: 8b 45 0c mov 0xc(%ebp),%eax
367: 89 44 24 04 mov %eax,0x4(%esp)
36b: 8b 45 f4 mov -0xc(%ebp),%eax
36e: 89 04 24 mov %eax,(%esp)
371: e8 fd 00 00 00 call 473 <fstat>
376: 89 45 f0 mov %eax,-0x10(%ebp)
close(fd);
379: 8b 45 f4 mov -0xc(%ebp),%eax
37c: 89 04 24 mov %eax,(%esp)
37f: e8 bf 00 00 00 call 443 <close>
return r;
384: 8b 45 f0 mov -0x10(%ebp),%eax
}
387: c9 leave
388: c3 ret
00000389 <atoi>:
int
atoi(const char *s)
{
389: 55 push %ebp
38a: 89 e5 mov %esp,%ebp
38c: 83 ec 10 sub $0x10,%esp
int n;
n = 0;
38f: c7 45 fc 00 00 00 00 movl $0x0,-0x4(%ebp)
while('0' <= *s && *s <= '9')
396: eb 25 jmp 3bd <atoi+0x34>
n = n*10 + *s++ - '0';
398: 8b 55 fc mov -0x4(%ebp),%edx
39b: 89 d0 mov %edx,%eax
39d: c1 e0 02 shl $0x2,%eax
3a0: 01 d0 add %edx,%eax
3a2: 01 c0 add %eax,%eax
3a4: 89 c1 mov %eax,%ecx
3a6: 8b 45 08 mov 0x8(%ebp),%eax
3a9: 8d 50 01 lea 0x1(%eax),%edx
3ac: 89 55 08 mov %edx,0x8(%ebp)
3af: 0f b6 00 movzbl (%eax),%eax
3b2: 0f be c0 movsbl %al,%eax
3b5: 01 c8 add %ecx,%eax
3b7: 83 e8 30 sub $0x30,%eax
3ba: 89 45 fc mov %eax,-0x4(%ebp)
atoi(const char *s)
{
int n;
n = 0;
while('0' <= *s && *s <= '9')
3bd: 8b 45 08 mov 0x8(%ebp),%eax
3c0: 0f b6 00 movzbl (%eax),%eax
3c3: 3c 2f cmp $0x2f,%al
3c5: 7e 0a jle 3d1 <atoi+0x48>
3c7: 8b 45 08 mov 0x8(%ebp),%eax
3ca: 0f b6 00 movzbl (%eax),%eax
3cd: 3c 39 cmp $0x39,%al
3cf: 7e c7 jle 398 <atoi+0xf>
n = n*10 + *s++ - '0';
return n;
3d1: 8b 45 fc mov -0x4(%ebp),%eax
}
3d4: c9 leave
3d5: c3 ret
000003d6 <memmove>:
void*
memmove(void *vdst, void *vsrc, int n)
{
3d6: 55 push %ebp
3d7: 89 e5 mov %esp,%ebp
3d9: 83 ec 10 sub $0x10,%esp
char *dst, *src;
dst = vdst;
3dc: 8b 45 08 mov 0x8(%ebp),%eax
3df: 89 45 fc mov %eax,-0x4(%ebp)
src = vsrc;
3e2: 8b 45 0c mov 0xc(%ebp),%eax
3e5: 89 45 f8 mov %eax,-0x8(%ebp)
while(n-- > 0)
3e8: eb 17 jmp 401 <memmove+0x2b>
*dst++ = *src++;
3ea: 8b 45 fc mov -0x4(%ebp),%eax
3ed: 8d 50 01 lea 0x1(%eax),%edx
3f0: 89 55 fc mov %edx,-0x4(%ebp)
3f3: 8b 55 f8 mov -0x8(%ebp),%edx
3f6: 8d 4a 01 lea 0x1(%edx),%ecx
3f9: 89 4d f8 mov %ecx,-0x8(%ebp)
3fc: 0f b6 12 movzbl (%edx),%edx
3ff: 88 10 mov %dl,(%eax)
{
char *dst, *src;
dst = vdst;
src = vsrc;
while(n-- > 0)
401: 8b 45 10 mov 0x10(%ebp),%eax
404: 8d 50 ff lea -0x1(%eax),%edx
407: 89 55 10 mov %edx,0x10(%ebp)
40a: 85 c0 test %eax,%eax
40c: 7f dc jg 3ea <memmove+0x14>
*dst++ = *src++;
return vdst;
40e: 8b 45 08 mov 0x8(%ebp),%eax
}
411: c9 leave
412: c3 ret
00000413 <fork>:
name: \
movl $SYS_ ## name, %eax; \
int $T_SYSCALL; \
ret
SYSCALL(fork)
413: b8 01 00 00 00 mov $0x1,%eax
418: cd 40 int $0x40
41a: c3 ret
0000041b <exit>:
SYSCALL(exit)
41b: b8 02 00 00 00 mov $0x2,%eax
420: cd 40 int $0x40
422: c3 ret
00000423 <wait>:
SYSCALL(wait)
423: b8 03 00 00 00 mov $0x3,%eax
428: cd 40 int $0x40
42a: c3 ret
0000042b <pipe>:
SYSCALL(pipe)
42b: b8 04 00 00 00 mov $0x4,%eax
430: cd 40 int $0x40
432: c3 ret
00000433 <read>:
SYSCALL(read)
433: b8 05 00 00 00 mov $0x5,%eax
438: cd 40 int $0x40
43a: c3 ret
0000043b <write>:
SYSCALL(write)
43b: b8 10 00 00 00 mov $0x10,%eax
440: cd 40 int $0x40
442: c3 ret
00000443 <close>:
SYSCALL(close)
443: b8 15 00 00 00 mov $0x15,%eax
448: cd 40 int $0x40
44a: c3 ret
0000044b <kill>:
SYSCALL(kill)
44b: b8 06 00 00 00 mov $0x6,%eax
450: cd 40 int $0x40
452: c3 ret
00000453 <exec>:
SYSCALL(exec)
453: b8 07 00 00 00 mov $0x7,%eax
458: cd 40 int $0x40
45a: c3 ret
0000045b <open>:
SYSCALL(open)
45b: b8 0f 00 00 00 mov $0xf,%eax
460: cd 40 int $0x40
462: c3 ret
00000463 <mknod>:
SYSCALL(mknod)
463: b8 11 00 00 00 mov $0x11,%eax
468: cd 40 int $0x40
46a: c3 ret
0000046b <unlink>:
SYSCALL(unlink)
46b: b8 12 00 00 00 mov $0x12,%eax
470: cd 40 int $0x40
472: c3 ret
00000473 <fstat>:
SYSCALL(fstat)
473: b8 08 00 00 00 mov $0x8,%eax
478: cd 40 int $0x40
47a: c3 ret
0000047b <link>:
SYSCALL(link)
47b: b8 13 00 00 00 mov $0x13,%eax
480: cd 40 int $0x40
482: c3 ret
00000483 <mkdir>:
SYSCALL(mkdir)
483: b8 14 00 00 00 mov $0x14,%eax
488: cd 40 int $0x40
48a: c3 ret
0000048b <chdir>:
SYSCALL(chdir)
48b: b8 09 00 00 00 mov $0x9,%eax
490: cd 40 int $0x40
492: c3 ret
00000493 <dup>:
SYSCALL(dup)
493: b8 0a 00 00 00 mov $0xa,%eax
498: cd 40 int $0x40
49a: c3 ret
0000049b <getpid>:
SYSCALL(getpid)
49b: b8 0b 00 00 00 mov $0xb,%eax
4a0: cd 40 int $0x40
4a2: c3 ret
000004a3 <sbrk>:
SYSCALL(sbrk)
4a3: b8 0c 00 00 00 mov $0xc,%eax
4a8: cd 40 int $0x40
4aa: c3 ret
000004ab <sleep>:
SYSCALL(sleep)
4ab: b8 0d 00 00 00 mov $0xd,%eax
4b0: cd 40 int $0x40
4b2: c3 ret
000004b3 <uptime>:
SYSCALL(uptime)
4b3: b8 0e 00 00 00 mov $0xe,%eax
4b8: cd 40 int $0x40
4ba: c3 ret
000004bb <kthread_create>:
SYSCALL(kthread_create)
4bb: b8 16 00 00 00 mov $0x16,%eax
4c0: cd 40 int $0x40
4c2: c3 ret
000004c3 <kthread_id>:
SYSCALL(kthread_id)
4c3: b8 17 00 00 00 mov $0x17,%eax
4c8: cd 40 int $0x40
4ca: c3 ret
000004cb <kthread_exit>:
SYSCALL(kthread_exit)
4cb: b8 18 00 00 00 mov $0x18,%eax
4d0: cd 40 int $0x40
4d2: c3 ret
000004d3 <kthread_join>:
SYSCALL(kthread_join)
4d3: b8 19 00 00 00 mov $0x19,%eax
4d8: cd 40 int $0x40
4da: c3 ret
000004db <kthread_mutex_alloc>:
SYSCALL(kthread_mutex_alloc)
4db: b8 1a 00 00 00 mov $0x1a,%eax
4e0: cd 40 int $0x40
4e2: c3 ret
000004e3 <kthread_mutex_dealloc>:
SYSCALL(kthread_mutex_dealloc)
4e3: b8 1b 00 00 00 mov $0x1b,%eax
4e8: cd 40 int $0x40
4ea: c3 ret
000004eb <kthread_mutex_lock>:
SYSCALL(kthread_mutex_lock)
4eb: b8 1c 00 00 00 mov $0x1c,%eax
4f0: cd 40 int $0x40
4f2: c3 ret
000004f3 <kthread_mutex_unlock>:
SYSCALL(kthread_mutex_unlock)
4f3: b8 1d 00 00 00 mov $0x1d,%eax
4f8: cd 40 int $0x40
4fa: c3 ret
000004fb <kthread_mutex_yieldlock>:
4fb: b8 1e 00 00 00 mov $0x1e,%eax
500: cd 40 int $0x40
502: c3 ret
00000503 <putc>:
#include "stat.h"
#include "user.h"
static void
putc(int fd, char c)
{
503: 55 push %ebp
504: 89 e5 mov %esp,%ebp
506: 83 ec 18 sub $0x18,%esp
509: 8b 45 0c mov 0xc(%ebp),%eax
50c: 88 45 f4 mov %al,-0xc(%ebp)
write(fd, &c, 1);
50f: c7 44 24 08 01 00 00 movl $0x1,0x8(%esp)
516: 00
517: 8d 45 f4 lea -0xc(%ebp),%eax
51a: 89 44 24 04 mov %eax,0x4(%esp)
51e: 8b 45 08 mov 0x8(%ebp),%eax
521: 89 04 24 mov %eax,(%esp)
524: e8 12 ff ff ff call 43b <write>
}
529: c9 leave
52a: c3 ret
0000052b <printint>:
static void
printint(int fd, int xx, int base, int sgn)
{
52b: 55 push %ebp
52c: 89 e5 mov %esp,%ebp
52e: 56 push %esi
52f: 53 push %ebx
530: 83 ec 30 sub $0x30,%esp
static char digits[] = "0123456789ABCDEF";
char buf[16];
int i, neg;
uint x;
neg = 0;
533: c7 45 f0 00 00 00 00 movl $0x0,-0x10(%ebp)
if(sgn && xx < 0){
53a: 83 7d 14 00 cmpl $0x0,0x14(%ebp)
53e: 74 17 je 557 <printint+0x2c>
540: 83 7d 0c 00 cmpl $0x0,0xc(%ebp)
544: 79 11 jns 557 <printint+0x2c>
neg = 1;
546: c7 45 f0 01 00 00 00 movl $0x1,-0x10(%ebp)
x = -xx;
54d: 8b 45 0c mov 0xc(%ebp),%eax
550: f7 d8 neg %eax
552: 89 45 ec mov %eax,-0x14(%ebp)
555: eb 06 jmp 55d <printint+0x32>
} else {
x = xx;
557: 8b 45 0c mov 0xc(%ebp),%eax
55a: 89 45 ec mov %eax,-0x14(%ebp)
}
i = 0;
55d: c7 45 f4 00 00 00 00 movl $0x0,-0xc(%ebp)
do{
buf[i++] = digits[x % base];
564: 8b 4d f4 mov -0xc(%ebp),%ecx
567: 8d 41 01 lea 0x1(%ecx),%eax
56a: 89 45 f4 mov %eax,-0xc(%ebp)
56d: 8b 5d 10 mov 0x10(%ebp),%ebx
570: 8b 45 ec mov -0x14(%ebp),%eax
573: ba 00 00 00 00 mov $0x0,%edx
578: f7 f3 div %ebx
57a: 89 d0 mov %edx,%eax
57c: 0f b6 80 2c 16 00 00 movzbl 0x162c(%eax),%eax
583: 88 44 0d dc mov %al,-0x24(%ebp,%ecx,1)
}while((x /= base) != 0);
587: 8b 75 10 mov 0x10(%ebp),%esi
58a: 8b 45 ec mov -0x14(%ebp),%eax
58d: ba 00 00 00 00 mov $0x0,%edx
592: f7 f6 div %esi
594: 89 45 ec mov %eax,-0x14(%ebp)
597: 83 7d ec 00 cmpl $0x0,-0x14(%ebp)
59b: 75 c7 jne 564 <printint+0x39>
if(neg)
59d: 83 7d f0 00 cmpl $0x0,-0x10(%ebp)
5a1: 74 10 je 5b3 <printint+0x88>
buf[i++] = '-';
5a3: 8b 45 f4 mov -0xc(%ebp),%eax
5a6: 8d 50 01 lea 0x1(%eax),%edx
5a9: 89 55 f4 mov %edx,-0xc(%ebp)
5ac: c6 44 05 dc 2d movb $0x2d,-0x24(%ebp,%eax,1)
while(--i >= 0)
5b1: eb 1f jmp 5d2 <printint+0xa7>
5b3: eb 1d jmp 5d2 <printint+0xa7>
putc(fd, buf[i]);
5b5: 8d 55 dc lea -0x24(%ebp),%edx
5b8: 8b 45 f4 mov -0xc(%ebp),%eax
5bb: 01 d0 add %edx,%eax
5bd: 0f b6 00 movzbl (%eax),%eax
5c0: 0f be c0 movsbl %al,%eax
5c3: 89 44 24 04 mov %eax,0x4(%esp)
5c7: 8b 45 08 mov 0x8(%ebp),%eax
5ca: 89 04 24 mov %eax,(%esp)
5cd: e8 31 ff ff ff call 503 <putc>
buf[i++] = digits[x % base];
}while((x /= base) != 0);
if(neg)
buf[i++] = '-';
while(--i >= 0)
5d2: 83 6d f4 01 subl $0x1,-0xc(%ebp)
5d6: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
5da: 79 d9 jns 5b5 <printint+0x8a>
putc(fd, buf[i]);
}
5dc: 83 c4 30 add $0x30,%esp
5df: 5b pop %ebx
5e0: 5e pop %esi
5e1: 5d pop %ebp
5e2: c3 ret
000005e3 <printf>:
// Print to the given fd. Only understands %d, %x, %p, %s.
void
printf(int fd, char *fmt, ...)
{
5e3: 55 push %ebp
5e4: 89 e5 mov %esp,%ebp
5e6: 83 ec 38 sub $0x38,%esp
char *s;
int c, i, state;
uint *ap;
state = 0;
5e9: c7 45 ec 00 00 00 00 movl $0x0,-0x14(%ebp)
ap = (uint*)(void*)&fmt + 1;
5f0: 8d 45 0c lea 0xc(%ebp),%eax
5f3: 83 c0 04 add $0x4,%eax
5f6: 89 45 e8 mov %eax,-0x18(%ebp)
for(i = 0; fmt[i]; i++){
5f9: c7 45 f0 00 00 00 00 movl $0x0,-0x10(%ebp)
600: e9 7c 01 00 00 jmp 781 <printf+0x19e>
c = fmt[i] & 0xff;
605: 8b 55 0c mov 0xc(%ebp),%edx
608: 8b 45 f0 mov -0x10(%ebp),%eax
60b: 01 d0 add %edx,%eax
60d: 0f b6 00 movzbl (%eax),%eax
610: 0f be c0 movsbl %al,%eax
613: 25 ff 00 00 00 and $0xff,%eax
618: 89 45 e4 mov %eax,-0x1c(%ebp)
if(state == 0){
61b: 83 7d ec 00 cmpl $0x0,-0x14(%ebp)
61f: 75 2c jne 64d <printf+0x6a>
if(c == '%'){
621: 83 7d e4 25 cmpl $0x25,-0x1c(%ebp)
625: 75 0c jne 633 <printf+0x50>
state = '%';
627: c7 45 ec 25 00 00 00 movl $0x25,-0x14(%ebp)
62e: e9 4a 01 00 00 jmp 77d <printf+0x19a>
} else {
putc(fd, c);
633: 8b 45 e4 mov -0x1c(%ebp),%eax
636: 0f be c0 movsbl %al,%eax
639: 89 44 24 04 mov %eax,0x4(%esp)
63d: 8b 45 08 mov 0x8(%ebp),%eax
640: 89 04 24 mov %eax,(%esp)
643: e8 bb fe ff ff call 503 <putc>
648: e9 30 01 00 00 jmp 77d <printf+0x19a>
}
} else if(state == '%'){
64d: 83 7d ec 25 cmpl $0x25,-0x14(%ebp)
651: 0f 85 26 01 00 00 jne 77d <printf+0x19a>
if(c == 'd'){
657: 83 7d e4 64 cmpl $0x64,-0x1c(%ebp)
65b: 75 2d jne 68a <printf+0xa7>
printint(fd, *ap, 10, 1);
65d: 8b 45 e8 mov -0x18(%ebp),%eax
660: 8b 00 mov (%eax),%eax
662: c7 44 24 0c 01 00 00 movl $0x1,0xc(%esp)
669: 00
66a: c7 44 24 08 0a 00 00 movl $0xa,0x8(%esp)
671: 00
672: 89 44 24 04 mov %eax,0x4(%esp)
676: 8b 45 08 mov 0x8(%ebp),%eax
679: 89 04 24 mov %eax,(%esp)
67c: e8 aa fe ff ff call 52b <printint>
ap++;
681: 83 45 e8 04 addl $0x4,-0x18(%ebp)
685: e9 ec 00 00 00 jmp 776 <printf+0x193>
} else if(c == 'x' || c == 'p'){
68a: 83 7d e4 78 cmpl $0x78,-0x1c(%ebp)
68e: 74 06 je 696 <printf+0xb3>
690: 83 7d e4 70 cmpl $0x70,-0x1c(%ebp)
694: 75 2d jne 6c3 <printf+0xe0>
printint(fd, *ap, 16, 0);
696: 8b 45 e8 mov -0x18(%ebp),%eax
699: 8b 00 mov (%eax),%eax
69b: c7 44 24 0c 00 00 00 movl $0x0,0xc(%esp)
6a2: 00
6a3: c7 44 24 08 10 00 00 movl $0x10,0x8(%esp)
6aa: 00
6ab: 89 44 24 04 mov %eax,0x4(%esp)
6af: 8b 45 08 mov 0x8(%ebp),%eax
6b2: 89 04 24 mov %eax,(%esp)
6b5: e8 71 fe ff ff call 52b <printint>
ap++;
6ba: 83 45 e8 04 addl $0x4,-0x18(%ebp)
6be: e9 b3 00 00 00 jmp 776 <printf+0x193>
} else if(c == 's'){
6c3: 83 7d e4 73 cmpl $0x73,-0x1c(%ebp)
6c7: 75 45 jne 70e <printf+0x12b>
s = (char*)*ap;
6c9: 8b 45 e8 mov -0x18(%ebp),%eax
6cc: 8b 00 mov (%eax),%eax
6ce: 89 45 f4 mov %eax,-0xc(%ebp)
ap++;
6d1: 83 45 e8 04 addl $0x4,-0x18(%ebp)
if(s == 0)
6d5: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
6d9: 75 09 jne 6e4 <printf+0x101>
s = "(null)";
6db: c7 45 f4 a0 11 00 00 movl $0x11a0,-0xc(%ebp)
while(*s != 0){
6e2: eb 1e jmp 702 <printf+0x11f>
6e4: eb 1c jmp 702 <printf+0x11f>
putc(fd, *s);
6e6: 8b 45 f4 mov -0xc(%ebp),%eax
6e9: 0f b6 00 movzbl (%eax),%eax
6ec: 0f be c0 movsbl %al,%eax
6ef: 89 44 24 04 mov %eax,0x4(%esp)
6f3: 8b 45 08 mov 0x8(%ebp),%eax
6f6: 89 04 24 mov %eax,(%esp)
6f9: e8 05 fe ff ff call 503 <putc>
s++;
6fe: 83 45 f4 01 addl $0x1,-0xc(%ebp)
} else if(c == 's'){
s = (char*)*ap;
ap++;
if(s == 0)
s = "(null)";
while(*s != 0){
702: 8b 45 f4 mov -0xc(%ebp),%eax
705: 0f b6 00 movzbl (%eax),%eax
708: 84 c0 test %al,%al
70a: 75 da jne 6e6 <printf+0x103>
70c: eb 68 jmp 776 <printf+0x193>
putc(fd, *s);
s++;
}
} else if(c == 'c'){
70e: 83 7d e4 63 cmpl $0x63,-0x1c(%ebp)
712: 75 1d jne 731 <printf+0x14e>
putc(fd, *ap);
714: 8b 45 e8 mov -0x18(%ebp),%eax
717: 8b 00 mov (%eax),%eax
719: 0f be c0 movsbl %al,%eax
71c: 89 44 24 04 mov %eax,0x4(%esp)
720: 8b 45 08 mov 0x8(%ebp),%eax
723: 89 04 24 mov %eax,(%esp)
726: e8 d8 fd ff ff call 503 <putc>
ap++;
72b: 83 45 e8 04 addl $0x4,-0x18(%ebp)
72f: eb 45 jmp 776 <printf+0x193>
} else if(c == '%'){
731: 83 7d e4 25 cmpl $0x25,-0x1c(%ebp)
735: 75 17 jne 74e <printf+0x16b>
putc(fd, c);
737: 8b 45 e4 mov -0x1c(%ebp),%eax
73a: 0f be c0 movsbl %al,%eax
73d: 89 44 24 04 mov %eax,0x4(%esp)
741: 8b 45 08 mov 0x8(%ebp),%eax
744: 89 04 24 mov %eax,(%esp)
747: e8 b7 fd ff ff call 503 <putc>
74c: eb 28 jmp 776 <printf+0x193>
} else {
// Unknown % sequence. Print it to draw attention.
putc(fd, '%');
74e: c7 44 24 04 25 00 00 movl $0x25,0x4(%esp)
755: 00
756: 8b 45 08 mov 0x8(%ebp),%eax
759: 89 04 24 mov %eax,(%esp)
75c: e8 a2 fd ff ff call 503 <putc>
putc(fd, c);
761: 8b 45 e4 mov -0x1c(%ebp),%eax
764: 0f be c0 movsbl %al,%eax
767: 89 44 24 04 mov %eax,0x4(%esp)
76b: 8b 45 08 mov 0x8(%ebp),%eax
76e: 89 04 24 mov %eax,(%esp)
771: e8 8d fd ff ff call 503 <putc>
}
state = 0;
776: c7 45 ec 00 00 00 00 movl $0x0,-0x14(%ebp)
int c, i, state;
uint *ap;
state = 0;
ap = (uint*)(void*)&fmt + 1;
for(i = 0; fmt[i]; i++){
77d: 83 45 f0 01 addl $0x1,-0x10(%ebp)
781: 8b 55 0c mov 0xc(%ebp),%edx
784: 8b 45 f0 mov -0x10(%ebp),%eax
787: 01 d0 add %edx,%eax
789: 0f b6 00 movzbl (%eax),%eax
78c: 84 c0 test %al,%al
78e: 0f 85 71 fe ff ff jne 605 <printf+0x22>
putc(fd, c);
}
state = 0;
}
}
}
794: c9 leave
795: c3 ret
00000796 <free>:
static Header base;
static Header *freep;
void
free(void *ap)
{
796: 55 push %ebp
797: 89 e5 mov %esp,%ebp
799: 83 ec 10 sub $0x10,%esp
Header *bp, *p;
bp = (Header*)ap - 1;
79c: 8b 45 08 mov 0x8(%ebp),%eax
79f: 83 e8 08 sub $0x8,%eax
7a2: 89 45 f8 mov %eax,-0x8(%ebp)
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
7a5: a1 48 16 00 00 mov 0x1648,%eax
7aa: 89 45 fc mov %eax,-0x4(%ebp)
7ad: eb 24 jmp 7d3 <free+0x3d>
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
7af: 8b 45 fc mov -0x4(%ebp),%eax
7b2: 8b 00 mov (%eax),%eax
7b4: 3b 45 fc cmp -0x4(%ebp),%eax
7b7: 77 12 ja 7cb <free+0x35>
7b9: 8b 45 f8 mov -0x8(%ebp),%eax
7bc: 3b 45 fc cmp -0x4(%ebp),%eax
7bf: 77 24 ja 7e5 <free+0x4f>
7c1: 8b 45 fc mov -0x4(%ebp),%eax
7c4: 8b 00 mov (%eax),%eax
7c6: 3b 45 f8 cmp -0x8(%ebp),%eax
7c9: 77 1a ja 7e5 <free+0x4f>
free(void *ap)
{
Header *bp, *p;
bp = (Header*)ap - 1;
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
7cb: 8b 45 fc mov -0x4(%ebp),%eax
7ce: 8b 00 mov (%eax),%eax
7d0: 89 45 fc mov %eax,-0x4(%ebp)
7d3: 8b 45 f8 mov -0x8(%ebp),%eax
7d6: 3b 45 fc cmp -0x4(%ebp),%eax
7d9: 76 d4 jbe 7af <free+0x19>
7db: 8b 45 fc mov -0x4(%ebp),%eax
7de: 8b 00 mov (%eax),%eax
7e0: 3b 45 f8 cmp -0x8(%ebp),%eax
7e3: 76 ca jbe 7af <free+0x19>
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
break;
if(bp + bp->s.size == p->s.ptr){
7e5: 8b 45 f8 mov -0x8(%ebp),%eax
7e8: 8b 40 04 mov 0x4(%eax),%eax
7eb: 8d 14 c5 00 00 00 00 lea 0x0(,%eax,8),%edx
7f2: 8b 45 f8 mov -0x8(%ebp),%eax
7f5: 01 c2 add %eax,%edx
7f7: 8b 45 fc mov -0x4(%ebp),%eax
7fa: 8b 00 mov (%eax),%eax
7fc: 39 c2 cmp %eax,%edx
7fe: 75 24 jne 824 <free+0x8e>
bp->s.size += p->s.ptr->s.size;
800: 8b 45 f8 mov -0x8(%ebp),%eax
803: 8b 50 04 mov 0x4(%eax),%edx
806: 8b 45 fc mov -0x4(%ebp),%eax
809: 8b 00 mov (%eax),%eax
80b: 8b 40 04 mov 0x4(%eax),%eax
80e: 01 c2 add %eax,%edx
810: 8b 45 f8 mov -0x8(%ebp),%eax
813: 89 50 04 mov %edx,0x4(%eax)
bp->s.ptr = p->s.ptr->s.ptr;
816: 8b 45 fc mov -0x4(%ebp),%eax
819: 8b 00 mov (%eax),%eax
81b: 8b 10 mov (%eax),%edx
81d: 8b 45 f8 mov -0x8(%ebp),%eax
820: 89 10 mov %edx,(%eax)
822: eb 0a jmp 82e <free+0x98>
} else
bp->s.ptr = p->s.ptr;
824: 8b 45 fc mov -0x4(%ebp),%eax
827: 8b 10 mov (%eax),%edx
829: 8b 45 f8 mov -0x8(%ebp),%eax
82c: 89 10 mov %edx,(%eax)
if(p + p->s.size == bp){
82e: 8b 45 fc mov -0x4(%ebp),%eax
831: 8b 40 04 mov 0x4(%eax),%eax
834: 8d 14 c5 00 00 00 00 lea 0x0(,%eax,8),%edx
83b: 8b 45 fc mov -0x4(%ebp),%eax
83e: 01 d0 add %edx,%eax
840: 3b 45 f8 cmp -0x8(%ebp),%eax
843: 75 20 jne 865 <free+0xcf>
p->s.size += bp->s.size;
845: 8b 45 fc mov -0x4(%ebp),%eax
848: 8b 50 04 mov 0x4(%eax),%edx
84b: 8b 45 f8 mov -0x8(%ebp),%eax
84e: 8b 40 04 mov 0x4(%eax),%eax
851: 01 c2 add %eax,%edx
853: 8b 45 fc mov -0x4(%ebp),%eax
856: 89 50 04 mov %edx,0x4(%eax)
p->s.ptr = bp->s.ptr;
859: 8b 45 f8 mov -0x8(%ebp),%eax
85c: 8b 10 mov (%eax),%edx
85e: 8b 45 fc mov -0x4(%ebp),%eax
861: 89 10 mov %edx,(%eax)
863: eb 08 jmp 86d <free+0xd7>
} else
p->s.ptr = bp;
865: 8b 45 fc mov -0x4(%ebp),%eax
868: 8b 55 f8 mov -0x8(%ebp),%edx
86b: 89 10 mov %edx,(%eax)
freep = p;
86d: 8b 45 fc mov -0x4(%ebp),%eax
870: a3 48 16 00 00 mov %eax,0x1648
}
875: c9 leave
876: c3 ret
00000877 <morecore>:
static Header*
morecore(uint nu)
{
877: 55 push %ebp
878: 89 e5 mov %esp,%ebp
87a: 83 ec 28 sub $0x28,%esp
char *p;
Header *hp;
if(nu < 4096)
87d: 81 7d 08 ff 0f 00 00 cmpl $0xfff,0x8(%ebp)
884: 77 07 ja 88d <morecore+0x16>
nu = 4096;
886: c7 45 08 00 10 00 00 movl $0x1000,0x8(%ebp)
p = sbrk(nu * sizeof(Header));
88d: 8b 45 08 mov 0x8(%ebp),%eax
890: c1 e0 03 shl $0x3,%eax
893: 89 04 24 mov %eax,(%esp)
896: e8 08 fc ff ff call 4a3 <sbrk>
89b: 89 45 f4 mov %eax,-0xc(%ebp)
if(p == (char*)-1)
89e: 83 7d f4 ff cmpl $0xffffffff,-0xc(%ebp)
8a2: 75 07 jne 8ab <morecore+0x34>
return 0;
8a4: b8 00 00 00 00 mov $0x0,%eax
8a9: eb 22 jmp 8cd <morecore+0x56>
hp = (Header*)p;
8ab: 8b 45 f4 mov -0xc(%ebp),%eax
8ae: 89 45 f0 mov %eax,-0x10(%ebp)
hp->s.size = nu;
8b1: 8b 45 f0 mov -0x10(%ebp),%eax
8b4: 8b 55 08 mov 0x8(%ebp),%edx
8b7: 89 50 04 mov %edx,0x4(%eax)
free((void*)(hp + 1));
8ba: 8b 45 f0 mov -0x10(%ebp),%eax
8bd: 83 c0 08 add $0x8,%eax
8c0: 89 04 24 mov %eax,(%esp)
8c3: e8 ce fe ff ff call 796 <free>
return freep;
8c8: a1 48 16 00 00 mov 0x1648,%eax
}
8cd: c9 leave
8ce: c3 ret
000008cf <malloc>:
void*
malloc(uint nbytes)
{
8cf: 55 push %ebp
8d0: 89 e5 mov %esp,%ebp
8d2: 83 ec 28 sub $0x28,%esp
Header *p, *prevp;
uint nunits;
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
8d5: 8b 45 08 mov 0x8(%ebp),%eax
8d8: 83 c0 07 add $0x7,%eax
8db: c1 e8 03 shr $0x3,%eax
8de: 83 c0 01 add $0x1,%eax
8e1: 89 45 ec mov %eax,-0x14(%ebp)
if((prevp = freep) == 0){
8e4: a1 48 16 00 00 mov 0x1648,%eax
8e9: 89 45 f0 mov %eax,-0x10(%ebp)
8ec: 83 7d f0 00 cmpl $0x0,-0x10(%ebp)
8f0: 75 23 jne 915 <malloc+0x46>
base.s.ptr = freep = prevp = &base;
8f2: c7 45 f0 40 16 00 00 movl $0x1640,-0x10(%ebp)
8f9: 8b 45 f0 mov -0x10(%ebp),%eax
8fc: a3 48 16 00 00 mov %eax,0x1648
901: a1 48 16 00 00 mov 0x1648,%eax
906: a3 40 16 00 00 mov %eax,0x1640
base.s.size = 0;
90b: c7 05 44 16 00 00 00 movl $0x0,0x1644
912: 00 00 00
}
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
915: 8b 45 f0 mov -0x10(%ebp),%eax
918: 8b 00 mov (%eax),%eax
91a: 89 45 f4 mov %eax,-0xc(%ebp)
if(p->s.size >= nunits){
91d: 8b 45 f4 mov -0xc(%ebp),%eax
920: 8b 40 04 mov 0x4(%eax),%eax
923: 3b 45 ec cmp -0x14(%ebp),%eax
926: 72 4d jb 975 <malloc+0xa6>
if(p->s.size == nunits)
928: 8b 45 f4 mov -0xc(%ebp),%eax
92b: 8b 40 04 mov 0x4(%eax),%eax
92e: 3b 45 ec cmp -0x14(%ebp),%eax
931: 75 0c jne 93f <malloc+0x70>
prevp->s.ptr = p->s.ptr;
933: 8b 45 f4 mov -0xc(%ebp),%eax
936: 8b 10 mov (%eax),%edx
938: 8b 45 f0 mov -0x10(%ebp),%eax
93b: 89 10 mov %edx,(%eax)
93d: eb 26 jmp 965 <malloc+0x96>
else {
p->s.size -= nunits;
93f: 8b 45 f4 mov -0xc(%ebp),%eax
942: 8b 40 04 mov 0x4(%eax),%eax
945: 2b 45 ec sub -0x14(%ebp),%eax
948: 89 c2 mov %eax,%edx
94a: 8b 45 f4 mov -0xc(%ebp),%eax
94d: 89 50 04 mov %edx,0x4(%eax)
p += p->s.size;
950: 8b 45 f4 mov -0xc(%ebp),%eax
953: 8b 40 04 mov 0x4(%eax),%eax
956: c1 e0 03 shl $0x3,%eax
959: 01 45 f4 add %eax,-0xc(%ebp)
p->s.size = nunits;
95c: 8b 45 f4 mov -0xc(%ebp),%eax
95f: 8b 55 ec mov -0x14(%ebp),%edx
962: 89 50 04 mov %edx,0x4(%eax)
}
freep = prevp;
965: 8b 45 f0 mov -0x10(%ebp),%eax
968: a3 48 16 00 00 mov %eax,0x1648
return (void*)(p + 1);
96d: 8b 45 f4 mov -0xc(%ebp),%eax
970: 83 c0 08 add $0x8,%eax
973: eb 38 jmp 9ad <malloc+0xde>
}
if(p == freep)
975: a1 48 16 00 00 mov 0x1648,%eax
97a: 39 45 f4 cmp %eax,-0xc(%ebp)
97d: 75 1b jne 99a <malloc+0xcb>
if((p = morecore(nunits)) == 0)
97f: 8b 45 ec mov -0x14(%ebp),%eax
982: 89 04 24 mov %eax,(%esp)
985: e8 ed fe ff ff call 877 <morecore>
98a: 89 45 f4 mov %eax,-0xc(%ebp)
98d: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
991: 75 07 jne 99a <malloc+0xcb>
return 0;
993: b8 00 00 00 00 mov $0x0,%eax
998: eb 13 jmp 9ad <malloc+0xde>
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
if((prevp = freep) == 0){
base.s.ptr = freep = prevp = &base;
base.s.size = 0;
}
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
99a: 8b 45 f4 mov -0xc(%ebp),%eax
99d: 89 45 f0 mov %eax,-0x10(%ebp)
9a0: 8b 45 f4 mov -0xc(%ebp),%eax
9a3: 8b 00 mov (%eax),%eax
9a5: 89 45 f4 mov %eax,-0xc(%ebp)
return (void*)(p + 1);
}
if(p == freep)
if((p = morecore(nunits)) == 0)
return 0;
}
9a8: e9 70 ff ff ff jmp 91d <malloc+0x4e>
}
9ad: c9 leave
9ae: c3 ret
000009af <mesa_slots_monitor_alloc>:
#include "user.h"
mesa_slots_monitor_t* mesa_slots_monitor_alloc(){
9af: 55 push %ebp
9b0: 89 e5 mov %esp,%ebp
9b2: 83 ec 28 sub $0x28,%esp
int mutex= kthread_mutex_alloc() ;
9b5: e8 21 fb ff ff call 4db <kthread_mutex_alloc>
9ba: 89 45 f4 mov %eax,-0xc(%ebp)
if( mutex < 0){
9bd: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
9c1: 79 0a jns 9cd <mesa_slots_monitor_alloc+0x1e>
return 0;
9c3: b8 00 00 00 00 mov $0x0,%eax
9c8: e9 8b 00 00 00 jmp a58 <mesa_slots_monitor_alloc+0xa9>
}
struct mesa_cond * empty = mesa_cond_alloc();
9cd: e8 44 06 00 00 call 1016 <mesa_cond_alloc>
9d2: 89 45 f0 mov %eax,-0x10(%ebp)
if (empty == 0){
9d5: 83 7d f0 00 cmpl $0x0,-0x10(%ebp)
9d9: 75 12 jne 9ed <mesa_slots_monitor_alloc+0x3e>
kthread_mutex_dealloc(mutex);
9db: 8b 45 f4 mov -0xc(%ebp),%eax
9de: 89 04 24 mov %eax,(%esp)
9e1: e8 fd fa ff ff call 4e3 <kthread_mutex_dealloc>
return 0;
9e6: b8 00 00 00 00 mov $0x0,%eax
9eb: eb 6b jmp a58 <mesa_slots_monitor_alloc+0xa9>
}
struct mesa_cond * full = mesa_cond_alloc();
9ed: e8 24 06 00 00 call 1016 <mesa_cond_alloc>
9f2: 89 45 ec mov %eax,-0x14(%ebp)
if (full == 0){
9f5: 83 7d ec 00 cmpl $0x0,-0x14(%ebp)
9f9: 75 1d jne a18 <mesa_slots_monitor_alloc+0x69>
kthread_mutex_dealloc(mutex);
9fb: 8b 45 f4 mov -0xc(%ebp),%eax
9fe: 89 04 24 mov %eax,(%esp)
a01: e8 dd fa ff ff call 4e3 <kthread_mutex_dealloc>
mesa_cond_dealloc(empty);
a06: 8b 45 f0 mov -0x10(%ebp),%eax
a09: 89 04 24 mov %eax,(%esp)
a0c: e8 46 06 00 00 call 1057 <mesa_cond_dealloc>
return 0;
a11: b8 00 00 00 00 mov $0x0,%eax
a16: eb 40 jmp a58 <mesa_slots_monitor_alloc+0xa9>
}
mesa_slots_monitor_t * monitor= malloc (sizeof (mesa_slots_monitor_t));
a18: c7 04 24 14 00 00 00 movl $0x14,(%esp)
a1f: e8 ab fe ff ff call 8cf <malloc>
a24: 89 45 e8 mov %eax,-0x18(%ebp)
monitor->empty= empty;
a27: 8b 45 e8 mov -0x18(%ebp),%eax
a2a: 8b 55 f0 mov -0x10(%ebp),%edx
a2d: 89 50 04 mov %edx,0x4(%eax)
monitor->full= full;
a30: 8b 45 e8 mov -0x18(%ebp),%eax
a33: 8b 55 ec mov -0x14(%ebp),%edx
a36: 89 50 08 mov %edx,0x8(%eax)
monitor->Monitormutex= mutex;
a39: 8b 45 e8 mov -0x18(%ebp),%eax
a3c: 8b 55 f4 mov -0xc(%ebp),%edx
a3f: 89 10 mov %edx,(%eax)
monitor->slots=0;
a41: 8b 45 e8 mov -0x18(%ebp),%eax
a44: c7 40 0c 00 00 00 00 movl $0x0,0xc(%eax)
monitor->active=1;
a4b: 8b 45 e8 mov -0x18(%ebp),%eax
a4e: c7 40 10 01 00 00 00 movl $0x1,0x10(%eax)
return monitor;
a55: 8b 45 e8 mov -0x18(%ebp),%eax
}
a58: c9 leave
a59: c3 ret
00000a5a <mesa_slots_monitor_dealloc>:
int mesa_slots_monitor_dealloc(mesa_slots_monitor_t* monitor){
a5a: 55 push %ebp
a5b: 89 e5 mov %esp,%ebp
a5d: 83 ec 18 sub $0x18,%esp
if( kthread_mutex_dealloc(monitor->Monitormutex) < 0 ||
a60: 8b 45 08 mov 0x8(%ebp),%eax
a63: 8b 00 mov (%eax),%eax
a65: 89 04 24 mov %eax,(%esp)
a68: e8 76 fa ff ff call 4e3 <kthread_mutex_dealloc>
a6d: 85 c0 test %eax,%eax
a6f: 78 2e js a9f <mesa_slots_monitor_dealloc+0x45>
mesa_cond_alloc(monitor->empty)<0 ||
a71: 8b 45 08 mov 0x8(%ebp),%eax
a74: 8b 40 04 mov 0x4(%eax),%eax
a77: 89 04 24 mov %eax,(%esp)
a7a: e8 97 05 00 00 call 1016 <mesa_cond_alloc>
mesa_cond_alloc(monitor->full)<0
a7f: 8b 45 08 mov 0x8(%ebp),%eax
a82: 8b 40 08 mov 0x8(%eax),%eax
a85: 89 04 24 mov %eax,(%esp)
a88: e8 89 05 00 00 call 1016 <mesa_cond_alloc>
){
return -1;
}
free(monitor);
a8d: 8b 45 08 mov 0x8(%ebp),%eax
a90: 89 04 24 mov %eax,(%esp)
a93: e8 fe fc ff ff call 796 <free>
return 0;
a98: b8 00 00 00 00 mov $0x0,%eax
a9d: eb 05 jmp aa4 <mesa_slots_monitor_dealloc+0x4a>
if( kthread_mutex_dealloc(monitor->Monitormutex) < 0 ||
mesa_cond_alloc(monitor->empty)<0 ||
mesa_cond_alloc(monitor->full)<0
){
return -1;
a9f: b8 ff ff ff ff mov $0xffffffff,%eax
}
free(monitor);
return 0;
}
aa4: c9 leave
aa5: c3 ret
00000aa6 <mesa_slots_monitor_addslots>:
int mesa_slots_monitor_addslots(mesa_slots_monitor_t* monitor,int n){
aa6: 55 push %ebp
aa7: 89 e5 mov %esp,%ebp
aa9: 83 ec 18 sub $0x18,%esp
if (!monitor->active)
aac: 8b 45 08 mov 0x8(%ebp),%eax
aaf: 8b 40 10 mov 0x10(%eax),%eax
ab2: 85 c0 test %eax,%eax
ab4: 75 0a jne ac0 <mesa_slots_monitor_addslots+0x1a>
return -1;
ab6: b8 ff ff ff ff mov $0xffffffff,%eax
abb: e9 81 00 00 00 jmp b41 <mesa_slots_monitor_addslots+0x9b>
if (kthread_mutex_lock( monitor->Monitormutex)< -1)
ac0: 8b 45 08 mov 0x8(%ebp),%eax
ac3: 8b 00 mov (%eax),%eax
ac5: 89 04 24 mov %eax,(%esp)
ac8: e8 1e fa ff ff call 4eb <kthread_mutex_lock>
acd: 83 f8 ff cmp $0xffffffff,%eax
ad0: 7d 07 jge ad9 <mesa_slots_monitor_addslots+0x33>
return -1;
ad2: b8 ff ff ff ff mov $0xffffffff,%eax
ad7: eb 68 jmp b41 <mesa_slots_monitor_addslots+0x9b>
while ( monitor->active && monitor->slots > 0 )
ad9: eb 17 jmp af2 <mesa_slots_monitor_addslots+0x4c>
{
//printf(1,"grader is sleeping %d\n ", monitor->active);
mesa_cond_wait( monitor->full, monitor->Monitormutex) ;
adb: 8b 45 08 mov 0x8(%ebp),%eax
ade: 8b 10 mov (%eax),%edx
ae0: 8b 45 08 mov 0x8(%ebp),%eax
ae3: 8b 40 08 mov 0x8(%eax),%eax
ae6: 89 54 24 04 mov %edx,0x4(%esp)
aea: 89 04 24 mov %eax,(%esp)
aed: e8 af 05 00 00 call 10a1 <mesa_cond_wait>
return -1;
if (kthread_mutex_lock( monitor->Monitormutex)< -1)
return -1;
while ( monitor->active && monitor->slots > 0 )
af2: 8b 45 08 mov 0x8(%ebp),%eax
af5: 8b 40 10 mov 0x10(%eax),%eax
af8: 85 c0 test %eax,%eax
afa: 74 0a je b06 <mesa_slots_monitor_addslots+0x60>
afc: 8b 45 08 mov 0x8(%ebp),%eax
aff: 8b 40 0c mov 0xc(%eax),%eax
b02: 85 c0 test %eax,%eax
b04: 7f d5 jg adb <mesa_slots_monitor_addslots+0x35>
//printf(1,"grader is sleeping %d\n ", monitor->active);
mesa_cond_wait( monitor->full, monitor->Monitormutex) ;
}
if ( monitor->active)
b06: 8b 45 08 mov 0x8(%ebp),%eax
b09: 8b 40 10 mov 0x10(%eax),%eax
b0c: 85 c0 test %eax,%eax
b0e: 74 11 je b21 <mesa_slots_monitor_addslots+0x7b>
monitor->slots+= n;
b10: 8b 45 08 mov 0x8(%ebp),%eax
b13: 8b 50 0c mov 0xc(%eax),%edx
b16: 8b 45 0c mov 0xc(%ebp),%eax
b19: 01 c2 add %eax,%edx
b1b: 8b 45 08 mov 0x8(%ebp),%eax
b1e: 89 50 0c mov %edx,0xc(%eax)
mesa_cond_signal(monitor->empty);
b21: 8b 45 08 mov 0x8(%ebp),%eax
b24: 8b 40 04 mov 0x4(%eax),%eax
b27: 89 04 24 mov %eax,(%esp)
b2a: e8 dc 05 00 00 call 110b <mesa_cond_signal>
kthread_mutex_unlock( monitor->Monitormutex );
b2f: 8b 45 08 mov 0x8(%ebp),%eax
b32: 8b 00 mov (%eax),%eax
b34: 89 04 24 mov %eax,(%esp)
b37: e8 b7 f9 ff ff call 4f3 <kthread_mutex_unlock>
return 1;
b3c: b8 01 00 00 00 mov $0x1,%eax
}
b41: c9 leave
b42: c3 ret
00000b43 <mesa_slots_monitor_takeslot>:
int mesa_slots_monitor_takeslot(mesa_slots_monitor_t* monitor){
b43: 55 push %ebp
b44: 89 e5 mov %esp,%ebp
b46: 83 ec 18 sub $0x18,%esp
if (!monitor->active)
b49: 8b 45 08 mov 0x8(%ebp),%eax
b4c: 8b 40 10 mov 0x10(%eax),%eax
b4f: 85 c0 test %eax,%eax
b51: 75 07 jne b5a <mesa_slots_monitor_takeslot+0x17>
return -1;
b53: b8 ff ff ff ff mov $0xffffffff,%eax
b58: eb 7f jmp bd9 <mesa_slots_monitor_takeslot+0x96>
if (kthread_mutex_lock( monitor->Monitormutex)< -1)
b5a: 8b 45 08 mov 0x8(%ebp),%eax
b5d: 8b 00 mov (%eax),%eax
b5f: 89 04 24 mov %eax,(%esp)
b62: e8 84 f9 ff ff call 4eb <kthread_mutex_lock>
b67: 83 f8 ff cmp $0xffffffff,%eax
b6a: 7d 07 jge b73 <mesa_slots_monitor_takeslot+0x30>
return -1;
b6c: b8 ff ff ff ff mov $0xffffffff,%eax
b71: eb 66 jmp bd9 <mesa_slots_monitor_takeslot+0x96>
while ( monitor->active && monitor->slots == 0 )
b73: eb 17 jmp b8c <mesa_slots_monitor_takeslot+0x49>
mesa_cond_wait( monitor->empty, monitor->Monitormutex);
b75: 8b 45 08 mov 0x8(%ebp),%eax
b78: 8b 10 mov (%eax),%edx
b7a: 8b 45 08 mov 0x8(%ebp),%eax
b7d: 8b 40 04 mov 0x4(%eax),%eax
b80: 89 54 24 04 mov %edx,0x4(%esp)
b84: 89 04 24 mov %eax,(%esp)
b87: e8 15 05 00 00 call 10a1 <mesa_cond_wait>
return -1;
if (kthread_mutex_lock( monitor->Monitormutex)< -1)
return -1;
while ( monitor->active && monitor->slots == 0 )
b8c: 8b 45 08 mov 0x8(%ebp),%eax
b8f: 8b 40 10 mov 0x10(%eax),%eax
b92: 85 c0 test %eax,%eax
b94: 74 0a je ba0 <mesa_slots_monitor_takeslot+0x5d>
b96: 8b 45 08 mov 0x8(%ebp),%eax
b99: 8b 40 0c mov 0xc(%eax),%eax
b9c: 85 c0 test %eax,%eax
b9e: 74 d5 je b75 <mesa_slots_monitor_takeslot+0x32>
mesa_cond_wait( monitor->empty, monitor->Monitormutex);
if ( monitor->active)
ba0: 8b 45 08 mov 0x8(%ebp),%eax
ba3: 8b 40 10 mov 0x10(%eax),%eax
ba6: 85 c0 test %eax,%eax
ba8: 74 0f je bb9 <mesa_slots_monitor_takeslot+0x76>
monitor->slots--;
baa: 8b 45 08 mov 0x8(%ebp),%eax
bad: 8b 40 0c mov 0xc(%eax),%eax
bb0: 8d 50 ff lea -0x1(%eax),%edx
bb3: 8b 45 08 mov 0x8(%ebp),%eax
bb6: 89 50 0c mov %edx,0xc(%eax)
mesa_cond_signal(monitor->full);
bb9: 8b 45 08 mov 0x8(%ebp),%eax
bbc: 8b 40 08 mov 0x8(%eax),%eax
bbf: 89 04 24 mov %eax,(%esp)
bc2: e8 44 05 00 00 call 110b <mesa_cond_signal>
kthread_mutex_unlock( monitor->Monitormutex );
bc7: 8b 45 08 mov 0x8(%ebp),%eax
bca: 8b 00 mov (%eax),%eax
bcc: 89 04 24 mov %eax,(%esp)
bcf: e8 1f f9 ff ff call 4f3 <kthread_mutex_unlock>
return 1;
bd4: b8 01 00 00 00 mov $0x1,%eax
}
bd9: c9 leave
bda: c3 ret
00000bdb <mesa_slots_monitor_stopadding>:
int mesa_slots_monitor_stopadding(mesa_slots_monitor_t* monitor){
bdb: 55 push %ebp
bdc: 89 e5 mov %esp,%ebp
bde: 83 ec 18 sub $0x18,%esp
if (!monitor->active)
be1: 8b 45 08 mov 0x8(%ebp),%eax
be4: 8b 40 10 mov 0x10(%eax),%eax
be7: 85 c0 test %eax,%eax
be9: 75 07 jne bf2 <mesa_slots_monitor_stopadding+0x17>
return -1;
beb: b8 ff ff ff ff mov $0xffffffff,%eax
bf0: eb 35 jmp c27 <mesa_slots_monitor_stopadding+0x4c>
if (kthread_mutex_lock( monitor->Monitormutex)< -1)
bf2: 8b 45 08 mov 0x8(%ebp),%eax
bf5: 8b 00 mov (%eax),%eax
bf7: 89 04 24 mov %eax,(%esp)
bfa: e8 ec f8 ff ff call 4eb <kthread_mutex_lock>
bff: 83 f8 ff cmp $0xffffffff,%eax
c02: 7d 07 jge c0b <mesa_slots_monitor_stopadding+0x30>
return -1;
c04: b8 ff ff ff ff mov $0xffffffff,%eax
c09: eb 1c jmp c27 <mesa_slots_monitor_stopadding+0x4c>
monitor->active = 0;
c0b: 8b 45 08 mov 0x8(%ebp),%eax
c0e: c7 40 10 00 00 00 00 movl $0x0,0x10(%eax)
kthread_mutex_unlock( monitor->Monitormutex );
c15: 8b 45 08 mov 0x8(%ebp),%eax
c18: 8b 00 mov (%eax),%eax
c1a: 89 04 24 mov %eax,(%esp)
c1d: e8 d1 f8 ff ff call 4f3 <kthread_mutex_unlock>
return 0;
c22: b8 00 00 00 00 mov $0x0,%eax
}
c27: c9 leave
c28: c3 ret
00000c29 <hoare_slots_monitor_alloc>:
#include "stat.h"
#include "user.h"
hoare_slots_monitor_t* hoare_slots_monitor_alloc(){
c29: 55 push %ebp
c2a: 89 e5 mov %esp,%ebp
c2c: 83 ec 28 sub $0x28,%esp
int mutex= kthread_mutex_alloc() ;
c2f: e8 a7 f8 ff ff call 4db <kthread_mutex_alloc>
c34: 89 45 f4 mov %eax,-0xc(%ebp)
if( mutex < 0)
c37: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
c3b: 79 0a jns c47 <hoare_slots_monitor_alloc+0x1e>
return 0;
c3d: b8 00 00 00 00 mov $0x0,%eax
c42: e9 8b 00 00 00 jmp cd2 <hoare_slots_monitor_alloc+0xa9>
struct hoare_cond * empty = hoare_cond_alloc();
c47: e8 68 02 00 00 call eb4 <hoare_cond_alloc>
c4c: 89 45 f0 mov %eax,-0x10(%ebp)
if (empty == 0){
c4f: 83 7d f0 00 cmpl $0x0,-0x10(%ebp)
c53: 75 12 jne c67 <hoare_slots_monitor_alloc+0x3e>
kthread_mutex_dealloc(mutex);
c55: 8b 45 f4 mov -0xc(%ebp),%eax
c58: 89 04 24 mov %eax,(%esp)
c5b: e8 83 f8 ff ff call 4e3 <kthread_mutex_dealloc>
return 0;
c60: b8 00 00 00 00 mov $0x0,%eax
c65: eb 6b jmp cd2 <hoare_slots_monitor_alloc+0xa9>
}
hoare_cond_t * full = hoare_cond_alloc();
c67: e8 48 02 00 00 call eb4 <hoare_cond_alloc>
c6c: 89 45 ec mov %eax,-0x14(%ebp)
if (full == 0)
c6f: 83 7d ec 00 cmpl $0x0,-0x14(%ebp)
c73: 75 1d jne c92 <hoare_slots_monitor_alloc+0x69>
{
kthread_mutex_dealloc(mutex);
c75: 8b 45 f4 mov -0xc(%ebp),%eax
c78: 89 04 24 mov %eax,(%esp)
c7b: e8 63 f8 ff ff call 4e3 <kthread_mutex_dealloc>
hoare_cond_dealloc(empty);
c80: 8b 45 f0 mov -0x10(%ebp),%eax
c83: 89 04 24 mov %eax,(%esp)
c86: e8 6a 02 00 00 call ef5 <hoare_cond_dealloc>
return 0;
c8b: b8 00 00 00 00 mov $0x0,%eax
c90: eb 40 jmp cd2 <hoare_slots_monitor_alloc+0xa9>
}
hoare_slots_monitor_t * monitor= malloc (sizeof (hoare_slots_monitor_t));
c92: c7 04 24 14 00 00 00 movl $0x14,(%esp)
c99: e8 31 fc ff ff call 8cf <malloc>
c9e: 89 45 e8 mov %eax,-0x18(%ebp)
monitor->empty= empty;
ca1: 8b 45 e8 mov -0x18(%ebp),%eax
ca4: 8b 55 f0 mov -0x10(%ebp),%edx
ca7: 89 50 04 mov %edx,0x4(%eax)
monitor->full= full;
caa: 8b 45 e8 mov -0x18(%ebp),%eax
cad: 8b 55 ec mov -0x14(%ebp),%edx
cb0: 89 50 08 mov %edx,0x8(%eax)
monitor->Monitormutex= mutex;
cb3: 8b 45 e8 mov -0x18(%ebp),%eax
cb6: 8b 55 f4 mov -0xc(%ebp),%edx
cb9: 89 10 mov %edx,(%eax)
monitor->slots=0;
cbb: 8b 45 e8 mov -0x18(%ebp),%eax
cbe: c7 40 0c 00 00 00 00 movl $0x0,0xc(%eax)
monitor->active=1;
cc5: 8b 45 e8 mov -0x18(%ebp),%eax
cc8: c7 40 10 01 00 00 00 movl $0x1,0x10(%eax)
return monitor;
ccf: 8b 45 e8 mov -0x18(%ebp),%eax
}
cd2: c9 leave
cd3: c3 ret
00000cd4 <hoare_slots_monitor_dealloc>:
int hoare_slots_monitor_dealloc(hoare_slots_monitor_t* monitor){
cd4: 55 push %ebp
cd5: 89 e5 mov %esp,%ebp
cd7: 83 ec 18 sub $0x18,%esp
if( kthread_mutex_dealloc(monitor->Monitormutex) < 0 ||
cda: 8b 45 08 mov 0x8(%ebp),%eax
cdd: 8b 00 mov (%eax),%eax
cdf: 89 04 24 mov %eax,(%esp)
ce2: e8 fc f7 ff ff call 4e3 <kthread_mutex_dealloc>
ce7: 85 c0 test %eax,%eax
ce9: 78 2e js d19 <hoare_slots_monitor_dealloc+0x45>
hoare_cond_alloc(monitor->empty)<0 ||
ceb: 8b 45 08 mov 0x8(%ebp),%eax
cee: 8b 40 04 mov 0x4(%eax),%eax
cf1: 89 04 24 mov %eax,(%esp)
cf4: e8 bb 01 00 00 call eb4 <hoare_cond_alloc>
hoare_cond_alloc(monitor->full)<0
cf9: 8b 45 08 mov 0x8(%ebp),%eax
cfc: 8b 40 08 mov 0x8(%eax),%eax
cff: 89 04 24 mov %eax,(%esp)
d02: e8 ad 01 00 00 call eb4 <hoare_cond_alloc>
){
return -1;
}
free(monitor);
d07: 8b 45 08 mov 0x8(%ebp),%eax
d0a: 89 04 24 mov %eax,(%esp)
d0d: e8 84 fa ff ff call 796 <free>
return 0;
d12: b8 00 00 00 00 mov $0x0,%eax
d17: eb 05 jmp d1e <hoare_slots_monitor_dealloc+0x4a>
if( kthread_mutex_dealloc(monitor->Monitormutex) < 0 ||
hoare_cond_alloc(monitor->empty)<0 ||
hoare_cond_alloc(monitor->full)<0
){
return -1;
d19: b8 ff ff ff ff mov $0xffffffff,%eax
}
free(monitor);
return 0;
}
d1e: c9 leave
d1f: c3 ret
00000d20 <hoare_slots_monitor_addslots>:
int hoare_slots_monitor_addslots(hoare_slots_monitor_t* monitor,int n){
d20: 55 push %ebp
d21: 89 e5 mov %esp,%ebp
d23: 83 ec 18 sub $0x18,%esp
if (!monitor->active)
d26: 8b 45 08 mov 0x8(%ebp),%eax
d29: 8b 40 10 mov 0x10(%eax),%eax
d2c: 85 c0 test %eax,%eax
d2e: 75 0a jne d3a <hoare_slots_monitor_addslots+0x1a>
return -1;
d30: b8 ff ff ff ff mov $0xffffffff,%eax
d35: e9 88 00 00 00 jmp dc2 <hoare_slots_monitor_addslots+0xa2>
if (kthread_mutex_lock( monitor->Monitormutex)< -1)
d3a: 8b 45 08 mov 0x8(%ebp),%eax
d3d: 8b 00 mov (%eax),%eax
d3f: 89 04 24 mov %eax,(%esp)
d42: e8 a4 f7 ff ff call 4eb <kthread_mutex_lock>
d47: 83 f8 ff cmp $0xffffffff,%eax
d4a: 7d 07 jge d53 <hoare_slots_monitor_addslots+0x33>
return -1;
d4c: b8 ff ff ff ff mov $0xffffffff,%eax
d51: eb 6f jmp dc2 <hoare_slots_monitor_addslots+0xa2>
if ( monitor->active && monitor->slots > 0 )
d53: 8b 45 08 mov 0x8(%ebp),%eax
d56: 8b 40 10 mov 0x10(%eax),%eax
d59: 85 c0 test %eax,%eax
d5b: 74 21 je d7e <hoare_slots_monitor_addslots+0x5e>
d5d: 8b 45 08 mov 0x8(%ebp),%eax
d60: 8b 40 0c mov 0xc(%eax),%eax
d63: 85 c0 test %eax,%eax
d65: 7e 17 jle d7e <hoare_slots_monitor_addslots+0x5e>
hoare_cond_wait( monitor->full, monitor->Monitormutex);
d67: 8b 45 08 mov 0x8(%ebp),%eax
d6a: 8b 10 mov (%eax),%edx
d6c: 8b 45 08 mov 0x8(%ebp),%eax
d6f: 8b 40 08 mov 0x8(%eax),%eax
d72: 89 54 24 04 mov %edx,0x4(%esp)
d76: 89 04 24 mov %eax,(%esp)
d79: e8 c1 01 00 00 call f3f <hoare_cond_wait>
if ( monitor->active)
d7e: 8b 45 08 mov 0x8(%ebp),%eax
d81: 8b 40 10 mov 0x10(%eax),%eax
d84: 85 c0 test %eax,%eax
d86: 74 11 je d99 <hoare_slots_monitor_addslots+0x79>
monitor->slots+= n;
d88: 8b 45 08 mov 0x8(%ebp),%eax
d8b: 8b 50 0c mov 0xc(%eax),%edx
d8e: 8b 45 0c mov 0xc(%ebp),%eax
d91: 01 c2 add %eax,%edx
d93: 8b 45 08 mov 0x8(%ebp),%eax
d96: 89 50 0c mov %edx,0xc(%eax)
hoare_cond_signal(monitor->empty, monitor->Monitormutex );
d99: 8b 45 08 mov 0x8(%ebp),%eax
d9c: 8b 10 mov (%eax),%edx
d9e: 8b 45 08 mov 0x8(%ebp),%eax
da1: 8b 40 04 mov 0x4(%eax),%eax
da4: 89 54 24 04 mov %edx,0x4(%esp)
da8: 89 04 24 mov %eax,(%esp)
dab: e8 e6 01 00 00 call f96 <hoare_cond_signal>
kthread_mutex_unlock( monitor->Monitormutex );
db0: 8b 45 08 mov 0x8(%ebp),%eax
db3: 8b 00 mov (%eax),%eax
db5: 89 04 24 mov %eax,(%esp)
db8: e8 36 f7 ff ff call 4f3 <kthread_mutex_unlock>
return 1;
dbd: b8 01 00 00 00 mov $0x1,%eax
}
dc2: c9 leave
dc3: c3 ret
00000dc4 <hoare_slots_monitor_takeslot>:
int hoare_slots_monitor_takeslot(hoare_slots_monitor_t* monitor){
dc4: 55 push %ebp
dc5: 89 e5 mov %esp,%ebp
dc7: 83 ec 18 sub $0x18,%esp
if (!monitor->active)
dca: 8b 45 08 mov 0x8(%ebp),%eax
dcd: 8b 40 10 mov 0x10(%eax),%eax
dd0: 85 c0 test %eax,%eax
dd2: 75 0a jne dde <hoare_slots_monitor_takeslot+0x1a>
return -1;
dd4: b8 ff ff ff ff mov $0xffffffff,%eax
dd9: e9 86 00 00 00 jmp e64 <hoare_slots_monitor_takeslot+0xa0>
if (kthread_mutex_lock( monitor->Monitormutex)< -1)
dde: 8b 45 08 mov 0x8(%ebp),%eax
de1: 8b 00 mov (%eax),%eax
de3: 89 04 24 mov %eax,(%esp)
de6: e8 00 f7 ff ff call 4eb <kthread_mutex_lock>
deb: 83 f8 ff cmp $0xffffffff,%eax
dee: 7d 07 jge df7 <hoare_slots_monitor_takeslot+0x33>
return -1;
df0: b8 ff ff ff ff mov $0xffffffff,%eax
df5: eb 6d jmp e64 <hoare_slots_monitor_takeslot+0xa0>
if ( monitor->active && monitor->slots == 0 )
df7: 8b 45 08 mov 0x8(%ebp),%eax
dfa: 8b 40 10 mov 0x10(%eax),%eax
dfd: 85 c0 test %eax,%eax
dff: 74 21 je e22 <hoare_slots_monitor_takeslot+0x5e>
e01: 8b 45 08 mov 0x8(%ebp),%eax
e04: 8b 40 0c mov 0xc(%eax),%eax
e07: 85 c0 test %eax,%eax
e09: 75 17 jne e22 <hoare_slots_monitor_takeslot+0x5e>
hoare_cond_wait( monitor->empty, monitor->Monitormutex);
e0b: 8b 45 08 mov 0x8(%ebp),%eax
e0e: 8b 10 mov (%eax),%edx
e10: 8b 45 08 mov 0x8(%ebp),%eax
e13: 8b 40 04 mov 0x4(%eax),%eax
e16: 89 54 24 04 mov %edx,0x4(%esp)
e1a: 89 04 24 mov %eax,(%esp)
e1d: e8 1d 01 00 00 call f3f <hoare_cond_wait>
if ( monitor->active)
e22: 8b 45 08 mov 0x8(%ebp),%eax
e25: 8b 40 10 mov 0x10(%eax),%eax
e28: 85 c0 test %eax,%eax
e2a: 74 0f je e3b <hoare_slots_monitor_takeslot+0x77>
monitor->slots--;
e2c: 8b 45 08 mov 0x8(%ebp),%eax
e2f: 8b 40 0c mov 0xc(%eax),%eax
e32: 8d 50 ff lea -0x1(%eax),%edx
e35: 8b 45 08 mov 0x8(%ebp),%eax
e38: 89 50 0c mov %edx,0xc(%eax)
hoare_cond_signal(monitor->full, monitor->Monitormutex );
e3b: 8b 45 08 mov 0x8(%ebp),%eax
e3e: 8b 10 mov (%eax),%edx
e40: 8b 45 08 mov 0x8(%ebp),%eax
e43: 8b 40 08 mov 0x8(%eax),%eax
e46: 89 54 24 04 mov %edx,0x4(%esp)
e4a: 89 04 24 mov %eax,(%esp)
e4d: e8 44 01 00 00 call f96 <hoare_cond_signal>
kthread_mutex_unlock( monitor->Monitormutex );
e52: 8b 45 08 mov 0x8(%ebp),%eax
e55: 8b 00 mov (%eax),%eax
e57: 89 04 24 mov %eax,(%esp)
e5a: e8 94 f6 ff ff call 4f3 <kthread_mutex_unlock>
return 1;
e5f: b8 01 00 00 00 mov $0x1,%eax
}
e64: c9 leave
e65: c3 ret
00000e66 <hoare_slots_monitor_stopadding>:
int hoare_slots_monitor_stopadding(hoare_slots_monitor_t* monitor){
e66: 55 push %ebp
e67: 89 e5 mov %esp,%ebp
e69: 83 ec 18 sub $0x18,%esp
if (!monitor->active)
e6c: 8b 45 08 mov 0x8(%ebp),%eax
e6f: 8b 40 10 mov 0x10(%eax),%eax
e72: 85 c0 test %eax,%eax
e74: 75 07 jne e7d <hoare_slots_monitor_stopadding+0x17>
return -1;
e76: b8 ff ff ff ff mov $0xffffffff,%eax
e7b: eb 35 jmp eb2 <hoare_slots_monitor_stopadding+0x4c>
if (kthread_mutex_lock( monitor->Monitormutex)< -1)
e7d: 8b 45 08 mov 0x8(%ebp),%eax
e80: 8b 00 mov (%eax),%eax
e82: 89 04 24 mov %eax,(%esp)
e85: e8 61 f6 ff ff call 4eb <kthread_mutex_lock>
e8a: 83 f8 ff cmp $0xffffffff,%eax
e8d: 7d 07 jge e96 <hoare_slots_monitor_stopadding+0x30>
return -1;
e8f: b8 ff ff ff ff mov $0xffffffff,%eax
e94: eb 1c jmp eb2 <hoare_slots_monitor_stopadding+0x4c>
monitor->active = 0;
e96: 8b 45 08 mov 0x8(%ebp),%eax
e99: c7 40 10 00 00 00 00 movl $0x0,0x10(%eax)
kthread_mutex_unlock( monitor->Monitormutex );
ea0: 8b 45 08 mov 0x8(%ebp),%eax
ea3: 8b 00 mov (%eax),%eax
ea5: 89 04 24 mov %eax,(%esp)
ea8: e8 46 f6 ff ff call 4f3 <kthread_mutex_unlock>
return 0;
ead: b8 00 00 00 00 mov $0x0,%eax
}
eb2: c9 leave
eb3: c3 ret
00000eb4 <hoare_cond_alloc>:
#include "types.h"
#include "stat.h"
#include "user.h"
hoare_cond_t* hoare_cond_alloc(){
eb4: 55 push %ebp
eb5: 89 e5 mov %esp,%ebp
eb7: 83 ec 28 sub $0x28,%esp
int cvMutex= kthread_mutex_alloc();
eba: e8 1c f6 ff ff call 4db <kthread_mutex_alloc>
ebf: 89 45 f4 mov %eax,-0xc(%ebp)
if (cvMutex<0)
ec2: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
ec6: 79 07 jns ecf <hoare_cond_alloc+0x1b>
return 0;
ec8: b8 00 00 00 00 mov $0x0,%eax
ecd: eb 24 jmp ef3 <hoare_cond_alloc+0x3f>
hoare_cond_t *hcond = malloc( sizeof (hoare_cond_t)) ;
ecf: c7 04 24 08 00 00 00 movl $0x8,(%esp)
ed6: e8 f4 f9 ff ff call 8cf <malloc>
edb: 89 45 f0 mov %eax,-0x10(%ebp)
hcond->mutexCV=cvMutex;
ede: 8b 45 f0 mov -0x10(%ebp),%eax
ee1: 8b 55 f4 mov -0xc(%ebp),%edx
ee4: 89 10 mov %edx,(%eax)
hcond->waitinCount=0;
ee6: 8b 45 f0 mov -0x10(%ebp),%eax
ee9: c7 40 04 00 00 00 00 movl $0x0,0x4(%eax)
return hcond;
ef0: 8b 45 f0 mov -0x10(%ebp),%eax
}
ef3: c9 leave
ef4: c3 ret
00000ef5 <hoare_cond_dealloc>:
int hoare_cond_dealloc(hoare_cond_t* hCond){
ef5: 55 push %ebp
ef6: 89 e5 mov %esp,%ebp
ef8: 83 ec 18 sub $0x18,%esp
if (!hCond ){
efb: 83 7d 08 00 cmpl $0x0,0x8(%ebp)
eff: 75 07 jne f08 <hoare_cond_dealloc+0x13>
return -1;
f01: b8 ff ff ff ff mov $0xffffffff,%eax
f06: eb 35 jmp f3d <hoare_cond_dealloc+0x48>
}
kthread_mutex_unlock(hCond->mutexCV);
f08: 8b 45 08 mov 0x8(%ebp),%eax
f0b: 8b 00 mov (%eax),%eax
f0d: 89 04 24 mov %eax,(%esp)
f10: e8 de f5 ff ff call 4f3 <kthread_mutex_unlock>
if( kthread_mutex_dealloc(hCond->mutexCV) <0)
f15: 8b 45 08 mov 0x8(%ebp),%eax
f18: 8b 00 mov (%eax),%eax
f1a: 89 04 24 mov %eax,(%esp)
f1d: e8 c1 f5 ff ff call 4e3 <kthread_mutex_dealloc>
f22: 85 c0 test %eax,%eax
f24: 79 07 jns f2d <hoare_cond_dealloc+0x38>
return -1;
f26: b8 ff ff ff ff mov $0xffffffff,%eax
f2b: eb 10 jmp f3d <hoare_cond_dealloc+0x48>
free (hCond);
f2d: 8b 45 08 mov 0x8(%ebp),%eax
f30: 89 04 24 mov %eax,(%esp)
f33: e8 5e f8 ff ff call 796 <free>
return 0;
f38: b8 00 00 00 00 mov $0x0,%eax
}
f3d: c9 leave
f3e: c3 ret
00000f3f <hoare_cond_wait>:
int hoare_cond_wait(hoare_cond_t* hCond, int mutex_id){
f3f: 55 push %ebp
f40: 89 e5 mov %esp,%ebp
f42: 83 ec 18 sub $0x18,%esp
if (!hCond){
f45: 83 7d 08 00 cmpl $0x0,0x8(%ebp)
f49: 75 07 jne f52 <hoare_cond_wait+0x13>
return -1;
f4b: b8 ff ff ff ff mov $0xffffffff,%eax
f50: eb 42 jmp f94 <hoare_cond_wait+0x55>
}
hCond->waitinCount++;
f52: 8b 45 08 mov 0x8(%ebp),%eax
f55: 8b 40 04 mov 0x4(%eax),%eax
f58: 8d 50 01 lea 0x1(%eax),%edx
f5b: 8b 45 08 mov 0x8(%ebp),%eax
f5e: 89 50 04 mov %edx,0x4(%eax)
if ( kthread_mutex_yieldlock(mutex_id, hCond->mutexCV)<0)
f61: 8b 45 08 mov 0x8(%ebp),%eax
f64: 8b 00 mov (%eax),%eax
f66: 89 44 24 04 mov %eax,0x4(%esp)
f6a: 8b 45 0c mov 0xc(%ebp),%eax
f6d: 89 04 24 mov %eax,(%esp)
f70: e8 86 f5 ff ff call 4fb <kthread_mutex_yieldlock>
f75: 85 c0 test %eax,%eax
f77: 79 16 jns f8f <hoare_cond_wait+0x50>
{
hCond->waitinCount--;
f79: 8b 45 08 mov 0x8(%ebp),%eax
f7c: 8b 40 04 mov 0x4(%eax),%eax
f7f: 8d 50 ff lea -0x1(%eax),%edx
f82: 8b 45 08 mov 0x8(%ebp),%eax
f85: 89 50 04 mov %edx,0x4(%eax)
return -1;
f88: b8 ff ff ff ff mov $0xffffffff,%eax
f8d: eb 05 jmp f94 <hoare_cond_wait+0x55>
}
return 0;
f8f: b8 00 00 00 00 mov $0x0,%eax
}
f94: c9 leave
f95: c3 ret
00000f96 <hoare_cond_signal>:
int hoare_cond_signal(hoare_cond_t* hCond, int mutex_id)
{
f96: 55 push %ebp
f97: 89 e5 mov %esp,%ebp
f99: 83 ec 18 sub $0x18,%esp
if (!hCond){
f9c: 83 7d 08 00 cmpl $0x0,0x8(%ebp)
fa0: 75 07 jne fa9 <hoare_cond_signal+0x13>
return -1;
fa2: b8 ff ff ff ff mov $0xffffffff,%eax
fa7: eb 6b jmp 1014 <hoare_cond_signal+0x7e>
}
if ( hCond->waitinCount >0){
fa9: 8b 45 08 mov 0x8(%ebp),%eax
fac: 8b 40 04 mov 0x4(%eax),%eax
faf: 85 c0 test %eax,%eax
fb1: 7e 3d jle ff0 <hoare_cond_signal+0x5a>
hCond->waitinCount--;
fb3: 8b 45 08 mov 0x8(%ebp),%eax
fb6: 8b 40 04 mov 0x4(%eax),%eax
fb9: 8d 50 ff lea -0x1(%eax),%edx
fbc: 8b 45 08 mov 0x8(%ebp),%eax
fbf: 89 50 04 mov %edx,0x4(%eax)
if (kthread_mutex_yieldlock(mutex_id, hCond->mutexCV)<0){
fc2: 8b 45 08 mov 0x8(%ebp),%eax
fc5: 8b 00 mov (%eax),%eax
fc7: 89 44 24 04 mov %eax,0x4(%esp)
fcb: 8b 45 0c mov 0xc(%ebp),%eax
fce: 89 04 24 mov %eax,(%esp)
fd1: e8 25 f5 ff ff call 4fb <kthread_mutex_yieldlock>
fd6: 85 c0 test %eax,%eax
fd8: 79 16 jns ff0 <hoare_cond_signal+0x5a>
hCond->waitinCount++;
fda: 8b 45 08 mov 0x8(%ebp),%eax
fdd: 8b 40 04 mov 0x4(%eax),%eax
fe0: 8d 50 01 lea 0x1(%eax),%edx
fe3: 8b 45 08 mov 0x8(%ebp),%eax
fe6: 89 50 04 mov %edx,0x4(%eax)
return -1;
fe9: b8 ff ff ff ff mov $0xffffffff,%eax
fee: eb 24 jmp 1014 <hoare_cond_signal+0x7e>
}
}
if (kthread_mutex_yieldlock(mutex_id, hCond->mutexCV)<0){
ff0: 8b 45 08 mov 0x8(%ebp),%eax
ff3: 8b 00 mov (%eax),%eax
ff5: 89 44 24 04 mov %eax,0x4(%esp)
ff9: 8b 45 0c mov 0xc(%ebp),%eax
ffc: 89 04 24 mov %eax,(%esp)
fff: e8 f7 f4 ff ff call 4fb <kthread_mutex_yieldlock>
1004: 85 c0 test %eax,%eax
1006: 79 07 jns 100f <hoare_cond_signal+0x79>
return -1;
1008: b8 ff ff ff ff mov $0xffffffff,%eax
100d: eb 05 jmp 1014 <hoare_cond_signal+0x7e>
}
return 0;
100f: b8 00 00 00 00 mov $0x0,%eax
}
1014: c9 leave
1015: c3 ret
00001016 <mesa_cond_alloc>:
#include "mesa_cond.h"
#include "types.h"
#include "stat.h"
#include "user.h"
mesa_cond_t* mesa_cond_alloc(){
1016: 55 push %ebp
1017: 89 e5 mov %esp,%ebp
1019: 83 ec 28 sub $0x28,%esp
int cvMutex= kthread_mutex_alloc();
101c: e8 ba f4 ff ff call 4db <kthread_mutex_alloc>
1021: 89 45 f4 mov %eax,-0xc(%ebp)
if (cvMutex<0)
1024: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
1028: 79 07 jns 1031 <mesa_cond_alloc+0x1b>
return 0;
102a: b8 00 00 00 00 mov $0x0,%eax
102f: eb 24 jmp 1055 <mesa_cond_alloc+0x3f>
mesa_cond_t *mcond = malloc( sizeof (mesa_cond_t)) ;
1031: c7 04 24 08 00 00 00 movl $0x8,(%esp)
1038: e8 92 f8 ff ff call 8cf <malloc>
103d: 89 45 f0 mov %eax,-0x10(%ebp)
mcond->mutexCV=cvMutex;
1040: 8b 45 f0 mov -0x10(%ebp),%eax
1043: 8b 55 f4 mov -0xc(%ebp),%edx
1046: 89 10 mov %edx,(%eax)
mcond->waitinCount=0;
1048: 8b 45 f0 mov -0x10(%ebp),%eax
104b: c7 40 04 00 00 00 00 movl $0x0,0x4(%eax)
return mcond;
1052: 8b 45 f0 mov -0x10(%ebp),%eax
}
1055: c9 leave
1056: c3 ret
00001057 <mesa_cond_dealloc>:
int mesa_cond_dealloc(mesa_cond_t* mCond){
1057: 55 push %ebp
1058: 89 e5 mov %esp,%ebp
105a: 83 ec 18 sub $0x18,%esp
if (!mCond ){
105d: 83 7d 08 00 cmpl $0x0,0x8(%ebp)
1061: 75 07 jne 106a <mesa_cond_dealloc+0x13>
return -1;
1063: b8 ff ff ff ff mov $0xffffffff,%eax
1068: eb 35 jmp 109f <mesa_cond_dealloc+0x48>
}
kthread_mutex_unlock(mCond->mutexCV);
106a: 8b 45 08 mov 0x8(%ebp),%eax
106d: 8b 00 mov (%eax),%eax
106f: 89 04 24 mov %eax,(%esp)
1072: e8 7c f4 ff ff call 4f3 <kthread_mutex_unlock>
if( kthread_mutex_dealloc(mCond->mutexCV) <0)
1077: 8b 45 08 mov 0x8(%ebp),%eax
107a: 8b 00 mov (%eax),%eax
107c: 89 04 24 mov %eax,(%esp)
107f: e8 5f f4 ff ff call 4e3 <kthread_mutex_dealloc>
1084: 85 c0 test %eax,%eax
1086: 79 07 jns 108f <mesa_cond_dealloc+0x38>
return -1;
1088: b8 ff ff ff ff mov $0xffffffff,%eax
108d: eb 10 jmp 109f <mesa_cond_dealloc+0x48>
free (mCond);
108f: 8b 45 08 mov 0x8(%ebp),%eax
1092: 89 04 24 mov %eax,(%esp)
1095: e8 fc f6 ff ff call 796 <free>
return 0;
109a: b8 00 00 00 00 mov $0x0,%eax
}
109f: c9 leave
10a0: c3 ret
000010a1 <mesa_cond_wait>:
int mesa_cond_wait(mesa_cond_t* mCond,int mutex_id){
10a1: 55 push %ebp
10a2: 89 e5 mov %esp,%ebp
10a4: 83 ec 18 sub $0x18,%esp
if (!mCond){
10a7: 83 7d 08 00 cmpl $0x0,0x8(%ebp)
10ab: 75 07 jne 10b4 <mesa_cond_wait+0x13>
return -1;
10ad: b8 ff ff ff ff mov $0xffffffff,%eax
10b2: eb 55 jmp 1109 <mesa_cond_wait+0x68>
}
mCond->waitinCount++;
10b4: 8b 45 08 mov 0x8(%ebp),%eax
10b7: 8b 40 04 mov 0x4(%eax),%eax
10ba: 8d 50 01 lea 0x1(%eax),%edx
10bd: 8b 45 08 mov 0x8(%ebp),%eax
10c0: 89 50 04 mov %edx,0x4(%eax)
if (kthread_mutex_unlock(mutex_id)<0 &&
10c3: 8b 45 0c mov 0xc(%ebp),%eax
10c6: 89 04 24 mov %eax,(%esp)
10c9: e8 25 f4 ff ff call 4f3 <kthread_mutex_unlock>
10ce: 85 c0 test %eax,%eax
10d0: 79 27 jns 10f9 <mesa_cond_wait+0x58>
kthread_mutex_lock(mCond->mutexCV)<0)
10d2: 8b 45 08 mov 0x8(%ebp),%eax
10d5: 8b 00 mov (%eax),%eax
10d7: 89 04 24 mov %eax,(%esp)
10da: e8 0c f4 ff ff call 4eb <kthread_mutex_lock>
if (!mCond){
return -1;
}
mCond->waitinCount++;
if (kthread_mutex_unlock(mutex_id)<0 &&
10df: 85 c0 test %eax,%eax
10e1: 79 16 jns 10f9 <mesa_cond_wait+0x58>
kthread_mutex_lock(mCond->mutexCV)<0)
{
mCond->waitinCount--;
10e3: 8b 45 08 mov 0x8(%ebp),%eax
10e6: 8b 40 04 mov 0x4(%eax),%eax
10e9: 8d 50 ff lea -0x1(%eax),%edx
10ec: 8b 45 08 mov 0x8(%ebp),%eax
10ef: 89 50 04 mov %edx,0x4(%eax)
return -1;
10f2: b8 ff ff ff ff mov $0xffffffff,%eax
10f7: eb 10 jmp 1109 <mesa_cond_wait+0x68>
}
kthread_mutex_lock(mutex_id);
10f9: 8b 45 0c mov 0xc(%ebp),%eax
10fc: 89 04 24 mov %eax,(%esp)
10ff: e8 e7 f3 ff ff call 4eb <kthread_mutex_lock>
return 0;
1104: b8 00 00 00 00 mov $0x0,%eax
}
1109: c9 leave
110a: c3 ret
0000110b <mesa_cond_signal>:
int mesa_cond_signal(mesa_cond_t* mCond){
110b: 55 push %ebp
110c: 89 e5 mov %esp,%ebp
110e: 83 ec 18 sub $0x18,%esp
if (!mCond){
1111: 83 7d 08 00 cmpl $0x0,0x8(%ebp)
1115: 75 07 jne 111e <mesa_cond_signal+0x13>
return -1;
1117: b8 ff ff ff ff mov $0xffffffff,%eax
111c: eb 5d jmp 117b <mesa_cond_signal+0x70>
}
if (mCond->waitinCount>0){
111e: 8b 45 08 mov 0x8(%ebp),%eax
1121: 8b 40 04 mov 0x4(%eax),%eax
1124: 85 c0 test %eax,%eax
1126: 7e 36 jle 115e <mesa_cond_signal+0x53>
mCond->waitinCount --;
1128: 8b 45 08 mov 0x8(%ebp),%eax
112b: 8b 40 04 mov 0x4(%eax),%eax
112e: 8d 50 ff lea -0x1(%eax),%edx
1131: 8b 45 08 mov 0x8(%ebp),%eax
1134: 89 50 04 mov %edx,0x4(%eax)
if (kthread_mutex_unlock(mCond->mutexCV)>=0){
1137: 8b 45 08 mov 0x8(%ebp),%eax
113a: 8b 00 mov (%eax),%eax
113c: 89 04 24 mov %eax,(%esp)
113f: e8 af f3 ff ff call 4f3 <kthread_mutex_unlock>
1144: 85 c0 test %eax,%eax
1146: 78 16 js 115e <mesa_cond_signal+0x53>
mCond->waitinCount ++;
1148: 8b 45 08 mov 0x8(%ebp),%eax
114b: 8b 40 04 mov 0x4(%eax),%eax
114e: 8d 50 01 lea 0x1(%eax),%edx
1151: 8b 45 08 mov 0x8(%ebp),%eax
1154: 89 50 04 mov %edx,0x4(%eax)
return -1;
1157: b8 ff ff ff ff mov $0xffffffff,%eax
115c: eb 1d jmp 117b <mesa_cond_signal+0x70>
}
}
if (kthread_mutex_unlock(mCond->mutexCV)<0){
115e: 8b 45 08 mov 0x8(%ebp),%eax
1161: 8b 00 mov (%eax),%eax
1163: 89 04 24 mov %eax,(%esp)
1166: e8 88 f3 ff ff call 4f3 <kthread_mutex_unlock>
116b: 85 c0 test %eax,%eax
116d: 79 07 jns 1176 <mesa_cond_signal+0x6b>
return -1;
116f: b8 ff ff ff ff mov $0xffffffff,%eax
1174: eb 05 jmp 117b <mesa_cond_signal+0x70>
}
return 0;
1176: b8 00 00 00 00 mov $0x0,%eax
}
117b: c9 leave
117c: c3 ret
| 37.679321 | 80 | 0.444498 |
eac986ce826800f74dc80d15d8eb484966d5bb85 | 397 | asm | Assembly | libsrc/_DEVELOPMENT/arch/zx/bifrost_h/z80/asm_BIFROSTH_enableSprites.asm | teknoplop/z88dk | bb03fbfd6b2ab0f397a1358559089f9cd3706485 | [
"ClArtistic"
] | null | null | null | libsrc/_DEVELOPMENT/arch/zx/bifrost_h/z80/asm_BIFROSTH_enableSprites.asm | teknoplop/z88dk | bb03fbfd6b2ab0f397a1358559089f9cd3706485 | [
"ClArtistic"
] | null | null | null | libsrc/_DEVELOPMENT/arch/zx/bifrost_h/z80/asm_BIFROSTH_enableSprites.asm | teknoplop/z88dk | bb03fbfd6b2ab0f397a1358559089f9cd3706485 | [
"ClArtistic"
] | 1 | 2019-12-03T23:57:48.000Z | 2019-12-03T23:57:48.000Z | ; ----------------------------------------------------------------
; Z88DK INTERFACE LIBRARY FOR THE BIFROST* ENGINE - RELEASE 1.2/L
;
; See "bifrost_h.h" for further details
; ----------------------------------------------------------------
SECTION code_clib
SECTION code_bifrost_h
PUBLIC asm_BIFROSTH_enableSprites
asm_BIFROSTH_enableSprites:
ld hl,58054
ld (59040),hl
ret
| 23.352941 | 66 | 0.493703 |
86d6da095a95be75b1ce83f3995d87160d1fa4d3 | 2,220 | asm | Assembly | ASC/mips1.asm | ParaschivAlex/FMI-Thangs | 26d8a13b08344744ee6ab56f088dd4adb665980e | [
"MIT"
] | null | null | null | ASC/mips1.asm | ParaschivAlex/FMI-Thangs | 26d8a13b08344744ee6ab56f088dd4adb665980e | [
"MIT"
] | null | null | null | ASC/mips1.asm | ParaschivAlex/FMI-Thangs | 26d8a13b08344744ee6ab56f088dd4adb665980e | [
"MIT"
] | null | null | null | .data
v: .word 1, 2, 4, 5
n: .word 4
x: .word 2
t: .word 16
.text
main:
lw $t0, t
lw $t1, x
lw $t2, n
la $t3, v
li $t4, 0 # suma totala
li $t5, 0 # i-ul
subu $sp, $sp, 4
sw $t0, 0($sp)
subu $sp, $sp, 4
sw $t1, 0($sp)
subu $sp, $sp, 4
sw $t2, 0($sp)
subu $sp, $sp, 4
sw $t3, 0($sp)
subu $sp, $sp, 4
sw $t4, 0($sp)
subu $sp, $sp, 4
sw $t5, 0($sp)
# $sp: (i)(s)(v)(n)(x)(t)
jal eval
addu $sp, $sp, 24
move $a0, $v1
li $v0, 1
syscall
li $v0, 10
syscall
eval:
subu $sp, $sp, 4
sw $fp, 0($sp)
addu $fp, $sp, 12
subu $sp, $sp, 4
sw $ra, 0($sp)
# $sp: ($ra)($fpv)(i)(s)fp:(v)(n)(x)(t)
subu $sp, $sp, 4
sw $s0, 0($sp)
subu $sp, $sp, 4
sw $s1, 0($sp)
subu $sp, $sp, 4
sw $s2, 0($sp)
subu $sp, $sp, 4
sw $s3, 0($sp)
subu $sp, $sp, 4
sw $s4, 0($sp)
subu $sp, $sp, 4
sw $s5, 0($sp)
subu $sp, $sp, 4
sw $s6, 0($sp)
# $sp: (s6v)(s5v)(s4v)(s3v)(s2v)(s1v)(s0v)(ra)(fpv)(i)(s)fp:(v)(n)(x)(t)
lw $s0, 0($fp) # v
lw $s1, 4($fp) # n
lw $s2, 8($fp) # x
lw $s3, 12($fp) # t
lw $s4, -4($fp) # suma totala
lw $s5, -8($fp) # i-ul curent
li $s6, 0 # elem. curent
calculeaza_suma:
beq $s1, $s5, oprire
subu $sp, $sp, 4
lw $s6, 0($s0)
sw $s6, 0($sp)
subu $sp, $sp, 4
sw $s3, 0($sp)
jal este_putere
addu $sp, $sp, 8 # (s7v)(s6v)(s5v)(s4v)(s3v)(s2v)(s1v)(s0v)(ra)(fpv)(i)(s)fp:(v)(n)(x)(t)
beq $v0, 1, altfel
lw $s6, 0($s0)
mul $s6, $s6, $s2
addu $s6, $s6, 1
addu $s4, $s4, $s6 # cresc suma
addu $s5, $s5, 1 # cresc i-ul
addu $s0, $s0, 4 # urmatorul element din vector
j calculeaza_suma
altfel:
addu $s5, $s5, 1
addu $s0, $s0, 4
j calculeaza_suma
oprire:
lw $s7, -48($fp)
lw $s6, -44($fp)
lw $s5, -40($fp)
lw $s4, -36($fp)
lw $s3, -32($fp)
lw $s2, -28($fp)
lw $s1, -24($fp)
lw $s0, -20($fp)
lw $ra, -16($fp)
lw $fp, -12($fp)
jr $ra
este_putere:
subu $sp, $sp, 4
sw $fp, 0($sp)
addu $fp, $sp, 64
subu $sp, $sp, 4
sw $ra, 0($sp) # (rav2)(fpv2)fp2:(v)(t)(s7v)(s6v)(s5v)(s4v)(s3v)(s2v)(s1v)(s0v)(ra)(fpv)(i)(s)fp:(v)(n)(x)(t)
subu $sp, $sp, 4
sw $s0, 0($sp)
subu $sp, $sp, 4
sw $s1, 0($sp)
lw $s0, 0($fp)
lw $s1, 4($fp)
move $a0, $s0
li $v0, 1
syscall
move $a0, $s1
li $v0, 1
syscall
li $v0, 10
syscall
| 15.744681 | 110 | 0.49955 |
f66105257961808c924f23270c318172f3382b09 | 100 | asm | Assembly | src/simple-loop.asm | brgmnn/uob-cpu-simulator | e2a5367974e2712013409c7601274927d4023902 | [
"MIT"
] | null | null | null | src/simple-loop.asm | brgmnn/uob-cpu-simulator | e2a5367974e2712013409c7601274927d4023902 | [
"MIT"
] | null | null | null | src/simple-loop.asm | brgmnn/uob-cpu-simulator | e2a5367974e2712013409c7601274927d4023902 | [
"MIT"
] | null | null | null | # this is a comment
mov r0,#10
mov r1,#1
loop1:
sub r0,r0,#1
add r2,r2,r1
br r0,$loop1
halt
| 9.090909 | 19 | 0.62 |
f5ff14d95004a1edd80eb30bd73a51554722c0e9 | 841 | asm | Assembly | programs/oeis/004/A004972.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/004/A004972.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/004/A004972.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A004972: a(n) = ceiling(n*phi^17), where phi is the golden ratio, A001622.
; 0,3572,7143,10714,14285,17856,21427,24998,28569,32140,35711,39282,42853,46424,49995,53566,57137,60708,64279,67850,71421,74992,78563,82134,85705,89276,92847,96418,99989,103560,107131,110702,114273,117844,121415,124986,128557,132128,135699,139270,142841,146412,149983,153554,157125,160696,164267,167838,171409,174980,178551,182122,185693,189264,192835,196406,199977,203548,207119,210690,214261,217832,221403,224974,228545,232116,235687,239258,242829,246400,249971,253542,257113,260684,264255,267826,271397,274968,278539,282110,285681,289252,292823,296394,299965,303536,307107,310678,314249,317820,321391,324962,328533,332104,335675,339246,342817,346388,349959,353530
mov $2,$0
add $2,$0
mul $2,3571
lpb $2
mov $1,$2
add $1,2
mov $2,1
lpe
div $1,2
mov $0,$1
| 60.071429 | 666 | 0.794293 |
eb66e4dfbb8c5787e79b5167d37c0c8acd8538ba | 86 | asm | Assembly | gfx/pokemon/goldeen/anim.asm | Dev727/ancientplatinum | 8b212a1728cc32a95743e1538b9eaa0827d013a7 | [
"blessing"
] | 28 | 2019-11-08T07:19:00.000Z | 2021-12-20T10:17:54.000Z | gfx/pokemon/goldeen/anim.asm | Dev727/ancientplatinum | 8b212a1728cc32a95743e1538b9eaa0827d013a7 | [
"blessing"
] | 13 | 2020-01-11T17:00:40.000Z | 2021-09-14T01:27:38.000Z | gfx/pokemon/goldeen/anim.asm | Dev727/ancientplatinum | 8b212a1728cc32a95743e1538b9eaa0827d013a7 | [
"blessing"
] | 22 | 2020-05-28T17:31:38.000Z | 2022-03-07T20:49:35.000Z | frame 1, 30
frame 0, 16
setrepeat 4
frame 2, 12
frame 0, 12
dorepeat 3
endanim
| 10.75 | 12 | 0.674419 |
23b3c2a9c64f58796560fba5624b788d49de5f34 | 397 | asm | Assembly | programs/oeis/024/A024025.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/024/A024025.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/024/A024025.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A024025: a(n) = 3^n-n^2.
; 1,2,5,18,65,218,693,2138,6497,19602,58949,177026,531297,1594154,4782773,14348682,43046465,129139874,387420165,1162261106,3486784001,10460352762,31381059125,94143178298,282429535905,847288608818,2541865827653,7625597484258,22876792454177,68630377364042,205891132093749,617673396282986,1853020188850817,5559060566554434
mov $1,3
pow $1,$0
mov $2,$0
mul $2,$0
sub $1,$2
| 44.111111 | 319 | 0.811083 |
7fe63b090e8ee8a57f3f5989f92c025371f5d72a | 672 | asm | Assembly | programs/oeis/091/A091297.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/091/A091297.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/091/A091297.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A091297: A fixed point of the morphism 0 -> 02, 1 -> 02, 2 -> 11, starting from 0.
; 0,2,1,1,0,2,0,2,0,2,1,1,0,2,1,1,0,2,1,1,0,2,0,2,0,2,1,1,0,2,0,2,0,2,1,1,0,2,0,2,0,2,1,1,0,2,1,1,0,2,1,1,0,2,0,2,0,2,1,1,0,2,1,1,0,2,1,1,0,2,0,2,0,2,1,1,0,2,1,1,0,2,1,1,0,2,0,2,0,2,1,1,0,2,0,2,0,2,1,1,0,2,0,2,0,2,1,1,0,2,1,1,0,2,1,1,0,2,0,2,0,2,1,1,0,2,0,2,0,2,1,1,0,2,0,2,0,2,1,1,0,2,1,1,0,2,1,1,0,2,0,2,0,2,1,1,0,2,0,2,0,2,1,1,0,2,0,2,0,2,1,1,0,2,1,1,0,2,1,1,0,2,0,2,0,2,1,1,0,2,1,1,0,2,1,1,0,2,0,2,0,2,1,1,0,2,1,1,0,2,1,1,0,2,0,2,0,2,1,1,0,2,0,2,0,2,1,1,0,2,0,2,0,2,1,1,0,2,1,1,0,2,1,1,0,2,0,2,0,2
add $0,2
cal $0,171900 ; Backwards van Eck transform of A010060.
mov $1,$0
sub $1,1
| 84 | 501 | 0.537202 |
77bf121f225e0b6f63bc155538b8891f11ff7940 | 689 | asm | Assembly | programs/oeis/288/A288204.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/288/A288204.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/288/A288204.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A288204: Positions of 0 in A288203; complement of A288205.
; 1,2,4,5,7,8,9,11,12,14,15,16,18,19,20,22,23,24,26,27,29,30,31,33,34,35,37,38,39,41,42,43,45,46,47,49,50,51,53,54,55,57,58,60,61,62,64,65,66,68,69,70,72,73,74,76,77,78,80,81,82,84,85,86,88,89,90,92,93,94,96,97,98,100,101,102,104,105,106,108,109,110,112,113,114,116,117,118,120,121,123,124,125,127,128,129,131,132,133,135
mov $3,$0
add $3,1
mov $4,$0
lpb $3
mov $0,$4
sub $3,1
sub $0,$3
mov $5,2
mov $6,$0
lpb $0
mul $0,2
sub $0,1
add $6,1
trn $0,$6
mov $5,$6
lpe
mov $2,$7
add $2,2
mul $5,2
gcd $5,6
mul $5,$2
sub $5,6
pow $5,3
div $5,216
add $5,1
add $1,$5
lpe
mov $0,$1
| 21.53125 | 321 | 0.584906 |
6d0a22c7341447cc76e441c355fbf39d7fb0cbb9 | 5,418 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0x48_notsx.log_21829_283.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0x48_notsx.log_21829_283.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0x48_notsx.log_21829_283.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r12
push %r8
push %rax
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_normal_ht+0xb23e, %r12
sub %rdi, %rdi
mov (%r12), %rdx
nop
inc %rax
lea addresses_normal_ht+0x14b0e, %rsi
lea addresses_UC_ht+0xf78e, %rdi
nop
nop
xor %r10, %r10
mov $81, %rcx
rep movsq
cmp $17717, %rdx
lea addresses_UC_ht+0x1c1a0, %rsi
lea addresses_normal_ht+0x1bb0e, %rdi
nop
nop
nop
cmp %r8, %r8
mov $5, %rcx
rep movsq
nop
nop
nop
add %rax, %rax
lea addresses_WT_ht+0x1e464, %r10
cmp %r12, %r12
movb (%r10), %r8b
nop
nop
nop
nop
nop
xor $28516, %rax
lea addresses_A_ht+0x950e, %r12
nop
nop
nop
nop
nop
add $40274, %r8
movups (%r12), %xmm1
vpextrq $0, %xmm1, %rdx
nop
inc %r8
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rax
pop %r8
pop %r12
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r12
push %r14
push %rbx
push %rcx
push %rdi
push %rdx
// Store
lea addresses_WT+0xc9d6, %r10
nop
nop
nop
nop
nop
and $56177, %rdi
movw $0x5152, (%r10)
nop
nop
xor %r12, %r12
// Faulty Load
lea addresses_UC+0x1970e, %r14
nop
nop
nop
nop
nop
inc %rcx
movups (%r14), %xmm6
vpextrq $0, %xmm6, %rdx
lea oracles, %rcx
and $0xff, %rdx
shlq $12, %rdx
mov (%rcx,%rdx,1), %rdx
pop %rdx
pop %rdi
pop %rcx
pop %rbx
pop %r14
pop %r12
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 16, 'type': 'addresses_UC', 'congruent': 0}}
{'dst': {'same': False, 'NT': False, 'AVXalign': True, 'size': 2, 'type': 'addresses_WT', 'congruent': 3}, 'OP': 'STOR'}
[Faulty Load]
{'OP': 'LOAD', 'src': {'same': True, 'NT': False, 'AVXalign': False, 'size': 16, 'type': 'addresses_UC', 'congruent': 0}}
<gen_prepare_buffer>
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 8, 'type': 'addresses_normal_ht', 'congruent': 4}}
{'dst': {'same': False, 'congruent': 5, 'type': 'addresses_UC_ht'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 10, 'type': 'addresses_normal_ht'}}
{'dst': {'same': True, 'congruent': 10, 'type': 'addresses_normal_ht'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 0, 'type': 'addresses_UC_ht'}}
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 1, 'type': 'addresses_WT_ht', 'congruent': 1}}
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 16, 'type': 'addresses_A_ht', 'congruent': 8}}
{'37': 21829}
37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37 37
*/
| 42.328125 | 2,999 | 0.660022 |
b06c3f889583b6ad65d58dd14b7216b2cb2792ca | 6,814 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0x48.log_21829_536.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0x48.log_21829_536.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0x48.log_21829_536.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r11
push %r13
push %r8
push %rax
push %rcx
push %rdi
push %rsi
lea addresses_D_ht+0x2450, %rsi
lea addresses_normal_ht+0x19102, %rdi
nop
nop
nop
add %r10, %r10
mov $48, %rcx
rep movsq
nop
nop
nop
nop
inc %r10
lea addresses_UC_ht+0x1187c, %r11
nop
nop
nop
nop
nop
and $37975, %r8
mov $0x6162636465666768, %rax
movq %rax, %xmm5
and $0xffffffffffffffc0, %r11
movaps %xmm5, (%r11)
nop
nop
inc %r10
lea addresses_WT_ht+0xa102, %r8
clflush (%r8)
sub %rsi, %rsi
mov (%r8), %r11d
nop
add $50553, %rax
lea addresses_WC_ht+0x1ac82, %r10
nop
xor $8149, %rcx
movl $0x61626364, (%r10)
nop
nop
nop
nop
nop
and %rdi, %rdi
lea addresses_WT_ht+0xa302, %rcx
nop
nop
nop
nop
add %rsi, %rsi
vmovups (%rcx), %ymm4
vextracti128 $1, %ymm4, %xmm4
vpextrq $0, %xmm4, %r10
nop
nop
nop
xor $41957, %rsi
lea addresses_WC_ht+0x1cd42, %rsi
lea addresses_A_ht+0x12582, %rdi
nop
nop
nop
nop
nop
xor %r8, %r8
mov $56, %rcx
rep movsq
nop
nop
sub $33675, %r10
lea addresses_D_ht+0xc492, %rsi
nop
nop
nop
nop
sub $39221, %rdi
movups (%rsi), %xmm1
vpextrq $1, %xmm1, %rcx
nop
nop
cmp $48337, %rax
lea addresses_WC_ht+0x63fe, %r8
clflush (%r8)
nop
nop
and %rax, %rax
mov (%r8), %cx
dec %r10
lea addresses_WC_ht+0xe38a, %rsi
lea addresses_D_ht+0x18f02, %rdi
nop
nop
nop
nop
nop
dec %r13
mov $100, %rcx
rep movsw
nop
nop
sub $60753, %r10
pop %rsi
pop %rdi
pop %rcx
pop %rax
pop %r8
pop %r13
pop %r11
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r12
push %r13
push %rax
push %rbx
push %rdx
push %rsi
// Load
lea addresses_UC+0x1e349, %rsi
nop
nop
nop
nop
and $39120, %r10
mov (%rsi), %rax
nop
xor %r10, %r10
// Store
lea addresses_PSE+0x1aeaa, %r12
nop
nop
nop
nop
nop
and %r13, %r13
movb $0x51, (%r12)
add %rsi, %rsi
// Faulty Load
lea addresses_RW+0x9b02, %r13
nop
xor %r10, %r10
vmovups (%r13), %ymm3
vextracti128 $1, %ymm3, %xmm3
vpextrq $1, %xmm3, %r12
lea oracles, %r13
and $0xff, %r12
shlq $12, %r12
mov (%r13,%r12,1), %r12
pop %rsi
pop %rdx
pop %rbx
pop %rax
pop %r13
pop %r12
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_RW', 'AVXalign': True, 'congruent': 0, 'size': 8, 'same': False, 'NT': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_UC', 'AVXalign': False, 'congruent': 0, 'size': 8, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_PSE', 'AVXalign': False, 'congruent': 2, 'size': 1, 'same': False, 'NT': True}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_RW', 'AVXalign': False, 'congruent': 0, 'size': 32, 'same': True, 'NT': False}}
<gen_prepare_buffer>
{'OP': 'REPM', 'src': {'type': 'addresses_D_ht', 'congruent': 0, 'same': False}, 'dst': {'type': 'addresses_normal_ht', 'congruent': 8, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC_ht', 'AVXalign': True, 'congruent': 1, 'size': 16, 'same': False, 'NT': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WT_ht', 'AVXalign': False, 'congruent': 9, 'size': 4, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WC_ht', 'AVXalign': False, 'congruent': 7, 'size': 4, 'same': True, 'NT': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WT_ht', 'AVXalign': False, 'congruent': 10, 'size': 32, 'same': False, 'NT': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_WC_ht', 'congruent': 5, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 5, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_D_ht', 'AVXalign': False, 'congruent': 3, 'size': 16, 'same': False, 'NT': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WC_ht', 'AVXalign': False, 'congruent': 2, 'size': 2, 'same': False, 'NT': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_WC_ht', 'congruent': 1, 'same': False}, 'dst': {'type': 'addresses_D_ht', 'congruent': 10, 'same': False}}
{'32': 21829}
32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32
*/
| 35.123711 | 2,999 | 0.65703 |
6a56f8e21fb3b003a6ed7dbd7fc95459467a24d7 | 558 | asm | Assembly | libsrc/graphics/draw.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 38 | 2021-06-18T12:56:15.000Z | 2022-03-12T20:38:40.000Z | libsrc/graphics/draw.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 2 | 2021-06-20T16:28:12.000Z | 2021-11-17T21:33:56.000Z | libsrc/graphics/draw.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 6 | 2021-06-18T18:18:36.000Z | 2021-12-22T08:01:32.000Z | ;
; Z88 Graphics Functions - Small C+ stubs
;
; Written around the Interlogic Standard Library
;
; Stubs Written by D Morris - 30/9/98
;
;
; $Id: draw.asm $
;
; CALLER LINKAGE FOR FUNCTION POINTERS
; ----- void draw(int x, int y, int x2, int y2)
SECTION code_graphics
PUBLIC draw
PUBLIC _draw
EXTERN draw_callee
EXTERN ASMDISP_DRAW_CALLEE
.draw
._draw
push ix
ld ix,2
add ix,sp
ld l,(ix+6) ;y0
ld h,(ix+8) ;x0
ld e,(ix+2) ;y1
ld d,(ix+4) ;x1
pop ix
jp draw_callee + ASMDISP_DRAW_CALLEE
| 14.684211 | 54 | 0.616487 |
370fb431c8ac2822464c1c42668acffa4427cd33 | 28,929 | asm | Assembly | Library/Kernel/Initfile/initfileHash.asm | steakknife/pcgeos | 95edd7fad36df400aba9bab1d56e154fc126044a | [
"Apache-2.0"
] | 504 | 2018-11-18T03:35:53.000Z | 2022-03-29T01:02:51.000Z | Library/Kernel/Initfile/initfileHash.asm | steakknife/pcgeos | 95edd7fad36df400aba9bab1d56e154fc126044a | [
"Apache-2.0"
] | 96 | 2018-11-19T21:06:50.000Z | 2022-03-06T10:26:48.000Z | Library/Kernel/Initfile/initfileHash.asm | steakknife/pcgeos | 95edd7fad36df400aba9bab1d56e154fc126044a | [
"Apache-2.0"
] | 73 | 2018-11-19T20:46:53.000Z | 2022-03-29T00:59:26.000Z | COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
(c) Copyright Geoworks 1996. All rights reserved.
GEOWORKS CONFIDENTIAL
PROJECT: Hash table module.
MODULE:
FILE: initfileHash.asm
AUTHOR: Jim Wood, Nov 8, 1996
ROUTINES:
Name Description
---- -----------
?? INT InitFileInitHashTable Create the hash table used to speed up ini
reads and writes.
?? INT HashProcessIniFile Process one ini file.
?? INT HashAddPrimaryEntry Hash a new category for the primary init
file
?? INT HashAddEntry Add an entry to the table.
?? INT HashCheckForCollision See if the category already in this element
is different than the one we're hashing.
?? INT HashDealWithCollision Deal with a collision when building the
table.
?? INT HashHashCat Get the hash value for the passed category
string.
?? INT HashGetNextCat Find the next category in the ini file.
?? INT HashCreateTable Create the chunk array for the table.
?? INT HashFindCategory Locates the given category.
?? INT HashRemoveCategory Remove the hash entry for a category
?? INT HashUpdateTblPtrs update all the chunk array element pointers
located after the element just deleted.
?? INT HashFindCategoryLow Locates the given category.
?? INT HashUpdateHashTable Update all of the hash table entries
located after the current pointer into the
file.
REVISION HISTORY:
Name Date Description
---- ---- -----------
jimw 11/ 8/96 Initial revision
DESCRIPTION:
$Id: initfileHash.asm,v 1.1 97/04/05 01:18:09 newdeal Exp $
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
if HASH_INIFILE
InitfileRead segment resource
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
InitFileInitHashTable
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Create the hash table used to speed up ini reads and writes.
CALLED BY: InitGeos
PASS: nothing
RETURN: nothing
DESTROYED: nothing
REVISION HISTORY:
Name Date Description
---- ---- -----------
jimw 11/ 8/96 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
InitFileInitHashTable proc far
uses ax,bx,cx,dx,si,di,bp, ds, es
.enter inherit
;
; Grab the ini file sem and get dgroup ( ds <- dgroup ).
;
call LoadVarSegDS_PInitFile
segmov es, ds ; es <- dgroup
;
; Allocate a block for the table.
;
call HashCreateTable ;bx <- blk, *ds:si <- array
mov es:[hashTableBlkHandle], bx
mov es:[hashTableChunkHandle], si
;
; Process each ini file.
;
clr di ; init file counter
iniFileLoop:
;
; Get the next ini block handle.
;
mov bx, es:[loaderVars][di].KLV_initFileBufHan
tst bx
jz cleanUp
;
; Process the file, then set up for getting next ini blk handle.
;
clr ax ; start at begining of file
call HashProcessIniFile
add di, size hptr
cmp di, (MAX_INI_FILES* size hptr)
jb iniFileLoop
cleanUp:
mov bx, es:[hashTableBlkHandle]
call MemUnlock
segmov ds, es ; ds <- dgroup
call VInitFile
.leave
ret
InitFileInitHashTable endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
HashProcessIniFile
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Process one ini file.
CALLED BY: InitFileInitHashTable
PASS: ^hbx = ini file block handle
*ds:si = hash table chunk array
es = dgroup
di = Offset into the KLV_initFileBufHan
variable. We use it as an offset into
any hash table entry we deal with as each element
can have ptrs into different ini buffers. See
initfileVariable.def and the definition of
InitFileHashEntry for more details.
ax = offset into the ini buffer where we want to start
processing. so that *(^hbx:ax) is where we should
start. This is 0 when building and something else
if we're writting something out.
RETURN: nothing
DESTROYED: nothing
REVISION HISTORY:
Name Date Description
---- ---- -----------
jimw 11/ 8/96 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
HashProcessIniFile proc near
; !!! MUST BE IDENTICAL to local vars in HashAddPrimaryEntry
tableSeg local sptr push ds
tableHandle local hptr push si
iniFileBlkHan local hptr push bx
iniFileBlkHanOffset local word push di
iniFileBufferOffset local word push ax
ForceRef tableSeg
ForceRef tableHandle
ForceRef iniFileBlkHan
ForceRef iniFileBlkHanOffset
uses ax,bx,cx,dx,si,di,bp, ds
.enter
;
; Lock the ini file block and save the segment.
;
call MemLock ; ax <- seg of ini file
mov ds, ax
mov es:[initFileBufSegAddr], ax
mov si, ss:[iniFileBufferOffset] ; ds:si <- ini file start
;
processNextCategory:
;
; Get the next cat string from the ini file, hash it, then add
; the entry to the table. Loop.
;
call HashGetNextCat ; ds:si <- category string
jc done
call HashHashCat ; dx <- table location
call HashAddEntry
jmp processNextCategory
done:
call MemUnlock
.leave
ret
HashProcessIniFile endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
HashAddPrimaryEntry
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Hash a new category for the primary init file
CALLED BY: CreateCategory
PASS: cx - near pointer to new category
es - dgroup
RETURN: nothing
DESTROYED: nothing
SIDE EFFECTS:
PSEUDO CODE/STRATEGY:
REVISION HISTORY:
Name Date Description
---- ---- -----------
EW 12/16/96 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
HashAddPrimaryEntry proc far
uses ax,bx,cx,dx,si,di,bp,ds
; !!! MUST BE IDENTICAL to local vars in HashProcessIniFile
tableSeg local sptr
tableHandle local hptr
iniFileBlkHan local hptr
iniFileBlkHanOffset local word
iniFileBufferOffset local word
ForceRef iniFileBlkHan
ForceRef iniFileBufferOffset
uses ax,bx,cx,dx,si,di,bp, ds
.enter
;
; we only write to the primary init file, which is offset 0
;
clr ss:[iniFileBlkHanOffset]
;
; get the hash block
;
mov bx, es:[hashTableBlkHandle]
mov si, es:[hashTableChunkHandle]
call MemLock
mov ss:[tableSeg], ax
mov ss:[tableHandle], si
;
; hash the category
;
mov ds, es:[initFileBufSegAddr]
mov si, cx ; ds:si = category
call HashHashCat ; dx <- table location
call HashAddEntry
.leave
ret
HashAddPrimaryEntry endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
HashAddEntry
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Add an entry to the table.
CALLED BY: HashProcessIniFile
PASS: bp = stackframe from HashProcessIniFile
tableSeg
tableHandle
initFileBlkHanOffset
si = nptr to category string in ini file
dx = table position
RETURN: nothing
DESTROYED: nothing
REVISION HISTORY:
Name Date Description
---- ---- -----------
jimw 11/ 8/96 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
HashAddEntry proc near
uses ax,bx,cx,dx,si,di,bp, ds
.enter inherit HashProcessIniFile
EC < Assert le dx, INITFILE_HASH_TABLE_SIZE >
EC < Assert stackFrame bp >
;
; Get the table in ds:si
;
mov cx, si ; cx <- nptr to category
mov ax, ss:[tableSeg]
mov ds, ax
mov si, ss:[tableHandle] ; *ds:si chunk array
;
; Load up the table entry. dx is the table entry number.
;
mov si, ds:[si] ; ds:si <- header
add si, offset IFHTH_table ; ds:si <- table
shl dx ; convert index to word sized
add si, dx ; ds:si <- entry location
;
; See if we already have an element.
;
tst {word}ds:[si]
jnz elementExists
;
; No element here yet. Create one and stick it in the table.
;
; mov bx, si
mov si, ss:[tableHandle] ; *ds:si <- chunk array
call ChunkArrayAppend ; di <- offset of element
segmov tableSeg, ds, ax
sub di, ds:[si] ; make offset relative to chunk
; ChunkArrayAppend might have caused the lmem block to move, so
; calculate the offset again
mov bx, ds:[si]
add bx, offset IFHTH_table
add bx, dx
mov ds:[bx], di ; store offset in hash table
add di, ds:[si] ; ds:di = new IFHE
jmp haveElement
elementExists:
;
; See if this is a collision or just a duplicate category in a
; different ini file.
;
mov di, ds:[si] ; ds:di <- offset in chunk
mov ax, di ; save offset
mov si, ss:[tableHandle]
add di, ds:[si] ; ds:di = existing IFHE
call HashCheckForCollision
jz haveElement
;
; Deal with the collision.
; pass in the offset of the elem in chunk instead of absolute address
; because the lmem block might move, which will result in a bogus
; address
call HashDealWithCollision
jmp finish
haveElement:
;
; Element is in ds:di.
;
mov bx, ss:[iniFileBlkHanOffset]
; if this a catPtr already exists it's because the ini file has two
; entries for the same category. We ignore all but the first entry.
tst ds:[di][bx].IFHE_catPtrs
jnz finish
mov ds:[di][bx].IFHE_catPtrs, cx
finish:
.leave
ret
HashAddEntry endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
HashCheckForCollision
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: See if the category already in this element is different
than the one we're hashing.
CALLED BY: HashAddEntry
PASS: ds:di = existing element we collided with
es = dgroup
cx = nptr to category we're hashing relative to the
segment in initFileBufSegAddr in dgroup
RETURN: z flag set if no collision. This means that target string
equals the existing element string.
DESTROYED: nothing
REVISION HISTORY:
Name Date Description
---- ---- -----------
jimw 11/12/96 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
HashCheckForCollision proc near
uses ax, bx, cx, dx, ds, es, si, di
.enter
;
; Get a hold of a ptr to a category within this existing element.
;
clr bx
catLoop:
mov ax, ds:[di][bx].IFHE_catPtrs
tst ax
jnz foundCat
add bx, size hptr
cmp bx, (MAX_INI_FILES* size hptr)
jb catLoop
;
; If we reach this point, it means that all the pointers
; were null, so why does this entry even exist? In NEC,
; just ignore this entry.
;
EC < ERROR INIT_FILE_CORRUPT_HASH_TABLE >
NEC < inc bx ; clear z flag >
NEC < jmp done >
;
; We found a pointer to the category label. See if this
; is the desired category.
;
foundCat:
mov si, ax
mov bx, es:[loaderVars][bx].KLV_initFileBufHan
call MemLock
mov ds, ax ; ds:si <- file str
mov di, cx
mov cx, es:[catStrLen] ; length
mov es, es:[initFileBufSegAddr] ; es:di <- hash str
repe cmpsb
NEC < done: >
call MemUnlock
.leave
ret
HashCheckForCollision endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
HashDealWithCollision
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Deal with a collision when building the table.
CALLED BY: HashAddEntry
PASS: ds:di = the existing element we collided with
ax = offset of element in chunk
cx = nptr to target category relative to current ini blk
es = dgroup
*ds:si = the hash table chunk
RETURN: nothing
DESTROYED:
REVISION HISTORY:
Name Date Description
---- ---- -----------
jimw 11/11/96 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
HashDealWithCollision proc near
uses ax,bx,cx,dx,si,di,bp, ds, es
.enter inherit HashProcessIniFile
;
; Get to the end of the chain.
;
mov bx, ss:[iniFileBlkHanOffset]
findEndLoop:
tst ds:[di].IFHE_next
jz atEnd
mov di, ds:[di].IFHE_next ; offset from start of chunk
add di, ds:[si] ; ds:di = next IFHE
call HashCheckForCollision
jnz findEndLoop
;
; We don't want to clobber an exisiting entry
;
tst ds:[di][bx].IFHE_catPtrs
jnz done
mov ds:[di][bx].IFHE_catPtrs, cx
jmp done
atEnd:
call ChunkArrayAppend ; ds:di <- element
segmov tableSeg, ds, dx
;
; Set up the element.
;
mov ds:[di][bx].IFHE_catPtrs, cx
sub di, ds:[si] ; convert to chunk-relative
;
; the lmem block may have moved due to the ChunkArrayAppend, so the
; position of the existing IFHE might have moved, so we calculate it
; again
;
mov si, ss:[tableHandle]
add ax, ds:[si]
mov_tr bx, ax
mov ds:[bx].IFHE_next, di
done:
.leave
ret
HashDealWithCollision endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
HashHashCat
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Get the hash value for the passed category string.
CALLED BY: ini Hash routines
PASS: ds:si = string to hash
RETURN: dx = value
DESTROYED: nothing
REVISION HISTORY:
Name Date Description
---- ---- -----------
jimw 11/ 8/96 Initial version
hash code from adam
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
HashHashCat proc near
uses ax,bx,cx,si,di,bp
.enter
clr bx, dx
mov cl, 5
clr ah
charLoop:
lodsb
;
; When building the table ']' signals the end of a string. When
; reading and such the strings are ASCIIZ...
;
cmp al, ']' ; end of cat string?
je done ; yes
tst al
jz done
;
; Skip this if it's a space.
;
cmp al, ' '
je charLoop
;
; Downsize this if it's a cap. but let non-letters slip through.
;
cmp al, 'z'
ja ready
cmp al, 'a'
jb ready
sub al, 'a'-'A'
ready:
;
; Multiply existing value by 33
;
movdw dibp, bxdx ; save current value for add
rol dx, cl ; *32, saving high 5 bits in low ones
shl bx, cl ; *32, making room for high 5 bits of
; dx
mov ch, dl
andnf ch, 0x1f ; ch <- high 5 bits of dx
andnf dl, not 0x1f ; nuke saved high 5 bits
or bl, ch ; shift high 5 bits into bx
adddw bxdx, dibp ; *32+1 = *33
;
; Add current character into the value.
;
add dx, ax
adc bx, 0
jmp charLoop
done:
; nifty steveK business to speed this up.
mov ax, dx
mov dx, bx ; dxax <- value
divideLoop:
cmpdw dxax, 65536*INITFILE_HASH_TABLE_SIZE
jb finishUp
subdw dxax, 65536*INITFILE_HASH_TABLE_SIZE
jmp divideLoop
finishUp:
mov bx, INITFILE_HASH_TABLE_SIZE
div bx
finished::
.leave
ret
HashHashCat endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
HashGetNextCat
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Find the next category in the ini file.
CALLED BY: InitFileInitHashTable
PASS: ds:si = ptr to ini buffer
RETURN: ds:si = ptr to category, just after '[' delimeter
catStrLen in dgoup set to the length of this category string.
DESTROYED: nothing
REVISION HISTORY:
Name Date Description
---- ---- -----------
jimw 11/ 8/96 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
HashGetNextCat proc near
uses ax,bx,cx,dx,di,bp
.enter
;
; We simply parse through the file looking for a '['.
;
mov ah, '[' ; marks category
findLoop:
lodsb
cmp al, MSDOS_TEXT_FILE_EOF
je eof
cmp al, '\\'
je escapedChar
cmp al, INIT_FILE_COMMENT
je commentChar
afterComment:
cmp ah, al
jne findLoop
push es
segmov es, ds
mov di, si ; es:di <- ptr to cat
mov cx, MAX_INITFILE_CATEGORY_LENGTH
mov al, ']' ; check for this
repne scasb
dec di ; move back to ]
sub di, si ; di <- the length
EC < Assert le di, MAX_INITFILE_CATEGORY_LENGTH >
pop es
mov es:[catStrLen], di
clc
exit:
.leave
ret
eof:
stc ; return EOF found
jmp exit
escapedChar: ; Escaped char hit...
lodsb ; read past escaped char
cmp al, MSDOS_TEXT_FILE_EOF
je eof
jmp findLoop ; & continue w/NEXT char
commentChar: ; Comment char hit...
lodsb ; read through EOLN,
cmp al, MSDOS_TEXT_FILE_EOF
je eof
cmp al, '\n'
jne commentChar
jmp short afterComment ; continue with EOLN itself
HashGetNextCat endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
HashCreateTable
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Create the chunk array for the table.
CALLED BY: InitFileInitHashTable
PASS: nothing
RETURN: bx = block handle of table chunk array (LOCKED!)
*ds:si = chunk array, ready to party
DESTROYED: nothing
NOTES:
The structure of the table is this. The chunk array header
contains the 271 possible hash buckets. Each one of these
entries is either NULL or a chunk array element number.
REVISION HISTORY:
Name Date Description
---- ---- -----------
jimw 11/ 8/96 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
HashCreateTable proc near
uses ax,cx,dx,di,bp
.enter
;
; Create the block.
;
mov ax, LMEM_TYPE_GENERAL
clr cx
call MemAllocLMem
push bx ; save heap handle
;
; Make the thing sharable.
;
clr ah ; clear no flags
mov al, mask HF_SHARABLE
call MemModifyFlags
;
; Make the chunk array. ChunkArrayCreate zeros things out for us.
;
call MemLock ; ax <- segment
mov ds, ax ; block for the new array
mov bx, size InitFileHashEntry ; bx <- elem size
mov cx, size InitFileHashTableHeader
; cx <- header size
clr ax, si ; si = create a chunk handle
; al = ObjChunkFlags
call ChunkArrayCreate ; *ds:si <- array
pop bx ; recover heap handle
.leave
ret
HashCreateTable endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
HashFindCategory
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Locates the given category.
CALLED BY: FindCategory for now.
PASS: es, bp - dgroup
dgroup:[catStrAddr] - category ASCIIZ string
dgroup:[catStrOffset]
dgroup:[catStrLen]
dgroup:[currentIniOffset]
RETURN: IF CATEGORY FOUND:
CARRY CLEAR
dgroup:[initFileBufPos] - offset from
BufAddr to character after ']'
ELSE
CARRY SET
initFileBufPos - unchanged
DESTROYED: nothing
REVISION HISTORY:
Name Date Description
---- ---- -----------
jimw 11/12/96 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
HashFindCategory proc near
uses bx, dx, si, di, ds
.enter
;
; Hash the string to get the table location.
;
lds si, es:[catStrAddr] ;ds:si <- string to hash
call HashHashCat ; dx <- table location
;
; Search for the category
;
call HashFindCategoryLow
;
; Unlock the hash table
;
mov bx, es:[hashTableBlkHandle]
call MemUnlock
.leave
ret
HashFindCategory endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
HashRemoveCategory
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Remove the hash entry for a category
CALLED BY: InitFileDeleteCategory
PASS: es, bp - dgroup
dgroup:[catStrAddr] - category ASCIIZ string
dgroup:[catStrOffset]
dgroup:[catStrLen]
dgroup:[currentIniOffset]
RETURN: nothing
DESTROYED: nothing
SIDE EFFECTS:
PSEUDO CODE/STRATEGY:
REVISION HISTORY:
Name Date Description
---- ---- -----------
EW 12/17/96 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
HashRemoveCategory proc far
uses ax, bx, cx, dx, si, di, bp, ds
.enter
;
; Hash the string to get the table location.
;
lds si, es:[catStrAddr] ;ds:si <- string to hash
call HashHashCat ; dx <- table location
;
; Search for the category
;
call HashFindCategoryLow ; ds:di = IFHE
EC < ERROR_C INIT_FILE_CORRUPT_HASH_TABLE >
;
; Remove the pointer to the first init file
;
clr {word}ds:[di].IFHE_catPtrs
;
; See if this category is in any other file
;
CheckHack <MAX_INI_FILES gt 1>
mov bx, 2*(MAX_INI_FILES-1)
check:
tst_clc ds:[di].IFHE_catPtrs[bx]
jnz cleanup
dec bx
dec bx
jnz check
;
; There are no other references, so we need to deallocate this
; chunk array entry. We start by checking to see if this entry
; is referenced directly by the hash table.
;
mov si, es:[hashTableChunkHandle]
mov si, ds:[si] ; ds:si <- header
mov bx, si ; bx = chunk base
add si, offset IFHTH_table
shl dx ; convert to word
add si, dx ; ds:si <- tableloc
sub di, bx ; di = relative offset
;
; walk down the linked list until we find the pointer to the
; selected entry
;
docmp:
cmp di, ds:[si]
je found
mov si, ds:[si] ; offset relative to chunk
EC < tst si >
EC < ERROR_Z INIT_FILE_CORRUPT_HASH_TABLE >
add si, bx ; actual offset
add si, offset IFHE_next
jmp docmp
;
; make the entry which points to the deleted entry point to the
; entry following the deleted entry, or null
;
found:
add di, bx
segmov ds:[si], ds:[di].IFHE_next, ax
;
; remove the actual element
;
mov cx, di
mov si, es:[hashTableChunkHandle]
call ChunkArrayDelete
; does ds:di point to the same element, if not this means that we
; deleted the last element in the chunk array, so we needn't update teh
; hash table
cmp cx, di
jne cleanup
sub di, bx ; restore relative ptr
;
; all elements after this one just moved up, so we need to update
; pointers to them in the hash table
;
call HashUpdateTblPtrs
;
; Unlock the hash table
;
cleanup:
mov bx, es:[hashTableBlkHandle]
call MemUnlock
.leave
ret
HashRemoveCategory endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
HashUpdateTblPtrs
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: update all the chunk array element pointers located after
the element just deleted.
CALLED BY: HashRemoveCategory
PASS: es - dgroup
ds:di - reletive ptr to chunk array element
RETURN: nothing
DESTROYED: nothing
SIDE EFFECTS: nothing
PSEUDO CODE/STRATEGY:
loop through the entire hash table
if chunkPtr > di
chunkPtr -= size InitFileHashEntry
loop through all elements in chunkarray
if IFHTH_next > di
IFHTH_next -= size InitFileHashEntry
REVISION HISTORY:
Name Date Description
---- ---- -----------
mjoy 3/ 6/97 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
HashUpdateTblPtrs proc near
uses si, bx, cx
.enter
mov si, es:[hashTableChunkHandle] ; ds:si - header
mov si, ds:[si] ; si - chunk base
add si, offset IFHTH_table ; ds:si<- table
mov bx, 2*INITFILE_HASH_TABLE_SIZE
updateHash: ; ds:[si][bx]=hash slot
sub bx, 2
jb hashDone ; no more slots
cmp ds:[si][bx], di ; do we need to shift?
jb updateHash
sub {word}ds:[si][bx], size InitFileHashEntry
jmp updateHash
hashDone:
;
; similarly, we need to update all the IFHE_next pointers
;
sub si, offset IFHTH_table
mov cx, ds:[si].CAH_count
add si, ds:[si].CAH_offset
sub si, size InitFileHashEntry
updateNext:
add si, size InitFileHashEntry
jcxz done
dec cx
cmp ds:[si].IFHE_next, di
jb updateNext
sub ds:[si].IFHE_next, size InitFileHashEntry
jmp updateNext
done:
.leave
ret
HashUpdateTblPtrs endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
HashFindCategoryLow
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Locates the given category.
CALLED BY: HashFindCategory, HashRemoveCategory
PASS: es, bp - dgroup
dx - hash value
dgroup:[catStrAddr] - category ASCIIZ string
dgroup:[catStrOffset]
dgroup:[catStrLen]
dgroup:[currentIniOffset]
RETURN: IF CATEGORY FOUND:
CARRY CLEAR
dgroup:[initFileBufPos] - offset from
BufAddr to character after ']'
ds:di - InitFileHashEntry (hash table block locked)
ELSE
CARRY SET
initFileBufPos - unchanged
hash table block locked
DESTROYED: nothing
REVISION HISTORY:
Name Date Description
---- ---- -----------
jimw 11/12/96 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
HashFindCategoryLow proc far
uses ax,bx,cx,dx,si,bp
.enter
;
; Lock down the chunk array block.
;
mov bx, es:[hashTableBlkHandle]
call MemLock
mov ds, ax
mov bx, es:[hashTableChunkHandle] ; *ds:si table
;
; Get the element chunk handle from the table.
;
mov si, ds:[bx] ; ds:si <- header
add si, offset IFHTH_table
shl dx ; convert to word
add si, dx ; ds:si <- tableloc
tst {word}ds:[si]
jz fail
;
; An element exists. Get the element and check the nptr in the
; appropriate spot.
;
mov di, ds:[si] ; di <-offset in chunk
scanElement:
;
; all the pointers in the table are relative to the chunk, so we need
; to add in the chunk's base address to get a real pointer
;
add di, ds:[bx] ; ds:di <- IFHE
;
; currentIniOffset is the offset to the ini blk handle in kvars.
; Again, we use it to know which catPtr to look at.
;
push bx
mov bx, es:[currentIniOffset]
mov cx, ds:[di][bx].IFHE_catPtrs
pop bx
; if cx is zero it could mean that there is not entry for that cat in
; the current ini file. But there could still be some value in
; IFHT_next
jcxz setUpForRetry
;
; We have an nptr. See if it actually matches the category string.
;
pushdw dsdi ; save element
mov es:[initFileBufPos], cx
lds si, es:[catStrAddr] ; ds:si cat string
call CmpString
jc popAndRetry
call GetChar
jc error
; cmp al, ']'
; jne huh?
mov ax, es:[initFileBufPos]
mov es:[curCatOffset], ax
popdw dsdi
clc
jmp exit
popAndRetry:
popdw dsdi
setUpForRetry:
;
; Get the next element and try again.
;
tst ds:[di].IFHE_next
jz fail
mov di, ds:[di].IFHE_next
jmp scanElement
fail:
stc
exit:
;
; LEAVE HASH BLOCK LOCKED
;
.leave
ret
error:
popdw dsdi
GOTO CorruptedIniFileError
HashFindCategoryLow endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
HashUpdateHashTable
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Update all of the hash table entries located after the current
pointer into the file.
CALLED BY: InitFileWrite
PASS: es - dgroup
dgroup:[initFileBufPos] - offset from buffer to insertion loc
(new data will start at this location)
cx - amount of space added (negative if space removed)
RETURN: nothing
DESTROYED: nothing
REVISION HISTORY:
Name Date Description
---- ---- -----------
jimw 11/13/96 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
HashUpdateHashTable proc far
uses ax, bx, cx, si, di, ds
.enter
;
; get a pointer to the table
;
mov bx, es:[hashTableBlkHandle]
mov si, es:[hashTableChunkHandle]
call MemLock
mov ds, ax
;
; set up for loop
;
mov ax, cx ; ax = adjustment
mov di, ds:[si] ; ds:di = array
mov cx, ds:[di].CAH_count ; cx = # of elements
add di, ds:[di].CAH_offset ; ds:di = 1st element
mov si, es:[initFileBufPos]
sub di, size InitFileHashEntry
CheckHack <offset IFHE_catPtrs eq 0>
;
; main loop:
; ds:di = <some element>.IFHE_catPtrs[0]
; cx = # of remaining elements
; si = offset at which to start adjusting
; ax = amount by which to adjust
;
top:
add di, size InitFileHashEntry ; goto next entry
jcxz done
dec cx
cmp si, ds:[di] ; past insert point?
ja top ; branch if not
add ds:[di], ax ; adjust the offset
jmp top
done:
call MemUnlock
.leave
ret
HashUpdateHashTable endp
InitfileRead ends
endif ; HASH_INIFILE
| 24.789203 | 79 | 0.581562 |
d497a83fa5a744ddb0fcbcaf97360f60a6d60369 | 695 | asm | Assembly | programs/oeis/156/A156718.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/156/A156718.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/156/A156718.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A156718: Numbers k such that k^2 == -1 (mod 13^2).
; 70,99,239,268,408,437,577,606,746,775,915,944,1084,1113,1253,1282,1422,1451,1591,1620,1760,1789,1929,1958,2098,2127,2267,2296,2436,2465,2605,2634,2774,2803,2943,2972,3112,3141,3281,3310,3450,3479,3619,3648,3788,3817,3957,3986,4126,4155,4295,4324,4464,4493,4633,4662,4802,4831,4971,5000,5140,5169,5309,5338,5478,5507,5647,5676,5816,5845,5985,6014,6154,6183,6323,6352,6492,6521,6661,6690,6830,6859,6999,7028,7168,7197,7337,7366,7506,7535,7675,7704,7844,7873,8013,8042,8182,8211,8351,8380
mov $3,$0
mov $4,$0
mov $5,$0
mov $0,3
mul $0,$4
div $0,6
gcd $5,2
pow $5,$5
mul $5,6
add $0,$5
add $0,2
mul $0,3
sub $0,8
mov $2,$3
mul $2,83
add $0,$2
| 34.75 | 487 | 0.717986 |
81c0d4f2d962d1e752d6b71b707d42361b724a3a | 648 | asm | Assembly | WangShuang_book/p258.asm | SmirnovKol/Learning_x86_assembly_language | 239b2fb60d6df87316b98184c9c6b6f36940ccbe | [
"MIT"
] | 1 | 2018-11-21T23:34:24.000Z | 2018-11-21T23:34:24.000Z | WangShuang_book/p258.asm | SmirnovKol/Learning_x86_assembly_language | 239b2fb60d6df87316b98184c9c6b6f36940ccbe | [
"MIT"
] | null | null | null | WangShuang_book/p258.asm | SmirnovKol/Learning_x86_assembly_language | 239b2fb60d6df87316b98184c9c6b6f36940ccbe | [
"MIT"
] | null | null | null | ; use 7ch interrupt handler to achieve the function of "jmp near ptr s"
; use (bx)=displacement as a passing parameter
; 7ch interrupt handler is stored at 0000:0200
assume cs:code
code segment
start: mov ax, cs
mov ds, ax
mov si, offset myjmp
mov ax, 0
mov es, ax
mov di, 0200h
mov cx, offset myjmpend - offset myjmp
cld ; set df flag to 0
rep movsb
mov ax, 0
mov es, ax
mov word ptr es:[7ch*4], 0200h
mov word ptr es:[7ch*4+2], 0
mov ax, 4c00h
int 21h
myjmp: ; 7ch interrupt handler, will be stored at 0000:0200
push bp
mov bp, sp
add ss:[bp+2], bx ; modify ip
pop bp
iret
myjmpend: nop
code ends
end start
| 15.428571 | 71 | 0.683642 |
275b6d118194838f4969d022a060cf06a4b5f532 | 782 | asm | Assembly | libsrc/_DEVELOPMENT/fcntl/z80/__fcntl_fdstruct_from_fd_1.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 640 | 2017-01-14T23:33:45.000Z | 2022-03-30T11:28:42.000Z | libsrc/_DEVELOPMENT/fcntl/z80/__fcntl_fdstruct_from_fd_1.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 1,600 | 2017-01-15T16:12:02.000Z | 2022-03-31T12:11:12.000Z | libsrc/_DEVELOPMENT/fcntl/z80/__fcntl_fdstruct_from_fd_1.asm | jpoikela/z88dk | 7108b2d7e3a98a77de99b30c9a7c9199da9c75cb | [
"ClArtistic"
] | 215 | 2017-01-17T10:43:03.000Z | 2022-03-23T17:25:02.000Z |
SECTION code_clib
SECTION code_fcntl
PUBLIC __fcntl_fdstruct_from_fd_1
EXTERN error_ebdfd_zc
EXTERN __fcntl_fdtbl, __fcntl_fdtbl_size
__fcntl_fdstruct_from_fd_1:
; return fdstruct* at index fd
;
; enter : hl = int fd
;
; exit : success
;
; de = FDSTRUCT *
; hl = & fdtbl[fd] + 1b
; z flag set if de == 0 (index vacant)
; carry reset
;
; fail if fd out of range
;
; hl = 0
; carry set, errno = EBDFD
;
; uses : af, de, hl
ld a,h
or a
jp nz, error_ebdfd_zc
ld a,l
sub __fcntl_fdtbl_size
jp nc, error_ebdfd_zc
add hl,hl
ld de,__fcntl_fdtbl
add hl,de
ld e,(hl)
inc hl
ld d,(hl)
ld a,d
or e
ret
| 15.64 | 51 | 0.539642 |
370dcf859934498e1c820009776a6c7f6e50ec84 | 5,434 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_sm_/i9-9900K_12_0xca.log_21829_459.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_sm_/i9-9900K_12_0xca.log_21829_459.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_sm_/i9-9900K_12_0xca.log_21829_459.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r12
push %r8
push %r9
push %rbp
push %rcx
push %rdi
push %rsi
lea addresses_normal_ht+0x14ed6, %r12
dec %r11
mov $0x6162636465666768, %r8
movq %r8, %xmm0
movups %xmm0, (%r12)
nop
cmp %r9, %r9
lea addresses_normal_ht+0xeed6, %rsi
lea addresses_UC_ht+0x17b06, %rdi
nop
add %rbp, %rbp
mov $28, %rcx
rep movsl
nop
nop
nop
sub %r12, %r12
lea addresses_A_ht+0x136d6, %rsi
nop
nop
nop
xor %r12, %r12
mov (%rsi), %r8d
nop
and $59292, %rcx
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %r9
pop %r8
pop %r12
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r12
push %r15
push %r9
push %rax
push %rdi
push %rsi
// Store
lea addresses_A+0x12d6, %r12
nop
nop
nop
nop
nop
cmp $53077, %rdi
mov $0x5152535455565758, %r10
movq %r10, %xmm2
vmovups %ymm2, (%r12)
nop
nop
nop
nop
nop
add %rdi, %rdi
// Store
lea addresses_PSE+0x1a256, %r10
sub $45360, %rax
movl $0x51525354, (%r10)
nop
nop
nop
dec %r10
// Store
lea addresses_A+0x12d6, %r9
nop
nop
nop
cmp %r15, %r15
mov $0x5152535455565758, %rax
movq %rax, (%r9)
nop
nop
nop
nop
sub %r10, %r10
// Faulty Load
lea addresses_A+0x12d6, %rdi
nop
nop
nop
nop
nop
sub %r10, %r10
mov (%rdi), %eax
lea oracles, %rsi
and $0xff, %rax
shlq $12, %rax
mov (%rsi,%rax,1), %rax
pop %rsi
pop %rdi
pop %rax
pop %r9
pop %r15
pop %r12
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'size': 2, 'NT': False, 'type': 'addresses_A', 'same': False, 'AVXalign': False, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'size': 32, 'NT': False, 'type': 'addresses_A', 'same': True, 'AVXalign': False, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'size': 4, 'NT': False, 'type': 'addresses_PSE', 'same': False, 'AVXalign': False, 'congruent': 5}}
{'OP': 'STOR', 'dst': {'size': 8, 'NT': False, 'type': 'addresses_A', 'same': True, 'AVXalign': False, 'congruent': 0}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'size': 4, 'NT': False, 'type': 'addresses_A', 'same': True, 'AVXalign': False, 'congruent': 0}}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'size': 16, 'NT': False, 'type': 'addresses_normal_ht', 'same': False, 'AVXalign': False, 'congruent': 10}}
{'OP': 'REPM', 'src': {'same': False, 'type': 'addresses_normal_ht', 'congruent': 8}, 'dst': {'same': False, 'type': 'addresses_UC_ht', 'congruent': 4}}
{'OP': 'LOAD', 'src': {'size': 4, 'NT': False, 'type': 'addresses_A_ht', 'same': False, 'AVXalign': False, 'congruent': 5}}
{'58': 21829}
58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58
*/
| 40.251852 | 2,999 | 0.658631 |
ea5f8ad314fb68e083a9bbe122f12ac5b28ce38b | 13,650 | asm | Assembly | ZORTON.reko/ZORTON_2353.asm | 0xLiso/dePIXELator | d74a663e5cb41a404f2b714e262ce44b668d3632 | [
"MIT"
] | null | null | null | ZORTON.reko/ZORTON_2353.asm | 0xLiso/dePIXELator | d74a663e5cb41a404f2b714e262ce44b668d3632 | [
"MIT"
] | null | null | null | ZORTON.reko/ZORTON_2353.asm | 0xLiso/dePIXELator | d74a663e5cb41a404f2b714e262ce44b668d3632 | [
"MIT"
] | 1 | 2021-03-10T22:29:06.000Z | 2021-03-10T22:29:06.000Z | ;;; Segment 2353 (2353:0000)
2353:0000 3B 85 ;.
l2331_0222:
leave
retf
;; fn2353_0004: 2353:0004
;; Called from:
;; 0CE0:1178 (in fn0CE0_08FC)
;; 1ED7:0248 (in fn1ED7_000E)
;; 1ED7:0340 (in fn1ED7_000E)
;; 1F0F:1033 (in fn1F0F_0BF7)
;; 1F0F:10E3 (in fn1F0F_0BF7)
;; 1F0F:11F6 (in fn1F0F_0BF7)
fn2353_0004 proc
enter 4h,0h
cli
mov ax,28BAh
mov es,ax
mov dword ptr es:[302Ch],0h
mov dword ptr [86C4h],0h
mov dword ptr [8724h],0h
mov dword ptr [8744h],0h
mov dword ptr [8784h],0h
mov dword ptr [87A8h],0h
mov dword ptr [8764h],0h
cmp byte ptr [bp+6h],0h
jz 0076h
l2353_0054:
mov es,ax
mov es:[302Eh],ds
mov word ptr es:[302Ch],86E8h
mov [bp-2h],ds
mov word ptr [bp-4h],86A8h
les bx,[bp-4h]
mov dword ptr es:[bx+1Ch],0h
l2353_0076:
cmp byte ptr [bp+8h],0h
jz 00BBh
l2353_007C:
mov ax,28BAh
mov es,ax
cmp dword ptr es:[302Ch],0h
jnz 009Ah
l2353_008A:
mov es,ax
mov es:[302Eh],ds
mov word ptr es:[302Ch],8688h
jmp 00A7h
l2353_009A:
les bx,[bp-4h]
mov es:[bx+1Eh],ds
mov word ptr es:[bx+1Ch],8688h
l2353_00A7:
mov [bp-2h],ds
mov word ptr [bp-4h],8588h
les bx,[bp-4h]
mov dword ptr es:[bx+1Ch],0h
l2353_00BB:
cmp byte ptr [bp+0Ah],0h
jz 010Dh
l2353_00C1:
mov ax,28BAh
mov es,ax
cmp dword ptr es:[302Ch],0h
jnz 00ECh
l2353_00CF:
mov dx,ds
mov bx,8748h
mov es,ax
mov es:[302Eh],dx
mov ax,dx
mov es:[302Ch],bx
mov dx,bx
mov [bp-2h],ax
mov [bp-4h],dx
jmp 0101h
l2353_00EC:
les bx,[bp-4h]
mov es:[bx+1Eh],ds
mov word ptr es:[bx+1Ch],8748h
mov [bp-2h],ds
mov word ptr [bp-4h],8748h
l2353_0101:
les bx,[bp-4h]
mov dword ptr es:[bx+1Ch],0h
l2353_010D:
cmp byte ptr [bp+0Ch],0h
jz 015Fh
l2353_0113:
mov ax,28BAh
mov es,ax
cmp dword ptr es:[302Ch],0h
jnz 013Eh
l2353_0121:
mov dx,ds
mov bx,8728h
mov es,ax
mov es:[302Eh],dx
mov ax,dx
mov es:[302Ch],bx
mov dx,bx
mov [bp-2h],ax
mov [bp-4h],dx
jmp 0153h
l2353_013E:
les bx,[bp-4h]
mov es:[bx+1Eh],ds
mov word ptr es:[bx+1Ch],8728h
mov [bp-2h],ds
mov word ptr [bp-4h],8728h
l2353_0153:
les bx,[bp-4h]
mov dword ptr es:[bx+1Ch],0h
l2353_015F:
cmp byte ptr [bp+0Eh],0h
jz 01B1h
l2353_0165:
mov ax,28BAh
mov es,ax
cmp dword ptr es:[302Ch],0h
jnz 0190h
l2353_0173:
mov dx,ds
mov bx,8708h
mov es,ax
mov es:[302Eh],dx
mov ax,dx
mov es:[302Ch],bx
mov dx,bx
mov [bp-2h],ax
mov [bp-4h],dx
jmp 01A5h
l2353_0190:
les bx,[bp-4h]
mov es:[bx+1Eh],ds
mov word ptr es:[bx+1Ch],8708h
mov [bp-2h],ds
mov word ptr [bp-4h],8708h
l2353_01A5:
les bx,[bp-4h]
mov dword ptr es:[bx+1Ch],0h
l2353_01B1:
cmp dword ptr [bp+10h],0h
jz 01FCh
l2353_01B8:
mov ax,28BAh
mov es,ax
cmp dword ptr es:[302Ch],0h
jnz 01D7h
l2353_01C6:
mov edx,[bp+10h]
mov es,ax
mov es:[302Ch],edx
mov eax,edx
jmp 01EDh
l2353_01D7:
les bx,[bp-4h]
mov eax,[bp+10h]
mov es:[bx+1Ch],eax
jmp 01EDh
l2353_01E5:
les bx,[bp-4h]
mov eax,es:[bx+1Ch]
l2353_01ED:
mov [bp-4h],eax
les bx,[bp-4h]
cmp dword ptr es:[bx+1Ch],0h
jnz 01E5h
l2353_01FC:
cmp byte ptr [bp+14h],0h
jz 026Ch
l2353_0202:
mov ax,28BAh
mov es,ax
cmp dword ptr es:[302Ch],0h
jnz 022Dh
l2353_0210:
mov dx,ds
mov bx,8768h
mov es,ax
mov es:[302Eh],dx
mov ax,dx
mov es:[302Ch],bx
mov dx,bx
mov [bp-2h],ax
mov [bp-4h],dx
jmp 0242h
l2353_022D:
les bx,[bp-4h]
mov es:[bx+1Eh],ds
mov word ptr es:[bx+1Ch],8768h
mov [bp-2h],ds
mov word ptr [bp-4h],8768h
l2353_0242:
mov [87AAh],ds
mov word ptr [87A8h],8768h
les bx,[bp-4h]
mov dword ptr es:[bx+1Ch],0h
mov ax,28BAh
mov edx,[bp-4h]
mov es,ax
mov es:[3030h],edx
call far 2504h:0283h
l2353_026C:
cmp dword ptr [bp+16h],0h
jz 02AEh
l2353_0273:
mov ax,28BAh
mov es,ax
cmp dword ptr es:[302Ch],0h
jnz 0292h
l2353_0281:
mov edx,[bp+16h]
mov es,ax
mov es:[302Ch],edx
mov eax,edx
jmp 029Eh
l2353_0292:
les bx,[bp-4h]
mov eax,[bp+16h]
mov es:[bx+1Ch],eax
l2353_029E:
mov [bp-4h],eax
les bx,[bp-4h]
mov dword ptr es:[bx+1Ch],0h
l2353_02AE:
sti
leave
retf
2353:02B1 C8 04 00 00 B8 BA 28 8E C0 66 26 A1 2C 30 66 ......(..f&.,0f
2353:02C0 89 46 FC 66 3B 46 06 75 50 66 83 7E 0A 00 74 22 .F.f;F.uPf.~..t"
2353:02D0 C4 5E FC 66 26 8B 47 1C C4 5E 0A 66 26 89 47 1C .^.f&.G..^.f&.G.
2353:02E0 B8 BA 28 66 8B 56 0A 8E C0 66 26 89 16 2C 30 E9 ..(f.V...f&..,0.
2353:02F0 84 00 B8 BA 28 8E C0 26 C4 1E 2C 30 66 26 8B 47 ....(..&..,0f&.G
2353:0300 1C BA BA 28 8E C2 66 26 A3 2C 30 EB 69 C4 5E FC ...(..f&.,0.i.^.
2353:0310 66 26 8B 47 1C 66 89 46 FC C4 5E FC 66 26 8B 47 f&.G.f.F..^.f&.G
2353:0320 1C 66 3B 46 06 75 E6 66 3B 46 06 75 49 66 83 7E .f;F.u.f;F.uIf.~
2353:0330 0A 00 74 28 C4 5E FC 26 C4 5F 1C 26 8B 47 1E 26 ..t(.^.&._.&.G.&
2353:0340 8B 57 1C C4 5E 0A 26 89 47 1E 26 89 57 1C C4 5E .W..^.&.G.&.W..^
2353:0350 FC 66 8B 46 0A 66 26 89 47 1C EB 1A C4 5E FC 26 .f.F.f&.G....^.&
2353:0360 C4 5F 1C 26 8B 47 1E 26 8B 57 1C C4 5E FC 26 89 ._.&.G.&.W..^.&.
2353:0370 47 1E 26 89 57 1C C9 CB C8 08 00 00 B8 BA 28 8E G.&.W.........(.
2353:0380 C0 66 26 A1 30 30 66 89 46 FC C4 5E FC 26 8B 47 .f&.00f.F..^.&.G
2353:0390 18 89 46 FA A1 20 A5 85 46 FA 75 03 E9 73 01 A1 ..F.. ..F.u..s..
2353:03A0 86 85 3B 46 FA 75 03 E9 68 01 8B 46 FA 89 46 F8 ..;F.u..h..F..F.
2353:03B0 B9 07 00 BB 14 05 2E 8B 07 3B 46 F8 74 08 83 C3 .........;F.t...
2353:03C0 02 E2 F3 E9 16 01 2E FF 67 0E 66 83 3E A8 87 00 ........g.f.>...
2353:03D0 74 10 C4 1E A8 87 26 C7 47 0A BA 28 26 C7 47 08 t.....&.G..(&.G.
2353:03E0 0E 88 B8 BA 28 8E C0 66 26 C7 06 4F 30 00 00 00 ....(..f&..O0...
2353:03F0 00 E9 E8 00 66 83 3E A8 87 00 74 E6 C4 1E A8 87 ....f.>...t.....
2353:0400 26 C7 47 0A BA 28 26 C7 47 08 CC 87 EB D4 EB D2 &.G..(&.G.......
2353:0410 66 83 3E A8 87 00 74 CA C4 1E A8 87 26 C7 47 0A f.>...t.....&.G.
2353:0420 BA 28 26 C7 47 08 3A 88 EB B8 EB B6 66 83 3E A8 .(&.G.:.....f.>.
2353:0430 87 00 74 AE C4 1E A8 87 26 C7 47 0A BA 28 26 C7 ..t.....&.G..(&.
2353:0440 47 08 24 88 EB 9C EB 9A 66 83 3E A8 87 00 74 15 G.$.....f.>...t.
2353:0450 C4 1E A8 87 B8 BA 28 06 8E C0 66 26 A1 39 30 07 ......(...f&.90.
2353:0460 66 26 89 47 08 B8 BA 28 8E C0 26 C7 06 51 30 BA f&.G...(..&..Q0.
2353:0470 28 26 C7 06 4F 30 34 30 EB 62 66 83 3E A8 87 00 (&..O040.bf.>...
2353:0480 74 15 C4 1E A8 87 B8 BA 28 06 8E C0 66 26 A1 42 t.......(...f&.B
2353:0490 30 07 66 26 89 47 08 B8 BA 28 8E C0 26 C7 06 51 0.f&.G...(..&..Q
2353:04A0 30 BA 28 26 C7 06 4F 30 3D 30 EB 30 66 83 3E A8 0.(&..O0=0.0f.>.
2353:04B0 87 00 74 15 C4 1E A8 87 B8 BA 28 06 8E C0 66 26 ..t.......(...f&
2353:04C0 A1 4B 30 07 66 26 89 47 08 B8 BA 28 8E C0 26 C7 .K0.f&.G...(..&.
2353:04D0 06 51 30 BA 28 26 C7 06 4F 30 46 30 8B 46 FA A3 .Q0.(&..O0F0.F..
2353:04E0 86 85 B8 62 28 8E C0 26 80 3E 00 00 02 74 0A 8E ...b(..&.>...t..
2353:04F0 C0 26 80 3E 00 00 01 75 0C 66 6A 00 6A 15 9A 00 .&.>...u.fj.j...
2353:0500 00 31 23 EB 0A 66 6A 00 6A 15 9A BA 00 31 23 83 .1#..fj.j....1#.
2353:0510 C4 06 C9 CB 01 00 02 00 04 00 08 00 10 00 20 00 .............. .
2353:0520 00 01 F4 03 48 04 AC 04 7A 04 CA 03 2C 04 10 04 ....H...z...,...
2353:0530 C8 02 00 00 B8 BA 28 8E C0 66 26 83 3E 4F 30 00 ......(..f&.>O0.
2353:0540 75 03 E9 15 02 B8 BA 28 8E C0 26 C4 1E 4F 30 26 u......(..&..O0&
2353:0550 8A 07 98 0B C0 75 1F B8 62 28 8E C0 26 F6 06 00 .....u..b(..&...
2353:0560 00 20 75 12 8E C0 26 F6 06 00 00 40 75 08 66 6A . u...&....@u.fj
2353:0570 00 6A 21 E9 DC 01 B8 62 28 8E C0 26 F6 06 00 00 .j!....b(..&....
2353:0580 20 74 03 E9 D4 01 8E C0 26 F6 06 00 00 40 74 03 t......&....@t.
2353:0590 E9 C7 01 66 6A 00 6A 12 9A 00 00 31 23 83 C4 06 ...fj.j....1#...
2353:05A0 B8 62 28 8E C0 26 80 3E 00 00 01 75 03 E9 9D 01 .b(..&.>...u....
2353:05B0 B8 62 28 8E C0 26 80 3E 00 00 02 74 03 E9 9A 01 .b(..&.>...t....
2353:05C0 B8 BA 28 8E C0 26 80 3E 72 A1 00 75 03 E9 7D 01 ..(..&.>r..u..}.
2353:05D0 B8 BA 28 8E C0 66 26 83 3E 79 A1 00 75 03 E9 6C ..(..f&.>y..u..l
2353:05E0 01 8E C0 26 C4 1E 79 A1 66 26 83 7F 0C 00 74 03 ...&..y.f&....t.
2353:05F0 E9 9A 00 8E C0 26 8E 06 7B A1 26 80 7F 10 00 74 .....&..{.&....t
2353:0600 62 8E C0 26 8E 06 7B A1 26 C4 5F 11 66 26 8B 07 b..&..{.&._.f&..
2353:0610 BA BA 28 8E C2 66 26 A3 79 A1 B8 BA 28 8E C0 26 ..(..f&.y...(..&
2353:0620 C4 1E 79 A1 26 81 7F 1D 0F 1F 75 14 26 81 7F 1B ..y.&.....u.&...
2353:0630 A0 07 75 0C 8E C0 26 FF 36 7B A1 53 6A 06 EB 0D ..u...&.6{.Sj...
2353:0640 B8 BA 28 8E C0 66 26 FF 36 79 A1 6A 0E 9A 00 00 ..(..f&.6y.j....
2353:0650 31 23 83 C4 06 B8 BA 28 8E C0 26 C6 06 73 A1 01 1#.....(..&..s..
2353:0660 E9 F7 00 66 6A 00 6A 0E 9A 00 00 31 23 83 C4 06 ...fj.j....1#...
2353:0670 B8 BA 28 8E C0 26 C6 06 73 A1 01 B8 BA 28 8E C0 ..(..&..s....(..
2353:0680 66 26 C7 06 79 A1 00 00 00 00 E9 CD 00 B8 BA 28 f&..y..........(
2353:0690 8E C0 66 26 83 3E 79 A1 00 75 03 E9 BC 00 8E C0 ..f&.>y..u......
2353:06A0 66 26 FF 36 79 A1 9A 43 12 0F 1F 83 C4 04 89 46 f&.6y..C.......F
2353:06B0 FE 83 7E FE 00 75 03 E9 93 00 B8 BA 28 8E C0 26 ..~..u......(..&
2353:06C0 C4 1E 79 A1 26 8A 47 10 98 3B 46 FE 7C 6A FF 4E ..y.&.G..;F.|j.N
2353:06D0 FE B8 BA 28 8E C0 26 8E 06 7B A1 26 C4 5F 11 8B ...(..&..{.&._..
2353:06E0 46 FE C1 E0 02 03 D8 26 8B 47 02 26 8B 17 BB BA F......&.G.&....
2353:06F0 28 8E C3 26 A3 7B A1 26 89 16 79 A1 B8 BA 28 8E (..&.{.&..y...(.
2353:0700 C0 66 26 83 3E 79 A1 00 74 3D 8E C0 26 C4 1E 79 .f&.>y..t=..&..y
2353:0710 A1 26 81 7F 1D 0F 1F 74 03 E9 24 FF 26 81 7F 1B .&.....t..$.&...
2353:0720 A0 07 74 03 E9 19 FF 8E C0 26 FF 36 7B A1 53 6A ..t......&.6{.Sj
2353:0730 06 EB 1F E9 0A FF EB 0F B8 BA 28 8E C0 66 26 C7 ..........(..f&.
2353:0740 06 79 A1 00 00 00 00 66 6A 00 E9 FE FE 66 6A 00 .y.....fj....fj.
2353:0750 6A 0B 9A 00 00 31 23 83 C4 06 C9 CB j....1#.....
;; fn2353_075C: 2353:075C
;; Called from:
;; 1D10:06CE (in fn1D10_02AE)
fn2353_075C proc
enter 2h,0h
push si
mov ax,2862h
mov es,ax
mov al,es:[0000h]
mov ah,0h
test ax,1h
jz 0774h
l2353_0771:
jmp 0902h
l2353_0774:
mov ax,28BAh
mov es,ax
cmp dword ptr es:[304Fh],0h
jnz 0785h
l2353_0782:
jmp 08DDh
l2353_0785:
test word ptr [8586h],2h
jz 07C9h
l2353_078D:
mov ax,28BAh
mov es,ax
cmp byte ptr es:[309Dh],0h
jz 07C9h
l2353_079A:
mov ax,28BAh
mov es,ax
les bx,es:[304Fh]
mov al,es:[bx+1h]
cbw
mov dx,28BAh
mov es,dx
mov es,es:[3051h]
push ax
mov al,es:[bx]
cbw
pop dx
sub dx,ax
mov ax,28BAh
mov es,ax
mov es,es:[3051h]
add es:[bx+2h],dx
l2353_07C9:
test word ptr [8586h],8h
jz 080Dh
l2353_07D1:
mov ax,28BAh
mov es,ax
cmp byte ptr es:[309Ch],0h
jz 080Dh
l2353_07DE:
mov ax,28BAh
mov es,ax
les bx,es:[304Fh]
mov al,es:[bx+1h]
cbw
mov dx,28BAh
mov es,dx
mov es,es:[3051h]
push ax
mov al,es:[bx]
cbw
pop dx
sub dx,ax
mov ax,28BAh
mov es,ax
mov es,es:[3051h]
add es:[bx+2h],dx
l2353_080D:
test word ptr [8586h],4h
jz 0851h
l2353_0815:
mov ax,28BAh
mov es,ax
cmp byte ptr es:[309Bh],0h
jz 0851h
l2353_0822:
mov ax,28BAh
mov es,ax
les bx,es:[304Fh]
mov al,es:[bx+1h]
cbw
mov dx,28BAh
mov es,dx
mov es,es:[3051h]
push ax
mov al,es:[bx]
cbw
pop dx
sub dx,ax
mov ax,28BAh
mov es,ax
mov es,es:[3051h]
add es:[bx+2h],dx
l2353_0851:
mov ax,28BAh
mov es,ax
les bx,es:[304Fh]
mov al,es:[bx+1h]
mov dx,28BAh
mov es,dx
mov es,es:[3051h]
sub al,es:[bx]
mov [bp-1h],al
cbw
mov es,dx
mov es,es:[3051h]
cmp ax,es:[bx+2h]
jg 08A6h
l2353_087D:
mov ax,28BAh
mov es,ax
mov es,es:[3051h]
mov al,es:[bx+1h]
mov es,dx
mov es,es:[3051h]
mov es:[bx],al
mov al,[bp-1h]
cbw
mov es,dx
mov es,es:[3051h]
sub es:[bx+2h],ax
jmp 08DDh
l2353_08A6:
mov ax,28BAh
mov es,ax
les bx,es:[304Fh]
push es
mov es,ax
les si,es:[304Fh]
mov al,es:[si]
pop es
add al,es:[bx+2h]
mov dx,28BAh
mov es,dx
mov es,es:[3051h]
mov es:[bx],al
mov ax,28BAh
mov es,ax
mov es,es:[3051h]
mov word ptr es:[bx+2h],0h
l2353_08DD:
mov ax,2862h
mov es,ax
cmp byte ptr es:[0000h],2h
jz 08F4h
l2353_08EA:
mov es,ax
cmp byte ptr es:[0000h],1h
jnz 0934h
l2353_08F4:
push 0h
push 15h
call far 2331h:0000h
jmp 093Eh
2353:0900 EB 32 .2
l2353_0902:
mov ax,28BAh
mov es,ax
les bx,es:[304Fh]
mov al,es:[bx+1h]
mov dx,28BAh
mov es,dx
mov es,es:[3051h]
mov es:[bx],al
mov ax,2862h
mov es,ax
cmp byte ptr es:[0000h],2h
jz 08F4h
l2353_092A:
mov es,ax
cmp byte ptr es:[0000h],1h
jz 08F4h
l2353_0934:
push 0h
push 15h
call far 2331h:00BAh
l2353_093E:
add sp,6h
pop si
leave
retf
2353:0944 B8 62 28 8E C0 26 F6 06 00 00 20 75 .b(..&.... u
2353:0950 0A 8E C0 26 F6 06 00 00 40 74 0E 66 6A 00 6A 03 ...&....@t.fj.j.
2353:0960 9A BA 00 31 23 EB 19 8E C0 66 6A 00 6A 03 9A BA ...1#....fj.j...
2353:0970 00 31 23 83 C4 06 66 6A 00 6A 0E 9A 00 00 31 23 .1#...fj.j....1#
2353:0980 83 C4 06 CB B8 62 28 8E C0 26 80 3E 00 00 01 75 .....b(..&.>...u
2353:0990 0F 66 6A 00 6A 0E 9A 00 00 31 23 83 C4 06 EB 0D .fj.j....1#.....
2353:09A0 B8 62 28 8E C0 26 F6 06 00 00 01 74 0D 66 6A 00 .b(..&.....t.fj.
2353:09B0 6A 10 9A BA 00 31 23 83 C4 06 CB B8 62 28 8E C0 j....1#.....b(..
2353:09C0 26 F6 06 00 00 20 75 0A 8E C0 26 F6 06 00 00 40 &.... u...&....@
2353:09D0 74 0D 66 6A 00 6A 04 9A BA 00 31 23 83 C4 06 CB t.fj.j....1#....
2353:09E0 B8 62 28 8E C0 26 F6 06 00 00 40 75 31 8E C0 26 .b(..&....@u1..&
2353:09F0 80 3E 00 00 02 74 27 B8 62 28 8E C0 26 80 3E 00 .>...t'.b(..&.>.
2353:0A00 00 01 75 0D 66 6A 00 6A 0E 9A 00 00 31 23 83 C4 ..u.fj.j....1#..
2353:0A10 06 66 6A 00 6A 05 9A BA 00 31 23 83 C4 06 CB B8 .fj.j....1#.....
2353:0A20 62 28 8E C0 26 F6 06 00 00 02 75 27 B8 62 28 8E b(..&.....u'.b(.
2353:0A30 C0 26 80 3E 00 00 01 75 0D 66 6A 00 6A 0E 9A 00 .&.>...u.fj.j...
2353:0A40 00 31 23 83 C4 06 66 6A 00 6A 01 9A BA 00 31 23 .1#...fj.j....1#
| 23.863636 | 74 | 0.614139 |
6ab6c9388e7c46fd4a4461f3249fc9b972e7e3f1 | 4,044 | asm | Assembly | src/Font.asm | gschizas/amstrad-diagnostics | 9eeab20d8042977500e93cd138062f7ae3d42939 | [
"MIT"
] | 60 | 2021-02-21T16:16:40.000Z | 2022-02-28T09:15:08.000Z | src/Font.asm | gschizas/amstrad-diagnostics | 9eeab20d8042977500e93cd138062f7ae3d42939 | [
"MIT"
] | null | null | null | src/Font.asm | gschizas/amstrad-diagnostics | 9eeab20d8042977500e93cd138062f7ae3d42939 | [
"MIT"
] | 10 | 2021-02-27T19:02:15.000Z | 2022-03-06T16:53:09.000Z | font:
defb #00,#00,#00,#00,#00,#00,#00,#00 ; SPACE
defb #00,#10,#10,#10,#10,#00,#10,#00 ; !
defb #00,#28,#28,#00,#00,#00,#00,#00 ; "
defb #00,#28,#7c,#28,#28,#7c,#28,#00 ; #
defb #00,#10,#7c,#50,#7c,#14,#7c,#10 ; $
defb #60,#64,#08,#10,#20,#4c,#0c,#00 ; %
defb #10,#28,#28,#30,#54,#48,#34,#00 ; &
defb #10,#10,#20,#00,#00,#00,#00,#00 ; '
defb #08,#10,#20,#20,#20,#10,#08,#00 ; (
defb #20,#10,#08,#08,#08,#10,#20,#00 ; )
defb #00,#00,#28,#10,#7c,#10,#28,#00 ; *
defb #00,#00,#10,#10,#7c,#10,#10,#00 ; +
defb #00,#00,#00,#00,#00,#20,#20,#40 ; ,
defb #00,#00,#00,#00,#7c,#00,#00,#00 ; -
defb #00,#00,#00,#00,#00,#30,#30,#00 ; .
defb #00,#00,#04,#08,#10,#20,#40,#00 ; /
defb #00,#38,#4c,#54,#54,#64,#38,#00 ; 0
defb #00,#30,#50,#10,#10,#10,#7c,#00 ; 1
defb #00,#38,#44,#04,#38,#40,#7c,#00 ; 2
defb #00,#38,#44,#18,#04,#44,#38,#00 ; 3
defb #00,#08,#18,#28,#48,#7c,#08,#00 ; 4
defb #00,#7c,#40,#78,#04,#44,#38,#00 ; 5
defb #00,#38,#40,#78,#44,#44,#38,#00 ; 6
defb #00,#7c,#04,#08,#10,#20,#20,#00 ; 7
defb #00,#38,#44,#38,#44,#44,#38,#00 ; 8
defb #00,#38,#44,#44,#3c,#04,#38,#00 ; 9
defb #00,#00,#00,#20,#00,#00,#20,#00 ; :
defb #00,#00,#10,#00,#00,#10,#10,#20 ; ;
defb #00,#00,#08,#10,#20,#10,#08,#00 ; <
defb #00,#00,#00,#7c,#00,#7c,#00,#00 ; =
defb #00,#00,#20,#10,#08,#10,#20,#00 ; >
defb #00,#38,#44,#08,#10,#00,#10,#00 ; ?
defb #00,#38,#44,#54,#5c,#40,#38,#00 ; @
defb #00,#38,#44,#44,#7c,#44,#44,#00 ; A
defb #00,#78,#44,#78,#44,#44,#78,#00 ; B
defb #00,#38,#44,#40,#40,#44,#38,#00 ; C
defb #00,#78,#24,#24,#24,#24,#78,#00 ; D
defb #00,#7c,#40,#78,#40,#40,#7c,#00 ; E
defb #00,#7c,#40,#78,#40,#40,#40,#00 ; F
defb #00,#38,#44,#40,#4c,#44,#38,#00 ; G
defb #00,#44,#44,#7c,#44,#44,#44,#00 ; H
defb #00,#38,#10,#10,#10,#10,#38,#00 ; I
defb #00,#04,#04,#04,#44,#44,#38,#00 ; J
defb #00,#44,#48,#50,#68,#44,#44,#00 ; K
defb #00,#40,#40,#40,#40,#40,#7c,#00 ; L
defb #00,#44,#6c,#54,#44,#44,#44,#00 ; M
defb #00,#44,#64,#54,#4c,#44,#44,#00 ; N
defb #00,#38,#44,#44,#44,#44,#38,#00 ; O
defb #00,#78,#44,#44,#78,#40,#40,#00 ; P
defb #00,#38,#44,#44,#54,#48,#34,#00 ; Q
defb #00,#78,#44,#44,#78,#48,#44,#00 ; R
defb #00,#3c,#40,#38,#04,#44,#38,#00 ; S
defb #00,#7c,#10,#10,#10,#10,#10,#00 ; T
defb #00,#44,#44,#44,#44,#44,#38,#00 ; U
defb #00,#44,#44,#44,#44,#28,#10,#00 ; V
defb #00,#44,#44,#44,#44,#54,#28,#00 ; W
defb #00,#44,#28,#10,#10,#28,#44,#00 ; X
defb #00,#44,#44,#28,#10,#10,#10,#00 ; Y
defb #00,#7c,#08,#10,#20,#40,#7c,#00 ; Z
defb #00,#38,#20,#20,#20,#20,#38,#00 ; [
defb #00,#00,#40,#20,#10,#08,#04,#00 ; \
defb #00,#38,#08,#08,#08,#08,#38,#00 ; ]
defb #00,#10,#38,#54,#10,#10,#10,#00 ; ^
defb #00,#00,#00,#00,#00,#00,#7c,#00 ; _
defb #10,#10,#08,#00,#00,#00,#00,#00 ; `
defb #00,#00,#10,#38,#7c,#10,#10,#00 ; a
defb #00,#00,#10,#10,#7c,#38,#10,#00 ; b
defb #00,#00,#10,#30,#7c,#30,#10,#00 ; c
defb #00,#00,#10,#18,#7c,#18,#10,#00 ; d
defb #00,#04,#14,#24,#7c,#20,#10,#00 ; e
defb #00,#00,#10,#24,#7c,#20,#10,#00 ; f
defb #00,#6c,#48,#6c,#44,#44,#6c,#00 ; g
defb #00,#68,#48,#48,#48,#48,#6c,#00 ; h
defb #00,#60,#58,#50,#58,#50,#68,#00 ; i
defb #00,#00,#40,#68,#44,#44,#28,#00 ; j
defb #00,#60,#48,#48,#48,#68,#0c,#00 ; k
defb #00,#20,#50,#30,#38,#34,#54,#00 ; l
defb #00,#30,#40,#48,#4c,#48,#24,#00 ; m
defb #70,#00,#70,#48,#48,#48,#48,#00 ; n
defb #00,#6c,#4c,#4c,#4c,#48,#68,#00 ; o
defb #00,#00,#38,#28,#38,#20,#38,#00 ; p
defb #00,#00,#38,#28,#38,#08,#08,#00 ; q
defb #00,#00,#28,#30,#20,#20,#20,#00 ; r
defb #00,#00,#38,#20,#38,#08,#38,#00 ; s
defb #00,#00,#20,#30,#20,#20,#10,#00 ; t
defb #00,#20,#10,#44,#44,#44,#3c,#00 ; u
defb #00,#00,#28,#28,#28,#28,#10,#00 ; v
defb #00,#00,#28,#28,#28,#38,#28,#00 ; w
defb #00,#00,#28,#28,#10,#28,#28,#00 ; x
defb #00,#00,#28,#28,#38,#08,#38,#00 ; y
defb #00,#00,#38,#08,#10,#20,#38,#00 ; z
defb #00,#18,#10,#20,#10,#10,#18,#00 ; {
defb #00,#10,#10,#00,#10,#10,#10,#00 ; |
defb #00,#30,#10,#08,#10,#10,#30,#00 ; }
defb #aa,#55,#aa,#55,#aa,#55,#aa,#55 ; ~
defb #aa,#55,#aa,#55,#aa,#55,#aa,#55 ; DEL
| 41.265306 | 45 | 0.493323 |
73e6de1c15e4bfa3f9d24ec8a586d93cc7672ffe | 771 | asm | Assembly | oeis/285/A285971.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/285/A285971.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/285/A285971.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A285971: Positions of 0 in A285969; complement of A285970.
; Submitted by Jon Maiga
; 2,6,8,11,14,18,21,24,26,30,32,35,38,41,43,47,50,54,56,59,62,66,69,72,74,78,81,85,87,90,93,96,98,102,104,107,110,114,117,120,122,126,128,131,134,137,139,143,146,150,152,155,158,161,163,167,169,172,175,179,182,185,187,191,194,198,200,203,206,210,213,216,218,222,224,227,230,233,235,239,242,246,248,251,254,258,261,264,266,270,273,277,279,282,285,288,290,294,296,299
mov $1,$0
mov $2,$0
seq $0,72939 ; Define a sequence c depending on n by: c(1)=1 and c(2)=n; c(k+2) = (c(k+1) + c(k))/2 if c(k+1) and c(k) have the same parity; otherwise c(k+2)=abs(c(k+1)-2*c(k)); sequence gives values of n such that lim k -> infinity c(k) = infinity.
add $1,$0
div $1,2
add $1,$2
mov $0,$1
add $0,1
| 59.307692 | 365 | 0.677043 |
0bd69f8fd9dbb07b4837bdb642347410248d6e8e | 6,714 | asm | Assembly | src/mainmenu.asm | jardafis/CastleEscape | 3deb573938109a8ea84277d83dd7a163588747a4 | [
"BSD-3-Clause"
] | 1 | 2022-01-07T07:10:55.000Z | 2022-01-07T07:10:55.000Z | src/mainmenu.asm | jardafis/CastleEscape | 3deb573938109a8ea84277d83dd7a163588747a4 | [
"BSD-3-Clause"
] | null | null | null | src/mainmenu.asm | jardafis/CastleEscape | 3deb573938109a8ea84277d83dd7a163588747a4 | [
"BSD-3-Clause"
] | null | null | null | extern _attribEdit
extern _tile0
extern _tileAttr
IF _ZXN
extern clearTilemap
ENDIF
extern defineKeys
extern keyboardScan
extern kjPresent
extern newGame
extern readKempston
extern wyz_play_song
extern wyz_player_stop
extern rand
extern setAttrHi
extern setAttr
extern mainmenuScreen
extern dzx0_standard
public mainMenu
public waitReleaseKey
public flickerMenu
IF !_ZXN
section CODE_5
ELSE
section CODE_2
ENDIF
#include "defs.inc"
;
; Display the game main menu. Options to configure and start
; the game are on this screen.
;
mainMenu:
border 1
;
; Start main menu song
;
di
call wyz_player_stop
ld a, MAIN_MENU_MUSIC
call wyz_play_song
ei
;
; Page in the main menu screen
;
bank mainmenuScreen>>16
halt
; Fill the screen with paper and innk the same color
ld hl, SCREEN_ATTR_START
ld de, SCREEN_ATTR_START+1
ld (hl), PAPER_BLUE|INK_BLUE
ld bc, SCREEN_ATTR_LENGTH-1
ldir
displayScreen:
IF _ZXN
call clearTilemap
ENDIF
; Uncompress the menu screen
ld hl, mainmenuScreen
ld de, SCREEN_START
call dzx0_standard
; Clear the lightning by setting paper and ink colors the same
ld a, PAPER_BLUE|INK_BLUE
ld hl, lightningAttribs+3
call setFlicker
ld hl, lightningAttribs2+3
call setFlicker
getKey:
halt
call flickerMenu
call keyboardScan ; Read the keyboard
jr nz, keyPressed ; Process key press
ld a, (kjPresent) ; Check if the kempston joystick
or a ; is present, if not
jr z, getKey ; continue polling.
ld e, 0 ; No direction keys pressed
call readKempston ; Read the joystick
ld a, e ; Check if fire has been pressed
and JUMP
jr z, getKey ; If not, continue polling
ld a, '0' ; Force '0'
jr jumpPressed
keyPressed:
call waitReleaseKey
jumpPressed:
cp '0'
jr z, play
cp '1'
call z, defineKeys
IFDEF ATTRIB_EDIT
cp '2'
jr z, attribEdit
ENDIF
jp displayScreen
;
; Wait for a key to be released and animate the menu items.
;
; Input:
; hl - Pointer to the lantern list
;
; Notes:
; 'af' is preserved.
waitReleaseKey:
push af
releaseKey:
call keyboardScan ; Read the keyboard
jr nz, releaseKey ; Key is being pressed
pop af
ret
IFDEF ATTRIB_EDIT
;
; Wrapper to call attribute edit function in 'C'
;
attribEdit:
ld hl, _tile0
push hl
ld hl, _tileAttr
push hl
bcall _attribEdit
pop hl
pop hl
jp mainMenu
ENDIF
play:
call newGame
jp mainMenu
flickerMenu:
ld hl, lightAttribs
call doFlicker
ld hl, lightAttribs2
call doFlicker
ld hl, lightningAttribs
call doFlicker
ld hl, lightningAttribs2
call doFlicker
ret
;
; Flicker attributes
;
; Used to flicker lightning and lights on the main menu
;
; Input:
; hl - Pointer to the flicker table.
;
; Output:
; None.
;
doFlicker:
ld a, (hl)
dec a
jr nz, skipRand
push hl
nextRand:
call rand
ld a, l
and 0x7f
jr z, nextRand
pop hl
skipRand:
ld (hl), a ; Count
inc hl
cp 4
jr c, flicker
ld a, (hl) ; Off color
inc hl
inc hl
call setFlicker
ret
flicker:
inc hl
ld a, (hl) ; On color
inc hl
setFlicker:
ld b, (hl) ; Table size
inc hl
nextAttrib:
push bc
ld b, (hl)
inc hl
ld c, (hl)
inc hl
; Check which screen bank is being used
ld d, a
ld a, (currentBank)
and %0001000
ld a, d
push af
call z, setAttr
pop af
push af
call nz, setAttrHi
pop af
pop bc
djnz nextAttrib
ret
IF !_ZXN
section DATA_5
ELSE
section DATA_2
ENDIF
lightningAttribs:
db 0x00
db PAPER_BLUE|INK_BLUE ; Off
db PAPER_BLUE|INK_WHITE ; On
db (lightningAttribsEnd-lightningAttribs-4)/2
db 0, 18, 0, 19
db 1, 18, 1, 19, 1, 20
db 2, 18, 2, 19, 2, 20, 2, 21
db 3, 19, 3, 20, 3, 21
db 4, 19, 4, 21
db 5, 19, 5, 20, 5, 21
db 6, 19, 6, 20
db 7, 19, 7, 20, 7, 21
db 8, 18, 8, 19, 8, 20, 8, 21
db 9, 18, 9, 20
db 10, 18, 10, 20
lightningAttribsEnd:
lightningAttribs2:
db 0x10
db PAPER_BLUE|INK_BLUE ; Off
db PAPER_BLUE|INK_WHITE ; On
db (lightningAttribsEnd2-lightningAttribs2-4)/2
db 6, 0
db 7, 0
db 8, 0, 8, 1, 8, 2, 8, 3, 8, 4, 8, 5, 8, 6, 8, 7, 8, 8, 8, 9
db 9, 2, 9, 3, 9, 4, 9, 5, 9, 8
db 10, 2, 10, 5, 10, 6, 10, 7
db 11, 1, 11, 2, 11, 3, 11, 6
db 12, 3, 12, 4
db 13, 3, 13, 4
db 14, 3
lightningAttribsEnd2:
lightAttribs:
db 0x20
db PAPER_BLACK|INK_YELLOW|BRIGHT
db PAPER_BLACK|INK_BLACK
db (lightAttribsEnd-lightAttribs-4)/2
db 15, 29
lightAttribsEnd:
lightAttribs2:
db 0x30
db PAPER_BLACK|INK_YELLOW|BRIGHT
db PAPER_BLACK|INK_BLACK
db (lightAttribsEnd2-lightAttribs2-4)/2
db 12, 12
db 12, 13
lightAttribsEnd2:
| 24.50365 | 74 | 0.467084 |
df43d2cc612b6743c4e1f2c62a0c1233ea9a2d65 | 566 | asm | Assembly | programs/oeis/026/A026809.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/026/A026809.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/026/A026809.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A026809: a(n) = 3^n*(3^n-1)*(3^n-2)/6.
; 0,1,84,2925,85320,2362041,64304604,1741001445,47050068240,1270739210481,34313445309924,926494403955165,25015631334908760,675424587904113321,18236486750190760044,492385348146244352085,13294406252968671566880,358948985507335487598561,9691622758792692429038964,261673815838254410157680205,7065193039790534524016202600,190760212183763421252055554201,5150525729946383275905428370684,139064194717415286568848018627525,3754733257449979180435015867375920,101377797951867335859435021571628241
mov $1,3
pow $1,$0
bin $1,3
mov $0,$1
| 70.75 | 485 | 0.876325 |
b0bae0ffb20d2be7af26150072cca6e127383617 | 2,918 | asm | Assembly | src/stars/tests/instructions.asm | kevintmcdonnell/stars | ce0df570c546a8490ef4f9ceeb84c8e1132b2791 | [
"MIT"
] | 4 | 2020-11-02T19:22:44.000Z | 2020-11-04T17:18:14.000Z | src/stars/tests/instructions.asm | kevintmcdonnell/stars | ce0df570c546a8490ef4f9ceeb84c8e1132b2791 | [
"MIT"
] | 3 | 2020-11-04T00:58:08.000Z | 2020-11-04T19:01:53.000Z | src/stars/tests/instructions.asm | kevintmcdonnell/stars | ce0df570c546a8490ef4f9ceeb84c8e1132b2791 | [
"MIT"
] | null | null | null | .data
ascii: .ascii "hello"
asciiz: .asciiz "hello"
bytes: .byte 1 2 0xff 0x3ff 'a'
.align 3
double: .double 420.10
float: .float 18.0
.align 1
half: .half 0xffff 1 3
space: .space 8
.align 2
word: .word 1 2 3 4
.text
main:
target:
label:
abs $t1,$t2 # a comment
abs.d $f2,$f4
abs.s $f0,$f1
add $t1,$t2,$t3
add.d $f2,$f4,$f6
add.s $f0,$f1,$f3
random_label: addi $t1,$t2,-100
addi $t1,$t2,100000
addiu $t1,$t2,-100
addiu $t1,$t2,100000
addu $t1,$t2,$t3
and $t1,$t2,$t3
andi $t1,$t2,100
andi $t1,$t2,100000
b label
bc1f 1,label
bc1f label
bc1t 1,label
bc1t label
beq $t1,$t2,label
beqz $t1,label
bge $t1,$t2,label
bgeu $t1,$t2,label
bgez $t1,label
bgezal $t1,label
bgt $t1,$t2,label
bgtu $t1,$t2,label
bgtz $t1,label
ble $t1,$t2,label
bleu $t1,$t2,label
blez $t1,label
blt $t1,$t2,label
bltu $t1,$t2,label
bltz $t1,label
bltzal $t1,label
bne $t1,$t2,label
bnez $t1,label
break
c.eq.d $f2,$f4
c.eq.d 1,$f2,$f4
c.eq.s $f0,$f1
c.eq.s 1,$f0,$f1
c.le.d $f2,$f4
c.le.d 1,$f2,$f4
c.le.s $f0,$f1
c.le.s 1,$f0,$f1
c.lt.d $f2,$f4
c.lt.d 1,$f2,$f4
c.lt.s $f0,$f1
c.lt.s 1,$f0,$f1
ceil.w.d $f1,$f2
ceil.w.s $f0,$f1
clo $t1,$t2
clz $t1,$t2
cvt.d.s $f2,$f1
cvt.d.w $f2,$f1
cvt.s.d $f1,$f2
cvt.s.w $f0,$f1
cvt.w.d $f1,$f2
cvt.w.s $f0,$f1
div $t1,$t2
div.d $f2,$f4,$f6
div.s $f0,$f1,$f3
divu $t1,$t2
floor.w.d $f1,$f2
floor.w.s $f0,$f1
j target
jal target
jalr $t1
jalr $t1,$t2
jr $t1
l.d $f2,($t2)
l.d $f2,100000($t2)
l.s $f1,($t2)
l.s $f1,100000($t2)
la $t1,label
lb $t1,($t2)
lbu $t1,($t2)
lh $t1,($t2)
lhu $t1,($t2)
li $t1,-100
lui $t1,100
lw $t1,($t2)
lwl $t1,($t2)
lwr $t1,($t2)
madd $t1,$t2
maddu $t1,$t2
mfc1 $t1,$f1
mfhi $t1
mflo $t1
mov.d $f2,$f4
mov.s $f0,$f1
move $t1,$t2
movf $t1,$t2
movf $t1,$t2,1
movf.d $f2,$f4
movf.d $f2,$f4,1
movf.s $f0,$f1
movf.s $f0,$f1,1
movn $t1,$t2,$t3
movn.d $f2,$f4,$t3
movn.s $f0,$f1,$t3
movt $t1,$t2
movt $t1,$t2,1
movt.d $f2,$f4
movt.d $f2,$f4,1
movt.s $f0,$f1
movt.s $f0,$f1,1
movz $t1,$t2,$t3
movz.d $f2,$f4,$t3
movz.s $f0,$f1,$t3
msub $t1,$t2
msubu $t1,$t2
mtc1 $t1,$f1
mthi $t1
mtlo $t1
mul $t1,$t2,$t3
mul.d $f2,$f4,$f6
mul.s $f0,$f1,$f3
mult $t1, $t2
multu $t1, $t2
neg $t1,$t2
neg.d $f2,$f4
neg.s $f0,$f1
nop
nor $t1,$t2,$t3
not $t1,$t2
or $t1,$t2,$t3
ori $t1,$t2,100
ori $t1,$t2,100000
rol $t1,$t2,10
ror $t1,$t2,10
round.w.d $f1,$f2
round.w.s $f0,$f1
s.d $f2,($t2)
s.d $f2,100000($t2)
s.s $f1,($t2)
s.s $f1,100000($t2)
sb $t1,($t2)
seq $t1,$t2,$t3
sge $t1,$t2,$t3
sgeu $t1,$t2,$t3
sgt $t1,$t2,$t3
sgtu $t1,$t2,$t3
sh $t1,($t2)
sle $t1,$t2,$t3
sleu $t1,$t2,$t3
sll $t1,$t2,10
sllv $t1,$t2,$t3
slt $t1,$t2,$t3
slti $t1,$t2,-100
sltiu $t1,$t2,-100
sltu $t1,$t2,$t3
sne $t1,$t2,$t3
sqrt.d $f2,$f4
sqrt.s $f0,$f1
sra $t1,$t2,10
srav $t1,$t2,$t3
srl $t1,$t2,10
srlv $t1,$t2,$t3
sub $t1,$t2,$t3
sub.d $f2,$f4,$f6
sub.s $f0,$f1,$f3
subu $t1,$t2,$t3
sw $t1,($t2)
swl $t1,($t2)
swr $t1,($t2)
syscall
trunc.w.d $f1,$f2
trunc.w.s $f0,$f1
xor $t1,$t2,$t3
xori $t1,$t2,100
xori $t1,$t2,100000 | 15.197917 | 31 | 0.608636 |
7c988f91adc23c6a15be6b243faa4924c2d56107 | 4,359 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xca.log_21829_1232.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xca.log_21829_1232.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xca.log_21829_1232.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r12
push %r14
push %rcx
push %rdi
push %rsi
lea addresses_WT_ht+0x117c7, %rsi
lea addresses_WT_ht+0x1d68e, %rdi
inc %r12
mov $55, %rcx
rep movsl
nop
nop
nop
add %r14, %r14
pop %rsi
pop %rdi
pop %rcx
pop %r14
pop %r12
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r11
push %r15
push %rbp
push %rbx
push %rcx
push %rdx
// Store
lea addresses_UC+0x1c4de, %r11
nop
xor $8582, %rbp
mov $0x5152535455565758, %rcx
movq %rcx, %xmm7
movntdq %xmm7, (%r11)
and $23705, %rbp
// Faulty Load
lea addresses_RW+0x9ce, %rdx
nop
nop
nop
nop
add %r10, %r10
mov (%rdx), %r15d
lea oracles, %rbx
and $0xff, %r15
shlq $12, %r15
mov (%rbx,%r15,1), %r15
pop %rdx
pop %rcx
pop %rbx
pop %rbp
pop %r15
pop %r11
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'size': 8, 'NT': False, 'type': 'addresses_RW', 'same': False, 'AVXalign': False, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'size': 16, 'NT': True, 'type': 'addresses_UC', 'same': False, 'AVXalign': False, 'congruent': 4}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'size': 4, 'NT': False, 'type': 'addresses_RW', 'same': True, 'AVXalign': False, 'congruent': 0}}
<gen_prepare_buffer>
{'OP': 'REPM', 'src': {'same': False, 'type': 'addresses_WT_ht', 'congruent': 0}, 'dst': {'same': False, 'type': 'addresses_WT_ht', 'congruent': 4}}
{'32': 21829}
32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32
*/
| 57.355263 | 2,999 | 0.662767 |
6db905d1a2c11ccd9d9d55ee0bf4ffae4ea43e9c | 2,241 | asm | Assembly | code/6502/invaders/audio.asm | visrealm/hbc-56 | 9c082946e247e79edc12867299b5b0fda3b6c873 | [
"MIT"
] | 65 | 2021-07-22T10:32:02.000Z | 2022-03-30T04:42:45.000Z | code/6502/invaders/audio.asm | visrealm/hbc-56 | 9c082946e247e79edc12867299b5b0fda3b6c873 | [
"MIT"
] | 5 | 2022-03-29T20:23:57.000Z | 2022-03-30T23:12:42.000Z | code/6502/invaders/audio.asm | visrealm/hbc-56 | 9c082946e247e79edc12867299b5b0fda3b6c873 | [
"MIT"
] | 4 | 2021-12-30T17:13:23.000Z | 2022-03-05T09:07:22.000Z | ; Troy's HBC-56 - 6502 - Invaders audio
;
; Copyright (c) 2021 Troy Schrapel
;
; This code is licensed under the MIT license
;
; https://github.com/visrealm/hbc-56
;
;
audioInit:
jsr ayInit
+ayWrite AY_PSG0, AY_CHA_AMPL, $0a
+ayWrite AY_PSG0, AY_CHB_AMPL, $0a
+ayWrite AY_PSG0, AY_CHC_AMPL, $00
+ayWrite AY_PSG0, AY_ENV_PERIOD_L, $00
+ayWrite AY_PSG0, AY_ENV_PERIOD_H, $08
+ayWrite AY_PSG0, AY_ENV_SHAPE, $09
+ayWrite AY_PSG0, AY_ENABLES, $38
+ayWrite AY_PSG1, AY_CHC_AMPL, $1f
+ayWrite AY_PSG1, AY_ENV_PERIOD_L, $00
+ayWrite AY_PSG1, AY_ENV_PERIOD_H, $08
+ayWrite AY_PSG1, AY_ENV_SHAPE, $0e
rts
audioAlienToneLeft:
+ayWrite AY_PSG0, AY_CHA_TONE_H, 8
+ayWrite AY_PSG0, AY_CHB_TONE_H, 0
rts
audioAlienToneRight:
+ayWrite AY_PSG0, AY_CHA_TONE_H, 0
+ayWrite AY_PSG0, AY_CHB_TONE_H, 10
rts
audioAlienTonePause:
+ayWrite AY_PSG0, AY_CHA_TONE_H, 0
+ayWrite AY_PSG0, AY_CHB_TONE_H, 0
rts
audioFireBullet:
+ayWrite AY_PSG0, AY_CHC_AMPL, $1f
+ayWrite AY_PSG0, AY_ENV_PERIOD_L, $00
+ayWrite AY_PSG0, AY_ENV_PERIOD_H, $08
+ayWrite AY_PSG0, AY_ENV_SHAPE, $09
+ayWrite AY_PSG0, AY_ENABLES, $38
lda #$08
sta TONE1
+ayWriteA AY_PSG0, AY_CHC_TONE_L
rts
audioBulletIncreasePitch:
lda TONE1
clc
adc #8
sta TONE1
+ayWriteA AY_PSG0, AY_CHC_TONE_L
rts
audioBulletStop:
+ayWrite AY_PSG0, AY_CHC_TONE_L, 0
+ayWrite AY_PSG0, AY_CHC_TONE_H, 0
rts
audioBombHit:
+ayWrite AY_PSG1, AY_CHC_AMPL, $1f
+ayWrite AY_PSG1, AY_NOISE_GEN, $06
+ayWrite AY_PSG1, AY_ENV_PERIOD_L, $00
+ayWrite AY_PSG1, AY_ENV_PERIOD_H, $0a
+ayWrite AY_PSG1, AY_ENV_SHAPE, $09
+ayWrite AY_PSG1, AY_ENABLES, $1f
rts
audioAlienHit:
+ayWrite AY_PSG1, AY_CHC_AMPL, $1f
+ayWrite AY_PSG1, AY_NOISE_GEN, $1f
+ayWrite AY_PSG1, AY_ENV_PERIOD_L, $00
+ayWrite AY_PSG1, AY_ENV_PERIOD_H, $0f
+ayWrite AY_PSG1, AY_ENV_SHAPE, $09
+ayWrite AY_PSG1, AY_ENABLES, $1f
rts
| 26.364706 | 46 | 0.630076 |
00c514dbe19c9a00e5b2340fd57a6405625b63f1 | 5,935 | asm | Assembly | src/header.asm | CasualPokePlayer/flowtimer.gbc | 38f69b9230cd1b6b9a20d6c394eff34a7917f805 | [
"MIT"
] | null | null | null | src/header.asm | CasualPokePlayer/flowtimer.gbc | 38f69b9230cd1b6b9a20d6c394eff34a7917f805 | [
"MIT"
] | null | null | null | src/header.asm | CasualPokePlayer/flowtimer.gbc | 38f69b9230cd1b6b9a20d6c394eff34a7917f805 | [
"MIT"
] | null | null | null | INCLUDE "defines.asm"
SECTION "Rst $00", ROM0[$00]
NULL::
; This traps jumps to $0000, which is a common "default" pointer
; $FFFF is another one, but reads rIE as the instruction byte
; Thus, we put two `nop`s that may serve as operands, before soft-crashing
; The operand will always be 0, so even jumps will work fine. Nice!
nop
nop
rst Crash
SECTION "Rst $18", ROM0[$18]
MemcpySmall::
ld a, [de]
ld [hli], a
inc de
dec c
jr nz, MemcpySmall
ret
SECTION "Rst $20", ROM0[$20]
MemsetSmall::
ld [hli], a
dec c
jr nz, MemsetSmall
ret
SECTION "Rst $38", ROM0[$38]
; Perform a soft-crash. Prints debug info on-screen
Crash::
di ; Doing this as soon as possible to avoid interrupts messing up
jp HandleCrash
SECTION "VBlank Interrupt", ROM0[$40]
ei
jp VBlank
SECTION "Timer Interrupt", ROM0[$50]
jp Timer
SECTION "Header", ROM0[$100]
; This is your ROM's entry point
; You have 4 bytes of code to do... something
sub $11
jr EntryPoint
; Make sure to allocate some space for the header, so no important
; code gets put there and later overwritten by RGBFIX.
; RGBFIX is designed to operate over a zero-filled header, so make
; sure to put zeros regardless of the padding value. (This feature
; was introduced in RGBDS 0.4.0, but the -MG etc flags were also
; introduced in that version.)
ds $150 - @, 0
SECTION "Entry point", ROM0[$150]
EntryPoint:
ld sp,wStackBottom
error nz ; no DMGs allowed
di
ldh [rLCDC],a
ldh [rSCY],a
ldh [rSCX],a
ldh [hButtonPress],a
ldh [hBeeps],a
ldh [hFlashCooldown],a
ldh [hTime],a
ldh [hTime+1],a
ldh [hTime+2],a
inc a
ld [rROMB0],a
ldh [rSPD],a
; setup timer
ld a,(256-53)
ldh [rTMA],a
ld a,TACF_START|TACF_262KHZ
ldh [rTAC],a
ld a,IEF_TIMER|IEF_VBLANK
ldh [rIE],a
ld a,P1F_GET_NONE
ld hl,rP1
ld [hl],a ; prevent stop bug
ldh a,[rSPD]
bit 7,a
jr nz,Joypad
stop $69 ; nice speed switch
ld a,HIGH(FontTiles)
ldh [rHDMA1],a
xor a
ldh [rHDMA4],a
ldh [rHDMA2],a
ld a,HIGH(_VRAM8000)
ldh [rHDMA3],a
dec a
ldh [rHDMA5],a
ld a,HIGH(FontTiles+$800)
ldh [rHDMA1],a
xor a
ldh [rHDMA4],a
ldh [rHDMA2],a
ld a,HIGH(_VRAM8800)
ldh [rHDMA3],a
ld a,$7F
ldh [rHDMA5],a
ld a,HIGH(DefaultSCRN0)
ldh [rHDMA1],a
xor a
ldh [rHDMA4],a
ldh [rHDMA2],a
ld a,HIGH(_SCRN0)
ldh [rHDMA3],a
ld a,$3F
ldh [rHDMA5],a
; fallthrough
Joypad:
.poll
res 4,[hl] ; dpad
xor a
bit 3,[hl]
jr z,.pressDetected ; down
inc a
bit 2,[hl]
jr z,.pressDetected ; up
inc a
bit 1,[hl]
jr z,.pressDetected ; left
inc a
bit 0,[hl]
jr z,.pressDetected ; right
set 4,[hl] ; unset dpad
res 5,[hl] ; buttons
inc a
bit 3,[hl]
jr z,.pressDetected ; start
inc a
bit 2,[hl]
jr z,.pressDetected ; select
inc a
bit 1,[hl]
jr z,.pressDetected ; b
inc a
bit 0,[hl]
jr z,.pressDetected ; a
set 5,[hl] ; unset buttons
jr .poll
.pressDetected
ldh [hButtonPress],a ; remember the button press, 0-1-2-3-4-5-6-7 -> Down-Up-Left-Right-Start-Select-B-A
; everything should mostly be set up, we just need to get the timer and vblank interrupt going
ld a,LCDCF_ON|LCDCF_BG8000
ldh [rLCDC],a ; enable LCD
ld a,(256-53-4)
ldh [rDIV],a ; reset DIV
ldh [rTIMA],a ; set TIMA to 200
ld a,~(IEF_TIMER|IEF_VBLANK)
ei
ldh [rIF],a
.wait
halt ; interrupts will handle it from here
jr .wait
VBlank:
ld c,LOW(rBCPS)
ld a,BCPSF_AUTOINC
ldh [c],a
inc c
ldh a,[hFlashCooldown]
and a
jr z,.whiteOnBlack
ld hl,hFlashCooldown
dec [hl]
jr nz,.blackOnWhite
ldh a,[hBeeps]
sub 5
jp z,EntryPoint
.blackOnWhite
ld a,h
ldh [c],a
ldh [c],a
cpl
ldh [c],a
ldh [c],a
jr .updateVisualTimer
.whiteOnBlack
; xor a
ldh [c],a
ldh [c],a
cpl
ldh [c],a
ldh [c],a
; fallthrough
.updateVisualTimer
ld hl,vTimer
ldh a,[hTime]
ld [hli],a
ld a,$FE ; "."
ld [hli],a
ldh a,[hTime+1]
ld [hli],a
ldh a,[hTime+2]
ld [hl],a
reti
Timer:
push af
push bc
push hl
lb bc,1,LOW(hTime+2)
ldh a,[c]
add b
daa
ldh [c],a
dec c
dec b
ldh a,[c]
adc b
daa
ldh [c],a
dec c
ldh a,[c]
adc b
daa
ldh [c],a
ld h,HIGH(BeepIntervalsTable)
ldh a,[hButtonPress]
add a
ld l,a
ld a,[hli]
ld h,[hl]
ld l,a
ldh a,[hBeeps]
ld b,a
add a
add b
add l
ld l,a
ldh a,[c]
cp [hl]
jr nz,.noBeep
inc c
inc l
ldh a,[c]
cp [hl]
jr nz,.noBeep
inc c
inc l
ldh a,[c]
cp [hl]
jr nz,.noBeep
ld hl,hBeeps
inc [hl]
inc l
ld [hl],$03 ; 3 frames of flash cooldown
; TODO: should this be more?
ld l,LOW(rNR12)
ld [hl],$F1
inc l
inc l
ld [hl],$BF
.noBeep
pop hl
pop bc
pop af
reti
SECTION "Beep Intervals Table", ROM0,ALIGN[8]
BeepIntervalsTable:
dw BeepIntervalsDown
dw BeepIntervalsUp
dw BeepIntervalsLeft
dw BeepIntervalsRight
dw BeepIntervalsStart
dw BeepIntervalsSelect
dw BeepIntervalsB
dw BeepIntervalsA
SECTION "Beep Intervals", ROM0,ALIGN[8]
BeepIntervals:
BeepIntervalsDown:
db $11,$50,$00, $11,$85,$00, $12,$20,$00, $12,$55,$00, $12,$90,$00 ; down
BeepIntervalsUp:
db $11,$50,$00, $11,$85,$00, $12,$20,$00, $12,$55,$00, $12,$90,$00 ; up
BeepIntervalsLeft:
db $11,$50,$00, $11,$85,$00, $12,$20,$00, $12,$55,$00, $12,$90,$00 ; left
BeepIntervalsRight:
db $11,$50,$00, $11,$85,$00, $12,$20,$00, $12,$55,$00, $12,$90,$00 ; right
BeepIntervalsStart:
db $11,$50,$00, $11,$85,$00, $12,$20,$00, $12,$55,$00, $12,$90,$00 ; start
BeepIntervalsSelect:
db $11,$50,$00, $11,$85,$00, $12,$20,$00, $12,$55,$00, $12,$90,$00 ; select
BeepIntervalsB:
db $11,$50,$00, $11,$85,$00, $12,$20,$00, $12,$55,$00, $12,$90,$00 ; b
BeepIntervalsA:
db $11,$50,$00, $11,$85,$00, $12,$20,$00, $12,$55,$00, $12,$90,$00 ; a
SECTION "Font", ROM0,ALIGN[8]
FontTiles:
INCBIN "font.2bpp"
FontTilesEnd:
SECTION "Default SCRN0", ROM0,ALIGN[8]
DefaultSCRN0:
ds $400, $FF
SECTION "Visual Timer", VRAM[$9908]
vTimer:
ds 4
; This ensures that the stack is at the very end of WRAM
SECTION "Stack", WRAM0[$D000 - STACK_SIZE]
ds STACK_SIZE
wStackBottom::
SECTION "Vars", HRAM
hButtonPress:
ds 1
hBeeps:
ds 1
hFlashCooldown
ds 1
hTime:
ds 3
| 18.149847 | 105 | 0.660489 |
98ab9ab144da31d4caf123ba48ead5e832db55d4 | 1,285 | asm | Assembly | exampl07/shuflarr/unique_riched/ectrl.asm | AlexRogalskiy/Masm | d39498878f140696b299c76436f209156961429e | [
"MIT"
] | null | null | null | exampl07/shuflarr/unique_riched/ectrl.asm | AlexRogalskiy/Masm | d39498878f140696b299c76436f209156961429e | [
"MIT"
] | null | null | null | exampl07/shuflarr/unique_riched/ectrl.asm | AlexRogalskiy/Masm | d39498878f140696b299c76436f209156961429e | [
"MIT"
] | null | null | null | ; ########################################################################
EditControl proc hParent:DWORD, x:DWORD, y:DWORD, wd:DWORD, ht:DWORD, ID:DWORD
LOCAL hEdit:DWORD
LOCAL hFont:DWORD
; --------------------------------
; conditional assembly directives
; --------------------------------
IFDEF riched1
szText EditMl,"RICHEDIT"
ELSE
szText EditMl,"RichEdit20a"
ENDIF
; --------------------------------
invoke CreateWindowEx,0,ADDR EditMl,0,
WS_VISIBLE or ES_SUNKEN or \
WS_CHILDWINDOW or WS_CLIPSIBLINGS or \
ES_MULTILINE or WS_VSCROLL or \
ES_AUTOVSCROLL or ES_NOHIDESEL or \
WS_HSCROLL or ES_AUTOHSCROLL,
x,y,wd,ht,hParent,ID,hInstance,NULL
mov hEdit, eax
invoke SetWindowLong,hEdit,GWL_WNDPROC,hEditProc
mov lpfnhEditProc, eax
invoke GetStockObject,edit_font
invoke SendMessage,hEdit,WM_SETFONT,eax,0
invoke SendMessage,hEdit,EM_EXLIMITTEXT,0,100000000
invoke SendMessage,hEdit,EM_SETOPTIONS,ECOOP_XOR,ECO_SELECTIONBAR
mov eax, hEdit
ret
EditControl endp
; #########################################################################
| 30.595238 | 78 | 0.509728 |
d8f658eb12cf38ebf83511973520747874adcce8 | 6,335 | asm | Assembly | src/memory.asm | fjpena/sword-of-ianna-msx2 | f104f46a677e4b21f42fbed478307a0bb1d372f3 | [
"Apache-2.0"
] | 43 | 2017-10-21T23:01:25.000Z | 2022-02-21T17:45:11.000Z | src/memory.asm | fjpena/sword-of-ianna-msx2 | f104f46a677e4b21f42fbed478307a0bb1d372f3 | [
"Apache-2.0"
] | null | null | null | src/memory.asm | fjpena/sword-of-ianna-msx2 | f104f46a677e4b21f42fbed478307a0bb1d372f3 | [
"Apache-2.0"
] | 6 | 2017-10-23T05:48:50.000Z | 2022-01-06T03:11:49.000Z | ; Memory (ROM-RAM) management routines
; BIOS functions and variables
RDSLT EQU $000C ; read a value in another slot. A: slot, HL: address to read
WRSLT EQU $0014 ; write a value in another slot. A: slot, HL: address to write, E: value
; Initalize MegaROM variables
initROMbanks:
xor a
ld (ROMBank0),a
inc a
ld (ROMBank1),a
ret
; Set ASCII16 page 2 to value in A
setROM2:
di
ld (ROMBank1), a
ld ($7000), a
ei
ret
; Set ASCII16 page 2 to value in A, assuming interrupts are disabled
setROM2_DI:
ld (ROMBank1), a
ld ($7000), a
ret
; Enable bank specified by slot A in $8000 - $BFFF
enableSLOT2:
push hl
ld h, $80
call ENASLT
pop hl
ret
; Same as before, but come back with interrupts enabled
enableSLOT2_EI:
di
push hl
ld h, $80
call ENASLT
pop hl
ei
ret
; Find RAM at $8000
; Routine borrowed from some code by Ramones (thx!!!)
; OUTPUT
; A: Slot / Subslot for the RAM page
; Carry set if no RAM found
searchramnormal80:
ld c,$80
call checkmem
ret
; ---------------------
; CHECKMEM
; C : Page
; Cy : NotFound
; ----------------------
checkmem:
ld a,$FF
ld (thisslt),a
checkmem0:
push bc
call sigslot
pop bc
cp $FF
jr z,checkmemend
push bc
call checkmemgen
pop bc
ld a,(thisslt)
ret nc
jr checkmem0
checkmemend:
scf
ret
; --------------------------
; CHECKMEMGEN
; C : Page
; A : Slot FxxxSSPP
; 00 : 0
; 40: 1
; 80 : 2
; Returns :
; Cy = 1 Not found
; -------------------------------
checkmemgen:
push bc
push hl
ld h,c
ld l,$10
checkmemgen1:
push af
call RDSLT
cpl
ld e,a
pop af
push de
push af
call WRSLT
pop af
pop de
push af
push de
call RDSLT
pop bc
ld b,a
ld a,c
cpl
ld e,a
pop af
push af
push bc
call WRSLT
pop bc
ld a,c
cp b
jr nz,checkmemgen2
pop af
dec l
jr nz,checkmemgen1
pop hl
pop bc
or a
ret
checkmemgen2:
pop af
pop hl
pop bc
scf
ret
; -------------------------------------------------------
; SIGSLOT
; Returns in A the next slot every time it is called.
; For initializing purposes, THISSLT has to be #FF.
; If no more slots, it returns A=#FF.
; --------------------------------------------------------
; ; this code is programmed by Nestor Soriano aka Konamiman
sigslot:
ld a,(thisslt) ; Returns the next slot, starting by
cp 0FFh ; slot 0. Returns #FF when there are not more slots
jr nz,sigslt1 ; Modifies AF, BC, HL.
ld a,(EXPTBL)
and 010000000b
ld (thisslt),a
ret
sigslt1:
ld a,(thisslt)
cp 010001111b
jr z,nomaslt
cp 000000011b
jr z,nomaslt
bit 7,a
jr nz,sltexp
sltsimp:
and 000000011b
inc a
ld c,a
ld b,0
ld hl,EXPTBL
add hl,bc
ld a,(hl)
and 010000000b
or c
ld (thisslt),a
ret
sltexp:
ld c,a
and 000001100b
cp 000001100b
ld a,c
jr z,sltsimp
add a,000000100b
ld (thisslt),a
ret
nomaslt:
ld a,$FF
ret
| 30.311005 | 122 | 0.274665 |
4cc00e20bbaeb03be11b3dcf697c307758abeeb2 | 421 | asm | Assembly | programs/oeis/219/A219636.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/219/A219636.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/219/A219636.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A219636: Complement of A035336.
; 0,1,3,4,5,6,8,9,11,12,13,14,16,17,18,19,21,22,24,25,26,27,29,30,32,33,34,35,37,38,39,40,42,43,45,46,47,48,50,51,52,53,55,56,58,59,60,61,63,64,66,67,68,69,71,72,73,74,76,77,79,80,81,82,84,85,87,88,89,90,92,93,94,95,97,98,100,101,102,103,105,106,107,108,110,111,113,114,115,116,118,119,121,122,123,124,126,127,128,129
seq $0,137709 ; Secondary Upper Wythoff Sequence.
div $0,2
sub $0,1
| 60.142857 | 317 | 0.691211 |
3711215249885e444fdbc1477d085834f559c742 | 2,134 | asm | Assembly | libsrc/target/gb/gbdk/asm_box.asm | Frodevan/z88dk | f27af9fe840ff995c63c80a73673ba7ee33fffac | [
"ClArtistic"
] | 640 | 2017-01-14T23:33:45.000Z | 2022-03-30T11:28:42.000Z | libsrc/target/gb/gbdk/asm_box.asm | Frodevan/z88dk | f27af9fe840ff995c63c80a73673ba7ee33fffac | [
"ClArtistic"
] | 1,600 | 2017-01-15T16:12:02.000Z | 2022-03-31T12:11:12.000Z | libsrc/target/gb/gbdk/asm_box.asm | Frodevan/z88dk | f27af9fe840ff995c63c80a73673ba7ee33fffac | [
"ClArtistic"
] | 215 | 2017-01-17T10:43:03.000Z | 2022-03-23T17:25:02.000Z | SECTION code_driver
PUBLIC asm_box
GLOBAL __tempx_s
GLOBAL __tempy_s
GLOBAL __fillstyle
GLOBAL __fgcolour
GLOBAL __bgcolour
GLOBAL asm_line
;; Draw a box between (B,C) and (D,E)
asm_box:
LD A,(__tempx_s)
LD B,A
LD A,(__tempx_s+1)
LD C,A
SUB B
JR NC,ychk
LD A,C
LD (__tempx_s),A
LD A,B
LD (__tempx_s+1),A
ychk:
LD A,(__tempy_s)
LD B,A
LD A,(__tempy_s+1)
LD C,A
SUB B
JR NC,dbox
LD A,C
LD (__tempy_s),A
LD A,B
LD (__tempy_s+1),A
dbox:
LD A,(__tempx_s)
LD B,A
LD D,A
LD A,(__tempy_s)
LD C,A
LD A,(__tempy_s+1)
LD E,A
CALL asm_line
LD A,(__tempx_s+1)
LD B,A
LD D,A
LD A,(__tempy_s)
LD C,A
LD A,(__tempy_s+1)
LD E,A
CALL asm_line
LD A,(__tempx_s)
INC A
LD (__tempx_s),A
LD A,(__tempx_s+1)
DEC A
LD (__tempx_s+1),A
LD A,(__tempx_s)
LD B,A
LD A,(__tempx_s+1)
LD D,A
LD A,(__tempy_s)
LD C,A
LD E,A
CALL asm_line
LD A,(__tempx_s)
LD B,A
LD A,(__tempx_s+1)
LD D,A
LD A,(__tempy_s+1)
LD C,A
LD E,A
CALL asm_line
LD A,(__fillstyle)
OR A
RET Z
LD A,(__tempx_s)
LD B,A
LD A,(__tempx_s+1)
SUB B
RET C
LD A,(__tempy_s)
INC A
LD (__tempy_s),A
LD A,(__tempy_s+1)
DEC A
LD (__tempy_s+1),A
LD A,(__tempy_s)
LD B,A
LD A,(__tempy_s+1)
SUB B
RET C
if 0
LD A,(mod_col) ;Swap fore + back colours.
LD D,A
AND 0xF0
LD C,A ;Preserve Style
LD A,D
AND 0x0C
RRCA
RRCA
OR C ;Foreground->background + __fillstyle
LD C,A
LD A,D
AND 0x03
RLCA
RLCA
OR C
LD (mod_col),A
else
LD A,(__fgcolour)
LD C,A
LD A,(__bgcolour)
LD (__fgcolour),A
LD A,C
LD (__bgcolour),A
endif
filllp:
LD A,(__tempx_s)
LD B,A
LD A,(__tempx_s+1)
LD D,A
LD A,(__tempy_s)
LD C,A
LD E,A
CALL asm_line
LD A,(__tempy_s+1)
LD B,A
LD A,(__tempy_s)
CP B
JR Z,swap
INC A
LD (__tempy_s),A
JR filllp
swap:
if 0
LD A,(mod_col) ;Swap fore + back colours.
LD D,A
AND 0xF0
LD C,A ;Preserve Style
LD A,D
AND 0x0C
RRCA
RRCA
OR C ;Foreground->background + __fillstyle
LD C,A
LD A,D
AND 0x03
RLCA
RLCA
OR C
LD (mod_col),A
else
LD A,(__fgcolour)
LD C,A
LD A,(__bgcolour)
LD (__fgcolour),A
LD A,C
LD (__bgcolour),A
endif
RET | 13.012195 | 44 | 0.640581 |
2db7b90db25e1eae418534930329d5315e1b545b | 5,074 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca.log_143_1347.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca.log_143_1347.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca.log_143_1347.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r12
push %r9
push %rax
push %rbp
push %rcx
push %rdi
push %rsi
lea addresses_WT_ht+0x1a222, %r12
add %rbp, %rbp
movb $0x61, (%r12)
nop
nop
nop
cmp $47961, %rsi
lea addresses_UC_ht+0x18aba, %r10
nop
nop
nop
add %rax, %rax
mov (%r10), %r9w
and $22394, %r9
lea addresses_D_ht+0x59ba, %r10
nop
and %rbp, %rbp
vmovups (%r10), %ymm0
vextracti128 $0, %ymm0, %xmm0
vpextrq $1, %xmm0, %rax
nop
nop
nop
and $1782, %rbp
lea addresses_A_ht+0x815a, %rsi
lea addresses_WT_ht+0x74ba, %rdi
clflush (%rsi)
clflush (%rdi)
nop
nop
add %rbp, %rbp
mov $65, %rcx
rep movsb
and $15503, %r9
lea addresses_UC_ht+0x16cba, %rsi
lea addresses_UC_ht+0x5eda, %rdi
nop
nop
nop
nop
and %r12, %r12
mov $53, %rcx
rep movsw
cmp $52695, %rbp
lea addresses_WT_ht+0x1ae0e, %rsi
lea addresses_WC_ht+0x3dfa, %rdi
nop
nop
nop
nop
xor $61407, %rbp
mov $0, %rcx
rep movsb
nop
add $42013, %rax
lea addresses_A_ht+0x1e1ba, %rsi
lea addresses_normal_ht+0x1acba, %rdi
clflush (%rsi)
nop
nop
nop
xor $61300, %rax
mov $109, %rcx
rep movsq
add $18553, %rcx
lea addresses_UC_ht+0x18cf2, %rdi
nop
inc %r10
movb (%rdi), %cl
nop
nop
nop
nop
sub %rsi, %rsi
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %rax
pop %r9
pop %r12
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r11
push %r13
push %r8
push %rax
push %rbp
push %rsi
// Load
mov $0xedb80000000e9c, %rbp
clflush (%rbp)
nop
nop
nop
nop
cmp %rsi, %rsi
vmovaps (%rbp), %ymm3
vextracti128 $0, %ymm3, %xmm3
vpextrq $1, %xmm3, %r10
nop
nop
add %rsi, %rsi
// Store
lea addresses_WT+0xd8ca, %r11
nop
nop
nop
and %r8, %r8
mov $0x5152535455565758, %rsi
movq %rsi, (%r11)
nop
xor %rsi, %rsi
// Load
lea addresses_A+0x156ba, %r11
nop
nop
nop
and %rax, %rax
mov (%r11), %r10d
nop
and $27236, %r11
// Store
lea addresses_normal+0x7653, %r8
nop
nop
nop
nop
xor %rbp, %rbp
mov $0x5152535455565758, %r11
movq %r11, %xmm1
vmovups %ymm1, (%r8)
nop
xor %rax, %rax
// Store
lea addresses_WT+0x174ba, %rsi
nop
nop
and %rbp, %rbp
mov $0x5152535455565758, %rax
movq %rax, %xmm6
vmovups %ymm6, (%rsi)
nop
nop
nop
cmp $60160, %rax
// Store
lea addresses_WC+0x580a, %r10
nop
nop
nop
add %rbp, %rbp
mov $0x5152535455565758, %r13
movq %r13, %xmm3
vmovntdq %ymm3, (%r10)
nop
nop
nop
nop
inc %rbp
// Faulty Load
lea addresses_PSE+0x1cba, %r10
nop
nop
nop
and $37443, %rax
movb (%r10), %r8b
lea oracles, %r10
and $0xff, %r8
shlq $12, %r8
mov (%r10,%r8,1), %r8
pop %rsi
pop %rbp
pop %rax
pop %r8
pop %r13
pop %r11
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'congruent': 0, 'AVXalign': False, 'same': False, 'size': 16, 'NT': False, 'type': 'addresses_PSE'}, 'OP': 'LOAD'}
{'src': {'congruent': 0, 'AVXalign': True, 'same': False, 'size': 32, 'NT': False, 'type': 'addresses_NC'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 4, 'AVXalign': False, 'same': False, 'size': 8, 'NT': False, 'type': 'addresses_WT'}}
{'src': {'congruent': 8, 'AVXalign': False, 'same': False, 'size': 4, 'NT': False, 'type': 'addresses_A'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 0, 'AVXalign': False, 'same': False, 'size': 32, 'NT': False, 'type': 'addresses_normal'}}
{'OP': 'STOR', 'dst': {'congruent': 10, 'AVXalign': False, 'same': False, 'size': 32, 'NT': False, 'type': 'addresses_WT'}}
{'OP': 'STOR', 'dst': {'congruent': 3, 'AVXalign': False, 'same': False, 'size': 32, 'NT': True, 'type': 'addresses_WC'}}
[Faulty Load]
{'src': {'congruent': 0, 'AVXalign': False, 'same': True, 'size': 1, 'NT': False, 'type': 'addresses_PSE'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'congruent': 3, 'AVXalign': False, 'same': False, 'size': 1, 'NT': False, 'type': 'addresses_WT_ht'}}
{'src': {'congruent': 6, 'AVXalign': False, 'same': False, 'size': 2, 'NT': False, 'type': 'addresses_UC_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 8, 'AVXalign': False, 'same': False, 'size': 32, 'NT': False, 'type': 'addresses_D_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 5, 'same': False, 'type': 'addresses_A_ht'}, 'OP': 'REPM', 'dst': {'congruent': 10, 'same': False, 'type': 'addresses_WT_ht'}}
{'src': {'congruent': 11, 'same': False, 'type': 'addresses_UC_ht'}, 'OP': 'REPM', 'dst': {'congruent': 3, 'same': False, 'type': 'addresses_UC_ht'}}
{'src': {'congruent': 1, 'same': False, 'type': 'addresses_WT_ht'}, 'OP': 'REPM', 'dst': {'congruent': 6, 'same': False, 'type': 'addresses_WC_ht'}}
{'src': {'congruent': 8, 'same': False, 'type': 'addresses_A_ht'}, 'OP': 'REPM', 'dst': {'congruent': 11, 'same': False, 'type': 'addresses_normal_ht'}}
{'src': {'congruent': 1, 'AVXalign': False, 'same': False, 'size': 1, 'NT': False, 'type': 'addresses_UC_ht'}, 'OP': 'LOAD'}
{'33': 143}
33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33
*/
| 22.451327 | 428 | 0.648404 |
7e43655b9c42bd85fa6837c9b1c748af1f2e2929 | 6,995 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0.log_21829_978.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0.log_21829_978.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0.log_21829_978.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r11
push %r12
push %r13
push %r14
push %r9
push %rcx
push %rdi
push %rsi
lea addresses_normal_ht+0x1c8b0, %r9
nop
nop
nop
nop
nop
cmp $25605, %r10
mov (%r9), %r14w
nop
nop
nop
and $42220, %r11
lea addresses_UC_ht+0x16e47, %r12
cmp $49251, %rdi
mov (%r12), %r13d
nop
nop
nop
nop
nop
xor $22003, %r14
lea addresses_WT_ht+0x173e3, %r13
nop
cmp %rdi, %rdi
mov $0x6162636465666768, %r14
movq %r14, %xmm1
vmovups %ymm1, (%r13)
nop
nop
nop
lfence
lea addresses_WT_ht+0xaad7, %r10
nop
add $21292, %rdi
mov (%r10), %r11d
nop
nop
nop
nop
dec %r13
lea addresses_normal_ht+0xa443, %rsi
lea addresses_normal_ht+0x1afb9, %rdi
nop
nop
nop
nop
dec %r10
mov $119, %rcx
rep movsb
nop
nop
nop
nop
dec %r10
lea addresses_WT_ht+0xa143, %r12
nop
nop
nop
dec %rcx
mov $0x6162636465666768, %r9
movq %r9, %xmm6
movups %xmm6, (%r12)
cmp $46435, %r9
pop %rsi
pop %rdi
pop %rcx
pop %r9
pop %r14
pop %r13
pop %r12
pop %r11
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r13
push %r14
push %r8
push %r9
push %rax
push %rbx
push %rcx
// Store
lea addresses_normal+0xb243, %rax
nop
nop
nop
cmp $993, %r8
movl $0x51525354, (%rax)
nop
nop
cmp $16359, %rbx
// Store
lea addresses_RW+0x17843, %r8
nop
nop
sub $34115, %rax
movb $0x51, (%r8)
sub %r8, %r8
// Store
lea addresses_normal+0x6a43, %r8
nop
nop
nop
inc %r14
movw $0x5152, (%r8)
nop
nop
nop
nop
dec %r13
// Store
lea addresses_PSE+0x17c73, %rbx
nop
nop
add $13504, %r13
mov $0x5152535455565758, %rax
movq %rax, (%rbx)
nop
nop
inc %r9
// Store
lea addresses_PSE+0x6443, %rbx
nop
cmp %r14, %r14
mov $0x5152535455565758, %rax
movq %rax, %xmm7
movntdq %xmm7, (%rbx)
nop
nop
nop
xor $60274, %r9
// Store
lea addresses_WT+0x5cc3, %rcx
nop
nop
nop
nop
sub %r9, %r9
mov $0x5152535455565758, %r8
movq %r8, (%rcx)
nop
nop
nop
nop
nop
sub %r9, %r9
// Faulty Load
lea addresses_normal+0x1fc43, %r13
nop
nop
nop
nop
nop
add %r9, %r9
vmovups (%r13), %ymm3
vextracti128 $1, %ymm3, %xmm3
vpextrq $1, %xmm3, %rcx
lea oracles, %r13
and $0xff, %rcx
shlq $12, %rcx
mov (%r13,%rcx,1), %rcx
pop %rcx
pop %rbx
pop %rax
pop %r9
pop %r8
pop %r14
pop %r13
ret
/*
<gen_faulty_load>
[REF]
{'src': {'NT': True, 'same': False, 'congruent': 0, 'type': 'addresses_normal', 'AVXalign': False, 'size': 1}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 9, 'type': 'addresses_normal', 'AVXalign': False, 'size': 4}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 8, 'type': 'addresses_RW', 'AVXalign': False, 'size': 1}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 7, 'type': 'addresses_normal', 'AVXalign': True, 'size': 2}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 4, 'type': 'addresses_PSE', 'AVXalign': False, 'size': 8}}
{'OP': 'STOR', 'dst': {'NT': True, 'same': False, 'congruent': 10, 'type': 'addresses_PSE', 'AVXalign': False, 'size': 16}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 7, 'type': 'addresses_WT', 'AVXalign': False, 'size': 8}}
[Faulty Load]
{'src': {'NT': False, 'same': True, 'congruent': 0, 'type': 'addresses_normal', 'AVXalign': False, 'size': 32}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'NT': True, 'same': False, 'congruent': 0, 'type': 'addresses_normal_ht', 'AVXalign': False, 'size': 2}, 'OP': 'LOAD'}
{'src': {'NT': True, 'same': False, 'congruent': 1, 'type': 'addresses_UC_ht', 'AVXalign': False, 'size': 4}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 4, 'type': 'addresses_WT_ht', 'AVXalign': False, 'size': 32}}
{'src': {'NT': False, 'same': True, 'congruent': 2, 'type': 'addresses_WT_ht', 'AVXalign': False, 'size': 4}, 'OP': 'LOAD'}
{'src': {'same': False, 'congruent': 11, 'type': 'addresses_normal_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 1, 'type': 'addresses_normal_ht'}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': True, 'congruent': 5, 'type': 'addresses_WT_ht', 'AVXalign': False, 'size': 16}}
{'34': 21829}
34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34
*/
| 32.840376 | 2,999 | 0.656755 |
548e87c805698337a77ee0e4a0ba057aa01bc72f | 413 | asm | Assembly | oeis/106/A106256.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/106/A106256.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/106/A106256.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A106256: Numbers n such that 12*n^2 + 13 is a square.
; Submitted by Jon Maiga
; 1,3,17,43,237,599,3301,8343,45977,116203,640377,1618499,8919301,22542783,124229837,313980463,1730298417,4373183699,24099948001,60910591323,335668973597,848375094823,4675265682357,11816340736199
lpb $0
sub $3,$0
sub $0,1
add $2,1
trn $3,$0
mov $1,$3
mul $1,12
add $2,1
add $2,$1
add $3,$2
lpe
mov $0,$2
add $0,1
| 22.944444 | 195 | 0.702179 |
833eac04d2c5c71131832013b2ccb82abcfdc3b6 | 1,281 | asm | Assembly | programs/oeis/209/A209721.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/209/A209721.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/209/A209721.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A209721: 1/4 the number of (n+1) X 3 0..2 arrays with every 2 X 2 subblock having distinct clockwise edge differences.
; 3,4,5,7,9,13,17,25,33,49,65,97,129,193,257,385,513,769,1025,1537,2049,3073,4097,6145,8193,12289,16385,24577,32769,49153,65537,98305,131073,196609,262145,393217,524289,786433,1048577,1572865,2097153,3145729,4194305,6291457,8388609,12582913,16777217,25165825,33554433,50331649,67108865,100663297,134217729,201326593,268435457,402653185,536870913,805306369,1073741825,1610612737,2147483649,3221225473,4294967297,6442450945,8589934593,12884901889,17179869185,25769803777,34359738369,51539607553,68719476737,103079215105,137438953473,206158430209,274877906945,412316860417,549755813889,824633720833,1099511627777,1649267441665,2199023255553,3298534883329,4398046511105,6597069766657,8796093022209,13194139533313,17592186044417,26388279066625,35184372088833,52776558133249,70368744177665,105553116266497,140737488355329,211106232532993,281474976710657,422212465065985,562949953421313,844424930131969,1125899906842625,1688849860263937,2251799813685249,3377699720527873,4503599627370497,6755399441055745,9007199254740993
mov $2,$0
mod $0,2
mul $2,2
add $2,4
mov $3,$0
mov $0,$2
add $0,15
lpb $0,1
sub $0,4
mov $1,$3
mul $3,2
add $3,2
lpe
div $1,16
add $1,2
| 67.421053 | 1,014 | 0.837627 |
eb588a9da6ebad4ba9dfa6facf9aa4c2c4ab6a53 | 9,590 | asm | Assembly | smsq/qxl/comm/scrcopy.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | smsq/qxl/comm/scrcopy.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | smsq/qxl/comm/scrcopy.asm | olifink/smsqe | c546d882b26566a46d71820d1539bed9ea8af108 | [
"BSD-2-Clause"
] | null | null | null | ; SMS (QXL) Screen Copy Routine
; 2006.10.01 1.01 bugfix for correct copy loop (BC)
section comm
xdef qxl_scrcopy
include 'dev8_smsq_qxl_keys'
include 'dev8_smsq_qxl_comm_keys'
include 'dev8_keys_sys'
qsc.scinc equ 7 ; scan increment
qsc.sci2 equ 2 ; scan start increment
;+++
; This routine sets up interrupt server messages for copying the screen
;
; d0/d1/d2/d3/d4/d5/d6/d7/a0/a1/a2/a3/a4/a5 smashed
;
;---
qxl_scrcopy
move.l qxl_scr_work,a5
tst.b qxl_vhold(a5) ; mode change in progress?
bne.l qsc_exit ; ... yes
move.b qxl_vcopy(a5),d4 ; max lines to copy
qsc_retry
move.l qxl_cpyb(a5),d3 ; base of copy area
beq.l qsc_exit
moveq #0,d2
move.w qxl_scrl(a5),d2 ; length of line
move.w qxl_scrp(a5),d1 ; previous line
; bmi.l qsc_fcopy ; force copy
move.b qxl_vchek(a5),d5 ; try up to n lines
bge.l qsc_ckle ; OK
moveq #0,d5
addq.b #1,qxl_vchek(a5)
qsc_lnloop
tst.w qxl_vfine(a5) ; fine search?
beq.s qsc_lnskip ; ... no
addq.w #1,d1 ; next
cmp.w qxl_scry(a5),d1 ; off end?
blo.s qsc_setup ; ... no
clr.w qxl_vfine(a5) ; ... yes, reset
bra.s qsc_lnlast
qsc_lnskip
addq.w #qsc.scinc,d1 ; next line (coarse)
cmp.w qxl_scry(a5),d1 ; off end?
blo.s qsc_setup
qsc_lnlast
sub.w qxl_scry(a5),d1 ; start again here
qsc_setup
move.w d2,d0
mulu d1,d0 ; offset from base
move.l qxl_scrb(a5),a0
add.l d0,a0
move.l qxl_cpyb(a5),a1 ; base of copy area
add.l d0,a1
moveq #0,d6
move.w d2,d0
subq.w #8,d0
lsr.w #4,d0 ; blocks to compare - half a block
bcc.s qsc_ckl2 ; half block extra
qsc_ckl
move.l (a0)+,d6
sub.l (a1)+,d6 ; difference
move.l (a0)+,d7
sub.l (a1)+,d7 ; difference
or.l d7,d6 ; accumulated
qsc_ckl2
move.l (a0)+,d7
sub.l (a1)+,d7 ; difference
or.l d7,d6 ; accumulated
move.l (a0)+,d7
sub.l (a1)+,d7 ; difference
or.l d7,d6 ; accumulated
dbne d0,qsc_ckl
beq.s qsc_cknc ; no change
tst.w qxl_vfine(a5) ; changed, was it fine?
bne.s qsc_uline ; ... yes, update the line
move.w #qsc.scinc*3/2,qxl_vfine(a5) ; scinc+ misses before reverting
move.w d1,d0 ; changed line
move.w qxl_scrp(a5),d1 ; previous line
cmp.w d0,d1 ; is previous above changed?
blo.s qsc_lnloop
moveq #0,d1 ; start at top
bra.s qsc_setup
qsc_cknc
tst.w qxl_vfine(a5) ; not changed, was it fine?
beq.s qsc_ckle ; ... no
subq.w #1,qxl_vfine(a5) ; ... yes, count down
qsc_ckle
move.w d1,qxl_scrp(a5) ; save current line as previous
subq.b #1,d5
bcc qsc_lnloop ; unchanged, try again
qsc_exit
rts
;qsc_fcopy
; addq.w #1,qxl_scrp(a5) ; next line, when zero, reverts to normal
; move.w d2,d0 ; qxl line length
; add.w qxl_scry(a5),d1 ; our line to copy
; mulu d1,d2 ; offset in screen
; mulu qxl_vgal(a5),d1 ; ... in vga
; add.w qxl_vga0(a5),d1 ; +base in vga (zero for all large screens)
; move.l qxl_scrb(a5),a3 ; screen
; add.l d2,a3
; move.l d3,a4
; add.l d2,a4 ; copy
; moveq #0,d2 ; no vga offset
; bra.s qsc_copycnv ; copy converting
qsc_uline
move.w d1,qxl_scrp(a5) ; save current line
mulu qxl_vgal(a5),d1 ; offset
add.w qxl_vga0(a5),d1 ; + base of vga memory (zero for large screens)
lsl.w #4,d0 ; nr 16 byte checks left to bytes
sub.w #16,d2 ; start of last 16 byte group
sub.w d0,d2 ; offset to start of run
lea -16(a0),a3 ; save start of run on screen
lea -16(a1),a4 ; save start of run in copy
add.w d0,a0 ; end of line on screen
add.w d0,a1 ; end of line in copy
tst.w d2 ; start below start of line?
bpl.s qsc_fel ; ... no
addq.l #8,a3 ; yes, it must have been start of line 800x600
addq.l #8,a4
moveq #0,d2 ; start of run on vga
qsc_fel
move.l -(a0),d6 ; compare 4 bytes
sub.l -(a1),d6
move.l -(a0),d7 ; and another 4
sub.l -(a1),d7
or.l d6,d7
beq.s qsc_fel ; look backwards for first different
sub.l a3,a0 ; length of different bit - 8
move.w a0,d0
addq.w #8,d0
; d0 QXL bytes in run
; d1 VGA address of start of line
; d2 QXL offset of start of run in line
; a3 QXL screen
; a4 Copy screen
qsc_copycnv
move.w qxl_vconv(a5),d7
beq.l qsc_copy
lsr.w #1,d0 ; ... run in words in QL, bytes VGA
lsr.w #1,d2 ; ... offset in words in QL, bytes VGA
add.l d2,d1 ; start of run
move.w d1,d2
add.w d0,d2 ; run crosses 64k boundary?
bcc.s qsc_copy48 ; ... no
sub.w d2,d0 ; ... yes, shorten run
subq.w #1,qxl_scrp(a5) ; redo this line
qsc_copy48
cmp.w #qxl.vc8vga,d7 ; mode 8?
beq.s qsc_copy8 ; ... yes
moveq #qxm_vdat,d7 ; headers
add.w d0,d7
move.l d7,d6
add.l d7,d6
move.l qxl_qxpc_mess,a2
move.l qxl_qxpc_eom(a2),a0 ; start of next message
add.l a0,d6 ; end of message
cmp.l qxl_qxpc_eob(a2),d6
bgt.l qsc_no_copy
move.l d6,qxl_qxpc_eom(a2)
lea (a0,d7.l),a1 ; start of second plane
move.w #qxm.pplu<<8+1,(a0)+; first plane flags
move.w #qxm.pplu<<8+2,(a1)+; second plane flags
move.l d1,(a0)+ ; window and start address
move.l d1,(a1)+ ; window and start address
lsr.w #1,d0 ; vga words
move.w d0,(a0)+ ; length
move.w d0,(a1)+
subq.w #1,d0 ; copy loop length -1
qsc_loop4
move.l (a3),(a4)+ ; update copy screen
move.b (a3)+,(a1)+ ; green
move.b (a3)+,(a0)+ ; red
move.b (a3)+,(a1)+
move.b (a3)+,(a0)+
dbra d0,qsc_loop4
bra.l qsc_ecopy
qsc_copy8
movem.l a5/a6,-(sp)
lea qsc_grtab,a5
lea qsc_bftab,a6
moveq #qxm_vdat,d7 ; headers
add.w d0,d7
move.l d7,d6
add.l d7,d6
add.l d7,d6
move.l qxl_qxpc_mess,a2
move.l qxl_qxpc_eom(a2),a0 ; start of next message
add.l a0,d6 ; end of message
cmp.l qxl_qxpc_eob(a2),d6
bgt.l qsc_no_copy
move.l d6,qxl_qxpc_eom(a2)
lea (a0,d7.l),a1 ; start of second plane
lea (a1,d7.l),a2 ; third plane
move.w #qxm.pplu<<8+1,(a0)+; first plane flags
move.w #qxm.pplu<<8+2,(a1)+; second plane flags
move.w #qxm.pplu<<8+4,(a2)+; third plane flags
move.l d1,(a0)+ ; window and start address
move.l d1,(a1)+
move.l d1,(a2)+
lsr.w #1,d0 ; vga words
move.w d0,(a0)+ ; length
move.w d0,(a1)+
move.w d0,(a2)+
subq.w #1,d0 ; copy loop length -1
moveq #0,d1
qsc_loop8
move.b (a3)+,d1 ; get green
move.b d1,(a4)+ ; update copy screen
move.b (a5,d1.w),(a1)+
move.b (a3)+,d1 ; get red/blue
move.b d1,(a4)+ ; update copy screen
move.b (a5,d1.w),(a0)+ ; red
move.b (a6,d1.w),(a2)+ ; blue
move.b (a3)+,d1 ; get green
move.b d1,(a4)+ ; update copy screen
move.b (a5,d1.w),(a1)+
move.b (a3)+,d1 ; get red/blue
move.b d1,(a4)+ ; update copy screen
move.b (a5,d1.w),(a0)+ ; red
move.b (a6,d1.w),(a2)+ ; blue
dbra d0,qsc_loop8
movem.l (sp)+,a5/a6
bra.s qsc_ecopy
;
; simple copy data
;
qsc_copy
add.l d2,d1 ; start of run
move.w d1,d2
add.w d0,d2 ; run crosses 64k boundary?
bcc.s qsc_copys ; ... no
sub.w d2,d0 ; ... yes, shorten run
subq.w #1,qxl_scrp(a5) ; redo this line
qsc_copys
moveq #qxm_vdat,d6 ; header
add.w d0,d6
move.l qxl_qxpc_mess,a2
move.l qxl_qxpc_eom(a2),a0 ; start of next message
add.l a0,d6 ; end of message
cmp.l qxl_qxpc_eob(a2),d6
bgt.s qsc_no_copy
move.l d6,qxl_qxpc_eom(a2)
move.w #qxm.pkpu<<8,(a0)+; packed pixel flags
move.l d1,(a0)+ ; window and start address
lsr.w #1,d0 ; vga words
move.w d0,(a0)+ ; length
lsr.w #2,d0 ; v. 1.01 bugfix
subq.w #1,d0 ; copy loop length -1
qsc_loops
move.l (a3),(a4)+ ; update copy screen
move.l (a3)+,(a0)+ ; copy 8 bytes at a time
move.l (a3),(a4)+
move.l (a3)+,(a0)+
dbra d0,qsc_loops
qsc_ecopy
subq.b #1,d4 ; another to copy?
bne qsc_retry
qsc_no_copy
rts
qsc_grtab
dc.b $00,$00,$03,$03,$00,$00,$03,$03,$0C,$0C,$0F,$0F,$0C,$0C,$0F,$0F
dc.b $00,$00,$03,$03,$00,$00,$03,$03,$0C,$0C,$0F,$0F,$0C,$0C,$0F,$0F
dc.b $30,$30,$33,$33,$30,$30,$33,$33,$3C,$3C,$3F,$3F,$3C,$3C,$3F,$3F
dc.b $30,$30,$33,$33,$30,$30,$33,$33,$3C,$3C,$3F,$3F,$3C,$3C,$3F,$3F
dc.b $00,$00,$03,$03,$00,$00,$03,$03,$0C,$0C,$0F,$0F,$0C,$0C,$0F,$0F
dc.b $00,$00,$03,$03,$00,$00,$03,$03,$0C,$0C,$0F,$0F,$0C,$0C,$0F,$0F
dc.b $30,$30,$33,$33,$30,$30,$33,$33,$3C,$3C,$3F,$3F,$3C,$3C,$3F,$3F
dc.b $30,$30,$33,$33,$30,$30,$33,$33,$3C,$3C,$3F,$3F,$3C,$3C,$3F,$3F
dc.b $C0,$C0,$C3,$C3,$C0,$C0,$C3,$C3,$CC,$CC,$CF,$CF,$CC,$CC,$CF,$CF
dc.b $C0,$C0,$C3,$C3,$C0,$C0,$C3,$C3,$CC,$CC,$CF,$CF,$CC,$CC,$CF,$CF
dc.b $F0,$F0,$F3,$F3,$F0,$F0,$F3,$F3,$FC,$FC,$FF,$FF,$FC,$FC,$FF,$FF
dc.b $F0,$F0,$F3,$F3,$F0,$F0,$F3,$F3,$FC,$FC,$FF,$FF,$FC,$FC,$FF,$FF
dc.b $C0,$C0,$C3,$C3,$C0,$C0,$C3,$C3,$CC,$CC,$CF,$CF,$CC,$CC,$CF,$CF
dc.b $C0,$C0,$C3,$C3,$C0,$C0,$C3,$C3,$CC,$CC,$CF,$CF,$CC,$CC,$CF,$CF
dc.b $F0,$F0,$F3,$F3,$F0,$F0,$F3,$F3,$FC,$FC,$FF,$FF,$FC,$FC,$FF,$FF
dc.b $F0,$F0,$F3,$F3,$F0,$F0,$F3,$F3,$FC,$FC,$FF,$FF,$FC,$FC,$FF,$FF
qsc_bftab
dc.b $00,$03,$00,$03,$0C,$0F,$0C,$0F,$00,$03,$00,$03,$0C,$0F,$0C,$0F
dc.b $30,$33,$30,$33,$3C,$3F,$3C,$3F,$30,$33,$30,$33,$3C,$3F,$3C,$3F
dc.b $00,$03,$00,$03,$0C,$0F,$0C,$0F,$00,$03,$00,$03,$0C,$0F,$0C,$0F
dc.b $30,$33,$30,$33,$3C,$3F,$3C,$3F,$30,$33,$30,$33,$3C,$3F,$3C,$3F
dc.b $C0,$C3,$C0,$C3,$CC,$CF,$CC,$CF,$C0,$C3,$C0,$C3,$CC,$CF,$CC,$CF
dc.b $F0,$F3,$F0,$F3,$FC,$FF,$FC,$FF,$F0,$F3,$F0,$F3,$FC,$FF,$FC,$FF
dc.b $C0,$C3,$C0,$C3,$CC,$CF,$CC,$CF,$C0,$C3,$C0,$C3,$CC,$CF,$CC,$CF
dc.b $F0,$F3,$F0,$F3,$FC,$FF,$FC,$FF,$F0,$F3,$F0,$F3,$FC,$FF,$FC,$FF
dc.b $00,$03,$00,$03,$0C,$0F,$0C,$0F,$00,$03,$00,$03,$0C,$0F,$0C,$0F
dc.b $30,$33,$30,$33,$3C,$3F,$3C,$3F,$30,$33,$30,$33,$3C,$3F,$3C,$3F
dc.b $00,$03,$00,$03,$0C,$0F,$0C,$0F,$00,$03,$00,$03,$0C,$0F,$0C,$0F
dc.b $30,$33,$30,$33,$3C,$3F,$3C,$3F,$30,$33,$30,$33,$3C,$3F,$3C,$3F
dc.b $C0,$C3,$C0,$C3,$CC,$CF,$CC,$CF,$C0,$C3,$C0,$C3,$CC,$CF,$CC,$CF
dc.b $F0,$F3,$F0,$F3,$FC,$FF,$FC,$FF,$F0,$F3,$F0,$F3,$FC,$FF,$FC,$FF
dc.b $C0,$C3,$C0,$C3,$CC,$CF,$CC,$CF,$C0,$C3,$C0,$C3,$CC,$CF,$CC,$CF
dc.b $F0,$F3,$F0,$F3,$FC,$FF,$FC,$FF,$F0,$F3,$F0,$F3,$FC,$FF,$FC,$FF
end
| 27.959184 | 71 | 0.624713 |
66a7370a737d6468dc3265981bf4e9e163a12ccb | 3,860 | asm | Assembly | src/lzgmini.asm | giomba/snake6502 | a82c9e94fedbd0398b248ed73e2336262e86f10f | [
"Zlib"
] | 1 | 2020-04-24T22:28:18.000Z | 2020-04-24T22:28:18.000Z | src/lzgmini.asm | giomba/snake6502 | a82c9e94fedbd0398b248ed73e2336262e86f10f | [
"Zlib"
] | null | null | null | src/lzgmini.asm | giomba/snake6502 | a82c9e94fedbd0398b248ed73e2336262e86f10f | [
"Zlib"
] | null | null | null | inflate SUBROUTINE
.inEnd EQU 2
.offset EQU 4
.length EQU 6
.symbol EQU 25
.marker1 EQU 30
.marker2 EQU 31
.marker3 EQU 32
.marker4 EQU 33
.copy EQU 34
clc
ldy #10
lda (srcPointer),y
adc srcPointer
sta .inEnd
dey
lda (srcPointer),y
adc srcPointer + 1
sta .inEnd + 1
clc
lda .inEnd
adc #16
sta .inEnd
lda .inEnd + 1
adc #0
sta .inEnd + 1
; Get the marker symbols
ldy #16
lda (srcPointer),y
sta .marker1
iny
lda (srcPointer),y
sta .marker2
iny
lda (srcPointer),y
sta .marker3
iny
lda (srcPointer),y
sta .marker4
; Skip header + marker symbols (16 + 4 bytes)
clc
lda srcPointer
adc #20
sta srcPointer
lda srcPointer + 1
adc #0
sta srcPointer + 1
; Main decompression loop
ldy #0 ; Make sure that Y is zero
.mainloop:
lda srcPointer ; done?
cmp .inEnd
bne .notdone
lda srcPointer + 1
cmp .inEnd + 1
bne .notdone
rts
.notdone:
lda (srcPointer),y ; A = symbol
sta .symbol
sta $d020
inc srcPointer
bne .noinc1
inc srcPointer + 1
.noinc1:
cmp .marker1 ; Marker1?
beq .domarker1
cmp .marker2 ; Marker2?
beq .domarker2
cmp .marker3 ; Marker3?
beq .domarker3
cmp .marker4 ; Marker4?
beq .domarker4
.literal:
lda .symbol
sta (dstPointer),y ; Plain copy
inc dstPointer
bne .mainloop
inc dstPointer + 1
bne .mainloop
.domarker1:
jmp .domarker1b
; marker4 - "Near copy (incl. RLE)"
.domarker4:
lda (srcPointer),y
inc srcPointer
bne .noinc3
inc srcPointer + 1
.noinc3:
cmp #0
beq .literal ; Single occurance of the marker symbol (rare)
tax
lsr
lsr
lsr
lsr
lsr
sta .offset
inc .offset
lda #0
sta .offset + 1 ; offset = (b >> 5) + 1
txa
and #$1f
tax
lda .LZG_LENGTH_DECODE_LUT,x
sta .length ; length = .LZG_LENGTH_DECODE_LUT[b & 0x1f]
jmp .docopy
; marker3 - "Short copy"
.domarker3:
lda (srcPointer),y
inc srcPointer
bne .noinc4
inc srcPointer + 1
.noinc4:
cmp #0
beq .literal ; Single occurance of the marker symbol (rare)
tax
lsr
lsr
lsr
lsr
lsr
lsr
clc
adc #3
sta .length ; length = (b >> 6) + 3
txa
and #$3f
adc #8
sta .offset
lda #0
sta .offset + 1 ; offset = (b & 0x3f) + 8
beq .docopy
; marker2 - "Medium copy"
.domarker2:
lda (srcPointer),y
inc srcPointer
bne .noinc5
inc srcPointer + 1
.noinc5:
cmp #0
beq .literal ; Single occurance of the marker symbol (rare)
tax
lsr
lsr
lsr
lsr
lsr
sta .offset + 1
lda (srcPointer),y
inc srcPointer
bne .noinc6
inc srcPointer + 1
.noinc6:
clc
adc #8
sta .offset
bcc .noinc7
inc .offset + 1 ; offset = (((b & 0xe0) << 3) | b2) + 8
.noinc7:
txa
and #$1f
tax
lda .LZG_LENGTH_DECODE_LUT,x
sta .length ; length = .LZG_LENGTH_DECODE_LUT[b & 0x1f]
bne .docopy
.literal2:
jmp .literal
; marker1 - "Distant copy"
.domarker1b:
lda (srcPointer),y
inc srcPointer
bne .noinc8
inc srcPointer + 1
.noinc8:
cmp #0
beq .literal2 ; Single occurance of the marker symbol (rare)
and #$1f
tax
lda .LZG_LENGTH_DECODE_LUT,x
sta .length ; length = .LZG_LENGTH_DECODE_LUT[b & 0x1f]
lda (srcPointer),y
inc srcPointer
bne .noinc9
inc srcPointer + 1
.noinc9:
sta .offset + 1
lda (srcPointer),y
inc srcPointer
bne .noinc10
inc srcPointer + 1
.noinc10:
clc
adc #$08
sta .offset
lda .offset + 1
adc #$08
sta .offset + 1 ; offset = ((b2 << 8) | (*src++)) + 2056
; Copy corresponding data from history window
.docopy:
sec
lda dstPointer
sbc .offset
sta .copy
lda dstPointer + 1
sbc .offset + 1
sta .copy + 1
.loop1:
lda (.copy),y
sta (dstPointer),y
iny
cpy .length
bne .loop1
ldy #0 ; Make sure that Y is zero
clc
lda dstPointer
adc .length
sta dstPointer
bcc .noinc11
inc dstPointer + 1
.noinc11:
jmp .mainloop
; Lookup Table for decoding the copy length parameter
.LZG_LENGTH_DECODE_LUT
BYTE 2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,35,48,72,128
| 15.884774 | 97 | 0.665803 |
610ba14cbd0f4c7dcd0eac438bff4f501b560132 | 273,811 | asm | Assembly | roms/pong1k.asm | mattconsto/nes | 5107ead254a74492335414461a2ae8401d8bcbeb | [
"MIT"
] | 4 | 2015-03-24T14:07:34.000Z | 2018-09-05T18:06:08.000Z | roms/pong1k.asm | mattconsto/nes | 5107ead254a74492335414461a2ae8401d8bcbeb | [
"MIT"
] | null | null | null | roms/pong1k.asm | mattconsto/nes | 5107ead254a74492335414461a2ae8401d8bcbeb | [
"MIT"
] | null | null | null | 00000000: 4E4553 LSR $5345
00000003: 1A .DB $1A
00000004: 0100 ORA ($00,X)
00000006: 0100 ORA ($00,X)
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00003C0F: 00 BRK
00003C10: 78 SEI
00003C11: A2FF LDX #$FF
00003C13: 9A TXS
00003C14: E8 INX
00003C15: 8E0020 STX $2000
00003C18: 8E0120 STX $2001
00003C1B: 2C0220 BIT $2002
00003C1E: 10FB BPL $FB
00003C20: 8A TXA
00003C21: 8501 STA $01
00003C23: 8502 STA $02
00003C25: 9101 STA ($01),Y
00003C27: C8 INY
00003C28: D0FB BNE $FB
00003C2A: E602 INC $02
00003C2C: CA DEX
00003C2D: D0F6 BNE $F6
00003C2F: A8 TAY
00003C30: 8D0720 STA $2007
00003C33: CA DEX
00003C34: D0FA BNE $FA
00003C36: 88 DEY
00003C37: D0F7 BNE $F7
00003C39: A900 LDA #$00
00003C3B: 8D0620 STA $2006
00003C3E: A910 LDA #$10
00003C40: 8D0620 STA $2006
00003C43: A9FF LDA #$FF
00003C45: 8D0720 STA $2007
00003C48: E8 INX
00003C49: E010 CPX #$10
00003C4B: D0F6 BNE $F6
00003C4D: A93F LDA #$3F
00003C4F: 8D0620 STA $2006
00003C52: A900 LDA #$00
00003C54: 8D0620 STA $2006
00003C57: A90F LDA #$0F
00003C59: 8D0720 STA $2007
00003C5C: A93F LDA #$3F
00003C5E: 8D0620 STA $2006
00003C61: A911 LDA #$11
00003C63: 8D0620 STA $2006
00003C66: A90F LDA #$0F
00003C68: 8D0720 STA $2007
00003C6B: A930 LDA #$30
00003C6D: 8D0720 STA $2007
00003C70: A200 LDX #$00
00003C72: A921 LDA #$21
00003C74: 8D0620 STA $2006
00003C77: A900 LDA #$00
00003C79: 8D0620 STA $2006
00003C7C: A901 LDA #$01
00003C7E: 8D0720 STA $2007
00003C81: E8 INX
00003C82: E020 CPX #$20
00003C84: D0F6 BNE $F6
00003C86: A200 LDX #$00
00003C88: A923 LDA #$23
00003C8A: 8D0620 STA $2006
00003C8D: A980 LDA #$80
00003C8F: 8D0620 STA $2006
00003C92: A901 LDA #$01
00003C94: 8D0720 STA $2007
00003C97: E8 INX
00003C98: E020 CPX #$20
00003C9A: D0F6 BNE $F6
00003C9C: A200 LDX #$00
00003C9E: BD5AFF LDA $FF5A,X
00003CA1: 9D0002 STA $0200,X
00003CA4: BDBAFE LDA $FEBA,X
00003CA7: 9517 STA $17,X
00003CA9: E8 INX
00003CAA: E09C CPX #$9C
00003CAC: D0F0 BNE $F0
00003CAE: A901 LDA #$01
00003CB0: 8516 STA $16
00003CB2: 2C0220 BIT $2002
00003CB5: 10FB BPL $FB
00003CB7: A980 LDA #$80
00003CB9: 8D0020 STA $2000
00003CBC: A91A LDA #$1A
00003CBE: 8D0120 STA $2001
00003CC1: A503 LDA $03
00003CC3: 2908 AND #$08
00003CC5: F008 BEQ $08
00003CC7: A500 LDA $00
00003CC9: C500 CMP $00
00003CCB: F0FC BEQ $FC
00003CCD: D002 BNE $02
00003CCF: F0F0 BEQ $F0
00003CD1: A414 LDY $14
00003CD3: BE50FF LDX $FF50,Y
00003CD6: A000 LDY #$00
00003CD8: B500 LDA $00,X
00003CDA: 990102 STA $0201,Y
00003CDD: E8 INX
00003CDE: C8 INY
00003CDF: C8 INY
00003CE0: C8 INY
00003CE1: C8 INY
00003CE2: C03C CPY #$3C
00003CE4: D0F2 BNE $F2
00003CE6: A514 LDA $14
00003CE8: C909 CMP #$09
00003CEA: D003 BNE $03
00003CEC: 4CB7FE JMP $FEB7
00003CEF: A415 LDY $15
00003CF1: BE50FF LDX $FF50,Y
00003CF4: A000 LDY #$00
00003CF6: B500 LDA $00,X
00003CF8: 993D02 STA $023D,Y
00003CFB: E8 INX
00003CFC: C8 INY
00003CFD: C8 INY
00003CFE: C8 INY
00003CFF: C8 INY
00003D00: C03C CPY #$3C
00003D02: D0F2 BNE $F2
00003D04: A515 LDA $15
00003D06: C909 CMP #$09
00003D08: D003 BNE $03
00003D0A: 4CB7FE JMP $FEB7
00003D0D: A507 LDA $07
00003D0F: C908 CMP #$08
00003D11: D005 BNE $05
00003D13: E615 INC $15
00003D15: 2091FE JSR $FE91
00003D18: A508 LDA $08
00003D1A: C9F8 CMP #$F8
00003D1C: D005 BNE $05
00003D1E: E614 INC $14
00003D20: 2091FE JSR $FE91
00003D23: A200 LDX #$00
00003D25: 860B STX $0B
00003D27: B503 LDA $03,X
00003D29: 2910 AND #$10
00003D2B: F02E BEQ $2E
00003D2D: A60B LDX $0B
00003D2F: F015 BEQ $15
00003D31: AD8802 LDA $0288
00003D34: C947 CMP #$47
00003D36: F023 BEQ $23
00003D38: CE8802 DEC $0288
00003D3B: CE8C02 DEC $028C
00003D3E: CE9002 DEC $0290
00003D41: CE9402 DEC $0294
00003D44: D015 BNE $15
00003D46: AD7802 LDA $0278
00003D49: C947 CMP #$47
00003D4B: F00E BEQ $0E
00003D4D: CE7802 DEC $0278
00003D50: CE7C02 DEC $027C
00003D53: CE8002 DEC $0280
00003D56: CE8402 DEC $0284
00003D59: D032 BNE $32
00003D5B: B503 LDA $03,X
00003D5D: 2920 AND #$20
00003D5F: F02C BEQ $2C
00003D61: A60B LDX $0B
00003D63: F015 BEQ $15
00003D65: AD9402 LDA $0294
00003D68: C9D7 CMP #$D7
00003D6A: F021 BEQ $21
00003D6C: EE8802 INC $0288
00003D6F: EE8C02 INC $028C
00003D72: EE9002 INC $0290
00003D75: EE9402 INC $0294
00003D78: D013 BNE $13
00003D7A: AD8402 LDA $0284
00003D7D: C9D7 CMP #$D7
00003D7F: F00C BEQ $0C
00003D81: EE7802 INC $0278
00003D84: EE7C02 INC $027C
00003D87: EE8002 INC $0280
00003D8A: EE8402 INC $0284
00003D8D: A507 LDA $07
00003D8F: D50E CMP $0E,X
00003D91: B038 BCS $38
00003D93: A508 LDA $08
00003D95: D50C CMP $0C,X
00003D97: 9032 BCC $32
00003D99: A509 LDA $09
00003D9B: D512 CMP $12,X
00003D9D: B02C BCS $2C
00003D9F: A50A LDA $0A
00003DA1: D510 CMP $10,X
00003DA3: 9026 BCC $26
00003DA5: A60B LDX $0B
00003DA7: F012 BEQ $12
00003DA9: A516 LDA $16
00003DAB: C903 CMP #$03
00003DAD: D006 BNE $06
00003DAF: A901 LDA #$01
00003DB1: 8516 STA $16
00003DB3: D016 BNE $16
00003DB5: A902 LDA #$02
00003DB7: 8516 STA $16
00003DB9: D010 BNE $10
00003DBB: A516 LDA $16
00003DBD: C901 CMP #$01
00003DBF: D006 BNE $06
00003DC1: A903 LDA #$03
00003DC3: 8516 STA $16
00003DC5: D004 BNE $04
00003DC7: A904 LDA #$04
00003DC9: 8516 STA $16
00003DCB: E8 INX
00003DCC: 860B STX $0B
00003DCE: E001 CPX #$01
00003DD0: D003 BNE $03
00003DD2: 4C17FD JMP $FD17
00003DD5: AD9802 LDA $0298
00003DD8: C9D7 CMP #$D7
00003DDA: D012 BNE $12
00003DDC: A516 LDA $16
00003DDE: C901 CMP #$01
00003DE0: D006 BNE $06
00003DE2: A902 LDA #$02
00003DE4: 8516 STA $16
00003DE6: D006 BNE $06
00003DE8: A904 LDA #$04
00003DEA: 8516 STA $16
00003DEC: D000 BNE $00
00003DEE: C947 CMP #$47
00003DF0: D010 BNE $10
00003DF2: A516 LDA $16
00003DF4: C902 CMP #$02
00003DF6: D006 BNE $06
00003DF8: A901 LDA #$01
00003DFA: 8516 STA $16
00003DFC: D004 BNE $04
00003DFE: A903 LDA #$03
00003E00: 8516 STA $16
00003E02: 203AFE JSR $FE3A
00003E05: AD7802 LDA $0278
00003E08: 8510 STA $10
00003E0A: 18 CLC
00003E0B: 6920 ADC #$20
00003E0D: 8512 STA $12
00003E0F: AD7B02 LDA $027B
00003E12: 850C STA $0C
00003E14: 18 CLC
00003E15: 6908 ADC #$08
00003E17: 850E STA $0E
00003E19: AD8802 LDA $0288
00003E1C: 8511 STA $11
00003E1E: 18 CLC
00003E1F: 6920 ADC #$20
00003E21: 8513 STA $13
00003E23: AD8B02 LDA $028B
00003E26: 850D STA $0D
00003E28: 18 CLC
00003E29: 6908 ADC #$08
00003E2B: 850F STA $0F
00003E2D: AD9802 LDA $0298
00003E30: 8509 STA $09
00003E32: 18 CLC
00003E33: 6908 ADC #$08
00003E35: 850A STA $0A
00003E37: AD9B02 LDA $029B
00003E3A: 8507 STA $07
00003E3C: 18 CLC
00003E3D: 6908 ADC #$08
00003E3F: 8508 STA $08
00003E41: A500 LDA $00
00003E43: C500 CMP $00
00003E45: F0FC BEQ $FC
00003E47: 4CC1FC JMP $FCC1
00003E4A: A516 LDA $16
00003E4C: 0A ASL A
00003E4D: A8 TAY
00003E4E: B988FE LDA $FE88,Y
00003E51: 48 PHA
00003E52: B987FE LDA $FE87,Y
00003E55: 48 PHA
00003E56: 60 RTS
00003E57: 4C47FE JMP $FE47
00003E5A: 48 PHA
00003E5B: 8A TXA
00003E5C: 48 PHA
00003E5D: 98 TYA
00003E5E: 48 PHA
00003E5F: E600 INC $00
00003E61: A902 LDA #$02
00003E63: 8D1440 STA $4014
00003E66: A200 LDX #$00
00003E68: A901 LDA #$01
00003E6A: 8D1640 STA $4016
00003E6D: A900 LDA #$00
00003E6F: 8D1640 STA $4016
00003E72: B503 LDA $03,X
00003E74: A008 LDY #$08
00003E76: BD1640 LDA $4016,X
00003E79: 4A LSR A
00003E7A: 7603 ROR $03,X
00003E7C: 88 DEY
00003E7D: D0F7 BNE $F7
00003E7F: E8 INX
00003E80: E002 CPX #$02
00003E82: D0EE BNE $EE
00003E84: A90F LDA #$0F
00003E86: 8D1540 STA $4015
00003E89: A900 LDA #$00
00003E8B: 8D0520 STA $2005
00003E8E: 8D0520 STA $2005
00003E91: 68 PLA
00003E92: A8 TAY
00003E93: 68 PLA
00003E94: AA TAX
00003E95: 68 PLA
00003E96: 40 RTI
00003E97: 99FE9A STA $9AFE,Y
00003E9A: FEA1FE INC $FEA1,X
00003E9D: A8 TAY
00003E9E: FEAFFE INC $FEAF,X
00003EA1: A980 LDA #$80
00003EA3: 8D9802 STA $0298
00003EA6: 8D9B02 STA $029B
00003EA9: 60 RTS
00003EAA: 60 RTS
00003EAB: EE9802 INC $0298
00003EAE: CE9B02 DEC $029B
00003EB1: 60 RTS
00003EB2: CE9802 DEC $0298
00003EB5: CE9B02 DEC $029B
00003EB8: 60 RTS
00003EB9: EE9802 INC $0298
00003EBC: EE9B02 INC $029B
00003EBF: 60 RTS
00003EC0: CE9802 DEC $0298
00003EC3: EE9B02 INC $029B
00003EC6: 60 RTS
00003EC7: 4CB7FE JMP $FEB7
00003ECA: 0101 ORA ($01,X)
00003ECC: 0101 ORA ($01,X)
00003ECE: 00 BRK
00003ECF: 0101 ORA ($01,X)
00003ED1: 00 BRK
00003ED2: 0101 ORA ($01,X)
00003ED4: 00 BRK
00003ED5: 0101 ORA ($01,X)
00003ED7: 0101 ORA ($01,X)
00003ED9: 0101 ORA ($01,X)
00003EDB: 00 BRK
00003EDC: 00 BRK
00003EDD: 0100 ORA ($00,X)
00003EDF: 00 BRK
00003EE0: 0100 ORA ($00,X)
00003EE2: 00 BRK
00003EE3: 0100 ORA ($00,X)
00003EE5: 0101 ORA ($01,X)
00003EE7: 0101 ORA ($01,X)
00003EE9: 0101 ORA ($01,X)
00003EEB: 00 BRK
00003EEC: 00 BRK
00003EED: 0101 ORA ($01,X)
00003EEF: 0101 ORA ($01,X)
00003EF1: 0100 ORA ($00,X)
00003EF3: 00 BRK
00003EF4: 0101 ORA ($01,X)
00003EF6: 0101 ORA ($01,X)
00003EF8: 0101 ORA ($01,X)
00003EFA: 00 BRK
00003EFB: 00 BRK
00003EFC: 0101 ORA ($01,X)
00003EFE: 0101 ORA ($01,X)
00003F00: 00 BRK
00003F01: 00 BRK
00003F02: 0101 ORA ($01,X)
00003F04: 0101 ORA ($01,X)
00003F06: 0100 ORA ($00,X)
00003F08: 0101 ORA ($01,X)
00003F0A: 00 BRK
00003F0B: 0101 ORA ($01,X)
00003F0D: 0101 ORA ($01,X)
00003F0F: 00 BRK
00003F10: 00 BRK
00003F11: 0100 ORA ($00,X)
00003F13: 00 BRK
00003F14: 0101 ORA ($01,X)
00003F16: 0101 ORA ($01,X)
00003F18: 0100 ORA ($00,X)
00003F1A: 00 BRK
00003F1B: 0101 ORA ($01,X)
00003F1D: 0100 ORA ($00,X)
00003F1F: 00 BRK
00003F20: 0101 ORA ($01,X)
00003F22: 0101 ORA ($01,X)
00003F24: 0101 ORA ($01,X)
00003F26: 0101 ORA ($01,X)
00003F28: 00 BRK
00003F29: 00 BRK
00003F2A: 0101 ORA ($01,X)
00003F2C: 0101 ORA ($01,X)
00003F2E: 00 BRK
00003F2F: 0101 ORA ($01,X)
00003F31: 0101 ORA ($01,X)
00003F33: 0101 ORA ($01,X)
00003F35: 0100 ORA ($00,X)
00003F37: 00 BRK
00003F38: 0100 ORA ($00,X)
00003F3A: 00 BRK
00003F3B: 0100 ORA ($00,X)
00003F3D: 00 BRK
00003F3E: 0100 ORA ($00,X)
00003F40: 00 BRK
00003F41: 0101 ORA ($01,X)
00003F43: 0101 ORA ($01,X)
00003F45: 0100 ORA ($00,X)
00003F47: 0101 ORA ($01,X)
00003F49: 0101 ORA ($01,X)
00003F4B: 0100 ORA ($00,X)
00003F4D: 0101 ORA ($01,X)
00003F4F: 0101 ORA ($01,X)
00003F51: 0101 ORA ($01,X)
00003F53: 0101 ORA ($01,X)
00003F55: 00 BRK
00003F56: 0101 ORA ($01,X)
00003F58: 0101 ORA ($01,X)
00003F5A: 00 BRK
00003F5B: 00 BRK
00003F5C: 0101 ORA ($01,X)
00003F5E: 0101 ORA ($01,X)
00003F60: 17 .DB $17
00003F61: 2635 ROL $35
00003F63: 44 .DB $44
00003F64: 53 .DB $53
00003F65: 62 .DB $62
00003F66: 7180 ADC ($80),Y
00003F68: 8F .DB $8F
00003F69: 9E .DB $9E
00003F6A: 1000 BPL $00
00003F6C: 00 BRK
00003F6D: 201000 JSR $0010
00003F70: 00 BRK
00003F71: 28 PLP
00003F72: 1000 BPL $00
00003F74: 00 BRK
00003F75: 3018 BMI $18
00003F77: 00 BRK
00003F78: 00 BRK
00003F79: 201800 JSR $0018
00003F7C: 00 BRK
00003F7D: 28 PLP
00003F7E: 18 CLC
00003F7F: 00 BRK
00003F80: 00 BRK
00003F81: 3020 BMI $20
00003F83: 00 BRK
00003F84: 00 BRK
00003F85: 202000 JSR $0020
00003F88: 00 BRK
00003F89: 28 PLP
00003F8A: 200000 JSR $0000
00003F8D: 3028 BMI $28
00003F8F: 00 BRK
00003F90: 00 BRK
00003F91: 202800 JSR $0028
00003F94: 00 BRK
00003F95: 28 PLP
00003F96: 28 PLP
00003F97: 00 BRK
00003F98: 00 BRK
00003F99: 3030 BMI $30
00003F9B: 00 BRK
00003F9C: 00 BRK
00003F9D: 203000 JSR $0030
00003FA0: 00 BRK
00003FA1: 28 PLP
00003FA2: 3000 BMI $00
00003FA4: 00 BRK
00003FA5: 3010 BMI $10
00003FA7: 00 BRK
00003FA8: 00 BRK
00003FA9: C8 INY
00003FAA: 1000 BPL $00
00003FAC: 00 BRK
00003FAD: D010 BNE $10
00003FAF: 00 BRK
00003FB0: 00 BRK
00003FB1: D8 CLD
00003FB2: 18 CLC
00003FB3: 00 BRK
00003FB4: 00 BRK
00003FB5: C8 INY
00003FB6: 18 CLC
00003FB7: 00 BRK
00003FB8: 00 BRK
00003FB9: D018 BNE $18
00003FBB: 00 BRK
00003FBC: 00 BRK
00003FBD: D8 CLD
00003FBE: 200000 JSR $0000
00003FC1: C8 INY
00003FC2: 200000 JSR $0000
00003FC5: D020 BNE $20
00003FC7: 00 BRK
00003FC8: 00 BRK
00003FC9: D8 CLD
00003FCA: 28 PLP
00003FCB: 00 BRK
00003FCC: 00 BRK
00003FCD: C8 INY
00003FCE: 28 PLP
00003FCF: 00 BRK
00003FD0: 00 BRK
00003FD1: D028 BNE $28
00003FD3: 00 BRK
00003FD4: 00 BRK
00003FD5: D8 CLD
00003FD6: 3000 BMI $00
00003FD8: 00 BRK
00003FD9: C8 INY
00003FDA: 3000 BMI $00
00003FDC: 00 BRK
00003FDD: D030 BNE $30
00003FDF: 00 BRK
00003FE0: 00 BRK
00003FE1: D8 CLD
00003FE2: 78 SEI
00003FE3: 0100 ORA ($00,X)
00003FE5: 18 CLC
00003FE6: 80 .DB $80
00003FE7: 0100 ORA ($00,X)
00003FE9: 18 CLC
00003FEA: 88 DEY
00003FEB: 0100 ORA ($00,X)
00003FED: 18 CLC
00003FEE: 9001 BCC $01
00003FF0: 00 BRK
00003FF1: 18 CLC
00003FF2: 78 SEI
00003FF3: 0100 ORA ($00,X)
00003FF5: E080 CPX #$80
00003FF7: 0100 ORA ($00,X)
00003FF9: E088 CPX #$88
00003FFB: 0100 ORA ($00,X)
00003FFD: E090 CPX #$90
00003FFF: 0100 ORA ($00,X)
00004001: E080 CPX #$80
00004003: 0100 ORA ($00,X)
00004005: 80 .DB $80
00004006: 00 BRK
00004007: 00 BRK
00004008: 00 BRK
00004009: 00 BRK
0000400A: 4A LSR A
0000400B: FE00FC INC $FC00,X
0000400E: 86 .DB $86
0000400F: FE .DB $FE
| 17.195943 | 28 | 0.763333 |
ee40524b358cb40a464bc465accb28133edc4798 | 552 | asm | Assembly | oeis/096/A096222.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/096/A096222.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/096/A096222.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A096222: Number of different rectangles when a piece of paper is folded n times in alternate directions.
; Submitted by Christian Krause
; 1,3,9,30,100,360,1296,4896,18496,71808,278784,1098240,4326400,17172480,68161536,271589376,1082146816,4320165888,17247043584,68920934400,275415040000,1101122764800,4402342526976,17605073043456,70403108110336
mov $2,$0
add $2,14
mov $3,$0
seq $0,183978 ; 1/4 the number of (n+1) X 2 binary arrays with all 2 X 2 subblock sums the same.
add $3,$2
mov $4,$3
lpb $3
mul $0,2
sub $4,2
mov $3,$4
lpe
div $0,512
| 32.470588 | 208 | 0.755435 |
bc434627d8f1f2db115a2668fe34dc6e91ea63a4 | 49 | asm | Assembly | tests_manual/calltest.asm | heinsm/qira | 3726403c4bf4a4f3cf74e1514001333b3fa0e6b4 | [
"MIT"
] | 2,056 | 2018-03-17T01:46:40.000Z | 2022-03-31T20:06:48.000Z | tests_manual/calltest.asm | heinsm/qira | 3726403c4bf4a4f3cf74e1514001333b3fa0e6b4 | [
"MIT"
] | 45 | 2018-05-15T08:50:51.000Z | 2022-01-01T10:51:40.000Z | tests_manual/calltest.asm | heinsm/qira | 3726403c4bf4a4f3cf74e1514001333b3fa0e6b4 | [
"MIT"
] | 365 | 2018-04-09T05:46:11.000Z | 2022-03-20T22:57:18.000Z | push 7
call fxn
mov rax, 60
syscall
fxn:
ret
| 5.444444 | 11 | 0.673469 |
ebe2f2264f44bea17c30d0636e152defa38fbe7a | 1,747 | asm | Assembly | savefile/includes/serial_structs.asm | stranck/fools2018-1 | 1c506b17343fcdfa708aafaf8e596153e2c63254 | [
"MIT"
] | 35 | 2018-04-01T06:55:28.000Z | 2021-05-09T19:09:42.000Z | savefile/includes/serial_structs.asm | stranck/fools2018-1 | 1c506b17343fcdfa708aafaf8e596153e2c63254 | [
"MIT"
] | 4 | 2018-04-01T15:32:55.000Z | 2019-02-23T20:46:49.000Z | savefile/includes/serial_structs.asm | stranck/fools2018-1 | 1c506b17343fcdfa708aafaf8e596153e2c63254 | [
"MIT"
] | 12 | 2018-04-01T15:48:09.000Z | 2021-01-27T10:22:33.000Z | ; === serial_structs.asm
; Packet structures used in serial transmissions.
; Check connection and receive MOTD.
SerialHelloStruct:
dw 9 ; Content Length
dw 0 ; Checksum
db $01 ; Request code
db 72, 69, 76, 88 ; 'HELX'
; Register a new user (unused).
SerialRegisterStruct:
dw 15 ; Content Length
dw 0 ; Checksum
db $02 ; Request code
; 10 bytes for registration code follow.
; This data is unused and rewritten dynamically.
; Good opportunity for an easter egg.
.buffer
db 1
db "Inb4 this game gets a TCRF page"
; Trigger an event.
SerialTriggerEventStruct:
dw 50 ; Content Length
dw 0 ; Checksum
db $05 ; Request code
; Event ID and inventory data follow
.evtId
db "####"
.inventoryData
REPT 41
db "X"
ENDR
; Set a new trendy phrase.
SerialTrendyPhraseStruct:
dw 21 ; Content Length
dw 0 ; Checksum
db $06 ; Request code
; 16 bytes for the phrase
.buf
db "#####@@@@@#####@"
; Check letters in the lottery.
SerialCheckLotteryStruct:
dw 6 ; Content Length
dw 0 ; Checksum
db $07 ; Request code
db $ff ; Dummy
; Give balls to the guy in Western Encampment.
SerialGaveBallsStruct:
dw 6 ; Content Length
dw 0 ; Checksum
db $08 ; Request code
db $ff ; Dummy
; Attempt to solve Cracker Cavern challenge 3.
SerialCrackmeStruct:
dw 21 ; Content Length
dw 0 ; Checksum
db $09 ; Request code
; 16 bytes for the password
.buf
db "#####@@@@@#####@"
; Change the player's fun value.
SerialChangeFunValueStruct:
dw 6 ; Content Length
dw 0 ; Checksum
db $0a ; Request code
db $ff ; Dummy
| 21.304878 | 52 | 0.610761 |
addf506726e2b892291cf16632f680c5b9de241d | 8,335 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0x48.log_16271_1690.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0x48.log_16271_1690.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0x48.log_16271_1690.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r12
push %r15
push %r8
push %r9
push %rbp
push %rcx
push %rdi
push %rsi
lea addresses_normal_ht+0x33ef, %r15
cmp %rdi, %rdi
mov $0x6162636465666768, %rbp
movq %rbp, (%r15)
nop
nop
dec %r9
lea addresses_A_ht+0x1e553, %r8
nop
nop
nop
nop
nop
add %r12, %r12
mov $0x6162636465666768, %rdi
movq %rdi, (%r8)
nop
nop
nop
nop
and $20139, %r12
lea addresses_normal_ht+0x1397b, %rsi
lea addresses_WC_ht+0x14e53, %rdi
nop
nop
xor %r8, %r8
mov $94, %rcx
rep movsl
nop
sub $2652, %r9
lea addresses_WC_ht+0x15653, %rcx
nop
nop
nop
nop
nop
inc %r12
vmovups (%rcx), %ymm2
vextracti128 $1, %ymm2, %xmm2
vpextrq $1, %xmm2, %rbp
nop
nop
nop
nop
nop
add %rcx, %rcx
lea addresses_WC_ht+0x13c53, %rsi
lea addresses_normal_ht+0x12e53, %rdi
nop
nop
nop
nop
cmp %r12, %r12
mov $112, %rcx
rep movsl
nop
nop
nop
nop
and %rbp, %rbp
lea addresses_WC_ht+0x137cc, %rsi
nop
sub $24127, %rbp
movl $0x61626364, (%rsi)
nop
nop
nop
add %rsi, %rsi
lea addresses_A_ht+0x13113, %r9
nop
nop
nop
nop
nop
and %rsi, %rsi
mov $0x6162636465666768, %rcx
movq %rcx, %xmm4
vmovups %ymm4, (%r9)
nop
sub %r8, %r8
lea addresses_WC_ht+0x130b3, %rdi
nop
nop
add %r15, %r15
mov $0x6162636465666768, %rsi
movq %rsi, %xmm0
vmovups %ymm0, (%rdi)
nop
nop
nop
sub $18659, %rbp
lea addresses_D_ht+0xda73, %rcx
nop
xor %r9, %r9
vmovups (%rcx), %ymm1
vextracti128 $0, %ymm1, %xmm1
vpextrq $1, %xmm1, %rbp
nop
nop
nop
nop
nop
add $24891, %r15
lea addresses_normal_ht+0x10893, %rsi
lea addresses_D_ht+0x253, %rdi
nop
nop
nop
xor $43321, %r9
mov $74, %rcx
rep movsq
nop
nop
add $44602, %rcx
lea addresses_WC_ht+0x653, %rsi
lea addresses_WT_ht+0x14d53, %rdi
clflush (%rsi)
nop
nop
and %r9, %r9
mov $47, %rcx
rep movsq
nop
nop
nop
nop
nop
dec %rdi
lea addresses_A_ht+0x5e53, %rsi
lea addresses_WC_ht+0x7363, %rdi
nop
nop
nop
nop
mfence
mov $54, %rcx
rep movsw
and $52314, %r15
lea addresses_D_ht+0x43d3, %rsi
lea addresses_WT_ht+0xe653, %rdi
nop
nop
nop
nop
nop
sub %r8, %r8
mov $7, %rcx
rep movsw
nop
nop
nop
inc %r8
lea addresses_normal_ht+0x5003, %rsi
lea addresses_normal_ht+0x3514, %rdi
nop
and %r15, %r15
mov $30, %rcx
rep movsq
nop
nop
nop
nop
nop
add %rsi, %rsi
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %r9
pop %r8
pop %r15
pop %r12
ret
.global s_faulty_load
s_faulty_load:
push %r13
push %r14
push %r8
push %r9
push %rax
push %rbx
push %rsi
// Store
lea addresses_D+0x1a593, %rax
nop
nop
nop
add %rsi, %rsi
mov $0x5152535455565758, %r8
movq %r8, %xmm2
vmovaps %ymm2, (%rax)
nop
nop
nop
nop
inc %r9
// Load
mov $0x3d1, %r13
nop
nop
sub %r14, %r14
mov (%r13), %r8
cmp $56297, %rsi
// Faulty Load
lea addresses_normal+0x15e53, %rax
nop
nop
nop
nop
nop
cmp %r9, %r9
mov (%rax), %r13w
lea oracles, %rax
and $0xff, %r13
shlq $12, %r13
mov (%rax,%r13,1), %r13
pop %rsi
pop %rbx
pop %rax
pop %r9
pop %r8
pop %r14
pop %r13
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_normal', 'AVXalign': False, 'congruent': 0, 'size': 32, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_D', 'AVXalign': True, 'congruent': 6, 'size': 32, 'same': False, 'NT': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_P', 'AVXalign': False, 'congruent': 0, 'size': 8, 'same': False, 'NT': False}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_normal', 'AVXalign': False, 'congruent': 0, 'size': 2, 'same': True, 'NT': False}}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'AVXalign': True, 'congruent': 2, 'size': 8, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A_ht', 'AVXalign': False, 'congruent': 7, 'size': 8, 'same': False, 'NT': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_normal_ht', 'congruent': 2, 'same': False}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 10, 'same': True}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WC_ht', 'AVXalign': False, 'congruent': 11, 'size': 32, 'same': False, 'NT': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_WC_ht', 'congruent': 9, 'same': False}, 'dst': {'type': 'addresses_normal_ht', 'congruent': 8, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WC_ht', 'AVXalign': False, 'congruent': 0, 'size': 4, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A_ht', 'AVXalign': False, 'congruent': 1, 'size': 32, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WC_ht', 'AVXalign': False, 'congruent': 2, 'size': 32, 'same': False, 'NT': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_D_ht', 'AVXalign': False, 'congruent': 4, 'size': 32, 'same': False, 'NT': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_normal_ht', 'congruent': 5, 'same': False}, 'dst': {'type': 'addresses_D_ht', 'congruent': 10, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_WC_ht', 'congruent': 11, 'same': False}, 'dst': {'type': 'addresses_WT_ht', 'congruent': 8, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_A_ht', 'congruent': 10, 'same': False}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 2, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_D_ht', 'congruent': 6, 'same': False}, 'dst': {'type': 'addresses_WT_ht', 'congruent': 8, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_normal_ht', 'congruent': 3, 'same': False}, 'dst': {'type': 'addresses_normal_ht', 'congruent': 0, 'same': False}}
{'34': 16271}
34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34
*/
| 31.334586 | 2,999 | 0.660228 |
b0637063e8b96e7bd39c493038da9db0cf2b5f77 | 10,297 | asm | Assembly | boot/mach/bios/bootstrap/vbr.asm | mfkiwl/NexNix | 48729d7efc169de325c344123e465f48705080d9 | [
"MIT"
] | null | null | null | boot/mach/bios/bootstrap/vbr.asm | mfkiwl/NexNix | 48729d7efc169de325c344123e465f48705080d9 | [
"MIT"
] | null | null | null | boot/mach/bios/bootstrap/vbr.asm | mfkiwl/NexNix | 48729d7efc169de325c344123e465f48705080d9 | [
"MIT"
] | null | null | null | ; vbr.asm - contains NexNix volume boot record
; SPDX-License-Identifier: ISC
bits 16
cpu 386
org 0x600
section .text
global start
%define VBR_BIOSSIG 0xAA55
%define VBR_SIZE 1024
%define VBR_PADMAX 510
%define VBR_OLDBASE 0x7C00
%define VBR_BASE 0x600
%define VBR2_BASE 0x800
%define VBR_WORDS 256
%define VBR_STACKTOP 0x1A00
%define BDA_USABLEMEM 0x413
%define VBR_MINADDR 0x1A00
%define NB_BASE 0x3C00
; BPB definition
jmp short start ; Required by some utilities and BIOSes to be 3 bytes
nop
bsoem: db "UNUSED " ; Filled by formatting utility
bpbsectsz: dw 0 ; Everything here is filled by formatting utility
bpbsecperclus: db 0
bpbresvdsect: dw 0
bpbnumfats: db 0
bpbrootentcnt: dw 0
bpbtotsect16: dw 0
bpbmedia: db 0
bpbfatsz16: dw 0
bpbsecpertrk: dw 0
bpbnumheads: dw 0
bpbhiddensect: dd 0
bpbtotsect32: dd 0
bpbfatsz32: dd 0
bpbextflags: dw 0
bpbfsver: dw 0
bpbrootclus: dd 0
bpbfsinfo: dw 0
bpbbkbootsect: dw 0
bpbpartbase: dd 0 ; Ok, I know this is really hacky, but FAT isn't going
; to change anytime soon, so I think this is fine
bpbresvd: times 8 db 0
bsdrvnum: db 0
bsresvd1: db 0
bsbootsig: db 0
bsvolid: dd 0
bsvollab: db "NO NAME "
bsfstype: db "FAT32 "
start:
; Setup required state
cld
cli
mov ax, 0
mov ds, ax
mov es, ax
mov ss, ax
mov sp, VBR_STACKTOP
; Relocate to 0x600
mov si, VBR_OLDBASE
mov di, VBR_BASE
mov cx, VBR_WORDS
rep movsw
jmp 0:vbrstart ; Far jump to VBR main entry point
; Strings and variables and stuff
loadmsg: db "nbvbr: loading nexboot", 0
exterrmsg: db 0xd, 0xa, "nbvbr: BIOS does not support LBA", 0
memerrmsg: db 0xd, 0xa, "nbvbr: out of memory", 0
diskerrmsg: db 0xd, 0xa, "nbvbr: unable to read file", 0
notfoundmsg: db 0xd, 0xa, "nbvbr: nexboot not found", 0
progmark: db '.', 0
filename: db "NEXBOOT "
memmax: dd 0
memcur: dd VBR_MINADDR
; Prints out a string to the screen
vbrprint:
; Save AX
push ax
.printloop:
; Grab the next character
lodsb
; Test if this marks the end of the string
cmp al, 0
je .printexit
; Print it out
mov ah, 0Eh
int 10h
; Else, go to next character
jmp .printloop
.printexit:
; Restore AX
pop ax
ret
; Panics
vbrpanic:
; Print out the message in SI
call vbrprint
mov ah, 0
int 16h ; Read keystroke
jmp 0xFFFF:0 ; Cold boot computer
; Allocate the amount of bytes of memory in EAX. Returns a buffer in ES:DI
vbralloc:
push ecx
push ebx
mov ecx, dword [memcur] ; Save the current buffer
; Put high 16 bits of ECX elsewhere
mov ebx, ecx
xor bx, bx ; Clear the low bits
shr ebx, 4 ; Pack 'em in BX
mov es, bx ; Set ES
mov di, cx ; Set DI
add ecx, eax ; For next allocation
cmp ecx, dword [memmax] ; Check if we are out of memory
jae .nomem
mov dword [memcur], ecx
pop ebx
pop ecx
ret
.nomem:
; Panic
mov si, memerrmsg
call vbrpanic
; The data address packet
dap: times 16 db 0
; Reads a sector from disk. EAX = LBA of sector, CX = number of sectors to read,
; ES:DI = buffer to read to
vbrreadsector:
mov byte [dap], 10h
mov word [dap+2], cx
mov word [dap+4], di
mov word [dap+6], es
mov dword [dap+8], eax
; Call BIOS
mov dl, byte [bsdrvnum]
mov ah, 42h
mov si, dap
int 13h
; Check for an error
mov si, diskerrmsg
jc vbrpanic
ret
; Main VBR function
vbrstart:
sti
; Save drive number
mov byte [bsdrvnum], dl
; First, print out welcome message
mov si, loadmsg
call vbrprint
; Check if an LBA BIOS is installed. If so, we are definitley on a 386 or better
mov ah, 41h
mov bx, 0x55AA
int 13h
mov si, exterrmsg
jc vbrpanic
cmp bx, 0xAA55
jne vbrpanic
; Read in the second sector of the VBR
mov eax, dword [bpbpartbase]
add eax, 1
mov cx, 1
mov di, VBR2_BASE
call vbrreadsector
; Jump to it
jmp vbr2start
; Global Descriptor Table
gdtbase:
dq 0 ; A null descriptor
; 16 bit code
dw 0xFFFF ; Limit
dw 0 ; Base low
db 0 ; Base high
db 0x9A ; Code segment, execute / read, present
dw 0 ; 286 reserved
; 32 bit code
dw 0xFFFF ; Limit low
dw 0 ; Base low
db 0 ; Base middle
db 0x9A ; Code segment, execute / read, present
db 0xCF ; Segment high, 32 bit, 4K granularity
db 0 ; Base high
; 32 bit data
dw 0xFFFF ; Limit low
dw 0 ; Base low
db 0 ; Base middle
db 0x92 ; Data segment, read / write, present
db 0xCF ; Segment high, 32 bit, 4K granularity
db 0 ; Base high
gdtptr:
dw gdtptr - gdtbase - 1
dd gdtbase
clussz: dd 0
fatsz: dd 0
fataddr: dw 0
times VBR_PADMAX - ($ - $$) db 0
dw VBR_BIOSSIG
; Reads in one cluster from disk. EAX = cluster address, ES:DI = buffer to read to
vbrreadcluster:
; Convert to an absolute sector, then read it in
push ecx
push ebx
push eax
sub eax, 2
movzx ecx, byte [bpbsecperclus]
mul ecx
movzx ecx, word [bpbresvdsect]
add eax, ecx
mov ecx, dword [bpbpartbase]
add eax, ecx
mov ebx, eax
mov eax, dword [bpbfatsz32]
movzx ecx, byte [bpbnumfats]
mul ecx
add ebx, eax
mov eax, ebx
movzx cx, byte [bpbsecperclus]
call vbrreadsector
pop eax
pop ebx
pop ecx
ret
vbr2start:
; Get highest usable address
mov ax, word [BDA_USABLEMEM]
mov cx, 1024 ; Convert to bytes. 1024 bytes = 1KiB
mul cx
shl edx, 16 ; Get DX:AX to one register
or eax, edx
mov dword [memmax], eax ; Setup memory info
; Allocate FAT data
movzx eax, word [bpbsectsz]
call vbralloc
mov word [fataddr], di
; Store cluster size in bytes
movzx eax, word [bpbsectsz]
movzx cx, byte [bpbsecperclus]
mul cx
shl edx, 16 ; Get everything in EAX
or eax, edx
mov dword [clussz], eax
; Allocate memory for one cluster of root directory entries
call vbralloc
; Now, we must read in the root directory start cluster
mov eax, dword [bpbrootclus]
call vbrreadcluster
; Find the number of directory entries in one cluster
xor edx, edx
mov eax, dword [clussz]
mov ecx, 32
div cx
; Find the file's directory entry
mov cx, ax
.nameloop:
push cx
push di
mov cx, 11
mov si, filename
rep cmpsb
pop di
pop cx
je .filefound
add di, 32
loop .nameloop
; File doesn't exists, panic
mov si, notfoundmsg
call vbrpanic
.filefound:
; We found it, obtain the first cluster
movzx eax, word [di + 26]
mov dx, word [di + 20]
shl edx, 16
or eax, edx
; Make sure we are at the required base allocation address
mov dword [memcur], NB_BASE
; Now, here is the hard part. We must go through the cluster chain,
; and load every cluster there. This code performs poorly. It would be better if the current
; FAT sector was cached instead of re-reading it every time.
; TODO: optimize to cache current FAT sector
.fatloop:
; Allocate memory for current cluster
mov ebx, eax
mov eax, dword [clussz]
call vbralloc
mov eax, ebx
; Read it in
call vbrreadcluster
; Print out progress
push eax
mov si, progmark
call vbrprint
pop eax
; Now we need to figure out the next cluster. First, compute the offset of this FAT entry
mov cx, 4
mul cx
; EAX = FAT offset now. Convert to an absolute sector now
xor edx, edx
movzx ecx, word [bpbsectsz]
div ecx
push edx
movzx ebx, word [bpbresvdsect]
add eax, ebx
mov ebx, dword [bpbpartbase]
add eax, ebx
; Read it in
mov cx, 1
mov di, word [fataddr]
call vbrreadsector
; Get next cluster, masking off the top 4 bits
pop edx
add edi, edx
mov eax, dword [es:di]
and eax, 0x0FFFFFFF
; Check for end of file
cmp eax, 0x0FFFFFF8
jae .launch ; We are done!
; Else, read next cluster
jmp .fatloop
.launch:
cli
; Before launching, let's enable the A20 gate
.wait1:
mov dx, 0x64
in al, dx
test al, (1 << 1)
jnz .wait1
mov al, 0xAD
out dx, al
.wait2:
in al, dx
test al, (1 << 1)
jnz .wait2
mov al, 0xD0
out dx, al
.wait3:
in al, dx
test al, (1 << 0)
jz .wait3
mov dx, 0x60
in al, dx
or al, (1 << 1) ; Set A20 bit
mov bl, al
.wait4:
mov dx, 0x64
in al, dx
test al, (1 << 1)
jnz .wait4
mov al, 0xD1
out dx, al
.wait5:
in al, dx
test al, (1 << 1)
jnz .wait5
mov dx, 0x60
mov al, bl
out dx, al
.wait6:
mov dx, 0x64
in al, dx
test al, (1 << 1)
jnz .wait6
mov al, 0xAE
out dx, al
.wait7:
in al, dx
test al, (1 << 1)
jnz .wait7
; Test if A20 gate was enabled
mov ax, 0xFFFF
mov es, ax
mov byte [es:0x610], 0xB0
cmp byte [0x600], 0xB0
je noa20
; Clear the screen
mov ah, 0
mov al, 3
int 10h
; Restore drive number
movzx edx, byte [bsdrvnum]
; Enter into protected mode
lgdt [gdtptr]
mov eax, cr0
or eax, 1
mov cr0, eax
; Far jump to nexboot main part
jmp 0x10:NB_BASE
a20errmsg: db 0x0D, 0x0A, "nbvbr: couldn't enable A20", 0
noa20:
mov si, a20errmsg
jmp vbrpanic
times VBR_SIZE - ($ - $$) db 0
| 22.482533 | 96 | 0.577061 |
c8b8cc24e489afb122a8472499f77a636b8145e3 | 1,179 | asm | Assembly | data/mapObjects/silphco3.asm | etdv-thevoid/pokemon-rgb-enhanced | 5b244c1cf46aab98b9c820d1b7888814eb7fa53f | [
"MIT"
] | 1 | 2022-01-09T05:28:52.000Z | 2022-01-09T05:28:52.000Z | data/mapObjects/silphco3.asm | ETDV-TheVoid/pokemon-rgb-enhanced | 5b244c1cf46aab98b9c820d1b7888814eb7fa53f | [
"MIT"
] | null | null | null | data/mapObjects/silphco3.asm | ETDV-TheVoid/pokemon-rgb-enhanced | 5b244c1cf46aab98b9c820d1b7888814eb7fa53f | [
"MIT"
] | null | null | null | SilphCo3Object:
db $2e ; border block
db $a ; warps
db $0, $1a, $1, SILPH_CO_2F
db $0, $18, $0, SILPH_CO_4F
db $0, $14, $0, SILPH_CO_ELEVATOR
db $b, $17, $9, SILPH_CO_3F
db $3, $3, $5, SILPH_CO_5F
db $f, $3, $6, SILPH_CO_5F
db $3, $1b, $3, SILPH_CO_2F
db $b, $3, $3, SILPH_CO_9F
db $b, $b, $4, SILPH_CO_7F
db $f, $1b, $3, SILPH_CO_3F
db $0 ; signs
db $4 ; objects
object SPRITE_LAPRAS_GIVER, $18, $8, STAY, NONE, $1 ; person
object SPRITE_ROCKET_F, $14, $7, STAY, LEFT, $2, OPP_ROCKET_F, $7
object SPRITE_OAK_AIDE, $7, $9, STAY, DOWN, $3, OPP_SCIENTIST, $4
object SPRITE_BALL, $8, $5, STAY, NONE, $4, HYPER_POTION
; warp-to
EVENT_DISP SILPH_CO_3F_WIDTH, $0, $1a ; SILPH_CO_2F
EVENT_DISP SILPH_CO_3F_WIDTH, $0, $18 ; SILPH_CO_4F
EVENT_DISP SILPH_CO_3F_WIDTH, $0, $14 ; SILPH_CO_ELEVATOR
EVENT_DISP SILPH_CO_3F_WIDTH, $b, $17 ; SILPH_CO_3F
EVENT_DISP SILPH_CO_3F_WIDTH, $3, $3 ; SILPH_CO_5F
EVENT_DISP SILPH_CO_3F_WIDTH, $f, $3 ; SILPH_CO_5F
EVENT_DISP SILPH_CO_3F_WIDTH, $3, $1b ; SILPH_CO_2F
EVENT_DISP SILPH_CO_3F_WIDTH, $b, $3 ; SILPH_CO_9F
EVENT_DISP SILPH_CO_3F_WIDTH, $b, $b ; SILPH_CO_7F
EVENT_DISP SILPH_CO_3F_WIDTH, $f, $1b ; SILPH_CO_3F
| 33.685714 | 66 | 0.695505 |
bc077c2b06f953cceb286b72f89f2d1a64b4eae5 | 820 | asm | Assembly | oeis/142/A142065.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/142/A142065.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/142/A142065.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A142065: Primes congruent to 28 mod 33.
; Submitted by Jon Maiga
; 61,127,193,457,523,787,853,919,1051,1117,1249,1381,1447,1579,1777,2239,2371,2437,2503,2767,2833,3163,3229,3361,3559,3691,3823,3889,4021,4153,4219,4483,4549,4813,5011,5077,5209,5407,5737,5869,6067,6133,6199,6397,6529,6661,6793,6991,7057,7321,7717,8179,8311,8377,8443,8641,8707,8839,8971,9103,9433,9631,9697,9829,10093,10159,10357,10687,10753,11083,11149,11677,11743,11941,12007,12073,12601,12799,13063,13327,13591,13723,13789,13921,14251,14449,14713,14779,15241,15307,15373,15439,15901,16033,16231
mov $2,$0
add $2,2
pow $2,2
lpb $2
mul $1,$4
mov $3,$1
add $3,60
seq $3,10051 ; Characteristic function of primes: 1 if n is prime, else 0.
sub $0,$3
add $1,66
sub $2,1
mov $4,$0
max $4,0
cmp $4,$0
mul $2,$4
lpe
mov $0,$1
sub $0,5
| 35.652174 | 498 | 0.720732 |
88995f1f1a79a273696c19409be7463a4fb5b6a7 | 458 | asm | Assembly | lib/pepelib.asm | pedroreissantos/pepe | 444afc02359c31cfe24017dda49395016d94d43e | [
"BSD-3-Clause"
] | null | null | null | lib/pepelib.asm | pedroreissantos/pepe | 444afc02359c31cfe24017dda49395016d94d43e | [
"BSD-3-Clause"
] | null | null | null | lib/pepelib.asm | pedroreissantos/pepe | 444afc02359c31cfe24017dda49395016d94d43e | [
"BSD-3-Clause"
] | null | null | null | ; entry point
start:
CALL main
SWE 240
; extern exit
exit:
MOV r0, [sp + 2]
SWE 240
RET
; extern printi
printi:
MOV r0, [sp + 2]
SWE 244
RET
; extern printch
printch:
MOV r0, [sp + 2]
SWE 245
RET
; extern prints
prints:
MOV r0, [sp + 2]
SWE 246
RET
; extern printLN
printLN:
SWE 247
RET
; extern printHEX
printHEX:
SWE 248
RET
; extern readi
readi:
SWE 241
RET
; extern readch
readch:
SWE 242
RET
; extern reads
reads:
MOV r0, [sp + 2]
SWE 243
RET
| 8.178571 | 17 | 0.681223 |
eb6fc5fa21f177fef99e4e0a8e6739b4400f4988 | 472 | asm | Assembly | PR1/Practica17/Practica1/misc.asm | rocgar08/EC-UCM | aec5203bfa594d26b343deda4927ad2bdcfe45b4 | [
"MIT"
] | null | null | null | PR1/Practica17/Practica1/misc.asm | rocgar08/EC-UCM | aec5203bfa594d26b343deda4927ad2bdcfe45b4 | [
"MIT"
] | null | null | null | PR1/Practica17/Practica1/misc.asm | rocgar08/EC-UCM | aec5203bfa594d26b343deda4927ad2bdcfe45b4 | [
"MIT"
] | null | null | null |
.equ COEF1, 3483
.equ COEF2, 11718
.equ COEF3, 1183
.text
.global div16384
.global rgb2gray
rgb2gray:
//Prologo
push {r4-r6,lr}
//CUERPO*
mov r3,#1 //AUX1
mov r4,#1 //AUX2
ldr r5, = COEF1
ldrb r6,[r0]//pixel R
mul r3,r5,r6
ldr r5, = COEF2
ldrb r6,[r0,#1]//pixel G
mul r4,r5,r6
add r3,r3,r4
ldr r5, = COEF3
ldrb r6,[r0,#2] //pixel B
mul r4,r5,r6
add r3,r4,r3
mov r0,r3
bl div16384
pop {r4-r6,lr}
mov pc,lr
div16384:
lsr r0,r0,#14
mov pc,lr
| 11.238095 | 26 | 0.627119 |
a73900a6570dd25eaddcc51a0b19e38c95dc0195 | 290 | asm | Assembly | libsrc/_DEVELOPMENT/arch/zx/display/c/sdcc_iy/zx_pxy2aaddr_callee.asm | teknoplop/z88dk | bb03fbfd6b2ab0f397a1358559089f9cd3706485 | [
"ClArtistic"
] | null | null | null | libsrc/_DEVELOPMENT/arch/zx/display/c/sdcc_iy/zx_pxy2aaddr_callee.asm | teknoplop/z88dk | bb03fbfd6b2ab0f397a1358559089f9cd3706485 | [
"ClArtistic"
] | null | null | null | libsrc/_DEVELOPMENT/arch/zx/display/c/sdcc_iy/zx_pxy2aaddr_callee.asm | teknoplop/z88dk | bb03fbfd6b2ab0f397a1358559089f9cd3706485 | [
"ClArtistic"
] | 1 | 2019-12-03T23:57:48.000Z | 2019-12-03T23:57:48.000Z |
; void *zx_pxy2aaddr_callee(uchar x, uchar y)
SECTION code_clib
SECTION code_arch
PUBLIC _zx_pxy2aaddr_callee, l0_zx_pxy2aaddr_callee
EXTERN asm_zx_pxy2aaddr
_zx_pxy2aaddr_callee:
pop af
pop hl
pop de
push af
l0_zx_pxy2aaddr_callee:
ld h,e
jp asm_zx_pxy2aaddr
| 12.608696 | 51 | 0.765517 |
9248d2cbaff167975f4d35ac3374c2ba3dad8e9f | 3,215 | asm | Assembly | memory.asm | stormmmmm/AsmDynamicMemory | 7de9aa7a106db081ce2f31e07076c941fac6117e | [
"MIT"
] | null | null | null | memory.asm | stormmmmm/AsmDynamicMemory | 7de9aa7a106db081ce2f31e07076c941fac6117e | [
"MIT"
] | null | null | null | memory.asm | stormmmmm/AsmDynamicMemory | 7de9aa7a106db081ce2f31e07076c941fac6117e | [
"MIT"
] | null | null | null |
.model small
stack 100h
MALLOC_ID = 00000001h
_char equ 1
_short equ 2
_word equ 2
_int equ 4
_dword equ 4
_df equ 6
_long equ 8
_dt equ 10
_fpu equ 10
.code
__setname macro mid, type_, val
__malloc_&mid& type_ val
mov ax, offset __malloc_&mid&
endm
movstack macro
push bp
mov bp, sp
endm
popstack macro
pop bp
endm
param macro name, num
&name& equ [bp+4+2*num]
endm
malloc proc
param blocksize, 0
movstack
push cx
mov cx, blocksize
cmp cx, 1
je equal_1
cmp cx, 2
je equal_2
cmp cx, 4
je equal_4
cmp cx, 6
je equal_6
cmp cx, 8
je equal_8
cmp cx, 10
je equal_10
jmp short equal_2
endcmp:
pop cx
MALLOC_ID = MALLOC_ID + 6
popstack
ret 2
equal_1:
__setname %MALLOC_ID, db, ?
jmp short endcmp
equal_2:
__setname %MALLOC_ID+1, dw, ?
jmp short endcmp
equal_4:
__setname %MALLOC_ID+2, dd, ?
jmp short endcmp
equal_6:
__setname %MALLOC_ID+3, df, ?
jmp short endcmp
equal_8:
__setname %MALLOC_ID+4, dq, ?
jmp short endcmp
equal_10:
__setname %MALLOC_ID+5, dt, ?
jmp short endcmp
endp
callocs proc
param elsize, 1
param tablesize, 0
movstack
push ax
push bx
push cx
push dx
push si
mov bx, elsize
mov dx, tablesize
xor cx, cx
mov si, di
cloop:
push bx
call mallocs
mov [si], ax
inc cx
cmp cx, dx
jng cloop
add si, 2
pop si
pop dx
pop cx
pop bx
pop ax
popstack
ret 4
endp
start:
; выделить 2 байта:
push 2
call malloc
; callocs работает похожим образом, но выделяет неограниченное количество памяти.
; аргументы: размер одного элемента, количество элементов.
; адреса находятся в ds:[di]
; и самое главное - не нужна функция освобождения памяти, ибо все реализовано на основе стека!
.data
end start
| 26.138211 | 98 | 0.375117 |
24005ebfdbf8025729c1c93c06e55d95f8fcbccf | 809 | asm | Assembly | oeis/143/A143368.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/143/A143368.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/143/A143368.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A143368: Triangle read by rows: T(n,k) is the Wiener index of a k X n grid (i.e., P_k X P_n, where P_m is the path graph on m vertices; 1 <= k <= n).
; Submitted by Christian Krause
; 0,1,8,4,25,72,10,56,154,320,20,105,280,570,1000,35,176,459,920,1595,2520,56,273,700,1386,2380,3731,5488,84,400,1012,1984,3380,5264,7700,10752,120,561,1404,2730,4620,7155,10416,14484,19440,165,760,1885,3640,6125,9440,13685,18960,25365,33000,220,1001,2464,4730,7920,12155,17556,24244,32340,41965,53240,286,1288,3150,6016,10030,15336,22078,30400,40446,52360,66286,82368,364,1625,3952,7514,12480,19019,27300,37492,49764,64285,81224,100750,123032,455,2016,4879,9240,15295,23240,33271,45584,60375
mov $2,1
lpb $0
add $1,1
sub $0,$1
add $2,1
lpe
add $0,1
mov $1,$2
add $1,$0
mul $2,$0
bin $2,2
mul $2,$1
mov $0,$2
div $0,3
| 42.578947 | 492 | 0.720643 |
0d1a0741374400942413c01a81fc7d21f4d569fe | 878 | asm | Assembly | programs/oeis/299/A299283.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/299/A299283.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/299/A299283.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A299283: Coordination sequence for "svh" 3D uniform tiling.
; 1,7,22,48,84,130,186,253,330,417,514,622,740,868,1006,1155,1314,1483,1662,1852,2052,2262,2482,2713,2954,3205,3466,3738,4020,4312,4614,4927,5250,5583,5926,6280,6644,7018,7402,7797,8202,8617,9042,9478,9924,10380,10846,11323,11810,12307,12814,13332,13860,14398,14946,15505,16074,16653,17242,17842,18452,19072,19702,20343,20994,21655,22326,23008,23700,24402,25114,25837,26570,27313,28066,28830,29604,30388,31182,31987,32802,33627,34462,35308,36164,37030,37906,38793,39690,40597,41514,42442,43380,44328,45286,46255,47234,48223,49222,50232
mov $4,$0
add $0,2
mov $2,1
lpb $0
mov $3,$0
sub $0,1
sub $1,$3
mul $3,2
trn $1,$3
add $1,$2
mov $3,$2
add $2,1
trn $3,3
lpe
sub $1,$3
sub $1,1
mov $5,$4
mov $7,$4
lpb $7
add $6,$5
sub $7,1
lpe
mov $5,$6
mov $8,5
lpb $8
add $1,$5
sub $8,1
lpe
mov $0,$1
| 26.606061 | 535 | 0.703872 |
2bb6d24f1b52da0e9134d9447779afd564a759c4 | 7,485 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xca_notsx.log_21829_2012.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xca_notsx.log_21829_2012.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xca_notsx.log_21829_2012.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r12
push %r13
push %r14
push %r8
push %rax
push %rcx
push %rdi
push %rsi
lea addresses_WC_ht+0x10731, %rdi
nop
nop
inc %r13
mov (%rdi), %r14d
nop
nop
nop
cmp %r11, %r11
lea addresses_normal_ht+0xb0c1, %r14
nop
nop
nop
nop
nop
add %r12, %r12
movb (%r14), %r8b
nop
nop
and %rdi, %rdi
lea addresses_UC_ht+0x17cd1, %r8
nop
sub %rdi, %rdi
mov $0x6162636465666768, %r13
movq %r13, %xmm3
movups %xmm3, (%r8)
nop
nop
cmp $35675, %r8
lea addresses_A_ht+0xec49, %r13
nop
nop
nop
nop
nop
and %rax, %rax
mov (%r13), %r12d
nop
xor $58011, %r14
lea addresses_A_ht+0x1c629, %rsi
lea addresses_WT_ht+0xcd31, %rdi
nop
nop
nop
nop
and %rax, %rax
mov $61, %rcx
rep movsb
nop
nop
nop
sub $35713, %rsi
lea addresses_D_ht+0x1a711, %r14
nop
nop
nop
cmp %r8, %r8
mov $0x6162636465666768, %r13
movq %r13, %xmm3
movups %xmm3, (%r14)
cmp %rsi, %rsi
lea addresses_WT_ht+0x1d775, %rsi
lea addresses_normal_ht+0x10f31, %rdi
nop
nop
nop
nop
nop
cmp $43362, %rax
mov $90, %rcx
rep movsq
nop
nop
nop
sub %rsi, %rsi
lea addresses_normal_ht+0x1b51, %rsi
nop
nop
nop
nop
nop
cmp $3355, %r11
mov (%rsi), %r8d
nop
nop
nop
nop
nop
add %rdi, %rdi
lea addresses_A_ht+0x8b1, %r13
nop
nop
xor %r14, %r14
movups (%r13), %xmm7
vpextrq $0, %xmm7, %r12
nop
nop
nop
add %r11, %r11
lea addresses_WC_ht+0x7331, %r13
nop
nop
nop
add $45330, %r12
mov (%r13), %ax
nop
nop
nop
nop
add $2470, %rdi
lea addresses_D_ht+0x331, %r8
nop
sub %rax, %rax
movw $0x6162, (%r8)
nop
nop
nop
nop
xor %rdi, %rdi
lea addresses_WC_ht+0x17f31, %r13
nop
nop
nop
nop
cmp $62241, %r12
movb (%r13), %al
sub %r12, %r12
lea addresses_WT_ht+0x15271, %rsi
lea addresses_WC_ht+0x7bd1, %rdi
nop
nop
nop
cmp %r8, %r8
mov $97, %rcx
rep movsl
nop
nop
nop
dec %r12
lea addresses_A_ht+0x1bc3c, %rsi
lea addresses_WC_ht+0xe70e, %rdi
clflush (%rsi)
clflush (%rdi)
nop
nop
nop
nop
xor %r13, %r13
mov $38, %rcx
rep movsw
and %r8, %r8
pop %rsi
pop %rdi
pop %rcx
pop %rax
pop %r8
pop %r14
pop %r13
pop %r12
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r14
push %r15
push %r9
push %rbx
push %rcx
// Faulty Load
lea addresses_PSE+0x19f31, %r15
nop
nop
xor %rcx, %rcx
mov (%r15), %r14d
lea oracles, %r9
and $0xff, %r14
shlq $12, %r14
mov (%r9,%r14,1), %r14
pop %rcx
pop %rbx
pop %r9
pop %r15
pop %r14
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_PSE', 'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 0}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'same': True, 'type': 'addresses_PSE', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 0}}
<gen_prepare_buffer>
{'OP': 'LOAD', 'src': {'same': True, 'type': 'addresses_WC_ht', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 10}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_normal_ht', 'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 2}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_UC_ht', 'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 5}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_A_ht', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 1}}
{'OP': 'REPM', 'src': {'same': False, 'congruent': 3, 'type': 'addresses_A_ht'}, 'dst': {'same': False, 'congruent': 7, 'type': 'addresses_WT_ht'}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_D_ht', 'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 5}}
{'OP': 'REPM', 'src': {'same': False, 'congruent': 2, 'type': 'addresses_WT_ht'}, 'dst': {'same': False, 'congruent': 10, 'type': 'addresses_normal_ht'}}
{'OP': 'LOAD', 'src': {'same': True, 'type': 'addresses_normal_ht', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 5}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_A_ht', 'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 5}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_WC_ht', 'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 10}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_D_ht', 'NT': False, 'AVXalign': False, 'size': 2, 'congruent': 9}}
{'OP': 'LOAD', 'src': {'same': True, 'type': 'addresses_WC_ht', 'NT': False, 'AVXalign': False, 'size': 1, 'congruent': 6}}
{'OP': 'REPM', 'src': {'same': False, 'congruent': 4, 'type': 'addresses_WT_ht'}, 'dst': {'same': True, 'congruent': 5, 'type': 'addresses_WC_ht'}}
{'OP': 'REPM', 'src': {'same': False, 'congruent': 0, 'type': 'addresses_A_ht'}, 'dst': {'same': False, 'congruent': 0, 'type': 'addresses_WC_ht'}}
{'33': 21829}
33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33
*/
| 33.266667 | 2,999 | 0.655979 |
0fd05b2ec52dee47de9138f5d2767c70cabe6b68 | 303 | asm | Assembly | programs/oeis/261/A261012.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/261/A261012.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/261/A261012.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A261012: Sign(n) (with offset -1): a(n) = 1 if n>0, = -1 if n<0, = 0 if n = 0.
; -1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1
sub $0,1
min $0,1
| 50.5 | 202 | 0.49505 |
ba69e9812c68a24f18c305667c008d55dbc365bd | 206 | asm | Assembly | Microprocessor_Interfacing_CSE_2006/Math_Calculations_Lab_6/two_complement.asm | aadhityasw/VIT-Labs | 2c449f64f4fdd8c0ed5f2b51d05a7c586e6ab2ab | [
"CC0-1.0"
] | 2 | 2021-11-18T05:30:24.000Z | 2022-03-07T06:28:06.000Z | Microprocessor_Interfacing_CSE_2006/Math_Calculations_Lab_6/two_complement.asm | aadhityasw/VIT-Labs | 2c449f64f4fdd8c0ed5f2b51d05a7c586e6ab2ab | [
"CC0-1.0"
] | null | null | null | Microprocessor_Interfacing_CSE_2006/Math_Calculations_Lab_6/two_complement.asm | aadhityasw/VIT-Labs | 2c449f64f4fdd8c0ed5f2b51d05a7c586e6ab2ab | [
"CC0-1.0"
] | 3 | 2021-10-14T01:10:34.000Z | 2022-03-18T14:33:52.000Z | ASSUME CS:CODE, DS:DATA
DATA SEGMENT
VAR1 DB 24H
DATA ENDS
CODE SEGMENT
START:
MOV AX, DATA
MOV DS,AX
MOV AX,0000H
MOV AL,VAR1
NOT AL
MOV BL,AL
ADC AL,00000001B
MOV BL,AL
HLT
CODE ENDS
END START
| 10.842105 | 23 | 0.723301 |
6ea458e1c35d93093b117ea654448484e2a3ee6e | 719 | asm | Assembly | oeis/081/A081539.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/081/A081539.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/081/A081539.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A081539: Triangle read by rows in which the n-th row contains the n numbers in increasing order formed by the concatenation of first n-1 numbers. (The digits of the numbers with 2 or more digits are taken as one entity.) First row is taken to be 0.
; Submitted by Jamie Morken(s1)
; 0,1,2,12,13,23,123,124,134,234,1234,1235,1245,1345,2345,12345,12346,12356,12456,13456,23456,123456,123457,123467,123567,124567,134567,234567,1234567,1234568,1234578,1234678,1235678,1245678,1345678,2345678
mov $2,$0
mov $4,$0
lpb $4
mov $0,$2
sub $4,1
sub $0,$4
mov $3,$0
mov $7,0
lpb $3
add $7,1
sub $0,$7
mov $3,$0
sub $3,1
lpe
mov $6,10
pow $6,$0
mov $0,$6
div $0,10
add $5,$0
lpe
mov $0,$5
| 27.653846 | 250 | 0.67872 |
7e002a61b5984637fa33755aafcaebd5d3ba3417 | 6,166 | asm | Assembly | Transynther/x86/_processed/NC/_st_zr_un_sm_/i9-9900K_12_0xa0.log_21829_1931.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NC/_st_zr_un_sm_/i9-9900K_12_0xa0.log_21829_1931.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NC/_st_zr_un_sm_/i9-9900K_12_0xa0.log_21829_1931.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r14
push %rbp
push %rcx
push %rdi
push %rdx
push %rsi
lea addresses_normal_ht+0x67cc, %rsi
lea addresses_D_ht+0x1af59, %rdi
nop
and %rdx, %rdx
mov $3, %rcx
rep movsl
nop
xor $42501, %r10
lea addresses_WT_ht+0xee8c, %rsi
clflush (%rsi)
nop
cmp $58574, %rbp
mov (%rsi), %cx
nop
nop
nop
nop
cmp $45071, %rdx
lea addresses_WT_ht+0xdef0, %rsi
lea addresses_WT_ht+0x1aa7c, %rdi
nop
nop
nop
cmp $59494, %r14
mov $28, %rcx
rep movsl
nop
nop
nop
nop
and $50439, %rsi
lea addresses_A_ht+0x11494, %rbp
nop
dec %rdi
mov $0x6162636465666768, %rsi
movq %rsi, %xmm0
movups %xmm0, (%rbp)
and %rbp, %rbp
lea addresses_normal_ht+0xfcd4, %r10
inc %rdi
mov (%r10), %dx
nop
nop
nop
xor %rsi, %rsi
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbp
pop %r14
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r12
push %r13
push %r8
push %rcx
push %rdx
push %rsi
// Store
lea addresses_WT+0x734c, %r12
nop
cmp $36517, %rsi
movw $0x5152, (%r12)
add $7290, %r12
// Store
mov $0x7622fc000000070c, %r13
nop
nop
nop
nop
nop
add $31168, %rdx
mov $0x5152535455565758, %r12
movq %r12, %xmm0
movaps %xmm0, (%r13)
nop
nop
nop
nop
nop
xor $3997, %r10
// Load
lea addresses_WC+0x700c, %rdx
xor %r8, %r8
mov (%rdx), %rcx
xor $58369, %rdx
// Store
lea addresses_US+0x13c8e, %rcx
nop
and %r8, %r8
mov $0x5152535455565758, %r13
movq %r13, (%rcx)
nop
nop
nop
nop
nop
add %rsi, %rsi
// Faulty Load
mov $0x7622fc000000070c, %rcx
nop
nop
nop
nop
xor %rsi, %rsi
mov (%rcx), %r13
lea oracles, %r12
and $0xff, %r13
shlq $12, %r13
mov (%r12,%r13,1), %r13
pop %rsi
pop %rdx
pop %rcx
pop %r8
pop %r13
pop %r12
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'NT': False, 'same': False, 'congruent': 0, 'type': 'addresses_NC', 'AVXalign': False, 'size': 16}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 6, 'type': 'addresses_WT', 'AVXalign': False, 'size': 2}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': True, 'congruent': 0, 'type': 'addresses_NC', 'AVXalign': True, 'size': 16}}
{'src': {'NT': False, 'same': False, 'congruent': 8, 'type': 'addresses_WC', 'AVXalign': False, 'size': 8}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 1, 'type': 'addresses_US', 'AVXalign': False, 'size': 8}}
[Faulty Load]
{'src': {'NT': False, 'same': True, 'congruent': 0, 'type': 'addresses_NC', 'AVXalign': False, 'size': 8}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'same': False, 'congruent': 0, 'type': 'addresses_normal_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 0, 'type': 'addresses_D_ht'}}
{'src': {'NT': False, 'same': False, 'congruent': 7, 'type': 'addresses_WT_ht', 'AVXalign': False, 'size': 2}, 'OP': 'LOAD'}
{'src': {'same': False, 'congruent': 1, 'type': 'addresses_WT_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 4, 'type': 'addresses_WT_ht'}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 3, 'type': 'addresses_A_ht', 'AVXalign': False, 'size': 16}}
{'src': {'NT': False, 'same': False, 'congruent': 2, 'type': 'addresses_normal_ht', 'AVXalign': False, 'size': 2}, 'OP': 'LOAD'}
{'58': 21557, 'f0': 30, '00': 242}
58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 00 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 00 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 00 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 00 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 00 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 00 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 00 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 f0 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 00 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58
*/
| 39.025316 | 2,999 | 0.655044 |
47cc4ea07aa4134bbf2871ea001e06aafeaaf832 | 526 | asm | Assembly | print_functions.asm | Highwind360/NimbOS | 25794798984bee6307df70e5dd57d31990ce5713 | [
"Unlicense"
] | null | null | null | print_functions.asm | Highwind360/NimbOS | 25794798984bee6307df70e5dd57d31990ce5713 | [
"Unlicense"
] | null | null | null | print_functions.asm | Highwind360/NimbOS | 25794798984bee6307df70e5dd57d31990ce5713 | [
"Unlicense"
] | null | null | null | ;
; Print function
; Expects bx to point to a null-terminated string
; Prints the string to the console
;
print:
push ax
push bx
push cx
mov ah, 0x0e ; scrolling teletype routine
.print_char:
mov cx, [bx]
test cl, cl
je .exit
add bx, 1
mov al, cl
int 0x10
jmp .print_char
.exit:
pop cx
pop bx
pop ax
ret
;
; Calls print, appends newline
;
println:
call print
push bx
mov bx, NWLN
call print
pop bx
ret
NWLN:
db 0xa,0xd,0
| 13.15 | 52 | 0.581749 |
6c6e2c1345cb476eb80a34ebb13bc0ffb81dbea1 | 8,571 | asm | Assembly | Transynther/x86/_processed/AVXALIGN/_st_/i7-7700_9_0xca.log_21829_1883.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/AVXALIGN/_st_/i7-7700_9_0xca.log_21829_1883.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/AVXALIGN/_st_/i7-7700_9_0xca.log_21829_1883.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r12
push %r13
push %r9
push %rbp
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_normal_ht+0x1418d, %rsi
lea addresses_A_ht+0x11458, %rdi
nop
nop
cmp $65360, %rbp
mov $12, %rcx
rep movsw
nop
nop
cmp $21970, %rbx
lea addresses_D_ht+0x18818, %rdi
nop
nop
nop
nop
nop
add $35558, %r13
and $0xffffffffffffffc0, %rdi
movaps (%rdi), %xmm5
vpextrq $1, %xmm5, %rsi
cmp %r13, %r13
lea addresses_WT_ht+0x1db8, %rcx
nop
nop
nop
and $62901, %r12
mov (%rcx), %edi
nop
nop
cmp $25935, %rsi
lea addresses_D_ht+0xa08d, %rbp
nop
nop
sub %rsi, %rsi
movb $0x61, (%rbp)
nop
nop
and %rbx, %rbx
lea addresses_normal_ht+0xe018, %rsi
lea addresses_normal_ht+0x1ab74, %rdi
clflush (%rsi)
nop
nop
nop
nop
nop
and $17659, %r9
mov $125, %rcx
rep movsw
inc %r12
lea addresses_UC_ht+0xe4, %r12
clflush (%r12)
nop
nop
nop
nop
nop
lfence
movw $0x6162, (%r12)
nop
nop
inc %rsi
lea addresses_A_ht+0x73e8, %rsi
lea addresses_UC_ht+0x19dde, %rdi
nop
nop
nop
xor %r12, %r12
mov $55, %rcx
rep movsb
nop
nop
nop
mfence
lea addresses_WT_ht+0x1d14, %rbp
nop
nop
nop
nop
dec %r13
movb (%rbp), %bl
nop
nop
add $20079, %rdi
lea addresses_D_ht+0x1b818, %rsi
lea addresses_WC_ht+0x8c18, %rdi
nop
nop
nop
nop
and %rbx, %rbx
mov $80, %rcx
rep movsq
nop
nop
nop
sub %rcx, %rcx
lea addresses_UC_ht+0x5018, %rcx
nop
nop
add $46123, %rbp
movups (%rcx), %xmm6
vpextrq $1, %xmm6, %rdi
nop
nop
nop
nop
cmp %r13, %r13
lea addresses_D_ht+0x2e18, %rbx
nop
nop
nop
nop
and $18148, %r12
mov (%rbx), %esi
nop
nop
nop
nop
nop
cmp $55624, %r12
lea addresses_A_ht+0x3470, %r13
nop
cmp $31845, %rbp
vmovups (%r13), %ymm6
vextracti128 $1, %ymm6, %xmm6
vpextrq $1, %xmm6, %rdi
nop
nop
nop
and $53718, %rbx
lea addresses_WC_ht+0x10418, %rsi
lea addresses_WT_ht+0x703f, %rdi
nop
nop
nop
nop
nop
xor $57277, %rbx
mov $124, %rcx
rep movsw
nop
nop
nop
nop
nop
xor %r12, %r12
lea addresses_normal_ht+0x12418, %rsi
lea addresses_normal_ht+0xa248, %rdi
clflush (%rdi)
sub $25990, %rbp
mov $93, %rcx
rep movsl
add $4810, %r13
lea addresses_D_ht+0x18018, %r9
xor %rcx, %rcx
movb (%r9), %bl
nop
nop
nop
add $22632, %r9
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %rbp
pop %r9
pop %r13
pop %r12
ret
.global s_faulty_load
s_faulty_load:
push %r13
push %r8
push %rax
push %rbx
push %rcx
push %rdx
push %rsi
// Store
lea addresses_normal+0x1018, %rcx
nop
nop
dec %rsi
movl $0x51525354, (%rcx)
nop
nop
nop
cmp %rbx, %rbx
// Store
lea addresses_WT+0x9cdb, %r13
sub $34435, %rax
movb $0x51, (%r13)
nop
add %rsi, %rsi
// Store
lea addresses_WT+0x6f18, %rax
clflush (%rax)
nop
cmp $29397, %rcx
movb $0x51, (%rax)
nop
nop
nop
nop
cmp %rdx, %rdx
// Faulty Load
lea addresses_PSE+0x14818, %rbx
nop
nop
add $12744, %rsi
movb (%rbx), %dl
lea oracles, %r8
and $0xff, %rdx
shlq $12, %rdx
mov (%r8,%rdx,1), %rdx
pop %rsi
pop %rdx
pop %rcx
pop %rbx
pop %rax
pop %r8
pop %r13
ret
/*
<gen_faulty_load>
[REF]
{'src': {'congruent': 0, 'AVXalign': False, 'same': False, 'size': 2, 'NT': False, 'type': 'addresses_PSE'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 9, 'AVXalign': False, 'same': False, 'size': 4, 'NT': False, 'type': 'addresses_normal'}}
{'OP': 'STOR', 'dst': {'congruent': 0, 'AVXalign': False, 'same': False, 'size': 1, 'NT': False, 'type': 'addresses_WT'}}
{'OP': 'STOR', 'dst': {'congruent': 6, 'AVXalign': False, 'same': False, 'size': 1, 'NT': False, 'type': 'addresses_WT'}}
[Faulty Load]
{'src': {'congruent': 0, 'AVXalign': False, 'same': True, 'size': 1, 'NT': True, 'type': 'addresses_PSE'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'congruent': 0, 'same': False, 'type': 'addresses_normal_ht'}, 'OP': 'REPM', 'dst': {'congruent': 5, 'same': False, 'type': 'addresses_A_ht'}}
{'src': {'congruent': 7, 'AVXalign': True, 'same': False, 'size': 16, 'NT': True, 'type': 'addresses_D_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 5, 'AVXalign': False, 'same': False, 'size': 4, 'NT': False, 'type': 'addresses_WT_ht'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 0, 'AVXalign': False, 'same': False, 'size': 1, 'NT': False, 'type': 'addresses_D_ht'}}
{'src': {'congruent': 11, 'same': False, 'type': 'addresses_normal_ht'}, 'OP': 'REPM', 'dst': {'congruent': 2, 'same': True, 'type': 'addresses_normal_ht'}}
{'OP': 'STOR', 'dst': {'congruent': 0, 'AVXalign': False, 'same': False, 'size': 2, 'NT': False, 'type': 'addresses_UC_ht'}}
{'src': {'congruent': 3, 'same': False, 'type': 'addresses_A_ht'}, 'OP': 'REPM', 'dst': {'congruent': 0, 'same': False, 'type': 'addresses_UC_ht'}}
{'src': {'congruent': 0, 'AVXalign': False, 'same': False, 'size': 1, 'NT': False, 'type': 'addresses_WT_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 11, 'same': False, 'type': 'addresses_D_ht'}, 'OP': 'REPM', 'dst': {'congruent': 7, 'same': False, 'type': 'addresses_WC_ht'}}
{'src': {'congruent': 11, 'AVXalign': False, 'same': False, 'size': 16, 'NT': False, 'type': 'addresses_UC_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 9, 'AVXalign': False, 'same': True, 'size': 4, 'NT': False, 'type': 'addresses_D_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 1, 'AVXalign': False, 'same': False, 'size': 32, 'NT': False, 'type': 'addresses_A_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 9, 'same': True, 'type': 'addresses_WC_ht'}, 'OP': 'REPM', 'dst': {'congruent': 0, 'same': False, 'type': 'addresses_WT_ht'}}
{'src': {'congruent': 9, 'same': True, 'type': 'addresses_normal_ht'}, 'OP': 'REPM', 'dst': {'congruent': 3, 'same': False, 'type': 'addresses_normal_ht'}}
{'src': {'congruent': 11, 'AVXalign': False, 'same': False, 'size': 1, 'NT': False, 'type': 'addresses_D_ht'}, 'OP': 'LOAD'}
{'33': 21829}
33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33
*/
| 31.862454 | 2,999 | 0.655933 |
4bcc5120314fbb800d982f6490110ae435877061 | 470 | asm | Assembly | programs/oeis/086/A086099.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/086/A086099.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/086/A086099.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A086099: a(n) = OR(k AND (n-k): 0<=k<=n), AND and OR bitwise.
; 0,0,1,0,3,2,3,0,7,6,7,4,7,6,7,0,15,14,15,12,15,14,15,8,15,14,15,12,15,14,15,0,31,30,31,28,31,30,31,24,31,30,31,28,31,30,31,16,31,30,31,28,31,30,31,24,31,30,31,28,31,30,31,0,63,62,63,60,63,62,63,56,63,62,63,60,63,62,63,48,63,62,63,60,63,62,63,56,63,62,63,60,63,62,63,32,63,62,63,60
mov $1,$0
seq $1,246591 ; Smallest number that can be obtained by swapping 2 bits in the binary expansion of n.
sub $0,$1
| 67.142857 | 282 | 0.648936 |
b627797ab9bb640f8fd6e1107f9f2771479ad162 | 14,446 | asm | Assembly | 固件源码/三代控A12-带模型命名源码-易深工程/List/____hi0.asm | wooddoor/Loli3 | 78d87e43effad7dcb17c9d36dd55401aa67e87ac | [
"MIT"
] | 47 | 2019-06-10T07:45:57.000Z | 2022-02-11T03:25:45.000Z | 固件源码/三代控A12-带模型命名源码-易深工程/List/____hi0.asm | wooddoor/Loli3 | 78d87e43effad7dcb17c9d36dd55401aa67e87ac | [
"MIT"
] | 1 | 2020-03-01T15:49:53.000Z | 2020-03-01T15:49:53.000Z | 固件源码/三代控A12-带模型命名源码-易深工程/List/____hi0.asm | wooddoor/Loli3 | 78d87e43effad7dcb17c9d36dd55401aa67e87ac | [
"MIT"
] | 14 | 2019-07-15T23:25:04.000Z | 2021-12-01T00:15:31.000Z | ;--------------------------------------------------------
; File Created by SDCC : free open source ANSI-C Compiler
; Version 3.9.0 #11195 (MINGW32)
;--------------------------------------------------------
.module ____hi0
.optsdcc -mmcs51 --model-small
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
.globl _main
.globl ____TR1
.globl ____TR0
.globl ____TI
.globl ____TF1
.globl ____TF0
.globl ____TB8
.globl ____SM2
.globl ____SM1
.globl ____SM0
.globl ____RS1
.globl ____RS0
.globl ____RI
.globl ____REN
.globl ____RB8
.globl ____PX1
.globl ____PX0
.globl ____PT1
.globl ____PT0
.globl ____PS
.globl ____PPCA
.globl ____PLVD
.globl ____PADC
.globl ____P53
.globl ____P52
.globl ____P51
.globl ____P50
.globl ____P47
.globl ____P46
.globl ____P45
.globl ____P44
.globl ____P43
.globl ____P42
.globl ____P41
.globl ____P40
.globl ____P37
.globl ____P36
.globl ____P35
.globl ____P34
.globl ____P33
.globl ____P32
.globl ____P31
.globl ____P30
.globl ____P27
.globl ____P26
.globl ____P25
.globl ____P24
.globl ____P23
.globl ____P22
.globl ____P21
.globl ____P20
.globl ____P17
.globl ____P16
.globl ____P15
.globl ____P14
.globl ____P13
.globl ____P12
.globl ____P11
.globl ____P10
.globl ____P07
.globl ____P06
.globl ____P05
.globl ____P04
.globl ____P03
.globl ____P02
.globl ____P01
.globl ____P00
.globl ____P
.globl ____OV
.globl ____IT1
.globl ____IT0
.globl ____IE1
.globl ____IE0
.globl ____F0
.globl ____EX1
.globl ____EX0
.globl ____ET1
.globl ____ET0
.globl ____ES
.globl ____ELVD
.globl ____EADC
.globl ____EA
.globl ____CY
.globl ____CR
.globl ____CF
.globl ____CCF1
.globl ____CCF0
.globl ____AC
.globl ____WDT_CONTR
.globl ____WAKE_CLKO
.globl ____TMOD
.globl ____TL1
.globl ____TL0
.globl ____TH1
.globl ____TH0
.globl ____TCON
.globl ____SPSTAT
.globl ____SPDAT
.globl ____SPCTL
.globl ____SP
.globl ____SCON
.globl ____SBUF
.globl ____SADEN
.globl ____SADDR
.globl ____S2CON
.globl ____S2BUF
.globl ____PSW
.globl ____PCON
.globl ____PCA_PWM1
.globl ____PCA_PWM0
.globl ____P5M1
.globl ____P5M0
.globl ____P5
.globl ____P4SW
.globl ____P4M1
.globl ____P4M0
.globl ____P4
.globl ____P3M1
.globl ____P3M0
.globl ____P3
.globl ____P2M1
.globl ____P2M0
.globl ____P2
.globl ____P1M1
.globl ____P1M0
.globl ____P1ASF
.globl ____P1
.globl ____P0M1
.globl ____P0M0
.globl ____P0
.globl ____IPH2
.globl ____IPH
.globl ____IP2
.globl ____IP
.globl ____IE2
.globl ____IE
.globl ____IAP_TRIG
.globl ____IAP_DATA
.globl ____IAP_CONTR
.globl ____IAP_CMD
.globl ____IAP_ADDRL
.globl ____IAP_ADDRH
.globl ____DPL
.globl ____DPH
.globl ____CMOD
.globl ____CLK_DIV
.globl ____CL
.globl ____CH
.globl ____CCON
.globl ____CCAPM1
.globl ____CCAPM0
.globl ____CCAP1L
.globl ____CCAP1H
.globl ____CCAP0L
.globl ____CCAP0H
.globl ____BUS_SPEED
.globl ____BRT
.globl ____B
.globl ____AUXR1
.globl ____AUXR
.globl ____ADC_RESL
.globl ____ADC_RES
.globl ____ADC_CONTR
.globl ____ACC
;--------------------------------------------------------
; special function registers
;--------------------------------------------------------
.area RSEG (ABS,DATA)
.org 0x0000
G$___ACC$0_0$0 == 0x00e0
____ACC = 0x00e0
G$___ADC_CONTR$0_0$0 == 0x00bc
____ADC_CONTR = 0x00bc
G$___ADC_RES$0_0$0 == 0x00bd
____ADC_RES = 0x00bd
G$___ADC_RESL$0_0$0 == 0x00be
____ADC_RESL = 0x00be
G$___AUXR$0_0$0 == 0x008e
____AUXR = 0x008e
G$___AUXR1$0_0$0 == 0x00a2
____AUXR1 = 0x00a2
G$___B$0_0$0 == 0x00f0
____B = 0x00f0
G$___BRT$0_0$0 == 0x009c
____BRT = 0x009c
G$___BUS_SPEED$0_0$0 == 0x00a1
____BUS_SPEED = 0x00a1
G$___CCAP0H$0_0$0 == 0x00fa
____CCAP0H = 0x00fa
G$___CCAP0L$0_0$0 == 0x00ea
____CCAP0L = 0x00ea
G$___CCAP1H$0_0$0 == 0x00fb
____CCAP1H = 0x00fb
G$___CCAP1L$0_0$0 == 0x00eb
____CCAP1L = 0x00eb
G$___CCAPM0$0_0$0 == 0x00da
____CCAPM0 = 0x00da
G$___CCAPM1$0_0$0 == 0x00db
____CCAPM1 = 0x00db
G$___CCON$0_0$0 == 0x00d8
____CCON = 0x00d8
G$___CH$0_0$0 == 0x00f9
____CH = 0x00f9
G$___CL$0_0$0 == 0x00e9
____CL = 0x00e9
G$___CLK_DIV$0_0$0 == 0x0097
____CLK_DIV = 0x0097
G$___CMOD$0_0$0 == 0x00d9
____CMOD = 0x00d9
G$___DPH$0_0$0 == 0x0083
____DPH = 0x0083
G$___DPL$0_0$0 == 0x0082
____DPL = 0x0082
G$___IAP_ADDRH$0_0$0 == 0x00c3
____IAP_ADDRH = 0x00c3
G$___IAP_ADDRL$0_0$0 == 0x00c4
____IAP_ADDRL = 0x00c4
G$___IAP_CMD$0_0$0 == 0x00c5
____IAP_CMD = 0x00c5
G$___IAP_CONTR$0_0$0 == 0x00c7
____IAP_CONTR = 0x00c7
G$___IAP_DATA$0_0$0 == 0x00c2
____IAP_DATA = 0x00c2
G$___IAP_TRIG$0_0$0 == 0x00c6
____IAP_TRIG = 0x00c6
G$___IE$0_0$0 == 0x00a8
____IE = 0x00a8
G$___IE2$0_0$0 == 0x00af
____IE2 = 0x00af
G$___IP$0_0$0 == 0x00b8
____IP = 0x00b8
G$___IP2$0_0$0 == 0x00b5
____IP2 = 0x00b5
G$___IPH$0_0$0 == 0x00b7
____IPH = 0x00b7
G$___IPH2$0_0$0 == 0x00b6
____IPH2 = 0x00b6
G$___P0$0_0$0 == 0x0080
____P0 = 0x0080
G$___P0M0$0_0$0 == 0x0094
____P0M0 = 0x0094
G$___P0M1$0_0$0 == 0x0093
____P0M1 = 0x0093
G$___P1$0_0$0 == 0x0090
____P1 = 0x0090
G$___P1ASF$0_0$0 == 0x009d
____P1ASF = 0x009d
G$___P1M0$0_0$0 == 0x0092
____P1M0 = 0x0092
G$___P1M1$0_0$0 == 0x0091
____P1M1 = 0x0091
G$___P2$0_0$0 == 0x00a0
____P2 = 0x00a0
G$___P2M0$0_0$0 == 0x0096
____P2M0 = 0x0096
G$___P2M1$0_0$0 == 0x0095
____P2M1 = 0x0095
G$___P3$0_0$0 == 0x00b0
____P3 = 0x00b0
G$___P3M0$0_0$0 == 0x00b2
____P3M0 = 0x00b2
G$___P3M1$0_0$0 == 0x00b1
____P3M1 = 0x00b1
G$___P4$0_0$0 == 0x00c0
____P4 = 0x00c0
G$___P4M0$0_0$0 == 0x00b4
____P4M0 = 0x00b4
G$___P4M1$0_0$0 == 0x00b3
____P4M1 = 0x00b3
G$___P4SW$0_0$0 == 0x00bb
____P4SW = 0x00bb
G$___P5$0_0$0 == 0x00c8
____P5 = 0x00c8
G$___P5M0$0_0$0 == 0x00ca
____P5M0 = 0x00ca
G$___P5M1$0_0$0 == 0x00c9
____P5M1 = 0x00c9
G$___PCA_PWM0$0_0$0 == 0x00f2
____PCA_PWM0 = 0x00f2
G$___PCA_PWM1$0_0$0 == 0x00f3
____PCA_PWM1 = 0x00f3
G$___PCON$0_0$0 == 0x0087
____PCON = 0x0087
G$___PSW$0_0$0 == 0x00d0
____PSW = 0x00d0
G$___S2BUF$0_0$0 == 0x009b
____S2BUF = 0x009b
G$___S2CON$0_0$0 == 0x009a
____S2CON = 0x009a
G$___SADDR$0_0$0 == 0x00a9
____SADDR = 0x00a9
G$___SADEN$0_0$0 == 0x00b9
____SADEN = 0x00b9
G$___SBUF$0_0$0 == 0x0099
____SBUF = 0x0099
G$___SCON$0_0$0 == 0x0098
____SCON = 0x0098
G$___SP$0_0$0 == 0x0081
____SP = 0x0081
G$___SPCTL$0_0$0 == 0x00ce
____SPCTL = 0x00ce
G$___SPDAT$0_0$0 == 0x00cf
____SPDAT = 0x00cf
G$___SPSTAT$0_0$0 == 0x00cd
____SPSTAT = 0x00cd
G$___TCON$0_0$0 == 0x0088
____TCON = 0x0088
G$___TH0$0_0$0 == 0x008c
____TH0 = 0x008c
G$___TH1$0_0$0 == 0x008d
____TH1 = 0x008d
G$___TL0$0_0$0 == 0x008a
____TL0 = 0x008a
G$___TL1$0_0$0 == 0x008b
____TL1 = 0x008b
G$___TMOD$0_0$0 == 0x0089
____TMOD = 0x0089
G$___WAKE_CLKO$0_0$0 == 0x008f
____WAKE_CLKO = 0x008f
G$___WDT_CONTR$0_0$0 == 0x00c1
____WDT_CONTR = 0x00c1
;--------------------------------------------------------
; special function bits
;--------------------------------------------------------
.area RSEG (ABS,DATA)
.org 0x0000
G$___AC$0_0$0 == 0x00d6
____AC = 0x00d6
G$___CCF0$0_0$0 == 0x00d8
____CCF0 = 0x00d8
G$___CCF1$0_0$0 == 0x00d9
____CCF1 = 0x00d9
G$___CF$0_0$0 == 0x00df
____CF = 0x00df
G$___CR$0_0$0 == 0x00de
____CR = 0x00de
G$___CY$0_0$0 == 0x00d7
____CY = 0x00d7
G$___EA$0_0$0 == 0x00af
____EA = 0x00af
G$___EADC$0_0$0 == 0x00ad
____EADC = 0x00ad
G$___ELVD$0_0$0 == 0x00ae
____ELVD = 0x00ae
G$___ES$0_0$0 == 0x00ac
____ES = 0x00ac
G$___ET0$0_0$0 == 0x00a9
____ET0 = 0x00a9
G$___ET1$0_0$0 == 0x00ab
____ET1 = 0x00ab
G$___EX0$0_0$0 == 0x00a8
____EX0 = 0x00a8
G$___EX1$0_0$0 == 0x00aa
____EX1 = 0x00aa
G$___F0$0_0$0 == 0x00d5
____F0 = 0x00d5
G$___IE0$0_0$0 == 0x0089
____IE0 = 0x0089
G$___IE1$0_0$0 == 0x008b
____IE1 = 0x008b
G$___IT0$0_0$0 == 0x0088
____IT0 = 0x0088
G$___IT1$0_0$0 == 0x008a
____IT1 = 0x008a
G$___OV$0_0$0 == 0x00d2
____OV = 0x00d2
G$___P$0_0$0 == 0x00d0
____P = 0x00d0
G$___P00$0_0$0 == 0x0080
____P00 = 0x0080
G$___P01$0_0$0 == 0x0081
____P01 = 0x0081
G$___P02$0_0$0 == 0x0082
____P02 = 0x0082
G$___P03$0_0$0 == 0x0083
____P03 = 0x0083
G$___P04$0_0$0 == 0x0084
____P04 = 0x0084
G$___P05$0_0$0 == 0x0085
____P05 = 0x0085
G$___P06$0_0$0 == 0x0086
____P06 = 0x0086
G$___P07$0_0$0 == 0x0087
____P07 = 0x0087
G$___P10$0_0$0 == 0x0090
____P10 = 0x0090
G$___P11$0_0$0 == 0x0091
____P11 = 0x0091
G$___P12$0_0$0 == 0x0092
____P12 = 0x0092
G$___P13$0_0$0 == 0x0093
____P13 = 0x0093
G$___P14$0_0$0 == 0x0094
____P14 = 0x0094
G$___P15$0_0$0 == 0x0095
____P15 = 0x0095
G$___P16$0_0$0 == 0x0096
____P16 = 0x0096
G$___P17$0_0$0 == 0x0097
____P17 = 0x0097
G$___P20$0_0$0 == 0x00a0
____P20 = 0x00a0
G$___P21$0_0$0 == 0x00a1
____P21 = 0x00a1
G$___P22$0_0$0 == 0x00a2
____P22 = 0x00a2
G$___P23$0_0$0 == 0x00a3
____P23 = 0x00a3
G$___P24$0_0$0 == 0x00a4
____P24 = 0x00a4
G$___P25$0_0$0 == 0x00a5
____P25 = 0x00a5
G$___P26$0_0$0 == 0x00a6
____P26 = 0x00a6
G$___P27$0_0$0 == 0x00a7
____P27 = 0x00a7
G$___P30$0_0$0 == 0x00b0
____P30 = 0x00b0
G$___P31$0_0$0 == 0x00b1
____P31 = 0x00b1
G$___P32$0_0$0 == 0x00b2
____P32 = 0x00b2
G$___P33$0_0$0 == 0x00b3
____P33 = 0x00b3
G$___P34$0_0$0 == 0x00b4
____P34 = 0x00b4
G$___P35$0_0$0 == 0x00b5
____P35 = 0x00b5
G$___P36$0_0$0 == 0x00b6
____P36 = 0x00b6
G$___P37$0_0$0 == 0x00b7
____P37 = 0x00b7
G$___P40$0_0$0 == 0x00c0
____P40 = 0x00c0
G$___P41$0_0$0 == 0x00c1
____P41 = 0x00c1
G$___P42$0_0$0 == 0x00c2
____P42 = 0x00c2
G$___P43$0_0$0 == 0x00c3
____P43 = 0x00c3
G$___P44$0_0$0 == 0x00c4
____P44 = 0x00c4
G$___P45$0_0$0 == 0x00c5
____P45 = 0x00c5
G$___P46$0_0$0 == 0x00c6
____P46 = 0x00c6
G$___P47$0_0$0 == 0x00c7
____P47 = 0x00c7
G$___P50$0_0$0 == 0x00c8
____P50 = 0x00c8
G$___P51$0_0$0 == 0x00c9
____P51 = 0x00c9
G$___P52$0_0$0 == 0x00ca
____P52 = 0x00ca
G$___P53$0_0$0 == 0x00cb
____P53 = 0x00cb
G$___PADC$0_0$0 == 0x00bd
____PADC = 0x00bd
G$___PLVD$0_0$0 == 0x00be
____PLVD = 0x00be
G$___PPCA$0_0$0 == 0x00bf
____PPCA = 0x00bf
G$___PS$0_0$0 == 0x00bc
____PS = 0x00bc
G$___PT0$0_0$0 == 0x00b9
____PT0 = 0x00b9
G$___PT1$0_0$0 == 0x00bb
____PT1 = 0x00bb
G$___PX0$0_0$0 == 0x00b8
____PX0 = 0x00b8
G$___PX1$0_0$0 == 0x00ba
____PX1 = 0x00ba
G$___RB8$0_0$0 == 0x009a
____RB8 = 0x009a
G$___REN$0_0$0 == 0x009c
____REN = 0x009c
G$___RI$0_0$0 == 0x0098
____RI = 0x0098
G$___RS0$0_0$0 == 0x00d3
____RS0 = 0x00d3
G$___RS1$0_0$0 == 0x00d4
____RS1 = 0x00d4
G$___SM0$0_0$0 == 0x009f
____SM0 = 0x009f
G$___SM1$0_0$0 == 0x009e
____SM1 = 0x009e
G$___SM2$0_0$0 == 0x009d
____SM2 = 0x009d
G$___TB8$0_0$0 == 0x009b
____TB8 = 0x009b
G$___TF0$0_0$0 == 0x008d
____TF0 = 0x008d
G$___TF1$0_0$0 == 0x008f
____TF1 = 0x008f
G$___TI$0_0$0 == 0x0099
____TI = 0x0099
G$___TR0$0_0$0 == 0x008c
____TR0 = 0x008c
G$___TR1$0_0$0 == 0x008e
____TR1 = 0x008e
;--------------------------------------------------------
; overlayable register banks
;--------------------------------------------------------
.area REG_BANK_0 (REL,OVR,DATA)
.ds 8
;--------------------------------------------------------
; internal ram data
;--------------------------------------------------------
.area DSEG (DATA)
;--------------------------------------------------------
; overlayable items in internal ram
;--------------------------------------------------------
;--------------------------------------------------------
; Stack segment in internal ram
;--------------------------------------------------------
.area SSEG
__start__stack:
.ds 1
;--------------------------------------------------------
; indirectly addressable internal ram data
;--------------------------------------------------------
.area ISEG (DATA)
;--------------------------------------------------------
; absolute internal ram data
;--------------------------------------------------------
.area IABS (ABS,DATA)
.area IABS (ABS,DATA)
;--------------------------------------------------------
; bit data
;--------------------------------------------------------
.area BSEG (BIT)
;--------------------------------------------------------
; paged external ram data
;--------------------------------------------------------
.area PSEG (PAG,XDATA)
;--------------------------------------------------------
; external ram data
;--------------------------------------------------------
.area XSEG (XDATA)
;--------------------------------------------------------
; absolute external ram data
;--------------------------------------------------------
.area XABS (ABS,XDATA)
;--------------------------------------------------------
; external initialized ram data
;--------------------------------------------------------
.area XISEG (XDATA)
.area HOME (CODE)
.area GSINIT0 (CODE)
.area GSINIT1 (CODE)
.area GSINIT2 (CODE)
.area GSINIT3 (CODE)
.area GSINIT4 (CODE)
.area GSINIT5 (CODE)
.area GSINIT (CODE)
.area GSFINAL (CODE)
.area CSEG (CODE)
;--------------------------------------------------------
; interrupt vector
;--------------------------------------------------------
.area HOME (CODE)
__interrupt_vect:
ljmp __sdcc_gsinit_startup
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
.area HOME (CODE)
.area GSINIT (CODE)
.area GSFINAL (CODE)
.area GSINIT (CODE)
.globl __sdcc_gsinit_startup
.globl __sdcc_program_startup
.globl __start__stack
.globl __mcs51_genXINIT
.globl __mcs51_genXRAMCLEAR
.globl __mcs51_genRAMCLEAR
.area GSFINAL (CODE)
ljmp __sdcc_program_startup
;--------------------------------------------------------
; Home
;--------------------------------------------------------
.area HOME (CODE)
.area HOME (CODE)
__sdcc_program_startup:
ljmp _main
; return from main will return to caller
;--------------------------------------------------------
; code
;--------------------------------------------------------
.area CSEG (CODE)
;------------------------------------------------------------
;Allocation info for local variables in function 'main'
;------------------------------------------------------------
G$main$0$0 ==.
C$____hi0.c$3$0_0$1 ==.
; ____hi0.c:3: int main()
; -----------------------------------------
; function main
; -----------------------------------------
_main:
ar7 = 0x07
ar6 = 0x06
ar5 = 0x05
ar4 = 0x04
ar3 = 0x03
ar2 = 0x02
ar1 = 0x01
ar0 = 0x00
C$____hi0.c$5$1_0$1 ==.
; ____hi0.c:5: return 0;
mov dptr,#0x0000
C$____hi0.c$6$1_0$1 ==.
; ____hi0.c:6: }
C$____hi0.c$6$1_0$1 ==.
XG$main$0$0 ==.
ret
.area CSEG (CODE)
.area CONST (CODE)
.area XINIT (CODE)
.area CABS (ABS,CODE)
| 22.857595 | 61 | 0.604596 |
e574a9ded944ba8131a0aae69ce2f59de30fd948 | 5,608 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0_notsx.log_21829_635.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0_notsx.log_21829_635.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0_notsx.log_21829_635.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r9
push %rbp
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_D_ht+0x1eaa0, %rsi
lea addresses_WC_ht+0xe3ae, %rdi
nop
nop
nop
nop
dec %r9
mov $14, %rcx
rep movsw
nop
nop
nop
nop
nop
and %rbp, %rbp
lea addresses_WT_ht+0x6390, %r10
add %rbx, %rbx
mov $0x6162636465666768, %rbp
movq %rbp, %xmm6
movups %xmm6, (%r10)
nop
nop
nop
add $35874, %rbx
lea addresses_D_ht+0x1e300, %r10
nop
nop
sub $24875, %rsi
movups (%r10), %xmm2
vpextrq $0, %xmm2, %rbp
nop
nop
nop
cmp $59969, %rbp
lea addresses_WC_ht+0xfc00, %rdi
nop
nop
nop
nop
nop
sub $54638, %rcx
mov (%rdi), %ebp
nop
nop
nop
nop
cmp $59233, %r10
lea addresses_normal_ht+0x109d0, %rsi
nop
mfence
movb $0x61, (%rsi)
nop
nop
xor $23758, %rdi
lea addresses_WC_ht+0x12900, %rbx
nop
nop
inc %r9
mov (%rbx), %bp
nop
nop
and $20292, %rcx
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %rbp
pop %r9
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r13
push %r8
push %r9
push %rcx
push %rdi
push %rdx
push %rsi
// REPMOV
lea addresses_D+0x177c0, %rsi
lea addresses_A+0x5d75, %rdi
nop
and %rdx, %rdx
mov $29, %rcx
rep movsl
and %r8, %r8
// Faulty Load
lea addresses_RW+0x3200, %r13
nop
nop
xor %r9, %r9
mov (%r13), %si
lea oracles, %r9
and $0xff, %rsi
shlq $12, %rsi
mov (%r9,%rsi,1), %rsi
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %r9
pop %r8
pop %r13
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_RW', 'AVXalign': False, 'size': 32, 'NT': False, 'same': False, 'congruent': 0}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_D', 'congruent': 5, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_A', 'congruent': 0, 'same': False}}
[Faulty Load]
{'src': {'type': 'addresses_RW', 'AVXalign': False, 'size': 2, 'NT': False, 'same': True, 'congruent': 0}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'type': 'addresses_D_ht', 'congruent': 5, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_WC_ht', 'congruent': 1, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WT_ht', 'AVXalign': False, 'size': 16, 'NT': False, 'same': False, 'congruent': 2}}
{'src': {'type': 'addresses_D_ht', 'AVXalign': False, 'size': 16, 'NT': False, 'same': False, 'congruent': 8}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_WC_ht', 'AVXalign': False, 'size': 4, 'NT': False, 'same': False, 'congruent': 6}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'type': 'addresses_normal_ht', 'AVXalign': False, 'size': 1, 'NT': False, 'same': False, 'congruent': 2}}
{'src': {'type': 'addresses_WC_ht', 'AVXalign': False, 'size': 2, 'NT': False, 'same': False, 'congruent': 8}, 'OP': 'LOAD'}
{'32': 21829}
32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32
*/
| 41.235294 | 2,999 | 0.657632 |
91a9d68ea752c628edcef846ca6dacde269dc04e | 549 | asm | Assembly | oeis/157/A157449.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/157/A157449.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/157/A157449.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A157449: Difference between n and the sum of its divisors except 1 and itself.
; Submitted by Jon Maiga
; 2,3,2,5,1,7,2,6,3,11,-3,13,5,7,2,17,-2,19,-1,11,9,23,-11,20,11,15,1,29,-11,31,2,19,15,23,-18,37,17,23,-9,41,-11,43,5,13,21,47,-27,42,8,31,7,53,-11,39,-7,35,27,59,-47,61,29,23,2,47,-11,67,11,43,-3,71,-50,73,35,27,13,59,-11,79,-25,42,39,83,-55,63,41,55,-3,89,-53,71,17,59,45,71,-59,97,26,43,-16,101
add $0,1
mov $1,$0
seq $1,1065 ; Sum of proper divisors (or aliquot parts) of n: sum of divisors of n that are less than n.
sub $0,$1
add $0,2
| 54.9 | 298 | 0.642987 |
87ec6052fec0b8c701e2d55a5c11e998cbfded71 | 416 | asm | Assembly | programs/oeis/281/A281264.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/281/A281264.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/281/A281264.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A281264: Base-2 logarithm of denominator of Sum_{k=0..n^2-1}((-1)^k*sqrt(Pi)/(Gamma(1/2-k)*Gamma(1+k)))-n).
; 0,4,15,26,46,67,94,120,158,194,236,281,333,386,445,502,574,642,716,792,875,960,1054,1143,1244,1345,1451,1560,1676,1793,1916,2036,2174,2306,2444,2584,2731,2880,3034,3190,3356,3519,3690,3862,4041,4226,4413,4597,4796,4992
add $0,1
pow $0,2
lpb $0
sub $0,1
add $1,$0
add $0,2
div $0,2
lpe
mov $0,$1
| 32 | 220 | 0.673077 |
906829175faa1dda4ad165e4cda9a3390c65cbb8 | 813 | asm | Assembly | programs/oeis/025/A025728.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/025/A025728.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/025/A025728.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A025728: Index of 8^n within sequence of numbers of form 3^i*8^j.
; 1,3,7,13,21,31,43,57,73,91,110,131,154,179,206,235,266,299,334,370,408,448,490,534,580,628,678,730,783,838,895,954,1015,1078,1143,1210,1279,1350,1422,1496,1572,1650,1730,1812,1896,1982,2070,2159,2250,2343,2438
mov $3,$0
add $3,1
mov $12,$0
lpb $3
mov $0,$12
sub $3,1
sub $0,$3
mov $9,$0
mov $10,0
mov $11,$0
add $11,1
lpb $11
mov $0,$9
sub $11,1
sub $0,$11
mov $5,$0
mov $7,2
lpb $7
sub $7,1
add $0,$7
sub $0,1
mov $2,$0
mul $2,578
div $2,648
mov $4,$2
mov $8,$7
lpb $8
mov $6,$4
sub $8,1
lpe
lpe
lpb $5
mov $5,0
sub $6,$4
lpe
mov $4,$6
add $4,1
add $10,$4
lpe
add $1,$10
lpe
mov $0,$1
| 17.673913 | 211 | 0.512915 |
ac2f06a5fa88ad943066d23bbf48de4562b5b3b9 | 6,949 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0_notsx.log_21829_780.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0_notsx.log_21829_780.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0_notsx.log_21829_780.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r13
push %r15
push %r8
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_UC_ht+0x16aac, %rsi
lea addresses_normal_ht+0x83fc, %rdi
sub %r8, %r8
mov $95, %rcx
rep movsw
nop
nop
nop
nop
and $28491, %rbx
lea addresses_WT_ht+0x9ab8, %r15
nop
nop
sub $43494, %r13
mov $0x6162636465666768, %rbx
movq %rbx, %xmm6
vmovups %ymm6, (%r15)
nop
nop
nop
xor %rsi, %rsi
lea addresses_WT_ht+0x23f4, %rsi
nop
nop
and %r15, %r15
mov (%rsi), %r8d
nop
sub %r13, %r13
lea addresses_normal_ht+0x16c6c, %rsi
lea addresses_D_ht+0x5cfc, %rdi
add $4985, %r15
mov $125, %rcx
rep movsq
dec %rcx
lea addresses_WC_ht+0x1b3fc, %r13
clflush (%r13)
nop
sub $35081, %rcx
mov (%r13), %ebx
nop
nop
add $29262, %rsi
lea addresses_UC_ht+0x1d840, %rdi
nop
nop
nop
nop
and $34022, %r13
mov (%rdi), %rsi
nop
sub $14395, %rcx
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %r8
pop %r15
pop %r13
ret
.global s_faulty_load
s_faulty_load:
push %r12
push %r14
push %rax
push %rbp
push %rbx
push %rcx
push %rdi
push %rsi
// Store
lea addresses_WC+0xdbfc, %rcx
nop
nop
nop
nop
xor $64964, %r12
movl $0x51525354, (%rcx)
nop
nop
nop
add %r12, %r12
// Store
lea addresses_UC+0xf3fc, %r12
nop
nop
nop
nop
nop
xor $29808, %rdi
mov $0x5152535455565758, %rax
movq %rax, %xmm6
movups %xmm6, (%r12)
add %r12, %r12
// Store
lea addresses_A+0x715c, %rbp
sub %rbx, %rbx
movl $0x51525354, (%rbp)
nop
nop
nop
sub %rbp, %rbp
// REPMOV
lea addresses_RW+0x188fc, %rsi
lea addresses_WC+0xdbfc, %rdi
nop
nop
add %rbp, %rbp
mov $83, %rcx
rep movsq
nop
nop
nop
nop
nop
xor %rsi, %rsi
// Load
lea addresses_RW+0x847c, %rcx
nop
nop
nop
nop
nop
sub $58012, %rdi
movups (%rcx), %xmm7
vpextrq $1, %xmm7, %rax
nop
nop
inc %r14
// Store
lea addresses_UC+0x145fc, %r14
xor $49637, %rcx
mov $0x5152535455565758, %r12
movq %r12, (%r14)
add $36600, %r14
// Faulty Load
lea addresses_WT+0x4bfc, %r14
nop
nop
xor %rbp, %rbp
mov (%r14), %si
lea oracles, %rbx
and $0xff, %rsi
shlq $12, %rsi
mov (%rbx,%rsi,1), %rsi
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %rbp
pop %rax
pop %r14
pop %r12
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_WT', 'AVXalign': False, 'size': 2, 'NT': False, 'same': False, 'congruent': 0}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'type': 'addresses_WC', 'AVXalign': False, 'size': 4, 'NT': False, 'same': False, 'congruent': 7}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC', 'AVXalign': False, 'size': 16, 'NT': False, 'same': False, 'congruent': 11}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A', 'AVXalign': False, 'size': 4, 'NT': False, 'same': False, 'congruent': 5}}
{'src': {'type': 'addresses_RW', 'congruent': 5, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_WC', 'congruent': 11, 'same': False}}
{'src': {'type': 'addresses_RW', 'AVXalign': False, 'size': 16, 'NT': False, 'same': False, 'congruent': 7}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC', 'AVXalign': False, 'size': 8, 'NT': True, 'same': False, 'congruent': 9}}
[Faulty Load]
{'src': {'type': 'addresses_WT', 'AVXalign': False, 'size': 2, 'NT': False, 'same': True, 'congruent': 0}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'type': 'addresses_UC_ht', 'congruent': 4, 'same': True}, 'OP': 'REPM', 'dst': {'type': 'addresses_normal_ht', 'congruent': 6, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WT_ht', 'AVXalign': False, 'size': 32, 'NT': False, 'same': False, 'congruent': 0}}
{'src': {'type': 'addresses_WT_ht', 'AVXalign': False, 'size': 4, 'NT': False, 'same': True, 'congruent': 3}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_normal_ht', 'congruent': 4, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_D_ht', 'congruent': 8, 'same': False}}
{'src': {'type': 'addresses_WC_ht', 'AVXalign': False, 'size': 4, 'NT': False, 'same': False, 'congruent': 11}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_UC_ht', 'AVXalign': False, 'size': 8, 'NT': False, 'same': False, 'congruent': 2}, 'OP': 'LOAD'}
{'39': 21829}
39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39
*/
| 35.819588 | 2,999 | 0.654195 |
bb0b39389b971e3a5599dfd8429f6a741de65128 | 552 | asm | Assembly | oeis/190/A190570.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 11 | 2021-08-22T19:44:55.000Z | 2022-03-20T16:47:57.000Z | oeis/190/A190570.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 9 | 2021-08-29T13:15:54.000Z | 2022-03-09T19:52:31.000Z | oeis/190/A190570.asm | neoneye/loda-programs | 84790877f8e6c2e821b183d2e334d612045d29c0 | [
"Apache-2.0"
] | 3 | 2021-08-22T20:56:47.000Z | 2021-09-29T06:26:12.000Z | ; A190570: Number of n-step one-sided prudent walks, avoiding exactly two consecutive west steps and two consecutive east steps.
; Submitted by Christian Krause
; 1,3,5,13,27,63,137,309,683,1527,3393,7565,16835,37503,83497,185957,414075,922119,2053393,4572669,10182643,22675407,50494905,112445269,250399915,557606103,1241711393,2765119597,6157538211,13711985439
lpb $0
sub $0,1
add $4,$1
add $1,$3
mov $5,$3
add $5,$2
mov $2,$3
mul $2,2
mov $3,$5
sub $3,$1
add $4,3
add $2,$4
add $4,$5
lpe
mov $0,$2
div $0,3
mul $0,2
add $0,1
| 24 | 200 | 0.699275 |
f2797dc34e11c13b842bd35f1fc9473db0d3ba89 | 438 | asm | Assembly | programs/oeis/118/A118620.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 22 | 2018-02-06T19:19:31.000Z | 2022-01-17T21:53:31.000Z | programs/oeis/118/A118620.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 41 | 2021-02-22T19:00:34.000Z | 2021-08-28T10:47:47.000Z | programs/oeis/118/A118620.asm | neoneye/loda | afe9559fb53ee12e3040da54bd6aa47283e0d9ec | [
"Apache-2.0"
] | 5 | 2021-02-24T21:14:16.000Z | 2021-08-09T19:48:05.000Z | ; A118620: Start with 1 and repeatedly reverse the digits and add 45 to get the next term.
; 1,46,109,946,694,541,190,136,676,721,172,316,658,901,154,496,739,982,334,478,919,964,514,460,109,946,694,541,190,136,676,721,172,316,658,901,154,496,739,982,334,478,919,964,514,460,109,946,694,541,190,136,676,721,172
mov $2,$0
mov $0,1
lpb $2
seq $0,4086 ; Read n backwards (referred to as R(n) in many sequences).
add $0,45
sub $2,1
lpe
| 39.818182 | 218 | 0.710046 |
fcbfa79c46577170a0fa39bbc38b3f77629c508b | 8,139 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_sm_/i9-9900K_12_0xa0.log_21829_1625.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_sm_/i9-9900K_12_0xa0.log_21829_1625.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_sm_/i9-9900K_12_0xa0.log_21829_1625.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r12
push %r13
push %r14
push %r8
push %rcx
push %rdi
push %rsi
lea addresses_WC_ht+0x1be3c, %r12
nop
nop
nop
xor $39772, %r11
mov (%r12), %r8d
nop
nop
nop
nop
nop
dec %r12
lea addresses_D_ht+0x19f3c, %rsi
nop
nop
nop
xor %rcx, %rcx
mov $0x6162636465666768, %r14
movq %r14, (%rsi)
nop
nop
nop
nop
cmp %r11, %r11
lea addresses_UC_ht+0x176d4, %rcx
nop
nop
nop
sub %r13, %r13
mov $0x6162636465666768, %r12
movq %r12, %xmm0
movups %xmm0, (%rcx)
nop
nop
nop
nop
cmp %r14, %r14
lea addresses_normal_ht+0x1c8ce, %rsi
lea addresses_WT_ht+0xe09c, %rdi
clflush (%rdi)
nop
nop
nop
nop
nop
sub $8112, %r8
mov $1, %rcx
rep movsl
nop
sub %rdi, %rdi
lea addresses_normal_ht+0x1599c, %rsi
lea addresses_D_ht+0x7f10, %rdi
nop
nop
xor %r11, %r11
mov $57, %rcx
rep movsq
nop
sub $55490, %r12
lea addresses_D_ht+0x1049c, %rsi
lea addresses_D_ht+0xecc4, %rdi
xor $3510, %r11
mov $17, %rcx
rep movsq
nop
nop
nop
nop
nop
add $17300, %r12
lea addresses_A_ht+0x49c, %rsi
lea addresses_A_ht+0x1109c, %rdi
nop
nop
nop
nop
sub %r12, %r12
mov $60, %rcx
rep movsw
nop
nop
cmp %r14, %r14
lea addresses_UC_ht+0x1675c, %r13
nop
nop
nop
inc %rcx
movl $0x61626364, (%r13)
nop
nop
and %rcx, %rcx
lea addresses_WT_ht+0x1bc9c, %r14
clflush (%r14)
nop
nop
nop
sub %r8, %r8
mov (%r14), %si
nop
nop
nop
and %rsi, %rsi
lea addresses_UC_ht+0xc9c, %rdi
nop
add %rsi, %rsi
mov $0x6162636465666768, %r11
movq %r11, (%rdi)
nop
nop
nop
nop
nop
dec %rdi
pop %rsi
pop %rdi
pop %rcx
pop %r8
pop %r14
pop %r13
pop %r12
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r12
push %r14
push %r8
push %rbp
push %rbx
push %rcx
// Store
lea addresses_RW+0x1f09c, %r14
nop
and $465, %rbx
mov $0x5152535455565758, %r12
movq %r12, (%r14)
nop
nop
and $18793, %rcx
// Store
lea addresses_normal+0x1649c, %r8
clflush (%r8)
nop
nop
nop
nop
and $29925, %rbp
mov $0x5152535455565758, %r11
movq %r11, %xmm5
vmovups %ymm5, (%r8)
nop
nop
and $2868, %rbx
// Load
mov $0x7c0296000000049c, %rbp
add $60192, %r12
mov (%rbp), %r14
nop
nop
nop
nop
nop
sub %rcx, %rcx
// Store
lea addresses_UC+0x1989c, %r11
clflush (%r11)
nop
nop
nop
dec %rbx
movl $0x51525354, (%r11)
nop
xor %r8, %r8
// Store
lea addresses_D+0x1c14, %r12
nop
xor $61721, %r14
mov $0x5152535455565758, %r11
movq %r11, (%r12)
nop
nop
nop
nop
xor %r12, %r12
// Store
lea addresses_normal+0x1649c, %rbx
nop
xor %rbp, %rbp
mov $0x5152535455565758, %r8
movq %r8, %xmm5
vmovups %ymm5, (%rbx)
cmp $25247, %r14
// Faulty Load
lea addresses_normal+0x1649c, %r12
nop
nop
nop
and %rbx, %rbx
mov (%r12), %r14
lea oracles, %r12
and $0xff, %r14
shlq $12, %r14
mov (%r12,%r14,1), %r14
pop %rcx
pop %rbx
pop %rbp
pop %r8
pop %r14
pop %r12
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'src': {'NT': False, 'same': False, 'congruent': 0, 'type': 'addresses_normal', 'AVXalign': False, 'size': 2}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 6, 'type': 'addresses_RW', 'AVXalign': False, 'size': 8}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': True, 'congruent': 0, 'type': 'addresses_normal', 'AVXalign': False, 'size': 32}}
{'src': {'NT': False, 'same': False, 'congruent': 10, 'type': 'addresses_NC', 'AVXalign': False, 'size': 8}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 9, 'type': 'addresses_UC', 'AVXalign': False, 'size': 4}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 3, 'type': 'addresses_D', 'AVXalign': False, 'size': 8}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': True, 'congruent': 0, 'type': 'addresses_normal', 'AVXalign': False, 'size': 32}}
[Faulty Load]
{'src': {'NT': False, 'same': True, 'congruent': 0, 'type': 'addresses_normal', 'AVXalign': False, 'size': 8}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'NT': False, 'same': False, 'congruent': 1, 'type': 'addresses_WC_ht', 'AVXalign': False, 'size': 4}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 2, 'type': 'addresses_D_ht', 'AVXalign': False, 'size': 8}}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 3, 'type': 'addresses_UC_ht', 'AVXalign': False, 'size': 16}}
{'src': {'same': False, 'congruent': 1, 'type': 'addresses_normal_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 10, 'type': 'addresses_WT_ht'}}
{'src': {'same': False, 'congruent': 6, 'type': 'addresses_normal_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 1, 'type': 'addresses_D_ht'}}
{'src': {'same': False, 'congruent': 11, 'type': 'addresses_D_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 3, 'type': 'addresses_D_ht'}}
{'src': {'same': False, 'congruent': 11, 'type': 'addresses_A_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 9, 'type': 'addresses_A_ht'}}
{'OP': 'STOR', 'dst': {'NT': True, 'same': False, 'congruent': 5, 'type': 'addresses_UC_ht', 'AVXalign': False, 'size': 4}}
{'src': {'NT': False, 'same': False, 'congruent': 11, 'type': 'addresses_WT_ht', 'AVXalign': False, 'size': 2}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 11, 'type': 'addresses_UC_ht', 'AVXalign': False, 'size': 8}}
{'58': 21829}
58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58
*/
| 31.546512 | 2,999 | 0.656223 |
ac25861b5020a79aad5a6bf5c2b7251f0728ec87 | 4,869 | asm | Assembly | source/main/commands/system/list.asm | paulscottrobson/6502-basic | d4c360041bfa49427a506465e58bb0ef94beaa44 | [
"MIT"
] | 3 | 2021-09-30T19:34:11.000Z | 2021-10-31T06:55:50.000Z | source/main/commands/system/list.asm | paulscottrobson/6502-Basic | d4c360041bfa49427a506465e58bb0ef94beaa44 | [
"MIT"
] | null | null | null | source/main/commands/system/list.asm | paulscottrobson/6502-Basic | d4c360041bfa49427a506465e58bb0ef94beaa44 | [
"MIT"
] | 1 | 2021-12-07T21:58:44.000Z | 2021-12-07T21:58:44.000Z | ; ************************************************************************************************
; ************************************************************************************************
;
; Name: list.asm
; Purpose: LIST command
; Created: 7th March 2021
; Reviewed: 11th March 2021
; Author: Paul Robson (paul@robsons.org.uk)
;
; ************************************************************************************************
; ************************************************************************************************
.section storage
structIndent:
.fill 1
.send storage
.section code
; ************************************************************************************************
;
; List command
;
; ************************************************************************************************
CommandList: ;; [list]
;
; Get start and end range.
;
ldx #0 ; set start/end lines in stack 0/1 to 0 and $FFFF
stx structIndent
jsr MInt32False
inx
jsr MInt32True
;
lda (codePtr),y ; look at first token
cmp #TKW_COMMA ; list ,xxxx
beq _CLEndLine
cmp #0 ; list ... on its own.
bmi _CLDoListing ; do the whole lot.
;
ldx #0 ; get start line at stack:0
jsr EvaluateInteger
lda (codePtr),y ; , follows ?
cmp #TKW_COMMA
beq _CLEndLine
jsr MInt32CopyUp ; copy first to second if just a line number on its
jmp _CLDoListing ; own e.g. list 1100
;
_CLEndLine:
iny ; skip comma
lda (codePtr),y ; no number follows, then its list 1000,
bmi _CLDoListing
ldx #1 ; get the last line to list
jsr EvaluateInteger ; get end
;
; This does the actual listing, though most of the work is done by
; the tokenise module.
;
_CLDoListing:
jsr ResetCodeAddress ; back to the start.
_CLCheckLoop:
.device_syncbreak ; break out of this ?
ldy #0 ; check end.
lda (codePtr),y
beq _CLEnd
;
ldx #0 ; compare vs lower.
jsr CLCompareLineTOS
cmp #255 ; if < skip
beq _CLNext
inx
jsr CLCompareLineTOS ; compare vs higher
cmp #1
beq _CLNext
lda #$80 ; undo any down indents this line.
jsr CLStructureCheck
lda structIndent ; indent level.
bpl _CLPositive
lda #0
_CLPositive:
.tokeniser_list ; detokenise and list code at line (codePtr)
lda #$82 ; up indents from this point on.
jsr CLStructureCheck
lda structIndent
bpl _CLNext
lda #0
sta structIndent
_CLNext:
ldy #0 ; go to next line.
lda (codePtr),y
clc
adc codePtr
sta codePtr
bcc _CLCheckLoop
inc codePtr+1
jmp _CLCheckLoop
_CLEnd:
jmp WarmStart ; warm start after list.
; ************************************************************************************************
;
; Compare current line against low word of stack,x
;
; ************************************************************************************************
CLCompareLineTOS:
ldy #1
lda (codePtr),y
eor esInt0,x
sta temp0
iny
lda (codePtr),y
eor esInt1,x
ora temp0
beq _CLCLTExit
;
dey
lda (codePtr),y
cmp esInt0,x
iny
lda (codePtr),y
sbc esInt1,x
lda #255
bcc _CLCLTExit
lda #1
_CLCLTExit:
rts
; ************************************************************************************************
;
; Scan through line at (codePtr) looking for structure adjuster A, and adjust
; structIndent accordingly.
;
; ************************************************************************************************
CLStructureCheck:
sta temp0
ldy #3
_CLSCLoop:
lda (codePtr),y ; get and consume token.
iny
cmp #$80
bcc _CLSCLoop ; $00-$7F just step over.
beq _CLSCExit ; EOL return
cmp #$86 ; special handler
bcc _CLSCSpecial
cmp #TOK_STRUCTST ; check if structure changer.
bcc _CLSCLoop
cmp #TOK_UNARYST
bcs _CLSCLoop
;
tax ; get adjustment
lda ELBinaryOperatorInfo-TOK_BINARYST,x
cmp temp0 ; if what we're searching for
bne _CLSCLoop
sec
sbc #$81 ; convert to offset
asl a ; double indent step
clc
adc structIndent ; add to structure indent
sta structIndent
jmp _CLSCLoop
_CLSCSpecial: ; handle specials (not $80)
jsr ScannerSkipSpecial
jmp _CLSCLoop
_CLSCExit:
rts
.send code
; ************************************************************************************************
;
; Changes and Updates
;
; ************************************************************************************************
;
; Date Notes
; ==== =====
; 07-Mar-21 Pre code read v0.01
;
; ************************************************************************************************
| 26.318919 | 98 | 0.456973 |
1a7440e73cae4678d4f236c9f739b2548a929f31 | 4,173 | asm | Assembly | src/header.asm | tbsp/gb-starter-kit | e8e30f8c235711b3b5d2cfe2b32e951c9fa681bf | [
"MIT"
] | null | null | null | src/header.asm | tbsp/gb-starter-kit | e8e30f8c235711b3b5d2cfe2b32e951c9fa681bf | [
"MIT"
] | null | null | null | src/header.asm | tbsp/gb-starter-kit | e8e30f8c235711b3b5d2cfe2b32e951c9fa681bf | [
"MIT"
] | null | null | null |
INCLUDE "defines.asm"
SECTION "Header", ROM0[$100]
; This is your ROM's entry point
; You have 4 bytes of code to do... something
sub $11 ; This helps check if we're on CGB more efficiently
jr EntryPoint
; Make sure to allocate some space for the header, so no important
; code gets put there and later overwritten by RGBFIX.
; RGBFIX is designed to operate over a zero-filled header, so make
; sure to put zeros regardless of the padding value. (This feature
; was introduced in RGBDS 0.4.0, but the -MG etc flags were also
; introduced in that version.)
ds $150 - @, 0
EntryPoint:
ldh [hConsoleType], a
Reset::
di ; Disable interrupts while we set up
; Kill sound
xor a
ldh [rNR52], a
; Wait for VBlank and turn LCD off
.waitVBlank
ldh a, [rLY]
cp SCRN_Y
jr c, .waitVBlank
xor a
ldh [rLCDC], a
; Goal now: set up the minimum required to turn the LCD on again
; A big chunk of it is to make sure the VBlank handler doesn't crash
ld sp, wStackBottom
ld a, BANK(OAMDMA)
; No need to write bank number to HRAM, interrupts aren't active
ld [rROMB0], a
ld hl, OAMDMA
lb bc, OAMDMA.end - OAMDMA, LOW(hOAMDMA)
.copyOAMDMA
ld a, [hli]
ldh [c], a
inc c
dec b
jr nz, .copyOAMDMA
; Set Palettes
ld a, %11100100
ldh [rBGP], a
ldh [rOBP0], a
ldh [rOBP1], a
; You will also need to reset your handlers' variables below
; I recommend reading through, understanding, and customizing this file
; in its entirety anyways. This whole file is the "global" game init,
; so it's strongly tied to your own game.
; I don't recommend clearing large amounts of RAM, nor to init things
; here that can be initialized later.
; Reset variables necessary for the VBlank handler to function correctly
; But only those for now
xor a
ldh [hVBlankFlag], a
ldh [hOAMHigh], a
ldh [hCanSoftReset], a
dec a ; ld a, $FF
ldh [hHeldKeys], a
; Load the correct ROM bank for later
; Important to do it before enabling interrupts
ld a, BANK(Intro)
ldh [hCurROMBank], a
ld [rROMB0], a
; Select wanted interrupts here
; You can also enable them later if you want
ld a, IEF_VBLANK
ldh [rIE], a
xor a
ei ; Only takes effect after the following instruction
ldh [rIF], a ; Clears "accumulated" interrupts
; Init shadow regs
; xor a
ldh [hSCY], a
ldh [hSCX], a
ld a, LCDCF_ON | LCDCF_BGON
ldh [hLCDC], a
; And turn the LCD on!
ldh [rLCDC], a
; Clear OAM, so it doesn't display garbage
; This will get committed to hardware OAM after the end of the first
; frame, but the hardware doesn't display it, so that's fine.
ld hl, wShadowOAM
ld c, NB_SPRITES * 4
xor a
rst MemsetSmall
ld a, h ; ld a, HIGH(wShadowOAM)
ldh [hOAMHigh], a
; `Intro`'s bank has already been loaded earlier
jp Intro
SECTION "OAM DMA routine", ROMX
; OAM DMA prevents access to most memory, but never HRAM.
; This routine starts an OAM DMA transfer, then waits for it to complete.
; It gets copied to HRAM and is called there from the VBlank handler
OAMDMA:
ldh [rDMA], a
ld a, NB_SPRITES
.wait
dec a
jr nz, .wait
ret
.end
SECTION "Global vars", HRAM
; 0 if CGB (including DMG mode and GBA), non-zero for other models
hConsoleType:: db
; Copy of the currently-loaded ROM bank, so the handlers can restore it
; Make sure to always write to it before writing to ROMB0
; (Mind that if using ROMB1, you will run into problems)
hCurROMBank:: db
SECTION "OAM DMA", HRAM
hOAMDMA::
ds OAMDMA.end - OAMDMA
SECTION UNION "Shadow OAM", WRAM0,ALIGN[8]
wShadowOAM::
ds NB_SPRITES * 4
; This ensures that the stack is at the very end of WRAM
SECTION "Stack", WRAM0[$E000 - STACK_SIZE]
ds STACK_SIZE
wStackBottom:
| 26.922581 | 76 | 0.622334 |
25d9a7aaa9cf304de4cfe13ed4f28dfa1b07a7c7 | 3,918 | asm | Assembly | constants/pikachu_emotion_constants.asm | adhi-thirumala/EvoYellow | 6fb1b1d6a1fa84b02e2d982f270887f6c63cdf4c | [
"Unlicense"
] | 16 | 2018-08-28T21:47:01.000Z | 2022-02-20T20:29:59.000Z | constants/pikachu_emotion_constants.asm | adhi-thirumala/EvoYellow | 6fb1b1d6a1fa84b02e2d982f270887f6c63cdf4c | [
"Unlicense"
] | 5 | 2019-04-03T19:53:11.000Z | 2022-03-11T22:49:34.000Z | constants/pikachu_emotion_constants.asm | adhi-thirumala/EvoYellow | 6fb1b1d6a1fa84b02e2d982f270887f6c63cdf4c | [
"Unlicense"
] | 2 | 2019-12-09T19:46:02.000Z | 2020-12-05T21:36:30.000Z | dpikapic: macro
db (\1_id - PikaPicAnimPointers) / 2
endm
ldpikapic: macro
ld \1, (\2_id - PikaPicAnimPointers) / 2
endm
dpikaemotion: macro
db (\1_id - PikachuEmotionTable) / 2
endm
ldpikaemotion: macro
ld \1, (\2_id - PikachuEmotionTable) / 2
endm
dpikaanim: macro
db (\1_id - PikaPicAnimBGFramesPointers) / 2
endm
pikaframeend EQUS "db $e0"
pikaframe: macro
db (\1_id - PikaPicTilemapPointers) / 2, \2
endm
pikaframedelay EQUS "db 0,"
; Starter Pikachu emotion commands constants
const_def
const PIKAEMOTION_DUMMY1
const PIKAEMOTION_PRINTTEXT
const PIKAEMOTION_PLAYPCMSOUNDCLIP
const PIKAEMOTION_DOEMOTIONBUBBLE
const PIKAEMOTION_4
const PIKAEMOTION_5
const PIKAEMOTION_SUBCMD
const PIKAEMOTION_DELAYFRAMES
const PIKAEMOTION_DUMMY2
const PIKAEMOTION_9
const PIKAEMOTION_DUMMY3
const_def
const PIKAEMOTION_SUBCMD_LOADEXTRAPIKASPRITES
const PIKAEMOTION_SUBCMD_LOADFONT
const PIKAEMOTION_SUBCMD_SHOWMAPVIEW
const PIKAEMOTION_SUBCMD_WAITBUTTONPRESS
const PIKAEMOTION_SUBCMD_CHECKPEWTERCENTER
const PIKAEMOTION_SUBCMD_CHECKLAVENDERTOWER
const PIKAEMOTION_SUBCMD_CHECKBILLSHOUSE
const_def
const PIKASTEPDIR_DOWN
const PIKASTEPDIR_UP
const PIKASTEPDIR_LEFT
const PIKASTEPDIR_RIGHT
const PIKASTEPDIR_DOWN_LEFT
const PIKASTEPDIR_DOWN_RIGHT
const PIKASTEPDIR_UP_LEFT
const PIKASTEPDIR_UP_RIGHT
; Macros for commands
pikaemotion_dummy1: MACRO
db PIKAEMOTION_DUMMY1
ENDM
pikaemotion_printtext: MACRO
db PIKAEMOTION_PRINTTEXT
dw \1
ENDM
pikaemotion_pcm: MACRO
db PIKAEMOTION_PLAYPCMSOUNDCLIP
IF _NARG > 0
dpikacry \1
ELSE
db $ff
ENDC
ENDM
pikaemotion_emotebubble: MACRO
db PIKAEMOTION_DOEMOTIONBUBBLE
db \1
ENDM
pikaemotion_movement: MACRO
db PIKAEMOTION_4
dw \1
ENDM
pikaemotion_pikapic: MACRO
db PIKAEMOTION_5
dpikapic \1
ENDM
pikaemotion_subcmd: MACRO
db PIKAEMOTION_SUBCMD
db \1
ENDM
pikaemotion_delay: MACRO
db PIKAEMOTION_DELAYFRAMES
db \1
ENDM
pikaemotion_dummy2: MACRO
db PIKAEMOTION_DUMMY2
ENDM
pikaemotion_9: MACRO
db PIKAEMOTION_9
ENDM
pikaemotion_dummy3: MACRO
db PIKAEMOTION_DUMMY3
ENDM
pikacry_def: MACRO
\1_id:: dba \1
endm
dpikacry: MACRO
db (\1_id - PikachuCriesPointerTable) / 3
endm
ldpikacry: MACRO
ld \1, (\2_id - PikachuCriesPointerTable) / 3
ENDM
pikacry: MACRO
ldpikacry a, \1
endm
enum_start
enum pikapic_nop_command
pikapic_nop: macro
db pikapic_nop_command
endm
enum pikapic_writebyte_command
pikapic_writebyte: macro
db pikapic_writebyte_command, \1
endm
enum pikapic_loadgfx_command
pikapic_loadgfx: macro
db pikapic_loadgfx_command, (\1_id - PikaPicAnimGFXHeaders) / 4
endm
enum pikapic_animation_command
pikapic_animation: macro
; frameset pointer, starting vtile, y offset, x offset
db pikapic_animation_command
dpikaanim \1
db 0, \2, \3, \4
endm
enum pikapic_nop4_command
pikapic_nop4: macro
db pikapic_nop4_command
endm
enum pikapic_nop5_command
pikapic_nop5: macro
db pikapic_nop5_command
endm
enum pikapic_waitbgmapeleteobject_command
pikapic_waitbgmapeleteobject: macro
db pikapic_waitbgmapeleteobject_command, \1
endm
enum pikapic_nop7_command
pikapic_nop7: macro
db pikapic_nop7_command
endm
enum pikapic_nop8_command
pikapic_nop8: macro
db pikapic_nop8_command
endm
enum pikapic_jump_command
pikapic_jump: macro ; 9
dbw pikapic_jump_command, \1
endm
enum pikapic_setduration_command
pikapic_setduration: macro ; a
dbw pikapic_setduration_command, \1
endm
enum pikapic_cry_command
pikapic_cry: macro ; b
db pikapic_cry_command
IF _NARG == 0
db $ff
else
dpikacry \1
endc
endm
enum pikapic_thunderbolt_command
pikapic_thunderbolt: macro ; c
db pikapic_thunderbolt_command
endm
enum pikapic_waitbgmap_command
pikapic_waitbgmap: macro ; d
db pikapic_waitbgmap_command
endm
enum pikapic_ret_command
pikapic_ret: macro ; e
db pikapic_ret_command
endm
pikapic_looptofinish: macro
.loop\@
pikapic_waitbgmap
pikapic_jump .loop\@
endm
| 17.413333 | 64 | 0.81853 |
5a632f12baef6d2a8c05e515065f1a7dc1b78ed2 | 12,314 | asm | Assembly | base/new/entrance/warden/unit0/x86_64/unit0lib.asm | frednora/gramado | 90df547127c2402d0a6eb1db04c65c24389e0034 | [
"BSD-2-Clause"
] | 609 | 2017-08-28T01:58:35.000Z | 2022-03-01T12:11:21.000Z | base/new/entrance/warden/unit0/x86_64/unit0lib.asm | elenderg/field | c45fb8a3435b2f13b8b48d96567074fb19f02e31 | [
"BSD-2-Clause"
] | 30 | 2017-09-01T01:40:18.000Z | 2021-08-01T22:28:56.000Z | base/new/entrance/warden/unit0/x86_64/unit0lib.asm | elenderg/field | c45fb8a3435b2f13b8b48d96567074fb19f02e31 | [
"BSD-2-Clause"
] | 65 | 2017-10-05T02:27:29.000Z | 2022-01-03T21:18:15.000Z |
;; See:
;; head_64.asm for the stack.
align 8
tss0:
dd 0 ;reserved
dq _rsp0Stack ;rsp0 #todo
dq 0 ;rsp1
dq 0 ;rsp2
dd 0 ;reserved
dd 0 ;reserved
dq 0 ;ist1
dq 0 ;ist2
dq 0 ;ist3
dq 0 ;ist4
dq 0 ;ist5
dq 0 ;ist6
dq 0 ;ist7
dd 0 ;reserved
dd 0 ;reserved
dw 0 ;reserved
dw 0 ;IOPB offset
tss0_end:
align 8
tss1:
dd 0 ;reserved
dq _rsp0Stack ;rsp0 #todo
dq 0 ;rsp1
dq 0 ;rsp2
dd 0 ;reserved
dd 0 ;reserved
dq 0 ;ist1
dq 0 ;ist2
dq 0 ;ist3
dq 0 ;ist4
dq 0 ;ist5
dq 0 ;ist6
dq 0 ;ist7
dd 0 ;reserved
dd 0 ;reserved
dw 0 ;reserved
dw 0 ;IOPB offset
tss1_end:
;;#delete
;headlib_something:
; ret
;; ==================================
;; Limpar a flag nt em rflags
;; e dar refresh na pipeline. #todo
;; Isso evita taskswitching via hardware quando em 32bit.
global _x64_clear_nt_flag
_x64_clear_nt_flag:
; Salvando o que vamos usar.
push rax
push rbx
; pegando as flags.
pushfq
pop rax
mov rbx, 0x0000000000004000
not rbx
and rax, rbx
push rax
popfq
pop rbx
pop rax
ret
global _gdt_flush
_gdt_flush:
mov rax, rdi
lgdt [rax]
mov rax, 0x10
mov ds, ax
mov es, ax
mov fs, ax
mov gs, ax
mov ss, ax
ret
;=================================================
; setup_idt:
; Configura a IDT.
; Dado o endereço da IDT,
; preenche todos os vetores,
; apontando para um só endereço. 'unhandled_int'.
; See: sw.asm
;++
;; called by xxxhead.asm
setup_idt:
; See: sw.asm
;pushad
push rax
push rcx
push rdx
; #todo: x86_64: 64bit address
mov rdx, qword unhandled_int
; low 16
mov rax, rdx
mov word [d_offset_15_0], ax
; high 16
mov rax, rdx
shr rax, 16
mov word [d_offset_31_16], ax
; high 32
mov rax, rdx
shr rax, 32
mov dword [d_offset_63_32], eax
;; Isso forma os primeiros 32bit da entrada.
;; (offset low and selector)
;mov eax, dword 0x00080000 ; Step1: selector = 0x0008 = cs na parte alta.
;mov ax, dx ; Step2: uma parte do endereço na parte baixa (16 bits)
;mov ax, word [d_offset_15_0] ; Step2: uma parte do endereço na parte baixa (16 bits)
;; #test
;; Se a intenção é nos proteger
;; das interrupções de hardware inesperadas, então devemos
;; configurar a idt semelhante ao jeto que configuramos
;; para as irqs ... já que as interrupções de software
;; só ocorrerão depois de inicializadas as entradas para
;; system call.
;; #importante: Porém não usaremos eoi ... e apontaremos
;; tudo para unhandled_int e não para umhandled_irq.
;; Ou seja, sem eoi.
;interrupt gate - dpl=0, present
;mov dx, word 0x8E00
;; Use this one.
;; obs: 0xEE00 tem funcionado bem para todos os casos.
;mov dx, word 0xEE00
;; The pointer. 64bit address
mov rdi, qword _idt
;; The counter.
mov rcx, qword 256
; loop
rp_sidt:
;; #bugbug
;; Nao sei se essa operação eh possivel,
;; mas queremos mover de double em double
;==========================
; Primeiros 32 bits.
; (offset low and selector)
xor rax, rax
mov eax, dword 0x00080000 ; Step1: selector = 0x0008 = cs na parte alta.
mov ax, word [d_offset_15_0] ; Step2: uma parte do endereço na parte baixa (16 bits)
mov dword [rdi+0], eax
;=========================================
; segundos 32 bit.
xor rax, rax
mov ax, word [d_offset_31_16]
shl rax, 16
mov ax, word 0xEE00
mov dword [rdi+4], eax
;=========================================
; terceiros 32 bit.
xor rax, rax
mov eax, dword [d_offset_63_32]
mov dword [rdi+8], eax
;=========================================
; quartos 32 bit.
xor rax, rax
mov dword [rdi+12], eax
;; done: go to next
add rdi, qword 16 ;; vai pra proxima entrada.
dec rcx ;; decrementa o contador.
jne rp_sidt ;; circula
; #bugbug
; No. We will do this later.
; lidt [IDT_register]
pop rdx
pop rcx
pop rax
;popad
ret
;Offset address used in the function above.
d_offset_15_0: dw 0
d_offset_31_16: dw 0
d_offset_63_32: dd 0
;;--
;;====================================
;;==================================================================
; _setup_system_interrupt:
;
; Configura um vetor da IDT para a interrupção do sistema.
; O endereço do ISR e o número do vetor são passados via argumento.
;
; IN:
; rax = endereço. (callback)(endereço do handler)
; rbx = número do vetor (0x80).(número da interrupção.)
;
global _setup_system_interrupt
_setup_system_interrupt:
push rax
push rbx
push rcx
push rdx
; Endereço e índice na tabela.
mov qword [d__address], rax ;endereço. 64bit
mov qword [d__number], rbx ;número do vetor.
; Calcula o deslocamaneto
xor rax, rax
mov rax, qword 16
mov rbx, qword [d__number]
mul rbx
; O resuldado está em rax.
; Adiciona o deslocamento à base rdi.
; A base é o início da idt.
mov rdi, qword _idt
add rdi, rax ; lembra? O resultado estava em rax.
; Agora rdi contém o endereço de memória
; dentro da idt, onde desejamos contruir a entrada.
;
; Lidando com o endereço.
;
; Salva o endereço de 64bi em rdx.
mov rdx, qword [d__address]
; low 16
mov rax, rdx
mov word [address_offset_15_0], ax
; high 16
mov rax, rdx
shr rax, 16
mov word [address_offset_31_16], ax
; high 32
mov rax, rdx
shr rax, 32
mov dword [address_offset_63_32], eax
;------------------
; Lembre-se:
; rdi contém o endereço de memória
; dentro da idt, onde desejamos contruir a entrada.
;; #bugbug
;; Nao sei se essa operação eh possivel,
;; mas queremos mover de double em double
;==========================
; Primeiros 32 bits.
; (offset low and selector)
xor rax, rax
mov eax, dword 0x00080000 ; Step1: selector = 0x0008 = cs na parte alta.
mov ax, word [address_offset_15_0] ; Step2: uma parte do endereço na parte baixa (16 bits)
mov dword [rdi+0], eax
;=========================================
; segundos 32 bit.
xor rax, rax
mov ax, word [address_offset_31_16]
shl rax, 16
mov ax, word 0xEE00
mov dword [rdi+4], eax
;=========================================
; terceiros 32 bit.
xor rax, rax
mov eax, dword [address_offset_63_32]
mov dword [rdi+8], eax
;=========================================
; quartos 32 bit.
xor rax, rax
mov dword [rdi+12], eax
;-----------------
; Do not load.
;recarrega a nova idt
;lidt [IDT_register]
pop rdx
pop rcx
pop rbx
pop rax
ret
d__address: dq 0
d__number: dq 0
;Offset address used in the function above.
address_offset_15_0: dw 0
address_offset_31_16: dw 0
address_offset_63_32: dd 0
;;--
;=============================================
; setup_faults:
; Configura vetores da idt para faults.
;
setup_faults:
push rax
push rbx
;#0
mov rax, qword _fault_N0
mov rbx, qword 0
call _setup_system_interrupt
;#1
mov rax, qword _fault_N1
mov rbx, qword 1
call _setup_system_interrupt
;#2
mov rax, qword _fault_N2
mov rbx, qword 2
call _setup_system_interrupt
;#3 debug
mov rax, qword _fault_N3
mov rbx, qword 3
call _setup_system_interrupt
;#4
mov rax, qword _fault_N4
mov rbx, qword 4
call _setup_system_interrupt
;#5
mov rax, qword _fault_N5
mov rbx, qword 5
call _setup_system_interrupt
;#6 - Instrução inválida.
mov rax, qword _fault_INTRUCAO_INVALIDA
mov rbx, qword 6
call _setup_system_interrupt
;#7
mov rax, qword _fault_N7
mov rbx, qword 7
call _setup_system_interrupt
;#8 - double fault
mov rax, qword _fault_DOUBLE
mov rbx, qword 8
call _setup_system_interrupt
;#9
mov rax, qword _fault_N9
mov rbx, qword 9
call _setup_system_interrupt
;#10
mov rax, qword _fault_N10
mov rbx, qword 10
call _setup_system_interrupt
;#11
mov rax, qword _fault_N11
mov rbx, qword 11
call _setup_system_interrupt
;#12 - stack
mov rax, qword _fault_STACK
mov rbx, qword 12
call _setup_system_interrupt
;#13 - general protection
mov rax, qword _fault_GP
mov rbx, qword 13
call _setup_system_interrupt
;#14
mov rax, qword _fault_N14
mov rbx, qword 14
call _setup_system_interrupt
;#15
mov rax, qword _fault_N15
mov rbx, qword 15
call _setup_system_interrupt
;#16
mov rax, qword _fault_N16
mov rbx, qword 16
call _setup_system_interrupt
;#17
mov rax, qword _fault_N17
mov rbx, qword 17
call _setup_system_interrupt
;#18
mov rax, qword _fault_N18
mov rbx, qword 18
call _setup_system_interrupt
;#19
mov rax, qword _fault_N19
mov rbx, qword 19
call _setup_system_interrupt
;#20
mov rax, qword _fault_N20
mov rbx, qword 20
call _setup_system_interrupt
;#21
mov rax, qword _fault_N21
mov rbx, qword 21
call _setup_system_interrupt
;#22
mov rax, qword _fault_N22
mov rbx, qword 22
call _setup_system_interrupt
;#23
mov rax, qword _fault_N23
mov rbx, qword 23
call _setup_system_interrupt
;#24
mov rax, qword _fault_N24
mov rbx, qword 24
call _setup_system_interrupt
;#25
mov rax, qword _fault_N25
mov rbx, qword 25
call _setup_system_interrupt
;#26
mov rax, qword _fault_N26
mov rbx, qword 26
call _setup_system_interrupt
;#27
mov rax, qword _fault_N27
mov rbx, qword 27
call _setup_system_interrupt
;#28
mov rax, qword _fault_N28
mov rbx, qword 28
call _setup_system_interrupt
;#29
mov rax, qword _fault_N29
mov rbx, qword 29
call _setup_system_interrupt
;#30
mov rax, qword _fault_N30
mov rbx, qword 30
call _setup_system_interrupt
;#31
mov rax, qword _fault_N31
mov rbx, qword 31
call _setup_system_interrupt
pop rbx
pop rax
ret
;=====================================
; setup_vectors:
;
; Setup some IDT vectors.
;
setup_vectors:
push rax
push rbx
; 32 - Timer.
; Iniciamos um timer provisório,
;depois iniciaremos o definitivo.
;See: _turn_task_switch_on in unit3hw.asm.
mov rax, qword unhandled_irq
;mov rax, qword _irq0
mov rbx, qword 32
call _setup_system_interrupt
; 33 - PS2 Keyboard.
; See: unit1hw.asm
mov rax, qword _irq1
mov rbx, qword 33
call _setup_system_interrupt
; 40 - Clock, rtc.
mov rax, qword unhandled_irq ; _irq8
mov rbx, qword 40
call _setup_system_interrupt
; 44 - PS2 Mouse.
; See: unit1hw.asm
mov rax, qword _irq12
mov rbx, qword 44
call _setup_system_interrupt
; 46 - ide
mov rax, qword unhandled_irq ; _irq14
mov rbx, qword 46
call _setup_system_interrupt
; 47 - ide
mov rax, qword unhandled_irq ; _irq15
mov rbx, qword 47
call _setup_system_interrupt
;
; == System calls ===========================
;
; System interrupts
; 128 - 0x80
; 129 - 0x81
; 130 - 0x82
; ...
; 0x80
mov rax, qword _int128
mov rbx, qword 128
call _setup_system_interrupt
; 0x81
mov rax, qword _int129
mov rbx, qword 129
call _setup_system_interrupt
; 0x82
mov rax, qword _int130
mov rbx, qword 130
call _setup_system_interrupt
;; ...
;; =====================
;; #test
;; Uma interrupção para habilitar as interrupções mascaráveis.
;; quem usará isso será a thread primária do processo init.
;; apenas uma vez.
;; See: sw.asm
mov rax, qword _int199
mov rbx, qword 199
call _setup_system_interrupt
;; ...
pop rbx
pop rax
ret
| 19.240625 | 95 | 0.587624 |
7c33c678808b8334d19da7318d1de18d46e96c16 | 288 | asm | Assembly | programs/oeis/120/A120324.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/120/A120324.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | programs/oeis/120/A120324.asm | karttu/loda | 9c3b0fc57b810302220c044a9d17db733c76a598 | [
"Apache-2.0"
] | null | null | null | ; A120324: Periodic sequence 0, 1, 0, 4, 0, 1.
; 0,1,0,4,0,1,0,1,0,4,0,1,0,1,0,4,0,1,0,1,0,4,0,1,0,1,0,4,0,1,0,1,0,4,0,1,0,1,0,4,0,1,0,1,0,4,0,1,0,1,0,4,0,1,0,1,0,4,0,1,0,1,0,4,0,1,0,1,0,4,0,1,0,1,0,4,0,1,0,1,0,4,0,1,0,1,0,4,0,1,0
gcd $0,6
add $0,7
mov $1,$0
gcd $1,20
sub $1,2
div $1,2
| 28.8 | 183 | 0.524306 |
1c913e55c32bdba8301980738b8c84196566b594 | 81 | asm | Assembly | P4/bltzal_test.asm | OliverDu8-24/BUAA-CO-2021 | 9959abd90de9039d751bab64f153547e76066665 | [
"MIT"
] | 1 | 2022-03-21T15:07:09.000Z | 2022-03-21T15:07:09.000Z | P4/bltzal_test.asm | OliverDu8-24/BUAA-CO-2021 | 9959abd90de9039d751bab64f153547e76066665 | [
"MIT"
] | null | null | null | P4/bltzal_test.asm | OliverDu8-24/BUAA-CO-2021 | 9959abd90de9039d751bab64f153547e76066665 | [
"MIT"
] | null | null | null | ori $2, $0, 1
addu $1, $0, $2
bltzal $1, fuck
ori $3, $0, 11
fuck:
ori $2, $0, 12 | 13.5 | 15 | 0.518519 |
b1b53d4f480db6a6ca4ac1a9b946dd9cad981719 | 3,609 | asm | Assembly | kernel/asm.asm | Littledarren/os_exp | 5dda8050cb97c0ec940a3bdb88465d24249f490a | [
"MIT"
] | null | null | null | kernel/asm.asm | Littledarren/os_exp | 5dda8050cb97c0ec940a3bdb88465d24249f490a | [
"MIT"
] | null | null | null | kernel/asm.asm | Littledarren/os_exp | 5dda8050cb97c0ec940a3bdb88465d24249f490a | [
"MIT"
] | null | null | null | [global TEMP_EAX]
[global TEMP_EBX]
[global TEMP_ECX]
[global TEMP_EDX]
[global TEMP_ESI]
[global TEMP_EBP]
[global TEMP_EDI]
[global TEMP_ESP]
[global TEMP_SS]
[global TEMP_DS]
[global TEMP_ES]
[global TEMP_FS]
[global TEMP_GS]
[global TEMP_CS]
[global TEMP_EIP]
[global TEMP_EFLAGS]
TEMP_EAX: dd 0
TEMP_EBX: dd 0
TEMP_ECX: dd 0
TEMP_EDX: dd 0
TEMP_ESI: dd 0
TEMP_EBP: dd 0
TEMP_EDI: dd 0
TEMP_ESP: dd 0
TEMP_SS: dd 0
TEMP_DS: dd 0
TEMP_ES: dd 0
TEMP_FS: dd 0
TEMP_GS: dd 0
TEMP_CS: dd 0
TEMP_EIP: dd 0
TEMP_EFLAGS: dd 0
;用于系统调用
[global SYS_FUNC]
[global SYS_CODE]
SYS_FUNC: dd 0
SYS_CODE: dd 0
[extern handler]
;保存中断号
%macro m_irq 1
[global _irq__%1]
_irq__%1:
;push eflags
;push cs
;push eip <---esp
push esp
push eax
push ebx
push ecx
push edx
push ebp
push edi
push esi
push ss
push es
push ds
push fs
push gs
;进入内核全局区。
mov ax, 0x10
mov ds, ax
;保存有关信息
pop dword [TEMP_GS]
pop dword [TEMP_FS]
pop dword [TEMP_DS]
pop dword [TEMP_ES]
pop dword [TEMP_SS]
pop dword [TEMP_ESI]
pop dword [TEMP_EDI]
pop dword [TEMP_EBP]
pop dword [TEMP_EDX]
pop dword [TEMP_ECX]
pop dword [TEMP_EBX]
pop dword [TEMP_EAX]
pop dword [TEMP_ESP]
pop dword [TEMP_EIP]
pop dword [TEMP_CS]
pop dword [TEMP_EFLAGS]
;not smart
mov eax, 16
cmp eax, %1
jne NOT_SYS_CALL%1
pop dword [SYS_FUNC]
mov eax, [SYS_FUNC]
cmp eax, 5
jne NOT_EXIT_PARA%1
pop dword [SYS_CODE]
NOT_EXIT_PARA%1:
NOT_SYS_CALL%1:
;进入到内核栈
;最后保存栈，确保传入的参数都被弹出。
mov [TEMP_ESP], esp
mov ax, 0x10
mov ss, ax
mov sp, 0x7e00
push dword %1+32
call handler
pop eax
;到用户栈
push dword [TEMP_SS]
pop ss
mov esp, [TEMP_ESP]
push dword [TEMP_ES]
pop es
push dword [TEMP_FS]
pop fs
push dword [TEMP_GS]
pop gs
;这里绝对不能改ds
mov eax, [TEMP_EAX]
mov ebx, [TEMP_EBX]
mov ecx, [TEMP_ECX]
mov edx, [TEMP_EDX]
mov esi, [TEMP_ESI]
mov edi, [TEMP_EDI]
mov ebp, [TEMP_EBP]
push dword [TEMP_EFLAGS]
push dword [TEMP_CS]
push dword [TEMP_EIP]
push dword [TEMP_DS]
pop ds
iret
%endmacro
;通过系统全局变量来传递参数。同时通过修改这些全局变量可以实现上下文的切换
;0x20 ~0x2f
%assign i 0
%rep 16
m_irq i
%assign i i+1
%endrep
;0x30 ~ 0x30 + 10
%assign i 16
%rep 10
m_irq i
%assign i i+1
%endrep
;0 --> exit without telling
;3 --> fork
;4 --> wait
;5 --> exit with code
;int fork()
[global fork]
fork:
push dword 3
int 0x30
ret
;void exit()
[global exit]
exit:
push dword 0
int 0x30
jmp $
ret
;int Wait()
[global _wait]
_wait:
push dword 4
int 0x30
ret
;void exit(char ch)
[global exit_para]
exit_para:
push ebp
mov ebp, esp
xor eax, eax
mov eax, [ebp + 8]
push eax
push dword 5
int 0x30
leave
ret
; 无特权级切换
; EFLAGS
; CS
; EIP
; ErrorCode -->不存在
; 有特权切换
; SS
; ESP
; EFLAGS
; CS
; EIP
; ErrorCode
;pusha-->
; Push(EAX);
; Push(ECX);
; Push(EDX);
; Push(EBX);
; Push(ESP);这个SP是没有压栈之前的。
; Push(EBP);
; Push(ESI);
; Push(EDI); | 14.552419 | 38 | 0.539208 |
6c0d94a512bd2609d23a5f04ba79073340989cc7 | 127 | asm | Assembly | DeliriOS_64bits/fft/sin.asm | Izikiel/intel_multicore | 10ab11fa901f555608a75f9256ea7d14f8aab84d | [
"MIT"
] | 3 | 2015-12-16T06:17:14.000Z | 2019-09-01T08:21:21.000Z | DeliriOS_64bits/fft/sin.asm | Izikiel/intel_multicore | 10ab11fa901f555608a75f9256ea7d14f8aab84d | [
"MIT"
] | null | null | null | DeliriOS_64bits/fft/sin.asm | Izikiel/intel_multicore | 10ab11fa901f555608a75f9256ea7d14f8aab84d | [
"MIT"
] | null | null | null | global sin
local: dq 0x0
sin:
finit
movq [local], xmm0
fld qword [local]
fsin
fst qword [local]
movq xmm0, [local]
ret | 10.583333 | 19 | 0.677165 |
5af0fef3bf5373e14d794c2a4419eb1eb253e5a1 | 686 | asm | Assembly | audio/sfx/cry11_1.asm | AmateurPanda92/pokemon-rby-dx | f7ba1cc50b22d93ed176571e074a52d73360da93 | [
"MIT"
] | 9 | 2020-07-12T19:44:21.000Z | 2022-03-03T23:32:40.000Z | audio/sfx/cry11_1.asm | JStar-debug2020/pokemon-rby-dx | c2fdd8145d96683addbd8d9075f946a68d1527a1 | [
"MIT"
] | 7 | 2020-07-16T10:48:52.000Z | 2021-01-28T18:32:02.000Z | audio/sfx/cry11_1.asm | JStar-debug2020/pokemon-rby-dx | c2fdd8145d96683addbd8d9075f946a68d1527a1 | [
"MIT"
] | 2 | 2021-03-28T18:33:43.000Z | 2021-05-06T13:12:09.000Z | SFX_Cry11_1_Ch4:
dutycycle 240
squarenote 6, 15, 7, 1952
squarenote 8, 14, 6, 1956
squarenote 4, 13, 6, 1952
squarenote 15, 13, 3, 1824
squarenote 8, 12, 3, 1827
squarenote 2, 12, 2, 1832
squarenote 8, 11, 1, 1840
endchannel
SFX_Cry11_1_Ch5:
dutycycle 10
squarenote 4, 0, 8, 0
squarenote 6, 10, 7, 1857
squarenote 8, 8, 6, 1859
squarenote 4, 7, 6, 1857
squarenote 13, 8, 3, 1730
squarenote 7, 7, 3, 1729
squarenote 3, 8, 2, 1740
squarenote 8, 7, 1, 1752
endchannel
SFX_Cry11_1_Ch7:
noisenote 2, 15, 2, 76
noisenote 6, 14, 6, 58
noisenote 4, 13, 7, 58
noisenote 6, 13, 6, 44
noisenote 8, 14, 5, 60
noisenote 12, 13, 2, 61
noisenote 8, 13, 1, 44
endchannel
| 19.6 | 27 | 0.6793 |
c0127ff15f3260dcbd7927999420048092876c35 | 36 | asm | Assembly | test/inc-test.asm | kspalaiologos/asmbf | c98a51d61724a46855de291a27d68a49a034810b | [
"MIT"
] | 67 | 2020-08-03T06:26:35.000Z | 2022-03-24T19:50:51.000Z | test/inc-test.asm | pyautogui/asmbf | 37c54a8a62df2fc4bab28bdeb43237b4905cbecd | [
"MIT"
] | 55 | 2019-10-02T19:37:08.000Z | 2020-06-12T19:40:53.000Z | test/inc-test.asm | pyautogui/asmbf | 37c54a8a62df2fc4bab28bdeb43237b4905cbecd | [
"MIT"
] | 9 | 2019-05-18T11:59:41.000Z | 2020-06-21T20:40:25.000Z |
#include("test/inc-test.S")
out .1
| 9 | 27 | 0.638889 |
ff5bd7b94c01842a8756ca3cd27f59745615c90a | 383 | asm | Assembly | data/mapHeaders/pewtercity.asm | adhi-thirumala/EvoYellow | 6fb1b1d6a1fa84b02e2d982f270887f6c63cdf4c | [
"Unlicense"
] | 16 | 2018-08-28T21:47:01.000Z | 2022-02-20T20:29:59.000Z | data/mapHeaders/pewtercity.asm | adhi-thirumala/EvoYellow | 6fb1b1d6a1fa84b02e2d982f270887f6c63cdf4c | [
"Unlicense"
] | 5 | 2019-04-03T19:53:11.000Z | 2022-03-11T22:49:34.000Z | data/mapHeaders/pewtercity.asm | adhi-thirumala/EvoYellow | 6fb1b1d6a1fa84b02e2d982f270887f6c63cdf4c | [
"Unlicense"
] | 2 | 2019-12-09T19:46:02.000Z | 2020-12-05T21:36:30.000Z | PewterCity_h:
db OVERWORLD ; tileset
db PEWTER_CITY_HEIGHT, PEWTER_CITY_WIDTH ; dimensions (y, x)
dw PewterCityBlocks, PewterCityTextPointers, PewterCityScript ; blocks, texts, scripts
db SOUTH | EAST ; connections
SOUTH_MAP_CONNECTION PEWTER_CITY, ROUTE_2, 5, 0, Route2Blocks
EAST_MAP_CONNECTION PEWTER_CITY, ROUTE_3, 4, 0, Route3Blocks
dw PewterCityObject ; objects
db $0
| 34.818182 | 87 | 0.798956 |
9dcdde548c0d4dc9367d42f4ec28bc05f7a3b539 | 356 | asm | Assembly | calculator.asm | jamiemansfield/lmcemu | 9fd96d652e663bcd817050844d9dfcdc0c62d0eb | [
"BSD-3-Clause"
] | null | null | null | calculator.asm | jamiemansfield/lmcemu | 9fd96d652e663bcd817050844d9dfcdc0c62d0eb | [
"BSD-3-Clause"
] | null | null | null | calculator.asm | jamiemansfield/lmcemu | 9fd96d652e663bcd817050844d9dfcdc0c62d0eb | [
"BSD-3-Clause"
] | null | null | null | START INP
STA MODE
INP
STA VALUE_O
INP
STA VALUE_T
LDA MODE
BRZ ADDITION
BRA SUBTRACT
ADDITION LDA VALUE_O
ADD VALUE_T
BRA END
SUBTRACT LDA VALUE_O
SUB VALUE_T
BRA END
END OUT
HLT
MODE DAT 1
VALUE_O DAT 1
VALUE_T DAT 2
| 13.185185 | 21 | 0.497191 |
1e460f5270d489ad76c02b51df94766f2867f246 | 5,714 | asm | Assembly | Transynther/x86/_processed/AVXALIGN/_st_sm_/i9-9900K_12_0xa0_notsx.log_21829_1117.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/AVXALIGN/_st_sm_/i9-9900K_12_0xa0_notsx.log_21829_1117.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/AVXALIGN/_st_sm_/i9-9900K_12_0xa0_notsx.log_21829_1117.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r12
push %r15
push %rax
push %rbp
push %rcx
push %rdi
push %rsi
lea addresses_WT_ht+0x65b6, %r15
nop
nop
nop
nop
nop
add %r12, %r12
mov $0x6162636465666768, %rax
movq %rax, %xmm3
movups %xmm3, (%r15)
nop
nop
nop
nop
nop
cmp %r11, %r11
lea addresses_UC_ht+0x120fa, %rsi
nop
nop
nop
nop
nop
and %rbp, %rbp
movw $0x6162, (%rsi)
nop
nop
nop
nop
nop
cmp $63086, %r15
lea addresses_UC_ht+0x19fbe, %rcx
nop
nop
lfence
vmovups (%rcx), %ymm4
vextracti128 $1, %ymm4, %xmm4
vpextrq $1, %xmm4, %rax
nop
xor $44439, %r11
lea addresses_UC_ht+0x8b14, %rsi
lea addresses_WT_ht+0xa24e, %rdi
nop
nop
nop
nop
nop
and $3102, %r15
mov $9, %rcx
rep movsw
nop
nop
nop
nop
cmp %rcx, %rcx
lea addresses_A_ht+0x14b06, %rbp
nop
nop
nop
cmp %rsi, %rsi
movups (%rbp), %xmm7
vpextrq $1, %xmm7, %rax
nop
nop
add $13925, %r12
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %rax
pop %r15
pop %r12
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r13
push %r14
push %r8
push %rbx
push %rcx
push %rdi
// Store
lea addresses_WT+0x11bbe, %rbx
nop
nop
and $7222, %r14
movl $0x51525354, (%rbx)
nop
nop
nop
nop
nop
dec %r14
// Store
lea addresses_WT+0x1363e, %rdi
nop
nop
xor %r10, %r10
movl $0x51525354, (%rdi)
nop
nop
nop
nop
cmp %r13, %r13
// Faulty Load
lea addresses_WT+0x11bbe, %r8
nop
nop
dec %rcx
mov (%r8), %rdi
lea oracles, %r14
and $0xff, %rdi
shlq $12, %rdi
mov (%r14,%rdi,1), %rdi
pop %rdi
pop %rcx
pop %rbx
pop %r8
pop %r14
pop %r13
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_WT', 'AVXalign': False, 'size': 2, 'NT': False, 'same': False, 'congruent': 0}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'type': 'addresses_WT', 'AVXalign': False, 'size': 4, 'NT': False, 'same': True, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WT', 'AVXalign': False, 'size': 4, 'NT': False, 'same': False, 'congruent': 6}}
[Faulty Load]
{'src': {'type': 'addresses_WT', 'AVXalign': True, 'size': 8, 'NT': False, 'same': True, 'congruent': 0}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'type': 'addresses_WT_ht', 'AVXalign': False, 'size': 16, 'NT': False, 'same': False, 'congruent': 3}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC_ht', 'AVXalign': False, 'size': 2, 'NT': False, 'same': False, 'congruent': 2}}
{'src': {'type': 'addresses_UC_ht', 'AVXalign': False, 'size': 32, 'NT': False, 'same': False, 'congruent': 8}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_UC_ht', 'congruent': 0, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_WT_ht', 'congruent': 3, 'same': False}}
{'src': {'type': 'addresses_A_ht', 'AVXalign': False, 'size': 16, 'NT': False, 'same': True, 'congruent': 1}, 'OP': 'LOAD'}
{'54': 21829}
54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54 54
*/
| 36.628205 | 2,999 | 0.658558 |
72c039ff424147405c54c949d54e16e3f0d73480 | 5,694 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_/i7-8650U_0xd2.log_61_1455.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_/i7-8650U_0xd2.log_61_1455.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_/i7-8650U_0xd2.log_61_1455.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r12
push %r13
push %r15
push %rax
push %rbp
push %rcx
push %rdi
push %rsi
lea addresses_WT_ht+0x1ee08, %rbp
nop
nop
add %r15, %r15
movw $0x6162, (%rbp)
sub %r12, %r12
lea addresses_normal_ht+0x11a2, %rsi
lea addresses_UC_ht+0x1b1d0, %rdi
nop
nop
nop
nop
nop
cmp %rax, %rax
mov $13, %rcx
rep movsb
nop
and $30625, %r15
lea addresses_WC_ht+0x1d888, %rsi
lea addresses_WT_ht+0x53e8, %rdi
nop
nop
nop
nop
nop
xor $7871, %r13
mov $100, %rcx
rep movsq
nop
nop
add $57383, %rdi
lea addresses_UC_ht+0x3c68, %r12
nop
nop
xor %rax, %rax
mov (%r12), %rcx
nop
nop
nop
nop
sub %r13, %r13
lea addresses_UC_ht+0x137f2, %rsi
nop
nop
nop
sub $3881, %rdi
movb (%rsi), %cl
add $30478, %rcx
lea addresses_A_ht+0x5a60, %rsi
lea addresses_A_ht+0x898c, %rdi
and $59000, %r13
mov $116, %rcx
rep movsw
nop
nop
nop
dec %rcx
lea addresses_normal_ht+0x2a61, %rsi
lea addresses_WT_ht+0xc508, %rdi
nop
nop
nop
nop
xor $33258, %rax
mov $28, %rcx
rep movsl
nop
xor $48582, %r12
lea addresses_WC_ht+0x10670, %r12
nop
nop
nop
and $11756, %r13
mov (%r12), %edi
nop
nop
cmp $34344, %r13
lea addresses_A_ht+0x1e388, %rsi
lea addresses_D_ht+0x1da88, %rdi
nop
cmp $53136, %r12
mov $13, %rcx
rep movsq
nop
cmp $8446, %r15
lea addresses_WT_ht+0x15588, %r15
nop
nop
sub %rdi, %rdi
movb $0x61, (%r15)
and $21025, %rcx
lea addresses_UC_ht+0xbbb2, %rdi
clflush (%rdi)
nop
nop
nop
cmp %rsi, %rsi
movw $0x6162, (%rdi)
sub %r12, %r12
lea addresses_WT_ht+0xaaa8, %rsi
lea addresses_D_ht+0xbb1f, %rdi
nop
nop
cmp $21877, %r13
mov $13, %rcx
rep movsl
nop
nop
nop
nop
sub $20148, %r12
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %rax
pop %r15
pop %r13
pop %r12
ret
.global s_faulty_load
s_faulty_load:
push %r12
push %r13
push %r8
push %rbp
push %rbx
push %rcx
push %rdx
// Store
lea addresses_RW+0x19a88, %r13
nop
nop
add $57385, %rcx
mov $0x5152535455565758, %rdx
movq %rdx, %xmm2
vmovups %ymm2, (%r13)
nop
nop
nop
nop
inc %r8
// Store
mov $0xba8, %r12
nop
nop
nop
nop
nop
cmp $47710, %rbp
mov $0x5152535455565758, %rcx
movq %rcx, (%r12)
nop
nop
nop
nop
add $45425, %rbx
// Store
lea addresses_UC+0x18f98, %rbx
clflush (%rbx)
sub $26500, %r13
mov $0x5152535455565758, %r8
movq %r8, %xmm1
vmovaps %ymm1, (%rbx)
nop
nop
nop
sub $59666, %rcx
// Store
lea addresses_WT+0x160d2, %r13
nop
nop
sub %r8, %r8
movb $0x51, (%r13)
nop
sub %rcx, %rcx
// Load
lea addresses_WT+0xba88, %rbx
nop
nop
nop
nop
sub $57985, %r12
mov (%rbx), %bp
nop
nop
nop
nop
add $26696, %rdx
// Store
lea addresses_UC+0x11708, %rbx
nop
nop
nop
nop
nop
cmp $29470, %rbp
movl $0x51525354, (%rbx)
nop
nop
cmp %r12, %r12
// Faulty Load
lea addresses_RW+0xf188, %rbp
nop
nop
cmp %r12, %r12
mov (%rbp), %rdx
lea oracles, %r12
and $0xff, %rdx
shlq $12, %rdx
mov (%r12,%rdx,1), %rdx
pop %rdx
pop %rcx
pop %rbx
pop %rbp
pop %r8
pop %r13
pop %r12
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_RW', 'size': 1, 'AVXalign': False, 'NT': True, 'congruent': 0, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_RW', 'size': 32, 'AVXalign': False, 'NT': False, 'congruent': 8, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_P', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 5, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC', 'size': 32, 'AVXalign': True, 'NT': False, 'congruent': 2, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WT', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 1, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WT', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 8, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC', 'size': 4, 'AVXalign': False, 'NT': True, 'congruent': 3, 'same': False}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_RW', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'type': 'addresses_WT_ht', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 7, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_normal_ht', 'congruent': 0, 'same': False}, 'dst': {'type': 'addresses_UC_ht', 'congruent': 3, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_WC_ht', 'congruent': 8, 'same': False}, 'dst': {'type': 'addresses_WT_ht', 'congruent': 4, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_UC_ht', 'size': 8, 'AVXalign': True, 'NT': False, 'congruent': 5, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_UC_ht', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_A_ht', 'congruent': 3, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 2, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_normal_ht', 'congruent': 0, 'same': False}, 'dst': {'type': 'addresses_WT_ht', 'congruent': 7, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WC_ht', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 3, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_A_ht', 'congruent': 3, 'same': False}, 'dst': {'type': 'addresses_D_ht', 'congruent': 8, 'same': True}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WT_ht', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 9, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_UC_ht', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 1, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_WT_ht', 'congruent': 5, 'same': False}, 'dst': {'type': 'addresses_D_ht', 'congruent': 0, 'same': False}}
{'32': 61}
32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32
*/
| 21.325843 | 182 | 0.64647 |
14ad1993b413c946bddbd3d1a7e9f0711d3ed653 | 412 | asm | Assembly | cod.asm | igorlamoia/montador-assembly-hex | e5185b7d4d9cbee5b25d82dc43e3b2ebd677a841 | [
"MIT"
] | null | null | null | cod.asm | igorlamoia/montador-assembly-hex | e5185b7d4d9cbee5b25d82dc43e3b2ebd677a841 | [
"MIT"
] | 1 | 2022-01-24T00:09:20.000Z | 2022-01-24T00:09:20.000Z | arquivosTxtCodigo/cod.asm | igorlamoia/simulador-mips | 292e8e5a3eff2b1ce3074be84ddf0ae4541006fd | [
"MIT"
] | null | null | null | ori $s0, $s0, 0x7
or $s1, $zero, $s0
addi $s0, $s0, 0x5
add $s2, $s0, $s1
sub $s3, $s0, $s1
xori $s4, $s3, 0xA3
xor $s5, $s3, $s2
and $s6, $s4, $s5
andi $s1, $s2, 0xF55F
srl $s4, $s4, 0x1
ori $s7, $zero, 0x1001
sll $s7, $s7, 0x10
sw $s0, 0($s7)
lw $t2, 0($s7)
jump: slt $t0, $s4, $s6
bne $t0, $zero, jump1
addi $s6, $s6, 0x1
jump1: slti $t1, $s3, 0xAA
beq $t1, $zero, jump2
sll $s3, $s3, 0x4
j jump
jump2:
| 15.846154 | 26 | 0.563107 |
5e8b8a276d212ba3b06e7228395cb28364aae77f | 4,877 | asm | Assembly | Transynther/x86/_processed/AVXALIGN/_st_zr_un_sm_/i7-7700_9_0x48_notsx.log_21829_897.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/AVXALIGN/_st_zr_un_sm_/i7-7700_9_0x48_notsx.log_21829_897.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/AVXALIGN/_st_zr_un_sm_/i7-7700_9_0x48_notsx.log_21829_897.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r14
push %r15
push %rcx
push %rdi
push %rsi
lea addresses_WT_ht+0x2785, %rsi
lea addresses_WC_ht+0x1b305, %rdi
nop
nop
cmp %r14, %r14
mov $30, %rcx
rep movsq
nop
nop
cmp $36126, %r15
pop %rsi
pop %rdi
pop %rcx
pop %r15
pop %r14
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r12
push %r8
push %rax
push %rcx
push %rdx
push %rsi
// Store
mov $0x425, %r11
clflush (%r11)
nop
cmp %r12, %r12
movl $0x51525354, (%r11)
nop
cmp %rsi, %rsi
// Store
mov $0xa85, %r11
nop
cmp %rsi, %rsi
mov $0x5152535455565758, %r8
movq %r8, %xmm2
vmovntdq %ymm2, (%r11)
nop
nop
xor %rsi, %rsi
// Store
lea addresses_D+0xddff, %rdx
xor %rax, %rax
mov $0x5152535455565758, %rcx
movq %rcx, %xmm7
vmovups %ymm7, (%rdx)
and %rsi, %rsi
// Faulty Load
mov $0xa85, %rsi
nop
nop
nop
and $50297, %r8
movntdqa (%rsi), %xmm3
vpextrq $0, %xmm3, %rax
lea oracles, %r12
and $0xff, %rax
shlq $12, %rax
mov (%r12,%rax,1), %rax
pop %rsi
pop %rdx
pop %rcx
pop %rax
pop %r8
pop %r12
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'same': False, 'NT': False, 'AVXalign': False, 'size': 2, 'type': 'addresses_P', 'congruent': 0}}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 4, 'type': 'addresses_P', 'congruent': 4}, 'OP': 'STOR'}
{'dst': {'same': True, 'NT': True, 'AVXalign': False, 'size': 32, 'type': 'addresses_P', 'congruent': 0}, 'OP': 'STOR'}
{'dst': {'same': False, 'NT': False, 'AVXalign': False, 'size': 32, 'type': 'addresses_D', 'congruent': 1}, 'OP': 'STOR'}
[Faulty Load]
{'OP': 'LOAD', 'src': {'same': True, 'NT': True, 'AVXalign': False, 'size': 16, 'type': 'addresses_P', 'congruent': 0}}
<gen_prepare_buffer>
{'dst': {'same': False, 'congruent': 4, 'type': 'addresses_WC_ht'}, 'OP': 'REPM', 'src': {'same': False, 'congruent': 7, 'type': 'addresses_WT_ht'}}
{'58': 7798, '60': 13808, '00': 223}
58 58 58 60 58 60 60 58 60 58 60 58 60 60 58 58 60 58 60 58 60 60 60 60 58 60 60 58 58 60 60 58 58 60 58 60 60 60 60 60 58 58 60 60 58 60 60 60 58 60 60 60 60 60 60 60 58 60 60 60 60 58 60 60 60 58 58 58 60 60 60 60 60 60 58 58 60 60 60 60 60 60 60 58 58 60 60 60 60 60 60 60 58 58 60 60 60 60 60 60 60 60 58 60 60 58 60 60 60 60 60 58 58 60 60 60 58 60 60 60 60 58 60 60 58 60 60 58 60 58 60 60 60 60 60 58 60 60 60 60 58 60 58 60 58 60 60 60 58 60 60 58 58 60 58 60 58 60 60 60 60 60 60 60 60 60 60 58 58 60 60 60 60 60 60 58 60 58 58 58 60 60 60 60 58 60 60 60 58 60 58 60 60 60 58 60 60 60 60 58 60 60 60 60 60 60 60 60 60 60 60 60 58 60 60 60 58 60 60 58 58 60 58 58 60 60 60 60 60 60 60 60 60 58 58 60 58 60 60 60 58 60 60 60 58 60 60 60 60 60 60 60 58 60 60 60 58 60 58 60 60 60 60 60 60 60 60 60 58 58 60 60 60 60 60 60 60 58 60 60 60 60 58 58 60 58 60 60 60 60 58 60 60 60 60 60 60 58 60 60 58 58 58 60 60 60 58 60 60 60 60 60 60 58 60 60 60 60 58 60 58 60 58 60 60 58 60 60 58 58 60 58 60 58 60 60 60 60 60 60 60 60 60 58 60 60 60 60 60 60 58 60 60 60 58 60 60 60 60 60 58 60 58 60 60 60 60 58 60 60 60 60 58 60 60 60 60 60 60 58 60 58 58 60 60 60 60 60 60 58 60 60 58 60 58 58 58 60 60 60 60 60 60 58 60 58 60 58 60 60 60 60 60 58 58 58 60 60 58 60 60 60 60 60 60 60 58 58 60 60 60 58 60 58 60 60 58 58 60 58 60 60 58 60 60 60 60 60 60 60 60 60 60 60 58 60 58 58 60 60 60 60 58 60 60 60 60 60 58 58 60 60 58 58 60 60 60 58 60 60 58 60 60 58 60 60 58 58 58 60 58 58 58 60 60 60 58 58 60 60 60 60 60 60 60 58 60 58 60 58 60 60 60 58 60 58 58 58 58 58 58 58 60 58 58 60 58 60 60 58 58 58 58 58 60 60 60 58 58 58 58 60 58 60 58 58 58 60 60 58 58 58 58 58 60 60 60 58 58 60 58 60 60 60 60 60 58 60 60 60 60 60 58 58 60 60 60 60 58 60 58 58 60 60 58 60 58 58 60 60 60 60 60 60 58 60 58 58 60 58 60 60 58 60 60 60 60 60 58 58 60 60 58 60 58 60 60 60 60 58 58 58 60 60 58 60 58 60 60 60 60 60 60 60 60 60 60 58 60 58 58 58 58 60 60 60 60 58 60 58 60 58 60 58 60 60 58 60 60 60 60 58 60 58 60 60 60 60 58 58 60 60 60 60 60 60 60 58 60 58 58 60 60 60 60 60 58 58 58 60 58 60 60 58 60 60 60 58 60 60 60 60 60 60 58 58 58 60 60 60 60 60 58 60 60 60 58 60 58 60 60 60 60 60 60 60 60 60 60 60 58 60 60 60 58 60 60 58 60 60 60 58 60 58 60 60 60 58 60 58 60 60 58 60 60 60 60 60 60 58 58 60 58 60 60 60 60 60 60 58 60 60 60 60 60 60 60 58 60 60 58 58 60 60 60 60 58 60 60 58 60 60 60 60 60 60 60 60 60 60 60 60 60 60 60 58 60 60 60 60 60 60 60 60 58 60 58 58 60 60 60 60 60 58 60 60 60 60 58 60 58 60 60 60 58 60 60 60 58 60 60 60 60 60 60 60 60 58 60 58 60 58 58 60 60 58 60 00 60 60 58 60 60 58 58 58 60 58 60 58 60 60 60 60 58 60 58 00 60 60 58 60 58 58 60 58 60 60 60 58 60 58 60 60 58 60 60 60 60 60 60 58 60 60 60 60 60 60 58 60 60 58 58 60 58 60 60 60 60 60 58 58 60 60 58 60 58 58 58 58 60 60 58 58 58 58 60 60 58 60 60 58 58 58 58 58 60 58 00 58 58 58 60 58 58 58 58 58 58 60 60 58 60 60 58 60 58 58 58 60 58 58 60 60 58 60 60 58 60 60 60 58 58 58 58 58 58 60 60 60 60 60 60 60 60 58 58 58 60 58
*/
| 49.765306 | 2,999 | 0.654911 |
efbe927dd879b30ef98793f4ea708724af06d779 | 400 | asm | Assembly | 18 gcd.asm | jpsxlr8/Microprocessor-Lab | 76b123612d919ac80619e3da89c95fffd9e2b4d0 | [
"MIT"
] | null | null | null | 18 gcd.asm | jpsxlr8/Microprocessor-Lab | 76b123612d919ac80619e3da89c95fffd9e2b4d0 | [
"MIT"
] | null | null | null | 18 gcd.asm | jpsxlr8/Microprocessor-Lab | 76b123612d919ac80619e3da89c95fffd9e2b4d0 | [
"MIT"
] | null | null | null | ; GCD of two numbers
LDA 0251H ;Load Second Value
MOV B, A
LDA 0250H ;Load First Value
loop: CMP B ;compare if A>B
JZ saveGCD ;since gcd(a, a) = a
JC swapValues ;jump if B>A, swap
SUB B ;if A>B, A=A-B
JMP loop ;unconditional jump
swapValues: MOV C, A ;swap values
MOV A, B
MOV B, C
JMP loop ;unconditional jump after swap
saveGCD: STA 0252H ;save GCD(first, second)
hlt | 21.052632 | 44 | 0.6675 |
fe7e71dd7aafa259be92f1d22973fa5a9bf8e66c | 5,463 | asm | Assembly | Transynther/x86/_processed/NONE/_xt_sm_/i3-7100_9_0x84_notsx.log_85_1401.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 9 | 2020-08-13T19:41:58.000Z | 2022-03-30T12:22:51.000Z | Transynther/x86/_processed/NONE/_xt_sm_/i3-7100_9_0x84_notsx.log_85_1401.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 1 | 2021-04-29T06:29:35.000Z | 2021-05-13T21:02:30.000Z | Transynther/x86/_processed/NONE/_xt_sm_/i3-7100_9_0x84_notsx.log_85_1401.asm | ljhsiun2/medusa | 67d769b8a2fb42c538f10287abaf0e6dbb463f0c | [
"MIT"
] | 3 | 2020-07-14T17:07:07.000Z | 2022-03-21T01:12:22.000Z | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r12
push %r14
push %rax
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_normal_ht+0x1d222, %r12
nop
xor $2520, %rax
mov (%r12), %si
nop
xor $37008, %rbx
lea addresses_D_ht+0x1622, %rcx
nop
nop
nop
and %r11, %r11
vmovups (%rcx), %ymm0
vextracti128 $0, %ymm0, %xmm0
vpextrq $1, %xmm0, %r14
nop
nop
nop
add $26132, %r14
lea addresses_WC_ht+0x17622, %r11
nop
nop
nop
nop
add %r14, %r14
movups (%r11), %xmm2
vpextrq $1, %xmm2, %rbx
nop
sub %rsi, %rsi
lea addresses_WT_ht+0x637a, %rsi
lea addresses_A_ht+0x149e2, %rdi
cmp $29215, %rax
mov $73, %rcx
rep movsb
nop
inc %rdi
lea addresses_WC_ht+0x1b322, %rax
clflush (%rax)
add $9297, %r11
movups (%rax), %xmm2
vpextrq $1, %xmm2, %rcx
nop
nop
add %rbx, %rbx
lea addresses_D_ht+0xfcd2, %rsi
lea addresses_D_ht+0x1cb82, %rdi
nop
add $27010, %r12
mov $25, %rcx
rep movsq
nop
nop
nop
xor %r14, %r14
lea addresses_UC_ht+0x9a22, %rsi
lea addresses_WC_ht+0x1ce22, %rdi
nop
nop
nop
add $34482, %rbx
mov $114, %rcx
rep movsb
nop
nop
nop
add $2226, %r11
lea addresses_D_ht+0x1776e, %rsi
lea addresses_WC_ht+0x14622, %rdi
sub %r11, %r11
mov $83, %rcx
rep movsq
nop
nop
cmp $34707, %rax
lea addresses_UC_ht+0x15c22, %rbx
nop
nop
nop
cmp $18172, %rdi
mov $0x6162636465666768, %r11
movq %r11, %xmm5
vmovups %ymm5, (%rbx)
nop
nop
nop
nop
nop
inc %r11
lea addresses_normal_ht+0x1d8a2, %rsi
lea addresses_UC_ht+0x10c2, %rdi
nop
nop
and %r14, %r14
mov $69, %rcx
rep movsq
nop
nop
nop
nop
sub %r14, %r14
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %rax
pop %r14
pop %r12
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %rbp
push %rbx
push %rcx
push %rdi
push %rdx
push %rsi
// Store
lea addresses_normal+0x9d4a, %rdi
nop
nop
nop
nop
dec %rbx
movw $0x5152, (%rdi)
nop
nop
nop
nop
nop
and $20601, %rdi
// Store
lea addresses_A+0xee22, %rbp
nop
nop
nop
nop
xor $24393, %rdx
mov $0x5152535455565758, %r10
movq %r10, (%rbp)
nop
nop
add $24726, %r10
// Load
lea addresses_WC+0x10622, %rdi
nop
nop
nop
xor %rsi, %rsi
movb (%rdi), %dl
nop
inc %rsi
// Store
lea addresses_WC+0x89c2, %rbx
clflush (%rbx)
nop
nop
nop
xor $4514, %rsi
mov $0x5152535455565758, %rcx
movq %rcx, %xmm4
movups %xmm4, (%rbx)
nop
and %rcx, %rcx
// Load
lea addresses_A+0xee22, %rdi
nop
nop
sub %r10, %r10
mov (%rdi), %rcx
nop
nop
nop
nop
inc %rsi
// REPMOV
lea addresses_US+0x4ac2, %rsi
mov $0x962, %rdi
nop
nop
nop
nop
sub %rbp, %rbp
mov $12, %rcx
rep movsw
nop
nop
nop
xor %rdi, %rdi
// Faulty Load
lea addresses_A+0xee22, %rbp
nop
nop
nop
nop
xor $31820, %rcx
vmovups (%rbp), %ymm1
vextracti128 $0, %ymm1, %xmm1
vpextrq $0, %xmm1, %rdx
lea oracles, %r10
and $0xff, %rdx
shlq $12, %rdx
mov (%r10,%rdx,1), %rdx
pop %rsi
pop %rdx
pop %rdi
pop %rcx
pop %rbx
pop %rbp
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_A', 'same': False, 'size': 4, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'dst': {'type': 'addresses_normal', 'same': False, 'size': 2, 'congruent': 1, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_A', 'same': True, 'size': 8, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_WC', 'same': False, 'size': 1, 'congruent': 11, 'NT': True, 'AVXalign': True}, 'OP': 'LOAD'}
{'dst': {'type': 'addresses_WC', 'same': False, 'size': 16, 'congruent': 5, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_A', 'same': True, 'size': 8, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_US', 'congruent': 5, 'same': False}, 'dst': {'type': 'addresses_P', 'congruent': 2, 'same': False}, 'OP': 'REPM'}
[Faulty Load]
{'src': {'type': 'addresses_A', 'same': True, 'size': 32, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'type': 'addresses_normal_ht', 'same': False, 'size': 2, 'congruent': 8, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_D_ht', 'same': False, 'size': 32, 'congruent': 11, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_WC_ht', 'same': False, 'size': 16, 'congruent': 10, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_WT_ht', 'congruent': 3, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 6, 'same': True}, 'OP': 'REPM'}
{'src': {'type': 'addresses_WC_ht', 'same': False, 'size': 16, 'congruent': 7, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_D_ht', 'congruent': 4, 'same': False}, 'dst': {'type': 'addresses_D_ht', 'congruent': 5, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_UC_ht', 'congruent': 10, 'same': False}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 11, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_D_ht', 'congruent': 2, 'same': False}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 11, 'same': False}, 'OP': 'REPM'}
{'dst': {'type': 'addresses_UC_ht', 'same': True, 'size': 32, 'congruent': 9, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_normal_ht', 'congruent': 6, 'same': False}, 'dst': {'type': 'addresses_UC_ht', 'congruent': 5, 'same': False}, 'OP': 'REPM'}
{'58': 85}
58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58
*/
| 21.256809 | 254 | 0.648911 |
084e5ba994c473fb0247c803aa0d17b1b08a9d2a | 33 | asm | Assembly | projects/Kirbys_Dream_Land_2.windfish/configuration/macros/cbcallNoInterrupts.asm | jverkoey/awaken | 743755248996deb7181ae92f6e60be5656439c44 | [
"Apache-2.0"
] | 68 | 2020-12-16T10:06:48.000Z | 2022-03-29T19:54:01.000Z | projects/Kirbys_Dream_Land_2.windfish/configuration/macros/cbcallNoInterrupts.asm | jverkoey/awaken | 743755248996deb7181ae92f6e60be5656439c44 | [
"Apache-2.0"
] | 62 | 2020-12-19T04:28:41.000Z | 2021-02-15T22:18:16.000Z | projects/Kirbys_Dream_Land_2.windfish/configuration/macros/cbcallNoInterrupts.asm | jverkoey/awaken | 743755248996deb7181ae92f6e60be5656439c44 | [
"Apache-2.0"
] | 4 | 2021-01-17T03:51:22.000Z | 2021-01-21T16:26:53.000Z | ld hl, #2
ld a, #1
call $05CF | 11 | 11 | 0.515152 |
17bd7686fe1af520376f400bc55d8a2a9808c55c | 222 | asm | Assembly | mc-sema/validator/x86_64/tests/FICOM_32m.asm | randolphwong/mcsema | eb5b376736e7f57ff0a61f7e4e5a436bbb874720 | [
"BSD-3-Clause"
] | 2 | 2021-08-07T16:21:29.000Z | 2021-11-17T10:58:37.000Z | mc-sema/validator/x86_64/tests/FICOM_32m.asm | randolphwong/mcsema | eb5b376736e7f57ff0a61f7e4e5a436bbb874720 | [
"BSD-3-Clause"
] | null | null | null | mc-sema/validator/x86_64/tests/FICOM_32m.asm | randolphwong/mcsema | eb5b376736e7f57ff0a61f7e4e5a436bbb874720 | [
"BSD-3-Clause"
] | null | null | null | BITS 64
;TEST_FILE_META_BEGIN
;TEST_TYPE=TEST_F
;TEST_IGNOREFLAGS=
;TEST_FILE_META_END
; set up st0 to be 3.141593
FLD1
;TEST_BEGIN_RECORDING
lea rdi, [rsp-08]
mov dword [rdi], 0x1
FICOM dword [rdi]
;TEST_END_RECORDING
| 13.875 | 27 | 0.783784 |
efc583f777e2d41d3ece22f4ff95291f5b9ed129 | 6,731 | asm | Assembly | generated-src/win-x86_64/crypto/fipsmodule/ghash-ssse3-x86_64.asm | jylama99/aws-lc | 80ab8f6b963b39e6281aa4fede1c4e86d1348748 | [
"MIT"
] | null | null | null | generated-src/win-x86_64/crypto/fipsmodule/ghash-ssse3-x86_64.asm | jylama99/aws-lc | 80ab8f6b963b39e6281aa4fede1c4e86d1348748 | [
"MIT"
] | null | null | null | generated-src/win-x86_64/crypto/fipsmodule/ghash-ssse3-x86_64.asm | jylama99/aws-lc | 80ab8f6b963b39e6281aa4fede1c4e86d1348748 | [
"MIT"
] | null | null | null | ; This file is generated from a similarly-named Perl script in the BoringSSL
; source tree. Do not edit by hand.
default rel
%define XMMWORD
%define YMMWORD
%define ZMMWORD
%ifdef BORINGSSL_PREFIX
%include "boringssl_prefix_symbols_nasm.inc"
%endif
section .text code align=64
global gcm_gmult_ssse3
ALIGN 16
gcm_gmult_ssse3:
$L$gmult_seh_begin:
sub rsp,40
$L$gmult_seh_allocstack:
movdqa XMMWORD[rsp],xmm6
$L$gmult_seh_save_xmm6:
movdqa XMMWORD[16+rsp],xmm10
$L$gmult_seh_save_xmm10:
$L$gmult_seh_prolog_end:
movdqu xmm0,XMMWORD[rcx]
movdqa xmm10,XMMWORD[$L$reverse_bytes]
movdqa xmm2,XMMWORD[$L$low4_mask]
DB 102,65,15,56,0,194
movdqa xmm1,xmm2
pandn xmm1,xmm0
psrld xmm1,4
pand xmm0,xmm2
pxor xmm2,xmm2
pxor xmm3,xmm3
mov rax,5
$L$oop_row_1:
movdqa xmm4,XMMWORD[rdx]
lea rdx,[16+rdx]
movdqa xmm6,xmm2
DB 102,15,58,15,243,1
movdqa xmm3,xmm6
psrldq xmm2,1
movdqa xmm5,xmm4
DB 102,15,56,0,224
DB 102,15,56,0,233
pxor xmm2,xmm5
movdqa xmm5,xmm4
psllq xmm5,60
movdqa xmm6,xmm5
pslldq xmm6,8
pxor xmm3,xmm6
psrldq xmm5,8
pxor xmm2,xmm5
psrlq xmm4,4
pxor xmm2,xmm4
sub rax,1
jnz NEAR $L$oop_row_1
pxor xmm2,xmm3
psrlq xmm3,1
pxor xmm2,xmm3
psrlq xmm3,1
pxor xmm2,xmm3
psrlq xmm3,5
pxor xmm2,xmm3
pxor xmm3,xmm3
mov rax,5
$L$oop_row_2:
movdqa xmm4,XMMWORD[rdx]
lea rdx,[16+rdx]
movdqa xmm6,xmm2
DB 102,15,58,15,243,1
movdqa xmm3,xmm6
psrldq xmm2,1
movdqa xmm5,xmm4
DB 102,15,56,0,224
DB 102,15,56,0,233
pxor xmm2,xmm5
movdqa xmm5,xmm4
psllq xmm5,60
movdqa xmm6,xmm5
pslldq xmm6,8
pxor xmm3,xmm6
psrldq xmm5,8
pxor xmm2,xmm5
psrlq xmm4,4
pxor xmm2,xmm4
sub rax,1
jnz NEAR $L$oop_row_2
pxor xmm2,xmm3
psrlq xmm3,1
pxor xmm2,xmm3
psrlq xmm3,1
pxor xmm2,xmm3
psrlq xmm3,5
pxor xmm2,xmm3
pxor xmm3,xmm3
mov rax,6
$L$oop_row_3:
movdqa xmm4,XMMWORD[rdx]
lea rdx,[16+rdx]
movdqa xmm6,xmm2
DB 102,15,58,15,243,1
movdqa xmm3,xmm6
psrldq xmm2,1
movdqa xmm5,xmm4
DB 102,15,56,0,224
DB 102,15,56,0,233
pxor xmm2,xmm5
movdqa xmm5,xmm4
psllq xmm5,60
movdqa xmm6,xmm5
pslldq xmm6,8
pxor xmm3,xmm6
psrldq xmm5,8
pxor xmm2,xmm5
psrlq xmm4,4
pxor xmm2,xmm4
sub rax,1
jnz NEAR $L$oop_row_3
pxor xmm2,xmm3
psrlq xmm3,1
pxor xmm2,xmm3
psrlq xmm3,1
pxor xmm2,xmm3
psrlq xmm3,5
pxor xmm2,xmm3
pxor xmm3,xmm3
DB 102,65,15,56,0,210
movdqu XMMWORD[rcx],xmm2
pxor xmm0,xmm0
pxor xmm1,xmm1
pxor xmm2,xmm2
pxor xmm3,xmm3
pxor xmm4,xmm4
pxor xmm5,xmm5
pxor xmm6,xmm6
movdqa xmm6,XMMWORD[rsp]
movdqa xmm10,XMMWORD[16+rsp]
add rsp,40
DB 0F3h,0C3h ;repret
$L$gmult_seh_end:
global gcm_ghash_ssse3
ALIGN 16
gcm_ghash_ssse3:
$L$ghash_seh_begin:
sub rsp,56
$L$ghash_seh_allocstack:
movdqa XMMWORD[rsp],xmm6
$L$ghash_seh_save_xmm6:
movdqa XMMWORD[16+rsp],xmm10
$L$ghash_seh_save_xmm10:
movdqa XMMWORD[32+rsp],xmm11
$L$ghash_seh_save_xmm11:
$L$ghash_seh_prolog_end:
movdqu xmm0,XMMWORD[rcx]
movdqa xmm10,XMMWORD[$L$reverse_bytes]
movdqa xmm11,XMMWORD[$L$low4_mask]
and r9,-16
DB 102,65,15,56,0,194
pxor xmm3,xmm3
$L$oop_ghash:
movdqu xmm1,XMMWORD[r8]
DB 102,65,15,56,0,202
pxor xmm0,xmm1
movdqa xmm1,xmm11
pandn xmm1,xmm0
psrld xmm1,4
pand xmm0,xmm11
pxor xmm2,xmm2
mov rax,5
$L$oop_row_4:
movdqa xmm4,XMMWORD[rdx]
lea rdx,[16+rdx]
movdqa xmm6,xmm2
DB 102,15,58,15,243,1
movdqa xmm3,xmm6
psrldq xmm2,1
movdqa xmm5,xmm4
DB 102,15,56,0,224
DB 102,15,56,0,233
pxor xmm2,xmm5
movdqa xmm5,xmm4
psllq xmm5,60
movdqa xmm6,xmm5
pslldq xmm6,8
pxor xmm3,xmm6
psrldq xmm5,8
pxor xmm2,xmm5
psrlq xmm4,4
pxor xmm2,xmm4
sub rax,1
jnz NEAR $L$oop_row_4
pxor xmm2,xmm3
psrlq xmm3,1
pxor xmm2,xmm3
psrlq xmm3,1
pxor xmm2,xmm3
psrlq xmm3,5
pxor xmm2,xmm3
pxor xmm3,xmm3
mov rax,5
$L$oop_row_5:
movdqa xmm4,XMMWORD[rdx]
lea rdx,[16+rdx]
movdqa xmm6,xmm2
DB 102,15,58,15,243,1
movdqa xmm3,xmm6
psrldq xmm2,1
movdqa xmm5,xmm4
DB 102,15,56,0,224
DB 102,15,56,0,233
pxor xmm2,xmm5
movdqa xmm5,xmm4
psllq xmm5,60
movdqa xmm6,xmm5
pslldq xmm6,8
pxor xmm3,xmm6
psrldq xmm5,8
pxor xmm2,xmm5
psrlq xmm4,4
pxor xmm2,xmm4
sub rax,1
jnz NEAR $L$oop_row_5
pxor xmm2,xmm3
psrlq xmm3,1
pxor xmm2,xmm3
psrlq xmm3,1
pxor xmm2,xmm3
psrlq xmm3,5
pxor xmm2,xmm3
pxor xmm3,xmm3
mov rax,6
$L$oop_row_6:
movdqa xmm4,XMMWORD[rdx]
lea rdx,[16+rdx]
movdqa xmm6,xmm2
DB 102,15,58,15,243,1
movdqa xmm3,xmm6
psrldq xmm2,1
movdqa xmm5,xmm4
DB 102,15,56,0,224
DB 102,15,56,0,233
pxor xmm2,xmm5
movdqa xmm5,xmm4
psllq xmm5,60
movdqa xmm6,xmm5
pslldq xmm6,8
pxor xmm3,xmm6
psrldq xmm5,8
pxor xmm2,xmm5
psrlq xmm4,4
pxor xmm2,xmm4
sub rax,1
jnz NEAR $L$oop_row_6
pxor xmm2,xmm3
psrlq xmm3,1
pxor xmm2,xmm3
psrlq xmm3,1
pxor xmm2,xmm3
psrlq xmm3,5
pxor xmm2,xmm3
pxor xmm3,xmm3
movdqa xmm0,xmm2
lea rdx,[((-256))+rdx]
lea r8,[16+r8]
sub r9,16
jnz NEAR $L$oop_ghash
DB 102,65,15,56,0,194
movdqu XMMWORD[rcx],xmm0
pxor xmm0,xmm0
pxor xmm1,xmm1
pxor xmm2,xmm2
pxor xmm3,xmm3
pxor xmm4,xmm4
pxor xmm5,xmm5
pxor xmm6,xmm6
movdqa xmm6,XMMWORD[rsp]
movdqa xmm10,XMMWORD[16+rsp]
movdqa xmm11,XMMWORD[32+rsp]
add rsp,56
DB 0F3h,0C3h ;repret
$L$ghash_seh_end:
ALIGN 16
$L$reverse_bytes:
DB 15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0
$L$low4_mask:
DQ 0x0f0f0f0f0f0f0f0f,0x0f0f0f0f0f0f0f0f
section .pdata rdata align=4
ALIGN 4
DD $L$gmult_seh_begin wrt ..imagebase
DD $L$gmult_seh_end wrt ..imagebase
DD $L$gmult_seh_info wrt ..imagebase
DD $L$ghash_seh_begin wrt ..imagebase
DD $L$ghash_seh_end wrt ..imagebase
DD $L$ghash_seh_info wrt ..imagebase
section .xdata rdata align=8
ALIGN 8
$L$gmult_seh_info:
DB 1
DB $L$gmult_seh_prolog_end-$L$gmult_seh_begin
DB 5
DB 0
DB $L$gmult_seh_save_xmm10-$L$gmult_seh_begin
DB 168
DW 1
DB $L$gmult_seh_save_xmm6-$L$gmult_seh_begin
DB 104
DW 0
DB $L$gmult_seh_allocstack-$L$gmult_seh_begin
DB 66
ALIGN 8
$L$ghash_seh_info:
DB 1
DB $L$ghash_seh_prolog_end-$L$ghash_seh_begin
DB 7
DB 0
DB $L$ghash_seh_save_xmm11-$L$ghash_seh_begin
DB 184
DW 2
DB $L$ghash_seh_save_xmm10-$L$ghash_seh_begin
DB 168
DW 1
DB $L$ghash_seh_save_xmm6-$L$ghash_seh_begin
DB 104
DW 0
DB $L$ghash_seh_allocstack-$L$ghash_seh_begin
DB 98
| 13.570565 | 77 | 0.677611 |
a04e4751ccd2974fda8541eca89388e2660b19b0 | 960 | asm | Assembly | libsrc/_DEVELOPMENT/math/float/math48/z80/core/mm48_mul10.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null | libsrc/_DEVELOPMENT/math/float/math48/z80/core/mm48_mul10.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null | libsrc/_DEVELOPMENT/math/float/math48/z80/core/mm48_mul10.asm | meesokim/z88dk | 5763c7778f19a71d936b3200374059d267066bb2 | [
"ClArtistic"
] | null | null | null |
SECTION code_fp_math48
PUBLIC mm48_mul10
EXTERN mm48__sright, mm48__right, mm48__retzero, am48_derror_erange_pinfc
mm48_mul10:
; multiply by 10 and make positive
; AC' = abs(AC') * 10
;
; enter : AC'(BCDEHL') = float x
;
; exit : success
;
; AC'= abs(x) * 10
; carry reset
;
; fail if overflow
;
; AC'= +inf
; carry set, errno set
;
; uses : af, bc', de', hl'
exx
; AC = x
ld a,l
or a
jp z, mm48__retzero ; if zero
set 7,b
push bc
push de
ld a,h
call mm48__sright
call mm48__sright
add a,h
ld h,a
ex (sp),hl
adc hl,de
ex de,hl
pop hl
ex (sp),hl
adc hl,bc
ld b,h
ld c,l
pop hl
ld a,3
jr nc, mm48__m10a
call mm48__right
inc a
mm48__m10a:
add a,l
ld l,a
jp c, am48_derror_erange_pinfc + 1
res 7,b
exx
ret
| 13.150685 | 73 | 0.50625 |
a22e9880a5d244a1b2efd6d3014830cdecc5d2b6 | 414 | asm | Assembly | programs/oeis/010/A010903.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | 1 | 2021-03-15T11:38:20.000Z | 2021-03-15T11:38:20.000Z | programs/oeis/010/A010903.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | programs/oeis/010/A010903.asm | jmorken/loda | 99c09d2641e858b074f6344a352d13bc55601571 | [
"Apache-2.0"
] | null | null | null | ; A010903: Pisot sequence E(3,13): a(n) = floor(a(n-1)^2/a(n-2) + 1/2).
; 3,13,56,241,1037,4462,19199,82609,355448,1529413,6580721,28315366,121834667,524227237,2255632184,9705479209,41760499493,179686059838,773148800711,3326685824041,14313982718072,61589856118237,265007332436969,1140267093830134,4906313471839763
add $0,1
mov $1,1
lpb $0
sub $0,1
add $2,$1
mov $1,$2
mul $1,2
add $3,$2
add $1,$3
lpe
| 29.571429 | 241 | 0.729469 |
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