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lkml
[PATCH v4 0/3] targeted TLB sync IPIs for lockless page table walkers
When freeing or unsharing page tables we send an IPI to synchronize with concurrent lockless page table walkers (e.g. GUP-fast). Today we broadcast that IPI to all CPUs, which is costly on large machines and hurts RT workloads[1]. This series makes those IPIs targeted. We track which CPUs are currently doing a lockles...
On 2/2/26 04:14, Lance Yang wrote: I thought the big databases were really sensitive to GUP-fast latency. They like big systems, too. Won't they howl when this finally hits their testing? Also, two of the "write" side here are: * collapse_huge_page() (khugepaged) * tlb_remove_table() (in an "-ENOMEM" path) Those ...
{ "author": "Dave Hansen <dave.hansen@intel.com>", "date": "Mon, 2 Feb 2026 08:20:13 -0800", "thread_id": "be38af98-e344-4552-a77b-b5345135e382@intel.com.mbox.gz" }
lkml
[PATCH 0/2] Correct MT8365's infracfg-nao DT node description as a pure syscon
Introduce a new compatible to the binding and use it in the infracfg-nao node in the mt8365.dtsi to correctly describe the node and prevent probe errors. Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> --- Nícolas F. R. A. Prado (2): dt-bindings: mfd: syscon: Add mediatek,mt8365-infracfg-nao ...
The register space described by DT node of compatible mediatek,mt8365-infracfg-nao exposes a variety of unrelated registers, including registers for controlling bus protection on the MT8365 SoC, which is used by the power domain controller through a syscon. Add this compatible to the syscon binding. Signed-off-by: Ní...
{ "author": "=?utf-8?q?N=C3=ADcolas_F=2E_R=2E_A=2E_Prado?= <nfraprado@collabora.com>", "date": "Fri, 02 May 2025 12:43:21 -0400", "thread_id": "25bc9ae2-5c27-407a-aae4-6c619367664a@baylibre.com.mbox.gz" }
lkml
[PATCH 0/2] Correct MT8365's infracfg-nao DT node description as a pure syscon
Introduce a new compatible to the binding and use it in the infracfg-nao node in the mt8365.dtsi to correctly describe the node and prevent probe errors. Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> --- Nícolas F. R. A. Prado (2): dt-bindings: mfd: syscon: Add mediatek,mt8365-infracfg-nao ...
The infracfg-nao register space at 0x1020e000 has different registers than the infracfg space at 0x10001000, and most importantly, doesn't contain any clock controls. Therefore it shouldn't use the same compatible used for the mt8365 infracfg clocks driver: mediatek,mt8365-infracfg. Since it currently does, probe error...
{ "author": "=?utf-8?q?N=C3=ADcolas_F=2E_R=2E_A=2E_Prado?= <nfraprado@collabora.com>", "date": "Fri, 02 May 2025 12:43:22 -0400", "thread_id": "25bc9ae2-5c27-407a-aae4-6c619367664a@baylibre.com.mbox.gz" }
lkml
[PATCH 0/2] Correct MT8365's infracfg-nao DT node description as a pure syscon
Introduce a new compatible to the binding and use it in the infracfg-nao node in the mt8365.dtsi to correctly describe the node and prevent probe errors. Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> --- Nícolas F. R. A. Prado (2): dt-bindings: mfd: syscon: Add mediatek,mt8365-infracfg-nao ...
Il 02/05/25 18:43, Nícolas F. R. A. Prado ha scritto: Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
{ "author": "AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>", "date": "Tue, 6 May 2025 10:26:48 +0200", "thread_id": "25bc9ae2-5c27-407a-aae4-6c619367664a@baylibre.com.mbox.gz" }
lkml
[PATCH 0/2] Correct MT8365's infracfg-nao DT node description as a pure syscon
Introduce a new compatible to the binding and use it in the infracfg-nao node in the mt8365.dtsi to correctly describe the node and prevent probe errors. Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> --- Nícolas F. R. A. Prado (2): dt-bindings: mfd: syscon: Add mediatek,mt8365-infracfg-nao ...
Il 02/05/25 18:43, Nícolas F. R. A. Prado ha scritto: Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
{ "author": "AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>", "date": "Tue, 6 May 2025 10:26:49 +0200", "thread_id": "25bc9ae2-5c27-407a-aae4-6c619367664a@baylibre.com.mbox.gz" }
lkml
[PATCH 0/2] Correct MT8365's infracfg-nao DT node description as a pure syscon
Introduce a new compatible to the binding and use it in the infracfg-nao node in the mt8365.dtsi to correctly describe the node and prevent probe errors. Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> --- Nícolas F. R. A. Prado (2): dt-bindings: mfd: syscon: Add mediatek,mt8365-infracfg-nao ...
On Fri, May 02, 2025 at 12:43:21PM -0400, Ncolas F. R. A. Prado wrote: Acked-by: Conor Dooley <conor.dooley@microchip.com>
{ "author": "Conor Dooley <conor@kernel.org>", "date": "Tue, 6 May 2025 17:30:22 +0100", "thread_id": "25bc9ae2-5c27-407a-aae4-6c619367664a@baylibre.com.mbox.gz" }
lkml
[PATCH 0/2] Correct MT8365's infracfg-nao DT node description as a pure syscon
Introduce a new compatible to the binding and use it in the infracfg-nao node in the mt8365.dtsi to correctly describe the node and prevent probe errors. Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> --- Nícolas F. R. A. Prado (2): dt-bindings: mfd: syscon: Add mediatek,mt8365-infracfg-nao ...
On Fri, 02 May 2025 12:43:21 -0400, Nícolas F. R. A. Prado wrote: Applied, thanks! [1/2] dt-bindings: mfd: syscon: Add mediatek,mt8365-infracfg-nao commit: cbb005b91726ea1024b6261bc1062bac19f6d059 -- Lee Jones [李琼斯]
{ "author": "Lee Jones <lee@kernel.org>", "date": "Tue, 13 May 2025 10:48:51 +0100", "thread_id": "25bc9ae2-5c27-407a-aae4-6c619367664a@baylibre.com.mbox.gz" }
lkml
[PATCH 0/2] Correct MT8365's infracfg-nao DT node description as a pure syscon
Introduce a new compatible to the binding and use it in the infracfg-nao node in the mt8365.dtsi to correctly describe the node and prevent probe errors. Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> --- Nícolas F. R. A. Prado (2): dt-bindings: mfd: syscon: Add mediatek,mt8365-infracfg-nao ...
On 5/2/25 11:43 AM, Nícolas F. R. A. Prado wrote: Reviewed-by: David Lechner <dlechner@baylibre.com> It looks like this never got picked up. I noticed this was a problem in U-Boot because it was registering this as a clock provider. And I sent a similar patch [1] recently that has also not been acted on yet. I prefer...
{ "author": "David Lechner <dlechner@baylibre.com>", "date": "Mon, 2 Feb 2026 11:20:30 -0600", "thread_id": "25bc9ae2-5c27-407a-aae4-6c619367664a@baylibre.com.mbox.gz" }
lkml
[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
Modify online_memory_block() to accept the online type through its arg parameter rather than calling mhp_get_default_online_type() internally. This prepares for allowing callers to specify explicit online types. Update the caller in add_memory_resource() to pass the default online type via a local variable. No functi...
{ "author": "Gregory Price <gourry@gourry.net>", "date": "Thu, 29 Jan 2026 16:04:34 -0500", "thread_id": "20260202175711.000021d4@huawei.com.mbox.gz" }
lkml
[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
Enable dax kmem driver to select how to online the memory rather than implicitly depending on the system default. This will allow users of dax to plumb through a preferred auto-online policy for their region. Refactor and new interface: Add __add_memory_driver_managed() which accepts an explicit online_type and expor...
{ "author": "Gregory Price <gourry@gourry.net>", "date": "Thu, 29 Jan 2026 16:04:35 -0500", "thread_id": "20260202175711.000021d4@huawei.com.mbox.gz" }
lkml
[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
There is no way for drivers leveraging dax_kmem to plumb through a preferred auto-online policy - the system default policy is forced. Add online_type field to DAX device creation path to allow drivers to specify an auto-online policy when using the kmem driver. Current callers initialize online_type to mhp_get_defau...
{ "author": "Gregory Price <gourry@gourry.net>", "date": "Thu, 29 Jan 2026 16:04:36 -0500", "thread_id": "20260202175711.000021d4@huawei.com.mbox.gz" }
lkml
[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
Move the pmem region driver logic from region.c into pmem_region.c. No functional changes. Signed-off-by: Gregory Price <gourry@gourry.net> --- drivers/cxl/core/Makefile | 1 + drivers/cxl/core/core.h | 1 + drivers/cxl/core/pmem_region.c | 191 +++++++++++++++++++++++++++++++++ drivers/cxl/core/regi...
{ "author": "Gregory Price <gourry@gourry.net>", "date": "Thu, 29 Jan 2026 16:04:38 -0500", "thread_id": "20260202175711.000021d4@huawei.com.mbox.gz" }
lkml
[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
Move the CXL DAX region device infrastructure from region.c into a new dax_region.c file. No functional changes. Signed-off-by: Gregory Price <gourry@gourry.net> --- drivers/cxl/core/Makefile | 1 + drivers/cxl/core/core.h | 1 + drivers/cxl/core/dax_region.c | 113 ++++++++++++++++++++++++++++++++++ d...
{ "author": "Gregory Price <gourry@gourry.net>", "date": "Thu, 29 Jan 2026 16:04:39 -0500", "thread_id": "20260202175711.000021d4@huawei.com.mbox.gz" }
lkml
[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
Add a new cxl_devdax_region driver that probes CXL regions in device dax mode and creates dax_region devices. This allows explicit binding to the device_dax dax driver instead of the kmem driver. Exports to_cxl_region() to core.h so it can be used by the driver. Signed-off-by: Gregory Price <gourry@gourry.net> --- d...
{ "author": "Gregory Price <gourry@gourry.net>", "date": "Thu, 29 Jan 2026 16:04:40 -0500", "thread_id": "20260202175711.000021d4@huawei.com.mbox.gz" }
lkml
[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
CXL regions may wish not to auto-configure their memory as dax kmem, but the current plumbing defaults all cxl-created dax devices to the kmem driver. This exposes them to hotplug policy, even if the user intends to use the memory as a dax device. Add plumbing to allow CXL drivers to select whether a DAX region shoul...
{ "author": "Gregory Price <gourry@gourry.net>", "date": "Thu, 29 Jan 2026 16:04:37 -0500", "thread_id": "20260202175711.000021d4@huawei.com.mbox.gz" }
lkml
[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
Explain the binding process for sysram and daxdev regions which are explicit about which dax driver to use during region creation. Jonathan Corbet <corbet@lwn.net> Signed-off-by: Gregory Price <gourry@gourry.net> --- .../driver-api/cxl/linux/cxl-driver.rst | 43 +++++++++++++++++++ .../driver-api/cxl/linux/dax...
{ "author": "Gregory Price <gourry@gourry.net>", "date": "Thu, 29 Jan 2026 16:04:42 -0500", "thread_id": "20260202175711.000021d4@huawei.com.mbox.gz" }
lkml
[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
In the current kmem driver binding process, the only way for users to define hotplug policy is via a build-time option, or by not onlining memory by default and setting each individual memory block online after hotplug occurs. We can solve this with a configuration step between region-probe and dax-probe. Add the inf...
{ "author": "Gregory Price <gourry@gourry.net>", "date": "Thu, 29 Jan 2026 16:04:41 -0500", "thread_id": "20260202175711.000021d4@huawei.com.mbox.gz" }
lkml
[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
Annoyingly, my email client has been truncating my titles: cxl: explicit DAX driver selection and hotplug policy for CXL regions ~Gregory
{ "author": "Gregory Price <gourry@gourry.net>", "date": "Thu, 29 Jan 2026 16:17:55 -0500", "thread_id": "20260202175711.000021d4@huawei.com.mbox.gz" }
lkml
[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
On Thu, Jan 29, 2026 at 04:04:33PM -0500, Gregory Price wrote: Looks like build regression on configs without hotplug MMOP_ defines and mhp_get_default_online_type() undefined Will let this version sit for a bit before spinning a v2 ~Gregory
{ "author": "Gregory Price <gourry@gourry.net>", "date": "Fri, 30 Jan 2026 12:34:33 -0500", "thread_id": "20260202175711.000021d4@huawei.com.mbox.gz" }
lkml
[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
On 1/29/2026 3:04 PM, Gregory Price wrote: This technically comes up in the devdax_region driver patch first, but I noticed it here so this is where I'm putting it: I like the idea here, but the implementation is all off. Firstly, devm_cxl_add_sysram_region() is never called outside of sysram_region_driver::probe(), ...
{ "author": "\"Cheatham, Benjamin\" <benjamin.cheatham@amd.com>", "date": "Fri, 30 Jan 2026 15:27:12 -0600", "thread_id": "20260202175711.000021d4@huawei.com.mbox.gz" }
lkml
[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
On Fri, Jan 30, 2026 at 03:27:12PM -0600, Cheatham, Benjamin wrote: I originally tried doing with region0/region_driver, but that design pattern is also confusing - and it creates differently bad patterns. echo region0 > decoder0.0/create_ram_region -> creates region0 # Current pattern echo region > dr...
{ "author": "Gregory Price <gourry@gourry.net>", "date": "Fri, 30 Jan 2026 17:12:50 -0500", "thread_id": "20260202175711.000021d4@huawei.com.mbox.gz" }
lkml
[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
On 1/30/2026 4:12 PM, Gregory Price wrote: Ok, that makes sense. I think I just got lost in the sauce while looking at this last week and this explanation helped a lot.> I think this was the source of my misunderstanding. I was trying to understand how it works for auto regions when it's never meant to apply to them...
{ "author": "\"Cheatham, Benjamin\" <benjamin.cheatham@amd.com>", "date": "Mon, 2 Feb 2026 11:02:37 -0600", "thread_id": "20260202175711.000021d4@huawei.com.mbox.gz" }
lkml
[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
On Thu, 29 Jan 2026 16:04:34 -0500 Gregory Price <gourry@gourry.net> wrote: Trivial comment inline. I don't really care either way. Pushing the policy up to the caller and ensuring it's explicitly constant for all the memory blocks (as opposed to relying on locks) seems sensible to me even without anything else. Rev...
{ "author": "Jonathan Cameron <jonathan.cameron@huawei.com>", "date": "Mon, 2 Feb 2026 17:10:29 +0000", "thread_id": "20260202175711.000021d4@huawei.com.mbox.gz" }
lkml
[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
On Thu, 29 Jan 2026 16:04:35 -0500 Gregory Price <gourry@gourry.net> wrote: Hi Gregory, I think maybe I'd have left the export for the first user outside of memory_hotplug.c. Not particularly important however. Maybe talk about why a caller of __add_memory_driver_managed() might want the default? Feels like that's...
{ "author": "Jonathan Cameron <jonathan.cameron@huawei.com>", "date": "Mon, 2 Feb 2026 17:25:24 +0000", "thread_id": "20260202175711.000021d4@huawei.com.mbox.gz" }
lkml
[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
On Mon, Feb 02, 2026 at 11:02:37AM -0600, Cheatham, Benjamin wrote: Auto regions explicitly use the dax_kmem path (all existing code, unchanged)- which auto-plugs into dax/hotplug. I do get what you're saying that everything binds on a region type, I will look a little closer at this and see if there's something more...
{ "author": "Gregory Price <gourry@gourry.net>", "date": "Mon, 2 Feb 2026 12:41:31 -0500", "thread_id": "20260202175711.000021d4@huawei.com.mbox.gz" }
lkml
[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
On Mon, Feb 02, 2026 at 05:10:29PM +0000, Jonathan Cameron wrote: ack. will update for next version w/ Ben's notes and the build fix. Thanks! ~Gregory
{ "author": "Gregory Price <gourry@gourry.net>", "date": "Mon, 2 Feb 2026 12:46:25 -0500", "thread_id": "20260202175711.000021d4@huawei.com.mbox.gz" }
lkml
[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
On Thu, 29 Jan 2026 16:04:37 -0500 Gregory Price <gourry@gourry.net> wrote: LGTM Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
{ "author": "Jonathan Cameron <jonathan.cameron@huawei.com>", "date": "Mon, 2 Feb 2026 17:54:17 +0000", "thread_id": "20260202175711.000021d4@huawei.com.mbox.gz" }
lkml
[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
On Thu, 29 Jan 2026 16:04:38 -0500 Gregory Price <gourry@gourry.net> wrote: Needs to answer the question: Why? Minor stuff inline. Maybe sneak in dropping that trailing comma whilst you are moving it. ... Bonus line...
{ "author": "Jonathan Cameron <jonathan.cameron@huawei.com>", "date": "Mon, 2 Feb 2026 17:56:40 +0000", "thread_id": "20260202175711.000021d4@huawei.com.mbox.gz" }
lkml
[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
On Thu, 29 Jan 2026 16:04:39 -0500 Gregory Price <gourry@gourry.net> wrote: Likewise. Why?
{ "author": "Jonathan Cameron <jonathan.cameron@huawei.com>", "date": "Mon, 2 Feb 2026 17:57:11 +0000", "thread_id": "20260202175711.000021d4@huawei.com.mbox.gz" }
lkml
[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
On Mon, Feb 02, 2026 at 05:25:24PM +0000, Jonathan Cameron wrote: Less about why they want the default, more about maintaining backward compatibility. In the cxl driver, Ben pointed out something that made me realize we can change `region/bind()` to actually use the new `sysram/bind` path by just adding a one line `s...
{ "author": "Gregory Price <gourry@gourry.net>", "date": "Mon, 2 Feb 2026 13:02:10 -0500", "thread_id": "20260202175711.000021d4@huawei.com.mbox.gz" }
lkml
[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
On Thu, 29 Jan 2026 16:04:41 -0500 Gregory Price <gourry@gourry.net> wrote: ZONE_MOVABLE Trivial stuff. Will mull over this series as a whole... My first instinctive reaction is positive - I'm just wondering where additional drivers fit into this and whether it has the right degree of flexibility. This smells li...
{ "author": "Jonathan Cameron <jonathan.cameron@huawei.com>", "date": "Mon, 2 Feb 2026 18:20:15 +0000", "thread_id": "20260202175711.000021d4@huawei.com.mbox.gz" }
lkml
[PATCH 0/2] Correct MT8365's infracfg-nao DT node description as a pure syscon
Introduce a new compatible to the binding and use it in the infracfg-nao node in the mt8365.dtsi to correctly describe the node and prevent probe errors. Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> --- Nícolas F. R. A. Prado (2): dt-bindings: mfd: syscon: Add mediatek,mt8365-infracfg-nao ...
The register space described by DT node of compatible mediatek,mt8365-infracfg-nao exposes a variety of unrelated registers, including registers for controlling bus protection on the MT8365 SoC, which is used by the power domain controller through a syscon. Add this compatible to the syscon binding. Signed-off-by: Ní...
{ "author": "=?utf-8?q?N=C3=ADcolas_F=2E_R=2E_A=2E_Prado?= <nfraprado@collabora.com>", "date": "Fri, 02 May 2025 12:43:21 -0400", "thread_id": "20250502-mt8365-infracfg-nao-compatible-v1-0-e40394573f98@collabora.com.mbox.gz" }
lkml
[PATCH 0/2] Correct MT8365's infracfg-nao DT node description as a pure syscon
Introduce a new compatible to the binding and use it in the infracfg-nao node in the mt8365.dtsi to correctly describe the node and prevent probe errors. Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> --- Nícolas F. R. A. Prado (2): dt-bindings: mfd: syscon: Add mediatek,mt8365-infracfg-nao ...
The infracfg-nao register space at 0x1020e000 has different registers than the infracfg space at 0x10001000, and most importantly, doesn't contain any clock controls. Therefore it shouldn't use the same compatible used for the mt8365 infracfg clocks driver: mediatek,mt8365-infracfg. Since it currently does, probe error...
{ "author": "=?utf-8?q?N=C3=ADcolas_F=2E_R=2E_A=2E_Prado?= <nfraprado@collabora.com>", "date": "Fri, 02 May 2025 12:43:22 -0400", "thread_id": "20250502-mt8365-infracfg-nao-compatible-v1-0-e40394573f98@collabora.com.mbox.gz" }
lkml
[PATCH 0/2] Correct MT8365's infracfg-nao DT node description as a pure syscon
Introduce a new compatible to the binding and use it in the infracfg-nao node in the mt8365.dtsi to correctly describe the node and prevent probe errors. Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> --- Nícolas F. R. A. Prado (2): dt-bindings: mfd: syscon: Add mediatek,mt8365-infracfg-nao ...
Il 02/05/25 18:43, Nícolas F. R. A. Prado ha scritto: Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
{ "author": "AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>", "date": "Tue, 6 May 2025 10:26:48 +0200", "thread_id": "20250502-mt8365-infracfg-nao-compatible-v1-0-e40394573f98@collabora.com.mbox.gz" }
lkml
[PATCH 0/2] Correct MT8365's infracfg-nao DT node description as a pure syscon
Introduce a new compatible to the binding and use it in the infracfg-nao node in the mt8365.dtsi to correctly describe the node and prevent probe errors. Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> --- Nícolas F. R. A. Prado (2): dt-bindings: mfd: syscon: Add mediatek,mt8365-infracfg-nao ...
Il 02/05/25 18:43, Nícolas F. R. A. Prado ha scritto: Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
{ "author": "AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>", "date": "Tue, 6 May 2025 10:26:49 +0200", "thread_id": "20250502-mt8365-infracfg-nao-compatible-v1-0-e40394573f98@collabora.com.mbox.gz" }
lkml
[PATCH 0/2] Correct MT8365's infracfg-nao DT node description as a pure syscon
Introduce a new compatible to the binding and use it in the infracfg-nao node in the mt8365.dtsi to correctly describe the node and prevent probe errors. Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> --- Nícolas F. R. A. Prado (2): dt-bindings: mfd: syscon: Add mediatek,mt8365-infracfg-nao ...
On Fri, May 02, 2025 at 12:43:21PM -0400, Ncolas F. R. A. Prado wrote: Acked-by: Conor Dooley <conor.dooley@microchip.com>
{ "author": "Conor Dooley <conor@kernel.org>", "date": "Tue, 6 May 2025 17:30:22 +0100", "thread_id": "20250502-mt8365-infracfg-nao-compatible-v1-0-e40394573f98@collabora.com.mbox.gz" }
lkml
[PATCH 0/2] Correct MT8365's infracfg-nao DT node description as a pure syscon
Introduce a new compatible to the binding and use it in the infracfg-nao node in the mt8365.dtsi to correctly describe the node and prevent probe errors. Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> --- Nícolas F. R. A. Prado (2): dt-bindings: mfd: syscon: Add mediatek,mt8365-infracfg-nao ...
On Fri, 02 May 2025 12:43:21 -0400, Nícolas F. R. A. Prado wrote: Applied, thanks! [1/2] dt-bindings: mfd: syscon: Add mediatek,mt8365-infracfg-nao commit: cbb005b91726ea1024b6261bc1062bac19f6d059 -- Lee Jones [李琼斯]
{ "author": "Lee Jones <lee@kernel.org>", "date": "Tue, 13 May 2025 10:48:51 +0100", "thread_id": "20250502-mt8365-infracfg-nao-compatible-v1-0-e40394573f98@collabora.com.mbox.gz" }
lkml
[PATCH 0/2] Correct MT8365's infracfg-nao DT node description as a pure syscon
Introduce a new compatible to the binding and use it in the infracfg-nao node in the mt8365.dtsi to correctly describe the node and prevent probe errors. Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> --- Nícolas F. R. A. Prado (2): dt-bindings: mfd: syscon: Add mediatek,mt8365-infracfg-nao ...
On 5/2/25 11:43 AM, Nícolas F. R. A. Prado wrote: Reviewed-by: David Lechner <dlechner@baylibre.com> It looks like this never got picked up. I noticed this was a problem in U-Boot because it was registering this as a clock provider. And I sent a similar patch [1] recently that has also not been acted on yet. I prefer...
{ "author": "David Lechner <dlechner@baylibre.com>", "date": "Mon, 2 Feb 2026 11:20:30 -0600", "thread_id": "20250502-mt8365-infracfg-nao-compatible-v1-0-e40394573f98@collabora.com.mbox.gz" }
lkml
[PATCH 0/3] jbd2/ext4/ocfs2: READ_ONCE for lockless jinode reads
This series adds READ_ONCE() for existing lockless reads of jbd2_inode fields in jbd2 and filesystem callbacks used by ext4 and ocfs2. This is based on Jan's suggestion in the review of the ext4 jinode publication race fix. [1] [1]: https://lore.kernel.org/all/4jxwogttddiaoqbstlgou5ox6zs27ngjjz5ukrxafm2z5ijxod@so4eqn...
jbd2_inode fields are updated under journal->j_list_lock, but some paths read them without holding the lock (e.g. fast commit helpers and the ordered truncate fast path). Use READ_ONCE() for these lockless reads to correct the concurrency assumptions. Suggested-by: Jan Kara <jack@suse.com> Signed-off-by: Li Chen <me@...
{ "author": "Li Chen <me@linux.beauty>", "date": "Fri, 30 Jan 2026 11:12:30 +0800", "thread_id": "jvo5sk46f6cvqmkgetrlybs46kryhxetsvapkmx4tocbdirk3w@ume4qfpsddco.mbox.gz" }
lkml
[PATCH 0/3] jbd2/ext4/ocfs2: READ_ONCE for lockless jinode reads
This series adds READ_ONCE() for existing lockless reads of jbd2_inode fields in jbd2 and filesystem callbacks used by ext4 and ocfs2. This is based on Jan's suggestion in the review of the ext4 jinode publication race fix. [1] [1]: https://lore.kernel.org/all/4jxwogttddiaoqbstlgou5ox6zs27ngjjz5ukrxafm2z5ijxod@so4eqn...
ext4 journal commit callbacks access jbd2_inode fields such as i_transaction and i_dirty_start/end without holding journal->j_list_lock. Use READ_ONCE() for these reads to correct the concurrency assumptions. Suggested-by: Jan Kara <jack@suse.com> Signed-off-by: Li Chen <me@linux.beauty> --- fs/ext4/inode.c | 6 +++...
{ "author": "Li Chen <me@linux.beauty>", "date": "Fri, 30 Jan 2026 11:12:31 +0800", "thread_id": "jvo5sk46f6cvqmkgetrlybs46kryhxetsvapkmx4tocbdirk3w@ume4qfpsddco.mbox.gz" }
lkml
[PATCH 0/3] jbd2/ext4/ocfs2: READ_ONCE for lockless jinode reads
This series adds READ_ONCE() for existing lockless reads of jbd2_inode fields in jbd2 and filesystem callbacks used by ext4 and ocfs2. This is based on Jan's suggestion in the review of the ext4 jinode publication race fix. [1] [1]: https://lore.kernel.org/all/4jxwogttddiaoqbstlgou5ox6zs27ngjjz5ukrxafm2z5ijxod@so4eqn...
ocfs2 journal commit callback reads jbd2_inode dirty range fields without holding journal->j_list_lock. Use READ_ONCE() for these reads to correct the concurrency assumptions. Suggested-by: Jan Kara <jack@suse.com> Signed-off-by: Li Chen <me@linux.beauty> --- fs/ocfs2/journal.c | 7 +++++-- 1 file changed, 5 inserti...
{ "author": "Li Chen <me@linux.beauty>", "date": "Fri, 30 Jan 2026 11:12:32 +0800", "thread_id": "jvo5sk46f6cvqmkgetrlybs46kryhxetsvapkmx4tocbdirk3w@ume4qfpsddco.mbox.gz" }
lkml
[PATCH 0/3] jbd2/ext4/ocfs2: READ_ONCE for lockless jinode reads
This series adds READ_ONCE() for existing lockless reads of jbd2_inode fields in jbd2 and filesystem callbacks used by ext4 and ocfs2. This is based on Jan's suggestion in the review of the ext4 jinode publication race fix. [1] [1]: https://lore.kernel.org/all/4jxwogttddiaoqbstlgou5ox6zs27ngjjz5ukrxafm2z5ijxod@so4eqn...
On Fri, Jan 30, 2026 at 11:12:32AM +0800, Li Chen wrote: I don't think this is the right solution to the problem. If it is, there needs to be much better argumentation in the commit message. As I understand it, jbd2_journal_file_inode() initialises jinode, then adds it to the t_inode_list, then drops the j_list_lock...
{ "author": "Matthew Wilcox <willy@infradead.org>", "date": "Fri, 30 Jan 2026 05:27:59 +0000", "thread_id": "jvo5sk46f6cvqmkgetrlybs46kryhxetsvapkmx4tocbdirk3w@ume4qfpsddco.mbox.gz" }
lkml
[PATCH 0/3] jbd2/ext4/ocfs2: READ_ONCE for lockless jinode reads
This series adds READ_ONCE() for existing lockless reads of jbd2_inode fields in jbd2 and filesystem callbacks used by ext4 and ocfs2. This is based on Jan's suggestion in the review of the ext4 jinode publication race fix. [1] [1]: https://lore.kernel.org/all/4jxwogttddiaoqbstlgou5ox6zs27ngjjz5ukrxafm2z5ijxod@so4eqn...
Hi Matthew, > On Fri, Jan 30, 2026 at 11:12:32AM +0800, Li Chen wrote: > > ocfs2 journal commit callback reads jbd2_inode dirty range fields without > > holding journal->j_list_lock. > > > > Use READ_ONCE() for these reads to correct the concurrency assumptions. > > I don't think this is the right solution to...
{ "author": "Li Chen <me@linux.beauty>", "date": "Fri, 30 Jan 2026 20:26:40 +0800", "thread_id": "jvo5sk46f6cvqmkgetrlybs46kryhxetsvapkmx4tocbdirk3w@ume4qfpsddco.mbox.gz" }
lkml
[PATCH 0/3] jbd2/ext4/ocfs2: READ_ONCE for lockless jinode reads
This series adds READ_ONCE() for existing lockless reads of jbd2_inode fields in jbd2 and filesystem callbacks used by ext4 and ocfs2. This is based on Jan's suggestion in the review of the ext4 jinode publication race fix. [1] [1]: https://lore.kernel.org/all/4jxwogttddiaoqbstlgou5ox6zs27ngjjz5ukrxafm2z5ijxod@so4eqn...
On Fri, Jan 30, 2026 at 08:26:40PM +0800, Li Chen wrote: I think that's the only issue that exists ... I don't think that's true. I think what you're asserting is that: int *pi; int **ppi; spin_lock(&lock); *pi = 1; *ppi = pi; spin_unlock(&lock); that the store to *pi must be observed before the store to *...
{ "author": "Matthew Wilcox <willy@infradead.org>", "date": "Fri, 30 Jan 2026 16:36:28 +0000", "thread_id": "jvo5sk46f6cvqmkgetrlybs46kryhxetsvapkmx4tocbdirk3w@ume4qfpsddco.mbox.gz" }
lkml
[PATCH 0/3] jbd2/ext4/ocfs2: READ_ONCE for lockless jinode reads
This series adds READ_ONCE() for existing lockless reads of jbd2_inode fields in jbd2 and filesystem callbacks used by ext4 and ocfs2. This is based on Jan's suggestion in the review of the ext4 jinode publication race fix. [1] [1]: https://lore.kernel.org/all/4jxwogttddiaoqbstlgou5ox6zs27ngjjz5ukrxafm2z5ijxod@so4eqn...
Hi Matthew, Thank you very much for the detailed explanation and for your patience. On Sat, 31 Jan 2026 00:36:28 +0800, Matthew Wilcox wrote: Understood. Yes, agreed $B!=(B thank you. I was implicitly assuming the reader had taken the same lock at some point, which is not a valid assumption for a lockless reader...
{ "author": "Li Chen <me@linux.beauty>", "date": "Sun, 01 Feb 2026 12:37:36 +0800", "thread_id": "jvo5sk46f6cvqmkgetrlybs46kryhxetsvapkmx4tocbdirk3w@ume4qfpsddco.mbox.gz" }
lkml
[PATCH 0/3] jbd2/ext4/ocfs2: READ_ONCE for lockless jinode reads
This series adds READ_ONCE() for existing lockless reads of jbd2_inode fields in jbd2 and filesystem callbacks used by ext4 and ocfs2. This is based on Jan's suggestion in the review of the ext4 jinode publication race fix. [1] [1]: https://lore.kernel.org/all/4jxwogttddiaoqbstlgou5ox6zs27ngjjz5ukrxafm2z5ijxod@so4eqn...
On Fri 30-01-26 11:12:30, Li Chen wrote: Just one nit below. With that fixed feel free to add: Reviewed-by: Jan Kara <jack@suse.cz> i_vfs_inode never changes so READ_ONCE is pointless here. Honza -- Jan Kara <jack@suse.com> SUSE Labs, CR
{ "author": "Jan Kara <jack@suse.cz>", "date": "Mon, 2 Feb 2026 17:40:45 +0100", "thread_id": "jvo5sk46f6cvqmkgetrlybs46kryhxetsvapkmx4tocbdirk3w@ume4qfpsddco.mbox.gz" }
lkml
[PATCH 0/3] jbd2/ext4/ocfs2: READ_ONCE for lockless jinode reads
This series adds READ_ONCE() for existing lockless reads of jbd2_inode fields in jbd2 and filesystem callbacks used by ext4 and ocfs2. This is based on Jan's suggestion in the review of the ext4 jinode publication race fix. [1] [1]: https://lore.kernel.org/all/4jxwogttddiaoqbstlgou5ox6zs27ngjjz5ukrxafm2z5ijxod@so4eqn...
On Fri 30-01-26 11:12:31, Li Chen wrote: Looks good. Feel free to add: Reviewed-by: Jan Kara <jack@suse.cz> Honza -- Jan Kara <jack@suse.com> SUSE Labs, CR
{ "author": "Jan Kara <jack@suse.cz>", "date": "Mon, 2 Feb 2026 17:41:39 +0100", "thread_id": "jvo5sk46f6cvqmkgetrlybs46kryhxetsvapkmx4tocbdirk3w@ume4qfpsddco.mbox.gz" }
lkml
[PATCH 0/3] jbd2/ext4/ocfs2: READ_ONCE for lockless jinode reads
This series adds READ_ONCE() for existing lockless reads of jbd2_inode fields in jbd2 and filesystem callbacks used by ext4 and ocfs2. This is based on Jan's suggestion in the review of the ext4 jinode publication race fix. [1] [1]: https://lore.kernel.org/all/4jxwogttddiaoqbstlgou5ox6zs27ngjjz5ukrxafm2z5ijxod@so4eqn...
On Mon 02-02-26 17:40:45, Jan Kara wrote: One more note: I've realized that for this to work you also need to make jbd2_journal_file_inode() use WRITE_ONCE() when updating i_dirty_start, i_dirty_end and i_flags. Honza -- Jan Kara <jack@suse.com> SUSE Labs, CR
{ "author": "Jan Kara <jack@suse.cz>", "date": "Mon, 2 Feb 2026 17:52:30 +0100", "thread_id": "jvo5sk46f6cvqmkgetrlybs46kryhxetsvapkmx4tocbdirk3w@ume4qfpsddco.mbox.gz" }
lkml
[PATCH 0/3] jbd2/ext4/ocfs2: READ_ONCE for lockless jinode reads
This series adds READ_ONCE() for existing lockless reads of jbd2_inode fields in jbd2 and filesystem callbacks used by ext4 and ocfs2. This is based on Jan's suggestion in the review of the ext4 jinode publication race fix. [1] [1]: https://lore.kernel.org/all/4jxwogttddiaoqbstlgou5ox6zs27ngjjz5ukrxafm2z5ijxod@so4eqn...
On Fri 30-01-26 16:36:28, Matthew Wilcox wrote: Well, the above reasonably accurately describes the code making jinode visible. The reader code is like: spin_lock(&lock); pi = *ppi; spin_unlock(&lock); work with pi so it is guaranteed to see pi properly initialized. The problem is that "work with pi" can...
{ "author": "Jan Kara <jack@suse.cz>", "date": "Mon, 2 Feb 2026 18:17:49 +0100", "thread_id": "jvo5sk46f6cvqmkgetrlybs46kryhxetsvapkmx4tocbdirk3w@ume4qfpsddco.mbox.gz" }
lkml
[PATCH 0/2] Fix port enumeration failure and NULL endpoint issue
I ran CXL mock testing with next branch, I usually hit the following call trace. Oops: general protection fault, probably for non-canonical address 0xdffffc0000000092: 0000 [#1] SMP KASAN NOPTI KASAN: null-ptr-deref in range [0x0000000000000490-0x0000000000000497] CPU: 3 UID: 0 PID: 42 Comm: kworker/u16:1 Tainted: ...
CXL testing environment can trigger following trace Oops: general protection fault, probably for non-canonical address 0xdffffc0000000092: 0000 [#1] SMP KASAN NOPTI KASAN: null-ptr-deref in range [0x0000000000000490-0x0000000000000497] RIP: 0010:cxl_dpa_to_region+0x105/0x1f0 [cxl_core] Call Trace: <TASK> cxl_e...
{ "author": "Li Ming <ming.li@zohomail.com>", "date": "Sun, 1 Feb 2026 17:30:01 +0800", "thread_id": "20260201093002.1281858-1-ming.li@zohomail.com.mbox.gz" }
lkml
[PATCH 0/2] Fix port enumeration failure and NULL endpoint issue
I ran CXL mock testing with next branch, I usually hit the following call trace. Oops: general protection fault, probably for non-canonical address 0xdffffc0000000092: 0000 [#1] SMP KASAN NOPTI KASAN: null-ptr-deref in range [0x0000000000000490-0x0000000000000497] CPU: 3 UID: 0 PID: 42 Comm: kworker/u16:1 Tainted: ...
When CXL subsystem adds a cxl port to a hierarchy, there is a small window where the new port becomes visible before it is bound to a driver. This happens because device_add() adds a device to bus device list before bus_probe_device() binds it to a driver. So if two cxl memdevs are trying to add a dport to a same port ...
{ "author": "Li Ming <ming.li@zohomail.com>", "date": "Sun, 1 Feb 2026 17:30:02 +0800", "thread_id": "20260201093002.1281858-1-ming.li@zohomail.com.mbox.gz" }
lkml
[PATCH 0/2] Fix port enumeration failure and NULL endpoint issue
I ran CXL mock testing with next branch, I usually hit the following call trace. Oops: general protection fault, probably for non-canonical address 0xdffffc0000000092: 0000 [#1] SMP KASAN NOPTI KASAN: null-ptr-deref in range [0x0000000000000490-0x0000000000000497] CPU: 3 UID: 0 PID: 42 Comm: kworker/u16:1 Tainted: ...
On Sun, 1 Feb 2026 17:30:01 +0800 Li Ming <ming.li@zohomail.com> wrote: I had a look at whether it made sense to use use IS_ERR_OR_NULL() to check for validity of the endpoint, but it would be somewhat fiddly and I think you are correct that convention here seems to be NULL means not set. We don't need the error cod...
{ "author": "Jonathan Cameron <jonathan.cameron@huawei.com>", "date": "Mon, 2 Feb 2026 14:41:03 +0000", "thread_id": "20260201093002.1281858-1-ming.li@zohomail.com.mbox.gz" }
lkml
[PATCH 0/2] Fix port enumeration failure and NULL endpoint issue
I ran CXL mock testing with next branch, I usually hit the following call trace. Oops: general protection fault, probably for non-canonical address 0xdffffc0000000092: 0000 [#1] SMP KASAN NOPTI KASAN: null-ptr-deref in range [0x0000000000000490-0x0000000000000497] CPU: 3 UID: 0 PID: 42 Comm: kworker/u16:1 Tainted: ...
On Sun, 1 Feb 2026 17:30:02 +0800 Li Ming <ming.li@zohomail.com> wrote: Indenting not consistent here as this call is in devm_cxl_enumerate_ports() Spell check. Guarantees Analysis looks reasonable to me, but I'm not hugely confident on this one so would like others to take a close look as well. Question inline....
{ "author": "Jonathan Cameron <jonathan.cameron@huawei.com>", "date": "Mon, 2 Feb 2026 15:39:24 +0000", "thread_id": "20260201093002.1281858-1-ming.li@zohomail.com.mbox.gz" }
lkml
[PATCH 0/2] Fix port enumeration failure and NULL endpoint issue
I ran CXL mock testing with next branch, I usually hit the following call trace. Oops: general protection fault, probably for non-canonical address 0xdffffc0000000092: 0000 [#1] SMP KASAN NOPTI KASAN: null-ptr-deref in range [0x0000000000000490-0x0000000000000497] CPU: 3 UID: 0 PID: 42 Comm: kworker/u16:1 Tainted: ...
On Mon, Feb 02, 2026 at 02:41:03PM +0000, Jonathan Cameron wrote: doing validity checks on pointers by checking for null is a pretty common convention kernel-wide, I would consider setting some structure's value to an ERR_PTR to be the aberration. So yeah, good catch Reviewed-by: Gregory Price <gourry@gourry.net> ~...
{ "author": "Gregory Price <gourry@gourry.net>", "date": "Mon, 2 Feb 2026 10:48:14 -0500", "thread_id": "20260201093002.1281858-1-ming.li@zohomail.com.mbox.gz" }
lkml
[PATCH 0/2] Fix port enumeration failure and NULL endpoint issue
I ran CXL mock testing with next branch, I usually hit the following call trace. Oops: general protection fault, probably for non-canonical address 0xdffffc0000000092: 0000 [#1] SMP KASAN NOPTI KASAN: null-ptr-deref in range [0x0000000000000490-0x0000000000000497] CPU: 3 UID: 0 PID: 42 Comm: kworker/u16:1 Tainted: ...
On Sun, Feb 01, 2026 at 05:30:02PM +0800, Li Ming wrote: With just a a cursory look, I'm immediately concerned that you're fixing a race condition with a lock inversion. Can you guarantee the following is not happening Thread A Thread B ---------------------------- lock(parent) lock(port) lock(po...
{ "author": "Gregory Price <gourry@gourry.net>", "date": "Mon, 2 Feb 2026 11:31:45 -0500", "thread_id": "20260201093002.1281858-1-ming.li@zohomail.com.mbox.gz" }
lkml
[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
Modify online_memory_block() to accept the online type through its arg parameter rather than calling mhp_get_default_online_type() internally. This prepares for allowing callers to specify explicit online types. Update the caller in add_memory_resource() to pass the default online type via a local variable. No functi...
{ "author": "Gregory Price <gourry@gourry.net>", "date": "Thu, 29 Jan 2026 16:04:34 -0500", "thread_id": "20260202175640.00003ef5@huawei.com.mbox.gz" }
lkml
[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
Enable dax kmem driver to select how to online the memory rather than implicitly depending on the system default. This will allow users of dax to plumb through a preferred auto-online policy for their region. Refactor and new interface: Add __add_memory_driver_managed() which accepts an explicit online_type and expor...
{ "author": "Gregory Price <gourry@gourry.net>", "date": "Thu, 29 Jan 2026 16:04:35 -0500", "thread_id": "20260202175640.00003ef5@huawei.com.mbox.gz" }
lkml
[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
There is no way for drivers leveraging dax_kmem to plumb through a preferred auto-online policy - the system default policy is forced. Add online_type field to DAX device creation path to allow drivers to specify an auto-online policy when using the kmem driver. Current callers initialize online_type to mhp_get_defau...
{ "author": "Gregory Price <gourry@gourry.net>", "date": "Thu, 29 Jan 2026 16:04:36 -0500", "thread_id": "20260202175640.00003ef5@huawei.com.mbox.gz" }
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[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
Move the pmem region driver logic from region.c into pmem_region.c. No functional changes. Signed-off-by: Gregory Price <gourry@gourry.net> --- drivers/cxl/core/Makefile | 1 + drivers/cxl/core/core.h | 1 + drivers/cxl/core/pmem_region.c | 191 +++++++++++++++++++++++++++++++++ drivers/cxl/core/regi...
{ "author": "Gregory Price <gourry@gourry.net>", "date": "Thu, 29 Jan 2026 16:04:38 -0500", "thread_id": "20260202175640.00003ef5@huawei.com.mbox.gz" }
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[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
Move the CXL DAX region device infrastructure from region.c into a new dax_region.c file. No functional changes. Signed-off-by: Gregory Price <gourry@gourry.net> --- drivers/cxl/core/Makefile | 1 + drivers/cxl/core/core.h | 1 + drivers/cxl/core/dax_region.c | 113 ++++++++++++++++++++++++++++++++++ d...
{ "author": "Gregory Price <gourry@gourry.net>", "date": "Thu, 29 Jan 2026 16:04:39 -0500", "thread_id": "20260202175640.00003ef5@huawei.com.mbox.gz" }
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[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
Add a new cxl_devdax_region driver that probes CXL regions in device dax mode and creates dax_region devices. This allows explicit binding to the device_dax dax driver instead of the kmem driver. Exports to_cxl_region() to core.h so it can be used by the driver. Signed-off-by: Gregory Price <gourry@gourry.net> --- d...
{ "author": "Gregory Price <gourry@gourry.net>", "date": "Thu, 29 Jan 2026 16:04:40 -0500", "thread_id": "20260202175640.00003ef5@huawei.com.mbox.gz" }
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[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
CXL regions may wish not to auto-configure their memory as dax kmem, but the current plumbing defaults all cxl-created dax devices to the kmem driver. This exposes them to hotplug policy, even if the user intends to use the memory as a dax device. Add plumbing to allow CXL drivers to select whether a DAX region shoul...
{ "author": "Gregory Price <gourry@gourry.net>", "date": "Thu, 29 Jan 2026 16:04:37 -0500", "thread_id": "20260202175640.00003ef5@huawei.com.mbox.gz" }
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[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
Explain the binding process for sysram and daxdev regions which are explicit about which dax driver to use during region creation. Jonathan Corbet <corbet@lwn.net> Signed-off-by: Gregory Price <gourry@gourry.net> --- .../driver-api/cxl/linux/cxl-driver.rst | 43 +++++++++++++++++++ .../driver-api/cxl/linux/dax...
{ "author": "Gregory Price <gourry@gourry.net>", "date": "Thu, 29 Jan 2026 16:04:42 -0500", "thread_id": "20260202175640.00003ef5@huawei.com.mbox.gz" }
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[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
In the current kmem driver binding process, the only way for users to define hotplug policy is via a build-time option, or by not onlining memory by default and setting each individual memory block online after hotplug occurs. We can solve this with a configuration step between region-probe and dax-probe. Add the inf...
{ "author": "Gregory Price <gourry@gourry.net>", "date": "Thu, 29 Jan 2026 16:04:41 -0500", "thread_id": "20260202175640.00003ef5@huawei.com.mbox.gz" }
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[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
Annoyingly, my email client has been truncating my titles: cxl: explicit DAX driver selection and hotplug policy for CXL regions ~Gregory
{ "author": "Gregory Price <gourry@gourry.net>", "date": "Thu, 29 Jan 2026 16:17:55 -0500", "thread_id": "20260202175640.00003ef5@huawei.com.mbox.gz" }
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[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
On Thu, Jan 29, 2026 at 04:04:33PM -0500, Gregory Price wrote: Looks like build regression on configs without hotplug MMOP_ defines and mhp_get_default_online_type() undefined Will let this version sit for a bit before spinning a v2 ~Gregory
{ "author": "Gregory Price <gourry@gourry.net>", "date": "Fri, 30 Jan 2026 12:34:33 -0500", "thread_id": "20260202175640.00003ef5@huawei.com.mbox.gz" }
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[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
On 1/29/2026 3:04 PM, Gregory Price wrote: This technically comes up in the devdax_region driver patch first, but I noticed it here so this is where I'm putting it: I like the idea here, but the implementation is all off. Firstly, devm_cxl_add_sysram_region() is never called outside of sysram_region_driver::probe(), ...
{ "author": "\"Cheatham, Benjamin\" <benjamin.cheatham@amd.com>", "date": "Fri, 30 Jan 2026 15:27:12 -0600", "thread_id": "20260202175640.00003ef5@huawei.com.mbox.gz" }
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[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
On Fri, Jan 30, 2026 at 03:27:12PM -0600, Cheatham, Benjamin wrote: I originally tried doing with region0/region_driver, but that design pattern is also confusing - and it creates differently bad patterns. echo region0 > decoder0.0/create_ram_region -> creates region0 # Current pattern echo region > dr...
{ "author": "Gregory Price <gourry@gourry.net>", "date": "Fri, 30 Jan 2026 17:12:50 -0500", "thread_id": "20260202175640.00003ef5@huawei.com.mbox.gz" }
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[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
On 1/30/2026 4:12 PM, Gregory Price wrote: Ok, that makes sense. I think I just got lost in the sauce while looking at this last week and this explanation helped a lot.> I think this was the source of my misunderstanding. I was trying to understand how it works for auto regions when it's never meant to apply to them...
{ "author": "\"Cheatham, Benjamin\" <benjamin.cheatham@amd.com>", "date": "Mon, 2 Feb 2026 11:02:37 -0600", "thread_id": "20260202175640.00003ef5@huawei.com.mbox.gz" }
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[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
On Thu, 29 Jan 2026 16:04:34 -0500 Gregory Price <gourry@gourry.net> wrote: Trivial comment inline. I don't really care either way. Pushing the policy up to the caller and ensuring it's explicitly constant for all the memory blocks (as opposed to relying on locks) seems sensible to me even without anything else. Rev...
{ "author": "Jonathan Cameron <jonathan.cameron@huawei.com>", "date": "Mon, 2 Feb 2026 17:10:29 +0000", "thread_id": "20260202175640.00003ef5@huawei.com.mbox.gz" }
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[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
On Thu, 29 Jan 2026 16:04:35 -0500 Gregory Price <gourry@gourry.net> wrote: Hi Gregory, I think maybe I'd have left the export for the first user outside of memory_hotplug.c. Not particularly important however. Maybe talk about why a caller of __add_memory_driver_managed() might want the default? Feels like that's...
{ "author": "Jonathan Cameron <jonathan.cameron@huawei.com>", "date": "Mon, 2 Feb 2026 17:25:24 +0000", "thread_id": "20260202175640.00003ef5@huawei.com.mbox.gz" }
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[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
On Mon, Feb 02, 2026 at 11:02:37AM -0600, Cheatham, Benjamin wrote: Auto regions explicitly use the dax_kmem path (all existing code, unchanged)- which auto-plugs into dax/hotplug. I do get what you're saying that everything binds on a region type, I will look a little closer at this and see if there's something more...
{ "author": "Gregory Price <gourry@gourry.net>", "date": "Mon, 2 Feb 2026 12:41:31 -0500", "thread_id": "20260202175640.00003ef5@huawei.com.mbox.gz" }
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[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
On Mon, Feb 02, 2026 at 05:10:29PM +0000, Jonathan Cameron wrote: ack. will update for next version w/ Ben's notes and the build fix. Thanks! ~Gregory
{ "author": "Gregory Price <gourry@gourry.net>", "date": "Mon, 2 Feb 2026 12:46:25 -0500", "thread_id": "20260202175640.00003ef5@huawei.com.mbox.gz" }
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[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
On Thu, 29 Jan 2026 16:04:37 -0500 Gregory Price <gourry@gourry.net> wrote: LGTM Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
{ "author": "Jonathan Cameron <jonathan.cameron@huawei.com>", "date": "Mon, 2 Feb 2026 17:54:17 +0000", "thread_id": "20260202175640.00003ef5@huawei.com.mbox.gz" }
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[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
On Thu, 29 Jan 2026 16:04:38 -0500 Gregory Price <gourry@gourry.net> wrote: Needs to answer the question: Why? Minor stuff inline. Maybe sneak in dropping that trailing comma whilst you are moving it. ... Bonus line...
{ "author": "Jonathan Cameron <jonathan.cameron@huawei.com>", "date": "Mon, 2 Feb 2026 17:56:40 +0000", "thread_id": "20260202175640.00003ef5@huawei.com.mbox.gz" }
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[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
On Thu, 29 Jan 2026 16:04:39 -0500 Gregory Price <gourry@gourry.net> wrote: Likewise. Why?
{ "author": "Jonathan Cameron <jonathan.cameron@huawei.com>", "date": "Mon, 2 Feb 2026 17:57:11 +0000", "thread_id": "20260202175640.00003ef5@huawei.com.mbox.gz" }
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[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
On Mon, Feb 02, 2026 at 05:25:24PM +0000, Jonathan Cameron wrote: Less about why they want the default, more about maintaining backward compatibility. In the cxl driver, Ben pointed out something that made me realize we can change `region/bind()` to actually use the new `sysram/bind` path by just adding a one line `s...
{ "author": "Gregory Price <gourry@gourry.net>", "date": "Mon, 2 Feb 2026 13:02:10 -0500", "thread_id": "20260202175640.00003ef5@huawei.com.mbox.gz" }
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[PATCH 0/9] cxl: explicit DAX driver selection and hotplug
Currently, CXL regions that create DAX devices have no mechanism to control select the hotplug online policy for kmem regions at region creation time. Users must either rely on a build-time default or manually configure each memory block after hotplug occurs. Additionally, there is no explicit way to choose between de...
On Thu, 29 Jan 2026 16:04:41 -0500 Gregory Price <gourry@gourry.net> wrote: ZONE_MOVABLE Trivial stuff. Will mull over this series as a whole... My first instinctive reaction is positive - I'm just wondering where additional drivers fit into this and whether it has the right degree of flexibility. This smells li...
{ "author": "Jonathan Cameron <jonathan.cameron@huawei.com>", "date": "Mon, 2 Feb 2026 18:20:15 +0000", "thread_id": "20260202175640.00003ef5@huawei.com.mbox.gz" }
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[PATCH] Cleanup ipu3 driver
Clean up warnings generated by ./scripts/checkpatch.pl regarding the ipu3 driver at /drivers/staging/media/ipu3 More specifically, the following files have been affected: ipu3-css.c, ipu3-mmu.c, ipu3-mmu.h, ipu3-v4l2.c, ipu3.c, ipu3.h Signed-off-by: Bogdan Sandu <bogdanelsandu2011@gmail.com> --- drivers/staging/medi...
On Mon, Feb 02, 2026 at 12:03:11PM +0200, Bogdan Sandu wrote: Was this an AI generated patch? Either way, it needs to be properly broken up into "one logical change per patch" like all others. thanks, greg k-h
{ "author": "Greg KH <gregkh@linuxfoundation.org>", "date": "Mon, 2 Feb 2026 11:14:26 +0100", "thread_id": "20260202175033.8640-2-bogdanelsandu2011@gmail.com.mbox.gz" }
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[PATCH] Cleanup ipu3 driver
Clean up warnings generated by ./scripts/checkpatch.pl regarding the ipu3 driver at /drivers/staging/media/ipu3 More specifically, the following files have been affected: ipu3-css.c, ipu3-mmu.c, ipu3-mmu.h, ipu3-v4l2.c, ipu3.c, ipu3.h Signed-off-by: Bogdan Sandu <bogdanelsandu2011@gmail.com> --- drivers/staging/medi...
I can assure you, it is not AI-generated. per patch" like all others. Understood. I'll resend it afterwards. Thank you for your patience.
{ "author": "Bogdan Sandu <bogdanelsandu2011@gmail.com>", "date": "Mon, 2 Feb 2026 12:18:43 +0200", "thread_id": "20260202175033.8640-2-bogdanelsandu2011@gmail.com.mbox.gz" }
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[PATCH] Cleanup ipu3 driver
Clean up warnings generated by ./scripts/checkpatch.pl regarding the ipu3 driver at /drivers/staging/media/ipu3 More specifically, the following files have been affected: ipu3-css.c, ipu3-mmu.c, ipu3-mmu.h, ipu3-v4l2.c, ipu3.c, ipu3.h Signed-off-by: Bogdan Sandu <bogdanelsandu2011@gmail.com> --- drivers/staging/medi...
Clean up warnings generated by ./scripts/checkpatch.pl regarding the ipu3 driver at /drivers/staging/media/ipu3 More specifically, the following files have been affected: ipu3-css.c, ipu3-mmu.c, ipu3-mmu.h, ipu3-v4l2.c, ipu3.c, ipu3.h Signed-off-by: Bogdan Sandu <bogdanelsandu2011@gmail.com> --- drivers/staging/medi...
{ "author": "Bogdan Sandu <bogdanelsandu2011@gmail.com>", "date": "Mon, 2 Feb 2026 12:18:44 +0200", "thread_id": "20260202175033.8640-2-bogdanelsandu2011@gmail.com.mbox.gz" }
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[PATCH] Cleanup ipu3 driver
Clean up warnings generated by ./scripts/checkpatch.pl regarding the ipu3 driver at /drivers/staging/media/ipu3 More specifically, the following files have been affected: ipu3-css.c, ipu3-mmu.c, ipu3-mmu.h, ipu3-v4l2.c, ipu3.c, ipu3.h Signed-off-by: Bogdan Sandu <bogdanelsandu2011@gmail.com> --- drivers/staging/medi...
On Mon, Feb 02, 2026 at 12:18:44PM +0200, Bogdan Sandu wrote: You resent the same thing again? confused, greg k-h
{ "author": "Greg KH <gregkh@linuxfoundation.org>", "date": "Mon, 2 Feb 2026 11:32:15 +0100", "thread_id": "20260202175033.8640-2-bogdanelsandu2011@gmail.com.mbox.gz" }
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[PATCH] Cleanup ipu3 driver
Clean up warnings generated by ./scripts/checkpatch.pl regarding the ipu3 driver at /drivers/staging/media/ipu3 More specifically, the following files have been affected: ipu3-css.c, ipu3-mmu.c, ipu3-mmu.h, ipu3-v4l2.c, ipu3.c, ipu3.h Signed-off-by: Bogdan Sandu <bogdanelsandu2011@gmail.com> --- drivers/staging/medi...
The previous patch has now been separated into four smaller ones, each one fixing a specific type of checkpatch.pl issue. Bogdan Sandu (4): media: ipu3: fix alignment media: ipu3: use tabs media: ipu3: avoid ending lines with paranthesis media: ipu3: use BIT() drivers/staging/media/ipu3/ipu3-css.c | 39 ++++...
{ "author": "Bogdan Sandu <bogdanelsandu2011@gmail.com>", "date": "Mon, 2 Feb 2026 19:50:29 +0200", "thread_id": "20260202175033.8640-2-bogdanelsandu2011@gmail.com.mbox.gz" }
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[PATCH] Cleanup ipu3 driver
Clean up warnings generated by ./scripts/checkpatch.pl regarding the ipu3 driver at /drivers/staging/media/ipu3 More specifically, the following files have been affected: ipu3-css.c, ipu3-mmu.c, ipu3-mmu.h, ipu3-v4l2.c, ipu3.c, ipu3.h Signed-off-by: Bogdan Sandu <bogdanelsandu2011@gmail.com> --- drivers/staging/medi...
Fix alignment with parentheses. Signed-off-by: Bogdan Sandu <bogdanelsandu2011@gmail.com> --- drivers/staging/media/ipu3/ipu3-css.c | 22 +++++++++++----------- drivers/staging/media/ipu3/ipu3-v4l2.c | 11 +++++------ drivers/staging/media/ipu3/ipu3.c | 4 ++-- 3 files changed, 18 insertions(+), 19 deletions(-...
{ "author": "Bogdan Sandu <bogdanelsandu2011@gmail.com>", "date": "Mon, 2 Feb 2026 19:50:30 +0200", "thread_id": "20260202175033.8640-2-bogdanelsandu2011@gmail.com.mbox.gz" }
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[PATCH] Cleanup ipu3 driver
Clean up warnings generated by ./scripts/checkpatch.pl regarding the ipu3 driver at /drivers/staging/media/ipu3 More specifically, the following files have been affected: ipu3-css.c, ipu3-mmu.c, ipu3-mmu.h, ipu3-v4l2.c, ipu3.c, ipu3.h Signed-off-by: Bogdan Sandu <bogdanelsandu2011@gmail.com> --- drivers/staging/medi...
Use tabs instead of spaces. Signed-off-by: Bogdan Sandu <bogdanelsandu2011@gmail.com> --- drivers/staging/media/ipu3/ipu3-css.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/staging/media/ipu3/ipu3-css.c b/drivers/staging/media/ipu3/ipu3-css.c index 145501e90..e990eb5b3 100644 --- a/...
{ "author": "Bogdan Sandu <bogdanelsandu2011@gmail.com>", "date": "Mon, 2 Feb 2026 19:50:31 +0200", "thread_id": "20260202175033.8640-2-bogdanelsandu2011@gmail.com.mbox.gz" }
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[PATCH] Cleanup ipu3 driver
Clean up warnings generated by ./scripts/checkpatch.pl regarding the ipu3 driver at /drivers/staging/media/ipu3 More specifically, the following files have been affected: ipu3-css.c, ipu3-mmu.c, ipu3-mmu.h, ipu3-v4l2.c, ipu3.c, ipu3.h Signed-off-by: Bogdan Sandu <bogdanelsandu2011@gmail.com> --- drivers/staging/medi...
Don't end line with paranthesis. Signed-off-by: Bogdan Sandu <bogdanelsandu2011@gmail.com> --- drivers/staging/media/ipu3/ipu3-css.c | 13 +++++-------- drivers/staging/media/ipu3/ipu3.c | 3 +-- 2 files changed, 6 insertions(+), 10 deletions(-) diff --git a/drivers/staging/media/ipu3/ipu3-css.c b/drivers/stagi...
{ "author": "Bogdan Sandu <bogdanelsandu2011@gmail.com>", "date": "Mon, 2 Feb 2026 19:50:32 +0200", "thread_id": "20260202175033.8640-2-bogdanelsandu2011@gmail.com.mbox.gz" }
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[PATCH] Cleanup ipu3 driver
Clean up warnings generated by ./scripts/checkpatch.pl regarding the ipu3 driver at /drivers/staging/media/ipu3 More specifically, the following files have been affected: ipu3-css.c, ipu3-mmu.c, ipu3-mmu.h, ipu3-v4l2.c, ipu3.c, ipu3.h Signed-off-by: Bogdan Sandu <bogdanelsandu2011@gmail.com> --- drivers/staging/medi...
Prefer BIT() macro over manual bitshift. Signed-off-by: Bogdan Sandu <bogdanelsandu2011@gmail.com> --- drivers/staging/media/ipu3/ipu3-mmu.c | 2 +- drivers/staging/media/ipu3/ipu3-mmu.h | 4 +++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/staging/media/ipu3/ipu3-mmu.c b/drivers/staging/me...
{ "author": "Bogdan Sandu <bogdanelsandu2011@gmail.com>", "date": "Mon, 2 Feb 2026 19:50:33 +0200", "thread_id": "20260202175033.8640-2-bogdanelsandu2011@gmail.com.mbox.gz" }
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[RFC 00/12] mm: PUD (1GB) THP implementation
This is an RFC series to implement 1GB PUD-level THPs, allowing applications to benefit from reduced TLB pressure without requiring hugetlbfs. The patches are based on top of f9b74c13b773b7c7e4920d7bc214ea3d5f37b422 from mm-stable (6.19-rc6). Motivation: Why 1GB THP over hugetlbfs? ====================================...
Extend the mTHP (multi-size THP) statistics infrastructure to support PUD-sized transparent huge pages. The mTHP framework tracks statistics for each supported THP size through per-order counters exposed via sysfs. To add PUD THP support, PUD_ORDER must be included in the set of tracked orders. With this change, PUD ...
{ "author": "Usama Arif <usamaarif642@gmail.com>", "date": "Sun, 1 Feb 2026 16:50:19 -0800", "thread_id": "3561FD10-664D-42AA-8351-DE7D8D49D42E@nvidia.com.mbox.gz" }
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[RFC 00/12] mm: PUD (1GB) THP implementation
This is an RFC series to implement 1GB PUD-level THPs, allowing applications to benefit from reduced TLB pressure without requiring hugetlbfs. The patches are based on top of f9b74c13b773b7c7e4920d7bc214ea3d5f37b422 from mm-stable (6.19-rc6). Motivation: Why 1GB THP over hugetlbfs? ====================================...
For page table management, PUD THPs need to pre-deposit page tables that will be used when the huge page is later split. When a PUD THP is allocated, we cannot know in advance when or why it might need to be split (COW, partial unmap, reclaim), but we need page tables ready for that eventuality. Similar to how PMD THPs...
{ "author": "Usama Arif <usamaarif642@gmail.com>", "date": "Sun, 1 Feb 2026 16:50:18 -0800", "thread_id": "3561FD10-664D-42AA-8351-DE7D8D49D42E@nvidia.com.mbox.gz" }
lkml
[RFC 00/12] mm: PUD (1GB) THP implementation
This is an RFC series to implement 1GB PUD-level THPs, allowing applications to benefit from reduced TLB pressure without requiring hugetlbfs. The patches are based on top of f9b74c13b773b7c7e4920d7bc214ea3d5f37b422 from mm-stable (6.19-rc6). Motivation: Why 1GB THP over hugetlbfs? ====================================...
Implement the split operation that converts a PUD THP mapping into individual PTE mappings. A PUD THP maps 1GB of memory with a single page table entry. When the mapping needs to be broken - for COW, partial unmap, permission changes, or reclaim - it must be split into smaller mappings. Unlike PMD THPs which split int...
{ "author": "Usama Arif <usamaarif642@gmail.com>", "date": "Sun, 1 Feb 2026 16:50:21 -0800", "thread_id": "3561FD10-664D-42AA-8351-DE7D8D49D42E@nvidia.com.mbox.gz" }
lkml
[RFC 00/12] mm: PUD (1GB) THP implementation
This is an RFC series to implement 1GB PUD-level THPs, allowing applications to benefit from reduced TLB pressure without requiring hugetlbfs. The patches are based on top of f9b74c13b773b7c7e4920d7bc214ea3d5f37b422 from mm-stable (6.19-rc6). Motivation: Why 1GB THP over hugetlbfs? ====================================...
Add the page fault handling path for anonymous PUD THPs, following the same design as the existing PMD THP fault handlers. When a process accesses memory in an anonymous VMA that is PUD-aligned and large enough, the fault handler checks if PUD THP is enabled and attempts to allocate a 1GB folio. The allocation uses fo...
{ "author": "Usama Arif <usamaarif642@gmail.com>", "date": "Sun, 1 Feb 2026 16:50:20 -0800", "thread_id": "3561FD10-664D-42AA-8351-DE7D8D49D42E@nvidia.com.mbox.gz" }
lkml
[RFC 00/12] mm: PUD (1GB) THP implementation
This is an RFC series to implement 1GB PUD-level THPs, allowing applications to benefit from reduced TLB pressure without requiring hugetlbfs. The patches are based on top of f9b74c13b773b7c7e4920d7bc214ea3d5f37b422 from mm-stable (6.19-rc6). Motivation: Why 1GB THP over hugetlbfs? ====================================...
Enable the memory reclaim and migration paths to handle PUD THPs correctly by splitting them before proceeding. Memory reclaim needs to unmap pages before they can be reclaimed. For PUD THPs, the unmap path now passes TTU_SPLIT_HUGE_PUD when unmapping PUD-sized folios. This triggers the PUD split during the unmap phas...
{ "author": "Usama Arif <usamaarif642@gmail.com>", "date": "Sun, 1 Feb 2026 16:50:22 -0800", "thread_id": "3561FD10-664D-42AA-8351-DE7D8D49D42E@nvidia.com.mbox.gz" }
lkml
[RFC 00/12] mm: PUD (1GB) THP implementation
This is an RFC series to implement 1GB PUD-level THPs, allowing applications to benefit from reduced TLB pressure without requiring hugetlbfs. The patches are based on top of f9b74c13b773b7c7e4920d7bc214ea3d5f37b422 from mm-stable (6.19-rc6). Motivation: Why 1GB THP over hugetlbfs? ====================================...
Add a test that allocates a PUD THP, forks a child process, and has the child write to the shared memory. This triggers the copy-on-write path which must split the PUD THP. The test verifies that both parent and child see correct data after the split. Signed-off-by: Usama Arif <usamaarif642@gmail.com> --- tools/testi...
{ "author": "Usama Arif <usamaarif642@gmail.com>", "date": "Sun, 1 Feb 2026 16:50:25 -0800", "thread_id": "3561FD10-664D-42AA-8351-DE7D8D49D42E@nvidia.com.mbox.gz" }
lkml
[RFC 00/12] mm: PUD (1GB) THP implementation
This is an RFC series to implement 1GB PUD-level THPs, allowing applications to benefit from reduced TLB pressure without requiring hugetlbfs. The patches are based on top of f9b74c13b773b7c7e4920d7bc214ea3d5f37b422 from mm-stable (6.19-rc6). Motivation: Why 1GB THP over hugetlbfs? ====================================...
Add a selftest for PUD-level THPs (1GB THPs) with test infrastructure and a basic allocation test. The test uses the kselftest harness FIXTURE/TEST_F framework. A shared fixture allocates a 2GB anonymous mapping and computes a PUD-aligned address within it. Helper functions read THP counters from /proc/vmstat and mTHP...
{ "author": "Usama Arif <usamaarif642@gmail.com>", "date": "Sun, 1 Feb 2026 16:50:23 -0800", "thread_id": "3561FD10-664D-42AA-8351-DE7D8D49D42E@nvidia.com.mbox.gz" }
lkml
[RFC 00/12] mm: PUD (1GB) THP implementation
This is an RFC series to implement 1GB PUD-level THPs, allowing applications to benefit from reduced TLB pressure without requiring hugetlbfs. The patches are based on top of f9b74c13b773b7c7e4920d7bc214ea3d5f37b422 from mm-stable (6.19-rc6). Motivation: Why 1GB THP over hugetlbfs? ====================================...
Add a test that changes permissions on a portion of a PUD THP using mprotect. Since different parts now have different permissions, the PUD must be split. The test verifies correct behavior after the permission change. Signed-off-by: Usama Arif <usamaarif642@gmail.com> --- tools/testing/selftests/mm/pud_thp_test.c | ...
{ "author": "Usama Arif <usamaarif642@gmail.com>", "date": "Sun, 1 Feb 2026 16:50:27 -0800", "thread_id": "3561FD10-664D-42AA-8351-DE7D8D49D42E@nvidia.com.mbox.gz" }
lkml
[RFC 00/12] mm: PUD (1GB) THP implementation
This is an RFC series to implement 1GB PUD-level THPs, allowing applications to benefit from reduced TLB pressure without requiring hugetlbfs. The patches are based on top of f9b74c13b773b7c7e4920d7bc214ea3d5f37b422 from mm-stable (6.19-rc6). Motivation: Why 1GB THP over hugetlbfs? ====================================...
Add a test that uses MADV_PAGEOUT to advise the kernel to page out the PUD THP memory. This exercises the reclaim path which must split the PUD THP before reclaiming the individual pages. Signed-off-by: Usama Arif <usamaarif642@gmail.com> --- tools/testing/selftests/mm/pud_thp_test.c | 33 +++++++++++++++++++++++ 1 f...
{ "author": "Usama Arif <usamaarif642@gmail.com>", "date": "Sun, 1 Feb 2026 16:50:28 -0800", "thread_id": "3561FD10-664D-42AA-8351-DE7D8D49D42E@nvidia.com.mbox.gz" }
lkml
[RFC 00/12] mm: PUD (1GB) THP implementation
This is an RFC series to implement 1GB PUD-level THPs, allowing applications to benefit from reduced TLB pressure without requiring hugetlbfs. The patches are based on top of f9b74c13b773b7c7e4920d7bc214ea3d5f37b422 from mm-stable (6.19-rc6). Motivation: Why 1GB THP over hugetlbfs? ====================================...
Add a test that verifies data integrity across a 1GB PUD THP region by writing patterns at page boundaries and reading them back. Signed-off-by: Usama Arif <usamaarif642@gmail.com> --- tools/testing/selftests/mm/pud_thp_test.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/tools/testing/...
{ "author": "Usama Arif <usamaarif642@gmail.com>", "date": "Sun, 1 Feb 2026 16:50:24 -0800", "thread_id": "3561FD10-664D-42AA-8351-DE7D8D49D42E@nvidia.com.mbox.gz" }
lkml
[RFC 00/12] mm: PUD (1GB) THP implementation
This is an RFC series to implement 1GB PUD-level THPs, allowing applications to benefit from reduced TLB pressure without requiring hugetlbfs. The patches are based on top of f9b74c13b773b7c7e4920d7bc214ea3d5f37b422 from mm-stable (6.19-rc6). Motivation: Why 1GB THP over hugetlbfs? ====================================...
Add a test that allocates a PUD THP and unmaps a 2MB region from the middle. Since the PUD can no longer cover the entire region, it must be split. The test verifies that memory before and after the hole remains accessible with correct data. Signed-off-by: Usama Arif <usamaarif642@gmail.com> --- tools/testing/selftes...
{ "author": "Usama Arif <usamaarif642@gmail.com>", "date": "Sun, 1 Feb 2026 16:50:26 -0800", "thread_id": "3561FD10-664D-42AA-8351-DE7D8D49D42E@nvidia.com.mbox.gz" }
lkml
[RFC 00/12] mm: PUD (1GB) THP implementation
This is an RFC series to implement 1GB PUD-level THPs, allowing applications to benefit from reduced TLB pressure without requiring hugetlbfs. The patches are based on top of f9b74c13b773b7c7e4920d7bc214ea3d5f37b422 from mm-stable (6.19-rc6). Motivation: Why 1GB THP over hugetlbfs? ====================================...
Add a test that uses mbind() to change the NUMA memory policy, which triggers migration. The kernel must split PUD THPs before migration since there is no PUD-level migration entry support. The test verifies data integrity after the migration attempt. Signed-off-by: Usama Arif <usamaarif642@gmail.com> --- tools/testi...
{ "author": "Usama Arif <usamaarif642@gmail.com>", "date": "Sun, 1 Feb 2026 16:50:29 -0800", "thread_id": "3561FD10-664D-42AA-8351-DE7D8D49D42E@nvidia.com.mbox.gz" }
lkml
[RFC 00/12] mm: PUD (1GB) THP implementation
This is an RFC series to implement 1GB PUD-level THPs, allowing applications to benefit from reduced TLB pressure without requiring hugetlbfs. The patches are based on top of f9b74c13b773b7c7e4920d7bc214ea3d5f37b422 from mm-stable (6.19-rc6). Motivation: Why 1GB THP over hugetlbfs? ====================================...
On Sun, 2026-02-01 at 16:50 -0800, Usama Arif wrote: To address the obvious objection "but how could we possibly allocate 1GB huge pages while the workload is running?", I am planning to pick up the CMA balancing  patch series (thank you, Frank) and get that in an  upstream ready shape soon. https://lkml.org/2025/9/15...
{ "author": "Rik van Riel <riel@surriel.com>", "date": "Sun, 01 Feb 2026 21:44:12 -0500", "thread_id": "3561FD10-664D-42AA-8351-DE7D8D49D42E@nvidia.com.mbox.gz" }