text stringlengths 1 9.98k | __index_level_0__ int64 0 4.17k |
|---|---|
*/
#define GPIO_PIN33_PAD_DRIVER (BIT(2))
#define GPIO_PIN33_PAD_DRIVER_M (BIT(2))
#define GPIO_PIN33_PAD_DRIVER_V 0x1
#define GPIO_PIN33_PAD_DRIVER_S 2
/* GPIO_PIN33_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
/*description: .*/
#define GPIO_PIN33_SYNC2_BYPASS 0x00000003
#define GPIO_PIN33_SYNC2_BYPA... | 2,056 |
*/
#define GPIO_PIN34_WAKEUP_ENABLE (BIT(10))
#define GPIO_PIN34_WAKEUP_ENABLE_M (BIT(10))
#define GPIO_PIN34_WAKEUP_ENABLE_V 0x1
#define GPIO_PIN34_WAKEUP_ENABLE_S 10
/* GPIO_PIN34_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
/*description: .*/
#define GPIO_PIN34_INT_TYPE 0x00000007
#define GPIO_PIN34_INT... | 2,056 |
*/
#define GPIO_PIN34_SYNC2_BYPASS 0x00000003
#define GPIO_PIN34_SYNC2_BYPASS_M ((GPIO_PIN34_SYNC2_BYPASS_V)<<(GPIO_PIN34_SYNC2_BYPASS_S))
#define GPIO_PIN34_SYNC2_BYPASS_V 0x3
#define GPIO_PIN34_SYNC2_BYPASS_S 0
#define GPIO_PIN35_REG (DR_REG_GPIO_BASE + 0x100)
/* GPIO_PIN35_INT_ENA : R/W ;bitpos:[17:1... | 2,056 |
*/
#define GPIO_PIN35_INT_TYPE 0x00000007
#define GPIO_PIN35_INT_TYPE_M ((GPIO_PIN35_INT_TYPE_V)<<(GPIO_PIN35_INT_TYPE_S))
#define GPIO_PIN35_INT_TYPE_V 0x7
#define GPIO_PIN35_INT_TYPE_S 7
/* GPIO_PIN35_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
/*description: .*/
#define GPIO_PIN35_SYNC1_BYPASS 0x00... | 2,056 |
*/
#define GPIO_PIN36_INT_ENA 0x0000001F
#define GPIO_PIN36_INT_ENA_M ((GPIO_PIN36_INT_ENA_V)<<(GPIO_PIN36_INT_ENA_S))
#define GPIO_PIN36_INT_ENA_V 0x1F
#define GPIO_PIN36_INT_ENA_S 13
/* GPIO_PIN36_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
/*description: .*/
#define GPIO_PIN36_CONFIG 0x00000003
#define... | 2,056 |
*/
#define GPIO_PIN36_SYNC1_BYPASS 0x00000003
#define GPIO_PIN36_SYNC1_BYPASS_M ((GPIO_PIN36_SYNC1_BYPASS_V)<<(GPIO_PIN36_SYNC1_BYPASS_S))
#define GPIO_PIN36_SYNC1_BYPASS_V 0x3
#define GPIO_PIN36_SYNC1_BYPASS_S 3
/* GPIO_PIN36_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
/*description: .*/
#define GPIO_PIN36_... | 2,056 |
*/
#define GPIO_PIN37_CONFIG 0x00000003
#define GPIO_PIN37_CONFIG_M ((GPIO_PIN37_CONFIG_V)<<(GPIO_PIN37_CONFIG_S))
#define GPIO_PIN37_CONFIG_V 0x3
#define GPIO_PIN37_CONFIG_S 11
/* GPIO_PIN37_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
/*description: .*/
#define GPIO_PIN37_WAKEUP_ENABLE (BIT(10))
#def... | 2,056 |
*/
#define GPIO_PIN37_PAD_DRIVER (BIT(2))
#define GPIO_PIN37_PAD_DRIVER_M (BIT(2))
#define GPIO_PIN37_PAD_DRIVER_V 0x1
#define GPIO_PIN37_PAD_DRIVER_S 2
/* GPIO_PIN37_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
/*description: .*/
#define GPIO_PIN37_SYNC2_BYPASS 0x00000003
#define GPIO_PIN37_SYNC2_BYPA... | 2,056 |
*/
#define GPIO_PIN38_WAKEUP_ENABLE (BIT(10))
#define GPIO_PIN38_WAKEUP_ENABLE_M (BIT(10))
#define GPIO_PIN38_WAKEUP_ENABLE_V 0x1
#define GPIO_PIN38_WAKEUP_ENABLE_S 10
/* GPIO_PIN38_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
/*description: .*/
#define GPIO_PIN38_INT_TYPE 0x00000007
#define GPIO_PIN38_INT... | 2,056 |
*/
#define GPIO_PIN38_SYNC2_BYPASS 0x00000003
#define GPIO_PIN38_SYNC2_BYPASS_M ((GPIO_PIN38_SYNC2_BYPASS_V)<<(GPIO_PIN38_SYNC2_BYPASS_S))
#define GPIO_PIN38_SYNC2_BYPASS_V 0x3
#define GPIO_PIN38_SYNC2_BYPASS_S 0
#define GPIO_PIN39_REG (DR_REG_GPIO_BASE + 0x110)
/* GPIO_PIN39_INT_ENA : R/W ;bitpos:[17:1... | 2,056 |
*/
#define GPIO_PIN39_INT_TYPE 0x00000007
#define GPIO_PIN39_INT_TYPE_M ((GPIO_PIN39_INT_TYPE_V)<<(GPIO_PIN39_INT_TYPE_S))
#define GPIO_PIN39_INT_TYPE_V 0x7
#define GPIO_PIN39_INT_TYPE_S 7
/* GPIO_PIN39_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
/*description: .*/
#define GPIO_PIN39_SYNC1_BYPASS 0x00... | 2,056 |
*/
#define GPIO_PIN40_INT_ENA 0x0000001F
#define GPIO_PIN40_INT_ENA_M ((GPIO_PIN40_INT_ENA_V)<<(GPIO_PIN40_INT_ENA_S))
#define GPIO_PIN40_INT_ENA_V 0x1F
#define GPIO_PIN40_INT_ENA_S 13
/* GPIO_PIN40_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
/*description: .*/
#define GPIO_PIN40_CONFIG 0x00000003
#define... | 2,056 |
*/
#define GPIO_PIN40_SYNC1_BYPASS 0x00000003
#define GPIO_PIN40_SYNC1_BYPASS_M ((GPIO_PIN40_SYNC1_BYPASS_V)<<(GPIO_PIN40_SYNC1_BYPASS_S))
#define GPIO_PIN40_SYNC1_BYPASS_V 0x3
#define GPIO_PIN40_SYNC1_BYPASS_S 3
/* GPIO_PIN40_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
/*description: .*/
#define GPIO_PIN40_... | 2,056 |
*/
#define GPIO_PIN41_CONFIG 0x00000003
#define GPIO_PIN41_CONFIG_M ((GPIO_PIN41_CONFIG_V)<<(GPIO_PIN41_CONFIG_S))
#define GPIO_PIN41_CONFIG_V 0x3
#define GPIO_PIN41_CONFIG_S 11
/* GPIO_PIN41_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
/*description: .*/
#define GPIO_PIN41_WAKEUP_ENABLE (BIT(10))
#def... | 2,056 |
*/
#define GPIO_PIN41_PAD_DRIVER (BIT(2))
#define GPIO_PIN41_PAD_DRIVER_M (BIT(2))
#define GPIO_PIN41_PAD_DRIVER_V 0x1
#define GPIO_PIN41_PAD_DRIVER_S 2
/* GPIO_PIN41_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
/*description: .*/
#define GPIO_PIN41_SYNC2_BYPASS 0x00000003
#define GPIO_PIN41_SYNC2_BYPA... | 2,056 |
*/
#define GPIO_PIN42_WAKEUP_ENABLE (BIT(10))
#define GPIO_PIN42_WAKEUP_ENABLE_M (BIT(10))
#define GPIO_PIN42_WAKEUP_ENABLE_V 0x1
#define GPIO_PIN42_WAKEUP_ENABLE_S 10
/* GPIO_PIN42_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
/*description: .*/
#define GPIO_PIN42_INT_TYPE 0x00000007
#define GPIO_PIN42_INT... | 2,056 |
*/
#define GPIO_PIN42_SYNC2_BYPASS 0x00000003
#define GPIO_PIN42_SYNC2_BYPASS_M ((GPIO_PIN42_SYNC2_BYPASS_V)<<(GPIO_PIN42_SYNC2_BYPASS_S))
#define GPIO_PIN42_SYNC2_BYPASS_V 0x3
#define GPIO_PIN42_SYNC2_BYPASS_S 0
#define GPIO_PIN43_REG (DR_REG_GPIO_BASE + 0x120)
/* GPIO_PIN43_INT_ENA : R/W ;bitpos:[17:1... | 2,056 |
*/
#define GPIO_PIN43_INT_TYPE 0x00000007
#define GPIO_PIN43_INT_TYPE_M ((GPIO_PIN43_INT_TYPE_V)<<(GPIO_PIN43_INT_TYPE_S))
#define GPIO_PIN43_INT_TYPE_V 0x7
#define GPIO_PIN43_INT_TYPE_S 7
/* GPIO_PIN43_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
/*description: .*/
#define GPIO_PIN43_SYNC1_BYPASS 0x00... | 2,056 |
*/
#define GPIO_PIN44_INT_ENA 0x0000001F
#define GPIO_PIN44_INT_ENA_M ((GPIO_PIN44_INT_ENA_V)<<(GPIO_PIN44_INT_ENA_S))
#define GPIO_PIN44_INT_ENA_V 0x1F
#define GPIO_PIN44_INT_ENA_S 13
/* GPIO_PIN44_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
/*description: .*/
#define GPIO_PIN44_CONFIG 0x00000003
#define... | 2,056 |
*/
#define GPIO_PIN44_SYNC1_BYPASS 0x00000003
#define GPIO_PIN44_SYNC1_BYPASS_M ((GPIO_PIN44_SYNC1_BYPASS_V)<<(GPIO_PIN44_SYNC1_BYPASS_S))
#define GPIO_PIN44_SYNC1_BYPASS_V 0x3
#define GPIO_PIN44_SYNC1_BYPASS_S 3
/* GPIO_PIN44_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
/*description: .*/
#define GPIO_PIN44_... | 2,056 |
*/
#define GPIO_PIN45_CONFIG 0x00000003
#define GPIO_PIN45_CONFIG_M ((GPIO_PIN45_CONFIG_V)<<(GPIO_PIN45_CONFIG_S))
#define GPIO_PIN45_CONFIG_V 0x3
#define GPIO_PIN45_CONFIG_S 11
/* GPIO_PIN45_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
/*description: .*/
#define GPIO_PIN45_WAKEUP_ENABLE (BIT(10))
#def... | 2,056 |
*/
#define GPIO_PIN45_PAD_DRIVER (BIT(2))
#define GPIO_PIN45_PAD_DRIVER_M (BIT(2))
#define GPIO_PIN45_PAD_DRIVER_V 0x1
#define GPIO_PIN45_PAD_DRIVER_S 2
/* GPIO_PIN45_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
/*description: .*/
#define GPIO_PIN45_SYNC2_BYPASS 0x00000003
#define GPIO_PIN45_SYNC2_BYPA... | 2,056 |
*/
#define GPIO_PIN46_WAKEUP_ENABLE (BIT(10))
#define GPIO_PIN46_WAKEUP_ENABLE_M (BIT(10))
#define GPIO_PIN46_WAKEUP_ENABLE_V 0x1
#define GPIO_PIN46_WAKEUP_ENABLE_S 10
/* GPIO_PIN46_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
/*description: .*/
#define GPIO_PIN46_INT_TYPE 0x00000007
#define GPIO_PIN46_INT... | 2,056 |
*/
#define GPIO_PIN46_SYNC2_BYPASS 0x00000003
#define GPIO_PIN46_SYNC2_BYPASS_M ((GPIO_PIN46_SYNC2_BYPASS_V)<<(GPIO_PIN46_SYNC2_BYPASS_S))
#define GPIO_PIN46_SYNC2_BYPASS_V 0x3
#define GPIO_PIN46_SYNC2_BYPASS_S 0
#define GPIO_PIN47_REG (DR_REG_GPIO_BASE + 0x130)
/* GPIO_PIN47_INT_ENA : R/W ;bitpos:[17:1... | 2,056 |
*/
#define GPIO_PIN47_INT_TYPE 0x00000007
#define GPIO_PIN47_INT_TYPE_M ((GPIO_PIN47_INT_TYPE_V)<<(GPIO_PIN47_INT_TYPE_S))
#define GPIO_PIN47_INT_TYPE_V 0x7
#define GPIO_PIN47_INT_TYPE_S 7
/* GPIO_PIN47_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
/*description: .*/
#define GPIO_PIN47_SYNC1_BYPASS 0x00... | 2,056 |
*/
#define GPIO_PIN48_INT_ENA 0x0000001F
#define GPIO_PIN48_INT_ENA_M ((GPIO_PIN48_INT_ENA_V)<<(GPIO_PIN48_INT_ENA_S))
#define GPIO_PIN48_INT_ENA_V 0x1F
#define GPIO_PIN48_INT_ENA_S 13
/* GPIO_PIN48_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
/*description: .*/
#define GPIO_PIN48_CONFIG 0x00000003
#define... | 2,056 |
*/
#define GPIO_PIN48_SYNC1_BYPASS 0x00000003
#define GPIO_PIN48_SYNC1_BYPASS_M ((GPIO_PIN48_SYNC1_BYPASS_V)<<(GPIO_PIN48_SYNC1_BYPASS_S))
#define GPIO_PIN48_SYNC1_BYPASS_V 0x3
#define GPIO_PIN48_SYNC1_BYPASS_S 3
/* GPIO_PIN48_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
/*description: .*/
#define GPIO_PIN48_... | 2,056 |
*/
#define GPIO_PIN49_CONFIG 0x00000003
#define GPIO_PIN49_CONFIG_M ((GPIO_PIN49_CONFIG_V)<<(GPIO_PIN49_CONFIG_S))
#define GPIO_PIN49_CONFIG_V 0x3
#define GPIO_PIN49_CONFIG_S 11
/* GPIO_PIN49_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
/*description: .*/
#define GPIO_PIN49_WAKEUP_ENABLE (BIT(10))
#def... | 2,056 |
*/
#define GPIO_PIN49_PAD_DRIVER (BIT(2))
#define GPIO_PIN49_PAD_DRIVER_M (BIT(2))
#define GPIO_PIN49_PAD_DRIVER_V 0x1
#define GPIO_PIN49_PAD_DRIVER_S 2
/* GPIO_PIN49_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
/*description: .*/
#define GPIO_PIN49_SYNC2_BYPASS 0x00000003
#define GPIO_PIN49_SYNC2_BYPA... | 2,056 |
*/
#define GPIO_PIN50_WAKEUP_ENABLE (BIT(10))
#define GPIO_PIN50_WAKEUP_ENABLE_M (BIT(10))
#define GPIO_PIN50_WAKEUP_ENABLE_V 0x1
#define GPIO_PIN50_WAKEUP_ENABLE_S 10
/* GPIO_PIN50_INT_TYPE : R/W ;bitpos:[9:7] ;default: 3'h0 ; */
/*description: .*/
#define GPIO_PIN50_INT_TYPE 0x00000007
#define GPIO_PIN50_INT... | 2,056 |
*/
#define GPIO_PIN50_SYNC2_BYPASS 0x00000003
#define GPIO_PIN50_SYNC2_BYPASS_M ((GPIO_PIN50_SYNC2_BYPASS_V)<<(GPIO_PIN50_SYNC2_BYPASS_S))
#define GPIO_PIN50_SYNC2_BYPASS_V 0x3
#define GPIO_PIN50_SYNC2_BYPASS_S 0
#define GPIO_PIN51_REG (DR_REG_GPIO_BASE + 0x140)
/* GPIO_PIN51_INT_ENA : R/W ;bitpos:[17:1... | 2,056 |
*/
#define GPIO_PIN51_INT_TYPE 0x00000007
#define GPIO_PIN51_INT_TYPE_M ((GPIO_PIN51_INT_TYPE_V)<<(GPIO_PIN51_INT_TYPE_S))
#define GPIO_PIN51_INT_TYPE_V 0x7
#define GPIO_PIN51_INT_TYPE_S 7
/* GPIO_PIN51_SYNC1_BYPASS : R/W ;bitpos:[4:3] ;default: 2'h0 ; */
/*description: .*/
#define GPIO_PIN51_SYNC1_BYPASS 0x00... | 2,056 |
*/
#define GPIO_PIN52_INT_ENA 0x0000001F
#define GPIO_PIN52_INT_ENA_M ((GPIO_PIN52_INT_ENA_V)<<(GPIO_PIN52_INT_ENA_S))
#define GPIO_PIN52_INT_ENA_V 0x1F
#define GPIO_PIN52_INT_ENA_S 13
/* GPIO_PIN52_CONFIG : R/W ;bitpos:[12:11] ;default: 2'h0 ; */
/*description: .*/
#define GPIO_PIN52_CONFIG 0x00000003
#define... | 2,056 |
*/
#define GPIO_PIN52_SYNC1_BYPASS 0x00000003
#define GPIO_PIN52_SYNC1_BYPASS_M ((GPIO_PIN52_SYNC1_BYPASS_V)<<(GPIO_PIN52_SYNC1_BYPASS_S))
#define GPIO_PIN52_SYNC1_BYPASS_V 0x3
#define GPIO_PIN52_SYNC1_BYPASS_S 3
/* GPIO_PIN52_PAD_DRIVER : R/W ;bitpos:[2] ;default: 1'h0 ; */
/*description: .*/
#define GPIO_PIN52_... | 2,056 |
*/
#define GPIO_PIN53_CONFIG 0x00000003
#define GPIO_PIN53_CONFIG_M ((GPIO_PIN53_CONFIG_V)<<(GPIO_PIN53_CONFIG_S))
#define GPIO_PIN53_CONFIG_V 0x3
#define GPIO_PIN53_CONFIG_S 11
/* GPIO_PIN53_WAKEUP_ENABLE : R/W ;bitpos:[10] ;default: 1'h0 ; */
/*description: .*/
#define GPIO_PIN53_WAKEUP_ENABLE (BIT(10))
#def... | 2,056 |
*/
#define GPIO_PIN53_PAD_DRIVER (BIT(2))
#define GPIO_PIN53_PAD_DRIVER_M (BIT(2))
#define GPIO_PIN53_PAD_DRIVER_V 0x1
#define GPIO_PIN53_PAD_DRIVER_S 2
/* GPIO_PIN53_SYNC2_BYPASS : R/W ;bitpos:[1:0] ;default: 2'h0 ; */
/*description: .*/
#define GPIO_PIN53_SYNC2_BYPASS 0x00000003
#define GPIO_PIN53_SYNC2_BYPA... | 2,056 |
*/
#define GPIO_SIG0_IN_SEL (BIT(7))
#define GPIO_SIG0_IN_SEL_M (BIT(7))
#define GPIO_SIG0_IN_SEL_V 0x1
#define GPIO_SIG0_IN_SEL_S 7
/* GPIO_FUNC0_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
/*description: .*/
#define GPIO_FUNC0_IN_INV_SEL (BIT(6))
#define GPIO_FUNC0_IN_INV_SEL_M (BIT(6))
#define GPIO_FU... | 2,056 |
*/
#define GPIO_FUNC1_IN_INV_SEL (BIT(6))
#define GPIO_FUNC1_IN_INV_SEL_M (BIT(6))
#define GPIO_FUNC1_IN_INV_SEL_V 0x1
#define GPIO_FUNC1_IN_INV_SEL_S 6
/* GPIO_FUNC1_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
/*description: .*/
#define GPIO_FUNC1_IN_SEL 0x0000003F
#define GPIO_FUNC1_IN_SEL_M ((GPIO_FUNC1... | 2,056 |
*/
#define GPIO_FUNC2_IN_SEL 0x0000003F
#define GPIO_FUNC2_IN_SEL_M ((GPIO_FUNC2_IN_SEL_V)<<(GPIO_FUNC2_IN_SEL_S))
#define GPIO_FUNC2_IN_SEL_V 0x3F
#define GPIO_FUNC2_IN_SEL_S 0
#define GPIO_FUNC3_IN_SEL_CFG_REG (DR_REG_GPIO_BASE + 0x160)
/* GPIO_SIG3_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
/*descr... | 2,056 |
*/
#define GPIO_SIG4_IN_SEL (BIT(7))
#define GPIO_SIG4_IN_SEL_M (BIT(7))
#define GPIO_SIG4_IN_SEL_V 0x1
#define GPIO_SIG4_IN_SEL_S 7
/* GPIO_FUNC4_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
/*description: .*/
#define GPIO_FUNC4_IN_INV_SEL (BIT(6))
#define GPIO_FUNC4_IN_INV_SEL_M (BIT(6))
#define GPIO_FU... | 2,056 |
*/
#define GPIO_FUNC5_IN_INV_SEL (BIT(6))
#define GPIO_FUNC5_IN_INV_SEL_M (BIT(6))
#define GPIO_FUNC5_IN_INV_SEL_V 0x1
#define GPIO_FUNC5_IN_INV_SEL_S 6
/* GPIO_FUNC5_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
/*description: .*/
#define GPIO_FUNC5_IN_SEL 0x0000003F
#define GPIO_FUNC5_IN_SEL_M ((GPIO_FUNC5... | 2,056 |
*/
#define GPIO_FUNC6_IN_SEL 0x0000003F
#define GPIO_FUNC6_IN_SEL_M ((GPIO_FUNC6_IN_SEL_V)<<(GPIO_FUNC6_IN_SEL_S))
#define GPIO_FUNC6_IN_SEL_V 0x3F
#define GPIO_FUNC6_IN_SEL_S 0
#define GPIO_FUNC7_IN_SEL_CFG_REG (DR_REG_GPIO_BASE + 0x170)
/* GPIO_SIG7_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */
/*descr... | 2,056 |
*/
#define GPIO_SIG8_IN_SEL (BIT(7))
#define GPIO_SIG8_IN_SEL_M (BIT(7))
#define GPIO_SIG8_IN_SEL_V 0x1
#define GPIO_SIG8_IN_SEL_S 7
/* GPIO_FUNC8_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
/*description: .*/
#define GPIO_FUNC8_IN_INV_SEL (BIT(6))
#define GPIO_FUNC8_IN_INV_SEL_M (BIT(6))
#define GPIO_FU... | 2,056 |
*/
#define GPIO_FUNC9_IN_INV_SEL (BIT(6))
#define GPIO_FUNC9_IN_INV_SEL_M (BIT(6))
#define GPIO_FUNC9_IN_INV_SEL_V 0x1
#define GPIO_FUNC9_IN_INV_SEL_S 6
/* GPIO_FUNC9_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
/*description: .*/
#define GPIO_FUNC9_IN_SEL 0x0000003F
#define GPIO_FUNC9_IN_SEL_M ((GPIO_FUNC9... | 2,056 |
*/
#define GPIO_FUNC10_IN_SEL 0x0000003F
#define GPIO_FUNC10_IN_SEL_M ((GPIO_FUNC10_IN_SEL_V)<<(GPIO_FUNC10_IN_SEL_S))
#define GPIO_FUNC10_IN_SEL_V 0x3F
#define GPIO_FUNC10_IN_SEL_S 0
#define GPIO_FUNC11_IN_SEL_CFG_REG (DR_REG_GPIO_BASE + 0x180)
/* GPIO_SIG11_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */... | 2,056 |
*/
#define GPIO_SIG12_IN_SEL (BIT(7))
#define GPIO_SIG12_IN_SEL_M (BIT(7))
#define GPIO_SIG12_IN_SEL_V 0x1
#define GPIO_SIG12_IN_SEL_S 7
/* GPIO_FUNC12_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
/*description: .*/
#define GPIO_FUNC12_IN_INV_SEL (BIT(6))
#define GPIO_FUNC12_IN_INV_SEL_M (BIT(6))
#define ... | 2,056 |
*/
#define GPIO_FUNC13_IN_INV_SEL (BIT(6))
#define GPIO_FUNC13_IN_INV_SEL_M (BIT(6))
#define GPIO_FUNC13_IN_INV_SEL_V 0x1
#define GPIO_FUNC13_IN_INV_SEL_S 6
/* GPIO_FUNC13_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
/*description: .*/
#define GPIO_FUNC13_IN_SEL 0x0000003F
#define GPIO_FUNC13_IN_SEL_M ((GPI... | 2,056 |
*/
#define GPIO_FUNC14_IN_SEL 0x0000003F
#define GPIO_FUNC14_IN_SEL_M ((GPIO_FUNC14_IN_SEL_V)<<(GPIO_FUNC14_IN_SEL_S))
#define GPIO_FUNC14_IN_SEL_V 0x3F
#define GPIO_FUNC14_IN_SEL_S 0
#define GPIO_FUNC15_IN_SEL_CFG_REG (DR_REG_GPIO_BASE + 0x190)
/* GPIO_SIG15_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */... | 2,056 |
*/
#define GPIO_SIG16_IN_SEL (BIT(7))
#define GPIO_SIG16_IN_SEL_M (BIT(7))
#define GPIO_SIG16_IN_SEL_V 0x1
#define GPIO_SIG16_IN_SEL_S 7
/* GPIO_FUNC16_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
/*description: .*/
#define GPIO_FUNC16_IN_INV_SEL (BIT(6))
#define GPIO_FUNC16_IN_INV_SEL_M (BIT(6))
#define ... | 2,056 |
*/
#define GPIO_FUNC17_IN_INV_SEL (BIT(6))
#define GPIO_FUNC17_IN_INV_SEL_M (BIT(6))
#define GPIO_FUNC17_IN_INV_SEL_V 0x1
#define GPIO_FUNC17_IN_INV_SEL_S 6
/* GPIO_FUNC17_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
/*description: .*/
#define GPIO_FUNC17_IN_SEL 0x0000003F
#define GPIO_FUNC17_IN_SEL_M ((GPI... | 2,056 |
*/
#define GPIO_FUNC18_IN_SEL 0x0000003F
#define GPIO_FUNC18_IN_SEL_M ((GPIO_FUNC18_IN_SEL_V)<<(GPIO_FUNC18_IN_SEL_S))
#define GPIO_FUNC18_IN_SEL_V 0x3F
#define GPIO_FUNC18_IN_SEL_S 0
#define GPIO_FUNC19_IN_SEL_CFG_REG (DR_REG_GPIO_BASE + 0x1A0)
/* GPIO_SIG19_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */... | 2,056 |
*/
#define GPIO_SIG20_IN_SEL (BIT(7))
#define GPIO_SIG20_IN_SEL_M (BIT(7))
#define GPIO_SIG20_IN_SEL_V 0x1
#define GPIO_SIG20_IN_SEL_S 7
/* GPIO_FUNC20_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
/*description: .*/
#define GPIO_FUNC20_IN_INV_SEL (BIT(6))
#define GPIO_FUNC20_IN_INV_SEL_M (BIT(6))
#define ... | 2,056 |
*/
#define GPIO_FUNC21_IN_INV_SEL (BIT(6))
#define GPIO_FUNC21_IN_INV_SEL_M (BIT(6))
#define GPIO_FUNC21_IN_INV_SEL_V 0x1
#define GPIO_FUNC21_IN_INV_SEL_S 6
/* GPIO_FUNC21_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
/*description: .*/
#define GPIO_FUNC21_IN_SEL 0x0000003F
#define GPIO_FUNC21_IN_SEL_M ((GPI... | 2,056 |
*/
#define GPIO_FUNC22_IN_SEL 0x0000003F
#define GPIO_FUNC22_IN_SEL_M ((GPIO_FUNC22_IN_SEL_V)<<(GPIO_FUNC22_IN_SEL_S))
#define GPIO_FUNC22_IN_SEL_V 0x3F
#define GPIO_FUNC22_IN_SEL_S 0
#define GPIO_FUNC23_IN_SEL_CFG_REG (DR_REG_GPIO_BASE + 0x1B0)
/* GPIO_SIG23_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */... | 2,056 |
*/
#define GPIO_SIG24_IN_SEL (BIT(7))
#define GPIO_SIG24_IN_SEL_M (BIT(7))
#define GPIO_SIG24_IN_SEL_V 0x1
#define GPIO_SIG24_IN_SEL_S 7
/* GPIO_FUNC24_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
/*description: .*/
#define GPIO_FUNC24_IN_INV_SEL (BIT(6))
#define GPIO_FUNC24_IN_INV_SEL_M (BIT(6))
#define ... | 2,056 |
*/
#define GPIO_FUNC25_IN_INV_SEL (BIT(6))
#define GPIO_FUNC25_IN_INV_SEL_M (BIT(6))
#define GPIO_FUNC25_IN_INV_SEL_V 0x1
#define GPIO_FUNC25_IN_INV_SEL_S 6
/* GPIO_FUNC25_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
/*description: .*/
#define GPIO_FUNC25_IN_SEL 0x0000003F
#define GPIO_FUNC25_IN_SEL_M ((GPI... | 2,056 |
*/
#define GPIO_FUNC26_IN_SEL 0x0000003F
#define GPIO_FUNC26_IN_SEL_M ((GPIO_FUNC26_IN_SEL_V)<<(GPIO_FUNC26_IN_SEL_S))
#define GPIO_FUNC26_IN_SEL_V 0x3F
#define GPIO_FUNC26_IN_SEL_S 0
#define GPIO_FUNC27_IN_SEL_CFG_REG (DR_REG_GPIO_BASE + 0x1C0)
/* GPIO_SIG27_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */... | 2,056 |
*/
#define GPIO_SIG28_IN_SEL (BIT(7))
#define GPIO_SIG28_IN_SEL_M (BIT(7))
#define GPIO_SIG28_IN_SEL_V 0x1
#define GPIO_SIG28_IN_SEL_S 7
/* GPIO_FUNC28_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
/*description: .*/
#define GPIO_FUNC28_IN_INV_SEL (BIT(6))
#define GPIO_FUNC28_IN_INV_SEL_M (BIT(6))
#define ... | 2,056 |
*/
#define GPIO_FUNC29_IN_INV_SEL (BIT(6))
#define GPIO_FUNC29_IN_INV_SEL_M (BIT(6))
#define GPIO_FUNC29_IN_INV_SEL_V 0x1
#define GPIO_FUNC29_IN_INV_SEL_S 6
/* GPIO_FUNC29_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
/*description: .*/
#define GPIO_FUNC29_IN_SEL 0x0000003F
#define GPIO_FUNC29_IN_SEL_M ((GPI... | 2,056 |
*/
#define GPIO_FUNC30_IN_SEL 0x0000003F
#define GPIO_FUNC30_IN_SEL_M ((GPIO_FUNC30_IN_SEL_V)<<(GPIO_FUNC30_IN_SEL_S))
#define GPIO_FUNC30_IN_SEL_V 0x3F
#define GPIO_FUNC30_IN_SEL_S 0
#define GPIO_FUNC31_IN_SEL_CFG_REG (DR_REG_GPIO_BASE + 0x1D0)
/* GPIO_SIG31_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */... | 2,056 |
*/
#define GPIO_SIG32_IN_SEL (BIT(7))
#define GPIO_SIG32_IN_SEL_M (BIT(7))
#define GPIO_SIG32_IN_SEL_V 0x1
#define GPIO_SIG32_IN_SEL_S 7
/* GPIO_FUNC32_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
/*description: .*/
#define GPIO_FUNC32_IN_INV_SEL (BIT(6))
#define GPIO_FUNC32_IN_INV_SEL_M (BIT(6))
#define ... | 2,056 |
*/
#define GPIO_FUNC33_IN_INV_SEL (BIT(6))
#define GPIO_FUNC33_IN_INV_SEL_M (BIT(6))
#define GPIO_FUNC33_IN_INV_SEL_V 0x1
#define GPIO_FUNC33_IN_INV_SEL_S 6
/* GPIO_FUNC33_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
/*description: .*/
#define GPIO_FUNC33_IN_SEL 0x0000003F
#define GPIO_FUNC33_IN_SEL_M ((GPI... | 2,056 |
*/
#define GPIO_FUNC34_IN_SEL 0x0000003F
#define GPIO_FUNC34_IN_SEL_M ((GPIO_FUNC34_IN_SEL_V)<<(GPIO_FUNC34_IN_SEL_S))
#define GPIO_FUNC34_IN_SEL_V 0x3F
#define GPIO_FUNC34_IN_SEL_S 0
#define GPIO_FUNC35_IN_SEL_CFG_REG (DR_REG_GPIO_BASE + 0x1E0)
/* GPIO_SIG35_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */... | 2,056 |
*/
#define GPIO_SIG36_IN_SEL (BIT(7))
#define GPIO_SIG36_IN_SEL_M (BIT(7))
#define GPIO_SIG36_IN_SEL_V 0x1
#define GPIO_SIG36_IN_SEL_S 7
/* GPIO_FUNC36_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
/*description: .*/
#define GPIO_FUNC36_IN_INV_SEL (BIT(6))
#define GPIO_FUNC36_IN_INV_SEL_M (BIT(6))
#define ... | 2,056 |
*/
#define GPIO_FUNC37_IN_INV_SEL (BIT(6))
#define GPIO_FUNC37_IN_INV_SEL_M (BIT(6))
#define GPIO_FUNC37_IN_INV_SEL_V 0x1
#define GPIO_FUNC37_IN_INV_SEL_S 6
/* GPIO_FUNC37_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
/*description: .*/
#define GPIO_FUNC37_IN_SEL 0x0000003F
#define GPIO_FUNC37_IN_SEL_M ((GPI... | 2,056 |
*/
#define GPIO_FUNC38_IN_SEL 0x0000003F
#define GPIO_FUNC38_IN_SEL_M ((GPIO_FUNC38_IN_SEL_V)<<(GPIO_FUNC38_IN_SEL_S))
#define GPIO_FUNC38_IN_SEL_V 0x3F
#define GPIO_FUNC38_IN_SEL_S 0
#define GPIO_FUNC39_IN_SEL_CFG_REG (DR_REG_GPIO_BASE + 0x1F0)
/* GPIO_SIG39_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */... | 2,056 |
*/
#define GPIO_SIG40_IN_SEL (BIT(7))
#define GPIO_SIG40_IN_SEL_M (BIT(7))
#define GPIO_SIG40_IN_SEL_V 0x1
#define GPIO_SIG40_IN_SEL_S 7
/* GPIO_FUNC40_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
/*description: .*/
#define GPIO_FUNC40_IN_INV_SEL (BIT(6))
#define GPIO_FUNC40_IN_INV_SEL_M (BIT(6))
#define ... | 2,056 |
*/
#define GPIO_FUNC41_IN_INV_SEL (BIT(6))
#define GPIO_FUNC41_IN_INV_SEL_M (BIT(6))
#define GPIO_FUNC41_IN_INV_SEL_V 0x1
#define GPIO_FUNC41_IN_INV_SEL_S 6
/* GPIO_FUNC41_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
/*description: .*/
#define GPIO_FUNC41_IN_SEL 0x0000003F
#define GPIO_FUNC41_IN_SEL_M ((GPI... | 2,056 |
*/
#define GPIO_FUNC42_IN_SEL 0x0000003F
#define GPIO_FUNC42_IN_SEL_M ((GPIO_FUNC42_IN_SEL_V)<<(GPIO_FUNC42_IN_SEL_S))
#define GPIO_FUNC42_IN_SEL_V 0x3F
#define GPIO_FUNC42_IN_SEL_S 0
#define GPIO_FUNC43_IN_SEL_CFG_REG (DR_REG_GPIO_BASE + 0x200)
/* GPIO_SIG43_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */... | 2,056 |
*/
#define GPIO_SIG44_IN_SEL (BIT(7))
#define GPIO_SIG44_IN_SEL_M (BIT(7))
#define GPIO_SIG44_IN_SEL_V 0x1
#define GPIO_SIG44_IN_SEL_S 7
/* GPIO_FUNC44_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
/*description: .*/
#define GPIO_FUNC44_IN_INV_SEL (BIT(6))
#define GPIO_FUNC44_IN_INV_SEL_M (BIT(6))
#define ... | 2,056 |
*/
#define GPIO_FUNC45_IN_INV_SEL (BIT(6))
#define GPIO_FUNC45_IN_INV_SEL_M (BIT(6))
#define GPIO_FUNC45_IN_INV_SEL_V 0x1
#define GPIO_FUNC45_IN_INV_SEL_S 6
/* GPIO_FUNC45_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
/*description: .*/
#define GPIO_FUNC45_IN_SEL 0x0000003F
#define GPIO_FUNC45_IN_SEL_M ((GPI... | 2,056 |
*/
#define GPIO_FUNC46_IN_SEL 0x0000003F
#define GPIO_FUNC46_IN_SEL_M ((GPIO_FUNC46_IN_SEL_V)<<(GPIO_FUNC46_IN_SEL_S))
#define GPIO_FUNC46_IN_SEL_V 0x3F
#define GPIO_FUNC46_IN_SEL_S 0
#define GPIO_FUNC47_IN_SEL_CFG_REG (DR_REG_GPIO_BASE + 0x210)
/* GPIO_SIG47_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */... | 2,056 |
*/
#define GPIO_SIG48_IN_SEL (BIT(7))
#define GPIO_SIG48_IN_SEL_M (BIT(7))
#define GPIO_SIG48_IN_SEL_V 0x1
#define GPIO_SIG48_IN_SEL_S 7
/* GPIO_FUNC48_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
/*description: .*/
#define GPIO_FUNC48_IN_INV_SEL (BIT(6))
#define GPIO_FUNC48_IN_INV_SEL_M (BIT(6))
#define ... | 2,056 |
*/
#define GPIO_FUNC49_IN_INV_SEL (BIT(6))
#define GPIO_FUNC49_IN_INV_SEL_M (BIT(6))
#define GPIO_FUNC49_IN_INV_SEL_V 0x1
#define GPIO_FUNC49_IN_INV_SEL_S 6
/* GPIO_FUNC49_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
/*description: .*/
#define GPIO_FUNC49_IN_SEL 0x0000003F
#define GPIO_FUNC49_IN_SEL_M ((GPI... | 2,056 |
*/
#define GPIO_FUNC50_IN_SEL 0x0000003F
#define GPIO_FUNC50_IN_SEL_M ((GPIO_FUNC50_IN_SEL_V)<<(GPIO_FUNC50_IN_SEL_S))
#define GPIO_FUNC50_IN_SEL_V 0x3F
#define GPIO_FUNC50_IN_SEL_S 0
#define GPIO_FUNC51_IN_SEL_CFG_REG (DR_REG_GPIO_BASE + 0x220)
/* GPIO_SIG51_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */... | 2,056 |
*/
#define GPIO_SIG52_IN_SEL (BIT(7))
#define GPIO_SIG52_IN_SEL_M (BIT(7))
#define GPIO_SIG52_IN_SEL_V 0x1
#define GPIO_SIG52_IN_SEL_S 7
/* GPIO_FUNC52_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
/*description: .*/
#define GPIO_FUNC52_IN_INV_SEL (BIT(6))
#define GPIO_FUNC52_IN_INV_SEL_M (BIT(6))
#define ... | 2,056 |
*/
#define GPIO_FUNC53_IN_INV_SEL (BIT(6))
#define GPIO_FUNC53_IN_INV_SEL_M (BIT(6))
#define GPIO_FUNC53_IN_INV_SEL_V 0x1
#define GPIO_FUNC53_IN_INV_SEL_S 6
/* GPIO_FUNC53_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
/*description: .*/
#define GPIO_FUNC53_IN_SEL 0x0000003F
#define GPIO_FUNC53_IN_SEL_M ((GPI... | 2,056 |
*/
#define GPIO_FUNC54_IN_SEL 0x0000003F
#define GPIO_FUNC54_IN_SEL_M ((GPIO_FUNC54_IN_SEL_V)<<(GPIO_FUNC54_IN_SEL_S))
#define GPIO_FUNC54_IN_SEL_V 0x3F
#define GPIO_FUNC54_IN_SEL_S 0
#define GPIO_FUNC55_IN_SEL_CFG_REG (DR_REG_GPIO_BASE + 0x230)
/* GPIO_SIG55_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */... | 2,056 |
*/
#define GPIO_SIG56_IN_SEL (BIT(7))
#define GPIO_SIG56_IN_SEL_M (BIT(7))
#define GPIO_SIG56_IN_SEL_V 0x1
#define GPIO_SIG56_IN_SEL_S 7
/* GPIO_FUNC56_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
/*description: .*/
#define GPIO_FUNC56_IN_INV_SEL (BIT(6))
#define GPIO_FUNC56_IN_INV_SEL_M (BIT(6))
#define ... | 2,056 |
*/
#define GPIO_FUNC57_IN_INV_SEL (BIT(6))
#define GPIO_FUNC57_IN_INV_SEL_M (BIT(6))
#define GPIO_FUNC57_IN_INV_SEL_V 0x1
#define GPIO_FUNC57_IN_INV_SEL_S 6
/* GPIO_FUNC57_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
/*description: .*/
#define GPIO_FUNC57_IN_SEL 0x0000003F
#define GPIO_FUNC57_IN_SEL_M ((GPI... | 2,056 |
*/
#define GPIO_FUNC58_IN_SEL 0x0000003F
#define GPIO_FUNC58_IN_SEL_M ((GPIO_FUNC58_IN_SEL_V)<<(GPIO_FUNC58_IN_SEL_S))
#define GPIO_FUNC58_IN_SEL_V 0x3F
#define GPIO_FUNC58_IN_SEL_S 0
#define GPIO_FUNC59_IN_SEL_CFG_REG (DR_REG_GPIO_BASE + 0x240)
/* GPIO_SIG59_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */... | 2,056 |
*/
#define GPIO_SIG60_IN_SEL (BIT(7))
#define GPIO_SIG60_IN_SEL_M (BIT(7))
#define GPIO_SIG60_IN_SEL_V 0x1
#define GPIO_SIG60_IN_SEL_S 7
/* GPIO_FUNC60_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
/*description: .*/
#define GPIO_FUNC60_IN_INV_SEL (BIT(6))
#define GPIO_FUNC60_IN_INV_SEL_M (BIT(6))
#define ... | 2,056 |
*/
#define GPIO_FUNC61_IN_INV_SEL (BIT(6))
#define GPIO_FUNC61_IN_INV_SEL_M (BIT(6))
#define GPIO_FUNC61_IN_INV_SEL_V 0x1
#define GPIO_FUNC61_IN_INV_SEL_S 6
/* GPIO_FUNC61_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
/*description: .*/
#define GPIO_FUNC61_IN_SEL 0x0000003F
#define GPIO_FUNC61_IN_SEL_M ((GPI... | 2,056 |
*/
#define GPIO_FUNC62_IN_SEL 0x0000003F
#define GPIO_FUNC62_IN_SEL_M ((GPIO_FUNC62_IN_SEL_V)<<(GPIO_FUNC62_IN_SEL_S))
#define GPIO_FUNC62_IN_SEL_V 0x3F
#define GPIO_FUNC62_IN_SEL_S 0
#define GPIO_FUNC63_IN_SEL_CFG_REG (DR_REG_GPIO_BASE + 0x250)
/* GPIO_SIG63_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */... | 2,056 |
*/
#define GPIO_SIG64_IN_SEL (BIT(7))
#define GPIO_SIG64_IN_SEL_M (BIT(7))
#define GPIO_SIG64_IN_SEL_V 0x1
#define GPIO_SIG64_IN_SEL_S 7
/* GPIO_FUNC64_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
/*description: .*/
#define GPIO_FUNC64_IN_INV_SEL (BIT(6))
#define GPIO_FUNC64_IN_INV_SEL_M (BIT(6))
#define ... | 2,056 |
*/
#define GPIO_FUNC65_IN_INV_SEL (BIT(6))
#define GPIO_FUNC65_IN_INV_SEL_M (BIT(6))
#define GPIO_FUNC65_IN_INV_SEL_V 0x1
#define GPIO_FUNC65_IN_INV_SEL_S 6
/* GPIO_FUNC65_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
/*description: .*/
#define GPIO_FUNC65_IN_SEL 0x0000003F
#define GPIO_FUNC65_IN_SEL_M ((GPI... | 2,056 |
*/
#define GPIO_FUNC66_IN_SEL 0x0000003F
#define GPIO_FUNC66_IN_SEL_M ((GPIO_FUNC66_IN_SEL_V)<<(GPIO_FUNC66_IN_SEL_S))
#define GPIO_FUNC66_IN_SEL_V 0x3F
#define GPIO_FUNC66_IN_SEL_S 0
#define GPIO_FUNC67_IN_SEL_CFG_REG (DR_REG_GPIO_BASE + 0x260)
/* GPIO_SIG67_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */... | 2,056 |
*/
#define GPIO_SIG68_IN_SEL (BIT(7))
#define GPIO_SIG68_IN_SEL_M (BIT(7))
#define GPIO_SIG68_IN_SEL_V 0x1
#define GPIO_SIG68_IN_SEL_S 7
/* GPIO_FUNC68_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
/*description: .*/
#define GPIO_FUNC68_IN_INV_SEL (BIT(6))
#define GPIO_FUNC68_IN_INV_SEL_M (BIT(6))
#define ... | 2,056 |
*/
#define GPIO_FUNC69_IN_INV_SEL (BIT(6))
#define GPIO_FUNC69_IN_INV_SEL_M (BIT(6))
#define GPIO_FUNC69_IN_INV_SEL_V 0x1
#define GPIO_FUNC69_IN_INV_SEL_S 6
/* GPIO_FUNC69_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
/*description: .*/
#define GPIO_FUNC69_IN_SEL 0x0000003F
#define GPIO_FUNC69_IN_SEL_M ((GPI... | 2,056 |
*/
#define GPIO_FUNC70_IN_SEL 0x0000003F
#define GPIO_FUNC70_IN_SEL_M ((GPIO_FUNC70_IN_SEL_V)<<(GPIO_FUNC70_IN_SEL_S))
#define GPIO_FUNC70_IN_SEL_V 0x3F
#define GPIO_FUNC70_IN_SEL_S 0
#define GPIO_FUNC71_IN_SEL_CFG_REG (DR_REG_GPIO_BASE + 0x270)
/* GPIO_SIG71_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */... | 2,056 |
*/
#define GPIO_SIG72_IN_SEL (BIT(7))
#define GPIO_SIG72_IN_SEL_M (BIT(7))
#define GPIO_SIG72_IN_SEL_V 0x1
#define GPIO_SIG72_IN_SEL_S 7
/* GPIO_FUNC72_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
/*description: .*/
#define GPIO_FUNC72_IN_INV_SEL (BIT(6))
#define GPIO_FUNC72_IN_INV_SEL_M (BIT(6))
#define ... | 2,056 |
*/
#define GPIO_FUNC73_IN_INV_SEL (BIT(6))
#define GPIO_FUNC73_IN_INV_SEL_M (BIT(6))
#define GPIO_FUNC73_IN_INV_SEL_V 0x1
#define GPIO_FUNC73_IN_INV_SEL_S 6
/* GPIO_FUNC73_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
/*description: .*/
#define GPIO_FUNC73_IN_SEL 0x0000003F
#define GPIO_FUNC73_IN_SEL_M ((GPI... | 2,056 |
*/
#define GPIO_FUNC74_IN_SEL 0x0000003F
#define GPIO_FUNC74_IN_SEL_M ((GPIO_FUNC74_IN_SEL_V)<<(GPIO_FUNC74_IN_SEL_S))
#define GPIO_FUNC74_IN_SEL_V 0x3F
#define GPIO_FUNC74_IN_SEL_S 0
#define GPIO_FUNC75_IN_SEL_CFG_REG (DR_REG_GPIO_BASE + 0x280)
/* GPIO_SIG75_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */... | 2,056 |
*/
#define GPIO_SIG76_IN_SEL (BIT(7))
#define GPIO_SIG76_IN_SEL_M (BIT(7))
#define GPIO_SIG76_IN_SEL_V 0x1
#define GPIO_SIG76_IN_SEL_S 7
/* GPIO_FUNC76_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
/*description: .*/
#define GPIO_FUNC76_IN_INV_SEL (BIT(6))
#define GPIO_FUNC76_IN_INV_SEL_M (BIT(6))
#define ... | 2,056 |
*/
#define GPIO_FUNC77_IN_INV_SEL (BIT(6))
#define GPIO_FUNC77_IN_INV_SEL_M (BIT(6))
#define GPIO_FUNC77_IN_INV_SEL_V 0x1
#define GPIO_FUNC77_IN_INV_SEL_S 6
/* GPIO_FUNC77_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
/*description: .*/
#define GPIO_FUNC77_IN_SEL 0x0000003F
#define GPIO_FUNC77_IN_SEL_M ((GPI... | 2,056 |
*/
#define GPIO_FUNC78_IN_SEL 0x0000003F
#define GPIO_FUNC78_IN_SEL_M ((GPIO_FUNC78_IN_SEL_V)<<(GPIO_FUNC78_IN_SEL_S))
#define GPIO_FUNC78_IN_SEL_V 0x3F
#define GPIO_FUNC78_IN_SEL_S 0
#define GPIO_FUNC79_IN_SEL_CFG_REG (DR_REG_GPIO_BASE + 0x290)
/* GPIO_SIG79_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */... | 2,056 |
*/
#define GPIO_SIG80_IN_SEL (BIT(7))
#define GPIO_SIG80_IN_SEL_M (BIT(7))
#define GPIO_SIG80_IN_SEL_V 0x1
#define GPIO_SIG80_IN_SEL_S 7
/* GPIO_FUNC80_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
/*description: .*/
#define GPIO_FUNC80_IN_INV_SEL (BIT(6))
#define GPIO_FUNC80_IN_INV_SEL_M (BIT(6))
#define ... | 2,056 |
*/
#define GPIO_FUNC81_IN_INV_SEL (BIT(6))
#define GPIO_FUNC81_IN_INV_SEL_M (BIT(6))
#define GPIO_FUNC81_IN_INV_SEL_V 0x1
#define GPIO_FUNC81_IN_INV_SEL_S 6
/* GPIO_FUNC81_IN_SEL : R/W ;bitpos:[5:0] ;default: 6'h0 ; */
/*description: .*/
#define GPIO_FUNC81_IN_SEL 0x0000003F
#define GPIO_FUNC81_IN_SEL_M ((GPI... | 2,056 |
*/
#define GPIO_FUNC82_IN_SEL 0x0000003F
#define GPIO_FUNC82_IN_SEL_M ((GPIO_FUNC82_IN_SEL_V)<<(GPIO_FUNC82_IN_SEL_S))
#define GPIO_FUNC82_IN_SEL_V 0x3F
#define GPIO_FUNC82_IN_SEL_S 0
#define GPIO_FUNC83_IN_SEL_CFG_REG (DR_REG_GPIO_BASE + 0x2A0)
/* GPIO_SIG83_IN_SEL : R/W ;bitpos:[7] ;default: 1'h0 ; */... | 2,056 |
*/
#define GPIO_SIG84_IN_SEL (BIT(7))
#define GPIO_SIG84_IN_SEL_M (BIT(7))
#define GPIO_SIG84_IN_SEL_V 0x1
#define GPIO_SIG84_IN_SEL_S 7
/* GPIO_FUNC84_IN_INV_SEL : R/W ;bitpos:[6] ;default: 1'h0 ; */
/*description: .*/
#define GPIO_FUNC84_IN_INV_SEL (BIT(6))
#define GPIO_FUNC84_IN_INV_SEL_M (BIT(6))
#define ... | 2,056 |
Subsets and Splits
No community queries yet
The top public SQL queries from the community will appear here once available.