url stringclasses 147
values | commit stringclasses 147
values | file_path stringlengths 7 101 | full_name stringlengths 1 94 | start stringlengths 6 10 | end stringlengths 6 11 | tactic stringlengths 1 11.2k | state_before stringlengths 3 2.09M | state_after stringlengths 6 2.09M | input stringlengths 73 2.09M |
|---|---|---|---|---|---|---|---|---|---|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/CommutatorCycles.lean | cycleMin_cmtr_right_apply_eq_apply_cycleMin_cmtr | [33, 1] | [48, 69] | rcases cycleMin_exists_pow_apply ⁅x, y⁆ q with ⟨j, hjq₂⟩ | α : Type u
inst✝² : Fintype α
inst✝¹ : DecidableEq α
x y : Perm α
q : α
inst✝ : LinearOrder α
hxy : ⁅x, y⁻¹⁆ = ⁅x, y⁆
hy : ∀ (q : α), y q ≠ q
hy₂ : ∀ {r q : α}, r < q → y q < y r → r = y q
⊢ CycleMin ⁅x, y⁆ (y q) = y (CycleMin ⁅x, y⁆ q) | case intro
α : Type u
inst✝² : Fintype α
inst✝¹ : DecidableEq α
x y : Perm α
q : α
inst✝ : LinearOrder α
hxy : ⁅x, y⁻¹⁆ = ⁅x, y⁆
hy : ∀ (q : α), y q ≠ q
hy₂ : ∀ {r q : α}, r < q → y q < y r → r = y q
j : ℤ
hjq₂ : (⁅x, y⁆ ^ j) q = CycleMin ⁅x, y⁆ q
⊢ CycleMin ⁅x, y⁆ (y q) = y (CycleMin ⁅x, y⁆ q) | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝² : Fintype α
inst✝¹ : DecidableEq α
x y : Perm α
q : α
inst✝ : LinearOrder α
hxy : ⁅x, y⁻¹⁆ = ⁅x, y⁆
hy : ∀ (q : α), y q ≠ q
hy₂ : ∀ {r q : α}, r < q → y q < y r → r = y q
⊢ CycleMin ⁅x, y⁆ (y q) = y (CycleMin ⁅x, y⁆ q)
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/CommutatorCycles.lean | cycleMin_cmtr_right_apply_eq_apply_cycleMin_cmtr | [33, 1] | [48, 69] | refine' eq_of_le_of_not_lt _ (fun h => _) | case intro
α : Type u
inst✝² : Fintype α
inst✝¹ : DecidableEq α
x y : Perm α
q : α
inst✝ : LinearOrder α
hxy : ⁅x, y⁻¹⁆ = ⁅x, y⁆
hy : ∀ (q : α), y q ≠ q
hy₂ : ∀ {r q : α}, r < q → y q < y r → r = y q
j : ℤ
hjq₂ : (⁅x, y⁆ ^ j) q = CycleMin ⁅x, y⁆ q
⊢ CycleMin ⁅x, y⁆ (y q) = y (CycleMin ⁅x, y⁆ q) | case intro.refine'_1
α : Type u
inst✝² : Fintype α
inst✝¹ : DecidableEq α
x y : Perm α
q : α
inst✝ : LinearOrder α
hxy : ⁅x, y⁻¹⁆ = ⁅x, y⁆
hy : ∀ (q : α), y q ≠ q
hy₂ : ∀ {r q : α}, r < q → y q < y r → r = y q
j : ℤ
hjq₂ : (⁅x, y⁆ ^ j) q = CycleMin ⁅x, y⁆ q
⊢ CycleMin ⁅x, y⁆ (y q) ≤ y (CycleMin ⁅x, y⁆ q)
case intro.refine'_2
α : Type u
inst✝² : Fintype α
inst✝¹ : DecidableEq α
x y : Perm α
q : α
inst✝ : LinearOrder α
hxy : ⁅x, y⁻¹⁆ = ⁅x, y⁆
hy : ∀ (q : α), y q ≠ q
hy₂ : ∀ {r q : α}, r < q → y q < y r → r = y q
j : ℤ
hjq₂ : (⁅x, y⁆ ^ j) q = CycleMin ⁅x, y⁆ q
h : CycleMin ⁅x, y⁆ (y q) < y (CycleMin ⁅x, y⁆ q)
⊢ False | Please generate a tactic in lean4 to solve the state.
STATE:
case intro
α : Type u
inst✝² : Fintype α
inst✝¹ : DecidableEq α
x y : Perm α
q : α
inst✝ : LinearOrder α
hxy : ⁅x, y⁻¹⁆ = ⁅x, y⁆
hy : ∀ (q : α), y q ≠ q
hy₂ : ∀ {r q : α}, r < q → y q < y r → r = y q
j : ℤ
hjq₂ : (⁅x, y⁆ ^ j) q = CycleMin ⁅x, y⁆ q
⊢ CycleMin ⁅x, y⁆ (y q) = y (CycleMin ⁅x, y⁆ q)
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/CommutatorCycles.lean | cycleMin_cmtr_right_apply_eq_apply_cycleMin_cmtr | [33, 1] | [48, 69] | refine' cycleMin_le ⁅x, y⁆ (y q) ⟨-j, _⟩ | case intro.refine'_1
α : Type u
inst✝² : Fintype α
inst✝¹ : DecidableEq α
x y : Perm α
q : α
inst✝ : LinearOrder α
hxy : ⁅x, y⁻¹⁆ = ⁅x, y⁆
hy : ∀ (q : α), y q ≠ q
hy₂ : ∀ {r q : α}, r < q → y q < y r → r = y q
j : ℤ
hjq₂ : (⁅x, y⁆ ^ j) q = CycleMin ⁅x, y⁆ q
⊢ CycleMin ⁅x, y⁆ (y q) ≤ y (CycleMin ⁅x, y⁆ q) | case intro.refine'_1
α : Type u
inst✝² : Fintype α
inst✝¹ : DecidableEq α
x y : Perm α
q : α
inst✝ : LinearOrder α
hxy : ⁅x, y⁻¹⁆ = ⁅x, y⁆
hy : ∀ (q : α), y q ≠ q
hy₂ : ∀ {r q : α}, r < q → y q < y r → r = y q
j : ℤ
hjq₂ : (⁅x, y⁆ ^ j) q = CycleMin ⁅x, y⁆ q
⊢ (⁅x, y⁆ ^ (-j)) (y q) = y (CycleMin ⁅x, y⁆ q) | Please generate a tactic in lean4 to solve the state.
STATE:
case intro.refine'_1
α : Type u
inst✝² : Fintype α
inst✝¹ : DecidableEq α
x y : Perm α
q : α
inst✝ : LinearOrder α
hxy : ⁅x, y⁻¹⁆ = ⁅x, y⁆
hy : ∀ (q : α), y q ≠ q
hy₂ : ∀ {r q : α}, r < q → y q < y r → r = y q
j : ℤ
hjq₂ : (⁅x, y⁆ ^ j) q = CycleMin ⁅x, y⁆ q
⊢ CycleMin ⁅x, y⁆ (y q) ≤ y (CycleMin ⁅x, y⁆ q)
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/CommutatorCycles.lean | cycleMin_cmtr_right_apply_eq_apply_cycleMin_cmtr | [33, 1] | [48, 69] | simp_rw [zpow_neg, ← Perm.mul_apply, cmtr_zpow_inv_mul_eq_mul_inv_cmtr_zpow, hxy,
Perm.mul_apply, hjq₂] | case intro.refine'_1
α : Type u
inst✝² : Fintype α
inst✝¹ : DecidableEq α
x y : Perm α
q : α
inst✝ : LinearOrder α
hxy : ⁅x, y⁻¹⁆ = ⁅x, y⁆
hy : ∀ (q : α), y q ≠ q
hy₂ : ∀ {r q : α}, r < q → y q < y r → r = y q
j : ℤ
hjq₂ : (⁅x, y⁆ ^ j) q = CycleMin ⁅x, y⁆ q
⊢ (⁅x, y⁆ ^ (-j)) (y q) = y (CycleMin ⁅x, y⁆ q) | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
case intro.refine'_1
α : Type u
inst✝² : Fintype α
inst✝¹ : DecidableEq α
x y : Perm α
q : α
inst✝ : LinearOrder α
hxy : ⁅x, y⁻¹⁆ = ⁅x, y⁆
hy : ∀ (q : α), y q ≠ q
hy₂ : ∀ {r q : α}, r < q → y q < y r → r = y q
j : ℤ
hjq₂ : (⁅x, y⁆ ^ j) q = CycleMin ⁅x, y⁆ q
⊢ (⁅x, y⁆ ^ (-j)) (y q) = y (CycleMin ⁅x, y⁆ q)
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/CommutatorCycles.lean | cycleMin_cmtr_right_apply_eq_apply_cycleMin_cmtr | [33, 1] | [48, 69] | rcases cycleMin_exists_pow_apply ⁅x, y⁆ (y q) with ⟨k, hkq₂⟩ | case intro.refine'_2
α : Type u
inst✝² : Fintype α
inst✝¹ : DecidableEq α
x y : Perm α
q : α
inst✝ : LinearOrder α
hxy : ⁅x, y⁻¹⁆ = ⁅x, y⁆
hy : ∀ (q : α), y q ≠ q
hy₂ : ∀ {r q : α}, r < q → y q < y r → r = y q
j : ℤ
hjq₂ : (⁅x, y⁆ ^ j) q = CycleMin ⁅x, y⁆ q
h : CycleMin ⁅x, y⁆ (y q) < y (CycleMin ⁅x, y⁆ q)
⊢ False | case intro.refine'_2.intro
α : Type u
inst✝² : Fintype α
inst✝¹ : DecidableEq α
x y : Perm α
q : α
inst✝ : LinearOrder α
hxy : ⁅x, y⁻¹⁆ = ⁅x, y⁆
hy : ∀ (q : α), y q ≠ q
hy₂ : ∀ {r q : α}, r < q → y q < y r → r = y q
j : ℤ
hjq₂ : (⁅x, y⁆ ^ j) q = CycleMin ⁅x, y⁆ q
h : CycleMin ⁅x, y⁆ (y q) < y (CycleMin ⁅x, y⁆ q)
k : ℤ
hkq₂ : (⁅x, y⁆ ^ k) (y q) = CycleMin ⁅x, y⁆ (y q)
⊢ False | Please generate a tactic in lean4 to solve the state.
STATE:
case intro.refine'_2
α : Type u
inst✝² : Fintype α
inst✝¹ : DecidableEq α
x y : Perm α
q : α
inst✝ : LinearOrder α
hxy : ⁅x, y⁻¹⁆ = ⁅x, y⁆
hy : ∀ (q : α), y q ≠ q
hy₂ : ∀ {r q : α}, r < q → y q < y r → r = y q
j : ℤ
hjq₂ : (⁅x, y⁆ ^ j) q = CycleMin ⁅x, y⁆ q
h : CycleMin ⁅x, y⁆ (y q) < y (CycleMin ⁅x, y⁆ q)
⊢ False
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/CommutatorCycles.lean | cycleMin_cmtr_right_apply_eq_apply_cycleMin_cmtr | [33, 1] | [48, 69] | rw [←hkq₂, ← hjq₂, ← Perm.mul_apply, cmtr_zpow_mul_eq_mul_inv_cmtr_zpow_inv, Perm.mul_apply,
hxy, ← zpow_neg] at h | case intro.refine'_2.intro
α : Type u
inst✝² : Fintype α
inst✝¹ : DecidableEq α
x y : Perm α
q : α
inst✝ : LinearOrder α
hxy : ⁅x, y⁻¹⁆ = ⁅x, y⁆
hy : ∀ (q : α), y q ≠ q
hy₂ : ∀ {r q : α}, r < q → y q < y r → r = y q
j : ℤ
hjq₂ : (⁅x, y⁆ ^ j) q = CycleMin ⁅x, y⁆ q
h : CycleMin ⁅x, y⁆ (y q) < y (CycleMin ⁅x, y⁆ q)
k : ℤ
hkq₂ : (⁅x, y⁆ ^ k) (y q) = CycleMin ⁅x, y⁆ (y q)
⊢ False | case intro.refine'_2.intro
α : Type u
inst✝² : Fintype α
inst✝¹ : DecidableEq α
x y : Perm α
q : α
inst✝ : LinearOrder α
hxy : ⁅x, y⁻¹⁆ = ⁅x, y⁆
hy : ∀ (q : α), y q ≠ q
hy₂ : ∀ {r q : α}, r < q → y q < y r → r = y q
j : ℤ
hjq₂ : (⁅x, y⁆ ^ j) q = CycleMin ⁅x, y⁆ q
k : ℤ
h : y ((⁅x, y⁆ ^ (-k)) q) < y ((⁅x, y⁆ ^ j) q)
hkq₂ : (⁅x, y⁆ ^ k) (y q) = CycleMin ⁅x, y⁆ (y q)
⊢ False | Please generate a tactic in lean4 to solve the state.
STATE:
case intro.refine'_2.intro
α : Type u
inst✝² : Fintype α
inst✝¹ : DecidableEq α
x y : Perm α
q : α
inst✝ : LinearOrder α
hxy : ⁅x, y⁻¹⁆ = ⁅x, y⁆
hy : ∀ (q : α), y q ≠ q
hy₂ : ∀ {r q : α}, r < q → y q < y r → r = y q
j : ℤ
hjq₂ : (⁅x, y⁆ ^ j) q = CycleMin ⁅x, y⁆ q
h : CycleMin ⁅x, y⁆ (y q) < y (CycleMin ⁅x, y⁆ q)
k : ℤ
hkq₂ : (⁅x, y⁆ ^ k) (y q) = CycleMin ⁅x, y⁆ (y q)
⊢ False
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/CommutatorCycles.lean | cycleMin_cmtr_right_apply_eq_apply_cycleMin_cmtr | [33, 1] | [48, 69] | rcases lt_trichotomy ((⁅x, y⁆ ^ (-k)) q) ((⁅x, y⁆ ^ j) q) with H | H | H | case intro.refine'_2.intro
α : Type u
inst✝² : Fintype α
inst✝¹ : DecidableEq α
x y : Perm α
q : α
inst✝ : LinearOrder α
hxy : ⁅x, y⁻¹⁆ = ⁅x, y⁆
hy : ∀ (q : α), y q ≠ q
hy₂ : ∀ {r q : α}, r < q → y q < y r → r = y q
j : ℤ
hjq₂ : (⁅x, y⁆ ^ j) q = CycleMin ⁅x, y⁆ q
k : ℤ
h : y ((⁅x, y⁆ ^ (-k)) q) < y ((⁅x, y⁆ ^ j) q)
hkq₂ : (⁅x, y⁆ ^ k) (y q) = CycleMin ⁅x, y⁆ (y q)
⊢ False | case intro.refine'_2.intro.inl
α : Type u
inst✝² : Fintype α
inst✝¹ : DecidableEq α
x y : Perm α
q : α
inst✝ : LinearOrder α
hxy : ⁅x, y⁻¹⁆ = ⁅x, y⁆
hy : ∀ (q : α), y q ≠ q
hy₂ : ∀ {r q : α}, r < q → y q < y r → r = y q
j : ℤ
hjq₂ : (⁅x, y⁆ ^ j) q = CycleMin ⁅x, y⁆ q
k : ℤ
h : y ((⁅x, y⁆ ^ (-k)) q) < y ((⁅x, y⁆ ^ j) q)
hkq₂ : (⁅x, y⁆ ^ k) (y q) = CycleMin ⁅x, y⁆ (y q)
H : (⁅x, y⁆ ^ (-k)) q < (⁅x, y⁆ ^ j) q
⊢ False
case intro.refine'_2.intro.inr.inl
α : Type u
inst✝² : Fintype α
inst✝¹ : DecidableEq α
x y : Perm α
q : α
inst✝ : LinearOrder α
hxy : ⁅x, y⁻¹⁆ = ⁅x, y⁆
hy : ∀ (q : α), y q ≠ q
hy₂ : ∀ {r q : α}, r < q → y q < y r → r = y q
j : ℤ
hjq₂ : (⁅x, y⁆ ^ j) q = CycleMin ⁅x, y⁆ q
k : ℤ
h : y ((⁅x, y⁆ ^ (-k)) q) < y ((⁅x, y⁆ ^ j) q)
hkq₂ : (⁅x, y⁆ ^ k) (y q) = CycleMin ⁅x, y⁆ (y q)
H : (⁅x, y⁆ ^ (-k)) q = (⁅x, y⁆ ^ j) q
⊢ False
case intro.refine'_2.intro.inr.inr
α : Type u
inst✝² : Fintype α
inst✝¹ : DecidableEq α
x y : Perm α
q : α
inst✝ : LinearOrder α
hxy : ⁅x, y⁻¹⁆ = ⁅x, y⁆
hy : ∀ (q : α), y q ≠ q
hy₂ : ∀ {r q : α}, r < q → y q < y r → r = y q
j : ℤ
hjq₂ : (⁅x, y⁆ ^ j) q = CycleMin ⁅x, y⁆ q
k : ℤ
h : y ((⁅x, y⁆ ^ (-k)) q) < y ((⁅x, y⁆ ^ j) q)
hkq₂ : (⁅x, y⁆ ^ k) (y q) = CycleMin ⁅x, y⁆ (y q)
H : (⁅x, y⁆ ^ j) q < (⁅x, y⁆ ^ (-k)) q
⊢ False | Please generate a tactic in lean4 to solve the state.
STATE:
case intro.refine'_2.intro
α : Type u
inst✝² : Fintype α
inst✝¹ : DecidableEq α
x y : Perm α
q : α
inst✝ : LinearOrder α
hxy : ⁅x, y⁻¹⁆ = ⁅x, y⁆
hy : ∀ (q : α), y q ≠ q
hy₂ : ∀ {r q : α}, r < q → y q < y r → r = y q
j : ℤ
hjq₂ : (⁅x, y⁆ ^ j) q = CycleMin ⁅x, y⁆ q
k : ℤ
h : y ((⁅x, y⁆ ^ (-k)) q) < y ((⁅x, y⁆ ^ j) q)
hkq₂ : (⁅x, y⁆ ^ k) (y q) = CycleMin ⁅x, y⁆ (y q)
⊢ False
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/CommutatorCycles.lean | cycleMin_cmtr_right_apply_eq_apply_cycleMin_cmtr | [33, 1] | [48, 69] | exact (cycleMin_le ⁅x, y⁆ q ⟨-k, rfl⟩).not_lt (hjq₂.symm ▸ H) | case intro.refine'_2.intro.inl
α : Type u
inst✝² : Fintype α
inst✝¹ : DecidableEq α
x y : Perm α
q : α
inst✝ : LinearOrder α
hxy : ⁅x, y⁻¹⁆ = ⁅x, y⁆
hy : ∀ (q : α), y q ≠ q
hy₂ : ∀ {r q : α}, r < q → y q < y r → r = y q
j : ℤ
hjq₂ : (⁅x, y⁆ ^ j) q = CycleMin ⁅x, y⁆ q
k : ℤ
h : y ((⁅x, y⁆ ^ (-k)) q) < y ((⁅x, y⁆ ^ j) q)
hkq₂ : (⁅x, y⁆ ^ k) (y q) = CycleMin ⁅x, y⁆ (y q)
H : (⁅x, y⁆ ^ (-k)) q < (⁅x, y⁆ ^ j) q
⊢ False | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
case intro.refine'_2.intro.inl
α : Type u
inst✝² : Fintype α
inst✝¹ : DecidableEq α
x y : Perm α
q : α
inst✝ : LinearOrder α
hxy : ⁅x, y⁻¹⁆ = ⁅x, y⁆
hy : ∀ (q : α), y q ≠ q
hy₂ : ∀ {r q : α}, r < q → y q < y r → r = y q
j : ℤ
hjq₂ : (⁅x, y⁆ ^ j) q = CycleMin ⁅x, y⁆ q
k : ℤ
h : y ((⁅x, y⁆ ^ (-k)) q) < y ((⁅x, y⁆ ^ j) q)
hkq₂ : (⁅x, y⁆ ^ k) (y q) = CycleMin ⁅x, y⁆ (y q)
H : (⁅x, y⁆ ^ (-k)) q < (⁅x, y⁆ ^ j) q
⊢ False
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/CommutatorCycles.lean | cycleMin_cmtr_right_apply_eq_apply_cycleMin_cmtr | [33, 1] | [48, 69] | exact False.elim (lt_irrefl _ (H ▸ h)) | case intro.refine'_2.intro.inr.inl
α : Type u
inst✝² : Fintype α
inst✝¹ : DecidableEq α
x y : Perm α
q : α
inst✝ : LinearOrder α
hxy : ⁅x, y⁻¹⁆ = ⁅x, y⁆
hy : ∀ (q : α), y q ≠ q
hy₂ : ∀ {r q : α}, r < q → y q < y r → r = y q
j : ℤ
hjq₂ : (⁅x, y⁆ ^ j) q = CycleMin ⁅x, y⁆ q
k : ℤ
h : y ((⁅x, y⁆ ^ (-k)) q) < y ((⁅x, y⁆ ^ j) q)
hkq₂ : (⁅x, y⁆ ^ k) (y q) = CycleMin ⁅x, y⁆ (y q)
H : (⁅x, y⁆ ^ (-k)) q = (⁅x, y⁆ ^ j) q
⊢ False | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
case intro.refine'_2.intro.inr.inl
α : Type u
inst✝² : Fintype α
inst✝¹ : DecidableEq α
x y : Perm α
q : α
inst✝ : LinearOrder α
hxy : ⁅x, y⁻¹⁆ = ⁅x, y⁆
hy : ∀ (q : α), y q ≠ q
hy₂ : ∀ {r q : α}, r < q → y q < y r → r = y q
j : ℤ
hjq₂ : (⁅x, y⁆ ^ j) q = CycleMin ⁅x, y⁆ q
k : ℤ
h : y ((⁅x, y⁆ ^ (-k)) q) < y ((⁅x, y⁆ ^ j) q)
hkq₂ : (⁅x, y⁆ ^ k) (y q) = CycleMin ⁅x, y⁆ (y q)
H : (⁅x, y⁆ ^ (-k)) q = (⁅x, y⁆ ^ j) q
⊢ False
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/CommutatorCycles.lean | cycleMin_cmtr_right_apply_eq_apply_cycleMin_cmtr | [33, 1] | [48, 69] | exact cmtr_zpow_apply_ne_apply_cmtr_pow_apply hxy hy (hy₂ H h) | case intro.refine'_2.intro.inr.inr
α : Type u
inst✝² : Fintype α
inst✝¹ : DecidableEq α
x y : Perm α
q : α
inst✝ : LinearOrder α
hxy : ⁅x, y⁻¹⁆ = ⁅x, y⁆
hy : ∀ (q : α), y q ≠ q
hy₂ : ∀ {r q : α}, r < q → y q < y r → r = y q
j : ℤ
hjq₂ : (⁅x, y⁆ ^ j) q = CycleMin ⁅x, y⁆ q
k : ℤ
h : y ((⁅x, y⁆ ^ (-k)) q) < y ((⁅x, y⁆ ^ j) q)
hkq₂ : (⁅x, y⁆ ^ k) (y q) = CycleMin ⁅x, y⁆ (y q)
H : (⁅x, y⁆ ^ j) q < (⁅x, y⁆ ^ (-k)) q
⊢ False | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
case intro.refine'_2.intro.inr.inr
α : Type u
inst✝² : Fintype α
inst✝¹ : DecidableEq α
x y : Perm α
q : α
inst✝ : LinearOrder α
hxy : ⁅x, y⁻¹⁆ = ⁅x, y⁆
hy : ∀ (q : α), y q ≠ q
hy₂ : ∀ {r q : α}, r < q → y q < y r → r = y q
j : ℤ
hjq₂ : (⁅x, y⁆ ^ j) q = CycleMin ⁅x, y⁆ q
k : ℤ
h : y ((⁅x, y⁆ ^ (-k)) q) < y ((⁅x, y⁆ ^ j) q)
hkq₂ : (⁅x, y⁆ ^ k) (y q) = CycleMin ⁅x, y⁆ (y q)
H : (⁅x, y⁆ ^ j) q < (⁅x, y⁆ ^ (-k)) q
⊢ False
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | Equiv.Perm.cycleOf_pow_apply | [7, 1] | [15, 30] | induction' a with a IH generalizing y | α : Type ?u.39
π : Perm α
inst✝³ : DecidableEq α
inst✝² : Fintype α
β : Type v
inst✝¹ : DecidableEq β
inst✝ : Fintype β
f : Perm β
x y : β
a : ℕ
⊢ (f.cycleOf x ^ a) y = if f.SameCycle x y then (f ^ a) y else y | case zero
α : Type ?u.39
π : Perm α
inst✝³ : DecidableEq α
inst✝² : Fintype α
β : Type v
inst✝¹ : DecidableEq β
inst✝ : Fintype β
f : Perm β
x y : β
⊢ (f.cycleOf x ^ 0) y = if f.SameCycle x y then (f ^ 0) y else y
case succ
α : Type ?u.39
π : Perm α
inst✝³ : DecidableEq α
inst✝² : Fintype α
β : Type v
inst✝¹ : DecidableEq β
inst✝ : Fintype β
f : Perm β
x : β
a : ℕ
IH : ∀ (y : β), (f.cycleOf x ^ a) y = if f.SameCycle x y then (f ^ a) y else y
y : β
⊢ (f.cycleOf x ^ (a + 1)) y = if f.SameCycle x y then (f ^ (a + 1)) y else y | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type ?u.39
π : Perm α
inst✝³ : DecidableEq α
inst✝² : Fintype α
β : Type v
inst✝¹ : DecidableEq β
inst✝ : Fintype β
f : Perm β
x y : β
a : ℕ
⊢ (f.cycleOf x ^ a) y = if f.SameCycle x y then (f ^ a) y else y
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | Equiv.Perm.cycleOf_pow_apply | [7, 1] | [15, 30] | simp_rw [pow_zero, one_apply, ite_self] | case zero
α : Type ?u.39
π : Perm α
inst✝³ : DecidableEq α
inst✝² : Fintype α
β : Type v
inst✝¹ : DecidableEq β
inst✝ : Fintype β
f : Perm β
x y : β
⊢ (f.cycleOf x ^ 0) y = if f.SameCycle x y then (f ^ 0) y else y | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
case zero
α : Type ?u.39
π : Perm α
inst✝³ : DecidableEq α
inst✝² : Fintype α
β : Type v
inst✝¹ : DecidableEq β
inst✝ : Fintype β
f : Perm β
x y : β
⊢ (f.cycleOf x ^ 0) y = if f.SameCycle x y then (f ^ 0) y else y
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | Equiv.Perm.cycleOf_pow_apply | [7, 1] | [15, 30] | simp_rw [pow_succ', mul_apply, IH, cycleOf_apply] | case succ
α : Type ?u.39
π : Perm α
inst✝³ : DecidableEq α
inst✝² : Fintype α
β : Type v
inst✝¹ : DecidableEq β
inst✝ : Fintype β
f : Perm β
x : β
a : ℕ
IH : ∀ (y : β), (f.cycleOf x ^ a) y = if f.SameCycle x y then (f ^ a) y else y
y : β
⊢ (f.cycleOf x ^ (a + 1)) y = if f.SameCycle x y then (f ^ (a + 1)) y else y | case succ
α : Type ?u.39
π : Perm α
inst✝³ : DecidableEq α
inst✝² : Fintype α
β : Type v
inst✝¹ : DecidableEq β
inst✝ : Fintype β
f : Perm β
x : β
a : ℕ
IH : ∀ (y : β), (f.cycleOf x ^ a) y = if f.SameCycle x y then (f ^ a) y else y
y : β
⊢ (if f.SameCycle x (if f.SameCycle x y then (f ^ a) y else y) then f (if f.SameCycle x y then (f ^ a) y else y)
else if f.SameCycle x y then (f ^ a) y else y) =
if f.SameCycle x y then f ((f ^ a) y) else y | Please generate a tactic in lean4 to solve the state.
STATE:
case succ
α : Type ?u.39
π : Perm α
inst✝³ : DecidableEq α
inst✝² : Fintype α
β : Type v
inst✝¹ : DecidableEq β
inst✝ : Fintype β
f : Perm β
x : β
a : ℕ
IH : ∀ (y : β), (f.cycleOf x ^ a) y = if f.SameCycle x y then (f ^ a) y else y
y : β
⊢ (f.cycleOf x ^ (a + 1)) y = if f.SameCycle x y then (f ^ (a + 1)) y else y
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | Equiv.Perm.cycleOf_pow_apply | [7, 1] | [15, 30] | by_cases h : f.SameCycle x y | case succ
α : Type ?u.39
π : Perm α
inst✝³ : DecidableEq α
inst✝² : Fintype α
β : Type v
inst✝¹ : DecidableEq β
inst✝ : Fintype β
f : Perm β
x : β
a : ℕ
IH : ∀ (y : β), (f.cycleOf x ^ a) y = if f.SameCycle x y then (f ^ a) y else y
y : β
⊢ (if f.SameCycle x (if f.SameCycle x y then (f ^ a) y else y) then f (if f.SameCycle x y then (f ^ a) y else y)
else if f.SameCycle x y then (f ^ a) y else y) =
if f.SameCycle x y then f ((f ^ a) y) else y | case pos
α : Type ?u.39
π : Perm α
inst✝³ : DecidableEq α
inst✝² : Fintype α
β : Type v
inst✝¹ : DecidableEq β
inst✝ : Fintype β
f : Perm β
x : β
a : ℕ
IH : ∀ (y : β), (f.cycleOf x ^ a) y = if f.SameCycle x y then (f ^ a) y else y
y : β
h : f.SameCycle x y
⊢ (if f.SameCycle x (if f.SameCycle x y then (f ^ a) y else y) then f (if f.SameCycle x y then (f ^ a) y else y)
else if f.SameCycle x y then (f ^ a) y else y) =
if f.SameCycle x y then f ((f ^ a) y) else y
case neg
α : Type ?u.39
π : Perm α
inst✝³ : DecidableEq α
inst✝² : Fintype α
β : Type v
inst✝¹ : DecidableEq β
inst✝ : Fintype β
f : Perm β
x : β
a : ℕ
IH : ∀ (y : β), (f.cycleOf x ^ a) y = if f.SameCycle x y then (f ^ a) y else y
y : β
h : ¬f.SameCycle x y
⊢ (if f.SameCycle x (if f.SameCycle x y then (f ^ a) y else y) then f (if f.SameCycle x y then (f ^ a) y else y)
else if f.SameCycle x y then (f ^ a) y else y) =
if f.SameCycle x y then f ((f ^ a) y) else y | Please generate a tactic in lean4 to solve the state.
STATE:
case succ
α : Type ?u.39
π : Perm α
inst✝³ : DecidableEq α
inst✝² : Fintype α
β : Type v
inst✝¹ : DecidableEq β
inst✝ : Fintype β
f : Perm β
x : β
a : ℕ
IH : ∀ (y : β), (f.cycleOf x ^ a) y = if f.SameCycle x y then (f ^ a) y else y
y : β
⊢ (if f.SameCycle x (if f.SameCycle x y then (f ^ a) y else y) then f (if f.SameCycle x y then (f ^ a) y else y)
else if f.SameCycle x y then (f ^ a) y else y) =
if f.SameCycle x y then f ((f ^ a) y) else y
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | Equiv.Perm.cycleOf_pow_apply | [7, 1] | [15, 30] | simp only [h, ↓reduceIte, sameCycle_pow_right] | case pos
α : Type ?u.39
π : Perm α
inst✝³ : DecidableEq α
inst✝² : Fintype α
β : Type v
inst✝¹ : DecidableEq β
inst✝ : Fintype β
f : Perm β
x : β
a : ℕ
IH : ∀ (y : β), (f.cycleOf x ^ a) y = if f.SameCycle x y then (f ^ a) y else y
y : β
h : f.SameCycle x y
⊢ (if f.SameCycle x (if f.SameCycle x y then (f ^ a) y else y) then f (if f.SameCycle x y then (f ^ a) y else y)
else if f.SameCycle x y then (f ^ a) y else y) =
if f.SameCycle x y then f ((f ^ a) y) else y | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
case pos
α : Type ?u.39
π : Perm α
inst✝³ : DecidableEq α
inst✝² : Fintype α
β : Type v
inst✝¹ : DecidableEq β
inst✝ : Fintype β
f : Perm β
x : β
a : ℕ
IH : ∀ (y : β), (f.cycleOf x ^ a) y = if f.SameCycle x y then (f ^ a) y else y
y : β
h : f.SameCycle x y
⊢ (if f.SameCycle x (if f.SameCycle x y then (f ^ a) y else y) then f (if f.SameCycle x y then (f ^ a) y else y)
else if f.SameCycle x y then (f ^ a) y else y) =
if f.SameCycle x y then f ((f ^ a) y) else y
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | Equiv.Perm.cycleOf_pow_apply | [7, 1] | [15, 30] | simp only [h, ↓reduceIte] | case neg
α : Type ?u.39
π : Perm α
inst✝³ : DecidableEq α
inst✝² : Fintype α
β : Type v
inst✝¹ : DecidableEq β
inst✝ : Fintype β
f : Perm β
x : β
a : ℕ
IH : ∀ (y : β), (f.cycleOf x ^ a) y = if f.SameCycle x y then (f ^ a) y else y
y : β
h : ¬f.SameCycle x y
⊢ (if f.SameCycle x (if f.SameCycle x y then (f ^ a) y else y) then f (if f.SameCycle x y then (f ^ a) y else y)
else if f.SameCycle x y then (f ^ a) y else y) =
if f.SameCycle x y then f ((f ^ a) y) else y | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
case neg
α : Type ?u.39
π : Perm α
inst✝³ : DecidableEq α
inst✝² : Fintype α
β : Type v
inst✝¹ : DecidableEq β
inst✝ : Fintype β
f : Perm β
x : β
a : ℕ
IH : ∀ (y : β), (f.cycleOf x ^ a) y = if f.SameCycle x y then (f ^ a) y else y
y : β
h : ¬f.SameCycle x y
⊢ (if f.SameCycle x (if f.SameCycle x y then (f ^ a) y else y) then f (if f.SameCycle x y then (f ^ a) y else y)
else if f.SameCycle x y then (f ^ a) y else y) =
if f.SameCycle x y then f ((f ^ a) y) else y
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | Equiv.Perm.pow_apply_injOn_Iio_orderOf_cycleOf | [17, 1] | [26, 27] | rintro a ha b hb hab | α : Type u_1
π✝ : Perm α
inst✝³ : DecidableEq α
inst✝² : Fintype α
inst✝¹ : DecidableEq α
inst✝ : Fintype α
π : Perm α
x : α
⊢ Set.InjOn (fun t => (π ^ t) x) (Set.Iio (orderOf (π.cycleOf x))) | α : Type u_1
π✝ : Perm α
inst✝³ : DecidableEq α
inst✝² : Fintype α
inst✝¹ : DecidableEq α
inst✝ : Fintype α
π : Perm α
x : α
a : ℕ
ha : a ∈ Set.Iio (orderOf (π.cycleOf x))
b : ℕ
hb : b ∈ Set.Iio (orderOf (π.cycleOf x))
hab : (fun t => (π ^ t) x) a = (fun t => (π ^ t) x) b
⊢ a = b | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u_1
π✝ : Perm α
inst✝³ : DecidableEq α
inst✝² : Fintype α
inst✝¹ : DecidableEq α
inst✝ : Fintype α
π : Perm α
x : α
⊢ Set.InjOn (fun t => (π ^ t) x) (Set.Iio (orderOf (π.cycleOf x)))
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | Equiv.Perm.pow_apply_injOn_Iio_orderOf_cycleOf | [17, 1] | [26, 27] | refine' pow_injOn_Iio_orderOf ha hb (ext (fun y => _)) | α : Type u_1
π✝ : Perm α
inst✝³ : DecidableEq α
inst✝² : Fintype α
inst✝¹ : DecidableEq α
inst✝ : Fintype α
π : Perm α
x : α
a : ℕ
ha : a ∈ Set.Iio (orderOf (π.cycleOf x))
b : ℕ
hb : b ∈ Set.Iio (orderOf (π.cycleOf x))
hab : (fun t => (π ^ t) x) a = (fun t => (π ^ t) x) b
⊢ a = b | α : Type u_1
π✝ : Perm α
inst✝³ : DecidableEq α
inst✝² : Fintype α
inst✝¹ : DecidableEq α
inst✝ : Fintype α
π : Perm α
x : α
a : ℕ
ha : a ∈ Set.Iio (orderOf (π.cycleOf x))
b : ℕ
hb : b ∈ Set.Iio (orderOf (π.cycleOf x))
hab : (fun t => (π ^ t) x) a = (fun t => (π ^ t) x) b
y : α
⊢ ((fun x_1 => π.cycleOf x ^ x_1) a) y = ((fun x_1 => π.cycleOf x ^ x_1) b) y | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u_1
π✝ : Perm α
inst✝³ : DecidableEq α
inst✝² : Fintype α
inst✝¹ : DecidableEq α
inst✝ : Fintype α
π : Perm α
x : α
a : ℕ
ha : a ∈ Set.Iio (orderOf (π.cycleOf x))
b : ℕ
hb : b ∈ Set.Iio (orderOf (π.cycleOf x))
hab : (fun t => (π ^ t) x) a = (fun t => (π ^ t) x) b
⊢ a = b
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | Equiv.Perm.pow_apply_injOn_Iio_orderOf_cycleOf | [17, 1] | [26, 27] | simp_rw [cycleOf_pow_apply] | α : Type u_1
π✝ : Perm α
inst✝³ : DecidableEq α
inst✝² : Fintype α
inst✝¹ : DecidableEq α
inst✝ : Fintype α
π : Perm α
x : α
a : ℕ
ha : a ∈ Set.Iio (orderOf (π.cycleOf x))
b : ℕ
hb : b ∈ Set.Iio (orderOf (π.cycleOf x))
hab : (fun t => (π ^ t) x) a = (fun t => (π ^ t) x) b
y : α
⊢ ((fun x_1 => π.cycleOf x ^ x_1) a) y = ((fun x_1 => π.cycleOf x ^ x_1) b) y | α : Type u_1
π✝ : Perm α
inst✝³ : DecidableEq α
inst✝² : Fintype α
inst✝¹ : DecidableEq α
inst✝ : Fintype α
π : Perm α
x : α
a : ℕ
ha : a ∈ Set.Iio (orderOf (π.cycleOf x))
b : ℕ
hb : b ∈ Set.Iio (orderOf (π.cycleOf x))
hab : (fun t => (π ^ t) x) a = (fun t => (π ^ t) x) b
y : α
⊢ (if π.SameCycle x y then (π ^ a) y else y) = if π.SameCycle x y then (π ^ b) y else y | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u_1
π✝ : Perm α
inst✝³ : DecidableEq α
inst✝² : Fintype α
inst✝¹ : DecidableEq α
inst✝ : Fintype α
π : Perm α
x : α
a : ℕ
ha : a ∈ Set.Iio (orderOf (π.cycleOf x))
b : ℕ
hb : b ∈ Set.Iio (orderOf (π.cycleOf x))
hab : (fun t => (π ^ t) x) a = (fun t => (π ^ t) x) b
y : α
⊢ ((fun x_1 => π.cycleOf x ^ x_1) a) y = ((fun x_1 => π.cycleOf x ^ x_1) b) y
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | Equiv.Perm.pow_apply_injOn_Iio_orderOf_cycleOf | [17, 1] | [26, 27] | by_cases h : SameCycle π x y | α : Type u_1
π✝ : Perm α
inst✝³ : DecidableEq α
inst✝² : Fintype α
inst✝¹ : DecidableEq α
inst✝ : Fintype α
π : Perm α
x : α
a : ℕ
ha : a ∈ Set.Iio (orderOf (π.cycleOf x))
b : ℕ
hb : b ∈ Set.Iio (orderOf (π.cycleOf x))
hab : (fun t => (π ^ t) x) a = (fun t => (π ^ t) x) b
y : α
⊢ (if π.SameCycle x y then (π ^ a) y else y) = if π.SameCycle x y then (π ^ b) y else y | case pos
α : Type u_1
π✝ : Perm α
inst✝³ : DecidableEq α
inst✝² : Fintype α
inst✝¹ : DecidableEq α
inst✝ : Fintype α
π : Perm α
x : α
a : ℕ
ha : a ∈ Set.Iio (orderOf (π.cycleOf x))
b : ℕ
hb : b ∈ Set.Iio (orderOf (π.cycleOf x))
hab : (fun t => (π ^ t) x) a = (fun t => (π ^ t) x) b
y : α
h : π.SameCycle x y
⊢ (if π.SameCycle x y then (π ^ a) y else y) = if π.SameCycle x y then (π ^ b) y else y
case neg
α : Type u_1
π✝ : Perm α
inst✝³ : DecidableEq α
inst✝² : Fintype α
inst✝¹ : DecidableEq α
inst✝ : Fintype α
π : Perm α
x : α
a : ℕ
ha : a ∈ Set.Iio (orderOf (π.cycleOf x))
b : ℕ
hb : b ∈ Set.Iio (orderOf (π.cycleOf x))
hab : (fun t => (π ^ t) x) a = (fun t => (π ^ t) x) b
y : α
h : ¬π.SameCycle x y
⊢ (if π.SameCycle x y then (π ^ a) y else y) = if π.SameCycle x y then (π ^ b) y else y | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u_1
π✝ : Perm α
inst✝³ : DecidableEq α
inst✝² : Fintype α
inst✝¹ : DecidableEq α
inst✝ : Fintype α
π : Perm α
x : α
a : ℕ
ha : a ∈ Set.Iio (orderOf (π.cycleOf x))
b : ℕ
hb : b ∈ Set.Iio (orderOf (π.cycleOf x))
hab : (fun t => (π ^ t) x) a = (fun t => (π ^ t) x) b
y : α
⊢ (if π.SameCycle x y then (π ^ a) y else y) = if π.SameCycle x y then (π ^ b) y else y
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | Equiv.Perm.pow_apply_injOn_Iio_orderOf_cycleOf | [17, 1] | [26, 27] | simp_rw [h, ite_true] | case pos
α : Type u_1
π✝ : Perm α
inst✝³ : DecidableEq α
inst✝² : Fintype α
inst✝¹ : DecidableEq α
inst✝ : Fintype α
π : Perm α
x : α
a : ℕ
ha : a ∈ Set.Iio (orderOf (π.cycleOf x))
b : ℕ
hb : b ∈ Set.Iio (orderOf (π.cycleOf x))
hab : (fun t => (π ^ t) x) a = (fun t => (π ^ t) x) b
y : α
h : π.SameCycle x y
⊢ (if π.SameCycle x y then (π ^ a) y else y) = if π.SameCycle x y then (π ^ b) y else y | case pos
α : Type u_1
π✝ : Perm α
inst✝³ : DecidableEq α
inst✝² : Fintype α
inst✝¹ : DecidableEq α
inst✝ : Fintype α
π : Perm α
x : α
a : ℕ
ha : a ∈ Set.Iio (orderOf (π.cycleOf x))
b : ℕ
hb : b ∈ Set.Iio (orderOf (π.cycleOf x))
hab : (fun t => (π ^ t) x) a = (fun t => (π ^ t) x) b
y : α
h : π.SameCycle x y
⊢ (π ^ a) y = (π ^ b) y | Please generate a tactic in lean4 to solve the state.
STATE:
case pos
α : Type u_1
π✝ : Perm α
inst✝³ : DecidableEq α
inst✝² : Fintype α
inst✝¹ : DecidableEq α
inst✝ : Fintype α
π : Perm α
x : α
a : ℕ
ha : a ∈ Set.Iio (orderOf (π.cycleOf x))
b : ℕ
hb : b ∈ Set.Iio (orderOf (π.cycleOf x))
hab : (fun t => (π ^ t) x) a = (fun t => (π ^ t) x) b
y : α
h : π.SameCycle x y
⊢ (if π.SameCycle x y then (π ^ a) y else y) = if π.SameCycle x y then (π ^ b) y else y
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | Equiv.Perm.pow_apply_injOn_Iio_orderOf_cycleOf | [17, 1] | [26, 27] | rcases h with ⟨c, rfl⟩ | case pos
α : Type u_1
π✝ : Perm α
inst✝³ : DecidableEq α
inst✝² : Fintype α
inst✝¹ : DecidableEq α
inst✝ : Fintype α
π : Perm α
x : α
a : ℕ
ha : a ∈ Set.Iio (orderOf (π.cycleOf x))
b : ℕ
hb : b ∈ Set.Iio (orderOf (π.cycleOf x))
hab : (fun t => (π ^ t) x) a = (fun t => (π ^ t) x) b
y : α
h : π.SameCycle x y
⊢ (π ^ a) y = (π ^ b) y | case pos.intro
α : Type u_1
π✝ : Perm α
inst✝³ : DecidableEq α
inst✝² : Fintype α
inst✝¹ : DecidableEq α
inst✝ : Fintype α
π : Perm α
x : α
a : ℕ
ha : a ∈ Set.Iio (orderOf (π.cycleOf x))
b : ℕ
hb : b ∈ Set.Iio (orderOf (π.cycleOf x))
hab : (fun t => (π ^ t) x) a = (fun t => (π ^ t) x) b
c : ℤ
⊢ (π ^ a) ((π ^ c) x) = (π ^ b) ((π ^ c) x) | Please generate a tactic in lean4 to solve the state.
STATE:
case pos
α : Type u_1
π✝ : Perm α
inst✝³ : DecidableEq α
inst✝² : Fintype α
inst✝¹ : DecidableEq α
inst✝ : Fintype α
π : Perm α
x : α
a : ℕ
ha : a ∈ Set.Iio (orderOf (π.cycleOf x))
b : ℕ
hb : b ∈ Set.Iio (orderOf (π.cycleOf x))
hab : (fun t => (π ^ t) x) a = (fun t => (π ^ t) x) b
y : α
h : π.SameCycle x y
⊢ (π ^ a) y = (π ^ b) y
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | Equiv.Perm.pow_apply_injOn_Iio_orderOf_cycleOf | [17, 1] | [26, 27] | simp_rw [← zpow_natCast, zpow_apply_comm, zpow_natCast, hab] | case pos.intro
α : Type u_1
π✝ : Perm α
inst✝³ : DecidableEq α
inst✝² : Fintype α
inst✝¹ : DecidableEq α
inst✝ : Fintype α
π : Perm α
x : α
a : ℕ
ha : a ∈ Set.Iio (orderOf (π.cycleOf x))
b : ℕ
hb : b ∈ Set.Iio (orderOf (π.cycleOf x))
hab : (fun t => (π ^ t) x) a = (fun t => (π ^ t) x) b
c : ℤ
⊢ (π ^ a) ((π ^ c) x) = (π ^ b) ((π ^ c) x) | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
case pos.intro
α : Type u_1
π✝ : Perm α
inst✝³ : DecidableEq α
inst✝² : Fintype α
inst✝¹ : DecidableEq α
inst✝ : Fintype α
π : Perm α
x : α
a : ℕ
ha : a ∈ Set.Iio (orderOf (π.cycleOf x))
b : ℕ
hb : b ∈ Set.Iio (orderOf (π.cycleOf x))
hab : (fun t => (π ^ t) x) a = (fun t => (π ^ t) x) b
c : ℤ
⊢ (π ^ a) ((π ^ c) x) = (π ^ b) ((π ^ c) x)
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | Equiv.Perm.pow_apply_injOn_Iio_orderOf_cycleOf | [17, 1] | [26, 27] | simp_rw [h, ite_false] | case neg
α : Type u_1
π✝ : Perm α
inst✝³ : DecidableEq α
inst✝² : Fintype α
inst✝¹ : DecidableEq α
inst✝ : Fintype α
π : Perm α
x : α
a : ℕ
ha : a ∈ Set.Iio (orderOf (π.cycleOf x))
b : ℕ
hb : b ∈ Set.Iio (orderOf (π.cycleOf x))
hab : (fun t => (π ^ t) x) a = (fun t => (π ^ t) x) b
y : α
h : ¬π.SameCycle x y
⊢ (if π.SameCycle x y then (π ^ a) y else y) = if π.SameCycle x y then (π ^ b) y else y | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
case neg
α : Type u_1
π✝ : Perm α
inst✝³ : DecidableEq α
inst✝² : Fintype α
inst✝¹ : DecidableEq α
inst✝ : Fintype α
π : Perm α
x : α
a : ℕ
ha : a ∈ Set.Iio (orderOf (π.cycleOf x))
b : ℕ
hb : b ∈ Set.Iio (orderOf (π.cycleOf x))
hab : (fun t => (π ^ t) x) a = (fun t => (π ^ t) x) b
y : α
h : ¬π.SameCycle x y
⊢ (if π.SameCycle x y then (π ^ a) y else y) = if π.SameCycle x y then (π ^ b) y else y
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | mem_cycleAt_iff | [43, 1] | [45, 52] | simp_rw [CycleAt, mem_filter, mem_univ, true_and] | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
y x : α
⊢ y ∈ CycleAt π x ↔ π.SameCycle x y | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
y x : α
⊢ y ∈ CycleAt π x ↔ π.SameCycle x y
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | mem_cycleAt_iff_zpow | [47, 1] | [49, 6] | simp_rw [mem_cycleAt_iff] | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
y x : α
⊢ y ∈ CycleAt π x ↔ ∃ k, (π ^ k) x = y | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
y x : α
⊢ π.SameCycle x y ↔ ∃ k, (π ^ k) x = y | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
y x : α
⊢ y ∈ CycleAt π x ↔ ∃ k, (π ^ k) x = y
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | mem_cycleAt_iff_zpow | [47, 1] | [49, 6] | rfl | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
y x : α
⊢ π.SameCycle x y ↔ ∃ k, (π ^ k) x = y | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
y x : α
⊢ π.SameCycle x y ↔ ∃ k, (π ^ k) x = y
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | cycleAt_of_fixed | [69, 1] | [71, 39] | simp_rw [Finset.ext_iff, mem_cycleAt_iff_zpow, mem_singleton, (fun k => (h.perm_zpow k).eq),
exists_const, eq_comm, implies_true] | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x : α
h : Function.IsFixedPt (⇑π) x
⊢ CycleAt π x = {x} | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x : α
h : Function.IsFixedPt (⇑π) x
⊢ CycleAt π x = {x}
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | card_cycleAt_eq_one_iff_fixedPt | [82, 1] | [87, 25] | rw [Finset.card_eq_one, fixedPt_iff_cycleAt_singleton] | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x : α
⊢ Function.IsFixedPt (⇑π) x ↔ (CycleAt π x).card = 1 | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x : α
⊢ CycleAt π x = {x} ↔ ∃ a, CycleAt π x = {a} | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x : α
⊢ Function.IsFixedPt (⇑π) x ↔ (CycleAt π x).card = 1
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | card_cycleAt_eq_one_iff_fixedPt | [82, 1] | [87, 25] | refine ⟨fun hx => ⟨_, hx⟩, ?_⟩ | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x : α
⊢ CycleAt π x = {x} ↔ ∃ a, CycleAt π x = {a} | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x : α
⊢ (∃ a, CycleAt π x = {a}) → CycleAt π x = {x} | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x : α
⊢ CycleAt π x = {x} ↔ ∃ a, CycleAt π x = {a}
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | card_cycleAt_eq_one_iff_fixedPt | [82, 1] | [87, 25] | rintro ⟨_, hx⟩ | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x : α
⊢ (∃ a, CycleAt π x = {a}) → CycleAt π x = {x} | case intro
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x w✝ : α
hx : CycleAt π x = {w✝}
⊢ CycleAt π x = {x} | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x : α
⊢ (∃ a, CycleAt π x = {a}) → CycleAt π x = {x}
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | card_cycleAt_eq_one_iff_fixedPt | [82, 1] | [87, 25] | rw [hx, singleton_inj, eq_comm, ← mem_singleton, ← hx] | case intro
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x w✝ : α
hx : CycleAt π x = {w✝}
⊢ CycleAt π x = {x} | case intro
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x w✝ : α
hx : CycleAt π x = {w✝}
⊢ x ∈ CycleAt π x | Please generate a tactic in lean4 to solve the state.
STATE:
case intro
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x w✝ : α
hx : CycleAt π x = {w✝}
⊢ CycleAt π x = {x}
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | card_cycleAt_eq_one_iff_fixedPt | [82, 1] | [87, 25] | exact self_mem_cycleAt | case intro
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x w✝ : α
hx : CycleAt π x = {w✝}
⊢ x ∈ CycleAt π x | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
case intro
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x w✝ : α
hx : CycleAt π x = {w✝}
⊢ x ∈ CycleAt π x
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | cycleAt_apply_eq_cycleAt | [89, 1] | [90, 85] | simp_rw [Finset.ext_iff, mem_cycleAt_iff, Perm.sameCycle_apply_left, implies_true] | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x : α
⊢ CycleAt π (π x) = CycleAt π x | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x : α
⊢ CycleAt π (π x) = CycleAt π x
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | mem_cycleAt_iff_lt | [92, 1] | [100, 19] | rw [mem_cycleAt_iff] | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
y x : α
⊢ y ∈ CycleAt π x ↔ ∃ b < orderOf (π.cycleOf x), (π ^ b) x = y | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
y x : α
⊢ π.SameCycle x y ↔ ∃ b < orderOf (π.cycleOf x), (π ^ b) x = y | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
y x : α
⊢ y ∈ CycleAt π x ↔ ∃ b < orderOf (π.cycleOf x), (π ^ b) x = y
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | mem_cycleAt_iff_lt | [92, 1] | [100, 19] | refine ⟨?_, ?_⟩ | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
y x : α
⊢ π.SameCycle x y ↔ ∃ b < orderOf (π.cycleOf x), (π ^ b) x = y | case refine_1
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
y x : α
⊢ π.SameCycle x y → ∃ b < orderOf (π.cycleOf x), (π ^ b) x = y
case refine_2
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
y x : α
⊢ (∃ b < orderOf (π.cycleOf x), (π ^ b) x = y) → π.SameCycle x y | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
y x : α
⊢ π.SameCycle x y ↔ ∃ b < orderOf (π.cycleOf x), (π ^ b) x = y
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | mem_cycleAt_iff_lt | [92, 1] | [100, 19] | rintro hb | case refine_1
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
y x : α
⊢ π.SameCycle x y → ∃ b < orderOf (π.cycleOf x), (π ^ b) x = y | case refine_1
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
y x : α
hb : π.SameCycle x y
⊢ ∃ b < orderOf (π.cycleOf x), (π ^ b) x = y | Please generate a tactic in lean4 to solve the state.
STATE:
case refine_1
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
y x : α
⊢ π.SameCycle x y → ∃ b < orderOf (π.cycleOf x), (π ^ b) x = y
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | mem_cycleAt_iff_lt | [92, 1] | [100, 19] | rcases (hb.exists_pow_eq π) with ⟨b, _, _, rfl⟩ | case refine_1
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
y x : α
hb : π.SameCycle x y
⊢ ∃ b < orderOf (π.cycleOf x), (π ^ b) x = y | case refine_1.intro.intro.intro
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x : α
b : ℕ
left✝¹ : 0 < b
left✝ : b ≤ (π.cycleOf x).support.card + 1
hb : π.SameCycle x ((π ^ b) x)
⊢ ∃ b_1 < orderOf (π.cycleOf x), (π ^ b_1) x = (π ^ b) x | Please generate a tactic in lean4 to solve the state.
STATE:
case refine_1
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
y x : α
hb : π.SameCycle x y
⊢ ∃ b < orderOf (π.cycleOf x), (π ^ b) x = y
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | mem_cycleAt_iff_lt | [92, 1] | [100, 19] | refine ⟨b % orderOf (π.cycleOf x), Nat.mod_lt _ (orderOf_pos _),
(π.pow_mod_orderOf_cycleOf_apply _ _)⟩ | case refine_1.intro.intro.intro
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x : α
b : ℕ
left✝¹ : 0 < b
left✝ : b ≤ (π.cycleOf x).support.card + 1
hb : π.SameCycle x ((π ^ b) x)
⊢ ∃ b_1 < orderOf (π.cycleOf x), (π ^ b_1) x = (π ^ b) x | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
case refine_1.intro.intro.intro
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x : α
b : ℕ
left✝¹ : 0 < b
left✝ : b ≤ (π.cycleOf x).support.card + 1
hb : π.SameCycle x ((π ^ b) x)
⊢ ∃ b_1 < orderOf (π.cycleOf x), (π ^ b_1) x = (π ^ b) x
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | mem_cycleAt_iff_lt | [92, 1] | [100, 19] | rintro ⟨b, _, rfl⟩ | case refine_2
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
y x : α
⊢ (∃ b < orderOf (π.cycleOf x), (π ^ b) x = y) → π.SameCycle x y | case refine_2.intro.intro
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x : α
b : ℕ
left✝ : b < orderOf (π.cycleOf x)
⊢ π.SameCycle x ((π ^ b) x) | Please generate a tactic in lean4 to solve the state.
STATE:
case refine_2
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
y x : α
⊢ (∃ b < orderOf (π.cycleOf x), (π ^ b) x = y) → π.SameCycle x y
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | mem_cycleAt_iff_lt | [92, 1] | [100, 19] | exact ⟨b, rfl⟩ | case refine_2.intro.intro
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x : α
b : ℕ
left✝ : b < orderOf (π.cycleOf x)
⊢ π.SameCycle x ((π ^ b) x) | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
case refine_2.intro.intro
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x : α
b : ℕ
left✝ : b < orderOf (π.cycleOf x)
⊢ π.SameCycle x ((π ^ b) x)
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | mem_cycleAt_iff_le | [102, 1] | [103, 67] | simp_rw [mem_cycleAt_iff_lt, Nat.lt_iff_le_pred (orderOf_pos _)] | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
y x : α
⊢ y ∈ CycleAt π x ↔ ∃ b ≤ orderOf (π.cycleOf x) - 1, (π ^ b) x = y | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
y x : α
⊢ y ∈ CycleAt π x ↔ ∃ b ≤ orderOf (π.cycleOf x) - 1, (π ^ b) x = y
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | mem_cycleAtTo_iff | [108, 1] | [110, 54] | simp_rw [CycleAtTo, Finset.mem_image, Finset.mem_Iio] | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
y : α
a : ℕ
x : α
⊢ y ∈ CycleAtTo π a x ↔ ∃ b < a, (π ^ b) x = y | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
y : α
a : ℕ
x : α
⊢ y ∈ CycleAtTo π a x ↔ ∃ b < a, (π ^ b) x = y
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | apply_pow_mem_cycleAtTo_apply_pow_of_ge_of_lt | [115, 1] | [118, 73] | rw [← tsub_add_cancel_of_le hcb, pow_add, Perm.mul_apply] | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
b a c : ℕ
x : α
hba : b < a + c
hcb : c ≤ b
⊢ (π ^ b) x ∈ CycleAtTo π a ((π ^ c) x) | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
b a c : ℕ
x : α
hba : b < a + c
hcb : c ≤ b
⊢ (π ^ (b - c)) ((π ^ c) x) ∈ CycleAtTo π a ((π ^ c) x) | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
b a c : ℕ
x : α
hba : b < a + c
hcb : c ≤ b
⊢ (π ^ b) x ∈ CycleAtTo π a ((π ^ c) x)
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | apply_pow_mem_cycleAtTo_apply_pow_of_ge_of_lt | [115, 1] | [118, 73] | exact apply_pow_mem_cycleAtTo_of_lt (Nat.sub_lt_right_of_lt_add hcb hba) | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
b a c : ℕ
x : α
hba : b < a + c
hcb : c ≤ b
⊢ (π ^ (b - c)) ((π ^ c) x) ∈ CycleAtTo π a ((π ^ c) x) | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
b a c : ℕ
x : α
hba : b < a + c
hcb : c ≤ b
⊢ (π ^ (b - c)) ((π ^ c) x) ∈ CycleAtTo π a ((π ^ c) x)
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | cycleAtTo_zero | [126, 1] | [128, 33] | simp_rw [Finset.ext_iff, mem_cycleAtTo_iff, not_lt_zero', false_and, exists_false,
not_mem_empty, implies_true] | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x : α
⊢ CycleAtTo π 0 x = ∅ | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x : α
⊢ CycleAtTo π 0 x = ∅
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | cycleAtTo_one | [130, 1] | [132, 58] | simp_rw [Finset.ext_iff, mem_cycleAtTo_iff, Nat.lt_one_iff, exists_eq_left, pow_zero,
Perm.one_apply, mem_singleton, eq_comm, implies_true] | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x : α
⊢ CycleAtTo π 1 x = {x} | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x : α
⊢ CycleAtTo π 1 x = {x}
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | cycleAtTo_singleton_of_fixedPt | [134, 1] | [138, 59] | simp_rw [Finset.ext_iff, mem_singleton, mem_cycleAtTo_iff,
π.pow_apply_eq_self_of_apply_eq_self h, eq_comm (a := x)] | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
ha : 0 < a
h : Function.IsFixedPt (⇑π) x
⊢ CycleAtTo π a x = {x} | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
ha : 0 < a
h : Function.IsFixedPt (⇑π) x
⊢ ∀ (a_1 : α), (∃ b < a, a_1 = x) ↔ a_1 = x | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
ha : 0 < a
h : Function.IsFixedPt (⇑π) x
⊢ CycleAtTo π a x = {x}
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | cycleAtTo_singleton_of_fixedPt | [134, 1] | [138, 59] | exact fun _ => ⟨fun ⟨_, _, h⟩ => h, fun h => ⟨0, ha, h⟩⟩ | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
ha : 0 < a
h : Function.IsFixedPt (⇑π) x
⊢ ∀ (a_1 : α), (∃ b < a, a_1 = x) ↔ a_1 = x | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
ha : 0 < a
h : Function.IsFixedPt (⇑π) x
⊢ ∀ (a_1 : α), (∃ b < a, a_1 = x) ↔ a_1 = x
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | cycleAtTo_mono | [140, 1] | [144, 40] | intros a b hab x y h | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
⊢ Monotone fun x => CycleAtTo π x | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a b : ℕ
hab : a ≤ b
x y : α
h : y ∈ (fun x => CycleAtTo π x) a x
⊢ y ∈ (fun x => CycleAtTo π x) b x | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
⊢ Monotone fun x => CycleAtTo π x
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | cycleAtTo_mono | [140, 1] | [144, 40] | rw [mem_cycleAtTo_iff] at h ⊢ | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a b : ℕ
hab : a ≤ b
x y : α
h : y ∈ (fun x => CycleAtTo π x) a x
⊢ y ∈ (fun x => CycleAtTo π x) b x | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a b : ℕ
hab : a ≤ b
x y : α
h : ∃ b < a, (π ^ b) x = y
⊢ ∃ b_1 < b, (π ^ b_1) x = y | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a b : ℕ
hab : a ≤ b
x y : α
h : y ∈ (fun x => CycleAtTo π x) a x
⊢ y ∈ (fun x => CycleAtTo π x) b x
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | cycleAtTo_mono | [140, 1] | [144, 40] | rcases h with ⟨c, hca, hc⟩ | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a b : ℕ
hab : a ≤ b
x y : α
h : ∃ b < a, (π ^ b) x = y
⊢ ∃ b_1 < b, (π ^ b_1) x = y | case intro.intro
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a b : ℕ
hab : a ≤ b
x y : α
c : ℕ
hca : c < a
hc : (π ^ c) x = y
⊢ ∃ b_1 < b, (π ^ b_1) x = y | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a b : ℕ
hab : a ≤ b
x y : α
h : ∃ b < a, (π ^ b) x = y
⊢ ∃ b_1 < b, (π ^ b_1) x = y
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | cycleAtTo_mono | [140, 1] | [144, 40] | exact ⟨c, lt_of_lt_of_le hca hab, hc⟩ | case intro.intro
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a b : ℕ
hab : a ≤ b
x y : α
c : ℕ
hca : c < a
hc : (π ^ c) x = y
⊢ ∃ b_1 < b, (π ^ b_1) x = y | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
case intro.intro
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a b : ℕ
hab : a ≤ b
x y : α
c : ℕ
hca : c < a
hc : (π ^ c) x = y
⊢ ∃ b_1 < b, (π ^ b_1) x = y
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | card_cycleAtTo_le | [149, 1] | [151, 30] | convert Finset.card_image_le | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
⊢ (CycleAtTo π a x).card ≤ a | case h.e'_4
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
⊢ a = (Iio a).card | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
⊢ (CycleAtTo π a x).card ≤ a
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | card_cycleAtTo_le | [149, 1] | [151, 30] | exact (Nat.card_Iio _).symm | case h.e'_4
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
⊢ a = (Iio a).card | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
case h.e'_4
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
⊢ a = (Iio a).card
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | cycleAtTo_card_eq_of_le_orderOf_cycleOf | [153, 1] | [159, 94] | nth_rewrite 2 [← Nat.card_Iio a] | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
h : a ≤ orderOf (π.cycleOf x)
⊢ (CycleAtTo π a x).card = a | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
h : a ≤ orderOf (π.cycleOf x)
⊢ (CycleAtTo π a x).card = (Iio a).card | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
h : a ≤ orderOf (π.cycleOf x)
⊢ (CycleAtTo π a x).card = a
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | cycleAtTo_card_eq_of_le_orderOf_cycleOf | [153, 1] | [159, 94] | apply Finset.card_image_iff.mpr | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
h : a ≤ orderOf (π.cycleOf x)
⊢ (CycleAtTo π a x).card = (Iio a).card | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
h : a ≤ orderOf (π.cycleOf x)
⊢ Set.InjOn (fun k => (π ^ k) x) ↑(Iio a) | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
h : a ≤ orderOf (π.cycleOf x)
⊢ (CycleAtTo π a x).card = (Iio a).card
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | cycleAtTo_card_eq_of_le_orderOf_cycleOf | [153, 1] | [159, 94] | intros b hb c hc hbc | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
h : a ≤ orderOf (π.cycleOf x)
⊢ Set.InjOn (fun k => (π ^ k) x) ↑(Iio a) | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
h : a ≤ orderOf (π.cycleOf x)
b : ℕ
hb : b ∈ ↑(Iio a)
c : ℕ
hc : c ∈ ↑(Iio a)
hbc : (fun k => (π ^ k) x) b = (fun k => (π ^ k) x) c
⊢ b = c | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
h : a ≤ orderOf (π.cycleOf x)
⊢ Set.InjOn (fun k => (π ^ k) x) ↑(Iio a)
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | cycleAtTo_card_eq_of_le_orderOf_cycleOf | [153, 1] | [159, 94] | simp_rw [coe_Iio, Set.mem_Iio] at hb hc | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
h : a ≤ orderOf (π.cycleOf x)
b : ℕ
hb : b ∈ ↑(Iio a)
c : ℕ
hc : c ∈ ↑(Iio a)
hbc : (fun k => (π ^ k) x) b = (fun k => (π ^ k) x) c
⊢ b = c | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
h : a ≤ orderOf (π.cycleOf x)
b c : ℕ
hbc : (fun k => (π ^ k) x) b = (fun k => (π ^ k) x) c
hb : b < a
hc : c < a
⊢ b = c | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
h : a ≤ orderOf (π.cycleOf x)
b : ℕ
hb : b ∈ ↑(Iio a)
c : ℕ
hc : c ∈ ↑(Iio a)
hbc : (fun k => (π ^ k) x) b = (fun k => (π ^ k) x) c
⊢ b = c
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | cycleAtTo_card_eq_of_le_orderOf_cycleOf | [153, 1] | [159, 94] | exact π.pow_apply_injOn_Iio_orderOf_cycleOf (lt_of_lt_of_le hb h) (lt_of_lt_of_le hc h) hbc | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
h : a ≤ orderOf (π.cycleOf x)
b c : ℕ
hbc : (fun k => (π ^ k) x) b = (fun k => (π ^ k) x) c
hb : b < a
hc : c < a
⊢ b = c | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
h : a ≤ orderOf (π.cycleOf x)
b c : ℕ
hbc : (fun k => (π ^ k) x) b = (fun k => (π ^ k) x) c
hb : b < a
hc : c < a
⊢ b = c
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | cycleAtTo_subset_cycleAt | [161, 1] | [164, 36] | rintro y hy | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
⊢ CycleAtTo π a x ⊆ CycleAt π x | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x y : α
hy : y ∈ CycleAtTo π a x
⊢ y ∈ CycleAt π x | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
⊢ CycleAtTo π a x ⊆ CycleAt π x
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | cycleAtTo_subset_cycleAt | [161, 1] | [164, 36] | rcases (mem_cycleAtTo_iff.mp hy) with ⟨b, _, hb⟩ | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x y : α
hy : y ∈ CycleAtTo π a x
⊢ y ∈ CycleAt π x | case intro.intro
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x y : α
hy : y ∈ CycleAtTo π a x
b : ℕ
left✝ : b < a
hb : (π ^ b) x = y
⊢ y ∈ CycleAt π x | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x y : α
hy : y ∈ CycleAtTo π a x
⊢ y ∈ CycleAt π x
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | cycleAtTo_subset_cycleAt | [161, 1] | [164, 36] | exact mem_cycleAt_iff.mpr ⟨b, hb⟩ | case intro.intro
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x y : α
hy : y ∈ CycleAtTo π a x
b : ℕ
left✝ : b < a
hb : (π ^ b) x = y
⊢ y ∈ CycleAt π x | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
case intro.intro
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x y : α
hy : y ∈ CycleAtTo π a x
b : ℕ
left✝ : b < a
hb : (π ^ b) x = y
⊢ y ∈ CycleAt π x
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | cycleAt_eq_cycleAtTo_orderOf_cycleOf | [166, 1] | [168, 80] | simp_rw [Finset.ext_iff, mem_cycleAtTo_iff, mem_cycleAt_iff_lt, implies_true] | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x : α
⊢ CycleAt π x = CycleAtTo π (orderOf (π.cycleOf x)) x | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x : α
⊢ CycleAt π x = CycleAtTo π (orderOf (π.cycleOf x)) x
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | cycleAt_card_eq_orderOf_cycleOf | [170, 1] | [172, 102] | simp_rw [cycleAt_eq_cycleAtTo_orderOf_cycleOf, cycleAtTo_card_eq_of_le_orderOf_cycleOf (le_refl _)] | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x : α
⊢ orderOf (π.cycleOf x) = (CycleAt π x).card | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x : α
⊢ orderOf (π.cycleOf x) = (CycleAt π x).card
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | cycleAt_eq_cycleAtTo_ge_orderOf_cycleOf | [174, 1] | [179, 33] | refine le_antisymm ?_ ?_ | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x : α
a : ℕ
ha : orderOf (π.cycleOf x) ≤ a
⊢ CycleAt π x = CycleAtTo π a x | case refine_1
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x : α
a : ℕ
ha : orderOf (π.cycleOf x) ≤ a
⊢ CycleAt π x ≤ CycleAtTo π a x
case refine_2
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x : α
a : ℕ
ha : orderOf (π.cycleOf x) ≤ a
⊢ CycleAtTo π a x ≤ CycleAt π x | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x : α
a : ℕ
ha : orderOf (π.cycleOf x) ≤ a
⊢ CycleAt π x = CycleAtTo π a x
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | cycleAt_eq_cycleAtTo_ge_orderOf_cycleOf | [174, 1] | [179, 33] | rw [cycleAt_eq_cycleAtTo_orderOf_cycleOf] | case refine_1
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x : α
a : ℕ
ha : orderOf (π.cycleOf x) ≤ a
⊢ CycleAt π x ≤ CycleAtTo π a x | case refine_1
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x : α
a : ℕ
ha : orderOf (π.cycleOf x) ≤ a
⊢ CycleAtTo π (orderOf (π.cycleOf x)) x ≤ CycleAtTo π a x | Please generate a tactic in lean4 to solve the state.
STATE:
case refine_1
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x : α
a : ℕ
ha : orderOf (π.cycleOf x) ≤ a
⊢ CycleAt π x ≤ CycleAtTo π a x
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | cycleAt_eq_cycleAtTo_ge_orderOf_cycleOf | [174, 1] | [179, 33] | exact cycleAtTo_of_mono ha | case refine_1
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x : α
a : ℕ
ha : orderOf (π.cycleOf x) ≤ a
⊢ CycleAtTo π (orderOf (π.cycleOf x)) x ≤ CycleAtTo π a x | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
case refine_1
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x : α
a : ℕ
ha : orderOf (π.cycleOf x) ≤ a
⊢ CycleAtTo π (orderOf (π.cycleOf x)) x ≤ CycleAtTo π a x
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | cycleAt_eq_cycleAtTo_ge_orderOf_cycleOf | [174, 1] | [179, 33] | exact cycleAtTo_subset_cycleAt | case refine_2
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x : α
a : ℕ
ha : orderOf (π.cycleOf x) ≤ a
⊢ CycleAtTo π a x ≤ CycleAt π x | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
case refine_2
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
x : α
a : ℕ
ha : orderOf (π.cycleOf x) ≤ a
⊢ CycleAtTo π a x ≤ CycleAt π x
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | insert_cycleAtTo_eq_succ | [181, 1] | [185, 74] | ext y | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
⊢ insert ((π ^ a) x) (CycleAtTo π a x) = CycleAtTo π (a + 1) x | case a
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x y : α
⊢ y ∈ insert ((π ^ a) x) (CycleAtTo π a x) ↔ y ∈ CycleAtTo π (a + 1) x | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
⊢ insert ((π ^ a) x) (CycleAtTo π a x) = CycleAtTo π (a + 1) x
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | insert_cycleAtTo_eq_succ | [181, 1] | [185, 74] | simp_rw [mem_insert, mem_cycleAtTo_iff, Nat.lt_succ_iff_lt_or_eq, or_and_right, exists_or,
exists_eq_left, or_comm (a := y = (π ^ a) x), eq_comm (b := (π^a) x)] | case a
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x y : α
⊢ y ∈ insert ((π ^ a) x) (CycleAtTo π a x) ↔ y ∈ CycleAtTo π (a + 1) x | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
case a
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x y : α
⊢ y ∈ insert ((π ^ a) x) (CycleAtTo π a x) ↔ y ∈ CycleAtTo π (a + 1) x
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | insert_cycleAtTo | [187, 1] | [194, 59] | intros y hy | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
k b : ℕ
x : α
a : ℕ
hak : a ≤ k
hkb : k < b
⊢ insert ((π ^ k) x) (CycleAtTo π a x) ⊆ CycleAtTo π b x | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
k b : ℕ
x : α
a : ℕ
hak : a ≤ k
hkb : k < b
y : α
hy : y ∈ insert ((π ^ k) x) (CycleAtTo π a x)
⊢ y ∈ CycleAtTo π b x | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
k b : ℕ
x : α
a : ℕ
hak : a ≤ k
hkb : k < b
⊢ insert ((π ^ k) x) (CycleAtTo π a x) ⊆ CycleAtTo π b x
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | insert_cycleAtTo | [187, 1] | [194, 59] | rw [mem_insert] at hy | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
k b : ℕ
x : α
a : ℕ
hak : a ≤ k
hkb : k < b
y : α
hy : y ∈ insert ((π ^ k) x) (CycleAtTo π a x)
⊢ y ∈ CycleAtTo π b x | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
k b : ℕ
x : α
a : ℕ
hak : a ≤ k
hkb : k < b
y : α
hy : y = (π ^ k) x ∨ y ∈ CycleAtTo π a x
⊢ y ∈ CycleAtTo π b x | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
k b : ℕ
x : α
a : ℕ
hak : a ≤ k
hkb : k < b
y : α
hy : y ∈ insert ((π ^ k) x) (CycleAtTo π a x)
⊢ y ∈ CycleAtTo π b x
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | insert_cycleAtTo | [187, 1] | [194, 59] | rcases hy with (rfl | hy) | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
k b : ℕ
x : α
a : ℕ
hak : a ≤ k
hkb : k < b
y : α
hy : y = (π ^ k) x ∨ y ∈ CycleAtTo π a x
⊢ y ∈ CycleAtTo π b x | case inl
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
k b : ℕ
x : α
a : ℕ
hak : a ≤ k
hkb : k < b
⊢ (π ^ k) x ∈ CycleAtTo π b x
case inr
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
k b : ℕ
x : α
a : ℕ
hak : a ≤ k
hkb : k < b
y : α
hy : y ∈ CycleAtTo π a x
⊢ y ∈ CycleAtTo π b x | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
k b : ℕ
x : α
a : ℕ
hak : a ≤ k
hkb : k < b
y : α
hy : y = (π ^ k) x ∨ y ∈ CycleAtTo π a x
⊢ y ∈ CycleAtTo π b x
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | insert_cycleAtTo | [187, 1] | [194, 59] | rw [mem_cycleAtTo_iff] | case inl
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
k b : ℕ
x : α
a : ℕ
hak : a ≤ k
hkb : k < b
⊢ (π ^ k) x ∈ CycleAtTo π b x | case inl
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
k b : ℕ
x : α
a : ℕ
hak : a ≤ k
hkb : k < b
⊢ ∃ b_1 < b, (π ^ b_1) x = (π ^ k) x | Please generate a tactic in lean4 to solve the state.
STATE:
case inl
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
k b : ℕ
x : α
a : ℕ
hak : a ≤ k
hkb : k < b
⊢ (π ^ k) x ∈ CycleAtTo π b x
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | insert_cycleAtTo | [187, 1] | [194, 59] | exact ⟨k, hkb, rfl⟩ | case inl
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
k b : ℕ
x : α
a : ℕ
hak : a ≤ k
hkb : k < b
⊢ ∃ b_1 < b, (π ^ b_1) x = (π ^ k) x | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
case inl
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
k b : ℕ
x : α
a : ℕ
hak : a ≤ k
hkb : k < b
⊢ ∃ b_1 < b, (π ^ b_1) x = (π ^ k) x
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | insert_cycleAtTo | [187, 1] | [194, 59] | exact cycleAtTo_of_mono (lt_of_le_of_lt hak hkb).le hy | case inr
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
k b : ℕ
x : α
a : ℕ
hak : a ≤ k
hkb : k < b
y : α
hy : y ∈ CycleAtTo π a x
⊢ y ∈ CycleAtTo π b x | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
case inr
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
k b : ℕ
x : α
a : ℕ
hak : a ≤ k
hkb : k < b
y : α
hy : y ∈ CycleAtTo π a x
⊢ y ∈ CycleAtTo π b x
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | pow_apply_not_mem_cycleAtTo_of_lt_orderOf_cycleOf | [196, 1] | [201, 73] | intro h | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
h : a < orderOf (π.cycleOf x)
⊢ (π ^ a) x ∉ CycleAtTo π a x | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
h✝ : a < orderOf (π.cycleOf x)
h : (π ^ a) x ∈ CycleAtTo π a x
⊢ False | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
h : a < orderOf (π.cycleOf x)
⊢ (π ^ a) x ∉ CycleAtTo π a x
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | pow_apply_not_mem_cycleAtTo_of_lt_orderOf_cycleOf | [196, 1] | [201, 73] | rw [mem_cycleAtTo_iff] at h | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
h✝ : a < orderOf (π.cycleOf x)
h : (π ^ a) x ∈ CycleAtTo π a x
⊢ False | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
h✝ : a < orderOf (π.cycleOf x)
h : ∃ b < a, (π ^ b) x = (π ^ a) x
⊢ False | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
h✝ : a < orderOf (π.cycleOf x)
h : (π ^ a) x ∈ CycleAtTo π a x
⊢ False
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | pow_apply_not_mem_cycleAtTo_of_lt_orderOf_cycleOf | [196, 1] | [201, 73] | rcases h with ⟨b, hb, hbx⟩ | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
h✝ : a < orderOf (π.cycleOf x)
h : ∃ b < a, (π ^ b) x = (π ^ a) x
⊢ False | case intro.intro
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
h : a < orderOf (π.cycleOf x)
b : ℕ
hb : b < a
hbx : (π ^ b) x = (π ^ a) x
⊢ False | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
h✝ : a < orderOf (π.cycleOf x)
h : ∃ b < a, (π ^ b) x = (π ^ a) x
⊢ False
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | pow_apply_not_mem_cycleAtTo_of_lt_orderOf_cycleOf | [196, 1] | [201, 73] | exact hb.ne (π.pow_apply_injOn_Iio_orderOf_cycleOf (hb.trans h) h hbx) | case intro.intro
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
h : a < orderOf (π.cycleOf x)
b : ℕ
hb : b < a
hbx : (π ^ b) x = (π ^ a) x
⊢ False | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
case intro.intro
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
h : a < orderOf (π.cycleOf x)
b : ℕ
hb : b < a
hbx : (π ^ b) x = (π ^ a) x
⊢ False
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | cycleAtTo_strict_mono_lt_of_lt_lt_orderOf | [203, 1] | [206, 98] | rw [Finset.ssubset_iff] | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
b : ℕ
ha : a < orderOf (π.cycleOf x)
hab : a < b
⊢ CycleAtTo π a x ⊂ CycleAtTo π b x | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
b : ℕ
ha : a < orderOf (π.cycleOf x)
hab : a < b
⊢ ∃ a_1 ∉ CycleAtTo π a x, insert a_1 (CycleAtTo π a x) ⊆ CycleAtTo π b x | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
b : ℕ
ha : a < orderOf (π.cycleOf x)
hab : a < b
⊢ CycleAtTo π a x ⊂ CycleAtTo π b x
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | cycleAtTo_strict_mono_lt_of_lt_lt_orderOf | [203, 1] | [206, 98] | exact ⟨_, pow_apply_not_mem_cycleAtTo_of_lt_orderOf_cycleOf ha, insert_cycleAtTo (le_refl _) hab⟩ | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
b : ℕ
ha : a < orderOf (π.cycleOf x)
hab : a < b
⊢ ∃ a_1 ∉ CycleAtTo π a x, insert a_1 (CycleAtTo π a x) ⊆ CycleAtTo π b x | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
b : ℕ
ha : a < orderOf (π.cycleOf x)
hab : a < b
⊢ ∃ a_1 ∉ CycleAtTo π a x, insert a_1 (CycleAtTo π a x) ⊆ CycleAtTo π b x
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | cycleAt_gt_cycleAtTo_lt_orderOf_cycleOf | [208, 1] | [211, 54] | rw [cycleAt_eq_cycleAtTo_orderOf_cycleOf] | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
h : a < orderOf (π.cycleOf x)
⊢ CycleAtTo π a x ⊂ CycleAt π x | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
h : a < orderOf (π.cycleOf x)
⊢ CycleAtTo π a x ⊂ CycleAtTo π (orderOf (π.cycleOf x)) x | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
h : a < orderOf (π.cycleOf x)
⊢ CycleAtTo π a x ⊂ CycleAt π x
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | cycleAt_gt_cycleAtTo_lt_orderOf_cycleOf | [208, 1] | [211, 54] | exact cycleAtTo_strict_mono_lt_of_lt_lt_orderOf h h | α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
h : a < orderOf (π.cycleOf x)
⊢ CycleAtTo π a x ⊂ CycleAtTo π (orderOf (π.cycleOf x)) x | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝¹ : DecidableEq α
π : Perm α
inst✝ : Fintype α
a : ℕ
x : α
h : a < orderOf (π.cycleOf x)
⊢ CycleAtTo π a x ⊂ CycleAtTo π (orderOf (π.cycleOf x)) x
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | cycleMin_eq_min_cycleAtTo | [222, 1] | [224, 63] | simp_rw [cycleMin_def, cycleAt_eq_cycleAtTo_orderOf_cycleOf] | α : Type u
inst✝² : DecidableEq α
π : Perm α
inst✝¹ : Fintype α
inst✝ : LinearOrder α
x : α
⊢ CycleMin π x = (CycleAtTo π (orderOf (π.cycleOf x)) x).min' ⋯ | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝² : DecidableEq α
π : Perm α
inst✝¹ : Fintype α
inst✝ : LinearOrder α
x : α
⊢ CycleMin π x = (CycleAtTo π (orderOf (π.cycleOf x)) x).min' ⋯
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | cycleMin_of_fixed | [226, 1] | [229, 35] | simp_rw [cycleMin_eq_min_cycleAtTo, π.cycleOf_eq_one_iff.mpr h, orderOf_one,
cycleAtTo_one, min'_singleton] | α : Type u
inst✝² : DecidableEq α
π : Perm α
inst✝¹ : Fintype α
inst✝ : LinearOrder α
x : α
h : Function.IsFixedPt (⇑π) x
⊢ CycleMin π x = x | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝² : DecidableEq α
π : Perm α
inst✝¹ : Fintype α
inst✝ : LinearOrder α
x : α
h : Function.IsFixedPt (⇑π) x
⊢ CycleMin π x = x
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | cycleMin_eq_min_cycleAtTo_ge | [244, 1] | [246, 67] | simp_rw [cycleMin_def, cycleAt_eq_cycleAtTo_ge_orderOf_cycleOf ha] | α : Type u
inst✝² : DecidableEq α
π : Perm α
inst✝¹ : Fintype α
inst✝ : LinearOrder α
x : α
a : ℕ
cycleAtTo_nonempty : (CycleAtTo π a x).Nonempty
ha : orderOf (π.cycleOf x) ≤ a
⊢ CycleMin π x = (CycleAtTo π a x).min' cycleAtTo_nonempty | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝² : DecidableEq α
π : Perm α
inst✝¹ : Fintype α
inst✝ : LinearOrder α
x : α
a : ℕ
cycleAtTo_nonempty : (CycleAtTo π a x).Nonempty
ha : orderOf (π.cycleOf x) ≤ a
⊢ CycleMin π x = (CycleAtTo π a x).min' cycleAtTo_nonempty
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | cycleMin_le | [248, 1] | [250, 51] | rw [cycleMin_def] | α : Type u
inst✝² : DecidableEq α
π✝ : Perm α
inst✝¹ : Fintype α
inst✝ : LinearOrder α
y : α
π : Perm α
x : α
h : π.SameCycle x y
⊢ CycleMin π x ≤ y | α : Type u
inst✝² : DecidableEq α
π✝ : Perm α
inst✝¹ : Fintype α
inst✝ : LinearOrder α
y : α
π : Perm α
x : α
h : π.SameCycle x y
⊢ (CycleAt π x).min' ⋯ ≤ y | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝² : DecidableEq α
π✝ : Perm α
inst✝¹ : Fintype α
inst✝ : LinearOrder α
y : α
π : Perm α
x : α
h : π.SameCycle x y
⊢ CycleMin π x ≤ y
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | cycleMin_le | [248, 1] | [250, 51] | exact Finset.min'_le _ y (mem_cycleAt_iff.mpr h) | α : Type u
inst✝² : DecidableEq α
π✝ : Perm α
inst✝¹ : Fintype α
inst✝ : LinearOrder α
y : α
π : Perm α
x : α
h : π.SameCycle x y
⊢ (CycleAt π x).min' ⋯ ≤ y | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝² : DecidableEq α
π✝ : Perm α
inst✝¹ : Fintype α
inst✝ : LinearOrder α
y : α
π : Perm α
x : α
h : π.SameCycle x y
⊢ (CycleAt π x).min' ⋯ ≤ y
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | le_cycleMin | [267, 1] | [268, 70] | simp_rw [cycleMin_def, Finset.le_min'_iff, mem_cycleAt_iff] | α : Type u
inst✝² : DecidableEq α
π : Perm α
inst✝¹ : Fintype α
inst✝ : LinearOrder α
x z : α
h : ∀ (y : α), π.SameCycle x y → z ≤ y
⊢ z ≤ CycleMin π x | α : Type u
inst✝² : DecidableEq α
π : Perm α
inst✝¹ : Fintype α
inst✝ : LinearOrder α
x z : α
h : ∀ (y : α), π.SameCycle x y → z ≤ y
⊢ ∀ (y : α), π.SameCycle x y → z ≤ y | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝² : DecidableEq α
π : Perm α
inst✝¹ : Fintype α
inst✝ : LinearOrder α
x z : α
h : ∀ (y : α), π.SameCycle x y → z ≤ y
⊢ z ≤ CycleMin π x
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | le_cycleMin | [267, 1] | [268, 70] | exact h | α : Type u
inst✝² : DecidableEq α
π : Perm α
inst✝¹ : Fintype α
inst✝ : LinearOrder α
x z : α
h : ∀ (y : α), π.SameCycle x y → z ≤ y
⊢ ∀ (y : α), π.SameCycle x y → z ≤ y | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝² : DecidableEq α
π : Perm α
inst✝¹ : Fintype α
inst✝ : LinearOrder α
x z : α
h : ∀ (y : α), π.SameCycle x y → z ≤ y
⊢ ∀ (y : α), π.SameCycle x y → z ≤ y
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | le_cycleMin_iff | [270, 1] | [271, 60] | simp_rw [cycleMin_def, Finset.le_min'_iff, mem_cycleAt_iff] | α : Type u
inst✝² : DecidableEq α
π : Perm α
inst✝¹ : Fintype α
inst✝ : LinearOrder α
z x : α
⊢ z ≤ CycleMin π x ↔ ∀ (y : α), π.SameCycle x y → z ≤ y | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝² : DecidableEq α
π : Perm α
inst✝¹ : Fintype α
inst✝ : LinearOrder α
z x : α
⊢ z ≤ CycleMin π x ↔ ∀ (y : α), π.SameCycle x y → z ≤ y
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | fastCycleMin_eq_min_cycleAtTo | [285, 1] | [297, 76] | induction' i with i hi generalizing x | α : Type u
inst✝² : DecidableEq α
π : Perm α
inst✝¹ : Fintype α
inst✝ : LinearOrder α
i : ℕ
x : α
⊢ FastCycleMin i π x = (CycleAtTo π (2 ^ i) x).min' ⋯ | case zero
α : Type u
inst✝² : DecidableEq α
π : Perm α
inst✝¹ : Fintype α
inst✝ : LinearOrder α
x : α
⊢ FastCycleMin 0 π x = (CycleAtTo π (2 ^ 0) x).min' ⋯
case succ
α : Type u
inst✝² : DecidableEq α
π : Perm α
inst✝¹ : Fintype α
inst✝ : LinearOrder α
i : ℕ
hi : ∀ {x : α}, FastCycleMin i π x = (CycleAtTo π (2 ^ i) x).min' ⋯
x : α
⊢ FastCycleMin (i + 1) π x = (CycleAtTo π (2 ^ (i + 1)) x).min' ⋯ | Please generate a tactic in lean4 to solve the state.
STATE:
α : Type u
inst✝² : DecidableEq α
π : Perm α
inst✝¹ : Fintype α
inst✝ : LinearOrder α
i : ℕ
x : α
⊢ FastCycleMin i π x = (CycleAtTo π (2 ^ i) x).min' ⋯
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | fastCycleMin_eq_min_cycleAtTo | [285, 1] | [297, 76] | simp_rw [fastCycleMin_zero_eq, pow_zero, cycleAtTo_one, min'_singleton] | case zero
α : Type u
inst✝² : DecidableEq α
π : Perm α
inst✝¹ : Fintype α
inst✝ : LinearOrder α
x : α
⊢ FastCycleMin 0 π x = (CycleAtTo π (2 ^ 0) x).min' ⋯ | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
case zero
α : Type u
inst✝² : DecidableEq α
π : Perm α
inst✝¹ : Fintype α
inst✝ : LinearOrder α
x : α
⊢ FastCycleMin 0 π x = (CycleAtTo π (2 ^ 0) x).min' ⋯
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | fastCycleMin_eq_min_cycleAtTo | [285, 1] | [297, 76] | simp_rw [fastCycleMin_succ_eq, hi, le_antisymm_iff, le_min_iff, Finset.le_min'_iff, min_le_iff,
mem_cycleAtTo_iff, Nat.pow_succ', Nat.two_mul, forall_exists_index, and_imp,
forall_apply_eq_imp_iff₂, ← forall_and, ← Equiv.Perm.mul_apply, ← pow_add, imp_and] | case succ
α : Type u
inst✝² : DecidableEq α
π : Perm α
inst✝¹ : Fintype α
inst✝ : LinearOrder α
i : ℕ
hi : ∀ {x : α}, FastCycleMin i π x = (CycleAtTo π (2 ^ i) x).min' ⋯
x : α
⊢ FastCycleMin (i + 1) π x = (CycleAtTo π (2 ^ (i + 1)) x).min' ⋯ | case succ
α : Type u
inst✝² : DecidableEq α
π : Perm α
inst✝¹ : Fintype α
inst✝ : LinearOrder α
i : ℕ
hi : ∀ {x : α}, FastCycleMin i π x = (CycleAtTo π (2 ^ i) x).min' ⋯
x : α
⊢ ∀ (x_1 : ℕ),
(x_1 < 2 ^ i + 2 ^ i →
(CycleAtTo π (2 ^ i) x).min' ⋯ ≤ (π ^ x_1) x ∨ (CycleAtTo π (2 ^ i) ((π ^ 2 ^ i) x)).min' ⋯ ≤ (π ^ x_1) x) ∧
(x_1 < 2 ^ i → (CycleAtTo π (2 ^ i + 2 ^ i) x).min' ⋯ ≤ (π ^ x_1) x) ∧
(x_1 < 2 ^ i → (CycleAtTo π (2 ^ i + 2 ^ i) x).min' ⋯ ≤ (π ^ (x_1 + 2 ^ i)) x) | Please generate a tactic in lean4 to solve the state.
STATE:
case succ
α : Type u
inst✝² : DecidableEq α
π : Perm α
inst✝¹ : Fintype α
inst✝ : LinearOrder α
i : ℕ
hi : ∀ {x : α}, FastCycleMin i π x = (CycleAtTo π (2 ^ i) x).min' ⋯
x : α
⊢ FastCycleMin (i + 1) π x = (CycleAtTo π (2 ^ (i + 1)) x).min' ⋯
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | fastCycleMin_eq_min_cycleAtTo | [285, 1] | [297, 76] | refine' fun b => And.intro (fun h => (lt_or_le b (2^i)).imp _ _) (And.intro _ _) <;>
refine' fun hb => min'_le _ _ _ | case succ
α : Type u
inst✝² : DecidableEq α
π : Perm α
inst✝¹ : Fintype α
inst✝ : LinearOrder α
i : ℕ
hi : ∀ {x : α}, FastCycleMin i π x = (CycleAtTo π (2 ^ i) x).min' ⋯
x : α
⊢ ∀ (x_1 : ℕ),
(x_1 < 2 ^ i + 2 ^ i →
(CycleAtTo π (2 ^ i) x).min' ⋯ ≤ (π ^ x_1) x ∨ (CycleAtTo π (2 ^ i) ((π ^ 2 ^ i) x)).min' ⋯ ≤ (π ^ x_1) x) ∧
(x_1 < 2 ^ i → (CycleAtTo π (2 ^ i + 2 ^ i) x).min' ⋯ ≤ (π ^ x_1) x) ∧
(x_1 < 2 ^ i → (CycleAtTo π (2 ^ i + 2 ^ i) x).min' ⋯ ≤ (π ^ (x_1 + 2 ^ i)) x) | case succ.refine'_1
α : Type u
inst✝² : DecidableEq α
π : Perm α
inst✝¹ : Fintype α
inst✝ : LinearOrder α
i : ℕ
hi : ∀ {x : α}, FastCycleMin i π x = (CycleAtTo π (2 ^ i) x).min' ⋯
x : α
b : ℕ
h : b < 2 ^ i + 2 ^ i
hb : b < 2 ^ i
⊢ (π ^ b) x ∈ CycleAtTo π (2 ^ i) x
case succ.refine'_2
α : Type u
inst✝² : DecidableEq α
π : Perm α
inst✝¹ : Fintype α
inst✝ : LinearOrder α
i : ℕ
hi : ∀ {x : α}, FastCycleMin i π x = (CycleAtTo π (2 ^ i) x).min' ⋯
x : α
b : ℕ
h : b < 2 ^ i + 2 ^ i
hb : 2 ^ i ≤ b
⊢ (π ^ b) x ∈ CycleAtTo π (2 ^ i) ((π ^ 2 ^ i) x)
case succ.refine'_3
α : Type u
inst✝² : DecidableEq α
π : Perm α
inst✝¹ : Fintype α
inst✝ : LinearOrder α
i : ℕ
hi : ∀ {x : α}, FastCycleMin i π x = (CycleAtTo π (2 ^ i) x).min' ⋯
x : α
b : ℕ
hb : b < 2 ^ i
⊢ (π ^ b) x ∈ CycleAtTo π (2 ^ i + 2 ^ i) x
case succ.refine'_4
α : Type u
inst✝² : DecidableEq α
π : Perm α
inst✝¹ : Fintype α
inst✝ : LinearOrder α
i : ℕ
hi : ∀ {x : α}, FastCycleMin i π x = (CycleAtTo π (2 ^ i) x).min' ⋯
x : α
b : ℕ
hb : b < 2 ^ i
⊢ (π ^ (b + 2 ^ i)) x ∈ CycleAtTo π (2 ^ i + 2 ^ i) x | Please generate a tactic in lean4 to solve the state.
STATE:
case succ
α : Type u
inst✝² : DecidableEq α
π : Perm α
inst✝¹ : Fintype α
inst✝ : LinearOrder α
i : ℕ
hi : ∀ {x : α}, FastCycleMin i π x = (CycleAtTo π (2 ^ i) x).min' ⋯
x : α
⊢ ∀ (x_1 : ℕ),
(x_1 < 2 ^ i + 2 ^ i →
(CycleAtTo π (2 ^ i) x).min' ⋯ ≤ (π ^ x_1) x ∨ (CycleAtTo π (2 ^ i) ((π ^ 2 ^ i) x)).min' ⋯ ≤ (π ^ x_1) x) ∧
(x_1 < 2 ^ i → (CycleAtTo π (2 ^ i + 2 ^ i) x).min' ⋯ ≤ (π ^ x_1) x) ∧
(x_1 < 2 ^ i → (CycleAtTo π (2 ^ i + 2 ^ i) x).min' ⋯ ≤ (π ^ (x_1 + 2 ^ i)) x)
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | fastCycleMin_eq_min_cycleAtTo | [285, 1] | [297, 76] | exact apply_pow_mem_cycleAtTo_of_lt hb | case succ.refine'_1
α : Type u
inst✝² : DecidableEq α
π : Perm α
inst✝¹ : Fintype α
inst✝ : LinearOrder α
i : ℕ
hi : ∀ {x : α}, FastCycleMin i π x = (CycleAtTo π (2 ^ i) x).min' ⋯
x : α
b : ℕ
h : b < 2 ^ i + 2 ^ i
hb : b < 2 ^ i
⊢ (π ^ b) x ∈ CycleAtTo π (2 ^ i) x | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
case succ.refine'_1
α : Type u
inst✝² : DecidableEq α
π : Perm α
inst✝¹ : Fintype α
inst✝ : LinearOrder α
i : ℕ
hi : ∀ {x : α}, FastCycleMin i π x = (CycleAtTo π (2 ^ i) x).min' ⋯
x : α
b : ℕ
h : b < 2 ^ i + 2 ^ i
hb : b < 2 ^ i
⊢ (π ^ b) x ∈ CycleAtTo π (2 ^ i) x
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | fastCycleMin_eq_min_cycleAtTo | [285, 1] | [297, 76] | exact apply_pow_mem_cycleAtTo_apply_pow_of_ge_of_lt h hb | case succ.refine'_2
α : Type u
inst✝² : DecidableEq α
π : Perm α
inst✝¹ : Fintype α
inst✝ : LinearOrder α
i : ℕ
hi : ∀ {x : α}, FastCycleMin i π x = (CycleAtTo π (2 ^ i) x).min' ⋯
x : α
b : ℕ
h : b < 2 ^ i + 2 ^ i
hb : 2 ^ i ≤ b
⊢ (π ^ b) x ∈ CycleAtTo π (2 ^ i) ((π ^ 2 ^ i) x) | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
case succ.refine'_2
α : Type u
inst✝² : DecidableEq α
π : Perm α
inst✝¹ : Fintype α
inst✝ : LinearOrder α
i : ℕ
hi : ∀ {x : α}, FastCycleMin i π x = (CycleAtTo π (2 ^ i) x).min' ⋯
x : α
b : ℕ
h : b < 2 ^ i + 2 ^ i
hb : 2 ^ i ≤ b
⊢ (π ^ b) x ∈ CycleAtTo π (2 ^ i) ((π ^ 2 ^ i) x)
TACTIC:
|
https://github.com/linesthatinterlace/controlbits.git | 4a0d924f7bd9e6dcc6719ef05314fdfd702c6a01 | Controlbits/Cycles.lean | fastCycleMin_eq_min_cycleAtTo | [285, 1] | [297, 76] | exact apply_pow_mem_cycleAtTo_of_lt (lt_of_lt_of_le hb le_self_add) | case succ.refine'_3
α : Type u
inst✝² : DecidableEq α
π : Perm α
inst✝¹ : Fintype α
inst✝ : LinearOrder α
i : ℕ
hi : ∀ {x : α}, FastCycleMin i π x = (CycleAtTo π (2 ^ i) x).min' ⋯
x : α
b : ℕ
hb : b < 2 ^ i
⊢ (π ^ b) x ∈ CycleAtTo π (2 ^ i + 2 ^ i) x | no goals | Please generate a tactic in lean4 to solve the state.
STATE:
case succ.refine'_3
α : Type u
inst✝² : DecidableEq α
π : Perm α
inst✝¹ : Fintype α
inst✝ : LinearOrder α
i : ℕ
hi : ∀ {x : α}, FastCycleMin i π x = (CycleAtTo π (2 ^ i) x).min' ⋯
x : α
b : ℕ
hb : b < 2 ^ i
⊢ (π ^ b) x ∈ CycleAtTo π (2 ^ i + 2 ^ i) x
TACTIC:
|
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