Datasets:

ruthvikanne
/

kernel-pool-knowledge

text stringlengths 183 150k	path stringlengths 15 112	bucket stringclasses 4 values	source stringclasses 14 values	group stringclasses 121 values	spdx stringclasses 11 values	repo_license stringclasses 11 values	commit stringclasses 13 values	lang stringclasses 4 values	def_heavy bool 1 class	comment_ratio float64 0 1	restricted bool 2 classes	fresh bool 1 class	n_bytes int64 183 150k	n_tokens int64 -1 -1
`define SALU_SOPP_FORMAT 8'h01 `define SALU_SOP1_FORMAT 8'h02 `define SALU_SOPC_FORMAT 8'h04 `define SALU_SOP2_FORMAT 8'h08 `define SALU_SOPK_FORMAT 8'h10 module salu_controller( control_en, dst_reg, opcode, alu_control, branch_on_cc, exec_en, vcc_en, scc_en, m0_en, sgpr_en, vcc_wordsel, exec_wordsel, exe...	miaow/src/verilog/rtl/salu/salu_controller.v	arch_code	miaow	miaow/src/verilog	BSD-3-Clause	BSD-3-Clause	dbc5d7cc6e5fd58828239b59491eeb4f66503074	other	false	0.26	false	false	7,657	-1
module fpga_memory ( // input // LSU mem_wr_en, mem_rd_en, mem_addr, mem_wr_data, mem_tag_req, // MB mb_data_in, mb_data_we, mb_ack, mb_done, clk, rst, // output // LSU mem_tag_resp, mem_rd_data, mem_ack, // MB mb_op, mb_data_out, mb_addr ); input clk; input rst; input mem_wr_en; inpu...	miaow/src/verilog/rtl/fpga/fpga_memory.v	arch_code	miaow	miaow/src/verilog	BSD-3-Clause	BSD-3-Clause	dbc5d7cc6e5fd58828239b59491eeb4f66503074	other	false	0.054	false	false	3,089	-1
`define DECODE_BIT0 3'b111 `define DECODE_BIT32 3'b000 `define DECODE_BIT64 3'b001 `define DECODE_BIT128 3'b010 `define DECODE_BIT256 3'b011 `define DECODE_BIT512 3'b100 `define DECODE_BIT96 3'b101 //VIN `define EXT_LIT_255 10'b1011111111 // 255 //`define EXT_LIT_128 10'b1010000000 // 128 - INT 0 //`define EXT_LIT_2...	miaow/src/verilog/rtl/decode/decode_definitions.v	arch_code	miaow	miaow/src/verilog	BSD-3-Clause	BSD-3-Clause	dbc5d7cc6e5fd58828239b59491eeb4f66503074	other	false	0.273	false	false	354	-1
module exec( lsu_rd_wfid, salu_wr_exec_en, salu_wr_vcc_en, salu_wr_exec_value, salu_wr_vcc_value, salu_wr_wfid, salu_rd_en, salu_rd_wfid, salu_wr_m0_en, salu_wr_m0_value, salu_wr_scc_en, salu_wr_scc_value, simd0_rd_wfid, simd1_rd_wfid, ...	miaow/src/verilog/rtl/exec/exec.v	arch_code	miaow	miaow/src/verilog	BSD-3-Clause	BSD-3-Clause	dbc5d7cc6e5fd58828239b59491eeb4f66503074	other	false	0.025	false	false	7,503	-1
#include "helper.h" FILE config_file; FILE instrmem_file; FILE datamem_file; configValues configs; #ifdef WIN32 #include <vector> char optarg = nullptr; char getopt(int argc, char *argv, const char pattern) { std::vector<std::string> options; char return_value; static int arg_post = 1; if (arg...	miaow/src/sw/siagen/helper.cpp	arch_code	miaow	miaow/src/sw	BSD-3-Clause	BSD-3-Clause	dbc5d7cc6e5fd58828239b59491eeb4f66503074	cpp	false	0.169	false	false	8,839	-1
module adder6bit ( sum, cout, in1, in2 ); output[5:0] sum; output cout; input[5:0] in1, in2; wire cout0, cout1, cout2, cout3, cout4; adder1bit add0(sum[0], cout0, in1[0], in2[0], 1'b0); adder1bit add1(sum[1], cout1, in1[1], in2[1], cout0); adder1bit add2(sum[2], cout2, in1[2], in2[2], cout1); adder1bit add3(sum...	miaow/src/verilog/rtl/fetch/adder6bit.v	arch_code	miaow	miaow/src/verilog	BSD-3-Clause	BSD-3-Clause	dbc5d7cc6e5fd58828239b59491eeb4f66503074	other	false	0	false	false	474	-1
module round_robin ( fetch_valid, pc_select, queue_vfull, icache_ack, vacant, clk, rst ); output fetch_valid; output[5:0] pc_select; input[39:0] queue_vfull; input icache_ack; input[39:0] vacant; input clk, rst; wire[5:0] icache_req_out, icache_req_in; wire[5:0] icache_req_plus1, icache_req_minus1; wire ign_c...	miaow/src/verilog/rtl/fetch/round_robin.v	arch_code	miaow	miaow/src/verilog	BSD-3-Clause	BSD-3-Clause	dbc5d7cc6e5fd58828239b59491eeb4f66503074	other	false	0.053	false	false	1,491	-1
module alu_controller (/AUTOARG/ // Outputs out_alu_ready, out_vcc_wr_en, out_instr_done, out_vgpr_wr_en, out_vgpr_dest_addr, out_sgpr_wr_en, out_sgpr_dest_addr, out_alu_control, out_alu_start, out_src_buffer_wr_en, out_source1_mux_select, out_source2_mux_select, out_source3_mux_select, out_sourc...	miaow/src/verilog/rtl/alu/alu_controller.v	arch_code	miaow	miaow/src/verilog	BSD-3-Clause	BSD-3-Clause	dbc5d7cc6e5fd58828239b59491eeb4f66503074	other	false	0.01	false	false	11,605	-1
module wfid_generator( halt, WF_tag, WF_id_done, vacant, vacant_next, WF_id, WF_tag_done, clk, wr, rst ); input clk; input rst; input halt; input wr; input [14:0] WF_tag; input [5:0] WF_id_done; //rename input [39:0] vacant; output [39:0] vacant_next; output [5:0] WF_id; //new id generated output [...	miaow/src/verilog/rtl/fetch/wfid_generator.v	arch_code	miaow	miaow/src/verilog	BSD-3-Clause	BSD-3-Clause	dbc5d7cc6e5fd58828239b59491eeb4f66503074	other	false	0	false	false	554	-1
module WALLACE_33_32 ( SUMMAND, RST, CLK, CARRY, SUM ); input [0:575] SUMMAND; input RST; input CLK; output [0:62] CARRY; output [0:63] SUM; wire [0:7] LATCHED_PP; wire [0:523] INT_CARRY; wire [0:669] INT_SUM; HALF_ADDER HA_0 (.DATA_A (SUMMAND[0]) , .DATA_B (SUMMAND[1]) , .SA...	miaow/src/verilog/rtl/simd/amultp2_32x32.v#p2	arch_code	miaow	miaow/src/verilog	BSD-3-Clause	BSD-3-Clause	dbc5d7cc6e5fd58828239b59491eeb4f66503074	other	false	0.002	false	false	140,640	-1

End of preview. Expand in Data Studio

kernel-llm pool — part 1: books, algorithms, mathematics, architecture

Training text for a kernel/machine-level C specialist. This is part 1 of a multi-part pool, not the full 1T-token dataset: it is the knowledge slice (design, architecture, algorithms, maths), built from repositories whose licences were read rather than assumed.

Volume is stated as measured: 15.6M tokens across 6735 rows, where a token is estimated as bytes/3.6 because no tokenizer was run over this part. Byte counts are exact; the token figure is an estimate and is labelled as one in stats.json.

source	bucket	licence	rows	est. tokens	flag
`opentitan`	arch_code	Apache-2.0	4065	8034k	clean
`vulkan-spec`	books	CC-BY-4.0	726	3118k	clean
`aosa`	books	CC-BY-3.0	76	797k	clean
`rocket-chip`	arch_code	BSD-3-Clause OR Apache-2.0	308	592k	clean
`discrete-book`	math	CC-BY-NC-SA-4.0	132	577k	restricted
`cp-algorithms`	algorithms	CC-BY-SA-4.0	165	457k	clean
`miaow`	arch_code	BSD-3-Clause	204	447k	clean
`opencl-spec`	books	CC-BY-4.0	106	422k	clean
`thealgorithms-c`	algorithms	GPL-3.0	398	275k	clean
`sdxpy`	books	CC-BY-NC-4.0	115	255k	restricted
`spike`	arch_code	BSD-3-Clause	259	249k	clean
`vexriscv`	arch_code	MIT	97	228k	clean
`ods`	books	CC-BY-2.5-CA	19	135k	clean
`ods-code`	algorithms	CC-BY-2.5-CA	65	61k	clean
total			6735	15.6M

Every row carries source, repo_license, spdx, commit, n_bytes, n_tokens (-1 when not measured), restricted and path, so a subset can be rebuilt exactly and every row can be traced to the commit it came from.

Licence flags — read before training

This pool contains NonCommercial material. It is included and marked, but it is not free for commercial use:

discrete-book — CC-BY-NC-SA-4.0
sdxpy — CC-BY-NC-4.0

Filter those rows out of any commercial training mix:

ds = ds.filter(lambda r: not r["restricted"])

Publishing this data, or keeping it private, does not change the position: an NC licence restricts the use, not only the redistribution, so training a model you sell on NC text is a commercial use even if the text never leaves your disk.

Publisher-copyrighted books (Operating Systems: Three Easy Pieces, Computer Architecture: A Quantitative Approach, Designing Data-Intensive Applications, Systems Performance, Linux Kernel Development, Refactoring, Design Patterns) are not present at all — no rows, no URLs. A book you can read online is not a book you may train on.

What is not here

kernel and driver trees (Linux, RTOS, GPU drivers) — part 2
other kernels and compute kernels — part 3
Stack v2 subsets — part 4 (gated)
traces, commits, synthetic and replay data — part 5

Dedup and splits

6735 distinct near-duplicate signatures; exact duplicates and MinHash near-duplicates were dropped, with sources deduplicated in priority order so a trusted copy wins over a mirror. heldout is 2% of groups, capped so no bucket is gutted.

The held-out split is public. It is a development split for measuring contamination, not a secret holdout; encrypting public data does not create one.

How to load

from datasets import load_dataset
ds = load_dataset("ruthvikanne/kernel-pool-knowledge", split="train")

mix.json and mix-manifest.parquet hold a plan (tier weights, repeat counts) that joins on path; the text stays in the shards. LICENSES.json records, per source, the declared licence, the evidence it was read from, and the exact commit.

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kernel-llm pool — part 1: books, algorithms, mathematics, architecture

Contents

Licence flags — read before training

What is not here

Dedup and splits

How to load