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stringlengths 1
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/*
* Copyright (C) 2007
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*
* Test for correctness of composite floating-point comparisons.
* Written by Paolo Bonzini, 26th May 2004.
* This file is originally a part of the GCC testsuite.
*/
#include <common.h>
#include <post.h>
GNU_FPOST_ATTR
#if CONFIG_POST & CONFIG_SYS_POST_FPU
static int failed;
#define TEST(c) if ((c) != ok) failed++
#define ORD(a, b) (!__builtin_isunordered ((a), (b)))
#define UNORD(a, b) (__builtin_isunordered ((a), (b)))
#define UNEQ(a, b) (__builtin_isunordered ((a), (b)) || ((a) == (b)))
#define UNLT(a, b) (__builtin_isunordered ((a), (b)) || ((a) < (b)))
#define UNLE(a, b) (__builtin_isunordered ((a), (b)) || ((a) <= (b)))
#define UNGT(a, b) (__builtin_isunordered ((a), (b)) || ((a) > (b)))
#define UNGE(a, b) (__builtin_isunordered ((a), (b)) || ((a) >= (b)))
#define LTGT(a, b) (__builtin_islessgreater ((a), (b)))
static float pinf;
static float ninf;
static float NaN;
static void iuneq (float x, float y, int ok)
{
TEST (UNEQ (x, y));
TEST (!LTGT (x, y));
TEST (UNLE (x, y) && UNGE (x,y));
}
static void ieq (float x, float y, int ok)
{
TEST (ORD (x, y) && UNEQ (x, y));
}
static void iltgt (float x, float y, int ok)
{
TEST (!UNEQ (x, y)); /* Not optimizable. */
TEST (LTGT (x, y)); /* Same, __builtin_islessgreater does not trap. */
TEST (ORD (x, y) && (UNLT (x, y) || UNGT (x,y)));
}
static void ine (float x, float y, int ok)
{
TEST (UNLT (x, y) || UNGT (x, y));
}
static void iunlt (float x, float y, int ok)
{
TEST (UNLT (x, y));
TEST (UNORD (x, y) || (x < y));
}
static void ilt (float x, float y, int ok)
{
TEST (ORD (x, y) && UNLT (x, y)); /* Not optimized */
TEST ((x <= y) && (x != y));
TEST ((x <= y) && (y != x));
TEST ((x != y) && (x <= y)); /* Not optimized */
TEST ((y != x) && (x <= y)); /* Not optimized */
}
static void iunle (float x, float y, int ok)
{
TEST (UNLE (x, y));
TEST (UNORD (x, y) || (x <= y));
}
static void ile (float x, float y, int ok)
{
TEST (ORD (x, y) && UNLE (x, y)); /* Not optimized */
TEST ((x < y) || (x == y));
TEST ((y > x) || (x == y));
TEST ((x == y) || (x < y)); /* Not optimized */
TEST ((y == x) || (x < y)); /* Not optimized */
}
static void iungt (float x, float y, int ok)
{
TEST (UNGT (x, y));
TEST (UNORD (x, y) || (x > y));
}
static void igt (float x, float y, int ok)
{
TEST (ORD (x, y) && UNGT (x, y)); /* Not optimized */
TEST ((x >= y) && (x != y));
TEST ((x >= y) && (y != x));
TEST ((x != y) && (x >= y)); /* Not optimized */
TEST ((y != x) && (x >= y)); /* Not optimized */
}
static void iunge (float x, float y, int ok)
{
TEST (UNGE (x, y));
TEST (UNORD (x, y) || (x >= y));
}
static void ige (float x, float y, int ok)
{
TEST (ORD (x, y) && UNGE (x, y)); /* Not optimized */
TEST ((x > y) || (x == y));
TEST ((y < x) || (x == y));
TEST ((x == y) || (x > y)); /* Not optimized */
TEST ((y == x) || (x > y)); /* Not optimized */
}
int fpu_post_test_math6 (void)
{
pinf = __builtin_inf ();
ninf = -__builtin_inf ();
NaN = __builtin_nan ("");
iuneq (ninf, pinf, 0);
iuneq (NaN, NaN, 1);
iuneq (pinf, ninf, 0);
iuneq (1, 4, 0);
iuneq (3, 3, 1);
iuneq (5, 2, 0);
ieq (1, 4, 0);
ieq (3, 3, 1);
ieq (5, 2, 0);
iltgt (ninf, pinf, 1);
iltgt (NaN, NaN, 0);
iltgt (pinf, ninf, 1);
iltgt (1, 4, 1);
iltgt (3, 3, 0);
iltgt (5, 2, 1);
ine (1, 4, 1);
ine (3, 3, 0);
ine (5, 2, 1);
iunlt (NaN, ninf, 1);
iunlt (pinf, NaN, 1);
iunlt (pinf, ninf, 0);
iunlt (pinf, pinf, 0);
iunlt (ninf, ninf, 0);
iunlt (1, 4, 1);
iunlt (3, 3, 0);
iunlt (5, 2, 0);
ilt (1, 4, 1);
ilt (3, 3, 0);
ilt (5, 2, 0);
iunle (NaN, ninf, 1);
iunle (pinf, NaN, 1);
iunle (pinf, ninf, 0);
iunle (pinf, pinf, 1);
iunle (ninf, ninf, 1);
iunle (1, 4, 1);
iunle (3, 3, 1);
iunle (5, 2, 0);
ile (1, 4, 1);
ile (3, 3, 1);
ile (5, 2, 0);
iungt (NaN, ninf, 1);
iungt (pinf, NaN, 1);
iungt (pinf, ninf, 1);
iungt (pinf, pinf, 0);
iungt (ninf, ninf, 0);
iungt (1, 4, 0);
iungt (3, 3, 0);
iungt (5, 2, 1);
igt (1, 4, 0);
igt (3, 3, 0);
igt (5, 2, 1);
iunge (NaN, ninf, 1);
iunge (pinf, NaN, 1);
iunge (ninf, pinf, 0);
iunge (pinf, pinf, 1);
iunge (ninf, ninf, 1);
iunge (1, 4, 0);
iunge (3, 3, 1);
iunge (5, 2, 1);
ige (1, 4, 0);
ige (3, 3, 1);
ige (5, 2, 1);
if (failed) {
post_log ("Error in FPU math6 test\n");
return -1;
}
return 0;
}
#endif /* CONFIG_POST & CONFIG_SYS_POST_FPU */
|
1001-study-uboot
|
post/lib_powerpc/fpu/compare-fp-1.c
|
C
|
gpl3
| 5,239
|
#
# (C) Copyright 2007
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = libpost$(ARCH)fpu.o
COBJS-$(CONFIG_HAS_POST) += 20001122-1.o
COBJS-$(CONFIG_HAS_POST) += 20010114-2.o
COBJS-$(CONFIG_HAS_POST) += 20010226-1.o
COBJS-$(CONFIG_HAS_POST) += 980619-1.o
COBJS-$(CONFIG_HAS_POST) += acc1.o
COBJS-$(CONFIG_HAS_POST) += compare-fp-1.o
COBJS-$(CONFIG_HAS_POST) += fpu.o
COBJS-$(CONFIG_HAS_POST) += mul-subnormal-single-1.o
COBJS-$(CONFIG_HAS_POST) += darwin-ldouble.o
include $(TOPDIR)/post/rules.mk
CFLAGS := $(shell echo $(CFLAGS) | sed s/-msoft-float//)
CFLAGS += -mhard-float -fkeep-inline-functions
$(obj)%.o: %.c
$(CC) $(ALL_CFLAGS) -o $@.fp $< -c
$(OBJCOPY) -R .gnu.attributes $@.fp $@
rm -f $@.fp
|
1001-study-uboot
|
post/lib_powerpc/fpu/Makefile
|
Makefile
|
gpl3
| 1,531
|
/*
* Copyright (C) 2007
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*
* This file is originally a part of the GCC testsuite.
*/
#include <common.h>
#include <post.h>
GNU_FPOST_ATTR
#if CONFIG_POST & CONFIG_SYS_POST_FPU
static double func (const double *array)
{
double d = *array;
if (d == 0.0)
return d;
else
return d + func (array + 1);
}
int fpu_post_test_math5 (void)
{
double values[] = { 0.1e-100, 1.0, -1.0, 0.0 };
if (func (values) != 0.1e-100) {
post_log ("Error in FPU math5 test\n");
return -1;
}
return 0;
}
#endif /* CONFIG_POST & CONFIG_SYS_POST_FPU */
|
1001-study-uboot
|
post/lib_powerpc/fpu/acc1.c
|
C
|
gpl3
| 1,407
|
/*
* Copyright (C) 2007
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*
* This file is originally a part of the GCC testsuite.
*/
#include <common.h>
#include <post.h>
GNU_FPOST_ATTR
#if CONFIG_POST & CONFIG_SYS_POST_FPU
int fpu_post_test_math1 (void)
{
volatile double a;
double c, d;
volatile double b;
d = 1.0;
do
{
c = d;
d = c * 0.5;
b = 1 + d;
} while (b != 1.0);
a = 1.0 + c;
if (a == 1.0) {
post_log ("Error in FPU math1 test\n");
return -1;
}
return 0;
}
#endif /* CONFIG_POST & CONFIG_SYS_POST_FPU */
|
1001-study-uboot
|
post/lib_powerpc/fpu/20001122-1.c
|
C
|
gpl3
| 1,357
|
/*
* Borrowed from GCC 4.2.2 (which still was GPL v2+)
*/
/* 128-bit long double support routines for Darwin.
Copyright (C) 1993, 2003, 2004, 2005, 2006, 2007
Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
Software Foundation; either version 2, or (at your option) any later
version.
In addition to the permissions in the GNU General Public License, the
Free Software Foundation gives you unlimited permission to link the
compiled version of this file into combinations with other programs,
and to distribute those combinations without any restriction coming
from the use of this file. (The General Public License restrictions
do apply in other respects; for example, they cover modification of
the file, and distribution when not linked into a combine
executable.)
GCC is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING. If not, write to the Free
Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
02110-1301, USA. */
/*
* Implementations of floating-point long double basic arithmetic
* functions called by the IBM C compiler when generating code for
* PowerPC platforms. In particular, the following functions are
* implemented: __gcc_qadd, __gcc_qsub, __gcc_qmul, and __gcc_qdiv.
* Double-double algorithms are based on the paper "Doubled-Precision
* IEEE Standard 754 Floating-Point Arithmetic" by W. Kahan, February 26,
* 1987. An alternative published reference is "Software for
* Doubled-Precision Floating-Point Computations", by Seppo Linnainmaa,
* ACM TOMS vol 7 no 3, September 1981, pages 272-283.
*/
/*
* Each long double is made up of two IEEE doubles. The value of the
* long double is the sum of the values of the two parts. The most
* significant part is required to be the value of the long double
* rounded to the nearest double, as specified by IEEE. For Inf
* values, the least significant part is required to be one of +0.0 or
* -0.0. No other requirements are made; so, for example, 1.0 may be
* represented as (1.0, +0.0) or (1.0, -0.0), and the low part of a
* NaN is don't-care.
*
* This code currently assumes big-endian.
*/
#define fabs(x) __builtin_fabs(x)
#define isless(x, y) __builtin_isless(x, y)
#define inf() __builtin_inf()
#define unlikely(x) __builtin_expect((x), 0)
#define nonfinite(a) unlikely(!isless(fabs(a), inf()))
typedef union {
long double ldval;
double dval[2];
} longDblUnion;
/* Add two 'long double' values and return the result. */
long double __gcc_qadd(double a, double aa, double c, double cc)
{
longDblUnion x;
double z, q, zz, xh;
z = a + c;
if (nonfinite(z)) {
z = cc + aa + c + a;
if (nonfinite(z))
return z;
x.dval[0] = z; /* Will always be DBL_MAX. */
zz = aa + cc;
if (fabs(a) > fabs(c))
x.dval[1] = a - z + c + zz;
else
x.dval[1] = c - z + a + zz;
} else {
q = a - z;
zz = q + c + (a - (q + z)) + aa + cc;
/* Keep -0 result. */
if (zz == 0.0)
return z;
xh = z + zz;
if (nonfinite(xh))
return xh;
x.dval[0] = xh;
x.dval[1] = z - xh + zz;
}
return x.ldval;
}
long double __gcc_qsub(double a, double b, double c, double d)
{
return __gcc_qadd(a, b, -c, -d);
}
long double __gcc_qmul(double a, double b, double c, double d)
{
longDblUnion z;
double t, tau, u, v, w;
t = a * c; /* Highest order double term. */
if (unlikely(t == 0) /* Preserve -0. */
|| nonfinite(t))
return t;
/* Sum terms of two highest orders. */
/* Use fused multiply-add to get low part of a * c. */
#ifndef __NO_FPRS__
asm("fmsub %0,%1,%2,%3" : "=f"(tau) : "f"(a), "f"(c), "f"(t));
#else
tau = fmsub(a, c, t);
#endif
v = a * d;
w = b * c;
tau += v + w; /* Add in other second-order terms. */
u = t + tau;
/* Construct long double result. */
if (nonfinite(u))
return u;
z.dval[0] = u;
z.dval[1] = (t - u) + tau;
return z.ldval;
}
|
1001-study-uboot
|
post/lib_powerpc/fpu/darwin-ldouble.c
|
C
|
gpl3
| 4,245
|
/*
* (C) Copyright 2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
/*
* CPU test
* Load/store multiple word instructions: lmw, stmw
*
* 27 consecutive words are loaded from a source memory buffer
* into GPRs r5 through r31. After that, 27 consecutive words are stored
* from the GPRs r5 through r31 into a target memory buffer. The contents
* of the source and target buffers are then compared.
*/
#include <post.h>
#include "cpu_asm.h"
#if CONFIG_POST & CONFIG_SYS_POST_CPU
extern void cpu_post_exec_02(ulong *code, ulong op1, ulong op2);
int cpu_post_test_multi(void)
{
int ret = 0;
unsigned int i;
ulong src[27], dst[27];
int flag = disable_interrupts();
ulong code[] = {
ASM_LMW(5, 3, 0), /* lmw r5, 0(r3) */
ASM_STMW(5, 4, 0), /* stmr r5, 0(r4) */
ASM_BLR, /* blr */
};
for (i = 0; i < ARRAY_SIZE(src); ++i) {
src[i] = i;
dst[i] = 0;
}
cpu_post_exec_02(code, (ulong) src, (ulong) dst);
ret = memcmp(src, dst, sizeof(dst)) == 0 ? 0 : -1;
if (ret != 0)
post_log("Error at multi test !\n");
if (flag)
enable_interrupts();
return ret;
}
#endif
|
1001-study-uboot
|
post/lib_powerpc/multi.c
|
C
|
gpl3
| 1,931
|
/*
* (C) Copyright 2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
/*
* CPU test
* Logic instructions: andi., andis.
*
* The test contains a pre-built table of instructions, operands and
* expected results. For each table entry, the test will cyclically use
* different sets of operand registers and result registers.
*/
#include <post.h>
#include "cpu_asm.h"
#if CONFIG_POST & CONFIG_SYS_POST_CPU
extern void cpu_post_exec_21 (ulong *code, ulong *cr, ulong *res, ulong op);
extern ulong cpu_post_makecr (long v);
static struct cpu_post_andi_s
{
ulong cmd;
ulong op1;
ushort op2;
ulong res;
} cpu_post_andi_table[] =
{
{
OP_ANDI_,
0x80008000,
0xffff,
0x00008000
},
{
OP_ANDIS_,
0x80008000,
0xffff,
0x80000000
},
};
static unsigned int cpu_post_andi_size = ARRAY_SIZE(cpu_post_andi_table);
int cpu_post_test_andi (void)
{
int ret = 0;
unsigned int i, reg;
int flag = disable_interrupts();
for (i = 0; i < cpu_post_andi_size && ret == 0; i++)
{
struct cpu_post_andi_s *test = cpu_post_andi_table + i;
for (reg = 0; reg < 32 && ret == 0; reg++)
{
unsigned int reg0 = (reg + 0) % 32;
unsigned int reg1 = (reg + 1) % 32;
unsigned int stk = reg < 16 ? 31 : 15;
unsigned long codecr[] =
{
ASM_STW(stk, 1, -4),
ASM_ADDI(stk, 1, -16),
ASM_STW(3, stk, 8),
ASM_STW(reg0, stk, 4),
ASM_STW(reg1, stk, 0),
ASM_LWZ(reg0, stk, 8),
ASM_11IX(test->cmd, reg1, reg0, test->op2),
ASM_STW(reg1, stk, 8),
ASM_LWZ(reg1, stk, 0),
ASM_LWZ(reg0, stk, 4),
ASM_LWZ(3, stk, 8),
ASM_ADDI(1, stk, 16),
ASM_LWZ(stk, 1, -4),
ASM_BLR,
};
ulong res;
ulong cr;
cpu_post_exec_21 (codecr, & cr, & res, test->op1);
ret = res == test->res &&
(cr & 0xe0000000) == cpu_post_makecr (res) ? 0 : -1;
if (ret != 0)
{
post_log ("Error at andi test %d !\n", i);
}
}
}
if (flag)
enable_interrupts();
return ret;
}
#endif
|
1001-study-uboot
|
post/lib_powerpc/andi.c
|
C
|
gpl3
| 2,811
|
/*
* (C) Copyright 2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
/*
* CPU test
* Store instructions: stb(x)(u), sth(x)(u), stw(x)(u)
*
* All operations are performed on a 16-byte array. The array
* is 4-byte aligned. The base register points to offset 8.
* The immediate offset (index register) ranges in [-8 ... +7].
* The test cases are composed so that they do not
* cause alignment exceptions.
* The test contains a pre-built table describing all test cases.
* The table entry contains:
* the instruction opcode, the value of the index register and
* the value of the source register. After executing the
* instruction, the test verifies the contents of the array
* and the value of the base register (it must change for "store
* with update" instructions).
*/
#include <post.h>
#include "cpu_asm.h"
#if CONFIG_POST & CONFIG_SYS_POST_CPU
extern void cpu_post_exec_12w (ulong *code, ulong *op1, ulong op2, ulong op3);
extern void cpu_post_exec_11w (ulong *code, ulong *op1, ulong op2);
static struct cpu_post_store_s
{
ulong cmd;
uint width;
int update;
int index;
ulong offset;
ulong value;
} cpu_post_store_table[] =
{
{
OP_STW,
4,
0,
0,
-4,
0xff00ff00
},
{
OP_STH,
2,
0,
0,
-2,
0xff00
},
{
OP_STB,
1,
0,
0,
-1,
0xff
},
{
OP_STWU,
4,
1,
0,
-4,
0xff00ff00
},
{
OP_STHU,
2,
1,
0,
-2,
0xff00
},
{
OP_STBU,
1,
1,
0,
-1,
0xff
},
{
OP_STWX,
4,
0,
1,
-4,
0xff00ff00
},
{
OP_STHX,
2,
0,
1,
-2,
0xff00
},
{
OP_STBX,
1,
0,
1,
-1,
0xff
},
{
OP_STWUX,
4,
1,
1,
-4,
0xff00ff00
},
{
OP_STHUX,
2,
1,
1,
-2,
0xff00
},
{
OP_STBUX,
1,
1,
1,
-1,
0xff
},
};
static unsigned int cpu_post_store_size = ARRAY_SIZE(cpu_post_store_table);
int cpu_post_test_store (void)
{
int ret = 0;
unsigned int i;
int flag = disable_interrupts();
for (i = 0; i < cpu_post_store_size && ret == 0; i++)
{
struct cpu_post_store_s *test = cpu_post_store_table + i;
uchar data[16] =
{ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 };
ulong base0 = (ulong) (data + 8);
ulong base = base0;
if (test->index)
{
ulong code[] =
{
ASM_12(test->cmd, 5, 3, 4),
ASM_BLR,
};
cpu_post_exec_12w (code, &base, test->offset, test->value);
}
else
{
ulong code[] =
{
ASM_11I(test->cmd, 4, 3, test->offset),
ASM_BLR,
};
cpu_post_exec_11w (code, &base, test->value);
}
if (ret == 0)
{
if (test->update)
ret = base == base0 + test->offset ? 0 : -1;
else
ret = base == base0 ? 0 : -1;
}
if (ret == 0)
{
switch (test->width)
{
case 1:
ret = *(uchar *)(base0 + test->offset) == test->value ?
0 : -1;
break;
case 2:
ret = *(ushort *)(base0 + test->offset) == test->value ?
0 : -1;
break;
case 4:
ret = *(ulong *)(base0 + test->offset) == test->value ?
0 : -1;
break;
}
}
if (ret != 0)
{
post_log ("Error at store test %d !\n", i);
}
}
if (flag)
enable_interrupts();
return ret;
}
#endif
|
1001-study-uboot
|
post/lib_powerpc/store.c
|
C
|
gpl3
| 3,990
|
/*
* (C) Copyright 2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
/*
* CPU test
* Shift instructions: rlwnm
*
* The test contains a pre-built table of instructions, operands and
* expected results. For each table entry, the test will cyclically use
* different sets of operand registers and result registers.
*/
#include <post.h>
#include "cpu_asm.h"
#if CONFIG_POST & CONFIG_SYS_POST_CPU
extern void cpu_post_exec_22 (ulong *code, ulong *cr, ulong *res, ulong op1,
ulong op2);
extern ulong cpu_post_makecr (long v);
static struct cpu_post_rlwnm_s
{
ulong cmd;
ulong op1;
ulong op2;
uchar mb;
uchar me;
ulong res;
} cpu_post_rlwnm_table[] =
{
{
OP_RLWNM,
0xffff0000,
24,
16,
23,
0x0000ff00
},
};
static unsigned int cpu_post_rlwnm_size = ARRAY_SIZE(cpu_post_rlwnm_table);
int cpu_post_test_rlwnm (void)
{
int ret = 0;
unsigned int i, reg;
int flag = disable_interrupts();
for (i = 0; i < cpu_post_rlwnm_size && ret == 0; i++)
{
struct cpu_post_rlwnm_s *test = cpu_post_rlwnm_table + i;
for (reg = 0; reg < 32 && ret == 0; reg++)
{
unsigned int reg0 = (reg + 0) % 32;
unsigned int reg1 = (reg + 1) % 32;
unsigned int reg2 = (reg + 2) % 32;
unsigned int stk = reg < 16 ? 31 : 15;
unsigned long code[] =
{
ASM_STW(stk, 1, -4),
ASM_ADDI(stk, 1, -24),
ASM_STW(3, stk, 12),
ASM_STW(4, stk, 16),
ASM_STW(reg0, stk, 8),
ASM_STW(reg1, stk, 4),
ASM_STW(reg2, stk, 0),
ASM_LWZ(reg1, stk, 12),
ASM_LWZ(reg0, stk, 16),
ASM_122(test->cmd, reg2, reg1, reg0, test->mb, test->me),
ASM_STW(reg2, stk, 12),
ASM_LWZ(reg2, stk, 0),
ASM_LWZ(reg1, stk, 4),
ASM_LWZ(reg0, stk, 8),
ASM_LWZ(3, stk, 12),
ASM_ADDI(1, stk, 24),
ASM_LWZ(stk, 1, -4),
ASM_BLR,
};
unsigned long codecr[] =
{
ASM_STW(stk, 1, -4),
ASM_ADDI(stk, 1, -24),
ASM_STW(3, stk, 12),
ASM_STW(4, stk, 16),
ASM_STW(reg0, stk, 8),
ASM_STW(reg1, stk, 4),
ASM_STW(reg2, stk, 0),
ASM_LWZ(reg1, stk, 12),
ASM_LWZ(reg0, stk, 16),
ASM_122(test->cmd, reg2, reg1, reg0, test->mb, test->me) |
BIT_C,
ASM_STW(reg2, stk, 12),
ASM_LWZ(reg2, stk, 0),
ASM_LWZ(reg1, stk, 4),
ASM_LWZ(reg0, stk, 8),
ASM_LWZ(3, stk, 12),
ASM_ADDI(1, stk, 24),
ASM_LWZ(stk, 1, -4),
ASM_BLR,
};
ulong res;
ulong cr;
if (ret == 0)
{
cr = 0;
cpu_post_exec_22 (code, & cr, & res, test->op1, test->op2);
ret = res == test->res && cr == 0 ? 0 : -1;
if (ret != 0)
{
post_log ("Error at rlwnm test %d !\n", i);
}
}
if (ret == 0)
{
cpu_post_exec_22 (codecr, & cr, & res, test->op1, test->op2);
ret = res == test->res &&
(cr & 0xe0000000) == cpu_post_makecr (res) ? 0 : -1;
if (ret != 0)
{
post_log ("Error at rlwnm test %d !\n", i);
}
}
}
}
if (flag)
enable_interrupts();
return ret;
}
#endif
|
1001-study-uboot
|
post/lib_powerpc/rlwnm.c
|
C
|
gpl3
| 3,757
|
/*
* (C) Copyright 2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef _CPU_ASM_H
#define _CPU_ASM_H
#define BIT_C 0x00000001
#define OP_BLR 0x4e800020
#define OP_EXTSB 0x7c000774
#define OP_EXTSH 0x7c000734
#define OP_NEG 0x7c0000d0
#define OP_CNTLZW 0x7c000034
#define OP_ADD 0x7c000214
#define OP_ADDC 0x7c000014
#define OP_ADDME 0x7c0001d4
#define OP_ADDZE 0x7c000194
#define OP_ADDE 0x7c000114
#define OP_ADDI 0x38000000
#define OP_SUBF 0x7c000050
#define OP_SUBFC 0x7c000010
#define OP_SUBFE 0x7c000110
#define OP_SUBFME 0x7c0001d0
#define OP_SUBFZE 0x7c000190
#define OP_MFCR 0x7c000026
#define OP_MTCR 0x7c0ff120
#define OP_MFXER 0x7c0102a6
#define OP_MTXER 0x7c0103a6
#define OP_MCRXR 0x7c000400
#define OP_MCRF 0x4c000000
#define OP_CRAND 0x4c000202
#define OP_CRANDC 0x4c000102
#define OP_CROR 0x4c000382
#define OP_CRORC 0x4c000342
#define OP_CRXOR 0x4c000182
#define OP_CRNAND 0x4c0001c2
#define OP_CRNOR 0x4c000042
#define OP_CREQV 0x4c000242
#define OP_CMPW 0x7c000000
#define OP_CMPLW 0x7c000040
#define OP_CMPWI 0x2c000000
#define OP_CMPLWI 0x28000000
#define OP_MULLW 0x7c0001d6
#define OP_MULHW 0x7c000096
#define OP_MULHWU 0x7c000016
#define OP_DIVW 0x7c0003d6
#define OP_DIVWU 0x7c000396
#define OP_OR 0x7c000378
#define OP_ORC 0x7c000338
#define OP_XOR 0x7c000278
#define OP_NAND 0x7c0003b8
#define OP_NOR 0x7c0000f8
#define OP_EQV 0x7c000238
#define OP_SLW 0x7c000030
#define OP_SRW 0x7c000430
#define OP_SRAW 0x7c000630
#define OP_ORI 0x60000000
#define OP_ORIS 0x64000000
#define OP_XORI 0x68000000
#define OP_XORIS 0x6c000000
#define OP_ANDI_ 0x70000000
#define OP_ANDIS_ 0x74000000
#define OP_SRAWI 0x7c000670
#define OP_RLWINM 0x54000000
#define OP_RLWNM 0x5c000000
#define OP_RLWIMI 0x50000000
#define OP_LWZ 0x80000000
#define OP_LHZ 0xa0000000
#define OP_LHA 0xa8000000
#define OP_LBZ 0x88000000
#define OP_LWZU 0x84000000
#define OP_LHZU 0xa4000000
#define OP_LHAU 0xac000000
#define OP_LBZU 0x8c000000
#define OP_LWZX 0x7c00002e
#define OP_LHZX 0x7c00022e
#define OP_LHAX 0x7c0002ae
#define OP_LBZX 0x7c0000ae
#define OP_LWZUX 0x7c00006e
#define OP_LHZUX 0x7c00026e
#define OP_LHAUX 0x7c0002ee
#define OP_LBZUX 0x7c0000ee
#define OP_STW 0x90000000
#define OP_STH 0xb0000000
#define OP_STB 0x98000000
#define OP_STWU 0x94000000
#define OP_STHU 0xb4000000
#define OP_STBU 0x9c000000
#define OP_STWX 0x7c00012e
#define OP_STHX 0x7c00032e
#define OP_STBX 0x7c0001ae
#define OP_STWUX 0x7c00016e
#define OP_STHUX 0x7c00036e
#define OP_STBUX 0x7c0001ee
#define OP_B 0x48000000
#define OP_BL 0x48000001
#define OP_BC 0x40000000
#define OP_BCL 0x40000001
#define OP_MTLR 0x7c0803a6
#define OP_MFLR 0x7c0802a6
#define OP_MTCTR 0x7c0903a6
#define OP_MFCTR 0x7c0902a6
#define OP_LMW 0xb8000000
#define OP_STMW 0xbc000000
#define OP_LSWI 0x7c0004aa
#define OP_LSWX 0x7c00042a
#define OP_STSWI 0x7c0005aa
#define OP_STSWX 0x7c00052a
#define ASM_0(opcode) (opcode)
#define ASM_1(opcode, rd) ((opcode) + \
((rd) << 21))
#define ASM_1C(opcode, cr) ((opcode) + \
((cr) << 23))
#define ASM_11(opcode, rd, rs) ((opcode) + \
((rd) << 21) + \
((rs) << 16))
#define ASM_11C(opcode, cd, cs) ((opcode) + \
((cd) << 23) + \
((cs) << 18))
#define ASM_11X(opcode, rd, rs) ((opcode) + \
((rs) << 21) + \
((rd) << 16))
#define ASM_11I(opcode, rd, rs, simm) ((opcode) + \
((rd) << 21) + \
((rs) << 16) + \
((simm) & 0xffff))
#define ASM_11IF(opcode, rd, rs, simm) ((opcode) + \
((rd) << 21) + \
((rs) << 16) + \
((simm) << 11))
#define ASM_11S(opcode, rd, rs, sh) ((opcode) + \
((rs) << 21) + \
((rd) << 16) + \
((sh) << 11))
#define ASM_11IX(opcode, rd, rs, imm) ((opcode) + \
((rs) << 21) + \
((rd) << 16) + \
((imm) & 0xffff))
#define ASM_12(opcode, rd, rs1, rs2) ((opcode) + \
((rd) << 21) + \
((rs1) << 16) + \
((rs2) << 11))
#define ASM_12F(opcode, fd, fs1, fs2) ((opcode) + \
((fd) << 21) + \
((fs1) << 16) + \
((fs2) << 11))
#define ASM_12X(opcode, rd, rs1, rs2) ((opcode) + \
((rs1) << 21) + \
((rd) << 16) + \
((rs2) << 11))
#define ASM_2C(opcode, cr, rs1, rs2) ((opcode) + \
((cr) << 23) + \
((rs1) << 16) + \
((rs2) << 11))
#define ASM_1IC(opcode, cr, rs, imm) ((opcode) + \
((cr) << 23) + \
((rs) << 16) + \
((imm) & 0xffff))
#define ASM_122(opcode, rd, rs1, rs2, imm1, imm2) \
((opcode) + \
((rs1) << 21) + \
((rd) << 16) + \
((rs2) << 11) + \
((imm1) << 6) + \
((imm2) << 1))
#define ASM_113(opcode, rd, rs, imm1, imm2, imm3) \
((opcode) + \
((rs) << 21) + \
((rd) << 16) + \
((imm1) << 11) + \
((imm2) << 6) + \
((imm3) << 1))
#define ASM_1O(opcode, off) ((opcode) + (off))
#define ASM_3O(opcode, bo, bi, off) ((opcode) + \
((bo) << 21) + \
((bi) << 16) + \
(off))
#define ASM_ADDI(rd, rs, simm) ASM_11I(OP_ADDI, rd, rs, simm)
#define ASM_BLR ASM_0(OP_BLR)
#define ASM_STW(rd, rs, simm) ASM_11I(OP_STW, rd, rs, simm)
#define ASM_LWZ(rd, rs, simm) ASM_11I(OP_LWZ, rd, rs, simm)
#define ASM_MFCR(rd) ASM_1(OP_MFCR, rd)
#define ASM_MTCR(rd) ASM_1(OP_MTCR, rd)
#define ASM_MFXER(rd) ASM_1(OP_MFXER, rd)
#define ASM_MTXER(rd) ASM_1(OP_MTXER, rd)
#define ASM_MFCTR(rd) ASM_1(OP_MFCTR, rd)
#define ASM_MTCTR(rd) ASM_1(OP_MTCTR, rd)
#define ASM_MCRXR(cr) ASM_1C(OP_MCRXR, cr)
#define ASM_MCRF(cd, cs) ASM_11C(OP_MCRF, cd, cs)
#define ASM_B(off) ASM_1O(OP_B, off)
#define ASM_BL(off) ASM_1O(OP_BL, off)
#define ASM_MFLR(rd) ASM_1(OP_MFLR, rd)
#define ASM_MTLR(rd) ASM_1(OP_MTLR, rd)
#define ASM_LI(rd, imm) ASM_ADDI(rd, 0, imm)
#define ASM_LMW(rd, rs, simm) ASM_11I(OP_LMW, rd, rs, simm)
#define ASM_STMW(rd, rs, simm) ASM_11I(OP_STMW, rd, rs, simm)
#define ASM_LSWI(rd, rs, simm) ASM_11IF(OP_LSWI, rd, rs, simm)
#define ASM_LSWX(rd, rs1, rs2) ASM_12(OP_LSWX, rd, rs1, rs2)
#define ASM_STSWI(rd, rs, simm) ASM_11IF(OP_STSWI, rd, rs, simm)
#define ASM_STSWX(rd, rs1, rs2) ASM_12(OP_STSWX, rd, rs1, rs2)
#endif /* _CPU_ASM_H */
|
1001-study-uboot
|
post/lib_powerpc/cpu_asm.h
|
C
|
gpl3
| 7,650
|
/*
* (C) Copyright 2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
/*
* CPU test
* Binary instructions instr rD,rA
*
* Logic instructions: neg
* Arithmetic instructions: addme, addze, subfme, subfze
* The test contains a pre-built table of instructions, operands and
* expected results. For each table entry, the test will cyclically use
* different sets of operand registers and result registers.
*/
#include <post.h>
#include "cpu_asm.h"
#if CONFIG_POST & CONFIG_SYS_POST_CPU
extern void cpu_post_exec_21 (ulong *code, ulong *cr, ulong *res, ulong op1);
extern ulong cpu_post_makecr (long v);
static struct cpu_post_two_s
{
ulong cmd;
ulong op;
ulong res;
} cpu_post_two_table[] =
{
{
OP_NEG,
3,
-3
},
{
OP_NEG,
5,
-5
},
{
OP_ADDME,
6,
5
},
{
OP_ADDZE,
5,
5
},
{
OP_SUBFME,
6,
~6 - 1
},
{
OP_SUBFZE,
5,
~5
},
};
static unsigned int cpu_post_two_size = ARRAY_SIZE(cpu_post_two_table);
int cpu_post_test_two (void)
{
int ret = 0;
unsigned int i, reg;
int flag = disable_interrupts();
for (i = 0; i < cpu_post_two_size && ret == 0; i++)
{
struct cpu_post_two_s *test = cpu_post_two_table + i;
for (reg = 0; reg < 32 && ret == 0; reg++)
{
unsigned int reg0 = (reg + 0) % 32;
unsigned int reg1 = (reg + 1) % 32;
unsigned int stk = reg < 16 ? 31 : 15;
unsigned long code[] =
{
ASM_STW(stk, 1, -4),
ASM_ADDI(stk, 1, -16),
ASM_STW(3, stk, 8),
ASM_STW(reg0, stk, 4),
ASM_STW(reg1, stk, 0),
ASM_LWZ(reg0, stk, 8),
ASM_11(test->cmd, reg1, reg0),
ASM_STW(reg1, stk, 8),
ASM_LWZ(reg1, stk, 0),
ASM_LWZ(reg0, stk, 4),
ASM_LWZ(3, stk, 8),
ASM_ADDI(1, stk, 16),
ASM_LWZ(stk, 1, -4),
ASM_BLR,
};
unsigned long codecr[] =
{
ASM_STW(stk, 1, -4),
ASM_ADDI(stk, 1, -16),
ASM_STW(3, stk, 8),
ASM_STW(reg0, stk, 4),
ASM_STW(reg1, stk, 0),
ASM_LWZ(reg0, stk, 8),
ASM_11(test->cmd, reg1, reg0) | BIT_C,
ASM_STW(reg1, stk, 8),
ASM_LWZ(reg1, stk, 0),
ASM_LWZ(reg0, stk, 4),
ASM_LWZ(3, stk, 8),
ASM_ADDI(1, stk, 16),
ASM_LWZ(stk, 1, -4),
ASM_BLR,
};
ulong res;
ulong cr;
if (ret == 0)
{
cr = 0;
cpu_post_exec_21 (code, & cr, & res, test->op);
ret = res == test->res && cr == 0 ? 0 : -1;
if (ret != 0)
{
post_log ("Error at two test %d !\n", i);
}
}
if (ret == 0)
{
cpu_post_exec_21 (codecr, & cr, & res, test->op);
ret = res == test->res &&
(cr & 0xe0000000) == cpu_post_makecr (res) ? 0 : -1;
if (ret != 0)
{
post_log ("Error at two test %d !\n", i);
}
}
}
}
if (flag)
enable_interrupts();
return ret;
}
#endif
|
1001-study-uboot
|
post/lib_powerpc/two.c
|
C
|
gpl3
| 3,548
|
/*
* (C) Copyright 2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
/*
* CPU test
* Complex calculations
*
* The calculations in this test are just a combination of simpler
* calculations, but probably under different timing conditions, etc.
*/
#include <post.h>
#include "cpu_asm.h"
#if CONFIG_POST & CONFIG_SYS_POST_CPU
extern int cpu_post_complex_1_asm (int a1, int a2, int a3, int a4, int n);
extern int cpu_post_complex_2_asm (int x, int n);
/*
* n
* SUM (a1 * a2 - a3) / a4 = n * result
* i=1
*/
static int cpu_post_test_complex_1 (void)
{
int a1 = 666;
int a2 = 667;
int a3 = 668;
int a4 = 66;
int n = 100;
int result = 6720; /* (a1 * a2 - a3) / a4 */
if (cpu_post_complex_1_asm(a1, a2, a3, a4, n) != n * result)
{
return -1;
}
return 0;
}
/* (1 + x + x^2 + ... + x^n) * (1 - x) = 1 - x^(n+1)
*/
static int cpu_post_test_complex_2 (void)
{
int ret = -1;
int x;
int n;
int k;
int left;
int right;
for (x = -8; x <= 8; x ++)
{
n = 9;
left = cpu_post_complex_2_asm(x, n);
left *= 1 - x;
right = 1;
for (k = 0; k <= n; k ++)
{
right *= x;
}
right = 1 - right;
if (left != right)
{
goto Done;
}
}
ret = 0;
Done:
return ret;
}
int cpu_post_test_complex (void)
{
int ret = 0;
int flag = disable_interrupts();
if (ret == 0)
{
ret = cpu_post_test_complex_1();
}
if (ret == 0)
{
ret = cpu_post_test_complex_2();
}
if (ret != 0)
{
post_log ("Error at complex test !\n");
}
if (flag)
enable_interrupts();
return ret;
}
#endif
|
1001-study-uboot
|
post/lib_powerpc/complex.c
|
C
|
gpl3
| 2,474
|
/*
* (C) Copyright 2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
/*
* CPU test
* Shift instructions: rlwimi
*
* The test contains a pre-built table of instructions, operands and
* expected results. For each table entry, the test will cyclically use
* different sets of operand registers and result registers.
*/
#include <post.h>
#include "cpu_asm.h"
#if CONFIG_POST & CONFIG_SYS_POST_CPU
extern void cpu_post_exec_22 (ulong *code, ulong *cr, ulong *res, ulong op1,
ulong op2);
extern ulong cpu_post_makecr (long v);
static struct cpu_post_rlwimi_s
{
ulong cmd;
ulong op0;
ulong op1;
uchar op2;
uchar mb;
uchar me;
ulong res;
} cpu_post_rlwimi_table[] =
{
{
OP_RLWIMI,
0xff00ffff,
0x0000aa00,
8,
8,
15,
0xffaaffff
},
};
static unsigned int cpu_post_rlwimi_size = ARRAY_SIZE(cpu_post_rlwimi_table);
int cpu_post_test_rlwimi (void)
{
int ret = 0;
unsigned int i, reg;
int flag = disable_interrupts();
for (i = 0; i < cpu_post_rlwimi_size && ret == 0; i++)
{
struct cpu_post_rlwimi_s *test = cpu_post_rlwimi_table + i;
for (reg = 0; reg < 32 && ret == 0; reg++)
{
unsigned int reg0 = (reg + 0) % 32;
unsigned int reg1 = (reg + 1) % 32;
unsigned int stk = reg < 16 ? 31 : 15;
unsigned long code[] =
{
ASM_STW(stk, 1, -4),
ASM_ADDI(stk, 1, -20),
ASM_STW(3, stk, 8),
ASM_STW(4, stk, 12),
ASM_STW(reg0, stk, 4),
ASM_STW(reg1, stk, 0),
ASM_LWZ(reg1, stk, 8),
ASM_LWZ(reg0, stk, 12),
ASM_113(test->cmd, reg1, reg0, test->op2, test->mb, test->me),
ASM_STW(reg1, stk, 8),
ASM_LWZ(reg1, stk, 0),
ASM_LWZ(reg0, stk, 4),
ASM_LWZ(3, stk, 8),
ASM_ADDI(1, stk, 20),
ASM_LWZ(stk, 1, -4),
ASM_BLR,
};
unsigned long codecr[] =
{
ASM_STW(stk, 1, -4),
ASM_ADDI(stk, 1, -20),
ASM_STW(3, stk, 8),
ASM_STW(4, stk, 12),
ASM_STW(reg0, stk, 4),
ASM_STW(reg1, stk, 0),
ASM_LWZ(reg1, stk, 8),
ASM_LWZ(reg0, stk, 12),
ASM_113(test->cmd, reg1, reg0, test->op2, test->mb, test->me) |
BIT_C,
ASM_STW(reg1, stk, 8),
ASM_LWZ(reg1, stk, 0),
ASM_LWZ(reg0, stk, 4),
ASM_LWZ(3, stk, 8),
ASM_ADDI(1, stk, 20),
ASM_LWZ(stk, 1, -4),
ASM_BLR,
};
ulong res;
ulong cr;
if (ret == 0)
{
cr = 0;
cpu_post_exec_22 (code, & cr, & res, test->op0, test->op1);
ret = res == test->res && cr == 0 ? 0 : -1;
if (ret != 0)
{
post_log ("Error at rlwimi test %d !\n", i);
}
}
if (ret == 0)
{
cpu_post_exec_22 (codecr, & cr, & res, test->op0, test->op1);
ret = res == test->res &&
(cr & 0xe0000000) == cpu_post_makecr (res) ? 0 : -1;
if (ret != 0)
{
post_log ("Error at rlwimi test %d !\n", i);
}
}
}
}
if (flag)
enable_interrupts();
return ret;
}
#endif
|
1001-study-uboot
|
post/lib_powerpc/rlwimi.c
|
C
|
gpl3
| 3,658
|
/*
* (C) Copyright 2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
/*
* CPU test
* Ternary instructions instr rA,rS,rB
*
* Logic instructions: or, orc, xor, nand, nor, eqv
* Shift instructions: slw, srw, sraw
*
* The test contains a pre-built table of instructions, operands and
* expected results. For each table entry, the test will cyclically use
* different sets of operand registers and result registers.
*/
#include <post.h>
#include "cpu_asm.h"
#if CONFIG_POST & CONFIG_SYS_POST_CPU
extern void cpu_post_exec_22 (ulong *code, ulong *cr, ulong *res, ulong op1,
ulong op2);
extern ulong cpu_post_makecr (long v);
static struct cpu_post_threex_s
{
ulong cmd;
ulong op1;
ulong op2;
ulong res;
} cpu_post_threex_table[] =
{
{
OP_OR,
0x1234,
0x5678,
0x1234 | 0x5678
},
{
OP_ORC,
0x1234,
0x5678,
0x1234 | ~0x5678
},
{
OP_XOR,
0x1234,
0x5678,
0x1234 ^ 0x5678
},
{
OP_NAND,
0x1234,
0x5678,
~(0x1234 & 0x5678)
},
{
OP_NOR,
0x1234,
0x5678,
~(0x1234 | 0x5678)
},
{
OP_EQV,
0x1234,
0x5678,
~(0x1234 ^ 0x5678)
},
{
OP_SLW,
0x80,
16,
0x800000
},
{
OP_SLW,
0x80,
32,
0
},
{
OP_SRW,
0x800000,
16,
0x80
},
{
OP_SRW,
0x800000,
32,
0
},
{
OP_SRAW,
0x80000000,
3,
0xf0000000
},
{
OP_SRAW,
0x8000,
3,
0x1000
},
};
static unsigned int cpu_post_threex_size = ARRAY_SIZE(cpu_post_threex_table);
int cpu_post_test_threex (void)
{
int ret = 0;
unsigned int i, reg;
int flag = disable_interrupts();
for (i = 0; i < cpu_post_threex_size && ret == 0; i++)
{
struct cpu_post_threex_s *test = cpu_post_threex_table + i;
for (reg = 0; reg < 32 && ret == 0; reg++)
{
unsigned int reg0 = (reg + 0) % 32;
unsigned int reg1 = (reg + 1) % 32;
unsigned int reg2 = (reg + 2) % 32;
unsigned int stk = reg < 16 ? 31 : 15;
unsigned long code[] =
{
ASM_STW(stk, 1, -4),
ASM_ADDI(stk, 1, -24),
ASM_STW(3, stk, 12),
ASM_STW(4, stk, 16),
ASM_STW(reg0, stk, 8),
ASM_STW(reg1, stk, 4),
ASM_STW(reg2, stk, 0),
ASM_LWZ(reg1, stk, 12),
ASM_LWZ(reg0, stk, 16),
ASM_12X(test->cmd, reg2, reg1, reg0),
ASM_STW(reg2, stk, 12),
ASM_LWZ(reg2, stk, 0),
ASM_LWZ(reg1, stk, 4),
ASM_LWZ(reg0, stk, 8),
ASM_LWZ(3, stk, 12),
ASM_ADDI(1, stk, 24),
ASM_LWZ(stk, 1, -4),
ASM_BLR,
};
unsigned long codecr[] =
{
ASM_STW(stk, 1, -4),
ASM_ADDI(stk, 1, -24),
ASM_STW(3, stk, 12),
ASM_STW(4, stk, 16),
ASM_STW(reg0, stk, 8),
ASM_STW(reg1, stk, 4),
ASM_STW(reg2, stk, 0),
ASM_LWZ(reg1, stk, 12),
ASM_LWZ(reg0, stk, 16),
ASM_12X(test->cmd, reg2, reg1, reg0) | BIT_C,
ASM_STW(reg2, stk, 12),
ASM_LWZ(reg2, stk, 0),
ASM_LWZ(reg1, stk, 4),
ASM_LWZ(reg0, stk, 8),
ASM_LWZ(3, stk, 12),
ASM_ADDI(1, stk, 24),
ASM_LWZ(stk, 1, -4),
ASM_BLR,
};
ulong res;
ulong cr;
if (ret == 0)
{
cr = 0;
cpu_post_exec_22 (code, & cr, & res, test->op1, test->op2);
ret = res == test->res && cr == 0 ? 0 : -1;
if (ret != 0)
{
post_log ("Error at threex test %d !\n", i);
}
}
if (ret == 0)
{
cpu_post_exec_22 (codecr, & cr, & res, test->op1, test->op2);
ret = res == test->res &&
(cr & 0xe0000000) == cpu_post_makecr (res) ? 0 : -1;
if (ret != 0)
{
post_log ("Error at threex test %d !\n", i);
}
}
}
}
if (flag)
enable_interrupts();
return ret;
}
#endif
|
1001-study-uboot
|
post/lib_powerpc/threex.c
|
C
|
gpl3
| 4,350
|
/*
* (C) Copyright 2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
/*
* CPU test
* Shift instructions: rlwinm
*
* The test contains a pre-built table of instructions, operands and
* expected results. For each table entry, the test will cyclically use
* different sets of operand registers and result registers.
*/
#include <post.h>
#include "cpu_asm.h"
#if CONFIG_POST & CONFIG_SYS_POST_CPU
extern void cpu_post_exec_21 (ulong *code, ulong *cr, ulong *res, ulong op1);
extern ulong cpu_post_makecr (long v);
static struct cpu_post_rlwinm_s
{
ulong cmd;
ulong op1;
uchar op2;
uchar mb;
uchar me;
ulong res;
} cpu_post_rlwinm_table[] =
{
{
OP_RLWINM,
0xffff0000,
24,
16,
23,
0x0000ff00
},
};
static unsigned int cpu_post_rlwinm_size = ARRAY_SIZE(cpu_post_rlwinm_table);
int cpu_post_test_rlwinm (void)
{
int ret = 0;
unsigned int i, reg;
int flag = disable_interrupts();
for (i = 0; i < cpu_post_rlwinm_size && ret == 0; i++)
{
struct cpu_post_rlwinm_s *test = cpu_post_rlwinm_table + i;
for (reg = 0; reg < 32 && ret == 0; reg++)
{
unsigned int reg0 = (reg + 0) % 32;
unsigned int reg1 = (reg + 1) % 32;
unsigned int stk = reg < 16 ? 31 : 15;
unsigned long code[] =
{
ASM_STW(stk, 1, -4),
ASM_ADDI(stk, 1, -16),
ASM_STW(3, stk, 8),
ASM_STW(reg0, stk, 4),
ASM_STW(reg1, stk, 0),
ASM_LWZ(reg0, stk, 8),
ASM_113(test->cmd, reg1, reg0, test->op2, test->mb, test->me),
ASM_STW(reg1, stk, 8),
ASM_LWZ(reg1, stk, 0),
ASM_LWZ(reg0, stk, 4),
ASM_LWZ(3, stk, 8),
ASM_ADDI(1, stk, 16),
ASM_LWZ(stk, 1, -4),
ASM_BLR,
};
unsigned long codecr[] =
{
ASM_STW(stk, 1, -4),
ASM_ADDI(stk, 1, -16),
ASM_STW(3, stk, 8),
ASM_STW(reg0, stk, 4),
ASM_STW(reg1, stk, 0),
ASM_LWZ(reg0, stk, 8),
ASM_113(test->cmd, reg1, reg0, test->op2, test->mb,
test->me) | BIT_C,
ASM_STW(reg1, stk, 8),
ASM_LWZ(reg1, stk, 0),
ASM_LWZ(reg0, stk, 4),
ASM_LWZ(3, stk, 8),
ASM_ADDI(1, stk, 16),
ASM_LWZ(stk, 1, -4),
ASM_BLR,
};
ulong res;
ulong cr;
if (ret == 0)
{
cr = 0;
cpu_post_exec_21 (code, & cr, & res, test->op1);
ret = res == test->res && cr == 0 ? 0 : -1;
if (ret != 0)
{
post_log ("Error at rlwinm test %d !\n", i);
}
}
if (ret == 0)
{
cpu_post_exec_21 (codecr, & cr, & res, test->op1);
ret = res == test->res &&
(cr & 0xe0000000) == cpu_post_makecr (res) ? 0 : -1;
if (ret != 0)
{
post_log ("Error at rlwinm test %d !\n", i);
}
}
}
}
if (flag)
enable_interrupts();
return ret;
}
#endif
|
1001-study-uboot
|
post/lib_powerpc/rlwinm.c
|
C
|
gpl3
| 3,495
|
/*
* (C) Copyright 2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
/*
* CPU test
* Binary instructions instr rA,rS
*
* Logic instructions: cntlzw
* Arithmetic instructions: extsb, extsh
* The test contains a pre-built table of instructions, operands and
* expected results. For each table entry, the test will cyclically use
* different sets of operand registers and result registers.
*/
#include <post.h>
#include "cpu_asm.h"
#if CONFIG_POST & CONFIG_SYS_POST_CPU
extern void cpu_post_exec_21 (ulong *code, ulong *cr, ulong *res, ulong op1);
extern ulong cpu_post_makecr (long v);
static struct cpu_post_twox_s
{
ulong cmd;
ulong op;
ulong res;
} cpu_post_twox_table[] =
{
{
OP_EXTSB,
3,
3
},
{
OP_EXTSB,
0xff,
-1
},
{
OP_EXTSH,
3,
3
},
{
OP_EXTSH,
0xff,
0xff
},
{
OP_EXTSH,
0xffff,
-1
},
{
OP_CNTLZW,
0x000fffff,
12
},
};
static unsigned int cpu_post_twox_size = ARRAY_SIZE(cpu_post_twox_table);
int cpu_post_test_twox (void)
{
int ret = 0;
unsigned int i, reg;
int flag = disable_interrupts();
for (i = 0; i < cpu_post_twox_size && ret == 0; i++)
{
struct cpu_post_twox_s *test = cpu_post_twox_table + i;
for (reg = 0; reg < 32 && ret == 0; reg++)
{
unsigned int reg0 = (reg + 0) % 32;
unsigned int reg1 = (reg + 1) % 32;
unsigned int stk = reg < 16 ? 31 : 15;
unsigned long code[] =
{
ASM_STW(stk, 1, -4),
ASM_ADDI(stk, 1, -16),
ASM_STW(3, stk, 8),
ASM_STW(reg0, stk, 4),
ASM_STW(reg1, stk, 0),
ASM_LWZ(reg0, stk, 8),
ASM_11X(test->cmd, reg1, reg0),
ASM_STW(reg1, stk, 8),
ASM_LWZ(reg1, stk, 0),
ASM_LWZ(reg0, stk, 4),
ASM_LWZ(3, stk, 8),
ASM_ADDI(1, stk, 16),
ASM_LWZ(stk, 1, -4),
ASM_BLR,
};
unsigned long codecr[] =
{
ASM_STW(stk, 1, -4),
ASM_ADDI(stk, 1, -16),
ASM_STW(3, stk, 8),
ASM_STW(reg0, stk, 4),
ASM_STW(reg1, stk, 0),
ASM_LWZ(reg0, stk, 8),
ASM_11X(test->cmd, reg1, reg0) | BIT_C,
ASM_STW(reg1, stk, 8),
ASM_LWZ(reg1, stk, 0),
ASM_LWZ(reg0, stk, 4),
ASM_LWZ(3, stk, 8),
ASM_ADDI(1, stk, 16),
ASM_LWZ(stk, 1, -4),
ASM_BLR,
};
ulong res;
ulong cr;
if (ret == 0)
{
cr = 0;
cpu_post_exec_21 (code, & cr, & res, test->op);
ret = res == test->res && cr == 0 ? 0 : -1;
if (ret != 0)
{
post_log ("Error at twox test %d !\n", i);
}
}
if (ret == 0)
{
cpu_post_exec_21 (codecr, & cr, & res, test->op);
ret = res == test->res &&
(cr & 0xe0000000) == cpu_post_makecr (res) ? 0 : -1;
if (ret != 0)
{
post_log ("Error at twox test %d !\n", i);
}
}
}
}
if (flag)
enable_interrupts();
return ret;
}
#endif
|
1001-study-uboot
|
post/lib_powerpc/twox.c
|
C
|
gpl3
| 3,589
|
#
# (C) Copyright 2002-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = libpostdrivers.o
COBJS-$(CONFIG_HAS_POST) += flash.o i2c.o memory.o rtc.o
include $(TOPDIR)/post/rules.mk
|
1001-study-uboot
|
post/drivers/Makefile
|
Makefile
|
gpl3
| 1,006
|
/*
* Parallel NOR Flash tests
*
* Copyright (c) 2005-2011 Analog Devices Inc.
*
* Licensed under the GPL-2 or later.
*/
#include <common.h>
#include <malloc.h>
#include <post.h>
#include <flash.h>
#if CONFIG_POST & CONFIG_SYS_POST_FLASH
/*
* This code will walk over the declared sectors erasing them,
* then programming them, then verifying the written contents.
* Possible future work:
* - verify sectors before/after are not erased/written
* - verify partial writes (e.g. programming only middle of sector)
* - verify the contents of the erased sector
* - better seed pattern than 0x00..0xff
*/
#ifndef CONFIG_SYS_POST_FLASH_NUM
# define CONFIG_SYS_POST_FLASH_NUM 0
#endif
#if CONFIG_SYS_POST_FLASH_START >= CONFIG_SYS_POST_FLASH_END
# error "invalid flash block start/end"
#endif
extern flash_info_t flash_info[];
static void *seed_src_data(void *ptr, ulong *old_len, ulong new_len)
{
unsigned char *p;
ulong i;
p = ptr = realloc(ptr, new_len);
if (!ptr)
return ptr;
for (i = *old_len; i < new_len; ++i)
p[i] = i;
*old_len = new_len;
return ptr;
}
int flash_post_test(int flags)
{
ulong len;
void *src;
int ret, n, n_start, n_end;
flash_info_t *info;
/* the output from the common flash layers needs help */
puts("\n");
len = 0;
src = NULL;
info = &flash_info[CONFIG_SYS_POST_FLASH_NUM];
n_start = CONFIG_SYS_POST_FLASH_START;
n_end = CONFIG_SYS_POST_FLASH_END;
for (n = n_start; n < n_end; ++n) {
ulong s_start, s_len, s_off;
s_start = info->start[n];
s_len = flash_sector_size(info, n);
s_off = s_start - info->start[0];
src = seed_src_data(src, &len, s_len);
if (!src) {
printf("malloc(%#lx) failed\n", s_len);
return 1;
}
printf("\tsector %i: %#lx +%#lx", n, s_start, s_len);
ret = flash_erase(info, n, n + 1);
if (ret) {
flash_perror(ret);
break;
}
ret = write_buff(info, src, s_start, s_len);
if (ret) {
flash_perror(ret);
break;
}
ret = memcmp(src, (void *)s_start, s_len);
if (ret) {
printf(" verify failed with %i\n", ret);
break;
}
}
free(src);
return ret;
}
#endif
|
1001-study-uboot
|
post/drivers/flash.c
|
C
|
gpl3
| 2,105
|
/*
* (C) Copyright 2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
/* Memory test
*
* General observations:
* o The recommended test sequence is to test the data lines: if they are
* broken, nothing else will work properly. Then test the address
* lines. Finally, test the cells in the memory now that the test
* program knows that the address and data lines work properly.
* This sequence also helps isolate and identify what is faulty.
*
* o For the address line test, it is a good idea to use the base
* address of the lowest memory location, which causes a '1' bit to
* walk through a field of zeros on the address lines and the highest
* memory location, which causes a '0' bit to walk through a field of
* '1's on the address line.
*
* o Floating buses can fool memory tests if the test routine writes
* a value and then reads it back immediately. The problem is, the
* write will charge the residual capacitance on the data bus so the
* bus retains its state briefely. When the test program reads the
* value back immediately, the capacitance of the bus can allow it
* to read back what was written, even though the memory circuitry
* is broken. To avoid this, the test program should write a test
* pattern to the target location, write a different pattern elsewhere
* to charge the residual capacitance in a differnt manner, then read
* the target location back.
*
* o Always read the target location EXACTLY ONCE and save it in a local
* variable. The problem with reading the target location more than
* once is that the second and subsequent reads may work properly,
* resulting in a failed test that tells the poor technician that
* "Memory error at 00000000, wrote aaaaaaaa, read aaaaaaaa" which
* doesn't help him one bit and causes puzzled phone calls. Been there,
* done that.
*
* Data line test:
* ---------------
* This tests data lines for shorts and opens by forcing adjacent data
* to opposite states. Because the data lines could be routed in an
* arbitrary manner the must ensure test patterns ensure that every case
* is tested. By using the following series of binary patterns every
* combination of adjacent bits is test regardless of routing.
*
* ...101010101010101010101010
* ...110011001100110011001100
* ...111100001111000011110000
* ...111111110000000011111111
*
* Carrying this out, gives us six hex patterns as follows:
*
* 0xaaaaaaaaaaaaaaaa
* 0xcccccccccccccccc
* 0xf0f0f0f0f0f0f0f0
* 0xff00ff00ff00ff00
* 0xffff0000ffff0000
* 0xffffffff00000000
*
* To test for short and opens to other signals on our boards, we
* simply test with the 1's complemnt of the paterns as well, resulting
* in twelve patterns total.
*
* After writing a test pattern. a special pattern 0x0123456789ABCDEF is
* written to a different address in case the data lines are floating.
* Thus, if a byte lane fails, you will see part of the special
* pattern in that byte lane when the test runs. For example, if the
* xx__xxxxxxxxxxxx byte line fails, you will see aa23aaaaaaaaaaaa
* (for the 'a' test pattern).
*
* Address line test:
* ------------------
* This function performs a test to verify that all the address lines
* hooked up to the RAM work properly. If there is an address line
* fault, it usually shows up as two different locations in the address
* map (related by the faulty address line) mapping to one physical
* memory storage location. The artifact that shows up is writing to
* the first location "changes" the second location.
*
* To test all address lines, we start with the given base address and
* xor the address with a '1' bit to flip one address line. For each
* test, we shift the '1' bit left to test the next address line.
*
* In the actual code, we start with address sizeof(ulong) since our
* test pattern we use is a ulong and thus, if we tried to test lower
* order address bits, it wouldn't work because our pattern would
* overwrite itself.
*
* Example for a 4 bit address space with the base at 0000:
* 0000 <- base
* 0001 <- test 1
* 0010 <- test 2
* 0100 <- test 3
* 1000 <- test 4
* Example for a 4 bit address space with the base at 0010:
* 0010 <- base
* 0011 <- test 1
* 0000 <- (below the base address, skipped)
* 0110 <- test 2
* 1010 <- test 3
*
* The test locations are successively tested to make sure that they are
* not "mirrored" onto the base address due to a faulty address line.
* Note that the base and each test location are related by one address
* line flipped. Note that the base address need not be all zeros.
*
* Memory tests 1-4:
* -----------------
* These tests verify RAM using sequential writes and reads
* to/from RAM. There are several test cases that use different patterns to
* verify RAM. Each test case fills a region of RAM with one pattern and
* then reads the region back and compares its contents with the pattern.
* The following patterns are used:
*
* 1a) zero pattern (0x00000000)
* 1b) negative pattern (0xffffffff)
* 1c) checkerboard pattern (0x55555555)
* 1d) checkerboard pattern (0xaaaaaaaa)
* 2) bit-flip pattern ((1 << (offset % 32))
* 3) address pattern (offset)
* 4) address pattern (~offset)
*
* Being run in normal mode, the test verifies only small 4Kb
* regions of RAM around each 1Mb boundary. For example, for 64Mb
* RAM the following areas are verified: 0x00000000-0x00000800,
* 0x000ff800-0x00100800, 0x001ff800-0x00200800, ..., 0x03fff800-
* 0x04000000. If the test is run in slow-test mode, it verifies
* the whole RAM.
*/
#include <post.h>
#include <watchdog.h>
#if CONFIG_POST & (CONFIG_SYS_POST_MEMORY | CONFIG_SYS_POST_MEM_REGIONS)
DECLARE_GLOBAL_DATA_PTR;
/*
* Define INJECT_*_ERRORS for testing error detection in the presence of
* _good_ hardware.
*/
#undef INJECT_DATA_ERRORS
#undef INJECT_ADDRESS_ERRORS
#ifdef INJECT_DATA_ERRORS
#warning "Injecting data line errors for testing purposes"
#endif
#ifdef INJECT_ADDRESS_ERRORS
#warning "Injecting address line errors for testing purposes"
#endif
/*
* This function performs a double word move from the data at
* the source pointer to the location at the destination pointer.
* This is helpful for testing memory on processors which have a 64 bit
* wide data bus.
*
* On those PowerPC with FPU, use assembly and a floating point move:
* this does a 64 bit move.
*
* For other processors, let the compiler generate the best code it can.
*/
static void move64(const unsigned long long *src, unsigned long long *dest)
{
#if defined(CONFIG_MPC8260) || defined(CONFIG_MPC824X)
asm ("lfd 0, 0(3)\n\t" /* fpr0 = *scr */
"stfd 0, 0(4)" /* *dest = fpr0 */
: : : "fr0" ); /* Clobbers fr0 */
return;
#else
*dest = *src;
#endif
}
/*
* This is 64 bit wide test patterns. Note that they reside in ROM
* (which presumably works) and the tests write them to RAM which may
* not work.
*
* The "otherpattern" is written to drive the data bus to values other
* than the test pattern. This is for detecting floating bus lines.
*
*/
const static unsigned long long pattern[] = {
0xaaaaaaaaaaaaaaaaULL,
0xccccccccccccccccULL,
0xf0f0f0f0f0f0f0f0ULL,
0xff00ff00ff00ff00ULL,
0xffff0000ffff0000ULL,
0xffffffff00000000ULL,
0x00000000ffffffffULL,
0x0000ffff0000ffffULL,
0x00ff00ff00ff00ffULL,
0x0f0f0f0f0f0f0f0fULL,
0x3333333333333333ULL,
0x5555555555555555ULL
};
const unsigned long long otherpattern = 0x0123456789abcdefULL;
static int memory_post_dataline(unsigned long long * pmem)
{
unsigned long long temp64 = 0;
int num_patterns = ARRAY_SIZE(pattern);
int i;
unsigned int hi, lo, pathi, patlo;
int ret = 0;
for ( i = 0; i < num_patterns; i++) {
move64(&(pattern[i]), pmem++);
/*
* Put a different pattern on the data lines: otherwise they
* may float long enough to read back what we wrote.
*/
move64(&otherpattern, pmem--);
move64(pmem, &temp64);
#ifdef INJECT_DATA_ERRORS
temp64 ^= 0x00008000;
#endif
if (temp64 != pattern[i]){
pathi = (pattern[i]>>32) & 0xffffffff;
patlo = pattern[i] & 0xffffffff;
hi = (temp64>>32) & 0xffffffff;
lo = temp64 & 0xffffffff;
post_log("Memory (date line) error at %08x, "
"wrote %08x%08x, read %08x%08x !\n",
pmem, pathi, patlo, hi, lo);
ret = -1;
}
}
return ret;
}
static int memory_post_addrline(ulong *testaddr, ulong *base, ulong size)
{
ulong *target;
ulong *end;
ulong readback;
ulong xor;
int ret = 0;
end = (ulong *)((ulong)base + size); /* pointer arith! */
xor = 0;
for(xor = sizeof(ulong); xor > 0; xor <<= 1) {
target = (ulong *)((ulong)testaddr ^ xor);
if((target >= base) && (target < end)) {
*testaddr = ~*target;
readback = *target;
#ifdef INJECT_ADDRESS_ERRORS
if(xor == 0x00008000) {
readback = *testaddr;
}
#endif
if(readback == *testaddr) {
post_log("Memory (address line) error at %08x<->%08x, "
"XOR value %08x !\n",
testaddr, target, xor);
ret = -1;
}
}
}
return ret;
}
static int memory_post_test1(unsigned long start,
unsigned long size,
unsigned long val)
{
unsigned long i;
ulong *mem = (ulong *) start;
ulong readback;
int ret = 0;
for (i = 0; i < size / sizeof (ulong); i++) {
mem[i] = val;
if (i % 1024 == 0)
WATCHDOG_RESET();
}
for (i = 0; i < size / sizeof (ulong) && !ret; i++) {
readback = mem[i];
if (readback != val) {
post_log("Memory error at %08x, "
"wrote %08x, read %08x !\n",
mem + i, val, readback);
ret = -1;
break;
}
if (i % 1024 == 0)
WATCHDOG_RESET();
}
return ret;
}
static int memory_post_test2(unsigned long start, unsigned long size)
{
unsigned long i;
ulong *mem = (ulong *) start;
ulong readback;
int ret = 0;
for (i = 0; i < size / sizeof (ulong); i++) {
mem[i] = 1 << (i % 32);
if (i % 1024 == 0)
WATCHDOG_RESET();
}
for (i = 0; i < size / sizeof (ulong) && !ret; i++) {
readback = mem[i];
if (readback != (1 << (i % 32))) {
post_log("Memory error at %08x, "
"wrote %08x, read %08x !\n",
mem + i, 1 << (i % 32), readback);
ret = -1;
break;
}
if (i % 1024 == 0)
WATCHDOG_RESET();
}
return ret;
}
static int memory_post_test3(unsigned long start, unsigned long size)
{
unsigned long i;
ulong *mem = (ulong *) start;
ulong readback;
int ret = 0;
for (i = 0; i < size / sizeof (ulong); i++) {
mem[i] = i;
if (i % 1024 == 0)
WATCHDOG_RESET();
}
for (i = 0; i < size / sizeof (ulong) && !ret; i++) {
readback = mem[i];
if (readback != i) {
post_log("Memory error at %08x, "
"wrote %08x, read %08x !\n",
mem + i, i, readback);
ret = -1;
break;
}
if (i % 1024 == 0)
WATCHDOG_RESET();
}
return ret;
}
static int memory_post_test4(unsigned long start, unsigned long size)
{
unsigned long i;
ulong *mem = (ulong *) start;
ulong readback;
int ret = 0;
for (i = 0; i < size / sizeof (ulong); i++) {
mem[i] = ~i;
if (i % 1024 == 0)
WATCHDOG_RESET();
}
for (i = 0; i < size / sizeof (ulong) && !ret; i++) {
readback = mem[i];
if (readback != ~i) {
post_log("Memory error at %08x, "
"wrote %08x, read %08x !\n",
mem + i, ~i, readback);
ret = -1;
break;
}
if (i % 1024 == 0)
WATCHDOG_RESET();
}
return ret;
}
static int memory_post_test_lines(unsigned long start, unsigned long size)
{
int ret = 0;
ret = memory_post_dataline((unsigned long long *)start);
WATCHDOG_RESET();
if (!ret)
ret = memory_post_addrline((ulong *)start, (ulong *)start,
size);
WATCHDOG_RESET();
if (!ret)
ret = memory_post_addrline((ulong *)(start+size-8),
(ulong *)start, size);
WATCHDOG_RESET();
return ret;
}
static int memory_post_test_patterns(unsigned long start, unsigned long size)
{
int ret = 0;
ret = memory_post_test1(start, size, 0x00000000);
WATCHDOG_RESET();
if (!ret)
ret = memory_post_test1(start, size, 0xffffffff);
WATCHDOG_RESET();
if (!ret)
ret = memory_post_test1(start, size, 0x55555555);
WATCHDOG_RESET();
if (!ret)
ret = memory_post_test1(start, size, 0xaaaaaaaa);
WATCHDOG_RESET();
if (!ret)
ret = memory_post_test2(start, size);
WATCHDOG_RESET();
if (!ret)
ret = memory_post_test3(start, size);
WATCHDOG_RESET();
if (!ret)
ret = memory_post_test4(start, size);
WATCHDOG_RESET();
return ret;
}
static int memory_post_test_regions(unsigned long start, unsigned long size)
{
unsigned long i;
int ret = 0;
for (i = 0; i < (size >> 20) && (!ret); i++) {
if (!ret)
ret = memory_post_test_patterns(start + (i << 20),
0x800);
if (!ret)
ret = memory_post_test_patterns(start + (i << 20) +
0xff800, 0x800);
}
return ret;
}
static int memory_post_tests(unsigned long start, unsigned long size)
{
int ret = 0;
ret = memory_post_test_lines(start, size);
if (!ret)
ret = memory_post_test_patterns(start, size);
return ret;
}
/*
* !! this is only valid, if you have contiguous memory banks !!
*/
__attribute__((weak))
int arch_memory_test_prepare(u32 *vstart, u32 *size, phys_addr_t *phys_offset)
{
bd_t *bd = gd->bd;
*vstart = CONFIG_SYS_SDRAM_BASE;
*size = (gd->ram_size >= 256 << 20 ?
256 << 20 : gd->ram_size) - (1 << 20);
/* Limit area to be tested with the board info struct */
if ((*vstart) + (*size) > (ulong)bd)
*size = (ulong)bd - *vstart;
return 0;
}
__attribute__((weak))
int arch_memory_test_advance(u32 *vstart, u32 *size, phys_addr_t *phys_offset)
{
return 1;
}
__attribute__((weak))
int arch_memory_test_cleanup(u32 *vstart, u32 *size, phys_addr_t *phys_offset)
{
return 0;
}
__attribute__((weak))
void arch_memory_failure_handle(void)
{
return;
}
int memory_regions_post_test(int flags)
{
int ret = 0;
phys_addr_t phys_offset = 0;
u32 memsize, vstart;
arch_memory_test_prepare(&vstart, &memsize, &phys_offset);
ret = memory_post_test_lines(vstart, memsize);
if (!ret)
ret = memory_post_test_regions(vstart, memsize);
return ret;
}
int memory_post_test(int flags)
{
int ret = 0;
phys_addr_t phys_offset = 0;
u32 memsize, vstart;
arch_memory_test_prepare(&vstart, &memsize, &phys_offset);
do {
if (flags & POST_SLOWTEST) {
ret = memory_post_tests(vstart, memsize);
} else { /* POST_NORMAL */
ret = memory_post_test_regions(vstart, memsize);
}
} while (!ret &&
!arch_memory_test_advance(&vstart, &memsize, &phys_offset));
arch_memory_test_cleanup(&vstart, &memsize, &phys_offset);
if (ret)
arch_memory_failure_handle();
return ret;
}
#endif /* CONFIG_POST&(CONFIG_SYS_POST_MEMORY|CONFIG_SYS_POST_MEM_REGIONS) */
|
1001-study-uboot
|
post/drivers/memory.c
|
C
|
gpl3
| 15,506
|
/*
* (C) Copyright 2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*
* I2C test
*
* For verifying the I2C bus, a full I2C bus scanning is performed.
*
* #ifdef CONFIG_SYS_POST_I2C_ADDRS
* The test is considered as passed if all the devices and only the devices
* in the list are found.
* #ifdef CONFIG_SYS_POST_I2C_IGNORES
* Ignore devices listed in CONFIG_SYS_POST_I2C_IGNORES. These devices
* are optional or not vital to board functionality.
* #endif
* #else [ ! CONFIG_SYS_POST_I2C_ADDRS ]
* The test is considered as passed if any I2C device is found.
* #endif
*/
#include <common.h>
#include <post.h>
#include <i2c.h>
#if CONFIG_POST & CONFIG_SYS_POST_I2C
static int i2c_ignore_device(unsigned int chip)
{
#ifdef CONFIG_SYS_POST_I2C_IGNORES
const unsigned char i2c_ignore_list[] = CONFIG_SYS_POST_I2C_IGNORES;
int i;
for (i = 0; i < sizeof(i2c_ignore_list); i++)
if (i2c_ignore_list[i] == chip)
return 1;
#endif
return 0;
}
int i2c_post_test (int flags)
{
unsigned int i;
#ifndef CONFIG_SYS_POST_I2C_ADDRS
/* Start at address 1, address 0 is the general call address */
for (i = 1; i < 128; i++) {
if (i2c_ignore_device(i))
continue;
if (i2c_probe (i) == 0)
return 0;
}
/* No devices found */
return -1;
#else
unsigned int ret = 0;
int j;
unsigned char i2c_addr_list[] = CONFIG_SYS_POST_I2C_ADDRS;
/* Start at address 1, address 0 is the general call address */
for (i = 1; i < 128; i++) {
if (i2c_ignore_device(i))
continue;
if (i2c_probe(i) != 0)
continue;
for (j = 0; j < sizeof(i2c_addr_list); ++j) {
if (i == i2c_addr_list[j]) {
i2c_addr_list[j] = 0xff;
break;
}
}
if (j == sizeof(i2c_addr_list)) {
ret = -1;
post_log("I2C: addr %02x not expected\n", i);
}
}
for (i = 0; i < sizeof(i2c_addr_list); ++i) {
if (i2c_addr_list[i] == 0xff)
continue;
post_log("I2C: addr %02x did not respond\n", i2c_addr_list[i]);
ret = -1;
}
return ret;
#endif
}
#endif /* CONFIG_POST & CONFIG_SYS_POST_I2C */
|
1001-study-uboot
|
post/drivers/i2c.c
|
C
|
gpl3
| 2,845
|
/*
* (C) Copyright 2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
/*
* RTC test
*
* The Real Time Clock (RTC) operation is verified by this test.
* The following features are verified:
* o) RTC Power Fault
* This is verified by analyzing the rtc_get() return status.
* o) Time uniformity
* This is verified by reading RTC in polling within
* a short period of time.
* o) Passing month boundaries
* This is checked by setting RTC to a second before
* a month boundary and reading it after its passing the
* boundary. The test is performed for both leap- and
* nonleap-years.
*/
#include <post.h>
#include <rtc.h>
#if CONFIG_POST & CONFIG_SYS_POST_RTC
static int rtc_post_skip (ulong * diff)
{
struct rtc_time tm1;
struct rtc_time tm2;
ulong start1;
ulong start2;
rtc_get (&tm1);
start1 = get_timer (0);
while (1) {
rtc_get (&tm2);
start2 = get_timer (0);
if (tm1.tm_sec != tm2.tm_sec)
break;
if (start2 - start1 > 1500)
break;
}
if (tm1.tm_sec != tm2.tm_sec) {
*diff = start2 - start1;
return 0;
} else {
return -1;
}
}
static void rtc_post_restore (struct rtc_time *tm, unsigned int sec)
{
time_t t = mktime (tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_hour,
tm->tm_min, tm->tm_sec) + sec;
struct rtc_time ntm;
to_tm (t, &ntm);
rtc_set (&ntm);
}
int rtc_post_test (int flags)
{
ulong diff;
unsigned int i;
struct rtc_time svtm;
static unsigned int daysnl[] =
{ 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 };
static unsigned int daysl[] =
{ 31, 29, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 };
unsigned int ynl = 1999;
unsigned int yl = 2000;
unsigned int skipped = 0;
int reliable;
/* Time reliability */
reliable = rtc_get (&svtm);
/* Time uniformity */
if (rtc_post_skip (&diff) != 0) {
post_log ("Timeout while waiting for a new second !\n");
return -1;
}
for (i = 0; i < 5; i++) {
if (rtc_post_skip (&diff) != 0) {
post_log ("Timeout while waiting for a new second !\n");
return -1;
}
if (diff < 950 || diff > 1050) {
post_log ("Invalid second duration !\n");
return -1;
}
}
/* Passing month boundaries */
if (rtc_post_skip (&diff) != 0) {
post_log ("Timeout while waiting for a new second !\n");
return -1;
}
rtc_get (&svtm);
for (i = 0; i < 12; i++) {
time_t t = mktime (ynl, i + 1, daysnl[i], 23, 59, 59);
struct rtc_time tm;
to_tm (t, &tm);
rtc_set (&tm);
skipped++;
if (rtc_post_skip (&diff) != 0) {
rtc_post_restore (&svtm, skipped);
post_log ("Timeout while waiting for a new second !\n");
return -1;
}
rtc_get (&tm);
if (tm.tm_mon == i + 1) {
rtc_post_restore (&svtm, skipped);
post_log ("Month %d boundary is not passed !\n", i + 1);
return -1;
}
}
for (i = 0; i < 12; i++) {
time_t t = mktime (yl, i + 1, daysl[i], 23, 59, 59);
struct rtc_time tm;
to_tm (t, &tm);
rtc_set (&tm);
skipped++;
if (rtc_post_skip (&diff) != 0) {
rtc_post_restore (&svtm, skipped);
post_log ("Timeout while waiting for a new second !\n");
return -1;
}
rtc_get (&tm);
if (tm.tm_mon == i + 1) {
rtc_post_restore (&svtm, skipped);
post_log ("Month %d boundary is not passed !\n", i + 1);
return -1;
}
}
rtc_post_restore (&svtm, skipped);
/* If come here, then RTC operates correcty, check the correctness
* of the time it reports.
*/
if (reliable < 0) {
post_log ("RTC Time is not reliable! Power fault? \n");
return -1;
}
return 0;
}
#endif /* CONFIG_POST & CONFIG_SYS_POST_RTC */
|
1001-study-uboot
|
post/drivers/rtc.c
|
C
|
gpl3
| 4,386
|
#
# (C) Copyright 2002-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
include $(OBJTREE)/include/autoconf.mk
LIB = libpost.o
GPLIB-$(CONFIG_HAS_POST) += libgenpost.o
COBJS-$(CONFIG_HAS_POST) += post.o
COBJS-$(CONFIG_POST_STD_LIST) += tests.o
SPLIB-$(CONFIG_HAS_POST) = drivers/libpostdrivers.o
SPLIB-$(CONFIG_HAS_POST) += $(shell if [ -d lib_$(ARCH) ]; then echo \
"lib_$(ARCH)/libpost$(ARCH).o"; fi)
SPLIB-$(CONFIG_HAS_POST) += $(shell if [ -d lib_$(ARCH)/fpu ]; then echo \
"lib_$(ARCH)/fpu/libpost$(ARCH)fpu.o"; fi)
SPLIB-$(CONFIG_HAS_POST) += $(shell if [ -d cpu/$(CPU) ]; then echo \
"cpu/$(CPU)/libpost$(CPU).o"; fi)
SPLIB-$(CONFIG_HAS_POST) += $(shell if [ -d board/$(BOARD) ]; then echo \
"board/$(BOARD)/libpost$(BOARD).o"; fi)
GPLIB := $(addprefix $(obj),$(GPLIB-y))
SPLIB := $(addprefix $(obj),$(SPLIB-y))
COBJS := $(COBJS-y)
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
LIB := $(obj)$(LIB)
all: $(LIB)
postdeps:
@for lib in $(SPLIB-y) ; do \
$(MAKE) -C `dirname $$lib` all ; \
done
# generic POST library
$(GPLIB): $(obj).depend $(OBJS)
$(call cmd_link_o_target, $(OBJS))
# specific POST libraries
$(SPLIB): $(obj).depend postdeps
$(MAKE) -C $(dir $(subst $(obj),,$@))
# the POST lib archive
$(LIB): $(GPLIB) $(SPLIB)
$(call cmd_link_o_target, $^)
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################
|
1001-study-uboot
|
post/Makefile
|
Makefile
|
gpl3
| 2,392
|
/*
* (C) Copyright 2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
/*
* SPR test
*
* The test checks the contents of Special Purpose Registers (SPR) listed
* in the spr_test_list array below.
* Each SPR value is read using mfspr instruction, some bits are masked
* according to the table and the resulting value is compared to the
* corresponding table value.
*/
#include <post.h>
#if CONFIG_POST & CONFIG_SYS_POST_SPR
static struct
{
int number;
char * name;
unsigned long mask;
unsigned long value;
} spr_test_list [] = {
/* Standard Special-Purpose Registers */
{1, "XER", 0x00000000, 0x00000000},
{8, "LR", 0x00000000, 0x00000000},
{9, "CTR", 0x00000000, 0x00000000},
{18, "DSISR", 0x00000000, 0x00000000},
{19, "DAR", 0x00000000, 0x00000000},
{22, "DEC", 0x00000000, 0x00000000},
{26, "SRR0", 0x00000000, 0x00000000},
{27, "SRR1", 0x00000000, 0x00000000},
{272, "SPRG0", 0x00000000, 0x00000000},
{273, "SPRG1", 0x00000000, 0x00000000},
{274, "SPRG2", 0x00000000, 0x00000000},
{275, "SPRG3", 0x00000000, 0x00000000},
{287, "PVR", 0xFFFF0000, 0x00500000},
/* Additional Special-Purpose Registers */
{144, "CMPA", 0x00000000, 0x00000000},
{145, "CMPB", 0x00000000, 0x00000000},
{146, "CMPC", 0x00000000, 0x00000000},
{147, "CMPD", 0x00000000, 0x00000000},
{148, "ICR", 0xFFFFFFFF, 0x00000000},
{149, "DER", 0x00000000, 0x00000000},
{150, "COUNTA", 0xFFFFFFFF, 0x00000000},
{151, "COUNTB", 0xFFFFFFFF, 0x00000000},
{152, "CMPE", 0x00000000, 0x00000000},
{153, "CMPF", 0x00000000, 0x00000000},
{154, "CMPG", 0x00000000, 0x00000000},
{155, "CMPH", 0x00000000, 0x00000000},
{156, "LCTRL1", 0xFFFFFFFF, 0x00000000},
{157, "LCTRL2", 0xFFFFFFFF, 0x00000000},
{158, "ICTRL", 0xFFFFFFFF, 0x00000007},
{159, "BAR", 0x00000000, 0x00000000},
{630, "DPDR", 0x00000000, 0x00000000},
{631, "DPIR", 0x00000000, 0x00000000},
{638, "IMMR", 0xFFFF0000, CONFIG_SYS_IMMR },
{560, "IC_CST", 0x8E380000, 0x00000000},
{561, "IC_ADR", 0x00000000, 0x00000000},
{562, "IC_DAT", 0x00000000, 0x00000000},
{568, "DC_CST", 0xEF380000, 0x00000000},
{569, "DC_ADR", 0x00000000, 0x00000000},
{570, "DC_DAT", 0x00000000, 0x00000000},
{784, "MI_CTR", 0xFFFFFFFF, 0x00000000},
{786, "MI_AP", 0x00000000, 0x00000000},
{787, "MI_EPN", 0x00000000, 0x00000000},
{789, "MI_TWC", 0xFFFFFE02, 0x00000000},
{790, "MI_RPN", 0x00000000, 0x00000000},
{816, "MI_DBCAM", 0x00000000, 0x00000000},
{817, "MI_DBRAM0", 0x00000000, 0x00000000},
{818, "MI_DBRAM1", 0x00000000, 0x00000000},
{792, "MD_CTR", 0xFFFFFFFF, 0x04000000},
{793, "M_CASID", 0xFFFFFFF0, 0x00000000},
{794, "MD_AP", 0x00000000, 0x00000000},
{795, "MD_EPN", 0x00000000, 0x00000000},
{796, "M_TWB", 0x00000003, 0x00000000},
{797, "MD_TWC", 0x00000003, 0x00000000},
{798, "MD_RPN", 0x00000000, 0x00000000},
{799, "M_TW", 0x00000000, 0x00000000},
{824, "MD_DBCAM", 0x00000000, 0x00000000},
{825, "MD_DBRAM0", 0x00000000, 0x00000000},
{826, "MD_DBRAM1", 0x00000000, 0x00000000},
};
static int spr_test_list_size = ARRAY_SIZE(spr_test_list);
int spr_post_test (int flags)
{
int ret = 0;
int ic = icache_status ();
int i;
unsigned long code[] = {
0x7c6002a6, /* mfspr r3,SPR */
0x4e800020 /* blr */
};
unsigned long (*get_spr) (void) = (void *) code;
if (ic)
icache_disable ();
for (i = 0; i < spr_test_list_size; i++) {
int num = spr_test_list[i].number;
/* mfspr r3,num */
code[0] = 0x7c6002a6 | ((num & 0x1F) << 16) | ((num & 0x3E0) << 6);
if ((get_spr () & spr_test_list[i].mask) !=
(spr_test_list[i].value & spr_test_list[i].mask)) {
post_log ("The value of %s special register "
"is incorrect: 0x%08X\n",
spr_test_list[i].name, get_spr ());
ret = -1;
}
}
if (ic)
icache_enable ();
return ret;
}
#endif /* CONFIG_POST & CONFIG_SYS_POST_SPR */
|
1001-study-uboot
|
post/cpu/mpc8xx/spr.c
|
C
|
gpl3
| 4,681
|
/*
* Copyright (C) 2002 Wolfgang Denk <wd@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#if defined(CONFIG_MPC823) || \
defined(CONFIG_MPC850) || \
defined(CONFIG_MPC855) || \
defined(CONFIG_MPC860) || \
defined(CONFIG_MPC862)
#include <post.h>
#include <ppc_asm.tmpl>
#include <ppc_defs.h>
#include <asm/cache.h>
#if CONFIG_POST & CONFIG_SYS_POST_CACHE
.text
cache_post_dinvalidate:
lis r10, IDC_INVALL@h
mtspr DC_CST, r10
blr
cache_post_iinvalidate:
lis r10, IDC_INVALL@h
mtspr IC_CST, r10
isync
blr
cache_post_ddisable:
lis r10, IDC_DISABLE@h
mtspr DC_CST, r10
blr
cache_post_dwb:
lis r10, IDC_ENABLE@h
mtspr DC_CST, r10
lis r10, DC_CFWT@h
mtspr DC_CST, r10
blr
cache_post_dwt:
lis r10, IDC_ENABLE@h
mtspr DC_CST, r10
lis r10, DC_SFWT@h
mtspr DC_CST, r10
blr
cache_post_idisable:
lis r10, IDC_DISABLE@h
mtspr IC_CST, r10
isync
blr
cache_post_ienable:
lis r10, IDC_ENABLE@h
mtspr IC_CST, r10
isync
blr
cache_post_iunlock:
lis r10, IDC_UNALL@h
mtspr IC_CST, r10
isync
blr
cache_post_ilock:
mtspr IC_ADR, r3
lis r10, IDC_LDLCK@h
mtspr IC_CST, r10
isync
blr
/*
* turn on the data cache
* switch the data cache to write-back or write-through mode
* invalidate the data cache
* write the negative pattern to a cached area
* read the area
*
* The negative pattern must be read at the last step
*/
.global cache_post_test1
cache_post_test1:
mflr r0
stw r0, 4(r1)
stwu r3, -4(r1)
stwu r4, -4(r1)
bl cache_post_dwb
bl cache_post_dinvalidate
/* Write the negative pattern to the test area */
lwz r0, 0(r1)
mtctr r0
li r0, 0xff
lwz r3, 4(r1)
subi r3, r3, 1
1:
stbu r0, 1(r3)
bdnz 1b
/* Read the test area */
lwz r0, 0(r1)
mtctr r0
lwz r4, 4(r1)
subi r4, r4, 1
li r3, 0
1:
lbzu r0, 1(r4)
cmpli cr0, r0, 0xff
beq 2f
li r3, -1
b 3f
2:
bdnz 1b
3:
bl cache_post_ddisable
bl cache_post_dinvalidate
addi r1, r1, 8
lwz r0, 4(r1)
mtlr r0
blr
/*
* turn on the data cache
* switch the data cache to write-back or write-through mode
* invalidate the data cache
* write the zero pattern to a cached area
* turn off the data cache
* write the negative pattern to the area
* turn on the data cache
* read the area
*
* The negative pattern must be read at the last step
*/
.global cache_post_test2
cache_post_test2:
mflr r0
stw r0, 4(r1)
stwu r3, -4(r1)
stwu r4, -4(r1)
bl cache_post_dwb
bl cache_post_dinvalidate
/* Write the zero pattern to the test area */
lwz r0, 0(r1)
mtctr r0
li r0, 0
lwz r3, 4(r1)
subi r3, r3, 1
1:
stbu r0, 1(r3)
bdnz 1b
bl cache_post_ddisable
/* Write the negative pattern to the test area */
lwz r0, 0(r1)
mtctr r0
li r0, 0xff
lwz r3, 4(r1)
subi r3, r3, 1
1:
stbu r0, 1(r3)
bdnz 1b
bl cache_post_dwb
/* Read the test area */
lwz r0, 0(r1)
mtctr r0
lwz r4, 4(r1)
subi r4, r4, 1
li r3, 0
1:
lbzu r0, 1(r4)
cmpli cr0, r0, 0xff
beq 2f
li r3, -1
b 3f
2:
bdnz 1b
3:
bl cache_post_ddisable
bl cache_post_dinvalidate
addi r1, r1, 8
lwz r0, 4(r1)
mtlr r0
blr
/*
* turn on the data cache
* switch the data cache to write-through mode
* invalidate the data cache
* write the zero pattern to a cached area
* flush the data cache
* write the negative pattern to the area
* turn off the data cache
* read the area
*
* The negative pattern must be read at the last step
*/
.global cache_post_test3
cache_post_test3:
mflr r0
stw r0, 4(r1)
stwu r3, -4(r1)
stwu r4, -4(r1)
bl cache_post_ddisable
bl cache_post_dinvalidate
/* Write the zero pattern to the test area */
lwz r0, 0(r1)
mtctr r0
li r0, 0
lwz r3, 4(r1)
subi r3, r3, 1
1:
stbu r0, 1(r3)
bdnz 1b
bl cache_post_dwt
bl cache_post_dinvalidate
/* Write the negative pattern to the test area */
lwz r0, 0(r1)
mtctr r0
li r0, 0xff
lwz r3, 4(r1)
subi r3, r3, 1
1:
stbu r0, 1(r3)
bdnz 1b
bl cache_post_ddisable
bl cache_post_dinvalidate
/* Read the test area */
lwz r0, 0(r1)
mtctr r0
lwz r4, 4(r1)
subi r4, r4, 1
li r3, 0
1:
lbzu r0, 1(r4)
cmpli cr0, r0, 0xff
beq 2f
li r3, -1
b 3f
2:
bdnz 1b
3:
addi r1, r1, 8
lwz r0, 4(r1)
mtlr r0
blr
/*
* turn on the data cache
* switch the data cache to write-back mode
* invalidate the data cache
* write the negative pattern to a cached area
* flush the data cache
* write the zero pattern to the area
* invalidate the data cache
* read the area
*
* The negative pattern must be read at the last step
*/
.global cache_post_test4
cache_post_test4:
mflr r0
stw r0, 4(r1)
stwu r3, -4(r1)
stwu r4, -4(r1)
bl cache_post_ddisable
bl cache_post_dinvalidate
/* Write the negative pattern to the test area */
lwz r0, 0(r1)
mtctr r0
li r0, 0xff
lwz r3, 4(r1)
subi r3, r3, 1
1:
stbu r0, 1(r3)
bdnz 1b
bl cache_post_dwb
bl cache_post_dinvalidate
/* Write the zero pattern to the test area */
lwz r0, 0(r1)
mtctr r0
li r0, 0
lwz r3, 4(r1)
subi r3, r3, 1
1:
stbu r0, 1(r3)
bdnz 1b
bl cache_post_ddisable
bl cache_post_dinvalidate
/* Read the test area */
lwz r0, 0(r1)
mtctr r0
lwz r4, 4(r1)
subi r4, r4, 1
li r3, 0
1:
lbzu r0, 1(r4)
cmpli cr0, r0, 0xff
beq 2f
li r3, -1
b 3f
2:
bdnz 1b
3:
addi r1, r1, 8
lwz r0, 4(r1)
mtlr r0
blr
cache_post_test5_1:
li r3, 0
cache_post_test5_2:
li r3, -1
/*
* turn on the instruction cache
* unlock the entire instruction cache
* invalidate the instruction cache
* lock a branch instruction in the instruction cache
* replace the branch instruction with "nop"
* jump to the branch instruction
* check that the branch instruction was executed
*/
.global cache_post_test5
cache_post_test5:
mflr r0
stw r0, 4(r1)
bl cache_post_ienable
bl cache_post_iunlock
bl cache_post_iinvalidate
/* Compute r9 = cache_post_test5_reloc */
bl cache_post_test5_reloc
cache_post_test5_reloc:
mflr r9
/* Copy the test instruction to cache_post_test5_data */
lis r3, (cache_post_test5_1 - cache_post_test5_reloc)@h
ori r3, r3, (cache_post_test5_1 - cache_post_test5_reloc)@l
add r3, r3, r9
lis r4, (cache_post_test5_data - cache_post_test5_reloc)@h
ori r4, r4, (cache_post_test5_data - cache_post_test5_reloc)@l
add r4, r4, r9
lwz r0, 0(r3)
stw r0, 0(r4)
bl cache_post_iinvalidate
/* Lock the branch instruction */
lis r3, (cache_post_test5_data - cache_post_test5_reloc)@h
ori r3, r3, (cache_post_test5_data - cache_post_test5_reloc)@l
add r3, r3, r9
bl cache_post_ilock
/* Replace the test instruction */
lis r3, (cache_post_test5_2 - cache_post_test5_reloc)@h
ori r3, r3, (cache_post_test5_2 - cache_post_test5_reloc)@l
add r3, r3, r9
lis r4, (cache_post_test5_data - cache_post_test5_reloc)@h
ori r4, r4, (cache_post_test5_data - cache_post_test5_reloc)@l
add r4, r4, r9
lwz r0, 0(r3)
stw r0, 0(r4)
bl cache_post_iinvalidate
/* Execute to the test instruction */
cache_post_test5_data:
nop
bl cache_post_iunlock
lwz r0, 4(r1)
mtlr r0
blr
cache_post_test6_1:
li r3, -1
cache_post_test6_2:
li r3, 0
/*
* turn on the instruction cache
* unlock the entire instruction cache
* invalidate the instruction cache
* lock a branch instruction in the instruction cache
* replace the branch instruction with "nop"
* jump to the branch instruction
* check that the branch instruction was executed
*/
.global cache_post_test6
cache_post_test6:
mflr r0
stw r0, 4(r1)
bl cache_post_ienable
bl cache_post_iunlock
bl cache_post_iinvalidate
/* Compute r9 = cache_post_test6_reloc */
bl cache_post_test6_reloc
cache_post_test6_reloc:
mflr r9
/* Copy the test instruction to cache_post_test6_data */
lis r3, (cache_post_test6_1 - cache_post_test6_reloc)@h
ori r3, r3, (cache_post_test6_1 - cache_post_test6_reloc)@l
add r3, r3, r9
lis r4, (cache_post_test6_data - cache_post_test6_reloc)@h
ori r4, r4, (cache_post_test6_data - cache_post_test6_reloc)@l
add r4, r4, r9
lwz r0, 0(r3)
stw r0, 0(r4)
bl cache_post_iinvalidate
/* Replace the test instruction */
lis r3, (cache_post_test6_2 - cache_post_test6_reloc)@h
ori r3, r3, (cache_post_test6_2 - cache_post_test6_reloc)@l
add r3, r3, r9
lis r4, (cache_post_test6_data - cache_post_test6_reloc)@h
ori r4, r4, (cache_post_test6_data - cache_post_test6_reloc)@l
add r4, r4, r9
lwz r0, 0(r3)
stw r0, 0(r4)
bl cache_post_iinvalidate
/* Execute to the test instruction */
cache_post_test6_data:
nop
lwz r0, 4(r1)
mtlr r0
blr
#endif /* CONFIG_MPC823 || MPC850 || MPC855 || MPC860 */
#endif /* CONFIG_POST & CONFIG_SYS_POST_CACHE */
|
1001-study-uboot
|
post/cpu/mpc8xx/cache_8xx.S
|
Unix Assembly
|
gpl3
| 9,245
|
/*
* (C) Copyright 2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
/*
* Watchdog test
*
* The test verifies the watchdog timer operation.
* On the first iteration, the test routine disables interrupts and
* makes a 10-second delay. If the system does not reboot during this delay,
* the watchdog timer is not operational and the test fails. If the system
* reboots, on the second iteration the test routine reports a success.
*/
#include <post.h>
#include <watchdog.h>
#if CONFIG_POST & CONFIG_SYS_POST_WATCHDOG
static ulong gettbl (void)
{
ulong r;
asm ("mftbl %0":"=r" (r));
return r;
}
int watchdog_post_test (int flags)
{
if (flags & POST_REBOOT) {
/* Test passed */
return 0;
} else {
/* 10-second delay */
int ints = disable_interrupts ();
ulong base = gettbl ();
ulong clk = get_tbclk ();
while ((gettbl () - base) / 10 < clk);
if (ints)
enable_interrupts ();
/*
* If we have reached this point, the watchdog timer
* does not work
*/
return -1;
}
}
#endif /* CONFIG_POST & CONFIG_SYS_POST_WATCHDOG */
|
1001-study-uboot
|
post/cpu/mpc8xx/watchdog.c
|
C
|
gpl3
| 1,902
|
/*
* (C) Copyright 2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
/*
* Ethernet test
*
* The Serial Communication Controllers (SCC) listed in ctlr_list array below
* are tested in the loopback ethernet mode.
* The controllers are configured accordingly and several packets
* are transmitted. The configurable test parameters are:
* MIN_PACKET_LENGTH - minimum size of packet to transmit
* MAX_PACKET_LENGTH - maximum size of packet to transmit
* TEST_NUM - number of tests
*/
#include <post.h>
#if CONFIG_POST & CONFIG_SYS_POST_ETHER
#if defined(CONFIG_8xx)
#include <commproc.h>
#elif defined(CONFIG_MPC8260)
#include <asm/cpm_8260.h>
#else
#error "Apparently a bad configuration, please fix."
#endif
#include <command.h>
#include <net.h>
#include <serial.h>
DECLARE_GLOBAL_DATA_PTR;
#define MIN_PACKET_LENGTH 64
#define MAX_PACKET_LENGTH 256
#define TEST_NUM 1
#define CTLR_SCC 0
extern void spi_init_f (void);
extern void spi_init_r (void);
/* The list of controllers to test */
#if defined(CONFIG_MPC823)
static int ctlr_list[][2] = { {CTLR_SCC, 1} };
#else
static int ctlr_list[][2] = { };
#endif
static struct {
void (*init) (int index);
void (*halt) (int index);
int (*send) (int index, volatile void *packet, int length);
int (*recv) (int index, void *packet, int length);
} ctlr_proc[1];
static char *ctlr_name[1] = { "SCC" };
/* Ethernet Transmit and Receive Buffers */
#define DBUF_LENGTH 1520
#define TX_BUF_CNT 2
#define TOUT_LOOP 100
static char txbuf[DBUF_LENGTH];
static uint rxIdx; /* index of the current RX buffer */
static uint txIdx; /* index of the current TX buffer */
/*
* SCC Ethernet Tx and Rx buffer descriptors allocated at the
* immr->udata_bd address on Dual-Port RAM
* Provide for Double Buffering
*/
typedef volatile struct CommonBufferDescriptor {
cbd_t rxbd[PKTBUFSRX]; /* Rx BD */
cbd_t txbd[TX_BUF_CNT]; /* Tx BD */
} RTXBD;
static RTXBD *rtx;
/*
* SCC callbacks
*/
static void scc_init (int scc_index)
{
uchar ea[6];
static int proff[] = {
PROFF_SCC1,
PROFF_SCC2,
PROFF_SCC3,
PROFF_SCC4,
};
static unsigned int cpm_cr[] = {
CPM_CR_CH_SCC1,
CPM_CR_CH_SCC2,
CPM_CR_CH_SCC3,
CPM_CR_CH_SCC4,
};
int i;
scc_enet_t *pram_ptr;
volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
immr->im_cpm.cp_scc[scc_index].scc_gsmrl &=
~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
#if defined(CONFIG_FADS)
#if defined(CONFIG_MPC860T) || defined(CONFIG_MPC86xADS)
/* The FADS860T and MPC86xADS don't use the MODEM_EN or DATA_VOICE signals. */
*((uint *) BCSR4) &= ~BCSR4_ETHLOOP;
*((uint *) BCSR4) |= BCSR4_TFPLDL | BCSR4_TPSQEL;
*((uint *) BCSR1) &= ~BCSR1_ETHEN;
#else
*((uint *) BCSR4) &= ~(BCSR4_ETHLOOP | BCSR4_MODEM_EN);
*((uint *) BCSR4) |= BCSR4_TFPLDL | BCSR4_TPSQEL | BCSR4_DATA_VOICE;
*((uint *) BCSR1) &= ~BCSR1_ETHEN;
#endif
#endif
pram_ptr = (scc_enet_t *) & (immr->im_cpm.cp_dparam[proff[scc_index]]);
rxIdx = 0;
txIdx = 0;
#ifdef CONFIG_SYS_ALLOC_DPRAM
rtx = (RTXBD *) (immr->im_cpm.cp_dpmem +
dpram_alloc_align (sizeof (RTXBD), 8));
#else
rtx = (RTXBD *) (immr->im_cpm.cp_dpmem + CPM_SCC_BASE);
#endif
#if 0
#if (defined(PA_ENET_RXD) && defined(PA_ENET_TXD))
/* Configure port A pins for Txd and Rxd.
*/
immr->im_ioport.iop_papar |= (PA_ENET_RXD | PA_ENET_TXD);
immr->im_ioport.iop_padir &= ~(PA_ENET_RXD | PA_ENET_TXD);
immr->im_ioport.iop_paodr &= ~PA_ENET_TXD;
#elif (defined(PB_ENET_RXD) && defined(PB_ENET_TXD))
/* Configure port B pins for Txd and Rxd.
*/
immr->im_cpm.cp_pbpar |= (PB_ENET_RXD | PB_ENET_TXD);
immr->im_cpm.cp_pbdir &= ~(PB_ENET_RXD | PB_ENET_TXD);
immr->im_cpm.cp_pbodr &= ~PB_ENET_TXD;
#else
#error Configuration Error: exactly ONE of PA_ENET_[RT]XD, PB_ENET_[RT]XD must be defined
#endif
#if defined(PC_ENET_LBK)
/* Configure port C pins to disable External Loopback
*/
immr->im_ioport.iop_pcpar &= ~PC_ENET_LBK;
immr->im_ioport.iop_pcdir |= PC_ENET_LBK;
immr->im_ioport.iop_pcso &= ~PC_ENET_LBK;
immr->im_ioport.iop_pcdat &= ~PC_ENET_LBK; /* Disable Loopback */
#endif /* PC_ENET_LBK */
/* Configure port C pins to enable CLSN and RENA.
*/
immr->im_ioport.iop_pcpar &= ~(PC_ENET_CLSN | PC_ENET_RENA);
immr->im_ioport.iop_pcdir &= ~(PC_ENET_CLSN | PC_ENET_RENA);
immr->im_ioport.iop_pcso |= (PC_ENET_CLSN | PC_ENET_RENA);
/* Configure port A for TCLK and RCLK.
*/
immr->im_ioport.iop_papar |= (PA_ENET_TCLK | PA_ENET_RCLK);
immr->im_ioport.iop_padir &= ~(PA_ENET_TCLK | PA_ENET_RCLK);
/*
* Configure Serial Interface clock routing -- see section 16.7.5.3
* First, clear all SCC bits to zero, then set the ones we want.
*/
immr->im_cpm.cp_sicr &= ~SICR_ENET_MASK;
immr->im_cpm.cp_sicr |= SICR_ENET_CLKRT;
#else
/*
* SCC2 receive clock is BRG2
* SCC2 transmit clock is BRG3
*/
immr->im_cpm.cp_brgc2 = 0x0001000C;
immr->im_cpm.cp_brgc3 = 0x0001000C;
immr->im_cpm.cp_sicr &= ~0x00003F00;
immr->im_cpm.cp_sicr |= 0x00000a00;
#endif /* 0 */
/*
* Initialize SDCR -- see section 16.9.23.7
* SDMA configuration register
*/
immr->im_siu_conf.sc_sdcr = 0x01;
/*
* Setup SCC Ethernet Parameter RAM
*/
pram_ptr->sen_genscc.scc_rfcr = 0x18; /* Normal Operation and Mot byte ordering */
pram_ptr->sen_genscc.scc_tfcr = 0x18; /* Mot byte ordering, Normal access */
pram_ptr->sen_genscc.scc_mrblr = DBUF_LENGTH; /* max. ET package len 1520 */
pram_ptr->sen_genscc.scc_rbase = (unsigned int) (&rtx->rxbd[0]); /* Set RXBD tbl start at Dual Port */
pram_ptr->sen_genscc.scc_tbase = (unsigned int) (&rtx->txbd[0]); /* Set TXBD tbl start at Dual Port */
/*
* Setup Receiver Buffer Descriptors (13.14.24.18)
* Settings:
* Empty, Wrap
*/
for (i = 0; i < PKTBUFSRX; i++) {
rtx->rxbd[i].cbd_sc = BD_ENET_RX_EMPTY;
rtx->rxbd[i].cbd_datlen = 0; /* Reset */
rtx->rxbd[i].cbd_bufaddr = (uint) NetRxPackets[i];
}
rtx->rxbd[PKTBUFSRX - 1].cbd_sc |= BD_ENET_RX_WRAP;
/*
* Setup Ethernet Transmitter Buffer Descriptors (13.14.24.19)
* Settings:
* Add PADs to Short FRAMES, Wrap, Last, Tx CRC
*/
for (i = 0; i < TX_BUF_CNT; i++) {
rtx->txbd[i].cbd_sc =
(BD_ENET_TX_PAD | BD_ENET_TX_LAST | BD_ENET_TX_TC);
rtx->txbd[i].cbd_datlen = 0; /* Reset */
rtx->txbd[i].cbd_bufaddr = (uint) (&txbuf[0]);
}
rtx->txbd[TX_BUF_CNT - 1].cbd_sc |= BD_ENET_TX_WRAP;
/*
* Enter Command: Initialize Rx Params for SCC
*/
do { /* Spin until ready to issue command */
__asm__ ("eieio");
} while (immr->im_cpm.cp_cpcr & CPM_CR_FLG);
/* Issue command */
immr->im_cpm.cp_cpcr =
((CPM_CR_INIT_RX << 8) | (cpm_cr[scc_index] << 4) |
CPM_CR_FLG);
do { /* Spin until command processed */
__asm__ ("eieio");
} while (immr->im_cpm.cp_cpcr & CPM_CR_FLG);
/*
* Ethernet Specific Parameter RAM
* see table 13-16, pg. 660,
* pg. 681 (example with suggested settings)
*/
pram_ptr->sen_cpres = ~(0x0); /* Preset CRC */
pram_ptr->sen_cmask = 0xdebb20e3; /* Constant Mask for CRC */
pram_ptr->sen_crcec = 0x0; /* Error Counter CRC (unused) */
pram_ptr->sen_alec = 0x0; /* Alignment Error Counter (unused) */
pram_ptr->sen_disfc = 0x0; /* Discard Frame Counter (unused) */
pram_ptr->sen_pads = 0x8888; /* Short Frame PAD Characters */
pram_ptr->sen_retlim = 15; /* Retry Limit Threshold */
pram_ptr->sen_maxflr = 1518; /* MAX Frame Length Register */
pram_ptr->sen_minflr = 64; /* MIN Frame Length Register */
pram_ptr->sen_maxd1 = DBUF_LENGTH; /* MAX DMA1 Length Register */
pram_ptr->sen_maxd2 = DBUF_LENGTH; /* MAX DMA2 Length Register */
pram_ptr->sen_gaddr1 = 0x0; /* Group Address Filter 1 (unused) */
pram_ptr->sen_gaddr2 = 0x0; /* Group Address Filter 2 (unused) */
pram_ptr->sen_gaddr3 = 0x0; /* Group Address Filter 3 (unused) */
pram_ptr->sen_gaddr4 = 0x0; /* Group Address Filter 4 (unused) */
eth_getenv_enetaddr("ethaddr", ea);
pram_ptr->sen_paddrh = (ea[5] << 8) + ea[4];
pram_ptr->sen_paddrm = (ea[3] << 8) + ea[2];
pram_ptr->sen_paddrl = (ea[1] << 8) + ea[0];
pram_ptr->sen_pper = 0x0; /* Persistence (unused) */
pram_ptr->sen_iaddr1 = 0x0; /* Individual Address Filter 1 (unused) */
pram_ptr->sen_iaddr2 = 0x0; /* Individual Address Filter 2 (unused) */
pram_ptr->sen_iaddr3 = 0x0; /* Individual Address Filter 3 (unused) */
pram_ptr->sen_iaddr4 = 0x0; /* Individual Address Filter 4 (unused) */
pram_ptr->sen_taddrh = 0x0; /* Tmp Address (MSB) (unused) */
pram_ptr->sen_taddrm = 0x0; /* Tmp Address (unused) */
pram_ptr->sen_taddrl = 0x0; /* Tmp Address (LSB) (unused) */
/*
* Enter Command: Initialize Tx Params for SCC
*/
do { /* Spin until ready to issue command */
__asm__ ("eieio");
} while (immr->im_cpm.cp_cpcr & CPM_CR_FLG);
/* Issue command */
immr->im_cpm.cp_cpcr =
((CPM_CR_INIT_TX << 8) | (cpm_cr[scc_index] << 4) |
CPM_CR_FLG);
do { /* Spin until command processed */
__asm__ ("eieio");
} while (immr->im_cpm.cp_cpcr & CPM_CR_FLG);
/*
* Mask all Events in SCCM - we use polling mode
*/
immr->im_cpm.cp_scc[scc_index].scc_sccm = 0;
/*
* Clear Events in SCCE -- Clear bits by writing 1's
*/
immr->im_cpm.cp_scc[scc_index].scc_scce = ~(0x0);
/*
* Initialize GSMR High 32-Bits
* Settings: Normal Mode
*/
immr->im_cpm.cp_scc[scc_index].scc_gsmrh = 0;
/*
* Initialize GSMR Low 32-Bits, but do not Enable Transmit/Receive
* Settings:
* TCI = Invert
* TPL = 48 bits
* TPP = Repeating 10's
* LOOP = Loopback
* MODE = Ethernet
*/
immr->im_cpm.cp_scc[scc_index].scc_gsmrl = (SCC_GSMRL_TCI |
SCC_GSMRL_TPL_48 |
SCC_GSMRL_TPP_10 |
SCC_GSMRL_DIAG_LOOP |
SCC_GSMRL_MODE_ENET);
/*
* Initialize the DSR -- see section 13.14.4 (pg. 513) v0.4
*/
immr->im_cpm.cp_scc[scc_index].scc_dsr = 0xd555;
/*
* Initialize the PSMR
* Settings:
* CRC = 32-Bit CCITT
* NIB = Begin searching for SFD 22 bits after RENA
* LPB = Loopback Enable (Needed when FDE is set)
*/
immr->im_cpm.cp_scc[scc_index].scc_psmr = SCC_PSMR_ENCRC |
SCC_PSMR_NIB22 | SCC_PSMR_LPB;
#if 0
/*
* Configure Ethernet TENA Signal
*/
#if (defined(PC_ENET_TENA) && !defined(PB_ENET_TENA))
immr->im_ioport.iop_pcpar |= PC_ENET_TENA;
immr->im_ioport.iop_pcdir &= ~PC_ENET_TENA;
#elif (defined(PB_ENET_TENA) && !defined(PC_ENET_TENA))
immr->im_cpm.cp_pbpar |= PB_ENET_TENA;
immr->im_cpm.cp_pbdir |= PB_ENET_TENA;
#else
#error Configuration Error: exactly ONE of PB_ENET_TENA, PC_ENET_TENA must be defined
#endif
#if defined(CONFIG_ADS) && defined(CONFIG_MPC860)
/*
* Port C is used to control the PHY,MC68160.
*/
immr->im_ioport.iop_pcdir |=
(PC_ENET_ETHLOOP | PC_ENET_TPFLDL | PC_ENET_TPSQEL);
immr->im_ioport.iop_pcdat |= PC_ENET_TPFLDL;
immr->im_ioport.iop_pcdat &= ~(PC_ENET_ETHLOOP | PC_ENET_TPSQEL);
*((uint *) BCSR1) &= ~BCSR1_ETHEN;
#endif /* MPC860ADS */
#if defined(CONFIG_AMX860)
/*
* Port B is used to control the PHY,MC68160.
*/
immr->im_cpm.cp_pbdir |=
(PB_ENET_ETHLOOP | PB_ENET_TPFLDL | PB_ENET_TPSQEL);
immr->im_cpm.cp_pbdat |= PB_ENET_TPFLDL;
immr->im_cpm.cp_pbdat &= ~(PB_ENET_ETHLOOP | PB_ENET_TPSQEL);
immr->im_ioport.iop_pddir |= PD_ENET_ETH_EN;
immr->im_ioport.iop_pddat &= ~PD_ENET_ETH_EN;
#endif /* AMX860 */
#endif /* 0 */
#ifdef CONFIG_RPXCLASSIC
*((uchar *) BCSR0) &= ~BCSR0_ETHLPBK;
*((uchar *) BCSR0) |= (BCSR0_ETHEN | BCSR0_COLTEST | BCSR0_FULLDPLX);
#endif
#ifdef CONFIG_RPXLITE
*((uchar *) BCSR0) |= BCSR0_ETHEN;
#endif
#ifdef CONFIG_MBX
board_ether_init ();
#endif
/*
* Set the ENT/ENR bits in the GSMR Low -- Enable Transmit/Receive
*/
immr->im_cpm.cp_scc[scc_index].scc_gsmrl |=
(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
/*
* Work around transmit problem with first eth packet
*/
#if defined (CONFIG_FADS)
udelay (10000); /* wait 10 ms */
#elif defined (CONFIG_AMX860) || defined(CONFIG_RPXCLASSIC)
udelay (100000); /* wait 100 ms */
#endif
}
static void scc_halt (int scc_index)
{
volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
immr->im_cpm.cp_scc[scc_index].scc_gsmrl &=
~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
immr->im_ioport.iop_pcso &= ~(PC_ENET_CLSN | PC_ENET_RENA);
}
static int scc_send (int index, volatile void *packet, int length)
{
int i, j = 0;
while ((rtx->txbd[txIdx].cbd_sc & BD_ENET_TX_READY) && (j < TOUT_LOOP)) {
udelay (1); /* will also trigger Wd if needed */
j++;
}
if (j >= TOUT_LOOP)
printf ("TX not ready\n");
rtx->txbd[txIdx].cbd_bufaddr = (uint) packet;
rtx->txbd[txIdx].cbd_datlen = length;
rtx->txbd[txIdx].cbd_sc |=
(BD_ENET_TX_READY | BD_ENET_TX_LAST | BD_ENET_TX_WRAP);
while ((rtx->txbd[txIdx].cbd_sc & BD_ENET_TX_READY) && (j < TOUT_LOOP)) {
udelay (1); /* will also trigger Wd if needed */
j++;
}
if (j >= TOUT_LOOP)
printf ("TX timeout\n");
i = (rtx->txbd[txIdx].
cbd_sc & BD_ENET_TX_STATS) /* return only status bits */ ;
return i;
}
static int scc_recv (int index, void *packet, int max_length)
{
int length = -1;
if (rtx->rxbd[rxIdx].cbd_sc & BD_ENET_RX_EMPTY) {
goto Done; /* nothing received */
}
if (!(rtx->rxbd[rxIdx].cbd_sc & 0x003f)) {
length = rtx->rxbd[rxIdx].cbd_datlen - 4;
memcpy (packet,
(void *) (NetRxPackets[rxIdx]),
length < max_length ? length : max_length);
}
/* Give the buffer back to the SCC. */
rtx->rxbd[rxIdx].cbd_datlen = 0;
/* wrap around buffer index when necessary */
if ((rxIdx + 1) >= PKTBUFSRX) {
rtx->rxbd[PKTBUFSRX - 1].cbd_sc =
(BD_ENET_RX_WRAP | BD_ENET_RX_EMPTY);
rxIdx = 0;
} else {
rtx->rxbd[rxIdx].cbd_sc = BD_ENET_RX_EMPTY;
rxIdx++;
}
Done:
return length;
}
/*
* Test routines
*/
static void packet_fill (char *packet, int length)
{
char c = (char) length;
int i;
packet[0] = 0xFF;
packet[1] = 0xFF;
packet[2] = 0xFF;
packet[3] = 0xFF;
packet[4] = 0xFF;
packet[5] = 0xFF;
for (i = 6; i < length; i++) {
packet[i] = c++;
}
}
static int packet_check (char *packet, int length)
{
char c = (char) length;
int i;
for (i = 6; i < length; i++) {
if (packet[i] != c++)
return -1;
}
return 0;
}
static int test_ctlr (int ctlr, int index)
{
int res = -1;
char packet_send[MAX_PACKET_LENGTH];
char packet_recv[MAX_PACKET_LENGTH];
int length;
int i;
int l;
ctlr_proc[ctlr].init (index);
for (i = 0; i < TEST_NUM; i++) {
for (l = MIN_PACKET_LENGTH; l <= MAX_PACKET_LENGTH; l++) {
packet_fill (packet_send, l);
ctlr_proc[ctlr].send (index, packet_send, l);
length = ctlr_proc[ctlr].recv (index, packet_recv,
MAX_PACKET_LENGTH);
if (length != l || packet_check (packet_recv, length) < 0) {
goto Done;
}
}
}
res = 0;
Done:
ctlr_proc[ctlr].halt (index);
/*
* SCC2 Ethernet parameter RAM space overlaps
* the SPI parameter RAM space. So we need to restore
* the SPI configuration after SCC2 ethernet test.
*/
#if defined(CONFIG_SPI)
if (ctlr == CTLR_SCC && index == 1) {
spi_init_f ();
spi_init_r ();
}
#endif
if (res != 0) {
post_log ("ethernet %s%d test failed\n", ctlr_name[ctlr],
index + 1);
}
return res;
}
int ether_post_test (int flags)
{
int res = 0;
int i;
ctlr_proc[CTLR_SCC].init = scc_init;
ctlr_proc[CTLR_SCC].halt = scc_halt;
ctlr_proc[CTLR_SCC].send = scc_send;
ctlr_proc[CTLR_SCC].recv = scc_recv;
for (i = 0; i < ARRAY_SIZE(ctlr_list); i++) {
if (test_ctlr (ctlr_list[i][0], ctlr_list[i][1]) != 0) {
res = -1;
}
}
#if !defined(CONFIG_8xx_CONS_NONE)
serial_reinit_all ();
#endif
return res;
}
#endif /* CONFIG_POST & CONFIG_SYS_POST_ETHER */
|
1001-study-uboot
|
post/cpu/mpc8xx/ether.c
|
C
|
gpl3
| 16,357
|
#
# (C) Copyright 2002-2007
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(OBJTREE)/include/autoconf.mk
LIB = libpostmpc8xx.o
AOBJS-$(CONFIG_HAS_POST) += cache_8xx.o
COBJS-$(CONFIG_HAS_POST) += cache.o ether.o spr.o uart.o usb.o watchdog.o
include $(TOPDIR)/post/rules.mk
|
1001-study-uboot
|
post/cpu/mpc8xx/Makefile
|
Makefile
|
gpl3
| 1,073
|
/*
* (C) Copyright 2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
/*
* UART test
*
* The Serial Management Controllers (SMC) and the Serial Communication
* Controllers (SCC) listed in ctlr_list array below are tested in
* the loopback UART mode.
* The controllers are configured accordingly and several characters
* are transmitted. The configurable test parameters are:
* MIN_PACKET_LENGTH - minimum size of packet to transmit
* MAX_PACKET_LENGTH - maximum size of packet to transmit
* TEST_NUM - number of tests
*/
#include <post.h>
#if CONFIG_POST & CONFIG_SYS_POST_UART
#if defined(CONFIG_8xx)
#include <commproc.h>
#elif defined(CONFIG_MPC8260)
#include <asm/cpm_8260.h>
#else
#error "Apparently a bad configuration, please fix."
#endif
#include <command.h>
#include <serial.h>
DECLARE_GLOBAL_DATA_PTR;
#define CTLR_SMC 0
#define CTLR_SCC 1
/* The list of controllers to test */
#if defined(CONFIG_MPC823)
static int ctlr_list[][2] =
{ {CTLR_SMC, 0}, {CTLR_SMC, 1}, {CTLR_SCC, 1} };
#else
static int ctlr_list[][2] = { };
#endif
static struct {
void (*init) (int index);
void (*halt) (int index);
void (*putc) (int index, const char c);
int (*getc) (int index);
} ctlr_proc[2];
static char *ctlr_name[2] = { "SMC", "SCC" };
static int proff_smc[] = { PROFF_SMC1, PROFF_SMC2 };
static int proff_scc[] =
{ PROFF_SCC1, PROFF_SCC2, PROFF_SCC3, PROFF_SCC4 };
/*
* SMC callbacks
*/
static void smc_init (int smc_index)
{
static int cpm_cr_ch[] = { CPM_CR_CH_SMC1, CPM_CR_CH_SMC2 };
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
volatile smc_t *sp;
volatile smc_uart_t *up;
volatile cbd_t *tbdf, *rbdf;
volatile cpm8xx_t *cp = &(im->im_cpm);
uint dpaddr;
/* initialize pointers to SMC */
sp = (smc_t *) & (cp->cp_smc[smc_index]);
up = (smc_uart_t *) & cp->cp_dparam[proff_smc[smc_index]];
/* Disable transmitter/receiver.
*/
sp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
/* Enable SDMA.
*/
im->im_siu_conf.sc_sdcr = 1;
/* clear error conditions */
#ifdef CONFIG_SYS_SDSR
im->im_sdma.sdma_sdsr = CONFIG_SYS_SDSR;
#else
im->im_sdma.sdma_sdsr = 0x83;
#endif
/* clear SDMA interrupt mask */
#ifdef CONFIG_SYS_SDMR
im->im_sdma.sdma_sdmr = CONFIG_SYS_SDMR;
#else
im->im_sdma.sdma_sdmr = 0x00;
#endif
#if defined(CONFIG_FADS)
/* Enable RS232 */
*((uint *) BCSR1) &=
~(smc_index == 1 ? BCSR1_RS232EN_1 : BCSR1_RS232EN_2);
#endif
#if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC)
/* Enable Monitor Port Transceiver */
*((uchar *) BCSR0) |= BCSR0_ENMONXCVR;
#endif
/* Set the physical address of the host memory buffers in
* the buffer descriptors.
*/
#ifdef CONFIG_SYS_ALLOC_DPRAM
dpaddr = dpram_alloc_align (sizeof (cbd_t) * 2 + 2, 8);
#else
dpaddr = CPM_POST_BASE;
#endif
/* Allocate space for two buffer descriptors in the DP ram.
* For now, this address seems OK, but it may have to
* change with newer versions of the firmware.
* damm: allocating space after the two buffers for rx/tx data
*/
rbdf = (cbd_t *) & cp->cp_dpmem[dpaddr];
rbdf->cbd_bufaddr = (uint) (rbdf + 2);
rbdf->cbd_sc = 0;
tbdf = rbdf + 1;
tbdf->cbd_bufaddr = ((uint) (rbdf + 2)) + 1;
tbdf->cbd_sc = 0;
/* Set up the uart parameters in the parameter ram.
*/
up->smc_rbase = dpaddr;
up->smc_tbase = dpaddr + sizeof (cbd_t);
up->smc_rfcr = SMC_EB;
up->smc_tfcr = SMC_EB;
#if defined(CONFIG_MBX)
board_serial_init ();
#endif
/* Set UART mode, 8 bit, no parity, one stop.
* Enable receive and transmit.
* Set local loopback mode.
*/
sp->smc_smcmr = smcr_mk_clen (9) | SMCMR_SM_UART | (ushort) 0x0004;
/* Mask all interrupts and remove anything pending.
*/
sp->smc_smcm = 0;
sp->smc_smce = 0xff;
/* Set up the baud rate generator.
*/
cp->cp_simode = 0x00000000;
cp->cp_brgc1 =
(((gd->cpu_clk / 16 / gd->baudrate) -
1) << 1) | CPM_BRG_EN;
/* Make the first buffer the only buffer.
*/
tbdf->cbd_sc |= BD_SC_WRAP;
rbdf->cbd_sc |= BD_SC_EMPTY | BD_SC_WRAP;
/* Single character receive.
*/
up->smc_mrblr = 1;
up->smc_maxidl = 0;
/* Initialize Tx/Rx parameters.
*/
while (cp->cp_cpcr & CPM_CR_FLG) /* wait if cp is busy */
;
cp->cp_cpcr =
mk_cr_cmd (cpm_cr_ch[smc_index], CPM_CR_INIT_TRX) | CPM_CR_FLG;
while (cp->cp_cpcr & CPM_CR_FLG) /* wait if cp is busy */
;
/* Enable transmitter/receiver.
*/
sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
}
static void smc_halt(int smc_index)
{
}
static void smc_putc (int smc_index, const char c)
{
volatile cbd_t *tbdf;
volatile char *buf;
volatile smc_uart_t *up;
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
volatile cpm8xx_t *cpmp = &(im->im_cpm);
up = (smc_uart_t *) & cpmp->cp_dparam[proff_smc[smc_index]];
tbdf = (cbd_t *) & cpmp->cp_dpmem[up->smc_tbase];
/* Wait for last character to go.
*/
buf = (char *) tbdf->cbd_bufaddr;
#if 0
__asm__ ("eieio");
while (tbdf->cbd_sc & BD_SC_READY)
__asm__ ("eieio");
#endif
*buf = c;
tbdf->cbd_datlen = 1;
tbdf->cbd_sc |= BD_SC_READY;
__asm__ ("eieio");
#if 1
while (tbdf->cbd_sc & BD_SC_READY)
__asm__ ("eieio");
#endif
}
static int smc_getc (int smc_index)
{
volatile cbd_t *rbdf;
volatile unsigned char *buf;
volatile smc_uart_t *up;
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
volatile cpm8xx_t *cpmp = &(im->im_cpm);
unsigned char c;
int i;
up = (smc_uart_t *) & cpmp->cp_dparam[proff_smc[smc_index]];
rbdf = (cbd_t *) & cpmp->cp_dpmem[up->smc_rbase];
/* Wait for character to show up.
*/
buf = (unsigned char *) rbdf->cbd_bufaddr;
#if 0
while (rbdf->cbd_sc & BD_SC_EMPTY);
#else
for (i = 100; i > 0; i--) {
if (!(rbdf->cbd_sc & BD_SC_EMPTY))
break;
udelay (1000);
}
if (i == 0)
return -1;
#endif
c = *buf;
rbdf->cbd_sc |= BD_SC_EMPTY;
return (c);
}
/*
* SCC callbacks
*/
static void scc_init (int scc_index)
{
static int cpm_cr_ch[] = {
CPM_CR_CH_SCC1,
CPM_CR_CH_SCC2,
CPM_CR_CH_SCC3,
CPM_CR_CH_SCC4,
};
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
volatile scc_t *sp;
volatile scc_uart_t *up;
volatile cbd_t *tbdf, *rbdf;
volatile cpm8xx_t *cp = &(im->im_cpm);
uint dpaddr;
/* initialize pointers to SCC */
sp = (scc_t *) & (cp->cp_scc[scc_index]);
up = (scc_uart_t *) & cp->cp_dparam[proff_scc[scc_index]];
/* Disable transmitter/receiver.
*/
sp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
/* Allocate space for two buffer descriptors in the DP ram.
*/
#ifdef CONFIG_SYS_ALLOC_DPRAM
dpaddr = dpram_alloc_align (sizeof (cbd_t) * 2 + 2, 8);
#else
dpaddr = CPM_POST_BASE;
#endif
/* Enable SDMA.
*/
im->im_siu_conf.sc_sdcr = 0x0001;
/* Set the physical address of the host memory buffers in
* the buffer descriptors.
*/
rbdf = (cbd_t *) & cp->cp_dpmem[dpaddr];
rbdf->cbd_bufaddr = (uint) (rbdf + 2);
rbdf->cbd_sc = 0;
tbdf = rbdf + 1;
tbdf->cbd_bufaddr = ((uint) (rbdf + 2)) + 1;
tbdf->cbd_sc = 0;
/* Set up the baud rate generator.
*/
cp->cp_sicr &= ~(0x000000FF << (8 * scc_index));
/* no |= needed, since BRG1 is 000 */
cp->cp_brgc1 =
(((gd->cpu_clk / 16 / gd->baudrate) -
1) << 1) | CPM_BRG_EN;
/* Set up the uart parameters in the parameter ram.
*/
up->scc_genscc.scc_rbase = dpaddr;
up->scc_genscc.scc_tbase = dpaddr + sizeof (cbd_t);
/* Initialize Tx/Rx parameters.
*/
while (cp->cp_cpcr & CPM_CR_FLG) /* wait if cp is busy */
;
cp->cp_cpcr =
mk_cr_cmd (cpm_cr_ch[scc_index], CPM_CR_INIT_TRX) | CPM_CR_FLG;
while (cp->cp_cpcr & CPM_CR_FLG) /* wait if cp is busy */
;
up->scc_genscc.scc_rfcr = SCC_EB | 0x05;
up->scc_genscc.scc_tfcr = SCC_EB | 0x05;
up->scc_genscc.scc_mrblr = 1; /* Single character receive */
up->scc_maxidl = 0; /* disable max idle */
up->scc_brkcr = 1; /* send one break character on stop TX */
up->scc_parec = 0;
up->scc_frmec = 0;
up->scc_nosec = 0;
up->scc_brkec = 0;
up->scc_uaddr1 = 0;
up->scc_uaddr2 = 0;
up->scc_toseq = 0;
up->scc_char1 = 0x8000;
up->scc_char2 = 0x8000;
up->scc_char3 = 0x8000;
up->scc_char4 = 0x8000;
up->scc_char5 = 0x8000;
up->scc_char6 = 0x8000;
up->scc_char7 = 0x8000;
up->scc_char8 = 0x8000;
up->scc_rccm = 0xc0ff;
/* Set low latency / small fifo.
*/
sp->scc_gsmrh = SCC_GSMRH_RFW;
/* Set UART mode
*/
sp->scc_gsmrl &= ~0xF;
sp->scc_gsmrl |= SCC_GSMRL_MODE_UART;
/* Set local loopback mode.
*/
sp->scc_gsmrl &= ~SCC_GSMRL_DIAG_LE;
sp->scc_gsmrl |= SCC_GSMRL_DIAG_LOOP;
/* Set clock divider 16 on Tx and Rx
*/
sp->scc_gsmrl |= (SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
sp->scc_psmr |= SCU_PSMR_CL;
/* Mask all interrupts and remove anything pending.
*/
sp->scc_sccm = 0;
sp->scc_scce = 0xffff;
sp->scc_dsr = 0x7e7e;
sp->scc_psmr = 0x3000;
/* Make the first buffer the only buffer.
*/
tbdf->cbd_sc |= BD_SC_WRAP;
rbdf->cbd_sc |= BD_SC_EMPTY | BD_SC_WRAP;
/* Enable transmitter/receiver.
*/
sp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
}
static void scc_halt(int scc_index)
{
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
volatile cpm8xx_t *cp = &(im->im_cpm);
volatile scc_t *sp = (scc_t *) & (cp->cp_scc[scc_index]);
sp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT | SCC_GSMRL_DIAG_LE);
}
static void scc_putc (int scc_index, const char c)
{
volatile cbd_t *tbdf;
volatile char *buf;
volatile scc_uart_t *up;
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
volatile cpm8xx_t *cpmp = &(im->im_cpm);
up = (scc_uart_t *) & cpmp->cp_dparam[proff_scc[scc_index]];
tbdf = (cbd_t *) & cpmp->cp_dpmem[up->scc_genscc.scc_tbase];
/* Wait for last character to go.
*/
buf = (char *) tbdf->cbd_bufaddr;
#if 0
__asm__ ("eieio");
while (tbdf->cbd_sc & BD_SC_READY)
__asm__ ("eieio");
#endif
*buf = c;
tbdf->cbd_datlen = 1;
tbdf->cbd_sc |= BD_SC_READY;
__asm__ ("eieio");
#if 1
while (tbdf->cbd_sc & BD_SC_READY)
__asm__ ("eieio");
#endif
}
static int scc_getc (int scc_index)
{
volatile cbd_t *rbdf;
volatile unsigned char *buf;
volatile scc_uart_t *up;
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
volatile cpm8xx_t *cpmp = &(im->im_cpm);
unsigned char c;
int i;
up = (scc_uart_t *) & cpmp->cp_dparam[proff_scc[scc_index]];
rbdf = (cbd_t *) & cpmp->cp_dpmem[up->scc_genscc.scc_rbase];
/* Wait for character to show up.
*/
buf = (unsigned char *) rbdf->cbd_bufaddr;
#if 0
while (rbdf->cbd_sc & BD_SC_EMPTY);
#else
for (i = 100; i > 0; i--) {
if (!(rbdf->cbd_sc & BD_SC_EMPTY))
break;
udelay (1000);
}
if (i == 0)
return -1;
#endif
c = *buf;
rbdf->cbd_sc |= BD_SC_EMPTY;
return (c);
}
/*
* Test routines
*/
static int test_ctlr (int ctlr, int index)
{
int res = -1;
char test_str[] = "*** UART Test String ***\r\n";
int i;
ctlr_proc[ctlr].init (index);
for (i = 0; i < sizeof (test_str) - 1; i++) {
ctlr_proc[ctlr].putc (index, test_str[i]);
if (ctlr_proc[ctlr].getc (index) != test_str[i])
goto Done;
}
res = 0;
Done:
ctlr_proc[ctlr].halt (index);
if (res != 0) {
post_log ("uart %s%d test failed\n",
ctlr_name[ctlr], index + 1);
}
return res;
}
int uart_post_test (int flags)
{
int res = 0;
int i;
ctlr_proc[CTLR_SMC].init = smc_init;
ctlr_proc[CTLR_SMC].halt = smc_halt;
ctlr_proc[CTLR_SMC].putc = smc_putc;
ctlr_proc[CTLR_SMC].getc = smc_getc;
ctlr_proc[CTLR_SCC].init = scc_init;
ctlr_proc[CTLR_SCC].halt = scc_halt;
ctlr_proc[CTLR_SCC].putc = scc_putc;
ctlr_proc[CTLR_SCC].getc = scc_getc;
for (i = 0; i < ARRAY_SIZE(ctlr_list); i++) {
if (test_ctlr (ctlr_list[i][0], ctlr_list[i][1]) != 0) {
res = -1;
}
}
#if !defined(CONFIG_8xx_CONS_NONE)
serial_reinit_all ();
#endif
return res;
}
#endif /* CONFIG_POST & CONFIG_SYS_POST_UART */
|
1001-study-uboot
|
post/cpu/mpc8xx/uart.c
|
C
|
gpl3
| 12,455
|
/*
* (C) Copyright 2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
/* Cache test
*
* This test verifies the CPU data and instruction cache using
* several test scenarios.
*/
#include <post.h>
#include <watchdog.h>
#if CONFIG_POST & CONFIG_SYS_POST_CACHE
#define CACHE_POST_SIZE 1024
extern int cache_post_test1 (char *, unsigned int);
extern int cache_post_test2 (char *, unsigned int);
extern int cache_post_test3 (char *, unsigned int);
extern int cache_post_test4 (char *, unsigned int);
extern int cache_post_test5 (void);
extern int cache_post_test6 (void);
int cache_post_test (int flags)
{
int ints = disable_interrupts ();
int res = 0;
static char ta[CACHE_POST_SIZE + 0xf];
char *testarea = (char *) (((unsigned long) ta + 0xf) & ~0xf);
WATCHDOG_RESET ();
if (res == 0)
res = cache_post_test1 (testarea, CACHE_POST_SIZE);
WATCHDOG_RESET ();
if (res == 0)
res = cache_post_test2 (testarea, CACHE_POST_SIZE);
WATCHDOG_RESET ();
if (res == 0)
res = cache_post_test3 (testarea, CACHE_POST_SIZE);
WATCHDOG_RESET ();
if (res == 0)
res = cache_post_test4 (testarea, CACHE_POST_SIZE);
WATCHDOG_RESET ();
if (res == 0)
res = cache_post_test5 ();
WATCHDOG_RESET ();
if (res == 0)
res = cache_post_test6 ();
WATCHDOG_RESET ();
if (ints)
enable_interrupts ();
return res;
}
#endif /* CONFIG_POST & CONFIG_SYS_POST_CACHE */
|
1001-study-uboot
|
post/cpu/mpc8xx/cache.c
|
C
|
gpl3
| 2,201
|
/*
* (C) Copyright 2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
/*
* USB test
*
* The USB controller is tested in the local loopback mode.
* It is configured so that endpoint 0 operates as host and endpoint 1
* operates as function endpoint. After that an IN token transaction
* is performed.
* Refer to MPC850 User Manual, Section 32.11.1 USB Host Controller
* Initialization Example.
*/
#include <post.h>
#if CONFIG_POST & CONFIG_SYS_POST_USB
#include <commproc.h>
#include <command.h>
#define TOUT_LOOP 100
#define PROFF_USB ((uint)0x0000)
#define CPM_USB_EP0_BASE 0x0a00
#define CPM_USB_EP1_BASE 0x0a20
#define CPM_USB_DT0_BASE 0x0a80
#define CPM_USB_DT1_BASE 0x0a90
#define CPM_USB_DR0_BASE 0x0aa0
#define CPM_USB_DR1_BASE 0x0ab0
#define CPM_USB_RX0_BASE 0x0b00
#define CPM_USB_RX1_BASE 0x0b08
#define CPM_USB_TX0_BASE 0x0b20
#define CPM_USB_TX1_BASE 0x0b28
#define USB_EXPECT(x) if (!(x)) goto Done;
typedef struct usb_param {
ushort ep0ptr;
ushort ep1ptr;
ushort ep2ptr;
ushort ep3ptr;
uint rstate;
uint rptr;
ushort frame_n;
ushort rbcnt;
ushort rtemp;
} usb_param_t;
typedef struct usb_param_block {
ushort rbase;
ushort tbase;
uchar rfcr;
uchar tfcr;
ushort mrblr;
ushort rbptr;
ushort tbptr;
uint tstate;
uint tptr;
ushort tcrc;
ushort tbcnt;
uint res[2];
} usb_param_block_t;
typedef struct usb {
uchar usmod;
uchar usadr;
uchar uscom;
uchar res1;
ushort usep[4];
uchar res2[4];
ushort usber;
uchar res3[2];
ushort usbmr;
uchar res4;
uchar usbs;
uchar res5[8];
} usb_t;
int usb_post_test (int flags)
{
int res = -1;
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
volatile cpm8xx_t *cp = &(im->im_cpm);
volatile usb_param_t *pram_ptr;
uint dpram;
ushort DPRAM;
volatile cbd_t *tx;
volatile cbd_t *rx;
volatile usb_t *usbr;
volatile usb_param_block_t *ep0;
volatile usb_param_block_t *ep1;
int j;
pram_ptr = (usb_param_t *) & (im->im_cpm.cp_dparam[PROFF_USB]);
dpram = (uint) im->im_cpm.cp_dpmem;
DPRAM = dpram;
tx = (cbd_t *) (dpram + CPM_USB_TX0_BASE);
rx = (cbd_t *) (dpram + CPM_USB_RX0_BASE);
ep0 = (usb_param_block_t *) (dpram + CPM_USB_EP0_BASE);
ep1 = (usb_param_block_t *) (dpram + CPM_USB_EP1_BASE);
usbr = (usb_t *) & (im->im_cpm.cp_scc[0]);
/* 01 */
im->im_ioport.iop_padir &= ~(ushort) 0x0200;
im->im_ioport.iop_papar |= (ushort) 0x0200;
cp->cp_sicr &= ~0x000000FF;
cp->cp_sicr |= 0x00000018;
cp->cp_brgc4 = 0x00010001;
/* 02 */
im->im_ioport.iop_padir &= ~(ushort) 0x0002;
im->im_ioport.iop_padir &= ~(ushort) 0x0001;
im->im_ioport.iop_papar |= (ushort) 0x0002;
im->im_ioport.iop_papar |= (ushort) 0x0001;
/* 03 */
im->im_ioport.iop_pcdir &= ~(ushort) 0x0020;
im->im_ioport.iop_pcdir &= ~(ushort) 0x0010;
im->im_ioport.iop_pcpar &= ~(ushort) 0x0020;
im->im_ioport.iop_pcpar &= ~(ushort) 0x0010;
im->im_ioport.iop_pcso |= (ushort) 0x0020;
im->im_ioport.iop_pcso |= (ushort) 0x0010;
/* 04 */
im->im_ioport.iop_pcdir |= (ushort) 0x0200;
im->im_ioport.iop_pcdir |= (ushort) 0x0100;
im->im_ioport.iop_pcpar |= (ushort) 0x0200;
im->im_ioport.iop_pcpar |= (ushort) 0x0100;
/* 05 */
pram_ptr->frame_n = 0;
/* 06 */
pram_ptr->ep0ptr = DPRAM + CPM_USB_EP0_BASE;
pram_ptr->ep1ptr = DPRAM + CPM_USB_EP1_BASE;
/* 07-10 */
tx[0].cbd_sc = 0xB800;
tx[0].cbd_datlen = 3;
tx[0].cbd_bufaddr = dpram + CPM_USB_DT0_BASE;
tx[1].cbd_sc = 0xBC80;
tx[1].cbd_datlen = 3;
tx[1].cbd_bufaddr = dpram + CPM_USB_DT1_BASE;
rx[0].cbd_sc = 0xA000;
rx[0].cbd_datlen = 0;
rx[0].cbd_bufaddr = dpram + CPM_USB_DR0_BASE;
rx[1].cbd_sc = 0xA000;
rx[1].cbd_datlen = 0;
rx[1].cbd_bufaddr = dpram + CPM_USB_DR1_BASE;
/* 11-12 */
*(volatile int *) (dpram + CPM_USB_DT0_BASE) = 0x69856000;
*(volatile int *) (dpram + CPM_USB_DT1_BASE) = 0xABCD1234;
*(volatile int *) (dpram + CPM_USB_DR0_BASE) = 0;
*(volatile int *) (dpram + CPM_USB_DR1_BASE) = 0;
/* 13-16 */
ep0->rbase = DPRAM + CPM_USB_RX0_BASE;
ep0->tbase = DPRAM + CPM_USB_TX0_BASE;
ep0->rfcr = 0x18;
ep0->tfcr = 0x18;
ep0->mrblr = 0x100;
ep0->rbptr = DPRAM + CPM_USB_RX0_BASE;
ep0->tbptr = DPRAM + CPM_USB_TX0_BASE;
ep0->tstate = 0;
/* 17-20 */
ep1->rbase = DPRAM + CPM_USB_RX1_BASE;
ep1->tbase = DPRAM + CPM_USB_TX1_BASE;
ep1->rfcr = 0x18;
ep1->tfcr = 0x18;
ep1->mrblr = 0x100;
ep1->rbptr = DPRAM + CPM_USB_RX1_BASE;
ep1->tbptr = DPRAM + CPM_USB_TX1_BASE;
ep1->tstate = 0;
/* 21-24 */
usbr->usep[0] = 0x0000;
usbr->usep[1] = 0x1100;
usbr->usep[2] = 0x2200;
usbr->usep[3] = 0x3300;
/* 25 */
usbr->usmod = 0x06;
/* 26 */
usbr->usadr = 0x05;
/* 27 */
usbr->uscom = 0;
/* 28 */
usbr->usmod |= 0x01;
udelay (1);
/* 29-30 */
usbr->uscom = 0x80;
usbr->uscom = 0x81;
/* Wait for the data packet to be transmitted */
for (j = 0; j < TOUT_LOOP; j++) {
if (tx[1].cbd_sc & (ushort) 0x8000)
udelay (1);
else
break;
}
USB_EXPECT (j < TOUT_LOOP);
USB_EXPECT (tx[0].cbd_sc == 0x3800);
USB_EXPECT (tx[0].cbd_datlen == 3);
USB_EXPECT (tx[1].cbd_sc == 0x3C80);
USB_EXPECT (tx[1].cbd_datlen == 3);
USB_EXPECT (rx[0].cbd_sc == 0x2C00);
USB_EXPECT (rx[0].cbd_datlen == 5);
USB_EXPECT (*(volatile int *) (dpram + CPM_USB_DR0_BASE) ==
0xABCD122B);
USB_EXPECT (*(volatile char *) (dpram + CPM_USB_DR0_BASE + 4) == 0x42);
res = 0;
Done:
return res;
}
#endif /* CONFIG_POST & CONFIG_SYS_POST_USB */
|
1001-study-uboot
|
post/cpu/mpc8xx/usb.c
|
C
|
gpl3
| 6,176
|
/*
* (C) Copyright 2007
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* Author: Igor Lisitsin <igor@emcraft.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
/*
* SPR test
*
* The test checks the contents of Special Purpose Registers (SPR) listed
* in the spr_test_list array below.
* Each SPR value is read using mfspr instruction, some bits are masked
* according to the table and the resulting value is compared to the
* corresponding table value.
*/
#include <post.h>
#if CONFIG_POST & CONFIG_SYS_POST_SPR
#include <asm/processor.h>
#ifdef CONFIG_4xx_DCACHE
#include <asm/mmu.h>
DECLARE_GLOBAL_DATA_PTR;
#endif
static struct {
int number;
char * name;
unsigned long mask;
unsigned long value;
} spr_test_list [] = {
/* Standard Special-Purpose Registers */
{0x001, "XER", 0x00000000, 0x00000000},
{0x008, "LR", 0x00000000, 0x00000000},
{0x009, "CTR", 0x00000000, 0x00000000},
{0x016, "DEC", 0x00000000, 0x00000000},
{0x01a, "SRR0", 0x00000000, 0x00000000},
{0x01b, "SRR1", 0x00000000, 0x00000000},
{0x110, "SPRG0", 0x00000000, 0x00000000},
{0x111, "SPRG1", 0x00000000, 0x00000000},
{0x112, "SPRG2", 0x00000000, 0x00000000},
{0x113, "SPRG3", 0x00000000, 0x00000000},
{0x11f, "PVR", 0x00000000, 0x00000000},
/* Additional Special-Purpose Registers.
* The values must match the initialization
* values from arch/powerpc/cpu/ppc4xx/start.S
*/
{0x30, "PID", 0x00000000, 0x00000000},
{0x3a, "CSRR0", 0x00000000, 0x00000000},
{0x3b, "CSRR1", 0x00000000, 0x00000000},
{0x3d, "DEAR", 0x00000000, 0x00000000},
{0x3e, "ESR", 0x00000000, 0x00000000},
#ifdef CONFIG_440
{0x3f, "IVPR", 0xffff0000, 0x00000000},
#endif
{0x100, "USPRG0", 0x00000000, 0x00000000},
{0x104, "SPRG4", 0x00000000, 0x00000000},
{0x105, "SPRG5", 0x00000000, 0x00000000},
{0x106, "SPRG6", 0x00000000, 0x00000000},
{0x107, "SPRG7", 0x00000000, 0x00000000},
{0x10c, "TBL", 0x00000000, 0x00000000},
{0x10d, "TBU", 0x00000000, 0x00000000},
#ifdef CONFIG_440
{0x11e, "PIR", 0x0000000f, 0x00000000},
#endif
{0x130, "DBSR", 0x00000000, 0x00000000},
{0x134, "DBCR0", 0x00000000, 0x00000000},
{0x135, "DBCR1", 0x00000000, 0x00000000},
{0x136, "DBCR2", 0x00000000, 0x00000000},
{0x138, "IAC1", 0x00000000, 0x00000000},
{0x139, "IAC2", 0x00000000, 0x00000000},
{0x13a, "IAC3", 0x00000000, 0x00000000},
{0x13b, "IAC4", 0x00000000, 0x00000000},
{0x13c, "DAC1", 0x00000000, 0x00000000},
{0x13d, "DAC2", 0x00000000, 0x00000000},
{0x13e, "DVC1", 0x00000000, 0x00000000},
{0x13f, "DVC2", 0x00000000, 0x00000000},
{0x150, "TSR", 0x00000000, 0x00000000},
{0x154, "TCR", 0x00000000, 0x00000000},
#ifdef CONFIG_440
{0x190, "IVOR0", 0x0000fff0, 0x00000100},
{0x191, "IVOR1", 0x0000fff0, 0x00000200},
{0x192, "IVOR2", 0x0000fff0, 0x00000300},
{0x193, "IVOR3", 0x0000fff0, 0x00000400},
{0x194, "IVOR4", 0x0000fff0, 0x00000500},
{0x195, "IVOR5", 0x0000fff0, 0x00000600},
{0x196, "IVOR6", 0x0000fff0, 0x00000700},
{0x197, "IVOR7", 0x0000fff0, 0x00000800},
{0x198, "IVOR8", 0x0000fff0, 0x00000c00},
{0x199, "IVOR9", 0x00000000, 0x00000000},
{0x19a, "IVOR10", 0x0000fff0, 0x00000900},
{0x19b, "IVOR11", 0x00000000, 0x00000000},
{0x19c, "IVOR12", 0x00000000, 0x00000000},
{0x19d, "IVOR13", 0x0000fff0, 0x00001300},
{0x19e, "IVOR14", 0x0000fff0, 0x00001400},
{0x19f, "IVOR15", 0x0000fff0, 0x00002000},
#endif
{0x23a, "MCSRR0", 0x00000000, 0x00000000},
{0x23b, "MCSRR1", 0x00000000, 0x00000000},
{0x23c, "MCSR", 0x00000000, 0x00000000},
{0x370, "INV0", 0x00000000, 0x00000000},
{0x371, "INV1", 0x00000000, 0x00000000},
{0x372, "INV2", 0x00000000, 0x00000000},
{0x373, "INV3", 0x00000000, 0x00000000},
{0x374, "ITV0", 0x00000000, 0x00000000},
{0x375, "ITV1", 0x00000000, 0x00000000},
{0x376, "ITV2", 0x00000000, 0x00000000},
{0x377, "ITV3", 0x00000000, 0x00000000},
{0x378, "CCR1", 0x00000000, 0x00000000},
{0x390, "DNV0", 0x00000000, 0x00000000},
{0x391, "DNV1", 0x00000000, 0x00000000},
{0x392, "DNV2", 0x00000000, 0x00000000},
{0x393, "DNV3", 0x00000000, 0x00000000},
{0x394, "DTV0", 0x00000000, 0x00000000},
{0x395, "DTV1", 0x00000000, 0x00000000},
{0x396, "DTV2", 0x00000000, 0x00000000},
{0x397, "DTV3", 0x00000000, 0x00000000},
#ifdef CONFIG_440
{0x398, "DVLIM", 0x0fc1f83f, 0x0001f800},
{0x399, "IVLIM", 0x0fc1f83f, 0x0001f800},
#endif
{0x39b, "RSTCFG", 0x00000000, 0x00000000},
{0x39c, "DCDBTRL", 0x00000000, 0x00000000},
{0x39d, "DCDBTRH", 0x00000000, 0x00000000},
{0x39e, "ICDBTRL", 0x00000000, 0x00000000},
{0x39f, "ICDBTRH", 0x00000000, 0x00000000},
{0x3b2, "MMUCR", 0x00000000, 0x00000000},
{0x3b3, "CCR0", 0x00000000, 0x00000000},
{0x3d3, "ICDBDR", 0x00000000, 0x00000000},
{0x3f3, "DBDR", 0x00000000, 0x00000000},
};
static int spr_test_list_size = ARRAY_SIZE(spr_test_list);
int spr_post_test (int flags)
{
int ret = 0;
int i;
unsigned long code[] = {
0x7c6002a6, /* mfspr r3,SPR */
0x4e800020 /* blr */
};
unsigned long (*get_spr) (void) = (void *) code;
#ifdef CONFIG_4xx_DCACHE
/* disable cache */
change_tlb(gd->bd->bi_memstart, gd->bd->bi_memsize, TLB_WORD2_I_ENABLE);
#endif
for (i = 0; i < spr_test_list_size; i++) {
int num = spr_test_list[i].number;
/* mfspr r3,num */
code[0] = 0x7c6002a6 | ((num & 0x1F) << 16) | ((num & 0x3E0) << 6);
asm volatile ("isync");
if ((get_spr () & spr_test_list[i].mask) !=
(spr_test_list[i].value & spr_test_list[i].mask)) {
post_log ("The value of %s special register "
"is incorrect: 0x%08X\n",
spr_test_list[i].name, get_spr ());
ret = -1;
}
}
#ifdef CONFIG_4xx_DCACHE
/* enable cache */
change_tlb(gd->bd->bi_memstart, gd->bd->bi_memsize, 0);
#endif
return ret;
}
#endif /* CONFIG_POST & CONFIG_SYS_POST_SPR */
|
1001-study-uboot
|
post/cpu/ppc4xx/spr.c
|
C
|
gpl3
| 6,527
|
/*
* (C) Copyright 2007
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* Author: Sergei Poselenov <sposelenov@emcraft.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#if defined(CONFIG_440EP) || \
defined(CONFIG_440EPX)
#include <asm/processor.h>
#include <asm/ppc4xx.h>
int fpu_status(void)
{
if (mfspr(SPRN_CCR0) & CCR0_DAPUIB)
return 0; /* Disabled */
else
return 1; /* Enabled */
}
void fpu_disable(void)
{
mtspr(SPRN_CCR0, mfspr(SPRN_CCR0) | CCR0_DAPUIB);
mtmsr(mfmsr() & ~MSR_FP);
}
void fpu_enable(void)
{
mtspr(SPRN_CCR0, mfspr(SPRN_CCR0) & ~CCR0_DAPUIB);
mtmsr(mfmsr() | MSR_FP);
}
#endif
|
1001-study-uboot
|
post/cpu/ppc4xx/fpu.c
|
C
|
gpl3
| 1,413
|
/*
* (C) Copyright 2008 Ilya Yanok, EmCraft Systems, yanok@emcraft.com
*
* Developed for DENX Software Engineering GmbH
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
/*
* This test attempts to verify on-chip memory (OCM). Result is written
* to the scratch register and if test succeed it won't be run till next
* power on.
*/
#include <post.h>
#include <asm/io.h>
DECLARE_GLOBAL_DATA_PTR;
#define OCM_TEST_PATTERN1 0x55555555
#define OCM_TEST_PATTERN2 0xAAAAAAAA
#if CONFIG_POST & CONFIG_SYS_POST_OCM
static uint ocm_status_read(void)
{
return in_be32((void *)CONFIG_SYS_OCM_STATUS_ADDR) &
CONFIG_SYS_OCM_STATUS_MASK;
}
static void ocm_status_write(uint value)
{
out_be32((void *)CONFIG_SYS_OCM_STATUS_ADDR, value |
(in_be32((void *)CONFIG_SYS_OCM_STATUS_ADDR) &
~CONFIG_SYS_OCM_STATUS_MASK));
}
static inline int ocm_test_word(uint value, uint *address)
{
uint read_value;
*address = value;
sync();
read_value = *address;
return (read_value != value);
}
int ocm_post_test(int flags)
{
uint old_value;
int ret = 0;
uint *address = (uint*)CONFIG_SYS_OCM_BASE;
if (ocm_status_read() == CONFIG_SYS_OCM_STATUS_OK)
return 0;
for (; address < (uint*)(CONFIG_SYS_OCM_BASE + CONFIG_SYS_OCM_SIZE); address++) {
old_value = *address;
if (ocm_test_word(OCM_TEST_PATTERN1, address) ||
ocm_test_word(OCM_TEST_PATTERN2, address)) {
ret = 1;
*address = old_value;
printf("OCM POST failed at %p!\n", address);
break;
}
*address = old_value;
}
ocm_status_write(ret ? CONFIG_SYS_OCM_STATUS_FAIL : CONFIG_SYS_OCM_STATUS_OK);
return ret;
}
#endif /* CONFIG_POST & CONFIG_SYS_POST_OCM */
|
1001-study-uboot
|
post/cpu/ppc4xx/ocm.c
|
C
|
gpl3
| 2,415
|
/*
* (C) Copyright 2007
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* Author: Igor Lisitsin <igor@emcraft.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
/*
* Watchdog test
*
* The test verifies the watchdog timer operation.
* On the first iteration, the test routine disables interrupts and
* makes a 10-second delay. If the system does not reboot during this delay,
* the watchdog timer is not operational and the test fails. If the system
* reboots, on the second iteration the test routine reports a success.
*/
#include <post.h>
#if CONFIG_POST & CONFIG_SYS_POST_WATCHDOG
#include <watchdog.h>
int watchdog_post_test (int flags)
{
if (flags & POST_REBOOT) {
/* Test passed */
return 0;
}
else {
/* 10-second delay */
int ints = disable_interrupts ();
ulong base = post_time_ms (0);
while (post_time_ms (base) < 10000)
;
if (ints)
enable_interrupts ();
/*
* If we have reached this point, the watchdog timer
* does not work
*/
return -1;
}
}
#endif /* CONFIG_POST & CONFIG_SYS_POST_WATCHDOG */
|
1001-study-uboot
|
post/cpu/ppc4xx/watchdog.c
|
C
|
gpl3
| 1,846
|
/*
* (C) Copyright 2007
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* Author: Igor Lisitsin <igor@emcraft.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
/*
* Ethernet test
*
* The Ethernet Media Access Controllers (EMAC) are tested in the
* internal loopback mode.
* The controllers are configured accordingly and several packets
* are transmitted. The configurable test parameters are:
* MIN_PACKET_LENGTH - minimum size of packet to transmit
* MAX_PACKET_LENGTH - maximum size of packet to transmit
* CONFIG_SYS_POST_ETH_LOOPS - Number of test loops. Each loop
* is tested with a different frame length. Starting with
* MAX_PACKET_LENGTH and going down to MIN_PACKET_LENGTH.
* Defaults to 10 and can be overriden in the board config header.
*/
#include <post.h>
#if CONFIG_POST & CONFIG_SYS_POST_ETHER
#include <asm/cache.h>
#include <asm/io.h>
#include <asm/processor.h>
#include <asm/ppc4xx-mal.h>
#include <asm/ppc4xx-emac.h>
#include <malloc.h>
DECLARE_GLOBAL_DATA_PTR;
/*
* Get count of EMAC devices (doesn't have to be the max. possible number
* supported by the cpu)
*
* CONFIG_BOARD_EMAC_COUNT added so now a "dynamic" way to configure the
* EMAC count is possible. As it is needed for the Kilauea/Haleakala
* 405EX/405EXr eval board, using the same binary.
*/
#if defined(CONFIG_BOARD_EMAC_COUNT)
#define LAST_EMAC_NUM board_emac_count()
#else /* CONFIG_BOARD_EMAC_COUNT */
#if defined(CONFIG_HAS_ETH3)
#define LAST_EMAC_NUM 4
#elif defined(CONFIG_HAS_ETH2)
#define LAST_EMAC_NUM 3
#elif defined(CONFIG_HAS_ETH1)
#define LAST_EMAC_NUM 2
#else
#define LAST_EMAC_NUM 1
#endif
#endif /* CONFIG_BOARD_EMAC_COUNT */
#if defined(CONFIG_440SPE) || defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
#define SDR0_MFR_ETH_CLK_SEL_V(n) ((0x01<<27) / (n+1))
#endif
#define MIN_PACKET_LENGTH 64
#define MAX_PACKET_LENGTH 1514
#ifndef CONFIG_SYS_POST_ETH_LOOPS
#define CONFIG_SYS_POST_ETH_LOOPS 10
#endif
#define PACKET_INCR ((MAX_PACKET_LENGTH - MIN_PACKET_LENGTH) / \
CONFIG_SYS_POST_ETH_LOOPS)
static volatile mal_desc_t tx __cacheline_aligned;
static volatile mal_desc_t rx __cacheline_aligned;
static char *tx_buf;
static char *rx_buf;
int board_emac_count(void);
static void ether_post_init (int devnum, int hw_addr)
{
int i;
#if defined(CONFIG_440GX) || \
defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
defined(CONFIG_440SP) || defined(CONFIG_440SPE)
unsigned mode_reg;
sys_info_t sysinfo;
#endif
#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || defined(CONFIG_440SPE)
unsigned long mfr;
#endif
#if defined(CONFIG_440GX) || \
defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
defined(CONFIG_440SP) || defined(CONFIG_440SPE)
/* Need to get the OPB frequency so we can access the PHY */
get_sys_info (&sysinfo);
#endif
#if defined(CONFIG_440SPE) || defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
/* provide clocks for EMAC internal loopback */
mfsdr (SDR0_MFR, mfr);
mfr |= SDR0_MFR_ETH_CLK_SEL_V(devnum);
mtsdr (SDR0_MFR, mfr);
sync ();
#endif
/* reset emac */
out_be32 ((void*)(EMAC0_MR0 + hw_addr), EMAC_MR0_SRST);
sync ();
for (i = 0;; i++) {
if (!(in_be32 ((void*)(EMAC0_MR0 + hw_addr)) & EMAC_MR0_SRST))
break;
if (i >= 1000) {
printf ("Timeout resetting EMAC\n");
break;
}
udelay (1000);
}
#if defined(CONFIG_440GX) || \
defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
defined(CONFIG_440SP) || defined(CONFIG_440SPE)
/* Whack the M1 register */
mode_reg = 0x0;
if (sysinfo.freqOPB <= 50000000);
else if (sysinfo.freqOPB <= 66666667)
mode_reg |= EMAC_MR1_OBCI_66;
else if (sysinfo.freqOPB <= 83333333)
mode_reg |= EMAC_MR1_OBCI_83;
else if (sysinfo.freqOPB <= 100000000)
mode_reg |= EMAC_MR1_OBCI_100;
else
mode_reg |= EMAC_MR1_OBCI_GT100;
out_be32 ((void*)(EMAC0_MR1 + hw_addr), mode_reg);
#endif /* defined(CONFIG_440GX) || defined(CONFIG_440SP) */
/* set the Mal configuration reg */
#if defined(CONFIG_440GX) || \
defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
defined(CONFIG_440SP) || defined(CONFIG_440SPE)
mtdcr (MAL0_CFG, MAL_CR_PLBB | MAL_CR_OPBBL | MAL_CR_LEA |
MAL_CR_PLBLT_DEFAULT | 0x00330000);
#else
mtdcr (MAL0_CFG, MAL_CR_PLBB | MAL_CR_OPBBL | MAL_CR_LEA | MAL_CR_PLBLT_DEFAULT);
/* Errata 1.12: MAL_1 -- Disable MAL bursting */
if (get_pvr() == PVR_440GP_RB) {
mtdcr (MAL0_CFG, mfdcr(MAL0_CFG) & ~MAL_CR_PLBB);
}
#endif
/* setup buffer descriptors */
tx.ctrl = MAL_TX_CTRL_WRAP;
tx.data_len = 0;
tx.data_ptr = (char*)L1_CACHE_ALIGN((u32)tx_buf);
rx.ctrl = MAL_TX_CTRL_WRAP | MAL_RX_CTRL_EMPTY;
rx.data_len = 0;
rx.data_ptr = (char*)L1_CACHE_ALIGN((u32)rx_buf);
flush_dcache_range((u32)&rx, (u32)&rx + sizeof(mal_desc_t));
flush_dcache_range((u32)&tx, (u32)&tx + sizeof(mal_desc_t));
switch (devnum) {
case 1:
/* setup MAL tx & rx channel pointers */
#if defined (CONFIG_405EP) || defined (CONFIG_440EP) || defined (CONFIG_440GR)
mtdcr (MAL0_TXCTP2R, &tx);
#else
mtdcr (MAL0_TXCTP1R, &tx);
#endif
#if defined(CONFIG_440)
mtdcr (MAL0_TXBADDR, 0x0);
mtdcr (MAL0_RXBADDR, 0x0);
#endif
mtdcr (MAL0_RXCTP1R, &rx);
/* set RX buffer size */
mtdcr (MAL0_RCBS1, PKTSIZE_ALIGN / 16);
break;
case 0:
default:
/* setup MAL tx & rx channel pointers */
#if defined(CONFIG_440)
mtdcr (MAL0_TXBADDR, 0x0);
mtdcr (MAL0_RXBADDR, 0x0);
#endif
mtdcr (MAL0_TXCTP0R, &tx);
mtdcr (MAL0_RXCTP0R, &rx);
/* set RX buffer size */
mtdcr (MAL0_RCBS0, PKTSIZE_ALIGN / 16);
break;
}
/* Enable MAL transmit and receive channels */
#if defined(CONFIG_405EP) || defined(CONFIG_440EP) || defined(CONFIG_440GR)
mtdcr (MAL0_TXCASR, (MAL_TXRX_CASR >> (devnum*2)));
#else
mtdcr (MAL0_TXCASR, (MAL_TXRX_CASR >> devnum));
#endif
mtdcr (MAL0_RXCASR, (MAL_TXRX_CASR >> devnum));
/* set internal loopback mode */
#ifdef CONFIG_SYS_POST_ETHER_EXT_LOOPBACK
out_be32 ((void*)(EMAC0_MR1 + hw_addr), EMAC_MR1_FDE | 0 |
EMAC_MR1_RFS_4K | EMAC_MR1_TX_FIFO_2K |
EMAC_MR1_MF_100MBPS | EMAC_MR1_IST |
in_be32 ((void*)(EMAC0_MR1 + hw_addr)));
#else
out_be32 ((void*)(EMAC0_MR1 + hw_addr), EMAC_MR1_FDE | EMAC_MR1_ILE |
EMAC_MR1_RFS_4K | EMAC_MR1_TX_FIFO_2K |
EMAC_MR1_MF_100MBPS | EMAC_MR1_IST |
in_be32 ((void*)(EMAC0_MR1 + hw_addr)));
#endif
/* set transmit enable & receive enable */
out_be32 ((void*)(EMAC0_MR0 + hw_addr), EMAC_MR0_TXE | EMAC_MR0_RXE);
/* enable broadcast address */
out_be32 ((void*)(EMAC0_RXM + hw_addr), EMAC_RMR_BAE);
/* set transmit request threshold register */
out_be32 ((void*)(EMAC0_TRTR + hw_addr), 0x18000000); /* 256 byte threshold */
/* set receive low/high water mark register */
#if defined(CONFIG_440)
/* 440s has a 64 byte burst length */
out_be32 ((void*)(EMAC0_RX_HI_LO_WMARK + hw_addr), 0x80009000);
#else
/* 405s have a 16 byte burst length */
out_be32 ((void*)(EMAC0_RX_HI_LO_WMARK + hw_addr), 0x0f002000);
#endif /* defined(CONFIG_440) */
out_be32 ((void*)(EMAC0_TMR1 + hw_addr), 0xf8640000);
/* Set fifo limit entry in tx mode 0 */
out_be32 ((void*)(EMAC0_TMR0 + hw_addr), 0x00000003);
/* Frame gap set */
out_be32 ((void*)(EMAC0_I_FRAME_GAP_REG + hw_addr), 0x00000008);
sync ();
}
static void ether_post_halt (int devnum, int hw_addr)
{
int i = 0;
#if defined(CONFIG_440SPE) || defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
unsigned long mfr;
#endif
/* 1st reset MAL channel */
/* Note: writing a 0 to a channel has no effect */
#if defined(CONFIG_405EP) || defined(CONFIG_440EP) || defined(CONFIG_440GR)
mtdcr (MAL0_TXCARR, MAL_TXRX_CASR >> (devnum * 2));
#else
mtdcr (MAL0_TXCARR, MAL_TXRX_CASR >> devnum);
#endif
mtdcr (MAL0_RXCARR, MAL_TXRX_CASR >> devnum);
/* wait for reset */
while (mfdcr (MAL0_RXCASR) & (MAL_TXRX_CASR >> devnum)) {
if (i++ >= 1000)
break;
udelay (1000);
}
/* emac reset */
out_be32 ((void*)(EMAC0_MR0 + hw_addr), EMAC_MR0_SRST);
#if defined(CONFIG_440SPE) || defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
/* remove clocks for EMAC internal loopback */
mfsdr (SDR0_MFR, mfr);
mfr &= ~SDR0_MFR_ETH_CLK_SEL_V(devnum);
mtsdr (SDR0_MFR, mfr);
#endif
}
static void ether_post_send (int devnum, int hw_addr, void *packet, int length)
{
int i = 0;
while (tx.ctrl & MAL_TX_CTRL_READY) {
if (i++ > 100) {
printf ("TX timeout\n");
return;
}
udelay (1000);
invalidate_dcache_range((u32)&tx, (u32)&tx + sizeof(mal_desc_t));
}
tx.ctrl = MAL_TX_CTRL_READY | MAL_TX_CTRL_WRAP | MAL_TX_CTRL_LAST |
EMAC_TX_CTRL_GFCS | EMAC_TX_CTRL_GP;
tx.data_len = length;
memcpy (tx.data_ptr, packet, length);
flush_dcache_range((u32)&tx, (u32)&tx + sizeof(mal_desc_t));
flush_dcache_range((u32)tx.data_ptr, (u32)tx.data_ptr + length);
sync ();
out_be32 ((void*)(EMAC0_TMR0 + hw_addr), in_be32 ((void*)(EMAC0_TMR0 + hw_addr)) | EMAC_TMR0_GNP0);
sync ();
}
static int ether_post_recv (int devnum, int hw_addr, void *packet, int max_length)
{
int length;
int i = 0;
while (rx.ctrl & MAL_RX_CTRL_EMPTY) {
if (i++ > 100) {
printf ("RX timeout\n");
return 0;
}
udelay (1000);
invalidate_dcache_range((u32)&rx, (u32)&rx + sizeof(mal_desc_t));
}
length = rx.data_len - 4;
if (length <= max_length) {
invalidate_dcache_range((u32)rx.data_ptr, (u32)rx.data_ptr + length);
memcpy(packet, rx.data_ptr, length);
}
sync ();
rx.ctrl |= MAL_RX_CTRL_EMPTY;
flush_dcache_range((u32)&rx, (u32)&rx + sizeof(mal_desc_t));
sync ();
return length;
}
/*
* Test routines
*/
static void packet_fill (char *packet, int length)
{
char c = (char) length;
int i;
/* set up ethernet header */
memset (packet, 0xff, 14);
for (i = 14; i < length; i++) {
packet[i] = c++;
}
}
static int packet_check (char *packet, int length)
{
char c = (char) length;
int i;
for (i = 14; i < length; i++) {
if (packet[i] != c++)
return -1;
}
return 0;
}
char packet_send[MAX_PACKET_LENGTH];
char packet_recv[MAX_PACKET_LENGTH];
static int test_ctlr (int devnum, int hw_addr)
{
int res = -1;
int length;
int l;
ether_post_init (devnum, hw_addr);
for (l = MAX_PACKET_LENGTH; l >= MIN_PACKET_LENGTH;
l -= PACKET_INCR) {
packet_fill (packet_send, l);
ether_post_send (devnum, hw_addr, packet_send, l);
length = ether_post_recv (devnum, hw_addr, packet_recv,
sizeof (packet_recv));
if (length != l || packet_check (packet_recv, length) < 0) {
goto Done;
}
}
res = 0;
Done:
ether_post_halt (devnum, hw_addr);
if (res != 0) {
post_log ("EMAC%d test failed\n", devnum);
}
return res;
}
int ether_post_test (int flags)
{
int res = 0;
int i;
/* Allocate tx & rx packet buffers */
tx_buf = malloc (PKTSIZE_ALIGN + CONFIG_SYS_CACHELINE_SIZE);
rx_buf = malloc (PKTSIZE_ALIGN + CONFIG_SYS_CACHELINE_SIZE);
if (!tx_buf || !rx_buf) {
printf ("Failed to allocate packet buffers\n");
res = -1;
goto out_free;
}
for (i = 0; i < LAST_EMAC_NUM; i++) {
if (test_ctlr (i, i*0x100))
res = -1;
}
out_free:
free (tx_buf);
free (rx_buf);
return res;
}
#endif /* CONFIG_POST & CONFIG_SYS_POST_ETHER */
|
1001-study-uboot
|
post/cpu/ppc4xx/ether.c
|
C
|
gpl3
| 11,838
|
#
# (C) Copyright 2002-2007
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(OBJTREE)/include/autoconf.mk
LIB = libpostppc4xx.o
AOBJS-$(CONFIG_HAS_POST) += cache_4xx.o
COBJS-$(CONFIG_HAS_POST) += cache.o
COBJS-$(CONFIG_HAS_POST) += denali_ecc.o
COBJS-$(CONFIG_HAS_POST) += ether.o
COBJS-$(CONFIG_HAS_POST) += fpu.o
COBJS-$(CONFIG_HAS_POST) += ocm.o
COBJS-$(CONFIG_HAS_POST) += spr.o
COBJS-$(CONFIG_HAS_POST) += uart.o
COBJS-$(CONFIG_HAS_POST) += watchdog.o
include $(TOPDIR)/post/rules.mk
|
1001-study-uboot
|
post/cpu/ppc4xx/Makefile
|
Makefile
|
gpl3
| 1,288
|
/*
* (C) Copyright 2007
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* Author: Igor Lisitsin <igor@emcraft.com>
*
* Copyright 2010, Stefan Roese, DENX Software Engineering, sr@denx.de
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/ppc4xx.h>
#include <ns16550.h>
#include <asm/io.h>
#include <serial.h>
/*
* UART test
*
* The controllers are configured to loopback mode and several
* characters are transmitted.
*/
#include <post.h>
#if CONFIG_POST & CONFIG_SYS_POST_UART
/*
* This table defines the UART's that should be tested and can
* be overridden in the board config file
*/
#ifndef CONFIG_SYS_POST_UART_TABLE
#define CONFIG_SYS_POST_UART_TABLE { CONFIG_SYS_NS16550_COM1, \
CONFIG_SYS_NS16550_COM2, CONFIG_SYS_NS16550_COM3, \
CONFIG_SYS_NS16550_COM4 }
#endif
DECLARE_GLOBAL_DATA_PTR;
static int test_ctlr (struct NS16550 *com_port, int index)
{
int res = -1;
char test_str[] = "*** UART Test String ***\r\n";
int i;
int divisor;
divisor = (get_serial_clock() + (gd->baudrate * (16 / 2))) /
(16 * gd->baudrate);
NS16550_init(com_port, divisor);
/*
* Set internal loopback mode in UART
*/
out_8(&com_port->mcr, in_8(&com_port->mcr) | UART_MCR_LOOP);
/* Reset FIFOs */
out_8(&com_port->fcr, UART_FCR_RXSR | UART_FCR_TXSR);
udelay(100);
/* Flush RX-FIFO */
while (NS16550_tstc(com_port))
NS16550_getc(com_port);
for (i = 0; i < sizeof (test_str) - 1; i++) {
NS16550_putc(com_port, test_str[i]);
if (NS16550_getc(com_port) != test_str[i])
goto done;
}
res = 0;
done:
if (res)
post_log ("uart%d test failed\n", index);
return res;
}
int uart_post_test (int flags)
{
int i, res = 0;
static unsigned long base[] = CONFIG_SYS_POST_UART_TABLE;
for (i = 0; i < ARRAY_SIZE(base); i++) {
if (test_ctlr((struct NS16550 *)base[i], i))
res = -1;
}
serial_reinit_all ();
return res;
}
#endif /* CONFIG_POST & CONFIG_SYS_POST_UART */
|
1001-study-uboot
|
post/cpu/ppc4xx/uart.c
|
C
|
gpl3
| 2,703
|
/*
* (C) Copyright 2007
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* Author: Igor Lisitsin <igor@emcraft.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
/* Cache test
*
* This test verifies the CPU data and instruction cache using
* several test scenarios.
*/
#include <post.h>
#if CONFIG_POST & CONFIG_SYS_POST_CACHE
#include <asm/mmu.h>
#include <watchdog.h>
#define CACHE_POST_SIZE 1024
int cache_post_test1 (int tlb, void *p, int size);
int cache_post_test2 (int tlb, void *p, int size);
int cache_post_test3 (int tlb, void *p, int size);
int cache_post_test4 (int tlb, void *p, int size);
int cache_post_test5 (int tlb, void *p, int size);
int cache_post_test6 (int tlb, void *p, int size);
#ifdef CONFIG_440
static unsigned char testarea[CACHE_POST_SIZE]
__attribute__((__aligned__(CACHE_POST_SIZE)));
#endif
int cache_post_test (int flags)
{
void *virt = (void *)CONFIG_SYS_POST_CACHE_ADDR;
int ints;
int res = 0;
int tlb = -1; /* index to the victim TLB entry */
/*
* All 44x variants deal with cache management differently
* because they have the address translation always enabled.
* The 40x ppc's don't use address translation in U-Boot at all,
* so we have to distinguish here between 40x and 44x.
*/
#ifdef CONFIG_440
int word0, i;
/*
* Allocate a new TLB entry, since we are going to modify
* the write-through and caching inhibited storage attributes.
*/
program_tlb((u32)testarea, (u32)virt, CACHE_POST_SIZE,
TLB_WORD2_I_ENABLE);
/* Find the TLB entry */
for (i = 0;; i++) {
if (i >= PPC4XX_TLB_SIZE) {
printf ("Failed to program tlb entry\n");
return -1;
}
word0 = mftlb1(i);
if (TLB_WORD0_EPN_DECODE(word0) == (u32)virt) {
tlb = i;
break;
}
}
#endif
ints = disable_interrupts ();
WATCHDOG_RESET ();
if (res == 0)
res = cache_post_test1 (tlb, virt, CACHE_POST_SIZE);
WATCHDOG_RESET ();
if (res == 0)
res = cache_post_test2 (tlb, virt, CACHE_POST_SIZE);
WATCHDOG_RESET ();
if (res == 0)
res = cache_post_test3 (tlb, virt, CACHE_POST_SIZE);
WATCHDOG_RESET ();
if (res == 0)
res = cache_post_test4 (tlb, virt, CACHE_POST_SIZE);
WATCHDOG_RESET ();
if (res == 0)
res = cache_post_test5 (tlb, virt, CACHE_POST_SIZE);
WATCHDOG_RESET ();
if (res == 0)
res = cache_post_test6 (tlb, virt, CACHE_POST_SIZE);
if (ints)
enable_interrupts ();
#ifdef CONFIG_440
remove_tlb((u32)virt, CACHE_POST_SIZE);
#endif
return res;
}
#endif /* CONFIG_POST & CONFIG_SYS_POST_CACHE */
|
1001-study-uboot
|
post/cpu/ppc4xx/cache.c
|
C
|
gpl3
| 3,276
|
/*
* (C) Copyright 2007
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* Author: Igor Lisitsin <igor@emcraft.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <post.h>
#include <ppc_asm.tmpl>
#include <ppc_defs.h>
#include <asm/cache.h>
#include <asm/mmu.h>
#if CONFIG_POST & CONFIG_SYS_POST_CACHE
.text
/*
* All 44x variants deal with cache management differently
* because they have the address translation always enabled.
* The 40x ppc's don't use address translation in U-Boot at all,
* so we have to distinguish here between 40x and 44x.
*/
#ifdef CONFIG_440
/* void cache_post_disable (int tlb)
*/
cache_post_disable:
tlbre r0, r3, 0x0002
ori r0, r0, TLB_WORD2_I_ENABLE@l
tlbwe r0, r3, 0x0002
sync
isync
blr
/* void cache_post_wt (int tlb)
*/
cache_post_wt:
tlbre r0, r3, 0x0002
ori r0, r0, TLB_WORD2_W_ENABLE@l
andi. r0, r0, ~TLB_WORD2_I_ENABLE@l
tlbwe r0, r3, 0x0002
sync
isync
blr
/* void cache_post_wb (int tlb)
*/
cache_post_wb:
tlbre r0, r3, 0x0002
andi. r0, r0, ~TLB_WORD2_W_ENABLE@l
andi. r0, r0, ~TLB_WORD2_I_ENABLE@l
tlbwe r0, r3, 0x0002
sync
isync
blr
#else
/* void cache_post_disable (int tlb)
*/
cache_post_disable:
lis r0, 0x0000
ori r0, r0, 0x0000
mtdccr r0
sync
isync
blr
/* void cache_post_wt (int tlb)
*/
cache_post_wt:
lis r0, 0x8000
ori r0, r0, 0x0000
mtdccr r0
lis r0, 0x8000
ori r0, r0, 0x0000
mtdcwr r0
sync
isync
blr
/* void cache_post_wb (int tlb)
*/
cache_post_wb:
lis r0, 0x8000
ori r0, r0, 0x0000
mtdccr r0
lis r0, 0x0000
ori r0, r0, 0x0000
mtdcwr r0
sync
isync
blr
#endif
/* void cache_post_dinvalidate (void *p, int size)
*/
cache_post_dinvalidate:
dcbi r0, r3
addi r3, r3, CONFIG_SYS_CACHELINE_SIZE
subic. r4, r4, CONFIG_SYS_CACHELINE_SIZE
bgt cache_post_dinvalidate
sync
blr
/* void cache_post_dstore (void *p, int size)
*/
cache_post_dstore:
dcbst r0, r3
addi r3, r3, CONFIG_SYS_CACHELINE_SIZE
subic. r4, r4, CONFIG_SYS_CACHELINE_SIZE
bgt cache_post_dstore
sync
blr
/* void cache_post_dtouch (void *p, int size)
*/
cache_post_dtouch:
dcbt r0, r3
addi r3, r3, CONFIG_SYS_CACHELINE_SIZE
subic. r4, r4, CONFIG_SYS_CACHELINE_SIZE
bgt cache_post_dtouch
sync
blr
/* void cache_post_iinvalidate (void)
*/
cache_post_iinvalidate:
iccci r0, r0
sync
blr
/* void cache_post_memset (void *p, int val, int size)
*/
cache_post_memset:
mtctr r5
1:
stb r4, 0(r3)
addi r3, r3, 1
bdnz 1b
blr
/* int cache_post_check (void *p, int size)
*/
cache_post_check:
mtctr r4
1:
lbz r0, 0(r3)
addi r3, r3, 1
cmpwi r0, 0xff
bne 2f
bdnz 1b
li r3, 0
blr
2:
li r3, -1
blr
#define CACHE_POST_DISABLE() \
mr r3, r10; \
bl cache_post_disable
#define CACHE_POST_WT() \
mr r3, r10; \
bl cache_post_wt
#define CACHE_POST_WB() \
mr r3, r10; \
bl cache_post_wb
#define CACHE_POST_DINVALIDATE() \
mr r3, r11; \
mr r4, r12; \
bl cache_post_dinvalidate
#define CACHE_POST_DFLUSH() \
mr r3, r11; \
mr r4, r12; \
bl cache_post_dflush
#define CACHE_POST_DSTORE() \
mr r3, r11; \
mr r4, r12; \
bl cache_post_dstore
#define CACHE_POST_DTOUCH() \
mr r3, r11; \
mr r4, r12; \
bl cache_post_dtouch
#define CACHE_POST_IINVALIDATE() \
bl cache_post_iinvalidate
#define CACHE_POST_MEMSET(val) \
mr r3, r11; \
li r4, val; \
mr r5, r12; \
bl cache_post_memset
#define CACHE_POST_CHECK() \
mr r3, r11; \
mr r4, r12; \
bl cache_post_check; \
mr r13, r3
/*
* Write and read 0xff pattern with caching enabled.
*/
.global cache_post_test1
cache_post_test1:
mflr r9
mr r10, r3 /* tlb */
mr r11, r4 /* p */
mr r12, r5 /* size */
CACHE_POST_WB()
CACHE_POST_DINVALIDATE()
/* Write the negative pattern to the test area */
CACHE_POST_MEMSET(0xff)
/* Read the test area */
CACHE_POST_CHECK()
CACHE_POST_DINVALIDATE()
CACHE_POST_DISABLE()
mr r3, r13
mtlr r9
blr
/*
* Write zeroes with caching enabled.
* Write 0xff pattern with caching disabled.
* Read 0xff pattern with caching enabled.
*/
.global cache_post_test2
cache_post_test2:
mflr r9
mr r10, r3 /* tlb */
mr r11, r4 /* p */
mr r12, r5 /* size */
CACHE_POST_WB()
CACHE_POST_DINVALIDATE()
/* Write the zero pattern to the test area */
CACHE_POST_MEMSET(0)
CACHE_POST_DINVALIDATE()
CACHE_POST_DISABLE()
/* Write the negative pattern to the test area */
CACHE_POST_MEMSET(0xff)
CACHE_POST_WB()
/* Read the test area */
CACHE_POST_CHECK()
CACHE_POST_DINVALIDATE()
CACHE_POST_DISABLE()
mr r3, r13
mtlr r9
blr
/*
* Write-through mode test.
* Write zeroes, store the cache, write 0xff pattern.
* Invalidate the cache.
* Check that 0xff pattern is read.
*/
.global cache_post_test3
cache_post_test3:
mflr r9
mr r10, r3 /* tlb */
mr r11, r4 /* p */
mr r12, r5 /* size */
CACHE_POST_WT()
CACHE_POST_DINVALIDATE()
/* Cache the test area */
CACHE_POST_DTOUCH()
/* Write the zero pattern to the test area */
CACHE_POST_MEMSET(0)
CACHE_POST_DSTORE()
/* Write the negative pattern to the test area */
CACHE_POST_MEMSET(0xff)
CACHE_POST_DINVALIDATE()
CACHE_POST_DISABLE()
/* Read the test area */
CACHE_POST_CHECK()
mr r3, r13
mtlr r9
blr
/*
* Write-back mode test.
* Write 0xff pattern, store the cache, write zeroes.
* Invalidate the cache.
* Check that 0xff pattern is read.
*/
.global cache_post_test4
cache_post_test4:
mflr r9
mr r10, r3 /* tlb */
mr r11, r4 /* p */
mr r12, r5 /* size */
CACHE_POST_WB()
CACHE_POST_DINVALIDATE()
/* Cache the test area */
CACHE_POST_DTOUCH()
/* Write the negative pattern to the test area */
CACHE_POST_MEMSET(0xff)
CACHE_POST_DSTORE()
/* Write the zero pattern to the test area */
CACHE_POST_MEMSET(0)
CACHE_POST_DINVALIDATE()
CACHE_POST_DISABLE()
/* Read the test area */
CACHE_POST_CHECK()
mr r3, r13
mtlr r9
blr
/*
* Load the test instructions into the instruction cache.
* Replace the test instructions.
* Check that the original instructions are executed.
*/
.global cache_post_test5
cache_post_test5:
mflr r9
mr r10, r3 /* tlb */
mr r11, r4 /* p */
mr r12, r5 /* size */
CACHE_POST_WT()
CACHE_POST_IINVALIDATE()
/* Compute r13 = cache_post_test_inst */
bl cache_post_test5_reloc
cache_post_test5_reloc:
mflr r13
lis r0, (cache_post_test_inst - cache_post_test5_reloc)@h
ori r0, r0, (cache_post_test_inst - cache_post_test5_reloc)@l
add r13, r13, r0
/* Copy the test instructions to the test area */
lwz r0, 0(r13)
stw r0, 0(r11)
lwz r0, 8(r13)
stw r0, 4(r11)
sync
/* Invalidate the cache line */
icbi r0, r11
sync
isync
/* Execute the test instructions */
mtlr r11
blrl
/* Replace the test instruction */
lwz r0, 4(r13)
stw r0, 0(r11)
sync
/* Do not invalidate the cache line */
isync
/* Execute the test instructions */
mtlr r11
blrl
mr r13, r3
CACHE_POST_IINVALIDATE()
CACHE_POST_DINVALIDATE()
CACHE_POST_DISABLE()
mr r3, r13
mtlr r9
blr
/*
* Load the test instructions into the instruction cache.
* Replace the test instructions and invalidate the cache.
* Check that the replaced instructions are executed.
*/
.global cache_post_test6
cache_post_test6:
mflr r9
mr r10, r3 /* tlb */
mr r11, r4 /* p */
mr r12, r5 /* size */
CACHE_POST_WT()
CACHE_POST_IINVALIDATE()
/* Compute r13 = cache_post_test_inst */
bl cache_post_test6_reloc
cache_post_test6_reloc:
mflr r13
lis r0, (cache_post_test_inst - cache_post_test6_reloc)@h
ori r0, r0, (cache_post_test_inst - cache_post_test6_reloc)@l
add r13, r13, r0
/* Copy the test instructions to the test area */
lwz r0, 4(r13)
stw r0, 0(r11)
lwz r0, 8(r13)
stw r0, 4(r11)
sync
/* Invalidate the cache line */
icbi r0, r11
sync
isync
/* Execute the test instructions */
mtlr r11
blrl
/* Replace the test instruction */
lwz r0, 0(r13)
stw r0, 0(r11)
sync
/* Invalidate the cache line */
icbi r0, r11
sync
isync
/* Execute the test instructions */
mtlr r11
blrl
mr r13, r3
CACHE_POST_IINVALIDATE()
CACHE_POST_DINVALIDATE()
CACHE_POST_DISABLE()
mr r3, r13
mtlr r9
blr
/* Test instructions.
*/
cache_post_test_inst:
li r3, 0
li r3, -1
blr
#endif /* CONFIG_POST & CONFIG_SYS_POST_CACHE */
|
1001-study-uboot
|
post/cpu/ppc4xx/cache_4xx.S
|
Unix Assembly
|
gpl3
| 8,950
|
/*
* (C) Copyright 2007
* Developed for DENX Software Engineering GmbH.
*
* Author: Pavel Kolesnikov <concord@emcraft.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/* define DEBUG for debugging output (obviously ;-)) */
#if 0
#define DEBUG
#endif
#include <common.h>
#include <watchdog.h>
#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
#include <post.h>
#if CONFIG_POST & CONFIG_SYS_POST_ECC
/*
* MEMORY ECC test
*
* This test performs the checks ECC facility of memory.
*/
#include <asm/processor.h>
#include <asm/mmu.h>
#include <asm/io.h>
#include <asm/ppc440.h>
DECLARE_GLOBAL_DATA_PTR;
const static uint8_t syndrome_codes[] = {
0xF4, 0XF1, 0XEC, 0XEA, 0XE9, 0XE6, 0XE5, 0XE3,
0XDC, 0XDA, 0XD9, 0XD6, 0XD5, 0XD3, 0XCE, 0XCB,
0xB5, 0XB0, 0XAD, 0XAB, 0XA8, 0XA7, 0XA4, 0XA2,
0X9D, 0X9B, 0X98, 0X97, 0X94, 0X92, 0X8F, 0X8A,
0x75, 0x70, 0X6D, 0X6B, 0X68, 0X67, 0X64, 0X62,
0X5E, 0X5B, 0X58, 0X57, 0X54, 0X52, 0X4F, 0X4A,
0x34, 0x31, 0X2C, 0X2A, 0X29, 0X26, 0X25, 0X23,
0X1C, 0X1A, 0X19, 0X16, 0X15, 0X13, 0X0E, 0X0B,
0x80, 0x40, 0x20, 0x10, 0x08, 0x04, 0x02, 0x01
};
#define ECC_START_ADDR 0x10
#define ECC_STOP_ADDR 0x2000
#define ECC_PATTERN 0x01010101
#define ECC_PATTERN_CORR 0x11010101
#define ECC_PATTERN_UNCORR 0x61010101
inline static void disable_ecc(void)
{
uint32_t value;
sync(); /* Wait for any pending memory accesses to complete. */
mfsdram(DDR0_22, value);
mtsdram(DDR0_22, (value & ~DDR0_22_CTRL_RAW_MASK)
| DDR0_22_CTRL_RAW_ECC_DISABLE);
}
inline static void clear_and_enable_ecc(void)
{
uint32_t value;
sync(); /* Wait for any pending memory accesses to complete. */
mfsdram(DDR0_00, value);
mtsdram(DDR0_00, value | DDR0_00_INT_ACK_ALL);
mfsdram(DDR0_22, value);
mtsdram(DDR0_22, (value & ~DDR0_22_CTRL_RAW_MASK)
| DDR0_22_CTRL_RAW_ECC_ENABLE);
}
static uint32_t get_ecc_status(void)
{
uint32_t int_status;
#if defined(DEBUG)
uint8_t syndrome;
uint32_t hdata, ldata, haddr, laddr;
uint32_t value;
#endif
mfsdram(DDR0_00, int_status);
int_status &= DDR0_00_INT_STATUS_MASK;
#if defined(DEBUG)
if (int_status & (DDR0_00_INT_STATUS_BIT0 | DDR0_00_INT_STATUS_BIT1)) {
mfsdram(DDR0_32, laddr);
mfsdram(DDR0_33, haddr);
haddr &= 0x00000001;
if (int_status & DDR0_00_INT_STATUS_BIT1)
debug("Multiple accesses");
else
debug("A single access");
debug(" outside the defined physical memory space detected\n"
" addr = 0x%01x%08x\n", haddr, laddr);
}
if (int_status & (DDR0_00_INT_STATUS_BIT2 | DDR0_00_INT_STATUS_BIT3)) {
unsigned int bit;
mfsdram(DDR0_23, value);
syndrome = (value >> 16) & 0xff;
for (bit = 0; bit < sizeof(syndrome_codes); bit++)
if (syndrome_codes[bit] == syndrome)
break;
mfsdram(DDR0_38, laddr);
mfsdram(DDR0_39, haddr);
haddr &= 0x00000001;
mfsdram(DDR0_40, ldata);
mfsdram(DDR0_41, hdata);
if (int_status & DDR0_00_INT_STATUS_BIT3)
debug("Multiple correctable ECC events");
else
debug("Single correctable ECC event");
debug(" detected\n 0x%01x%08x - 0x%08x%08x, bit - %d\n",
haddr, laddr, hdata, ldata, bit);
}
if (int_status & (DDR0_00_INT_STATUS_BIT4 | DDR0_00_INT_STATUS_BIT5)) {
mfsdram(DDR0_23, value);
syndrome = (value >> 8) & 0xff;
mfsdram(DDR0_34, laddr);
mfsdram(DDR0_35, haddr);
haddr &= 0x00000001;
mfsdram(DDR0_36, ldata);
mfsdram(DDR0_37, hdata);
if (int_status & DDR0_00_INT_STATUS_BIT5)
debug("Multiple uncorrectable ECC events");
else
debug("Single uncorrectable ECC event");
debug(" detected\n 0x%01x%08x - 0x%08x%08x, "
"syndrome - 0x%02x\n",
haddr, laddr, hdata, ldata, syndrome);
}
if (int_status & DDR0_00_INT_STATUS_BIT6)
debug("DRAM initialization complete\n");
#endif /* defined(DEBUG) */
return int_status;
}
static int test_ecc(uint32_t ecc_addr)
{
uint32_t value;
volatile uint32_t *const ecc_mem = (volatile uint32_t *)ecc_addr;
int ret = 0;
WATCHDOG_RESET();
debug("Entering test_ecc(0x%08x)\n", ecc_addr);
/* Set up correct ECC in memory */
disable_ecc();
clear_and_enable_ecc();
out_be32(ecc_mem, ECC_PATTERN);
out_be32(ecc_mem + 1, ECC_PATTERN);
ppcDcbf((u32)ecc_mem);
/* Verify no ECC error reading back */
value = in_be32(ecc_mem);
disable_ecc();
if (ECC_PATTERN != value) {
debug("Data read error (no-error case): "
"expected 0x%08x, read 0x%08x\n", ECC_PATTERN, value);
ret = 1;
}
value = get_ecc_status();
if (0x00000000 != value) {
/* Expected no ECC status reported */
debug("get_ecc_status(): expected 0x%08x, got 0x%08x\n",
0x00000000, value);
ret = 1;
}
/* Test for correctable error by creating a one-bit error */
out_be32(ecc_mem, ECC_PATTERN_CORR);
ppcDcbf((u32)ecc_mem);
clear_and_enable_ecc();
value = in_be32(ecc_mem);
disable_ecc();
/* Test that the corrected data was read */
if (ECC_PATTERN != value) {
debug("Data read error (correctable-error case): "
"expected 0x%08x, read 0x%08x\n", ECC_PATTERN, value);
ret = 1;
}
value = get_ecc_status();
if ((DDR0_00_INT_STATUS_BIT2 | DDR0_00_INT_STATUS_BIT7) != value) {
/* Expected a single correctable error reported */
debug("get_ecc_status(): expected 0x%08x, got 0x%08x\n",
DDR0_00_INT_STATUS_BIT2, value);
ret = 1;
}
/* Test for uncorrectable error by creating a two-bit error */
out_be32(ecc_mem, ECC_PATTERN_UNCORR);
ppcDcbf((u32)ecc_mem);
clear_and_enable_ecc();
value = in_be32(ecc_mem);
disable_ecc();
/* Test that the corrected data was read */
if (ECC_PATTERN_UNCORR != value) {
debug("Data read error (uncorrectable-error case): "
"expected 0x%08x, read 0x%08x\n", ECC_PATTERN_UNCORR,
value);
ret = 1;
}
value = get_ecc_status();
if ((DDR0_00_INT_STATUS_BIT4 | DDR0_00_INT_STATUS_BIT7) != value) {
/* Expected a single uncorrectable error reported */
debug("get_ecc_status(): expected 0x%08x, got 0x%08x\n",
DDR0_00_INT_STATUS_BIT4, value);
ret = 1;
}
/* Remove error from SDRAM and enable ECC. */
out_be32(ecc_mem, ECC_PATTERN);
ppcDcbf((u32)ecc_mem);
clear_and_enable_ecc();
return ret;
}
int ecc_post_test(int flags)
{
int ret = 0;
uint32_t value;
uint32_t iaddr;
mfsdram(DDR0_22, value);
if (0x3 != DDR0_22_CTRL_RAW_DECODE(value)) {
debug("SDRAM ECC not enabled, skipping ECC POST.\n");
return 0;
}
/* Mask all interrupts. */
mfsdram(DDR0_01, value);
mtsdram(DDR0_01, (value & ~DDR0_01_INT_MASK_MASK)
| DDR0_01_INT_MASK_ALL_OFF);
for (iaddr = ECC_START_ADDR; iaddr <= ECC_STOP_ADDR; iaddr += iaddr) {
ret = test_ecc(iaddr);
if (ret)
break;
}
/*
* Clear possible errors resulting from ECC testing. (If not done, we
* we could get an interrupt later on when exceptions are enabled.)
*/
set_mcsr(get_mcsr());
debug("ecc_post_test() returning %d\n", ret);
return ret;
}
#endif /* CONFIG_POST & CONFIG_SYS_POST_ECC */
#endif /* defined(CONFIG_440EPX) || defined(CONFIG_440GRX) */
|
1001-study-uboot
|
post/cpu/ppc4xx/denali_ecc.c
|
C
|
gpl3
| 7,672
|
#
# (C) Copyright 2002-2007
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(OBJTREE)/include/autoconf.mk
LIB = libpostmpc83xx.o
AOBJS-$(CONFIG_HAS_POST) +=
COBJS-$(CONFIG_HAS_POST) += ecc.o
include $(TOPDIR)/post/rules.mk
|
1001-study-uboot
|
post/cpu/mpc83xx/Makefile
|
Makefile
|
gpl3
| 1,022
|
/*
* (C) Copyright 2010
* Eastman Kodak Company, <www.kodak.com>
* Michael Zaidman, <michael.zaidman@kodak.com>
*
* The code is based on the cpu/mpc83xx/ecc.c written by
* Dave Liu <daveliu@freescale.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <mpc83xx.h>
#include <watchdog.h>
#include <asm/io.h>
#include <post.h>
#if CONFIG_POST & CONFIG_SYS_POST_ECC
/*
* We use the RAW I/O accessors where possible in order to
* achieve performance goal, since the test's execution time
* affects the board start up time.
*/
static inline void ecc_clear(ddr83xx_t *ddr)
{
/* Clear capture registers */
__raw_writel(0, &ddr->capture_address);
__raw_writel(0, &ddr->capture_data_hi);
__raw_writel(0, &ddr->capture_data_lo);
__raw_writel(0, &ddr->capture_ecc);
__raw_writel(0, &ddr->capture_attributes);
/* Clear SBEC and set SBET to 1 */
out_be32(&ddr->err_sbe, 1 << ECC_ERROR_MAN_SBET_SHIFT);
/* Clear Error Detect register */
out_be32(&ddr->err_detect, ECC_ERROR_DETECT_MME |\
ECC_ERROR_DETECT_MBE |\
ECC_ERROR_DETECT_SBE |\
ECC_ERROR_DETECT_MSE);
isync();
}
int ecc_post_test(int flags)
{
int ret = 0;
int int_state;
int errbit;
u32 pattern[2], writeback[2], retval[2];
ddr83xx_t *ddr = &((immap_t *)CONFIG_SYS_IMMR)->ddr;
volatile u64 *addr = (u64 *)CONFIG_SYS_POST_ECC_START_ADDR;
/* The pattern is written into memory to generate error */
pattern[0] = 0xfedcba98UL;
pattern[1] = 0x76543210UL;
/* After injecting error, re-initialize the memory with the value */
writeback[0] = ~pattern[0];
writeback[1] = ~pattern[1];
/* Check if ECC is enabled */
if (__raw_readl(&ddr->err_disable) & ECC_ERROR_ENABLE) {
debug("DDR's ECC is not enabled, skipping the ECC POST.\n");
return 0;
}
int_state = disable_interrupts();
icache_enable();
#ifdef CONFIG_DDR_32BIT
/* It seems like no one really uses the CONFIG_DDR_32BIT mode */
#error "Add ECC POST support for CONFIG_DDR_32BIT here!"
#else
for (addr = (u64*)CONFIG_SYS_POST_ECC_START_ADDR, errbit=0;
addr < (u64*)CONFIG_SYS_POST_ECC_STOP_ADDR; addr++, errbit++ ) {
WATCHDOG_RESET();
ecc_clear(ddr);
/* Enable error injection */
setbits_be32(&ddr->ecc_err_inject, ECC_ERR_INJECT_EIEN);
sync();
isync();
/* Set bit to be injected */
if (errbit < 32) {
__raw_writel(1 << errbit, &ddr->data_err_inject_lo);
__raw_writel(0, &ddr->data_err_inject_hi);
} else {
__raw_writel(0, &ddr->data_err_inject_lo);
__raw_writel(1<<(errbit-32), &ddr->data_err_inject_hi);
}
sync();
isync();
/* Write memory location injecting SBE */
ppcDWstore((u32*)addr, pattern);
sync();
/* Disable error injection */
clrbits_be32(&ddr->ecc_err_inject, ECC_ERR_INJECT_EIEN);
sync();
isync();
/* Data read should generate SBE */
ppcDWload((u32*)addr, retval);
sync();
if (!(__raw_readl(&ddr->err_detect) & ECC_ERROR_DETECT_SBE) ||
(__raw_readl(&ddr->data_err_inject_hi) !=
(__raw_readl(&ddr->capture_data_hi) ^ pattern[0])) ||
(__raw_readl(&ddr->data_err_inject_lo) !=
(__raw_readl(&ddr->capture_data_lo) ^ pattern[1]))) {
post_log("ECC failed to detect SBE error at %08x, "
"SBE injection mask %08x-%08x, wrote "
"%08x-%08x, read %08x-%08x\n", addr,
ddr->data_err_inject_hi,
ddr->data_err_inject_lo,
pattern[0], pattern[1],
retval[0], retval[1]);
printf("ERR_DETECT Reg: %08x\n", ddr->err_detect);
printf("ECC CAPTURE_DATA Reg: %08x-%08x\n",
ddr->capture_data_hi, ddr->capture_data_lo);
ret = 1;
break;
}
/* Re-initialize the ECC memory */
ppcDWstore((u32*)addr, writeback);
sync();
isync();
errbit %= 63;
}
#endif /* !CONFIG_DDR_32BIT */
ecc_clear(ddr);
icache_disable();
if (int_state)
enable_interrupts();
return ret;
}
#endif
|
1001-study-uboot
|
post/cpu/mpc83xx/ecc.c
|
C
|
gpl3
| 4,538
|
/*
* (C) Copyright 2010 DENX Software Engineering,
* Anatolij Gustschin, agust@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*
* Co-Processor communication POST
*/
#include <common.h>
#include <post.h>
#include <serial.h>
#if defined(CONFIG_SERIAL_MULTI)
/*
* Actually the termination sequence of the coprocessor
* commands is "\r\n" (CR LF), but here we use a side effect of
* the putc() routine of the serial driver which checks for LF
* and sends CR before sending LF. Therefore the termination
* sequence in the command below is only "\n".
* "alive" string is the coprocessor response for ping command
* and not a command, therefore it is terminated with "\r\n".
*/
char alive[] = "$AL;38\r\n";
char ping[] = "$PI;2C\n";
int coprocessor_post_test(int flags)
{
struct stdio_dev *cop_port;
int ret;
char buf[10];
/* Test IO Coprocessor communication */
cop_port = open_port(4, CONFIG_SYS_PDM360NG_COPROC_BAUDRATE);
if (!cop_port)
return -1;
write_port(cop_port, ping);
udelay(CONFIG_SYS_PDM360NG_COPROC_READ_DELAY);
memset(buf, 0, sizeof(buf));
ret = read_port(cop_port, buf, sizeof(buf));
close_port(4);
if (ret <= 0) {
post_log("Error: Can't read IO Coprocessor port.\n");
return -1;
}
if (strcmp(buf, alive)) {
post_log("Error: IO-Cop. resp.: %s\n", buf);
return -1;
}
/* Test WD Coprocessor communication */
cop_port = open_port(1, CONFIG_SYS_PDM360NG_COPROC_BAUDRATE);
if (!cop_port) {
post_log("Error: Can't open WD Coprocessor port.\n");
return -1;
}
write_port(cop_port, ping);
udelay(CONFIG_SYS_PDM360NG_COPROC_READ_DELAY);
memset(buf, 0, sizeof(buf));
ret = read_port(cop_port, buf, sizeof(buf));
close_port(1);
if (ret <= 0) {
post_log("Error: Can't read WD Coprocessor port.\n");
return -1;
}
if (strcmp(buf, alive)) {
post_log("Error: WD-Cop. resp.: %s\n", buf);
return -1;
}
return 0;
}
#endif /* CONFIG_SERIAL_MULTI */
|
1001-study-uboot
|
post/board/pdm360ng/coproc_com.c
|
C
|
gpl3
| 2,675
|
#
# (C) Copyright 2010 DENX Software Engineering
# Anatolij Gustschin, agust@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(OBJTREE)/include/autoconf.mk
LIB = libpostpdm360ng.o
COBJS-$(CONFIG_HAS_POST) += coproc_com.o
include $(TOPDIR)/post/rules.mk
|
1001-study-uboot
|
post/board/pdm360ng/Makefile
|
Makefile
|
gpl3
| 1,004
|
/*
* (C) Copyright 2008 Dmitry Rakhchev, EmCraft Systems, rda@emcraft.com
*
* Developed for DENX Software Engineering GmbH
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
/* This test attempts to verify board GDC. A scratch register tested, then
* simple memory test (get_ram_size()) run over GDC memory.
*/
#include <post.h>
#include <watchdog.h>
#include <asm/io.h>
#include <video.h>
DECLARE_GLOBAL_DATA_PTR;
#define GDC_SCRATCH_REG 0xC1FF8044
#define GDC_VERSION_REG 0xC1FF8084
#define GDC_HOST_BASE 0xC1FC0000
#define GDC_RAM_START 0xC0000000
#define GDC_RAM_END (GDC_HOST_BASE - 1)
#define GDC_RAM_SIZE (GDC_RAM_END - GDC_RAM_START)
#if CONFIG_POST & CONFIG_SYS_POST_BSPEC4
const static unsigned long pattern[] = {
0xffffffff,
0xaaaaaaaa,
0xcccccccc,
0xf0f0f0f0,
0xff00ff00,
0xffff0000,
0x0000ffff,
0x00ff00ff,
0x0f0f0f0f,
0x33333333,
0x55555555,
0x00000000
};
const static unsigned long otherpattern = 0x01234567;
/* test write/read og a given LIME Register */
static int gdc_test_reg_one(uint value)
{
uint read_value;
/* write test pattern */
out_be32((void *)GDC_SCRATCH_REG, value);
/* read other location (protect against data lines capacity) */
in_be32((void *)GDC_RAM_START);
/* verify test pattern */
read_value = in_be32((void *)GDC_SCRATCH_REG);
if (read_value != value) {
post_log("GDC SCRATCH test failed write %08X, read %08X\n",
value, read_value);
}
return (read_value != value);
}
/* test with a given static 32 bit pattern in a given memory addressrange */
static int gdc_post_test1(ulong *start, ulong size, ulong val)
{
int ret = 0;
ulong i = 0;
ulong *mem = start;
ulong readback;
for (i = 0; i < size / sizeof(ulong); i++) {
mem[i] = val;
if (i % 1024 == 0)
WATCHDOG_RESET();
}
for (i = 0; i < size / sizeof(ulong); i++) {
readback = mem[i];
if (readback != val) {
post_log("GDC Memory error at %08x, "
"wrote %08x, read %08x !\n",
mem + i, val, readback);
ret = -1;
break;
}
if (i % 1024 == 0)
WATCHDOG_RESET();
}
return ret;
}
/* test with dynamic 32 bit pattern in a given memory addressrange */
static int gdc_post_test2(ulong *start, ulong size)
{
int ret = 0;
ulong i = 0;
ulong *mem = start;
ulong readback;
for (i = 0; i < size / sizeof(ulong); i++) {
mem[i] = 1 << (i % 32);
if (i % 1024 == 0)
WATCHDOG_RESET();
}
for (i = 0; i < size / sizeof(ulong); i++) {
readback = mem[i];
if (readback != 1 << (i % 32)) {
post_log("GDC Memory error at %08x, "
"wrote %08x, read %08x !\n",
mem + i, 1 << (i % 32), readback);
ret = -1;
break;
}
if (i % 1024 == 0)
WATCHDOG_RESET();
}
return ret;
}
/* test with dynamic 32 bit pattern in a given memory addressrange */
static int gdc_post_test3(ulong *start, ulong size)
{
int ret = 0;
ulong i = 0;
ulong *mem = start;
ulong readback;
for (i = 0; i < size / sizeof(ulong); i++) {
mem[i] = i;
if (i % 1024 == 0)
WATCHDOG_RESET();
}
for (i = 0; i < size / sizeof(ulong); i++) {
readback = mem[i];
if (readback != i) {
post_log("GDC Memory error at %08x, "
"wrote %08x, read %08x !\n",
mem + i, i, readback);
ret = -1;
break;
}
if (i % 1024 == 0)
WATCHDOG_RESET();
}
return ret;
}
/* test with dynamic 32 bit pattern in a given memory addressrange */
static int gdc_post_test4(ulong *start, ulong size)
{
int ret = 0;
ulong i = 0;
ulong *mem = start;
ulong readback;
for (i = 0; i < size / sizeof(ulong); i++) {
mem[i] = ~i;
if (i % 1024 == 0)
WATCHDOG_RESET();
}
for (i = 0; i < size / sizeof(ulong); i++) {
readback = mem[i];
if (readback != ~i) {
post_log("GDC Memory error at %08x, "
"wrote %08x, read %08x !\n",
mem + i, ~i, readback);
ret = -1;
break;
}
if (i % 1024 == 0)
WATCHDOG_RESET();
}
return ret;
}
/* do some patterntests in a given addressrange */
int gdc_mem_test(ulong *start, ulong size)
{
int ret = 0;
/*
* check addressrange and do different static and dynamic
* pattern tests with it.
*/
if (((void *)start) + size <= (void *)GDC_RAM_END) {
if (ret == 0)
ret = gdc_post_test1(start, size, 0x00000000);
if (ret == 0)
ret = gdc_post_test1(start, size, 0xffffffff);
if (ret == 0)
ret = gdc_post_test1(start, size, 0x55555555);
if (ret == 0)
ret = gdc_post_test1(start, size, 0xaaaaaaaa);
if (ret == 0)
ret = gdc_post_test2(start, size);
if (ret == 0)
ret = gdc_post_test3(start, size);
if (ret == 0)
ret = gdc_post_test4(start, size);
}
return ret;
}
/* test function of gdc memory addresslines*/
static int gdc_post_addrline(ulong *address, ulong *base, ulong size)
{
ulong *target;
ulong *end;
ulong readback = 0;
ulong xor = 0;
int ret = 0;
end = (ulong *)((ulong)base + size);
for (xor = sizeof(long); xor > 0; xor <<= 1) {
target = (ulong *)((ulong)address ^ xor);
if ((target >= base) && (target < end)) {
*address = ~*target;
readback = *target;
}
if (readback == *address) {
post_log("GDC Memory (address line) error at %08x"
"XOR value %08x !\n",
address, target , xor);
ret = -1;
break;
}
}
return ret;
}
static int gdc_post_dataline(ulong *address)
{
unsigned long temp32 = 0;
int i = 0;
int ret = 0;
for (i = 0; i < ARRAY_SIZE(pattern); i++) {
*address = pattern[i];
/*
* Put a different pattern on the data lines: otherwise they
* may float long enough to read back what we wrote.
*/
*(address + 1) = otherpattern;
temp32 = *address;
if (temp32 != pattern[i]){
post_log("GDC Memory (date line) error at %08x, "
"wrote %08x, read %08x !\n",
address, pattern[i], temp32);
ret = 1;
}
}
return ret;
}
/* Verify GDC, get memory size, verify GDC memory */
int gdc_post_test(int flags)
{
uint old_value;
int i = 0;
int ret = 0;
post_log("\n");
old_value = in_be32((void *)GDC_SCRATCH_REG);
/*
* GPIOC2 register behaviour: the LIME graphics processor has a
* maximum of 5 GPIO ports that can be used in this hardware
* configuration. Thus only the bits for these 5 GPIOs can be
* activated in the GPIOC2 register. All other bits will always be
* read as zero.
*/
if (gdc_test_reg_one(0x00150015))
ret = 1;
if (gdc_test_reg_one(0x000A000A))
ret = 1;
out_be32((void *)GDC_SCRATCH_REG, old_value);
old_value = in_be32((void *)GDC_VERSION_REG);
post_log("GDC chip version %u.%u, year %04X\n",
(old_value >> 8) & 0xFF, old_value & 0xFF,
(old_value >> 16) & 0xFFFF);
old_value = get_ram_size((void *)GDC_RAM_START,
0x02000000);
debug("GDC RAM size (ist): %d bytes\n", old_value);
debug("GDC RAM size (soll): %d bytes\n", GDC_RAM_SIZE);
post_log("GDC RAM size: %d bytes\n", old_value);
/* Test SDRAM datalines */
if (gdc_post_dataline((ulong *)GDC_RAM_START)) {
ret = 1;
goto out;
}
WATCHDOG_RESET();
/* Test SDRAM adresslines */
if (gdc_post_addrline((ulong *)GDC_RAM_START,
(ulong *)GDC_RAM_START, GDC_RAM_SIZE)) {
ret = 1;
goto out;
}
WATCHDOG_RESET();
if (gdc_post_addrline((ulong *)GDC_RAM_END - sizeof(long),
(ulong *)GDC_RAM_START, GDC_RAM_SIZE)) {
ret = 1;
goto out;
}
WATCHDOG_RESET();
/* memory pattern test */
debug("GDC Memory test (flags %8x:%8x)\n", flags,
POST_SLOWTEST | POST_MANUAL);
if (flags & POST_MANUAL) {
debug("Full memory test\n");
if (gdc_mem_test((ulong *)GDC_RAM_START, GDC_RAM_SIZE)) {
ret = 1;
goto out;
}
/* load splashscreen again */
} else {
debug("smart memory test\n");
for (i = 0; i < (GDC_RAM_SIZE >> 20) && ret == 0; i++) {
if (ret == 0)
ret = gdc_mem_test((ulong *)(GDC_RAM_START +
(i << 20)),
0x800);
if (ret == 0)
ret = gdc_mem_test((ulong *)(GDC_RAM_START +
(i << 20) + 0xff800),
0x800);
}
}
WATCHDOG_RESET();
out:
return ret;
}
#endif /* CONFIG_POST & CONFIG_SYS_POST_BSPEC4 */
|
1001-study-uboot
|
post/board/lwmon5/gdc.c
|
C
|
gpl3
| 8,669
|
/*
* (C) Copyright 2008 Dmitry Rakhchev, EmCraft Systems, rda@emcraft.com
*
* Developed for DENX Software Engineering GmbH
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <post.h>
#if CONFIG_POST & CONFIG_SYS_POST_DSP
#include <asm/io.h>
/* This test verifies DSP status bits in FPGA */
DECLARE_GLOBAL_DATA_PTR;
#define DSP_STATUS_REG 0xC4000008
#define FPGA_STATUS_REG 0xC400000C
int dsp_post_test(int flags)
{
uint old_value;
uint read_value;
int ret;
/* momorize fpga status */
old_value = in_be32((void *)FPGA_STATUS_REG);
/* enable outputs */
out_be32((void *)FPGA_STATUS_REG, 0x30);
/* generate sync signal */
out_be32((void *)DSP_STATUS_REG, 0x300);
udelay(5);
out_be32((void *)DSP_STATUS_REG, 0);
udelay(500);
/* read status */
ret = 0;
read_value = in_be32((void *)DSP_STATUS_REG) & 0x3;
if (read_value != 0x03) {
post_log("\nDSP status read %08X\n", read_value);
ret = 1;
}
/* restore fpga status */
out_be32((void *)FPGA_STATUS_REG, old_value);
return ret;
}
#endif /* CONFIG_POST & CONFIG_SYS_POST_DSP */
|
1001-study-uboot
|
post/board/lwmon5/dsp.c
|
C
|
gpl3
| 1,846
|
/*
* (C) Copyright 2008 Dmitry Rakhchev, EmCraft Systems, rda@emcraft.com
*
* Developed for DENX Software Engineering GmbH
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
/* This test performs testing of FPGA SCRATCH register,
* gets FPGA version and run get_ram_size() on FPGA memory
*/
#include <post.h>
#include <watchdog.h>
#include <asm/io.h>
DECLARE_GLOBAL_DATA_PTR;
#define FPGA_SCRATCH_REG 0xC4000050
#define FPGA_VERSION_REG 0xC4000040
#define FPGA_RAM_START 0xC4200000
#define FPGA_RAM_END 0xC4203FFF
#define FPGA_STAT 0xC400000C
#define FPGA_BUFFER 0x00800000
#define FPGA_RAM_SIZE (FPGA_RAM_END - FPGA_RAM_START + 1)
#if CONFIG_POST & CONFIG_SYS_POST_BSPEC3
const static unsigned long pattern[] = {
0xffffffff,
0xaaaaaaaa,
0xcccccccc,
0xf0f0f0f0,
0xff00ff00,
0xffff0000,
0x0000ffff,
0x00ff00ff,
0x0f0f0f0f,
0x33333333,
0x55555555,
0x00000000,
};
const static unsigned long otherpattern = 0x01234567;
static int one_scratch_test(uint value)
{
uint read_value;
int ret = 0;
out_be32((void *)FPGA_SCRATCH_REG, value);
/* read other location (protect against data lines capacity) */
ret = in_be16((void *)FPGA_VERSION_REG);
/* verify test pattern */
read_value = in_be32((void *)FPGA_SCRATCH_REG);
if (read_value != value) {
post_log("FPGA SCRATCH test failed write %08X, read %08X\n",
value, read_value);
ret = -1;
}
return ret;
}
static int fpga_post_test1(ulong *start, ulong size, ulong val)
{
int ret = 0;
ulong i = 0;
ulong *mem = start;
ulong readback;
for (i = 0; i < size / sizeof(ulong); i++) {
mem[i] = val;
if (i % 1024 == 0)
WATCHDOG_RESET();
}
for (i = 0; i < size / sizeof(ulong); i++) {
readback = mem[i];
if (readback != val) {
post_log("FPGA Memory error at %08x, "
"wrote %08x, read %08x !\n",
mem + i, val, readback);
ret = -1;
break;
}
if (i % 1024 == 0)
WATCHDOG_RESET();
}
return ret;
}
static int fpga_post_test2(ulong *start, ulong size)
{
int ret = 0;
ulong i = 0;
ulong *mem = start;
ulong readback;
for (i = 0; i < size / sizeof(ulong); i++) {
mem[i] = 1 << (i % 32);
if (i % 1024 == 0)
WATCHDOG_RESET();
}
for (i = 0; i < size / sizeof(ulong); i++) {
readback = mem[i];
if (readback != 1 << (i % 32)) {
post_log("FPGA Memory error at %08x, "
"wrote %08x, read %08x !\n",
mem + i, 1 << (i % 32), readback);
ret = -1;
break;
}
if (i % 1024 == 0)
WATCHDOG_RESET();
}
return ret;
}
static int fpga_post_test3(ulong *start, ulong size)
{
int ret = 0;
ulong i = 0;
ulong *mem = start;
ulong readback;
for (i = 0; i < size / sizeof(ulong); i++) {
mem[i] = i;
if (i % 1024 == 0)
WATCHDOG_RESET();
}
for (i = 0; i < size / sizeof(ulong); i++) {
readback = mem[i];
if (readback != i) {
post_log("FPGA Memory error at %08x, "
"wrote %08x, read %08x !\n",
mem + i, i, readback);
ret = -1;
break;
}
if (i % 1024 == 0)
WATCHDOG_RESET();
}
return ret;
}
static int fpga_post_test4(ulong *start, ulong size)
{
int ret = 0;
ulong i = 0;
ulong *mem = start;
ulong readback;
for (i = 0; i < size / sizeof(ulong); i++) {
mem[i] = ~i;
if (i % 1024 == 0)
WATCHDOG_RESET();
}
for (i = 0; i < size / sizeof(ulong); i++) {
readback = mem[i];
if (readback != ~i) {
post_log("FPGA Memory error at %08x, "
"wrote %08x, read %08x !\n",
mem + i, ~i, readback);
ret = -1;
break;
}
if (i % 1024 == 0)
WATCHDOG_RESET();
}
return ret;
}
/* FPGA Memory-pattern-test */
static int fpga_mem_test(void)
{
int ret = 0;
ulong* start = (ulong *)FPGA_RAM_START;
ulong size = FPGA_RAM_SIZE;
if (ret == 0)
ret = fpga_post_test1(start, size, 0x00000000);
if (ret == 0)
ret = fpga_post_test1(start, size, 0xffffffff);
if (ret == 0)
ret = fpga_post_test1(start, size, 0x55555555);
if (ret == 0)
ret = fpga_post_test1(start, size, 0xaaaaaaaa);
WATCHDOG_RESET();
if (ret == 0)
ret = fpga_post_test2(start, size);
if (ret == 0)
ret = fpga_post_test3(start, size);
if (ret == 0)
ret = fpga_post_test4(start, size);
return ret;
}
/* Verify FPGA addresslines */
static int fpga_post_addrline(ulong *address, ulong *base, ulong size)
{
unsigned long *target;
unsigned long *end;
unsigned long readback;
unsigned long xor;
int ret = 0;
end = (ulong *)((ulong)base + size);
xor = 0;
for (xor = sizeof(ulong); xor > 0; xor <<= 1) {
target = (ulong*)((ulong)address ^ xor);
if ((target >= base) && (target < end)) {
*address = ~*target;
readback = *target;
if (readback == *address) {
post_log("Memory (address line) error at %08x"
"XOR value %08x !\n",
address, target, xor);
ret = -1;
break;
}
}
}
return ret;
}
/* Verify FPGA addresslines */
static int fpga_post_dataline(ulong *address)
{
unsigned long temp32 = 0;
int i = 0;
int ret = 0;
for (i = 0; i < ARRAY_SIZE(pattern); i++) {
*address = pattern[i];
/*
* Put a different pattern on the data lines: otherwise they
* may float long enough to read back what we wrote.
*/
*(address + 1) = otherpattern;
temp32 = *address;
if (temp32 != pattern[i]){
post_log("Memory (date line) error at %08x, "
"wrote %08x, read %08x !\n",
address, pattern[i], temp32);
ret = 1;
}
}
return ret;
}
/* Verify FPGA, get version & memory size */
int fpga_post_test(int flags)
{
uint old_value;
uint version;
uint read_value;
int ret = 0;
post_log("\n");
old_value = in_be32((void *)FPGA_SCRATCH_REG);
if (one_scratch_test(0x55555555))
ret = 1;
if (one_scratch_test(0xAAAAAAAA))
ret = 1;
out_be32((void *)FPGA_SCRATCH_REG, old_value);
version = in_be32((void *)FPGA_VERSION_REG);
post_log("FPGA version %u.%u\n",
(version >> 8) & 0xFF, version & 0xFF);
/* Enable write to FPGA RAM */
out_be32((void *)FPGA_STAT, in_be32((void *)FPGA_STAT) | 0x1000);
/* get RAM size */
read_value = get_ram_size((void *)CONFIG_SYS_FPGA_BASE_1, FPGA_RAM_SIZE);
post_log("FPGA RAM size %d bytes\n", read_value);
WATCHDOG_RESET();
/* copy fpga memory to DDR2 RAM*/
memcpy((void *)FPGA_BUFFER,(void *)FPGA_RAM_START, FPGA_RAM_SIZE);
WATCHDOG_RESET();
/* Test datalines */
if (fpga_post_dataline((ulong *)FPGA_RAM_START)) {
ret = 1;
goto out;
}
WATCHDOG_RESET();
/* Test addresslines */
if (fpga_post_addrline((ulong *)FPGA_RAM_START,
(ulong *)FPGA_RAM_START, FPGA_RAM_SIZE)) {
ret = 1;
goto out;
}
WATCHDOG_RESET();
if (fpga_post_addrline((ulong *)FPGA_RAM_END - sizeof(long),
(ulong *)FPGA_RAM_START, FPGA_RAM_SIZE)) {
ret = 1;
goto out;
}
WATCHDOG_RESET();
/* Memory Pattern Test */
if (fpga_mem_test()) {
ret = 1;
goto out;
}
WATCHDOG_RESET();
/* restore memory */
memcpy((void *)FPGA_RAM_START,(void *)FPGA_BUFFER, FPGA_RAM_SIZE);
WATCHDOG_RESET();
out:
/* Disable write to RAM */
out_be32((void *)FPGA_STAT, in_be32((void *)FPGA_STAT) & 0xEFFF);
return ret;
}
#endif /* CONFIG_POST & CONFIG_SYS_POST_BSPEC3 */
|
1001-study-uboot
|
post/board/lwmon5/fpga.c
|
C
|
gpl3
| 7,777
|
/*
* (C) Copyright 2008 Dmitry Rakhchev, EmCraft Systems, rda@emcraft.com
*
* Developed for DENX Software Engineering GmbH
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
/* This test verifies if the reason of last reset was an abnormal voltage
* condition, than it performs watchdog test, measuing time required to
* trigger watchdog reset.
*/
#include <post.h>
#if CONFIG_POST & CONFIG_SYS_POST_WATCHDOG
#include <watchdog.h>
#include <asm/ppc4xx-gpio.h>
#include <asm/io.h>
static uint watchdog_magic_read(void)
{
return in_be32((void *)CONFIG_SYS_WATCHDOG_FLAGS_ADDR) &
CONFIG_SYS_WATCHDOG_MAGIC_MASK;
}
static void watchdog_magic_write(uint value)
{
out_be32((void *)CONFIG_SYS_WATCHDOG_FLAGS_ADDR, value |
(in_be32((void *)CONFIG_SYS_WATCHDOG_FLAGS_ADDR) &
~CONFIG_SYS_WATCHDOG_MAGIC_MASK));
}
int sysmon1_post_test(int flags)
{
if (gpio_read_in_bit(CONFIG_SYS_GPIO_SYSMON_STATUS) == 0) {
/*
* 3.1. GPIO62 is low
* Assuming system voltage failure.
*/
post_log("sysmon1 Abnormal voltage detected (GPIO62)\n");
post_log("POST sysmon1 FAILED\n");
return 1;
} else {
post_log("sysmon1 PASSED\n");
}
return 0;
}
int lwmon5_watchdog_post_test(int flags)
{
/* On each reset scratch register 1 should be tested,
* but first test GPIO62:
*/
if (!(flags & POST_MANUAL) && sysmon1_post_test(flags)) {
/* 3.1. GPIO62 is low
* Assuming system voltage failure.
*/
/* 3.1.1. Set scratch register 1 to 0x0000xxxx */
watchdog_magic_write(0);
/* 3.1.2. Mark test as failed due to voltage?! */
return 1;
}
if (watchdog_magic_read() != CONFIG_SYS_WATCHDOG_MAGIC) {
/* 3.2. Scratch register 1 differs from magic value 0x1248xxxx
* Assuming PowerOn
*/
int ints;
ulong base;
ulong time;
/* 3.2.1. Set magic value to scratch register */
watchdog_magic_write(CONFIG_SYS_WATCHDOG_MAGIC);
ints = disable_interrupts ();
/* 3.2.2. strobe watchdog once */
WATCHDOG_RESET();
out_be32((void *)CONFIG_SYS_WATCHDOG_TIME_ADDR, 0);
/* 3.2.3. save time of strobe in scratch register 2 */
base = post_time_ms (0);
/* 3.2.4. Wait for 150 ms (enough for reset to happen) */
while ((time = post_time_ms (base)) < 150)
out_be32((void *)CONFIG_SYS_WATCHDOG_TIME_ADDR, time);
if (ints)
enable_interrupts ();
/* 3.2.5. Reset didn't happen. - Set 0x0000xxxx
* into scratch register 1
*/
watchdog_magic_write(0);
/* 3.2.6. Mark test as failed. */
post_log("hw watchdog time : %u ms, failed ", time);
return 2;
} else {
/* 3.3. Scratch register matches magic value 0x1248xxxx
* Assume this is watchdog-initiated reset
*/
ulong time;
/* 3.3.1. So, the test succeed, save measured time to syslog. */
time = in_be32((void *)CONFIG_SYS_WATCHDOG_TIME_ADDR);
if (time > 90 ) { /* ms*/
post_log("hw watchdog time : %u ms, passed ", time);
/* 3.3.2. Set scratch register 1 to 0x0000xxxx */
watchdog_magic_write(0);
return 0;
} else {
/*test minimum watchdogtime */
post_log("hw watchdog time : %u ms, failed ", time);
return 2;
}
}
return -1;
}
#endif /* CONFIG_POST & CONFIG_SYS_POST_WATCHDOG */
|
1001-study-uboot
|
post/board/lwmon5/watchdog.c
|
C
|
gpl3
| 3,898
|
#
# (C) Copyright 2008 Dmitry Rakhchev, EmCraft Systems, rda@emcraft.com
#
# Developed for DENX Software Engineering GmbH
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
include $(OBJTREE)/include/autoconf.mk
LIB = libpostlwmon5.o
COBJS-$(CONFIG_HAS_POST) += sysmon.o watchdog.o dspic.o fpga.o dsp.o gdc.o
include $(TOPDIR)/post/rules.mk
|
1001-study-uboot
|
post/board/lwmon5/Makefile
|
Makefile
|
gpl3
| 1,070
|
/*
* (C) Copyright 2008 Dmitry Rakhchev, EmCraft Systems, rda@emcraft.com
*
* Developed for DENX Software Engineering GmbH
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <post.h>
#include <common.h>
/*
* SYSMON test
*
* This test performs the system hardware monitoring.
* The test passes when all the following voltages and temperatures
* are within allowed ranges:
*
* Temperature -40 .. +90 C
* +5V +4.50 .. +5.50 V
* +5V standby +3.50 .. +5.50 V
*
* LCD backlight is not enabled if temperature values are not within
* allowed ranges (-30 .. + 80). The brightness of backlite can be
* controlled by setting "brightness" enviroment variable. Default value is 50%
*
* See the list of all parameters in the sysmon_table below
*/
#include <post.h>
#include <watchdog.h>
#include <i2c.h>
#if defined(CONFIG_VIDEO)
#include <mb862xx.h>
#endif
#if CONFIG_POST & CONFIG_SYS_POST_SYSMON
DECLARE_GLOBAL_DATA_PTR;
/* from dspic.c */
extern int dspic_read(ushort reg, ushort *data);
#define REG_TEMPERATURE 0x12BC
#define REG_VOLTAGE_5V 0x12CA
#define REG_VOLTAGE_5V_STANDBY 0x12C6
#define TEMPERATURE_MIN (-40) /* degr. C */
#define TEMPERATURE_MAX (+90) /* degr. C */
#define TEMPERATURE_DISPLAY_MIN (-35) /* degr. C */
#define TEMPERATURE_DISPLAY_MAX (+85) /* degr. C */
#define VOLTAGE_5V_MIN (+4500) /* mV */
#define VOLTAGE_5V_MAX (+5500) /* mV */
#define VOLTAGE_5V_STANDBY_MIN (+3500) /* mV */
#define VOLTAGE_5V_STANDBY_MAX (+5500) /* mV */
typedef struct sysmon_s sysmon_t;
typedef struct sysmon_table_s sysmon_table_t;
static void sysmon_dspic_init(sysmon_t *this);
static int sysmon_dspic_read(sysmon_t *this, uint addr, int *val);
static int sysmon_dspic_read_sgn(sysmon_t *this, uint addr, int *val);
static void sysmon_backlight_disable(sysmon_table_t *this);
struct sysmon_s {
uchar chip;
void (*init)(sysmon_t *);
int (*read)(sysmon_t *, uint, int *);
};
static sysmon_t sysmon_dspic = {
CONFIG_SYS_I2C_DSPIC_IO_ADDR,
sysmon_dspic_init,
sysmon_dspic_read
};
static sysmon_t sysmon_dspic_sgn = {
CONFIG_SYS_I2C_DSPIC_IO_ADDR,
sysmon_dspic_init,
sysmon_dspic_read_sgn
};
static sysmon_t *sysmon_list[] = {
&sysmon_dspic,
NULL
};
struct sysmon_table_s {
char *name;
char *unit_name;
sysmon_t *sysmon;
void (*exec_before)(sysmon_table_t *);
void (*exec_after)(sysmon_table_t *);
int unit_precision;
int unit_div;
int unit_min;
int unit_max;
uint val_mask;
uint val_min;
uint val_max;
int val_valid;
uint val_min_alt;
uint val_max_alt;
int val_valid_alt;
uint addr;
};
static sysmon_table_t sysmon_table[] = {
{
"Temperature", " C", &sysmon_dspic, NULL, sysmon_backlight_disable,
1, 1, -32768, 32767, 0xFFFF,
0x8000 + TEMPERATURE_MIN, 0x8000 + TEMPERATURE_MAX, 0,
0x8000 + TEMPERATURE_DISPLAY_MIN, 0x8000 + TEMPERATURE_DISPLAY_MAX, 0,
REG_TEMPERATURE,
},
{
"+ 5 V", "V", &sysmon_dspic, NULL, NULL,
100, 1000, -0x8000, 0x7FFF, 0xFFFF,
0x8000 + VOLTAGE_5V_MIN, 0x8000 + VOLTAGE_5V_MAX, 0,
0x8000 + VOLTAGE_5V_MIN, 0x8000 + VOLTAGE_5V_MAX, 0,
REG_VOLTAGE_5V,
},
{
"+ 5 V standby", "V", &sysmon_dspic, NULL, NULL,
100, 1000, -0x8000, 0x7FFF, 0xFFFF,
0x8000 + VOLTAGE_5V_STANDBY_MIN, 0x8000 + VOLTAGE_5V_STANDBY_MAX, 0,
0x8000 + VOLTAGE_5V_STANDBY_MIN, 0x8000 + VOLTAGE_5V_STANDBY_MAX, 0,
REG_VOLTAGE_5V_STANDBY,
},
{
"Temperature", "°C", &sysmon_dspic_sgn, NULL, sysmon_backlight_disable,
1, 1, -32768, 32767, 0xFFFF,
0x8000 + TEMPERATURE_MIN, 0x8000 + TEMPERATURE_MAX, 0,
0x8000 + TEMPERATURE_DISPLAY_MIN, 0x8000 + TEMPERATURE_DISPLAY_MAX, 0,
REG_TEMPERATURE,
},
};
int sysmon_init_f(void)
{
sysmon_t **l;
for (l = sysmon_list; *l; l++)
(*l)->init(*l);
return 0;
}
void sysmon_reloc(void)
{
/* Do nothing for now, sysmon_reloc() is required by the sysmon post */
}
static char *sysmon_unit_value(sysmon_table_t *s, uint val)
{
static char buf[32];
char *p, sign;
int decimal, frac;
int unit_val;
unit_val = s->unit_min + (s->unit_max - s->unit_min) * val / s->val_mask;
if (val == -1)
return "I/O ERROR";
if (unit_val < 0) {
sign = '-';
unit_val = -unit_val;
} else {
sign = '+';
}
p = buf + sprintf(buf, "%c%2d", sign, unit_val / s->unit_div);
frac = unit_val % s->unit_div;
frac /= (s->unit_div / s->unit_precision);
decimal = s->unit_precision;
if (decimal != 1)
*p++ = '.';
for (decimal /= 10; decimal != 0; decimal /= 10)
*p++ = '0' + (frac / decimal) % 10;
strcpy(p, s->unit_name);
return buf;
}
static void sysmon_dspic_init(sysmon_t *this)
{
}
static int sysmon_dspic_read(sysmon_t *this, uint addr, int *val)
{
ushort data;
if (dspic_read(addr, &data) == 0){
/* To fit into the table range we should add 0x8000 */
*val = data + 0x8000;
return 0;
}
return -1;
}
static int sysmon_dspic_read_sgn(sysmon_t *this, uint addr, int *val)
{
ushort data;
if (dspic_read(addr, &data) == 0){
/* To fit into the table range we should add 0x8000 */
*val = (signed short)data + 0x8000;
return 0;
}
return -1;
}
static void sysmon_backlight_disable(sysmon_table_t *this)
{
#if defined(CONFIG_VIDEO)
board_backlight_switch(this->val_valid_alt);
#endif
}
int sysmon_post_test(int flags)
{
int res = 0;
sysmon_table_t * t;
int val;
for (t = sysmon_table; t < sysmon_table + ARRAY_SIZE(sysmon_table); t++) {
t->val_valid = 1;
if (t->exec_before)
t->exec_before(t);
if (t->sysmon->read(t->sysmon, t->addr, &val) != 0) {
t->val_valid = 0;
t->val_valid_alt = 0;
post_log(": read failed\n");
res = 1;
break;
}
if (t->val_valid != 0) {
t->val_valid = val >= t->val_min && val <= t->val_max;
t->val_valid_alt = val >= t->val_min_alt && val <= t->val_max_alt;
}
if (t->exec_after)
t->exec_after(t);
if ((!t->val_valid) || (flags)) {
post_log("\n\t%-17s = %-10s ", t->name, sysmon_unit_value(t, val));
post_log("allowed range");
post_log(" %-8s ..", sysmon_unit_value(t, t->val_min));
post_log(" %-8s", sysmon_unit_value(t, t->val_max));
post_log(" %s", t->val_valid ? "OK" : "FAIL");
}
if (!t->val_valid) {
res = 1;
break;
}
}
post_log("\n");
return res;
}
#endif /* CONFIG_POST & CONFIG_SYS_POST_SYSMON */
|
1001-study-uboot
|
post/board/lwmon5/sysmon.c
|
C
|
gpl3
| 6,988
|
/*
* (C) Copyright 2008 Dmitry Rakhchev, EmCraft Systems, rda@emcraft.com
*
* Developed for DENX Software Engineering GmbH
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
/* There are two tests for dsPIC currently implemented:
* 1. dsPIC ready test. Done in board_early_init_f(). Only result verified here.
* 2. dsPIC POST result test. This test gets dsPIC POST codes and version.
*/
#include <post.h>
#include <i2c.h>
#include <asm/io.h>
DECLARE_GLOBAL_DATA_PTR;
#define DSPIC_POST_ERROR_REG 0x800
#define DSPIC_SYS_ERROR_REG 0x802
#define DSPIC_SYS_VERSION_REG 0x804
#define DSPIC_FW_VERSION_REG 0x808
#if CONFIG_POST & CONFIG_SYS_POST_BSPEC1
/* Verify that dsPIC ready test done early at hw init passed ok */
int dspic_init_post_test(int flags)
{
if (in_be32((void *)CONFIG_SYS_DSPIC_TEST_ADDR) &
CONFIG_SYS_DSPIC_TEST_MASK) {
post_log("dsPIC init test failed\n");
return 1;
}
return 0;
}
#endif /* CONFIG_POST & CONFIG_SYS_POST_BSPEC1 */
#if CONFIG_POST & CONFIG_SYS_POST_BSPEC2
/* Read a register from the dsPIC. */
int dspic_read(ushort reg, ushort *data)
{
uchar buf[sizeof(*data)];
int rval;
if (i2c_read(CONFIG_SYS_I2C_DSPIC_IO_ADDR, reg, 2, buf, 2))
return -1;
rval = i2c_read(CONFIG_SYS_I2C_DSPIC_IO_ADDR, reg, sizeof(reg),
buf, sizeof(*data));
*data = (buf[0] << 8) | buf[1];
return rval;
}
/* Verify error codes regs, display version */
int dspic_post_test(int flags)
{
ushort data;
int ret = 0;
post_log("\n");
/* read dspic FW-Version */
if (dspic_read(DSPIC_FW_VERSION_REG, &data)) {
post_log("dsPIC: failed read FW-Version\n");
ret = 1;
} else {
post_log("dsPIC FW-Version: %u.%u\n",
(data >> 8) & 0xFF, data & 0xFF);
}
/* read dspic SYS-Version */
if (dspic_read(DSPIC_SYS_VERSION_REG, &data)) {
post_log("dsPIC: failed read version\n");
ret = 1;
} else {
post_log("dsPIC SYS-Version: %u.%u\n",
(data >> 8) & 0xFF, data & 0xFF);
}
/* read dspic POST error code */
if (dspic_read(DSPIC_POST_ERROR_REG, &data)) {
post_log("dsPIC: failed read POST code\n");
ret = 1;
} else {
post_log("dsPIC POST-ERROR code: 0x%04X\n", data);
}
/* read dspic SYS error code */
if ((data = dspic_read(DSPIC_SYS_ERROR_REG, &data))) {
post_log("dsPIC: failed read system error\n");
ret = 1;
} else {
post_log("dsPIC SYS-ERROR code: 0x%04X\n", data);
}
return ret;
}
#endif /* CONFIG_POST & CONFIG_SYS_POST_BSPEC2 */
|
1001-study-uboot
|
post/board/lwmon5/dspic.c
|
C
|
gpl3
| 3,194
|
/*
* (C) Copyright 2004
* Pantelis Antoniou, Intracom S.A. , panto@intracom.gr
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
/*
* CODEC test
*
* This test verifies the connection and performs a memory test
* on any connected codec(s). The meat of the work is done
* in the board specific function.
*/
#include <post.h>
#if CONFIG_POST & CONFIG_SYS_POST_CODEC
extern int board_post_codec(int flags);
int codec_post_test (int flags)
{
return board_post_codec(flags);
}
#endif /* CONFIG_POST & CONFIG_SYS_POST_CODEC */
|
1001-study-uboot
|
post/board/netta/codec.c
|
C
|
gpl3
| 1,305
|
/*
* (C) Copyright 2004
* Pantelis Antoniou, Intracom S.A. , panto@intracom.gr
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
/*
* DSP test
*
* This test verifies the connection and performs a memory test
* on any connected DSP(s). The meat of the work is done
* in the board specific function.
*/
#include <post.h>
#if CONFIG_POST & CONFIG_SYS_POST_DSP
extern int board_post_dsp(int flags);
int dsp_post_test (int flags)
{
return board_post_dsp(flags);
}
#endif /* CONFIG_POST & CONFIG_SYS_POST_DSP */
|
1001-study-uboot
|
post/board/netta/dsp.c
|
C
|
gpl3
| 1,291
|
#
# (C) Copyright 2002-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(OBJTREE)/include/autoconf.mk
LIB = libpostnetta.o
COBJS-$(CONFIG_HAS_POST) += codec.o dsp.o
include $(TOPDIR)/post/rules.mk
|
1001-study-uboot
|
post/board/netta/Makefile
|
Makefile
|
gpl3
| 1,000
|
#
# (C) Copyright 2002-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(OBJTREE)/include/autoconf.mk
LIB = libpostlwmon.o
COBJS-$(CONFIG_HAS_POST) += sysmon.o
include $(TOPDIR)/post/rules.mk
|
1001-study-uboot
|
post/board/lwmon/Makefile
|
Makefile
|
gpl3
| 995
|
/*
* (C) Copyright 2003
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <post.h>
#include <common.h>
/*
* SYSMON test
*
* This test performs the system hardware monitoring.
* The test passes when all the following voltages and temperatures
* are within allowed ranges:
*
* Board temperature
* Front temperature
* +3.3V CPU logic
* +5V logic
* +12V PCMCIA
* +12V CCFL
* +5V standby
*
* CCFL is not enabled if temperature values are not within allowed ranges
*
* See the list off all parameters in the sysmon_table below
*/
#include <post.h>
#include <watchdog.h>
#include <i2c.h>
#if CONFIG_POST & CONFIG_SYS_POST_SYSMON
DECLARE_GLOBAL_DATA_PTR;
static int sysmon_temp_invalid = 0;
/* #define DEBUG */
typedef struct sysmon_s sysmon_t;
typedef struct sysmon_table_s sysmon_table_t;
static void sysmon_lm87_init (sysmon_t * this);
static void sysmon_pic_init (sysmon_t * this);
static uint sysmon_i2c_read (sysmon_t * this, uint addr);
static uint sysmon_i2c_read_sgn (sysmon_t * this, uint addr);
static void sysmon_ccfl_disable (sysmon_table_t * this);
static void sysmon_ccfl_enable (sysmon_table_t * this);
struct sysmon_s
{
uchar chip;
void (*init)(sysmon_t *);
uint (*read)(sysmon_t *, uint);
};
static sysmon_t sysmon_lm87 =
{CONFIG_SYS_I2C_SYSMON_ADDR, sysmon_lm87_init, sysmon_i2c_read};
static sysmon_t sysmon_lm87_sgn =
{CONFIG_SYS_I2C_SYSMON_ADDR, sysmon_lm87_init, sysmon_i2c_read_sgn};
static sysmon_t sysmon_pic =
{CONFIG_SYS_I2C_PICIO_ADDR, sysmon_pic_init, sysmon_i2c_read};
static sysmon_t * sysmon_list[] =
{
&sysmon_lm87,
&sysmon_lm87_sgn,
&sysmon_pic,
NULL
};
struct sysmon_table_s
{
char * name;
char * unit_name;
sysmon_t * sysmon;
void (*exec_before)(sysmon_table_t *);
void (*exec_after)(sysmon_table_t *);
int unit_precision;
int unit_div;
int unit_min;
int unit_max;
uint val_mask;
uint val_min;
uint val_max;
int val_valid;
uint val_min_alt;
uint val_max_alt;
int val_valid_alt;
uint addr;
};
static sysmon_table_t sysmon_table[] =
{
{"Board temperature", " C", &sysmon_lm87_sgn, NULL, sysmon_ccfl_disable,
1, 1, -128, 127, 0xFF, 0x58, 0xD5, 0, 0x6C, 0xC6, 0, 0x27},
{"Front temperature", " C", &sysmon_lm87, NULL, sysmon_ccfl_disable,
1, 100, -27316, 8984, 0xFF, 0xA4, 0xFC, 0, 0xB2, 0xF1, 0, 0x29},
{"+3.3V CPU logic", "V", &sysmon_lm87, NULL, NULL,
100, 1000, 0, 4386, 0xFF, 0xB6, 0xC9, 0, 0xB6, 0xC9, 0, 0x22},
{"+ 5 V logic", "V", &sysmon_lm87, NULL, NULL,
100, 1000, 0, 6630, 0xFF, 0xB6, 0xCA, 0, 0xB6, 0xCA, 0, 0x23},
{"+12 V PCMCIA", "V", &sysmon_lm87, NULL, NULL,
100, 1000, 0, 15460, 0xFF, 0xBC, 0xD0, 0, 0xBC, 0xD0, 0, 0x21},
{"+12 V CCFL", "V", &sysmon_lm87, NULL, sysmon_ccfl_enable,
100, 1000, 0, 15900, 0xFF, 0xB6, 0xCA, 0, 0xB6, 0xCA, 0, 0x24},
{"+ 5 V standby", "V", &sysmon_pic, NULL, NULL,
100, 1000, 0, 6040, 0xFF, 0xC8, 0xDE, 0, 0xC8, 0xDE, 0, 0x7C},
};
static int sysmon_table_size = ARRAY_SIZE(sysmon_table);
static int conversion_done = 0;
int sysmon_init_f (void)
{
sysmon_t ** l;
ulong reg;
/* Power on CCFL, PCMCIA */
reg = pic_read (0x60);
reg |= 0x09;
pic_write (0x60, reg);
for (l = sysmon_list; *l; l++) {
(*l)->init(*l);
}
return 0;
}
void sysmon_reloc (void)
{
/* Do nothing for now, sysmon_reloc() is required by the sysmon post */
}
static char *sysmon_unit_value (sysmon_table_t *s, uint val)
{
static char buf[32];
int unit_val =
s->unit_min + (s->unit_max - s->unit_min) * val / s->val_mask;
char *p, sign;
int dec, frac;
if (val == -1) {
return "I/O ERROR";
}
if (unit_val < 0) {
sign = '-';
unit_val = -unit_val;
} else {
sign = '+';
}
p = buf + sprintf(buf, "%c%2d", sign, unit_val / s->unit_div);
frac = unit_val % s->unit_div;
frac /= (s->unit_div / s->unit_precision);
dec = s->unit_precision;
if (dec != 1) {
*p++ = '.';
}
for (dec /= 10; dec != 0; dec /= 10) {
*p++ = '0' + (frac / dec) % 10;
}
strcpy(p, s->unit_name);
return buf;
}
static void sysmon_lm87_init (sysmon_t * this)
{
uchar val;
/* Detect LM87 chip */
if (i2c_read(this->chip, 0x40, 1, &val, 1) || (val & 0x80) != 0 ||
i2c_read(this->chip, 0x3E, 1, &val, 1) || val != 0x02) {
printf("Error: LM87 not found at 0x%02X\n", this->chip);
return;
}
/* Configure pins 5,6 as AIN */
val = 0x03;
if (i2c_write(this->chip, 0x16, 1, &val, 1)) {
printf("Error: can't write LM87 config register\n");
return;
}
/* Start monitoring */
val = 0x01;
if (i2c_write(this->chip, 0x40, 1, &val, 1)) {
printf("Error: can't write LM87 config register\n");
return;
}
}
static void sysmon_pic_init (sysmon_t * this)
{
}
static uint sysmon_i2c_read (sysmon_t * this, uint addr)
{
uchar val;
uint res = i2c_read(this->chip, addr, 1, &val, 1);
return res == 0 ? val : -1;
}
static uint sysmon_i2c_read_sgn (sysmon_t * this, uint addr)
{
uchar val;
return i2c_read(this->chip, addr, 1, &val, 1) == 0 ?
128 + (signed char)val : -1;
}
static void sysmon_ccfl_disable (sysmon_table_t * this)
{
if (!this->val_valid_alt) {
sysmon_temp_invalid = 1;
}
}
static void sysmon_ccfl_enable (sysmon_table_t * this)
{
ulong reg;
if (!sysmon_temp_invalid) {
reg = pic_read (0x60);
reg |= 0x06;
pic_write (0x60, reg);
}
}
int sysmon_post_test (int flags)
{
int res = 0;
sysmon_table_t * t;
uint val;
/*
* The A/D conversion on the LM87 sensor takes 300 ms.
*/
if (! conversion_done) {
while (post_time_ms(gd->post_init_f_time) < 300) WATCHDOG_RESET ();
conversion_done = 1;
}
for (t = sysmon_table; t < sysmon_table + sysmon_table_size; t ++) {
if (t->exec_before) {
t->exec_before(t);
}
val = t->sysmon->read(t->sysmon, t->addr);
if (val != -1) {
t->val_valid = val >= t->val_min && val <= t->val_max;
t->val_valid_alt = val >= t->val_min_alt && val <= t->val_max_alt;
} else {
t->val_valid = 0;
t->val_valid_alt = 0;
}
if (t->exec_after) {
t->exec_after(t);
}
if ((!t->val_valid) || (flags & POST_MANUAL)) {
printf("%-17s = %-10s ", t->name, sysmon_unit_value(t, val));
printf("allowed range");
printf(" %-8s ..", sysmon_unit_value(t, t->val_min));
printf(" %-8s", sysmon_unit_value(t, t->val_max));
printf(" %s\n", t->val_valid ? "OK" : "FAIL");
}
if (!t->val_valid) {
res = -1;
}
}
return res;
}
#endif /* CONFIG_POST & CONFIG_SYS_POST_SYSMON */
|
1001-study-uboot
|
post/board/lwmon/sysmon.c
|
C
|
gpl3
| 7,222
|
/*
* (C) Copyright 2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <stdio_dev.h>
#include <watchdog.h>
#include <div64.h>
#include <post.h>
#ifdef CONFIG_SYS_POST_HOTKEYS_GPIO
#include <asm/gpio.h>
#endif
#ifdef CONFIG_LOGBUFFER
#include <logbuff.h>
#endif
DECLARE_GLOBAL_DATA_PTR;
#define POST_MAX_NUMBER 32
#define BOOTMODE_MAGIC 0xDEAD0000
int post_init_f(void)
{
int res = 0;
unsigned int i;
for (i = 0; i < post_list_size; i++) {
struct post_test *test = post_list + i;
if (test->init_f && test->init_f())
res = -1;
}
gd->post_init_f_time = post_time_ms(0);
if (!gd->post_init_f_time)
printf("%s: post_time_ms not implemented\n", __FILE__);
return res;
}
/*
* Supply a default implementation for post_hotkeys_pressed() for boards
* without hotkey support. We always return 0 here, so that the
* long-running tests won't be started.
*
* Boards with hotkey support can override this weak default function
* by defining one in their board specific code.
*/
int __post_hotkeys_pressed(void)
{
#ifdef CONFIG_SYS_POST_HOTKEYS_GPIO
int ret;
unsigned gpio = CONFIG_SYS_POST_HOTKEYS_GPIO;
ret = gpio_request(gpio, "hotkeys");
if (ret) {
printf("POST: gpio hotkey request failed\n");
return 0;
}
gpio_direction_input(gpio);
ret = gpio_get_value(gpio);
gpio_free(gpio);
return ret;
#endif
return 0; /* No hotkeys supported */
}
int post_hotkeys_pressed(void)
__attribute__((weak, alias("__post_hotkeys_pressed")));
void post_bootmode_init(void)
{
int bootmode = post_bootmode_get(0);
int newword;
if (post_hotkeys_pressed() && !(bootmode & POST_POWERTEST))
newword = BOOTMODE_MAGIC | POST_SLOWTEST;
else if (bootmode == 0)
newword = BOOTMODE_MAGIC | POST_POWERON;
else if (bootmode == POST_POWERON || bootmode == POST_SLOWTEST)
newword = BOOTMODE_MAGIC | POST_NORMAL;
else
/* Use old value */
newword = post_word_load() & ~POST_COLDBOOT;
if (bootmode == 0)
/* We are booting after power-on */
newword |= POST_COLDBOOT;
post_word_store(newword);
/* Reset activity record */
gd->post_log_word = 0;
gd->post_log_res = 0;
}
int post_bootmode_get(unsigned int *last_test)
{
unsigned long word = post_word_load();
int bootmode;
if ((word & 0xFFFF0000) != BOOTMODE_MAGIC)
return 0;
bootmode = word & 0x7F;
if (last_test && (bootmode & POST_POWERTEST))
*last_test = (word >> 8) & 0xFF;
return bootmode;
}
/* POST tests run before relocation only mark status bits .... */
static void post_log_mark_start(unsigned long testid)
{
gd->post_log_word |= testid;
}
static void post_log_mark_succ(unsigned long testid)
{
gd->post_log_res |= testid;
}
/* ... and the messages are output once we are relocated */
void post_output_backlog(void)
{
int j;
for (j = 0; j < post_list_size; j++) {
if (gd->post_log_word & (post_list[j].testid)) {
post_log("POST %s ", post_list[j].cmd);
if (gd->post_log_res & post_list[j].testid)
post_log("PASSED\n");
else {
post_log("FAILED\n");
show_boot_progress(-31);
}
}
}
}
static void post_bootmode_test_on(unsigned int last_test)
{
unsigned long word = post_word_load();
word |= POST_POWERTEST;
word |= (last_test & 0xFF) << 8;
post_word_store(word);
}
static void post_bootmode_test_off(void)
{
unsigned long word = post_word_load();
word &= ~POST_POWERTEST;
post_word_store(word);
}
#ifndef CONFIG_POST_SKIP_ENV_FLAGS
static void post_get_env_flags(int *test_flags)
{
int flag[] = { POST_POWERON, POST_NORMAL, POST_SLOWTEST,
POST_CRITICAL };
char *var[] = { "post_poweron", "post_normal", "post_slowtest",
"post_critical" };
int varnum = ARRAY_SIZE(var);
char list[128]; /* long enough for POST list */
char *name;
char *s;
int last;
int i, j;
for (i = 0; i < varnum; i++) {
if (getenv_f(var[i], list, sizeof(list)) <= 0)
continue;
for (j = 0; j < post_list_size; j++)
test_flags[j] &= ~flag[i];
last = 0;
name = list;
while (!last) {
while (*name && *name == ' ')
name++;
if (*name == 0)
break;
s = name + 1;
while (*s && *s != ' ')
s++;
if (*s == 0)
last = 1;
else
*s = 0;
for (j = 0; j < post_list_size; j++) {
if (strcmp(post_list[j].cmd, name) == 0) {
test_flags[j] |= flag[i];
break;
}
}
if (j == post_list_size)
printf("No such test: %s\n", name);
name = s + 1;
}
}
}
#endif
static void post_get_flags(int *test_flags)
{
int j;
for (j = 0; j < post_list_size; j++)
test_flags[j] = post_list[j].flags;
#ifndef CONFIG_POST_SKIP_ENV_FLAGS
post_get_env_flags(test_flags);
#endif
for (j = 0; j < post_list_size; j++)
if (test_flags[j] & POST_POWERON)
test_flags[j] |= POST_SLOWTEST;
}
void __show_post_progress(unsigned int test_num, int before, int result)
{
}
void show_post_progress(unsigned int, int, int)
__attribute__((weak, alias("__show_post_progress")));
static int post_run_single(struct post_test *test,
int test_flags, int flags, unsigned int i)
{
if ((flags & test_flags & POST_ALWAYS) &&
(flags & test_flags & POST_MEM)) {
WATCHDOG_RESET();
if (!(flags & POST_REBOOT)) {
if ((test_flags & POST_REBOOT) &&
!(flags & POST_MANUAL)) {
post_bootmode_test_on(
(gd->flags & GD_FLG_POSTFAIL) ?
POST_FAIL_SAVE | i : i);
}
if (test_flags & POST_PREREL)
post_log_mark_start(test->testid);
else
post_log("POST %s ", test->cmd);
}
show_post_progress(i, POST_BEFORE, POST_FAILED);
if (test_flags & POST_PREREL) {
if ((*test->test)(flags) == 0) {
post_log_mark_succ(test->testid);
show_post_progress(i, POST_AFTER, POST_PASSED);
} else {
show_post_progress(i, POST_AFTER, POST_FAILED);
if (test_flags & POST_CRITICAL)
gd->flags |= GD_FLG_POSTFAIL;
if (test_flags & POST_STOP)
gd->flags |= GD_FLG_POSTSTOP;
}
} else {
if ((*test->test)(flags) != 0) {
post_log("FAILED\n");
show_boot_progress(-32);
show_post_progress(i, POST_AFTER, POST_FAILED);
if (test_flags & POST_CRITICAL)
gd->flags |= GD_FLG_POSTFAIL;
if (test_flags & POST_STOP)
gd->flags |= GD_FLG_POSTSTOP;
} else {
post_log("PASSED\n");
show_post_progress(i, POST_AFTER, POST_PASSED);
}
}
if ((test_flags & POST_REBOOT) && !(flags & POST_MANUAL))
post_bootmode_test_off();
return 0;
} else {
return -1;
}
}
int post_run(char *name, int flags)
{
unsigned int i;
int test_flags[POST_MAX_NUMBER];
post_get_flags(test_flags);
if (name == NULL) {
unsigned int last;
if (gd->flags & GD_FLG_POSTSTOP)
return 0;
if (post_bootmode_get(&last) & POST_POWERTEST) {
if (last & POST_FAIL_SAVE) {
last &= ~POST_FAIL_SAVE;
gd->flags |= GD_FLG_POSTFAIL;
}
if (last < post_list_size &&
(flags & test_flags[last] & POST_ALWAYS) &&
(flags & test_flags[last] & POST_MEM)) {
post_run_single(post_list + last,
test_flags[last],
flags | POST_REBOOT, last);
for (i = last + 1; i < post_list_size; i++) {
if (gd->flags & GD_FLG_POSTSTOP)
break;
post_run_single(post_list + i,
test_flags[i],
flags, i);
}
}
} else {
for (i = 0; i < post_list_size; i++) {
if (gd->flags & GD_FLG_POSTSTOP)
break;
post_run_single(post_list + i,
test_flags[i],
flags, i);
}
}
return 0;
} else {
for (i = 0; i < post_list_size; i++) {
if (strcmp(post_list[i].cmd, name) == 0)
break;
}
if (i < post_list_size) {
WATCHDOG_RESET();
return post_run_single(post_list + i,
test_flags[i],
flags, i);
} else {
return -1;
}
}
}
static int post_info_single(struct post_test *test, int full)
{
if (test->flags & POST_MANUAL) {
if (full)
printf("%s - %s\n"
" %s\n", test->cmd, test->name, test->desc);
else
printf(" %-15s - %s\n", test->cmd, test->name);
return 0;
} else {
return -1;
}
}
int post_info(char *name)
{
unsigned int i;
if (name == NULL) {
for (i = 0; i < post_list_size; i++)
post_info_single(post_list + i, 0);
return 0;
} else {
for (i = 0; i < post_list_size; i++) {
if (strcmp(post_list[i].cmd, name) == 0)
break;
}
if (i < post_list_size)
return post_info_single(post_list + i, 1);
else
return -1;
}
}
int post_log(char *format, ...)
{
va_list args;
char printbuffer[CONFIG_SYS_PBSIZE];
va_start(args, format);
/* For this to work, printbuffer must be larger than
* anything we ever want to print.
*/
vsprintf(printbuffer, format, args);
va_end(args);
#ifdef CONFIG_LOGBUFFER
/* Send to the logbuffer */
logbuff_log(printbuffer);
#else
/* Send to the stdout file */
puts(printbuffer);
#endif
return 0;
}
#ifdef CONFIG_NEEDS_MANUAL_RELOC
void post_reloc(void)
{
unsigned int i;
/*
* We have to relocate the test table manually
*/
for (i = 0; i < post_list_size; i++) {
ulong addr;
struct post_test *test = post_list + i;
if (test->name) {
addr = (ulong)(test->name) + gd->reloc_off;
test->name = (char *)addr;
}
if (test->cmd) {
addr = (ulong)(test->cmd) + gd->reloc_off;
test->cmd = (char *)addr;
}
if (test->desc) {
addr = (ulong)(test->desc) + gd->reloc_off;
test->desc = (char *)addr;
}
if (test->test) {
addr = (ulong)(test->test) + gd->reloc_off;
test->test = (int (*)(int flags)) addr;
}
if (test->init_f) {
addr = (ulong)(test->init_f) + gd->reloc_off;
test->init_f = (int (*)(void)) addr;
}
if (test->reloc) {
addr = (ulong)(test->reloc) + gd->reloc_off;
test->reloc = (void (*)(void)) addr;
test->reloc();
}
}
}
#endif
/*
* Some tests (e.g. SYSMON) need the time when post_init_f started,
* but we cannot use get_timer() at this point.
*
* On PowerPC we implement it using the timebase register.
*/
unsigned long post_time_ms(unsigned long base)
{
#if defined(CONFIG_PPC) || defined(CONFIG_ARM) && !defined(CONFIG_KIRKWOOD)
return (unsigned long)lldiv(get_ticks(), get_tbclk() / CONFIG_SYS_HZ)
- base;
#else
#warning "Not implemented yet"
return 0; /* Not implemented yet */
#endif
}
|
1001-study-uboot
|
post/post.c
|
C
|
gpl3
| 10,890
|
#
# (C) Copyright 2000-2011
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# (C) Copyright 2011
# Daniel Schwierzeck, daniel.schwierzeck@googlemail.com.
#
# (C) Copyright 2011
# Texas Instruments Incorporated - http://www.ti.com/
# Aneesh V <aneesh@ti.com>
#
# This file is released under the terms of GPL v2 and any later version.
# See the file COPYING in the root directory of the source tree for details.
#
# Based on top-level Makefile.
#
CONFIG_SPL_BUILD := y
export CONFIG_SPL_BUILD
include $(TOPDIR)/config.mk
# We want the final binaries in this directory
obj := $(OBJTREE)/spl/
HAVE_VENDOR_COMMON_LIB := $(shell [ -f $(SRCTREE)/board/$(VENDOR)/common/Makefile ] \
&& echo y || echo n)
ifdef CONFIG_SPL_START_S_PATH
START_PATH := $(subst ",,$(CONFIG_SPL_START_S_PATH))
else
START_PATH := $(CPUDIR)
endif
START := $(START_PATH)/start.o
LIBS-y += arch/$(ARCH)/lib/lib$(ARCH).o
LIBS-y += $(CPUDIR)/lib$(CPU).o
ifdef SOC
LIBS-y += $(CPUDIR)/$(SOC)/lib$(SOC).o
endif
LIBS-y += board/$(BOARDDIR)/lib$(BOARD).o
LIBS-$(HAVE_VENDOR_COMMON_LIB) += board/$(VENDOR)/common/lib$(VENDOR).o
LIBS-$(CONFIG_SPL_LIBCOMMON_SUPPORT) += common/libcommon.o
LIBS-$(CONFIG_SPL_LIBDISK_SUPPORT) += disk/libdisk.o
LIBS-$(CONFIG_SPL_I2C_SUPPORT) += drivers/i2c/libi2c.o
LIBS-$(CONFIG_SPL_GPIO_SUPPORT) += drivers/gpio/libgpio.o
LIBS-$(CONFIG_SPL_MMC_SUPPORT) += drivers/mmc/libmmc.o
LIBS-$(CONFIG_SPL_SERIAL_SUPPORT) += drivers/serial/libserial.o
LIBS-$(CONFIG_SPL_SPI_FLASH_SUPPORT) += drivers/mtd/spi/libspi_flash.o
LIBS-$(CONFIG_SPL_SPI_SUPPORT) += drivers/spi/libspi.o
LIBS-$(CONFIG_SPL_FAT_SUPPORT) += fs/fat/libfat.o
LIBS-$(CONFIG_SPL_LIBGENERIC_SUPPORT) += lib/libgeneric.o
LIBS-$(CONFIG_SPL_POWER_SUPPORT) += drivers/power/libpower.o
LIBS-$(CONFIG_SPL_NAND_SUPPORT) += drivers/mtd/nand/libnand.o
LIBS-$(CONFIG_SPL_ONENAND_SUPPORT) += drivers/mtd/onenand/libonenand.o
LIBS-$(CONFIG_SPL_DMA_SUPPORT) += drivers/dma/libdma.o
LIBS-$(CONFIG_SPL_POST_MEM_SUPPORT) += post/drivers/memory.o
ifeq ($(SOC),omap3)
LIBS-y += $(CPUDIR)/omap-common/libomap-common.o
endif
ifeq ($(SOC),omap4)
LIBS-y += $(CPUDIR)/omap-common/libomap-common.o
endif
ifeq ($(SOC),omap5)
LIBS-y += $(CPUDIR)/omap-common/libomap-common.o
endif
START := $(addprefix $(SPLTREE)/,$(START))
LIBS := $(addprefix $(SPLTREE)/,$(sort $(LIBS-y)))
__START := $(subst $(obj),,$(START))
__LIBS := $(subst $(obj),,$(LIBS))
# Linker Script
ifdef CONFIG_SPL_LDSCRIPT
# need to strip off double quotes
LDSCRIPT := $(addprefix $(SRCTREE)/,$(subst ",,$(CONFIG_SPL_LDSCRIPT)))
endif
ifeq ($(wildcard $(LDSCRIPT)),)
LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot-spl.lds
endif
ifeq ($(wildcard $(LDSCRIPT)),)
LDSCRIPT := $(TOPDIR)/$(CPUDIR)/u-boot-spl.lds
endif
ifeq ($(wildcard $(LDSCRIPT)),)
$(error could not find linker script)
endif
# Special flags for CPP when processing the linker script.
# Pass the version down so we can handle backwards compatibility
# on the fly.
LDPPFLAGS += \
-include $(TOPDIR)/include/u-boot/u-boot.lds.h \
-include $(OBJTREE)/include/config.h \
$(shell $(LD) --version | \
sed -ne 's/GNU ld version \([0-9][0-9]*\)\.\([0-9][0-9]*\).*/-DLD_MAJOR=\1 -DLD_MINOR=\2/p')
ifdef CONFIG_OMAP
$(OBJTREE)/MLO: $(obj)u-boot-spl.bin
$(OBJTREE)/tools/mkimage -T omapimage \
-a $(CONFIG_SPL_TEXT_BASE) -d $< $@
endif
ALL-y += $(obj)u-boot-spl.bin
ifdef CONFIG_SAMSUNG
ALL-y += $(obj)$(BOARD)-spl.bin
endif
all: $(ALL-y)
ifdef CONFIG_SAMSUNG
$(obj)$(BOARD)-spl.bin: $(obj)u-boot-spl.bin
$(OBJTREE)/tools/mk$(BOARD)spl \
$(obj)u-boot-spl.bin $(obj)$(BOARD)-spl.bin
endif
$(obj)u-boot-spl.bin: $(obj)u-boot-spl
$(OBJCOPY) $(OBJCFLAGS) -O binary $< $@
GEN_UBOOT = \
UNDEF_SYM=`$(OBJDUMP) -x $(LIBS) | \
sed -n -e 's/.*\($(SYM_PREFIX)__u_boot_cmd_.*\)/-u\1/p'|sort|uniq`;\
cd $(obj) && $(LD) $(LDFLAGS) $(LDFLAGS_$(@F)) $$UNDEF_SYM $(__START) \
--start-group $(__LIBS) --end-group $(PLATFORM_LIBS) \
-Map u-boot-spl.map -o u-boot-spl
$(obj)u-boot-spl: depend $(START) $(LIBS) $(obj)u-boot-spl.lds
$(GEN_UBOOT)
$(START): depend
$(MAKE) -C $(SRCTREE)/$(START_PATH) $@
$(LIBS): depend
$(MAKE) -C $(SRCTREE)$(dir $(subst $(SPLTREE),,$@))
$(obj)u-boot-spl.lds: $(LDSCRIPT) depend
$(CPP) $(CPPFLAGS) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P - < $< > $@
depend: $(obj).depend
.PHONY: depend
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
|
1001-study-uboot
|
spl/Makefile
|
Makefile
|
gpl3
| 4,356
|
/*
* NS16550 Serial Port
* originally from linux source (arch/powerpc/boot/ns16550.h)
*
* Cleanup and unification
* (C) 2009 by Detlev Zundel, DENX Software Engineering GmbH
*
* modified slightly to
* have addresses as offsets from CONFIG_SYS_ISA_BASE
* added a few more definitions
* added prototypes for ns16550.c
* reduced no of com ports to 2
* modifications (c) Rob Taylor, Flying Pig Systems. 2000.
*
* added support for port on 64-bit bus
* by Richard Danter (richard.danter@windriver.com), (C) 2005 Wind River Systems
*/
/*
* Note that the following macro magic uses the fact that the compiler
* will not allocate storage for arrays of size 0
*/
#include <linux/types.h>
#if !defined(CONFIG_SYS_NS16550_REG_SIZE) || (CONFIG_SYS_NS16550_REG_SIZE == 0)
#error "Please define NS16550 registers size."
#elif defined(CONFIG_SYS_NS16550_MEM32)
#define UART_REG(x) u32 x
#elif (CONFIG_SYS_NS16550_REG_SIZE > 0)
#define UART_REG(x) \
unsigned char prepad_##x[CONFIG_SYS_NS16550_REG_SIZE - 1]; \
unsigned char x;
#elif (CONFIG_SYS_NS16550_REG_SIZE < 0)
#define UART_REG(x) \
unsigned char x; \
unsigned char postpad_##x[-CONFIG_SYS_NS16550_REG_SIZE - 1];
#endif
struct NS16550 {
UART_REG(rbr); /* 0 */
UART_REG(ier); /* 1 */
UART_REG(fcr); /* 2 */
UART_REG(lcr); /* 3 */
UART_REG(mcr); /* 4 */
UART_REG(lsr); /* 5 */
UART_REG(msr); /* 6 */
UART_REG(spr); /* 7 */
UART_REG(mdr1); /* 8 */
UART_REG(reg9); /* 9 */
UART_REG(regA); /* A */
UART_REG(regB); /* B */
UART_REG(regC); /* C */
UART_REG(regD); /* D */
UART_REG(regE); /* E */
UART_REG(uasr); /* F */
UART_REG(scr); /* 10*/
UART_REG(ssr); /* 11*/
UART_REG(reg12); /* 12*/
UART_REG(osc_12m_sel); /* 13*/
};
#define thr rbr
#define iir fcr
#define dll rbr
#define dlm ier
typedef struct NS16550 *NS16550_t;
/*
* These are the definitions for the FIFO Control Register
*/
#define UART_FCR_FIFO_EN 0x01 /* Fifo enable */
#define UART_FCR_CLEAR_RCVR 0x02 /* Clear the RCVR FIFO */
#define UART_FCR_CLEAR_XMIT 0x04 /* Clear the XMIT FIFO */
#define UART_FCR_DMA_SELECT 0x08 /* For DMA applications */
#define UART_FCR_TRIGGER_MASK 0xC0 /* Mask for the FIFO trigger range */
#define UART_FCR_TRIGGER_1 0x00 /* Mask for trigger set at 1 */
#define UART_FCR_TRIGGER_4 0x40 /* Mask for trigger set at 4 */
#define UART_FCR_TRIGGER_8 0x80 /* Mask for trigger set at 8 */
#define UART_FCR_TRIGGER_14 0xC0 /* Mask for trigger set at 14 */
#define UART_FCR_RXSR 0x02 /* Receiver soft reset */
#define UART_FCR_TXSR 0x04 /* Transmitter soft reset */
/*
* These are the definitions for the Modem Control Register
*/
#define UART_MCR_DTR 0x01 /* DTR */
#define UART_MCR_RTS 0x02 /* RTS */
#define UART_MCR_OUT1 0x04 /* Out 1 */
#define UART_MCR_OUT2 0x08 /* Out 2 */
#define UART_MCR_LOOP 0x10 /* Enable loopback test mode */
#define UART_MCR_DMA_EN 0x04
#define UART_MCR_TX_DFR 0x08
/*
* These are the definitions for the Line Control Register
*
* Note: if the word length is 5 bits (UART_LCR_WLEN5), then setting
* UART_LCR_STOP will select 1.5 stop bits, not 2 stop bits.
*/
#define UART_LCR_WLS_MSK 0x03 /* character length select mask */
#define UART_LCR_WLS_5 0x00 /* 5 bit character length */
#define UART_LCR_WLS_6 0x01 /* 6 bit character length */
#define UART_LCR_WLS_7 0x02 /* 7 bit character length */
#define UART_LCR_WLS_8 0x03 /* 8 bit character length */
#define UART_LCR_STB 0x04 /* # stop Bits, off=1, on=1.5 or 2) */
#define UART_LCR_PEN 0x08 /* Parity eneble */
#define UART_LCR_EPS 0x10 /* Even Parity Select */
#define UART_LCR_STKP 0x20 /* Stick Parity */
#define UART_LCR_SBRK 0x40 /* Set Break */
#define UART_LCR_BKSE 0x80 /* Bank select enable */
#define UART_LCR_DLAB 0x80 /* Divisor latch access bit */
/*
* These are the definitions for the Line Status Register
*/
#define UART_LSR_DR 0x01 /* Data ready */
#define UART_LSR_OE 0x02 /* Overrun */
#define UART_LSR_PE 0x04 /* Parity error */
#define UART_LSR_FE 0x08 /* Framing error */
#define UART_LSR_BI 0x10 /* Break */
#define UART_LSR_THRE 0x20 /* Xmit holding register empty */
#define UART_LSR_TEMT 0x40 /* Xmitter empty */
#define UART_LSR_ERR 0x80 /* Error */
#define UART_MSR_DCD 0x80 /* Data Carrier Detect */
#define UART_MSR_RI 0x40 /* Ring Indicator */
#define UART_MSR_DSR 0x20 /* Data Set Ready */
#define UART_MSR_CTS 0x10 /* Clear to Send */
#define UART_MSR_DDCD 0x08 /* Delta DCD */
#define UART_MSR_TERI 0x04 /* Trailing edge ring indicator */
#define UART_MSR_DDSR 0x02 /* Delta DSR */
#define UART_MSR_DCTS 0x01 /* Delta CTS */
/*
* These are the definitions for the Interrupt Identification Register
*/
#define UART_IIR_NO_INT 0x01 /* No interrupts pending */
#define UART_IIR_ID 0x06 /* Mask for the interrupt ID */
#define UART_IIR_MSI 0x00 /* Modem status interrupt */
#define UART_IIR_THRI 0x02 /* Transmitter holding register empty */
#define UART_IIR_RDI 0x04 /* Receiver data interrupt */
#define UART_IIR_RLSI 0x06 /* Receiver line status interrupt */
/*
* These are the definitions for the Interrupt Enable Register
*/
#define UART_IER_MSI 0x08 /* Enable Modem status interrupt */
#define UART_IER_RLSI 0x04 /* Enable receiver line status interrupt */
#define UART_IER_THRI 0x02 /* Enable Transmitter holding register int. */
#define UART_IER_RDI 0x01 /* Enable receiver data interrupt */
#ifdef CONFIG_OMAP1510
#define OSC_12M_SEL 0x01 /* selects 6.5 * current clk div */
#endif
/* useful defaults for LCR */
#define UART_LCR_8N1 0x03
void NS16550_init(NS16550_t com_port, int baud_divisor);
void NS16550_putc(NS16550_t com_port, char c);
char NS16550_getc(NS16550_t com_port);
int NS16550_tstc(NS16550_t com_port);
void NS16550_reinit(NS16550_t com_port, int baud_divisor);
|
1001-study-uboot
|
include/ns16550.h
|
C
|
gpl3
| 5,778
|
/*
* Header file for vsc7385.c
*
* Author: Timur Tabi <timur@freescale.com>
*
* Copyright 2008 Freescale Semiconductor, Inc. This file is licensed
* under the terms of the GNU General Public License version 2. This
* program is licensed "as is" without any warranty of any kind, whether
* express or implied.
*/
int vsc7385_upload_firmware(void *firmware, unsigned int size);
|
1001-study-uboot
|
include/vsc7385.h
|
C
|
gpl3
| 388
|
/*
* FSL SD/MMC Defines
*-------------------------------------------------------------------
*
* Copyright 2007-2008,2010-2011 Freescale Semiconductor, Inc
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*-------------------------------------------------------------------
*
*/
#ifndef __FSL_ESDHC_H__
#define __FSL_ESDHC_H__
#include <asm/errno.h>
#include <asm/byteorder.h>
/* FSL eSDHC-specific constants */
#define SYSCTL 0x0002e02c
#define SYSCTL_INITA 0x08000000
#define SYSCTL_TIMEOUT_MASK 0x000f0000
#define SYSCTL_CLOCK_MASK 0x0000fff0
#define SYSCTL_RSTA 0x01000000
#define SYSCTL_CKEN 0x00000008
#define SYSCTL_PEREN 0x00000004
#define SYSCTL_HCKEN 0x00000002
#define SYSCTL_IPGEN 0x00000001
#define SYSCTL_RSTA 0x01000000
#define IRQSTAT 0x0002e030
#define IRQSTAT_DMAE (0x10000000)
#define IRQSTAT_AC12E (0x01000000)
#define IRQSTAT_DEBE (0x00400000)
#define IRQSTAT_DCE (0x00200000)
#define IRQSTAT_DTOE (0x00100000)
#define IRQSTAT_CIE (0x00080000)
#define IRQSTAT_CEBE (0x00040000)
#define IRQSTAT_CCE (0x00020000)
#define IRQSTAT_CTOE (0x00010000)
#define IRQSTAT_CINT (0x00000100)
#define IRQSTAT_CRM (0x00000080)
#define IRQSTAT_CINS (0x00000040)
#define IRQSTAT_BRR (0x00000020)
#define IRQSTAT_BWR (0x00000010)
#define IRQSTAT_DINT (0x00000008)
#define IRQSTAT_BGE (0x00000004)
#define IRQSTAT_TC (0x00000002)
#define IRQSTAT_CC (0x00000001)
#define CMD_ERR (IRQSTAT_CIE | IRQSTAT_CEBE | IRQSTAT_CCE)
#define DATA_ERR (IRQSTAT_DEBE | IRQSTAT_DCE | IRQSTAT_DTOE)
#define IRQSTATEN 0x0002e034
#define IRQSTATEN_DMAE (0x10000000)
#define IRQSTATEN_AC12E (0x01000000)
#define IRQSTATEN_DEBE (0x00400000)
#define IRQSTATEN_DCE (0x00200000)
#define IRQSTATEN_DTOE (0x00100000)
#define IRQSTATEN_CIE (0x00080000)
#define IRQSTATEN_CEBE (0x00040000)
#define IRQSTATEN_CCE (0x00020000)
#define IRQSTATEN_CTOE (0x00010000)
#define IRQSTATEN_CINT (0x00000100)
#define IRQSTATEN_CRM (0x00000080)
#define IRQSTATEN_CINS (0x00000040)
#define IRQSTATEN_BRR (0x00000020)
#define IRQSTATEN_BWR (0x00000010)
#define IRQSTATEN_DINT (0x00000008)
#define IRQSTATEN_BGE (0x00000004)
#define IRQSTATEN_TC (0x00000002)
#define IRQSTATEN_CC (0x00000001)
#define PRSSTAT 0x0002e024
#define PRSSTAT_CLSL (0x00800000)
#define PRSSTAT_WPSPL (0x00080000)
#define PRSSTAT_CDPL (0x00040000)
#define PRSSTAT_CINS (0x00010000)
#define PRSSTAT_BREN (0x00000800)
#define PRSSTAT_BWEN (0x00000400)
#define PRSSTAT_DLA (0x00000004)
#define PRSSTAT_CICHB (0x00000002)
#define PRSSTAT_CIDHB (0x00000001)
#define PROCTL 0x0002e028
#define PROCTL_INIT 0x00000020
#define PROCTL_DTW_4 0x00000002
#define PROCTL_DTW_8 0x00000004
#define CMDARG 0x0002e008
#define XFERTYP 0x0002e00c
#define XFERTYP_CMD(x) ((x & 0x3f) << 24)
#define XFERTYP_CMDTYP_NORMAL 0x0
#define XFERTYP_CMDTYP_SUSPEND 0x00400000
#define XFERTYP_CMDTYP_RESUME 0x00800000
#define XFERTYP_CMDTYP_ABORT 0x00c00000
#define XFERTYP_DPSEL 0x00200000
#define XFERTYP_CICEN 0x00100000
#define XFERTYP_CCCEN 0x00080000
#define XFERTYP_RSPTYP_NONE 0
#define XFERTYP_RSPTYP_136 0x00010000
#define XFERTYP_RSPTYP_48 0x00020000
#define XFERTYP_RSPTYP_48_BUSY 0x00030000
#define XFERTYP_MSBSEL 0x00000020
#define XFERTYP_DTDSEL 0x00000010
#define XFERTYP_AC12EN 0x00000004
#define XFERTYP_BCEN 0x00000002
#define XFERTYP_DMAEN 0x00000001
#define CINS_TIMEOUT 1000
#define PIO_TIMEOUT 100000
#define DSADDR 0x2e004
#define CMDRSP0 0x2e010
#define CMDRSP1 0x2e014
#define CMDRSP2 0x2e018
#define CMDRSP3 0x2e01c
#define DATPORT 0x2e020
#define WML 0x2e044
#define WML_WRITE 0x00010000
#ifdef CONFIG_FSL_SDHC_V2_3
#define WML_RD_WML_MAX 0x80
#define WML_WR_WML_MAX 0x80
#define WML_RD_WML_MAX_VAL 0x0
#define WML_WR_WML_MAX_VAL 0x0
#define WML_RD_WML_MASK 0x7f
#define WML_WR_WML_MASK 0x7f0000
#else
#define WML_RD_WML_MAX 0x10
#define WML_WR_WML_MAX 0x80
#define WML_RD_WML_MAX_VAL 0x10
#define WML_WR_WML_MAX_VAL 0x80
#define WML_RD_WML_MASK 0xff
#define WML_WR_WML_MASK 0xff0000
#endif
#define BLKATTR 0x2e004
#define BLKATTR_CNT(x) ((x & 0xffff) << 16)
#define BLKATTR_SIZE(x) (x & 0x1fff)
#define MAX_BLK_CNT 0x7fff /* so malloc will have enough room with 32M */
#define ESDHC_HOSTCAPBLT_VS18 0x04000000
#define ESDHC_HOSTCAPBLT_VS30 0x02000000
#define ESDHC_HOSTCAPBLT_VS33 0x01000000
#define ESDHC_HOSTCAPBLT_SRS 0x00800000
#define ESDHC_HOSTCAPBLT_DMAS 0x00400000
#define ESDHC_HOSTCAPBLT_HSS 0x00200000
struct fsl_esdhc_cfg {
u32 esdhc_base;
u32 no_snoop;
};
/* Select the correct accessors depending on endianess */
#if __BYTE_ORDER == __LITTLE_ENDIAN
#define esdhc_read32 in_le32
#define esdhc_write32 out_le32
#define esdhc_clrsetbits32 clrsetbits_le32
#define esdhc_clrbits32 clrbits_le32
#define esdhc_setbits32 setbits_le32
#elif __BYTE_ORDER == __BIG_ENDIAN
#define esdhc_read32 in_be32
#define esdhc_write32 out_be32
#define esdhc_clrsetbits32 clrsetbits_be32
#define esdhc_clrbits32 clrbits_be32
#define esdhc_setbits32 setbits_be32
#else
#error "Endianess is not defined: please fix to continue"
#endif
#ifdef CONFIG_FSL_ESDHC
int fsl_esdhc_mmc_init(bd_t *bis);
int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg);
void fdt_fixup_esdhc(void *blob, bd_t *bd);
#else
static inline int fsl_esdhc_mmc_init(bd_t *bis) { return -ENOSYS; }
static inline void fdt_fixup_esdhc(void *blob, bd_t *bd) {}
#endif /* CONFIG_FSL_ESDHC */
#endif /* __FSL_ESDHC_H__ */
|
1001-study-uboot
|
include/fsl_esdhc.h
|
C
|
gpl3
| 6,117
|
#ifndef _LINUX_CRC7_H
#define _LINUX_CRC7_H
#include <linux/types.h>
extern const u8 crc7_syndrome_table[256];
static inline u8 crc7_byte(u8 crc, u8 data)
{
return crc7_syndrome_table[(crc << 1) ^ data];
}
extern u8 crc7(u8 crc, const u8 *buffer, size_t len);
#endif
|
1001-study-uboot
|
include/linux/crc7.h
|
C
|
gpl3
| 272
|
#ifndef _LINUX_CTYPE_H
#define _LINUX_CTYPE_H
/*
* NOTE! This ctype does not handle EOF like the standard C
* library is required to.
*/
#define _U 0x01 /* upper */
#define _L 0x02 /* lower */
#define _D 0x04 /* digit */
#define _C 0x08 /* cntrl */
#define _P 0x10 /* punct */
#define _S 0x20 /* white space (space/lf/tab) */
#define _X 0x40 /* hex digit */
#define _SP 0x80 /* hard space (0x20) */
extern const unsigned char _ctype[];
#define __ismask(x) (_ctype[(int)(unsigned char)(x)])
#define isalnum(c) ((__ismask(c)&(_U|_L|_D)) != 0)
#define isalpha(c) ((__ismask(c)&(_U|_L)) != 0)
#define iscntrl(c) ((__ismask(c)&(_C)) != 0)
#define isdigit(c) ((__ismask(c)&(_D)) != 0)
#define isgraph(c) ((__ismask(c)&(_P|_U|_L|_D)) != 0)
#define islower(c) ((__ismask(c)&(_L)) != 0)
#define isprint(c) ((__ismask(c)&(_P|_U|_L|_D|_SP)) != 0)
#define ispunct(c) ((__ismask(c)&(_P)) != 0)
#define isspace(c) ((__ismask(c)&(_S)) != 0)
#define isupper(c) ((__ismask(c)&(_U)) != 0)
#define isxdigit(c) ((__ismask(c)&(_D|_X)) != 0)
/*
* Rather than doubling the size of the _ctype lookup table to hold a 'blank'
* flag, just check for space or tab.
*/
#define isblank(c) (c == ' ' || c == '\t')
#define isascii(c) (((unsigned char)(c))<=0x7f)
#define toascii(c) (((unsigned char)(c))&0x7f)
static inline unsigned char __tolower(unsigned char c)
{
if (isupper(c))
c -= 'A'-'a';
return c;
}
static inline unsigned char __toupper(unsigned char c)
{
if (islower(c))
c -= 'a'-'A';
return c;
}
#define tolower(c) __tolower(c)
#define toupper(c) __toupper(c)
#endif
|
1001-study-uboot
|
include/linux/ctype.h
|
C
|
gpl3
| 1,572
|
#ifndef __LINUX_COMPILER_H
#error "Please don't include <linux/compiler-gcc.h> directly, include <linux/compiler.h> instead."
#endif
/*
* Common definitions for all gcc versions go here.
*/
/* Optimization barrier */
/* The "volatile" is due to gcc bugs */
#define barrier() __asm__ __volatile__("": : :"memory")
/*
* This macro obfuscates arithmetic on a variable address so that gcc
* shouldn't recognize the original var, and make assumptions about it.
*
* This is needed because the C standard makes it undefined to do
* pointer arithmetic on "objects" outside their boundaries and the
* gcc optimizers assume this is the case. In particular they
* assume such arithmetic does not wrap.
*
* A miscompilation has been observed because of this on PPC.
* To work around it we hide the relationship of the pointer and the object
* using this macro.
*
* Versions of the ppc64 compiler before 4.1 had a bug where use of
* RELOC_HIDE could trash r30. The bug can be worked around by changing
* the inline assembly constraint from =g to =r, in this particular
* case either is valid.
*/
#define RELOC_HIDE(ptr, off) \
({ unsigned long __ptr; \
__asm__ ("" : "=r"(__ptr) : "0"(ptr)); \
(typeof(ptr)) (__ptr + (off)); })
/* &a[0] degrades to a pointer: a different type from an array */
#define __must_be_array(a) \
BUILD_BUG_ON_ZERO(__builtin_types_compatible_p(typeof(a), typeof(&a[0])))
/*
* Force always-inline if the user requests it so via the .config,
* or if gcc is too old:
*/
#if !defined(CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING) || \
!defined(CONFIG_OPTIMIZE_INLINING) || (__GNUC__ < 4)
# define inline inline __attribute__((always_inline))
# define __inline__ __inline__ __attribute__((always_inline))
# define __inline __inline __attribute__((always_inline))
#endif
#define __deprecated __attribute__((deprecated))
#define __packed __attribute__((packed))
#define __weak __attribute__((weak))
/*
* it doesn't make sense on ARM (currently the only user of __naked) to trace
* naked functions because then mcount is called without stack and frame pointer
* being set up and there is no chance to restore the lr register to the value
* before mcount was called.
*/
#define __naked __attribute__((naked)) notrace
#define __noreturn __attribute__((noreturn))
/*
* From the GCC manual:
*
* Many functions have no effects except the return value and their
* return value depends only on the parameters and/or global
* variables. Such a function can be subject to common subexpression
* elimination and loop optimization just as an arithmetic operator
* would be.
* [...]
*/
#define __pure __attribute__((pure))
#define __aligned(x) __attribute__((aligned(x)))
#define __printf(a,b) __attribute__((format(printf,a,b)))
#define noinline __attribute__((noinline))
#define __attribute_const__ __attribute__((__const__))
#define __maybe_unused __attribute__((unused))
#define __always_unused __attribute__((unused))
#define __gcc_header(x) #x
#define _gcc_header(x) __gcc_header(linux/compiler-gcc##x.h)
#define gcc_header(x) _gcc_header(x)
#include gcc_header(__GNUC__)
|
1001-study-uboot
|
include/linux/compiler-gcc.h
|
C
|
gpl3
| 3,168
|
/*
Red Black Trees
(C) 1999 Andrea Arcangeli <andrea@suse.de>
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
linux/include/linux/rbtree.h
To use rbtrees you'll have to implement your own insert and search cores.
This will avoid us to use callbacks and to drop drammatically performances.
I know it's not the cleaner way, but in C (not in C++) to get
performances and genericity...
Some example of insert and search follows here. The search is a plain
normal search over an ordered tree. The insert instead must be implemented
int two steps: as first thing the code must insert the element in
order as a red leaf in the tree, then the support library function
rb_insert_color() must be called. Such function will do the
not trivial work to rebalance the rbtree if necessary.
-----------------------------------------------------------------------
static inline struct page * rb_search_page_cache(struct inode * inode,
unsigned long offset)
{
struct rb_node * n = inode->i_rb_page_cache.rb_node;
struct page * page;
while (n)
{
page = rb_entry(n, struct page, rb_page_cache);
if (offset < page->offset)
n = n->rb_left;
else if (offset > page->offset)
n = n->rb_right;
else
return page;
}
return NULL;
}
static inline struct page * __rb_insert_page_cache(struct inode * inode,
unsigned long offset,
struct rb_node * node)
{
struct rb_node ** p = &inode->i_rb_page_cache.rb_node;
struct rb_node * parent = NULL;
struct page * page;
while (*p)
{
parent = *p;
page = rb_entry(parent, struct page, rb_page_cache);
if (offset < page->offset)
p = &(*p)->rb_left;
else if (offset > page->offset)
p = &(*p)->rb_right;
else
return page;
}
rb_link_node(node, parent, p);
return NULL;
}
static inline struct page * rb_insert_page_cache(struct inode * inode,
unsigned long offset,
struct rb_node * node)
{
struct page * ret;
if ((ret = __rb_insert_page_cache(inode, offset, node)))
goto out;
rb_insert_color(node, &inode->i_rb_page_cache);
out:
return ret;
}
-----------------------------------------------------------------------
*/
#ifndef _LINUX_RBTREE_H
#define _LINUX_RBTREE_H
#include <linux/stddef.h>
struct rb_node
{
unsigned long rb_parent_color;
#define RB_RED 0
#define RB_BLACK 1
struct rb_node *rb_right;
struct rb_node *rb_left;
} __attribute__((aligned(sizeof(long))));
/* The alignment might seem pointless, but allegedly CRIS needs it */
struct rb_root
{
struct rb_node *rb_node;
};
#define rb_parent(r) ((struct rb_node *)((r)->rb_parent_color & ~3))
#define rb_color(r) ((r)->rb_parent_color & 1)
#define rb_is_red(r) (!rb_color(r))
#define rb_is_black(r) rb_color(r)
#define rb_set_red(r) do { (r)->rb_parent_color &= ~1; } while (0)
#define rb_set_black(r) do { (r)->rb_parent_color |= 1; } while (0)
static inline void rb_set_parent(struct rb_node *rb, struct rb_node *p)
{
rb->rb_parent_color = (rb->rb_parent_color & 3) | (unsigned long)p;
}
static inline void rb_set_color(struct rb_node *rb, int color)
{
rb->rb_parent_color = (rb->rb_parent_color & ~1) | color;
}
#define RB_ROOT (struct rb_root) { NULL, }
#define rb_entry(ptr, type, member) container_of(ptr, type, member)
#define RB_EMPTY_ROOT(root) ((root)->rb_node == NULL)
#define RB_EMPTY_NODE(node) (rb_parent(node) == node)
#define RB_CLEAR_NODE(node) (rb_set_parent(node, node))
extern void rb_insert_color(struct rb_node *, struct rb_root *);
extern void rb_erase(struct rb_node *, struct rb_root *);
/* Find logical next and previous nodes in a tree */
extern struct rb_node *rb_next(struct rb_node *);
extern struct rb_node *rb_prev(struct rb_node *);
extern struct rb_node *rb_first(struct rb_root *);
extern struct rb_node *rb_last(struct rb_root *);
/* Fast replacement of a single node without remove/rebalance/add/rebalance */
extern void rb_replace_node(struct rb_node *victim, struct rb_node *new,
struct rb_root *root);
static inline void rb_link_node(struct rb_node * node, struct rb_node * parent,
struct rb_node ** rb_link)
{
node->rb_parent_color = (unsigned long )parent;
node->rb_left = node->rb_right = NULL;
*rb_link = node;
}
#endif /* _LINUX_RBTREE_H */
|
1001-study-uboot
|
include/linux/rbtree.h
|
C
|
gpl3
| 4,884
|
#ifndef _LINUX_LIST_H
#define _LINUX_LIST_H
#include <linux/stddef.h>
#include <linux/poison.h>
#ifndef ARCH_HAS_PREFETCH
#define ARCH_HAS_PREFETCH
static inline void prefetch(const void *x) {;}
#endif
/*
* Simple doubly linked list implementation.
*
* Some of the internal functions ("__xxx") are useful when
* manipulating whole lists rather than single entries, as
* sometimes we already know the next/prev entries and we can
* generate better code by using them directly rather than
* using the generic single-entry routines.
*/
struct list_head {
struct list_head *next, *prev;
};
#define LIST_HEAD_INIT(name) { &(name), &(name) }
#define LIST_HEAD(name) \
struct list_head name = LIST_HEAD_INIT(name)
static inline void INIT_LIST_HEAD(struct list_head *list)
{
list->next = list;
list->prev = list;
}
/*
* Insert a new entry between two known consecutive entries.
*
* This is only for internal list manipulation where we know
* the prev/next entries already!
*/
static inline void __list_add(struct list_head *new,
struct list_head *prev,
struct list_head *next)
{
next->prev = new;
new->next = next;
new->prev = prev;
prev->next = new;
}
/**
* list_add - add a new entry
* @new: new entry to be added
* @head: list head to add it after
*
* Insert a new entry after the specified head.
* This is good for implementing stacks.
*/
static inline void list_add(struct list_head *new, struct list_head *head)
{
__list_add(new, head, head->next);
}
/**
* list_add_tail - add a new entry
* @new: new entry to be added
* @head: list head to add it before
*
* Insert a new entry before the specified head.
* This is useful for implementing queues.
*/
static inline void list_add_tail(struct list_head *new, struct list_head *head)
{
__list_add(new, head->prev, head);
}
/*
* Delete a list entry by making the prev/next entries
* point to each other.
*
* This is only for internal list manipulation where we know
* the prev/next entries already!
*/
static inline void __list_del(struct list_head *prev, struct list_head *next)
{
next->prev = prev;
prev->next = next;
}
/**
* list_del - deletes entry from list.
* @entry: the element to delete from the list.
* Note: list_empty() on entry does not return true after this, the entry is
* in an undefined state.
*/
static inline void list_del(struct list_head *entry)
{
__list_del(entry->prev, entry->next);
entry->next = LIST_POISON1;
entry->prev = LIST_POISON2;
}
/**
* list_replace - replace old entry by new one
* @old : the element to be replaced
* @new : the new element to insert
*
* If @old was empty, it will be overwritten.
*/
static inline void list_replace(struct list_head *old,
struct list_head *new)
{
new->next = old->next;
new->next->prev = new;
new->prev = old->prev;
new->prev->next = new;
}
static inline void list_replace_init(struct list_head *old,
struct list_head *new)
{
list_replace(old, new);
INIT_LIST_HEAD(old);
}
/**
* list_del_init - deletes entry from list and reinitialize it.
* @entry: the element to delete from the list.
*/
static inline void list_del_init(struct list_head *entry)
{
__list_del(entry->prev, entry->next);
INIT_LIST_HEAD(entry);
}
/**
* list_move - delete from one list and add as another's head
* @list: the entry to move
* @head: the head that will precede our entry
*/
static inline void list_move(struct list_head *list, struct list_head *head)
{
__list_del(list->prev, list->next);
list_add(list, head);
}
/**
* list_move_tail - delete from one list and add as another's tail
* @list: the entry to move
* @head: the head that will follow our entry
*/
static inline void list_move_tail(struct list_head *list,
struct list_head *head)
{
__list_del(list->prev, list->next);
list_add_tail(list, head);
}
/**
* list_is_last - tests whether @list is the last entry in list @head
* @list: the entry to test
* @head: the head of the list
*/
static inline int list_is_last(const struct list_head *list,
const struct list_head *head)
{
return list->next == head;
}
/**
* list_empty - tests whether a list is empty
* @head: the list to test.
*/
static inline int list_empty(const struct list_head *head)
{
return head->next == head;
}
/**
* list_empty_careful - tests whether a list is empty and not being modified
* @head: the list to test
*
* Description:
* tests whether a list is empty _and_ checks that no other CPU might be
* in the process of modifying either member (next or prev)
*
* NOTE: using list_empty_careful() without synchronization
* can only be safe if the only activity that can happen
* to the list entry is list_del_init(). Eg. it cannot be used
* if another CPU could re-list_add() it.
*/
static inline int list_empty_careful(const struct list_head *head)
{
struct list_head *next = head->next;
return (next == head) && (next == head->prev);
}
/**
* list_is_singular - tests whether a list has just one entry.
* @head: the list to test.
*/
static inline int list_is_singular(const struct list_head *head)
{
return !list_empty(head) && (head->next == head->prev);
}
static inline void __list_cut_position(struct list_head *list,
struct list_head *head, struct list_head *entry)
{
struct list_head *new_first = entry->next;
list->next = head->next;
list->next->prev = list;
list->prev = entry;
entry->next = list;
head->next = new_first;
new_first->prev = head;
}
/**
* list_cut_position - cut a list into two
* @list: a new list to add all removed entries
* @head: a list with entries
* @entry: an entry within head, could be the head itself
* and if so we won't cut the list
*
* This helper moves the initial part of @head, up to and
* including @entry, from @head to @list. You should
* pass on @entry an element you know is on @head. @list
* should be an empty list or a list you do not care about
* losing its data.
*
*/
static inline void list_cut_position(struct list_head *list,
struct list_head *head, struct list_head *entry)
{
if (list_empty(head))
return;
if (list_is_singular(head) &&
(head->next != entry && head != entry))
return;
if (entry == head)
INIT_LIST_HEAD(list);
else
__list_cut_position(list, head, entry);
}
static inline void __list_splice(const struct list_head *list,
struct list_head *prev,
struct list_head *next)
{
struct list_head *first = list->next;
struct list_head *last = list->prev;
first->prev = prev;
prev->next = first;
last->next = next;
next->prev = last;
}
/**
* list_splice - join two lists, this is designed for stacks
* @list: the new list to add.
* @head: the place to add it in the first list.
*/
static inline void list_splice(const struct list_head *list,
struct list_head *head)
{
if (!list_empty(list))
__list_splice(list, head, head->next);
}
/**
* list_splice_tail - join two lists, each list being a queue
* @list: the new list to add.
* @head: the place to add it in the first list.
*/
static inline void list_splice_tail(struct list_head *list,
struct list_head *head)
{
if (!list_empty(list))
__list_splice(list, head->prev, head);
}
/**
* list_splice_init - join two lists and reinitialise the emptied list.
* @list: the new list to add.
* @head: the place to add it in the first list.
*
* The list at @list is reinitialised
*/
static inline void list_splice_init(struct list_head *list,
struct list_head *head)
{
if (!list_empty(list)) {
__list_splice(list, head, head->next);
INIT_LIST_HEAD(list);
}
}
/**
* list_splice_tail_init - join two lists and reinitialise the emptied list
* @list: the new list to add.
* @head: the place to add it in the first list.
*
* Each of the lists is a queue.
* The list at @list is reinitialised
*/
static inline void list_splice_tail_init(struct list_head *list,
struct list_head *head)
{
if (!list_empty(list)) {
__list_splice(list, head->prev, head);
INIT_LIST_HEAD(list);
}
}
/**
* list_entry - get the struct for this entry
* @ptr: the &struct list_head pointer.
* @type: the type of the struct this is embedded in.
* @member: the name of the list_struct within the struct.
*/
#define list_entry(ptr, type, member) \
container_of(ptr, type, member)
/**
* list_first_entry - get the first element from a list
* @ptr: the list head to take the element from.
* @type: the type of the struct this is embedded in.
* @member: the name of the list_struct within the struct.
*
* Note, that list is expected to be not empty.
*/
#define list_first_entry(ptr, type, member) \
list_entry((ptr)->next, type, member)
/**
* list_for_each - iterate over a list
* @pos: the &struct list_head to use as a loop cursor.
* @head: the head for your list.
*/
#define list_for_each(pos, head) \
for (pos = (head)->next; prefetch(pos->next), pos != (head); \
pos = pos->next)
/**
* __list_for_each - iterate over a list
* @pos: the &struct list_head to use as a loop cursor.
* @head: the head for your list.
*
* This variant differs from list_for_each() in that it's the
* simplest possible list iteration code, no prefetching is done.
* Use this for code that knows the list to be very short (empty
* or 1 entry) most of the time.
*/
#define __list_for_each(pos, head) \
for (pos = (head)->next; pos != (head); pos = pos->next)
/**
* list_for_each_prev - iterate over a list backwards
* @pos: the &struct list_head to use as a loop cursor.
* @head: the head for your list.
*/
#define list_for_each_prev(pos, head) \
for (pos = (head)->prev; prefetch(pos->prev), pos != (head); \
pos = pos->prev)
/**
* list_for_each_safe - iterate over a list safe against removal of list entry
* @pos: the &struct list_head to use as a loop cursor.
* @n: another &struct list_head to use as temporary storage
* @head: the head for your list.
*/
#define list_for_each_safe(pos, n, head) \
for (pos = (head)->next, n = pos->next; pos != (head); \
pos = n, n = pos->next)
/**
* list_for_each_prev_safe - iterate over a list backwards safe against removal of list entry
* @pos: the &struct list_head to use as a loop cursor.
* @n: another &struct list_head to use as temporary storage
* @head: the head for your list.
*/
#define list_for_each_prev_safe(pos, n, head) \
for (pos = (head)->prev, n = pos->prev; \
prefetch(pos->prev), pos != (head); \
pos = n, n = pos->prev)
/**
* list_for_each_entry - iterate over list of given type
* @pos: the type * to use as a loop cursor.
* @head: the head for your list.
* @member: the name of the list_struct within the struct.
*/
#define list_for_each_entry(pos, head, member) \
for (pos = list_entry((head)->next, typeof(*pos), member); \
prefetch(pos->member.next), &pos->member != (head); \
pos = list_entry(pos->member.next, typeof(*pos), member))
/**
* list_for_each_entry_reverse - iterate backwards over list of given type.
* @pos: the type * to use as a loop cursor.
* @head: the head for your list.
* @member: the name of the list_struct within the struct.
*/
#define list_for_each_entry_reverse(pos, head, member) \
for (pos = list_entry((head)->prev, typeof(*pos), member); \
prefetch(pos->member.prev), &pos->member != (head); \
pos = list_entry(pos->member.prev, typeof(*pos), member))
/**
* list_prepare_entry - prepare a pos entry for use in list_for_each_entry_continue()
* @pos: the type * to use as a start point
* @head: the head of the list
* @member: the name of the list_struct within the struct.
*
* Prepares a pos entry for use as a start point in list_for_each_entry_continue().
*/
#define list_prepare_entry(pos, head, member) \
((pos) ? : list_entry(head, typeof(*pos), member))
/**
* list_for_each_entry_continue - continue iteration over list of given type
* @pos: the type * to use as a loop cursor.
* @head: the head for your list.
* @member: the name of the list_struct within the struct.
*
* Continue to iterate over list of given type, continuing after
* the current position.
*/
#define list_for_each_entry_continue(pos, head, member) \
for (pos = list_entry(pos->member.next, typeof(*pos), member); \
prefetch(pos->member.next), &pos->member != (head); \
pos = list_entry(pos->member.next, typeof(*pos), member))
/**
* list_for_each_entry_continue_reverse - iterate backwards from the given point
* @pos: the type * to use as a loop cursor.
* @head: the head for your list.
* @member: the name of the list_struct within the struct.
*
* Start to iterate over list of given type backwards, continuing after
* the current position.
*/
#define list_for_each_entry_continue_reverse(pos, head, member) \
for (pos = list_entry(pos->member.prev, typeof(*pos), member); \
prefetch(pos->member.prev), &pos->member != (head); \
pos = list_entry(pos->member.prev, typeof(*pos), member))
/**
* list_for_each_entry_from - iterate over list of given type from the current point
* @pos: the type * to use as a loop cursor.
* @head: the head for your list.
* @member: the name of the list_struct within the struct.
*
* Iterate over list of given type, continuing from current position.
*/
#define list_for_each_entry_from(pos, head, member) \
for (; prefetch(pos->member.next), &pos->member != (head); \
pos = list_entry(pos->member.next, typeof(*pos), member))
/**
* list_for_each_entry_safe - iterate over list of given type safe against removal of list entry
* @pos: the type * to use as a loop cursor.
* @n: another type * to use as temporary storage
* @head: the head for your list.
* @member: the name of the list_struct within the struct.
*/
#define list_for_each_entry_safe(pos, n, head, member) \
for (pos = list_entry((head)->next, typeof(*pos), member), \
n = list_entry(pos->member.next, typeof(*pos), member); \
&pos->member != (head); \
pos = n, n = list_entry(n->member.next, typeof(*n), member))
/**
* list_for_each_entry_safe_continue
* @pos: the type * to use as a loop cursor.
* @n: another type * to use as temporary storage
* @head: the head for your list.
* @member: the name of the list_struct within the struct.
*
* Iterate over list of given type, continuing after current point,
* safe against removal of list entry.
*/
#define list_for_each_entry_safe_continue(pos, n, head, member) \
for (pos = list_entry(pos->member.next, typeof(*pos), member), \
n = list_entry(pos->member.next, typeof(*pos), member); \
&pos->member != (head); \
pos = n, n = list_entry(n->member.next, typeof(*n), member))
/**
* list_for_each_entry_safe_from
* @pos: the type * to use as a loop cursor.
* @n: another type * to use as temporary storage
* @head: the head for your list.
* @member: the name of the list_struct within the struct.
*
* Iterate over list of given type from current point, safe against
* removal of list entry.
*/
#define list_for_each_entry_safe_from(pos, n, head, member) \
for (n = list_entry(pos->member.next, typeof(*pos), member); \
&pos->member != (head); \
pos = n, n = list_entry(n->member.next, typeof(*n), member))
/**
* list_for_each_entry_safe_reverse
* @pos: the type * to use as a loop cursor.
* @n: another type * to use as temporary storage
* @head: the head for your list.
* @member: the name of the list_struct within the struct.
*
* Iterate backwards over list of given type, safe against removal
* of list entry.
*/
#define list_for_each_entry_safe_reverse(pos, n, head, member) \
for (pos = list_entry((head)->prev, typeof(*pos), member), \
n = list_entry(pos->member.prev, typeof(*pos), member); \
&pos->member != (head); \
pos = n, n = list_entry(n->member.prev, typeof(*n), member))
/*
* Double linked lists with a single pointer list head.
* Mostly useful for hash tables where the two pointer list head is
* too wasteful.
* You lose the ability to access the tail in O(1).
*/
struct hlist_head {
struct hlist_node *first;
};
struct hlist_node {
struct hlist_node *next, **pprev;
};
#define HLIST_HEAD_INIT { .first = NULL }
#define HLIST_HEAD(name) struct hlist_head name = { .first = NULL }
#define INIT_HLIST_HEAD(ptr) ((ptr)->first = NULL)
static inline void INIT_HLIST_NODE(struct hlist_node *h)
{
h->next = NULL;
h->pprev = NULL;
}
static inline int hlist_unhashed(const struct hlist_node *h)
{
return !h->pprev;
}
static inline int hlist_empty(const struct hlist_head *h)
{
return !h->first;
}
static inline void __hlist_del(struct hlist_node *n)
{
struct hlist_node *next = n->next;
struct hlist_node **pprev = n->pprev;
*pprev = next;
if (next)
next->pprev = pprev;
}
static inline void hlist_del(struct hlist_node *n)
{
__hlist_del(n);
n->next = LIST_POISON1;
n->pprev = LIST_POISON2;
}
static inline void hlist_del_init(struct hlist_node *n)
{
if (!hlist_unhashed(n)) {
__hlist_del(n);
INIT_HLIST_NODE(n);
}
}
static inline void hlist_add_head(struct hlist_node *n, struct hlist_head *h)
{
struct hlist_node *first = h->first;
n->next = first;
if (first)
first->pprev = &n->next;
h->first = n;
n->pprev = &h->first;
}
/* next must be != NULL */
static inline void hlist_add_before(struct hlist_node *n,
struct hlist_node *next)
{
n->pprev = next->pprev;
n->next = next;
next->pprev = &n->next;
*(n->pprev) = n;
}
static inline void hlist_add_after(struct hlist_node *n,
struct hlist_node *next)
{
next->next = n->next;
n->next = next;
next->pprev = &n->next;
if(next->next)
next->next->pprev = &next->next;
}
#define hlist_entry(ptr, type, member) container_of(ptr,type,member)
#define hlist_for_each(pos, head) \
for (pos = (head)->first; pos && ({ prefetch(pos->next); 1; }); \
pos = pos->next)
#define hlist_for_each_safe(pos, n, head) \
for (pos = (head)->first; pos && ({ n = pos->next; 1; }); \
pos = n)
/**
* hlist_for_each_entry - iterate over list of given type
* @tpos: the type * to use as a loop cursor.
* @pos: the &struct hlist_node to use as a loop cursor.
* @head: the head for your list.
* @member: the name of the hlist_node within the struct.
*/
#define hlist_for_each_entry(tpos, pos, head, member) \
for (pos = (head)->first; \
pos && ({ prefetch(pos->next); 1;}) && \
({ tpos = hlist_entry(pos, typeof(*tpos), member); 1;}); \
pos = pos->next)
/**
* hlist_for_each_entry_continue - iterate over a hlist continuing after current point
* @tpos: the type * to use as a loop cursor.
* @pos: the &struct hlist_node to use as a loop cursor.
* @member: the name of the hlist_node within the struct.
*/
#define hlist_for_each_entry_continue(tpos, pos, member) \
for (pos = (pos)->next; \
pos && ({ prefetch(pos->next); 1;}) && \
({ tpos = hlist_entry(pos, typeof(*tpos), member); 1;}); \
pos = pos->next)
/**
* hlist_for_each_entry_from - iterate over a hlist continuing from current point
* @tpos: the type * to use as a loop cursor.
* @pos: the &struct hlist_node to use as a loop cursor.
* @member: the name of the hlist_node within the struct.
*/
#define hlist_for_each_entry_from(tpos, pos, member) \
for (; pos && ({ prefetch(pos->next); 1;}) && \
({ tpos = hlist_entry(pos, typeof(*tpos), member); 1;}); \
pos = pos->next)
/**
* hlist_for_each_entry_safe - iterate over list of given type safe against removal of list entry
* @tpos: the type * to use as a loop cursor.
* @pos: the &struct hlist_node to use as a loop cursor.
* @n: another &struct hlist_node to use as temporary storage
* @head: the head for your list.
* @member: the name of the hlist_node within the struct.
*/
#define hlist_for_each_entry_safe(tpos, pos, n, head, member) \
for (pos = (head)->first; \
pos && ({ n = pos->next; 1; }) && \
({ tpos = hlist_entry(pos, typeof(*tpos), member); 1;}); \
pos = n)
#endif
|
1001-study-uboot
|
include/linux/list.h
|
C
|
gpl3
| 19,907
|
#ifndef _LINUX_STRING_H_
#define _LINUX_STRING_H_
#include <linux/types.h> /* for size_t */
#include <linux/stddef.h> /* for NULL */
#ifdef __cplusplus
extern "C" {
#endif
extern char * ___strtok;
extern char * strpbrk(const char *,const char *);
extern char * strtok(char *,const char *);
extern char * strsep(char **,const char *);
extern __kernel_size_t strspn(const char *,const char *);
/*
* Include machine specific inline routines
*/
#include <asm/string.h>
#ifndef __HAVE_ARCH_STRCPY
extern char * strcpy(char *,const char *);
#endif
#ifndef __HAVE_ARCH_STRNCPY
extern char * strncpy(char *,const char *, __kernel_size_t);
#endif
#ifndef __HAVE_ARCH_STRCAT
extern char * strcat(char *, const char *);
#endif
#ifndef __HAVE_ARCH_STRNCAT
extern char * strncat(char *, const char *, __kernel_size_t);
#endif
#ifndef __HAVE_ARCH_STRCMP
extern int strcmp(const char *,const char *);
#endif
#ifndef __HAVE_ARCH_STRNCMP
extern int strncmp(const char *,const char *,__kernel_size_t);
#endif
#if 0 /* not used - was: #ifndef __HAVE_ARCH_STRNICMP */
extern int strnicmp(const char *, const char *, __kernel_size_t);
#endif
#ifndef __HAVE_ARCH_STRCHR
extern char * strchr(const char *,int);
#endif
#ifndef __HAVE_ARCH_STRRCHR
extern char * strrchr(const char *,int);
#endif
#ifndef __HAVE_ARCH_STRSTR
extern char * strstr(const char *,const char *);
#endif
#ifndef __HAVE_ARCH_STRLEN
extern __kernel_size_t strlen(const char *);
#endif
#ifndef __HAVE_ARCH_STRNLEN
extern __kernel_size_t strnlen(const char *,__kernel_size_t);
#endif
#ifndef __HAVE_ARCH_STRDUP
extern char * strdup(const char *);
#endif
#ifndef __HAVE_ARCH_STRSWAB
extern char * strswab(const char *);
#endif
#ifndef __HAVE_ARCH_MEMSET
extern void * memset(void *,int,__kernel_size_t);
#endif
#ifndef __HAVE_ARCH_MEMCPY
extern void * memcpy(void *,const void *,__kernel_size_t);
#endif
#ifndef __HAVE_ARCH_MEMMOVE
extern void * memmove(void *,const void *,__kernel_size_t);
#endif
#ifndef __HAVE_ARCH_MEMSCAN
extern void * memscan(void *,int,__kernel_size_t);
#endif
#ifndef __HAVE_ARCH_MEMCMP
extern int memcmp(const void *,const void *,__kernel_size_t);
#endif
#ifndef __HAVE_ARCH_MEMCHR
extern void * memchr(const void *,int,__kernel_size_t);
#endif
#ifdef __cplusplus
}
#endif
#endif /* _LINUX_STRING_H_ */
|
1001-study-uboot
|
include/linux/string.h
|
C
|
gpl3
| 2,285
|
#ifndef _LINUX_FB_H
#define _LINUX_FB_H
#include <linux/types.h>
/* Definitions of frame buffers */
#define FB_MAX 32 /* sufficient for now */
#define FB_TYPE_PACKED_PIXELS 0 /* Packed Pixels */
#define FB_VISUAL_MONO01 0 /* Monochr. 1=Black 0=White */
#define FB_VISUAL_MONO10 1 /* Monochr. 1=White 0=Black */
#define FB_VISUAL_TRUECOLOR 2 /* True color */
#define FB_VISUAL_PSEUDOCOLOR 3 /* Pseudo color (like atari) */
#define FB_VISUAL_DIRECTCOLOR 4 /* Direct color */
#define FB_VISUAL_STATIC_PSEUDOCOLOR 5 /* Pseudo color readonly */
#define FB_ACCEL_NONE 0 /* no hardware accelerator */
struct fb_fix_screeninfo {
char id[16]; /* identification string eg "TT Builtin" */
unsigned long smem_start; /* Start of frame buffer mem */
/* (physical address) */
__u32 smem_len; /* Length of frame buffer mem */
__u32 type; /* see FB_TYPE_* */
__u32 type_aux; /* Interleave for interleaved Planes */
__u32 visual; /* see FB_VISUAL_* */
__u16 xpanstep; /* zero if no hardware panning */
__u16 ypanstep; /* zero if no hardware panning */
__u16 ywrapstep; /* zero if no hardware ywrap */
__u32 line_length; /* length of a line in bytes */
unsigned long mmio_start; /* Start of Memory Mapped I/O */
/* (physical address) */
__u32 mmio_len; /* Length of Memory Mapped I/O */
__u32 accel; /* Indicate to driver which */
/* specific chip/card we have */
__u16 reserved[3]; /* Reserved for future compatibility */
};
/*
* Interpretation of offset for color fields: All offsets are from the right,
* inside a "pixel" value, which is exactly 'bits_per_pixel' wide (means: you
* can use the offset as right argument to <<). A pixel afterwards is a bit
* stream and is written to video memory as that unmodified.
*
* For pseudocolor: offset and length should be the same for all color
* components. Offset specifies the position of the least significant bit
* of the pallette index in a pixel value. Length indicates the number
* of available palette entries (i.e. # of entries = 1 << length).
*/
struct fb_bitfield {
__u32 offset; /* beginning of bitfield */
__u32 length; /* length of bitfield */
__u32 msb_right;
};
#define FB_NONSTD_HAM 1 /* Hold-And-Modify (HAM) */
#define FB_NONSTD_REV_PIX_IN_B 2 /* order of pixels in each byte is reversed */
#define FB_ACTIVATE_NOW 0 /* set values immediately (or vbl)*/
#define FB_ACTIVATE_NXTOPEN 1 /* activate on next open */
#define FB_ACTIVATE_TEST 2 /* don't set, round up impossible */
#define FB_ACTIVATE_MASK 15
/* values */
#define FB_ACTIVATE_VBL 16 /* activate values on next vbl */
#define FB_CHANGE_CMAP_VBL 32 /* change colormap on vbl */
#define FB_ACTIVATE_ALL 64 /* change all VCs on this fb */
#define FB_ACTIVATE_FORCE 128 /* force apply even when no change*/
#define FB_ACTIVATE_INV_MODE 256 /* invalidate videomode */
#define FB_SYNC_HOR_HIGH_ACT 1 /* horizontal sync high active */
#define FB_SYNC_VERT_HIGH_ACT 2 /* vertical sync high active */
#define FB_SYNC_EXT 4 /* external sync */
#define FB_SYNC_COMP_HIGH_ACT 8 /* composite sync high active */
#define FB_SYNC_BROADCAST 16 /* broadcast video timings */
/* vtotal = 144d/288n/576i => PAL */
/* vtotal = 121d/242n/484i => NTSC */
#define FB_SYNC_ON_GREEN 32 /* sync on green */
#define FB_VMODE_NONINTERLACED 0 /* non interlaced */
#define FB_VMODE_INTERLACED 1 /* interlaced */
#define FB_VMODE_DOUBLE 2 /* double scan */
#define FB_VMODE_ODD_FLD_FIRST 4 /* interlaced: top line first */
#define FB_VMODE_MASK 255
#define FB_VMODE_YWRAP 256 /* ywrap instead of panning */
#define FB_VMODE_SMOOTH_XPAN 512 /* smooth xpan possible (internally used) */
#define FB_VMODE_CONUPDATE 512 /* don't update x/yoffset */
/*
* Display rotation support
*/
#define FB_ROTATE_UR 0
#define FB_ROTATE_CW 1
#define FB_ROTATE_UD 2
#define FB_ROTATE_CCW 3
#define PICOS2KHZ(a) (1000000000UL/(a))
#define KHZ2PICOS(a) (1000000000UL/(a))
struct fb_var_screeninfo {
__u32 xres; /* visible resolution */
__u32 yres;
__u32 xres_virtual; /* virtual resolution */
__u32 yres_virtual;
__u32 xoffset; /* offset from virtual to visible */
__u32 yoffset; /* resolution */
__u32 bits_per_pixel; /* guess what */
__u32 grayscale; /* != 0 Graylevels instead of colors */
struct fb_bitfield red; /* bitfield in fb mem if true color, */
struct fb_bitfield green; /* else only length is significant */
struct fb_bitfield blue;
struct fb_bitfield transp; /* transparency */
__u32 nonstd; /* != 0 Non standard pixel format */
__u32 activate; /* see FB_ACTIVATE_* */
__u32 height; /* height of picture in mm */
__u32 width; /* width of picture in mm */
__u32 accel_flags; /* (OBSOLETE) see fb_info.flags */
/* Timing: All values in pixclocks, except pixclock (of course) */
__u32 pixclock; /* pixel clock in ps (pico seconds) */
__u32 left_margin; /* time from sync to picture */
__u32 right_margin; /* time from picture to sync */
__u32 upper_margin; /* time from sync to picture */
__u32 lower_margin;
__u32 hsync_len; /* length of horizontal sync */
__u32 vsync_len; /* length of vertical sync */
__u32 sync; /* see FB_SYNC_* */
__u32 vmode; /* see FB_VMODE_* */
__u32 rotate; /* angle we rotate counter clockwise */
__u32 reserved[5]; /* Reserved for future compatibility */
};
struct fb_cmap {
__u32 start; /* First entry */
__u32 len; /* Number of entries */
__u16 *red; /* Red values */
__u16 *green;
__u16 *blue;
__u16 *transp; /* transparency, can be NULL */
};
struct fb_con2fbmap {
__u32 console;
__u32 framebuffer;
};
/* VESA Blanking Levels */
#define VESA_NO_BLANKING 0
#define VESA_VSYNC_SUSPEND 1
#define VESA_HSYNC_SUSPEND 2
#define VESA_POWERDOWN 3
enum {
/* screen: unblanked, hsync: on, vsync: on */
FB_BLANK_UNBLANK = VESA_NO_BLANKING,
/* screen: blanked, hsync: on, vsync: on */
FB_BLANK_NORMAL = VESA_NO_BLANKING + 1,
/* screen: blanked, hsync: on, vsync: off */
FB_BLANK_VSYNC_SUSPEND = VESA_VSYNC_SUSPEND + 1,
/* screen: blanked, hsync: off, vsync: on */
FB_BLANK_HSYNC_SUSPEND = VESA_HSYNC_SUSPEND + 1,
/* screen: blanked, hsync: off, vsync: off */
FB_BLANK_POWERDOWN = VESA_POWERDOWN + 1
};
#define FB_VBLANK_VBLANKING 0x001 /* currently in a vertical blank */
#define FB_VBLANK_HBLANKING 0x002 /* currently in a horizontal blank */
#define FB_VBLANK_HAVE_VBLANK 0x004 /* vertical blanks can be detected */
#define FB_VBLANK_HAVE_HBLANK 0x008 /* horizontal blanks can be detected */
#define FB_VBLANK_HAVE_COUNT 0x010 /* global retrace counter is available */
#define FB_VBLANK_HAVE_VCOUNT 0x020 /* the vcount field is valid */
#define FB_VBLANK_HAVE_HCOUNT 0x040 /* the hcount field is valid */
#define FB_VBLANK_VSYNCING 0x080 /* currently in a vsync */
#define FB_VBLANK_HAVE_VSYNC 0x100 /* verical syncs can be detected */
struct fb_vblank {
__u32 flags; /* FB_VBLANK flags */
__u32 count; /* counter of retraces since boot */
__u32 vcount; /* current scanline position */
__u32 hcount; /* current scandot position */
__u32 reserved[4]; /* reserved for future compatibility */
};
/* Internal HW accel */
#define ROP_COPY 0
#define ROP_XOR 1
struct fb_copyarea {
__u32 dx;
__u32 dy;
__u32 width;
__u32 height;
__u32 sx;
__u32 sy;
};
struct fb_fillrect {
__u32 dx; /* screen-relative */
__u32 dy;
__u32 width;
__u32 height;
__u32 color;
__u32 rop;
};
struct fb_image {
__u32 dx; /* Where to place image */
__u32 dy;
__u32 width; /* Size of image */
__u32 height;
__u32 fg_color; /* Only used when a mono bitmap */
__u32 bg_color;
__u8 depth; /* Depth of the image */
const char *data; /* Pointer to image data */
struct fb_cmap cmap; /* color map info */
};
/*
* hardware cursor control
*/
#define FB_CUR_SETIMAGE 0x01
#define FB_CUR_SETPOS 0x02
#define FB_CUR_SETHOT 0x04
#define FB_CUR_SETCMAP 0x08
#define FB_CUR_SETSHAPE 0x10
#define FB_CUR_SETSIZE 0x20
#define FB_CUR_SETALL 0xFF
struct fbcurpos {
__u16 x, y;
};
struct fb_cursor {
__u16 set; /* what to set */
__u16 enable; /* cursor on/off */
__u16 rop; /* bitop operation */
const char *mask; /* cursor mask bits */
struct fbcurpos hot; /* cursor hot spot */
struct fb_image image; /* Cursor image */
};
#ifdef CONFIG_FB_BACKLIGHT
/* Settings for the generic backlight code */
#define FB_BACKLIGHT_LEVELS 128
#define FB_BACKLIGHT_MAX 0xFF
#endif
#ifdef __KERNEL__
struct vm_area_struct;
struct fb_info;
struct device;
struct file;
/* Definitions below are used in the parsed monitor specs */
#define FB_DPMS_ACTIVE_OFF 1
#define FB_DPMS_SUSPEND 2
#define FB_DPMS_STANDBY 4
#define FB_DISP_DDI 1
#define FB_DISP_ANA_700_300 2
#define FB_DISP_ANA_714_286 4
#define FB_DISP_ANA_1000_400 8
#define FB_DISP_ANA_700_000 16
#define FB_DISP_MONO 32
#define FB_DISP_RGB 64
#define FB_DISP_MULTI 128
#define FB_DISP_UNKNOWN 256
#define FB_SIGNAL_NONE 0
#define FB_SIGNAL_BLANK_BLANK 1
#define FB_SIGNAL_SEPARATE 2
#define FB_SIGNAL_COMPOSITE 4
#define FB_SIGNAL_SYNC_ON_GREEN 8
#define FB_SIGNAL_SERRATION_ON 16
#define FB_MISC_PRIM_COLOR 1
#define FB_MISC_1ST_DETAIL 2 /* First Detailed Timing is preferred */
struct fb_chroma {
__u32 redx; /* in fraction of 1024 */
__u32 greenx;
__u32 bluex;
__u32 whitex;
__u32 redy;
__u32 greeny;
__u32 bluey;
__u32 whitey;
};
struct fb_monspecs {
struct fb_chroma chroma;
struct fb_videomode *modedb; /* mode database */
__u8 manufacturer[4]; /* Manufacturer */
__u8 monitor[14]; /* Monitor String */
__u8 serial_no[14]; /* Serial Number */
__u8 ascii[14]; /* ? */
__u32 modedb_len; /* mode database length */
__u32 model; /* Monitor Model */
__u32 serial; /* Serial Number - Integer */
__u32 year; /* Year manufactured */
__u32 week; /* Week Manufactured */
__u32 hfmin; /* hfreq lower limit (Hz) */
__u32 hfmax; /* hfreq upper limit (Hz) */
__u32 dclkmin; /* pixelclock lower limit (Hz) */
__u32 dclkmax; /* pixelclock upper limit (Hz) */
__u16 input; /* display type - see FB_DISP_* */
__u16 dpms; /* DPMS support - see FB_DPMS_ */
__u16 signal; /* Signal Type - see FB_SIGNAL_* */
__u16 vfmin; /* vfreq lower limit (Hz) */
__u16 vfmax; /* vfreq upper limit (Hz) */
__u16 gamma; /* Gamma - in fractions of 100 */
__u16 gtf : 1; /* supports GTF */
__u16 misc; /* Misc flags - see FB_MISC_* */
__u8 version; /* EDID version... */
__u8 revision; /* ...and revision */
__u8 max_x; /* Maximum horizontal size (cm) */
__u8 max_y; /* Maximum vertical size (cm) */
};
struct fb_cmap_user {
__u32 start; /* First entry */
__u32 len; /* Number of entries */
__u16 *red; /* Red values */
__u16 *green;
__u16 *blue;
__u16 *transp; /* transparency, can be NULL */
};
struct fb_image_user {
__u32 dx; /* Where to place image */
__u32 dy;
__u32 width; /* Size of image */
__u32 height;
__u32 fg_color; /* Only used when a mono bitmap */
__u32 bg_color;
__u8 depth; /* Depth of the image */
const char *data; /* Pointer to image data */
struct fb_cmap_user cmap; /* color map info */
};
struct fb_cursor_user {
__u16 set; /* what to set */
__u16 enable; /* cursor on/off */
__u16 rop; /* bitop operation */
const char *mask; /* cursor mask bits */
struct fbcurpos hot; /* cursor hot spot */
struct fb_image_user image; /* Cursor image */
};
/*
* Register/unregister for framebuffer events
*/
/* The resolution of the passed in fb_info about to change */
#define FB_EVENT_MODE_CHANGE 0x01
/* The display on this fb_info is beeing suspended, no access to the
* framebuffer is allowed any more after that call returns
*/
#define FB_EVENT_SUSPEND 0x02
/* The display on this fb_info was resumed, you can restore the display
* if you own it
*/
#define FB_EVENT_RESUME 0x03
/* An entry from the modelist was removed */
#define FB_EVENT_MODE_DELETE 0x04
/* A driver registered itself */
#define FB_EVENT_FB_REGISTERED 0x05
/* A driver unregistered itself */
#define FB_EVENT_FB_UNREGISTERED 0x06
/* CONSOLE-SPECIFIC: get console to framebuffer mapping */
#define FB_EVENT_GET_CONSOLE_MAP 0x07
/* CONSOLE-SPECIFIC: set console to framebuffer mapping */
#define FB_EVENT_SET_CONSOLE_MAP 0x08
/* A hardware display blank change occured */
#define FB_EVENT_BLANK 0x09
/* Private modelist is to be replaced */
#define FB_EVENT_NEW_MODELIST 0x0A
/* The resolution of the passed in fb_info about to change and
all vc's should be changed */
#define FB_EVENT_MODE_CHANGE_ALL 0x0B
/* A software display blank change occured */
#define FB_EVENT_CONBLANK 0x0C
/* Get drawing requirements */
#define FB_EVENT_GET_REQ 0x0D
/* Unbind from the console if possible */
#define FB_EVENT_FB_UNBIND 0x0E
struct fb_event {
struct fb_info *info;
void *data;
};
struct fb_blit_caps {
u32 x;
u32 y;
u32 len;
u32 flags;
};
/*
* Pixmap structure definition
*
* The purpose of this structure is to translate data
* from the hardware independent format of fbdev to what
* format the hardware needs.
*/
#define FB_PIXMAP_DEFAULT 1 /* used internally by fbcon */
#define FB_PIXMAP_SYSTEM 2 /* memory is in system RAM */
#define FB_PIXMAP_IO 4 /* memory is iomapped */
#define FB_PIXMAP_SYNC 256 /* set if GPU can DMA */
struct fb_pixmap {
u8 *addr; /* pointer to memory */
u32 size; /* size of buffer in bytes */
u32 offset; /* current offset to buffer */
u32 buf_align; /* byte alignment of each bitmap */
u32 scan_align; /* alignment per scanline */
u32 access_align; /* alignment per read/write (bits) */
u32 flags; /* see FB_PIXMAP_* */
u32 blit_x; /* supported bit block dimensions (1-32)*/
u32 blit_y; /* Format: blit_x = 1 << (width - 1) */
/* blit_y = 1 << (height - 1) */
/* if 0, will be set to 0xffffffff (all)*/
/* access methods */
void (*writeio)(struct fb_info *info, void *dst, void *src, unsigned int size);
void (*readio) (struct fb_info *info, void *dst, void *src, unsigned int size);
};
#ifdef CONFIG_FB_DEFERRED_IO
struct fb_deferred_io {
/* delay between mkwrite and deferred handler */
unsigned long delay;
struct mutex lock; /* mutex that protects the page list */
struct list_head pagelist; /* list of touched pages */
/* callback */
void (*deferred_io)(struct fb_info *info, struct list_head *pagelist);
};
#endif
/* FBINFO_* = fb_info.flags bit flags */
#define FBINFO_MODULE 0x0001 /* Low-level driver is a module */
#define FBINFO_HWACCEL_DISABLED 0x0002
/* When FBINFO_HWACCEL_DISABLED is set:
* Hardware acceleration is turned off. Software implementations
* of required functions (copyarea(), fillrect(), and imageblit())
* takes over; acceleration engine should be in a quiescent state */
/* hints */
#define FBINFO_PARTIAL_PAN_OK 0x0040 /* otw use pan only for double-buffering */
#define FBINFO_READS_FAST 0x0080 /* soft-copy faster than rendering */
/*
* A driver may set this flag to indicate that it does want a set_par to be
* called every time when fbcon_switch is executed. The advantage is that with
* this flag set you can really be sure that set_par is always called before
* any of the functions dependant on the correct hardware state or altering
* that state, even if you are using some broken X releases. The disadvantage
* is that it introduces unwanted delays to every console switch if set_par
* is slow. It is a good idea to try this flag in the drivers initialization
* code whenever there is a bug report related to switching between X and the
* framebuffer console.
*/
#define FBINFO_MISC_ALWAYS_SETPAR 0x40000
/*
* Host and GPU endianness differ.
*/
#define FBINFO_FOREIGN_ENDIAN 0x100000
/*
* Big endian math. This is the same flags as above, but with different
* meaning, it is set by the fb subsystem depending FOREIGN_ENDIAN flag
* and host endianness. Drivers should not use this flag.
*/
#define FBINFO_BE_MATH 0x100000
struct fb_info {
int node;
int flags;
struct fb_var_screeninfo var; /* Current var */
struct fb_fix_screeninfo fix; /* Current fix */
struct fb_monspecs monspecs; /* Current Monitor specs */
struct fb_pixmap pixmap; /* Image hardware mapper */
struct fb_pixmap sprite; /* Cursor hardware mapper */
struct fb_cmap cmap; /* Current cmap */
struct list_head modelist; /* mode list */
struct fb_videomode *mode; /* current mode */
char *screen_base; /* Virtual address */
unsigned long screen_size; /* Amount of ioremapped VRAM or 0 */
void *pseudo_palette; /* Fake palette of 16 colors */
#define FBINFO_STATE_RUNNING 0
#define FBINFO_STATE_SUSPENDED 1
u32 state; /* Hardware state i.e suspend */
void *fbcon_par; /* fbcon use-only private area */
/* From here on everything is device dependent */
void *par;
};
#define FBINFO_DEFAULT 0
#define FBINFO_FLAG_MODULE FBINFO_MODULE
#define FBINFO_FLAG_DEFAULT FBINFO_DEFAULT
/* This will go away */
#if defined(__sparc__)
/* We map all of our framebuffers such that big-endian accesses
* are what we want, so the following is sufficient.
*/
/* This will go away */
#define fb_readb sbus_readb
#define fb_readw sbus_readw
#define fb_readl sbus_readl
#define fb_readq sbus_readq
#define fb_writeb sbus_writeb
#define fb_writew sbus_writew
#define fb_writel sbus_writel
#define fb_writeq sbus_writeq
#define fb_memset sbus_memset_io
#elif defined(__i386__) || defined(__alpha__) || defined(__x86_64__) || defined(__hppa__) || defined(__sh__) || defined(__powerpc__) || defined(__avr32__) || defined(__bfin__)
#define fb_readb __raw_readb
#define fb_readw __raw_readw
#define fb_readl __raw_readl
#define fb_readq __raw_readq
#define fb_writeb __raw_writeb
#define fb_writew __raw_writew
#define fb_writel __raw_writel
#define fb_writeq __raw_writeq
#define fb_memset memset_io
#else
#define fb_readb(addr) (*(volatile u8 *) (addr))
#define fb_readw(addr) (*(volatile u16 *) (addr))
#define fb_readl(addr) (*(volatile u32 *) (addr))
#define fb_readq(addr) (*(volatile u64 *) (addr))
#define fb_writeb(b,addr) (*(volatile u8 *) (addr) = (b))
#define fb_writew(b,addr) (*(volatile u16 *) (addr) = (b))
#define fb_writel(b,addr) (*(volatile u32 *) (addr) = (b))
#define fb_writeq(b,addr) (*(volatile u64 *) (addr) = (b))
#define fb_memset memset
#endif
#define FB_LEFT_POS(p, bpp) (fb_be_math(p) ? (32 - (bpp)) : 0)
#define FB_SHIFT_HIGH(p, val, bits) (fb_be_math(p) ? (val) >> (bits) : \
(val) << (bits))
#define FB_SHIFT_LOW(p, val, bits) (fb_be_math(p) ? (val) << (bits) : \
(val) >> (bits))
/* drivers/video/fbmon.c */
#define FB_MAXTIMINGS 0
#define FB_VSYNCTIMINGS 1
#define FB_HSYNCTIMINGS 2
#define FB_DCLKTIMINGS 3
#define FB_IGNOREMON 0x100
#define FB_MODE_IS_UNKNOWN 0
#define FB_MODE_IS_DETAILED 1
#define FB_MODE_IS_STANDARD 2
#define FB_MODE_IS_VESA 4
#define FB_MODE_IS_CALCULATED 8
#define FB_MODE_IS_FIRST 16
#define FB_MODE_IS_FROM_VAR 32
/* drivers/video/fbcmap.c */
extern int fb_alloc_cmap(struct fb_cmap *cmap, int len, int transp);
extern void fb_dealloc_cmap(struct fb_cmap *cmap);
extern int fb_copy_cmap(const struct fb_cmap *from, struct fb_cmap *to);
extern int fb_cmap_to_user(const struct fb_cmap *from, struct fb_cmap_user *to);
extern int fb_set_cmap(struct fb_cmap *cmap, struct fb_info *fb_info);
extern int fb_set_user_cmap(struct fb_cmap_user *cmap, struct fb_info *fb_info);
extern const struct fb_cmap *fb_default_cmap(int len);
extern void fb_invert_cmaps(void);
struct fb_videomode {
const char *name; /* optional */
u32 refresh; /* optional */
u32 xres;
u32 yres;
u32 pixclock;
u32 left_margin;
u32 right_margin;
u32 upper_margin;
u32 lower_margin;
u32 hsync_len;
u32 vsync_len;
u32 sync;
u32 vmode;
u32 flag;
};
#endif /* __KERNEL__ */
#endif /* _LINUX_FB_H */
|
1001-study-uboot
|
include/linux/fb.h
|
C
|
gpl3
| 19,819
|
#ifndef _LINUX_TYPES_H
#define _LINUX_TYPES_H
#ifdef __KERNEL__
#include <linux/config.h>
#endif
#include <linux/posix_types.h>
#include <asm/types.h>
#ifndef __KERNEL_STRICT_NAMES
typedef __kernel_fd_set fd_set;
typedef __kernel_dev_t dev_t;
typedef __kernel_ino_t ino_t;
typedef __kernel_mode_t mode_t;
typedef __kernel_nlink_t nlink_t;
typedef __kernel_off_t off_t;
typedef __kernel_pid_t pid_t;
typedef __kernel_daddr_t daddr_t;
typedef __kernel_key_t key_t;
typedef __kernel_suseconds_t suseconds_t;
#ifdef __KERNEL__
typedef __kernel_uid32_t uid_t;
typedef __kernel_gid32_t gid_t;
typedef __kernel_uid16_t uid16_t;
typedef __kernel_gid16_t gid16_t;
#ifdef CONFIG_UID16
/* This is defined by include/asm-{arch}/posix_types.h */
typedef __kernel_old_uid_t old_uid_t;
typedef __kernel_old_gid_t old_gid_t;
#endif /* CONFIG_UID16 */
/* libc5 includes this file to define uid_t, thus uid_t can never change
* when it is included by non-kernel code
*/
#else
typedef __kernel_uid_t uid_t;
typedef __kernel_gid_t gid_t;
#endif /* __KERNEL__ */
#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
typedef __kernel_loff_t loff_t;
#endif
/*
* The following typedefs are also protected by individual ifdefs for
* historical reasons:
*/
#ifndef _SIZE_T
#define _SIZE_T
typedef __kernel_size_t size_t;
#endif
#ifndef _SSIZE_T
#define _SSIZE_T
typedef __kernel_ssize_t ssize_t;
#endif
#ifndef _PTRDIFF_T
#define _PTRDIFF_T
typedef __kernel_ptrdiff_t ptrdiff_t;
#endif
#ifndef _TIME_T
#define _TIME_T
typedef __kernel_time_t time_t;
#endif
#ifndef _CLOCK_T
#define _CLOCK_T
typedef __kernel_clock_t clock_t;
#endif
#ifndef _CADDR_T
#define _CADDR_T
typedef __kernel_caddr_t caddr_t;
#endif
/* bsd */
typedef unsigned char u_char;
typedef unsigned short u_short;
typedef unsigned int u_int;
typedef unsigned long u_long;
/* sysv */
typedef unsigned char unchar;
typedef unsigned short ushort;
typedef unsigned int uint;
typedef unsigned long ulong;
#ifndef __BIT_TYPES_DEFINED__
#define __BIT_TYPES_DEFINED__
typedef __u8 u_int8_t;
typedef __s8 int8_t;
typedef __u16 u_int16_t;
typedef __s16 int16_t;
typedef __u32 u_int32_t;
typedef __s32 int32_t;
#endif /* !(__BIT_TYPES_DEFINED__) */
typedef __u8 uint8_t;
typedef __u16 uint16_t;
typedef __u32 uint32_t;
#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
typedef __u64 uint64_t;
typedef __u64 u_int64_t;
typedef __s64 int64_t;
#endif
#endif /* __KERNEL_STRICT_NAMES */
/*
* Below are truly Linux-specific types that should never collide with
* any application/library that wants linux/types.h.
*/
#ifdef __CHECKER__
#define __bitwise__ __attribute__((bitwise))
#else
#define __bitwise__
#endif
#ifdef __CHECK_ENDIAN__
#define __bitwise __bitwise__
#else
#define __bitwise
#endif
typedef __u16 __bitwise __le16;
typedef __u16 __bitwise __be16;
typedef __u32 __bitwise __le32;
typedef __u32 __bitwise __be32;
#if defined(__GNUC__)
typedef __u64 __bitwise __le64;
typedef __u64 __bitwise __be64;
#endif
typedef __u16 __bitwise __sum16;
typedef __u32 __bitwise __wsum;
typedef unsigned __bitwise__ gfp_t;
struct ustat {
__kernel_daddr_t f_tfree;
__kernel_ino_t f_tinode;
char f_fname[6];
char f_fpack[6];
};
#endif /* _LINUX_TYPES_H */
|
1001-study-uboot
|
include/linux/types.h
|
C
|
gpl3
| 3,276
|
#ifndef _LINUX_POSIX_TYPES_H
#define _LINUX_POSIX_TYPES_H
#include <linux/stddef.h>
/*
* This allows for 1024 file descriptors: if NR_OPEN is ever grown
* beyond that you'll have to change this too. But 1024 fd's seem to be
* enough even for such "real" unices like OSF/1, so hopefully this is
* one limit that doesn't have to be changed [again].
*
* Note that POSIX wants the FD_CLEAR(fd,fdsetp) defines to be in
* <sys/time.h> (and thus <linux/time.h>) - but this is a more logical
* place for them. Solved by having dummy defines in <sys/time.h>.
*/
/*
* Those macros may have been defined in <gnu/types.h>. But we always
* use the ones here.
*/
#undef __NFDBITS
#define __NFDBITS (8 * sizeof(unsigned long))
#undef __FD_SETSIZE
#define __FD_SETSIZE 1024
#undef __FDSET_LONGS
#define __FDSET_LONGS (__FD_SETSIZE/__NFDBITS)
#undef __FDELT
#define __FDELT(d) ((d) / __NFDBITS)
#undef __FDMASK
#define __FDMASK(d) (1UL << ((d) % __NFDBITS))
typedef struct {
unsigned long fds_bits [__FDSET_LONGS];
} __kernel_fd_set;
/* Type of a signal handler. */
typedef void (*__kernel_sighandler_t)(int);
/* Type of a SYSV IPC key. */
typedef int __kernel_key_t;
#include <asm/posix_types.h>
#endif /* _LINUX_POSIX_TYPES_H */
|
1001-study-uboot
|
include/linux/posix_types.h
|
C
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gpl3
| 1,241
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/*
* ethtool.h: Defines for Linux ethtool.
*
* Copyright (C) 1998 David S. Miller (davem@redhat.com)
* Copyright 2001 Jeff Garzik <jgarzik@pobox.com>
* Portions Copyright 2001 Sun Microsystems (thockin@sun.com)
* Portions Copyright 2002 Intel (eli.kupermann@intel.com,
* christopher.leech@intel.com,
* scott.feldman@intel.com)
* Portions Copyright (C) Sun Microsystems 2008
*/
#ifndef _LINUX_ETHTOOL_H
#define _LINUX_ETHTOOL_H
#include <linux/types.h>
/* This should work for both 32 and 64 bit userland. */
struct ethtool_cmd {
__u32 cmd;
__u32 supported; /* Features this interface supports */
__u32 advertising; /* Features this interface advertises */
__u16 speed; /* The forced speed, 10Mb, 100Mb, gigabit */
__u8 duplex; /* Duplex, half or full */
__u8 port; /* Which connector port */
__u8 phy_address;
__u8 transceiver; /* Which transceiver to use */
__u8 autoneg; /* Enable or disable autonegotiation */
__u8 mdio_support;
__u32 maxtxpkt; /* Tx pkts before generating tx int */
__u32 maxrxpkt; /* Rx pkts before generating rx int */
__u16 speed_hi;
__u8 eth_tp_mdix;
__u8 reserved2;
__u32 lp_advertising; /* Features the link partner advertises */
__u32 reserved[2];
};
static inline void ethtool_cmd_speed_set(struct ethtool_cmd *ep,
__u32 speed)
{
ep->speed = (__u16)speed;
ep->speed_hi = (__u16)(speed >> 16);
}
static inline __u32 ethtool_cmd_speed(struct ethtool_cmd *ep)
{
return (ep->speed_hi << 16) | ep->speed;
}
#define ETHTOOL_FWVERS_LEN 32
#define ETHTOOL_BUSINFO_LEN 32
/* these strings are set to whatever the driver author decides... */
struct ethtool_drvinfo {
__u32 cmd;
char driver[32]; /* driver short name, "tulip", "eepro100" */
char version[32]; /* driver version string */
char fw_version[ETHTOOL_FWVERS_LEN]; /* firmware version string */
char bus_info[ETHTOOL_BUSINFO_LEN]; /* Bus info for this IF. */
/* For PCI devices, use pci_name(pci_dev). */
char reserved1[32];
char reserved2[12];
/*
* Some struct members below are filled in
* using ops->get_sset_count(). Obtaining
* this info from ethtool_drvinfo is now
* deprecated; Use ETHTOOL_GSSET_INFO
* instead.
*/
__u32 n_priv_flags; /* number of flags valid in ETHTOOL_GPFLAGS */
__u32 n_stats; /* number of u64's from ETHTOOL_GSTATS */
__u32 testinfo_len;
__u32 eedump_len; /* Size of data from ETHTOOL_GEEPROM (bytes) */
__u32 regdump_len; /* Size of data from ETHTOOL_GREGS (bytes) */
};
#define SOPASS_MAX 6
/* wake-on-lan settings */
struct ethtool_wolinfo {
__u32 cmd;
__u32 supported;
__u32 wolopts;
__u8 sopass[SOPASS_MAX]; /* SecureOn(tm) password */
};
/* for passing single values */
struct ethtool_value {
__u32 cmd;
__u32 data;
};
/* for passing big chunks of data */
struct ethtool_regs {
__u32 cmd;
__u32 version; /* driver-specific, indicates different chips/revs */
__u32 len; /* bytes */
__u8 data[0];
};
/* for passing EEPROM chunks */
struct ethtool_eeprom {
__u32 cmd;
__u32 magic;
__u32 offset; /* in bytes */
__u32 len; /* in bytes */
__u8 data[0];
};
/* for configuring coalescing parameters of chip */
struct ethtool_coalesce {
__u32 cmd; /* ETHTOOL_{G,S}COALESCE */
/* How many usecs to delay an RX interrupt after
* a packet arrives. If 0, only rx_max_coalesced_frames
* is used.
*/
__u32 rx_coalesce_usecs;
/* How many packets to delay an RX interrupt after
* a packet arrives. If 0, only rx_coalesce_usecs is
* used. It is illegal to set both usecs and max frames
* to zero as this would cause RX interrupts to never be
* generated.
*/
__u32 rx_max_coalesced_frames;
/* Same as above two parameters, except that these values
* apply while an IRQ is being serviced by the host. Not
* all cards support this feature and the values are ignored
* in that case.
*/
__u32 rx_coalesce_usecs_irq;
__u32 rx_max_coalesced_frames_irq;
/* How many usecs to delay a TX interrupt after
* a packet is sent. If 0, only tx_max_coalesced_frames
* is used.
*/
__u32 tx_coalesce_usecs;
/* How many packets to delay a TX interrupt after
* a packet is sent. If 0, only tx_coalesce_usecs is
* used. It is illegal to set both usecs and max frames
* to zero as this would cause TX interrupts to never be
* generated.
*/
__u32 tx_max_coalesced_frames;
/* Same as above two parameters, except that these values
* apply while an IRQ is being serviced by the host. Not
* all cards support this feature and the values are ignored
* in that case.
*/
__u32 tx_coalesce_usecs_irq;
__u32 tx_max_coalesced_frames_irq;
/* How many usecs to delay in-memory statistics
* block updates. Some drivers do not have an in-memory
* statistic block, and in such cases this value is ignored.
* This value must not be zero.
*/
__u32 stats_block_coalesce_usecs;
/* Adaptive RX/TX coalescing is an algorithm implemented by
* some drivers to improve latency under low packet rates and
* improve throughput under high packet rates. Some drivers
* only implement one of RX or TX adaptive coalescing. Anything
* not implemented by the driver causes these values to be
* silently ignored.
*/
__u32 use_adaptive_rx_coalesce;
__u32 use_adaptive_tx_coalesce;
/* When the packet rate (measured in packets per second)
* is below pkt_rate_low, the {rx,tx}_*_low parameters are
* used.
*/
__u32 pkt_rate_low;
__u32 rx_coalesce_usecs_low;
__u32 rx_max_coalesced_frames_low;
__u32 tx_coalesce_usecs_low;
__u32 tx_max_coalesced_frames_low;
/* When the packet rate is below pkt_rate_high but above
* pkt_rate_low (both measured in packets per second) the
* normal {rx,tx}_* coalescing parameters are used.
*/
/* When the packet rate is (measured in packets per second)
* is above pkt_rate_high, the {rx,tx}_*_high parameters are
* used.
*/
__u32 pkt_rate_high;
__u32 rx_coalesce_usecs_high;
__u32 rx_max_coalesced_frames_high;
__u32 tx_coalesce_usecs_high;
__u32 tx_max_coalesced_frames_high;
/* How often to do adaptive coalescing packet rate sampling,
* measured in seconds. Must not be zero.
*/
__u32 rate_sample_interval;
};
/* for configuring RX/TX ring parameters */
struct ethtool_ringparam {
__u32 cmd; /* ETHTOOL_{G,S}RINGPARAM */
/* Read only attributes. These indicate the maximum number
* of pending RX/TX ring entries the driver will allow the
* user to set.
*/
__u32 rx_max_pending;
__u32 rx_mini_max_pending;
__u32 rx_jumbo_max_pending;
__u32 tx_max_pending;
/* Values changeable by the user. The valid values are
* in the range 1 to the "*_max_pending" counterpart above.
*/
__u32 rx_pending;
__u32 rx_mini_pending;
__u32 rx_jumbo_pending;
__u32 tx_pending;
};
/* for configuring link flow control parameters */
struct ethtool_pauseparam {
__u32 cmd; /* ETHTOOL_{G,S}PAUSEPARAM */
/* If the link is being auto-negotiated (via ethtool_cmd.autoneg
* being true) the user may set 'autonet' here non-zero to have the
* pause parameters be auto-negotiated too. In such a case, the
* {rx,tx}_pause values below determine what capabilities are
* advertised.
*
* If 'autoneg' is zero or the link is not being auto-negotiated,
* then {rx,tx}_pause force the driver to use/not-use pause
* flow control.
*/
__u32 autoneg;
__u32 rx_pause;
__u32 tx_pause;
};
#define ETH_GSTRING_LEN 32
enum ethtool_stringset {
ETH_SS_TEST = 0,
ETH_SS_STATS,
ETH_SS_PRIV_FLAGS,
ETH_SS_NTUPLE_FILTERS,
ETH_SS_FEATURES,
};
/* for passing string sets for data tagging */
struct ethtool_gstrings {
__u32 cmd; /* ETHTOOL_GSTRINGS */
__u32 string_set; /* string set id e.c. ETH_SS_TEST, etc*/
__u32 len; /* number of strings in the string set */
__u8 data[0];
};
struct ethtool_sset_info {
__u32 cmd; /* ETHTOOL_GSSET_INFO */
__u32 reserved;
__u64 sset_mask; /* input: each bit selects an sset to query */
/* output: each bit a returned sset */
__u32 data[0]; /* ETH_SS_xxx count, in order, based on bits
in sset_mask. One bit implies one
__u32, two bits implies two
__u32's, etc. */
};
enum ethtool_test_flags {
ETH_TEST_FL_OFFLINE = (1 << 0), /* online / offline */
ETH_TEST_FL_FAILED = (1 << 1), /* test passed / failed */
};
/* for requesting NIC test and getting results*/
struct ethtool_test {
__u32 cmd; /* ETHTOOL_TEST */
__u32 flags; /* ETH_TEST_FL_xxx */
__u32 reserved;
__u32 len; /* result length, in number of u64 elements */
__u64 data[0];
};
/* for dumping NIC-specific statistics */
struct ethtool_stats {
__u32 cmd; /* ETHTOOL_GSTATS */
__u32 n_stats; /* number of u64's being returned */
__u64 data[0];
};
struct ethtool_perm_addr {
__u32 cmd; /* ETHTOOL_GPERMADDR */
__u32 size;
__u8 data[0];
};
/* boolean flags controlling per-interface behavior characteristics.
* When reading, the flag indicates whether or not a certain behavior
* is enabled/present. When writing, the flag indicates whether
* or not the driver should turn on (set) or off (clear) a behavior.
*
* Some behaviors may read-only (unconditionally absent or present).
* If such is the case, return EINVAL in the set-flags operation if the
* flag differs from the read-only value.
*/
enum ethtool_flags {
ETH_FLAG_TXVLAN = (1 << 7), /* TX VLAN offload enabled */
ETH_FLAG_RXVLAN = (1 << 8), /* RX VLAN offload enabled */
ETH_FLAG_LRO = (1 << 15), /* LRO is enabled */
ETH_FLAG_NTUPLE = (1 << 27), /* N-tuple filters enabled */
ETH_FLAG_RXHASH = (1 << 28),
};
/* The following structures are for supporting RX network flow
* classification and RX n-tuple configuration. Note, all multibyte
* fields, e.g., ip4src, ip4dst, psrc, pdst, spi, etc. are expected to
* be in network byte order.
*/
/**
* struct ethtool_tcpip4_spec - flow specification for TCP/IPv4 etc.
* @ip4src: Source host
* @ip4dst: Destination host
* @psrc: Source port
* @pdst: Destination port
* @tos: Type-of-service
*
* This can be used to specify a TCP/IPv4, UDP/IPv4 or SCTP/IPv4 flow.
*/
struct ethtool_tcpip4_spec {
__be32 ip4src;
__be32 ip4dst;
__be16 psrc;
__be16 pdst;
__u8 tos;
};
/**
* struct ethtool_ah_espip4_spec - flow specification for IPsec/IPv4
* @ip4src: Source host
* @ip4dst: Destination host
* @spi: Security parameters index
* @tos: Type-of-service
*
* This can be used to specify an IPsec transport or tunnel over IPv4.
*/
struct ethtool_ah_espip4_spec {
__be32 ip4src;
__be32 ip4dst;
__be32 spi;
__u8 tos;
};
#define ETH_RX_NFC_IP4 1
/**
* struct ethtool_usrip4_spec - general flow specification for IPv4
* @ip4src: Source host
* @ip4dst: Destination host
* @l4_4_bytes: First 4 bytes of transport (layer 4) header
* @tos: Type-of-service
* @ip_ver: Value must be %ETH_RX_NFC_IP4; mask must be 0
* @proto: Transport protocol number; mask must be 0
*/
struct ethtool_usrip4_spec {
__be32 ip4src;
__be32 ip4dst;
__be32 l4_4_bytes;
__u8 tos;
__u8 ip_ver;
__u8 proto;
};
/**
* struct ethtool_rxfh_indir - command to get or set RX flow hash indirection
* @cmd: Specific command number - %ETHTOOL_GRXFHINDIR or %ETHTOOL_SRXFHINDIR
* @size: On entry, the array size of the user buffer. On return from
* %ETHTOOL_GRXFHINDIR, the array size of the hardware indirection table.
* @ring_index: RX ring/queue index for each hash value
*/
struct ethtool_rxfh_indir {
__u32 cmd;
__u32 size;
__u32 ring_index[0];
};
#define ETHTOOL_FLASH_MAX_FILENAME 128
enum ethtool_flash_op_type {
ETHTOOL_FLASH_ALL_REGIONS = 0,
};
/* for passing firmware flashing related parameters */
struct ethtool_flash {
__u32 cmd;
__u32 region;
char data[ETHTOOL_FLASH_MAX_FILENAME];
};
/* for returning and changing feature sets */
/**
* struct ethtool_get_features_block - block with state of 32 features
* @available: mask of changeable features
* @requested: mask of features requested to be enabled if possible
* @active: mask of currently enabled features
* @never_changed: mask of features not changeable for any device
*/
struct ethtool_get_features_block {
__u32 available;
__u32 requested;
__u32 active;
__u32 never_changed;
};
/**
* struct ethtool_gfeatures - command to get state of device's features
* @cmd: command number = %ETHTOOL_GFEATURES
* @size: in: number of elements in the features[] array;
* out: number of elements in features[] needed to hold all features
* @features: state of features
*/
struct ethtool_gfeatures {
__u32 cmd;
__u32 size;
struct ethtool_get_features_block features[0];
};
/**
* struct ethtool_set_features_block - block with request for 32 features
* @valid: mask of features to be changed
* @requested: values of features to be changed
*/
struct ethtool_set_features_block {
__u32 valid;
__u32 requested;
};
/**
* struct ethtool_sfeatures - command to request change in device's features
* @cmd: command number = %ETHTOOL_SFEATURES
* @size: array size of the features[] array
* @features: feature change masks
*/
struct ethtool_sfeatures {
__u32 cmd;
__u32 size;
struct ethtool_set_features_block features[0];
};
/*
* %ETHTOOL_SFEATURES changes features present in features[].valid to the
* values of corresponding bits in features[].requested. Bits in .requested
* not set in .valid or not changeable are ignored.
*
* Returns %EINVAL when .valid contains undefined or never-changable bits
* or size is not equal to required number of features words (32-bit blocks).
* Returns >= 0 if request was completed; bits set in the value mean:
* %ETHTOOL_F_UNSUPPORTED - there were bits set in .valid that are not
* changeable (not present in %ETHTOOL_GFEATURES' features[].available)
* those bits were ignored.
* %ETHTOOL_F_WISH - some or all changes requested were recorded but the
* resulting state of bits masked by .valid is not equal to .requested.
* Probably there are other device-specific constraints on some features
* in the set. When %ETHTOOL_F_UNSUPPORTED is set, .valid is considered
* here as though ignored bits were cleared.
* %ETHTOOL_F_COMPAT - some or all changes requested were made by calling
* compatibility functions. Requested offload state cannot be properly
* managed by kernel.
*
* Meaning of bits in the masks are obtained by %ETHTOOL_GSSET_INFO (number of
* bits in the arrays - always multiple of 32) and %ETHTOOL_GSTRINGS commands
* for ETH_SS_FEATURES string set. First entry in the table corresponds to least
* significant bit in features[0] fields. Empty strings mark undefined features.
*/
enum ethtool_sfeatures_retval_bits {
ETHTOOL_F_UNSUPPORTED__BIT,
ETHTOOL_F_WISH__BIT,
ETHTOOL_F_COMPAT__BIT,
};
#define ETHTOOL_F_UNSUPPORTED (1 << ETHTOOL_F_UNSUPPORTED__BIT)
#define ETHTOOL_F_WISH (1 << ETHTOOL_F_WISH__BIT)
#define ETHTOOL_F_COMPAT (1 << ETHTOOL_F_COMPAT__BIT)
/* CMDs currently supported */
#define ETHTOOL_GSET 0x00000001 /* Get settings. */
#define ETHTOOL_SSET 0x00000002 /* Set settings. */
#define ETHTOOL_GDRVINFO 0x00000003 /* Get driver info. */
#define ETHTOOL_GREGS 0x00000004 /* Get NIC registers. */
#define ETHTOOL_GWOL 0x00000005 /* Get wake-on-lan options. */
#define ETHTOOL_SWOL 0x00000006 /* Set wake-on-lan options. */
#define ETHTOOL_GMSGLVL 0x00000007 /* Get driver message level */
#define ETHTOOL_SMSGLVL 0x00000008 /* Set driver msg level. */
#define ETHTOOL_NWAY_RST 0x00000009 /* Restart autonegotiation. */
/* Get link status for host, i.e. whether the interface *and* the
* physical port (if there is one) are up (ethtool_value). */
#define ETHTOOL_GLINK 0x0000000a
#define ETHTOOL_GEEPROM 0x0000000b /* Get EEPROM data */
#define ETHTOOL_SEEPROM 0x0000000c /* Set EEPROM data. */
#define ETHTOOL_GCOALESCE 0x0000000e /* Get coalesce config */
#define ETHTOOL_SCOALESCE 0x0000000f /* Set coalesce config. */
#define ETHTOOL_GRINGPARAM 0x00000010 /* Get ring parameters */
#define ETHTOOL_SRINGPARAM 0x00000011 /* Set ring parameters. */
#define ETHTOOL_GPAUSEPARAM 0x00000012 /* Get pause parameters */
#define ETHTOOL_SPAUSEPARAM 0x00000013 /* Set pause parameters. */
#define ETHTOOL_GRXCSUM 0x00000014 /* Get RX hw csum enable (ethtool_value) */
#define ETHTOOL_SRXCSUM 0x00000015 /* Set RX hw csum enable (ethtool_value) */
#define ETHTOOL_GTXCSUM 0x00000016 /* Get TX hw csum enable (ethtool_value) */
#define ETHTOOL_STXCSUM 0x00000017 /* Set TX hw csum enable (ethtool_value) */
#define ETHTOOL_GSG 0x00000018 /* Get scatter-gather enable
* (ethtool_value) */
#define ETHTOOL_SSG 0x00000019 /* Set scatter-gather enable
* (ethtool_value). */
#define ETHTOOL_TEST 0x0000001a /* execute NIC self-test. */
#define ETHTOOL_GSTRINGS 0x0000001b /* get specified string set */
#define ETHTOOL_PHYS_ID 0x0000001c /* identify the NIC */
#define ETHTOOL_GSTATS 0x0000001d /* get NIC-specific statistics */
#define ETHTOOL_GTSO 0x0000001e /* Get TSO enable (ethtool_value) */
#define ETHTOOL_STSO 0x0000001f /* Set TSO enable (ethtool_value) */
#define ETHTOOL_GPERMADDR 0x00000020 /* Get permanent hardware address */
#define ETHTOOL_GUFO 0x00000021 /* Get UFO enable (ethtool_value) */
#define ETHTOOL_SUFO 0x00000022 /* Set UFO enable (ethtool_value) */
#define ETHTOOL_GGSO 0x00000023 /* Get GSO enable (ethtool_value) */
#define ETHTOOL_SGSO 0x00000024 /* Set GSO enable (ethtool_value) */
#define ETHTOOL_GFLAGS 0x00000025 /* Get flags bitmap(ethtool_value) */
#define ETHTOOL_SFLAGS 0x00000026 /* Set flags bitmap(ethtool_value) */
#define ETHTOOL_GPFLAGS 0x00000027 /* Get driver-private flags bitmap */
#define ETHTOOL_SPFLAGS 0x00000028 /* Set driver-private flags bitmap */
#define ETHTOOL_GRXFH 0x00000029 /* Get RX flow hash configuration */
#define ETHTOOL_SRXFH 0x0000002a /* Set RX flow hash configuration */
#define ETHTOOL_GGRO 0x0000002b /* Get GRO enable (ethtool_value) */
#define ETHTOOL_SGRO 0x0000002c /* Set GRO enable (ethtool_value) */
#define ETHTOOL_GRXRINGS 0x0000002d /* Get RX rings available for LB */
#define ETHTOOL_GRXCLSRLCNT 0x0000002e /* Get RX class rule count */
#define ETHTOOL_GRXCLSRULE 0x0000002f /* Get RX classification rule */
#define ETHTOOL_GRXCLSRLALL 0x00000030 /* Get all RX classification rule */
#define ETHTOOL_SRXCLSRLDEL 0x00000031 /* Delete RX classification rule */
#define ETHTOOL_SRXCLSRLINS 0x00000032 /* Insert RX classification rule */
#define ETHTOOL_FLASHDEV 0x00000033 /* Flash firmware to device */
#define ETHTOOL_RESET 0x00000034 /* Reset hardware */
#define ETHTOOL_SRXNTUPLE 0x00000035 /* Add an n-tuple filter to device */
#define ETHTOOL_GRXNTUPLE 0x00000036 /* Get n-tuple filters from device */
#define ETHTOOL_GSSET_INFO 0x00000037 /* Get string set info */
#define ETHTOOL_GRXFHINDIR 0x00000038 /* Get RX flow hash indir'n table */
#define ETHTOOL_SRXFHINDIR 0x00000039 /* Set RX flow hash indir'n table */
#define ETHTOOL_GFEATURES 0x0000003a /* Get device offload settings */
#define ETHTOOL_SFEATURES 0x0000003b /* Change device offload settings */
/* compatibility with older code */
#define SPARC_ETH_GSET ETHTOOL_GSET
#define SPARC_ETH_SSET ETHTOOL_SSET
/* Indicates what features are supported by the interface. */
#define SUPPORTED_10baseT_Half (1 << 0)
#define SUPPORTED_10baseT_Full (1 << 1)
#define SUPPORTED_100baseT_Half (1 << 2)
#define SUPPORTED_100baseT_Full (1 << 3)
#define SUPPORTED_1000baseT_Half (1 << 4)
#define SUPPORTED_1000baseT_Full (1 << 5)
#define SUPPORTED_Autoneg (1 << 6)
#define SUPPORTED_TP (1 << 7)
#define SUPPORTED_AUI (1 << 8)
#define SUPPORTED_MII (1 << 9)
#define SUPPORTED_FIBRE (1 << 10)
#define SUPPORTED_BNC (1 << 11)
#define SUPPORTED_10000baseT_Full (1 << 12)
#define SUPPORTED_Pause (1 << 13)
#define SUPPORTED_Asym_Pause (1 << 14)
#define SUPPORTED_2500baseX_Full (1 << 15)
#define SUPPORTED_Backplane (1 << 16)
#define SUPPORTED_1000baseKX_Full (1 << 17)
#define SUPPORTED_10000baseKX4_Full (1 << 18)
#define SUPPORTED_10000baseKR_Full (1 << 19)
#define SUPPORTED_10000baseR_FEC (1 << 20)
/* Indicates what features are advertised by the interface. */
#define ADVERTISED_10baseT_Half (1 << 0)
#define ADVERTISED_10baseT_Full (1 << 1)
#define ADVERTISED_100baseT_Half (1 << 2)
#define ADVERTISED_100baseT_Full (1 << 3)
#define ADVERTISED_1000baseT_Half (1 << 4)
#define ADVERTISED_1000baseT_Full (1 << 5)
#define ADVERTISED_Autoneg (1 << 6)
#define ADVERTISED_TP (1 << 7)
#define ADVERTISED_AUI (1 << 8)
#define ADVERTISED_MII (1 << 9)
#define ADVERTISED_FIBRE (1 << 10)
#define ADVERTISED_BNC (1 << 11)
#define ADVERTISED_10000baseT_Full (1 << 12)
#define ADVERTISED_Pause (1 << 13)
#define ADVERTISED_Asym_Pause (1 << 14)
#define ADVERTISED_2500baseX_Full (1 << 15)
#define ADVERTISED_Backplane (1 << 16)
#define ADVERTISED_1000baseKX_Full (1 << 17)
#define ADVERTISED_10000baseKX4_Full (1 << 18)
#define ADVERTISED_10000baseKR_Full (1 << 19)
#define ADVERTISED_10000baseR_FEC (1 << 20)
/* The following are all involved in forcing a particular link
* mode for the device for setting things. When getting the
* devices settings, these indicate the current mode and whether
* it was foced up into this mode or autonegotiated.
*/
/* The forced speed, 10Mb, 100Mb, gigabit, 2.5Gb, 10GbE. */
#define SPEED_10 10
#define SPEED_100 100
#define SPEED_1000 1000
#define SPEED_2500 2500
#define SPEED_10000 10000
/* Duplex, half or full. */
#define DUPLEX_HALF 0x00
#define DUPLEX_FULL 0x01
/* Which connector port. */
#define PORT_TP 0x00
#define PORT_AUI 0x01
#define PORT_MII 0x02
#define PORT_FIBRE 0x03
#define PORT_BNC 0x04
#define PORT_DA 0x05
#define PORT_NONE 0xef
#define PORT_OTHER 0xff
/* Which transceiver to use. */
#define XCVR_INTERNAL 0x00
#define XCVR_EXTERNAL 0x01
#define XCVR_DUMMY1 0x02
#define XCVR_DUMMY2 0x03
#define XCVR_DUMMY3 0x04
/* Enable or disable autonegotiation. If this is set to enable,
* the forced link modes above are completely ignored.
*/
#define AUTONEG_DISABLE 0x00
#define AUTONEG_ENABLE 0x01
/* Mode MDI or MDI-X */
#define ETH_TP_MDI_INVALID 0x00
#define ETH_TP_MDI 0x01
#define ETH_TP_MDI_X 0x02
/* Wake-On-Lan options. */
#define WAKE_PHY (1 << 0)
#define WAKE_UCAST (1 << 1)
#define WAKE_MCAST (1 << 2)
#define WAKE_BCAST (1 << 3)
#define WAKE_ARP (1 << 4)
#define WAKE_MAGIC (1 << 5)
#define WAKE_MAGICSECURE (1 << 6) /* only meaningful if WAKE_MAGIC */
/* L2-L4 network traffic flow types */
#define TCP_V4_FLOW 0x01 /* hash or spec (tcp_ip4_spec) */
#define UDP_V4_FLOW 0x02 /* hash or spec (udp_ip4_spec) */
#define SCTP_V4_FLOW 0x03 /* hash or spec (sctp_ip4_spec) */
#define AH_ESP_V4_FLOW 0x04 /* hash only */
#define TCP_V6_FLOW 0x05 /* hash only */
#define UDP_V6_FLOW 0x06 /* hash only */
#define SCTP_V6_FLOW 0x07 /* hash only */
#define AH_ESP_V6_FLOW 0x08 /* hash only */
#define AH_V4_FLOW 0x09 /* hash or spec (ah_ip4_spec) */
#define ESP_V4_FLOW 0x0a /* hash or spec (esp_ip4_spec) */
#define AH_V6_FLOW 0x0b /* hash only */
#define ESP_V6_FLOW 0x0c /* hash only */
#define IP_USER_FLOW 0x0d /* spec only (usr_ip4_spec) */
#define IPV4_FLOW 0x10 /* hash only */
#define IPV6_FLOW 0x11 /* hash only */
#define ETHER_FLOW 0x12 /* spec only (ether_spec) */
/* L3-L4 network traffic flow hash options */
#define RXH_L2DA (1 << 1)
#define RXH_VLAN (1 << 2)
#define RXH_L3_PROTO (1 << 3)
#define RXH_IP_SRC (1 << 4)
#define RXH_IP_DST (1 << 5)
#define RXH_L4_B_0_1 (1 << 6) /* src port in case of TCP/UDP/SCTP */
#define RXH_L4_B_2_3 (1 << 7) /* dst port in case of TCP/UDP/SCTP */
#define RXH_DISCARD (1 << 31)
#define RX_CLS_FLOW_DISC 0xffffffffffffffffULL
/* Reset flags */
/* The reset() operation must clear the flags for the components which
* were actually reset. On successful return, the flags indicate the
* components which were not reset, either because they do not exist
* in the hardware or because they cannot be reset independently. The
* driver must never reset any components that were not requested.
*/
enum ethtool_reset_flags {
/* These flags represent components dedicated to the interface
* the command is addressed to. Shift any flag left by
* ETH_RESET_SHARED_SHIFT to reset a shared component of the
* same type.
*/
ETH_RESET_MGMT = 1 << 0, /* Management processor */
ETH_RESET_IRQ = 1 << 1, /* Interrupt requester */
ETH_RESET_DMA = 1 << 2, /* DMA engine */
ETH_RESET_FILTER = 1 << 3, /* Filtering/flow direction */
ETH_RESET_OFFLOAD = 1 << 4, /* Protocol offload */
ETH_RESET_MAC = 1 << 5, /* Media access controller */
ETH_RESET_PHY = 1 << 6, /* Transceiver/PHY */
ETH_RESET_RAM = 1 << 7, /* RAM shared between
* multiple components */
ETH_RESET_DEDICATED = 0x0000ffff, /* All components dedicated to
* this interface */
ETH_RESET_ALL = 0xffffffff, /* All components used by this
* interface, even if shared */
};
#define ETH_RESET_SHARED_SHIFT 16
#endif /* _LINUX_ETHTOOL_H */
|
1001-study-uboot
|
include/linux/ethtool.h
|
C
|
gpl3
| 24,940
|
#ifndef _SCREEN_INFO_H
#define _SCREEN_INFO_H
#include <linux/types.h>
/*
* These are set up by the setup-routine at boot-time:
*/
struct screen_info {
__u8 orig_x; /* 0x00 */
__u8 orig_y; /* 0x01 */
__u16 ext_mem_k; /* 0x02 */
__u16 orig_video_page; /* 0x04 */
__u8 orig_video_mode; /* 0x06 */
__u8 orig_video_cols; /* 0x07 */
__u8 flags; /* 0x08 */
__u8 unused2; /* 0x09 */
__u16 orig_video_ega_bx;/* 0x0a */
__u16 unused3; /* 0x0c */
__u8 orig_video_lines; /* 0x0e */
__u8 orig_video_isVGA; /* 0x0f */
__u16 orig_video_points;/* 0x10 */
/* VESA graphic mode -- linear frame buffer */
__u16 lfb_width; /* 0x12 */
__u16 lfb_height; /* 0x14 */
__u16 lfb_depth; /* 0x16 */
__u32 lfb_base; /* 0x18 */
__u32 lfb_size; /* 0x1c */
__u16 cl_magic, cl_offset; /* 0x20 */
__u16 lfb_linelength; /* 0x24 */
__u8 red_size; /* 0x26 */
__u8 red_pos; /* 0x27 */
__u8 green_size; /* 0x28 */
__u8 green_pos; /* 0x29 */
__u8 blue_size; /* 0x2a */
__u8 blue_pos; /* 0x2b */
__u8 rsvd_size; /* 0x2c */
__u8 rsvd_pos; /* 0x2d */
__u16 vesapm_seg; /* 0x2e */
__u16 vesapm_off; /* 0x30 */
__u16 pages; /* 0x32 */
__u16 vesa_attributes; /* 0x34 */
__u32 capabilities; /* 0x36 */
__u8 _reserved[6]; /* 0x3a */
} __attribute__((packed));
#define VIDEO_TYPE_MDA 0x10 /* Monochrome Text Display */
#define VIDEO_TYPE_CGA 0x11 /* CGA Display */
#define VIDEO_TYPE_EGAM 0x20 /* EGA/VGA in Monochrome Mode */
#define VIDEO_TYPE_EGAC 0x21 /* EGA in Color Mode */
#define VIDEO_TYPE_VGAC 0x22 /* VGA+ in Color Mode */
#define VIDEO_TYPE_VLFB 0x23 /* VESA VGA in graphic mode */
#define VIDEO_TYPE_PICA_S3 0x30 /* ACER PICA-61 local S3 video */
#define VIDEO_TYPE_MIPS_G364 0x31 /* MIPS Magnum 4000 G364 video */
#define VIDEO_TYPE_SGI 0x33 /* Various SGI graphics hardware */
#define VIDEO_TYPE_TGAC 0x40 /* DEC TGA */
#define VIDEO_TYPE_SUN 0x50 /* Sun frame buffer. */
#define VIDEO_TYPE_SUNPCI 0x51 /* Sun PCI based frame buffer. */
#define VIDEO_TYPE_PMAC 0x60 /* PowerMacintosh frame buffer. */
#define VIDEO_TYPE_EFI 0x70 /* EFI graphic mode */
#define VIDEO_FLAGS_NOCURSOR (1 << 0) /* The video mode has no cursor set */
#ifdef __KERNEL__
extern struct screen_info screen_info;
#define ORIG_X (screen_info.orig_x)
#define ORIG_Y (screen_info.orig_y)
#define ORIG_VIDEO_MODE (screen_info.orig_video_mode)
#define ORIG_VIDEO_COLS (screen_info.orig_video_cols)
#define ORIG_VIDEO_EGA_BX (screen_info.orig_video_ega_bx)
#define ORIG_VIDEO_LINES (screen_info.orig_video_lines)
#define ORIG_VIDEO_ISVGA (screen_info.orig_video_isVGA)
#define ORIG_VIDEO_POINTS (screen_info.orig_video_points)
#endif /* __KERNEL__ */
#endif /* _SCREEN_INFO_H */
|
1001-study-uboot
|
include/linux/screen_info.h
|
C
|
gpl3
| 2,761
|
/*
* linux/mii.h: definitions for MII-compatible transceivers
* Originally drivers/net/sunhme.h.
*
* Copyright (C) 1996, 1999, 2001 David S. Miller (davem@redhat.com)
*/
#ifndef __LINUX_MII_H__
#define __LINUX_MII_H__
/* Generic MII registers. */
#define MII_BMCR 0x00 /* Basic mode control register */
#define MII_BMSR 0x01 /* Basic mode status register */
#define MII_PHYSID1 0x02 /* PHYS ID 1 */
#define MII_PHYSID2 0x03 /* PHYS ID 2 */
#define MII_ADVERTISE 0x04 /* Advertisement control reg */
#define MII_LPA 0x05 /* Link partner ability reg */
#define MII_EXPANSION 0x06 /* Expansion register */
#define MII_CTRL1000 0x09 /* 1000BASE-T control */
#define MII_STAT1000 0x0a /* 1000BASE-T status */
#define MII_ESTATUS 0x0f /* Extended Status */
#define MII_DCOUNTER 0x12 /* Disconnect counter */
#define MII_FCSCOUNTER 0x13 /* False carrier counter */
#define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */
#define MII_RERRCOUNTER 0x15 /* Receive error counter */
#define MII_SREVISION 0x16 /* Silicon revision */
#define MII_RESV1 0x17 /* Reserved... */
#define MII_LBRERROR 0x18 /* Lpback, rx, bypass error */
#define MII_PHYADDR 0x19 /* PHY address */
#define MII_RESV2 0x1a /* Reserved... */
#define MII_TPISTATUS 0x1b /* TPI status for 10mbps */
#define MII_NCONFIG 0x1c /* Network interface config */
/* Basic mode control register. */
#define BMCR_RESV 0x003f /* Unused... */
#define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */
#define BMCR_CTST 0x0080 /* Collision test */
#define BMCR_FULLDPLX 0x0100 /* Full duplex */
#define BMCR_ANRESTART 0x0200 /* Auto negotiation restart */
#define BMCR_ISOLATE 0x0400 /* Disconnect DP83840 from MII */
#define BMCR_PDOWN 0x0800 /* Powerdown the DP83840 */
#define BMCR_ANENABLE 0x1000 /* Enable auto negotiation */
#define BMCR_SPEED100 0x2000 /* Select 100Mbps */
#define BMCR_LOOPBACK 0x4000 /* TXD loopback bits */
#define BMCR_RESET 0x8000 /* Reset the DP83840 */
/* Basic mode status register. */
#define BMSR_ERCAP 0x0001 /* Ext-reg capability */
#define BMSR_JCD 0x0002 /* Jabber detected */
#define BMSR_LSTATUS 0x0004 /* Link status */
#define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */
#define BMSR_RFAULT 0x0010 /* Remote fault detected */
#define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */
#define BMSR_RESV 0x00c0 /* Unused... */
#define BMSR_ESTATEN 0x0100 /* Extended Status in R15 */
#define BMSR_100HALF2 0x0200 /* Can do 100BASE-T2 HDX */
#define BMSR_100FULL2 0x0400 /* Can do 100BASE-T2 FDX */
#define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */
#define BMSR_10FULL 0x1000 /* Can do 10mbps, full-duplex */
#define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */
#define BMSR_100FULL 0x4000 /* Can do 100mbps, full-duplex */
#define BMSR_100BASE4 0x8000 /* Can do 100mbps, 4k packets */
/* Advertisement control register. */
#define ADVERTISE_SLCT 0x001f /* Selector bits */
#define ADVERTISE_CSMA 0x0001 /* Only selector supported */
#define ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */
#define ADVERTISE_1000XFULL 0x0020 /* Try for 1000BASE-X full-duplex */
#define ADVERTISE_10FULL 0x0040 /* Try for 10mbps full-duplex */
#define ADVERTISE_1000XHALF 0x0040 /* Try for 1000BASE-X half-duplex */
#define ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */
#define ADVERTISE_1000XPAUSE 0x0080 /* Try for 1000BASE-X pause */
#define ADVERTISE_100FULL 0x0100 /* Try for 100mbps full-duplex */
#define ADVERTISE_1000XPSE_ASYM 0x0100 /* Try for 1000BASE-X asym pause */
#define ADVERTISE_100BASE4 0x0200 /* Try for 100mbps 4k packets */
#define ADVERTISE_PAUSE_CAP 0x0400 /* Try for pause */
#define ADVERTISE_PAUSE_ASYM 0x0800 /* Try for asymetric pause */
#define ADVERTISE_RESV 0x1000 /* Unused... */
#define ADVERTISE_RFAULT 0x2000 /* Say we can detect faults */
#define ADVERTISE_LPACK 0x4000 /* Ack link partners response */
#define ADVERTISE_NPAGE 0x8000 /* Next page bit */
#define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \
ADVERTISE_CSMA)
#define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \
ADVERTISE_100HALF | ADVERTISE_100FULL)
/* Link partner ability register. */
#define LPA_SLCT 0x001f /* Same as advertise selector */
#define LPA_10HALF 0x0020 /* Can do 10mbps half-duplex */
#define LPA_1000XFULL 0x0020 /* Can do 1000BASE-X full-duplex */
#define LPA_10FULL 0x0040 /* Can do 10mbps full-duplex */
#define LPA_1000XHALF 0x0040 /* Can do 1000BASE-X half-duplex */
#define LPA_100HALF 0x0080 /* Can do 100mbps half-duplex */
#define LPA_1000XPAUSE 0x0080 /* Can do 1000BASE-X pause */
#define LPA_100FULL 0x0100 /* Can do 100mbps full-duplex */
#define LPA_1000XPAUSE_ASYM 0x0100 /* Can do 1000BASE-X pause asym*/
#define LPA_100BASE4 0x0200 /* Can do 100mbps 4k packets */
#define LPA_PAUSE_CAP 0x0400 /* Can pause */
#define LPA_PAUSE_ASYM 0x0800 /* Can pause asymetrically */
#define LPA_RESV 0x1000 /* Unused... */
#define LPA_RFAULT 0x2000 /* Link partner faulted */
#define LPA_LPACK 0x4000 /* Link partner acked us */
#define LPA_NPAGE 0x8000 /* Next page bit */
#define LPA_DUPLEX (LPA_10FULL | LPA_100FULL)
#define LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4)
/* Expansion register for auto-negotiation. */
#define EXPANSION_NWAY 0x0001 /* Can do N-way auto-nego */
#define EXPANSION_LCWP 0x0002 /* Got new RX page code word */
#define EXPANSION_ENABLENPAGE 0x0004 /* This enables npage words */
#define EXPANSION_NPCAPABLE 0x0008 /* Link partner supports npage */
#define EXPANSION_MFAULTS 0x0010 /* Multiple faults detected */
#define EXPANSION_RESV 0xffe0 /* Unused... */
#define ESTATUS_1000_TFULL 0x2000 /* Can do 1000BT Full */
#define ESTATUS_1000_THALF 0x1000 /* Can do 1000BT Half */
/* N-way test register. */
#define NWAYTEST_RESV1 0x00ff /* Unused... */
#define NWAYTEST_LOOPBACK 0x0100 /* Enable loopback for N-way */
#define NWAYTEST_RESV2 0xfe00 /* Unused... */
/* 1000BASE-T Control register */
#define ADVERTISE_1000FULL 0x0200 /* Advertise 1000BASE-T full duplex */
#define ADVERTISE_1000HALF 0x0100 /* Advertise 1000BASE-T half duplex */
/* 1000BASE-T Status register */
#define LPA_1000LOCALRXOK 0x2000 /* Link partner local receiver status */
#define LPA_1000REMRXOK 0x1000 /* Link partner remote receiver status */
#define LPA_1000FULL 0x0800 /* Link partner 1000BASE-T full duplex */
#define LPA_1000HALF 0x0400 /* Link partner 1000BASE-T half duplex */
/* Flow control flags */
#define FLOW_CTRL_TX 0x01
#define FLOW_CTRL_RX 0x02
/**
* mii_nway_result
* @negotiated: value of MII ANAR and'd with ANLPAR
*
* Given a set of MII abilities, check each bit and returns the
* currently supported media, in the priority order defined by
* IEEE 802.3u. We use LPA_xxx constants but note this is not the
* value of LPA solely, as described above.
*
* The one exception to IEEE 802.3u is that 100baseT4 is placed
* between 100T-full and 100T-half. If your phy does not support
* 100T4 this is fine. If your phy places 100T4 elsewhere in the
* priority order, you will need to roll your own function.
*/
static inline unsigned int mii_nway_result (unsigned int negotiated)
{
unsigned int ret;
if (negotiated & LPA_100FULL)
ret = LPA_100FULL;
else if (negotiated & LPA_100BASE4)
ret = LPA_100BASE4;
else if (negotiated & LPA_100HALF)
ret = LPA_100HALF;
else if (negotiated & LPA_10FULL)
ret = LPA_10FULL;
else
ret = LPA_10HALF;
return ret;
}
/**
* mii_duplex
* @duplex_lock: Non-zero if duplex is locked at full
* @negotiated: value of MII ANAR and'd with ANLPAR
*
* A small helper function for a common case. Returns one
* if the media is operating or locked at full duplex, and
* returns zero otherwise.
*/
static inline unsigned int mii_duplex (unsigned int duplex_lock,
unsigned int negotiated)
{
if (duplex_lock)
return 1;
if (mii_nway_result(negotiated) & LPA_DUPLEX)
return 1;
return 0;
}
#endif /* __LINUX_MII_H__ */
|
1001-study-uboot
|
include/linux/mii.h
|
C
|
gpl3
| 8,420
|
#ifndef __LINUX_COMPILER_H
#error "Please don't include <linux/compiler-gcc3.h> directly, include <linux/compiler.h> instead."
#endif
#if __GNUC_MINOR__ >= 3
# define __used __attribute__((__used__))
#else
# define __used __attribute__((__unused__))
#endif
#if __GNUC_MINOR__ >= 4
#define __must_check __attribute__((warn_unused_result))
#endif
/*
* A trick to suppress uninitialized variable warning without generating any
* code
*/
#define uninitialized_var(x) x = x
#define __always_inline inline __attribute__((always_inline))
|
1001-study-uboot
|
include/linux/compiler-gcc3.h
|
C
|
gpl3
| 544
|
#ifndef _LINUX_STDDEF_H
#define _LINUX_STDDEF_H
#undef NULL
#if defined(__cplusplus)
#define NULL 0
#else
#define NULL ((void *)0)
#endif
#ifndef _SIZE_T
#include <linux/types.h>
#endif
#undef offsetof
#define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *)0)->MEMBER)
#endif
|
1001-study-uboot
|
include/linux/stddef.h
|
C
|
gpl3
| 276
|
/* mc146818rtc.h - register definitions for the Real-Time-Clock / CMOS RAM
* Copyright Torsten Duwe <duwe@informatik.uni-erlangen.de> 1993
* derived from Data Sheet, Copyright Motorola 1984 (!).
* It was written to be part of the Linux operating system.
*/
/* permission is hereby granted to copy, modify and redistribute this code
* in terms of the GNU Library General Public License, Version 2 or later,
* at your option.
*/
#ifndef _MC146818RTC_H
#define _MC146818RTC_H
#include <asm/io.h>
#include <linux/rtc.h> /* get the user-level API */
#include <asm/mc146818rtc.h> /* register access macros */
/**********************************************************************
* register summary
**********************************************************************/
#define RTC_SECONDS 0
#define RTC_SECONDS_ALARM 1
#define RTC_MINUTES 2
#define RTC_MINUTES_ALARM 3
#define RTC_HOURS 4
#define RTC_HOURS_ALARM 5
/* RTC_*_alarm is always true if 2 MSBs are set */
# define RTC_ALARM_DONT_CARE 0xC0
#define RTC_DAY_OF_WEEK 6
#define RTC_DAY_OF_MONTH 7
#define RTC_MONTH 8
#define RTC_YEAR 9
/* control registers - Moto names
*/
#define RTC_REG_A 10
#define RTC_REG_B 11
#define RTC_REG_C 12
#define RTC_REG_D 13
/**********************************************************************
* register details
**********************************************************************/
#define RTC_FREQ_SELECT RTC_REG_A
/* update-in-progress - set to "1" 244 microsecs before RTC goes off the bus,
* reset after update (may take 1.984ms @ 32768Hz RefClock) is complete,
* totalling to a max high interval of 2.228 ms.
*/
# define RTC_UIP 0x80
# define RTC_DIV_CTL 0x70
/* divider control: refclock values 4.194 / 1.049 MHz / 32.768 kHz */
# define RTC_REF_CLCK_4MHZ 0x00
# define RTC_REF_CLCK_1MHZ 0x10
# define RTC_REF_CLCK_32KHZ 0x20
/* 2 values for divider stage reset, others for "testing purposes only" */
# define RTC_DIV_RESET1 0x60
# define RTC_DIV_RESET2 0x70
/* Periodic intr. / Square wave rate select. 0=none, 1=32.8kHz,... 15=2Hz */
# define RTC_RATE_SELECT 0x0F
/**********************************************************************/
#define RTC_CONTROL RTC_REG_B
# define RTC_SET 0x80 /* disable updates for clock setting */
# define RTC_PIE 0x40 /* periodic interrupt enable */
# define RTC_AIE 0x20 /* alarm interrupt enable */
# define RTC_UIE 0x10 /* update-finished interrupt enable */
# define RTC_SQWE 0x08 /* enable square-wave output */
# define RTC_DM_BINARY 0x04 /* all time/date values are BCD if clear */
# define RTC_24H 0x02 /* 24 hour mode - else hours bit 7 means pm */
# define RTC_DST_EN 0x01 /* auto switch DST - works f. USA only */
/**********************************************************************/
#define RTC_INTR_FLAGS RTC_REG_C
/* caution - cleared by read */
# define RTC_IRQF 0x80 /* any of the following 3 is active */
# define RTC_PF 0x40
# define RTC_AF 0x20
# define RTC_UF 0x10
/**********************************************************************/
#define RTC_VALID RTC_REG_D
# define RTC_VRT 0x80 /* valid RAM and time */
/**********************************************************************/
#endif /* _MC146818RTC_H */
|
1001-study-uboot
|
include/linux/mc146818rtc.h
|
C
|
gpl3
| 3,371
|
/*
* linux/include/linux/edd.h
* Copyright (C) 2002, 2003, 2004 Dell Inc.
* by Matt Domsch <Matt_Domsch@dell.com>
*
* structures and definitions for the int 13h, ax={41,48}h
* BIOS Enhanced Disk Drive Services
* This is based on the T13 group document D1572 Revision 0 (August 14 2002)
* available at http://www.t13.org/docs2002/d1572r0.pdf. It is
* very similar to D1484 Revision 3 http://www.t13.org/docs2002/d1484r3.pdf
*
* In a nutshell, arch/{i386,x86_64}/boot/setup.S populates a scratch
* table in the boot_params that contains a list of BIOS-enumerated
* boot devices.
* In arch/{i386,x86_64}/kernel/setup.c, this information is
* transferred into the edd structure, and in drivers/firmware/edd.c, that
* information is used to identify BIOS boot disk. The code in setup.S
* is very sensitive to the size of these structures.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License v2.0 as published by
* the Free Software Foundation
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#ifndef _LINUX_EDD_H
#define _LINUX_EDD_H
#include <linux/types.h>
#define EDDNR 0x1e9 /* addr of number of edd_info structs at EDDBUF
in boot_params - treat this as 1 byte */
#define EDDBUF 0xd00 /* addr of edd_info structs in boot_params */
#define EDDMAXNR 6 /* number of edd_info structs starting at EDDBUF */
#define EDDEXTSIZE 8 /* change these if you muck with the structures */
#define EDDPARMSIZE 74
#define CHECKEXTENSIONSPRESENT 0x41
#define GETDEVICEPARAMETERS 0x48
#define LEGACYGETDEVICEPARAMETERS 0x08
#define EDDMAGIC1 0x55AA
#define EDDMAGIC2 0xAA55
#define READ_SECTORS 0x02 /* int13 AH=0x02 is READ_SECTORS command */
#define EDD_MBR_SIG_OFFSET 0x1B8 /* offset of signature in the MBR */
#define EDD_MBR_SIG_BUF 0x290 /* addr in boot params */
#define EDD_MBR_SIG_MAX 16 /* max number of signatures to store */
#define EDD_MBR_SIG_NR_BUF 0x1ea /* addr of number of MBR signtaures at EDD_MBR_SIG_BUF
in boot_params - treat this as 1 byte */
#ifndef __ASSEMBLY__
#define EDD_EXT_FIXED_DISK_ACCESS (1 << 0)
#define EDD_EXT_DEVICE_LOCKING_AND_EJECTING (1 << 1)
#define EDD_EXT_ENHANCED_DISK_DRIVE_SUPPORT (1 << 2)
#define EDD_EXT_64BIT_EXTENSIONS (1 << 3)
#define EDD_INFO_DMA_BOUNDARY_ERROR_TRANSPARENT (1 << 0)
#define EDD_INFO_GEOMETRY_VALID (1 << 1)
#define EDD_INFO_REMOVABLE (1 << 2)
#define EDD_INFO_WRITE_VERIFY (1 << 3)
#define EDD_INFO_MEDIA_CHANGE_NOTIFICATION (1 << 4)
#define EDD_INFO_LOCKABLE (1 << 5)
#define EDD_INFO_NO_MEDIA_PRESENT (1 << 6)
#define EDD_INFO_USE_INT13_FN50 (1 << 7)
struct edd_device_params {
__u16 length;
__u16 info_flags;
__u32 num_default_cylinders;
__u32 num_default_heads;
__u32 sectors_per_track;
__u64 number_of_sectors;
__u16 bytes_per_sector;
__u32 dpte_ptr; /* 0xFFFFFFFF for our purposes */
__u16 key; /* = 0xBEDD */
__u8 device_path_info_length; /* = 44 */
__u8 reserved2;
__u16 reserved3;
__u8 host_bus_type[4];
__u8 interface_type[8];
union {
struct {
__u16 base_address;
__u16 reserved1;
__u32 reserved2;
} __attribute__ ((packed)) isa;
struct {
__u8 bus;
__u8 slot;
__u8 function;
__u8 channel;
__u32 reserved;
} __attribute__ ((packed)) pci;
/* pcix is same as pci */
struct {
__u64 reserved;
} __attribute__ ((packed)) ibnd;
struct {
__u64 reserved;
} __attribute__ ((packed)) xprs;
struct {
__u64 reserved;
} __attribute__ ((packed)) htpt;
struct {
__u64 reserved;
} __attribute__ ((packed)) unknown;
} interface_path;
union {
struct {
__u8 device;
__u8 reserved1;
__u16 reserved2;
__u32 reserved3;
__u64 reserved4;
} __attribute__ ((packed)) ata;
struct {
__u8 device;
__u8 lun;
__u8 reserved1;
__u8 reserved2;
__u32 reserved3;
__u64 reserved4;
} __attribute__ ((packed)) atapi;
struct {
__u16 id;
__u64 lun;
__u16 reserved1;
__u32 reserved2;
} __attribute__ ((packed)) scsi;
struct {
__u64 serial_number;
__u64 reserved;
} __attribute__ ((packed)) usb;
struct {
__u64 eui;
__u64 reserved;
} __attribute__ ((packed)) i1394;
struct {
__u64 wwid;
__u64 lun;
} __attribute__ ((packed)) fibre;
struct {
__u64 identity_tag;
__u64 reserved;
} __attribute__ ((packed)) i2o;
struct {
__u32 array_number;
__u32 reserved1;
__u64 reserved2;
} __attribute__ ((packed)) raid;
struct {
__u8 device;
__u8 reserved1;
__u16 reserved2;
__u32 reserved3;
__u64 reserved4;
} __attribute__ ((packed)) sata;
struct {
__u64 reserved1;
__u64 reserved2;
} __attribute__ ((packed)) unknown;
} device_path;
__u8 reserved4;
__u8 checksum;
} __attribute__ ((packed));
struct edd_info {
__u8 device;
__u8 version;
__u16 interface_support;
__u16 legacy_max_cylinder;
__u8 legacy_max_head;
__u8 legacy_sectors_per_track;
struct edd_device_params params;
} __attribute__ ((packed));
struct edd {
unsigned int mbr_signature[EDD_MBR_SIG_MAX];
struct edd_info edd_info[EDDMAXNR];
unsigned char mbr_signature_nr;
unsigned char edd_info_nr;
};
#ifdef __KERNEL__
extern struct edd edd;
#endif /* __KERNEL__ */
#endif /*!__ASSEMBLY__ */
#endif /* _LINUX_EDD_H */
|
1001-study-uboot
|
include/linux/edd.h
|
C
|
gpl3
| 5,609
|
#ifndef _LINUX_MATH64_H
#define _LINUX_MATH64_H
#include <linux/types.h>
#if BITS_PER_LONG == 64
/**
* div_u64_rem - unsigned 64bit divide with 32bit divisor with remainder
*
* This is commonly provided by 32bit archs to provide an optimized 64bit
* divide.
*/
static inline u64 div_u64_rem(u64 dividend, u32 divisor, u32 *remainder)
{
*remainder = dividend % divisor;
return dividend / divisor;
}
/**
* div_s64_rem - signed 64bit divide with 32bit divisor with remainder
*/
static inline s64 div_s64_rem(s64 dividend, s32 divisor, s32 *remainder)
{
*remainder = dividend % divisor;
return dividend / divisor;
}
/**
* div64_u64 - unsigned 64bit divide with 64bit divisor
*/
static inline u64 div64_u64(u64 dividend, u64 divisor)
{
return dividend / divisor;
}
#elif BITS_PER_LONG == 32
#ifndef div_u64_rem
static inline u64 div_u64_rem(u64 dividend, u32 divisor, u32 *remainder)
{
*remainder = do_div(dividend, divisor);
return dividend;
}
#endif
#ifndef div_s64_rem
extern s64 div_s64_rem(s64 dividend, s32 divisor, s32 *remainder);
#endif
#ifndef div64_u64
extern u64 div64_u64(u64 dividend, u64 divisor);
#endif
#endif /* BITS_PER_LONG */
/**
* div_u64 - unsigned 64bit divide with 32bit divisor
*
* This is the most common 64bit divide and should be used if possible,
* as many 32bit archs can optimize this variant better than a full 64bit
* divide.
*/
#ifndef div_u64
static inline u64 div_u64(u64 dividend, u32 divisor)
{
u32 remainder;
return div_u64_rem(dividend, divisor, &remainder);
}
#endif
/**
* div_s64 - signed 64bit divide with 32bit divisor
*/
#ifndef div_s64
static inline s64 div_s64(s64 dividend, s32 divisor)
{
s32 remainder;
return div_s64_rem(dividend, divisor, &remainder);
}
#endif
u32 iter_div_u64_rem(u64 dividend, u32 divisor, u64 *remainder);
#endif /* _LINUX_MATH64_H */
|
1001-study-uboot
|
include/linux/math64.h
|
C
|
gpl3
| 1,844
|
#ifndef _LINUX_BYTEORDER_BIG_ENDIAN_H
#define _LINUX_BYTEORDER_BIG_ENDIAN_H
#ifndef __BIG_ENDIAN
#define __BIG_ENDIAN 4321
#endif
#ifndef __BIG_ENDIAN_BITFIELD
#define __BIG_ENDIAN_BITFIELD
#endif
#define __BYTE_ORDER __BIG_ENDIAN
#include <linux/byteorder/swab.h>
#define __constant_htonl(x) ((__u32)(x))
#define __constant_ntohl(x) ((__u32)(x))
#define __constant_htons(x) ((__u16)(x))
#define __constant_ntohs(x) ((__u16)(x))
#define __constant_cpu_to_le64(x) ___swab64((x))
#define __constant_le64_to_cpu(x) ___swab64((x))
#define __constant_cpu_to_le32(x) ___swab32((x))
#define __constant_le32_to_cpu(x) ___swab32((x))
#define __constant_cpu_to_le16(x) ___swab16((x))
#define __constant_le16_to_cpu(x) ___swab16((x))
#define __constant_cpu_to_be64(x) ((__u64)(x))
#define __constant_be64_to_cpu(x) ((__u64)(x))
#define __constant_cpu_to_be32(x) ((__u32)(x))
#define __constant_be32_to_cpu(x) ((__u32)(x))
#define __constant_cpu_to_be16(x) ((__u16)(x))
#define __constant_be16_to_cpu(x) ((__u16)(x))
#define __cpu_to_le64(x) __swab64((x))
#define __le64_to_cpu(x) __swab64((x))
#define __cpu_to_le32(x) __swab32((x))
#define __le32_to_cpu(x) __swab32((x))
#define __cpu_to_le16(x) __swab16((x))
#define __le16_to_cpu(x) __swab16((x))
#define __cpu_to_be64(x) ((__u64)(x))
#define __be64_to_cpu(x) ((__u64)(x))
#define __cpu_to_be32(x) ((__u32)(x))
#define __be32_to_cpu(x) ((__u32)(x))
#define __cpu_to_be16(x) ((__u16)(x))
#define __be16_to_cpu(x) ((__u16)(x))
#define __cpu_to_le64p(x) __swab64p((x))
#define __le64_to_cpup(x) __swab64p((x))
#define __cpu_to_le32p(x) __swab32p((x))
#define __le32_to_cpup(x) __swab32p((x))
#define __cpu_to_le16p(x) __swab16p((x))
#define __le16_to_cpup(x) __swab16p((x))
#define __cpu_to_be64p(x) (*(__u64*)(x))
#define __be64_to_cpup(x) (*(__u64*)(x))
#define __cpu_to_be32p(x) (*(__u32*)(x))
#define __be32_to_cpup(x) (*(__u32*)(x))
#define __cpu_to_be16p(x) (*(__u16*)(x))
#define __be16_to_cpup(x) (*(__u16*)(x))
#define __cpu_to_le64s(x) __swab64s((x))
#define __le64_to_cpus(x) __swab64s((x))
#define __cpu_to_le32s(x) __swab32s((x))
#define __le32_to_cpus(x) __swab32s((x))
#define __cpu_to_le16s(x) __swab16s((x))
#define __le16_to_cpus(x) __swab16s((x))
#define __cpu_to_be64s(x) do {} while (0)
#define __be64_to_cpus(x) do {} while (0)
#define __cpu_to_be32s(x) do {} while (0)
#define __be32_to_cpus(x) do {} while (0)
#define __cpu_to_be16s(x) do {} while (0)
#define __be16_to_cpus(x) do {} while (0)
#include <linux/byteorder/generic.h>
#endif /* _LINUX_BYTEORDER_BIG_ENDIAN_H */
|
1001-study-uboot
|
include/linux/byteorder/big_endian.h
|
C
|
gpl3
| 2,542
|
#ifndef _LINUX_BYTEORDER_GENERIC_H
#define _LINUX_BYTEORDER_GENERIC_H
/*
* linux/byteorder_generic.h
* Generic Byte-reordering support
*
* Francois-Rene Rideau <fare@tunes.org> 19970707
* gathered all the good ideas from all asm-foo/byteorder.h into one file,
* cleaned them up.
* I hope it is compliant with non-GCC compilers.
* I decided to put __BYTEORDER_HAS_U64__ in byteorder.h,
* because I wasn't sure it would be ok to put it in types.h
* Upgraded it to 2.1.43
* Francois-Rene Rideau <fare@tunes.org> 19971012
* Upgraded it to 2.1.57
* to please Linus T., replaced huge #ifdef's between little/big endian
* by nestedly #include'd files.
* Francois-Rene Rideau <fare@tunes.org> 19971205
* Made it to 2.1.71; now a facelift:
* Put files under include/linux/byteorder/
* Split swab from generic support.
*
* TODO:
* = Regular kernel maintainers could also replace all these manual
* byteswap macros that remain, disseminated among drivers,
* after some grep or the sources...
* = Linus might want to rename all these macros and files to fit his taste,
* to fit his personal naming scheme.
* = it seems that a few drivers would also appreciate
* nybble swapping support...
* = every architecture could add their byteswap macro in asm/byteorder.h
* see how some architectures already do (i386, alpha, ppc, etc)
* = cpu_to_beXX and beXX_to_cpu might some day need to be well
* distinguished throughout the kernel. This is not the case currently,
* since little endian, big endian, and pdp endian machines needn't it.
* But this might be the case for, say, a port of Linux to 20/21 bit
* architectures (and F21 Linux addict around?).
*/
/*
* The following macros are to be defined by <asm/byteorder.h>:
*
* Conversion of long and short int between network and host format
* ntohl(__u32 x)
* ntohs(__u16 x)
* htonl(__u32 x)
* htons(__u16 x)
* It seems that some programs (which? where? or perhaps a standard? POSIX?)
* might like the above to be functions, not macros (why?).
* if that's true, then detect them, and take measures.
* Anyway, the measure is: define only ___ntohl as a macro instead,
* and in a separate file, have
* unsigned long inline ntohl(x){return ___ntohl(x);}
*
* The same for constant arguments
* __constant_ntohl(__u32 x)
* __constant_ntohs(__u16 x)
* __constant_htonl(__u32 x)
* __constant_htons(__u16 x)
*
* Conversion of XX-bit integers (16- 32- or 64-)
* between native CPU format and little/big endian format
* 64-bit stuff only defined for proper architectures
* cpu_to_[bl]eXX(__uXX x)
* [bl]eXX_to_cpu(__uXX x)
*
* The same, but takes a pointer to the value to convert
* cpu_to_[bl]eXXp(__uXX x)
* [bl]eXX_to_cpup(__uXX x)
*
* The same, but change in situ
* cpu_to_[bl]eXXs(__uXX x)
* [bl]eXX_to_cpus(__uXX x)
*
* See asm-foo/byteorder.h for examples of how to provide
* architecture-optimized versions
*
*/
#if defined(__KERNEL__)
/*
* inside the kernel, we can use nicknames;
* outside of it, we must avoid POSIX namespace pollution...
*/
#define cpu_to_le64 __cpu_to_le64
#define le64_to_cpu __le64_to_cpu
#define cpu_to_le32 __cpu_to_le32
#define le32_to_cpu __le32_to_cpu
#define cpu_to_le16 __cpu_to_le16
#define le16_to_cpu __le16_to_cpu
#define cpu_to_be64 __cpu_to_be64
#define be64_to_cpu __be64_to_cpu
#define cpu_to_be32 __cpu_to_be32
#define be32_to_cpu __be32_to_cpu
#define cpu_to_be16 __cpu_to_be16
#define be16_to_cpu __be16_to_cpu
#define cpu_to_le64p __cpu_to_le64p
#define le64_to_cpup __le64_to_cpup
#define cpu_to_le32p __cpu_to_le32p
#define le32_to_cpup __le32_to_cpup
#define cpu_to_le16p __cpu_to_le16p
#define le16_to_cpup __le16_to_cpup
#define cpu_to_be64p __cpu_to_be64p
#define be64_to_cpup __be64_to_cpup
#define cpu_to_be32p __cpu_to_be32p
#define be32_to_cpup __be32_to_cpup
#define cpu_to_be16p __cpu_to_be16p
#define be16_to_cpup __be16_to_cpup
#define cpu_to_le64s __cpu_to_le64s
#define le64_to_cpus __le64_to_cpus
#define cpu_to_le32s __cpu_to_le32s
#define le32_to_cpus __le32_to_cpus
#define cpu_to_le16s __cpu_to_le16s
#define le16_to_cpus __le16_to_cpus
#define cpu_to_be64s __cpu_to_be64s
#define be64_to_cpus __be64_to_cpus
#define cpu_to_be32s __cpu_to_be32s
#define be32_to_cpus __be32_to_cpus
#define cpu_to_be16s __cpu_to_be16s
#define be16_to_cpus __be16_to_cpus
#endif
/*
* Handle ntohl and suches. These have various compatibility
* issues - like we want to give the prototype even though we
* also have a macro for them in case some strange program
* wants to take the address of the thing or something..
*
* Note that these used to return a "long" in libc5, even though
* long is often 64-bit these days.. Thus the casts.
*
* They have to be macros in order to do the constant folding
* correctly - if the argument passed into a inline function
* it is no longer constant according to gcc..
*/
#undef ntohl
#undef ntohs
#undef htonl
#undef htons
/*
* Do the prototypes. Somebody might want to take the
* address or some such sick thing..
*/
#if defined(__KERNEL__) || (defined (__GLIBC__) && __GLIBC__ >= 2)
extern __u32 ntohl(__u32);
extern __u32 htonl(__u32);
#else
extern unsigned long int ntohl(unsigned long int);
extern unsigned long int htonl(unsigned long int);
#endif
extern unsigned short int ntohs(unsigned short int);
extern unsigned short int htons(unsigned short int);
#if defined(__GNUC__) && (__GNUC__ >= 2)
#define ___htonl(x) __cpu_to_be32(x)
#define ___htons(x) __cpu_to_be16(x)
#define ___ntohl(x) __be32_to_cpu(x)
#define ___ntohs(x) __be16_to_cpu(x)
#if defined(__KERNEL__) || (defined (__GLIBC__) && __GLIBC__ >= 2)
#define htonl(x) ___htonl(x)
#define ntohl(x) ___ntohl(x)
#else
#define htonl(x) ((unsigned long)___htonl(x))
#define ntohl(x) ((unsigned long)___ntohl(x))
#endif
#define htons(x) ___htons(x)
#define ntohs(x) ___ntohs(x)
#endif /* OPTIMIZE */
#endif /* _LINUX_BYTEORDER_GENERIC_H */
|
1001-study-uboot
|
include/linux/byteorder/generic.h
|
C
|
gpl3
| 5,991
|
#ifndef _LINUX_BYTEORDER_LITTLE_ENDIAN_H
#define _LINUX_BYTEORDER_LITTLE_ENDIAN_H
#ifndef __LITTLE_ENDIAN
#define __LITTLE_ENDIAN 1234
#endif
#ifndef __LITTLE_ENDIAN_BITFIELD
#define __LITTLE_ENDIAN_BITFIELD
#endif
#define __BYTE_ORDER __LITTLE_ENDIAN
#include <linux/byteorder/swab.h>
#define __constant_htonl(x) ___constant_swab32((x))
#define __constant_ntohl(x) ___constant_swab32((x))
#define __constant_htons(x) ___constant_swab16((x))
#define __constant_ntohs(x) ___constant_swab16((x))
#define __constant_cpu_to_le64(x) ((__u64)(x))
#define __constant_le64_to_cpu(x) ((__u64)(x))
#define __constant_cpu_to_le32(x) ((__u32)(x))
#define __constant_le32_to_cpu(x) ((__u32)(x))
#define __constant_cpu_to_le16(x) ((__u16)(x))
#define __constant_le16_to_cpu(x) ((__u16)(x))
#define __constant_cpu_to_be64(x) ___constant_swab64((x))
#define __constant_be64_to_cpu(x) ___constant_swab64((x))
#define __constant_cpu_to_be32(x) ___constant_swab32((x))
#define __constant_be32_to_cpu(x) ___constant_swab32((x))
#define __constant_cpu_to_be16(x) ___constant_swab16((x))
#define __constant_be16_to_cpu(x) ___constant_swab16((x))
#define __cpu_to_le64(x) ((__u64)(x))
#define __le64_to_cpu(x) ((__u64)(x))
#define __cpu_to_le32(x) ((__u32)(x))
#define __le32_to_cpu(x) ((__u32)(x))
#define __cpu_to_le16(x) ((__u16)(x))
#define __le16_to_cpu(x) ((__u16)(x))
#define __cpu_to_be64(x) __swab64((x))
#define __be64_to_cpu(x) __swab64((x))
#define __cpu_to_be32(x) __swab32((x))
#define __be32_to_cpu(x) __swab32((x))
#define __cpu_to_be16(x) __swab16((x))
#define __be16_to_cpu(x) __swab16((x))
#define __cpu_to_le64p(x) (*(__u64*)(x))
#define __le64_to_cpup(x) (*(__u64*)(x))
#define __cpu_to_le32p(x) (*(__u32*)(x))
#define __le32_to_cpup(x) (*(__u32*)(x))
#define __cpu_to_le16p(x) (*(__u16*)(x))
#define __le16_to_cpup(x) (*(__u16*)(x))
#define __cpu_to_be64p(x) __swab64p((x))
#define __be64_to_cpup(x) __swab64p((x))
#define __cpu_to_be32p(x) __swab32p((x))
#define __be32_to_cpup(x) __swab32p((x))
#define __cpu_to_be16p(x) __swab16p((x))
#define __be16_to_cpup(x) __swab16p((x))
#define __cpu_to_le64s(x) do {} while (0)
#define __le64_to_cpus(x) do {} while (0)
#define __cpu_to_le32s(x) do {} while (0)
#define __le32_to_cpus(x) do {} while (0)
#define __cpu_to_le16s(x) do {} while (0)
#define __le16_to_cpus(x) do {} while (0)
#define __cpu_to_be64s(x) __swab64s((x))
#define __be64_to_cpus(x) __swab64s((x))
#define __cpu_to_be32s(x) __swab32s((x))
#define __be32_to_cpus(x) __swab32s((x))
#define __cpu_to_be16s(x) __swab16s((x))
#define __be16_to_cpus(x) __swab16s((x))
#include <linux/byteorder/generic.h>
#endif /* _LINUX_BYTEORDER_LITTLE_ENDIAN_H */
|
1001-study-uboot
|
include/linux/byteorder/little_endian.h
|
C
|
gpl3
| 2,664
|
#ifndef _LINUX_BYTEORDER_SWAB_H
#define _LINUX_BYTEORDER_SWAB_H
/*
* linux/byteorder/swab.h
* Byte-swapping, independently from CPU endianness
* swabXX[ps]?(foo)
*
* Francois-Rene Rideau <fare@tunes.org> 19971205
* separated swab functions from cpu_to_XX,
* to clean up support for bizarre-endian architectures.
*
* See asm-i386/byteorder.h and suches for examples of how to provide
* architecture-dependent optimized versions
*
*/
/* casts are necessary for constants, because we never know how for sure
* how U/UL/ULL map to __u16, __u32, __u64. At least not in a portable way.
*/
#define ___swab16(x) \
((__u16)( \
(((__u16)(x) & (__u16)0x00ffU) << 8) | \
(((__u16)(x) & (__u16)0xff00U) >> 8) ))
#define ___swab32(x) \
((__u32)( \
(((__u32)(x) & (__u32)0x000000ffUL) << 24) | \
(((__u32)(x) & (__u32)0x0000ff00UL) << 8) | \
(((__u32)(x) & (__u32)0x00ff0000UL) >> 8) | \
(((__u32)(x) & (__u32)0xff000000UL) >> 24) ))
#define ___swab64(x) \
((__u64)( \
(__u64)(((__u64)(x) & (__u64)0x00000000000000ffULL) << 56) | \
(__u64)(((__u64)(x) & (__u64)0x000000000000ff00ULL) << 40) | \
(__u64)(((__u64)(x) & (__u64)0x0000000000ff0000ULL) << 24) | \
(__u64)(((__u64)(x) & (__u64)0x00000000ff000000ULL) << 8) | \
(__u64)(((__u64)(x) & (__u64)0x000000ff00000000ULL) >> 8) | \
(__u64)(((__u64)(x) & (__u64)0x0000ff0000000000ULL) >> 24) | \
(__u64)(((__u64)(x) & (__u64)0x00ff000000000000ULL) >> 40) | \
(__u64)(((__u64)(x) & (__u64)0xff00000000000000ULL) >> 56) ))
/*
* provide defaults when no architecture-specific optimization is detected
*/
#ifndef __arch__swab16
# define __arch__swab16(x) ___swab16(x)
#endif
#ifndef __arch__swab32
# define __arch__swab32(x) ___swab32(x)
#endif
#ifndef __arch__swab64
# define __arch__swab64(x) ___swab64(x)
#endif
#ifndef __arch__swab16p
# define __arch__swab16p(x) __swab16(*(x))
#endif
#ifndef __arch__swab32p
# define __arch__swab32p(x) __swab32(*(x))
#endif
#ifndef __arch__swab64p
# define __arch__swab64p(x) __swab64(*(x))
#endif
#ifndef __arch__swab16s
# define __arch__swab16s(x) do { *(x) = __swab16p((x)); } while (0)
#endif
#ifndef __arch__swab32s
# define __arch__swab32s(x) do { *(x) = __swab32p((x)); } while (0)
#endif
#ifndef __arch__swab64s
# define __arch__swab64s(x) do { *(x) = __swab64p((x)); } while (0)
#endif
/*
* Allow constant folding
*/
#if defined(__GNUC__) && (__GNUC__ >= 2) && defined(__OPTIMIZE__)
# define __swab16(x) \
(__builtin_constant_p((__u16)(x)) ? \
___swab16((x)) : \
__fswab16((x)))
# define __swab32(x) \
(__builtin_constant_p((__u32)(x)) ? \
___swab32((x)) : \
__fswab32((x)))
# define __swab64(x) \
(__builtin_constant_p((__u64)(x)) ? \
___swab64((x)) : \
__fswab64((x)))
#else
# define __swab16(x) __fswab16(x)
# define __swab32(x) __fswab32(x)
# define __swab64(x) __fswab64(x)
#endif /* OPTIMIZE */
static __inline__ __attribute__((const)) __u16 __fswab16(__u16 x)
{
return __arch__swab16(x);
}
static __inline__ __u16 __swab16p(__u16 *x)
{
return __arch__swab16p(x);
}
static __inline__ void __swab16s(__u16 *addr)
{
__arch__swab16s(addr);
}
static __inline__ __attribute__((const)) __u32 __fswab32(__u32 x)
{
return __arch__swab32(x);
}
static __inline__ __u32 __swab32p(__u32 *x)
{
return __arch__swab32p(x);
}
static __inline__ void __swab32s(__u32 *addr)
{
__arch__swab32s(addr);
}
#ifdef __BYTEORDER_HAS_U64__
static __inline__ __attribute__((const)) __u64 __fswab64(__u64 x)
{
# ifdef __SWAB_64_THRU_32__
__u32 h = x >> 32;
__u32 l = x & ((1ULL<<32)-1);
return (((__u64)__swab32(l)) << 32) | ((__u64)(__swab32(h)));
# else
return __arch__swab64(x);
# endif
}
static __inline__ __u64 __swab64p(__u64 *x)
{
return __arch__swab64p(x);
}
static __inline__ void __swab64s(__u64 *addr)
{
__arch__swab64s(addr);
}
#endif /* __BYTEORDER_HAS_U64__ */
#if defined(__KERNEL__)
#define swab16 __swab16
#define swab32 __swab32
#define swab64 __swab64
#define swab16p __swab16p
#define swab32p __swab32p
#define swab64p __swab64p
#define swab16s __swab16s
#define swab32s __swab32s
#define swab64s __swab64s
#endif
#endif /* _LINUX_BYTEORDER_SWAB_H */
|
1001-study-uboot
|
include/linux/byteorder/swab.h
|
C
|
gpl3
| 4,133
|
#ifndef _LINUX_UNALIGNED_ACCESS_OK_H
#define _LINUX_UNALIGNED_ACCESS_OK_H
#include <asm/byteorder.h>
static inline u16 get_unaligned_le16(const void *p)
{
return le16_to_cpup((__le16 *)p);
}
static inline u32 get_unaligned_le32(const void *p)
{
return le32_to_cpup((__le32 *)p);
}
static inline u64 get_unaligned_le64(const void *p)
{
return le64_to_cpup((__le64 *)p);
}
static inline u16 get_unaligned_be16(const void *p)
{
return be16_to_cpup((__be16 *)p);
}
static inline u32 get_unaligned_be32(const void *p)
{
return be32_to_cpup((__be32 *)p);
}
static inline u64 get_unaligned_be64(const void *p)
{
return be64_to_cpup((__be64 *)p);
}
static inline void put_unaligned_le16(u16 val, void *p)
{
*((__le16 *)p) = cpu_to_le16(val);
}
static inline void put_unaligned_le32(u32 val, void *p)
{
*((__le32 *)p) = cpu_to_le32(val);
}
static inline void put_unaligned_le64(u64 val, void *p)
{
*((__le64 *)p) = cpu_to_le64(val);
}
static inline void put_unaligned_be16(u16 val, void *p)
{
*((__be16 *)p) = cpu_to_be16(val);
}
static inline void put_unaligned_be32(u32 val, void *p)
{
*((__be32 *)p) = cpu_to_be32(val);
}
static inline void put_unaligned_be64(u64 val, void *p)
{
*((__be64 *)p) = cpu_to_be64(val);
}
#endif /* _LINUX_UNALIGNED_ACCESS_OK_H */
|
1001-study-uboot
|
include/linux/unaligned/access_ok.h
|
C
|
gpl3
| 1,279
|
#ifndef _LINUX_UNALIGNED_GENERIC_H
#define _LINUX_UNALIGNED_GENERIC_H
/* define __force to nothing in U-Boot */
#define __force
/*
* Cause a link-time error if we try an unaligned access other than
* 1,2,4 or 8 bytes long
*/
extern void __bad_unaligned_access_size(void);
#define __get_unaligned_le(ptr) ((__force typeof(*(ptr)))({ \
__builtin_choose_expr(sizeof(*(ptr)) == 1, *(ptr), \
__builtin_choose_expr(sizeof(*(ptr)) == 2, get_unaligned_le16((ptr)), \
__builtin_choose_expr(sizeof(*(ptr)) == 4, get_unaligned_le32((ptr)), \
__builtin_choose_expr(sizeof(*(ptr)) == 8, get_unaligned_le64((ptr)), \
__bad_unaligned_access_size())))); \
}))
#define __get_unaligned_be(ptr) ((__force typeof(*(ptr)))({ \
__builtin_choose_expr(sizeof(*(ptr)) == 1, *(ptr), \
__builtin_choose_expr(sizeof(*(ptr)) == 2, get_unaligned_be16((ptr)), \
__builtin_choose_expr(sizeof(*(ptr)) == 4, get_unaligned_be32((ptr)), \
__builtin_choose_expr(sizeof(*(ptr)) == 8, get_unaligned_be64((ptr)), \
__bad_unaligned_access_size())))); \
}))
#define __put_unaligned_le(val, ptr) ({ \
void *__gu_p = (ptr); \
switch (sizeof(*(ptr))) { \
case 1: \
*(u8 *)__gu_p = (__force u8)(val); \
break; \
case 2: \
put_unaligned_le16((__force u16)(val), __gu_p); \
break; \
case 4: \
put_unaligned_le32((__force u32)(val), __gu_p); \
break; \
case 8: \
put_unaligned_le64((__force u64)(val), __gu_p); \
break; \
default: \
__bad_unaligned_access_size(); \
break; \
} \
(void)0; })
#define __put_unaligned_be(val, ptr) ({ \
void *__gu_p = (ptr); \
switch (sizeof(*(ptr))) { \
case 1: \
*(u8 *)__gu_p = (__force u8)(val); \
break; \
case 2: \
put_unaligned_be16((__force u16)(val), __gu_p); \
break; \
case 4: \
put_unaligned_be32((__force u32)(val), __gu_p); \
break; \
case 8: \
put_unaligned_be64((__force u64)(val), __gu_p); \
break; \
default: \
__bad_unaligned_access_size(); \
break; \
} \
(void)0; })
#endif /* _LINUX_UNALIGNED_GENERIC_H */
|
1001-study-uboot
|
include/linux/unaligned/generic.h
|
C
|
gpl3
| 2,188
|
#ifndef _LINUX_UNALIGNED_LE_BYTESHIFT_H
#define _LINUX_UNALIGNED_LE_BYTESHIFT_H
#include <linux/types.h>
static inline u16 __get_unaligned_le16(const u8 *p)
{
return p[0] | p[1] << 8;
}
static inline u32 __get_unaligned_le32(const u8 *p)
{
return p[0] | p[1] << 8 | p[2] << 16 | p[3] << 24;
}
static inline u64 __get_unaligned_le64(const u8 *p)
{
return (u64)__get_unaligned_le32(p + 4) << 32 |
__get_unaligned_le32(p);
}
static inline void __put_unaligned_le16(u16 val, u8 *p)
{
*p++ = val;
*p++ = val >> 8;
}
static inline void __put_unaligned_le32(u32 val, u8 *p)
{
__put_unaligned_le16(val >> 16, p + 2);
__put_unaligned_le16(val, p);
}
static inline void __put_unaligned_le64(u64 val, u8 *p)
{
__put_unaligned_le32(val >> 32, p + 4);
__put_unaligned_le32(val, p);
}
static inline u16 get_unaligned_le16(const void *p)
{
return __get_unaligned_le16((const u8 *)p);
}
static inline u32 get_unaligned_le32(const void *p)
{
return __get_unaligned_le32((const u8 *)p);
}
static inline u64 get_unaligned_le64(const void *p)
{
return __get_unaligned_le64((const u8 *)p);
}
static inline void put_unaligned_le16(u16 val, void *p)
{
__put_unaligned_le16(val, p);
}
static inline void put_unaligned_le32(u32 val, void *p)
{
__put_unaligned_le32(val, p);
}
static inline void put_unaligned_le64(u64 val, void *p)
{
__put_unaligned_le64(val, p);
}
#endif /* _LINUX_UNALIGNED_LE_BYTESHIFT_H */
|
1001-study-uboot
|
include/linux/unaligned/le_byteshift.h
|
C
|
gpl3
| 1,423
|
#ifndef _LINUX_UNALIGNED_BE_BYTESHIFT_H
#define _LINUX_UNALIGNED_BE_BYTESHIFT_H
#include <linux/types.h>
static inline u16 __get_unaligned_be16(const u8 *p)
{
return p[0] << 8 | p[1];
}
static inline u32 __get_unaligned_be32(const u8 *p)
{
return p[0] << 24 | p[1] << 16 | p[2] << 8 | p[3];
}
static inline u64 __get_unaligned_be64(const u8 *p)
{
return (u64)__get_unaligned_be32(p) << 32 |
__get_unaligned_be32(p + 4);
}
static inline void __put_unaligned_be16(u16 val, u8 *p)
{
*p++ = val >> 8;
*p++ = val;
}
static inline void __put_unaligned_be32(u32 val, u8 *p)
{
__put_unaligned_be16(val >> 16, p);
__put_unaligned_be16(val, p + 2);
}
static inline void __put_unaligned_be64(u64 val, u8 *p)
{
__put_unaligned_be32(val >> 32, p);
__put_unaligned_be32(val, p + 4);
}
static inline u16 get_unaligned_be16(const void *p)
{
return __get_unaligned_be16((const u8 *)p);
}
static inline u32 get_unaligned_be32(const void *p)
{
return __get_unaligned_be32((const u8 *)p);
}
static inline u64 get_unaligned_be64(const void *p)
{
return __get_unaligned_be64((const u8 *)p);
}
static inline void put_unaligned_be16(u16 val, void *p)
{
__put_unaligned_be16(val, p);
}
static inline void put_unaligned_be32(u32 val, void *p)
{
__put_unaligned_be32(val, p);
}
static inline void put_unaligned_be64(u64 val, void *p)
{
__put_unaligned_be64(val, p);
}
#endif /* _LINUX_UNALIGNED_BE_BYTESHIFT_H */
|
1001-study-uboot
|
include/linux/unaligned/be_byteshift.h
|
C
|
gpl3
| 1,423
|
/*
* ioport.h Definitions of routines for detecting, reserving and
* allocating system resources.
*
* Authors: Linus Torvalds
*/
#ifndef _LINUX_IOPORT_H
#define _LINUX_IOPORT_H
#ifndef __ASSEMBLY__
#include <linux/compiler.h>
#include <linux/types.h>
/*
* Resources are tree-like, allowing
* nesting etc..
*/
struct resource {
resource_size_t start;
resource_size_t end;
const char *name;
unsigned long flags;
struct resource *parent, *sibling, *child;
};
struct resource_list {
struct resource_list *next;
struct resource *res;
struct pci_dev *dev;
};
/*
* IO resources have these defined flags.
*/
#define IORESOURCE_BITS 0x000000ff /* Bus-specific bits */
#define IORESOURCE_TYPE_BITS 0x00000f00 /* Resource type */
#define IORESOURCE_IO 0x00000100
#define IORESOURCE_MEM 0x00000200
#define IORESOURCE_IRQ 0x00000400
#define IORESOURCE_DMA 0x00000800
#define IORESOURCE_PREFETCH 0x00001000 /* No side effects */
#define IORESOURCE_READONLY 0x00002000
#define IORESOURCE_CACHEABLE 0x00004000
#define IORESOURCE_RANGELENGTH 0x00008000
#define IORESOURCE_SHADOWABLE 0x00010000
#define IORESOURCE_SIZEALIGN 0x00020000 /* size indicates alignment */
#define IORESOURCE_STARTALIGN 0x00040000 /* start field is alignment */
#define IORESOURCE_MEM_64 0x00100000
#define IORESOURCE_EXCLUSIVE 0x08000000 /* Userland may not map this resource */
#define IORESOURCE_DISABLED 0x10000000
#define IORESOURCE_UNSET 0x20000000
#define IORESOURCE_AUTO 0x40000000
#define IORESOURCE_BUSY 0x80000000 /* Driver has marked this resource busy */
/* PnP IRQ specific bits (IORESOURCE_BITS) */
#define IORESOURCE_IRQ_HIGHEDGE (1<<0)
#define IORESOURCE_IRQ_LOWEDGE (1<<1)
#define IORESOURCE_IRQ_HIGHLEVEL (1<<2)
#define IORESOURCE_IRQ_LOWLEVEL (1<<3)
#define IORESOURCE_IRQ_SHAREABLE (1<<4)
#define IORESOURCE_IRQ_OPTIONAL (1<<5)
/* PnP DMA specific bits (IORESOURCE_BITS) */
#define IORESOURCE_DMA_TYPE_MASK (3<<0)
#define IORESOURCE_DMA_8BIT (0<<0)
#define IORESOURCE_DMA_8AND16BIT (1<<0)
#define IORESOURCE_DMA_16BIT (2<<0)
#define IORESOURCE_DMA_MASTER (1<<2)
#define IORESOURCE_DMA_BYTE (1<<3)
#define IORESOURCE_DMA_WORD (1<<4)
#define IORESOURCE_DMA_SPEED_MASK (3<<6)
#define IORESOURCE_DMA_COMPATIBLE (0<<6)
#define IORESOURCE_DMA_TYPEA (1<<6)
#define IORESOURCE_DMA_TYPEB (2<<6)
#define IORESOURCE_DMA_TYPEF (3<<6)
/* PnP memory I/O specific bits (IORESOURCE_BITS) */
#define IORESOURCE_MEM_WRITEABLE (1<<0) /* dup: IORESOURCE_READONLY */
#define IORESOURCE_MEM_CACHEABLE (1<<1) /* dup: IORESOURCE_CACHEABLE */
#define IORESOURCE_MEM_RANGELENGTH (1<<2) /* dup: IORESOURCE_RANGELENGTH */
#define IORESOURCE_MEM_TYPE_MASK (3<<3)
#define IORESOURCE_MEM_8BIT (0<<3)
#define IORESOURCE_MEM_16BIT (1<<3)
#define IORESOURCE_MEM_8AND16BIT (2<<3)
#define IORESOURCE_MEM_32BIT (3<<3)
#define IORESOURCE_MEM_SHADOWABLE (1<<5) /* dup: IORESOURCE_SHADOWABLE */
#define IORESOURCE_MEM_EXPANSIONROM (1<<6)
/* PnP I/O specific bits (IORESOURCE_BITS) */
#define IORESOURCE_IO_16BIT_ADDR (1<<0)
#define IORESOURCE_IO_FIXED (1<<1)
/* PCI ROM control bits (IORESOURCE_BITS) */
#define IORESOURCE_ROM_ENABLE (1<<0) /* ROM is enabled, same as PCI_ROM_ADDRESS_ENABLE */
#define IORESOURCE_ROM_SHADOW (1<<1) /* ROM is copy at C000:0 */
#define IORESOURCE_ROM_COPY (1<<2) /* ROM is alloc'd copy, resource field overlaid */
#define IORESOURCE_ROM_BIOS_COPY (1<<3) /* ROM is BIOS copy, resource field overlaid */
/* PCI control bits. Shares IORESOURCE_BITS with above PCI ROM. */
#define IORESOURCE_PCI_FIXED (1<<4) /* Do not move resource */
/* PC/ISA/whatever - the normal PC address spaces: IO and memory */
extern struct resource ioport_resource;
extern struct resource iomem_resource;
extern int request_resource(struct resource *root, struct resource *new);
extern int release_resource(struct resource *new);
extern void reserve_region_with_split(struct resource *root,
resource_size_t start, resource_size_t end,
const char *name);
extern int insert_resource(struct resource *parent, struct resource *new);
extern void insert_resource_expand_to_fit(struct resource *root, struct resource *new);
extern int allocate_resource(struct resource *root, struct resource *new,
resource_size_t size, resource_size_t min,
resource_size_t max, resource_size_t align,
void (*alignf)(void *, struct resource *,
resource_size_t, resource_size_t),
void *alignf_data);
int adjust_resource(struct resource *res, resource_size_t start,
resource_size_t size);
resource_size_t resource_alignment(struct resource *res);
static inline resource_size_t resource_size(const struct resource *res)
{
return res->end - res->start + 1;
}
static inline unsigned long resource_type(const struct resource *res)
{
return res->flags & IORESOURCE_TYPE_BITS;
}
/* Convenience shorthand with allocation */
#define request_region(start,n,name) __request_region(&ioport_resource, (start), (n), (name), 0)
#define __request_mem_region(start,n,name, excl) __request_region(&iomem_resource, (start), (n), (name), excl)
#define request_mem_region(start,n,name) __request_region(&iomem_resource, (start), (n), (name), 0)
#define request_mem_region_exclusive(start,n,name) \
__request_region(&iomem_resource, (start), (n), (name), IORESOURCE_EXCLUSIVE)
#define rename_region(region, newname) do { (region)->name = (newname); } while (0)
extern struct resource * __request_region(struct resource *,
resource_size_t start,
resource_size_t n,
const char *name, int flags);
/* Compatibility cruft */
#define release_region(start,n) __release_region(&ioport_resource, (start), (n))
#define check_mem_region(start,n) __check_region(&iomem_resource, (start), (n))
#define release_mem_region(start,n) __release_region(&iomem_resource, (start), (n))
extern int __check_region(struct resource *, resource_size_t, resource_size_t);
extern void __release_region(struct resource *, resource_size_t,
resource_size_t);
static inline int __deprecated check_region(resource_size_t s,
resource_size_t n)
{
return __check_region(&ioport_resource, s, n);
}
/* Wrappers for managed devices */
struct device;
#define devm_request_region(dev,start,n,name) \
__devm_request_region(dev, &ioport_resource, (start), (n), (name))
#define devm_request_mem_region(dev,start,n,name) \
__devm_request_region(dev, &iomem_resource, (start), (n), (name))
extern struct resource * __devm_request_region(struct device *dev,
struct resource *parent, resource_size_t start,
resource_size_t n, const char *name);
#define devm_release_region(dev, start, n) \
__devm_release_region(dev, &ioport_resource, (start), (n))
#define devm_release_mem_region(dev, start, n) \
__devm_release_region(dev, &iomem_resource, (start), (n))
extern void __devm_release_region(struct device *dev, struct resource *parent,
resource_size_t start, resource_size_t n);
extern int iomem_map_sanity_check(resource_size_t addr, unsigned long size);
extern int iomem_is_exclusive(u64 addr);
extern int
walk_system_ram_range(unsigned long start_pfn, unsigned long nr_pages,
void *arg, int (*func)(unsigned long, unsigned long, void *));
#endif /* __ASSEMBLY__ */
#endif /* _LINUX_IOPORT_H */
|
1001-study-uboot
|
include/linux/ioport.h
|
C
|
gpl3
| 7,235
|
#ifndef _LINUX_TIME_H
#define _LINUX_TIME_H
#include <linux/types.h>
#define _DEFUN(a,b,c) a(c)
#define _CONST const
#define _AND ,
#define _REENT_ONLY
#define SECSPERMIN 60L
#define MINSPERHOUR 60L
#define HOURSPERDAY 24L
#define SECSPERHOUR (SECSPERMIN * MINSPERHOUR)
#define SECSPERDAY (SECSPERHOUR * HOURSPERDAY)
#define DAYSPERWEEK 7
#define MONSPERYEAR 12
#define YEAR_BASE 1900
#define EPOCH_YEAR 1970
#define EPOCH_WDAY 4
#define isleap(y) ((((y) % 4) == 0 && ((y) % 100) != 0) || ((y) % 400) == 0)
/* Used by other time functions. */
struct tm {
int tm_sec; /* Seconds. [0-60] (1 leap second) */
int tm_min; /* Minutes. [0-59] */
int tm_hour; /* Hours. [0-23] */
int tm_mday; /* Day. [1-31] */
int tm_mon; /* Month. [0-11] */
int tm_year; /* Year - 1900. */
int tm_wday; /* Day of week. [0-6] */
int tm_yday; /* Days in year.[0-365] */
int tm_isdst; /* DST. [-1/0/1]*/
# ifdef __USE_BSD
long int tm_gmtoff; /* Seconds east of UTC. */
__const char *tm_zone; /* Timezone abbreviation. */
# else
long int __tm_gmtoff; /* Seconds east of UTC. */
__const char *__tm_zone; /* Timezone abbreviation. */
# endif
};
static inline char *
_DEFUN (asctime_r, (tim_p, result),
_CONST struct tm *tim_p _AND
char *result)
{
static _CONST char day_name[7][3] = {
"Sun", "Mon", "Tue", "Wed", "Thu", "Fri", "Sat"
};
static _CONST char mon_name[12][3] = {
"Jan", "Feb", "Mar", "Apr", "May", "Jun",
"Jul", "Aug", "Sep", "Oct", "Nov", "Dec"
};
sprintf (result, "%.3s %.3s %.2d %.2d:%.2d:%.2d %d\n",
day_name[tim_p->tm_wday],
mon_name[tim_p->tm_mon],
tim_p->tm_mday, tim_p->tm_hour, tim_p->tm_min,
tim_p->tm_sec, 1900 + tim_p->tm_year);
return result;
}
static inline struct tm *
_DEFUN (localtime_r, (tim_p, res),
_CONST time_t * tim_p _AND
struct tm *res)
{
static _CONST int mon_lengths[2][MONSPERYEAR] = {
{31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31},
{31, 29, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31}
} ;
static _CONST int year_lengths[2] = {
365,
366
} ;
long days, rem;
int y;
int yleap;
_CONST int *ip;
days = ((long) *tim_p) / SECSPERDAY;
rem = ((long) *tim_p) % SECSPERDAY;
while (rem < 0)
{
rem += SECSPERDAY;
--days;
}
while (rem >= SECSPERDAY)
{
rem -= SECSPERDAY;
++days;
}
/* compute hour, min, and sec */
res->tm_hour = (int) (rem / SECSPERHOUR);
rem %= SECSPERHOUR;
res->tm_min = (int) (rem / SECSPERMIN);
res->tm_sec = (int) (rem % SECSPERMIN);
/* compute day of week */
if ((res->tm_wday = ((EPOCH_WDAY + days) % DAYSPERWEEK)) < 0)
res->tm_wday += DAYSPERWEEK;
/* compute year & day of year */
y = EPOCH_YEAR;
if (days >= 0)
{
for (;;)
{
yleap = isleap(y);
if (days < year_lengths[yleap])
break;
y++;
days -= year_lengths[yleap];
}
}
else
{
do
{
--y;
yleap = isleap(y);
days += year_lengths[yleap];
} while (days < 0);
}
res->tm_year = y - YEAR_BASE;
res->tm_yday = days;
ip = mon_lengths[yleap];
for (res->tm_mon = 0; days >= ip[res->tm_mon]; ++res->tm_mon)
days -= ip[res->tm_mon];
res->tm_mday = days + 1;
/* set daylight saving time flag */
res->tm_isdst = -1;
return (res);
}
static inline char *
_DEFUN (ctime_r, (tim_p, result),
_CONST time_t * tim_p _AND
char * result)
{
struct tm tm;
return asctime_r (localtime_r (tim_p, &tm), result);
}
#endif
|
1001-study-uboot
|
include/linux/time.h
|
C
|
gpl3
| 3,768
|
#ifndef _LINUX_STAT_H
#define _LINUX_STAT_H
#include <linux/types.h>
#ifdef __cplusplus
extern "C" {
#endif
#define S_IFMT 00170000 /* type of file */
#define S_IFSOCK 0140000 /* named socket */
#define S_IFLNK 0120000 /* symbolic link */
#define S_IFREG 0100000 /* regular */
#define S_IFBLK 0060000 /* block special */
#define S_IFDIR 0040000 /* directory */
#define S_IFCHR 0020000 /* character special */
#define S_IFIFO 0010000 /* fifo */
#define S_ISUID 0004000 /* set user id on execution */
#define S_ISGID 0002000 /* set group id on execution */
#define S_ISVTX 0001000 /* save swapped text even after use */
#define S_ISLNK(m) (((m) & S_IFMT) == S_IFLNK)
#define S_ISREG(m) (((m) & S_IFMT) == S_IFREG)
#define S_ISDIR(m) (((m) & S_IFMT) == S_IFDIR)
#define S_ISCHR(m) (((m) & S_IFMT) == S_IFCHR)
#define S_ISBLK(m) (((m) & S_IFMT) == S_IFBLK)
#define S_ISFIFO(m) (((m) & S_IFMT) == S_IFIFO)
#define S_ISSOCK(m) (((m) & S_IFMT) == S_IFSOCK)
#define S_IRWXU 00700 /* rwx for owner */
#define S_IRUSR 00400 /* read permission for owner */
#define S_IWUSR 00200 /* write permission for owner */
#define S_IXUSR 00100 /* execute/search permission for owner */
#define S_IRWXG 00070 /* rwx for group */
#define S_IRGRP 00040 /* read permission for group */
#define S_IWGRP 00020 /* write permission for group */
#define S_IXGRP 00010 /* execute/search permission for group */
#define S_IRWXO 00007 /* rwx for other */
#define S_IROTH 00004 /* read permission for other */
#define S_IWOTH 00002 /* read permission for other */
#define S_IXOTH 00001 /* execute/search permission for other */
#ifdef __PPC__
struct stat {
dev_t st_dev; /* file system id */
ino_t st_ino; /* file id */
mode_t st_mode; /* ownership/protection */
nlink_t st_nlink; /* number of links */
uid_t st_uid; /* user id */
gid_t st_gid; /* group id */
dev_t st_rdev;
off_t st_size; /* file size in # of bytes */
unsigned long st_blksize; /* block size */
unsigned long st_blocks; /* file size in # of blocks */
unsigned long st_atime; /* time file was last accessed */
unsigned long __unused1;
unsigned long st_mtime; /* time file was last modified */
unsigned long __unused2;
unsigned long st_ctime; /* time file status was last changed */
unsigned long __unused3;
unsigned long __unused4;
unsigned long __unused5;
};
#endif /* __PPC__ */
#if defined (__ARM__) || defined (__I386__) || defined (__M68K__) || defined (__bfin__) ||\
defined (__microblaze__) || defined (__nios2__)
struct stat {
unsigned short st_dev;
unsigned short __pad1;
unsigned long st_ino;
unsigned short st_mode;
unsigned short st_nlink;
unsigned short st_uid;
unsigned short st_gid;
unsigned short st_rdev;
unsigned short __pad2;
unsigned long st_size;
unsigned long st_blksize;
unsigned long st_blocks;
unsigned long st_atime;
unsigned long __unused1;
unsigned long st_mtime;
unsigned long __unused2;
unsigned long st_ctime;
unsigned long __unused3;
unsigned long __unused4;
unsigned long __unused5;
};
#endif /* __ARM__ */
#if defined (__MIPS__)
struct stat {
dev_t st_dev;
long st_pad1[3];
ino_t st_ino;
mode_t st_mode;
nlink_t st_nlink;
uid_t st_uid;
gid_t st_gid;
dev_t st_rdev;
long st_pad2[2];
off_t st_size;
long st_pad3;
/*
* Actually this should be timestruc_t st_atime, st_mtime and st_ctime
* but we don't have it under Linux.
*/
time_t st_atime;
long reserved0;
time_t st_mtime;
long reserved1;
time_t st_ctime;
long reserved2;
long st_blksize;
long st_blocks;
long st_pad4[14];
};
#endif /* __MIPS__ */
#if defined(__AVR32__) || defined(__SH__)
struct stat {
unsigned long st_dev;
unsigned long st_ino;
unsigned short st_mode;
unsigned short st_nlink;
unsigned short st_uid;
unsigned short st_gid;
unsigned long st_rdev;
unsigned long st_size;
unsigned long st_blksize;
unsigned long st_blocks;
unsigned long st_atime;
unsigned long st_atime_nsec;
unsigned long st_mtime;
unsigned long st_mtime_nsec;
unsigned long st_ctime;
unsigned long st_ctime_nsec;
unsigned long __unused4;
unsigned long __unused5;
};
#endif /* __AVR32__ || __SH__ */
#ifdef __cplusplus
}
#endif
#endif
|
1001-study-uboot
|
include/linux/stat.h
|
C
|
gpl3
| 4,218
|
#ifndef _LINUX_IOCTL_H
#define _LINUX_IOCTL_H
#include <asm/ioctl.h>
#endif /* _LINUX_IOCTL_H */
|
1001-study-uboot
|
include/linux/ioctl.h
|
C
|
gpl3
| 99
|
#ifndef _LINUX_POISON_H
#define _LINUX_POISON_H
/********** include/linux/list.h **********/
/*
* used to verify that nobody uses non-initialized list entries.
*/
#define LIST_POISON1 ((void *) 0x0)
#define LIST_POISON2 ((void *) 0x0)
#endif
|
1001-study-uboot
|
include/linux/poison.h
|
C
|
gpl3
| 248
|
#ifndef _LINUX_APM_H
#define _LINUX_APM_H
/*
* Include file for the interface to an APM BIOS
* Copyright 1994-2001 Stephen Rothwell (sfr@canb.auug.org.au)
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2, or (at your option) any
* later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*/
#include <linux/types.h>
typedef unsigned short apm_event_t;
typedef unsigned short apm_eventinfo_t;
struct apm_bios_info {
__u16 version;
__u16 cseg;
__u32 offset;
__u16 cseg_16;
__u16 dseg;
__u16 flags;
__u16 cseg_len;
__u16 cseg_16_len;
__u16 dseg_len;
};
#ifdef __KERNEL__
#define APM_CS (GDT_ENTRY_APMBIOS_BASE * 8)
#define APM_CS_16 (APM_CS + 8)
#define APM_DS (APM_CS_16 + 8)
/* Results of APM Installation Check */
#define APM_16_BIT_SUPPORT 0x0001
#define APM_32_BIT_SUPPORT 0x0002
#define APM_IDLE_SLOWS_CLOCK 0x0004
#define APM_BIOS_DISABLED 0x0008
#define APM_BIOS_DISENGAGED 0x0010
/*
* Data for APM that is persistent across module unload/load
*/
struct apm_info {
struct apm_bios_info bios;
unsigned short connection_version;
int get_power_status_broken;
int get_power_status_swabinminutes;
int allow_ints;
int forbid_idle;
int realmode_power_off;
int disabled;
};
/*
* The APM function codes
*/
#define APM_FUNC_INST_CHECK 0x5300
#define APM_FUNC_REAL_CONN 0x5301
#define APM_FUNC_16BIT_CONN 0x5302
#define APM_FUNC_32BIT_CONN 0x5303
#define APM_FUNC_DISCONN 0x5304
#define APM_FUNC_IDLE 0x5305
#define APM_FUNC_BUSY 0x5306
#define APM_FUNC_SET_STATE 0x5307
#define APM_FUNC_ENABLE_PM 0x5308
#define APM_FUNC_RESTORE_BIOS 0x5309
#define APM_FUNC_GET_STATUS 0x530a
#define APM_FUNC_GET_EVENT 0x530b
#define APM_FUNC_GET_STATE 0x530c
#define APM_FUNC_ENABLE_DEV_PM 0x530d
#define APM_FUNC_VERSION 0x530e
#define APM_FUNC_ENGAGE_PM 0x530f
#define APM_FUNC_GET_CAP 0x5310
#define APM_FUNC_RESUME_TIMER 0x5311
#define APM_FUNC_RESUME_ON_RING 0x5312
#define APM_FUNC_TIMER 0x5313
/*
* Function code for APM_FUNC_RESUME_TIMER
*/
#define APM_FUNC_DISABLE_TIMER 0
#define APM_FUNC_GET_TIMER 1
#define APM_FUNC_SET_TIMER 2
/*
* Function code for APM_FUNC_RESUME_ON_RING
*/
#define APM_FUNC_DISABLE_RING 0
#define APM_FUNC_ENABLE_RING 1
#define APM_FUNC_GET_RING 2
/*
* Function code for APM_FUNC_TIMER_STATUS
*/
#define APM_FUNC_TIMER_DISABLE 0
#define APM_FUNC_TIMER_ENABLE 1
#define APM_FUNC_TIMER_GET 2
/*
* in arch/i386/kernel/setup.c
*/
extern struct apm_info apm_info;
#endif /* __KERNEL__ */
/*
* Power states
*/
#define APM_STATE_READY 0x0000
#define APM_STATE_STANDBY 0x0001
#define APM_STATE_SUSPEND 0x0002
#define APM_STATE_OFF 0x0003
#define APM_STATE_BUSY 0x0004
#define APM_STATE_REJECT 0x0005
#define APM_STATE_OEM_SYS 0x0020
#define APM_STATE_OEM_DEV 0x0040
#define APM_STATE_DISABLE 0x0000
#define APM_STATE_ENABLE 0x0001
#define APM_STATE_DISENGAGE 0x0000
#define APM_STATE_ENGAGE 0x0001
/*
* Events (results of Get PM Event)
*/
#define APM_SYS_STANDBY 0x0001
#define APM_SYS_SUSPEND 0x0002
#define APM_NORMAL_RESUME 0x0003
#define APM_CRITICAL_RESUME 0x0004
#define APM_LOW_BATTERY 0x0005
#define APM_POWER_STATUS_CHANGE 0x0006
#define APM_UPDATE_TIME 0x0007
#define APM_CRITICAL_SUSPEND 0x0008
#define APM_USER_STANDBY 0x0009
#define APM_USER_SUSPEND 0x000a
#define APM_STANDBY_RESUME 0x000b
#define APM_CAPABILITY_CHANGE 0x000c
/*
* Error codes
*/
#define APM_SUCCESS 0x00
#define APM_DISABLED 0x01
#define APM_CONNECTED 0x02
#define APM_NOT_CONNECTED 0x03
#define APM_16_CONNECTED 0x05
#define APM_16_UNSUPPORTED 0x06
#define APM_32_CONNECTED 0x07
#define APM_32_UNSUPPORTED 0x08
#define APM_BAD_DEVICE 0x09
#define APM_BAD_PARAM 0x0a
#define APM_NOT_ENGAGED 0x0b
#define APM_BAD_FUNCTION 0x0c
#define APM_RESUME_DISABLED 0x0d
#define APM_NO_ERROR 0x53
#define APM_BAD_STATE 0x60
#define APM_NO_EVENTS 0x80
#define APM_NOT_PRESENT 0x86
/*
* APM Device IDs
*/
#define APM_DEVICE_BIOS 0x0000
#define APM_DEVICE_ALL 0x0001
#define APM_DEVICE_DISPLAY 0x0100
#define APM_DEVICE_STORAGE 0x0200
#define APM_DEVICE_PARALLEL 0x0300
#define APM_DEVICE_SERIAL 0x0400
#define APM_DEVICE_NETWORK 0x0500
#define APM_DEVICE_PCMCIA 0x0600
#define APM_DEVICE_BATTERY 0x8000
#define APM_DEVICE_OEM 0xe000
#define APM_DEVICE_OLD_ALL 0xffff
#define APM_DEVICE_CLASS 0x00ff
#define APM_DEVICE_MASK 0xff00
#ifdef __KERNEL__
/*
* This is the "All Devices" ID communicated to the BIOS
*/
#define APM_DEVICE_BALL ((apm_info.connection_version > 0x0100) ? \
APM_DEVICE_ALL : APM_DEVICE_OLD_ALL)
#endif
/*
* Battery status
*/
#define APM_MAX_BATTERIES 2
/*
* APM defined capability bit flags
*/
#define APM_CAP_GLOBAL_STANDBY 0x0001
#define APM_CAP_GLOBAL_SUSPEND 0x0002
#define APM_CAP_RESUME_STANDBY_TIMER 0x0004 /* Timer resume from standby */
#define APM_CAP_RESUME_SUSPEND_TIMER 0x0008 /* Timer resume from suspend */
#define APM_CAP_RESUME_STANDBY_RING 0x0010 /* Resume on Ring fr standby */
#define APM_CAP_RESUME_SUSPEND_RING 0x0020 /* Resume on Ring fr suspend */
#define APM_CAP_RESUME_STANDBY_PCMCIA 0x0040 /* Resume on PCMCIA Ring */
#define APM_CAP_RESUME_SUSPEND_PCMCIA 0x0080 /* Resume on PCMCIA Ring */
/*
* ioctl operations
*/
#include <linux/ioctl.h>
#define APM_IOC_STANDBY _IO('A', 1)
#define APM_IOC_SUSPEND _IO('A', 2)
#endif /* LINUX_APM_H */
|
1001-study-uboot
|
include/linux/apm_bios.h
|
C
|
gpl3
| 5,647
|
#ifndef __LINUX_COMPILER_H
#define __LINUX_COMPILER_H
#ifndef __ASSEMBLY__
#ifdef __CHECKER__
# define __user __attribute__((noderef, address_space(1)))
# define __kernel /* default address space */
# define __safe __attribute__((safe))
# define __force __attribute__((force))
# define __nocast __attribute__((nocast))
# define __iomem __attribute__((noderef, address_space(2)))
# define __acquires(x) __attribute__((context(x,0,1)))
# define __releases(x) __attribute__((context(x,1,0)))
# define __acquire(x) __context__(x,1)
# define __release(x) __context__(x,-1)
# define __cond_lock(x,c) ((c) ? ({ __acquire(x); 1; }) : 0)
extern void __chk_user_ptr(const volatile void __user *);
extern void __chk_io_ptr(const volatile void __iomem *);
#else
# define __user
# define __kernel
# define __safe
# define __force
# define __nocast
# define __iomem
# define __chk_user_ptr(x) (void)0
# define __chk_io_ptr(x) (void)0
# define __builtin_warning(x, y...) (1)
# define __acquires(x)
# define __releases(x)
# define __acquire(x) (void)0
# define __release(x) (void)0
# define __cond_lock(x,c) (c)
#endif
#ifdef __KERNEL__
#ifdef __GNUC__
#include <linux/compiler-gcc.h>
#endif
#define notrace __attribute__((no_instrument_function))
/* Intel compiler defines __GNUC__. So we will overwrite implementations
* coming from above header files here
*/
#ifdef __INTEL_COMPILER
# include <linux/compiler-intel.h>
#endif
/*
* Generic compiler-dependent macros required for kernel
* build go below this comment. Actual compiler/compiler version
* specific implementations come from the above header files
*/
struct ftrace_branch_data {
const char *func;
const char *file;
unsigned line;
union {
struct {
unsigned long correct;
unsigned long incorrect;
};
struct {
unsigned long miss;
unsigned long hit;
};
unsigned long miss_hit[2];
};
};
/*
* Note: DISABLE_BRANCH_PROFILING can be used by special lowlevel code
* to disable branch tracing on a per file basis.
*/
#if defined(CONFIG_TRACE_BRANCH_PROFILING) \
&& !defined(DISABLE_BRANCH_PROFILING) && !defined(__CHECKER__)
void ftrace_likely_update(struct ftrace_branch_data *f, int val, int expect);
#define likely_notrace(x) __builtin_expect(!!(x), 1)
#define unlikely_notrace(x) __builtin_expect(!!(x), 0)
#define __branch_check__(x, expect) ({ \
int ______r; \
static struct ftrace_branch_data \
__attribute__((__aligned__(4))) \
__attribute__((section("_ftrace_annotated_branch"))) \
______f = { \
.func = __func__, \
.file = __FILE__, \
.line = __LINE__, \
}; \
______r = likely_notrace(x); \
ftrace_likely_update(&______f, ______r, expect); \
______r; \
})
/*
* Using __builtin_constant_p(x) to ignore cases where the return
* value is always the same. This idea is taken from a similar patch
* written by Daniel Walker.
*/
# ifndef likely
# define likely(x) (__builtin_constant_p(x) ? !!(x) : __branch_check__(x, 1))
# endif
# ifndef unlikely
# define unlikely(x) (__builtin_constant_p(x) ? !!(x) : __branch_check__(x, 0))
# endif
#ifdef CONFIG_PROFILE_ALL_BRANCHES
/*
* "Define 'is'", Bill Clinton
* "Define 'if'", Steven Rostedt
*/
#define if(cond, ...) __trace_if( (cond , ## __VA_ARGS__) )
#define __trace_if(cond) \
if (__builtin_constant_p((cond)) ? !!(cond) : \
({ \
int ______r; \
static struct ftrace_branch_data \
__attribute__((__aligned__(4))) \
__attribute__((section("_ftrace_branch"))) \
______f = { \
.func = __func__, \
.file = __FILE__, \
.line = __LINE__, \
}; \
______r = !!(cond); \
______f.miss_hit[______r]++; \
______r; \
}))
#endif /* CONFIG_PROFILE_ALL_BRANCHES */
#else
# define likely(x) __builtin_expect(!!(x), 1)
# define unlikely(x) __builtin_expect(!!(x), 0)
#endif
/* Optimization barrier */
#ifndef barrier
# define barrier() __memory_barrier()
#endif
/* Unreachable code */
#ifndef unreachable
# define unreachable() do { } while (1)
#endif
#ifndef RELOC_HIDE
# define RELOC_HIDE(ptr, off) \
({ unsigned long __ptr; \
__ptr = (unsigned long) (ptr); \
(typeof(ptr)) (__ptr + (off)); })
#endif
#endif /* __KERNEL__ */
#endif /* __ASSEMBLY__ */
#ifdef __KERNEL__
/*
* Allow us to mark functions as 'deprecated' and have gcc emit a nice
* warning for each use, in hopes of speeding the functions removal.
* Usage is:
* int __deprecated foo(void)
*/
#ifndef __deprecated
# define __deprecated /* unimplemented */
#endif
#ifdef MODULE
#define __deprecated_for_modules __deprecated
#else
#define __deprecated_for_modules
#endif
#ifndef __must_check
#define __must_check
#endif
#ifndef CONFIG_ENABLE_MUST_CHECK
#undef __must_check
#define __must_check
#endif
#ifndef CONFIG_ENABLE_WARN_DEPRECATED
#undef __deprecated
#undef __deprecated_for_modules
#define __deprecated
#define __deprecated_for_modules
#endif
/*
* Allow us to avoid 'defined but not used' warnings on functions and data,
* as well as force them to be emitted to the assembly file.
*
* As of gcc 3.4, static functions that are not marked with attribute((used))
* may be elided from the assembly file. As of gcc 3.4, static data not so
* marked will not be elided, but this may change in a future gcc version.
*
* NOTE: Because distributions shipped with a backported unit-at-a-time
* compiler in gcc 3.3, we must define __used to be __attribute__((used))
* for gcc >=3.3 instead of 3.4.
*
* In prior versions of gcc, such functions and data would be emitted, but
* would be warned about except with attribute((unused)).
*
* Mark functions that are referenced only in inline assembly as __used so
* the code is emitted even though it appears to be unreferenced.
*/
#ifndef __used
# define __used /* unimplemented */
#endif
#ifndef __maybe_unused
# define __maybe_unused /* unimplemented */
#endif
#ifndef __always_unused
# define __always_unused /* unimplemented */
#endif
#ifndef noinline
#define noinline
#endif
/*
* Rather then using noinline to prevent stack consumption, use
* noinline_for_stack instead. For documentaiton reasons.
*/
#define noinline_for_stack noinline
#ifndef __always_inline
#define __always_inline inline
#endif
#endif /* __KERNEL__ */
/*
* From the GCC manual:
*
* Many functions do not examine any values except their arguments,
* and have no effects except the return value. Basically this is
* just slightly more strict class than the `pure' attribute above,
* since function is not allowed to read global memory.
*
* Note that a function that has pointer arguments and examines the
* data pointed to must _not_ be declared `const'. Likewise, a
* function that calls a non-`const' function usually must not be
* `const'. It does not make sense for a `const' function to return
* `void'.
*/
#ifndef __attribute_const__
# define __attribute_const__ /* unimplemented */
#endif
/*
* Tell gcc if a function is cold. The compiler will assume any path
* directly leading to the call is unlikely.
*/
#ifndef __cold
#define __cold
#endif
/* Simple shorthand for a section definition */
#ifndef __section
# define __section(S) __attribute__ ((__section__(#S)))
#endif
/* Are two types/vars the same type (ignoring qualifiers)? */
#ifndef __same_type
# define __same_type(a, b) __builtin_types_compatible_p(typeof(a), typeof(b))
#endif
/* Compile time object size, -1 for unknown */
#ifndef __compiletime_object_size
# define __compiletime_object_size(obj) -1
#endif
#ifndef __compiletime_warning
# define __compiletime_warning(message)
#endif
#ifndef __compiletime_error
# define __compiletime_error(message)
#endif
/*
* Prevent the compiler from merging or refetching accesses. The compiler
* is also forbidden from reordering successive instances of ACCESS_ONCE(),
* but only when the compiler is aware of some particular ordering. One way
* to make the compiler aware of ordering is to put the two invocations of
* ACCESS_ONCE() in different C statements.
*
* This macro does absolutely -nothing- to prevent the CPU from reordering,
* merging, or refetching absolutely anything at any time. Its main intended
* use is to mediate communication between process-level code and irq/NMI
* handlers, all running on the same CPU.
*/
#define ACCESS_ONCE(x) (*(volatile typeof(x) *)&(x))
#endif /* __LINUX_COMPILER_H */
|
1001-study-uboot
|
include/linux/compiler.h
|
C
|
gpl3
| 8,408
|
/*
* <linux/usb/gadget.h>
*
* We call the USB code inside a Linux-based peripheral device a "gadget"
* driver, except for the hardware-specific bus glue. One USB host can
* master many USB gadgets, but the gadgets are only slaved to one host.
*
*
* (C) Copyright 2002-2004 by David Brownell
* All Rights Reserved.
*
* This software is licensed under the GNU GPL version 2.
*
* Ported to U-boot by: Thomas Smits <ts.smits@gmail.com> and
* Remy Bohmer <linux@bohmer.net>
*/
#ifndef __LINUX_USB_GADGET_H
#define __LINUX_USB_GADGET_H
#include <linux/list.h>
struct usb_ep;
/**
* struct usb_request - describes one i/o request
* @buf: Buffer used for data. Always provide this; some controllers
* only use PIO, or don't use DMA for some endpoints.
* @dma: DMA address corresponding to 'buf'. If you don't set this
* field, and the usb controller needs one, it is responsible
* for mapping and unmapping the buffer.
* @length: Length of that data
* @no_interrupt: If true, hints that no completion irq is needed.
* Helpful sometimes with deep request queues that are handled
* directly by DMA controllers.
* @zero: If true, when writing data, makes the last packet be "short"
* by adding a zero length packet as needed;
* @short_not_ok: When reading data, makes short packets be
* treated as errors (queue stops advancing till cleanup).
* @complete: Function called when request completes, so this request and
* its buffer may be re-used.
* Reads terminate with a short packet, or when the buffer fills,
* whichever comes first. When writes terminate, some data bytes
* will usually still be in flight (often in a hardware fifo).
* Errors (for reads or writes) stop the queue from advancing
* until the completion function returns, so that any transfers
* invalidated by the error may first be dequeued.
* @context: For use by the completion callback
* @list: For use by the gadget driver.
* @status: Reports completion code, zero or a negative errno.
* Normally, faults block the transfer queue from advancing until
* the completion callback returns.
* Code "-ESHUTDOWN" indicates completion caused by device disconnect,
* or when the driver disabled the endpoint.
* @actual: Reports bytes transferred to/from the buffer. For reads (OUT
* transfers) this may be less than the requested length. If the
* short_not_ok flag is set, short reads are treated as errors
* even when status otherwise indicates successful completion.
* Note that for writes (IN transfers) some data bytes may still
* reside in a device-side FIFO when the request is reported as
* complete.
*
* These are allocated/freed through the endpoint they're used with. The
* hardware's driver can add extra per-request data to the memory it returns,
* which often avoids separate memory allocations (potential failures),
* later when the request is queued.
*
* Request flags affect request handling, such as whether a zero length
* packet is written (the "zero" flag), whether a short read should be
* treated as an error (blocking request queue advance, the "short_not_ok"
* flag), or hinting that an interrupt is not required (the "no_interrupt"
* flag, for use with deep request queues).
*
* Bulk endpoints can use any size buffers, and can also be used for interrupt
* transfers. interrupt-only endpoints can be much less functional.
*
* NOTE: this is analagous to 'struct urb' on the host side, except that
* it's thinner and promotes more pre-allocation.
*/
struct usb_request {
void *buf;
unsigned length;
dma_addr_t dma;
unsigned no_interrupt:1;
unsigned zero:1;
unsigned short_not_ok:1;
void (*complete)(struct usb_ep *ep,
struct usb_request *req);
void *context;
struct list_head list;
int status;
unsigned actual;
};
/*-------------------------------------------------------------------------*/
/* endpoint-specific parts of the api to the usb controller hardware.
* unlike the urb model, (de)multiplexing layers are not required.
* (so this api could slash overhead if used on the host side...)
*
* note that device side usb controllers commonly differ in how many
* endpoints they support, as well as their capabilities.
*/
struct usb_ep_ops {
int (*enable) (struct usb_ep *ep,
const struct usb_endpoint_descriptor *desc);
int (*disable) (struct usb_ep *ep);
struct usb_request *(*alloc_request) (struct usb_ep *ep,
gfp_t gfp_flags);
void (*free_request) (struct usb_ep *ep, struct usb_request *req);
int (*queue) (struct usb_ep *ep, struct usb_request *req,
gfp_t gfp_flags);
int (*dequeue) (struct usb_ep *ep, struct usb_request *req);
int (*set_halt) (struct usb_ep *ep, int value);
int (*fifo_status) (struct usb_ep *ep);
void (*fifo_flush) (struct usb_ep *ep);
};
/**
* struct usb_ep - device side representation of USB endpoint
* @name:identifier for the endpoint, such as "ep-a" or "ep9in-bulk"
* @ops: Function pointers used to access hardware-specific operations.
* @ep_list:the gadget's ep_list holds all of its endpoints
* @maxpacket:The maximum packet size used on this endpoint. The initial
* value can sometimes be reduced (hardware allowing), according to
* the endpoint descriptor used to configure the endpoint.
* @driver_data:for use by the gadget driver. all other fields are
* read-only to gadget drivers.
*
* the bus controller driver lists all the general purpose endpoints in
* gadget->ep_list. the control endpoint (gadget->ep0) is not in that list,
* and is accessed only in response to a driver setup() callback.
*/
struct usb_ep {
void *driver_data;
const char *name;
const struct usb_ep_ops *ops;
struct list_head ep_list;
unsigned maxpacket:16;
};
/*-------------------------------------------------------------------------*/
/**
* usb_ep_enable - configure endpoint, making it usable
* @ep:the endpoint being configured. may not be the endpoint named "ep0".
* drivers discover endpoints through the ep_list of a usb_gadget.
* @desc:descriptor for desired behavior. caller guarantees this pointer
* remains valid until the endpoint is disabled; the data byte order
* is little-endian (usb-standard).
*
* when configurations are set, or when interface settings change, the driver
* will enable or disable the relevant endpoints. while it is enabled, an
* endpoint may be used for i/o until the driver receives a disconnect() from
* the host or until the endpoint is disabled.
*
* the ep0 implementation (which calls this routine) must ensure that the
* hardware capabilities of each endpoint match the descriptor provided
* for it. for example, an endpoint named "ep2in-bulk" would be usable
* for interrupt transfers as well as bulk, but it likely couldn't be used
* for iso transfers or for endpoint 14. some endpoints are fully
* configurable, with more generic names like "ep-a". (remember that for
* USB, "in" means "towards the USB master".)
*
* returns zero, or a negative error code.
*/
static inline int usb_ep_enable(struct usb_ep *ep,
const struct usb_endpoint_descriptor *desc)
{
return ep->ops->enable(ep, desc);
}
/**
* usb_ep_disable - endpoint is no longer usable
* @ep:the endpoint being unconfigured. may not be the endpoint named "ep0".
*
* no other task may be using this endpoint when this is called.
* any pending and uncompleted requests will complete with status
* indicating disconnect (-ESHUTDOWN) before this call returns.
* gadget drivers must call usb_ep_enable() again before queueing
* requests to the endpoint.
*
* returns zero, or a negative error code.
*/
static inline int usb_ep_disable(struct usb_ep *ep)
{
return ep->ops->disable(ep);
}
/**
* usb_ep_alloc_request - allocate a request object to use with this endpoint
* @ep:the endpoint to be used with with the request
* @gfp_flags:GFP_* flags to use
*
* Request objects must be allocated with this call, since they normally
* need controller-specific setup and may even need endpoint-specific
* resources such as allocation of DMA descriptors.
* Requests may be submitted with usb_ep_queue(), and receive a single
* completion callback. Free requests with usb_ep_free_request(), when
* they are no longer needed.
*
* Returns the request, or null if one could not be allocated.
*/
static inline struct usb_request *usb_ep_alloc_request(struct usb_ep *ep,
gfp_t gfp_flags)
{
return ep->ops->alloc_request(ep, gfp_flags);
}
/**
* usb_ep_free_request - frees a request object
* @ep:the endpoint associated with the request
* @req:the request being freed
*
* Reverses the effect of usb_ep_alloc_request().
* Caller guarantees the request is not queued, and that it will
* no longer be requeued (or otherwise used).
*/
static inline void usb_ep_free_request(struct usb_ep *ep,
struct usb_request *req)
{
ep->ops->free_request(ep, req);
}
/**
* usb_ep_queue - queues (submits) an I/O request to an endpoint.
* @ep:the endpoint associated with the request
* @req:the request being submitted
* @gfp_flags: GFP_* flags to use in case the lower level driver couldn't
* pre-allocate all necessary memory with the request.
*
* This tells the device controller to perform the specified request through
* that endpoint (reading or writing a buffer). When the request completes,
* including being canceled by usb_ep_dequeue(), the request's completion
* routine is called to return the request to the driver. Any endpoint
* (except control endpoints like ep0) may have more than one transfer
* request queued; they complete in FIFO order. Once a gadget driver
* submits a request, that request may not be examined or modified until it
* is given back to that driver through the completion callback.
*
* Each request is turned into one or more packets. The controller driver
* never merges adjacent requests into the same packet. OUT transfers
* will sometimes use data that's already buffered in the hardware.
* Drivers can rely on the fact that the first byte of the request's buffer
* always corresponds to the first byte of some USB packet, for both
* IN and OUT transfers.
*
* Bulk endpoints can queue any amount of data; the transfer is packetized
* automatically. The last packet will be short if the request doesn't fill it
* out completely. Zero length packets (ZLPs) should be avoided in portable
* protocols since not all usb hardware can successfully handle zero length
* packets. (ZLPs may be explicitly written, and may be implicitly written if
* the request 'zero' flag is set.) Bulk endpoints may also be used
* for interrupt transfers; but the reverse is not true, and some endpoints
* won't support every interrupt transfer. (Such as 768 byte packets.)
*
* Interrupt-only endpoints are less functional than bulk endpoints, for
* example by not supporting queueing or not handling buffers that are
* larger than the endpoint's maxpacket size. They may also treat data
* toggle differently.
*
* Control endpoints ... after getting a setup() callback, the driver queues
* one response (even if it would be zero length). That enables the
* status ack, after transfering data as specified in the response. Setup
* functions may return negative error codes to generate protocol stalls.
* (Note that some USB device controllers disallow protocol stall responses
* in some cases.) When control responses are deferred (the response is
* written after the setup callback returns), then usb_ep_set_halt() may be
* used on ep0 to trigger protocol stalls.
*
* For periodic endpoints, like interrupt or isochronous ones, the usb host
* arranges to poll once per interval, and the gadget driver usually will
* have queued some data to transfer at that time.
*
* Returns zero, or a negative error code. Endpoints that are not enabled
* report errors; errors will also be
* reported when the usb peripheral is disconnected.
*/
static inline int usb_ep_queue(struct usb_ep *ep,
struct usb_request *req, gfp_t gfp_flags)
{
return ep->ops->queue(ep, req, gfp_flags);
}
/**
* usb_ep_dequeue - dequeues (cancels, unlinks) an I/O request from an endpoint
* @ep:the endpoint associated with the request
* @req:the request being canceled
*
* if the request is still active on the endpoint, it is dequeued and its
* completion routine is called (with status -ECONNRESET); else a negative
* error code is returned.
*
* note that some hardware can't clear out write fifos (to unlink the request
* at the head of the queue) except as part of disconnecting from usb. such
* restrictions prevent drivers from supporting configuration changes,
* even to configuration zero (a "chapter 9" requirement).
*/
static inline int usb_ep_dequeue(struct usb_ep *ep, struct usb_request *req)
{
return ep->ops->dequeue(ep, req);
}
/**
* usb_ep_set_halt - sets the endpoint halt feature.
* @ep: the non-isochronous endpoint being stalled
*
* Use this to stall an endpoint, perhaps as an error report.
* Except for control endpoints,
* the endpoint stays halted (will not stream any data) until the host
* clears this feature; drivers may need to empty the endpoint's request
* queue first, to make sure no inappropriate transfers happen.
*
* Note that while an endpoint CLEAR_FEATURE will be invisible to the
* gadget driver, a SET_INTERFACE will not be. To reset endpoints for the
* current altsetting, see usb_ep_clear_halt(). When switching altsettings,
* it's simplest to use usb_ep_enable() or usb_ep_disable() for the endpoints.
*
* Returns zero, or a negative error code. On success, this call sets
* underlying hardware state that blocks data transfers.
* Attempts to halt IN endpoints will fail (returning -EAGAIN) if any
* transfer requests are still queued, or if the controller hardware
* (usually a FIFO) still holds bytes that the host hasn't collected.
*/
static inline int usb_ep_set_halt(struct usb_ep *ep)
{
return ep->ops->set_halt(ep, 1);
}
/**
* usb_ep_clear_halt - clears endpoint halt, and resets toggle
* @ep:the bulk or interrupt endpoint being reset
*
* Use this when responding to the standard usb "set interface" request,
* for endpoints that aren't reconfigured, after clearing any other state
* in the endpoint's i/o queue.
*
* Returns zero, or a negative error code. On success, this call clears
* the underlying hardware state reflecting endpoint halt and data toggle.
* Note that some hardware can't support this request (like pxa2xx_udc),
* and accordingly can't correctly implement interface altsettings.
*/
static inline int usb_ep_clear_halt(struct usb_ep *ep)
{
return ep->ops->set_halt(ep, 0);
}
/**
* usb_ep_fifo_status - returns number of bytes in fifo, or error
* @ep: the endpoint whose fifo status is being checked.
*
* FIFO endpoints may have "unclaimed data" in them in certain cases,
* such as after aborted transfers. Hosts may not have collected all
* the IN data written by the gadget driver (and reported by a request
* completion). The gadget driver may not have collected all the data
* written OUT to it by the host. Drivers that need precise handling for
* fault reporting or recovery may need to use this call.
*
* This returns the number of such bytes in the fifo, or a negative
* errno if the endpoint doesn't use a FIFO or doesn't support such
* precise handling.
*/
static inline int usb_ep_fifo_status(struct usb_ep *ep)
{
if (ep->ops->fifo_status)
return ep->ops->fifo_status(ep);
else
return -EOPNOTSUPP;
}
/**
* usb_ep_fifo_flush - flushes contents of a fifo
* @ep: the endpoint whose fifo is being flushed.
*
* This call may be used to flush the "unclaimed data" that may exist in
* an endpoint fifo after abnormal transaction terminations. The call
* must never be used except when endpoint is not being used for any
* protocol translation.
*/
static inline void usb_ep_fifo_flush(struct usb_ep *ep)
{
if (ep->ops->fifo_flush)
ep->ops->fifo_flush(ep);
}
/*-------------------------------------------------------------------------*/
struct usb_gadget;
/* the rest of the api to the controller hardware: device operations,
* which don't involve endpoints (or i/o).
*/
struct usb_gadget_ops {
int (*get_frame)(struct usb_gadget *);
int (*wakeup)(struct usb_gadget *);
int (*set_selfpowered) (struct usb_gadget *, int is_selfpowered);
int (*vbus_session) (struct usb_gadget *, int is_active);
int (*vbus_draw) (struct usb_gadget *, unsigned mA);
int (*pullup) (struct usb_gadget *, int is_on);
int (*ioctl)(struct usb_gadget *,
unsigned code, unsigned long param);
};
struct device {
void *driver_data; /* data private to the driver */
};
/**
* struct usb_gadget - represents a usb slave device
* @ops: Function pointers used to access hardware-specific operations.
* @ep0: Endpoint zero, used when reading or writing responses to
* driver setup() requests
* @ep_list: List of other endpoints supported by the device.
* @speed: Speed of current connection to USB host.
* @is_dualspeed: True if the controller supports both high and full speed
* operation. If it does, the gadget driver must also support both.
* @is_otg: True if the USB device port uses a Mini-AB jack, so that the
* gadget driver must provide a USB OTG descriptor.
* @is_a_peripheral: False unless is_otg, the "A" end of a USB cable
* is in the Mini-AB jack, and HNP has been used to switch roles
* so that the "A" device currently acts as A-Peripheral, not A-Host.
* @a_hnp_support: OTG device feature flag, indicating that the A-Host
* supports HNP at this port.
* @a_alt_hnp_support: OTG device feature flag, indicating that the A-Host
* only supports HNP on a different root port.
* @b_hnp_enable: OTG device feature flag, indicating that the A-Host
* enabled HNP support.
* @name: Identifies the controller hardware type. Used in diagnostics
* and sometimes configuration.
* @dev: Driver model state for this abstract device.
*
* Gadgets have a mostly-portable "gadget driver" implementing device
* functions, handling all usb configurations and interfaces. Gadget
* drivers talk to hardware-specific code indirectly, through ops vectors.
* That insulates the gadget driver from hardware details, and packages
* the hardware endpoints through generic i/o queues. The "usb_gadget"
* and "usb_ep" interfaces provide that insulation from the hardware.
*
* Except for the driver data, all fields in this structure are
* read-only to the gadget driver. That driver data is part of the
* "driver model" infrastructure in 2.6 (and later) kernels, and for
* earlier systems is grouped in a similar structure that's not known
* to the rest of the kernel.
*
* Values of the three OTG device feature flags are updated before the
* setup() call corresponding to USB_REQ_SET_CONFIGURATION, and before
* driver suspend() calls. They are valid only when is_otg, and when the
* device is acting as a B-Peripheral (so is_a_peripheral is false).
*/
struct usb_gadget {
/* readonly to gadget driver */
const struct usb_gadget_ops *ops;
struct usb_ep *ep0;
struct list_head ep_list; /* of usb_ep */
enum usb_device_speed speed;
unsigned is_dualspeed:1;
unsigned is_otg:1;
unsigned is_a_peripheral:1;
unsigned b_hnp_enable:1;
unsigned a_hnp_support:1;
unsigned a_alt_hnp_support:1;
const char *name;
struct device dev;
};
static inline void set_gadget_data(struct usb_gadget *gadget, void *data)
{
gadget->dev.driver_data = data;
}
static inline void *get_gadget_data(struct usb_gadget *gadget)
{
return gadget->dev.driver_data;
}
/* iterates the non-control endpoints; 'tmp' is a struct usb_ep pointer */
#define gadget_for_each_ep(tmp, gadget) \
list_for_each_entry(tmp, &(gadget)->ep_list, ep_list)
/**
* gadget_is_dualspeed - return true iff the hardware handles high speed
* @g: controller that might support both high and full speeds
*/
static inline int gadget_is_dualspeed(struct usb_gadget *g)
{
#ifdef CONFIG_USB_GADGET_DUALSPEED
/* runtime test would check "g->is_dualspeed" ... that might be
* useful to work around hardware bugs, but is mostly pointless
*/
return 1;
#else
return 0;
#endif
}
/**
* gadget_is_otg - return true iff the hardware is OTG-ready
* @g: controller that might have a Mini-AB connector
*
* This is a runtime test, since kernels with a USB-OTG stack sometimes
* run on boards which only have a Mini-B (or Mini-A) connector.
*/
static inline int gadget_is_otg(struct usb_gadget *g)
{
#ifdef CONFIG_USB_OTG
return g->is_otg;
#else
return 0;
#endif
}
/**
* usb_gadget_frame_number - returns the current frame number
* @gadget: controller that reports the frame number
*
* Returns the usb frame number, normally eleven bits from a SOF packet,
* or negative errno if this device doesn't support this capability.
*/
static inline int usb_gadget_frame_number(struct usb_gadget *gadget)
{
return gadget->ops->get_frame(gadget);
}
/**
* usb_gadget_wakeup - tries to wake up the host connected to this gadget
* @gadget: controller used to wake up the host
*
* Returns zero on success, else negative error code if the hardware
* doesn't support such attempts, or its support has not been enabled
* by the usb host. Drivers must return device descriptors that report
* their ability to support this, or hosts won't enable it.
*
* This may also try to use SRP to wake the host and start enumeration,
* even if OTG isn't otherwise in use. OTG devices may also start
* remote wakeup even when hosts don't explicitly enable it.
*/
static inline int usb_gadget_wakeup(struct usb_gadget *gadget)
{
if (!gadget->ops->wakeup)
return -EOPNOTSUPP;
return gadget->ops->wakeup(gadget);
}
/**
* usb_gadget_set_selfpowered - sets the device selfpowered feature.
* @gadget:the device being declared as self-powered
*
* this affects the device status reported by the hardware driver
* to reflect that it now has a local power supply.
*
* returns zero on success, else negative errno.
*/
static inline int usb_gadget_set_selfpowered(struct usb_gadget *gadget)
{
if (!gadget->ops->set_selfpowered)
return -EOPNOTSUPP;
return gadget->ops->set_selfpowered(gadget, 1);
}
/**
* usb_gadget_clear_selfpowered - clear the device selfpowered feature.
* @gadget:the device being declared as bus-powered
*
* this affects the device status reported by the hardware driver.
* some hardware may not support bus-powered operation, in which
* case this feature's value can never change.
*
* returns zero on success, else negative errno.
*/
static inline int usb_gadget_clear_selfpowered(struct usb_gadget *gadget)
{
if (!gadget->ops->set_selfpowered)
return -EOPNOTSUPP;
return gadget->ops->set_selfpowered(gadget, 0);
}
/**
* usb_gadget_vbus_connect - Notify controller that VBUS is powered
* @gadget:The device which now has VBUS power.
*
* This call is used by a driver for an external transceiver (or GPIO)
* that detects a VBUS power session starting. Common responses include
* resuming the controller, activating the D+ (or D-) pullup to let the
* host detect that a USB device is attached, and starting to draw power
* (8mA or possibly more, especially after SET_CONFIGURATION).
*
* Returns zero on success, else negative errno.
*/
static inline int usb_gadget_vbus_connect(struct usb_gadget *gadget)
{
if (!gadget->ops->vbus_session)
return -EOPNOTSUPP;
return gadget->ops->vbus_session(gadget, 1);
}
/**
* usb_gadget_vbus_draw - constrain controller's VBUS power usage
* @gadget:The device whose VBUS usage is being described
* @mA:How much current to draw, in milliAmperes. This should be twice
* the value listed in the configuration descriptor bMaxPower field.
*
* This call is used by gadget drivers during SET_CONFIGURATION calls,
* reporting how much power the device may consume. For example, this
* could affect how quickly batteries are recharged.
*
* Returns zero on success, else negative errno.
*/
static inline int usb_gadget_vbus_draw(struct usb_gadget *gadget, unsigned mA)
{
if (!gadget->ops->vbus_draw)
return -EOPNOTSUPP;
return gadget->ops->vbus_draw(gadget, mA);
}
/**
* usb_gadget_vbus_disconnect - notify controller about VBUS session end
* @gadget:the device whose VBUS supply is being described
*
* This call is used by a driver for an external transceiver (or GPIO)
* that detects a VBUS power session ending. Common responses include
* reversing everything done in usb_gadget_vbus_connect().
*
* Returns zero on success, else negative errno.
*/
static inline int usb_gadget_vbus_disconnect(struct usb_gadget *gadget)
{
if (!gadget->ops->vbus_session)
return -EOPNOTSUPP;
return gadget->ops->vbus_session(gadget, 0);
}
/**
* usb_gadget_connect - software-controlled connect to USB host
* @gadget:the peripheral being connected
*
* Enables the D+ (or potentially D-) pullup. The host will start
* enumerating this gadget when the pullup is active and a VBUS session
* is active (the link is powered). This pullup is always enabled unless
* usb_gadget_disconnect() has been used to disable it.
*
* Returns zero on success, else negative errno.
*/
static inline int usb_gadget_connect(struct usb_gadget *gadget)
{
if (!gadget->ops->pullup)
return -EOPNOTSUPP;
return gadget->ops->pullup(gadget, 1);
}
/**
* usb_gadget_disconnect - software-controlled disconnect from USB host
* @gadget:the peripheral being disconnected
*
* Disables the D+ (or potentially D-) pullup, which the host may see
* as a disconnect (when a VBUS session is active). Not all systems
* support software pullup controls.
*
* This routine may be used during the gadget driver bind() call to prevent
* the peripheral from ever being visible to the USB host, unless later
* usb_gadget_connect() is called. For example, user mode components may
* need to be activated before the system can talk to hosts.
*
* Returns zero on success, else negative errno.
*/
static inline int usb_gadget_disconnect(struct usb_gadget *gadget)
{
if (!gadget->ops->pullup)
return -EOPNOTSUPP;
return gadget->ops->pullup(gadget, 0);
}
/*-------------------------------------------------------------------------*/
/**
* struct usb_gadget_driver - driver for usb 'slave' devices
* @speed: Highest speed the driver handles.
* @bind: Invoked when the driver is bound to a gadget, usually
* after registering the driver.
* At that point, ep0 is fully initialized, and ep_list holds
* the currently-available endpoints.
* Called in a context that permits sleeping.
* @setup: Invoked for ep0 control requests that aren't handled by
* the hardware level driver. Most calls must be handled by
* the gadget driver, including descriptor and configuration
* management. The 16 bit members of the setup data are in
* USB byte order. Called in_interrupt; this may not sleep. Driver
* queues a response to ep0, or returns negative to stall.
* @disconnect: Invoked after all transfers have been stopped,
* when the host is disconnected. May be called in_interrupt; this
* may not sleep. Some devices can't detect disconnect, so this might
* not be called except as part of controller shutdown.
* @unbind: Invoked when the driver is unbound from a gadget,
* usually from rmmod (after a disconnect is reported).
* Called in a context that permits sleeping.
* @suspend: Invoked on USB suspend. May be called in_interrupt.
* @resume: Invoked on USB resume. May be called in_interrupt.
*
* Devices are disabled till a gadget driver successfully bind()s, which
* means the driver will handle setup() requests needed to enumerate (and
* meet "chapter 9" requirements) then do some useful work.
*
* If gadget->is_otg is true, the gadget driver must provide an OTG
* descriptor during enumeration, or else fail the bind() call. In such
* cases, no USB traffic may flow until both bind() returns without
* having called usb_gadget_disconnect(), and the USB host stack has
* initialized.
*
* Drivers use hardware-specific knowledge to configure the usb hardware.
* endpoint addressing is only one of several hardware characteristics that
* are in descriptors the ep0 implementation returns from setup() calls.
*
* Except for ep0 implementation, most driver code shouldn't need change to
* run on top of different usb controllers. It'll use endpoints set up by
* that ep0 implementation.
*
* The usb controller driver handles a few standard usb requests. Those
* include set_address, and feature flags for devices, interfaces, and
* endpoints (the get_status, set_feature, and clear_feature requests).
*
* Accordingly, the driver's setup() callback must always implement all
* get_descriptor requests, returning at least a device descriptor and
* a configuration descriptor. Drivers must make sure the endpoint
* descriptors match any hardware constraints. Some hardware also constrains
* other descriptors. (The pxa250 allows only configurations 1, 2, or 3).
*
* The driver's setup() callback must also implement set_configuration,
* and should also implement set_interface, get_configuration, and
* get_interface. Setting a configuration (or interface) is where
* endpoints should be activated or (config 0) shut down.
*
* (Note that only the default control endpoint is supported. Neither
* hosts nor devices generally support control traffic except to ep0.)
*
* Most devices will ignore USB suspend/resume operations, and so will
* not provide those callbacks. However, some may need to change modes
* when the host is not longer directing those activities. For example,
* local controls (buttons, dials, etc) may need to be re-enabled since
* the (remote) host can't do that any longer; or an error state might
* be cleared, to make the device behave identically whether or not
* power is maintained.
*/
struct usb_gadget_driver {
enum usb_device_speed speed;
int (*bind)(struct usb_gadget *);
void (*unbind)(struct usb_gadget *);
int (*setup)(struct usb_gadget *,
const struct usb_ctrlrequest *);
void (*disconnect)(struct usb_gadget *);
void (*suspend)(struct usb_gadget *);
void (*resume)(struct usb_gadget *);
};
/*-------------------------------------------------------------------------*/
/* driver modules register and unregister, as usual.
* these calls must be made in a context that can sleep.
*
* these will usually be implemented directly by the hardware-dependent
* usb bus interface driver, which will only support a single driver.
*/
/**
* usb_gadget_register_driver - register a gadget driver
* @driver:the driver being registered
*
* Call this in your gadget driver's module initialization function,
* to tell the underlying usb controller driver about your driver.
* The driver's bind() function will be called to bind it to a
* gadget before this registration call returns. It's expected that
* the bind() functions will be in init sections.
* This function must be called in a context that can sleep.
*/
int usb_gadget_register_driver(struct usb_gadget_driver *driver);
/**
* usb_gadget_unregister_driver - unregister a gadget driver
* @driver:the driver being unregistered
*
* Call this in your gadget driver's module cleanup function,
* to tell the underlying usb controller that your driver is
* going away. If the controller is connected to a USB host,
* it will first disconnect(). The driver is also requested
* to unbind() and clean up any device state, before this procedure
* finally returns. It's expected that the unbind() functions
* will in in exit sections, so may not be linked in some kernels.
* This function must be called in a context that can sleep.
*/
int usb_gadget_unregister_driver(struct usb_gadget_driver *driver);
/*-------------------------------------------------------------------------*/
/* utility to simplify dealing with string descriptors */
/**
* struct usb_string - wraps a C string and its USB id
* @id:the (nonzero) ID for this string
* @s:the string, in UTF-8 encoding
*
* If you're using usb_gadget_get_string(), use this to wrap a string
* together with its ID.
*/
struct usb_string {
u8 id;
const char *s;
};
/**
* struct usb_gadget_strings - a set of USB strings in a given language
* @language:identifies the strings' language (0x0409 for en-us)
* @strings:array of strings with their ids
*
* If you're using usb_gadget_get_string(), use this to wrap all the
* strings for a given language.
*/
struct usb_gadget_strings {
u16 language; /* 0x0409 for en-us */
struct usb_string *strings;
};
/* put descriptor for string with that id into buf (buflen >= 256) */
int usb_gadget_get_string(struct usb_gadget_strings *table, int id, u8 *buf);
/*-------------------------------------------------------------------------*/
/* utility to simplify managing config descriptors */
/* write vector of descriptors into buffer */
int usb_descriptor_fillbuf(void *, unsigned,
const struct usb_descriptor_header **);
/* build config descriptor from single descriptor vector */
int usb_gadget_config_buf(const struct usb_config_descriptor *config,
void *buf, unsigned buflen, const struct usb_descriptor_header **desc);
/*-------------------------------------------------------------------------*/
/* utility wrapping a simple endpoint selection policy */
extern struct usb_ep *usb_ep_autoconfig(struct usb_gadget *,
struct usb_endpoint_descriptor *);
extern void usb_ep_autoconfig_reset(struct usb_gadget *);
extern int usb_gadget_handle_interrupts(void);
#endif /* __LINUX_USB_GADGET_H */
|
1001-study-uboot
|
include/linux/usb/gadget.h
|
C
|
gpl3
| 33,680
|
/*
* USB Communications Device Class (CDC) definitions
*
* CDC says how to talk to lots of different types of network adapters,
* notably ethernet adapters and various modems. It's used mostly with
* firmware based USB peripherals.
*
* Ported to U-boot by: Thomas Smits <ts.smits@gmail.com> and
* Remy Bohmer <linux@bohmer.net>
*/
#define USB_CDC_SUBCLASS_ACM 0x02
#define USB_CDC_SUBCLASS_ETHERNET 0x06
#define USB_CDC_SUBCLASS_WHCM 0x08
#define USB_CDC_SUBCLASS_DMM 0x09
#define USB_CDC_SUBCLASS_MDLM 0x0a
#define USB_CDC_SUBCLASS_OBEX 0x0b
#define USB_CDC_PROTO_NONE 0
#define USB_CDC_ACM_PROTO_AT_V25TER 1
#define USB_CDC_ACM_PROTO_AT_PCCA101 2
#define USB_CDC_ACM_PROTO_AT_PCCA101_WAKE 3
#define USB_CDC_ACM_PROTO_AT_GSM 4
#define USB_CDC_ACM_PROTO_AT_3G 5
#define USB_CDC_ACM_PROTO_AT_CDMA 6
#define USB_CDC_ACM_PROTO_VENDOR 0xff
/*-------------------------------------------------------------------------*/
/*
* Class-Specific descriptors ... there are a couple dozen of them
*/
#define USB_CDC_HEADER_TYPE 0x00 /* header_desc */
#define USB_CDC_CALL_MANAGEMENT_TYPE 0x01 /* call_mgmt_descriptor */
#define USB_CDC_ACM_TYPE 0x02 /* acm_descriptor */
#define USB_CDC_UNION_TYPE 0x06 /* union_desc */
#define USB_CDC_COUNTRY_TYPE 0x07
#define USB_CDC_NETWORK_TERMINAL_TYPE 0x0a /* network_terminal_desc */
#define USB_CDC_ETHERNET_TYPE 0x0f /* ether_desc */
#define USB_CDC_WHCM_TYPE 0x11
#define USB_CDC_MDLM_TYPE 0x12 /* mdlm_desc */
#define USB_CDC_MDLM_DETAIL_TYPE 0x13 /* mdlm_detail_desc */
#define USB_CDC_DMM_TYPE 0x14
#define USB_CDC_OBEX_TYPE 0x15
/* "Header Functional Descriptor" from CDC spec 5.2.3.1 */
struct usb_cdc_header_desc {
__u8 bLength;
__u8 bDescriptorType;
__u8 bDescriptorSubType;
__le16 bcdCDC;
} __attribute__ ((packed));
/* "Call Management Descriptor" from CDC spec 5.2.3.2 */
struct usb_cdc_call_mgmt_descriptor {
__u8 bLength;
__u8 bDescriptorType;
__u8 bDescriptorSubType;
__u8 bmCapabilities;
#define USB_CDC_CALL_MGMT_CAP_CALL_MGMT 0x01
#define USB_CDC_CALL_MGMT_CAP_DATA_INTF 0x02
__u8 bDataInterface;
} __attribute__ ((packed));
/* "Abstract Control Management Descriptor" from CDC spec 5.2.3.3 */
struct usb_cdc_acm_descriptor {
__u8 bLength;
__u8 bDescriptorType;
__u8 bDescriptorSubType;
__u8 bmCapabilities;
} __attribute__ ((packed));
/* capabilities from 5.2.3.3 */
#define USB_CDC_COMM_FEATURE 0x01
#define USB_CDC_CAP_LINE 0x02
#define USB_CDC_CAP_BRK 0x04
#define USB_CDC_CAP_NOTIFY 0x08
/* "Union Functional Descriptor" from CDC spec 5.2.3.8 */
struct usb_cdc_union_desc {
__u8 bLength;
__u8 bDescriptorType;
__u8 bDescriptorSubType;
__u8 bMasterInterface0;
__u8 bSlaveInterface0;
/* ... and there could be other slave interfaces */
} __attribute__ ((packed));
/* "Country Selection Functional Descriptor" from CDC spec 5.2.3.9 */
struct usb_cdc_country_functional_desc {
__u8 bLength;
__u8 bDescriptorType;
__u8 bDescriptorSubType;
__u8 iCountryCodeRelDate;
__le16 wCountyCode0;
/* ... and there can be a lot of country codes */
} __attribute__ ((packed));
/* "Network Channel Terminal Functional Descriptor" from CDC spec 5.2.3.11 */
struct usb_cdc_network_terminal_desc {
__u8 bLength;
__u8 bDescriptorType;
__u8 bDescriptorSubType;
__u8 bEntityId;
__u8 iName;
__u8 bChannelIndex;
__u8 bPhysicalInterface;
} __attribute__ ((packed));
/* "Ethernet Networking Functional Descriptor" from CDC spec 5.2.3.16 */
struct usb_cdc_ether_desc {
__u8 bLength;
__u8 bDescriptorType;
__u8 bDescriptorSubType;
__u8 iMACAddress;
__le32 bmEthernetStatistics;
__le16 wMaxSegmentSize;
__le16 wNumberMCFilters;
__u8 bNumberPowerFilters;
} __attribute__ ((packed));
/* "MDLM Functional Descriptor" from CDC WMC spec 6.7.2.3 */
struct usb_cdc_mdlm_desc {
__u8 bLength;
__u8 bDescriptorType;
__u8 bDescriptorSubType;
__le16 bcdVersion;
__u8 bGUID[16];
} __attribute__ ((packed));
/* "MDLM Detail Functional Descriptor" from CDC WMC spec 6.7.2.4 */
struct usb_cdc_mdlm_detail_desc {
__u8 bLength;
__u8 bDescriptorType;
__u8 bDescriptorSubType;
/* type is associated with mdlm_desc.bGUID */
__u8 bGuidDescriptorType;
__u8 bDetailData[0];
} __attribute__ ((packed));
/*-------------------------------------------------------------------------*/
/*
* Class-Specific Control Requests (6.2)
*
* section 3.6.2.1 table 4 has the ACM profile, for modems.
* section 3.8.2 table 10 has the ethernet profile.
*
* Microsoft's RNDIS stack for Ethernet is a vendor-specific CDC ACM variant,
* heavily dependent on the encapsulated (proprietary) command mechanism.
*/
#define USB_CDC_SEND_ENCAPSULATED_COMMAND 0x00
#define USB_CDC_GET_ENCAPSULATED_RESPONSE 0x01
#define USB_CDC_REQ_SET_LINE_CODING 0x20
#define USB_CDC_REQ_GET_LINE_CODING 0x21
#define USB_CDC_REQ_SET_CONTROL_LINE_STATE 0x22
#define USB_CDC_REQ_SEND_BREAK 0x23
#define USB_CDC_SET_ETHERNET_MULTICAST_FILTERS 0x40
#define USB_CDC_SET_ETHERNET_PM_PATTERN_FILTER 0x41
#define USB_CDC_GET_ETHERNET_PM_PATTERN_FILTER 0x42
#define USB_CDC_SET_ETHERNET_PACKET_FILTER 0x43
#define USB_CDC_GET_ETHERNET_STATISTIC 0x44
/* Line Coding Structure from CDC spec 6.2.13 */
struct usb_cdc_line_coding {
__le32 dwDTERate;
__u8 bCharFormat;
#define USB_CDC_1_STOP_BITS 0
#define USB_CDC_1_5_STOP_BITS 1
#define USB_CDC_2_STOP_BITS 2
__u8 bParityType;
#define USB_CDC_NO_PARITY 0
#define USB_CDC_ODD_PARITY 1
#define USB_CDC_EVEN_PARITY 2
#define USB_CDC_MARK_PARITY 3
#define USB_CDC_SPACE_PARITY 4
__u8 bDataBits;
} __attribute__ ((packed));
/* table 62; bits in multicast filter */
#define USB_CDC_PACKET_TYPE_PROMISCUOUS (1 << 0)
#define USB_CDC_PACKET_TYPE_ALL_MULTICAST (1 << 1) /* no filter */
#define USB_CDC_PACKET_TYPE_DIRECTED (1 << 2)
#define USB_CDC_PACKET_TYPE_BROADCAST (1 << 3)
#define USB_CDC_PACKET_TYPE_MULTICAST (1 << 4) /* filtered */
/*-------------------------------------------------------------------------*/
/*
* Class-Specific Notifications (6.3) sent by interrupt transfers
*
* section 3.8.2 table 11 of the CDC spec lists Ethernet notifications
* section 3.6.2.1 table 5 specifies ACM notifications, accepted by RNDIS
* RNDIS also defines its own bit-incompatible notifications
*/
#define USB_CDC_NOTIFY_NETWORK_CONNECTION 0x00
#define USB_CDC_NOTIFY_RESPONSE_AVAILABLE 0x01
#define USB_CDC_NOTIFY_SERIAL_STATE 0x20
#define USB_CDC_NOTIFY_SPEED_CHANGE 0x2a
struct usb_cdc_notification {
__u8 bmRequestType;
__u8 bNotificationType;
__le16 wValue;
__le16 wIndex;
__le16 wLength;
} __attribute__ ((packed));
|
1001-study-uboot
|
include/linux/usb/cdc.h
|
C
|
gpl3
| 6,605
|
/*
* This file holds USB constants and structures that are needed for
* USB device APIs. These are used by the USB device model, which is
* defined in chapter 9 of the USB 2.0 specification and in the
* Wireless USB 1.0 (spread around). Linux has several APIs in C that
* need these:
*
* - the master/host side Linux-USB kernel driver API;
* - the "usbfs" user space API; and
* - the Linux "gadget" slave/device/peripheral side driver API.
*
* USB 2.0 adds an additional "On The Go" (OTG) mode, which lets systems
* act either as a USB master/host or as a USB slave/device. That means
* the master and slave side APIs benefit from working well together.
*
* There's also "Wireless USB", using low power short range radios for
* peripheral interconnection but otherwise building on the USB framework.
*
* Note all descriptors are declared '__attribute__((packed))' so that:
*
* [a] they never get padded, either internally (USB spec writers
* probably handled that) or externally;
*
* [b] so that accessing bigger-than-a-bytes fields will never
* generate bus errors on any platform, even when the location of
* its descriptor inside a bundle isn't "naturally aligned", and
*
* [c] for consistency, removing all doubt even when it appears to
* someone that the two other points are non-issues for that
* particular descriptor type.
*
* Ported to U-boot by: Thomas Smits <ts.smits@gmail.com> and
* Remy Bohmer <linux@bohmer.net>
*/
#ifndef __LINUX_USB_CH9_H
#define __LINUX_USB_CH9_H
#include <linux/types.h> /* __u8 etc */
/*-------------------------------------------------------------------------*/
/* CONTROL REQUEST SUPPORT */
/*
* USB directions
*
* This bit flag is used in endpoint descriptors' bEndpointAddress field.
* It's also one of three fields in control requests bRequestType.
*/
#define USB_DIR_OUT 0 /* to device */
#define USB_DIR_IN 0x80 /* to host */
/*
* USB types, the second of three bRequestType fields
*/
#define USB_TYPE_MASK (0x03 << 5)
#define USB_TYPE_STANDARD (0x00 << 5)
#define USB_TYPE_CLASS (0x01 << 5)
#define USB_TYPE_VENDOR (0x02 << 5)
#define USB_TYPE_RESERVED (0x03 << 5)
/*
* USB recipients, the third of three bRequestType fields
*/
#define USB_RECIP_MASK 0x1f
#define USB_RECIP_DEVICE 0x00
#define USB_RECIP_INTERFACE 0x01
#define USB_RECIP_ENDPOINT 0x02
#define USB_RECIP_OTHER 0x03
/* From Wireless USB 1.0 */
#define USB_RECIP_PORT 0x04
#define USB_RECIP_RPIPE 0x05
/*
* Standard requests, for the bRequest field of a SETUP packet.
*
* These are qualified by the bRequestType field, so that for example
* TYPE_CLASS or TYPE_VENDOR specific feature flags could be retrieved
* by a GET_STATUS request.
*/
#define USB_REQ_GET_STATUS 0x00
#define USB_REQ_CLEAR_FEATURE 0x01
#define USB_REQ_SET_FEATURE 0x03
#define USB_REQ_SET_ADDRESS 0x05
#define USB_REQ_GET_DESCRIPTOR 0x06
#define USB_REQ_SET_DESCRIPTOR 0x07
#define USB_REQ_GET_CONFIGURATION 0x08
#define USB_REQ_SET_CONFIGURATION 0x09
#define USB_REQ_GET_INTERFACE 0x0A
#define USB_REQ_SET_INTERFACE 0x0B
#define USB_REQ_SYNCH_FRAME 0x0C
#define USB_REQ_SET_ENCRYPTION 0x0D /* Wireless USB */
#define USB_REQ_GET_ENCRYPTION 0x0E
#define USB_REQ_RPIPE_ABORT 0x0E
#define USB_REQ_SET_HANDSHAKE 0x0F
#define USB_REQ_RPIPE_RESET 0x0F
#define USB_REQ_GET_HANDSHAKE 0x10
#define USB_REQ_SET_CONNECTION 0x11
#define USB_REQ_SET_SECURITY_DATA 0x12
#define USB_REQ_GET_SECURITY_DATA 0x13
#define USB_REQ_SET_WUSB_DATA 0x14
#define USB_REQ_LOOPBACK_DATA_WRITE 0x15
#define USB_REQ_LOOPBACK_DATA_READ 0x16
#define USB_REQ_SET_INTERFACE_DS 0x17
/*
* USB feature flags are written using USB_REQ_{CLEAR,SET}_FEATURE, and
* are read as a bit array returned by USB_REQ_GET_STATUS. (So there
* are at most sixteen features of each type.)
*/
#define USB_DEVICE_SELF_POWERED 0 /* (read only) */
#define USB_DEVICE_REMOTE_WAKEUP 1 /* dev may initiate wakeup */
#define USB_DEVICE_TEST_MODE 2 /* (wired high speed only) */
#define USB_DEVICE_BATTERY 2 /* (wireless) */
#define USB_DEVICE_B_HNP_ENABLE 3 /* (otg) dev may initiate HNP */
#define USB_DEVICE_WUSB_DEVICE 3 /* (wireless)*/
#define USB_DEVICE_A_HNP_SUPPORT 4 /* (otg) RH port supports HNP */
#define USB_DEVICE_A_ALT_HNP_SUPPORT 5 /* (otg) other RH port does */
#define USB_DEVICE_DEBUG_MODE 6 /* (special devices only) */
#define USB_ENDPOINT_HALT 0 /* IN/OUT will STALL */
/**
* struct usb_ctrlrequest - SETUP data for a USB device control request
* @bRequestType: matches the USB bmRequestType field
* @bRequest: matches the USB bRequest field
* @wValue: matches the USB wValue field (le16 byte order)
* @wIndex: matches the USB wIndex field (le16 byte order)
* @wLength: matches the USB wLength field (le16 byte order)
*
* This structure is used to send control requests to a USB device. It matches
* the different fields of the USB 2.0 Spec section 9.3, table 9-2. See the
* USB spec for a fuller description of the different fields, and what they are
* used for.
*
* Note that the driver for any interface can issue control requests.
* For most devices, interfaces don't coordinate with each other, so
* such requests may be made at any time.
*/
#if defined(__BIG_ENDIAN) || defined(__ARMEB__)
#error (functionality not verified for big endian targets, todo...)
#endif
struct usb_ctrlrequest {
__u8 bRequestType;
__u8 bRequest;
__le16 wValue;
__le16 wIndex;
__le16 wLength;
} __attribute__ ((packed));
/*-------------------------------------------------------------------------*/
/*
* STANDARD DESCRIPTORS ... as returned by GET_DESCRIPTOR, or
* (rarely) accepted by SET_DESCRIPTOR.
*
* Note that all multi-byte values here are encoded in little endian
* byte order "on the wire". But when exposed through Linux-USB APIs,
* they've been converted to cpu byte order.
*/
/*
* Descriptor types ... USB 2.0 spec table 9.5
*/
#define USB_DT_DEVICE 0x01
#define USB_DT_CONFIG 0x02
#define USB_DT_STRING 0x03
#define USB_DT_INTERFACE 0x04
#define USB_DT_ENDPOINT 0x05
#define USB_DT_DEVICE_QUALIFIER 0x06
#define USB_DT_OTHER_SPEED_CONFIG 0x07
#define USB_DT_INTERFACE_POWER 0x08
/* these are from a minor usb 2.0 revision (ECN) */
#define USB_DT_OTG 0x09
#define USB_DT_DEBUG 0x0a
#define USB_DT_INTERFACE_ASSOCIATION 0x0b
/* these are from the Wireless USB spec */
#define USB_DT_SECURITY 0x0c
#define USB_DT_KEY 0x0d
#define USB_DT_ENCRYPTION_TYPE 0x0e
#define USB_DT_BOS 0x0f
#define USB_DT_DEVICE_CAPABILITY 0x10
#define USB_DT_WIRELESS_ENDPOINT_COMP 0x11
#define USB_DT_WIRE_ADAPTER 0x21
#define USB_DT_RPIPE 0x22
/* Conventional codes for class-specific descriptors. The convention is
* defined in the USB "Common Class" Spec (3.11). Individual class specs
* are authoritative for their usage, not the "common class" writeup.
*/
#define USB_DT_CS_DEVICE (USB_TYPE_CLASS | USB_DT_DEVICE)
#define USB_DT_CS_CONFIG (USB_TYPE_CLASS | USB_DT_CONFIG)
#define USB_DT_CS_STRING (USB_TYPE_CLASS | USB_DT_STRING)
#define USB_DT_CS_INTERFACE (USB_TYPE_CLASS | USB_DT_INTERFACE)
#define USB_DT_CS_ENDPOINT (USB_TYPE_CLASS | USB_DT_ENDPOINT)
/* All standard descriptors have these 2 fields at the beginning */
struct usb_descriptor_header {
__u8 bLength;
__u8 bDescriptorType;
} __attribute__ ((packed));
/*-------------------------------------------------------------------------*/
/* USB_DT_DEVICE: Device descriptor */
struct usb_device_descriptor {
__u8 bLength;
__u8 bDescriptorType;
__le16 bcdUSB;
__u8 bDeviceClass;
__u8 bDeviceSubClass;
__u8 bDeviceProtocol;
__u8 bMaxPacketSize0;
__le16 idVendor;
__le16 idProduct;
__le16 bcdDevice;
__u8 iManufacturer;
__u8 iProduct;
__u8 iSerialNumber;
__u8 bNumConfigurations;
} __attribute__ ((packed));
#define USB_DT_DEVICE_SIZE 18
/*
* Device and/or Interface Class codes
* as found in bDeviceClass or bInterfaceClass
* and defined by www.usb.org documents
*/
#define USB_CLASS_PER_INTERFACE 0 /* for DeviceClass */
#define USB_CLASS_AUDIO 1
#define USB_CLASS_COMM 2
#define USB_CLASS_HID 3
#define USB_CLASS_PHYSICAL 5
#define USB_CLASS_STILL_IMAGE 6
#define USB_CLASS_PRINTER 7
#define USB_CLASS_MASS_STORAGE 8
#define USB_CLASS_HUB 9
#define USB_CLASS_CDC_DATA 0x0a
#define USB_CLASS_CSCID 0x0b /* chip+ smart card */
#define USB_CLASS_CONTENT_SEC 0x0d /* content security */
#define USB_CLASS_VIDEO 0x0e
#define USB_CLASS_WIRELESS_CONTROLLER 0xe0
#define USB_CLASS_MISC 0xef
#define USB_CLASS_APP_SPEC 0xfe
#define USB_CLASS_VENDOR_SPEC 0xff
/*-------------------------------------------------------------------------*/
/* USB_DT_CONFIG: Configuration descriptor information.
*
* USB_DT_OTHER_SPEED_CONFIG is the same descriptor, except that the
* descriptor type is different. Highspeed-capable devices can look
* different depending on what speed they're currently running. Only
* devices with a USB_DT_DEVICE_QUALIFIER have any OTHER_SPEED_CONFIG
* descriptors.
*/
struct usb_config_descriptor {
__u8 bLength;
__u8 bDescriptorType;
__le16 wTotalLength;
__u8 bNumInterfaces;
__u8 bConfigurationValue;
__u8 iConfiguration;
__u8 bmAttributes;
__u8 bMaxPower;
} __attribute__ ((packed));
#define USB_DT_CONFIG_SIZE 9
/* from config descriptor bmAttributes */
#define USB_CONFIG_ATT_ONE (1 << 7) /* must be set */
#define USB_CONFIG_ATT_SELFPOWER (1 << 6) /* self powered */
#define USB_CONFIG_ATT_WAKEUP (1 << 5) /* can wakeup */
#define USB_CONFIG_ATT_BATTERY (1 << 4) /* battery powered */
/*-------------------------------------------------------------------------*/
/* USB_DT_STRING: String descriptor */
struct usb_string_descriptor {
__u8 bLength;
__u8 bDescriptorType;
__le16 wData[1]; /* UTF-16LE encoded */
} __attribute__ ((packed));
/* note that "string" zero is special, it holds language codes that
* the device supports, not Unicode characters.
*/
/*-------------------------------------------------------------------------*/
/* USB_DT_INTERFACE: Interface descriptor */
struct usb_interface_descriptor {
__u8 bLength;
__u8 bDescriptorType;
__u8 bInterfaceNumber;
__u8 bAlternateSetting;
__u8 bNumEndpoints;
__u8 bInterfaceClass;
__u8 bInterfaceSubClass;
__u8 bInterfaceProtocol;
__u8 iInterface;
} __attribute__ ((packed));
#define USB_DT_INTERFACE_SIZE 9
/*-------------------------------------------------------------------------*/
/* USB_DT_ENDPOINT: Endpoint descriptor */
struct usb_endpoint_descriptor {
__u8 bLength;
__u8 bDescriptorType;
__u8 bEndpointAddress;
__u8 bmAttributes;
__le16 wMaxPacketSize;
__u8 bInterval;
/* NOTE: these two are _only_ in audio endpoints. */
/* use USB_DT_ENDPOINT*_SIZE in bLength, not sizeof. */
__u8 bRefresh;
__u8 bSynchAddress;
} __attribute__ ((packed));
#define USB_DT_ENDPOINT_SIZE 7
#define USB_DT_ENDPOINT_AUDIO_SIZE 9 /* Audio extension */
/*
* Endpoints
*/
#define USB_ENDPOINT_NUMBER_MASK 0x0f /* in bEndpointAddress */
#define USB_ENDPOINT_DIR_MASK 0x80
#define USB_ENDPOINT_XFERTYPE_MASK 0x03 /* in bmAttributes */
#define USB_ENDPOINT_XFER_CONTROL 0
#define USB_ENDPOINT_XFER_ISOC 1
#define USB_ENDPOINT_XFER_BULK 2
#define USB_ENDPOINT_XFER_INT 3
#define USB_ENDPOINT_MAX_ADJUSTABLE 0x80
/*-------------------------------------------------------------------------*/
/* USB_DT_DEVICE_QUALIFIER: Device Qualifier descriptor */
struct usb_qualifier_descriptor {
__u8 bLength;
__u8 bDescriptorType;
__le16 bcdUSB;
__u8 bDeviceClass;
__u8 bDeviceSubClass;
__u8 bDeviceProtocol;
__u8 bMaxPacketSize0;
__u8 bNumConfigurations;
__u8 bRESERVED;
} __attribute__ ((packed));
/*-------------------------------------------------------------------------*/
/* USB_DT_OTG (from OTG 1.0a supplement) */
struct usb_otg_descriptor {
__u8 bLength;
__u8 bDescriptorType;
__u8 bmAttributes; /* support for HNP, SRP, etc */
} __attribute__ ((packed));
/* from usb_otg_descriptor.bmAttributes */
#define USB_OTG_SRP (1 << 0)
#define USB_OTG_HNP (1 << 1) /* swap host/device roles */
/*-------------------------------------------------------------------------*/
/* USB_DT_DEBUG: for special highspeed devices, replacing serial console */
struct usb_debug_descriptor {
__u8 bLength;
__u8 bDescriptorType;
/* bulk endpoints with 8 byte maxpacket */
__u8 bDebugInEndpoint;
__u8 bDebugOutEndpoint;
} __attribute__((packed));
/*-------------------------------------------------------------------------*/
/* USB_DT_INTERFACE_ASSOCIATION: groups interfaces */
struct usb_interface_assoc_descriptor {
__u8 bLength;
__u8 bDescriptorType;
__u8 bFirstInterface;
__u8 bInterfaceCount;
__u8 bFunctionClass;
__u8 bFunctionSubClass;
__u8 bFunctionProtocol;
__u8 iFunction;
} __attribute__ ((packed));
/*-------------------------------------------------------------------------*/
/* USB_DT_SECURITY: group of wireless security descriptors, including
* encryption types available for setting up a CC/association.
*/
struct usb_security_descriptor {
__u8 bLength;
__u8 bDescriptorType;
__le16 wTotalLength;
__u8 bNumEncryptionTypes;
} __attribute__((packed));
/*-------------------------------------------------------------------------*/
/* USB_DT_KEY: used with {GET,SET}_SECURITY_DATA; only public keys
* may be retrieved.
*/
struct usb_key_descriptor {
__u8 bLength;
__u8 bDescriptorType;
__u8 tTKID[3];
__u8 bReserved;
__u8 bKeyData[0];
} __attribute__((packed));
/*-------------------------------------------------------------------------*/
/* USB_DT_ENCRYPTION_TYPE: bundled in DT_SECURITY groups */
struct usb_encryption_descriptor {
__u8 bLength;
__u8 bDescriptorType;
__u8 bEncryptionType;
#define USB_ENC_TYPE_UNSECURE 0
#define USB_ENC_TYPE_WIRED 1 /* non-wireless mode */
#define USB_ENC_TYPE_CCM_1 2 /* aes128/cbc session */
#define USB_ENC_TYPE_RSA_1 3 /* rsa3072/sha1 auth */
__u8 bEncryptionValue; /* use in SET_ENCRYPTION */
__u8 bAuthKeyIndex;
} __attribute__((packed));
/*-------------------------------------------------------------------------*/
/* USB_DT_BOS: group of wireless capabilities */
struct usb_bos_descriptor {
__u8 bLength;
__u8 bDescriptorType;
__le16 wTotalLength;
__u8 bNumDeviceCaps;
} __attribute__((packed));
/*-------------------------------------------------------------------------*/
/* USB_DT_DEVICE_CAPABILITY: grouped with BOS */
struct usb_dev_cap_header {
__u8 bLength;
__u8 bDescriptorType;
__u8 bDevCapabilityType;
} __attribute__((packed));
#define USB_CAP_TYPE_WIRELESS_USB 1
struct usb_wireless_cap_descriptor { /* Ultra Wide Band */
__u8 bLength;
__u8 bDescriptorType;
__u8 bDevCapabilityType;
__u8 bmAttributes;
#define USB_WIRELESS_P2P_DRD (1 << 1)
#define USB_WIRELESS_BEACON_MASK (3 << 2)
#define USB_WIRELESS_BEACON_SELF (1 << 2)
#define USB_WIRELESS_BEACON_DIRECTED (2 << 2)
#define USB_WIRELESS_BEACON_NONE (3 << 2)
__le16 wPHYRates; /* bit rates, Mbps */
#define USB_WIRELESS_PHY_53 (1 << 0) /* always set */
#define USB_WIRELESS_PHY_80 (1 << 1)
#define USB_WIRELESS_PHY_107 (1 << 2) /* always set */
#define USB_WIRELESS_PHY_160 (1 << 3)
#define USB_WIRELESS_PHY_200 (1 << 4) /* always set */
#define USB_WIRELESS_PHY_320 (1 << 5)
#define USB_WIRELESS_PHY_400 (1 << 6)
#define USB_WIRELESS_PHY_480 (1 << 7)
__u8 bmTFITXPowerInfo; /* TFI power levels */
__u8 bmFFITXPowerInfo; /* FFI power levels */
__le16 bmBandGroup;
__u8 bReserved;
} __attribute__((packed));
/*-------------------------------------------------------------------------*/
/* USB_DT_WIRELESS_ENDPOINT_COMP: companion descriptor associated with
* each endpoint descriptor for a wireless device
*/
struct usb_wireless_ep_comp_descriptor {
__u8 bLength;
__u8 bDescriptorType;
__u8 bMaxBurst;
__u8 bMaxSequence;
__le16 wMaxStreamDelay;
__le16 wOverTheAirPacketSize;
__u8 bOverTheAirInterval;
__u8 bmCompAttributes;
#define USB_ENDPOINT_SWITCH_MASK 0x03 /* in bmCompAttributes */
#define USB_ENDPOINT_SWITCH_NO 0
#define USB_ENDPOINT_SWITCH_SWITCH 1
#define USB_ENDPOINT_SWITCH_SCALE 2
} __attribute__((packed));
/*-------------------------------------------------------------------------*/
/* USB_REQ_SET_HANDSHAKE is a four-way handshake used between a wireless
* host and a device for connection set up, mutual authentication, and
* exchanging short lived session keys. The handshake depends on a CC.
*/
struct usb_handshake {
__u8 bMessageNumber;
__u8 bStatus;
__u8 tTKID[3];
__u8 bReserved;
__u8 CDID[16];
__u8 nonce[16];
__u8 MIC[8];
} __attribute__((packed));
/*-------------------------------------------------------------------------*/
/* USB_REQ_SET_CONNECTION modifies or revokes a connection context (CC).
* A CC may also be set up using non-wireless secure channels (including
* wired USB!), and some devices may support CCs with multiple hosts.
*/
struct usb_connection_context {
__u8 CHID[16]; /* persistent host id */
__u8 CDID[16]; /* device id (unique w/in host context) */
__u8 CK[16]; /* connection key */
} __attribute__((packed));
/*-------------------------------------------------------------------------*/
/* USB 2.0 defines three speeds, here's how Linux identifies them */
enum usb_device_speed {
USB_SPEED_UNKNOWN = 0, /* enumerating */
USB_SPEED_LOW, USB_SPEED_FULL, /* usb 1.1 */
USB_SPEED_HIGH, /* usb 2.0 */
USB_SPEED_VARIABLE, /* wireless (usb 2.5) */
};
enum usb_device_state {
/* NOTATTACHED isn't in the USB spec, and this state acts
* the same as ATTACHED ... but it's clearer this way.
*/
USB_STATE_NOTATTACHED = 0,
/* chapter 9 and authentication (wireless) device states */
USB_STATE_ATTACHED,
USB_STATE_POWERED, /* wired */
USB_STATE_UNAUTHENTICATED, /* auth */
USB_STATE_RECONNECTING, /* auth */
USB_STATE_DEFAULT, /* limited function */
USB_STATE_ADDRESS,
USB_STATE_CONFIGURED, /* most functions */
USB_STATE_SUSPENDED
/* NOTE: there are actually four different SUSPENDED
* states, returning to POWERED, DEFAULT, ADDRESS, or
* CONFIGURED respectively when SOF tokens flow again.
*/
};
#endif /* __LINUX_USB_CH9_H */
|
1001-study-uboot
|
include/linux/usb/ch9.h
|
C
|
gpl3
| 18,249
|
/*
* crc32.h
* See linux/lib/crc32.c for license and changes
*/
#ifndef _LINUX_CRC32_H
#define _LINUX_CRC32_H
#include <linux/types.h>
/* #include <linux/bitrev.h> */
extern u32 crc32_le(u32 crc, unsigned char const *p, size_t len);
/* extern u32 crc32_be(u32 crc, unsigned char const *p, size_t len); */
#define crc32(seed, data, length) crc32_le(seed, (unsigned char const *)data, length)
/*
* Helpers for hash table generation of ethernet nics:
*
* Ethernet sends the least significant bit of a byte first, thus crc32_le
* is used. The output of crc32_le is bit reversed [most significant bit
* is in bit nr 0], thus it must be reversed before use. Except for
* nics that bit swap the result internally...
*/
/* #define ether_crc(length, data) bitrev32(crc32_le(~0, data, length)) */
/* #define ether_crc_le(length, data) crc32_le(~0, data, length) */
#endif /* _LINUX_CRC32_H */
|
1001-study-uboot
|
include/linux/crc32.h
|
C
|
gpl3
| 904
|
#ifndef __LZO_H__
#define __LZO_H__
/*
* LZO Public Kernel Interface
* A mini subset of the LZO real-time data compression library
*
* Copyright (C) 1996-2005 Markus F.X.J. Oberhumer <markus@oberhumer.com>
*
* The full LZO package can be found at:
* http://www.oberhumer.com/opensource/lzo/
*
* Changed for kernel use by:
* Nitin Gupta <nitingupta910@gmail.com>
* Richard Purdie <rpurdie@openedhand.com>
*/
#define LZO1X_MEM_COMPRESS (16384 * sizeof(unsigned char *))
#define LZO1X_1_MEM_COMPRESS LZO1X_MEM_COMPRESS
#define lzo1x_worst_compress(x) ((x) + ((x) / 16) + 64 + 3)
/* This requires 'workmem' of size LZO1X_1_MEM_COMPRESS */
int lzo1x_1_compress(const unsigned char *src, size_t src_len,
unsigned char *dst, size_t *dst_len, void *wrkmem);
/* safe decompression with overrun testing */
int lzo1x_decompress_safe(const unsigned char *src, size_t src_len,
unsigned char *dst, size_t *dst_len);
/* decompress lzop format */
int lzop_decompress(const unsigned char *src, size_t src_len,
unsigned char *dst, size_t *dst_len);
/*
* Return values (< 0 = Error)
*/
#define LZO_E_OK 0
#define LZO_E_ERROR (-1)
#define LZO_E_OUT_OF_MEMORY (-2)
#define LZO_E_NOT_COMPRESSIBLE (-3)
#define LZO_E_INPUT_OVERRUN (-4)
#define LZO_E_OUTPUT_OVERRUN (-5)
#define LZO_E_LOOKBEHIND_OVERRUN (-6)
#define LZO_E_EOF_NOT_FOUND (-7)
#define LZO_E_INPUT_NOT_CONSUMED (-8)
#define LZO_E_NOT_YET_IMPLEMENTED (-9)
#endif
|
1001-study-uboot
|
include/linux/lzo.h
|
C
|
gpl3
| 1,452
|
#ifndef _LINUX_BITOPS_H
#define _LINUX_BITOPS_H
#include <asm/types.h>
/*
* ffs: find first bit set. This is defined the same way as
* the libc and compiler builtin ffs routines, therefore
* differs in spirit from the above ffz (man ffs).
*/
static inline int generic_ffs(int x)
{
int r = 1;
if (!x)
return 0;
if (!(x & 0xffff)) {
x >>= 16;
r += 16;
}
if (!(x & 0xff)) {
x >>= 8;
r += 8;
}
if (!(x & 0xf)) {
x >>= 4;
r += 4;
}
if (!(x & 3)) {
x >>= 2;
r += 2;
}
if (!(x & 1)) {
x >>= 1;
r += 1;
}
return r;
}
/**
* fls - find last (most-significant) bit set
* @x: the word to search
*
* This is defined the same way as ffs.
* Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
*/
static inline int generic_fls(int x)
{
int r = 32;
if (!x)
return 0;
if (!(x & 0xffff0000u)) {
x <<= 16;
r -= 16;
}
if (!(x & 0xff000000u)) {
x <<= 8;
r -= 8;
}
if (!(x & 0xf0000000u)) {
x <<= 4;
r -= 4;
}
if (!(x & 0xc0000000u)) {
x <<= 2;
r -= 2;
}
if (!(x & 0x80000000u)) {
x <<= 1;
r -= 1;
}
return r;
}
/*
* hweightN: returns the hamming weight (i.e. the number
* of bits set) of a N-bit word
*/
static inline unsigned int generic_hweight32(unsigned int w)
{
unsigned int res = (w & 0x55555555) + ((w >> 1) & 0x55555555);
res = (res & 0x33333333) + ((res >> 2) & 0x33333333);
res = (res & 0x0F0F0F0F) + ((res >> 4) & 0x0F0F0F0F);
res = (res & 0x00FF00FF) + ((res >> 8) & 0x00FF00FF);
return (res & 0x0000FFFF) + ((res >> 16) & 0x0000FFFF);
}
static inline unsigned int generic_hweight16(unsigned int w)
{
unsigned int res = (w & 0x5555) + ((w >> 1) & 0x5555);
res = (res & 0x3333) + ((res >> 2) & 0x3333);
res = (res & 0x0F0F) + ((res >> 4) & 0x0F0F);
return (res & 0x00FF) + ((res >> 8) & 0x00FF);
}
static inline unsigned int generic_hweight8(unsigned int w)
{
unsigned int res = (w & 0x55) + ((w >> 1) & 0x55);
res = (res & 0x33) + ((res >> 2) & 0x33);
return (res & 0x0F) + ((res >> 4) & 0x0F);
}
#define BIT_MASK(nr) (1UL << ((nr) % BITS_PER_LONG))
#define BIT_WORD(nr) ((nr) / BITS_PER_LONG)
#include <asm/bitops.h>
/* linux/include/asm-generic/bitops/non-atomic.h */
#ifndef PLATFORM__SET_BIT
# define __set_bit generic_set_bit
#endif
#ifndef PLATFORM__CLEAR_BIT
# define __clear_bit generic_clear_bit
#endif
#ifndef PLATFORM_FFS
# define ffs generic_ffs
#endif
#ifndef PLATFORM_FLS
# define fls generic_fls
#endif
/**
* __set_bit - Set a bit in memory
* @nr: the bit to set
* @addr: the address to start counting from
*
* Unlike set_bit(), this function is non-atomic and may be reordered.
* If it's called on the same region of memory simultaneously, the effect
* may be that only one operation succeeds.
*/
static inline void generic_set_bit(int nr, volatile unsigned long *addr)
{
unsigned long mask = BIT_MASK(nr);
unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
*p |= mask;
}
static inline void generic_clear_bit(int nr, volatile unsigned long *addr)
{
unsigned long mask = BIT_MASK(nr);
unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
*p &= ~mask;
}
#endif
|
1001-study-uboot
|
include/linux/bitops.h
|
C
|
gpl3
| 3,113
|
#ifndef _LINUX_ERR_H
#define _LINUX_ERR_H
/* XXX U-BOOT XXX */
#if 0
#include <linux/compiler.h>
#else
#include <linux/mtd/compat.h>
#endif
#include <asm/errno.h>
/*
* Kernel pointers have redundant information, so we can use a
* scheme where we can return either an error code or a dentry
* pointer with the same return value.
*
* This should be a per-architecture thing, to allow different
* error and pointer decisions.
*/
#define MAX_ERRNO 4095
#ifndef __ASSEMBLY__
#define IS_ERR_VALUE(x) unlikely((x) >= (unsigned long)-MAX_ERRNO)
static inline void *ERR_PTR(long error)
{
return (void *) error;
}
static inline long PTR_ERR(const void *ptr)
{
return (long) ptr;
}
static inline long IS_ERR(const void *ptr)
{
return IS_ERR_VALUE((unsigned long)ptr);
}
#endif
#endif /* _LINUX_ERR_H */
|
1001-study-uboot
|
include/linux/err.h
|
C
|
gpl3
| 813
|