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/*
* Copyright (c) 2025 Silicon Laboratories Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <em_device.h>
#include <em_acmp.h>
#include <zephyr/device.h>
#include <zephyr/drivers/comparator.h>
#include <zephyr/drivers/clock_control.h>
#include <zephyr/drivers/clock_control/clock_control_silabs.h>
#includ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Alexander Kozhinov <ak.alexander.kozhinov@gmail.com>
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/irq.h>
#include <zephyr/kernel.h>
#include <zephyr/pm/device.h>
#include <zephyr/logging/log.h>
#include <zephyr/sys/util_macro.h>
#include <zephyr/drivers/pinctrl.h>
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>s.h>
#include <zephyr/sys/libc-hooks.h>
extern int efi_console_putchar(int c);
#if defined(CONFIG_PRINTK) || defined(CONFIG_STDOUT_CONSOLE)
/**
*
* @brief Output one character to EFI console
*
* Outputs both line feed and carriage return in the case of a '\n'.
*
* @param c Character to output
*
... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2020 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <zephyr/drivers/ipm.h>
#include <zephyr/sys/printk-hooks.h>
#include <zephyr/sys/libc-hooks.h>
#include <zephyr/logging/log.h>
LOG_MODULE_REG... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>iver_data->rb, config_info->rb_size32 * sizeof(uint32_t),
(uint8_t *)config_info->ring_buf_data);
ipm_register_callback(ipm, ipm_console_receive_callback, driver_data);
k_thread_create(&driver_data->rx_thread, config_info->thread_stack,
CONFIG_IPM_CONSOLE_STACK_SIZE, ipm_console_thread,
dr... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/* ipm_console_send.c - Console messages to another processor */
/*
* Copyright (c) 2015 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <errno.h>
#include <zephyr/kernel.h>
#include <zephyr/sys/printk.h>
#include <zephyr/sys/printk-hooks.h>
#include <zephyr/sys/libc-hooks.h>
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright 2022 NXP
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <zephyr<|fim_suffix|>CONFIG_STDOUT_CONSOLE)
/**
* @brief Output one character to SIMULATOR console
* @param c Character to output
* @return The character passed as input.
*/
static int console_out(... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2018 Oticon A/S
* Copyright (c)<|fim_suffix|>;
}
}
static int posix_arch_console_init(void)
{
#ifdef CONFIG_PRINTK
__printk_hook_install(print_char);
#endif
#ifdef CONFIG_STDOUT_CONSOLE
__stdout_hook_install(print_char);
#endif
return 0;
}
SYS_INIT(posix_arch_console_init, PRE_K... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|><zephyr/init.h>
#include <zephyr/linker/devicetree_regions.h>
#ifdef CONFIG_RAM_CONSOLE_BUFFER_SECTION
#if !DT_HAS_CHOSEN(zephyr_ram_console)
#error "Lack of chosen property zephyr,ram_console!"
#elif (CONFIG_RAM_CONSOLE_BUFFER_SIZE > DT_REG_SIZE(DT_CHOSEN(zephyr_ram_console)))
#error "Custom RAM console... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ut);
#endif
__stdout_hook_install(rtt_console_out);
return 0;
}
SYS_INIT(rtt_console_init, PRE_KERNEL_1, CONFIG_CONSOLE_INIT_PRIORITY);
<|fim_prefix|>/* rtt_console.c - Console messages to a RAM buffer that is then read by
* the Segger J-Link debugger
*/
/*
* Copyright (c) 2016 Nordic Semiconducto... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2019 LuoZhongYao
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <zephyr/arch/common/semihost.h>
#include <zephyr/sys/libc-hooks.h>
int arch_printk_char_out(int _c)
{
semihost_poll_out((char)_c);
ret... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2011-2012, 2014-2015 Wind River Systems, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief UART-driven console
*
*
* Serial console driver.
* Hooks into the printk and fputc (for printf) modules. Poll driven.
*/
#include <zephyr/kernel.h>
#include <stdio... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>umgr_ignoring = false;
} else {
uart_mcumgr_cur_buf = NULL;
return rx_buf;
}
}
return NULL;
#endif
}
#if defined(CONFIG_MCUMGR_TRANSPORT_UART_ASYNC)
static void uart_mcumgr_async(const struct device *dev, struct uart_event *evt, void *user_data)
{
struct uart_mcumgr_rx_buf *rx_buf;
uint8_t... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> \
do { /* nothing */ \
} while ((0))
#endif
#if defined(CONFIG_PRINTK)
extern void __printk_hook_install(int (*fn)(int));
#else
#define __printk_hook_install(x) ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>d)
{
#if defined(CONFIG_STDOUT_CONSOLE)
__stdout_hook_install(arch_printk_char_out);
#endif
#if defined(CONFIG_PRINTK)
__printk_hook_install(arch_printk_char_out);
#endif
}
/* This gets optionally defined by the platform layer as it needs (it
* might want to go in a special location to coordinate with... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyrigh<|fim_suffix|> ret_val __asm__ ("a2");
register int ret_err __asm__ ("a3");
buf[0] = (char)c;
__asm__ volatile ("simcall"
: "=a" (ret_val), "=a" (ret_err)
: "a" (a2), "a" (a3), "a" (a4), "a" (a5)
: "memory");
return c;
}
#endif
/**
* @brief Install printk/stdout hook for X... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright Meta Platforms, Inc. and its affiliates.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/debug/coredump.h>
#include <zephyr/drivers/coredump.h>
#define DT_DRV_COMPAT zephyr_coredump
enum COREDUMP_TYPE {
COREDUMP_TYPE_MEMCPY = 0,
COREDUMP_TYPE_CALLBACK = 1,
};
struct co... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2022 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/device.h>
#include <zephyr/devicetree.h>
#include <zephyr/drivers/counter.h>
#include <zephyr/kernel.h>
#include <zephyr/spinlock.h>
#include <soc.h>
#include <counter/counter_ace_v1x_art_regs.h>
st... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2<|fim_suffix|>OUNTER
#define ACE_ART_COUNTER_ID DT_NODELABEL(ace_art_counter)
#define ACE_TIMESTAMP_ID DT_NODELABEL(ace_timestamp)
#define ACE_TSCTRL (DT_REG_ADDR(ACE_TIMESTAMP_ID))
#define ACE_ARTCS (DT_REG_ADDR(ACE_ART_COUNTER_ID))
#define ACE_ARTCS_LO ACE_ARTCS
#define ACE_ARTCS... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2022 Intel Corpor<|fim_suffix|>*dev,
uint32_t *value)
{
ARG_UNUSED(dev);
*value = sys_read32(ACE_RTCWC_LO);
return 0;
}
#ifdef CONFIG_COUNTER_64BITS_TICKS
static int counter_ace_v1x_rtc_get_value(const struct device *dev,
uint64_t *value)
{
ARG_UNUSED(dev);
uint32_t hi0, ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>1X_RTC_REGS__
#if CONFIG_ACE_V1X_RTC_COUNTER
#define ACE_RTC_COUNTER_ID DT_NODELABEL(ace_rtc_counter)
#define ACE_RTCWC (DT_REG_ADDR(ACE_RTC_COUNTER_ID))
#define ACE_RTCWC_LO ACE_RTCWC
#define ACE_RTCWC_HI ACE_RTCWC + 0x04
#endif
#endif /*__COUNTER_ACE_V1X_RTC_REGS__*/
<|fim_prefix|>/*
* Copyright (... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> \
counter_ambiq_get_value(dev_##n, &now); \
if (data_##n->callback) { \
data_##n->callback(dev_##n, 0, now, data_##n->user_data); \
} ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2022 Andes Technology
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/drivers/counter.h>
#include <zephyr/spinlock.h>
#include <zephyr/irq.h>
#include <zephyr/arch/cpu.h>
#include <string.h>
#define DT_DRV_COMPAT andestech_atcpit100
/* register definitions */
#define ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>rtc_isr((void *)dev); \
} \
static void irq_config_##index(void) \
{ ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright(c) 2026, Realtek Semiconductor Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT realtek_bee_counter_timer
#include <zephyr/device.h>
#include <zephyr/drivers/clock_control.h>
#include <zephyr/drivers/clock_control/bee_clock_control.h>
#include <zephyr/driv... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright The Zephyr Project Contributors
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT bflb_rtc
#include <zephyr/drivers/counter.h>
#include <zephyr/irq.h>
#include <zephyr/logging/log.h>
#include <zephyr/sys/sys_io.h>
#include <zephyr/sys/util.h>
LOG_MODULE_REGISTER(counter_b... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>INST_DEFINE(n, counter_bflb_timer_init, NULL, &counter_bflb_timer_data_##n, \
&counter_bflb_timer_config_##n, POST_KERNEL, \
CONFIG_COUNTER_INIT_PRIORITY, &counter_bflb_timer_api);
DT_INST_FOREACH_STATUS_OKAY(COUNTER_BFLB_TIMER_DEFINE)
<|fim_prefix|>/*
* Co... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2024 BayLibre, SAS
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT ti_cc23x0_lgpt
#include <zephyr/device.h>
#include <zephyr/drivers/counter.h>
#include <zephyr/spinlock.h>
#include <zephyr/kernel.h>
#include <zephyr/drivers/clock_control.h>
#include <zephyr/logg... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2024 BayLibre, SAS
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT ti_cc23x0_rtc
#include <zephyr/device.h>
#include <zephyr/drivers/counter.h>
#include <zephyr/spinlock.h>
#include <zephyr/kernel.h>
#include <zephyr/drivers/clock_control.h>
#include <zephyr/loggi... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ile (*pun != *pun2);
/*
* Normalize the state; 12hr -> 24hr, BCD -> decimal.
* The order is a bit awkward because we need to interpret
* the HOUR_PM flag before we adjust for BCD.
*/
if ((state.status_b & STATUS_B_24HR) != 0U) {
pm = false;
} else {
pm = ((state.hour & HOUR_PM) == HOUR_PM... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>
/* start timer in user-defined mode */
sys_set_bit(reg_base + CONTROLREG_OFST, TIMER_MODE_BIT);
sys_clear_bit(reg_base + CONTROLREG_OFST, TIMER_INTR_MASK_BIT);
sys_write32(alarm_cfg->ticks, reg_base + LOADCOUNT_OFST);
sys_set_bit(reg_base + CONTROLREG_OFST, TIMER_CONTROL_ENABLE_BIT);
k_spin_unlo... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> *)arg;
struct counter_esp32_data *data = dev->data;
counter_alarm_callback_t cb = data->alarm_cfg.callback;
void *cb_data = data->alarm_cfg.user_data;
uint32_t now;
#if SOC_HAS_LP_TIMER
if (!LP_TIMER_INT_ST_ALARM) {
return;
}
#else
uint32_t status = REG_READ(RTC_CNTL_INT_ST_REG);
if (!(status... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>uard_period_64,
#endif /* CONFIG_COUNTER_64BITS_TICKS */
};
static void IRAM_ATTR counter_esp32_isr(void *arg)
{
const struct device *dev = (const struct device *)arg;
struct counter_esp32_data *data = dev->data;
counter_alarm_callback_64_t cb = data->alarm_cfg.callback;
void *cb_data = data->alarm_c... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>upt_flag_get(dev, TIMER_FLAG_CH(chan)));
bool sw_irq_pending = data->cc_int_pending & TIMER_INT_CH(chan);
if (hw_irq_pending || sw_irq_pending) {
atomic_and(&data->cc_int_pending, ~TIMER_INT_CH(chan));
interrupt_disable(dev, TIMER_INT_CH(chan));
interrupt_flag_clear(dev, TIMER_FLAG_CH(chan));
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2019, Piotr Mienkowski
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT silabs_gecko_rtcc
#include <stddef.h>
#include <string.h>
#include <errno.h>
#include <zephyr/kernel.h>
#include <zephyr/device.h>
#include <soc.h>
#include <em_cmu.h>
#include <em_rtcc.h>
#inc... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> alarm_timer[STIMER_ALARM_NUM];
static sl_sleeptimer_timer_handle_t top_timer;
#ifdef CONFIG_SOC_GECKO_HAS_ERRATA_RTCC_E201
#define ERRATA_RTCC_E201_MESSAGE \
"Errata RTCC_E201: In case RTCC prescaler != 1 the module does not " ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>VER_COUNTER(dev, cancel_alarm));
return z_impl_counter_cancel_channel_alarm((const struct device *)dev, (uint8_t)chan_id);
}
#include <zephyr/syscalls/counter_cancel_channel_alarm_mrsh.c>
static inline int z_vrfy_counter_set_top_value(const struct device *dev,
const struct counter_top_cfg *c... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2018-2019 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT nxp_imx_epit
#include <zephyr/drivers/counter.h>
#include <zephyr/device.h>
#include <zephyr/irq.h>
#include "clock_freq.h"
#include "epit.h"
#define COUNTER_MAX_RELOAD 0xFFFFFFFF
struct imx_epit_confi... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2023 Cypress Semiconductor Corporation (an Infineon company) or
* an affiliate of Cypress Semiconductor Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @brief Counter driver for Infineon CAT1 MCU family.
*/
#define DT_DRV_COMPAT infineon_counter
#include <zephyr/drivers/counter... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>#define COUNTER_PERI_CLOCK_INSTANCE(n) DT_PROP_BY_IDX(DT_INST_PHANDLE(n, clocks), peri_group, 0),
#else
#define COUNTER_PERI_CLOCK_INSTANCE(n)
#endif
#if defined(CONFIG_SOC_FAMILY_INFINEON_EDGE)
#define COUNTER_PERI_CLOCK_INIT(n) \
.clock =... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 ITE Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT ite_it51xxx_counter
#include <soc.h>
#include <zephyr/drivers/counter.h>
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(counter_it51xxx, CONFIG_COUNTER_LOG_LEVEL);
/* 0x30 (offset 0x00): ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 ITE Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT ite_it8xxx2_counter
#include <soc.h>
#include <zephyr/drivers/counter.h>
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(counter_it8xxx2, CONFIG_COUNTER_LOG_LEVEL);
/* IT8XXX2 Timer registe... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2026 Texas Instruments Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT ti_k3_rtc_counter
#include <zephyr/device.h>
#include <<|fim_suffix|>_cfg *config = DEV_CFG(dev);
return config->counter_info.freq;
}
#ifdef CONFIG_COUNTER_64BITS_TICKS
static int k3_co... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2024 Analog Devices, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT adi_max32_rtc_counter
#include <zephyr/drivers/counter.h>
#include <zephyr/drivers/clock_control/adi_max32_clock_control.h>
#include <zephyr/drivers/pinctrl.h>
#include <zephyr/irq.h>
#inclu... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ter_top_cfg *counter_cfg)
{
const struct max32_tmr_config *cfg = dev->config;
if (counter_cfg->ticks == 0) {
return -EINVAL;
}
if (counter_cfg->ticks != cfg->info.max_top_value) {
return -ENOTSUP;
}
return 0;
}
static uint32_t api_get_pending_int(const struct device *dev)
{
const struct max... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> \
}, \
.regs = (mxc_wut_regs_t *)DT_REG_ADDR(TIMER(_num)), \
.clock_source = \
DT_PROP_OR(TIMER(_num), clock_... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2026 Microchip Technology Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <soc.h>
#include <zephyr/device.h>
#include <zephyr/irq.h>
#include <zephyr/sys/util.h>
#include <zephyr/logging/log.h>
#include <zephyr/drivers/counter.h>
#include <zephyr/drivers/clock_control/mchp... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>rm_cfg)
{
const struct sam_pit_config *config = dev->config;
const struct counter_config_info *info = &config->info;
struct sam_pit_data *data = dev->data;
k_spinlock_key_t key;
uint64_t top_value;
if (chan_id >= info->channels) {
return -ENOTSUP;
}
__ASSERT_NO_MSG(alarm_cfg->callback);
/* P... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2026 Microchip Technology Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <soc.h>
#include <zephyr/device.h>
#include <zephyr/logging/log.h>
#include <zephyr/irq.h>
#include <zephyr/sys/util.h>
#include <zephyr/drivers/counter.h>
#include <zephyr/drivers/clock_control/mchp_clock_control... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (C) 2025 Microchip Technology Inc. and its subsidiaries
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT microchip_tc_g2_counter
#include <zephyr/kernel.h>
#include <zephyr/drivers/counter.h>
#include <zephyr/drivers/pinctrl.h>
#include <zephyr/drivers/clock_control/at... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>e *const dev)
{
counter_mchp_channel_irq_handle(dev, 0);
}
/* Wrapper for channel 1 compare (alarm) interrupt.
* This is mapped to irq-2 (channel 1 IRQ).
*/
static inline void counter_mchp_irq_2_handle(const struct device *const dev)
{
counter_mchp_channel_irq_handle(dev, 1);
}
/* Wrapper for channe... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>< MCHP_BTMR_CTRL_PRESCALE_POS) &
MCHP_BTMR_CTRL_PRESCALE_MASK;
/* Set preload and actually pre-load the counter */
counter->PRLD = counter_cfg->info.max_top_value;
counter->CNT = counter_cfg->info.max_top_value;
soc_ecia_girq_ctrl(counter_cfg->girq_id, counter_cfg->girq_bit, 1);
counter_cfg->c... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>arm,
.cancel_alarm = mcux_lpc_ctimer_cancel_alarm,
.set_top_value = mcux_lpc_ctimer_set_top_value,
.get_pending_int = mcux_lpc_ctimer_get_pending_int,
.get_top_value = mcux_lpc_ctimer_get_top_value,
.get_freq = mcux_lpc_ctimer_get_freq,
};
#define COUNTER_LPC_CTIMER_DEVICE(id) ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> \
.max_top_value = 0xFFFFU, \
.flags = COUNTER_CONFIG_INFO_COUNT_UP, \
}, \
.base = (FTM_Type *)DT_INST_REG_ADDR(n), ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>, \
.channels = 1, \
.flags = COUNTER_CONFIG_INFO_COUNT_UP, \
}, \
.irq_config_func = mcux_gpt_irq_config_ ## n, \
}; \
\
DEVICE_DT_INST_DEFINE(n, \
mcux_gpt_init, \
NULL, \
&mcux_gpt_data_ ## n, \
&mcux_gpt_config_... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright 2021-23, NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/drivers/counter.h>
#include <zephyr/irq.h>
#include <fsl_rtc.h>
#include "fsl_power.h"
#include <zephyr/logging/log.h>
#include <soc.h>
LOG_MODULE_REGISTER(mcux_rtc, CONFIG_COUNTER_LOG_LEVEL);
struct mcux_lpc_rt... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright 2023, 2025-2026 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT nxp_lpit
#include <zephyr/drivers/counter.h>
#include <zephyr/drivers/clock_control.h>
#include <zephyr/irq.h>
#include <fsl_lpit.h>
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(counter_lpit, ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2020 Vestas Wind Systems A/S
* Copyright 2025 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT nxp_lptmr
#include <zephyr/devicetree.h>
#include <zephyr/sys/util.h>
#include <zephyr/drivers/counter.h>
#include <zephyr/irq.h>
#if defined(CONFIG_GIC)
#include <z... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>qtmr_config *config = dev->config;
struct mcux_qtmr_data *data = dev->data;
if (config->qtmr_config.primarySource < kQTMR_ClockDivide_1) {
/* for external sources, use the value from the dts (if given) */
data->freq = config->info.freq;
} else {
/* bus clock with divider */
if (!device_is_read... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2018 blik GmbH
* Copyright (c) 2018,2024 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT nxp_rtc
#include <zephyr/drivers/counter.h>
#include <zephyr/irq.h>
#include <zephyr/kernel.h>
#include <zephyr/sys_clock.h>
#include <fsl_rtc.h>
#include <zephyr/logging... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>fig;
const struct mcux_rtc_jdp_config *config =
CONTAINER_OF(info, struct mcux_rtc_jdp_config, info);
struct mcux_rtc_jdp_data *data = dev->data;
if (chan_id >= info->channels) {
LOG_ERR("Invalid channel id");
return -EINVAL;
}
if (chan_id == RTC_ALARM_CHANNEL) {
RTC_DisableInterrupts(confi... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2021 Basalte bv
* Copyright 2025 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT nxp_imx_snvs_rtc
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(mcux_snvs, CONFIG_COUNTER_LOG_LEVEL);
#ifdef CONFIG_COUNTER_MCUX_SNVS_SRTC
#define MCUX_SNVS_SRTC
#define MC... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>Could not get clock frequency");
return -EINVAL;
}
data->freq = clock_freq / (config->prescale + 1);
STM_GetDefaultConfig(&stmConfig);
stmConfig.prescale = config->prescale;
STM_Init(config->base, &stmConfig);
config->irq_config_func(dev);
return 0;
}
static DEVICE_API(counter, mcux_stm_driv... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright 2026 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT nxp_sysctr
#include <zephyr/drivers/clock_control.h>
#include <zephyr/drivers/counter.h>
#include <zephyr/irq.h>
#include <zephyr/logging/log.h>
#include <zephyr/spinlock.h>
#include <fsl_sysctr.h>
LOG_MODULE_... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright 2023-2024, 2026 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT nxp_tpm_timer
#include <zephyr/drivers/counter.h>
#include <zephyr/drivers/clock_control.h>
#include <zephyr/irq.h>
#include <zephyr/logging/log.h>
#include <zephyr/sys/barrier.h>
#include <fsl_tpm.h... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>f ((status == DL_TIMER_IIDX_CC0_UP) && data->alarm_cb) {
uint32_t now;
counter_alarm_callback_t alarm_cb = data->alarm_cb;
counter_mspm0_get_value(dev, &now);
data->alarm_cb = NULL;
alarm_cb(dev, 0, now, data->user_data);
} else if ((status == DL_TIMER_IIDX_LOAD) && data->top_cb) {
data->top... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>SOLUTE)) {
uint32_t current_value = hw_counter_get_value();
ticks += current_value;
if (ticks > top.ticks) { /* Handle wrap arounds */
ticks -= (top.ticks + 1); /* The count period is top.ticks + 1 */
}
}
pending_alarm[chan_id] = *alarm_cfg;
pending_alarm[chan_id].ticks = ticks;
is_alarm_... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Henrik Brix Andersen <henrik@brixandersen.dk>
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT neorv32_gptmr
#include <zephyr/drivers/counter.h>
#include <zephyr/drivers/syscon.h>
#include <zephyr/irq.h>
#include <zephyr/spinlock.h>
#include <zephyr/sys/sys_io... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Nuvoton Technology Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/drivers/counter.h>
#include <zephyr/kernel.h>
#include <zephyr/sys_clock.h>
#include "soc_miwu.h"
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(counter_npcx_lct, CONFIG_COUNTER_... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2018, Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/drivers/counter.h>
#include <hal/nrf_rtc.h>
#ifdef CONFIG_CLOCK_CONTROL_NRF
#include <zephyr/drivers/clock_control.h>
#include <zephyr/drivers/clock_control/nrf_clock_control.h>
#endif
#includ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ST_PROP(idx, prescaler)), \
.flags = COUNTER_CONFIG_INFO_COUNT_UP, \
.channels = CC_TO_ID(DT_INST_PROP(idx, cc_num)), \
}, \
.ch_data = counter##idx##_ch_data, \
.timer = (NRF_TIMER_Type *)DT_INST_REG_ADDR(idx), \
LOG_INSTANCE_PTR_INIT(log, LOG_MODULE_NAME, idx) ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ATUS_OKAY(n, \
NXP_MRT_CHANNEL_DATA_ARRAY_INIT) \
}; \
\
/* Forward declaration */ \
const static struct nxp_mrt_config nxp_mrt_##n##_config; \
\
/* Create all the channel/counter devices */ \
DT_INST_FOREACH_CHILD_STATUS_OKAY_VARGS(n, NXP_MRT_CHANNEL_DEV_I... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ISR */ \
const struct device *const nxp_pit_##n##_channels \
[DT_INST_FOREACH_CHILD_SEP_VARGS( \
n, DT_NODE_HAS_COMPAT, (+), nxp_pit_channel)] = { \
DT_INST_FOREACH_CHILD_STATUS_OKAY(n, \
NXP_PIT_INSERT_CHANNEL_DEVICE_INTO_ARRAY) \
}; \
\
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright 2022-2024 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT nxp_s32_sys_timer
#include <zephyr/kernel.h>
#include <zephyr/drivers/counter.h>
#include <zephyr/drivers/clock_control.h>
#if defined(CONFIG_GIC)
#include <zephyr/drivers/interrupt_controller/gic.h>
#endif... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>top(dev);
/* Set preload and actually pre-load the counter */
counter->ldcnt = counter_cfg->info.max_top_value;
counter->cnt = counter_cfg->info.max_top_value;
counter_cfg->config_func();
LOG_DBG("Init complete!");
return 0;
}
#define DEV_CONFIG_CLK_DEV_INIT(n) ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Realtek Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT realtek_rts5912_slwtimer
/**
* @file
* @brief Realtek RTS5912 Counter driver
*
* This is the driver for the 32-bit counters on the Realtek SoCs.
*
* Notes:
* - The counters are running... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> return ret;
}
ret = counter_renesas_ra_agt_get_value(dev, &read_again);
if (ret != 0) {
return ret;
}
max_val = ticks_sub(read_again + top, data->guard_period, top);
if (val > max_val) {
if (irq_on_late) {
NVIC_SetPendingIRQ(data->agtcmai_irq);
} else {
data->alarm_cb = NULL;
}
r... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Renesas Electronics Corporation
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT renesas_rz_cmtw_counter
#include <zephyr/device.h>
#include <zephyr/kernel.h>
#include <zephyr/drivers/counter.h>
#include <zephyr/drivers/interrupt_controller/gic.h>
#include <r_cmt... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2024-2025 Renesas Electronics Corporation
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT renesas_rz_gtm_counter
#include <r_gtm.h>
#include <zephyr/device.h>
#include <zephyr/kernel.h>
#include <zephyr/drivers/counter.h>
#include <zephyr/drivers/interrupt_controller... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Renesas Electronics Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT renesas_rza2m_ostm_counter
#include <zephyr/device.h>
#include <zephyr/kernel.h>
#include <zephyr/drivers/counter.h>
#include <zephyr/drivers/interrupt_controller/gic.h>
#include ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>inst)), \
}; \
static struct counter_rpi_pico_pit_data counter_##inst##_data; \
DEVICE_DT_INST_DEFINE(inst, counter_rpi_pico_pit_init, NULL, &counter_##inst#... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> frequency is to be written
*
* @return 0 on success, negative errno otherwise.
*/
int counter_rpi_pico_pit_get_base_frequency(const struct device *dev, uint32_t *frequency);
#ifdef __cplusplus
}
#endif
#endif /* ZEPHYR_DRIVERS_COUNTER_RPI_PICO_PIT_H_ */
<|fim_prefix|>/*
* Copyright (c) 2024 Navimat... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> \
.slice = DT_INST_PROP_BY_IDX(inst, reg, 0), \
.controller = DEVICE_DT_GET(DT_INST_PARENT(inst)), \
}; \
static... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>_cfg->flags & COUNTER_ALARM_CFG_ABSOLUTE) ? 0 : alarm_cfg->ticks;
absolute_time_t alarm_at;
bool missed;
update_us_since_boot(&alarm_at, config->timer->timerawl + target);
if (alarm_cfg->ticks > counter_rpi_pico_timer_get_top_value(dev)) {
return -EINVAL;
}
if (chdata->callback) {
return -EBU... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 BayLibre, SAS
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT microcrystal_rv3032_counter
#include <zephyr/device.h>
#include <zephyr/drivers/counter.h>
#include <zephyr/spinlock.h>
#include <zephyr/kernel.h>
#include <zephyr/drivers/clock_control.h>
#include... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2019 Derek Hageman <hageman@inthat.cloud>
* Copyright (c) 2024 Gerson Fernando Budke <nandojve@gmail.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT atmel_sam0_tc32
#include <zephyr/drivers/counter.h>
#include <zephyr/drivers/pinctrl.h>
#include <zephyr/devi... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> \
IRQ_CONNECT(DT_INST_IRQ_BY_IDX(n, 1, irq), \
DT_INST_IRQ_BY_IDX(n, 1, priority), \
counter_sam_tc_isr, \
DEVICE_DT_INST_GET(n), 0); \
irq_enable(DT_INST_IRQ_BY_IDX(n, 1, irq)); \
\
IRQ_CONNECT(DT_INST_IRQ_BY_IDX(n, 2, irq), \
DT_INST_IRQ_BY_IDX(n, 2, prior... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> \
static const struct counter_silabs_config counter_silabs_config_##n = { \
.info = \
{ ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright 2026 Silicon Laboratories Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT silabs_protimer
#include <stddef.h>
#include <string.h>
#include <errno.h>
#include <zephyr/kernel.h>
#include <zephyr/device.h>
#include <zephyr/devicetree.h>
#include <soc.h>
#include <ze... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>op timer expired */
if (pendings & TIMER_IF_OF) {
sl_hal_timer_clear_interrupts(config->timer, TIMER_IF_OF);
if (data->top.callback) {
data->top.callback(dev, data->top.user_data);
}
}
for (uint8_t idx = 0; idx < config->info.channels; idx++) {
/* Check which channel is fired */
if (pendi... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2022 Renesas Electronics Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT renesas_smartbond_timer
#include <zephyr/drivers/counter.h>
#include <zephyr/drivers/clock_control/smartbond_clock_control.h>
#include <zephyr/irq.h>
#include <zephyr/sys/atomic.h... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> .get_pending_int = rtc_stm32_get_pending_int,
.get_top_value = rtc_stm32_get_top_value,
};
PM_DEVICE_DT_INST_DEFINE(0, rtc_stm32_pm_action);
DEVICE_DT_INST_DEFINE(0, &rtc_stm32_init, PM_DEVICE_DT_INST_GET(0),
&rtc_data, &rtc_config, PRE_KERNEL_1,
CONFIG_COUNTER_INIT_PRIORITY, &rtc_stm32_dr... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2021 Kent Hall.
* Copyright (c) 2026 Meta Platforms
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT st_stm32_counter
#include <zephyr/drivers/counter.h>
#include <zephyr/drivers/clock_control/stm32_clock_control.h>
#include <zephyr/drivers/reset.h>
#include <zeph... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2023 Intel Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/drivers/counter.h>
#include <zephyr/shell/shell.h>
#include <stdio.h>
#include <ctype.h>
#include <stdlib.h>
#define ARGV_DEV 1
#define ARGV_CHN 2
#define ARGV_PERIODIC_TIME 2
#... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>DEFAULT | TCSR_LOAD, TCSR1_OFFSET);
key = irq_lock();
data->alarm_callback = cfg->callback;
data->alarm_user_data = cfg->user_data;
/* Enable alarm timer only if main timer already enabled */
tcsr = xlnx_axi_timer_read32(dev, TCSR0_OFFSET);
tcsr &= TCSR_ENT;
xlnx_axi_timer_write32(dev, TCSR1_DEF... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2017 Linaro Limited.
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_DRIVERS_COUNTER_DUALTIMER_CMSDK_APB_H_<|fim_suffix|>ounter Current Value */
volatile uint32_t timer2value;
/* Offset: 0x028 (R/W) Timer 2 Control */
volatile uint32_t timer2ctrl;
/* Offset: 0x02C ( /W... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2019-2020 Peter Bigot Consulting, LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifdef CONFIG_SOC_POSIX
#undef _POSIX_C_SOURCE
#define _POSIX_C_SOURCE 200809L /* Required for gmtime_r */
#endif
#define DT_DRV_COMPAT maxim_ds3231
#include <zephyr/device.h>
#include <zephyr/driver... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2019-2020 Peter Bigot Consulting, LLC
* Copyright (c) 2021 Laird Connectivity
* Copyright (c) 2025 Marcin Lyda <elektromarcin@gmail.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifdef CONFIG_SOC_POSIX
#undef _POSIX_C_SOURCE
#define _POSIX_C_SOURCE 200809L /* Required for gmtim... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2017 Linaro Limited.
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_DRIVERS_COUNTER_TIMER_CMSDK_APB_H_
#define ZEPHYR_DRIVERS_COUNTER_TIMER_CMSDK_APB_H_
#include <zephyr/drivers/counter.h>
#ifdef __cplusplus
extern "C" {
#endif
struct timer_cmsdk_apb {
/* Offset: 0x00... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>tic void dtimer_cmsdk_apb_config_##inst(const struct device *dev) \
{ \
IRQ_CONNECT(DT_INST_IRQN(inst), \
DT_INST_IRQ(inst, priority), \
dtmr_cmsdk_apb_isr, \
DEVICE_DT_INST_GET(inst), \
0); \
irq_enable(DT_INST_IRQN(inst)); \
}
DT_INST_FOREACH_ST... | fim | zephyrproject-rtos/zephyr | c |
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