text stringlengths 14 100k | source stringclasses 1
value | repo stringclasses 810
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|---|---|---|---|
<|fim_prefix|>/*
* Copyright (c) 2016 Linaro Limited.
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT arm_cmsdk_timer
#include <zephyr/drivers/counter.h>
#include <zephyr/device.h>
#include <errno.h>
#include <zephyr/init.h>
#include <zephyr/irq.h>
#include <soc.h>
#include <zephyr/drivers/clock_... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Ambiq Micro, Inc.
* Author: Richard S Wheatley
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT ambiq_hw_crc32
#include <soc.h>
#include <zephyr/logging/log.h>
#include <zephyr/device.h>
#include <zephyr/drivers/crc.h>
#include <zephyr/kernel.h>
#include <zep... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> * accepting it otherwise would silently compute a different CRC.
*/
if (ctx->polynomial == CRC16_REFLECT_POLY) {
if ((ctx->reversed & (CRC_FLAG_REVERSE_INPUT | CRC_FLAG_REVERSE_OUTPUT)) !=
(CRC_FLAG_REVERSE_INPUT | CRC_FLAG_REVERSE_OUTPUT)) {
return -EINVAL;
}
/* Program the equ... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright 2025 NXP
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT nxp_lpc_crc
#include <zephyr/drivers/crc.h>
#include <zephyr/logging/log.h>
#include <zephyr/sys/util.h>
LOG_MODULE_REGISTER(nxp_lpc_crc, CONFIG_CRC_LOG_LEVEL);
#include <fsl_crc.h>
struct crc_nxp_lpc_config {
CRC_Type *base... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Renesas Electronics Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(renesas_ra_crc, CONFIG_CRC_LOG_LEVEL);
#include <errno.h>
#include <zephyr/drivers/crc.h>
#include <soc.h>
#include "r_crc.h"
#include "rp_crc.h"
#... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>2(config->base + CRC_SR_OFFSET) & CRC_SR_DONE) != 0U,
CRC_SF32LB_TIMEOUT_US, NULL)) {
ctx->state = CRC_STATE_IDLE;
crc_sf32lb_unlock(dev);
return -ETIMEDOUT;
}
}
/* Now we'll handle data that isn't 4-byte aligned */
if (idx < bufsize) {
uint32_t rem = 0U;
size_t rem_bytes = buf... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright 2025 <|fim_suffix|>rc_silabs_begin,
.update = crc_silabs_update,
.finish = crc_silabs_finish,
};
static int crc_silabs_init(const struct device *dev)
{
int ret;
const struct crc_silabs_config *config = dev->config;
struct crc_silabs_data *data = dev->data;
if (!device_is_ready(conf... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>(config->base);
ctx->state = CRC_STATE_IN_PROGRESS;
return 0;
}
static int crc_stm32_update(const struct device *dev, struct crc_ctx *ctx, const void *buffer,
size_t bufsize)
{
const struct crc_stm32_config *config = dev->config;
/* Ensure CRC calculation has been initialized by crc_begin() *... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>;
return -EINVAL;
}
if (!aead_op->pkt) {
LOG_ERR("Parameter cannot be null");
return -EINVAL;
}
buf_len = aead_op->pkt->in_len;
/*The KeyConfig[EKeyID].ExternalCrypto bit must be 1b.*/
if (!(ataes132a_state[key_id].key_config & ATAES_KEYCONFIG_EXTERNAL)) {
LOG_ERR("key %x external mode di... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2017 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*
*/
#ifndef ZEPHYR_DRIVERS_CRYPTO_CRYPTO_ATAES132A_PRIV_H_
#define ZEPHYR_DRIVERS_CRYPTO_CRYPTO_ATAES132A_PRIV_H_
#include <zephyr/drivers/i2c.h>
#include <zephyr/kernel.h>
#include <zephyr/sys/util.h>
/* Configurat... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright The Zephyr Project Contributors
* SPDX-License-Identifier: Apache-2.0
*
* Bouffalo Lab SEC Engine AES cipher driver
*/
#define DT_DRV_COMPAT bflb_sec_eng_aes
#include <zephyr/device.h>
#include <zephyr/kernel.h>
#include <zephyr/crypto/crypto.h>
#include <zephyr/sys/byteorder.h>
#inc... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> \
DEVICE_DT_INST_DEFINE(inst, crypto_bflb_sha_init, NULL, &crypto_bflb_sha_data_##inst, \
&crypto_bflb_sha_config_##inst, POST_KERNEL, \
CONFIG_CRYPTO_INIT_PRIORITY, &crypto_bflb_sha_api);
DT_INST_FOREACH_STATUS_OKAY(BFL... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2024 BayLibre, SAS
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT ti_cc23x0_aes
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(crypto_cc23x0, CONFIG_CRYPTO_LOG_LEVEL);
#include <zephyr/crypto/crypto.h>
#include <zephyr/device.h>
#include <zephyr/drivers/dma... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <zephyr/device.h>
#include <zephyr/logging/log.h>
#include <zephyr/crypto/crypto.h>
#include <zephyr/crypto/cipher.h>
#include <zephyr/drivers/clock_control.h>... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <zephyr/device.h>
#include <zephyr/logging/log.h>
#include <zephyr/crypto/crypto.h>
#include <zephyr/crypto/hash.h>
#include <zephyr/drivers/clock_control.h>
#... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ctx *ctx)
{
struct sha_container *self = (struct sha_container *const)(dev)->data;
struct sha_session *session = (struct sha_session *)ctx->drv_sessn_state;
(void)memset((void *)self->dfsha, 0, sizeof(struct sha_hw_regs));
(void)memset(&session->sha_ctx, 0, sizeof(struct sha_context));
(void)memset(... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ll;
struct {
/* Hash state: SHA_FIRST, SHA_MIDLE or SHA_LAST */
uint32_t state : 3;
/* Hash resume bit */
uint32_t hrsm : 1;
uint32_t rsvd : 28;
} part;
};
struct sha_context {
union SHAALDW0 shaaldw0;
union SHAALDW1 shaaldw1;
uint8_t initial_vector[SHA_HASH_DATA_BLOCK_LEN];
uint8_t sha_r... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> : 8;
} part;
};
union SHARLDW0 {
uint32_t full;
struct {
uint32_t rsvd8 : 9;
uint32_t lower_length : 23;
} part;
};
union SHARLDW1 {
uint32_t full;
struct {
uint32_t upper_length : 32;
} part;
};
union SHAALDW0 {
uint32_t full;
struct {
uint32_t rsvd8 : 9;
uint32_t lower_length : 23... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 ITE Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT ite_it51xxx_sha
#include <errno.h>
#include <it51xxx/chip_chipregs.h>
#include <zephyr/crypto/crypto.h>
#include <zephyr/kernel.h>
#include <zephyr/sys/byteorder.h>
#include <zephyr/logging/log... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2023 ITE Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT ite_it8xxx2_sha
#include <zephyr/kernel.h>
#include <zephyr/crypto/crypto.h>
#include <zephyr/sys/byteorder.h>
#include <chip_chipregs.h>
#include <errno.h>
#include <zephyr/logging/log.h>
LOG_... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2024 ITE Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT ite_it8xxx2_sha_v2
#include <zephyr/kernel.h>
#include <zephyr/crypto/crypto.h>
#include <zephyr/sys/byteorder.h>
#include <chip_chipregs.h>
#include <errno.h>
#include <zephyr/logging/log.h>
L... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2017 Intel Corporation.
* Copyright (c) 2025 BayLibre SAS
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file Shim layer for Mbed TLS, crypto API compliant.
*/
#include <zephyr/kernel.h>
#include <zephyr/init.h>
#include <errno.h>
#include <zephyr/crypto/crypto.h>
#include... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>te;
if (!session || (pkt->in_len % 16U) != 0U) {
LOG_ERR("Invalid ECB op: session=%p, in_len=%zu", session,
session ? pkt->in_len : 0);
return -EINVAL;
}
if (pkt->in_len > pkt->out_buf_max) {
LOG_ERR("Short of output buffer.");
return -ENOSR;
}
return mchp_aes_process(ctx, pkt->in_len, ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (C) 2025 Microchip Technology Inc. and its subsidiaries
*
* SPDX-License-Iden<|fim_suffix|>vice = NULL;
ctx->drv_sessn_state = NULL;
LOG_DBG("Session freed");
return 0;
}
static int mchp_sha_query_caps(const struct device *dev)
{
ARG_UNUSED(dev);
return MCHP_SHA_CAPS_SUPPORT;
}
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>, \
&xec_symcr_api);
DT_INST_FOREACH_STATUS_OKAY(XEC_SYMCR_INIT)
<|fim_prefix|>/*
* Copyright (c) 2023 Microchip Technology Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT microchip_xec_symcr
#include <errno.h>
#include <string.h>
#include <zephyr/kernel.h>
#inclu... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>CUX_DCP_MAX_SESSION; ++i) {
data->sessions[i].in_use = false;
data->sessions[i].handle.channel = kDCP_Channel0 << i;
data->sessions[i].handle.keySlot = kDCP_KeySlot0 + i;
data->sessions[i].handle.swapConfig = kDCP_NoSwap;
}
return 0;
}
static DEVICE_API(crypto, crypto_dcp_api) = {
.query_hw_c... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>int aes_session_setup(const struct device *dev, struct cipher_ctx *ctx,
enum cipher_algo algo, enum cipher_mode mode, enum cipher_op op)
{
struct crypto_mspm0_aes_data *data = dev->data;
struct mspm0_aes_session *session = NULL;
DL_AES_KEY_LENGTH keylen;
DL_AES_MODE aesconfig;
int ret;
if (... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2022 Nuvoton Technology Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT nuvoton_npcx_sha
#include <errno.h>
#include <zephyr/kernel.h>
#include <zephyr/crypto/crypto.h>
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(sha_npcx, CONFIG_CRYPTO_LOG_L... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>EVICE_API(crypto, crypto_enc_funcs) = {
.cipher_begin_session = nrf_ecb_session_setup,
.cipher_free_session = nrf_ecb_session_free,
.cipher_async_callback_set = NULL,
.query_hw_caps = nrf_ecb_query_caps,
};
DEVICE_DT_INST_DEFINE(0, nrf_ecb_driver_init, NULL,
NULL, NULL,
POST_KERNEL, C... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright 2025 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT nxp_s32_crypto_hse_mu
#include <zephyr/init.h>
#include <zephyr/kernel.h>
#include <zephyr/device.h>
#include <zephyr/crypto/crypto.h>
#include <Hse_Ip.h>
#define LOG_LEVEL CONFIG_CRYPTO_LOG_LEVEL
#include <zep... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 TOKITA Hiroshi
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT raspberrypi_pico_sha256
#include <zephyr/crypto/crypto.h>
#include <zephyr/kernel.h>
#include <zephyr/sys/util_macro.h>
#include <zephyr/sys/byteorder.h>
#include <pico/bootrom/lock.h>
#include <... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* SPDX-License-Identifier: Apache-2.0
*
* Copyright (c) 2025 Realtek Semiconductor Corporation, SIBG-SD7
*
*/
#ifndef ZEPHYR_DRIVERS_CRYPTO_CRYPTO_RTS5912_PRIV_H_
#define ZEPHYR_DRIVERS_CRYPTO_CRYPTO_RTS5912_PRIV_H_
struct rts5912_sha256_context {
u<|fim_suffix|> struct k_mutex crypto_rts5912_i... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* SPDX-License-Identifier: Apache-2.0
*
* Copyright (c) 2025 Realtek Semiconductor Corporation, SIBG-SD7
*
*/
#define DT_DRV_COMPAT realtek_rts5912_sha
#include <errno.h>
#include <string.h>
#include <zephyr/init.h>
#include <zephyr/crypto/crypto.h>
#include <zephyr/sys/byteorder.h>
#include <ze... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 SiFli Technologies(Nanjing) Co., Ltd
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT sifli_sf32lb_crypto
#include <zephyr/device.h>
#include <zephyr/kernel.h>
#include <zephyr/crypto/crypto.h>
#include <zephyr/sys/byteorder.h>
#include <zephyr/cache.h>
#inclu... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 SiFli Technologies(Nanjing) Co., Ltd
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_DRIVERS_CRYPTO_CRYPTO_SIFLI_PRIV_H_
#define ZEPHYR_DRIVERS_CRYPTO_CRYPTO_SIFLI_PRIV_H_
#include <zephyr/types.h>
#include <zephyr/d<|fim_suffix|>offsetof(AES_ACC_TypeDef, EXT_KEY_W6... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2024 GARDENA GmbH
*
* SPDX-License-Identifier: Apache-2.0
*
* Design decisions:
* - As there is only one AES controller, this implementation is not using a device configuration.
*
* Notes:
* - If not noted otherwise, chapter numbers refer to the SiM3U1XX/SiM3C1XX reference manual
* (Si... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2023 Renesas Electronics Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <zephyr/device.h>
#include <zephyr/crypto/crypto.h>
#include <zephyr/irq.h>
#include <DA1469xAB.h>
#include <da1469x_config.h>
#include <da1469x_otp.h>
#include <syst... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>_aes)
session->config.Algorithm = CRYP_AES_CTR;
#endif
ctx->ops.ctr_crypt_hndlr = crypto_stm32_ctr_encrypt;
break;
default:
break;
}
} else {
switch (mode) {
case CRYPTO_CIPHER_MODE_ECB:
#if !DT_HAS_COMPAT_STATUS_OKAY(st_stm32l4_aes)
session->config.Algorithm = CRYP_AES_ECB;
#endif... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Bayrem Gharsellaoui
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/init.h>
#include <zephyr/kernel.h>
#include <zephyr/device.h>
#include <zephyr/crypto/crypto.h>
#include <zephyr/drivers/clock_control/stm32_clock_control.h>
#include <zephyr/drivers/clock_control.... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Bayrem Gharsellaoui
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_DRIVERS_CRYPTO_CRYPT<|fim_suffix|>st)(ctx)->drv_sessn_state)
#endif /* ZEPHYR_DRIVERS_CRYPTO_CRYPTO_STM32_HASH_PRIV_H_ */
<|fim_middle|>O_STM32_HASH_PRIV_H_
#define ZEPHYR_DRIVERS_CRYPTO_CRYPTO_STM3... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2020 Markus Fuchs <markus.fuchs@de.sauter-bc.com>
*
* SPDX-License-Identifier: Apache-2.0
*
*/
#ifndef ZEPHYR_DRIVERS_CRYPTO_CRYPTO_STM32_PRIV_H_
#define ZEPHYR_DRIVERS_CRYPTO_CRYPTO_STM32_PRIV_H_
#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32l4_aes)
#define crypt_config_t CRYP_InitTypeD... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>output_range);
if (ret != 0) {
LOG_ERR("failed to set output range for channel %u: %d", channel_cfg->channel_id,
ret);
return ret;
}
/* Enable the channel output (default is all disabled) */
data->channel_setup_mask |= BIT(channel_cfg->channel_id);
ret = ad5529r_write_reg_verify(dev, AD5529R... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> \
\
struct dac_ad559x_data dac_ad559x_data##inst; \
\
... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2024 Jan Kubiznak <jan.kubiznak@deveritec.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <stdint.h>
#include <zephyr/kernel.h>
#include <zephyr/drivers/i2c.h>
#include <zephyr/drivers/dac.h>
#include <zephyr/logging/log.h>
#include <zephyr/sys/byteorder.h>
LOG_MODULE_REGISTER(dac_ad56... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* SPDX-FileCopyrightText: Copyright The Zephyr Project Contributors
* SPDX-License-Identifier: Apache-2.0
*/
#include <stdint.h>
#include <zephyr/kernel.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/drivers/spi.h>
#include <zephyr/drivers/dac.h>
#include <zephyr/logging/log.h>
#include <zeph... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>NNELS ad5676_channels
#define DAC_AD5676_CHANNEL_COUNT ARRAY_SIZE(ad5676_channels)
DT_INST_FOREACH_STATUS_OKAY_VARGS(DAC_AD56XX_INST_DEFINE, DT_DRV_COMPAT, DAC_AD5676_RESOLUTION,
DAC_AD5676_CHANNELS, DAC_AD5676_CHANNEL_COUNT)
#endif
#undef DT_DRV_COMPAT
#define DT_DRV_COMPAT adi_ad5679
#if DT_... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>EC_INST_GET_OR(n, errb_gpios, {0}), \
}; \
\
static struct dac161s997_data dac161s997_data_##... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2024 Google LLC.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @brief Driver for Texas Instruments DACx0501 series
*
* Device driver for the Texas Instruments DACx0501 series of devices: DAC60501, DAC70501 and
* DAC80501: Digital to Analog Converters with a single channel o... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>STATUS_REF_ALM) {
LOG_ERR("Difference between VREF/DIV and VDD is "
"below the required minimum analog threshold");
return -EIO;
}
return 0;
}
static int dacx0508_init(const struct device *dev)
{
const struct dacx0508_config *config = dev->config;
struct dacx0508_data *data = dev->data;
int ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Andreas Wolf <awolf002@gmail.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file dac_dacx311.c
* @brief Driver for the TI x311 and x411 single channel DAC chips.
*
* This driver supports multiple variants of the Texas Instrument DAC chip.
*
* - 16-bit write re... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2020 Matija Tudan
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <zephyr/drivers/i2c.h>
#include <zephyr/drivers/dac.h>
#include <zephyr/sys/util.h>
#include <zephyr/sys/byteorder.h>
#include <zephyr/sys/__assert.h>
#include <zephyr/logging/log.h>
L... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>annel %u not configured", channel_id);
return -ENXIO;
}
if (chan->resolution > 32) {
LOG_ERR("Channel %u has invalid resolution %u", channel_id, chan->resolution);
return -EINVAL;
}
uint32_t max_value = (uint32_t)((1ULL << chan->resolution) - 1);
if (value > max_value) {
LOG_ERR("Value is ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>e missing");
return -EINVAL;
}
if (!device_is_ready(cfg->clock_dev)) {
LOG_ERR("Clock device not ready");
return -ENODEV;
}
if (clock_control_on(cfg->clock_dev, (clock_control_subsys_t)cfg->clock_subsys) != 0) {
LOG_ERR("DAC clock setup failed (%d)", -EIO);
return -EIO;
}
return 0;
}
s... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ruct dac_gd32_data *data = dev->data;
const struct dac_gd32_config *config = dev->config;
if (dacx >= config->num_channels) {
return -ENOTSUP;
}
dac_gd32_write(data, dacx, value);
return 0;
}
DEVICE_API(dac, dac_gd32_driver_api) = {
.channel_setup = dac_gd32_channel_setup,
.write_value = dac_... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2020 Libre Solar Technologies GmbH
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/drivers/dac.h>
#include <zephyr/internal/syscall_handler.h>
#include <zephyr/kernel.h>
static inline int z_vrfy_dac_channel_setup(const struct device *dev,
const struct dac_chann... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> \
DT_INST_PROP_BY_IDX(n, step_val, 1), \
DT_INST_PROP_BY_IDX(n, step_val, 2)}, \
.limit_cfg_mask = (DT_INST_NODE_HAS_PROP(n, limit_cfg_0) ? BIT(0) : 0) | \
(DT_INST_NODE_HAS_PROP... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Driver for Linear Technology LTC1660/LTC1665 DAC
*
* Copyright (C) 2023 Marcus Folkesson <marcus.folkesson@gmail.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <zephyr/drivers/spi.h>
#include <zephyr/drivers/dac.h>
#include <zephyr/logging/log.h>
LOG_MODU... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2024 Analog Devices Inc.
* Copyright (c) 2024 Baylibre SAS
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <zephyr/drivers/spi.h>
#include <zephyr/drivers/dac.h>
#include <zephyr/drivers/mfd/max22017.h>
#include <zephyr/logging/log.h>
#define DT_DR... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>T_INST_DEV_CONFIG_GET(n), \
.channels = {DT_FOREACH_CHILD_SEP(DT_DRV_INST(n), DAC_MCHP_CHANNEL_DEFN, (,))}, \
.dac_clock.clock_dev = DEVICE_DT_GET(DT_NODELABEL(clock)), \
.dac_clock.mclk_sys = (void *)DT_INST_CLOCKS_CELL_BY_NAME(n, m... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>t dac_mcp4725_init(const struct device *dev)
{
const struct mcp4725_config *config = dev->config;
if (!device_is_ready(config->i2c.bus)) {
LOG_ERR("I2C device not found");
return -EINVAL;
}
/* Check we can read a 'RDY' bit from this device */
if (mcp4725_wait_until_ready(dev)) {
return -EBUSY... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright 2021 Grinn
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT microchip_mcp4728
#include <zephyr/kernel.h>
#include <zephyr/drivers/dac.h>
#include <zephyr/drivers/i2c.h>
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(dac_mcp4728, CONFIG_DAC_LOG_LEVEL);
#define MC... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>("Internal channels not supported");
return -ENOTSUP;
}
DAC_GetDefaultConfig(&dac_config);
dac_config.enableLowPowerMode = config->low_power;
dac_config.referenceVoltageSource = config->reference;
DAC_Init(config->base, &dac_config);
data->configured = true;
return 0;
}
static int mcux_dac_w... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>c12_config *config = dev->config;
struct mcux_dac12_data *data = dev->data;
if (!data->configured) {
LOG_ERR("channel not initialized");
return -EINVAL;
}
if (channel != 0) {
LOG_ERR("unsupported channel %d", channel);
return -ENOTSUP;
}
if (value >= 4096) {
LOG_ERR("value %d out of ran... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>NEL, CONFIG_DAC_INIT_PRIORITY, \
&mcux_dac32_driver_api);
DT_INST_FOREACH_STATUS_OKAY(MCUX_DAC32_INIT)
<|fim_prefix|>/*
* Copyright (c) 2020 Henrik Brix Andersen <henrik@brixandersen.dk>
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT nxp_kinetis_dac32
#include <zephyr/kernel.h... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>nxp_gau_dac_write_value,
};
static int nxp_gau_dac_init(const struct device *dev)
{
const struct nxp_gau_dac_config *config = dev->config;
dac_config_t dac_cfg;
DAC_GetDefaultConfig(&dac_cfg);
dac_cfg.conversionRate = config->conversion_rate;
dac_cfg.refSource = config->voltage_ref;
dac_cfg.range... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> \
\
DEVICE_DT_INST_DEFINE(n, mcux_lpdac_init, NULL, &mcux_lpdac_data_##n, \
&mcux_lpdac_config_##n, POST_KERNEL, CONFIG_DAC_INIT_PRIORITY, ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2026 Linumiz
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT ti_mspm0_dac
#include <zephyr/device.h>
#include <zephyr/devicetree.h>
#include <zephyr/drivers/dac.h>
#include <zephyr/kernel.h>
/* TI Driverlib includes */
#include <ti/driverlib/dl_dac12.h>
#define ... | fim | zephyrproject-rtos/zephyr | c |
/*
* SPDX-FileCopyrightText: Copyright 2026 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT nxp_hpdac
#include <zephyr/drivers/dac.h>
#include <zephyr/kernel.h>
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(dac_nxp_hpdac, CONFIG_DAC_LOG_LEVEL);
struct nxp_hpdac_config {
HPDAC_Type *b... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Renesas Electronics Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT renesas_ra_dac
#include <zephyr/drivers/dac.h>
#include <zephyr/drivers/pinctrl.h>
#include <zephyr/logging/log.h>
#include "r_dac_api.h"
#include "r_dac.h"
LOG_MODULE_REGISTER(d... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>v_cfg->irq_id);
LOG_INF("Device %s initialized", dev->name);
return 0;
}
static DEVICE_API(dac, dac_sam_driver_api) = {
.channel_setup = dac_sam_channel_setup,
.write_value = dac_sam_write_value,
};
/* DACC */
static void dacc_irq_config(void)
{
IRQ_CONNECT(DT_INST_IRQN(0), DT_INST_IRQ(0, priori... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2020 Google LLC.
* Copyright (c) 2024 Gerson Fernando Budke <nandojve@gmail.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT atmel_sam0_dac
#include <errno.h>
#include <zephyr/drivers/dac.h>
#include <zephyr/drivers/pinctrl.h>
#include <soc.h>
#include <zeph... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>static const struct dac_samd5x_cfg dac_samd5x_cfg_##n = { \
.regs = (Dac *)DT_INST_REG_ADDR(n), \
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
.gclk_gen = ATMEL_SAM0_DT_INST_ASSIGNED_CLOCKS_CELL_BY_NAME(n, gclk, gen), \
.gclk_id = DT_INST_CLOCKS_CELL_BY_NAME(n, gclk, id), \
.mclk = ATMEL_SAM0_DT... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2020 Henrik Brix Andersen <henrik@brixandersen.dk>
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief DAC shell commands.
*/
#include <zephyr/shell/shell.h>
#include <zephyr/drivers/dac.h>
#include <stdlib.h>
struct args_index {
uint8_t device;
uint8_t channel;
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Silicon Laboratories Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/device.h>
#include <zephyr/drivers/dac.h>
#include <zephyr/drivers/clock_control.h>
#include <zephyr/drivers/clock_control/clock_control_silabs.h>
#include <zephyr/drivers/pinctrl.h>
#include... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>IRST_CHANNEL >=
data->channel_count) ||
(channel_cfg->channel_id < STM32_FIRST_CHANNEL)) {
LOG_ERR("Channel %d is not valid", channel_cfg->channel_id);
return -EINVAL;
}
if ((channel_cfg->resolution == 8) ||
(channel_cfg->resolution == 12)) {
data->resolution = channel_cfg->resolution;
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2024 TOKITA Hiroshi
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT vnd_dac
#include <zephyr/kernel.h>
#include <zephyr/drivers/dac.h>
int vnd_dac_channel_setup(const struct device *dev, const struct dac_channel_cfg *channel_cfg)
{
ARG_UNUSED(dev);
ARG_UNUSED(c... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>dex);
return UINT32_MAX;
}
/* Check for valid instance before array access */
if (sdw_instance < 0 || sdw_instance >= SDW_INSTANCES) {
LOG_ERR("invalid SDW pin index %d", pin_index);
return UINT32_MAX;
}
return acp_sdw_channel_map[sdw_instance][pin_index % 64];
}
#endif
static inline int acp_s... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/* <|fim_suffix|>32_t reserved0;
uint32_t rate;
uint32_t channels;
} __packed __aligned(4);
struct dai_plat_fifo_data {
uint32_t offset;
uint32_t width;
uint32_t depth;
uint32_t watermark;
uint32_t handshake;
};
struct acp_dai_config {
enum dai_type type;
uint32_t dai_index;
struct dai_config ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>_PRIORITY, &acp_tdm_dai_driver_ops);
DT_INST_FOREACH_STATUS_OKAY(ACP_TDM_DAI_INIT);
<|fim_prefix|>/**
* SPDX-FileCopyrightText: Copyright (c) 2026 AMD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/device.h>
#include <zephyr/drivers/dai.h>
#include <zephyr/logging/log.h>
#ifdef CONFIG_... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ct dai_properties *dst)
{
K_OOPS(K_SYSCALL_DRIVER_DAI(dev, get_properties_copy));
K_OOPS(K_SYSCALL_MEMORY_WRITE(dst, sizeof(*dst)));
return z_impl_dai_get_properties_copy(dev, dir, stream_id, dst);
}
#include <zephyr/syscalls/dai_get_properties_copy_mrsh.c>
static inline int z_vrfy_dai_trigger(const ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2022 Intel Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <errno.h>
#include <stdbool.h>
#include <stdint.h>
#include <zephyr/spinlock.h>
#include <zephyr/devicetree.h>
#include <zephyr/logging/log.h>
#ifdef CONFIG_SOC_SERIES_INTEL_CAVS_V25
#include <adsp_shim.h>... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> Common data for all ALH DAI instances */
struct dai_alh_global_shared {
struct k_spinlock lock; /**< locking mechanism */
int sref; /**< simple ref counter, guarded by lock */
};
#endif
<|fim_prefix|>/*
* Copyright (c) 2022 Intel Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef __... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>/* 24 - BIDIRECTIONAL */
34, /* 25 - BIDIRECTIONAL */
35, /* 26 - BIDIRECTIONAL */
36, /* 27 - BIDIRECTIONAL */
37, /* 28 - BIDIRECTIONAL */
-1, /* 29 - INVALID */
-1, /* 30 - INVALID */
-1, /* 31 - INVALID */
-1, /* 32 - INVALID */
-1, /* 33 - INVALID */
-1, /* 34 - INVALID */
-1, /* 35 - INVA... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2022 Intel Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT intel_dai_dmic
#define LOG_DOMAIN dai_intel_dmic
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(LOG_DOMAIN);
#include <errno.h>
#include <stdbool.h>
#include <stdint.h>
#include <zephyr/k... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2022 Intel Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef __INTEL_DAI_DRIVER_DMIC_H__
#define __INTEL_DAI_DRIVER_DMIC_H__
#include <zephyr/sys/util_macro.h>
/* The microphones create a low frequency thump sound when clock is enabled.
* The unmute linear gain ram... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>LD_PREP(OUTCONTROL_TIE, bf1) | FIELD_PREP(OUTCONTROL_SIP, bf2) |
FIELD_PREP(OUTCONTROL_FINIT, bf3) | FIELD_PREP(OUTCONTROL_FCI, bf4) |
FIELD_PREP(OUTCONTROL_BFTH, bf5) | FIELD_PREP(OUTCONTROL_OF, bf6) |
FIELD_PREP(OUTCONTROL_IPM, bf7) | FIELD_PREP(OUTCONTROL_IPM_SOURCE_1, bf9) |
FIELD_PREP(OUTCONT... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>the form (packed/unpacked) of values.
*/
uint32_t fir_coeffs[];
};
/* Tag indicating that FIRs are in a packed 24-bit format.
*
* Size of a single coefficient is 20-bit. Coefficients may be sent in either unpacked form where
* each value takes one DWORD (32-bits) or in packed form where the array b... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2022 Intel Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <errno.h>
#include <stdbool.h>
#include <stdint.h>
#include <zephyr/spinlock.h>
#include <zephyr/device.h>
#include <zephyr/devicetree.h>
#include <zephyr/pm/device.h>
#include <zephyr/pm/device_runtime.h>
#include <zeph... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2022 Intel Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef __INTEL_DAI_DRIVER_HDA_H__
#define __INTEL_DAI_DRIVER_HDA_H__
#include <stdint.h>
#include <zephyr/drivers/dai.h>
#define dai_get_drvdata(dai) &dai->priv_data
#define dai_base(dai) dai->plat_data.base
#define DAI_INTEL... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> Request - SOF_DAI_SSP_CONFIG */
struct dai_intel_ipc3_ssp_params {
uint32_t reserved0;
uint16_t reserved1;
uint16_t mclk_id;
uint32_t mclk_rate; /* mclk frequency in Hz */
uint32_t fsync_rate; /* fsync frequency in Hz */
uint32_t bclk_rate; /* bclk frequency in Hz */
/* TDM */
uint32_t tdm_slot... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>union dai_intel_ipc4_gateway_attributes gw_attr;
uint32_t version;
uint32_t size;
/* TDM time slot mappings */
uint32_t tdm_ts_group[DAI_INTEL_I2S_TDM_MAX_SLOT_MAP_COUNT];
/* i2s port configuration */
struct dai_intel_ipc4_ssp_config_ver_3_0 i2s_ssp_config;
/* clock configuration parameters */
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>
{
struct dai_intel_ssp_plat_data *ssp_plat_data = dai_get_plat_data(dp);
uint64_t sample_ticks = ssp_plat_data->params.fsync_rate ?
1000000 / ssp_plat_data->params.fsync_rate : 0;
uint32_t retry = DAI_INTEL_SSP_RX_FLUSH_RETRY_MAX;
uint32_t entries[2];
uint32_t i, sssr;
sssr = sys_read32(dai_base... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2022 Intel Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef __INTEL_DAI_DRIVER_SSP_H__
#define __INTEL_DAI_DRIVER_SSP_H__
#define SSP_IP_VER_1_0 0x10000 /* cAVS */
#define SSP_IP_VER_1_5 0x10500 /* ACE15 */
#define SSP_IP_VER_2_0 0x20000 /* ACE20 */
#define SSP_IP_VER_3_0 0x30000... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2022 Intel Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef __INTEL_DAI_DRIVER_SSP_REGSV1_H__
#define __INTEL_DAI_DRIVER_SSP_REGSV1_H__
/* SSP register offsets */
#define SSCR0 0x00
#define SSCR1 0x04
#define SSSR 0x08
#define SSITR 0x0C
#define SSTO 0x28
#define SSPSP ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2022 Intel Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef __INTEL_DAI_DRIVER_SSP_REGSV2_H__
#define __INTEL_DAI_DRIVER_SSP_REGSV2_H__
/* SSP register offsets */
#define SSCR0 0x00
#define SSCR1 0x04
#define SSSR 0x08
#define SSITR 0x0C
#define SSTO 0x28
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2022 Intel Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef __INTEL_DAI_DRIVER_SSP_REGSV3_H__
#define __INTEL_DAI_DRIVER_SSP_REGSV3_H__
/* SSP register offsets */
#define SSCR0 0x00
#define SSCR1 0x04
#define SSSR 0x08
#define SSITR 0x0C
#define SSTO 0x28
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>t32_t stream_idx;
struct ipc4_uaol_usb_ep_info entry;
};
#endif /* INTEL_DAI_DRIVER_UAOL_PARAMS_IPC4_H_ */
<|fim_prefix|>/*
* Copyright (c) 2023 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef INTEL_DAI_DRIVER_UAOL_PARAMS_IPC4_H_
#define INTEL_DAI_DRIVER_UAOL_PARAMS_IPC4_H_
#i... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>n(const struct device *dev, enum pm_device_action action)
{
int ret = 0;
switch (action) {
case PM_DEVICE_ACTION_RESUME:
ret = dai_uaol_probe(dev);
break;
case PM_DEVICE_ACTION_SUSPEND:
ret = dai_uaol_remove(dev);
break;
case PM_DEVICE_ACTION_TURN_ON:
case PM_DEVICE_ACTION_TURN_OFF:
/* Al... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright 2024-2025 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/pm/device_runtime.h>
#include <zephyr/pm/device.h>
#include "esai.h"
/* TODO:
* 1) Some pin functions can be inferred from software ctx. For instance,
* if you use more than 1 data line, it's obvious you're g... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright 2024-2025 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_DRIVERS_DAI_NXP_ESAI_H_
#define ZEPHYR_DRIVERS_DAI_NXP_ESAI_H_
#include <zephyr/logging/log.h>
#include <zephyr/drivers/dai.h>
#include <zephyr/device.h>
#include <zephyr/dt-bindings/dai/esai.h>
#include <zephyr/d... | fim | zephyrproject-rtos/zephyr | c |
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