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<|fim_prefix|>/*
* Copyright (c) 2023-2024 Analog Devices, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/drivers/clock_control.h>
#include <zephyr/drivers/gpio/gpio_utils.h>
#include <zephyr/kernel.h>
#include <zephyr/logging/log.h>
#include <zephyr/drivers/clock_control/adi_max32_clock_control.... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2022 Microchip Technology Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT microchip_mpfs_gpio
#include <errno.h>
#include <zephyr/kernel.h>
#include <zephyr/device.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/sys/util.h>
#include <zephyr/irq.h>
#incl... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Microchip Technology Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file gpio_mchp_port_g1.c
* @brief GPIO driver implementation for Microchip devices.
*/
#include <zephyr/device.h>
#include <zephyr/drivers/gpio.h>
#include <soc.h>
#include <zephyr/drivers/gpio/gpi... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> \
DEVICE_DT_INST_DEFINE(i, gpio_xec_port_init##i, NULL, &gpio_xec_port_data##i, \
&gpio_xec_dcfg##i, PRE_KERNEL_1, CONFIG_GPIO_INIT_PRIORITY, \
&gpio_xec_driver_api);
DT_INST_FOREACH_STATUS_OKAY(XEC_GPIO_POR... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>DRV_COMPAT microchip_mcp23009
DT_INST_FOREACH_STATUS_OKAY_VARGS(GPIO_MCP230XX_DEVICE, 8, true, 23009)
#undef DT_DRV_COMPAT
#define DT_DRV_COMPAT microchip_mcp23016
DT_INST_FOREACH_STATUS_OKAY_VARGS(GPIO_MCP230XX_DEVICE, 16, false, 23016)
#undef DT_DRV_COMPAT
#define DT_DRV_COMPAT microchip_mcp23017
DT_INS... | fim | zephyrproject-rtos/zephyr | c |
/*
*
* Copyright (c) 2021 metraTec GmbH
* Copyright (c) 2021 Peter Johanson
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file Driver for MPC23Sxx SPI-based GPIO driver.
*/
#include <errno.h>
#include <zephyr/kernel.h>
#include <zephyr/device.h>
#include <zephyr/sys/byteorder.h>
#include <zephyr/drivers/g... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
*
* Copyright (c) 2021 metraTec Gm<|fim_suffix|>alue << 8);
int ret = write_port_regs(dev, REG_IOCON, extended_value);
if (ret == 0) {
drv_data->reg_cache.iocon = extended_value;
}
return ret;
}
/**
* @brief Setup the pin direction.
*
* @param dev The mcp23xxx device.
* @param pin The pi... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2021 metraTec GmbH
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file Header file for the MCP23Xxx driver.
*/
#ifndef ZEPHYR_DRIVERS_GPIO_GPIO_MCP23XXX_H_
#define ZEPHYR_DRIVERS_GPIO_GPIO_MCP23XXX_H_
#include <zephyr/kernel.h>
#include <zephyr/drivers/gpio.h>
#ifdef CONFIG... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2016 Freescale Semiconductor, Inc.
* Copyright 2017, 2023-2025 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT nxp_kinetis_gpio
#include <errno.h>
#include <zephyr/device.h>
#include <zephyr/drivers/clock_control.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/drivers... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>t mcux_igpio_data *data = dev->data;
return gpio_manage_callback(&data->callbacks, callback, set);
}
static void mcux_igpio_port_isr(const struct device *dev)
{
struct mcux_igpio_data *data = dev->data;
GPIO_Type *base = get_base(dev);
uint32_t int_flags;
int_flags = base->ISR;
base->ISR = int_fl... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>lpc_driver_api); \
\
static int lpc_gpio_init_##n(const struct device *dev) \
{ \
gpio_mcux_lpc_init(dev); \
GPIO_MCUX_LPC_MODULE_IRQ(n); \
\
return 0; \
}
DT_INST_FOREACH_STATUS_OKAY(GPIO_MCUX_LPC)
<|fim_prefix|>/*
* Copyright 2017-2020,2... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> DEVICE_MMIO_NAMED_ROM_INIT(reg_base, DT_DRV_INST(n)), \
MCUX_RGPIO_PIN_INIT(n) \
}; \
\
static struct mcux_rgpio_data mcux_rgpio_##n##_data; \
\
DEVICE_DT_INST_DEFINE(n, \
mcux_rgpio_##n##_init, \
NULL, \
&mcux_rgpio_##n##_data, \
&mcux_rgpio... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> 0;
int ret;
if (!device_is_ready(drv_cfg->i2c_spec.bus)) {
LOG_ERR("I2C device not found");
return -ENODEV;
}
k_sem_init(&drvdata->lock, 1, 1);
ret = read_reg(dev, REG_ID, &chip_id);
if (ret != 0) {
LOG_ERR("%s: Unable to read Chip ID", dev->name);
return ret;
}
if (chip_id != MFXSTM3... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>t struct gpio_mmio32_config *config = dev->config;
context->config = config;
return 0;
}
#define MMIO32_GPIO_DEVICE(n) \
static struct gpio_mmio32_context gpio_mmio32_##n##_ctx; \
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2026 Zhaoming Li
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief GPIO driver for a memo<|fim_suffix|> \
static const struct mmio_latch_gpio_config mmio_latch_gpio_config_##inst = { \
.common = GPI... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>;
#endif /* DT_NODE_HAS_STATUS(DT_NODELABEL(gpiob), okay) */
#if DT_NODE_HAS_STATUS(DT_NODELABEL(gpioc), okay)
GPIO_DEVICE_INIT_MSPM0(c);
#endif /* DT_NODE_HAS_STATUS(DT_NODELABEL(gpioc), okay) */
<|fim_prefix|>/*
* Copyright (c) 2025 Texas Instruments
* Copyright (c) 2025 Linumiz
*
* SPDX-License-Id... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2021 Nuvoton Technology Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT nuvoton_nct38xx_gpio
#include <zephyr/device.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/drivers/gpio/gpio_nct38xx.h>
#include <zephyr/drivers/mfd/nct38xx.h>
#include <zephyr/kernel.h>... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>nst struct device *dev);
#endif /* ZEPHYR_DRIVERS_GPIO_GPIO_NCT38XX_H_*/
<|fim_prefix|>/*
* Copyright (c) 2021 Nuvoton Technology Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_DRIVERS_GPIO_GPIO_NCT38XX_H_
#define ZEPHYR_DRIVERS_GPIO_GPIO_NCT38XX_H_
#include <zephyr/device.h... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>nt8_t *)&mask, sizeof(mask));
if (ret < 0) {
goto release_lock;
}
alert &= mask;
if (alert) {
ret = i2c_burst_write_dt(mfd->i2c_dev, NCT38XX_REG_ALERT,
(uint8_t *)&alert, sizeof(alert));
}
release_lock:
k_sem_give(mfd->lock);
if (ret < 0) {
LOG_ERR("i2c access failed");
return fals... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2021 Nuvoton Technology Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT nuvoton_nct38xx_gpio_port
#include "gpio_nct38xx.h"
#include <<|fim_suffix|>data->lock);
return ret;
}
static int gpio_nct38xx_port_set_masked_raw(const struct device *dev, gpio... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2021,2025 Henrik Brix Andersen <henrik@brixandersen.dk>
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT neorv32_gpio
#include <zephyr/arch/cpu.h>
#include <zephyr/device.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/drivers/syscon.h>
#include <zephyr/irq.h>... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2020 Nuvoton Technology Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT nuvoton_npcx_gpio
#include <zephyr/kernel.h>
#include <zephyr/device.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/dt-bindings/gpio/nuvoton-npcx-gpio.h>
#include <soc.h>
#include <zephy... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2026 Nordic Semiconductor ASA
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT nordic_npm10xx_gpio
#include <zephyr/drivers/gpio.h>
#include <zephyr/drivers/gpio/gpio_utils.h>
#include <zephyr/drivers/i2c.h>
#include <zephyr/dt-bindings/gpio/nordic-npm10xx-gpio.h>
#in... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>= mfd_npm13xx_reg_write(config->mfd, NPM_GPIO_BASE,
NPM_GPIO_OFFSET_MODE + pin,
NPM13XX_GPIO_GPIEVENTRISE);
}
} else if ((flags & NPM13XX_GPIO_WDT_RESET_ON) != 0U) {
ret = mfd_npm13xx_reg_write(config->mfd, NPM_GPIO_BASE, NPM_GPIO_OFFSET_MODE + pin,
NPM13XX_GPIO_GPORESET)... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>io_npm2100_port_toggle_bits(const struct device *dev, gpio_port_pins_t pins)
{
int ret;
uint32_t value;
ret = gpio_npm2100_port_get_raw(dev, &value);
if (ret < 0) {
return ret;
}
return gpio_npm2100_port_set_masked_raw(dev, pins, ~value);
}
static DEVICE_API(gpio, gpio_npm2100_api) = {
.pin_co... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>PI(gpio, gpio_npm6001_api) = {
.pin_configure = gpio_npm6001_configure,
.port_get_raw = gpio_npm6001_port_get_raw,
.port_set_masked_raw = gpio_npm6001_port_set_masked_raw,
.port_set_bits_raw = gpio_npm6001_port_set_bits_raw,
.port_clear_bits_raw = gpio_npm6001_port_clear_bits_raw,
.port_toggle_bits ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>def CONFIG_GPIO_NRFX_INTERRUPT
.pin_interrupt_configure = gpio_nrfx_pin_interrupt_configure,
.manage_callback = gpio_nrfx_manage_callback,
#endif
#ifdef CONFIG_GPIO_GET_DIRECTION
.port_get_direction = gpio_nrfx_port_get_direction,
#endif
#ifdef CONFIG_GPIO_GET_CONFIG
.pin_get_config = gpio_nrfx_pin_ge... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> \
err = clock_control_on(config->clk_dev, (clock_control_subsys_t)&scc_subsys); \
if (err == 0) { \
IF_ENABLED(DT_INST_IRQ_HAS_IDX(n, 0), (GPIO_NUMAKER_IRQ_INIT(n);)) \
} ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2022 SEAL AG
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT nuvoton_numicro_gpio
#include <errno.h>
#include <stdint.h>
#include <zephyr/device.h>
#include <zephyr/devicetree.h>
#include <zephyr/irq.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/drivers/gpi... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ap,
gpio_port_pins_t *inputs,
gpio_port_pins_t *outputs)
{
const struct gpio_nxp_siul2_config *config = dev->config;
gpio_port_pins_t ip = 0;
gpio_port_pins_t op = 0;
uint32_t pin;
map &= config->common.port_pin_mask;
if (inputs != NULL) {
while (map) {
pin = find_lsb_set(map)... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2018 Peter Bigot Consulting, LLC
* Copyright (c) 2018 Aapo Vienamo
* Copyright (c) 2019 Nordic Semiconductor ASA
* Copyright (c) 2019 Vestas Wind Systems A/S
* Copyright (c) 2020 ZedBlox Ltd.
* Copyright (c) 2021 Laird Connectivity
*
* SPDX-License-Identifier: Apache-2.0
*/
#i... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2015 Intel Corporation.
* Copyright (c) 2020 Norbit ODM AS
* Copyright 2022 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT nxp_pca95xx
/**
* @file Driver for PCA95XX and PCAL95XX I2C-based GPIO driver.
*/
#include <errno.h>
#include <zephyr/kernel.h>
#i... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright 2024，2025 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file Driver for PCA(L)xxxx SERIES I2C-based GPIO expander.
*/
#include <errno.h>
#include <zephyr/kernel.h>
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <zephyr/sys/byteorder.h>
#include <zephyr/sys/uti... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>acks, dev, fired_triggers);
} else {
k_sem_give(&drv_data->lock);
}
return 0;
}
static void pcal64xxa_work_handler(struct k_work *work)
{
struct pcal64xxa_drv_data *drv_data = CONTAINER_OF(work, struct pcal64xxa_drv_data, work);
(void)pcal64xxa_process_input(drv_data->dev, NULL);
}
static void ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>m an ISR */
if (k_is_in_isr()) {
return -EWOULDBLOCK;
}
k_sem_take(drv_data->lock, K_FOREVER);
gpio_pcal9722_reg_read(cfg, PCAL9722_OUTPUT_PORT0, (uint8_t *)&data, 3);
data = sys_le32_to_cpu(data) & ALL_PINS;
data = sys_cpu_to_le32((((data & ~mask) | (value & mask)) ^ toggle) & ALL_PINS);
rc =... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/**
* Copyright (c)
* 2022 Ithinx GmbH
* 2023 Amrith Venkat Kesavamoorthi <amrith@mr-beam.org>
* 2023 Mr Beam Lasers GmbH.
*
* SPDX-License-Identifier: Apache-2.0
*
* @see https://www.nxp.com/docs/en/data-sheet/PCF8575.pdf
* @see https://www.nxp.com/docs/en/data-sheet/PCF8574_PCF8574A.pdf
*/
#d... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ic int pi4ioe5v6408_port_write(const struct device *dev, gpio_port_pins_t mask,
gpio_port_value_t value, gpio_port_value_t toggle)
{
const struct pi4ioe5v6408_config *cfg = dev->config;
struct pi4ioe5v6408_data *data = dev->data;
uint8_t out;
int rc;
if (k_is_in_isr()) {
return -EWOULDBLOCK... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2018 Justin Watson
* Copyright (c) 2020 ATL Electronics
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT cypress_psoc6_gpio
#include <errno.h>
#include <zephyr/kernel.h>
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <soc.h>
#include <zephyr/drivers/... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>_write(const struct device *dev, uint32_t offs, uint32_t value)
{
sys_write32(value, DEVICE_MMIO_NAMED_GET(dev, reg_base) + offs);
}
static void gpio_rcar_modify_bit(const struct device *dev,
uint32_t offs, int bit, bool value)
{
uint32_t tmp = gpio_rcar_read(dev, offs);
if (value) {
tmp |= BI... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>get_config(const struct device *dev, gpio_pin_t pin,
gpio_flags_t *flags)
{
const struct gpio_ra_config *config = dev->config;
uint32_t pincfg;
if (pin >= RA_PINCTRL_PIN_NUM) {
return -EINVAL;
}
memset(flags, 0, sizeof(gpio_flags_t));
pincfg = R_PFS->PORT[config->port_num].PIN[pin].PmnPF... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>LL), \
.pcr = (uint8_t *)DT_REG_ADDR_BY_NAME(node, PCR), \
}, \
GPIO_RX_IRQ_STRUCT_INIT(suffix)}; \
static struct gpio_rx_data gpio_rx_data_##suffix; ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>intc_rz_tint_connect(irq_dev, gpio_config->port_num, irq_info->pin);
if (ret < 0) {
return ret;
}
ret = intc_rz_tint_set_type(irq_dev, irq_type);
if (ret < 0) {
return ret;
}
intc_rz_tint_enable(irq_dev);
intc_rz_tint_set_callback(irq_dev, gpio_rz_callback, (void *)irq_info);
}
#end... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> */
reg8 = sys_read8(RZA2M_PODR(int_dev, port));
if (reg8 & BIT(pin)) {
*flags |= GPIO_OUTPUT_INIT_HIGH;
} else {
*flags |= GPIO_OUTPUT_INIT_LOW;
}
}
/* Get pin drive strength */
reg16 = sys_read16(RZA2M_DSCR(int_dev, port));
mask16 = RZA2M_DSCR_MASK << (pin * 2);
reg16 &= mask16;
if ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> void (*gpio_int_init)(void);
};
struct gpio_rza2m_tint_data {
DEVICE_MMIO_RAM;
};
typedef struct gpio_rza2m_high_allowed_pin {
uint8_t port;
uint8_t mask;
} gpio_rza2m_high_allowed_pin_t;
struct gpio_rza2m_port_config {
struct gpio_driver_config common;
uint8_t port;
uint8_t ngpios;
const struc... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> = port->data;
sys_clear_bits(RIO_OUT_CLR(data->rio_base), pins);
sys_set_bits(RIO_OUT_SET(data->rio_base), pins);
return 0;
}
static int gpio_rp1_port_clear_bits_raw(const struct device *port, gpio_port_pins_t pins)
{
struct gpio_rp1_data *data = port->data;
sys_clear_bits(RIO_OUT_SET(data->rio_... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2021, Yonatan Schachter
* Copyright (c) 2025, Andrew Featherstone
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <errno.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/irq.h>
/* pico-sdk includes */
#include <hardware/gpio.h>
#include <hardware/regs/intctrl.h>
#include ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright 2022 Google LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file File that collects common data and configs for RS1718S chip. The file
* doesn't provide any API itself. The feature-specific API should be provided
* in separated files e.g. GPIO API.
*
* This file is placed in... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright 2022 Google LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_DRIVERS_GPIO_RT1718S_H_
#define ZEPHYR_DRIVERS_GPIO_RT1718S_H_
#include <zephyr/device.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/drivers/i2c.h>
#include <zephyr/kernel.h>
#define RT1718S_GPIO<|fim_su... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright 2022 Google LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT richtek_rt1718s_gpio_port
/**
* @file Driver for RS1718S TCPC chip GPIOs.
*/
#include "gpio_rt1718s.h"
#include <zephyr/drivers/gpio.h>
#include <zephyr/drivers/gpio/gpio_utils.h>
#include <zephyr/logging/log.h>
LO... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* SPDX-License-Identifier: Apache-2.0
*
* Copyright (c) 2024 Realtek Semiconductor Corporation, SIBG-SD7
* Author: Lin Yu-Cheng <lin_yu_cheng@realtek.com>
*/
#define DT_DRV_COMPAT realtek_rts5912_gpio
#include <errno.h>
#include <zephyr/device.h>
#include <zephyr/kernel.h>
#include <zephyr/drive... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2016 Freescale Semiconductor, Inc.
* Copyright (c) 2017, NXP
* Copyright (c) 2018 Foundries.io
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT openisa_rv32m1_gpio
#include <errno.h>
#include <zephyr/device.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/irq... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2023 Antmicro <www.antmicro.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT renesas_rzt2m_gpio
#include <zephyr/device.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/drivers/gpio/gpio_utils.h>
#include <zephyr/drivers/syscon.h>
#include <zephyr/sys/util... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ruct device *dev,
uint32_t mask,
uint32_t value)
{
const struct gpio_sam_config * const cfg = dev->config;
Pio * const pio = cfg->regs;
pio->PIO_ODSR = (pio->PIO_ODSR & ~mask) | (mask & value);
return 0;
}
static int gpio_sam_port_set_bits_raw(const struct device *dev, uint32_t mask)
{
c... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2017 Google LLC.
* Copyright (c) 2019 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT atmel_sam0_gpio
#include <errno.h>
#include <zephyr/device.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/dt-bindings/gpio/atmel-sam0-gpio.h>
#inc... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2018 Justin Watson
* Copyright (c) 2020-2023 Gerson Fernando Budke <nandojve@gmail.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT atmel_sam4l_gpio
#include <errno.h>
#include <zephyr/kernel.h>
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <so... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (C) 2025 Microchip Tech<|fim_suffix|>ength */
conf &= ~PIO_CFGR_DRVSTR_Msk;
}
/* Enable the PIO to control the pin (instead of a peripheral). */
conf &= ~PIO_S_PIO_CFGR_FUNC_Msk;
conf |= PIO_S_PIO_CFGR_FUNC(PIO_S_PIO_CFGR_FUNC_GPIO_Val);
/* Update PIO configuration */
key = k_spi... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> \
static struct gpio_sc18im_data gpio_sc18im_data_##n = { \
.conf1 = GPIO_SC18IM_DEFAULT_CONF, \
.conf2 = GPIO_SC18IM_DEFAULT_CONF, \
}; \
\
DEVICE_DT_INST_DEFINE(n, gpio_sc18im_init, NULL, \
&gpio_sc18im_data_##n, &gpio_sc18im_config_##n, ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>FIG_FROM_DT_INST(inst), \
.bridge = DEVICE_DT_GET(DT_INST_PARENT(inst)), \
}; \
static struct gpio_sc18is606_data gpio_sc18is606_data##inst = { ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ARG_UNUSED(port);
struct device *dev = (struct device *)param;
struct gpio_sedi_data *data =
(struct gpio_sedi_data *)(dev->data);
/* call the callbacks */
gpio_fire_callbacks(&data->callbacks, dev, pin_mask);
}
static void gpio_sedi_write_raw(const struct device *dev,
uint32_t pins,
bool ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>e,
.manage_callback = gpio_sf32lb_manage_callback,
};
static int gpio_sf32lb_init(const struct device *dev)
{
if (!shared_initialized) {
struct sf32lb_clock_dt_spec clk = SF32LB_CLOCK_DT_SPEC_GET(DT_INST_PARENT(0));
if (!sf32lb_clock_is_ready_dt(&clk)) {
return -ENODEV;
}
(void)sf32lb_cloc... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2018 Intel Corporation
* Copyright (c) 2021 Dennis Ruffer <daruffer@gmail.com>
* Copyright (c) 2023 Nick Ward <nix.ward@gmail.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/drivers/gpio.h>
#include <zephyr/shell/shell.h>
#include <stdio.h>
#define ARGV_DEV 1
#... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2024 GARDENA GmbH
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT silabs_si32_gpio
#include <zephyr/device.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/drivers/gpio/gpio_utils.h>
#include <zephyr/kernel.h>
#include <SI32_PBCFG_A_Type.h>
#include <SI32_PBSTD_A_Type.h>
#... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2017 Jean-Paul Etienne <fractalclone@gmail.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT sifive_gpio0
/**
* @file GPIO driver for the SiFive Freedom Processor
*/
#include <errno.h>
#include <zephyr/kernel.h>
#include <zephyr/device.h>
#include <soc.h>
#i... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2025 Silicon Laboratories Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT silabs_gpio
#include <errno.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/drivers/gpio/gpio_utils.h>
#include <zephyr/drivers/clock_control.h>
#include <zephyr/drivers/clock_control/clock_cont... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> \
ARRAY_FOR_EACH(data->interrupts, i) { \
data->interrupts[i].port = INVALID_PORT; \
} \
DT_I... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ulp_port_clear_bits(const struct device *port, gpio_port_pins_t pins)
{
for (size_t i = 0; i < UULP_GPIO_COUNT; i++) {
if (FIELD_GET(BIT(i), pins)) {
sl_si91x_gpio_set_uulp_npss_pin_value(i, 0);
}
}
return 0;
}
static int gpio_siwx91x_uulp_port_toggle_bits(const struct device *port, gpio_port_... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>1;
two_edge_triggered &= ~BIT(pos);
/* Re-arm for other edge */
gpio_smartbond_arm_next_edge_interrupt(dev, BIT(pos));
}
config->wkup_regs->clear = stat;
gpio_fire_callbacks(&data->callbacks, dev, stat);
}
#ifdef CONFIG_PM_DEVICE
static void gpio_latch_inst(mem_addr_t data_reg, mem_addr_t mo... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2022 Matthias Freese
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT ti_sn74hc595
/**
* @file Driver for 74 HC shift register
*/
#include <zephyr/drivers/gpio.h>
#include <zephyr/drivers/spi.h>
#include <zephyr/kernel.h>
#include <zephyr/device.h>
#include <zephyr/sys/byteor... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>DDR(base, GPIO_IS_OFFSET), pin);
} else {
sys_set_bit(GPIO_REG_ADDR(base, GPIO_IS_OFFSET), pin);
}
if (trig == GPIO_INT_TRIG_BOTH) {
sys_set_bit(GPIO_REG_ADDR(base, GPIO_IBE_OFFSET), pin);
} else if (trig == GPIO_INT_TRIG_HIGH) {
sys_set_bit(GPIO_REG_ADDR(base, GPIO_IEV_OFFSET), pin);
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>for details.
*/
<|fim_prefix|>/*
* Copyright (c) 2016 Open-RnD Sp. z o.o.
* Copyright (C) 2025 Savoir-faire Linux, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
/* Define for grep-ability, even though this will not be used */
#define DT_DRV_COMPAT st_stm32_gpio
#include <errno.h>
#include <zeph... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>IO_OUTPUT_OPENDRAIN */
unsigned int pupd; /* LL_GPIO_PULL_NO or LL_GPIO_PULL_UP or LL_GPIO_PULL_DOWN */
unsigned int mode; /* LL_GPIO_MODE_INPUT or LL_GPIO_MODE_OUTPUT or other */
unsigned int out_state; /* 1 (high level) or 0 (low level) */
};
#endif /* CONFIG_GPIO_GET_CONFIG */
#endif /* ZEPHYR_DRIV... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2021 Titouan Christophe
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT st_stmpe1600
/**
* @file Driver for STMPE1600 I2C-based GPIO driver.
*/
#include <errno.h>
#include <zephyr/kernel.h>
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <zephyr/sy... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2018 Aapo Vienamo
* Copyright (c) 2018 Peter Bigot Consulting, LLC
* Copyright (c) 2019-2020 Nordic Semiconductor ASA
* Copyright (c) 2020 ZedBlox Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT semtech_sx1509b
#include <errno.h>
#include <zephyr/kernel.h... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>flags into pinctrl config */
if (flags & GPIO_INPUT) {
if (flags & GPIO_PULL_UP) {
pcfg.cfg |= BIT(SY1XX_PAD_PULL_UP_OFFS);
}
if (flags & GPIO_PULL_DOWN) {
pcfg.cfg |= BIT(SY1XX_PAD_PULL_DOWN_OFFS);
}
} else if (flags & GPIO_OUTPUT) {
pcfg.cfg |= BIT(SY1XX_PAD_DIR_OFFS);
if (flags &... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>;
} else {
reg_cfg |= BIT(pin);
}
ret = update_config_regs(dev, reg_cfg);
return ret;
}
static int tca6424a_pin_config(const struct device *dev, gpio_pin_t pin, gpio_flags_t flags)
{
int ret;
struct tca6424a_drv_data *const drv_data = dev->data;
/* Does not support disconnected pin */
if ((f... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>T_INST_DEFINE(n, NULL, NULL, &vnd_gpio_data_##n, \
&vnd_gpio_config_##n, POST_KERNEL, \
CONFIG_GPIO_INIT_PRIORITY, \
&vnd_gpio_api);
DT_INST_FOREACH_STATUS_OKAY(VND_GPIO_INIT)
<|fim_prefix|>/*
* Copyright (c) 2021, Commonwealth Scientific and Industrial Research
* Organisati... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2024 SILA Embedded Solutions GmbH
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT infineon_tle9104_gpio
#include <errno.h>
#include <zephyr/kernel.h>
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/drivers/gpio... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>e all interrupts.
*/
sys_write32(0x0, config->base + IPIER_OFFSET);
/* Clear all pending interrupts */
sys_write32(sys_read32(config->base + IPISR_OFFSET), config->base + IPISR_OFFSET);
/* Enable global interrupts for this gpio device */
sys_write32(GIER_GIE, config->base + GIER_OFFSET);
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ORITY, &gpio_xlnx_ps_default_apis);
/*
* Top-level device initialization macro, executed for each PS GPIO
* parent device entry contained in the device tree which has status
* "okay".
*/
#define GPIO_XLNX_PS_DEV_INITITALIZE(idx)\
GPIO_XLNX_PS_GEN_BANK_ARRAY(idx)\
GPIO_XLNX_PS_DEV_CONFIG_IRQ_FUNC(idx)... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Xilinx Processor System MIO / EMIO GPIO controller driver
*
* Driver private data declarations, parent (IRQ handler) module
*
* Copyright (c) 2022, Weidmueller Interface GmbH & Co. KG
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ZEPHYR_DRIVERS_GPIO_GPIO_XLNX_PS_H_
#define _ZEPHYR_DRIVERS... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> sys_read32(GPIO_XLNX_PS_BANK_DATA_REG);
bank_data = (bank_data & ~mask) | (value & mask);
sys_write32(bank_data, GPIO_XLNX_PS_BANK_DATA_REG);
return 0;
}
/**
* @brief Sets bits in the data register of the GPIO pin bank.
*
* Sets bits in the data register of the current GPIO pin bank
* as a read-... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>#endif /* _ZEPHYR_DRIVERS_GPIO_GPIO_XLNX_PS_BANK_H_ */
<|fim_prefix|>/*
* Xilinx Processor System MIO / EMIO GPIO controller driver
*
* Driver private data declarations, GPIO bank module
*
* Copyright (c) 2022, Weidmueller Interface GmbH & Co. KG
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _Z... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2022 Schlumberger
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT infineon_xmc4xxx_gpio
#include <errno.h>
#include <zephyr/device.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/drivers/interrupt_controller/intc_xmc4xxx.h>
#include <zephyr/dt-bindings/gpio/i... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>h32v00x_configure_exti(dev, pin);
if (err != 0) {
break;
}
switch (trigger) {
case GPIO_INT_TRIG_LOW:
wch_exti_set_trigger(pin, WCH_EXTI_TRIGGER_FALLING_EDGE);
break;
case GPIO_INT_TRIG_HIGH:
wch_exti_set_trigger(pin, WCH_EXTI_TRIGGER_RISING_EDGE);
break;
case GPIO_INT_TRIG_BOT... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2026, Cirrus Logic, Inc.
*
*<|fim_suffix|>= 0x0FA8U,
[CS40L26_REG_RE_EST_STATUS] = 0x1E6CU,
[CS40L26_REG_VIBEGEN_F0_OTP_STORED] = 0x2128U,
[CS40L26_REG_VIBEGEN_REDC_OTP_STORED] = 0x212CU,
[CS40L26_REG_VIBEGEN_COMPENSATION_ENABLE] = 0x2158U,
[CS40L26_REG_F0_EST_REDC] = 0x64F... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2026, Cirrus Logic, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief I2C Driver for Cirrus Logic CS40L26/27 Haptic Devices
*/
#if CONFIG_HAPTICS_CS40L26_I2C
#include "cs40l26.h"
#include <zephyr/sys/byteorder.h>
static bool cs40l26_is_ready_i2c(const struct... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2026, Cirrus Logic, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief SPI Driver for Cirrus Logic CS40L26/27 Haptic Devices
*/
#if CONFIG_HAPTICS_CS40L26_SPI
#include "cs40l26.h"
#include <zephyr/logging/log.h>
#include <zephyr/toolchain.h>
LOG_MODULE_REGISTER(CS40L26_SPI... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>t = gpio_pin_configure_dt(&config->interrupt_gpio, GPIO_INPUT);
if (ret < 0) {
return ret;
}
ret = gpio_pin_interrupt_configure_dt(&config->interrupt_gpio, GPIO_INT_EDGE_TO_ACTIVE);
if (ret < 0) {
return ret;
}
ret = cs40l26_multi_write(dev, cs40l26_irq_masks, ARRAY_SIZE(cs40l26_irq_masks));
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2026, Cirrus Logic, Inc.
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_DRIVERS_HAPTICS_CS40L26_H_
#define ZEPHYR_DRIVERS_HAPTICS_CS40L26_H_
#include <sys/types.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/drivers/haptics.h>
#include <zephyr/drivers/i2c.h>
#include... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>_write_i2c(dev, addr, tx, len);
}
const struct cs40l5x_bus_io cs40l5x_bus_io_i2c = {
.is_ready = cs40l5x_is_ready_i2c,
.get_device = cs40l5x_get_device_i2c,
.read = cs40l5x_read_i2c,
.write = cs40l5x_write_i2c,
.raw_write = cs40l5x_raw_write_i2c,
};
#endif /* CONFIG_HAPTICS_CS40L5X_I2C */
<|fim_pref... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>g, "SPI not currently supported (%d)", -EPERM);
return -EPERM;
}
static int cs40l5x_write_spi(const struct device *const dev, const uint32_t addr,
uint32_t *const tx, const uint32_t len)
{
__maybe_unused const struct cs40l5x_config *const config = dev->config;
LOG_INST_ERR(config->log, "SPI ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>IELD_GET(CS40L5X_MASK_UVLO_VDDBATT_ERR_INT1, irq_ints[CS40L5X_INT10]) != 0) {
LOG_INST_WRN(config->log, "battery undervoltage detected");
error_bitmask |= HAPTICS_ERROR_UNDERVOLTAGE;
ret = cs40l5x_write(dev, CS40L5X_REG_IRQ1_INT_10,
CS40L5X_MASK_UVLO_VDDBATT_ERR_INT1);
if (ret < 0) {
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Cirrus Logic, Inc.
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_DRIVERS_HAPTICS_CIRRUS_CS40L5X_H_
#define ZEPHYR_DRIVERS_HAPTICS_CIRRUS_CS40L5X_H_
#include <zephyr/drivers/haptics/cs40l5x.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
#define CS40L5X_... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright 2024 Cirrus Logic, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/internal/syscall_handler.h>
#include <zephyr/drivers/haptics.h>
static inline int z_vrfy<|fim_suffix|>of(*cfg)));
}
return z_impl_haptics_select_source(dev, src, cfg);
}
#include <syscalls/haptics_... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Cirrus Logic, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Haptics shell commands.
*/
#include <stdlib.h>
#include <string.h>
#include <zephyr/drivers/haptics.h>
#include <zephyr/shell/shell.h>
#include <zephyr/shell/shell_string_conv.h>
#define HA... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright 2024 Cirrus Logic, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*
* DRV2605 Datasheet: https://www.ti.com/lit/gpn/drv2605
*/
#define DT_DRV_COMPAT ti_drv2605
#include <zephyr/device.h>
#include <zephyr/devicetree.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/drivers/i2c.h>
#i... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> \
\
static struct tm6605_data tm6605_data_##inst = { \
.selected_effect = DT_INST_PROP(inst, default_eff... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright 2024 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* IEEE 802.15.4 HDLC RCP interface. This is meant for network connectivity
* between a host and a RCP radio device.
*/
/* -------------------------------------------------------------------------- */
/* ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>rx_buf[0] & SPI_HEADER_CRC_FLAG) != 0U) {
if (fcs != sys_get_le16(&rx_buf[SPI_HEADER_LEN + data->rx_len])) {
LOG_WRN("Invalid CRC");
data->rx_len = 0U;
goto end;
}
}
if (data->rx_cb != NULL) {
uint8_t tmp[2] = {HDLC_BYTE_FLAG, 0x00};
/* Start HDLC */
data->rx_cb(tmp, 1, data->rx_par... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2024 DENX Software Engineering GmbH
* Lukasz Majewski <lukma@denx.de>
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* IEEE 802.15.4 HDLC RCP interface - serial communication interface (UART)
*/
/* ------------------------------------------------------------... | fim | zephyrproject-rtos/zephyr | c |
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