system stringclasses 7 values | input stringlengths 10 94.5k | output stringlengths 14 55.5k |
|---|---|---|
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <time.h>
#define PerThread 1024*16//每个线程计算多少个i
#define N 64*256*1024*16//积分计算PI总共划分为这么多项相加
#define BlockNum 64 //block的数量
#define ThreadNum 256 //每个block中threads的数量
__global__ void Gpu_calPI(double* Gpu_list)
{
__shared__ double cache[ThreadNum];//每个block共享一个shared memory.
int cacheIdx=threadIdx.x;
int tid=blockIdx.x*blockDim.x*blockDim.y+threadIdx.x;
int begin=tid*PerThread+1;
int end=begin+PerThread;
double temp=0;
int flag=1;
for(int i=begin;i<end;i++){
temp+=flag*(1.0/(2*i-1));
flag=flag*(-1);
}
cache[cacheIdx]=temp;
__syncthreads();
int i=blockDim.x/2;
while(i!=0){
if(cacheIdx<i) cache[cacheIdx]+=cache[cacheIdx+i];
__syncthreads();
i=i/2;
}
if(cacheIdx==0){
Gpu_list[blockIdx.x]=cache[0];
}
}
int main(void)
{
double * cpu_list;
double * Gpu_list;
double outcome=0;
cpu_list=(double*)malloc(sizeof(double)*BlockNum);
cudaMalloc((void**)&Gpu_list,sizeof(double)*BlockNum);
// dim3 blocksize=dim3(1,ThreadNum);
// dim3 gridsize=dim3(1,BlockNum);
// printf("go to GPU\n");
double begin=clock();
Gpu_calPI<<<BlockNum,ThreadNum>>>(Gpu_list);
cudaMemcpy(cpu_list,Gpu_list,sizeof(double)*BlockNum,cudaMemcpyDeviceToHost);
for(int i=0;i<BlockNum;i++){
outcome+=cpu_list[i];
}
outcome=4*outcome;
double end=clock();
printf("Scu2: N=%d,outcome=%.10f,time spend %.10f\n",N,outcome,(end-begin)/(CLOCKS_PER_SEC));
// printf("block x=%d,y=%d\n",blocksize.x,blocksize.y);
// printf("grid x=%d,y=%d\n",gridsize.x,gridsize.y);
} | .file "tmpxft_000de587_00000000-6_sharemem_calPI2.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z28__device_stub__Z9Gpu_calPIPdPd
.type _Z28__device_stub__Z9Gpu_calPIPdPd, @function
_Z28__device_stub__Z9Gpu_calPIPdPd:
.LFB2082:
.cfi_startproc
endbr64
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 8(%rsp)
movq %fs:40, %rax
movq %rax, 88(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 88(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $104, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 120
pushq 24(%rsp)
.cfi_def_cfa_offset 128
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z9Gpu_calPIPd(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 112
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z28__device_stub__Z9Gpu_calPIPdPd, .-_Z28__device_stub__Z9Gpu_calPIPdPd
.globl _Z9Gpu_calPIPd
.type _Z9Gpu_calPIPd, @function
_Z9Gpu_calPIPd:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z28__device_stub__Z9Gpu_calPIPdPd
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z9Gpu_calPIPd, .-_Z9Gpu_calPIPd
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC3:
.string "Scu2: N=%d,outcome=%.10f,time spend %.10f\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
subq $64, %rsp
.cfi_def_cfa_offset 80
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
movl $512, %edi
call malloc@PLT
movq %rax, %rbx
leaq 24(%rsp), %rdi
movl $512, %esi
call cudaMalloc@PLT
call clock@PLT
pxor %xmm2, %xmm2
cvtsi2sdq %rax, %xmm2
movsd %xmm2, (%rsp)
movl $256, 44(%rsp)
movl $1, 48(%rsp)
movl $64, 32(%rsp)
movl $1, 36(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 44(%rsp), %rdx
movl $1, %ecx
movq 32(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L17
.L12:
movl $2, %ecx
movl $512, %edx
movq 24(%rsp), %rsi
movq %rbx, %rdi
call cudaMemcpy@PLT
movq %rbx, %rax
leaq 512(%rbx), %rdx
pxor %xmm0, %xmm0
.L13:
addsd (%rax), %xmm0
addq $8, %rax
cmpq %rdx, %rax
jne .L13
mulsd .LC1(%rip), %xmm0
movsd %xmm0, 8(%rsp)
call clock@PLT
pxor %xmm1, %xmm1
cvtsi2sdq %rax, %xmm1
subsd (%rsp), %xmm1
divsd .LC2(%rip), %xmm1
movsd 8(%rsp), %xmm0
movl $268435456, %edx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $2, %eax
call __printf_chk@PLT
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L18
movl $0, %eax
addq $64, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
ret
.L17:
.cfi_restore_state
movq 24(%rsp), %rdi
call _Z28__device_stub__Z9Gpu_calPIPdPd
jmp .L12
.L18:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.1,"aMS",@progbits,1
.LC4:
.string "_Z9Gpu_calPIPd"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC4(%rip), %rdx
movq %rdx, %rcx
leaq _Z9Gpu_calPIPd(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC1:
.long 0
.long 1074790400
.align 8
.LC2:
.long 0
.long 1093567616
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <time.h>
#define PerThread 1024*16//每个线程计算多少个i
#define N 64*256*1024*16//积分计算PI总共划分为这么多项相加
#define BlockNum 64 //block的数量
#define ThreadNum 256 //每个block中threads的数量
__global__ void Gpu_calPI(double* Gpu_list)
{
__shared__ double cache[ThreadNum];//每个block共享一个shared memory.
int cacheIdx=threadIdx.x;
int tid=blockIdx.x*blockDim.x*blockDim.y+threadIdx.x;
int begin=tid*PerThread+1;
int end=begin+PerThread;
double temp=0;
int flag=1;
for(int i=begin;i<end;i++){
temp+=flag*(1.0/(2*i-1));
flag=flag*(-1);
}
cache[cacheIdx]=temp;
__syncthreads();
int i=blockDim.x/2;
while(i!=0){
if(cacheIdx<i) cache[cacheIdx]+=cache[cacheIdx+i];
__syncthreads();
i=i/2;
}
if(cacheIdx==0){
Gpu_list[blockIdx.x]=cache[0];
}
}
int main(void)
{
double * cpu_list;
double * Gpu_list;
double outcome=0;
cpu_list=(double*)malloc(sizeof(double)*BlockNum);
cudaMalloc((void**)&Gpu_list,sizeof(double)*BlockNum);
// dim3 blocksize=dim3(1,ThreadNum);
// dim3 gridsize=dim3(1,BlockNum);
// printf("go to GPU\n");
double begin=clock();
Gpu_calPI<<<BlockNum,ThreadNum>>>(Gpu_list);
cudaMemcpy(cpu_list,Gpu_list,sizeof(double)*BlockNum,cudaMemcpyDeviceToHost);
for(int i=0;i<BlockNum;i++){
outcome+=cpu_list[i];
}
outcome=4*outcome;
double end=clock();
printf("Scu2: N=%d,outcome=%.10f,time spend %.10f\n",N,outcome,(end-begin)/(CLOCKS_PER_SEC));
// printf("block x=%d,y=%d\n",blocksize.x,blocksize.y);
// printf("grid x=%d,y=%d\n",gridsize.x,gridsize.y);
} | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <time.h>
#define PerThread 1024*16//每个线程计算多少个i
#define N 64*256*1024*16//积分计算PI总共划分为这么多项相加
#define BlockNum 64 //block的数量
#define ThreadNum 256 //每个block中threads的数量
__global__ void Gpu_calPI(double* Gpu_list)
{
__shared__ double cache[ThreadNum];//每个block共享一个shared memory.
int cacheIdx=threadIdx.x;
int tid=blockIdx.x*blockDim.x*blockDim.y+threadIdx.x;
int begin=tid*PerThread+1;
int end=begin+PerThread;
double temp=0;
int flag=1;
for(int i=begin;i<end;i++){
temp+=flag*(1.0/(2*i-1));
flag=flag*(-1);
}
cache[cacheIdx]=temp;
__syncthreads();
int i=blockDim.x/2;
while(i!=0){
if(cacheIdx<i) cache[cacheIdx]+=cache[cacheIdx+i];
__syncthreads();
i=i/2;
}
if(cacheIdx==0){
Gpu_list[blockIdx.x]=cache[0];
}
}
int main(void)
{
double * cpu_list;
double * Gpu_list;
double outcome=0;
cpu_list=(double*)malloc(sizeof(double)*BlockNum);
hipMalloc((void**)&Gpu_list,sizeof(double)*BlockNum);
// dim3 blocksize=dim3(1,ThreadNum);
// dim3 gridsize=dim3(1,BlockNum);
// printf("go to GPU\n");
double begin=clock();
Gpu_calPI<<<BlockNum,ThreadNum>>>(Gpu_list);
hipMemcpy(cpu_list,Gpu_list,sizeof(double)*BlockNum,hipMemcpyDeviceToHost);
for(int i=0;i<BlockNum;i++){
outcome+=cpu_list[i];
}
outcome=4*outcome;
double end=clock();
printf("Scu2: N=%d,outcome=%.10f,time spend %.10f\n",N,outcome,(end-begin)/(CLOCKS_PER_SEC));
// printf("block x=%d,y=%d\n",blocksize.x,blocksize.y);
// printf("grid x=%d,y=%d\n",gridsize.x,gridsize.y);
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <time.h>
#define PerThread 1024*16//每个线程计算多少个i
#define N 64*256*1024*16//积分计算PI总共划分为这么多项相加
#define BlockNum 64 //block的数量
#define ThreadNum 256 //每个block中threads的数量
__global__ void Gpu_calPI(double* Gpu_list)
{
__shared__ double cache[ThreadNum];//每个block共享一个shared memory.
int cacheIdx=threadIdx.x;
int tid=blockIdx.x*blockDim.x*blockDim.y+threadIdx.x;
int begin=tid*PerThread+1;
int end=begin+PerThread;
double temp=0;
int flag=1;
for(int i=begin;i<end;i++){
temp+=flag*(1.0/(2*i-1));
flag=flag*(-1);
}
cache[cacheIdx]=temp;
__syncthreads();
int i=blockDim.x/2;
while(i!=0){
if(cacheIdx<i) cache[cacheIdx]+=cache[cacheIdx+i];
__syncthreads();
i=i/2;
}
if(cacheIdx==0){
Gpu_list[blockIdx.x]=cache[0];
}
}
int main(void)
{
double * cpu_list;
double * Gpu_list;
double outcome=0;
cpu_list=(double*)malloc(sizeof(double)*BlockNum);
hipMalloc((void**)&Gpu_list,sizeof(double)*BlockNum);
// dim3 blocksize=dim3(1,ThreadNum);
// dim3 gridsize=dim3(1,BlockNum);
// printf("go to GPU\n");
double begin=clock();
Gpu_calPI<<<BlockNum,ThreadNum>>>(Gpu_list);
hipMemcpy(cpu_list,Gpu_list,sizeof(double)*BlockNum,hipMemcpyDeviceToHost);
for(int i=0;i<BlockNum;i++){
outcome+=cpu_list[i];
}
outcome=4*outcome;
double end=clock();
printf("Scu2: N=%d,outcome=%.10f,time spend %.10f\n",N,outcome,(end-begin)/(CLOCKS_PER_SEC));
// printf("block x=%d,y=%d\n",blocksize.x,blocksize.y);
// printf("grid x=%d,y=%d\n",gridsize.x,gridsize.y);
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9Gpu_calPIPd
.globl _Z9Gpu_calPIPd
.p2align 8
.type _Z9Gpu_calPIPd,@function
_Z9Gpu_calPIPd:
s_load_b32 s4, s[0:1], 0x14
s_mov_b32 s2, s15
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s4, 0xffff
s_lshr_b32 s4, s4, 16
s_mul_i32 s5, s15, s3
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[3:4], null, s5, s4, v[0:1]
s_mov_b32 s5, 1
s_mov_b32 s4, exec_lo
v_lshlrev_b32_e32 v1, 14, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
v_or_b32_e32 v4, 1, v1
v_add_nc_u32_e32 v5, 0x4001, v1
v_mov_b32_e32 v1, 0
v_mov_b32_e32 v2, 0
v_cmpx_lt_i32_e64 v4, v5
s_cbranch_execz .LBB0_3
v_mov_b32_e32 v1, 0
v_mov_b32_e32 v2, 0
v_lshl_or_b32 v3, v3, 15, 1
s_mov_b32 s6, 0
.p2align 6
.LBB0_2:
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_add_nc_u32_e32 v4, s6, v3
s_add_i32 s6, s6, 2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_f64_i32_e32 v[4:5], v4
v_div_scale_f64 v[6:7], null, v[4:5], v[4:5], 1.0
v_div_scale_f64 v[12:13], vcc_lo, 1.0, v[4:5], 1.0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f64_e32 v[8:9], v[6:7]
s_waitcnt_depctr 0xfff
v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[10:11], v[12:13], v[8:9]
v_fma_f64 v[6:7], -v[6:7], v[10:11], v[12:13]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_div_fmas_f64 v[6:7], v[6:7], v[8:9], v[10:11]
v_cvt_f64_i32_e32 v[8:9], s5
s_sub_i32 s5, 0, s5
s_cmpk_eq_u32 s6, 0x8000
v_div_fixup_f64 v[4:5], v[6:7], v[4:5], 1.0
s_delay_alu instid0(VALU_DEP_1)
v_fma_f64 v[1:2], v[4:5], v[8:9], v[1:2]
s_cbranch_scc0 .LBB0_2
.LBB0_3:
s_or_b32 exec_lo, exec_lo, s4
v_lshlrev_b32_e32 v3, 3, v0
s_cmp_lt_u32 s3, 2
ds_store_b64 v3, v[1:2]
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB0_8
.LBB0_4:
s_mov_b32 s3, 0
s_mov_b32 s4, exec_lo
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB0_6
v_mov_b32_e32 v2, 0
s_load_b64 s[0:1], s[0:1], 0x0
s_lshl_b64 s[2:3], s[2:3], 3
ds_load_b64 v[0:1], v2
s_waitcnt lgkmcnt(0)
s_add_u32 s0, s0, s2
s_addc_u32 s1, s1, s3
global_store_b64 v2, v[0:1], s[0:1]
.LBB0_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.p2align 6
.LBB0_7:
s_or_b32 exec_lo, exec_lo, s5
s_cmp_gt_u32 s3, 3
s_mov_b32 s3, s4
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB0_4
.LBB0_8:
s_lshr_b32 s4, s3, 1
s_mov_b32 s5, exec_lo
v_cmpx_gt_u32_e64 s4, v0
s_cbranch_execz .LBB0_7
v_add_lshl_u32 v1, s4, v0, 3
ds_load_b64 v[1:2], v1
ds_load_b64 v[4:5], v3
s_waitcnt lgkmcnt(0)
v_add_f64 v[1:2], v[1:2], v[4:5]
ds_store_b64 v3, v[1:2]
s_branch .LBB0_7
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z9Gpu_calPIPd
.amdhsa_group_segment_fixed_size 2048
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 264
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 14
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z9Gpu_calPIPd, .Lfunc_end0-_Z9Gpu_calPIPd
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: hidden_block_count_x
- .offset: 12
.size: 4
.value_kind: hidden_block_count_y
- .offset: 16
.size: 4
.value_kind: hidden_block_count_z
- .offset: 20
.size: 2
.value_kind: hidden_group_size_x
- .offset: 22
.size: 2
.value_kind: hidden_group_size_y
- .offset: 24
.size: 2
.value_kind: hidden_group_size_z
- .offset: 26
.size: 2
.value_kind: hidden_remainder_x
- .offset: 28
.size: 2
.value_kind: hidden_remainder_y
- .offset: 30
.size: 2
.value_kind: hidden_remainder_z
- .offset: 48
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 72
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 2048
.kernarg_segment_align: 8
.kernarg_segment_size: 264
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z9Gpu_calPIPd
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z9Gpu_calPIPd.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 14
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <time.h>
#define PerThread 1024*16//每个线程计算多少个i
#define N 64*256*1024*16//积分计算PI总共划分为这么多项相加
#define BlockNum 64 //block的数量
#define ThreadNum 256 //每个block中threads的数量
__global__ void Gpu_calPI(double* Gpu_list)
{
__shared__ double cache[ThreadNum];//每个block共享一个shared memory.
int cacheIdx=threadIdx.x;
int tid=blockIdx.x*blockDim.x*blockDim.y+threadIdx.x;
int begin=tid*PerThread+1;
int end=begin+PerThread;
double temp=0;
int flag=1;
for(int i=begin;i<end;i++){
temp+=flag*(1.0/(2*i-1));
flag=flag*(-1);
}
cache[cacheIdx]=temp;
__syncthreads();
int i=blockDim.x/2;
while(i!=0){
if(cacheIdx<i) cache[cacheIdx]+=cache[cacheIdx+i];
__syncthreads();
i=i/2;
}
if(cacheIdx==0){
Gpu_list[blockIdx.x]=cache[0];
}
}
int main(void)
{
double * cpu_list;
double * Gpu_list;
double outcome=0;
cpu_list=(double*)malloc(sizeof(double)*BlockNum);
hipMalloc((void**)&Gpu_list,sizeof(double)*BlockNum);
// dim3 blocksize=dim3(1,ThreadNum);
// dim3 gridsize=dim3(1,BlockNum);
// printf("go to GPU\n");
double begin=clock();
Gpu_calPI<<<BlockNum,ThreadNum>>>(Gpu_list);
hipMemcpy(cpu_list,Gpu_list,sizeof(double)*BlockNum,hipMemcpyDeviceToHost);
for(int i=0;i<BlockNum;i++){
outcome+=cpu_list[i];
}
outcome=4*outcome;
double end=clock();
printf("Scu2: N=%d,outcome=%.10f,time spend %.10f\n",N,outcome,(end-begin)/(CLOCKS_PER_SEC));
// printf("block x=%d,y=%d\n",blocksize.x,blocksize.y);
// printf("grid x=%d,y=%d\n",gridsize.x,gridsize.y);
} | .text
.file "sharemem_calPI2.hip"
.globl _Z24__device_stub__Gpu_calPIPd # -- Begin function _Z24__device_stub__Gpu_calPIPd
.p2align 4, 0x90
.type _Z24__device_stub__Gpu_calPIPd,@function
_Z24__device_stub__Gpu_calPIPd: # @_Z24__device_stub__Gpu_calPIPd
.cfi_startproc
# %bb.0:
subq $72, %rsp
.cfi_def_cfa_offset 80
movq %rdi, 64(%rsp)
leaq 64(%rsp), %rax
movq %rax, (%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
movq %rsp, %r9
movl $_Z9Gpu_calPIPd, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $88, %rsp
.cfi_adjust_cfa_offset -88
retq
.Lfunc_end0:
.size _Z24__device_stub__Gpu_calPIPd, .Lfunc_end0-_Z24__device_stub__Gpu_calPIPd
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI1_0:
.quad 0x4010000000000000 # double 4
.LCPI1_1:
.quad 0x412e848000000000 # double 1.0E+6
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %r14
.cfi_def_cfa_offset 16
pushq %rbx
.cfi_def_cfa_offset 24
subq $104, %rsp
.cfi_def_cfa_offset 128
.cfi_offset %rbx, -24
.cfi_offset %r14, -16
movl $512, %edi # imm = 0x200
callq malloc
movq %rax, %rbx
leaq 8(%rsp), %rdi
movl $512, %esi # imm = 0x200
callq hipMalloc
callq clock
movq %rax, %r14
movabsq $4294967360, %rdi # imm = 0x100000040
leaq 192(%rdi), %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_2
# %bb.1:
movq 8(%rsp), %rax
movq %rax, 96(%rsp)
leaq 96(%rsp), %rax
movq %rax, 16(%rsp)
leaq 80(%rsp), %rdi
leaq 64(%rsp), %rsi
leaq 56(%rsp), %rdx
leaq 48(%rsp), %rcx
callq __hipPopCallConfiguration
movq 80(%rsp), %rsi
movl 88(%rsp), %edx
movq 64(%rsp), %rcx
movl 72(%rsp), %r8d
leaq 16(%rsp), %r9
movl $_Z9Gpu_calPIPd, %edi
pushq 48(%rsp)
.cfi_adjust_cfa_offset 8
pushq 64(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_2:
movq 8(%rsp), %rsi
movl $512, %edx # imm = 0x200
movq %rbx, %rdi
movl $2, %ecx
callq hipMemcpy
xorpd %xmm0, %xmm0
xorl %eax, %eax
.p2align 4, 0x90
.LBB1_3: # =>This Inner Loop Header: Depth=1
addsd (%rbx,%rax,8), %xmm0
incq %rax
cmpq $64, %rax
jne .LBB1_3
# %bb.4:
cvtsi2sd %r14, %xmm1
movsd %xmm1, 32(%rsp) # 8-byte Spill
mulsd .LCPI1_0(%rip), %xmm0
movsd %xmm0, 40(%rsp) # 8-byte Spill
callq clock
xorps %xmm1, %xmm1
cvtsi2sd %rax, %xmm1
subsd 32(%rsp), %xmm1 # 8-byte Folded Reload
divsd .LCPI1_1(%rip), %xmm1
movl $.L.str, %edi
movl $268435456, %esi # imm = 0x10000000
movsd 40(%rsp), %xmm0 # 8-byte Reload
# xmm0 = mem[0],zero
movb $2, %al
callq printf
xorl %eax, %eax
addq $104, %rsp
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z9Gpu_calPIPd, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z9Gpu_calPIPd,@object # @_Z9Gpu_calPIPd
.section .rodata,"a",@progbits
.globl _Z9Gpu_calPIPd
.p2align 3, 0x0
_Z9Gpu_calPIPd:
.quad _Z24__device_stub__Gpu_calPIPd
.size _Z9Gpu_calPIPd, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Scu2: N=%d,outcome=%.10f,time spend %.10f\n"
.size .L.str, 43
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z9Gpu_calPIPd"
.size .L__unnamed_1, 15
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z24__device_stub__Gpu_calPIPd
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z9Gpu_calPIPd
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000de587_00000000-6_sharemem_calPI2.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z28__device_stub__Z9Gpu_calPIPdPd
.type _Z28__device_stub__Z9Gpu_calPIPdPd, @function
_Z28__device_stub__Z9Gpu_calPIPdPd:
.LFB2082:
.cfi_startproc
endbr64
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 8(%rsp)
movq %fs:40, %rax
movq %rax, 88(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 88(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $104, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 120
pushq 24(%rsp)
.cfi_def_cfa_offset 128
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z9Gpu_calPIPd(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 112
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z28__device_stub__Z9Gpu_calPIPdPd, .-_Z28__device_stub__Z9Gpu_calPIPdPd
.globl _Z9Gpu_calPIPd
.type _Z9Gpu_calPIPd, @function
_Z9Gpu_calPIPd:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z28__device_stub__Z9Gpu_calPIPdPd
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z9Gpu_calPIPd, .-_Z9Gpu_calPIPd
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC3:
.string "Scu2: N=%d,outcome=%.10f,time spend %.10f\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
subq $64, %rsp
.cfi_def_cfa_offset 80
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
movl $512, %edi
call malloc@PLT
movq %rax, %rbx
leaq 24(%rsp), %rdi
movl $512, %esi
call cudaMalloc@PLT
call clock@PLT
pxor %xmm2, %xmm2
cvtsi2sdq %rax, %xmm2
movsd %xmm2, (%rsp)
movl $256, 44(%rsp)
movl $1, 48(%rsp)
movl $64, 32(%rsp)
movl $1, 36(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 44(%rsp), %rdx
movl $1, %ecx
movq 32(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L17
.L12:
movl $2, %ecx
movl $512, %edx
movq 24(%rsp), %rsi
movq %rbx, %rdi
call cudaMemcpy@PLT
movq %rbx, %rax
leaq 512(%rbx), %rdx
pxor %xmm0, %xmm0
.L13:
addsd (%rax), %xmm0
addq $8, %rax
cmpq %rdx, %rax
jne .L13
mulsd .LC1(%rip), %xmm0
movsd %xmm0, 8(%rsp)
call clock@PLT
pxor %xmm1, %xmm1
cvtsi2sdq %rax, %xmm1
subsd (%rsp), %xmm1
divsd .LC2(%rip), %xmm1
movsd 8(%rsp), %xmm0
movl $268435456, %edx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $2, %eax
call __printf_chk@PLT
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L18
movl $0, %eax
addq $64, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
ret
.L17:
.cfi_restore_state
movq 24(%rsp), %rdi
call _Z28__device_stub__Z9Gpu_calPIPdPd
jmp .L12
.L18:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.1,"aMS",@progbits,1
.LC4:
.string "_Z9Gpu_calPIPd"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC4(%rip), %rdx
movq %rdx, %rcx
leaq _Z9Gpu_calPIPd(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC1:
.long 0
.long 1074790400
.align 8
.LC2:
.long 0
.long 1093567616
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "sharemem_calPI2.hip"
.globl _Z24__device_stub__Gpu_calPIPd # -- Begin function _Z24__device_stub__Gpu_calPIPd
.p2align 4, 0x90
.type _Z24__device_stub__Gpu_calPIPd,@function
_Z24__device_stub__Gpu_calPIPd: # @_Z24__device_stub__Gpu_calPIPd
.cfi_startproc
# %bb.0:
subq $72, %rsp
.cfi_def_cfa_offset 80
movq %rdi, 64(%rsp)
leaq 64(%rsp), %rax
movq %rax, (%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
movq %rsp, %r9
movl $_Z9Gpu_calPIPd, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $88, %rsp
.cfi_adjust_cfa_offset -88
retq
.Lfunc_end0:
.size _Z24__device_stub__Gpu_calPIPd, .Lfunc_end0-_Z24__device_stub__Gpu_calPIPd
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI1_0:
.quad 0x4010000000000000 # double 4
.LCPI1_1:
.quad 0x412e848000000000 # double 1.0E+6
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %r14
.cfi_def_cfa_offset 16
pushq %rbx
.cfi_def_cfa_offset 24
subq $104, %rsp
.cfi_def_cfa_offset 128
.cfi_offset %rbx, -24
.cfi_offset %r14, -16
movl $512, %edi # imm = 0x200
callq malloc
movq %rax, %rbx
leaq 8(%rsp), %rdi
movl $512, %esi # imm = 0x200
callq hipMalloc
callq clock
movq %rax, %r14
movabsq $4294967360, %rdi # imm = 0x100000040
leaq 192(%rdi), %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_2
# %bb.1:
movq 8(%rsp), %rax
movq %rax, 96(%rsp)
leaq 96(%rsp), %rax
movq %rax, 16(%rsp)
leaq 80(%rsp), %rdi
leaq 64(%rsp), %rsi
leaq 56(%rsp), %rdx
leaq 48(%rsp), %rcx
callq __hipPopCallConfiguration
movq 80(%rsp), %rsi
movl 88(%rsp), %edx
movq 64(%rsp), %rcx
movl 72(%rsp), %r8d
leaq 16(%rsp), %r9
movl $_Z9Gpu_calPIPd, %edi
pushq 48(%rsp)
.cfi_adjust_cfa_offset 8
pushq 64(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_2:
movq 8(%rsp), %rsi
movl $512, %edx # imm = 0x200
movq %rbx, %rdi
movl $2, %ecx
callq hipMemcpy
xorpd %xmm0, %xmm0
xorl %eax, %eax
.p2align 4, 0x90
.LBB1_3: # =>This Inner Loop Header: Depth=1
addsd (%rbx,%rax,8), %xmm0
incq %rax
cmpq $64, %rax
jne .LBB1_3
# %bb.4:
cvtsi2sd %r14, %xmm1
movsd %xmm1, 32(%rsp) # 8-byte Spill
mulsd .LCPI1_0(%rip), %xmm0
movsd %xmm0, 40(%rsp) # 8-byte Spill
callq clock
xorps %xmm1, %xmm1
cvtsi2sd %rax, %xmm1
subsd 32(%rsp), %xmm1 # 8-byte Folded Reload
divsd .LCPI1_1(%rip), %xmm1
movl $.L.str, %edi
movl $268435456, %esi # imm = 0x10000000
movsd 40(%rsp), %xmm0 # 8-byte Reload
# xmm0 = mem[0],zero
movb $2, %al
callq printf
xorl %eax, %eax
addq $104, %rsp
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z9Gpu_calPIPd, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z9Gpu_calPIPd,@object # @_Z9Gpu_calPIPd
.section .rodata,"a",@progbits
.globl _Z9Gpu_calPIPd
.p2align 3, 0x0
_Z9Gpu_calPIPd:
.quad _Z24__device_stub__Gpu_calPIPd
.size _Z9Gpu_calPIPd, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Scu2: N=%d,outcome=%.10f,time spend %.10f\n"
.size .L.str, 43
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z9Gpu_calPIPd"
.size .L__unnamed_1, 15
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z24__device_stub__Gpu_calPIPd
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z9Gpu_calPIPd
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <cstdlib>
#include <math.h>
#include <time.h>
#include <cstdio>
// Assertion to check for errors
#define CUDA_SAFE_CALL(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(cudaError_t code, char *file, int line, bool abort=true)
{
if (code != cudaSuccess)
{
fprintf(stderr,"CUDA_SAFE_CALL: %s %s %d\n", cudaGetErrorString(code), file, line);
if (abort) exit(code);
}
}
#define GIG 1000000000
#define CPG 3.07
#define PRINT_TIME 1
#define SM_ARR_LEN 2048*2048
#define OMEGA 1.98
void initializeArray1D(float *arr, int len, int seed);
__global__ void SOR_add (float* x)
{
int row_start = threadIdx.x;
int col_start = threadIdx.y;
int i;
float result = 0;
int offset = (col_start * 2048) + row_start;
while(offset<SM_ARR_LEN)
{ if((offset > 2047) && (offset%2048) && (offset%2047) && (offset < SM_ARR_LEN-2047))
{
for(i=0; i<2000; i++)
{
result = x[offset] - 0.25*(x[offset-1] + x[offset+1] + x[offset - blockDim.x] + x[offset + blockDim.x]);
__syncthreads();
x[offset] -= result*OMEGA;
__syncthreads();
}
}
offset += blockDim.x*blockDim.y;
}
}
int main(int argc, char **argv){
int arrLen = 0;
struct timespec diff(struct timespec start, struct timespec end);
struct timespec time1, time2;
struct timespec time_stamp;
// GPU Timing variables
cudaEvent_t start, stop;
float elapsed_gpu;
// Arrays on GPU global memory
float *d_x;
// Arrays on the host memory
float *h_x;
int i, errCount = 0, zeroCount = 0;
if (argc > 1) {
arrLen = atoi(argv[1]);
}
else {
arrLen = SM_ARR_LEN;
}
printf("Length of the array = %d\n", arrLen);
// Select GPU
CUDA_SAFE_CALL(cudaSetDevice(1));
// Allocate GPU memory
size_t allocSize = arrLen * sizeof(float); printf("\ncp1");
CUDA_SAFE_CALL(cudaMalloc((void **)&d_x, allocSize)); printf("\ncp2");
// Allocate arrays on host memory
h_x = (float *) malloc(allocSize); printf("\ncp4");
// Initialize the host arrays
printf("\nInitializing the arrays ...");
// Arrays are initialized with a known seed for reproducability
initializeArray1D(h_x, arrLen, 2453);
//initializeArray1D(h_y, arrLen, 1467);
printf("\t... done\n\n");
#if PRINT_TIME
// Create the cuda events
cudaEventCreate(&start);
cudaEventCreate(&stop);
// Record event on the default stream
cudaEventRecord(start, 0);
#endif
// Transfer the arrays to the GPU memory
CUDA_SAFE_CALL(cudaMemcpy(d_x, h_x, allocSize, cudaMemcpyHostToDevice));
dim3 dimBlock(16,16);
// Launch the kernel
SOR_add<<<1,dimBlock>>>(d_x);
// Check for errors during launch
CUDA_SAFE_CALL(cudaPeekAtLastError());
// Transfer the results back to the host
CUDA_SAFE_CALL(cudaMemcpy(h_x, d_x, allocSize, cudaMemcpyDeviceToHost));
#if PRINT_TIME
// Stop and destroy the timer
cudaEventRecord(stop,0);
cudaEventSynchronize(stop);
cudaEventElapsedTime(&elapsed_gpu, start, stop);
printf("\nGPU time: %f (msec)\n", elapsed_gpu);
cudaEventDestroy(start);
cudaEventDestroy(stop);
#endif
long int length = 2048;
int j,k;
float change;
// Compute the results on the host
printf("\ncalculating results on host\n");
clock_gettime(CLOCK_REALTIME, &time1);
for(k=0;k<2000;k++)
{
for (i = 1; i < length-1; i++){
for (j = 1; j < length-1; j++) {
change = h_x[i*length+j] - .25 * (h_x[(i-1)*length+j] +
h_x[(i+1)*length+j] +
h_x[i*length+j+1] +
h_x[i*length+j-1]);
h_x[i*length+j] -= change * OMEGA;
}
}
}
clock_gettime(CLOCK_REALTIME, &time2);
time_stamp = diff(time1,time2);
printf("%lf\n", ((double) (GIG * time_stamp.tv_sec + time_stamp.tv_nsec)/1000000));
// Free-up device and host memory
CUDA_SAFE_CALL(cudaFree(d_x));
//CUDA_SAFE_CALL(cudaFree(d_y));
free(h_x);
//free(h_y);
return 0;
}
void initializeArray1D(float *arr, int len, int seed) {
int i;
float randNum;
srand(seed);
for (i = 0; i < len; i++) {
randNum = (float) rand();
arr[i] = randNum;
}
}
struct timespec diff(struct timespec start, struct timespec end)
{
struct timespec temp;
if ((end.tv_nsec-start.tv_nsec)<0) {
temp.tv_sec = end.tv_sec-start.tv_sec-1;
temp.tv_nsec = 1000000000+end.tv_nsec-start.tv_nsec;
} else {
temp.tv_sec = end.tv_sec-start.tv_sec;
temp.tv_nsec = end.tv_nsec-start.tv_nsec;
}
return temp;
} | code for sm_80
Function : _Z7SOR_addPf
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_TID.Y ; /* 0x0000000000007919 */
/* 0x000e280000002200 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ LEA R0, R0, R3, 0xb ; /* 0x0000000300007211 */
/* 0x001fc800078e58ff */
/*0040*/ ISETP.GT.AND P0, PT, R0, 0x3fffff, PT ; /* 0x003fffff0000780c */
/* 0x000fda0003f04270 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0070*/ LOP3.LUT P0, RZ, R0.reuse, 0x7ff, RZ, 0xc0, !PT ; /* 0x000007ff00ff7812 */
/* 0x040fe4000780c0ff */
/*0080*/ MOV R9, c[0x0][0x0] ; /* 0x0000000000097a02 */
/* 0x000fe40000000f00 */
/*0090*/ ISETP.LT.OR P0, PT, R0, 0x800, !P0 ; /* 0x000008000000780c */
/* 0x000fda0004701670 */
/*00a0*/ @!P0 IMAD.WIDE.U32 R2, R0, 0x200401, RZ ; /* 0x0020040100028825 */
/* 0x001fca00078e00ff */
/*00b0*/ @!P0 IADD3 R2, -R3, R0, RZ ; /* 0x0000000003028210 */
/* 0x000fc80007ffe1ff */
/*00c0*/ @!P0 LEA.HI R2, R2, R3, RZ, 0x1f ; /* 0x0000000302028211 */
/* 0x000fc800078ff8ff */
/*00d0*/ @!P0 SHF.R.U32.HI R3, RZ, 0xa, R2 ; /* 0x0000000aff038819 */
/* 0x000fca0000011602 */
/*00e0*/ @!P0 IMAD R3, R3, -0x7ff, R0 ; /* 0xfffff80103038824 */
/* 0x000fca00078e0200 */
/*00f0*/ ISETP.NE.AND P0, PT, R3, RZ, !P0 ; /* 0x000000ff0300720c */
/* 0x000fc80004705270 */
/*0100*/ ISETP.GT.OR P0, PT, R0, 0x3ff800, !P0 ; /* 0x003ff8000000780c */
/* 0x000fda0004704670 */
/*0110*/ @P0 BRA 0xbd0 ; /* 0x00000ab000000947 */
/* 0x000fea0003800000 */
/*0120*/ HFMA2.MMA R3, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff037435 */
/* 0x000fe200000001ff */
/*0130*/ IADD3 R4, R0.reuse, -c[0x0][0x0], RZ ; /* 0x8000000000047a10 */
/* 0x040fe40007ffe0ff */
/*0140*/ IADD3 R6, R0, c[0x0][0x0], RZ ; /* 0x0000000000067a10 */
/* 0x000fe40007ffe0ff */
/*0150*/ MOV R8, RZ ; /* 0x000000ff00087202 */
/* 0x000fca0000000f00 */
/*0160*/ IMAD.WIDE.U32 R4, R4, R3, c[0x0][0x160] ; /* 0x0000580004047625 */
/* 0x000fc800078e0003 */
/*0170*/ IMAD.WIDE.U32 R6, R6, R3, c[0x0][0x160] ; /* 0x0000580006067625 */
/* 0x000fc800078e0003 */
/*0180*/ IMAD.WIDE R2, R0, R3, c[0x0][0x160] ; /* 0x0000580000027625 */
/* 0x000fca00078e0203 */
/*0190*/ LDG.E R10, [R2.64+0x4] ; /* 0x00000404020a7981 */
/* 0x000ea8000c1e1900 */
/*01a0*/ LDG.E R11, [R2.64+-0x4] ; /* 0xfffffc04020b7981 */
/* 0x000ea8000c1e1900 */
/*01b0*/ LDG.E R13, [R4.64] ; /* 0x00000004040d7981 */
/* 0x001ee8000c1e1900 */
/*01c0*/ LDG.E R15, [R6.64] ; /* 0x00000004060f7981 */
/* 0x000f28000c1e1900 */
/*01d0*/ LDG.E R16, [R2.64] ; /* 0x0000000402107981 */
/* 0x000f62000c1e1900 */
/*01e0*/ WARPSYNC 0xffffffff ; /* 0xffffffff00007948 */
/* 0x000fe60003800000 */
/*01f0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0200*/ LDG.E R14, [R2.64] ; /* 0x00000004020e7981 */
/* 0x000f62000c1e1900 */
/*0210*/ FADD R12, R10, R11 ; /* 0x0000000b0a0c7221 */
/* 0x004fc80000000000 */
/*0220*/ FADD R12, R12, R13 ; /* 0x0000000d0c0c7221 */
/* 0x008fc80000000000 */
/*0230*/ FADD R17, R12, R15 ; /* 0x0000000f0c117221 */
/* 0x010fe20000000000 */
/*0240*/ F2F.F64.F32 R10, R16 ; /* 0x00000010000a7310 */
/* 0x020ff00000201800 */
/*0250*/ F2F.F64.F32 R12, R17 ; /* 0x00000011000c7310 */
/* 0x000e240000201800 */
/*0260*/ DFMA R10, R12, -0.25, R10 ; /* 0xbfd000000c0a782b */
/* 0x001e14000000000a */
/*0270*/ F2F.F32.F64 R10, R10 ; /* 0x0000000a000a7310 */
/* 0x001e300000301000 */
/*0280*/ F2F.F64.F32 R14, R14 ; /* 0x0000000e000e7310 */
/* 0x000ff00000201800 */
/*0290*/ F2F.F64.F32 R12, R10 ; /* 0x0000000a000c7310 */
/* 0x001e240000201800 */
/*02a0*/ DFMA R12, R12, c[0x2][0x0], R14 ; /* 0x008000000c0c7a2b */
/* 0x001e14000000000e */
/*02b0*/ F2F.F32.F64 R13, R12 ; /* 0x0000000c000d7310 */
/* 0x001e240000301000 */
/*02c0*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0011e8000c101904 */
/*02d0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*02e0*/ LDG.E R15, [R2.64+0x4] ; /* 0x00000404020f7981 */
/* 0x000ea8000c1e1900 */
/*02f0*/ LDG.E R18, [R2.64+-0x4] ; /* 0xfffffc0402127981 */
/* 0x000ea8000c1e1900 */
/*0300*/ LDG.E R20, [R4.64] ; /* 0x0000000404147981 */
/* 0x000ee8000c1e1900 */
/*0310*/ LDG.E R22, [R6.64] ; /* 0x0000000406167981 */
/* 0x000f28000c1e1900 */
/*0320*/ LDG.E R16, [R2.64] ; /* 0x0000000402107981 */
/* 0x000f68000c1e1900 */
/*0330*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0340*/ LDG.E R14, [R2.64] ; /* 0x00000004020e7981 */
/* 0x000f62000c1e1900 */
/*0350*/ FADD R15, R15, R18 ; /* 0x000000120f0f7221 */
/* 0x004fc80000000000 */
/*0360*/ FADD R15, R15, R20 ; /* 0x000000140f0f7221 */
/* 0x008fc80000000000 */
/*0370*/ FADD R22, R15, R22 ; /* 0x000000160f167221 */
/* 0x010fe20000000000 */
/*0380*/ F2F.F64.F32 R10, R16 ; /* 0x00000010000a7310 */
/* 0x020ff00000201800 */
/*0390*/ F2F.F64.F32 R12, R22 ; /* 0x00000016000c7310 */
/* 0x001e240000201800 */
/*03a0*/ DFMA R10, R12, -0.25, R10 ; /* 0xbfd000000c0a782b */
/* 0x001e14000000000a */
/*03b0*/ F2F.F32.F64 R10, R10 ; /* 0x0000000a000a7310 */
/* 0x001e300000301000 */
/*03c0*/ F2F.F64.F32 R14, R14 ; /* 0x0000000e000e7310 */
/* 0x000ff00000201800 */
/*03d0*/ F2F.F64.F32 R12, R10 ; /* 0x0000000a000c7310 */
/* 0x001e240000201800 */
/*03e0*/ DFMA R12, R12, c[0x2][0x0], R14 ; /* 0x008000000c0c7a2b */
/* 0x001e14000000000e */
/*03f0*/ F2F.F32.F64 R13, R12 ; /* 0x0000000c000d7310 */
/* 0x001e240000301000 */
/*0400*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0011e8000c101904 */
/*0410*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0420*/ LDG.E R15, [R2.64+0x4] ; /* 0x00000404020f7981 */
/* 0x000ea8000c1e1900 */
/*0430*/ LDG.E R18, [R2.64+-0x4] ; /* 0xfffffc0402127981 */
/* 0x000ea8000c1e1900 */
/*0440*/ LDG.E R20, [R4.64] ; /* 0x0000000404147981 */
/* 0x000ee8000c1e1900 */
/*0450*/ LDG.E R22, [R6.64] ; /* 0x0000000406167981 */
/* 0x000f28000c1e1900 */
/*0460*/ LDG.E R16, [R2.64] ; /* 0x0000000402107981 */
/* 0x000f68000c1e1900 */
/*0470*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0480*/ LDG.E R14, [R2.64] ; /* 0x00000004020e7981 */
/* 0x000f62000c1e1900 */
/*0490*/ FADD R15, R15, R18 ; /* 0x000000120f0f7221 */
/* 0x004fc80000000000 */
/*04a0*/ FADD R15, R15, R20 ; /* 0x000000140f0f7221 */
/* 0x008fc80000000000 */
/*04b0*/ FADD R22, R15, R22 ; /* 0x000000160f167221 */
/* 0x010fe20000000000 */
/*04c0*/ F2F.F64.F32 R10, R16 ; /* 0x00000010000a7310 */
/* 0x020ff00000201800 */
/*04d0*/ F2F.F64.F32 R12, R22 ; /* 0x00000016000c7310 */
/* 0x001e240000201800 */
/*04e0*/ DFMA R10, R12, -0.25, R10 ; /* 0xbfd000000c0a782b */
/* 0x001e14000000000a */
/*04f0*/ F2F.F32.F64 R10, R10 ; /* 0x0000000a000a7310 */
/* 0x001e300000301000 */
/*0500*/ F2F.F64.F32 R14, R14 ; /* 0x0000000e000e7310 */
/* 0x000ff00000201800 */
/*0510*/ F2F.F64.F32 R12, R10 ; /* 0x0000000a000c7310 */
/* 0x001e240000201800 */
/*0520*/ DFMA R12, R12, c[0x2][0x0], R14 ; /* 0x008000000c0c7a2b */
/* 0x001e14000000000e */
/*0530*/ F2F.F32.F64 R13, R12 ; /* 0x0000000c000d7310 */
/* 0x001e240000301000 */
/*0540*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0011e8000c101904 */
/*0550*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0560*/ LDG.E R15, [R2.64+0x4] ; /* 0x00000404020f7981 */
/* 0x000ea8000c1e1900 */
/*0570*/ LDG.E R18, [R2.64+-0x4] ; /* 0xfffffc0402127981 */
/* 0x000ea8000c1e1900 */
/*0580*/ LDG.E R20, [R4.64] ; /* 0x0000000404147981 */
/* 0x000ee8000c1e1900 */
/*0590*/ LDG.E R22, [R6.64] ; /* 0x0000000406167981 */
/* 0x000f28000c1e1900 */
/*05a0*/ LDG.E R16, [R2.64] ; /* 0x0000000402107981 */
/* 0x000f68000c1e1900 */
/*05b0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*05c0*/ LDG.E R14, [R2.64] ; /* 0x00000004020e7981 */
/* 0x000f62000c1e1900 */
/*05d0*/ FADD R15, R15, R18 ; /* 0x000000120f0f7221 */
/* 0x004fc80000000000 */
/*05e0*/ FADD R15, R15, R20 ; /* 0x000000140f0f7221 */
/* 0x008fc80000000000 */
/*05f0*/ FADD R22, R15, R22 ; /* 0x000000160f167221 */
/* 0x010fe20000000000 */
/*0600*/ F2F.F64.F32 R10, R16 ; /* 0x00000010000a7310 */
/* 0x020ff00000201800 */
/*0610*/ F2F.F64.F32 R12, R22 ; /* 0x00000016000c7310 */
/* 0x001e240000201800 */
/*0620*/ DFMA R10, R12, -0.25, R10 ; /* 0xbfd000000c0a782b */
/* 0x001e14000000000a */
/*0630*/ F2F.F32.F64 R10, R10 ; /* 0x0000000a000a7310 */
/* 0x001e300000301000 */
/*0640*/ F2F.F64.F32 R14, R14 ; /* 0x0000000e000e7310 */
/* 0x000ff00000201800 */
/*0650*/ F2F.F64.F32 R12, R10 ; /* 0x0000000a000c7310 */
/* 0x001e240000201800 */
/*0660*/ DFMA R12, R12, c[0x2][0x0], R14 ; /* 0x008000000c0c7a2b */
/* 0x001e14000000000e */
/*0670*/ F2F.F32.F64 R13, R12 ; /* 0x0000000c000d7310 */
/* 0x001e240000301000 */
/*0680*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0011e8000c101904 */
/*0690*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*06a0*/ LDG.E R15, [R2.64+0x4] ; /* 0x00000404020f7981 */
/* 0x000ea8000c1e1900 */
/*06b0*/ LDG.E R18, [R2.64+-0x4] ; /* 0xfffffc0402127981 */
/* 0x000ea8000c1e1900 */
/*06c0*/ LDG.E R20, [R4.64] ; /* 0x0000000404147981 */
/* 0x000ee8000c1e1900 */
/*06d0*/ LDG.E R22, [R6.64] ; /* 0x0000000406167981 */
/* 0x000f28000c1e1900 */
/*06e0*/ LDG.E R16, [R2.64] ; /* 0x0000000402107981 */
/* 0x000f68000c1e1900 */
/*06f0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0700*/ LDG.E R14, [R2.64] ; /* 0x00000004020e7981 */
/* 0x000f62000c1e1900 */
/*0710*/ FADD R15, R15, R18 ; /* 0x000000120f0f7221 */
/* 0x004fc80000000000 */
/*0720*/ FADD R15, R15, R20 ; /* 0x000000140f0f7221 */
/* 0x008fc80000000000 */
/*0730*/ FADD R22, R15, R22 ; /* 0x000000160f167221 */
/* 0x010fe20000000000 */
/*0740*/ F2F.F64.F32 R10, R16 ; /* 0x00000010000a7310 */
/* 0x020ff00000201800 */
/*0750*/ F2F.F64.F32 R12, R22 ; /* 0x00000016000c7310 */
/* 0x001e240000201800 */
/*0760*/ DFMA R10, R12, -0.25, R10 ; /* 0xbfd000000c0a782b */
/* 0x001e14000000000a */
/*0770*/ F2F.F32.F64 R10, R10 ; /* 0x0000000a000a7310 */
/* 0x001e300000301000 */
/*0780*/ F2F.F64.F32 R14, R14 ; /* 0x0000000e000e7310 */
/* 0x000ff00000201800 */
/*0790*/ F2F.F64.F32 R12, R10 ; /* 0x0000000a000c7310 */
/* 0x001e240000201800 */
/*07a0*/ DFMA R12, R12, c[0x2][0x0], R14 ; /* 0x008000000c0c7a2b */
/* 0x001e14000000000e */
/*07b0*/ F2F.F32.F64 R13, R12 ; /* 0x0000000c000d7310 */
/* 0x001e240000301000 */
/*07c0*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0011e8000c101904 */
/*07d0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*07e0*/ LDG.E R15, [R2.64+0x4] ; /* 0x00000404020f7981 */
/* 0x000ea8000c1e1900 */
/*07f0*/ LDG.E R18, [R2.64+-0x4] ; /* 0xfffffc0402127981 */
/* 0x000ea8000c1e1900 */
/*0800*/ LDG.E R20, [R4.64] ; /* 0x0000000404147981 */
/* 0x000ee8000c1e1900 */
/*0810*/ LDG.E R22, [R6.64] ; /* 0x0000000406167981 */
/* 0x000f28000c1e1900 */
/*0820*/ LDG.E R16, [R2.64] ; /* 0x0000000402107981 */
/* 0x000f68000c1e1900 */
/*0830*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0840*/ LDG.E R14, [R2.64] ; /* 0x00000004020e7981 */
/* 0x000f62000c1e1900 */
/*0850*/ FADD R15, R15, R18 ; /* 0x000000120f0f7221 */
/* 0x004fc80000000000 */
/*0860*/ FADD R15, R15, R20 ; /* 0x000000140f0f7221 */
/* 0x008fc80000000000 */
/*0870*/ FADD R22, R15, R22 ; /* 0x000000160f167221 */
/* 0x010fe20000000000 */
/*0880*/ F2F.F64.F32 R10, R16 ; /* 0x00000010000a7310 */
/* 0x020ff00000201800 */
/*0890*/ F2F.F64.F32 R12, R22 ; /* 0x00000016000c7310 */
/* 0x001e240000201800 */
/*08a0*/ DFMA R10, R12, -0.25, R10 ; /* 0xbfd000000c0a782b */
/* 0x001e14000000000a */
/*08b0*/ F2F.F32.F64 R10, R10 ; /* 0x0000000a000a7310 */
/* 0x001e300000301000 */
/*08c0*/ F2F.F64.F32 R14, R14 ; /* 0x0000000e000e7310 */
/* 0x000ff00000201800 */
/*08d0*/ F2F.F64.F32 R12, R10 ; /* 0x0000000a000c7310 */
/* 0x001e240000201800 */
/*08e0*/ DFMA R12, R12, c[0x2][0x0], R14 ; /* 0x008000000c0c7a2b */
/* 0x001e14000000000e */
/*08f0*/ F2F.F32.F64 R13, R12 ; /* 0x0000000c000d7310 */
/* 0x001e240000301000 */
/*0900*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0011e8000c101904 */
/*0910*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0920*/ LDG.E R15, [R2.64+0x4] ; /* 0x00000404020f7981 */
/* 0x000ea8000c1e1900 */
/*0930*/ LDG.E R18, [R2.64+-0x4] ; /* 0xfffffc0402127981 */
/* 0x000ea8000c1e1900 */
/*0940*/ LDG.E R20, [R4.64] ; /* 0x0000000404147981 */
/* 0x000ee8000c1e1900 */
/*0950*/ LDG.E R22, [R6.64] ; /* 0x0000000406167981 */
/* 0x000f28000c1e1900 */
/*0960*/ LDG.E R16, [R2.64] ; /* 0x0000000402107981 */
/* 0x000f68000c1e1900 */
/*0970*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0980*/ LDG.E R14, [R2.64] ; /* 0x00000004020e7981 */
/* 0x000f62000c1e1900 */
/*0990*/ FADD R15, R15, R18 ; /* 0x000000120f0f7221 */
/* 0x004fc80000000000 */
/*09a0*/ FADD R15, R15, R20 ; /* 0x000000140f0f7221 */
/* 0x008fc80000000000 */
/*09b0*/ FADD R22, R15, R22 ; /* 0x000000160f167221 */
/* 0x010fe20000000000 */
/*09c0*/ F2F.F64.F32 R10, R16 ; /* 0x00000010000a7310 */
/* 0x020ff00000201800 */
/*09d0*/ F2F.F64.F32 R12, R22 ; /* 0x00000016000c7310 */
/* 0x001e240000201800 */
/*09e0*/ DFMA R10, R12, -0.25, R10 ; /* 0xbfd000000c0a782b */
/* 0x001e14000000000a */
/*09f0*/ F2F.F32.F64 R10, R10 ; /* 0x0000000a000a7310 */
/* 0x001e300000301000 */
/*0a00*/ F2F.F64.F32 R14, R14 ; /* 0x0000000e000e7310 */
/* 0x000ff00000201800 */
/*0a10*/ F2F.F64.F32 R12, R10 ; /* 0x0000000a000c7310 */
/* 0x001e240000201800 */
/*0a20*/ DFMA R12, R12, c[0x2][0x0], R14 ; /* 0x008000000c0c7a2b */
/* 0x001e14000000000e */
/*0a30*/ F2F.F32.F64 R13, R12 ; /* 0x0000000c000d7310 */
/* 0x001e240000301000 */
/*0a40*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0011e8000c101904 */
/*0a50*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0a60*/ LDG.E R15, [R2.64+0x4] ; /* 0x00000404020f7981 */
/* 0x000ea8000c1e1900 */
/*0a70*/ LDG.E R18, [R2.64+-0x4] ; /* 0xfffffc0402127981 */
/* 0x000ea8000c1e1900 */
/*0a80*/ LDG.E R20, [R4.64] ; /* 0x0000000404147981 */
/* 0x000ee8000c1e1900 */
/*0a90*/ LDG.E R22, [R6.64] ; /* 0x0000000406167981 */
/* 0x000f28000c1e1900 */
/*0aa0*/ LDG.E R16, [R2.64] ; /* 0x0000000402107981 */
/* 0x000f68000c1e1900 */
/*0ab0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0ac0*/ LDG.E R14, [R2.64] ; /* 0x00000004020e7981 */
/* 0x000f62000c1e1900 */
/*0ad0*/ IADD3 R8, R8, 0x8, RZ ; /* 0x0000000808087810 */
/* 0x000fc80007ffe0ff */
/*0ae0*/ ISETP.NE.AND P0, PT, R8, 0x7d0, PT ; /* 0x000007d00800780c */
/* 0x000fe20003f05270 */
/*0af0*/ FADD R15, R15, R18 ; /* 0x000000120f0f7221 */
/* 0x004fc80000000000 */
/*0b00*/ FADD R15, R15, R20 ; /* 0x000000140f0f7221 */
/* 0x008fc80000000000 */
/*0b10*/ FADD R22, R15, R22 ; /* 0x000000160f167221 */
/* 0x010fe20000000000 */
/*0b20*/ F2F.F64.F32 R10, R16 ; /* 0x00000010000a7310 */
/* 0x020ff00000201800 */
/*0b30*/ F2F.F64.F32 R12, R22 ; /* 0x00000016000c7310 */
/* 0x001e240000201800 */
/*0b40*/ DFMA R10, R12, -0.25, R10 ; /* 0xbfd000000c0a782b */
/* 0x001e14000000000a */
/*0b50*/ F2F.F32.F64 R10, R10 ; /* 0x0000000a000a7310 */
/* 0x001e300000301000 */
/*0b60*/ F2F.F64.F32 R14, R14 ; /* 0x0000000e000e7310 */
/* 0x000ff00000201800 */
/*0b70*/ F2F.F64.F32 R12, R10 ; /* 0x0000000a000c7310 */
/* 0x001e240000201800 */
/*0b80*/ DFMA R12, R12, c[0x2][0x0], R14 ; /* 0x008000000c0c7a2b */
/* 0x001e14000000000e */
/*0b90*/ F2F.F32.F64 R13, R12 ; /* 0x0000000c000d7310 */
/* 0x001e240000301000 */
/*0ba0*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0011e8000c101904 */
/*0bb0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0bc0*/ @P0 BRA 0x190 ; /* 0xfffff5c000000947 */
/* 0x000fea000383ffff */
/*0bd0*/ IMAD R0, R9, c[0x0][0x4], R0 ; /* 0x0000010009007a24 */
/* 0x000fca00078e0200 */
/*0be0*/ ISETP.GE.AND P0, PT, R0, 0x400000, PT ; /* 0x004000000000780c */
/* 0x000fda0003f06270 */
/*0bf0*/ @!P0 BRA 0x70 ; /* 0xfffff47000008947 */
/* 0x000fea000383ffff */
/*0c00*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0c10*/ BRA 0xc10; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0c20*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c30*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c40*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c50*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c60*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c70*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c80*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c90*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ca0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0cb0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0cc0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0cd0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ce0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0cf0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <cstdlib>
#include <math.h>
#include <time.h>
#include <cstdio>
// Assertion to check for errors
#define CUDA_SAFE_CALL(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(cudaError_t code, char *file, int line, bool abort=true)
{
if (code != cudaSuccess)
{
fprintf(stderr,"CUDA_SAFE_CALL: %s %s %d\n", cudaGetErrorString(code), file, line);
if (abort) exit(code);
}
}
#define GIG 1000000000
#define CPG 3.07
#define PRINT_TIME 1
#define SM_ARR_LEN 2048*2048
#define OMEGA 1.98
void initializeArray1D(float *arr, int len, int seed);
__global__ void SOR_add (float* x)
{
int row_start = threadIdx.x;
int col_start = threadIdx.y;
int i;
float result = 0;
int offset = (col_start * 2048) + row_start;
while(offset<SM_ARR_LEN)
{ if((offset > 2047) && (offset%2048) && (offset%2047) && (offset < SM_ARR_LEN-2047))
{
for(i=0; i<2000; i++)
{
result = x[offset] - 0.25*(x[offset-1] + x[offset+1] + x[offset - blockDim.x] + x[offset + blockDim.x]);
__syncthreads();
x[offset] -= result*OMEGA;
__syncthreads();
}
}
offset += blockDim.x*blockDim.y;
}
}
int main(int argc, char **argv){
int arrLen = 0;
struct timespec diff(struct timespec start, struct timespec end);
struct timespec time1, time2;
struct timespec time_stamp;
// GPU Timing variables
cudaEvent_t start, stop;
float elapsed_gpu;
// Arrays on GPU global memory
float *d_x;
// Arrays on the host memory
float *h_x;
int i, errCount = 0, zeroCount = 0;
if (argc > 1) {
arrLen = atoi(argv[1]);
}
else {
arrLen = SM_ARR_LEN;
}
printf("Length of the array = %d\n", arrLen);
// Select GPU
CUDA_SAFE_CALL(cudaSetDevice(1));
// Allocate GPU memory
size_t allocSize = arrLen * sizeof(float); printf("\ncp1");
CUDA_SAFE_CALL(cudaMalloc((void **)&d_x, allocSize)); printf("\ncp2");
// Allocate arrays on host memory
h_x = (float *) malloc(allocSize); printf("\ncp4");
// Initialize the host arrays
printf("\nInitializing the arrays ...");
// Arrays are initialized with a known seed for reproducability
initializeArray1D(h_x, arrLen, 2453);
//initializeArray1D(h_y, arrLen, 1467);
printf("\t... done\n\n");
#if PRINT_TIME
// Create the cuda events
cudaEventCreate(&start);
cudaEventCreate(&stop);
// Record event on the default stream
cudaEventRecord(start, 0);
#endif
// Transfer the arrays to the GPU memory
CUDA_SAFE_CALL(cudaMemcpy(d_x, h_x, allocSize, cudaMemcpyHostToDevice));
dim3 dimBlock(16,16);
// Launch the kernel
SOR_add<<<1,dimBlock>>>(d_x);
// Check for errors during launch
CUDA_SAFE_CALL(cudaPeekAtLastError());
// Transfer the results back to the host
CUDA_SAFE_CALL(cudaMemcpy(h_x, d_x, allocSize, cudaMemcpyDeviceToHost));
#if PRINT_TIME
// Stop and destroy the timer
cudaEventRecord(stop,0);
cudaEventSynchronize(stop);
cudaEventElapsedTime(&elapsed_gpu, start, stop);
printf("\nGPU time: %f (msec)\n", elapsed_gpu);
cudaEventDestroy(start);
cudaEventDestroy(stop);
#endif
long int length = 2048;
int j,k;
float change;
// Compute the results on the host
printf("\ncalculating results on host\n");
clock_gettime(CLOCK_REALTIME, &time1);
for(k=0;k<2000;k++)
{
for (i = 1; i < length-1; i++){
for (j = 1; j < length-1; j++) {
change = h_x[i*length+j] - .25 * (h_x[(i-1)*length+j] +
h_x[(i+1)*length+j] +
h_x[i*length+j+1] +
h_x[i*length+j-1]);
h_x[i*length+j] -= change * OMEGA;
}
}
}
clock_gettime(CLOCK_REALTIME, &time2);
time_stamp = diff(time1,time2);
printf("%lf\n", ((double) (GIG * time_stamp.tv_sec + time_stamp.tv_nsec)/1000000));
// Free-up device and host memory
CUDA_SAFE_CALL(cudaFree(d_x));
//CUDA_SAFE_CALL(cudaFree(d_y));
free(h_x);
//free(h_y);
return 0;
}
void initializeArray1D(float *arr, int len, int seed) {
int i;
float randNum;
srand(seed);
for (i = 0; i < len; i++) {
randNum = (float) rand();
arr[i] = randNum;
}
}
struct timespec diff(struct timespec start, struct timespec end)
{
struct timespec temp;
if ((end.tv_nsec-start.tv_nsec)<0) {
temp.tv_sec = end.tv_sec-start.tv_sec-1;
temp.tv_nsec = 1000000000+end.tv_nsec-start.tv_nsec;
} else {
temp.tv_sec = end.tv_sec-start.tv_sec;
temp.tv_nsec = end.tv_nsec-start.tv_nsec;
}
return temp;
} | .file "tmpxft_00012165_00000000-6_cuda_SOR.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2063:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2063:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata._Z9gpuAssert9cudaErrorPcib.str1.1,"aMS",@progbits,1
.LC0:
.string "CUDA_SAFE_CALL: %s %s %d\n"
.section .text._Z9gpuAssert9cudaErrorPcib,"axG",@progbits,_Z9gpuAssert9cudaErrorPcib,comdat
.weak _Z9gpuAssert9cudaErrorPcib
.type _Z9gpuAssert9cudaErrorPcib, @function
_Z9gpuAssert9cudaErrorPcib:
.LFB2057:
.cfi_startproc
endbr64
testl %edi, %edi
jne .L9
ret
.L9:
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $8, %rsp
.cfi_def_cfa_offset 48
movl %edi, %ebx
movq %rsi, %r13
movl %edx, %r12d
movl %ecx, %ebp
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %r12d, %r9d
movq %r13, %r8
leaq .LC0(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
testb %bpl, %bpl
jne .L10
addq $8, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L10:
.cfi_restore_state
movl %ebx, %edi
call exit@PLT
.cfi_endproc
.LFE2057:
.size _Z9gpuAssert9cudaErrorPcib, .-_Z9gpuAssert9cudaErrorPcib
.text
.globl _Z17initializeArray1DPfii
.type _Z17initializeArray1DPfii, @function
_Z17initializeArray1DPfii:
.LFB2059:
.cfi_startproc
endbr64
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
movq %rdi, %r12
movl %esi, %ebp
movl %edx, %edi
call srand@PLT
testl %ebp, %ebp
jle .L11
movq %r12, %rbx
movslq %ebp, %rbp
leaq (%r12,%rbp,4), %rbp
.L13:
call rand@PLT
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
movss %xmm0, (%rbx)
addq $4, %rbx
cmpq %rbp, %rbx
jne .L13
.L11:
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2059:
.size _Z17initializeArray1DPfii, .-_Z17initializeArray1DPfii
.globl _Z4diff8timespecS_
.type _Z4diff8timespecS_, @function
_Z4diff8timespecS_:
.LFB2060:
.cfi_startproc
endbr64
movq %rdx, %rax
subq %rdi, %rax
movq %rcx, %r8
subq %rsi, %r8
js .L19
.L18:
movq %r8, %rdx
ret
.L19:
leaq -1(%rax), %rax
leaq 1000000000(%rcx), %r8
subq %rsi, %r8
jmp .L18
.cfi_endproc
.LFE2060:
.size _Z4diff8timespecS_, .-_Z4diff8timespecS_
.globl _Z26__device_stub__Z7SOR_addPfPf
.type _Z26__device_stub__Z7SOR_addPfPf, @function
_Z26__device_stub__Z7SOR_addPfPf:
.LFB2085:
.cfi_startproc
endbr64
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 8(%rsp)
movq %fs:40, %rax
movq %rax, 88(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L24
.L20:
movq 88(%rsp), %rax
subq %fs:40, %rax
jne .L25
addq $104, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L24:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 120
pushq 24(%rsp)
.cfi_def_cfa_offset 128
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z7SOR_addPf(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 112
jmp .L20
.L25:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2085:
.size _Z26__device_stub__Z7SOR_addPfPf, .-_Z26__device_stub__Z7SOR_addPfPf
.globl _Z7SOR_addPf
.type _Z7SOR_addPf, @function
_Z7SOR_addPf:
.LFB2086:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z26__device_stub__Z7SOR_addPfPf
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2086:
.size _Z7SOR_addPf, .-_Z7SOR_addPf
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "Length of the array = %d\n"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC2:
.string "/home/ubuntu/Datasets/stackv2/train-structured/bswain12/EC527---High-Performance-Programming-with-Multicores-and-GPUs/master/Gaur_Abhishek_Lab7/cuda_SOR.cu"
.section .rodata.str1.1
.LC3:
.string "\ncp1"
.LC4:
.string "\ncp2"
.LC5:
.string "\ncp4"
.LC6:
.string "\nInitializing the arrays ..."
.LC7:
.string "\t... done\n\n"
.LC8:
.string "\nGPU time: %f (msec)\n"
.LC9:
.string "\ncalculating results on host\n"
.LC13:
.string "%lf\n"
.text
.globl main
.type main, @function
main:
.LFB2058:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $104, %rsp
.cfi_def_cfa_offset 144
movq %fs:40, %rdx
movq %rdx, 88(%rsp)
xorl %edx, %edx
movl $4194304, %r12d
cmpl $1, %edi
jg .L40
.L29:
movl %r12d, %edx
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call cudaSetDevice@PLT
movl %eax, %edi
movl $1, %ecx
movl $84, %edx
leaq .LC2(%rip), %r13
movq %r13, %rsi
call _Z9gpuAssert9cudaErrorPcib
movslq %r12d, %rbp
salq $2, %rbp
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq 24(%rsp), %rdi
movq %rbp, %rsi
call cudaMalloc@PLT
movl %eax, %edi
movl $1, %ecx
movl $88, %edx
movq %r13, %rsi
call _Z9gpuAssert9cudaErrorPcib
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %rbp, %rdi
call malloc@PLT
movq %rax, %rbx
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC6(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $2453, %edx
movl %r12d, %esi
movq %rbx, %rdi
call _Z17initializeArray1DPfii
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq 8(%rsp), %rdi
call cudaEventCreate@PLT
leaq 16(%rsp), %rdi
call cudaEventCreate@PLT
movl $0, %esi
movq 8(%rsp), %rdi
call cudaEventRecord@PLT
movl $1, %ecx
movq %rbp, %rdx
movq %rbx, %rsi
movq 24(%rsp), %rdi
call cudaMemcpy@PLT
movl %eax, %edi
movl $1, %ecx
movl $112, %edx
movq %r13, %rsi
call _Z9gpuAssert9cudaErrorPcib
movl $16, 36(%rsp)
movl $16, 40(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 36(%rsp), %rdx
movl $1, %ecx
movq 64(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L41
.L30:
call cudaPeekAtLastError@PLT
movl %eax, %edi
movl $1, %ecx
movl $118, %edx
leaq .LC2(%rip), %r12
movq %r12, %rsi
call _Z9gpuAssert9cudaErrorPcib
movl $2, %ecx
movq %rbp, %rdx
movq 24(%rsp), %rsi
movq %rbx, %rdi
call cudaMemcpy@PLT
movl %eax, %edi
movl $1, %ecx
movl $121, %edx
movq %r12, %rsi
call _Z9gpuAssert9cudaErrorPcib
movl $0, %esi
movq 16(%rsp), %rdi
call cudaEventRecord@PLT
movq 16(%rsp), %rdi
call cudaEventSynchronize@PLT
leaq 4(%rsp), %rdi
movq 16(%rsp), %rdx
movq 8(%rsp), %rsi
call cudaEventElapsedTime@PLT
pxor %xmm0, %xmm0
cvtss2sd 4(%rsp), %xmm0
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq 8(%rsp), %rdi
call cudaEventDestroy@PLT
movq 16(%rsp), %rdi
call cudaEventDestroy@PLT
leaq .LC9(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq 48(%rsp), %rsi
movl $0, %edi
call clock_gettime@PLT
movl $2000, %esi
movsd .LC10(%rip), %xmm4
movsd .LC11(%rip), %xmm3
jmp .L31
.L40:
movq 8(%rsi), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movl %eax, %r12d
jmp .L29
.L41:
movq 24(%rsp), %rdi
call _Z26__device_stub__Z7SOR_addPfPf
jmp .L30
.L42:
addq $8192, %rdx
cmpq $4192256, %rcx
je .L33
.L35:
addq $2048, %rcx
leaq -8184(%rdx), %rax
.L32:
pxor %xmm2, %xmm2
cvtss2sd 4(%rax), %xmm2
movss -8188(%rax), %xmm0
addss 8196(%rax), %xmm0
addss 8(%rax), %xmm0
addss (%rax), %xmm0
cvtss2sd %xmm0, %xmm0
mulsd %xmm4, %xmm0
movapd %xmm2, %xmm1
subsd %xmm0, %xmm1
pxor %xmm0, %xmm0
cvtsd2ss %xmm1, %xmm0
cvtss2sd %xmm0, %xmm0
mulsd %xmm3, %xmm0
subsd %xmm0, %xmm2
cvtsd2ss %xmm2, %xmm2
movss %xmm2, 4(%rax)
addq $4, %rax
cmpq %rdx, %rax
jne .L32
jmp .L42
.L33:
subl $1, %esi
je .L34
.L31:
leaq 16376(%rbx), %rdx
movl $2048, %ecx
jmp .L35
.L34:
leaq 64(%rsp), %rsi
movl $0, %edi
call clock_gettime@PLT
movq 64(%rsp), %rdx
movq 72(%rsp), %rcx
movq 48(%rsp), %rdi
movq 56(%rsp), %rsi
call _Z4diff8timespecS_
imulq $1000000000, %rax, %rax
addq %rdx, %rax
pxor %xmm0, %xmm0
cvtsi2sdq %rax, %xmm0
divsd .LC12(%rip), %xmm0
leaq .LC13(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq 24(%rsp), %rdi
call cudaFree@PLT
movl %eax, %edi
movl $1, %ecx
movl $159, %edx
leaq .LC2(%rip), %rsi
call _Z9gpuAssert9cudaErrorPcib
movq %rbx, %rdi
call free@PLT
movq 88(%rsp), %rax
subq %fs:40, %rax
jne .L43
movl $0, %eax
addq $104, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L43:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2058:
.size main, .-main
.section .rodata.str1.1
.LC14:
.string "_Z7SOR_addPf"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2088:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC14(%rip), %rdx
movq %rdx, %rcx
leaq _Z7SOR_addPf(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2088:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC10:
.long 0
.long 1070596096
.align 8
.LC11:
.long 2061584302
.long 1073720852
.align 8
.LC12:
.long 0
.long 1093567616
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <cstdlib>
#include <math.h>
#include <time.h>
#include <cstdio>
// Assertion to check for errors
#define CUDA_SAFE_CALL(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(cudaError_t code, char *file, int line, bool abort=true)
{
if (code != cudaSuccess)
{
fprintf(stderr,"CUDA_SAFE_CALL: %s %s %d\n", cudaGetErrorString(code), file, line);
if (abort) exit(code);
}
}
#define GIG 1000000000
#define CPG 3.07
#define PRINT_TIME 1
#define SM_ARR_LEN 2048*2048
#define OMEGA 1.98
void initializeArray1D(float *arr, int len, int seed);
__global__ void SOR_add (float* x)
{
int row_start = threadIdx.x;
int col_start = threadIdx.y;
int i;
float result = 0;
int offset = (col_start * 2048) + row_start;
while(offset<SM_ARR_LEN)
{ if((offset > 2047) && (offset%2048) && (offset%2047) && (offset < SM_ARR_LEN-2047))
{
for(i=0; i<2000; i++)
{
result = x[offset] - 0.25*(x[offset-1] + x[offset+1] + x[offset - blockDim.x] + x[offset + blockDim.x]);
__syncthreads();
x[offset] -= result*OMEGA;
__syncthreads();
}
}
offset += blockDim.x*blockDim.y;
}
}
int main(int argc, char **argv){
int arrLen = 0;
struct timespec diff(struct timespec start, struct timespec end);
struct timespec time1, time2;
struct timespec time_stamp;
// GPU Timing variables
cudaEvent_t start, stop;
float elapsed_gpu;
// Arrays on GPU global memory
float *d_x;
// Arrays on the host memory
float *h_x;
int i, errCount = 0, zeroCount = 0;
if (argc > 1) {
arrLen = atoi(argv[1]);
}
else {
arrLen = SM_ARR_LEN;
}
printf("Length of the array = %d\n", arrLen);
// Select GPU
CUDA_SAFE_CALL(cudaSetDevice(1));
// Allocate GPU memory
size_t allocSize = arrLen * sizeof(float); printf("\ncp1");
CUDA_SAFE_CALL(cudaMalloc((void **)&d_x, allocSize)); printf("\ncp2");
// Allocate arrays on host memory
h_x = (float *) malloc(allocSize); printf("\ncp4");
// Initialize the host arrays
printf("\nInitializing the arrays ...");
// Arrays are initialized with a known seed for reproducability
initializeArray1D(h_x, arrLen, 2453);
//initializeArray1D(h_y, arrLen, 1467);
printf("\t... done\n\n");
#if PRINT_TIME
// Create the cuda events
cudaEventCreate(&start);
cudaEventCreate(&stop);
// Record event on the default stream
cudaEventRecord(start, 0);
#endif
// Transfer the arrays to the GPU memory
CUDA_SAFE_CALL(cudaMemcpy(d_x, h_x, allocSize, cudaMemcpyHostToDevice));
dim3 dimBlock(16,16);
// Launch the kernel
SOR_add<<<1,dimBlock>>>(d_x);
// Check for errors during launch
CUDA_SAFE_CALL(cudaPeekAtLastError());
// Transfer the results back to the host
CUDA_SAFE_CALL(cudaMemcpy(h_x, d_x, allocSize, cudaMemcpyDeviceToHost));
#if PRINT_TIME
// Stop and destroy the timer
cudaEventRecord(stop,0);
cudaEventSynchronize(stop);
cudaEventElapsedTime(&elapsed_gpu, start, stop);
printf("\nGPU time: %f (msec)\n", elapsed_gpu);
cudaEventDestroy(start);
cudaEventDestroy(stop);
#endif
long int length = 2048;
int j,k;
float change;
// Compute the results on the host
printf("\ncalculating results on host\n");
clock_gettime(CLOCK_REALTIME, &time1);
for(k=0;k<2000;k++)
{
for (i = 1; i < length-1; i++){
for (j = 1; j < length-1; j++) {
change = h_x[i*length+j] - .25 * (h_x[(i-1)*length+j] +
h_x[(i+1)*length+j] +
h_x[i*length+j+1] +
h_x[i*length+j-1]);
h_x[i*length+j] -= change * OMEGA;
}
}
}
clock_gettime(CLOCK_REALTIME, &time2);
time_stamp = diff(time1,time2);
printf("%lf\n", ((double) (GIG * time_stamp.tv_sec + time_stamp.tv_nsec)/1000000));
// Free-up device and host memory
CUDA_SAFE_CALL(cudaFree(d_x));
//CUDA_SAFE_CALL(cudaFree(d_y));
free(h_x);
//free(h_y);
return 0;
}
void initializeArray1D(float *arr, int len, int seed) {
int i;
float randNum;
srand(seed);
for (i = 0; i < len; i++) {
randNum = (float) rand();
arr[i] = randNum;
}
}
struct timespec diff(struct timespec start, struct timespec end)
{
struct timespec temp;
if ((end.tv_nsec-start.tv_nsec)<0) {
temp.tv_sec = end.tv_sec-start.tv_sec-1;
temp.tv_nsec = 1000000000+end.tv_nsec-start.tv_nsec;
} else {
temp.tv_sec = end.tv_sec-start.tv_sec;
temp.tv_nsec = end.tv_nsec-start.tv_nsec;
}
return temp;
} | #include <hip/hip_runtime.h>
#include <cstdlib>
#include <math.h>
#include <time.h>
#include <cstdio>
// Assertion to check for errors
#define CUDA_SAFE_CALL(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(hipError_t code, char *file, int line, bool abort=true)
{
if (code != hipSuccess)
{
fprintf(stderr,"CUDA_SAFE_CALL: %s %s %d\n", hipGetErrorString(code), file, line);
if (abort) exit(code);
}
}
#define GIG 1000000000
#define CPG 3.07
#define PRINT_TIME 1
#define SM_ARR_LEN 2048*2048
#define OMEGA 1.98
void initializeArray1D(float *arr, int len, int seed);
__global__ void SOR_add (float* x)
{
int row_start = threadIdx.x;
int col_start = threadIdx.y;
int i;
float result = 0;
int offset = (col_start * 2048) + row_start;
while(offset<SM_ARR_LEN)
{ if((offset > 2047) && (offset%2048) && (offset%2047) && (offset < SM_ARR_LEN-2047))
{
for(i=0; i<2000; i++)
{
result = x[offset] - 0.25*(x[offset-1] + x[offset+1] + x[offset - blockDim.x] + x[offset + blockDim.x]);
__syncthreads();
x[offset] -= result*OMEGA;
__syncthreads();
}
}
offset += blockDim.x*blockDim.y;
}
}
int main(int argc, char **argv){
int arrLen = 0;
struct timespec diff(struct timespec start, struct timespec end);
struct timespec time1, time2;
struct timespec time_stamp;
// GPU Timing variables
hipEvent_t start, stop;
float elapsed_gpu;
// Arrays on GPU global memory
float *d_x;
// Arrays on the host memory
float *h_x;
int i, errCount = 0, zeroCount = 0;
if (argc > 1) {
arrLen = atoi(argv[1]);
}
else {
arrLen = SM_ARR_LEN;
}
printf("Length of the array = %d\n", arrLen);
// Select GPU
CUDA_SAFE_CALL(hipSetDevice(1));
// Allocate GPU memory
size_t allocSize = arrLen * sizeof(float); printf("\ncp1");
CUDA_SAFE_CALL(hipMalloc((void **)&d_x, allocSize)); printf("\ncp2");
// Allocate arrays on host memory
h_x = (float *) malloc(allocSize); printf("\ncp4");
// Initialize the host arrays
printf("\nInitializing the arrays ...");
// Arrays are initialized with a known seed for reproducability
initializeArray1D(h_x, arrLen, 2453);
//initializeArray1D(h_y, arrLen, 1467);
printf("\t... done\n\n");
#if PRINT_TIME
// Create the cuda events
hipEventCreate(&start);
hipEventCreate(&stop);
// Record event on the default stream
hipEventRecord(start, 0);
#endif
// Transfer the arrays to the GPU memory
CUDA_SAFE_CALL(hipMemcpy(d_x, h_x, allocSize, hipMemcpyHostToDevice));
dim3 dimBlock(16,16);
// Launch the kernel
SOR_add<<<1,dimBlock>>>(d_x);
// Check for errors during launch
CUDA_SAFE_CALL(hipPeekAtLastError());
// Transfer the results back to the host
CUDA_SAFE_CALL(hipMemcpy(h_x, d_x, allocSize, hipMemcpyDeviceToHost));
#if PRINT_TIME
// Stop and destroy the timer
hipEventRecord(stop,0);
hipEventSynchronize(stop);
hipEventElapsedTime(&elapsed_gpu, start, stop);
printf("\nGPU time: %f (msec)\n", elapsed_gpu);
hipEventDestroy(start);
hipEventDestroy(stop);
#endif
long int length = 2048;
int j,k;
float change;
// Compute the results on the host
printf("\ncalculating results on host\n");
clock_gettime(CLOCK_REALTIME, &time1);
for(k=0;k<2000;k++)
{
for (i = 1; i < length-1; i++){
for (j = 1; j < length-1; j++) {
change = h_x[i*length+j] - .25 * (h_x[(i-1)*length+j] +
h_x[(i+1)*length+j] +
h_x[i*length+j+1] +
h_x[i*length+j-1]);
h_x[i*length+j] -= change * OMEGA;
}
}
}
clock_gettime(CLOCK_REALTIME, &time2);
time_stamp = diff(time1,time2);
printf("%lf\n", ((double) (GIG * time_stamp.tv_sec + time_stamp.tv_nsec)/1000000));
// Free-up device and host memory
CUDA_SAFE_CALL(hipFree(d_x));
//CUDA_SAFE_CALL(cudaFree(d_y));
free(h_x);
//free(h_y);
return 0;
}
void initializeArray1D(float *arr, int len, int seed) {
int i;
float randNum;
srand(seed);
for (i = 0; i < len; i++) {
randNum = (float) rand();
arr[i] = randNum;
}
}
struct timespec diff(struct timespec start, struct timespec end)
{
struct timespec temp;
if ((end.tv_nsec-start.tv_nsec)<0) {
temp.tv_sec = end.tv_sec-start.tv_sec-1;
temp.tv_nsec = 1000000000+end.tv_nsec-start.tv_nsec;
} else {
temp.tv_sec = end.tv_sec-start.tv_sec;
temp.tv_nsec = end.tv_nsec-start.tv_nsec;
}
return temp;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <cstdlib>
#include <math.h>
#include <time.h>
#include <cstdio>
// Assertion to check for errors
#define CUDA_SAFE_CALL(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(hipError_t code, char *file, int line, bool abort=true)
{
if (code != hipSuccess)
{
fprintf(stderr,"CUDA_SAFE_CALL: %s %s %d\n", hipGetErrorString(code), file, line);
if (abort) exit(code);
}
}
#define GIG 1000000000
#define CPG 3.07
#define PRINT_TIME 1
#define SM_ARR_LEN 2048*2048
#define OMEGA 1.98
void initializeArray1D(float *arr, int len, int seed);
__global__ void SOR_add (float* x)
{
int row_start = threadIdx.x;
int col_start = threadIdx.y;
int i;
float result = 0;
int offset = (col_start * 2048) + row_start;
while(offset<SM_ARR_LEN)
{ if((offset > 2047) && (offset%2048) && (offset%2047) && (offset < SM_ARR_LEN-2047))
{
for(i=0; i<2000; i++)
{
result = x[offset] - 0.25*(x[offset-1] + x[offset+1] + x[offset - blockDim.x] + x[offset + blockDim.x]);
__syncthreads();
x[offset] -= result*OMEGA;
__syncthreads();
}
}
offset += blockDim.x*blockDim.y;
}
}
int main(int argc, char **argv){
int arrLen = 0;
struct timespec diff(struct timespec start, struct timespec end);
struct timespec time1, time2;
struct timespec time_stamp;
// GPU Timing variables
hipEvent_t start, stop;
float elapsed_gpu;
// Arrays on GPU global memory
float *d_x;
// Arrays on the host memory
float *h_x;
int i, errCount = 0, zeroCount = 0;
if (argc > 1) {
arrLen = atoi(argv[1]);
}
else {
arrLen = SM_ARR_LEN;
}
printf("Length of the array = %d\n", arrLen);
// Select GPU
CUDA_SAFE_CALL(hipSetDevice(1));
// Allocate GPU memory
size_t allocSize = arrLen * sizeof(float); printf("\ncp1");
CUDA_SAFE_CALL(hipMalloc((void **)&d_x, allocSize)); printf("\ncp2");
// Allocate arrays on host memory
h_x = (float *) malloc(allocSize); printf("\ncp4");
// Initialize the host arrays
printf("\nInitializing the arrays ...");
// Arrays are initialized with a known seed for reproducability
initializeArray1D(h_x, arrLen, 2453);
//initializeArray1D(h_y, arrLen, 1467);
printf("\t... done\n\n");
#if PRINT_TIME
// Create the cuda events
hipEventCreate(&start);
hipEventCreate(&stop);
// Record event on the default stream
hipEventRecord(start, 0);
#endif
// Transfer the arrays to the GPU memory
CUDA_SAFE_CALL(hipMemcpy(d_x, h_x, allocSize, hipMemcpyHostToDevice));
dim3 dimBlock(16,16);
// Launch the kernel
SOR_add<<<1,dimBlock>>>(d_x);
// Check for errors during launch
CUDA_SAFE_CALL(hipPeekAtLastError());
// Transfer the results back to the host
CUDA_SAFE_CALL(hipMemcpy(h_x, d_x, allocSize, hipMemcpyDeviceToHost));
#if PRINT_TIME
// Stop and destroy the timer
hipEventRecord(stop,0);
hipEventSynchronize(stop);
hipEventElapsedTime(&elapsed_gpu, start, stop);
printf("\nGPU time: %f (msec)\n", elapsed_gpu);
hipEventDestroy(start);
hipEventDestroy(stop);
#endif
long int length = 2048;
int j,k;
float change;
// Compute the results on the host
printf("\ncalculating results on host\n");
clock_gettime(CLOCK_REALTIME, &time1);
for(k=0;k<2000;k++)
{
for (i = 1; i < length-1; i++){
for (j = 1; j < length-1; j++) {
change = h_x[i*length+j] - .25 * (h_x[(i-1)*length+j] +
h_x[(i+1)*length+j] +
h_x[i*length+j+1] +
h_x[i*length+j-1]);
h_x[i*length+j] -= change * OMEGA;
}
}
}
clock_gettime(CLOCK_REALTIME, &time2);
time_stamp = diff(time1,time2);
printf("%lf\n", ((double) (GIG * time_stamp.tv_sec + time_stamp.tv_nsec)/1000000));
// Free-up device and host memory
CUDA_SAFE_CALL(hipFree(d_x));
//CUDA_SAFE_CALL(cudaFree(d_y));
free(h_x);
//free(h_y);
return 0;
}
void initializeArray1D(float *arr, int len, int seed) {
int i;
float randNum;
srand(seed);
for (i = 0; i < len; i++) {
randNum = (float) rand();
arr[i] = randNum;
}
}
struct timespec diff(struct timespec start, struct timespec end)
{
struct timespec temp;
if ((end.tv_nsec-start.tv_nsec)<0) {
temp.tv_sec = end.tv_sec-start.tv_sec-1;
temp.tv_nsec = 1000000000+end.tv_nsec-start.tv_nsec;
} else {
temp.tv_sec = end.tv_sec-start.tv_sec;
temp.tv_nsec = end.tv_nsec-start.tv_nsec;
}
return temp;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z7SOR_addPf
.globl _Z7SOR_addPf
.p2align 8
.type _Z7SOR_addPf,@function
_Z7SOR_addPf:
s_clause 0x1
s_load_b32 s6, s[0:1], 0x14
s_load_b64 s[2:3], s[0:1], 0x0
v_lshlrev_b32_e32 v1, 1, v0
v_and_b32_e32 v0, 0x3ff, v0
s_add_u32 s4, s0, 8
s_addc_u32 s5, s1, 0
s_mov_b32 s8, 0
s_mov_b32 s7, 0xbfffae14
v_and_or_b32 v0, v1, 0x1ff800, v0
s_waitcnt lgkmcnt(0)
s_and_b32 s0, s6, 0xffff
s_lshr_b32 s1, s6, 16
s_mov_b32 s6, 0x7ae147ae
s_mul_i32 s1, s1, s0
s_branch .LBB0_2
.LBB0_1:
s_or_b32 exec_lo, exec_lo, s9
v_add_nc_u32_e32 v0, s1, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_lt_i32_e32 vcc_lo, 0x3fffff, v0
s_or_b32 s8, vcc_lo, s8
s_and_not1_b32 exec_lo, exec_lo, s8
s_cbranch_execz .LBB0_6
.LBB0_2:
v_and_b32_e32 v1, 0x7ff, v0
v_cmp_lt_i32_e32 vcc_lo, 0x7ff, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_ne_u32_e64 s0, 0, v1
s_and_b32 s0, vcc_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s9, s0
s_cbranch_execz .LBB0_1
v_mul_lo_u32 v1, v0, 0xffbff7ff
v_cmp_gt_i32_e64 s0, 0x3ff801, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_lt_u32_e32 vcc_lo, 0x200400, v1
s_and_b32 s0, s0, vcc_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 exec_lo, exec_lo, s0
s_cbranch_execz .LBB0_1
s_load_b32 s0, s[4:5], 0xc
s_waitcnt lgkmcnt(0)
s_and_b32 s0, s0, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v6, s0, v0
v_subrev_nc_u32_e32 v2, s0, v0
s_movk_i32 s0, 0x7d0
v_mov_b32_e32 v3, v1
v_lshlrev_b64 v[4:5], 2, v[0:1]
v_mov_b32_e32 v7, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[8:9], 2, v[2:3]
v_add_co_u32 v1, vcc_lo, s2, v4
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_ci_u32_e32 v2, vcc_lo, s3, v5, vcc_lo
v_lshlrev_b64 v[5:6], 2, v[6:7]
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_co_u32 v3, vcc_lo, s2, v8
v_add_co_ci_u32_e32 v4, vcc_lo, s3, v9, vcc_lo
v_add_co_u32 v5, vcc_lo, s2, v5
s_delay_alu instid0(VALU_DEP_4)
v_add_co_ci_u32_e32 v6, vcc_lo, s3, v6, vcc_lo
.p2align 6
.LBB0_5:
s_clause 0x3
global_load_b32 v9, v[3:4], off
global_load_b32 v10, v[5:6], off
global_load_b64 v[7:8], v[1:2], off
global_load_b32 v11, v[1:2], off offset:-4
s_waitcnt vmcnt(0)
s_barrier
buffer_gl0_inv
global_load_b32 v12, v[1:2], off
s_add_i32 s0, s0, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
s_cmp_lg_u32 s0, 0
v_add_f32_e32 v8, v11, v8
v_add_f32_e32 v8, v8, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_f32_e32 v9, v8, v10
v_cvt_f64_f32_e32 v[7:8], v7
v_cvt_f64_f32_e32 v[9:10], v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[7:8], v[9:10], 0xbfd00000, v[7:8]
v_cvt_f32_f64_e32 v9, v[7:8]
s_waitcnt vmcnt(0)
v_cvt_f64_f32_e32 v[7:8], v12
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_f64_f32_e32 v[9:10], v9
v_fma_f64 v[7:8], v[9:10], s[6:7], v[7:8]
s_delay_alu instid0(VALU_DEP_1)
v_cvt_f32_f64_e32 v7, v[7:8]
global_store_b32 v[1:2], v7, off
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB0_5
s_branch .LBB0_1
.LBB0_6:
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z7SOR_addPf
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 264
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 13
.amdhsa_next_free_sgpr 10
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z7SOR_addPf, .Lfunc_end0-_Z7SOR_addPf
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: hidden_block_count_x
- .offset: 12
.size: 4
.value_kind: hidden_block_count_y
- .offset: 16
.size: 4
.value_kind: hidden_block_count_z
- .offset: 20
.size: 2
.value_kind: hidden_group_size_x
- .offset: 22
.size: 2
.value_kind: hidden_group_size_y
- .offset: 24
.size: 2
.value_kind: hidden_group_size_z
- .offset: 26
.size: 2
.value_kind: hidden_remainder_x
- .offset: 28
.size: 2
.value_kind: hidden_remainder_y
- .offset: 30
.size: 2
.value_kind: hidden_remainder_z
- .offset: 48
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 72
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 264
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z7SOR_addPf
.private_segment_fixed_size: 0
.sgpr_count: 12
.sgpr_spill_count: 0
.symbol: _Z7SOR_addPf.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 13
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <cstdlib>
#include <math.h>
#include <time.h>
#include <cstdio>
// Assertion to check for errors
#define CUDA_SAFE_CALL(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(hipError_t code, char *file, int line, bool abort=true)
{
if (code != hipSuccess)
{
fprintf(stderr,"CUDA_SAFE_CALL: %s %s %d\n", hipGetErrorString(code), file, line);
if (abort) exit(code);
}
}
#define GIG 1000000000
#define CPG 3.07
#define PRINT_TIME 1
#define SM_ARR_LEN 2048*2048
#define OMEGA 1.98
void initializeArray1D(float *arr, int len, int seed);
__global__ void SOR_add (float* x)
{
int row_start = threadIdx.x;
int col_start = threadIdx.y;
int i;
float result = 0;
int offset = (col_start * 2048) + row_start;
while(offset<SM_ARR_LEN)
{ if((offset > 2047) && (offset%2048) && (offset%2047) && (offset < SM_ARR_LEN-2047))
{
for(i=0; i<2000; i++)
{
result = x[offset] - 0.25*(x[offset-1] + x[offset+1] + x[offset - blockDim.x] + x[offset + blockDim.x]);
__syncthreads();
x[offset] -= result*OMEGA;
__syncthreads();
}
}
offset += blockDim.x*blockDim.y;
}
}
int main(int argc, char **argv){
int arrLen = 0;
struct timespec diff(struct timespec start, struct timespec end);
struct timespec time1, time2;
struct timespec time_stamp;
// GPU Timing variables
hipEvent_t start, stop;
float elapsed_gpu;
// Arrays on GPU global memory
float *d_x;
// Arrays on the host memory
float *h_x;
int i, errCount = 0, zeroCount = 0;
if (argc > 1) {
arrLen = atoi(argv[1]);
}
else {
arrLen = SM_ARR_LEN;
}
printf("Length of the array = %d\n", arrLen);
// Select GPU
CUDA_SAFE_CALL(hipSetDevice(1));
// Allocate GPU memory
size_t allocSize = arrLen * sizeof(float); printf("\ncp1");
CUDA_SAFE_CALL(hipMalloc((void **)&d_x, allocSize)); printf("\ncp2");
// Allocate arrays on host memory
h_x = (float *) malloc(allocSize); printf("\ncp4");
// Initialize the host arrays
printf("\nInitializing the arrays ...");
// Arrays are initialized with a known seed for reproducability
initializeArray1D(h_x, arrLen, 2453);
//initializeArray1D(h_y, arrLen, 1467);
printf("\t... done\n\n");
#if PRINT_TIME
// Create the cuda events
hipEventCreate(&start);
hipEventCreate(&stop);
// Record event on the default stream
hipEventRecord(start, 0);
#endif
// Transfer the arrays to the GPU memory
CUDA_SAFE_CALL(hipMemcpy(d_x, h_x, allocSize, hipMemcpyHostToDevice));
dim3 dimBlock(16,16);
// Launch the kernel
SOR_add<<<1,dimBlock>>>(d_x);
// Check for errors during launch
CUDA_SAFE_CALL(hipPeekAtLastError());
// Transfer the results back to the host
CUDA_SAFE_CALL(hipMemcpy(h_x, d_x, allocSize, hipMemcpyDeviceToHost));
#if PRINT_TIME
// Stop and destroy the timer
hipEventRecord(stop,0);
hipEventSynchronize(stop);
hipEventElapsedTime(&elapsed_gpu, start, stop);
printf("\nGPU time: %f (msec)\n", elapsed_gpu);
hipEventDestroy(start);
hipEventDestroy(stop);
#endif
long int length = 2048;
int j,k;
float change;
// Compute the results on the host
printf("\ncalculating results on host\n");
clock_gettime(CLOCK_REALTIME, &time1);
for(k=0;k<2000;k++)
{
for (i = 1; i < length-1; i++){
for (j = 1; j < length-1; j++) {
change = h_x[i*length+j] - .25 * (h_x[(i-1)*length+j] +
h_x[(i+1)*length+j] +
h_x[i*length+j+1] +
h_x[i*length+j-1]);
h_x[i*length+j] -= change * OMEGA;
}
}
}
clock_gettime(CLOCK_REALTIME, &time2);
time_stamp = diff(time1,time2);
printf("%lf\n", ((double) (GIG * time_stamp.tv_sec + time_stamp.tv_nsec)/1000000));
// Free-up device and host memory
CUDA_SAFE_CALL(hipFree(d_x));
//CUDA_SAFE_CALL(cudaFree(d_y));
free(h_x);
//free(h_y);
return 0;
}
void initializeArray1D(float *arr, int len, int seed) {
int i;
float randNum;
srand(seed);
for (i = 0; i < len; i++) {
randNum = (float) rand();
arr[i] = randNum;
}
}
struct timespec diff(struct timespec start, struct timespec end)
{
struct timespec temp;
if ((end.tv_nsec-start.tv_nsec)<0) {
temp.tv_sec = end.tv_sec-start.tv_sec-1;
temp.tv_nsec = 1000000000+end.tv_nsec-start.tv_nsec;
} else {
temp.tv_sec = end.tv_sec-start.tv_sec;
temp.tv_nsec = end.tv_nsec-start.tv_nsec;
}
return temp;
} | .text
.file "cuda_SOR.hip"
.globl _Z22__device_stub__SOR_addPf # -- Begin function _Z22__device_stub__SOR_addPf
.p2align 4, 0x90
.type _Z22__device_stub__SOR_addPf,@function
_Z22__device_stub__SOR_addPf: # @_Z22__device_stub__SOR_addPf
.cfi_startproc
# %bb.0:
subq $72, %rsp
.cfi_def_cfa_offset 80
movq %rdi, 64(%rsp)
leaq 64(%rsp), %rax
movq %rax, (%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
movq %rsp, %r9
movl $_Z7SOR_addPf, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $88, %rsp
.cfi_adjust_cfa_offset -88
retq
.Lfunc_end0:
.size _Z22__device_stub__SOR_addPf, .Lfunc_end0-_Z22__device_stub__SOR_addPf
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI1_0:
.quad 0xbfd0000000000000 # double -0.25
.LCPI1_1:
.quad 0xbfffae147ae147ae # double -1.98
.LCPI1_2:
.quad 0x412e848000000000 # double 1.0E+6
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r12
.cfi_def_cfa_offset 40
pushq %rbx
.cfi_def_cfa_offset 48
subq $96, %rsp
.cfi_def_cfa_offset 144
.cfi_offset %rbx, -48
.cfi_offset %r12, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl $4194304, %r15d # imm = 0x400000
cmpl $2, %edi
jl .LBB1_2
# %bb.1:
movq 8(%rsi), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %r15
.LBB1_2:
movl $.L.str, %edi
movl %r15d, %esi
xorl %eax, %eax
callq printf
movl $1, %edi
callq hipSetDevice
testl %eax, %eax
jne .LBB1_3
# %bb.5: # %_Z9gpuAssert10hipError_tPcib.exit
movslq %r15d, %r14
shlq $2, %r14
movl $.L.str.2, %edi
xorl %eax, %eax
callq printf
movq %rsp, %rdi
movq %r14, %rsi
callq hipMalloc
testl %eax, %eax
jne .LBB1_6
# %bb.7: # %_Z9gpuAssert10hipError_tPcib.exit63
movl $.L.str.3, %edi
xorl %eax, %eax
callq printf
movq %r14, %rdi
callq malloc
movq %rax, %rbx
movl $.L.str.4, %edi
xorl %eax, %eax
callq printf
movl $.L.str.5, %edi
xorl %eax, %eax
callq printf
movl $2453, %edi # imm = 0x995
callq srand
testl %r15d, %r15d
jle .LBB1_10
# %bb.8: # %.lr.ph.preheader.i
movl %r15d, %r15d
xorl %r12d, %r12d
.p2align 4, 0x90
.LBB1_9: # %.lr.ph.i
# =>This Inner Loop Header: Depth=1
callq rand
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
movss %xmm0, (%rbx,%r12,4)
incq %r12
cmpq %r12, %r15
jne .LBB1_9
.LBB1_10: # %_Z17initializeArray1DPfii.exit
movl $.Lstr, %edi
callq puts@PLT
leaq 16(%rsp), %rdi
callq hipEventCreate
leaq 8(%rsp), %rdi
callq hipEventCreate
movq 16(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq (%rsp), %rdi
movq %rbx, %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB1_11
# %bb.12: # %_Z9gpuAssert10hipError_tPcib.exit65
movabsq $4294967297, %rdi # imm = 0x100000001
movabsq $68719476752, %rdx # imm = 0x1000000010
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_14
# %bb.13:
leaq 24(%rsp), %rax
movq (%rsp), %rcx
movq %rcx, 24(%rsp)
movq %rax, 64(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 88(%rsp), %rdx
leaq 80(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z7SOR_addPf, %edi
pushq 80(%rsp)
.cfi_adjust_cfa_offset 8
pushq 96(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_14:
callq hipPeekAtLastError
testl %eax, %eax
jne .LBB1_15
# %bb.16: # %_Z9gpuAssert10hipError_tPcib.exit67
movq (%rsp), %rsi
movq %rbx, %rdi
movq %r14, %rdx
movl $2, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB1_17
# %bb.18: # %_Z9gpuAssert10hipError_tPcib.exit69
movq 8(%rsp), %rdi
xorl %r14d, %r14d
xorl %esi, %esi
callq hipEventRecord
movq 8(%rsp), %rdi
callq hipEventSynchronize
movq 16(%rsp), %rsi
movq 8(%rsp), %rdx
leaq 24(%rsp), %rdi
callq hipEventElapsedTime
movss 24(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.7, %edi
movb $1, %al
callq printf
movq 16(%rsp), %rdi
callq hipEventDestroy
movq 8(%rsp), %rdi
callq hipEventDestroy
movl $.Lstr.1, %edi
callq puts@PLT
leaq 48(%rsp), %rsi
xorl %edi, %edi
callq clock_gettime
movq %rbx, %rax
addq $16388, %rax # imm = 0x4004
movsd .LCPI1_0(%rip), %xmm0 # xmm0 = mem[0],zero
movsd .LCPI1_1(%rip), %xmm1 # xmm1 = mem[0],zero
.p2align 4, 0x90
.LBB1_19: # %.preheader73
# =>This Loop Header: Depth=1
# Child Loop BB1_20 Depth 2
# Child Loop BB1_21 Depth 3
movl $1, %ecx
movq %rax, %rdx
xorl %esi, %esi
.p2align 4, 0x90
.LBB1_20: # %.preheader
# Parent Loop BB1_19 Depth=1
# => This Loop Header: Depth=2
# Child Loop BB1_21 Depth 3
movq %rsi, %rdi
shlq $13, %rdi
movss 8192(%rbx,%rdi), %xmm2 # xmm2 = mem[0],zero,zero,zero
movq $-2046, %rdi # imm = 0xF802
.p2align 4, 0x90
.LBB1_21: # Parent Loop BB1_19 Depth=1
# Parent Loop BB1_20 Depth=2
# => This Inner Loop Header: Depth=3
movss -8(%rdx,%rdi,4), %xmm3 # xmm3 = mem[0],zero,zero,zero
cvtss2sd %xmm3, %xmm3
movss -8200(%rdx,%rdi,4), %xmm4 # xmm4 = mem[0],zero,zero,zero
addss 8184(%rdx,%rdi,4), %xmm4
addss -4(%rdx,%rdi,4), %xmm4
addss %xmm2, %xmm4
xorps %xmm2, %xmm2
cvtss2sd %xmm4, %xmm2
mulsd %xmm0, %xmm2
addsd %xmm3, %xmm2
cvtsd2ss %xmm2, %xmm2
cvtss2sd %xmm2, %xmm2
mulsd %xmm1, %xmm2
addsd %xmm3, %xmm2
cvtsd2ss %xmm2, %xmm2
movss %xmm2, -8(%rdx,%rdi,4)
incq %rdi
jne .LBB1_21
# %bb.22: # in Loop: Header=BB1_20 Depth=2
incq %rcx
incq %rsi
addq $8192, %rdx # imm = 0x2000
cmpq $2047, %rcx # imm = 0x7FF
jne .LBB1_20
# %bb.23: # in Loop: Header=BB1_19 Depth=1
incl %r14d
cmpl $2000, %r14d # imm = 0x7D0
jne .LBB1_19
# %bb.24: # %_Z4diff8timespecS_.exit
leaq 32(%rsp), %rsi
xorl %edi, %edi
callq clock_gettime
movq 48(%rsp), %rax
movq 40(%rsp), %rcx
subq 56(%rsp), %rcx
leaq 1000000000(%rcx), %rdx
movq %rax, %rsi
negq %rsi
testq %rcx, %rcx
notq %rax
cmovnsq %rsi, %rax
cmovnsq %rcx, %rdx
addq 32(%rsp), %rax
imulq $1000000000, %rax, %rax # imm = 0x3B9ACA00
addq %rdx, %rax
xorps %xmm0, %xmm0
cvtsi2sd %rax, %xmm0
divsd .LCPI1_2(%rip), %xmm0
movl $.L.str.9, %edi
movb $1, %al
callq printf
movq (%rsp), %rdi
callq hipFree
testl %eax, %eax
jne .LBB1_25
# %bb.26: # %_Z9gpuAssert10hipError_tPcib.exit71
movq %rbx, %rdi
callq free
xorl %eax, %eax
addq $96, %rsp
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB1_3:
.cfi_def_cfa_offset 144
movq stderr(%rip), %rbx
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
movl $.L.str.10, %esi
movl $.L.str.1, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $86, %r8d
jmp .LBB1_4
.LBB1_6:
movq stderr(%rip), %rbx
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
movl $.L.str.10, %esi
movl $.L.str.1, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $90, %r8d
jmp .LBB1_4
.LBB1_11:
movq stderr(%rip), %rbx
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
movl $.L.str.10, %esi
movl $.L.str.1, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $114, %r8d
jmp .LBB1_4
.LBB1_15:
movq stderr(%rip), %rbx
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
movl $.L.str.10, %esi
movl $.L.str.1, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $120, %r8d
jmp .LBB1_4
.LBB1_17:
movq stderr(%rip), %rbx
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
movl $.L.str.10, %esi
movl $.L.str.1, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $123, %r8d
jmp .LBB1_4
.LBB1_25:
movq stderr(%rip), %rbx
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
movl $.L.str.10, %esi
movl $.L.str.1, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $161, %r8d
.LBB1_4:
xorl %eax, %eax
callq fprintf
movl %ebp, %edi
callq exit
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.globl _Z17initializeArray1DPfii # -- Begin function _Z17initializeArray1DPfii
.p2align 4, 0x90
.type _Z17initializeArray1DPfii,@function
_Z17initializeArray1DPfii: # @_Z17initializeArray1DPfii
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %rbx
.cfi_def_cfa_offset 40
pushq %rax
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %esi, %ebp
movq %rdi, %rbx
movl %edx, %edi
callq srand
testl %ebp, %ebp
jle .LBB2_3
# %bb.1: # %.lr.ph.preheader
movl %ebp, %r14d
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB2_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
callq rand
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
movss %xmm0, (%rbx,%r15,4)
incq %r15
cmpq %r15, %r14
jne .LBB2_2
.LBB2_3: # %._crit_edge
addq $8, %rsp
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end2:
.size _Z17initializeArray1DPfii, .Lfunc_end2-_Z17initializeArray1DPfii
.cfi_endproc
# -- End function
.globl _Z4diff8timespecS_ # -- Begin function _Z4diff8timespecS_
.p2align 4, 0x90
.type _Z4diff8timespecS_,@function
_Z4diff8timespecS_: # @_Z4diff8timespecS_
.cfi_startproc
# %bb.0:
movq %rdx, %r8
movq %rdi, %rax
movq %rcx, %rdx
subq %rsi, %rdx
js .LBB3_1
# %bb.2:
subq %rax, %r8
movq %r8, %rax
retq
.LBB3_1:
notq %rax
addq %r8, %rax
subq %rsi, %rcx
addq $1000000000, %rcx # imm = 0x3B9ACA00
movq %rcx, %rdx
retq
.Lfunc_end3:
.size _Z4diff8timespecS_, .Lfunc_end3-_Z4diff8timespecS_
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB4_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB4_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z7SOR_addPf, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end4:
.size __hip_module_ctor, .Lfunc_end4-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB5_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB5_2:
retq
.Lfunc_end5:
.size __hip_module_dtor, .Lfunc_end5-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z7SOR_addPf,@object # @_Z7SOR_addPf
.section .rodata,"a",@progbits
.globl _Z7SOR_addPf
.p2align 3, 0x0
_Z7SOR_addPf:
.quad _Z22__device_stub__SOR_addPf
.size _Z7SOR_addPf, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Length of the array = %d\n"
.size .L.str, 26
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "/home/ubuntu/Datasets/stackv2/train-structured-repos-hip/bswain12/EC527---High-Performance-Programming-with-Multicores-and-GPUs/master/Gaur_Abhishek_Lab7/cuda_SOR.hip"
.size .L.str.1, 167
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "\ncp1"
.size .L.str.2, 5
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "\ncp2"
.size .L.str.3, 5
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "\ncp4"
.size .L.str.4, 5
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "\nInitializing the arrays ..."
.size .L.str.5, 29
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz "\nGPU time: %f (msec)\n"
.size .L.str.7, 22
.type .L.str.9,@object # @.str.9
.L.str.9:
.asciz "%lf\n"
.size .L.str.9, 5
.type .L.str.10,@object # @.str.10
.L.str.10:
.asciz "CUDA_SAFE_CALL: %s %s %d\n"
.size .L.str.10, 26
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z7SOR_addPf"
.size .L__unnamed_1, 13
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "\t... done\n"
.size .Lstr, 11
.type .Lstr.1,@object # @str.1
.Lstr.1:
.asciz "\ncalculating results on host"
.size .Lstr.1, 29
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z22__device_stub__SOR_addPf
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z7SOR_addPf
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z7SOR_addPf
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_TID.Y ; /* 0x0000000000007919 */
/* 0x000e280000002200 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ LEA R0, R0, R3, 0xb ; /* 0x0000000300007211 */
/* 0x001fc800078e58ff */
/*0040*/ ISETP.GT.AND P0, PT, R0, 0x3fffff, PT ; /* 0x003fffff0000780c */
/* 0x000fda0003f04270 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0070*/ LOP3.LUT P0, RZ, R0.reuse, 0x7ff, RZ, 0xc0, !PT ; /* 0x000007ff00ff7812 */
/* 0x040fe4000780c0ff */
/*0080*/ MOV R9, c[0x0][0x0] ; /* 0x0000000000097a02 */
/* 0x000fe40000000f00 */
/*0090*/ ISETP.LT.OR P0, PT, R0, 0x800, !P0 ; /* 0x000008000000780c */
/* 0x000fda0004701670 */
/*00a0*/ @!P0 IMAD.WIDE.U32 R2, R0, 0x200401, RZ ; /* 0x0020040100028825 */
/* 0x001fca00078e00ff */
/*00b0*/ @!P0 IADD3 R2, -R3, R0, RZ ; /* 0x0000000003028210 */
/* 0x000fc80007ffe1ff */
/*00c0*/ @!P0 LEA.HI R2, R2, R3, RZ, 0x1f ; /* 0x0000000302028211 */
/* 0x000fc800078ff8ff */
/*00d0*/ @!P0 SHF.R.U32.HI R3, RZ, 0xa, R2 ; /* 0x0000000aff038819 */
/* 0x000fca0000011602 */
/*00e0*/ @!P0 IMAD R3, R3, -0x7ff, R0 ; /* 0xfffff80103038824 */
/* 0x000fca00078e0200 */
/*00f0*/ ISETP.NE.AND P0, PT, R3, RZ, !P0 ; /* 0x000000ff0300720c */
/* 0x000fc80004705270 */
/*0100*/ ISETP.GT.OR P0, PT, R0, 0x3ff800, !P0 ; /* 0x003ff8000000780c */
/* 0x000fda0004704670 */
/*0110*/ @P0 BRA 0xbd0 ; /* 0x00000ab000000947 */
/* 0x000fea0003800000 */
/*0120*/ HFMA2.MMA R3, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff037435 */
/* 0x000fe200000001ff */
/*0130*/ IADD3 R4, R0.reuse, -c[0x0][0x0], RZ ; /* 0x8000000000047a10 */
/* 0x040fe40007ffe0ff */
/*0140*/ IADD3 R6, R0, c[0x0][0x0], RZ ; /* 0x0000000000067a10 */
/* 0x000fe40007ffe0ff */
/*0150*/ MOV R8, RZ ; /* 0x000000ff00087202 */
/* 0x000fca0000000f00 */
/*0160*/ IMAD.WIDE.U32 R4, R4, R3, c[0x0][0x160] ; /* 0x0000580004047625 */
/* 0x000fc800078e0003 */
/*0170*/ IMAD.WIDE.U32 R6, R6, R3, c[0x0][0x160] ; /* 0x0000580006067625 */
/* 0x000fc800078e0003 */
/*0180*/ IMAD.WIDE R2, R0, R3, c[0x0][0x160] ; /* 0x0000580000027625 */
/* 0x000fca00078e0203 */
/*0190*/ LDG.E R10, [R2.64+0x4] ; /* 0x00000404020a7981 */
/* 0x000ea8000c1e1900 */
/*01a0*/ LDG.E R11, [R2.64+-0x4] ; /* 0xfffffc04020b7981 */
/* 0x000ea8000c1e1900 */
/*01b0*/ LDG.E R13, [R4.64] ; /* 0x00000004040d7981 */
/* 0x001ee8000c1e1900 */
/*01c0*/ LDG.E R15, [R6.64] ; /* 0x00000004060f7981 */
/* 0x000f28000c1e1900 */
/*01d0*/ LDG.E R16, [R2.64] ; /* 0x0000000402107981 */
/* 0x000f62000c1e1900 */
/*01e0*/ WARPSYNC 0xffffffff ; /* 0xffffffff00007948 */
/* 0x000fe60003800000 */
/*01f0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0200*/ LDG.E R14, [R2.64] ; /* 0x00000004020e7981 */
/* 0x000f62000c1e1900 */
/*0210*/ FADD R12, R10, R11 ; /* 0x0000000b0a0c7221 */
/* 0x004fc80000000000 */
/*0220*/ FADD R12, R12, R13 ; /* 0x0000000d0c0c7221 */
/* 0x008fc80000000000 */
/*0230*/ FADD R17, R12, R15 ; /* 0x0000000f0c117221 */
/* 0x010fe20000000000 */
/*0240*/ F2F.F64.F32 R10, R16 ; /* 0x00000010000a7310 */
/* 0x020ff00000201800 */
/*0250*/ F2F.F64.F32 R12, R17 ; /* 0x00000011000c7310 */
/* 0x000e240000201800 */
/*0260*/ DFMA R10, R12, -0.25, R10 ; /* 0xbfd000000c0a782b */
/* 0x001e14000000000a */
/*0270*/ F2F.F32.F64 R10, R10 ; /* 0x0000000a000a7310 */
/* 0x001e300000301000 */
/*0280*/ F2F.F64.F32 R14, R14 ; /* 0x0000000e000e7310 */
/* 0x000ff00000201800 */
/*0290*/ F2F.F64.F32 R12, R10 ; /* 0x0000000a000c7310 */
/* 0x001e240000201800 */
/*02a0*/ DFMA R12, R12, c[0x2][0x0], R14 ; /* 0x008000000c0c7a2b */
/* 0x001e14000000000e */
/*02b0*/ F2F.F32.F64 R13, R12 ; /* 0x0000000c000d7310 */
/* 0x001e240000301000 */
/*02c0*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0011e8000c101904 */
/*02d0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*02e0*/ LDG.E R15, [R2.64+0x4] ; /* 0x00000404020f7981 */
/* 0x000ea8000c1e1900 */
/*02f0*/ LDG.E R18, [R2.64+-0x4] ; /* 0xfffffc0402127981 */
/* 0x000ea8000c1e1900 */
/*0300*/ LDG.E R20, [R4.64] ; /* 0x0000000404147981 */
/* 0x000ee8000c1e1900 */
/*0310*/ LDG.E R22, [R6.64] ; /* 0x0000000406167981 */
/* 0x000f28000c1e1900 */
/*0320*/ LDG.E R16, [R2.64] ; /* 0x0000000402107981 */
/* 0x000f68000c1e1900 */
/*0330*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0340*/ LDG.E R14, [R2.64] ; /* 0x00000004020e7981 */
/* 0x000f62000c1e1900 */
/*0350*/ FADD R15, R15, R18 ; /* 0x000000120f0f7221 */
/* 0x004fc80000000000 */
/*0360*/ FADD R15, R15, R20 ; /* 0x000000140f0f7221 */
/* 0x008fc80000000000 */
/*0370*/ FADD R22, R15, R22 ; /* 0x000000160f167221 */
/* 0x010fe20000000000 */
/*0380*/ F2F.F64.F32 R10, R16 ; /* 0x00000010000a7310 */
/* 0x020ff00000201800 */
/*0390*/ F2F.F64.F32 R12, R22 ; /* 0x00000016000c7310 */
/* 0x001e240000201800 */
/*03a0*/ DFMA R10, R12, -0.25, R10 ; /* 0xbfd000000c0a782b */
/* 0x001e14000000000a */
/*03b0*/ F2F.F32.F64 R10, R10 ; /* 0x0000000a000a7310 */
/* 0x001e300000301000 */
/*03c0*/ F2F.F64.F32 R14, R14 ; /* 0x0000000e000e7310 */
/* 0x000ff00000201800 */
/*03d0*/ F2F.F64.F32 R12, R10 ; /* 0x0000000a000c7310 */
/* 0x001e240000201800 */
/*03e0*/ DFMA R12, R12, c[0x2][0x0], R14 ; /* 0x008000000c0c7a2b */
/* 0x001e14000000000e */
/*03f0*/ F2F.F32.F64 R13, R12 ; /* 0x0000000c000d7310 */
/* 0x001e240000301000 */
/*0400*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0011e8000c101904 */
/*0410*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0420*/ LDG.E R15, [R2.64+0x4] ; /* 0x00000404020f7981 */
/* 0x000ea8000c1e1900 */
/*0430*/ LDG.E R18, [R2.64+-0x4] ; /* 0xfffffc0402127981 */
/* 0x000ea8000c1e1900 */
/*0440*/ LDG.E R20, [R4.64] ; /* 0x0000000404147981 */
/* 0x000ee8000c1e1900 */
/*0450*/ LDG.E R22, [R6.64] ; /* 0x0000000406167981 */
/* 0x000f28000c1e1900 */
/*0460*/ LDG.E R16, [R2.64] ; /* 0x0000000402107981 */
/* 0x000f68000c1e1900 */
/*0470*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0480*/ LDG.E R14, [R2.64] ; /* 0x00000004020e7981 */
/* 0x000f62000c1e1900 */
/*0490*/ FADD R15, R15, R18 ; /* 0x000000120f0f7221 */
/* 0x004fc80000000000 */
/*04a0*/ FADD R15, R15, R20 ; /* 0x000000140f0f7221 */
/* 0x008fc80000000000 */
/*04b0*/ FADD R22, R15, R22 ; /* 0x000000160f167221 */
/* 0x010fe20000000000 */
/*04c0*/ F2F.F64.F32 R10, R16 ; /* 0x00000010000a7310 */
/* 0x020ff00000201800 */
/*04d0*/ F2F.F64.F32 R12, R22 ; /* 0x00000016000c7310 */
/* 0x001e240000201800 */
/*04e0*/ DFMA R10, R12, -0.25, R10 ; /* 0xbfd000000c0a782b */
/* 0x001e14000000000a */
/*04f0*/ F2F.F32.F64 R10, R10 ; /* 0x0000000a000a7310 */
/* 0x001e300000301000 */
/*0500*/ F2F.F64.F32 R14, R14 ; /* 0x0000000e000e7310 */
/* 0x000ff00000201800 */
/*0510*/ F2F.F64.F32 R12, R10 ; /* 0x0000000a000c7310 */
/* 0x001e240000201800 */
/*0520*/ DFMA R12, R12, c[0x2][0x0], R14 ; /* 0x008000000c0c7a2b */
/* 0x001e14000000000e */
/*0530*/ F2F.F32.F64 R13, R12 ; /* 0x0000000c000d7310 */
/* 0x001e240000301000 */
/*0540*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0011e8000c101904 */
/*0550*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0560*/ LDG.E R15, [R2.64+0x4] ; /* 0x00000404020f7981 */
/* 0x000ea8000c1e1900 */
/*0570*/ LDG.E R18, [R2.64+-0x4] ; /* 0xfffffc0402127981 */
/* 0x000ea8000c1e1900 */
/*0580*/ LDG.E R20, [R4.64] ; /* 0x0000000404147981 */
/* 0x000ee8000c1e1900 */
/*0590*/ LDG.E R22, [R6.64] ; /* 0x0000000406167981 */
/* 0x000f28000c1e1900 */
/*05a0*/ LDG.E R16, [R2.64] ; /* 0x0000000402107981 */
/* 0x000f68000c1e1900 */
/*05b0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*05c0*/ LDG.E R14, [R2.64] ; /* 0x00000004020e7981 */
/* 0x000f62000c1e1900 */
/*05d0*/ FADD R15, R15, R18 ; /* 0x000000120f0f7221 */
/* 0x004fc80000000000 */
/*05e0*/ FADD R15, R15, R20 ; /* 0x000000140f0f7221 */
/* 0x008fc80000000000 */
/*05f0*/ FADD R22, R15, R22 ; /* 0x000000160f167221 */
/* 0x010fe20000000000 */
/*0600*/ F2F.F64.F32 R10, R16 ; /* 0x00000010000a7310 */
/* 0x020ff00000201800 */
/*0610*/ F2F.F64.F32 R12, R22 ; /* 0x00000016000c7310 */
/* 0x001e240000201800 */
/*0620*/ DFMA R10, R12, -0.25, R10 ; /* 0xbfd000000c0a782b */
/* 0x001e14000000000a */
/*0630*/ F2F.F32.F64 R10, R10 ; /* 0x0000000a000a7310 */
/* 0x001e300000301000 */
/*0640*/ F2F.F64.F32 R14, R14 ; /* 0x0000000e000e7310 */
/* 0x000ff00000201800 */
/*0650*/ F2F.F64.F32 R12, R10 ; /* 0x0000000a000c7310 */
/* 0x001e240000201800 */
/*0660*/ DFMA R12, R12, c[0x2][0x0], R14 ; /* 0x008000000c0c7a2b */
/* 0x001e14000000000e */
/*0670*/ F2F.F32.F64 R13, R12 ; /* 0x0000000c000d7310 */
/* 0x001e240000301000 */
/*0680*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0011e8000c101904 */
/*0690*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*06a0*/ LDG.E R15, [R2.64+0x4] ; /* 0x00000404020f7981 */
/* 0x000ea8000c1e1900 */
/*06b0*/ LDG.E R18, [R2.64+-0x4] ; /* 0xfffffc0402127981 */
/* 0x000ea8000c1e1900 */
/*06c0*/ LDG.E R20, [R4.64] ; /* 0x0000000404147981 */
/* 0x000ee8000c1e1900 */
/*06d0*/ LDG.E R22, [R6.64] ; /* 0x0000000406167981 */
/* 0x000f28000c1e1900 */
/*06e0*/ LDG.E R16, [R2.64] ; /* 0x0000000402107981 */
/* 0x000f68000c1e1900 */
/*06f0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0700*/ LDG.E R14, [R2.64] ; /* 0x00000004020e7981 */
/* 0x000f62000c1e1900 */
/*0710*/ FADD R15, R15, R18 ; /* 0x000000120f0f7221 */
/* 0x004fc80000000000 */
/*0720*/ FADD R15, R15, R20 ; /* 0x000000140f0f7221 */
/* 0x008fc80000000000 */
/*0730*/ FADD R22, R15, R22 ; /* 0x000000160f167221 */
/* 0x010fe20000000000 */
/*0740*/ F2F.F64.F32 R10, R16 ; /* 0x00000010000a7310 */
/* 0x020ff00000201800 */
/*0750*/ F2F.F64.F32 R12, R22 ; /* 0x00000016000c7310 */
/* 0x001e240000201800 */
/*0760*/ DFMA R10, R12, -0.25, R10 ; /* 0xbfd000000c0a782b */
/* 0x001e14000000000a */
/*0770*/ F2F.F32.F64 R10, R10 ; /* 0x0000000a000a7310 */
/* 0x001e300000301000 */
/*0780*/ F2F.F64.F32 R14, R14 ; /* 0x0000000e000e7310 */
/* 0x000ff00000201800 */
/*0790*/ F2F.F64.F32 R12, R10 ; /* 0x0000000a000c7310 */
/* 0x001e240000201800 */
/*07a0*/ DFMA R12, R12, c[0x2][0x0], R14 ; /* 0x008000000c0c7a2b */
/* 0x001e14000000000e */
/*07b0*/ F2F.F32.F64 R13, R12 ; /* 0x0000000c000d7310 */
/* 0x001e240000301000 */
/*07c0*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0011e8000c101904 */
/*07d0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*07e0*/ LDG.E R15, [R2.64+0x4] ; /* 0x00000404020f7981 */
/* 0x000ea8000c1e1900 */
/*07f0*/ LDG.E R18, [R2.64+-0x4] ; /* 0xfffffc0402127981 */
/* 0x000ea8000c1e1900 */
/*0800*/ LDG.E R20, [R4.64] ; /* 0x0000000404147981 */
/* 0x000ee8000c1e1900 */
/*0810*/ LDG.E R22, [R6.64] ; /* 0x0000000406167981 */
/* 0x000f28000c1e1900 */
/*0820*/ LDG.E R16, [R2.64] ; /* 0x0000000402107981 */
/* 0x000f68000c1e1900 */
/*0830*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0840*/ LDG.E R14, [R2.64] ; /* 0x00000004020e7981 */
/* 0x000f62000c1e1900 */
/*0850*/ FADD R15, R15, R18 ; /* 0x000000120f0f7221 */
/* 0x004fc80000000000 */
/*0860*/ FADD R15, R15, R20 ; /* 0x000000140f0f7221 */
/* 0x008fc80000000000 */
/*0870*/ FADD R22, R15, R22 ; /* 0x000000160f167221 */
/* 0x010fe20000000000 */
/*0880*/ F2F.F64.F32 R10, R16 ; /* 0x00000010000a7310 */
/* 0x020ff00000201800 */
/*0890*/ F2F.F64.F32 R12, R22 ; /* 0x00000016000c7310 */
/* 0x001e240000201800 */
/*08a0*/ DFMA R10, R12, -0.25, R10 ; /* 0xbfd000000c0a782b */
/* 0x001e14000000000a */
/*08b0*/ F2F.F32.F64 R10, R10 ; /* 0x0000000a000a7310 */
/* 0x001e300000301000 */
/*08c0*/ F2F.F64.F32 R14, R14 ; /* 0x0000000e000e7310 */
/* 0x000ff00000201800 */
/*08d0*/ F2F.F64.F32 R12, R10 ; /* 0x0000000a000c7310 */
/* 0x001e240000201800 */
/*08e0*/ DFMA R12, R12, c[0x2][0x0], R14 ; /* 0x008000000c0c7a2b */
/* 0x001e14000000000e */
/*08f0*/ F2F.F32.F64 R13, R12 ; /* 0x0000000c000d7310 */
/* 0x001e240000301000 */
/*0900*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0011e8000c101904 */
/*0910*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0920*/ LDG.E R15, [R2.64+0x4] ; /* 0x00000404020f7981 */
/* 0x000ea8000c1e1900 */
/*0930*/ LDG.E R18, [R2.64+-0x4] ; /* 0xfffffc0402127981 */
/* 0x000ea8000c1e1900 */
/*0940*/ LDG.E R20, [R4.64] ; /* 0x0000000404147981 */
/* 0x000ee8000c1e1900 */
/*0950*/ LDG.E R22, [R6.64] ; /* 0x0000000406167981 */
/* 0x000f28000c1e1900 */
/*0960*/ LDG.E R16, [R2.64] ; /* 0x0000000402107981 */
/* 0x000f68000c1e1900 */
/*0970*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0980*/ LDG.E R14, [R2.64] ; /* 0x00000004020e7981 */
/* 0x000f62000c1e1900 */
/*0990*/ FADD R15, R15, R18 ; /* 0x000000120f0f7221 */
/* 0x004fc80000000000 */
/*09a0*/ FADD R15, R15, R20 ; /* 0x000000140f0f7221 */
/* 0x008fc80000000000 */
/*09b0*/ FADD R22, R15, R22 ; /* 0x000000160f167221 */
/* 0x010fe20000000000 */
/*09c0*/ F2F.F64.F32 R10, R16 ; /* 0x00000010000a7310 */
/* 0x020ff00000201800 */
/*09d0*/ F2F.F64.F32 R12, R22 ; /* 0x00000016000c7310 */
/* 0x001e240000201800 */
/*09e0*/ DFMA R10, R12, -0.25, R10 ; /* 0xbfd000000c0a782b */
/* 0x001e14000000000a */
/*09f0*/ F2F.F32.F64 R10, R10 ; /* 0x0000000a000a7310 */
/* 0x001e300000301000 */
/*0a00*/ F2F.F64.F32 R14, R14 ; /* 0x0000000e000e7310 */
/* 0x000ff00000201800 */
/*0a10*/ F2F.F64.F32 R12, R10 ; /* 0x0000000a000c7310 */
/* 0x001e240000201800 */
/*0a20*/ DFMA R12, R12, c[0x2][0x0], R14 ; /* 0x008000000c0c7a2b */
/* 0x001e14000000000e */
/*0a30*/ F2F.F32.F64 R13, R12 ; /* 0x0000000c000d7310 */
/* 0x001e240000301000 */
/*0a40*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0011e8000c101904 */
/*0a50*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0a60*/ LDG.E R15, [R2.64+0x4] ; /* 0x00000404020f7981 */
/* 0x000ea8000c1e1900 */
/*0a70*/ LDG.E R18, [R2.64+-0x4] ; /* 0xfffffc0402127981 */
/* 0x000ea8000c1e1900 */
/*0a80*/ LDG.E R20, [R4.64] ; /* 0x0000000404147981 */
/* 0x000ee8000c1e1900 */
/*0a90*/ LDG.E R22, [R6.64] ; /* 0x0000000406167981 */
/* 0x000f28000c1e1900 */
/*0aa0*/ LDG.E R16, [R2.64] ; /* 0x0000000402107981 */
/* 0x000f68000c1e1900 */
/*0ab0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0ac0*/ LDG.E R14, [R2.64] ; /* 0x00000004020e7981 */
/* 0x000f62000c1e1900 */
/*0ad0*/ IADD3 R8, R8, 0x8, RZ ; /* 0x0000000808087810 */
/* 0x000fc80007ffe0ff */
/*0ae0*/ ISETP.NE.AND P0, PT, R8, 0x7d0, PT ; /* 0x000007d00800780c */
/* 0x000fe20003f05270 */
/*0af0*/ FADD R15, R15, R18 ; /* 0x000000120f0f7221 */
/* 0x004fc80000000000 */
/*0b00*/ FADD R15, R15, R20 ; /* 0x000000140f0f7221 */
/* 0x008fc80000000000 */
/*0b10*/ FADD R22, R15, R22 ; /* 0x000000160f167221 */
/* 0x010fe20000000000 */
/*0b20*/ F2F.F64.F32 R10, R16 ; /* 0x00000010000a7310 */
/* 0x020ff00000201800 */
/*0b30*/ F2F.F64.F32 R12, R22 ; /* 0x00000016000c7310 */
/* 0x001e240000201800 */
/*0b40*/ DFMA R10, R12, -0.25, R10 ; /* 0xbfd000000c0a782b */
/* 0x001e14000000000a */
/*0b50*/ F2F.F32.F64 R10, R10 ; /* 0x0000000a000a7310 */
/* 0x001e300000301000 */
/*0b60*/ F2F.F64.F32 R14, R14 ; /* 0x0000000e000e7310 */
/* 0x000ff00000201800 */
/*0b70*/ F2F.F64.F32 R12, R10 ; /* 0x0000000a000c7310 */
/* 0x001e240000201800 */
/*0b80*/ DFMA R12, R12, c[0x2][0x0], R14 ; /* 0x008000000c0c7a2b */
/* 0x001e14000000000e */
/*0b90*/ F2F.F32.F64 R13, R12 ; /* 0x0000000c000d7310 */
/* 0x001e240000301000 */
/*0ba0*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0011e8000c101904 */
/*0bb0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0bc0*/ @P0 BRA 0x190 ; /* 0xfffff5c000000947 */
/* 0x000fea000383ffff */
/*0bd0*/ IMAD R0, R9, c[0x0][0x4], R0 ; /* 0x0000010009007a24 */
/* 0x000fca00078e0200 */
/*0be0*/ ISETP.GE.AND P0, PT, R0, 0x400000, PT ; /* 0x004000000000780c */
/* 0x000fda0003f06270 */
/*0bf0*/ @!P0 BRA 0x70 ; /* 0xfffff47000008947 */
/* 0x000fea000383ffff */
/*0c00*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0c10*/ BRA 0xc10; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0c20*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c30*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c40*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c50*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c60*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c70*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c80*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c90*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ca0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0cb0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0cc0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0cd0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ce0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0cf0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z7SOR_addPf
.globl _Z7SOR_addPf
.p2align 8
.type _Z7SOR_addPf,@function
_Z7SOR_addPf:
s_clause 0x1
s_load_b32 s6, s[0:1], 0x14
s_load_b64 s[2:3], s[0:1], 0x0
v_lshlrev_b32_e32 v1, 1, v0
v_and_b32_e32 v0, 0x3ff, v0
s_add_u32 s4, s0, 8
s_addc_u32 s5, s1, 0
s_mov_b32 s8, 0
s_mov_b32 s7, 0xbfffae14
v_and_or_b32 v0, v1, 0x1ff800, v0
s_waitcnt lgkmcnt(0)
s_and_b32 s0, s6, 0xffff
s_lshr_b32 s1, s6, 16
s_mov_b32 s6, 0x7ae147ae
s_mul_i32 s1, s1, s0
s_branch .LBB0_2
.LBB0_1:
s_or_b32 exec_lo, exec_lo, s9
v_add_nc_u32_e32 v0, s1, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_lt_i32_e32 vcc_lo, 0x3fffff, v0
s_or_b32 s8, vcc_lo, s8
s_and_not1_b32 exec_lo, exec_lo, s8
s_cbranch_execz .LBB0_6
.LBB0_2:
v_and_b32_e32 v1, 0x7ff, v0
v_cmp_lt_i32_e32 vcc_lo, 0x7ff, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_ne_u32_e64 s0, 0, v1
s_and_b32 s0, vcc_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s9, s0
s_cbranch_execz .LBB0_1
v_mul_lo_u32 v1, v0, 0xffbff7ff
v_cmp_gt_i32_e64 s0, 0x3ff801, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_lt_u32_e32 vcc_lo, 0x200400, v1
s_and_b32 s0, s0, vcc_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 exec_lo, exec_lo, s0
s_cbranch_execz .LBB0_1
s_load_b32 s0, s[4:5], 0xc
s_waitcnt lgkmcnt(0)
s_and_b32 s0, s0, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v6, s0, v0
v_subrev_nc_u32_e32 v2, s0, v0
s_movk_i32 s0, 0x7d0
v_mov_b32_e32 v3, v1
v_lshlrev_b64 v[4:5], 2, v[0:1]
v_mov_b32_e32 v7, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[8:9], 2, v[2:3]
v_add_co_u32 v1, vcc_lo, s2, v4
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_ci_u32_e32 v2, vcc_lo, s3, v5, vcc_lo
v_lshlrev_b64 v[5:6], 2, v[6:7]
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_co_u32 v3, vcc_lo, s2, v8
v_add_co_ci_u32_e32 v4, vcc_lo, s3, v9, vcc_lo
v_add_co_u32 v5, vcc_lo, s2, v5
s_delay_alu instid0(VALU_DEP_4)
v_add_co_ci_u32_e32 v6, vcc_lo, s3, v6, vcc_lo
.p2align 6
.LBB0_5:
s_clause 0x3
global_load_b32 v9, v[3:4], off
global_load_b32 v10, v[5:6], off
global_load_b64 v[7:8], v[1:2], off
global_load_b32 v11, v[1:2], off offset:-4
s_waitcnt vmcnt(0)
s_barrier
buffer_gl0_inv
global_load_b32 v12, v[1:2], off
s_add_i32 s0, s0, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
s_cmp_lg_u32 s0, 0
v_add_f32_e32 v8, v11, v8
v_add_f32_e32 v8, v8, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_f32_e32 v9, v8, v10
v_cvt_f64_f32_e32 v[7:8], v7
v_cvt_f64_f32_e32 v[9:10], v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[7:8], v[9:10], 0xbfd00000, v[7:8]
v_cvt_f32_f64_e32 v9, v[7:8]
s_waitcnt vmcnt(0)
v_cvt_f64_f32_e32 v[7:8], v12
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_f64_f32_e32 v[9:10], v9
v_fma_f64 v[7:8], v[9:10], s[6:7], v[7:8]
s_delay_alu instid0(VALU_DEP_1)
v_cvt_f32_f64_e32 v7, v[7:8]
global_store_b32 v[1:2], v7, off
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB0_5
s_branch .LBB0_1
.LBB0_6:
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z7SOR_addPf
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 264
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 13
.amdhsa_next_free_sgpr 10
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z7SOR_addPf, .Lfunc_end0-_Z7SOR_addPf
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: hidden_block_count_x
- .offset: 12
.size: 4
.value_kind: hidden_block_count_y
- .offset: 16
.size: 4
.value_kind: hidden_block_count_z
- .offset: 20
.size: 2
.value_kind: hidden_group_size_x
- .offset: 22
.size: 2
.value_kind: hidden_group_size_y
- .offset: 24
.size: 2
.value_kind: hidden_group_size_z
- .offset: 26
.size: 2
.value_kind: hidden_remainder_x
- .offset: 28
.size: 2
.value_kind: hidden_remainder_y
- .offset: 30
.size: 2
.value_kind: hidden_remainder_z
- .offset: 48
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 72
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 264
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z7SOR_addPf
.private_segment_fixed_size: 0
.sgpr_count: 12
.sgpr_spill_count: 0
.symbol: _Z7SOR_addPf.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 13
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00012165_00000000-6_cuda_SOR.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2063:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2063:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata._Z9gpuAssert9cudaErrorPcib.str1.1,"aMS",@progbits,1
.LC0:
.string "CUDA_SAFE_CALL: %s %s %d\n"
.section .text._Z9gpuAssert9cudaErrorPcib,"axG",@progbits,_Z9gpuAssert9cudaErrorPcib,comdat
.weak _Z9gpuAssert9cudaErrorPcib
.type _Z9gpuAssert9cudaErrorPcib, @function
_Z9gpuAssert9cudaErrorPcib:
.LFB2057:
.cfi_startproc
endbr64
testl %edi, %edi
jne .L9
ret
.L9:
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $8, %rsp
.cfi_def_cfa_offset 48
movl %edi, %ebx
movq %rsi, %r13
movl %edx, %r12d
movl %ecx, %ebp
call cudaGetErrorString@PLT
movq %rax, %rcx
movl %r12d, %r9d
movq %r13, %r8
leaq .LC0(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
testb %bpl, %bpl
jne .L10
addq $8, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L10:
.cfi_restore_state
movl %ebx, %edi
call exit@PLT
.cfi_endproc
.LFE2057:
.size _Z9gpuAssert9cudaErrorPcib, .-_Z9gpuAssert9cudaErrorPcib
.text
.globl _Z17initializeArray1DPfii
.type _Z17initializeArray1DPfii, @function
_Z17initializeArray1DPfii:
.LFB2059:
.cfi_startproc
endbr64
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
movq %rdi, %r12
movl %esi, %ebp
movl %edx, %edi
call srand@PLT
testl %ebp, %ebp
jle .L11
movq %r12, %rbx
movslq %ebp, %rbp
leaq (%r12,%rbp,4), %rbp
.L13:
call rand@PLT
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
movss %xmm0, (%rbx)
addq $4, %rbx
cmpq %rbp, %rbx
jne .L13
.L11:
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2059:
.size _Z17initializeArray1DPfii, .-_Z17initializeArray1DPfii
.globl _Z4diff8timespecS_
.type _Z4diff8timespecS_, @function
_Z4diff8timespecS_:
.LFB2060:
.cfi_startproc
endbr64
movq %rdx, %rax
subq %rdi, %rax
movq %rcx, %r8
subq %rsi, %r8
js .L19
.L18:
movq %r8, %rdx
ret
.L19:
leaq -1(%rax), %rax
leaq 1000000000(%rcx), %r8
subq %rsi, %r8
jmp .L18
.cfi_endproc
.LFE2060:
.size _Z4diff8timespecS_, .-_Z4diff8timespecS_
.globl _Z26__device_stub__Z7SOR_addPfPf
.type _Z26__device_stub__Z7SOR_addPfPf, @function
_Z26__device_stub__Z7SOR_addPfPf:
.LFB2085:
.cfi_startproc
endbr64
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 8(%rsp)
movq %fs:40, %rax
movq %rax, 88(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L24
.L20:
movq 88(%rsp), %rax
subq %fs:40, %rax
jne .L25
addq $104, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L24:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 120
pushq 24(%rsp)
.cfi_def_cfa_offset 128
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z7SOR_addPf(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 112
jmp .L20
.L25:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2085:
.size _Z26__device_stub__Z7SOR_addPfPf, .-_Z26__device_stub__Z7SOR_addPfPf
.globl _Z7SOR_addPf
.type _Z7SOR_addPf, @function
_Z7SOR_addPf:
.LFB2086:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z26__device_stub__Z7SOR_addPfPf
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2086:
.size _Z7SOR_addPf, .-_Z7SOR_addPf
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "Length of the array = %d\n"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC2:
.string "/home/ubuntu/Datasets/stackv2/train-structured/bswain12/EC527---High-Performance-Programming-with-Multicores-and-GPUs/master/Gaur_Abhishek_Lab7/cuda_SOR.cu"
.section .rodata.str1.1
.LC3:
.string "\ncp1"
.LC4:
.string "\ncp2"
.LC5:
.string "\ncp4"
.LC6:
.string "\nInitializing the arrays ..."
.LC7:
.string "\t... done\n\n"
.LC8:
.string "\nGPU time: %f (msec)\n"
.LC9:
.string "\ncalculating results on host\n"
.LC13:
.string "%lf\n"
.text
.globl main
.type main, @function
main:
.LFB2058:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $104, %rsp
.cfi_def_cfa_offset 144
movq %fs:40, %rdx
movq %rdx, 88(%rsp)
xorl %edx, %edx
movl $4194304, %r12d
cmpl $1, %edi
jg .L40
.L29:
movl %r12d, %edx
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call cudaSetDevice@PLT
movl %eax, %edi
movl $1, %ecx
movl $84, %edx
leaq .LC2(%rip), %r13
movq %r13, %rsi
call _Z9gpuAssert9cudaErrorPcib
movslq %r12d, %rbp
salq $2, %rbp
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq 24(%rsp), %rdi
movq %rbp, %rsi
call cudaMalloc@PLT
movl %eax, %edi
movl $1, %ecx
movl $88, %edx
movq %r13, %rsi
call _Z9gpuAssert9cudaErrorPcib
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %rbp, %rdi
call malloc@PLT
movq %rax, %rbx
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC6(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $2453, %edx
movl %r12d, %esi
movq %rbx, %rdi
call _Z17initializeArray1DPfii
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq 8(%rsp), %rdi
call cudaEventCreate@PLT
leaq 16(%rsp), %rdi
call cudaEventCreate@PLT
movl $0, %esi
movq 8(%rsp), %rdi
call cudaEventRecord@PLT
movl $1, %ecx
movq %rbp, %rdx
movq %rbx, %rsi
movq 24(%rsp), %rdi
call cudaMemcpy@PLT
movl %eax, %edi
movl $1, %ecx
movl $112, %edx
movq %r13, %rsi
call _Z9gpuAssert9cudaErrorPcib
movl $16, 36(%rsp)
movl $16, 40(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 36(%rsp), %rdx
movl $1, %ecx
movq 64(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L41
.L30:
call cudaPeekAtLastError@PLT
movl %eax, %edi
movl $1, %ecx
movl $118, %edx
leaq .LC2(%rip), %r12
movq %r12, %rsi
call _Z9gpuAssert9cudaErrorPcib
movl $2, %ecx
movq %rbp, %rdx
movq 24(%rsp), %rsi
movq %rbx, %rdi
call cudaMemcpy@PLT
movl %eax, %edi
movl $1, %ecx
movl $121, %edx
movq %r12, %rsi
call _Z9gpuAssert9cudaErrorPcib
movl $0, %esi
movq 16(%rsp), %rdi
call cudaEventRecord@PLT
movq 16(%rsp), %rdi
call cudaEventSynchronize@PLT
leaq 4(%rsp), %rdi
movq 16(%rsp), %rdx
movq 8(%rsp), %rsi
call cudaEventElapsedTime@PLT
pxor %xmm0, %xmm0
cvtss2sd 4(%rsp), %xmm0
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq 8(%rsp), %rdi
call cudaEventDestroy@PLT
movq 16(%rsp), %rdi
call cudaEventDestroy@PLT
leaq .LC9(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq 48(%rsp), %rsi
movl $0, %edi
call clock_gettime@PLT
movl $2000, %esi
movsd .LC10(%rip), %xmm4
movsd .LC11(%rip), %xmm3
jmp .L31
.L40:
movq 8(%rsi), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movl %eax, %r12d
jmp .L29
.L41:
movq 24(%rsp), %rdi
call _Z26__device_stub__Z7SOR_addPfPf
jmp .L30
.L42:
addq $8192, %rdx
cmpq $4192256, %rcx
je .L33
.L35:
addq $2048, %rcx
leaq -8184(%rdx), %rax
.L32:
pxor %xmm2, %xmm2
cvtss2sd 4(%rax), %xmm2
movss -8188(%rax), %xmm0
addss 8196(%rax), %xmm0
addss 8(%rax), %xmm0
addss (%rax), %xmm0
cvtss2sd %xmm0, %xmm0
mulsd %xmm4, %xmm0
movapd %xmm2, %xmm1
subsd %xmm0, %xmm1
pxor %xmm0, %xmm0
cvtsd2ss %xmm1, %xmm0
cvtss2sd %xmm0, %xmm0
mulsd %xmm3, %xmm0
subsd %xmm0, %xmm2
cvtsd2ss %xmm2, %xmm2
movss %xmm2, 4(%rax)
addq $4, %rax
cmpq %rdx, %rax
jne .L32
jmp .L42
.L33:
subl $1, %esi
je .L34
.L31:
leaq 16376(%rbx), %rdx
movl $2048, %ecx
jmp .L35
.L34:
leaq 64(%rsp), %rsi
movl $0, %edi
call clock_gettime@PLT
movq 64(%rsp), %rdx
movq 72(%rsp), %rcx
movq 48(%rsp), %rdi
movq 56(%rsp), %rsi
call _Z4diff8timespecS_
imulq $1000000000, %rax, %rax
addq %rdx, %rax
pxor %xmm0, %xmm0
cvtsi2sdq %rax, %xmm0
divsd .LC12(%rip), %xmm0
leaq .LC13(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq 24(%rsp), %rdi
call cudaFree@PLT
movl %eax, %edi
movl $1, %ecx
movl $159, %edx
leaq .LC2(%rip), %rsi
call _Z9gpuAssert9cudaErrorPcib
movq %rbx, %rdi
call free@PLT
movq 88(%rsp), %rax
subq %fs:40, %rax
jne .L43
movl $0, %eax
addq $104, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L43:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2058:
.size main, .-main
.section .rodata.str1.1
.LC14:
.string "_Z7SOR_addPf"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2088:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC14(%rip), %rdx
movq %rdx, %rcx
leaq _Z7SOR_addPf(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2088:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC10:
.long 0
.long 1070596096
.align 8
.LC11:
.long 2061584302
.long 1073720852
.align 8
.LC12:
.long 0
.long 1093567616
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "cuda_SOR.hip"
.globl _Z22__device_stub__SOR_addPf # -- Begin function _Z22__device_stub__SOR_addPf
.p2align 4, 0x90
.type _Z22__device_stub__SOR_addPf,@function
_Z22__device_stub__SOR_addPf: # @_Z22__device_stub__SOR_addPf
.cfi_startproc
# %bb.0:
subq $72, %rsp
.cfi_def_cfa_offset 80
movq %rdi, 64(%rsp)
leaq 64(%rsp), %rax
movq %rax, (%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
movq %rsp, %r9
movl $_Z7SOR_addPf, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $88, %rsp
.cfi_adjust_cfa_offset -88
retq
.Lfunc_end0:
.size _Z22__device_stub__SOR_addPf, .Lfunc_end0-_Z22__device_stub__SOR_addPf
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI1_0:
.quad 0xbfd0000000000000 # double -0.25
.LCPI1_1:
.quad 0xbfffae147ae147ae # double -1.98
.LCPI1_2:
.quad 0x412e848000000000 # double 1.0E+6
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r12
.cfi_def_cfa_offset 40
pushq %rbx
.cfi_def_cfa_offset 48
subq $96, %rsp
.cfi_def_cfa_offset 144
.cfi_offset %rbx, -48
.cfi_offset %r12, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl $4194304, %r15d # imm = 0x400000
cmpl $2, %edi
jl .LBB1_2
# %bb.1:
movq 8(%rsi), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %r15
.LBB1_2:
movl $.L.str, %edi
movl %r15d, %esi
xorl %eax, %eax
callq printf
movl $1, %edi
callq hipSetDevice
testl %eax, %eax
jne .LBB1_3
# %bb.5: # %_Z9gpuAssert10hipError_tPcib.exit
movslq %r15d, %r14
shlq $2, %r14
movl $.L.str.2, %edi
xorl %eax, %eax
callq printf
movq %rsp, %rdi
movq %r14, %rsi
callq hipMalloc
testl %eax, %eax
jne .LBB1_6
# %bb.7: # %_Z9gpuAssert10hipError_tPcib.exit63
movl $.L.str.3, %edi
xorl %eax, %eax
callq printf
movq %r14, %rdi
callq malloc
movq %rax, %rbx
movl $.L.str.4, %edi
xorl %eax, %eax
callq printf
movl $.L.str.5, %edi
xorl %eax, %eax
callq printf
movl $2453, %edi # imm = 0x995
callq srand
testl %r15d, %r15d
jle .LBB1_10
# %bb.8: # %.lr.ph.preheader.i
movl %r15d, %r15d
xorl %r12d, %r12d
.p2align 4, 0x90
.LBB1_9: # %.lr.ph.i
# =>This Inner Loop Header: Depth=1
callq rand
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
movss %xmm0, (%rbx,%r12,4)
incq %r12
cmpq %r12, %r15
jne .LBB1_9
.LBB1_10: # %_Z17initializeArray1DPfii.exit
movl $.Lstr, %edi
callq puts@PLT
leaq 16(%rsp), %rdi
callq hipEventCreate
leaq 8(%rsp), %rdi
callq hipEventCreate
movq 16(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq (%rsp), %rdi
movq %rbx, %rsi
movq %r14, %rdx
movl $1, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB1_11
# %bb.12: # %_Z9gpuAssert10hipError_tPcib.exit65
movabsq $4294967297, %rdi # imm = 0x100000001
movabsq $68719476752, %rdx # imm = 0x1000000010
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_14
# %bb.13:
leaq 24(%rsp), %rax
movq (%rsp), %rcx
movq %rcx, 24(%rsp)
movq %rax, 64(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 88(%rsp), %rdx
leaq 80(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z7SOR_addPf, %edi
pushq 80(%rsp)
.cfi_adjust_cfa_offset 8
pushq 96(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_14:
callq hipPeekAtLastError
testl %eax, %eax
jne .LBB1_15
# %bb.16: # %_Z9gpuAssert10hipError_tPcib.exit67
movq (%rsp), %rsi
movq %rbx, %rdi
movq %r14, %rdx
movl $2, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB1_17
# %bb.18: # %_Z9gpuAssert10hipError_tPcib.exit69
movq 8(%rsp), %rdi
xorl %r14d, %r14d
xorl %esi, %esi
callq hipEventRecord
movq 8(%rsp), %rdi
callq hipEventSynchronize
movq 16(%rsp), %rsi
movq 8(%rsp), %rdx
leaq 24(%rsp), %rdi
callq hipEventElapsedTime
movss 24(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.7, %edi
movb $1, %al
callq printf
movq 16(%rsp), %rdi
callq hipEventDestroy
movq 8(%rsp), %rdi
callq hipEventDestroy
movl $.Lstr.1, %edi
callq puts@PLT
leaq 48(%rsp), %rsi
xorl %edi, %edi
callq clock_gettime
movq %rbx, %rax
addq $16388, %rax # imm = 0x4004
movsd .LCPI1_0(%rip), %xmm0 # xmm0 = mem[0],zero
movsd .LCPI1_1(%rip), %xmm1 # xmm1 = mem[0],zero
.p2align 4, 0x90
.LBB1_19: # %.preheader73
# =>This Loop Header: Depth=1
# Child Loop BB1_20 Depth 2
# Child Loop BB1_21 Depth 3
movl $1, %ecx
movq %rax, %rdx
xorl %esi, %esi
.p2align 4, 0x90
.LBB1_20: # %.preheader
# Parent Loop BB1_19 Depth=1
# => This Loop Header: Depth=2
# Child Loop BB1_21 Depth 3
movq %rsi, %rdi
shlq $13, %rdi
movss 8192(%rbx,%rdi), %xmm2 # xmm2 = mem[0],zero,zero,zero
movq $-2046, %rdi # imm = 0xF802
.p2align 4, 0x90
.LBB1_21: # Parent Loop BB1_19 Depth=1
# Parent Loop BB1_20 Depth=2
# => This Inner Loop Header: Depth=3
movss -8(%rdx,%rdi,4), %xmm3 # xmm3 = mem[0],zero,zero,zero
cvtss2sd %xmm3, %xmm3
movss -8200(%rdx,%rdi,4), %xmm4 # xmm4 = mem[0],zero,zero,zero
addss 8184(%rdx,%rdi,4), %xmm4
addss -4(%rdx,%rdi,4), %xmm4
addss %xmm2, %xmm4
xorps %xmm2, %xmm2
cvtss2sd %xmm4, %xmm2
mulsd %xmm0, %xmm2
addsd %xmm3, %xmm2
cvtsd2ss %xmm2, %xmm2
cvtss2sd %xmm2, %xmm2
mulsd %xmm1, %xmm2
addsd %xmm3, %xmm2
cvtsd2ss %xmm2, %xmm2
movss %xmm2, -8(%rdx,%rdi,4)
incq %rdi
jne .LBB1_21
# %bb.22: # in Loop: Header=BB1_20 Depth=2
incq %rcx
incq %rsi
addq $8192, %rdx # imm = 0x2000
cmpq $2047, %rcx # imm = 0x7FF
jne .LBB1_20
# %bb.23: # in Loop: Header=BB1_19 Depth=1
incl %r14d
cmpl $2000, %r14d # imm = 0x7D0
jne .LBB1_19
# %bb.24: # %_Z4diff8timespecS_.exit
leaq 32(%rsp), %rsi
xorl %edi, %edi
callq clock_gettime
movq 48(%rsp), %rax
movq 40(%rsp), %rcx
subq 56(%rsp), %rcx
leaq 1000000000(%rcx), %rdx
movq %rax, %rsi
negq %rsi
testq %rcx, %rcx
notq %rax
cmovnsq %rsi, %rax
cmovnsq %rcx, %rdx
addq 32(%rsp), %rax
imulq $1000000000, %rax, %rax # imm = 0x3B9ACA00
addq %rdx, %rax
xorps %xmm0, %xmm0
cvtsi2sd %rax, %xmm0
divsd .LCPI1_2(%rip), %xmm0
movl $.L.str.9, %edi
movb $1, %al
callq printf
movq (%rsp), %rdi
callq hipFree
testl %eax, %eax
jne .LBB1_25
# %bb.26: # %_Z9gpuAssert10hipError_tPcib.exit71
movq %rbx, %rdi
callq free
xorl %eax, %eax
addq $96, %rsp
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB1_3:
.cfi_def_cfa_offset 144
movq stderr(%rip), %rbx
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
movl $.L.str.10, %esi
movl $.L.str.1, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $86, %r8d
jmp .LBB1_4
.LBB1_6:
movq stderr(%rip), %rbx
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
movl $.L.str.10, %esi
movl $.L.str.1, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $90, %r8d
jmp .LBB1_4
.LBB1_11:
movq stderr(%rip), %rbx
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
movl $.L.str.10, %esi
movl $.L.str.1, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $114, %r8d
jmp .LBB1_4
.LBB1_15:
movq stderr(%rip), %rbx
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
movl $.L.str.10, %esi
movl $.L.str.1, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $120, %r8d
jmp .LBB1_4
.LBB1_17:
movq stderr(%rip), %rbx
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
movl $.L.str.10, %esi
movl $.L.str.1, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $123, %r8d
jmp .LBB1_4
.LBB1_25:
movq stderr(%rip), %rbx
movl %eax, %edi
movl %eax, %ebp
callq hipGetErrorString
movl $.L.str.10, %esi
movl $.L.str.1, %ecx
movq %rbx, %rdi
movq %rax, %rdx
movl $161, %r8d
.LBB1_4:
xorl %eax, %eax
callq fprintf
movl %ebp, %edi
callq exit
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.globl _Z17initializeArray1DPfii # -- Begin function _Z17initializeArray1DPfii
.p2align 4, 0x90
.type _Z17initializeArray1DPfii,@function
_Z17initializeArray1DPfii: # @_Z17initializeArray1DPfii
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %rbx
.cfi_def_cfa_offset 40
pushq %rax
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %esi, %ebp
movq %rdi, %rbx
movl %edx, %edi
callq srand
testl %ebp, %ebp
jle .LBB2_3
# %bb.1: # %.lr.ph.preheader
movl %ebp, %r14d
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB2_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
callq rand
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
movss %xmm0, (%rbx,%r15,4)
incq %r15
cmpq %r15, %r14
jne .LBB2_2
.LBB2_3: # %._crit_edge
addq $8, %rsp
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end2:
.size _Z17initializeArray1DPfii, .Lfunc_end2-_Z17initializeArray1DPfii
.cfi_endproc
# -- End function
.globl _Z4diff8timespecS_ # -- Begin function _Z4diff8timespecS_
.p2align 4, 0x90
.type _Z4diff8timespecS_,@function
_Z4diff8timespecS_: # @_Z4diff8timespecS_
.cfi_startproc
# %bb.0:
movq %rdx, %r8
movq %rdi, %rax
movq %rcx, %rdx
subq %rsi, %rdx
js .LBB3_1
# %bb.2:
subq %rax, %r8
movq %r8, %rax
retq
.LBB3_1:
notq %rax
addq %r8, %rax
subq %rsi, %rcx
addq $1000000000, %rcx # imm = 0x3B9ACA00
movq %rcx, %rdx
retq
.Lfunc_end3:
.size _Z4diff8timespecS_, .Lfunc_end3-_Z4diff8timespecS_
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB4_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB4_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z7SOR_addPf, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end4:
.size __hip_module_ctor, .Lfunc_end4-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB5_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB5_2:
retq
.Lfunc_end5:
.size __hip_module_dtor, .Lfunc_end5-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z7SOR_addPf,@object # @_Z7SOR_addPf
.section .rodata,"a",@progbits
.globl _Z7SOR_addPf
.p2align 3, 0x0
_Z7SOR_addPf:
.quad _Z22__device_stub__SOR_addPf
.size _Z7SOR_addPf, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Length of the array = %d\n"
.size .L.str, 26
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "/home/ubuntu/Datasets/stackv2/train-structured-repos-hip/bswain12/EC527---High-Performance-Programming-with-Multicores-and-GPUs/master/Gaur_Abhishek_Lab7/cuda_SOR.hip"
.size .L.str.1, 167
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "\ncp1"
.size .L.str.2, 5
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "\ncp2"
.size .L.str.3, 5
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "\ncp4"
.size .L.str.4, 5
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "\nInitializing the arrays ..."
.size .L.str.5, 29
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz "\nGPU time: %f (msec)\n"
.size .L.str.7, 22
.type .L.str.9,@object # @.str.9
.L.str.9:
.asciz "%lf\n"
.size .L.str.9, 5
.type .L.str.10,@object # @.str.10
.L.str.10:
.asciz "CUDA_SAFE_CALL: %s %s %d\n"
.size .L.str.10, 26
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z7SOR_addPf"
.size .L__unnamed_1, 13
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "\t... done\n"
.size .Lstr, 11
.type .Lstr.1,@object # @str.1
.Lstr.1:
.asciz "\ncalculating results on host"
.size .Lstr.1, 29
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z22__device_stub__SOR_addPf
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z7SOR_addPf
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
__global__ void addBlockThread(int* data) {
int ind = blockDim.x * blockIdx.x + threadIdx.x;
int sum = blockIdx.x + threadIdx.x;
data[ind] = sum;
printf("%6d %6d %6d\n", blockIdx.x, threadIdx.x, sum);
}
int main() {
int num_blocks = 2;
int num_threads = 8;
dim3 dimGrid(num_blocks);
dim3 dimBlock(num_threads);
int num_ints = num_blocks * num_threads;
int hostArray[num_ints];
int* devArray;
// Allocate memory on the device. devArray is a pointer to the allocated
// memory.
cudaMalloc((void**)&devArray, sizeof(int) * num_ints);
// Invoke the device kernel which adds the block and thread indices
printf("\nValues written to the device array:\n");
printf("%6s %6s %6s\n", "Block", "Thread", "Sum");
addBlockThread <<<dimGrid, dimBlock>>> (devArray);
// Bring the results pointed to by devArray back to hostArray
cudaMemcpy(&hostArray, devArray, sizeof(int) * num_ints,
cudaMemcpyDeviceToHost);
// Print the results
printf("\nValues stored in the host array:\n");
for (int i = 0; i < num_ints; i++) printf("%d ", hostArray[i]);
printf("\n");
// Free the device memory
cudaFree(devArray);
return 0;
} | code for sm_80
Function : _Z14addBlockThreadPi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R11, SR_TID.X ; /* 0x00000000000b7919 */
/* 0x000e220000002100 */
/*0020*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */
/* 0x000fe200078e00ff */
/*0030*/ MOV R8, 0x0 ; /* 0x0000000000087802 */
/* 0x000fe20000000f00 */
/*0040*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0050*/ S2R R10, SR_CTAID.X ; /* 0x00000000000a7919 */
/* 0x000e220000002500 */
/*0060*/ IADD3 R1, R1, -0x10, RZ ; /* 0xfffffff001017810 */
/* 0x000fe20007ffe0ff */
/*0070*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x4][0x8] ; /* 0x01000200ff047624 */
/* 0x000fe400078e00ff */
/*0080*/ LDC.64 R8, c[0x4][R8] ; /* 0x0100000008087b82 */
/* 0x000e620000000a00 */
/*0090*/ IADD3 R6, P0, R1, c[0x0][0x20], RZ ; /* 0x0000080001067a10 */
/* 0x000fe20007f1e0ff */
/*00a0*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x4][0xc] ; /* 0x01000300ff057624 */
/* 0x000fc800078e00ff */
/*00b0*/ IMAD.X R7, RZ, RZ, c[0x0][0x24], P0 ; /* 0x00000900ff077624 */
/* 0x000fe400000e06ff */
/*00c0*/ IMAD R2, R10, c[0x0][0x0], R11 ; /* 0x000000000a027a24 */
/* 0x001fe200078e020b */
/*00d0*/ STL.64 [R1], R10 ; /* 0x0000000a01007387 */
/* 0x0001e20000100a00 */
/*00e0*/ IMAD.IADD R0, R11, 0x1, R10 ; /* 0x000000010b007824 */
/* 0x000fe400078e020a */
/*00f0*/ IMAD.WIDE R2, R2, R3, c[0x0][0x160] ; /* 0x0000580002027625 */
/* 0x000fc600078e0203 */
/*0100*/ STL [R1+0x8], R0 ; /* 0x0000080001007387 */
/* 0x0001e80000100800 */
/*0110*/ STG.E [R2.64], R0 ; /* 0x0000000002007986 */
/* 0x0001e4000c101904 */
/*0120*/ LEPC R2 ; /* 0x000000000002734e */
/* 0x003fe40000000000 */
/*0130*/ MOV R11, 0x1a0 ; /* 0x000001a0000b7802 */
/* 0x000fe40000000f00 */
/*0140*/ MOV R20, 0x120 ; /* 0x0000012000147802 */
/* 0x000fe40000000f00 */
/*0150*/ MOV R21, 0x0 ; /* 0x0000000000157802 */
/* 0x000fe40000000f00 */
/*0160*/ MOV R0, 0x0 ; /* 0x0000000000007802 */
/* 0x000fc40000000f00 */
/*0170*/ IADD3 R20, P0, P1, -R20, R11, R2 ; /* 0x0000000b14147210 */
/* 0x000fc8000791e102 */
/*0180*/ IADD3.X R21, ~R0, R21, R3, P0, P1 ; /* 0x0000001500157210 */
/* 0x000fc800007e2503 */
/*0190*/ CALL.ABS.NOINC R8 ; /* 0x0000000008007343 */
/* 0x000fea0003c00000 */
/*01a0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*01b0*/ BRA 0x1b0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*01c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0200*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0210*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0220*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0230*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0240*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0250*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0260*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0270*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
__global__ void addBlockThread(int* data) {
int ind = blockDim.x * blockIdx.x + threadIdx.x;
int sum = blockIdx.x + threadIdx.x;
data[ind] = sum;
printf("%6d %6d %6d\n", blockIdx.x, threadIdx.x, sum);
}
int main() {
int num_blocks = 2;
int num_threads = 8;
dim3 dimGrid(num_blocks);
dim3 dimBlock(num_threads);
int num_ints = num_blocks * num_threads;
int hostArray[num_ints];
int* devArray;
// Allocate memory on the device. devArray is a pointer to the allocated
// memory.
cudaMalloc((void**)&devArray, sizeof(int) * num_ints);
// Invoke the device kernel which adds the block and thread indices
printf("\nValues written to the device array:\n");
printf("%6s %6s %6s\n", "Block", "Thread", "Sum");
addBlockThread <<<dimGrid, dimBlock>>> (devArray);
// Bring the results pointed to by devArray back to hostArray
cudaMemcpy(&hostArray, devArray, sizeof(int) * num_ints,
cudaMemcpyDeviceToHost);
// Print the results
printf("\nValues stored in the host array:\n");
for (int i = 0; i < num_ints; i++) printf("%d ", hostArray[i]);
printf("\n");
// Free the device memory
cudaFree(devArray);
return 0;
} | .file "tmpxft_000cf0fe_00000000-6_p1.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z34__device_stub__Z14addBlockThreadPiPi
.type _Z34__device_stub__Z14addBlockThreadPiPi, @function
_Z34__device_stub__Z14addBlockThreadPiPi:
.LFB2082:
.cfi_startproc
endbr64
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 8(%rsp)
movq %fs:40, %rax
movq %rax, 88(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 88(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $104, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 120
pushq 24(%rsp)
.cfi_def_cfa_offset 128
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z14addBlockThreadPi(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 112
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z34__device_stub__Z14addBlockThreadPiPi, .-_Z34__device_stub__Z14addBlockThreadPiPi
.globl _Z14addBlockThreadPi
.type _Z14addBlockThreadPi, @function
_Z14addBlockThreadPi:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z34__device_stub__Z14addBlockThreadPiPi
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z14addBlockThreadPi, .-_Z14addBlockThreadPi
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "\nValues written to the device array:\n"
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "Sum"
.LC2:
.string "Thread"
.LC3:
.string "Block"
.LC4:
.string "%6s %6s %6s\n"
.section .rodata.str1.8
.align 8
.LC5:
.string "\nValues stored in the host array:\n"
.section .rodata.str1.1
.LC6:
.string "%d "
.LC7:
.string "\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
subq $112, %rsp
.cfi_def_cfa_offset 144
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
movl $2, 8(%rsp)
movl $1, 12(%rsp)
movl $1, 16(%rsp)
movl $8, 20(%rsp)
movl $1, 24(%rsp)
movl $1, 28(%rsp)
movq %rsp, %rdi
movl $64, %esi
call cudaMalloc@PLT
leaq .LC0(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC1(%rip), %r8
leaq .LC2(%rip), %rcx
leaq .LC3(%rip), %rdx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 28(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 20(%rsp), %rdx
movq 8(%rsp), %rdi
movl 16(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L17
.L12:
leaq 32(%rsp), %rbx
movl $2, %ecx
movl $64, %edx
movq (%rsp), %rsi
movq %rbx, %rdi
call cudaMemcpy@PLT
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq 96(%rsp), %r12
leaq .LC6(%rip), %rbp
.L13:
movl (%rbx), %edx
movq %rbp, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $4, %rbx
cmpq %r12, %rbx
jne .L13
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq (%rsp), %rdi
call cudaFree@PLT
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L18
movl $0, %eax
addq $112, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.L17:
.cfi_restore_state
movq (%rsp), %rdi
call _Z34__device_stub__Z14addBlockThreadPiPi
jmp .L12
.L18:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.1
.LC8:
.string "_Z14addBlockThreadPi"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC8(%rip), %rdx
movq %rdx, %rcx
leaq _Z14addBlockThreadPi(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
__global__ void addBlockThread(int* data) {
int ind = blockDim.x * blockIdx.x + threadIdx.x;
int sum = blockIdx.x + threadIdx.x;
data[ind] = sum;
printf("%6d %6d %6d\n", blockIdx.x, threadIdx.x, sum);
}
int main() {
int num_blocks = 2;
int num_threads = 8;
dim3 dimGrid(num_blocks);
dim3 dimBlock(num_threads);
int num_ints = num_blocks * num_threads;
int hostArray[num_ints];
int* devArray;
// Allocate memory on the device. devArray is a pointer to the allocated
// memory.
cudaMalloc((void**)&devArray, sizeof(int) * num_ints);
// Invoke the device kernel which adds the block and thread indices
printf("\nValues written to the device array:\n");
printf("%6s %6s %6s\n", "Block", "Thread", "Sum");
addBlockThread <<<dimGrid, dimBlock>>> (devArray);
// Bring the results pointed to by devArray back to hostArray
cudaMemcpy(&hostArray, devArray, sizeof(int) * num_ints,
cudaMemcpyDeviceToHost);
// Print the results
printf("\nValues stored in the host array:\n");
for (int i = 0; i < num_ints; i++) printf("%d ", hostArray[i]);
printf("\n");
// Free the device memory
cudaFree(devArray);
return 0;
} | #include <hip/hip_runtime.h>
#include <stdio.h>
__global__ void addBlockThread(int* data) {
int ind = blockDim.x * blockIdx.x + threadIdx.x;
int sum = blockIdx.x + threadIdx.x;
data[ind] = sum;
printf("%6d %6d %6d\n", blockIdx.x, threadIdx.x, sum);
}
int main() {
int num_blocks = 2;
int num_threads = 8;
dim3 dimGrid(num_blocks);
dim3 dimBlock(num_threads);
int num_ints = num_blocks * num_threads;
int hostArray[num_ints];
int* devArray;
// Allocate memory on the device. devArray is a pointer to the allocated
// memory.
hipMalloc((void**)&devArray, sizeof(int) * num_ints);
// Invoke the device kernel which adds the block and thread indices
printf("\nValues written to the device array:\n");
printf("%6s %6s %6s\n", "Block", "Thread", "Sum");
addBlockThread <<<dimGrid, dimBlock>>> (devArray);
// Bring the results pointed to by devArray back to hostArray
hipMemcpy(&hostArray, devArray, sizeof(int) * num_ints,
hipMemcpyDeviceToHost);
// Print the results
printf("\nValues stored in the host array:\n");
for (int i = 0; i < num_ints; i++) printf("%d ", hostArray[i]);
printf("\n");
// Free the device memory
hipFree(devArray);
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
__global__ void addBlockThread(int* data) {
int ind = blockDim.x * blockIdx.x + threadIdx.x;
int sum = blockIdx.x + threadIdx.x;
data[ind] = sum;
printf("%6d %6d %6d\n", blockIdx.x, threadIdx.x, sum);
}
int main() {
int num_blocks = 2;
int num_threads = 8;
dim3 dimGrid(num_blocks);
dim3 dimBlock(num_threads);
int num_ints = num_blocks * num_threads;
int hostArray[num_ints];
int* devArray;
// Allocate memory on the device. devArray is a pointer to the allocated
// memory.
hipMalloc((void**)&devArray, sizeof(int) * num_ints);
// Invoke the device kernel which adds the block and thread indices
printf("\nValues written to the device array:\n");
printf("%6s %6s %6s\n", "Block", "Thread", "Sum");
addBlockThread <<<dimGrid, dimBlock>>> (devArray);
// Bring the results pointed to by devArray back to hostArray
hipMemcpy(&hostArray, devArray, sizeof(int) * num_ints,
hipMemcpyDeviceToHost);
// Print the results
printf("\nValues stored in the host array:\n");
for (int i = 0; i < num_ints; i++) printf("%d ", hostArray[i]);
printf("\n");
// Free the device memory
hipFree(devArray);
return 0;
} | .text
.file "p1.hip"
.globl _Z29__device_stub__addBlockThreadPi # -- Begin function _Z29__device_stub__addBlockThreadPi
.p2align 4, 0x90
.type _Z29__device_stub__addBlockThreadPi,@function
_Z29__device_stub__addBlockThreadPi: # @_Z29__device_stub__addBlockThreadPi
.cfi_startproc
# %bb.0:
subq $72, %rsp
.cfi_def_cfa_offset 80
movq %rdi, 64(%rsp)
leaq 64(%rsp), %rax
movq %rax, (%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
movq %rsp, %r9
movl $_Z14addBlockThreadPi, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $88, %rsp
.cfi_adjust_cfa_offset -88
retq
.Lfunc_end0:
.size _Z29__device_stub__addBlockThreadPi, .Lfunc_end0-_Z29__device_stub__addBlockThreadPi
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $144, %rsp
.cfi_def_cfa_offset 160
.cfi_offset %rbx, -16
leaq 8(%rsp), %rdi
movl $64, %esi
callq hipMalloc
movl $.Lstr, %edi
callq puts@PLT
movl $.L.str.1, %edi
movl $.L.str.2, %esi
movl $.L.str.3, %edx
movl $.L.str.4, %ecx
xorl %eax, %eax
callq printf
movabsq $4294967298, %rdi # imm = 0x100000002
leaq 6(%rdi), %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_2
# %bb.1:
movq 8(%rsp), %rax
movq %rax, 72(%rsp)
leaq 72(%rsp), %rax
movq %rax, 16(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 16(%rsp), %r9
movl $_Z14addBlockThreadPi, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_2:
movq 8(%rsp), %rsi
leaq 80(%rsp), %rdi
movl $64, %edx
movl $2, %ecx
callq hipMemcpy
movl $.Lstr.1, %edi
callq puts@PLT
xorl %ebx, %ebx
.p2align 4, 0x90
.LBB1_3: # =>This Inner Loop Header: Depth=1
movl 80(%rsp,%rbx,4), %esi
movl $.L.str.6, %edi
xorl %eax, %eax
callq printf
incq %rbx
cmpq $16, %rbx
jne .LBB1_3
# %bb.4:
movl $10, %edi
callq putchar@PLT
movq 8(%rsp), %rdi
callq hipFree
xorl %eax, %eax
addq $144, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z14addBlockThreadPi, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z14addBlockThreadPi,@object # @_Z14addBlockThreadPi
.section .rodata,"a",@progbits
.globl _Z14addBlockThreadPi
.p2align 3, 0x0
_Z14addBlockThreadPi:
.quad _Z29__device_stub__addBlockThreadPi
.size _Z14addBlockThreadPi, 8
.type .L.str.1,@object # @.str.1
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.1:
.asciz "%6s %6s %6s\n"
.size .L.str.1, 15
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "Block"
.size .L.str.2, 6
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "Thread"
.size .L.str.3, 7
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "Sum"
.size .L.str.4, 4
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "%d "
.size .L.str.6, 4
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z14addBlockThreadPi"
.size .L__unnamed_1, 21
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "\nValues written to the device array:"
.size .Lstr, 37
.type .Lstr.1,@object # @str.1
.Lstr.1:
.asciz "\nValues stored in the host array:"
.size .Lstr.1, 34
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z29__device_stub__addBlockThreadPi
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z14addBlockThreadPi
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000cf0fe_00000000-6_p1.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z34__device_stub__Z14addBlockThreadPiPi
.type _Z34__device_stub__Z14addBlockThreadPiPi, @function
_Z34__device_stub__Z14addBlockThreadPiPi:
.LFB2082:
.cfi_startproc
endbr64
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 8(%rsp)
movq %fs:40, %rax
movq %rax, 88(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 88(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $104, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 120
pushq 24(%rsp)
.cfi_def_cfa_offset 128
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z14addBlockThreadPi(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 112
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z34__device_stub__Z14addBlockThreadPiPi, .-_Z34__device_stub__Z14addBlockThreadPiPi
.globl _Z14addBlockThreadPi
.type _Z14addBlockThreadPi, @function
_Z14addBlockThreadPi:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z34__device_stub__Z14addBlockThreadPiPi
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z14addBlockThreadPi, .-_Z14addBlockThreadPi
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "\nValues written to the device array:\n"
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "Sum"
.LC2:
.string "Thread"
.LC3:
.string "Block"
.LC4:
.string "%6s %6s %6s\n"
.section .rodata.str1.8
.align 8
.LC5:
.string "\nValues stored in the host array:\n"
.section .rodata.str1.1
.LC6:
.string "%d "
.LC7:
.string "\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
subq $112, %rsp
.cfi_def_cfa_offset 144
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
movl $2, 8(%rsp)
movl $1, 12(%rsp)
movl $1, 16(%rsp)
movl $8, 20(%rsp)
movl $1, 24(%rsp)
movl $1, 28(%rsp)
movq %rsp, %rdi
movl $64, %esi
call cudaMalloc@PLT
leaq .LC0(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC1(%rip), %r8
leaq .LC2(%rip), %rcx
leaq .LC3(%rip), %rdx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 28(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 20(%rsp), %rdx
movq 8(%rsp), %rdi
movl 16(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L17
.L12:
leaq 32(%rsp), %rbx
movl $2, %ecx
movl $64, %edx
movq (%rsp), %rsi
movq %rbx, %rdi
call cudaMemcpy@PLT
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq 96(%rsp), %r12
leaq .LC6(%rip), %rbp
.L13:
movl (%rbx), %edx
movq %rbp, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $4, %rbx
cmpq %r12, %rbx
jne .L13
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq (%rsp), %rdi
call cudaFree@PLT
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L18
movl $0, %eax
addq $112, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.L17:
.cfi_restore_state
movq (%rsp), %rdi
call _Z34__device_stub__Z14addBlockThreadPiPi
jmp .L12
.L18:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.1
.LC8:
.string "_Z14addBlockThreadPi"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC8(%rip), %rdx
movq %rdx, %rcx
leaq _Z14addBlockThreadPi(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "p1.hip"
.globl _Z29__device_stub__addBlockThreadPi # -- Begin function _Z29__device_stub__addBlockThreadPi
.p2align 4, 0x90
.type _Z29__device_stub__addBlockThreadPi,@function
_Z29__device_stub__addBlockThreadPi: # @_Z29__device_stub__addBlockThreadPi
.cfi_startproc
# %bb.0:
subq $72, %rsp
.cfi_def_cfa_offset 80
movq %rdi, 64(%rsp)
leaq 64(%rsp), %rax
movq %rax, (%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
movq %rsp, %r9
movl $_Z14addBlockThreadPi, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $88, %rsp
.cfi_adjust_cfa_offset -88
retq
.Lfunc_end0:
.size _Z29__device_stub__addBlockThreadPi, .Lfunc_end0-_Z29__device_stub__addBlockThreadPi
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $144, %rsp
.cfi_def_cfa_offset 160
.cfi_offset %rbx, -16
leaq 8(%rsp), %rdi
movl $64, %esi
callq hipMalloc
movl $.Lstr, %edi
callq puts@PLT
movl $.L.str.1, %edi
movl $.L.str.2, %esi
movl $.L.str.3, %edx
movl $.L.str.4, %ecx
xorl %eax, %eax
callq printf
movabsq $4294967298, %rdi # imm = 0x100000002
leaq 6(%rdi), %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_2
# %bb.1:
movq 8(%rsp), %rax
movq %rax, 72(%rsp)
leaq 72(%rsp), %rax
movq %rax, 16(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 16(%rsp), %r9
movl $_Z14addBlockThreadPi, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_2:
movq 8(%rsp), %rsi
leaq 80(%rsp), %rdi
movl $64, %edx
movl $2, %ecx
callq hipMemcpy
movl $.Lstr.1, %edi
callq puts@PLT
xorl %ebx, %ebx
.p2align 4, 0x90
.LBB1_3: # =>This Inner Loop Header: Depth=1
movl 80(%rsp,%rbx,4), %esi
movl $.L.str.6, %edi
xorl %eax, %eax
callq printf
incq %rbx
cmpq $16, %rbx
jne .LBB1_3
# %bb.4:
movl $10, %edi
callq putchar@PLT
movq 8(%rsp), %rdi
callq hipFree
xorl %eax, %eax
addq $144, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z14addBlockThreadPi, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z14addBlockThreadPi,@object # @_Z14addBlockThreadPi
.section .rodata,"a",@progbits
.globl _Z14addBlockThreadPi
.p2align 3, 0x0
_Z14addBlockThreadPi:
.quad _Z29__device_stub__addBlockThreadPi
.size _Z14addBlockThreadPi, 8
.type .L.str.1,@object # @.str.1
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.1:
.asciz "%6s %6s %6s\n"
.size .L.str.1, 15
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "Block"
.size .L.str.2, 6
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "Thread"
.size .L.str.3, 7
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "Sum"
.size .L.str.4, 4
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "%d "
.size .L.str.6, 4
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z14addBlockThreadPi"
.size .L__unnamed_1, 21
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "\nValues written to the device array:"
.size .Lstr, 37
.type .Lstr.1,@object # @str.1
.Lstr.1:
.asciz "\nValues stored in the host array:"
.size .Lstr.1, 34
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z29__device_stub__addBlockThreadPi
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z14addBlockThreadPi
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <cuda_runtime.h>
int main(){
printf("hello world\n");
return 0;
} | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <cuda_runtime.h>
int main(){
printf("hello world\n");
return 0;
} | .file "tmpxft_001ad415_00000000-6_hello.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "hello world\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq .LC0(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $0, %eax
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2057:
.size main, .-main
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <cuda_runtime.h>
int main(){
printf("hello world\n");
return 0;
} | #include <stdio.h>
#include <hip/hip_runtime.h>
int main(){
printf("hello world\n");
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <stdio.h>
#include <hip/hip_runtime.h>
int main(){
printf("hello world\n");
return 0;
} | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.amdgpu_metadata
---
amdhsa.kernels: []
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <stdio.h>
#include <hip/hip_runtime.h>
int main(){
printf("hello world\n");
return 0;
} | .text
.file "hello.hip"
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rax
.cfi_def_cfa_offset 16
movl $.Lstr, %edi
callq puts@PLT
xorl %eax, %eax
popq %rcx
.cfi_def_cfa_offset 8
retq
.Lfunc_end0:
.size main, .Lfunc_end0-main
.cfi_endproc
# -- End function
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "hello world"
.size .Lstr, 12
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.amdgpu_metadata
---
amdhsa.kernels: []
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001ad415_00000000-6_hello.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "hello world\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq .LC0(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $0, %eax
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2057:
.size main, .-main
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "hello.hip"
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rax
.cfi_def_cfa_offset 16
movl $.Lstr, %edi
callq puts@PLT
xorl %eax, %eax
popq %rcx
.cfi_def_cfa_offset 8
retq
.Lfunc_end0:
.size main, .Lfunc_end0-main
.cfi_endproc
# -- End function
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "hello world"
.size .Lstr, 12
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <cuda.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#define BLOCK_SIZE 16
// Kernel
__global__ void cudaMultiplyArrays(int* dA, int* dB, int* dC, int hA, int wA,
int hB, int wB, int hC, int wC) {
int y = blockIdx.y * BLOCK_SIZE + threadIdx.y; // row
int x = blockIdx.x * BLOCK_SIZE + threadIdx.x; // column
if (y >= hA || x >= wB) return;
int result = 0;
for (unsigned int i = 0; i < wA; i++)
result += dA[y * wA + i] * dB[i * wB + x];
dC[y * wC + x] = result;
}
// Kernel using shared memory
__global__ void cudaMultiplyArraysShared(int* dA, int* dB, int* dC, int hA,
int wA, int hB, int wB, int hC,
int wC) {
// Thread and block indices
int tx = threadIdx.x;
int ty = threadIdx.y;
int bx = blockIdx.x;
int by = blockIdx.y;
// Number of subarrays for each block
int nsubs = (wA + BLOCK_SIZE - 1) / BLOCK_SIZE;
// Initialize subarrays in shared memory
__shared__ int sdA[BLOCK_SIZE][BLOCK_SIZE];
__shared__ int sdB[BLOCK_SIZE][BLOCK_SIZE];
// Loop over each subarray
int result = 0;
for (unsigned int r = 0; r < nsubs; r++) {
// Fill the subarrays in shared memory
sdA[ty][tx] = dA[(by * BLOCK_SIZE + ty) * wA + (r * BLOCK_SIZE + tx)];
sdB[ty][tx] = dB[(r * BLOCK_SIZE + ty) * wB + (bx * BLOCK_SIZE + tx)];
__syncthreads();
// Don't add out of bounds elements
int s_max;
if ((r + 1) * BLOCK_SIZE > wA)
s_max = wA - r * BLOCK_SIZE;
else
s_max = BLOCK_SIZE;
for (unsigned int s = 0; s < s_max; s++) result += sdA[ty][s] * sdB[s][tx];
__syncthreads();
}
// Don't fill out of bounds elements
if (bx * BLOCK_SIZE + tx >= wC) return;
if (by * BLOCK_SIZE + ty >= hC) return;
// Fill result array
dC[(by * BLOCK_SIZE + ty) * wB + (bx * BLOCK_SIZE + tx)] = result;
}
int int_power(int x, int n) {
if (n <= 0) return 1;
int y = 1;
while (n > 1) {
if (n % 2 == 0) {
x *= x;
n /= 2;
} else {
y *= x;
x *= x;
n = (n - 1) / 2;
}
}
return x * y;
}
void fill_array(int* A, int hA, int wA) {
for (unsigned int i = 0; i < hA; i++)
for (unsigned int j = 0; j < wA; j++) A[i * wA + j] = i + j;
}
int main(int argc, char* argv[]) {
int m, n, p, nruns;
bool shared, prt;
if (argc == 1) {
m = 16;
n = 32;
p = 1;
nruns = 65536;
shared = false;
prt = true;
} else if (argc == 5) {
int siz = int_power(2, atoi(argv[1]));
m = siz;
n = siz;
p = siz;
nruns = int_power(2, atoi(argv[2]));
if (atoi(argv[3]) > 0)
shared = true;
else
shared = false;
if (atoi(argv[4]) > 0)
prt = true;
else
prt = false;
}
// Array sizes
int hA = m, wA = n;
int hB = n, wB = p;
int hC = m, wC = p;
int sA = hA * wA;
int sB = hB * wB;
int sC = hC * wC;
// Allocate host arrays
int* A, *B, *C;
A = (int*)malloc(sizeof(int) * sA);
B = (int*)malloc(sizeof(int) * sB);
C = (int*)malloc(sizeof(int) * sC);
// Allocate device arrays
int* dA, *dB, *dC;
cudaMalloc(&dA, sizeof(int) * sA);
cudaMalloc(&dB, sizeof(int) * sB);
cudaMalloc(&dC, sizeof(int) * sC);
// Fill A and B with some integers
fill_array(A, hA, wA);
fill_array(B, hB, wB);
// Set up block grid
dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
dim3 dimGrid((wC + BLOCK_SIZE - 1) / BLOCK_SIZE,
(hC + BLOCK_SIZE - 1) / BLOCK_SIZE);
// Set up timing
struct timespec start_in, end_in;
long dur_in_ns;
double dur_in = 0.0, dur_in_total = 0.0;
double dur_in_min = 1e99, dur_in_max = 0.0;
for (int i = 0; i < nruns; i++) {
// Start inclusive timing
clock_gettime(CLOCK_MONOTONIC, &start_in);
// Copy host arrays to the device
cudaMemcpy(dA, A, sizeof(int) * sA, cudaMemcpyHostToDevice);
cudaMemcpy(dB, B, sizeof(int) * sB, cudaMemcpyHostToDevice);
if (shared)
// Invoke the device kernel which multiplies the arrays with shared memory
cudaMultiplyArraysShared <<<dimGrid, dimBlock>>>
(dA, dB, dC, hA, wA, hB, wB, hC, wC);
else
// Invoke the device kernel which multiplies the arrays
cudaMultiplyArrays <<<dimGrid, dimBlock>>>
(dA, dB, dC, hA, wA, hB, wB, hC, wC);
// Copy the result array back to the host
cudaMemcpy(C, dC, sizeof(int) * sC, cudaMemcpyDeviceToHost);
// End inclusive timing
clock_gettime(CLOCK_MONOTONIC, &end_in);
// Calculate duration
dur_in_ns = (end_in.tv_sec - start_in.tv_sec) * 1000000000l +
end_in.tv_nsec - start_in.tv_nsec;
dur_in = (double)(dur_in_ns / 1000000.0);
dur_in_total += dur_in;
if (dur_in < dur_in_min) dur_in_min = dur_in;
if (dur_in > dur_in_max) dur_in_max = dur_in;
}
// Write result to file
if (prt) {
FILE* fp;
fp = fopen("problem2.out", "w");
for (int i = 0; i < hC; i++) {
for (int j = 0; j < wC; j++) fprintf(fp, "%12d ", C[i * wC + j]);
fprintf(fp, "\n");
}
fprintf(fp, "\n");
fclose(fp);
}
// Free memory
free(A);
free(B);
free(C);
cudaFree(dA);
cudaFree(dB);
cudaFree(dC);
// Get device properties
cudaDeviceProp gpu_props;
cudaGetDeviceProperties(&gpu_props, 0);
// Print some information
printf("Device name: %s\n", gpu_props.name);
printf("Dimension 1 (m): %12d\n", m);
printf("Dimension 2 (n): %12d\n", n);
printf("Dimension 3 (p): %12d\n", p);
printf("Block size: %12d\n", BLOCK_SIZE);
printf("Number of runs: %12d\n", nruns);
printf("Using shared memory?: %12s\n", shared ? "True" : "False");
printf("Inclusive time (min): %12.6f ms\n", dur_in_min);
printf("Inclusive time (avg): %12.6f ms\n", dur_in_total / nruns);
printf("Inclusive time (max): %12.6f ms\n", dur_in_max);
printf("\n");
return 0;
} | code for sm_80
Function : _Z24cudaMultiplyArraysSharedPiS_S_iiiiii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ IMAD.MOV.U32 R4, RZ, RZ, 0x1e ; /* 0x0000001eff047424 */
/* 0x000fe200078e00ff */
/*0020*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e220000002100 */
/*0030*/ ULDC.64 UR8, c[0x0][0x118] ; /* 0x0000460000087ab9 */
/* 0x000fc60000000a00 */
/*0040*/ S2R R2, SR_TID.Y ; /* 0x0000000000027919 */
/* 0x000e620000002200 */
/*0050*/ IADD3 R4, R4, c[0x0][0x17c], RZ ; /* 0x00005f0004047a10 */
/* 0x000fc60007ffe0ff */
/*0060*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x000ea20000002500 */
/*0070*/ ISETP.GT.U32.AND P0, PT, R4, 0x1e, PT ; /* 0x0000001e0400780c */
/* 0x000fc60003f04070 */
/*0080*/ S2R R5, SR_CTAID.Y ; /* 0x0000000000057919 */
/* 0x000ef40000002600 */
/*0090*/ @!P0 MOV R23, RZ ; /* 0x000000ff00178202 */
/* 0x000fe20000000f00 */
/*00a0*/ @!P0 BRA 0xae0 ; /* 0x00000a3000008947 */
/* 0x000fea0003800000 */
/*00b0*/ ULDC UR6, c[0x0][0x17c] ; /* 0x00005f0000067ab9 */
/* 0x000fe20000000800 */
/*00c0*/ IMAD.SHL.U32 R7, R2, 0x40, RZ ; /* 0x0000004002077824 */
/* 0x002fe200078e00ff */
/*00d0*/ UIADD3 UR4, UR6, 0xf, URZ ; /* 0x0000000f06047890 */
/* 0x000fe2000fffe03f */
/*00e0*/ IMAD R9, R5, 0x10, R2 ; /* 0x0000001005097824 */
/* 0x008fe200078e0202 */
/*00f0*/ HFMA2.MMA R23, -RZ, RZ, 0, 0 ; /* 0x00000000ff177435 */
/* 0x000fe200000001ff */
/*0100*/ LEA R4, R3, R0, 0x4 ; /* 0x0000000003047211 */
/* 0x005fe200078e20ff */
/*0110*/ USHF.R.S32.HI UR5, URZ, 0x1f, UR4 ; /* 0x0000001f3f057899 */
/* 0x000fe20008011404 */
/*0120*/ LEA R6, R0.reuse, 0x480, 0x2 ; /* 0x0000048000067811 */
/* 0x040fe200078e10ff */
/*0130*/ IMAD.MOV.U32 R12, RZ, RZ, RZ ; /* 0x000000ffff0c7224 */
/* 0x000fe200078e00ff */
/*0140*/ IADD3 R14, R7, 0x8, RZ ; /* 0x00000008070e7810 */
/* 0x000fe20007ffe0ff */
/*0150*/ ULEA.HI UR4, UR5, UR4, URZ, 0x4 ; /* 0x0000000405047291 */
/* 0x000fe2000f8f203f */
/*0160*/ IMAD R18, R9, c[0x0][0x17c], R0 ; /* 0x00005f0009127a24 */
/* 0x000fe200078e0200 */
/*0170*/ ULOP3.LUT UR5, URZ, UR6, URZ, 0x33, !UPT ; /* 0x000000063f057292 */
/* 0x000fe2000f8e333f */
/*0180*/ IMAD R13, R0, 0x4, R7 ; /* 0x00000004000d7824 */
/* 0x000fe200078e0207 */
/*0190*/ USHF.R.S32.HI UR6, URZ, 0x4, UR4 ; /* 0x000000043f067899 */
/* 0x000fc40008011404 */
/*01a0*/ SHF.L.U32 R17, R12, 0x4, RZ ; /* 0x000000040c117819 */
/* 0x000fe400000006ff */
/*01b0*/ MOV R11, 0x4 ; /* 0x00000004000b7802 */
/* 0x000fc60000000f00 */
/*01c0*/ IMAD.IADD R9, R17, 0x1, R2 ; /* 0x0000000111097824 */
/* 0x000fe400078e0202 */
/*01d0*/ IMAD.IADD R8, R18, 0x1, R17 ; /* 0x0000000112087824 */
/* 0x000fe400078e0211 */
/*01e0*/ IMAD R10, R9, c[0x0][0x184], R4 ; /* 0x00006100090a7a24 */
/* 0x000fe400078e0204 */
/*01f0*/ IMAD.WIDE.U32 R8, R8, R11, c[0x0][0x160] ; /* 0x0000580008087625 */
/* 0x000fc800078e000b */
/*0200*/ IMAD.WIDE.U32 R10, R10, R11, c[0x0][0x168] ; /* 0x00005a000a0a7625 */
/* 0x000fe400078e000b */
/*0210*/ LDG.E R8, [R8.64] ; /* 0x0000000808087981 */
/* 0x000ea8000c1e1900 */
/*0220*/ LDG.E R10, [R10.64] ; /* 0x000000080a0a7981 */
/* 0x000ee2000c1e1900 */
/*0230*/ IADD3 R15, R17.reuse, 0x10, RZ ; /* 0x00000010110f7810 */
/* 0x040fe40007ffe0ff */
/*0240*/ ISETP.NE.AND P0, PT, R17, c[0x0][0x17c], PT ; /* 0x00005f0011007a0c */
/* 0x000fe40003f05270 */
/*0250*/ ISETP.GT.U32.AND P2, PT, R15, c[0x0][0x17c], PT ; /* 0x00005f000f007a0c */
/* 0x000fc40003f44070 */
/*0260*/ IADD3 R12, R12, 0x1, RZ ; /* 0x000000010c0c7810 */
/* 0x000fe40007ffe0ff */
/*0270*/ IADD3 R15, -R17, -0x11, RZ ; /* 0xffffffef110f7810 */
/* 0x000fe40007ffe1ff */
/*0280*/ ISETP.GE.U32.AND P1, PT, R12, UR6, PT ; /* 0x000000060c007c0c */
/* 0x000fe4000bf26070 */
/*0290*/ IMNMX.U32 R16, R15, UR5, !PT ; /* 0x000000050f107c17 */
/* 0x000fe2000f800000 */
/*02a0*/ STS [R13], R8 ; /* 0x000000080d007388 */
/* 0x0041e80000000800 */
/*02b0*/ STS [R13+0x400], R10 ; /* 0x0004000a0d007388 */
/* 0x0081e80000000800 */
/*02c0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*02d0*/ @!P0 BRA P2, 0xac0 ; /* 0x000007e000008947 */
/* 0x000fea0001000000 */
/*02e0*/ LOP3.LUT R8, RZ, R16, RZ, 0x33, !PT ; /* 0x00000010ff087212 */
/* 0x001fe200078e33ff */
/*02f0*/ UMOV UR4, URZ ; /* 0x0000003f00047c82 */
/* 0x000fc60008000000 */
/*0300*/ IADD3 R8, -R17, R8, RZ ; /* 0x0000000811087210 */
/* 0x000fc80007ffe1ff */
/*0310*/ IADD3 R9, R8.reuse, -0x1, RZ ; /* 0xffffffff08097810 */
/* 0x040fe40007ffe0ff */
/*0320*/ LOP3.LUT R15, R8, 0x3, RZ, 0xc0, !PT ; /* 0x00000003080f7812 */
/* 0x000fe400078ec0ff */
/*0330*/ ISETP.GE.U32.AND P0, PT, R9, 0x3, PT ; /* 0x000000030900780c */
/* 0x000fda0003f06070 */
/*0340*/ @!P0 BRA 0x9d0 ; /* 0x0000068000008947 */
/* 0x000fea0003800000 */
/*0350*/ IADD3 R17, R15, R16, R17 ; /* 0x000000100f117210 */
/* 0x000fe20007ffe011 */
/*0360*/ UMOV UR4, URZ ; /* 0x0000003f00047c82 */
/* 0x000fe20008000000 */
/*0370*/ MOV R20, R14 ; /* 0x0000000e00147202 */
/* 0x000fe20000000f00 */
/*0380*/ IMAD.MOV.U32 R19, RZ, RZ, R6 ; /* 0x000000ffff137224 */
/* 0x000fe400078e0006 */
/*0390*/ IMAD.MOV R21, RZ, RZ, -R17 ; /* 0x000000ffff157224 */
/* 0x000fca00078e0a11 */
/*03a0*/ ISETP.GT.AND P0, PT, R21, 0x1, PT ; /* 0x000000011500780c */
/* 0x000fda0003f04270 */
/*03b0*/ @!P0 BRA 0x8d0 ; /* 0x0000051000008947 */
/* 0x000fea0003800000 */
/*03c0*/ IADD3 R8, R21, -0x1, RZ ; /* 0xffffffff15087810 */
/* 0x000fe40007ffe0ff */
/*03d0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40003f0f070 */
/*03e0*/ ISETP.GT.AND P2, PT, R8, 0xc, PT ; /* 0x0000000c0800780c */
/* 0x000fda0003f44270 */
/*03f0*/ @!P2 BRA 0x6f0 ; /* 0x000002f00000a947 */
/* 0x000fea0003800000 */
/*0400*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40003f0e170 */
/*0410*/ LDS R16, [R19+-0x80] ; /* 0xffff800013107984 */
/* 0x000fe20000000800 */
/*0420*/ IADD3 R21, R21, -0x10, RZ ; /* 0xfffffff015157810 */
/* 0x000fe20007ffe0ff */
/*0430*/ UIADD3 UR4, UR4, 0x10, URZ ; /* 0x0000001004047890 */
/* 0x000fe4000fffe03f */
/*0440*/ LDS.64 R8, [R20+-0x8] ; /* 0xfffff80014087984 */
/* 0x000e220000000a00 */
/*0450*/ ISETP.GT.AND P2, PT, R21, 0xd, PT ; /* 0x0000000d1500780c */
/* 0x000fc60003f44270 */
/*0460*/ LDS R22, [R19+-0x40] ; /* 0xffffc00013167984 */
/* 0x000e680000000800 */
/*0470*/ LDS R25, [R19] ; /* 0x0000000013197984 */
/* 0x000fe80000000800 */
/*0480*/ LDS.64 R10, [R20] ; /* 0x00000000140a7984 */
/* 0x000ea80000000a00 */
/*0490*/ LDS R24, [R19+0x40] ; /* 0x0000400013187984 */
/* 0x000ee80000000800 */
/*04a0*/ LDS R26, [R19+0x300] ; /* 0x00030000131a7984 */
/* 0x000fe20000000800 */
/*04b0*/ IMAD R8, R16, R8, R23 ; /* 0x0000000810087224 */
/* 0x001fc600078e0217 */
/*04c0*/ LDS R23, [R19+0x80] ; /* 0x0000800013177984 */
/* 0x000fe20000000800 */
/*04d0*/ IMAD R8, R22, R9, R8 ; /* 0x0000000916087224 */
/* 0x002fc600078e0208 */
/*04e0*/ LDS.64 R16, [R20+0x8] ; /* 0x0000080014107984 */
/* 0x000e280000000a00 */
/*04f0*/ LDS R22, [R19+0xc0] ; /* 0x0000c00013167984 */
/* 0x000e620000000800 */
/*0500*/ IMAD R10, R25, R10, R8 ; /* 0x0000000a190a7224 */
/* 0x004fc600078e0208 */
/*0510*/ LDS R25, [R19+0x100] ; /* 0x0001000013197984 */
/* 0x000fe20000000800 */
/*0520*/ IMAD R10, R24, R11, R10 ; /* 0x0000000b180a7224 */
/* 0x008fc600078e020a */
/*0530*/ LDS.64 R8, [R20+0x10] ; /* 0x0000100014087984 */
/* 0x000ea80000000a00 */
/*0540*/ LDS R24, [R19+0x140] ; /* 0x0001400013187984 */
/* 0x000ee20000000800 */
/*0550*/ IMAD R16, R23, R16, R10 ; /* 0x0000001017107224 */
/* 0x001fc600078e020a */
/*0560*/ LDS R23, [R19+0x180] ; /* 0x0001800013177984 */
/* 0x000fe20000000800 */
/*0570*/ IMAD R16, R22, R17, R16 ; /* 0x0000001116107224 */
/* 0x002fc600078e0210 */
/*0580*/ LDS.64 R10, [R20+0x18] ; /* 0x00001800140a7984 */
/* 0x000e280000000a00 */
/*0590*/ LDS R22, [R19+0x1c0] ; /* 0x0001c00013167984 */
/* 0x000e620000000800 */
/*05a0*/ IMAD R8, R25, R8, R16 ; /* 0x0000000819087224 */
/* 0x004fc600078e0210 */
/*05b0*/ LDS R25, [R19+0x200] ; /* 0x0002000013197984 */
/* 0x000fe20000000800 */
/*05c0*/ IMAD R8, R24, R9, R8 ; /* 0x0000000918087224 */
/* 0x008fc600078e0208 */
/*05d0*/ LDS.64 R16, [R20+0x20] ; /* 0x0000200014107984 */
/* 0x000ea80000000a00 */
/*05e0*/ LDS R24, [R19+0x240] ; /* 0x0002400013187984 */
/* 0x000ee20000000800 */
/*05f0*/ IMAD R10, R23, R10, R8 ; /* 0x0000000a170a7224 */
/* 0x001fc600078e0208 */
/*0600*/ LDS R23, [R19+0x280] ; /* 0x0002800013177984 */
/* 0x000fe20000000800 */
/*0610*/ IMAD R10, R22, R11, R10 ; /* 0x0000000b160a7224 */
/* 0x002fc600078e020a */
/*0620*/ LDS.64 R8, [R20+0x28] ; /* 0x0000280014087984 */
/* 0x000e280000000a00 */
/*0630*/ LDS R22, [R19+0x2c0] ; /* 0x0002c00013167984 */
/* 0x000e620000000800 */
/*0640*/ IMAD R25, R25, R16, R10 ; /* 0x0000001019197224 */
/* 0x004fc600078e020a */
/*0650*/ LDS.64 R10, [R20+0x30] ; /* 0x00003000140a7984 */
/* 0x0005220000000a00 */
/*0660*/ IMAD R17, R24, R17, R25 ; /* 0x0000001118117224 */
/* 0x008fc600078e0219 */
/*0670*/ LDS R16, [R19+0x340] ; /* 0x0003400013107984 */
/* 0x0007620000000800 */
/*0680*/ IADD3 R20, R20, 0x40, RZ ; /* 0x0000004014147810 */
/* 0x004fe40007ffe0ff */
/*0690*/ IADD3 R19, R19, 0x400, RZ ; /* 0x0000040013137810 */
/* 0x008fe20007ffe0ff */
/*06a0*/ IMAD R8, R23, R8, R17 ; /* 0x0000000817087224 */
/* 0x001fc800078e0211 */
/*06b0*/ IMAD R9, R22, R9, R8 ; /* 0x0000000916097224 */
/* 0x002fc800078e0208 */
/*06c0*/ IMAD R9, R26, R10, R9 ; /* 0x0000000a1a097224 */
/* 0x010fc800078e0209 */
/*06d0*/ IMAD R23, R16, R11, R9 ; /* 0x0000000b10177224 */
/* 0x020fe200078e0209 */
/*06e0*/ @P2 BRA 0x410 ; /* 0xfffffd2000002947 */
/* 0x000fea000383ffff */
/*06f0*/ IADD3 R8, R21, -0x1, RZ ; /* 0xffffffff15087810 */
/* 0x000fc80007ffe0ff */
/*0700*/ ISETP.GT.AND P2, PT, R8, 0x4, PT ; /* 0x000000040800780c */
/* 0x000fda0003f44270 */
/*0710*/ @!P2 BRA 0x8b0 ; /* 0x000001900000a947 */
/* 0x000fea0003800000 */
/*0720*/ LDS R10, [R19+-0x80] ; /* 0xffff8000130a7984 */
/* 0x000fe20000000800 */
/*0730*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe20003f0e170 */
/*0740*/ UIADD3 UR4, UR4, 0x8, URZ ; /* 0x0000000804047890 */
/* 0x000fe2000fffe03f */
/*0750*/ IADD3 R21, R21, -0x8, RZ ; /* 0xfffffff815157810 */
/* 0x000fe20007ffe0ff */
/*0760*/ LDS.64 R16, [R20+-0x8] ; /* 0xfffff80014107984 */
/* 0x000e280000000a00 */
/*0770*/ LDS R24, [R19+-0x40] ; /* 0xffffc00013187984 */
/* 0x000e680000000800 */
/*0780*/ LDS R25, [R19] ; /* 0x0000000013197984 */
/* 0x000fe80000000800 */
/*0790*/ LDS.64 R8, [R20] ; /* 0x0000000014087984 */
/* 0x000ea80000000a00 */
/*07a0*/ LDS R22, [R19+0x40] ; /* 0x0000400013167984 */
/* 0x000ee80000000800 */
/*07b0*/ LDS R26, [R19+0x100] ; /* 0x00010000131a7984 */
/* 0x000fe20000000800 */
/*07c0*/ IMAD R16, R10, R16, R23 ; /* 0x000000100a107224 */
/* 0x001fc600078e0217 */
/*07d0*/ LDS R23, [R19+0x80] ; /* 0x0000800013177984 */
/* 0x000fe20000000800 */
/*07e0*/ IMAD R16, R24, R17, R16 ; /* 0x0000001118107224 */
/* 0x002fc600078e0210 */
/*07f0*/ LDS.64 R10, [R20+0x8] ; /* 0x00000800140a7984 */
/* 0x000e280000000a00 */
/*0800*/ LDS R24, [R19+0xc0] ; /* 0x0000c00013187984 */
/* 0x000e620000000800 */
/*0810*/ IMAD R25, R25, R8, R16 ; /* 0x0000000819197224 */
/* 0x004fc600078e0210 */
/*0820*/ LDS.64 R16, [R20+0x10] ; /* 0x0000100014107984 */
/* 0x0005220000000a00 */
/*0830*/ IMAD R9, R22, R9, R25 ; /* 0x0000000916097224 */
/* 0x008fc600078e0219 */
/*0840*/ LDS R8, [R19+0x140] ; /* 0x0001400013087984 */
/* 0x0007620000000800 */
/*0850*/ IADD3 R20, R20, 0x20, RZ ; /* 0x0000002014147810 */
/* 0x004fe40007ffe0ff */
/*0860*/ IADD3 R19, R19, 0x200, RZ ; /* 0x0000020013137810 */
/* 0x008fe20007ffe0ff */
/*0870*/ IMAD R9, R23, R10, R9 ; /* 0x0000000a17097224 */
/* 0x001fc800078e0209 */
/*0880*/ IMAD R9, R24, R11, R9 ; /* 0x0000000b18097224 */
/* 0x002fc800078e0209 */
/*0890*/ IMAD R9, R26, R16, R9 ; /* 0x000000101a097224 */
/* 0x010fc800078e0209 */
/*08a0*/ IMAD R23, R8, R17, R9 ; /* 0x0000001108177224 */
/* 0x020fe400078e0209 */
/*08b0*/ ISETP.NE.OR P0, PT, R21, 0x1, P0 ; /* 0x000000011500780c */
/* 0x000fda0000705670 */
/*08c0*/ @!P0 BRA 0x9d0 ; /* 0x0000010000008947 */
/* 0x000fea0003800000 */
/*08d0*/ LDS R16, [R19+-0x80] ; /* 0xffff800013107984 */
/* 0x000fe20000000800 */
/*08e0*/ IADD3 R21, R21, -0x4, RZ ; /* 0xfffffffc15157810 */
/* 0x000fe20007ffe0ff */
/*08f0*/ UIADD3 UR4, UR4, 0x4, URZ ; /* 0x0000000404047890 */
/* 0x000fe4000fffe03f */
/*0900*/ LDS.64 R8, [R20+-0x8] ; /* 0xfffff80014087984 */
/* 0x000e220000000a00 */
/*0910*/ ISETP.NE.AND P0, PT, R21, 0x1, PT ; /* 0x000000011500780c */
/* 0x000fc60003f05270 */
/*0920*/ LDS R17, [R19+-0x40] ; /* 0xffffc00013117984 */
/* 0x000e680000000800 */
/*0930*/ LDS R22, [R19] ; /* 0x0000000013167984 */
/* 0x000fe80000000800 */
/*0940*/ LDS.64 R10, [R20] ; /* 0x00000000140a7984 */
/* 0x0004e80000000a00 */
/*0950*/ LDS R24, [R19+0x40] ; /* 0x0000400013187984 */
/* 0x0009620000000800 */
/*0960*/ IADD3 R20, R20, 0x10, RZ ; /* 0x0000001014147810 */
/* 0x004fc40007ffe0ff */
/*0970*/ IADD3 R19, R19, 0x100, RZ ; /* 0x0000010013137810 */
/* 0x010fe20007ffe0ff */
/*0980*/ IMAD R8, R16, R8, R23 ; /* 0x0000000810087224 */
/* 0x001fc800078e0217 */
/*0990*/ IMAD R9, R17, R9, R8 ; /* 0x0000000911097224 */
/* 0x002fc800078e0208 */
/*09a0*/ IMAD R10, R22, R10, R9 ; /* 0x0000000a160a7224 */
/* 0x008fc800078e0209 */
/*09b0*/ IMAD R23, R24, R11, R10 ; /* 0x0000000b18177224 */
/* 0x020fe200078e020a */
/*09c0*/ @P0 BRA 0x8d0 ; /* 0xffffff0000000947 */
/* 0x000fea000383ffff */
/*09d0*/ ISETP.NE.AND P0, PT, R15, RZ, PT ; /* 0x000000ff0f00720c */
/* 0x000fda0003f05270 */
/*09e0*/ @!P0 BRA 0xac0 ; /* 0x000000d000008947 */
/* 0x000fea0003800000 */
/*09f0*/ MOV R8, UR4 ; /* 0x0000000400087c02 */
/* 0x000fe20008000f00 */
/*0a00*/ ULEA UR7, UR4, 0x400, 0x6 ; /* 0x0000040004077891 */
/* 0x000fe2000f8e303f */
/*0a10*/ ISETP.NE.AND P0, PT, R15, 0x1, PT ; /* 0x000000010f00780c */
/* 0x000fc60003f05270 */
/*0a20*/ IMAD R8, R8, 0x4, R7 ; /* 0x0000000408087824 */
/* 0x000fca00078e0207 */
/*0a30*/ LDS R16, [R0.X4+UR7] ; /* 0x0000000700107984 */
/* 0x000fe80008004800 */
/*0a40*/ LDS.128 R8, [R8] ; /* 0x0000000008087984 */
/* 0x000e240000000c00 */
/*0a50*/ IMAD R23, R16, R8, R23 ; /* 0x0000000810177224 */
/* 0x001fe200078e0217 */
/*0a60*/ @!P0 BRA 0xac0 ; /* 0x0000005000008947 */
/* 0x000fea0003800000 */
/*0a70*/ ISETP.NE.AND P0, PT, R15, 0x2, PT ; /* 0x000000020f00780c */
/* 0x000fe20003f05270 */
/*0a80*/ LDS R8, [R0.X4+UR7+0x40] ; /* 0x0000400700087984 */
/* 0x000e180008004800 */
/*0a90*/ @P0 LDS R11, [R0.X4+UR7+0x80] ; /* 0x00008007000b0984 */
/* 0x000e620008004800 */
/*0aa0*/ IMAD R23, R8, R9, R23 ; /* 0x0000000908177224 */
/* 0x001fc800078e0217 */
/*0ab0*/ @P0 IMAD R23, R11, R10, R23 ; /* 0x0000000a0b170224 */
/* 0x002fe400078e0217 */
/*0ac0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x001fec0000010000 */
/*0ad0*/ @!P1 BRA 0x1a0 ; /* 0xfffff6c000009947 */
/* 0x000fea000383ffff */
/*0ae0*/ LEA R0, R3, R0, 0x4 ; /* 0x0000000003007211 */
/* 0x005fc800078e20ff */
/*0af0*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x18c], PT ; /* 0x0000630000007a0c */
/* 0x000fda0003f06270 */
/*0b00*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0b10*/ IMAD R5, R5, 0x10, R2 ; /* 0x0000001005057824 */
/* 0x00afca00078e0202 */
/*0b20*/ ISETP.GE.AND P0, PT, R5, c[0x0][0x188], PT ; /* 0x0000620005007a0c */
/* 0x000fda0003f06270 */
/*0b30*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0b40*/ HFMA2.MMA R3, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff037435 */
/* 0x000fe200000001ff */
/*0b50*/ IMAD R2, R5, c[0x0][0x184], R0 ; /* 0x0000610005027a24 */
/* 0x000fd200078e0200 */
/*0b60*/ IMAD.WIDE R2, R2, R3, c[0x0][0x170] ; /* 0x00005c0002027625 */
/* 0x000fca00078e0203 */
/*0b70*/ STG.E [R2.64], R23 ; /* 0x0000001702007986 */
/* 0x000fe2000c101908 */
/*0b80*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0b90*/ BRA 0xb90; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0ba0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0bb0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0bc0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0bd0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0be0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0bf0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c00*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c10*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c20*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c30*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c40*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c50*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c60*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0c70*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
..........
Function : _Z18cudaMultiplyArraysPiS_S_iiiiii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0020*/ S2R R17, SR_TID.X ; /* 0x0000000000117919 */
/* 0x000e280000002100 */
/*0030*/ S2R R19, SR_CTAID.Y ; /* 0x0000000000137919 */
/* 0x000e680000002600 */
/*0040*/ S2R R2, SR_TID.Y ; /* 0x0000000000027919 */
/* 0x000e620000002200 */
/*0050*/ IMAD R16, R0, 0x10, R17 ; /* 0x0000001000107824 */
/* 0x001fca00078e0211 */
/*0060*/ ISETP.GE.AND P0, PT, R16, c[0x0][0x184], PT ; /* 0x0000610010007a0c */
/* 0x000fe40003f06270 */
/*0070*/ LEA R19, R19, R2, 0x4 ; /* 0x0000000213137211 */
/* 0x002fc800078e20ff */
/*0080*/ ISETP.GE.OR P0, PT, R19, c[0x0][0x178], P0 ; /* 0x00005e0013007a0c */
/* 0x000fda0000706670 */
/*0090*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*00a0*/ ISETP.NE.AND P0, PT, RZ, c[0x0][0x17c], PT ; /* 0x00005f00ff007a0c */
/* 0x000fe20003f05270 */
/*00b0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*00c0*/ IMAD.MOV.U32 R27, RZ, RZ, RZ ; /* 0x000000ffff1b7224 */
/* 0x000fd600078e00ff */
/*00d0*/ @!P0 BRA 0x4f0 ; /* 0x0000041000008947 */
/* 0x000fea0003800000 */
/*00e0*/ MOV R24, c[0x0][0x17c] ; /* 0x00005f0000187a02 */
/* 0x000fe20000000f00 */
/*00f0*/ HFMA2.MMA R27, -RZ, RZ, 0, 0 ; /* 0x00000000ff1b7435 */
/* 0x000fe200000001ff */
/*0100*/ IMAD.MOV.U32 R22, RZ, RZ, RZ ; /* 0x000000ffff167224 */
/* 0x000fe400078e00ff */
/*0110*/ IADD3 R2, R24.reuse, -0x1, RZ ; /* 0xffffffff18027810 */
/* 0x040fe40007ffe0ff */
/*0120*/ LOP3.LUT R20, R24, 0x3, RZ, 0xc0, !PT ; /* 0x0000000318147812 */
/* 0x000fe400078ec0ff */
/*0130*/ ISETP.GE.U32.AND P1, PT, R2, 0x3, PT ; /* 0x000000030200780c */
/* 0x000fe40003f26070 */
/*0140*/ ISETP.NE.AND P0, PT, R20, RZ, PT ; /* 0x000000ff1400720c */
/* 0x000fd60003f05270 */
/*0150*/ @!P1 BRA 0x400 ; /* 0x000002a000009947 */
/* 0x000fea0003800000 */
/*0160*/ IADD3 R3, R17, c[0x0][0x184], RZ ; /* 0x0000610011037a10 */
/* 0x000fe20007ffe0ff */
/*0170*/ IMAD.MOV.U32 R23, RZ, RZ, c[0x0][0x184] ; /* 0x00006100ff177624 */
/* 0x000fe200078e00ff */
/*0180*/ IADD3 R25, R20, -c[0x0][0x17c], RZ ; /* 0x80005f0014197a10 */
/* 0x000fe20007ffe0ff */
/*0190*/ IMAD R24, R19, R24, 0x3 ; /* 0x0000000313187424 */
/* 0x000fe200078e0218 */
/*01a0*/ MOV R22, RZ ; /* 0x000000ff00167202 */
/* 0x000fe20000000f00 */
/*01b0*/ IMAD.MOV.U32 R26, RZ, RZ, R16.reuse ; /* 0x000000ffff1a7224 */
/* 0x100fe200078e0010 */
/*01c0*/ LEA R28, R0, R3, 0x4 ; /* 0x00000003001c7211 */
/* 0x000fe200078e20ff */
/*01d0*/ IMAD R18, R23.reuse, 0x2, R16.reuse ; /* 0x0000000217127824 */
/* 0x140fe400078e0210 */
/*01e0*/ IMAD R21, R23, 0x3, R16 ; /* 0x0000000317157824 */
/* 0x000fe400078e0210 */
/*01f0*/ MOV R13, 0x4 ; /* 0x00000004000d7802 */
/* 0x000fe40000000f00 */
/*0200*/ IADD3 R2, R24, -0x3, RZ ; /* 0xfffffffd18027810 */
/* 0x000fc40007ffe0ff */
/*0210*/ IADD3 R4, R24, -0x2, RZ ; /* 0xfffffffe18047810 */
/* 0x000fe20007ffe0ff */
/*0220*/ IMAD.WIDE.U32 R14, R26, R13, c[0x0][0x168] ; /* 0x00005a001a0e7625 */
/* 0x000fe200078e000d */
/*0230*/ IADD3 R8, R24, -0x1, RZ ; /* 0xffffffff18087810 */
/* 0x000fc60007ffe0ff */
/*0240*/ IMAD.WIDE.U32 R2, R2, R13.reuse, c[0x0][0x160] ; /* 0x0000580002027625 */
/* 0x080fe400078e000d */
/*0250*/ LDG.E R14, [R14.64] ; /* 0x000000040e0e7981 */
/* 0x000ea4000c1e1900 */
/*0260*/ IMAD.WIDE.U32 R4, R4, R13.reuse, c[0x0][0x160] ; /* 0x0000580004047625 */
/* 0x080fe400078e000d */
/*0270*/ LDG.E R29, [R2.64] ; /* 0x00000004021d7981 */
/* 0x0000a4000c1e1900 */
/*0280*/ IMAD.WIDE.U32 R6, R28, R13.reuse, c[0x0][0x168] ; /* 0x00005a001c067625 */
/* 0x080fe400078e000d */
/*0290*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ee8000c1e1900 */
/*02a0*/ LDG.E R7, [R6.64] ; /* 0x0000000406077981 */
/* 0x000ee2000c1e1900 */
/*02b0*/ IMAD.WIDE.U32 R8, R8, R13, c[0x0][0x160] ; /* 0x0000580008087625 */
/* 0x000fc800078e000d */
/*02c0*/ IMAD.WIDE.U32 R2, R18, R13.reuse, c[0x0][0x168] ; /* 0x00005a0012027625 */
/* 0x081fe400078e000d */
/*02d0*/ LDG.E R8, [R8.64] ; /* 0x0000000408087981 */
/* 0x000f24000c1e1900 */
/*02e0*/ IMAD.WIDE.U32 R10, R24, R13.reuse, c[0x0][0x160] ; /* 0x00005800180a7625 */
/* 0x080fe400078e000d */
/*02f0*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000f24000c1e1900 */
/*0300*/ IMAD.WIDE.U32 R12, R21, R13, c[0x0][0x168] ; /* 0x00005a00150c7625 */
/* 0x000fe400078e000d */
/*0310*/ LDG.E R10, [R10.64] ; /* 0x000000040a0a7981 */
/* 0x000f68000c1e1900 */
/*0320*/ LDG.E R12, [R12.64] ; /* 0x000000040c0c7981 */
/* 0x000f62000c1e1900 */
/*0330*/ IADD3 R22, R22, 0x4, RZ ; /* 0x0000000416167810 */
/* 0x000fe20007ffe0ff */
/*0340*/ IMAD R18, R23.reuse, 0x4, R18 ; /* 0x0000000417127824 */
/* 0x040fe200078e0212 */
/*0350*/ LEA R28, R23, R28, 0x2 ; /* 0x0000001c171c7211 */
/* 0x000fc400078e10ff */
/*0360*/ LEA R26, R23.reuse, R26, 0x2 ; /* 0x0000001a171a7211 */
/* 0x040fe400078e10ff */
/*0370*/ IADD3 R24, R24, 0x4, RZ ; /* 0x0000000418187810 */
/* 0x000fe40007ffe0ff */
/*0380*/ LEA R21, R23, R21, 0x2 ; /* 0x0000001517157211 */
/* 0x000fe200078e10ff */
/*0390*/ IMAD R14, R14, R29, R27 ; /* 0x0000001d0e0e7224 */
/* 0x004fc800078e021b */
/*03a0*/ IMAD R5, R7, R4, R14 ; /* 0x0000000407057224 */
/* 0x008fe400078e020e */
/*03b0*/ IMAD.IADD R4, R25, 0x1, R22 ; /* 0x0000000119047824 */
/* 0x000fca00078e0216 */
/*03c0*/ ISETP.NE.AND P1, PT, R4, RZ, PT ; /* 0x000000ff0400720c */
/* 0x000fe20003f25270 */
/*03d0*/ IMAD R5, R2, R8, R5 ; /* 0x0000000802057224 */
/* 0x010fc800078e0205 */
/*03e0*/ IMAD R27, R12, R10, R5 ; /* 0x0000000a0c1b7224 */
/* 0x020fd000078e0205 */
/*03f0*/ @P1 BRA 0x1f0 ; /* 0xfffffdf000001947 */
/* 0x000fea000383ffff */
/*0400*/ @!P0 BRA 0x4f0 ; /* 0x000000e000008947 */
/* 0x000fea0003800000 */
/*0410*/ IMAD R17, R22, c[0x0][0x184], R17 ; /* 0x0000610016117a24 */
/* 0x000fe400078e0211 */
/*0420*/ IMAD R22, R19, c[0x0][0x17c], R22 ; /* 0x00005f0013167a24 */
/* 0x000fe400078e0216 */
/*0430*/ IMAD R0, R0, 0x10, R17 ; /* 0x0000001000007824 */
/* 0x000fe400078e0211 */
/*0440*/ HFMA2.MMA R5, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff057435 */
/* 0x000fd400000001ff */
/*0450*/ IMAD.WIDE.U32 R2, R22, R5, c[0x0][0x160] ; /* 0x0000580016027625 */
/* 0x000fc800078e0005 */
/*0460*/ IMAD.WIDE.U32 R4, R0, R5, c[0x0][0x168] ; /* 0x00005a0000047625 */
/* 0x000fe400078e0005 */
/*0470*/ LDG.E R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea8000c1e1900 */
/*0480*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ea2000c1e1900 */
/*0490*/ IADD3 R20, R20, -0x1, RZ ; /* 0xffffffff14147810 */
/* 0x000fe40007ffe0ff */
/*04a0*/ IADD3 R22, R22, 0x1, RZ ; /* 0x0000000116167810 */
/* 0x000fe40007ffe0ff */
/*04b0*/ ISETP.NE.AND P0, PT, R20, RZ, PT ; /* 0x000000ff1400720c */
/* 0x000fc40003f05270 */
/*04c0*/ IADD3 R0, R0, c[0x0][0x184], RZ ; /* 0x0000610000007a10 */
/* 0x000fe20007ffe0ff */
/*04d0*/ IMAD R27, R4, R2, R27 ; /* 0x00000002041b7224 */
/* 0x004fd400078e021b */
/*04e0*/ @P0 BRA 0x440 ; /* 0xffffff5000000947 */
/* 0x000fea000383ffff */
/*04f0*/ MOV R3, 0x4 ; /* 0x0000000400037802 */
/* 0x000fe20000000f00 */
/*0500*/ IMAD R2, R19, c[0x0][0x18c], R16 ; /* 0x0000630013027a24 */
/* 0x000fc800078e0210 */
/*0510*/ IMAD.WIDE R2, R2, R3, c[0x0][0x170] ; /* 0x00005c0002027625 */
/* 0x000fca00078e0203 */
/*0520*/ STG.E [R2.64], R27 ; /* 0x0000001b02007986 */
/* 0x000fe2000c101904 */
/*0530*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0540*/ BRA 0x540; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0550*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0560*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0570*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0580*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0590*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <cuda.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#define BLOCK_SIZE 16
// Kernel
__global__ void cudaMultiplyArrays(int* dA, int* dB, int* dC, int hA, int wA,
int hB, int wB, int hC, int wC) {
int y = blockIdx.y * BLOCK_SIZE + threadIdx.y; // row
int x = blockIdx.x * BLOCK_SIZE + threadIdx.x; // column
if (y >= hA || x >= wB) return;
int result = 0;
for (unsigned int i = 0; i < wA; i++)
result += dA[y * wA + i] * dB[i * wB + x];
dC[y * wC + x] = result;
}
// Kernel using shared memory
__global__ void cudaMultiplyArraysShared(int* dA, int* dB, int* dC, int hA,
int wA, int hB, int wB, int hC,
int wC) {
// Thread and block indices
int tx = threadIdx.x;
int ty = threadIdx.y;
int bx = blockIdx.x;
int by = blockIdx.y;
// Number of subarrays for each block
int nsubs = (wA + BLOCK_SIZE - 1) / BLOCK_SIZE;
// Initialize subarrays in shared memory
__shared__ int sdA[BLOCK_SIZE][BLOCK_SIZE];
__shared__ int sdB[BLOCK_SIZE][BLOCK_SIZE];
// Loop over each subarray
int result = 0;
for (unsigned int r = 0; r < nsubs; r++) {
// Fill the subarrays in shared memory
sdA[ty][tx] = dA[(by * BLOCK_SIZE + ty) * wA + (r * BLOCK_SIZE + tx)];
sdB[ty][tx] = dB[(r * BLOCK_SIZE + ty) * wB + (bx * BLOCK_SIZE + tx)];
__syncthreads();
// Don't add out of bounds elements
int s_max;
if ((r + 1) * BLOCK_SIZE > wA)
s_max = wA - r * BLOCK_SIZE;
else
s_max = BLOCK_SIZE;
for (unsigned int s = 0; s < s_max; s++) result += sdA[ty][s] * sdB[s][tx];
__syncthreads();
}
// Don't fill out of bounds elements
if (bx * BLOCK_SIZE + tx >= wC) return;
if (by * BLOCK_SIZE + ty >= hC) return;
// Fill result array
dC[(by * BLOCK_SIZE + ty) * wB + (bx * BLOCK_SIZE + tx)] = result;
}
int int_power(int x, int n) {
if (n <= 0) return 1;
int y = 1;
while (n > 1) {
if (n % 2 == 0) {
x *= x;
n /= 2;
} else {
y *= x;
x *= x;
n = (n - 1) / 2;
}
}
return x * y;
}
void fill_array(int* A, int hA, int wA) {
for (unsigned int i = 0; i < hA; i++)
for (unsigned int j = 0; j < wA; j++) A[i * wA + j] = i + j;
}
int main(int argc, char* argv[]) {
int m, n, p, nruns;
bool shared, prt;
if (argc == 1) {
m = 16;
n = 32;
p = 1;
nruns = 65536;
shared = false;
prt = true;
} else if (argc == 5) {
int siz = int_power(2, atoi(argv[1]));
m = siz;
n = siz;
p = siz;
nruns = int_power(2, atoi(argv[2]));
if (atoi(argv[3]) > 0)
shared = true;
else
shared = false;
if (atoi(argv[4]) > 0)
prt = true;
else
prt = false;
}
// Array sizes
int hA = m, wA = n;
int hB = n, wB = p;
int hC = m, wC = p;
int sA = hA * wA;
int sB = hB * wB;
int sC = hC * wC;
// Allocate host arrays
int* A, *B, *C;
A = (int*)malloc(sizeof(int) * sA);
B = (int*)malloc(sizeof(int) * sB);
C = (int*)malloc(sizeof(int) * sC);
// Allocate device arrays
int* dA, *dB, *dC;
cudaMalloc(&dA, sizeof(int) * sA);
cudaMalloc(&dB, sizeof(int) * sB);
cudaMalloc(&dC, sizeof(int) * sC);
// Fill A and B with some integers
fill_array(A, hA, wA);
fill_array(B, hB, wB);
// Set up block grid
dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
dim3 dimGrid((wC + BLOCK_SIZE - 1) / BLOCK_SIZE,
(hC + BLOCK_SIZE - 1) / BLOCK_SIZE);
// Set up timing
struct timespec start_in, end_in;
long dur_in_ns;
double dur_in = 0.0, dur_in_total = 0.0;
double dur_in_min = 1e99, dur_in_max = 0.0;
for (int i = 0; i < nruns; i++) {
// Start inclusive timing
clock_gettime(CLOCK_MONOTONIC, &start_in);
// Copy host arrays to the device
cudaMemcpy(dA, A, sizeof(int) * sA, cudaMemcpyHostToDevice);
cudaMemcpy(dB, B, sizeof(int) * sB, cudaMemcpyHostToDevice);
if (shared)
// Invoke the device kernel which multiplies the arrays with shared memory
cudaMultiplyArraysShared <<<dimGrid, dimBlock>>>
(dA, dB, dC, hA, wA, hB, wB, hC, wC);
else
// Invoke the device kernel which multiplies the arrays
cudaMultiplyArrays <<<dimGrid, dimBlock>>>
(dA, dB, dC, hA, wA, hB, wB, hC, wC);
// Copy the result array back to the host
cudaMemcpy(C, dC, sizeof(int) * sC, cudaMemcpyDeviceToHost);
// End inclusive timing
clock_gettime(CLOCK_MONOTONIC, &end_in);
// Calculate duration
dur_in_ns = (end_in.tv_sec - start_in.tv_sec) * 1000000000l +
end_in.tv_nsec - start_in.tv_nsec;
dur_in = (double)(dur_in_ns / 1000000.0);
dur_in_total += dur_in;
if (dur_in < dur_in_min) dur_in_min = dur_in;
if (dur_in > dur_in_max) dur_in_max = dur_in;
}
// Write result to file
if (prt) {
FILE* fp;
fp = fopen("problem2.out", "w");
for (int i = 0; i < hC; i++) {
for (int j = 0; j < wC; j++) fprintf(fp, "%12d ", C[i * wC + j]);
fprintf(fp, "\n");
}
fprintf(fp, "\n");
fclose(fp);
}
// Free memory
free(A);
free(B);
free(C);
cudaFree(dA);
cudaFree(dB);
cudaFree(dC);
// Get device properties
cudaDeviceProp gpu_props;
cudaGetDeviceProperties(&gpu_props, 0);
// Print some information
printf("Device name: %s\n", gpu_props.name);
printf("Dimension 1 (m): %12d\n", m);
printf("Dimension 2 (n): %12d\n", n);
printf("Dimension 3 (p): %12d\n", p);
printf("Block size: %12d\n", BLOCK_SIZE);
printf("Number of runs: %12d\n", nruns);
printf("Using shared memory?: %12s\n", shared ? "True" : "False");
printf("Inclusive time (min): %12.6f ms\n", dur_in_min);
printf("Inclusive time (avg): %12.6f ms\n", dur_in_total / nruns);
printf("Inclusive time (max): %12.6f ms\n", dur_in_max);
printf("\n");
return 0;
} | .file "tmpxft_0002f76a_00000000-6_p2.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2062:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2062:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z9int_powerii
.type _Z9int_powerii, @function
_Z9int_powerii:
.LFB2057:
.cfi_startproc
endbr64
movl $1, %eax
testl %esi, %esi
jle .L3
cmpl $1, %esi
jg .L8
movl $1, %eax
.L5:
imull %edi, %eax
.L3:
ret
.L6:
imull %edi, %eax
imull %edi, %edi
subl $1, %esi
movl %esi, %edx
shrl $31, %edx
addl %edx, %esi
sarl %esi
.L7:
cmpl $1, %esi
jle .L5
.L8:
testb $1, %sil
jne .L6
imull %edi, %edi
movl %esi, %edx
shrl $31, %edx
addl %edx, %esi
sarl %esi
jmp .L7
.cfi_endproc
.LFE2057:
.size _Z9int_powerii, .-_Z9int_powerii
.globl _Z10fill_arrayPiii
.type _Z10fill_arrayPiii, @function
_Z10fill_arrayPiii:
.LFB2058:
.cfi_startproc
endbr64
testl %esi, %esi
je .L21
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
movq %rdi, %r10
movl %esi, %ebx
movl $1, %ebp
subl %edx, %ebp
movl %edx, %r9d
movl $0, %r8d
movl $0, %esi
movl $0, %r11d
jmp .L14
.L15:
movl %eax, %ecx
leal (%rax,%r8), %edi
movl %edi, (%r10,%rcx,4)
addl $1, %eax
cmpl %r9d, %eax
jne .L15
.L16:
addl $1, %r11d
addl %edx, %esi
addl %ebp, %r8d
addl %edx, %r9d
cmpl %ebx, %r11d
je .L12
.L14:
movl %esi, %eax
testl %edx, %edx
jne .L15
jmp .L16
.L12:
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.L21:
.cfi_restore 3
.cfi_restore 6
ret
.cfi_endproc
.LFE2058:
.size _Z10fill_arrayPiii, .-_Z10fill_arrayPiii
.globl _Z48__device_stub__Z18cudaMultiplyArraysPiS_S_iiiiiiPiS_S_iiiiii
.type _Z48__device_stub__Z18cudaMultiplyArraysPiS_S_iiiiiiPiS_S_iiiiii, @function
_Z48__device_stub__Z18cudaMultiplyArraysPiS_S_iiiiiiPiS_S_iiiiii:
.LFB2084:
.cfi_startproc
endbr64
subq $200, %rsp
.cfi_def_cfa_offset 208
movq %rdi, 40(%rsp)
movq %rsi, 32(%rsp)
movq %rdx, 24(%rsp)
movl %ecx, 20(%rsp)
movl %r8d, 16(%rsp)
movl %r9d, 12(%rsp)
movq %fs:40, %rax
movq %rax, 184(%rsp)
xorl %eax, %eax
leaq 40(%rsp), %rax
movq %rax, 112(%rsp)
leaq 32(%rsp), %rax
movq %rax, 120(%rsp)
leaq 24(%rsp), %rax
movq %rax, 128(%rsp)
leaq 20(%rsp), %rax
movq %rax, 136(%rsp)
leaq 16(%rsp), %rax
movq %rax, 144(%rsp)
leaq 12(%rsp), %rax
movq %rax, 152(%rsp)
leaq 208(%rsp), %rax
movq %rax, 160(%rsp)
leaq 216(%rsp), %rax
movq %rax, 168(%rsp)
leaq 224(%rsp), %rax
movq %rax, 176(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
leaq 56(%rsp), %rcx
leaq 48(%rsp), %rdx
leaq 76(%rsp), %rsi
leaq 64(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L28
.L24:
movq 184(%rsp), %rax
subq %fs:40, %rax
jne .L29
addq $200, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L28:
.cfi_restore_state
pushq 56(%rsp)
.cfi_def_cfa_offset 216
pushq 56(%rsp)
.cfi_def_cfa_offset 224
leaq 128(%rsp), %r9
movq 92(%rsp), %rcx
movl 100(%rsp), %r8d
movq 80(%rsp), %rsi
movl 88(%rsp), %edx
leaq _Z18cudaMultiplyArraysPiS_S_iiiiii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 208
jmp .L24
.L29:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2084:
.size _Z48__device_stub__Z18cudaMultiplyArraysPiS_S_iiiiiiPiS_S_iiiiii, .-_Z48__device_stub__Z18cudaMultiplyArraysPiS_S_iiiiiiPiS_S_iiiiii
.globl _Z18cudaMultiplyArraysPiS_S_iiiiii
.type _Z18cudaMultiplyArraysPiS_S_iiiiii, @function
_Z18cudaMultiplyArraysPiS_S_iiiiii:
.LFB2085:
.cfi_startproc
endbr64
subq $16, %rsp
.cfi_def_cfa_offset 24
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 32
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 40
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 48
call _Z48__device_stub__Z18cudaMultiplyArraysPiS_S_iiiiiiPiS_S_iiiiii
addq $40, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _Z18cudaMultiplyArraysPiS_S_iiiiii, .-_Z18cudaMultiplyArraysPiS_S_iiiiii
.globl _Z54__device_stub__Z24cudaMultiplyArraysSharedPiS_S_iiiiiiPiS_S_iiiiii
.type _Z54__device_stub__Z24cudaMultiplyArraysSharedPiS_S_iiiiiiPiS_S_iiiiii, @function
_Z54__device_stub__Z24cudaMultiplyArraysSharedPiS_S_iiiiiiPiS_S_iiiiii:
.LFB2086:
.cfi_startproc
endbr64
subq $200, %rsp
.cfi_def_cfa_offset 208
movq %rdi, 40(%rsp)
movq %rsi, 32(%rsp)
movq %rdx, 24(%rsp)
movl %ecx, 20(%rsp)
movl %r8d, 16(%rsp)
movl %r9d, 12(%rsp)
movq %fs:40, %rax
movq %rax, 184(%rsp)
xorl %eax, %eax
leaq 40(%rsp), %rax
movq %rax, 112(%rsp)
leaq 32(%rsp), %rax
movq %rax, 120(%rsp)
leaq 24(%rsp), %rax
movq %rax, 128(%rsp)
leaq 20(%rsp), %rax
movq %rax, 136(%rsp)
leaq 16(%rsp), %rax
movq %rax, 144(%rsp)
leaq 12(%rsp), %rax
movq %rax, 152(%rsp)
leaq 208(%rsp), %rax
movq %rax, 160(%rsp)
leaq 216(%rsp), %rax
movq %rax, 168(%rsp)
leaq 224(%rsp), %rax
movq %rax, 176(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
leaq 56(%rsp), %rcx
leaq 48(%rsp), %rdx
leaq 76(%rsp), %rsi
leaq 64(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L36
.L32:
movq 184(%rsp), %rax
subq %fs:40, %rax
jne .L37
addq $200, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L36:
.cfi_restore_state
pushq 56(%rsp)
.cfi_def_cfa_offset 216
pushq 56(%rsp)
.cfi_def_cfa_offset 224
leaq 128(%rsp), %r9
movq 92(%rsp), %rcx
movl 100(%rsp), %r8d
movq 80(%rsp), %rsi
movl 88(%rsp), %edx
leaq _Z24cudaMultiplyArraysSharedPiS_S_iiiiii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 208
jmp .L32
.L37:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2086:
.size _Z54__device_stub__Z24cudaMultiplyArraysSharedPiS_S_iiiiiiPiS_S_iiiiii, .-_Z54__device_stub__Z24cudaMultiplyArraysSharedPiS_S_iiiiiiPiS_S_iiiiii
.globl _Z24cudaMultiplyArraysSharedPiS_S_iiiiii
.type _Z24cudaMultiplyArraysSharedPiS_S_iiiiii, @function
_Z24cudaMultiplyArraysSharedPiS_S_iiiiii:
.LFB2087:
.cfi_startproc
endbr64
subq $16, %rsp
.cfi_def_cfa_offset 24
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 32
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 40
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 48
call _Z54__device_stub__Z24cudaMultiplyArraysSharedPiS_S_iiiiiiPiS_S_iiiiii
addq $40, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2087:
.size _Z24cudaMultiplyArraysSharedPiS_S_iiiiii, .-_Z24cudaMultiplyArraysSharedPiS_S_iiiiii
.section .rodata.str1.1,"aMS",@progbits,1
.LC2:
.string "True"
.LC3:
.string "False"
.LC5:
.string "w"
.LC6:
.string "problem2.out"
.LC7:
.string "%12d "
.LC8:
.string "\n"
.LC9:
.string "Device name: %s\n"
.LC10:
.string "Dimension 1 (m): %12d\n"
.LC11:
.string "Dimension 2 (n): %12d\n"
.LC12:
.string "Dimension 3 (p): %12d\n"
.LC13:
.string "Block size: %12d\n"
.LC14:
.string "Number of runs: %12d\n"
.LC15:
.string "Using shared memory?: %12s\n"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC16:
.string "Inclusive time (min): %12.6f ms\n"
.align 8
.LC17:
.string "Inclusive time (avg): %12.6f ms\n"
.align 8
.LC18:
.string "Inclusive time (max): %12.6f ms\n"
.text
.globl main
.type main, @function
main:
.LFB2059:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $1224, %rsp
.cfi_def_cfa_offset 1280
movl %edi, %r14d
movq %fs:40, %rax
movq %rax, 1208(%rsp)
xorl %eax, %eax
cmpl $1, %edi
je .L56
movq %rsi, %rbx
cmpl $5, %edi
je .L65
.L41:
movl 64(%rsp), %ebx
movl %ebx, %ebp
movl 68(%rsp), %r15d
imull %r15d, %ebp
movslq %ebp, %rbp
salq $2, %rbp
movq %rbp, %rdi
call malloc@PLT
movq %rax, 32(%rsp)
movl %r15d, 68(%rsp)
movl %r15d, %r12d
imull %r14d, %r12d
movslq %r12d, %r12
salq $2, %r12
movq %r12, %rdi
call malloc@PLT
movq %rax, 40(%rsp)
movl %ebx, %r13d
imull %r14d, %r13d
movslq %r13d, %r13
salq $2, %r13
movq %r13, %rdi
call malloc@PLT
movq %rax, %r15
leaq 96(%rsp), %rdi
movq %rbp, %rsi
call cudaMalloc@PLT
leaq 104(%rsp), %rdi
movq %r12, %rsi
call cudaMalloc@PLT
leaq 112(%rsp), %rdi
movq %r13, %rsi
call cudaMalloc@PLT
movl 68(%rsp), %edx
movl %ebx, %esi
movq 32(%rsp), %rdi
call _Z10fill_arrayPiii
movl %r14d, %edx
movl 68(%rsp), %esi
movq 40(%rsp), %rdi
call _Z10fill_arrayPiii
movl $16, 120(%rsp)
movl $16, 124(%rsp)
movl $1, 128(%rsp)
leal 30(%r14), %eax
movl %r14d, %edx
addl $15, %edx
cmovns %edx, %eax
sarl $4, %eax
movl %eax, 132(%rsp)
leal 30(%rbx), %eax
addl $15, %ebx
cmovns %ebx, %eax
sarl $4, %eax
movl %eax, 136(%rsp)
movl $1, 140(%rsp)
cmpl $0, 52(%rsp)
jle .L57
movl $0, %ebx
movq $0x000000000, 16(%rsp)
movsd .LC1(%rip), %xmm6
movsd %xmm6, 8(%rsp)
movq $0x000000000, 24(%rsp)
movq %rbp, 56(%rsp)
movzbl 95(%rsp), %ebp
jmp .L47
.L65:
movq 8(%rsi), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movl %eax, %esi
movl $2, %edi
call _Z9int_powerii
movl %eax, %r14d
movl %eax, 64(%rsp)
movq 16(%rbx), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movl %eax, %esi
movl $2, %edi
call _Z9int_powerii
movl %eax, 52(%rsp)
movq 24(%rbx), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
testl %eax, %eax
setg 95(%rsp)
movq 32(%rbx), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
testl %eax, %eax
setg 88(%rsp)
movl %r14d, 68(%rsp)
jmp .L41
.L56:
movb $1, 88(%rsp)
movb $0, 95(%rsp)
movl $65536, 52(%rsp)
movl $32, 68(%rsp)
movl $16, 64(%rsp)
jmp .L41
.L43:
movl 128(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 120(%rsp), %rdx
movq 132(%rsp), %rdi
movl 140(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L66
.L44:
movl $2, %ecx
movq %r13, %rdx
movq 112(%rsp), %rsi
movq %r15, %rdi
call cudaMemcpy@PLT
leaq 160(%rsp), %rsi
movl $1, %edi
call clock_gettime@PLT
movq 160(%rsp), %rax
subq 144(%rsp), %rax
imulq $1000000000, %rax, %rax
addq 168(%rsp), %rax
subq 152(%rsp), %rax
pxor %xmm0, %xmm0
cvtsi2sdq %rax, %xmm0
divsd .LC4(%rip), %xmm0
movsd 24(%rsp), %xmm2
addsd %xmm0, %xmm2
movsd %xmm2, 24(%rsp)
movapd %xmm0, %xmm3
minsd 8(%rsp), %xmm3
movsd %xmm3, 8(%rsp)
maxsd 16(%rsp), %xmm0
movsd %xmm0, 16(%rsp)
addl $1, %ebx
cmpl %ebx, 52(%rsp)
je .L42
.L47:
leaq 144(%rsp), %rsi
movl $1, %edi
call clock_gettime@PLT
movl $1, %ecx
movq 56(%rsp), %rdx
movq 32(%rsp), %rsi
movq 96(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movq %r12, %rdx
movq 40(%rsp), %rsi
movq 104(%rsp), %rdi
call cudaMemcpy@PLT
testb %bpl, %bpl
je .L43
movl 128(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 120(%rsp), %rdx
movq 132(%rsp), %rdi
movl 140(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
jne .L44
subq $8, %rsp
.cfi_def_cfa_offset 1288
pushq %r14
.cfi_def_cfa_offset 1296
movl 80(%rsp), %ecx
pushq %rcx
.cfi_def_cfa_offset 1304
pushq %r14
.cfi_def_cfa_offset 1312
movl 100(%rsp), %r8d
movl %r8d, %r9d
movq 144(%rsp), %rdx
movq 136(%rsp), %rsi
movq 128(%rsp), %rdi
call _Z54__device_stub__Z24cudaMultiplyArraysSharedPiS_S_iiiiiiPiS_S_iiiiii
addq $32, %rsp
.cfi_def_cfa_offset 1280
jmp .L44
.L66:
subq $8, %rsp
.cfi_def_cfa_offset 1288
pushq %r14
.cfi_def_cfa_offset 1296
movl 80(%rsp), %ecx
pushq %rcx
.cfi_def_cfa_offset 1304
pushq %r14
.cfi_def_cfa_offset 1312
movl 100(%rsp), %r9d
movl %r9d, %r8d
movq 144(%rsp), %rdx
movq 136(%rsp), %rsi
movq 128(%rsp), %rdi
call _Z48__device_stub__Z18cudaMultiplyArraysPiS_S_iiiiiiPiS_S_iiiiii
addq $32, %rsp
.cfi_def_cfa_offset 1280
jmp .L44
.L57:
movq $0x000000000, 16(%rsp)
movsd .LC1(%rip), %xmm7
movsd %xmm7, 8(%rsp)
movq $0x000000000, 24(%rsp)
.L42:
cmpb $0, 88(%rsp)
jne .L67
.L48:
movq 32(%rsp), %rdi
call free@PLT
movq 40(%rsp), %rdi
call free@PLT
movq %r15, %rdi
call free@PLT
movq 96(%rsp), %rdi
call cudaFree@PLT
movq 104(%rsp), %rdi
call cudaFree@PLT
movq 112(%rsp), %rdi
call cudaFree@PLT
leaq 176(%rsp), %rbx
movl $0, %esi
movq %rbx, %rdi
call cudaGetDeviceProperties_v2@PLT
movq %rbx, %rdx
leaq .LC9(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 64(%rsp), %edx
leaq .LC10(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 68(%rsp), %edx
leaq .LC11(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %r14d, %edx
leaq .LC12(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $16, %edx
leaq .LC13(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 52(%rsp), %ebx
movl %ebx, %edx
leaq .LC14(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
cmpb $0, 95(%rsp)
leaq .LC3(%rip), %rdx
leaq .LC2(%rip), %rax
cmovne %rax, %rdx
leaq .LC15(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movsd 8(%rsp), %xmm0
leaq .LC16(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
pxor %xmm1, %xmm1
cvtsi2sdl %ebx, %xmm1
movsd 24(%rsp), %xmm0
divsd %xmm1, %xmm0
leaq .LC17(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movsd 16(%rsp), %xmm0
leaq .LC18(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 1208(%rsp), %rax
subq %fs:40, %rax
jne .L68
movl $0, %eax
addq $1224, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L67:
.cfi_restore_state
leaq .LC5(%rip), %rsi
leaq .LC6(%rip), %rdi
call fopen@PLT
movq %rax, %rbp
cmpl $0, 64(%rsp)
jle .L49
movl %r14d, 88(%rsp)
movl $0, %ebx
movl $0, %edx
movslq %r14d, %rax
movq %rax, 80(%rsp)
leaq .LC7(%rip), %r13
movq %r15, 72(%rsp)
movl %ebx, %r15d
movl %r14d, 56(%rsp)
movl %edx, %r14d
jmp .L50
.L52:
movslq %r15d, %rax
movq 72(%rsp), %rdx
leaq (%rdx,%rax,4), %rbx
movq 80(%rsp), %rdi
addq %rdi, %rax
leaq (%rdx,%rax,4), %r12
.L51:
movl (%rbx), %ecx
movq %r13, %rdx
movl $2, %esi
movq %rbp, %rdi
movl $0, %eax
call __fprintf_chk@PLT
addq $4, %rbx
cmpq %r12, %rbx
jne .L51
.L53:
leaq .LC8(%rip), %rdx
movl $2, %esi
movq %rbp, %rdi
movl $0, %eax
call __fprintf_chk@PLT
addl $1, %r14d
movl 88(%rsp), %eax
addl %eax, %r15d
cmpl %r14d, 64(%rsp)
je .L63
.L50:
cmpl $0, 56(%rsp)
jg .L52
jmp .L53
.L63:
movq 72(%rsp), %r15
movl 56(%rsp), %r14d
.L49:
leaq .LC8(%rip), %rdx
movl $2, %esi
movq %rbp, %rdi
movl $0, %eax
call __fprintf_chk@PLT
movq %rbp, %rdi
call fclose@PLT
jmp .L48
.L68:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2059:
.size main, .-main
.section .rodata.str1.8
.align 8
.LC19:
.string "_Z24cudaMultiplyArraysSharedPiS_S_iiiiii"
.align 8
.LC20:
.string "_Z18cudaMultiplyArraysPiS_S_iiiiii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2089:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC19(%rip), %rdx
movq %rdx, %rcx
leaq _Z24cudaMultiplyArraysSharedPiS_S_iiiiii(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC20(%rip), %rdx
movq %rdx, %rcx
leaq _Z18cudaMultiplyArraysPiS_S_iiiiii(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2089:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC1:
.long -1568170194
.long 1417495214
.align 8
.LC4:
.long 0
.long 1093567616
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <cuda.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#define BLOCK_SIZE 16
// Kernel
__global__ void cudaMultiplyArrays(int* dA, int* dB, int* dC, int hA, int wA,
int hB, int wB, int hC, int wC) {
int y = blockIdx.y * BLOCK_SIZE + threadIdx.y; // row
int x = blockIdx.x * BLOCK_SIZE + threadIdx.x; // column
if (y >= hA || x >= wB) return;
int result = 0;
for (unsigned int i = 0; i < wA; i++)
result += dA[y * wA + i] * dB[i * wB + x];
dC[y * wC + x] = result;
}
// Kernel using shared memory
__global__ void cudaMultiplyArraysShared(int* dA, int* dB, int* dC, int hA,
int wA, int hB, int wB, int hC,
int wC) {
// Thread and block indices
int tx = threadIdx.x;
int ty = threadIdx.y;
int bx = blockIdx.x;
int by = blockIdx.y;
// Number of subarrays for each block
int nsubs = (wA + BLOCK_SIZE - 1) / BLOCK_SIZE;
// Initialize subarrays in shared memory
__shared__ int sdA[BLOCK_SIZE][BLOCK_SIZE];
__shared__ int sdB[BLOCK_SIZE][BLOCK_SIZE];
// Loop over each subarray
int result = 0;
for (unsigned int r = 0; r < nsubs; r++) {
// Fill the subarrays in shared memory
sdA[ty][tx] = dA[(by * BLOCK_SIZE + ty) * wA + (r * BLOCK_SIZE + tx)];
sdB[ty][tx] = dB[(r * BLOCK_SIZE + ty) * wB + (bx * BLOCK_SIZE + tx)];
__syncthreads();
// Don't add out of bounds elements
int s_max;
if ((r + 1) * BLOCK_SIZE > wA)
s_max = wA - r * BLOCK_SIZE;
else
s_max = BLOCK_SIZE;
for (unsigned int s = 0; s < s_max; s++) result += sdA[ty][s] * sdB[s][tx];
__syncthreads();
}
// Don't fill out of bounds elements
if (bx * BLOCK_SIZE + tx >= wC) return;
if (by * BLOCK_SIZE + ty >= hC) return;
// Fill result array
dC[(by * BLOCK_SIZE + ty) * wB + (bx * BLOCK_SIZE + tx)] = result;
}
int int_power(int x, int n) {
if (n <= 0) return 1;
int y = 1;
while (n > 1) {
if (n % 2 == 0) {
x *= x;
n /= 2;
} else {
y *= x;
x *= x;
n = (n - 1) / 2;
}
}
return x * y;
}
void fill_array(int* A, int hA, int wA) {
for (unsigned int i = 0; i < hA; i++)
for (unsigned int j = 0; j < wA; j++) A[i * wA + j] = i + j;
}
int main(int argc, char* argv[]) {
int m, n, p, nruns;
bool shared, prt;
if (argc == 1) {
m = 16;
n = 32;
p = 1;
nruns = 65536;
shared = false;
prt = true;
} else if (argc == 5) {
int siz = int_power(2, atoi(argv[1]));
m = siz;
n = siz;
p = siz;
nruns = int_power(2, atoi(argv[2]));
if (atoi(argv[3]) > 0)
shared = true;
else
shared = false;
if (atoi(argv[4]) > 0)
prt = true;
else
prt = false;
}
// Array sizes
int hA = m, wA = n;
int hB = n, wB = p;
int hC = m, wC = p;
int sA = hA * wA;
int sB = hB * wB;
int sC = hC * wC;
// Allocate host arrays
int* A, *B, *C;
A = (int*)malloc(sizeof(int) * sA);
B = (int*)malloc(sizeof(int) * sB);
C = (int*)malloc(sizeof(int) * sC);
// Allocate device arrays
int* dA, *dB, *dC;
cudaMalloc(&dA, sizeof(int) * sA);
cudaMalloc(&dB, sizeof(int) * sB);
cudaMalloc(&dC, sizeof(int) * sC);
// Fill A and B with some integers
fill_array(A, hA, wA);
fill_array(B, hB, wB);
// Set up block grid
dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
dim3 dimGrid((wC + BLOCK_SIZE - 1) / BLOCK_SIZE,
(hC + BLOCK_SIZE - 1) / BLOCK_SIZE);
// Set up timing
struct timespec start_in, end_in;
long dur_in_ns;
double dur_in = 0.0, dur_in_total = 0.0;
double dur_in_min = 1e99, dur_in_max = 0.0;
for (int i = 0; i < nruns; i++) {
// Start inclusive timing
clock_gettime(CLOCK_MONOTONIC, &start_in);
// Copy host arrays to the device
cudaMemcpy(dA, A, sizeof(int) * sA, cudaMemcpyHostToDevice);
cudaMemcpy(dB, B, sizeof(int) * sB, cudaMemcpyHostToDevice);
if (shared)
// Invoke the device kernel which multiplies the arrays with shared memory
cudaMultiplyArraysShared <<<dimGrid, dimBlock>>>
(dA, dB, dC, hA, wA, hB, wB, hC, wC);
else
// Invoke the device kernel which multiplies the arrays
cudaMultiplyArrays <<<dimGrid, dimBlock>>>
(dA, dB, dC, hA, wA, hB, wB, hC, wC);
// Copy the result array back to the host
cudaMemcpy(C, dC, sizeof(int) * sC, cudaMemcpyDeviceToHost);
// End inclusive timing
clock_gettime(CLOCK_MONOTONIC, &end_in);
// Calculate duration
dur_in_ns = (end_in.tv_sec - start_in.tv_sec) * 1000000000l +
end_in.tv_nsec - start_in.tv_nsec;
dur_in = (double)(dur_in_ns / 1000000.0);
dur_in_total += dur_in;
if (dur_in < dur_in_min) dur_in_min = dur_in;
if (dur_in > dur_in_max) dur_in_max = dur_in;
}
// Write result to file
if (prt) {
FILE* fp;
fp = fopen("problem2.out", "w");
for (int i = 0; i < hC; i++) {
for (int j = 0; j < wC; j++) fprintf(fp, "%12d ", C[i * wC + j]);
fprintf(fp, "\n");
}
fprintf(fp, "\n");
fclose(fp);
}
// Free memory
free(A);
free(B);
free(C);
cudaFree(dA);
cudaFree(dB);
cudaFree(dC);
// Get device properties
cudaDeviceProp gpu_props;
cudaGetDeviceProperties(&gpu_props, 0);
// Print some information
printf("Device name: %s\n", gpu_props.name);
printf("Dimension 1 (m): %12d\n", m);
printf("Dimension 2 (n): %12d\n", n);
printf("Dimension 3 (p): %12d\n", p);
printf("Block size: %12d\n", BLOCK_SIZE);
printf("Number of runs: %12d\n", nruns);
printf("Using shared memory?: %12s\n", shared ? "True" : "False");
printf("Inclusive time (min): %12.6f ms\n", dur_in_min);
printf("Inclusive time (avg): %12.6f ms\n", dur_in_total / nruns);
printf("Inclusive time (max): %12.6f ms\n", dur_in_max);
printf("\n");
return 0;
} | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#define BLOCK_SIZE 16
// Kernel
__global__ void cudaMultiplyArrays(int* dA, int* dB, int* dC, int hA, int wA,
int hB, int wB, int hC, int wC) {
int y = blockIdx.y * BLOCK_SIZE + threadIdx.y; // row
int x = blockIdx.x * BLOCK_SIZE + threadIdx.x; // column
if (y >= hA || x >= wB) return;
int result = 0;
for (unsigned int i = 0; i < wA; i++)
result += dA[y * wA + i] * dB[i * wB + x];
dC[y * wC + x] = result;
}
// Kernel using shared memory
__global__ void cudaMultiplyArraysShared(int* dA, int* dB, int* dC, int hA,
int wA, int hB, int wB, int hC,
int wC) {
// Thread and block indices
int tx = threadIdx.x;
int ty = threadIdx.y;
int bx = blockIdx.x;
int by = blockIdx.y;
// Number of subarrays for each block
int nsubs = (wA + BLOCK_SIZE - 1) / BLOCK_SIZE;
// Initialize subarrays in shared memory
__shared__ int sdA[BLOCK_SIZE][BLOCK_SIZE];
__shared__ int sdB[BLOCK_SIZE][BLOCK_SIZE];
// Loop over each subarray
int result = 0;
for (unsigned int r = 0; r < nsubs; r++) {
// Fill the subarrays in shared memory
sdA[ty][tx] = dA[(by * BLOCK_SIZE + ty) * wA + (r * BLOCK_SIZE + tx)];
sdB[ty][tx] = dB[(r * BLOCK_SIZE + ty) * wB + (bx * BLOCK_SIZE + tx)];
__syncthreads();
// Don't add out of bounds elements
int s_max;
if ((r + 1) * BLOCK_SIZE > wA)
s_max = wA - r * BLOCK_SIZE;
else
s_max = BLOCK_SIZE;
for (unsigned int s = 0; s < s_max; s++) result += sdA[ty][s] * sdB[s][tx];
__syncthreads();
}
// Don't fill out of bounds elements
if (bx * BLOCK_SIZE + tx >= wC) return;
if (by * BLOCK_SIZE + ty >= hC) return;
// Fill result array
dC[(by * BLOCK_SIZE + ty) * wB + (bx * BLOCK_SIZE + tx)] = result;
}
int int_power(int x, int n) {
if (n <= 0) return 1;
int y = 1;
while (n > 1) {
if (n % 2 == 0) {
x *= x;
n /= 2;
} else {
y *= x;
x *= x;
n = (n - 1) / 2;
}
}
return x * y;
}
void fill_array(int* A, int hA, int wA) {
for (unsigned int i = 0; i < hA; i++)
for (unsigned int j = 0; j < wA; j++) A[i * wA + j] = i + j;
}
int main(int argc, char* argv[]) {
int m, n, p, nruns;
bool shared, prt;
if (argc == 1) {
m = 16;
n = 32;
p = 1;
nruns = 65536;
shared = false;
prt = true;
} else if (argc == 5) {
int siz = int_power(2, atoi(argv[1]));
m = siz;
n = siz;
p = siz;
nruns = int_power(2, atoi(argv[2]));
if (atoi(argv[3]) > 0)
shared = true;
else
shared = false;
if (atoi(argv[4]) > 0)
prt = true;
else
prt = false;
}
// Array sizes
int hA = m, wA = n;
int hB = n, wB = p;
int hC = m, wC = p;
int sA = hA * wA;
int sB = hB * wB;
int sC = hC * wC;
// Allocate host arrays
int* A, *B, *C;
A = (int*)malloc(sizeof(int) * sA);
B = (int*)malloc(sizeof(int) * sB);
C = (int*)malloc(sizeof(int) * sC);
// Allocate device arrays
int* dA, *dB, *dC;
hipMalloc(&dA, sizeof(int) * sA);
hipMalloc(&dB, sizeof(int) * sB);
hipMalloc(&dC, sizeof(int) * sC);
// Fill A and B with some integers
fill_array(A, hA, wA);
fill_array(B, hB, wB);
// Set up block grid
dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
dim3 dimGrid((wC + BLOCK_SIZE - 1) / BLOCK_SIZE,
(hC + BLOCK_SIZE - 1) / BLOCK_SIZE);
// Set up timing
struct timespec start_in, end_in;
long dur_in_ns;
double dur_in = 0.0, dur_in_total = 0.0;
double dur_in_min = 1e99, dur_in_max = 0.0;
for (int i = 0; i < nruns; i++) {
// Start inclusive timing
clock_gettime(CLOCK_MONOTONIC, &start_in);
// Copy host arrays to the device
hipMemcpy(dA, A, sizeof(int) * sA, hipMemcpyHostToDevice);
hipMemcpy(dB, B, sizeof(int) * sB, hipMemcpyHostToDevice);
if (shared)
// Invoke the device kernel which multiplies the arrays with shared memory
cudaMultiplyArraysShared <<<dimGrid, dimBlock>>>
(dA, dB, dC, hA, wA, hB, wB, hC, wC);
else
// Invoke the device kernel which multiplies the arrays
cudaMultiplyArrays <<<dimGrid, dimBlock>>>
(dA, dB, dC, hA, wA, hB, wB, hC, wC);
// Copy the result array back to the host
hipMemcpy(C, dC, sizeof(int) * sC, hipMemcpyDeviceToHost);
// End inclusive timing
clock_gettime(CLOCK_MONOTONIC, &end_in);
// Calculate duration
dur_in_ns = (end_in.tv_sec - start_in.tv_sec) * 1000000000l +
end_in.tv_nsec - start_in.tv_nsec;
dur_in = (double)(dur_in_ns / 1000000.0);
dur_in_total += dur_in;
if (dur_in < dur_in_min) dur_in_min = dur_in;
if (dur_in > dur_in_max) dur_in_max = dur_in;
}
// Write result to file
if (prt) {
FILE* fp;
fp = fopen("problem2.out", "w");
for (int i = 0; i < hC; i++) {
for (int j = 0; j < wC; j++) fprintf(fp, "%12d ", C[i * wC + j]);
fprintf(fp, "\n");
}
fprintf(fp, "\n");
fclose(fp);
}
// Free memory
free(A);
free(B);
free(C);
hipFree(dA);
hipFree(dB);
hipFree(dC);
// Get device properties
hipDeviceProp_t gpu_props;
hipGetDeviceProperties(&gpu_props, 0);
// Print some information
printf("Device name: %s\n", gpu_props.name);
printf("Dimension 1 (m): %12d\n", m);
printf("Dimension 2 (n): %12d\n", n);
printf("Dimension 3 (p): %12d\n", p);
printf("Block size: %12d\n", BLOCK_SIZE);
printf("Number of runs: %12d\n", nruns);
printf("Using shared memory?: %12s\n", shared ? "True" : "False");
printf("Inclusive time (min): %12.6f ms\n", dur_in_min);
printf("Inclusive time (avg): %12.6f ms\n", dur_in_total / nruns);
printf("Inclusive time (max): %12.6f ms\n", dur_in_max);
printf("\n");
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#define BLOCK_SIZE 16
// Kernel
__global__ void cudaMultiplyArrays(int* dA, int* dB, int* dC, int hA, int wA,
int hB, int wB, int hC, int wC) {
int y = blockIdx.y * BLOCK_SIZE + threadIdx.y; // row
int x = blockIdx.x * BLOCK_SIZE + threadIdx.x; // column
if (y >= hA || x >= wB) return;
int result = 0;
for (unsigned int i = 0; i < wA; i++)
result += dA[y * wA + i] * dB[i * wB + x];
dC[y * wC + x] = result;
}
// Kernel using shared memory
__global__ void cudaMultiplyArraysShared(int* dA, int* dB, int* dC, int hA,
int wA, int hB, int wB, int hC,
int wC) {
// Thread and block indices
int tx = threadIdx.x;
int ty = threadIdx.y;
int bx = blockIdx.x;
int by = blockIdx.y;
// Number of subarrays for each block
int nsubs = (wA + BLOCK_SIZE - 1) / BLOCK_SIZE;
// Initialize subarrays in shared memory
__shared__ int sdA[BLOCK_SIZE][BLOCK_SIZE];
__shared__ int sdB[BLOCK_SIZE][BLOCK_SIZE];
// Loop over each subarray
int result = 0;
for (unsigned int r = 0; r < nsubs; r++) {
// Fill the subarrays in shared memory
sdA[ty][tx] = dA[(by * BLOCK_SIZE + ty) * wA + (r * BLOCK_SIZE + tx)];
sdB[ty][tx] = dB[(r * BLOCK_SIZE + ty) * wB + (bx * BLOCK_SIZE + tx)];
__syncthreads();
// Don't add out of bounds elements
int s_max;
if ((r + 1) * BLOCK_SIZE > wA)
s_max = wA - r * BLOCK_SIZE;
else
s_max = BLOCK_SIZE;
for (unsigned int s = 0; s < s_max; s++) result += sdA[ty][s] * sdB[s][tx];
__syncthreads();
}
// Don't fill out of bounds elements
if (bx * BLOCK_SIZE + tx >= wC) return;
if (by * BLOCK_SIZE + ty >= hC) return;
// Fill result array
dC[(by * BLOCK_SIZE + ty) * wB + (bx * BLOCK_SIZE + tx)] = result;
}
int int_power(int x, int n) {
if (n <= 0) return 1;
int y = 1;
while (n > 1) {
if (n % 2 == 0) {
x *= x;
n /= 2;
} else {
y *= x;
x *= x;
n = (n - 1) / 2;
}
}
return x * y;
}
void fill_array(int* A, int hA, int wA) {
for (unsigned int i = 0; i < hA; i++)
for (unsigned int j = 0; j < wA; j++) A[i * wA + j] = i + j;
}
int main(int argc, char* argv[]) {
int m, n, p, nruns;
bool shared, prt;
if (argc == 1) {
m = 16;
n = 32;
p = 1;
nruns = 65536;
shared = false;
prt = true;
} else if (argc == 5) {
int siz = int_power(2, atoi(argv[1]));
m = siz;
n = siz;
p = siz;
nruns = int_power(2, atoi(argv[2]));
if (atoi(argv[3]) > 0)
shared = true;
else
shared = false;
if (atoi(argv[4]) > 0)
prt = true;
else
prt = false;
}
// Array sizes
int hA = m, wA = n;
int hB = n, wB = p;
int hC = m, wC = p;
int sA = hA * wA;
int sB = hB * wB;
int sC = hC * wC;
// Allocate host arrays
int* A, *B, *C;
A = (int*)malloc(sizeof(int) * sA);
B = (int*)malloc(sizeof(int) * sB);
C = (int*)malloc(sizeof(int) * sC);
// Allocate device arrays
int* dA, *dB, *dC;
hipMalloc(&dA, sizeof(int) * sA);
hipMalloc(&dB, sizeof(int) * sB);
hipMalloc(&dC, sizeof(int) * sC);
// Fill A and B with some integers
fill_array(A, hA, wA);
fill_array(B, hB, wB);
// Set up block grid
dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
dim3 dimGrid((wC + BLOCK_SIZE - 1) / BLOCK_SIZE,
(hC + BLOCK_SIZE - 1) / BLOCK_SIZE);
// Set up timing
struct timespec start_in, end_in;
long dur_in_ns;
double dur_in = 0.0, dur_in_total = 0.0;
double dur_in_min = 1e99, dur_in_max = 0.0;
for (int i = 0; i < nruns; i++) {
// Start inclusive timing
clock_gettime(CLOCK_MONOTONIC, &start_in);
// Copy host arrays to the device
hipMemcpy(dA, A, sizeof(int) * sA, hipMemcpyHostToDevice);
hipMemcpy(dB, B, sizeof(int) * sB, hipMemcpyHostToDevice);
if (shared)
// Invoke the device kernel which multiplies the arrays with shared memory
cudaMultiplyArraysShared <<<dimGrid, dimBlock>>>
(dA, dB, dC, hA, wA, hB, wB, hC, wC);
else
// Invoke the device kernel which multiplies the arrays
cudaMultiplyArrays <<<dimGrid, dimBlock>>>
(dA, dB, dC, hA, wA, hB, wB, hC, wC);
// Copy the result array back to the host
hipMemcpy(C, dC, sizeof(int) * sC, hipMemcpyDeviceToHost);
// End inclusive timing
clock_gettime(CLOCK_MONOTONIC, &end_in);
// Calculate duration
dur_in_ns = (end_in.tv_sec - start_in.tv_sec) * 1000000000l +
end_in.tv_nsec - start_in.tv_nsec;
dur_in = (double)(dur_in_ns / 1000000.0);
dur_in_total += dur_in;
if (dur_in < dur_in_min) dur_in_min = dur_in;
if (dur_in > dur_in_max) dur_in_max = dur_in;
}
// Write result to file
if (prt) {
FILE* fp;
fp = fopen("problem2.out", "w");
for (int i = 0; i < hC; i++) {
for (int j = 0; j < wC; j++) fprintf(fp, "%12d ", C[i * wC + j]);
fprintf(fp, "\n");
}
fprintf(fp, "\n");
fclose(fp);
}
// Free memory
free(A);
free(B);
free(C);
hipFree(dA);
hipFree(dB);
hipFree(dC);
// Get device properties
hipDeviceProp_t gpu_props;
hipGetDeviceProperties(&gpu_props, 0);
// Print some information
printf("Device name: %s\n", gpu_props.name);
printf("Dimension 1 (m): %12d\n", m);
printf("Dimension 2 (n): %12d\n", n);
printf("Dimension 3 (p): %12d\n", p);
printf("Block size: %12d\n", BLOCK_SIZE);
printf("Number of runs: %12d\n", nruns);
printf("Using shared memory?: %12s\n", shared ? "True" : "False");
printf("Inclusive time (min): %12.6f ms\n", dur_in_min);
printf("Inclusive time (avg): %12.6f ms\n", dur_in_total / nruns);
printf("Inclusive time (max): %12.6f ms\n", dur_in_max);
printf("\n");
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z18cudaMultiplyArraysPiS_S_iiiiii
.globl _Z18cudaMultiplyArraysPiS_S_iiiiii
.p2align 8
.type _Z18cudaMultiplyArraysPiS_S_iiiiii,@function
_Z18cudaMultiplyArraysPiS_S_iiiiii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x18
s_load_b32 s3, s[0:1], 0x24
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v0, 0x3ff, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshl_add_u32 v6, s15, 4, v1
v_lshl_add_u32 v0, s14, 4, v0
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_gt_i32_e32 vcc_lo, s2, v6
v_cmp_gt_i32_e64 s2, s3, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s2, vcc_lo, s2
s_and_saveexec_b32 s4, s2
s_cbranch_execz .LBB0_5
s_load_b32 s2, s[0:1], 0x1c
v_mov_b32_e32 v1, 0
s_waitcnt lgkmcnt(0)
s_cmp_eq_u32 s2, 0
s_cbranch_scc1 .LBB0_4
s_load_b128 s[4:7], s[0:1], 0x0
v_mul_lo_u32 v2, v6, s2
v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v4, v0
.p2align 6
.LBB0_3:
v_mov_b32_e32 v3, 0
s_add_i32 s2, s2, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_cmp_eq_u32 s2, 0
v_mov_b32_e32 v5, v3
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[7:8], 2, v[2:3]
v_lshlrev_b64 v[9:10], 2, v[4:5]
v_add_nc_u32_e32 v4, s3, v4
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v7, vcc_lo, s4, v7
v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
s_delay_alu instid0(VALU_DEP_4)
v_add_co_u32 v9, vcc_lo, s6, v9
v_add_co_ci_u32_e32 v10, vcc_lo, s7, v10, vcc_lo
global_load_b32 v3, v[7:8], off
global_load_b32 v5, v[9:10], off
s_waitcnt vmcnt(0)
v_mad_u64_u32 v[7:8], null, v5, v3, v[1:2]
s_delay_alu instid0(VALU_DEP_1)
v_dual_mov_b32 v1, v7 :: v_dual_add_nc_u32 v2, 1, v2
s_cbranch_scc0 .LBB0_3
.LBB0_4:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
v_mad_u64_u32 v[2:3], null, v6, s2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s0, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
global_store_b32 v[2:3], v1, off
.LBB0_5:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z18cudaMultiplyArraysPiS_S_iiiiii
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 48
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 11
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z18cudaMultiplyArraysPiS_S_iiiiii, .Lfunc_end0-_Z18cudaMultiplyArraysPiS_S_iiiiii
.section .AMDGPU.csdata,"",@progbits
.text
.protected _Z24cudaMultiplyArraysSharedPiS_S_iiiiii
.globl _Z24cudaMultiplyArraysSharedPiS_S_iiiiii
.p2align 8
.type _Z24cudaMultiplyArraysSharedPiS_S_iiiiii,@function
_Z24cudaMultiplyArraysSharedPiS_S_iiiiii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x1c
s_load_b32 s3, s[0:1], 0x24
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v4, v0, 10, 10
v_mov_b32_e32 v0, 0
s_waitcnt lgkmcnt(0)
s_add_i32 s4, s2, 30
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_lt_u32 s4, 31
s_cbranch_scc1 .LBB1_6
s_load_b128 s[4:7], s[0:1], 0x0
v_lshlrev_b32_e32 v0, 2, v1
v_lshl_add_u32 v7, s15, 4, v4
s_add_i32 s8, s2, 15
v_lshlrev_b32_e32 v5, 6, v4
s_ashr_i32 s9, s8, 31
v_add_nc_u32_e32 v6, 0x400, v0
s_lshr_b32 s9, s9, 28
v_mad_u64_u32 v[2:3], null, v7, s2, v[1:2]
s_add_i32 s8, s8, s9
v_dual_mov_b32 v0, 0 :: v_dual_add_nc_u32 v7, v5, v0
v_lshl_add_u32 v3, s14, 4, v1
v_add_nc_u32_e32 v8, v6, v5
s_ashr_i32 s8, s8, 4
s_mov_b32 s9, 0
s_max_u32 s8, s8, 1
s_branch .LBB1_3
.LBB1_2:
s_cmp_eq_u32 s9, s8
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB1_6
.LBB1_3:
s_lshl_b32 s10, s9, 4
s_add_i32 s9, s9, 1
v_dual_mov_b32 v10, 0 :: v_dual_add_nc_u32 v13, s10, v4
v_add_nc_u32_e32 v9, s10, v2
s_lshl_b32 s11, s9, 4
s_sub_i32 s10, s2, s10
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[11:12], null, v13, s3, v[3:4]
v_mov_b32_e32 v12, v10
v_lshlrev_b64 v[9:10], 2, v[9:10]
s_cmp_gt_u32 s11, s2
s_cselect_b32 s10, s10, 16
s_cmp_eq_u32 s10, 0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[11:12], 2, v[11:12]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v9, vcc_lo, s4, v9
v_add_co_ci_u32_e32 v10, vcc_lo, s5, v10, vcc_lo
v_add_co_u32 v11, vcc_lo, s6, v11
s_delay_alu instid0(VALU_DEP_4)
v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
global_load_b32 v9, v[9:10], off
global_load_b32 v10, v[11:12], off
s_waitcnt vmcnt(1)
ds_store_b32 v7, v9
s_waitcnt vmcnt(0)
ds_store_b32 v8, v10
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB1_2
v_dual_mov_b32 v9, v6 :: v_dual_mov_b32 v10, v5
s_mov_b32 s11, 0
.LBB1_5:
ds_load_b32 v13, v10
ds_load_b32 v14, v9
v_add_nc_u32_e32 v10, 4, v10
s_add_i32 s11, s11, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
s_cmp_ge_u32 s11, s10
s_waitcnt lgkmcnt(0)
v_mad_u64_u32 v[11:12], null, v14, v13, v[0:1]
v_dual_mov_b32 v0, v11 :: v_dual_add_nc_u32 v9, 64, v9
s_cbranch_scc0 .LBB1_5
s_branch .LBB1_2
.LBB1_6:
s_load_b64 s[4:5], s[0:1], 0x28
v_lshl_add_u32 v1, s14, 4, v1
v_lshl_add_u32 v2, s15, 4, v4
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_gt_i32_e32 vcc_lo, s5, v1
v_cmp_gt_i32_e64 s2, s4, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s2, vcc_lo, s2
s_and_saveexec_b32 s4, s2
s_cbranch_execz .LBB1_8
s_load_b64 s[0:1], s[0:1], 0x10
v_mad_u64_u32 v[3:4], null, v2, s3, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v4, 31, v3
v_lshlrev_b64 v[1:2], 2, v[3:4]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v1, vcc_lo, s0, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
global_store_b32 v[1:2], v0, off
.LBB1_8:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z24cudaMultiplyArraysSharedPiS_S_iiiiii
.amdhsa_group_segment_fixed_size 2048
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 48
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 15
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end1:
.size _Z24cudaMultiplyArraysSharedPiS_S_iiiiii, .Lfunc_end1-_Z24cudaMultiplyArraysSharedPiS_S_iiiiii
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 28
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: by_value
- .offset: 36
.size: 4
.value_kind: by_value
- .offset: 40
.size: 4
.value_kind: by_value
- .offset: 44
.size: 4
.value_kind: by_value
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 48
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z18cudaMultiplyArraysPiS_S_iiiiii
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z18cudaMultiplyArraysPiS_S_iiiiii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 11
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 28
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: by_value
- .offset: 36
.size: 4
.value_kind: by_value
- .offset: 40
.size: 4
.value_kind: by_value
- .offset: 44
.size: 4
.value_kind: by_value
.group_segment_fixed_size: 2048
.kernarg_segment_align: 8
.kernarg_segment_size: 48
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z24cudaMultiplyArraysSharedPiS_S_iiiiii
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z24cudaMultiplyArraysSharedPiS_S_iiiiii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 15
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#define BLOCK_SIZE 16
// Kernel
__global__ void cudaMultiplyArrays(int* dA, int* dB, int* dC, int hA, int wA,
int hB, int wB, int hC, int wC) {
int y = blockIdx.y * BLOCK_SIZE + threadIdx.y; // row
int x = blockIdx.x * BLOCK_SIZE + threadIdx.x; // column
if (y >= hA || x >= wB) return;
int result = 0;
for (unsigned int i = 0; i < wA; i++)
result += dA[y * wA + i] * dB[i * wB + x];
dC[y * wC + x] = result;
}
// Kernel using shared memory
__global__ void cudaMultiplyArraysShared(int* dA, int* dB, int* dC, int hA,
int wA, int hB, int wB, int hC,
int wC) {
// Thread and block indices
int tx = threadIdx.x;
int ty = threadIdx.y;
int bx = blockIdx.x;
int by = blockIdx.y;
// Number of subarrays for each block
int nsubs = (wA + BLOCK_SIZE - 1) / BLOCK_SIZE;
// Initialize subarrays in shared memory
__shared__ int sdA[BLOCK_SIZE][BLOCK_SIZE];
__shared__ int sdB[BLOCK_SIZE][BLOCK_SIZE];
// Loop over each subarray
int result = 0;
for (unsigned int r = 0; r < nsubs; r++) {
// Fill the subarrays in shared memory
sdA[ty][tx] = dA[(by * BLOCK_SIZE + ty) * wA + (r * BLOCK_SIZE + tx)];
sdB[ty][tx] = dB[(r * BLOCK_SIZE + ty) * wB + (bx * BLOCK_SIZE + tx)];
__syncthreads();
// Don't add out of bounds elements
int s_max;
if ((r + 1) * BLOCK_SIZE > wA)
s_max = wA - r * BLOCK_SIZE;
else
s_max = BLOCK_SIZE;
for (unsigned int s = 0; s < s_max; s++) result += sdA[ty][s] * sdB[s][tx];
__syncthreads();
}
// Don't fill out of bounds elements
if (bx * BLOCK_SIZE + tx >= wC) return;
if (by * BLOCK_SIZE + ty >= hC) return;
// Fill result array
dC[(by * BLOCK_SIZE + ty) * wB + (bx * BLOCK_SIZE + tx)] = result;
}
int int_power(int x, int n) {
if (n <= 0) return 1;
int y = 1;
while (n > 1) {
if (n % 2 == 0) {
x *= x;
n /= 2;
} else {
y *= x;
x *= x;
n = (n - 1) / 2;
}
}
return x * y;
}
void fill_array(int* A, int hA, int wA) {
for (unsigned int i = 0; i < hA; i++)
for (unsigned int j = 0; j < wA; j++) A[i * wA + j] = i + j;
}
int main(int argc, char* argv[]) {
int m, n, p, nruns;
bool shared, prt;
if (argc == 1) {
m = 16;
n = 32;
p = 1;
nruns = 65536;
shared = false;
prt = true;
} else if (argc == 5) {
int siz = int_power(2, atoi(argv[1]));
m = siz;
n = siz;
p = siz;
nruns = int_power(2, atoi(argv[2]));
if (atoi(argv[3]) > 0)
shared = true;
else
shared = false;
if (atoi(argv[4]) > 0)
prt = true;
else
prt = false;
}
// Array sizes
int hA = m, wA = n;
int hB = n, wB = p;
int hC = m, wC = p;
int sA = hA * wA;
int sB = hB * wB;
int sC = hC * wC;
// Allocate host arrays
int* A, *B, *C;
A = (int*)malloc(sizeof(int) * sA);
B = (int*)malloc(sizeof(int) * sB);
C = (int*)malloc(sizeof(int) * sC);
// Allocate device arrays
int* dA, *dB, *dC;
hipMalloc(&dA, sizeof(int) * sA);
hipMalloc(&dB, sizeof(int) * sB);
hipMalloc(&dC, sizeof(int) * sC);
// Fill A and B with some integers
fill_array(A, hA, wA);
fill_array(B, hB, wB);
// Set up block grid
dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
dim3 dimGrid((wC + BLOCK_SIZE - 1) / BLOCK_SIZE,
(hC + BLOCK_SIZE - 1) / BLOCK_SIZE);
// Set up timing
struct timespec start_in, end_in;
long dur_in_ns;
double dur_in = 0.0, dur_in_total = 0.0;
double dur_in_min = 1e99, dur_in_max = 0.0;
for (int i = 0; i < nruns; i++) {
// Start inclusive timing
clock_gettime(CLOCK_MONOTONIC, &start_in);
// Copy host arrays to the device
hipMemcpy(dA, A, sizeof(int) * sA, hipMemcpyHostToDevice);
hipMemcpy(dB, B, sizeof(int) * sB, hipMemcpyHostToDevice);
if (shared)
// Invoke the device kernel which multiplies the arrays with shared memory
cudaMultiplyArraysShared <<<dimGrid, dimBlock>>>
(dA, dB, dC, hA, wA, hB, wB, hC, wC);
else
// Invoke the device kernel which multiplies the arrays
cudaMultiplyArrays <<<dimGrid, dimBlock>>>
(dA, dB, dC, hA, wA, hB, wB, hC, wC);
// Copy the result array back to the host
hipMemcpy(C, dC, sizeof(int) * sC, hipMemcpyDeviceToHost);
// End inclusive timing
clock_gettime(CLOCK_MONOTONIC, &end_in);
// Calculate duration
dur_in_ns = (end_in.tv_sec - start_in.tv_sec) * 1000000000l +
end_in.tv_nsec - start_in.tv_nsec;
dur_in = (double)(dur_in_ns / 1000000.0);
dur_in_total += dur_in;
if (dur_in < dur_in_min) dur_in_min = dur_in;
if (dur_in > dur_in_max) dur_in_max = dur_in;
}
// Write result to file
if (prt) {
FILE* fp;
fp = fopen("problem2.out", "w");
for (int i = 0; i < hC; i++) {
for (int j = 0; j < wC; j++) fprintf(fp, "%12d ", C[i * wC + j]);
fprintf(fp, "\n");
}
fprintf(fp, "\n");
fclose(fp);
}
// Free memory
free(A);
free(B);
free(C);
hipFree(dA);
hipFree(dB);
hipFree(dC);
// Get device properties
hipDeviceProp_t gpu_props;
hipGetDeviceProperties(&gpu_props, 0);
// Print some information
printf("Device name: %s\n", gpu_props.name);
printf("Dimension 1 (m): %12d\n", m);
printf("Dimension 2 (n): %12d\n", n);
printf("Dimension 3 (p): %12d\n", p);
printf("Block size: %12d\n", BLOCK_SIZE);
printf("Number of runs: %12d\n", nruns);
printf("Using shared memory?: %12s\n", shared ? "True" : "False");
printf("Inclusive time (min): %12.6f ms\n", dur_in_min);
printf("Inclusive time (avg): %12.6f ms\n", dur_in_total / nruns);
printf("Inclusive time (max): %12.6f ms\n", dur_in_max);
printf("\n");
return 0;
} | .text
.file "p2.hip"
.globl _Z33__device_stub__cudaMultiplyArraysPiS_S_iiiiii # -- Begin function _Z33__device_stub__cudaMultiplyArraysPiS_S_iiiiii
.p2align 4, 0x90
.type _Z33__device_stub__cudaMultiplyArraysPiS_S_iiiiii,@function
_Z33__device_stub__cudaMultiplyArraysPiS_S_iiiiii: # @_Z33__device_stub__cudaMultiplyArraysPiS_S_iiiiii
.cfi_startproc
# %bb.0:
subq $168, %rsp
.cfi_def_cfa_offset 176
movq %rdi, 88(%rsp)
movq %rsi, 80(%rsp)
movq %rdx, 72(%rsp)
movl %ecx, 20(%rsp)
movl %r8d, 16(%rsp)
movl %r9d, 12(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
leaq 20(%rsp), %rax
movq %rax, 120(%rsp)
leaq 16(%rsp), %rax
movq %rax, 128(%rsp)
leaq 12(%rsp), %rax
movq %rax, 136(%rsp)
leaq 176(%rsp), %rax
movq %rax, 144(%rsp)
leaq 184(%rsp), %rax
movq %rax, 152(%rsp)
leaq 192(%rsp), %rax
movq %rax, 160(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z18cudaMultiplyArraysPiS_S_iiiiii, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $184, %rsp
.cfi_adjust_cfa_offset -184
retq
.Lfunc_end0:
.size _Z33__device_stub__cudaMultiplyArraysPiS_S_iiiiii, .Lfunc_end0-_Z33__device_stub__cudaMultiplyArraysPiS_S_iiiiii
.cfi_endproc
# -- End function
.globl _Z39__device_stub__cudaMultiplyArraysSharedPiS_S_iiiiii # -- Begin function _Z39__device_stub__cudaMultiplyArraysSharedPiS_S_iiiiii
.p2align 4, 0x90
.type _Z39__device_stub__cudaMultiplyArraysSharedPiS_S_iiiiii,@function
_Z39__device_stub__cudaMultiplyArraysSharedPiS_S_iiiiii: # @_Z39__device_stub__cudaMultiplyArraysSharedPiS_S_iiiiii
.cfi_startproc
# %bb.0:
subq $168, %rsp
.cfi_def_cfa_offset 176
movq %rdi, 88(%rsp)
movq %rsi, 80(%rsp)
movq %rdx, 72(%rsp)
movl %ecx, 20(%rsp)
movl %r8d, 16(%rsp)
movl %r9d, 12(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
leaq 20(%rsp), %rax
movq %rax, 120(%rsp)
leaq 16(%rsp), %rax
movq %rax, 128(%rsp)
leaq 12(%rsp), %rax
movq %rax, 136(%rsp)
leaq 176(%rsp), %rax
movq %rax, 144(%rsp)
leaq 184(%rsp), %rax
movq %rax, 152(%rsp)
leaq 192(%rsp), %rax
movq %rax, 160(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z24cudaMultiplyArraysSharedPiS_S_iiiiii, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $184, %rsp
.cfi_adjust_cfa_offset -184
retq
.Lfunc_end1:
.size _Z39__device_stub__cudaMultiplyArraysSharedPiS_S_iiiiii, .Lfunc_end1-_Z39__device_stub__cudaMultiplyArraysSharedPiS_S_iiiiii
.cfi_endproc
# -- End function
.globl _Z9int_powerii # -- Begin function _Z9int_powerii
.p2align 4, 0x90
.type _Z9int_powerii,@function
_Z9int_powerii: # @_Z9int_powerii
.cfi_startproc
# %bb.0:
testl %esi, %esi
jle .LBB2_1
# %bb.2: # %.preheader
movl %edi, %eax
movl $1, %ecx
cmpl $1, %esi
je .LBB2_4
.p2align 4, 0x90
.LBB2_3: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movl %esi, %edx
andl $-2, %edx
testb $1, %sil
movl $1, %esi
cmovnel %eax, %esi
imull %esi, %ecx
movl %edx, %esi
shrl %esi
imull %eax, %eax
cmpl $2, %edx
ja .LBB2_3
.LBB2_4: # %._crit_edge
imull %ecx, %eax
retq
.LBB2_1:
movl $1, %eax
retq
.Lfunc_end2:
.size _Z9int_powerii, .Lfunc_end2-_Z9int_powerii
.cfi_endproc
# -- End function
.globl _Z10fill_arrayPiii # -- Begin function _Z10fill_arrayPiii
.p2align 4, 0x90
.type _Z10fill_arrayPiii,@function
_Z10fill_arrayPiii: # @_Z10fill_arrayPiii
.cfi_startproc
# %bb.0:
testl %esi, %esi
je .LBB3_5
# %bb.1: # %.preheader.lr.ph
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset %rbx, -16
movl %edx, %eax
xorl %ecx, %ecx
xorl %r8d, %r8d
jmp .LBB3_2
.p2align 4, 0x90
.LBB3_3: # %._crit_edge
# in Loop: Header=BB3_2 Depth=1
incl %r8d
addl %edx, %ecx
cmpl %esi, %r8d
je .LBB3_4
.LBB3_2: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB3_6 Depth 2
movq %rax, %r9
movl %r8d, %r10d
movl %ecx, %r11d
testl %edx, %edx
je .LBB3_3
.p2align 4, 0x90
.LBB3_6: # Parent Loop BB3_2 Depth=1
# => This Inner Loop Header: Depth=2
movl %r11d, %ebx
movl %r10d, (%rdi,%rbx,4)
incl %r11d
incl %r10d
decq %r9
jne .LBB3_6
jmp .LBB3_3
.LBB3_4:
popq %rbx
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.LBB3_5: # %._crit_edge15
retq
.Lfunc_end3:
.size _Z10fill_arrayPiii, .Lfunc_end3-_Z10fill_arrayPiii
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI4_0:
.quad 0x547d42aea2879f2e # double 9.9999999999999997E+98
.LCPI4_1:
.quad 0x412e848000000000 # double 1.0E+6
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $1736, %rsp # imm = 0x6C8
.cfi_def_cfa_offset 1792
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
cmpl $5, %edi
jne .LBB4_1
# %bb.2:
movq %rsi, %rbx
movq 8(%rsi), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movl $1, %ebp
movl $1, %r12d
testl %eax, %eax
jle .LBB4_7
# %bb.3: # %.preheader.i
movl $2, %r12d
cmpl $1, %eax
je .LBB4_7
# %bb.4: # %.lr.ph.i.preheader
movl $2, %ecx
movl $1, %r12d
.p2align 4, 0x90
.LBB4_5: # %.lr.ph.i
# =>This Inner Loop Header: Depth=1
movl %eax, %edx
andl $-2, %edx
testb $1, %al
movl $1, %eax
cmovnel %ecx, %eax
imull %eax, %r12d
movl %edx, %eax
shrl %eax
imull %ecx, %ecx
cmpl $2, %edx
ja .LBB4_5
# %bb.6: # %._crit_edge.i.loopexit
imull %ecx, %r12d
.LBB4_7: # %_Z9int_powerii.exit
movq 16(%rbx), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
testl %eax, %eax
jle .LBB4_12
# %bb.8: # %.preheader.i126
movl $2, %ebp
cmpl $1, %eax
je .LBB4_12
# %bb.9: # %.lr.ph.i128.preheader
movl $2, %ecx
movl $1, %ebp
.p2align 4, 0x90
.LBB4_10: # %.lr.ph.i128
# =>This Inner Loop Header: Depth=1
movl %eax, %edx
andl $-2, %edx
testb $1, %al
movl $1, %eax
cmovnel %ecx, %eax
imull %eax, %ebp
movl %edx, %eax
shrl %eax
imull %ecx, %ecx
cmpl $2, %edx
ja .LBB4_10
# %bb.11: # %._crit_edge.i136.loopexit
imull %ecx, %ebp
.LBB4_12: # %_Z9int_powerii.exit140
movl %ebp, 8(%rsp) # 4-byte Spill
movq 24(%rbx), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
testl %eax, %eax
setg %al
movl %eax, 12(%rsp) # 4-byte Spill
movq 32(%rbx), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
testl %eax, %eax
setg 7(%rsp) # 1-byte Folded Spill
movl %r12d, %ebx
movl %r12d, %r15d
jmp .LBB4_13
.LBB4_1:
movl $16, %r15d
movl $32, %ebx
movl $1, %r12d
movl $65536, 8(%rsp) # 4-byte Folded Spill
# imm = 0x10000
movb $1, 7(%rsp) # 1-byte Folded Spill
movl $0, 12(%rsp) # 4-byte Folded Spill
.LBB4_13: # %.fold.split
movl %ebx, 52(%rsp) # 4-byte Spill
movl %r15d, %eax
imull %ebx, %eax
imull %r12d, %ebx
movl %r15d, %ebp
imull %r12d, %ebp
movslq %eax, %rdi
shlq $2, %rdi
movq %rdi, 56(%rsp) # 8-byte Spill
callq malloc
movq %rax, 96(%rsp) # 8-byte Spill
movslq %ebx, %r14
shlq $2, %r14
movq %r14, %rdi
callq malloc
movq %rax, %rbx
movslq %ebp, %r13
movl 52(%rsp), %ebp # 4-byte Reload
shlq $2, %r13
movq %r13, %rdi
callq malloc
movq %rax, 104(%rsp) # 8-byte Spill
leaq 88(%rsp), %rdi
movq 56(%rsp), %rsi # 8-byte Reload
callq hipMalloc
leaq 80(%rsp), %rdi
movq %r14, 216(%rsp) # 8-byte Spill
movq %r14, %rsi
callq hipMalloc
leaq 72(%rsp), %rdi
movq %r13, %r14
movq %r13, %rsi
callq hipMalloc
movq 96(%rsp), %r10 # 8-byte Reload
testl %r15d, %r15d
je .LBB4_17
# %bb.14: # %.preheader.lr.ph.i
movl %ebp, %eax
xorl %ecx, %ecx
xorl %edx, %edx
jmp .LBB4_15
.p2align 4, 0x90
.LBB4_16: # %._crit_edge.i144
# in Loop: Header=BB4_15 Depth=1
incl %edx
addl %ebp, %ecx
cmpl %r15d, %edx
je .LBB4_17
.LBB4_15: # %.preheader.i142
# =>This Loop Header: Depth=1
# Child Loop BB4_40 Depth 2
movl %edx, %esi
movl %ecx, %edi
movq %rax, %r8
testl %ebp, %ebp
je .LBB4_16
.p2align 4, 0x90
.LBB4_40: # Parent Loop BB4_15 Depth=1
# => This Inner Loop Header: Depth=2
movl %edi, %r9d
movl %esi, (%r10,%r9,4)
incl %edi
incl %esi
decq %r8
jne .LBB4_40
jmp .LBB4_16
.LBB4_17: # %_Z10fill_arrayPiii.exit
testl %ebp, %ebp
movl 8(%rsp), %r13d # 4-byte Reload
je .LBB4_21
# %bb.18: # %.preheader.lr.ph.i146
movl %r12d, %eax
xorl %ecx, %ecx
xorl %edx, %edx
jmp .LBB4_19
.p2align 4, 0x90
.LBB4_20: # %._crit_edge.i155
# in Loop: Header=BB4_19 Depth=1
incl %edx
addl %r12d, %ecx
cmpl %ebp, %edx
je .LBB4_21
.LBB4_19: # %.preheader.i148
# =>This Loop Header: Depth=1
# Child Loop BB4_41 Depth 2
movl %edx, %esi
movl %ecx, %edi
movq %rax, %r8
testl %r12d, %r12d
je .LBB4_20
.p2align 4, 0x90
.LBB4_41: # Parent Loop BB4_19 Depth=1
# => This Inner Loop Header: Depth=2
movl %edi, %r9d
movl %esi, (%rbx,%r9,4)
incl %edi
incl %esi
decq %r8
jne .LBB4_41
jmp .LBB4_20
.LBB4_21: # %_Z10fill_arrayPiii.exit157
movq %rbx, 200(%rsp) # 8-byte Spill
leal 15(%r12), %ecx
leal 30(%r12), %eax
testl %ecx, %ecx
cmovnsl %ecx, %eax
leal 15(%r15), %ecx
movq %r15, 40(%rsp) # 8-byte Spill
leal 30(%r15), %ebx
testl %ecx, %ecx
cmovnsl %ecx, %ebx
testl %r13d, %r13d
jle .LBB4_22
# %bb.32: # %.lr.ph
sarl $4, %eax
sarl $4, %ebx
shlq $32, %rbx
orq %rax, %rbx
movsd .LCPI4_0(%rip), %xmm2 # xmm2 = mem[0],zero
xorpd %xmm0, %xmm0
movsd %xmm0, 64(%rsp) # 8-byte Spill
movl %r13d, %r15d
jmp .LBB4_33
.p2align 4, 0x90
.LBB4_38: # in Loop: Header=BB4_33 Depth=1
leaq 256(%rsp), %r9
pushq 128(%rsp)
.cfi_adjust_cfa_offset 8
pushq 144(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB4_39: # in Loop: Header=BB4_33 Depth=1
movq 72(%rsp), %rsi
movq 104(%rsp), %rdi # 8-byte Reload
movq %r14, %rdx
movl $2, %ecx
callq hipMemcpy
movl $1, %edi
leaq 224(%rsp), %rsi
callq clock_gettime
movq 224(%rsp), %rax
subq 240(%rsp), %rax
imulq $1000000000, %rax, %rax # imm = 0x3B9ACA00
addq 232(%rsp), %rax
subq 248(%rsp), %rax
xorps %xmm1, %xmm1
cvtsi2sd %rax, %xmm1
divsd .LCPI4_1(%rip), %xmm1
movsd 64(%rsp), %xmm0 # 8-byte Reload
# xmm0 = mem[0],zero
addsd %xmm1, %xmm0
movsd %xmm0, 64(%rsp) # 8-byte Spill
movapd %xmm1, %xmm3
minsd 120(%rsp), %xmm3 # 8-byte Folded Reload
maxsd 112(%rsp), %xmm1 # 8-byte Folded Reload
movapd %xmm3, %xmm2
movapd %xmm1, %xmm0
decl %r15d
je .LBB4_23
.LBB4_33: # =>This Inner Loop Header: Depth=1
movsd %xmm0, 112(%rsp) # 8-byte Spill
movsd %xmm2, 120(%rsp) # 8-byte Spill
movl $1, %edi
leaq 240(%rsp), %rsi
callq clock_gettime
movq 88(%rsp), %rdi
movq 96(%rsp), %rsi # 8-byte Reload
movq 56(%rsp), %rdx # 8-byte Reload
movl $1, %ecx
callq hipMemcpy
movq 80(%rsp), %rdi
movq 200(%rsp), %rsi # 8-byte Reload
movq 216(%rsp), %rdx # 8-byte Reload
movl $1, %ecx
callq hipMemcpy
movq %rbx, %rdi
movl $1, %esi
movabsq $68719476752, %rdx # imm = 0x1000000010
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
cmpb $0, 12(%rsp) # 1-byte Folded Reload
je .LBB4_36
# %bb.34: # in Loop: Header=BB4_33 Depth=1
testl %eax, %eax
jne .LBB4_39
# %bb.35: # in Loop: Header=BB4_33 Depth=1
movq 88(%rsp), %rax
movq 80(%rsp), %rcx
movq 72(%rsp), %rdx
movq %rax, 192(%rsp)
movq %rcx, 184(%rsp)
movq %rdx, 176(%rsp)
movq 40(%rsp), %rax # 8-byte Reload
movl %eax, 36(%rsp)
movl %ebp, 32(%rsp)
movl %ebp, 28(%rsp)
movl %r12d, 24(%rsp)
movl %eax, 20(%rsp)
movl %r12d, 16(%rsp)
leaq 192(%rsp), %rax
movq %rax, 256(%rsp)
leaq 184(%rsp), %rax
movq %rax, 264(%rsp)
leaq 176(%rsp), %rax
movq %rax, 272(%rsp)
leaq 36(%rsp), %rax
movq %rax, 280(%rsp)
leaq 32(%rsp), %rax
movq %rax, 288(%rsp)
leaq 28(%rsp), %rax
movq %rax, 296(%rsp)
leaq 24(%rsp), %rax
movq %rax, 304(%rsp)
leaq 20(%rsp), %rax
movq %rax, 312(%rsp)
leaq 16(%rsp), %rax
movq %rax, 320(%rsp)
leaq 160(%rsp), %rdi
leaq 144(%rsp), %rsi
leaq 136(%rsp), %rdx
leaq 128(%rsp), %rcx
callq __hipPopCallConfiguration
movq 160(%rsp), %rsi
movl 168(%rsp), %edx
movq 144(%rsp), %rcx
movl 152(%rsp), %r8d
movl $_Z24cudaMultiplyArraysSharedPiS_S_iiiiii, %edi
jmp .LBB4_38
.p2align 4, 0x90
.LBB4_36: # in Loop: Header=BB4_33 Depth=1
testl %eax, %eax
jne .LBB4_39
# %bb.37: # in Loop: Header=BB4_33 Depth=1
movq 88(%rsp), %rax
movq 80(%rsp), %rcx
movq 72(%rsp), %rdx
movq %rax, 192(%rsp)
movq %rcx, 184(%rsp)
movq %rdx, 176(%rsp)
movq 40(%rsp), %rax # 8-byte Reload
movl %eax, 36(%rsp)
movl %ebp, 32(%rsp)
movl %ebp, 28(%rsp)
movl %r12d, 24(%rsp)
movl %eax, 20(%rsp)
movl %r12d, 16(%rsp)
leaq 192(%rsp), %rax
movq %rax, 256(%rsp)
leaq 184(%rsp), %rax
movq %rax, 264(%rsp)
leaq 176(%rsp), %rax
movq %rax, 272(%rsp)
leaq 36(%rsp), %rax
movq %rax, 280(%rsp)
leaq 32(%rsp), %rax
movq %rax, 288(%rsp)
leaq 28(%rsp), %rax
movq %rax, 296(%rsp)
leaq 24(%rsp), %rax
movq %rax, 304(%rsp)
leaq 20(%rsp), %rax
movq %rax, 312(%rsp)
leaq 16(%rsp), %rax
movq %rax, 320(%rsp)
leaq 160(%rsp), %rdi
leaq 144(%rsp), %rsi
leaq 136(%rsp), %rdx
leaq 128(%rsp), %rcx
callq __hipPopCallConfiguration
movq 160(%rsp), %rsi
movl 168(%rsp), %edx
movq 144(%rsp), %rcx
movl 152(%rsp), %r8d
movl $_Z18cudaMultiplyArraysPiS_S_iiiiii, %edi
jmp .LBB4_38
.LBB4_22:
movsd .LCPI4_0(%rip), %xmm3 # xmm3 = mem[0],zero
xorpd %xmm1, %xmm1
xorpd %xmm0, %xmm0
movsd %xmm0, 64(%rsp) # 8-byte Spill
.LBB4_23: # %._crit_edge
movsd %xmm3, 56(%rsp) # 8-byte Spill
movsd %xmm1, 112(%rsp) # 8-byte Spill
cmpb $0, 7(%rsp) # 1-byte Folded Reload
je .LBB4_31
# %bb.24:
movl $.L.str, %edi
movl $.L.str.1, %esi
callq fopen
movq %rax, %rbx
cmpl $0, 40(%rsp) # 4-byte Folded Reload
jle .LBB4_30
# %bb.25: # %.preheader.lr.ph
movl 40(%rsp), %eax # 4-byte Reload
movq %rax, 120(%rsp) # 8-byte Spill
movl %r12d, %r15d
xorl %ebp, %ebp
xorl %r14d, %r14d
movq %r12, 208(%rsp) # 8-byte Spill
jmp .LBB4_26
.p2align 4, 0x90
.LBB4_29: # %._crit_edge178
# in Loop: Header=BB4_26 Depth=1
movl $10, %edi
movq %rbx, %rsi
callq fputc@PLT
incq %r14
movq 208(%rsp), %r12 # 8-byte Reload
addl %r12d, %ebp
cmpq 120(%rsp), %r14 # 8-byte Folded Reload
je .LBB4_30
.LBB4_26: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB4_28 Depth 2
testl %r12d, %r12d
jle .LBB4_29
# %bb.27: # %.lr.ph177
# in Loop: Header=BB4_26 Depth=1
movl %ebp, %eax
movq 104(%rsp), %rcx # 8-byte Reload
leaq (%rcx,%rax,4), %r12
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB4_28: # Parent Loop BB4_26 Depth=1
# => This Inner Loop Header: Depth=2
movl (%r12,%r13,4), %edx
movl $.L.str.2, %esi
movq %rbx, %rdi
xorl %eax, %eax
callq fprintf
incq %r13
cmpq %r13, %r15
jne .LBB4_28
jmp .LBB4_29
.LBB4_30: # %._crit_edge180
movl $10, %edi
movq %rbx, %rsi
callq fputc@PLT
movq %rbx, %rdi
callq fclose
movl 8(%rsp), %r13d # 4-byte Reload
movl 52(%rsp), %ebp # 4-byte Reload
.LBB4_31:
movq 96(%rsp), %rdi # 8-byte Reload
callq free
movq 200(%rsp), %rdi # 8-byte Reload
callq free
movq 104(%rsp), %rdi # 8-byte Reload
callq free
movq 88(%rsp), %rdi
callq hipFree
movq 80(%rsp), %rdi
callq hipFree
movq 72(%rsp), %rdi
callq hipFree
leaq 256(%rsp), %rbx
movq %rbx, %rdi
xorl %esi, %esi
callq hipGetDevicePropertiesR0600
movl $.L.str.4, %edi
movq %rbx, %rsi
xorl %eax, %eax
callq printf
movl $.L.str.5, %edi
movq 40(%rsp), %rsi # 8-byte Reload
# kill: def $esi killed $esi killed $rsi
xorl %eax, %eax
callq printf
movl $.L.str.6, %edi
movl %ebp, %esi
xorl %eax, %eax
callq printf
movl $.L.str.7, %edi
movl %r12d, %esi
xorl %eax, %eax
callq printf
movl $.L.str.8, %edi
movl $16, %esi
xorl %eax, %eax
callq printf
movl $.L.str.9, %edi
movl %r13d, %esi
xorl %eax, %eax
callq printf
movl $.L.str.11, %eax
movl $.L.str.12, %esi
cmpb $0, 12(%rsp) # 1-byte Folded Reload
cmovneq %rax, %rsi
movl $.L.str.10, %edi
xorl %eax, %eax
callq printf
movl $.L.str.13, %edi
movsd 56(%rsp), %xmm0 # 8-byte Reload
# xmm0 = mem[0],zero
movb $1, %al
callq printf
xorps %xmm1, %xmm1
cvtsi2sd %r13d, %xmm1
movsd 64(%rsp), %xmm0 # 8-byte Reload
# xmm0 = mem[0],zero
divsd %xmm1, %xmm0
movl $.L.str.14, %edi
movb $1, %al
callq printf
movl $.L.str.15, %edi
movsd 112(%rsp), %xmm0 # 8-byte Reload
# xmm0 = mem[0],zero
movb $1, %al
callq printf
movl $10, %edi
callq putchar@PLT
xorl %eax, %eax
addq $1736, %rsp # imm = 0x6C8
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end4:
.size main, .Lfunc_end4-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB5_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB5_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z18cudaMultiplyArraysPiS_S_iiiiii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z24cudaMultiplyArraysSharedPiS_S_iiiiii, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end5:
.size __hip_module_ctor, .Lfunc_end5-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB6_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB6_2:
retq
.Lfunc_end6:
.size __hip_module_dtor, .Lfunc_end6-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z18cudaMultiplyArraysPiS_S_iiiiii,@object # @_Z18cudaMultiplyArraysPiS_S_iiiiii
.section .rodata,"a",@progbits
.globl _Z18cudaMultiplyArraysPiS_S_iiiiii
.p2align 3, 0x0
_Z18cudaMultiplyArraysPiS_S_iiiiii:
.quad _Z33__device_stub__cudaMultiplyArraysPiS_S_iiiiii
.size _Z18cudaMultiplyArraysPiS_S_iiiiii, 8
.type _Z24cudaMultiplyArraysSharedPiS_S_iiiiii,@object # @_Z24cudaMultiplyArraysSharedPiS_S_iiiiii
.globl _Z24cudaMultiplyArraysSharedPiS_S_iiiiii
.p2align 3, 0x0
_Z24cudaMultiplyArraysSharedPiS_S_iiiiii:
.quad _Z39__device_stub__cudaMultiplyArraysSharedPiS_S_iiiiii
.size _Z24cudaMultiplyArraysSharedPiS_S_iiiiii, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "problem2.out"
.size .L.str, 13
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "w"
.size .L.str.1, 2
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "%12d "
.size .L.str.2, 6
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "Device name: %s\n"
.size .L.str.4, 17
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "Dimension 1 (m): %12d\n"
.size .L.str.5, 28
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "Dimension 2 (n): %12d\n"
.size .L.str.6, 28
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz "Dimension 3 (p): %12d\n"
.size .L.str.7, 28
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz "Block size: %12d\n"
.size .L.str.8, 28
.type .L.str.9,@object # @.str.9
.L.str.9:
.asciz "Number of runs: %12d\n"
.size .L.str.9, 28
.type .L.str.10,@object # @.str.10
.L.str.10:
.asciz "Using shared memory?: %12s\n"
.size .L.str.10, 28
.type .L.str.11,@object # @.str.11
.L.str.11:
.asciz "True"
.size .L.str.11, 5
.type .L.str.12,@object # @.str.12
.L.str.12:
.asciz "False"
.size .L.str.12, 6
.type .L.str.13,@object # @.str.13
.L.str.13:
.asciz "Inclusive time (min): %12.6f ms\n"
.size .L.str.13, 33
.type .L.str.14,@object # @.str.14
.L.str.14:
.asciz "Inclusive time (avg): %12.6f ms\n"
.size .L.str.14, 33
.type .L.str.15,@object # @.str.15
.L.str.15:
.asciz "Inclusive time (max): %12.6f ms\n"
.size .L.str.15, 33
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z18cudaMultiplyArraysPiS_S_iiiiii"
.size .L__unnamed_1, 35
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "_Z24cudaMultiplyArraysSharedPiS_S_iiiiii"
.size .L__unnamed_2, 41
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z33__device_stub__cudaMultiplyArraysPiS_S_iiiiii
.addrsig_sym _Z39__device_stub__cudaMultiplyArraysSharedPiS_S_iiiiii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z18cudaMultiplyArraysPiS_S_iiiiii
.addrsig_sym _Z24cudaMultiplyArraysSharedPiS_S_iiiiii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0002f76a_00000000-6_p2.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2062:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2062:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z9int_powerii
.type _Z9int_powerii, @function
_Z9int_powerii:
.LFB2057:
.cfi_startproc
endbr64
movl $1, %eax
testl %esi, %esi
jle .L3
cmpl $1, %esi
jg .L8
movl $1, %eax
.L5:
imull %edi, %eax
.L3:
ret
.L6:
imull %edi, %eax
imull %edi, %edi
subl $1, %esi
movl %esi, %edx
shrl $31, %edx
addl %edx, %esi
sarl %esi
.L7:
cmpl $1, %esi
jle .L5
.L8:
testb $1, %sil
jne .L6
imull %edi, %edi
movl %esi, %edx
shrl $31, %edx
addl %edx, %esi
sarl %esi
jmp .L7
.cfi_endproc
.LFE2057:
.size _Z9int_powerii, .-_Z9int_powerii
.globl _Z10fill_arrayPiii
.type _Z10fill_arrayPiii, @function
_Z10fill_arrayPiii:
.LFB2058:
.cfi_startproc
endbr64
testl %esi, %esi
je .L21
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
movq %rdi, %r10
movl %esi, %ebx
movl $1, %ebp
subl %edx, %ebp
movl %edx, %r9d
movl $0, %r8d
movl $0, %esi
movl $0, %r11d
jmp .L14
.L15:
movl %eax, %ecx
leal (%rax,%r8), %edi
movl %edi, (%r10,%rcx,4)
addl $1, %eax
cmpl %r9d, %eax
jne .L15
.L16:
addl $1, %r11d
addl %edx, %esi
addl %ebp, %r8d
addl %edx, %r9d
cmpl %ebx, %r11d
je .L12
.L14:
movl %esi, %eax
testl %edx, %edx
jne .L15
jmp .L16
.L12:
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.L21:
.cfi_restore 3
.cfi_restore 6
ret
.cfi_endproc
.LFE2058:
.size _Z10fill_arrayPiii, .-_Z10fill_arrayPiii
.globl _Z48__device_stub__Z18cudaMultiplyArraysPiS_S_iiiiiiPiS_S_iiiiii
.type _Z48__device_stub__Z18cudaMultiplyArraysPiS_S_iiiiiiPiS_S_iiiiii, @function
_Z48__device_stub__Z18cudaMultiplyArraysPiS_S_iiiiiiPiS_S_iiiiii:
.LFB2084:
.cfi_startproc
endbr64
subq $200, %rsp
.cfi_def_cfa_offset 208
movq %rdi, 40(%rsp)
movq %rsi, 32(%rsp)
movq %rdx, 24(%rsp)
movl %ecx, 20(%rsp)
movl %r8d, 16(%rsp)
movl %r9d, 12(%rsp)
movq %fs:40, %rax
movq %rax, 184(%rsp)
xorl %eax, %eax
leaq 40(%rsp), %rax
movq %rax, 112(%rsp)
leaq 32(%rsp), %rax
movq %rax, 120(%rsp)
leaq 24(%rsp), %rax
movq %rax, 128(%rsp)
leaq 20(%rsp), %rax
movq %rax, 136(%rsp)
leaq 16(%rsp), %rax
movq %rax, 144(%rsp)
leaq 12(%rsp), %rax
movq %rax, 152(%rsp)
leaq 208(%rsp), %rax
movq %rax, 160(%rsp)
leaq 216(%rsp), %rax
movq %rax, 168(%rsp)
leaq 224(%rsp), %rax
movq %rax, 176(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
leaq 56(%rsp), %rcx
leaq 48(%rsp), %rdx
leaq 76(%rsp), %rsi
leaq 64(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L28
.L24:
movq 184(%rsp), %rax
subq %fs:40, %rax
jne .L29
addq $200, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L28:
.cfi_restore_state
pushq 56(%rsp)
.cfi_def_cfa_offset 216
pushq 56(%rsp)
.cfi_def_cfa_offset 224
leaq 128(%rsp), %r9
movq 92(%rsp), %rcx
movl 100(%rsp), %r8d
movq 80(%rsp), %rsi
movl 88(%rsp), %edx
leaq _Z18cudaMultiplyArraysPiS_S_iiiiii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 208
jmp .L24
.L29:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2084:
.size _Z48__device_stub__Z18cudaMultiplyArraysPiS_S_iiiiiiPiS_S_iiiiii, .-_Z48__device_stub__Z18cudaMultiplyArraysPiS_S_iiiiiiPiS_S_iiiiii
.globl _Z18cudaMultiplyArraysPiS_S_iiiiii
.type _Z18cudaMultiplyArraysPiS_S_iiiiii, @function
_Z18cudaMultiplyArraysPiS_S_iiiiii:
.LFB2085:
.cfi_startproc
endbr64
subq $16, %rsp
.cfi_def_cfa_offset 24
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 32
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 40
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 48
call _Z48__device_stub__Z18cudaMultiplyArraysPiS_S_iiiiiiPiS_S_iiiiii
addq $40, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _Z18cudaMultiplyArraysPiS_S_iiiiii, .-_Z18cudaMultiplyArraysPiS_S_iiiiii
.globl _Z54__device_stub__Z24cudaMultiplyArraysSharedPiS_S_iiiiiiPiS_S_iiiiii
.type _Z54__device_stub__Z24cudaMultiplyArraysSharedPiS_S_iiiiiiPiS_S_iiiiii, @function
_Z54__device_stub__Z24cudaMultiplyArraysSharedPiS_S_iiiiiiPiS_S_iiiiii:
.LFB2086:
.cfi_startproc
endbr64
subq $200, %rsp
.cfi_def_cfa_offset 208
movq %rdi, 40(%rsp)
movq %rsi, 32(%rsp)
movq %rdx, 24(%rsp)
movl %ecx, 20(%rsp)
movl %r8d, 16(%rsp)
movl %r9d, 12(%rsp)
movq %fs:40, %rax
movq %rax, 184(%rsp)
xorl %eax, %eax
leaq 40(%rsp), %rax
movq %rax, 112(%rsp)
leaq 32(%rsp), %rax
movq %rax, 120(%rsp)
leaq 24(%rsp), %rax
movq %rax, 128(%rsp)
leaq 20(%rsp), %rax
movq %rax, 136(%rsp)
leaq 16(%rsp), %rax
movq %rax, 144(%rsp)
leaq 12(%rsp), %rax
movq %rax, 152(%rsp)
leaq 208(%rsp), %rax
movq %rax, 160(%rsp)
leaq 216(%rsp), %rax
movq %rax, 168(%rsp)
leaq 224(%rsp), %rax
movq %rax, 176(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
leaq 56(%rsp), %rcx
leaq 48(%rsp), %rdx
leaq 76(%rsp), %rsi
leaq 64(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L36
.L32:
movq 184(%rsp), %rax
subq %fs:40, %rax
jne .L37
addq $200, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L36:
.cfi_restore_state
pushq 56(%rsp)
.cfi_def_cfa_offset 216
pushq 56(%rsp)
.cfi_def_cfa_offset 224
leaq 128(%rsp), %r9
movq 92(%rsp), %rcx
movl 100(%rsp), %r8d
movq 80(%rsp), %rsi
movl 88(%rsp), %edx
leaq _Z24cudaMultiplyArraysSharedPiS_S_iiiiii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 208
jmp .L32
.L37:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2086:
.size _Z54__device_stub__Z24cudaMultiplyArraysSharedPiS_S_iiiiiiPiS_S_iiiiii, .-_Z54__device_stub__Z24cudaMultiplyArraysSharedPiS_S_iiiiiiPiS_S_iiiiii
.globl _Z24cudaMultiplyArraysSharedPiS_S_iiiiii
.type _Z24cudaMultiplyArraysSharedPiS_S_iiiiii, @function
_Z24cudaMultiplyArraysSharedPiS_S_iiiiii:
.LFB2087:
.cfi_startproc
endbr64
subq $16, %rsp
.cfi_def_cfa_offset 24
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 32
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 40
movl 40(%rsp), %eax
pushq %rax
.cfi_def_cfa_offset 48
call _Z54__device_stub__Z24cudaMultiplyArraysSharedPiS_S_iiiiiiPiS_S_iiiiii
addq $40, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2087:
.size _Z24cudaMultiplyArraysSharedPiS_S_iiiiii, .-_Z24cudaMultiplyArraysSharedPiS_S_iiiiii
.section .rodata.str1.1,"aMS",@progbits,1
.LC2:
.string "True"
.LC3:
.string "False"
.LC5:
.string "w"
.LC6:
.string "problem2.out"
.LC7:
.string "%12d "
.LC8:
.string "\n"
.LC9:
.string "Device name: %s\n"
.LC10:
.string "Dimension 1 (m): %12d\n"
.LC11:
.string "Dimension 2 (n): %12d\n"
.LC12:
.string "Dimension 3 (p): %12d\n"
.LC13:
.string "Block size: %12d\n"
.LC14:
.string "Number of runs: %12d\n"
.LC15:
.string "Using shared memory?: %12s\n"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC16:
.string "Inclusive time (min): %12.6f ms\n"
.align 8
.LC17:
.string "Inclusive time (avg): %12.6f ms\n"
.align 8
.LC18:
.string "Inclusive time (max): %12.6f ms\n"
.text
.globl main
.type main, @function
main:
.LFB2059:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $1224, %rsp
.cfi_def_cfa_offset 1280
movl %edi, %r14d
movq %fs:40, %rax
movq %rax, 1208(%rsp)
xorl %eax, %eax
cmpl $1, %edi
je .L56
movq %rsi, %rbx
cmpl $5, %edi
je .L65
.L41:
movl 64(%rsp), %ebx
movl %ebx, %ebp
movl 68(%rsp), %r15d
imull %r15d, %ebp
movslq %ebp, %rbp
salq $2, %rbp
movq %rbp, %rdi
call malloc@PLT
movq %rax, 32(%rsp)
movl %r15d, 68(%rsp)
movl %r15d, %r12d
imull %r14d, %r12d
movslq %r12d, %r12
salq $2, %r12
movq %r12, %rdi
call malloc@PLT
movq %rax, 40(%rsp)
movl %ebx, %r13d
imull %r14d, %r13d
movslq %r13d, %r13
salq $2, %r13
movq %r13, %rdi
call malloc@PLT
movq %rax, %r15
leaq 96(%rsp), %rdi
movq %rbp, %rsi
call cudaMalloc@PLT
leaq 104(%rsp), %rdi
movq %r12, %rsi
call cudaMalloc@PLT
leaq 112(%rsp), %rdi
movq %r13, %rsi
call cudaMalloc@PLT
movl 68(%rsp), %edx
movl %ebx, %esi
movq 32(%rsp), %rdi
call _Z10fill_arrayPiii
movl %r14d, %edx
movl 68(%rsp), %esi
movq 40(%rsp), %rdi
call _Z10fill_arrayPiii
movl $16, 120(%rsp)
movl $16, 124(%rsp)
movl $1, 128(%rsp)
leal 30(%r14), %eax
movl %r14d, %edx
addl $15, %edx
cmovns %edx, %eax
sarl $4, %eax
movl %eax, 132(%rsp)
leal 30(%rbx), %eax
addl $15, %ebx
cmovns %ebx, %eax
sarl $4, %eax
movl %eax, 136(%rsp)
movl $1, 140(%rsp)
cmpl $0, 52(%rsp)
jle .L57
movl $0, %ebx
movq $0x000000000, 16(%rsp)
movsd .LC1(%rip), %xmm6
movsd %xmm6, 8(%rsp)
movq $0x000000000, 24(%rsp)
movq %rbp, 56(%rsp)
movzbl 95(%rsp), %ebp
jmp .L47
.L65:
movq 8(%rsi), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movl %eax, %esi
movl $2, %edi
call _Z9int_powerii
movl %eax, %r14d
movl %eax, 64(%rsp)
movq 16(%rbx), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movl %eax, %esi
movl $2, %edi
call _Z9int_powerii
movl %eax, 52(%rsp)
movq 24(%rbx), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
testl %eax, %eax
setg 95(%rsp)
movq 32(%rbx), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
testl %eax, %eax
setg 88(%rsp)
movl %r14d, 68(%rsp)
jmp .L41
.L56:
movb $1, 88(%rsp)
movb $0, 95(%rsp)
movl $65536, 52(%rsp)
movl $32, 68(%rsp)
movl $16, 64(%rsp)
jmp .L41
.L43:
movl 128(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 120(%rsp), %rdx
movq 132(%rsp), %rdi
movl 140(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L66
.L44:
movl $2, %ecx
movq %r13, %rdx
movq 112(%rsp), %rsi
movq %r15, %rdi
call cudaMemcpy@PLT
leaq 160(%rsp), %rsi
movl $1, %edi
call clock_gettime@PLT
movq 160(%rsp), %rax
subq 144(%rsp), %rax
imulq $1000000000, %rax, %rax
addq 168(%rsp), %rax
subq 152(%rsp), %rax
pxor %xmm0, %xmm0
cvtsi2sdq %rax, %xmm0
divsd .LC4(%rip), %xmm0
movsd 24(%rsp), %xmm2
addsd %xmm0, %xmm2
movsd %xmm2, 24(%rsp)
movapd %xmm0, %xmm3
minsd 8(%rsp), %xmm3
movsd %xmm3, 8(%rsp)
maxsd 16(%rsp), %xmm0
movsd %xmm0, 16(%rsp)
addl $1, %ebx
cmpl %ebx, 52(%rsp)
je .L42
.L47:
leaq 144(%rsp), %rsi
movl $1, %edi
call clock_gettime@PLT
movl $1, %ecx
movq 56(%rsp), %rdx
movq 32(%rsp), %rsi
movq 96(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movq %r12, %rdx
movq 40(%rsp), %rsi
movq 104(%rsp), %rdi
call cudaMemcpy@PLT
testb %bpl, %bpl
je .L43
movl 128(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 120(%rsp), %rdx
movq 132(%rsp), %rdi
movl 140(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
jne .L44
subq $8, %rsp
.cfi_def_cfa_offset 1288
pushq %r14
.cfi_def_cfa_offset 1296
movl 80(%rsp), %ecx
pushq %rcx
.cfi_def_cfa_offset 1304
pushq %r14
.cfi_def_cfa_offset 1312
movl 100(%rsp), %r8d
movl %r8d, %r9d
movq 144(%rsp), %rdx
movq 136(%rsp), %rsi
movq 128(%rsp), %rdi
call _Z54__device_stub__Z24cudaMultiplyArraysSharedPiS_S_iiiiiiPiS_S_iiiiii
addq $32, %rsp
.cfi_def_cfa_offset 1280
jmp .L44
.L66:
subq $8, %rsp
.cfi_def_cfa_offset 1288
pushq %r14
.cfi_def_cfa_offset 1296
movl 80(%rsp), %ecx
pushq %rcx
.cfi_def_cfa_offset 1304
pushq %r14
.cfi_def_cfa_offset 1312
movl 100(%rsp), %r9d
movl %r9d, %r8d
movq 144(%rsp), %rdx
movq 136(%rsp), %rsi
movq 128(%rsp), %rdi
call _Z48__device_stub__Z18cudaMultiplyArraysPiS_S_iiiiiiPiS_S_iiiiii
addq $32, %rsp
.cfi_def_cfa_offset 1280
jmp .L44
.L57:
movq $0x000000000, 16(%rsp)
movsd .LC1(%rip), %xmm7
movsd %xmm7, 8(%rsp)
movq $0x000000000, 24(%rsp)
.L42:
cmpb $0, 88(%rsp)
jne .L67
.L48:
movq 32(%rsp), %rdi
call free@PLT
movq 40(%rsp), %rdi
call free@PLT
movq %r15, %rdi
call free@PLT
movq 96(%rsp), %rdi
call cudaFree@PLT
movq 104(%rsp), %rdi
call cudaFree@PLT
movq 112(%rsp), %rdi
call cudaFree@PLT
leaq 176(%rsp), %rbx
movl $0, %esi
movq %rbx, %rdi
call cudaGetDeviceProperties_v2@PLT
movq %rbx, %rdx
leaq .LC9(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 64(%rsp), %edx
leaq .LC10(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 68(%rsp), %edx
leaq .LC11(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %r14d, %edx
leaq .LC12(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $16, %edx
leaq .LC13(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 52(%rsp), %ebx
movl %ebx, %edx
leaq .LC14(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
cmpb $0, 95(%rsp)
leaq .LC3(%rip), %rdx
leaq .LC2(%rip), %rax
cmovne %rax, %rdx
leaq .LC15(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movsd 8(%rsp), %xmm0
leaq .LC16(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
pxor %xmm1, %xmm1
cvtsi2sdl %ebx, %xmm1
movsd 24(%rsp), %xmm0
divsd %xmm1, %xmm0
leaq .LC17(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movsd 16(%rsp), %xmm0
leaq .LC18(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 1208(%rsp), %rax
subq %fs:40, %rax
jne .L68
movl $0, %eax
addq $1224, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L67:
.cfi_restore_state
leaq .LC5(%rip), %rsi
leaq .LC6(%rip), %rdi
call fopen@PLT
movq %rax, %rbp
cmpl $0, 64(%rsp)
jle .L49
movl %r14d, 88(%rsp)
movl $0, %ebx
movl $0, %edx
movslq %r14d, %rax
movq %rax, 80(%rsp)
leaq .LC7(%rip), %r13
movq %r15, 72(%rsp)
movl %ebx, %r15d
movl %r14d, 56(%rsp)
movl %edx, %r14d
jmp .L50
.L52:
movslq %r15d, %rax
movq 72(%rsp), %rdx
leaq (%rdx,%rax,4), %rbx
movq 80(%rsp), %rdi
addq %rdi, %rax
leaq (%rdx,%rax,4), %r12
.L51:
movl (%rbx), %ecx
movq %r13, %rdx
movl $2, %esi
movq %rbp, %rdi
movl $0, %eax
call __fprintf_chk@PLT
addq $4, %rbx
cmpq %r12, %rbx
jne .L51
.L53:
leaq .LC8(%rip), %rdx
movl $2, %esi
movq %rbp, %rdi
movl $0, %eax
call __fprintf_chk@PLT
addl $1, %r14d
movl 88(%rsp), %eax
addl %eax, %r15d
cmpl %r14d, 64(%rsp)
je .L63
.L50:
cmpl $0, 56(%rsp)
jg .L52
jmp .L53
.L63:
movq 72(%rsp), %r15
movl 56(%rsp), %r14d
.L49:
leaq .LC8(%rip), %rdx
movl $2, %esi
movq %rbp, %rdi
movl $0, %eax
call __fprintf_chk@PLT
movq %rbp, %rdi
call fclose@PLT
jmp .L48
.L68:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2059:
.size main, .-main
.section .rodata.str1.8
.align 8
.LC19:
.string "_Z24cudaMultiplyArraysSharedPiS_S_iiiiii"
.align 8
.LC20:
.string "_Z18cudaMultiplyArraysPiS_S_iiiiii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2089:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC19(%rip), %rdx
movq %rdx, %rcx
leaq _Z24cudaMultiplyArraysSharedPiS_S_iiiiii(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC20(%rip), %rdx
movq %rdx, %rcx
leaq _Z18cudaMultiplyArraysPiS_S_iiiiii(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2089:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC1:
.long -1568170194
.long 1417495214
.align 8
.LC4:
.long 0
.long 1093567616
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "p2.hip"
.globl _Z33__device_stub__cudaMultiplyArraysPiS_S_iiiiii # -- Begin function _Z33__device_stub__cudaMultiplyArraysPiS_S_iiiiii
.p2align 4, 0x90
.type _Z33__device_stub__cudaMultiplyArraysPiS_S_iiiiii,@function
_Z33__device_stub__cudaMultiplyArraysPiS_S_iiiiii: # @_Z33__device_stub__cudaMultiplyArraysPiS_S_iiiiii
.cfi_startproc
# %bb.0:
subq $168, %rsp
.cfi_def_cfa_offset 176
movq %rdi, 88(%rsp)
movq %rsi, 80(%rsp)
movq %rdx, 72(%rsp)
movl %ecx, 20(%rsp)
movl %r8d, 16(%rsp)
movl %r9d, 12(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
leaq 20(%rsp), %rax
movq %rax, 120(%rsp)
leaq 16(%rsp), %rax
movq %rax, 128(%rsp)
leaq 12(%rsp), %rax
movq %rax, 136(%rsp)
leaq 176(%rsp), %rax
movq %rax, 144(%rsp)
leaq 184(%rsp), %rax
movq %rax, 152(%rsp)
leaq 192(%rsp), %rax
movq %rax, 160(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z18cudaMultiplyArraysPiS_S_iiiiii, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $184, %rsp
.cfi_adjust_cfa_offset -184
retq
.Lfunc_end0:
.size _Z33__device_stub__cudaMultiplyArraysPiS_S_iiiiii, .Lfunc_end0-_Z33__device_stub__cudaMultiplyArraysPiS_S_iiiiii
.cfi_endproc
# -- End function
.globl _Z39__device_stub__cudaMultiplyArraysSharedPiS_S_iiiiii # -- Begin function _Z39__device_stub__cudaMultiplyArraysSharedPiS_S_iiiiii
.p2align 4, 0x90
.type _Z39__device_stub__cudaMultiplyArraysSharedPiS_S_iiiiii,@function
_Z39__device_stub__cudaMultiplyArraysSharedPiS_S_iiiiii: # @_Z39__device_stub__cudaMultiplyArraysSharedPiS_S_iiiiii
.cfi_startproc
# %bb.0:
subq $168, %rsp
.cfi_def_cfa_offset 176
movq %rdi, 88(%rsp)
movq %rsi, 80(%rsp)
movq %rdx, 72(%rsp)
movl %ecx, 20(%rsp)
movl %r8d, 16(%rsp)
movl %r9d, 12(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
leaq 20(%rsp), %rax
movq %rax, 120(%rsp)
leaq 16(%rsp), %rax
movq %rax, 128(%rsp)
leaq 12(%rsp), %rax
movq %rax, 136(%rsp)
leaq 176(%rsp), %rax
movq %rax, 144(%rsp)
leaq 184(%rsp), %rax
movq %rax, 152(%rsp)
leaq 192(%rsp), %rax
movq %rax, 160(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z24cudaMultiplyArraysSharedPiS_S_iiiiii, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $184, %rsp
.cfi_adjust_cfa_offset -184
retq
.Lfunc_end1:
.size _Z39__device_stub__cudaMultiplyArraysSharedPiS_S_iiiiii, .Lfunc_end1-_Z39__device_stub__cudaMultiplyArraysSharedPiS_S_iiiiii
.cfi_endproc
# -- End function
.globl _Z9int_powerii # -- Begin function _Z9int_powerii
.p2align 4, 0x90
.type _Z9int_powerii,@function
_Z9int_powerii: # @_Z9int_powerii
.cfi_startproc
# %bb.0:
testl %esi, %esi
jle .LBB2_1
# %bb.2: # %.preheader
movl %edi, %eax
movl $1, %ecx
cmpl $1, %esi
je .LBB2_4
.p2align 4, 0x90
.LBB2_3: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movl %esi, %edx
andl $-2, %edx
testb $1, %sil
movl $1, %esi
cmovnel %eax, %esi
imull %esi, %ecx
movl %edx, %esi
shrl %esi
imull %eax, %eax
cmpl $2, %edx
ja .LBB2_3
.LBB2_4: # %._crit_edge
imull %ecx, %eax
retq
.LBB2_1:
movl $1, %eax
retq
.Lfunc_end2:
.size _Z9int_powerii, .Lfunc_end2-_Z9int_powerii
.cfi_endproc
# -- End function
.globl _Z10fill_arrayPiii # -- Begin function _Z10fill_arrayPiii
.p2align 4, 0x90
.type _Z10fill_arrayPiii,@function
_Z10fill_arrayPiii: # @_Z10fill_arrayPiii
.cfi_startproc
# %bb.0:
testl %esi, %esi
je .LBB3_5
# %bb.1: # %.preheader.lr.ph
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset %rbx, -16
movl %edx, %eax
xorl %ecx, %ecx
xorl %r8d, %r8d
jmp .LBB3_2
.p2align 4, 0x90
.LBB3_3: # %._crit_edge
# in Loop: Header=BB3_2 Depth=1
incl %r8d
addl %edx, %ecx
cmpl %esi, %r8d
je .LBB3_4
.LBB3_2: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB3_6 Depth 2
movq %rax, %r9
movl %r8d, %r10d
movl %ecx, %r11d
testl %edx, %edx
je .LBB3_3
.p2align 4, 0x90
.LBB3_6: # Parent Loop BB3_2 Depth=1
# => This Inner Loop Header: Depth=2
movl %r11d, %ebx
movl %r10d, (%rdi,%rbx,4)
incl %r11d
incl %r10d
decq %r9
jne .LBB3_6
jmp .LBB3_3
.LBB3_4:
popq %rbx
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.LBB3_5: # %._crit_edge15
retq
.Lfunc_end3:
.size _Z10fill_arrayPiii, .Lfunc_end3-_Z10fill_arrayPiii
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI4_0:
.quad 0x547d42aea2879f2e # double 9.9999999999999997E+98
.LCPI4_1:
.quad 0x412e848000000000 # double 1.0E+6
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $1736, %rsp # imm = 0x6C8
.cfi_def_cfa_offset 1792
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
cmpl $5, %edi
jne .LBB4_1
# %bb.2:
movq %rsi, %rbx
movq 8(%rsi), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movl $1, %ebp
movl $1, %r12d
testl %eax, %eax
jle .LBB4_7
# %bb.3: # %.preheader.i
movl $2, %r12d
cmpl $1, %eax
je .LBB4_7
# %bb.4: # %.lr.ph.i.preheader
movl $2, %ecx
movl $1, %r12d
.p2align 4, 0x90
.LBB4_5: # %.lr.ph.i
# =>This Inner Loop Header: Depth=1
movl %eax, %edx
andl $-2, %edx
testb $1, %al
movl $1, %eax
cmovnel %ecx, %eax
imull %eax, %r12d
movl %edx, %eax
shrl %eax
imull %ecx, %ecx
cmpl $2, %edx
ja .LBB4_5
# %bb.6: # %._crit_edge.i.loopexit
imull %ecx, %r12d
.LBB4_7: # %_Z9int_powerii.exit
movq 16(%rbx), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
testl %eax, %eax
jle .LBB4_12
# %bb.8: # %.preheader.i126
movl $2, %ebp
cmpl $1, %eax
je .LBB4_12
# %bb.9: # %.lr.ph.i128.preheader
movl $2, %ecx
movl $1, %ebp
.p2align 4, 0x90
.LBB4_10: # %.lr.ph.i128
# =>This Inner Loop Header: Depth=1
movl %eax, %edx
andl $-2, %edx
testb $1, %al
movl $1, %eax
cmovnel %ecx, %eax
imull %eax, %ebp
movl %edx, %eax
shrl %eax
imull %ecx, %ecx
cmpl $2, %edx
ja .LBB4_10
# %bb.11: # %._crit_edge.i136.loopexit
imull %ecx, %ebp
.LBB4_12: # %_Z9int_powerii.exit140
movl %ebp, 8(%rsp) # 4-byte Spill
movq 24(%rbx), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
testl %eax, %eax
setg %al
movl %eax, 12(%rsp) # 4-byte Spill
movq 32(%rbx), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
testl %eax, %eax
setg 7(%rsp) # 1-byte Folded Spill
movl %r12d, %ebx
movl %r12d, %r15d
jmp .LBB4_13
.LBB4_1:
movl $16, %r15d
movl $32, %ebx
movl $1, %r12d
movl $65536, 8(%rsp) # 4-byte Folded Spill
# imm = 0x10000
movb $1, 7(%rsp) # 1-byte Folded Spill
movl $0, 12(%rsp) # 4-byte Folded Spill
.LBB4_13: # %.fold.split
movl %ebx, 52(%rsp) # 4-byte Spill
movl %r15d, %eax
imull %ebx, %eax
imull %r12d, %ebx
movl %r15d, %ebp
imull %r12d, %ebp
movslq %eax, %rdi
shlq $2, %rdi
movq %rdi, 56(%rsp) # 8-byte Spill
callq malloc
movq %rax, 96(%rsp) # 8-byte Spill
movslq %ebx, %r14
shlq $2, %r14
movq %r14, %rdi
callq malloc
movq %rax, %rbx
movslq %ebp, %r13
movl 52(%rsp), %ebp # 4-byte Reload
shlq $2, %r13
movq %r13, %rdi
callq malloc
movq %rax, 104(%rsp) # 8-byte Spill
leaq 88(%rsp), %rdi
movq 56(%rsp), %rsi # 8-byte Reload
callq hipMalloc
leaq 80(%rsp), %rdi
movq %r14, 216(%rsp) # 8-byte Spill
movq %r14, %rsi
callq hipMalloc
leaq 72(%rsp), %rdi
movq %r13, %r14
movq %r13, %rsi
callq hipMalloc
movq 96(%rsp), %r10 # 8-byte Reload
testl %r15d, %r15d
je .LBB4_17
# %bb.14: # %.preheader.lr.ph.i
movl %ebp, %eax
xorl %ecx, %ecx
xorl %edx, %edx
jmp .LBB4_15
.p2align 4, 0x90
.LBB4_16: # %._crit_edge.i144
# in Loop: Header=BB4_15 Depth=1
incl %edx
addl %ebp, %ecx
cmpl %r15d, %edx
je .LBB4_17
.LBB4_15: # %.preheader.i142
# =>This Loop Header: Depth=1
# Child Loop BB4_40 Depth 2
movl %edx, %esi
movl %ecx, %edi
movq %rax, %r8
testl %ebp, %ebp
je .LBB4_16
.p2align 4, 0x90
.LBB4_40: # Parent Loop BB4_15 Depth=1
# => This Inner Loop Header: Depth=2
movl %edi, %r9d
movl %esi, (%r10,%r9,4)
incl %edi
incl %esi
decq %r8
jne .LBB4_40
jmp .LBB4_16
.LBB4_17: # %_Z10fill_arrayPiii.exit
testl %ebp, %ebp
movl 8(%rsp), %r13d # 4-byte Reload
je .LBB4_21
# %bb.18: # %.preheader.lr.ph.i146
movl %r12d, %eax
xorl %ecx, %ecx
xorl %edx, %edx
jmp .LBB4_19
.p2align 4, 0x90
.LBB4_20: # %._crit_edge.i155
# in Loop: Header=BB4_19 Depth=1
incl %edx
addl %r12d, %ecx
cmpl %ebp, %edx
je .LBB4_21
.LBB4_19: # %.preheader.i148
# =>This Loop Header: Depth=1
# Child Loop BB4_41 Depth 2
movl %edx, %esi
movl %ecx, %edi
movq %rax, %r8
testl %r12d, %r12d
je .LBB4_20
.p2align 4, 0x90
.LBB4_41: # Parent Loop BB4_19 Depth=1
# => This Inner Loop Header: Depth=2
movl %edi, %r9d
movl %esi, (%rbx,%r9,4)
incl %edi
incl %esi
decq %r8
jne .LBB4_41
jmp .LBB4_20
.LBB4_21: # %_Z10fill_arrayPiii.exit157
movq %rbx, 200(%rsp) # 8-byte Spill
leal 15(%r12), %ecx
leal 30(%r12), %eax
testl %ecx, %ecx
cmovnsl %ecx, %eax
leal 15(%r15), %ecx
movq %r15, 40(%rsp) # 8-byte Spill
leal 30(%r15), %ebx
testl %ecx, %ecx
cmovnsl %ecx, %ebx
testl %r13d, %r13d
jle .LBB4_22
# %bb.32: # %.lr.ph
sarl $4, %eax
sarl $4, %ebx
shlq $32, %rbx
orq %rax, %rbx
movsd .LCPI4_0(%rip), %xmm2 # xmm2 = mem[0],zero
xorpd %xmm0, %xmm0
movsd %xmm0, 64(%rsp) # 8-byte Spill
movl %r13d, %r15d
jmp .LBB4_33
.p2align 4, 0x90
.LBB4_38: # in Loop: Header=BB4_33 Depth=1
leaq 256(%rsp), %r9
pushq 128(%rsp)
.cfi_adjust_cfa_offset 8
pushq 144(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB4_39: # in Loop: Header=BB4_33 Depth=1
movq 72(%rsp), %rsi
movq 104(%rsp), %rdi # 8-byte Reload
movq %r14, %rdx
movl $2, %ecx
callq hipMemcpy
movl $1, %edi
leaq 224(%rsp), %rsi
callq clock_gettime
movq 224(%rsp), %rax
subq 240(%rsp), %rax
imulq $1000000000, %rax, %rax # imm = 0x3B9ACA00
addq 232(%rsp), %rax
subq 248(%rsp), %rax
xorps %xmm1, %xmm1
cvtsi2sd %rax, %xmm1
divsd .LCPI4_1(%rip), %xmm1
movsd 64(%rsp), %xmm0 # 8-byte Reload
# xmm0 = mem[0],zero
addsd %xmm1, %xmm0
movsd %xmm0, 64(%rsp) # 8-byte Spill
movapd %xmm1, %xmm3
minsd 120(%rsp), %xmm3 # 8-byte Folded Reload
maxsd 112(%rsp), %xmm1 # 8-byte Folded Reload
movapd %xmm3, %xmm2
movapd %xmm1, %xmm0
decl %r15d
je .LBB4_23
.LBB4_33: # =>This Inner Loop Header: Depth=1
movsd %xmm0, 112(%rsp) # 8-byte Spill
movsd %xmm2, 120(%rsp) # 8-byte Spill
movl $1, %edi
leaq 240(%rsp), %rsi
callq clock_gettime
movq 88(%rsp), %rdi
movq 96(%rsp), %rsi # 8-byte Reload
movq 56(%rsp), %rdx # 8-byte Reload
movl $1, %ecx
callq hipMemcpy
movq 80(%rsp), %rdi
movq 200(%rsp), %rsi # 8-byte Reload
movq 216(%rsp), %rdx # 8-byte Reload
movl $1, %ecx
callq hipMemcpy
movq %rbx, %rdi
movl $1, %esi
movabsq $68719476752, %rdx # imm = 0x1000000010
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
cmpb $0, 12(%rsp) # 1-byte Folded Reload
je .LBB4_36
# %bb.34: # in Loop: Header=BB4_33 Depth=1
testl %eax, %eax
jne .LBB4_39
# %bb.35: # in Loop: Header=BB4_33 Depth=1
movq 88(%rsp), %rax
movq 80(%rsp), %rcx
movq 72(%rsp), %rdx
movq %rax, 192(%rsp)
movq %rcx, 184(%rsp)
movq %rdx, 176(%rsp)
movq 40(%rsp), %rax # 8-byte Reload
movl %eax, 36(%rsp)
movl %ebp, 32(%rsp)
movl %ebp, 28(%rsp)
movl %r12d, 24(%rsp)
movl %eax, 20(%rsp)
movl %r12d, 16(%rsp)
leaq 192(%rsp), %rax
movq %rax, 256(%rsp)
leaq 184(%rsp), %rax
movq %rax, 264(%rsp)
leaq 176(%rsp), %rax
movq %rax, 272(%rsp)
leaq 36(%rsp), %rax
movq %rax, 280(%rsp)
leaq 32(%rsp), %rax
movq %rax, 288(%rsp)
leaq 28(%rsp), %rax
movq %rax, 296(%rsp)
leaq 24(%rsp), %rax
movq %rax, 304(%rsp)
leaq 20(%rsp), %rax
movq %rax, 312(%rsp)
leaq 16(%rsp), %rax
movq %rax, 320(%rsp)
leaq 160(%rsp), %rdi
leaq 144(%rsp), %rsi
leaq 136(%rsp), %rdx
leaq 128(%rsp), %rcx
callq __hipPopCallConfiguration
movq 160(%rsp), %rsi
movl 168(%rsp), %edx
movq 144(%rsp), %rcx
movl 152(%rsp), %r8d
movl $_Z24cudaMultiplyArraysSharedPiS_S_iiiiii, %edi
jmp .LBB4_38
.p2align 4, 0x90
.LBB4_36: # in Loop: Header=BB4_33 Depth=1
testl %eax, %eax
jne .LBB4_39
# %bb.37: # in Loop: Header=BB4_33 Depth=1
movq 88(%rsp), %rax
movq 80(%rsp), %rcx
movq 72(%rsp), %rdx
movq %rax, 192(%rsp)
movq %rcx, 184(%rsp)
movq %rdx, 176(%rsp)
movq 40(%rsp), %rax # 8-byte Reload
movl %eax, 36(%rsp)
movl %ebp, 32(%rsp)
movl %ebp, 28(%rsp)
movl %r12d, 24(%rsp)
movl %eax, 20(%rsp)
movl %r12d, 16(%rsp)
leaq 192(%rsp), %rax
movq %rax, 256(%rsp)
leaq 184(%rsp), %rax
movq %rax, 264(%rsp)
leaq 176(%rsp), %rax
movq %rax, 272(%rsp)
leaq 36(%rsp), %rax
movq %rax, 280(%rsp)
leaq 32(%rsp), %rax
movq %rax, 288(%rsp)
leaq 28(%rsp), %rax
movq %rax, 296(%rsp)
leaq 24(%rsp), %rax
movq %rax, 304(%rsp)
leaq 20(%rsp), %rax
movq %rax, 312(%rsp)
leaq 16(%rsp), %rax
movq %rax, 320(%rsp)
leaq 160(%rsp), %rdi
leaq 144(%rsp), %rsi
leaq 136(%rsp), %rdx
leaq 128(%rsp), %rcx
callq __hipPopCallConfiguration
movq 160(%rsp), %rsi
movl 168(%rsp), %edx
movq 144(%rsp), %rcx
movl 152(%rsp), %r8d
movl $_Z18cudaMultiplyArraysPiS_S_iiiiii, %edi
jmp .LBB4_38
.LBB4_22:
movsd .LCPI4_0(%rip), %xmm3 # xmm3 = mem[0],zero
xorpd %xmm1, %xmm1
xorpd %xmm0, %xmm0
movsd %xmm0, 64(%rsp) # 8-byte Spill
.LBB4_23: # %._crit_edge
movsd %xmm3, 56(%rsp) # 8-byte Spill
movsd %xmm1, 112(%rsp) # 8-byte Spill
cmpb $0, 7(%rsp) # 1-byte Folded Reload
je .LBB4_31
# %bb.24:
movl $.L.str, %edi
movl $.L.str.1, %esi
callq fopen
movq %rax, %rbx
cmpl $0, 40(%rsp) # 4-byte Folded Reload
jle .LBB4_30
# %bb.25: # %.preheader.lr.ph
movl 40(%rsp), %eax # 4-byte Reload
movq %rax, 120(%rsp) # 8-byte Spill
movl %r12d, %r15d
xorl %ebp, %ebp
xorl %r14d, %r14d
movq %r12, 208(%rsp) # 8-byte Spill
jmp .LBB4_26
.p2align 4, 0x90
.LBB4_29: # %._crit_edge178
# in Loop: Header=BB4_26 Depth=1
movl $10, %edi
movq %rbx, %rsi
callq fputc@PLT
incq %r14
movq 208(%rsp), %r12 # 8-byte Reload
addl %r12d, %ebp
cmpq 120(%rsp), %r14 # 8-byte Folded Reload
je .LBB4_30
.LBB4_26: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB4_28 Depth 2
testl %r12d, %r12d
jle .LBB4_29
# %bb.27: # %.lr.ph177
# in Loop: Header=BB4_26 Depth=1
movl %ebp, %eax
movq 104(%rsp), %rcx # 8-byte Reload
leaq (%rcx,%rax,4), %r12
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB4_28: # Parent Loop BB4_26 Depth=1
# => This Inner Loop Header: Depth=2
movl (%r12,%r13,4), %edx
movl $.L.str.2, %esi
movq %rbx, %rdi
xorl %eax, %eax
callq fprintf
incq %r13
cmpq %r13, %r15
jne .LBB4_28
jmp .LBB4_29
.LBB4_30: # %._crit_edge180
movl $10, %edi
movq %rbx, %rsi
callq fputc@PLT
movq %rbx, %rdi
callq fclose
movl 8(%rsp), %r13d # 4-byte Reload
movl 52(%rsp), %ebp # 4-byte Reload
.LBB4_31:
movq 96(%rsp), %rdi # 8-byte Reload
callq free
movq 200(%rsp), %rdi # 8-byte Reload
callq free
movq 104(%rsp), %rdi # 8-byte Reload
callq free
movq 88(%rsp), %rdi
callq hipFree
movq 80(%rsp), %rdi
callq hipFree
movq 72(%rsp), %rdi
callq hipFree
leaq 256(%rsp), %rbx
movq %rbx, %rdi
xorl %esi, %esi
callq hipGetDevicePropertiesR0600
movl $.L.str.4, %edi
movq %rbx, %rsi
xorl %eax, %eax
callq printf
movl $.L.str.5, %edi
movq 40(%rsp), %rsi # 8-byte Reload
# kill: def $esi killed $esi killed $rsi
xorl %eax, %eax
callq printf
movl $.L.str.6, %edi
movl %ebp, %esi
xorl %eax, %eax
callq printf
movl $.L.str.7, %edi
movl %r12d, %esi
xorl %eax, %eax
callq printf
movl $.L.str.8, %edi
movl $16, %esi
xorl %eax, %eax
callq printf
movl $.L.str.9, %edi
movl %r13d, %esi
xorl %eax, %eax
callq printf
movl $.L.str.11, %eax
movl $.L.str.12, %esi
cmpb $0, 12(%rsp) # 1-byte Folded Reload
cmovneq %rax, %rsi
movl $.L.str.10, %edi
xorl %eax, %eax
callq printf
movl $.L.str.13, %edi
movsd 56(%rsp), %xmm0 # 8-byte Reload
# xmm0 = mem[0],zero
movb $1, %al
callq printf
xorps %xmm1, %xmm1
cvtsi2sd %r13d, %xmm1
movsd 64(%rsp), %xmm0 # 8-byte Reload
# xmm0 = mem[0],zero
divsd %xmm1, %xmm0
movl $.L.str.14, %edi
movb $1, %al
callq printf
movl $.L.str.15, %edi
movsd 112(%rsp), %xmm0 # 8-byte Reload
# xmm0 = mem[0],zero
movb $1, %al
callq printf
movl $10, %edi
callq putchar@PLT
xorl %eax, %eax
addq $1736, %rsp # imm = 0x6C8
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end4:
.size main, .Lfunc_end4-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB5_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB5_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z18cudaMultiplyArraysPiS_S_iiiiii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z24cudaMultiplyArraysSharedPiS_S_iiiiii, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end5:
.size __hip_module_ctor, .Lfunc_end5-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB6_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB6_2:
retq
.Lfunc_end6:
.size __hip_module_dtor, .Lfunc_end6-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z18cudaMultiplyArraysPiS_S_iiiiii,@object # @_Z18cudaMultiplyArraysPiS_S_iiiiii
.section .rodata,"a",@progbits
.globl _Z18cudaMultiplyArraysPiS_S_iiiiii
.p2align 3, 0x0
_Z18cudaMultiplyArraysPiS_S_iiiiii:
.quad _Z33__device_stub__cudaMultiplyArraysPiS_S_iiiiii
.size _Z18cudaMultiplyArraysPiS_S_iiiiii, 8
.type _Z24cudaMultiplyArraysSharedPiS_S_iiiiii,@object # @_Z24cudaMultiplyArraysSharedPiS_S_iiiiii
.globl _Z24cudaMultiplyArraysSharedPiS_S_iiiiii
.p2align 3, 0x0
_Z24cudaMultiplyArraysSharedPiS_S_iiiiii:
.quad _Z39__device_stub__cudaMultiplyArraysSharedPiS_S_iiiiii
.size _Z24cudaMultiplyArraysSharedPiS_S_iiiiii, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "problem2.out"
.size .L.str, 13
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "w"
.size .L.str.1, 2
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "%12d "
.size .L.str.2, 6
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "Device name: %s\n"
.size .L.str.4, 17
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "Dimension 1 (m): %12d\n"
.size .L.str.5, 28
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "Dimension 2 (n): %12d\n"
.size .L.str.6, 28
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz "Dimension 3 (p): %12d\n"
.size .L.str.7, 28
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz "Block size: %12d\n"
.size .L.str.8, 28
.type .L.str.9,@object # @.str.9
.L.str.9:
.asciz "Number of runs: %12d\n"
.size .L.str.9, 28
.type .L.str.10,@object # @.str.10
.L.str.10:
.asciz "Using shared memory?: %12s\n"
.size .L.str.10, 28
.type .L.str.11,@object # @.str.11
.L.str.11:
.asciz "True"
.size .L.str.11, 5
.type .L.str.12,@object # @.str.12
.L.str.12:
.asciz "False"
.size .L.str.12, 6
.type .L.str.13,@object # @.str.13
.L.str.13:
.asciz "Inclusive time (min): %12.6f ms\n"
.size .L.str.13, 33
.type .L.str.14,@object # @.str.14
.L.str.14:
.asciz "Inclusive time (avg): %12.6f ms\n"
.size .L.str.14, 33
.type .L.str.15,@object # @.str.15
.L.str.15:
.asciz "Inclusive time (max): %12.6f ms\n"
.size .L.str.15, 33
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z18cudaMultiplyArraysPiS_S_iiiiii"
.size .L__unnamed_1, 35
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "_Z24cudaMultiplyArraysSharedPiS_S_iiiiii"
.size .L__unnamed_2, 41
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z33__device_stub__cudaMultiplyArraysPiS_S_iiiiii
.addrsig_sym _Z39__device_stub__cudaMultiplyArraysSharedPiS_S_iiiiii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z18cudaMultiplyArraysPiS_S_iiiiii
.addrsig_sym _Z24cudaMultiplyArraysSharedPiS_S_iiiiii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
/*
============================================================================
Name : Teste.cu
Author :
Version :
Copyright : Your copyright notice
Description : CUDA compute reciprocals
============================================================================
*/
static void CheckCudaErrorAux(const char *, unsigned, const char *,
cudaError_t);
#define CUDA_CHECK_RETURN(value) CheckCudaErrorAux(__FILE__,__LINE__, #value, value)
/**
* CUDA kernel that computes reciprocal values for a given vector
*/
/**
* Host function that copies the data and launches the work on GPU
*/
__global__ void reciprocalKernel(float *data, unsigned vectorSize) {
unsigned idx = blockIdx.x * blockDim.x + threadIdx.x;
if (idx < vectorSize)
data[idx] = 1.0 / data[idx];
} | code for sm_80
Function : _Z16reciprocalKernelPfj
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R2, R2, c[0x0][0x0], R3 ; /* 0x0000000002027a24 */
/* 0x001fca00078e0203 */
/*0040*/ ISETP.GE.U32.AND P0, PT, R2, c[0x0][0x168], PT ; /* 0x00005a0002007a0c */
/* 0x000fda0003f06070 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */
/* 0x000fe200078e00ff */
/*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fc60000000a00 */
/*0080*/ IMAD.WIDE.U32 R2, R2, R3, c[0x0][0x160] ; /* 0x0000580002027625 */
/* 0x000fca00078e0003 */
/*0090*/ LDG.E R4, [R2.64] ; /* 0x0000000402047981 */
/* 0x000ea2000c1e1900 */
/*00a0*/ BSSY B0, 0x180 ; /* 0x000000d000007945 */
/* 0x000fe20003800000 */
/*00b0*/ IADD3 R0, R4, 0x1800000, RZ ; /* 0x0180000004007810 */
/* 0x004fc80007ffe0ff */
/*00c0*/ LOP3.LUT R0, R0, 0x7f800000, RZ, 0xc0, !PT ; /* 0x7f80000000007812 */
/* 0x000fc800078ec0ff */
/*00d0*/ ISETP.GT.U32.AND P0, PT, R0, 0x1ffffff, PT ; /* 0x01ffffff0000780c */
/* 0x000fda0003f04070 */
/*00e0*/ @P0 BRA 0x130 ; /* 0x0000004000000947 */
/* 0x000fea0003800000 */
/*00f0*/ MOV R0, 0x110 ; /* 0x0000011000007802 */
/* 0x000fe40000000f00 */
/*0100*/ CALL.REL.NOINC 0x1a0 ; /* 0x0000009000007944 */
/* 0x000fea0003c00000 */
/*0110*/ IMAD.MOV.U32 R5, RZ, RZ, R6 ; /* 0x000000ffff057224 */
/* 0x000fe200078e0006 */
/*0120*/ BRA 0x170 ; /* 0x0000004000007947 */
/* 0x000fea0003800000 */
/*0130*/ MUFU.RCP R5, R4 ; /* 0x0000000400057308 */
/* 0x000e240000001000 */
/*0140*/ FFMA R0, R4, R5, -1 ; /* 0xbf80000004007423 */
/* 0x001fc80000000005 */
/*0150*/ FADD.FTZ R0, -R0, -RZ ; /* 0x800000ff00007221 */
/* 0x000fc80000010100 */
/*0160*/ FFMA R5, R5, R0, R5 ; /* 0x0000000005057223 */
/* 0x000fe40000000005 */
/*0170*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0180*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */
/* 0x000fe2000c101904 */
/*0190*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*01a0*/ IMAD.SHL.U32 R5, R4, 0x2, RZ ; /* 0x0000000204057824 */
/* 0x000fe200078e00ff */
/*01b0*/ BSSY B1, 0x4c0 ; /* 0x0000030000017945 */
/* 0x000fe80003800000 */
/*01c0*/ SHF.R.U32.HI R5, RZ, 0x18, R5 ; /* 0x00000018ff057819 */
/* 0x000fc80000011605 */
/*01d0*/ ISETP.NE.U32.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720c */
/* 0x000fda0003f05070 */
/*01e0*/ @P0 BRA 0x290 ; /* 0x000000a000000947 */
/* 0x000fea0003800000 */
/*01f0*/ IMAD.SHL.U32 R5, R4, 0x2, RZ ; /* 0x0000000204057824 */
/* 0x000fca00078e00ff */
/*0200*/ ISETP.NE.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720c */
/* 0x000fda0003f05270 */
/*0210*/ @P0 FFMA R6, R4, 1.84467440737095516160e+19, RZ ; /* 0x5f80000004060823 */
/* 0x000fe200000000ff */
/*0220*/ @!P0 MUFU.RCP R5, R4 ; /* 0x0000000400058308 */
/* 0x000ff00000001000 */
/*0230*/ @P0 MUFU.RCP R7, R6 ; /* 0x0000000600070308 */
/* 0x000e240000001000 */
/*0240*/ @P0 FFMA R8, R6, R7, -1 ; /* 0xbf80000006080423 */
/* 0x001fc80000000007 */
/*0250*/ @P0 FADD.FTZ R8, -R8, -RZ ; /* 0x800000ff08080221 */
/* 0x000fc80000010100 */
/*0260*/ @P0 FFMA R8, R7, R8, R7 ; /* 0x0000000807080223 */
/* 0x000fc80000000007 */
/*0270*/ @P0 FFMA R5, R8, 1.84467440737095516160e+19, RZ ; /* 0x5f80000008050823 */
/* 0x000fe200000000ff */
/*0280*/ BRA 0x4b0 ; /* 0x0000022000007947 */
/* 0x000fea0003800000 */
/*0290*/ IADD3 R6, R5, -0xfd, RZ ; /* 0xffffff0305067810 */
/* 0x000fc80007ffe0ff */
/*02a0*/ ISETP.GT.U32.AND P0, PT, R6, 0x1, PT ; /* 0x000000010600780c */
/* 0x000fda0003f04070 */
/*02b0*/ @P0 BRA 0x4a0 ; /* 0x000001e000000947 */
/* 0x000fea0003800000 */
/*02c0*/ LOP3.LUT R7, R4, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff04077812 */
/* 0x000fe200078ec0ff */
/*02d0*/ IMAD.MOV.U32 R11, RZ, RZ, 0x3 ; /* 0x00000003ff0b7424 */
/* 0x000fc600078e00ff */
/*02e0*/ LOP3.LUT R7, R7, 0x3f800000, RZ, 0xfc, !PT ; /* 0x3f80000007077812 */
/* 0x000fe400078efcff */
/*02f0*/ SHF.L.U32 R12, R11, R6, RZ ; /* 0x000000060b0c7219 */
/* 0x000fe400000006ff */
/*0300*/ MUFU.RCP R8, R7 ; /* 0x0000000700087308 */
/* 0x000e240000001000 */
/*0310*/ FFMA R9, R7, R8, -1 ; /* 0xbf80000007097423 */
/* 0x001fc80000000008 */
/*0320*/ FADD.FTZ R9, -R9, -RZ ; /* 0x800000ff09097221 */
/* 0x000fc80000010100 */
/*0330*/ FFMA.RM R10, R8.reuse, R9.reuse, R8.reuse ; /* 0x00000009080a7223 */
/* 0x1c0fe40000004008 */
/*0340*/ FFMA.RP R9, R8, R9, R8 ; /* 0x0000000908097223 */
/* 0x000fc60000008008 */
/*0350*/ LOP3.LUT R8, R10.reuse, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff0a087812 */
/* 0x040fe400078ec0ff */
/*0360*/ FSETP.NEU.FTZ.AND P0, PT, R10, R9, PT ; /* 0x000000090a00720b */
/* 0x000fe40003f1d000 */
/*0370*/ LOP3.LUT R9, R8, 0x800000, RZ, 0xfc, !PT ; /* 0x0080000008097812 */
/* 0x000fe400078efcff */
/*0380*/ SEL R8, RZ, 0xffffffff, !P0 ; /* 0xffffffffff087807 */
/* 0x000fe40004000000 */
/*0390*/ LOP3.LUT R7, R12, R9, RZ, 0xc0, !PT ; /* 0x000000090c077212 */
/* 0x000fc600078ec0ff */
/*03a0*/ IMAD.MOV R8, RZ, RZ, -R8 ; /* 0x000000ffff087224 */
/* 0x000fe200078e0a08 */
/*03b0*/ SHF.R.U32.HI R7, RZ, R6, R7 ; /* 0x00000006ff077219 */
/* 0x000fc80000011607 */
/*03c0*/ LOP3.LUT P1, RZ, R8, R6, R9, 0xf8, !PT ; /* 0x0000000608ff7212 */
/* 0x000fe4000782f809 */
/*03d0*/ LOP3.LUT P0, RZ, R7.reuse, 0x1, RZ, 0xc0, !PT ; /* 0x0000000107ff7812 */
/* 0x040fe4000780c0ff */
/*03e0*/ LOP3.LUT P2, RZ, R7, 0x2, RZ, 0xc0, !PT ; /* 0x0000000207ff7812 */
/* 0x000fc8000784c0ff */
/*03f0*/ PLOP3.LUT P0, PT, P0, P1, P2, 0xe0, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40000703c20 */
/*0400*/ LOP3.LUT P1, RZ, R4, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff04ff7812 */
/* 0x000fe4000782c0ff */
/*0410*/ SEL R6, RZ, 0x1, !P0 ; /* 0x00000001ff067807 */
/* 0x000fca0004000000 */
/*0420*/ IMAD.MOV R6, RZ, RZ, -R6 ; /* 0x000000ffff067224 */
/* 0x000fca00078e0a06 */
/*0430*/ ISETP.GE.AND P0, PT, R6, RZ, PT ; /* 0x000000ff0600720c */
/* 0x000fe40003f06270 */
/*0440*/ IADD3 R6, R5, -0xfc, RZ ; /* 0xffffff0405067810 */
/* 0x000fc80007ffe0ff */
/*0450*/ SHF.R.U32.HI R5, RZ, R6, R9 ; /* 0x00000006ff057219 */
/* 0x000fce0000011609 */
/*0460*/ @!P0 IADD3 R5, R5, 0x1, RZ ; /* 0x0000000105058810 */
/* 0x000fca0007ffe0ff */
/*0470*/ @!P1 IMAD.SHL.U32 R5, R5, 0x2, RZ ; /* 0x0000000205059824 */
/* 0x000fca00078e00ff */
/*0480*/ LOP3.LUT R5, R5, 0x80000000, R4, 0xf8, !PT ; /* 0x8000000005057812 */
/* 0x000fe200078ef804 */
/*0490*/ BRA 0x4b0 ; /* 0x0000001000007947 */
/* 0x000fea0003800000 */
/*04a0*/ MUFU.RCP R5, R4 ; /* 0x0000000400057308 */
/* 0x0000640000001000 */
/*04b0*/ BSYNC B1 ; /* 0x0000000000017941 */
/* 0x000fea0003800000 */
/*04c0*/ IMAD.MOV.U32 R6, RZ, RZ, R5 ; /* 0x000000ffff067224 */
/* 0x002fe400078e0005 */
/*04d0*/ IMAD.MOV.U32 R4, RZ, RZ, R0 ; /* 0x000000ffff047224 */
/* 0x001fe400078e0000 */
/*04e0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x0 ; /* 0x00000000ff057424 */
/* 0x000fc800078e00ff */
/*04f0*/ RET.REL.NODEC R4 0x0 ; /* 0xfffffb0004007950 */
/* 0x000fea0003c3ffff */
/*0500*/ BRA 0x500; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0510*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0520*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0530*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0540*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0550*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0560*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0570*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0580*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0590*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
/*
============================================================================
Name : Teste.cu
Author :
Version :
Copyright : Your copyright notice
Description : CUDA compute reciprocals
============================================================================
*/
static void CheckCudaErrorAux(const char *, unsigned, const char *,
cudaError_t);
#define CUDA_CHECK_RETURN(value) CheckCudaErrorAux(__FILE__,__LINE__, #value, value)
/**
* CUDA kernel that computes reciprocal values for a given vector
*/
/**
* Host function that copies the data and launches the work on GPU
*/
__global__ void reciprocalKernel(float *data, unsigned vectorSize) {
unsigned idx = blockIdx.x * blockDim.x + threadIdx.x;
if (idx < vectorSize)
data[idx] = 1.0 / data[idx];
} | .file "tmpxft_000306c1_00000000-6_reciprocalKernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z37__device_stub__Z16reciprocalKernelPfjPfj
.type _Z37__device_stub__Z16reciprocalKernelPfjPfj, @function
_Z37__device_stub__Z16reciprocalKernelPfjPfj:
.LFB2051:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movl %esi, 4(%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
leaq 4(%rsp), %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z16reciprocalKernelPfj(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z37__device_stub__Z16reciprocalKernelPfjPfj, .-_Z37__device_stub__Z16reciprocalKernelPfjPfj
.globl _Z16reciprocalKernelPfj
.type _Z16reciprocalKernelPfj, @function
_Z16reciprocalKernelPfj:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z37__device_stub__Z16reciprocalKernelPfjPfj
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z16reciprocalKernelPfj, .-_Z16reciprocalKernelPfj
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z16reciprocalKernelPfj"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z16reciprocalKernelPfj(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
/*
============================================================================
Name : Teste.cu
Author :
Version :
Copyright : Your copyright notice
Description : CUDA compute reciprocals
============================================================================
*/
static void CheckCudaErrorAux(const char *, unsigned, const char *,
cudaError_t);
#define CUDA_CHECK_RETURN(value) CheckCudaErrorAux(__FILE__,__LINE__, #value, value)
/**
* CUDA kernel that computes reciprocal values for a given vector
*/
/**
* Host function that copies the data and launches the work on GPU
*/
__global__ void reciprocalKernel(float *data, unsigned vectorSize) {
unsigned idx = blockIdx.x * blockDim.x + threadIdx.x;
if (idx < vectorSize)
data[idx] = 1.0 / data[idx];
} | #include <hip/hip_runtime.h>
#include "includes.h"
/*
============================================================================
Name : Teste.cu
Author :
Version :
Copyright : Your copyright notice
Description : CUDA compute reciprocals
============================================================================
*/
static void CheckCudaErrorAux(const char *, unsigned, const char *,
hipError_t);
#define CUDA_CHECK_RETURN(value) CheckCudaErrorAux(__FILE__,__LINE__, #value, value)
/**
* CUDA kernel that computes reciprocal values for a given vector
*/
/**
* Host function that copies the data and launches the work on GPU
*/
__global__ void reciprocalKernel(float *data, unsigned vectorSize) {
unsigned idx = blockIdx.x * blockDim.x + threadIdx.x;
if (idx < vectorSize)
data[idx] = 1.0 / data[idx];
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
/*
============================================================================
Name : Teste.cu
Author :
Version :
Copyright : Your copyright notice
Description : CUDA compute reciprocals
============================================================================
*/
static void CheckCudaErrorAux(const char *, unsigned, const char *,
hipError_t);
#define CUDA_CHECK_RETURN(value) CheckCudaErrorAux(__FILE__,__LINE__, #value, value)
/**
* CUDA kernel that computes reciprocal values for a given vector
*/
/**
* Host function that copies the data and launches the work on GPU
*/
__global__ void reciprocalKernel(float *data, unsigned vectorSize) {
unsigned idx = blockIdx.x * blockDim.x + threadIdx.x;
if (idx < vectorSize)
data[idx] = 1.0 / data[idx];
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z16reciprocalKernelPfj
.globl _Z16reciprocalKernelPfj
.p2align 8
.type _Z16reciprocalKernelPfj,@function
_Z16reciprocalKernelPfj:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x1c
s_load_b32 s3, s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_u32_e64 s3, v1
s_cbranch_execz .LBB0_2
s_load_b64 s[0:1], s[0:1], 0x0
v_mov_b32_e32 v2, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_load_b32 v2, v[0:1], off
s_waitcnt vmcnt(0)
v_div_scale_f32 v3, null, v2, v2, 1.0
v_rcp_f32_e32 v4, v3
s_waitcnt_depctr 0xfff
v_fma_f32 v5, -v3, v4, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v4, v5, v4
v_div_scale_f32 v5, vcc_lo, 1.0, v2, 1.0
v_mul_f32_e32 v6, v5, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v7, -v3, v6, v5
v_fmac_f32_e32 v6, v7, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v3, -v3, v6, v5
v_div_fmas_f32 v3, v3, v4, v6
s_delay_alu instid0(VALU_DEP_1)
v_div_fixup_f32 v2, v3, v2, 1.0
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z16reciprocalKernelPfj
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 8
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z16reciprocalKernelPfj, .Lfunc_end0-_Z16reciprocalKernelPfj
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: by_value
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
.size: 2
.value_kind: hidden_group_size_x
- .offset: 30
.size: 2
.value_kind: hidden_group_size_y
- .offset: 32
.size: 2
.value_kind: hidden_group_size_z
- .offset: 34
.size: 2
.value_kind: hidden_remainder_x
- .offset: 36
.size: 2
.value_kind: hidden_remainder_y
- .offset: 38
.size: 2
.value_kind: hidden_remainder_z
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 80
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z16reciprocalKernelPfj
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z16reciprocalKernelPfj.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 8
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
/*
============================================================================
Name : Teste.cu
Author :
Version :
Copyright : Your copyright notice
Description : CUDA compute reciprocals
============================================================================
*/
static void CheckCudaErrorAux(const char *, unsigned, const char *,
hipError_t);
#define CUDA_CHECK_RETURN(value) CheckCudaErrorAux(__FILE__,__LINE__, #value, value)
/**
* CUDA kernel that computes reciprocal values for a given vector
*/
/**
* Host function that copies the data and launches the work on GPU
*/
__global__ void reciprocalKernel(float *data, unsigned vectorSize) {
unsigned idx = blockIdx.x * blockDim.x + threadIdx.x;
if (idx < vectorSize)
data[idx] = 1.0 / data[idx];
} | .text
.file "reciprocalKernel.hip"
.globl _Z31__device_stub__reciprocalKernelPfj # -- Begin function _Z31__device_stub__reciprocalKernelPfj
.p2align 4, 0x90
.type _Z31__device_stub__reciprocalKernelPfj,@function
_Z31__device_stub__reciprocalKernelPfj: # @_Z31__device_stub__reciprocalKernelPfj
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movl %esi, 4(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 4(%rsp), %rax
movq %rax, 72(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z16reciprocalKernelPfj, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z31__device_stub__reciprocalKernelPfj, .Lfunc_end0-_Z31__device_stub__reciprocalKernelPfj
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z16reciprocalKernelPfj, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z16reciprocalKernelPfj,@object # @_Z16reciprocalKernelPfj
.section .rodata,"a",@progbits
.globl _Z16reciprocalKernelPfj
.p2align 3, 0x0
_Z16reciprocalKernelPfj:
.quad _Z31__device_stub__reciprocalKernelPfj
.size _Z16reciprocalKernelPfj, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z16reciprocalKernelPfj"
.size .L__unnamed_1, 24
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z31__device_stub__reciprocalKernelPfj
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z16reciprocalKernelPfj
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z16reciprocalKernelPfj
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R2, R2, c[0x0][0x0], R3 ; /* 0x0000000002027a24 */
/* 0x001fca00078e0203 */
/*0040*/ ISETP.GE.U32.AND P0, PT, R2, c[0x0][0x168], PT ; /* 0x00005a0002007a0c */
/* 0x000fda0003f06070 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */
/* 0x000fe200078e00ff */
/*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fc60000000a00 */
/*0080*/ IMAD.WIDE.U32 R2, R2, R3, c[0x0][0x160] ; /* 0x0000580002027625 */
/* 0x000fca00078e0003 */
/*0090*/ LDG.E R4, [R2.64] ; /* 0x0000000402047981 */
/* 0x000ea2000c1e1900 */
/*00a0*/ BSSY B0, 0x180 ; /* 0x000000d000007945 */
/* 0x000fe20003800000 */
/*00b0*/ IADD3 R0, R4, 0x1800000, RZ ; /* 0x0180000004007810 */
/* 0x004fc80007ffe0ff */
/*00c0*/ LOP3.LUT R0, R0, 0x7f800000, RZ, 0xc0, !PT ; /* 0x7f80000000007812 */
/* 0x000fc800078ec0ff */
/*00d0*/ ISETP.GT.U32.AND P0, PT, R0, 0x1ffffff, PT ; /* 0x01ffffff0000780c */
/* 0x000fda0003f04070 */
/*00e0*/ @P0 BRA 0x130 ; /* 0x0000004000000947 */
/* 0x000fea0003800000 */
/*00f0*/ MOV R0, 0x110 ; /* 0x0000011000007802 */
/* 0x000fe40000000f00 */
/*0100*/ CALL.REL.NOINC 0x1a0 ; /* 0x0000009000007944 */
/* 0x000fea0003c00000 */
/*0110*/ IMAD.MOV.U32 R5, RZ, RZ, R6 ; /* 0x000000ffff057224 */
/* 0x000fe200078e0006 */
/*0120*/ BRA 0x170 ; /* 0x0000004000007947 */
/* 0x000fea0003800000 */
/*0130*/ MUFU.RCP R5, R4 ; /* 0x0000000400057308 */
/* 0x000e240000001000 */
/*0140*/ FFMA R0, R4, R5, -1 ; /* 0xbf80000004007423 */
/* 0x001fc80000000005 */
/*0150*/ FADD.FTZ R0, -R0, -RZ ; /* 0x800000ff00007221 */
/* 0x000fc80000010100 */
/*0160*/ FFMA R5, R5, R0, R5 ; /* 0x0000000005057223 */
/* 0x000fe40000000005 */
/*0170*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0180*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */
/* 0x000fe2000c101904 */
/*0190*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*01a0*/ IMAD.SHL.U32 R5, R4, 0x2, RZ ; /* 0x0000000204057824 */
/* 0x000fe200078e00ff */
/*01b0*/ BSSY B1, 0x4c0 ; /* 0x0000030000017945 */
/* 0x000fe80003800000 */
/*01c0*/ SHF.R.U32.HI R5, RZ, 0x18, R5 ; /* 0x00000018ff057819 */
/* 0x000fc80000011605 */
/*01d0*/ ISETP.NE.U32.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720c */
/* 0x000fda0003f05070 */
/*01e0*/ @P0 BRA 0x290 ; /* 0x000000a000000947 */
/* 0x000fea0003800000 */
/*01f0*/ IMAD.SHL.U32 R5, R4, 0x2, RZ ; /* 0x0000000204057824 */
/* 0x000fca00078e00ff */
/*0200*/ ISETP.NE.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720c */
/* 0x000fda0003f05270 */
/*0210*/ @P0 FFMA R6, R4, 1.84467440737095516160e+19, RZ ; /* 0x5f80000004060823 */
/* 0x000fe200000000ff */
/*0220*/ @!P0 MUFU.RCP R5, R4 ; /* 0x0000000400058308 */
/* 0x000ff00000001000 */
/*0230*/ @P0 MUFU.RCP R7, R6 ; /* 0x0000000600070308 */
/* 0x000e240000001000 */
/*0240*/ @P0 FFMA R8, R6, R7, -1 ; /* 0xbf80000006080423 */
/* 0x001fc80000000007 */
/*0250*/ @P0 FADD.FTZ R8, -R8, -RZ ; /* 0x800000ff08080221 */
/* 0x000fc80000010100 */
/*0260*/ @P0 FFMA R8, R7, R8, R7 ; /* 0x0000000807080223 */
/* 0x000fc80000000007 */
/*0270*/ @P0 FFMA R5, R8, 1.84467440737095516160e+19, RZ ; /* 0x5f80000008050823 */
/* 0x000fe200000000ff */
/*0280*/ BRA 0x4b0 ; /* 0x0000022000007947 */
/* 0x000fea0003800000 */
/*0290*/ IADD3 R6, R5, -0xfd, RZ ; /* 0xffffff0305067810 */
/* 0x000fc80007ffe0ff */
/*02a0*/ ISETP.GT.U32.AND P0, PT, R6, 0x1, PT ; /* 0x000000010600780c */
/* 0x000fda0003f04070 */
/*02b0*/ @P0 BRA 0x4a0 ; /* 0x000001e000000947 */
/* 0x000fea0003800000 */
/*02c0*/ LOP3.LUT R7, R4, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff04077812 */
/* 0x000fe200078ec0ff */
/*02d0*/ IMAD.MOV.U32 R11, RZ, RZ, 0x3 ; /* 0x00000003ff0b7424 */
/* 0x000fc600078e00ff */
/*02e0*/ LOP3.LUT R7, R7, 0x3f800000, RZ, 0xfc, !PT ; /* 0x3f80000007077812 */
/* 0x000fe400078efcff */
/*02f0*/ SHF.L.U32 R12, R11, R6, RZ ; /* 0x000000060b0c7219 */
/* 0x000fe400000006ff */
/*0300*/ MUFU.RCP R8, R7 ; /* 0x0000000700087308 */
/* 0x000e240000001000 */
/*0310*/ FFMA R9, R7, R8, -1 ; /* 0xbf80000007097423 */
/* 0x001fc80000000008 */
/*0320*/ FADD.FTZ R9, -R9, -RZ ; /* 0x800000ff09097221 */
/* 0x000fc80000010100 */
/*0330*/ FFMA.RM R10, R8.reuse, R9.reuse, R8.reuse ; /* 0x00000009080a7223 */
/* 0x1c0fe40000004008 */
/*0340*/ FFMA.RP R9, R8, R9, R8 ; /* 0x0000000908097223 */
/* 0x000fc60000008008 */
/*0350*/ LOP3.LUT R8, R10.reuse, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff0a087812 */
/* 0x040fe400078ec0ff */
/*0360*/ FSETP.NEU.FTZ.AND P0, PT, R10, R9, PT ; /* 0x000000090a00720b */
/* 0x000fe40003f1d000 */
/*0370*/ LOP3.LUT R9, R8, 0x800000, RZ, 0xfc, !PT ; /* 0x0080000008097812 */
/* 0x000fe400078efcff */
/*0380*/ SEL R8, RZ, 0xffffffff, !P0 ; /* 0xffffffffff087807 */
/* 0x000fe40004000000 */
/*0390*/ LOP3.LUT R7, R12, R9, RZ, 0xc0, !PT ; /* 0x000000090c077212 */
/* 0x000fc600078ec0ff */
/*03a0*/ IMAD.MOV R8, RZ, RZ, -R8 ; /* 0x000000ffff087224 */
/* 0x000fe200078e0a08 */
/*03b0*/ SHF.R.U32.HI R7, RZ, R6, R7 ; /* 0x00000006ff077219 */
/* 0x000fc80000011607 */
/*03c0*/ LOP3.LUT P1, RZ, R8, R6, R9, 0xf8, !PT ; /* 0x0000000608ff7212 */
/* 0x000fe4000782f809 */
/*03d0*/ LOP3.LUT P0, RZ, R7.reuse, 0x1, RZ, 0xc0, !PT ; /* 0x0000000107ff7812 */
/* 0x040fe4000780c0ff */
/*03e0*/ LOP3.LUT P2, RZ, R7, 0x2, RZ, 0xc0, !PT ; /* 0x0000000207ff7812 */
/* 0x000fc8000784c0ff */
/*03f0*/ PLOP3.LUT P0, PT, P0, P1, P2, 0xe0, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40000703c20 */
/*0400*/ LOP3.LUT P1, RZ, R4, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff04ff7812 */
/* 0x000fe4000782c0ff */
/*0410*/ SEL R6, RZ, 0x1, !P0 ; /* 0x00000001ff067807 */
/* 0x000fca0004000000 */
/*0420*/ IMAD.MOV R6, RZ, RZ, -R6 ; /* 0x000000ffff067224 */
/* 0x000fca00078e0a06 */
/*0430*/ ISETP.GE.AND P0, PT, R6, RZ, PT ; /* 0x000000ff0600720c */
/* 0x000fe40003f06270 */
/*0440*/ IADD3 R6, R5, -0xfc, RZ ; /* 0xffffff0405067810 */
/* 0x000fc80007ffe0ff */
/*0450*/ SHF.R.U32.HI R5, RZ, R6, R9 ; /* 0x00000006ff057219 */
/* 0x000fce0000011609 */
/*0460*/ @!P0 IADD3 R5, R5, 0x1, RZ ; /* 0x0000000105058810 */
/* 0x000fca0007ffe0ff */
/*0470*/ @!P1 IMAD.SHL.U32 R5, R5, 0x2, RZ ; /* 0x0000000205059824 */
/* 0x000fca00078e00ff */
/*0480*/ LOP3.LUT R5, R5, 0x80000000, R4, 0xf8, !PT ; /* 0x8000000005057812 */
/* 0x000fe200078ef804 */
/*0490*/ BRA 0x4b0 ; /* 0x0000001000007947 */
/* 0x000fea0003800000 */
/*04a0*/ MUFU.RCP R5, R4 ; /* 0x0000000400057308 */
/* 0x0000640000001000 */
/*04b0*/ BSYNC B1 ; /* 0x0000000000017941 */
/* 0x000fea0003800000 */
/*04c0*/ IMAD.MOV.U32 R6, RZ, RZ, R5 ; /* 0x000000ffff067224 */
/* 0x002fe400078e0005 */
/*04d0*/ IMAD.MOV.U32 R4, RZ, RZ, R0 ; /* 0x000000ffff047224 */
/* 0x001fe400078e0000 */
/*04e0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x0 ; /* 0x00000000ff057424 */
/* 0x000fc800078e00ff */
/*04f0*/ RET.REL.NODEC R4 0x0 ; /* 0xfffffb0004007950 */
/* 0x000fea0003c3ffff */
/*0500*/ BRA 0x500; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0510*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0520*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0530*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0540*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0550*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0560*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0570*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0580*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0590*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z16reciprocalKernelPfj
.globl _Z16reciprocalKernelPfj
.p2align 8
.type _Z16reciprocalKernelPfj,@function
_Z16reciprocalKernelPfj:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x1c
s_load_b32 s3, s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_u32_e64 s3, v1
s_cbranch_execz .LBB0_2
s_load_b64 s[0:1], s[0:1], 0x0
v_mov_b32_e32 v2, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_load_b32 v2, v[0:1], off
s_waitcnt vmcnt(0)
v_div_scale_f32 v3, null, v2, v2, 1.0
v_rcp_f32_e32 v4, v3
s_waitcnt_depctr 0xfff
v_fma_f32 v5, -v3, v4, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v4, v5, v4
v_div_scale_f32 v5, vcc_lo, 1.0, v2, 1.0
v_mul_f32_e32 v6, v5, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v7, -v3, v6, v5
v_fmac_f32_e32 v6, v7, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v3, -v3, v6, v5
v_div_fmas_f32 v3, v3, v4, v6
s_delay_alu instid0(VALU_DEP_1)
v_div_fixup_f32 v2, v3, v2, 1.0
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z16reciprocalKernelPfj
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 8
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z16reciprocalKernelPfj, .Lfunc_end0-_Z16reciprocalKernelPfj
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: by_value
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
.size: 2
.value_kind: hidden_group_size_x
- .offset: 30
.size: 2
.value_kind: hidden_group_size_y
- .offset: 32
.size: 2
.value_kind: hidden_group_size_z
- .offset: 34
.size: 2
.value_kind: hidden_remainder_x
- .offset: 36
.size: 2
.value_kind: hidden_remainder_y
- .offset: 38
.size: 2
.value_kind: hidden_remainder_z
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 80
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z16reciprocalKernelPfj
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z16reciprocalKernelPfj.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 8
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000306c1_00000000-6_reciprocalKernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z37__device_stub__Z16reciprocalKernelPfjPfj
.type _Z37__device_stub__Z16reciprocalKernelPfjPfj, @function
_Z37__device_stub__Z16reciprocalKernelPfjPfj:
.LFB2051:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movl %esi, 4(%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
leaq 4(%rsp), %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z16reciprocalKernelPfj(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z37__device_stub__Z16reciprocalKernelPfjPfj, .-_Z37__device_stub__Z16reciprocalKernelPfjPfj
.globl _Z16reciprocalKernelPfj
.type _Z16reciprocalKernelPfj, @function
_Z16reciprocalKernelPfj:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z37__device_stub__Z16reciprocalKernelPfjPfj
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z16reciprocalKernelPfj, .-_Z16reciprocalKernelPfj
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z16reciprocalKernelPfj"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z16reciprocalKernelPfj(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "reciprocalKernel.hip"
.globl _Z31__device_stub__reciprocalKernelPfj # -- Begin function _Z31__device_stub__reciprocalKernelPfj
.p2align 4, 0x90
.type _Z31__device_stub__reciprocalKernelPfj,@function
_Z31__device_stub__reciprocalKernelPfj: # @_Z31__device_stub__reciprocalKernelPfj
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movl %esi, 4(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 4(%rsp), %rax
movq %rax, 72(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z16reciprocalKernelPfj, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z31__device_stub__reciprocalKernelPfj, .Lfunc_end0-_Z31__device_stub__reciprocalKernelPfj
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z16reciprocalKernelPfj, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z16reciprocalKernelPfj,@object # @_Z16reciprocalKernelPfj
.section .rodata,"a",@progbits
.globl _Z16reciprocalKernelPfj
.p2align 3, 0x0
_Z16reciprocalKernelPfj:
.quad _Z31__device_stub__reciprocalKernelPfj
.size _Z16reciprocalKernelPfj, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z16reciprocalKernelPfj"
.size .L__unnamed_1, 24
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z31__device_stub__reciprocalKernelPfj
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z16reciprocalKernelPfj
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | extern "C"
__global__ void math_acos(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = acos(x[id]);
}
}
extern "C"
__global__ void math_acosh(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = acosh(x[id]);
}
}
extern "C"
__global__ void math_asin(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = asin(x[id]);
}
}
extern "C"
__global__ void math_asinh(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = asinh(x[id]);
}
}
extern "C"
__global__ void math_atan(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = atan(x[id]);
}
}
extern "C"
__global__ void math_atanh(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = atanh(x[id]);
}
}
extern "C"
__global__ void math_cbrt(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = cbrt(x[id]);
}
}
extern "C"
__global__ void math_ceil(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = ceil(x[id]);
}
}
extern "C"
__global__ void math_cos(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = cos(x[id]);
}
}
extern "C"
__global__ void math_cosh(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = cosh(x[id]);
}
}
extern "C"
__global__ void math_cospi(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = cospi(x[id]);
}
}
extern "C"
__global__ void math_cyl_bessel_i0(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = cyl_bessel_i0(x[id]);
}
}
extern "C"
__global__ void math_cyl_bessel_i1(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = cyl_bessel_i1(x[id]);
}
}
extern "C"
__global__ void math_erf(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = erf(x[id]);
}
}
extern "C"
__global__ void math_erfc(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = erfc(x[id]);
}
}
extern "C"
__global__ void math_erfcinv(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = erfcinv(x[id]);
}
}
extern "C"
__global__ void math_erfcx(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = erfcx(x[id]);
}
}
extern "C"
__global__ void math_erfinv(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = erfinv(x[id]);
}
}
extern "C"
__global__ void math_exp(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = exp(x[id]);
}
}
extern "C"
__global__ void math_exp10(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = exp10(x[id]);
}
}
extern "C"
__global__ void math_exp2(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = exp2(x[id]);
}
}
extern "C"
__global__ void math_expm1(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = expm1(x[id]);
}
}
extern "C"
__global__ void math_fabs(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = fabs(x[id]);
}
}
extern "C"
__global__ void math_floor(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = floor(x[id]);
}
}
extern "C"
__global__ void math_j0(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = j0(x[id]);
}
}
extern "C"
__global__ void math_j1(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = j1(x[id]);
}
}
extern "C"
__global__ void math_lgamma(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = lgamma(x[id]);
}
}
extern "C"
__global__ void math_log(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = log(x[id]);
}
}
extern "C"
__global__ void math_log10(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = log10(x[id]);
}
}
extern "C"
__global__ void math_log1p(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = log1p(x[id]);
}
}
extern "C"
__global__ void math_log2(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = log2(x[id]);
}
}
extern "C"
__global__ void math_logb(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = logb(x[id]);
}
}
extern "C"
__global__ void math_nearbyint(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = nearbyint(x[id]);
}
}
extern "C"
__global__ void math_normcdf(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = normcdf(x[id]);
}
}
extern "C"
__global__ void math_normcdfinv(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = normcdfinv(x[id]);
}
}
extern "C"
__global__ void math_rcbrt(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = rcbrt(x[id]);
}
}
extern "C"
__global__ void math_rint(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = rint(x[id]);
}
}
extern "C"
__global__ void math_round(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = round(x[id]);
}
}
extern "C"
__global__ void math_rsqrt(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = rsqrt(x[id]);
}
}
extern "C"
__global__ void math_sin(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = sin(x[id]);
}
}
extern "C"
__global__ void math_sinh(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = sinh(x[id]);
}
}
extern "C"
__global__ void math_sinpi(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = sinpi(x[id]);
}
}
extern "C"
__global__ void math_sqrt(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = sqrt(x[id]);
}
}
extern "C"
__global__ void math_tan(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = tan(x[id]);
}
}
extern "C"
__global__ void math_tanh(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = tanh(x[id]);
}
}
extern "C"
__global__ void math_tgamma(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = tgamma(x[id]);
}
}
extern "C"
__global__ void math_trunc(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = trunc(x[id]);
}
}
extern "C"
__global__ void math_y0(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = y0(x[id]);
}
}
extern "C"
__global__ void math_y1(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = y1(x[id]);
}
}
extern "C"
__global__ void math_atan2(size_t n, double *result, double *x, double *y) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = atan2(x[id],y[id]);
}
}
extern "C"
__global__ void math_copysign(size_t n, double *result, double *x, double *y) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = copysign(x[id],y[id]);
}
}
extern "C"
__global__ void math_fdim(size_t n, double *result, double *x, double *y) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = fdim(x[id],y[id]);
}
}
extern "C"
__global__ void math_fmin(size_t n, double *result, double *x, double *y) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = fmin(x[id],y[id]);
}
}
extern "C"
__global__ void math_fmod(size_t n, double *result, double *x, double *y) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = fmod(x[id],y[id]);
}
}
extern "C"
__global__ void math_nextafter(size_t n, double *result, double *x, double *y) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = nextafter(x[id],y[id]);
}
}
extern "C"
__global__ void math_pow(size_t n, double *result, double *x, double *y) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = pow(x[id],y[id]);
}
}
extern "C"
__global__ void math_remainder(size_t n, double *result, double *x, double *y) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = remainder(x[id],y[id]);
}
}
extern "C"
__global__ void math_rhypot(size_t n, double *result, double *x, double *y) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = rhypot(x[id],y[id]);
}
} | #include <hip/hip_runtime.h>
extern "C"
__global__ void math_acos(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = acos(x[id]);
}
}
extern "C"
__global__ void math_acosh(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = acosh(x[id]);
}
}
extern "C"
__global__ void math_asin(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = asin(x[id]);
}
}
extern "C"
__global__ void math_asinh(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = asinh(x[id]);
}
}
extern "C"
__global__ void math_atan(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = atan(x[id]);
}
}
extern "C"
__global__ void math_atanh(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = atanh(x[id]);
}
}
extern "C"
__global__ void math_cbrt(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = cbrt(x[id]);
}
}
extern "C"
__global__ void math_ceil(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = ceil(x[id]);
}
}
extern "C"
__global__ void math_cos(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = cos(x[id]);
}
}
extern "C"
__global__ void math_cosh(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = cosh(x[id]);
}
}
extern "C"
__global__ void math_cospi(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = cospi(x[id]);
}
}
extern "C"
__global__ void math_cyl_bessel_i0(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = cyl_bessel_i0(x[id]);
}
}
extern "C"
__global__ void math_cyl_bessel_i1(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = cyl_bessel_i1(x[id]);
}
}
extern "C"
__global__ void math_erf(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = erf(x[id]);
}
}
extern "C"
__global__ void math_erfc(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = erfc(x[id]);
}
}
extern "C"
__global__ void math_erfcinv(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = erfcinv(x[id]);
}
}
extern "C"
__global__ void math_erfcx(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = erfcx(x[id]);
}
}
extern "C"
__global__ void math_erfinv(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = erfinv(x[id]);
}
}
extern "C"
__global__ void math_exp(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = exp(x[id]);
}
}
extern "C"
__global__ void math_exp10(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = exp10(x[id]);
}
}
extern "C"
__global__ void math_exp2(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = exp2(x[id]);
}
}
extern "C"
__global__ void math_expm1(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = expm1(x[id]);
}
}
extern "C"
__global__ void math_fabs(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = fabs(x[id]);
}
}
extern "C"
__global__ void math_floor(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = floor(x[id]);
}
}
extern "C"
__global__ void math_j0(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = j0(x[id]);
}
}
extern "C"
__global__ void math_j1(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = j1(x[id]);
}
}
extern "C"
__global__ void math_lgamma(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = lgamma(x[id]);
}
}
extern "C"
__global__ void math_log(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = log(x[id]);
}
}
extern "C"
__global__ void math_log10(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = log10(x[id]);
}
}
extern "C"
__global__ void math_log1p(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = log1p(x[id]);
}
}
extern "C"
__global__ void math_log2(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = log2(x[id]);
}
}
extern "C"
__global__ void math_logb(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = logb(x[id]);
}
}
extern "C"
__global__ void math_nearbyint(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = nearbyint(x[id]);
}
}
extern "C"
__global__ void math_normcdf(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = normcdf(x[id]);
}
}
extern "C"
__global__ void math_normcdfinv(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = normcdfinv(x[id]);
}
}
extern "C"
__global__ void math_rcbrt(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = rcbrt(x[id]);
}
}
extern "C"
__global__ void math_rint(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = rint(x[id]);
}
}
extern "C"
__global__ void math_round(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = round(x[id]);
}
}
extern "C"
__global__ void math_rsqrt(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = rsqrt(x[id]);
}
}
extern "C"
__global__ void math_sin(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = sin(x[id]);
}
}
extern "C"
__global__ void math_sinh(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = sinh(x[id]);
}
}
extern "C"
__global__ void math_sinpi(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = sinpi(x[id]);
}
}
extern "C"
__global__ void math_sqrt(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = sqrt(x[id]);
}
}
extern "C"
__global__ void math_tan(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = tan(x[id]);
}
}
extern "C"
__global__ void math_tanh(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = tanh(x[id]);
}
}
extern "C"
__global__ void math_tgamma(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = tgamma(x[id]);
}
}
extern "C"
__global__ void math_trunc(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = trunc(x[id]);
}
}
extern "C"
__global__ void math_y0(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = y0(x[id]);
}
}
extern "C"
__global__ void math_y1(size_t n, double *result, double *x) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = y1(x[id]);
}
}
extern "C"
__global__ void math_atan2(size_t n, double *result, double *x, double *y) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = atan2(x[id],y[id]);
}
}
extern "C"
__global__ void math_copysign(size_t n, double *result, double *x, double *y) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = copysign(x[id],y[id]);
}
}
extern "C"
__global__ void math_fdim(size_t n, double *result, double *x, double *y) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = fdim(x[id],y[id]);
}
}
extern "C"
__global__ void math_fmin(size_t n, double *result, double *x, double *y) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = fmin(x[id],y[id]);
}
}
extern "C"
__global__ void math_fmod(size_t n, double *result, double *x, double *y) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = fmod(x[id],y[id]);
}
}
extern "C"
__global__ void math_nextafter(size_t n, double *result, double *x, double *y) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = nextafter(x[id],y[id]);
}
}
extern "C"
__global__ void math_pow(size_t n, double *result, double *x, double *y) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = pow(x[id],y[id]);
}
}
extern "C"
__global__ void math_remainder(size_t n, double *result, double *x, double *y) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = remainder(x[id],y[id]);
}
}
extern "C"
__global__ void math_rhypot(size_t n, double *result, double *x, double *y) {
int id = blockIdx.x * blockDim.x + threadIdx.x;
if (id < n)
{
result[id] = rhypot(x[id],y[id]);
}
} |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#include <stdbool.h>
#include <cuda.h>
#include <time.h>
#define THREADSPERBLOCK 64
// graph
struct edge{
int v;
int u;
int weight;
};
struct graph{
int num_edges;
int num_vertices;
struct edge* edges;
};
// bipartite graph
struct b_vertex_a{
int v;
int small_edge; // don't know what this is for
};
struct b_vertex_b{
int e; // edge number
};
struct b_edge{
int v;
int u;
int cv;
int weight;
};
struct b_graph{
int num_vertex_a;
int num_vertex_b;
int num_bipartite_edges;
struct b_vertex_a* vertices_a;
struct b_vertex_b* vertices_b;
struct b_edge* edges;
};
// strut
struct strut_edge{
int v;
int u; // edge number index
int cv; // correspondent vertex
};
struct strut_u_vertex{
int degree; // degree in struts
int v1;
int v2;
int weight;
};
struct strut{
int num_v; // num of bipartite vertices
int num_u; // num of u vertices adjacent to strut edge
int num_strut_edges; // same number as num_v
struct strut_edge* edges;
struct strut_u_vertex* vertices_u; // u vertices - 0 value indicates not in strut, value > 0 indicates how many strut edges it is connected to
};
void get_graph(struct graph* og_graph, char* input);
__global__ void get_bipartite_graph(int num_edges, int num_vertices, struct edge* graphEdges, struct b_vertex_a* vetices_a, struct b_vertex_b* vetices_b, struct b_edge* bg_graphEdges) ;
__global__ void get_smallest_edges(int bp_num_edges, int num_smallest_edges, struct b_edge* bg_graphEdges, int* smallest_weights, int* smallest_edges);
__global__ void mst_edges_init(int og_num_edges, bool *mst_edges);
__global__ void get_mst_edges(int num_smallest_edges, int* smallest_edges, struct b_edge* bg_graphEdges, bool *mst_edges);
__global__ void get_num_mst(int og_num_edges, bool *mst_edges, int* num_mst);
// strut stuff
__global__ void get_strut_edges(int bg_num_vertices, int* smallest_edges, struct b_edge* bg_graphEdges, strut_edge* strut_edges);
__global__ void strut_u_init(int bg_num_vertex_b, struct strut_u_vertex* vertices_u);
__global__ void get_strut_u_degree(int num_strut_edges, strut_edge* strut_edges, struct strut_u_vertex* vertices_u);
__global__ void get_strut_u_vertices(int bg_num_edges, struct b_edge* bg_graphEdges, struct strut_u_vertex* vertices_u);
__global__ void get_zero_diff_num(int bg_num_vertex_b, struct strut_u_vertex* vertices_u, int* zero_diff_edges);
__global__ void super_vertices_init(int num_strut_vertices, int* super_vertices);
__global__ void get_new_bg_vertex_b(int num_bg_vertexb, int* super_vertices, struct strut_u_vertex* vertices_u, int* new_vertex_b, int* num_newbg_vertexb);
__global__ void prefixCopy(int prefixNum, int* old_prefix, int *new_prefix);
__global__ void getPrefixSum(int* entries, int* entriesC, int d);
__global__ void get_super_vertices(int num_strut_vertices, strut_edge* strut_edges, struct strut_u_vertex* vertices_u, int* super_vertices);
__global__ void get_new_bg_edges(int num_bg_vertex_b, int* new_bg_edges, int* prefixSum, struct strut_u_vertex* vertices_u, int* super_vertices, struct b_edge* bg_graphEdges, int * max_super_vertex);
__global__ void init_smallest_edges_weights(int num_edges, int *smallest_weights, int* smallest_edges);
/* NOTES:
- Remember to free all malloced and cuda malloced variables
- Comment out debugging statements
- Output to file
- find sequential algorithm that outputs result in same way
- compare results with that
- Time the algorithm - put in output
- documentation
- read piazza and term project info for documentation
- prep for presentation
- submit on github - ask chonyang and email garg by thursday morning
*/
// driver
int main(int argc, char** argv){
if(argc != 3){
printf("mst: incorrect formatting\n");
printf("Valid input: mst.out <Input file name> <Output file name>\n");
return 0;
}
//***** ACQUIRE INPUT GRAPH *****//
struct graph og_graph; // input
get_graph(&og_graph, argv[1]);
//debugging
// printf("Graph:\n");
// printf("vertices:%d edges:%d\n",og_graph.num_vertices, og_graph.num_edges);
// for(int i = 0; i < og_graph.num_edges; i++){
// printf("index:%d - %d %d %d\n", i, og_graph.edges[i].v, og_graph.edges[i].u, og_graph.edges[i].weight);
// }
//***** CREATE BIPARTITE GRAPH *****//
struct b_graph bg_graph;
bg_graph.num_vertex_a = og_graph.num_vertices;
bg_graph.num_vertex_b = og_graph.num_edges;
bg_graph.num_bipartite_edges = og_graph.num_edges * 2;
// allocate GPU array
cudaMalloc((void**) &(bg_graph.vertices_a), bg_graph.num_vertex_a * sizeof(struct b_vertex_a));
cudaMalloc((void**) &(bg_graph.vertices_b), bg_graph.num_vertex_b * sizeof(struct b_vertex_b));
cudaMalloc((void**) &(bg_graph.edges), bg_graph.num_bipartite_edges * sizeof(struct b_edge));
struct edge* d_og_edges = NULL;
cudaMalloc((void**) &(d_og_edges), og_graph.num_edges * sizeof(struct edge));
cudaMemcpy(d_og_edges, og_graph.edges, og_graph.num_edges*sizeof(struct edge), cudaMemcpyHostToDevice);
get_bipartite_graph<<<(og_graph.num_edges + THREADSPERBLOCK-1)/THREADSPERBLOCK, THREADSPERBLOCK>>>(og_graph.num_edges, og_graph.num_vertices, d_og_edges, bg_graph.vertices_a, bg_graph.vertices_b, bg_graph.edges);
// debugging
struct b_graph debugging;
debugging.num_vertex_a = og_graph.num_vertices;
debugging.num_vertex_b = og_graph.num_edges;
debugging.num_bipartite_edges = og_graph.num_edges * 2;
debugging.vertices_a = (struct b_vertex_a*) malloc(debugging.num_vertex_a * sizeof(struct b_vertex_a));
debugging.vertices_b = (struct b_vertex_b*) malloc(debugging.num_vertex_b * sizeof(struct b_vertex_b));
debugging.edges = (struct b_edge*) malloc(debugging.num_bipartite_edges * sizeof(struct b_edge));
cudaMemcpy(debugging.vertices_a, bg_graph.vertices_a, debugging.num_vertex_a * sizeof(struct b_vertex_a), cudaMemcpyDeviceToHost);
cudaMemcpy(debugging.vertices_b, bg_graph.vertices_b, debugging.num_vertex_b * sizeof(struct b_vertex_b), cudaMemcpyDeviceToHost);
cudaMemcpy(debugging.edges, bg_graph.edges, debugging.num_bipartite_edges * sizeof(struct b_edge), cudaMemcpyDeviceToHost);
// printf("Bipartite Graph:\n");
// printf("verticesA: %d, verticesB: %d, edges: %d\n", debugging.num_vertex_a, debugging.num_vertex_b, debugging.num_bipartite_edges);
// for(int i = 0; i < debugging.num_bipartite_edges; i++){
// printf("index: %d - %d %d %d %d\n", i, debugging.edges[i].v, debugging.edges[i].u, debugging.edges[i].cv, debugging.edges[i].weight);
// }
free(debugging.vertices_a);
free(debugging.vertices_b);
free(debugging.edges);
//***** SMALLEST EDGE WEIGHT EDGE FOR EACH VERTEX IN BG_GRAPH *****//
int* smallest_weights = NULL;
int* smallest_edges = NULL;
//***** GET SOLUTION *****//
bool* d_mst_edges = NULL;
bool* mst_edges = NULL;
mst_edges = (bool*) malloc(og_graph.num_edges * sizeof(bool));
// don't malloc again for this variable
cudaMalloc((void**) &(d_mst_edges), og_graph.num_edges* sizeof(bool));
mst_edges_init<<<(og_graph.num_edges + THREADSPERBLOCK-1)/THREADSPERBLOCK, THREADSPERBLOCK>>>(og_graph.num_edges, d_mst_edges);
int * solution_size = (int*) malloc (sizeof(int));
*solution_size = 0;
int* d_solutionSize = NULL;
cudaMalloc((void**) &(d_solutionSize),sizeof(int));
cudaMemcpy(d_solutionSize, solution_size, sizeof(int), cudaMemcpyHostToDevice);
int* max_super_vertex = (int*) malloc (sizeof(int));
*max_super_vertex = bg_graph.num_vertex_a;
while(*solution_size < (og_graph.num_vertices - 1)){
// cudaMalloc((void**) &(smallest_weights), bg_graph.num_vertex_a * sizeof(int));
// cudaMalloc((void**) &(smallest_edges), bg_graph.num_vertex_a * sizeof(int));
//get_smallest_edges<<<(bg_graph.num_bipartite_edges + THREADSPERBLOCK-1)/THREADSPERBLOCK, THREADSPERBLOCK>>>(bg_graph.num_bipartite_edges, bg_graph.num_vertex_a, bg_graph.edges, smallest_weights, smallest_edges);
cudaMalloc((void**) &(smallest_weights), *max_super_vertex * sizeof(int));
cudaMalloc((void**) &(smallest_edges), *max_super_vertex * sizeof(int));
init_smallest_edges_weights<<<(*max_super_vertex + THREADSPERBLOCK-1)/THREADSPERBLOCK, THREADSPERBLOCK>>>(*max_super_vertex, smallest_weights, smallest_edges);
get_smallest_edges<<<(bg_graph.num_bipartite_edges + THREADSPERBLOCK-1)/THREADSPERBLOCK, THREADSPERBLOCK>>>(bg_graph.num_bipartite_edges,*max_super_vertex, bg_graph.edges, smallest_weights, smallest_edges);
// debugging
int* debug_smallest_weights = NULL;
debug_smallest_weights = (int*) malloc(*max_super_vertex * sizeof(int));
cudaMemcpy(debug_smallest_weights, smallest_weights, *max_super_vertex * sizeof(int), cudaMemcpyDeviceToHost);
// for(int i = 0; i < *max_super_vertex; i++){
// printf("bg index of smallest weight: %d\n", debug_smallest_weights[i]);
// }
int* debug_smallest_edges = NULL;
debug_smallest_edges = (int*) malloc(*max_super_vertex * sizeof(int));
cudaMemcpy(debug_smallest_edges, smallest_edges, *max_super_vertex * sizeof(int), cudaMemcpyDeviceToHost);
// for(int i = 0; i < *max_super_vertex; i++){
// printf("bg index of smallest edge: %d\n", debug_smallest_edges[i]);
// }
get_mst_edges<<<(*max_super_vertex + THREADSPERBLOCK-1)/THREADSPERBLOCK, THREADSPERBLOCK>>>(*max_super_vertex , smallest_edges, bg_graph.edges, d_mst_edges);
get_num_mst<<<(og_graph.num_edges + THREADSPERBLOCK-1)/THREADSPERBLOCK, THREADSPERBLOCK>>>(og_graph.num_edges , d_mst_edges, d_solutionSize);
// debugging
// printf("MST:\n");
cudaMemcpy(mst_edges, d_mst_edges, og_graph.num_edges * sizeof(bool), cudaMemcpyDeviceToHost);
// for(int i = 0; i < og_graph.num_edges; i++){
// if(mst_edges[i] == true){
// //printf("mst edges index: %d\n", i);
// printf("index: %d - %d %d %d\n", i, og_graph.edges[i].v, og_graph.edges[i].u, og_graph.edges[i].weight);
// }
// }
cudaMemcpy(solution_size, d_solutionSize, sizeof(int), cudaMemcpyDeviceToHost);
// printf("Num MST edges found: %d\n",*solution_size);
if(*solution_size < (og_graph.num_vertices - 1)){
//***** GET STRUT *****//
struct strut new_strut;
new_strut.num_v = bg_graph.num_vertex_a;
new_strut.num_u = bg_graph.num_vertex_b;
new_strut.num_strut_edges = bg_graph.num_vertex_a;
struct strut_edge* d_strut_edges = NULL;
cudaMalloc((void**) &(d_strut_edges), new_strut.num_v * sizeof(struct strut_edge));
get_strut_edges<<<((bg_graph.num_vertex_a) + THREADSPERBLOCK-1)/THREADSPERBLOCK, THREADSPERBLOCK>>>(bg_graph.num_vertex_a, smallest_edges, bg_graph.edges, d_strut_edges);
// debugging
struct strut_edge* strut_edges = (struct strut_edge* ) malloc(new_strut.num_v * sizeof(struct strut_edge));
cudaMemcpy(strut_edges, d_strut_edges, new_strut.num_v * sizeof(struct strut_edge), cudaMemcpyDeviceToHost);
// printf("STRUT EDGES:\n");
// for(int i = 0; i < new_strut.num_v ; i++){
// printf("%d %d %d\n", strut_edges[i].v,strut_edges[i].u, strut_edges[i].cv);
// }
// getting strut_u
struct strut_u_vertex* d_vertices_u = NULL;
cudaMalloc((void**) &(d_vertices_u), new_strut.num_u * sizeof(struct strut_u_vertex));
strut_u_init<<<((new_strut.num_u) + THREADSPERBLOCK-1)/THREADSPERBLOCK, THREADSPERBLOCK>>>(new_strut.num_u, d_vertices_u);
get_strut_u_degree<<<((new_strut.num_v) + THREADSPERBLOCK-1)/THREADSPERBLOCK, THREADSPERBLOCK>>>(new_strut.num_v, d_strut_edges, d_vertices_u);
get_strut_u_vertices<<<((bg_graph.num_bipartite_edges) + THREADSPERBLOCK-1)/THREADSPERBLOCK, THREADSPERBLOCK>>>(bg_graph.num_bipartite_edges, bg_graph.edges, d_vertices_u);
// debugging
struct strut_u_vertex* vertices_u = (struct strut_u_vertex* ) malloc(new_strut.num_u * sizeof(struct strut_u_vertex));
cudaMemcpy(vertices_u, d_vertices_u, new_strut.num_u * sizeof(struct strut_u_vertex), cudaMemcpyDeviceToHost);
// printf("STRUT U VERTICES DEGREE:\n");
// for(int i = 0; i < new_strut.num_u ; i++){
// printf("index: %d degree: %d v1: %d v2: %d\n",i, vertices_u[i].degree, vertices_u[i].v1, vertices_u[i].v2);
// }
/* ZERO DIFF */
int* d_zero_diff_edges = NULL;
cudaMalloc((void**) &(d_zero_diff_edges), new_strut.num_u * sizeof(int));
get_zero_diff_num<<<((new_strut.num_u) + THREADSPERBLOCK-1)/THREADSPERBLOCK, THREADSPERBLOCK>>>(new_strut.num_u, d_vertices_u, d_zero_diff_edges);
// debugging
int*zero_diff_edges = (int*) malloc (sizeof(int));
cudaMemcpy(zero_diff_edges, d_zero_diff_edges, sizeof(int), cudaMemcpyDeviceToHost);
// printf("zero diff edges: %d\n", *zero_diff_edges);
// /*SUPER VERTEX*/
int* d_super_vertices = NULL;
cudaMalloc((void**) &(d_super_vertices), bg_graph.num_vertex_a* sizeof(int));
super_vertices_init<<<((bg_graph.num_vertex_a) + THREADSPERBLOCK-1)/THREADSPERBLOCK, THREADSPERBLOCK>>>(bg_graph.num_vertex_a, d_super_vertices);
int* super_vertices = (int*) malloc(bg_graph.num_vertex_a* sizeof(int));
cudaMemcpy(super_vertices, d_super_vertices,bg_graph.num_vertex_a* sizeof(int), cudaMemcpyDeviceToHost);
for(int i = 0; i < new_strut.num_u ; i++){
int super_vertex;
if(vertices_u[i].degree > 0){ // if incident to strut edge
if(super_vertices[vertices_u[i].v1 - 1] < vertices_u[i].v1){
super_vertex = super_vertices[vertices_u[i].v1 - 1];
super_vertices[vertices_u[i].v1 - 1] = super_vertex;
super_vertices[vertices_u[i].v2 - 1] = super_vertex;
}
else{
super_vertex = vertices_u[i].v1;
super_vertices[vertices_u[i].v1 - 1] = super_vertex;
super_vertices[vertices_u[i].v2 - 1] = super_vertex;
}
}
}
cudaMemcpy(d_super_vertices, super_vertices,bg_graph.num_vertex_a* sizeof(int), cudaMemcpyHostToDevice);
// debugging
// printf("Supervertices\n:");
// for(int i = 0; i < bg_graph.num_vertex_a ; i++){
// printf("vertex: %d supervertex: %d\n", i+1, super_vertices[i]);
// }
/******** CREATING NEW BIPARTITE GRAPH **********/
struct b_graph new_bg_graph;
new_bg_graph.num_vertex_a = *zero_diff_edges;
int* new_num_vertex_b = NULL;
cudaMalloc((void**) &(new_num_vertex_b), sizeof(int));
int* new_vertex_b = NULL;
cudaMalloc((void**) &(new_vertex_b), bg_graph.num_vertex_b * sizeof(int));
get_new_bg_vertex_b<<<((bg_graph.num_vertex_b) + THREADSPERBLOCK-1)/THREADSPERBLOCK, THREADSPERBLOCK>>>(bg_graph.num_vertex_b, d_super_vertices,d_vertices_u, new_vertex_b, new_num_vertex_b);
// num_vertex_b and num_bipartite edges
cudaMemcpy(&new_bg_graph.num_vertex_b, new_num_vertex_b, sizeof(int), cudaMemcpyDeviceToHost);
new_bg_graph.num_bipartite_edges = new_bg_graph.num_vertex_b * 2;
// debugging
int* new_vertex_b_debug = (int*)malloc( bg_graph.num_vertex_b * sizeof(int));
cudaMemcpy(new_vertex_b_debug, new_vertex_b, bg_graph.num_vertex_b * sizeof(int), cudaMemcpyDeviceToHost);
// printf("New Bipartie edges to choose:\n");
// for(int i =0 ; i < bg_graph.num_vertex_b ; i++){
// printf("index: %d value: %d\n", i, new_vertex_b_debug[i]);
// }
// printf("New vertex b num: %d\n", new_bg_graph.num_vertex_b);
int* prefixSum = NULL;
cudaMalloc((void**) &(prefixSum), bg_graph.num_vertex_b * sizeof(int));
prefixCopy<<<((bg_graph.num_vertex_b) + THREADSPERBLOCK-1)/THREADSPERBLOCK, THREADSPERBLOCK>>>(bg_graph.num_vertex_b, new_vertex_b, prefixSum);
//get index of bipartite edges
int* d_prefix_helper = NULL;
cudaMalloc((void**) &(d_prefix_helper), bg_graph.num_vertex_b * sizeof(int));
/* prefix sum belloch scan */
int d = 1;
while(d<bg_graph.num_vertex_b){
getPrefixSum<<<(bg_graph.num_vertex_b + THREADSPERBLOCK-1)/THREADSPERBLOCK, THREADSPERBLOCK>>>(prefixSum, d_prefix_helper, d);
d = 2*d;
}
//debugging
// printf("prefix sum:\n");
// int* vertex_b_print = (int*) malloc( bg_graph.num_vertex_b * sizeof(int));
// cudaMemcpy(vertex_b_print, prefixSum, bg_graph.num_vertex_b * sizeof(int), cudaMemcpyDeviceToHost);
// for(int i = 0; i < bg_graph.num_vertex_b ; i++){
// printf("vertex: %d index: %d\n", i, vertex_b_print[i]);
// }
cudaMalloc((void**) &(new_bg_graph.edges), new_bg_graph.num_bipartite_edges * sizeof(struct b_edge));
int* d_max_super_vertex = NULL;
cudaMalloc((void**) &(d_max_super_vertex),sizeof(int));
get_new_bg_edges<<<(bg_graph.num_vertex_b + THREADSPERBLOCK-1)/THREADSPERBLOCK, THREADSPERBLOCK>>>(bg_graph.num_vertex_b , new_vertex_b, prefixSum, d_vertices_u, d_super_vertices, new_bg_graph.edges, d_max_super_vertex);
cudaMemcpy(max_super_vertex, d_max_super_vertex, sizeof(int), cudaMemcpyDeviceToHost);
// debugging
debugging.num_vertex_a = new_bg_graph.num_vertex_a;
debugging.num_vertex_b = new_bg_graph.num_vertex_b;
debugging.num_bipartite_edges = new_bg_graph.num_bipartite_edges ;
debugging.edges = (struct b_edge*) malloc(new_bg_graph.num_bipartite_edges * sizeof(struct b_edge));
cudaMemcpy(debugging.edges, new_bg_graph.edges, new_bg_graph.num_bipartite_edges * sizeof(struct b_edge), cudaMemcpyDeviceToHost);
// printf("New Bipartite Graph:\n");
// printf("verticesA: %d, verticesB: %d, edges: %d\n", debugging.num_vertex_a, debugging.num_vertex_b, debugging.num_bipartite_edges);
// for(int i = 0; i < debugging.num_bipartite_edges; i++){
// printf("index: %d - %d %d %d %d\n", i, debugging.edges[i].v, debugging.edges[i].u, debugging.edges[i].cv, debugging.edges[i].weight);
// }
bg_graph.num_vertex_a = new_bg_graph.num_vertex_a;
bg_graph.num_vertex_b = new_bg_graph.num_vertex_b;
bg_graph.num_bipartite_edges = new_bg_graph.num_bipartite_edges;
cudaFree(bg_graph.edges);
cudaMalloc((void**) &(bg_graph.edges), bg_graph.num_bipartite_edges * sizeof(struct b_edge));
cudaMemcpy(bg_graph.edges, debugging.edges, bg_graph.num_bipartite_edges * sizeof(struct b_edge), cudaMemcpyHostToDevice);
free(debug_smallest_weights);
free(debug_smallest_edges);
free(strut_edges);
free(vertices_u);
free(zero_diff_edges);
free(super_vertices);
free(new_vertex_b_debug);
cudaFree(d_prefix_helper);
cudaFree(prefixSum);
cudaFree(new_vertex_b);
cudaFree(new_num_vertex_b);
cudaFree(d_max_super_vertex);
cudaFree(d_super_vertices);
cudaFree(d_zero_diff_edges);
cudaFree(d_vertices_u);
cudaFree(new_num_vertex_b);
cudaFree(new_vertex_b);
cudaFree(d_strut_edges);
cudaFree(smallest_weights);
cudaFree(smallest_edges);
}
}
//printf("done with loop\n");
/*end of while loop*/
FILE *file;
file = fopen(argv[argc-1],"w+");
fprintf(file,"Input Graph\nVertices: %d Edges: %d\n", og_graph.num_vertices, og_graph.num_edges);
fprintf(file, "MST Edges:\n");
for(int i = 0; i < og_graph.num_edges; i++){
if(mst_edges[i] == true){
fprintf(file, "index: %d - v: %d u: %d weight: %d\n", i, og_graph.edges[i].v, og_graph.edges[i].u, og_graph.edges[i].weight);
}
}
fclose(file);
// malloc frees
free(max_super_vertex);
free(og_graph.edges);
free(mst_edges);
free(solution_size);
free(max_super_vertex);
// cuda malloc frees
cudaFree(d_solutionSize);
cudaFree(d_mst_edges);
cudaFree(mst_edges);
cudaFree(d_og_edges);
cudaFree(bg_graph.vertices_a);
cudaFree(bg_graph.vertices_b);
cudaFree(bg_graph.edges);
}
void get_graph(struct graph* og_graph, char* input){
FILE *file;
char buff[255];
int num_vertices;
int num_edges;
file = fopen(input , "r");
if(file == NULL){
perror(input);
exit(1);
}
else{
fscanf(file, "%s", buff);
num_vertices = atoi(buff);
fscanf(file, "%s", buff);
num_edges = atoi(buff);
(*og_graph).num_edges = num_edges;
(*og_graph).num_vertices = num_vertices;
(*og_graph).edges = (struct edge*) malloc(sizeof(struct edge) * num_edges);
for(int i = 0; i < num_edges; i++){
fscanf(file, "%s", buff);
(*og_graph).edges[i].v = atoi(buff);
fscanf(file, "%s", buff);
(*og_graph).edges[i].u = atoi(buff);
fscanf(file, "%s", buff);
(*og_graph).edges[i].weight = atoi(buff);
}
}
fclose(file);
}
__global__ void get_bipartite_graph(int num_edges, int num_vertices, struct edge* graphEdges, struct b_vertex_a* vertices_a, struct b_vertex_b* vertices_b, struct b_edge* bg_graphEdges) {
int edge = threadIdx.x + blockIdx.x * blockDim.x;
if(edge < num_edges){
// acquire two bipartite edges for each orginal graph edge
bg_graphEdges[2*edge].v = graphEdges[edge].v;
bg_graphEdges[2*edge].u = edge;
bg_graphEdges[2*edge].cv = 2*edge+1; // corresponding edge/vertex
bg_graphEdges[2*edge].weight = graphEdges[edge].weight;
bg_graphEdges[2*edge+1].v = graphEdges[edge].u;
bg_graphEdges[2*edge+1].u = edge;
bg_graphEdges[2*edge+1].cv = 2*edge; // corresponding edge/vertex
bg_graphEdges[2*edge+1].weight = graphEdges[edge].weight;
vertices_b[edge].e = edge;
if(edge < num_vertices)
vertices_a[edge].v = edge;
}
}
__global__ void init_smallest_edges_weights(int num_edges, int *smallest_weights, int* smallest_edges){
int edge = threadIdx.x + blockIdx.x * blockDim.x;
if(edge < num_edges){
smallest_weights[edge] = -1;
smallest_edges[edge] = -1;
}
}
// fills in smallest edges array with the index of smallest bipartite edges for each vertex (index of smallest_edges corresponds to vertex number) in graph
__global__ void get_smallest_edges(int bp_num_edges, int num_smallest_edges, struct b_edge* bg_graphEdges, int* smallest_weights, int* smallest_edges){
int edge = threadIdx.x + blockIdx.x * blockDim.x;
if(edge< bp_num_edges){
int index = bg_graphEdges[edge].v - 1;
// smallest_weights[index] = bg_graphEdges[edge].weight; // filler weight to compare with
smallest_weights[index] = INT_MAX;
__syncthreads(); // acquire all smallest weights
atomicMin(&(smallest_weights[index]), bg_graphEdges[edge].weight); // save actual smallest weight
__syncthreads(); // acquire all smallest weights
smallest_edges[index] = bp_num_edges - 1; // filler edge number to comapre with, max edge
// if(edge < num_smallest_edges){
// if(edge != index){
// smallest_weights[index] = -1;
// smallest_edges[index] = -1;
// }
// }
__syncthreads(); // acquire all smallest edges
if(bg_graphEdges[edge].weight == smallest_weights[index]) // save smallest edge if the the bg edge has same weight as smallest weight
//atomicMin(&(smallest_edges[index]), bg_graphEdges[edge].u);
atomicMin(&(smallest_edges[index]), edge);
}
}
// flags all edges to false
__global__ void mst_edges_init(int og_num_edges, bool *mst_edges){
int edge = threadIdx.x + blockIdx.x * blockDim.x;
if(edge < og_num_edges){
mst_edges[edge] = false;
}
}
// sets which edges go in mst
__global__ void get_mst_edges(int num_smallest_edges, int* smallest_edges, struct b_edge* bg_graphEdges, bool *mst_edges){
int edge = threadIdx.x + blockIdx.x * blockDim.x;
int bg_index;
int vertex;
if(edge < num_smallest_edges){
bg_index = smallest_edges[edge];
if(bg_index != -1){
vertex = bg_graphEdges[bg_index].u;
mst_edges[vertex] = true;
}
}
}
// gets num of mst edges in solution set
__global__ void get_num_mst(int og_num_edges, bool *mst_edges, int* num_mst){
int edge = threadIdx.x + blockIdx.x * blockDim.x;
if(edge < og_num_edges){
*num_mst = 0; // reset
__syncthreads();
if(mst_edges[edge] == true)
atomicAdd(num_mst, 1);
}
}
// makes the strut edges
__global__ void get_strut_edges(int bg_num_vertices, int* smallest_edges, struct b_edge* bg_graphEdges, strut_edge* strut_edges){
int bg_vertex = threadIdx.x + blockIdx.x * blockDim.x;
if(bg_vertex < bg_num_vertices){
strut_edges[bg_vertex].v = bg_vertex + 1; // vertex
strut_edges[bg_vertex].u = bg_graphEdges[smallest_edges[bg_vertex]].u; // edge index (u vertex)
strut_edges[bg_vertex].cv = bg_graphEdges[bg_graphEdges[smallest_edges[bg_vertex]].cv].v; // save vertex that is connected to same edge index (u vertex);
}
}
// init strut u vertices degree
__global__ void strut_u_init(int bg_num_vertex_b, struct strut_u_vertex* vertices_u){
int vertex_b = threadIdx.x + blockIdx.x * blockDim.x;
if(vertex_b < bg_num_vertex_b)
vertices_u[vertex_b].degree = 0;
}
// fill in degree of strut u vertices
__global__ void get_strut_u_degree(int num_strut_vertices, strut_edge* strut_edges, struct strut_u_vertex* vertices_u){
int strut_edge = threadIdx.x + blockIdx.x * blockDim.x;
if(strut_edge < num_strut_vertices){
atomicAdd(&(vertices_u[strut_edges[strut_edge].u]).degree, 1);
}
}
// fill in what vertices the vertices_u from the strut is connected
__global__ void get_strut_u_vertices(int bg_num_edges, struct b_edge* bg_graphEdges, struct strut_u_vertex* vertices_u){
int bg_edge = threadIdx.x + blockIdx.x * blockDim.x;
if(bg_edge < bg_num_edges){
if(bg_edge%2 == 0){ // only even edges
vertices_u[bg_graphEdges[bg_edge].u].v1 = bg_graphEdges[bg_edge].v;
vertices_u[bg_graphEdges[bg_edge].u].v2 = bg_graphEdges[bg_graphEdges[bg_edge].cv].v;
vertices_u[bg_graphEdges[bg_edge].u].weight = bg_graphEdges[bg_edge].weight;
}
}
}
// get number of zero difference vertrices u in strut
__global__ void get_zero_diff_num(int bg_num_vertex_b, struct strut_u_vertex* vertices_u, int* zero_diff_edges){
int vertex_b = threadIdx.x + blockIdx.x * blockDim.x;
if(vertex_b < bg_num_vertex_b){
if(vertices_u[vertex_b].degree == 2)
atomicAdd(zero_diff_edges, 1);
}
}
// initialize super vertices
__global__ void super_vertices_init(int num_strut_vertices, int* super_vertices){
int vertex = threadIdx.x + blockIdx.x * blockDim.x;
if(vertex < num_strut_vertices){
super_vertices[vertex] = vertex + 1;
}
}
// set which verticies_u will be in new bipartitie graph and get how many there are
__global__ void get_new_bg_vertex_b(int num_bg_vertexb, int* super_vertices, struct strut_u_vertex* vertices_u, int* new_vertex_b, int* num_newbg_vertexb){
int vertex = threadIdx.x + blockIdx.x * blockDim.x;
if(vertex < num_bg_vertexb){
new_vertex_b[vertex] = 0; // setting all to false
__syncthreads();
if(super_vertices[vertices_u[vertex].v1 - 1] != super_vertices[vertices_u[vertex].v2 - 1]){
new_vertex_b[vertex] = 1;
}
*num_newbg_vertexb = 0;
__syncthreads();
if(new_vertex_b[vertex] == 1)
atomicAdd(num_newbg_vertexb, 1);
}
}
// copy maker
__global__ void prefixCopy(int prefixNum, int* old_prefix, int *new_prefix){
int index = threadIdx.x + blockIdx.x * blockDim.x;
if(index < prefixNum){
new_prefix[index] = old_prefix[index];
}
}
__global__ void getPrefixSum(int* entries, int* entriesC, int d) {
int index = threadIdx.x + blockIdx.x * blockDim.x;
if(index >= d)
entriesC[index] = entries[index - d];
else
entriesC[index] = 0;
__syncthreads();
entries[index] = entries[index] + entriesC[index];
}
// makes new bipartite edges
__global__ void get_new_bg_edges(int num_bg_vertex_b, int* new_bg_edges, int* prefixSum, struct strut_u_vertex* vertices_u, int* super_vertices, struct b_edge* bg_graphEdges, int * max_super_vertex){
int index = threadIdx.x + blockIdx.x * blockDim.x;
int edge1;
int edge2;
if(index < num_bg_vertex_b){
if(new_bg_edges[index] == 1){
edge1 = (prefixSum[index] - 1) * 2;
edge2 = edge1+1;
bg_graphEdges[edge1].v = super_vertices[vertices_u[index].v1-1];
bg_graphEdges[edge1].u = index;
bg_graphEdges[edge1].cv = edge2;
bg_graphEdges[edge1].weight = vertices_u[index].weight;
bg_graphEdges[edge2].v = super_vertices[vertices_u[index].v2-1];
bg_graphEdges[edge2].u = index;
bg_graphEdges[edge2].cv = edge1;
bg_graphEdges[edge2].weight = vertices_u[index].weight;
atomicMax(max_super_vertex, super_vertices[vertices_u[index].v1-1]);
atomicMax(max_super_vertex, super_vertices[vertices_u[index].v2-1]);
}
}
}
// get what vertex each vertex is compacted to during compression of bipartite graph
__global__ void get_super_vertices(int num_strut_vertices, strut_edge* strut_edges, struct strut_u_vertex* vertices_u, int* super_vertices){
int strut_edge = threadIdx.x + blockIdx.x * blockDim.x;
int cv;
int min_cv;
if(strut_edge < num_strut_vertices){
min_cv = strut_edges[strut_edge].v;
// cv = strut_edges[strut_edge].cv;
// while(cv < min_cv){
// min_cv = cv;
// cv = strut_edges[cv-1].cv;
// }
if(vertices_u[strut_edges[strut_edge].u].v1 == min_cv)
cv = vertices_u[strut_edges[strut_edge].u].v2;
else
cv = vertices_u[strut_edges[strut_edge].u].v1;
while(cv < min_cv){
min_cv = cv;
if(vertices_u[strut_edges[strut_edge].u].v1 == min_cv)
cv = vertices_u[strut_edges[cv-1].u].v2;
else
cv = vertices_u[strut_edges[cv-1].u].v1;
}
super_vertices[strut_edge] = min_cv;
}
} | #include <stdio.h>
#include <stdlib.h>
#include <stdbool.h>
#include <hip/hip_runtime.h>
#include <time.h>
#define THREADSPERBLOCK 64
// graph
struct edge{
int v;
int u;
int weight;
};
struct graph{
int num_edges;
int num_vertices;
struct edge* edges;
};
// bipartite graph
struct b_vertex_a{
int v;
int small_edge; // don't know what this is for
};
struct b_vertex_b{
int e; // edge number
};
struct b_edge{
int v;
int u;
int cv;
int weight;
};
struct b_graph{
int num_vertex_a;
int num_vertex_b;
int num_bipartite_edges;
struct b_vertex_a* vertices_a;
struct b_vertex_b* vertices_b;
struct b_edge* edges;
};
// strut
struct strut_edge{
int v;
int u; // edge number index
int cv; // correspondent vertex
};
struct strut_u_vertex{
int degree; // degree in struts
int v1;
int v2;
int weight;
};
struct strut{
int num_v; // num of bipartite vertices
int num_u; // num of u vertices adjacent to strut edge
int num_strut_edges; // same number as num_v
struct strut_edge* edges;
struct strut_u_vertex* vertices_u; // u vertices - 0 value indicates not in strut, value > 0 indicates how many strut edges it is connected to
};
void get_graph(struct graph* og_graph, char* input);
__global__ void get_bipartite_graph(int num_edges, int num_vertices, struct edge* graphEdges, struct b_vertex_a* vetices_a, struct b_vertex_b* vetices_b, struct b_edge* bg_graphEdges) ;
__global__ void get_smallest_edges(int bp_num_edges, int num_smallest_edges, struct b_edge* bg_graphEdges, int* smallest_weights, int* smallest_edges);
__global__ void mst_edges_init(int og_num_edges, bool *mst_edges);
__global__ void get_mst_edges(int num_smallest_edges, int* smallest_edges, struct b_edge* bg_graphEdges, bool *mst_edges);
__global__ void get_num_mst(int og_num_edges, bool *mst_edges, int* num_mst);
// strut stuff
__global__ void get_strut_edges(int bg_num_vertices, int* smallest_edges, struct b_edge* bg_graphEdges, strut_edge* strut_edges);
__global__ void strut_u_init(int bg_num_vertex_b, struct strut_u_vertex* vertices_u);
__global__ void get_strut_u_degree(int num_strut_edges, strut_edge* strut_edges, struct strut_u_vertex* vertices_u);
__global__ void get_strut_u_vertices(int bg_num_edges, struct b_edge* bg_graphEdges, struct strut_u_vertex* vertices_u);
__global__ void get_zero_diff_num(int bg_num_vertex_b, struct strut_u_vertex* vertices_u, int* zero_diff_edges);
__global__ void super_vertices_init(int num_strut_vertices, int* super_vertices);
__global__ void get_new_bg_vertex_b(int num_bg_vertexb, int* super_vertices, struct strut_u_vertex* vertices_u, int* new_vertex_b, int* num_newbg_vertexb);
__global__ void prefixCopy(int prefixNum, int* old_prefix, int *new_prefix);
__global__ void getPrefixSum(int* entries, int* entriesC, int d);
__global__ void get_super_vertices(int num_strut_vertices, strut_edge* strut_edges, struct strut_u_vertex* vertices_u, int* super_vertices);
__global__ void get_new_bg_edges(int num_bg_vertex_b, int* new_bg_edges, int* prefixSum, struct strut_u_vertex* vertices_u, int* super_vertices, struct b_edge* bg_graphEdges, int * max_super_vertex);
__global__ void init_smallest_edges_weights(int num_edges, int *smallest_weights, int* smallest_edges);
/* NOTES:
- Remember to free all malloced and cuda malloced variables
- Comment out debugging statements
- Output to file
- find sequential algorithm that outputs result in same way
- compare results with that
- Time the algorithm - put in output
- documentation
- read piazza and term project info for documentation
- prep for presentation
- submit on github - ask chonyang and email garg by thursday morning
*/
// driver
int main(int argc, char** argv){
if(argc != 3){
printf("mst: incorrect formatting\n");
printf("Valid input: mst.out <Input file name> <Output file name>\n");
return 0;
}
//***** ACQUIRE INPUT GRAPH *****//
struct graph og_graph; // input
get_graph(&og_graph, argv[1]);
//debugging
// printf("Graph:\n");
// printf("vertices:%d edges:%d\n",og_graph.num_vertices, og_graph.num_edges);
// for(int i = 0; i < og_graph.num_edges; i++){
// printf("index:%d - %d %d %d\n", i, og_graph.edges[i].v, og_graph.edges[i].u, og_graph.edges[i].weight);
// }
//***** CREATE BIPARTITE GRAPH *****//
struct b_graph bg_graph;
bg_graph.num_vertex_a = og_graph.num_vertices;
bg_graph.num_vertex_b = og_graph.num_edges;
bg_graph.num_bipartite_edges = og_graph.num_edges * 2;
// allocate GPU array
hipMalloc((void**) &(bg_graph.vertices_a), bg_graph.num_vertex_a * sizeof(struct b_vertex_a));
hipMalloc((void**) &(bg_graph.vertices_b), bg_graph.num_vertex_b * sizeof(struct b_vertex_b));
hipMalloc((void**) &(bg_graph.edges), bg_graph.num_bipartite_edges * sizeof(struct b_edge));
struct edge* d_og_edges = NULL;
hipMalloc((void**) &(d_og_edges), og_graph.num_edges * sizeof(struct edge));
hipMemcpy(d_og_edges, og_graph.edges, og_graph.num_edges*sizeof(struct edge), hipMemcpyHostToDevice);
get_bipartite_graph<<<(og_graph.num_edges + THREADSPERBLOCK-1)/THREADSPERBLOCK, THREADSPERBLOCK>>>(og_graph.num_edges, og_graph.num_vertices, d_og_edges, bg_graph.vertices_a, bg_graph.vertices_b, bg_graph.edges);
// debugging
struct b_graph debugging;
debugging.num_vertex_a = og_graph.num_vertices;
debugging.num_vertex_b = og_graph.num_edges;
debugging.num_bipartite_edges = og_graph.num_edges * 2;
debugging.vertices_a = (struct b_vertex_a*) malloc(debugging.num_vertex_a * sizeof(struct b_vertex_a));
debugging.vertices_b = (struct b_vertex_b*) malloc(debugging.num_vertex_b * sizeof(struct b_vertex_b));
debugging.edges = (struct b_edge*) malloc(debugging.num_bipartite_edges * sizeof(struct b_edge));
hipMemcpy(debugging.vertices_a, bg_graph.vertices_a, debugging.num_vertex_a * sizeof(struct b_vertex_a), hipMemcpyDeviceToHost);
hipMemcpy(debugging.vertices_b, bg_graph.vertices_b, debugging.num_vertex_b * sizeof(struct b_vertex_b), hipMemcpyDeviceToHost);
hipMemcpy(debugging.edges, bg_graph.edges, debugging.num_bipartite_edges * sizeof(struct b_edge), hipMemcpyDeviceToHost);
// printf("Bipartite Graph:\n");
// printf("verticesA: %d, verticesB: %d, edges: %d\n", debugging.num_vertex_a, debugging.num_vertex_b, debugging.num_bipartite_edges);
// for(int i = 0; i < debugging.num_bipartite_edges; i++){
// printf("index: %d - %d %d %d %d\n", i, debugging.edges[i].v, debugging.edges[i].u, debugging.edges[i].cv, debugging.edges[i].weight);
// }
free(debugging.vertices_a);
free(debugging.vertices_b);
free(debugging.edges);
//***** SMALLEST EDGE WEIGHT EDGE FOR EACH VERTEX IN BG_GRAPH *****//
int* smallest_weights = NULL;
int* smallest_edges = NULL;
//***** GET SOLUTION *****//
bool* d_mst_edges = NULL;
bool* mst_edges = NULL;
mst_edges = (bool*) malloc(og_graph.num_edges * sizeof(bool));
// don't malloc again for this variable
hipMalloc((void**) &(d_mst_edges), og_graph.num_edges* sizeof(bool));
mst_edges_init<<<(og_graph.num_edges + THREADSPERBLOCK-1)/THREADSPERBLOCK, THREADSPERBLOCK>>>(og_graph.num_edges, d_mst_edges);
int * solution_size = (int*) malloc (sizeof(int));
*solution_size = 0;
int* d_solutionSize = NULL;
hipMalloc((void**) &(d_solutionSize),sizeof(int));
hipMemcpy(d_solutionSize, solution_size, sizeof(int), hipMemcpyHostToDevice);
int* max_super_vertex = (int*) malloc (sizeof(int));
*max_super_vertex = bg_graph.num_vertex_a;
while(*solution_size < (og_graph.num_vertices - 1)){
// cudaMalloc((void**) &(smallest_weights), bg_graph.num_vertex_a * sizeof(int));
// cudaMalloc((void**) &(smallest_edges), bg_graph.num_vertex_a * sizeof(int));
//get_smallest_edges<<<(bg_graph.num_bipartite_edges + THREADSPERBLOCK-1)/THREADSPERBLOCK, THREADSPERBLOCK>>>(bg_graph.num_bipartite_edges, bg_graph.num_vertex_a, bg_graph.edges, smallest_weights, smallest_edges);
hipMalloc((void**) &(smallest_weights), *max_super_vertex * sizeof(int));
hipMalloc((void**) &(smallest_edges), *max_super_vertex * sizeof(int));
init_smallest_edges_weights<<<(*max_super_vertex + THREADSPERBLOCK-1)/THREADSPERBLOCK, THREADSPERBLOCK>>>(*max_super_vertex, smallest_weights, smallest_edges);
get_smallest_edges<<<(bg_graph.num_bipartite_edges + THREADSPERBLOCK-1)/THREADSPERBLOCK, THREADSPERBLOCK>>>(bg_graph.num_bipartite_edges,*max_super_vertex, bg_graph.edges, smallest_weights, smallest_edges);
// debugging
int* debug_smallest_weights = NULL;
debug_smallest_weights = (int*) malloc(*max_super_vertex * sizeof(int));
hipMemcpy(debug_smallest_weights, smallest_weights, *max_super_vertex * sizeof(int), hipMemcpyDeviceToHost);
// for(int i = 0; i < *max_super_vertex; i++){
// printf("bg index of smallest weight: %d\n", debug_smallest_weights[i]);
// }
int* debug_smallest_edges = NULL;
debug_smallest_edges = (int*) malloc(*max_super_vertex * sizeof(int));
hipMemcpy(debug_smallest_edges, smallest_edges, *max_super_vertex * sizeof(int), hipMemcpyDeviceToHost);
// for(int i = 0; i < *max_super_vertex; i++){
// printf("bg index of smallest edge: %d\n", debug_smallest_edges[i]);
// }
get_mst_edges<<<(*max_super_vertex + THREADSPERBLOCK-1)/THREADSPERBLOCK, THREADSPERBLOCK>>>(*max_super_vertex , smallest_edges, bg_graph.edges, d_mst_edges);
get_num_mst<<<(og_graph.num_edges + THREADSPERBLOCK-1)/THREADSPERBLOCK, THREADSPERBLOCK>>>(og_graph.num_edges , d_mst_edges, d_solutionSize);
// debugging
// printf("MST:\n");
hipMemcpy(mst_edges, d_mst_edges, og_graph.num_edges * sizeof(bool), hipMemcpyDeviceToHost);
// for(int i = 0; i < og_graph.num_edges; i++){
// if(mst_edges[i] == true){
// //printf("mst edges index: %d\n", i);
// printf("index: %d - %d %d %d\n", i, og_graph.edges[i].v, og_graph.edges[i].u, og_graph.edges[i].weight);
// }
// }
hipMemcpy(solution_size, d_solutionSize, sizeof(int), hipMemcpyDeviceToHost);
// printf("Num MST edges found: %d\n",*solution_size);
if(*solution_size < (og_graph.num_vertices - 1)){
//***** GET STRUT *****//
struct strut new_strut;
new_strut.num_v = bg_graph.num_vertex_a;
new_strut.num_u = bg_graph.num_vertex_b;
new_strut.num_strut_edges = bg_graph.num_vertex_a;
struct strut_edge* d_strut_edges = NULL;
hipMalloc((void**) &(d_strut_edges), new_strut.num_v * sizeof(struct strut_edge));
get_strut_edges<<<((bg_graph.num_vertex_a) + THREADSPERBLOCK-1)/THREADSPERBLOCK, THREADSPERBLOCK>>>(bg_graph.num_vertex_a, smallest_edges, bg_graph.edges, d_strut_edges);
// debugging
struct strut_edge* strut_edges = (struct strut_edge* ) malloc(new_strut.num_v * sizeof(struct strut_edge));
hipMemcpy(strut_edges, d_strut_edges, new_strut.num_v * sizeof(struct strut_edge), hipMemcpyDeviceToHost);
// printf("STRUT EDGES:\n");
// for(int i = 0; i < new_strut.num_v ; i++){
// printf("%d %d %d\n", strut_edges[i].v,strut_edges[i].u, strut_edges[i].cv);
// }
// getting strut_u
struct strut_u_vertex* d_vertices_u = NULL;
hipMalloc((void**) &(d_vertices_u), new_strut.num_u * sizeof(struct strut_u_vertex));
strut_u_init<<<((new_strut.num_u) + THREADSPERBLOCK-1)/THREADSPERBLOCK, THREADSPERBLOCK>>>(new_strut.num_u, d_vertices_u);
get_strut_u_degree<<<((new_strut.num_v) + THREADSPERBLOCK-1)/THREADSPERBLOCK, THREADSPERBLOCK>>>(new_strut.num_v, d_strut_edges, d_vertices_u);
get_strut_u_vertices<<<((bg_graph.num_bipartite_edges) + THREADSPERBLOCK-1)/THREADSPERBLOCK, THREADSPERBLOCK>>>(bg_graph.num_bipartite_edges, bg_graph.edges, d_vertices_u);
// debugging
struct strut_u_vertex* vertices_u = (struct strut_u_vertex* ) malloc(new_strut.num_u * sizeof(struct strut_u_vertex));
hipMemcpy(vertices_u, d_vertices_u, new_strut.num_u * sizeof(struct strut_u_vertex), hipMemcpyDeviceToHost);
// printf("STRUT U VERTICES DEGREE:\n");
// for(int i = 0; i < new_strut.num_u ; i++){
// printf("index: %d degree: %d v1: %d v2: %d\n",i, vertices_u[i].degree, vertices_u[i].v1, vertices_u[i].v2);
// }
/* ZERO DIFF */
int* d_zero_diff_edges = NULL;
hipMalloc((void**) &(d_zero_diff_edges), new_strut.num_u * sizeof(int));
get_zero_diff_num<<<((new_strut.num_u) + THREADSPERBLOCK-1)/THREADSPERBLOCK, THREADSPERBLOCK>>>(new_strut.num_u, d_vertices_u, d_zero_diff_edges);
// debugging
int*zero_diff_edges = (int*) malloc (sizeof(int));
hipMemcpy(zero_diff_edges, d_zero_diff_edges, sizeof(int), hipMemcpyDeviceToHost);
// printf("zero diff edges: %d\n", *zero_diff_edges);
// /*SUPER VERTEX*/
int* d_super_vertices = NULL;
hipMalloc((void**) &(d_super_vertices), bg_graph.num_vertex_a* sizeof(int));
super_vertices_init<<<((bg_graph.num_vertex_a) + THREADSPERBLOCK-1)/THREADSPERBLOCK, THREADSPERBLOCK>>>(bg_graph.num_vertex_a, d_super_vertices);
int* super_vertices = (int*) malloc(bg_graph.num_vertex_a* sizeof(int));
hipMemcpy(super_vertices, d_super_vertices,bg_graph.num_vertex_a* sizeof(int), hipMemcpyDeviceToHost);
for(int i = 0; i < new_strut.num_u ; i++){
int super_vertex;
if(vertices_u[i].degree > 0){ // if incident to strut edge
if(super_vertices[vertices_u[i].v1 - 1] < vertices_u[i].v1){
super_vertex = super_vertices[vertices_u[i].v1 - 1];
super_vertices[vertices_u[i].v1 - 1] = super_vertex;
super_vertices[vertices_u[i].v2 - 1] = super_vertex;
}
else{
super_vertex = vertices_u[i].v1;
super_vertices[vertices_u[i].v1 - 1] = super_vertex;
super_vertices[vertices_u[i].v2 - 1] = super_vertex;
}
}
}
hipMemcpy(d_super_vertices, super_vertices,bg_graph.num_vertex_a* sizeof(int), hipMemcpyHostToDevice);
// debugging
// printf("Supervertices\n:");
// for(int i = 0; i < bg_graph.num_vertex_a ; i++){
// printf("vertex: %d supervertex: %d\n", i+1, super_vertices[i]);
// }
/******** CREATING NEW BIPARTITE GRAPH **********/
struct b_graph new_bg_graph;
new_bg_graph.num_vertex_a = *zero_diff_edges;
int* new_num_vertex_b = NULL;
hipMalloc((void**) &(new_num_vertex_b), sizeof(int));
int* new_vertex_b = NULL;
hipMalloc((void**) &(new_vertex_b), bg_graph.num_vertex_b * sizeof(int));
get_new_bg_vertex_b<<<((bg_graph.num_vertex_b) + THREADSPERBLOCK-1)/THREADSPERBLOCK, THREADSPERBLOCK>>>(bg_graph.num_vertex_b, d_super_vertices,d_vertices_u, new_vertex_b, new_num_vertex_b);
// num_vertex_b and num_bipartite edges
hipMemcpy(&new_bg_graph.num_vertex_b, new_num_vertex_b, sizeof(int), hipMemcpyDeviceToHost);
new_bg_graph.num_bipartite_edges = new_bg_graph.num_vertex_b * 2;
// debugging
int* new_vertex_b_debug = (int*)malloc( bg_graph.num_vertex_b * sizeof(int));
hipMemcpy(new_vertex_b_debug, new_vertex_b, bg_graph.num_vertex_b * sizeof(int), hipMemcpyDeviceToHost);
// printf("New Bipartie edges to choose:\n");
// for(int i =0 ; i < bg_graph.num_vertex_b ; i++){
// printf("index: %d value: %d\n", i, new_vertex_b_debug[i]);
// }
// printf("New vertex b num: %d\n", new_bg_graph.num_vertex_b);
int* prefixSum = NULL;
hipMalloc((void**) &(prefixSum), bg_graph.num_vertex_b * sizeof(int));
prefixCopy<<<((bg_graph.num_vertex_b) + THREADSPERBLOCK-1)/THREADSPERBLOCK, THREADSPERBLOCK>>>(bg_graph.num_vertex_b, new_vertex_b, prefixSum);
//get index of bipartite edges
int* d_prefix_helper = NULL;
hipMalloc((void**) &(d_prefix_helper), bg_graph.num_vertex_b * sizeof(int));
/* prefix sum belloch scan */
int d = 1;
while(d<bg_graph.num_vertex_b){
getPrefixSum<<<(bg_graph.num_vertex_b + THREADSPERBLOCK-1)/THREADSPERBLOCK, THREADSPERBLOCK>>>(prefixSum, d_prefix_helper, d);
d = 2*d;
}
//debugging
// printf("prefix sum:\n");
// int* vertex_b_print = (int*) malloc( bg_graph.num_vertex_b * sizeof(int));
// cudaMemcpy(vertex_b_print, prefixSum, bg_graph.num_vertex_b * sizeof(int), cudaMemcpyDeviceToHost);
// for(int i = 0; i < bg_graph.num_vertex_b ; i++){
// printf("vertex: %d index: %d\n", i, vertex_b_print[i]);
// }
hipMalloc((void**) &(new_bg_graph.edges), new_bg_graph.num_bipartite_edges * sizeof(struct b_edge));
int* d_max_super_vertex = NULL;
hipMalloc((void**) &(d_max_super_vertex),sizeof(int));
get_new_bg_edges<<<(bg_graph.num_vertex_b + THREADSPERBLOCK-1)/THREADSPERBLOCK, THREADSPERBLOCK>>>(bg_graph.num_vertex_b , new_vertex_b, prefixSum, d_vertices_u, d_super_vertices, new_bg_graph.edges, d_max_super_vertex);
hipMemcpy(max_super_vertex, d_max_super_vertex, sizeof(int), hipMemcpyDeviceToHost);
// debugging
debugging.num_vertex_a = new_bg_graph.num_vertex_a;
debugging.num_vertex_b = new_bg_graph.num_vertex_b;
debugging.num_bipartite_edges = new_bg_graph.num_bipartite_edges ;
debugging.edges = (struct b_edge*) malloc(new_bg_graph.num_bipartite_edges * sizeof(struct b_edge));
hipMemcpy(debugging.edges, new_bg_graph.edges, new_bg_graph.num_bipartite_edges * sizeof(struct b_edge), hipMemcpyDeviceToHost);
// printf("New Bipartite Graph:\n");
// printf("verticesA: %d, verticesB: %d, edges: %d\n", debugging.num_vertex_a, debugging.num_vertex_b, debugging.num_bipartite_edges);
// for(int i = 0; i < debugging.num_bipartite_edges; i++){
// printf("index: %d - %d %d %d %d\n", i, debugging.edges[i].v, debugging.edges[i].u, debugging.edges[i].cv, debugging.edges[i].weight);
// }
bg_graph.num_vertex_a = new_bg_graph.num_vertex_a;
bg_graph.num_vertex_b = new_bg_graph.num_vertex_b;
bg_graph.num_bipartite_edges = new_bg_graph.num_bipartite_edges;
hipFree(bg_graph.edges);
hipMalloc((void**) &(bg_graph.edges), bg_graph.num_bipartite_edges * sizeof(struct b_edge));
hipMemcpy(bg_graph.edges, debugging.edges, bg_graph.num_bipartite_edges * sizeof(struct b_edge), hipMemcpyHostToDevice);
free(debug_smallest_weights);
free(debug_smallest_edges);
free(strut_edges);
free(vertices_u);
free(zero_diff_edges);
free(super_vertices);
free(new_vertex_b_debug);
hipFree(d_prefix_helper);
hipFree(prefixSum);
hipFree(new_vertex_b);
hipFree(new_num_vertex_b);
hipFree(d_max_super_vertex);
hipFree(d_super_vertices);
hipFree(d_zero_diff_edges);
hipFree(d_vertices_u);
hipFree(new_num_vertex_b);
hipFree(new_vertex_b);
hipFree(d_strut_edges);
hipFree(smallest_weights);
hipFree(smallest_edges);
}
}
//printf("done with loop\n");
/*end of while loop*/
FILE *file;
file = fopen(argv[argc-1],"w+");
fprintf(file,"Input Graph\nVertices: %d Edges: %d\n", og_graph.num_vertices, og_graph.num_edges);
fprintf(file, "MST Edges:\n");
for(int i = 0; i < og_graph.num_edges; i++){
if(mst_edges[i] == true){
fprintf(file, "index: %d - v: %d u: %d weight: %d\n", i, og_graph.edges[i].v, og_graph.edges[i].u, og_graph.edges[i].weight);
}
}
fclose(file);
// malloc frees
free(max_super_vertex);
free(og_graph.edges);
free(mst_edges);
free(solution_size);
free(max_super_vertex);
// cuda malloc frees
hipFree(d_solutionSize);
hipFree(d_mst_edges);
hipFree(mst_edges);
hipFree(d_og_edges);
hipFree(bg_graph.vertices_a);
hipFree(bg_graph.vertices_b);
hipFree(bg_graph.edges);
}
void get_graph(struct graph* og_graph, char* input){
FILE *file;
char buff[255];
int num_vertices;
int num_edges;
file = fopen(input , "r");
if(file == NULL){
perror(input);
exit(1);
}
else{
fscanf(file, "%s", buff);
num_vertices = atoi(buff);
fscanf(file, "%s", buff);
num_edges = atoi(buff);
(*og_graph).num_edges = num_edges;
(*og_graph).num_vertices = num_vertices;
(*og_graph).edges = (struct edge*) malloc(sizeof(struct edge) * num_edges);
for(int i = 0; i < num_edges; i++){
fscanf(file, "%s", buff);
(*og_graph).edges[i].v = atoi(buff);
fscanf(file, "%s", buff);
(*og_graph).edges[i].u = atoi(buff);
fscanf(file, "%s", buff);
(*og_graph).edges[i].weight = atoi(buff);
}
}
fclose(file);
}
__global__ void get_bipartite_graph(int num_edges, int num_vertices, struct edge* graphEdges, struct b_vertex_a* vertices_a, struct b_vertex_b* vertices_b, struct b_edge* bg_graphEdges) {
int edge = threadIdx.x + blockIdx.x * blockDim.x;
if(edge < num_edges){
// acquire two bipartite edges for each orginal graph edge
bg_graphEdges[2*edge].v = graphEdges[edge].v;
bg_graphEdges[2*edge].u = edge;
bg_graphEdges[2*edge].cv = 2*edge+1; // corresponding edge/vertex
bg_graphEdges[2*edge].weight = graphEdges[edge].weight;
bg_graphEdges[2*edge+1].v = graphEdges[edge].u;
bg_graphEdges[2*edge+1].u = edge;
bg_graphEdges[2*edge+1].cv = 2*edge; // corresponding edge/vertex
bg_graphEdges[2*edge+1].weight = graphEdges[edge].weight;
vertices_b[edge].e = edge;
if(edge < num_vertices)
vertices_a[edge].v = edge;
}
}
__global__ void init_smallest_edges_weights(int num_edges, int *smallest_weights, int* smallest_edges){
int edge = threadIdx.x + blockIdx.x * blockDim.x;
if(edge < num_edges){
smallest_weights[edge] = -1;
smallest_edges[edge] = -1;
}
}
// fills in smallest edges array with the index of smallest bipartite edges for each vertex (index of smallest_edges corresponds to vertex number) in graph
__global__ void get_smallest_edges(int bp_num_edges, int num_smallest_edges, struct b_edge* bg_graphEdges, int* smallest_weights, int* smallest_edges){
int edge = threadIdx.x + blockIdx.x * blockDim.x;
if(edge< bp_num_edges){
int index = bg_graphEdges[edge].v - 1;
// smallest_weights[index] = bg_graphEdges[edge].weight; // filler weight to compare with
smallest_weights[index] = INT_MAX;
__syncthreads(); // acquire all smallest weights
atomicMin(&(smallest_weights[index]), bg_graphEdges[edge].weight); // save actual smallest weight
__syncthreads(); // acquire all smallest weights
smallest_edges[index] = bp_num_edges - 1; // filler edge number to comapre with, max edge
// if(edge < num_smallest_edges){
// if(edge != index){
// smallest_weights[index] = -1;
// smallest_edges[index] = -1;
// }
// }
__syncthreads(); // acquire all smallest edges
if(bg_graphEdges[edge].weight == smallest_weights[index]) // save smallest edge if the the bg edge has same weight as smallest weight
//atomicMin(&(smallest_edges[index]), bg_graphEdges[edge].u);
atomicMin(&(smallest_edges[index]), edge);
}
}
// flags all edges to false
__global__ void mst_edges_init(int og_num_edges, bool *mst_edges){
int edge = threadIdx.x + blockIdx.x * blockDim.x;
if(edge < og_num_edges){
mst_edges[edge] = false;
}
}
// sets which edges go in mst
__global__ void get_mst_edges(int num_smallest_edges, int* smallest_edges, struct b_edge* bg_graphEdges, bool *mst_edges){
int edge = threadIdx.x + blockIdx.x * blockDim.x;
int bg_index;
int vertex;
if(edge < num_smallest_edges){
bg_index = smallest_edges[edge];
if(bg_index != -1){
vertex = bg_graphEdges[bg_index].u;
mst_edges[vertex] = true;
}
}
}
// gets num of mst edges in solution set
__global__ void get_num_mst(int og_num_edges, bool *mst_edges, int* num_mst){
int edge = threadIdx.x + blockIdx.x * blockDim.x;
if(edge < og_num_edges){
*num_mst = 0; // reset
__syncthreads();
if(mst_edges[edge] == true)
atomicAdd(num_mst, 1);
}
}
// makes the strut edges
__global__ void get_strut_edges(int bg_num_vertices, int* smallest_edges, struct b_edge* bg_graphEdges, strut_edge* strut_edges){
int bg_vertex = threadIdx.x + blockIdx.x * blockDim.x;
if(bg_vertex < bg_num_vertices){
strut_edges[bg_vertex].v = bg_vertex + 1; // vertex
strut_edges[bg_vertex].u = bg_graphEdges[smallest_edges[bg_vertex]].u; // edge index (u vertex)
strut_edges[bg_vertex].cv = bg_graphEdges[bg_graphEdges[smallest_edges[bg_vertex]].cv].v; // save vertex that is connected to same edge index (u vertex);
}
}
// init strut u vertices degree
__global__ void strut_u_init(int bg_num_vertex_b, struct strut_u_vertex* vertices_u){
int vertex_b = threadIdx.x + blockIdx.x * blockDim.x;
if(vertex_b < bg_num_vertex_b)
vertices_u[vertex_b].degree = 0;
}
// fill in degree of strut u vertices
__global__ void get_strut_u_degree(int num_strut_vertices, strut_edge* strut_edges, struct strut_u_vertex* vertices_u){
int strut_edge = threadIdx.x + blockIdx.x * blockDim.x;
if(strut_edge < num_strut_vertices){
atomicAdd(&(vertices_u[strut_edges[strut_edge].u]).degree, 1);
}
}
// fill in what vertices the vertices_u from the strut is connected
__global__ void get_strut_u_vertices(int bg_num_edges, struct b_edge* bg_graphEdges, struct strut_u_vertex* vertices_u){
int bg_edge = threadIdx.x + blockIdx.x * blockDim.x;
if(bg_edge < bg_num_edges){
if(bg_edge%2 == 0){ // only even edges
vertices_u[bg_graphEdges[bg_edge].u].v1 = bg_graphEdges[bg_edge].v;
vertices_u[bg_graphEdges[bg_edge].u].v2 = bg_graphEdges[bg_graphEdges[bg_edge].cv].v;
vertices_u[bg_graphEdges[bg_edge].u].weight = bg_graphEdges[bg_edge].weight;
}
}
}
// get number of zero difference vertrices u in strut
__global__ void get_zero_diff_num(int bg_num_vertex_b, struct strut_u_vertex* vertices_u, int* zero_diff_edges){
int vertex_b = threadIdx.x + blockIdx.x * blockDim.x;
if(vertex_b < bg_num_vertex_b){
if(vertices_u[vertex_b].degree == 2)
atomicAdd(zero_diff_edges, 1);
}
}
// initialize super vertices
__global__ void super_vertices_init(int num_strut_vertices, int* super_vertices){
int vertex = threadIdx.x + blockIdx.x * blockDim.x;
if(vertex < num_strut_vertices){
super_vertices[vertex] = vertex + 1;
}
}
// set which verticies_u will be in new bipartitie graph and get how many there are
__global__ void get_new_bg_vertex_b(int num_bg_vertexb, int* super_vertices, struct strut_u_vertex* vertices_u, int* new_vertex_b, int* num_newbg_vertexb){
int vertex = threadIdx.x + blockIdx.x * blockDim.x;
if(vertex < num_bg_vertexb){
new_vertex_b[vertex] = 0; // setting all to false
__syncthreads();
if(super_vertices[vertices_u[vertex].v1 - 1] != super_vertices[vertices_u[vertex].v2 - 1]){
new_vertex_b[vertex] = 1;
}
*num_newbg_vertexb = 0;
__syncthreads();
if(new_vertex_b[vertex] == 1)
atomicAdd(num_newbg_vertexb, 1);
}
}
// copy maker
__global__ void prefixCopy(int prefixNum, int* old_prefix, int *new_prefix){
int index = threadIdx.x + blockIdx.x * blockDim.x;
if(index < prefixNum){
new_prefix[index] = old_prefix[index];
}
}
__global__ void getPrefixSum(int* entries, int* entriesC, int d) {
int index = threadIdx.x + blockIdx.x * blockDim.x;
if(index >= d)
entriesC[index] = entries[index - d];
else
entriesC[index] = 0;
__syncthreads();
entries[index] = entries[index] + entriesC[index];
}
// makes new bipartite edges
__global__ void get_new_bg_edges(int num_bg_vertex_b, int* new_bg_edges, int* prefixSum, struct strut_u_vertex* vertices_u, int* super_vertices, struct b_edge* bg_graphEdges, int * max_super_vertex){
int index = threadIdx.x + blockIdx.x * blockDim.x;
int edge1;
int edge2;
if(index < num_bg_vertex_b){
if(new_bg_edges[index] == 1){
edge1 = (prefixSum[index] - 1) * 2;
edge2 = edge1+1;
bg_graphEdges[edge1].v = super_vertices[vertices_u[index].v1-1];
bg_graphEdges[edge1].u = index;
bg_graphEdges[edge1].cv = edge2;
bg_graphEdges[edge1].weight = vertices_u[index].weight;
bg_graphEdges[edge2].v = super_vertices[vertices_u[index].v2-1];
bg_graphEdges[edge2].u = index;
bg_graphEdges[edge2].cv = edge1;
bg_graphEdges[edge2].weight = vertices_u[index].weight;
atomicMax(max_super_vertex, super_vertices[vertices_u[index].v1-1]);
atomicMax(max_super_vertex, super_vertices[vertices_u[index].v2-1]);
}
}
}
// get what vertex each vertex is compacted to during compression of bipartite graph
__global__ void get_super_vertices(int num_strut_vertices, strut_edge* strut_edges, struct strut_u_vertex* vertices_u, int* super_vertices){
int strut_edge = threadIdx.x + blockIdx.x * blockDim.x;
int cv;
int min_cv;
if(strut_edge < num_strut_vertices){
min_cv = strut_edges[strut_edge].v;
// cv = strut_edges[strut_edge].cv;
// while(cv < min_cv){
// min_cv = cv;
// cv = strut_edges[cv-1].cv;
// }
if(vertices_u[strut_edges[strut_edge].u].v1 == min_cv)
cv = vertices_u[strut_edges[strut_edge].u].v2;
else
cv = vertices_u[strut_edges[strut_edge].u].v1;
while(cv < min_cv){
min_cv = cv;
if(vertices_u[strut_edges[strut_edge].u].v1 == min_cv)
cv = vertices_u[strut_edges[cv-1].u].v2;
else
cv = vertices_u[strut_edges[cv-1].u].v1;
}
super_vertices[strut_edge] = min_cv;
}
} |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | // RUN: %run_test hipify "%s" "%t" %hipify_args %clang_args
// Taken from: http://docs.nvidia.com/cuda/curand/device-api-overview.html#poisson-api-example
/*
* This program uses CURAND library for Poisson distribution
* to simulate queues in store for 16 hours. It shows the
* difference of using 3 different APIs:
* - HOST API -arrival of customers is described by Poisson(4)
* - SIMPLE DEVICE API -arrival of customers is described by
* Poisson(4*(sin(x/100)+1)), where x is number of minutes
* from store opening time.
* - ROBUST DEVICE API -arrival of customers is described by:
* - Poisson(2) for first 3 hours.
* - Poisson(1) for second 3 hours.
* - Poisson(3) after 6 hours.
*/
#include <stdio.h>
#include <stdlib.h>
// CHECK: #include <hip/hip_runtime.h>
#include <cuda.h>
// CHECK: #include <hiprand_kernel.h>
#include <curand_kernel.h>
// CHECK: #include <hiprand.h>
#include <curand.h>
// CHECK: #define CUDA_CALL(x) do { if((x) != hipSuccess) {
#define CUDA_CALL(x) do { if((x) != cudaSuccess) { \
printf("Error at %s:%d\n",__FILE__,__LINE__); \
return EXIT_FAILURE;}} while(0)
// CHECK: #define CURAND_CALL(x) do { if((x)!=HIPRAND_STATUS_SUCCESS) {
#define CURAND_CALL(x) do { if((x)!=CURAND_STATUS_SUCCESS) { \
printf("Error at %s:%d\n",__FILE__,__LINE__);\
return EXIT_FAILURE;}} while(0)
#define HOURS 16
#define OPENING_HOUR 7
#define CLOSING_HOUR (OPENING_HOUR + HOURS)
#define access_2D(type, ptr, row, column, pitch)\
*((type*)((char*)ptr + (row) * pitch) + column)
enum API_TYPE {
HOST_API = 0,
SIMPLE_DEVICE_API = 1,
ROBUST_DEVICE_API = 2,
};
/* global variables */
API_TYPE api;
int report_break;
int cashiers_load_h[HOURS];
__constant__ int cashiers_load[HOURS];
// CHECK: __global__ void setup_kernel(hiprandState_t *state)
__global__ void setup_kernel(curandState *state)
{
int id = threadIdx.x + blockIdx.x * blockDim.x;
/* Each thread gets same seed, a different sequence
number, no offset */
// CHECK: hiprand_init(1234, id, 0, &state[id]);
curand_init(1234, id, 0, &state[id]);
}
__inline__ __device__
void update_queue(int id, int min, unsigned int new_customers,
unsigned int &queue_length,
unsigned int *queue_lengths, size_t pitch)
{
int balance;
balance = new_customers - 2 * cashiers_load[(min-1)/60];
if (balance + (int)queue_length <= 0){
queue_length = 0;
}else{
queue_length += balance;
}
/* Store results */
access_2D(unsigned int, queue_lengths, min-1, id, pitch)
= queue_length;
}
// CHECK: __global__ void simple_device_API_kernel(hiprandState_t *state,
__global__ void simple_device_API_kernel(curandState *state,
unsigned int *queue_lengths, size_t pitch)
{
int id = threadIdx.x + blockIdx.x * blockDim.x;
unsigned int new_customers;
unsigned int queue_length = 0;
/* Copy state to local memory for efficiency */
// CHECK: hiprandState_t localState = state[id];
curandState localState = state[id];
/* Simulate queue in time */
for(int min = 1; min <= 60 * HOURS; min++) {
/* Draw number of new customers depending on API */
// CHECK: new_customers = hiprand_poisson(&localState,
new_customers = curand_poisson(&localState,
4*(sin((float)min/100.0)+1));
/* Update queue */
update_queue(id, min, new_customers, queue_length,
queue_lengths, pitch);
}
/* Copy state back to global memory */
state[id] = localState;
}
__global__ void host_API_kernel(unsigned int *poisson_numbers,
unsigned int *queue_lengths, size_t pitch)
{
int id = threadIdx.x + blockIdx.x * blockDim.x;
unsigned int new_customers;
unsigned int queue_length = 0;
/* Simulate queue in time */
for(int min = 1; min <= 60 * HOURS; min++) {
/* Get random number from global memory */
new_customers = poisson_numbers
[blockDim.x * gridDim.x * (min -1) + id];
/* Update queue */
update_queue(id, min, new_customers, queue_length,
queue_lengths, pitch);
}
}
// CHECK: __global__ void robust_device_API_kernel(hiprandState_t *state,
// CHECK: hiprandDiscreteDistribution_t poisson_1,
// CHECK: hiprandDiscreteDistribution_t poisson_2,
// CHECK: hiprandDiscreteDistribution_t poisson_3,
__global__ void robust_device_API_kernel(curandState *state,
curandDiscreteDistribution_t poisson_1,
curandDiscreteDistribution_t poisson_2,
curandDiscreteDistribution_t poisson_3,
unsigned int *queue_lengths, size_t pitch)
{
int id = threadIdx.x + blockIdx.x * 64;
unsigned int new_customers;
unsigned int queue_length = 0;
/* Copy state to local memory for efficiency */
// CHECK: hiprandState_t localState = state[id];
curandState localState = state[id];
/* Simulate queue in time */
/* first 3 hours */
for(int min = 1; min <= 60 * 3; min++) {
/* draw number of new customers depending on API */
new_customers =
// CHECK: hiprand_discrete(&localState, poisson_2);
curand_discrete(&localState, poisson_2);
/* Update queue */
update_queue(id, min, new_customers, queue_length,
queue_lengths, pitch);
}
/* second 3 hours */
for(int min = 60 * 3 + 1; min <= 60 * 6; min++) {
/* draw number of new customers depending on API */
new_customers =
// CHECK: hiprand_discrete(&localState, poisson_1);
curand_discrete(&localState, poisson_1);
/* Update queue */
update_queue(id, min, new_customers, queue_length,
queue_lengths, pitch);
}
/* after 6 hours */
for(int min = 60 * 6 + 1; min <= 60 * HOURS; min++) {
/* draw number of new customers depending on API */
new_customers =
// CHECK: hiprand_discrete(&localState, poisson_3);
curand_discrete(&localState, poisson_3);
/* Update queue */
update_queue(id, min, new_customers, queue_length,
queue_lengths, pitch);
}
/* Copy state back to global memory */
state[id] = localState;
}
/* Set time intervals between reports */
void report_settings()
{
do{
printf("Set time intervals between queue reports");
printf("(in minutes > 0)\n");
if (scanf("%d", &report_break) == 0) continue;
}while(report_break <= 0);
}
/* Set number of cashiers each hour */
void add_cachiers(int *cashiers_load)
{
int i, min, max, begin, end;
printf("Cashier serves 2 customers per minute...\n");
for (i = 0; i < HOURS; i++){
cashiers_load_h[i] = 0;
}
while (true){
printf("Adding cashier...\n");
min = OPENING_HOUR;
max = CLOSING_HOUR-1;
do{
printf("Set hour that cahier comes (%d-%d)",
min, max);
printf(" [type 0 to finish adding cashiers]\n");
if (scanf("%d", &begin) == 0) continue;
}while (begin > max || (begin < min && begin != 0));
if (begin == 0) break;
min = begin+1;
max = CLOSING_HOUR;
do{
printf("Set hour that cahier leaves (%d-%d)",
min, max);
printf(" [type 0 to finish adding cashiers]\n");
if (scanf("%d", &end) == 0) continue;
}while (end > max || (end < min && end != 0));
if (end == 0) break;
for (i = begin - OPENING_HOUR;
i < end - OPENING_HOUR; i++){
cashiers_load_h[i]++;
}
}
for (i = OPENING_HOUR; i < CLOSING_HOUR; i++){
printf("\n%2d:00 - %2d:00 %d cashier",
i, i+1, cashiers_load_h[i-OPENING_HOUR]);
if (cashiers_load[i-OPENING_HOUR] != 1) printf("s");
}
printf("\n");
}
/* Set API type */
API_TYPE set_API_type()
{
printf("Choose API type:\n");
int choose;
do{
printf("type 1 for HOST API\n");
printf("type 2 for SIMPLE DEVICE API\n");
printf("type 3 for ROBUST DEVICE API\n");
if (scanf("%d", &choose) == 0) continue;
}while( choose < 1 || choose > 3);
switch(choose){
case 1: return HOST_API;
case 2: return SIMPLE_DEVICE_API;
case 3: return ROBUST_DEVICE_API;
default:
fprintf(stderr, "wrong API\n");
return HOST_API;
}
}
void settings()
{
add_cachiers(cashiers_load);
// CHECK: hipMemcpyToSymbol("cashiers_load", cashiers_load_h,
// CHECK: HOURS * sizeof(int), 0, hipMemcpyHostToDevice);
cudaMemcpyToSymbol("cashiers_load", cashiers_load_h,
HOURS * sizeof(int), 0, cudaMemcpyHostToDevice);
report_settings();
api = set_API_type();
}
void print_statistics(unsigned int *hostResults, size_t pitch)
{
int min, i, hour, minute;
unsigned int sum;
for(min = report_break; min <= 60 * HOURS;
min += report_break) {
sum = 0;
for(i = 0; i < 64 * 64; i++) {
sum += access_2D(unsigned int, hostResults,
min-1, i, pitch);
}
hour = OPENING_HOUR + min/60;
minute = min%60;
printf("%2d:%02d # of waiting customers = %10.4g |",
hour, minute, (float)sum/(64.0 * 64.0));
printf(" # of cashiers = %d | ",
cashiers_load_h[(min-1)/60]);
printf("# of new customers/min ~= ");
switch (api){
case HOST_API:
printf("%2.2f\n", 4.0);
break;
case SIMPLE_DEVICE_API:
printf("%2.2f\n",
4*(sin((float)min/100.0)+1));
break;
case ROBUST_DEVICE_API:
if (min <= 3 * 60){
printf("%2.2f\n", 2.0);
}else{
if (min <= 6 * 60){
printf("%2.2f\n", 1.0);
}else{
printf("%2.2f\n", 3.0);
}
}
break;
default:
fprintf(stderr, "Wrong API\n");
}
}
}
int main(int argc, char *argv[])
{
int n;
size_t pitch;
// CHECK: hiprandState_t *devStates;
curandState *devStates;
unsigned int *devResults, *hostResults;
unsigned int *poisson_numbers_d;
// CHECK: hiprandDiscreteDistribution_t poisson_1, poisson_2;
// CHECK: hiprandDiscreteDistribution_t poisson_3;
// CHECK: hiprandGenerator_t gen;
curandDiscreteDistribution_t poisson_1, poisson_2;
curandDiscreteDistribution_t poisson_3;
curandGenerator_t gen;
/* Setting cashiers, report and API */
settings();
/* Allocate space for results on device */
// CHECK: CUDA_CALL(hipMallocPitch((void **)&devResults, &pitch,
CUDA_CALL(cudaMallocPitch((void **)&devResults, &pitch,
64 * 64 * sizeof(unsigned int), 60 * HOURS));
/* Allocate space for results on host */
hostResults = (unsigned int *)calloc(pitch * 60 * HOURS,
sizeof(unsigned int));
/* Allocate space for prng states on device */
// CHECK: CUDA_CALL(hipMalloc((void **)&devStates, 64 * 64 *
// CHECK: sizeof(hiprandState_t)));
CUDA_CALL(cudaMalloc((void **)&devStates, 64 * 64 *
sizeof(curandState)));
/* Setup prng states */
if (api != HOST_API){
// CHECK: hipLaunchKernelGGL(setup_kernel, dim3(64), dim3(64), 0, 0, devStates);
setup_kernel<<<64, 64>>>(devStates);
}
/* Simulate queue */
switch (api){
case HOST_API:
/* Create pseudo-random number generator */
// CHECK: CURAND_CALL(hiprandCreateGenerator(&gen,
// CHECK: HIPRAND_RNG_PSEUDO_DEFAULT));
CURAND_CALL(curandCreateGenerator(&gen,
CURAND_RNG_PSEUDO_DEFAULT));
/* Set seed */
// CHECK: CURAND_CALL(hiprandSetPseudoRandomGeneratorSeed(
CURAND_CALL(curandSetPseudoRandomGeneratorSeed(
gen, 1234ULL));
/* compute n */
n = 64 * 64 * HOURS * 60;
/* Allocate n unsigned ints on device */
// CHECK: CUDA_CALL(hipMalloc((void **)&poisson_numbers_d,
CUDA_CALL(cudaMalloc((void **)&poisson_numbers_d,
n * sizeof(unsigned int)));
/* Generate n unsigned ints on device */
// CHECK: CURAND_CALL(hiprandGeneratePoisson(gen,
CURAND_CALL(curandGeneratePoisson(gen,
poisson_numbers_d, n, 4.0));
// CHECK: hipLaunchKernelGGL(host_API_kernel, dim3(64), dim3(64), 0, 0, poisson_numbers_d,
host_API_kernel<<<64, 64>>>(poisson_numbers_d,
devResults, pitch);
/* Cleanup */
// CHECK: CURAND_CALL(hiprandDestroyGenerator(gen));
CURAND_CALL(curandDestroyGenerator(gen));
break;
case SIMPLE_DEVICE_API:
// CHECK: hipLaunchKernelGGL(simple_device_API_kernel, dim3(64), dim3(64), 0, 0, devStates,
simple_device_API_kernel<<<64, 64>>>(devStates,
devResults, pitch);
break;
case ROBUST_DEVICE_API:
/* Create histograms for Poisson(1) */
// CHECK: CURAND_CALL(hiprandCreatePoissonDistribution(1.0,
CURAND_CALL(curandCreatePoissonDistribution(1.0,
&poisson_1));
/* Create histograms for Poisson(2) */
// CHECK: CURAND_CALL(hiprandCreatePoissonDistribution(2.0,
CURAND_CALL(curandCreatePoissonDistribution(2.0,
&poisson_2));
/* Create histograms for Poisson(3) */
// CHECK: CURAND_CALL(hiprandCreatePoissonDistribution(3.0,
CURAND_CALL(curandCreatePoissonDistribution(3.0,
&poisson_3));
// CHECK: hipLaunchKernelGGL(robust_device_API_kernel, dim3(64), dim3(64), 0, 0, devStates,
robust_device_API_kernel<<<64, 64>>>(devStates,
poisson_1, poisson_2, poisson_3,
devResults, pitch);
/* Cleanup */
// CHECK: CURAND_CALL(hiprandDestroyDistribution(poisson_1));
// CHECK: CURAND_CALL(hiprandDestroyDistribution(poisson_2));
// CHECK: CURAND_CALL(hiprandDestroyDistribution(poisson_3));
CURAND_CALL(curandDestroyDistribution(poisson_1));
CURAND_CALL(curandDestroyDistribution(poisson_2));
CURAND_CALL(curandDestroyDistribution(poisson_3));
break;
default:
fprintf(stderr, "Wrong API\n");
}
/* Copy device memory to host */
// CHECK: CUDA_CALL(hipMemcpy2D(hostResults, pitch, devResults,
// CHECK: 60 * HOURS, hipMemcpyDeviceToHost));
CUDA_CALL(cudaMemcpy2D(hostResults, pitch, devResults,
pitch, 64 * 64 * sizeof(unsigned int),
60 * HOURS, cudaMemcpyDeviceToHost));
/* Show result */
print_statistics(hostResults, pitch);
/* Cleanup */
// CHECK: CUDA_CALL(hipFree(devStates));
// CHECK: CUDA_CALL(hipFree(devResults));
CUDA_CALL(cudaFree(devStates));
CUDA_CALL(cudaFree(devResults));
free(hostResults);
return EXIT_SUCCESS;
} | .file "tmpxft_000ab59b_00000000-6_poisson_api_example.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2280:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2280:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "Set time intervals between queue reports"
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "(in minutes > 0)\n"
.LC2:
.string "%d"
.text
.globl _Z15report_settingsv
.type _Z15report_settingsv, @function
_Z15report_settingsv:
.LFB2272:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $8, %rsp
.cfi_def_cfa_offset 48
leaq .LC0(%rip), %r13
leaq .LC1(%rip), %r12
leaq report_break(%rip), %rbp
leaq .LC2(%rip), %rbx
.L4:
movq %r13, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %r12, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %rbp, %rsi
movq %rbx, %rdi
movl $0, %eax
call __isoc23_scanf@PLT
cmpl $0, report_break(%rip)
jle .L4
addq $8, %rsp
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2272:
.size _Z15report_settingsv, .-_Z15report_settingsv
.section .rodata.str1.8
.align 8
.LC3:
.string "Cashier serves 2 customers per minute...\n"
.section .rodata.str1.1
.LC4:
.string "Adding cashier...\n"
.section .rodata.str1.8
.align 8
.LC5:
.string "Set hour that cahier comes (%d-%d)"
.align 8
.LC6:
.string " [type 0 to finish adding cashiers]\n"
.align 8
.LC7:
.string "Set hour that cahier leaves (%d-%d)"
.align 8
.LC8:
.string "\n%2d:00 - %2d:00 %d cashier"
.section .rodata.str1.1
.LC9:
.string "s"
.LC10:
.string "\n"
.text
.globl _Z12add_cachiersPi
.type _Z12add_cachiersPi, @function
_Z12add_cachiersPi:
.LFB2273:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $40, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 8(%rsp)
movq %fs:40, %rax
movq %rax, 24(%rsp)
xorl %eax, %eax
leaq .LC3(%rip), %rsi
movl $2, %edi
call __printf_chk@PLT
leaq 64+cashiers_load_h(%rip), %rdx
leaq -64(%rdx), %rax
.L8:
movl $0, (%rax)
addq $4, %rax
cmpq %rdx, %rax
jne .L8
leaq .LC5(%rip), %r13
leaq .LC6(%rip), %r12
leaq .LC2(%rip), %rbp
jmp .L18
.L22:
testl %eax, %eax
je .L11
movl 16(%rsp), %ecx
cmpl %ecx, %eax
jle .L18
movslq %ecx, %rsi
leaq cashiers_load_h(%rip), %rdx
leaq (%rdx,%rsi,4), %rdx
subl $1, %eax
subl %ecx, %eax
addq %rsi, %rax
leaq cashiers_load_h(%rip), %rcx
leaq 4(%rcx,%rax,4), %rax
.L17:
addl $1, -28(%rdx)
addq $4, %rdx
cmpq %rax, %rdx
jne .L17
.L18:
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq 16(%rsp), %r14
.L26:
movl $22, %ecx
movl $7, %edx
movq %r13, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %r12, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %r14, %rsi
movq %rbp, %rdi
movl $0, %eax
call __isoc23_scanf@PLT
movl 16(%rsp), %ebx
cmpl $22, %ebx
jg .L26
cmpl $6, %ebx
jg .L21
testl %ebx, %ebx
jne .L26
.L21:
testl %ebx, %ebx
je .L11
addl $1, %ebx
leaq .LC7(%rip), %r15
leaq 20(%rsp), %r14
.L27:
movl $23, %ecx
movl %ebx, %edx
movq %r15, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %r12, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %r14, %rsi
movq %rbp, %rdi
movl $0, %eax
call __isoc23_scanf@PLT
movl 20(%rsp), %eax
cmpl $23, %eax
jg .L27
testl %eax, %eax
je .L22
cmpl %ebx, %eax
jl .L27
jmp .L22
.L11:
movl $8, %ebx
leaq -32+cashiers_load_h(%rip), %r12
leaq .LC8(%rip), %rbp
leaq .LC9(%rip), %r13
jmp .L15
.L19:
addq $1, %rbx
cmpq $24, %rbx
je .L29
.L15:
leal -1(%rbx), %edx
movl (%r12,%rbx,4), %r8d
movl %ebx, %ecx
movq %rbp, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 8(%rsp), %rax
cmpl $1, -32(%rax,%rbx,4)
je .L19
movq %r13, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
jmp .L19
.L29:
leaq .LC10(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 24(%rsp), %rax
subq %fs:40, %rax
jne .L30
addq $40, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L30:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2273:
.size _Z12add_cachiersPi, .-_Z12add_cachiersPi
.section .rodata.str1.1
.LC11:
.string "Choose API type:\n"
.LC12:
.string "type 1 for HOST API\n"
.LC13:
.string "type 2 for SIMPLE DEVICE API\n"
.LC14:
.string "type 3 for ROBUST DEVICE API\n"
.text
.globl _Z12set_API_typev
.type _Z12set_API_typev, @function
_Z12set_API_typev:
.LFB2274:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $24, %rsp
.cfi_def_cfa_offset 64
movq %fs:40, %rax
movq %rax, 8(%rsp)
xorl %eax, %eax
leaq .LC11(%rip), %rsi
movl $2, %edi
call __printf_chk@PLT
leaq .LC12(%rip), %r13
leaq .LC13(%rip), %r12
leaq .LC14(%rip), %rbp
leaq .LC2(%rip), %rbx
.L32:
movq %r13, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %r12, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %rbp, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq 4(%rsp), %rsi
movq %rbx, %rdi
movl $0, %eax
call __isoc23_scanf@PLT
movl 4(%rsp), %eax
leal -1(%rax), %edx
cmpl $2, %edx
ja .L32
movl $1, %edx
cmpl $2, %eax
je .L31
cmpl $3, %eax
sete %dl
movzbl %dl, %edx
addl %edx, %edx
.L31:
movq 8(%rsp), %rax
subq %fs:40, %rax
jne .L38
movl %edx, %eax
addq $24, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L38:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2274:
.size _Z12set_API_typev, .-_Z12set_API_typev
.section .rodata.str1.1
.LC15:
.string "cashiers_load"
.text
.globl _Z8settingsv
.type _Z8settingsv, @function
_Z8settingsv:
.LFB2275:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL13cashiers_load(%rip), %rdi
call _Z12add_cachiersPi
movl $1, %r8d
movl $0, %ecx
movl $64, %edx
leaq cashiers_load_h(%rip), %rsi
leaq .LC15(%rip), %rdi
call cudaMemcpyToSymbol@PLT
call _Z15report_settingsv
call _Z12set_API_typev
movl %eax, api(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2275:
.size _Z8settingsv, .-_Z8settingsv
.section .rodata.str1.8
.align 8
.LC17:
.string "%2d:%02d # of waiting customers = %10.4g |"
.section .rodata.str1.1
.LC18:
.string " # of cashiers = %d | "
.LC19:
.string "# of new customers/min ~= "
.LC21:
.string "%2.2f\n"
.LC26:
.string "Wrong API\n"
.text
.globl _Z16print_statisticsPjm
.type _Z16print_statisticsPjm, @function
_Z16print_statisticsPjm:
.LFB2276:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $8, %rsp
.cfi_def_cfa_offset 48
movl report_break(%rip), %ebx
cmpl $960, %ebx
jg .L41
movq %rdi, %r12
movq %rsi, %r13
jmp .L42
.L47:
pxor %xmm0, %xmm0
cvtsi2ssl %ebx, %xmm0
cvtss2sd %xmm0, %xmm0
divsd .LC22(%rip), %xmm0
call sin@PLT
addsd .LC23(%rip), %xmm0
mulsd .LC20(%rip), %xmm0
leaq .LC21(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
.L50:
movl %ebx, %eax
addl report_break(%rip), %eax
movl %eax, %ebx
cmpl $960, %eax
jg .L41
.L42:
leal -1(%rbx), %ebp
movslq %ebp, %rdx
imulq %r13, %rdx
leaq (%r12,%rdx), %rax
leaq 16384(%r12,%rdx), %rsi
movl $0, %ecx
.L44:
addl (%rax), %ecx
addq $4, %rax
cmpq %rsi, %rax
jne .L44
movl %ecx, %edx
pxor %xmm0, %xmm0
cvtsi2ssq %rdx, %xmm0
cvtss2sd %xmm0, %xmm0
mulsd .LC16(%rip), %xmm0
movslq %ebx, %rax
imulq $-2004318071, %rax, %rax
shrq $32, %rax
addl %ebx, %eax
sarl $5, %eax
movl %ebx, %edx
sarl $31, %edx
subl %edx, %eax
imull $60, %eax, %edx
movl %ebx, %ecx
subl %edx, %ecx
leal 7(%rax), %edx
leaq .LC17(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movslq %ebp, %rax
imulq $-2004318071, %rax, %rax
shrq $32, %rax
addl %ebp, %eax
sarl $5, %eax
sarl $31, %ebp
subl %ebp, %eax
cltq
leaq cashiers_load_h(%rip), %rdx
movl (%rdx,%rax,4), %edx
leaq .LC18(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC19(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl api(%rip), %eax
cmpl $1, %eax
je .L47
cmpl $2, %eax
je .L48
testl %eax, %eax
jne .L49
movsd .LC20(%rip), %xmm0
leaq .LC21(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
jmp .L50
.L48:
cmpl $180, %ebx
jle .L56
cmpl $360, %ebx
jg .L52
movsd .LC23(%rip), %xmm0
leaq .LC21(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
jmp .L50
.L56:
movsd .LC24(%rip), %xmm0
leaq .LC21(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
jmp .L50
.L52:
movsd .LC25(%rip), %xmm0
leaq .LC21(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
jmp .L50
.L49:
leaq .LC26(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
jmp .L50
.L41:
addq $8, %rsp
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2276:
.size _Z16print_statisticsPjm, .-_Z16print_statisticsPjm
.globl _Z50__device_stub__Z12setup_kernelP17curandStateXORWOWP17curandStateXORWOW
.type _Z50__device_stub__Z12setup_kernelP17curandStateXORWOWP17curandStateXORWOW, @function
_Z50__device_stub__Z12setup_kernelP17curandStateXORWOWP17curandStateXORWOW:
.LFB2302:
.cfi_startproc
endbr64
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 8(%rsp)
movq %fs:40, %rax
movq %rax, 88(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L61
.L57:
movq 88(%rsp), %rax
subq %fs:40, %rax
jne .L62
addq $104, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L61:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 120
pushq 24(%rsp)
.cfi_def_cfa_offset 128
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z12setup_kernelP17curandStateXORWOW(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 112
jmp .L57
.L62:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2302:
.size _Z50__device_stub__Z12setup_kernelP17curandStateXORWOWP17curandStateXORWOW, .-_Z50__device_stub__Z12setup_kernelP17curandStateXORWOWP17curandStateXORWOW
.globl _Z12setup_kernelP17curandStateXORWOW
.type _Z12setup_kernelP17curandStateXORWOW, @function
_Z12setup_kernelP17curandStateXORWOW:
.LFB2303:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z50__device_stub__Z12setup_kernelP17curandStateXORWOWP17curandStateXORWOW
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2303:
.size _Z12setup_kernelP17curandStateXORWOW, .-_Z12setup_kernelP17curandStateXORWOW
.globl _Z65__device_stub__Z24simple_device_API_kernelP17curandStateXORWOWPjmP17curandStateXORWOWPjm
.type _Z65__device_stub__Z24simple_device_API_kernelP17curandStateXORWOWPjmP17curandStateXORWOWPjm, @function
_Z65__device_stub__Z24simple_device_API_kernelP17curandStateXORWOWPjmP17curandStateXORWOWPjm:
.LFB2304:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L69
.L65:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L70
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L69:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z24simple_device_API_kernelP17curandStateXORWOWPjm(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L65
.L70:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2304:
.size _Z65__device_stub__Z24simple_device_API_kernelP17curandStateXORWOWPjmP17curandStateXORWOWPjm, .-_Z65__device_stub__Z24simple_device_API_kernelP17curandStateXORWOWPjmP17curandStateXORWOWPjm
.globl _Z24simple_device_API_kernelP17curandStateXORWOWPjm
.type _Z24simple_device_API_kernelP17curandStateXORWOWPjm, @function
_Z24simple_device_API_kernelP17curandStateXORWOWPjm:
.LFB2305:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z65__device_stub__Z24simple_device_API_kernelP17curandStateXORWOWPjmP17curandStateXORWOWPjm
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2305:
.size _Z24simple_device_API_kernelP17curandStateXORWOWPjm, .-_Z24simple_device_API_kernelP17curandStateXORWOWPjm
.globl _Z38__device_stub__Z15host_API_kernelPjS_mPjS_m
.type _Z38__device_stub__Z15host_API_kernelPjS_mPjS_m, @function
_Z38__device_stub__Z15host_API_kernelPjS_mPjS_m:
.LFB2306:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L77
.L73:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L78
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L77:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z15host_API_kernelPjS_m(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L73
.L78:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2306:
.size _Z38__device_stub__Z15host_API_kernelPjS_mPjS_m, .-_Z38__device_stub__Z15host_API_kernelPjS_mPjS_m
.globl _Z15host_API_kernelPjS_m
.type _Z15host_API_kernelPjS_m, @function
_Z15host_API_kernelPjS_m:
.LFB2307:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z38__device_stub__Z15host_API_kernelPjS_mPjS_m
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2307:
.size _Z15host_API_kernelPjS_m, .-_Z15host_API_kernelPjS_m
.globl _Z103__device_stub__Z24robust_device_API_kernelP17curandStateXORWOWP29curandDiscreteDistribution_stS2_S2_PjmP17curandStateXORWOWP29curandDiscreteDistribution_stS2_S2_Pjm
.type _Z103__device_stub__Z24robust_device_API_kernelP17curandStateXORWOWP29curandDiscreteDistribution_stS2_S2_PjmP17curandStateXORWOWP29curandDiscreteDistribution_stS2_S2_Pjm, @function
_Z103__device_stub__Z24robust_device_API_kernelP17curandStateXORWOWP29curandDiscreteDistribution_stS2_S2_PjmP17curandStateXORWOWP29curandDiscreteDistribution_stS2_S2_Pjm:
.LFB2308:
.cfi_startproc
endbr64
subq $184, %rsp
.cfi_def_cfa_offset 192
movq %rdi, 40(%rsp)
movq %rsi, 32(%rsp)
movq %rdx, 24(%rsp)
movq %rcx, 16(%rsp)
movq %r8, 8(%rsp)
movq %r9, (%rsp)
movq %fs:40, %rax
movq %rax, 168(%rsp)
xorl %eax, %eax
leaq 40(%rsp), %rax
movq %rax, 112(%rsp)
leaq 32(%rsp), %rax
movq %rax, 120(%rsp)
leaq 24(%rsp), %rax
movq %rax, 128(%rsp)
leaq 16(%rsp), %rax
movq %rax, 136(%rsp)
leaq 8(%rsp), %rax
movq %rax, 144(%rsp)
movq %rsp, %rax
movq %rax, 152(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
leaq 56(%rsp), %rcx
leaq 48(%rsp), %rdx
leaq 76(%rsp), %rsi
leaq 64(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L85
.L81:
movq 168(%rsp), %rax
subq %fs:40, %rax
jne .L86
addq $184, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L85:
.cfi_restore_state
pushq 56(%rsp)
.cfi_def_cfa_offset 200
pushq 56(%rsp)
.cfi_def_cfa_offset 208
leaq 128(%rsp), %r9
movq 92(%rsp), %rcx
movl 100(%rsp), %r8d
movq 80(%rsp), %rsi
movl 88(%rsp), %edx
leaq _Z24robust_device_API_kernelP17curandStateXORWOWP29curandDiscreteDistribution_stS2_S2_Pjm(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 192
jmp .L81
.L86:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2308:
.size _Z103__device_stub__Z24robust_device_API_kernelP17curandStateXORWOWP29curandDiscreteDistribution_stS2_S2_PjmP17curandStateXORWOWP29curandDiscreteDistribution_stS2_S2_Pjm, .-_Z103__device_stub__Z24robust_device_API_kernelP17curandStateXORWOWP29curandDiscreteDistribution_stS2_S2_PjmP17curandStateXORWOWP29curandDiscreteDistribution_stS2_S2_Pjm
.globl _Z24robust_device_API_kernelP17curandStateXORWOWP29curandDiscreteDistribution_stS2_S2_Pjm
.type _Z24robust_device_API_kernelP17curandStateXORWOWP29curandDiscreteDistribution_stS2_S2_Pjm, @function
_Z24robust_device_API_kernelP17curandStateXORWOWP29curandDiscreteDistribution_stS2_S2_Pjm:
.LFB2309:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z103__device_stub__Z24robust_device_API_kernelP17curandStateXORWOWP29curandDiscreteDistribution_stS2_S2_PjmP17curandStateXORWOWP29curandDiscreteDistribution_stS2_S2_Pjm
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2309:
.size _Z24robust_device_API_kernelP17curandStateXORWOWP29curandDiscreteDistribution_stS2_S2_Pjm, .-_Z24robust_device_API_kernelP17curandStateXORWOWP29curandDiscreteDistribution_stS2_S2_Pjm
.section .rodata.str1.8
.align 8
.LC27:
.string "/home/ubuntu/Datasets/stackv2/train-structured/daodaoliang/HIP/master/tests/hipify-clang/unit_tests/libraries/cuRAND/poisson_api_example.cu"
.section .rodata.str1.1
.LC28:
.string "Error at %s:%d\n"
.text
.globl main
.type main, @function
main:
.LFB2277:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
subq $96, %rsp
.cfi_def_cfa_offset 112
movq %fs:40, %rax
movq %rax, 88(%rsp)
xorl %eax, %eax
call _Z8settingsv
movq %rsp, %rsi
leaq 16(%rsp), %rdi
movl $960, %ecx
movl $16384, %edx
call cudaMallocPitch@PLT
testl %eax, %eax
jne .L116
imulq $960, (%rsp), %rdi
movl $4, %esi
call calloc@PLT
movq %rax, %rbx
leaq 8(%rsp), %rdi
movl $196608, %esi
call cudaMalloc@PLT
testl %eax, %eax
jne .L117
cmpl $0, api(%rip)
jne .L118
.L93:
leaq 56(%rsp), %rdi
movl $100, %esi
call curandCreateGenerator@PLT
testl %eax, %eax
jne .L119
movl $1234, %esi
movq 56(%rsp), %rdi
call curandSetPseudoRandomGeneratorSeed@PLT
testl %eax, %eax
jne .L120
leaq 24(%rsp), %rdi
movl $15728640, %esi
call cudaMalloc@PLT
testl %eax, %eax
jne .L121
movsd .LC20(%rip), %xmm0
movl $3932160, %edx
movq 24(%rsp), %rsi
movq 56(%rsp), %rdi
call curandGeneratePoisson@PLT
testl %eax, %eax
jne .L122
movl $64, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
movl $64, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 76(%rsp), %rdx
movl $1, %ecx
movq 64(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L123
.L102:
movq 56(%rsp), %rdi
call curandDestroyGenerator@PLT
testl %eax, %eax
je .L103
movl $367, %ecx
leaq .LC27(%rip), %rdx
leaq .LC28(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
jmp .L89
.L116:
movl $322, %ecx
leaq .LC27(%rip), %rdx
leaq .LC28(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
.L89:
movq 88(%rsp), %rdx
subq %fs:40, %rdx
jne .L124
addq $96, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
ret
.L117:
.cfi_restore_state
movl $332, %ecx
leaq .LC27(%rip), %rdx
leaq .LC28(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
jmp .L89
.L118:
movl $64, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
movl $64, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 76(%rsp), %rdx
movl $1, %ecx
movq 64(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L125
.L94:
movl api(%rip), %eax
cmpl $2, %eax
je .L95
ja .L96
testl %eax, %eax
je .L93
movl $64, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
movl $64, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 76(%rsp), %rdx
movl $1, %ecx
movq 64(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
jne .L103
movq (%rsp), %rdx
movq 16(%rsp), %rsi
movq 8(%rsp), %rdi
call _Z65__device_stub__Z24simple_device_API_kernelP17curandStateXORWOWPjmP17curandStateXORWOWPjm
jmp .L103
.L125:
movq 8(%rsp), %rdi
call _Z50__device_stub__Z12setup_kernelP17curandStateXORWOWP17curandStateXORWOW
jmp .L94
.L119:
movl $346, %ecx
leaq .LC27(%rip), %rdx
leaq .LC28(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
jmp .L89
.L120:
movl $350, %ecx
leaq .LC27(%rip), %rdx
leaq .LC28(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
jmp .L89
.L121:
movl $356, %ecx
leaq .LC27(%rip), %rdx
leaq .LC28(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
jmp .L89
.L122:
movl $360, %ecx
leaq .LC27(%rip), %rdx
leaq .LC28(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
jmp .L89
.L123:
movq (%rsp), %rdx
movq 16(%rsp), %rsi
movq 24(%rsp), %rdi
call _Z38__device_stub__Z15host_API_kernelPjS_mPjS_m
jmp .L102
.L95:
leaq 32(%rsp), %rdi
movsd .LC23(%rip), %xmm0
call curandCreatePoissonDistribution@PLT
testl %eax, %eax
jne .L126
leaq 40(%rsp), %rdi
movsd .LC24(%rip), %xmm0
call curandCreatePoissonDistribution@PLT
testl %eax, %eax
jne .L127
leaq 48(%rsp), %rdi
movsd .LC25(%rip), %xmm0
call curandCreatePoissonDistribution@PLT
testl %eax, %eax
jne .L128
movl $64, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
movl $64, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 76(%rsp), %rdx
movl $1, %ecx
movq 64(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L129
.L108:
movq 32(%rsp), %rdi
call curandDestroyDistribution@PLT
testl %eax, %eax
jne .L130
movq 40(%rsp), %rdi
call curandDestroyDistribution@PLT
testl %eax, %eax
jne .L131
movq 48(%rsp), %rdi
call curandDestroyDistribution@PLT
testl %eax, %eax
je .L103
movl $397, %ecx
leaq .LC27(%rip), %rdx
leaq .LC28(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
jmp .L89
.L126:
movl $377, %ecx
leaq .LC27(%rip), %rdx
leaq .LC28(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
jmp .L89
.L127:
movl $381, %ecx
leaq .LC27(%rip), %rdx
leaq .LC28(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
jmp .L89
.L128:
movl $385, %ecx
leaq .LC27(%rip), %rdx
leaq .LC28(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
jmp .L89
.L129:
movq (%rsp), %r9
movq 16(%rsp), %r8
movq 48(%rsp), %rcx
movq 40(%rsp), %rdx
movq 32(%rsp), %rsi
movq 8(%rsp), %rdi
call _Z103__device_stub__Z24robust_device_API_kernelP17curandStateXORWOWP29curandDiscreteDistribution_stS2_S2_PjmP17curandStateXORWOWP29curandDiscreteDistribution_stS2_S2_Pjm
jmp .L108
.L130:
movl $395, %ecx
leaq .LC27(%rip), %rdx
leaq .LC28(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
jmp .L89
.L131:
movl $396, %ecx
leaq .LC27(%rip), %rdx
leaq .LC28(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
jmp .L89
.L96:
leaq .LC26(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
.L103:
movq (%rsp), %rsi
subq $8, %rsp
.cfi_def_cfa_offset 120
pushq $2
.cfi_def_cfa_offset 128
movl $960, %r9d
movl $16384, %r8d
movq %rsi, %rcx
movq 32(%rsp), %rdx
movq %rbx, %rdi
call cudaMemcpy2D@PLT
addq $16, %rsp
.cfi_def_cfa_offset 112
testl %eax, %eax
jne .L132
movq (%rsp), %rsi
movq %rbx, %rdi
call _Z16print_statisticsPjm
movq 8(%rsp), %rdi
call cudaFree@PLT
testl %eax, %eax
jne .L133
movq 16(%rsp), %rdi
call cudaFree@PLT
testl %eax, %eax
jne .L134
movq %rbx, %rdi
call free@PLT
movl $0, %eax
jmp .L89
.L132:
movl $405, %ecx
leaq .LC27(%rip), %rdx
leaq .LC28(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
jmp .L89
.L133:
movl $413, %ecx
leaq .LC27(%rip), %rdx
leaq .LC28(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
jmp .L89
.L134:
movl $414, %ecx
leaq .LC27(%rip), %rdx
leaq .LC28(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
jmp .L89
.L124:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2277:
.size main, .-main
.section .rodata.str1.8
.align 8
.LC29:
.string "_Z24robust_device_API_kernelP17curandStateXORWOWP29curandDiscreteDistribution_stS2_S2_Pjm"
.section .rodata.str1.1
.LC30:
.string "_Z15host_API_kernelPjS_m"
.section .rodata.str1.8
.align 8
.LC31:
.string "_Z24simple_device_API_kernelP17curandStateXORWOWPjm"
.align 8
.LC32:
.string "_Z12setup_kernelP17curandStateXORWOW"
.section .rodata.str1.1
.LC33:
.string "precalc_xorwow_matrix"
.LC34:
.string "precalc_xorwow_offset_matrix"
.LC35:
.string "mrg32k3aM1"
.LC36:
.string "mrg32k3aM2"
.LC37:
.string "mrg32k3aM1SubSeq"
.LC38:
.string "mrg32k3aM2SubSeq"
.LC39:
.string "mrg32k3aM1Seq"
.LC40:
.string "mrg32k3aM2Seq"
.LC41:
.string "__cr_lgamma_table"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2311:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rbx
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC29(%rip), %rdx
movq %rdx, %rcx
leaq _Z24robust_device_API_kernelP17curandStateXORWOWP29curandDiscreteDistribution_stS2_S2_Pjm(%rip), %rsi
movq %rax, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC30(%rip), %rdx
movq %rdx, %rcx
leaq _Z15host_API_kernelPjS_m(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC31(%rip), %rdx
movq %rdx, %rcx
leaq _Z24simple_device_API_kernelP17curandStateXORWOWPjm(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC32(%rip), %rdx
movq %rdx, %rcx
leaq _Z12setup_kernelP17curandStateXORWOW(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $102400, %r9d
movl $0, %r8d
leaq .LC33(%rip), %rdx
movq %rdx, %rcx
leaq _ZL21precalc_xorwow_matrix(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $102400, %r9d
movl $0, %r8d
leaq .LC34(%rip), %rdx
movq %rdx, %rcx
leaq _ZL28precalc_xorwow_offset_matrix(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $2304, %r9d
movl $0, %r8d
leaq .LC35(%rip), %rdx
movq %rdx, %rcx
leaq _ZL10mrg32k3aM1(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $2304, %r9d
movl $0, %r8d
leaq .LC36(%rip), %rdx
movq %rdx, %rcx
leaq _ZL10mrg32k3aM2(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $2016, %r9d
movl $0, %r8d
leaq .LC37(%rip), %rdx
movq %rdx, %rcx
leaq _ZL16mrg32k3aM1SubSeq(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $2016, %r9d
movl $0, %r8d
leaq .LC38(%rip), %rdx
movq %rdx, %rcx
leaq _ZL16mrg32k3aM2SubSeq(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $2304, %r9d
movl $0, %r8d
leaq .LC39(%rip), %rdx
movq %rdx, %rcx
leaq _ZL13mrg32k3aM1Seq(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
movl $2304, %r9d
movl $0, %r8d
leaq .LC40(%rip), %rdx
movq %rdx, %rcx
leaq _ZL13mrg32k3aM2Seq(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $1
.cfi_def_cfa_offset 32
movl $72, %r9d
movl $0, %r8d
leaq .LC41(%rip), %rdx
movq %rdx, %rcx
leaq _ZL17__cr_lgamma_table(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
pushq $0
.cfi_def_cfa_offset 24
pushq $1
.cfi_def_cfa_offset 32
movl $64, %r9d
movl $0, %r8d
leaq .LC15(%rip), %rdx
movq %rdx, %rcx
leaq _ZL13cashiers_load(%rip), %rsi
movq %rbx, %rdi
call __cudaRegisterVar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
popq %rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2311:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.local _ZL13cashiers_load
.comm _ZL13cashiers_load,64,32
.globl cashiers_load_h
.bss
.align 32
.type cashiers_load_h, @object
.size cashiers_load_h, 64
cashiers_load_h:
.zero 64
.globl report_break
.align 4
.type report_break, @object
.size report_break, 4
report_break:
.zero 4
.globl api
.align 4
.type api, @object
.size api, 4
api:
.zero 4
.local _ZL17__cr_lgamma_table
.comm _ZL17__cr_lgamma_table,72,32
.local _ZL13mrg32k3aM2Seq
.comm _ZL13mrg32k3aM2Seq,2304,32
.local _ZL13mrg32k3aM1Seq
.comm _ZL13mrg32k3aM1Seq,2304,32
.local _ZL16mrg32k3aM2SubSeq
.comm _ZL16mrg32k3aM2SubSeq,2016,32
.local _ZL16mrg32k3aM1SubSeq
.comm _ZL16mrg32k3aM1SubSeq,2016,32
.local _ZL10mrg32k3aM2
.comm _ZL10mrg32k3aM2,2304,32
.local _ZL10mrg32k3aM1
.comm _ZL10mrg32k3aM1,2304,32
.local _ZL28precalc_xorwow_offset_matrix
.comm _ZL28precalc_xorwow_offset_matrix,102400,32
.local _ZL21precalc_xorwow_matrix
.comm _ZL21precalc_xorwow_matrix,102400,32
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC16:
.long 0
.long 1060110336
.align 8
.LC20:
.long 0
.long 1074790400
.align 8
.LC22:
.long 0
.long 1079574528
.align 8
.LC23:
.long 0
.long 1072693248
.align 8
.LC24:
.long 0
.long 1073741824
.align 8
.LC25:
.long 0
.long 1074266112
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | // RUN: %run_test hipify "%s" "%t" %hipify_args %clang_args
// Taken from: http://docs.nvidia.com/cuda/curand/device-api-overview.html#poisson-api-example
/*
* This program uses CURAND library for Poisson distribution
* to simulate queues in store for 16 hours. It shows the
* difference of using 3 different APIs:
* - HOST API -arrival of customers is described by Poisson(4)
* - SIMPLE DEVICE API -arrival of customers is described by
* Poisson(4*(sin(x/100)+1)), where x is number of minutes
* from store opening time.
* - ROBUST DEVICE API -arrival of customers is described by:
* - Poisson(2) for first 3 hours.
* - Poisson(1) for second 3 hours.
* - Poisson(3) after 6 hours.
*/
#include <stdio.h>
#include <stdlib.h>
// CHECK: #include <hip/hip_runtime.h>
#include <cuda.h>
// CHECK: #include <hiprand_kernel.h>
#include <curand_kernel.h>
// CHECK: #include <hiprand.h>
#include <curand.h>
// CHECK: #define CUDA_CALL(x) do { if((x) != hipSuccess) {
#define CUDA_CALL(x) do { if((x) != cudaSuccess) { \
printf("Error at %s:%d\n",__FILE__,__LINE__); \
return EXIT_FAILURE;}} while(0)
// CHECK: #define CURAND_CALL(x) do { if((x)!=HIPRAND_STATUS_SUCCESS) {
#define CURAND_CALL(x) do { if((x)!=CURAND_STATUS_SUCCESS) { \
printf("Error at %s:%d\n",__FILE__,__LINE__);\
return EXIT_FAILURE;}} while(0)
#define HOURS 16
#define OPENING_HOUR 7
#define CLOSING_HOUR (OPENING_HOUR + HOURS)
#define access_2D(type, ptr, row, column, pitch)\
*((type*)((char*)ptr + (row) * pitch) + column)
enum API_TYPE {
HOST_API = 0,
SIMPLE_DEVICE_API = 1,
ROBUST_DEVICE_API = 2,
};
/* global variables */
API_TYPE api;
int report_break;
int cashiers_load_h[HOURS];
__constant__ int cashiers_load[HOURS];
// CHECK: __global__ void setup_kernel(hiprandState_t *state)
__global__ void setup_kernel(curandState *state)
{
int id = threadIdx.x + blockIdx.x * blockDim.x;
/* Each thread gets same seed, a different sequence
number, no offset */
// CHECK: hiprand_init(1234, id, 0, &state[id]);
curand_init(1234, id, 0, &state[id]);
}
__inline__ __device__
void update_queue(int id, int min, unsigned int new_customers,
unsigned int &queue_length,
unsigned int *queue_lengths, size_t pitch)
{
int balance;
balance = new_customers - 2 * cashiers_load[(min-1)/60];
if (balance + (int)queue_length <= 0){
queue_length = 0;
}else{
queue_length += balance;
}
/* Store results */
access_2D(unsigned int, queue_lengths, min-1, id, pitch)
= queue_length;
}
// CHECK: __global__ void simple_device_API_kernel(hiprandState_t *state,
__global__ void simple_device_API_kernel(curandState *state,
unsigned int *queue_lengths, size_t pitch)
{
int id = threadIdx.x + blockIdx.x * blockDim.x;
unsigned int new_customers;
unsigned int queue_length = 0;
/* Copy state to local memory for efficiency */
// CHECK: hiprandState_t localState = state[id];
curandState localState = state[id];
/* Simulate queue in time */
for(int min = 1; min <= 60 * HOURS; min++) {
/* Draw number of new customers depending on API */
// CHECK: new_customers = hiprand_poisson(&localState,
new_customers = curand_poisson(&localState,
4*(sin((float)min/100.0)+1));
/* Update queue */
update_queue(id, min, new_customers, queue_length,
queue_lengths, pitch);
}
/* Copy state back to global memory */
state[id] = localState;
}
__global__ void host_API_kernel(unsigned int *poisson_numbers,
unsigned int *queue_lengths, size_t pitch)
{
int id = threadIdx.x + blockIdx.x * blockDim.x;
unsigned int new_customers;
unsigned int queue_length = 0;
/* Simulate queue in time */
for(int min = 1; min <= 60 * HOURS; min++) {
/* Get random number from global memory */
new_customers = poisson_numbers
[blockDim.x * gridDim.x * (min -1) + id];
/* Update queue */
update_queue(id, min, new_customers, queue_length,
queue_lengths, pitch);
}
}
// CHECK: __global__ void robust_device_API_kernel(hiprandState_t *state,
// CHECK: hiprandDiscreteDistribution_t poisson_1,
// CHECK: hiprandDiscreteDistribution_t poisson_2,
// CHECK: hiprandDiscreteDistribution_t poisson_3,
__global__ void robust_device_API_kernel(curandState *state,
curandDiscreteDistribution_t poisson_1,
curandDiscreteDistribution_t poisson_2,
curandDiscreteDistribution_t poisson_3,
unsigned int *queue_lengths, size_t pitch)
{
int id = threadIdx.x + blockIdx.x * 64;
unsigned int new_customers;
unsigned int queue_length = 0;
/* Copy state to local memory for efficiency */
// CHECK: hiprandState_t localState = state[id];
curandState localState = state[id];
/* Simulate queue in time */
/* first 3 hours */
for(int min = 1; min <= 60 * 3; min++) {
/* draw number of new customers depending on API */
new_customers =
// CHECK: hiprand_discrete(&localState, poisson_2);
curand_discrete(&localState, poisson_2);
/* Update queue */
update_queue(id, min, new_customers, queue_length,
queue_lengths, pitch);
}
/* second 3 hours */
for(int min = 60 * 3 + 1; min <= 60 * 6; min++) {
/* draw number of new customers depending on API */
new_customers =
// CHECK: hiprand_discrete(&localState, poisson_1);
curand_discrete(&localState, poisson_1);
/* Update queue */
update_queue(id, min, new_customers, queue_length,
queue_lengths, pitch);
}
/* after 6 hours */
for(int min = 60 * 6 + 1; min <= 60 * HOURS; min++) {
/* draw number of new customers depending on API */
new_customers =
// CHECK: hiprand_discrete(&localState, poisson_3);
curand_discrete(&localState, poisson_3);
/* Update queue */
update_queue(id, min, new_customers, queue_length,
queue_lengths, pitch);
}
/* Copy state back to global memory */
state[id] = localState;
}
/* Set time intervals between reports */
void report_settings()
{
do{
printf("Set time intervals between queue reports");
printf("(in minutes > 0)\n");
if (scanf("%d", &report_break) == 0) continue;
}while(report_break <= 0);
}
/* Set number of cashiers each hour */
void add_cachiers(int *cashiers_load)
{
int i, min, max, begin, end;
printf("Cashier serves 2 customers per minute...\n");
for (i = 0; i < HOURS; i++){
cashiers_load_h[i] = 0;
}
while (true){
printf("Adding cashier...\n");
min = OPENING_HOUR;
max = CLOSING_HOUR-1;
do{
printf("Set hour that cahier comes (%d-%d)",
min, max);
printf(" [type 0 to finish adding cashiers]\n");
if (scanf("%d", &begin) == 0) continue;
}while (begin > max || (begin < min && begin != 0));
if (begin == 0) break;
min = begin+1;
max = CLOSING_HOUR;
do{
printf("Set hour that cahier leaves (%d-%d)",
min, max);
printf(" [type 0 to finish adding cashiers]\n");
if (scanf("%d", &end) == 0) continue;
}while (end > max || (end < min && end != 0));
if (end == 0) break;
for (i = begin - OPENING_HOUR;
i < end - OPENING_HOUR; i++){
cashiers_load_h[i]++;
}
}
for (i = OPENING_HOUR; i < CLOSING_HOUR; i++){
printf("\n%2d:00 - %2d:00 %d cashier",
i, i+1, cashiers_load_h[i-OPENING_HOUR]);
if (cashiers_load[i-OPENING_HOUR] != 1) printf("s");
}
printf("\n");
}
/* Set API type */
API_TYPE set_API_type()
{
printf("Choose API type:\n");
int choose;
do{
printf("type 1 for HOST API\n");
printf("type 2 for SIMPLE DEVICE API\n");
printf("type 3 for ROBUST DEVICE API\n");
if (scanf("%d", &choose) == 0) continue;
}while( choose < 1 || choose > 3);
switch(choose){
case 1: return HOST_API;
case 2: return SIMPLE_DEVICE_API;
case 3: return ROBUST_DEVICE_API;
default:
fprintf(stderr, "wrong API\n");
return HOST_API;
}
}
void settings()
{
add_cachiers(cashiers_load);
// CHECK: hipMemcpyToSymbol("cashiers_load", cashiers_load_h,
// CHECK: HOURS * sizeof(int), 0, hipMemcpyHostToDevice);
cudaMemcpyToSymbol("cashiers_load", cashiers_load_h,
HOURS * sizeof(int), 0, cudaMemcpyHostToDevice);
report_settings();
api = set_API_type();
}
void print_statistics(unsigned int *hostResults, size_t pitch)
{
int min, i, hour, minute;
unsigned int sum;
for(min = report_break; min <= 60 * HOURS;
min += report_break) {
sum = 0;
for(i = 0; i < 64 * 64; i++) {
sum += access_2D(unsigned int, hostResults,
min-1, i, pitch);
}
hour = OPENING_HOUR + min/60;
minute = min%60;
printf("%2d:%02d # of waiting customers = %10.4g |",
hour, minute, (float)sum/(64.0 * 64.0));
printf(" # of cashiers = %d | ",
cashiers_load_h[(min-1)/60]);
printf("# of new customers/min ~= ");
switch (api){
case HOST_API:
printf("%2.2f\n", 4.0);
break;
case SIMPLE_DEVICE_API:
printf("%2.2f\n",
4*(sin((float)min/100.0)+1));
break;
case ROBUST_DEVICE_API:
if (min <= 3 * 60){
printf("%2.2f\n", 2.0);
}else{
if (min <= 6 * 60){
printf("%2.2f\n", 1.0);
}else{
printf("%2.2f\n", 3.0);
}
}
break;
default:
fprintf(stderr, "Wrong API\n");
}
}
}
int main(int argc, char *argv[])
{
int n;
size_t pitch;
// CHECK: hiprandState_t *devStates;
curandState *devStates;
unsigned int *devResults, *hostResults;
unsigned int *poisson_numbers_d;
// CHECK: hiprandDiscreteDistribution_t poisson_1, poisson_2;
// CHECK: hiprandDiscreteDistribution_t poisson_3;
// CHECK: hiprandGenerator_t gen;
curandDiscreteDistribution_t poisson_1, poisson_2;
curandDiscreteDistribution_t poisson_3;
curandGenerator_t gen;
/* Setting cashiers, report and API */
settings();
/* Allocate space for results on device */
// CHECK: CUDA_CALL(hipMallocPitch((void **)&devResults, &pitch,
CUDA_CALL(cudaMallocPitch((void **)&devResults, &pitch,
64 * 64 * sizeof(unsigned int), 60 * HOURS));
/* Allocate space for results on host */
hostResults = (unsigned int *)calloc(pitch * 60 * HOURS,
sizeof(unsigned int));
/* Allocate space for prng states on device */
// CHECK: CUDA_CALL(hipMalloc((void **)&devStates, 64 * 64 *
// CHECK: sizeof(hiprandState_t)));
CUDA_CALL(cudaMalloc((void **)&devStates, 64 * 64 *
sizeof(curandState)));
/* Setup prng states */
if (api != HOST_API){
// CHECK: hipLaunchKernelGGL(setup_kernel, dim3(64), dim3(64), 0, 0, devStates);
setup_kernel<<<64, 64>>>(devStates);
}
/* Simulate queue */
switch (api){
case HOST_API:
/* Create pseudo-random number generator */
// CHECK: CURAND_CALL(hiprandCreateGenerator(&gen,
// CHECK: HIPRAND_RNG_PSEUDO_DEFAULT));
CURAND_CALL(curandCreateGenerator(&gen,
CURAND_RNG_PSEUDO_DEFAULT));
/* Set seed */
// CHECK: CURAND_CALL(hiprandSetPseudoRandomGeneratorSeed(
CURAND_CALL(curandSetPseudoRandomGeneratorSeed(
gen, 1234ULL));
/* compute n */
n = 64 * 64 * HOURS * 60;
/* Allocate n unsigned ints on device */
// CHECK: CUDA_CALL(hipMalloc((void **)&poisson_numbers_d,
CUDA_CALL(cudaMalloc((void **)&poisson_numbers_d,
n * sizeof(unsigned int)));
/* Generate n unsigned ints on device */
// CHECK: CURAND_CALL(hiprandGeneratePoisson(gen,
CURAND_CALL(curandGeneratePoisson(gen,
poisson_numbers_d, n, 4.0));
// CHECK: hipLaunchKernelGGL(host_API_kernel, dim3(64), dim3(64), 0, 0, poisson_numbers_d,
host_API_kernel<<<64, 64>>>(poisson_numbers_d,
devResults, pitch);
/* Cleanup */
// CHECK: CURAND_CALL(hiprandDestroyGenerator(gen));
CURAND_CALL(curandDestroyGenerator(gen));
break;
case SIMPLE_DEVICE_API:
// CHECK: hipLaunchKernelGGL(simple_device_API_kernel, dim3(64), dim3(64), 0, 0, devStates,
simple_device_API_kernel<<<64, 64>>>(devStates,
devResults, pitch);
break;
case ROBUST_DEVICE_API:
/* Create histograms for Poisson(1) */
// CHECK: CURAND_CALL(hiprandCreatePoissonDistribution(1.0,
CURAND_CALL(curandCreatePoissonDistribution(1.0,
&poisson_1));
/* Create histograms for Poisson(2) */
// CHECK: CURAND_CALL(hiprandCreatePoissonDistribution(2.0,
CURAND_CALL(curandCreatePoissonDistribution(2.0,
&poisson_2));
/* Create histograms for Poisson(3) */
// CHECK: CURAND_CALL(hiprandCreatePoissonDistribution(3.0,
CURAND_CALL(curandCreatePoissonDistribution(3.0,
&poisson_3));
// CHECK: hipLaunchKernelGGL(robust_device_API_kernel, dim3(64), dim3(64), 0, 0, devStates,
robust_device_API_kernel<<<64, 64>>>(devStates,
poisson_1, poisson_2, poisson_3,
devResults, pitch);
/* Cleanup */
// CHECK: CURAND_CALL(hiprandDestroyDistribution(poisson_1));
// CHECK: CURAND_CALL(hiprandDestroyDistribution(poisson_2));
// CHECK: CURAND_CALL(hiprandDestroyDistribution(poisson_3));
CURAND_CALL(curandDestroyDistribution(poisson_1));
CURAND_CALL(curandDestroyDistribution(poisson_2));
CURAND_CALL(curandDestroyDistribution(poisson_3));
break;
default:
fprintf(stderr, "Wrong API\n");
}
/* Copy device memory to host */
// CHECK: CUDA_CALL(hipMemcpy2D(hostResults, pitch, devResults,
// CHECK: 60 * HOURS, hipMemcpyDeviceToHost));
CUDA_CALL(cudaMemcpy2D(hostResults, pitch, devResults,
pitch, 64 * 64 * sizeof(unsigned int),
60 * HOURS, cudaMemcpyDeviceToHost));
/* Show result */
print_statistics(hostResults, pitch);
/* Cleanup */
// CHECK: CUDA_CALL(hipFree(devStates));
// CHECK: CUDA_CALL(hipFree(devResults));
CUDA_CALL(cudaFree(devStates));
CUDA_CALL(cudaFree(devResults));
free(hostResults);
return EXIT_SUCCESS;
} | // RUN: %run_test hipify "%s" "%t" %hipify_args %clang_args
// Taken from: http://docs.nvidia.com/cuda/curand/device-api-overview.html#poisson-api-example
/*
* This program uses CURAND library for Poisson distribution
* to simulate queues in store for 16 hours. It shows the
* difference of using 3 different APIs:
* - HOST API -arrival of customers is described by Poisson(4)
* - SIMPLE DEVICE API -arrival of customers is described by
* Poisson(4*(sin(x/100)+1)), where x is number of minutes
* from store opening time.
* - ROBUST DEVICE API -arrival of customers is described by:
* - Poisson(2) for first 3 hours.
* - Poisson(1) for second 3 hours.
* - Poisson(3) after 6 hours.
*/
#include <stdio.h>
#include <stdlib.h>
// CHECK: #include <hip/hip_runtime.h>
#include <hip/hip_runtime.h>
// CHECK: #include <hiprand_kernel.h>
#include <hiprand/hiprand_kernel.h>
// CHECK: #include <hiprand.h>
#include <hiprand/hiprand.h>
// CHECK: #define CUDA_CALL(x) do { if((x) != hipSuccess) {
#define CUDA_CALL(x) do { if((x) != hipSuccess) { \
printf("Error at %s:%d\n",__FILE__,__LINE__); \
return EXIT_FAILURE;}} while(0)
// CHECK: #define CURAND_CALL(x) do { if((x)!=HIPRAND_STATUS_SUCCESS) {
#define CURAND_CALL(x) do { if((x)!=HIPRAND_STATUS_SUCCESS) { \
printf("Error at %s:%d\n",__FILE__,__LINE__);\
return EXIT_FAILURE;}} while(0)
#define HOURS 16
#define OPENING_HOUR 7
#define CLOSING_HOUR (OPENING_HOUR + HOURS)
#define access_2D(type, ptr, row, column, pitch)\
*((type*)((char*)ptr + (row) * pitch) + column)
enum API_TYPE {
HOST_API = 0,
SIMPLE_DEVICE_API = 1,
ROBUST_DEVICE_API = 2,
};
/* global variables */
API_TYPE api;
int report_break;
int cashiers_load_h[HOURS];
__constant__ int cashiers_load[HOURS];
// CHECK: __global__ void setup_kernel(hiprandState_t *state)
__global__ void setup_kernel(hiprandState *state)
{
int id = threadIdx.x + blockIdx.x * blockDim.x;
/* Each thread gets same seed, a different sequence
number, no offset */
// CHECK: hiprand_init(1234, id, 0, &state[id]);
hiprand_init(1234, id, 0, &state[id]);
}
__inline__ __device__
void update_queue(int id, int min, unsigned int new_customers,
unsigned int &queue_length,
unsigned int *queue_lengths, size_t pitch)
{
int balance;
balance = new_customers - 2 * cashiers_load[(min-1)/60];
if (balance + (int)queue_length <= 0){
queue_length = 0;
}else{
queue_length += balance;
}
/* Store results */
access_2D(unsigned int, queue_lengths, min-1, id, pitch)
= queue_length;
}
// CHECK: __global__ void simple_device_API_kernel(hiprandState_t *state,
__global__ void simple_device_API_kernel(hiprandState *state,
unsigned int *queue_lengths, size_t pitch)
{
int id = threadIdx.x + blockIdx.x * blockDim.x;
unsigned int new_customers;
unsigned int queue_length = 0;
/* Copy state to local memory for efficiency */
// CHECK: hiprandState_t localState = state[id];
hiprandState localState = state[id];
/* Simulate queue in time */
for(int min = 1; min <= 60 * HOURS; min++) {
/* Draw number of new customers depending on API */
// CHECK: new_customers = hiprand_poisson(&localState,
new_customers = hiprand_poisson(&localState,
4*(sin((float)min/100.0)+1));
/* Update queue */
update_queue(id, min, new_customers, queue_length,
queue_lengths, pitch);
}
/* Copy state back to global memory */
state[id] = localState;
}
__global__ void host_API_kernel(unsigned int *poisson_numbers,
unsigned int *queue_lengths, size_t pitch)
{
int id = threadIdx.x + blockIdx.x * blockDim.x;
unsigned int new_customers;
unsigned int queue_length = 0;
/* Simulate queue in time */
for(int min = 1; min <= 60 * HOURS; min++) {
/* Get random number from global memory */
new_customers = poisson_numbers
[blockDim.x * gridDim.x * (min -1) + id];
/* Update queue */
update_queue(id, min, new_customers, queue_length,
queue_lengths, pitch);
}
}
// CHECK: __global__ void robust_device_API_kernel(hiprandState_t *state,
// CHECK: hiprandDiscreteDistribution_t poisson_1,
// CHECK: hiprandDiscreteDistribution_t poisson_2,
// CHECK: hiprandDiscreteDistribution_t poisson_3,
__global__ void robust_device_API_kernel(hiprandState *state,
hiprandDiscreteDistribution_t poisson_1,
hiprandDiscreteDistribution_t poisson_2,
hiprandDiscreteDistribution_t poisson_3,
unsigned int *queue_lengths, size_t pitch)
{
int id = threadIdx.x + blockIdx.x * 64;
unsigned int new_customers;
unsigned int queue_length = 0;
/* Copy state to local memory for efficiency */
// CHECK: hiprandState_t localState = state[id];
hiprandState localState = state[id];
/* Simulate queue in time */
/* first 3 hours */
for(int min = 1; min <= 60 * 3; min++) {
/* draw number of new customers depending on API */
new_customers =
// CHECK: hiprand_discrete(&localState, poisson_2);
hiprand_discrete(&localState, poisson_2);
/* Update queue */
update_queue(id, min, new_customers, queue_length,
queue_lengths, pitch);
}
/* second 3 hours */
for(int min = 60 * 3 + 1; min <= 60 * 6; min++) {
/* draw number of new customers depending on API */
new_customers =
// CHECK: hiprand_discrete(&localState, poisson_1);
hiprand_discrete(&localState, poisson_1);
/* Update queue */
update_queue(id, min, new_customers, queue_length,
queue_lengths, pitch);
}
/* after 6 hours */
for(int min = 60 * 6 + 1; min <= 60 * HOURS; min++) {
/* draw number of new customers depending on API */
new_customers =
// CHECK: hiprand_discrete(&localState, poisson_3);
hiprand_discrete(&localState, poisson_3);
/* Update queue */
update_queue(id, min, new_customers, queue_length,
queue_lengths, pitch);
}
/* Copy state back to global memory */
state[id] = localState;
}
/* Set time intervals between reports */
void report_settings()
{
do{
printf("Set time intervals between queue reports");
printf("(in minutes > 0)\n");
if (scanf("%d", &report_break) == 0) continue;
}while(report_break <= 0);
}
/* Set number of cashiers each hour */
void add_cachiers(int *cashiers_load)
{
int i, min, max, begin, end;
printf("Cashier serves 2 customers per minute...\n");
for (i = 0; i < HOURS; i++){
cashiers_load_h[i] = 0;
}
while (true){
printf("Adding cashier...\n");
min = OPENING_HOUR;
max = CLOSING_HOUR-1;
do{
printf("Set hour that cahier comes (%d-%d)",
min, max);
printf(" [type 0 to finish adding cashiers]\n");
if (scanf("%d", &begin) == 0) continue;
}while (begin > max || (begin < min && begin != 0));
if (begin == 0) break;
min = begin+1;
max = CLOSING_HOUR;
do{
printf("Set hour that cahier leaves (%d-%d)",
min, max);
printf(" [type 0 to finish adding cashiers]\n");
if (scanf("%d", &end) == 0) continue;
}while (end > max || (end < min && end != 0));
if (end == 0) break;
for (i = begin - OPENING_HOUR;
i < end - OPENING_HOUR; i++){
cashiers_load_h[i]++;
}
}
for (i = OPENING_HOUR; i < CLOSING_HOUR; i++){
printf("\n%2d:00 - %2d:00 %d cashier",
i, i+1, cashiers_load_h[i-OPENING_HOUR]);
if (cashiers_load[i-OPENING_HOUR] != 1) printf("s");
}
printf("\n");
}
/* Set API type */
API_TYPE set_API_type()
{
printf("Choose API type:\n");
int choose;
do{
printf("type 1 for HOST API\n");
printf("type 2 for SIMPLE DEVICE API\n");
printf("type 3 for ROBUST DEVICE API\n");
if (scanf("%d", &choose) == 0) continue;
}while( choose < 1 || choose > 3);
switch(choose){
case 1: return HOST_API;
case 2: return SIMPLE_DEVICE_API;
case 3: return ROBUST_DEVICE_API;
default:
fprintf(stderr, "wrong API\n");
return HOST_API;
}
}
void settings()
{
add_cachiers(cashiers_load);
// CHECK: hipMemcpyToSymbol("cashiers_load", cashiers_load_h,
// CHECK: HOURS * sizeof(int), 0, hipMemcpyHostToDevice);
hipMemcpyToSymbol(HIP_SYMBOL("cashiers_load"), cashiers_load_h,
HOURS * sizeof(int), 0, hipMemcpyHostToDevice);
report_settings();
api = set_API_type();
}
void print_statistics(unsigned int *hostResults, size_t pitch)
{
int min, i, hour, minute;
unsigned int sum;
for(min = report_break; min <= 60 * HOURS;
min += report_break) {
sum = 0;
for(i = 0; i < 64 * 64; i++) {
sum += access_2D(unsigned int, hostResults,
min-1, i, pitch);
}
hour = OPENING_HOUR + min/60;
minute = min%60;
printf("%2d:%02d # of waiting customers = %10.4g |",
hour, minute, (float)sum/(64.0 * 64.0));
printf(" # of cashiers = %d | ",
cashiers_load_h[(min-1)/60]);
printf("# of new customers/min ~= ");
switch (api){
case HOST_API:
printf("%2.2f\n", 4.0);
break;
case SIMPLE_DEVICE_API:
printf("%2.2f\n",
4*(sin((float)min/100.0)+1));
break;
case ROBUST_DEVICE_API:
if (min <= 3 * 60){
printf("%2.2f\n", 2.0);
}else{
if (min <= 6 * 60){
printf("%2.2f\n", 1.0);
}else{
printf("%2.2f\n", 3.0);
}
}
break;
default:
fprintf(stderr, "Wrong API\n");
}
}
}
int main(int argc, char *argv[])
{
int n;
size_t pitch;
// CHECK: hiprandState_t *devStates;
hiprandState *devStates;
unsigned int *devResults, *hostResults;
unsigned int *poisson_numbers_d;
// CHECK: hiprandDiscreteDistribution_t poisson_1, poisson_2;
// CHECK: hiprandDiscreteDistribution_t poisson_3;
// CHECK: hiprandGenerator_t gen;
hiprandDiscreteDistribution_t poisson_1, poisson_2;
hiprandDiscreteDistribution_t poisson_3;
hiprandGenerator_t gen;
/* Setting cashiers, report and API */
settings();
/* Allocate space for results on device */
// CHECK: CUDA_CALL(hipMallocPitch((void **)&devResults, &pitch,
CUDA_CALL(hipMallocPitch((void **)&devResults, &pitch,
64 * 64 * sizeof(unsigned int), 60 * HOURS));
/* Allocate space for results on host */
hostResults = (unsigned int *)calloc(pitch * 60 * HOURS,
sizeof(unsigned int));
/* Allocate space for prng states on device */
// CHECK: CUDA_CALL(hipMalloc((void **)&devStates, 64 * 64 *
// CHECK: sizeof(hiprandState_t)));
CUDA_CALL(hipMalloc((void **)&devStates, 64 * 64 *
sizeof(hiprandState)));
/* Setup prng states */
if (api != HOST_API){
// CHECK: hipLaunchKernelGGL(setup_kernel, dim3(64), dim3(64), 0, 0, devStates);
setup_kernel<<<64, 64>>>(devStates);
}
/* Simulate queue */
switch (api){
case HOST_API:
/* Create pseudo-random number generator */
// CHECK: CURAND_CALL(hiprandCreateGenerator(&gen,
// CHECK: HIPRAND_RNG_PSEUDO_DEFAULT));
CURAND_CALL(hiprandCreateGenerator(&gen,
HIPRAND_RNG_PSEUDO_DEFAULT));
/* Set seed */
// CHECK: CURAND_CALL(hiprandSetPseudoRandomGeneratorSeed(
CURAND_CALL(hiprandSetPseudoRandomGeneratorSeed(
gen, 1234ULL));
/* compute n */
n = 64 * 64 * HOURS * 60;
/* Allocate n unsigned ints on device */
// CHECK: CUDA_CALL(hipMalloc((void **)&poisson_numbers_d,
CUDA_CALL(hipMalloc((void **)&poisson_numbers_d,
n * sizeof(unsigned int)));
/* Generate n unsigned ints on device */
// CHECK: CURAND_CALL(hiprandGeneratePoisson(gen,
CURAND_CALL(hiprandGeneratePoisson(gen,
poisson_numbers_d, n, 4.0));
// CHECK: hipLaunchKernelGGL(host_API_kernel, dim3(64), dim3(64), 0, 0, poisson_numbers_d,
host_API_kernel<<<64, 64>>>(poisson_numbers_d,
devResults, pitch);
/* Cleanup */
// CHECK: CURAND_CALL(hiprandDestroyGenerator(gen));
CURAND_CALL(hiprandDestroyGenerator(gen));
break;
case SIMPLE_DEVICE_API:
// CHECK: hipLaunchKernelGGL(simple_device_API_kernel, dim3(64), dim3(64), 0, 0, devStates,
simple_device_API_kernel<<<64, 64>>>(devStates,
devResults, pitch);
break;
case ROBUST_DEVICE_API:
/* Create histograms for Poisson(1) */
// CHECK: CURAND_CALL(hiprandCreatePoissonDistribution(1.0,
CURAND_CALL(hiprandCreatePoissonDistribution(1.0,
&poisson_1));
/* Create histograms for Poisson(2) */
// CHECK: CURAND_CALL(hiprandCreatePoissonDistribution(2.0,
CURAND_CALL(hiprandCreatePoissonDistribution(2.0,
&poisson_2));
/* Create histograms for Poisson(3) */
// CHECK: CURAND_CALL(hiprandCreatePoissonDistribution(3.0,
CURAND_CALL(hiprandCreatePoissonDistribution(3.0,
&poisson_3));
// CHECK: hipLaunchKernelGGL(robust_device_API_kernel, dim3(64), dim3(64), 0, 0, devStates,
robust_device_API_kernel<<<64, 64>>>(devStates,
poisson_1, poisson_2, poisson_3,
devResults, pitch);
/* Cleanup */
// CHECK: CURAND_CALL(hiprandDestroyDistribution(poisson_1));
// CHECK: CURAND_CALL(hiprandDestroyDistribution(poisson_2));
// CHECK: CURAND_CALL(hiprandDestroyDistribution(poisson_3));
CURAND_CALL(hiprandDestroyDistribution(poisson_1));
CURAND_CALL(hiprandDestroyDistribution(poisson_2));
CURAND_CALL(hiprandDestroyDistribution(poisson_3));
break;
default:
fprintf(stderr, "Wrong API\n");
}
/* Copy device memory to host */
// CHECK: CUDA_CALL(hipMemcpy2D(hostResults, pitch, devResults,
// CHECK: 60 * HOURS, hipMemcpyDeviceToHost));
CUDA_CALL(hipMemcpy2D(hostResults, pitch, devResults,
pitch, 64 * 64 * sizeof(unsigned int),
60 * HOURS, hipMemcpyDeviceToHost));
/* Show result */
print_statistics(hostResults, pitch);
/* Cleanup */
// CHECK: CUDA_CALL(hipFree(devStates));
// CHECK: CUDA_CALL(hipFree(devResults));
CUDA_CALL(hipFree(devStates));
CUDA_CALL(hipFree(devResults));
free(hostResults);
return EXIT_SUCCESS;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | // RUN: %run_test hipify "%s" "%t" %hipify_args %clang_args
// Taken from: http://docs.nvidia.com/cuda/curand/device-api-overview.html#poisson-api-example
/*
* This program uses CURAND library for Poisson distribution
* to simulate queues in store for 16 hours. It shows the
* difference of using 3 different APIs:
* - HOST API -arrival of customers is described by Poisson(4)
* - SIMPLE DEVICE API -arrival of customers is described by
* Poisson(4*(sin(x/100)+1)), where x is number of minutes
* from store opening time.
* - ROBUST DEVICE API -arrival of customers is described by:
* - Poisson(2) for first 3 hours.
* - Poisson(1) for second 3 hours.
* - Poisson(3) after 6 hours.
*/
#include <stdio.h>
#include <stdlib.h>
// CHECK: #include <hip/hip_runtime.h>
#include <hip/hip_runtime.h>
// CHECK: #include <hiprand_kernel.h>
#include <hiprand/hiprand_kernel.h>
// CHECK: #include <hiprand.h>
#include <hiprand/hiprand.h>
// CHECK: #define CUDA_CALL(x) do { if((x) != hipSuccess) {
#define CUDA_CALL(x) do { if((x) != hipSuccess) { \
printf("Error at %s:%d\n",__FILE__,__LINE__); \
return EXIT_FAILURE;}} while(0)
// CHECK: #define CURAND_CALL(x) do { if((x)!=HIPRAND_STATUS_SUCCESS) {
#define CURAND_CALL(x) do { if((x)!=HIPRAND_STATUS_SUCCESS) { \
printf("Error at %s:%d\n",__FILE__,__LINE__);\
return EXIT_FAILURE;}} while(0)
#define HOURS 16
#define OPENING_HOUR 7
#define CLOSING_HOUR (OPENING_HOUR + HOURS)
#define access_2D(type, ptr, row, column, pitch)\
*((type*)((char*)ptr + (row) * pitch) + column)
enum API_TYPE {
HOST_API = 0,
SIMPLE_DEVICE_API = 1,
ROBUST_DEVICE_API = 2,
};
/* global variables */
API_TYPE api;
int report_break;
int cashiers_load_h[HOURS];
__constant__ int cashiers_load[HOURS];
// CHECK: __global__ void setup_kernel(hiprandState_t *state)
__global__ void setup_kernel(hiprandState *state)
{
int id = threadIdx.x + blockIdx.x * blockDim.x;
/* Each thread gets same seed, a different sequence
number, no offset */
// CHECK: hiprand_init(1234, id, 0, &state[id]);
hiprand_init(1234, id, 0, &state[id]);
}
__inline__ __device__
void update_queue(int id, int min, unsigned int new_customers,
unsigned int &queue_length,
unsigned int *queue_lengths, size_t pitch)
{
int balance;
balance = new_customers - 2 * cashiers_load[(min-1)/60];
if (balance + (int)queue_length <= 0){
queue_length = 0;
}else{
queue_length += balance;
}
/* Store results */
access_2D(unsigned int, queue_lengths, min-1, id, pitch)
= queue_length;
}
// CHECK: __global__ void simple_device_API_kernel(hiprandState_t *state,
__global__ void simple_device_API_kernel(hiprandState *state,
unsigned int *queue_lengths, size_t pitch)
{
int id = threadIdx.x + blockIdx.x * blockDim.x;
unsigned int new_customers;
unsigned int queue_length = 0;
/* Copy state to local memory for efficiency */
// CHECK: hiprandState_t localState = state[id];
hiprandState localState = state[id];
/* Simulate queue in time */
for(int min = 1; min <= 60 * HOURS; min++) {
/* Draw number of new customers depending on API */
// CHECK: new_customers = hiprand_poisson(&localState,
new_customers = hiprand_poisson(&localState,
4*(sin((float)min/100.0)+1));
/* Update queue */
update_queue(id, min, new_customers, queue_length,
queue_lengths, pitch);
}
/* Copy state back to global memory */
state[id] = localState;
}
__global__ void host_API_kernel(unsigned int *poisson_numbers,
unsigned int *queue_lengths, size_t pitch)
{
int id = threadIdx.x + blockIdx.x * blockDim.x;
unsigned int new_customers;
unsigned int queue_length = 0;
/* Simulate queue in time */
for(int min = 1; min <= 60 * HOURS; min++) {
/* Get random number from global memory */
new_customers = poisson_numbers
[blockDim.x * gridDim.x * (min -1) + id];
/* Update queue */
update_queue(id, min, new_customers, queue_length,
queue_lengths, pitch);
}
}
// CHECK: __global__ void robust_device_API_kernel(hiprandState_t *state,
// CHECK: hiprandDiscreteDistribution_t poisson_1,
// CHECK: hiprandDiscreteDistribution_t poisson_2,
// CHECK: hiprandDiscreteDistribution_t poisson_3,
__global__ void robust_device_API_kernel(hiprandState *state,
hiprandDiscreteDistribution_t poisson_1,
hiprandDiscreteDistribution_t poisson_2,
hiprandDiscreteDistribution_t poisson_3,
unsigned int *queue_lengths, size_t pitch)
{
int id = threadIdx.x + blockIdx.x * 64;
unsigned int new_customers;
unsigned int queue_length = 0;
/* Copy state to local memory for efficiency */
// CHECK: hiprandState_t localState = state[id];
hiprandState localState = state[id];
/* Simulate queue in time */
/* first 3 hours */
for(int min = 1; min <= 60 * 3; min++) {
/* draw number of new customers depending on API */
new_customers =
// CHECK: hiprand_discrete(&localState, poisson_2);
hiprand_discrete(&localState, poisson_2);
/* Update queue */
update_queue(id, min, new_customers, queue_length,
queue_lengths, pitch);
}
/* second 3 hours */
for(int min = 60 * 3 + 1; min <= 60 * 6; min++) {
/* draw number of new customers depending on API */
new_customers =
// CHECK: hiprand_discrete(&localState, poisson_1);
hiprand_discrete(&localState, poisson_1);
/* Update queue */
update_queue(id, min, new_customers, queue_length,
queue_lengths, pitch);
}
/* after 6 hours */
for(int min = 60 * 6 + 1; min <= 60 * HOURS; min++) {
/* draw number of new customers depending on API */
new_customers =
// CHECK: hiprand_discrete(&localState, poisson_3);
hiprand_discrete(&localState, poisson_3);
/* Update queue */
update_queue(id, min, new_customers, queue_length,
queue_lengths, pitch);
}
/* Copy state back to global memory */
state[id] = localState;
}
/* Set time intervals between reports */
void report_settings()
{
do{
printf("Set time intervals between queue reports");
printf("(in minutes > 0)\n");
if (scanf("%d", &report_break) == 0) continue;
}while(report_break <= 0);
}
/* Set number of cashiers each hour */
void add_cachiers(int *cashiers_load)
{
int i, min, max, begin, end;
printf("Cashier serves 2 customers per minute...\n");
for (i = 0; i < HOURS; i++){
cashiers_load_h[i] = 0;
}
while (true){
printf("Adding cashier...\n");
min = OPENING_HOUR;
max = CLOSING_HOUR-1;
do{
printf("Set hour that cahier comes (%d-%d)",
min, max);
printf(" [type 0 to finish adding cashiers]\n");
if (scanf("%d", &begin) == 0) continue;
}while (begin > max || (begin < min && begin != 0));
if (begin == 0) break;
min = begin+1;
max = CLOSING_HOUR;
do{
printf("Set hour that cahier leaves (%d-%d)",
min, max);
printf(" [type 0 to finish adding cashiers]\n");
if (scanf("%d", &end) == 0) continue;
}while (end > max || (end < min && end != 0));
if (end == 0) break;
for (i = begin - OPENING_HOUR;
i < end - OPENING_HOUR; i++){
cashiers_load_h[i]++;
}
}
for (i = OPENING_HOUR; i < CLOSING_HOUR; i++){
printf("\n%2d:00 - %2d:00 %d cashier",
i, i+1, cashiers_load_h[i-OPENING_HOUR]);
if (cashiers_load[i-OPENING_HOUR] != 1) printf("s");
}
printf("\n");
}
/* Set API type */
API_TYPE set_API_type()
{
printf("Choose API type:\n");
int choose;
do{
printf("type 1 for HOST API\n");
printf("type 2 for SIMPLE DEVICE API\n");
printf("type 3 for ROBUST DEVICE API\n");
if (scanf("%d", &choose) == 0) continue;
}while( choose < 1 || choose > 3);
switch(choose){
case 1: return HOST_API;
case 2: return SIMPLE_DEVICE_API;
case 3: return ROBUST_DEVICE_API;
default:
fprintf(stderr, "wrong API\n");
return HOST_API;
}
}
void settings()
{
add_cachiers(cashiers_load);
// CHECK: hipMemcpyToSymbol("cashiers_load", cashiers_load_h,
// CHECK: HOURS * sizeof(int), 0, hipMemcpyHostToDevice);
hipMemcpyToSymbol(HIP_SYMBOL("cashiers_load"), cashiers_load_h,
HOURS * sizeof(int), 0, hipMemcpyHostToDevice);
report_settings();
api = set_API_type();
}
void print_statistics(unsigned int *hostResults, size_t pitch)
{
int min, i, hour, minute;
unsigned int sum;
for(min = report_break; min <= 60 * HOURS;
min += report_break) {
sum = 0;
for(i = 0; i < 64 * 64; i++) {
sum += access_2D(unsigned int, hostResults,
min-1, i, pitch);
}
hour = OPENING_HOUR + min/60;
minute = min%60;
printf("%2d:%02d # of waiting customers = %10.4g |",
hour, minute, (float)sum/(64.0 * 64.0));
printf(" # of cashiers = %d | ",
cashiers_load_h[(min-1)/60]);
printf("# of new customers/min ~= ");
switch (api){
case HOST_API:
printf("%2.2f\n", 4.0);
break;
case SIMPLE_DEVICE_API:
printf("%2.2f\n",
4*(sin((float)min/100.0)+1));
break;
case ROBUST_DEVICE_API:
if (min <= 3 * 60){
printf("%2.2f\n", 2.0);
}else{
if (min <= 6 * 60){
printf("%2.2f\n", 1.0);
}else{
printf("%2.2f\n", 3.0);
}
}
break;
default:
fprintf(stderr, "Wrong API\n");
}
}
}
int main(int argc, char *argv[])
{
int n;
size_t pitch;
// CHECK: hiprandState_t *devStates;
hiprandState *devStates;
unsigned int *devResults, *hostResults;
unsigned int *poisson_numbers_d;
// CHECK: hiprandDiscreteDistribution_t poisson_1, poisson_2;
// CHECK: hiprandDiscreteDistribution_t poisson_3;
// CHECK: hiprandGenerator_t gen;
hiprandDiscreteDistribution_t poisson_1, poisson_2;
hiprandDiscreteDistribution_t poisson_3;
hiprandGenerator_t gen;
/* Setting cashiers, report and API */
settings();
/* Allocate space for results on device */
// CHECK: CUDA_CALL(hipMallocPitch((void **)&devResults, &pitch,
CUDA_CALL(hipMallocPitch((void **)&devResults, &pitch,
64 * 64 * sizeof(unsigned int), 60 * HOURS));
/* Allocate space for results on host */
hostResults = (unsigned int *)calloc(pitch * 60 * HOURS,
sizeof(unsigned int));
/* Allocate space for prng states on device */
// CHECK: CUDA_CALL(hipMalloc((void **)&devStates, 64 * 64 *
// CHECK: sizeof(hiprandState_t)));
CUDA_CALL(hipMalloc((void **)&devStates, 64 * 64 *
sizeof(hiprandState)));
/* Setup prng states */
if (api != HOST_API){
// CHECK: hipLaunchKernelGGL(setup_kernel, dim3(64), dim3(64), 0, 0, devStates);
setup_kernel<<<64, 64>>>(devStates);
}
/* Simulate queue */
switch (api){
case HOST_API:
/* Create pseudo-random number generator */
// CHECK: CURAND_CALL(hiprandCreateGenerator(&gen,
// CHECK: HIPRAND_RNG_PSEUDO_DEFAULT));
CURAND_CALL(hiprandCreateGenerator(&gen,
HIPRAND_RNG_PSEUDO_DEFAULT));
/* Set seed */
// CHECK: CURAND_CALL(hiprandSetPseudoRandomGeneratorSeed(
CURAND_CALL(hiprandSetPseudoRandomGeneratorSeed(
gen, 1234ULL));
/* compute n */
n = 64 * 64 * HOURS * 60;
/* Allocate n unsigned ints on device */
// CHECK: CUDA_CALL(hipMalloc((void **)&poisson_numbers_d,
CUDA_CALL(hipMalloc((void **)&poisson_numbers_d,
n * sizeof(unsigned int)));
/* Generate n unsigned ints on device */
// CHECK: CURAND_CALL(hiprandGeneratePoisson(gen,
CURAND_CALL(hiprandGeneratePoisson(gen,
poisson_numbers_d, n, 4.0));
// CHECK: hipLaunchKernelGGL(host_API_kernel, dim3(64), dim3(64), 0, 0, poisson_numbers_d,
host_API_kernel<<<64, 64>>>(poisson_numbers_d,
devResults, pitch);
/* Cleanup */
// CHECK: CURAND_CALL(hiprandDestroyGenerator(gen));
CURAND_CALL(hiprandDestroyGenerator(gen));
break;
case SIMPLE_DEVICE_API:
// CHECK: hipLaunchKernelGGL(simple_device_API_kernel, dim3(64), dim3(64), 0, 0, devStates,
simple_device_API_kernel<<<64, 64>>>(devStates,
devResults, pitch);
break;
case ROBUST_DEVICE_API:
/* Create histograms for Poisson(1) */
// CHECK: CURAND_CALL(hiprandCreatePoissonDistribution(1.0,
CURAND_CALL(hiprandCreatePoissonDistribution(1.0,
&poisson_1));
/* Create histograms for Poisson(2) */
// CHECK: CURAND_CALL(hiprandCreatePoissonDistribution(2.0,
CURAND_CALL(hiprandCreatePoissonDistribution(2.0,
&poisson_2));
/* Create histograms for Poisson(3) */
// CHECK: CURAND_CALL(hiprandCreatePoissonDistribution(3.0,
CURAND_CALL(hiprandCreatePoissonDistribution(3.0,
&poisson_3));
// CHECK: hipLaunchKernelGGL(robust_device_API_kernel, dim3(64), dim3(64), 0, 0, devStates,
robust_device_API_kernel<<<64, 64>>>(devStates,
poisson_1, poisson_2, poisson_3,
devResults, pitch);
/* Cleanup */
// CHECK: CURAND_CALL(hiprandDestroyDistribution(poisson_1));
// CHECK: CURAND_CALL(hiprandDestroyDistribution(poisson_2));
// CHECK: CURAND_CALL(hiprandDestroyDistribution(poisson_3));
CURAND_CALL(hiprandDestroyDistribution(poisson_1));
CURAND_CALL(hiprandDestroyDistribution(poisson_2));
CURAND_CALL(hiprandDestroyDistribution(poisson_3));
break;
default:
fprintf(stderr, "Wrong API\n");
}
/* Copy device memory to host */
// CHECK: CUDA_CALL(hipMemcpy2D(hostResults, pitch, devResults,
// CHECK: 60 * HOURS, hipMemcpyDeviceToHost));
CUDA_CALL(hipMemcpy2D(hostResults, pitch, devResults,
pitch, 64 * 64 * sizeof(unsigned int),
60 * HOURS, hipMemcpyDeviceToHost));
/* Show result */
print_statistics(hostResults, pitch);
/* Cleanup */
// CHECK: CUDA_CALL(hipFree(devStates));
// CHECK: CUDA_CALL(hipFree(devResults));
CUDA_CALL(hipFree(devStates));
CUDA_CALL(hipFree(devResults));
free(hostResults);
return EXIT_SUCCESS;
} | .text
.file "poisson_api_example.hip"
.globl _Z27__device_stub__setup_kernelP12hiprandState # -- Begin function _Z27__device_stub__setup_kernelP12hiprandState
.p2align 4, 0x90
.type _Z27__device_stub__setup_kernelP12hiprandState,@function
_Z27__device_stub__setup_kernelP12hiprandState: # @_Z27__device_stub__setup_kernelP12hiprandState
.cfi_startproc
# %bb.0:
subq $72, %rsp
.cfi_def_cfa_offset 80
movq %rdi, 64(%rsp)
leaq 64(%rsp), %rax
movq %rax, (%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
movq %rsp, %r9
movl $_Z12setup_kernelP12hiprandState, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $88, %rsp
.cfi_adjust_cfa_offset -88
retq
.Lfunc_end0:
.size _Z27__device_stub__setup_kernelP12hiprandState, .Lfunc_end0-_Z27__device_stub__setup_kernelP12hiprandState
.cfi_endproc
# -- End function
.globl _Z39__device_stub__simple_device_API_kernelP12hiprandStatePjm # -- Begin function _Z39__device_stub__simple_device_API_kernelP12hiprandStatePjm
.p2align 4, 0x90
.type _Z39__device_stub__simple_device_API_kernelP12hiprandStatePjm,@function
_Z39__device_stub__simple_device_API_kernelP12hiprandStatePjm: # @_Z39__device_stub__simple_device_API_kernelP12hiprandStatePjm
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z24simple_device_API_kernelP12hiprandStatePjm, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end1:
.size _Z39__device_stub__simple_device_API_kernelP12hiprandStatePjm, .Lfunc_end1-_Z39__device_stub__simple_device_API_kernelP12hiprandStatePjm
.cfi_endproc
# -- End function
.globl _Z30__device_stub__host_API_kernelPjS_m # -- Begin function _Z30__device_stub__host_API_kernelPjS_m
.p2align 4, 0x90
.type _Z30__device_stub__host_API_kernelPjS_m,@function
_Z30__device_stub__host_API_kernelPjS_m: # @_Z30__device_stub__host_API_kernelPjS_m
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z15host_API_kernelPjS_m, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end2:
.size _Z30__device_stub__host_API_kernelPjS_m, .Lfunc_end2-_Z30__device_stub__host_API_kernelPjS_m
.cfi_endproc
# -- End function
.globl _Z39__device_stub__robust_device_API_kernelP12hiprandStateP32rocrand_discrete_distribution_stS2_S2_Pjm # -- Begin function _Z39__device_stub__robust_device_API_kernelP12hiprandStateP32rocrand_discrete_distribution_stS2_S2_Pjm
.p2align 4, 0x90
.type _Z39__device_stub__robust_device_API_kernelP12hiprandStateP32rocrand_discrete_distribution_stS2_S2_Pjm,@function
_Z39__device_stub__robust_device_API_kernelP12hiprandStateP32rocrand_discrete_distribution_stS2_S2_Pjm: # @_Z39__device_stub__robust_device_API_kernelP12hiprandStateP32rocrand_discrete_distribution_stS2_S2_Pjm
.cfi_startproc
# %bb.0:
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 88(%rsp)
movq %rsi, 80(%rsp)
movq %rdx, 72(%rsp)
movq %rcx, 64(%rsp)
movq %r8, 56(%rsp)
movq %r9, 48(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
leaq 64(%rsp), %rax
movq %rax, 120(%rsp)
leaq 56(%rsp), %rax
movq %rax, 128(%rsp)
leaq 48(%rsp), %rax
movq %rax, 136(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z24robust_device_API_kernelP12hiprandStateP32rocrand_discrete_distribution_stS2_S2_Pjm, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $168, %rsp
.cfi_adjust_cfa_offset -168
retq
.Lfunc_end3:
.size _Z39__device_stub__robust_device_API_kernelP12hiprandStateP32rocrand_discrete_distribution_stS2_S2_Pjm, .Lfunc_end3-_Z39__device_stub__robust_device_API_kernelP12hiprandStateP32rocrand_discrete_distribution_stS2_S2_Pjm
.cfi_endproc
# -- End function
.globl _Z15report_settingsv # -- Begin function _Z15report_settingsv
.p2align 4, 0x90
.type _Z15report_settingsv,@function
_Z15report_settingsv: # @_Z15report_settingsv
.cfi_startproc
# %bb.0:
pushq %rax
.cfi_def_cfa_offset 16
.p2align 4, 0x90
.LBB4_1: # =>This Inner Loop Header: Depth=1
movl $.L.str, %edi
xorl %eax, %eax
callq printf
movl $.Lstr, %edi
callq puts@PLT
movl $.L.str.2, %edi
movl $report_break, %esi
xorl %eax, %eax
callq __isoc23_scanf
cmpl $0, report_break(%rip)
jle .LBB4_1
# %bb.2:
popq %rax
.cfi_def_cfa_offset 8
retq
.Lfunc_end4:
.size _Z15report_settingsv, .Lfunc_end4-_Z15report_settingsv
.cfi_endproc
# -- End function
.globl _Z12add_cachiersPi # -- Begin function _Z12add_cachiersPi
.p2align 4, 0x90
.type _Z12add_cachiersPi,@function
_Z12add_cachiersPi: # @_Z12add_cachiersPi
.cfi_startproc
# %bb.0: # %.preheader.preheader
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r12
.cfi_def_cfa_offset 40
pushq %rbx
.cfi_def_cfa_offset 48
subq $16, %rsp
.cfi_def_cfa_offset 64
.cfi_offset %rbx, -48
.cfi_offset %r12, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rdi, %rbx
movl $.Lstr.1, %edi
callq puts@PLT
xorps %xmm0, %xmm0
movaps %xmm0, cashiers_load_h(%rip)
movaps %xmm0, cashiers_load_h+16(%rip)
movaps %xmm0, cashiers_load_h+32(%rip)
movaps %xmm0, cashiers_load_h+48(%rip)
leaq 8(%rsp), %r14
leaq 12(%rsp), %r15
.p2align 4, 0x90
.LBB5_1: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB5_2 Depth 2
# Child Loop BB5_12 Depth 2
# Child Loop BB5_18 Depth 2
movl $.Lstr.2, %edi
callq puts@PLT
.p2align 4, 0x90
.LBB5_2: # %.critedge
# Parent Loop BB5_1 Depth=1
# => This Inner Loop Header: Depth=2
movl $.L.str.5, %edi
movl $7, %esi
movl $22, %edx
xorl %eax, %eax
callq printf
movl $.Lstr.4, %edi
callq puts@PLT
movl $.L.str.2, %edi
movq %r14, %rsi
xorl %eax, %eax
callq __isoc23_scanf
movl 8(%rsp), %r12d
cmpl $22, %r12d
jg .LBB5_2
# %bb.3: # in Loop: Header=BB5_2 Depth=2
cmpl $6, %r12d
jg .LBB5_5
# %bb.4: # in Loop: Header=BB5_2 Depth=2
testl %r12d, %r12d
jne .LBB5_2
.LBB5_5: # in Loop: Header=BB5_1 Depth=1
testl %r12d, %r12d
je .LBB5_6
# %bb.11: # in Loop: Header=BB5_1 Depth=1
leal 1(%r12), %ebp
.p2align 4, 0x90
.LBB5_12: # %.critedge2
# Parent Loop BB5_1 Depth=1
# => This Inner Loop Header: Depth=2
movl $.L.str.7, %edi
movl %ebp, %esi
movl $23, %edx
xorl %eax, %eax
callq printf
movl $.Lstr.4, %edi
callq puts@PLT
movl $.L.str.2, %edi
movq %r15, %rsi
xorl %eax, %eax
callq __isoc23_scanf
movslq 12(%rsp), %rax
cmpq $23, %rax
jg .LBB5_12
# %bb.13: # in Loop: Header=BB5_12 Depth=2
cmpl %r12d, %eax
jg .LBB5_15
# %bb.14: # in Loop: Header=BB5_12 Depth=2
testl %eax, %eax
jne .LBB5_12
.LBB5_15: # in Loop: Header=BB5_1 Depth=1
testl %eax, %eax
je .LBB5_6
# %bb.16: # in Loop: Header=BB5_1 Depth=1
movl 8(%rsp), %ecx
cmpl %eax, %ecx
jge .LBB5_1
# %bb.17: # %.lr.ph.preheader
# in Loop: Header=BB5_1 Depth=1
addq $-7, %rax
addl $-7, %ecx
movslq %ecx, %rcx
.p2align 4, 0x90
.LBB5_18: # %.lr.ph
# Parent Loop BB5_1 Depth=1
# => This Inner Loop Header: Depth=2
incl cashiers_load_h(,%rcx,4)
incq %rcx
cmpq %rax, %rcx
jl .LBB5_18
jmp .LBB5_1
.LBB5_6: # %.preheader39
xorl %r14d, %r14d
jmp .LBB5_7
.p2align 4, 0x90
.LBB5_9: # in Loop: Header=BB5_7 Depth=1
incq %r14
cmpq $16, %r14
je .LBB5_10
.LBB5_7: # =>This Inner Loop Header: Depth=1
leal 8(%r14), %edx
movl cashiers_load_h(,%r14,4), %ecx
leal 7(%r14), %esi
movl $.L.str.8, %edi
xorl %eax, %eax
callq printf
cmpl $1, (%rbx,%r14,4)
je .LBB5_9
# %bb.8: # in Loop: Header=BB5_7 Depth=1
movl $115, %edi
callq putchar@PLT
jmp .LBB5_9
.LBB5_10:
movl $10, %edi
callq putchar@PLT
addq $16, %rsp
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end5:
.size _Z12add_cachiersPi, .Lfunc_end5-_Z12add_cachiersPi
.cfi_endproc
# -- End function
.globl _Z12set_API_typev # -- Begin function _Z12set_API_typev
.p2align 4, 0x90
.type _Z12set_API_typev,@function
_Z12set_API_typev: # @_Z12set_API_typev
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $16, %rsp
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -16
movl $.Lstr.5, %edi
callq puts@PLT
leaq 12(%rsp), %rbx
.p2align 4, 0x90
.LBB6_1: # =>This Inner Loop Header: Depth=1
movl $.Lstr.6, %edi
callq puts@PLT
movl $.Lstr.7, %edi
callq puts@PLT
movl $.Lstr.8, %edi
callq puts@PLT
movl $.L.str.2, %edi
movq %rbx, %rsi
xorl %eax, %eax
callq __isoc23_scanf
movl 12(%rsp), %eax
leal -4(%rax), %ecx
cmpl $-3, %ecx
jb .LBB6_1
# %bb.2: # %switch.lookup
decl %eax
# kill: def $eax killed $eax killed $rax
addq $16, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
retq
.Lfunc_end6:
.size _Z12set_API_typev, .Lfunc_end6-_Z12set_API_typev
.cfi_endproc
# -- End function
.globl _Z8settingsv # -- Begin function _Z8settingsv
.p2align 4, 0x90
.type _Z8settingsv,@function
_Z8settingsv: # @_Z8settingsv
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $16, %rsp
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -16
movl $cashiers_load, %edi
callq _Z12add_cachiersPi
movl $.L.str.16, %edi
movl $cashiers_load_h, %esi
movl $64, %edx
xorl %ecx, %ecx
movl $1, %r8d
callq hipMemcpyToSymbol
.p2align 4, 0x90
.LBB7_1: # =>This Inner Loop Header: Depth=1
movl $.L.str, %edi
xorl %eax, %eax
callq printf
movl $.Lstr, %edi
callq puts@PLT
movl $.L.str.2, %edi
movl $report_break, %esi
xorl %eax, %eax
callq __isoc23_scanf
cmpl $0, report_break(%rip)
jle .LBB7_1
# %bb.2: # %_Z15report_settingsv.exit
movl $.Lstr.5, %edi
callq puts@PLT
leaq 12(%rsp), %rbx
.p2align 4, 0x90
.LBB7_3: # =>This Inner Loop Header: Depth=1
movl $.Lstr.6, %edi
callq puts@PLT
movl $.Lstr.7, %edi
callq puts@PLT
movl $.Lstr.8, %edi
callq puts@PLT
movl $.L.str.2, %edi
movq %rbx, %rsi
xorl %eax, %eax
callq __isoc23_scanf
movl 12(%rsp), %eax
leal -4(%rax), %ecx
cmpl $-3, %ecx
jb .LBB7_3
# %bb.4: # %switch.lookup
decl %eax
movl %eax, api(%rip)
addq $16, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
retq
.Lfunc_end7:
.size _Z8settingsv, .Lfunc_end7-_Z8settingsv
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function _Z16print_statisticsPjm
.LCPI8_0:
.quad 0x3f30000000000000 # double 2.44140625E-4
.LCPI8_1:
.quad 0x4008000000000000 # double 3
.LCPI8_2:
.quad 0x3ff0000000000000 # double 1
.LCPI8_3:
.quad 0x4000000000000000 # double 2
.LCPI8_4:
.quad 0x4059000000000000 # double 100
.LCPI8_5:
.quad 0x4010000000000000 # double 4
.text
.globl _Z16print_statisticsPjm
.p2align 4, 0x90
.type _Z16print_statisticsPjm,@function
_Z16print_statisticsPjm: # @_Z16print_statisticsPjm
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %r12
.cfi_def_cfa_offset 32
pushq %rbx
.cfi_def_cfa_offset 40
pushq %rax
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -40
.cfi_offset %r12, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movl report_break(%rip), %r15d
cmpl $960, %r15d # imm = 0x3C0
jg .LBB8_17
# %bb.1: # %.preheader.preheader
movq %rsi, %rbx
movq %rdi, %r14
.p2align 4, 0x90
.LBB8_2: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB8_3 Depth 2
leal -1(%r15), %eax
movslq %eax, %r12
movq %r12, %rcx
imulq %rbx, %rcx
addq %r14, %rcx
xorl %edx, %edx
xorl %eax, %eax
.p2align 4, 0x90
.LBB8_3: # Parent Loop BB8_2 Depth=1
# => This Inner Loop Header: Depth=2
addl (%rcx,%rdx,4), %eax
incq %rdx
cmpq $4096, %rdx # imm = 0x1000
jne .LBB8_3
# %bb.4: # in Loop: Header=BB8_2 Depth=1
movslq %r15d, %rcx
imulq $-2004318071, %rcx, %rcx # imm = 0x88888889
shrq $32, %rcx
addl %r15d, %ecx
movl %ecx, %edx
shrl $31, %edx
sarl $5, %ecx
leal (%rcx,%rdx), %esi
addl $7, %esi
addl %edx, %ecx
imull $60, %ecx, %ecx
movl %eax, %eax
xorps %xmm0, %xmm0
cvtsi2ss %rax, %xmm0
movl %r15d, %edx
subl %ecx, %edx
cvtss2sd %xmm0, %xmm0
mulsd .LCPI8_0(%rip), %xmm0
movl $.L.str.17, %edi
movb $1, %al
callq printf
imulq $-2004318071, %r12, %rax # imm = 0x88888889
shrq $32, %rax
addl %r15d, %eax
decl %eax
movl %eax, %ecx
shrl $31, %ecx
sarl $5, %eax
addl %ecx, %eax
cltq
movl cashiers_load_h(,%rax,4), %esi
movl $.L.str.18, %edi
xorl %eax, %eax
callq printf
movl $.L.str.19, %edi
xorl %eax, %eax
callq printf
movl api(%rip), %eax
cmpl $2, %eax
je .LBB8_10
# %bb.5: # in Loop: Header=BB8_2 Depth=1
cmpl $1, %eax
je .LBB8_9
# %bb.6: # in Loop: Header=BB8_2 Depth=1
testl %eax, %eax
jne .LBB8_15
# %bb.7: # in Loop: Header=BB8_2 Depth=1
movl $.L.str.20, %edi
movsd .LCPI8_5(%rip), %xmm0 # xmm0 = mem[0],zero
jmp .LBB8_8
.p2align 4, 0x90
.LBB8_10: # in Loop: Header=BB8_2 Depth=1
movl $.L.str.20, %edi
cmpl $180, %r15d
jg .LBB8_12
# %bb.11: # in Loop: Header=BB8_2 Depth=1
movsd .LCPI8_3(%rip), %xmm0 # xmm0 = mem[0],zero
jmp .LBB8_8
.p2align 4, 0x90
.LBB8_9: # in Loop: Header=BB8_2 Depth=1
xorps %xmm0, %xmm0
cvtsi2ss %r15d, %xmm0
cvtss2sd %xmm0, %xmm0
divsd .LCPI8_4(%rip), %xmm0
callq sin
addsd .LCPI8_2(%rip), %xmm0
mulsd .LCPI8_5(%rip), %xmm0
movl $.L.str.20, %edi
.LBB8_8: # in Loop: Header=BB8_2 Depth=1
movb $1, %al
callq printf
.LBB8_16: # in Loop: Header=BB8_2 Depth=1
addl report_break(%rip), %r15d
cmpl $961, %r15d # imm = 0x3C1
jl .LBB8_2
jmp .LBB8_17
.LBB8_12: # in Loop: Header=BB8_2 Depth=1
cmpl $360, %r15d # imm = 0x168
jg .LBB8_14
# %bb.13: # in Loop: Header=BB8_2 Depth=1
movsd .LCPI8_2(%rip), %xmm0 # xmm0 = mem[0],zero
jmp .LBB8_8
.LBB8_14: # in Loop: Header=BB8_2 Depth=1
movsd .LCPI8_1(%rip), %xmm0 # xmm0 = mem[0],zero
jmp .LBB8_8
.LBB8_15: # in Loop: Header=BB8_2 Depth=1
movq stderr(%rip), %rcx
movl $.L.str.21, %edi
movl $10, %esi
movl $1, %edx
callq fwrite@PLT
jmp .LBB8_16
.LBB8_17: # %._crit_edge
addq $8, %rsp
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %r12
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.Lfunc_end8:
.size _Z16print_statisticsPjm, .Lfunc_end8-_Z16print_statisticsPjm
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI9_0:
.quad 0x3ff0000000000000 # double 1
.LCPI9_1:
.quad 0x4000000000000000 # double 2
.LCPI9_2:
.quad 0x4008000000000000 # double 3
.LCPI9_3:
.quad 0x4010000000000000 # double 4
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $96, %rsp
.cfi_def_cfa_offset 112
.cfi_offset %rbx, -16
callq _Z8settingsv
leaq 24(%rsp), %rdi
movq %rsp, %rsi
movl $16384, %edx # imm = 0x4000
movl $960, %ecx # imm = 0x3C0
callq hipMallocPitch
testl %eax, %eax
je .LBB9_3
# %bb.1:
movl $.L.str.22, %edi
movl $.L.str.23, %esi
movl $323, %edx # imm = 0x143
jmp .LBB9_2
.LBB9_3:
imulq $960, (%rsp), %rdi # imm = 0x3C0
movl $4, %esi
callq calloc
movq %rax, %rbx
leaq 48(%rsp), %rdi
movl $196608, %esi # imm = 0x30000
callq hipMalloc
testl %eax, %eax
je .LBB9_5
# %bb.4:
movl $.L.str.22, %edi
movl $.L.str.23, %esi
movl $333, %edx # imm = 0x14D
.LBB9_2:
xorl %eax, %eax
callq printf
movl $1, %eax
.LBB9_47:
addq $96, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
retq
.LBB9_5:
.cfi_def_cfa_offset 112
cmpl $0, api(%rip)
je .LBB9_8
# %bb.6:
movabsq $4294967360, %rdi # imm = 0x100000040
movl $1, %esi
movq %rdi, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB9_8
# %bb.7:
movq 48(%rsp), %rax
movq %rax, 56(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 32(%rsp), %rdi
leaq 8(%rsp), %rsi
leaq 88(%rsp), %rdx
leaq 80(%rsp), %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 8(%rsp), %rcx
movl 16(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z12setup_kernelP12hiprandState, %edi
pushq 80(%rsp)
.cfi_adjust_cfa_offset 8
pushq 96(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB9_8:
movl api(%rip), %eax
cmpl $2, %eax
je .LBB9_25
# %bb.9:
cmpl $1, %eax
je .LBB9_23
# %bb.10:
testl %eax, %eax
jne .LBB9_39
# %bb.11:
leaq 8(%rsp), %rdi
movl $400, %esi # imm = 0x190
callq hiprandCreateGenerator
testl %eax, %eax
je .LBB9_13
# %bb.12:
movl $.L.str.22, %edi
movl $.L.str.23, %esi
movl $347, %edx # imm = 0x15B
jmp .LBB9_2
.LBB9_25:
movsd .LCPI9_0(%rip), %xmm0 # xmm0 = mem[0],zero
leaq 32(%rsp), %rdi
callq hiprandCreatePoissonDistribution
testl %eax, %eax
je .LBB9_27
# %bb.26:
movl $.L.str.22, %edi
movl $.L.str.23, %esi
movl $378, %edx # imm = 0x17A
jmp .LBB9_2
.LBB9_23:
movabsq $4294967360, %rdi # imm = 0x100000040
movl $1, %esi
movq %rdi, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB9_40
# %bb.24:
movq 48(%rsp), %rdi
movq 24(%rsp), %rsi
movq (%rsp), %rdx
callq _Z39__device_stub__simple_device_API_kernelP12hiprandStatePjm
.LBB9_40:
movq (%rsp), %rcx
movq 24(%rsp), %rdx
subq $8, %rsp
.cfi_adjust_cfa_offset 8
movl $16384, %r8d # imm = 0x4000
movl $960, %r9d # imm = 0x3C0
movq %rbx, %rdi
movq %rcx, %rsi
pushq $2
.cfi_adjust_cfa_offset 8
callq hipMemcpy2D
addq $16, %rsp
.cfi_adjust_cfa_offset -16
testl %eax, %eax
je .LBB9_42
# %bb.41:
movl $.L.str.22, %edi
movl $.L.str.23, %esi
movl $407, %edx # imm = 0x197
jmp .LBB9_2
.LBB9_42:
movq (%rsp), %rsi
movq %rbx, %rdi
callq _Z16print_statisticsPjm
movq 48(%rsp), %rdi
callq hipFree
testl %eax, %eax
je .LBB9_44
# %bb.43:
movl $.L.str.22, %edi
movl $.L.str.23, %esi
movl $413, %edx # imm = 0x19D
jmp .LBB9_2
.LBB9_13:
movq 8(%rsp), %rdi
movl $1234, %esi # imm = 0x4D2
callq hiprandSetPseudoRandomGeneratorSeed
testl %eax, %eax
je .LBB9_15
# %bb.14:
movl $.L.str.22, %edi
movl $.L.str.23, %esi
movl $351, %edx # imm = 0x15F
jmp .LBB9_2
.LBB9_27:
movsd .LCPI9_1(%rip), %xmm0 # xmm0 = mem[0],zero
leaq 8(%rsp), %rdi
callq hiprandCreatePoissonDistribution
testl %eax, %eax
je .LBB9_29
# %bb.28:
movl $.L.str.22, %edi
movl $.L.str.23, %esi
movl $382, %edx # imm = 0x17E
jmp .LBB9_2
.LBB9_44:
movq 24(%rsp), %rdi
callq hipFree
testl %eax, %eax
je .LBB9_46
# %bb.45:
movl $.L.str.22, %edi
movl $.L.str.23, %esi
movl $414, %edx # imm = 0x19E
jmp .LBB9_2
.LBB9_15:
leaq 32(%rsp), %rdi
movl $15728640, %esi # imm = 0xF00000
callq hipMalloc
testl %eax, %eax
je .LBB9_17
# %bb.16:
movl $.L.str.22, %edi
movl $.L.str.23, %esi
movl $357, %edx # imm = 0x165
jmp .LBB9_2
.LBB9_29:
movsd .LCPI9_2(%rip), %xmm0 # xmm0 = mem[0],zero
leaq 56(%rsp), %rdi
callq hiprandCreatePoissonDistribution
testl %eax, %eax
je .LBB9_31
# %bb.30:
movl $.L.str.22, %edi
movl $.L.str.23, %esi
movl $386, %edx # imm = 0x182
jmp .LBB9_2
.LBB9_39:
movq stderr(%rip), %rcx
movl $.L.str.21, %edi
movl $10, %esi
movl $1, %edx
callq fwrite@PLT
jmp .LBB9_40
.LBB9_46:
movq %rbx, %rdi
callq free
xorl %eax, %eax
jmp .LBB9_47
.LBB9_17:
movq 8(%rsp), %rdi
movq 32(%rsp), %rsi
movsd .LCPI9_3(%rip), %xmm0 # xmm0 = mem[0],zero
movl $3932160, %edx # imm = 0x3C0000
callq hiprandGeneratePoisson
testl %eax, %eax
je .LBB9_19
# %bb.18:
movl $.L.str.22, %edi
movl $.L.str.23, %esi
movl $361, %edx # imm = 0x169
jmp .LBB9_2
.LBB9_31:
movabsq $4294967360, %rdi # imm = 0x100000040
movl $1, %esi
movq %rdi, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB9_33
# %bb.32:
movq 48(%rsp), %rdi
movq 32(%rsp), %rsi
movq 8(%rsp), %rdx
movq 56(%rsp), %rcx
movq 24(%rsp), %r8
movq (%rsp), %r9
callq _Z39__device_stub__robust_device_API_kernelP12hiprandStateP32rocrand_discrete_distribution_stS2_S2_Pjm
.LBB9_33:
movq 32(%rsp), %rdi
callq hiprandDestroyDistribution
testl %eax, %eax
je .LBB9_35
# %bb.34:
movl $.L.str.22, %edi
movl $.L.str.23, %esi
movl $395, %edx # imm = 0x18B
jmp .LBB9_2
.LBB9_19:
movabsq $4294967360, %rdi # imm = 0x100000040
movl $1, %esi
movq %rdi, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB9_21
# %bb.20:
movq 32(%rsp), %rdi
movq 24(%rsp), %rsi
movq (%rsp), %rdx
callq _Z30__device_stub__host_API_kernelPjS_m
.LBB9_21:
movq 8(%rsp), %rdi
callq hiprandDestroyGenerator
testl %eax, %eax
je .LBB9_40
# %bb.22:
movl $.L.str.22, %edi
movl $.L.str.23, %esi
movl $367, %edx # imm = 0x16F
jmp .LBB9_2
.LBB9_35:
movq 8(%rsp), %rdi
callq hiprandDestroyDistribution
testl %eax, %eax
je .LBB9_37
# %bb.36:
movl $.L.str.22, %edi
movl $.L.str.23, %esi
movl $396, %edx # imm = 0x18C
jmp .LBB9_2
.LBB9_37:
movq 56(%rsp), %rdi
callq hiprandDestroyDistribution
testl %eax, %eax
je .LBB9_40
# %bb.38:
movl $.L.str.22, %edi
movl $.L.str.23, %esi
movl $397, %edx # imm = 0x18D
jmp .LBB9_2
.Lfunc_end9:
.size main, .Lfunc_end9-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $32, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB10_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB10_2:
movq __hip_gpubin_handle(%rip), %rbx
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z12setup_kernelP12hiprandState, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z24simple_device_API_kernelP12hiprandStatePjm, %esi
movl $.L__unnamed_2, %edx
movl $.L__unnamed_2, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z15host_API_kernelPjS_m, %esi
movl $.L__unnamed_3, %edx
movl $.L__unnamed_3, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z24robust_device_API_kernelP12hiprandStateP32rocrand_discrete_distribution_stS2_S2_Pjm, %esi
movl $.L__unnamed_4, %edx
movl $.L__unnamed_4, %ecx
movq %rbx, %rdi
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $0, 8(%rsp)
movl $1, (%rsp)
movl $cashiers_load, %esi
movl $.L.str.16, %edx
movl $.L.str.16, %ecx
movl $64, %r9d
movq %rbx, %rdi
xorl %r8d, %r8d
callq __hipRegisterVar
movl $__hip_module_dtor, %edi
addq $32, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end10:
.size __hip_module_ctor, .Lfunc_end10-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB11_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB11_2:
retq
.Lfunc_end11:
.size __hip_module_dtor, .Lfunc_end11-__hip_module_dtor
.cfi_endproc
# -- End function
.type api,@object # @api
.bss
.globl api
.p2align 2, 0x0
api:
.long 0 # 0x0
.size api, 4
.type report_break,@object # @report_break
.globl report_break
.p2align 2, 0x0
report_break:
.long 0 # 0x0
.size report_break, 4
.type cashiers_load_h,@object # @cashiers_load_h
.globl cashiers_load_h
.p2align 4, 0x0
cashiers_load_h:
.zero 64
.size cashiers_load_h, 64
.type cashiers_load,@object # @cashiers_load
.local cashiers_load
.comm cashiers_load,64,16
.type _Z12setup_kernelP12hiprandState,@object # @_Z12setup_kernelP12hiprandState
.section .rodata,"a",@progbits
.globl _Z12setup_kernelP12hiprandState
.p2align 3, 0x0
_Z12setup_kernelP12hiprandState:
.quad _Z27__device_stub__setup_kernelP12hiprandState
.size _Z12setup_kernelP12hiprandState, 8
.type _Z24simple_device_API_kernelP12hiprandStatePjm,@object # @_Z24simple_device_API_kernelP12hiprandStatePjm
.globl _Z24simple_device_API_kernelP12hiprandStatePjm
.p2align 3, 0x0
_Z24simple_device_API_kernelP12hiprandStatePjm:
.quad _Z39__device_stub__simple_device_API_kernelP12hiprandStatePjm
.size _Z24simple_device_API_kernelP12hiprandStatePjm, 8
.type _Z15host_API_kernelPjS_m,@object # @_Z15host_API_kernelPjS_m
.globl _Z15host_API_kernelPjS_m
.p2align 3, 0x0
_Z15host_API_kernelPjS_m:
.quad _Z30__device_stub__host_API_kernelPjS_m
.size _Z15host_API_kernelPjS_m, 8
.type _Z24robust_device_API_kernelP12hiprandStateP32rocrand_discrete_distribution_stS2_S2_Pjm,@object # @_Z24robust_device_API_kernelP12hiprandStateP32rocrand_discrete_distribution_stS2_S2_Pjm
.globl _Z24robust_device_API_kernelP12hiprandStateP32rocrand_discrete_distribution_stS2_S2_Pjm
.p2align 3, 0x0
_Z24robust_device_API_kernelP12hiprandStateP32rocrand_discrete_distribution_stS2_S2_Pjm:
.quad _Z39__device_stub__robust_device_API_kernelP12hiprandStateP32rocrand_discrete_distribution_stS2_S2_Pjm
.size _Z24robust_device_API_kernelP12hiprandStateP32rocrand_discrete_distribution_stS2_S2_Pjm, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Set time intervals between queue reports"
.size .L.str, 41
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "%d"
.size .L.str.2, 3
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "Set hour that cahier comes (%d-%d)"
.size .L.str.5, 35
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz "Set hour that cahier leaves (%d-%d)"
.size .L.str.7, 36
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz "\n%2d:00 - %2d:00 %d cashier"
.size .L.str.8, 32
.type .L.str.16,@object # @.str.16
.L.str.16:
.asciz "cashiers_load"
.size .L.str.16, 14
.type .L.str.17,@object # @.str.17
.L.str.17:
.asciz "%2d:%02d # of waiting customers = %10.4g |"
.size .L.str.17, 45
.type .L.str.18,@object # @.str.18
.L.str.18:
.asciz " # of cashiers = %d | "
.size .L.str.18, 26
.type .L.str.19,@object # @.str.19
.L.str.19:
.asciz "# of new customers/min ~= "
.size .L.str.19, 27
.type .L.str.20,@object # @.str.20
.L.str.20:
.asciz "%2.2f\n"
.size .L.str.20, 7
.type .L.str.21,@object # @.str.21
.L.str.21:
.asciz "Wrong API\n"
.size .L.str.21, 11
.type .L.str.22,@object # @.str.22
.L.str.22:
.asciz "Error at %s:%d\n"
.size .L.str.22, 16
.type .L.str.23,@object # @.str.23
.L.str.23:
.asciz "/home/ubuntu/Datasets/stackv2/train-structured-repos-hip/daodaoliang/HIP/master/tests/hipify-clang/unit_tests/libraries/cuRAND/poisson_api_example.hip"
.size .L.str.23, 151
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z12setup_kernelP12hiprandState"
.size .L__unnamed_1, 32
.type .L__unnamed_2,@object # @1
.L__unnamed_2:
.asciz "_Z24simple_device_API_kernelP12hiprandStatePjm"
.size .L__unnamed_2, 47
.type .L__unnamed_3,@object # @2
.L__unnamed_3:
.asciz "_Z15host_API_kernelPjS_m"
.size .L__unnamed_3, 25
.type .L__unnamed_4,@object # @3
.L__unnamed_4:
.asciz "_Z24robust_device_API_kernelP12hiprandStateP32rocrand_discrete_distribution_stS2_S2_Pjm"
.size .L__unnamed_4, 88
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "(in minutes > 0)"
.size .Lstr, 17
.type .Lstr.1,@object # @str.1
.Lstr.1:
.asciz "Cashier serves 2 customers per minute..."
.size .Lstr.1, 41
.type .Lstr.2,@object # @str.2
.Lstr.2:
.asciz "Adding cashier..."
.size .Lstr.2, 18
.type .Lstr.4,@object # @str.4
.Lstr.4:
.asciz " [type 0 to finish adding cashiers]"
.size .Lstr.4, 36
.type .Lstr.5,@object # @str.5
.Lstr.5:
.asciz "Choose API type:"
.size .Lstr.5, 17
.type .Lstr.6,@object # @str.6
.Lstr.6:
.asciz "type 1 for HOST API"
.size .Lstr.6, 20
.type .Lstr.7,@object # @str.7
.Lstr.7:
.asciz "type 2 for SIMPLE DEVICE API"
.size .Lstr.7, 29
.type .Lstr.8,@object # @str.8
.Lstr.8:
.asciz "type 3 for ROBUST DEVICE API"
.size .Lstr.8, 29
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z27__device_stub__setup_kernelP12hiprandState
.addrsig_sym _Z39__device_stub__simple_device_API_kernelP12hiprandStatePjm
.addrsig_sym _Z30__device_stub__host_API_kernelPjS_m
.addrsig_sym _Z39__device_stub__robust_device_API_kernelP12hiprandStateP32rocrand_discrete_distribution_stS2_S2_Pjm
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym report_break
.addrsig_sym cashiers_load_h
.addrsig_sym cashiers_load
.addrsig_sym _Z12setup_kernelP12hiprandState
.addrsig_sym _Z24simple_device_API_kernelP12hiprandStatePjm
.addrsig_sym _Z15host_API_kernelPjS_m
.addrsig_sym _Z24robust_device_API_kernelP12hiprandStateP32rocrand_discrete_distribution_stS2_S2_Pjm
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | /***
* Ashutosh Dhar
* Department of Electrical and Computer Engineeing
* University of Illinois, Urbana-Champaign
*
*/
#include <cuda.h>
#include <iostream>
#include <cstdio>
#define THREADS_PER_SM 1
#define BLOCKS_PER_SM 1
int ITERATIONS;
int L2_CACHE_SIZE = 512*1024;
int DATA_SIZE;// (L2_CACHE_SIZE * ITERATIONS)
using namespace std;
__global__ void cache_latency(double *latency, int *data, int DATA_SIZE)
{
//__shared__ double sh_start;
//__shared__ double sh_stop;
__shared__ long long int run_latency;
unsigned int start_t, stop_t;
//float local;
int load=0;
for(int i=0; i<DATA_SIZE; i++)
{
start_t = clock();
load = data[load];
stop_t = clock();
__syncthreads();
//data[load] = local + 1;
run_latency += (stop_t - start_t);
__syncthreads();
}
latency[0] = (double)(run_latency)/(DATA_SIZE);
}
int main(int argc, char **argv)
{
if(argc <2)
{
cerr<<"Enter iterations!";
return -1;
}
ITERATIONS = atoi(argv[1]);
DATA_SIZE = L2_CACHE_SIZE * ITERATIONS;
//double sum;
int *data;
data = (int*) malloc(sizeof(int)*DATA_SIZE);
srand(12);
for(int i=0; i<DATA_SIZE; i++)
{
data[i] = i;//1.0*rand();
}
double *latency;
latency = (double*) malloc((sizeof(double)) *1);
double *d_latency;
int *d_data;
cudaError_t errorFlag = cudaSuccess;
errorFlag = cudaMalloc((void**) &d_latency, (sizeof(double)*1));
if(errorFlag != cudaSuccess)
{
fprintf(stderr, "Failed to alloc memory (error code %s)!\n", cudaGetErrorString(errorFlag));
exit(-1);
}
errorFlag = cudaMalloc((void**) &d_data, (sizeof(int)*DATA_SIZE));
if(errorFlag != cudaSuccess)
{
fprintf(stderr, "Failed to alloc memory (error code %s)!\n", cudaGetErrorString(errorFlag));
exit(-1);
}
errorFlag = cudaMemcpy(d_data, data, (sizeof(int)*DATA_SIZE), cudaMemcpyHostToDevice);
if(errorFlag != cudaSuccess)
{
fprintf(stderr, "Failed to copyback (error code %s)!\n", cudaGetErrorString(errorFlag));
exit(-1);
}
dim3 dimBlock(THREADS_PER_SM,1,1);
dim3 dimGrid(BLOCKS_PER_SM,1,1);
cache_latency<<<dimGrid,dimBlock>>>(d_latency,d_data,DATA_SIZE);
cudaDeviceSynchronize();
errorFlag = cudaGetLastError();
if(errorFlag != cudaSuccess)
{
fprintf(stderr, "Kernel launch error! (error code %s)!\n", cudaGetErrorString(errorFlag));
exit(-1);
}
errorFlag = cudaMemcpy(latency, d_latency, (sizeof(double)*1), cudaMemcpyDeviceToHost);
if(errorFlag != cudaSuccess)
{
fprintf(stderr, "Failed to copyback (error code %s)!\n", cudaGetErrorString(errorFlag));
exit(-1);
}
cout<<"\nLatency\n";
//for(int i=0; i<1; i++)
//{
// sum+=latency[i+ITERATIONS] - latency[i];
//}
cout<<": "<< latency[0]<<endl;
cout<<endl;
return 0;
} | code for sm_80
Function : _Z13cache_latencyPdPii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ IMAD.MOV.U32 R0, RZ, RZ, c[0x0][0x170] ; /* 0x00005c00ff007624 */
/* 0x000fca00078e00ff */
/*0020*/ ISETP.GE.AND P0, PT, R0, 0x1, PT ; /* 0x000000010000780c */
/* 0x000fda0003f06270 */
/*0030*/ @!P0 BRA 0x3e0 ; /* 0x000003a000008947 */
/* 0x000fea0003800000 */
/*0040*/ IADD3 R2, R0.reuse, -0x1, RZ ; /* 0xffffffff00027810 */
/* 0x040fe40007ffe0ff */
/*0050*/ LOP3.LUT R0, R0, 0x3, RZ, 0xc0, !PT ; /* 0x0000000300007812 */
/* 0x000fe400078ec0ff */
/*0060*/ ISETP.GE.U32.AND P0, PT, R2, 0x3, PT ; /* 0x000000030200780c */
/* 0x000fda0003f06070 */
/*0070*/ @!P0 BRA 0x300 ; /* 0x0000028000008947 */
/* 0x000fea0003800000 */
/*0080*/ IADD3 R2, -R0, c[0x0][0x170], RZ ; /* 0x00005c0000027a10 */
/* 0x000fe40007ffe1ff */
/*0090*/ CS2R R6, SR_CLOCKLO ; /* 0x0000000000067805 */
/* 0x000fca0000015000 */
/*00a0*/ CS2R R8, SR_CLOCKLO ; /* 0x0000000000087805 */
/* 0x000fca0000015000 */
/*00b0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fe20000010000 */
/*00c0*/ IMAD.IADD R7, R8, 0x1, -R6 ; /* 0x0000000108077824 */
/* 0x000fca00078e0a06 */
/*00d0*/ LDS.64 R4, [RZ] ; /* 0x00000000ff047984 */
/* 0x000e240000000a00 */
/*00e0*/ IADD3 R4, P0, R4, R7, RZ ; /* 0x0000000704047210 */
/* 0x001fca0007f1e0ff */
/*00f0*/ IMAD.X R5, RZ, RZ, R5, P0 ; /* 0x000000ffff057224 */
/* 0x000fca00000e0605 */
/*0100*/ STS.64 [RZ], R4 ; /* 0x00000004ff007388 */
/* 0x0001e80000000a00 */
/*0110*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0120*/ CS2R R6, SR_CLOCKLO ; /* 0x0000000000067805 */
/* 0x000fe40000015000 */
/*0130*/ CS2R R8, SR_CLOCKLO ; /* 0x0000000000087805 */
/* 0x000fca0000015000 */
/*0140*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fe20000010000 */
/*0150*/ IMAD.IADD R7, R8, 0x1, -R6 ; /* 0x0000000108077824 */
/* 0x000fca00078e0a06 */
/*0160*/ LDS.64 R4, [RZ] ; /* 0x00000000ff047984 */
/* 0x001e240000000a00 */
/*0170*/ IADD3 R4, P0, R4, R7, RZ ; /* 0x0000000704047210 */
/* 0x001fca0007f1e0ff */
/*0180*/ IMAD.X R5, RZ, RZ, R5, P0 ; /* 0x000000ffff057224 */
/* 0x000fca00000e0605 */
/*0190*/ STS.64 [RZ], R4 ; /* 0x00000004ff007388 */
/* 0x0001e80000000a00 */
/*01a0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*01b0*/ CS2R R6, SR_CLOCKLO ; /* 0x0000000000067805 */
/* 0x000fe40000015000 */
/*01c0*/ CS2R R8, SR_CLOCKLO ; /* 0x0000000000087805 */
/* 0x000fca0000015000 */
/*01d0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fe20000010000 */
/*01e0*/ IMAD.IADD R7, R8, 0x1, -R6 ; /* 0x0000000108077824 */
/* 0x000fca00078e0a06 */
/*01f0*/ LDS.64 R4, [RZ] ; /* 0x00000000ff047984 */
/* 0x001e240000000a00 */
/*0200*/ IADD3 R4, P0, R4, R7, RZ ; /* 0x0000000704047210 */
/* 0x001fca0007f1e0ff */
/*0210*/ IMAD.X R5, RZ, RZ, R5, P0 ; /* 0x000000ffff057224 */
/* 0x000fca00000e0605 */
/*0220*/ STS.64 [RZ], R4 ; /* 0x00000004ff007388 */
/* 0x0001e80000000a00 */
/*0230*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0240*/ CS2R R6, SR_CLOCKLO ; /* 0x0000000000067805 */
/* 0x000fe40000015000 */
/*0250*/ CS2R R8, SR_CLOCKLO ; /* 0x0000000000087805 */
/* 0x000fca0000015000 */
/*0260*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fe20000010000 */
/*0270*/ IMAD.IADD R7, R8, 0x1, -R6 ; /* 0x0000000108077824 */
/* 0x000fe200078e0a06 */
/*0280*/ IADD3 R2, R2, -0x4, RZ ; /* 0xfffffffc02027810 */
/* 0x000fc80007ffe0ff */
/*0290*/ LDS.64 R4, [RZ] ; /* 0x00000000ff047984 */
/* 0x001e240000000a00 */
/*02a0*/ IADD3 R4, P0, R4, R7, RZ ; /* 0x0000000704047210 */
/* 0x001fca0007f1e0ff */
/*02b0*/ IMAD.X R5, RZ, RZ, R5, P0 ; /* 0x000000ffff057224 */
/* 0x000fe200000e0605 */
/*02c0*/ ISETP.NE.AND P0, PT, R2, RZ, PT ; /* 0x000000ff0200720c */
/* 0x000fc80003f05270 */
/*02d0*/ STS.64 [RZ], R4 ; /* 0x00000004ff007388 */
/* 0x0001e80000000a00 */
/*02e0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*02f0*/ @P0 BRA 0x90 ; /* 0xfffffd9000000947 */
/* 0x001fea000383ffff */
/*0300*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */
/* 0x000fda0003f05270 */
/*0310*/ @!P0 BRA 0x3e0 ; /* 0x000000c000008947 */
/* 0x000fea0003800000 */
/*0320*/ CS2R R4, SR_CLOCKLO ; /* 0x0000000000047805 */
/* 0x000fe40000015000 */
/*0330*/ CS2R R6, SR_CLOCKLO ; /* 0x0000000000067805 */
/* 0x000fca0000015000 */
/*0340*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fe20000010000 */
/*0350*/ IMAD.IADD R5, R6, 0x1, -R4 ; /* 0x0000000106057824 */
/* 0x000fe200078e0a04 */
/*0360*/ IADD3 R0, R0, -0x1, RZ ; /* 0xffffffff00007810 */
/* 0x000fc80007ffe0ff */
/*0370*/ LDS.64 R2, [RZ] ; /* 0x00000000ff027984 */
/* 0x000e240000000a00 */
/*0380*/ IADD3 R2, P0, R2, R5, RZ ; /* 0x0000000502027210 */
/* 0x001fca0007f1e0ff */
/*0390*/ IMAD.X R3, RZ, RZ, R3, P0 ; /* 0x000000ffff037224 */
/* 0x000fe200000e0603 */
/*03a0*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */
/* 0x000fc80003f05270 */
/*03b0*/ STS.64 [RZ], R2 ; /* 0x00000002ff007388 */
/* 0x0001e80000000a00 */
/*03c0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*03d0*/ @P0 BRA 0x320 ; /* 0xffffff4000000947 */
/* 0x001fea000383ffff */
/*03e0*/ I2F.F64 R4, c[0x0][0x170] ; /* 0x00005c0000047b12 */
/* 0x000e220000201c00 */
/*03f0*/ LDS.64 R6, [RZ] ; /* 0x00000000ff067984 */
/* 0x000e620000000a00 */
/*0400*/ IMAD.MOV.U32 R2, RZ, RZ, 0x1 ; /* 0x00000001ff027424 */
/* 0x000fe200078e00ff */
/*0410*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fca0000000a00 */
/*0420*/ MUFU.RCP64H R3, R5 ; /* 0x0000000500037308 */
/* 0x001e240000001800 */
/*0430*/ DFMA R8, -R4, R2, 1 ; /* 0x3ff000000408742b */
/* 0x001e0c0000000102 */
/*0440*/ DFMA R8, R8, R8, R8 ; /* 0x000000080808722b */
/* 0x001e220000000008 */
/*0450*/ I2F.F64.S64 R6, R6 ; /* 0x0000000600067312 */
/* 0x002e6a0000301c00 */
/*0460*/ DFMA R8, R2, R8, R2 ; /* 0x000000080208722b */
/* 0x001e0c0000000002 */
/*0470*/ DFMA R2, -R4, R8, 1 ; /* 0x3ff000000402742b */
/* 0x001e0c0000000108 */
/*0480*/ DFMA R2, R8, R2, R8 ; /* 0x000000020802722b */
/* 0x001e220000000008 */
/*0490*/ FSETP.GEU.AND P1, PT, |R7|, 6.5827683646048100446e-37, PT ; /* 0x036000000700780b */
/* 0x002fca0003f2e200 */
/*04a0*/ DMUL R8, R6, R2 ; /* 0x0000000206087228 */
/* 0x001e0c0000000000 */
/*04b0*/ DFMA R10, -R4, R8, R6 ; /* 0x00000008040a722b */
/* 0x001e0c0000000106 */
/*04c0*/ DFMA R2, R2, R10, R8 ; /* 0x0000000a0202722b */
/* 0x001e140000000008 */
/*04d0*/ FFMA R0, RZ, R5, R3 ; /* 0x00000005ff007223 */
/* 0x001fca0000000003 */
/*04e0*/ FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ; /* 0x001000000000780b */
/* 0x000fda0003f04200 */
/*04f0*/ @P0 BRA P1, 0x540 ; /* 0x0000004000000947 */
/* 0x000fea0000800000 */
/*0500*/ MOV R0, 0x520 ; /* 0x0000052000007802 */
/* 0x000fe40000000f00 */
/*0510*/ CALL.REL.NOINC 0x580 ; /* 0x0000006000007944 */
/* 0x000fea0003c00000 */
/*0520*/ IMAD.MOV.U32 R2, RZ, RZ, R12 ; /* 0x000000ffff027224 */
/* 0x000fe400078e000c */
/*0530*/ IMAD.MOV.U32 R3, RZ, RZ, R13 ; /* 0x000000ffff037224 */
/* 0x000fe400078e000d */
/*0540*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x0][0x160] ; /* 0x00005800ff047624 */
/* 0x000fe400078e00ff */
/*0550*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x0][0x164] ; /* 0x00005900ff057624 */
/* 0x000fca00078e00ff */
/*0560*/ STG.E.64 [R4.64], R2 ; /* 0x0000000204007986 */
/* 0x000fe2000c101b04 */
/*0570*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0580*/ FSETP.GEU.AND P0, PT, |R5|.reuse, 1.469367938527859385e-39, PT ; /* 0x001000000500780b */
/* 0x040fe20003f0e200 */
/*0590*/ IMAD.MOV.U32 R8, RZ, RZ, 0x1 ; /* 0x00000001ff087424 */
/* 0x000fe200078e00ff */
/*05a0*/ LOP3.LUT R2, R5.reuse, 0x800fffff, RZ, 0xc0, !PT ; /* 0x800fffff05027812 */
/* 0x040fe200078ec0ff */
/*05b0*/ IMAD.MOV.U32 R13, RZ, RZ, 0x1ca00000 ; /* 0x1ca00000ff0d7424 */
/* 0x000fe200078e00ff */
/*05c0*/ LOP3.LUT R14, R5, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff00000050e7812 */
/* 0x000fe400078ec0ff */
/*05d0*/ LOP3.LUT R3, R2, 0x3ff00000, RZ, 0xfc, !PT ; /* 0x3ff0000002037812 */
/* 0x000fe200078efcff */
/*05e0*/ IMAD.MOV.U32 R2, RZ, RZ, R4 ; /* 0x000000ffff027224 */
/* 0x000fe200078e0004 */
/*05f0*/ LOP3.LUT R12, R7, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff00000070c7812 */
/* 0x000fc800078ec0ff */
/*0600*/ ISETP.GE.U32.AND P1, PT, R12, R14, PT ; /* 0x0000000e0c00720c */
/* 0x000fe20003f26070 */
/*0610*/ @!P0 DMUL R2, R4, 8.98846567431157953865e+307 ; /* 0x7fe0000004028828 */
/* 0x000e060000000000 */
/*0620*/ SEL R15, R13, 0x63400000, !P1 ; /* 0x634000000d0f7807 */
/* 0x000fe40004800000 */
/*0630*/ FSETP.GEU.AND P1, PT, |R7|, 1.469367938527859385e-39, PT ; /* 0x001000000700780b */
/* 0x000fe20003f2e200 */
/*0640*/ MUFU.RCP64H R9, R3 ; /* 0x0000000300097308 */
/* 0x001e280000001800 */
/*0650*/ @!P0 LOP3.LUT R14, R3, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff00000030e8812 */
/* 0x000fe200078ec0ff */
/*0660*/ DFMA R10, R8, -R2, 1 ; /* 0x3ff00000080a742b */
/* 0x001e0c0000000802 */
/*0670*/ DFMA R10, R10, R10, R10 ; /* 0x0000000a0a0a722b */
/* 0x001e0c000000000a */
/*0680*/ DFMA R10, R8, R10, R8 ; /* 0x0000000a080a722b */
/* 0x001e0c0000000008 */
/*0690*/ DFMA R8, R10, -R2, 1 ; /* 0x3ff000000a08742b */
/* 0x001e0c0000000802 */
/*06a0*/ DFMA R10, R10, R8, R10 ; /* 0x000000080a0a722b */
/* 0x001064000000000a */
/*06b0*/ LOP3.LUT R9, R15, 0x800fffff, R7, 0xf8, !PT ; /* 0x800fffff0f097812 */
/* 0x001fe200078ef807 */
/*06c0*/ IMAD.MOV.U32 R15, RZ, RZ, R12 ; /* 0x000000ffff0f7224 */
/* 0x000fe400078e000c */
/*06d0*/ IMAD.MOV.U32 R8, RZ, RZ, R6 ; /* 0x000000ffff087224 */
/* 0x000fe200078e0006 */
/*06e0*/ @P1 BRA 0x770 ; /* 0x0000008000001947 */
/* 0x000fea0003800000 */
/*06f0*/ LOP3.LUT R15, R5, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff00000050f7812 */
/* 0x002fe200078ec0ff */
/*0700*/ IMAD.MOV.U32 R16, RZ, RZ, RZ ; /* 0x000000ffff107224 */
/* 0x000fc600078e00ff */
/*0710*/ ISETP.GE.U32.AND P0, PT, R12, R15, PT ; /* 0x0000000f0c00720c */
/* 0x000fc80003f06070 */
/*0720*/ SEL R15, R13, 0x63400000, !P0 ; /* 0x634000000d0f7807 */
/* 0x000fc80004000000 */
/*0730*/ LOP3.LUT R15, R15, 0x80000000, R7, 0xf8, !PT ; /* 0x800000000f0f7812 */
/* 0x000fc800078ef807 */
/*0740*/ LOP3.LUT R17, R15, 0x100000, RZ, 0xfc, !PT ; /* 0x001000000f117812 */
/* 0x000fcc00078efcff */
/*0750*/ DFMA R8, R8, 2, -R16 ; /* 0x400000000808782b */
/* 0x000e140000000810 */
/*0760*/ LOP3.LUT R15, R9, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff00000090f7812 */
/* 0x001fc800078ec0ff */
/*0770*/ IADD3 R18, R15, -0x1, RZ ; /* 0xffffffff0f127810 */
/* 0x002fe20007ffe0ff */
/*0780*/ DMUL R16, R10, R8 ; /* 0x000000080a107228 */
/* 0x000e220000000000 */
/*0790*/ IADD3 R20, R14, -0x1, RZ ; /* 0xffffffff0e147810 */
/* 0x000fe40007ffe0ff */
/*07a0*/ ISETP.GT.U32.AND P0, PT, R18, 0x7feffffe, PT ; /* 0x7feffffe1200780c */
/* 0x000fc60003f04070 */
/*07b0*/ DFMA R18, R16, -R2, R8 ; /* 0x800000021012722b */
/* 0x001e220000000008 */
/*07c0*/ ISETP.GT.U32.OR P0, PT, R20, 0x7feffffe, P0 ; /* 0x7feffffe1400780c */
/* 0x000fca0000704470 */
/*07d0*/ DFMA R10, R10, R18, R16 ; /* 0x000000120a0a722b */
/* 0x0010500000000010 */
/*07e0*/ @P0 BRA 0x9b0 ; /* 0x000001c000000947 */
/* 0x000fea0003800000 */
/*07f0*/ LOP3.LUT R7, R5, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff0000005077812 */
/* 0x003fc800078ec0ff */
/*0800*/ ISETP.GE.U32.AND P0, PT, R12.reuse, R7, PT ; /* 0x000000070c00720c */
/* 0x040fe20003f06070 */
/*0810*/ IMAD.IADD R6, R12, 0x1, -R7 ; /* 0x000000010c067824 */
/* 0x000fc600078e0a07 */
/*0820*/ SEL R13, R13, 0x63400000, !P0 ; /* 0x634000000d0d7807 */
/* 0x000fe40004000000 */
/*0830*/ IMNMX R6, R6, -0x46a00000, !PT ; /* 0xb960000006067817 */
/* 0x000fc80007800200 */
/*0840*/ IMNMX R6, R6, 0x46a00000, PT ; /* 0x46a0000006067817 */
/* 0x000fca0003800200 */
/*0850*/ IMAD.IADD R14, R6, 0x1, -R13 ; /* 0x00000001060e7824 */
/* 0x000fe400078e0a0d */
/*0860*/ IMAD.MOV.U32 R6, RZ, RZ, RZ ; /* 0x000000ffff067224 */
/* 0x000fc600078e00ff */
/*0870*/ IADD3 R7, R14, 0x7fe00000, RZ ; /* 0x7fe000000e077810 */
/* 0x000fcc0007ffe0ff */
/*0880*/ DMUL R12, R10, R6 ; /* 0x000000060a0c7228 */
/* 0x000e140000000000 */
/*0890*/ FSETP.GTU.AND P0, PT, |R13|, 1.469367938527859385e-39, PT ; /* 0x001000000d00780b */
/* 0x001fda0003f0c200 */
/*08a0*/ @P0 BRA 0xb00 ; /* 0x0000025000000947 */
/* 0x000fea0003800000 */
/*08b0*/ DFMA R2, R10, -R2, R8 ; /* 0x800000020a02722b */
/* 0x000e220000000008 */
/*08c0*/ IMAD.MOV.U32 R6, RZ, RZ, RZ ; /* 0x000000ffff067224 */
/* 0x000fd200078e00ff */
/*08d0*/ FSETP.NEU.AND P0, PT, R3.reuse, RZ, PT ; /* 0x000000ff0300720b */
/* 0x041fe40003f0d000 */
/*08e0*/ LOP3.LUT R5, R3, 0x80000000, R5, 0x48, !PT ; /* 0x8000000003057812 */
/* 0x000fc800078e4805 */
/*08f0*/ LOP3.LUT R7, R5, R7, RZ, 0xfc, !PT ; /* 0x0000000705077212 */
/* 0x000fce00078efcff */
/*0900*/ @!P0 BRA 0xb00 ; /* 0x000001f000008947 */
/* 0x000fea0003800000 */
/*0910*/ IMAD.MOV R3, RZ, RZ, -R14 ; /* 0x000000ffff037224 */
/* 0x000fe200078e0a0e */
/*0920*/ DMUL.RP R6, R10, R6 ; /* 0x000000060a067228 */
/* 0x000e220000008000 */
/*0930*/ IMAD.MOV.U32 R2, RZ, RZ, RZ ; /* 0x000000ffff027224 */
/* 0x000fcc00078e00ff */
/*0940*/ DFMA R2, R12, -R2, R10 ; /* 0x800000020c02722b */
/* 0x000e46000000000a */
/*0950*/ LOP3.LUT R5, R7, R5, RZ, 0x3c, !PT ; /* 0x0000000507057212 */
/* 0x001fc600078e3cff */
/*0960*/ IADD3 R2, -R14, -0x43300000, RZ ; /* 0xbcd000000e027810 */
/* 0x002fc80007ffe1ff */
/*0970*/ FSETP.NEU.AND P0, PT, |R3|, R2, PT ; /* 0x000000020300720b */
/* 0x000fc80003f0d200 */
/*0980*/ FSEL R12, R6, R12, !P0 ; /* 0x0000000c060c7208 */
/* 0x000fe40004000000 */
/*0990*/ FSEL R13, R5, R13, !P0 ; /* 0x0000000d050d7208 */
/* 0x000fe20004000000 */
/*09a0*/ BRA 0xb00 ; /* 0x0000015000007947 */
/* 0x000fea0003800000 */
/*09b0*/ DSETP.NAN.AND P0, PT, R6, R6, PT ; /* 0x000000060600722a */
/* 0x003e1c0003f08000 */
/*09c0*/ @P0 BRA 0xae0 ; /* 0x0000011000000947 */
/* 0x001fea0003800000 */
/*09d0*/ DSETP.NAN.AND P0, PT, R4, R4, PT ; /* 0x000000040400722a */
/* 0x000e1c0003f08000 */
/*09e0*/ @P0 BRA 0xab0 ; /* 0x000000c000000947 */
/* 0x001fea0003800000 */
/*09f0*/ ISETP.NE.AND P0, PT, R15, R14, PT ; /* 0x0000000e0f00720c */
/* 0x000fe20003f05270 */
/*0a00*/ IMAD.MOV.U32 R12, RZ, RZ, 0x0 ; /* 0x00000000ff0c7424 */
/* 0x000fe400078e00ff */
/*0a10*/ IMAD.MOV.U32 R13, RZ, RZ, -0x80000 ; /* 0xfff80000ff0d7424 */
/* 0x000fd400078e00ff */
/*0a20*/ @!P0 BRA 0xb00 ; /* 0x000000d000008947 */
/* 0x000fea0003800000 */
/*0a30*/ ISETP.NE.AND P0, PT, R15, 0x7ff00000, PT ; /* 0x7ff000000f00780c */
/* 0x000fe40003f05270 */
/*0a40*/ LOP3.LUT R13, R7, 0x80000000, R5, 0x48, !PT ; /* 0x80000000070d7812 */
/* 0x000fe400078e4805 */
/*0a50*/ ISETP.EQ.OR P0, PT, R14, RZ, !P0 ; /* 0x000000ff0e00720c */
/* 0x000fda0004702670 */
/*0a60*/ @P0 LOP3.LUT R2, R13, 0x7ff00000, RZ, 0xfc, !PT ; /* 0x7ff000000d020812 */
/* 0x000fe200078efcff */
/*0a70*/ @!P0 IMAD.MOV.U32 R12, RZ, RZ, RZ ; /* 0x000000ffff0c8224 */
/* 0x000fe400078e00ff */
/*0a80*/ @P0 IMAD.MOV.U32 R12, RZ, RZ, RZ ; /* 0x000000ffff0c0224 */
/* 0x000fe400078e00ff */
/*0a90*/ @P0 IMAD.MOV.U32 R13, RZ, RZ, R2 ; /* 0x000000ffff0d0224 */
/* 0x000fe200078e0002 */
/*0aa0*/ BRA 0xb00 ; /* 0x0000005000007947 */
/* 0x000fea0003800000 */
/*0ab0*/ LOP3.LUT R13, R5, 0x80000, RZ, 0xfc, !PT ; /* 0x00080000050d7812 */
/* 0x000fe200078efcff */
/*0ac0*/ IMAD.MOV.U32 R12, RZ, RZ, R4 ; /* 0x000000ffff0c7224 */
/* 0x000fe200078e0004 */
/*0ad0*/ BRA 0xb00 ; /* 0x0000002000007947 */
/* 0x000fea0003800000 */
/*0ae0*/ LOP3.LUT R13, R7, 0x80000, RZ, 0xfc, !PT ; /* 0x00080000070d7812 */
/* 0x000fe200078efcff */
/*0af0*/ IMAD.MOV.U32 R12, RZ, RZ, R6 ; /* 0x000000ffff0c7224 */
/* 0x000fe400078e0006 */
/*0b00*/ IMAD.MOV.U32 R2, RZ, RZ, R0 ; /* 0x000000ffff027224 */
/* 0x000fe400078e0000 */
/*0b10*/ IMAD.MOV.U32 R3, RZ, RZ, 0x0 ; /* 0x00000000ff037424 */
/* 0x000fc800078e00ff */
/*0b20*/ RET.REL.NODEC R2 0x0 ; /* 0xfffff4d002007950 */
/* 0x000fea0003c3ffff */
/*0b30*/ BRA 0xb30; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0b40*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0b50*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0b60*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0b70*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0b80*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0b90*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ba0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0bb0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0bc0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0bd0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0be0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0bf0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /***
* Ashutosh Dhar
* Department of Electrical and Computer Engineeing
* University of Illinois, Urbana-Champaign
*
*/
#include <cuda.h>
#include <iostream>
#include <cstdio>
#define THREADS_PER_SM 1
#define BLOCKS_PER_SM 1
int ITERATIONS;
int L2_CACHE_SIZE = 512*1024;
int DATA_SIZE;// (L2_CACHE_SIZE * ITERATIONS)
using namespace std;
__global__ void cache_latency(double *latency, int *data, int DATA_SIZE)
{
//__shared__ double sh_start;
//__shared__ double sh_stop;
__shared__ long long int run_latency;
unsigned int start_t, stop_t;
//float local;
int load=0;
for(int i=0; i<DATA_SIZE; i++)
{
start_t = clock();
load = data[load];
stop_t = clock();
__syncthreads();
//data[load] = local + 1;
run_latency += (stop_t - start_t);
__syncthreads();
}
latency[0] = (double)(run_latency)/(DATA_SIZE);
}
int main(int argc, char **argv)
{
if(argc <2)
{
cerr<<"Enter iterations!";
return -1;
}
ITERATIONS = atoi(argv[1]);
DATA_SIZE = L2_CACHE_SIZE * ITERATIONS;
//double sum;
int *data;
data = (int*) malloc(sizeof(int)*DATA_SIZE);
srand(12);
for(int i=0; i<DATA_SIZE; i++)
{
data[i] = i;//1.0*rand();
}
double *latency;
latency = (double*) malloc((sizeof(double)) *1);
double *d_latency;
int *d_data;
cudaError_t errorFlag = cudaSuccess;
errorFlag = cudaMalloc((void**) &d_latency, (sizeof(double)*1));
if(errorFlag != cudaSuccess)
{
fprintf(stderr, "Failed to alloc memory (error code %s)!\n", cudaGetErrorString(errorFlag));
exit(-1);
}
errorFlag = cudaMalloc((void**) &d_data, (sizeof(int)*DATA_SIZE));
if(errorFlag != cudaSuccess)
{
fprintf(stderr, "Failed to alloc memory (error code %s)!\n", cudaGetErrorString(errorFlag));
exit(-1);
}
errorFlag = cudaMemcpy(d_data, data, (sizeof(int)*DATA_SIZE), cudaMemcpyHostToDevice);
if(errorFlag != cudaSuccess)
{
fprintf(stderr, "Failed to copyback (error code %s)!\n", cudaGetErrorString(errorFlag));
exit(-1);
}
dim3 dimBlock(THREADS_PER_SM,1,1);
dim3 dimGrid(BLOCKS_PER_SM,1,1);
cache_latency<<<dimGrid,dimBlock>>>(d_latency,d_data,DATA_SIZE);
cudaDeviceSynchronize();
errorFlag = cudaGetLastError();
if(errorFlag != cudaSuccess)
{
fprintf(stderr, "Kernel launch error! (error code %s)!\n", cudaGetErrorString(errorFlag));
exit(-1);
}
errorFlag = cudaMemcpy(latency, d_latency, (sizeof(double)*1), cudaMemcpyDeviceToHost);
if(errorFlag != cudaSuccess)
{
fprintf(stderr, "Failed to copyback (error code %s)!\n", cudaGetErrorString(errorFlag));
exit(-1);
}
cout<<"\nLatency\n";
//for(int i=0; i<1; i++)
//{
// sum+=latency[i+ITERATIONS] - latency[i];
//}
cout<<": "<< latency[0]<<endl;
cout<<endl;
return 0;
} | .file "tmpxft_0008e879_00000000-6_mem_latency.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3672:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z36__device_stub__Z13cache_latencyPdPiiPdPii
.type _Z36__device_stub__Z13cache_latencyPdPiiPdPii, @function
_Z36__device_stub__Z13cache_latencyPdPiiPdPii:
.LFB3694:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movl %edx, 12(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z13cache_latencyPdPii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3694:
.size _Z36__device_stub__Z13cache_latencyPdPiiPdPii, .-_Z36__device_stub__Z13cache_latencyPdPiiPdPii
.globl _Z13cache_latencyPdPii
.type _Z13cache_latencyPdPii, @function
_Z13cache_latencyPdPii:
.LFB3695:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z36__device_stub__Z13cache_latencyPdPiiPdPii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3695:
.size _Z13cache_latencyPdPii, .-_Z13cache_latencyPdPii
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Enter iterations!"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC1:
.string "Failed to alloc memory (error code %s)!\n"
.align 8
.LC2:
.string "Failed to copyback (error code %s)!\n"
.align 8
.LC3:
.string "Kernel launch error! (error code %s)!\n"
.section .rodata.str1.1
.LC4:
.string "\nLatency\n"
.LC5:
.string ": "
.text
.globl main
.type main, @function
main:
.LFB3669:
.cfi_startproc
endbr64
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $56, %rsp
.cfi_def_cfa_offset 80
movq %fs:40, %rax
movq %rax, 40(%rsp)
xorl %eax, %eax
cmpl $1, %edi
jle .L25
movq 8(%rsi), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movl %eax, ITERATIONS(%rip)
imull L2_CACHE_SIZE(%rip), %eax
movl %eax, DATA_SIZE(%rip)
cltq
leaq 0(,%rax,4), %rdi
call malloc@PLT
movq %rax, %rbx
movl $12, %edi
call srand@PLT
movl DATA_SIZE(%rip), %edx
testl %edx, %edx
jle .L14
movslq %edx, %rdx
movl $0, %eax
.L15:
movl %eax, (%rbx,%rax,4)
addq $1, %rax
cmpq %rdx, %rax
jne .L15
.L14:
movl $8, %edi
call malloc@PLT
movq %rax, %rbp
movq %rsp, %rdi
movl $8, %esi
call cudaMalloc@PLT
testl %eax, %eax
jne .L26
movslq DATA_SIZE(%rip), %rsi
salq $2, %rsi
leaq 8(%rsp), %rdi
call cudaMalloc@PLT
testl %eax, %eax
jne .L27
movslq DATA_SIZE(%rip), %rdx
salq $2, %rdx
movl $1, %ecx
movq %rbx, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
testl %eax, %eax
jne .L28
movl $1, 16(%rsp)
movl $1, 20(%rsp)
movl $1, 28(%rsp)
movl $1, 32(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 16(%rsp), %rdx
movl $1, %ecx
movq 28(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L29
.L19:
call cudaDeviceSynchronize@PLT
call cudaGetLastError@PLT
testl %eax, %eax
jne .L30
movl $2, %ecx
movl $8, %edx
movq (%rsp), %rsi
movq %rbp, %rdi
call cudaMemcpy@PLT
testl %eax, %eax
jne .L31
leaq .LC4(%rip), %rsi
leaq _ZSt4cout(%rip), %rbx
movq %rbx, %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
leaq .LC5(%rip), %rsi
movq %rbx, %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movsd 0(%rbp), %xmm0
call _ZNSo9_M_insertIdEERSoT_@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
movq %rbx, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
movl $0, %eax
.L11:
movq 40(%rsp), %rdx
subq %fs:40, %rdx
jne .L32
addq $56, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.L25:
.cfi_restore_state
leaq .LC0(%rip), %rsi
leaq _ZSt4cerr(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movl $-1, %eax
jmp .L11
.L26:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
leaq .LC1(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $-1, %edi
call exit@PLT
.L27:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
leaq .LC1(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $-1, %edi
call exit@PLT
.L28:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
leaq .LC2(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $-1, %edi
call exit@PLT
.L29:
movl DATA_SIZE(%rip), %edx
movq 8(%rsp), %rsi
movq (%rsp), %rdi
call _Z36__device_stub__Z13cache_latencyPdPiiPdPii
jmp .L19
.L30:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
leaq .LC3(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $-1, %edi
call exit@PLT
.L31:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
leaq .LC2(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $-1, %edi
call exit@PLT
.L32:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3669:
.size main, .-main
.section .rodata.str1.1
.LC6:
.string "_Z13cache_latencyPdPii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3697:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC6(%rip), %rdx
movq %rdx, %rcx
leaq _Z13cache_latencyPdPii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3697:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.globl DATA_SIZE
.bss
.align 4
.type DATA_SIZE, @object
.size DATA_SIZE, 4
DATA_SIZE:
.zero 4
.globl L2_CACHE_SIZE
.data
.align 4
.type L2_CACHE_SIZE, @object
.size L2_CACHE_SIZE, 4
L2_CACHE_SIZE:
.long 524288
.globl ITERATIONS
.bss
.align 4
.type ITERATIONS, @object
.size ITERATIONS, 4
ITERATIONS:
.zero 4
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /***
* Ashutosh Dhar
* Department of Electrical and Computer Engineeing
* University of Illinois, Urbana-Champaign
*
*/
#include <cuda.h>
#include <iostream>
#include <cstdio>
#define THREADS_PER_SM 1
#define BLOCKS_PER_SM 1
int ITERATIONS;
int L2_CACHE_SIZE = 512*1024;
int DATA_SIZE;// (L2_CACHE_SIZE * ITERATIONS)
using namespace std;
__global__ void cache_latency(double *latency, int *data, int DATA_SIZE)
{
//__shared__ double sh_start;
//__shared__ double sh_stop;
__shared__ long long int run_latency;
unsigned int start_t, stop_t;
//float local;
int load=0;
for(int i=0; i<DATA_SIZE; i++)
{
start_t = clock();
load = data[load];
stop_t = clock();
__syncthreads();
//data[load] = local + 1;
run_latency += (stop_t - start_t);
__syncthreads();
}
latency[0] = (double)(run_latency)/(DATA_SIZE);
}
int main(int argc, char **argv)
{
if(argc <2)
{
cerr<<"Enter iterations!";
return -1;
}
ITERATIONS = atoi(argv[1]);
DATA_SIZE = L2_CACHE_SIZE * ITERATIONS;
//double sum;
int *data;
data = (int*) malloc(sizeof(int)*DATA_SIZE);
srand(12);
for(int i=0; i<DATA_SIZE; i++)
{
data[i] = i;//1.0*rand();
}
double *latency;
latency = (double*) malloc((sizeof(double)) *1);
double *d_latency;
int *d_data;
cudaError_t errorFlag = cudaSuccess;
errorFlag = cudaMalloc((void**) &d_latency, (sizeof(double)*1));
if(errorFlag != cudaSuccess)
{
fprintf(stderr, "Failed to alloc memory (error code %s)!\n", cudaGetErrorString(errorFlag));
exit(-1);
}
errorFlag = cudaMalloc((void**) &d_data, (sizeof(int)*DATA_SIZE));
if(errorFlag != cudaSuccess)
{
fprintf(stderr, "Failed to alloc memory (error code %s)!\n", cudaGetErrorString(errorFlag));
exit(-1);
}
errorFlag = cudaMemcpy(d_data, data, (sizeof(int)*DATA_SIZE), cudaMemcpyHostToDevice);
if(errorFlag != cudaSuccess)
{
fprintf(stderr, "Failed to copyback (error code %s)!\n", cudaGetErrorString(errorFlag));
exit(-1);
}
dim3 dimBlock(THREADS_PER_SM,1,1);
dim3 dimGrid(BLOCKS_PER_SM,1,1);
cache_latency<<<dimGrid,dimBlock>>>(d_latency,d_data,DATA_SIZE);
cudaDeviceSynchronize();
errorFlag = cudaGetLastError();
if(errorFlag != cudaSuccess)
{
fprintf(stderr, "Kernel launch error! (error code %s)!\n", cudaGetErrorString(errorFlag));
exit(-1);
}
errorFlag = cudaMemcpy(latency, d_latency, (sizeof(double)*1), cudaMemcpyDeviceToHost);
if(errorFlag != cudaSuccess)
{
fprintf(stderr, "Failed to copyback (error code %s)!\n", cudaGetErrorString(errorFlag));
exit(-1);
}
cout<<"\nLatency\n";
//for(int i=0; i<1; i++)
//{
// sum+=latency[i+ITERATIONS] - latency[i];
//}
cout<<": "<< latency[0]<<endl;
cout<<endl;
return 0;
} | /***
* Ashutosh Dhar
* Department of Electrical and Computer Engineeing
* University of Illinois, Urbana-Champaign
*
*/
#include <hip/hip_runtime.h>
#include <iostream>
#include <cstdio>
#define THREADS_PER_SM 1
#define BLOCKS_PER_SM 1
int ITERATIONS;
int L2_CACHE_SIZE = 512*1024;
int DATA_SIZE;// (L2_CACHE_SIZE * ITERATIONS)
using namespace std;
__global__ void cache_latency(double *latency, int *data, int DATA_SIZE)
{
//__shared__ double sh_start;
//__shared__ double sh_stop;
__shared__ long long int run_latency;
unsigned int start_t, stop_t;
//float local;
int load=0;
for(int i=0; i<DATA_SIZE; i++)
{
start_t = clock();
load = data[load];
stop_t = clock();
__syncthreads();
//data[load] = local + 1;
run_latency += (stop_t - start_t);
__syncthreads();
}
latency[0] = (double)(run_latency)/(DATA_SIZE);
}
int main(int argc, char **argv)
{
if(argc <2)
{
cerr<<"Enter iterations!";
return -1;
}
ITERATIONS = atoi(argv[1]);
DATA_SIZE = L2_CACHE_SIZE * ITERATIONS;
//double sum;
int *data;
data = (int*) malloc(sizeof(int)*DATA_SIZE);
srand(12);
for(int i=0; i<DATA_SIZE; i++)
{
data[i] = i;//1.0*rand();
}
double *latency;
latency = (double*) malloc((sizeof(double)) *1);
double *d_latency;
int *d_data;
hipError_t errorFlag = hipSuccess;
errorFlag = hipMalloc((void**) &d_latency, (sizeof(double)*1));
if(errorFlag != hipSuccess)
{
fprintf(stderr, "Failed to alloc memory (error code %s)!\n", hipGetErrorString(errorFlag));
exit(-1);
}
errorFlag = hipMalloc((void**) &d_data, (sizeof(int)*DATA_SIZE));
if(errorFlag != hipSuccess)
{
fprintf(stderr, "Failed to alloc memory (error code %s)!\n", hipGetErrorString(errorFlag));
exit(-1);
}
errorFlag = hipMemcpy(d_data, data, (sizeof(int)*DATA_SIZE), hipMemcpyHostToDevice);
if(errorFlag != hipSuccess)
{
fprintf(stderr, "Failed to copyback (error code %s)!\n", hipGetErrorString(errorFlag));
exit(-1);
}
dim3 dimBlock(THREADS_PER_SM,1,1);
dim3 dimGrid(BLOCKS_PER_SM,1,1);
cache_latency<<<dimGrid,dimBlock>>>(d_latency,d_data,DATA_SIZE);
hipDeviceSynchronize();
errorFlag = hipGetLastError();
if(errorFlag != hipSuccess)
{
fprintf(stderr, "Kernel launch error! (error code %s)!\n", hipGetErrorString(errorFlag));
exit(-1);
}
errorFlag = hipMemcpy(latency, d_latency, (sizeof(double)*1), hipMemcpyDeviceToHost);
if(errorFlag != hipSuccess)
{
fprintf(stderr, "Failed to copyback (error code %s)!\n", hipGetErrorString(errorFlag));
exit(-1);
}
cout<<"\nLatency\n";
//for(int i=0; i<1; i++)
//{
// sum+=latency[i+ITERATIONS] - latency[i];
//}
cout<<": "<< latency[0]<<endl;
cout<<endl;
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | /***
* Ashutosh Dhar
* Department of Electrical and Computer Engineeing
* University of Illinois, Urbana-Champaign
*
*/
#include <hip/hip_runtime.h>
#include <iostream>
#include <cstdio>
#define THREADS_PER_SM 1
#define BLOCKS_PER_SM 1
int ITERATIONS;
int L2_CACHE_SIZE = 512*1024;
int DATA_SIZE;// (L2_CACHE_SIZE * ITERATIONS)
using namespace std;
__global__ void cache_latency(double *latency, int *data, int DATA_SIZE)
{
//__shared__ double sh_start;
//__shared__ double sh_stop;
__shared__ long long int run_latency;
unsigned int start_t, stop_t;
//float local;
int load=0;
for(int i=0; i<DATA_SIZE; i++)
{
start_t = clock();
load = data[load];
stop_t = clock();
__syncthreads();
//data[load] = local + 1;
run_latency += (stop_t - start_t);
__syncthreads();
}
latency[0] = (double)(run_latency)/(DATA_SIZE);
}
int main(int argc, char **argv)
{
if(argc <2)
{
cerr<<"Enter iterations!";
return -1;
}
ITERATIONS = atoi(argv[1]);
DATA_SIZE = L2_CACHE_SIZE * ITERATIONS;
//double sum;
int *data;
data = (int*) malloc(sizeof(int)*DATA_SIZE);
srand(12);
for(int i=0; i<DATA_SIZE; i++)
{
data[i] = i;//1.0*rand();
}
double *latency;
latency = (double*) malloc((sizeof(double)) *1);
double *d_latency;
int *d_data;
hipError_t errorFlag = hipSuccess;
errorFlag = hipMalloc((void**) &d_latency, (sizeof(double)*1));
if(errorFlag != hipSuccess)
{
fprintf(stderr, "Failed to alloc memory (error code %s)!\n", hipGetErrorString(errorFlag));
exit(-1);
}
errorFlag = hipMalloc((void**) &d_data, (sizeof(int)*DATA_SIZE));
if(errorFlag != hipSuccess)
{
fprintf(stderr, "Failed to alloc memory (error code %s)!\n", hipGetErrorString(errorFlag));
exit(-1);
}
errorFlag = hipMemcpy(d_data, data, (sizeof(int)*DATA_SIZE), hipMemcpyHostToDevice);
if(errorFlag != hipSuccess)
{
fprintf(stderr, "Failed to copyback (error code %s)!\n", hipGetErrorString(errorFlag));
exit(-1);
}
dim3 dimBlock(THREADS_PER_SM,1,1);
dim3 dimGrid(BLOCKS_PER_SM,1,1);
cache_latency<<<dimGrid,dimBlock>>>(d_latency,d_data,DATA_SIZE);
hipDeviceSynchronize();
errorFlag = hipGetLastError();
if(errorFlag != hipSuccess)
{
fprintf(stderr, "Kernel launch error! (error code %s)!\n", hipGetErrorString(errorFlag));
exit(-1);
}
errorFlag = hipMemcpy(latency, d_latency, (sizeof(double)*1), hipMemcpyDeviceToHost);
if(errorFlag != hipSuccess)
{
fprintf(stderr, "Failed to copyback (error code %s)!\n", hipGetErrorString(errorFlag));
exit(-1);
}
cout<<"\nLatency\n";
//for(int i=0; i<1; i++)
//{
// sum+=latency[i+ITERATIONS] - latency[i];
//}
cout<<": "<< latency[0]<<endl;
cout<<endl;
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z13cache_latencyPdPii
.globl _Z13cache_latencyPdPii
.p2align 8
.type _Z13cache_latencyPdPii,@function
_Z13cache_latencyPdPii:
s_load_b32 s2, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s2, 1
s_cbranch_scc1 .LBB0_3
v_mov_b32_e32 v0, 0
s_mov_b32 s3, s2
.LBB0_2:
s_getreg_b32 s4, hwreg(HW_REG_SHADER_CYCLES, 0, 20)
s_getreg_b32 s5, hwreg(HW_REG_SHADER_CYCLES, 0, 20)
s_barrier
buffer_gl0_inv
ds_load_b64 v[1:2], v0
s_sub_i32 s4, s5, s4
s_add_i32 s3, s3, -1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s3, 0
s_waitcnt lgkmcnt(0)
v_add_co_u32 v1, vcc_lo, v1, s4
v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
ds_store_b64 v0, v[1:2]
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB0_2
.LBB0_3:
v_mov_b32_e32 v13, 0
v_cvt_f64_i32_e32 v[5:6], s2
s_load_b64 s[0:1], s[0:1], 0x0
ds_load_b64 v[0:1], v13
s_waitcnt lgkmcnt(0)
v_cvt_f64_i32_e32 v[1:2], v1
v_cvt_f64_u32_e32 v[3:4], v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ldexp_f64 v[0:1], v[1:2], 32
v_add_f64 v[0:1], v[0:1], v[3:4]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_scale_f64 v[2:3], null, v[5:6], v[5:6], v[0:1]
v_rcp_f64_e32 v[7:8], v[2:3]
s_waitcnt_depctr 0xfff
v_fma_f64 v[9:10], -v[2:3], v[7:8], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[7:8], v[7:8], v[9:10], v[7:8]
v_fma_f64 v[9:10], -v[2:3], v[7:8], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fma_f64 v[7:8], v[7:8], v[9:10], v[7:8]
v_div_scale_f64 v[9:10], vcc_lo, v[0:1], v[5:6], v[0:1]
v_mul_f64 v[11:12], v[9:10], v[7:8]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[2:3], -v[2:3], v[11:12], v[9:10]
v_div_fmas_f64 v[2:3], v[2:3], v[7:8], v[11:12]
s_delay_alu instid0(VALU_DEP_1)
v_div_fixup_f64 v[0:1], v[2:3], v[5:6], v[0:1]
global_store_b64 v13, v[0:1], s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z13cache_latencyPdPii
.amdhsa_group_segment_fixed_size 8
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 20
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 14
.amdhsa_next_free_sgpr 6
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z13cache_latencyPdPii, .Lfunc_end0-_Z13cache_latencyPdPii
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: by_value
.group_segment_fixed_size: 8
.kernarg_segment_align: 8
.kernarg_segment_size: 20
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z13cache_latencyPdPii
.private_segment_fixed_size: 0
.sgpr_count: 8
.sgpr_spill_count: 0
.symbol: _Z13cache_latencyPdPii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 14
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | /***
* Ashutosh Dhar
* Department of Electrical and Computer Engineeing
* University of Illinois, Urbana-Champaign
*
*/
#include <hip/hip_runtime.h>
#include <iostream>
#include <cstdio>
#define THREADS_PER_SM 1
#define BLOCKS_PER_SM 1
int ITERATIONS;
int L2_CACHE_SIZE = 512*1024;
int DATA_SIZE;// (L2_CACHE_SIZE * ITERATIONS)
using namespace std;
__global__ void cache_latency(double *latency, int *data, int DATA_SIZE)
{
//__shared__ double sh_start;
//__shared__ double sh_stop;
__shared__ long long int run_latency;
unsigned int start_t, stop_t;
//float local;
int load=0;
for(int i=0; i<DATA_SIZE; i++)
{
start_t = clock();
load = data[load];
stop_t = clock();
__syncthreads();
//data[load] = local + 1;
run_latency += (stop_t - start_t);
__syncthreads();
}
latency[0] = (double)(run_latency)/(DATA_SIZE);
}
int main(int argc, char **argv)
{
if(argc <2)
{
cerr<<"Enter iterations!";
return -1;
}
ITERATIONS = atoi(argv[1]);
DATA_SIZE = L2_CACHE_SIZE * ITERATIONS;
//double sum;
int *data;
data = (int*) malloc(sizeof(int)*DATA_SIZE);
srand(12);
for(int i=0; i<DATA_SIZE; i++)
{
data[i] = i;//1.0*rand();
}
double *latency;
latency = (double*) malloc((sizeof(double)) *1);
double *d_latency;
int *d_data;
hipError_t errorFlag = hipSuccess;
errorFlag = hipMalloc((void**) &d_latency, (sizeof(double)*1));
if(errorFlag != hipSuccess)
{
fprintf(stderr, "Failed to alloc memory (error code %s)!\n", hipGetErrorString(errorFlag));
exit(-1);
}
errorFlag = hipMalloc((void**) &d_data, (sizeof(int)*DATA_SIZE));
if(errorFlag != hipSuccess)
{
fprintf(stderr, "Failed to alloc memory (error code %s)!\n", hipGetErrorString(errorFlag));
exit(-1);
}
errorFlag = hipMemcpy(d_data, data, (sizeof(int)*DATA_SIZE), hipMemcpyHostToDevice);
if(errorFlag != hipSuccess)
{
fprintf(stderr, "Failed to copyback (error code %s)!\n", hipGetErrorString(errorFlag));
exit(-1);
}
dim3 dimBlock(THREADS_PER_SM,1,1);
dim3 dimGrid(BLOCKS_PER_SM,1,1);
cache_latency<<<dimGrid,dimBlock>>>(d_latency,d_data,DATA_SIZE);
hipDeviceSynchronize();
errorFlag = hipGetLastError();
if(errorFlag != hipSuccess)
{
fprintf(stderr, "Kernel launch error! (error code %s)!\n", hipGetErrorString(errorFlag));
exit(-1);
}
errorFlag = hipMemcpy(latency, d_latency, (sizeof(double)*1), hipMemcpyDeviceToHost);
if(errorFlag != hipSuccess)
{
fprintf(stderr, "Failed to copyback (error code %s)!\n", hipGetErrorString(errorFlag));
exit(-1);
}
cout<<"\nLatency\n";
//for(int i=0; i<1; i++)
//{
// sum+=latency[i+ITERATIONS] - latency[i];
//}
cout<<": "<< latency[0]<<endl;
cout<<endl;
return 0;
} | .text
.file "mem_latency.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z28__device_stub__cache_latencyPdPii # -- Begin function _Z28__device_stub__cache_latencyPdPii
.p2align 4, 0x90
.type _Z28__device_stub__cache_latencyPdPii,@function
_Z28__device_stub__cache_latencyPdPii: # @_Z28__device_stub__cache_latencyPdPii
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 12(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 12(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z13cache_latencyPdPii, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end0:
.size _Z28__device_stub__cache_latencyPdPii, .Lfunc_end0-_Z28__device_stub__cache_latencyPdPii
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %r14
.cfi_def_cfa_offset 16
pushq %rbx
.cfi_def_cfa_offset 24
subq $120, %rsp
.cfi_def_cfa_offset 144
.cfi_offset %rbx, -24
.cfi_offset %r14, -16
cmpl $1, %edi
jg .LBB1_2
# %bb.1:
movl $_ZSt4cerr, %edi
movl $.L.str, %esi
movl $17, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl $-1, %eax
jmp .LBB1_25
.LBB1_2:
movq 8(%rsi), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movl %eax, ITERATIONS(%rip)
movslq L2_CACHE_SIZE(%rip), %rcx
movslq %eax, %rdi
imulq %rcx, %rdi
movl %edi, DATA_SIZE(%rip)
shlq $2, %rdi
callq malloc
movq %rax, %r14
movl $12, %edi
callq srand
movl DATA_SIZE(%rip), %eax
testl %eax, %eax
jle .LBB1_5
# %bb.3: # %.lr.ph.preheader
xorl %ecx, %ecx
.p2align 4, 0x90
.LBB1_4: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movl %ecx, (%r14,%rcx,4)
incq %rcx
cmpq %rcx, %rax
jne .LBB1_4
.LBB1_5: # %._crit_edge
movl $8, %edi
callq malloc
movq %rax, %rbx
leaq 24(%rsp), %rdi
movl $8, %esi
callq hipMalloc
testl %eax, %eax
jne .LBB1_6
# %bb.8:
movslq DATA_SIZE(%rip), %rsi
shlq $2, %rsi
leaq 16(%rsp), %rdi
callq hipMalloc
testl %eax, %eax
jne .LBB1_6
# %bb.9:
movq 16(%rsp), %rdi
movslq DATA_SIZE(%rip), %rdx
shlq $2, %rdx
movq %r14, %rsi
movl $1, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB1_10
# %bb.11:
movabsq $4294967297, %rdi # imm = 0x100000001
movl $1, %esi
movq %rdi, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_13
# %bb.12:
movq 24(%rsp), %rax
movq 16(%rsp), %rcx
movl DATA_SIZE(%rip), %edx
movq %rax, 88(%rsp)
movq %rcx, 80(%rsp)
movl %edx, 12(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
leaq 64(%rsp), %rdi
leaq 48(%rsp), %rsi
leaq 40(%rsp), %rdx
leaq 32(%rsp), %rcx
callq __hipPopCallConfiguration
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
movq 48(%rsp), %rcx
movl 56(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z13cache_latencyPdPii, %edi
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
pushq 48(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_13:
callq hipDeviceSynchronize
callq hipGetLastError
testl %eax, %eax
jne .LBB1_14
# %bb.15:
movq 24(%rsp), %rsi
movl $8, %edx
movq %rbx, %rdi
movl $2, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB1_10
# %bb.16:
movl $_ZSt4cout, %edi
movl $.L.str.4, %esi
movl $9, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl $_ZSt4cout, %edi
movl $.L.str.5, %esi
movl $2, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movsd (%rbx), %xmm0 # xmm0 = mem[0],zero
movl $_ZSt4cout, %edi
callq _ZNSo9_M_insertIdEERSoT_
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %rbx
testq %rbx, %rbx
je .LBB1_26
# %bb.17: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
cmpb $0, 56(%rbx)
je .LBB1_19
# %bb.18:
movzbl 67(%rbx), %ecx
jmp .LBB1_20
.LBB1_19:
movq %rbx, %rdi
movq %rax, %r14
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r14, %rax
.LBB1_20: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
movq _ZSt4cout+240(%rax), %rbx
testq %rbx, %rbx
je .LBB1_26
# %bb.21: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i38
cmpb $0, 56(%rbx)
je .LBB1_23
# %bb.22:
movzbl 67(%rbx), %eax
jmp .LBB1_24
.LBB1_23:
movq %rbx, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
.LBB1_24: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit41
movsbl %al, %esi
movl $_ZSt4cout, %edi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
xorl %eax, %eax
.LBB1_25:
addq $120, %rsp
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
retq
.LBB1_6:
.cfi_def_cfa_offset 144
movq stderr(%rip), %rbx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.1, %esi
jmp .LBB1_7
.LBB1_10:
movq stderr(%rip), %rbx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.2, %esi
jmp .LBB1_7
.LBB1_26:
callq _ZSt16__throw_bad_castv
.LBB1_14:
movq stderr(%rip), %rbx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.3, %esi
.LBB1_7:
movq %rbx, %rdi
movq %rax, %rdx
xorl %eax, %eax
callq fprintf
movl $-1, %edi
callq exit
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z13cache_latencyPdPii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type ITERATIONS,@object # @ITERATIONS
.bss
.globl ITERATIONS
.p2align 2, 0x0
ITERATIONS:
.long 0 # 0x0
.size ITERATIONS, 4
.type L2_CACHE_SIZE,@object # @L2_CACHE_SIZE
.data
.globl L2_CACHE_SIZE
.p2align 2, 0x0
L2_CACHE_SIZE:
.long 524288 # 0x80000
.size L2_CACHE_SIZE, 4
.type DATA_SIZE,@object # @DATA_SIZE
.bss
.globl DATA_SIZE
.p2align 2, 0x0
DATA_SIZE:
.long 0 # 0x0
.size DATA_SIZE, 4
.type _Z13cache_latencyPdPii,@object # @_Z13cache_latencyPdPii
.section .rodata,"a",@progbits
.globl _Z13cache_latencyPdPii
.p2align 3, 0x0
_Z13cache_latencyPdPii:
.quad _Z28__device_stub__cache_latencyPdPii
.size _Z13cache_latencyPdPii, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Enter iterations!"
.size .L.str, 18
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "Failed to alloc memory (error code %s)!\n"
.size .L.str.1, 41
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "Failed to copyback (error code %s)!\n"
.size .L.str.2, 37
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "Kernel launch error! (error code %s)!\n"
.size .L.str.3, 40
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "\nLatency\n"
.size .L.str.4, 10
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz ": "
.size .L.str.5, 3
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z13cache_latencyPdPii"
.size .L__unnamed_1, 23
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z28__device_stub__cache_latencyPdPii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z13cache_latencyPdPii
.addrsig_sym _ZSt4cerr
.addrsig_sym _ZSt4cout
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z13cache_latencyPdPii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ IMAD.MOV.U32 R0, RZ, RZ, c[0x0][0x170] ; /* 0x00005c00ff007624 */
/* 0x000fca00078e00ff */
/*0020*/ ISETP.GE.AND P0, PT, R0, 0x1, PT ; /* 0x000000010000780c */
/* 0x000fda0003f06270 */
/*0030*/ @!P0 BRA 0x3e0 ; /* 0x000003a000008947 */
/* 0x000fea0003800000 */
/*0040*/ IADD3 R2, R0.reuse, -0x1, RZ ; /* 0xffffffff00027810 */
/* 0x040fe40007ffe0ff */
/*0050*/ LOP3.LUT R0, R0, 0x3, RZ, 0xc0, !PT ; /* 0x0000000300007812 */
/* 0x000fe400078ec0ff */
/*0060*/ ISETP.GE.U32.AND P0, PT, R2, 0x3, PT ; /* 0x000000030200780c */
/* 0x000fda0003f06070 */
/*0070*/ @!P0 BRA 0x300 ; /* 0x0000028000008947 */
/* 0x000fea0003800000 */
/*0080*/ IADD3 R2, -R0, c[0x0][0x170], RZ ; /* 0x00005c0000027a10 */
/* 0x000fe40007ffe1ff */
/*0090*/ CS2R R6, SR_CLOCKLO ; /* 0x0000000000067805 */
/* 0x000fca0000015000 */
/*00a0*/ CS2R R8, SR_CLOCKLO ; /* 0x0000000000087805 */
/* 0x000fca0000015000 */
/*00b0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fe20000010000 */
/*00c0*/ IMAD.IADD R7, R8, 0x1, -R6 ; /* 0x0000000108077824 */
/* 0x000fca00078e0a06 */
/*00d0*/ LDS.64 R4, [RZ] ; /* 0x00000000ff047984 */
/* 0x000e240000000a00 */
/*00e0*/ IADD3 R4, P0, R4, R7, RZ ; /* 0x0000000704047210 */
/* 0x001fca0007f1e0ff */
/*00f0*/ IMAD.X R5, RZ, RZ, R5, P0 ; /* 0x000000ffff057224 */
/* 0x000fca00000e0605 */
/*0100*/ STS.64 [RZ], R4 ; /* 0x00000004ff007388 */
/* 0x0001e80000000a00 */
/*0110*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0120*/ CS2R R6, SR_CLOCKLO ; /* 0x0000000000067805 */
/* 0x000fe40000015000 */
/*0130*/ CS2R R8, SR_CLOCKLO ; /* 0x0000000000087805 */
/* 0x000fca0000015000 */
/*0140*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fe20000010000 */
/*0150*/ IMAD.IADD R7, R8, 0x1, -R6 ; /* 0x0000000108077824 */
/* 0x000fca00078e0a06 */
/*0160*/ LDS.64 R4, [RZ] ; /* 0x00000000ff047984 */
/* 0x001e240000000a00 */
/*0170*/ IADD3 R4, P0, R4, R7, RZ ; /* 0x0000000704047210 */
/* 0x001fca0007f1e0ff */
/*0180*/ IMAD.X R5, RZ, RZ, R5, P0 ; /* 0x000000ffff057224 */
/* 0x000fca00000e0605 */
/*0190*/ STS.64 [RZ], R4 ; /* 0x00000004ff007388 */
/* 0x0001e80000000a00 */
/*01a0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*01b0*/ CS2R R6, SR_CLOCKLO ; /* 0x0000000000067805 */
/* 0x000fe40000015000 */
/*01c0*/ CS2R R8, SR_CLOCKLO ; /* 0x0000000000087805 */
/* 0x000fca0000015000 */
/*01d0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fe20000010000 */
/*01e0*/ IMAD.IADD R7, R8, 0x1, -R6 ; /* 0x0000000108077824 */
/* 0x000fca00078e0a06 */
/*01f0*/ LDS.64 R4, [RZ] ; /* 0x00000000ff047984 */
/* 0x001e240000000a00 */
/*0200*/ IADD3 R4, P0, R4, R7, RZ ; /* 0x0000000704047210 */
/* 0x001fca0007f1e0ff */
/*0210*/ IMAD.X R5, RZ, RZ, R5, P0 ; /* 0x000000ffff057224 */
/* 0x000fca00000e0605 */
/*0220*/ STS.64 [RZ], R4 ; /* 0x00000004ff007388 */
/* 0x0001e80000000a00 */
/*0230*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0240*/ CS2R R6, SR_CLOCKLO ; /* 0x0000000000067805 */
/* 0x000fe40000015000 */
/*0250*/ CS2R R8, SR_CLOCKLO ; /* 0x0000000000087805 */
/* 0x000fca0000015000 */
/*0260*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fe20000010000 */
/*0270*/ IMAD.IADD R7, R8, 0x1, -R6 ; /* 0x0000000108077824 */
/* 0x000fe200078e0a06 */
/*0280*/ IADD3 R2, R2, -0x4, RZ ; /* 0xfffffffc02027810 */
/* 0x000fc80007ffe0ff */
/*0290*/ LDS.64 R4, [RZ] ; /* 0x00000000ff047984 */
/* 0x001e240000000a00 */
/*02a0*/ IADD3 R4, P0, R4, R7, RZ ; /* 0x0000000704047210 */
/* 0x001fca0007f1e0ff */
/*02b0*/ IMAD.X R5, RZ, RZ, R5, P0 ; /* 0x000000ffff057224 */
/* 0x000fe200000e0605 */
/*02c0*/ ISETP.NE.AND P0, PT, R2, RZ, PT ; /* 0x000000ff0200720c */
/* 0x000fc80003f05270 */
/*02d0*/ STS.64 [RZ], R4 ; /* 0x00000004ff007388 */
/* 0x0001e80000000a00 */
/*02e0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*02f0*/ @P0 BRA 0x90 ; /* 0xfffffd9000000947 */
/* 0x001fea000383ffff */
/*0300*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */
/* 0x000fda0003f05270 */
/*0310*/ @!P0 BRA 0x3e0 ; /* 0x000000c000008947 */
/* 0x000fea0003800000 */
/*0320*/ CS2R R4, SR_CLOCKLO ; /* 0x0000000000047805 */
/* 0x000fe40000015000 */
/*0330*/ CS2R R6, SR_CLOCKLO ; /* 0x0000000000067805 */
/* 0x000fca0000015000 */
/*0340*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fe20000010000 */
/*0350*/ IMAD.IADD R5, R6, 0x1, -R4 ; /* 0x0000000106057824 */
/* 0x000fe200078e0a04 */
/*0360*/ IADD3 R0, R0, -0x1, RZ ; /* 0xffffffff00007810 */
/* 0x000fc80007ffe0ff */
/*0370*/ LDS.64 R2, [RZ] ; /* 0x00000000ff027984 */
/* 0x000e240000000a00 */
/*0380*/ IADD3 R2, P0, R2, R5, RZ ; /* 0x0000000502027210 */
/* 0x001fca0007f1e0ff */
/*0390*/ IMAD.X R3, RZ, RZ, R3, P0 ; /* 0x000000ffff037224 */
/* 0x000fe200000e0603 */
/*03a0*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */
/* 0x000fc80003f05270 */
/*03b0*/ STS.64 [RZ], R2 ; /* 0x00000002ff007388 */
/* 0x0001e80000000a00 */
/*03c0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*03d0*/ @P0 BRA 0x320 ; /* 0xffffff4000000947 */
/* 0x001fea000383ffff */
/*03e0*/ I2F.F64 R4, c[0x0][0x170] ; /* 0x00005c0000047b12 */
/* 0x000e220000201c00 */
/*03f0*/ LDS.64 R6, [RZ] ; /* 0x00000000ff067984 */
/* 0x000e620000000a00 */
/*0400*/ IMAD.MOV.U32 R2, RZ, RZ, 0x1 ; /* 0x00000001ff027424 */
/* 0x000fe200078e00ff */
/*0410*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fca0000000a00 */
/*0420*/ MUFU.RCP64H R3, R5 ; /* 0x0000000500037308 */
/* 0x001e240000001800 */
/*0430*/ DFMA R8, -R4, R2, 1 ; /* 0x3ff000000408742b */
/* 0x001e0c0000000102 */
/*0440*/ DFMA R8, R8, R8, R8 ; /* 0x000000080808722b */
/* 0x001e220000000008 */
/*0450*/ I2F.F64.S64 R6, R6 ; /* 0x0000000600067312 */
/* 0x002e6a0000301c00 */
/*0460*/ DFMA R8, R2, R8, R2 ; /* 0x000000080208722b */
/* 0x001e0c0000000002 */
/*0470*/ DFMA R2, -R4, R8, 1 ; /* 0x3ff000000402742b */
/* 0x001e0c0000000108 */
/*0480*/ DFMA R2, R8, R2, R8 ; /* 0x000000020802722b */
/* 0x001e220000000008 */
/*0490*/ FSETP.GEU.AND P1, PT, |R7|, 6.5827683646048100446e-37, PT ; /* 0x036000000700780b */
/* 0x002fca0003f2e200 */
/*04a0*/ DMUL R8, R6, R2 ; /* 0x0000000206087228 */
/* 0x001e0c0000000000 */
/*04b0*/ DFMA R10, -R4, R8, R6 ; /* 0x00000008040a722b */
/* 0x001e0c0000000106 */
/*04c0*/ DFMA R2, R2, R10, R8 ; /* 0x0000000a0202722b */
/* 0x001e140000000008 */
/*04d0*/ FFMA R0, RZ, R5, R3 ; /* 0x00000005ff007223 */
/* 0x001fca0000000003 */
/*04e0*/ FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ; /* 0x001000000000780b */
/* 0x000fda0003f04200 */
/*04f0*/ @P0 BRA P1, 0x540 ; /* 0x0000004000000947 */
/* 0x000fea0000800000 */
/*0500*/ MOV R0, 0x520 ; /* 0x0000052000007802 */
/* 0x000fe40000000f00 */
/*0510*/ CALL.REL.NOINC 0x580 ; /* 0x0000006000007944 */
/* 0x000fea0003c00000 */
/*0520*/ IMAD.MOV.U32 R2, RZ, RZ, R12 ; /* 0x000000ffff027224 */
/* 0x000fe400078e000c */
/*0530*/ IMAD.MOV.U32 R3, RZ, RZ, R13 ; /* 0x000000ffff037224 */
/* 0x000fe400078e000d */
/*0540*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x0][0x160] ; /* 0x00005800ff047624 */
/* 0x000fe400078e00ff */
/*0550*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x0][0x164] ; /* 0x00005900ff057624 */
/* 0x000fca00078e00ff */
/*0560*/ STG.E.64 [R4.64], R2 ; /* 0x0000000204007986 */
/* 0x000fe2000c101b04 */
/*0570*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0580*/ FSETP.GEU.AND P0, PT, |R5|.reuse, 1.469367938527859385e-39, PT ; /* 0x001000000500780b */
/* 0x040fe20003f0e200 */
/*0590*/ IMAD.MOV.U32 R8, RZ, RZ, 0x1 ; /* 0x00000001ff087424 */
/* 0x000fe200078e00ff */
/*05a0*/ LOP3.LUT R2, R5.reuse, 0x800fffff, RZ, 0xc0, !PT ; /* 0x800fffff05027812 */
/* 0x040fe200078ec0ff */
/*05b0*/ IMAD.MOV.U32 R13, RZ, RZ, 0x1ca00000 ; /* 0x1ca00000ff0d7424 */
/* 0x000fe200078e00ff */
/*05c0*/ LOP3.LUT R14, R5, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff00000050e7812 */
/* 0x000fe400078ec0ff */
/*05d0*/ LOP3.LUT R3, R2, 0x3ff00000, RZ, 0xfc, !PT ; /* 0x3ff0000002037812 */
/* 0x000fe200078efcff */
/*05e0*/ IMAD.MOV.U32 R2, RZ, RZ, R4 ; /* 0x000000ffff027224 */
/* 0x000fe200078e0004 */
/*05f0*/ LOP3.LUT R12, R7, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff00000070c7812 */
/* 0x000fc800078ec0ff */
/*0600*/ ISETP.GE.U32.AND P1, PT, R12, R14, PT ; /* 0x0000000e0c00720c */
/* 0x000fe20003f26070 */
/*0610*/ @!P0 DMUL R2, R4, 8.98846567431157953865e+307 ; /* 0x7fe0000004028828 */
/* 0x000e060000000000 */
/*0620*/ SEL R15, R13, 0x63400000, !P1 ; /* 0x634000000d0f7807 */
/* 0x000fe40004800000 */
/*0630*/ FSETP.GEU.AND P1, PT, |R7|, 1.469367938527859385e-39, PT ; /* 0x001000000700780b */
/* 0x000fe20003f2e200 */
/*0640*/ MUFU.RCP64H R9, R3 ; /* 0x0000000300097308 */
/* 0x001e280000001800 */
/*0650*/ @!P0 LOP3.LUT R14, R3, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff00000030e8812 */
/* 0x000fe200078ec0ff */
/*0660*/ DFMA R10, R8, -R2, 1 ; /* 0x3ff00000080a742b */
/* 0x001e0c0000000802 */
/*0670*/ DFMA R10, R10, R10, R10 ; /* 0x0000000a0a0a722b */
/* 0x001e0c000000000a */
/*0680*/ DFMA R10, R8, R10, R8 ; /* 0x0000000a080a722b */
/* 0x001e0c0000000008 */
/*0690*/ DFMA R8, R10, -R2, 1 ; /* 0x3ff000000a08742b */
/* 0x001e0c0000000802 */
/*06a0*/ DFMA R10, R10, R8, R10 ; /* 0x000000080a0a722b */
/* 0x001064000000000a */
/*06b0*/ LOP3.LUT R9, R15, 0x800fffff, R7, 0xf8, !PT ; /* 0x800fffff0f097812 */
/* 0x001fe200078ef807 */
/*06c0*/ IMAD.MOV.U32 R15, RZ, RZ, R12 ; /* 0x000000ffff0f7224 */
/* 0x000fe400078e000c */
/*06d0*/ IMAD.MOV.U32 R8, RZ, RZ, R6 ; /* 0x000000ffff087224 */
/* 0x000fe200078e0006 */
/*06e0*/ @P1 BRA 0x770 ; /* 0x0000008000001947 */
/* 0x000fea0003800000 */
/*06f0*/ LOP3.LUT R15, R5, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff00000050f7812 */
/* 0x002fe200078ec0ff */
/*0700*/ IMAD.MOV.U32 R16, RZ, RZ, RZ ; /* 0x000000ffff107224 */
/* 0x000fc600078e00ff */
/*0710*/ ISETP.GE.U32.AND P0, PT, R12, R15, PT ; /* 0x0000000f0c00720c */
/* 0x000fc80003f06070 */
/*0720*/ SEL R15, R13, 0x63400000, !P0 ; /* 0x634000000d0f7807 */
/* 0x000fc80004000000 */
/*0730*/ LOP3.LUT R15, R15, 0x80000000, R7, 0xf8, !PT ; /* 0x800000000f0f7812 */
/* 0x000fc800078ef807 */
/*0740*/ LOP3.LUT R17, R15, 0x100000, RZ, 0xfc, !PT ; /* 0x001000000f117812 */
/* 0x000fcc00078efcff */
/*0750*/ DFMA R8, R8, 2, -R16 ; /* 0x400000000808782b */
/* 0x000e140000000810 */
/*0760*/ LOP3.LUT R15, R9, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff00000090f7812 */
/* 0x001fc800078ec0ff */
/*0770*/ IADD3 R18, R15, -0x1, RZ ; /* 0xffffffff0f127810 */
/* 0x002fe20007ffe0ff */
/*0780*/ DMUL R16, R10, R8 ; /* 0x000000080a107228 */
/* 0x000e220000000000 */
/*0790*/ IADD3 R20, R14, -0x1, RZ ; /* 0xffffffff0e147810 */
/* 0x000fe40007ffe0ff */
/*07a0*/ ISETP.GT.U32.AND P0, PT, R18, 0x7feffffe, PT ; /* 0x7feffffe1200780c */
/* 0x000fc60003f04070 */
/*07b0*/ DFMA R18, R16, -R2, R8 ; /* 0x800000021012722b */
/* 0x001e220000000008 */
/*07c0*/ ISETP.GT.U32.OR P0, PT, R20, 0x7feffffe, P0 ; /* 0x7feffffe1400780c */
/* 0x000fca0000704470 */
/*07d0*/ DFMA R10, R10, R18, R16 ; /* 0x000000120a0a722b */
/* 0x0010500000000010 */
/*07e0*/ @P0 BRA 0x9b0 ; /* 0x000001c000000947 */
/* 0x000fea0003800000 */
/*07f0*/ LOP3.LUT R7, R5, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff0000005077812 */
/* 0x003fc800078ec0ff */
/*0800*/ ISETP.GE.U32.AND P0, PT, R12.reuse, R7, PT ; /* 0x000000070c00720c */
/* 0x040fe20003f06070 */
/*0810*/ IMAD.IADD R6, R12, 0x1, -R7 ; /* 0x000000010c067824 */
/* 0x000fc600078e0a07 */
/*0820*/ SEL R13, R13, 0x63400000, !P0 ; /* 0x634000000d0d7807 */
/* 0x000fe40004000000 */
/*0830*/ IMNMX R6, R6, -0x46a00000, !PT ; /* 0xb960000006067817 */
/* 0x000fc80007800200 */
/*0840*/ IMNMX R6, R6, 0x46a00000, PT ; /* 0x46a0000006067817 */
/* 0x000fca0003800200 */
/*0850*/ IMAD.IADD R14, R6, 0x1, -R13 ; /* 0x00000001060e7824 */
/* 0x000fe400078e0a0d */
/*0860*/ IMAD.MOV.U32 R6, RZ, RZ, RZ ; /* 0x000000ffff067224 */
/* 0x000fc600078e00ff */
/*0870*/ IADD3 R7, R14, 0x7fe00000, RZ ; /* 0x7fe000000e077810 */
/* 0x000fcc0007ffe0ff */
/*0880*/ DMUL R12, R10, R6 ; /* 0x000000060a0c7228 */
/* 0x000e140000000000 */
/*0890*/ FSETP.GTU.AND P0, PT, |R13|, 1.469367938527859385e-39, PT ; /* 0x001000000d00780b */
/* 0x001fda0003f0c200 */
/*08a0*/ @P0 BRA 0xb00 ; /* 0x0000025000000947 */
/* 0x000fea0003800000 */
/*08b0*/ DFMA R2, R10, -R2, R8 ; /* 0x800000020a02722b */
/* 0x000e220000000008 */
/*08c0*/ IMAD.MOV.U32 R6, RZ, RZ, RZ ; /* 0x000000ffff067224 */
/* 0x000fd200078e00ff */
/*08d0*/ FSETP.NEU.AND P0, PT, R3.reuse, RZ, PT ; /* 0x000000ff0300720b */
/* 0x041fe40003f0d000 */
/*08e0*/ LOP3.LUT R5, R3, 0x80000000, R5, 0x48, !PT ; /* 0x8000000003057812 */
/* 0x000fc800078e4805 */
/*08f0*/ LOP3.LUT R7, R5, R7, RZ, 0xfc, !PT ; /* 0x0000000705077212 */
/* 0x000fce00078efcff */
/*0900*/ @!P0 BRA 0xb00 ; /* 0x000001f000008947 */
/* 0x000fea0003800000 */
/*0910*/ IMAD.MOV R3, RZ, RZ, -R14 ; /* 0x000000ffff037224 */
/* 0x000fe200078e0a0e */
/*0920*/ DMUL.RP R6, R10, R6 ; /* 0x000000060a067228 */
/* 0x000e220000008000 */
/*0930*/ IMAD.MOV.U32 R2, RZ, RZ, RZ ; /* 0x000000ffff027224 */
/* 0x000fcc00078e00ff */
/*0940*/ DFMA R2, R12, -R2, R10 ; /* 0x800000020c02722b */
/* 0x000e46000000000a */
/*0950*/ LOP3.LUT R5, R7, R5, RZ, 0x3c, !PT ; /* 0x0000000507057212 */
/* 0x001fc600078e3cff */
/*0960*/ IADD3 R2, -R14, -0x43300000, RZ ; /* 0xbcd000000e027810 */
/* 0x002fc80007ffe1ff */
/*0970*/ FSETP.NEU.AND P0, PT, |R3|, R2, PT ; /* 0x000000020300720b */
/* 0x000fc80003f0d200 */
/*0980*/ FSEL R12, R6, R12, !P0 ; /* 0x0000000c060c7208 */
/* 0x000fe40004000000 */
/*0990*/ FSEL R13, R5, R13, !P0 ; /* 0x0000000d050d7208 */
/* 0x000fe20004000000 */
/*09a0*/ BRA 0xb00 ; /* 0x0000015000007947 */
/* 0x000fea0003800000 */
/*09b0*/ DSETP.NAN.AND P0, PT, R6, R6, PT ; /* 0x000000060600722a */
/* 0x003e1c0003f08000 */
/*09c0*/ @P0 BRA 0xae0 ; /* 0x0000011000000947 */
/* 0x001fea0003800000 */
/*09d0*/ DSETP.NAN.AND P0, PT, R4, R4, PT ; /* 0x000000040400722a */
/* 0x000e1c0003f08000 */
/*09e0*/ @P0 BRA 0xab0 ; /* 0x000000c000000947 */
/* 0x001fea0003800000 */
/*09f0*/ ISETP.NE.AND P0, PT, R15, R14, PT ; /* 0x0000000e0f00720c */
/* 0x000fe20003f05270 */
/*0a00*/ IMAD.MOV.U32 R12, RZ, RZ, 0x0 ; /* 0x00000000ff0c7424 */
/* 0x000fe400078e00ff */
/*0a10*/ IMAD.MOV.U32 R13, RZ, RZ, -0x80000 ; /* 0xfff80000ff0d7424 */
/* 0x000fd400078e00ff */
/*0a20*/ @!P0 BRA 0xb00 ; /* 0x000000d000008947 */
/* 0x000fea0003800000 */
/*0a30*/ ISETP.NE.AND P0, PT, R15, 0x7ff00000, PT ; /* 0x7ff000000f00780c */
/* 0x000fe40003f05270 */
/*0a40*/ LOP3.LUT R13, R7, 0x80000000, R5, 0x48, !PT ; /* 0x80000000070d7812 */
/* 0x000fe400078e4805 */
/*0a50*/ ISETP.EQ.OR P0, PT, R14, RZ, !P0 ; /* 0x000000ff0e00720c */
/* 0x000fda0004702670 */
/*0a60*/ @P0 LOP3.LUT R2, R13, 0x7ff00000, RZ, 0xfc, !PT ; /* 0x7ff000000d020812 */
/* 0x000fe200078efcff */
/*0a70*/ @!P0 IMAD.MOV.U32 R12, RZ, RZ, RZ ; /* 0x000000ffff0c8224 */
/* 0x000fe400078e00ff */
/*0a80*/ @P0 IMAD.MOV.U32 R12, RZ, RZ, RZ ; /* 0x000000ffff0c0224 */
/* 0x000fe400078e00ff */
/*0a90*/ @P0 IMAD.MOV.U32 R13, RZ, RZ, R2 ; /* 0x000000ffff0d0224 */
/* 0x000fe200078e0002 */
/*0aa0*/ BRA 0xb00 ; /* 0x0000005000007947 */
/* 0x000fea0003800000 */
/*0ab0*/ LOP3.LUT R13, R5, 0x80000, RZ, 0xfc, !PT ; /* 0x00080000050d7812 */
/* 0x000fe200078efcff */
/*0ac0*/ IMAD.MOV.U32 R12, RZ, RZ, R4 ; /* 0x000000ffff0c7224 */
/* 0x000fe200078e0004 */
/*0ad0*/ BRA 0xb00 ; /* 0x0000002000007947 */
/* 0x000fea0003800000 */
/*0ae0*/ LOP3.LUT R13, R7, 0x80000, RZ, 0xfc, !PT ; /* 0x00080000070d7812 */
/* 0x000fe200078efcff */
/*0af0*/ IMAD.MOV.U32 R12, RZ, RZ, R6 ; /* 0x000000ffff0c7224 */
/* 0x000fe400078e0006 */
/*0b00*/ IMAD.MOV.U32 R2, RZ, RZ, R0 ; /* 0x000000ffff027224 */
/* 0x000fe400078e0000 */
/*0b10*/ IMAD.MOV.U32 R3, RZ, RZ, 0x0 ; /* 0x00000000ff037424 */
/* 0x000fc800078e00ff */
/*0b20*/ RET.REL.NODEC R2 0x0 ; /* 0xfffff4d002007950 */
/* 0x000fea0003c3ffff */
/*0b30*/ BRA 0xb30; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0b40*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0b50*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0b60*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0b70*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0b80*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0b90*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ba0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0bb0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0bc0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0bd0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0be0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0bf0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z13cache_latencyPdPii
.globl _Z13cache_latencyPdPii
.p2align 8
.type _Z13cache_latencyPdPii,@function
_Z13cache_latencyPdPii:
s_load_b32 s2, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s2, 1
s_cbranch_scc1 .LBB0_3
v_mov_b32_e32 v0, 0
s_mov_b32 s3, s2
.LBB0_2:
s_getreg_b32 s4, hwreg(HW_REG_SHADER_CYCLES, 0, 20)
s_getreg_b32 s5, hwreg(HW_REG_SHADER_CYCLES, 0, 20)
s_barrier
buffer_gl0_inv
ds_load_b64 v[1:2], v0
s_sub_i32 s4, s5, s4
s_add_i32 s3, s3, -1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s3, 0
s_waitcnt lgkmcnt(0)
v_add_co_u32 v1, vcc_lo, v1, s4
v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
ds_store_b64 v0, v[1:2]
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB0_2
.LBB0_3:
v_mov_b32_e32 v13, 0
v_cvt_f64_i32_e32 v[5:6], s2
s_load_b64 s[0:1], s[0:1], 0x0
ds_load_b64 v[0:1], v13
s_waitcnt lgkmcnt(0)
v_cvt_f64_i32_e32 v[1:2], v1
v_cvt_f64_u32_e32 v[3:4], v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ldexp_f64 v[0:1], v[1:2], 32
v_add_f64 v[0:1], v[0:1], v[3:4]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_scale_f64 v[2:3], null, v[5:6], v[5:6], v[0:1]
v_rcp_f64_e32 v[7:8], v[2:3]
s_waitcnt_depctr 0xfff
v_fma_f64 v[9:10], -v[2:3], v[7:8], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[7:8], v[7:8], v[9:10], v[7:8]
v_fma_f64 v[9:10], -v[2:3], v[7:8], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fma_f64 v[7:8], v[7:8], v[9:10], v[7:8]
v_div_scale_f64 v[9:10], vcc_lo, v[0:1], v[5:6], v[0:1]
v_mul_f64 v[11:12], v[9:10], v[7:8]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[2:3], -v[2:3], v[11:12], v[9:10]
v_div_fmas_f64 v[2:3], v[2:3], v[7:8], v[11:12]
s_delay_alu instid0(VALU_DEP_1)
v_div_fixup_f64 v[0:1], v[2:3], v[5:6], v[0:1]
global_store_b64 v13, v[0:1], s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z13cache_latencyPdPii
.amdhsa_group_segment_fixed_size 8
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 20
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 14
.amdhsa_next_free_sgpr 6
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z13cache_latencyPdPii, .Lfunc_end0-_Z13cache_latencyPdPii
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: by_value
.group_segment_fixed_size: 8
.kernarg_segment_align: 8
.kernarg_segment_size: 20
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z13cache_latencyPdPii
.private_segment_fixed_size: 0
.sgpr_count: 8
.sgpr_spill_count: 0
.symbol: _Z13cache_latencyPdPii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 14
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0008e879_00000000-6_mem_latency.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3672:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z36__device_stub__Z13cache_latencyPdPiiPdPii
.type _Z36__device_stub__Z13cache_latencyPdPiiPdPii, @function
_Z36__device_stub__Z13cache_latencyPdPiiPdPii:
.LFB3694:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movl %edx, 12(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z13cache_latencyPdPii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3694:
.size _Z36__device_stub__Z13cache_latencyPdPiiPdPii, .-_Z36__device_stub__Z13cache_latencyPdPiiPdPii
.globl _Z13cache_latencyPdPii
.type _Z13cache_latencyPdPii, @function
_Z13cache_latencyPdPii:
.LFB3695:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z36__device_stub__Z13cache_latencyPdPiiPdPii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3695:
.size _Z13cache_latencyPdPii, .-_Z13cache_latencyPdPii
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Enter iterations!"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC1:
.string "Failed to alloc memory (error code %s)!\n"
.align 8
.LC2:
.string "Failed to copyback (error code %s)!\n"
.align 8
.LC3:
.string "Kernel launch error! (error code %s)!\n"
.section .rodata.str1.1
.LC4:
.string "\nLatency\n"
.LC5:
.string ": "
.text
.globl main
.type main, @function
main:
.LFB3669:
.cfi_startproc
endbr64
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $56, %rsp
.cfi_def_cfa_offset 80
movq %fs:40, %rax
movq %rax, 40(%rsp)
xorl %eax, %eax
cmpl $1, %edi
jle .L25
movq 8(%rsi), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movl %eax, ITERATIONS(%rip)
imull L2_CACHE_SIZE(%rip), %eax
movl %eax, DATA_SIZE(%rip)
cltq
leaq 0(,%rax,4), %rdi
call malloc@PLT
movq %rax, %rbx
movl $12, %edi
call srand@PLT
movl DATA_SIZE(%rip), %edx
testl %edx, %edx
jle .L14
movslq %edx, %rdx
movl $0, %eax
.L15:
movl %eax, (%rbx,%rax,4)
addq $1, %rax
cmpq %rdx, %rax
jne .L15
.L14:
movl $8, %edi
call malloc@PLT
movq %rax, %rbp
movq %rsp, %rdi
movl $8, %esi
call cudaMalloc@PLT
testl %eax, %eax
jne .L26
movslq DATA_SIZE(%rip), %rsi
salq $2, %rsi
leaq 8(%rsp), %rdi
call cudaMalloc@PLT
testl %eax, %eax
jne .L27
movslq DATA_SIZE(%rip), %rdx
salq $2, %rdx
movl $1, %ecx
movq %rbx, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
testl %eax, %eax
jne .L28
movl $1, 16(%rsp)
movl $1, 20(%rsp)
movl $1, 28(%rsp)
movl $1, 32(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 16(%rsp), %rdx
movl $1, %ecx
movq 28(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L29
.L19:
call cudaDeviceSynchronize@PLT
call cudaGetLastError@PLT
testl %eax, %eax
jne .L30
movl $2, %ecx
movl $8, %edx
movq (%rsp), %rsi
movq %rbp, %rdi
call cudaMemcpy@PLT
testl %eax, %eax
jne .L31
leaq .LC4(%rip), %rsi
leaq _ZSt4cout(%rip), %rbx
movq %rbx, %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
leaq .LC5(%rip), %rsi
movq %rbx, %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movsd 0(%rbp), %xmm0
call _ZNSo9_M_insertIdEERSoT_@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
movq %rbx, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
movl $0, %eax
.L11:
movq 40(%rsp), %rdx
subq %fs:40, %rdx
jne .L32
addq $56, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.L25:
.cfi_restore_state
leaq .LC0(%rip), %rsi
leaq _ZSt4cerr(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movl $-1, %eax
jmp .L11
.L26:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
leaq .LC1(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $-1, %edi
call exit@PLT
.L27:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
leaq .LC1(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $-1, %edi
call exit@PLT
.L28:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
leaq .LC2(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $-1, %edi
call exit@PLT
.L29:
movl DATA_SIZE(%rip), %edx
movq 8(%rsp), %rsi
movq (%rsp), %rdi
call _Z36__device_stub__Z13cache_latencyPdPiiPdPii
jmp .L19
.L30:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
leaq .LC3(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $-1, %edi
call exit@PLT
.L31:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rcx
leaq .LC2(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $-1, %edi
call exit@PLT
.L32:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3669:
.size main, .-main
.section .rodata.str1.1
.LC6:
.string "_Z13cache_latencyPdPii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3697:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC6(%rip), %rdx
movq %rdx, %rcx
leaq _Z13cache_latencyPdPii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3697:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.globl DATA_SIZE
.bss
.align 4
.type DATA_SIZE, @object
.size DATA_SIZE, 4
DATA_SIZE:
.zero 4
.globl L2_CACHE_SIZE
.data
.align 4
.type L2_CACHE_SIZE, @object
.size L2_CACHE_SIZE, 4
L2_CACHE_SIZE:
.long 524288
.globl ITERATIONS
.bss
.align 4
.type ITERATIONS, @object
.size ITERATIONS, 4
ITERATIONS:
.zero 4
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "mem_latency.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z28__device_stub__cache_latencyPdPii # -- Begin function _Z28__device_stub__cache_latencyPdPii
.p2align 4, 0x90
.type _Z28__device_stub__cache_latencyPdPii,@function
_Z28__device_stub__cache_latencyPdPii: # @_Z28__device_stub__cache_latencyPdPii
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 12(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 12(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z13cache_latencyPdPii, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $120, %rsp
.cfi_adjust_cfa_offset -120
retq
.Lfunc_end0:
.size _Z28__device_stub__cache_latencyPdPii, .Lfunc_end0-_Z28__device_stub__cache_latencyPdPii
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %r14
.cfi_def_cfa_offset 16
pushq %rbx
.cfi_def_cfa_offset 24
subq $120, %rsp
.cfi_def_cfa_offset 144
.cfi_offset %rbx, -24
.cfi_offset %r14, -16
cmpl $1, %edi
jg .LBB1_2
# %bb.1:
movl $_ZSt4cerr, %edi
movl $.L.str, %esi
movl $17, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl $-1, %eax
jmp .LBB1_25
.LBB1_2:
movq 8(%rsi), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movl %eax, ITERATIONS(%rip)
movslq L2_CACHE_SIZE(%rip), %rcx
movslq %eax, %rdi
imulq %rcx, %rdi
movl %edi, DATA_SIZE(%rip)
shlq $2, %rdi
callq malloc
movq %rax, %r14
movl $12, %edi
callq srand
movl DATA_SIZE(%rip), %eax
testl %eax, %eax
jle .LBB1_5
# %bb.3: # %.lr.ph.preheader
xorl %ecx, %ecx
.p2align 4, 0x90
.LBB1_4: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movl %ecx, (%r14,%rcx,4)
incq %rcx
cmpq %rcx, %rax
jne .LBB1_4
.LBB1_5: # %._crit_edge
movl $8, %edi
callq malloc
movq %rax, %rbx
leaq 24(%rsp), %rdi
movl $8, %esi
callq hipMalloc
testl %eax, %eax
jne .LBB1_6
# %bb.8:
movslq DATA_SIZE(%rip), %rsi
shlq $2, %rsi
leaq 16(%rsp), %rdi
callq hipMalloc
testl %eax, %eax
jne .LBB1_6
# %bb.9:
movq 16(%rsp), %rdi
movslq DATA_SIZE(%rip), %rdx
shlq $2, %rdx
movq %r14, %rsi
movl $1, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB1_10
# %bb.11:
movabsq $4294967297, %rdi # imm = 0x100000001
movl $1, %esi
movq %rdi, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_13
# %bb.12:
movq 24(%rsp), %rax
movq 16(%rsp), %rcx
movl DATA_SIZE(%rip), %edx
movq %rax, 88(%rsp)
movq %rcx, 80(%rsp)
movl %edx, 12(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
leaq 64(%rsp), %rdi
leaq 48(%rsp), %rsi
leaq 40(%rsp), %rdx
leaq 32(%rsp), %rcx
callq __hipPopCallConfiguration
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
movq 48(%rsp), %rcx
movl 56(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z13cache_latencyPdPii, %edi
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
pushq 48(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_13:
callq hipDeviceSynchronize
callq hipGetLastError
testl %eax, %eax
jne .LBB1_14
# %bb.15:
movq 24(%rsp), %rsi
movl $8, %edx
movq %rbx, %rdi
movl $2, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB1_10
# %bb.16:
movl $_ZSt4cout, %edi
movl $.L.str.4, %esi
movl $9, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl $_ZSt4cout, %edi
movl $.L.str.5, %esi
movl $2, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movsd (%rbx), %xmm0 # xmm0 = mem[0],zero
movl $_ZSt4cout, %edi
callq _ZNSo9_M_insertIdEERSoT_
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %rbx
testq %rbx, %rbx
je .LBB1_26
# %bb.17: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
cmpb $0, 56(%rbx)
je .LBB1_19
# %bb.18:
movzbl 67(%rbx), %ecx
jmp .LBB1_20
.LBB1_19:
movq %rbx, %rdi
movq %rax, %r14
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r14, %rax
.LBB1_20: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
movq _ZSt4cout+240(%rax), %rbx
testq %rbx, %rbx
je .LBB1_26
# %bb.21: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i38
cmpb $0, 56(%rbx)
je .LBB1_23
# %bb.22:
movzbl 67(%rbx), %eax
jmp .LBB1_24
.LBB1_23:
movq %rbx, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
.LBB1_24: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit41
movsbl %al, %esi
movl $_ZSt4cout, %edi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
xorl %eax, %eax
.LBB1_25:
addq $120, %rsp
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %r14
.cfi_def_cfa_offset 8
retq
.LBB1_6:
.cfi_def_cfa_offset 144
movq stderr(%rip), %rbx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.1, %esi
jmp .LBB1_7
.LBB1_10:
movq stderr(%rip), %rbx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.2, %esi
jmp .LBB1_7
.LBB1_26:
callq _ZSt16__throw_bad_castv
.LBB1_14:
movq stderr(%rip), %rbx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.3, %esi
.LBB1_7:
movq %rbx, %rdi
movq %rax, %rdx
xorl %eax, %eax
callq fprintf
movl $-1, %edi
callq exit
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z13cache_latencyPdPii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type ITERATIONS,@object # @ITERATIONS
.bss
.globl ITERATIONS
.p2align 2, 0x0
ITERATIONS:
.long 0 # 0x0
.size ITERATIONS, 4
.type L2_CACHE_SIZE,@object # @L2_CACHE_SIZE
.data
.globl L2_CACHE_SIZE
.p2align 2, 0x0
L2_CACHE_SIZE:
.long 524288 # 0x80000
.size L2_CACHE_SIZE, 4
.type DATA_SIZE,@object # @DATA_SIZE
.bss
.globl DATA_SIZE
.p2align 2, 0x0
DATA_SIZE:
.long 0 # 0x0
.size DATA_SIZE, 4
.type _Z13cache_latencyPdPii,@object # @_Z13cache_latencyPdPii
.section .rodata,"a",@progbits
.globl _Z13cache_latencyPdPii
.p2align 3, 0x0
_Z13cache_latencyPdPii:
.quad _Z28__device_stub__cache_latencyPdPii
.size _Z13cache_latencyPdPii, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Enter iterations!"
.size .L.str, 18
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "Failed to alloc memory (error code %s)!\n"
.size .L.str.1, 41
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "Failed to copyback (error code %s)!\n"
.size .L.str.2, 37
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "Kernel launch error! (error code %s)!\n"
.size .L.str.3, 40
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "\nLatency\n"
.size .L.str.4, 10
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz ": "
.size .L.str.5, 3
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z13cache_latencyPdPii"
.size .L__unnamed_1, 23
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z28__device_stub__cache_latencyPdPii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z13cache_latencyPdPii
.addrsig_sym _ZSt4cerr
.addrsig_sym _ZSt4cout
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | __global__ void CuKnlSetField(
double xCells,
double yCells,
double* energy0,
double* energy1)
{
const int gid = threadIdx.x+blockIdx.x*blockDim.x;
energy1[gid] = energy0[gid];
} | code for sm_80
Function : _Z13CuKnlSetFieldddPdS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R4, SR_TID.X ; /* 0x0000000000047919 */
/* 0x000e220000002100 */
/*0020*/ HFMA2.MMA R5, -RZ, RZ, 0, 4.76837158203125e-07 ; /* 0x00000008ff057435 */
/* 0x000fe200000001ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0040*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x000e240000002500 */
/*0050*/ IMAD R4, R3, c[0x0][0x0], R4 ; /* 0x0000000003047a24 */
/* 0x001fca00078e0204 */
/*0060*/ IMAD.WIDE R2, R4, R5, c[0x0][0x170] ; /* 0x00005c0004027625 */
/* 0x000fcc00078e0205 */
/*0070*/ LDG.E.64 R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea2000c1e1b00 */
/*0080*/ IMAD.WIDE R4, R4, R5, c[0x0][0x178] ; /* 0x00005e0004047625 */
/* 0x000fca00078e0205 */
/*0090*/ STG.E.64 [R4.64], R2 ; /* 0x0000000204007986 */
/* 0x004fe2000c101b04 */
/*00a0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*00b0*/ BRA 0xb0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*00c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0100*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0110*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | __global__ void CuKnlSetField(
double xCells,
double yCells,
double* energy0,
double* energy1)
{
const int gid = threadIdx.x+blockIdx.x*blockDim.x;
energy1[gid] = energy0[gid];
} | .file "tmpxft_000d668e_00000000-6_set_field.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z37__device_stub__Z13CuKnlSetFieldddPdS_ddPdS_
.type _Z37__device_stub__Z13CuKnlSetFieldddPdS_ddPdS_, @function
_Z37__device_stub__Z13CuKnlSetFieldddPdS_ddPdS_:
.LFB2051:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movsd %xmm0, 24(%rsp)
movsd %xmm1, 16(%rsp)
movq %rdi, 8(%rsp)
movq %rsi, (%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movq %rsp, %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z13CuKnlSetFieldddPdS_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z37__device_stub__Z13CuKnlSetFieldddPdS_ddPdS_, .-_Z37__device_stub__Z13CuKnlSetFieldddPdS_ddPdS_
.globl _Z13CuKnlSetFieldddPdS_
.type _Z13CuKnlSetFieldddPdS_, @function
_Z13CuKnlSetFieldddPdS_:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z37__device_stub__Z13CuKnlSetFieldddPdS_ddPdS_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z13CuKnlSetFieldddPdS_, .-_Z13CuKnlSetFieldddPdS_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z13CuKnlSetFieldddPdS_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z13CuKnlSetFieldddPdS_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | __global__ void CuKnlSetField(
double xCells,
double yCells,
double* energy0,
double* energy1)
{
const int gid = threadIdx.x+blockIdx.x*blockDim.x;
energy1[gid] = energy0[gid];
} | #include <hip/hip_runtime.h>
__global__ void CuKnlSetField(
double xCells,
double yCells,
double* energy0,
double* energy1)
{
const int gid = threadIdx.x+blockIdx.x*blockDim.x;
energy1[gid] = energy0[gid];
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
__global__ void CuKnlSetField(
double xCells,
double yCells,
double* energy0,
double* energy1)
{
const int gid = threadIdx.x+blockIdx.x*blockDim.x;
energy1[gid] = energy0[gid];
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z13CuKnlSetFieldddPdS_
.globl _Z13CuKnlSetFieldddPdS_
.p2align 8
.type _Z13CuKnlSetFieldddPdS_,@function
_Z13CuKnlSetFieldddPdS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x2c
s_load_b128 s[0:3], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 3, v[1:2]
v_add_co_u32 v2, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_load_b64 v[2:3], v[2:3], off
s_waitcnt vmcnt(0)
global_store_b64 v[0:1], v[2:3], off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z13CuKnlSetFieldddPdS_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 4
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z13CuKnlSetFieldddPdS_, .Lfunc_end0-_Z13CuKnlSetFieldddPdS_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .offset: 0
.size: 8
.value_kind: by_value
- .offset: 8
.size: 8
.value_kind: by_value
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 24
.size: 8
.value_kind: global_buffer
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z13CuKnlSetFieldddPdS_
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z13CuKnlSetFieldddPdS_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 4
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
__global__ void CuKnlSetField(
double xCells,
double yCells,
double* energy0,
double* energy1)
{
const int gid = threadIdx.x+blockIdx.x*blockDim.x;
energy1[gid] = energy0[gid];
} | .text
.file "set_field.hip"
.globl _Z28__device_stub__CuKnlSetFieldddPdS_ # -- Begin function _Z28__device_stub__CuKnlSetFieldddPdS_
.p2align 4, 0x90
.type _Z28__device_stub__CuKnlSetFieldddPdS_,@function
_Z28__device_stub__CuKnlSetFieldddPdS_: # @_Z28__device_stub__CuKnlSetFieldddPdS_
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movsd %xmm0, 72(%rsp)
movsd %xmm1, 64(%rsp)
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rax
movq %rax, 104(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z13CuKnlSetFieldddPdS_, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z28__device_stub__CuKnlSetFieldddPdS_, .Lfunc_end0-_Z28__device_stub__CuKnlSetFieldddPdS_
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z13CuKnlSetFieldddPdS_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z13CuKnlSetFieldddPdS_,@object # @_Z13CuKnlSetFieldddPdS_
.section .rodata,"a",@progbits
.globl _Z13CuKnlSetFieldddPdS_
.p2align 3, 0x0
_Z13CuKnlSetFieldddPdS_:
.quad _Z28__device_stub__CuKnlSetFieldddPdS_
.size _Z13CuKnlSetFieldddPdS_, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z13CuKnlSetFieldddPdS_"
.size .L__unnamed_1, 24
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z28__device_stub__CuKnlSetFieldddPdS_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z13CuKnlSetFieldddPdS_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z13CuKnlSetFieldddPdS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R4, SR_TID.X ; /* 0x0000000000047919 */
/* 0x000e220000002100 */
/*0020*/ HFMA2.MMA R5, -RZ, RZ, 0, 4.76837158203125e-07 ; /* 0x00000008ff057435 */
/* 0x000fe200000001ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0040*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x000e240000002500 */
/*0050*/ IMAD R4, R3, c[0x0][0x0], R4 ; /* 0x0000000003047a24 */
/* 0x001fca00078e0204 */
/*0060*/ IMAD.WIDE R2, R4, R5, c[0x0][0x170] ; /* 0x00005c0004027625 */
/* 0x000fcc00078e0205 */
/*0070*/ LDG.E.64 R2, [R2.64] ; /* 0x0000000402027981 */
/* 0x000ea2000c1e1b00 */
/*0080*/ IMAD.WIDE R4, R4, R5, c[0x0][0x178] ; /* 0x00005e0004047625 */
/* 0x000fca00078e0205 */
/*0090*/ STG.E.64 [R4.64], R2 ; /* 0x0000000204007986 */
/* 0x004fe2000c101b04 */
/*00a0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*00b0*/ BRA 0xb0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*00c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0100*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0110*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z13CuKnlSetFieldddPdS_
.globl _Z13CuKnlSetFieldddPdS_
.p2align 8
.type _Z13CuKnlSetFieldddPdS_,@function
_Z13CuKnlSetFieldddPdS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x2c
s_load_b128 s[0:3], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 3, v[1:2]
v_add_co_u32 v2, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_load_b64 v[2:3], v[2:3], off
s_waitcnt vmcnt(0)
global_store_b64 v[0:1], v[2:3], off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z13CuKnlSetFieldddPdS_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 4
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z13CuKnlSetFieldddPdS_, .Lfunc_end0-_Z13CuKnlSetFieldddPdS_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .offset: 0
.size: 8
.value_kind: by_value
- .offset: 8
.size: 8
.value_kind: by_value
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 24
.size: 8
.value_kind: global_buffer
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z13CuKnlSetFieldddPdS_
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z13CuKnlSetFieldddPdS_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 4
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000d668e_00000000-6_set_field.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z37__device_stub__Z13CuKnlSetFieldddPdS_ddPdS_
.type _Z37__device_stub__Z13CuKnlSetFieldddPdS_ddPdS_, @function
_Z37__device_stub__Z13CuKnlSetFieldddPdS_ddPdS_:
.LFB2051:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movsd %xmm0, 24(%rsp)
movsd %xmm1, 16(%rsp)
movq %rdi, 8(%rsp)
movq %rsi, (%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movq %rsp, %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z13CuKnlSetFieldddPdS_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z37__device_stub__Z13CuKnlSetFieldddPdS_ddPdS_, .-_Z37__device_stub__Z13CuKnlSetFieldddPdS_ddPdS_
.globl _Z13CuKnlSetFieldddPdS_
.type _Z13CuKnlSetFieldddPdS_, @function
_Z13CuKnlSetFieldddPdS_:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z37__device_stub__Z13CuKnlSetFieldddPdS_ddPdS_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z13CuKnlSetFieldddPdS_, .-_Z13CuKnlSetFieldddPdS_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z13CuKnlSetFieldddPdS_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z13CuKnlSetFieldddPdS_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "set_field.hip"
.globl _Z28__device_stub__CuKnlSetFieldddPdS_ # -- Begin function _Z28__device_stub__CuKnlSetFieldddPdS_
.p2align 4, 0x90
.type _Z28__device_stub__CuKnlSetFieldddPdS_,@function
_Z28__device_stub__CuKnlSetFieldddPdS_: # @_Z28__device_stub__CuKnlSetFieldddPdS_
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movsd %xmm0, 72(%rsp)
movsd %xmm1, 64(%rsp)
movq %rdi, 56(%rsp)
movq %rsi, 48(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rax
movq %rax, 104(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z13CuKnlSetFieldddPdS_, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z28__device_stub__CuKnlSetFieldddPdS_, .Lfunc_end0-_Z28__device_stub__CuKnlSetFieldddPdS_
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z13CuKnlSetFieldddPdS_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z13CuKnlSetFieldddPdS_,@object # @_Z13CuKnlSetFieldddPdS_
.section .rodata,"a",@progbits
.globl _Z13CuKnlSetFieldddPdS_
.p2align 3, 0x0
_Z13CuKnlSetFieldddPdS_:
.quad _Z28__device_stub__CuKnlSetFieldddPdS_
.size _Z13CuKnlSetFieldddPdS_, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z13CuKnlSetFieldddPdS_"
.size .L__unnamed_1, 24
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z28__device_stub__CuKnlSetFieldddPdS_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z13CuKnlSetFieldddPdS_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <stdlib.h>
#include <math.h>
__global__ void sumaMatrices(int *a, int *b, int *c, int N)
{
int col = blockIdx.x * blockDim.x + threadIdx.x;
int fil = blockIdx.y * blockDim.y + threadIdx.y;
int indice = fil * N + col;
if(fil<N&&col<N)
{
c[indice]=a[indice]+b[indice];
}
}
int main (void)
{
int *dev_a, *dev_b, *dev_c,*a,*b,*c;
int T,div=2, iteraciones=10,ind=0;
int N,i,j;
float elapsedTime;
printf("Ingrese el tamano de las matrices\n");
scanf("%d",&N);
a=(int*)malloc(N*N*sizeof(int));
b=(int*)malloc(N*N*sizeof(int));
c=(int*)malloc(N*N*sizeof(int));
cudaMalloc((void**)&dev_a,N*N*sizeof(int));
cudaMalloc((void**)&dev_b,N*N*sizeof(int));
cudaMalloc((void**)&dev_c,N*N*sizeof(int));
cudaEvent_t start,stop;
cudaEventCreate(&start);
cudaEventCreate(&stop);
for(i=0;i<N;i++)
{
for(j=0;j<N;j++)
{
a[i*N+j]=i*N+j;
b[i*N+j]=i*N+j;
c[i*N+j]=0;
}
}
cudaMemcpy(dev_a,a,N*N*sizeof(int),cudaMemcpyHostToDevice);
cudaMemcpy(dev_b,b,N*N*sizeof(int),cudaMemcpyHostToDevice);
// cada bloque en dimensión x y y tendrá un tamaño de T Threads
while((float)N/(float)div>32)
{
div++;
}
float f_N=(float)N,f_div=(float)div;
T=(int)ceil(f_N/f_div);
dim3 ThreadsBloque(T,T);
// El grid tendrá B números de bloques en x y y
dim3 Bloques(div, div);
printf("Se va a realizar la suma con %d bloques y %d hilos\n",div,T);
cudaEventRecord(start,0);
while(ind<iteraciones)
{
sumaMatrices<<<Bloques, ThreadsBloque>>>(dev_a,dev_b,dev_c,N);
ind++;
}
cudaEventRecord(stop,0);
cudaEventSynchronize(stop);
cudaEventElapsedTime(&elapsedTime,start,stop);
printf("El tiempo tomado para %d iteraciones fue de %3.3f ms\n",iteraciones,elapsedTime/10);
cudaMemcpy(c,dev_c,N*N*sizeof(int),cudaMemcpyDeviceToHost);
printf("Por ejemplo: \t%d\t+\t%d\t=%d\n",a[(int)N/2],b[(int)N/2],c[(int)N/2]);
free(a);
free(b);
free(c);
cudaFree(dev_a);
cudaFree(dev_b);
cudaFree(dev_c);
} | code for sm_80
Function : _Z12sumaMatricesPiS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e280000002100 */
/*0030*/ S2R R2, SR_CTAID.Y ; /* 0x0000000000027919 */
/* 0x000e680000002600 */
/*0040*/ S2R R5, SR_TID.Y ; /* 0x0000000000057919 */
/* 0x000e620000002200 */
/*0050*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fca00078e0203 */
/*0060*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x178], PT ; /* 0x00005e0000007a0c */
/* 0x000fe20003f06270 */
/*0070*/ IMAD R3, R2, c[0x0][0x4], R5 ; /* 0x0000010002037a24 */
/* 0x002fca00078e0205 */
/*0080*/ ISETP.GE.OR P0, PT, R3, c[0x0][0x178], P0 ; /* 0x00005e0003007a0c */
/* 0x000fda0000706670 */
/*0090*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*00a0*/ HFMA2.MMA R7, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff077435 */
/* 0x000fe200000001ff */
/*00b0*/ IMAD R0, R3, c[0x0][0x178], R0 ; /* 0x00005e0003007a24 */
/* 0x000fe200078e0200 */
/*00c0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fd00000000a00 */
/*00d0*/ IMAD.WIDE R4, R0, R7, c[0x0][0x168] ; /* 0x00005a0000047625 */
/* 0x000fc800078e0207 */
/*00e0*/ IMAD.WIDE R2, R0.reuse, R7.reuse, c[0x0][0x160] ; /* 0x0000580000027625 */
/* 0x0c0fe400078e0207 */
/*00f0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ea8000c1e1900 */
/*0100*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */
/* 0x000ea2000c1e1900 */
/*0110*/ IMAD.WIDE R6, R0, R7, c[0x0][0x170] ; /* 0x00005c0000067625 */
/* 0x000fe200078e0207 */
/*0120*/ IADD3 R9, R4, R3, RZ ; /* 0x0000000304097210 */
/* 0x004fca0007ffe0ff */
/*0130*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */
/* 0x000fe2000c101904 */
/*0140*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0150*/ BRA 0x150; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0180*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0190*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <math.h>
__global__ void sumaMatrices(int *a, int *b, int *c, int N)
{
int col = blockIdx.x * blockDim.x + threadIdx.x;
int fil = blockIdx.y * blockDim.y + threadIdx.y;
int indice = fil * N + col;
if(fil<N&&col<N)
{
c[indice]=a[indice]+b[indice];
}
}
int main (void)
{
int *dev_a, *dev_b, *dev_c,*a,*b,*c;
int T,div=2, iteraciones=10,ind=0;
int N,i,j;
float elapsedTime;
printf("Ingrese el tamano de las matrices\n");
scanf("%d",&N);
a=(int*)malloc(N*N*sizeof(int));
b=(int*)malloc(N*N*sizeof(int));
c=(int*)malloc(N*N*sizeof(int));
cudaMalloc((void**)&dev_a,N*N*sizeof(int));
cudaMalloc((void**)&dev_b,N*N*sizeof(int));
cudaMalloc((void**)&dev_c,N*N*sizeof(int));
cudaEvent_t start,stop;
cudaEventCreate(&start);
cudaEventCreate(&stop);
for(i=0;i<N;i++)
{
for(j=0;j<N;j++)
{
a[i*N+j]=i*N+j;
b[i*N+j]=i*N+j;
c[i*N+j]=0;
}
}
cudaMemcpy(dev_a,a,N*N*sizeof(int),cudaMemcpyHostToDevice);
cudaMemcpy(dev_b,b,N*N*sizeof(int),cudaMemcpyHostToDevice);
// cada bloque en dimensión x y y tendrá un tamaño de T Threads
while((float)N/(float)div>32)
{
div++;
}
float f_N=(float)N,f_div=(float)div;
T=(int)ceil(f_N/f_div);
dim3 ThreadsBloque(T,T);
// El grid tendrá B números de bloques en x y y
dim3 Bloques(div, div);
printf("Se va a realizar la suma con %d bloques y %d hilos\n",div,T);
cudaEventRecord(start,0);
while(ind<iteraciones)
{
sumaMatrices<<<Bloques, ThreadsBloque>>>(dev_a,dev_b,dev_c,N);
ind++;
}
cudaEventRecord(stop,0);
cudaEventSynchronize(stop);
cudaEventElapsedTime(&elapsedTime,start,stop);
printf("El tiempo tomado para %d iteraciones fue de %3.3f ms\n",iteraciones,elapsedTime/10);
cudaMemcpy(c,dev_c,N*N*sizeof(int),cudaMemcpyDeviceToHost);
printf("Por ejemplo: \t%d\t+\t%d\t=%d\n",a[(int)N/2],b[(int)N/2],c[(int)N/2]);
free(a);
free(b);
free(c);
cudaFree(dev_a);
cudaFree(dev_b);
cudaFree(dev_c);
} | .file "tmpxft_000f45fd_00000000-6_Ejemplo4.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z37__device_stub__Z12sumaMatricesPiS_S_iPiS_S_i
.type _Z37__device_stub__Z12sumaMatricesPiS_S_iPiS_S_i, @function
_Z37__device_stub__Z12sumaMatricesPiS_S_iPiS_S_i:
.LFB2082:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z12sumaMatricesPiS_S_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z37__device_stub__Z12sumaMatricesPiS_S_iPiS_S_i, .-_Z37__device_stub__Z12sumaMatricesPiS_S_iPiS_S_i
.globl _Z12sumaMatricesPiS_S_i
.type _Z12sumaMatricesPiS_S_i, @function
_Z12sumaMatricesPiS_S_i:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z37__device_stub__Z12sumaMatricesPiS_S_iPiS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z12sumaMatricesPiS_S_i, .-_Z12sumaMatricesPiS_S_i
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "Ingrese el tamano de las matrices\n"
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "%d"
.section .rodata.str1.8
.align 8
.LC7:
.string "Se va a realizar la suma con %d bloques y %d hilos\n"
.align 8
.LC9:
.string "El tiempo tomado para %d iteraciones fue de %3.3f ms\n"
.section .rodata.str1.1
.LC10:
.string "Por ejemplo: \t%d\t+\t%d\t=%d\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $88, %rsp
.cfi_def_cfa_offset 128
movq %fs:40, %rax
movq %rax, 72(%rsp)
xorl %eax, %eax
leaq .LC0(%rip), %rsi
movl $2, %edi
call __printf_chk@PLT
movq %rsp, %rsi
leaq .LC1(%rip), %rdi
movl $0, %eax
call __isoc23_scanf@PLT
movl (%rsp), %eax
imull %eax, %eax
movslq %eax, %r13
salq $2, %r13
movq %r13, %rdi
call malloc@PLT
movq %rax, %r12
movq %r13, %rdi
call malloc@PLT
movq %rax, %rbp
movq %r13, %rdi
call malloc@PLT
movq %rax, %rbx
leaq 8(%rsp), %rdi
movq %r13, %rsi
call cudaMalloc@PLT
movl (%rsp), %eax
imull %eax, %eax
movslq %eax, %rsi
salq $2, %rsi
leaq 16(%rsp), %rdi
call cudaMalloc@PLT
movl (%rsp), %eax
imull %eax, %eax
movslq %eax, %rsi
salq $2, %rsi
leaq 24(%rsp), %rdi
call cudaMalloc@PLT
leaq 32(%rsp), %rdi
call cudaEventCreate@PLT
leaq 40(%rsp), %rdi
call cudaEventCreate@PLT
movl (%rsp), %esi
testl %esi, %esi
jle .L12
movl %esi, %ecx
movl $0, %edi
movl $0, %r8d
.L13:
movslq %edi, %rax
salq $2, %rax
movl %edi, %edx
.L14:
movl %edx, (%r12,%rax)
movl %edx, 0(%rbp,%rax)
movl $0, (%rbx,%rax)
addl $1, %edx
addq $4, %rax
cmpl %ecx, %edx
jne .L14
addl $1, %r8d
addl %esi, %edi
addl %esi, %ecx
cmpl %esi, %r8d
jne .L13
.L12:
imull %esi, %esi
movslq %esi, %rdx
salq $2, %rdx
movl $1, %ecx
movq %r12, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
movl (%rsp), %eax
imull %eax, %eax
movslq %eax, %rdx
salq $2, %rdx
movl $1, %ecx
movq %rbp, %rsi
movq 16(%rsp), %rdi
call cudaMemcpy@PLT
pxor %xmm2, %xmm2
cvtsi2ssl (%rsp), %xmm2
movaps %xmm2, %xmm0
mulss .LC2(%rip), %xmm0
movl $2, %edx
comiss .LC3(%rip), %xmm0
jbe .L28
.L17:
addl $1, %edx
pxor %xmm1, %xmm1
cvtsi2ssl %edx, %xmm1
movaps %xmm2, %xmm0
divss %xmm1, %xmm0
comiss .LC3(%rip), %xmm0
ja .L17
.L15:
movaps %xmm0, %xmm3
movss .LC11(%rip), %xmm2
movaps %xmm0, %xmm1
andps %xmm2, %xmm1
movss .LC4(%rip), %xmm4
ucomiss %xmm1, %xmm4
jbe .L18
cvttss2sil %xmm0, %eax
pxor %xmm1, %xmm1
cvtsi2ssl %eax, %xmm1
cmpnless %xmm1, %xmm3
movss .LC6(%rip), %xmm4
andps %xmm4, %xmm3
addss %xmm1, %xmm3
andnps %xmm0, %xmm2
orps %xmm2, %xmm3
.L18:
cvttss2sil %xmm3, %ecx
movl %ecx, 48(%rsp)
movl %ecx, 52(%rsp)
movl $1, 56(%rsp)
movl %edx, 60(%rsp)
movl %edx, 64(%rsp)
movl $1, 68(%rsp)
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $0, %esi
movq 32(%rsp), %rdi
call cudaEventRecord@PLT
movl $10, %r13d
jmp .L20
.L28:
movl $2, %edx
jmp .L15
.L19:
subl $1, %r13d
je .L30
.L20:
movl 56(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 48(%rsp), %rdx
movq 60(%rsp), %rdi
movl 68(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
jne .L19
movl (%rsp), %ecx
movq 24(%rsp), %rdx
movq 16(%rsp), %rsi
movq 8(%rsp), %rdi
call _Z37__device_stub__Z12sumaMatricesPiS_S_iPiS_S_i
jmp .L19
.L30:
movl $0, %esi
movq 40(%rsp), %rdi
call cudaEventRecord@PLT
movq 40(%rsp), %rdi
call cudaEventSynchronize@PLT
leaq 4(%rsp), %rdi
movq 40(%rsp), %rdx
movq 32(%rsp), %rsi
call cudaEventElapsedTime@PLT
movss 4(%rsp), %xmm0
divss .LC8(%rip), %xmm0
cvtss2sd %xmm0, %xmm0
movl $10, %edx
leaq .LC9(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movl (%rsp), %eax
imull %eax, %eax
movslq %eax, %rdx
salq $2, %rdx
movl $2, %ecx
movq 24(%rsp), %rsi
movq %rbx, %rdi
call cudaMemcpy@PLT
movl (%rsp), %edx
movl %edx, %eax
shrl $31, %eax
addl %edx, %eax
sarl %eax
cltq
movl 0(%rbp,%rax,4), %ecx
movl (%r12,%rax,4), %edx
movl (%rbx,%rax,4), %r8d
leaq .LC10(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %r12, %rdi
call free@PLT
movq %rbp, %rdi
call free@PLT
movq %rbx, %rdi
call free@PLT
movq 8(%rsp), %rdi
call cudaFree@PLT
movq 16(%rsp), %rdi
call cudaFree@PLT
movq 24(%rsp), %rdi
call cudaFree@PLT
movq 72(%rsp), %rax
subq %fs:40, %rax
jne .L31
movl $0, %eax
addq $88, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L31:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.1
.LC12:
.string "_Z12sumaMatricesPiS_S_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC12(%rip), %rdx
movq %rdx, %rcx
leaq _Z12sumaMatricesPiS_S_i(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC2:
.long 1056964608
.align 4
.LC3:
.long 1107296256
.align 4
.LC4:
.long 1258291200
.align 4
.LC6:
.long 1065353216
.align 4
.LC8:
.long 1092616192
.align 4
.LC11:
.long 2147483647
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#include <math.h>
__global__ void sumaMatrices(int *a, int *b, int *c, int N)
{
int col = blockIdx.x * blockDim.x + threadIdx.x;
int fil = blockIdx.y * blockDim.y + threadIdx.y;
int indice = fil * N + col;
if(fil<N&&col<N)
{
c[indice]=a[indice]+b[indice];
}
}
int main (void)
{
int *dev_a, *dev_b, *dev_c,*a,*b,*c;
int T,div=2, iteraciones=10,ind=0;
int N,i,j;
float elapsedTime;
printf("Ingrese el tamano de las matrices\n");
scanf("%d",&N);
a=(int*)malloc(N*N*sizeof(int));
b=(int*)malloc(N*N*sizeof(int));
c=(int*)malloc(N*N*sizeof(int));
cudaMalloc((void**)&dev_a,N*N*sizeof(int));
cudaMalloc((void**)&dev_b,N*N*sizeof(int));
cudaMalloc((void**)&dev_c,N*N*sizeof(int));
cudaEvent_t start,stop;
cudaEventCreate(&start);
cudaEventCreate(&stop);
for(i=0;i<N;i++)
{
for(j=0;j<N;j++)
{
a[i*N+j]=i*N+j;
b[i*N+j]=i*N+j;
c[i*N+j]=0;
}
}
cudaMemcpy(dev_a,a,N*N*sizeof(int),cudaMemcpyHostToDevice);
cudaMemcpy(dev_b,b,N*N*sizeof(int),cudaMemcpyHostToDevice);
// cada bloque en dimensión x y y tendrá un tamaño de T Threads
while((float)N/(float)div>32)
{
div++;
}
float f_N=(float)N,f_div=(float)div;
T=(int)ceil(f_N/f_div);
dim3 ThreadsBloque(T,T);
// El grid tendrá B números de bloques en x y y
dim3 Bloques(div, div);
printf("Se va a realizar la suma con %d bloques y %d hilos\n",div,T);
cudaEventRecord(start,0);
while(ind<iteraciones)
{
sumaMatrices<<<Bloques, ThreadsBloque>>>(dev_a,dev_b,dev_c,N);
ind++;
}
cudaEventRecord(stop,0);
cudaEventSynchronize(stop);
cudaEventElapsedTime(&elapsedTime,start,stop);
printf("El tiempo tomado para %d iteraciones fue de %3.3f ms\n",iteraciones,elapsedTime/10);
cudaMemcpy(c,dev_c,N*N*sizeof(int),cudaMemcpyDeviceToHost);
printf("Por ejemplo: \t%d\t+\t%d\t=%d\n",a[(int)N/2],b[(int)N/2],c[(int)N/2]);
free(a);
free(b);
free(c);
cudaFree(dev_a);
cudaFree(dev_b);
cudaFree(dev_c);
} | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
__global__ void sumaMatrices(int *a, int *b, int *c, int N)
{
int col = blockIdx.x * blockDim.x + threadIdx.x;
int fil = blockIdx.y * blockDim.y + threadIdx.y;
int indice = fil * N + col;
if(fil<N&&col<N)
{
c[indice]=a[indice]+b[indice];
}
}
int main (void)
{
int *dev_a, *dev_b, *dev_c,*a,*b,*c;
int T,div=2, iteraciones=10,ind=0;
int N,i,j;
float elapsedTime;
printf("Ingrese el tamano de las matrices\n");
scanf("%d",&N);
a=(int*)malloc(N*N*sizeof(int));
b=(int*)malloc(N*N*sizeof(int));
c=(int*)malloc(N*N*sizeof(int));
hipMalloc((void**)&dev_a,N*N*sizeof(int));
hipMalloc((void**)&dev_b,N*N*sizeof(int));
hipMalloc((void**)&dev_c,N*N*sizeof(int));
hipEvent_t start,stop;
hipEventCreate(&start);
hipEventCreate(&stop);
for(i=0;i<N;i++)
{
for(j=0;j<N;j++)
{
a[i*N+j]=i*N+j;
b[i*N+j]=i*N+j;
c[i*N+j]=0;
}
}
hipMemcpy(dev_a,a,N*N*sizeof(int),hipMemcpyHostToDevice);
hipMemcpy(dev_b,b,N*N*sizeof(int),hipMemcpyHostToDevice);
// cada bloque en dimensión x y y tendrá un tamaño de T Threads
while((float)N/(float)div>32)
{
div++;
}
float f_N=(float)N,f_div=(float)div;
T=(int)ceil(f_N/f_div);
dim3 ThreadsBloque(T,T);
// El grid tendrá B números de bloques en x y y
dim3 Bloques(div, div);
printf("Se va a realizar la suma con %d bloques y %d hilos\n",div,T);
hipEventRecord(start,0);
while(ind<iteraciones)
{
sumaMatrices<<<Bloques, ThreadsBloque>>>(dev_a,dev_b,dev_c,N);
ind++;
}
hipEventRecord(stop,0);
hipEventSynchronize(stop);
hipEventElapsedTime(&elapsedTime,start,stop);
printf("El tiempo tomado para %d iteraciones fue de %3.3f ms\n",iteraciones,elapsedTime/10);
hipMemcpy(c,dev_c,N*N*sizeof(int),hipMemcpyDeviceToHost);
printf("Por ejemplo: \t%d\t+\t%d\t=%d\n",a[(int)N/2],b[(int)N/2],c[(int)N/2]);
free(a);
free(b);
free(c);
hipFree(dev_a);
hipFree(dev_b);
hipFree(dev_c);
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
__global__ void sumaMatrices(int *a, int *b, int *c, int N)
{
int col = blockIdx.x * blockDim.x + threadIdx.x;
int fil = blockIdx.y * blockDim.y + threadIdx.y;
int indice = fil * N + col;
if(fil<N&&col<N)
{
c[indice]=a[indice]+b[indice];
}
}
int main (void)
{
int *dev_a, *dev_b, *dev_c,*a,*b,*c;
int T,div=2, iteraciones=10,ind=0;
int N,i,j;
float elapsedTime;
printf("Ingrese el tamano de las matrices\n");
scanf("%d",&N);
a=(int*)malloc(N*N*sizeof(int));
b=(int*)malloc(N*N*sizeof(int));
c=(int*)malloc(N*N*sizeof(int));
hipMalloc((void**)&dev_a,N*N*sizeof(int));
hipMalloc((void**)&dev_b,N*N*sizeof(int));
hipMalloc((void**)&dev_c,N*N*sizeof(int));
hipEvent_t start,stop;
hipEventCreate(&start);
hipEventCreate(&stop);
for(i=0;i<N;i++)
{
for(j=0;j<N;j++)
{
a[i*N+j]=i*N+j;
b[i*N+j]=i*N+j;
c[i*N+j]=0;
}
}
hipMemcpy(dev_a,a,N*N*sizeof(int),hipMemcpyHostToDevice);
hipMemcpy(dev_b,b,N*N*sizeof(int),hipMemcpyHostToDevice);
// cada bloque en dimensión x y y tendrá un tamaño de T Threads
while((float)N/(float)div>32)
{
div++;
}
float f_N=(float)N,f_div=(float)div;
T=(int)ceil(f_N/f_div);
dim3 ThreadsBloque(T,T);
// El grid tendrá B números de bloques en x y y
dim3 Bloques(div, div);
printf("Se va a realizar la suma con %d bloques y %d hilos\n",div,T);
hipEventRecord(start,0);
while(ind<iteraciones)
{
sumaMatrices<<<Bloques, ThreadsBloque>>>(dev_a,dev_b,dev_c,N);
ind++;
}
hipEventRecord(stop,0);
hipEventSynchronize(stop);
hipEventElapsedTime(&elapsedTime,start,stop);
printf("El tiempo tomado para %d iteraciones fue de %3.3f ms\n",iteraciones,elapsedTime/10);
hipMemcpy(c,dev_c,N*N*sizeof(int),hipMemcpyDeviceToHost);
printf("Por ejemplo: \t%d\t+\t%d\t=%d\n",a[(int)N/2],b[(int)N/2],c[(int)N/2]);
free(a);
free(b);
free(c);
hipFree(dev_a);
hipFree(dev_b);
hipFree(dev_c);
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12sumaMatricesPiS_S_i
.globl _Z12sumaMatricesPiS_S_i
.p2align 8
.type _Z12sumaMatricesPiS_S_i,@function
_Z12sumaMatricesPiS_S_i:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x2c
s_load_b32 s2, s[0:1], 0x18
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s3, 0xffff
s_lshr_b32 s3, s3, 16
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[0:1], null, s14, s4, v[2:3]
v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
s_mov_b32 s3, exec_lo
v_max_i32_e32 v2, v0, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s2, v2
s_cbranch_execz .LBB0_2
s_load_b128 s[4:7], s[0:1], 0x0
v_mad_u64_u32 v[2:3], null, v1, s2, v[0:1]
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[0:1], 2, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v2, v3, v2
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z12sumaMatricesPiS_S_i
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 6
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z12sumaMatricesPiS_S_i, .Lfunc_end0-_Z12sumaMatricesPiS_S_i
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z12sumaMatricesPiS_S_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z12sumaMatricesPiS_S_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 6
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
__global__ void sumaMatrices(int *a, int *b, int *c, int N)
{
int col = blockIdx.x * blockDim.x + threadIdx.x;
int fil = blockIdx.y * blockDim.y + threadIdx.y;
int indice = fil * N + col;
if(fil<N&&col<N)
{
c[indice]=a[indice]+b[indice];
}
}
int main (void)
{
int *dev_a, *dev_b, *dev_c,*a,*b,*c;
int T,div=2, iteraciones=10,ind=0;
int N,i,j;
float elapsedTime;
printf("Ingrese el tamano de las matrices\n");
scanf("%d",&N);
a=(int*)malloc(N*N*sizeof(int));
b=(int*)malloc(N*N*sizeof(int));
c=(int*)malloc(N*N*sizeof(int));
hipMalloc((void**)&dev_a,N*N*sizeof(int));
hipMalloc((void**)&dev_b,N*N*sizeof(int));
hipMalloc((void**)&dev_c,N*N*sizeof(int));
hipEvent_t start,stop;
hipEventCreate(&start);
hipEventCreate(&stop);
for(i=0;i<N;i++)
{
for(j=0;j<N;j++)
{
a[i*N+j]=i*N+j;
b[i*N+j]=i*N+j;
c[i*N+j]=0;
}
}
hipMemcpy(dev_a,a,N*N*sizeof(int),hipMemcpyHostToDevice);
hipMemcpy(dev_b,b,N*N*sizeof(int),hipMemcpyHostToDevice);
// cada bloque en dimensión x y y tendrá un tamaño de T Threads
while((float)N/(float)div>32)
{
div++;
}
float f_N=(float)N,f_div=(float)div;
T=(int)ceil(f_N/f_div);
dim3 ThreadsBloque(T,T);
// El grid tendrá B números de bloques en x y y
dim3 Bloques(div, div);
printf("Se va a realizar la suma con %d bloques y %d hilos\n",div,T);
hipEventRecord(start,0);
while(ind<iteraciones)
{
sumaMatrices<<<Bloques, ThreadsBloque>>>(dev_a,dev_b,dev_c,N);
ind++;
}
hipEventRecord(stop,0);
hipEventSynchronize(stop);
hipEventElapsedTime(&elapsedTime,start,stop);
printf("El tiempo tomado para %d iteraciones fue de %3.3f ms\n",iteraciones,elapsedTime/10);
hipMemcpy(c,dev_c,N*N*sizeof(int),hipMemcpyDeviceToHost);
printf("Por ejemplo: \t%d\t+\t%d\t=%d\n",a[(int)N/2],b[(int)N/2],c[(int)N/2]);
free(a);
free(b);
free(c);
hipFree(dev_a);
hipFree(dev_b);
hipFree(dev_c);
} | .text
.file "Ejemplo4.hip"
.globl _Z27__device_stub__sumaMatricesPiS_S_i # -- Begin function _Z27__device_stub__sumaMatricesPiS_S_i
.p2align 4, 0x90
.type _Z27__device_stub__sumaMatricesPiS_S_i,@function
_Z27__device_stub__sumaMatricesPiS_S_i: # @_Z27__device_stub__sumaMatricesPiS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z12sumaMatricesPiS_S_i, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z27__device_stub__sumaMatricesPiS_S_i, .Lfunc_end0-_Z27__device_stub__sumaMatricesPiS_S_i
.cfi_endproc
# -- End function
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function main
.LCPI1_0:
.long 0x42000000 # float 32
.LCPI1_1:
.long 0x41200000 # float 10
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $200, %rsp
.cfi_def_cfa_offset 256
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl $.Lstr, %edi
callq puts@PLT
leaq 12(%rsp), %rsi
movl $.L.str.1, %edi
xorl %eax, %eax
callq __isoc23_scanf
movl 12(%rsp), %ebx
imull %ebx, %ebx
shlq $2, %rbx
movq %rbx, %rdi
callq malloc
movq %rax, 24(%rsp) # 8-byte Spill
movq %rbx, %rdi
callq malloc
movq %rax, 16(%rsp) # 8-byte Spill
movq %rbx, %rdi
callq malloc
movq %rax, 72(%rsp) # 8-byte Spill
leaq 56(%rsp), %rdi
movq %rbx, %rsi
callq hipMalloc
movl 12(%rsp), %esi
imull %esi, %esi
shlq $2, %rsi
leaq 48(%rsp), %rdi
callq hipMalloc
movl 12(%rsp), %esi
imull %esi, %esi
shlq $2, %rsi
leaq 40(%rsp), %rdi
callq hipMalloc
leaq 80(%rsp), %rdi
callq hipEventCreate
leaq 32(%rsp), %rdi
callq hipEventCreate
movl 12(%rsp), %r13d
testl %r13d, %r13d
jle .LBB1_5
# %bb.1: # %.preheader.lr.ph
leaq (,%r13,4), %rbx
xorl %r14d, %r14d
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB1_2: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB1_3 Depth 2
movl %r14d, %r12d
shlq $2, %r12
movq 16(%rsp), %rax # 8-byte Reload
leaq (%rax,%r12), %rbp
addq 24(%rsp), %r12 # 8-byte Folded Reload
movl %r13d, %eax
imull %r15d, %eax
movq 72(%rsp), %rcx # 8-byte Reload
leaq (%rcx,%rax,4), %rdi
xorl %esi, %esi
movq %rbx, %rdx
callq memset@PLT
xorl %eax, %eax
.p2align 4, 0x90
.LBB1_3: # Parent Loop BB1_2 Depth=1
# => This Inner Loop Header: Depth=2
leal (%r14,%rax), %ecx
movl %ecx, (%r12,%rax,4)
movl %ecx, (%rbp,%rax,4)
incq %rax
cmpq %rax, %r13
jne .LBB1_3
# %bb.4: # %._crit_edge
# in Loop: Header=BB1_2 Depth=1
incq %r15
addq %r13, %r14
cmpq %r13, %r15
jne .LBB1_2
.LBB1_5: # %._crit_edge58
movabsq $4294967297, %r12 # imm = 0x100000001
movq 56(%rsp), %rdi
imull %r13d, %r13d
shlq $2, %r13
movq 24(%rsp), %rsi # 8-byte Reload
movq %r13, %rdx
movl $1, %ecx
callq hipMemcpy
movq 48(%rsp), %rdi
movl 12(%rsp), %edx
imull %edx, %edx
shlq $2, %rdx
movq 16(%rsp), %rsi # 8-byte Reload
movl $1, %ecx
callq hipMemcpy
cvtsi2ssl 12(%rsp), %xmm1
movss .LCPI1_0(%rip), %xmm2 # xmm2 = mem[0],zero,zero,zero
movq %r12, %r13
.p2align 4, 0x90
.LBB1_6: # =>This Inner Loop Header: Depth=1
leal 1(%r13), %eax
xorps %xmm3, %xmm3
cvtsi2ss %eax, %xmm3
movaps %xmm1, %xmm0
divss %xmm3, %xmm0
addq %r12, %r13
ucomiss %xmm2, %xmm0
ja .LBB1_6
# %bb.7:
callq ceilf@PLT
cvttss2si %xmm0, %edx
imulq %rdx, %r12
movl $.L.str.2, %edi
movl %r13d, %esi
# kill: def $edx killed $edx killed $rdx
xorl %eax, %eax
callq printf
movq 80(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movl $10, %ebx
leaq 96(%rsp), %r14
leaq 88(%rsp), %r15
leaq 160(%rsp), %rbp
jmp .LBB1_8
.p2align 4, 0x90
.LBB1_10: # in Loop: Header=BB1_8 Depth=1
decl %ebx
je .LBB1_11
.LBB1_8: # =>This Inner Loop Header: Depth=1
movq %r13, %rdi
movl $1, %esi
movq %r12, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_10
# %bb.9: # in Loop: Header=BB1_8 Depth=1
movq 56(%rsp), %rax
movq 48(%rsp), %rcx
movq 40(%rsp), %rdx
movl 12(%rsp), %esi
movq %rax, 152(%rsp)
movq %rcx, 144(%rsp)
movq %rdx, 136(%rsp)
movl %esi, 68(%rsp)
leaq 152(%rsp), %rax
movq %rax, 160(%rsp)
leaq 144(%rsp), %rax
movq %rax, 168(%rsp)
leaq 136(%rsp), %rax
movq %rax, 176(%rsp)
leaq 68(%rsp), %rax
movq %rax, 184(%rsp)
leaq 120(%rsp), %rdi
leaq 104(%rsp), %rsi
movq %r14, %rdx
movq %r15, %rcx
callq __hipPopCallConfiguration
movq 120(%rsp), %rsi
movl 128(%rsp), %edx
movq 104(%rsp), %rcx
movl 112(%rsp), %r8d
movl $_Z12sumaMatricesPiS_S_i, %edi
movq %rbp, %r9
pushq 88(%rsp)
.cfi_adjust_cfa_offset 8
pushq 104(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
jmp .LBB1_10
.LBB1_11:
movq 32(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq 32(%rsp), %rdi
callq hipEventSynchronize
movq 80(%rsp), %rsi
movq 32(%rsp), %rdx
leaq 160(%rsp), %rdi
callq hipEventElapsedTime
movss 160(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
divss .LCPI1_1(%rip), %xmm0
cvtss2sd %xmm0, %xmm0
movl $.L.str.3, %edi
movl $10, %esi
movb $1, %al
callq printf
movq 40(%rsp), %rsi
movl 12(%rsp), %edx
imull %edx, %edx
shlq $2, %rdx
movq 72(%rsp), %r15 # 8-byte Reload
movq %r15, %rdi
movl $2, %ecx
callq hipMemcpy
movl 12(%rsp), %eax
movl %eax, %ecx
shrl $31, %ecx
addl %eax, %ecx
sarl %ecx
movslq %ecx, %rax
movq 24(%rsp), %rbx # 8-byte Reload
movl (%rbx,%rax,4), %esi
movq 16(%rsp), %r14 # 8-byte Reload
movl (%r14,%rax,4), %edx
movl (%r15,%rax,4), %ecx
movl $.L.str.4, %edi
xorl %eax, %eax
callq printf
movq %rbx, %rdi
callq free
movq %r14, %rdi
callq free
movq %r15, %rdi
callq free
movq 56(%rsp), %rdi
callq hipFree
movq 48(%rsp), %rdi
callq hipFree
movq 40(%rsp), %rdi
callq hipFree
xorl %eax, %eax
addq $200, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z12sumaMatricesPiS_S_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z12sumaMatricesPiS_S_i,@object # @_Z12sumaMatricesPiS_S_i
.section .rodata,"a",@progbits
.globl _Z12sumaMatricesPiS_S_i
.p2align 3, 0x0
_Z12sumaMatricesPiS_S_i:
.quad _Z27__device_stub__sumaMatricesPiS_S_i
.size _Z12sumaMatricesPiS_S_i, 8
.type .L.str.1,@object # @.str.1
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.1:
.asciz "%d"
.size .L.str.1, 3
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "Se va a realizar la suma con %d bloques y %d hilos\n"
.size .L.str.2, 52
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "El tiempo tomado para %d iteraciones fue de %3.3f ms\n"
.size .L.str.3, 54
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "Por ejemplo: \t%d\t+\t%d\t=%d\n"
.size .L.str.4, 27
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z12sumaMatricesPiS_S_i"
.size .L__unnamed_1, 24
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "Ingrese el tamano de las matrices"
.size .Lstr, 34
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z27__device_stub__sumaMatricesPiS_S_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z12sumaMatricesPiS_S_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z12sumaMatricesPiS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e280000002100 */
/*0030*/ S2R R2, SR_CTAID.Y ; /* 0x0000000000027919 */
/* 0x000e680000002600 */
/*0040*/ S2R R5, SR_TID.Y ; /* 0x0000000000057919 */
/* 0x000e620000002200 */
/*0050*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fca00078e0203 */
/*0060*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x178], PT ; /* 0x00005e0000007a0c */
/* 0x000fe20003f06270 */
/*0070*/ IMAD R3, R2, c[0x0][0x4], R5 ; /* 0x0000010002037a24 */
/* 0x002fca00078e0205 */
/*0080*/ ISETP.GE.OR P0, PT, R3, c[0x0][0x178], P0 ; /* 0x00005e0003007a0c */
/* 0x000fda0000706670 */
/*0090*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*00a0*/ HFMA2.MMA R7, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff077435 */
/* 0x000fe200000001ff */
/*00b0*/ IMAD R0, R3, c[0x0][0x178], R0 ; /* 0x00005e0003007a24 */
/* 0x000fe200078e0200 */
/*00c0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fd00000000a00 */
/*00d0*/ IMAD.WIDE R4, R0, R7, c[0x0][0x168] ; /* 0x00005a0000047625 */
/* 0x000fc800078e0207 */
/*00e0*/ IMAD.WIDE R2, R0.reuse, R7.reuse, c[0x0][0x160] ; /* 0x0000580000027625 */
/* 0x0c0fe400078e0207 */
/*00f0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ea8000c1e1900 */
/*0100*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */
/* 0x000ea2000c1e1900 */
/*0110*/ IMAD.WIDE R6, R0, R7, c[0x0][0x170] ; /* 0x00005c0000067625 */
/* 0x000fe200078e0207 */
/*0120*/ IADD3 R9, R4, R3, RZ ; /* 0x0000000304097210 */
/* 0x004fca0007ffe0ff */
/*0130*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */
/* 0x000fe2000c101904 */
/*0140*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0150*/ BRA 0x150; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0180*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0190*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12sumaMatricesPiS_S_i
.globl _Z12sumaMatricesPiS_S_i
.p2align 8
.type _Z12sumaMatricesPiS_S_i,@function
_Z12sumaMatricesPiS_S_i:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x2c
s_load_b32 s2, s[0:1], 0x18
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s3, 0xffff
s_lshr_b32 s3, s3, 16
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[0:1], null, s14, s4, v[2:3]
v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
s_mov_b32 s3, exec_lo
v_max_i32_e32 v2, v0, v1
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s2, v2
s_cbranch_execz .LBB0_2
s_load_b128 s[4:7], s[0:1], 0x0
v_mad_u64_u32 v[2:3], null, v1, s2, v[0:1]
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[0:1], 2, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v2, v3, v2
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z12sumaMatricesPiS_S_i
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 6
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z12sumaMatricesPiS_S_i, .Lfunc_end0-_Z12sumaMatricesPiS_S_i
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z12sumaMatricesPiS_S_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z12sumaMatricesPiS_S_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 6
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000f45fd_00000000-6_Ejemplo4.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z37__device_stub__Z12sumaMatricesPiS_S_iPiS_S_i
.type _Z37__device_stub__Z12sumaMatricesPiS_S_iPiS_S_i, @function
_Z37__device_stub__Z12sumaMatricesPiS_S_iPiS_S_i:
.LFB2082:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z12sumaMatricesPiS_S_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z37__device_stub__Z12sumaMatricesPiS_S_iPiS_S_i, .-_Z37__device_stub__Z12sumaMatricesPiS_S_iPiS_S_i
.globl _Z12sumaMatricesPiS_S_i
.type _Z12sumaMatricesPiS_S_i, @function
_Z12sumaMatricesPiS_S_i:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z37__device_stub__Z12sumaMatricesPiS_S_iPiS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z12sumaMatricesPiS_S_i, .-_Z12sumaMatricesPiS_S_i
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "Ingrese el tamano de las matrices\n"
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "%d"
.section .rodata.str1.8
.align 8
.LC7:
.string "Se va a realizar la suma con %d bloques y %d hilos\n"
.align 8
.LC9:
.string "El tiempo tomado para %d iteraciones fue de %3.3f ms\n"
.section .rodata.str1.1
.LC10:
.string "Por ejemplo: \t%d\t+\t%d\t=%d\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $88, %rsp
.cfi_def_cfa_offset 128
movq %fs:40, %rax
movq %rax, 72(%rsp)
xorl %eax, %eax
leaq .LC0(%rip), %rsi
movl $2, %edi
call __printf_chk@PLT
movq %rsp, %rsi
leaq .LC1(%rip), %rdi
movl $0, %eax
call __isoc23_scanf@PLT
movl (%rsp), %eax
imull %eax, %eax
movslq %eax, %r13
salq $2, %r13
movq %r13, %rdi
call malloc@PLT
movq %rax, %r12
movq %r13, %rdi
call malloc@PLT
movq %rax, %rbp
movq %r13, %rdi
call malloc@PLT
movq %rax, %rbx
leaq 8(%rsp), %rdi
movq %r13, %rsi
call cudaMalloc@PLT
movl (%rsp), %eax
imull %eax, %eax
movslq %eax, %rsi
salq $2, %rsi
leaq 16(%rsp), %rdi
call cudaMalloc@PLT
movl (%rsp), %eax
imull %eax, %eax
movslq %eax, %rsi
salq $2, %rsi
leaq 24(%rsp), %rdi
call cudaMalloc@PLT
leaq 32(%rsp), %rdi
call cudaEventCreate@PLT
leaq 40(%rsp), %rdi
call cudaEventCreate@PLT
movl (%rsp), %esi
testl %esi, %esi
jle .L12
movl %esi, %ecx
movl $0, %edi
movl $0, %r8d
.L13:
movslq %edi, %rax
salq $2, %rax
movl %edi, %edx
.L14:
movl %edx, (%r12,%rax)
movl %edx, 0(%rbp,%rax)
movl $0, (%rbx,%rax)
addl $1, %edx
addq $4, %rax
cmpl %ecx, %edx
jne .L14
addl $1, %r8d
addl %esi, %edi
addl %esi, %ecx
cmpl %esi, %r8d
jne .L13
.L12:
imull %esi, %esi
movslq %esi, %rdx
salq $2, %rdx
movl $1, %ecx
movq %r12, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
movl (%rsp), %eax
imull %eax, %eax
movslq %eax, %rdx
salq $2, %rdx
movl $1, %ecx
movq %rbp, %rsi
movq 16(%rsp), %rdi
call cudaMemcpy@PLT
pxor %xmm2, %xmm2
cvtsi2ssl (%rsp), %xmm2
movaps %xmm2, %xmm0
mulss .LC2(%rip), %xmm0
movl $2, %edx
comiss .LC3(%rip), %xmm0
jbe .L28
.L17:
addl $1, %edx
pxor %xmm1, %xmm1
cvtsi2ssl %edx, %xmm1
movaps %xmm2, %xmm0
divss %xmm1, %xmm0
comiss .LC3(%rip), %xmm0
ja .L17
.L15:
movaps %xmm0, %xmm3
movss .LC11(%rip), %xmm2
movaps %xmm0, %xmm1
andps %xmm2, %xmm1
movss .LC4(%rip), %xmm4
ucomiss %xmm1, %xmm4
jbe .L18
cvttss2sil %xmm0, %eax
pxor %xmm1, %xmm1
cvtsi2ssl %eax, %xmm1
cmpnless %xmm1, %xmm3
movss .LC6(%rip), %xmm4
andps %xmm4, %xmm3
addss %xmm1, %xmm3
andnps %xmm0, %xmm2
orps %xmm2, %xmm3
.L18:
cvttss2sil %xmm3, %ecx
movl %ecx, 48(%rsp)
movl %ecx, 52(%rsp)
movl $1, 56(%rsp)
movl %edx, 60(%rsp)
movl %edx, 64(%rsp)
movl $1, 68(%rsp)
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $0, %esi
movq 32(%rsp), %rdi
call cudaEventRecord@PLT
movl $10, %r13d
jmp .L20
.L28:
movl $2, %edx
jmp .L15
.L19:
subl $1, %r13d
je .L30
.L20:
movl 56(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 48(%rsp), %rdx
movq 60(%rsp), %rdi
movl 68(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
jne .L19
movl (%rsp), %ecx
movq 24(%rsp), %rdx
movq 16(%rsp), %rsi
movq 8(%rsp), %rdi
call _Z37__device_stub__Z12sumaMatricesPiS_S_iPiS_S_i
jmp .L19
.L30:
movl $0, %esi
movq 40(%rsp), %rdi
call cudaEventRecord@PLT
movq 40(%rsp), %rdi
call cudaEventSynchronize@PLT
leaq 4(%rsp), %rdi
movq 40(%rsp), %rdx
movq 32(%rsp), %rsi
call cudaEventElapsedTime@PLT
movss 4(%rsp), %xmm0
divss .LC8(%rip), %xmm0
cvtss2sd %xmm0, %xmm0
movl $10, %edx
leaq .LC9(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movl (%rsp), %eax
imull %eax, %eax
movslq %eax, %rdx
salq $2, %rdx
movl $2, %ecx
movq 24(%rsp), %rsi
movq %rbx, %rdi
call cudaMemcpy@PLT
movl (%rsp), %edx
movl %edx, %eax
shrl $31, %eax
addl %edx, %eax
sarl %eax
cltq
movl 0(%rbp,%rax,4), %ecx
movl (%r12,%rax,4), %edx
movl (%rbx,%rax,4), %r8d
leaq .LC10(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %r12, %rdi
call free@PLT
movq %rbp, %rdi
call free@PLT
movq %rbx, %rdi
call free@PLT
movq 8(%rsp), %rdi
call cudaFree@PLT
movq 16(%rsp), %rdi
call cudaFree@PLT
movq 24(%rsp), %rdi
call cudaFree@PLT
movq 72(%rsp), %rax
subq %fs:40, %rax
jne .L31
movl $0, %eax
addq $88, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L31:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.1
.LC12:
.string "_Z12sumaMatricesPiS_S_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC12(%rip), %rdx
movq %rdx, %rcx
leaq _Z12sumaMatricesPiS_S_i(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC2:
.long 1056964608
.align 4
.LC3:
.long 1107296256
.align 4
.LC4:
.long 1258291200
.align 4
.LC6:
.long 1065353216
.align 4
.LC8:
.long 1092616192
.align 4
.LC11:
.long 2147483647
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "Ejemplo4.hip"
.globl _Z27__device_stub__sumaMatricesPiS_S_i # -- Begin function _Z27__device_stub__sumaMatricesPiS_S_i
.p2align 4, 0x90
.type _Z27__device_stub__sumaMatricesPiS_S_i,@function
_Z27__device_stub__sumaMatricesPiS_S_i: # @_Z27__device_stub__sumaMatricesPiS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z12sumaMatricesPiS_S_i, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z27__device_stub__sumaMatricesPiS_S_i, .Lfunc_end0-_Z27__device_stub__sumaMatricesPiS_S_i
.cfi_endproc
# -- End function
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function main
.LCPI1_0:
.long 0x42000000 # float 32
.LCPI1_1:
.long 0x41200000 # float 10
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $200, %rsp
.cfi_def_cfa_offset 256
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl $.Lstr, %edi
callq puts@PLT
leaq 12(%rsp), %rsi
movl $.L.str.1, %edi
xorl %eax, %eax
callq __isoc23_scanf
movl 12(%rsp), %ebx
imull %ebx, %ebx
shlq $2, %rbx
movq %rbx, %rdi
callq malloc
movq %rax, 24(%rsp) # 8-byte Spill
movq %rbx, %rdi
callq malloc
movq %rax, 16(%rsp) # 8-byte Spill
movq %rbx, %rdi
callq malloc
movq %rax, 72(%rsp) # 8-byte Spill
leaq 56(%rsp), %rdi
movq %rbx, %rsi
callq hipMalloc
movl 12(%rsp), %esi
imull %esi, %esi
shlq $2, %rsi
leaq 48(%rsp), %rdi
callq hipMalloc
movl 12(%rsp), %esi
imull %esi, %esi
shlq $2, %rsi
leaq 40(%rsp), %rdi
callq hipMalloc
leaq 80(%rsp), %rdi
callq hipEventCreate
leaq 32(%rsp), %rdi
callq hipEventCreate
movl 12(%rsp), %r13d
testl %r13d, %r13d
jle .LBB1_5
# %bb.1: # %.preheader.lr.ph
leaq (,%r13,4), %rbx
xorl %r14d, %r14d
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB1_2: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB1_3 Depth 2
movl %r14d, %r12d
shlq $2, %r12
movq 16(%rsp), %rax # 8-byte Reload
leaq (%rax,%r12), %rbp
addq 24(%rsp), %r12 # 8-byte Folded Reload
movl %r13d, %eax
imull %r15d, %eax
movq 72(%rsp), %rcx # 8-byte Reload
leaq (%rcx,%rax,4), %rdi
xorl %esi, %esi
movq %rbx, %rdx
callq memset@PLT
xorl %eax, %eax
.p2align 4, 0x90
.LBB1_3: # Parent Loop BB1_2 Depth=1
# => This Inner Loop Header: Depth=2
leal (%r14,%rax), %ecx
movl %ecx, (%r12,%rax,4)
movl %ecx, (%rbp,%rax,4)
incq %rax
cmpq %rax, %r13
jne .LBB1_3
# %bb.4: # %._crit_edge
# in Loop: Header=BB1_2 Depth=1
incq %r15
addq %r13, %r14
cmpq %r13, %r15
jne .LBB1_2
.LBB1_5: # %._crit_edge58
movabsq $4294967297, %r12 # imm = 0x100000001
movq 56(%rsp), %rdi
imull %r13d, %r13d
shlq $2, %r13
movq 24(%rsp), %rsi # 8-byte Reload
movq %r13, %rdx
movl $1, %ecx
callq hipMemcpy
movq 48(%rsp), %rdi
movl 12(%rsp), %edx
imull %edx, %edx
shlq $2, %rdx
movq 16(%rsp), %rsi # 8-byte Reload
movl $1, %ecx
callq hipMemcpy
cvtsi2ssl 12(%rsp), %xmm1
movss .LCPI1_0(%rip), %xmm2 # xmm2 = mem[0],zero,zero,zero
movq %r12, %r13
.p2align 4, 0x90
.LBB1_6: # =>This Inner Loop Header: Depth=1
leal 1(%r13), %eax
xorps %xmm3, %xmm3
cvtsi2ss %eax, %xmm3
movaps %xmm1, %xmm0
divss %xmm3, %xmm0
addq %r12, %r13
ucomiss %xmm2, %xmm0
ja .LBB1_6
# %bb.7:
callq ceilf@PLT
cvttss2si %xmm0, %edx
imulq %rdx, %r12
movl $.L.str.2, %edi
movl %r13d, %esi
# kill: def $edx killed $edx killed $rdx
xorl %eax, %eax
callq printf
movq 80(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movl $10, %ebx
leaq 96(%rsp), %r14
leaq 88(%rsp), %r15
leaq 160(%rsp), %rbp
jmp .LBB1_8
.p2align 4, 0x90
.LBB1_10: # in Loop: Header=BB1_8 Depth=1
decl %ebx
je .LBB1_11
.LBB1_8: # =>This Inner Loop Header: Depth=1
movq %r13, %rdi
movl $1, %esi
movq %r12, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_10
# %bb.9: # in Loop: Header=BB1_8 Depth=1
movq 56(%rsp), %rax
movq 48(%rsp), %rcx
movq 40(%rsp), %rdx
movl 12(%rsp), %esi
movq %rax, 152(%rsp)
movq %rcx, 144(%rsp)
movq %rdx, 136(%rsp)
movl %esi, 68(%rsp)
leaq 152(%rsp), %rax
movq %rax, 160(%rsp)
leaq 144(%rsp), %rax
movq %rax, 168(%rsp)
leaq 136(%rsp), %rax
movq %rax, 176(%rsp)
leaq 68(%rsp), %rax
movq %rax, 184(%rsp)
leaq 120(%rsp), %rdi
leaq 104(%rsp), %rsi
movq %r14, %rdx
movq %r15, %rcx
callq __hipPopCallConfiguration
movq 120(%rsp), %rsi
movl 128(%rsp), %edx
movq 104(%rsp), %rcx
movl 112(%rsp), %r8d
movl $_Z12sumaMatricesPiS_S_i, %edi
movq %rbp, %r9
pushq 88(%rsp)
.cfi_adjust_cfa_offset 8
pushq 104(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
jmp .LBB1_10
.LBB1_11:
movq 32(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq 32(%rsp), %rdi
callq hipEventSynchronize
movq 80(%rsp), %rsi
movq 32(%rsp), %rdx
leaq 160(%rsp), %rdi
callq hipEventElapsedTime
movss 160(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
divss .LCPI1_1(%rip), %xmm0
cvtss2sd %xmm0, %xmm0
movl $.L.str.3, %edi
movl $10, %esi
movb $1, %al
callq printf
movq 40(%rsp), %rsi
movl 12(%rsp), %edx
imull %edx, %edx
shlq $2, %rdx
movq 72(%rsp), %r15 # 8-byte Reload
movq %r15, %rdi
movl $2, %ecx
callq hipMemcpy
movl 12(%rsp), %eax
movl %eax, %ecx
shrl $31, %ecx
addl %eax, %ecx
sarl %ecx
movslq %ecx, %rax
movq 24(%rsp), %rbx # 8-byte Reload
movl (%rbx,%rax,4), %esi
movq 16(%rsp), %r14 # 8-byte Reload
movl (%r14,%rax,4), %edx
movl (%r15,%rax,4), %ecx
movl $.L.str.4, %edi
xorl %eax, %eax
callq printf
movq %rbx, %rdi
callq free
movq %r14, %rdi
callq free
movq %r15, %rdi
callq free
movq 56(%rsp), %rdi
callq hipFree
movq 48(%rsp), %rdi
callq hipFree
movq 40(%rsp), %rdi
callq hipFree
xorl %eax, %eax
addq $200, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z12sumaMatricesPiS_S_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z12sumaMatricesPiS_S_i,@object # @_Z12sumaMatricesPiS_S_i
.section .rodata,"a",@progbits
.globl _Z12sumaMatricesPiS_S_i
.p2align 3, 0x0
_Z12sumaMatricesPiS_S_i:
.quad _Z27__device_stub__sumaMatricesPiS_S_i
.size _Z12sumaMatricesPiS_S_i, 8
.type .L.str.1,@object # @.str.1
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.1:
.asciz "%d"
.size .L.str.1, 3
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "Se va a realizar la suma con %d bloques y %d hilos\n"
.size .L.str.2, 52
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "El tiempo tomado para %d iteraciones fue de %3.3f ms\n"
.size .L.str.3, 54
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "Por ejemplo: \t%d\t+\t%d\t=%d\n"
.size .L.str.4, 27
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z12sumaMatricesPiS_S_i"
.size .L__unnamed_1, 24
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "Ingrese el tamano de las matrices"
.size .Lstr, 34
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z27__device_stub__sumaMatricesPiS_S_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z12sumaMatricesPiS_S_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | // Copyright (c) 2015 Patrick Diehl
//
// Distributed under the Boost Software License, Version 1.0. (See accompanying
// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
extern "C" { __global__ void stencil(size_t* count, float* in, float* out, float* s) {
for (size_t i = (blockDim.x * blockIdx.x +1) + threadIdx.x; i < count[0] - 1;
i += gridDim.x * blockDim.x) {
out[i] = s[0] * in[i-1] + s[1] * in[i] + s[2] * in[i+1];
}
}
} | code for sm_80
Function : stencil
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x160] ; /* 0x00005800ff027624 */
/* 0x000fe200078e00ff */
/*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0030*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x164] ; /* 0x00005900ff037624 */
/* 0x000fca00078e00ff */
/*0040*/ LDG.E.64 R4, [R2.64] ; /* 0x0000000402047981 */
/* 0x000ea8000c1e1b00 */
/*0050*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0060*/ S2R R7, SR_TID.X ; /* 0x0000000000077919 */
/* 0x000e240000002100 */
/*0070*/ IMAD R0, R0, c[0x0][0x0], R7 ; /* 0x0000000000007a24 */
/* 0x001fca00078e0207 */
/*0080*/ IADD3 R0, R0, 0x1, RZ ; /* 0x0000000100007810 */
/* 0x000fe40007ffe0ff */
/*0090*/ IADD3 R7, P0, R4, -0x1, RZ ; /* 0xffffffff04077810 */
/* 0x004fc80007f1e0ff */
/*00a0*/ IADD3.X R4, R5, -0x1, RZ, P0, !PT ; /* 0xffffffff05047810 */
/* 0x000fe400007fe4ff */
/*00b0*/ ISETP.GT.U32.AND P0, PT, R7, R0, PT ; /* 0x000000000700720c */
/* 0x000fc80003f04070 */
/*00c0*/ ISETP.GT.U32.AND.EX P0, PT, R4, RZ, PT, P0 ; /* 0x000000ff0400720c */
/* 0x000fda0003f04100 */
/*00d0*/ @!P0 EXIT ; /* 0x000000000000894d */
/* 0x000fea0003800000 */
/*00e0*/ IMAD.MOV.U32 R15, RZ, RZ, R0 ; /* 0x000000ffff0f7224 */
/* 0x000fe400078e0000 */
/*00f0*/ IMAD.MOV.U32 R14, RZ, RZ, RZ ; /* 0x000000ffff0e7224 */
/* 0x000fe400078e00ff */
/*0100*/ IMAD.MOV.U32 R17, RZ, RZ, c[0x0][0xc] ; /* 0x00000300ff117624 */
/* 0x000fe400078e00ff */
/*0110*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x0][0x178] ; /* 0x00005e00ff047624 */
/* 0x000fe400078e00ff */
/*0120*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x0][0x17c] ; /* 0x00005f00ff057624 */
/* 0x000fc600078e00ff */
/*0130*/ IMAD.SHL.U32 R10, R15.reuse, 0x4, RZ ; /* 0x000000040f0a7824 */
/* 0x040fe200078e00ff */
/*0140*/ SHF.L.U64.HI R16, R15, 0x2, R14 ; /* 0x000000020f107819 */
/* 0x000fe2000001020e */
/*0150*/ LDG.E R11, [R4.64+0x4] ; /* 0x00000404040b7981 */
/* 0x000ea6000c1e1900 */
/*0160*/ IADD3 R6, P0, R10, c[0x0][0x168], RZ ; /* 0x00005a000a067a10 */
/* 0x000fe20007f1e0ff */
/*0170*/ LDG.E R9, [R4.64] ; /* 0x0000000404097981 */
/* 0x000ee6000c1e1900 */
/*0180*/ IADD3.X R7, R16, c[0x0][0x16c], RZ, P0, !PT ; /* 0x00005b0010077a10 */
/* 0x000fe200007fe4ff */
/*0190*/ LDG.E R12, [R4.64+0x8] ; /* 0x00000804040c7981 */
/* 0x000f28000c1e1900 */
/*01a0*/ LDG.E R8, [R6.64] ; /* 0x0000000406087981 */
/* 0x000ea8000c1e1900 */
/*01b0*/ LDG.E R0, [R6.64+-0x4] ; /* 0xfffffc0406007981 */
/* 0x000ee8000c1e1900 */
/*01c0*/ LDG.E R13, [R6.64+0x4] ; /* 0x00000404060d7981 */
/* 0x000f22000c1e1900 */
/*01d0*/ IADD3 R10, P0, R10, c[0x0][0x170], RZ ; /* 0x00005c000a0a7a10 */
/* 0x000fe20007f1e0ff */
/*01e0*/ FMUL R8, R8, R11 ; /* 0x0000000b08087220 */
/* 0x004fc80000400000 */
/*01f0*/ FFMA R0, R0, R9, R8 ; /* 0x0000000900007223 */
/* 0x008fe20000000008 */
/*0200*/ IADD3.X R11, R16, c[0x0][0x174], RZ, P0, !PT ; /* 0x00005d00100b7a10 */
/* 0x000fc600007fe4ff */
/*0210*/ FFMA R13, R13, R12, R0 ; /* 0x0000000c0d0d7223 */
/* 0x010fca0000000000 */
/*0220*/ STG.E [R10.64], R13 ; /* 0x0000000d0a007986 */
/* 0x0001e8000c101904 */
/*0230*/ LDG.E.64 R8, [R2.64] ; /* 0x0000000402087981 */
/* 0x000ea2000c1e1b00 */
/*0240*/ IMAD R0, R17, c[0x0][0x0], RZ ; /* 0x0000000011007a24 */
/* 0x000fca00078e02ff */
/*0250*/ IADD3 R15, P1, R0, R15, RZ ; /* 0x0000000f000f7210 */
/* 0x000fca0007f3e0ff */
/*0260*/ IMAD.X R14, RZ, RZ, R14, P1 ; /* 0x000000ffff0e7224 */
/* 0x000fe200008e060e */
/*0270*/ IADD3 R0, P0, R8, -0x1, RZ ; /* 0xffffffff08007810 */
/* 0x004fc80007f1e0ff */
/*0280*/ IADD3.X R8, R9, -0x1, RZ, P0, !PT ; /* 0xffffffff09087810 */
/* 0x000fe400007fe4ff */
/*0290*/ ISETP.GE.U32.AND P0, PT, R15, R0, PT ; /* 0x000000000f00720c */
/* 0x000fc80003f06070 */
/*02a0*/ ISETP.GE.U32.AND.EX P0, PT, R14, R8, PT, P0 ; /* 0x000000080e00720c */
/* 0x000fda0003f06100 */
/*02b0*/ @!P0 BRA 0x130 ; /* 0xfffffe7000008947 */
/* 0x001fea000383ffff */
/*02c0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*02d0*/ BRA 0x2d0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*02e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0300*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0310*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0320*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0330*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0340*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0350*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0360*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0370*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | // Copyright (c) 2015 Patrick Diehl
//
// Distributed under the Boost Software License, Version 1.0. (See accompanying
// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
extern "C" { __global__ void stencil(size_t* count, float* in, float* out, float* s) {
for (size_t i = (blockDim.x * blockIdx.x +1) + threadIdx.x; i < count[0] - 1;
i += gridDim.x * blockDim.x) {
out[i] = s[0] * in[i-1] + s[1] * in[i] + s[2] * in[i+1];
}
}
} | .file "tmpxft_00126330_00000000-6_stencil_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z34__device_stub__Z7stencilPmPfS0_S0_PmPfS0_S0_
.type _Z34__device_stub__Z7stencilPmPfS0_S0_PmPfS0_S0_, @function
_Z34__device_stub__Z7stencilPmPfS0_S0_PmPfS0_S0_:
.LFB2051:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %rcx, (%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movq %rsp, %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq stencil(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z34__device_stub__Z7stencilPmPfS0_S0_PmPfS0_S0_, .-_Z34__device_stub__Z7stencilPmPfS0_S0_PmPfS0_S0_
.globl stencil
.type stencil, @function
stencil:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z34__device_stub__Z7stencilPmPfS0_S0_PmPfS0_S0_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size stencil, .-stencil
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "stencil"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq stencil(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | // Copyright (c) 2015 Patrick Diehl
//
// Distributed under the Boost Software License, Version 1.0. (See accompanying
// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
extern "C" { __global__ void stencil(size_t* count, float* in, float* out, float* s) {
for (size_t i = (blockDim.x * blockIdx.x +1) + threadIdx.x; i < count[0] - 1;
i += gridDim.x * blockDim.x) {
out[i] = s[0] * in[i-1] + s[1] * in[i] + s[2] * in[i+1];
}
}
} | #include <hip/hip_runtime.h>
// Copyright (c) 2015 Patrick Diehl
//
// Distributed under the Boost Software License, Version 1.0. (See accompanying
// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
extern "C" { __global__ void stencil(size_t* count, float* in, float* out, float* s) {
for (size_t i = (blockDim.x * blockIdx.x +1) + threadIdx.x; i < count[0] - 1;
i += gridDim.x * blockDim.x) {
out[i] = s[0] * in[i-1] + s[1] * in[i] + s[2] * in[i+1];
}
}
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
// Copyright (c) 2015 Patrick Diehl
//
// Distributed under the Boost Software License, Version 1.0. (See accompanying
// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
extern "C" { __global__ void stencil(size_t* count, float* in, float* out, float* s) {
for (size_t i = (blockDim.x * blockIdx.x +1) + threadIdx.x; i < count[0] - 1;
i += gridDim.x * blockDim.x) {
out[i] = s[0] * in[i-1] + s[1] * in[i] + s[2] * in[i+1];
}
}
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected stencil
.globl stencil
.p2align 8
.type stencil,@function
stencil:
s_clause 0x1
s_load_b64 s[2:3], s[0:1], 0x0
s_load_b32 s6, s[0:1], 0x2c
s_add_u32 s4, s0, 32
s_addc_u32 s5, s1, 0
v_mov_b32_e32 v1, 0
s_waitcnt lgkmcnt(0)
s_load_b64 s[2:3], s[2:3], 0x0
s_and_b32 s10, s6, 0xffff
s_mov_b32 s6, exec_lo
s_mul_i32 s15, s15, s10
s_delay_alu instid0(SALU_CYCLE_1)
v_add3_u32 v0, v0, s15, 1
s_waitcnt lgkmcnt(0)
s_add_u32 s2, s2, -1
s_addc_u32 s3, s3, -1
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmpx_gt_u64_e64 s[2:3], v[0:1]
s_cbranch_execz .LBB0_3
s_load_b32 s12, s[4:5], 0x0
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x8
s_load_b64 s[8:9], s[0:1], 0x18
v_lshlrev_b64 v[2:3], 2, v[0:1]
v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v4, v0
s_mov_b32 s11, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
s_mov_b32 s1, s11
s_waitcnt lgkmcnt(0)
s_mul_i32 s10, s12, s10
s_lshl_b64 s[12:13], s[10:11], 2
.p2align 6
.LBB0_2:
v_add_co_u32 v9, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v10, vcc_lo, s5, v3, vcc_lo
v_add_co_u32 v4, vcc_lo, v4, s10
global_load_b96 v[6:8], v1, s[8:9]
s_clause 0x1
global_load_b64 v[11:12], v[9:10], off
global_load_b32 v0, v[9:10], off offset:-4
v_add_co_ci_u32_e32 v5, vcc_lo, s11, v5, vcc_lo
v_add_co_u32 v9, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v10, vcc_lo, s7, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cmp_le_u64_e32 vcc_lo, s[2:3], v[4:5]
v_add_co_u32 v2, s0, v2, s12
v_add_co_ci_u32_e64 v3, s0, s13, v3, s0
s_or_b32 s1, vcc_lo, s1
s_waitcnt vmcnt(1)
v_mul_f32_e32 v7, v7, v11
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v7, v6, v0
v_fmac_f32_e32 v7, v8, v12
global_store_b32 v[9:10], v7, off
s_and_not1_b32 exec_lo, exec_lo, s1
s_cbranch_execnz .LBB0_2
.LBB0_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel stencil
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 13
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size stencil, .Lfunc_end0-stencil
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 24
.size: 8
.value_kind: global_buffer
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: stencil
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: stencil.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 13
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
// Copyright (c) 2015 Patrick Diehl
//
// Distributed under the Boost Software License, Version 1.0. (See accompanying
// file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt)
extern "C" { __global__ void stencil(size_t* count, float* in, float* out, float* s) {
for (size_t i = (blockDim.x * blockIdx.x +1) + threadIdx.x; i < count[0] - 1;
i += gridDim.x * blockDim.x) {
out[i] = s[0] * in[i-1] + s[1] * in[i] + s[2] * in[i+1];
}
}
} | .text
.file "stencil_kernel.hip"
.globl __device_stub__stencil # -- Begin function __device_stub__stencil
.p2align 4, 0x90
.type __device_stub__stencil,@function
__device_stub__stencil: # @__device_stub__stencil
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movq %rcx, 48(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rax
movq %rax, 104(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 80(%rsp), %r9
movl $stencil, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size __device_stub__stencil, .Lfunc_end0-__device_stub__stencil
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $stencil, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type stencil,@object # @stencil
.section .rodata,"a",@progbits
.globl stencil
.p2align 3, 0x0
stencil:
.quad __device_stub__stencil
.size stencil, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "stencil"
.size .L__unnamed_1, 8
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __device_stub__stencil
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym stencil
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : stencil
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x160] ; /* 0x00005800ff027624 */
/* 0x000fe200078e00ff */
/*0020*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0030*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x164] ; /* 0x00005900ff037624 */
/* 0x000fca00078e00ff */
/*0040*/ LDG.E.64 R4, [R2.64] ; /* 0x0000000402047981 */
/* 0x000ea8000c1e1b00 */
/*0050*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0060*/ S2R R7, SR_TID.X ; /* 0x0000000000077919 */
/* 0x000e240000002100 */
/*0070*/ IMAD R0, R0, c[0x0][0x0], R7 ; /* 0x0000000000007a24 */
/* 0x001fca00078e0207 */
/*0080*/ IADD3 R0, R0, 0x1, RZ ; /* 0x0000000100007810 */
/* 0x000fe40007ffe0ff */
/*0090*/ IADD3 R7, P0, R4, -0x1, RZ ; /* 0xffffffff04077810 */
/* 0x004fc80007f1e0ff */
/*00a0*/ IADD3.X R4, R5, -0x1, RZ, P0, !PT ; /* 0xffffffff05047810 */
/* 0x000fe400007fe4ff */
/*00b0*/ ISETP.GT.U32.AND P0, PT, R7, R0, PT ; /* 0x000000000700720c */
/* 0x000fc80003f04070 */
/*00c0*/ ISETP.GT.U32.AND.EX P0, PT, R4, RZ, PT, P0 ; /* 0x000000ff0400720c */
/* 0x000fda0003f04100 */
/*00d0*/ @!P0 EXIT ; /* 0x000000000000894d */
/* 0x000fea0003800000 */
/*00e0*/ IMAD.MOV.U32 R15, RZ, RZ, R0 ; /* 0x000000ffff0f7224 */
/* 0x000fe400078e0000 */
/*00f0*/ IMAD.MOV.U32 R14, RZ, RZ, RZ ; /* 0x000000ffff0e7224 */
/* 0x000fe400078e00ff */
/*0100*/ IMAD.MOV.U32 R17, RZ, RZ, c[0x0][0xc] ; /* 0x00000300ff117624 */
/* 0x000fe400078e00ff */
/*0110*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x0][0x178] ; /* 0x00005e00ff047624 */
/* 0x000fe400078e00ff */
/*0120*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x0][0x17c] ; /* 0x00005f00ff057624 */
/* 0x000fc600078e00ff */
/*0130*/ IMAD.SHL.U32 R10, R15.reuse, 0x4, RZ ; /* 0x000000040f0a7824 */
/* 0x040fe200078e00ff */
/*0140*/ SHF.L.U64.HI R16, R15, 0x2, R14 ; /* 0x000000020f107819 */
/* 0x000fe2000001020e */
/*0150*/ LDG.E R11, [R4.64+0x4] ; /* 0x00000404040b7981 */
/* 0x000ea6000c1e1900 */
/*0160*/ IADD3 R6, P0, R10, c[0x0][0x168], RZ ; /* 0x00005a000a067a10 */
/* 0x000fe20007f1e0ff */
/*0170*/ LDG.E R9, [R4.64] ; /* 0x0000000404097981 */
/* 0x000ee6000c1e1900 */
/*0180*/ IADD3.X R7, R16, c[0x0][0x16c], RZ, P0, !PT ; /* 0x00005b0010077a10 */
/* 0x000fe200007fe4ff */
/*0190*/ LDG.E R12, [R4.64+0x8] ; /* 0x00000804040c7981 */
/* 0x000f28000c1e1900 */
/*01a0*/ LDG.E R8, [R6.64] ; /* 0x0000000406087981 */
/* 0x000ea8000c1e1900 */
/*01b0*/ LDG.E R0, [R6.64+-0x4] ; /* 0xfffffc0406007981 */
/* 0x000ee8000c1e1900 */
/*01c0*/ LDG.E R13, [R6.64+0x4] ; /* 0x00000404060d7981 */
/* 0x000f22000c1e1900 */
/*01d0*/ IADD3 R10, P0, R10, c[0x0][0x170], RZ ; /* 0x00005c000a0a7a10 */
/* 0x000fe20007f1e0ff */
/*01e0*/ FMUL R8, R8, R11 ; /* 0x0000000b08087220 */
/* 0x004fc80000400000 */
/*01f0*/ FFMA R0, R0, R9, R8 ; /* 0x0000000900007223 */
/* 0x008fe20000000008 */
/*0200*/ IADD3.X R11, R16, c[0x0][0x174], RZ, P0, !PT ; /* 0x00005d00100b7a10 */
/* 0x000fc600007fe4ff */
/*0210*/ FFMA R13, R13, R12, R0 ; /* 0x0000000c0d0d7223 */
/* 0x010fca0000000000 */
/*0220*/ STG.E [R10.64], R13 ; /* 0x0000000d0a007986 */
/* 0x0001e8000c101904 */
/*0230*/ LDG.E.64 R8, [R2.64] ; /* 0x0000000402087981 */
/* 0x000ea2000c1e1b00 */
/*0240*/ IMAD R0, R17, c[0x0][0x0], RZ ; /* 0x0000000011007a24 */
/* 0x000fca00078e02ff */
/*0250*/ IADD3 R15, P1, R0, R15, RZ ; /* 0x0000000f000f7210 */
/* 0x000fca0007f3e0ff */
/*0260*/ IMAD.X R14, RZ, RZ, R14, P1 ; /* 0x000000ffff0e7224 */
/* 0x000fe200008e060e */
/*0270*/ IADD3 R0, P0, R8, -0x1, RZ ; /* 0xffffffff08007810 */
/* 0x004fc80007f1e0ff */
/*0280*/ IADD3.X R8, R9, -0x1, RZ, P0, !PT ; /* 0xffffffff09087810 */
/* 0x000fe400007fe4ff */
/*0290*/ ISETP.GE.U32.AND P0, PT, R15, R0, PT ; /* 0x000000000f00720c */
/* 0x000fc80003f06070 */
/*02a0*/ ISETP.GE.U32.AND.EX P0, PT, R14, R8, PT, P0 ; /* 0x000000080e00720c */
/* 0x000fda0003f06100 */
/*02b0*/ @!P0 BRA 0x130 ; /* 0xfffffe7000008947 */
/* 0x001fea000383ffff */
/*02c0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*02d0*/ BRA 0x2d0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*02e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*02f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0300*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0310*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0320*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0330*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0340*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0350*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0360*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0370*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected stencil
.globl stencil
.p2align 8
.type stencil,@function
stencil:
s_clause 0x1
s_load_b64 s[2:3], s[0:1], 0x0
s_load_b32 s6, s[0:1], 0x2c
s_add_u32 s4, s0, 32
s_addc_u32 s5, s1, 0
v_mov_b32_e32 v1, 0
s_waitcnt lgkmcnt(0)
s_load_b64 s[2:3], s[2:3], 0x0
s_and_b32 s10, s6, 0xffff
s_mov_b32 s6, exec_lo
s_mul_i32 s15, s15, s10
s_delay_alu instid0(SALU_CYCLE_1)
v_add3_u32 v0, v0, s15, 1
s_waitcnt lgkmcnt(0)
s_add_u32 s2, s2, -1
s_addc_u32 s3, s3, -1
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmpx_gt_u64_e64 s[2:3], v[0:1]
s_cbranch_execz .LBB0_3
s_load_b32 s12, s[4:5], 0x0
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x8
s_load_b64 s[8:9], s[0:1], 0x18
v_lshlrev_b64 v[2:3], 2, v[0:1]
v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v4, v0
s_mov_b32 s11, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
s_mov_b32 s1, s11
s_waitcnt lgkmcnt(0)
s_mul_i32 s10, s12, s10
s_lshl_b64 s[12:13], s[10:11], 2
.p2align 6
.LBB0_2:
v_add_co_u32 v9, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v10, vcc_lo, s5, v3, vcc_lo
v_add_co_u32 v4, vcc_lo, v4, s10
global_load_b96 v[6:8], v1, s[8:9]
s_clause 0x1
global_load_b64 v[11:12], v[9:10], off
global_load_b32 v0, v[9:10], off offset:-4
v_add_co_ci_u32_e32 v5, vcc_lo, s11, v5, vcc_lo
v_add_co_u32 v9, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v10, vcc_lo, s7, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cmp_le_u64_e32 vcc_lo, s[2:3], v[4:5]
v_add_co_u32 v2, s0, v2, s12
v_add_co_ci_u32_e64 v3, s0, s13, v3, s0
s_or_b32 s1, vcc_lo, s1
s_waitcnt vmcnt(1)
v_mul_f32_e32 v7, v7, v11
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v7, v6, v0
v_fmac_f32_e32 v7, v8, v12
global_store_b32 v[9:10], v7, off
s_and_not1_b32 exec_lo, exec_lo, s1
s_cbranch_execnz .LBB0_2
.LBB0_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel stencil
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 13
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size stencil, .Lfunc_end0-stencil
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 24
.size: 8
.value_kind: global_buffer
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: stencil
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: stencil.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 13
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00126330_00000000-6_stencil_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z34__device_stub__Z7stencilPmPfS0_S0_PmPfS0_S0_
.type _Z34__device_stub__Z7stencilPmPfS0_S0_PmPfS0_S0_, @function
_Z34__device_stub__Z7stencilPmPfS0_S0_PmPfS0_S0_:
.LFB2051:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %rcx, (%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movq %rsp, %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq stencil(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z34__device_stub__Z7stencilPmPfS0_S0_PmPfS0_S0_, .-_Z34__device_stub__Z7stencilPmPfS0_S0_PmPfS0_S0_
.globl stencil
.type stencil, @function
stencil:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z34__device_stub__Z7stencilPmPfS0_S0_PmPfS0_S0_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size stencil, .-stencil
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "stencil"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq stencil(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "stencil_kernel.hip"
.globl __device_stub__stencil # -- Begin function __device_stub__stencil
.p2align 4, 0x90
.type __device_stub__stencil,@function
__device_stub__stencil: # @__device_stub__stencil
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movq %rcx, 48(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 48(%rsp), %rax
movq %rax, 104(%rsp)
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 80(%rsp), %r9
movl $stencil, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size __device_stub__stencil, .Lfunc_end0-__device_stub__stencil
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $stencil, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type stencil,@object # @stencil
.section .rodata,"a",@progbits
.globl stencil
.p2align 3, 0x0
stencil:
.quad __device_stub__stencil
.size stencil, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "stencil"
.size .L__unnamed_1, 8
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __device_stub__stencil
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym stencil
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | /*
CUDA C program
@author Juan Manuel Tortajada
@mail ai.robotics.inbox@gmail.com
*/
#include <iostream>
#include <sys/time.h>
__global__
void calculate_arrays_GPU( int n, float *A, float *B, float *C, float *D, float *E, float *F, float *G, float *H, float *K ){
int unique_thread_id = ( blockIdx.x * blockDim.x ) + threadIdx.x;
/*
Ensure no thread accesses to memory areas out of each array bounds
(special case in which the length of each array is not multiple of
the number of threads per block)
*/
if(unique_thread_id < n){
C[unique_thread_id] = A[unique_thread_id] + B[unique_thread_id];
F[unique_thread_id] = D[unique_thread_id] - E[unique_thread_id];
G[unique_thread_id] = K[unique_thread_id] * H[unique_thread_id];
}
}
int main(void){
float elapsed_time_ms;
cudaEvent_t start,stop;
cudaEventCreate(&start);
cudaEventCreate(&stop);
int N = 1<<20; // 1 048 574 elements
float *A, *B, *C, *D, *E, *F, *G, *H, *K; // Host's arrays
float *d_A, *d_B, *d_C, *d_D, *d_E, *d_F, *d_G, *d_H, *d_K; // GPU's arrays
// Allocate memory at the Host
A = (float *)malloc( N*sizeof(float) );
B = (float *)malloc( N*sizeof(float) );
C = (float *)malloc( N*sizeof(float) );
D = (float *)malloc( N*sizeof(float) );
E = (float *)malloc( N*sizeof(float) );
F = (float *)malloc( N*sizeof(float) );
G = (float *)malloc( N*sizeof(float) );
H = (float *)malloc( N*sizeof(float) );
K = (float *)malloc( N*sizeof(float) );
// Allocate memory at the Device (GPU)
cudaMalloc( &d_A, N*sizeof(float) );
cudaMalloc( &d_B, N*sizeof(float) );
cudaMalloc( &d_C, N*sizeof(float) );
cudaMalloc( &d_D, N*sizeof(float) );
cudaMalloc( &d_E, N*sizeof(float) );
cudaMalloc( &d_F, N*sizeof(float) );
cudaMalloc( &d_G, N*sizeof(float) );
cudaMalloc( &d_H, N*sizeof(float) );
cudaMalloc( &d_K, N*sizeof(float) );
// Random array initialization([0,1e6])
for(int i = 0; i < N; i++){
A[i] = 1e6 * ( rand()/RAND_MAX );
B[i] = 1e6 * ( rand()/RAND_MAX );
C[i] = 1e6 * ( rand()/RAND_MAX );
D[i] = 1e6 * ( rand()/RAND_MAX );
E[i] = 1e6 * ( rand()/RAND_MAX );
F[i] = 1e6 * ( rand()/RAND_MAX );
G[i] = 1e6 * ( rand()/RAND_MAX );
H[i] = 1e6 * ( rand()/RAND_MAX );
K[i] = 1e6 * ( rand()/RAND_MAX );
}
// Data copy from Host to GPU
cudaMemcpy( d_A, A, N*sizeof(float), cudaMemcpyHostToDevice );
cudaMemcpy( d_B, B, N*sizeof(float), cudaMemcpyHostToDevice );
cudaMemcpy( d_C, C, N*sizeof(float), cudaMemcpyHostToDevice );
cudaMemcpy( d_D, D, N*sizeof(float), cudaMemcpyHostToDevice );
cudaMemcpy( d_E, E, N*sizeof(float), cudaMemcpyHostToDevice );
cudaMemcpy( d_F, F, N*sizeof(float), cudaMemcpyHostToDevice );
cudaMemcpy( d_G, G, N*sizeof(float), cudaMemcpyHostToDevice );
cudaMemcpy( d_H, H, N*sizeof(float), cudaMemcpyHostToDevice );
cudaMemcpy( d_K, K, N*sizeof(float), cudaMemcpyHostToDevice );
cudaEventRecord(start); // Start GPU timer
/*
Number of blocks: 1
Threads per block: 256
*/
calculate_arrays_GPU<<<1, 256>>>( N, d_A, d_B, d_C, d_D, d_E, d_F, d_G, d_H, d_K );
cudaEventRecord(stop); // Stop GPU timer
cudaEventSynchronize(stop); // Wait for the GPU to finish with the data
// Once data is ready, the result is copied from GPU to Host
cudaMemcpy( A, d_A, N*sizeof(float), cudaMemcpyDeviceToHost );
cudaMemcpy( B, d_B, N*sizeof(float), cudaMemcpyDeviceToHost );
cudaMemcpy( C, d_C, N*sizeof(float), cudaMemcpyDeviceToHost );
cudaMemcpy( D, d_D, N*sizeof(float), cudaMemcpyDeviceToHost );
cudaMemcpy( E, d_E, N*sizeof(float), cudaMemcpyDeviceToHost );
cudaMemcpy( F, d_F, N*sizeof(float), cudaMemcpyDeviceToHost );
cudaMemcpy( G, d_G, N*sizeof(float), cudaMemcpyDeviceToHost );
cudaMemcpy( H, d_H, N*sizeof(float), cudaMemcpyDeviceToHost );
cudaMemcpy( K, d_K, N*sizeof(float), cudaMemcpyDeviceToHost );
cudaEventElapsedTime( &elapsed_time_ms, start, stop ); // Calculate elapsed time [ms]
cudaEventDestroy(start);
cudaEventDestroy(stop);
// Test 10 first elements
for(int i = 0; i < 10; i++){
bool test1 = ( C[i] == A[i] + B[i] );
bool test2 = ( F[i] == D[i] - E[i] );
bool test3 = ( G[i] == K[i] * H[i] );
printf( "\nC[%i] = A[%i] + B[%i] :%s\n", i, i, i, test1 ? "correct" : "failed");
printf( "F[%i] = D[%i] - E[%i] :%s\n", i, i, i, test2 ? "correct" : "failed");
printf( "G[%i] = K[%i] * H[%i] :%s\n", i, i, i, test3 ? "correct" : "failed");
}
printf("\nElapsed time (GPU : kernel calculate_arrays_GPU) : %f ms\n\n", elapsed_time_ms);
// Free memory (GPU)
cudaFree(d_A);
cudaFree(d_B);
cudaFree(d_C);
cudaFree(d_D);
cudaFree(d_E);
cudaFree(d_F);
cudaFree(d_G);
cudaFree(d_H);
cudaFree(d_K);
// Free memory (CPU)
free(A);
free(B);
free(C);
free(D);
free(E);
free(F);
free(G);
free(H);
free(K);
return 0;
} | code for sm_80
Function : _Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R14, SR_CTAID.X ; /* 0x00000000000e7919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R14, R14, c[0x0][0x0], R3 ; /* 0x000000000e0e7a24 */
/* 0x001fca00078e0203 */
/*0040*/ ISETP.GE.AND P0, PT, R14, c[0x0][0x160], PT ; /* 0x000058000e007a0c */
/* 0x000fda0003f06270 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ HFMA2.MMA R15, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff0f7435 */
/* 0x000fe200000001ff */
/*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fd20000000a00 */
/*0080*/ IMAD.WIDE R4, R14, R15, c[0x0][0x170] ; /* 0x00005c000e047625 */
/* 0x000fc800078e020f */
/*0090*/ IMAD.WIDE R2, R14.reuse, R15.reuse, c[0x0][0x168] ; /* 0x00005a000e027625 */
/* 0x0c0fe400078e020f */
/*00a0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ea8000c1e1900 */
/*00b0*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */
/* 0x000ea2000c1e1900 */
/*00c0*/ IMAD.WIDE R6, R14, R15, c[0x0][0x178] ; /* 0x00005e000e067625 */
/* 0x000fc800078e020f */
/*00d0*/ IMAD.WIDE R10, R14, R15, c[0x0][0x188] ; /* 0x000062000e0a7625 */
/* 0x000fc800078e020f */
/*00e0*/ IMAD.WIDE R8, R14, R15, c[0x0][0x180] ; /* 0x000060000e087625 */
/* 0x000fc800078e020f */
/*00f0*/ FADD R17, R4, R3 ; /* 0x0000000304117221 */
/* 0x004fca0000000000 */
/*0100*/ STG.E [R6.64], R17 ; /* 0x0000001106007986 */
/* 0x0001e8000c101904 */
/*0110*/ LDG.E R10, [R10.64] ; /* 0x000000040a0a7981 */
/* 0x000ea8000c1e1900 */
/*0120*/ LDG.E R9, [R8.64] ; /* 0x0000000408097981 */
/* 0x000ea2000c1e1900 */
/*0130*/ IMAD.WIDE R12, R14, R15, c[0x0][0x190] ; /* 0x000064000e0c7625 */
/* 0x000fc800078e020f */
/*0140*/ IMAD.WIDE R4, R14, R15, c[0x0][0x1a0] ; /* 0x000068000e047625 */
/* 0x000fc800078e020f */
/*0150*/ IMAD.WIDE R2, R14, R15, c[0x0][0x1a8] ; /* 0x00006a000e027625 */
/* 0x000fc800078e020f */
/*0160*/ FADD R19, -R10, R9 ; /* 0x000000090a137221 */
/* 0x004fca0000000100 */
/*0170*/ STG.E [R12.64], R19 ; /* 0x000000130c007986 */
/* 0x000fe8000c101904 */
/*0180*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000e28000c1e1900 */
/*0190*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */
/* 0x000e22000c1e1900 */
/*01a0*/ IMAD.WIDE R14, R14, R15, c[0x0][0x198] ; /* 0x000066000e0e7625 */
/* 0x000fc800078e020f */
/*01b0*/ FMUL R7, R4, R3 ; /* 0x0000000304077220 */
/* 0x001fca0000400000 */
/*01c0*/ STG.E [R14.64], R7 ; /* 0x000000070e007986 */
/* 0x000fe2000c101904 */
/*01d0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*01e0*/ BRA 0x1e0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0200*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0210*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0220*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0230*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0240*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0250*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0260*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0270*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /*
CUDA C program
@author Juan Manuel Tortajada
@mail ai.robotics.inbox@gmail.com
*/
#include <iostream>
#include <sys/time.h>
__global__
void calculate_arrays_GPU( int n, float *A, float *B, float *C, float *D, float *E, float *F, float *G, float *H, float *K ){
int unique_thread_id = ( blockIdx.x * blockDim.x ) + threadIdx.x;
/*
Ensure no thread accesses to memory areas out of each array bounds
(special case in which the length of each array is not multiple of
the number of threads per block)
*/
if(unique_thread_id < n){
C[unique_thread_id] = A[unique_thread_id] + B[unique_thread_id];
F[unique_thread_id] = D[unique_thread_id] - E[unique_thread_id];
G[unique_thread_id] = K[unique_thread_id] * H[unique_thread_id];
}
}
int main(void){
float elapsed_time_ms;
cudaEvent_t start,stop;
cudaEventCreate(&start);
cudaEventCreate(&stop);
int N = 1<<20; // 1 048 574 elements
float *A, *B, *C, *D, *E, *F, *G, *H, *K; // Host's arrays
float *d_A, *d_B, *d_C, *d_D, *d_E, *d_F, *d_G, *d_H, *d_K; // GPU's arrays
// Allocate memory at the Host
A = (float *)malloc( N*sizeof(float) );
B = (float *)malloc( N*sizeof(float) );
C = (float *)malloc( N*sizeof(float) );
D = (float *)malloc( N*sizeof(float) );
E = (float *)malloc( N*sizeof(float) );
F = (float *)malloc( N*sizeof(float) );
G = (float *)malloc( N*sizeof(float) );
H = (float *)malloc( N*sizeof(float) );
K = (float *)malloc( N*sizeof(float) );
// Allocate memory at the Device (GPU)
cudaMalloc( &d_A, N*sizeof(float) );
cudaMalloc( &d_B, N*sizeof(float) );
cudaMalloc( &d_C, N*sizeof(float) );
cudaMalloc( &d_D, N*sizeof(float) );
cudaMalloc( &d_E, N*sizeof(float) );
cudaMalloc( &d_F, N*sizeof(float) );
cudaMalloc( &d_G, N*sizeof(float) );
cudaMalloc( &d_H, N*sizeof(float) );
cudaMalloc( &d_K, N*sizeof(float) );
// Random array initialization([0,1e6])
for(int i = 0; i < N; i++){
A[i] = 1e6 * ( rand()/RAND_MAX );
B[i] = 1e6 * ( rand()/RAND_MAX );
C[i] = 1e6 * ( rand()/RAND_MAX );
D[i] = 1e6 * ( rand()/RAND_MAX );
E[i] = 1e6 * ( rand()/RAND_MAX );
F[i] = 1e6 * ( rand()/RAND_MAX );
G[i] = 1e6 * ( rand()/RAND_MAX );
H[i] = 1e6 * ( rand()/RAND_MAX );
K[i] = 1e6 * ( rand()/RAND_MAX );
}
// Data copy from Host to GPU
cudaMemcpy( d_A, A, N*sizeof(float), cudaMemcpyHostToDevice );
cudaMemcpy( d_B, B, N*sizeof(float), cudaMemcpyHostToDevice );
cudaMemcpy( d_C, C, N*sizeof(float), cudaMemcpyHostToDevice );
cudaMemcpy( d_D, D, N*sizeof(float), cudaMemcpyHostToDevice );
cudaMemcpy( d_E, E, N*sizeof(float), cudaMemcpyHostToDevice );
cudaMemcpy( d_F, F, N*sizeof(float), cudaMemcpyHostToDevice );
cudaMemcpy( d_G, G, N*sizeof(float), cudaMemcpyHostToDevice );
cudaMemcpy( d_H, H, N*sizeof(float), cudaMemcpyHostToDevice );
cudaMemcpy( d_K, K, N*sizeof(float), cudaMemcpyHostToDevice );
cudaEventRecord(start); // Start GPU timer
/*
Number of blocks: 1
Threads per block: 256
*/
calculate_arrays_GPU<<<1, 256>>>( N, d_A, d_B, d_C, d_D, d_E, d_F, d_G, d_H, d_K );
cudaEventRecord(stop); // Stop GPU timer
cudaEventSynchronize(stop); // Wait for the GPU to finish with the data
// Once data is ready, the result is copied from GPU to Host
cudaMemcpy( A, d_A, N*sizeof(float), cudaMemcpyDeviceToHost );
cudaMemcpy( B, d_B, N*sizeof(float), cudaMemcpyDeviceToHost );
cudaMemcpy( C, d_C, N*sizeof(float), cudaMemcpyDeviceToHost );
cudaMemcpy( D, d_D, N*sizeof(float), cudaMemcpyDeviceToHost );
cudaMemcpy( E, d_E, N*sizeof(float), cudaMemcpyDeviceToHost );
cudaMemcpy( F, d_F, N*sizeof(float), cudaMemcpyDeviceToHost );
cudaMemcpy( G, d_G, N*sizeof(float), cudaMemcpyDeviceToHost );
cudaMemcpy( H, d_H, N*sizeof(float), cudaMemcpyDeviceToHost );
cudaMemcpy( K, d_K, N*sizeof(float), cudaMemcpyDeviceToHost );
cudaEventElapsedTime( &elapsed_time_ms, start, stop ); // Calculate elapsed time [ms]
cudaEventDestroy(start);
cudaEventDestroy(stop);
// Test 10 first elements
for(int i = 0; i < 10; i++){
bool test1 = ( C[i] == A[i] + B[i] );
bool test2 = ( F[i] == D[i] - E[i] );
bool test3 = ( G[i] == K[i] * H[i] );
printf( "\nC[%i] = A[%i] + B[%i] :%s\n", i, i, i, test1 ? "correct" : "failed");
printf( "F[%i] = D[%i] - E[%i] :%s\n", i, i, i, test2 ? "correct" : "failed");
printf( "G[%i] = K[%i] * H[%i] :%s\n", i, i, i, test3 ? "correct" : "failed");
}
printf("\nElapsed time (GPU : kernel calculate_arrays_GPU) : %f ms\n\n", elapsed_time_ms);
// Free memory (GPU)
cudaFree(d_A);
cudaFree(d_B);
cudaFree(d_C);
cudaFree(d_D);
cudaFree(d_E);
cudaFree(d_F);
cudaFree(d_G);
cudaFree(d_H);
cudaFree(d_K);
// Free memory (CPU)
free(A);
free(B);
free(C);
free(D);
free(E);
free(F);
free(G);
free(H);
free(K);
return 0;
} | .file "tmpxft_00056210_00000000-6_calculate_arrays_GPU_256_en.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3672:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z57__device_stub__Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_iPfS_S_S_S_S_S_S_S_
.type _Z57__device_stub__Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_iPfS_S_S_S_S_S_S_S_, @function
_Z57__device_stub__Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_iPfS_S_S_S_S_S_S_S_:
.LFB3694:
.cfi_startproc
endbr64
subq $248, %rsp
.cfi_def_cfa_offset 256
movl %edi, 76(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movq %rcx, 48(%rsp)
movq %r8, 40(%rsp)
movq %r9, 32(%rsp)
movq 256(%rsp), %rax
movq %rax, 24(%rsp)
movq 264(%rsp), %rax
movq %rax, 16(%rsp)
movq 272(%rsp), %rax
movq %rax, 8(%rsp)
movq 280(%rsp), %rax
movq %rax, (%rsp)
movq %fs:40, %rax
movq %rax, 232(%rsp)
xorl %eax, %eax
leaq 76(%rsp), %rax
movq %rax, 144(%rsp)
leaq 64(%rsp), %rax
movq %rax, 152(%rsp)
leaq 56(%rsp), %rax
movq %rax, 160(%rsp)
leaq 48(%rsp), %rax
movq %rax, 168(%rsp)
leaq 40(%rsp), %rax
movq %rax, 176(%rsp)
leaq 32(%rsp), %rax
movq %rax, 184(%rsp)
leaq 24(%rsp), %rax
movq %rax, 192(%rsp)
leaq 16(%rsp), %rax
movq %rax, 200(%rsp)
leaq 8(%rsp), %rax
movq %rax, 208(%rsp)
movq %rsp, %rax
movq %rax, 216(%rsp)
movl $1, 96(%rsp)
movl $1, 100(%rsp)
movl $1, 104(%rsp)
movl $1, 108(%rsp)
movl $1, 112(%rsp)
movl $1, 116(%rsp)
leaq 88(%rsp), %rcx
leaq 80(%rsp), %rdx
leaq 108(%rsp), %rsi
leaq 96(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 232(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $248, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 88(%rsp)
.cfi_def_cfa_offset 264
pushq 88(%rsp)
.cfi_def_cfa_offset 272
leaq 160(%rsp), %r9
movq 124(%rsp), %rcx
movl 132(%rsp), %r8d
movq 112(%rsp), %rsi
movl 120(%rsp), %edx
leaq _Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 256
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3694:
.size _Z57__device_stub__Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_iPfS_S_S_S_S_S_S_S_, .-_Z57__device_stub__Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_iPfS_S_S_S_S_S_S_S_
.globl _Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_
.type _Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_, @function
_Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_:
.LFB3695:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
pushq 40(%rsp)
.cfi_def_cfa_offset 24
pushq 40(%rsp)
.cfi_def_cfa_offset 32
pushq 40(%rsp)
.cfi_def_cfa_offset 40
pushq 40(%rsp)
.cfi_def_cfa_offset 48
call _Z57__device_stub__Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_iPfS_S_S_S_S_S_S_S_
addq $40, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3695:
.size _Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_, .-_Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "correct"
.LC1:
.string "failed"
.LC3:
.string "\nC[%i] = A[%i] + B[%i] :%s\n"
.LC4:
.string "F[%i] = D[%i] - E[%i] :%s\n"
.LC5:
.string "G[%i] = K[%i] * H[%i] :%s\n"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC6:
.string "\nElapsed time (GPU : kernel calculate_arrays_GPU) : %f ms\n\n"
.text
.globl main
.type main, @function
main:
.LFB3669:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $200, %rsp
.cfi_def_cfa_offset 256
movq %fs:40, %rax
movq %rax, 184(%rsp)
xorl %eax, %eax
leaq 72(%rsp), %rdi
call cudaEventCreate@PLT
leaq 80(%rsp), %rdi
call cudaEventCreate@PLT
movl $4194304, %edi
call malloc@PLT
movq %rax, %r12
movl $4194304, %edi
call malloc@PLT
movq %rax, 8(%rsp)
movl $4194304, %edi
call malloc@PLT
movq %rax, %r13
movl $4194304, %edi
call malloc@PLT
movq %rax, %rbp
movl $4194304, %edi
call malloc@PLT
movq %rax, 16(%rsp)
movl $4194304, %edi
call malloc@PLT
movq %rax, 24(%rsp)
movl $4194304, %edi
call malloc@PLT
movq %rax, 32(%rsp)
movl $4194304, %edi
call malloc@PLT
movq %rax, %r15
movl $4194304, %edi
call malloc@PLT
movq %rax, %r14
leaq 88(%rsp), %rdi
movl $4194304, %esi
call cudaMalloc@PLT
leaq 96(%rsp), %rdi
movl $4194304, %esi
call cudaMalloc@PLT
leaq 104(%rsp), %rdi
movl $4194304, %esi
call cudaMalloc@PLT
leaq 112(%rsp), %rdi
movl $4194304, %esi
call cudaMalloc@PLT
leaq 120(%rsp), %rdi
movl $4194304, %esi
call cudaMalloc@PLT
leaq 128(%rsp), %rdi
movl $4194304, %esi
call cudaMalloc@PLT
leaq 136(%rsp), %rdi
movl $4194304, %esi
call cudaMalloc@PLT
leaq 144(%rsp), %rdi
movl $4194304, %esi
call cudaMalloc@PLT
leaq 152(%rsp), %rdi
movl $4194304, %esi
call cudaMalloc@PLT
movl $0, %ebx
.L12:
call rand@PLT
movslq %eax, %rcx
movq %rcx, %rdx
salq $30, %rdx
addq %rcx, %rdx
sarq $61, %rdx
sarl $31, %eax
subl %eax, %edx
pxor %xmm0, %xmm0
cvtsi2sdl %edx, %xmm0
mulsd .LC2(%rip), %xmm0
cvtsd2ss %xmm0, %xmm0
movss %xmm0, (%r12,%rbx)
call rand@PLT
movslq %eax, %rcx
movq %rcx, %rdx
salq $30, %rdx
addq %rcx, %rdx
sarq $61, %rdx
sarl $31, %eax
subl %eax, %edx
pxor %xmm0, %xmm0
cvtsi2sdl %edx, %xmm0
mulsd .LC2(%rip), %xmm0
cvtsd2ss %xmm0, %xmm0
movq 8(%rsp), %rax
movss %xmm0, (%rax,%rbx)
call rand@PLT
movslq %eax, %rcx
movq %rcx, %rdx
salq $30, %rdx
addq %rcx, %rdx
sarq $61, %rdx
sarl $31, %eax
subl %eax, %edx
pxor %xmm0, %xmm0
cvtsi2sdl %edx, %xmm0
mulsd .LC2(%rip), %xmm0
cvtsd2ss %xmm0, %xmm0
movss %xmm0, 0(%r13,%rbx)
call rand@PLT
movslq %eax, %rcx
movq %rcx, %rdx
salq $30, %rdx
addq %rcx, %rdx
sarq $61, %rdx
sarl $31, %eax
subl %eax, %edx
pxor %xmm0, %xmm0
cvtsi2sdl %edx, %xmm0
mulsd .LC2(%rip), %xmm0
cvtsd2ss %xmm0, %xmm0
movss %xmm0, 0(%rbp,%rbx)
call rand@PLT
movslq %eax, %rcx
movq %rcx, %rdx
salq $30, %rdx
addq %rcx, %rdx
sarq $61, %rdx
sarl $31, %eax
subl %eax, %edx
pxor %xmm0, %xmm0
cvtsi2sdl %edx, %xmm0
mulsd .LC2(%rip), %xmm0
cvtsd2ss %xmm0, %xmm0
movq 16(%rsp), %rax
movss %xmm0, (%rax,%rbx)
call rand@PLT
movslq %eax, %rcx
movq %rcx, %rdx
salq $30, %rdx
addq %rcx, %rdx
sarq $61, %rdx
sarl $31, %eax
subl %eax, %edx
pxor %xmm0, %xmm0
cvtsi2sdl %edx, %xmm0
mulsd .LC2(%rip), %xmm0
cvtsd2ss %xmm0, %xmm0
movq 24(%rsp), %rax
movss %xmm0, (%rax,%rbx)
call rand@PLT
movslq %eax, %rcx
movq %rcx, %rdx
salq $30, %rdx
addq %rcx, %rdx
sarq $61, %rdx
sarl $31, %eax
subl %eax, %edx
pxor %xmm0, %xmm0
cvtsi2sdl %edx, %xmm0
mulsd .LC2(%rip), %xmm0
cvtsd2ss %xmm0, %xmm0
movq 32(%rsp), %rax
movss %xmm0, (%rax,%rbx)
call rand@PLT
movslq %eax, %rcx
movq %rcx, %rdx
salq $30, %rdx
addq %rcx, %rdx
sarq $61, %rdx
sarl $31, %eax
subl %eax, %edx
pxor %xmm0, %xmm0
cvtsi2sdl %edx, %xmm0
mulsd .LC2(%rip), %xmm0
cvtsd2ss %xmm0, %xmm0
movss %xmm0, (%r15,%rbx)
call rand@PLT
movslq %eax, %rcx
movq %rcx, %rdx
salq $30, %rdx
addq %rcx, %rdx
sarq $61, %rdx
sarl $31, %eax
subl %eax, %edx
pxor %xmm0, %xmm0
cvtsi2sdl %edx, %xmm0
mulsd .LC2(%rip), %xmm0
cvtsd2ss %xmm0, %xmm0
movss %xmm0, (%r14,%rbx)
addq $4, %rbx
cmpq $4194304, %rbx
jne .L12
movl $1, %ecx
movl $4194304, %edx
movq %r12, %rsi
movq 88(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $4194304, %edx
movq 8(%rsp), %rsi
movq 96(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $4194304, %edx
movq %r13, %rsi
movq 104(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $4194304, %edx
movq %rbp, %rsi
movq 112(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $4194304, %edx
movq 16(%rsp), %rsi
movq 120(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $4194304, %edx
movq 24(%rsp), %rsi
movq 128(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $4194304, %edx
movq 32(%rsp), %rsi
movq 136(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $4194304, %edx
movq %r15, %rsi
movq 144(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $4194304, %edx
movq %r14, %rsi
movq 152(%rsp), %rdi
call cudaMemcpy@PLT
movl $0, %esi
movq 72(%rsp), %rdi
call cudaEventRecord@PLT
movl $256, 172(%rsp)
movl $1, 176(%rsp)
movl $1, 180(%rsp)
movl $1, 160(%rsp)
movl $1, 164(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 172(%rsp), %rdx
movl $1, %ecx
movq 160(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L31
.L13:
movl $0, %esi
movq 80(%rsp), %rdi
call cudaEventRecord@PLT
movq 80(%rsp), %rdi
call cudaEventSynchronize@PLT
movl $2, %ecx
movl $4194304, %edx
movq 88(%rsp), %rsi
movq %r12, %rdi
call cudaMemcpy@PLT
movl $2, %ecx
movl $4194304, %edx
movq 96(%rsp), %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
movl $2, %ecx
movl $4194304, %edx
movq 104(%rsp), %rsi
movq %r13, %rdi
call cudaMemcpy@PLT
movl $2, %ecx
movl $4194304, %edx
movq 112(%rsp), %rsi
movq %rbp, %rdi
call cudaMemcpy@PLT
movl $2, %ecx
movl $4194304, %edx
movq 120(%rsp), %rsi
movq 16(%rsp), %rdi
call cudaMemcpy@PLT
movl $2, %ecx
movl $4194304, %edx
movq 128(%rsp), %rsi
movq 24(%rsp), %rdi
call cudaMemcpy@PLT
movl $2, %ecx
movl $4194304, %edx
movq 136(%rsp), %rsi
movq 32(%rsp), %rdi
call cudaMemcpy@PLT
movl $2, %ecx
movl $4194304, %edx
movq 144(%rsp), %rsi
movq %r15, %rdi
call cudaMemcpy@PLT
movl $2, %ecx
movl $4194304, %edx
movq 152(%rsp), %rsi
movq %r14, %rdi
call cudaMemcpy@PLT
leaq 172(%rsp), %rdi
movq 80(%rsp), %rdx
movq 72(%rsp), %rsi
call cudaEventElapsedTime@PLT
movq 72(%rsp), %rdi
call cudaEventDestroy@PLT
movq 80(%rsp), %rdi
call cudaEventDestroy@PLT
movl $0, %ebx
movq %r15, 56(%rsp)
jmp .L20
.L31:
pushq 152(%rsp)
.cfi_def_cfa_offset 264
pushq 152(%rsp)
.cfi_def_cfa_offset 272
pushq 152(%rsp)
.cfi_def_cfa_offset 280
pushq 152(%rsp)
.cfi_def_cfa_offset 288
movq 152(%rsp), %r9
movq 144(%rsp), %r8
movq 136(%rsp), %rcx
movq 128(%rsp), %rdx
movq 120(%rsp), %rsi
movl $1048576, %edi
call _Z57__device_stub__Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_iPfS_S_S_S_S_S_S_S_
addq $32, %rsp
.cfi_def_cfa_offset 256
jmp .L13
.L22:
leaq .LC1(%rip), %r9
jmp .L14
.L23:
leaq .LC1(%rip), %r9
jmp .L16
.L24:
leaq .LC1(%rip), %r9
.L18:
movl %r15d, %r8d
movl %r15d, %ecx
movl %r15d, %edx
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $1, %rbx
cmpq $10, %rbx
je .L32
.L20:
movl %ebx, %r15d
movq 24(%rsp), %rax
movss (%rax,%rbx,4), %xmm5
movss %xmm5, 40(%rsp)
movss 0(%rbp,%rbx,4), %xmm0
movq 16(%rsp), %rax
subss (%rax,%rbx,4), %xmm0
movss %xmm0, 44(%rsp)
movq 32(%rsp), %rax
movss (%rax,%rbx,4), %xmm6
movss %xmm6, 48(%rsp)
movss (%r14,%rbx,4), %xmm0
movq 56(%rsp), %rax
mulss (%rax,%rbx,4), %xmm0
movss %xmm0, 52(%rsp)
movss (%r12,%rbx,4), %xmm0
movq 8(%rsp), %rax
addss (%rax,%rbx,4), %xmm0
ucomiss 0(%r13,%rbx,4), %xmm0
jp .L22
leaq .LC0(%rip), %r9
jne .L22
.L14:
movl %r15d, %r8d
movl %r15d, %ecx
movl %r15d, %edx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movss 40(%rsp), %xmm1
movss 44(%rsp), %xmm2
ucomiss %xmm2, %xmm1
jp .L23
leaq .LC0(%rip), %r9
jne .L23
.L16:
movl %r15d, %r8d
movl %r15d, %ecx
movl %r15d, %edx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movss 48(%rsp), %xmm3
movss 52(%rsp), %xmm4
ucomiss %xmm4, %xmm3
jp .L24
leaq .LC0(%rip), %r9
je .L18
jmp .L24
.L32:
movq 56(%rsp), %r15
pxor %xmm0, %xmm0
cvtss2sd 172(%rsp), %xmm0
leaq .LC6(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq 88(%rsp), %rdi
call cudaFree@PLT
movq 96(%rsp), %rdi
call cudaFree@PLT
movq 104(%rsp), %rdi
call cudaFree@PLT
movq 112(%rsp), %rdi
call cudaFree@PLT
movq 120(%rsp), %rdi
call cudaFree@PLT
movq 128(%rsp), %rdi
call cudaFree@PLT
movq 136(%rsp), %rdi
call cudaFree@PLT
movq 144(%rsp), %rdi
call cudaFree@PLT
movq 152(%rsp), %rdi
call cudaFree@PLT
movq %r12, %rdi
call free@PLT
movq 8(%rsp), %rdi
call free@PLT
movq %r13, %rdi
call free@PLT
movq %rbp, %rdi
call free@PLT
movq 16(%rsp), %rdi
call free@PLT
movq 24(%rsp), %rdi
call free@PLT
movq 32(%rsp), %rdi
call free@PLT
movq %r15, %rdi
call free@PLT
movq %r14, %rdi
call free@PLT
movq 184(%rsp), %rax
subq %fs:40, %rax
jne .L33
movl $0, %eax
addq $200, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L33:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3669:
.size main, .-main
.section .rodata.str1.8
.align 8
.LC7:
.string "_Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3697:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC7(%rip), %rdx
movq %rdx, %rcx
leaq _Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3697:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC2:
.long 0
.long 1093567616
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /*
CUDA C program
@author Juan Manuel Tortajada
@mail ai.robotics.inbox@gmail.com
*/
#include <iostream>
#include <sys/time.h>
__global__
void calculate_arrays_GPU( int n, float *A, float *B, float *C, float *D, float *E, float *F, float *G, float *H, float *K ){
int unique_thread_id = ( blockIdx.x * blockDim.x ) + threadIdx.x;
/*
Ensure no thread accesses to memory areas out of each array bounds
(special case in which the length of each array is not multiple of
the number of threads per block)
*/
if(unique_thread_id < n){
C[unique_thread_id] = A[unique_thread_id] + B[unique_thread_id];
F[unique_thread_id] = D[unique_thread_id] - E[unique_thread_id];
G[unique_thread_id] = K[unique_thread_id] * H[unique_thread_id];
}
}
int main(void){
float elapsed_time_ms;
cudaEvent_t start,stop;
cudaEventCreate(&start);
cudaEventCreate(&stop);
int N = 1<<20; // 1 048 574 elements
float *A, *B, *C, *D, *E, *F, *G, *H, *K; // Host's arrays
float *d_A, *d_B, *d_C, *d_D, *d_E, *d_F, *d_G, *d_H, *d_K; // GPU's arrays
// Allocate memory at the Host
A = (float *)malloc( N*sizeof(float) );
B = (float *)malloc( N*sizeof(float) );
C = (float *)malloc( N*sizeof(float) );
D = (float *)malloc( N*sizeof(float) );
E = (float *)malloc( N*sizeof(float) );
F = (float *)malloc( N*sizeof(float) );
G = (float *)malloc( N*sizeof(float) );
H = (float *)malloc( N*sizeof(float) );
K = (float *)malloc( N*sizeof(float) );
// Allocate memory at the Device (GPU)
cudaMalloc( &d_A, N*sizeof(float) );
cudaMalloc( &d_B, N*sizeof(float) );
cudaMalloc( &d_C, N*sizeof(float) );
cudaMalloc( &d_D, N*sizeof(float) );
cudaMalloc( &d_E, N*sizeof(float) );
cudaMalloc( &d_F, N*sizeof(float) );
cudaMalloc( &d_G, N*sizeof(float) );
cudaMalloc( &d_H, N*sizeof(float) );
cudaMalloc( &d_K, N*sizeof(float) );
// Random array initialization([0,1e6])
for(int i = 0; i < N; i++){
A[i] = 1e6 * ( rand()/RAND_MAX );
B[i] = 1e6 * ( rand()/RAND_MAX );
C[i] = 1e6 * ( rand()/RAND_MAX );
D[i] = 1e6 * ( rand()/RAND_MAX );
E[i] = 1e6 * ( rand()/RAND_MAX );
F[i] = 1e6 * ( rand()/RAND_MAX );
G[i] = 1e6 * ( rand()/RAND_MAX );
H[i] = 1e6 * ( rand()/RAND_MAX );
K[i] = 1e6 * ( rand()/RAND_MAX );
}
// Data copy from Host to GPU
cudaMemcpy( d_A, A, N*sizeof(float), cudaMemcpyHostToDevice );
cudaMemcpy( d_B, B, N*sizeof(float), cudaMemcpyHostToDevice );
cudaMemcpy( d_C, C, N*sizeof(float), cudaMemcpyHostToDevice );
cudaMemcpy( d_D, D, N*sizeof(float), cudaMemcpyHostToDevice );
cudaMemcpy( d_E, E, N*sizeof(float), cudaMemcpyHostToDevice );
cudaMemcpy( d_F, F, N*sizeof(float), cudaMemcpyHostToDevice );
cudaMemcpy( d_G, G, N*sizeof(float), cudaMemcpyHostToDevice );
cudaMemcpy( d_H, H, N*sizeof(float), cudaMemcpyHostToDevice );
cudaMemcpy( d_K, K, N*sizeof(float), cudaMemcpyHostToDevice );
cudaEventRecord(start); // Start GPU timer
/*
Number of blocks: 1
Threads per block: 256
*/
calculate_arrays_GPU<<<1, 256>>>( N, d_A, d_B, d_C, d_D, d_E, d_F, d_G, d_H, d_K );
cudaEventRecord(stop); // Stop GPU timer
cudaEventSynchronize(stop); // Wait for the GPU to finish with the data
// Once data is ready, the result is copied from GPU to Host
cudaMemcpy( A, d_A, N*sizeof(float), cudaMemcpyDeviceToHost );
cudaMemcpy( B, d_B, N*sizeof(float), cudaMemcpyDeviceToHost );
cudaMemcpy( C, d_C, N*sizeof(float), cudaMemcpyDeviceToHost );
cudaMemcpy( D, d_D, N*sizeof(float), cudaMemcpyDeviceToHost );
cudaMemcpy( E, d_E, N*sizeof(float), cudaMemcpyDeviceToHost );
cudaMemcpy( F, d_F, N*sizeof(float), cudaMemcpyDeviceToHost );
cudaMemcpy( G, d_G, N*sizeof(float), cudaMemcpyDeviceToHost );
cudaMemcpy( H, d_H, N*sizeof(float), cudaMemcpyDeviceToHost );
cudaMemcpy( K, d_K, N*sizeof(float), cudaMemcpyDeviceToHost );
cudaEventElapsedTime( &elapsed_time_ms, start, stop ); // Calculate elapsed time [ms]
cudaEventDestroy(start);
cudaEventDestroy(stop);
// Test 10 first elements
for(int i = 0; i < 10; i++){
bool test1 = ( C[i] == A[i] + B[i] );
bool test2 = ( F[i] == D[i] - E[i] );
bool test3 = ( G[i] == K[i] * H[i] );
printf( "\nC[%i] = A[%i] + B[%i] :%s\n", i, i, i, test1 ? "correct" : "failed");
printf( "F[%i] = D[%i] - E[%i] :%s\n", i, i, i, test2 ? "correct" : "failed");
printf( "G[%i] = K[%i] * H[%i] :%s\n", i, i, i, test3 ? "correct" : "failed");
}
printf("\nElapsed time (GPU : kernel calculate_arrays_GPU) : %f ms\n\n", elapsed_time_ms);
// Free memory (GPU)
cudaFree(d_A);
cudaFree(d_B);
cudaFree(d_C);
cudaFree(d_D);
cudaFree(d_E);
cudaFree(d_F);
cudaFree(d_G);
cudaFree(d_H);
cudaFree(d_K);
// Free memory (CPU)
free(A);
free(B);
free(C);
free(D);
free(E);
free(F);
free(G);
free(H);
free(K);
return 0;
} | /*
CUDA C program
@author Juan Manuel Tortajada
@mail ai.robotics.inbox@gmail.com
*/
#include <hip/hip_runtime.h>
#include <iostream>
#include <sys/time.h>
__global__
void calculate_arrays_GPU( int n, float *A, float *B, float *C, float *D, float *E, float *F, float *G, float *H, float *K ){
int unique_thread_id = ( blockIdx.x * blockDim.x ) + threadIdx.x;
/*
Ensure no thread accesses to memory areas out of each array bounds
(special case in which the length of each array is not multiple of
the number of threads per block)
*/
if(unique_thread_id < n){
C[unique_thread_id] = A[unique_thread_id] + B[unique_thread_id];
F[unique_thread_id] = D[unique_thread_id] - E[unique_thread_id];
G[unique_thread_id] = K[unique_thread_id] * H[unique_thread_id];
}
}
int main(void){
float elapsed_time_ms;
hipEvent_t start,stop;
hipEventCreate(&start);
hipEventCreate(&stop);
int N = 1<<20; // 1 048 574 elements
float *A, *B, *C, *D, *E, *F, *G, *H, *K; // Host's arrays
float *d_A, *d_B, *d_C, *d_D, *d_E, *d_F, *d_G, *d_H, *d_K; // GPU's arrays
// Allocate memory at the Host
A = (float *)malloc( N*sizeof(float) );
B = (float *)malloc( N*sizeof(float) );
C = (float *)malloc( N*sizeof(float) );
D = (float *)malloc( N*sizeof(float) );
E = (float *)malloc( N*sizeof(float) );
F = (float *)malloc( N*sizeof(float) );
G = (float *)malloc( N*sizeof(float) );
H = (float *)malloc( N*sizeof(float) );
K = (float *)malloc( N*sizeof(float) );
// Allocate memory at the Device (GPU)
hipMalloc( &d_A, N*sizeof(float) );
hipMalloc( &d_B, N*sizeof(float) );
hipMalloc( &d_C, N*sizeof(float) );
hipMalloc( &d_D, N*sizeof(float) );
hipMalloc( &d_E, N*sizeof(float) );
hipMalloc( &d_F, N*sizeof(float) );
hipMalloc( &d_G, N*sizeof(float) );
hipMalloc( &d_H, N*sizeof(float) );
hipMalloc( &d_K, N*sizeof(float) );
// Random array initialization([0,1e6])
for(int i = 0; i < N; i++){
A[i] = 1e6 * ( rand()/RAND_MAX );
B[i] = 1e6 * ( rand()/RAND_MAX );
C[i] = 1e6 * ( rand()/RAND_MAX );
D[i] = 1e6 * ( rand()/RAND_MAX );
E[i] = 1e6 * ( rand()/RAND_MAX );
F[i] = 1e6 * ( rand()/RAND_MAX );
G[i] = 1e6 * ( rand()/RAND_MAX );
H[i] = 1e6 * ( rand()/RAND_MAX );
K[i] = 1e6 * ( rand()/RAND_MAX );
}
// Data copy from Host to GPU
hipMemcpy( d_A, A, N*sizeof(float), hipMemcpyHostToDevice );
hipMemcpy( d_B, B, N*sizeof(float), hipMemcpyHostToDevice );
hipMemcpy( d_C, C, N*sizeof(float), hipMemcpyHostToDevice );
hipMemcpy( d_D, D, N*sizeof(float), hipMemcpyHostToDevice );
hipMemcpy( d_E, E, N*sizeof(float), hipMemcpyHostToDevice );
hipMemcpy( d_F, F, N*sizeof(float), hipMemcpyHostToDevice );
hipMemcpy( d_G, G, N*sizeof(float), hipMemcpyHostToDevice );
hipMemcpy( d_H, H, N*sizeof(float), hipMemcpyHostToDevice );
hipMemcpy( d_K, K, N*sizeof(float), hipMemcpyHostToDevice );
hipEventRecord(start); // Start GPU timer
/*
Number of blocks: 1
Threads per block: 256
*/
calculate_arrays_GPU<<<1, 256>>>( N, d_A, d_B, d_C, d_D, d_E, d_F, d_G, d_H, d_K );
hipEventRecord(stop); // Stop GPU timer
hipEventSynchronize(stop); // Wait for the GPU to finish with the data
// Once data is ready, the result is copied from GPU to Host
hipMemcpy( A, d_A, N*sizeof(float), hipMemcpyDeviceToHost );
hipMemcpy( B, d_B, N*sizeof(float), hipMemcpyDeviceToHost );
hipMemcpy( C, d_C, N*sizeof(float), hipMemcpyDeviceToHost );
hipMemcpy( D, d_D, N*sizeof(float), hipMemcpyDeviceToHost );
hipMemcpy( E, d_E, N*sizeof(float), hipMemcpyDeviceToHost );
hipMemcpy( F, d_F, N*sizeof(float), hipMemcpyDeviceToHost );
hipMemcpy( G, d_G, N*sizeof(float), hipMemcpyDeviceToHost );
hipMemcpy( H, d_H, N*sizeof(float), hipMemcpyDeviceToHost );
hipMemcpy( K, d_K, N*sizeof(float), hipMemcpyDeviceToHost );
hipEventElapsedTime( &elapsed_time_ms, start, stop ); // Calculate elapsed time [ms]
hipEventDestroy(start);
hipEventDestroy(stop);
// Test 10 first elements
for(int i = 0; i < 10; i++){
bool test1 = ( C[i] == A[i] + B[i] );
bool test2 = ( F[i] == D[i] - E[i] );
bool test3 = ( G[i] == K[i] * H[i] );
printf( "\nC[%i] = A[%i] + B[%i] :%s\n", i, i, i, test1 ? "correct" : "failed");
printf( "F[%i] = D[%i] - E[%i] :%s\n", i, i, i, test2 ? "correct" : "failed");
printf( "G[%i] = K[%i] * H[%i] :%s\n", i, i, i, test3 ? "correct" : "failed");
}
printf("\nElapsed time (GPU : kernel calculate_arrays_GPU) : %f ms\n\n", elapsed_time_ms);
// Free memory (GPU)
hipFree(d_A);
hipFree(d_B);
hipFree(d_C);
hipFree(d_D);
hipFree(d_E);
hipFree(d_F);
hipFree(d_G);
hipFree(d_H);
hipFree(d_K);
// Free memory (CPU)
free(A);
free(B);
free(C);
free(D);
free(E);
free(F);
free(G);
free(H);
free(K);
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | /*
CUDA C program
@author Juan Manuel Tortajada
@mail ai.robotics.inbox@gmail.com
*/
#include <hip/hip_runtime.h>
#include <iostream>
#include <sys/time.h>
__global__
void calculate_arrays_GPU( int n, float *A, float *B, float *C, float *D, float *E, float *F, float *G, float *H, float *K ){
int unique_thread_id = ( blockIdx.x * blockDim.x ) + threadIdx.x;
/*
Ensure no thread accesses to memory areas out of each array bounds
(special case in which the length of each array is not multiple of
the number of threads per block)
*/
if(unique_thread_id < n){
C[unique_thread_id] = A[unique_thread_id] + B[unique_thread_id];
F[unique_thread_id] = D[unique_thread_id] - E[unique_thread_id];
G[unique_thread_id] = K[unique_thread_id] * H[unique_thread_id];
}
}
int main(void){
float elapsed_time_ms;
hipEvent_t start,stop;
hipEventCreate(&start);
hipEventCreate(&stop);
int N = 1<<20; // 1 048 574 elements
float *A, *B, *C, *D, *E, *F, *G, *H, *K; // Host's arrays
float *d_A, *d_B, *d_C, *d_D, *d_E, *d_F, *d_G, *d_H, *d_K; // GPU's arrays
// Allocate memory at the Host
A = (float *)malloc( N*sizeof(float) );
B = (float *)malloc( N*sizeof(float) );
C = (float *)malloc( N*sizeof(float) );
D = (float *)malloc( N*sizeof(float) );
E = (float *)malloc( N*sizeof(float) );
F = (float *)malloc( N*sizeof(float) );
G = (float *)malloc( N*sizeof(float) );
H = (float *)malloc( N*sizeof(float) );
K = (float *)malloc( N*sizeof(float) );
// Allocate memory at the Device (GPU)
hipMalloc( &d_A, N*sizeof(float) );
hipMalloc( &d_B, N*sizeof(float) );
hipMalloc( &d_C, N*sizeof(float) );
hipMalloc( &d_D, N*sizeof(float) );
hipMalloc( &d_E, N*sizeof(float) );
hipMalloc( &d_F, N*sizeof(float) );
hipMalloc( &d_G, N*sizeof(float) );
hipMalloc( &d_H, N*sizeof(float) );
hipMalloc( &d_K, N*sizeof(float) );
// Random array initialization([0,1e6])
for(int i = 0; i < N; i++){
A[i] = 1e6 * ( rand()/RAND_MAX );
B[i] = 1e6 * ( rand()/RAND_MAX );
C[i] = 1e6 * ( rand()/RAND_MAX );
D[i] = 1e6 * ( rand()/RAND_MAX );
E[i] = 1e6 * ( rand()/RAND_MAX );
F[i] = 1e6 * ( rand()/RAND_MAX );
G[i] = 1e6 * ( rand()/RAND_MAX );
H[i] = 1e6 * ( rand()/RAND_MAX );
K[i] = 1e6 * ( rand()/RAND_MAX );
}
// Data copy from Host to GPU
hipMemcpy( d_A, A, N*sizeof(float), hipMemcpyHostToDevice );
hipMemcpy( d_B, B, N*sizeof(float), hipMemcpyHostToDevice );
hipMemcpy( d_C, C, N*sizeof(float), hipMemcpyHostToDevice );
hipMemcpy( d_D, D, N*sizeof(float), hipMemcpyHostToDevice );
hipMemcpy( d_E, E, N*sizeof(float), hipMemcpyHostToDevice );
hipMemcpy( d_F, F, N*sizeof(float), hipMemcpyHostToDevice );
hipMemcpy( d_G, G, N*sizeof(float), hipMemcpyHostToDevice );
hipMemcpy( d_H, H, N*sizeof(float), hipMemcpyHostToDevice );
hipMemcpy( d_K, K, N*sizeof(float), hipMemcpyHostToDevice );
hipEventRecord(start); // Start GPU timer
/*
Number of blocks: 1
Threads per block: 256
*/
calculate_arrays_GPU<<<1, 256>>>( N, d_A, d_B, d_C, d_D, d_E, d_F, d_G, d_H, d_K );
hipEventRecord(stop); // Stop GPU timer
hipEventSynchronize(stop); // Wait for the GPU to finish with the data
// Once data is ready, the result is copied from GPU to Host
hipMemcpy( A, d_A, N*sizeof(float), hipMemcpyDeviceToHost );
hipMemcpy( B, d_B, N*sizeof(float), hipMemcpyDeviceToHost );
hipMemcpy( C, d_C, N*sizeof(float), hipMemcpyDeviceToHost );
hipMemcpy( D, d_D, N*sizeof(float), hipMemcpyDeviceToHost );
hipMemcpy( E, d_E, N*sizeof(float), hipMemcpyDeviceToHost );
hipMemcpy( F, d_F, N*sizeof(float), hipMemcpyDeviceToHost );
hipMemcpy( G, d_G, N*sizeof(float), hipMemcpyDeviceToHost );
hipMemcpy( H, d_H, N*sizeof(float), hipMemcpyDeviceToHost );
hipMemcpy( K, d_K, N*sizeof(float), hipMemcpyDeviceToHost );
hipEventElapsedTime( &elapsed_time_ms, start, stop ); // Calculate elapsed time [ms]
hipEventDestroy(start);
hipEventDestroy(stop);
// Test 10 first elements
for(int i = 0; i < 10; i++){
bool test1 = ( C[i] == A[i] + B[i] );
bool test2 = ( F[i] == D[i] - E[i] );
bool test3 = ( G[i] == K[i] * H[i] );
printf( "\nC[%i] = A[%i] + B[%i] :%s\n", i, i, i, test1 ? "correct" : "failed");
printf( "F[%i] = D[%i] - E[%i] :%s\n", i, i, i, test2 ? "correct" : "failed");
printf( "G[%i] = K[%i] * H[%i] :%s\n", i, i, i, test3 ? "correct" : "failed");
}
printf("\nElapsed time (GPU : kernel calculate_arrays_GPU) : %f ms\n\n", elapsed_time_ms);
// Free memory (GPU)
hipFree(d_A);
hipFree(d_B);
hipFree(d_C);
hipFree(d_D);
hipFree(d_E);
hipFree(d_F);
hipFree(d_G);
hipFree(d_H);
hipFree(d_K);
// Free memory (CPU)
free(A);
free(B);
free(C);
free(D);
free(E);
free(F);
free(G);
free(H);
free(K);
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_
.globl _Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_
.p2align 8
.type _Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_,@function
_Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x5c
s_load_b32 s3, s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_2
s_load_b256 s[4:11], s[0:1], 0x8
v_ashrrev_i32_e32 v2, 31, v1
s_clause 0x1
s_load_b256 s[12:19], s[0:1], 0x28
s_load_b64 s[0:1], s[0:1], 0x48
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
global_load_b32 v6, v[2:3], off
global_load_b32 v7, v[4:5], off
v_add_co_u32 v2, vcc_lo, s8, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s9, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s10, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s11, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_f32_e32 v8, v6, v7
v_add_co_u32 v6, vcc_lo, s12, v0
v_add_co_ci_u32_e32 v7, vcc_lo, s13, v1, vcc_lo
global_store_b32 v[2:3], v8, off
global_load_b32 v8, v[4:5], off
global_load_b32 v6, v[6:7], off
v_add_co_u32 v2, vcc_lo, s14, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s15, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_sub_f32_e32 v8, v8, v6
v_add_co_u32 v6, vcc_lo, s18, v0
v_add_co_ci_u32_e32 v7, vcc_lo, s19, v1, vcc_lo
global_store_b32 v[2:3], v8, off
global_load_b32 v2, v[4:5], off
global_load_b32 v3, v[6:7], off
v_add_co_u32 v0, vcc_lo, s16, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s17, v1, vcc_lo
s_waitcnt vmcnt(0)
v_mul_f32_e32 v2, v2, v3
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 336
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 9
.amdhsa_next_free_sgpr 20
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_, .Lfunc_end0-_Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .offset: 0
.size: 4
.value_kind: by_value
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 24
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 32
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 40
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 48
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 56
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 64
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 72
.size: 8
.value_kind: global_buffer
- .offset: 80
.size: 4
.value_kind: hidden_block_count_x
- .offset: 84
.size: 4
.value_kind: hidden_block_count_y
- .offset: 88
.size: 4
.value_kind: hidden_block_count_z
- .offset: 92
.size: 2
.value_kind: hidden_group_size_x
- .offset: 94
.size: 2
.value_kind: hidden_group_size_y
- .offset: 96
.size: 2
.value_kind: hidden_group_size_z
- .offset: 98
.size: 2
.value_kind: hidden_remainder_x
- .offset: 100
.size: 2
.value_kind: hidden_remainder_y
- .offset: 102
.size: 2
.value_kind: hidden_remainder_z
- .offset: 120
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 128
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 136
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 144
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 336
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_
.private_segment_fixed_size: 0
.sgpr_count: 22
.sgpr_spill_count: 0
.symbol: _Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 9
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | /*
CUDA C program
@author Juan Manuel Tortajada
@mail ai.robotics.inbox@gmail.com
*/
#include <hip/hip_runtime.h>
#include <iostream>
#include <sys/time.h>
__global__
void calculate_arrays_GPU( int n, float *A, float *B, float *C, float *D, float *E, float *F, float *G, float *H, float *K ){
int unique_thread_id = ( blockIdx.x * blockDim.x ) + threadIdx.x;
/*
Ensure no thread accesses to memory areas out of each array bounds
(special case in which the length of each array is not multiple of
the number of threads per block)
*/
if(unique_thread_id < n){
C[unique_thread_id] = A[unique_thread_id] + B[unique_thread_id];
F[unique_thread_id] = D[unique_thread_id] - E[unique_thread_id];
G[unique_thread_id] = K[unique_thread_id] * H[unique_thread_id];
}
}
int main(void){
float elapsed_time_ms;
hipEvent_t start,stop;
hipEventCreate(&start);
hipEventCreate(&stop);
int N = 1<<20; // 1 048 574 elements
float *A, *B, *C, *D, *E, *F, *G, *H, *K; // Host's arrays
float *d_A, *d_B, *d_C, *d_D, *d_E, *d_F, *d_G, *d_H, *d_K; // GPU's arrays
// Allocate memory at the Host
A = (float *)malloc( N*sizeof(float) );
B = (float *)malloc( N*sizeof(float) );
C = (float *)malloc( N*sizeof(float) );
D = (float *)malloc( N*sizeof(float) );
E = (float *)malloc( N*sizeof(float) );
F = (float *)malloc( N*sizeof(float) );
G = (float *)malloc( N*sizeof(float) );
H = (float *)malloc( N*sizeof(float) );
K = (float *)malloc( N*sizeof(float) );
// Allocate memory at the Device (GPU)
hipMalloc( &d_A, N*sizeof(float) );
hipMalloc( &d_B, N*sizeof(float) );
hipMalloc( &d_C, N*sizeof(float) );
hipMalloc( &d_D, N*sizeof(float) );
hipMalloc( &d_E, N*sizeof(float) );
hipMalloc( &d_F, N*sizeof(float) );
hipMalloc( &d_G, N*sizeof(float) );
hipMalloc( &d_H, N*sizeof(float) );
hipMalloc( &d_K, N*sizeof(float) );
// Random array initialization([0,1e6])
for(int i = 0; i < N; i++){
A[i] = 1e6 * ( rand()/RAND_MAX );
B[i] = 1e6 * ( rand()/RAND_MAX );
C[i] = 1e6 * ( rand()/RAND_MAX );
D[i] = 1e6 * ( rand()/RAND_MAX );
E[i] = 1e6 * ( rand()/RAND_MAX );
F[i] = 1e6 * ( rand()/RAND_MAX );
G[i] = 1e6 * ( rand()/RAND_MAX );
H[i] = 1e6 * ( rand()/RAND_MAX );
K[i] = 1e6 * ( rand()/RAND_MAX );
}
// Data copy from Host to GPU
hipMemcpy( d_A, A, N*sizeof(float), hipMemcpyHostToDevice );
hipMemcpy( d_B, B, N*sizeof(float), hipMemcpyHostToDevice );
hipMemcpy( d_C, C, N*sizeof(float), hipMemcpyHostToDevice );
hipMemcpy( d_D, D, N*sizeof(float), hipMemcpyHostToDevice );
hipMemcpy( d_E, E, N*sizeof(float), hipMemcpyHostToDevice );
hipMemcpy( d_F, F, N*sizeof(float), hipMemcpyHostToDevice );
hipMemcpy( d_G, G, N*sizeof(float), hipMemcpyHostToDevice );
hipMemcpy( d_H, H, N*sizeof(float), hipMemcpyHostToDevice );
hipMemcpy( d_K, K, N*sizeof(float), hipMemcpyHostToDevice );
hipEventRecord(start); // Start GPU timer
/*
Number of blocks: 1
Threads per block: 256
*/
calculate_arrays_GPU<<<1, 256>>>( N, d_A, d_B, d_C, d_D, d_E, d_F, d_G, d_H, d_K );
hipEventRecord(stop); // Stop GPU timer
hipEventSynchronize(stop); // Wait for the GPU to finish with the data
// Once data is ready, the result is copied from GPU to Host
hipMemcpy( A, d_A, N*sizeof(float), hipMemcpyDeviceToHost );
hipMemcpy( B, d_B, N*sizeof(float), hipMemcpyDeviceToHost );
hipMemcpy( C, d_C, N*sizeof(float), hipMemcpyDeviceToHost );
hipMemcpy( D, d_D, N*sizeof(float), hipMemcpyDeviceToHost );
hipMemcpy( E, d_E, N*sizeof(float), hipMemcpyDeviceToHost );
hipMemcpy( F, d_F, N*sizeof(float), hipMemcpyDeviceToHost );
hipMemcpy( G, d_G, N*sizeof(float), hipMemcpyDeviceToHost );
hipMemcpy( H, d_H, N*sizeof(float), hipMemcpyDeviceToHost );
hipMemcpy( K, d_K, N*sizeof(float), hipMemcpyDeviceToHost );
hipEventElapsedTime( &elapsed_time_ms, start, stop ); // Calculate elapsed time [ms]
hipEventDestroy(start);
hipEventDestroy(stop);
// Test 10 first elements
for(int i = 0; i < 10; i++){
bool test1 = ( C[i] == A[i] + B[i] );
bool test2 = ( F[i] == D[i] - E[i] );
bool test3 = ( G[i] == K[i] * H[i] );
printf( "\nC[%i] = A[%i] + B[%i] :%s\n", i, i, i, test1 ? "correct" : "failed");
printf( "F[%i] = D[%i] - E[%i] :%s\n", i, i, i, test2 ? "correct" : "failed");
printf( "G[%i] = K[%i] * H[%i] :%s\n", i, i, i, test3 ? "correct" : "failed");
}
printf("\nElapsed time (GPU : kernel calculate_arrays_GPU) : %f ms\n\n", elapsed_time_ms);
// Free memory (GPU)
hipFree(d_A);
hipFree(d_B);
hipFree(d_C);
hipFree(d_D);
hipFree(d_E);
hipFree(d_F);
hipFree(d_G);
hipFree(d_H);
hipFree(d_K);
// Free memory (CPU)
free(A);
free(B);
free(C);
free(D);
free(E);
free(F);
free(G);
free(H);
free(K);
return 0;
} | .text
.file "calculate_arrays_GPU_256_en.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z35__device_stub__calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_ # -- Begin function _Z35__device_stub__calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_
.p2align 4, 0x90
.type _Z35__device_stub__calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_,@function
_Z35__device_stub__calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_: # @_Z35__device_stub__calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_
.cfi_startproc
# %bb.0:
subq $184, %rsp
.cfi_def_cfa_offset 192
movl %edi, 4(%rsp)
movq %rsi, 88(%rsp)
movq %rdx, 80(%rsp)
movq %rcx, 72(%rsp)
movq %r8, 64(%rsp)
movq %r9, 56(%rsp)
leaq 4(%rsp), %rax
movq %rax, 96(%rsp)
leaq 88(%rsp), %rax
movq %rax, 104(%rsp)
leaq 80(%rsp), %rax
movq %rax, 112(%rsp)
leaq 72(%rsp), %rax
movq %rax, 120(%rsp)
leaq 64(%rsp), %rax
movq %rax, 128(%rsp)
leaq 56(%rsp), %rax
movq %rax, 136(%rsp)
leaq 192(%rsp), %rax
movq %rax, 144(%rsp)
leaq 200(%rsp), %rax
movq %rax, 152(%rsp)
leaq 208(%rsp), %rax
movq %rax, 160(%rsp)
leaq 216(%rsp), %rax
movq %rax, 168(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $200, %rsp
.cfi_adjust_cfa_offset -200
retq
.Lfunc_end0:
.size _Z35__device_stub__calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_, .Lfunc_end0-_Z35__device_stub__calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI1_0:
.quad 0x412e848000000000 # double 1.0E+6
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $360, %rsp # imm = 0x168
.cfi_def_cfa_offset 416
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
leaq 120(%rsp), %rdi
callq hipEventCreate
leaq 112(%rsp), %rdi
callq hipEventCreate
movl $4194304, %edi # imm = 0x400000
callq malloc
movq %rax, %r13
movl $4194304, %edi # imm = 0x400000
callq malloc
movq %rax, %r14
movl $4194304, %edi # imm = 0x400000
callq malloc
movq %rax, %r15
movl $4194304, %edi # imm = 0x400000
callq malloc
movq %rax, %rbx
movl $4194304, %edi # imm = 0x400000
callq malloc
movq %rax, %rbp
movl $4194304, %edi # imm = 0x400000
callq malloc
movq %rax, 32(%rsp) # 8-byte Spill
movl $4194304, %edi # imm = 0x400000
callq malloc
movq %rax, 24(%rsp) # 8-byte Spill
movl $4194304, %edi # imm = 0x400000
callq malloc
movq %rax, 16(%rsp) # 8-byte Spill
movl $4194304, %edi # imm = 0x400000
callq malloc
movq %rax, 8(%rsp) # 8-byte Spill
leaq 104(%rsp), %rdi
movl $4194304, %esi # imm = 0x400000
callq hipMalloc
leaq 96(%rsp), %rdi
movl $4194304, %esi # imm = 0x400000
callq hipMalloc
leaq 88(%rsp), %rdi
movl $4194304, %esi # imm = 0x400000
callq hipMalloc
leaq 80(%rsp), %rdi
movl $4194304, %esi # imm = 0x400000
callq hipMalloc
leaq 72(%rsp), %rdi
movl $4194304, %esi # imm = 0x400000
callq hipMalloc
leaq 64(%rsp), %rdi
movl $4194304, %esi # imm = 0x400000
callq hipMalloc
leaq 56(%rsp), %rdi
movl $4194304, %esi # imm = 0x400000
callq hipMalloc
leaq 48(%rsp), %rdi
movl $4194304, %esi # imm = 0x400000
callq hipMalloc
leaq 40(%rsp), %rdi
movl $4194304, %esi # imm = 0x400000
callq hipMalloc
xorl %r12d, %r12d
.p2align 4, 0x90
.LBB1_1: # =>This Inner Loop Header: Depth=1
callq rand
cltq
movq %rax, %rcx
shlq $30, %rcx
addq %rax, %rcx
movq %rcx, %rax
shrq $63, %rax
sarq $61, %rcx
addl %eax, %ecx
xorps %xmm0, %xmm0
cvtsi2sd %ecx, %xmm0
movsd .LCPI1_0(%rip), %xmm1 # xmm1 = mem[0],zero
mulsd %xmm1, %xmm0
cvtsd2ss %xmm0, %xmm0
movss %xmm0, (%r13,%r12)
callq rand
cltq
movq %rax, %rcx
shlq $30, %rcx
addq %rax, %rcx
movq %rcx, %rax
shrq $63, %rax
sarq $61, %rcx
addl %eax, %ecx
xorps %xmm0, %xmm0
cvtsi2sd %ecx, %xmm0
mulsd .LCPI1_0(%rip), %xmm0
cvtsd2ss %xmm0, %xmm0
movss %xmm0, (%r14,%r12)
callq rand
cltq
movq %rax, %rcx
shlq $30, %rcx
addq %rax, %rcx
movq %rcx, %rax
shrq $63, %rax
sarq $61, %rcx
addl %eax, %ecx
xorps %xmm0, %xmm0
cvtsi2sd %ecx, %xmm0
mulsd .LCPI1_0(%rip), %xmm0
cvtsd2ss %xmm0, %xmm0
movss %xmm0, (%r15,%r12)
callq rand
cltq
movq %rax, %rcx
shlq $30, %rcx
addq %rax, %rcx
movq %rcx, %rax
shrq $63, %rax
sarq $61, %rcx
addl %eax, %ecx
xorps %xmm0, %xmm0
cvtsi2sd %ecx, %xmm0
mulsd .LCPI1_0(%rip), %xmm0
cvtsd2ss %xmm0, %xmm0
movss %xmm0, (%rbx,%r12)
callq rand
cltq
movq %rax, %rcx
shlq $30, %rcx
addq %rax, %rcx
movq %rcx, %rax
shrq $63, %rax
sarq $61, %rcx
addl %eax, %ecx
xorps %xmm0, %xmm0
cvtsi2sd %ecx, %xmm0
mulsd .LCPI1_0(%rip), %xmm0
cvtsd2ss %xmm0, %xmm0
movss %xmm0, (%rbp,%r12)
callq rand
cltq
movq %rax, %rcx
shlq $30, %rcx
addq %rax, %rcx
movq %rcx, %rax
shrq $63, %rax
sarq $61, %rcx
addl %eax, %ecx
xorps %xmm0, %xmm0
cvtsi2sd %ecx, %xmm0
mulsd .LCPI1_0(%rip), %xmm0
cvtsd2ss %xmm0, %xmm0
movq 32(%rsp), %rax # 8-byte Reload
movss %xmm0, (%rax,%r12)
callq rand
cltq
movq %rax, %rcx
shlq $30, %rcx
addq %rax, %rcx
movq %rcx, %rax
shrq $63, %rax
sarq $61, %rcx
addl %eax, %ecx
xorps %xmm0, %xmm0
cvtsi2sd %ecx, %xmm0
mulsd .LCPI1_0(%rip), %xmm0
cvtsd2ss %xmm0, %xmm0
movq 24(%rsp), %rax # 8-byte Reload
movss %xmm0, (%rax,%r12)
callq rand
cltq
movq %rax, %rcx
shlq $30, %rcx
addq %rax, %rcx
movq %rcx, %rax
shrq $63, %rax
sarq $61, %rcx
addl %eax, %ecx
xorps %xmm0, %xmm0
cvtsi2sd %ecx, %xmm0
mulsd .LCPI1_0(%rip), %xmm0
cvtsd2ss %xmm0, %xmm0
movq 16(%rsp), %rax # 8-byte Reload
movss %xmm0, (%rax,%r12)
callq rand
cltq
movq %rax, %rcx
shlq $30, %rcx
addq %rax, %rcx
movq %rcx, %rax
shrq $63, %rax
sarq $61, %rcx
addl %eax, %ecx
xorps %xmm0, %xmm0
cvtsi2sd %ecx, %xmm0
mulsd .LCPI1_0(%rip), %xmm0
cvtsd2ss %xmm0, %xmm0
movq 8(%rsp), %rax # 8-byte Reload
movss %xmm0, (%rax,%r12)
addq $4, %r12
cmpq $4194304, %r12 # imm = 0x400000
jne .LBB1_1
# %bb.2:
movq 104(%rsp), %rdi
movl $4194304, %edx # imm = 0x400000
movq %r13, %rsi
movl $1, %ecx
callq hipMemcpy
movq 96(%rsp), %rdi
movl $4194304, %edx # imm = 0x400000
movq %r14, %rsi
movl $1, %ecx
callq hipMemcpy
movq 88(%rsp), %rdi
movl $4194304, %edx # imm = 0x400000
movq %r15, %rsi
movl $1, %ecx
callq hipMemcpy
movq 80(%rsp), %rdi
movl $4194304, %edx # imm = 0x400000
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
movq 72(%rsp), %rdi
movl $4194304, %edx # imm = 0x400000
movq %rbp, %rsi
movl $1, %ecx
callq hipMemcpy
movq 64(%rsp), %rdi
movl $4194304, %edx # imm = 0x400000
movq 32(%rsp), %r12 # 8-byte Reload
movq %r12, %rsi
movl $1, %ecx
callq hipMemcpy
movq 56(%rsp), %rdi
movl $4194304, %edx # imm = 0x400000
movq 24(%rsp), %rsi # 8-byte Reload
movl $1, %ecx
callq hipMemcpy
movq 48(%rsp), %rdi
movl $4194304, %edx # imm = 0x400000
movq 16(%rsp), %rsi # 8-byte Reload
movl $1, %ecx
callq hipMemcpy
movq 40(%rsp), %rdi
movl $4194304, %edx # imm = 0x400000
movq 8(%rsp), %rsi # 8-byte Reload
movl $1, %ecx
callq hipMemcpy
movq 120(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movabsq $4294967297, %rdi # imm = 0x100000001
leaq 255(%rdi), %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_4
# %bb.3:
movq 104(%rsp), %rax
movq 96(%rsp), %rcx
movq 88(%rsp), %rdx
movq 80(%rsp), %rsi
movq 72(%rsp), %rdi
movq 64(%rsp), %r8
movq 56(%rsp), %r9
movq 48(%rsp), %r10
movq 40(%rsp), %r11
movl $1048576, 132(%rsp) # imm = 0x100000
movq %rax, 264(%rsp)
movq %rcx, 256(%rsp)
movq %rdx, 248(%rsp)
movq %rsi, 240(%rsp)
movq %rdi, 232(%rsp)
movq %r8, 224(%rsp)
movq %r9, 216(%rsp)
movq %r10, 208(%rsp)
movq %r11, 200(%rsp)
leaq 132(%rsp), %rax
movq %rax, 272(%rsp)
leaq 264(%rsp), %rax
movq %rax, 280(%rsp)
leaq 256(%rsp), %rax
movq %rax, 288(%rsp)
leaq 248(%rsp), %rax
movq %rax, 296(%rsp)
leaq 240(%rsp), %rax
movq %rax, 304(%rsp)
leaq 232(%rsp), %rax
movq %rax, 312(%rsp)
leaq 224(%rsp), %rax
movq %rax, 320(%rsp)
leaq 216(%rsp), %rax
movq %rax, 328(%rsp)
leaq 208(%rsp), %rax
movq %rax, 336(%rsp)
leaq 200(%rsp), %rax
movq %rax, 344(%rsp)
leaq 184(%rsp), %rdi
leaq 168(%rsp), %rsi
leaq 160(%rsp), %rdx
leaq 152(%rsp), %rcx
callq __hipPopCallConfiguration
movq 184(%rsp), %rsi
movl 192(%rsp), %edx
movq 168(%rsp), %rcx
movl 176(%rsp), %r8d
leaq 272(%rsp), %r9
movl $_Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_, %edi
pushq 152(%rsp)
.cfi_adjust_cfa_offset 8
pushq 168(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_4:
movq 112(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq 112(%rsp), %rdi
callq hipEventSynchronize
movq 104(%rsp), %rsi
movl $4194304, %edx # imm = 0x400000
movq %r13, %rdi
movl $2, %ecx
callq hipMemcpy
movq 96(%rsp), %rsi
movl $4194304, %edx # imm = 0x400000
movq %r14, %rdi
movl $2, %ecx
callq hipMemcpy
movq 88(%rsp), %rsi
movl $4194304, %edx # imm = 0x400000
movq %r15, %rdi
movl $2, %ecx
callq hipMemcpy
movq 80(%rsp), %rsi
movl $4194304, %edx # imm = 0x400000
movq %rbx, %rdi
movl $2, %ecx
callq hipMemcpy
movq 72(%rsp), %rsi
movl $4194304, %edx # imm = 0x400000
movq %rbp, %rdi
movl $2, %ecx
callq hipMemcpy
movq 64(%rsp), %rsi
movl $4194304, %edx # imm = 0x400000
movq %r12, %rdi
movl $2, %ecx
callq hipMemcpy
movq 56(%rsp), %rsi
movl $4194304, %edx # imm = 0x400000
movq 24(%rsp), %rdi # 8-byte Reload
movl $2, %ecx
callq hipMemcpy
movq 48(%rsp), %rsi
movl $4194304, %edx # imm = 0x400000
movq 16(%rsp), %rdi # 8-byte Reload
movl $2, %ecx
callq hipMemcpy
movq 40(%rsp), %rsi
movl $4194304, %edx # imm = 0x400000
movq 8(%rsp), %rdi # 8-byte Reload
movl $2, %ecx
callq hipMemcpy
movq 120(%rsp), %rsi
movq 112(%rsp), %rdx
leaq 272(%rsp), %rdi
callq hipEventElapsedTime
movq 120(%rsp), %rdi
callq hipEventDestroy
movq 112(%rsp), %rdi
callq hipEventDestroy
xorl %r12d, %r12d
movq %rbx, 144(%rsp) # 8-byte Spill
movq %r15, 136(%rsp) # 8-byte Spill
.p2align 4, 0x90
.LBB1_5: # =>This Inner Loop Header: Depth=1
movss (%r13,%r12,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
addss (%r14,%r12,4), %xmm0
ucomiss (%r15,%r12,4), %xmm0
movss (%rbx,%r12,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
subss (%rbp,%r12,4), %xmm0
movq 8(%rsp), %rax # 8-byte Reload
movss (%rax,%r12,4), %xmm1 # xmm1 = mem[0],zero,zero,zero
movq 16(%rsp), %rax # 8-byte Reload
mulss (%rax,%r12,4), %xmm1
movl $.L.str.1, %r8d
movl $.L.str.2, %ecx
cmovneq %rcx, %r8
cmovpq %rcx, %r8
movq 24(%rsp), %rax # 8-byte Reload
ucomiss (%rax,%r12,4), %xmm1
movq %r14, %r15
movq %r13, %r14
movl $.L.str.1, %r13d
cmovneq %rcx, %r13
cmovpq %rcx, %r13
movq 32(%rsp), %rax # 8-byte Reload
ucomiss (%rax,%r12,4), %xmm0
movq %rbp, %rbx
movl $.L.str.1, %ebp
cmovneq %rcx, %rbp
cmovpq %rcx, %rbp
movl $.L.str, %edi
movl %r12d, %esi
movl %r12d, %edx
movl %r12d, %ecx
xorl %eax, %eax
callq printf
movl $.L.str.3, %edi
movl %r12d, %esi
movl %r12d, %edx
movl %r12d, %ecx
movq %rbp, %r8
movq %rbx, %rbp
xorl %eax, %eax
callq printf
movl $.L.str.4, %edi
movl %r12d, %esi
movl %r12d, %edx
movl %r12d, %ecx
movq %r13, %r8
movq %r14, %r13
movq %r15, %r14
movq 136(%rsp), %r15 # 8-byte Reload
movq 144(%rsp), %rbx # 8-byte Reload
xorl %eax, %eax
callq printf
incq %r12
cmpq $10, %r12
jne .LBB1_5
# %bb.6:
movss 272(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.5, %edi
movb $1, %al
callq printf
movq 104(%rsp), %rdi
callq hipFree
movq 96(%rsp), %rdi
callq hipFree
movq 88(%rsp), %rdi
callq hipFree
movq 80(%rsp), %rdi
callq hipFree
movq 72(%rsp), %rdi
callq hipFree
movq 64(%rsp), %rdi
callq hipFree
movq 56(%rsp), %rdi
callq hipFree
movq 48(%rsp), %rdi
callq hipFree
movq 40(%rsp), %rdi
callq hipFree
movq %r13, %rdi
callq free
movq %r14, %rdi
callq free
movq %r15, %rdi
callq free
movq %rbx, %rdi
callq free
movq %rbp, %rdi
callq free
movq 32(%rsp), %rdi # 8-byte Reload
callq free
movq 24(%rsp), %rdi # 8-byte Reload
callq free
movq 16(%rsp), %rdi # 8-byte Reload
callq free
movq 8(%rsp), %rdi # 8-byte Reload
callq free
xorl %eax, %eax
addq $360, %rsp # imm = 0x168
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_,@object # @_Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_
.section .rodata,"a",@progbits
.globl _Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_
.p2align 3, 0x0
_Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_:
.quad _Z35__device_stub__calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_
.size _Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "\nC[%i] = A[%i] + B[%i] :%s\n"
.size .L.str, 28
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "correct"
.size .L.str.1, 8
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "failed"
.size .L.str.2, 7
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "F[%i] = D[%i] - E[%i] :%s\n"
.size .L.str.3, 27
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "G[%i] = K[%i] * H[%i] :%s\n"
.size .L.str.4, 27
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "\nElapsed time (GPU : kernel calculate_arrays_GPU) : %f ms\n\n"
.size .L.str.5, 60
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_"
.size .L__unnamed_1, 44
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z35__device_stub__calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R14, SR_CTAID.X ; /* 0x00000000000e7919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R14, R14, c[0x0][0x0], R3 ; /* 0x000000000e0e7a24 */
/* 0x001fca00078e0203 */
/*0040*/ ISETP.GE.AND P0, PT, R14, c[0x0][0x160], PT ; /* 0x000058000e007a0c */
/* 0x000fda0003f06270 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ HFMA2.MMA R15, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff0f7435 */
/* 0x000fe200000001ff */
/*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fd20000000a00 */
/*0080*/ IMAD.WIDE R4, R14, R15, c[0x0][0x170] ; /* 0x00005c000e047625 */
/* 0x000fc800078e020f */
/*0090*/ IMAD.WIDE R2, R14.reuse, R15.reuse, c[0x0][0x168] ; /* 0x00005a000e027625 */
/* 0x0c0fe400078e020f */
/*00a0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ea8000c1e1900 */
/*00b0*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */
/* 0x000ea2000c1e1900 */
/*00c0*/ IMAD.WIDE R6, R14, R15, c[0x0][0x178] ; /* 0x00005e000e067625 */
/* 0x000fc800078e020f */
/*00d0*/ IMAD.WIDE R10, R14, R15, c[0x0][0x188] ; /* 0x000062000e0a7625 */
/* 0x000fc800078e020f */
/*00e0*/ IMAD.WIDE R8, R14, R15, c[0x0][0x180] ; /* 0x000060000e087625 */
/* 0x000fc800078e020f */
/*00f0*/ FADD R17, R4, R3 ; /* 0x0000000304117221 */
/* 0x004fca0000000000 */
/*0100*/ STG.E [R6.64], R17 ; /* 0x0000001106007986 */
/* 0x0001e8000c101904 */
/*0110*/ LDG.E R10, [R10.64] ; /* 0x000000040a0a7981 */
/* 0x000ea8000c1e1900 */
/*0120*/ LDG.E R9, [R8.64] ; /* 0x0000000408097981 */
/* 0x000ea2000c1e1900 */
/*0130*/ IMAD.WIDE R12, R14, R15, c[0x0][0x190] ; /* 0x000064000e0c7625 */
/* 0x000fc800078e020f */
/*0140*/ IMAD.WIDE R4, R14, R15, c[0x0][0x1a0] ; /* 0x000068000e047625 */
/* 0x000fc800078e020f */
/*0150*/ IMAD.WIDE R2, R14, R15, c[0x0][0x1a8] ; /* 0x00006a000e027625 */
/* 0x000fc800078e020f */
/*0160*/ FADD R19, -R10, R9 ; /* 0x000000090a137221 */
/* 0x004fca0000000100 */
/*0170*/ STG.E [R12.64], R19 ; /* 0x000000130c007986 */
/* 0x000fe8000c101904 */
/*0180*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000e28000c1e1900 */
/*0190*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */
/* 0x000e22000c1e1900 */
/*01a0*/ IMAD.WIDE R14, R14, R15, c[0x0][0x198] ; /* 0x000066000e0e7625 */
/* 0x000fc800078e020f */
/*01b0*/ FMUL R7, R4, R3 ; /* 0x0000000304077220 */
/* 0x001fca0000400000 */
/*01c0*/ STG.E [R14.64], R7 ; /* 0x000000070e007986 */
/* 0x000fe2000c101904 */
/*01d0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*01e0*/ BRA 0x1e0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0200*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0210*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0220*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0230*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0240*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0250*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0260*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0270*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_
.globl _Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_
.p2align 8
.type _Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_,@function
_Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x5c
s_load_b32 s3, s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_2
s_load_b256 s[4:11], s[0:1], 0x8
v_ashrrev_i32_e32 v2, 31, v1
s_clause 0x1
s_load_b256 s[12:19], s[0:1], 0x28
s_load_b64 s[0:1], s[0:1], 0x48
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
global_load_b32 v6, v[2:3], off
global_load_b32 v7, v[4:5], off
v_add_co_u32 v2, vcc_lo, s8, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s9, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s10, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s11, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_f32_e32 v8, v6, v7
v_add_co_u32 v6, vcc_lo, s12, v0
v_add_co_ci_u32_e32 v7, vcc_lo, s13, v1, vcc_lo
global_store_b32 v[2:3], v8, off
global_load_b32 v8, v[4:5], off
global_load_b32 v6, v[6:7], off
v_add_co_u32 v2, vcc_lo, s14, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s15, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_sub_f32_e32 v8, v8, v6
v_add_co_u32 v6, vcc_lo, s18, v0
v_add_co_ci_u32_e32 v7, vcc_lo, s19, v1, vcc_lo
global_store_b32 v[2:3], v8, off
global_load_b32 v2, v[4:5], off
global_load_b32 v3, v[6:7], off
v_add_co_u32 v0, vcc_lo, s16, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s17, v1, vcc_lo
s_waitcnt vmcnt(0)
v_mul_f32_e32 v2, v2, v3
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 336
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 9
.amdhsa_next_free_sgpr 20
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_, .Lfunc_end0-_Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .offset: 0
.size: 4
.value_kind: by_value
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 24
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 32
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 40
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 48
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 56
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 64
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 72
.size: 8
.value_kind: global_buffer
- .offset: 80
.size: 4
.value_kind: hidden_block_count_x
- .offset: 84
.size: 4
.value_kind: hidden_block_count_y
- .offset: 88
.size: 4
.value_kind: hidden_block_count_z
- .offset: 92
.size: 2
.value_kind: hidden_group_size_x
- .offset: 94
.size: 2
.value_kind: hidden_group_size_y
- .offset: 96
.size: 2
.value_kind: hidden_group_size_z
- .offset: 98
.size: 2
.value_kind: hidden_remainder_x
- .offset: 100
.size: 2
.value_kind: hidden_remainder_y
- .offset: 102
.size: 2
.value_kind: hidden_remainder_z
- .offset: 120
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 128
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 136
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 144
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 336
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_
.private_segment_fixed_size: 0
.sgpr_count: 22
.sgpr_spill_count: 0
.symbol: _Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 9
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00056210_00000000-6_calculate_arrays_GPU_256_en.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3672:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z57__device_stub__Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_iPfS_S_S_S_S_S_S_S_
.type _Z57__device_stub__Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_iPfS_S_S_S_S_S_S_S_, @function
_Z57__device_stub__Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_iPfS_S_S_S_S_S_S_S_:
.LFB3694:
.cfi_startproc
endbr64
subq $248, %rsp
.cfi_def_cfa_offset 256
movl %edi, 76(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movq %rcx, 48(%rsp)
movq %r8, 40(%rsp)
movq %r9, 32(%rsp)
movq 256(%rsp), %rax
movq %rax, 24(%rsp)
movq 264(%rsp), %rax
movq %rax, 16(%rsp)
movq 272(%rsp), %rax
movq %rax, 8(%rsp)
movq 280(%rsp), %rax
movq %rax, (%rsp)
movq %fs:40, %rax
movq %rax, 232(%rsp)
xorl %eax, %eax
leaq 76(%rsp), %rax
movq %rax, 144(%rsp)
leaq 64(%rsp), %rax
movq %rax, 152(%rsp)
leaq 56(%rsp), %rax
movq %rax, 160(%rsp)
leaq 48(%rsp), %rax
movq %rax, 168(%rsp)
leaq 40(%rsp), %rax
movq %rax, 176(%rsp)
leaq 32(%rsp), %rax
movq %rax, 184(%rsp)
leaq 24(%rsp), %rax
movq %rax, 192(%rsp)
leaq 16(%rsp), %rax
movq %rax, 200(%rsp)
leaq 8(%rsp), %rax
movq %rax, 208(%rsp)
movq %rsp, %rax
movq %rax, 216(%rsp)
movl $1, 96(%rsp)
movl $1, 100(%rsp)
movl $1, 104(%rsp)
movl $1, 108(%rsp)
movl $1, 112(%rsp)
movl $1, 116(%rsp)
leaq 88(%rsp), %rcx
leaq 80(%rsp), %rdx
leaq 108(%rsp), %rsi
leaq 96(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 232(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $248, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 88(%rsp)
.cfi_def_cfa_offset 264
pushq 88(%rsp)
.cfi_def_cfa_offset 272
leaq 160(%rsp), %r9
movq 124(%rsp), %rcx
movl 132(%rsp), %r8d
movq 112(%rsp), %rsi
movl 120(%rsp), %edx
leaq _Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 256
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3694:
.size _Z57__device_stub__Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_iPfS_S_S_S_S_S_S_S_, .-_Z57__device_stub__Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_iPfS_S_S_S_S_S_S_S_
.globl _Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_
.type _Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_, @function
_Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_:
.LFB3695:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
pushq 40(%rsp)
.cfi_def_cfa_offset 24
pushq 40(%rsp)
.cfi_def_cfa_offset 32
pushq 40(%rsp)
.cfi_def_cfa_offset 40
pushq 40(%rsp)
.cfi_def_cfa_offset 48
call _Z57__device_stub__Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_iPfS_S_S_S_S_S_S_S_
addq $40, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3695:
.size _Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_, .-_Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "correct"
.LC1:
.string "failed"
.LC3:
.string "\nC[%i] = A[%i] + B[%i] :%s\n"
.LC4:
.string "F[%i] = D[%i] - E[%i] :%s\n"
.LC5:
.string "G[%i] = K[%i] * H[%i] :%s\n"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC6:
.string "\nElapsed time (GPU : kernel calculate_arrays_GPU) : %f ms\n\n"
.text
.globl main
.type main, @function
main:
.LFB3669:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $200, %rsp
.cfi_def_cfa_offset 256
movq %fs:40, %rax
movq %rax, 184(%rsp)
xorl %eax, %eax
leaq 72(%rsp), %rdi
call cudaEventCreate@PLT
leaq 80(%rsp), %rdi
call cudaEventCreate@PLT
movl $4194304, %edi
call malloc@PLT
movq %rax, %r12
movl $4194304, %edi
call malloc@PLT
movq %rax, 8(%rsp)
movl $4194304, %edi
call malloc@PLT
movq %rax, %r13
movl $4194304, %edi
call malloc@PLT
movq %rax, %rbp
movl $4194304, %edi
call malloc@PLT
movq %rax, 16(%rsp)
movl $4194304, %edi
call malloc@PLT
movq %rax, 24(%rsp)
movl $4194304, %edi
call malloc@PLT
movq %rax, 32(%rsp)
movl $4194304, %edi
call malloc@PLT
movq %rax, %r15
movl $4194304, %edi
call malloc@PLT
movq %rax, %r14
leaq 88(%rsp), %rdi
movl $4194304, %esi
call cudaMalloc@PLT
leaq 96(%rsp), %rdi
movl $4194304, %esi
call cudaMalloc@PLT
leaq 104(%rsp), %rdi
movl $4194304, %esi
call cudaMalloc@PLT
leaq 112(%rsp), %rdi
movl $4194304, %esi
call cudaMalloc@PLT
leaq 120(%rsp), %rdi
movl $4194304, %esi
call cudaMalloc@PLT
leaq 128(%rsp), %rdi
movl $4194304, %esi
call cudaMalloc@PLT
leaq 136(%rsp), %rdi
movl $4194304, %esi
call cudaMalloc@PLT
leaq 144(%rsp), %rdi
movl $4194304, %esi
call cudaMalloc@PLT
leaq 152(%rsp), %rdi
movl $4194304, %esi
call cudaMalloc@PLT
movl $0, %ebx
.L12:
call rand@PLT
movslq %eax, %rcx
movq %rcx, %rdx
salq $30, %rdx
addq %rcx, %rdx
sarq $61, %rdx
sarl $31, %eax
subl %eax, %edx
pxor %xmm0, %xmm0
cvtsi2sdl %edx, %xmm0
mulsd .LC2(%rip), %xmm0
cvtsd2ss %xmm0, %xmm0
movss %xmm0, (%r12,%rbx)
call rand@PLT
movslq %eax, %rcx
movq %rcx, %rdx
salq $30, %rdx
addq %rcx, %rdx
sarq $61, %rdx
sarl $31, %eax
subl %eax, %edx
pxor %xmm0, %xmm0
cvtsi2sdl %edx, %xmm0
mulsd .LC2(%rip), %xmm0
cvtsd2ss %xmm0, %xmm0
movq 8(%rsp), %rax
movss %xmm0, (%rax,%rbx)
call rand@PLT
movslq %eax, %rcx
movq %rcx, %rdx
salq $30, %rdx
addq %rcx, %rdx
sarq $61, %rdx
sarl $31, %eax
subl %eax, %edx
pxor %xmm0, %xmm0
cvtsi2sdl %edx, %xmm0
mulsd .LC2(%rip), %xmm0
cvtsd2ss %xmm0, %xmm0
movss %xmm0, 0(%r13,%rbx)
call rand@PLT
movslq %eax, %rcx
movq %rcx, %rdx
salq $30, %rdx
addq %rcx, %rdx
sarq $61, %rdx
sarl $31, %eax
subl %eax, %edx
pxor %xmm0, %xmm0
cvtsi2sdl %edx, %xmm0
mulsd .LC2(%rip), %xmm0
cvtsd2ss %xmm0, %xmm0
movss %xmm0, 0(%rbp,%rbx)
call rand@PLT
movslq %eax, %rcx
movq %rcx, %rdx
salq $30, %rdx
addq %rcx, %rdx
sarq $61, %rdx
sarl $31, %eax
subl %eax, %edx
pxor %xmm0, %xmm0
cvtsi2sdl %edx, %xmm0
mulsd .LC2(%rip), %xmm0
cvtsd2ss %xmm0, %xmm0
movq 16(%rsp), %rax
movss %xmm0, (%rax,%rbx)
call rand@PLT
movslq %eax, %rcx
movq %rcx, %rdx
salq $30, %rdx
addq %rcx, %rdx
sarq $61, %rdx
sarl $31, %eax
subl %eax, %edx
pxor %xmm0, %xmm0
cvtsi2sdl %edx, %xmm0
mulsd .LC2(%rip), %xmm0
cvtsd2ss %xmm0, %xmm0
movq 24(%rsp), %rax
movss %xmm0, (%rax,%rbx)
call rand@PLT
movslq %eax, %rcx
movq %rcx, %rdx
salq $30, %rdx
addq %rcx, %rdx
sarq $61, %rdx
sarl $31, %eax
subl %eax, %edx
pxor %xmm0, %xmm0
cvtsi2sdl %edx, %xmm0
mulsd .LC2(%rip), %xmm0
cvtsd2ss %xmm0, %xmm0
movq 32(%rsp), %rax
movss %xmm0, (%rax,%rbx)
call rand@PLT
movslq %eax, %rcx
movq %rcx, %rdx
salq $30, %rdx
addq %rcx, %rdx
sarq $61, %rdx
sarl $31, %eax
subl %eax, %edx
pxor %xmm0, %xmm0
cvtsi2sdl %edx, %xmm0
mulsd .LC2(%rip), %xmm0
cvtsd2ss %xmm0, %xmm0
movss %xmm0, (%r15,%rbx)
call rand@PLT
movslq %eax, %rcx
movq %rcx, %rdx
salq $30, %rdx
addq %rcx, %rdx
sarq $61, %rdx
sarl $31, %eax
subl %eax, %edx
pxor %xmm0, %xmm0
cvtsi2sdl %edx, %xmm0
mulsd .LC2(%rip), %xmm0
cvtsd2ss %xmm0, %xmm0
movss %xmm0, (%r14,%rbx)
addq $4, %rbx
cmpq $4194304, %rbx
jne .L12
movl $1, %ecx
movl $4194304, %edx
movq %r12, %rsi
movq 88(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $4194304, %edx
movq 8(%rsp), %rsi
movq 96(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $4194304, %edx
movq %r13, %rsi
movq 104(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $4194304, %edx
movq %rbp, %rsi
movq 112(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $4194304, %edx
movq 16(%rsp), %rsi
movq 120(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $4194304, %edx
movq 24(%rsp), %rsi
movq 128(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $4194304, %edx
movq 32(%rsp), %rsi
movq 136(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $4194304, %edx
movq %r15, %rsi
movq 144(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $4194304, %edx
movq %r14, %rsi
movq 152(%rsp), %rdi
call cudaMemcpy@PLT
movl $0, %esi
movq 72(%rsp), %rdi
call cudaEventRecord@PLT
movl $256, 172(%rsp)
movl $1, 176(%rsp)
movl $1, 180(%rsp)
movl $1, 160(%rsp)
movl $1, 164(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 172(%rsp), %rdx
movl $1, %ecx
movq 160(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L31
.L13:
movl $0, %esi
movq 80(%rsp), %rdi
call cudaEventRecord@PLT
movq 80(%rsp), %rdi
call cudaEventSynchronize@PLT
movl $2, %ecx
movl $4194304, %edx
movq 88(%rsp), %rsi
movq %r12, %rdi
call cudaMemcpy@PLT
movl $2, %ecx
movl $4194304, %edx
movq 96(%rsp), %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
movl $2, %ecx
movl $4194304, %edx
movq 104(%rsp), %rsi
movq %r13, %rdi
call cudaMemcpy@PLT
movl $2, %ecx
movl $4194304, %edx
movq 112(%rsp), %rsi
movq %rbp, %rdi
call cudaMemcpy@PLT
movl $2, %ecx
movl $4194304, %edx
movq 120(%rsp), %rsi
movq 16(%rsp), %rdi
call cudaMemcpy@PLT
movl $2, %ecx
movl $4194304, %edx
movq 128(%rsp), %rsi
movq 24(%rsp), %rdi
call cudaMemcpy@PLT
movl $2, %ecx
movl $4194304, %edx
movq 136(%rsp), %rsi
movq 32(%rsp), %rdi
call cudaMemcpy@PLT
movl $2, %ecx
movl $4194304, %edx
movq 144(%rsp), %rsi
movq %r15, %rdi
call cudaMemcpy@PLT
movl $2, %ecx
movl $4194304, %edx
movq 152(%rsp), %rsi
movq %r14, %rdi
call cudaMemcpy@PLT
leaq 172(%rsp), %rdi
movq 80(%rsp), %rdx
movq 72(%rsp), %rsi
call cudaEventElapsedTime@PLT
movq 72(%rsp), %rdi
call cudaEventDestroy@PLT
movq 80(%rsp), %rdi
call cudaEventDestroy@PLT
movl $0, %ebx
movq %r15, 56(%rsp)
jmp .L20
.L31:
pushq 152(%rsp)
.cfi_def_cfa_offset 264
pushq 152(%rsp)
.cfi_def_cfa_offset 272
pushq 152(%rsp)
.cfi_def_cfa_offset 280
pushq 152(%rsp)
.cfi_def_cfa_offset 288
movq 152(%rsp), %r9
movq 144(%rsp), %r8
movq 136(%rsp), %rcx
movq 128(%rsp), %rdx
movq 120(%rsp), %rsi
movl $1048576, %edi
call _Z57__device_stub__Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_iPfS_S_S_S_S_S_S_S_
addq $32, %rsp
.cfi_def_cfa_offset 256
jmp .L13
.L22:
leaq .LC1(%rip), %r9
jmp .L14
.L23:
leaq .LC1(%rip), %r9
jmp .L16
.L24:
leaq .LC1(%rip), %r9
.L18:
movl %r15d, %r8d
movl %r15d, %ecx
movl %r15d, %edx
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $1, %rbx
cmpq $10, %rbx
je .L32
.L20:
movl %ebx, %r15d
movq 24(%rsp), %rax
movss (%rax,%rbx,4), %xmm5
movss %xmm5, 40(%rsp)
movss 0(%rbp,%rbx,4), %xmm0
movq 16(%rsp), %rax
subss (%rax,%rbx,4), %xmm0
movss %xmm0, 44(%rsp)
movq 32(%rsp), %rax
movss (%rax,%rbx,4), %xmm6
movss %xmm6, 48(%rsp)
movss (%r14,%rbx,4), %xmm0
movq 56(%rsp), %rax
mulss (%rax,%rbx,4), %xmm0
movss %xmm0, 52(%rsp)
movss (%r12,%rbx,4), %xmm0
movq 8(%rsp), %rax
addss (%rax,%rbx,4), %xmm0
ucomiss 0(%r13,%rbx,4), %xmm0
jp .L22
leaq .LC0(%rip), %r9
jne .L22
.L14:
movl %r15d, %r8d
movl %r15d, %ecx
movl %r15d, %edx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movss 40(%rsp), %xmm1
movss 44(%rsp), %xmm2
ucomiss %xmm2, %xmm1
jp .L23
leaq .LC0(%rip), %r9
jne .L23
.L16:
movl %r15d, %r8d
movl %r15d, %ecx
movl %r15d, %edx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movss 48(%rsp), %xmm3
movss 52(%rsp), %xmm4
ucomiss %xmm4, %xmm3
jp .L24
leaq .LC0(%rip), %r9
je .L18
jmp .L24
.L32:
movq 56(%rsp), %r15
pxor %xmm0, %xmm0
cvtss2sd 172(%rsp), %xmm0
leaq .LC6(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq 88(%rsp), %rdi
call cudaFree@PLT
movq 96(%rsp), %rdi
call cudaFree@PLT
movq 104(%rsp), %rdi
call cudaFree@PLT
movq 112(%rsp), %rdi
call cudaFree@PLT
movq 120(%rsp), %rdi
call cudaFree@PLT
movq 128(%rsp), %rdi
call cudaFree@PLT
movq 136(%rsp), %rdi
call cudaFree@PLT
movq 144(%rsp), %rdi
call cudaFree@PLT
movq 152(%rsp), %rdi
call cudaFree@PLT
movq %r12, %rdi
call free@PLT
movq 8(%rsp), %rdi
call free@PLT
movq %r13, %rdi
call free@PLT
movq %rbp, %rdi
call free@PLT
movq 16(%rsp), %rdi
call free@PLT
movq 24(%rsp), %rdi
call free@PLT
movq 32(%rsp), %rdi
call free@PLT
movq %r15, %rdi
call free@PLT
movq %r14, %rdi
call free@PLT
movq 184(%rsp), %rax
subq %fs:40, %rax
jne .L33
movl $0, %eax
addq $200, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L33:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3669:
.size main, .-main
.section .rodata.str1.8
.align 8
.LC7:
.string "_Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3697:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC7(%rip), %rdx
movq %rdx, %rcx
leaq _Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3697:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC2:
.long 0
.long 1093567616
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "calculate_arrays_GPU_256_en.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z35__device_stub__calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_ # -- Begin function _Z35__device_stub__calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_
.p2align 4, 0x90
.type _Z35__device_stub__calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_,@function
_Z35__device_stub__calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_: # @_Z35__device_stub__calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_
.cfi_startproc
# %bb.0:
subq $184, %rsp
.cfi_def_cfa_offset 192
movl %edi, 4(%rsp)
movq %rsi, 88(%rsp)
movq %rdx, 80(%rsp)
movq %rcx, 72(%rsp)
movq %r8, 64(%rsp)
movq %r9, 56(%rsp)
leaq 4(%rsp), %rax
movq %rax, 96(%rsp)
leaq 88(%rsp), %rax
movq %rax, 104(%rsp)
leaq 80(%rsp), %rax
movq %rax, 112(%rsp)
leaq 72(%rsp), %rax
movq %rax, 120(%rsp)
leaq 64(%rsp), %rax
movq %rax, 128(%rsp)
leaq 56(%rsp), %rax
movq %rax, 136(%rsp)
leaq 192(%rsp), %rax
movq %rax, 144(%rsp)
leaq 200(%rsp), %rax
movq %rax, 152(%rsp)
leaq 208(%rsp), %rax
movq %rax, 160(%rsp)
leaq 216(%rsp), %rax
movq %rax, 168(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $200, %rsp
.cfi_adjust_cfa_offset -200
retq
.Lfunc_end0:
.size _Z35__device_stub__calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_, .Lfunc_end0-_Z35__device_stub__calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI1_0:
.quad 0x412e848000000000 # double 1.0E+6
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $360, %rsp # imm = 0x168
.cfi_def_cfa_offset 416
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
leaq 120(%rsp), %rdi
callq hipEventCreate
leaq 112(%rsp), %rdi
callq hipEventCreate
movl $4194304, %edi # imm = 0x400000
callq malloc
movq %rax, %r13
movl $4194304, %edi # imm = 0x400000
callq malloc
movq %rax, %r14
movl $4194304, %edi # imm = 0x400000
callq malloc
movq %rax, %r15
movl $4194304, %edi # imm = 0x400000
callq malloc
movq %rax, %rbx
movl $4194304, %edi # imm = 0x400000
callq malloc
movq %rax, %rbp
movl $4194304, %edi # imm = 0x400000
callq malloc
movq %rax, 32(%rsp) # 8-byte Spill
movl $4194304, %edi # imm = 0x400000
callq malloc
movq %rax, 24(%rsp) # 8-byte Spill
movl $4194304, %edi # imm = 0x400000
callq malloc
movq %rax, 16(%rsp) # 8-byte Spill
movl $4194304, %edi # imm = 0x400000
callq malloc
movq %rax, 8(%rsp) # 8-byte Spill
leaq 104(%rsp), %rdi
movl $4194304, %esi # imm = 0x400000
callq hipMalloc
leaq 96(%rsp), %rdi
movl $4194304, %esi # imm = 0x400000
callq hipMalloc
leaq 88(%rsp), %rdi
movl $4194304, %esi # imm = 0x400000
callq hipMalloc
leaq 80(%rsp), %rdi
movl $4194304, %esi # imm = 0x400000
callq hipMalloc
leaq 72(%rsp), %rdi
movl $4194304, %esi # imm = 0x400000
callq hipMalloc
leaq 64(%rsp), %rdi
movl $4194304, %esi # imm = 0x400000
callq hipMalloc
leaq 56(%rsp), %rdi
movl $4194304, %esi # imm = 0x400000
callq hipMalloc
leaq 48(%rsp), %rdi
movl $4194304, %esi # imm = 0x400000
callq hipMalloc
leaq 40(%rsp), %rdi
movl $4194304, %esi # imm = 0x400000
callq hipMalloc
xorl %r12d, %r12d
.p2align 4, 0x90
.LBB1_1: # =>This Inner Loop Header: Depth=1
callq rand
cltq
movq %rax, %rcx
shlq $30, %rcx
addq %rax, %rcx
movq %rcx, %rax
shrq $63, %rax
sarq $61, %rcx
addl %eax, %ecx
xorps %xmm0, %xmm0
cvtsi2sd %ecx, %xmm0
movsd .LCPI1_0(%rip), %xmm1 # xmm1 = mem[0],zero
mulsd %xmm1, %xmm0
cvtsd2ss %xmm0, %xmm0
movss %xmm0, (%r13,%r12)
callq rand
cltq
movq %rax, %rcx
shlq $30, %rcx
addq %rax, %rcx
movq %rcx, %rax
shrq $63, %rax
sarq $61, %rcx
addl %eax, %ecx
xorps %xmm0, %xmm0
cvtsi2sd %ecx, %xmm0
mulsd .LCPI1_0(%rip), %xmm0
cvtsd2ss %xmm0, %xmm0
movss %xmm0, (%r14,%r12)
callq rand
cltq
movq %rax, %rcx
shlq $30, %rcx
addq %rax, %rcx
movq %rcx, %rax
shrq $63, %rax
sarq $61, %rcx
addl %eax, %ecx
xorps %xmm0, %xmm0
cvtsi2sd %ecx, %xmm0
mulsd .LCPI1_0(%rip), %xmm0
cvtsd2ss %xmm0, %xmm0
movss %xmm0, (%r15,%r12)
callq rand
cltq
movq %rax, %rcx
shlq $30, %rcx
addq %rax, %rcx
movq %rcx, %rax
shrq $63, %rax
sarq $61, %rcx
addl %eax, %ecx
xorps %xmm0, %xmm0
cvtsi2sd %ecx, %xmm0
mulsd .LCPI1_0(%rip), %xmm0
cvtsd2ss %xmm0, %xmm0
movss %xmm0, (%rbx,%r12)
callq rand
cltq
movq %rax, %rcx
shlq $30, %rcx
addq %rax, %rcx
movq %rcx, %rax
shrq $63, %rax
sarq $61, %rcx
addl %eax, %ecx
xorps %xmm0, %xmm0
cvtsi2sd %ecx, %xmm0
mulsd .LCPI1_0(%rip), %xmm0
cvtsd2ss %xmm0, %xmm0
movss %xmm0, (%rbp,%r12)
callq rand
cltq
movq %rax, %rcx
shlq $30, %rcx
addq %rax, %rcx
movq %rcx, %rax
shrq $63, %rax
sarq $61, %rcx
addl %eax, %ecx
xorps %xmm0, %xmm0
cvtsi2sd %ecx, %xmm0
mulsd .LCPI1_0(%rip), %xmm0
cvtsd2ss %xmm0, %xmm0
movq 32(%rsp), %rax # 8-byte Reload
movss %xmm0, (%rax,%r12)
callq rand
cltq
movq %rax, %rcx
shlq $30, %rcx
addq %rax, %rcx
movq %rcx, %rax
shrq $63, %rax
sarq $61, %rcx
addl %eax, %ecx
xorps %xmm0, %xmm0
cvtsi2sd %ecx, %xmm0
mulsd .LCPI1_0(%rip), %xmm0
cvtsd2ss %xmm0, %xmm0
movq 24(%rsp), %rax # 8-byte Reload
movss %xmm0, (%rax,%r12)
callq rand
cltq
movq %rax, %rcx
shlq $30, %rcx
addq %rax, %rcx
movq %rcx, %rax
shrq $63, %rax
sarq $61, %rcx
addl %eax, %ecx
xorps %xmm0, %xmm0
cvtsi2sd %ecx, %xmm0
mulsd .LCPI1_0(%rip), %xmm0
cvtsd2ss %xmm0, %xmm0
movq 16(%rsp), %rax # 8-byte Reload
movss %xmm0, (%rax,%r12)
callq rand
cltq
movq %rax, %rcx
shlq $30, %rcx
addq %rax, %rcx
movq %rcx, %rax
shrq $63, %rax
sarq $61, %rcx
addl %eax, %ecx
xorps %xmm0, %xmm0
cvtsi2sd %ecx, %xmm0
mulsd .LCPI1_0(%rip), %xmm0
cvtsd2ss %xmm0, %xmm0
movq 8(%rsp), %rax # 8-byte Reload
movss %xmm0, (%rax,%r12)
addq $4, %r12
cmpq $4194304, %r12 # imm = 0x400000
jne .LBB1_1
# %bb.2:
movq 104(%rsp), %rdi
movl $4194304, %edx # imm = 0x400000
movq %r13, %rsi
movl $1, %ecx
callq hipMemcpy
movq 96(%rsp), %rdi
movl $4194304, %edx # imm = 0x400000
movq %r14, %rsi
movl $1, %ecx
callq hipMemcpy
movq 88(%rsp), %rdi
movl $4194304, %edx # imm = 0x400000
movq %r15, %rsi
movl $1, %ecx
callq hipMemcpy
movq 80(%rsp), %rdi
movl $4194304, %edx # imm = 0x400000
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
movq 72(%rsp), %rdi
movl $4194304, %edx # imm = 0x400000
movq %rbp, %rsi
movl $1, %ecx
callq hipMemcpy
movq 64(%rsp), %rdi
movl $4194304, %edx # imm = 0x400000
movq 32(%rsp), %r12 # 8-byte Reload
movq %r12, %rsi
movl $1, %ecx
callq hipMemcpy
movq 56(%rsp), %rdi
movl $4194304, %edx # imm = 0x400000
movq 24(%rsp), %rsi # 8-byte Reload
movl $1, %ecx
callq hipMemcpy
movq 48(%rsp), %rdi
movl $4194304, %edx # imm = 0x400000
movq 16(%rsp), %rsi # 8-byte Reload
movl $1, %ecx
callq hipMemcpy
movq 40(%rsp), %rdi
movl $4194304, %edx # imm = 0x400000
movq 8(%rsp), %rsi # 8-byte Reload
movl $1, %ecx
callq hipMemcpy
movq 120(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movabsq $4294967297, %rdi # imm = 0x100000001
leaq 255(%rdi), %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_4
# %bb.3:
movq 104(%rsp), %rax
movq 96(%rsp), %rcx
movq 88(%rsp), %rdx
movq 80(%rsp), %rsi
movq 72(%rsp), %rdi
movq 64(%rsp), %r8
movq 56(%rsp), %r9
movq 48(%rsp), %r10
movq 40(%rsp), %r11
movl $1048576, 132(%rsp) # imm = 0x100000
movq %rax, 264(%rsp)
movq %rcx, 256(%rsp)
movq %rdx, 248(%rsp)
movq %rsi, 240(%rsp)
movq %rdi, 232(%rsp)
movq %r8, 224(%rsp)
movq %r9, 216(%rsp)
movq %r10, 208(%rsp)
movq %r11, 200(%rsp)
leaq 132(%rsp), %rax
movq %rax, 272(%rsp)
leaq 264(%rsp), %rax
movq %rax, 280(%rsp)
leaq 256(%rsp), %rax
movq %rax, 288(%rsp)
leaq 248(%rsp), %rax
movq %rax, 296(%rsp)
leaq 240(%rsp), %rax
movq %rax, 304(%rsp)
leaq 232(%rsp), %rax
movq %rax, 312(%rsp)
leaq 224(%rsp), %rax
movq %rax, 320(%rsp)
leaq 216(%rsp), %rax
movq %rax, 328(%rsp)
leaq 208(%rsp), %rax
movq %rax, 336(%rsp)
leaq 200(%rsp), %rax
movq %rax, 344(%rsp)
leaq 184(%rsp), %rdi
leaq 168(%rsp), %rsi
leaq 160(%rsp), %rdx
leaq 152(%rsp), %rcx
callq __hipPopCallConfiguration
movq 184(%rsp), %rsi
movl 192(%rsp), %edx
movq 168(%rsp), %rcx
movl 176(%rsp), %r8d
leaq 272(%rsp), %r9
movl $_Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_, %edi
pushq 152(%rsp)
.cfi_adjust_cfa_offset 8
pushq 168(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_4:
movq 112(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq 112(%rsp), %rdi
callq hipEventSynchronize
movq 104(%rsp), %rsi
movl $4194304, %edx # imm = 0x400000
movq %r13, %rdi
movl $2, %ecx
callq hipMemcpy
movq 96(%rsp), %rsi
movl $4194304, %edx # imm = 0x400000
movq %r14, %rdi
movl $2, %ecx
callq hipMemcpy
movq 88(%rsp), %rsi
movl $4194304, %edx # imm = 0x400000
movq %r15, %rdi
movl $2, %ecx
callq hipMemcpy
movq 80(%rsp), %rsi
movl $4194304, %edx # imm = 0x400000
movq %rbx, %rdi
movl $2, %ecx
callq hipMemcpy
movq 72(%rsp), %rsi
movl $4194304, %edx # imm = 0x400000
movq %rbp, %rdi
movl $2, %ecx
callq hipMemcpy
movq 64(%rsp), %rsi
movl $4194304, %edx # imm = 0x400000
movq %r12, %rdi
movl $2, %ecx
callq hipMemcpy
movq 56(%rsp), %rsi
movl $4194304, %edx # imm = 0x400000
movq 24(%rsp), %rdi # 8-byte Reload
movl $2, %ecx
callq hipMemcpy
movq 48(%rsp), %rsi
movl $4194304, %edx # imm = 0x400000
movq 16(%rsp), %rdi # 8-byte Reload
movl $2, %ecx
callq hipMemcpy
movq 40(%rsp), %rsi
movl $4194304, %edx # imm = 0x400000
movq 8(%rsp), %rdi # 8-byte Reload
movl $2, %ecx
callq hipMemcpy
movq 120(%rsp), %rsi
movq 112(%rsp), %rdx
leaq 272(%rsp), %rdi
callq hipEventElapsedTime
movq 120(%rsp), %rdi
callq hipEventDestroy
movq 112(%rsp), %rdi
callq hipEventDestroy
xorl %r12d, %r12d
movq %rbx, 144(%rsp) # 8-byte Spill
movq %r15, 136(%rsp) # 8-byte Spill
.p2align 4, 0x90
.LBB1_5: # =>This Inner Loop Header: Depth=1
movss (%r13,%r12,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
addss (%r14,%r12,4), %xmm0
ucomiss (%r15,%r12,4), %xmm0
movss (%rbx,%r12,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
subss (%rbp,%r12,4), %xmm0
movq 8(%rsp), %rax # 8-byte Reload
movss (%rax,%r12,4), %xmm1 # xmm1 = mem[0],zero,zero,zero
movq 16(%rsp), %rax # 8-byte Reload
mulss (%rax,%r12,4), %xmm1
movl $.L.str.1, %r8d
movl $.L.str.2, %ecx
cmovneq %rcx, %r8
cmovpq %rcx, %r8
movq 24(%rsp), %rax # 8-byte Reload
ucomiss (%rax,%r12,4), %xmm1
movq %r14, %r15
movq %r13, %r14
movl $.L.str.1, %r13d
cmovneq %rcx, %r13
cmovpq %rcx, %r13
movq 32(%rsp), %rax # 8-byte Reload
ucomiss (%rax,%r12,4), %xmm0
movq %rbp, %rbx
movl $.L.str.1, %ebp
cmovneq %rcx, %rbp
cmovpq %rcx, %rbp
movl $.L.str, %edi
movl %r12d, %esi
movl %r12d, %edx
movl %r12d, %ecx
xorl %eax, %eax
callq printf
movl $.L.str.3, %edi
movl %r12d, %esi
movl %r12d, %edx
movl %r12d, %ecx
movq %rbp, %r8
movq %rbx, %rbp
xorl %eax, %eax
callq printf
movl $.L.str.4, %edi
movl %r12d, %esi
movl %r12d, %edx
movl %r12d, %ecx
movq %r13, %r8
movq %r14, %r13
movq %r15, %r14
movq 136(%rsp), %r15 # 8-byte Reload
movq 144(%rsp), %rbx # 8-byte Reload
xorl %eax, %eax
callq printf
incq %r12
cmpq $10, %r12
jne .LBB1_5
# %bb.6:
movss 272(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.5, %edi
movb $1, %al
callq printf
movq 104(%rsp), %rdi
callq hipFree
movq 96(%rsp), %rdi
callq hipFree
movq 88(%rsp), %rdi
callq hipFree
movq 80(%rsp), %rdi
callq hipFree
movq 72(%rsp), %rdi
callq hipFree
movq 64(%rsp), %rdi
callq hipFree
movq 56(%rsp), %rdi
callq hipFree
movq 48(%rsp), %rdi
callq hipFree
movq 40(%rsp), %rdi
callq hipFree
movq %r13, %rdi
callq free
movq %r14, %rdi
callq free
movq %r15, %rdi
callq free
movq %rbx, %rdi
callq free
movq %rbp, %rdi
callq free
movq 32(%rsp), %rdi # 8-byte Reload
callq free
movq 24(%rsp), %rdi # 8-byte Reload
callq free
movq 16(%rsp), %rdi # 8-byte Reload
callq free
movq 8(%rsp), %rdi # 8-byte Reload
callq free
xorl %eax, %eax
addq $360, %rsp # imm = 0x168
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_,@object # @_Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_
.section .rodata,"a",@progbits
.globl _Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_
.p2align 3, 0x0
_Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_:
.quad _Z35__device_stub__calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_
.size _Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "\nC[%i] = A[%i] + B[%i] :%s\n"
.size .L.str, 28
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "correct"
.size .L.str.1, 8
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "failed"
.size .L.str.2, 7
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "F[%i] = D[%i] - E[%i] :%s\n"
.size .L.str.3, 27
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "G[%i] = K[%i] * H[%i] :%s\n"
.size .L.str.4, 27
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "\nElapsed time (GPU : kernel calculate_arrays_GPU) : %f ms\n\n"
.size .L.str.5, 60
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_"
.size .L__unnamed_1, 44
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z35__device_stub__calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z20calculate_arrays_GPUiPfS_S_S_S_S_S_S_S_
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <chrono>
#include <cstdio>
#include <cstdlib>
#include <cuda.h>
#define cudaCheck(op) \
do { \
cudaError_t err = op; \
if (cudaSuccess != err) \
{ \
fprintf(stderr, \
"%s:%d CUDA operation failed: %s\n", \
__FILE__, __LINE__, \
cudaGetErrorString(err)); \
exit(EXIT_FAILURE); \
} \
} while(0)
//#define cudaCheck(op) op
__global__ void kernel(float *K, float *g1, float *M, int N, float k)
{
int i = blockIdx.x*blockDim.x + threadIdx.x;
int j = blockIdx.y*blockDim.y + threadIdx.y;
if (i < N && j < N) M[i+j*N] = g1[N+i-j] * (K[i]+k) * (K[j]+k);
}
int main(int argc, char **argv)
{
using namespace std::chrono;
int N = 1000;
if (argc == 2) {
N = atoi(argv[1]);
}
printf("Using %d x %d\n", N, N);
auto t0 = high_resolution_clock::now();
float *M = new float[N*N];
float *K = new float[N];
float *g1 = new float[2*N];
float k = 1.3;
for (int i=0; i<N; i++)
K[i] = rand() / (float)RAND_MAX;
for (int i=0; i<2*N; i++)
g1[i] = rand() / (float)RAND_MAX;
float *d_M = NULL;
float *d_K = NULL;
float *d_g1 = NULL;
cudaCheck(cudaMalloc((void**)&d_M, sizeof(float)*N*N));
cudaCheck(cudaMalloc((void**)&d_K, sizeof(float)*N ));
cudaCheck(cudaMalloc((void**)&d_g1, sizeof(float)*2*N));
cudaCheck(cudaMemcpy(d_M, M, sizeof(float)*N*N, cudaMemcpyHostToDevice));
cudaCheck(cudaMemcpy(d_K, K, sizeof(float)*N , cudaMemcpyHostToDevice));
cudaCheck(cudaMemcpy(d_g1, g1, sizeof(float)*2*N, cudaMemcpyHostToDevice));
dim3 dimBlock(128);
dim3 dimGrid((N+dimBlock.x-1)/dimBlock.x,
(N+dimBlock.y-1)/dimBlock.y);
kernel<<<dimGrid,dimBlock>>>(d_K,d_g1,d_M,N,k);
cudaCheck(cudaGetLastError());
cudaCheck(cudaMemcpy(M, d_M, sizeof(float)*N*N, cudaMemcpyDeviceToHost));
cudaCheck(cudaFree(d_M));
cudaCheck(cudaFree(d_K));
cudaCheck(cudaFree(d_g1));
delete[] M;
delete[] K;
delete[] g1;
duration<float> t = high_resolution_clock::now() - t0;
printf("GPU took %f seconds\n", t.count());
return 0;
} | code for sm_80
Function : _Z6kernelPfS_S_if
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R9, SR_CTAID.Y ; /* 0x0000000000097919 */
/* 0x000e280000002600 */
/*0020*/ S2R R2, SR_TID.Y ; /* 0x0000000000027919 */
/* 0x000e280000002200 */
/*0030*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e680000002500 */
/*0040*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e620000002100 */
/*0050*/ IMAD R9, R9, c[0x0][0x4], R2 ; /* 0x0000010009097a24 */
/* 0x001fca00078e0202 */
/*0060*/ ISETP.GE.AND P0, PT, R9, c[0x0][0x178], PT ; /* 0x00005e0009007a0c */
/* 0x000fe20003f06270 */
/*0070*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x002fca00078e0203 */
/*0080*/ ISETP.GE.OR P0, PT, R0, c[0x0][0x178], P0 ; /* 0x00005e0000007a0c */
/* 0x000fda0000706670 */
/*0090*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*00a0*/ HFMA2.MMA R10, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff0a7435 */
/* 0x000fe200000001ff */
/*00b0*/ IADD3 R2, R0, c[0x0][0x178], -R9 ; /* 0x00005e0000027a10 */
/* 0x000fe20007ffe809 */
/*00c0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fd00000000a00 */
/*00d0*/ IMAD.WIDE R4, R0, R10, c[0x0][0x160] ; /* 0x0000580000047625 */
/* 0x000fc800078e020a */
/*00e0*/ IMAD.WIDE R6, R9.reuse, R10.reuse, c[0x0][0x160] ; /* 0x0000580009067625 */
/* 0x0c0fe400078e020a */
/*00f0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ea4000c1e1900 */
/*0100*/ IMAD.WIDE R2, R2, R10, c[0x0][0x168] ; /* 0x00005a0002027625 */
/* 0x000fe400078e020a */
/*0110*/ LDG.E R6, [R6.64] ; /* 0x0000000406067981 */
/* 0x000ee8000c1e1900 */
/*0120*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */
/* 0x000f22000c1e1900 */
/*0130*/ IMAD R9, R9, c[0x0][0x178], R0 ; /* 0x00005e0009097a24 */
/* 0x000fc400078e0200 */
/*0140*/ FADD R8, R4, c[0x0][0x17c] ; /* 0x00005f0004087621 */
/* 0x004fe40000000000 */
/*0150*/ FADD R11, R6, c[0x0][0x17c] ; /* 0x00005f00060b7621 */
/* 0x008fe40000000000 */
/*0160*/ FMUL R0, R8, R3 ; /* 0x0000000308007220 */
/* 0x010fe40000400000 */
/*0170*/ IMAD.WIDE R8, R9, R10, c[0x0][0x170] ; /* 0x00005c0009087625 */
/* 0x000fc800078e020a */
/*0180*/ FMUL R11, R0, R11 ; /* 0x0000000b000b7220 */
/* 0x000fca0000400000 */
/*0190*/ STG.E [R8.64], R11 ; /* 0x0000000b08007986 */
/* 0x000fe2000c101904 */
/*01a0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*01b0*/ BRA 0x1b0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*01c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0200*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0210*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0220*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0230*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0240*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0250*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0260*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0270*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <chrono>
#include <cstdio>
#include <cstdlib>
#include <cuda.h>
#define cudaCheck(op) \
do { \
cudaError_t err = op; \
if (cudaSuccess != err) \
{ \
fprintf(stderr, \
"%s:%d CUDA operation failed: %s\n", \
__FILE__, __LINE__, \
cudaGetErrorString(err)); \
exit(EXIT_FAILURE); \
} \
} while(0)
//#define cudaCheck(op) op
__global__ void kernel(float *K, float *g1, float *M, int N, float k)
{
int i = blockIdx.x*blockDim.x + threadIdx.x;
int j = blockIdx.y*blockDim.y + threadIdx.y;
if (i < N && j < N) M[i+j*N] = g1[N+i-j] * (K[i]+k) * (K[j]+k);
}
int main(int argc, char **argv)
{
using namespace std::chrono;
int N = 1000;
if (argc == 2) {
N = atoi(argv[1]);
}
printf("Using %d x %d\n", N, N);
auto t0 = high_resolution_clock::now();
float *M = new float[N*N];
float *K = new float[N];
float *g1 = new float[2*N];
float k = 1.3;
for (int i=0; i<N; i++)
K[i] = rand() / (float)RAND_MAX;
for (int i=0; i<2*N; i++)
g1[i] = rand() / (float)RAND_MAX;
float *d_M = NULL;
float *d_K = NULL;
float *d_g1 = NULL;
cudaCheck(cudaMalloc((void**)&d_M, sizeof(float)*N*N));
cudaCheck(cudaMalloc((void**)&d_K, sizeof(float)*N ));
cudaCheck(cudaMalloc((void**)&d_g1, sizeof(float)*2*N));
cudaCheck(cudaMemcpy(d_M, M, sizeof(float)*N*N, cudaMemcpyHostToDevice));
cudaCheck(cudaMemcpy(d_K, K, sizeof(float)*N , cudaMemcpyHostToDevice));
cudaCheck(cudaMemcpy(d_g1, g1, sizeof(float)*2*N, cudaMemcpyHostToDevice));
dim3 dimBlock(128);
dim3 dimGrid((N+dimBlock.x-1)/dimBlock.x,
(N+dimBlock.y-1)/dimBlock.y);
kernel<<<dimGrid,dimBlock>>>(d_K,d_g1,d_M,N,k);
cudaCheck(cudaGetLastError());
cudaCheck(cudaMemcpy(M, d_M, sizeof(float)*N*N, cudaMemcpyDeviceToHost));
cudaCheck(cudaFree(d_M));
cudaCheck(cudaFree(d_K));
cudaCheck(cudaFree(d_g1));
delete[] M;
delete[] K;
delete[] g1;
duration<float> t = high_resolution_clock::now() - t0;
printf("GPU took %f seconds\n", t.count());
return 0;
} | .file "tmpxft_000ae8a2_00000000-6_sparse_mat.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2161:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2161:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z31__device_stub__Z6kernelPfS_S_ifPfS_S_if
.type _Z31__device_stub__Z6kernelPfS_S_ifPfS_S_if, @function
_Z31__device_stub__Z6kernelPfS_S_ifPfS_S_if:
.LFB2183:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movss %xmm0, (%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movq %rsp, %rax
movq %rax, 128(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z6kernelPfS_S_if(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2183:
.size _Z31__device_stub__Z6kernelPfS_S_ifPfS_S_if, .-_Z31__device_stub__Z6kernelPfS_S_ifPfS_S_if
.globl _Z6kernelPfS_S_if
.type _Z6kernelPfS_S_if, @function
_Z6kernelPfS_S_if:
.LFB2184:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z31__device_stub__Z6kernelPfS_S_ifPfS_S_if
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2184:
.size _Z6kernelPfS_S_if, .-_Z6kernelPfS_S_if
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Using %d x %d\n"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC2:
.string "/home/ubuntu/Datasets/stackv2/train-structured/mariogazziro/AutoML_GPU/main/sparse_mat/sparse_mat.cu"
.align 8
.LC3:
.string "%s:%d CUDA operation failed: %s\n"
.section .rodata.str1.1
.LC6:
.string "GPU took %f seconds\n"
.text
.globl main
.type main, @function
main:
.LFB2156:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $120, %rsp
.cfi_def_cfa_offset 176
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
cmpl $2, %edi
je .L41
movl $1000, %ecx
movl $1000, %edx
leaq .LC0(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
call _ZNSt6chrono3_V212system_clock3nowEv@PLT
movq %rax, 32(%rsp)
movl $4000000, %edi
call _Znam@PLT
movq %rax, 8(%rsp)
movl $1000, %ebp
movl $1000, %r13d
.L33:
leaq 0(,%rbp,4), %r14
movq %r14, %rdi
call _Znam@PLT
movq %rax, %r12
leal (%r13,%r13), %eax
movl %eax, 44(%rsp)
cltq
salq $2, %rax
movq %rax, 24(%rsp)
movq %rax, %rdi
call _Znam@PLT
movq %rax, 16(%rsp)
movq %r12, %rbx
leaq (%r14,%r12), %r15
testl %r13d, %r13d
jle .L42
.L17:
call rand@PLT
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
mulss .LC1(%rip), %xmm0
movss %xmm0, (%rbx)
addq $4, %rbx
cmpq %r15, %rbx
jne .L17
.L18:
movq 16(%rsp), %rcx
movq %rcx, %rbx
leal (%r13,%r13), %eax
leaq (%rcx,%rax,4), %r15
.L20:
call rand@PLT
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
mulss .LC1(%rip), %xmm0
movss %xmm0, (%rbx)
addq $4, %rbx
cmpq %r15, %rbx
jne .L20
.L19:
movq $0, 56(%rsp)
movq $0, 64(%rsp)
movq $0, 72(%rsp)
imulq %rbp, %rbp
salq $2, %rbp
leaq 56(%rsp), %rdi
movq %rbp, %rsi
call cudaMalloc@PLT
testl %eax, %eax
jne .L43
leaq 64(%rsp), %rdi
movq %r14, %rsi
call cudaMalloc@PLT
testl %eax, %eax
jne .L44
leaq 72(%rsp), %rdi
movq 24(%rsp), %rsi
call cudaMalloc@PLT
testl %eax, %eax
jne .L45
movl $1, %ecx
movq %rbp, %rdx
movq 8(%rsp), %rsi
movq 56(%rsp), %rdi
call cudaMemcpy@PLT
testl %eax, %eax
jne .L46
movl $1, %ecx
movq %r14, %rdx
movq %r12, %rsi
movq 64(%rsp), %rdi
call cudaMemcpy@PLT
testl %eax, %eax
jne .L47
movl $1, %ecx
movq 24(%rsp), %rdx
movq 16(%rsp), %rsi
movq 72(%rsp), %rdi
call cudaMemcpy@PLT
testl %eax, %eax
jne .L48
leal 127(%r13), %eax
shrl $7, %eax
movl %eax, 92(%rsp)
movl %r13d, 96(%rsp)
movl $128, 80(%rsp)
movl $1, 84(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 80(%rsp), %rdx
movl $1, %ecx
movq 92(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L49
.L27:
call cudaGetLastError@PLT
testl %eax, %eax
jne .L50
movl $2, %ecx
movq %rbp, %rdx
movq 56(%rsp), %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
testl %eax, %eax
jne .L51
movq 56(%rsp), %rdi
call cudaFree@PLT
testl %eax, %eax
jne .L52
movq 64(%rsp), %rdi
call cudaFree@PLT
testl %eax, %eax
jne .L53
movq 72(%rsp), %rdi
call cudaFree@PLT
testl %eax, %eax
jne .L54
movq 8(%rsp), %rdi
call _ZdaPv@PLT
movq %r12, %rdi
call _ZdaPv@PLT
movq 16(%rsp), %rdi
call _ZdaPv@PLT
call _ZNSt6chrono3_V212system_clock3nowEv@PLT
movq 32(%rsp), %rdx
subq %rdx, %rax
pxor %xmm0, %xmm0
cvtsi2ssq %rax, %xmm0
divss .LC5(%rip), %xmm0
cvtss2sd %xmm0, %xmm0
leaq .LC6(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L55
movl $0, %eax
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L41:
.cfi_restore_state
movq 8(%rsi), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, %rbp
movl %eax, %r13d
movl %eax, %ecx
movl %eax, %edx
leaq .LC0(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
call _ZNSt6chrono3_V212system_clock3nowEv@PLT
movq %rax, 32(%rsp)
movl %ebp, %edi
imull %ebp, %edi
movslq %edi, %rdi
salq $2, %rdi
call _Znam@PLT
movq %rax, 8(%rsp)
movslq %ebp, %rbp
movabsq $2305843009213693950, %rax
cmpq %rbp, %rax
jnb .L33
movq 104(%rsp), %rax
subq %fs:40, %rax
je .L16
call __stack_chk_fail@PLT
.L16:
call __cxa_throw_bad_array_new_length@PLT
.L42:
cmpl $0, 44(%rsp)
jle .L19
jmp .L18
.L43:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %r9
movl $54, %r8d
leaq .LC2(%rip), %rcx
leaq .LC3(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $1, %edi
call exit@PLT
.L44:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %r9
movl $55, %r8d
leaq .LC2(%rip), %rcx
leaq .LC3(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $1, %edi
call exit@PLT
.L45:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %r9
movl $56, %r8d
leaq .LC2(%rip), %rcx
leaq .LC3(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $1, %edi
call exit@PLT
.L46:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %r9
movl $58, %r8d
leaq .LC2(%rip), %rcx
leaq .LC3(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $1, %edi
call exit@PLT
.L47:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %r9
movl $59, %r8d
leaq .LC2(%rip), %rcx
leaq .LC3(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $1, %edi
call exit@PLT
.L48:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %r9
movl $60, %r8d
leaq .LC2(%rip), %rcx
leaq .LC3(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $1, %edi
call exit@PLT
.L49:
movss .LC4(%rip), %xmm0
movl %r13d, %ecx
movq 56(%rsp), %rdx
movq 72(%rsp), %rsi
movq 64(%rsp), %rdi
call _Z31__device_stub__Z6kernelPfS_S_ifPfS_S_if
jmp .L27
.L50:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %r9
movl $67, %r8d
leaq .LC2(%rip), %rcx
leaq .LC3(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $1, %edi
call exit@PLT
.L51:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %r9
movl $68, %r8d
leaq .LC2(%rip), %rcx
leaq .LC3(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $1, %edi
call exit@PLT
.L52:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %r9
movl $69, %r8d
leaq .LC2(%rip), %rcx
leaq .LC3(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $1, %edi
call exit@PLT
.L53:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %r9
movl $70, %r8d
leaq .LC2(%rip), %rcx
leaq .LC3(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $1, %edi
call exit@PLT
.L54:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %r9
movl $71, %r8d
leaq .LC2(%rip), %rcx
leaq .LC3(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $1, %edi
call exit@PLT
.L55:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2156:
.size main, .-main
.section .rodata.str1.1
.LC7:
.string "_Z6kernelPfS_S_if"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2186:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC7(%rip), %rdx
movq %rdx, %rcx
leaq _Z6kernelPfS_S_if(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2186:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC1:
.long 805306368
.align 4
.LC4:
.long 1067869798
.align 4
.LC5:
.long 1315859240
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <chrono>
#include <cstdio>
#include <cstdlib>
#include <cuda.h>
#define cudaCheck(op) \
do { \
cudaError_t err = op; \
if (cudaSuccess != err) \
{ \
fprintf(stderr, \
"%s:%d CUDA operation failed: %s\n", \
__FILE__, __LINE__, \
cudaGetErrorString(err)); \
exit(EXIT_FAILURE); \
} \
} while(0)
//#define cudaCheck(op) op
__global__ void kernel(float *K, float *g1, float *M, int N, float k)
{
int i = blockIdx.x*blockDim.x + threadIdx.x;
int j = blockIdx.y*blockDim.y + threadIdx.y;
if (i < N && j < N) M[i+j*N] = g1[N+i-j] * (K[i]+k) * (K[j]+k);
}
int main(int argc, char **argv)
{
using namespace std::chrono;
int N = 1000;
if (argc == 2) {
N = atoi(argv[1]);
}
printf("Using %d x %d\n", N, N);
auto t0 = high_resolution_clock::now();
float *M = new float[N*N];
float *K = new float[N];
float *g1 = new float[2*N];
float k = 1.3;
for (int i=0; i<N; i++)
K[i] = rand() / (float)RAND_MAX;
for (int i=0; i<2*N; i++)
g1[i] = rand() / (float)RAND_MAX;
float *d_M = NULL;
float *d_K = NULL;
float *d_g1 = NULL;
cudaCheck(cudaMalloc((void**)&d_M, sizeof(float)*N*N));
cudaCheck(cudaMalloc((void**)&d_K, sizeof(float)*N ));
cudaCheck(cudaMalloc((void**)&d_g1, sizeof(float)*2*N));
cudaCheck(cudaMemcpy(d_M, M, sizeof(float)*N*N, cudaMemcpyHostToDevice));
cudaCheck(cudaMemcpy(d_K, K, sizeof(float)*N , cudaMemcpyHostToDevice));
cudaCheck(cudaMemcpy(d_g1, g1, sizeof(float)*2*N, cudaMemcpyHostToDevice));
dim3 dimBlock(128);
dim3 dimGrid((N+dimBlock.x-1)/dimBlock.x,
(N+dimBlock.y-1)/dimBlock.y);
kernel<<<dimGrid,dimBlock>>>(d_K,d_g1,d_M,N,k);
cudaCheck(cudaGetLastError());
cudaCheck(cudaMemcpy(M, d_M, sizeof(float)*N*N, cudaMemcpyDeviceToHost));
cudaCheck(cudaFree(d_M));
cudaCheck(cudaFree(d_K));
cudaCheck(cudaFree(d_g1));
delete[] M;
delete[] K;
delete[] g1;
duration<float> t = high_resolution_clock::now() - t0;
printf("GPU took %f seconds\n", t.count());
return 0;
} | #include <chrono>
#include <cstdio>
#include <cstdlib>
#include <hip/hip_runtime.h>
#define cudaCheck(op) \
do { \
hipError_t err = op; \
if (hipSuccess != err) \
{ \
fprintf(stderr, \
"%s:%d CUDA operation failed: %s\n", \
__FILE__, __LINE__, \
hipGetErrorString(err)); \
exit(EXIT_FAILURE); \
} \
} while(0)
//#define cudaCheck(op) op
__global__ void kernel(float *K, float *g1, float *M, int N, float k)
{
int i = blockIdx.x*blockDim.x + threadIdx.x;
int j = blockIdx.y*blockDim.y + threadIdx.y;
if (i < N && j < N) M[i+j*N] = g1[N+i-j] * (K[i]+k) * (K[j]+k);
}
int main(int argc, char **argv)
{
using namespace std::chrono;
int N = 1000;
if (argc == 2) {
N = atoi(argv[1]);
}
printf("Using %d x %d\n", N, N);
auto t0 = high_resolution_clock::now();
float *M = new float[N*N];
float *K = new float[N];
float *g1 = new float[2*N];
float k = 1.3;
for (int i=0; i<N; i++)
K[i] = rand() / (float)RAND_MAX;
for (int i=0; i<2*N; i++)
g1[i] = rand() / (float)RAND_MAX;
float *d_M = NULL;
float *d_K = NULL;
float *d_g1 = NULL;
cudaCheck(hipMalloc((void**)&d_M, sizeof(float)*N*N));
cudaCheck(hipMalloc((void**)&d_K, sizeof(float)*N ));
cudaCheck(hipMalloc((void**)&d_g1, sizeof(float)*2*N));
cudaCheck(hipMemcpy(d_M, M, sizeof(float)*N*N, hipMemcpyHostToDevice));
cudaCheck(hipMemcpy(d_K, K, sizeof(float)*N , hipMemcpyHostToDevice));
cudaCheck(hipMemcpy(d_g1, g1, sizeof(float)*2*N, hipMemcpyHostToDevice));
dim3 dimBlock(128);
dim3 dimGrid((N+dimBlock.x-1)/dimBlock.x,
(N+dimBlock.y-1)/dimBlock.y);
kernel<<<dimGrid,dimBlock>>>(d_K,d_g1,d_M,N,k);
cudaCheck(hipGetLastError());
cudaCheck(hipMemcpy(M, d_M, sizeof(float)*N*N, hipMemcpyDeviceToHost));
cudaCheck(hipFree(d_M));
cudaCheck(hipFree(d_K));
cudaCheck(hipFree(d_g1));
delete[] M;
delete[] K;
delete[] g1;
duration<float> t = high_resolution_clock::now() - t0;
printf("GPU took %f seconds\n", t.count());
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <chrono>
#include <cstdio>
#include <cstdlib>
#include <hip/hip_runtime.h>
#define cudaCheck(op) \
do { \
hipError_t err = op; \
if (hipSuccess != err) \
{ \
fprintf(stderr, \
"%s:%d CUDA operation failed: %s\n", \
__FILE__, __LINE__, \
hipGetErrorString(err)); \
exit(EXIT_FAILURE); \
} \
} while(0)
//#define cudaCheck(op) op
__global__ void kernel(float *K, float *g1, float *M, int N, float k)
{
int i = blockIdx.x*blockDim.x + threadIdx.x;
int j = blockIdx.y*blockDim.y + threadIdx.y;
if (i < N && j < N) M[i+j*N] = g1[N+i-j] * (K[i]+k) * (K[j]+k);
}
int main(int argc, char **argv)
{
using namespace std::chrono;
int N = 1000;
if (argc == 2) {
N = atoi(argv[1]);
}
printf("Using %d x %d\n", N, N);
auto t0 = high_resolution_clock::now();
float *M = new float[N*N];
float *K = new float[N];
float *g1 = new float[2*N];
float k = 1.3;
for (int i=0; i<N; i++)
K[i] = rand() / (float)RAND_MAX;
for (int i=0; i<2*N; i++)
g1[i] = rand() / (float)RAND_MAX;
float *d_M = NULL;
float *d_K = NULL;
float *d_g1 = NULL;
cudaCheck(hipMalloc((void**)&d_M, sizeof(float)*N*N));
cudaCheck(hipMalloc((void**)&d_K, sizeof(float)*N ));
cudaCheck(hipMalloc((void**)&d_g1, sizeof(float)*2*N));
cudaCheck(hipMemcpy(d_M, M, sizeof(float)*N*N, hipMemcpyHostToDevice));
cudaCheck(hipMemcpy(d_K, K, sizeof(float)*N , hipMemcpyHostToDevice));
cudaCheck(hipMemcpy(d_g1, g1, sizeof(float)*2*N, hipMemcpyHostToDevice));
dim3 dimBlock(128);
dim3 dimGrid((N+dimBlock.x-1)/dimBlock.x,
(N+dimBlock.y-1)/dimBlock.y);
kernel<<<dimGrid,dimBlock>>>(d_K,d_g1,d_M,N,k);
cudaCheck(hipGetLastError());
cudaCheck(hipMemcpy(M, d_M, sizeof(float)*N*N, hipMemcpyDeviceToHost));
cudaCheck(hipFree(d_M));
cudaCheck(hipFree(d_K));
cudaCheck(hipFree(d_g1));
delete[] M;
delete[] K;
delete[] g1;
duration<float> t = high_resolution_clock::now() - t0;
printf("GPU took %f seconds\n", t.count());
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6kernelPfS_S_if
.globl _Z6kernelPfS_S_if
.p2align 8
.type _Z6kernelPfS_S_if,@function
_Z6kernelPfS_S_if:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x2c
s_load_b32 s2, s[0:1], 0x18
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v4, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s3, 0xffff
s_lshr_b32 s3, s3, 16
v_mad_u64_u32 v[0:1], null, s14, s4, v[2:3]
v_mad_u64_u32 v[2:3], null, s15, s3, v[4:5]
s_mov_b32 s3, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_max_i32_e32 v1, v0, v2
v_cmpx_gt_i32_e64 s2, v1
s_cbranch_execz .LBB0_2
s_clause 0x2
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[8:9], s[0:1], 0x10
s_load_b32 s0, s[0:1], 0x1c
v_add_nc_u32_e32 v1, s2, v0
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_sub_nc_u32_e32 v4, v1, v2
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[8:9], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_ashrrev_i32_e32 v5, 31, v4
v_lshlrev_b64 v[6:7], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[3:4], 2, v[4:5]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v5, vcc_lo, s4, v6
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v6, vcc_lo, s5, v7, vcc_lo
v_add_co_u32 v7, vcc_lo, s4, v8
v_add_co_ci_u32_e32 v8, vcc_lo, s5, v9, vcc_lo
v_add_co_u32 v3, vcc_lo, s6, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
s_clause 0x1
global_load_b32 v1, v[5:6], off
global_load_b32 v5, v[7:8], off
global_load_b32 v6, v[3:4], off
s_waitcnt vmcnt(2)
v_mad_u64_u32 v[3:4], null, v2, s2, v[0:1]
s_waitcnt vmcnt(1)
v_add_f32_e32 v2, s0, v5
v_add_f32_e32 v0, s0, v1
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
v_mul_f32_e32 v5, v6, v0
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_f32_e32 v2, v5, v2
v_lshlrev_b64 v[0:1], 2, v[3:4]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s8, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z6kernelPfS_S_if
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 10
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z6kernelPfS_S_if, .Lfunc_end0-_Z6kernelPfS_S_if
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 28
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z6kernelPfS_S_if
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z6kernelPfS_S_if.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 10
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <chrono>
#include <cstdio>
#include <cstdlib>
#include <hip/hip_runtime.h>
#define cudaCheck(op) \
do { \
hipError_t err = op; \
if (hipSuccess != err) \
{ \
fprintf(stderr, \
"%s:%d CUDA operation failed: %s\n", \
__FILE__, __LINE__, \
hipGetErrorString(err)); \
exit(EXIT_FAILURE); \
} \
} while(0)
//#define cudaCheck(op) op
__global__ void kernel(float *K, float *g1, float *M, int N, float k)
{
int i = blockIdx.x*blockDim.x + threadIdx.x;
int j = blockIdx.y*blockDim.y + threadIdx.y;
if (i < N && j < N) M[i+j*N] = g1[N+i-j] * (K[i]+k) * (K[j]+k);
}
int main(int argc, char **argv)
{
using namespace std::chrono;
int N = 1000;
if (argc == 2) {
N = atoi(argv[1]);
}
printf("Using %d x %d\n", N, N);
auto t0 = high_resolution_clock::now();
float *M = new float[N*N];
float *K = new float[N];
float *g1 = new float[2*N];
float k = 1.3;
for (int i=0; i<N; i++)
K[i] = rand() / (float)RAND_MAX;
for (int i=0; i<2*N; i++)
g1[i] = rand() / (float)RAND_MAX;
float *d_M = NULL;
float *d_K = NULL;
float *d_g1 = NULL;
cudaCheck(hipMalloc((void**)&d_M, sizeof(float)*N*N));
cudaCheck(hipMalloc((void**)&d_K, sizeof(float)*N ));
cudaCheck(hipMalloc((void**)&d_g1, sizeof(float)*2*N));
cudaCheck(hipMemcpy(d_M, M, sizeof(float)*N*N, hipMemcpyHostToDevice));
cudaCheck(hipMemcpy(d_K, K, sizeof(float)*N , hipMemcpyHostToDevice));
cudaCheck(hipMemcpy(d_g1, g1, sizeof(float)*2*N, hipMemcpyHostToDevice));
dim3 dimBlock(128);
dim3 dimGrid((N+dimBlock.x-1)/dimBlock.x,
(N+dimBlock.y-1)/dimBlock.y);
kernel<<<dimGrid,dimBlock>>>(d_K,d_g1,d_M,N,k);
cudaCheck(hipGetLastError());
cudaCheck(hipMemcpy(M, d_M, sizeof(float)*N*N, hipMemcpyDeviceToHost));
cudaCheck(hipFree(d_M));
cudaCheck(hipFree(d_K));
cudaCheck(hipFree(d_g1));
delete[] M;
delete[] K;
delete[] g1;
duration<float> t = high_resolution_clock::now() - t0;
printf("GPU took %f seconds\n", t.count());
return 0;
} | .text
.file "sparse_mat.hip"
.globl _Z21__device_stub__kernelPfS_S_if # -- Begin function _Z21__device_stub__kernelPfS_S_if
.p2align 4, 0x90
.type _Z21__device_stub__kernelPfS_S_if,@function
_Z21__device_stub__kernelPfS_S_if: # @_Z21__device_stub__kernelPfS_S_if
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
movss %xmm0, (%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
movq %rsp, %rax
movq %rax, 112(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z6kernelPfS_S_if, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z21__device_stub__kernelPfS_S_if, .Lfunc_end0-_Z21__device_stub__kernelPfS_S_if
.cfi_endproc
# -- End function
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function main
.LCPI1_0:
.long 0x30000000 # float 4.65661287E-10
.LCPI1_1:
.long 0x4e6e6b28 # float 1.0E+9
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $184, %rsp
.cfi_def_cfa_offset 240
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl $1000, %ebx # imm = 0x3E8
cmpl $2, %edi
jne .LBB1_2
# %bb.1:
movq 8(%rsi), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %rbx
.LBB1_2:
movl $.L.str, %edi
movl %ebx, %esi
movl %ebx, %edx
xorl %eax, %eax
callq printf
callq _ZNSt6chrono3_V212system_clock3nowEv
movq %rax, 48(%rsp) # 8-byte Spill
movl %ebx, %edi
imull %edi, %edi
shlq $2, %rdi
callq _Znam
movq %rax, 56(%rsp) # 8-byte Spill
movq %rbx, 32(%rsp) # 8-byte Spill
movslq %ebx, %rbx
leaq (,%rbx,4), %rdi
leal (%rbx,%rbx), %ebp
movslq %ebp, %r12
shlq $2, %r12
testl %ebx, %ebx
movq $-1, %rax
movq %rdi, 64(%rsp) # 8-byte Spill
cmovsq %rax, %rdi
cmovsq %rax, %r12
callq _Znam
movq %rax, %r15
movq %r12, %rdi
callq _Znam
movq %rax, %r12
testl %ebx, %ebx
jle .LBB1_5
# %bb.3: # %.lr.ph.preheader
movl 32(%rsp), %r14d # 4-byte Reload
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB1_4: # %.lr.ph
# =>This Inner Loop Header: Depth=1
callq rand
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
mulss .LCPI1_0(%rip), %xmm0
movss %xmm0, (%r15,%r13,4)
incq %r13
cmpq %r13, %r14
jne .LBB1_4
.LBB1_5: # %.preheader
cmpl $0, 32(%rsp) # 4-byte Folded Reload
jle .LBB1_8
# %bb.6: # %.lr.ph98.preheader
cmpl $2, %ebp
movl $1, %r14d
cmovgel %ebp, %r14d
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB1_7: # %.lr.ph98
# =>This Inner Loop Header: Depth=1
callq rand
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
mulss .LCPI1_0(%rip), %xmm0
movss %xmm0, (%r12,%r13,4)
incq %r13
cmpq %r13, %r14
jne .LBB1_7
.LBB1_8: # %._crit_edge
movq $0, 8(%rsp)
movq $0, 24(%rsp)
movq $0, 16(%rsp)
movq 64(%rsp), %r13 # 8-byte Reload
movq %r13, %rbp
imulq %rbx, %rbp
leaq 8(%rsp), %rdi
movq %rbp, %rsi
callq hipMalloc
testl %eax, %eax
jne .LBB1_9
# %bb.11:
leaq 24(%rsp), %rdi
movq %r13, %rsi
callq hipMalloc
testl %eax, %eax
movq 56(%rsp), %r14 # 8-byte Reload
jne .LBB1_12
# %bb.13:
shlq $3, %rbx
leaq 16(%rsp), %rdi
movq %rbx, %rsi
callq hipMalloc
testl %eax, %eax
jne .LBB1_14
# %bb.15:
movq 8(%rsp), %rdi
movq %r14, %rsi
movq %rbp, %rdx
movl $1, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB1_16
# %bb.17:
movq 24(%rsp), %rdi
movq %r15, %rsi
movq %r13, %rdx
movl $1, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB1_18
# %bb.19:
movq 16(%rsp), %rdi
movq %r12, %rsi
movq %rbx, %rdx
movl $1, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB1_20
# %bb.21:
movq 32(%rsp), %rbx # 8-byte Reload
leal 127(%rbx), %eax
shrl $7, %eax
movq %rbx, %rdi
shlq $32, %rdi
orq %rax, %rdi
movabsq $4294967424, %rdx # imm = 0x100000080
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_23
# %bb.22:
movq 24(%rsp), %rax
movq 16(%rsp), %rcx
movq 8(%rsp), %rdx
movq %rax, 136(%rsp)
movq %rcx, 128(%rsp)
movq %rdx, 120(%rsp)
movl %ebx, 44(%rsp)
movl $1067869798, 40(%rsp) # imm = 0x3FA66666
leaq 136(%rsp), %rax
movq %rax, 144(%rsp)
leaq 128(%rsp), %rax
movq %rax, 152(%rsp)
leaq 120(%rsp), %rax
movq %rax, 160(%rsp)
leaq 44(%rsp), %rax
movq %rax, 168(%rsp)
leaq 40(%rsp), %rax
movq %rax, 176(%rsp)
leaq 104(%rsp), %rdi
leaq 88(%rsp), %rsi
leaq 80(%rsp), %rdx
leaq 72(%rsp), %rcx
callq __hipPopCallConfiguration
movq 104(%rsp), %rsi
movl 112(%rsp), %edx
movq 88(%rsp), %rcx
movl 96(%rsp), %r8d
leaq 144(%rsp), %r9
movl $_Z6kernelPfS_S_if, %edi
pushq 72(%rsp)
.cfi_adjust_cfa_offset 8
pushq 88(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_23:
callq hipGetLastError
testl %eax, %eax
jne .LBB1_24
# %bb.25:
movq 8(%rsp), %rsi
movq %r14, %rdi
movq %rbp, %rdx
movl $2, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB1_26
# %bb.27:
movq 8(%rsp), %rdi
callq hipFree
testl %eax, %eax
jne .LBB1_28
# %bb.29:
movq 24(%rsp), %rdi
callq hipFree
testl %eax, %eax
jne .LBB1_30
# %bb.31:
movq 16(%rsp), %rdi
callq hipFree
testl %eax, %eax
jne .LBB1_32
# %bb.33:
movq %r14, %rdi
callq _ZdaPv
movq %r15, %rdi
callq _ZdaPv
movq %r12, %rdi
callq _ZdaPv
callq _ZNSt6chrono3_V212system_clock3nowEv
subq 48(%rsp), %rax # 8-byte Folded Reload
cvtsi2ss %rax, %xmm0
divss .LCPI1_1(%rip), %xmm0
cvtss2sd %xmm0, %xmm0
movl $.L.str.3, %edi
movb $1, %al
callq printf
xorl %eax, %eax
addq $184, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB1_9:
.cfi_def_cfa_offset 240
movq stderr(%rip), %rbx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.1, %esi
movl $.L.str.2, %edx
movq %rbx, %rdi
movl $54, %ecx
jmp .LBB1_10
.LBB1_12:
movq stderr(%rip), %rbx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.1, %esi
movl $.L.str.2, %edx
movq %rbx, %rdi
movl $55, %ecx
jmp .LBB1_10
.LBB1_14:
movq stderr(%rip), %rbx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.1, %esi
movl $.L.str.2, %edx
movq %rbx, %rdi
movl $56, %ecx
jmp .LBB1_10
.LBB1_16:
movq stderr(%rip), %rbx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.1, %esi
movl $.L.str.2, %edx
movq %rbx, %rdi
movl $58, %ecx
jmp .LBB1_10
.LBB1_18:
movq stderr(%rip), %rbx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.1, %esi
movl $.L.str.2, %edx
movq %rbx, %rdi
movl $59, %ecx
jmp .LBB1_10
.LBB1_20:
movq stderr(%rip), %rbx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.1, %esi
movl $.L.str.2, %edx
movq %rbx, %rdi
movl $60, %ecx
jmp .LBB1_10
.LBB1_24:
movq stderr(%rip), %rbx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.1, %esi
movl $.L.str.2, %edx
movq %rbx, %rdi
movl $67, %ecx
jmp .LBB1_10
.LBB1_26:
movq stderr(%rip), %rbx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.1, %esi
movl $.L.str.2, %edx
movq %rbx, %rdi
movl $68, %ecx
jmp .LBB1_10
.LBB1_28:
movq stderr(%rip), %rbx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.1, %esi
movl $.L.str.2, %edx
movq %rbx, %rdi
movl $69, %ecx
jmp .LBB1_10
.LBB1_30:
movq stderr(%rip), %rbx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.1, %esi
movl $.L.str.2, %edx
movq %rbx, %rdi
movl $70, %ecx
jmp .LBB1_10
.LBB1_32:
movq stderr(%rip), %rbx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.1, %esi
movl $.L.str.2, %edx
movq %rbx, %rdi
movl $71, %ecx
.LBB1_10:
movq %rax, %r8
xorl %eax, %eax
callq fprintf
movl $1, %edi
callq exit
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z6kernelPfS_S_if, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z6kernelPfS_S_if,@object # @_Z6kernelPfS_S_if
.section .rodata,"a",@progbits
.globl _Z6kernelPfS_S_if
.p2align 3, 0x0
_Z6kernelPfS_S_if:
.quad _Z21__device_stub__kernelPfS_S_if
.size _Z6kernelPfS_S_if, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Using %d x %d\n"
.size .L.str, 15
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "%s:%d CUDA operation failed: %s\n"
.size .L.str.1, 33
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "/home/ubuntu/Datasets/stackv2/train-structured-repos-hip/mariogazziro/AutoML_GPU/main/sparse_mat/sparse_mat.hip"
.size .L.str.2, 112
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "GPU took %f seconds\n"
.size .L.str.3, 21
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z6kernelPfS_S_if"
.size .L__unnamed_1, 18
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z21__device_stub__kernelPfS_S_if
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z6kernelPfS_S_if
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z6kernelPfS_S_if
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R9, SR_CTAID.Y ; /* 0x0000000000097919 */
/* 0x000e280000002600 */
/*0020*/ S2R R2, SR_TID.Y ; /* 0x0000000000027919 */
/* 0x000e280000002200 */
/*0030*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e680000002500 */
/*0040*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e620000002100 */
/*0050*/ IMAD R9, R9, c[0x0][0x4], R2 ; /* 0x0000010009097a24 */
/* 0x001fca00078e0202 */
/*0060*/ ISETP.GE.AND P0, PT, R9, c[0x0][0x178], PT ; /* 0x00005e0009007a0c */
/* 0x000fe20003f06270 */
/*0070*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x002fca00078e0203 */
/*0080*/ ISETP.GE.OR P0, PT, R0, c[0x0][0x178], P0 ; /* 0x00005e0000007a0c */
/* 0x000fda0000706670 */
/*0090*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*00a0*/ HFMA2.MMA R10, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff0a7435 */
/* 0x000fe200000001ff */
/*00b0*/ IADD3 R2, R0, c[0x0][0x178], -R9 ; /* 0x00005e0000027a10 */
/* 0x000fe20007ffe809 */
/*00c0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fd00000000a00 */
/*00d0*/ IMAD.WIDE R4, R0, R10, c[0x0][0x160] ; /* 0x0000580000047625 */
/* 0x000fc800078e020a */
/*00e0*/ IMAD.WIDE R6, R9.reuse, R10.reuse, c[0x0][0x160] ; /* 0x0000580009067625 */
/* 0x0c0fe400078e020a */
/*00f0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ea4000c1e1900 */
/*0100*/ IMAD.WIDE R2, R2, R10, c[0x0][0x168] ; /* 0x00005a0002027625 */
/* 0x000fe400078e020a */
/*0110*/ LDG.E R6, [R6.64] ; /* 0x0000000406067981 */
/* 0x000ee8000c1e1900 */
/*0120*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */
/* 0x000f22000c1e1900 */
/*0130*/ IMAD R9, R9, c[0x0][0x178], R0 ; /* 0x00005e0009097a24 */
/* 0x000fc400078e0200 */
/*0140*/ FADD R8, R4, c[0x0][0x17c] ; /* 0x00005f0004087621 */
/* 0x004fe40000000000 */
/*0150*/ FADD R11, R6, c[0x0][0x17c] ; /* 0x00005f00060b7621 */
/* 0x008fe40000000000 */
/*0160*/ FMUL R0, R8, R3 ; /* 0x0000000308007220 */
/* 0x010fe40000400000 */
/*0170*/ IMAD.WIDE R8, R9, R10, c[0x0][0x170] ; /* 0x00005c0009087625 */
/* 0x000fc800078e020a */
/*0180*/ FMUL R11, R0, R11 ; /* 0x0000000b000b7220 */
/* 0x000fca0000400000 */
/*0190*/ STG.E [R8.64], R11 ; /* 0x0000000b08007986 */
/* 0x000fe2000c101904 */
/*01a0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*01b0*/ BRA 0x1b0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*01c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0200*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0210*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0220*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0230*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0240*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0250*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0260*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0270*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6kernelPfS_S_if
.globl _Z6kernelPfS_S_if
.p2align 8
.type _Z6kernelPfS_S_if,@function
_Z6kernelPfS_S_if:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x2c
s_load_b32 s2, s[0:1], 0x18
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v4, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s3, 0xffff
s_lshr_b32 s3, s3, 16
v_mad_u64_u32 v[0:1], null, s14, s4, v[2:3]
v_mad_u64_u32 v[2:3], null, s15, s3, v[4:5]
s_mov_b32 s3, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_max_i32_e32 v1, v0, v2
v_cmpx_gt_i32_e64 s2, v1
s_cbranch_execz .LBB0_2
s_clause 0x2
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[8:9], s[0:1], 0x10
s_load_b32 s0, s[0:1], 0x1c
v_add_nc_u32_e32 v1, s2, v0
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_sub_nc_u32_e32 v4, v1, v2
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[8:9], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_ashrrev_i32_e32 v5, 31, v4
v_lshlrev_b64 v[6:7], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[3:4], 2, v[4:5]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v5, vcc_lo, s4, v6
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v6, vcc_lo, s5, v7, vcc_lo
v_add_co_u32 v7, vcc_lo, s4, v8
v_add_co_ci_u32_e32 v8, vcc_lo, s5, v9, vcc_lo
v_add_co_u32 v3, vcc_lo, s6, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
s_clause 0x1
global_load_b32 v1, v[5:6], off
global_load_b32 v5, v[7:8], off
global_load_b32 v6, v[3:4], off
s_waitcnt vmcnt(2)
v_mad_u64_u32 v[3:4], null, v2, s2, v[0:1]
s_waitcnt vmcnt(1)
v_add_f32_e32 v2, s0, v5
v_add_f32_e32 v0, s0, v1
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
v_mul_f32_e32 v5, v6, v0
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_f32_e32 v2, v5, v2
v_lshlrev_b64 v[0:1], 2, v[3:4]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s8, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z6kernelPfS_S_if
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 10
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z6kernelPfS_S_if, .Lfunc_end0-_Z6kernelPfS_S_if
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 28
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z6kernelPfS_S_if
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z6kernelPfS_S_if.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 10
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000ae8a2_00000000-6_sparse_mat.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2161:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2161:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z31__device_stub__Z6kernelPfS_S_ifPfS_S_if
.type _Z31__device_stub__Z6kernelPfS_S_ifPfS_S_if, @function
_Z31__device_stub__Z6kernelPfS_S_ifPfS_S_if:
.LFB2183:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movss %xmm0, (%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movq %rsp, %rax
movq %rax, 128(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z6kernelPfS_S_if(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2183:
.size _Z31__device_stub__Z6kernelPfS_S_ifPfS_S_if, .-_Z31__device_stub__Z6kernelPfS_S_ifPfS_S_if
.globl _Z6kernelPfS_S_if
.type _Z6kernelPfS_S_if, @function
_Z6kernelPfS_S_if:
.LFB2184:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z31__device_stub__Z6kernelPfS_S_ifPfS_S_if
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2184:
.size _Z6kernelPfS_S_if, .-_Z6kernelPfS_S_if
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Using %d x %d\n"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC2:
.string "/home/ubuntu/Datasets/stackv2/train-structured/mariogazziro/AutoML_GPU/main/sparse_mat/sparse_mat.cu"
.align 8
.LC3:
.string "%s:%d CUDA operation failed: %s\n"
.section .rodata.str1.1
.LC6:
.string "GPU took %f seconds\n"
.text
.globl main
.type main, @function
main:
.LFB2156:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $120, %rsp
.cfi_def_cfa_offset 176
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
cmpl $2, %edi
je .L41
movl $1000, %ecx
movl $1000, %edx
leaq .LC0(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
call _ZNSt6chrono3_V212system_clock3nowEv@PLT
movq %rax, 32(%rsp)
movl $4000000, %edi
call _Znam@PLT
movq %rax, 8(%rsp)
movl $1000, %ebp
movl $1000, %r13d
.L33:
leaq 0(,%rbp,4), %r14
movq %r14, %rdi
call _Znam@PLT
movq %rax, %r12
leal (%r13,%r13), %eax
movl %eax, 44(%rsp)
cltq
salq $2, %rax
movq %rax, 24(%rsp)
movq %rax, %rdi
call _Znam@PLT
movq %rax, 16(%rsp)
movq %r12, %rbx
leaq (%r14,%r12), %r15
testl %r13d, %r13d
jle .L42
.L17:
call rand@PLT
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
mulss .LC1(%rip), %xmm0
movss %xmm0, (%rbx)
addq $4, %rbx
cmpq %r15, %rbx
jne .L17
.L18:
movq 16(%rsp), %rcx
movq %rcx, %rbx
leal (%r13,%r13), %eax
leaq (%rcx,%rax,4), %r15
.L20:
call rand@PLT
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
mulss .LC1(%rip), %xmm0
movss %xmm0, (%rbx)
addq $4, %rbx
cmpq %r15, %rbx
jne .L20
.L19:
movq $0, 56(%rsp)
movq $0, 64(%rsp)
movq $0, 72(%rsp)
imulq %rbp, %rbp
salq $2, %rbp
leaq 56(%rsp), %rdi
movq %rbp, %rsi
call cudaMalloc@PLT
testl %eax, %eax
jne .L43
leaq 64(%rsp), %rdi
movq %r14, %rsi
call cudaMalloc@PLT
testl %eax, %eax
jne .L44
leaq 72(%rsp), %rdi
movq 24(%rsp), %rsi
call cudaMalloc@PLT
testl %eax, %eax
jne .L45
movl $1, %ecx
movq %rbp, %rdx
movq 8(%rsp), %rsi
movq 56(%rsp), %rdi
call cudaMemcpy@PLT
testl %eax, %eax
jne .L46
movl $1, %ecx
movq %r14, %rdx
movq %r12, %rsi
movq 64(%rsp), %rdi
call cudaMemcpy@PLT
testl %eax, %eax
jne .L47
movl $1, %ecx
movq 24(%rsp), %rdx
movq 16(%rsp), %rsi
movq 72(%rsp), %rdi
call cudaMemcpy@PLT
testl %eax, %eax
jne .L48
leal 127(%r13), %eax
shrl $7, %eax
movl %eax, 92(%rsp)
movl %r13d, 96(%rsp)
movl $128, 80(%rsp)
movl $1, 84(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 80(%rsp), %rdx
movl $1, %ecx
movq 92(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L49
.L27:
call cudaGetLastError@PLT
testl %eax, %eax
jne .L50
movl $2, %ecx
movq %rbp, %rdx
movq 56(%rsp), %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
testl %eax, %eax
jne .L51
movq 56(%rsp), %rdi
call cudaFree@PLT
testl %eax, %eax
jne .L52
movq 64(%rsp), %rdi
call cudaFree@PLT
testl %eax, %eax
jne .L53
movq 72(%rsp), %rdi
call cudaFree@PLT
testl %eax, %eax
jne .L54
movq 8(%rsp), %rdi
call _ZdaPv@PLT
movq %r12, %rdi
call _ZdaPv@PLT
movq 16(%rsp), %rdi
call _ZdaPv@PLT
call _ZNSt6chrono3_V212system_clock3nowEv@PLT
movq 32(%rsp), %rdx
subq %rdx, %rax
pxor %xmm0, %xmm0
cvtsi2ssq %rax, %xmm0
divss .LC5(%rip), %xmm0
cvtss2sd %xmm0, %xmm0
leaq .LC6(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L55
movl $0, %eax
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L41:
.cfi_restore_state
movq 8(%rsi), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, %rbp
movl %eax, %r13d
movl %eax, %ecx
movl %eax, %edx
leaq .LC0(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
call _ZNSt6chrono3_V212system_clock3nowEv@PLT
movq %rax, 32(%rsp)
movl %ebp, %edi
imull %ebp, %edi
movslq %edi, %rdi
salq $2, %rdi
call _Znam@PLT
movq %rax, 8(%rsp)
movslq %ebp, %rbp
movabsq $2305843009213693950, %rax
cmpq %rbp, %rax
jnb .L33
movq 104(%rsp), %rax
subq %fs:40, %rax
je .L16
call __stack_chk_fail@PLT
.L16:
call __cxa_throw_bad_array_new_length@PLT
.L42:
cmpl $0, 44(%rsp)
jle .L19
jmp .L18
.L43:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %r9
movl $54, %r8d
leaq .LC2(%rip), %rcx
leaq .LC3(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $1, %edi
call exit@PLT
.L44:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %r9
movl $55, %r8d
leaq .LC2(%rip), %rcx
leaq .LC3(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $1, %edi
call exit@PLT
.L45:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %r9
movl $56, %r8d
leaq .LC2(%rip), %rcx
leaq .LC3(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $1, %edi
call exit@PLT
.L46:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %r9
movl $58, %r8d
leaq .LC2(%rip), %rcx
leaq .LC3(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $1, %edi
call exit@PLT
.L47:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %r9
movl $59, %r8d
leaq .LC2(%rip), %rcx
leaq .LC3(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $1, %edi
call exit@PLT
.L48:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %r9
movl $60, %r8d
leaq .LC2(%rip), %rcx
leaq .LC3(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $1, %edi
call exit@PLT
.L49:
movss .LC4(%rip), %xmm0
movl %r13d, %ecx
movq 56(%rsp), %rdx
movq 72(%rsp), %rsi
movq 64(%rsp), %rdi
call _Z31__device_stub__Z6kernelPfS_S_ifPfS_S_if
jmp .L27
.L50:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %r9
movl $67, %r8d
leaq .LC2(%rip), %rcx
leaq .LC3(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $1, %edi
call exit@PLT
.L51:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %r9
movl $68, %r8d
leaq .LC2(%rip), %rcx
leaq .LC3(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $1, %edi
call exit@PLT
.L52:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %r9
movl $69, %r8d
leaq .LC2(%rip), %rcx
leaq .LC3(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $1, %edi
call exit@PLT
.L53:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %r9
movl $70, %r8d
leaq .LC2(%rip), %rcx
leaq .LC3(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $1, %edi
call exit@PLT
.L54:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %r9
movl $71, %r8d
leaq .LC2(%rip), %rcx
leaq .LC3(%rip), %rdx
movl $2, %esi
movq stderr(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $1, %edi
call exit@PLT
.L55:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2156:
.size main, .-main
.section .rodata.str1.1
.LC7:
.string "_Z6kernelPfS_S_if"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2186:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC7(%rip), %rdx
movq %rdx, %rcx
leaq _Z6kernelPfS_S_if(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2186:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC1:
.long 805306368
.align 4
.LC4:
.long 1067869798
.align 4
.LC5:
.long 1315859240
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "sparse_mat.hip"
.globl _Z21__device_stub__kernelPfS_S_if # -- Begin function _Z21__device_stub__kernelPfS_S_if
.p2align 4, 0x90
.type _Z21__device_stub__kernelPfS_S_if,@function
_Z21__device_stub__kernelPfS_S_if: # @_Z21__device_stub__kernelPfS_S_if
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
movss %xmm0, (%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
movq %rsp, %rax
movq %rax, 112(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z6kernelPfS_S_if, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z21__device_stub__kernelPfS_S_if, .Lfunc_end0-_Z21__device_stub__kernelPfS_S_if
.cfi_endproc
# -- End function
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function main
.LCPI1_0:
.long 0x30000000 # float 4.65661287E-10
.LCPI1_1:
.long 0x4e6e6b28 # float 1.0E+9
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $184, %rsp
.cfi_def_cfa_offset 240
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl $1000, %ebx # imm = 0x3E8
cmpl $2, %edi
jne .LBB1_2
# %bb.1:
movq 8(%rsi), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %rbx
.LBB1_2:
movl $.L.str, %edi
movl %ebx, %esi
movl %ebx, %edx
xorl %eax, %eax
callq printf
callq _ZNSt6chrono3_V212system_clock3nowEv
movq %rax, 48(%rsp) # 8-byte Spill
movl %ebx, %edi
imull %edi, %edi
shlq $2, %rdi
callq _Znam
movq %rax, 56(%rsp) # 8-byte Spill
movq %rbx, 32(%rsp) # 8-byte Spill
movslq %ebx, %rbx
leaq (,%rbx,4), %rdi
leal (%rbx,%rbx), %ebp
movslq %ebp, %r12
shlq $2, %r12
testl %ebx, %ebx
movq $-1, %rax
movq %rdi, 64(%rsp) # 8-byte Spill
cmovsq %rax, %rdi
cmovsq %rax, %r12
callq _Znam
movq %rax, %r15
movq %r12, %rdi
callq _Znam
movq %rax, %r12
testl %ebx, %ebx
jle .LBB1_5
# %bb.3: # %.lr.ph.preheader
movl 32(%rsp), %r14d # 4-byte Reload
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB1_4: # %.lr.ph
# =>This Inner Loop Header: Depth=1
callq rand
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
mulss .LCPI1_0(%rip), %xmm0
movss %xmm0, (%r15,%r13,4)
incq %r13
cmpq %r13, %r14
jne .LBB1_4
.LBB1_5: # %.preheader
cmpl $0, 32(%rsp) # 4-byte Folded Reload
jle .LBB1_8
# %bb.6: # %.lr.ph98.preheader
cmpl $2, %ebp
movl $1, %r14d
cmovgel %ebp, %r14d
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB1_7: # %.lr.ph98
# =>This Inner Loop Header: Depth=1
callq rand
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
mulss .LCPI1_0(%rip), %xmm0
movss %xmm0, (%r12,%r13,4)
incq %r13
cmpq %r13, %r14
jne .LBB1_7
.LBB1_8: # %._crit_edge
movq $0, 8(%rsp)
movq $0, 24(%rsp)
movq $0, 16(%rsp)
movq 64(%rsp), %r13 # 8-byte Reload
movq %r13, %rbp
imulq %rbx, %rbp
leaq 8(%rsp), %rdi
movq %rbp, %rsi
callq hipMalloc
testl %eax, %eax
jne .LBB1_9
# %bb.11:
leaq 24(%rsp), %rdi
movq %r13, %rsi
callq hipMalloc
testl %eax, %eax
movq 56(%rsp), %r14 # 8-byte Reload
jne .LBB1_12
# %bb.13:
shlq $3, %rbx
leaq 16(%rsp), %rdi
movq %rbx, %rsi
callq hipMalloc
testl %eax, %eax
jne .LBB1_14
# %bb.15:
movq 8(%rsp), %rdi
movq %r14, %rsi
movq %rbp, %rdx
movl $1, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB1_16
# %bb.17:
movq 24(%rsp), %rdi
movq %r15, %rsi
movq %r13, %rdx
movl $1, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB1_18
# %bb.19:
movq 16(%rsp), %rdi
movq %r12, %rsi
movq %rbx, %rdx
movl $1, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB1_20
# %bb.21:
movq 32(%rsp), %rbx # 8-byte Reload
leal 127(%rbx), %eax
shrl $7, %eax
movq %rbx, %rdi
shlq $32, %rdi
orq %rax, %rdi
movabsq $4294967424, %rdx # imm = 0x100000080
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_23
# %bb.22:
movq 24(%rsp), %rax
movq 16(%rsp), %rcx
movq 8(%rsp), %rdx
movq %rax, 136(%rsp)
movq %rcx, 128(%rsp)
movq %rdx, 120(%rsp)
movl %ebx, 44(%rsp)
movl $1067869798, 40(%rsp) # imm = 0x3FA66666
leaq 136(%rsp), %rax
movq %rax, 144(%rsp)
leaq 128(%rsp), %rax
movq %rax, 152(%rsp)
leaq 120(%rsp), %rax
movq %rax, 160(%rsp)
leaq 44(%rsp), %rax
movq %rax, 168(%rsp)
leaq 40(%rsp), %rax
movq %rax, 176(%rsp)
leaq 104(%rsp), %rdi
leaq 88(%rsp), %rsi
leaq 80(%rsp), %rdx
leaq 72(%rsp), %rcx
callq __hipPopCallConfiguration
movq 104(%rsp), %rsi
movl 112(%rsp), %edx
movq 88(%rsp), %rcx
movl 96(%rsp), %r8d
leaq 144(%rsp), %r9
movl $_Z6kernelPfS_S_if, %edi
pushq 72(%rsp)
.cfi_adjust_cfa_offset 8
pushq 88(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_23:
callq hipGetLastError
testl %eax, %eax
jne .LBB1_24
# %bb.25:
movq 8(%rsp), %rsi
movq %r14, %rdi
movq %rbp, %rdx
movl $2, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB1_26
# %bb.27:
movq 8(%rsp), %rdi
callq hipFree
testl %eax, %eax
jne .LBB1_28
# %bb.29:
movq 24(%rsp), %rdi
callq hipFree
testl %eax, %eax
jne .LBB1_30
# %bb.31:
movq 16(%rsp), %rdi
callq hipFree
testl %eax, %eax
jne .LBB1_32
# %bb.33:
movq %r14, %rdi
callq _ZdaPv
movq %r15, %rdi
callq _ZdaPv
movq %r12, %rdi
callq _ZdaPv
callq _ZNSt6chrono3_V212system_clock3nowEv
subq 48(%rsp), %rax # 8-byte Folded Reload
cvtsi2ss %rax, %xmm0
divss .LCPI1_1(%rip), %xmm0
cvtss2sd %xmm0, %xmm0
movl $.L.str.3, %edi
movb $1, %al
callq printf
xorl %eax, %eax
addq $184, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB1_9:
.cfi_def_cfa_offset 240
movq stderr(%rip), %rbx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.1, %esi
movl $.L.str.2, %edx
movq %rbx, %rdi
movl $54, %ecx
jmp .LBB1_10
.LBB1_12:
movq stderr(%rip), %rbx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.1, %esi
movl $.L.str.2, %edx
movq %rbx, %rdi
movl $55, %ecx
jmp .LBB1_10
.LBB1_14:
movq stderr(%rip), %rbx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.1, %esi
movl $.L.str.2, %edx
movq %rbx, %rdi
movl $56, %ecx
jmp .LBB1_10
.LBB1_16:
movq stderr(%rip), %rbx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.1, %esi
movl $.L.str.2, %edx
movq %rbx, %rdi
movl $58, %ecx
jmp .LBB1_10
.LBB1_18:
movq stderr(%rip), %rbx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.1, %esi
movl $.L.str.2, %edx
movq %rbx, %rdi
movl $59, %ecx
jmp .LBB1_10
.LBB1_20:
movq stderr(%rip), %rbx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.1, %esi
movl $.L.str.2, %edx
movq %rbx, %rdi
movl $60, %ecx
jmp .LBB1_10
.LBB1_24:
movq stderr(%rip), %rbx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.1, %esi
movl $.L.str.2, %edx
movq %rbx, %rdi
movl $67, %ecx
jmp .LBB1_10
.LBB1_26:
movq stderr(%rip), %rbx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.1, %esi
movl $.L.str.2, %edx
movq %rbx, %rdi
movl $68, %ecx
jmp .LBB1_10
.LBB1_28:
movq stderr(%rip), %rbx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.1, %esi
movl $.L.str.2, %edx
movq %rbx, %rdi
movl $69, %ecx
jmp .LBB1_10
.LBB1_30:
movq stderr(%rip), %rbx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.1, %esi
movl $.L.str.2, %edx
movq %rbx, %rdi
movl $70, %ecx
jmp .LBB1_10
.LBB1_32:
movq stderr(%rip), %rbx
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.1, %esi
movl $.L.str.2, %edx
movq %rbx, %rdi
movl $71, %ecx
.LBB1_10:
movq %rax, %r8
xorl %eax, %eax
callq fprintf
movl $1, %edi
callq exit
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z6kernelPfS_S_if, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z6kernelPfS_S_if,@object # @_Z6kernelPfS_S_if
.section .rodata,"a",@progbits
.globl _Z6kernelPfS_S_if
.p2align 3, 0x0
_Z6kernelPfS_S_if:
.quad _Z21__device_stub__kernelPfS_S_if
.size _Z6kernelPfS_S_if, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Using %d x %d\n"
.size .L.str, 15
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "%s:%d CUDA operation failed: %s\n"
.size .L.str.1, 33
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "/home/ubuntu/Datasets/stackv2/train-structured-repos-hip/mariogazziro/AutoML_GPU/main/sparse_mat/sparse_mat.hip"
.size .L.str.2, 112
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "GPU took %f seconds\n"
.size .L.str.3, 21
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z6kernelPfS_S_if"
.size .L__unnamed_1, 18
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z21__device_stub__kernelPfS_S_if
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z6kernelPfS_S_if
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | /*
* setIC.cu
* MRAG
*
* Created by Diego Rossinelli on 10/9/08.
* Copyright 2008 CSE Lab, ETH Zurich. All rights reserved.
*
*/
__global__ void setIC(float * a)
{
a[blockIdx.x] = 0;
} | code for sm_80
Function : _Z5setICPf
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e220000002500 */
/*0020*/ HFMA2.MMA R3, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff037435 */
/* 0x000fe200000001ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fd20000000a00 */
/*0040*/ IMAD.WIDE.U32 R2, R2, R3, c[0x0][0x160] ; /* 0x0000580002027625 */
/* 0x001fca00078e0003 */
/*0050*/ STG.E [R2.64], RZ ; /* 0x000000ff02007986 */
/* 0x000fe2000c101904 */
/*0060*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0070*/ BRA 0x70; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0080*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0090*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /*
* setIC.cu
* MRAG
*
* Created by Diego Rossinelli on 10/9/08.
* Copyright 2008 CSE Lab, ETH Zurich. All rights reserved.
*
*/
__global__ void setIC(float * a)
{
a[blockIdx.x] = 0;
} | .file "tmpxft_0014cfa5_00000000-6_setIC.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z24__device_stub__Z5setICPfPf
.type _Z24__device_stub__Z5setICPfPf, @function
_Z24__device_stub__Z5setICPfPf:
.LFB2051:
.cfi_startproc
endbr64
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 8(%rsp)
movq %fs:40, %rax
movq %rax, 88(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 88(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $104, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 120
pushq 24(%rsp)
.cfi_def_cfa_offset 128
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z5setICPf(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 112
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z24__device_stub__Z5setICPfPf, .-_Z24__device_stub__Z5setICPfPf
.globl _Z5setICPf
.type _Z5setICPf, @function
_Z5setICPf:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z24__device_stub__Z5setICPfPf
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z5setICPf, .-_Z5setICPf
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z5setICPf"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z5setICPf(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /*
* setIC.cu
* MRAG
*
* Created by Diego Rossinelli on 10/9/08.
* Copyright 2008 CSE Lab, ETH Zurich. All rights reserved.
*
*/
__global__ void setIC(float * a)
{
a[blockIdx.x] = 0;
} | #include <hip/hip_runtime.h>
/*
* setIC.cu
* MRAG
*
* Created by Diego Rossinelli on 10/9/08.
* Copyright 2008 CSE Lab, ETH Zurich. All rights reserved.
*
*/
__global__ void setIC(float * a)
{
a[blockIdx.x] = 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
/*
* setIC.cu
* MRAG
*
* Created by Diego Rossinelli on 10/9/08.
* Copyright 2008 CSE Lab, ETH Zurich. All rights reserved.
*
*/
__global__ void setIC(float * a)
{
a[blockIdx.x] = 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z5setICPf
.globl _Z5setICPf
.p2align 8
.type _Z5setICPf,@function
_Z5setICPf:
s_load_b64 s[0:1], s[0:1], 0x0
s_mov_b32 s2, s15
s_mov_b32 s3, 0
v_mov_b32_e32 v0, 0
s_lshl_b64 s[2:3], s[2:3], 2
s_waitcnt lgkmcnt(0)
s_add_u32 s0, s0, s2
s_addc_u32 s1, s1, s3
global_store_b32 v0, v0, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z5setICPf
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 8
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 1
.amdhsa_next_free_sgpr 16
.amdhsa_reserve_vcc 0
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z5setICPf, .Lfunc_end0-_Z5setICPf
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 8
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z5setICPf
.private_segment_fixed_size: 0
.sgpr_count: 16
.sgpr_spill_count: 0
.symbol: _Z5setICPf.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 1
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
/*
* setIC.cu
* MRAG
*
* Created by Diego Rossinelli on 10/9/08.
* Copyright 2008 CSE Lab, ETH Zurich. All rights reserved.
*
*/
__global__ void setIC(float * a)
{
a[blockIdx.x] = 0;
} | .text
.file "setIC.hip"
.globl _Z20__device_stub__setICPf # -- Begin function _Z20__device_stub__setICPf
.p2align 4, 0x90
.type _Z20__device_stub__setICPf,@function
_Z20__device_stub__setICPf: # @_Z20__device_stub__setICPf
.cfi_startproc
# %bb.0:
subq $72, %rsp
.cfi_def_cfa_offset 80
movq %rdi, 64(%rsp)
leaq 64(%rsp), %rax
movq %rax, (%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
movq %rsp, %r9
movl $_Z5setICPf, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $88, %rsp
.cfi_adjust_cfa_offset -88
retq
.Lfunc_end0:
.size _Z20__device_stub__setICPf, .Lfunc_end0-_Z20__device_stub__setICPf
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z5setICPf, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z5setICPf,@object # @_Z5setICPf
.section .rodata,"a",@progbits
.globl _Z5setICPf
.p2align 3, 0x0
_Z5setICPf:
.quad _Z20__device_stub__setICPf
.size _Z5setICPf, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z5setICPf"
.size .L__unnamed_1, 11
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z20__device_stub__setICPf
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z5setICPf
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z5setICPf
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e220000002500 */
/*0020*/ HFMA2.MMA R3, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff037435 */
/* 0x000fe200000001ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fd20000000a00 */
/*0040*/ IMAD.WIDE.U32 R2, R2, R3, c[0x0][0x160] ; /* 0x0000580002027625 */
/* 0x001fca00078e0003 */
/*0050*/ STG.E [R2.64], RZ ; /* 0x000000ff02007986 */
/* 0x000fe2000c101904 */
/*0060*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0070*/ BRA 0x70; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0080*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0090*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*00f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z5setICPf
.globl _Z5setICPf
.p2align 8
.type _Z5setICPf,@function
_Z5setICPf:
s_load_b64 s[0:1], s[0:1], 0x0
s_mov_b32 s2, s15
s_mov_b32 s3, 0
v_mov_b32_e32 v0, 0
s_lshl_b64 s[2:3], s[2:3], 2
s_waitcnt lgkmcnt(0)
s_add_u32 s0, s0, s2
s_addc_u32 s1, s1, s3
global_store_b32 v0, v0, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z5setICPf
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 8
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 1
.amdhsa_next_free_sgpr 16
.amdhsa_reserve_vcc 0
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z5setICPf, .Lfunc_end0-_Z5setICPf
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 8
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z5setICPf
.private_segment_fixed_size: 0
.sgpr_count: 16
.sgpr_spill_count: 0
.symbol: _Z5setICPf.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 1
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0014cfa5_00000000-6_setIC.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z24__device_stub__Z5setICPfPf
.type _Z24__device_stub__Z5setICPfPf, @function
_Z24__device_stub__Z5setICPfPf:
.LFB2051:
.cfi_startproc
endbr64
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 8(%rsp)
movq %fs:40, %rax
movq %rax, 88(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 88(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $104, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 120
pushq 24(%rsp)
.cfi_def_cfa_offset 128
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z5setICPf(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 112
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z24__device_stub__Z5setICPfPf, .-_Z24__device_stub__Z5setICPfPf
.globl _Z5setICPf
.type _Z5setICPf, @function
_Z5setICPf:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z24__device_stub__Z5setICPfPf
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z5setICPf, .-_Z5setICPf
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z5setICPf"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z5setICPf(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "setIC.hip"
.globl _Z20__device_stub__setICPf # -- Begin function _Z20__device_stub__setICPf
.p2align 4, 0x90
.type _Z20__device_stub__setICPf,@function
_Z20__device_stub__setICPf: # @_Z20__device_stub__setICPf
.cfi_startproc
# %bb.0:
subq $72, %rsp
.cfi_def_cfa_offset 80
movq %rdi, 64(%rsp)
leaq 64(%rsp), %rax
movq %rax, (%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
movq %rsp, %r9
movl $_Z5setICPf, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $88, %rsp
.cfi_adjust_cfa_offset -88
retq
.Lfunc_end0:
.size _Z20__device_stub__setICPf, .Lfunc_end0-_Z20__device_stub__setICPf
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z5setICPf, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z5setICPf,@object # @_Z5setICPf
.section .rodata,"a",@progbits
.globl _Z5setICPf
.p2align 3, 0x0
_Z5setICPf:
.quad _Z20__device_stub__setICPf
.size _Z5setICPf, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z5setICPf"
.size .L__unnamed_1, 11
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z20__device_stub__setICPf
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z5setICPf
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "cuda_runtime.h"
#include "cuda.h"
#include "device_launch_parameters.h"
#include "iostream"
#include "stdlib.h"
#include <thread> // std::this_thread::sleep_for
#include <chrono> // std::chrono::seconds
#include "time.h"
#include <ctime>
#include "fstream"
using namespace std;
int getPos(int m, int n, const int width) {
return m* width + n;
}
void printCells(int* cells, int const height, int const width) {
for (int i = 0; i < height + 2; i++) {
for (int j = 0; j < width + 2; j++) {
if (cells[getPos(i, j, width)] == 1) {
cout << "O" << " ";
}
else {
cout << "-" << " ";
}
}
cout << endl;
}
cout << endl;
std::this_thread::sleep_for(std::chrono::milliseconds(100));
system("cls");
}
void populateArray(int* cellArray, int arraySize) {
for (int i = 0; i < arraySize; i++) {
cellArray[i] = rand() % 2;
}
}
__device__ int getX(int i, int width) {
return i % width;
}
__device__ int getY(int i, int width) {
return i / width;
}
__device__ int getI(int m, int n, int width) {
return m * width + n;
}
//Gets the neigbour cells via von Neuman Neigbourhood
__device__ int getNeigbours(int m, int n, int* cells, int width, int height) {
int neigbours = 0;
for (int i = m - 1; i <= m + 1; i++) {
for (int j = n - 1; j <= n + 1; j++) {
if (i >= 0 && i < height && j >= 0 && j < width) {
neigbours += cells[getI(i, j, width)];
}
else {
neigbours += cells[getI((i + height) % height, (j + width) % width, width)];
}
}
}
return neigbours;
}
// rules that determines the state of the cell
__device__ int rules(int neigbours, int state) {
int n = neigbours - state;
if (state == 1) {
if (n > 1 && n < 4) {
return 1;
}
else {
return 0;
}
}
else {
if (n == 3){
return 1;
}
return 0;
}
}
// creates the new state of the world
__global__ void evolve(int* cells, const int height, const int width, const int arraySize, const int cellsPerThread) {
extern __shared__ int sharedCells[];
int i = threadIdx.x + blockIdx.x * blockDim.x;
for (int k = i * cellsPerThread; k < ((i + 1) * cellsPerThread); k++) {
sharedCells[k] = cells[k];
int x, y, neigbours;
x = getX(k, width);
y = getY(k, width);
neigbours = getNeigbours(y, x, sharedCells, width, height);
cells[k] = rules(neigbours, sharedCells[getI(y, x, width)]);
__syncthreads();
}
}
// Runs the simulation
int main() {
srand(1);
const int height = 100, width = 100, arraySize = 10000, timeSteps = 10000, cellsPerThread = 10, gridSize = 10;
char b;
int* cells; // CPU
int* cellsDev; // GPU
cells = (int*)malloc(sizeof(int)*arraySize); // creating arrays
populateArray(cells, arraySize);
cudaMalloc((void**)&cellsDev, sizeof(float)*arraySize); // creating space on gpu
cudaMemcpy(cellsDev, cells, sizeof(int)*arraySize, cudaMemcpyHostToDevice); // copying arrays to gpu
clock_t begin = clock();
for (int i = 1; i < timeSteps; i++) {
evolve <<<gridSize, arraySize / cellsPerThread / gridSize >>>(cellsDev, height, width, arraySize, cellsPerThread); // running evolution iteration
}
clock_t end = clock();
cudaMemcpy(cells, cellsDev, sizeof(int)*arraySize, cudaMemcpyDeviceToHost); // copying cells back from gpu to cpu
cudaFree(cellsDev);
double elapsed_secs = double(end - begin) / CLOCKS_PER_SEC;
cout << elapsed_secs;
ofstream myfile;
myfile.open("para4.txt");
for (int i = 0; i < arraySize; i++) {
myfile << cells[i] << endl;
}
free(cells);
myfile.close();
cin >> b;
return 0;
} | code for sm_80
Function : _Z6evolvePiiiii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fc800078e0203 */
/*0040*/ IMAD R9, R0, c[0x0][0x174], RZ ; /* 0x00005d0000097a24 */
/* 0x000fca00078e02ff */
/*0050*/ IADD3 R0, R9, c[0x0][0x174], RZ ; /* 0x00005d0009007a10 */
/* 0x000fc80007ffe0ff */
/*0060*/ ISETP.GE.AND P0, PT, R9, R0, PT ; /* 0x000000000900720c */
/* 0x000fda0003f06270 */
/*0070*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0080*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0090*/ IMAD.MOV.U32 R2, RZ, RZ, 0x4 ; /* 0x00000004ff027424 */
/* 0x001fc800078e00ff */
/*00a0*/ IMAD.WIDE R2, R9, R2, c[0x0][0x160] ; /* 0x0000580009027625 */
/* 0x000fca00078e0202 */
/*00b0*/ LDG.E R6, [R2.64] ; /* 0x0000000402067981 */
/* 0x000ea2000c1e1900 */
/*00c0*/ IABS R10, c[0x0][0x16c] ; /* 0x00005b00000a7a13 */
/* 0x000fe20000000000 */
/*00d0*/ BSSY B0, 0x730 ; /* 0x0000065000007945 */
/* 0x000fe20003800000 */
/*00e0*/ IABS R8, R9 ; /* 0x0000000900087213 */
/* 0x000fe20000000000 */
/*00f0*/ IMAD.MOV.U32 R12, RZ, RZ, RZ ; /* 0x000000ffff0c7224 */
/* 0x000fe200078e00ff */
/*0100*/ I2F.RP R7, R10 ; /* 0x0000000a00077306 */
/* 0x000e300000209400 */
/*0110*/ MUFU.RCP R7, R7 ; /* 0x0000000700077308 */
/* 0x001e240000001000 */
/*0120*/ IADD3 R4, R7, 0xffffffe, RZ ; /* 0x0ffffffe07047810 */
/* 0x001fcc0007ffe0ff */
/*0130*/ F2I.FTZ.U32.TRUNC.NTZ R5, R4 ; /* 0x0000000400057305 */
/* 0x000064000021f000 */
/*0140*/ IMAD.MOV.U32 R4, RZ, RZ, RZ ; /* 0x000000ffff047224 */
/* 0x001fe400078e00ff */
/*0150*/ IMAD.MOV R11, RZ, RZ, -R5 ; /* 0x000000ffff0b7224 */
/* 0x002fc800078e0a05 */
/*0160*/ IMAD R11, R11, R10, RZ ; /* 0x0000000a0b0b7224 */
/* 0x000fc800078e02ff */
/*0170*/ IMAD.HI.U32 R5, R5, R11, R4 ; /* 0x0000000b05057227 */
/* 0x000fe200078e0004 */
/*0180*/ LOP3.LUT R4, R9, c[0x0][0x16c], RZ, 0x3c, !PT ; /* 0x00005b0009047a12 */
/* 0x000fc600078e3cff */
/*0190*/ IMAD.MOV.U32 R11, RZ, RZ, R8 ; /* 0x000000ffff0b7224 */
/* 0x000fe200078e0008 */
/*01a0*/ ISETP.GE.AND P2, PT, R4, RZ, PT ; /* 0x000000ff0400720c */
/* 0x000fc60003f46270 */
/*01b0*/ IMAD.HI.U32 R8, R5, R11, RZ ; /* 0x0000000b05087227 */
/* 0x000fc800078e00ff */
/*01c0*/ IMAD.MOV R5, RZ, RZ, -R8 ; /* 0x000000ffff057224 */
/* 0x000fc800078e0a08 */
/*01d0*/ IMAD R5, R10, R5, R11 ; /* 0x000000050a057224 */
/* 0x000fca00078e020b */
/*01e0*/ ISETP.GT.U32.AND P1, PT, R10, R5, PT ; /* 0x000000050a00720c */
/* 0x000fda0003f24070 */
/*01f0*/ @!P1 IMAD.IADD R5, R5, 0x1, -R10 ; /* 0x0000000105059824 */
/* 0x000fe200078e0a0a */
/*0200*/ @!P1 IADD3 R8, R8, 0x1, RZ ; /* 0x0000000108089810 */
/* 0x000fe40007ffe0ff */
/*0210*/ ISETP.NE.AND P1, PT, RZ, c[0x0][0x16c], PT ; /* 0x00005b00ff007a0c */
/* 0x000fe40003f25270 */
/*0220*/ ISETP.GE.U32.AND P0, PT, R5, R10, PT ; /* 0x0000000a0500720c */
/* 0x000fda0003f06070 */
/*0230*/ @P0 IADD3 R8, R8, 0x1, RZ ; /* 0x0000000108080810 */
/* 0x000fca0007ffe0ff */
/*0240*/ @!P2 IMAD.MOV R8, RZ, RZ, -R8 ; /* 0x000000ffff08a224 */
/* 0x000fe200078e0a08 */
/*0250*/ @!P1 LOP3.LUT R8, RZ, c[0x0][0x16c], RZ, 0x33, !PT ; /* 0x00005b00ff089a12 */
/* 0x000fc800078e33ff */
/*0260*/ IADD3 R13, R8, -0x1, RZ ; /* 0xffffffff080d7810 */
/* 0x000fe20007ffe0ff */
/*0270*/ IMAD.MOV R4, RZ, RZ, -R8 ; /* 0x000000ffff047224 */
/* 0x000fc800078e0a08 */
/*0280*/ IMAD R15, R4, c[0x0][0x16c], R9 ; /* 0x00005b00040f7a24 */
/* 0x000fca00078e0209 */
/*0290*/ IADD3 R14, R15.reuse, c[0x0][0x16c], RZ ; /* 0x00005b000f0e7a10 */
/* 0x040fe40007ffe0ff */
/*02a0*/ IADD3 R11, R15.reuse, -0x2, RZ ; /* 0xfffffffe0f0b7810 */
/* 0x040fe40007ffe0ff */
/*02b0*/ IADD3 R10, R15, -0x1, RZ ; /* 0xffffffff0f0a7810 */
/* 0x000fe40007ffe0ff */
/*02c0*/ IADD3 R14, R14, -0x1, RZ ; /* 0xffffffff0e0e7810 */
/* 0x000fe20007ffe0ff */
/*02d0*/ STS [R9.X4], R6 ; /* 0x0000000609007388 */
/* 0x0041e80000004800 */
/*02e0*/ BSSY B1, 0x6f0 ; /* 0x0000040000017945 */
/* 0x000fe20003800000 */
/*02f0*/ IADD3 R22, R13.reuse, c[0x0][0x168], RZ ; /* 0x00005a000d167a10 */
/* 0x040fe20007ffe0ff */
/*0300*/ IMAD R16, R13, c[0x0][0x16c], R10 ; /* 0x00005b000d107a24 */
/* 0x000fe400078e020a */
/*0310*/ IMAD.MOV.U32 R17, RZ, RZ, R14 ; /* 0x000000ffff117224 */
/* 0x000fc400078e000e */
/*0320*/ IMAD.MOV.U32 R18, RZ, RZ, R11 ; /* 0x000000ffff127224 */
/* 0x001fca00078e000b */
/*0330*/ IADD3 R18, R18, 0x1, RZ ; /* 0x0000000112127810 */
/* 0x000fe20007ffe0ff */
/*0340*/ BSSY B2, 0x680 ; /* 0x0000033000027945 */
/* 0x000fe60003800000 */
/*0350*/ LOP3.LUT R4, R18.reuse, R13, RZ, 0xfc, !PT ; /* 0x0000000d12047212 */
/* 0x040fe400078efcff */
/*0360*/ ISETP.LT.AND P1, PT, R18, c[0x0][0x16c], PT ; /* 0x00005b0012007a0c */
/* 0x000fe40003f21270 */
/*0370*/ ISETP.GT.AND P0, PT, R4, -0x1, PT ; /* 0xffffffff0400780c */
/* 0x000fe20003f04270 */
/*0380*/ IMAD.MOV.U32 R4, RZ, RZ, R16 ; /* 0x000000ffff047224 */
/* 0x000fc600078e0010 */
/*0390*/ ISETP.LT.AND P0, PT, R13, c[0x0][0x168], P0 ; /* 0x00005a000d007a0c */
/* 0x000fda0000701270 */
/*03a0*/ @P0 BRA P1, 0x670 ; /* 0x000002c000000947 */
/* 0x001fea0000800000 */
/*03b0*/ IABS R19, c[0x0][0x168] ; /* 0x00005a0000137a13 */
/* 0x000fe40000000000 */
/*03c0*/ IABS R20, c[0x0][0x16c] ; /* 0x00005b0000147a13 */
/* 0x000fe40000000000 */
/*03d0*/ I2F.RP R21, R19 ; /* 0x0000001300157306 */
/* 0x000e620000209400 */
/*03e0*/ ISETP.NE.AND P4, PT, RZ, c[0x0][0x16c], PT ; /* 0x00005b00ff007a0c */
/* 0x000fce0003f85270 */
/*03f0*/ I2F.RP R24, R20 ; /* 0x0000001400187306 */
/* 0x000eb00000209400 */
/*0400*/ MUFU.RCP R21, R21 ; /* 0x0000001500157308 */
/* 0x002e700000001000 */
/*0410*/ MUFU.RCP R24, R24 ; /* 0x0000001800187308 */
/* 0x004ea20000001000 */
/*0420*/ IADD3 R4, R21, 0xffffffe, RZ ; /* 0x0ffffffe15047810 */
/* 0x002fc40007ffe0ff */
/*0430*/ IABS R21, R22 ; /* 0x0000001600157213 */
/* 0x000fca0000000000 */
/*0440*/ F2I.FTZ.U32.TRUNC.NTZ R5, R4 ; /* 0x0000000400057305 */
/* 0x0002e2000021f000 */
/*0450*/ IADD3 R6, R24, 0xffffffe, RZ ; /* 0x0ffffffe18067810 */
/* 0x005fce0007ffe0ff */
/*0460*/ F2I.FTZ.U32.TRUNC.NTZ R7, R6 ; /* 0x0000000600077305 */
/* 0x0000a2000021f000 */
/*0470*/ IMAD.MOV.U32 R4, RZ, RZ, RZ ; /* 0x000000ffff047224 */
/* 0x002fe400078e00ff */
/*0480*/ IMAD.MOV R26, RZ, RZ, -R5 ; /* 0x000000ffff1a7224 */
/* 0x008fe400078e0a05 */
/*0490*/ IMAD.MOV.U32 R6, RZ, RZ, RZ ; /* 0x000000ffff067224 */
/* 0x001fe400078e00ff */
/*04a0*/ IMAD R23, R26, R19, RZ ; /* 0x000000131a177224 */
/* 0x000fc800078e02ff */
/*04b0*/ IMAD.HI.U32 R4, R5, R23, R4 ; /* 0x0000001705047227 */
/* 0x000fe200078e0004 */
/*04c0*/ IABS R5, R17 ; /* 0x0000001100057213 */
/* 0x000fc60000000000 */
/*04d0*/ IMAD.MOV R25, RZ, RZ, -R7 ; /* 0x000000ffff197224 */
/* 0x004fe400078e0a07 */
/*04e0*/ IMAD.HI.U32 R4, R4, R21, RZ ; /* 0x0000001504047227 */
/* 0x000fc800078e00ff */
/*04f0*/ IMAD R25, R25, R20, RZ ; /* 0x0000001419197224 */
/* 0x000fe400078e02ff */
/*0500*/ IMAD.MOV R4, RZ, RZ, -R4 ; /* 0x000000ffff047224 */
/* 0x000fe400078e0a04 */
/*0510*/ IMAD.HI.U32 R6, R7, R25, R6 ; /* 0x0000001907067227 */
/* 0x000fc800078e0006 */
/*0520*/ IMAD.MOV.U32 R7, RZ, RZ, R5 ; /* 0x000000ffff077224 */
/* 0x000fe400078e0005 */
/*0530*/ IMAD R4, R19, R4, R21 ; /* 0x0000000413047224 */
/* 0x000fe400078e0215 */
/*0540*/ IMAD.HI.U32 R5, R6, R7, RZ ; /* 0x0000000706057227 */
/* 0x000fc600078e00ff */
/*0550*/ ISETP.GT.U32.AND P0, PT, R19, R4, PT ; /* 0x000000041300720c */
/* 0x000fe20003f04070 */
/*0560*/ IMAD.MOV R5, RZ, RZ, -R5 ; /* 0x000000ffff057224 */
/* 0x000fc800078e0a05 */
/*0570*/ IMAD R5, R20, R5, R7 ; /* 0x0000000514057224 */
/* 0x000fca00078e0207 */
/*0580*/ ISETP.GT.U32.AND P1, PT, R20, R5, PT ; /* 0x000000051400720c */
/* 0x000fc60003f24070 */
/*0590*/ @!P0 IMAD.IADD R4, R4, 0x1, -R19 ; /* 0x0000000104048824 */
/* 0x000fe200078e0a13 */
/*05a0*/ ISETP.GE.AND P0, PT, R17, RZ, PT ; /* 0x000000ff1100720c */
/* 0x000fc80003f06270 */
/*05b0*/ ISETP.GT.U32.AND P3, PT, R19, R4, PT ; /* 0x000000041300720c */
/* 0x000fca0003f64070 */
/*05c0*/ @!P1 IMAD.IADD R5, R5, 0x1, -R20 ; /* 0x0000000105059824 */
/* 0x000fe200078e0a14 */
/*05d0*/ ISETP.GE.AND P1, PT, R22, RZ, PT ; /* 0x000000ff1600720c */
/* 0x000fc80003f26270 */
/*05e0*/ ISETP.GT.U32.AND P2, PT, R20, R5, PT ; /* 0x000000051400720c */
/* 0x000fc60003f44070 */
/*05f0*/ @!P3 IMAD.IADD R4, R4, 0x1, -R19 ; /* 0x000000010404b824 */
/* 0x000fe200078e0a13 */
/*0600*/ ISETP.NE.AND P3, PT, RZ, c[0x0][0x168], PT ; /* 0x00005a00ff007a0c */
/* 0x000fca0003f65270 */
/*0610*/ @!P1 IMAD.MOV R4, RZ, RZ, -R4 ; /* 0x000000ffff049224 */
/* 0x000fc800078e0a04 */
/*0620*/ @!P2 IMAD.IADD R5, R5, 0x1, -R20 ; /* 0x000000010505a824 */
/* 0x000fc800078e0a14 */
/*0630*/ @!P0 IMAD.MOV R5, RZ, RZ, -R5 ; /* 0x000000ffff058224 */
/* 0x000fe200078e0a05 */
/*0640*/ @!P3 LOP3.LUT R4, RZ, c[0x0][0x168], RZ, 0x33, !PT ; /* 0x00005a00ff04ba12 */
/* 0x000fe400078e33ff */
/*0650*/ @!P4 LOP3.LUT R5, RZ, c[0x0][0x16c], RZ, 0x33, !PT ; /* 0x00005b00ff05ca12 */
/* 0x000fca00078e33ff */
/*0660*/ IMAD R4, R4, c[0x0][0x16c], R5 ; /* 0x00005b0004047a24 */
/* 0x000fe400078e0205 */
/*0670*/ BSYNC B2 ; /* 0x0000000000027941 */
/* 0x000fea0003800000 */
/*0680*/ LDS R5, [R4.X4] ; /* 0x0000000004057984 */
/* 0x000e620000004800 */
/*0690*/ ISETP.GT.AND P0, PT, R18, R15, PT ; /* 0x0000000f1200720c */
/* 0x000fe40003f04270 */
/*06a0*/ IADD3 R16, R16, 0x1, RZ ; /* 0x0000000110107810 */
/* 0x000fe40007ffe0ff */
/*06b0*/ IADD3 R17, R17, 0x1, RZ ; /* 0x0000000111117810 */
/* 0x000fe20007ffe0ff */
/*06c0*/ IMAD.IADD R12, R5, 0x1, R12 ; /* 0x00000001050c7824 */
/* 0x002fd000078e020c */
/*06d0*/ @!P0 BRA 0x330 ; /* 0xfffffc5000008947 */
/* 0x000fea000383ffff */
/*06e0*/ BSYNC B1 ; /* 0x0000000000017941 */
/* 0x000fea0003800000 */
/*06f0*/ ISETP.GT.AND P0, PT, R13.reuse, R8, PT ; /* 0x000000080d00720c */
/* 0x040fe40003f04270 */
/*0700*/ IADD3 R13, R13, 0x1, RZ ; /* 0x000000010d0d7810 */
/* 0x000fd60007ffe0ff */
/*0710*/ @!P0 BRA 0x2e0 ; /* 0xfffffbc000008947 */
/* 0x000fea000383ffff */
/*0720*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0730*/ IMAD R8, R8, c[0x0][0x16c], R15 ; /* 0x00005b0008087a24 */
/* 0x000fe200078e020f */
/*0740*/ IADD3 R9, R9, 0x1, RZ ; /* 0x0000000109097810 */
/* 0x001fe20007ffe0ff */
/*0750*/ WARPSYNC 0xffffffff ; /* 0xffffffff00007948 */
/* 0x000fe60003800000 */
/*0760*/ LDS R5, [R8.X4] ; /* 0x0000000008057984 */
/* 0x000e240000004800 */
/*0770*/ IMAD.IADD R12, R12, 0x1, -R5 ; /* 0x000000010c0c7824 */
/* 0x001fe200078e0a05 */
/*0780*/ ISETP.NE.AND P0, PT, R5, 0x1, PT ; /* 0x000000010500780c */
/* 0x000fc80003f05270 */
/*0790*/ LOP3.LUT R4, R12.reuse, 0xfffffffe, RZ, 0xc0, !PT ; /* 0xfffffffe0c047812 */
/* 0x040fe400078ec0ff */
/*07a0*/ ISETP.NE.AND P2, PT, R12, 0x3, PT ; /* 0x000000030c00780c */
/* 0x000fe40003f45270 */
/*07b0*/ ISETP.NE.AND P1, PT, R4, 0x2, PT ; /* 0x000000020400780c */
/* 0x000fe40003f25270 */
/*07c0*/ SEL R4, RZ, 0xffffffff, P2 ; /* 0xffffffffff047807 */
/* 0x000fc60001000000 */
/*07d0*/ @!P0 SEL R4, RZ, 0xffffffff, P1 ; /* 0xffffffffff048807 */
/* 0x000fe40000800000 */
/*07e0*/ ISETP.GE.AND P0, PT, R9, R0, PT ; /* 0x000000000900720c */
/* 0x000fe40003f06270 */
/*07f0*/ LOP3.LUT R5, R4, 0x1, RZ, 0xc0, !PT ; /* 0x0000000104057812 */
/* 0x000fca00078ec0ff */
/*0800*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */
/* 0x0001e8000c101904 */
/*0810*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0820*/ @!P0 BRA 0x90 ; /* 0xfffff86000008947 */
/* 0x000fea000383ffff */
/*0830*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0840*/ BRA 0x840; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0850*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0860*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0870*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0880*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0890*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "cuda_runtime.h"
#include "cuda.h"
#include "device_launch_parameters.h"
#include "iostream"
#include "stdlib.h"
#include <thread> // std::this_thread::sleep_for
#include <chrono> // std::chrono::seconds
#include "time.h"
#include <ctime>
#include "fstream"
using namespace std;
int getPos(int m, int n, const int width) {
return m* width + n;
}
void printCells(int* cells, int const height, int const width) {
for (int i = 0; i < height + 2; i++) {
for (int j = 0; j < width + 2; j++) {
if (cells[getPos(i, j, width)] == 1) {
cout << "O" << " ";
}
else {
cout << "-" << " ";
}
}
cout << endl;
}
cout << endl;
std::this_thread::sleep_for(std::chrono::milliseconds(100));
system("cls");
}
void populateArray(int* cellArray, int arraySize) {
for (int i = 0; i < arraySize; i++) {
cellArray[i] = rand() % 2;
}
}
__device__ int getX(int i, int width) {
return i % width;
}
__device__ int getY(int i, int width) {
return i / width;
}
__device__ int getI(int m, int n, int width) {
return m * width + n;
}
//Gets the neigbour cells via von Neuman Neigbourhood
__device__ int getNeigbours(int m, int n, int* cells, int width, int height) {
int neigbours = 0;
for (int i = m - 1; i <= m + 1; i++) {
for (int j = n - 1; j <= n + 1; j++) {
if (i >= 0 && i < height && j >= 0 && j < width) {
neigbours += cells[getI(i, j, width)];
}
else {
neigbours += cells[getI((i + height) % height, (j + width) % width, width)];
}
}
}
return neigbours;
}
// rules that determines the state of the cell
__device__ int rules(int neigbours, int state) {
int n = neigbours - state;
if (state == 1) {
if (n > 1 && n < 4) {
return 1;
}
else {
return 0;
}
}
else {
if (n == 3){
return 1;
}
return 0;
}
}
// creates the new state of the world
__global__ void evolve(int* cells, const int height, const int width, const int arraySize, const int cellsPerThread) {
extern __shared__ int sharedCells[];
int i = threadIdx.x + blockIdx.x * blockDim.x;
for (int k = i * cellsPerThread; k < ((i + 1) * cellsPerThread); k++) {
sharedCells[k] = cells[k];
int x, y, neigbours;
x = getX(k, width);
y = getY(k, width);
neigbours = getNeigbours(y, x, sharedCells, width, height);
cells[k] = rules(neigbours, sharedCells[getI(y, x, width)]);
__syncthreads();
}
}
// Runs the simulation
int main() {
srand(1);
const int height = 100, width = 100, arraySize = 10000, timeSteps = 10000, cellsPerThread = 10, gridSize = 10;
char b;
int* cells; // CPU
int* cellsDev; // GPU
cells = (int*)malloc(sizeof(int)*arraySize); // creating arrays
populateArray(cells, arraySize);
cudaMalloc((void**)&cellsDev, sizeof(float)*arraySize); // creating space on gpu
cudaMemcpy(cellsDev, cells, sizeof(int)*arraySize, cudaMemcpyHostToDevice); // copying arrays to gpu
clock_t begin = clock();
for (int i = 1; i < timeSteps; i++) {
evolve <<<gridSize, arraySize / cellsPerThread / gridSize >>>(cellsDev, height, width, arraySize, cellsPerThread); // running evolution iteration
}
clock_t end = clock();
cudaMemcpy(cells, cellsDev, sizeof(int)*arraySize, cudaMemcpyDeviceToHost); // copying cells back from gpu to cpu
cudaFree(cellsDev);
double elapsed_secs = double(end - begin) / CLOCKS_PER_SEC;
cout << elapsed_secs;
ofstream myfile;
myfile.open("para4.txt");
for (int i = 0; i < arraySize; i++) {
myfile << cells[i] << endl;
}
free(cells);
myfile.close();
cin >> b;
return 0;
} | .file "tmpxft_0001b241_00000000-6_Para4.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4021:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4021:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z6getPosiii
.type _Z6getPosiii, @function
_Z6getPosiii:
.LFB4010:
.cfi_startproc
endbr64
imull %edx, %edi
leal (%rdi,%rsi), %eax
ret
.cfi_endproc
.LFE4010:
.size _Z6getPosiii, .-_Z6getPosiii
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "O"
.LC1:
.string " "
.LC2:
.string "-"
.LC3:
.string "cls"
.text
.globl _Z10printCellsPiii
.type _Z10printCellsPiii, @function
_Z10printCellsPiii:
.LFB4011:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $72, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 24(%rsp)
movl %esi, 20(%rsp)
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
cmpl $-1, %esi
jl .L5
movl %edx, %r12d
movl $0, 16(%rsp)
movl $0, 12(%rsp)
leaq .LC2(%rip), %r15
leaq _ZSt4cout(%rip), %rbp
leaq .LC1(%rip), %r14
jmp .L6
.L26:
movl $1, %edx
leaq .LC0(%rip), %rsi
movq %rbp, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movl $1, %edx
movq %r14, %rsi
movq %rbp, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
.L8:
addq $1, %rbx
leal -1(%rbx), %eax
cmpl %eax, %r12d
jl .L15
.L9:
cmpl $1, 0(%r13,%rbx,4)
je .L26
movl $1, %edx
movq %r15, %rsi
movq %rbp, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movl $1, %edx
movq %r14, %rsi
movq %rbp, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
jmp .L8
.L15:
movq 0(%rbp), %rax
movq -24(%rax), %rax
movq 240(%rbp,%rax), %rbx
testq %rbx, %rbx
je .L27
cmpb $0, 56(%rbx)
je .L12
movzbl 67(%rbx), %esi
.L13:
movsbl %sil, %esi
movq %rbp, %rdi
call _ZNSo3putEc@PLT
movq %rax, %rdi
call _ZNSo5flushEv@PLT
movl 12(%rsp), %ecx
leal 1(%rcx), %eax
addl %r12d, 16(%rsp)
cmpl %ecx, 20(%rsp)
jl .L5
movl %eax, 12(%rsp)
.L6:
cmpl $-1, %r12d
jl .L15
movslq 16(%rsp), %rax
movq 24(%rsp), %rcx
leaq (%rcx,%rax,4), %r13
movl $0, %ebx
jmp .L9
.L27:
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L28
call _ZSt16__throw_bad_castv@PLT
.L28:
call __stack_chk_fail@PLT
.L12:
movq %rbx, %rdi
call _ZNKSt5ctypeIcE13_M_widen_initEv@PLT
movq (%rbx), %rax
movl $10, %esi
movq %rbx, %rdi
call *48(%rax)
movl %eax, %esi
jmp .L13
.L5:
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
leaq _ZSt4cout(%rip), %rdx
movq 240(%rdx,%rax), %rbx
testq %rbx, %rbx
je .L29
cmpb $0, 56(%rbx)
je .L18
movzbl 67(%rbx), %eax
.L19:
movsbl %al, %esi
leaq _ZSt4cout(%rip), %rdi
call _ZNSo3putEc@PLT
movq %rax, %rdi
call _ZNSo5flushEv@PLT
movq $0, 32(%rsp)
movq $100000000, 40(%rsp)
leaq 32(%rsp), %rbx
jmp .L21
.L29:
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L30
call _ZSt16__throw_bad_castv@PLT
.L30:
call __stack_chk_fail@PLT
.L18:
movq %rbx, %rdi
call _ZNKSt5ctypeIcE13_M_widen_initEv@PLT
movq (%rbx), %rax
movl $10, %esi
movq %rbx, %rdi
call *48(%rax)
jmp .L19
.L31:
call __errno_location@PLT
cmpl $4, (%rax)
jne .L20
.L21:
movq %rbx, %rsi
movq %rbx, %rdi
call nanosleep@PLT
cmpl $-1, %eax
je .L31
.L20:
leaq .LC3(%rip), %rdi
call system@PLT
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L32
addq $72, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L32:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4011:
.size _Z10printCellsPiii, .-_Z10printCellsPiii
.globl _Z13populateArrayPii
.type _Z13populateArrayPii, @function
_Z13populateArrayPii:
.LFB4012:
.cfi_startproc
endbr64
testl %esi, %esi
jle .L38
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $8, %rsp
.cfi_def_cfa_offset 32
movq %rdi, %rbx
movslq %esi, %rsi
leaq (%rdi,%rsi,4), %rbp
.L35:
call rand@PLT
movl %eax, %edx
shrl $31, %edx
addl %edx, %eax
andl $1, %eax
subl %edx, %eax
movl %eax, (%rbx)
addq $4, %rbx
cmpq %rbp, %rbx
jne .L35
addq $8, %rsp
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.L38:
.cfi_restore 3
.cfi_restore 6
ret
.cfi_endproc
.LFE4012:
.size _Z13populateArrayPii, .-_Z13populateArrayPii
.globl _Z4getXii
.type _Z4getXii, @function
_Z4getXii:
.LFB4013:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE4013:
.size _Z4getXii, .-_Z4getXii
.globl _Z4getYii
.type _Z4getYii, @function
_Z4getYii:
.LFB4014:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE4014:
.size _Z4getYii, .-_Z4getYii
.globl _Z4getIiii
.type _Z4getIiii, @function
_Z4getIiii:
.LFB4015:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE4015:
.size _Z4getIiii, .-_Z4getIiii
.globl _Z12getNeigboursiiPiii
.type _Z12getNeigboursiiPiii, @function
_Z12getNeigboursiiPiii:
.LFB4016:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE4016:
.size _Z12getNeigboursiiPiii, .-_Z12getNeigboursiiPiii
.globl _Z5rulesii
.type _Z5rulesii, @function
_Z5rulesii:
.LFB4017:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE4017:
.size _Z5rulesii, .-_Z5rulesii
.globl _Z29__device_stub__Z6evolvePiiiiiPiiiii
.type _Z29__device_stub__Z6evolvePiiiiiPiiiii, @function
_Z29__device_stub__Z6evolvePiiiiiPiiiii:
.LFB4043:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movl %esi, 20(%rsp)
movl %edx, 16(%rsp)
movl %ecx, 12(%rsp)
movl %r8d, 8(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 20(%rsp), %rax
movq %rax, 104(%rsp)
leaq 16(%rsp), %rax
movq %rax, 112(%rsp)
leaq 12(%rsp), %rax
movq %rax, 120(%rsp)
leaq 8(%rsp), %rax
movq %rax, 128(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L55
.L51:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L56
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L55:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z6evolvePiiiii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L51
.L56:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4043:
.size _Z29__device_stub__Z6evolvePiiiiiPiiiii, .-_Z29__device_stub__Z6evolvePiiiiiPiiiii
.globl _Z6evolvePiiiii
.type _Z6evolvePiiiii, @function
_Z6evolvePiiiii:
.LFB4044:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z29__device_stub__Z6evolvePiiiiiPiiiii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4044:
.size _Z6evolvePiiiii, .-_Z6evolvePiiiii
.section .rodata.str1.1
.LC4:
.string "_Z6evolvePiiiii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4046:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC4(%rip), %rdx
movq %rdx, %rcx
leaq _Z6evolvePiiiii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4046:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .rodata.str1.1
.LC6:
.string "para4.txt"
.text
.globl main
.type main, @function
main:
.LFB4018:
.cfi_startproc
.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
.cfi_lsda 0x1b,.LLSDA4018
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $568, %rsp
.cfi_def_cfa_offset 624
movq %fs:40, %rax
movq %rax, 552(%rsp)
xorl %eax, %eax
movl $1, %edi
call srand@PLT
movl $40000, %edi
call malloc@PLT
movq %rax, %r15
movl $10000, %esi
movq %rax, %rdi
call _Z13populateArrayPii
movq %rsp, %rdi
movl $40000, %esi
.LEHB0:
call cudaMalloc@PLT
movl $1, %ecx
movl $40000, %edx
movq %r15, %rsi
movq (%rsp), %rdi
call cudaMemcpy@PLT
call clock@PLT
movq %rax, %rbp
movl $9999, %ebx
jmp .L63
.L62:
subl $1, %ebx
je .L77
.L63:
movl $100, 20(%rsp)
movl $1, 24(%rsp)
movl $1, 28(%rsp)
movl $10, 8(%rsp)
movl $1, 12(%rsp)
movl $1, 16(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 20(%rsp), %rdx
movl $1, %ecx
movq 8(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
jne .L62
movl $10, %r8d
movl $10000, %ecx
movl $100, %edx
movl $100, %esi
movq (%rsp), %rdi
call _Z29__device_stub__Z6evolvePiiiiiPiiiii
jmp .L62
.L77:
call clock@PLT
movq %rax, %rbx
movl $2, %ecx
movl $40000, %edx
movq (%rsp), %rsi
movq %r15, %rdi
call cudaMemcpy@PLT
movq (%rsp), %rdi
call cudaFree@PLT
subq %rbp, %rbx
pxor %xmm0, %xmm0
cvtsi2sdq %rbx, %xmm0
divsd .LC5(%rip), %xmm0
leaq _ZSt4cout(%rip), %rdi
call _ZNSo9_M_insertIdEERSoT_@PLT
leaq 32(%rsp), %rbx
movq %rbx, %rdi
call _ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev@PLT
.LEHE0:
movl $16, %edx
leaq .LC6(%rip), %rsi
movq %rbx, %rdi
.LEHB1:
call _ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@PLT
movq %r15, %r12
leaq 40000(%r15), %r14
movq %rbx, %r13
jmp .L68
.L82:
movq %rax, %rbx
movq (%rax), %rax
movq -24(%rax), %rax
movq 240(%rbx,%rax), %rbp
testq %rbp, %rbp
je .L78
cmpb $0, 56(%rbp)
je .L66
movzbl 67(%rbp), %esi
.L67:
movsbl %sil, %esi
movq %rbx, %rdi
call _ZNSo3putEc@PLT
jmp .L79
.L78:
movq 552(%rsp), %rax
subq %fs:40, %rax
jne .L80
call _ZSt16__throw_bad_castv@PLT
.L72:
endbr64
movq %rax, %rbx
leaq 32(%rsp), %rdi
call _ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
movq 552(%rsp), %rax
subq %fs:40, %rax
je .L70
call __stack_chk_fail@PLT
.L80:
call __stack_chk_fail@PLT
.L66:
movq %rbp, %rdi
call _ZNKSt5ctypeIcE13_M_widen_initEv@PLT
movq 0(%rbp), %rax
movl $10, %esi
movq %rbp, %rdi
call *48(%rax)
movl %eax, %esi
jmp .L67
.L79:
movq %rax, %rdi
call _ZNSo5flushEv@PLT
addq $4, %r12
cmpq %r14, %r12
je .L81
.L68:
movl (%r12), %esi
movq %r13, %rdi
call _ZNSolsEi@PLT
jmp .L82
.L81:
movq %r15, %rdi
call free@PLT
leaq 32(%rsp), %rdi
call _ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv@PLT
leaq 20(%rsp), %rsi
leaq _ZSt3cin(%rip), %rdi
call _ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_RS3_@PLT
.LEHE1:
leaq 32(%rsp), %rdi
call _ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
movq 552(%rsp), %rax
subq %fs:40, %rax
jne .L83
movl $0, %eax
addq $568, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L70:
.cfi_restore_state
movq %rbx, %rdi
.LEHB2:
call _Unwind_Resume@PLT
.LEHE2:
.L83:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4018:
.globl __gxx_personality_v0
.section .gcc_except_table,"a",@progbits
.LLSDA4018:
.byte 0xff
.byte 0xff
.byte 0x1
.uleb128 .LLSDACSE4018-.LLSDACSB4018
.LLSDACSB4018:
.uleb128 .LEHB0-.LFB4018
.uleb128 .LEHE0-.LEHB0
.uleb128 0
.uleb128 0
.uleb128 .LEHB1-.LFB4018
.uleb128 .LEHE1-.LEHB1
.uleb128 .L72-.LFB4018
.uleb128 0
.uleb128 .LEHB2-.LFB4018
.uleb128 .LEHE2-.LEHB2
.uleb128 0
.uleb128 0
.LLSDACSE4018:
.text
.size main, .-main
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC5:
.long 0
.long 1093567616
.hidden DW.ref.__gxx_personality_v0
.weak DW.ref.__gxx_personality_v0
.section .data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
.align 8
.type DW.ref.__gxx_personality_v0, @object
.size DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
.quad __gxx_personality_v0
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "cuda_runtime.h"
#include "cuda.h"
#include "device_launch_parameters.h"
#include "iostream"
#include "stdlib.h"
#include <thread> // std::this_thread::sleep_for
#include <chrono> // std::chrono::seconds
#include "time.h"
#include <ctime>
#include "fstream"
using namespace std;
int getPos(int m, int n, const int width) {
return m* width + n;
}
void printCells(int* cells, int const height, int const width) {
for (int i = 0; i < height + 2; i++) {
for (int j = 0; j < width + 2; j++) {
if (cells[getPos(i, j, width)] == 1) {
cout << "O" << " ";
}
else {
cout << "-" << " ";
}
}
cout << endl;
}
cout << endl;
std::this_thread::sleep_for(std::chrono::milliseconds(100));
system("cls");
}
void populateArray(int* cellArray, int arraySize) {
for (int i = 0; i < arraySize; i++) {
cellArray[i] = rand() % 2;
}
}
__device__ int getX(int i, int width) {
return i % width;
}
__device__ int getY(int i, int width) {
return i / width;
}
__device__ int getI(int m, int n, int width) {
return m * width + n;
}
//Gets the neigbour cells via von Neuman Neigbourhood
__device__ int getNeigbours(int m, int n, int* cells, int width, int height) {
int neigbours = 0;
for (int i = m - 1; i <= m + 1; i++) {
for (int j = n - 1; j <= n + 1; j++) {
if (i >= 0 && i < height && j >= 0 && j < width) {
neigbours += cells[getI(i, j, width)];
}
else {
neigbours += cells[getI((i + height) % height, (j + width) % width, width)];
}
}
}
return neigbours;
}
// rules that determines the state of the cell
__device__ int rules(int neigbours, int state) {
int n = neigbours - state;
if (state == 1) {
if (n > 1 && n < 4) {
return 1;
}
else {
return 0;
}
}
else {
if (n == 3){
return 1;
}
return 0;
}
}
// creates the new state of the world
__global__ void evolve(int* cells, const int height, const int width, const int arraySize, const int cellsPerThread) {
extern __shared__ int sharedCells[];
int i = threadIdx.x + blockIdx.x * blockDim.x;
for (int k = i * cellsPerThread; k < ((i + 1) * cellsPerThread); k++) {
sharedCells[k] = cells[k];
int x, y, neigbours;
x = getX(k, width);
y = getY(k, width);
neigbours = getNeigbours(y, x, sharedCells, width, height);
cells[k] = rules(neigbours, sharedCells[getI(y, x, width)]);
__syncthreads();
}
}
// Runs the simulation
int main() {
srand(1);
const int height = 100, width = 100, arraySize = 10000, timeSteps = 10000, cellsPerThread = 10, gridSize = 10;
char b;
int* cells; // CPU
int* cellsDev; // GPU
cells = (int*)malloc(sizeof(int)*arraySize); // creating arrays
populateArray(cells, arraySize);
cudaMalloc((void**)&cellsDev, sizeof(float)*arraySize); // creating space on gpu
cudaMemcpy(cellsDev, cells, sizeof(int)*arraySize, cudaMemcpyHostToDevice); // copying arrays to gpu
clock_t begin = clock();
for (int i = 1; i < timeSteps; i++) {
evolve <<<gridSize, arraySize / cellsPerThread / gridSize >>>(cellsDev, height, width, arraySize, cellsPerThread); // running evolution iteration
}
clock_t end = clock();
cudaMemcpy(cells, cellsDev, sizeof(int)*arraySize, cudaMemcpyDeviceToHost); // copying cells back from gpu to cpu
cudaFree(cellsDev);
double elapsed_secs = double(end - begin) / CLOCKS_PER_SEC;
cout << elapsed_secs;
ofstream myfile;
myfile.open("para4.txt");
for (int i = 0; i < arraySize; i++) {
myfile << cells[i] << endl;
}
free(cells);
myfile.close();
cin >> b;
return 0;
} | #include "hip/hip_runtime.h"
#include "iostream"
#include "stdlib.h"
#include <thread> // std::this_thread::sleep_for
#include <chrono> // std::chrono::seconds
#include "time.h"
#include <ctime>
#include "fstream"
using namespace std;
int getPos(int m, int n, const int width) {
return m* width + n;
}
void printCells(int* cells, int const height, int const width) {
for (int i = 0; i < height + 2; i++) {
for (int j = 0; j < width + 2; j++) {
if (cells[getPos(i, j, width)] == 1) {
cout << "O" << " ";
}
else {
cout << "-" << " ";
}
}
cout << endl;
}
cout << endl;
std::this_thread::sleep_for(std::chrono::milliseconds(100));
system("cls");
}
void populateArray(int* cellArray, int arraySize) {
for (int i = 0; i < arraySize; i++) {
cellArray[i] = rand() % 2;
}
}
__device__ int getX(int i, int width) {
return i % width;
}
__device__ int getY(int i, int width) {
return i / width;
}
__device__ int getI(int m, int n, int width) {
return m * width + n;
}
//Gets the neigbour cells via von Neuman Neigbourhood
__device__ int getNeigbours(int m, int n, int* cells, int width, int height) {
int neigbours = 0;
for (int i = m - 1; i <= m + 1; i++) {
for (int j = n - 1; j <= n + 1; j++) {
if (i >= 0 && i < height && j >= 0 && j < width) {
neigbours += cells[getI(i, j, width)];
}
else {
neigbours += cells[getI((i + height) % height, (j + width) % width, width)];
}
}
}
return neigbours;
}
// rules that determines the state of the cell
__device__ int rules(int neigbours, int state) {
int n = neigbours - state;
if (state == 1) {
if (n > 1 && n < 4) {
return 1;
}
else {
return 0;
}
}
else {
if (n == 3){
return 1;
}
return 0;
}
}
// creates the new state of the world
__global__ void evolve(int* cells, const int height, const int width, const int arraySize, const int cellsPerThread) {
extern __shared__ int sharedCells[];
int i = threadIdx.x + blockIdx.x * blockDim.x;
for (int k = i * cellsPerThread; k < ((i + 1) * cellsPerThread); k++) {
sharedCells[k] = cells[k];
int x, y, neigbours;
x = getX(k, width);
y = getY(k, width);
neigbours = getNeigbours(y, x, sharedCells, width, height);
cells[k] = rules(neigbours, sharedCells[getI(y, x, width)]);
__syncthreads();
}
}
// Runs the simulation
int main() {
srand(1);
const int height = 100, width = 100, arraySize = 10000, timeSteps = 10000, cellsPerThread = 10, gridSize = 10;
char b;
int* cells; // CPU
int* cellsDev; // GPU
cells = (int*)malloc(sizeof(int)*arraySize); // creating arrays
populateArray(cells, arraySize);
hipMalloc((void**)&cellsDev, sizeof(float)*arraySize); // creating space on gpu
hipMemcpy(cellsDev, cells, sizeof(int)*arraySize, hipMemcpyHostToDevice); // copying arrays to gpu
clock_t begin = clock();
for (int i = 1; i < timeSteps; i++) {
evolve <<<gridSize, arraySize / cellsPerThread / gridSize >>>(cellsDev, height, width, arraySize, cellsPerThread); // running evolution iteration
}
clock_t end = clock();
hipMemcpy(cells, cellsDev, sizeof(int)*arraySize, hipMemcpyDeviceToHost); // copying cells back from gpu to cpu
hipFree(cellsDev);
double elapsed_secs = double(end - begin) / CLOCKS_PER_SEC;
cout << elapsed_secs;
ofstream myfile;
myfile.open("para4.txt");
for (int i = 0; i < arraySize; i++) {
myfile << cells[i] << endl;
}
free(cells);
myfile.close();
cin >> b;
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include "hip/hip_runtime.h"
#include "iostream"
#include "stdlib.h"
#include <thread> // std::this_thread::sleep_for
#include <chrono> // std::chrono::seconds
#include "time.h"
#include <ctime>
#include "fstream"
using namespace std;
int getPos(int m, int n, const int width) {
return m* width + n;
}
void printCells(int* cells, int const height, int const width) {
for (int i = 0; i < height + 2; i++) {
for (int j = 0; j < width + 2; j++) {
if (cells[getPos(i, j, width)] == 1) {
cout << "O" << " ";
}
else {
cout << "-" << " ";
}
}
cout << endl;
}
cout << endl;
std::this_thread::sleep_for(std::chrono::milliseconds(100));
system("cls");
}
void populateArray(int* cellArray, int arraySize) {
for (int i = 0; i < arraySize; i++) {
cellArray[i] = rand() % 2;
}
}
__device__ int getX(int i, int width) {
return i % width;
}
__device__ int getY(int i, int width) {
return i / width;
}
__device__ int getI(int m, int n, int width) {
return m * width + n;
}
//Gets the neigbour cells via von Neuman Neigbourhood
__device__ int getNeigbours(int m, int n, int* cells, int width, int height) {
int neigbours = 0;
for (int i = m - 1; i <= m + 1; i++) {
for (int j = n - 1; j <= n + 1; j++) {
if (i >= 0 && i < height && j >= 0 && j < width) {
neigbours += cells[getI(i, j, width)];
}
else {
neigbours += cells[getI((i + height) % height, (j + width) % width, width)];
}
}
}
return neigbours;
}
// rules that determines the state of the cell
__device__ int rules(int neigbours, int state) {
int n = neigbours - state;
if (state == 1) {
if (n > 1 && n < 4) {
return 1;
}
else {
return 0;
}
}
else {
if (n == 3){
return 1;
}
return 0;
}
}
// creates the new state of the world
__global__ void evolve(int* cells, const int height, const int width, const int arraySize, const int cellsPerThread) {
extern __shared__ int sharedCells[];
int i = threadIdx.x + blockIdx.x * blockDim.x;
for (int k = i * cellsPerThread; k < ((i + 1) * cellsPerThread); k++) {
sharedCells[k] = cells[k];
int x, y, neigbours;
x = getX(k, width);
y = getY(k, width);
neigbours = getNeigbours(y, x, sharedCells, width, height);
cells[k] = rules(neigbours, sharedCells[getI(y, x, width)]);
__syncthreads();
}
}
// Runs the simulation
int main() {
srand(1);
const int height = 100, width = 100, arraySize = 10000, timeSteps = 10000, cellsPerThread = 10, gridSize = 10;
char b;
int* cells; // CPU
int* cellsDev; // GPU
cells = (int*)malloc(sizeof(int)*arraySize); // creating arrays
populateArray(cells, arraySize);
hipMalloc((void**)&cellsDev, sizeof(float)*arraySize); // creating space on gpu
hipMemcpy(cellsDev, cells, sizeof(int)*arraySize, hipMemcpyHostToDevice); // copying arrays to gpu
clock_t begin = clock();
for (int i = 1; i < timeSteps; i++) {
evolve <<<gridSize, arraySize / cellsPerThread / gridSize >>>(cellsDev, height, width, arraySize, cellsPerThread); // running evolution iteration
}
clock_t end = clock();
hipMemcpy(cells, cellsDev, sizeof(int)*arraySize, hipMemcpyDeviceToHost); // copying cells back from gpu to cpu
hipFree(cellsDev);
double elapsed_secs = double(end - begin) / CLOCKS_PER_SEC;
cout << elapsed_secs;
ofstream myfile;
myfile.open("para4.txt");
for (int i = 0; i < arraySize; i++) {
myfile << cells[i] << endl;
}
free(cells);
myfile.close();
cin >> b;
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6evolvePiiiii
.globl _Z6evolvePiiiii
.p2align 8
.type _Z6evolvePiiiii,@function
_Z6evolvePiiiii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x14
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_mul_lo_u32 v0, v1, s3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v6, s3, v0
v_cmpx_lt_i32_e64 v0, v6
s_cbranch_execz .LBB0_11
s_load_b128 s[4:7], s[0:1], 0x0
s_mov_b32 s10, 0
s_waitcnt lgkmcnt(0)
s_ashr_i32 s0, s6, 31
s_ashr_i32 s3, s7, 31
s_add_i32 s1, s6, s0
s_add_i32 s8, s7, s3
s_mov_b32 s2, s7
s_xor_b32 s7, s1, s0
s_xor_b32 s8, s8, s3
v_cvt_f32_u32_e32 v1, s7
v_cvt_f32_u32_e32 v2, s8
s_sub_i32 s0, 0, s7
s_sub_i32 s1, 0, s8
s_not_b32 s9, s2
v_rcp_iflag_f32_e32 v1, v1
v_rcp_iflag_f32_e32 v2, v2
s_waitcnt_depctr 0xfff
v_dual_mul_f32 v1, 0x4f7ffffe, v1 :: v_dual_mul_f32 v2, 0x4f7ffffe, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cvt_u32_f32_e32 v1, v1
v_cvt_u32_f32_e32 v2, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_lo_u32 v3, s0, v1
v_mul_lo_u32 v4, s1, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_hi_u32 v3, v1, v3
v_mul_hi_u32 v4, v2, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v7, v1, v3
v_add_nc_u32_e32 v8, v2, v4
s_branch .LBB0_3
.LBB0_2:
s_or_b32 exec_lo, exec_lo, s11
v_mad_u64_u32 v[4:5], null, v9, s2, v[3:4]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_lshl_add_u32 v3, v4, 2, 0
ds_load_b32 v3, v3
s_waitcnt lgkmcnt(0)
v_sub_nc_u32_e32 v4, v10, v3
v_and_b32_e32 v5, -2, v4
v_cmp_eq_u32_e32 vcc_lo, 3, v4
v_cndmask_b32_e64 v4, 0, 1, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_cmp_eq_u32_e32 vcc_lo, 2, v5
v_cndmask_b32_e64 v5, 0, 1, vcc_lo
v_cmp_eq_u32_e32 vcc_lo, 1, v3
v_dual_cndmask_b32 v3, v4, v5 :: v_dual_add_nc_u32 v0, 1, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_eq_u32_e32 vcc_lo, v0, v6
v_and_b32_e32 v3, 1, v3
s_or_b32 s10, vcc_lo, s10
global_store_b32 v[1:2], v3, off
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_and_not1_b32 exec_lo, exec_lo, s10
s_cbranch_execz .LBB0_11
.LBB0_3:
v_ashrrev_i32_e32 v1, 31, v0
v_ashrrev_i32_e32 v3, 31, v0
v_add_nc_u32_e32 v12, s9, v0
s_mov_b32 s11, 0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[1:2], 2, v[0:1]
v_add_nc_u32_e32 v4, v0, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_xor_b32_e32 v4, v4, v3
v_add_co_u32 v1, vcc_lo, s4, v1
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
v_mul_hi_u32 v5, v4, v8
v_xor_b32_e32 v3, s3, v3
global_load_b32 v15, v[1:2], off
v_mul_lo_u32 v9, v5, s8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v4, v4, v9
v_subrev_nc_u32_e32 v10, s8, v4
v_cmp_le_u32_e32 vcc_lo, s8, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_cndmask_b32 v4, v4, v10 :: v_dual_add_nc_u32 v9, 1, v5
v_cndmask_b32_e32 v5, v5, v9, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_le_u32_e32 vcc_lo, s8, v4
v_add_nc_u32_e32 v9, 1, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v4, v5, v9, vcc_lo
v_xor_b32_e32 v4, v4, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v9, v4, v3
v_sub_nc_u32_e32 v3, v3, v4
v_mul_lo_u32 v10, v9, s2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
v_mad_u64_u32 v[4:5], null, s2, v3, s[2:3]
v_lshl_add_u32 v5, v0, 2, 0
v_add_nc_u32_e32 v14, -1, v9
v_sub_nc_u32_e32 v3, v0, v10
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add3_u32 v13, v0, v4, -1
v_dual_mov_b32 v10, 0 :: v_dual_add_nc_u32 v11, -1, v3
s_waitcnt vmcnt(0)
ds_store_b32 v5, v15
s_branch .LBB0_5
.LBB0_4:
s_or_b32 exec_lo, exec_lo, s13
v_add_nc_u32_e32 v4, 1, v14
v_cmp_gt_i32_e32 vcc_lo, v14, v9
v_add_nc_u32_e32 v12, s2, v12
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_mov_b32_e32 v14, v4
s_or_b32 s11, vcc_lo, s11
s_and_not1_b32 exec_lo, exec_lo, s11
s_cbranch_execz .LBB0_2
.LBB0_5:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
v_dual_mov_b32 v17, v13 :: v_dual_add_nc_u32 v4, s6, v14
v_cmp_gt_i32_e64 s0, s6, v14
v_cmp_lt_i32_e32 vcc_lo, -1, v14
v_cmp_gt_i32_e64 s12, 0, v14
v_ashrrev_i32_e32 v15, 31, v4
v_mov_b32_e32 v18, v12
v_mov_b32_e32 v20, v11
s_mov_b32 s13, 0
s_xor_b32 s14, s0, -1
v_add_nc_u32_e32 v4, v4, v15
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v4, v4, v15
v_mul_hi_u32 v5, v4, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v5, v5, s7
v_sub_nc_u32_e32 v16, v4, v5
s_delay_alu instid0(VALU_DEP_1)
v_subrev_nc_u32_e32 v19, s7, v16
s_branch .LBB0_7
.LBB0_6:
s_or_b32 exec_lo, exec_lo, s1
s_delay_alu instid0(VALU_DEP_1)
v_lshl_add_u32 v4, v4, 2, 0
v_add_nc_u32_e32 v5, 1, v20
v_cmp_gt_i32_e64 s0, v20, v3
v_add_nc_u32_e32 v18, 1, v18
v_add_nc_u32_e32 v17, 1, v17
ds_load_b32 v4, v4
v_mov_b32_e32 v20, v5
s_or_b32 s13, s0, s13
s_waitcnt lgkmcnt(0)
v_add_nc_u32_e32 v10, v4, v10
s_and_not1_b32 exec_lo, exec_lo, s13
s_cbranch_execz .LBB0_4
.LBB0_7:
s_mov_b32 s0, s12
s_and_saveexec_b32 s15, vcc_lo
v_cmp_gt_i32_e64 s0, 0, v20
v_cmp_le_i32_e64 s1, s2, v20
s_delay_alu instid0(VALU_DEP_2)
s_or_b32 s0, s14, s0
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
s_or_b32 s0, s1, s0
s_and_not1_b32 s1, s12, exec_lo
s_and_b32 s0, s0, exec_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 s0, s1, s0
s_or_b32 exec_lo, exec_lo, s15
v_mov_b32_e32 v4, v18
s_and_saveexec_b32 s1, s0
s_cbranch_execz .LBB0_6
v_ashrrev_i32_e32 v4, 31, v17
v_cmp_le_u32_e64 s0, s7, v16
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v5, v17, v4
v_cndmask_b32_e64 v22, v16, v19, s0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v5, v5, v4
v_mul_hi_u32 v21, v5, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v21, v21, s8
v_sub_nc_u32_e32 v5, v5, v21
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_subrev_nc_u32_e32 v21, s8, v5
v_cmp_le_u32_e64 s0, s8, v5
v_cndmask_b32_e64 v5, v5, v21, s0
v_subrev_nc_u32_e32 v21, s7, v22
v_cmp_le_u32_e64 s0, s7, v22
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v23, s8, v5
v_cndmask_b32_e64 v21, v22, v21, s0
v_cmp_le_u32_e64 s0, s8, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_xor_b32_e32 v21, v21, v15
v_cndmask_b32_e64 v5, v5, v23, s0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v22, v21, v15
v_xor_b32_e32 v5, v5, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v21, v5, v4
v_mad_u64_u32 v[4:5], null, v22, s2, v[21:22]
s_branch .LBB0_6
.LBB0_11:
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z6evolvePiiiii
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 24
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z6evolvePiiiii, .Lfunc_end0-_Z6evolvePiiiii
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: by_value
- .offset: 12
.size: 4
.value_kind: by_value
- .offset: 16
.size: 4
.value_kind: by_value
- .offset: 20
.size: 4
.value_kind: by_value
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
- .offset: 144
.size: 4
.value_kind: hidden_dynamic_lds_size
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z6evolvePiiiii
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z6evolvePiiiii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 24
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include "hip/hip_runtime.h"
#include "iostream"
#include "stdlib.h"
#include <thread> // std::this_thread::sleep_for
#include <chrono> // std::chrono::seconds
#include "time.h"
#include <ctime>
#include "fstream"
using namespace std;
int getPos(int m, int n, const int width) {
return m* width + n;
}
void printCells(int* cells, int const height, int const width) {
for (int i = 0; i < height + 2; i++) {
for (int j = 0; j < width + 2; j++) {
if (cells[getPos(i, j, width)] == 1) {
cout << "O" << " ";
}
else {
cout << "-" << " ";
}
}
cout << endl;
}
cout << endl;
std::this_thread::sleep_for(std::chrono::milliseconds(100));
system("cls");
}
void populateArray(int* cellArray, int arraySize) {
for (int i = 0; i < arraySize; i++) {
cellArray[i] = rand() % 2;
}
}
__device__ int getX(int i, int width) {
return i % width;
}
__device__ int getY(int i, int width) {
return i / width;
}
__device__ int getI(int m, int n, int width) {
return m * width + n;
}
//Gets the neigbour cells via von Neuman Neigbourhood
__device__ int getNeigbours(int m, int n, int* cells, int width, int height) {
int neigbours = 0;
for (int i = m - 1; i <= m + 1; i++) {
for (int j = n - 1; j <= n + 1; j++) {
if (i >= 0 && i < height && j >= 0 && j < width) {
neigbours += cells[getI(i, j, width)];
}
else {
neigbours += cells[getI((i + height) % height, (j + width) % width, width)];
}
}
}
return neigbours;
}
// rules that determines the state of the cell
__device__ int rules(int neigbours, int state) {
int n = neigbours - state;
if (state == 1) {
if (n > 1 && n < 4) {
return 1;
}
else {
return 0;
}
}
else {
if (n == 3){
return 1;
}
return 0;
}
}
// creates the new state of the world
__global__ void evolve(int* cells, const int height, const int width, const int arraySize, const int cellsPerThread) {
extern __shared__ int sharedCells[];
int i = threadIdx.x + blockIdx.x * blockDim.x;
for (int k = i * cellsPerThread; k < ((i + 1) * cellsPerThread); k++) {
sharedCells[k] = cells[k];
int x, y, neigbours;
x = getX(k, width);
y = getY(k, width);
neigbours = getNeigbours(y, x, sharedCells, width, height);
cells[k] = rules(neigbours, sharedCells[getI(y, x, width)]);
__syncthreads();
}
}
// Runs the simulation
int main() {
srand(1);
const int height = 100, width = 100, arraySize = 10000, timeSteps = 10000, cellsPerThread = 10, gridSize = 10;
char b;
int* cells; // CPU
int* cellsDev; // GPU
cells = (int*)malloc(sizeof(int)*arraySize); // creating arrays
populateArray(cells, arraySize);
hipMalloc((void**)&cellsDev, sizeof(float)*arraySize); // creating space on gpu
hipMemcpy(cellsDev, cells, sizeof(int)*arraySize, hipMemcpyHostToDevice); // copying arrays to gpu
clock_t begin = clock();
for (int i = 1; i < timeSteps; i++) {
evolve <<<gridSize, arraySize / cellsPerThread / gridSize >>>(cellsDev, height, width, arraySize, cellsPerThread); // running evolution iteration
}
clock_t end = clock();
hipMemcpy(cells, cellsDev, sizeof(int)*arraySize, hipMemcpyDeviceToHost); // copying cells back from gpu to cpu
hipFree(cellsDev);
double elapsed_secs = double(end - begin) / CLOCKS_PER_SEC;
cout << elapsed_secs;
ofstream myfile;
myfile.open("para4.txt");
for (int i = 0; i < arraySize; i++) {
myfile << cells[i] << endl;
}
free(cells);
myfile.close();
cin >> b;
return 0;
} | .text
.file "Para4.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z6getPosiii # -- Begin function _Z6getPosiii
.p2align 4, 0x90
.type _Z6getPosiii,@function
_Z6getPosiii: # @_Z6getPosiii
.cfi_startproc
# %bb.0:
# kill: def $esi killed $esi def $rsi
# kill: def $edi killed $edi def $rdi
imull %edx, %edi
leal (%rdi,%rsi), %eax
retq
.Lfunc_end0:
.size _Z6getPosiii, .Lfunc_end0-_Z6getPosiii
.cfi_endproc
# -- End function
.globl _Z10printCellsPiii # -- Begin function _Z10printCellsPiii
.p2align 4, 0x90
.type _Z10printCellsPiii,@function
_Z10printCellsPiii: # @_Z10printCellsPiii
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $24, %rsp
.cfi_def_cfa_offset 80
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
# kill: def $edx killed $edx def $rdx
movq %rdx, (%rsp) # 8-byte Spill
cmpl $-1, %esi
jl .LBB1_10
# %bb.1: # %.preheader.lr.ph
movl %esi, %r14d
movq %rdi, %r15
movq (%rsp), %rax # 8-byte Reload
leal 2(%rax), %r13d
movslq %eax, %rbp
addl $2, %r14d
shlq $2, %rbp
xorl %ebx, %ebx
jmp .LBB1_2
.p2align 4, 0x90
.LBB1_18: # in Loop: Header=BB1_2 Depth=1
movq %r12, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r12), %rax
movq %r12, %rdi
movl $10, %esi
callq *48(%rax)
.LBB1_19: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit14
# in Loop: Header=BB1_2 Depth=1
movsbl %al, %esi
movl $_ZSt4cout, %edi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
incq %rbx
addq %rbp, %r15
cmpq %r14, %rbx
je .LBB1_10
.LBB1_2: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB1_4 Depth 2
cmpl $-1, (%rsp) # 4-byte Folded Reload
jl .LBB1_7
# %bb.3: # %.lr.ph
# in Loop: Header=BB1_2 Depth=1
xorl %r12d, %r12d
jmp .LBB1_4
.p2align 4, 0x90
.LBB1_6: # in Loop: Header=BB1_4 Depth=2
movl $_ZSt4cout, %edi
movl $1, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl $_ZSt4cout, %edi
movl $.L.str.1, %esi
movl $1, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
incq %r12
cmpq %r12, %r13
je .LBB1_7
.LBB1_4: # Parent Loop BB1_2 Depth=1
# => This Inner Loop Header: Depth=2
cmpl $1, (%r15,%r12,4)
movl $.L.str, %esi
je .LBB1_6
# %bb.5: # in Loop: Header=BB1_4 Depth=2
movl $.L.str.2, %esi
jmp .LBB1_6
.p2align 4, 0x90
.LBB1_7: # %._crit_edge
# in Loop: Header=BB1_2 Depth=1
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
movq _ZSt4cout+240(%rax), %r12
testq %r12, %r12
je .LBB1_20
# %bb.8: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i11
# in Loop: Header=BB1_2 Depth=1
cmpb $0, 56(%r12)
je .LBB1_18
# %bb.9: # in Loop: Header=BB1_2 Depth=1
movzbl 67(%r12), %eax
jmp .LBB1_19
.LBB1_10: # %._crit_edge17
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
movq _ZSt4cout+240(%rax), %rbx
testq %rbx, %rbx
je .LBB1_20
# %bb.11: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
cmpb $0, 56(%rbx)
je .LBB1_13
# %bb.12:
movzbl 67(%rbx), %eax
jmp .LBB1_14
.LBB1_13:
movq %rbx, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
.LBB1_14: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit
movsbl %al, %esi
movl $_ZSt4cout, %edi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movq $0, 8(%rsp)
movq $100000000, 16(%rsp) # imm = 0x5F5E100
leaq 8(%rsp), %rbx
.p2align 4, 0x90
.LBB1_15: # =>This Inner Loop Header: Depth=1
movq %rbx, %rdi
movq %rbx, %rsi
callq nanosleep
cmpl $-1, %eax
jne .LBB1_17
# %bb.16: # in Loop: Header=BB1_15 Depth=1
callq __errno_location
cmpl $4, (%rax)
je .LBB1_15
.LBB1_17: # %.critedge.i
movl $.L.str.3, %edi
callq system
addq $24, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB1_20:
.cfi_def_cfa_offset 80
callq _ZSt16__throw_bad_castv
.Lfunc_end1:
.size _Z10printCellsPiii, .Lfunc_end1-_Z10printCellsPiii
.cfi_endproc
# -- End function
.globl _Z13populateArrayPii # -- Begin function _Z13populateArrayPii
.p2align 4, 0x90
.type _Z13populateArrayPii,@function
_Z13populateArrayPii: # @_Z13populateArrayPii
.cfi_startproc
# %bb.0:
testl %esi, %esi
jle .LBB2_4
# %bb.1: # %.lr.ph.preheader
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movq %rdi, %rbx
movl %esi, %r14d
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB2_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
callq rand
movl %eax, %ecx
shrl $31, %ecx
addl %eax, %ecx
andl $-2, %ecx
subl %ecx, %eax
movl %eax, (%rbx,%r15,4)
incq %r15
cmpq %r15, %r14
jne .LBB2_2
# %bb.3:
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.cfi_restore %r14
.cfi_restore %r15
.LBB2_4: # %._crit_edge
retq
.Lfunc_end2:
.size _Z13populateArrayPii, .Lfunc_end2-_Z13populateArrayPii
.cfi_endproc
# -- End function
.globl _Z21__device_stub__evolvePiiiii # -- Begin function _Z21__device_stub__evolvePiiiii
.p2align 4, 0x90
.type _Z21__device_stub__evolvePiiiii,@function
_Z21__device_stub__evolvePiiiii: # @_Z21__device_stub__evolvePiiiii
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movl %esi, 20(%rsp)
movl %edx, 16(%rsp)
movl %ecx, 12(%rsp)
movl %r8d, 8(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 20(%rsp), %rax
movq %rax, 88(%rsp)
leaq 16(%rsp), %rax
movq %rax, 96(%rsp)
leaq 12(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z6evolvePiiiii, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end3:
.size _Z21__device_stub__evolvePiiiii, .Lfunc_end3-_Z21__device_stub__evolvePiiiii
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI4_0:
.quad 0x412e848000000000 # double 1.0E+6
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.Lfunc_begin0:
.cfi_startproc
.cfi_personality 3, __gxx_personality_v0
.cfi_lsda 3, .Lexception0
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $616, %rsp # imm = 0x268
.cfi_def_cfa_offset 672
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
.cfi_escape 0x2e, 0x00
movl $1, %edi
callq srand
.cfi_escape 0x2e, 0x00
movl $40000, %edi # imm = 0x9C40
callq malloc
movq %rax, %rbx
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB4_1: # %.lr.ph.i
# =>This Inner Loop Header: Depth=1
.cfi_escape 0x2e, 0x00
callq rand
movl %eax, %ecx
shrl $31, %ecx
addl %eax, %ecx
andl $-2, %ecx
subl %ecx, %eax
movl %eax, (%rbx,%r14,4)
incq %r14
cmpq $10000, %r14 # imm = 0x2710
jne .LBB4_1
# %bb.2: # %_Z13populateArrayPii.exit
movabsq $4294967306, %r14 # imm = 0x10000000A
.cfi_escape 0x2e, 0x00
leaq 8(%rsp), %rdi
movl $40000, %esi # imm = 0x9C40
callq hipMalloc
movq 8(%rsp), %rdi
.cfi_escape 0x2e, 0x00
movl $40000, %edx # imm = 0x9C40
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
.cfi_escape 0x2e, 0x00
movl $9999, %r15d # imm = 0x270F
callq clock
movq %rax, 32(%rsp) # 8-byte Spill
leaq 90(%r14), %r12
leaq 40(%rsp), %r13
leaq 96(%rsp), %rbp
jmp .LBB4_3
.p2align 4, 0x90
.LBB4_5: # in Loop: Header=BB4_3 Depth=1
decl %r15d
je .LBB4_6
.LBB4_3: # =>This Inner Loop Header: Depth=1
.cfi_escape 0x2e, 0x00
movq %r14, %rdi
movl $1, %esi
movq %r12, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB4_5
# %bb.4: # in Loop: Header=BB4_3 Depth=1
movq 8(%rsp), %rax
movq %rax, 88(%rsp)
movl $100, 28(%rsp)
movl $100, 24(%rsp)
movl $10000, 20(%rsp) # imm = 0x2710
movl $10, 16(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 28(%rsp), %rax
movq %rax, 104(%rsp)
leaq 24(%rsp), %rax
movq %rax, 112(%rsp)
leaq 20(%rsp), %rax
movq %rax, 120(%rsp)
leaq 16(%rsp), %rax
movq %rax, 128(%rsp)
.cfi_escape 0x2e, 0x00
leaq 72(%rsp), %rdi
leaq 56(%rsp), %rsi
leaq 48(%rsp), %rdx
movq %r13, %rcx
callq __hipPopCallConfiguration
movq 72(%rsp), %rsi
movl 80(%rsp), %edx
movq 56(%rsp), %rcx
movl 64(%rsp), %r8d
.cfi_escape 0x2e, 0x10
movl $_Z6evolvePiiiii, %edi
movq %rbp, %r9
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
jmp .LBB4_5
.LBB4_6:
.cfi_escape 0x2e, 0x00
callq clock
movq %rax, %r14
movq 8(%rsp), %rsi
.cfi_escape 0x2e, 0x00
movl $40000, %edx # imm = 0x9C40
movq %rbx, %rdi
movl $2, %ecx
callq hipMemcpy
movq 8(%rsp), %rdi
.cfi_escape 0x2e, 0x00
callq hipFree
subq 32(%rsp), %r14 # 8-byte Folded Reload
cvtsi2sd %r14, %xmm0
divsd .LCPI4_0(%rip), %xmm0
.cfi_escape 0x2e, 0x00
movl $_ZSt4cout, %edi
callq _ZNSo9_M_insertIdEERSoT_
.cfi_escape 0x2e, 0x00
leaq 96(%rsp), %r15
movq %r15, %rdi
callq _ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev
leaq 104(%rsp), %r14
.Ltmp0:
.cfi_escape 0x2e, 0x00
movl $.L.str.4, %esi
movq %r14, %rdi
movl $16, %edx
callq _ZNSt13basic_filebufIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode
.Ltmp1:
# %bb.7: # %.noexc
movq 96(%rsp), %rcx
addq -24(%rcx), %r15
xorl %esi, %esi
testq %rax, %rax
jne .LBB4_9
# %bb.8:
movl 32(%r15), %esi
orl $4, %esi
.LBB4_9: # %.invoke
.Ltmp2:
.cfi_escape 0x2e, 0x00
movq %r15, %rdi
callq _ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.Ltmp3:
# %bb.10: # %_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode.exit.preheader
xorl %ebp, %ebp
leaq 96(%rsp), %r15
.p2align 4, 0x90
.LBB4_11: # %_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode.exit
# =>This Inner Loop Header: Depth=1
movl (%rbx,%rbp,4), %esi
.Ltmp4:
.cfi_escape 0x2e, 0x00
movq %r15, %rdi
callq _ZNSolsEi
.Ltmp5:
# %bb.12: # in Loop: Header=BB4_11 Depth=1
movq %rax, %r12
movq (%rax), %rax
movq -24(%rax), %rax
movq 240(%r12,%rax), %r13
testq %r13, %r13
je .LBB4_13
# %bb.20: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
# in Loop: Header=BB4_11 Depth=1
cmpb $0, 56(%r13)
je .LBB4_22
# %bb.21: # in Loop: Header=BB4_11 Depth=1
movzbl 67(%r13), %eax
jmp .LBB4_24
.p2align 4, 0x90
.LBB4_22: # in Loop: Header=BB4_11 Depth=1
.Ltmp6:
.cfi_escape 0x2e, 0x00
movq %r13, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
.Ltmp7:
# %bb.23: # %.noexc28
# in Loop: Header=BB4_11 Depth=1
movq (%r13), %rax
.Ltmp8:
.cfi_escape 0x2e, 0x00
movq %r13, %rdi
movl $10, %esi
callq *48(%rax)
.Ltmp9:
.LBB4_24: # %_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc.exit.i
# in Loop: Header=BB4_11 Depth=1
.Ltmp10:
.cfi_escape 0x2e, 0x00
movsbl %al, %esi
movq %r12, %rdi
callq _ZNSo3putEc
.Ltmp11:
# %bb.25: # %.noexc30
# in Loop: Header=BB4_11 Depth=1
.Ltmp12:
.cfi_escape 0x2e, 0x00
movq %rax, %rdi
callq _ZNSo5flushEv
.Ltmp13:
# %bb.26: # %_ZNSolsEPFRSoS_E.exit
# in Loop: Header=BB4_11 Depth=1
incq %rbp
cmpq $10000, %rbp # imm = 0x2710
jne .LBB4_11
# %bb.14:
.cfi_escape 0x2e, 0x00
movq %rbx, %rdi
callq free
.Ltmp15:
.cfi_escape 0x2e, 0x00
movq %r14, %rdi
callq _ZNSt13basic_filebufIcSt11char_traitsIcEE5closeEv
.Ltmp16:
# %bb.15: # %.noexc24
testq %rax, %rax
jne .LBB4_17
# %bb.16:
movq 96(%rsp), %rax
movq -24(%rax), %rax
leaq (%rsp,%rax), %rdi
addq $96, %rdi
movl 128(%rsp,%rax), %esi
orl $4, %esi
.Ltmp17:
.cfi_escape 0x2e, 0x00
callq _ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.Ltmp18:
.LBB4_17: # %_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv.exit
.Ltmp19:
.cfi_escape 0x2e, 0x00
leaq 7(%rsp), %rsi
movl $_ZSt3cin, %edi
callq _ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_RS3_
.Ltmp20:
# %bb.18:
.cfi_escape 0x2e, 0x00
leaq 96(%rsp), %rdi
callq _ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev
xorl %eax, %eax
addq $616, %rsp # imm = 0x268
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB4_13:
.cfi_def_cfa_offset 672
.Ltmp22:
.cfi_escape 0x2e, 0x00
callq _ZSt16__throw_bad_castv
.Ltmp23:
# %bb.19: # %.noexc27
.LBB4_29:
.Ltmp21:
jmp .LBB4_30
.LBB4_28: # %.loopexit.split-lp
.Ltmp24:
jmp .LBB4_30
.LBB4_27: # %.loopexit
.Ltmp14:
.LBB4_30:
movq %rax, %rbx
.cfi_escape 0x2e, 0x00
leaq 96(%rsp), %rdi
callq _ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev
.cfi_escape 0x2e, 0x00
movq %rbx, %rdi
callq _Unwind_Resume@PLT
.Lfunc_end4:
.size main, .Lfunc_end4-main
.cfi_endproc
.section .gcc_except_table,"a",@progbits
.p2align 2, 0x0
GCC_except_table4:
.Lexception0:
.byte 255 # @LPStart Encoding = omit
.byte 255 # @TType Encoding = omit
.byte 1 # Call site Encoding = uleb128
.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
.uleb128 .Lfunc_begin0-.Lfunc_begin0 # >> Call Site 1 <<
.uleb128 .Ltmp0-.Lfunc_begin0 # Call between .Lfunc_begin0 and .Ltmp0
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.uleb128 .Ltmp0-.Lfunc_begin0 # >> Call Site 2 <<
.uleb128 .Ltmp3-.Ltmp0 # Call between .Ltmp0 and .Ltmp3
.uleb128 .Ltmp21-.Lfunc_begin0 # jumps to .Ltmp21
.byte 0 # On action: cleanup
.uleb128 .Ltmp4-.Lfunc_begin0 # >> Call Site 3 <<
.uleb128 .Ltmp13-.Ltmp4 # Call between .Ltmp4 and .Ltmp13
.uleb128 .Ltmp14-.Lfunc_begin0 # jumps to .Ltmp14
.byte 0 # On action: cleanup
.uleb128 .Ltmp15-.Lfunc_begin0 # >> Call Site 4 <<
.uleb128 .Ltmp20-.Ltmp15 # Call between .Ltmp15 and .Ltmp20
.uleb128 .Ltmp21-.Lfunc_begin0 # jumps to .Ltmp21
.byte 0 # On action: cleanup
.uleb128 .Ltmp22-.Lfunc_begin0 # >> Call Site 5 <<
.uleb128 .Ltmp23-.Ltmp22 # Call between .Ltmp22 and .Ltmp23
.uleb128 .Ltmp24-.Lfunc_begin0 # jumps to .Ltmp24
.byte 0 # On action: cleanup
.uleb128 .Ltmp23-.Lfunc_begin0 # >> Call Site 6 <<
.uleb128 .Lfunc_end4-.Ltmp23 # Call between .Ltmp23 and .Lfunc_end4
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.Lcst_end0:
.p2align 2, 0x0
# -- End function
.text
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB5_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB5_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z6evolvePiiiii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end5:
.size __hip_module_ctor, .Lfunc_end5-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB6_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB6_2:
retq
.Lfunc_end6:
.size __hip_module_dtor, .Lfunc_end6-__hip_module_dtor
.cfi_endproc
# -- End function
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "O"
.size .L.str, 2
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz " "
.size .L.str.1, 2
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "-"
.size .L.str.2, 2
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "cls"
.size .L.str.3, 4
.type _Z6evolvePiiiii,@object # @_Z6evolvePiiiii
.section .rodata,"a",@progbits
.globl _Z6evolvePiiiii
.p2align 3, 0x0
_Z6evolvePiiiii:
.quad _Z21__device_stub__evolvePiiiii
.size _Z6evolvePiiiii, 8
.type .L.str.4,@object # @.str.4
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.4:
.asciz "para4.txt"
.size .L.str.4, 10
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z6evolvePiiiii"
.size .L__unnamed_1, 16
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z21__device_stub__evolvePiiiii
.addrsig_sym __gxx_personality_v0
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Unwind_Resume
.addrsig_sym _ZSt4cout
.addrsig_sym _Z6evolvePiiiii
.addrsig_sym _ZSt3cin
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z6evolvePiiiii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fc800078e0203 */
/*0040*/ IMAD R9, R0, c[0x0][0x174], RZ ; /* 0x00005d0000097a24 */
/* 0x000fca00078e02ff */
/*0050*/ IADD3 R0, R9, c[0x0][0x174], RZ ; /* 0x00005d0009007a10 */
/* 0x000fc80007ffe0ff */
/*0060*/ ISETP.GE.AND P0, PT, R9, R0, PT ; /* 0x000000000900720c */
/* 0x000fda0003f06270 */
/*0070*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0080*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0090*/ IMAD.MOV.U32 R2, RZ, RZ, 0x4 ; /* 0x00000004ff027424 */
/* 0x001fc800078e00ff */
/*00a0*/ IMAD.WIDE R2, R9, R2, c[0x0][0x160] ; /* 0x0000580009027625 */
/* 0x000fca00078e0202 */
/*00b0*/ LDG.E R6, [R2.64] ; /* 0x0000000402067981 */
/* 0x000ea2000c1e1900 */
/*00c0*/ IABS R10, c[0x0][0x16c] ; /* 0x00005b00000a7a13 */
/* 0x000fe20000000000 */
/*00d0*/ BSSY B0, 0x730 ; /* 0x0000065000007945 */
/* 0x000fe20003800000 */
/*00e0*/ IABS R8, R9 ; /* 0x0000000900087213 */
/* 0x000fe20000000000 */
/*00f0*/ IMAD.MOV.U32 R12, RZ, RZ, RZ ; /* 0x000000ffff0c7224 */
/* 0x000fe200078e00ff */
/*0100*/ I2F.RP R7, R10 ; /* 0x0000000a00077306 */
/* 0x000e300000209400 */
/*0110*/ MUFU.RCP R7, R7 ; /* 0x0000000700077308 */
/* 0x001e240000001000 */
/*0120*/ IADD3 R4, R7, 0xffffffe, RZ ; /* 0x0ffffffe07047810 */
/* 0x001fcc0007ffe0ff */
/*0130*/ F2I.FTZ.U32.TRUNC.NTZ R5, R4 ; /* 0x0000000400057305 */
/* 0x000064000021f000 */
/*0140*/ IMAD.MOV.U32 R4, RZ, RZ, RZ ; /* 0x000000ffff047224 */
/* 0x001fe400078e00ff */
/*0150*/ IMAD.MOV R11, RZ, RZ, -R5 ; /* 0x000000ffff0b7224 */
/* 0x002fc800078e0a05 */
/*0160*/ IMAD R11, R11, R10, RZ ; /* 0x0000000a0b0b7224 */
/* 0x000fc800078e02ff */
/*0170*/ IMAD.HI.U32 R5, R5, R11, R4 ; /* 0x0000000b05057227 */
/* 0x000fe200078e0004 */
/*0180*/ LOP3.LUT R4, R9, c[0x0][0x16c], RZ, 0x3c, !PT ; /* 0x00005b0009047a12 */
/* 0x000fc600078e3cff */
/*0190*/ IMAD.MOV.U32 R11, RZ, RZ, R8 ; /* 0x000000ffff0b7224 */
/* 0x000fe200078e0008 */
/*01a0*/ ISETP.GE.AND P2, PT, R4, RZ, PT ; /* 0x000000ff0400720c */
/* 0x000fc60003f46270 */
/*01b0*/ IMAD.HI.U32 R8, R5, R11, RZ ; /* 0x0000000b05087227 */
/* 0x000fc800078e00ff */
/*01c0*/ IMAD.MOV R5, RZ, RZ, -R8 ; /* 0x000000ffff057224 */
/* 0x000fc800078e0a08 */
/*01d0*/ IMAD R5, R10, R5, R11 ; /* 0x000000050a057224 */
/* 0x000fca00078e020b */
/*01e0*/ ISETP.GT.U32.AND P1, PT, R10, R5, PT ; /* 0x000000050a00720c */
/* 0x000fda0003f24070 */
/*01f0*/ @!P1 IMAD.IADD R5, R5, 0x1, -R10 ; /* 0x0000000105059824 */
/* 0x000fe200078e0a0a */
/*0200*/ @!P1 IADD3 R8, R8, 0x1, RZ ; /* 0x0000000108089810 */
/* 0x000fe40007ffe0ff */
/*0210*/ ISETP.NE.AND P1, PT, RZ, c[0x0][0x16c], PT ; /* 0x00005b00ff007a0c */
/* 0x000fe40003f25270 */
/*0220*/ ISETP.GE.U32.AND P0, PT, R5, R10, PT ; /* 0x0000000a0500720c */
/* 0x000fda0003f06070 */
/*0230*/ @P0 IADD3 R8, R8, 0x1, RZ ; /* 0x0000000108080810 */
/* 0x000fca0007ffe0ff */
/*0240*/ @!P2 IMAD.MOV R8, RZ, RZ, -R8 ; /* 0x000000ffff08a224 */
/* 0x000fe200078e0a08 */
/*0250*/ @!P1 LOP3.LUT R8, RZ, c[0x0][0x16c], RZ, 0x33, !PT ; /* 0x00005b00ff089a12 */
/* 0x000fc800078e33ff */
/*0260*/ IADD3 R13, R8, -0x1, RZ ; /* 0xffffffff080d7810 */
/* 0x000fe20007ffe0ff */
/*0270*/ IMAD.MOV R4, RZ, RZ, -R8 ; /* 0x000000ffff047224 */
/* 0x000fc800078e0a08 */
/*0280*/ IMAD R15, R4, c[0x0][0x16c], R9 ; /* 0x00005b00040f7a24 */
/* 0x000fca00078e0209 */
/*0290*/ IADD3 R14, R15.reuse, c[0x0][0x16c], RZ ; /* 0x00005b000f0e7a10 */
/* 0x040fe40007ffe0ff */
/*02a0*/ IADD3 R11, R15.reuse, -0x2, RZ ; /* 0xfffffffe0f0b7810 */
/* 0x040fe40007ffe0ff */
/*02b0*/ IADD3 R10, R15, -0x1, RZ ; /* 0xffffffff0f0a7810 */
/* 0x000fe40007ffe0ff */
/*02c0*/ IADD3 R14, R14, -0x1, RZ ; /* 0xffffffff0e0e7810 */
/* 0x000fe20007ffe0ff */
/*02d0*/ STS [R9.X4], R6 ; /* 0x0000000609007388 */
/* 0x0041e80000004800 */
/*02e0*/ BSSY B1, 0x6f0 ; /* 0x0000040000017945 */
/* 0x000fe20003800000 */
/*02f0*/ IADD3 R22, R13.reuse, c[0x0][0x168], RZ ; /* 0x00005a000d167a10 */
/* 0x040fe20007ffe0ff */
/*0300*/ IMAD R16, R13, c[0x0][0x16c], R10 ; /* 0x00005b000d107a24 */
/* 0x000fe400078e020a */
/*0310*/ IMAD.MOV.U32 R17, RZ, RZ, R14 ; /* 0x000000ffff117224 */
/* 0x000fc400078e000e */
/*0320*/ IMAD.MOV.U32 R18, RZ, RZ, R11 ; /* 0x000000ffff127224 */
/* 0x001fca00078e000b */
/*0330*/ IADD3 R18, R18, 0x1, RZ ; /* 0x0000000112127810 */
/* 0x000fe20007ffe0ff */
/*0340*/ BSSY B2, 0x680 ; /* 0x0000033000027945 */
/* 0x000fe60003800000 */
/*0350*/ LOP3.LUT R4, R18.reuse, R13, RZ, 0xfc, !PT ; /* 0x0000000d12047212 */
/* 0x040fe400078efcff */
/*0360*/ ISETP.LT.AND P1, PT, R18, c[0x0][0x16c], PT ; /* 0x00005b0012007a0c */
/* 0x000fe40003f21270 */
/*0370*/ ISETP.GT.AND P0, PT, R4, -0x1, PT ; /* 0xffffffff0400780c */
/* 0x000fe20003f04270 */
/*0380*/ IMAD.MOV.U32 R4, RZ, RZ, R16 ; /* 0x000000ffff047224 */
/* 0x000fc600078e0010 */
/*0390*/ ISETP.LT.AND P0, PT, R13, c[0x0][0x168], P0 ; /* 0x00005a000d007a0c */
/* 0x000fda0000701270 */
/*03a0*/ @P0 BRA P1, 0x670 ; /* 0x000002c000000947 */
/* 0x001fea0000800000 */
/*03b0*/ IABS R19, c[0x0][0x168] ; /* 0x00005a0000137a13 */
/* 0x000fe40000000000 */
/*03c0*/ IABS R20, c[0x0][0x16c] ; /* 0x00005b0000147a13 */
/* 0x000fe40000000000 */
/*03d0*/ I2F.RP R21, R19 ; /* 0x0000001300157306 */
/* 0x000e620000209400 */
/*03e0*/ ISETP.NE.AND P4, PT, RZ, c[0x0][0x16c], PT ; /* 0x00005b00ff007a0c */
/* 0x000fce0003f85270 */
/*03f0*/ I2F.RP R24, R20 ; /* 0x0000001400187306 */
/* 0x000eb00000209400 */
/*0400*/ MUFU.RCP R21, R21 ; /* 0x0000001500157308 */
/* 0x002e700000001000 */
/*0410*/ MUFU.RCP R24, R24 ; /* 0x0000001800187308 */
/* 0x004ea20000001000 */
/*0420*/ IADD3 R4, R21, 0xffffffe, RZ ; /* 0x0ffffffe15047810 */
/* 0x002fc40007ffe0ff */
/*0430*/ IABS R21, R22 ; /* 0x0000001600157213 */
/* 0x000fca0000000000 */
/*0440*/ F2I.FTZ.U32.TRUNC.NTZ R5, R4 ; /* 0x0000000400057305 */
/* 0x0002e2000021f000 */
/*0450*/ IADD3 R6, R24, 0xffffffe, RZ ; /* 0x0ffffffe18067810 */
/* 0x005fce0007ffe0ff */
/*0460*/ F2I.FTZ.U32.TRUNC.NTZ R7, R6 ; /* 0x0000000600077305 */
/* 0x0000a2000021f000 */
/*0470*/ IMAD.MOV.U32 R4, RZ, RZ, RZ ; /* 0x000000ffff047224 */
/* 0x002fe400078e00ff */
/*0480*/ IMAD.MOV R26, RZ, RZ, -R5 ; /* 0x000000ffff1a7224 */
/* 0x008fe400078e0a05 */
/*0490*/ IMAD.MOV.U32 R6, RZ, RZ, RZ ; /* 0x000000ffff067224 */
/* 0x001fe400078e00ff */
/*04a0*/ IMAD R23, R26, R19, RZ ; /* 0x000000131a177224 */
/* 0x000fc800078e02ff */
/*04b0*/ IMAD.HI.U32 R4, R5, R23, R4 ; /* 0x0000001705047227 */
/* 0x000fe200078e0004 */
/*04c0*/ IABS R5, R17 ; /* 0x0000001100057213 */
/* 0x000fc60000000000 */
/*04d0*/ IMAD.MOV R25, RZ, RZ, -R7 ; /* 0x000000ffff197224 */
/* 0x004fe400078e0a07 */
/*04e0*/ IMAD.HI.U32 R4, R4, R21, RZ ; /* 0x0000001504047227 */
/* 0x000fc800078e00ff */
/*04f0*/ IMAD R25, R25, R20, RZ ; /* 0x0000001419197224 */
/* 0x000fe400078e02ff */
/*0500*/ IMAD.MOV R4, RZ, RZ, -R4 ; /* 0x000000ffff047224 */
/* 0x000fe400078e0a04 */
/*0510*/ IMAD.HI.U32 R6, R7, R25, R6 ; /* 0x0000001907067227 */
/* 0x000fc800078e0006 */
/*0520*/ IMAD.MOV.U32 R7, RZ, RZ, R5 ; /* 0x000000ffff077224 */
/* 0x000fe400078e0005 */
/*0530*/ IMAD R4, R19, R4, R21 ; /* 0x0000000413047224 */
/* 0x000fe400078e0215 */
/*0540*/ IMAD.HI.U32 R5, R6, R7, RZ ; /* 0x0000000706057227 */
/* 0x000fc600078e00ff */
/*0550*/ ISETP.GT.U32.AND P0, PT, R19, R4, PT ; /* 0x000000041300720c */
/* 0x000fe20003f04070 */
/*0560*/ IMAD.MOV R5, RZ, RZ, -R5 ; /* 0x000000ffff057224 */
/* 0x000fc800078e0a05 */
/*0570*/ IMAD R5, R20, R5, R7 ; /* 0x0000000514057224 */
/* 0x000fca00078e0207 */
/*0580*/ ISETP.GT.U32.AND P1, PT, R20, R5, PT ; /* 0x000000051400720c */
/* 0x000fc60003f24070 */
/*0590*/ @!P0 IMAD.IADD R4, R4, 0x1, -R19 ; /* 0x0000000104048824 */
/* 0x000fe200078e0a13 */
/*05a0*/ ISETP.GE.AND P0, PT, R17, RZ, PT ; /* 0x000000ff1100720c */
/* 0x000fc80003f06270 */
/*05b0*/ ISETP.GT.U32.AND P3, PT, R19, R4, PT ; /* 0x000000041300720c */
/* 0x000fca0003f64070 */
/*05c0*/ @!P1 IMAD.IADD R5, R5, 0x1, -R20 ; /* 0x0000000105059824 */
/* 0x000fe200078e0a14 */
/*05d0*/ ISETP.GE.AND P1, PT, R22, RZ, PT ; /* 0x000000ff1600720c */
/* 0x000fc80003f26270 */
/*05e0*/ ISETP.GT.U32.AND P2, PT, R20, R5, PT ; /* 0x000000051400720c */
/* 0x000fc60003f44070 */
/*05f0*/ @!P3 IMAD.IADD R4, R4, 0x1, -R19 ; /* 0x000000010404b824 */
/* 0x000fe200078e0a13 */
/*0600*/ ISETP.NE.AND P3, PT, RZ, c[0x0][0x168], PT ; /* 0x00005a00ff007a0c */
/* 0x000fca0003f65270 */
/*0610*/ @!P1 IMAD.MOV R4, RZ, RZ, -R4 ; /* 0x000000ffff049224 */
/* 0x000fc800078e0a04 */
/*0620*/ @!P2 IMAD.IADD R5, R5, 0x1, -R20 ; /* 0x000000010505a824 */
/* 0x000fc800078e0a14 */
/*0630*/ @!P0 IMAD.MOV R5, RZ, RZ, -R5 ; /* 0x000000ffff058224 */
/* 0x000fe200078e0a05 */
/*0640*/ @!P3 LOP3.LUT R4, RZ, c[0x0][0x168], RZ, 0x33, !PT ; /* 0x00005a00ff04ba12 */
/* 0x000fe400078e33ff */
/*0650*/ @!P4 LOP3.LUT R5, RZ, c[0x0][0x16c], RZ, 0x33, !PT ; /* 0x00005b00ff05ca12 */
/* 0x000fca00078e33ff */
/*0660*/ IMAD R4, R4, c[0x0][0x16c], R5 ; /* 0x00005b0004047a24 */
/* 0x000fe400078e0205 */
/*0670*/ BSYNC B2 ; /* 0x0000000000027941 */
/* 0x000fea0003800000 */
/*0680*/ LDS R5, [R4.X4] ; /* 0x0000000004057984 */
/* 0x000e620000004800 */
/*0690*/ ISETP.GT.AND P0, PT, R18, R15, PT ; /* 0x0000000f1200720c */
/* 0x000fe40003f04270 */
/*06a0*/ IADD3 R16, R16, 0x1, RZ ; /* 0x0000000110107810 */
/* 0x000fe40007ffe0ff */
/*06b0*/ IADD3 R17, R17, 0x1, RZ ; /* 0x0000000111117810 */
/* 0x000fe20007ffe0ff */
/*06c0*/ IMAD.IADD R12, R5, 0x1, R12 ; /* 0x00000001050c7824 */
/* 0x002fd000078e020c */
/*06d0*/ @!P0 BRA 0x330 ; /* 0xfffffc5000008947 */
/* 0x000fea000383ffff */
/*06e0*/ BSYNC B1 ; /* 0x0000000000017941 */
/* 0x000fea0003800000 */
/*06f0*/ ISETP.GT.AND P0, PT, R13.reuse, R8, PT ; /* 0x000000080d00720c */
/* 0x040fe40003f04270 */
/*0700*/ IADD3 R13, R13, 0x1, RZ ; /* 0x000000010d0d7810 */
/* 0x000fd60007ffe0ff */
/*0710*/ @!P0 BRA 0x2e0 ; /* 0xfffffbc000008947 */
/* 0x000fea000383ffff */
/*0720*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0730*/ IMAD R8, R8, c[0x0][0x16c], R15 ; /* 0x00005b0008087a24 */
/* 0x000fe200078e020f */
/*0740*/ IADD3 R9, R9, 0x1, RZ ; /* 0x0000000109097810 */
/* 0x001fe20007ffe0ff */
/*0750*/ WARPSYNC 0xffffffff ; /* 0xffffffff00007948 */
/* 0x000fe60003800000 */
/*0760*/ LDS R5, [R8.X4] ; /* 0x0000000008057984 */
/* 0x000e240000004800 */
/*0770*/ IMAD.IADD R12, R12, 0x1, -R5 ; /* 0x000000010c0c7824 */
/* 0x001fe200078e0a05 */
/*0780*/ ISETP.NE.AND P0, PT, R5, 0x1, PT ; /* 0x000000010500780c */
/* 0x000fc80003f05270 */
/*0790*/ LOP3.LUT R4, R12.reuse, 0xfffffffe, RZ, 0xc0, !PT ; /* 0xfffffffe0c047812 */
/* 0x040fe400078ec0ff */
/*07a0*/ ISETP.NE.AND P2, PT, R12, 0x3, PT ; /* 0x000000030c00780c */
/* 0x000fe40003f45270 */
/*07b0*/ ISETP.NE.AND P1, PT, R4, 0x2, PT ; /* 0x000000020400780c */
/* 0x000fe40003f25270 */
/*07c0*/ SEL R4, RZ, 0xffffffff, P2 ; /* 0xffffffffff047807 */
/* 0x000fc60001000000 */
/*07d0*/ @!P0 SEL R4, RZ, 0xffffffff, P1 ; /* 0xffffffffff048807 */
/* 0x000fe40000800000 */
/*07e0*/ ISETP.GE.AND P0, PT, R9, R0, PT ; /* 0x000000000900720c */
/* 0x000fe40003f06270 */
/*07f0*/ LOP3.LUT R5, R4, 0x1, RZ, 0xc0, !PT ; /* 0x0000000104057812 */
/* 0x000fca00078ec0ff */
/*0800*/ STG.E [R2.64], R5 ; /* 0x0000000502007986 */
/* 0x0001e8000c101904 */
/*0810*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0820*/ @!P0 BRA 0x90 ; /* 0xfffff86000008947 */
/* 0x000fea000383ffff */
/*0830*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0840*/ BRA 0x840; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0850*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0860*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0870*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0880*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0890*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*08f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6evolvePiiiii
.globl _Z6evolvePiiiii
.p2align 8
.type _Z6evolvePiiiii,@function
_Z6evolvePiiiii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x14
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_mul_lo_u32 v0, v1, s3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v6, s3, v0
v_cmpx_lt_i32_e64 v0, v6
s_cbranch_execz .LBB0_11
s_load_b128 s[4:7], s[0:1], 0x0
s_mov_b32 s10, 0
s_waitcnt lgkmcnt(0)
s_ashr_i32 s0, s6, 31
s_ashr_i32 s3, s7, 31
s_add_i32 s1, s6, s0
s_add_i32 s8, s7, s3
s_mov_b32 s2, s7
s_xor_b32 s7, s1, s0
s_xor_b32 s8, s8, s3
v_cvt_f32_u32_e32 v1, s7
v_cvt_f32_u32_e32 v2, s8
s_sub_i32 s0, 0, s7
s_sub_i32 s1, 0, s8
s_not_b32 s9, s2
v_rcp_iflag_f32_e32 v1, v1
v_rcp_iflag_f32_e32 v2, v2
s_waitcnt_depctr 0xfff
v_dual_mul_f32 v1, 0x4f7ffffe, v1 :: v_dual_mul_f32 v2, 0x4f7ffffe, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cvt_u32_f32_e32 v1, v1
v_cvt_u32_f32_e32 v2, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_lo_u32 v3, s0, v1
v_mul_lo_u32 v4, s1, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_hi_u32 v3, v1, v3
v_mul_hi_u32 v4, v2, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v7, v1, v3
v_add_nc_u32_e32 v8, v2, v4
s_branch .LBB0_3
.LBB0_2:
s_or_b32 exec_lo, exec_lo, s11
v_mad_u64_u32 v[4:5], null, v9, s2, v[3:4]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_lshl_add_u32 v3, v4, 2, 0
ds_load_b32 v3, v3
s_waitcnt lgkmcnt(0)
v_sub_nc_u32_e32 v4, v10, v3
v_and_b32_e32 v5, -2, v4
v_cmp_eq_u32_e32 vcc_lo, 3, v4
v_cndmask_b32_e64 v4, 0, 1, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_cmp_eq_u32_e32 vcc_lo, 2, v5
v_cndmask_b32_e64 v5, 0, 1, vcc_lo
v_cmp_eq_u32_e32 vcc_lo, 1, v3
v_dual_cndmask_b32 v3, v4, v5 :: v_dual_add_nc_u32 v0, 1, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_eq_u32_e32 vcc_lo, v0, v6
v_and_b32_e32 v3, 1, v3
s_or_b32 s10, vcc_lo, s10
global_store_b32 v[1:2], v3, off
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_and_not1_b32 exec_lo, exec_lo, s10
s_cbranch_execz .LBB0_11
.LBB0_3:
v_ashrrev_i32_e32 v1, 31, v0
v_ashrrev_i32_e32 v3, 31, v0
v_add_nc_u32_e32 v12, s9, v0
s_mov_b32 s11, 0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[1:2], 2, v[0:1]
v_add_nc_u32_e32 v4, v0, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_xor_b32_e32 v4, v4, v3
v_add_co_u32 v1, vcc_lo, s4, v1
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
v_mul_hi_u32 v5, v4, v8
v_xor_b32_e32 v3, s3, v3
global_load_b32 v15, v[1:2], off
v_mul_lo_u32 v9, v5, s8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v4, v4, v9
v_subrev_nc_u32_e32 v10, s8, v4
v_cmp_le_u32_e32 vcc_lo, s8, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_cndmask_b32 v4, v4, v10 :: v_dual_add_nc_u32 v9, 1, v5
v_cndmask_b32_e32 v5, v5, v9, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_le_u32_e32 vcc_lo, s8, v4
v_add_nc_u32_e32 v9, 1, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v4, v5, v9, vcc_lo
v_xor_b32_e32 v4, v4, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v9, v4, v3
v_sub_nc_u32_e32 v3, v3, v4
v_mul_lo_u32 v10, v9, s2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
v_mad_u64_u32 v[4:5], null, s2, v3, s[2:3]
v_lshl_add_u32 v5, v0, 2, 0
v_add_nc_u32_e32 v14, -1, v9
v_sub_nc_u32_e32 v3, v0, v10
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add3_u32 v13, v0, v4, -1
v_dual_mov_b32 v10, 0 :: v_dual_add_nc_u32 v11, -1, v3
s_waitcnt vmcnt(0)
ds_store_b32 v5, v15
s_branch .LBB0_5
.LBB0_4:
s_or_b32 exec_lo, exec_lo, s13
v_add_nc_u32_e32 v4, 1, v14
v_cmp_gt_i32_e32 vcc_lo, v14, v9
v_add_nc_u32_e32 v12, s2, v12
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_mov_b32_e32 v14, v4
s_or_b32 s11, vcc_lo, s11
s_and_not1_b32 exec_lo, exec_lo, s11
s_cbranch_execz .LBB0_2
.LBB0_5:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
v_dual_mov_b32 v17, v13 :: v_dual_add_nc_u32 v4, s6, v14
v_cmp_gt_i32_e64 s0, s6, v14
v_cmp_lt_i32_e32 vcc_lo, -1, v14
v_cmp_gt_i32_e64 s12, 0, v14
v_ashrrev_i32_e32 v15, 31, v4
v_mov_b32_e32 v18, v12
v_mov_b32_e32 v20, v11
s_mov_b32 s13, 0
s_xor_b32 s14, s0, -1
v_add_nc_u32_e32 v4, v4, v15
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v4, v4, v15
v_mul_hi_u32 v5, v4, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v5, v5, s7
v_sub_nc_u32_e32 v16, v4, v5
s_delay_alu instid0(VALU_DEP_1)
v_subrev_nc_u32_e32 v19, s7, v16
s_branch .LBB0_7
.LBB0_6:
s_or_b32 exec_lo, exec_lo, s1
s_delay_alu instid0(VALU_DEP_1)
v_lshl_add_u32 v4, v4, 2, 0
v_add_nc_u32_e32 v5, 1, v20
v_cmp_gt_i32_e64 s0, v20, v3
v_add_nc_u32_e32 v18, 1, v18
v_add_nc_u32_e32 v17, 1, v17
ds_load_b32 v4, v4
v_mov_b32_e32 v20, v5
s_or_b32 s13, s0, s13
s_waitcnt lgkmcnt(0)
v_add_nc_u32_e32 v10, v4, v10
s_and_not1_b32 exec_lo, exec_lo, s13
s_cbranch_execz .LBB0_4
.LBB0_7:
s_mov_b32 s0, s12
s_and_saveexec_b32 s15, vcc_lo
v_cmp_gt_i32_e64 s0, 0, v20
v_cmp_le_i32_e64 s1, s2, v20
s_delay_alu instid0(VALU_DEP_2)
s_or_b32 s0, s14, s0
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
s_or_b32 s0, s1, s0
s_and_not1_b32 s1, s12, exec_lo
s_and_b32 s0, s0, exec_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 s0, s1, s0
s_or_b32 exec_lo, exec_lo, s15
v_mov_b32_e32 v4, v18
s_and_saveexec_b32 s1, s0
s_cbranch_execz .LBB0_6
v_ashrrev_i32_e32 v4, 31, v17
v_cmp_le_u32_e64 s0, s7, v16
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v5, v17, v4
v_cndmask_b32_e64 v22, v16, v19, s0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v5, v5, v4
v_mul_hi_u32 v21, v5, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v21, v21, s8
v_sub_nc_u32_e32 v5, v5, v21
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_subrev_nc_u32_e32 v21, s8, v5
v_cmp_le_u32_e64 s0, s8, v5
v_cndmask_b32_e64 v5, v5, v21, s0
v_subrev_nc_u32_e32 v21, s7, v22
v_cmp_le_u32_e64 s0, s7, v22
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v23, s8, v5
v_cndmask_b32_e64 v21, v22, v21, s0
v_cmp_le_u32_e64 s0, s8, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_xor_b32_e32 v21, v21, v15
v_cndmask_b32_e64 v5, v5, v23, s0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v22, v21, v15
v_xor_b32_e32 v5, v5, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v21, v5, v4
v_mad_u64_u32 v[4:5], null, v22, s2, v[21:22]
s_branch .LBB0_6
.LBB0_11:
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z6evolvePiiiii
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 280
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 24
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z6evolvePiiiii, .Lfunc_end0-_Z6evolvePiiiii
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: by_value
- .offset: 12
.size: 4
.value_kind: by_value
- .offset: 16
.size: 4
.value_kind: by_value
- .offset: 20
.size: 4
.value_kind: by_value
- .offset: 24
.size: 4
.value_kind: hidden_block_count_x
- .offset: 28
.size: 4
.value_kind: hidden_block_count_y
- .offset: 32
.size: 4
.value_kind: hidden_block_count_z
- .offset: 36
.size: 2
.value_kind: hidden_group_size_x
- .offset: 38
.size: 2
.value_kind: hidden_group_size_y
- .offset: 40
.size: 2
.value_kind: hidden_group_size_z
- .offset: 42
.size: 2
.value_kind: hidden_remainder_x
- .offset: 44
.size: 2
.value_kind: hidden_remainder_y
- .offset: 46
.size: 2
.value_kind: hidden_remainder_z
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 88
.size: 2
.value_kind: hidden_grid_dims
- .offset: 144
.size: 4
.value_kind: hidden_dynamic_lds_size
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 280
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z6evolvePiiiii
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z6evolvePiiiii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 24
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0001b241_00000000-6_Para4.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4021:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4021:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z6getPosiii
.type _Z6getPosiii, @function
_Z6getPosiii:
.LFB4010:
.cfi_startproc
endbr64
imull %edx, %edi
leal (%rdi,%rsi), %eax
ret
.cfi_endproc
.LFE4010:
.size _Z6getPosiii, .-_Z6getPosiii
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "O"
.LC1:
.string " "
.LC2:
.string "-"
.LC3:
.string "cls"
.text
.globl _Z10printCellsPiii
.type _Z10printCellsPiii, @function
_Z10printCellsPiii:
.LFB4011:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $72, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 24(%rsp)
movl %esi, 20(%rsp)
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
cmpl $-1, %esi
jl .L5
movl %edx, %r12d
movl $0, 16(%rsp)
movl $0, 12(%rsp)
leaq .LC2(%rip), %r15
leaq _ZSt4cout(%rip), %rbp
leaq .LC1(%rip), %r14
jmp .L6
.L26:
movl $1, %edx
leaq .LC0(%rip), %rsi
movq %rbp, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movl $1, %edx
movq %r14, %rsi
movq %rbp, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
.L8:
addq $1, %rbx
leal -1(%rbx), %eax
cmpl %eax, %r12d
jl .L15
.L9:
cmpl $1, 0(%r13,%rbx,4)
je .L26
movl $1, %edx
movq %r15, %rsi
movq %rbp, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
movl $1, %edx
movq %r14, %rsi
movq %rbp, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
jmp .L8
.L15:
movq 0(%rbp), %rax
movq -24(%rax), %rax
movq 240(%rbp,%rax), %rbx
testq %rbx, %rbx
je .L27
cmpb $0, 56(%rbx)
je .L12
movzbl 67(%rbx), %esi
.L13:
movsbl %sil, %esi
movq %rbp, %rdi
call _ZNSo3putEc@PLT
movq %rax, %rdi
call _ZNSo5flushEv@PLT
movl 12(%rsp), %ecx
leal 1(%rcx), %eax
addl %r12d, 16(%rsp)
cmpl %ecx, 20(%rsp)
jl .L5
movl %eax, 12(%rsp)
.L6:
cmpl $-1, %r12d
jl .L15
movslq 16(%rsp), %rax
movq 24(%rsp), %rcx
leaq (%rcx,%rax,4), %r13
movl $0, %ebx
jmp .L9
.L27:
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L28
call _ZSt16__throw_bad_castv@PLT
.L28:
call __stack_chk_fail@PLT
.L12:
movq %rbx, %rdi
call _ZNKSt5ctypeIcE13_M_widen_initEv@PLT
movq (%rbx), %rax
movl $10, %esi
movq %rbx, %rdi
call *48(%rax)
movl %eax, %esi
jmp .L13
.L5:
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
leaq _ZSt4cout(%rip), %rdx
movq 240(%rdx,%rax), %rbx
testq %rbx, %rbx
je .L29
cmpb $0, 56(%rbx)
je .L18
movzbl 67(%rbx), %eax
.L19:
movsbl %al, %esi
leaq _ZSt4cout(%rip), %rdi
call _ZNSo3putEc@PLT
movq %rax, %rdi
call _ZNSo5flushEv@PLT
movq $0, 32(%rsp)
movq $100000000, 40(%rsp)
leaq 32(%rsp), %rbx
jmp .L21
.L29:
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L30
call _ZSt16__throw_bad_castv@PLT
.L30:
call __stack_chk_fail@PLT
.L18:
movq %rbx, %rdi
call _ZNKSt5ctypeIcE13_M_widen_initEv@PLT
movq (%rbx), %rax
movl $10, %esi
movq %rbx, %rdi
call *48(%rax)
jmp .L19
.L31:
call __errno_location@PLT
cmpl $4, (%rax)
jne .L20
.L21:
movq %rbx, %rsi
movq %rbx, %rdi
call nanosleep@PLT
cmpl $-1, %eax
je .L31
.L20:
leaq .LC3(%rip), %rdi
call system@PLT
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L32
addq $72, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L32:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4011:
.size _Z10printCellsPiii, .-_Z10printCellsPiii
.globl _Z13populateArrayPii
.type _Z13populateArrayPii, @function
_Z13populateArrayPii:
.LFB4012:
.cfi_startproc
endbr64
testl %esi, %esi
jle .L38
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $8, %rsp
.cfi_def_cfa_offset 32
movq %rdi, %rbx
movslq %esi, %rsi
leaq (%rdi,%rsi,4), %rbp
.L35:
call rand@PLT
movl %eax, %edx
shrl $31, %edx
addl %edx, %eax
andl $1, %eax
subl %edx, %eax
movl %eax, (%rbx)
addq $4, %rbx
cmpq %rbp, %rbx
jne .L35
addq $8, %rsp
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.L38:
.cfi_restore 3
.cfi_restore 6
ret
.cfi_endproc
.LFE4012:
.size _Z13populateArrayPii, .-_Z13populateArrayPii
.globl _Z4getXii
.type _Z4getXii, @function
_Z4getXii:
.LFB4013:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE4013:
.size _Z4getXii, .-_Z4getXii
.globl _Z4getYii
.type _Z4getYii, @function
_Z4getYii:
.LFB4014:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE4014:
.size _Z4getYii, .-_Z4getYii
.globl _Z4getIiii
.type _Z4getIiii, @function
_Z4getIiii:
.LFB4015:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE4015:
.size _Z4getIiii, .-_Z4getIiii
.globl _Z12getNeigboursiiPiii
.type _Z12getNeigboursiiPiii, @function
_Z12getNeigboursiiPiii:
.LFB4016:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE4016:
.size _Z12getNeigboursiiPiii, .-_Z12getNeigboursiiPiii
.globl _Z5rulesii
.type _Z5rulesii, @function
_Z5rulesii:
.LFB4017:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE4017:
.size _Z5rulesii, .-_Z5rulesii
.globl _Z29__device_stub__Z6evolvePiiiiiPiiiii
.type _Z29__device_stub__Z6evolvePiiiiiPiiiii, @function
_Z29__device_stub__Z6evolvePiiiiiPiiiii:
.LFB4043:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movl %esi, 20(%rsp)
movl %edx, 16(%rsp)
movl %ecx, 12(%rsp)
movl %r8d, 8(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 20(%rsp), %rax
movq %rax, 104(%rsp)
leaq 16(%rsp), %rax
movq %rax, 112(%rsp)
leaq 12(%rsp), %rax
movq %rax, 120(%rsp)
leaq 8(%rsp), %rax
movq %rax, 128(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L55
.L51:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L56
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L55:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z6evolvePiiiii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L51
.L56:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4043:
.size _Z29__device_stub__Z6evolvePiiiiiPiiiii, .-_Z29__device_stub__Z6evolvePiiiiiPiiiii
.globl _Z6evolvePiiiii
.type _Z6evolvePiiiii, @function
_Z6evolvePiiiii:
.LFB4044:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z29__device_stub__Z6evolvePiiiiiPiiiii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4044:
.size _Z6evolvePiiiii, .-_Z6evolvePiiiii
.section .rodata.str1.1
.LC4:
.string "_Z6evolvePiiiii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4046:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC4(%rip), %rdx
movq %rdx, %rcx
leaq _Z6evolvePiiiii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE4046:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .rodata.str1.1
.LC6:
.string "para4.txt"
.text
.globl main
.type main, @function
main:
.LFB4018:
.cfi_startproc
.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
.cfi_lsda 0x1b,.LLSDA4018
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $568, %rsp
.cfi_def_cfa_offset 624
movq %fs:40, %rax
movq %rax, 552(%rsp)
xorl %eax, %eax
movl $1, %edi
call srand@PLT
movl $40000, %edi
call malloc@PLT
movq %rax, %r15
movl $10000, %esi
movq %rax, %rdi
call _Z13populateArrayPii
movq %rsp, %rdi
movl $40000, %esi
.LEHB0:
call cudaMalloc@PLT
movl $1, %ecx
movl $40000, %edx
movq %r15, %rsi
movq (%rsp), %rdi
call cudaMemcpy@PLT
call clock@PLT
movq %rax, %rbp
movl $9999, %ebx
jmp .L63
.L62:
subl $1, %ebx
je .L77
.L63:
movl $100, 20(%rsp)
movl $1, 24(%rsp)
movl $1, 28(%rsp)
movl $10, 8(%rsp)
movl $1, 12(%rsp)
movl $1, 16(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 20(%rsp), %rdx
movl $1, %ecx
movq 8(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
jne .L62
movl $10, %r8d
movl $10000, %ecx
movl $100, %edx
movl $100, %esi
movq (%rsp), %rdi
call _Z29__device_stub__Z6evolvePiiiiiPiiiii
jmp .L62
.L77:
call clock@PLT
movq %rax, %rbx
movl $2, %ecx
movl $40000, %edx
movq (%rsp), %rsi
movq %r15, %rdi
call cudaMemcpy@PLT
movq (%rsp), %rdi
call cudaFree@PLT
subq %rbp, %rbx
pxor %xmm0, %xmm0
cvtsi2sdq %rbx, %xmm0
divsd .LC5(%rip), %xmm0
leaq _ZSt4cout(%rip), %rdi
call _ZNSo9_M_insertIdEERSoT_@PLT
leaq 32(%rsp), %rbx
movq %rbx, %rdi
call _ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev@PLT
.LEHE0:
movl $16, %edx
leaq .LC6(%rip), %rsi
movq %rbx, %rdi
.LEHB1:
call _ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@PLT
movq %r15, %r12
leaq 40000(%r15), %r14
movq %rbx, %r13
jmp .L68
.L82:
movq %rax, %rbx
movq (%rax), %rax
movq -24(%rax), %rax
movq 240(%rbx,%rax), %rbp
testq %rbp, %rbp
je .L78
cmpb $0, 56(%rbp)
je .L66
movzbl 67(%rbp), %esi
.L67:
movsbl %sil, %esi
movq %rbx, %rdi
call _ZNSo3putEc@PLT
jmp .L79
.L78:
movq 552(%rsp), %rax
subq %fs:40, %rax
jne .L80
call _ZSt16__throw_bad_castv@PLT
.L72:
endbr64
movq %rax, %rbx
leaq 32(%rsp), %rdi
call _ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
movq 552(%rsp), %rax
subq %fs:40, %rax
je .L70
call __stack_chk_fail@PLT
.L80:
call __stack_chk_fail@PLT
.L66:
movq %rbp, %rdi
call _ZNKSt5ctypeIcE13_M_widen_initEv@PLT
movq 0(%rbp), %rax
movl $10, %esi
movq %rbp, %rdi
call *48(%rax)
movl %eax, %esi
jmp .L67
.L79:
movq %rax, %rdi
call _ZNSo5flushEv@PLT
addq $4, %r12
cmpq %r14, %r12
je .L81
.L68:
movl (%r12), %esi
movq %r13, %rdi
call _ZNSolsEi@PLT
jmp .L82
.L81:
movq %r15, %rdi
call free@PLT
leaq 32(%rsp), %rdi
call _ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv@PLT
leaq 20(%rsp), %rsi
leaq _ZSt3cin(%rip), %rdi
call _ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_RS3_@PLT
.LEHE1:
leaq 32(%rsp), %rdi
call _ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
movq 552(%rsp), %rax
subq %fs:40, %rax
jne .L83
movl $0, %eax
addq $568, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L70:
.cfi_restore_state
movq %rbx, %rdi
.LEHB2:
call _Unwind_Resume@PLT
.LEHE2:
.L83:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE4018:
.globl __gxx_personality_v0
.section .gcc_except_table,"a",@progbits
.LLSDA4018:
.byte 0xff
.byte 0xff
.byte 0x1
.uleb128 .LLSDACSE4018-.LLSDACSB4018
.LLSDACSB4018:
.uleb128 .LEHB0-.LFB4018
.uleb128 .LEHE0-.LEHB0
.uleb128 0
.uleb128 0
.uleb128 .LEHB1-.LFB4018
.uleb128 .LEHE1-.LEHB1
.uleb128 .L72-.LFB4018
.uleb128 0
.uleb128 .LEHB2-.LFB4018
.uleb128 .LEHE2-.LEHB2
.uleb128 0
.uleb128 0
.LLSDACSE4018:
.text
.size main, .-main
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC5:
.long 0
.long 1093567616
.hidden DW.ref.__gxx_personality_v0
.weak DW.ref.__gxx_personality_v0
.section .data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
.align 8
.type DW.ref.__gxx_personality_v0, @object
.size DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
.quad __gxx_personality_v0
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "Para4.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z6getPosiii # -- Begin function _Z6getPosiii
.p2align 4, 0x90
.type _Z6getPosiii,@function
_Z6getPosiii: # @_Z6getPosiii
.cfi_startproc
# %bb.0:
# kill: def $esi killed $esi def $rsi
# kill: def $edi killed $edi def $rdi
imull %edx, %edi
leal (%rdi,%rsi), %eax
retq
.Lfunc_end0:
.size _Z6getPosiii, .Lfunc_end0-_Z6getPosiii
.cfi_endproc
# -- End function
.globl _Z10printCellsPiii # -- Begin function _Z10printCellsPiii
.p2align 4, 0x90
.type _Z10printCellsPiii,@function
_Z10printCellsPiii: # @_Z10printCellsPiii
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $24, %rsp
.cfi_def_cfa_offset 80
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
# kill: def $edx killed $edx def $rdx
movq %rdx, (%rsp) # 8-byte Spill
cmpl $-1, %esi
jl .LBB1_10
# %bb.1: # %.preheader.lr.ph
movl %esi, %r14d
movq %rdi, %r15
movq (%rsp), %rax # 8-byte Reload
leal 2(%rax), %r13d
movslq %eax, %rbp
addl $2, %r14d
shlq $2, %rbp
xorl %ebx, %ebx
jmp .LBB1_2
.p2align 4, 0x90
.LBB1_18: # in Loop: Header=BB1_2 Depth=1
movq %r12, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r12), %rax
movq %r12, %rdi
movl $10, %esi
callq *48(%rax)
.LBB1_19: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit14
# in Loop: Header=BB1_2 Depth=1
movsbl %al, %esi
movl $_ZSt4cout, %edi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
incq %rbx
addq %rbp, %r15
cmpq %r14, %rbx
je .LBB1_10
.LBB1_2: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB1_4 Depth 2
cmpl $-1, (%rsp) # 4-byte Folded Reload
jl .LBB1_7
# %bb.3: # %.lr.ph
# in Loop: Header=BB1_2 Depth=1
xorl %r12d, %r12d
jmp .LBB1_4
.p2align 4, 0x90
.LBB1_6: # in Loop: Header=BB1_4 Depth=2
movl $_ZSt4cout, %edi
movl $1, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
movl $_ZSt4cout, %edi
movl $.L.str.1, %esi
movl $1, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
incq %r12
cmpq %r12, %r13
je .LBB1_7
.LBB1_4: # Parent Loop BB1_2 Depth=1
# => This Inner Loop Header: Depth=2
cmpl $1, (%r15,%r12,4)
movl $.L.str, %esi
je .LBB1_6
# %bb.5: # in Loop: Header=BB1_4 Depth=2
movl $.L.str.2, %esi
jmp .LBB1_6
.p2align 4, 0x90
.LBB1_7: # %._crit_edge
# in Loop: Header=BB1_2 Depth=1
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
movq _ZSt4cout+240(%rax), %r12
testq %r12, %r12
je .LBB1_20
# %bb.8: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i11
# in Loop: Header=BB1_2 Depth=1
cmpb $0, 56(%r12)
je .LBB1_18
# %bb.9: # in Loop: Header=BB1_2 Depth=1
movzbl 67(%r12), %eax
jmp .LBB1_19
.LBB1_10: # %._crit_edge17
movq _ZSt4cout(%rip), %rax
movq -24(%rax), %rax
movq _ZSt4cout+240(%rax), %rbx
testq %rbx, %rbx
je .LBB1_20
# %bb.11: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
cmpb $0, 56(%rbx)
je .LBB1_13
# %bb.12:
movzbl 67(%rbx), %eax
jmp .LBB1_14
.LBB1_13:
movq %rbx, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%rbx), %rax
movq %rbx, %rdi
movl $10, %esi
callq *48(%rax)
.LBB1_14: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit
movsbl %al, %esi
movl $_ZSt4cout, %edi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
movq $0, 8(%rsp)
movq $100000000, 16(%rsp) # imm = 0x5F5E100
leaq 8(%rsp), %rbx
.p2align 4, 0x90
.LBB1_15: # =>This Inner Loop Header: Depth=1
movq %rbx, %rdi
movq %rbx, %rsi
callq nanosleep
cmpl $-1, %eax
jne .LBB1_17
# %bb.16: # in Loop: Header=BB1_15 Depth=1
callq __errno_location
cmpl $4, (%rax)
je .LBB1_15
.LBB1_17: # %.critedge.i
movl $.L.str.3, %edi
callq system
addq $24, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB1_20:
.cfi_def_cfa_offset 80
callq _ZSt16__throw_bad_castv
.Lfunc_end1:
.size _Z10printCellsPiii, .Lfunc_end1-_Z10printCellsPiii
.cfi_endproc
# -- End function
.globl _Z13populateArrayPii # -- Begin function _Z13populateArrayPii
.p2align 4, 0x90
.type _Z13populateArrayPii,@function
_Z13populateArrayPii: # @_Z13populateArrayPii
.cfi_startproc
# %bb.0:
testl %esi, %esi
jle .LBB2_4
# %bb.1: # %.lr.ph.preheader
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movq %rdi, %rbx
movl %esi, %r14d
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB2_2: # %.lr.ph
# =>This Inner Loop Header: Depth=1
callq rand
movl %eax, %ecx
shrl $31, %ecx
addl %eax, %ecx
andl $-2, %ecx
subl %ecx, %eax
movl %eax, (%rbx,%r15,4)
incq %r15
cmpq %r15, %r14
jne .LBB2_2
# %bb.3:
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.cfi_restore %r14
.cfi_restore %r15
.LBB2_4: # %._crit_edge
retq
.Lfunc_end2:
.size _Z13populateArrayPii, .Lfunc_end2-_Z13populateArrayPii
.cfi_endproc
# -- End function
.globl _Z21__device_stub__evolvePiiiii # -- Begin function _Z21__device_stub__evolvePiiiii
.p2align 4, 0x90
.type _Z21__device_stub__evolvePiiiii,@function
_Z21__device_stub__evolvePiiiii: # @_Z21__device_stub__evolvePiiiii
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movl %esi, 20(%rsp)
movl %edx, 16(%rsp)
movl %ecx, 12(%rsp)
movl %r8d, 8(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 20(%rsp), %rax
movq %rax, 88(%rsp)
leaq 16(%rsp), %rax
movq %rax, 96(%rsp)
leaq 12(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z6evolvePiiiii, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end3:
.size _Z21__device_stub__evolvePiiiii, .Lfunc_end3-_Z21__device_stub__evolvePiiiii
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI4_0:
.quad 0x412e848000000000 # double 1.0E+6
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.Lfunc_begin0:
.cfi_startproc
.cfi_personality 3, __gxx_personality_v0
.cfi_lsda 3, .Lexception0
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $616, %rsp # imm = 0x268
.cfi_def_cfa_offset 672
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
.cfi_escape 0x2e, 0x00
movl $1, %edi
callq srand
.cfi_escape 0x2e, 0x00
movl $40000, %edi # imm = 0x9C40
callq malloc
movq %rax, %rbx
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB4_1: # %.lr.ph.i
# =>This Inner Loop Header: Depth=1
.cfi_escape 0x2e, 0x00
callq rand
movl %eax, %ecx
shrl $31, %ecx
addl %eax, %ecx
andl $-2, %ecx
subl %ecx, %eax
movl %eax, (%rbx,%r14,4)
incq %r14
cmpq $10000, %r14 # imm = 0x2710
jne .LBB4_1
# %bb.2: # %_Z13populateArrayPii.exit
movabsq $4294967306, %r14 # imm = 0x10000000A
.cfi_escape 0x2e, 0x00
leaq 8(%rsp), %rdi
movl $40000, %esi # imm = 0x9C40
callq hipMalloc
movq 8(%rsp), %rdi
.cfi_escape 0x2e, 0x00
movl $40000, %edx # imm = 0x9C40
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
.cfi_escape 0x2e, 0x00
movl $9999, %r15d # imm = 0x270F
callq clock
movq %rax, 32(%rsp) # 8-byte Spill
leaq 90(%r14), %r12
leaq 40(%rsp), %r13
leaq 96(%rsp), %rbp
jmp .LBB4_3
.p2align 4, 0x90
.LBB4_5: # in Loop: Header=BB4_3 Depth=1
decl %r15d
je .LBB4_6
.LBB4_3: # =>This Inner Loop Header: Depth=1
.cfi_escape 0x2e, 0x00
movq %r14, %rdi
movl $1, %esi
movq %r12, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB4_5
# %bb.4: # in Loop: Header=BB4_3 Depth=1
movq 8(%rsp), %rax
movq %rax, 88(%rsp)
movl $100, 28(%rsp)
movl $100, 24(%rsp)
movl $10000, 20(%rsp) # imm = 0x2710
movl $10, 16(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 28(%rsp), %rax
movq %rax, 104(%rsp)
leaq 24(%rsp), %rax
movq %rax, 112(%rsp)
leaq 20(%rsp), %rax
movq %rax, 120(%rsp)
leaq 16(%rsp), %rax
movq %rax, 128(%rsp)
.cfi_escape 0x2e, 0x00
leaq 72(%rsp), %rdi
leaq 56(%rsp), %rsi
leaq 48(%rsp), %rdx
movq %r13, %rcx
callq __hipPopCallConfiguration
movq 72(%rsp), %rsi
movl 80(%rsp), %edx
movq 56(%rsp), %rcx
movl 64(%rsp), %r8d
.cfi_escape 0x2e, 0x10
movl $_Z6evolvePiiiii, %edi
movq %rbp, %r9
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
jmp .LBB4_5
.LBB4_6:
.cfi_escape 0x2e, 0x00
callq clock
movq %rax, %r14
movq 8(%rsp), %rsi
.cfi_escape 0x2e, 0x00
movl $40000, %edx # imm = 0x9C40
movq %rbx, %rdi
movl $2, %ecx
callq hipMemcpy
movq 8(%rsp), %rdi
.cfi_escape 0x2e, 0x00
callq hipFree
subq 32(%rsp), %r14 # 8-byte Folded Reload
cvtsi2sd %r14, %xmm0
divsd .LCPI4_0(%rip), %xmm0
.cfi_escape 0x2e, 0x00
movl $_ZSt4cout, %edi
callq _ZNSo9_M_insertIdEERSoT_
.cfi_escape 0x2e, 0x00
leaq 96(%rsp), %r15
movq %r15, %rdi
callq _ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev
leaq 104(%rsp), %r14
.Ltmp0:
.cfi_escape 0x2e, 0x00
movl $.L.str.4, %esi
movq %r14, %rdi
movl $16, %edx
callq _ZNSt13basic_filebufIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode
.Ltmp1:
# %bb.7: # %.noexc
movq 96(%rsp), %rcx
addq -24(%rcx), %r15
xorl %esi, %esi
testq %rax, %rax
jne .LBB4_9
# %bb.8:
movl 32(%r15), %esi
orl $4, %esi
.LBB4_9: # %.invoke
.Ltmp2:
.cfi_escape 0x2e, 0x00
movq %r15, %rdi
callq _ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.Ltmp3:
# %bb.10: # %_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode.exit.preheader
xorl %ebp, %ebp
leaq 96(%rsp), %r15
.p2align 4, 0x90
.LBB4_11: # %_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode.exit
# =>This Inner Loop Header: Depth=1
movl (%rbx,%rbp,4), %esi
.Ltmp4:
.cfi_escape 0x2e, 0x00
movq %r15, %rdi
callq _ZNSolsEi
.Ltmp5:
# %bb.12: # in Loop: Header=BB4_11 Depth=1
movq %rax, %r12
movq (%rax), %rax
movq -24(%rax), %rax
movq 240(%r12,%rax), %r13
testq %r13, %r13
je .LBB4_13
# %bb.20: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
# in Loop: Header=BB4_11 Depth=1
cmpb $0, 56(%r13)
je .LBB4_22
# %bb.21: # in Loop: Header=BB4_11 Depth=1
movzbl 67(%r13), %eax
jmp .LBB4_24
.p2align 4, 0x90
.LBB4_22: # in Loop: Header=BB4_11 Depth=1
.Ltmp6:
.cfi_escape 0x2e, 0x00
movq %r13, %rdi
callq _ZNKSt5ctypeIcE13_M_widen_initEv
.Ltmp7:
# %bb.23: # %.noexc28
# in Loop: Header=BB4_11 Depth=1
movq (%r13), %rax
.Ltmp8:
.cfi_escape 0x2e, 0x00
movq %r13, %rdi
movl $10, %esi
callq *48(%rax)
.Ltmp9:
.LBB4_24: # %_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc.exit.i
# in Loop: Header=BB4_11 Depth=1
.Ltmp10:
.cfi_escape 0x2e, 0x00
movsbl %al, %esi
movq %r12, %rdi
callq _ZNSo3putEc
.Ltmp11:
# %bb.25: # %.noexc30
# in Loop: Header=BB4_11 Depth=1
.Ltmp12:
.cfi_escape 0x2e, 0x00
movq %rax, %rdi
callq _ZNSo5flushEv
.Ltmp13:
# %bb.26: # %_ZNSolsEPFRSoS_E.exit
# in Loop: Header=BB4_11 Depth=1
incq %rbp
cmpq $10000, %rbp # imm = 0x2710
jne .LBB4_11
# %bb.14:
.cfi_escape 0x2e, 0x00
movq %rbx, %rdi
callq free
.Ltmp15:
.cfi_escape 0x2e, 0x00
movq %r14, %rdi
callq _ZNSt13basic_filebufIcSt11char_traitsIcEE5closeEv
.Ltmp16:
# %bb.15: # %.noexc24
testq %rax, %rax
jne .LBB4_17
# %bb.16:
movq 96(%rsp), %rax
movq -24(%rax), %rax
leaq (%rsp,%rax), %rdi
addq $96, %rdi
movl 128(%rsp,%rax), %esi
orl $4, %esi
.Ltmp17:
.cfi_escape 0x2e, 0x00
callq _ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.Ltmp18:
.LBB4_17: # %_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv.exit
.Ltmp19:
.cfi_escape 0x2e, 0x00
leaq 7(%rsp), %rsi
movl $_ZSt3cin, %edi
callq _ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_RS3_
.Ltmp20:
# %bb.18:
.cfi_escape 0x2e, 0x00
leaq 96(%rsp), %rdi
callq _ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev
xorl %eax, %eax
addq $616, %rsp # imm = 0x268
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB4_13:
.cfi_def_cfa_offset 672
.Ltmp22:
.cfi_escape 0x2e, 0x00
callq _ZSt16__throw_bad_castv
.Ltmp23:
# %bb.19: # %.noexc27
.LBB4_29:
.Ltmp21:
jmp .LBB4_30
.LBB4_28: # %.loopexit.split-lp
.Ltmp24:
jmp .LBB4_30
.LBB4_27: # %.loopexit
.Ltmp14:
.LBB4_30:
movq %rax, %rbx
.cfi_escape 0x2e, 0x00
leaq 96(%rsp), %rdi
callq _ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev
.cfi_escape 0x2e, 0x00
movq %rbx, %rdi
callq _Unwind_Resume@PLT
.Lfunc_end4:
.size main, .Lfunc_end4-main
.cfi_endproc
.section .gcc_except_table,"a",@progbits
.p2align 2, 0x0
GCC_except_table4:
.Lexception0:
.byte 255 # @LPStart Encoding = omit
.byte 255 # @TType Encoding = omit
.byte 1 # Call site Encoding = uleb128
.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
.uleb128 .Lfunc_begin0-.Lfunc_begin0 # >> Call Site 1 <<
.uleb128 .Ltmp0-.Lfunc_begin0 # Call between .Lfunc_begin0 and .Ltmp0
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.uleb128 .Ltmp0-.Lfunc_begin0 # >> Call Site 2 <<
.uleb128 .Ltmp3-.Ltmp0 # Call between .Ltmp0 and .Ltmp3
.uleb128 .Ltmp21-.Lfunc_begin0 # jumps to .Ltmp21
.byte 0 # On action: cleanup
.uleb128 .Ltmp4-.Lfunc_begin0 # >> Call Site 3 <<
.uleb128 .Ltmp13-.Ltmp4 # Call between .Ltmp4 and .Ltmp13
.uleb128 .Ltmp14-.Lfunc_begin0 # jumps to .Ltmp14
.byte 0 # On action: cleanup
.uleb128 .Ltmp15-.Lfunc_begin0 # >> Call Site 4 <<
.uleb128 .Ltmp20-.Ltmp15 # Call between .Ltmp15 and .Ltmp20
.uleb128 .Ltmp21-.Lfunc_begin0 # jumps to .Ltmp21
.byte 0 # On action: cleanup
.uleb128 .Ltmp22-.Lfunc_begin0 # >> Call Site 5 <<
.uleb128 .Ltmp23-.Ltmp22 # Call between .Ltmp22 and .Ltmp23
.uleb128 .Ltmp24-.Lfunc_begin0 # jumps to .Ltmp24
.byte 0 # On action: cleanup
.uleb128 .Ltmp23-.Lfunc_begin0 # >> Call Site 6 <<
.uleb128 .Lfunc_end4-.Ltmp23 # Call between .Ltmp23 and .Lfunc_end4
.byte 0 # has no landing pad
.byte 0 # On action: cleanup
.Lcst_end0:
.p2align 2, 0x0
# -- End function
.text
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB5_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB5_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z6evolvePiiiii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end5:
.size __hip_module_ctor, .Lfunc_end5-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB6_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB6_2:
retq
.Lfunc_end6:
.size __hip_module_dtor, .Lfunc_end6-__hip_module_dtor
.cfi_endproc
# -- End function
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "O"
.size .L.str, 2
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz " "
.size .L.str.1, 2
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "-"
.size .L.str.2, 2
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "cls"
.size .L.str.3, 4
.type _Z6evolvePiiiii,@object # @_Z6evolvePiiiii
.section .rodata,"a",@progbits
.globl _Z6evolvePiiiii
.p2align 3, 0x0
_Z6evolvePiiiii:
.quad _Z21__device_stub__evolvePiiiii
.size _Z6evolvePiiiii, 8
.type .L.str.4,@object # @.str.4
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.4:
.asciz "para4.txt"
.size .L.str.4, 10
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z6evolvePiiiii"
.size .L__unnamed_1, 16
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z21__device_stub__evolvePiiiii
.addrsig_sym __gxx_personality_v0
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Unwind_Resume
.addrsig_sym _ZSt4cout
.addrsig_sym _Z6evolvePiiiii
.addrsig_sym _ZSt3cin
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
#define BLOCK_SIZE 16
#define BLOCKSIZE_X 16
#define BLOCKSIZE_Y 16
// STD includes
// CUDA runtime
// Utilities and system includes
static // Print device properties
__global__ void averageKernel( unsigned char* inputChannel, unsigned char* outputChannel, int imageW, int imageH)
{
int y = blockIdx.y * blockDim.y + threadIdx.y;
int x = blockIdx.x * blockDim.x + threadIdx.x;
const unsigned int numElements = ((2 * KERNEL_RADIUS) + 1) * ((2 * KERNEL_RADIUS) + 1);
unsigned int sum = 0;
for (int kY = -KERNEL_RADIUS; kY <= KERNEL_RADIUS; kY++) {
const int curY = y + kY;
if (curY < 0 || curY > imageH) {
continue;
}
for (int kX = -KERNEL_RADIUS; kX <= KERNEL_RADIUS; kX++) {
const int curX = x + kX;
if (curX < 0 || curX > imageW) {
continue;
}
const int curPosition = (curY * imageW + curX);
if (curPosition >= 0 && curPosition < (imageW * imageH)) {
sum += inputChannel[curPosition];
}
}
}
outputChannel[y * imageW + x] = (unsigned char)(sum / numElements);
} | code for sm_80
Function : _Z13averageKernelPhS_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e220000002500 */
/*0020*/ IMAD.MOV.U32 R18, RZ, RZ, -0x8 ; /* 0xfffffff8ff127424 */
/* 0x000fe200078e00ff */
/*0030*/ ULDC.64 UR4, c[0x0][0x170] ; /* 0x00005c0000047ab9 */
/* 0x000fe20000000a00 */
/*0040*/ IMAD.MOV.U32 R20, RZ, RZ, RZ ; /* 0x000000ffff147224 */
/* 0x000fe200078e00ff */
/*0050*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e220000002100 */
/*0060*/ UIMAD UR4, UR4, UR5, URZ ; /* 0x00000005040472a4 */
/* 0x000fe4000f8e023f */
/*0070*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */
/* 0x000fe20000000a00 */
/*0080*/ S2R R19, SR_CTAID.Y ; /* 0x0000000000137919 */
/* 0x000e680000002600 */
/*0090*/ S2R R2, SR_TID.Y ; /* 0x0000000000027919 */
/* 0x000e620000002200 */
/*00a0*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fca00078e0203 */
/*00b0*/ ISETP.GT.AND P6, PT, R0.reuse, c[0x0][0x170], PT ; /* 0x00005c0000007a0c */
/* 0x040fe40003fc4270 */
/*00c0*/ IADD3 R3, R0.reuse, -0x8, RZ ; /* 0xfffffff800037810 */
/* 0x040fe20007ffe0ff */
/*00d0*/ IMAD R19, R19, c[0x0][0x4], R2 ; /* 0x0000010013137a24 */
/* 0x002fe200078e0202 */
/*00e0*/ IADD3 R4, R0.reuse, -0x7, RZ ; /* 0xfffffff900047810 */
/* 0x040fe40007ffe0ff */
/*00f0*/ IADD3 R5, R0.reuse, -0x6, RZ ; /* 0xfffffffa00057810 */
/* 0x040fe40007ffe0ff */
/*0100*/ ISETP.LT.OR P6, PT, R0.reuse, RZ, P6 ; /* 0x000000ff0000720c */
/* 0x040fe400037c1670 */
/*0110*/ ISETP.GE.AND P5, PT, R0, c[0x0][0x170], PT ; /* 0x00005c0000007a0c */
/* 0x000fc40003fa6270 */
/*0120*/ IADD3 R6, R0.reuse, -0x5, RZ ; /* 0xfffffffb00067810 */
/* 0x040fe40007ffe0ff */
/*0130*/ ISETP.GT.AND P4, PT, R3, c[0x0][0x170], PT ; /* 0x00005c0003007a0c */
/* 0x000fe40003f84270 */
/*0140*/ IADD3 R7, R0, -0x4, RZ ; /* 0xfffffffc00077810 */
/* 0x000fe40007ffe0ff */
/*0150*/ ISETP.GT.AND P3, PT, R4, c[0x0][0x170], PT ; /* 0x00005c0004007a0c */
/* 0x000fe40003f64270 */
/*0160*/ ISETP.GT.AND P2, PT, R5, c[0x0][0x170], PT ; /* 0x00005c0005007a0c */
/* 0x000fe40003f44270 */
/*0170*/ P2R R32, PR, RZ, 0x40 ; /* 0x00000040ff207803 */
/* 0x000fc40000000000 */
/*0180*/ ISETP.GT.AND P1, PT, R6, c[0x0][0x170], PT ; /* 0x00005c0006007a0c */
/* 0x000fe40003f24270 */
/*0190*/ ISETP.LT.OR P6, PT, R0.reuse, -0x1, P5 ; /* 0xffffffff0000780c */
/* 0x040fe40002fc1670 */
/*01a0*/ ISETP.GT.AND P0, PT, R7, c[0x0][0x170], PT ; /* 0x00005c0007007a0c */
/* 0x000fe40003f04270 */
/*01b0*/ ISETP.LT.OR P5, PT, R0.reuse, 0x8, P4 ; /* 0x000000080000780c */
/* 0x040fe400027a1670 */
/*01c0*/ IADD3 R8, R0.reuse, -0x3, RZ ; /* 0xfffffffd00087810 */
/* 0x040fe40007ffe0ff */
/*01d0*/ ISETP.LT.OR P4, PT, R0, 0x7, P3 ; /* 0x000000070000780c */
/* 0x000fc40001f81670 */
/*01e0*/ ISETP.LT.OR P3, PT, R0.reuse, 0x6, P2 ; /* 0x000000060000780c */
/* 0x040fe40001761670 */
/*01f0*/ ISETP.LT.OR P2, PT, R0.reuse, 0x5, P1 ; /* 0x000000050000780c */
/* 0x040fe40000f41670 */
/*0200*/ ISETP.LT.OR P1, PT, R0, 0x4, P0 ; /* 0x000000040000780c */
/* 0x000fe40000721670 */
/*0210*/ ISETP.GT.AND P0, PT, R8, c[0x0][0x170], PT ; /* 0x00005c0008007a0c */
/* 0x000fe40003f04270 */
/*0220*/ IADD3 R9, R0, -0x2, RZ ; /* 0xfffffffe00097810 */
/* 0x000fe40007ffe0ff */
/*0230*/ P2R R27, PR, RZ, 0x4 ; /* 0x00000004ff1b7803 */
/* 0x000fc40000000000 */
/*0240*/ ISETP.LT.OR P2, PT, R0.reuse, 0x3, P0 ; /* 0x000000030000780c */
/* 0x040fe40000741670 */
/*0250*/ ISETP.GT.AND P0, PT, R9, c[0x0][0x170], PT ; /* 0x00005c0009007a0c */
/* 0x000fe40003f04270 */
/*0260*/ IADD3 R10, R0.reuse, -0x1, RZ ; /* 0xffffffff000a7810 */
/* 0x040fe40007ffe0ff */
/*0270*/ P2R R28, PR, RZ, 0x2 ; /* 0x00000002ff1c7803 */
/* 0x000fe40000000000 */
/*0280*/ ISETP.LT.OR P1, PT, R0, 0x2, P0 ; /* 0x000000020000780c */
/* 0x000fe40000721670 */
/*0290*/ ISETP.GT.AND P0, PT, R10, c[0x0][0x170], PT ; /* 0x00005c000a007a0c */
/* 0x000fc40003f04270 */
/*02a0*/ IADD3 R11, R0.reuse, 0x2, RZ ; /* 0x00000002000b7810 */
/* 0x040fe40007ffe0ff */
/*02b0*/ P2R R29, PR, RZ, 0x4 ; /* 0x00000004ff1d7803 */
/* 0x000fe40000000000 */
/*02c0*/ ISETP.LT.OR P2, PT, R0.reuse, 0x1, P0 ; /* 0x000000010000780c */
/* 0x040fe40000741670 */
/*02d0*/ ISETP.GT.AND P0, PT, R11, c[0x0][0x170], PT ; /* 0x00005c000b007a0c */
/* 0x000fe40003f04270 */
/*02e0*/ P2R R30, PR, RZ, 0x2 ; /* 0x00000002ff1e7803 */
/* 0x000fe40000000000 */
/*02f0*/ ISETP.LT.OR P1, PT, R0, -0x2, P0 ; /* 0xfffffffe0000780c */
/* 0x000fc40000721670 */
/*0300*/ IADD3 R12, R0.reuse, 0x3, RZ ; /* 0x00000003000c7810 */
/* 0x040fe40007ffe0ff */
/*0310*/ IADD3 R13, R0.reuse, 0x4, RZ ; /* 0x00000004000d7810 */
/* 0x040fe40007ffe0ff */
/*0320*/ IADD3 R14, R0.reuse, 0x5, RZ ; /* 0x00000005000e7810 */
/* 0x040fe40007ffe0ff */
/*0330*/ IADD3 R15, R0.reuse, 0x6, RZ ; /* 0x00000006000f7810 */
/* 0x040fe40007ffe0ff */
/*0340*/ IADD3 R16, R0.reuse, 0x7, RZ ; /* 0x0000000700107810 */
/* 0x040fe40007ffe0ff */
/*0350*/ IADD3 R17, R0, 0x8, RZ ; /* 0x0000000800117810 */
/* 0x000fc40007ffe0ff */
/*0360*/ P2R R25, PR, RZ, 0x20 ; /* 0x00000020ff197803 */
/* 0x000fe40000000000 */
/*0370*/ P2R R26, PR, RZ, 0x10 ; /* 0x00000010ff1a7803 */
/* 0x000fe40000000000 */
/*0380*/ P2R R24, PR, RZ, 0x8 ; /* 0x00000008ff187803 */
/* 0x000fe40000000000 */
/*0390*/ P2R R31, PR, RZ, 0x4 ; /* 0x00000004ff1f7803 */
/* 0x000fe40000000000 */
/*03a0*/ P2R R34, PR, RZ, 0x2 ; /* 0x00000002ff227803 */
/* 0x000fe40000000000 */
/*03b0*/ ISETP.GT.AND P0, PT, R12, c[0x0][0x170], PT ; /* 0x00005c000c007a0c */
/* 0x000fc40003f04270 */
/*03c0*/ ISETP.GT.AND P1, PT, R13, c[0x0][0x170], PT ; /* 0x00005c000d007a0c */
/* 0x000fe40003f24270 */
/*03d0*/ ISETP.GT.AND P2, PT, R14, c[0x0][0x170], PT ; /* 0x00005c000e007a0c */
/* 0x000fe40003f44270 */
/*03e0*/ ISETP.GT.AND P3, PT, R15, c[0x0][0x170], PT ; /* 0x00005c000f007a0c */
/* 0x000fe40003f64270 */
/*03f0*/ ISETP.GT.AND P4, PT, R16, c[0x0][0x170], PT ; /* 0x00005c0010007a0c */
/* 0x000fe40003f84270 */
/*0400*/ ISETP.GT.AND P5, PT, R17, c[0x0][0x170], PT ; /* 0x00005c0011007a0c */
/* 0x000fe40003fa4270 */
/*0410*/ P2R R33, PR, RZ, 0x40 ; /* 0x00000040ff217803 */
/* 0x000fc40000000000 */
/*0420*/ ISETP.LT.OR P0, PT, R0.reuse, -0x3, P0 ; /* 0xfffffffd0000780c */
/* 0x040fe40000701670 */
/*0430*/ ISETP.LT.OR P1, PT, R0.reuse, -0x4, P1 ; /* 0xfffffffc0000780c */
/* 0x040fe40000f21670 */
/*0440*/ ISETP.LT.OR P2, PT, R0.reuse, -0x5, P2 ; /* 0xfffffffb0000780c */
/* 0x040fe40001741670 */
/*0450*/ ISETP.LT.OR P3, PT, R0.reuse, -0x6, P3 ; /* 0xfffffffa0000780c */
/* 0x040fe40001f61670 */
/*0460*/ ISETP.LT.OR P4, PT, R0.reuse, -0x7, P4 ; /* 0xfffffff90000780c */
/* 0x040fe40002781670 */
/*0470*/ ISETP.LT.OR P5, PT, R0, -0x8, P5 ; /* 0xfffffff80000780c */
/* 0x000fc40002fa1670 */
/*0480*/ IADD3 R21, R0, 0x1, RZ ; /* 0x0000000100157810 */
/* 0x000fe40007ffe0ff */
/*0490*/ IMAD.IADD R22, R19, 0x1, R18 ; /* 0x0000000113167824 */
/* 0x000fe200078e0212 */
/*04a0*/ BSSY B0, 0xca0 ; /* 0x000007f000007945 */
/* 0x000fe20003800000 */
/*04b0*/ IADD3 R18, R18, 0x1, RZ ; /* 0x0000000112127810 */
/* 0x000fc60007ffe0ff */
/*04c0*/ ISETP.GT.AND P6, PT, R22, c[0x0][0x174], PT ; /* 0x00005d0016007a0c */
/* 0x000fc80003fc4270 */
/*04d0*/ ISETP.LT.OR P6, PT, R22, RZ, P6 ; /* 0x000000ff1600720c */
/* 0x000fda00037c1670 */
/*04e0*/ @P6 BRA 0xc90 ; /* 0x000007a000006947 */
/* 0x000fea0003800000 */
/*04f0*/ IMAD R38, R22, c[0x0][0x170], R0 ; /* 0x00005c0016267a24 */
/* 0x000fe200078e0200 */
/*0500*/ IADD3 R23, R0, -0x8, RZ ; /* 0xfffffff800177810 */
/* 0x000fe40007ffe0ff */
/*0510*/ P2R R36, PR, RZ, 0x10 ; /* 0x00000010ff247803 */
/* 0x000fe40000000000 */
/*0520*/ IADD3 R2, P6, R38, c[0x0][0x160], RZ ; /* 0x0000580026027a10 */
/* 0x000fe20007fde0ff */
/*0530*/ IMAD R23, R22, c[0x0][0x170], R23 ; /* 0x00005c0016177a24 */
/* 0x000fe200078e0217 */
/*0540*/ ISETP.NE.AND P4, PT, R25, RZ, PT ; /* 0x000000ff1900720c */
/* 0x000fe40003f85270 */
/*0550*/ LEA.HI.X.SX32 R3, R38, c[0x0][0x164], 0x1, P6 ; /* 0x0000590026037a11 */
/* 0x000fe400030f0eff */
/*0560*/ ISETP.GE.AND P6, PT, R23, UR4, PT ; /* 0x0000000417007c0c */
/* 0x000fc4000bfc6270 */
/*0570*/ P2R R35, PR, RZ, 0x20 ; /* 0x00000020ff237803 */
/* 0x000fe40000000000 */
/*0580*/ ISETP.LT.OR P6, PT, R23, RZ, P6 ; /* 0x000000ff1700720c */
/* 0x000fe400037c1670 */
/*0590*/ ISETP.NE.AND P5, PT, R26, RZ, PT ; /* 0x000000ff1a00720c */
/* 0x000fe40003fa5270 */
/*05a0*/ PLOP3.LUT P6, PT, P4, P6, PT, 0xa8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe400027cd570 */
/*05b0*/ P2R R37, PR, RZ, 0x8 ; /* 0x00000008ff257803 */
/* 0x000fe40000000000 */
/*05c0*/ ISETP.NE.AND P3, PT, R24, RZ, PT ; /* 0x000000ff1800720c */
/* 0x000fc40003f65270 */
/*05d0*/ ISETP.NE.AND P4, PT, R27, RZ, PT ; /* 0x000000ff1b00720c */
/* 0x000fce0003f85270 */
/*05e0*/ @!P6 LDG.E.U8 R23, [R2.64+-0x8] ; /* 0xfffff8060217e981 */
/* 0x000ea4000c1e1100 */
/*05f0*/ @!P6 IMAD.IADD R20, R20, 0x1, R23 ; /* 0x000000011414e824 */
/* 0x004fe400078e0217 */
/*0600*/ IMAD R23, R22, c[0x0][0x170], R4 ; /* 0x00005c0016177a24 */
/* 0x000fca00078e0204 */
/*0610*/ ISETP.GE.AND P6, PT, R23, UR4, PT ; /* 0x0000000417007c0c */
/* 0x000fc8000bfc6270 */
/*0620*/ ISETP.LT.OR P6, PT, R23, RZ, P6 ; /* 0x000000ff1700720c */
/* 0x000fc800037c1670 */
/*0630*/ PLOP3.LUT P6, PT, P5, P6, PT, 0xa8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40002fcd570 */
/*0640*/ ISETP.NE.AND P5, PT, R28, RZ, PT ; /* 0x000000ff1c00720c */
/* 0x000fd60003fa5270 */
/*0650*/ @!P6 LDG.E.U8 R23, [R2.64+-0x7] ; /* 0xfffff9060217e981 */
/* 0x000ea4000c1e1100 */
/*0660*/ @!P6 IMAD.IADD R20, R20, 0x1, R23 ; /* 0x000000011414e824 */
/* 0x004fe400078e0217 */
/*0670*/ IMAD R23, R22, c[0x0][0x170], R5 ; /* 0x00005c0016177a24 */
/* 0x000fca00078e0205 */
/*0680*/ ISETP.GE.AND P6, PT, R23, UR4, PT ; /* 0x0000000417007c0c */
/* 0x000fc8000bfc6270 */
/*0690*/ ISETP.LT.OR P6, PT, R23, RZ, P6 ; /* 0x000000ff1700720c */
/* 0x000fc800037c1670 */
/*06a0*/ PLOP3.LUT P6, PT, P3, P6, PT, 0xa8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40001fcd570 */
/*06b0*/ ISETP.NE.AND P3, PT, R29, RZ, PT ; /* 0x000000ff1d00720c */
/* 0x000fd60003f65270 */
/*06c0*/ @!P6 LDG.E.U8 R23, [R2.64+-0x6] ; /* 0xfffffa060217e981 */
/* 0x000ea4000c1e1100 */
/*06d0*/ @!P6 IMAD.IADD R20, R20, 0x1, R23 ; /* 0x000000011414e824 */
/* 0x004fe400078e0217 */
/*06e0*/ IMAD R23, R22, c[0x0][0x170], R6 ; /* 0x00005c0016177a24 */
/* 0x000fca00078e0206 */
/*06f0*/ ISETP.GE.AND P6, PT, R23, UR4, PT ; /* 0x0000000417007c0c */
/* 0x000fc8000bfc6270 */
/*0700*/ ISETP.LT.OR P6, PT, R23, RZ, P6 ; /* 0x000000ff1700720c */
/* 0x000fc800037c1670 */
/*0710*/ PLOP3.LUT P6, PT, P4, P6, PT, 0xa8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe400027cd570 */
/*0720*/ ISETP.NE.AND P4, PT, R30, RZ, PT ; /* 0x000000ff1e00720c */
/* 0x000fd60003f85270 */
/*0730*/ @!P6 LDG.E.U8 R23, [R2.64+-0x5] ; /* 0xfffffb060217e981 */
/* 0x000ea4000c1e1100 */
/*0740*/ @!P6 IMAD.IADD R20, R20, 0x1, R23 ; /* 0x000000011414e824 */
/* 0x004fe400078e0217 */
/*0750*/ IMAD R23, R22, c[0x0][0x170], R7 ; /* 0x00005c0016177a24 */
/* 0x000fca00078e0207 */
/*0760*/ ISETP.GE.AND P6, PT, R23, UR4, PT ; /* 0x0000000417007c0c */
/* 0x000fc8000bfc6270 */
/*0770*/ ISETP.LT.OR P6, PT, R23, RZ, P6 ; /* 0x000000ff1700720c */
/* 0x000fc800037c1670 */
/*0780*/ PLOP3.LUT P6, PT, P5, P6, PT, 0xa8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40002fcd570 */
/*0790*/ ISETP.NE.AND P5, PT, R31, RZ, PT ; /* 0x000000ff1f00720c */
/* 0x000fd60003fa5270 */
/*07a0*/ @!P6 LDG.E.U8 R23, [R2.64+-0x4] ; /* 0xfffffc060217e981 */
/* 0x000ea4000c1e1100 */
/*07b0*/ @!P6 IMAD.IADD R20, R20, 0x1, R23 ; /* 0x000000011414e824 */
/* 0x004fe400078e0217 */
/*07c0*/ IMAD R23, R22, c[0x0][0x170], R8 ; /* 0x00005c0016177a24 */
/* 0x000fca00078e0208 */
/*07d0*/ ISETP.GE.AND P6, PT, R23, UR4, PT ; /* 0x0000000417007c0c */
/* 0x000fc8000bfc6270 */
/*07e0*/ ISETP.LT.OR P6, PT, R23, RZ, P6 ; /* 0x000000ff1700720c */
/* 0x000fc800037c1670 */
/*07f0*/ PLOP3.LUT P6, PT, P3, P6, PT, 0xa8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40001fcd570 */
/*0800*/ ISETP.NE.AND P3, PT, R32, RZ, PT ; /* 0x000000ff2000720c */
/* 0x000fd60003f65270 */
/*0810*/ @!P6 LDG.E.U8 R23, [R2.64+-0x3] ; /* 0xfffffd060217e981 */
/* 0x000ea4000c1e1100 */
/*0820*/ @!P6 IMAD.IADD R20, R20, 0x1, R23 ; /* 0x000000011414e824 */
/* 0x004fe400078e0217 */
/*0830*/ IMAD R23, R22, c[0x0][0x170], R9 ; /* 0x00005c0016177a24 */
/* 0x000fca00078e0209 */
/*0840*/ ISETP.GE.AND P6, PT, R23, UR4, PT ; /* 0x0000000417007c0c */
/* 0x000fc8000bfc6270 */
/*0850*/ ISETP.LT.OR P6, PT, R23, RZ, P6 ; /* 0x000000ff1700720c */
/* 0x000fc800037c1670 */
/*0860*/ PLOP3.LUT P6, PT, P4, P6, PT, 0xa8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe400027cd570 */
/*0870*/ ISETP.NE.AND P4, PT, R33, RZ, PT ; /* 0x000000ff2100720c */
/* 0x000fd60003f85270 */
/*0880*/ @!P6 LDG.E.U8 R23, [R2.64+-0x2] ; /* 0xfffffe060217e981 */
/* 0x000ea4000c1e1100 */
/*0890*/ @!P6 IMAD.IADD R20, R20, 0x1, R23 ; /* 0x000000011414e824 */
/* 0x004fe400078e0217 */
/*08a0*/ IMAD R23, R22, c[0x0][0x170], R10 ; /* 0x00005c0016177a24 */
/* 0x000fca00078e020a */
/*08b0*/ ISETP.GE.AND P6, PT, R23, UR4, PT ; /* 0x0000000417007c0c */
/* 0x000fc8000bfc6270 */
/*08c0*/ ISETP.LT.OR P6, PT, R23, RZ, P6 ; /* 0x000000ff1700720c */
/* 0x000fc800037c1670 */
/*08d0*/ PLOP3.LUT P6, PT, P5, P6, PT, 0xa8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40002fcd570 */
/*08e0*/ ISETP.NE.AND P5, PT, R34, RZ, PT ; /* 0x000000ff2200720c */
/* 0x000fd60003fa5270 */
/*08f0*/ @!P6 LDG.E.U8 R23, [R2.64+-0x1] ; /* 0xffffff060217e981 */
/* 0x000ea4000c1e1100 */
/*0900*/ @!P6 IMAD.IADD R20, R20, 0x1, R23 ; /* 0x000000011414e824 */
/* 0x004fe200078e0217 */
/*0910*/ ISETP.GE.AND P6, PT, R38, UR4, PT ; /* 0x0000000426007c0c */
/* 0x000fc8000bfc6270 */
/*0920*/ ISETP.LT.OR P6, PT, R38, RZ, P6 ; /* 0x000000ff2600720c */
/* 0x000fc800037c1670 */
/*0930*/ PLOP3.LUT P6, PT, P3, P6, PT, 0xa8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40001fcd570 */
/*0940*/ ISETP.NE.AND P3, PT, R37, RZ, PT ; /* 0x000000ff2500720c */
/* 0x000fd60003f65270 */
/*0950*/ @!P6 LDG.E.U8 R23, [R2.64] ; /* 0x000000060217e981 */
/* 0x000ea4000c1e1100 */
/*0960*/ @!P6 IMAD.IADD R20, R20, 0x1, R23 ; /* 0x000000011414e824 */
/* 0x004fe400078e0217 */
/*0970*/ IMAD R23, R22, c[0x0][0x170], R21 ; /* 0x00005c0016177a24 */
/* 0x000fca00078e0215 */
/*0980*/ ISETP.GE.AND P6, PT, R23, UR4, PT ; /* 0x0000000417007c0c */
/* 0x000fc8000bfc6270 */
/*0990*/ ISETP.LT.OR P6, PT, R23, RZ, P6 ; /* 0x000000ff1700720c */
/* 0x000fc800037c1670 */
/*09a0*/ PLOP3.LUT P6, PT, P4, P6, PT, 0xa8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe400027cd570 */
/*09b0*/ ISETP.NE.AND P4, PT, R36, RZ, PT ; /* 0x000000ff2400720c */
/* 0x000fd60003f85270 */
/*09c0*/ @!P6 LDG.E.U8 R23, [R2.64+0x1] ; /* 0x000001060217e981 */
/* 0x000ea4000c1e1100 */
/*09d0*/ @!P6 IMAD.IADD R20, R20, 0x1, R23 ; /* 0x000000011414e824 */
/* 0x004fe400078e0217 */
/*09e0*/ IMAD R23, R22, c[0x0][0x170], R11 ; /* 0x00005c0016177a24 */
/* 0x000fca00078e020b */
/*09f0*/ ISETP.GE.AND P6, PT, R23, UR4, PT ; /* 0x0000000417007c0c */
/* 0x000fc8000bfc6270 */
/*0a00*/ ISETP.LT.OR P6, PT, R23, RZ, P6 ; /* 0x000000ff1700720c */
/* 0x000fc800037c1670 */
/*0a10*/ PLOP3.LUT P6, PT, P5, P6, PT, 0xa8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40002fcd570 */
/*0a20*/ ISETP.NE.AND P5, PT, R35, RZ, PT ; /* 0x000000ff2300720c */
/* 0x000fd60003fa5270 */
/*0a30*/ @!P6 LDG.E.U8 R23, [R2.64+0x2] ; /* 0x000002060217e981 */
/* 0x000ea4000c1e1100 */
/*0a40*/ @!P6 IMAD.IADD R20, R20, 0x1, R23 ; /* 0x000000011414e824 */
/* 0x004fe400078e0217 */
/*0a50*/ IMAD R23, R22, c[0x0][0x170], R12 ; /* 0x00005c0016177a24 */
/* 0x000fca00078e020c */
/*0a60*/ ISETP.GE.AND P6, PT, R23, UR4, PT ; /* 0x0000000417007c0c */
/* 0x000fc8000bfc6270 */
/*0a70*/ ISETP.LT.OR P6, PT, R23, RZ, P6 ; /* 0x000000ff1700720c */
/* 0x000fc800037c1670 */
/*0a80*/ PLOP3.LUT P6, PT, P0, P6, PT, 0xa8, 0x0 ; /* 0x000000000000781c */
/* 0x000fda00007cd570 */
/*0a90*/ @!P6 LDG.E.U8 R23, [R2.64+0x3] ; /* 0x000003060217e981 */
/* 0x000ea4000c1e1100 */
/*0aa0*/ @!P6 IMAD.IADD R20, R20, 0x1, R23 ; /* 0x000000011414e824 */
/* 0x004fe400078e0217 */
/*0ab0*/ IMAD R23, R22, c[0x0][0x170], R13 ; /* 0x00005c0016177a24 */
/* 0x000fca00078e020d */
/*0ac0*/ ISETP.GE.AND P6, PT, R23, UR4, PT ; /* 0x0000000417007c0c */
/* 0x000fc8000bfc6270 */
/*0ad0*/ ISETP.LT.OR P6, PT, R23, RZ, P6 ; /* 0x000000ff1700720c */
/* 0x000fc800037c1670 */
/*0ae0*/ PLOP3.LUT P6, PT, P1, P6, PT, 0xa8, 0x0 ; /* 0x000000000000781c */
/* 0x000fda0000fcd570 */
/*0af0*/ @!P6 LDG.E.U8 R23, [R2.64+0x4] ; /* 0x000004060217e981 */
/* 0x000ea4000c1e1100 */
/*0b00*/ @!P6 IMAD.IADD R20, R20, 0x1, R23 ; /* 0x000000011414e824 */
/* 0x004fe400078e0217 */
/*0b10*/ IMAD R23, R22, c[0x0][0x170], R14 ; /* 0x00005c0016177a24 */
/* 0x000fca00078e020e */
/*0b20*/ ISETP.GE.AND P6, PT, R23, UR4, PT ; /* 0x0000000417007c0c */
/* 0x000fc8000bfc6270 */
/*0b30*/ ISETP.LT.OR P6, PT, R23, RZ, P6 ; /* 0x000000ff1700720c */
/* 0x000fc800037c1670 */
/*0b40*/ PLOP3.LUT P6, PT, P2, P6, PT, 0xa8, 0x0 ; /* 0x000000000000781c */
/* 0x000fda00017cd570 */
/*0b50*/ @!P6 LDG.E.U8 R23, [R2.64+0x5] ; /* 0x000005060217e981 */
/* 0x000ea4000c1e1100 */
/*0b60*/ @!P6 IMAD.IADD R20, R20, 0x1, R23 ; /* 0x000000011414e824 */
/* 0x004fe400078e0217 */
/*0b70*/ IMAD R23, R22, c[0x0][0x170], R15 ; /* 0x00005c0016177a24 */
/* 0x000fca00078e020f */
/*0b80*/ ISETP.GE.AND P6, PT, R23, UR4, PT ; /* 0x0000000417007c0c */
/* 0x000fc8000bfc6270 */
/*0b90*/ ISETP.LT.OR P6, PT, R23, RZ, P6 ; /* 0x000000ff1700720c */
/* 0x000fc800037c1670 */
/*0ba0*/ PLOP3.LUT P6, PT, P3, P6, PT, 0xa8, 0x0 ; /* 0x000000000000781c */
/* 0x000fda0001fcd570 */
/*0bb0*/ @!P6 LDG.E.U8 R23, [R2.64+0x6] ; /* 0x000006060217e981 */
/* 0x000ea4000c1e1100 */
/*0bc0*/ @!P6 IMAD.IADD R20, R20, 0x1, R23 ; /* 0x000000011414e824 */
/* 0x004fe400078e0217 */
/*0bd0*/ IMAD R23, R22, c[0x0][0x170], R16 ; /* 0x00005c0016177a24 */
/* 0x000fca00078e0210 */
/*0be0*/ ISETP.GE.AND P6, PT, R23, UR4, PT ; /* 0x0000000417007c0c */
/* 0x000fc8000bfc6270 */
/*0bf0*/ ISETP.LT.OR P6, PT, R23, RZ, P6 ; /* 0x000000ff1700720c */
/* 0x000fc800037c1670 */
/*0c00*/ PLOP3.LUT P6, PT, P4, P6, PT, 0xa8, 0x0 ; /* 0x000000000000781c */
/* 0x000fda00027cd570 */
/*0c10*/ @!P6 LDG.E.U8 R23, [R2.64+0x7] ; /* 0x000007060217e981 */
/* 0x000ea2000c1e1100 */
/*0c20*/ IMAD R22, R22, c[0x0][0x170], R17 ; /* 0x00005c0016167a24 */
/* 0x000fe400078e0211 */
/*0c30*/ @!P6 IMAD.IADD R20, R20, 0x1, R23 ; /* 0x000000011414e824 */
/* 0x004fc600078e0217 */
/*0c40*/ ISETP.GE.AND P6, PT, R22, UR4, PT ; /* 0x0000000416007c0c */
/* 0x000fc8000bfc6270 */
/*0c50*/ ISETP.LT.OR P6, PT, R22, RZ, P6 ; /* 0x000000ff1600720c */
/* 0x000fc800037c1670 */
/*0c60*/ PLOP3.LUT P6, PT, P5, P6, PT, 0xa8, 0x0 ; /* 0x000000000000781c */
/* 0x000fda0002fcd570 */
/*0c70*/ @!P6 LDG.E.U8 R23, [R2.64+0x8] ; /* 0x000008060217e981 */
/* 0x000ea4000c1e1100 */
/*0c80*/ @!P6 IMAD.IADD R20, R20, 0x1, R23 ; /* 0x000000011414e824 */
/* 0x004fe400078e0217 */
/*0c90*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0ca0*/ ISETP.NE.AND P6, PT, R18, 0x9, PT ; /* 0x000000091200780c */
/* 0x000fda0003fc5270 */
/*0cb0*/ @P6 BRA 0x490 ; /* 0xfffff7d000006947 */
/* 0x000fea000383ffff */
/*0cc0*/ IMAD R0, R19, c[0x0][0x170], R0 ; /* 0x00005c0013007a24 */
/* 0x000fe400078e0200 */
/*0cd0*/ IMAD.WIDE.U32 R20, R20, -0x1d3b5977, RZ ; /* 0xe2c4a68914147825 */
/* 0x000fc600078e00ff */
/*0ce0*/ IADD3 R2, P0, R0.reuse, c[0x0][0x168], RZ ; /* 0x00005a0000027a10 */
/* 0x040fe40007f1e0ff */
/*0cf0*/ SHF.R.U32.HI R21, RZ, 0x8, R21 ; /* 0x00000008ff157819 */
/* 0x000fe40000011615 */
/*0d00*/ LEA.HI.X.SX32 R3, R0, c[0x0][0x16c], 0x1, P0 ; /* 0x00005b0000037a11 */
/* 0x000fca00000f0eff */
/*0d10*/ STG.E.U8 [R2.64], R21 ; /* 0x0000001502007986 */
/* 0x000fe2000c101106 */
/*0d20*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0d30*/ BRA 0xd30; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0d40*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0d50*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0d60*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0d70*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0d80*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0d90*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0da0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0db0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0dc0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0dd0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0de0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0df0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
#define BLOCK_SIZE 16
#define BLOCKSIZE_X 16
#define BLOCKSIZE_Y 16
// STD includes
// CUDA runtime
// Utilities and system includes
static // Print device properties
__global__ void averageKernel( unsigned char* inputChannel, unsigned char* outputChannel, int imageW, int imageH)
{
int y = blockIdx.y * blockDim.y + threadIdx.y;
int x = blockIdx.x * blockDim.x + threadIdx.x;
const unsigned int numElements = ((2 * KERNEL_RADIUS) + 1) * ((2 * KERNEL_RADIUS) + 1);
unsigned int sum = 0;
for (int kY = -KERNEL_RADIUS; kY <= KERNEL_RADIUS; kY++) {
const int curY = y + kY;
if (curY < 0 || curY > imageH) {
continue;
}
for (int kX = -KERNEL_RADIUS; kX <= KERNEL_RADIUS; kX++) {
const int curX = x + kX;
if (curX < 0 || curX > imageW) {
continue;
}
const int curPosition = (curY * imageW + curX);
if (curPosition >= 0 && curPosition < (imageW * imageH)) {
sum += inputChannel[curPosition];
}
}
}
outputChannel[y * imageW + x] = (unsigned char)(sum / numElements);
} | .file "tmpxft_001454e7_00000000-6_averageKernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.type _ZL13averageKernelPhS_ii, @function
_ZL13averageKernelPhS_ii:
.LFB2052:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
movq %rdi, 16(%rsp)
movq %rsi, 24(%rsp)
movl %edx, 8(%rsp)
movl %ecx, 12(%rsp)
leaq 16(%rsp), %rax
movq %rax, 96(%rsp)
leaq 24(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 12(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _ZL13averageKernelPhS_ii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2052:
.size _ZL13averageKernelPhS_ii, .-_ZL13averageKernelPhS_ii
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z13averageKernelPhS_ii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _ZL13averageKernelPhS_ii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
Subsets and Splits
No community queries yet
The top public SQL queries from the community will appear here once available.