system stringclasses 7
values | input stringlengths 10 94.5k | output stringlengths 14 55.5k |
|---|---|---|
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00147fac_00000000-6_assign.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... | .text
.file "assign.hip"
.globl _Z21__device_stub__revertiPfS_ # -- Begin function _Z21__device_stub__revertiPfS_
.p2align 4, 0x90
.type _Z21__device_stub__revertiPfS_,@function
_Z21__device_stub__revertiPfS_: # @_Z21__device_stub__revertiPfS_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
mov... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #define TILE 16
// Jądro z podziałem na bloki dla większych macierzy
__global__ void MulMatrixKernel2_T16(
float *A, float *B, float *C, int N)
{
float res=0;
int x=blockIdx.x * TILE + threadIdx.x; // zmiany
int y=blockIdx.y * TILE + threadIdx.y; // zmiany
for (int k=0; k<N; ++k) {
float Ai=A[y * N + k];
float Bi=B[k *... | code for sm_80
Function : _Z20MulMatrixKernel3_T16PfS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2UR UR5, SR_CTAID.Y ; /* 0x00000000000579c3 */
/* 0x000e220000... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #define TILE 16
// Jądro z podziałem na bloki dla większych macierzy
__global__ void MulMatrixKernel2_T16(
float *A, float *B, float *C, int N)
{
float res=0;
int x=blockIdx.x * TILE + threadIdx.x; // zmiany
int y=blockIdx.y * TILE + threadIdx.y; // zmiany
for (int k=0; k<N; ++k) {
float Ai=A[y * N + k];
float Bi=B[k *... | .file "tmpxft_0013bfdc_00000000-6_mulmat_t16.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %r... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #define TILE 16
// Jądro z podziałem na bloki dla większych macierzy
__global__ void MulMatrixKernel2_T16(
float *A, float *B, float *C, int N)
{
float res=0;
int x=blockIdx.x * TILE + threadIdx.x; // zmiany
int y=blockIdx.y * TILE + threadIdx.y; // zmiany
for (int k=0; k<N; ++k) {
float Ai=A[y * N + k];
float Bi=B[k *... | #include <hip/hip_runtime.h>
#define TILE 16
// Jądro z podziałem na bloki dla większych macierzy
__global__ void MulMatrixKernel2_T16(
float *A, float *B, float *C, int N)
{
float res=0;
int x=blockIdx.x * TILE + threadIdx.x; // zmiany
int y=blockIdx.y * TILE + threadIdx.y; // zmiany
for (int k=0; k<N; ++k) {
float Ai... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#define TILE 16
// Jądro z podziałem na bloki dla większych macierzy
__global__ void MulMatrixKernel2_T16(
float *A, float *B, float *C, int N)
{
float res=0;
int x=blockIdx.x * TILE + threadIdx.x; // zmiany
int y=blockIdx.y * TILE + threadIdx.y; // zmiany
for (int k=0; k<N; ++k) {
float Ai... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z20MulMatrixKernel2_T16PfS_S_i
.globl _Z20MulMatrixKernel2_T16PfS_S_i
.p2align 8
.type _Z20MulMatrixKernel2_T16PfS_S_i,@function
_Z20MulMatrixKernel2_T16PfS_S_i:
s_load_b32 s2, s[0:1], 0x18
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v2, v0, 10, 10
s_dela... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#define TILE 16
// Jądro z podziałem na bloki dla większych macierzy
__global__ void MulMatrixKernel2_T16(
float *A, float *B, float *C, int N)
{
float res=0;
int x=blockIdx.x * TILE + threadIdx.x; // zmiany
int y=blockIdx.y * TILE + threadIdx.y; // zmiany
for (int k=0; k<N; ++k) {
float Ai... | .text
.file "mulmat_t16.hip"
.globl _Z35__device_stub__MulMatrixKernel2_T16PfS_S_i # -- Begin function _Z35__device_stub__MulMatrixKernel2_T16PfS_S_i
.p2align 4, 0x90
.type _Z35__device_stub__MulMatrixKernel2_T16PfS_S_i,@function
_Z35__device_stub__MulMatrixKernel2_T16PfS_S_i: # @_Z35__device_stub__MulMatrixKernel2_T16... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z20MulMatrixKernel3_T16PfS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2UR UR5, SR_CTAID.Y ; /* 0x00000000000579c3 */
/* 0x000e220000... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z20MulMatrixKernel2_T16PfS_S_i
.globl _Z20MulMatrixKernel2_T16PfS_S_i
.p2align 8
.type _Z20MulMatrixKernel2_T16PfS_S_i,@function
_Z20MulMatrixKernel2_T16PfS_S_i:
s_load_b32 s2, s[0:1], 0x18
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v2, v0, 10, 10
s_dela... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0013bfdc_00000000-6_mulmat_t16.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %r... | .text
.file "mulmat_t16.hip"
.globl _Z35__device_stub__MulMatrixKernel2_T16PfS_S_i # -- Begin function _Z35__device_stub__MulMatrixKernel2_T16PfS_S_i
.p2align 4, 0x90
.type _Z35__device_stub__MulMatrixKernel2_T16PfS_S_i,@function
_Z35__device_stub__MulMatrixKernel2_T16PfS_S_i: # @_Z35__device_stub__MulMatrixKernel2_T16... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <stdlib.h>
#define DIM 1000
#define CUDA_CHECK( err ) (cuda_checker(err, __FILE__, __LINE__))
static void cuda_checker( cudaError_t err, const char *file, int line ) {
if (err != cudaSuccess) {
printf("%s in %s at line %d\n", cudaGetErrorString(err), file, line);
exit(EXIT_FAILURE);
}
}
str... | code for sm_80
Function : _Z6kernelPh
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0020*/ S2R... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
#define DIM 1000
#define CUDA_CHECK( err ) (cuda_checker(err, __FILE__, __LINE__))
static void cuda_checker( cudaError_t err, const char *file, int line ) {
if (err != cudaSuccess) {
printf("%s in %s at line %d\n", cudaGetErrorString(err), file, line);
exit(EXIT_FAILURE);
}
}
str... | .file "tmpxft_0002df65_00000000-6_1d_3.cudafe1.cpp"
.text
#APP
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%s in %s at line %d\n"
#NO_APP
.text
.type _ZL12cuda_checker9cudaErrorPKci, @function
_ZL12cuda_checker9cudaErrorPKci:
.LFB2057:
.cfi_startproc
testl %edi, %edi
jne .L6
ret
.L6:
pushq %rbp
.cfi_def_cf... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#define DIM 1000
#define CUDA_CHECK( err ) (cuda_checker(err, __FILE__, __LINE__))
static void cuda_checker( cudaError_t err, const char *file, int line ) {
if (err != cudaSuccess) {
printf("%s in %s at line %d\n", cudaGetErrorString(err), file, line);
exit(EXIT_FAILURE);
}
}
str... | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#define DIM 1000
#define CUDA_CHECK( err ) (cuda_checker(err, __FILE__, __LINE__))
static void cuda_checker( hipError_t err, const char *file, int line ) {
if (err != hipSuccess) {
printf("%s in %s at line %d\n", hipGetErrorString(err), file, line);
ex... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#define DIM 1000
#define CUDA_CHECK( err ) (cuda_checker(err, __FILE__, __LINE__))
static void cuda_checker( hipError_t err, const char *file, int line ) {
if (err != hipSuccess) {
printf("%s in %s at line %d\n", hipGetErrorString(err), file, line);
ex... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6kernelPh
.globl _Z6kernelPh
.p2align 8
.type _Z6kernelPh,@function
_Z6kernelPh:
s_load_b32 s4, s[0:1], 0x14
s_add_u32 s2, s0, 8
s_addc_u32 s3, s1, 0
s_mov_b32 s5, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xfff... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#define DIM 1000
#define CUDA_CHECK( err ) (cuda_checker(err, __FILE__, __LINE__))
static void cuda_checker( hipError_t err, const char *file, int line ) {
if (err != hipSuccess) {
printf("%s in %s at line %d\n", hipGetErrorString(err), file, line);
ex... | .text
.file "1d_3.hip"
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function _Z5juliaii
.LCPI0_0:
.long 0x3fc00000 # float 1.5
.LCPI0_1:
.long 0x43fa0000 # float 500
.LCPI0_2:
.long 0xbf4ccccd # float -0.8000000... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z6kernelPh
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0020*/ S2R... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6kernelPh
.globl _Z6kernelPh
.p2align 8
.type _Z6kernelPh,@function
_Z6kernelPh:
s_load_b32 s4, s[0:1], 0x14
s_add_u32 s2, s0, 8
s_addc_u32 s3, s1, 0
s_mov_b32 s5, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xfff... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0002df65_00000000-6_1d_3.cudafe1.cpp"
.text
#APP
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%s in %s at line %d\n"
#NO_APP
.text
.type _ZL12cuda_checker9cudaErrorPKci, @function
_ZL12cuda_checker9cudaErrorPKci:
.LFB2057:
.cfi_startproc
testl %edi, %edi
jne .L6
ret
.L6:
pushq %rbp
.cfi_def_cf... | .text
.file "1d_3.hip"
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function _Z5juliaii
.LCPI0_0:
.long 0x3fc00000 # float 1.5
.LCPI0_1:
.long 0x43fa0000 # float 500
.LCPI0_2:
.long 0xbf4ccccd # float -0.8000000... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | __global__ void
convolution2D(float *A,float *B,const int numRows,const int numCols)
{
int i = blockDim.x*blockIdx.x + threadIdx.x;
int j = blockDim.y*blockIdx.y + threadIdx.y;
if (i<numRows && j<numRows)
{
float pos1=0,pos2=0,pos3=0,pos4=0,pos5=0,pos6=0,pos7=0,pos8=0;
if((i-1)>=0 && (j-1)>=0)pos1 = A[(i-1)*numCols+(... | code for sm_80
Function : _Z13convolution2DPfS_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R9, SR_CTAID.Y ; /* 0x0000000000097919 */
/* 0x000e280000002600 */
... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | __global__ void
convolution2D(float *A,float *B,const int numRows,const int numCols)
{
int i = blockDim.x*blockIdx.x + threadIdx.x;
int j = blockDim.y*blockIdx.y + threadIdx.y;
if (i<numRows && j<numRows)
{
float pos1=0,pos2=0,pos3=0,pos4=0,pos5=0,pos6=0,pos7=0,pos8=0;
if((i-1)>=0 && (j-1)>=0)pos1 = A[(i-1)*numCols+(... | .file "tmpxft_00000230_00000000-6_Conv2D.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | __global__ void
convolution2D(float *A,float *B,const int numRows,const int numCols)
{
int i = blockDim.x*blockIdx.x + threadIdx.x;
int j = blockDim.y*blockIdx.y + threadIdx.y;
if (i<numRows && j<numRows)
{
float pos1=0,pos2=0,pos3=0,pos4=0,pos5=0,pos6=0,pos7=0,pos8=0;
if((i-1)>=0 && (j-1)>=0)pos1 = A[(i-1)*numCols+(... | #include <hip/hip_runtime.h>
__global__ void
convolution2D(float *A,float *B,const int numRows,const int numCols)
{
int i = blockDim.x*blockIdx.x + threadIdx.x;
int j = blockDim.y*blockIdx.y + threadIdx.y;
if (i<numRows && j<numRows)
{
float pos1=0,pos2=0,pos3=0,pos4=0,pos5=0,pos6=0,pos7=0,pos8=0;
if((i-1)>=0 && (j-1... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
__global__ void
convolution2D(float *A,float *B,const int numRows,const int numCols)
{
int i = blockDim.x*blockIdx.x + threadIdx.x;
int j = blockDim.y*blockIdx.y + threadIdx.y;
if (i<numRows && j<numRows)
{
float pos1=0,pos2=0,pos3=0,pos4=0,pos5=0,pos6=0,pos7=0,pos8=0;
if((i-1)>=0 && (j-1... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z13convolution2DPfS_ii
.globl _Z13convolution2DPfS_ii
.p2align 8
.type _Z13convolution2DPfS_ii,@function
_Z13convolution2DPfS_ii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s7, s[0:1], 0x10
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
__global__ void
convolution2D(float *A,float *B,const int numRows,const int numCols)
{
int i = blockDim.x*blockIdx.x + threadIdx.x;
int j = blockDim.y*blockIdx.y + threadIdx.y;
if (i<numRows && j<numRows)
{
float pos1=0,pos2=0,pos3=0,pos4=0,pos5=0,pos6=0,pos7=0,pos8=0;
if((i-1)>=0 && (j-1... | .text
.file "Conv2D.hip"
.globl _Z28__device_stub__convolution2DPfS_ii # -- Begin function _Z28__device_stub__convolution2DPfS_ii
.p2align 4, 0x90
.type _Z28__device_stub__convolution2DPfS_ii,@function
_Z28__device_stub__convolution2DPfS_ii: # @_Z28__device_stub__convolution2DPfS_ii
.cfi_startproc
# %bb.0:
subq $120, %... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z13convolution2DPfS_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R9, SR_CTAID.Y ; /* 0x0000000000097919 */
/* 0x000e280000002600 */
... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z13convolution2DPfS_ii
.globl _Z13convolution2DPfS_ii
.p2align 8
.type _Z13convolution2DPfS_ii,@function
_Z13convolution2DPfS_ii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s7, s[0:1], 0x10
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, ... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00000230_00000000-6_Conv2D.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... | .text
.file "Conv2D.hip"
.globl _Z28__device_stub__convolution2DPfS_ii # -- Begin function _Z28__device_stub__convolution2DPfS_ii
.p2align 4, 0x90
.type _Z28__device_stub__convolution2DPfS_ii,@function
_Z28__device_stub__convolution2DPfS_ii: # @_Z28__device_stub__convolution2DPfS_ii
.cfi_startproc
# %bb.0:
subq $120, %... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <cuda_runtime.h>
#include <time.h>
#include <sys/time.h>
void checkResult(float *hostRef, float *gpuRef, const int N){
double epsilon = 1.0E-8;
bool match = 1;
for (int i = 0; i < N; ++i) {
if (abs(hostRef[i] - gpuRef[i]) > epsilon){
match = 0;
printf("Array do not match!\n");
printf("host %... | code for sm_80
Function : _Z16printThreadIndexPiii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R17, SR_TID.Y ; /* 0x0000000000117919 */
/* 0x000... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <cuda_runtime.h>
#include <time.h>
#include <sys/time.h>
void checkResult(float *hostRef, float *gpuRef, const int N){
double epsilon = 1.0E-8;
bool match = 1;
for (int i = 0; i < N; ++i) {
if (abs(hostRef[i] - gpuRef[i]) > epsilon){
match = 0;
printf("Array do not match!\n");
printf("host %... | .file "tmpxft_00044103_00000000-6_main.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2066:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cf... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <cuda_runtime.h>
#include <time.h>
#include <sys/time.h>
void checkResult(float *hostRef, float *gpuRef, const int N){
double epsilon = 1.0E-8;
bool match = 1;
for (int i = 0; i < N; ++i) {
if (abs(hostRef[i] - gpuRef[i]) > epsilon){
match = 0;
printf("Array do not match!\n");
printf("host %... | #include <stdio.h>
#include <hip/hip_runtime.h>
#include <time.h>
#include <sys/time.h>
void checkResult(float *hostRef, float *gpuRef, const int N){
double epsilon = 1.0E-8;
bool match = 1;
for (int i = 0; i < N; ++i) {
if (abs(hostRef[i] - gpuRef[i]) > epsilon){
match = 0;
printf("Array do not match!\n");
printf("hos... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <stdio.h>
#include <hip/hip_runtime.h>
#include <time.h>
#include <sys/time.h>
void checkResult(float *hostRef, float *gpuRef, const int N){
double epsilon = 1.0E-8;
bool match = 1;
for (int i = 0; i < N; ++i) {
if (abs(hostRef[i] - gpuRef[i]) > epsilon){
match = 0;
printf("Array do not match!\n");
printf("hos... | .text
.file "main.hip"
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0 # -- Begin function _Z11checkResultPfS_i
.LCPI0_0:
.long 0x7fffffff # float NaN
.long 0x7fffffff # float NaN
.long 0x7fffffff # float NaN
.long 0x7fffff... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00044103_00000000-6_main.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2066:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cf... | .text
.file "main.hip"
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0 # -- Begin function _Z11checkResultPfS_i
.LCPI0_0:
.long 0x7fffffff # float NaN
.long 0x7fffffff # float NaN
.long 0x7fffffff # float NaN
.long 0x7fffff... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | // System includes
#include <stdio.h>
#include <assert.h>
#include <iostream>
#include <math.h>
// CUDA runtime
#include <cuda_runtime.h>
#define BILLION 1000000000L
template <unsigned int blockSize>
__device__ void warpReduce(volatile float *sdata, unsigned int tid) {
if (blockSize >= 64) sdata[tid] += sdata[tid + 32... | .file "tmpxft_00194bc2_00000000-6_cuda_global_reduce.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.section .text._Z7reduce6ILj1024EEvPfS0_j,"axG",@progbits,_Z7reduce6ILj1024EEvPfS0_j,comdat
.weak _Z7reduce6ILj1024EEvPfS0_j
.type _Z7reduce6ILj1024EEvPfS0_j, @function
_Z7reduce6ILj1024EEvPfS0_j:
.L... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | // System includes
#include <stdio.h>
#include <assert.h>
#include <iostream>
#include <math.h>
// CUDA runtime
#include <cuda_runtime.h>
#define BILLION 1000000000L
template <unsigned int blockSize>
__device__ void warpReduce(volatile float *sdata, unsigned int tid) {
if (blockSize >= 64) sdata[tid] += sdata[tid + 32... | // System includes
#include <stdio.h>
#include <assert.h>
#include <iostream>
#include <math.h>
// CUDA runtime
#include <hip/hip_runtime.h>
#define BILLION 1000000000L
template <unsigned int blockSize>
__device__ void warpReduce(volatile float *sdata, unsigned int tid) {
if (blockSize >= 64) sdata[tid] += sdata[tid +... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | // System includes
#include <stdio.h>
#include <assert.h>
#include <iostream>
#include <math.h>
// CUDA runtime
#include <hip/hip_runtime.h>
#define BILLION 1000000000L
template <unsigned int blockSize>
__device__ void warpReduce(volatile float *sdata, unsigned int tid) {
if (blockSize >= 64) sdata[tid] += sdata[tid +... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z4initPfj
.globl _Z4initPfj
.p2align 8
.type _Z4initPfj,@function
_Z4initPfj:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x1c
s_load_b32 s6, s[0:1], 0x8
s_add_u32 s2, s0, 16
s_addc_u32 s3, s1, 0
s_mov_b32 s5, exec_lo
s_wai... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | // System includes
#include <stdio.h>
#include <assert.h>
#include <iostream>
#include <math.h>
// CUDA runtime
#include <hip/hip_runtime.h>
#define BILLION 1000000000L
template <unsigned int blockSize>
__device__ void warpReduce(volatile float *sdata, unsigned int tid) {
if (blockSize >= 64) sdata[tid] += sdata[tid +... | .text
.file "cuda_global_reduce.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z19__device_stub__initPfj # -- Begin function _Z19__device_stub__initPfj
.p2align ... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00194bc2_00000000-6_cuda_global_reduce.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.section .text._Z7reduce6ILj1024EEvPfS0_j,"axG",@progbits,_Z7reduce6ILj1024EEvPfS0_j,comdat
.weak _Z7reduce6ILj1024EEvPfS0_j
.type _Z7reduce6ILj1024EEvPfS0_j, @function
_Z7reduce6ILj1024EEvPfS0_j:
.L... | .text
.file "cuda_global_reduce.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z19__device_stub__initPfj # -- Begin function _Z19__device_stub__initPfj
.p2align ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | // cudaDCA.cu
//
//This file contains the recursive DCA function, and the function that is used to invoke DCA and
//interperate the results.
//Included Files
#include <iostream>
//Function Prototypes
// Functions found in this file
void RecDCA(double Zs[], int n, int i, double AF[], int cut_off,double Xs[]);
// Functio... | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | // cudaDCA.cu
//
//This file contains the recursive DCA function, and the function that is used to invoke DCA and
//interperate the results.
//Included Files
#include <iostream>
//Function Prototypes
// Functions found in this file
void RecDCA(double Zs[], int n, int i, double AF[], int cut_off,double Xs[]);
// Functio... | .file "tmpxft_001b6f13_00000000-6_hybridDCA.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3676:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cuda... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | // cudaDCA.cu
//
//This file contains the recursive DCA function, and the function that is used to invoke DCA and
//interperate the results.
//Included Files
#include <iostream>
//Function Prototypes
// Functions found in this file
void RecDCA(double Zs[], int n, int i, double AF[], int cut_off,double Xs[]);
// Functio... | // cudaDCA.cu
//
//This file contains the recursive DCA function, and the function that is used to invoke DCA and
//interperate the results.
//Included Files
#include <hip/hip_runtime.h>
#include <iostream>
//Function Prototypes
// Functions found in this file
void RecDCA(double Zs[], int n, int i, double AF[], int cut... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | // cudaDCA.cu
//
//This file contains the recursive DCA function, and the function that is used to invoke DCA and
//interperate the results.
//Included Files
#include <hip/hip_runtime.h>
#include <iostream>
//Function Prototypes
// Functions found in this file
void RecDCA(double Zs[], int n, int i, double AF[], int cut... | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | // cudaDCA.cu
//
//This file contains the recursive DCA function, and the function that is used to invoke DCA and
//interperate the results.
//Included Files
#include <hip/hip_runtime.h>
#include <iostream>
//Function Prototypes
// Functions found in this file
void RecDCA(double Zs[], int n, int i, double AF[], int cut... | .text
.file "hybridDCA.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z7DCAhelpiPbPdS0_PiS0_S0_S0_iS0_iS0_ # -- Begin function _Z7DCAhelpiPbPdS0_PiS0_S0_S0_iS0_iS0_
.... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001b6f13_00000000-6_hybridDCA.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3676:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cuda... | .text
.file "hybridDCA.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z7DCAhelpiPbPdS0_PiS0_S0_S0_iS0_iS0_ # -- Begin function _Z7DCAhelpiPbPdS0_PiS0_S0_S0_iS0_iS0_
.... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <cuda_runtime.h>
#include <vector>
#include <iostream>
#define NUM_BANKS 32
#define LOG_NUM_BANKS 5
#define CONFLICT_FREE_OFFSET(n) ((n) >> NUM_BANKS + (n) >> (2 * LOG_NUM_BANKS))
#define NUM_THREADS 256
using namespace std;
// Exclusive prescan
// n - number of elements
__global__ void pre... | code for sm_80
Function : _Z11find_repeatPiS_S_ib
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <cuda_runtime.h>
#include <vector>
#include <iostream>
#define NUM_BANKS 32
#define LOG_NUM_BANKS 5
#define CONFLICT_FREE_OFFSET(n) ((n) >> NUM_BANKS + (n) >> (2 * LOG_NUM_BANKS))
#define NUM_THREADS 256
using namespace std;
// Exclusive prescan
// n - number of elements
__global__ void pre... | .file "tmpxft_000f53ff_00000000-6_part4.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4051:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnre... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <cuda_runtime.h>
#include <vector>
#include <iostream>
#define NUM_BANKS 32
#define LOG_NUM_BANKS 5
#define CONFLICT_FREE_OFFSET(n) ((n) >> NUM_BANKS + (n) >> (2 * LOG_NUM_BANKS))
#define NUM_THREADS 256
using namespace std;
// Exclusive prescan
// n - number of elements
__global__ void pre... | #include <stdio.h>
#include <hip/hip_runtime.h>
#include <vector>
#include <iostream>
#define NUM_BANKS 32
#define LOG_NUM_BANKS 5
#define CONFLICT_FREE_OFFSET(n) ((n) >> NUM_BANKS + (n) >> (2 * LOG_NUM_BANKS))
#define NUM_THREADS 256
using namespace std;
// Exclusive prescan
// n - number of elements
__global__ void ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <stdio.h>
#include <hip/hip_runtime.h>
#include <vector>
#include <iostream>
#define NUM_BANKS 32
#define LOG_NUM_BANKS 5
#define CONFLICT_FREE_OFFSET(n) ((n) >> NUM_BANKS + (n) >> (2 * LOG_NUM_BANKS))
#define NUM_THREADS 256
using namespace std;
// Exclusive prescan
// n - number of elements
__global__ void ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z7prescanPiS_i
.globl _Z7prescanPiS_i
.p2align 8
.type _Z7prescanPiS_i,@function
_Z7prescanPiS_i:
s_clause 0x2
s_load_b32 s3, s[0:1], 0x24
s_load_b32 s2, s[0:1], 0x10
s_load_b64 s[4:5], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <stdio.h>
#include <hip/hip_runtime.h>
#include <vector>
#include <iostream>
#define NUM_BANKS 32
#define LOG_NUM_BANKS 5
#define CONFLICT_FREE_OFFSET(n) ((n) >> NUM_BANKS + (n) >> (2 * LOG_NUM_BANKS))
#define NUM_THREADS 256
using namespace std;
// Exclusive prescan
// n - number of elements
__global__ void ... | .text
.file "part4.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z22__device_stub__prescanPiS_i # -- Begin function _Z22__device_stub__prescanPiS_i
.p2align 4, 0x90
... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <assert.h>
#include <time.h>
#define BLOCK_SIZE 16
#define CONVERGENCE_CHECK 1
__global__ void convoluteBlock(unsigned char *src, unsigned char *dst, int x, int y, int multiplier) {
int x_dim = blockIdx.x * blockDim.x + threadIdx.x;
int y_dim = blockIdx.y * blockDim.y + ... | .file "tmpxft_000b8e91_00000000-6_convolute_Filter.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq ... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#include <assert.h>
#include <time.h>
#define BLOCK_SIZE 16
#define CONVERGENCE_CHECK 1
__global__ void convoluteBlock(unsigned char *src, unsigned char *dst, int x, int y, int multiplier) {
int x_dim = blockIdx.x * blockDim.x + threadIdx.x;
int y_dim = blockIdx.y * blockDim.y + ... | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <assert.h>
#include <time.h>
#define BLOCK_SIZE 16
#define CONVERGENCE_CHECK 1
__global__ void convoluteBlock(unsigned char *src, unsigned char *dst, int x, int y, int multiplier) {
int x_dim = blockIdx.x * blockDim.x + threadIdx.x;
int y_dim... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <assert.h>
#include <time.h>
#define BLOCK_SIZE 16
#define CONVERGENCE_CHECK 1
__global__ void convoluteBlock(unsigned char *src, unsigned char *dst, int x, int y, int multiplier) {
int x_dim = blockIdx.x * blockDim.x + threadIdx.x;
int y_dim... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z14convoluteBlockPhS_iii
.globl _Z14convoluteBlockPhS_iii
.p2align 8
.type _Z14convoluteBlockPhS_iii,@function
_Z14convoluteBlockPhS_iii:
s_load_b32 s4, s[0:1], 0x2c
v_and_b32_e32 v3, 0x3ff, v0
s_add_u32 s2, s0, 32
s_addc_u32 s3, s1, 0
s_waitc... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <assert.h>
#include <time.h>
#define BLOCK_SIZE 16
#define CONVERGENCE_CHECK 1
__global__ void convoluteBlock(unsigned char *src, unsigned char *dst, int x, int y, int multiplier) {
int x_dim = blockIdx.x * blockDim.x + threadIdx.x;
int y_dim... | .text
.file "convolute_Filter.hip"
.globl _Z29__device_stub__convoluteBlockPhS_iii # -- Begin function _Z29__device_stub__convoluteBlockPhS_iii
.p2align 4, 0x90
.type _Z29__device_stub__convoluteBlockPhS_iii,@function
_Z29__device_stub__convoluteBlockPhS_iii: # @_Z29__device_stub__convoluteBlockPhS_iii
.cfi_startproc
#... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000b8e91_00000000-6_convolute_Filter.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq ... | .text
.file "convolute_Filter.hip"
.globl _Z29__device_stub__convoluteBlockPhS_iii # -- Begin function _Z29__device_stub__convoluteBlockPhS_iii
.p2align 4, 0x90
.type _Z29__device_stub__convoluteBlockPhS_iii,@function
_Z29__device_stub__convoluteBlockPhS_iii: # @_Z29__device_stub__convoluteBlockPhS_iii
.cfi_startproc
#... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | extern "C" __constant__ int my_constant = 314;
extern "C" __global__ void sum(const float *x, const float *y, float *out,
int count) {
for (int i = ((threadIdx.x) + (((blockIdx.x) * (blockDim.x)))); i < count;
(i)++) {
out[i] = ((x[i]) * (y[i]));
}
} | code for sm_80
Function : sum
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | extern "C" __constant__ int my_constant = 314;
extern "C" __global__ void sum(const float *x, const float *y, float *out,
int count) {
for (int i = ((threadIdx.x) + (((blockIdx.x) * (blockDim.x)))); i < count;
(i)++) {
out[i] = ((x[i]) * (y[i]));
}
} | .file "tmpxft_00102522_00000000-6_cuda_add.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | extern "C" __constant__ int my_constant = 314;
extern "C" __global__ void sum(const float *x, const float *y, float *out,
int count) {
for (int i = ((threadIdx.x) + (((blockIdx.x) * (blockDim.x)))); i < count;
(i)++) {
out[i] = ((x[i]) * (y[i]));
}
} | #include <hip/hip_runtime.h>
extern "C" __constant__ int my_constant = 314;
extern "C" __global__ void sum(const float *x, const float *y, float *out,
int count) {
for (int i = ((threadIdx.x) + (((blockIdx.x) * (blockDim.x)))); i < count;
(i)++) {
out[i] = ((x[i]) * (y[i]));
}
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
extern "C" __constant__ int my_constant = 314;
extern "C" __global__ void sum(const float *x, const float *y, float *out,
int count) {
for (int i = ((threadIdx.x) + (((blockIdx.x) * (blockDim.x)))); i < count;
(i)++) {
out[i] = ((x[i]) * (y[i]));
}
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected sum
.globl sum
.p2align 8
.type sum,@function
sum:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x2c
s_load_b32 s2, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s3, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
extern "C" __constant__ int my_constant = 314;
extern "C" __global__ void sum(const float *x, const float *y, float *out,
int count) {
for (int i = ((threadIdx.x) + (((blockIdx.x) * (blockDim.x)))); i < count;
(i)++) {
out[i] = ((x[i]) * (y[i]));
}
} | .text
.file "cuda_add.hip"
.globl __device_stub__sum # -- Begin function __device_stub__sum
.p2align 4, 0x90
.type __device_stub__sum,@function
__device_stub__sum: # @__device_stub__sum
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rs... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : sum
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected sum
.globl sum
.p2align 8
.type sum,@function
sum:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x2c
s_load_b32 s2, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s3, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | ... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00102522_00000000-6_cuda_add.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp... | .text
.file "cuda_add.hip"
.globl __device_stub__sum # -- Begin function __device_stub__sum
.p2align 4, 0x90
.type __device_stub__sum,@function
__device_stub__sum: # @__device_stub__sum
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rs... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <device_functions.h>
#include <device_launch_parameters.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <cuda.h>
CUcontext hContext = 0;
#define CUDA_CHECK( fn ) do { \
CUresult status = (fn); \
if ( CUDA_SUCCESS != status ) {... | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <device_functions.h>
#include <device_launch_parameters.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <cuda.h>
CUcontext hContext = 0;
#define CUDA_CHECK( fn ) do { \
CUresult status = (fn); \
if ( CUDA_SUCCESS != status ) {... | .file "tmpxft_001a0a56_00000000-6_conv1024.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <device_functions.h>
#include <device_launch_parameters.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <cuda.h>
CUcontext hContext = 0;
#define CUDA_CHECK( fn ) do { \
CUresult status = (fn); \
if ( CUDA_SUCCESS != status ) {... | #include "hip/hip_runtime.h"
#include <hip/device_functions.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
hipCtx_t hContext = 0;
#define CUDA_CHECK( fn ) do { \
hipError_t status = (fn); \
if ( hipSuccess != status ) { \
const char* errstr; \
hipDrvGetErrorString(status, &errstr); \
printf("CUDA Driver Fa... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include "hip/hip_runtime.h"
#include <hip/device_functions.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
hipCtx_t hContext = 0;
#define CUDA_CHECK( fn ) do { \
hipError_t status = (fn); \
if ( hipSuccess != status ) { \
const char* errstr; \
hipDrvGetErrorString(status, &errstr); \
printf("CUDA Driver Fa... | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include "hip/hip_runtime.h"
#include <hip/device_functions.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
hipCtx_t hContext = 0;
#define CUDA_CHECK( fn ) do { \
hipError_t status = (fn); \
if ( hipSuccess != status ) { \
const char* errstr; \
hipDrvGetErrorString(status, &errstr); \
printf("CUDA Driver Fa... | .text
.file "conv1024.hip"
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function _Z6gflopsPKcifi
.LCPI0_0:
.quad 0xc010000000000000 # double -4
.LCPI0_1:
.quad 0x408f400000000000 # double 1000
.text
.globl _Z6gflopsPKcifi
.p2align 4, 0x90
.type _Z6... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | extern "C" __global__ void
shift(float2* arr, int resx, int resy, int resz, int size)
{
int i = blockDim.x * blockIdx.x + threadIdx.x;
int idx = resx / 2;
int idy = resy / 2;
int idz = resz / 2;
float2 tmp;
if (i / resy / resz < idx) {
if (i / resz % resy < idy) {
if (i % resz < idz) {
//0
tmp = arr[i];
arr[i] = arr[... | code for sm_80
Function : shift
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ IABS R0, c[0x0][0x16c] ; /* 0x00005b0000007a13 */
/* 0x000fe20000000000 ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | extern "C" __global__ void
shift(float2* arr, int resx, int resy, int resz, int size)
{
int i = blockDim.x * blockIdx.x + threadIdx.x;
int idx = resx / 2;
int idy = resy / 2;
int idz = resz / 2;
float2 tmp;
if (i / resy / resz < idx) {
if (i / resz % resy < idy) {
if (i % resz < idz) {
//0
tmp = arr[i];
arr[i] = arr[... | .file "tmpxft_0008de43_00000000-6_shift.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.c... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | extern "C" __global__ void
shift(float2* arr, int resx, int resy, int resz, int size)
{
int i = blockDim.x * blockIdx.x + threadIdx.x;
int idx = resx / 2;
int idy = resy / 2;
int idz = resz / 2;
float2 tmp;
if (i / resy / resz < idx) {
if (i / resz % resy < idy) {
if (i % resz < idz) {
//0
tmp = arr[i];
arr[i] = arr[... | #include <hip/hip_runtime.h>
extern "C" __global__ void
shift(float2* arr, int resx, int resy, int resz, int size)
{
int i = blockDim.x * blockIdx.x + threadIdx.x;
int idx = resx / 2;
int idy = resy / 2;
int idz = resz / 2;
float2 tmp;
if (i / resy / resz < idx) {
if (i / resz % resy < idy) {
if (i % resz < idz) {
//... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
extern "C" __global__ void
shift(float2* arr, int resx, int resy, int resz, int size)
{
int i = blockDim.x * blockIdx.x + threadIdx.x;
int idx = resx / 2;
int idy = resy / 2;
int idz = resz / 2;
float2 tmp;
if (i / resy / resz < idx) {
if (i / resz % resy < idy) {
if (i % resz < idz) {
//... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected shift
.globl shift
.p2align 8
.type shift,@function
shift:
s_clause 0x2
s_load_b64 s[2:3], s[0:1], 0x8
s_load_b32 s6, s[0:1], 0x10
s_load_b32 s4, s[0:1], 0x24
s_waitcnt lgkmcnt(0)
s_ashr_i32 s5, s3, 31
s_as... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
extern "C" __global__ void
shift(float2* arr, int resx, int resy, int resz, int size)
{
int i = blockDim.x * blockIdx.x + threadIdx.x;
int idx = resx / 2;
int idy = resy / 2;
int idz = resz / 2;
float2 tmp;
if (i / resy / resz < idx) {
if (i / resz % resy < idy) {
if (i % resz < idz) {
//... | .text
.file "shift.hip"
.globl __device_stub__shift # -- Begin function __device_stub__shift
.p2align 4, 0x90
.type __device_stub__shift,@function
__device_stub__shift: # @__device_stub__shift
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movl %esi, 20(... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : shift
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ IABS R0, c[0x0][0x16c] ; /* 0x00005b0000007a13 */
/* 0x000fe20000000000 ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected shift
.globl shift
.p2align 8
.type shift,@function
shift:
s_clause 0x2
s_load_b64 s[2:3], s[0:1], 0x8
s_load_b32 s6, s[0:1], 0x10
s_load_b32 s4, s[0:1], 0x24
s_waitcnt lgkmcnt(0)
s_ashr_i32 s5, s3, 31
s_as... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0008de43_00000000-6_shift.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.c... | .text
.file "shift.hip"
.globl __device_stub__shift # -- Begin function __device_stub__shift
.p2align 4, 0x90
.type __device_stub__shift,@function
__device_stub__shift: # @__device_stub__shift
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movl %esi, 20(... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <stdlib.h>
#include <math.h>
#define SUBMATRIX_SIZE 10000
#define BLOCK_SIZE 16
float getnum() {
return rand()/((float) RAND_MAX);
}
__global__ void gpu_matrix_multiply(float *a, float *b, float *c, int n)
{
__shared__ float tile_a[BLOCK_SIZE][BLOCK_SIZE];
__shared__ float tile_b[BLOCK_SIZE... | code for sm_80
Function : _Z19gpu_matrix_multiplyPfS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R4, SR_CTAID.X ; /* 0x0000000000047919 */
/* 0x000e220000002... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <math.h>
#define SUBMATRIX_SIZE 10000
#define BLOCK_SIZE 16
float getnum() {
return rand()/((float) RAND_MAX);
}
__global__ void gpu_matrix_multiply(float *a, float *b, float *c, int n)
{
__shared__ float tile_a[BLOCK_SIZE][BLOCK_SIZE];
__shared__ float tile_b[BLOCK_SIZE... | .file "tmpxft_00043904_00000000-6_parallel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2071:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#include <math.h>
#define SUBMATRIX_SIZE 10000
#define BLOCK_SIZE 16
float getnum() {
return rand()/((float) RAND_MAX);
}
__global__ void gpu_matrix_multiply(float *a, float *b, float *c, int n)
{
__shared__ float tile_a[BLOCK_SIZE][BLOCK_SIZE];
__shared__ float tile_b[BLOCK_SIZE... | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#define SUBMATRIX_SIZE 10000
#define BLOCK_SIZE 16
float getnum() {
return rand()/((float) RAND_MAX);
}
__global__ void gpu_matrix_multiply(float *a, float *b, float *c, int n)
{
__shared__ float tile_a[BLOCK_SIZE][BLOCK_SIZE];
__sha... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#define SUBMATRIX_SIZE 10000
#define BLOCK_SIZE 16
float getnum() {
return rand()/((float) RAND_MAX);
}
__global__ void gpu_matrix_multiply(float *a, float *b, float *c, int n)
{
__shared__ float tile_a[BLOCK_SIZE][BLOCK_SIZE];
__sha... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z19gpu_matrix_multiplyPfS_S_i
.globl _Z19gpu_matrix_multiplyPfS_S_i
.p2align 8
.type _Z19gpu_matrix_multiplyPfS_S_i,@function
_Z19gpu_matrix_multiplyPfS_S_i:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x20
s_load_b32 s2, s[0:1], 0x18
v_bfe_u32 v6, v0, 10,... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#define SUBMATRIX_SIZE 10000
#define BLOCK_SIZE 16
float getnum() {
return rand()/((float) RAND_MAX);
}
__global__ void gpu_matrix_multiply(float *a, float *b, float *c, int n)
{
__shared__ float tile_a[BLOCK_SIZE][BLOCK_SIZE];
__sha... | .text
.file "parallel.hip"
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function _Z6getnumv
.LCPI0_0:
.long 0x30000000 # float 4.65661287E-10
.text
.globl _Z6getnumv
.p2align 4, 0x90
.type _Z6getnumv,@function
_Z6getnumv: # @... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z19gpu_matrix_multiplyPfS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R4, SR_CTAID.X ; /* 0x0000000000047919 */
/* 0x000e220000002... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z19gpu_matrix_multiplyPfS_S_i
.globl _Z19gpu_matrix_multiplyPfS_S_i
.p2align 8
.type _Z19gpu_matrix_multiplyPfS_S_i,@function
_Z19gpu_matrix_multiplyPfS_S_i:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x20
s_load_b32 s2, s[0:1], 0x18
v_bfe_u32 v6, v0, 10,... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
//Library Definition
//Constant Definition
#define PI 3.141592654
#define blocksize 32
#define Repetitions 8192
//Print matrix into standard output
void print(double * M,int cols,int rows);
void dot(double * a,double * b, double & c, int cols);
void Create_New_Matrix(double * M,double * New,int * ... | code for sm_80
Function : _Z9matrixMulPdS_S_iii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
//Library Definition
//Constant Definition
#define PI 3.141592654
#define blocksize 32
#define Repetitions 8192
//Print matrix into standard output
void print(double * M,int cols,int rows);
void dot(double * a,double * b, double & c, int cols);
void Create_New_Matrix(double * M,double * New,int * ... | .file "tmpxft_00028fad_00000000-6_matrixMul.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rs... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
//Library Definition
//Constant Definition
#define PI 3.141592654
#define blocksize 32
#define Repetitions 8192
//Print matrix into standard output
void print(double * M,int cols,int rows);
void dot(double * a,double * b, double & c, int cols);
void Create_New_Matrix(double * M,double * New,int * ... | #include <hip/hip_runtime.h>
#include "includes.h"
//Library Definition
//Constant Definition
#define PI 3.141592654
#define blocksize 32
#define Repetitions 8192
//Print matrix into standard output
void print(double * M,int cols,int rows);
void dot(double * a,double * b, double & c, int cols);
void Create_New_Matrix(d... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
//Library Definition
//Constant Definition
#define PI 3.141592654
#define blocksize 32
#define Repetitions 8192
//Print matrix into standard output
void print(double * M,int cols,int rows);
void dot(double * a,double * b, double & c, int cols);
void Create_New_Matrix(d... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9matrixMulPdS_S_iii
.globl _Z9matrixMulPdS_S_iii
.p2align 8
.type _Z9matrixMulPdS_S_iii,@function
_Z9matrixMulPdS_S_iii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x34
s_load_b64 s[4:5], s[0:1], 0x18
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v2, ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
//Library Definition
//Constant Definition
#define PI 3.141592654
#define blocksize 32
#define Repetitions 8192
//Print matrix into standard output
void print(double * M,int cols,int rows);
void dot(double * a,double * b, double & c, int cols);
void Create_New_Matrix(d... | .text
.file "matrixMul.hip"
.globl _Z24__device_stub__matrixMulPdS_S_iii # -- Begin function _Z24__device_stub__matrixMulPdS_S_iii
.p2align 4, 0x90
.type _Z24__device_stub__matrixMulPdS_S_iii,@function
_Z24__device_stub__matrixMulPdS_S_iii: # @_Z24__device_stub__matrixMulPdS_S_iii
.cfi_startproc
# %bb.0:
subq $152, %r... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z9matrixMulPdS_S_iii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9matrixMulPdS_S_iii
.globl _Z9matrixMulPdS_S_iii
.p2align 8
.type _Z9matrixMulPdS_S_iii,@function
_Z9matrixMulPdS_S_iii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x34
s_load_b64 s[4:5], s[0:1], 0x18
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v2, ... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00028fad_00000000-6_matrixMul.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rs... | .text
.file "matrixMul.hip"
.globl _Z24__device_stub__matrixMulPdS_S_iii # -- Begin function _Z24__device_stub__matrixMulPdS_S_iii
.p2align 4, 0x90
.type _Z24__device_stub__matrixMulPdS_S_iii,@function
_Z24__device_stub__matrixMulPdS_S_iii: # @_Z24__device_stub__matrixMulPdS_S_iii
.cfi_startproc
# %bb.0:
subq $152, %r... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void transposedMatrixKernel(int* d_a, int* d_b) {
int i = threadIdx.x + blockDim.x * blockIdx.x;
int j = threadIdx.y + blockDim.y * blockIdx.y;
d_b[i * N + j] = d_a[j * N + i];
} | code for sm_80
Function : _Z22transposedMatrixKernelPiS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e22000000210... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void transposedMatrixKernel(int* d_a, int* d_b) {
int i = threadIdx.x + blockDim.x * blockIdx.x;
int j = threadIdx.y + blockDim.y * blockIdx.y;
d_b[i * N + j] = d_a[j * N + i];
} | .file "tmpxft_000f7989_00000000-6_transposedMatrixKernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void transposedMatrixKernel(int* d_a, int* d_b) {
int i = threadIdx.x + blockDim.x * blockIdx.x;
int j = threadIdx.y + blockDim.y * blockIdx.y;
d_b[i * N + j] = d_a[j * N + i];
} | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void transposedMatrixKernel(int* d_a, int* d_b) {
int i = threadIdx.x + blockDim.x * blockIdx.x;
int j = threadIdx.y + blockDim.y * blockIdx.y;
d_b[i * N + j] = d_a[j * N + i];
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void transposedMatrixKernel(int* d_a, int* d_b) {
int i = threadIdx.x + blockDim.x * blockIdx.x;
int j = threadIdx.y + blockDim.y * blockIdx.y;
d_b[i * N + j] = d_a[j * N + i];
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z22transposedMatrixKernelPiS_
.globl _Z22transposedMatrixKernelPiS_
.p2align 8
.type _Z22transposedMatrixKernelPiS_,@function
_Z22transposedMatrixKernelPiS_:
s_load_b32 s2, s[0:1], 0x1c
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v0, v0, 10, 10
s_waitcnt... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void transposedMatrixKernel(int* d_a, int* d_b) {
int i = threadIdx.x + blockDim.x * blockIdx.x;
int j = threadIdx.y + blockDim.y * blockIdx.y;
d_b[i * N + j] = d_a[j * N + i];
} | .text
.file "transposedMatrixKernel.hip"
.globl _Z37__device_stub__transposedMatrixKernelPiS_ # -- Begin function _Z37__device_stub__transposedMatrixKernelPiS_
.p2align 4, 0x90
.type _Z37__device_stub__transposedMatrixKernelPiS_,@function
_Z37__device_stub__transposedMatrixKernelPiS_: # @_Z37__device_stub__transposedMa... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z22transposedMatrixKernelPiS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e22000000210... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z22transposedMatrixKernelPiS_
.globl _Z22transposedMatrixKernelPiS_
.p2align 8
.type _Z22transposedMatrixKernelPiS_,@function
_Z22transposedMatrixKernelPiS_:
s_load_b32 s2, s[0:1], 0x1c
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v0, v0, 10, 10
s_waitcnt... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000f7989_00000000-6_transposedMatrixKernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT... | .text
.file "transposedMatrixKernel.hip"
.globl _Z37__device_stub__transposedMatrixKernelPiS_ # -- Begin function _Z37__device_stub__transposedMatrixKernelPiS_
.p2align 4, 0x90
.type _Z37__device_stub__transposedMatrixKernelPiS_,@function
_Z37__device_stub__transposedMatrixKernelPiS_: # @_Z37__device_stub__transposedMa... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
/*
* JCuda - Java bindings for NVIDIA CUDA driver and runtime API
* http://www.jcuda.org
*
*
* This code is based on the NVIDIA 'reduction' CUDA sample,
* Copyright 1993-2010 NVIDIA Corporation.
*/
extern "C"
extern "C"
extern "C"
extern "C"
extern "C"
extern "C"
extern "C"
__global__ void mismatc... | code for sm_80
Function : mismatch
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e220000002500 */
/*0020*/ MOV R2... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
/*
* JCuda - Java bindings for NVIDIA CUDA driver and runtime API
* http://www.jcuda.org
*
*
* This code is based on the NVIDIA 'reduction' CUDA sample,
* Copyright 1993-2010 NVIDIA Corporation.
*/
extern "C"
extern "C"
extern "C"
extern "C"
extern "C"
extern "C"
extern "C"
__global__ void mismatc... | .file "tmpxft_00138899_00000000-6_mismatch.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
/*
* JCuda - Java bindings for NVIDIA CUDA driver and runtime API
* http://www.jcuda.org
*
*
* This code is based on the NVIDIA 'reduction' CUDA sample,
* Copyright 1993-2010 NVIDIA Corporation.
*/
extern "C"
extern "C"
extern "C"
extern "C"
extern "C"
extern "C"
extern "C"
__global__ void mismatc... | #include <hip/hip_runtime.h>
#include "includes.h"
/*
* JCuda - Java bindings for NVIDIA CUDA driver and runtime API
* http://www.jcuda.org
*
*
* This code is based on the NVIDIA 'reduction' CUDA sample,
* Copyright 1993-2010 NVIDIA Corporation.
*/
extern "C"
extern "C"
extern "C"
extern "C"
extern "C"
extern "C"
exter... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
/*
* JCuda - Java bindings for NVIDIA CUDA driver and runtime API
* http://www.jcuda.org
*
*
* This code is based on the NVIDIA 'reduction' CUDA sample,
* Copyright 1993-2010 NVIDIA Corporation.
*/
extern "C"
extern "C"
extern "C"
extern "C"
extern "C"
extern "C"
exter... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected mismatch
.globl mismatch
.p2align 8
.type mismatch,@function
mismatch:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x0
s_load_b64 s[4:5], s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0x... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
/*
* JCuda - Java bindings for NVIDIA CUDA driver and runtime API
* http://www.jcuda.org
*
*
* This code is based on the NVIDIA 'reduction' CUDA sample,
* Copyright 1993-2010 NVIDIA Corporation.
*/
extern "C"
extern "C"
extern "C"
extern "C"
extern "C"
extern "C"
exter... | .text
.file "mismatch.hip"
.globl __device_stub__mismatch # -- Begin function __device_stub__mismatch
.p2align 4, 0x90
.type __device_stub__mismatch,@function
__device_stub__mismatch: # @__device_stub__mismatch
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movl %edi, 4(%rsp)
mov... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : mismatch
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e220000002500 */
/*0020*/ MOV R2... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected mismatch
.globl mismatch
.p2align 8
.type mismatch,@function
mismatch:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x0
s_load_b64 s[4:5], s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0x... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00138899_00000000-6_mismatch.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp... | .text
.file "mismatch.hip"
.globl __device_stub__mismatch # -- Begin function __device_stub__mismatch
.p2align 4, 0x90
.type __device_stub__mismatch,@function
__device_stub__mismatch: # @__device_stub__mismatch
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movl %edi, 4(%rsp)
mov... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "hemisphere_implement.h"
#include "brdf_common.h"
__global__ void
hemisphere_kernel(float3* pos, unsigned width)
{
unsigned int x = blockIdx.x*blockDim.x + threadIdx.x;
unsigned int y = blockIdx.y*blockDim.y + threadIdx.y;
float3 pin = pos[y*width+x];
pos[y*width+x] = normalize(pin);
}
extern "C" void hemisph... | code for sm_80
Function : _Z17hemisphere_kernelP6float3j
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "hemisphere_implement.h"
#include "brdf_common.h"
__global__ void
hemisphere_kernel(float3* pos, unsigned width)
{
unsigned int x = blockIdx.x*blockDim.x + threadIdx.x;
unsigned int y = blockIdx.y*blockDim.y + threadIdx.y;
float3 pin = pos[y*width+x];
pos[y*width+x] = normalize(pin);
}
extern "C" void hemisph... | .file "tmpxft_000c2392_00000000-6_hemisphere.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2041:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %r... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "hemisphere_implement.h"
#include "brdf_common.h"
__global__ void
hemisphere_kernel(float3* pos, unsigned width)
{
unsigned int x = blockIdx.x*blockDim.x + threadIdx.x;
unsigned int y = blockIdx.y*blockDim.y + threadIdx.y;
float3 pin = pos[y*width+x];
pos[y*width+x] = normalize(pin);
}
extern "C" void hemisph... | #include <hip/hip_runtime.h>
#include "hemisphere_implement.h"
#include "brdf_common.h"
__global__ void
hemisphere_kernel(float3* pos, unsigned width)
{
unsigned int x = blockIdx.x*blockDim.x + threadIdx.x;
unsigned int y = blockIdx.y*blockDim.y + threadIdx.y;
float3 pin = pos[y*width+x];
pos[y*width+x] = normalize(pi... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "hemisphere_implement.h"
#include "brdf_common.h"
__global__ void
hemisphere_kernel(float3* pos, unsigned width)
{
unsigned int x = blockIdx.x*blockDim.x + threadIdx.x;
unsigned int y = blockIdx.y*blockDim.y + threadIdx.y;
float3 pin = pos[y*width+x];
pos[y*width+x] = normalize(pi... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z17hemisphere_kernelP15HIP_vector_typeIfLj3EEj
.globl _Z17hemisphere_kernelP15HIP_vector_typeIfLj3EEj
.p2align 8
.type _Z17hemisphere_kernelP15HIP_vector_typeIfLj3EEj,@function
_Z17hemisphere_kernelP15HIP_vector_typeIfLj3EEj:
s_clause 0x1
s_load_b32 s2, s[... |
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