system stringclasses 7
values | input stringlengths 10 94.5k | output stringlengths 14 55.5k |
|---|---|---|
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0008f1cb_00000000-6_CUDA_Add2Numbers.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq ... | .text
.file "CUDA_Add2Numbers.hip"
.globl _Z18__device_stub__addPiS_S_ # -- Begin function _Z18__device_stub__addPiS_S_
.p2align 4, 0x90
.type _Z18__device_stub__addPiS_S_,@function
_Z18__device_stub__addPiS_S_: # @_Z18__device_stub__addPiS_S_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <assert.h>
#include <time.h>
#include <cuda.h>
#define BLOCK_LOW(id,p,n) ((id)*(n)/(p))l;
#define BLOCK_HIGH(id,p,n) (BLOCK_LOW((id)+1,p,n)-1);
#define BLOCK_SIZE(id,p,n) (BLOCK_LOW((id)+1,p,n)-BLOCK_LOW(id,p,n));
#define BLOCK_OWNER(index,p,n) (((p)*((index)+1)-1)/(n));
int inputvalues[8] =... | code for sm_80
Function : _Z5seivePii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R7, SR_TID.X ; /* 0x0000000000077919 */
/* 0x000e220000002100 ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <assert.h>
#include <time.h>
#include <cuda.h>
#define BLOCK_LOW(id,p,n) ((id)*(n)/(p))l;
#define BLOCK_HIGH(id,p,n) (BLOCK_LOW((id)+1,p,n)-1);
#define BLOCK_SIZE(id,p,n) (BLOCK_LOW((id)+1,p,n)-BLOCK_LOW(id,p,n));
#define BLOCK_OWNER(index,p,n) (((p)*((index)+1)-1)/(n));
int inputvalues[8] =... | .file "tmpxft_0001e84e_00000000-6_prime_number.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, ... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <assert.h>
#include <time.h>
#include <cuda.h>
#define BLOCK_LOW(id,p,n) ((id)*(n)/(p))l;
#define BLOCK_HIGH(id,p,n) (BLOCK_LOW((id)+1,p,n)-1);
#define BLOCK_SIZE(id,p,n) (BLOCK_LOW((id)+1,p,n)-BLOCK_LOW(id,p,n));
#define BLOCK_OWNER(index,p,n) (((p)*((index)+1)-1)/(n));
int inputvalues[8] =... | #include <stdio.h>
#include <assert.h>
#include <time.h>
#include <hip/hip_runtime.h>
#define BLOCK_LOW(id,p,n) ((id)*(n)/(p))l;
#define BLOCK_HIGH(id,p,n) (BLOCK_LOW((id)+1,p,n)-1);
#define BLOCK_SIZE(id,p,n) (BLOCK_LOW((id)+1,p,n)-BLOCK_LOW(id,p,n));
#define BLOCK_OWNER(index,p,n) (((p)*((index)+1)-1)/(n));
int input... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <stdio.h>
#include <assert.h>
#include <time.h>
#include <hip/hip_runtime.h>
#define BLOCK_LOW(id,p,n) ((id)*(n)/(p))l;
#define BLOCK_HIGH(id,p,n) (BLOCK_LOW((id)+1,p,n)-1);
#define BLOCK_SIZE(id,p,n) (BLOCK_LOW((id)+1,p,n)-BLOCK_LOW(id,p,n));
#define BLOCK_OWNER(index,p,n) (((p)*((index)+1)-1)/(n));
int input... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z5seivePii
.globl _Z5seivePii
.p2align 8
.type _Z5seivePii,@function
_Z5seivePii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x1c
s_load_b64 s[2:3], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_delay_alu insti... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <stdio.h>
#include <assert.h>
#include <time.h>
#include <hip/hip_runtime.h>
#define BLOCK_LOW(id,p,n) ((id)*(n)/(p))l;
#define BLOCK_HIGH(id,p,n) (BLOCK_LOW((id)+1,p,n)-1);
#define BLOCK_SIZE(id,p,n) (BLOCK_LOW((id)+1,p,n)-BLOCK_LOW(id,p,n));
#define BLOCK_OWNER(index,p,n) (((p)*((index)+1)-1)/(n));
int input... | .text
.file "prime_number.hip"
.globl _Z20__device_stub__seivePii # -- Begin function _Z20__device_stub__seivePii
.p2align 4, 0x90
.type _Z20__device_stub__seivePii,@function
_Z20__device_stub__seivePii: # @_Z20__device_stub__seivePii
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rd... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z5seivePii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R7, SR_TID.X ; /* 0x0000000000077919 */
/* 0x000e220000002100 ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z5seivePii
.globl _Z5seivePii
.p2align 8
.type _Z5seivePii,@function
_Z5seivePii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x1c
s_load_b64 s[2:3], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_delay_alu insti... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0001e84e_00000000-6_prime_number.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, ... | .text
.file "prime_number.hip"
.globl _Z20__device_stub__seivePii # -- Begin function _Z20__device_stub__seivePii
.p2align 4, 0x90
.type _Z20__device_stub__seivePii,@function
_Z20__device_stub__seivePii: # @_Z20__device_stub__seivePii
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rd... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "probe.cuh"
Probe::Probe(ProbeConfig cfg)
: chan_indices_(cfg.n_active()),
site_labels(cfg.n_active()),
chan_grps(cfg.n_active()),
x_coords(cfg.n_active()),
y_coords(cfg.n_active()),
is_active_(cfg.n_total),
site_dists(cfg.n_active()) {
n_total_ = cfg.n_total;
if (n_total_ < cfg.n_active()) {
throw std::domain... | code for sm_80
Function : _ZN3cub17CUB_200700_800_NS11EmptyKernelIvEEvv
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea000380... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "probe.cuh"
Probe::Probe(ProbeConfig cfg)
: chan_indices_(cfg.n_active()),
site_labels(cfg.n_active()),
chan_grps(cfg.n_active()),
x_coords(cfg.n_active()),
y_coords(cfg.n_active()),
is_active_(cfg.n_total),
site_dists(cfg.n_active()) {
n_total_ = cfg.n_total;
if (n_total_ < cfg.n_active()) {
throw std::domain... | #include <hip/hip_runtime.h>
#include "probe.cuh"
Probe::Probe(ProbeConfig cfg)
: chan_indices_(cfg.n_active()),
site_labels(cfg.n_active()),
chan_grps(cfg.n_active()),
x_coords(cfg.n_active()),
y_coords(cfg.n_active()),
is_active_(cfg.n_total),
site_dists(cfg.n_active()) {
n_total_ = cfg.n_total;
if (n_total_ < cfg.n_... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "probe.cuh"
Probe::Probe(ProbeConfig cfg)
: chan_indices_(cfg.n_active()),
site_labels(cfg.n_active()),
chan_grps(cfg.n_active()),
x_coords(cfg.n_active()),
y_coords(cfg.n_active()),
is_active_(cfg.n_total),
site_dists(cfg.n_active()) {
n_total_ = cfg.n_total;
if (n_total_ < cfg.n_... | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _ZN3cub17CUB_200700_800_NS11EmptyKernelIvEEvv
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea000380... | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void compute_min_gpu(float *device_input, float *device_output){
extern __shared__ float sm[];
int tid = threadIdx.x;
int i = blockIdx.x * blockDim.x + threadIdx.x;
sm[tid] = device_input[i];
__syncthreads();
for(int s = 1;s < blockDim.x; s*= 2){
if(tid % (2 * s) == 0){
sm[tid] = min(sm... | code for sm_80
Function : _Z15compute_min_gpuPfS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void compute_min_gpu(float *device_input, float *device_output){
extern __shared__ float sm[];
int tid = threadIdx.x;
int i = blockIdx.x * blockDim.x + threadIdx.x;
sm[tid] = device_input[i];
__syncthreads();
for(int s = 1;s < blockDim.x; s*= 2){
if(tid % (2 * s) == 0){
sm[tid] = min(sm... | .file "tmpxft_000744a1_00000000-6_compute_min_gpu.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void compute_min_gpu(float *device_input, float *device_output){
extern __shared__ float sm[];
int tid = threadIdx.x;
int i = blockIdx.x * blockDim.x + threadIdx.x;
sm[tid] = device_input[i];
__syncthreads();
for(int s = 1;s < blockDim.x; s*= 2){
if(tid % (2 * s) == 0){
sm[tid] = min(sm... | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void compute_min_gpu(float *device_input, float *device_output){
extern __shared__ float sm[];
int tid = threadIdx.x;
int i = blockIdx.x * blockDim.x + threadIdx.x;
sm[tid] = device_input[i];
__syncthreads();
for(int s = 1;s < blockDim.x; s*= 2){
if(tid % (2... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void compute_min_gpu(float *device_input, float *device_output){
extern __shared__ float sm[];
int tid = threadIdx.x;
int i = blockIdx.x * blockDim.x + threadIdx.x;
sm[tid] = device_input[i];
__syncthreads();
for(int s = 1;s < blockDim.x; s*= 2){
if(tid % (2... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z15compute_min_gpuPfS_
.globl _Z15compute_min_gpuPfS_
.p2align 8
.type _Z15compute_min_gpuPfS_,@function
_Z15compute_min_gpuPfS_:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x1c
s_load_b64 s[4:5], s[0:1], 0x0
s_mov_b32 s2, s15
s_waitcnt lgkmcnt(0)
... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void compute_min_gpu(float *device_input, float *device_output){
extern __shared__ float sm[];
int tid = threadIdx.x;
int i = blockIdx.x * blockDim.x + threadIdx.x;
sm[tid] = device_input[i];
__syncthreads();
for(int s = 1;s < blockDim.x; s*= 2){
if(tid % (2... | .text
.file "compute_min_gpu.hip"
.globl _Z30__device_stub__compute_min_gpuPfS_ # -- Begin function _Z30__device_stub__compute_min_gpuPfS_
.p2align 4, 0x90
.type _Z30__device_stub__compute_min_gpuPfS_,@function
_Z30__device_stub__compute_min_gpuPfS_: # @_Z30__device_stub__compute_min_gpuPfS_
.cfi_startproc
# %bb.0:
sub... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z15compute_min_gpuPfS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z15compute_min_gpuPfS_
.globl _Z15compute_min_gpuPfS_
.p2align 8
.type _Z15compute_min_gpuPfS_,@function
_Z15compute_min_gpuPfS_:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x1c
s_load_b64 s[4:5], s[0:1], 0x0
s_mov_b32 s2, s15
s_waitcnt lgkmcnt(0)
... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000744a1_00000000-6_compute_min_gpu.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $... | .text
.file "compute_min_gpu.hip"
.globl _Z30__device_stub__compute_min_gpuPfS_ # -- Begin function _Z30__device_stub__compute_min_gpuPfS_
.p2align 4, 0x90
.type _Z30__device_stub__compute_min_gpuPfS_,@function
_Z30__device_stub__compute_min_gpuPfS_: # @_Z30__device_stub__compute_min_gpuPfS_
.cfi_startproc
# %bb.0:
sub... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void matrixMulCUDA2(float *C, float *A, float *B, int n) { int row = blockIdx.y * blockDim.y + threadIdx.y; int col = blockIdx.x * blockDim.x + threadIdx.x; float C_val = 0; for (int k = 0; k < n; ++k) { float A_elem = A[row * n + k]; float B_elem = B[k * n + col]; C_val += A_elem * B_e... | code for sm_80
Function : _Z14matrixMulCUDA2PfS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R4, SR_CTAID.Y ; /* 0x0000000000047919 */
/* 0x000e220000002600 *... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void matrixMulCUDA2(float *C, float *A, float *B, int n) { int row = blockIdx.y * blockDim.y + threadIdx.y; int col = blockIdx.x * blockDim.x + threadIdx.x; float C_val = 0; for (int k = 0; k < n; ++k) { float A_elem = A[row * n + k]; float B_elem = B[k * n + col]; C_val += A_elem * B_e... | .file "tmpxft_00112dd3_00000000-6_matrixMulCUDA2.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void matrixMulCUDA2(float *C, float *A, float *B, int n) { int row = blockIdx.y * blockDim.y + threadIdx.y; int col = blockIdx.x * blockDim.x + threadIdx.x; float C_val = 0; for (int k = 0; k < n; ++k) { float A_elem = A[row * n + k]; float B_elem = B[k * n + col]; C_val += A_elem * B_e... | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void matrixMulCUDA2(float *C, float *A, float *B, int n) { int row = blockIdx.y * blockDim.y + threadIdx.y; int col = blockIdx.x * blockDim.x + threadIdx.x; float C_val = 0; for (int k = 0; k < n; ++k) { float A_elem = A[row * n + k]; float B_elem = B[k * n ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void matrixMulCUDA2(float *C, float *A, float *B, int n) { int row = blockIdx.y * blockDim.y + threadIdx.y; int col = blockIdx.x * blockDim.x + threadIdx.x; float C_val = 0; for (int k = 0; k < n; ++k) { float A_elem = A[row * n + k]; float B_elem = B[k * n ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z14matrixMulCUDA2PfS_S_i
.globl _Z14matrixMulCUDA2PfS_S_i
.p2align 8
.type _Z14matrixMulCUDA2PfS_S_i,@function
_Z14matrixMulCUDA2PfS_S_i:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x2c
s_load_b32 s2, s[0:1], 0x18
v_bfe_u32 v2, v0, 10, 10
v_and_b32_e... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void matrixMulCUDA2(float *C, float *A, float *B, int n) { int row = blockIdx.y * blockDim.y + threadIdx.y; int col = blockIdx.x * blockDim.x + threadIdx.x; float C_val = 0; for (int k = 0; k < n; ++k) { float A_elem = A[row * n + k]; float B_elem = B[k * n ... | .text
.file "matrixMulCUDA2.hip"
.globl _Z29__device_stub__matrixMulCUDA2PfS_S_i # -- Begin function _Z29__device_stub__matrixMulCUDA2PfS_S_i
.p2align 4, 0x90
.type _Z29__device_stub__matrixMulCUDA2PfS_S_i,@function
_Z29__device_stub__matrixMulCUDA2PfS_S_i: # @_Z29__device_stub__matrixMulCUDA2PfS_S_i
.cfi_startproc
# %... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z14matrixMulCUDA2PfS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R4, SR_CTAID.Y ; /* 0x0000000000047919 */
/* 0x000e220000002600 *... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z14matrixMulCUDA2PfS_S_i
.globl _Z14matrixMulCUDA2PfS_S_i
.p2align 8
.type _Z14matrixMulCUDA2PfS_S_i,@function
_Z14matrixMulCUDA2PfS_S_i:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x2c
s_load_b32 s2, s[0:1], 0x18
v_bfe_u32 v2, v0, 10, 10
v_and_b32_e... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00112dd3_00000000-6_matrixMulCUDA2.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8... | .text
.file "matrixMulCUDA2.hip"
.globl _Z29__device_stub__matrixMulCUDA2PfS_S_i # -- Begin function _Z29__device_stub__matrixMulCUDA2PfS_S_i
.p2align 4, 0x90
.type _Z29__device_stub__matrixMulCUDA2PfS_S_i,@function
_Z29__device_stub__matrixMulCUDA2PfS_S_i: # @_Z29__device_stub__matrixMulCUDA2PfS_S_i
.cfi_startproc
# %... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <iostream>
using namespace std;
#define TPB 256
#define ARRAY_SIZE 10
#define N (ARRAY_SIZE/TPB + 1)
__global__ void saxpy(float *x, float *y, const float a)
{
const int i = blockIdx.x*blockDim.x + threadIdx.x;
if (i<ARRAY_SIZE) {
y[i] = a*x[i] + y[i];
}
}
int main()
{
float *x, *y, *d_x, *d... | code for sm_80
Function : _Z5saxpyPfS_f
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R4, SR_CTAID.X ; /* 0x0000000000047919 */
/* 0x000e280000002500 */
/*0020*/ S... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <iostream>
using namespace std;
#define TPB 256
#define ARRAY_SIZE 10
#define N (ARRAY_SIZE/TPB + 1)
__global__ void saxpy(float *x, float *y, const float a)
{
const int i = blockIdx.x*blockDim.x + threadIdx.x;
if (i<ARRAY_SIZE) {
y[i] = a*x[i] + y[i];
}
}
int main()
{
float *x, *y, *d_x, *d... | .file "tmpxft_00115fbd_00000000-6_exercise_2.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cud... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <iostream>
using namespace std;
#define TPB 256
#define ARRAY_SIZE 10
#define N (ARRAY_SIZE/TPB + 1)
__global__ void saxpy(float *x, float *y, const float a)
{
const int i = blockIdx.x*blockDim.x + threadIdx.x;
if (i<ARRAY_SIZE) {
y[i] = a*x[i] + y[i];
}
}
int main()
{
float *x, *y, *d_x, *d... | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <iostream>
using namespace std;
#define TPB 256
#define ARRAY_SIZE 10
#define N (ARRAY_SIZE/TPB + 1)
__global__ void saxpy(float *x, float *y, const float a)
{
const int i = blockIdx.x*blockDim.x + threadIdx.x;
if (i<ARRAY_SIZE) {
y[i] = a*x[i] + y[i];
}
}
int ma... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <iostream>
using namespace std;
#define TPB 256
#define ARRAY_SIZE 10
#define N (ARRAY_SIZE/TPB + 1)
__global__ void saxpy(float *x, float *y, const float a)
{
const int i = blockIdx.x*blockDim.x + threadIdx.x;
if (i<ARRAY_SIZE) {
y[i] = a*x[i] + y[i];
}
}
int ma... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z5saxpyPfS_f
.globl _Z5saxpyPfS_f
.p2align 8
.type _Z5saxpyPfS_f,@function
_Z5saxpyPfS_f:
s_load_b32 s2, s[0:1], 0x24
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | in... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <iostream>
using namespace std;
#define TPB 256
#define ARRAY_SIZE 10
#define N (ARRAY_SIZE/TPB + 1)
__global__ void saxpy(float *x, float *y, const float a)
{
const int i = blockIdx.x*blockDim.x + threadIdx.x;
if (i<ARRAY_SIZE) {
y[i] = a*x[i] + y[i];
}
}
int ma... | .text
.file "exercise_2.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z20__device_stub__saxpyPfS_f # -- Begin function _Z20__device_stub__saxpyPfS_f
.p2align 4, 0x... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z5saxpyPfS_f
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R4, SR_CTAID.X ; /* 0x0000000000047919 */
/* 0x000e280000002500 */
/*0020*/ S... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z5saxpyPfS_f
.globl _Z5saxpyPfS_f
.p2align 8
.type _Z5saxpyPfS_f,@function
_Z5saxpyPfS_f:
s_load_b32 s2, s[0:1], 0x24
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | in... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00115fbd_00000000-6_exercise_2.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cud... | .text
.file "exercise_2.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z20__device_stub__saxpyPfS_f # -- Begin function _Z20__device_stub__saxpyPfS_f
.p2align 4, 0x... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | //
// Created by Peter Rigole on 2019-05-24.
//
#include "Timer.cuh"
Timer::Timer() : beg_(clock_::now()) {}
void Timer::reset() { beg_ = clock_::now(); }
double Timer::elapsed() const {
return std::chrono::duration_cast<second_> (clock_::now() - beg_).count();
} | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | //
// Created by Peter Rigole on 2019-05-24.
//
#include "Timer.cuh"
Timer::Timer() : beg_(clock_::now()) {}
void Timer::reset() { beg_ = clock_::now(); }
double Timer::elapsed() const {
return std::chrono::duration_cast<second_> (clock_::now() - beg_).count();
} | .file "tmpxft_00178e8c_00000000-6_Timer.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3776:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnre... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | //
// Created by Peter Rigole on 2019-05-24.
//
#include "Timer.cuh"
Timer::Timer() : beg_(clock_::now()) {}
void Timer::reset() { beg_ = clock_::now(); }
double Timer::elapsed() const {
return std::chrono::duration_cast<second_> (clock_::now() - beg_).count();
} | //
// Created by Peter Rigole on 2019-05-24.
//
#ifndef AXONBITS_TIMER_H
#define AXONBITS_TIMER_H
#include <iostream>
#include <chrono>
// See: https://gist.github.com/gongzhitaao/7062087
class Timer {
public:
Timer();
void reset();
double elapsed() const;
private:
typedef std::chrono::high_resolution_clock clock_;
typ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | //
// Created by Peter Rigole on 2019-05-24.
//
#ifndef AXONBITS_TIMER_H
#define AXONBITS_TIMER_H
#include <iostream>
#include <chrono>
// See: https://gist.github.com/gongzhitaao/7062087
class Timer {
public:
Timer();
void reset();
double elapsed() const;
private:
typedef std::chrono::high_resolution_clock clock_;
typ... | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | //
// Created by Peter Rigole on 2019-05-24.
//
#ifndef AXONBITS_TIMER_H
#define AXONBITS_TIMER_H
#include <iostream>
#include <chrono>
// See: https://gist.github.com/gongzhitaao/7062087
class Timer {
public:
Timer();
void reset();
double elapsed() const;
private:
typedef std::chrono::high_resolution_clock clock_;
typ... | .text
.file "Timer.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 ... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00178e8c_00000000-6_Timer.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3776:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnre... | .text
.file "Timer.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | /*
@Author: 3sne ( Mukur Panchani )
@FileName: q2StringReverse.cu
@Task: CUDA program that the reverses given string.
*/
#include <cuda_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
__global__ void reverse(char *str, char *rev, int len) {
int tid = threadIdx.x;
rev[len - tid - 1] = str[tid];
}
... | code for sm_80
Function : _Z7reversePcS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e220000002... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /*
@Author: 3sne ( Mukur Panchani )
@FileName: q2StringReverse.cu
@Task: CUDA program that the reverses given string.
*/
#include <cuda_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
__global__ void reverse(char *str, char *rev, int len) {
int tid = threadIdx.x;
rev[len - tid - 1] = str[tid];
}
... | .file "tmpxft_00084825_00000000-6_q2StringReverse.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /*
@Author: 3sne ( Mukur Panchani )
@FileName: q2StringReverse.cu
@Task: CUDA program that the reverses given string.
*/
#include <cuda_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
__global__ void reverse(char *str, char *rev, int len) {
int tid = threadIdx.x;
rev[len - tid - 1] = str[tid];
}
... | /*
@Author: 3sne ( Mukur Panchani )
@FileName: q2StringReverse.cu
@Task: CUDA program that the reverses given string.
*/
#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
__global__ void reverse(char *str, char *rev, int len) {
int tid = threadIdx.x;
rev[len - tid - 1] = str[tid];... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | /*
@Author: 3sne ( Mukur Panchani )
@FileName: q2StringReverse.cu
@Task: CUDA program that the reverses given string.
*/
#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
__global__ void reverse(char *str, char *rev, int len) {
int tid = threadIdx.x;
rev[len - tid - 1] = str[tid];... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z7reversePcS_i
.globl _Z7reversePcS_i
.p2align 8
.type _Z7reversePcS_i,@function
_Z7reversePcS_i:
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b32 s0, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
global_load_u8 v2, v0, s[4:5]
v_x... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | /*
@Author: 3sne ( Mukur Panchani )
@FileName: q2StringReverse.cu
@Task: CUDA program that the reverses given string.
*/
#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
__global__ void reverse(char *str, char *rev, int len) {
int tid = threadIdx.x;
rev[len - tid - 1] = str[tid];... | .text
.file "q2StringReverse.hip"
.globl _Z22__device_stub__reversePcS_i # -- Begin function _Z22__device_stub__reversePcS_i
.p2align 4, 0x90
.type _Z22__device_stub__reversePcS_i,@function
_Z22__device_stub__reversePcS_i: # @_Z22__device_stub__reversePcS_i
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_of... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z7reversePcS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e220000002... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z7reversePcS_i
.globl _Z7reversePcS_i
.p2align 8
.type _Z7reversePcS_i,@function
_Z7reversePcS_i:
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b32 s0, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
global_load_u8 v2, v0, s[4:5]
v_x... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00084825_00000000-6_q2StringReverse.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $... | .text
.file "q2StringReverse.hip"
.globl _Z22__device_stub__reversePcS_i # -- Begin function _Z22__device_stub__reversePcS_i
.p2align 4, 0x90
.type _Z22__device_stub__reversePcS_i,@function
_Z22__device_stub__reversePcS_i: # @_Z22__device_stub__reversePcS_i
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_of... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <sys/time.h>
#include <cuda.h>
#include <cfloat>
//VERSION 0.8 MODIFIED 10/25/16 12:34 by Jack
// The number of threads per blocks in the kernel
// (if we define it here, then we can use its value in the kernel,
// for example to statically declare an array in shared memory)
const int thread... | code for sm_80
Function : _Z17vector_max_kernelPfS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R2, SR_TID.X ; /* 0x0000000000027919 */
/* 0x00... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <sys/time.h>
#include <cuda.h>
#include <cfloat>
//VERSION 0.8 MODIFIED 10/25/16 12:34 by Jack
// The number of threads per blocks in the kernel
// (if we define it here, then we can use its value in the kernel,
// for example to statically declare an array in shared memory)
const int thread... | .file "tmpxft_000f1e5b_00000000-6_vector_max.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2069:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %r... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <sys/time.h>
#include <cuda.h>
#include <cfloat>
//VERSION 0.8 MODIFIED 10/25/16 12:34 by Jack
// The number of threads per blocks in the kernel
// (if we define it here, then we can use its value in the kernel,
// for example to statically declare an array in shared memory)
const int thread... | #include <stdio.h>
#include <sys/time.h>
#include <hip/hip_runtime.h>
#include <cfloat>
//VERSION 0.8 MODIFIED 10/25/16 12:34 by Jack
// The number of threads per blocks in the kernel
// (if we define it here, then we can use its value in the kernel,
// for example to statically declare an array in shared memory)
const... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <stdio.h>
#include <sys/time.h>
#include <hip/hip_runtime.h>
#include <cfloat>
//VERSION 0.8 MODIFIED 10/25/16 12:34 by Jack
// The number of threads per blocks in the kernel
// (if we define it here, then we can use its value in the kernel,
// for example to statically declare an array in shared memory)
const... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z17vector_max_kernelPfS_i
.globl _Z17vector_max_kernelPfS_i
.p2align 8
.type _Z17vector_max_kernelPfS_i,@function
_Z17vector_max_kernelPfS_i:
s_mov_b32 s2, exec_lo
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB0_6
s_clause 0x2
s_load_b32 s2, s[0:... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <stdio.h>
#include <sys/time.h>
#include <hip/hip_runtime.h>
#include <cfloat>
//VERSION 0.8 MODIFIED 10/25/16 12:34 by Jack
// The number of threads per blocks in the kernel
// (if we define it here, then we can use its value in the kernel,
// for example to statically declare an array in shared memory)
const... | .text
.file "vector_max.hip"
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function main
.LCPI0_0:
.long 0x49742400 # float 1.0E+6
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %b... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z17vector_max_kernelPfS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R2, SR_TID.X ; /* 0x0000000000027919 */
/* 0x00... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z17vector_max_kernelPfS_i
.globl _Z17vector_max_kernelPfS_i
.p2align 8
.type _Z17vector_max_kernelPfS_i,@function
_Z17vector_max_kernelPfS_i:
s_mov_b32 s2, exec_lo
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB0_6
s_clause 0x2
s_load_b32 s2, s[0:... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000f1e5b_00000000-6_vector_max.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2069:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %r... | .text
.file "vector_max.hip"
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function main
.LCPI0_0:
.long 0x49742400 # float 1.0E+6
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %b... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /* This program is designed to take the first
derivative of a 3 dimensional function */
// includes, system
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <math.h>
#include <complex.h>
// includes, project
#include <cuda_runtime.h>
#include <device_launch_parameters.h>
#include <cufft.h>
#include <... | .file "tmpxft_001b2173_00000000-6_cuFFT_Test_3D.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4001:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8,... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /* This program is designed to take the first
derivative of a 3 dimensional function */
// includes, system
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <math.h>
#include <complex.h>
// includes, project
#include <cuda_runtime.h>
#include <device_launch_parameters.h>
#include <cufft.h>
#include <... | /* This program is designed to take the first
derivative of a 3 dimensional function */
// includes, system
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <math.h>
#include <complex.h>
// includes, project
#include <hip/hip_runtime.h>
#include <hipfft/hipfft.h>
#include <hip/hip_complex.h>
#define ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | /* This program is designed to take the first
derivative of a 3 dimensional function */
// includes, system
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <math.h>
#include <complex.h>
// includes, project
#include <hip/hip_runtime.h>
#include <hipfft/hipfft.h>
#include <hip/hip_complex.h>
#define ... | .text
.file "cuFFT_Test_3D.hip"
.globl _Z5divUpii # -- Begin function _Z5divUpii
.p2align 4, 0x90
.type _Z5divUpii,@function
_Z5divUpii: # @_Z5divUpii
.cfi_startproc
# %bb.0:
# kill: def $esi killed $esi def $rsi
... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001b2173_00000000-6_cuFFT_Test_3D.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4001:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8,... | .text
.file "cuFFT_Test_3D.hip"
.globl _Z5divUpii # -- Begin function _Z5divUpii
.p2align 4, 0x90
.type _Z5divUpii,@function
_Z5divUpii: # @_Z5divUpii
.cfi_startproc
# %bb.0:
# kill: def $esi killed $esi def $rsi
... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdlib.h>
#include <stdio.h>
#include <math.h>
#include <sys/time.h>
#define NSTREAMS 2
__host__ void init(float *out, int sz)
{
for(int i = 0 ; i < sz ; i++)
{
out[i] = sin(float(i));
}
}
__host__ void verif(float *out, int sz)
{
float err = 0.;
for(int i = 0 ; i < sz ; i++)
{
err += abs(out[i] - exp( - abs(... | code for sm_80
Function : _Z8MyKernelPfS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0020*... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdlib.h>
#include <stdio.h>
#include <math.h>
#include <sys/time.h>
#define NSTREAMS 2
__host__ void init(float *out, int sz)
{
for(int i = 0 ; i < sz ; i++)
{
out[i] = sin(float(i));
}
}
__host__ void verif(float *out, int sz)
{
float err = 0.;
for(int i = 0 ; i < sz ; i++)
{
err += abs(out[i] - exp( - abs(... | .file "tmpxft_00134b30_00000000-6_stream_ex1_onekernel_gettimeofday.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2062:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFa... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdlib.h>
#include <stdio.h>
#include <math.h>
#include <sys/time.h>
#define NSTREAMS 2
__host__ void init(float *out, int sz)
{
for(int i = 0 ; i < sz ; i++)
{
out[i] = sin(float(i));
}
}
__host__ void verif(float *out, int sz)
{
float err = 0.;
for(int i = 0 ; i < sz ; i++)
{
err += abs(out[i] - exp( - abs(... | #include <hip/hip_runtime.h>
#include <stdlib.h>
#include <stdio.h>
#include <math.h>
#include <sys/time.h>
#define NSTREAMS 2
__host__ void init(float *out, int sz)
{
for(int i = 0 ; i < sz ; i++)
{
out[i] = sin(float(i));
}
}
__host__ void verif(float *out, int sz)
{
float err = 0.;
for(int i = 0 ; i < sz ; i++)
{
er... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdlib.h>
#include <stdio.h>
#include <math.h>
#include <sys/time.h>
#define NSTREAMS 2
__host__ void init(float *out, int sz)
{
for(int i = 0 ; i < sz ; i++)
{
out[i] = sin(float(i));
}
}
__host__ void verif(float *out, int sz)
{
float err = 0.;
for(int i = 0 ; i < sz ; i++)
{
er... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z8MyKernelPfS_i
.globl _Z8MyKernelPfS_i
.p2align 8
.type _Z8MyKernelPfS_i,@function
_Z8MyKernelPfS_i:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s8, s[0:1], 0x10
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkm... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdlib.h>
#include <stdio.h>
#include <math.h>
#include <sys/time.h>
#define NSTREAMS 2
__host__ void init(float *out, int sz)
{
for(int i = 0 ; i < sz ; i++)
{
out[i] = sin(float(i));
}
}
__host__ void verif(float *out, int sz)
{
float err = 0.;
for(int i = 0 ; i < sz ; i++)
{
er... | .text
.file "stream_ex1_onekernel_gettimeofday.hip"
.globl _Z4initPfi # -- Begin function _Z4initPfi
.p2align 4, 0x90
.type _Z4initPfi,@function
_Z4initPfi: # @_Z4initPfi
.cfi_startproc
# %bb.0:
testl %esi, %esi
jle .LBB0_4
# %bb.1: # %.lr.... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z8MyKernelPfS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0020*... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z8MyKernelPfS_i
.globl _Z8MyKernelPfS_i
.p2align 8
.type _Z8MyKernelPfS_i,@function
_Z8MyKernelPfS_i:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s8, s[0:1], 0x10
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkm... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00134b30_00000000-6_stream_ex1_onekernel_gettimeofday.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2062:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFa... | .text
.file "stream_ex1_onekernel_gettimeofday.hip"
.globl _Z4initPfi # -- Begin function _Z4initPfi
.p2align 4, 0x90
.type _Z4initPfi,@function
_Z4initPfi: # @_Z4initPfi
.cfi_startproc
# %bb.0:
testl %esi, %esi
jle .LBB0_4
# %bb.1: # %.lr.... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
// create an image buffer. return host ptr, pass out device pointer through pointer to pointer
__global__ void resultant(unsigned char *a, unsigned char *b, unsigned char *c)
{
int idx = (blockIdx.x * blockDim.x) + threadIdx.x;
float opposite_side = float(a[idx]);
float adjacent_side = float(b[idx... | code for sm_80
Function : _Z9resultantPhS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e2200... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
// create an image buffer. return host ptr, pass out device pointer through pointer to pointer
__global__ void resultant(unsigned char *a, unsigned char *b, unsigned char *c)
{
int idx = (blockIdx.x * blockDim.x) + threadIdx.x;
float opposite_side = float(a[idx]);
float adjacent_side = float(b[idx... | .file "tmpxft_00183d3f_00000000-6_resultant.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rs... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
// create an image buffer. return host ptr, pass out device pointer through pointer to pointer
__global__ void resultant(unsigned char *a, unsigned char *b, unsigned char *c)
{
int idx = (blockIdx.x * blockDim.x) + threadIdx.x;
float opposite_side = float(a[idx]);
float adjacent_side = float(b[idx... | #include <hip/hip_runtime.h>
#include "includes.h"
// create an image buffer. return host ptr, pass out device pointer through pointer to pointer
__global__ void resultant(unsigned char *a, unsigned char *b, unsigned char *c)
{
int idx = (blockIdx.x * blockDim.x) + threadIdx.x;
float opposite_side = float(a[idx]);
floa... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
// create an image buffer. return host ptr, pass out device pointer through pointer to pointer
__global__ void resultant(unsigned char *a, unsigned char *b, unsigned char *c)
{
int idx = (blockIdx.x * blockDim.x) + threadIdx.x;
float opposite_side = float(a[idx]);
floa... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9resultantPhS_S_
.globl _Z9resultantPhS_S_
.p2align 8
.type _Z9resultantPhS_S_,@function
_Z9resultantPhS_S_:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
// create an image buffer. return host ptr, pass out device pointer through pointer to pointer
__global__ void resultant(unsigned char *a, unsigned char *b, unsigned char *c)
{
int idx = (blockIdx.x * blockDim.x) + threadIdx.x;
float opposite_side = float(a[idx]);
floa... | .text
.file "resultant.hip"
.globl _Z24__device_stub__resultantPhS_S_ # -- Begin function _Z24__device_stub__resultantPhS_S_
.p2align 4, 0x90
.type _Z24__device_stub__resultantPhS_S_,@function
_Z24__device_stub__resultantPhS_S_: # @_Z24__device_stub__resultantPhS_S_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z9resultantPhS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e2200... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9resultantPhS_S_
.globl _Z9resultantPhS_S_
.p2align 8
.type _Z9resultantPhS_S_,@function
_Z9resultantPhS_S_:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00183d3f_00000000-6_resultant.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rs... | .text
.file "resultant.hip"
.globl _Z24__device_stub__resultantPhS_S_ # -- Begin function _Z24__device_stub__resultantPhS_S_
.p2align 4, 0x90
.type _Z24__device_stub__resultantPhS_S_,@function
_Z24__device_stub__resultantPhS_S_: # @_Z24__device_stub__resultantPhS_S_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void kernel_getRotMatL(double* devRotm, double* devnR, int nR)
{
extern __shared__ double matS[];
double *mat, *res;
mat = matS + threadIdx.x * 18;
res = mat + 9;
mat[0] = 0; mat[4] = 0; mat[8] = 0;
mat[5] = devnR[threadIdx.x * 4 + 1];
mat[6] = devnR[threadIdx.x * 4 + 2];
mat[1] = devnR... | code for sm_80
Function : _Z17kernel_getRotMatLPdS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e220000002100 */... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void kernel_getRotMatL(double* devRotm, double* devnR, int nR)
{
extern __shared__ double matS[];
double *mat, *res;
mat = matS + threadIdx.x * 18;
res = mat + 9;
mat[0] = 0; mat[4] = 0; mat[8] = 0;
mat[5] = devnR[threadIdx.x * 4 + 1];
mat[6] = devnR[threadIdx.x * 4 + 2];
mat[1] = devnR... | .file "tmpxft_000bb7fd_00000000-6_kernel_getRotMatL.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void kernel_getRotMatL(double* devRotm, double* devnR, int nR)
{
extern __shared__ double matS[];
double *mat, *res;
mat = matS + threadIdx.x * 18;
res = mat + 9;
mat[0] = 0; mat[4] = 0; mat[8] = 0;
mat[5] = devnR[threadIdx.x * 4 + 1];
mat[6] = devnR[threadIdx.x * 4 + 2];
mat[1] = devnR... | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void kernel_getRotMatL(double* devRotm, double* devnR, int nR)
{
extern __shared__ double matS[];
double *mat, *res;
mat = matS + threadIdx.x * 18;
res = mat + 9;
mat[0] = 0; mat[4] = 0; mat[8] = 0;
mat[5] = devnR[threadIdx.x * 4 + 1];
mat[6] = devnR[threadI... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void kernel_getRotMatL(double* devRotm, double* devnR, int nR)
{
extern __shared__ double matS[];
double *mat, *res;
mat = matS + threadIdx.x * 18;
res = mat + 9;
mat[0] = 0; mat[4] = 0; mat[8] = 0;
mat[5] = devnR[threadIdx.x * 4 + 1];
mat[6] = devnR[threadI... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z17kernel_getRotMatLPdS_i
.globl _Z17kernel_getRotMatLPdS_i
.p2align 8
.type _Z17kernel_getRotMatLPdS_i,@function
_Z17kernel_getRotMatLPdS_i:
s_load_b64 s[2:3], s[0:1], 0x8
s_mov_b32 s4, 0
v_lshlrev_b32_e32 v6, 2, v0
s_mov_b32 s5, s4
v_lshlrev_... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void kernel_getRotMatL(double* devRotm, double* devnR, int nR)
{
extern __shared__ double matS[];
double *mat, *res;
mat = matS + threadIdx.x * 18;
res = mat + 9;
mat[0] = 0; mat[4] = 0; mat[8] = 0;
mat[5] = devnR[threadIdx.x * 4 + 1];
mat[6] = devnR[threadI... | .text
.file "kernel_getRotMatL.hip"
.globl _Z32__device_stub__kernel_getRotMatLPdS_i # -- Begin function _Z32__device_stub__kernel_getRotMatLPdS_i
.p2align 4, 0x90
.type _Z32__device_stub__kernel_getRotMatLPdS_i,@function
_Z32__device_stub__kernel_getRotMatLPdS_i: # @_Z32__device_stub__kernel_getRotMatLPdS_i
.cfi_start... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z17kernel_getRotMatLPdS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e220000002100 */... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z17kernel_getRotMatLPdS_i
.globl _Z17kernel_getRotMatLPdS_i
.p2align 8
.type _Z17kernel_getRotMatLPdS_i,@function
_Z17kernel_getRotMatLPdS_i:
s_load_b64 s[2:3], s[0:1], 0x8
s_mov_b32 s4, 0
v_lshlrev_b32_e32 v6, 2, v0
s_mov_b32 s5, s4
v_lshlrev_... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000bb7fd_00000000-6_kernel_getRotMatL.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq... | .text
.file "kernel_getRotMatL.hip"
.globl _Z32__device_stub__kernel_getRotMatLPdS_i # -- Begin function _Z32__device_stub__kernel_getRotMatLPdS_i
.p2align 4, 0x90
.type _Z32__device_stub__kernel_getRotMatLPdS_i,@function
_Z32__device_stub__kernel_getRotMatLPdS_i: # @_Z32__device_stub__kernel_getRotMatLPdS_i
.cfi_start... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
using namespace std;
struct pixel //to store RGB values
{
unsigned char r;
unsigned char g;
unsigned char b;
};
__device__ pixel padding(pixel* Pixel_val, int x_coord, int y_coord, int img_width, int img_height)
{ pixel Px;
Px.r=0; Px.g=0; Px.b=0;
if(x_coord< img_width && y_coord <img_height && x_... | code for sm_80
Function : _Z15horizontal_convP5pixelS0_iiPfi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R10, SR_CTAID.Y ; /* 0x00000000000a7919... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
using namespace std;
struct pixel //to store RGB values
{
unsigned char r;
unsigned char g;
unsigned char b;
};
__device__ pixel padding(pixel* Pixel_val, int x_coord, int y_coord, int img_width, int img_height)
{ pixel Px;
Px.r=0; Px.g=0; Px.b=0;
if(x_coord< img_width && y_coord <img_height && x_... | .file "tmpxft_000c9664_00000000-6_horizontal_conv.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
using namespace std;
struct pixel //to store RGB values
{
unsigned char r;
unsigned char g;
unsigned char b;
};
__device__ pixel padding(pixel* Pixel_val, int x_coord, int y_coord, int img_width, int img_height)
{ pixel Px;
Px.r=0; Px.g=0; Px.b=0;
if(x_coord< img_width && y_coord <img_height && x_... | #include <hip/hip_runtime.h>
#include "includes.h"
using namespace std;
struct pixel //to store RGB values
{
unsigned char r;
unsigned char g;
unsigned char b;
};
__device__ pixel padding(pixel* Pixel_val, int x_coord, int y_coord, int img_width, int img_height)
{ pixel Px;
Px.r=0; Px.g=0; Px.b=0;
if(x_coord< img_width... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
using namespace std;
struct pixel //to store RGB values
{
unsigned char r;
unsigned char g;
unsigned char b;
};
__device__ pixel padding(pixel* Pixel_val, int x_coord, int y_coord, int img_width, int img_height)
{ pixel Px;
Px.r=0; Px.g=0; Px.b=0;
if(x_coord< img_width... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z15horizontal_convP5pixelS0_iiPfi
.globl _Z15horizontal_convP5pixelS0_iiPfi
.p2align 8
.type _Z15horizontal_convP5pixelS0_iiPfi,@function
_Z15horizontal_convP5pixelS0_iiPfi:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x34
s_load_b64 s[4:5], s[0:1], 0x10
v_bfe... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
using namespace std;
struct pixel //to store RGB values
{
unsigned char r;
unsigned char g;
unsigned char b;
};
__device__ pixel padding(pixel* Pixel_val, int x_coord, int y_coord, int img_width, int img_height)
{ pixel Px;
Px.r=0; Px.g=0; Px.b=0;
if(x_coord< img_width... | .text
.file "horizontal_conv.hip"
.globl _Z30__device_stub__horizontal_convP5pixelS0_iiPfi # -- Begin function _Z30__device_stub__horizontal_convP5pixelS0_iiPfi
.p2align 4, 0x90
.type _Z30__device_stub__horizontal_convP5pixelS0_iiPfi,@function
_Z30__device_stub__horizontal_convP5pixelS0_iiPfi: # @_Z30__device_stub__hor... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z15horizontal_convP5pixelS0_iiPfi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R10, SR_CTAID.Y ; /* 0x00000000000a7919... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z15horizontal_convP5pixelS0_iiPfi
.globl _Z15horizontal_convP5pixelS0_iiPfi
.p2align 8
.type _Z15horizontal_convP5pixelS0_iiPfi,@function
_Z15horizontal_convP5pixelS0_iiPfi:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x34
s_load_b64 s[4:5], s[0:1], 0x10
v_bfe... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000c9664_00000000-6_horizontal_conv.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $... | .text
.file "horizontal_conv.hip"
.globl _Z30__device_stub__horizontal_convP5pixelS0_iiPfi # -- Begin function _Z30__device_stub__horizontal_convP5pixelS0_iiPfi
.p2align 4, 0x90
.type _Z30__device_stub__horizontal_convP5pixelS0_iiPfi,@function
_Z30__device_stub__horizontal_convP5pixelS0_iiPfi: # @_Z30__device_stub__hor... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /*
22/12/2019
hmhuan-1612858
nnkhai-1612909
*/
#include <stdio.h>
#include <stdint.h>
#include <thrust/device_vector.h>
#include <thrust/copy.h>
#include <thrust/sort.h>
#define CHECK(call) \
{ \
const cudaError_t error = call; \
if (error != cudaSuccess) \
{ \
fprintf(stderr, "Error: %s:%d, ", __FILE__, __LINE__); \
f... | /*
22/12/2019
hmhuan-1612858
nnkhai-1612909
*/
#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdint.h>
#include <thrust/device_vector.h>
#include <thrust/copy.h>
#include <thrust/sort.h>
#define CHECK(call) \
{ \
const hipError_t error = call; \
if (error != hipSuccess) \
{ \
fprintf(stderr, "Error: %s:%d, ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void reverse_colors_kernel(int num_rows, int max_color, int *row_colors)
{
int row_id = blockIdx.x * blockDim.x + threadIdx.x;
for ( ; row_id < num_rows ; row_id += blockDim.x * gridDim.x )
{
int color = row_colors[row_id];
if (color > 0)
{
//1 -> max_color
//max_color -> 1
color = max_... | code for sm_80
Function : _Z21reverse_colors_kerneliiPi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/*... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void reverse_colors_kernel(int num_rows, int max_color, int *row_colors)
{
int row_id = blockIdx.x * blockDim.x + threadIdx.x;
for ( ; row_id < num_rows ; row_id += blockDim.x * gridDim.x )
{
int color = row_colors[row_id];
if (color > 0)
{
//1 -> max_color
//max_color -> 1
color = max_... | .file "tmpxft_0010e61b_00000000-6_reverse_colors_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void reverse_colors_kernel(int num_rows, int max_color, int *row_colors)
{
int row_id = blockIdx.x * blockDim.x + threadIdx.x;
for ( ; row_id < num_rows ; row_id += blockDim.x * gridDim.x )
{
int color = row_colors[row_id];
if (color > 0)
{
//1 -> max_color
//max_color -> 1
color = max_... | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void reverse_colors_kernel(int num_rows, int max_color, int *row_colors)
{
int row_id = blockIdx.x * blockDim.x + threadIdx.x;
for ( ; row_id < num_rows ; row_id += blockDim.x * gridDim.x )
{
int color = row_colors[row_id];
if (color > 0)
{
//1 -> max_color
... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void reverse_colors_kernel(int num_rows, int max_color, int *row_colors)
{
int row_id = blockIdx.x * blockDim.x + threadIdx.x;
for ( ; row_id < num_rows ; row_id += blockDim.x * gridDim.x )
{
int color = row_colors[row_id];
if (color > 0)
{
//1 -> max_color
... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z21reverse_colors_kerneliiPi
.globl _Z21reverse_colors_kerneliiPi
.p2align 8
.type _Z21reverse_colors_kerneliiPi,@function
_Z21reverse_colors_kerneliiPi:
s_clause 0x1
s_load_b32 s5, s[0:1], 0x1c
s_load_b32 s4, s[0:1], 0x0
s_add_u32 s2, s0, 16
s_ad... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void reverse_colors_kernel(int num_rows, int max_color, int *row_colors)
{
int row_id = blockIdx.x * blockDim.x + threadIdx.x;
for ( ; row_id < num_rows ; row_id += blockDim.x * gridDim.x )
{
int color = row_colors[row_id];
if (color > 0)
{
//1 -> max_color
... | .text
.file "reverse_colors_kernel.hip"
.globl _Z36__device_stub__reverse_colors_kerneliiPi # -- Begin function _Z36__device_stub__reverse_colors_kerneliiPi
.p2align 4, 0x90
.type _Z36__device_stub__reverse_colors_kerneliiPi,@function
_Z36__device_stub__reverse_colors_kerneliiPi: # @_Z36__device_stub__reverse_colors_ke... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z21reverse_colors_kerneliiPi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/*... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z21reverse_colors_kerneliiPi
.globl _Z21reverse_colors_kerneliiPi
.p2align 8
.type _Z21reverse_colors_kerneliiPi,@function
_Z21reverse_colors_kerneliiPi:
s_clause 0x1
s_load_b32 s5, s[0:1], 0x1c
s_load_b32 s4, s[0:1], 0x0
s_add_u32 s2, s0, 16
s_ad... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0010e61b_00000000-6_reverse_colors_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
... | .text
.file "reverse_colors_kernel.hip"
.globl _Z36__device_stub__reverse_colors_kerneliiPi # -- Begin function _Z36__device_stub__reverse_colors_kerneliiPi
.p2align 4, 0x90
.type _Z36__device_stub__reverse_colors_kerneliiPi,@function
_Z36__device_stub__reverse_colors_kerneliiPi: # @_Z36__device_stub__reverse_colors_ke... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | // Copyright (c) OpenMMLab. All rights reserved.
#include <cstdint>
namespace mmdeploy {
namespace operation {
namespace cuda {
template <typename T>
__global__ void transpose(const T* src, int height, int width, int channels, int src_width_stride,
T* dst, int dst_channel_stride) {
auto x = blockIdx.x * blockDim.x + th... | code for sm_80
Function : _ZN8mmdeploy9operation4cuda9transposeIfEEvPKT_iiiiPS3_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R19, SR_CTAID.Y ; /* 0x000000000013... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | // Copyright (c) OpenMMLab. All rights reserved.
#include <cstdint>
namespace mmdeploy {
namespace operation {
namespace cuda {
template <typename T>
__global__ void transpose(const T* src, int height, int width, int channels, int src_width_stride,
T* dst, int dst_channel_stride) {
auto x = blockIdx.x * blockDim.x + th... | .file "tmpxft_000c4f4e_00000000-6_transpose.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL69__device_stub__ZN8mmdeploy9operation4cuda9transposeIhEEvPKT_iiiiPS3_iPKhiiiiPhi, @function
_ZL69__device_stub__ZN8mmdeploy9operation4cuda9transposeIhEEvPKT_iiiiPS3_iPKhiiiiPhi:
.LFB2054:
.cfi_startproc
subq $168, %rsp
.cfi_def_cfa_of... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | // Copyright (c) OpenMMLab. All rights reserved.
#include <cstdint>
namespace mmdeploy {
namespace operation {
namespace cuda {
template <typename T>
__global__ void transpose(const T* src, int height, int width, int channels, int src_width_stride,
T* dst, int dst_channel_stride) {
auto x = blockIdx.x * blockDim.x + th... | // Copyright (c) OpenMMLab. All rights reserved.
#include <hip/hip_runtime.h>
#include <cstdint>
namespace mmdeploy {
namespace operation {
namespace cuda {
template <typename T>
__global__ void transpose(const T* src, int height, int width, int channels, int src_width_stride,
T* dst, int dst_channel_stride) {
auto x =... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | // Copyright (c) OpenMMLab. All rights reserved.
#include <hip/hip_runtime.h>
#include <cstdint>
namespace mmdeploy {
namespace operation {
namespace cuda {
template <typename T>
__global__ void transpose(const T* src, int height, int width, int channels, int src_width_stride,
T* dst, int dst_channel_stride) {
auto x =... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.section .text._ZN8mmdeploy9operation4cuda9transposeIhEEvPKT_iiiiPS3_i,"axG",@progbits,_ZN8mmdeploy9operation4cuda9transposeIhEEvPKT_iiiiPS3_i,comdat
.protected _ZN8mmdeploy9operation4cuda9transposeIhEEvPKT_iiiiPS3_i
.globl _ZN8mmdeploy9operation4cuda9transposeIhEEvPKT... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | // Copyright (c) OpenMMLab. All rights reserved.
#include <hip/hip_runtime.h>
#include <cstdint>
namespace mmdeploy {
namespace operation {
namespace cuda {
template <typename T>
__global__ void transpose(const T* src, int height, int width, int channels, int src_width_stride,
T* dst, int dst_channel_stride) {
auto x =... | .text
.file "transpose.hip"
.section .text._ZN8mmdeploy9operation4cuda9TransposeIhEEvPKT_iiiPS3_P12ihipStream_t,"axG",@progbits,_ZN8mmdeploy9operation4cuda9TransposeIhEEvPKT_iiiPS3_P12ihipStream_t,comdat
.weak _ZN8mmdeploy9operation4cuda9TransposeIhEEvPKT_iiiPS3_P12ihipStream_t # -- Begin function _ZN8mmdeploy9operatio... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _ZN8mmdeploy9operation4cuda9transposeIfEEvPKT_iiiiPS3_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R19, SR_CTAID.Y ; /* 0x000000000013... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.section .text._ZN8mmdeploy9operation4cuda9transposeIhEEvPKT_iiiiPS3_i,"axG",@progbits,_ZN8mmdeploy9operation4cuda9transposeIhEEvPKT_iiiiPS3_i,comdat
.protected _ZN8mmdeploy9operation4cuda9transposeIhEEvPKT_iiiiPS3_i
.globl _ZN8mmdeploy9operation4cuda9transposeIhEEvPKT... |
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