system stringclasses 7
values | input stringlengths 10 94.5k | output stringlengths 14 55.5k |
|---|---|---|
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <chrono>
#include <iostream>
//Kernel definition
template<typename T>
__global__
void copyKernel (T* out,
T* in,
const unsigned int N)
{
const unsigned int id = threadIdx.x + blockIdx.x * blockDim.x;
for (unsigned int i= id; i < N; i = i + blockDim.x * gridDim.x)
{
const unsigned el_id = i;
((T*) out)[el_id] =... | #include <hip/hip_runtime.h>
#include <chrono>
#include <iostream>
//Kernel definition
template<typename T>
__global__
void copyKernel (T* out,
T* in,
const unsigned int N)
{
const unsigned int id = threadIdx.x + blockIdx.x * blockDim.x;
for (unsigned int i= id; i < N; i = i + blockDim.x * gridDim.x)
{
const unsigned e... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <chrono>
#include <iostream>
//Kernel definition
template<typename T>
__global__
void copyKernel (T* out,
T* in,
const unsigned int N)
{
const unsigned int id = threadIdx.x + blockIdx.x * blockDim.x;
for (unsigned int i= id; i < N; i = i + blockDim.x * gridDim.x)
{
const unsigned e... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.section .text._Z10plusKernelIiEvPT_S1_j,"axG",@progbits,_Z10plusKernelIiEvPT_S1_j,comdat
.protected _Z10plusKernelIiEvPT_S1_j
.globl _Z10plusKernelIiEvPT_S1_j
.p2align 8
.type _Z10plusKernelIiEvPT_S1_j,@function
_Z10plusKernelIiEvPT_S1_j:
s_clause 0x1
s_... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <chrono>
#include <iostream>
//Kernel definition
template<typename T>
__global__
void copyKernel (T* out,
T* in,
const unsigned int N)
{
const unsigned int id = threadIdx.x + blockIdx.x * blockDim.x;
for (unsigned int i= id; i < N; i = i + blockDim.x * gridDim.x)
{
const unsigned e... | .text
.file "pagelockedinon.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z10copyKernelIiEvPT_S1_j
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 *... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.section .text._Z10plusKernelIiEvPT_S1_j,"axG",@progbits,_Z10plusKernelIiEvPT_S1_j,comdat
.protected _Z10plusKernelIiEvPT_S1_j
.globl _Z10plusKernelIiEvPT_S1_j
.p2align 8
.type _Z10plusKernelIiEvPT_S1_j,@function
_Z10plusKernelIiEvPT_S1_j:
s_clause 0x1
s_... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0012744d_00000000-6_pagelockedinon.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL39__device_stub__Z10plusKernelIiEvPT_S1_jPiS_j, @function
_ZL39__device_stub__Z10plusKernelIiEvPT_S1_jPiS_j:
.LFB3800:
.cfi_startproc
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
... | .text
.file "pagelockedinon.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | //pass
//--blockDim=[64,1] --gridDim=[64,1]
#include <cuda.h>
#define BIN_COUNT 64
////////////////////////////////////////////////////////////////////////////////
// GPU-specific definitions
////////////////////////////////////////////////////////////////////////////////
//Fast mul on G8x / G9x / G100
#define IMUL(a, ... | code for sm_80
Function : _Z22mergeHistogram64KernelPjS_j
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/*... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | //pass
//--blockDim=[64,1] --gridDim=[64,1]
#include <cuda.h>
#define BIN_COUNT 64
////////////////////////////////////////////////////////////////////////////////
// GPU-specific definitions
////////////////////////////////////////////////////////////////////////////////
//Fast mul on G8x / G9x / G100
#define IMUL(a, ... | .file "tmpxft_00090210_00000000-6_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | //pass
//--blockDim=[64,1] --gridDim=[64,1]
#include <cuda.h>
#define BIN_COUNT 64
////////////////////////////////////////////////////////////////////////////////
// GPU-specific definitions
////////////////////////////////////////////////////////////////////////////////
//Fast mul on G8x / G9x / G100
#define IMUL(a, ... | //pass
//--blockDim=[64,1] --gridDim=[64,1]
#include <hip/hip_runtime.h>
#define BIN_COUNT 64
////////////////////////////////////////////////////////////////////////////////
// GPU-specific definitions
////////////////////////////////////////////////////////////////////////////////
//Fast mul on G8x / G9x / G100
#defi... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | //pass
//--blockDim=[64,1] --gridDim=[64,1]
#include <hip/hip_runtime.h>
#define BIN_COUNT 64
////////////////////////////////////////////////////////////////////////////////
// GPU-specific definitions
////////////////////////////////////////////////////////////////////////////////
//Fast mul on G8x / G9x / G100
#defi... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z22mergeHistogram64KernelPjS_j
.globl _Z22mergeHistogram64KernelPjS_j
.p2align 8
.type _Z22mergeHistogram64KernelPjS_j,@function
_Z22mergeHistogram64KernelPjS_j:
s_load_b32 s6, s[0:1], 0x10
v_mov_b32_e32 v3, 0
s_mov_b32 s2, s15
s_mov_b32 s3, exec_lo... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | //pass
//--blockDim=[64,1] --gridDim=[64,1]
#include <hip/hip_runtime.h>
#define BIN_COUNT 64
////////////////////////////////////////////////////////////////////////////////
// GPU-specific definitions
////////////////////////////////////////////////////////////////////////////////
//Fast mul on G8x / G9x / G100
#defi... | .text
.file "kernel.hip"
.globl _Z37__device_stub__mergeHistogram64KernelPjS_j # -- Begin function _Z37__device_stub__mergeHistogram64KernelPjS_j
.p2align 4, 0x90
.type _Z37__device_stub__mergeHistogram64KernelPjS_j,@function
_Z37__device_stub__mergeHistogram64KernelPjS_j: # @_Z37__device_stub__mergeHistogram64KernelPj... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z22mergeHistogram64KernelPjS_j
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/*... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z22mergeHistogram64KernelPjS_j
.globl _Z22mergeHistogram64KernelPjS_j
.p2align 8
.type _Z22mergeHistogram64KernelPjS_j,@function
_Z22mergeHistogram64KernelPjS_j:
s_load_b32 s6, s[0:1], 0x10
v_mov_b32_e32 v3, 0
s_mov_b32 s2, s15
s_mov_b32 s3, exec_lo... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00090210_00000000-6_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... | .text
.file "kernel.hip"
.globl _Z37__device_stub__mergeHistogram64KernelPjS_j # -- Begin function _Z37__device_stub__mergeHistogram64KernelPjS_j
.p2align 4, 0x90
.type _Z37__device_stub__mergeHistogram64KernelPjS_j,@function
_Z37__device_stub__mergeHistogram64KernelPjS_j: # @_Z37__device_stub__mergeHistogram64KernelPj... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <iostream>
#include <math.h>
#include<cstdio>
#define THDIM 256
// Kernel function to add the elements of two arrays
__global__
void add(int n, float *x, float *y, float *z)
{
int index = blockIdx.x;
int stride = blockDim.x;
while (index<n) {
z[index] = x[index] + y[index];
index+=stride;
}
}
__global__
void s... | code for sm_80
Function : _Z3sumiPfS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R7, SR_CTAID.X ; /* 0x0000000000077919 */
/* 0x000e22000000250... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <iostream>
#include <math.h>
#include<cstdio>
#define THDIM 256
// Kernel function to add the elements of two arrays
__global__
void add(int n, float *x, float *y, float *z)
{
int index = blockIdx.x;
int stride = blockDim.x;
while (index<n) {
z[index] = x[index] + y[index];
index+=stride;
}
}
__global__
void s... | .file "tmpxft_00091535_00000000-6_learn.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnre... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <iostream>
#include <math.h>
#include<cstdio>
#define THDIM 256
// Kernel function to add the elements of two arrays
__global__
void add(int n, float *x, float *y, float *z)
{
int index = blockIdx.x;
int stride = blockDim.x;
while (index<n) {
z[index] = x[index] + y[index];
index+=stride;
}
}
__global__
void s... | #include <hip/hip_runtime.h>
#include <iostream>
#include <math.h>
#include<cstdio>
#define THDIM 256
// Kernel function to add the elements of two arrays
__global__
void add(int n, float *x, float *y, float *z)
{
int index = blockIdx.x;
int stride = blockDim.x;
while (index<n) {
z[index] = x[index] + y[index];
index+=... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <math.h>
#include<cstdio>
#define THDIM 256
// Kernel function to add the elements of two arrays
__global__
void add(int n, float *x, float *y, float *z)
{
int index = blockIdx.x;
int stride = blockDim.x;
while (index<n) {
z[index] = x[index] + y[index];
index+=... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3addiPfS_S_
.globl _Z3addiPfS_S_
.p2align 8
.type _Z3addiPfS_S_,@function
_Z3addiPfS_S_:
s_load_b32 s10, s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_cmp_ge_i32 s15, s10
s_cbranch_scc1 .LBB0_3
s_clause 0x2
s_load_b32 s8, s[0:1], 0... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <math.h>
#include<cstdio>
#define THDIM 256
// Kernel function to add the elements of two arrays
__global__
void add(int n, float *x, float *y, float *z)
{
int index = blockIdx.x;
int stride = blockDim.x;
while (index<n) {
z[index] = x[index] + y[index];
index+=... | .text
.file "learn.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z18__device_stub__addiPfS_S_ # -- Begin function _Z18__device_stub__addiPfS_S_
.p2align 4, 0x90
.t... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z3sumiPfS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R7, SR_CTAID.X ; /* 0x0000000000077919 */
/* 0x000e22000000250... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3addiPfS_S_
.globl _Z3addiPfS_S_
.p2align 8
.type _Z3addiPfS_S_,@function
_Z3addiPfS_S_:
s_load_b32 s10, s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_cmp_ge_i32 s15, s10
s_cbranch_scc1 .LBB0_3
s_clause 0x2
s_load_b32 s8, s[0:1], 0... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00091535_00000000-6_learn.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnre... | .text
.file "learn.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z18__device_stub__addiPfS_S_ # -- Begin function _Z18__device_stub__addiPfS_S_
.p2align 4, 0x90
.t... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <cuda.h>
#include <curand_kernel.h>
#include <math_constants.h>
extern "C"
{
__global__ void
rtruncnorm_kernel(
float *x,
int n,
float *mu,
float *sigma,
float *lo,
float *hi,
int maxtries,
int rngnum) //number of the random seed
{
int accepted;
float sample;
int nu... | .file "tmpxft_0009f8aa_00000000-6_rtruncnorm.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2273:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %r... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#include <cuda.h>
#include <curand_kernel.h>
#include <math_constants.h>
extern "C"
{
__global__ void
rtruncnorm_kernel(
float *x,
int n,
float *mu,
float *sigma,
float *lo,
float *hi,
int maxtries,
int rngnum) //number of the random seed
{
int accepted;
float sample;
int nu... | #include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <hiprand/hiprand_kernel.h>
#include <hip/hip_math_constants.h>
extern "C"
{
__global__ void
rtruncnorm_kernel(
float *x,
int n,
float *mu,
float *sigma,
float *lo,
float *hi,
int maxtries,
int rngnum) //number of the random seed
{
int ac... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <hiprand/hiprand_kernel.h>
#include <hip/hip_math_constants.h>
extern "C"
{
__global__ void
rtruncnorm_kernel(
float *x,
int n,
float *mu,
float *sigma,
float *lo,
float *hi,
int maxtries,
int rngnum) //number of the random seed
{
int ac... | .text
.file "rtruncnorm.hip"
.globl __device_stub__rtruncnorm_kernel # -- Begin function __device_stub__rtruncnorm_kernel
.p2align 4, 0x90
.type __device_stub__rtruncnorm_kernel,@function
__device_stub__rtruncnorm_kernel: # @__device_stub__rtruncnorm_kernel
.cfi_startproc
# %bb.0:
subq $168, %rsp
.cfi_def_cfa_off... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0009f8aa_00000000-6_rtruncnorm.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2273:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %r... | .text
.file "rtruncnorm.hip"
.globl __device_stub__rtruncnorm_kernel # -- Begin function __device_stub__rtruncnorm_kernel
.p2align 4, 0x90
.type __device_stub__rtruncnorm_kernel,@function
__device_stub__rtruncnorm_kernel: # @__device_stub__rtruncnorm_kernel
.cfi_startproc
# %bb.0:
subq $168, %rsp
.cfi_def_cfa_off... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | /*
Write a CUDA program that includes a host function to compute the minimum value in a N dimensional square matrix, N being 16.
*/
// Author: Naoki Atkins
#include <stdio.h>
#include <cuda.h>
#include <time.h>
#include <stdlib.h>
#include <limits.h>
#define N 16
__host__ int generator(int rank){
int rand_num;
srand(ti... | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /*
Write a CUDA program that includes a host function to compute the minimum value in a N dimensional square matrix, N being 16.
*/
// Author: Naoki Atkins
#include <stdio.h>
#include <cuda.h>
#include <time.h>
#include <stdlib.h>
#include <limits.h>
#define N 16
__host__ int generator(int rank){
int rand_num;
srand(ti... | .file "tmpxft_0004d1ea_00000000-6_prob1.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2062:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.c... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /*
Write a CUDA program that includes a host function to compute the minimum value in a N dimensional square matrix, N being 16.
*/
// Author: Naoki Atkins
#include <stdio.h>
#include <cuda.h>
#include <time.h>
#include <stdlib.h>
#include <limits.h>
#define N 16
__host__ int generator(int rank){
int rand_num;
srand(ti... | /*
Write a CUDA program that includes a host function to compute the minimum value in a N dimensional square matrix, N being 16.
*/
// Author: Naoki Atkins
#include <stdio.h>
#include <hip/hip_runtime.h>
#include <time.h>
#include <stdlib.h>
#include <limits.h>
#define N 16
__host__ int generator(int rank){
int rand_nu... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | /*
Write a CUDA program that includes a host function to compute the minimum value in a N dimensional square matrix, N being 16.
*/
// Author: Naoki Atkins
#include <stdio.h>
#include <hip/hip_runtime.h>
#include <time.h>
#include <stdlib.h>
#include <limits.h>
#define N 16
__host__ int generator(int rank){
int rand_nu... | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | /*
Write a CUDA program that includes a host function to compute the minimum value in a N dimensional square matrix, N being 16.
*/
// Author: Naoki Atkins
#include <stdio.h>
#include <hip/hip_runtime.h>
#include <time.h>
#include <stdlib.h>
#include <limits.h>
#define N 16
__host__ int generator(int rank){
int rand_nu... | .text
.file "prob1.hip"
.globl _Z9generatori # -- Begin function _Z9generatori
.p2align 4, 0x90
.type _Z9generatori,@function
_Z9generatori: # @_Z9generatori
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset %rbx, -16
movl %edi, %ebx
xorl %edi, %edi
callq t... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0004d1ea_00000000-6_prob1.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2062:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.c... | .text
.file "prob1.hip"
.globl _Z9generatori # -- Begin function _Z9generatori
.p2align 4, 0x90
.type _Z9generatori,@function
_Z9generatori: # @_Z9generatori
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset %rbx, -16
movl %edi, %ebx
xorl %edi, %edi
callq t... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | /***************************************************************************
**************************************************************************
Spherical Harmonic Transform Kit 2.7
Copyright 1997-2003 Sean Moore, Dennis Healy,
Dan Rockmore, Peter Kostelec
Copyright 2004 Peter Kostelec, Dan Rockmore
This file ... | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /***************************************************************************
**************************************************************************
Spherical Harmonic Transform Kit 2.7
Copyright 1997-2003 Sean Moore, Dennis Healy,
Dan Rockmore, Peter Kostelec
Copyright 2004 Peter Kostelec, Dan Rockmore
This file ... | .file "tmpxft_00035271_00000000-6_CUOURperms.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %r... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /***************************************************************************
**************************************************************************
Spherical Harmonic Transform Kit 2.7
Copyright 1997-2003 Sean Moore, Dennis Healy,
Dan Rockmore, Peter Kostelec
Copyright 2004 Peter Kostelec, Dan Rockmore
This file ... | #include <hip/hip_runtime.h>
/***************************************************************************
**************************************************************************
Spherical Harmonic Transform Kit 2.7
Copyright 1997-2003 Sean Moore, Dennis Healy,
Dan Rockmore, Peter Kostelec
Copyright 2004 Peter Kost... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
/***************************************************************************
**************************************************************************
Spherical Harmonic Transform Kit 2.7
Copyright 1997-2003 Sean Moore, Dennis Healy,
Dan Rockmore, Peter Kostelec
Copyright 2004 Peter Kost... | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.protected OUR4
.type OUR4,@object
.data
.globl OUR4
.p2align 4, 0x0
OUR4:
.long 0
.long 3
.long 2
.long 1
.size OUR4, 16
... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
/***************************************************************************
**************************************************************************
Spherical Harmonic Transform Kit 2.7
Copyright 1997-2003 Sean Moore, Dennis Healy,
Dan Rockmore, Peter Kostelec
Copyright 2004 Peter Kost... | .text
.file "CUOURperms.hip"
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jn... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.protected OUR4
.type OUR4,@object
.data
.globl OUR4
.p2align 4, 0x0
OUR4:
.long 0
.long 3
.long 2
.long 1
.size OUR4, 16
... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00035271_00000000-6_CUOURperms.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %r... | .text
.file "CUOURperms.hip"
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset %rbx, -16
cmpq $0, __hip_gpubin_handle(%rip)
jn... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
// Copyright (c) 2020, Michael Kunz. All rights reserved.
// https://github.com/kunzmi/ImageStackAlignator
//
// This file is part of ImageStackAlignator.
//
// ImageStackAlignator is free software: you can redistribute it and/or modify
// it under the terms of the GNU Lesser General Public Licens... | .file "tmpxft_000ea176_00000000-6_ComputeKernelParam.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
add... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
// Copyright (c) 2020, Michael Kunz. All rights reserved.
// https://github.com/kunzmi/ImageStackAlignator
//
// This file is part of ImageStackAlignator.
//
// ImageStackAlignator is free software: you can redistribute it and/or modify
// it under the terms of the GNU Lesser General Public Licens... | #include <hip/hip_runtime.h>
#include "includes.h"
// Copyright (c) 2020, Michael Kunz. All rights reserved.
// https://github.com/kunzmi/ImageStackAlignator
//
// This file is part of ImageStackAlignator.
//
// ImageStackAlignator is free software: you can redistribute it and/or modify
// it under the terms of the GNU... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
// Copyright (c) 2020, Michael Kunz. All rights reserved.
// https://github.com/kunzmi/ImageStackAlignator
//
// This file is part of ImageStackAlignator.
//
// ImageStackAlignator is free software: you can redistribute it and/or modify
// it under the terms of the GNU... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected ComputeKernelParam
.globl ComputeKernelParam
.p2align 8
.type ComputeKernelParam,@function
ComputeKernelParam:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x3c
s_load_b64 s[2:3], s[0:1], 0x8
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10,... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
// Copyright (c) 2020, Michael Kunz. All rights reserved.
// https://github.com/kunzmi/ImageStackAlignator
//
// This file is part of ImageStackAlignator.
//
// ImageStackAlignator is free software: you can redistribute it and/or modify
// it under the terms of the GNU... | .text
.file "ComputeKernelParam.hip"
.globl __device_stub__ComputeKernelParam # -- Begin function __device_stub__ComputeKernelParam
.p2align 4, 0x90
.type __device_stub__ComputeKernelParam,@function
__device_stub__ComputeKernelParam: # @__device_stub__ComputeKernelParam
.cfi_startproc
# %bb.0:
subq $184, %rsp
.cfi... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000ea176_00000000-6_ComputeKernelParam.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
add... | .text
.file "ComputeKernelParam.hip"
.globl __device_stub__ComputeKernelParam # -- Begin function __device_stub__ComputeKernelParam
.p2align 4, 0x90
.type __device_stub__ComputeKernelParam,@function
__device_stub__ComputeKernelParam: # @__device_stub__ComputeKernelParam
.cfi_startproc
# %bb.0:
subq $184, %rsp
.cfi... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <math.h>
#define THREADS 256
#define MINARG 2
#define HANDLE_ERROR( err ) (HandleError( err, __FILE__, __LINE__ ))
static void HandleError( cudaError_t err, const char *file, int line ) {
if (err != cudaSuccess) {
printf( "%s in %s at line %d\n", cudaGetErrorString( err ),file, line );
exit(... | code for sm_80
Function : _Z18eliminateMultiplesPiiS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x170] ; /* 0x000... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <math.h>
#define THREADS 256
#define MINARG 2
#define HANDLE_ERROR( err ) (HandleError( err, __FILE__, __LINE__ ))
static void HandleError( cudaError_t err, const char *file, int line ) {
if (err != cudaSuccess) {
printf( "%s in %s at line %d\n", cudaGetErrorString( err ),file, line );
exit(... | .file "tmpxft_000a6c84_00000000-6_eratostenePr_single_block.cudafe1.cpp"
.text
#APP
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%s in %s at line %d\n"
#NO_APP
.text
.type _ZL11HandleError9cudaErrorPKci, @function
_ZL11HandleError9cudaErrorPKci:
.LFB2057:
.cfi_startproc
testl %edi, %edi
jne .L6
ret
.L6:
pus... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <math.h>
#define THREADS 256
#define MINARG 2
#define HANDLE_ERROR( err ) (HandleError( err, __FILE__, __LINE__ ))
static void HandleError( cudaError_t err, const char *file, int line ) {
if (err != cudaSuccess) {
printf( "%s in %s at line %d\n", cudaGetErrorString( err ),file, line );
exit(... | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <math.h>
#define THREADS 256
#define MINARG 2
#define HANDLE_ERROR( err ) (HandleError( err, __FILE__, __LINE__ ))
static void HandleError( hipError_t err, const char *file, int line ) {
if (err != hipSuccess) {
printf( "%s in %s at line %d\n", hipGetErrorString(... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <math.h>
#define THREADS 256
#define MINARG 2
#define HANDLE_ERROR( err ) (HandleError( err, __FILE__, __LINE__ ))
static void HandleError( hipError_t err, const char *file, int line ) {
if (err != hipSuccess) {
printf( "%s in %s at line %d\n", hipGetErrorString(... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z18eliminateMultiplesPiiS_i
.globl _Z18eliminateMultiplesPiiS_i
.p2align 8
.type _Z18eliminateMultiplesPiiS_i,@function
_Z18eliminateMultiplesPiiS_i:
s_clause 0x3
s_load_b64 s[4:5], s[0:1], 0x0
s_load_b32 s3, s[0:1], 0x8
s_load_b64 s[6:7], s[0:1]... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <math.h>
#define THREADS 256
#define MINARG 2
#define HANDLE_ERROR( err ) (HandleError( err, __FILE__, __LINE__ ))
static void HandleError( hipError_t err, const char *file, int line ) {
if (err != hipSuccess) {
printf( "%s in %s at line %d\n", hipGetErrorString(... | .text
.file "eratostenePr_single_block.hip"
.globl _Z10startTimerPP11ihipEvent_tS1_ # -- Begin function _Z10startTimerPP11ihipEvent_tS1_
.p2align 4, 0x90
.type _Z10startTimerPP11ihipEvent_tS1_,@function
_Z10startTimerPP11ihipEvent_tS1_: # @_Z10startTimerPP11ihipEvent_tS1_
.cfi_startproc
# %bb.0:
pushq %r14
.cfi_d... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z18eliminateMultiplesPiiS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x170] ; /* 0x000... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z18eliminateMultiplesPiiS_i
.globl _Z18eliminateMultiplesPiiS_i
.p2align 8
.type _Z18eliminateMultiplesPiiS_i,@function
_Z18eliminateMultiplesPiiS_i:
s_clause 0x3
s_load_b64 s[4:5], s[0:1], 0x0
s_load_b32 s3, s[0:1], 0x8
s_load_b64 s[6:7], s[0:1]... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000a6c84_00000000-6_eratostenePr_single_block.cudafe1.cpp"
.text
#APP
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%s in %s at line %d\n"
#NO_APP
.text
.type _ZL11HandleError9cudaErrorPKci, @function
_ZL11HandleError9cudaErrorPKci:
.LFB2057:
.cfi_startproc
testl %edi, %edi
jne .L6
ret
.L6:
pus... | .text
.file "eratostenePr_single_block.hip"
.globl _Z10startTimerPP11ihipEvent_tS1_ # -- Begin function _Z10startTimerPP11ihipEvent_tS1_
.p2align 4, 0x90
.type _Z10startTimerPP11ihipEvent_tS1_,@function
_Z10startTimerPP11ihipEvent_tS1_: # @_Z10startTimerPP11ihipEvent_tS1_
.cfi_startproc
# %bb.0:
pushq %r14
.cfi_d... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <cuda.h>
#include <curand_kernel.h>
#include <math_constants.h>
extern "C"
{
__global__ void
rtruncnorm_kernel(float *x, int n,
float *mu, float *sigma,
float *a, float *b,
int len_mu, int len_sigma,
int len_a, int len_b,
int maxRejections,
int rng_c)
{
int rng_a=1; // Th... | .file "tmpxft_00182046_00000000-6_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2273:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#include <cuda.h>
#include <curand_kernel.h>
#include <math_constants.h>
extern "C"
{
__global__ void
rtruncnorm_kernel(float *x, int n,
float *mu, float *sigma,
float *a, float *b,
int len_mu, int len_sigma,
int len_a, int len_b,
int maxRejections,
int rng_c)
{
int rng_a=1; // Th... | #include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <hiprand/hiprand_kernel.h>
#include <hip/hip_math_constants.h>
extern "C"
{
__global__ void
rtruncnorm_kernel(float *x, int n,
float *mu, float *sigma,
float *a, float *b,
int len_mu, int len_sigma,
int len_a, int len_b,
int maxRejections,
int... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <hiprand/hiprand_kernel.h>
#include <hip/hip_math_constants.h>
extern "C"
{
__global__ void
rtruncnorm_kernel(float *x, int n,
float *mu, float *sigma,
float *a, float *b,
int len_mu, int len_sigma,
int len_a, int len_b,
int maxRejections,
int... | .text
.file "kernel.hip"
.globl __device_stub__rtruncnorm_kernel # -- Begin function __device_stub__rtruncnorm_kernel
.p2align 4, 0x90
.type __device_stub__rtruncnorm_kernel,@function
__device_stub__rtruncnorm_kernel: # @__device_stub__rtruncnorm_kernel
.cfi_startproc
# %bb.0:
subq $200, %rsp
.cfi_def_cfa_offset ... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00182046_00000000-6_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2273:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... | .text
.file "kernel.hip"
.globl __device_stub__rtruncnorm_kernel # -- Begin function __device_stub__rtruncnorm_kernel
.p2align 4, 0x90
.type __device_stub__rtruncnorm_kernel,@function
__device_stub__rtruncnorm_kernel: # @__device_stub__rtruncnorm_kernel
.cfi_startproc
# %bb.0:
subq $200, %rsp
.cfi_def_cfa_offset ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void post_scan(float* in, float* add, int len) {
unsigned int t = threadIdx.x;
unsigned int start = 2 * blockIdx.x * BLOCK_SIZE;
if (blockIdx.x) {
if (start + t < len) in[start + t] += add[blockIdx.x - 1];
if (start + BLOCK_SIZE + t < len) in[start + BLOCK_SIZE + t] += add[blockIdx.x - ... | code for sm_80
Function : _Z9post_scanPfS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e240000002500 */
/*0020... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void post_scan(float* in, float* add, int len) {
unsigned int t = threadIdx.x;
unsigned int start = 2 * blockIdx.x * BLOCK_SIZE;
if (blockIdx.x) {
if (start + t < len) in[start + t] += add[blockIdx.x - 1];
if (start + BLOCK_SIZE + t < len) in[start + BLOCK_SIZE + t] += add[blockIdx.x - ... | .file "tmpxft_000ba951_00000000-6_post_scan.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rs... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void post_scan(float* in, float* add, int len) {
unsigned int t = threadIdx.x;
unsigned int start = 2 * blockIdx.x * BLOCK_SIZE;
if (blockIdx.x) {
if (start + t < len) in[start + t] += add[blockIdx.x - 1];
if (start + BLOCK_SIZE + t < len) in[start + BLOCK_SIZE + t] += add[blockIdx.x - ... | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void post_scan(float* in, float* add, int len) {
unsigned int t = threadIdx.x;
unsigned int start = 2 * blockIdx.x * BLOCK_SIZE;
if (blockIdx.x) {
if (start + t < len) in[start + t] += add[blockIdx.x - 1];
if (start + BLOCK_SIZE + t < len) in[start + BLOCK_S... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void post_scan(float* in, float* add, int len) {
unsigned int t = threadIdx.x;
unsigned int start = 2 * blockIdx.x * BLOCK_SIZE;
if (blockIdx.x) {
if (start + t < len) in[start + t] += add[blockIdx.x - 1];
if (start + BLOCK_SIZE + t < len) in[start + BLOCK_S... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9post_scanPfS_i
.globl _Z9post_scanPfS_i
.p2align 8
.type _Z9post_scanPfS_i,@function
_Z9post_scanPfS_i:
s_cmp_eq_u32 s15, 0
s_cbranch_scc1 .LBB0_5
s_clause 0x1
s_load_b32 s4, s[0:1], 0x10
s_load_b128 s[0:3], s[0:1], 0x0
v_lshl_... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void post_scan(float* in, float* add, int len) {
unsigned int t = threadIdx.x;
unsigned int start = 2 * blockIdx.x * BLOCK_SIZE;
if (blockIdx.x) {
if (start + t < len) in[start + t] += add[blockIdx.x - 1];
if (start + BLOCK_SIZE + t < len) in[start + BLOCK_S... | .text
.file "post_scan.hip"
.globl _Z24__device_stub__post_scanPfS_i # -- Begin function _Z24__device_stub__post_scanPfS_i
.p2align 4, 0x90
.type _Z24__device_stub__post_scanPfS_i,@function
_Z24__device_stub__post_scanPfS_i: # @_Z24__device_stub__post_scanPfS_i
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z9post_scanPfS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e240000002500 */
/*0020... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9post_scanPfS_i
.globl _Z9post_scanPfS_i
.p2align 8
.type _Z9post_scanPfS_i,@function
_Z9post_scanPfS_i:
s_cmp_eq_u32 s15, 0
s_cbranch_scc1 .LBB0_5
s_clause 0x1
s_load_b32 s4, s[0:1], 0x10
s_load_b128 s[0:3], s[0:1], 0x0
v_lshl_... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000ba951_00000000-6_post_scan.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rs... | .text
.file "post_scan.hip"
.globl _Z24__device_stub__post_scanPfS_i # -- Begin function _Z24__device_stub__post_scanPfS_i
.p2align 4, 0x90
.type _Z24__device_stub__post_scanPfS_i,@function
_Z24__device_stub__post_scanPfS_i: # @_Z24__device_stub__post_scanPfS_i
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | // "Copyright 2018 <Fabio M. Graetz>"
#include <cuda.h>
#include <cuda_runtime.h>
#include <stdio.h>
#include <iostream>
template<class T>
__global__ void scanHillisSteele(T *d_out, T *d_in, const int n) {
unsigned int i = threadIdx.x + blockDim.x * blockIdx.x;
if (i < n) {
// extern __shared__ int shared_mem[];
// sha... | code for sm_80
Function : _Z16scanHillisSteeleIiEvPT_S1_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e28000000... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | // "Copyright 2018 <Fabio M. Graetz>"
#include <cuda.h>
#include <cuda_runtime.h>
#include <stdio.h>
#include <iostream>
template<class T>
__global__ void scanHillisSteele(T *d_out, T *d_in, const int n) {
unsigned int i = threadIdx.x + blockDim.x * blockIdx.x;
if (i < n) {
// extern __shared__ int shared_mem[];
// sha... | .file "tmpxft_0001b496_00000000-6_scanHillisSteele_without_double_buffer.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.section .text._Z16scanHillisSteeleIiEvPT_S1_i,"axG",@progbits,_Z16scanHillisSteeleIiEvPT_S1_i,comdat
.weak _Z16scanHillisSteeleIiEvPT_S1_i
.type _Z16scanHillisSteeleIiEvPT_S1_i, ... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | // "Copyright 2018 <Fabio M. Graetz>"
#include <cuda.h>
#include <cuda_runtime.h>
#include <stdio.h>
#include <iostream>
template<class T>
__global__ void scanHillisSteele(T *d_out, T *d_in, const int n) {
unsigned int i = threadIdx.x + blockDim.x * blockIdx.x;
if (i < n) {
// extern __shared__ int shared_mem[];
// sha... | // "Copyright 2018 <Fabio M. Graetz>"
#include <hip/hip_runtime.h>
#include <stdio.h>
#include <iostream>
template<class T>
__global__ void scanHillisSteele(T *d_out, T *d_in, const int n) {
unsigned int i = threadIdx.x + blockDim.x * blockIdx.x;
if (i < n) {
// extern __shared__ int shared_mem[];
// shared_mem[i] = i ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | // "Copyright 2018 <Fabio M. Graetz>"
#include <hip/hip_runtime.h>
#include <stdio.h>
#include <iostream>
template<class T>
__global__ void scanHillisSteele(T *d_out, T *d_in, const int n) {
unsigned int i = threadIdx.x + blockDim.x * blockIdx.x;
if (i < n) {
// extern __shared__ int shared_mem[];
// shared_mem[i] = i ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.section .text._Z16scanHillisSteeleIiEvPT_S1_i,"axG",@progbits,_Z16scanHillisSteeleIiEvPT_S1_i,comdat
.protected _Z16scanHillisSteeleIiEvPT_S1_i
.globl _Z16scanHillisSteeleIiEvPT_S1_i
.p2align 8
.type _Z16scanHillisSteeleIiEvPT_S1_i,@function
_Z16scanHillisSteeleIiEvPT... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | // "Copyright 2018 <Fabio M. Graetz>"
#include <hip/hip_runtime.h>
#include <stdio.h>
#include <iostream>
template<class T>
__global__ void scanHillisSteele(T *d_out, T *d_in, const int n) {
unsigned int i = threadIdx.x + blockDim.x * blockIdx.x;
if (i < n) {
// extern __shared__ int shared_mem[];
// shared_mem[i] = i ... | .text
.file "scanHillisSteele_without_double_buffer.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0 ... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z16scanHillisSteeleIiEvPT_S1_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e28000000... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.section .text._Z16scanHillisSteeleIiEvPT_S1_i,"axG",@progbits,_Z16scanHillisSteeleIiEvPT_S1_i,comdat
.protected _Z16scanHillisSteeleIiEvPT_S1_i
.globl _Z16scanHillisSteeleIiEvPT_S1_i
.p2align 8
.type _Z16scanHillisSteeleIiEvPT_S1_i,@function
_Z16scanHillisSteeleIiEvPT... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0001b496_00000000-6_scanHillisSteele_without_double_buffer.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.section .text._Z16scanHillisSteeleIiEvPT_S1_i,"axG",@progbits,_Z16scanHillisSteeleIiEvPT_S1_i,comdat
.weak _Z16scanHillisSteeleIiEvPT_S1_i
.type _Z16scanHillisSteeleIiEvPT_S1_i, ... | .text
.file "scanHillisSteele_without_double_buffer.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0 ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <cuda_runtime.h>
#define THREADS 128
#define BLOCKS 2
__global__ void vectorAdd(int *v) {
int tx = threadIdx.x + blockDim.x * blockIdx.x;
v[tx] += tx;
}
int main(int argc, char **argv) {
int *d_vec = NULL;
cudaMalloc((void**)&d_vec, sizeof(int) * BLOCKS * THREADS);
cudaMemset(d_vec, 0, BLOCKS * THREADS);
vecto... | code for sm_80
Function : _Z9vectorAddPi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e220000002100 */
/*0020*/ HF... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <cuda_runtime.h>
#define THREADS 128
#define BLOCKS 2
__global__ void vectorAdd(int *v) {
int tx = threadIdx.x + blockDim.x * blockIdx.x;
v[tx] += tx;
}
int main(int argc, char **argv) {
int *d_vec = NULL;
cudaMalloc((void**)&d_vec, sizeof(int) * BLOCKS * THREADS);
cudaMemset(d_vec, 0, BLOCKS * THREADS);
vecto... | .file "tmpxft_000ef2b8_00000000-6_memset_error.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, ... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <cuda_runtime.h>
#define THREADS 128
#define BLOCKS 2
__global__ void vectorAdd(int *v) {
int tx = threadIdx.x + blockDim.x * blockIdx.x;
v[tx] += tx;
}
int main(int argc, char **argv) {
int *d_vec = NULL;
cudaMalloc((void**)&d_vec, sizeof(int) * BLOCKS * THREADS);
cudaMemset(d_vec, 0, BLOCKS * THREADS);
vecto... | #include <hip/hip_runtime.h>
#define THREADS 128
#define BLOCKS 2
__global__ void vectorAdd(int *v) {
int tx = threadIdx.x + blockDim.x * blockIdx.x;
v[tx] += tx;
}
int main(int argc, char **argv) {
int *d_vec = NULL;
hipMalloc((void**)&d_vec, sizeof(int) * BLOCKS * THREADS);
hipMemset(d_vec, 0, BLOCKS * THREADS);
vect... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#define THREADS 128
#define BLOCKS 2
__global__ void vectorAdd(int *v) {
int tx = threadIdx.x + blockDim.x * blockIdx.x;
v[tx] += tx;
}
int main(int argc, char **argv) {
int *d_vec = NULL;
hipMalloc((void**)&d_vec, sizeof(int) * BLOCKS * THREADS);
hipMemset(d_vec, 0, BLOCKS * THREADS);
vect... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9vectorAddPi
.globl _Z9vectorAddPi
.p2align 8
.type _Z9vectorAddPi,@function
_Z9vectorAddPi:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x14
s_load_b64 s[0:1], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#define THREADS 128
#define BLOCKS 2
__global__ void vectorAdd(int *v) {
int tx = threadIdx.x + blockDim.x * blockIdx.x;
v[tx] += tx;
}
int main(int argc, char **argv) {
int *d_vec = NULL;
hipMalloc((void**)&d_vec, sizeof(int) * BLOCKS * THREADS);
hipMemset(d_vec, 0, BLOCKS * THREADS);
vect... | .text
.file "memset_error.hip"
.globl _Z24__device_stub__vectorAddPi # -- Begin function _Z24__device_stub__vectorAddPi
.p2align 4, 0x90
.type _Z24__device_stub__vectorAddPi,@function
_Z24__device_stub__vectorAddPi: # @_Z24__device_stub__vectorAddPi
.cfi_startproc
# %bb.0:
subq $72, %rsp
.cfi_def_cfa_offset 80... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z9vectorAddPi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e220000002100 */
/*0020*/ HF... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9vectorAddPi
.globl _Z9vectorAddPi
.p2align 8
.type _Z9vectorAddPi,@function
_Z9vectorAddPi:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x14
s_load_b64 s[0:1], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000ef2b8_00000000-6_memset_error.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, ... | .text
.file "memset_error.hip"
.globl _Z24__device_stub__vectorAddPi # -- Begin function _Z24__device_stub__vectorAddPi
.p2align 4, 0x90
.type _Z24__device_stub__vectorAddPi,@function
_Z24__device_stub__vectorAddPi: # @_Z24__device_stub__vectorAddPi
.cfi_startproc
# %bb.0:
subq $72, %rsp
.cfi_def_cfa_offset 80... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void AdaptWinningFractionKernel( int s1, float *winningFraction, int *winningCount, float bParam, int maxCells )
{
int threadId = blockDim.x*blockIdx.y*gridDim.x //rows preceeding current row in grid
+ blockDim.x*blockIdx.x //blocks preceeding current block
+ threadIdx.x;
if(threadId < ... | code for sm_80
Function : _Z26AdaptWinningFractionKerneliPfPifi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */
/* 0x000e28... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void AdaptWinningFractionKernel( int s1, float *winningFraction, int *winningCount, float bParam, int maxCells )
{
int threadId = blockDim.x*blockIdx.y*gridDim.x //rows preceeding current row in grid
+ blockDim.x*blockIdx.x //blocks preceeding current block
+ threadIdx.x;
if(threadId < ... | .file "tmpxft_00066eb3_00000000-6_AdaptWinningFractionKernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void AdaptWinningFractionKernel( int s1, float *winningFraction, int *winningCount, float bParam, int maxCells )
{
int threadId = blockDim.x*blockIdx.y*gridDim.x //rows preceeding current row in grid
+ blockDim.x*blockIdx.x //blocks preceeding current block
+ threadIdx.x;
if(threadId < ... | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void AdaptWinningFractionKernel( int s1, float *winningFraction, int *winningCount, float bParam, int maxCells )
{
int threadId = blockDim.x*blockIdx.y*gridDim.x //rows preceeding current row in grid
+ blockDim.x*blockIdx.x //blocks preceeding current block
... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void AdaptWinningFractionKernel( int s1, float *winningFraction, int *winningCount, float bParam, int maxCells )
{
int threadId = blockDim.x*blockIdx.y*gridDim.x //rows preceeding current row in grid
+ blockDim.x*blockIdx.x //blocks preceeding current block
... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z26AdaptWinningFractionKerneliPfPifi
.globl _Z26AdaptWinningFractionKerneliPfPifi
.p2align 8
.type _Z26AdaptWinningFractionKerneliPfPifi,@function
_Z26AdaptWinningFractionKerneliPfPifi:
s_clause 0x1
s_load_b64 s[2:3], s[0:1], 0x1c
s_load_b32 s4, s[0:1], 0... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void AdaptWinningFractionKernel( int s1, float *winningFraction, int *winningCount, float bParam, int maxCells )
{
int threadId = blockDim.x*blockIdx.y*gridDim.x //rows preceeding current row in grid
+ blockDim.x*blockIdx.x //blocks preceeding current block
... | .text
.file "AdaptWinningFractionKernel.hip"
.globl _Z41__device_stub__AdaptWinningFractionKerneliPfPifi # -- Begin function _Z41__device_stub__AdaptWinningFractionKerneliPfPifi
.p2align 4, 0x90
.type _Z41__device_stub__AdaptWinningFractionKerneliPfPifi,@function
_Z41__device_stub__AdaptWinningFractionKerneliPfPifi: # ... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z26AdaptWinningFractionKerneliPfPifi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */
/* 0x000e28... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z26AdaptWinningFractionKerneliPfPifi
.globl _Z26AdaptWinningFractionKerneliPfPifi
.p2align 8
.type _Z26AdaptWinningFractionKerneliPfPifi,@function
_Z26AdaptWinningFractionKerneliPfPifi:
s_clause 0x1
s_load_b64 s[2:3], s[0:1], 0x1c
s_load_b32 s4, s[0:1], 0... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00066eb3_00000000-6_AdaptWinningFractionKernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary... | .text
.file "AdaptWinningFractionKernel.hip"
.globl _Z41__device_stub__AdaptWinningFractionKerneliPfPifi # -- Begin function _Z41__device_stub__AdaptWinningFractionKerneliPfPifi
.p2align 4, 0x90
.type _Z41__device_stub__AdaptWinningFractionKerneliPfPifi,@function
_Z41__device_stub__AdaptWinningFractionKerneliPfPifi: # ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__device__ float get_prediction(int factors, const float *p, const float *q, float user_bias, float item_bias, float global_bias) {
float pred = global_bias + user_bias + item_bias;
for (int f = 0; f < factors; f++)
pred += q[f]*p[f];
return pred;
}
__global__ void loss_kernel(int factors, int use... | code for sm_80
Function : _Z11loss_kerneliiiPKfS0_PKiS2_S0_PfS3_S3_f
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R8, SR_CTAID.X ; /* 0x000000000... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__device__ float get_prediction(int factors, const float *p, const float *q, float user_bias, float item_bias, float global_bias) {
float pred = global_bias + user_bias + item_bias;
for (int f = 0; f < factors; f++)
pred += q[f]*p[f];
return pred;
}
__global__ void loss_kernel(int factors, int use... | .file "tmpxft_00070adb_00000000-6_loss_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__device__ float get_prediction(int factors, const float *p, const float *q, float user_bias, float item_bias, float global_bias) {
float pred = global_bias + user_bias + item_bias;
for (int f = 0; f < factors; f++)
pred += q[f]*p[f];
return pred;
}
__global__ void loss_kernel(int factors, int use... | #include <hip/hip_runtime.h>
#include "includes.h"
__device__ float get_prediction(int factors, const float *p, const float *q, float user_bias, float item_bias, float global_bias) {
float pred = global_bias + user_bias + item_bias;
for (int f = 0; f < factors; f++)
pred += q[f]*p[f];
return pred;
}
__global__ void los... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__device__ float get_prediction(int factors, const float *p, const float *q, float user_bias, float item_bias, float global_bias) {
float pred = global_bias + user_bias + item_bias;
for (int f = 0; f < factors; f++)
pred += q[f]*p[f];
return pred;
}
__global__ void los... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11loss_kerneliiiPKfS0_PKiS2_S0_PfS3_S3_f
.globl _Z11loss_kerneliiiPKfS0_PKiS2_S0_PfS3_S3_f
.p2align 8
.type _Z11loss_kerneliiiPKfS0_PKiS2_S0_PfS3_S3_f,@function
_Z11loss_kerneliiiPKfS0_PKiS2_S0_PfS3_S3_f:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x64
s_load_b3... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__device__ float get_prediction(int factors, const float *p, const float *q, float user_bias, float item_bias, float global_bias) {
float pred = global_bias + user_bias + item_bias;
for (int f = 0; f < factors; f++)
pred += q[f]*p[f];
return pred;
}
__global__ void los... | .text
.file "loss_kernel.hip"
.globl _Z26__device_stub__loss_kerneliiiPKfS0_PKiS2_S0_PfS3_S3_f # -- Begin function _Z26__device_stub__loss_kerneliiiPKfS0_PKiS2_S0_PfS3_S3_f
.p2align 4, 0x90
.type _Z26__device_stub__loss_kerneliiiPKfS0_PKiS2_S0_PfS3_S3_f,@function
_Z26__device_stub__loss_kerneliiiPKfS0_PKiS2_S0_PfS3_S3_... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z11loss_kerneliiiPKfS0_PKiS2_S0_PfS3_S3_f
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R8, SR_CTAID.X ; /* 0x000000000... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11loss_kerneliiiPKfS0_PKiS2_S0_PfS3_S3_f
.globl _Z11loss_kerneliiiPKfS0_PKiS2_S0_PfS3_S3_f
.p2align 8
.type _Z11loss_kerneliiiPKfS0_PKiS2_S0_PfS3_S3_f,@function
_Z11loss_kerneliiiPKfS0_PKiS2_S0_PfS3_S3_f:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x64
s_load_b3... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00070adb_00000000-6_loss_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... | .text
.file "loss_kernel.hip"
.globl _Z26__device_stub__loss_kerneliiiPKfS0_PKiS2_S0_PfS3_S3_f # -- Begin function _Z26__device_stub__loss_kerneliiiPKfS0_PKiS2_S0_PfS3_S3_f
.p2align 4, 0x90
.type _Z26__device_stub__loss_kerneliiiPKfS0_PKiS2_S0_PfS3_S3_f,@function
_Z26__device_stub__loss_kerneliiiPKfS0_PKiS2_S0_PfS3_S3_... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void mAddDensity(float *dense, float *dense_old, float dt) {
int Idx = blockIdx.x * blockDim.x + threadIdx.x;
dense[Idx] += dense_old[Idx]*dt;
} | code for sm_80
Function : _Z11mAddDensityPfS_f
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R4, SR_CTAID.X ; /* 0x0000000000047919 */
/* 0x000e220000002500 */
/*0... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void mAddDensity(float *dense, float *dense_old, float dt) {
int Idx = blockIdx.x * blockDim.x + threadIdx.x;
dense[Idx] += dense_old[Idx]*dt;
} | .file "tmpxft_000ac6c5_00000000-6_mAddDensity.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void mAddDensity(float *dense, float *dense_old, float dt) {
int Idx = blockIdx.x * blockDim.x + threadIdx.x;
dense[Idx] += dense_old[Idx]*dt;
} | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void mAddDensity(float *dense, float *dense_old, float dt) {
int Idx = blockIdx.x * blockDim.x + threadIdx.x;
dense[Idx] += dense_old[Idx]*dt;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void mAddDensity(float *dense, float *dense_old, float dt) {
int Idx = blockIdx.x * blockDim.x + threadIdx.x;
dense[Idx] += dense_old[Idx]*dt;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11mAddDensityPfS_f
.globl _Z11mAddDensityPfS_f
.p2align 8
.type _Z11mAddDensityPfS_f,@function
_Z11mAddDensityPfS_f:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b32 s0, s[0:1], 0x10
s_waitcnt lgkmcn... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void mAddDensity(float *dense, float *dense_old, float dt) {
int Idx = blockIdx.x * blockDim.x + threadIdx.x;
dense[Idx] += dense_old[Idx]*dt;
} | .text
.file "mAddDensity.hip"
.globl _Z26__device_stub__mAddDensityPfS_f # -- Begin function _Z26__device_stub__mAddDensityPfS_f
.p2align 4, 0x90
.type _Z26__device_stub__mAddDensityPfS_f,@function
_Z26__device_stub__mAddDensityPfS_f: # @_Z26__device_stub__mAddDensityPfS_f
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cf... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z11mAddDensityPfS_f
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R4, SR_CTAID.X ; /* 0x0000000000047919 */
/* 0x000e220000002500 */
/*0... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11mAddDensityPfS_f
.globl _Z11mAddDensityPfS_f
.p2align 8
.type _Z11mAddDensityPfS_f,@function
_Z11mAddDensityPfS_f:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b32 s0, s[0:1], 0x10
s_waitcnt lgkmcn... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000ac6c5_00000000-6_mAddDensity.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... | .text
.file "mAddDensity.hip"
.globl _Z26__device_stub__mAddDensityPfS_f # -- Begin function _Z26__device_stub__mAddDensityPfS_f
.p2align 4, 0x90
.type _Z26__device_stub__mAddDensityPfS_f,@function
_Z26__device_stub__mAddDensityPfS_f: # @_Z26__device_stub__mAddDensityPfS_f
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cf... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void kMartixSubstractMatrix(const int nThreads, const float *m1, const float *m2, float *output) {
/* Computes the (elementwise) difference between two arrays
Inputs:
m1: array
m2: array
output: array,the results of the computation are to be stored here
*/
for (int i = blockIdx.x * bloc... | code for sm_80
Function : _Z22kMartixSubstractMatrixiPKfS0_Pf
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e2800... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void kMartixSubstractMatrix(const int nThreads, const float *m1, const float *m2, float *output) {
/* Computes the (elementwise) difference between two arrays
Inputs:
m1: array
m2: array
output: array,the results of the computation are to be stored here
*/
for (int i = blockIdx.x * bloc... | .file "tmpxft_00148e46_00000000-6_kMartixSubstractMatrix.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void kMartixSubstractMatrix(const int nThreads, const float *m1, const float *m2, float *output) {
/* Computes the (elementwise) difference between two arrays
Inputs:
m1: array
m2: array
output: array,the results of the computation are to be stored here
*/
for (int i = blockIdx.x * bloc... | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void kMartixSubstractMatrix(const int nThreads, const float *m1, const float *m2, float *output) {
/* Computes the (elementwise) difference between two arrays
Inputs:
m1: array
m2: array
output: array,the results of the computation are to be stored here
*/
f... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void kMartixSubstractMatrix(const int nThreads, const float *m1, const float *m2, float *output) {
/* Computes the (elementwise) difference between two arrays
Inputs:
m1: array
m2: array
output: array,the results of the computation are to be stored here
*/
f... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z22kMartixSubstractMatrixiPKfS0_Pf
.globl _Z22kMartixSubstractMatrixiPKfS0_Pf
.p2align 8
.type _Z22kMartixSubstractMatrixiPKfS0_Pf,@function
_Z22kMartixSubstractMatrixiPKfS0_Pf:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x2c
s_load_b32 s8, s[0:1], 0x0
s_add_u... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void kMartixSubstractMatrix(const int nThreads, const float *m1, const float *m2, float *output) {
/* Computes the (elementwise) difference between two arrays
Inputs:
m1: array
m2: array
output: array,the results of the computation are to be stored here
*/
f... | .text
.file "kMartixSubstractMatrix.hip"
.globl _Z37__device_stub__kMartixSubstractMatrixiPKfS0_Pf # -- Begin function _Z37__device_stub__kMartixSubstractMatrixiPKfS0_Pf
.p2align 4, 0x90
.type _Z37__device_stub__kMartixSubstractMatrixiPKfS0_Pf,@function
_Z37__device_stub__kMartixSubstractMatrixiPKfS0_Pf: # @_Z37__devic... |
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