system stringclasses 7
values | input stringlengths 10 94.5k | output stringlengths 14 55.5k |
|---|---|---|
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z22kMartixSubstractMatrixiPKfS0_Pf
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e2800... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z22kMartixSubstractMatrixiPKfS0_Pf
.globl _Z22kMartixSubstractMatrixiPKfS0_Pf
.p2align 8
.type _Z22kMartixSubstractMatrixiPKfS0_Pf,@function
_Z22kMartixSubstractMatrixiPKfS0_Pf:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x2c
s_load_b32 s8, s[0:1], 0x0
s_add_u... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00148e46_00000000-6_kMartixSubstractMatrix.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT... | .text
.file "kMartixSubstractMatrix.hip"
.globl _Z37__device_stub__kMartixSubstractMatrixiPKfS0_Pf # -- Begin function _Z37__device_stub__kMartixSubstractMatrixiPKfS0_Pf
.p2align 4, 0x90
.type _Z37__device_stub__kMartixSubstractMatrixiPKfS0_Pf,@function
_Z37__device_stub__kMartixSubstractMatrixiPKfS0_Pf: # @_Z37__devic... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include<bits/stdc++.h>
#include<cuda.h>
#include<thrust/count.h>
#include<curand_kernel.h>
#include<thrust/extrema.h>
#include<thrust/device_ptr.h>
using namespace std;
void catchCudaError(cudaError_t error, const char *function)
{
if(error!=cudaSuccess)
{
printf("\n====== Cuda Error Code %i ======\n %s in CUDA %s\n",... | code for sm_80
Function : _ZN3cub17CUB_200700_800_NS11EmptyKernelIvEEvv
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea000380... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include<bits/stdc++.h>
#include<cuda.h>
#include<thrust/count.h>
#include<curand_kernel.h>
#include<thrust/extrema.h>
#include<thrust/device_ptr.h>
using namespace std;
void catchCudaError(cudaError_t error, const char *function)
{
if(error!=cudaSuccess)
{
printf("\n====== Cuda Error Code %i ======\n %s in CUDA %s\n",... | #include<bits/stdc++.h>
#include<hip/hip_runtime.h>
#include<thrust/count.h>
#include<hiprand/hiprand_kernel.h>
#include<thrust/extrema.h>
#include<thrust/device_ptr.h>
using namespace std;
void catchCudaError(hipError_t error, const char *function)
{
if(error!=hipSuccess)
{
printf("\n====== Cuda Error Code %i ======\n... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include<bits/stdc++.h>
#include<hip/hip_runtime.h>
#include<thrust/count.h>
#include<hiprand/hiprand_kernel.h>
#include<thrust/extrema.h>
#include<thrust/device_ptr.h>
using namespace std;
void catchCudaError(hipError_t error, const char *function)
{
if(error!=hipSuccess)
{
printf("\n====== Cuda Error Code %i ======\n... | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include<bits/stdc++.h>
#include<hip/hip_runtime.h>
#include<thrust/count.h>
#include<hiprand/hiprand_kernel.h>
#include<thrust/extrema.h>
#include<thrust/device_ptr.h>
using namespace std;
void catchCudaError(hipError_t error, const char *function)
{
if(error!=hipSuccess)
{
printf("\n====== Cuda Error Code %i ======\n... | .text
.file "Utility.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z14catchCudaError10hipError_tPKc # -- Begin function _Z14catchCudaError10hipError_tPKc
.p2align 4,... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _ZN3cub17CUB_200700_800_NS11EmptyKernelIvEEvv
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea000380... | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
/* objective
* C = A*B // A[m][k], B[k][n], C[m][n]
* compile: nvcc --gpu-architecture=compute_60 --gpu-code=sm_60 -O3 matmul_double.cu -o matmul_double
Using nvprof for this lab
nvprof -- query-metrics
nvprof dram_read_transactions ./test 1024 1024 128
nvprof ./test 1024 1024 128
second line of r... | code for sm_80
Function : _Z13matmul_doublePdS_S_iii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R4, SR_CTAID.X ; /* 0x0000000000047919 */
/* 0x... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
/* objective
* C = A*B // A[m][k], B[k][n], C[m][n]
* compile: nvcc --gpu-architecture=compute_60 --gpu-code=sm_60 -O3 matmul_double.cu -o matmul_double
Using nvprof for this lab
nvprof -- query-metrics
nvprof dram_read_transactions ./test 1024 1024 128
nvprof ./test 1024 1024 128
second line of r... | .file "tmpxft_0005fdd4_00000000-6_matmul_double.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8,... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
/* objective
* C = A*B // A[m][k], B[k][n], C[m][n]
* compile: nvcc --gpu-architecture=compute_60 --gpu-code=sm_60 -O3 matmul_double.cu -o matmul_double
Using nvprof for this lab
nvprof -- query-metrics
nvprof dram_read_transactions ./test 1024 1024 128
nvprof ./test 1024 1024 128
second line of r... | #include <hip/hip_runtime.h>
#include "includes.h"
/* objective
* C = A*B // A[m][k], B[k][n], C[m][n]
* compile: nvcc --gpu-architecture=compute_60 --gpu-code=sm_60 -O3 matmul_double.cu -o matmul_double
Using nvprof for this lab
nvprof -- query-metrics
nvprof dram_read_transactions ./test 1024 1024 128
nvprof ./test 1... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
/* objective
* C = A*B // A[m][k], B[k][n], C[m][n]
* compile: nvcc --gpu-architecture=compute_60 --gpu-code=sm_60 -O3 matmul_double.cu -o matmul_double
Using nvprof for this lab
nvprof -- query-metrics
nvprof dram_read_transactions ./test 1024 1024 128
nvprof ./test 1... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z13matmul_doublePdS_S_iii
.globl _Z13matmul_doublePdS_S_iii
.p2align 8
.type _Z13matmul_doublePdS_S_iii,@function
_Z13matmul_doublePdS_S_iii:
s_clause 0x1
s_load_b64 s[8:9], s[0:1], 0x18
s_load_b32 s10, s[0:1], 0x20
v_bfe_u32 v7, v0, 10, 10
v_d... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
/* objective
* C = A*B // A[m][k], B[k][n], C[m][n]
* compile: nvcc --gpu-architecture=compute_60 --gpu-code=sm_60 -O3 matmul_double.cu -o matmul_double
Using nvprof for this lab
nvprof -- query-metrics
nvprof dram_read_transactions ./test 1024 1024 128
nvprof ./test 1... | .text
.file "matmul_double.hip"
.globl _Z28__device_stub__matmul_doublePdS_S_iii # -- Begin function _Z28__device_stub__matmul_doublePdS_S_iii
.p2align 4, 0x90
.type _Z28__device_stub__matmul_doublePdS_S_iii,@function
_Z28__device_stub__matmul_doublePdS_S_iii: # @_Z28__device_stub__matmul_doublePdS_S_iii
.cfi_startproc... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z13matmul_doublePdS_S_iii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R4, SR_CTAID.X ; /* 0x0000000000047919 */
/* 0x... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z13matmul_doublePdS_S_iii
.globl _Z13matmul_doublePdS_S_iii
.p2align 8
.type _Z13matmul_doublePdS_S_iii,@function
_Z13matmul_doublePdS_S_iii:
s_clause 0x1
s_load_b64 s[8:9], s[0:1], 0x18
s_load_b32 s10, s[0:1], 0x20
v_bfe_u32 v7, v0, 10, 10
v_d... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0005fdd4_00000000-6_matmul_double.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8,... | .text
.file "matmul_double.hip"
.globl _Z28__device_stub__matmul_doublePdS_S_iii # -- Begin function _Z28__device_stub__matmul_doublePdS_S_iii
.p2align 4, 0x90
.type _Z28__device_stub__matmul_doublePdS_S_iii,@function
_Z28__device_stub__matmul_doublePdS_S_iii: # @_Z28__device_stub__matmul_doublePdS_S_iii
.cfi_startproc... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <complex.h>
#include <math.h>
#include <sys/mman.h>
#define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
#define cuda_check(ret) _cuda_check((ret), __FILE__, __LINE__)
inline void _cuda_check(cudaError_t ret, const char *file, int line)
{
if (ret != cuda... | .file "tmpxft_000bb410_00000000-6_gaussian_blur_cuda.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3980:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
add... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <complex.h>
#include <math.h>
#include <sys/mman.h>
#define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
#define cuda_check(ret) _cuda_check((ret), __FILE__, __LINE__)
inline void _cuda_check(cudaError_t ret, const char *file, int line)
{
if (ret != cuda... | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <complex.h>
#include <math.h>
#include <sys/mman.h>
#define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
#define cuda_check(ret) _cuda_check((ret), __FILE__, __LINE__)
inline void _cuda_check(hipError_t ret, const char *file,... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <complex.h>
#include <math.h>
#include <sys/mman.h>
#define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
#define cuda_check(ret) _cuda_check((ret), __FILE__, __LINE__)
inline void _cuda_check(hipError_t ret, const char *file,... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z24gaussian_blur_kernel_oldPhPfS_llflf
.globl _Z24gaussian_blur_kernel_oldPhPfS_llflf
.p2align 8
.type _Z24gaussian_blur_kernel_oldPhPfS_llflf,@function
_Z24gaussian_blur_kernel_oldPhPfS_llflf:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x4c
s_load_b64 s[8:9], s[... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <complex.h>
#include <math.h>
#include <sys/mman.h>
#define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
#define cuda_check(ret) _cuda_check((ret), __FILE__, __LINE__)
inline void _cuda_check(hipError_t ret, const char *file,... | .text
.file "gaussian_blur_cuda.hip"
.globl _Z10read_imagePPcPmS1_S1_PPh # -- Begin function _Z10read_imagePPcPmS1_S1_PPh
.p2align 4, 0x90
.type _Z10read_imagePPcPmS1_S1_PPh,@function
_Z10read_imagePPcPmS1_S1_PPh: # @_Z10read_imagePPcPmS1_S1_PPh
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pus... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void sumMatrixOnGPU2D(float *A, float *B, float *C, int NX, int NY)
{
unsigned int ix = blockIdx.x * blockDim.x + threadIdx.x;
unsigned int iy = blockIdx.y * blockDim.y + threadIdx.y;
unsigned int idx = iy * NX + ix;
if (ix < NX && iy < NY)
{
C[idx] = A[idx] + B[idx];
}
} | code for sm_80
Function : _Z16sumMatrixOnGPU2DPfS_S_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R3, SR_CTAID.Y ; /* 0x0000000000037919 */
/* 0x000e28000000260... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void sumMatrixOnGPU2D(float *A, float *B, float *C, int NX, int NY)
{
unsigned int ix = blockIdx.x * blockDim.x + threadIdx.x;
unsigned int iy = blockIdx.y * blockDim.y + threadIdx.y;
unsigned int idx = iy * NX + ix;
if (ix < NX && iy < NY)
{
C[idx] = A[idx] + B[idx];
}
} | .file "tmpxft_0010b077_00000000-6_sumMatrixOnGPU2D.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq ... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void sumMatrixOnGPU2D(float *A, float *B, float *C, int NX, int NY)
{
unsigned int ix = blockIdx.x * blockDim.x + threadIdx.x;
unsigned int iy = blockIdx.y * blockDim.y + threadIdx.y;
unsigned int idx = iy * NX + ix;
if (ix < NX && iy < NY)
{
C[idx] = A[idx] + B[idx];
}
} | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void sumMatrixOnGPU2D(float *A, float *B, float *C, int NX, int NY)
{
unsigned int ix = blockIdx.x * blockDim.x + threadIdx.x;
unsigned int iy = blockIdx.y * blockDim.y + threadIdx.y;
unsigned int idx = iy * NX + ix;
if (ix < NX && iy < NY)
{
C[idx] = A[idx]... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void sumMatrixOnGPU2D(float *A, float *B, float *C, int NX, int NY)
{
unsigned int ix = blockIdx.x * blockDim.x + threadIdx.x;
unsigned int iy = blockIdx.y * blockDim.y + threadIdx.y;
unsigned int idx = iy * NX + ix;
if (ix < NX && iy < NY)
{
C[idx] = A[idx]... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z16sumMatrixOnGPU2DPfS_S_ii
.globl _Z16sumMatrixOnGPU2DPfS_S_ii
.p2align 8
.type _Z16sumMatrixOnGPU2DPfS_S_ii,@function
_Z16sumMatrixOnGPU2DPfS_S_ii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b64 s[4:5], s[0:1], 0x18
v_and_b32_e32 v2, 0x3ff... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void sumMatrixOnGPU2D(float *A, float *B, float *C, int NX, int NY)
{
unsigned int ix = blockIdx.x * blockDim.x + threadIdx.x;
unsigned int iy = blockIdx.y * blockDim.y + threadIdx.y;
unsigned int idx = iy * NX + ix;
if (ix < NX && iy < NY)
{
C[idx] = A[idx]... | .text
.file "sumMatrixOnGPU2D.hip"
.globl _Z31__device_stub__sumMatrixOnGPU2DPfS_S_ii # -- Begin function _Z31__device_stub__sumMatrixOnGPU2DPfS_S_ii
.p2align 4, 0x90
.type _Z31__device_stub__sumMatrixOnGPU2DPfS_S_ii,@function
_Z31__device_stub__sumMatrixOnGPU2DPfS_S_ii: # @_Z31__device_stub__sumMatrixOnGPU2DPfS_S_ii
.... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z16sumMatrixOnGPU2DPfS_S_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R3, SR_CTAID.Y ; /* 0x0000000000037919 */
/* 0x000e28000000260... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z16sumMatrixOnGPU2DPfS_S_ii
.globl _Z16sumMatrixOnGPU2DPfS_S_ii
.p2align 8
.type _Z16sumMatrixOnGPU2DPfS_S_ii,@function
_Z16sumMatrixOnGPU2DPfS_S_ii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b64 s[4:5], s[0:1], 0x18
v_and_b32_e32 v2, 0x3ff... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0010b077_00000000-6_sumMatrixOnGPU2D.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq ... | .text
.file "sumMatrixOnGPU2D.hip"
.globl _Z31__device_stub__sumMatrixOnGPU2DPfS_S_ii # -- Begin function _Z31__device_stub__sumMatrixOnGPU2DPfS_S_ii
.p2align 4, 0x90
.type _Z31__device_stub__sumMatrixOnGPU2DPfS_S_ii,@function
_Z31__device_stub__sumMatrixOnGPU2DPfS_S_ii: # @_Z31__device_stub__sumMatrixOnGPU2DPfS_S_ii
.... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | __global__ void
vectorAdd1(const float *A, const float *B, float *C, int numElements) {
/*@ requires 0 <= numElements;
requires numElements < gridDim.x * blockDim.x;
ensures \forall i; 0 <= i -> i < numElements -> C[i] == A[i] + B[i]; */
int i = blockDim.x * blockIdx.x + threadIdx.x;
if (i < numElements) {
C[i] = A[i] ... | code for sm_80
Function : _Z17vectorAddDownwardPKfS0_Pfi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2UR UR4, SR_CTAID.X ; /* 0x00000000000479c3 */
/* 0x000e2200000... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | __global__ void
vectorAdd1(const float *A, const float *B, float *C, int numElements) {
/*@ requires 0 <= numElements;
requires numElements < gridDim.x * blockDim.x;
ensures \forall i; 0 <= i -> i < numElements -> C[i] == A[i] + B[i]; */
int i = blockDim.x * blockIdx.x + threadIdx.x;
if (i < numElements) {
C[i] = A[i] ... | .file "tmpxft_000f21c2_00000000-6_vectorAdd.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rs... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | __global__ void
vectorAdd1(const float *A, const float *B, float *C, int numElements) {
/*@ requires 0 <= numElements;
requires numElements < gridDim.x * blockDim.x;
ensures \forall i; 0 <= i -> i < numElements -> C[i] == A[i] + B[i]; */
int i = blockDim.x * blockIdx.x + threadIdx.x;
if (i < numElements) {
C[i] = A[i] ... | #include <hip/hip_runtime.h>
__global__ void
vectorAdd1(const float *A, const float *B, float *C, int numElements) {
/*@ requires 0 <= numElements;
requires numElements < gridDim.x * blockDim.x;
ensures \forall i; 0 <= i -> i < numElements -> C[i] == A[i] + B[i]; */
int i = blockDim.x * blockIdx.x + threadIdx.x;
if (i ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
__global__ void
vectorAdd1(const float *A, const float *B, float *C, int numElements) {
/*@ requires 0 <= numElements;
requires numElements < gridDim.x * blockDim.x;
ensures \forall i; 0 <= i -> i < numElements -> C[i] == A[i] + B[i]; */
int i = blockDim.x * blockIdx.x + threadIdx.x;
if (i ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z10vectorAdd1PKfS0_Pfi
.globl _Z10vectorAdd1PKfS0_Pfi
.p2align 8
.type _Z10vectorAdd1PKfS0_Pfi,@function
_Z10vectorAdd1PKfS0_Pfi:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xf... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
__global__ void
vectorAdd1(const float *A, const float *B, float *C, int numElements) {
/*@ requires 0 <= numElements;
requires numElements < gridDim.x * blockDim.x;
ensures \forall i; 0 <= i -> i < numElements -> C[i] == A[i] + B[i]; */
int i = blockDim.x * blockIdx.x + threadIdx.x;
if (i ... | .text
.file "vectorAdd.hip"
.globl _Z25__device_stub__vectorAdd1PKfS0_Pfi # -- Begin function _Z25__device_stub__vectorAdd1PKfS0_Pfi
.p2align 4, 0x90
.type _Z25__device_stub__vectorAdd1PKfS0_Pfi,@function
_Z25__device_stub__vectorAdd1PKfS0_Pfi: # @_Z25__device_stub__vectorAdd1PKfS0_Pfi
.cfi_startproc
# %bb.0:
subq $120... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z17vectorAddDownwardPKfS0_Pfi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2UR UR4, SR_CTAID.X ; /* 0x00000000000479c3 */
/* 0x000e2200000... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z10vectorAdd1PKfS0_Pfi
.globl _Z10vectorAdd1PKfS0_Pfi
.p2align 8
.type _Z10vectorAdd1PKfS0_Pfi,@function
_Z10vectorAdd1PKfS0_Pfi:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xf... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000f21c2_00000000-6_vectorAdd.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rs... | .text
.file "vectorAdd.hip"
.globl _Z25__device_stub__vectorAdd1PKfS0_Pfi # -- Begin function _Z25__device_stub__vectorAdd1PKfS0_Pfi
.p2align 4, 0x90
.type _Z25__device_stub__vectorAdd1PKfS0_Pfi,@function
_Z25__device_stub__vectorAdd1PKfS0_Pfi: # @_Z25__device_stub__vectorAdd1PKfS0_Pfi
.cfi_startproc
# %bb.0:
subq $120... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <time.h>
/*
to compile :
nvcc -o 2039276_Task3_A 2039276_Task3_A.cu
to run:
./2039276_Task3_A
Sonam Wangdi Sherpa, UID: 2039276
*/
__device__ char* CudaCrypt(char* rawPassword){
char * newPassword = (char *) malloc(sizeof(char) * 11);
newPassword[0] = rawPassword[0] + 2;... | .file "tmpxft_0005a26d_00000000-6_2039276_Task3_A.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2063:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#include <time.h>
/*
to compile :
nvcc -o 2039276_Task3_A 2039276_Task3_A.cu
to run:
./2039276_Task3_A
Sonam Wangdi Sherpa, UID: 2039276
*/
__device__ char* CudaCrypt(char* rawPassword){
char * newPassword = (char *) malloc(sizeof(char) * 11);
newPassword[0] = rawPassword[0] + 2;... | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
/*
to compile :
nvcc -o 2039276_Task3_A 2039276_Task3_A.cu
to run:
./2039276_Task3_A
Sonam Wangdi Sherpa, UID: 2039276
*/
__device__ char* CudaCrypt(char* rawPassword){
char * newPassword = (char *) malloc(sizeof(char) * 11);
newPass... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
/*
to compile :
nvcc -o 2039276_Task3_A 2039276_Task3_A.cu
to run:
./2039276_Task3_A
Sonam Wangdi Sherpa, UID: 2039276
*/
__device__ char* CudaCrypt(char* rawPassword){
char * newPassword = (char *) malloc(sizeof(char) * 11);
newPass... | .text
.file "2039276_Task3_A.hip"
.globl _Z20__device_stub__crackPcS_ # -- Begin function _Z20__device_stub__crackPcS_
.p2align 4, 0x90
.type _Z20__device_stub__crackPcS_,@function
_Z20__device_stub__crackPcS_: # @_Z20__device_stub__crackPcS_
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
mo... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0005a26d_00000000-6_2039276_Task3_A.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2063:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $... | .text
.file "2039276_Task3_A.hip"
.globl _Z20__device_stub__crackPcS_ # -- Begin function _Z20__device_stub__crackPcS_
.p2align 4, 0x90
.type _Z20__device_stub__crackPcS_,@function
_Z20__device_stub__crackPcS_: # @_Z20__device_stub__crackPcS_
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
mo... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "grid_cell_kernel.cuh"
__device__ bool IsGridIdxValid(int idx, int maxGridNum)
{
return !(idx == GRID_UNDEF || idx < 0 || idx > maxGridNum - 1);
}
__device__ int GetGridCell(
const float3 & gridVolMin,
const int3 & gridRes,
const float3 & pos,
float cellSize,
int3 & gridCell)
{
float gx = gridVolMin.x;
float ... | code for sm_80
Function : _Z10UniformAddPiS_iii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R11, SR_TID.X ; /* 0x00000000000b7919 */
/* 0x000e22... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "grid_cell_kernel.cuh"
__device__ bool IsGridIdxValid(int idx, int maxGridNum)
{
return !(idx == GRID_UNDEF || idx < 0 || idx > maxGridNum - 1);
}
__device__ int GetGridCell(
const float3 & gridVolMin,
const int3 & gridRes,
const float3 & pos,
float cellSize,
int3 & gridCell)
{
float gx = gridVolMin.x;
float ... | .file "tmpxft_000925c4_00000000-6_grid_cell_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2039:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq ... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "grid_cell_kernel.cuh"
__device__ bool IsGridIdxValid(int idx, int maxGridNum)
{
return !(idx == GRID_UNDEF || idx < 0 || idx > maxGridNum - 1);
}
__device__ int GetGridCell(
const float3 & gridVolMin,
const int3 & gridRes,
const float3 & pos,
float cellSize,
int3 & gridCell)
{
float gx = gridVolMin.x;
float ... | #ifndef GRID_CELL_KERNEL_CUH
#define GRID_CELL_KERNEL_CUH
#include <math.h>
#include <hip/hip_runtime.h>
#include <hip/device_functions.h>
#define GRID_UCHAR 0xFF
#define GRID_UNDEF 0xFFFFFFFF
#define MAX_GRID_NBR 27
#define LOG_BANK_NUM 4
#define CONFLICT_FREE_OFFSET(index) ((index)>>LOG_BANK_NUM)
#define BLOCK_SIZE 2... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #ifndef GRID_CELL_KERNEL_CUH
#define GRID_CELL_KERNEL_CUH
#include <math.h>
#include <hip/hip_runtime.h>
#include <hip/device_functions.h>
#define GRID_UCHAR 0xFF
#define GRID_UNDEF 0xFFFFFFFF
#define MAX_GRID_NBR 27
#define LOG_BANK_NUM 4
#define CONFLICT_FREE_OFFSET(index) ((index)>>LOG_BANK_NUM)
#define BLOCK_SIZE 2... | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #ifndef GRID_CELL_KERNEL_CUH
#define GRID_CELL_KERNEL_CUH
#include <math.h>
#include <hip/hip_runtime.h>
#include <hip/device_functions.h>
#define GRID_UCHAR 0xFF
#define GRID_UNDEF 0xFFFFFFFF
#define MAX_GRID_NBR 27
#define LOG_BANK_NUM 4
#define CONFLICT_FREE_OFFSET(index) ((index)>>LOG_BANK_NUM)
#define BLOCK_SIZE 2... | .text
.file "grid_cell_kernel.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z10UniformAddPiS_iii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R11, SR_TID.X ; /* 0x00000000000b7919 */
/* 0x000e22... | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000925c4_00000000-6_grid_cell_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2039:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq ... | .text
.file "grid_cell_kernel.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /*
* compiles on elephanttest using
* nvcc --compiler-options '-fPIC' -o libfpoly.so --shared matrix.cu
*/
#include <cuda_runtime.h>
#define aref(mat, row, col, n) (mat[(col)*(n) + (row)])
/* do the echelon operation */
__device__ int ffge(int *mat, int *vec, int n);
/* launch the threads on the GPU */
__global__ void... | .file "tmpxft_000b4cae_00000000-6_matrix.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /*
* compiles on elephanttest using
* nvcc --compiler-options '-fPIC' -o libfpoly.so --shared matrix.cu
*/
#include <cuda_runtime.h>
#define aref(mat, row, col, n) (mat[(col)*(n) + (row)])
/* do the echelon operation */
__device__ int ffge(int *mat, int *vec, int n);
/* launch the threads on the GPU */
__global__ void... | /*
* compiles on elephanttest using
* nvcc --compiler-options '-fPIC' -o libfpoly.so --shared matrix.cu
*/
#include <hip/hip_runtime.h>
#define aref(mat, row, col, n) (mat[(col)*(n) + (row)])
/* do the echelon operation */
__device__ int ffge(int *mat, int *vec, int n);
/* launch the threads on the GPU */
__global__ v... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | /*
* compiles on elephanttest using
* nvcc --compiler-options '-fPIC' -o libfpoly.so --shared matrix.cu
*/
#include <hip/hip_runtime.h>
#define aref(mat, row, col, n) (mat[(col)*(n) + (row)])
/* do the echelon operation */
__device__ int ffge(int *mat, int *vec, int n);
/* launch the threads on the GPU */
__global__ v... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z8ffge_gpuPiS_ii
.globl _Z8ffge_gpuPiS_ii
.p2align 8
.type _Z8ffge_gpuPiS_ii,@function
_Z8ffge_gpuPiS_ii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | /*
* compiles on elephanttest using
* nvcc --compiler-options '-fPIC' -o libfpoly.so --shared matrix.cu
*/
#include <hip/hip_runtime.h>
#define aref(mat, row, col, n) (mat[(col)*(n) + (row)])
/* do the echelon operation */
__device__ int ffge(int *mat, int *vec, int n);
/* launch the threads on the GPU */
__global__ v... | .text
.file "matrix.hip"
.globl _Z23__device_stub__ffge_gpuPiS_ii # -- Begin function _Z23__device_stub__ffge_gpuPiS_ii
.p2align 4, 0x90
.type _Z23__device_stub__ffge_gpuPiS_ii,@function
_Z23__device_stub__ffge_gpuPiS_ii: # @_Z23__device_stub__ffge_gpuPiS_ii
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_off... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000b4cae_00000000-6_matrix.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... | .text
.file "matrix.hip"
.globl _Z23__device_stub__ffge_gpuPiS_ii # -- Begin function _Z23__device_stub__ffge_gpuPiS_ii
.p2align 4, 0x90
.type _Z23__device_stub__ffge_gpuPiS_ii,@function
_Z23__device_stub__ffge_gpuPiS_ii: # @_Z23__device_stub__ffge_gpuPiS_ii
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_off... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <curand_kernel.h>
__host__ __device__ unsigned int XY_TO_INT(int x, int y) {//r represent the number of 10 degree, x,y - 11 bits, max = 2047, r - max = 36, 6 bits
return (((y) << 11) | (x));
}
__host__ __device__ int INT_TO_X(unsigned int v) {
return (v)&((1 << 11) - 1);
}
__host__ __device_... | .file "tmpxft_001b0ea9_00000000-6_patchmatch.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2282:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %r... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <curand_kernel.h>
__host__ __device__ unsigned int XY_TO_INT(int x, int y) {//r represent the number of 10 degree, x,y - 11 bits, max = 2047, r - max = 36, 6 bits
return (((y) << 11) | (x));
}
__host__ __device__ int INT_TO_X(unsigned int v) {
return (v)&((1 << 11) - 1);
}
__host__ __device_... | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <hiprand/hiprand_kernel.h>
__host__ __device__ unsigned int XY_TO_INT(int x, int y) {//r represent the number of 10 degree, x,y - 11 bits, max = 2047, r - max = 36, 6 bits
return (((y) << 11) | (x));
}
__host__ __device__ int INT_TO_X(unsigned int v) {
return (v)... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <hiprand/hiprand_kernel.h>
__host__ __device__ unsigned int XY_TO_INT(int x, int y) {//r represent the number of 10 degree, x,y - 11 bits, max = 2047, r - max = 36, 6 bits
return (((y) << 11) | (x));
}
__host__ __device__ int INT_TO_X(unsigned int v) {
return (v)... | .text
.file "patchmatch.hip"
.globl _Z9XY_TO_INTii # -- Begin function _Z9XY_TO_INTii
.p2align 4, 0x90
.type _Z9XY_TO_INTii,@function
_Z9XY_TO_INTii: # @_Z9XY_TO_INTii
.cfi_startproc
# %bb.0:
movl %esi, %eax
shll $11, %eax
orl %edi, %eax
retq
.Lfunc_end0:
.size _Z9XY_TO_INTii, .... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001b0ea9_00000000-6_patchmatch.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2282:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %r... | .text
.file "patchmatch.hip"
.globl _Z9XY_TO_INTii # -- Begin function _Z9XY_TO_INTii
.p2align 4, 0x90
.type _Z9XY_TO_INTii,@function
_Z9XY_TO_INTii: # @_Z9XY_TO_INTii
.cfi_startproc
# %bb.0:
movl %esi, %eax
shll $11, %eax
orl %edi, %eax
retq
.Lfunc_end0:
.size _Z9XY_TO_INTii, .... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void cunn_SoftMax_updateGradInput_kernel(float *gradInput, float *output, float *gradOutput, int nframe, int dim)
{
__shared__ float buffer[SOFTMAX_THREADS];
int k = blockIdx.x;
float *gradInput_k = gradInput + k*dim;
float *output_k = output + k*dim;
float *gradOutput_k = gradOutput + ... | code for sm_80
Function : _Z35cunn_SoftMax_updateGradInput_kernelPfS_S_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_TID.X ; /* 0x000000... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void cunn_SoftMax_updateGradInput_kernel(float *gradInput, float *output, float *gradOutput, int nframe, int dim)
{
__shared__ float buffer[SOFTMAX_THREADS];
int k = blockIdx.x;
float *gradInput_k = gradInput + k*dim;
float *output_k = output + k*dim;
float *gradOutput_k = gradOutput + ... | .file "tmpxft_00102c68_00000000-6_cunn_SoftMax_updateGradInput_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregister... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void cunn_SoftMax_updateGradInput_kernel(float *gradInput, float *output, float *gradOutput, int nframe, int dim)
{
__shared__ float buffer[SOFTMAX_THREADS];
int k = blockIdx.x;
float *gradInput_k = gradInput + k*dim;
float *output_k = output + k*dim;
float *gradOutput_k = gradOutput + ... | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void cunn_SoftMax_updateGradInput_kernel(float *gradInput, float *output, float *gradOutput, int nframe, int dim)
{
__shared__ float buffer[SOFTMAX_THREADS];
int k = blockIdx.x;
float *gradInput_k = gradInput + k*dim;
float *output_k = output + k*dim;
float ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void cunn_SoftMax_updateGradInput_kernel(float *gradInput, float *output, float *gradOutput, int nframe, int dim)
{
__shared__ float buffer[SOFTMAX_THREADS];
int k = blockIdx.x;
float *gradInput_k = gradInput + k*dim;
float *output_k = output + k*dim;
float ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z35cunn_SoftMax_updateGradInput_kernelPfS_S_ii
.globl _Z35cunn_SoftMax_updateGradInput_kernelPfS_S_ii
.p2align 8
.type _Z35cunn_SoftMax_updateGradInput_kernelPfS_S_ii,@function
_Z35cunn_SoftMax_updateGradInput_kernelPfS_S_ii:
s_clause 0x2
s_load_b32 s10, s... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void cunn_SoftMax_updateGradInput_kernel(float *gradInput, float *output, float *gradOutput, int nframe, int dim)
{
__shared__ float buffer[SOFTMAX_THREADS];
int k = blockIdx.x;
float *gradInput_k = gradInput + k*dim;
float *output_k = output + k*dim;
float ... | .text
.file "cunn_SoftMax_updateGradInput_kernel.hip"
.globl _Z50__device_stub__cunn_SoftMax_updateGradInput_kernelPfS_S_ii # -- Begin function _Z50__device_stub__cunn_SoftMax_updateGradInput_kernelPfS_S_ii
.p2align 4, 0x90
.type _Z50__device_stub__cunn_SoftMax_updateGradInput_kernelPfS_S_ii,@function
_Z50__device_stub... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00102c68_00000000-6_cunn_SoftMax_updateGradInput_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregister... | .text
.file "cunn_SoftMax_updateGradInput_kernel.hip"
.globl _Z50__device_stub__cunn_SoftMax_updateGradInput_kernelPfS_S_ii # -- Begin function _Z50__device_stub__cunn_SoftMax_updateGradInput_kernelPfS_S_ii
.p2align 4, 0x90
.type _Z50__device_stub__cunn_SoftMax_updateGradInput_kernelPfS_S_ii,@function
_Z50__device_stub... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | /*#include <iostream>*/
/*#include <ctime>*/
/*#include <stdio.h>*/
/*#include <stdlib.h>*/
/*#include <cuda.h>*/
/*#include <cuda_runtime.h> // Stops underlining of __global__*/
/*#include <device_launch_parameters.h> // Stops underlining of threadIdx etc.*/
/*#include <sys/types.h>*/
/*#include <sys/stat.h>*/
/*#incl... | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /*#include <iostream>*/
/*#include <ctime>*/
/*#include <stdio.h>*/
/*#include <stdlib.h>*/
/*#include <cuda.h>*/
/*#include <cuda_runtime.h> // Stops underlining of __global__*/
/*#include <device_launch_parameters.h> // Stops underlining of threadIdx etc.*/
/*#include <sys/types.h>*/
/*#include <sys/stat.h>*/
/*#incl... | .file "tmpxft_0000a119_00000000-6_ppf_jdl2.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /*#include <iostream>*/
/*#include <ctime>*/
/*#include <stdio.h>*/
/*#include <stdlib.h>*/
/*#include <cuda.h>*/
/*#include <cuda_runtime.h> // Stops underlining of __global__*/
/*#include <device_launch_parameters.h> // Stops underlining of threadIdx etc.*/
/*#include <sys/types.h>*/
/*#include <sys/stat.h>*/
/*#incl... | #include <hip/hip_runtime.h>
/*#include <iostream>*/
/*#include <ctime>*/
/*#include <stdio.h>*/
/*#include <stdlib.h>*/
/*#include <cuda.h>*/
/*#include <cuda_runtime.h> // Stops underlining of __global__*/
/*#include <device_launch_parameters.h> // Stops underlining of threadIdx etc.*/
/*#include <sys/types.h>*/
/*#i... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
/*#include <iostream>*/
/*#include <ctime>*/
/*#include <stdio.h>*/
/*#include <stdlib.h>*/
/*#include <cuda.h>*/
/*#include <cuda_runtime.h> // Stops underlining of __global__*/
/*#include <device_launch_parameters.h> // Stops underlining of threadIdx etc.*/
/*#include <sys/types.h>*/
/*#i... | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
/*#include <iostream>*/
/*#include <ctime>*/
/*#include <stdio.h>*/
/*#include <stdlib.h>*/
/*#include <cuda.h>*/
/*#include <cuda_runtime.h> // Stops underlining of __global__*/
/*#include <device_launch_parameters.h> // Stops underlining of threadIdx etc.*/
/*#include <sys/types.h>*/
/*#i... | .text
.file "ppf_jdl2.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0000a119_00000000-6_ppf_jdl2.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp... | .text
.file "ppf_jdl2.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <iostream>
#include <unistd.h>
#include <sys/time.h>
#include <sys/time.h>
// Shorthand for formatting usage options
#define fpe(msg) fprintf(stderr, "\t%s\n", msg);
#define HANDLE_ERROR(err) ( HandleError( err, __FILE__, __LINE__ ) )
#define MAX_THREADS (65536 * 1024)
/**
* DEFINED VALUES H... | .file "tmpxft_0003c7af_00000000-6_cached_plane.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3694:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __c... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <iostream>
#include <unistd.h>
#include <sys/time.h>
#include <sys/time.h>
// Shorthand for formatting usage options
#define fpe(msg) fprintf(stderr, "\t%s\n", msg);
#define HANDLE_ERROR(err) ( HandleError( err, __FILE__, __LINE__ ) )
#define MAX_THREADS (65536 * 1024)
/**
* DEFINED VALUES H... | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <iostream>
#include <unistd.h>
#include <sys/time.h>
#include <sys/time.h>
// Shorthand for formatting usage options
#define fpe(msg) fprintf(stderr, "\t%s\n", msg);
#define HANDLE_ERROR(err) ( HandleError( err, __FILE__, __LINE__ ) )
#define MAX_THREADS (65536 *... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <iostream>
#include <unistd.h>
#include <sys/time.h>
#include <sys/time.h>
// Shorthand for formatting usage options
#define fpe(msg) fprintf(stderr, "\t%s\n", msg);
#define HANDLE_ERROR(err) ( HandleError( err, __FILE__, __LINE__ ) )
#define MAX_THREADS (65536 *... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12cached_plane6MatrixS_i
.globl _Z12cached_plane6MatrixS_i
.p2align 8
.type _Z12cached_plane6MatrixS_i,@function
_Z12cached_plane6MatrixS_i:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x48
s_load_b32 s6, s[0:1], 0x30
v_bfe_u32 v1, v0, 20, 10
s_add_u3... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <cuda.h>
template<typename T>
__device__ __forceinline__ T ldg(const T* ptr) {
#if __CUDA_ARCH__ >= 350
return __ldg(ptr);
#else
return *ptr;
#endif
}
extern "C"
__global__
void transpose_constY(
int nx
, int ny
, int nz
, float * in
, float * out // XYZ -> ZYX
)
{
int kx = blockIdx.x*blockDim.x + threadIdx.... | code for sm_80
Function : transpose_constY
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R3, SR_CTAID.Y ; /* 0x0000000000037919 */
/* 0x000e280000... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <cuda.h>
template<typename T>
__device__ __forceinline__ T ldg(const T* ptr) {
#if __CUDA_ARCH__ >= 350
return __ldg(ptr);
#else
return *ptr;
#endif
}
extern "C"
__global__
void transpose_constY(
int nx
, int ny
, int nz
, float * in
, float * out // XYZ -> ZYX
)
{
int kx = blockIdx.x*blockDim.x + threadIdx.... | .file "tmpxft_00057994_00000000-6_cu_transpose.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, ... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <cuda.h>
template<typename T>
__device__ __forceinline__ T ldg(const T* ptr) {
#if __CUDA_ARCH__ >= 350
return __ldg(ptr);
#else
return *ptr;
#endif
}
extern "C"
__global__
void transpose_constY(
int nx
, int ny
, int nz
, float * in
, float * out // XYZ -> ZYX
)
{
int kx = blockIdx.x*blockDim.x + threadIdx.... | #include <hip/hip_runtime.h>
template<typename T>
__device__ __forceinline__ T ldg(const T* ptr) {
#if __CUDA_ARCH__ >= 350
return __ldg(ptr);
#else
return *ptr;
#endif
}
extern "C"
__global__
void transpose_constY(
int nx
, int ny
, int nz
, float * in
, float * out // XYZ -> ZYX
)
{
int kx = blockIdx.x*blockDim.x +... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
template<typename T>
__device__ __forceinline__ T ldg(const T* ptr) {
#if __CUDA_ARCH__ >= 350
return __ldg(ptr);
#else
return *ptr;
#endif
}
extern "C"
__global__
void transpose_constY(
int nx
, int ny
, int nz
, float * in
, float * out // XYZ -> ZYX
)
{
int kx = blockIdx.x*blockDim.x +... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected transpose_constY
.globl transpose_constY
.p2align 8
.type transpose_constY,@function
transpose_constY:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x2c
s_load_b64 s[4:5], s[0:1], 0x0
s_load_b32 s3, s[0:1], 0x8
v_and_b32_e32 v2, 0x3ff, v... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
template<typename T>
__device__ __forceinline__ T ldg(const T* ptr) {
#if __CUDA_ARCH__ >= 350
return __ldg(ptr);
#else
return *ptr;
#endif
}
extern "C"
__global__
void transpose_constY(
int nx
, int ny
, int nz
, float * in
, float * out // XYZ -> ZYX
)
{
int kx = blockIdx.x*blockDim.x +... | .text
.file "cu_transpose.hip"
.globl __device_stub__transpose_constY # -- Begin function __device_stub__transpose_constY
.p2align 4, 0x90
.type __device_stub__transpose_constY,@function
__device_stub__transpose_constY: # @__device_stub__transpose_constY
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offse... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : transpose_constY
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R3, SR_CTAID.Y ; /* 0x0000000000037919 */
/* 0x000e280000... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected transpose_constY
.globl transpose_constY
.p2align 8
.type transpose_constY,@function
transpose_constY:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x2c
s_load_b64 s[4:5], s[0:1], 0x0
s_load_b32 s3, s[0:1], 0x8
v_and_b32_e32 v2, 0x3ff, v... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00057994_00000000-6_cu_transpose.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, ... | .text
.file "cu_transpose.hip"
.globl __device_stub__transpose_constY # -- Begin function __device_stub__transpose_constY
.p2align 4, 0x90
.type __device_stub__transpose_constY,@function
__device_stub__transpose_constY: # @__device_stub__transpose_constY
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offse... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | // Author: Chihiro Nakatani
// February 9th, 2021
// This script contains the inner product function with cpp.
#include <iostream>
#include <numeric>
#define SIZE_OF_ARRAY(array) (sizeof(array)/sizeof(array[0]))
// Define kernel function for inner product
__global__
void inner_product(int n, float *x, float *y, float *... | code for sm_80
Function : _Z13inner_productiPfS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x000e280000002500 */... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | // Author: Chihiro Nakatani
// February 9th, 2021
// This script contains the inner product function with cpp.
#include <iostream>
#include <numeric>
#define SIZE_OF_ARRAY(array) (sizeof(array)/sizeof(array[0]))
// Define kernel function for inner product
__global__
void inner_product(int n, float *x, float *y, float *... | .file "tmpxft_001ada63_00000000-6_inner_product_grid_any_numblocks.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3711:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | // Author: Chihiro Nakatani
// February 9th, 2021
// This script contains the inner product function with cpp.
#include <iostream>
#include <numeric>
#define SIZE_OF_ARRAY(array) (sizeof(array)/sizeof(array[0]))
// Define kernel function for inner product
__global__
void inner_product(int n, float *x, float *y, float *... | // Author: Chihiro Nakatani
// February 9th, 2021
// This script contains the inner product function with cpp.
#include <hip/hip_runtime.h>
#include <iostream>
#include <numeric>
#define SIZE_OF_ARRAY(array) (sizeof(array)/sizeof(array[0]))
// Define kernel function for inner product
__global__
void inner_product(int n... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | // Author: Chihiro Nakatani
// February 9th, 2021
// This script contains the inner product function with cpp.
#include <hip/hip_runtime.h>
#include <iostream>
#include <numeric>
#define SIZE_OF_ARRAY(array) (sizeof(array)/sizeof(array[0]))
// Define kernel function for inner product
__global__
void inner_product(int n... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z13inner_productiPfS_S_
.globl _Z13inner_productiPfS_S_
.p2align 8
.type _Z13inner_productiPfS_S_,@function
_Z13inner_productiPfS_S_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x2c
s_load_b32 s12, s[0:1], 0x0
s_add_u32 s2, s0, 32
s_addc_u32 s3, s1,... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | // Author: Chihiro Nakatani
// February 9th, 2021
// This script contains the inner product function with cpp.
#include <hip/hip_runtime.h>
#include <iostream>
#include <numeric>
#define SIZE_OF_ARRAY(array) (sizeof(array)/sizeof(array[0]))
// Define kernel function for inner product
__global__
void inner_product(int n... | .text
.file "inner_product_grid_any_numblocks.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z28__device_stub__inner_productiPfS_S_ # -- Begin function _Z28__device_s... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z13inner_productiPfS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x000e280000002500 */... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z13inner_productiPfS_S_
.globl _Z13inner_productiPfS_S_
.p2align 8
.type _Z13inner_productiPfS_S_,@function
_Z13inner_productiPfS_S_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x2c
s_load_b32 s12, s[0:1], 0x0
s_add_u32 s2, s0, 32
s_addc_u32 s3, s1,... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001ada63_00000000-6_inner_product_grid_any_numblocks.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3711:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(... | .text
.file "inner_product_grid_any_numblocks.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z28__device_stub__inner_productiPfS_S_ # -- Begin function _Z28__device_s... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | // Output of "python3 circuit2.py prefix_sum.crc" is pasted in as the kernel
// along with some boilerplate code to test this out.
// Expected output: "0 1 3 6 10 15 21 28\n".
#include <iostream>
__global__ void kogge_stone(int *x0, int *x1){
int tid = threadIdx.x;
x1[tid] = x0[tid];
switch(tid){
case 1:
x1[1] += x0[0]... | code for sm_80
Function : _Z11kogge_stonePiS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e22000... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | // Output of "python3 circuit2.py prefix_sum.crc" is pasted in as the kernel
// along with some boilerplate code to test this out.
// Expected output: "0 1 3 6 10 15 21 28\n".
#include <iostream>
__global__ void kogge_stone(int *x0, int *x1){
int tid = threadIdx.x;
x1[tid] = x0[tid];
switch(tid){
case 1:
x1[1] += x0[0]... | .file "tmpxft_00041e4e_00000000-6_prefix_sum.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cud... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | // Output of "python3 circuit2.py prefix_sum.crc" is pasted in as the kernel
// along with some boilerplate code to test this out.
// Expected output: "0 1 3 6 10 15 21 28\n".
#include <iostream>
__global__ void kogge_stone(int *x0, int *x1){
int tid = threadIdx.x;
x1[tid] = x0[tid];
switch(tid){
case 1:
x1[1] += x0[0]... | // Output of "python3 circuit2.py prefix_sum.crc" is pasted in as the kernel
// along with some boilerplate code to test this out.
// Expected output: "0 1 3 6 10 15 21 28\n".
#include <hip/hip_runtime.h>
#include <iostream>
__global__ void kogge_stone(int *x0, int *x1){
int tid = threadIdx.x;
x1[tid] = x0[tid];
switch... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | // Output of "python3 circuit2.py prefix_sum.crc" is pasted in as the kernel
// along with some boilerplate code to test this out.
// Expected output: "0 1 3 6 10 15 21 28\n".
#include <hip/hip_runtime.h>
#include <iostream>
__global__ void kogge_stone(int *x0, int *x1){
int tid = threadIdx.x;
x1[tid] = x0[tid];
switch... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11kogge_stonePiS_
.globl _Z11kogge_stonePiS_
.p2align 8
.type _Z11kogge_stonePiS_,@function
_Z11kogge_stonePiS_:
s_load_b128 s[0:3], s[0:1], 0x0
v_lshlrev_b32_e32 v1, 2, v0
s_mov_b32 s9, 0
s_waitcnt lgkmcnt(0)
global_load_b32 v6, v1... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | // Output of "python3 circuit2.py prefix_sum.crc" is pasted in as the kernel
// along with some boilerplate code to test this out.
// Expected output: "0 1 3 6 10 15 21 28\n".
#include <hip/hip_runtime.h>
#include <iostream>
__global__ void kogge_stone(int *x0, int *x1){
int tid = threadIdx.x;
x1[tid] = x0[tid];
switch... | .text
.file "prefix_sum.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z26__device_stub__kogge_stonePiS_ # -- Begin function _Z26__device_stub__kogge_stonePiS_
.p2ali... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z11kogge_stonePiS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e22000... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11kogge_stonePiS_
.globl _Z11kogge_stonePiS_
.p2align 8
.type _Z11kogge_stonePiS_,@function
_Z11kogge_stonePiS_:
s_load_b128 s[0:3], s[0:1], 0x0
v_lshlrev_b32_e32 v1, 2, v0
s_mov_b32 s9, 0
s_waitcnt lgkmcnt(0)
global_load_b32 v6, v1... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00041e4e_00000000-6_prefix_sum.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cud... | .text
.file "prefix_sum.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z26__device_stub__kogge_stonePiS_ # -- Begin function _Z26__device_stub__kogge_stonePiS_
.p2ali... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void cudaComputeYGradient(int* y_gradient, unsigned char* channel, int image_width, int image_height, int chunk_size_per_thread) {
int y_kernel[3][3] = { { 1, 2, 1 }, { 0, 0, 0 }, { -1, -2, -1 } };
int index = blockIdx.x * blockDim.x + threadIdx.x;
for (int i = index * chunk_size_per_th... | code for sm_80
Function : _Z20cudaComputeYGradientPiPhiii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R13, SR_CTAID.X ; /* 0x00000000000d7919 */... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void cudaComputeYGradient(int* y_gradient, unsigned char* channel, int image_width, int image_height, int chunk_size_per_thread) {
int y_kernel[3][3] = { { 1, 2, 1 }, { 0, 0, 0 }, { -1, -2, -1 } };
int index = blockIdx.x * blockDim.x + threadIdx.x;
for (int i = index * chunk_size_per_th... | .file "tmpxft_0004bbc3_00000000-6_cudaComputeYGradient.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
a... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void cudaComputeYGradient(int* y_gradient, unsigned char* channel, int image_width, int image_height, int chunk_size_per_thread) {
int y_kernel[3][3] = { { 1, 2, 1 }, { 0, 0, 0 }, { -1, -2, -1 } };
int index = blockIdx.x * blockDim.x + threadIdx.x;
for (int i = index * chunk_size_per_th... | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void cudaComputeYGradient(int* y_gradient, unsigned char* channel, int image_width, int image_height, int chunk_size_per_thread) {
int y_kernel[3][3] = { { 1, 2, 1 }, { 0, 0, 0 }, { -1, -2, -1 } };
int index = blockIdx.x * blockDim.x + threadIdx.x;
for (int ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void cudaComputeYGradient(int* y_gradient, unsigned char* channel, int image_width, int image_height, int chunk_size_per_thread) {
int y_kernel[3][3] = { { 1, 2, 1 }, { 0, 0, 0 }, { -1, -2, -1 } };
int index = blockIdx.x * blockDim.x + threadIdx.x;
for (int ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z20cudaComputeYGradientPiPhiii
.globl _Z20cudaComputeYGradientPiPhiii
.p2align 8
.type _Z20cudaComputeYGradientPiPhiii,@function
_Z20cudaComputeYGradientPiPhiii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s4, s[0:1], 0x18
s_waitcnt lgkmcnt(... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void cudaComputeYGradient(int* y_gradient, unsigned char* channel, int image_width, int image_height, int chunk_size_per_thread) {
int y_kernel[3][3] = { { 1, 2, 1 }, { 0, 0, 0 }, { -1, -2, -1 } };
int index = blockIdx.x * blockDim.x + threadIdx.x;
for (int ... | .text
.file "cudaComputeYGradient.hip"
.globl _Z35__device_stub__cudaComputeYGradientPiPhiii # -- Begin function _Z35__device_stub__cudaComputeYGradientPiPhiii
.p2align 4, 0x90
.type _Z35__device_stub__cudaComputeYGradientPiPhiii,@function
_Z35__device_stub__cudaComputeYGradientPiPhiii: # @_Z35__device_stub__cudaComput... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z20cudaComputeYGradientPiPhiii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R13, SR_CTAID.X ; /* 0x00000000000d7919 */... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z20cudaComputeYGradientPiPhiii
.globl _Z20cudaComputeYGradientPiPhiii
.p2align 8
.type _Z20cudaComputeYGradientPiPhiii,@function
_Z20cudaComputeYGradientPiPhiii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s4, s[0:1], 0x18
s_waitcnt lgkmcnt(... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0004bbc3_00000000-6_cudaComputeYGradient.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
a... | .text
.file "cudaComputeYGradient.hip"
.globl _Z35__device_stub__cudaComputeYGradientPiPhiii # -- Begin function _Z35__device_stub__cudaComputeYGradientPiPhiii
.p2align 4, 0x90
.type _Z35__device_stub__cudaComputeYGradientPiPhiii,@function
_Z35__device_stub__cudaComputeYGradientPiPhiii: # @_Z35__device_stub__cudaComput... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
__global__ void d_sigmoid(float *data){
*data = (1.0 - *data) * *data;
}
int main(){
float *d_data, h_data = 0;
cudaMalloc((void **)&d_data, sizeof(float));
cudaMemcpy(d_data, &h_data, sizeof(float), cudaMemcpyHostToDevice);
d_sigmoid<<<1,1>>>(d_data);
cudaMemcpy(&h_data, d_data, sizeof(float), cudaM... | code for sm_80
Function : _Z9d_sigmoidPf
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ MOV R2, c[0x0][0x160] ; /* 0x0000580000027a02 */
/* 0x000fe20000000f00 */
/*0020... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
__global__ void d_sigmoid(float *data){
*data = (1.0 - *data) * *data;
}
int main(){
float *d_data, h_data = 0;
cudaMalloc((void **)&d_data, sizeof(float));
cudaMemcpy(d_data, &h_data, sizeof(float), cudaMemcpyHostToDevice);
d_sigmoid<<<1,1>>>(d_data);
cudaMemcpy(&h_data, d_data, sizeof(float), cudaM... | .file "tmpxft_00025438_00000000-6_sigmoid_cuda_kernal.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
ad... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
__global__ void d_sigmoid(float *data){
*data = (1.0 - *data) * *data;
}
int main(){
float *d_data, h_data = 0;
cudaMalloc((void **)&d_data, sizeof(float));
cudaMemcpy(d_data, &h_data, sizeof(float), cudaMemcpyHostToDevice);
d_sigmoid<<<1,1>>>(d_data);
cudaMemcpy(&h_data, d_data, sizeof(float), cudaM... | #include <hip/hip_runtime.h>
#include <stdio.h>
__global__ void d_sigmoid(float *data){
*data = (1.0 - *data) * *data;
}
int main(){
float *d_data, h_data = 0;
hipMalloc((void **)&d_data, sizeof(float));
hipMemcpy(d_data, &h_data, sizeof(float), hipMemcpyHostToDevice);
d_sigmoid<<<1,1>>>(d_data);
hipMemcpy(&h_data, d_d... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
__global__ void d_sigmoid(float *data){
*data = (1.0 - *data) * *data;
}
int main(){
float *d_data, h_data = 0;
hipMalloc((void **)&d_data, sizeof(float));
hipMemcpy(d_data, &h_data, sizeof(float), hipMemcpyHostToDevice);
d_sigmoid<<<1,1>>>(d_data);
hipMemcpy(&h_data, d_d... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9d_sigmoidPf
.globl _Z9d_sigmoidPf
.p2align 8
.type _Z9d_sigmoidPf,@function
_Z9d_sigmoidPf:
s_load_b64 s[0:1], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_load_b32 s2, s[0:1], 0x0
s_waitcnt lgkmcnt(0)
v_cvt_f64_f32_e32 v[0:1], s2
... |
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