system stringclasses 7
values | input stringlengths 10 94.5k | output stringlengths 14 55.5k |
|---|---|---|
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00123527_00000000-6_vadd.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cf... | .text
.file "vadd.hip"
.globl _Z19__device_stub__vaddPKfS0_Pfj # -- Begin function _Z19__device_stub__vaddPKfS0_Pfj
.p2align 4, 0x90
.type _Z19__device_stub__vaddPKfS0_Pfj,@function
_Z19__device_stub__vaddPKfS0_Pfj: # @_Z19__device_stub__vaddPKfS0_Pfj
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 12... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#include <set>
#include <sstream>
#include <string>
#include <fstream>
#include <iostream>
#include <cstring>
#include <thrust/scan.h>
#include <thrust/execution_policy.h>
#include <curand.h>
#include <curand_kernel.h>
using namespace std;
//
// __global__ void GraphGenerator(int*... | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <set>
#include <sstream>
#include <string>
#include <fstream>
#include <iostream>
#include <cstring>
#include <thrust/scan.h>
#include <thrust/execution_policy.h>
#include <hiprand/hiprand.h>
#include <hiprand/hiprand_kernel.h>
using namespace... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <set>
#include <sstream>
#include <string>
#include <fstream>
#include <iostream>
#include <cstring>
#include <thrust/scan.h>
#include <thrust/execution_policy.h>
#include <hiprand/hiprand.h>
#include <hiprand/hiprand_kernel.h>
using namespace... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11constraint1PdPiiii
.globl _Z11constraint1PdPiiii
.p2align 8
.type _Z11constraint1PdPiiii,@function
_Z11constraint1PdPiiii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x2c
s_load_b32 s6, s[0:1], 0x14
s_add_u32 s2, s0, 32
s_addc_u32 s3, s1, 0
s_... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <set>
#include <sstream>
#include <string>
#include <fstream>
#include <iostream>
#include <cstring>
#include <thrust/scan.h>
#include <thrust/execution_policy.h>
#include <hiprand/hiprand.h>
#include <hiprand/hiprand_kernel.h>
using namespace... | .text
.file "constraints.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z17readEdgesPositionPKcPi # -- Begin function _Z17readEdgesPositionPKcPi
.p2align 4, 0x90... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <iostream>
#include <algorithm>
#include <chrono>
#include <vector>
using namespace std::chrono_literals;
// Kernel definition
__global__ void vectorSum( float const * v1, float const * v2, float * v3)
{
v3[threadIdx.x] = v1[threadIdx.x] + v2[thre... | code for sm_80
Function : _Z9vectorSumPKfS0_Pf
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_TID.X ; /* 0x0000000000067919 */
/* 0x000e220000002100 */
/*002... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <iostream>
#include <algorithm>
#include <chrono>
#include <vector>
using namespace std::chrono_literals;
// Kernel definition
__global__ void vectorSum( float const * v1, float const * v2, float * v3)
{
v3[threadIdx.x] = v1[threadIdx.x] + v2[thre... | .file "tmpxft_001ae896_00000000-6_main.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4391:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnreg... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <iostream>
#include <algorithm>
#include <chrono>
#include <vector>
using namespace std::chrono_literals;
// Kernel definition
__global__ void vectorSum( float const * v1, float const * v2, float * v3)
{
v3[threadIdx.x] = v1[threadIdx.x] + v2[thre... | #include "hip/hip_runtime.h"
#include <iostream>
#include <algorithm>
#include <chrono>
#include <vector>
using namespace std::chrono_literals;
// Kernel definition
__global__ void vectorSum( float const * v1, float const * v2, float * v3)
{
v3[threadIdx.x] = v1[threadIdx.x] + v2[threadIdx.x];
}
int main()
{
unsigned i... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include "hip/hip_runtime.h"
#include <iostream>
#include <algorithm>
#include <chrono>
#include <vector>
using namespace std::chrono_literals;
// Kernel definition
__global__ void vectorSum( float const * v1, float const * v2, float * v3)
{
v3[threadIdx.x] = v1[threadIdx.x] + v2[threadIdx.x];
}
int main()
{
unsigned i... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9vectorSumPKfS0_Pf
.globl _Z9vectorSumPKfS0_Pf
.p2align 8
.type _Z9vectorSumPKfS0_Pf,@function
_Z9vectorSumPKfS0_Pf:
s_load_b128 s[4:7], s[0:1], 0x0
v_lshlrev_b32_e32 v0, 2, v0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_cl... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include "hip/hip_runtime.h"
#include <iostream>
#include <algorithm>
#include <chrono>
#include <vector>
using namespace std::chrono_literals;
// Kernel definition
__global__ void vectorSum( float const * v1, float const * v2, float * v3)
{
v3[threadIdx.x] = v1[threadIdx.x] + v2[threadIdx.x];
}
int main()
{
unsigned i... | .text
.file "main.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z24__device_stub__vectorSumPKfS0_Pf # -- Begin function _Z24__device_stub__vectorSumPKfS0_Pf
.p2align... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z9vectorSumPKfS0_Pf
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_TID.X ; /* 0x0000000000067919 */
/* 0x000e220000002100 */
/*002... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9vectorSumPKfS0_Pf
.globl _Z9vectorSumPKfS0_Pf
.p2align 8
.type _Z9vectorSumPKfS0_Pf,@function
_Z9vectorSumPKfS0_Pf:
s_load_b128 s[4:7], s[0:1], 0x0
v_lshlrev_b32_e32 v0, 2, v0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_cl... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001ae896_00000000-6_main.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4391:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnreg... | .text
.file "main.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z24__device_stub__vectorSumPKfS0_Pf # -- Begin function _Z24__device_stub__vectorSumPKfS0_Pf
.p2align... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | __global__ void updateSrc( int Nx, int Ny, int Nz, int tstep, float *F ) {
int idx, ijk;
idx = threadIdx.x;
//ijk = (idx+1)*Ny*Nz + (Ny/2)*Nz + (Nz/2);
//ijk = (idx+1)*Ny*Nz + (Ny/2 - 30)*Nz + (Nz/2 - 50);
//ijk = (Nx/2 - 30)*Ny*Nz + (idx)*Nz + (Nz/2 - 50);
ijk = (Nx/2-30)*Ny*Nz + (Ny/2-50)*Nz + idx;
F[ijk] += sin(0.1*... | code for sm_80
Function : _Z9updateSrciiiiPf
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fc600078e00ff */
/*0010*/ I2F.F64 R10, c[0x0][0x16c] ; /* 0x00005b00000a7b12 */
/* 0x... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | __global__ void updateSrc( int Nx, int Ny, int Nz, int tstep, float *F ) {
int idx, ijk;
idx = threadIdx.x;
//ijk = (idx+1)*Ny*Nz + (Ny/2)*Nz + (Nz/2);
//ijk = (idx+1)*Ny*Nz + (Ny/2 - 30)*Nz + (Nz/2 - 50);
//ijk = (Nx/2 - 30)*Ny*Nz + (idx)*Nz + (Nz/2 - 50);
ijk = (Nx/2-30)*Ny*Nz + (Ny/2-50)*Nz + idx;
F[ijk] += sin(0.1*... | .file "tmpxft_00113489_00000000-6_source.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | __global__ void updateSrc( int Nx, int Ny, int Nz, int tstep, float *F ) {
int idx, ijk;
idx = threadIdx.x;
//ijk = (idx+1)*Ny*Nz + (Ny/2)*Nz + (Nz/2);
//ijk = (idx+1)*Ny*Nz + (Ny/2 - 30)*Nz + (Nz/2 - 50);
//ijk = (Nx/2 - 30)*Ny*Nz + (idx)*Nz + (Nz/2 - 50);
ijk = (Nx/2-30)*Ny*Nz + (Ny/2-50)*Nz + idx;
F[ijk] += sin(0.1*... | #include <hip/hip_runtime.h>
__global__ void updateSrc( int Nx, int Ny, int Nz, int tstep, float *F ) {
int idx, ijk;
idx = threadIdx.x;
//ijk = (idx+1)*Ny*Nz + (Ny/2)*Nz + (Nz/2);
//ijk = (idx+1)*Ny*Nz + (Ny/2 - 30)*Nz + (Nz/2 - 50);
//ijk = (Nx/2 - 30)*Ny*Nz + (idx)*Nz + (Nz/2 - 50);
ijk = (Nx/2-30)*Ny*Nz + (Ny/2-50)... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
__global__ void updateSrc( int Nx, int Ny, int Nz, int tstep, float *F ) {
int idx, ijk;
idx = threadIdx.x;
//ijk = (idx+1)*Ny*Nz + (Ny/2)*Nz + (Nz/2);
//ijk = (idx+1)*Ny*Nz + (Ny/2 - 30)*Nz + (Nz/2 - 50);
//ijk = (Nx/2 - 30)*Ny*Nz + (idx)*Nz + (Nz/2 - 50);
ijk = (Nx/2-30)*Ny*Nz + (Ny/2-50)... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9updateSrciiiiPf
.globl _Z9updateSrciiiiPf
.p2align 8
.type _Z9updateSrciiiiPf,@function
_Z9updateSrciiiiPf:
s_load_b32 s2, s[0:1], 0xc
s_mov_b32 s3, 0x3fb99999
s_waitcnt lgkmcnt(0)
v_cvt_f64_i32_e32 v[1:2], s2
s_mov_b32 s2, 0x999... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
__global__ void updateSrc( int Nx, int Ny, int Nz, int tstep, float *F ) {
int idx, ijk;
idx = threadIdx.x;
//ijk = (idx+1)*Ny*Nz + (Ny/2)*Nz + (Nz/2);
//ijk = (idx+1)*Ny*Nz + (Ny/2 - 30)*Nz + (Nz/2 - 50);
//ijk = (Nx/2 - 30)*Ny*Nz + (idx)*Nz + (Nz/2 - 50);
ijk = (Nx/2-30)*Ny*Nz + (Ny/2-50)... | .text
.file "source.hip"
.globl _Z24__device_stub__updateSrciiiiPf # -- Begin function _Z24__device_stub__updateSrciiiiPf
.p2align 4, 0x90
.type _Z24__device_stub__updateSrciiiiPf,@function
_Z24__device_stub__updateSrciiiiPf: # @_Z24__device_stub__updateSrciiiiPf
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00113489_00000000-6_source.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... | .text
.file "source.hip"
.globl _Z24__device_stub__updateSrciiiiPf # -- Begin function _Z24__device_stub__updateSrciiiiPf
.p2align 4, 0x90
.type _Z24__device_stub__updateSrciiiiPf,@function
_Z24__device_stub__updateSrciiiiPf: # @_Z24__device_stub__updateSrciiiiPf
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <pthread.h>
#include <sys/time.h>
int cpu_cores;
long long num_tosses;
int gpu_cores;
struct toss_t {
int id;
pthread_t pid;
long long num_tosses;
long long in_circle;
};
// from gcc rand
inline __device__ __host__ unsigned my_rand(unsigned *seed) {
return *seed = 1103515245u * *seed + 12345... | code for sm_80
Function : _Z8gpu_tossxPx
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x0][0x0] ; /* 0x00000000ff057624 */... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <pthread.h>
#include <sys/time.h>
int cpu_cores;
long long num_tosses;
int gpu_cores;
struct toss_t {
int id;
pthread_t pid;
long long num_tosses;
long long in_circle;
};
// from gcc rand
inline __device__ __host__ unsigned my_rand(unsigned *seed) {
return *seed = 1103515245u * *seed + 12345... | .file "tmpxft_0018a2e1_00000000-6_pi.cudafe1.cpp"
.text
#APP
#NO_APP
.globl _Z8cpu_tossPv
.type _Z8cpu_tossPv, @function
_Z8cpu_tossPv:
.LFB2069:
.cfi_startproc
endbr64
movq %rdi, %rax
movq 16(%rdi), %r9
movl (%rdi), %edx
testq %r9, %r9
jle .L10
movl $0, %ecx
movl $0, %esi
movss .LC0(%rip), %xmm4
movaps %xmm4, %xmm3
mo... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <pthread.h>
#include <sys/time.h>
int cpu_cores;
long long num_tosses;
int gpu_cores;
struct toss_t {
int id;
pthread_t pid;
long long num_tosses;
long long in_circle;
};
// from gcc rand
inline __device__ __host__ unsigned my_rand(unsigned *seed) {
return *seed = 1103515245u * *seed + 12345... | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <pthread.h>
#include <sys/time.h>
int cpu_cores;
long long num_tosses;
int gpu_cores;
struct toss_t {
int id;
pthread_t pid;
long long num_tosses;
long long in_circle;
};
// from gcc rand
inline __device__ __host__ unsigned my_rand(unsigned *seed) {
return *seed ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <pthread.h>
#include <sys/time.h>
int cpu_cores;
long long num_tosses;
int gpu_cores;
struct toss_t {
int id;
pthread_t pid;
long long num_tosses;
long long in_circle;
};
// from gcc rand
inline __device__ __host__ unsigned my_rand(unsigned *seed) {
return *seed ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z8gpu_tossxPx
.globl _Z8gpu_tossxPx
.p2align 8
.type _Z8gpu_tossxPx,@function
_Z8gpu_tossxPx:
s_clause 0x2
s_load_b32 s4, s[0:1], 0x1c
s_load_b32 s5, s[0:1], 0x10
s_load_b64 s[2:3], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b3... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <pthread.h>
#include <sys/time.h>
int cpu_cores;
long long num_tosses;
int gpu_cores;
struct toss_t {
int id;
pthread_t pid;
long long num_tosses;
long long in_circle;
};
// from gcc rand
inline __device__ __host__ unsigned my_rand(unsigned *seed) {
return *seed ... | .text
.file "pi.hip"
.globl _Z5Timerv # -- Begin function _Z5Timerv
.p2align 4, 0x90
.type _Z5Timerv,@function
_Z5Timerv: # @_Z5Timerv
.cfi_startproc
# %bb.0:
subq $24, %rsp
.cfi_def_cfa_offset 32
leaq 8(%rsp), %rdi
xorl %esi, %esi
callq gettimeofday
imulq $1000, 8(%rs... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z8gpu_tossxPx
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x0][0x0] ; /* 0x00000000ff057624 */... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z8gpu_tossxPx
.globl _Z8gpu_tossxPx
.p2align 8
.type _Z8gpu_tossxPx,@function
_Z8gpu_tossxPx:
s_clause 0x2
s_load_b32 s4, s[0:1], 0x1c
s_load_b32 s5, s[0:1], 0x10
s_load_b64 s[2:3], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b3... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0018a2e1_00000000-6_pi.cudafe1.cpp"
.text
#APP
#NO_APP
.globl _Z8cpu_tossPv
.type _Z8cpu_tossPv, @function
_Z8cpu_tossPv:
.LFB2069:
.cfi_startproc
endbr64
movq %rdi, %rax
movq 16(%rdi), %r9
movl (%rdi), %edx
testq %r9, %r9
jle .L10
movl $0, %ecx
movl $0, %esi
movss .LC0(%rip), %xmm4
movaps %xmm4, %xmm3
mo... | .text
.file "pi.hip"
.globl _Z5Timerv # -- Begin function _Z5Timerv
.p2align 4, 0x90
.type _Z5Timerv,@function
_Z5Timerv: # @_Z5Timerv
.cfi_startproc
# %bb.0:
subq $24, %rsp
.cfi_def_cfa_offset 32
leaq 8(%rsp), %rdi
xorl %esi, %esi
callq gettimeofday
imulq $1000, 8(%rs... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
# include <iostream>
# include <fstream>
# include <cstdlib>
# include <cmath>
# include <vector>
using namespace std;
struct number{ //struktura wykorzystywana w wektorze danych - zawiera informacje o wartosci liczby oraz o tym czy jest pierwsza
unsigned ... | code for sm_80
Function : _Z12primeTestingP6numberjj
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ IMAD.MOV.U32 R0, RZ, RZ, c[0x0][0x168] ; /* 0x00005... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
# include <iostream>
# include <fstream>
# include <cstdlib>
# include <cmath>
# include <vector>
using namespace std;
struct number{ //struktura wykorzystywana w wektorze danych - zawiera informacje o wartosci liczby oraz o tym czy jest pierwsza
unsigned ... | .file "tmpxft_0000545e_00000000-6_primes_gpu.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4176:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cud... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
# include <iostream>
# include <fstream>
# include <cstdlib>
# include <cmath>
# include <vector>
using namespace std;
struct number{ //struktura wykorzystywana w wektorze danych - zawiera informacje o wartosci liczby oraz o tym czy jest pierwsza
unsigned ... | #include "hip/hip_runtime.h"
# include <iostream>
# include <fstream>
# include <cstdlib>
# include <cmath>
# include <vector>
using namespace std;
struct number{ //struktura wykorzystywana w wektorze danych - zawiera informacje o wartosci liczby oraz o tym czy jest pierwsza
unsigned long int value;
bool prime;
};
__gl... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include "hip/hip_runtime.h"
# include <iostream>
# include <fstream>
# include <cstdlib>
# include <cmath>
# include <vector>
using namespace std;
struct number{ //struktura wykorzystywana w wektorze danych - zawiera informacje o wartosci liczby oraz o tym czy jest pierwsza
unsigned long int value;
bool prime;
};
__gl... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12primeTestingP6numberjj
.globl _Z12primeTestingP6numberjj
.p2align 8
.type _Z12primeTestingP6numberjj,@function
_Z12primeTestingP6numberjj:
s_load_b32 s3, s[0:1], 0x8
s_mov_b32 s2, 2
s_waitcnt lgkmcnt(0)
s_cmp_lt_u32 s3, 2
s_cbranch_scc1 .LBB... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include "hip/hip_runtime.h"
# include <iostream>
# include <fstream>
# include <cstdlib>
# include <cmath>
# include <vector>
using namespace std;
struct number{ //struktura wykorzystywana w wektorze danych - zawiera informacje o wartosci liczby oraz o tym czy jest pierwsza
unsigned long int value;
bool prime;
};
__gl... | .text
.file "primes_gpu.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z27__device_stub__primeTestingP6numberjj # -- Begin function _Z27__device_stub__primeTestingP6n... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z12primeTestingP6numberjj
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ IMAD.MOV.U32 R0, RZ, RZ, c[0x0][0x168] ; /* 0x00005... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12primeTestingP6numberjj
.globl _Z12primeTestingP6numberjj
.p2align 8
.type _Z12primeTestingP6numberjj,@function
_Z12primeTestingP6numberjj:
s_load_b32 s3, s[0:1], 0x8
s_mov_b32 s2, 2
s_waitcnt lgkmcnt(0)
s_cmp_lt_u32 s3, 2
s_cbranch_scc1 .LBB... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0000545e_00000000-6_primes_gpu.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4176:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cud... | .text
.file "primes_gpu.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z27__device_stub__primeTestingP6numberjj # -- Begin function _Z27__device_stub__primeTestingP6n... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "cuda_class.cuh"
__global__ void Kernel (uint32_t *d_a, uint32_t *d_b, uint32_t *d_c){
uint32_t idx = blockDim.x * blockIdx.x + threadIdx.x;
uint32_t idy = blockDim.y * blockIdx.y + threadIdx.y;
uint32_t tid = idx + idy * blockDim.x * gridDim.x;
d_c[tid] = d_a[tid] + d_b[tid];
};
CudaClass::CudaClass(uint32_t ... | code for sm_80
Function : _Z6KernelPjS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */
/* 0x000e220000002600 */
/*0020*/... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "cuda_class.cuh"
__global__ void Kernel (uint32_t *d_a, uint32_t *d_b, uint32_t *d_c){
uint32_t idx = blockDim.x * blockIdx.x + threadIdx.x;
uint32_t idy = blockDim.y * blockIdx.y + threadIdx.y;
uint32_t tid = idx + idy * blockDim.x * gridDim.x;
d_c[tid] = d_a[tid] + d_b[tid];
};
CudaClass::CudaClass(uint32_t ... | .file "tmpxft_000795a4_00000000-6_cuda_class.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2067:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %r... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "cuda_class.cuh"
__global__ void Kernel (uint32_t *d_a, uint32_t *d_b, uint32_t *d_c){
uint32_t idx = blockDim.x * blockIdx.x + threadIdx.x;
uint32_t idy = blockDim.y * blockIdx.y + threadIdx.y;
uint32_t tid = idx + idy * blockDim.x * gridDim.x;
d_c[tid] = d_a[tid] + d_b[tid];
};
CudaClass::CudaClass(uint32_t ... | #ifndef MY__CUDA__CLASS__HEADER__
#define MY__CUDA__CLASS__HEADER__
#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdint.h>
class CudaClass{
uint32_t *d_a, *d_b, *d_c;
uint32_t *h_a, *h_b, *h_c;
uint32_t *h_zeros;
uint32_t mem_size;
uint32_t length;
public:
CudaClass(uint32_t *h_a, uint32_t *h_b, uint32_t *... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #ifndef MY__CUDA__CLASS__HEADER__
#define MY__CUDA__CLASS__HEADER__
#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdint.h>
class CudaClass{
uint32_t *d_a, *d_b, *d_c;
uint32_t *h_a, *h_b, *h_c;
uint32_t *h_zeros;
uint32_t mem_size;
uint32_t length;
public:
CudaClass(uint32_t *h_a, uint32_t *h_b, uint32_t *... | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #ifndef MY__CUDA__CLASS__HEADER__
#define MY__CUDA__CLASS__HEADER__
#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdint.h>
class CudaClass{
uint32_t *d_a, *d_b, *d_c;
uint32_t *h_a, *h_b, *h_c;
uint32_t *h_zeros;
uint32_t mem_size;
uint32_t length;
public:
CudaClass(uint32_t *h_a, uint32_t *h_b, uint32_t *... | .text
.file "cuda_class.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-proje... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z6KernelPjS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */
/* 0x000e220000002600 */
/*0020*/... | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000795a4_00000000-6_cuda_class.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2067:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %r... | .text
.file "cuda_class.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-proje... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | /*
@Author: 3sne ( Mukur Panchani )
@FileName: q1FindSubstring.cu
@Task: CUDA program that finds a substring in a given string.
*/
#include <stdio.h>
#include <stdlib.h>
#include <cuda_runtime.h>
void resetBuf(char* b, int blen) {
for ( int i = 0; i < blen; i++ )
b[i] = '\0';
}
__global__ void findSs(char *text, char ... | code for sm_80
Function : _Z6findSsPcS_Pii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e22000000... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /*
@Author: 3sne ( Mukur Panchani )
@FileName: q1FindSubstring.cu
@Task: CUDA program that finds a substring in a given string.
*/
#include <stdio.h>
#include <stdlib.h>
#include <cuda_runtime.h>
void resetBuf(char* b, int blen) {
for ( int i = 0; i < blen; i++ )
b[i] = '\0';
}
__global__ void findSs(char *text, char ... | .file "tmpxft_0004df85_00000000-6_q1FindSubString.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /*
@Author: 3sne ( Mukur Panchani )
@FileName: q1FindSubstring.cu
@Task: CUDA program that finds a substring in a given string.
*/
#include <stdio.h>
#include <stdlib.h>
#include <cuda_runtime.h>
void resetBuf(char* b, int blen) {
for ( int i = 0; i < blen; i++ )
b[i] = '\0';
}
__global__ void findSs(char *text, char ... | /*
@Author: 3sne ( Mukur Panchani )
@FileName: q1FindSubstring.cu
@Task: CUDA program that finds a substring in a given string.
*/
#include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
void resetBuf(char* b, int blen) {
for ( int i = 0; i < blen; i++ )
b[i] = '\0';
}
__global__ void findSs(char *text, ch... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | /*
@Author: 3sne ( Mukur Panchani )
@FileName: q1FindSubstring.cu
@Task: CUDA program that finds a substring in a given string.
*/
#include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
void resetBuf(char* b, int blen) {
for ( int i = 0; i < blen; i++ )
b[i] = '\0';
}
__global__ void findSs(char *text, ch... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6findSsPcS_Pii
.globl _Z6findSsPcS_Pii
.p2align 8
.type _Z6findSsPcS_Pii,@function
_Z6findSsPcS_Pii:
s_clause 0x1
s_load_b32 s6, s[0:1], 0x18
s_load_b64 s[4:5], s[0:1], 0x10
v_dual_mov_b32 v1, 1 :: v_dual_lshlrev_b32 v2, 2, v0... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | /*
@Author: 3sne ( Mukur Panchani )
@FileName: q1FindSubstring.cu
@Task: CUDA program that finds a substring in a given string.
*/
#include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
void resetBuf(char* b, int blen) {
for ( int i = 0; i < blen; i++ )
b[i] = '\0';
}
__global__ void findSs(char *text, ch... | .text
.file "q1FindSubString.hip"
.globl _Z8resetBufPci # -- Begin function _Z8resetBufPci
.p2align 4, 0x90
.type _Z8resetBufPci,@function
_Z8resetBufPci: # @_Z8resetBufPci
.cfi_startproc
# %bb.0:
testl %esi, %esi
jle .LBB0_1
# %bb.2: # %.lr.ph.pre... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z6findSsPcS_Pii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e22000000... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6findSsPcS_Pii
.globl _Z6findSsPcS_Pii
.p2align 8
.type _Z6findSsPcS_Pii,@function
_Z6findSsPcS_Pii:
s_clause 0x1
s_load_b32 s6, s[0:1], 0x18
s_load_b64 s[4:5], s[0:1], 0x10
v_dual_mov_b32 v1, 1 :: v_dual_lshlrev_b32 v2, 2, v0... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0004df85_00000000-6_q1FindSubString.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $... | .text
.file "q1FindSubString.hip"
.globl _Z8resetBufPci # -- Begin function _Z8resetBufPci
.p2align 4, 0x90
.type _Z8resetBufPci,@function
_Z8resetBufPci: # @_Z8resetBufPci
.cfi_startproc
# %bb.0:
testl %esi, %esi
jle .LBB0_1
# %bb.2: # %.lr.ph.pre... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <stdlib.h>
#include <inttypes.h>
#include <math.h>
#include <tiffio.h>
#include <cuda.h>
#include <cuComplex.h>
__device__ float distcalc(unsigned int bidx, unsigned int bidy, unsigned int width, unsigned int height, float pinholedist, float pixelsize){
float xcon, ycon, Rxy;
xcon = (((float... | code for sm_80
Function : _Z20gpurefwavecalckernelP6float2jjfff
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R8, SR_CTAID.X ; /* 0x00000000000879... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <inttypes.h>
#include <math.h>
#include <tiffio.h>
#include <cuda.h>
#include <cuComplex.h>
__device__ float distcalc(unsigned int bidx, unsigned int bidy, unsigned int width, unsigned int height, float pinholedist, float pixelsize){
float xcon, ycon, Rxy;
xcon = (((float... | .file "tmpxft_00095f4d_00000000-6_gpurefwavecalc.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2084:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#include <inttypes.h>
#include <math.h>
#include <tiffio.h>
#include <cuda.h>
#include <cuComplex.h>
__device__ float distcalc(unsigned int bidx, unsigned int bidy, unsigned int width, unsigned int height, float pinholedist, float pixelsize){
float xcon, ycon, Rxy;
xcon = (((float... | #include <stdio.h>
#include <stdlib.h>
#include <inttypes.h>
#include <math.h>
#include <tiffio.h>
#include <hip/hip_runtime.h>
#include <hip/hip_complex.h>
__device__ float distcalc(unsigned int bidx, unsigned int bidy, unsigned int width, unsigned int height, float pinholedist, float pixelsize){
float xcon, ycon, Rxy... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <stdio.h>
#include <stdlib.h>
#include <inttypes.h>
#include <math.h>
#include <tiffio.h>
#include <hip/hip_runtime.h>
#include <hip/hip_complex.h>
__device__ float distcalc(unsigned int bidx, unsigned int bidy, unsigned int width, unsigned int height, float pinholedist, float pixelsize){
float xcon, ycon, Rxy... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z20gpurefwavecalckernelP15HIP_vector_typeIfLj2EEjjfff
.globl _Z20gpurefwavecalckernelP15HIP_vector_typeIfLj2EEjjfff
.p2align 8
.type _Z20gpurefwavecalckernelP15HIP_vector_typeIfLj2EEjjfff,@function
_Z20gpurefwavecalckernelP15HIP_vector_typeIfLj2EEjjfff:
s_... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <inttypes.h>
#include <math.h>
#include <tiffio.h>
#include <hip/hip_runtime.h>
#include <hip/hip_complex.h>
__device__ float distcalc(unsigned int bidx, unsigned int bidy, unsigned int width, unsigned int height, float pinholedist, float pixelsize){
float xcon, ycon, Rxy... | .text
.file "gpurefwavecalc.hip"
.globl _Z35__device_stub__gpurefwavecalckernelP15HIP_vector_typeIfLj2EEjjfff # -- Begin function _Z35__device_stub__gpurefwavecalckernelP15HIP_vector_typeIfLj2EEjjfff
.p2align 4, 0x90
.type _Z35__device_stub__gpurefwavecalckernelP15HIP_vector_typeIfLj2EEjjfff,@function
_Z35__device_stub... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z20gpurefwavecalckernelP6float2jjfff
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R8, SR_CTAID.X ; /* 0x00000000000879... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z20gpurefwavecalckernelP15HIP_vector_typeIfLj2EEjjfff
.globl _Z20gpurefwavecalckernelP15HIP_vector_typeIfLj2EEjjfff
.p2align 8
.type _Z20gpurefwavecalckernelP15HIP_vector_typeIfLj2EEjjfff,@function
_Z20gpurefwavecalckernelP15HIP_vector_typeIfLj2EEjjfff:
s_... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00095f4d_00000000-6_gpurefwavecalc.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2084:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8... | .text
.file "gpurefwavecalc.hip"
.globl _Z35__device_stub__gpurefwavecalckernelP15HIP_vector_typeIfLj2EEjjfff # -- Begin function _Z35__device_stub__gpurefwavecalckernelP15HIP_vector_typeIfLj2EEjjfff
.p2align 4, 0x90
.type _Z35__device_stub__gpurefwavecalckernelP15HIP_vector_typeIfLj2EEjjfff,@function
_Z35__device_stub... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | /**
* Copyright 1993-2015 NVIDIA Corporation. All rights reserved.
*
* Please refer to the NVIDIA end user license agreement (EULA) associated
* with this source code for terms and conditions that govern your use of
* this software. Any use, reproduction, disclosure, or distribution of
* this software and related docum... | code for sm_80
Function : _Z13matrixMulCUDAPfS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e220000002500 */
... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /**
* Copyright 1993-2015 NVIDIA Corporation. All rights reserved.
*
* Please refer to the NVIDIA end user license agreement (EULA) associated
* with this source code for terms and conditions that govern your use of
* this software. Any use, reproduction, disclosure, or distribution of
* this software and related docum... | .file "tmpxft_0019075d_00000000-6_matrixMulNaive.cudafe1.cpp"
.text
#APP
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%s in %s at line %d\n"
#NO_APP
.text
.type _ZL11handleError9cudaErrorPKci, @function
_ZL11handleError9cudaErrorPKci:
.LFB2057:
.cfi_startproc
testl %edi, %edi
jne .L6
ret
.L6:
pushq %rbp
.cf... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /**
* Copyright 1993-2015 NVIDIA Corporation. All rights reserved.
*
* Please refer to the NVIDIA end user license agreement (EULA) associated
* with this source code for terms and conditions that govern your use of
* this software. Any use, reproduction, disclosure, or distribution of
* this software and related docum... | /**
* Copyright 1993-2015 NVIDIA Corporation. All rights reserved.
*
* Please refer to the NVIDIA end user license agreement (EULA) associated
* with this source code for terms and conditions that govern your use of
* this software. Any use, reproduction, disclosure, or distribution of
* this software and related docum... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | /**
* Copyright 1993-2015 NVIDIA Corporation. All rights reserved.
*
* Please refer to the NVIDIA end user license agreement (EULA) associated
* with this source code for terms and conditions that govern your use of
* this software. Any use, reproduction, disclosure, or distribution of
* this software and related docum... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z13matrixMulCUDAPfS_S_
.globl _Z13matrixMulCUDAPfS_S_
.p2align 8
.type _Z13matrixMulCUDAPfS_S_,@function
_Z13matrixMulCUDAPfS_S_:
v_and_b32_e32 v1, 0x3ff, v0
s_load_b128 s[4:7], s[0:1], 0x8
v_bfe_u32 v5, v0, 10, 10
s_mov_b64 s[2:3], 0
s_dela... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | /**
* Copyright 1993-2015 NVIDIA Corporation. All rights reserved.
*
* Please refer to the NVIDIA end user license agreement (EULA) associated
* with this source code for terms and conditions that govern your use of
* this software. Any use, reproduction, disclosure, or distribution of
* this software and related docum... | .text
.file "matrixMulNaive.hip"
.globl _Z28__device_stub__matrixMulCUDAPfS_S_ # -- Begin function _Z28__device_stub__matrixMulCUDAPfS_S_
.p2align 4, 0x90
.type _Z28__device_stub__matrixMulCUDAPfS_S_,@function
_Z28__device_stub__matrixMulCUDAPfS_S_: # @_Z28__device_stub__matrixMulCUDAPfS_S_
.cfi_startproc
# %bb.0:
subq... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z13matrixMulCUDAPfS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e220000002500 */
... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z13matrixMulCUDAPfS_S_
.globl _Z13matrixMulCUDAPfS_S_
.p2align 8
.type _Z13matrixMulCUDAPfS_S_,@function
_Z13matrixMulCUDAPfS_S_:
v_and_b32_e32 v1, 0x3ff, v0
s_load_b128 s[4:7], s[0:1], 0x8
v_bfe_u32 v5, v0, 10, 10
s_mov_b64 s[2:3], 0
s_dela... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0019075d_00000000-6_matrixMulNaive.cudafe1.cpp"
.text
#APP
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%s in %s at line %d\n"
#NO_APP
.text
.type _ZL11handleError9cudaErrorPKci, @function
_ZL11handleError9cudaErrorPKci:
.LFB2057:
.cfi_startproc
testl %edi, %edi
jne .L6
ret
.L6:
pushq %rbp
.cf... | .text
.file "matrixMulNaive.hip"
.globl _Z28__device_stub__matrixMulCUDAPfS_S_ # -- Begin function _Z28__device_stub__matrixMulCUDAPfS_S_
.p2align 4, 0x90
.type _Z28__device_stub__matrixMulCUDAPfS_S_,@function
_Z28__device_stub__matrixMulCUDAPfS_S_: # @_Z28__device_stub__matrixMulCUDAPfS_S_
.cfi_startproc
# %bb.0:
subq... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <assert.h>
#include <pthread.h>
#define THREADS 4
int intervalsT=100000000;
double store,base;
double partialStore[]={0.0, 0.0, 0.0, 0.0};
void *threadRoutine(void *param) {
int i;
int *threadId = (int *)param;
int partialInterval = intervalsT/THREADS;
double height;
double x;
for (i= (*thre... | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <assert.h>
#include <pthread.h>
#define THREADS 4
int intervalsT=100000000;
double store,base;
double partialStore[]={0.0, 0.0, 0.0, 0.0};
void *threadRoutine(void *param) {
int i;
int *threadId = (int *)param;
int partialInterval = intervalsT/THREADS;
double height;
double x;
for (i= (*thre... | .file "tmpxft_000a21a6_00000000-6_03pi.cudafe1.cpp"
.text
#APP
#NO_APP
.globl _Z13threadRoutinePv
.type _Z13threadRoutinePv, @function
_Z13threadRoutinePv:
.LFB2067:
.cfi_startproc
endbr64
movq %rdi, %r8
movl intervalsT(%rip), %eax
leal 3(%rax), %edi
testl %eax, %eax
cmovns %eax, %edi
sarl $2, %edi
movl (%r8), %eax
mov... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <assert.h>
#include <pthread.h>
#define THREADS 4
int intervalsT=100000000;
double store,base;
double partialStore[]={0.0, 0.0, 0.0, 0.0};
void *threadRoutine(void *param) {
int i;
int *threadId = (int *)param;
int partialInterval = intervalsT/THREADS;
double height;
double x;
for (i= (*thre... | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <assert.h>
#include <pthread.h>
#define THREADS 4
int intervalsT=100000000;
double store,base;
double partialStore[]={0.0, 0.0, 0.0, 0.0};
void *threadRoutine(void *param) {
int i;
int *threadId = (int *)param;
int partialInterval = intervalsT/THREADS;
double hei... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <assert.h>
#include <pthread.h>
#define THREADS 4
int intervalsT=100000000;
double store,base;
double partialStore[]={0.0, 0.0, 0.0, 0.0};
void *threadRoutine(void *param) {
int i;
int *threadId = (int *)param;
int partialInterval = intervalsT/THREADS;
double hei... | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <assert.h>
#include <pthread.h>
#define THREADS 4
int intervalsT=100000000;
double store,base;
double partialStore[]={0.0, 0.0, 0.0, 0.0};
void *threadRoutine(void *param) {
int i;
int *threadId = (int *)param;
int partialInterval = intervalsT/THREADS;
double hei... | .text
.file "03pi.hip"
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function _Z13threadRoutinePv
.LCPI0_0:
.quad 0x3ff0000000000000 # double 1
.LCPI0_1:
.quad 0x4010000000000000 # double 4
.text
.globl _Z13threadRoutinePv
.p2align 4, 0x90
.type _Z1... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000a21a6_00000000-6_03pi.cudafe1.cpp"
.text
#APP
#NO_APP
.globl _Z13threadRoutinePv
.type _Z13threadRoutinePv, @function
_Z13threadRoutinePv:
.LFB2067:
.cfi_startproc
endbr64
movq %rdi, %r8
movl intervalsT(%rip), %eax
leal 3(%rax), %edi
testl %eax, %eax
cmovns %eax, %edi
sarl $2, %edi
movl (%r8), %eax
mov... | .text
.file "03pi.hip"
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function _Z13threadRoutinePv
.LCPI0_0:
.quad 0x3ff0000000000000 # double 1
.LCPI0_1:
.quad 0x4010000000000000 # double 4
.text
.globl _Z13threadRoutinePv
.p2align 4, 0x90
.type _Z1... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void msecost(float* predictions, float* target, int size, float* cost) {
int index = blockIdx.x * blockDim.x + threadIdx.x;
if (index < size) {
float partial_cost = (predictions[index] - target[index]) * (predictions[index] - target[index]);
atomicAdd(cost, partial_cost / size);
}
} | code for sm_80
Function : _Z7msecostPfS_iS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e28000... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void msecost(float* predictions, float* target, int size, float* cost) {
int index = blockIdx.x * blockDim.x + threadIdx.x;
if (index < size) {
float partial_cost = (predictions[index] - target[index]) * (predictions[index] - target[index]);
atomicAdd(cost, partial_cost / size);
}
} | .file "tmpxft_0017ab8b_00000000-6_msecost.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void msecost(float* predictions, float* target, int size, float* cost) {
int index = blockIdx.x * blockDim.x + threadIdx.x;
if (index < size) {
float partial_cost = (predictions[index] - target[index]) * (predictions[index] - target[index]);
atomicAdd(cost, partial_cost / size);
}
} | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void msecost(float* predictions, float* target, int size, float* cost) {
int index = blockIdx.x * blockDim.x + threadIdx.x;
if (index < size) {
float partial_cost = (predictions[index] - target[index]) * (predictions[index] - target[index]);
atomicAdd(cost, ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void msecost(float* predictions, float* target, int size, float* cost) {
int index = blockIdx.x * blockDim.x + threadIdx.x;
if (index < size) {
float partial_cost = (predictions[index] - target[index]) * (predictions[index] - target[index]);
atomicAdd(cost, ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z7msecostPfS_iS_
.globl _Z7msecostPfS_iS_
.p2align 8
.type _Z7msecostPfS_iS_,@function
_Z7msecostPfS_iS_:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void msecost(float* predictions, float* target, int size, float* cost) {
int index = blockIdx.x * blockDim.x + threadIdx.x;
if (index < size) {
float partial_cost = (predictions[index] - target[index]) * (predictions[index] - target[index]);
atomicAdd(cost, ... | .text
.file "msecost.hip"
.globl _Z22__device_stub__msecostPfS_iS_ # -- Begin function _Z22__device_stub__msecostPfS_iS_
.p2align 4, 0x90
.type _Z22__device_stub__msecostPfS_iS_,@function
_Z22__device_stub__msecostPfS_iS_: # @_Z22__device_stub__msecostPfS_iS_
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_of... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z7msecostPfS_iS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e28000... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z7msecostPfS_iS_
.globl _Z7msecostPfS_iS_
.p2align 8
.type _Z7msecostPfS_iS_,@function
_Z7msecostPfS_iS_:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0017ab8b_00000000-6_msecost.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
... | .text
.file "msecost.hip"
.globl _Z22__device_stub__msecostPfS_iS_ # -- Begin function _Z22__device_stub__msecostPfS_iS_
.p2align 4, 0x90
.type _Z22__device_stub__msecostPfS_iS_,@function
_Z22__device_stub__msecostPfS_iS_: # @_Z22__device_stub__msecostPfS_iS_
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_of... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | //Usage: diff3dp-cuda4 natom box gpu_id k_min delta_k k_max
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <errno.h>
#include <math.h>
#include <unistd.h>
#define _USE_MATH_DEFINES
#define BS 512
#define CHECK(x)\
{cudaError_t err = (x);\
if (err != cudaSuccess) {\
printf("API error failed %s:%d Re... | .file "tmpxft_000b1c55_00000000-6_diff3dp-cuda4.cudafe1.cpp"
.text
#APP
#NO_APP
.globl _Z15compare_doublesPKvS0_
.type _Z15compare_doublesPKvS0_, @function
_Z15compare_doublesPKvS0_:
.LFB2072:
.cfi_startproc
endbr64
movsd (%rdi), %xmm0
movsd (%rsi), %xmm1
comisd %xmm1, %xmm0
seta %al
movzbl %al, %eax
comisd %xmm0, %xmm... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | //Usage: diff3dp-cuda4 natom box gpu_id k_min delta_k k_max
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <errno.h>
#include <math.h>
#include <unistd.h>
#define _USE_MATH_DEFINES
#define BS 512
#define CHECK(x)\
{cudaError_t err = (x);\
if (err != cudaSuccess) {\
printf("API error failed %s:%d Re... | //Usage: diff3dp-cuda4 natom box gpu_id k_min delta_k k_max
#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <errno.h>
#include <math.h>
#include <unistd.h>
#define _USE_MATH_DEFINES
#define BS 512
#define CHECK(x)\
{hipError_t err = (x);\
if (err != hipSuccess) {\
printf... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | //Usage: diff3dp-cuda4 natom box gpu_id k_min delta_k k_max
#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <errno.h>
#include <math.h>
#include <unistd.h>
#define _USE_MATH_DEFINES
#define BS 512
#define CHECK(x)\
{hipError_t err = (x);\
if (err != hipSuccess) {\
printf... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z14diff_atom_loopPdidddS_S_
.globl _Z14diff_atom_loopPdidddS_S_
.p2align 8
.type _Z14diff_atom_loopPdidddS_S_,@function
_Z14diff_atom_loopPdidddS_S_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x44
s_load_b32 s33, s[0:1], 0x8
s_add_u32 s2, s0, 56
s_addc... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | //Usage: diff3dp-cuda4 natom box gpu_id k_min delta_k k_max
#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <errno.h>
#include <math.h>
#include <unistd.h>
#define _USE_MATH_DEFINES
#define BS 512
#define CHECK(x)\
{hipError_t err = (x);\
if (err != hipSuccess) {\
printf... | .text
.file "diff3dp-cuda4.hip"
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI0_0:
.quad 0x3fd0000000000000 # double 0.25
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include<stdio.h>
#define BLOCK_SIZE 4
__global__ void matrixMul(int* A, int* B, int wA, int wB, int* C) {
int bx = blockIdx.x;
int by = blockIdx.y;
int tx = threadIdx.x;
int ty = threadIdx.y;
int aBegin = wA * BLOCK_SIZE * by;
int aEnd = aBegin + wA - 1;
int aStep = BLOCK_SIZE;
int bBegin = BLOCK_SIZE * bx;
int b... | code for sm_80
Function : _Z9matrixMulPiS_iiS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2UR UR4, SR_CTAID.X ; /* 0x00000000000479c3 */
/* 0x000e220000002500 */
/... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include<stdio.h>
#define BLOCK_SIZE 4
__global__ void matrixMul(int* A, int* B, int wA, int wB, int* C) {
int bx = blockIdx.x;
int by = blockIdx.y;
int tx = threadIdx.x;
int ty = threadIdx.y;
int aBegin = wA * BLOCK_SIZE * by;
int aEnd = aBegin + wA - 1;
int aStep = BLOCK_SIZE;
int bBegin = BLOCK_SIZE * bx;
int b... | .file "tmpxft_0016eec5_00000000-6_matrix.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include<stdio.h>
#define BLOCK_SIZE 4
__global__ void matrixMul(int* A, int* B, int wA, int wB, int* C) {
int bx = blockIdx.x;
int by = blockIdx.y;
int tx = threadIdx.x;
int ty = threadIdx.y;
int aBegin = wA * BLOCK_SIZE * by;
int aEnd = aBegin + wA - 1;
int aStep = BLOCK_SIZE;
int bBegin = BLOCK_SIZE * bx;
int b... | #include <hip/hip_runtime.h>
#include<stdio.h>
#define BLOCK_SIZE 4
__global__ void matrixMul(int* A, int* B, int wA, int wB, int* C) {
int bx = blockIdx.x;
int by = blockIdx.y;
int tx = threadIdx.x;
int ty = threadIdx.y;
int aBegin = wA * BLOCK_SIZE * by;
int aEnd = aBegin + wA - 1;
int aStep = BLOCK_SIZE;
int bB... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include<stdio.h>
#define BLOCK_SIZE 4
__global__ void matrixMul(int* A, int* B, int wA, int wB, int* C) {
int bx = blockIdx.x;
int by = blockIdx.y;
int tx = threadIdx.x;
int ty = threadIdx.y;
int aBegin = wA * BLOCK_SIZE * by;
int aEnd = aBegin + wA - 1;
int aStep = BLOCK_SIZE;
int bB... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9matrixMulPiS_iiS_
.globl _Z9matrixMulPiS_iiS_
.p2align 8
.type _Z9matrixMulPiS_iiS_,@function
_Z9matrixMulPiS_iiS_:
s_load_b64 s[2:3], s[0:1], 0x10
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v5, v0, 10, 10
s_lshl_b32 s9, s14, 2
s_waitcnt ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include<stdio.h>
#define BLOCK_SIZE 4
__global__ void matrixMul(int* A, int* B, int wA, int wB, int* C) {
int bx = blockIdx.x;
int by = blockIdx.y;
int tx = threadIdx.x;
int ty = threadIdx.y;
int aBegin = wA * BLOCK_SIZE * by;
int aEnd = aBegin + wA - 1;
int aStep = BLOCK_SIZE;
int bB... | .text
.file "matrix.hip"
.globl _Z24__device_stub__matrixMulPiS_iiS_ # -- Begin function _Z24__device_stub__matrixMulPiS_iiS_
.p2align 4, 0x90
.type _Z24__device_stub__matrixMulPiS_iiS_,@function
_Z24__device_stub__matrixMulPiS_iiS_: # @_Z24__device_stub__matrixMulPiS_iiS_
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z9matrixMulPiS_iiS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2UR UR4, SR_CTAID.X ; /* 0x00000000000479c3 */
/* 0x000e220000002500 */
/... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9matrixMulPiS_iiS_
.globl _Z9matrixMulPiS_iiS_
.p2align 8
.type _Z9matrixMulPiS_iiS_,@function
_Z9matrixMulPiS_iiS_:
s_load_b64 s[2:3], s[0:1], 0x10
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v5, v0, 10, 10
s_lshl_b32 s9, s14, 2
s_waitcnt ... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0016eec5_00000000-6_matrix.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... | .text
.file "matrix.hip"
.globl _Z24__device_stub__matrixMulPiS_iiS_ # -- Begin function _Z24__device_stub__matrixMulPiS_iiS_
.p2align 4, 0x90
.type _Z24__device_stub__matrixMulPiS_iiS_,@function
_Z24__device_stub__matrixMulPiS_iiS_: # @_Z24__device_stub__matrixMulPiS_iiS_
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <cuda_runtime.h>
#include <device_launch_parameters.h>
#include <cufft.h>
#include <stdlib.h>
#include <stdio.h>
#include <time.h>
#define TPBx 32 // TPBx * TPBy = number of threads per block
#define TPBy 32
__global__ void real2complex(cufftDoubleComplex *c, double *a, int n);
__global__ void complex2real_sc... | code for sm_80
Function : _Z13solve_poissonP7double2PdS1_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R15, SR_CTAID.Y ; /* 0x00000000000f7919 *... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <cuda_runtime.h>
#include <device_launch_parameters.h>
#include <cufft.h>
#include <stdlib.h>
#include <stdio.h>
#include <time.h>
#define TPBx 32 // TPBx * TPBy = number of threads per block
#define TPBy 32
__global__ void real2complex(cufftDoubleComplex *c, double *a, int n);
__global__ void complex2real_sc... | .file "tmpxft_001ad726_00000000-6_poisson2D_ErrStat.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2090:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <cuda_runtime.h>
#include <device_launch_parameters.h>
#include <cufft.h>
#include <stdlib.h>
#include <stdio.h>
#include <time.h>
#define TPBx 32 // TPBx * TPBy = number of threads per block
#define TPBy 32
__global__ void real2complex(cufftDoubleComplex *c, double *a, int n);
__global__ void complex2real_sc... | #include <hip/hip_runtime.h>
#include <hipfft/hipfft.h>
#include <stdlib.h>
#include <stdio.h>
#include <time.h>
#define TPBx 32 // TPBx * TPBy = number of threads per block
#define TPBy 32
__global__ void real2complex(hipfftDoubleComplex *c, double *a, int n);
__global__ void complex2real_scaled(double *a, hipfftDoub... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <hipfft/hipfft.h>
#include <stdlib.h>
#include <stdio.h>
#include <time.h>
#define TPBx 32 // TPBx * TPBy = number of threads per block
#define TPBy 32
__global__ void real2complex(hipfftDoubleComplex *c, double *a, int n);
__global__ void complex2real_scaled(double *a, hipfftDoub... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12real2complexP15HIP_vector_typeIdLj2EEPdi
.globl _Z12real2complexP15HIP_vector_typeIdLj2EEPdi
.p2align 8
.type _Z12real2complexP15HIP_vector_typeIdLj2EEPdi,@function
_Z12real2complexP15HIP_vector_typeIdLj2EEPdi:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x24
s... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z13solve_poissonP7double2PdS1_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R15, SR_CTAID.Y ; /* 0x00000000000f7919 *... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12real2complexP15HIP_vector_typeIdLj2EEPdi
.globl _Z12real2complexP15HIP_vector_typeIdLj2EEPdi
.p2align 8
.type _Z12real2complexP15HIP_vector_typeIdLj2EEPdi,@function
_Z12real2complexP15HIP_vector_typeIdLj2EEPdi:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x24
s... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | /*
* Copyright 2014-2015 NVIDIA Corporation. All rights reserved.
*
* Sample CUPTI app to demonstrate the usage of unified memory counter profiling
*
*/
#include <stdio.h>
#include <cuda.h>
#include <stdlib.h>
#define CUPTI_CALL(call) \
do { \
CUptiResult _status = call; \
if (_status != CUPTI_SUCCESS) { \
const char ... | code for sm_80
Function : _Z10testKernelPiii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fc600078e00ff */
/*0010*/ IMAD.MOV.U32 R23, RZ, RZ, c[0x0][0x168] ; /* 0x00005a00ff17... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /*
* Copyright 2014-2015 NVIDIA Corporation. All rights reserved.
*
* Sample CUPTI app to demonstrate the usage of unified memory counter profiling
*
*/
#include <stdio.h>
#include <cuda.h>
#include <stdlib.h>
#define CUPTI_CALL(call) \
do { \
CUptiResult _status = call; \
if (_status != CUPTI_SUCCESS) { \
const char ... | .file "tmpxft_00048469_00000000-6_um.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2062:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /*
* Copyright 2014-2015 NVIDIA Corporation. All rights reserved.
*
* Sample CUPTI app to demonstrate the usage of unified memory counter profiling
*
*/
#include <stdio.h>
#include <cuda.h>
#include <stdlib.h>
#define CUPTI_CALL(call) \
do { \
CUptiResult _status = call; \
if (_status != CUPTI_SUCCESS) { \
const char ... | /*
* Copyright 2014-2015 NVIDIA Corporation. All rights reserved.
*
* Sample CUPTI app to demonstrate the usage of unified memory counter profiling
*
*/
#include <stdio.h>
#include <hip/hip_runtime.h>
#include <stdlib.h>
#define CUPTI_CALL(call) \
do { \
CUptiResult _status = call; \
if (_status != CUPTI_SUCCESS) { \
... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | /*
* Copyright 2014-2015 NVIDIA Corporation. All rights reserved.
*
* Sample CUPTI app to demonstrate the usage of unified memory counter profiling
*
*/
#include <stdio.h>
#include <hip/hip_runtime.h>
#include <stdlib.h>
#define CUPTI_CALL(call) \
do { \
CUptiResult _status = call; \
if (_status != CUPTI_SUCCESS) { \
... | .text
.file "um.hip"
.globl _Z25__device_stub__testKernelPiii # -- Begin function _Z25__device_stub__testKernelPiii
.p2align 4, 0x90
.type _Z25__device_stub__testKernelPiii,@function
_Z25__device_stub__testKernelPiii: # @_Z25__device_stub__testKernelPiii
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 9... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00048469_00000000-6_um.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2062:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_... | .text
.file "um.hip"
.globl _Z25__device_stub__testKernelPiii # -- Begin function _Z25__device_stub__testKernelPiii
.p2align 4, 0x90
.type _Z25__device_stub__testKernelPiii,@function
_Z25__device_stub__testKernelPiii: # @_Z25__device_stub__testKernelPiii
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 9... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
__device__
int geti() {
int i = blockIdx.z;
i = i*gridDim.y + blockIdx.y;
i = i*gridDim.x + blockIdx.x;
i = i*blockDim.z + threadIdx.z;
i = i*blockDim.y + threadIdx.y;
i = i*blockDim.x + threadIdx.x;
return i;
}
__global__
void process_kernel1(const float *A, const float *B, float *C, const int numEl... | .file "tmpxft_000e3d85_00000000-6_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
__device__
int geti() {
int i = blockIdx.z;
i = i*gridDim.y + blockIdx.y;
i = i*gridDim.x + blockIdx.x;
i = i*blockDim.z + threadIdx.z;
i = i*blockDim.y + threadIdx.y;
i = i*blockDim.x + threadIdx.x;
return i;
}
__global__
void process_kernel1(const float *A, const float *B, float *C, const int numEl... | #include <hip/hip_runtime.h>
#include <stdio.h>
__device__
int geti() {
int i = blockIdx.z;
i = i*gridDim.y + blockIdx.y;
i = i*gridDim.x + blockIdx.x;
i = i*blockDim.z + threadIdx.z;
i = i*blockDim.y + threadIdx.y;
i = i*blockDim.x + threadIdx.x;
return i;
}
__global__
void process_kernel1(const float *A, const float ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
__device__
int geti() {
int i = blockIdx.z;
i = i*gridDim.y + blockIdx.y;
i = i*gridDim.x + blockIdx.x;
i = i*blockDim.z + threadIdx.z;
i = i*blockDim.y + threadIdx.y;
i = i*blockDim.x + threadIdx.x;
return i;
}
__global__
void process_kernel1(const float *A, const float ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z15process_kernel1PKfS0_Pfi
.globl _Z15process_kernel1PKfS0_Pfi
.p2align 8
.type _Z15process_kernel1PKfS0_Pfi,@function
_Z15process_kernel1PKfS0_Pfi:
s_clause 0x1
s_load_b64 s[2:3], s[0:1], 0x20
s_load_b64 s[4:5], s[0:1], 0x2c
s_add_u32 s6, s0, 3... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
__device__
int geti() {
int i = blockIdx.z;
i = i*gridDim.y + blockIdx.y;
i = i*gridDim.x + blockIdx.x;
i = i*blockDim.z + threadIdx.z;
i = i*blockDim.y + threadIdx.y;
i = i*blockDim.x + threadIdx.x;
return i;
}
__global__
void process_kernel1(const float *A, const float ... | .text
.file "kernel.hip"
.globl _Z30__device_stub__process_kernel1PKfS0_Pfi # -- Begin function _Z30__device_stub__process_kernel1PKfS0_Pfi
.p2align 4, 0x90
.type _Z30__device_stub__process_kernel1PKfS0_Pfi,@function
_Z30__device_stub__process_kernel1PKfS0_Pfi: # @_Z30__device_stub__process_kernel1PKfS0_Pfi
.cfi_startp... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000e3d85_00000000-6_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... | .text
.file "kernel.hip"
.globl _Z30__device_stub__process_kernel1PKfS0_Pfi # -- Begin function _Z30__device_stub__process_kernel1PKfS0_Pfi
.p2align 4, 0x90
.type _Z30__device_stub__process_kernel1PKfS0_Pfi,@function
_Z30__device_stub__process_kernel1PKfS0_Pfi: # @_Z30__device_stub__process_kernel1PKfS0_Pfi
.cfi_startp... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void ConditionCFLKernel2D2 (double *newDT, double *DT2D, double *DT1D, double *Vmoy, double *invRmed, int *CFL, int nsec, int nrad, double DeltaT)
{
int i = threadIdx.x + blockDim.x*blockIdx.x;
int k;
double dt;
double newdt = 1e30;
if (i>0 && i<nrad){
newDT[i] = newdt;
for (k = 0; k < ... | .file "tmpxft_000158ed_00000000-6_ConditionCFLKernel2D2.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
... |
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