system stringclasses 7
values | input stringlengths 10 94.5k | output stringlengths 14 55.5k |
|---|---|---|
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#include <iostream>
#include <assert.h>
#include <vector>
using namespace std;
const int INF = 10000000;
const int V = 10010;
const int MAX_THREAD_DIM2 = 32;
void input(char *inFileName, int B);
void output(char *outFileName);
void block_FW_2GPU(int B);
int ceil(int a, int b);
voi... | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <iostream>
#include <assert.h>
#include <vector>
using namespace std;
const int INF = 10000000;
const int V = 10010;
const int MAX_THREAD_DIM2 = 32;
void input(char *inFileName, int B);
void output(char *outFileName);
void block_FW_2GPU(int B)... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <iostream>
#include <assert.h>
#include <vector>
using namespace std;
const int INF = 10000000;
const int V = 10010;
const int MAX_THREAD_DIM2 = 32;
void input(char *inFileName, int B);
void output(char *outFileName);
void block_FW_2GPU(int B)... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6UpdateiiiiiPii
.globl _Z6UpdateiiiiiPii
.p2align 8
.type _Z6UpdateiiiiiPii,@function
_Z6UpdateiiiiiPii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x34
s_load_b128 s[4:7], s[0:1], 0x4
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v0, v0, 10, ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <iostream>
#include <assert.h>
#include <vector>
using namespace std;
const int INF = 10000000;
const int V = 10010;
const int MAX_THREAD_DIM2 = 32;
void input(char *inFileName, int B);
void output(char *outFileName);
void block_FW_2GPU(int B)... | .text
.file "HW4_x1054037_2GPU_Unified_bug.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.section .text.startup,"ax",@progbits
.p2align 4, 0x90 # -- ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <sys/time.h>
#include <cuda_runtime.h>
#include <math.h>
extern "C" void initialData(float *ip, int size) {
for (int i=0; i < size; i++) {
ip[i] = (float)rand()/(float)(RAND_MAX/10.0);
}
}
extern "C" void printHello(void) {
printf("HELLO from C\n");
}
extern "C" void print_matrix(float *c, c... | code for sm_80
Function : _Z18print_thread_indexPfii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R15, SR_TID.Y ; /* 0x00000000000f7919 */
/* 0x0... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <sys/time.h>
#include <cuda_runtime.h>
#include <math.h>
extern "C" void initialData(float *ip, int size) {
for (int i=0; i < size; i++) {
ip[i] = (float)rand()/(float)(RAND_MAX/10.0);
}
}
extern "C" void printHello(void) {
printf("HELLO from C\n");
}
extern "C" void print_matrix(float *c, c... | .file "tmpxft_00032b3a_00000000-6_matrixIndex.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2063:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <sys/time.h>
#include <cuda_runtime.h>
#include <math.h>
extern "C" void initialData(float *ip, int size) {
for (int i=0; i < size; i++) {
ip[i] = (float)rand()/(float)(RAND_MAX/10.0);
}
}
extern "C" void printHello(void) {
printf("HELLO from C\n");
}
extern "C" void print_matrix(float *c, c... | #include <stdio.h>
#include <sys/time.h>
#include <hip/hip_runtime.h>
#include <math.h>
extern "C" void initialData(float *ip, int size) {
for (int i=0; i < size; i++) {
ip[i] = (float)rand()/(float)(RAND_MAX/10.0);
}
}
extern "C" void printHello(void) {
printf("HELLO from C\n");
}
extern "C" void print_matrix(float *c... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <stdio.h>
#include <sys/time.h>
#include <hip/hip_runtime.h>
#include <math.h>
extern "C" void initialData(float *ip, int size) {
for (int i=0; i < size; i++) {
ip[i] = (float)rand()/(float)(RAND_MAX/10.0);
}
}
extern "C" void printHello(void) {
printf("HELLO from C\n");
}
extern "C" void print_matrix(float *c... | .text
.file "matrixIndex.hip"
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function initialData
.LCPI0_0:
.long 0x4d4ccccd # float 214748368
.text
.globl initialData
.p2align 4, 0x90
.type initialData,@function
initialData: # ... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00032b3a_00000000-6_matrixIndex.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2063:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... | .text
.file "matrixIndex.hip"
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function initialData
.LCPI0_0:
.long 0x4d4ccccd # float 214748368
.text
.globl initialData
.p2align 4, 0x90
.type initialData,@function
initialData: # ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <iostream>
#include <vector>
using namespace std;
__global__
void count_samples_in_circles(float* d_randNumsX, float* d_randNumsY, int* d_countInBlocks, int num_blocks, int nsamples)
{
__shared__ int shared_blocks[500];
int index = blockIdx.x * blockDim.x + threadIdx.x;
int stride = blockDim.x * num_blocks;
... | .file "tmpxft_0014b59b_00000000-6_pi_monte_carlo.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4035:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call _... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <iostream>
#include <vector>
using namespace std;
__global__
void count_samples_in_circles(float* d_randNumsX, float* d_randNumsY, int* d_countInBlocks, int num_blocks, int nsamples)
{
__shared__ int shared_blocks[500];
int index = blockIdx.x * blockDim.x + threadIdx.x;
int stride = blockDim.x * num_blocks;
... | #include <hip/hip_runtime.h>
#include <iostream>
#include <vector>
using namespace std;
__global__
void count_samples_in_circles(float* d_randNumsX, float* d_randNumsY, int* d_countInBlocks, int num_blocks, int nsamples)
{
__shared__ int shared_blocks[500];
int index = blockIdx.x * blockDim.x + threadIdx.x;
int strid... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <vector>
using namespace std;
__global__
void count_samples_in_circles(float* d_randNumsX, float* d_randNumsY, int* d_countInBlocks, int num_blocks, int nsamples)
{
__shared__ int shared_blocks[500];
int index = blockIdx.x * blockDim.x + threadIdx.x;
int strid... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z24count_samples_in_circlesPfS_Piii
.globl _Z24count_samples_in_circlesPfS_Piii
.p2align 8
.type _Z24count_samples_in_circlesPfS_Piii,@function
_Z24count_samples_in_circlesPfS_Piii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s9, s[0:1], 0x1c
s_m... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <vector>
using namespace std;
__global__
void count_samples_in_circles(float* d_randNumsX, float* d_randNumsY, int* d_countInBlocks, int num_blocks, int nsamples)
{
__shared__ int shared_blocks[500];
int index = blockIdx.x * blockDim.x + threadIdx.x;
int strid... | .text
.file "pi_monte_carlo.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z39__device_stub__count_samples_in_circlesPfS_Piii # -- Begin function _Z39__device_stub__c... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0014b59b_00000000-6_pi_monte_carlo.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4035:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call _... | .text
.file "pi_monte_carlo.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z39__device_stub__count_samples_in_circlesPfS_Piii # -- Begin function _Z39__device_stub__c... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
__global__ void no_divergence(int* input, dim3 size) {
int gid = blockIdx.x * blockDim.x + threadIdx.x;
if (gid < size.x) {
float a = 0.0;
int warp_id = gid / 32;
if (warp_id % 2 == 0) {
a = 100.0;
printf("warp(%d), a(%.0f)\n", warp_id, a);
} else {
a = 200.0;
printf("warp(%d), a(%.0f)\n", warp_id, a... | code for sm_80
Function : _Z10divergencePi4dim3
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fc800078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e2... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
__global__ void no_divergence(int* input, dim3 size) {
int gid = blockIdx.x * blockDim.x + threadIdx.x;
if (gid < size.x) {
float a = 0.0;
int warp_id = gid / 32;
if (warp_id % 2 == 0) {
a = 100.0;
printf("warp(%d), a(%.0f)\n", warp_id, a);
} else {
a = 200.0;
printf("warp(%d), a(%.0f)\n", warp_id, a... | .file "tmpxft_001ae7b0_00000000-6_warp_divergence.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
__global__ void no_divergence(int* input, dim3 size) {
int gid = blockIdx.x * blockDim.x + threadIdx.x;
if (gid < size.x) {
float a = 0.0;
int warp_id = gid / 32;
if (warp_id % 2 == 0) {
a = 100.0;
printf("warp(%d), a(%.0f)\n", warp_id, a);
} else {
a = 200.0;
printf("warp(%d), a(%.0f)\n", warp_id, a... | #include <hip/hip_runtime.h>
#include <stdio.h>
__global__ void no_divergence(int* input, dim3 size) {
int gid = blockIdx.x * blockDim.x + threadIdx.x;
if (gid < size.x) {
float a = 0.0;
int warp_id = gid / 32;
if (warp_id % 2 == 0) {
a = 100.0;
printf("warp(%d), a(%.0f)\n", warp_id, a);
} else {
a = 200.0;
printf("war... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
__global__ void no_divergence(int* input, dim3 size) {
int gid = blockIdx.x * blockDim.x + threadIdx.x;
if (gid < size.x) {
float a = 0.0;
int warp_id = gid / 32;
if (warp_id % 2 == 0) {
a = 100.0;
printf("warp(%d), a(%.0f)\n", warp_id, a);
} else {
a = 200.0;
printf("war... | .text
.file "warp_divergence.hip"
.globl _Z28__device_stub__no_divergencePi4dim3 # -- Begin function _Z28__device_stub__no_divergencePi4dim3
.p2align 4, 0x90
.type _Z28__device_stub__no_divergencePi4dim3,@function
_Z28__device_stub__no_divergencePi4dim3: # @_Z28__device_stub__no_divergencePi4dim3
.cfi_startproc
# %bb.0... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001ae7b0_00000000-6_warp_divergence.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $... | .text
.file "warp_divergence.hip"
.globl _Z28__device_stub__no_divergencePi4dim3 # -- Begin function _Z28__device_stub__no_divergencePi4dim3
.p2align 4, 0x90
.type _Z28__device_stub__no_divergencePi4dim3,@function
_Z28__device_stub__no_divergencePi4dim3: # @_Z28__device_stub__no_divergencePi4dim3
.cfi_startproc
# %bb.0... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
#define DOUBLE
#ifdef DOUBLE
#define Complex cufftDoubleComplex
#define Real double
#define Transform CUFFT_Z2Z
#define TransformExec cufftExecZ2Z
#else
#define Complex cufftComplex
#define Real float
#define Transform CUFFT_C2C
#define TransformExec cufftExecC2C
#endif
#define TILE_DIM 8
// synch... | code for sm_80
Function : _Z8spread_iPdjS_j
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R5, SR_TID.X ; /* 0x0000000000057919 */
/* 0x000e240000002100 */
/*0020*/... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
#define DOUBLE
#ifdef DOUBLE
#define Complex cufftDoubleComplex
#define Real double
#define Transform CUFFT_Z2Z
#define TransformExec cufftExecZ2Z
#else
#define Complex cufftComplex
#define Real float
#define Transform CUFFT_C2C
#define TransformExec cufftExecC2C
#endif
#define TILE_DIM 8
// synch... | .file "tmpxft_00041680_00000000-6_spread_i.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
#define DOUBLE
#ifdef DOUBLE
#define Complex cufftDoubleComplex
#define Real double
#define Transform CUFFT_Z2Z
#define TransformExec cufftExecZ2Z
#else
#define Complex cufftComplex
#define Real float
#define Transform CUFFT_C2C
#define TransformExec cufftExecC2C
#endif
#define TILE_DIM 8
// synch... | #include <hip/hip_runtime.h>
#include "includes.h"
#define DOUBLE
#ifdef DOUBLE
#define Complex hipfftDoubleComplex
#define Real double
#define Transform HIPFFT_Z2Z
#define TransformExec hipfftExecZ2Z
#else
#define Complex hipfftComplex
#define Real float
#define Transform HIPFFT_C2C
#define TransformExec hipfftExecC2C... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
#define DOUBLE
#ifdef DOUBLE
#define Complex hipfftDoubleComplex
#define Real double
#define Transform HIPFFT_Z2Z
#define TransformExec hipfftExecZ2Z
#else
#define Complex hipfftComplex
#define Real float
#define Transform HIPFFT_C2C
#define TransformExec hipfftExecC2C... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z8spread_iPdjS_j
.globl _Z8spread_iPdjS_j
.p2align 8
.type _Z8spread_iPdjS_j,@function
_Z8spread_iPdjS_j:
s_load_b32 s2, s[0:1], 0x18
s_mov_b32 s3, exec_lo
s_waitcnt lgkmcnt(0)
v_cmpx_gt_u32_e64 s2, v0
s_cbranch_execz .LBB0_2
s_c... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
#define DOUBLE
#ifdef DOUBLE
#define Complex hipfftDoubleComplex
#define Real double
#define Transform HIPFFT_Z2Z
#define TransformExec hipfftExecZ2Z
#else
#define Complex hipfftComplex
#define Real float
#define Transform HIPFFT_C2C
#define TransformExec hipfftExecC2C... | .text
.file "spread_i.hip"
.globl _Z23__device_stub__spread_iPdjS_j # -- Begin function _Z23__device_stub__spread_iPdjS_j
.p2align 4, 0x90
.type _Z23__device_stub__spread_iPdjS_j,@function
_Z23__device_stub__spread_iPdjS_j: # @_Z23__device_stub__spread_iPdjS_j
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_o... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z8spread_iPdjS_j
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R5, SR_TID.X ; /* 0x0000000000057919 */
/* 0x000e240000002100 */
/*0020*/... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z8spread_iPdjS_j
.globl _Z8spread_iPdjS_j
.p2align 8
.type _Z8spread_iPdjS_j,@function
_Z8spread_iPdjS_j:
s_load_b32 s2, s[0:1], 0x18
s_mov_b32 s3, exec_lo
s_waitcnt lgkmcnt(0)
v_cmpx_gt_u32_e64 s2, v0
s_cbranch_execz .LBB0_2
s_c... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00041680_00000000-6_spread_i.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp... | .text
.file "spread_i.hip"
.globl _Z23__device_stub__spread_iPdjS_j # -- Begin function _Z23__device_stub__spread_iPdjS_j
.p2align 4, 0x90
.type _Z23__device_stub__spread_iPdjS_j,@function
_Z23__device_stub__spread_iPdjS_j: # @_Z23__device_stub__spread_iPdjS_j
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_o... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | // pi2.cu
/*
* A simple CUDA-enabled program that approximates \pi using monte-carlo
* sampling. This version generates random numbers on-the-fly within each
* kernel.
*/
#include <iostream>
#include <curand.h>
#include <curand_kernel.h>
#include <stdlib.h>
#include <unistd.h>
#include <stdbool.h>
using namespace std;
... | .file "tmpxft_000290ff_00000000-6_pi2.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3899:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregi... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | // pi2.cu
/*
* A simple CUDA-enabled program that approximates \pi using monte-carlo
* sampling. This version generates random numbers on-the-fly within each
* kernel.
*/
#include <iostream>
#include <curand.h>
#include <curand_kernel.h>
#include <stdlib.h>
#include <unistd.h>
#include <stdbool.h>
using namespace std;
... | // pi2.cu
/*
* A simple CUDA-enabled program that approximates \pi using monte-carlo
* sampling. This version generates random numbers on-the-fly within each
* kernel.
*/
#include <hip/hip_runtime.h>
#include <iostream>
#include <hiprand/hiprand.h>
#include <hiprand/hiprand_kernel.h>
#include <stdlib.h>
#include <unist... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | // pi2.cu
/*
* A simple CUDA-enabled program that approximates \pi using monte-carlo
* sampling. This version generates random numbers on-the-fly within each
* kernel.
*/
#include <hip/hip_runtime.h>
#include <iostream>
#include <hiprand/hiprand.h>
#include <hiprand/hiprand_kernel.h>
#include <stdlib.h>
#include <unist... | .text
.file "pi2.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z26__device_stub__initThreadsPfP12hiprandState # -- Begin function _Z26__device_stub__initThreadsPfP12... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000290ff_00000000-6_pi2.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3899:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregi... | .text
.file "pi2.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z26__device_stub__initThreadsPfP12hiprandState # -- Begin function _Z26__device_stub__initThreadsPfP12... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include<stdio.h>
#include<math.h>
#include<stdlib.h>
#define CHECK(res) if (res!=cudaSuccess){exit(-1);} //check if success
const int height=10; //the kinds of attributes(>=)
const int width=100; //the kinds of datas(>=)
const int kinds=30; //the kinds of types(>=)
const int bit_size=width*height*sizeof(int ); //the s... | .file "tmpxft_0016854f_00000000-6_index2.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2067:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include<stdio.h>
#include<math.h>
#include<stdlib.h>
#define CHECK(res) if (res!=cudaSuccess){exit(-1);} //check if success
const int height=10; //the kinds of attributes(>=)
const int width=100; //the kinds of datas(>=)
const int kinds=30; //the kinds of types(>=)
const int bit_size=width*height*sizeof(int ); //the s... | #include <hip/hip_runtime.h>
#include<stdio.h>
#include<math.h>
#include<stdlib.h>
#define CHECK(res) if (res!=hipSuccess){exit(-1);} //check if success
const int height=10; //the kinds of attributes(>=)
const int width=100; //the kinds of datas(>=)
const int kinds=30; //the kinds of types(>=)
const int bit_size=width*... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include<stdio.h>
#include<math.h>
#include<stdlib.h>
#define CHECK(res) if (res!=hipSuccess){exit(-1);} //check if success
const int height=10; //the kinds of attributes(>=)
const int width=100; //the kinds of datas(>=)
const int kinds=30; //the kinds of types(>=)
const int bit_size=width*... | .text
.file "index2.hip"
.globl _Z7my_itoaiPci # -- Begin function _Z7my_itoaiPci
.p2align 4, 0x90
.type _Z7my_itoaiPci,@function
_Z7my_itoaiPci: # @_Z7my_itoaiPci
.cfi_startproc
# %bb.0:
movl $32, %eax
.p2align 4, 0x90
.LBB0_1: # =>This Inner Loop... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0016854f_00000000-6_index2.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2067:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... | .text
.file "index2.hip"
.globl _Z7my_itoaiPci # -- Begin function _Z7my_itoaiPci
.p2align 4, 0x90
.type _Z7my_itoaiPci,@function
_Z7my_itoaiPci: # @_Z7my_itoaiPci
.cfi_startproc
# %bb.0:
movl $32, %eax
.p2align 4, 0x90
.LBB0_1: # =>This Inner Loop... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <iostream>
#include <chrono>
#include <cassert>
#include <cmath>
#include <cstdlib>
#include <vector>
#include <algorithm>
#define BLOCKSIZE 128
// MUST BE ASSOCIATIVE
__device__ inline int f(int a, int b){
return a + b;
}
/**
* Implements prefix-scan using a Hillis-Steele algorithm.
* Since Hillis-Steele assu... | code for sm_80
Function : _Z11prefix_scaniiPiS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e2... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <iostream>
#include <chrono>
#include <cassert>
#include <cmath>
#include <cstdlib>
#include <vector>
#include <algorithm>
#define BLOCKSIZE 128
// MUST BE ASSOCIATIVE
__device__ inline int f(int a, int b){
return a + b;
}
/**
* Implements prefix-scan using a Hillis-Steele algorithm.
* Since Hillis-Steele assu... | .file "tmpxft_00138814_00000000-6_naive_parallel.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4390:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call _... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <iostream>
#include <chrono>
#include <cassert>
#include <cmath>
#include <cstdlib>
#include <vector>
#include <algorithm>
#define BLOCKSIZE 128
// MUST BE ASSOCIATIVE
__device__ inline int f(int a, int b){
return a + b;
}
/**
* Implements prefix-scan using a Hillis-Steele algorithm.
* Since Hillis-Steele assu... | #include <hip/hip_runtime.h>
#include <iostream>
#include <chrono>
#include <cassert>
#include <cmath>
#include <cstdlib>
#include <vector>
#include <algorithm>
#define BLOCKSIZE 128
// MUST BE ASSOCIATIVE
__device__ inline int f(int a, int b){
return a + b;
}
/**
* Implements prefix-scan using a Hillis-Steele algorith... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <chrono>
#include <cassert>
#include <cmath>
#include <cstdlib>
#include <vector>
#include <algorithm>
#define BLOCKSIZE 128
// MUST BE ASSOCIATIVE
__device__ inline int f(int a, int b){
return a + b;
}
/**
* Implements prefix-scan using a Hillis-Steele algorith... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11prefix_scaniiPiS_
.globl _Z11prefix_scaniiPiS_
.p2align 8
.type _Z11prefix_scaniiPiS_,@function
_Z11prefix_scaniiPiS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b64 s[2:3], s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xff... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <chrono>
#include <cassert>
#include <cmath>
#include <cstdlib>
#include <vector>
#include <algorithm>
#define BLOCKSIZE 128
// MUST BE ASSOCIATIVE
__device__ inline int f(int a, int b){
return a + b;
}
/**
* Implements prefix-scan using a Hillis-Steele algorith... | .text
.file "naive_parallel.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z26__device_stub__prefix_scaniiPiS_ # -- Begin function _Z26__device_stub__prefix_scaniiPiS... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z11prefix_scaniiPiS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e2... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11prefix_scaniiPiS_
.globl _Z11prefix_scaniiPiS_
.p2align 8
.type _Z11prefix_scaniiPiS_,@function
_Z11prefix_scaniiPiS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b64 s[2:3], s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xff... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00138814_00000000-6_naive_parallel.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4390:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call _... | .text
.file "naive_parallel.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z26__device_stub__prefix_scaniiPiS_ # -- Begin function _Z26__device_stub__prefix_scaniiPiS... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | __global__ void conv_kernel(float *Y,
const float *X,
const float *W,
int in_channels,
int out_channels,
int kernel_size,
int feature_size,
int batch_size)
{
// X: [1, 256, 7, 7]
// batch x in_channel x feature_size x feature_size
// W: [128, 256, 5, 5]
// out_channel x in_channels x kernel_size x kernel_size
// Y: [1,... | code for sm_80
Function : _Z11conv_kernelPfPKfS1_iiiii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R4, SR_CTAID.X ; /* 0x0000000000047919 */
/* ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | __global__ void conv_kernel(float *Y,
const float *X,
const float *W,
int in_channels,
int out_channels,
int kernel_size,
int feature_size,
int batch_size)
{
// X: [1, 256, 7, 7]
// batch x in_channel x feature_size x feature_size
// W: [128, 256, 5, 5]
// out_channel x in_channels x kernel_size x kernel_size
// Y: [1,... | .file "tmpxft_0011afde_00000000-6_conv_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | __global__ void conv_kernel(float *Y,
const float *X,
const float *W,
int in_channels,
int out_channels,
int kernel_size,
int feature_size,
int batch_size)
{
// X: [1, 256, 7, 7]
// batch x in_channel x feature_size x feature_size
// W: [128, 256, 5, 5]
// out_channel x in_channels x kernel_size x kernel_size
// Y: [1,... | #include <hip/hip_runtime.h>
__global__ void conv_kernel(float *Y,
const float *X,
const float *W,
int in_channels,
int out_channels,
int kernel_size,
int feature_size,
int batch_size)
{
// X: [1, 256, 7, 7]
// batch x in_channel x feature_size x feature_size
// W: [128, 256, 5, 5]
// out_channel x in_channels x kernel... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
__global__ void conv_kernel(float *Y,
const float *X,
const float *W,
int in_channels,
int out_channels,
int kernel_size,
int feature_size,
int batch_size)
{
// X: [1, 256, 7, 7]
// batch x in_channel x feature_size x feature_size
// W: [128, 256, 5, 5]
// out_channel x in_channels x kernel... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11conv_kernelPfPKfS1_iiiii
.globl _Z11conv_kernelPfPKfS1_iiiii
.p2align 8
.type _Z11conv_kernelPfPKfS1_iiiii,@function
_Z11conv_kernelPfPKfS1_iiiii:
s_clause 0x1
s_load_b32 s12, s[0:1], 0x18
s_load_b32 s7, s[0:1], 0x24
v_and_b32_e32 v1, 0x3ff, v... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
__global__ void conv_kernel(float *Y,
const float *X,
const float *W,
int in_channels,
int out_channels,
int kernel_size,
int feature_size,
int batch_size)
{
// X: [1, 256, 7, 7]
// batch x in_channel x feature_size x feature_size
// W: [128, 256, 5, 5]
// out_channel x in_channels x kernel... | .text
.file "conv_kernel.hip"
.globl _Z26__device_stub__conv_kernelPfPKfS1_iiiii # -- Begin function _Z26__device_stub__conv_kernelPfPKfS1_iiiii
.p2align 4, 0x90
.type _Z26__device_stub__conv_kernelPfPKfS1_iiiii,@function
_Z26__device_stub__conv_kernelPfPKfS1_iiiii: # @_Z26__device_stub__conv_kernelPfPKfS1_iiiii
.cfi_s... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z11conv_kernelPfPKfS1_iiiii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R4, SR_CTAID.X ; /* 0x0000000000047919 */
/* ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11conv_kernelPfPKfS1_iiiii
.globl _Z11conv_kernelPfPKfS1_iiiii
.p2align 8
.type _Z11conv_kernelPfPKfS1_iiiii,@function
_Z11conv_kernelPfPKfS1_iiiii:
s_clause 0x1
s_load_b32 s12, s[0:1], 0x18
s_load_b32 s7, s[0:1], 0x24
v_and_b32_e32 v1, 0x3ff, v... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0011afde_00000000-6_conv_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... | .text
.file "conv_kernel.hip"
.globl _Z26__device_stub__conv_kernelPfPKfS1_iiiii # -- Begin function _Z26__device_stub__conv_kernelPfPKfS1_iiiii
.p2align 4, 0x90
.type _Z26__device_stub__conv_kernelPfPKfS1_iiiii,@function
_Z26__device_stub__conv_kernelPfPKfS1_iiiii: # @_Z26__device_stub__conv_kernelPfPKfS1_iiiii
.cfi_s... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <cuda_runtime.h>
#include <iostream>
#include <stdlib.h>
#include <time.h>
__global__ void zhuanshi(int *d_b,int *d_bt,int n)
{
int ITdx = threadIdx.x;
int IBdx = blockIdx.x;
d_bt[ITdx * n + IBdx] = d_b[IBdx * n + ITdx];
}
__global__ void neiji(int *d_a,int *d_bt,int *d_c,int *d_data,int ICTdx,int ICBdx,int n)... | code for sm_80
Function : _Z7chengfaPiS_S_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0020*/ BRA 0x20;... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <cuda_runtime.h>
#include <iostream>
#include <stdlib.h>
#include <time.h>
__global__ void zhuanshi(int *d_b,int *d_bt,int n)
{
int ITdx = threadIdx.x;
int IBdx = blockIdx.x;
d_bt[ITdx * n + IBdx] = d_b[IBdx * n + ITdx];
}
__global__ void neiji(int *d_a,int *d_bt,int *d_c,int *d_data,int ICTdx,int ICBdx,int n)... | .file "tmpxft_0017ba7e_00000000-6_chengfa.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUn... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <cuda_runtime.h>
#include <iostream>
#include <stdlib.h>
#include <time.h>
__global__ void zhuanshi(int *d_b,int *d_bt,int n)
{
int ITdx = threadIdx.x;
int IBdx = blockIdx.x;
d_bt[ITdx * n + IBdx] = d_b[IBdx * n + ITdx];
}
__global__ void neiji(int *d_a,int *d_bt,int *d_c,int *d_data,int ICTdx,int ICBdx,int n)... | #include <hip/hip_runtime.h>
#include <iostream>
#include <stdlib.h>
#include <time.h>
__global__ void zhuanshi(int *d_b,int *d_bt,int n)
{
int ITdx = threadIdx.x;
int IBdx = blockIdx.x;
d_bt[ITdx * n + IBdx] = d_b[IBdx * n + ITdx];
}
__global__ void neiji(int *d_a,int *d_bt,int *d_c,int *d_data,int ICTdx,int ICBdx,int... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <stdlib.h>
#include <time.h>
__global__ void zhuanshi(int *d_b,int *d_bt,int n)
{
int ITdx = threadIdx.x;
int IBdx = blockIdx.x;
d_bt[ITdx * n + IBdx] = d_b[IBdx * n + ITdx];
}
__global__ void neiji(int *d_a,int *d_bt,int *d_c,int *d_data,int ICTdx,int ICBdx,int... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z8zhuanshiPiS_i
.globl _Z8zhuanshiPiS_i
.p2align 8
.type _Z8zhuanshiPiS_i,@function
_Z8zhuanshiPiS_i:
s_clause 0x1
s_load_b32 s5, s[0:1], 0x10
s_load_b128 s[0:3], s[0:1], 0x0
s_mov_b32 s4, s15
s_waitcnt lgkmcnt(0)
v_mad_u64_u32... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <stdlib.h>
#include <time.h>
__global__ void zhuanshi(int *d_b,int *d_bt,int n)
{
int ITdx = threadIdx.x;
int IBdx = blockIdx.x;
d_bt[ITdx * n + IBdx] = d_b[IBdx * n + ITdx];
}
__global__ void neiji(int *d_a,int *d_bt,int *d_c,int *d_data,int ICTdx,int ICBdx,int... | .text
.file "chengfa.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z23__device_stub__zhuanshiPiS_i # -- Begin function _Z23__device_stub__zhuanshiPiS_i
.p2align 4, 0... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z7chengfaPiS_S_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0020*/ BRA 0x20;... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z8zhuanshiPiS_i
.globl _Z8zhuanshiPiS_i
.p2align 8
.type _Z8zhuanshiPiS_i,@function
_Z8zhuanshiPiS_i:
s_clause 0x1
s_load_b32 s5, s[0:1], 0x10
s_load_b128 s[0:3], s[0:1], 0x0
s_mov_b32 s4, s15
s_waitcnt lgkmcnt(0)
v_mad_u64_u32... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0017ba7e_00000000-6_chengfa.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUn... | .text
.file "chengfa.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z23__device_stub__zhuanshiPiS_i # -- Begin function _Z23__device_stub__zhuanshiPiS_i
.p2align 4, 0... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | /*
* Copyright 1993-2007 NVIDIA Corporation. All rights reserved.
*
* NOTICE TO USER:
*
* This source code is subject to NVIDIA ownership rights under U.S. and
* international Copyright laws. Users and possessors of this source code
* are hereby granted a nonexclusive, royalty-free license to use this code
* in individ... | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /*
* Copyright 1993-2007 NVIDIA Corporation. All rights reserved.
*
* NOTICE TO USER:
*
* This source code is subject to NVIDIA ownership rights under U.S. and
* international Copyright laws. Users and possessors of this source code
* are hereby granted a nonexclusive, royalty-free license to use this code
* in individ... | .file "tmpxft_001882b1_00000000-6_dev_properties.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /*
* Copyright 1993-2007 NVIDIA Corporation. All rights reserved.
*
* NOTICE TO USER:
*
* This source code is subject to NVIDIA ownership rights under U.S. and
* international Copyright laws. Users and possessors of this source code
* are hereby granted a nonexclusive, royalty-free license to use this code
* in individ... | /*
* Copyright 1993-2007 NVIDIA Corporation. All rights reserved.
*
* NOTICE TO USER:
*
* This source code is subject to NVIDIA ownership rights under U.S. and
* international Copyright laws. Users and possessors of this source code
* are hereby granted a nonexclusive, royalty-free license to use this code
* in individ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | /*
* Copyright 1993-2007 NVIDIA Corporation. All rights reserved.
*
* NOTICE TO USER:
*
* This source code is subject to NVIDIA ownership rights under U.S. and
* international Copyright laws. Users and possessors of this source code
* are hereby granted a nonexclusive, royalty-free license to use this code
* in individ... | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | /*
* Copyright 1993-2007 NVIDIA Corporation. All rights reserved.
*
* NOTICE TO USER:
*
* This source code is subject to NVIDIA ownership rights under U.S. and
* international Copyright laws. Users and possessors of this source code
* are hereby granted a nonexclusive, royalty-free license to use this code
* in individ... | .text
.file "dev_properties.hip"
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function main
.LCPI0_0:
.long 0x358637bd # float 9.99999997E-7
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_sta... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001882b1_00000000-6_dev_properties.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8... | .text
.file "dev_properties.hip"
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function main
.LCPI0_0:
.long 0x358637bd # float 9.99999997E-7
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_sta... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "cuda_runtime.h"
#include "vec_kernels.cuh"
#include "stddef.h"
#include <cmath>
__global__
void mat_transpose(double *X, double *Xt, size_t m, size_t n)
{
size_t gid = threadIdx.x + blockIdx.x * blockDim.x;
if (gid >= m*n)
return;
size_t row = gid / n;
size_t col = gid % n;
Xt[col * m + row] = X[row * n + col... | .file "tmpxft_0002b88b_00000000-6_vec_kernels.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "cuda_runtime.h"
#include "vec_kernels.cuh"
#include "stddef.h"
#include <cmath>
__global__
void mat_transpose(double *X, double *Xt, size_t m, size_t n)
{
size_t gid = threadIdx.x + blockIdx.x * blockDim.x;
if (gid >= m*n)
return;
size_t row = gid / n;
size_t col = gid % n;
Xt[col * m + row] = X[row * n + col... | #ifndef CUDA_STATS_VEC_KERNELS_CUH_
#define CUDA_STATS_VEC_KERNELS_CUH_
#include "hip/hip_runtime.h"
#include "stddef.h"
__global__
void mat_transpose(double *X, double *Xt, size_t m, size_t n);
__global__
void vec_add(double *a, double *b, double *out, size_t stride, size_t n);
__global__
void vec_dot_product(double *... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #ifndef CUDA_STATS_VEC_KERNELS_CUH_
#define CUDA_STATS_VEC_KERNELS_CUH_
#include "hip/hip_runtime.h"
#include "stddef.h"
__global__
void mat_transpose(double *X, double *Xt, size_t m, size_t n);
__global__
void vec_add(double *a, double *b, double *out, size_t stride, size_t n);
__global__
void vec_dot_product(double *... | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #ifndef CUDA_STATS_VEC_KERNELS_CUH_
#define CUDA_STATS_VEC_KERNELS_CUH_
#include "hip/hip_runtime.h"
#include "stddef.h"
__global__
void mat_transpose(double *X, double *Xt, size_t m, size_t n);
__global__
void vec_add(double *a, double *b, double *out, size_t stride, size_t n);
__global__
void vec_dot_product(double *... | .text
.file "vec_kernels.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-proj... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0002b88b_00000000-6_vec_kernels.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... | .text
.file "vec_kernels.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-proj... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
/*
* The MIT License (MIT)
* This file is part of waifu2x-converter-cpp
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without ... | .text
.file "modelHandler_CUDA.hip"
.globl __device_stub__filter_i32 # -- Begin function __device_stub__filter_i32
.p2align 4, 0x90
.type __device_stub__filter_i32,@function
__device_stub__filter_i32: # @__device_stub__filter_i32
.cfi_startproc
# %bb.0:
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %r... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <stdlib.h>
#define N 4096 * 1024
void saxpy(int n, float a, float *x, float *y){
for( int i=0; i<n; i++)
{
y[i] = a * x[i] + y[i];
}
return ;
}
__global__ void saxpy_line6_kernel(int n, float a, float *x, float *y){
int i = blockIdx.x * blockDim.x + threadIdx.x ;
y[i] = a * x[i] + y[i];
ret... | code for sm_80
Function : _Z18saxpy_line6_kernelifPfS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R4, SR_CTAID.X ; /* 0x0000000000047919 */
/* 0x000e22000000250... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
#define N 4096 * 1024
void saxpy(int n, float a, float *x, float *y){
for( int i=0; i<n; i++)
{
y[i] = a * x[i] + y[i];
}
return ;
}
__global__ void saxpy_line6_kernel(int n, float a, float *x, float *y){
int i = blockIdx.x * blockDim.x + threadIdx.x ;
y[i] = a * x[i] + y[i];
ret... | .file "tmpxft_001489af_00000000-6_step6-saxpy-um.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2062:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#define N 4096 * 1024
void saxpy(int n, float a, float *x, float *y){
for( int i=0; i<n; i++)
{
y[i] = a * x[i] + y[i];
}
return ;
}
__global__ void saxpy_line6_kernel(int n, float a, float *x, float *y){
int i = blockIdx.x * blockDim.x + threadIdx.x ;
y[i] = a * x[i] + y[i];
ret... | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#define N 4096 * 1024
void saxpy(int n, float a, float *x, float *y){
for( int i=0; i<n; i++)
{
y[i] = a * x[i] + y[i];
}
return ;
}
__global__ void saxpy_line6_kernel(int n, float a, float *x, float *y){
int i = blockIdx.x * blockDim.x + threadIdx.x ;... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#define N 4096 * 1024
void saxpy(int n, float a, float *x, float *y){
for( int i=0; i<n; i++)
{
y[i] = a * x[i] + y[i];
}
return ;
}
__global__ void saxpy_line6_kernel(int n, float a, float *x, float *y){
int i = blockIdx.x * blockDim.x + threadIdx.x ;... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z18saxpy_line6_kernelifPfS_
.globl _Z18saxpy_line6_kernelifPfS_
.p2align 8
.type _Z18saxpy_line6_kernelifPfS_,@function
_Z18saxpy_line6_kernelifPfS_:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x8
s_load_b32 s0, s[0:1], ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#define N 4096 * 1024
void saxpy(int n, float a, float *x, float *y){
for( int i=0; i<n; i++)
{
y[i] = a * x[i] + y[i];
}
return ;
}
__global__ void saxpy_line6_kernel(int n, float a, float *x, float *y){
int i = blockIdx.x * blockDim.x + threadIdx.x ;... | .text
.file "step6-saxpy-um.hip"
.globl _Z5saxpyifPfS_ # -- Begin function _Z5saxpyifPfS_
.p2align 4, 0x90
.type _Z5saxpyifPfS_,@function
_Z5saxpyifPfS_: # @_Z5saxpyifPfS_
.cfi_startproc
# %bb.0:
testl %edi, %edi
jle .LBB0_3
# %bb.1: # %.lr.ph.preh... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z18saxpy_line6_kernelifPfS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R4, SR_CTAID.X ; /* 0x0000000000047919 */
/* 0x000e22000000250... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z18saxpy_line6_kernelifPfS_
.globl _Z18saxpy_line6_kernelifPfS_
.p2align 8
.type _Z18saxpy_line6_kernelifPfS_,@function
_Z18saxpy_line6_kernelifPfS_:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x8
s_load_b32 s0, s[0:1], ... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001489af_00000000-6_step6-saxpy-um.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2062:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8... | .text
.file "step6-saxpy-um.hip"
.globl _Z5saxpyifPfS_ # -- Begin function _Z5saxpyifPfS_
.p2align 4, 0x90
.type _Z5saxpyifPfS_,@function
_Z5saxpyifPfS_: # @_Z5saxpyifPfS_
.cfi_startproc
# %bb.0:
testl %edi, %edi
jle .LBB0_3
# %bb.1: # %.lr.ph.preh... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | __global__
void add(double* out,const double* a,const double* b){
int idx = blockIdx.x*blockDim.x + threadIdx.x;
out[idx]=a[idx]+b[idx];
} | code for sm_80
Function : _Z3addPdPKdS1_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R8, SR_CTAID.X ; /* 0x0000000000087919 */
/* 0x000e220000002500 */
/*0020*/ ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | __global__
void add(double* out,const double* a,const double* b){
int idx = blockIdx.x*blockDim.x + threadIdx.x;
out[idx]=a[idx]+b[idx];
} | .file "tmpxft_0005c864_00000000-6_add_kern.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | __global__
void add(double* out,const double* a,const double* b){
int idx = blockIdx.x*blockDim.x + threadIdx.x;
out[idx]=a[idx]+b[idx];
} | #include <hip/hip_runtime.h>
__global__
void add(double* out,const double* a,const double* b){
int idx = blockIdx.x*blockDim.x + threadIdx.x;
out[idx]=a[idx]+b[idx];
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
__global__
void add(double* out,const double* a,const double* b){
int idx = blockIdx.x*blockDim.x + threadIdx.x;
out[idx]=a[idx]+b[idx];
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3addPdPKdS1_
.globl _Z3addPdPKdS1_
.p2align 8
.type _Z3addPdPKdS1_,@function
_Z3addPdPKdS1_:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_a... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
__global__
void add(double* out,const double* a,const double* b){
int idx = blockIdx.x*blockDim.x + threadIdx.x;
out[idx]=a[idx]+b[idx];
} | .text
.file "add_kern.hip"
.globl _Z18__device_stub__addPdPKdS1_ # -- Begin function _Z18__device_stub__addPdPKdS1_
.p2align 4, 0x90
.type _Z18__device_stub__addPdPKdS1_,@function
_Z18__device_stub__addPdPKdS1_: # @_Z18__device_stub__addPdPKdS1_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
m... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z3addPdPKdS1_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R8, SR_CTAID.X ; /* 0x0000000000087919 */
/* 0x000e220000002500 */
/*0020*/ ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3addPdPKdS1_
.globl _Z3addPdPKdS1_
.p2align 8
.type _Z3addPdPKdS1_,@function
_Z3addPdPKdS1_:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_a... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0005c864_00000000-6_add_kern.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp... | .text
.file "add_kern.hip"
.globl _Z18__device_stub__addPdPKdS1_ # -- Begin function _Z18__device_stub__addPdPKdS1_
.p2align 4, 0x90
.type _Z18__device_stub__addPdPKdS1_,@function
_Z18__device_stub__addPdPKdS1_: # @_Z18__device_stub__addPdPKdS1_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
m... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void ComputeBiasTermKernel( float *biasTerm, float cFactor, float *winningFraction, int activeCells, int maxCells )
{
int threadId = blockDim.x*blockIdx.y*gridDim.x //rows preceeding current row in grid
+ blockDim.x*blockIdx.x //blocks preceeding current block
+ threadIdx.x;
if(threadId... | code for sm_80
Function : _Z21ComputeBiasTermKernelPffS_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void ComputeBiasTermKernel( float *biasTerm, float cFactor, float *winningFraction, int activeCells, int maxCells )
{
int threadId = blockDim.x*blockIdx.y*gridDim.x //rows preceeding current row in grid
+ blockDim.x*blockIdx.x //blocks preceeding current block
+ threadIdx.x;
if(threadId... | .file "tmpxft_0016879d_00000000-6_ComputeBiasTermKernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void ComputeBiasTermKernel( float *biasTerm, float cFactor, float *winningFraction, int activeCells, int maxCells )
{
int threadId = blockDim.x*blockIdx.y*gridDim.x //rows preceeding current row in grid
+ blockDim.x*blockIdx.x //blocks preceeding current block
+ threadIdx.x;
if(threadId... | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void ComputeBiasTermKernel( float *biasTerm, float cFactor, float *winningFraction, int activeCells, int maxCells )
{
int threadId = blockDim.x*blockIdx.y*gridDim.x //rows preceeding current row in grid
+ blockDim.x*blockIdx.x //blocks preceeding current blo... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void ComputeBiasTermKernel( float *biasTerm, float cFactor, float *winningFraction, int activeCells, int maxCells )
{
int threadId = blockDim.x*blockIdx.y*gridDim.x //rows preceeding current row in grid
+ blockDim.x*blockIdx.x //blocks preceeding current blo... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z21ComputeBiasTermKernelPffS_ii
.globl _Z21ComputeBiasTermKernelPffS_ii
.p2align 8
.type _Z21ComputeBiasTermKernelPffS_ii,@function
_Z21ComputeBiasTermKernelPffS_ii:
s_clause 0x1
s_load_b64 s[2:3], s[0:1], 0x1c
s_load_b32 s4, s[0:1], 0x2c
s_waitcnt l... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void ComputeBiasTermKernel( float *biasTerm, float cFactor, float *winningFraction, int activeCells, int maxCells )
{
int threadId = blockDim.x*blockIdx.y*gridDim.x //rows preceeding current row in grid
+ blockDim.x*blockIdx.x //blocks preceeding current blo... | .text
.file "ComputeBiasTermKernel.hip"
.globl _Z36__device_stub__ComputeBiasTermKernelPffS_ii # -- Begin function _Z36__device_stub__ComputeBiasTermKernelPffS_ii
.p2align 4, 0x90
.type _Z36__device_stub__ComputeBiasTermKernelPffS_ii,@function
_Z36__device_stub__ComputeBiasTermKernelPffS_ii: # @_Z36__device_stub__Compu... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z21ComputeBiasTermKernelPffS_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z21ComputeBiasTermKernelPffS_ii
.globl _Z21ComputeBiasTermKernelPffS_ii
.p2align 8
.type _Z21ComputeBiasTermKernelPffS_ii,@function
_Z21ComputeBiasTermKernelPffS_ii:
s_clause 0x1
s_load_b64 s[2:3], s[0:1], 0x1c
s_load_b32 s4, s[0:1], 0x2c
s_waitcnt l... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0016879d_00000000-6_ComputeBiasTermKernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
... | .text
.file "ComputeBiasTermKernel.hip"
.globl _Z36__device_stub__ComputeBiasTermKernelPffS_ii # -- Begin function _Z36__device_stub__ComputeBiasTermKernelPffS_ii
.p2align 4, 0x90
.type _Z36__device_stub__ComputeBiasTermKernelPffS_ii,@function
_Z36__device_stub__ComputeBiasTermKernelPffS_ii: # @_Z36__device_stub__Compu... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | /*
void cureTest() {
float sqrt
}*/ | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /*
void cureTest() {
float sqrt
}*/ | .file "tmpxft_0013c1d3_00000000-6_reuse.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.c... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /*
void cureTest() {
float sqrt
}*/ | #include <hip/hip_runtime.h>
/*
void cureTest() {
float sqrt
}*/ |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
/*
void cureTest() {
float sqrt
}*/ | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
/*
void cureTest() {
float sqrt
}*/ | .text
.file "reuse.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project ro... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0013c1d3_00000000-6_reuse.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.c... | .text
.file "reuse.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project ro... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "cuda.h"
extern "C" {
__device__ double sobely_kernel[3][3] = {{-1, -2, -1}, {0, 0, 0}, {1, 2, 1}};
__device__ double sobelx_kernel[3][3] = {{-1, 0, 1}, {-2, 0, 2}, {-1, 0, 1}};
__device__ double sharpen_kernel[3][3] = {{0, -1, 0}, {-1, 5, -1}, {0, -1, 0}};
__device__ double blur_kernel[3][3] =
{{0, 0.2, 0}, {... | .file "tmpxft_000d9d2e_00000000-6_filter-noise.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, ... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "cuda.h"
extern "C" {
__device__ double sobely_kernel[3][3] = {{-1, -2, -1}, {0, 0, 0}, {1, 2, 1}};
__device__ double sobelx_kernel[3][3] = {{-1, 0, 1}, {-2, 0, 2}, {-1, 0, 1}};
__device__ double sharpen_kernel[3][3] = {{0, -1, 0}, {-1, 5, -1}, {0, -1, 0}};
__device__ double blur_kernel[3][3] =
{{0, 0.2, 0}, {... | #include "hip/hip_runtime.h"
extern "C" {
__device__ double sobely_kernel[3][3] = {{-1, -2, -1}, {0, 0, 0}, {1, 2, 1}};
__device__ double sobelx_kernel[3][3] = {{-1, 0, 1}, {-2, 0, 2}, {-1, 0, 1}};
__device__ double sharpen_kernel[3][3] = {{0, -1, 0}, {-1, 5, -1}, {0, -1, 0}};
__device__ double blur_kernel[3][3] =
{{0,... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include "hip/hip_runtime.h"
extern "C" {
__device__ double sobely_kernel[3][3] = {{-1, -2, -1}, {0, 0, 0}, {1, 2, 1}};
__device__ double sobelx_kernel[3][3] = {{-1, 0, 1}, {-2, 0, 2}, {-1, 0, 1}};
__device__ double sharpen_kernel[3][3] = {{0, -1, 0}, {-1, 5, -1}, {0, -1, 0}};
__device__ double blur_kernel[3][3] =
{{0,... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected sobel_filter
.globl sobel_filter
.p2align 8
.type sobel_filter,@function
sobel_filter:
s_load_b64 s[4:5], s[0:1], 0x8
v_bfe_u32 v6, v0, 10, 10
s_lshl_b32 s12, s15, 5
v_and_b32_e32 v1, 0x3ff, v0
s_lshl_b32 s11, s14, 5
s_m... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include "hip/hip_runtime.h"
extern "C" {
__device__ double sobely_kernel[3][3] = {{-1, -2, -1}, {0, 0, 0}, {1, 2, 1}};
__device__ double sobelx_kernel[3][3] = {{-1, 0, 1}, {-2, 0, 2}, {-1, 0, 1}};
__device__ double sharpen_kernel[3][3] = {{0, -1, 0}, {-1, 5, -1}, {0, -1, 0}};
__device__ double blur_kernel[3][3] =
{{0,... | .text
.file "filter-noise.hip"
.globl __device_stub__sobel_filter # -- Begin function __device_stub__sobel_filter
.p2align 4, 0x90
.type __device_stub__sobel_filter,@function
__device_stub__sobel_filter: # @__device_stub__sobel_filter
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000d9d2e_00000000-6_filter-noise.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, ... | .text
.file "filter-noise.hip"
.globl __device_stub__sobel_filter # -- Begin function __device_stub__sobel_filter
.p2align 4, 0x90
.type __device_stub__sobel_filter,@function
__device_stub__sobel_filter: # @__device_stub__sobel_filter
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %... |
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