system stringclasses 7
values | input stringlengths 10 94.5k | output stringlengths 14 55.5k |
|---|---|---|
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void updateStatistic ( const int nwl, const float *stt1, const float *q, const float *r, float *stt0 ) {
int i = threadIdx.x + blockDim.x * blockIdx.x;
if ( i < nwl ) {
stt0[i] = ( q[i] > r[i] ) * stt1[i] + ( q[i] < r[i] ) * stt0[i];
}
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z15updateStatisticiPKfS0_S0_Pf
.globl _Z15updateStatisticiPKfS0_S0_Pf
.p2align 8
.type _Z15updateStatisticiPKfS0_S0_Pf,@function
_Z15updateStatisticiPKfS0_S0_Pf:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x34
s_load_b32 s3, s[0:1], 0x0
s_waitcnt lgkmcnt(0... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void updateStatistic ( const int nwl, const float *stt1, const float *q, const float *r, float *stt0 ) {
int i = threadIdx.x + blockDim.x * blockIdx.x;
if ( i < nwl ) {
stt0[i] = ( q[i] > r[i] ) * stt1[i] + ( q[i] < r[i] ) * stt0[i];
}
} | .text
.file "updateStatistic.hip"
.globl _Z30__device_stub__updateStatisticiPKfS0_S0_Pf # -- Begin function _Z30__device_stub__updateStatisticiPKfS0_S0_Pf
.p2align 4, 0x90
.type _Z30__device_stub__updateStatisticiPKfS0_S0_Pf,@function
_Z30__device_stub__updateStatisticiPKfS0_S0_Pf: # @_Z30__device_stub__updateStatistic... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z15updateStatisticiPKfS0_S0_Pf
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_TID.X ; /* 0x0000000000067919 */
/* 0x000e2800000021... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z15updateStatisticiPKfS0_S0_Pf
.globl _Z15updateStatisticiPKfS0_S0_Pf
.p2align 8
.type _Z15updateStatisticiPKfS0_S0_Pf,@function
_Z15updateStatisticiPKfS0_S0_Pf:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x34
s_load_b32 s3, s[0:1], 0x0
s_waitcnt lgkmcnt(0... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000c7025_00000000-6_updateStatistic.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $... | .text
.file "updateStatistic.hip"
.globl _Z30__device_stub__updateStatisticiPKfS0_S0_Pf # -- Begin function _Z30__device_stub__updateStatisticiPKfS0_S0_Pf
.p2align 4, 0x90
.type _Z30__device_stub__updateStatisticiPKfS0_S0_Pf,@function
_Z30__device_stub__updateStatisticiPKfS0_S0_Pf: # @_Z30__device_stub__updateStatistic... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#define CHECK(call) \
{ \
const cudaError_t error = call; \
if (error != cudaSuccess) \
{ \
fprintf(stderr, "Error: %s:%d, ", __FILE__, __LINE__); \
fprintf(stderr, "code: %d, reason: %s\n", error, \
cudaGetErrorString(error)); \
exit(EXIT_FAILURE); \
} \
}
struct GpuTimer
{
cudaEvent_t start;
cudaEv... | code for sm_80
Function : _Z15reduceByDevice3PiS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R10, SR_CTAID.X ; /* 0x00000000000a7919 */
/* 0x000e220000002500 *... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#define CHECK(call) \
{ \
const cudaError_t error = call; \
if (error != cudaSuccess) \
{ \
fprintf(stderr, "Error: %s:%d, ", __FILE__, __LINE__); \
fprintf(stderr, "code: %d, reason: %s\n", error, \
cudaGetErrorString(error)); \
exit(EXIT_FAILURE); \
} \
}
struct GpuTimer
{
cudaEvent_t start;
cudaEv... | .file "tmpxft_001afdbf_00000000-6_bt3.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2070:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#define CHECK(call) \
{ \
const cudaError_t error = call; \
if (error != cudaSuccess) \
{ \
fprintf(stderr, "Error: %s:%d, ", __FILE__, __LINE__); \
fprintf(stderr, "code: %d, reason: %s\n", error, \
cudaGetErrorString(error)); \
exit(EXIT_FAILURE); \
} \
}
struct GpuTimer
{
cudaEvent_t start;
cudaEv... | #include <hip/hip_runtime.h>
#include <stdio.h>
#define CHECK(call) \
{ \
const hipError_t error = call; \
if (error != hipSuccess) \
{ \
fprintf(stderr, "Error: %s:%d, ", __FILE__, __LINE__); \
fprintf(stderr, "code: %d, reason: %s\n", error, \
hipGetErrorString(error)); \
exit(EXIT_FAILURE); \
} \
}
struct GpuTimer
{... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#define CHECK(call) \
{ \
const hipError_t error = call; \
if (error != hipSuccess) \
{ \
fprintf(stderr, "Error: %s:%d, ", __FILE__, __LINE__); \
fprintf(stderr, "code: %d, reason: %s\n", error, \
hipGetErrorString(error)); \
exit(EXIT_FAILURE); \
} \
}
struct GpuTimer
{... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z15reduceByDevice1PiS_i
.globl _Z15reduceByDevice1PiS_i
.p2align 8
.type _Z15reduceByDevice1PiS_i,@function
_Z15reduceByDevice1PiS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b64 s[0:1], s[0:1], 0x8
v_mov_b32_e32 v0, 0
s_waitcnt lgkmcn... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z15reduceByDevice3PiS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R10, SR_CTAID.X ; /* 0x00000000000a7919 */
/* 0x000e220000002500 *... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z15reduceByDevice1PiS_i
.globl _Z15reduceByDevice1PiS_i
.p2align 8
.type _Z15reduceByDevice1PiS_i,@function
_Z15reduceByDevice1PiS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b64 s[0:1], s[0:1], 0x8
v_mov_b32_e32 v0, 0
s_waitcnt lgkmcn... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#define BDIMX 32
#define BDIMY 16
dim3 block (BDIMX, BDIMY);
dim3 grid (1,1);
__global__ void setRowReadRow(int *out)
{
// static shared memory
__shared__ int tile[BDIMY][BDIMX];
// mapping from thread index to global memory index
unsigned int idx = threadIdx.y * blockDim.x + threadIdx.x;
// shared m... | code for sm_80
Function : _Z16setRowReadColDynPi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ I2F.U32.RP R4, c[0x0][0x4] ; /* 0x0000010000047b06 */
/... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#define BDIMX 32
#define BDIMY 16
dim3 block (BDIMX, BDIMY);
dim3 grid (1,1);
__global__ void setRowReadRow(int *out)
{
// static shared memory
__shared__ int tile[BDIMY][BDIMX];
// mapping from thread index to global memory index
unsigned int idx = threadIdx.y * blockDim.x + threadIdx.x;
// shared m... | .file "tmpxft_0004372e_00000000-6_sharedmem.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rs... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#define BDIMX 32
#define BDIMY 16
dim3 block (BDIMX, BDIMY);
dim3 grid (1,1);
__global__ void setRowReadRow(int *out)
{
// static shared memory
__shared__ int tile[BDIMY][BDIMX];
// mapping from thread index to global memory index
unsigned int idx = threadIdx.y * blockDim.x + threadIdx.x;
// shared m... | #include <hip/hip_runtime.h>
#include <stdio.h>
#define BDIMX 32
#define BDIMY 16
dim3 block (BDIMX, BDIMY);
dim3 grid (1,1);
__global__ void setRowReadRow(int *out)
{
// static shared memory
__shared__ int tile[BDIMY][BDIMX];
// mapping from thread index to global memory index
unsigned int idx = threadIdx.y * blockDim... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#define BDIMX 32
#define BDIMY 16
dim3 block (BDIMX, BDIMY);
dim3 grid (1,1);
__global__ void setRowReadRow(int *out)
{
// static shared memory
__shared__ int tile[BDIMY][BDIMX];
// mapping from thread index to global memory index
unsigned int idx = threadIdx.y * blockDim... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z13setRowReadRowPi
.globl _Z13setRowReadRowPi
.p2align 8
.type _Z13setRowReadRowPi,@function
_Z13setRowReadRowPi:
s_load_b32 s2, s[0:1], 0x14
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v0, v0, 10, 10
s_load_b64 s[0:1], s[0:1], 0x0
s_delay... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#define BDIMX 32
#define BDIMY 16
dim3 block (BDIMX, BDIMY);
dim3 grid (1,1);
__global__ void setRowReadRow(int *out)
{
// static shared memory
__shared__ int tile[BDIMY][BDIMX];
// mapping from thread index to global memory index
unsigned int idx = threadIdx.y * blockDim... | .text
.file "sharedmem.hip"
.globl _Z28__device_stub__setRowReadRowPi # -- Begin function _Z28__device_stub__setRowReadRowPi
.p2align 4, 0x90
.type _Z28__device_stub__setRowReadRowPi,@function
_Z28__device_stub__setRowReadRowPi: # @_Z28__device_stub__setRowReadRowPi
.cfi_startproc
# %bb.0:
subq $72, %rsp
.cfi_def_c... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z16setRowReadColDynPi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ I2F.U32.RP R4, c[0x0][0x4] ; /* 0x0000010000047b06 */
/... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z13setRowReadRowPi
.globl _Z13setRowReadRowPi
.p2align 8
.type _Z13setRowReadRowPi,@function
_Z13setRowReadRowPi:
s_load_b32 s2, s[0:1], 0x14
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v0, v0, 10, 10
s_load_b64 s[0:1], s[0:1], 0x0
s_delay... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0004372e_00000000-6_sharedmem.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rs... | .text
.file "sharedmem.hip"
.globl _Z28__device_stub__setRowReadRowPi # -- Begin function _Z28__device_stub__setRowReadRowPi
.p2align 4, 0x90
.type _Z28__device_stub__setRowReadRowPi,@function
_Z28__device_stub__setRowReadRowPi: # @_Z28__device_stub__setRowReadRowPi
.cfi_startproc
# %bb.0:
subq $72, %rsp
.cfi_def_c... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #define uchar unsigned char // 8-bit byte
#define uint unsigned int // 32-bit word
// DBL_INT_ADD treats two unsigned ints a and b as one 64-bit integer and adds c to it
#define DBL_INT_ADD(a,b,c) if (a > 0xffffffff - (c)) ++b; a += c;
#define ROTLEFT(a,b) (((a) << (b)) | ((a) >> (32-(b))))
#define ROTRIGHT(a,b) (((a) ... | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #define uchar unsigned char // 8-bit byte
#define uint unsigned int // 32-bit word
// DBL_INT_ADD treats two unsigned ints a and b as one 64-bit integer and adds c to it
#define DBL_INT_ADD(a,b,c) if (a > 0xffffffff - (c)) ++b; a += c;
#define ROTLEFT(a,b) (((a) << (b)) | ((a) >> (32-(b))))
#define ROTRIGHT(a,b) (((a) ... | .file "tmpxft_0000ef1b_00000000-6_sha256.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #define uchar unsigned char // 8-bit byte
#define uint unsigned int // 32-bit word
// DBL_INT_ADD treats two unsigned ints a and b as one 64-bit integer and adds c to it
#define DBL_INT_ADD(a,b,c) if (a > 0xffffffff - (c)) ++b; a += c;
#define ROTLEFT(a,b) (((a) << (b)) | ((a) >> (32-(b))))
#define ROTRIGHT(a,b) (((a) ... | #include <hip/hip_runtime.h>
#define uchar unsigned char // 8-bit byte
#define uint unsigned int // 32-bit word
// DBL_INT_ADD treats two unsigned ints a and b as one 64-bit integer and adds c to it
#define DBL_INT_ADD(a,b,c) if (a > 0xffffffff - (c)) ++b; a += c;
#define ROTLEFT(a,b) (((a) << (b)) | ((a) >> (32-(b))))... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#define uchar unsigned char // 8-bit byte
#define uint unsigned int // 32-bit word
// DBL_INT_ADD treats two unsigned ints a and b as one 64-bit integer and adds c to it
#define DBL_INT_ADD(a,b,c) if (a > 0xffffffff - (c)) ++b; a += c;
#define ROTLEFT(a,b) (((a) << (b)) | ((a) >> (32-(b))))... | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.protected k
.type k,@object
.data
.globl k
.p2align 4, 0x0
k:
.long 1116352408
.long 1899447441
.long 3049323471
.long 3921009573
.long 961987163 ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#define uchar unsigned char // 8-bit byte
#define uint unsigned int // 32-bit word
// DBL_INT_ADD treats two unsigned ints a and b as one 64-bit integer and adds c to it
#define DBL_INT_ADD(a,b,c) if (a > 0xffffffff - (c)) ++b; a += c;
#define ROTLEFT(a,b) (((a) << (b)) | ((a) >> (32-(b))))... | .text
.file "sha256.hip"
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rax
.cfi_def_cfa_offset 16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB0_2
# %bb.1:
movl $_... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.protected k
.type k,@object
.data
.globl k
.p2align 4, 0x0
k:
.long 1116352408
.long 1899447441
.long 3049323471
.long 3921009573
.long 961987163 ... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0000ef1b_00000000-6_sha256.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... | .text
.file "sha256.hip"
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
pushq %rax
.cfi_def_cfa_offset 16
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB0_2
# %bb.1:
movl $_... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <iostream>
#include <math.h>
using namespace std;
const int max_movie = 1683;
const int max_user = 944;
#define THREAD_NUM 256
#define BLOCK_NUM 32
__global__ static void test(float* rate,float* result)
{
const int tid=threadIdx.x;
const int bid=blockIdx.x;
int i,k,j;
float sum;
for(i=bid*TH... | code for sm_80
Function : _Z4testPfS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e280000002100 ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <iostream>
#include <math.h>
using namespace std;
const int max_movie = 1683;
const int max_user = 944;
#define THREAD_NUM 256
#define BLOCK_NUM 32
__global__ static void test(float* rate,float* result)
{
const int tid=threadIdx.x;
const int bid=blockIdx.x;
int i,k,j;
float sum;
for(i=bid*TH... | .file "tmpxft_000785a0_00000000-6_mymain.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL4testPfS_, @function
_ZL4testPfS_:
.LFB3695:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
movq %rdi, (%rsp)
movq %rsi, 8(%rsp)
mo... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <iostream>
#include <math.h>
using namespace std;
const int max_movie = 1683;
const int max_user = 944;
#define THREAD_NUM 256
#define BLOCK_NUM 32
__global__ static void test(float* rate,float* result)
{
const int tid=threadIdx.x;
const int bid=blockIdx.x;
int i,k,j;
float sum;
for(i=bid*TH... | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <iostream>
#include <math.h>
using namespace std;
const int max_movie = 1683;
const int max_user = 944;
#define THREAD_NUM 256
#define BLOCK_NUM 32
__global__ static void test(float* rate,float* result)
{
const int tid=threadIdx.x;
const int bid=blockIdx.x;
int i... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <iostream>
#include <math.h>
using namespace std;
const int max_movie = 1683;
const int max_user = 944;
#define THREAD_NUM 256
#define BLOCK_NUM 32
__global__ static void test(float* rate,float* result)
{
const int tid=threadIdx.x;
const int bid=blockIdx.x;
int i... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.section .text._ZL4testPfS_,"axG",@progbits,_ZL4testPfS_,comdat
.globl _ZL4testPfS_
.p2align 8
.type _ZL4testPfS_,@function
_ZL4testPfS_:
s_lshl_b32 s4, s15, 8
s_mov_b32 s2, exec_lo
v_add_nc_u32_e32 v2, s4, v0
s_delay_alu i... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <iostream>
#include <math.h>
using namespace std;
const int max_movie = 1683;
const int max_user = 944;
#define THREAD_NUM 256
#define BLOCK_NUM 32
__global__ static void test(float* rate,float* result)
{
const int tid=threadIdx.x;
const int bid=blockIdx.x;
int i... | .text
.file "mymain.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function main
.L... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z4testPfS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e280000002100 ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.section .text._ZL4testPfS_,"axG",@progbits,_ZL4testPfS_,comdat
.globl _ZL4testPfS_
.p2align 8
.type _ZL4testPfS_,@function
_ZL4testPfS_:
s_lshl_b32 s4, s15, 8
s_mov_b32 s2, exec_lo
v_add_nc_u32_e32 v2, s4, v0
s_delay_alu i... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000785a0_00000000-6_mymain.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL4testPfS_, @function
_ZL4testPfS_:
.LFB3695:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
movq %rdi, (%rsp)
movq %rsi, 8(%rsp)
mo... | .text
.file "mymain.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function main
.L... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | // Transpose checkRows matrix with rows == parity checks, to
// bitRows matrix with rows == bits
__global__ void
transposeRC (unsigned int* map, float *checkRows, float *bitRows,
unsigned int numChecks, unsigned int maxBitsForCheck) {
// index
unsigned int m,n;
unsigned int thisRowStart, thisRowLength;
unsigned int cel... | code for sm_80
Function : _Z11transposeRCPjPfS0_jj
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R5, SR_CTAID.X ; /* 0x0000000000057919 */
/* 0x000e240000002500 */... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | // Transpose checkRows matrix with rows == parity checks, to
// bitRows matrix with rows == bits
__global__ void
transposeRC (unsigned int* map, float *checkRows, float *bitRows,
unsigned int numChecks, unsigned int maxBitsForCheck) {
// index
unsigned int m,n;
unsigned int thisRowStart, thisRowLength;
unsigned int cel... | .file "tmpxft_0007067b_00000000-6_transposeRC.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | // Transpose checkRows matrix with rows == parity checks, to
// bitRows matrix with rows == bits
__global__ void
transposeRC (unsigned int* map, float *checkRows, float *bitRows,
unsigned int numChecks, unsigned int maxBitsForCheck) {
// index
unsigned int m,n;
unsigned int thisRowStart, thisRowLength;
unsigned int cel... | #include <hip/hip_runtime.h>
// Transpose checkRows matrix with rows == parity checks, to
// bitRows matrix with rows == bits
__global__ void
transposeRC (unsigned int* map, float *checkRows, float *bitRows,
unsigned int numChecks, unsigned int maxBitsForCheck) {
// index
unsigned int m,n;
unsigned int thisRowStart, th... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
// Transpose checkRows matrix with rows == parity checks, to
// bitRows matrix with rows == bits
__global__ void
transposeRC (unsigned int* map, float *checkRows, float *bitRows,
unsigned int numChecks, unsigned int maxBitsForCheck) {
// index
unsigned int m,n;
unsigned int thisRowStart, th... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11transposeRCPjPfS0_jj
.globl _Z11transposeRCPjPfS0_jj
.p2align 8
.type _Z11transposeRCPjPfS0_jj,@function
_Z11transposeRCPjPfS0_jj:
s_load_b32 s2, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_cmp_ge_u32 s15, s2
s_cbranch_scc1 .LBB0_3
s_clause 0x1
s_... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
// Transpose checkRows matrix with rows == parity checks, to
// bitRows matrix with rows == bits
__global__ void
transposeRC (unsigned int* map, float *checkRows, float *bitRows,
unsigned int numChecks, unsigned int maxBitsForCheck) {
// index
unsigned int m,n;
unsigned int thisRowStart, th... | .text
.file "transposeRC.hip"
.globl _Z26__device_stub__transposeRCPjPfS0_jj # -- Begin function _Z26__device_stub__transposeRCPjPfS0_jj
.p2align 4, 0x90
.type _Z26__device_stub__transposeRCPjPfS0_jj,@function
_Z26__device_stub__transposeRCPjPfS0_jj: # @_Z26__device_stub__transposeRCPjPfS0_jj
.cfi_startproc
# %bb.0:
su... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z11transposeRCPjPfS0_jj
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R5, SR_CTAID.X ; /* 0x0000000000057919 */
/* 0x000e240000002500 */... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11transposeRCPjPfS0_jj
.globl _Z11transposeRCPjPfS0_jj
.p2align 8
.type _Z11transposeRCPjPfS0_jj,@function
_Z11transposeRCPjPfS0_jj:
s_load_b32 s2, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_cmp_ge_u32 s15, s2
s_cbranch_scc1 .LBB0_3
s_clause 0x1
s_... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0007067b_00000000-6_transposeRC.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... | .text
.file "transposeRC.hip"
.globl _Z26__device_stub__transposeRCPjPfS0_jj # -- Begin function _Z26__device_stub__transposeRCPjPfS0_jj
.p2align 4, 0x90
.type _Z26__device_stub__transposeRCPjPfS0_jj,@function
_Z26__device_stub__transposeRCPjPfS0_jj: # @_Z26__device_stub__transposeRCPjPfS0_jj
.cfi_startproc
# %bb.0:
su... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | /**
* Add 2 vectors using CUDA.
*/
#include <stdio.h>
#include <stdlib.h>
#include <cuda.h>
#include <cuda_runtime.h>
#include <iostream>
#include <string.h>
/**
* This macro checks return value of the CUDA runtime call and exits
* the application if the call failed.
*/
#define CUDA_CHECK_RETURN( value ) { \
cudaError_... | code for sm_80
Function : _Z8vect_addPiS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e280000002500 */
/*0020... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /**
* Add 2 vectors using CUDA.
*/
#include <stdio.h>
#include <stdlib.h>
#include <cuda.h>
#include <cuda_runtime.h>
#include <iostream>
#include <string.h>
/**
* This macro checks return value of the CUDA runtime call and exits
* the application if the call failed.
*/
#define CUDA_CHECK_RETURN( value ) { \
cudaError_... | .file "tmpxft_000aec18_00000000-6_main.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnreg... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /**
* Add 2 vectors using CUDA.
*/
#include <stdio.h>
#include <stdlib.h>
#include <cuda.h>
#include <cuda_runtime.h>
#include <iostream>
#include <string.h>
/**
* This macro checks return value of the CUDA runtime call and exits
* the application if the call failed.
*/
#define CUDA_CHECK_RETURN( value ) { \
cudaError_... | /**
* Add 2 vectors using CUDA.
*/
#include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <iostream>
#include <string.h>
/**
* This macro checks return value of the CUDA runtime call and exits
* the application if the call failed.
*/
#define CUDA_CHECK_RETURN( value ) { \
hipError_t err = value; \... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | /**
* Add 2 vectors using CUDA.
*/
#include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <iostream>
#include <string.h>
/**
* This macro checks return value of the CUDA runtime call and exits
* the application if the call failed.
*/
#define CUDA_CHECK_RETURN( value ) { \
hipError_t err = value; \... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9vect_fillPi
.globl _Z9vect_fillPi
.p2align 8
.type _Z9vect_fillPi,@function
_Z9vect_fillPi:
s_load_b32 s2, s[0:1], 0x14
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | /**
* Add 2 vectors using CUDA.
*/
#include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <iostream>
#include <string.h>
/**
* This macro checks return value of the CUDA runtime call and exits
* the application if the call failed.
*/
#define CUDA_CHECK_RETURN( value ) { \
hipError_t err = value; \... | .text
.file "main.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z24__device_stub__vect_fillPi # -- Begin function _Z24__device_stub__vect_fillPi
.p2align 4, 0x90
.t... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z8vect_addPiS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e280000002500 */
/*0020... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9vect_fillPi
.globl _Z9vect_fillPi
.p2align 8
.type _Z9vect_fillPi,@function
_Z9vect_fillPi:
s_load_b32 s2, s[0:1], 0x14
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | ... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000aec18_00000000-6_main.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnreg... | .text
.file "main.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z24__device_stub__vect_fillPi # -- Begin function _Z24__device_stub__vect_fillPi
.p2align 4, 0x90
.t... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #define TILE_DIM 1024
template<typename T>
__device__ void math_stdd(const T* vector, double* result, const int length) {
__shared__ double threadSum[TILE_DIM];
__shared__ double threadSquareSum[TILE_DIM];
int index = threadIdx.x;
int partLength = (length + TILE_DIM - 1) / TILE_DIM;
double sum = 0;
double squareSum = 0... | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #define TILE_DIM 1024
template<typename T>
__device__ void math_stdd(const T* vector, double* result, const int length) {
__shared__ double threadSum[TILE_DIM];
__shared__ double threadSquareSum[TILE_DIM];
int index = threadIdx.x;
int partLength = (length + TILE_DIM - 1) / TILE_DIM;
double sum = 0;
double squareSum = 0... | .file "tmpxft_0016109c_00000000-6_Stdd.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cf... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #define TILE_DIM 1024
template<typename T>
__device__ void math_stdd(const T* vector, double* result, const int length) {
__shared__ double threadSum[TILE_DIM];
__shared__ double threadSquareSum[TILE_DIM];
int index = threadIdx.x;
int partLength = (length + TILE_DIM - 1) / TILE_DIM;
double sum = 0;
double squareSum = 0... | #include <hip/hip_runtime.h>
#define TILE_DIM 1024
template<typename T>
__device__ void math_stdd(const T* vector, double* result, const int length) {
__shared__ double threadSum[TILE_DIM];
__shared__ double threadSquareSum[TILE_DIM];
int index = threadIdx.x;
int partLength = (length + TILE_DIM - 1) / TILE_DIM;
double ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#define TILE_DIM 1024
template<typename T>
__device__ void math_stdd(const T* vector, double* result, const int length) {
__shared__ double threadSum[TILE_DIM];
__shared__ double threadSquareSum[TILE_DIM];
int index = threadIdx.x;
int partLength = (length + TILE_DIM - 1) / TILE_DIM;
double ... | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#define TILE_DIM 1024
template<typename T>
__device__ void math_stdd(const T* vector, double* result, const int length) {
__shared__ double threadSum[TILE_DIM];
__shared__ double threadSquareSum[TILE_DIM];
int index = threadIdx.x;
int partLength = (length + TILE_DIM - 1) / TILE_DIM;
double ... | .text
.file "Stdd.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0016109c_00000000-6_Stdd.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cf... | .text
.file "Stdd.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
//Author: Adriel Kim
//6-27-2020
//Updated 7-5-2020
/*
Desc: Basic 2D matrix operations - element-wise addition, subtraction, multiplication, and division.
To do:
- Use vector instead of array?
- Be able to test for varying sizes of images. (For now we manually define with constant N)
- Add timer ... | code for sm_80
Function : _Z15matrixAddKernelPdPKdS1_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
//Author: Adriel Kim
//6-27-2020
//Updated 7-5-2020
/*
Desc: Basic 2D matrix operations - element-wise addition, subtraction, multiplication, and division.
To do:
- Use vector instead of array?
- Be able to test for varying sizes of images. (For now we manually define with constant N)
- Add timer ... | .file "tmpxft_000d315e_00000000-6_matrixAddKernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
//Author: Adriel Kim
//6-27-2020
//Updated 7-5-2020
/*
Desc: Basic 2D matrix operations - element-wise addition, subtraction, multiplication, and division.
To do:
- Use vector instead of array?
- Be able to test for varying sizes of images. (For now we manually define with constant N)
- Add timer ... | #include <hip/hip_runtime.h>
#include "includes.h"
//Author: Adriel Kim
//6-27-2020
//Updated 7-5-2020
/*
Desc: Basic 2D matrix operations - element-wise addition, subtraction, multiplication, and division.
To do:
- Use vector instead of array?
- Be able to test for varying sizes of images. (For now we manually define ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
//Author: Adriel Kim
//6-27-2020
//Updated 7-5-2020
/*
Desc: Basic 2D matrix operations - element-wise addition, subtraction, multiplication, and division.
To do:
- Use vector instead of array?
- Be able to test for varying sizes of images. (For now we manually define ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z15matrixAddKernelPdPKdS1_
.globl _Z15matrixAddKernelPdPKdS1_
.p2align 8
.type _Z15matrixAddKernelPdPKdS1_,@function
_Z15matrixAddKernelPdPKdS1_:
s_load_b32 s4, s[0:1], 0x24
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b3... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
//Author: Adriel Kim
//6-27-2020
//Updated 7-5-2020
/*
Desc: Basic 2D matrix operations - element-wise addition, subtraction, multiplication, and division.
To do:
- Use vector instead of array?
- Be able to test for varying sizes of images. (For now we manually define ... | .text
.file "matrixAddKernel.hip"
.globl _Z30__device_stub__matrixAddKernelPdPKdS1_ # -- Begin function _Z30__device_stub__matrixAddKernelPdPKdS1_
.p2align 4, 0x90
.type _Z30__device_stub__matrixAddKernelPdPKdS1_,@function
_Z30__device_stub__matrixAddKernelPdPKdS1_: # @_Z30__device_stub__matrixAddKernelPdPKdS1_
.cfi_st... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z15matrixAddKernelPdPKdS1_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z15matrixAddKernelPdPKdS1_
.globl _Z15matrixAddKernelPdPKdS1_
.p2align 8
.type _Z15matrixAddKernelPdPKdS1_,@function
_Z15matrixAddKernelPdPKdS1_:
s_load_b32 s4, s[0:1], 0x24
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b3... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000d315e_00000000-6_matrixAddKernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $... | .text
.file "matrixAddKernel.hip"
.globl _Z30__device_stub__matrixAddKernelPdPKdS1_ # -- Begin function _Z30__device_stub__matrixAddKernelPdPKdS1_
.p2align 4, 0x90
.type _Z30__device_stub__matrixAddKernelPdPKdS1_,@function
_Z30__device_stub__matrixAddKernelPdPKdS1_: # @_Z30__device_stub__matrixAddKernelPdPKdS1_
.cfi_st... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
__global__ void loop()
{
printf("This is iteration number %d\n", threadIdx.x);
}
int main()
{
int N = 10;
loop<<<1, N>>>();
cudaDeviceSynchronize();
} | code for sm_80
Function : _Z4loopv
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fc800078e00ff */
/*0010*/ S2R R8, SR_TID.X ; /* 0x0000000000087919 */
/* 0x000e220000002100 */
... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
__global__ void loop()
{
printf("This is iteration number %d\n", threadIdx.x);
}
int main()
{
int N = 10;
loop<<<1, N>>>();
cudaDeviceSynchronize();
} | .file "tmpxft_00125700_00000000-6_01-single-block-loop-solution.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBin... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
__global__ void loop()
{
printf("This is iteration number %d\n", threadIdx.x);
}
int main()
{
int N = 10;
loop<<<1, N>>>();
cudaDeviceSynchronize();
} | #include <hip/hip_runtime.h>
#include <stdio.h>
__global__ void loop()
{
printf("This is iteration number %d\n", threadIdx.x);
}
int main()
{
int N = 10;
loop<<<1, N>>>();
hipDeviceSynchronize();
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
__global__ void loop()
{
printf("This is iteration number %d\n", threadIdx.x);
}
int main()
{
int N = 10;
loop<<<1, N>>>();
hipDeviceSynchronize();
} | .text
.file "01-single-block-loop-solution.hip"
.globl _Z19__device_stub__loopv # -- Begin function _Z19__device_stub__loopv
.p2align 4, 0x90
.type _Z19__device_stub__loopv,@function
_Z19__device_stub__loopv: # @_Z19__device_stub__loopv
.cfi_startproc
# %bb.0:
subq $56, %rsp
.cfi_def_cfa_offset 64
... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00125700_00000000-6_01-single-block-loop-solution.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBin... | .text
.file "01-single-block-loop-solution.hip"
.globl _Z19__device_stub__loopv # -- Begin function _Z19__device_stub__loopv
.p2align 4, 0x90
.type _Z19__device_stub__loopv,@function
_Z19__device_stub__loopv: # @_Z19__device_stub__loopv
.cfi_startproc
# %bb.0:
subq $56, %rsp
.cfi_def_cfa_offset 64
... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | /**
*
* Matrix Multiplication - CUDA for GPUs
*
* CS3210
*
**/
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <sys/time.h>
#include <assert.h>
int size;
#define BLOCK_SIZE 32
typedef struct
{
float ** element;
} matrix;
long long wall_clock_time()
{
#ifdef __linux__
struct timespec tp;
clock_gettime(... | code for sm_80
Function : _Z9mm_kernel6matrixS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x00... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /**
*
* Matrix Multiplication - CUDA for GPUs
*
* CS3210
*
**/
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <sys/time.h>
#include <assert.h>
int size;
#define BLOCK_SIZE 32
typedef struct
{
float ** element;
} matrix;
long long wall_clock_time()
{
#ifdef __linux__
struct timespec tp;
clock_gettime(... | .file "tmpxft_00085aef_00000000-6_mm-banks.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2068:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /**
*
* Matrix Multiplication - CUDA for GPUs
*
* CS3210
*
**/
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <sys/time.h>
#include <assert.h>
int size;
#define BLOCK_SIZE 32
typedef struct
{
float ** element;
} matrix;
long long wall_clock_time()
{
#ifdef __linux__
struct timespec tp;
clock_gettime(... | /**
*
* Matrix Multiplication - CUDA for GPUs
*
* CS3210
*
**/
#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <sys/time.h>
#include <assert.h>
int size;
#define BLOCK_SIZE 32
typedef struct
{
float ** element;
} matrix;
long long wall_clock_time()
{
#ifdef __linux__
struc... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | /**
*
* Matrix Multiplication - CUDA for GPUs
*
* CS3210
*
**/
#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <sys/time.h>
#include <assert.h>
int size;
#define BLOCK_SIZE 32
typedef struct
{
float ** element;
} matrix;
long long wall_clock_time()
{
#ifdef __linux__
struc... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9mm_kernel6matrixS_S_i
.globl _Z9mm_kernel6matrixS_S_i
.p2align 8
.type _Z9mm_kernel6matrixS_S_i,@function
_Z9mm_kernel6matrixS_S_i:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x2c
s_load_b32 s2, s[0:1], 0x18
v_and_b32_e32 v4, 0x3ff, v0
v_bfe_u32 v... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | /**
*
* Matrix Multiplication - CUDA for GPUs
*
* CS3210
*
**/
#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <sys/time.h>
#include <assert.h>
int size;
#define BLOCK_SIZE 32
typedef struct
{
float ** element;
} matrix;
long long wall_clock_time()
{
#ifdef __linux__
struc... | .text
.file "mm-banks.hip"
.globl _Z15wall_clock_timev # -- Begin function _Z15wall_clock_timev
.p2align 4, 0x90
.type _Z15wall_clock_timev,@function
_Z15wall_clock_timev: # @_Z15wall_clock_timev
.cfi_startproc
# %bb.0:
subq $24, %rsp
.cfi_def_cfa_offset 32
leaq 8(%rsp), %rsi
xorl %edi, %ed... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z9mm_kernel6matrixS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x00... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9mm_kernel6matrixS_S_i
.globl _Z9mm_kernel6matrixS_S_i
.p2align 8
.type _Z9mm_kernel6matrixS_S_i,@function
_Z9mm_kernel6matrixS_S_i:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x2c
s_load_b32 s2, s[0:1], 0x18
v_and_b32_e32 v4, 0x3ff, v0
v_bfe_u32 v... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00085aef_00000000-6_mm-banks.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2068:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp... | .text
.file "mm-banks.hip"
.globl _Z15wall_clock_timev # -- Begin function _Z15wall_clock_timev
.p2align 4, 0x90
.type _Z15wall_clock_timev,@function
_Z15wall_clock_timev: # @_Z15wall_clock_timev
.cfi_startproc
# %bb.0:
subq $24, %rsp
.cfi_def_cfa_offset 32
leaq 8(%rsp), %rsi
xorl %edi, %ed... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <stdlib.h>
#include <cuda_runtime.h>
#include <time.h>
__global__ void vAdd(int* A, int* B, int* C, int num_elements){
//Posicion del thread
int i = blockIdx.x * blockDim.x + threadIdx.x;
if(i < num_elements){
C[i] = A[i] + B[i];
}
}
void sumarVectores(int* A, int* B, int* C, int num_element... | code for sm_80
Function : _Z4vAddPiS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e280000002500 */
/*0020*/ ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <cuda_runtime.h>
#include <time.h>
__global__ void vAdd(int* A, int* B, int* C, int num_elements){
//Posicion del thread
int i = blockIdx.x * blockDim.x + threadIdx.x;
if(i < num_elements){
C[i] = A[i] + B[i];
}
}
void sumarVectores(int* A, int* B, int* C, int num_element... | .file "tmpxft_000c6cd4_00000000-6_vAdd.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cf... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#include <cuda_runtime.h>
#include <time.h>
__global__ void vAdd(int* A, int* B, int* C, int num_elements){
//Posicion del thread
int i = blockIdx.x * blockDim.x + threadIdx.x;
if(i < num_elements){
C[i] = A[i] + B[i];
}
}
void sumarVectores(int* A, int* B, int* C, int num_element... | #include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <time.h>
__global__ void vAdd(int* A, int* B, int* C, int num_elements){
//Posicion del thread
int i = blockIdx.x * blockDim.x + threadIdx.x;
if(i < num_elements){
C[i] = A[i] + B[i];
}
}
void sumarVectores(int* A, int* B, int* C, int num_elem... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <time.h>
__global__ void vAdd(int* A, int* B, int* C, int num_elements){
//Posicion del thread
int i = blockIdx.x * blockDim.x + threadIdx.x;
if(i < num_elements){
C[i] = A[i] + B[i];
}
}
void sumarVectores(int* A, int* B, int* C, int num_elem... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z4vAddPiS_S_i
.globl _Z4vAddPiS_S_i
.p2align 8
.type _Z4vAddPiS_S_i,@function
_Z4vAddPiS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu in... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <time.h>
__global__ void vAdd(int* A, int* B, int* C, int num_elements){
//Posicion del thread
int i = blockIdx.x * blockDim.x + threadIdx.x;
if(i < num_elements){
C[i] = A[i] + B[i];
}
}
void sumarVectores(int* A, int* B, int* C, int num_elem... | .text
.file "vAdd.hip"
.globl _Z19__device_stub__vAddPiS_S_i # -- Begin function _Z19__device_stub__vAddPiS_S_i
.p2align 4, 0x90
.type _Z19__device_stub__vAddPiS_S_i,@function
_Z19__device_stub__vAddPiS_S_i: # @_Z19__device_stub__vAddPiS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq ... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z4vAddPiS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e280000002500 */
/*0020*/ ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z4vAddPiS_S_i
.globl _Z4vAddPiS_S_i
.p2align 8
.type _Z4vAddPiS_S_i,@function
_Z4vAddPiS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu in... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000c6cd4_00000000-6_vAdd.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cf... | .text
.file "vAdd.hip"
.globl _Z19__device_stub__vAddPiS_S_i # -- Begin function _Z19__device_stub__vAddPiS_S_i
.p2align 4, 0x90
.type _Z19__device_stub__vAddPiS_S_i,@function
_Z19__device_stub__vAddPiS_S_i: # @_Z19__device_stub__vAddPiS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq ... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <thrust/device_vector.h>
#include <thrust/fill.h>
#include <thrust/sequence.h>
#include <iostream>
struct soma_impares {
__device__ __host__
int operator()(const double &x, const double &y) {
return x + y;
}
};
int main() {
thrust::device_vector<double> v(100);
thrust::sequence(v.begin(), v.end());
double d = ... | #include <hip/hip_runtime.h>
#include <thrust/device_vector.h>
#include <thrust/fill.h>
#include <thrust/sequence.h>
#include <iostream>
struct soma_impares {
__device__ __host__
int operator()(const double &x, const double &y) {
return x + y;
}
};
int main() {
thrust::device_vector<double> v(100);
thrust::sequence(v.b... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#define N 64
//#define N 128
//#define N 1024
//#define N 63
//#define N 65
//#define N 4096
#define TPB 32
//#define TPB 1
float scale(int i, int n){
return ((float) i)/(n - 1);
}
__device__
float distance(float x1, float x2){
return sqrt((x2-x1)*(x2-x1));
}
__global__
void distanceKernel(float *d... | code for sm_80
Function : _Z14distanceKernelPfS_f
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e220000002500 */
... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#define N 64
//#define N 128
//#define N 1024
//#define N 63
//#define N 65
//#define N 4096
#define TPB 32
//#define TPB 1
float scale(int i, int n){
return ((float) i)/(n - 1);
}
__device__
float distance(float x1, float x2){
return sqrt((x2-x1)*(x2-x1));
}
__global__
void distanceKernel(float *d... | .file "tmpxft_0002cfe3_00000000-6_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2062:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#define N 64
//#define N 128
//#define N 1024
//#define N 63
//#define N 65
//#define N 4096
#define TPB 32
//#define TPB 1
float scale(int i, int n){
return ((float) i)/(n - 1);
}
__device__
float distance(float x1, float x2){
return sqrt((x2-x1)*(x2-x1));
}
__global__
void distanceKernel(float *d... | #include <hip/hip_runtime.h>
#include <stdio.h>
#define N 64
//#define N 128
//#define N 1024
//#define N 63
//#define N 65
//#define N 4096
#define TPB 32
//#define TPB 1
float scale(int i, int n){
return ((float) i)/(n - 1);
}
__device__
float distance(float x1, float x2){
return sqrt((x2-x1)*(x2-x1));
}
__global__ ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#define N 64
//#define N 128
//#define N 1024
//#define N 63
//#define N 65
//#define N 4096
#define TPB 32
//#define TPB 1
float scale(int i, int n){
return ((float) i)/(n - 1);
}
__device__
float distance(float x1, float x2){
return sqrt((x2-x1)*(x2-x1));
}
__global__ ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z14distanceKernelPfS_f
.globl _Z14distanceKernelPfS_f
.p2align 8
.type _Z14distanceKernelPfS_f,@function
_Z14distanceKernelPfS_f:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b32 s0, s[0:1], 0x10
s_waitcnt ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#define N 64
//#define N 128
//#define N 1024
//#define N 63
//#define N 65
//#define N 4096
#define TPB 32
//#define TPB 1
float scale(int i, int n){
return ((float) i)/(n - 1);
}
__device__
float distance(float x1, float x2){
return sqrt((x2-x1)*(x2-x1));
}
__global__ ... | .text
.file "kernel.hip"
.globl _Z5scaleii # -- Begin function _Z5scaleii
.p2align 4, 0x90
.type _Z5scaleii,@function
_Z5scaleii: # @_Z5scaleii
.cfi_startproc
# %bb.0:
cvtsi2ss %edi, %xmm0
decl %esi
cvtsi2ss %esi, %xmm1
divss %xmm1, %xmm0
retq
.Lfunc_end0:
.size _Z5scale... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z14distanceKernelPfS_f
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e220000002500 */
... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z14distanceKernelPfS_f
.globl _Z14distanceKernelPfS_f
.p2align 8
.type _Z14distanceKernelPfS_f,@function
_Z14distanceKernelPfS_f:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b32 s0, s[0:1], 0x10
s_waitcnt ... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0002cfe3_00000000-6_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2062:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... | .text
.file "kernel.hip"
.globl _Z5scaleii # -- Begin function _Z5scaleii
.p2align 4, 0x90
.type _Z5scaleii,@function
_Z5scaleii: # @_Z5scaleii
.cfi_startproc
# %bb.0:
cvtsi2ss %edi, %xmm0
decl %esi
cvtsi2ss %esi, %xmm1
divss %xmm1, %xmm0
retq
.Lfunc_end0:
.size _Z5scale... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <iostream>
static void HandleError(cudaError_t err,
const char *file,
int line) {
if (err != cudaSuccess) {
printf("%s in %s at line %d\n", cudaGetErrorString(err),
file, line);
exit(EXIT_FAILURE);
}
}
#define HANDLE_ERROR( err ) (HandleError( err, __FILE__, __LINE__ ))
int main(void) {
cudaDeviceProp prop; in... | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <iostream>
static void HandleError(cudaError_t err,
const char *file,
int line) {
if (err != cudaSuccess) {
printf("%s in %s at line %d\n", cudaGetErrorString(err),
file, line);
exit(EXIT_FAILURE);
}
}
#define HANDLE_ERROR( err ) (HandleError( err, __FILE__, __LINE__ ))
int main(void) {
cudaDeviceProp prop; in... | .file "tmpxft_0003daba_00000000-6_kernel.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%s in %s at line %d\n"
#NO_APP
.text
.type _ZL11HandleError9cudaErrorPKci, @function
_ZL11HandleError9cudaErrorPKci:
.LFB3669:
.cfi_startproc
testl %edi, %edi
jne... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <iostream>
static void HandleError(cudaError_t err,
const char *file,
int line) {
if (err != cudaSuccess) {
printf("%s in %s at line %d\n", cudaGetErrorString(err),
file, line);
exit(EXIT_FAILURE);
}
}
#define HANDLE_ERROR( err ) (HandleError( err, __FILE__, __LINE__ ))
int main(void) {
cudaDeviceProp prop; in... | #include <hip/hip_runtime.h>
#include <iostream>
static void HandleError(hipError_t err,
const char *file,
int line) {
if (err != hipSuccess) {
printf("%s in %s at line %d\n", hipGetErrorString(err),
file, line);
exit(EXIT_FAILURE);
}
}
#define HANDLE_ERROR( err ) (HandleError( err, __FILE__, __LINE__ ))
int main(void)... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <iostream>
static void HandleError(hipError_t err,
const char *file,
int line) {
if (err != hipSuccess) {
printf("%s in %s at line %d\n", hipGetErrorString(err),
file, line);
exit(EXIT_FAILURE);
}
}
#define HANDLE_ERROR( err ) (HandleError( err, __FILE__, __LINE__ ))
int main(void)... | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <iostream>
static void HandleError(hipError_t err,
const char *file,
int line) {
if (err != hipSuccess) {
printf("%s in %s at line %d\n", hipGetErrorString(err),
file, line);
exit(EXIT_FAILURE);
}
}
#define HANDLE_ERROR( err ) (HandleError( err, __FILE__, __LINE__ ))
int main(void)... | .text
.file "kernel.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main:... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0003daba_00000000-6_kernel.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%s in %s at line %d\n"
#NO_APP
.text
.type _ZL11HandleError9cudaErrorPKci, @function
_ZL11HandleError9cudaErrorPKci:
.LFB3669:
.cfi_startproc
testl %edi, %edi
jne... | .text
.file "kernel.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main:... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | /*
Implement your CUDA kernel in this file
*/
__global__ void mirror_boundaries(double *E_prev, const int n, const int m)
{
int row = blockIdx.y*blockDim.y + threadIdx.y + 1;
int col = blockIdx.x*blockDim.x + threadIdx.x + 1;
if (col == 1) {
E_prev[row*(n+2)] = E_prev[row*(n+2) + 2];
E_prev[row*(n+2) + n + 1] = E_prev[... | code for sm_80
Function : _Z13solve_for_odePdS_diiddddddd
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */
... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /*
Implement your CUDA kernel in this file
*/
__global__ void mirror_boundaries(double *E_prev, const int n, const int m)
{
int row = blockIdx.y*blockDim.y + threadIdx.y + 1;
int col = blockIdx.x*blockDim.x + threadIdx.x + 1;
if (col == 1) {
E_prev[row*(n+2)] = E_prev[row*(n+2) + 2];
E_prev[row*(n+2) + n + 1] = E_prev[... | .file "tmpxft_000f8f6a_00000000-6_cardiacsim_kernels.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
add... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /*
Implement your CUDA kernel in this file
*/
__global__ void mirror_boundaries(double *E_prev, const int n, const int m)
{
int row = blockIdx.y*blockDim.y + threadIdx.y + 1;
int col = blockIdx.x*blockDim.x + threadIdx.x + 1;
if (col == 1) {
E_prev[row*(n+2)] = E_prev[row*(n+2) + 2];
E_prev[row*(n+2) + n + 1] = E_prev[... | #include <hip/hip_runtime.h>
/*
Implement your CUDA kernel in this file
*/
__global__ void mirror_boundaries(double *E_prev, const int n, const int m)
{
int row = blockIdx.y*blockDim.y + threadIdx.y + 1;
int col = blockIdx.x*blockDim.x + threadIdx.x + 1;
if (col == 1) {
E_prev[row*(n+2)] = E_prev[row*(n+2) + 2];
E_prev... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
/*
Implement your CUDA kernel in this file
*/
__global__ void mirror_boundaries(double *E_prev, const int n, const int m)
{
int row = blockIdx.y*blockDim.y + threadIdx.y + 1;
int col = blockIdx.x*blockDim.x + threadIdx.x + 1;
if (col == 1) {
E_prev[row*(n+2)] = E_prev[row*(n+2) + 2];
E_prev... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z17mirror_boundariesPdii
.globl _Z17mirror_boundariesPdii
.p2align 8
.type _Z17mirror_boundariesPdii,@function
_Z17mirror_boundariesPdii:
s_clause 0x2
s_load_b32 s5, s[0:1], 0x1c
s_load_b64 s[2:3], s[0:1], 0x0
s_load_b32 s4, s[0:1], 0x8
v_and_... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
/*
Implement your CUDA kernel in this file
*/
__global__ void mirror_boundaries(double *E_prev, const int n, const int m)
{
int row = blockIdx.y*blockDim.y + threadIdx.y + 1;
int col = blockIdx.x*blockDim.x + threadIdx.x + 1;
if (col == 1) {
E_prev[row*(n+2)] = E_prev[row*(n+2) + 2];
E_prev... | .text
.file "cardiacsim_kernels.hip"
.globl _Z32__device_stub__mirror_boundariesPdii # -- Begin function _Z32__device_stub__mirror_boundariesPdii
.p2align 4, 0x90
.type _Z32__device_stub__mirror_boundariesPdii,@function
_Z32__device_stub__mirror_boundariesPdii: # @_Z32__device_stub__mirror_boundariesPdii
.cfi_startproc... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000f8f6a_00000000-6_cardiacsim_kernels.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
add... | .text
.file "cardiacsim_kernels.hip"
.globl _Z32__device_stub__mirror_boundariesPdii # -- Begin function _Z32__device_stub__mirror_boundariesPdii
.p2align 4, 0x90
.type _Z32__device_stub__mirror_boundariesPdii,@function
_Z32__device_stub__mirror_boundariesPdii: # @_Z32__device_stub__mirror_boundariesPdii
.cfi_startproc... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <stdlib.h>
#define block_size 32
__global__ void calculation( int *a,
int *b,
int *c,
int constant,
int vector_size ) {
// write your code here
// Declare shared memory
// Bring in the data from global memory into shared memory
// Synchronize
// Do calculation using the values in share... | code for sm_80
Function : _Z11calculationPiS_S_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0020*/ BRA 0... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
#define block_size 32
__global__ void calculation( int *a,
int *b,
int *c,
int constant,
int vector_size ) {
// write your code here
// Declare shared memory
// Bring in the data from global memory into shared memory
// Synchronize
// Do calculation using the values in share... | .file "tmpxft_000fccd3_00000000-6_Modified.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp... |
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