system stringclasses 7
values | input stringlengths 10 94.5k | output stringlengths 14 55.5k |
|---|---|---|
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#define block_size 32
__global__ void calculation( int *a,
int *b,
int *c,
int constant,
int vector_size ) {
// write your code here
// Declare shared memory
// Bring in the data from global memory into shared memory
// Synchronize
// Do calculation using the values in share... | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#define block_size 32
__global__ void calculation( int *a,
int *b,
int *c,
int constant,
int vector_size ) {
// write your code here
// Declare shared memory
// Bring in the data from global memory into shared memory
// Synchronize
// Do calculat... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#define block_size 32
__global__ void calculation( int *a,
int *b,
int *c,
int constant,
int vector_size ) {
// write your code here
// Declare shared memory
// Bring in the data from global memory into shared memory
// Synchronize
// Do calculat... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11calculationPiS_S_ii
.globl _Z11calculationPiS_S_ii
.p2align 8
.type _Z11calculationPiS_S_ii,@function
_Z11calculationPiS_S_ii:
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z11calculationPiS_S_ii
.amdhsa_group_s... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#define block_size 32
__global__ void calculation( int *a,
int *b,
int *c,
int constant,
int vector_size ) {
// write your code here
// Declare shared memory
// Bring in the data from global memory into shared memory
// Synchronize
// Do calculat... | .text
.file "Modified.hip"
.globl _Z26__device_stub__calculationPiS_S_ii # -- Begin function _Z26__device_stub__calculationPiS_S_ii
.p2align 4, 0x90
.type _Z26__device_stub__calculationPiS_S_ii,@function
_Z26__device_stub__calculationPiS_S_ii: # @_Z26__device_stub__calculationPiS_S_ii
.cfi_startproc
# %bb.0:
subq $120,... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z11calculationPiS_S_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0020*/ BRA 0... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11calculationPiS_S_ii
.globl _Z11calculationPiS_S_ii
.p2align 8
.type _Z11calculationPiS_S_ii,@function
_Z11calculationPiS_S_ii:
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z11calculationPiS_S_ii
.amdhsa_group_s... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000fccd3_00000000-6_Modified.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp... | .text
.file "Modified.hip"
.globl _Z26__device_stub__calculationPiS_S_ii # -- Begin function _Z26__device_stub__calculationPiS_S_ii
.p2align 4, 0x90
.type _Z26__device_stub__calculationPiS_S_ii,@function
_Z26__device_stub__calculationPiS_S_ii: # @_Z26__device_stub__calculationPiS_S_ii
.cfi_startproc
# %bb.0:
subq $120,... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | __global__ void test_input_args(int* buffer_arg, int x) {
int val = buffer_arg[1];
buffer_arg[2] = 42;
buffer_arg[x] = 42;
buffer_arg[x + 1] = 42;
x = 1;
buffer_arg[x] = 42;
} | code for sm_80
Function : _Z15test_input_argsPii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ HFMA2.MMA R3, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff037435 ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | __global__ void test_input_args(int* buffer_arg, int x) {
int val = buffer_arg[1];
buffer_arg[2] = 42;
buffer_arg[x] = 42;
buffer_arg[x + 1] = 42;
x = 1;
buffer_arg[x] = 42;
} | .file "tmpxft_0019dab3_00000000-6_test_input_args.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | __global__ void test_input_args(int* buffer_arg, int x) {
int val = buffer_arg[1];
buffer_arg[2] = 42;
buffer_arg[x] = 42;
buffer_arg[x + 1] = 42;
x = 1;
buffer_arg[x] = 42;
} | #include <hip/hip_runtime.h>
__global__ void test_input_args(int* buffer_arg, int x) {
int val = buffer_arg[1];
buffer_arg[2] = 42;
buffer_arg[x] = 42;
buffer_arg[x + 1] = 42;
x = 1;
buffer_arg[x] = 42;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
__global__ void test_input_args(int* buffer_arg, int x) {
int val = buffer_arg[1];
buffer_arg[2] = 42;
buffer_arg[x] = 42;
buffer_arg[x + 1] = 42;
x = 1;
buffer_arg[x] = 42;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z15test_input_argsPii
.globl _Z15test_input_argsPii
.p2align 8
.type _Z15test_input_argsPii,@function
_Z15test_input_argsPii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x8
s_load_b64 s[0:1], s[0:1], 0x0
v_mov_b32_e32 v0, 42
s_delay_alu instid0(V... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
__global__ void test_input_args(int* buffer_arg, int x) {
int val = buffer_arg[1];
buffer_arg[2] = 42;
buffer_arg[x] = 42;
buffer_arg[x + 1] = 42;
x = 1;
buffer_arg[x] = 42;
} | .text
.file "test_input_args.hip"
.globl _Z30__device_stub__test_input_argsPii # -- Begin function _Z30__device_stub__test_input_argsPii
.p2align 4, 0x90
.type _Z30__device_stub__test_input_argsPii,@function
_Z30__device_stub__test_input_argsPii: # @_Z30__device_stub__test_input_argsPii
.cfi_startproc
# %bb.0:
subq $8... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z15test_input_argsPii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ HFMA2.MMA R3, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff037435 ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z15test_input_argsPii
.globl _Z15test_input_argsPii
.p2align 8
.type _Z15test_input_argsPii,@function
_Z15test_input_argsPii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x8
s_load_b64 s[0:1], s[0:1], 0x0
v_mov_b32_e32 v0, 42
s_delay_alu instid0(V... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0019dab3_00000000-6_test_input_args.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $... | .text
.file "test_input_args.hip"
.globl _Z30__device_stub__test_input_argsPii # -- Begin function _Z30__device_stub__test_input_argsPii
.p2align 4, 0x90
.type _Z30__device_stub__test_input_argsPii,@function
_Z30__device_stub__test_input_argsPii: # @_Z30__device_stub__test_input_argsPii
.cfi_startproc
# %bb.0:
subq $8... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /* ************************************************************************** */
/* */
/* ::: :::::::: */
/* draw_mandelbrot_cuda.c :+: :+: :+: */
/* +:+ +:+ +:+ */
/* By: ngoguey <ngoguey@student.42.fr> +#+ +:+ +#+ */
/* +#+#+#+#+#+ +#+ */
/* Created: 2014/12/11 15:58:47 by ngoguey #+# #+# */
/* Updated: 2014/12/11 17... | .file "tmpxft_000b378e_00000000-6_draw_mandelbrot_cuda.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
a... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /* ************************************************************************** */
/* */
/* ::: :::::::: */
/* draw_mandelbrot_cuda.c :+: :+: :+: */
/* +:+ +:+ +:+ */
/* By: ngoguey <ngoguey@student.42.fr> +#+ +:+ +#+ */
/* +#+#+#+#+#+ +#+ */
/* Created: 2014/12/11 15:58:47 by ngoguey #+# #+# */
/* Updated: 2014/12/11 17... | #include <hip/hip_runtime.h>
/* ************************************************************************** */
/* */
/* ::: :::::::: */
/* draw_mandelbrot_cuda.c :+: :+: :+: */
/* +:+ +:+ +:+ */
/* By: ngoguey <ngoguey@student.42.fr> +#+ +:+ +#+ */
/* +#+#+#+#+#+ +#+ */
/* Created: 2014/12/11 15:58:47 by ngoguey #+# #+#... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
/* ************************************************************************** */
/* */
/* ::: :::::::: */
/* draw_mandelbrot_cuda.c :+: :+: :+: */
/* +:+ +:+ +:+ */
/* By: ngoguey <ngoguey@student.42.fr> +#+ +:+ +#+ */
/* +#+#+#+#+#+ +#+ */
/* Created: 2014/12/11 15:58:47 by ngoguey #+# #+#... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z20fra_draw_mandelbrot25s_fraPc
.globl _Z20fra_draw_mandelbrot25s_fraPc
.p2align 8
.type _Z20fra_draw_mandelbrot25s_fraPc,@function
_Z20fra_draw_mandelbrot25s_fraPc:
s_clause 0x3
s_load_b32 s6, s[0:1], 0x20
s_load_b64 s[2:3], s[0:1], 0x5c
s_load_b64 ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
/* ************************************************************************** */
/* */
/* ::: :::::::: */
/* draw_mandelbrot_cuda.c :+: :+: :+: */
/* +:+ +:+ +:+ */
/* By: ngoguey <ngoguey@student.42.fr> +#+ +:+ +#+ */
/* +#+#+#+#+#+ +#+ */
/* Created: 2014/12/11 15:58:47 by ngoguey #+# #+#... | .text
.file "draw_mandelbrot_cuda.hip"
.globl _Z35__device_stub__fra_draw_mandelbrot25s_fraPc # -- Begin function _Z35__device_stub__fra_draw_mandelbrot25s_fraPc
.p2align 4, 0x90
.type _Z35__device_stub__fra_draw_mandelbrot25s_fraPc,@function
_Z35__device_stub__fra_draw_mandelbrot25s_fraPc: # @_Z35__device_stub__fra_dr... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000b378e_00000000-6_draw_mandelbrot_cuda.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
a... | .text
.file "draw_mandelbrot_cuda.hip"
.globl _Z35__device_stub__fra_draw_mandelbrot25s_fraPc # -- Begin function _Z35__device_stub__fra_draw_mandelbrot25s_fraPc
.p2align 4, 0x90
.type _Z35__device_stub__fra_draw_mandelbrot25s_fraPc,@function
_Z35__device_stub__fra_draw_mandelbrot25s_fraPc: # @_Z35__device_stub__fra_dr... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
/*
* `loop` を CUDA カーネルにリファクタリングします。
* 新しいカーネルは元のループを 1 回だけ反復する必要があります。
*/
void loop(int N)
{
for (int i = 0; i < N; ++i)
{
printf("This is iteration number %d\n", i);
}
}
int main()
{
/*
* `loop` をカーネルとして起動するようにリファクタリングする場合は
* 必ず実行構成を使用して、実行する「反復」回数を制御してください。
* この演習では、1 ブロックのスレッドのみを使用します。
*/
int N =... | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
/*
* `loop` を CUDA カーネルにリファクタリングします。
* 新しいカーネルは元のループを 1 回だけ反復する必要があります。
*/
void loop(int N)
{
for (int i = 0; i < N; ++i)
{
printf("This is iteration number %d\n", i);
}
}
int main()
{
/*
* `loop` をカーネルとして起動するようにリファクタリングする場合は
* 必ず実行構成を使用して、実行する「反復」回数を制御してください。
* この演習では、1 ブロックのスレッドのみを使用します。
*/
int N =... | .file "tmpxft_0006b31d_00000000-6_01-single-block-loop.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
a... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
/*
* `loop` を CUDA カーネルにリファクタリングします。
* 新しいカーネルは元のループを 1 回だけ反復する必要があります。
*/
void loop(int N)
{
for (int i = 0; i < N; ++i)
{
printf("This is iteration number %d\n", i);
}
}
int main()
{
/*
* `loop` をカーネルとして起動するようにリファクタリングする場合は
* 必ず実行構成を使用して、実行する「反復」回数を制御してください。
* この演習では、1 ブロックのスレッドのみを使用します。
*/
int N =... | #include <hip/hip_runtime.h>
#include <stdio.h>
/*
* `loop` を CUDA カーネルにリファクタリングします。
* 新しいカーネルは元のループを 1 回だけ反復する必要があります。
*/
void loop(int N)
{
for (int i = 0; i < N; ++i)
{
printf("This is iteration number %d\n", i);
}
}
int main()
{
/*
* `loop` をカーネルとして起動するようにリファクタリングする場合は
* 必ず実行構成を使用して、実行する「反復」回数を制御してください。
* この演習では、1 ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
/*
* `loop` を CUDA カーネルにリファクタリングします。
* 新しいカーネルは元のループを 1 回だけ反復する必要があります。
*/
void loop(int N)
{
for (int i = 0; i < N; ++i)
{
printf("This is iteration number %d\n", i);
}
}
int main()
{
/*
* `loop` をカーネルとして起動するようにリファクタリングする場合は
* 必ず実行構成を使用して、実行する「反復」回数を制御してください。
* この演習では、1 ... | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
/*
* `loop` を CUDA カーネルにリファクタリングします。
* 新しいカーネルは元のループを 1 回だけ反復する必要があります。
*/
void loop(int N)
{
for (int i = 0; i < N; ++i)
{
printf("This is iteration number %d\n", i);
}
}
int main()
{
/*
* `loop` をカーネルとして起動するようにリファクタリングする場合は
* 必ず実行構成を使用して、実行する「反復」回数を制御してください。
* この演習では、1 ... | .text
.file "01-single-block-loop.hip"
.globl _Z4loopi # -- Begin function _Z4loopi
.p2align 4, 0x90
.type _Z4loopi,@function
_Z4loopi: # @_Z4loopi
.cfi_startproc
# %bb.0:
testl %edi, %edi
jle .LBB0_4
# %bb.1: # %.lr.ph.preheader
pushq ... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0006b31d_00000000-6_01-single-block-loop.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
a... | .text
.file "01-single-block-loop.hip"
.globl _Z4loopi # -- Begin function _Z4loopi
.p2align 4, 0x90
.type _Z4loopi,@function
_Z4loopi: # @_Z4loopi
.cfi_startproc
# %bb.0:
testl %edi, %edi
jle .LBB0_4
# %bb.1: # %.lr.ph.preheader
pushq ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | // Copyright (c) 2020 Saurabh Yadav
//
// This software is released under the MIT License.
// https://opensource.org/licenses/MIT
#include <stdio.h>
#include <unistd.h>
#include <stdlib.h>
#include <cuda_runtime.h>
int main()
{
cudaError_t err = cudaSuccess;
int device_count;
err = cudaGetDeviceCount(&device_count... | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | // Copyright (c) 2020 Saurabh Yadav
//
// This software is released under the MIT License.
// https://opensource.org/licenses/MIT
#include <stdio.h>
#include <unistd.h>
#include <stdlib.h>
#include <cuda_runtime.h>
int main()
{
cudaError_t err = cudaSuccess;
int device_count;
err = cudaGetDeviceCount(&device_count... | .file "tmpxft_000d3a82_00000000-6_device_info.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2073:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | // Copyright (c) 2020 Saurabh Yadav
//
// This software is released under the MIT License.
// https://opensource.org/licenses/MIT
#include <stdio.h>
#include <unistd.h>
#include <stdlib.h>
#include <cuda_runtime.h>
int main()
{
cudaError_t err = cudaSuccess;
int device_count;
err = cudaGetDeviceCount(&device_count... | // Copyright (c) 2020 Saurabh Yadav
//
// This software is released under the MIT License.
// https://opensource.org/licenses/MIT
#include <stdio.h>
#include <unistd.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
int main()
{
hipError_t err = hipSuccess;
int device_count;
err = hipGetDeviceCount(&device_count... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | // Copyright (c) 2020 Saurabh Yadav
//
// This software is released under the MIT License.
// https://opensource.org/licenses/MIT
#include <stdio.h>
#include <unistd.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
int main()
{
hipError_t err = hipSuccess;
int device_count;
err = hipGetDeviceCount(&device_count... | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | // Copyright (c) 2020 Saurabh Yadav
//
// This software is released under the MIT License.
// https://opensource.org/licenses/MIT
#include <stdio.h>
#include <unistd.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
int main()
{
hipError_t err = hipSuccess;
int device_count;
err = hipGetDeviceCount(&device_count... | .text
.file "device_info.hip"
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %r14
.cfi_def_cfa_offset 16
pushq %rbx
.cfi_def_cfa_offset 24
subq $1480, %rsp # imm = 0x5... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000d3a82_00000000-6_device_info.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2073:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... | .text
.file "device_info.hip"
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %r14
.cfi_def_cfa_offset 16
pushq %rbx
.cfi_def_cfa_offset 24
subq $1480, %rsp # imm = 0x5... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdint.h>
#include <stdio.h>
#define N 34
#define THREADS_PER_BLOCK 32
__global__ void reverse(int* x) {
size_t index = THREADS_PER_BLOCK * blockIdx.x + threadIdx.x;
if (index < N/2) {
int temp = x[index];
x[index] = x[N-1-index];
x[N-1-index] = temp;
}
}
int main() {
// Allocate arrays for X and Y on the CPU... | code for sm_80
Function : _Z7reversePi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e2800000025... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdint.h>
#include <stdio.h>
#define N 34
#define THREADS_PER_BLOCK 32
__global__ void reverse(int* x) {
size_t index = THREADS_PER_BLOCK * blockIdx.x + threadIdx.x;
if (index < N/2) {
int temp = x[index];
x[index] = x[N-1-index];
x[N-1-index] = temp;
}
}
int main() {
// Allocate arrays for X and Y on the CPU... | .file "tmpxft_00177ed8_00000000-6_reverse.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdint.h>
#include <stdio.h>
#define N 34
#define THREADS_PER_BLOCK 32
__global__ void reverse(int* x) {
size_t index = THREADS_PER_BLOCK * blockIdx.x + threadIdx.x;
if (index < N/2) {
int temp = x[index];
x[index] = x[N-1-index];
x[N-1-index] = temp;
}
}
int main() {
// Allocate arrays for X and Y on the CPU... | #include <hip/hip_runtime.h>
#include <stdint.h>
#include <stdio.h>
#define N 34
#define THREADS_PER_BLOCK 32
__global__ void reverse(int* x) {
size_t index = THREADS_PER_BLOCK * blockIdx.x + threadIdx.x;
if (index < N/2) {
int temp = x[index];
x[index] = x[N-1-index];
x[N-1-index] = temp;
}
}
int main() {
// Allocate ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdint.h>
#include <stdio.h>
#define N 34
#define THREADS_PER_BLOCK 32
__global__ void reverse(int* x) {
size_t index = THREADS_PER_BLOCK * blockIdx.x + threadIdx.x;
if (index < N/2) {
int temp = x[index];
x[index] = x[N-1-index];
x[N-1-index] = temp;
}
}
int main() {
// Allocate ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z7reversePi
.globl _Z7reversePi
.p2align 8
.type _Z7reversePi,@function
_Z7reversePi:
v_lshl_add_u32 v0, s15, 5, v0
s_mov_b32 s2, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_u32_e32 17, v0
s_cbranch_execz .LBB0_2
... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdint.h>
#include <stdio.h>
#define N 34
#define THREADS_PER_BLOCK 32
__global__ void reverse(int* x) {
size_t index = THREADS_PER_BLOCK * blockIdx.x + threadIdx.x;
if (index < N/2) {
int temp = x[index];
x[index] = x[N-1-index];
x[N-1-index] = temp;
}
}
int main() {
// Allocate ... | .text
.file "reverse.hip"
.globl _Z22__device_stub__reversePi # -- Begin function _Z22__device_stub__reversePi
.p2align 4, 0x90
.type _Z22__device_stub__reversePi,@function
_Z22__device_stub__reversePi: # @_Z22__device_stub__reversePi
.cfi_startproc
# %bb.0:
subq $72, %rsp
.cfi_def_cfa_offset 80
movq %rdi,... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z7reversePi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e2800000025... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z7reversePi
.globl _Z7reversePi
.p2align 8
.type _Z7reversePi,@function
_Z7reversePi:
v_lshl_add_u32 v0, s15, 5, v0
s_mov_b32 s2, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_u32_e32 17, v0
s_cbranch_execz .LBB0_2
... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00177ed8_00000000-6_reverse.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
... | .text
.file "reverse.hip"
.globl _Z22__device_stub__reversePi # -- Begin function _Z22__device_stub__reversePi
.p2align 4, 0x90
.type _Z22__device_stub__reversePi,@function
_Z22__device_stub__reversePi: # @_Z22__device_stub__reversePi
.cfi_startproc
# %bb.0:
subq $72, %rsp
.cfi_def_cfa_offset 80
movq %rdi,... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
/*
Autor: Munesh Singh
Date: 08 March 2010
Vector addition using cudaMallocPitch
*/
const int width = 567;
const int height = 985;
__global__ void testKernel2D(float* M, float* N, float* P, size_t pitch) {
int col = threadIdx.x + blockIdx.x * blockDim.x;
int row = threadIdx.y + blockIdx.y * blockD... | code for sm_80
Function : _Z12testKernel2DPfS_S_m
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R9, SR_TID.X ; /* 0x0000000000097919 */
/* 0x000e280000002100 */
/*... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
/*
Autor: Munesh Singh
Date: 08 March 2010
Vector addition using cudaMallocPitch
*/
const int width = 567;
const int height = 985;
__global__ void testKernel2D(float* M, float* N, float* P, size_t pitch) {
int col = threadIdx.x + blockIdx.x * blockDim.x;
int row = threadIdx.y + blockIdx.y * blockD... | .file "tmpxft_000e4cdf_00000000-6_testKernel2D.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, ... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
/*
Autor: Munesh Singh
Date: 08 March 2010
Vector addition using cudaMallocPitch
*/
const int width = 567;
const int height = 985;
__global__ void testKernel2D(float* M, float* N, float* P, size_t pitch) {
int col = threadIdx.x + blockIdx.x * blockDim.x;
int row = threadIdx.y + blockIdx.y * blockD... | #include <hip/hip_runtime.h>
#include "includes.h"
/*
Autor: Munesh Singh
Date: 08 March 2010
Vector addition using cudaMallocPitch
*/
const int width = 567;
const int height = 985;
__global__ void testKernel2D(float* M, float* N, float* P, size_t pitch) {
int col = threadIdx.x + blockIdx.x * blockDim.x;
int row = thre... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
/*
Autor: Munesh Singh
Date: 08 March 2010
Vector addition using cudaMallocPitch
*/
const int width = 567;
const int height = 985;
__global__ void testKernel2D(float* M, float* N, float* P, size_t pitch) {
int col = threadIdx.x + blockIdx.x * blockDim.x;
int row = thre... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12testKernel2DPfS_S_m
.globl _Z12testKernel2DPfS_S_m
.p2align 8
.type _Z12testKernel2DPfS_S_m,@function
_Z12testKernel2DPfS_S_m:
s_load_b32 s2, s[0:1], 0x2c
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_and_b32... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
/*
Autor: Munesh Singh
Date: 08 March 2010
Vector addition using cudaMallocPitch
*/
const int width = 567;
const int height = 985;
__global__ void testKernel2D(float* M, float* N, float* P, size_t pitch) {
int col = threadIdx.x + blockIdx.x * blockDim.x;
int row = thre... | .text
.file "testKernel2D.hip"
.globl _Z27__device_stub__testKernel2DPfS_S_m # -- Begin function _Z27__device_stub__testKernel2DPfS_S_m
.p2align 4, 0x90
.type _Z27__device_stub__testKernel2DPfS_S_m,@function
_Z27__device_stub__testKernel2DPfS_S_m: # @_Z27__device_stub__testKernel2DPfS_S_m
.cfi_startproc
# %bb.0:
subq $... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z12testKernel2DPfS_S_m
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R9, SR_TID.X ; /* 0x0000000000097919 */
/* 0x000e280000002100 */
/*... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12testKernel2DPfS_S_m
.globl _Z12testKernel2DPfS_S_m
.p2align 8
.type _Z12testKernel2DPfS_S_m,@function
_Z12testKernel2DPfS_S_m:
s_load_b32 s2, s[0:1], 0x2c
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_and_b32... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000e4cdf_00000000-6_testKernel2D.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, ... | .text
.file "testKernel2D.hip"
.globl _Z27__device_stub__testKernel2DPfS_S_m # -- Begin function _Z27__device_stub__testKernel2DPfS_S_m
.p2align 4, 0x90
.type _Z27__device_stub__testKernel2DPfS_S_m,@function
_Z27__device_stub__testKernel2DPfS_S_m: # @_Z27__device_stub__testKernel2DPfS_S_m
.cfi_startproc
# %bb.0:
subq $... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <sys/time.h>
#include <iostream>
#include <fstream>
#include <cstdint>
using namespace std;
/**
* O argumento deve ser double
*/
#define GET_TIME(now) { \
struct timespec time; \
clock_gettime(CLOCK_MONOTONIC_RAW, &time); \
now = time.tv_sec + time.tv_nsec/1000000000.0; \
}
/**
* Para checar... | code for sm_80
Function : _Z25applyMaskWithSharedMemoryPhS_iii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e220... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <sys/time.h>
#include <iostream>
#include <fstream>
#include <cstdint>
using namespace std;
/**
* O argumento deve ser double
*/
#define GET_TIME(now) { \
struct timespec time; \
clock_gettime(CLOCK_MONOTONIC_RAW, &time); \
now = time.tv_sec + time.tv_nsec/1000000000.0; \
}
/**
* Para checar... | .file "tmpxft_000cdb49_00000000-6_sobel.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3807:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnre... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <sys/time.h>
#include <iostream>
#include <fstream>
#include <cstdint>
using namespace std;
/**
* O argumento deve ser double
*/
#define GET_TIME(now) { \
struct timespec time; \
clock_gettime(CLOCK_MONOTONIC_RAW, &time); \
now = time.tv_sec + time.tv_nsec/1000000000.0; \
}
/**
* Para checar... | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <sys/time.h>
#include <iostream>
#include <fstream>
#include <cstdint>
using namespace std;
/**
* O argumento deve ser double
*/
#define GET_TIME(now) { \
struct timespec time; \
clock_gettime(CLOCK_MONOTONIC_RAW, &time); \
now = time.tv_sec + time.tv_nsec/100000... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <sys/time.h>
#include <iostream>
#include <fstream>
#include <cstdint>
using namespace std;
/**
* O argumento deve ser double
*/
#define GET_TIME(now) { \
struct timespec time; \
clock_gettime(CLOCK_MONOTONIC_RAW, &time); \
now = time.tv_sec + time.tv_nsec/100000... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9applyMaskPhS_iii
.globl _Z9applyMaskPhS_iii
.p2align 8
.type _Z9applyMaskPhS_iii,@function
_Z9applyMaskPhS_iii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b64 s[4:5], s[0:1], 0x10
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v5, v0, ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void gpu_floyd_kernel(int k, int* adjacency_mtx, int* paths, int size)
{
int col = blockIdx.x * blockDim.x + threadIdx.x;
if (col >= size)return;
int idx = size * blockIdx.y + col;
__shared__ int best;
if (threadIdx.x == 0)
best = adjacency_mtx[size * blockIdx.y + k];
__syncthreads();
i... | code for sm_80
Function : _Z16gpu_floyd_kerneliPiS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void gpu_floyd_kernel(int k, int* adjacency_mtx, int* paths, int size)
{
int col = blockIdx.x * blockDim.x + threadIdx.x;
if (col >= size)return;
int idx = size * blockIdx.y + col;
__shared__ int best;
if (threadIdx.x == 0)
best = adjacency_mtx[size * blockIdx.y + k];
__syncthreads();
i... | .file "tmpxft_0017b842_00000000-6_gpu_floyd_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq ... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void gpu_floyd_kernel(int k, int* adjacency_mtx, int* paths, int size)
{
int col = blockIdx.x * blockDim.x + threadIdx.x;
if (col >= size)return;
int idx = size * blockIdx.y + col;
__shared__ int best;
if (threadIdx.x == 0)
best = adjacency_mtx[size * blockIdx.y + k];
__syncthreads();
i... | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void gpu_floyd_kernel(int k, int* adjacency_mtx, int* paths, int size)
{
int col = blockIdx.x * blockDim.x + threadIdx.x;
if (col >= size)return;
int idx = size * blockIdx.y + col;
__shared__ int best;
if (threadIdx.x == 0)
best = adjacency_mtx[size * blockI... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void gpu_floyd_kernel(int k, int* adjacency_mtx, int* paths, int size)
{
int col = blockIdx.x * blockDim.x + threadIdx.x;
if (col >= size)return;
int idx = size * blockIdx.y + col;
__shared__ int best;
if (threadIdx.x == 0)
best = adjacency_mtx[size * blockI... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z16gpu_floyd_kerneliPiS_i
.globl _Z16gpu_floyd_kerneliPiS_i
.p2align 8
.type _Z16gpu_floyd_kerneliPiS_i,@function
_Z16gpu_floyd_kerneliPiS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s8, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void gpu_floyd_kernel(int k, int* adjacency_mtx, int* paths, int size)
{
int col = blockIdx.x * blockDim.x + threadIdx.x;
if (col >= size)return;
int idx = size * blockIdx.y + col;
__shared__ int best;
if (threadIdx.x == 0)
best = adjacency_mtx[size * blockI... | .text
.file "gpu_floyd_kernel.hip"
.globl _Z31__device_stub__gpu_floyd_kerneliPiS_i # -- Begin function _Z31__device_stub__gpu_floyd_kerneliPiS_i
.p2align 4, 0x90
.type _Z31__device_stub__gpu_floyd_kerneliPiS_i,@function
_Z31__device_stub__gpu_floyd_kerneliPiS_i: # @_Z31__device_stub__gpu_floyd_kerneliPiS_i
.cfi_startp... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z16gpu_floyd_kerneliPiS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z16gpu_floyd_kerneliPiS_i
.globl _Z16gpu_floyd_kerneliPiS_i
.p2align 8
.type _Z16gpu_floyd_kerneliPiS_i,@function
_Z16gpu_floyd_kerneliPiS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s8, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0017b842_00000000-6_gpu_floyd_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq ... | .text
.file "gpu_floyd_kernel.hip"
.globl _Z31__device_stub__gpu_floyd_kerneliPiS_i # -- Begin function _Z31__device_stub__gpu_floyd_kerneliPiS_i
.p2align 4, 0x90
.type _Z31__device_stub__gpu_floyd_kerneliPiS_i,@function
_Z31__device_stub__gpu_floyd_kerneliPiS_i: # @_Z31__device_stub__gpu_floyd_kerneliPiS_i
.cfi_startp... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <cuda_runtime_api.h>
#include <stdint.h>
__global__ void gaussian_kl_loss_fwd_kernel(
const float *mean,
uint32_t batch_sz,
const float *target_mean,
float var,
float target_var,
float *loss)
{
uint32_t batch_idx = threadIdx.x + blockDim.x * blockIdx.x;
if (batch_idx < batch_sz) {
float x = mean[batch_idx];
fl... | code for sm_80
Function : _Z27gaussian_kl_loss_fwd_kernelPKfjS0_ffPf
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_TID.X ; /* 0x00000000000... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <cuda_runtime_api.h>
#include <stdint.h>
__global__ void gaussian_kl_loss_fwd_kernel(
const float *mean,
uint32_t batch_sz,
const float *target_mean,
float var,
float target_var,
float *loss)
{
uint32_t batch_idx = threadIdx.x + blockDim.x * blockIdx.x;
if (batch_idx < batch_sz) {
float x = mean[batch_idx];
fl... | .file "tmpxft_00097541_00000000-6_gaussian.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <cuda_runtime_api.h>
#include <stdint.h>
__global__ void gaussian_kl_loss_fwd_kernel(
const float *mean,
uint32_t batch_sz,
const float *target_mean,
float var,
float target_var,
float *loss)
{
uint32_t batch_idx = threadIdx.x + blockDim.x * blockIdx.x;
if (batch_idx < batch_sz) {
float x = mean[batch_idx];
fl... | #include <hip/hip_runtime.h>
#include <hip/hip_runtime_api.h>
#include <stdint.h>
__global__ void gaussian_kl_loss_fwd_kernel(
const float *mean,
uint32_t batch_sz,
const float *target_mean,
float var,
float target_var,
float *loss)
{
uint32_t batch_idx = threadIdx.x + blockDim.x * blockIdx.x;
if (batch_idx < batch_sz)... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <hip/hip_runtime_api.h>
#include <stdint.h>
__global__ void gaussian_kl_loss_fwd_kernel(
const float *mean,
uint32_t batch_sz,
const float *target_mean,
float var,
float target_var,
float *loss)
{
uint32_t batch_idx = threadIdx.x + blockDim.x * blockIdx.x;
if (batch_idx < batch_sz)... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z27gaussian_kl_loss_fwd_kernelPKfjS0_ffPf
.globl _Z27gaussian_kl_loss_fwd_kernelPKfjS0_ffPf
.p2align 8
.type _Z27gaussian_kl_loss_fwd_kernelPKfjS0_ffPf,@function
_Z27gaussian_kl_loss_fwd_kernelPKfjS0_ffPf:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x34
s_load_b3... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <hip/hip_runtime_api.h>
#include <stdint.h>
__global__ void gaussian_kl_loss_fwd_kernel(
const float *mean,
uint32_t batch_sz,
const float *target_mean,
float var,
float target_var,
float *loss)
{
uint32_t batch_idx = threadIdx.x + blockDim.x * blockIdx.x;
if (batch_idx < batch_sz)... | .text
.file "gaussian.hip"
.globl _Z42__device_stub__gaussian_kl_loss_fwd_kernelPKfjS0_ffPf # -- Begin function _Z42__device_stub__gaussian_kl_loss_fwd_kernelPKfjS0_ffPf
.p2align 4, 0x90
.type _Z42__device_stub__gaussian_kl_loss_fwd_kernelPKfjS0_ffPf,@function
_Z42__device_stub__gaussian_kl_loss_fwd_kernelPKfjS0_ffPf: ... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z27gaussian_kl_loss_fwd_kernelPKfjS0_ffPf
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_TID.X ; /* 0x00000000000... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z27gaussian_kl_loss_fwd_kernelPKfjS0_ffPf
.globl _Z27gaussian_kl_loss_fwd_kernelPKfjS0_ffPf
.p2align 8
.type _Z27gaussian_kl_loss_fwd_kernelPKfjS0_ffPf,@function
_Z27gaussian_kl_loss_fwd_kernelPKfjS0_ffPf:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x34
s_load_b3... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00097541_00000000-6_gaussian.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp... | .text
.file "gaussian.hip"
.globl _Z42__device_stub__gaussian_kl_loss_fwd_kernelPKfjS0_ffPf # -- Begin function _Z42__device_stub__gaussian_kl_loss_fwd_kernelPKfjS0_ffPf
.p2align 4, 0x90
.type _Z42__device_stub__gaussian_kl_loss_fwd_kernelPKfjS0_ffPf,@function
_Z42__device_stub__gaussian_kl_loss_fwd_kernelPKfjS0_ffPf: ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <iostream>
#include <chrono>
#define BLOCK_SIZE 1024
#define NUM_OF_BANKS 32
#define LOG_NUM_OF_BANKS 5
#define SHIFT_BANK(n) \
(n + (n >> LOG_NUM_OF_BANKS))
__global__ void prefix_sum(float *in, float *out, float* aux, int noc, int res) {
__shared__ float temp[2*BLOCK_SIZE];
int n = BLOCK_SIZE*2;
if (blockIdx... | code for sm_80
Function : _Z9block_addPfS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e220000002500 */
/*0020*... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <iostream>
#include <chrono>
#define BLOCK_SIZE 1024
#define NUM_OF_BANKS 32
#define LOG_NUM_OF_BANKS 5
#define SHIFT_BANK(n) \
(n + (n >> LOG_NUM_OF_BANKS))
__global__ void prefix_sum(float *in, float *out, float* aux, int noc, int res) {
__shared__ float temp[2*BLOCK_SIZE];
int n = BLOCK_SIZE*2;
if (blockIdx... | .file "tmpxft_001a2f88_00000000-6_prefix_sum.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3781:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cud... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <iostream>
#include <chrono>
#define BLOCK_SIZE 1024
#define NUM_OF_BANKS 32
#define LOG_NUM_OF_BANKS 5
#define SHIFT_BANK(n) \
(n + (n >> LOG_NUM_OF_BANKS))
__global__ void prefix_sum(float *in, float *out, float* aux, int noc, int res) {
__shared__ float temp[2*BLOCK_SIZE];
int n = BLOCK_SIZE*2;
if (blockIdx... | #include <hip/hip_runtime.h>
#include <iostream>
#include <chrono>
#define BLOCK_SIZE 1024
#define NUM_OF_BANKS 32
#define LOG_NUM_OF_BANKS 5
#define SHIFT_BANK(n) \
(n + (n >> LOG_NUM_OF_BANKS))
__global__ void prefix_sum(float *in, float *out, float* aux, int noc, int res) {
__shared__ float temp[2*BLOCK_SIZE];
int n... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <chrono>
#define BLOCK_SIZE 1024
#define NUM_OF_BANKS 32
#define LOG_NUM_OF_BANKS 5
#define SHIFT_BANK(n) \
(n + (n >> LOG_NUM_OF_BANKS))
__global__ void prefix_sum(float *in, float *out, float* aux, int noc, int res) {
__shared__ float temp[2*BLOCK_SIZE];
int n... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z10prefix_sumPfS_S_ii
.globl _Z10prefix_sumPfS_S_ii
.p2align 8
.type _Z10prefix_sumPfS_S_ii,@function
_Z10prefix_sumPfS_S_ii:
s_clause 0x1
s_load_b64 s[4:5], s[0:1], 0x0
s_load_b64 s[6:7], s[0:1], 0x18
v_lshlrev_b32_e32 v8, 1, v0
s_mov_b32... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <chrono>
#define BLOCK_SIZE 1024
#define NUM_OF_BANKS 32
#define LOG_NUM_OF_BANKS 5
#define SHIFT_BANK(n) \
(n + (n >> LOG_NUM_OF_BANKS))
__global__ void prefix_sum(float *in, float *out, float* aux, int noc, int res) {
__shared__ float temp[2*BLOCK_SIZE];
int n... | .text
.file "prefix_sum.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z25__device_stub__prefix_sumPfS_S_ii # -- Begin function _Z25__device_stub__prefix_sumPfS_S_ii
... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z9block_addPfS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e220000002500 */
/*0020*... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z10prefix_sumPfS_S_ii
.globl _Z10prefix_sumPfS_S_ii
.p2align 8
.type _Z10prefix_sumPfS_S_ii,@function
_Z10prefix_sumPfS_S_ii:
s_clause 0x1
s_load_b64 s[4:5], s[0:1], 0x0
s_load_b64 s[6:7], s[0:1], 0x18
v_lshlrev_b32_e32 v8, 1, v0
s_mov_b32... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001a2f88_00000000-6_prefix_sum.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3781:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cud... | .text
.file "prefix_sum.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z25__device_stub__prefix_sumPfS_S_ii # -- Begin function _Z25__device_stub__prefix_sumPfS_S_ii
... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void windowBlackman2d(float* idata, int length, int height)
{
int tidx = threadIdx.x + blockIdx.x*blockDim.x;
int tidy = threadIdx.y + blockIdx.y*blockDim.y;
if (tidx < length && tidy < height)
{
idata[tidy * length + tidx] = (0.74 / 2 * -0.5 * cos(2 * PI_F*tidy / (height - 1)) + 0.16 /... | .file "tmpxft_0013f8e3_00000000-6_windowBlackman2d.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq ... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void windowBlackman2d(float* idata, int length, int height)
{
int tidx = threadIdx.x + blockIdx.x*blockDim.x;
int tidy = threadIdx.y + blockIdx.y*blockDim.y;
if (tidx < length && tidy < height)
{
idata[tidy * length + tidx] = (0.74 / 2 * -0.5 * cos(2 * PI_F*tidy / (height - 1)) + 0.16 /... | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void windowBlackman2d(float* idata, int length, int height)
{
int tidx = threadIdx.x + blockIdx.x*blockDim.x;
int tidy = threadIdx.y + blockIdx.y*blockDim.y;
if (tidx < length && tidy < height)
{
idata[tidy * length + tidx] = (0.74 / 2 * -0.5 * cos(2 * PI_F*... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void windowBlackman2d(float* idata, int length, int height)
{
int tidx = threadIdx.x + blockIdx.x*blockDim.x;
int tidy = threadIdx.y + blockIdx.y*blockDim.y;
if (tidx < length && tidy < height)
{
idata[tidy * length + tidx] = (0.74 / 2 * -0.5 * cos(2 * PI_F*... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z16windowBlackman2dPfii
.globl _Z16windowBlackman2dPfii
.p2align 8
.type _Z16windowBlackman2dPfii,@function
_Z16windowBlackman2dPfii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x1c
s_load_b64 s[4:5], s[0:1], 0x8
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u3... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void windowBlackman2d(float* idata, int length, int height)
{
int tidx = threadIdx.x + blockIdx.x*blockDim.x;
int tidy = threadIdx.y + blockIdx.y*blockDim.y;
if (tidx < length && tidy < height)
{
idata[tidy * length + tidx] = (0.74 / 2 * -0.5 * cos(2 * PI_F*... | .text
.file "windowBlackman2d.hip"
.globl _Z31__device_stub__windowBlackman2dPfii # -- Begin function _Z31__device_stub__windowBlackman2dPfii
.p2align 4, 0x90
.type _Z31__device_stub__windowBlackman2dPfii,@function
_Z31__device_stub__windowBlackman2dPfii: # @_Z31__device_stub__windowBlackman2dPfii
.cfi_startproc
# %bb.... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0013f8e3_00000000-6_windowBlackman2d.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq ... | .text
.file "windowBlackman2d.hip"
.globl _Z31__device_stub__windowBlackman2dPfii # -- Begin function _Z31__device_stub__windowBlackman2dPfii
.p2align 4, 0x90
.type _Z31__device_stub__windowBlackman2dPfii,@function
_Z31__device_stub__windowBlackman2dPfii: # @_Z31__device_stub__windowBlackman2dPfii
.cfi_startproc
# %bb.... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
// ERROR CHECKING MACROS //////////////////////////////////////////////////////
__global__ void interpolateMulti(int points, int noDims, int dimRes, float* surrogate, float* predictors, float* results) {
// Global thread index
int idx = blockIdx.x*blockDim.x + threadIdx.x;
if (idx < points) {
floa... | .file "tmpxft_00036bf5_00000000-6_interpolateMulti.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq ... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
// ERROR CHECKING MACROS //////////////////////////////////////////////////////
__global__ void interpolateMulti(int points, int noDims, int dimRes, float* surrogate, float* predictors, float* results) {
// Global thread index
int idx = blockIdx.x*blockDim.x + threadIdx.x;
if (idx < points) {
floa... | #include <hip/hip_runtime.h>
#include "includes.h"
// ERROR CHECKING MACROS //////////////////////////////////////////////////////
__global__ void interpolateMulti(int points, int noDims, int dimRes, float* surrogate, float* predictors, float* results) {
// Global thread index
int idx = blockIdx.x*blockDim.x + threadId... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
// ERROR CHECKING MACROS //////////////////////////////////////////////////////
__global__ void interpolateMulti(int points, int noDims, int dimRes, float* surrogate, float* predictors, float* results) {
// Global thread index
int idx = blockIdx.x*blockDim.x + threadId... | .text
.file "interpolateMulti.hip"
.globl _Z31__device_stub__interpolateMultiiiiPfS_S_ # -- Begin function _Z31__device_stub__interpolateMultiiiiPfS_S_
.p2align 4, 0x90
.type _Z31__device_stub__interpolateMultiiiiPfS_S_,@function
_Z31__device_stub__interpolateMultiiiiPfS_S_: # @_Z31__device_stub__interpolateMultiiiiPfS... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00036bf5_00000000-6_interpolateMulti.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq ... | .text
.file "interpolateMulti.hip"
.globl _Z31__device_stub__interpolateMultiiiiPfS_S_ # -- Begin function _Z31__device_stub__interpolateMultiiiiPfS_S_
.p2align 4, 0x90
.type _Z31__device_stub__interpolateMultiiiiPfS_S_,@function
_Z31__device_stub__interpolateMultiiiiPfS_S_: # @_Z31__device_stub__interpolateMultiiiiPfS... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | __global__ void child(float *z) {
z[threadIdx.x] += 1;
} | code for sm_80
Function : _Z5childPf
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_TID.X ; /* 0x0000000000027919 */
/* 0x000e220000002100 */
/*0020*/ HFMA2.... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | __global__ void child(float *z) {
z[threadIdx.x] += 1;
} | .file "tmpxft_00198e6e_00000000-6_child.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.c... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | __global__ void child(float *z) {
z[threadIdx.x] += 1;
} | #include <hip/hip_runtime.h>
__global__ void child(float *z) {
z[threadIdx.x] += 1;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
__global__ void child(float *z) {
z[threadIdx.x] += 1;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z5childPf
.globl _Z5childPf
.p2align 8
.type _Z5childPf,@function
_Z5childPf:
s_load_b64 s[0:1], s[0:1], 0x0
v_lshlrev_b32_e32 v0, 2, v0
s_waitcnt lgkmcnt(0)
global_load_b32 v1, v0, s[0:1]
s_waitcnt vmcnt(0)
v_add_f... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
__global__ void child(float *z) {
z[threadIdx.x] += 1;
} | .text
.file "child.hip"
.globl _Z20__device_stub__childPf # -- Begin function _Z20__device_stub__childPf
.p2align 4, 0x90
.type _Z20__device_stub__childPf,@function
_Z20__device_stub__childPf: # @_Z20__device_stub__childPf
.cfi_startproc
# %bb.0:
subq $72, %rsp
.cfi_def_cfa_offset 80
movq %rdi, 64(%rsp... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z5childPf
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_TID.X ; /* 0x0000000000027919 */
/* 0x000e220000002100 */
/*0020*/ HFMA2.... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z5childPf
.globl _Z5childPf
.p2align 8
.type _Z5childPf,@function
_Z5childPf:
s_load_b64 s[0:1], s[0:1], 0x0
v_lshlrev_b32_e32 v0, 2, v0
s_waitcnt lgkmcnt(0)
global_load_b32 v1, v0, s[0:1]
s_waitcnt vmcnt(0)
v_add_f... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00198e6e_00000000-6_child.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.c... | .text
.file "child.hip"
.globl _Z20__device_stub__childPf # -- Begin function _Z20__device_stub__childPf
.p2align 4, 0x90
.type _Z20__device_stub__childPf,@function
_Z20__device_stub__childPf: # @_Z20__device_stub__childPf
.cfi_startproc
# %bb.0:
subq $72, %rsp
.cfi_def_cfa_offset 80
movq %rdi, 64(%rsp... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <iostream>
//3d_array.cu
#include <stdlib.h>
#include <stdio.h>
// Device code
__global__ void MyKernel(cudaPitchedPtr devPitchedPtr,cudaExtent extent)
{
char * start = (char*) devPitchedPtr.ptr;
size_t x_dim = devPitchedPtr.pitch;
size_t x_times_y_dim = x_dim * extent.height;
int x = threadIdx.x;
int y = thre... | code for sm_80
Function : _Z8MyKernel14cudaPitchedPtr10cudaExtent
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fc800078e00ff */
/*0010*/ S2R R17, SR_TID.Y ; /* 0x0000000000117... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <iostream>
//3d_array.cu
#include <stdlib.h>
#include <stdio.h>
// Device code
__global__ void MyKernel(cudaPitchedPtr devPitchedPtr,cudaExtent extent)
{
char * start = (char*) devPitchedPtr.ptr;
size_t x_dim = devPitchedPtr.pitch;
size_t x_times_y_dim = x_dim * extent.height;
int x = threadIdx.x;
int y = thre... | .file "tmpxft_000c8ffa_00000000-6_cuda3d.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnr... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <iostream>
//3d_array.cu
#include <stdlib.h>
#include <stdio.h>
// Device code
__global__ void MyKernel(cudaPitchedPtr devPitchedPtr,cudaExtent extent)
{
char * start = (char*) devPitchedPtr.ptr;
size_t x_dim = devPitchedPtr.pitch;
size_t x_times_y_dim = x_dim * extent.height;
int x = threadIdx.x;
int y = thre... | #include <hip/hip_runtime.h>
#include <iostream>
//3d_array.cu
#include <stdlib.h>
#include <stdio.h>
// Device code
__global__ void MyKernel(hipPitchedPtr devPitchedPtr,hipExtent extent)
{
char * start = (char*) devPitchedPtr.ptr;
size_t x_dim = devPitchedPtr.pitch;
size_t x_times_y_dim = x_dim * extent.height;
int x ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <iostream>
//3d_array.cu
#include <stdlib.h>
#include <stdio.h>
// Device code
__global__ void MyKernel(hipPitchedPtr devPitchedPtr,hipExtent extent)
{
char * start = (char*) devPitchedPtr.ptr;
size_t x_dim = devPitchedPtr.pitch;
size_t x_times_y_dim = x_dim * extent.height;
int x ... | .text
.file "cuda3d.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z23__device_stub__MyKernel13hipPitchedPtr9hipExtent # -- Begin function _Z23__device_stub__MyKernel... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000c8ffa_00000000-6_cuda3d.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnr... | .text
.file "cuda3d.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z23__device_stub__MyKernel13hipPitchedPtr9hipExtent # -- Begin function _Z23__device_stub__MyKernel... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void kernel_fill_nn_cuda(unsigned int *d_nn, int *nearest_neighbour_indexes, unsigned int number_nearest_neighbour_indexes)
{
int ind=blockIdx.x*blockDim.x+threadIdx.x;
if(ind < number_nearest_neighbour_indexes)
{
if(nearest_neighbour_indexes[ind] < 0)
{
d_nn[ind] = 0;
}else
{
d_nn[ind]... | code for sm_80
Function : _Z19kernel_fill_nn_cudaPjPij
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R4, SR_CTAID.X ; /* 0x0000000000047919 */
/* 0x000e28000000250... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void kernel_fill_nn_cuda(unsigned int *d_nn, int *nearest_neighbour_indexes, unsigned int number_nearest_neighbour_indexes)
{
int ind=blockIdx.x*blockDim.x+threadIdx.x;
if(ind < number_nearest_neighbour_indexes)
{
if(nearest_neighbour_indexes[ind] < 0)
{
d_nn[ind] = 0;
}else
{
d_nn[ind]... | .file "tmpxft_00179db8_00000000-6_kernel_fill_nn_cuda.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
ad... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void kernel_fill_nn_cuda(unsigned int *d_nn, int *nearest_neighbour_indexes, unsigned int number_nearest_neighbour_indexes)
{
int ind=blockIdx.x*blockDim.x+threadIdx.x;
if(ind < number_nearest_neighbour_indexes)
{
if(nearest_neighbour_indexes[ind] < 0)
{
d_nn[ind] = 0;
}else
{
d_nn[ind]... | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void kernel_fill_nn_cuda(unsigned int *d_nn, int *nearest_neighbour_indexes, unsigned int number_nearest_neighbour_indexes)
{
int ind=blockIdx.x*blockDim.x+threadIdx.x;
if(ind < number_nearest_neighbour_indexes)
{
if(nearest_neighbour_indexes[ind] < 0)
{
d_n... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void kernel_fill_nn_cuda(unsigned int *d_nn, int *nearest_neighbour_indexes, unsigned int number_nearest_neighbour_indexes)
{
int ind=blockIdx.x*blockDim.x+threadIdx.x;
if(ind < number_nearest_neighbour_indexes)
{
if(nearest_neighbour_indexes[ind] < 0)
{
d_n... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z19kernel_fill_nn_cudaPjPij
.globl _Z19kernel_fill_nn_cudaPjPij
.p2align 8
.type _Z19kernel_fill_nn_cudaPjPij,@function
_Z19kernel_fill_nn_cudaPjPij:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void kernel_fill_nn_cuda(unsigned int *d_nn, int *nearest_neighbour_indexes, unsigned int number_nearest_neighbour_indexes)
{
int ind=blockIdx.x*blockDim.x+threadIdx.x;
if(ind < number_nearest_neighbour_indexes)
{
if(nearest_neighbour_indexes[ind] < 0)
{
d_n... | .text
.file "kernel_fill_nn_cuda.hip"
.globl _Z34__device_stub__kernel_fill_nn_cudaPjPij # -- Begin function _Z34__device_stub__kernel_fill_nn_cudaPjPij
.p2align 4, 0x90
.type _Z34__device_stub__kernel_fill_nn_cudaPjPij,@function
_Z34__device_stub__kernel_fill_nn_cudaPjPij: # @_Z34__device_stub__kernel_fill_nn_cudaPjPi... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z19kernel_fill_nn_cudaPjPij
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R4, SR_CTAID.X ; /* 0x0000000000047919 */
/* 0x000e28000000250... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z19kernel_fill_nn_cudaPjPij
.globl _Z19kernel_fill_nn_cudaPjPij
.p2align 8
.type _Z19kernel_fill_nn_cudaPjPij,@function
_Z19kernel_fill_nn_cudaPjPij:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00179db8_00000000-6_kernel_fill_nn_cuda.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
ad... | .text
.file "kernel_fill_nn_cuda.hip"
.globl _Z34__device_stub__kernel_fill_nn_cudaPjPij # -- Begin function _Z34__device_stub__kernel_fill_nn_cudaPjPij
.p2align 4, 0x90
.type _Z34__device_stub__kernel_fill_nn_cudaPjPij,@function
_Z34__device_stub__kernel_fill_nn_cudaPjPij: # @_Z34__device_stub__kernel_fill_nn_cudaPjPi... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | /*
* Copyright 2014 Nervana Systems Inc. All rights reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicabl... | code for sm_80
Function : hconv_fprop_K64_N64
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R4, SR_TID.X ; /* 0x0000000000047919 */
/* 0x000e22000... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /*
* Copyright 2014 Nervana Systems Inc. All rights reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicabl... | .file "tmpxft_0013a9d8_00000000-6_hconv_fprop_K64_N64.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
ad... |
Subsets and Splits
No community queries yet
The top public SQL queries from the community will appear here once available.