system stringclasses 7
values | input stringlengths 10 94.5k | output stringlengths 14 55.5k |
|---|---|---|
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <stdio.h>
#include <stdlib.h>
cudaError_t addWithCuda(int *c, const int *a, const int *b, unsigned int size);
cudaError_t barycentricCuda(const float3 *v0, const float3 *v1, const float3 *v2, const float *da, const float *db, const float *dc, floa... | #include "hip/hip_runtime.h"
#include <stdio.h>
#include <stdlib.h>
hipError_t addWithCuda(int *c, const int *a, const int *b, unsigned int size);
hipError_t barycentricCuda(const float3 *v0, const float3 *v1, const float3 *v2, const float *da, const float *db, const float *dc, float *dOut, int2 framebufferSize);
__dev... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include "hip/hip_runtime.h"
#include <stdio.h>
#include <stdlib.h>
hipError_t addWithCuda(int *c, const int *a, const int *b, unsigned int size);
hipError_t barycentricCuda(const float3 *v0, const float3 *v1, const float3 *v2, const float *da, const float *db, const float *dc, float *dOut, int2 framebufferSize);
__dev... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z10baryKernelPK15HIP_vector_typeIfLj3EES2_S2_PKfS4_S4_PfPiS6_
.globl _Z10baryKernelPK15HIP_vector_typeIfLj3EES2_S2_PKfS4_S4_PfPiS6_
.p2align 8
.type _Z10baryKernelPK15HIP_vector_typeIfLj3EES2_S2_PKfS4_S4_PfPiS6_,@function
_Z10baryKernelPK15HIP_vector_typeIf... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include "hip/hip_runtime.h"
#include <stdio.h>
#include <stdlib.h>
hipError_t addWithCuda(int *c, const int *a, const int *b, unsigned int size);
hipError_t barycentricCuda(const float3 *v0, const float3 *v1, const float3 *v2, const float *da, const float *db, const float *dc, float *dOut, int2 framebufferSize);
__dev... | .text
.file "kernel.hip"
.globl _Z25__device_stub__baryKernelPK15HIP_vector_typeIfLj3EES2_S2_PKfS4_S4_PfPiS6_ # -- Begin function _Z25__device_stub__baryKernelPK15HIP_vector_typeIfLj3EES2_S2_PKfS4_S4_PfPiS6_
.p2align 4, 0x90
.type _Z25__device_stub__baryKernelPK15HIP_vector_typeIfLj3EES2_S2_PKfS4_S4_PfPiS6_,@function
_... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z10baryKernelPK6float3S1_S1_PKfS3_S3_PfPiS5_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x0][0x198] ; /* 0x000... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z10baryKernelPK15HIP_vector_typeIfLj3EES2_S2_PKfS4_S4_PfPiS6_
.globl _Z10baryKernelPK15HIP_vector_typeIfLj3EES2_S2_PKfS4_S4_PfPiS6_
.p2align 8
.type _Z10baryKernelPK15HIP_vector_typeIfLj3EES2_S2_PKfS4_S4_PfPiS6_,@function
_Z10baryKernelPK15HIP_vector_typeIf... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001270e4_00000000-6_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2063:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... | .text
.file "kernel.hip"
.globl _Z25__device_stub__baryKernelPK15HIP_vector_typeIfLj3EES2_S2_PKfS4_S4_PfPiS6_ # -- Begin function _Z25__device_stub__baryKernelPK15HIP_vector_typeIfLj3EES2_S2_PKfS4_S4_PfPiS6_
.p2align 4, 0x90
.type _Z25__device_stub__baryKernelPK15HIP_vector_typeIfLj3EES2_S2_PKfS4_S4_PfPiS6_,@function
_... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "cuda.h"
#include "stdio.h"
#define threads_per_block 512
void printi(int i){
printf("%d\n", i);
}
void init_CPU_array(int* array, int n){
for(int i = 0; i < n; i++) {
array[i] = 1;
}
}
void print_CPU_array(int array[], int n){
for(int i = 0; i < n; i++) {
printi(array[i]);
}
}
// realiza la suma de determinan... | code for sm_80
Function : _Z7sumadorPiS_f
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0020*/... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "cuda.h"
#include "stdio.h"
#define threads_per_block 512
void printi(int i){
printf("%d\n", i);
}
void init_CPU_array(int* array, int n){
for(int i = 0; i < n; i++) {
array[i] = 1;
}
}
void print_CPU_array(int array[], int n){
for(int i = 0; i < n; i++) {
printi(array[i]);
}
}
// realiza la suma de determinan... | .file "tmpxft_0019d548_00000000-6_sum_test_shared_multi_block_final.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2063:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFa... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "cuda.h"
#include "stdio.h"
#define threads_per_block 512
void printi(int i){
printf("%d\n", i);
}
void init_CPU_array(int* array, int n){
for(int i = 0; i < n; i++) {
array[i] = 1;
}
}
void print_CPU_array(int array[], int n){
for(int i = 0; i < n; i++) {
printi(array[i]);
}
}
// realiza la suma de determinan... | #include "hip/hip_runtime.h"
#include "stdio.h"
#define threads_per_block 512
void printi(int i){
printf("%d\n", i);
}
void init_CPU_array(int* array, int n){
for(int i = 0; i < n; i++) {
array[i] = 1;
}
}
void print_CPU_array(int array[], int n){
for(int i = 0; i < n; i++) {
printi(array[i]);
}
}
// realiza la suma de... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include "hip/hip_runtime.h"
#include "stdio.h"
#define threads_per_block 512
void printi(int i){
printf("%d\n", i);
}
void init_CPU_array(int* array, int n){
for(int i = 0; i < n; i++) {
array[i] = 1;
}
}
void print_CPU_array(int array[], int n){
for(int i = 0; i < n; i++) {
printi(array[i]);
}
}
// realiza la suma de... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z7sumadorPiS_f
.globl _Z7sumadorPiS_f
.p2align 8
.type _Z7sumadorPiS_f,@function
_Z7sumadorPiS_f:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x24
s_load_b32 s2, s[0:1], 0x10
s_mov_b32 s5, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include "hip/hip_runtime.h"
#include "stdio.h"
#define threads_per_block 512
void printi(int i){
printf("%d\n", i);
}
void init_CPU_array(int* array, int n){
for(int i = 0; i < n; i++) {
array[i] = 1;
}
}
void print_CPU_array(int array[], int n){
for(int i = 0; i < n; i++) {
printi(array[i]);
}
}
// realiza la suma de... | .text
.file "sum_test_shared_multi_block_final.hip"
.globl _Z6printii # -- Begin function _Z6printii
.p2align 4, 0x90
.type _Z6printii,@function
_Z6printii: # @_Z6printii
.cfi_startproc
# %bb.0:
movl %edi, %esi
movl $.L.str, %edi
xorl %eax, %eax
jmp printf ... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0019d548_00000000-6_sum_test_shared_multi_block_final.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2063:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFa... | .text
.file "sum_test_shared_multi_block_final.hip"
.globl _Z6printii # -- Begin function _Z6printii
.p2align 4, 0x90
.type _Z6printii,@function
_Z6printii: # @_Z6printii
.cfi_startproc
# %bb.0:
movl %edi, %esi
movl $.L.str, %edi
xorl %eax, %eax
jmp printf ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <stdlib.h>
#include <iostream>
__global__
void add_vec(int *a,int *b, int offset,int N)
{
int i = offset + threadIdx.x + blockIdx.x*blockDim.x;
if(i < N){
a[i] = a[i] + b[i];
}
}
template <typename T>
void fill_arr(T *data,T val,int N){
for(int i=0;i<N;++i){
data[i] = val;
}
}
int main(){
in... | code for sm_80
Function : _Z7add_vecPiS_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e280000002100 */
/*0020*/ ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <iostream>
__global__
void add_vec(int *a,int *b, int offset,int N)
{
int i = offset + threadIdx.x + blockIdx.x*blockDim.x;
if(i < N){
a[i] = a[i] + b[i];
}
}
template <typename T>
void fill_arr(T *data,T val,int N){
for(int i=0;i<N;++i){
data[i] = val;
}
}
int main(){
in... | .file "tmpxft_000db415_00000000-6_vec_add.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3673:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUn... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#include <iostream>
__global__
void add_vec(int *a,int *b, int offset,int N)
{
int i = offset + threadIdx.x + blockIdx.x*blockDim.x;
if(i < N){
a[i] = a[i] + b[i];
}
}
template <typename T>
void fill_arr(T *data,T val,int N){
for(int i=0;i<N;++i){
data[i] = val;
}
}
int main(){
in... | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <iostream>
__global__
void add_vec(int *a,int *b, int offset,int N)
{
int i = offset + threadIdx.x + blockIdx.x*blockDim.x;
if(i < N){
a[i] = a[i] + b[i];
}
}
template <typename T>
void fill_arr(T *data,T val,int N){
for(int i=0;i<N;++i){
data... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <iostream>
__global__
void add_vec(int *a,int *b, int offset,int N)
{
int i = offset + threadIdx.x + blockIdx.x*blockDim.x;
if(i < N){
a[i] = a[i] + b[i];
}
}
template <typename T>
void fill_arr(T *data,T val,int N){
for(int i=0;i<N;++i){
data... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z7add_vecPiS_ii
.globl _Z7add_vecPiS_ii
.p2align 8
.type _Z7add_vecPiS_ii,@function
_Z7add_vecPiS_ii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b64 s[2:3], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_dela... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <iostream>
__global__
void add_vec(int *a,int *b, int offset,int N)
{
int i = offset + threadIdx.x + blockIdx.x*blockDim.x;
if(i < N){
a[i] = a[i] + b[i];
}
}
template <typename T>
void fill_arr(T *data,T val,int N){
for(int i=0;i<N;++i){
data... | .text
.file "vec_add.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z22__device_stub__add_vecPiS_ii # -- Begin function _Z22__device_stub__add_vecPiS_ii
.p2align 4, 0... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z7add_vecPiS_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e280000002100 */
/*0020*/ ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z7add_vecPiS_ii
.globl _Z7add_vecPiS_ii
.p2align 8
.type _Z7add_vecPiS_ii,@function
_Z7add_vecPiS_ii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b64 s[2:3], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_dela... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000db415_00000000-6_vec_add.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3673:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUn... | .text
.file "vec_add.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z22__device_stub__add_vecPiS_ii # -- Begin function _Z22__device_stub__add_vecPiS_ii
.p2align 4, 0... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /* Written by : Eric Tan
*/
#include <iostream>
#include <cmath>
#include <array>
#include <cuda.h>
#define MAX_MASK_SIZE 50
#define TILE_SIZE 512
#define N_TILE 4
/*-------------------------------------------------------------------------------------------------
* GLOBAL CONSTANTS
*------------------------------------... | .file "tmpxft_001050ad_00000000-6_main.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3717:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnreg... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /* Written by : Eric Tan
*/
#include <iostream>
#include <cmath>
#include <array>
#include <cuda.h>
#define MAX_MASK_SIZE 50
#define TILE_SIZE 512
#define N_TILE 4
/*-------------------------------------------------------------------------------------------------
* GLOBAL CONSTANTS
*------------------------------------... | /* Written by : Eric Tan
*/
#include <iostream>
#include <cmath>
#include <array>
#include <hip/hip_runtime.h>
#define MAX_MASK_SIZE 50
#define TILE_SIZE 512
#define N_TILE 4
/*-------------------------------------------------------------------------------------------------
* GLOBAL CONSTANTS
*-------------------------... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | /* Written by : Eric Tan
*/
#include <iostream>
#include <cmath>
#include <array>
#include <hip/hip_runtime.h>
#define MAX_MASK_SIZE 50
#define TILE_SIZE 512
#define N_TILE 4
/*-------------------------------------------------------------------------------------------------
* GLOBAL CONSTANTS
*-------------------------... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z24tiled_convolution_kernelPKfPfii
.globl _Z24tiled_convolution_kernelPKfPfii
.p2align 8
.type _Z24tiled_convolution_kernelPKfPfii,@function
_Z24tiled_convolution_kernelPKfPfii:
s_clause 0x2
s_load_b32 s4, s[0:1], 0x14
s_load_b32 s5, s[0:1], 0x24
s_load... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | /* Written by : Eric Tan
*/
#include <iostream>
#include <cmath>
#include <array>
#include <hip/hip_runtime.h>
#define MAX_MASK_SIZE 50
#define TILE_SIZE 512
#define N_TILE 4
/*-------------------------------------------------------------------------------------------------
* GLOBAL CONSTANTS
*-------------------------... | .text
.file "main.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0 # -- Begin function main
.L... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001050ad_00000000-6_main.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3717:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnreg... | .text
.file "main.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0 # -- Begin function main
.L... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <cuda_runtime.h>
#include <device_launch_parameters.h>
#include <cooperative_groups.h>
#include <stdlib.h>
#include <stdio.h>
#include <assert.h>
#include <math.h>
#include <iostream>
using namespace cooperative_groups;
// Reduces a thread group to a single element
__device__ int reduce_sum( thread_group g, in... | code for sm_80
Function : _Z13sum_reductionPiS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <cuda_runtime.h>
#include <device_launch_parameters.h>
#include <cooperative_groups.h>
#include <stdlib.h>
#include <stdio.h>
#include <assert.h>
#include <math.h>
#include <iostream>
using namespace cooperative_groups;
// Reduces a thread group to a single element
__device__ int reduce_sum( thread_group g, in... | .file "tmpxft_000f73db_00000000-6_sum_reduction_cooperative_groups.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB6872:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <cuda_runtime.h>
#include <device_launch_parameters.h>
#include <cooperative_groups.h>
#include <stdlib.h>
#include <stdio.h>
#include <assert.h>
#include <math.h>
#include <iostream>
using namespace cooperative_groups;
// Reduces a thread group to a single element
__device__ int reduce_sum( thread_group g, in... | #include <hip/hip_runtime.h>
#include <hip/hip_cooperative_groups.h>
#include <stdlib.h>
#include <stdio.h>
#include <assert.h>
#include <math.h>
#include <iostream>
using namespace cooperative_groups;
// Reduces a thread group to a single element
__device__ int reduce_sum( thread_group g, int *temp, int val)
{
int lan... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <hip/hip_cooperative_groups.h>
#include <stdlib.h>
#include <stdio.h>
#include <assert.h>
#include <math.h>
#include <iostream>
using namespace cooperative_groups;
// Reduces a thread group to a single element
__device__ int reduce_sum( thread_group g, int *temp, int val)
{
int lan... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z13sum_reductionPiS_i
.globl _Z13sum_reductionPiS_i
.p2align 8
.type _Z13sum_reductionPiS_i,@function
_Z13sum_reductionPiS_i:
s_load_b32 s8, s[0:1], 0x18
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_mov_b32 s6, exec_lo
v_mov_b32_e32 v4, 0
s... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <hip/hip_cooperative_groups.h>
#include <stdlib.h>
#include <stdio.h>
#include <assert.h>
#include <math.h>
#include <iostream>
using namespace cooperative_groups;
// Reduces a thread group to a single element
__device__ int reduce_sum( thread_group g, int *temp, int val)
{
int lan... | .text
.file "sum_reduction_cooperative_groups.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z28__device_stub__sum_reductionPiS_i # -- Begin function _Z28__device_stu... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z13sum_reductionPiS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z13sum_reductionPiS_i
.globl _Z13sum_reductionPiS_i
.p2align 8
.type _Z13sum_reductionPiS_i,@function
_Z13sum_reductionPiS_i:
s_load_b32 s8, s[0:1], 0x18
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_mov_b32 s6, exec_lo
v_mov_b32_e32 v4, 0
s... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000f73db_00000000-6_sum_reduction_cooperative_groups.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB6872:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(... | .text
.file "sum_reduction_cooperative_groups.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z28__device_stub__sum_reductionPiS_i # -- Begin function _Z28__device_stu... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <math.h>
__device__ double dist(double x1, double y1, double x2, double y2){
return sqrt((x1-x2)*(x1-x2) + (y1-y2)*(y1-y2));
}
__global__ void testKernel(double *xs, double *ys, double *b){
b[blockIdx.x] = dist(xs[blockIdx.x], 1.0, ys[blockIdx.x], 1.0);
}
/* r^3 */
__device__ double rbf(double x1, double y1, d... | .file "tmpxft_0015aace_00000000-6_kernels.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2034:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <math.h>
__device__ double dist(double x1, double y1, double x2, double y2){
return sqrt((x1-x2)*(x1-x2) + (y1-y2)*(y1-y2));
}
__global__ void testKernel(double *xs, double *ys, double *b){
b[blockIdx.x] = dist(xs[blockIdx.x], 1.0, ys[blockIdx.x], 1.0);
}
/* r^3 */
__device__ double rbf(double x1, double y1, d... | #include <hip/hip_runtime.h>
#include <math.h>
__device__ double dist(double x1, double y1, double x2, double y2){
return sqrt((x1-x2)*(x1-x2) + (y1-y2)*(y1-y2));
}
__global__ void testKernel(double *xs, double *ys, double *b){
b[blockIdx.x] = dist(xs[blockIdx.x], 1.0, ys[blockIdx.x], 1.0);
}
/* r^3 */
__device__ doubl... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <math.h>
__device__ double dist(double x1, double y1, double x2, double y2){
return sqrt((x1-x2)*(x1-x2) + (y1-y2)*(y1-y2));
}
__global__ void testKernel(double *xs, double *ys, double *b){
b[blockIdx.x] = dist(xs[blockIdx.x], 1.0, ys[blockIdx.x], 1.0);
}
/* r^3 */
__device__ doubl... | .text
.file "kernels.hip"
.globl _Z25__device_stub__testKernelPdS_S_ # -- Begin function _Z25__device_stub__testKernelPdS_S_
.p2align 4, 0x90
.type _Z25__device_stub__testKernelPdS_S_,@function
_Z25__device_stub__testKernelPdS_S_: # @_Z25__device_stub__testKernelPdS_S_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_de... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0015aace_00000000-6_kernels.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2034:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
... | .text
.file "kernels.hip"
.globl _Z25__device_stub__testKernelPdS_S_ # -- Begin function _Z25__device_stub__testKernelPdS_S_
.p2align 4, 0x90
.type _Z25__device_stub__testKernelPdS_S_,@function
_Z25__device_stub__testKernelPdS_S_: # @_Z25__device_stub__testKernelPdS_S_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_de... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
/**
* @brief cudaCreateBuffer Allocates a cuda buffer and stops the programm on error.
* @param size
* @return
*/
__global__ void kernelSetDoubleBuffer(float* gpuBuffPtr, float v, size_t size)
{
int index = threadIdx.x + blockIdx.x * blockDim.x;
if (index < size)
gpuBuffPtr[index] = v;
} | code for sm_80
Function : _Z21kernelSetDoubleBufferPffm
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
/**
* @brief cudaCreateBuffer Allocates a cuda buffer and stops the programm on error.
* @param size
* @return
*/
__global__ void kernelSetDoubleBuffer(float* gpuBuffPtr, float v, size_t size)
{
int index = threadIdx.x + blockIdx.x * blockDim.x;
if (index < size)
gpuBuffPtr[index] = v;
} | .file "tmpxft_0008cf3c_00000000-6_kernelSetDoubleBuffer.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
/**
* @brief cudaCreateBuffer Allocates a cuda buffer and stops the programm on error.
* @param size
* @return
*/
__global__ void kernelSetDoubleBuffer(float* gpuBuffPtr, float v, size_t size)
{
int index = threadIdx.x + blockIdx.x * blockDim.x;
if (index < size)
gpuBuffPtr[index] = v;
} | #include <hip/hip_runtime.h>
#include "includes.h"
/**
* @brief cudaCreateBuffer Allocates a cuda buffer and stops the programm on error.
* @param size
* @return
*/
__global__ void kernelSetDoubleBuffer(float* gpuBuffPtr, float v, size_t size)
{
int index = threadIdx.x + blockIdx.x * blockDim.x;
if (index < size)
gpuBu... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
/**
* @brief cudaCreateBuffer Allocates a cuda buffer and stops the programm on error.
* @param size
* @return
*/
__global__ void kernelSetDoubleBuffer(float* gpuBuffPtr, float v, size_t size)
{
int index = threadIdx.x + blockIdx.x * blockDim.x;
if (index < size)
gpuBu... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z21kernelSetDoubleBufferPffm
.globl _Z21kernelSetDoubleBufferPffm
.p2align 8
.type _Z21kernelSetDoubleBufferPffm,@function
_Z21kernelSetDoubleBufferPffm:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b64 s[2:3], s[0:1], 0x10
s_waitcnt lgkmcnt(0)... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
/**
* @brief cudaCreateBuffer Allocates a cuda buffer and stops the programm on error.
* @param size
* @return
*/
__global__ void kernelSetDoubleBuffer(float* gpuBuffPtr, float v, size_t size)
{
int index = threadIdx.x + blockIdx.x * blockDim.x;
if (index < size)
gpuBu... | .text
.file "kernelSetDoubleBuffer.hip"
.globl _Z36__device_stub__kernelSetDoubleBufferPffm # -- Begin function _Z36__device_stub__kernelSetDoubleBufferPffm
.p2align 4, 0x90
.type _Z36__device_stub__kernelSetDoubleBufferPffm,@function
_Z36__device_stub__kernelSetDoubleBufferPffm: # @_Z36__device_stub__kernelSetDoubleBu... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z21kernelSetDoubleBufferPffm
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z21kernelSetDoubleBufferPffm
.globl _Z21kernelSetDoubleBufferPffm
.p2align 8
.type _Z21kernelSetDoubleBufferPffm,@function
_Z21kernelSetDoubleBufferPffm:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b64 s[2:3], s[0:1], 0x10
s_waitcnt lgkmcnt(0)... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0008cf3c_00000000-6_kernelSetDoubleBuffer.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
... | .text
.file "kernelSetDoubleBuffer.hip"
.globl _Z36__device_stub__kernelSetDoubleBufferPffm # -- Begin function _Z36__device_stub__kernelSetDoubleBufferPffm
.p2align 4, 0x90
.type _Z36__device_stub__kernelSetDoubleBufferPffm,@function
_Z36__device_stub__kernelSetDoubleBufferPffm: # @_Z36__device_stub__kernelSetDoubleBu... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <iostream>
#include <thrust/device_vector.h>
#include <thrust/host_vector.h>
#include <thrust/transform.h>
#include <thrust/fill.h>
struct saxpy_functor
{
const float a;
saxpy_functor(float _a) : a(_a) {}
__host__ __device__
float operator()(const float& x, const float& y) const {
return a * x + y;
}
};
void ... | code for sm_80
Function : _ZN3cub17CUB_200700_800_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tElN6thrust20THRUST_200700_800_NS8cuda_cub11__transform18binary_transform_fINS7_6detail15normal_iteratorINS7_10device_ptrIfEEEESF_SF_NS9_14no_stencil_tagENS7_4plusIfEENS9_21always_true_predicateEEEEEvT0_T1... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <iostream>
#include <thrust/device_vector.h>
#include <thrust/host_vector.h>
#include <thrust/transform.h>
#include <thrust/fill.h>
struct saxpy_functor
{
const float a;
saxpy_functor(float _a) : a(_a) {}
__host__ __device__
float operator()(const float& x, const float& y) const {
return a * x + y;
}
};
void ... |
#include <hip/hip_runtime.h>
#include <iostream>
#include <thrust/device_vector.h>
#include <thrust/host_vector.h>
#include <thrust/transform.h>
#include <thrust/fill.h>
struct saxpy_functor
{
const float a;
saxpy_functor(float _a) : a(_a) {}
__host__ __device__
float operator()(const float& x, const float& y) const ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. |
#include <hip/hip_runtime.h>
#include <iostream>
#include <thrust/device_vector.h>
#include <thrust/host_vector.h>
#include <thrust/transform.h>
#include <thrust/fill.h>
struct saxpy_functor
{
const float a;
saxpy_functor(float _a) : a(_a) {}
__host__ __device__
float operator()(const float& x, const float& y) const ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.section .text._ZN6thrust11hip_rocprim14__parallel_for6kernelILj256ENS0_11__transform18binary_transform_fINS_6detail15normal_iteratorINS_10device_ptrIfEEEES9_S9_NS3_14no_stencil_tagE13saxpy_functorNS3_21always_true_predicateEEElLj1EEEvT0_T1_SF_,"axG",@progbits,_ZN6thrus... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <cuda.h>
#include <iostream>
#include <sys/time.h>
using namespace std;
#define nPerThread 32
/* Simple Cuda Program: Shared memory
* - Use dynamic shared memory
* - bank conflicts
* - synchronization
*/
// no bank conflicts
__global__ void addOneShared(const int n, double *data) {
extern __shared__ double sme... | .file "tmpxft_000a8322_00000000-6_sol6.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnreg... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <cuda.h>
#include <iostream>
#include <sys/time.h>
using namespace std;
#define nPerThread 32
/* Simple Cuda Program: Shared memory
* - Use dynamic shared memory
* - bank conflicts
* - synchronization
*/
// no bank conflicts
__global__ void addOneShared(const int n, double *data) {
extern __shared__ double sme... | #include <hip/hip_runtime.h>
#include <iostream>
#include <sys/time.h>
using namespace std;
#define nPerThread 32
/* Simple Cuda Program: Shared memory
* - Use dynamic shared memory
* - bank conflicts
* - synchronization
*/
// no bank conflicts
__global__ void addOneShared(const int n, double *data) {
extern __shared__... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <sys/time.h>
using namespace std;
#define nPerThread 32
/* Simple Cuda Program: Shared memory
* - Use dynamic shared memory
* - bank conflicts
* - synchronization
*/
// no bank conflicts
__global__ void addOneShared(const int n, double *data) {
extern __shared__... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12addOneSharediPd
.globl _Z12addOneSharediPd
.p2align 8
.type _Z12addOneSharediPd,@function
_Z12addOneSharediPd:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x1c
s_load_b64 s[0:1], s[0:1], 0x8
v_lshl_add_u32 v3, v0, 3, 0
s_mov_b32 s5, 32
s_... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <sys/time.h>
using namespace std;
#define nPerThread 32
/* Simple Cuda Program: Shared memory
* - Use dynamic shared memory
* - bank conflicts
* - synchronization
*/
// no bank conflicts
__global__ void addOneShared(const int n, double *data) {
extern __shared__... | .text
.file "sol6.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z27__device_stub__addOneSharediPd # -- Begin function _Z27__device_stub__addOneSharediPd
.p2align 4, ... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000a8322_00000000-6_sol6.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnreg... | .text
.file "sol6.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z27__device_stub__addOneSharediPd # -- Begin function _Z27__device_stub__addOneSharediPd
.p2align 4, ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void MatMulKernel(float *Md, float *Nd, float *Pd, int width)
{
// Thread row and column within matrix
int row = blockIdx.y * blockDim.y + threadIdx.y;
int col = blockIdx.x * blockDim.x + threadIdx.x;
// Each thread computes one element of P
// by accumulating results into Pvalue
float ... | code for sm_80
Function : _Z12MatMulKernelPfS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */
/* 0x000e220000002600 */
... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void MatMulKernel(float *Md, float *Nd, float *Pd, int width)
{
// Thread row and column within matrix
int row = blockIdx.y * blockDim.y + threadIdx.y;
int col = blockIdx.x * blockDim.x + threadIdx.x;
// Each thread computes one element of P
// by accumulating results into Pvalue
float ... | .file "tmpxft_00096b52_00000000-6_MatMulKernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, ... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void MatMulKernel(float *Md, float *Nd, float *Pd, int width)
{
// Thread row and column within matrix
int row = blockIdx.y * blockDim.y + threadIdx.y;
int col = blockIdx.x * blockDim.x + threadIdx.x;
// Each thread computes one element of P
// by accumulating results into Pvalue
float ... | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void MatMulKernel(float *Md, float *Nd, float *Pd, int width)
{
// Thread row and column within matrix
int row = blockIdx.y * blockDim.y + threadIdx.y;
int col = blockIdx.x * blockDim.x + threadIdx.x;
// Each thread computes one element of P
// by accumulati... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void MatMulKernel(float *Md, float *Nd, float *Pd, int width)
{
// Thread row and column within matrix
int row = blockIdx.y * blockDim.y + threadIdx.y;
int col = blockIdx.x * blockDim.x + threadIdx.x;
// Each thread computes one element of P
// by accumulati... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12MatMulKernelPfS_S_i
.globl _Z12MatMulKernelPfS_S_i
.p2align 8
.type _Z12MatMulKernelPfS_S_i,@function
_Z12MatMulKernelPfS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s4, s[0:1], 0x18
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v2,... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void MatMulKernel(float *Md, float *Nd, float *Pd, int width)
{
// Thread row and column within matrix
int row = blockIdx.y * blockDim.y + threadIdx.y;
int col = blockIdx.x * blockDim.x + threadIdx.x;
// Each thread computes one element of P
// by accumulati... | .text
.file "MatMulKernel.hip"
.globl _Z27__device_stub__MatMulKernelPfS_S_i # -- Begin function _Z27__device_stub__MatMulKernelPfS_S_i
.p2align 4, 0x90
.type _Z27__device_stub__MatMulKernelPfS_S_i,@function
_Z27__device_stub__MatMulKernelPfS_S_i: # @_Z27__device_stub__MatMulKernelPfS_S_i
.cfi_startproc
# %bb.0:
subq $... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z12MatMulKernelPfS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */
/* 0x000e220000002600 */
... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12MatMulKernelPfS_S_i
.globl _Z12MatMulKernelPfS_S_i
.p2align 8
.type _Z12MatMulKernelPfS_S_i,@function
_Z12MatMulKernelPfS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s4, s[0:1], 0x18
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v2,... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00096b52_00000000-6_MatMulKernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, ... | .text
.file "MatMulKernel.hip"
.globl _Z27__device_stub__MatMulKernelPfS_S_i # -- Begin function _Z27__device_stub__MatMulKernelPfS_S_i
.p2align 4, 0x90
.type _Z27__device_stub__MatMulKernelPfS_S_i,@function
_Z27__device_stub__MatMulKernelPfS_S_i: # @_Z27__device_stub__MatMulKernelPfS_S_i
.cfi_startproc
# %bb.0:
subq $... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <cuda.h>
#include <curand_kernel.h>
#include <math_constants.h>
extern "C"
{
__global__ void
rtruncnorm_kernel(
float *x, int n,
float *mu, float *sigma,
float *lo, float *hi,
int maxtries, int rng_a,
int rng_b, int rng_c)
{
// Usual block/thread indexing...
int myblock ... | .file "tmpxft_00165306_00000000-6_rtruncnorm2.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2273:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#include <cuda.h>
#include <curand_kernel.h>
#include <math_constants.h>
extern "C"
{
__global__ void
rtruncnorm_kernel(
float *x, int n,
float *mu, float *sigma,
float *lo, float *hi,
int maxtries, int rng_a,
int rng_b, int rng_c)
{
// Usual block/thread indexing...
int myblock ... | #include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <hiprand/hiprand_kernel.h>
#include <hip/hip_math_constants.h>
extern "C"
{
__global__ void
rtruncnorm_kernel(
float *x, int n,
float *mu, float *sigma,
float *lo, float *hi,
int maxtries, int rng_a,
int rng_b, int rng_c)
{
// Usual block/thr... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <hiprand/hiprand_kernel.h>
#include <hip/hip_math_constants.h>
extern "C"
{
__global__ void
rtruncnorm_kernel(
float *x, int n,
float *mu, float *sigma,
float *lo, float *hi,
int maxtries, int rng_a,
int rng_b, int rng_c)
{
// Usual block/thr... | .text
.file "rtruncnorm2.hip"
.globl __device_stub__rtruncnorm_kernel # -- Begin function __device_stub__rtruncnorm_kernel
.p2align 4, 0x90
.type __device_stub__rtruncnorm_kernel,@function
__device_stub__rtruncnorm_kernel: # @__device_stub__rtruncnorm_kernel
.cfi_startproc
# %bb.0:
subq $184, %rsp
.cfi_def_cfa_of... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00165306_00000000-6_rtruncnorm2.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2273:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... | .text
.file "rtruncnorm2.hip"
.globl __device_stub__rtruncnorm_kernel # -- Begin function __device_stub__rtruncnorm_kernel
.p2align 4, 0x90
.type __device_stub__rtruncnorm_kernel,@function
__device_stub__rtruncnorm_kernel: # @__device_stub__rtruncnorm_kernel
.cfi_startproc
# %bb.0:
subq $184, %rsp
.cfi_def_cfa_of... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | //first cuda program
//Hitender Prakash
#include <stdio.h>
//define gpu kernel
__global__ void square(double *d_out, double *d_in){
int pos=threadIdx.x;
d_out[pos]=d_in[pos]*d_in[pos];
}
int main(int argc, char **argv){
if(argc <2 ||argc >2){
printf("\nUsage: sqaure <size of array>");
exit(0);
}
int siz=atoi(argv[1]);
... | code for sm_80
Function : _Z6squarePdS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_TID.X ; /* 0x0000000000067919 */
/* 0x000e220000002100 */
/*0020*/ HFM... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | //first cuda program
//Hitender Prakash
#include <stdio.h>
//define gpu kernel
__global__ void square(double *d_out, double *d_in){
int pos=threadIdx.x;
d_out[pos]=d_in[pos]*d_in[pos];
}
int main(int argc, char **argv){
if(argc <2 ||argc >2){
printf("\nUsage: sqaure <size of array>");
exit(0);
}
int siz=atoi(argv[1]);
... | .file "tmpxft_000baf90_00000000-6_cuda_square.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | //first cuda program
//Hitender Prakash
#include <stdio.h>
//define gpu kernel
__global__ void square(double *d_out, double *d_in){
int pos=threadIdx.x;
d_out[pos]=d_in[pos]*d_in[pos];
}
int main(int argc, char **argv){
if(argc <2 ||argc >2){
printf("\nUsage: sqaure <size of array>");
exit(0);
}
int siz=atoi(argv[1]);
... | //first cuda program
//Hitender Prakash
#include <hip/hip_runtime.h>
#include <stdio.h>
//define gpu kernel
__global__ void square(double *d_out, double *d_in){
int pos=threadIdx.x;
d_out[pos]=d_in[pos]*d_in[pos];
}
int main(int argc, char **argv){
if(argc <2 ||argc >2){
printf("\nUsage: sqaure <size of array>");
exit(... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | //first cuda program
//Hitender Prakash
#include <hip/hip_runtime.h>
#include <stdio.h>
//define gpu kernel
__global__ void square(double *d_out, double *d_in){
int pos=threadIdx.x;
d_out[pos]=d_in[pos]*d_in[pos];
}
int main(int argc, char **argv){
if(argc <2 ||argc >2){
printf("\nUsage: sqaure <size of array>");
exit(... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6squarePdS_
.globl _Z6squarePdS_
.p2align 8
.type _Z6squarePdS_,@function
_Z6squarePdS_:
s_load_b128 s[0:3], s[0:1], 0x0
v_lshlrev_b32_e32 v2, 3, v0
s_waitcnt lgkmcnt(0)
global_load_b64 v[0:1], v2, s[2:3]
s_waitcnt vmcnt... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | //first cuda program
//Hitender Prakash
#include <hip/hip_runtime.h>
#include <stdio.h>
//define gpu kernel
__global__ void square(double *d_out, double *d_in){
int pos=threadIdx.x;
d_out[pos]=d_in[pos]*d_in[pos];
}
int main(int argc, char **argv){
if(argc <2 ||argc >2){
printf("\nUsage: sqaure <size of array>");
exit(... | .text
.file "cuda_square.hip"
.globl _Z21__device_stub__squarePdS_ # -- Begin function _Z21__device_stub__squarePdS_
.p2align 4, 0x90
.type _Z21__device_stub__squarePdS_,@function
_Z21__device_stub__squarePdS_: # @_Z21__device_stub__squarePdS_
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
mov... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z6squarePdS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_TID.X ; /* 0x0000000000067919 */
/* 0x000e220000002100 */
/*0020*/ HFM... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6squarePdS_
.globl _Z6squarePdS_
.p2align 8
.type _Z6squarePdS_,@function
_Z6squarePdS_:
s_load_b128 s[0:3], s[0:1], 0x0
v_lshlrev_b32_e32 v2, 3, v0
s_waitcnt lgkmcnt(0)
global_load_b64 v[0:1], v2, s[2:3]
s_waitcnt vmcnt... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000baf90_00000000-6_cuda_square.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... | .text
.file "cuda_square.hip"
.globl _Z21__device_stub__squarePdS_ # -- Begin function _Z21__device_stub__squarePdS_
.p2align 4, 0x90
.type _Z21__device_stub__squarePdS_,@function
_Z21__device_stub__squarePdS_: # @_Z21__device_stub__squarePdS_
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
mov... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | //
// TauSelection.cpp
// HiggsAnalysis_new
//
// Created by Joona Havukainen on 5/14/19.
// Copyright © 2019 Joona Havukainen. All rights reserved.
//
//#include "TauSelection.cuh"
__device__
float deltaR(float eta1, float eta2, float phi1, float phi2)
{
float deta = eta2-eta1;
float dphi = phi2-phi1;
if(dphi>=M_PI)
{... | .file "tmpxft_00105d82_00000000-6_TauSelection.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2037:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, ... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | //
// TauSelection.cpp
// HiggsAnalysis_new
//
// Created by Joona Havukainen on 5/14/19.
// Copyright © 2019 Joona Havukainen. All rights reserved.
//
//#include "TauSelection.cuh"
__device__
float deltaR(float eta1, float eta2, float phi1, float phi2)
{
float deta = eta2-eta1;
float dphi = phi2-phi1;
if(dphi>=M_PI)
{... | #pragma once
#include <hip/hip_runtime.h>
extern __global__ void tauSelection(float *array, bool *passedArray, bool *passed, bool *selectedTaus, float *numericalArray, int variablesPerEvent, int tauIndex, int hltIndex, int nTaus, int nEvents); |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #pragma once
#include <hip/hip_runtime.h>
extern __global__ void tauSelection(float *array, bool *passedArray, bool *passed, bool *selectedTaus, float *numericalArray, int variablesPerEvent, int tauIndex, int hltIndex, int nTaus, int nEvents); | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #pragma once
#include <hip/hip_runtime.h>
extern __global__ void tauSelection(float *array, bool *passedArray, bool *passed, bool *selectedTaus, float *numericalArray, int variablesPerEvent, int tauIndex, int hltIndex, int nTaus, int nEvents); | .text
.file "TauSelection.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-pro... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00105d82_00000000-6_TauSelection.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2037:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, ... | .text
.file "TauSelection.hip"
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-pro... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | //Note:
//Cara running program ./nama_file mode besar_matrix besar_grid besar_block
//Ukuran matrix: besar_matrix x besar matrix
//Grid: besar_grid x besar_grid (block per grid) | Max: Mengacu pada NVIDIA Compute Capability dari setiap seri GPU
//Block: besar_block x besar_block (thread per block) | Max: Mengacu pada N... | .file "tmpxft_0015d03a_00000000-6_mm.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | //Note:
//Cara running program ./nama_file mode besar_matrix besar_grid besar_block
//Ukuran matrix: besar_matrix x besar matrix
//Grid: besar_grid x besar_grid (block per grid) | Max: Mengacu pada NVIDIA Compute Capability dari setiap seri GPU
//Block: besar_block x besar_block (thread per block) | Max: Mengacu pada N... | //Note:
//Cara running program ./nama_file mode besar_matrix besar_grid besar_block
//Ukuran matrix: besar_matrix x besar matrix
//Grid: besar_grid x besar_grid (block per grid) | Max: Mengacu pada NVIDIA Compute Capability dari setiap seri GPU
//Block: besar_block x besar_block (thread per block) | Max: Mengacu pada N... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | //Note:
//Cara running program ./nama_file mode besar_matrix besar_grid besar_block
//Ukuran matrix: besar_matrix x besar matrix
//Grid: besar_grid x besar_grid (block per grid) | Max: Mengacu pada NVIDIA Compute Capability dari setiap seri GPU
//Block: besar_block x besar_block (thread per block) | Max: Mengacu pada N... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z16matrixmul_kernelPiS_S_iii
.globl _Z16matrixmul_kernelPiS_S_iii
.p2align 8
.type _Z16matrixmul_kernelPiS_S_iii,@function
_Z16matrixmul_kernelPiS_S_iii:
s_clause 0x1
s_load_b64 s[2:3], s[0:1], 0x18
s_load_b32 s4, s[0:1], 0x20
s_mov_b32 s10, 1
s_w... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | //Note:
//Cara running program ./nama_file mode besar_matrix besar_grid besar_block
//Ukuran matrix: besar_matrix x besar matrix
//Grid: besar_grid x besar_grid (block per grid) | Max: Mengacu pada NVIDIA Compute Capability dari setiap seri GPU
//Block: besar_block x besar_block (thread per block) | Max: Mengacu pada N... | .text
.file "mm.hip"
.globl _Z31__device_stub__matrixmul_kernelPiS_S_iii # -- Begin function _Z31__device_stub__matrixmul_kernelPiS_S_iii
.p2align 4, 0x90
.type _Z31__device_stub__matrixmul_kernelPiS_S_iii,@function
_Z31__device_stub__matrixmul_kernelPiS_S_iii: # @_Z31__device_stub__matrixmul_kernelPiS_S_iii
.cfi_start... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0015d03a_00000000-6_mm.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_... | .text
.file "mm.hip"
.globl _Z31__device_stub__matrixmul_kernelPiS_S_iii # -- Begin function _Z31__device_stub__matrixmul_kernelPiS_S_iii
.p2align 4, 0x90
.type _Z31__device_stub__matrixmul_kernelPiS_S_iii,@function
_Z31__device_stub__matrixmul_kernelPiS_S_iii: # @_Z31__device_stub__matrixmul_kernelPiS_S_iii
.cfi_start... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <cstdio>
#include <cstdlib>
#include <vector>
__global__ void bucketsort(int *key, int *bucket, int n){
int i = blockIdx.x * blockDim.x + threadIdx.x;
if(i>=n) return;
int a = key[i];
atomicAdd(&bucket[a],1);
__syncthreads();
for(int j = 0, k = 0; j <= i; k++){
key[i] = k;
j += bucket[k];
}
}
int main() {
in... | code for sm_80
Function : _Z10bucketsortPiS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <cstdio>
#include <cstdlib>
#include <vector>
__global__ void bucketsort(int *key, int *bucket, int n){
int i = blockIdx.x * blockDim.x + threadIdx.x;
if(i>=n) return;
int a = key[i];
atomicAdd(&bucket[a],1);
__syncthreads();
for(int j = 0, k = 0; j <= i; k++){
key[i] = k;
j += bucket[k];
}
}
int main() {
in... | .file "tmpxft_0018e55c_00000000-6_12_bucket_sort.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2929:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <cstdio>
#include <cstdlib>
#include <vector>
__global__ void bucketsort(int *key, int *bucket, int n){
int i = blockIdx.x * blockDim.x + threadIdx.x;
if(i>=n) return;
int a = key[i];
atomicAdd(&bucket[a],1);
__syncthreads();
for(int j = 0, k = 0; j <= i; k++){
key[i] = k;
j += bucket[k];
}
}
int main() {
in... | #include <hip/hip_runtime.h>
#include <cstdio>
#include <cstdlib>
#include <vector>
__global__ void bucketsort(int *key, int *bucket, int n){
int i = blockIdx.x * blockDim.x + threadIdx.x;
if(i>=n) return;
int a = key[i];
atomicAdd(&bucket[a],1);
__syncthreads();
for(int j = 0, k = 0; j <= i; k++){
key[i] = k;
j += b... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <cstdio>
#include <cstdlib>
#include <vector>
__global__ void bucketsort(int *key, int *bucket, int n){
int i = blockIdx.x * blockDim.x + threadIdx.x;
if(i>=n) return;
int a = key[i];
atomicAdd(&bucket[a],1);
__syncthreads();
for(int j = 0, k = 0; j <= i; k++){
key[i] = k;
j += b... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z10bucketsortPiS_i
.globl _Z10bucketsortPiS_i
.p2align 8
.type _Z10bucketsortPiS_i,@function
_Z10bucketsortPiS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_de... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <cstdio>
#include <cstdlib>
#include <vector>
__global__ void bucketsort(int *key, int *bucket, int n){
int i = blockIdx.x * blockDim.x + threadIdx.x;
if(i>=n) return;
int a = key[i];
atomicAdd(&bucket[a],1);
__syncthreads();
for(int j = 0, k = 0; j <= i; k++){
key[i] = k;
j += b... | .text
.file "12_bucket_sort.hip"
.globl _Z25__device_stub__bucketsortPiS_i # -- Begin function _Z25__device_stub__bucketsortPiS_i
.p2align 4, 0x90
.type _Z25__device_stub__bucketsortPiS_i,@function
_Z25__device_stub__bucketsortPiS_i: # @_Z25__device_stub__bucketsortPiS_i
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z10bucketsortPiS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z10bucketsortPiS_i
.globl _Z10bucketsortPiS_i
.p2align 8
.type _Z10bucketsortPiS_i,@function
_Z10bucketsortPiS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_de... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0018e55c_00000000-6_12_bucket_sort.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2929:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8... | .text
.file "12_bucket_sort.hip"
.globl _Z25__device_stub__bucketsortPiS_i # -- Begin function _Z25__device_stub__bucketsortPiS_i
.p2align 4, 0x90
.type _Z25__device_stub__bucketsortPiS_i,@function
_Z25__device_stub__bucketsortPiS_i: # @_Z25__device_stub__bucketsortPiS_i
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #ifndef __CUDACC__
#define __CUDACC__
#endif
#include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <cuda.h>
#include <device_functions.h>
#include <cuda_runtime_api.h>
#include <stdio.h>
#include <iostream>
#include <cstdio>
#define N 1024
#define THREADS 32
#define BLOCKS 32
cudaError_t sortCuda(uns... | code for sm_80
Function : _Z5mergePjS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ ISETP.NE.AND P0, PT, RZ, c[0x0][0x170], PT ; /* 0x00005c00ff007a... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #ifndef __CUDACC__
#define __CUDACC__
#endif
#include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <cuda.h>
#include <device_functions.h>
#include <cuda_runtime_api.h>
#include <stdio.h>
#include <iostream>
#include <cstdio>
#define N 1024
#define THREADS 32
#define BLOCKS 32
cudaError_t sortCuda(uns... | .file "tmpxft_001b0a72_00000000-6_kernel.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3674:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnr... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #ifndef __CUDACC__
#define __CUDACC__
#endif
#include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <cuda.h>
#include <device_functions.h>
#include <cuda_runtime_api.h>
#include <stdio.h>
#include <iostream>
#include <cstdio>
#define N 1024
#define THREADS 32
#define BLOCKS 32
cudaError_t sortCuda(uns... | #ifndef __HIPCC__
#define __HIPCC__
#endif
#include "hip/hip_runtime.h"
#include <hip/device_functions.h>
#include <hip/hip_runtime_api.h>
#include <stdio.h>
#include <iostream>
#include <cstdio>
#define N 1024
#define THREADS 32
#define BLOCKS 32
hipError_t sortCuda(unsigned int *data, const int size);
__global__ void... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #ifndef __HIPCC__
#define __HIPCC__
#endif
#include "hip/hip_runtime.h"
#include <hip/device_functions.h>
#include <hip/hip_runtime_api.h>
#include <stdio.h>
#include <iostream>
#include <cstdio>
#define N 1024
#define THREADS 32
#define BLOCKS 32
hipError_t sortCuda(unsigned int *data, const int size);
__global__ void... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z4sortPj
.globl _Z4sortPj
.p2align 8
.type _Z4sortPj,@function
_Z4sortPj:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x14
s_load_b64 s[2:3], s[0:1], 0x0
s_add_u32 s0, s0, 8
s_addc_u32 s1, s1, 0
v_lshlrev_b32_e32 v7, 2, v... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #ifndef __HIPCC__
#define __HIPCC__
#endif
#include "hip/hip_runtime.h"
#include <hip/device_functions.h>
#include <hip/hip_runtime_api.h>
#include <stdio.h>
#include <iostream>
#include <cstdio>
#define N 1024
#define THREADS 32
#define BLOCKS 32
hipError_t sortCuda(unsigned int *data, const int size);
__global__ void... | .text
.file "kernel.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z19__device_stub__sortPj # -- Begin function _Z19__device_stub__sortPj
.p2align 4, 0x90
.type... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001b0a72_00000000-6_kernel.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3674:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnr... | .text
.file "kernel.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z19__device_stub__sortPj # -- Begin function _Z19__device_stub__sortPj
.p2align 4, 0x90
.type... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <iostream>
int main() {
std::cout << "basic/hello initialized!" << std::endl;
} | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <iostream>
int main() {
std::cout << "basic/hello initialized!" << std::endl;
} | .file "tmpxft_000f46ad_00000000-6_hello.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnre... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <iostream>
int main() {
std::cout << "basic/hello initialized!" << std::endl;
} | #include <hip/hip_runtime.h>
#include <iostream>
int main() {
std::cout << "basic/hello initialized!" << std::endl;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <iostream>
int main() {
std::cout << "basic/hello initialized!" << std::endl;
} | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <iostream>
int main() {
std::cout << "basic/hello initialized!" << std::endl;
} | .text
.file "hello.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: ... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000f46ad_00000000-6_hello.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnre... | .text
.file "hello.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /* This is a automatically generated test. Do not modify */
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
__global__
void compute(float comp, int var_1,float var_2,float var_3,float var_4,float var_5,float var_6,float var_7,float var_8,float var_9,float var_10,float var_11) {
for (int i=0; i < var_1; ++i) {
... | .file "tmpxft_000d780b_00000000-6_test.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cf... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /* This is a automatically generated test. Do not modify */
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
__global__
void compute(float comp, int var_1,float var_2,float var_3,float var_4,float var_5,float var_6,float var_7,float var_8,float var_9,float var_10,float var_11) {
for (int i=0; i < var_1; ++i) {
... | /* This is a automatically generated test. Do not modify */
#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
__global__
void compute(float comp, int var_1,float var_2,float var_3,float var_4,float var_5,float var_6,float var_7,float var_8,float var_9,float var_10,float var_11) {
for... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | /* This is a automatically generated test. Do not modify */
#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
__global__
void compute(float comp, int var_1,float var_2,float var_3,float var_4,float var_5,float var_6,float var_7,float var_8,float var_9,float var_10,float var_11) {
for... | .text
.file "test.hip"
.globl _Z22__device_stub__computefiffffffffff # -- Begin function _Z22__device_stub__computefiffffffffff
.p2align 4, 0x90
.type _Z22__device_stub__computefiffffffffff,@function
_Z22__device_stub__computefiffffffffff: # @_Z22__device_stub__computefiffffffffff
.cfi_startproc
# %bb.0:
subq $200, %rs... |
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