system stringclasses 7 values | input stringlengths 10 94.5k | output stringlengths 14 55.5k |
|---|---|---|
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0002ca4f_00000000-6_dr_model_poc.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z42__device_stub__Z15gpu_matrix_multPiS_S_iiiPiS_S_iii
.type _Z42__device_stub__Z15gpu_matrix_multPiS_S_iiiPiS_S_iii, @function
_Z42__device_stub__Z15gpu_matrix_multPiS_S_iiiPiS_S_iii:
.LFB2082:
.cfi_startproc
endbr64
subq $184, %rsp
.cfi_def_cfa_offset 192
movq %rdi, 40(%rsp)
movq %rsi, 32(%rsp)
movq %rdx, 24(%rsp)
movl %ecx, 20(%rsp)
movl %r8d, 16(%rsp)
movl %r9d, 12(%rsp)
movq %fs:40, %rax
movq %rax, 168(%rsp)
xorl %eax, %eax
leaq 40(%rsp), %rax
movq %rax, 112(%rsp)
leaq 32(%rsp), %rax
movq %rax, 120(%rsp)
leaq 24(%rsp), %rax
movq %rax, 128(%rsp)
leaq 20(%rsp), %rax
movq %rax, 136(%rsp)
leaq 16(%rsp), %rax
movq %rax, 144(%rsp)
leaq 12(%rsp), %rax
movq %rax, 152(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
leaq 56(%rsp), %rcx
leaq 48(%rsp), %rdx
leaq 76(%rsp), %rsi
leaq 64(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 168(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $184, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 56(%rsp)
.cfi_def_cfa_offset 200
pushq 56(%rsp)
.cfi_def_cfa_offset 208
leaq 128(%rsp), %r9
movq 92(%rsp), %rcx
movl 100(%rsp), %r8d
movq 80(%rsp), %rsi
movl 88(%rsp), %edx
leaq _Z15gpu_matrix_multPiS_S_iii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 192
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z42__device_stub__Z15gpu_matrix_multPiS_S_iiiPiS_S_iii, .-_Z42__device_stub__Z15gpu_matrix_multPiS_S_iiiPiS_S_iii
.globl _Z15gpu_matrix_multPiS_S_iii
.type _Z15gpu_matrix_multPiS_S_iii, @function
_Z15gpu_matrix_multPiS_S_iii:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z42__device_stub__Z15gpu_matrix_multPiS_S_iiiPiS_S_iii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z15gpu_matrix_multPiS_S_iii, .-_Z15gpu_matrix_multPiS_S_iii
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC3:
.string "Avg. Latency: %g ms :: Avg. Throughput: %g examples/sec\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
subq $240, %rsp
.cfi_def_cfa_offset 272
movq %fs:40, %rax
movq %rax, 232(%rsp)
xorl %eax, %eax
movl $3333, %edi
call srand@PLT
leaq 32(%rsp), %rdi
movl $262144, %esi
call cudaMallocHost@PLT
leaq 40(%rsp), %rdi
movl $1073741824, %esi
call cudaMallocHost@PLT
leaq 48(%rsp), %rdi
movl $16384, %esi
call cudaMallocHost@PLT
leaq 56(%rsp), %rdi
movl $16777216, %esi
call cudaMallocHost@PLT
leaq 64(%rsp), %rdi
movl $4096, %esi
call cudaMallocHost@PLT
leaq 72(%rsp), %rdi
movl $163840, %esi
call cudaMallocHost@PLT
leaq 80(%rsp), %rdi
movl $40, %esi
call cudaMallocHost@PLT
movl $16384, %ebp
.L12:
leaq -16384(%rbp), %rbx
.L13:
call rand@PLT
cltd
shrl $22, %edx
addl %edx, %eax
andl $1023, %eax
subl %edx, %eax
movq 40(%rsp), %rdx
movl %eax, (%rdx,%rbx)
addq $4, %rbx
cmpq %rbp, %rbx
jne .L13
addq $16384, %rbp
cmpq $1073758208, %rbp
jne .L12
movl $4096, %ebp
.L14:
leaq -4096(%rbp), %rbx
.L15:
call rand@PLT
cltd
shrl $22, %edx
addl %edx, %eax
andl $1023, %eax
subl %edx, %eax
movq 56(%rsp), %rdx
movl %eax, (%rdx,%rbx)
addq $4, %rbx
cmpq %rbp, %rbx
jne .L15
addq $4096, %rbp
cmpq $16781312, %rbp
jne .L14
movl $40, %ebp
jmp .L16
.L34:
addq $40, %rbp
cmpq $163880, %rbp
je .L33
.L16:
leaq -40(%rbp), %rbx
.L17:
call rand@PLT
cltd
shrl $22, %edx
addl %edx, %eax
andl $1023, %eax
subl %edx, %eax
movq 72(%rsp), %rdx
movl %eax, (%rdx,%rbx)
addq $4, %rbx
cmpq %rbx, %rbp
jne .L17
jmp .L34
.L33:
leaq 88(%rsp), %rdi
call cudaEventCreate@PLT
leaq 96(%rsp), %rdi
call cudaEventCreate@PLT
leaq 104(%rsp), %rdi
movl $262144, %esi
call cudaMalloc@PLT
leaq 112(%rsp), %rdi
movl $1073741824, %esi
call cudaMalloc@PLT
leaq 120(%rsp), %rdi
movl $16384, %esi
call cudaMalloc@PLT
leaq 128(%rsp), %rdi
movl $16777216, %esi
call cudaMalloc@PLT
leaq 136(%rsp), %rdi
movl $4096, %esi
call cudaMalloc@PLT
leaq 144(%rsp), %rdi
movl $163840, %esi
call cudaMalloc@PLT
leaq 152(%rsp), %rdi
movl $40, %esi
call cudaMalloc@PLT
movl $1, %ecx
movl $1073741824, %edx
movq 40(%rsp), %rsi
movq 112(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $16777216, %edx
movq 56(%rsp), %rsi
movq 128(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $163840, %edx
movq 72(%rsp), %rsi
movq 144(%rsp), %rdi
call cudaMemcpy@PLT
movl $1024, %ebp
movq $0x000000000, 8(%rsp)
leaq 28(%rsp), %r12
jmp .L19
.L35:
movl $4096, %r9d
movl $65536, %r8d
movl $1, %ecx
movq 120(%rsp), %rdx
movq 112(%rsp), %rsi
movq 104(%rsp), %rdi
call _Z42__device_stub__Z15gpu_matrix_multPiS_S_iiiPiS_S_iii
jmp .L21
.L36:
movl $1024, %r9d
movl $4096, %r8d
movl $1, %ecx
movq 136(%rsp), %rdx
movq 128(%rsp), %rsi
movq 120(%rsp), %rdi
call _Z42__device_stub__Z15gpu_matrix_multPiS_S_iiiPiS_S_iii
jmp .L22
.L23:
movl $2, %ecx
movl $4096, %edx
movq 152(%rsp), %rsi
movq 80(%rsp), %rdi
call cudaMemcpy@PLT
call cudaThreadSynchronize@PLT
movl $0, %esi
movq 96(%rsp), %rdi
call cudaEventRecord@PLT
movq 96(%rsp), %rdi
call cudaEventSynchronize@PLT
movq 96(%rsp), %rdx
movq 88(%rsp), %rsi
movq %r12, %rdi
call cudaEventElapsedTime@PLT
pxor %xmm0, %xmm0
cvtss2sd 28(%rsp), %xmm0
addsd 8(%rsp), %xmm0
movsd %xmm0, 8(%rsp)
subl $1, %ebp
je .L24
.L19:
movl $0, %ebx
.L20:
call rand@PLT
cltd
shrl $22, %edx
addl %edx, %eax
andl $1023, %eax
subl %edx, %eax
movq 32(%rsp), %rdx
movl %eax, (%rdx,%rbx)
addq $4, %rbx
cmpq $262144, %rbx
jne .L20
movl $0, %esi
movq 88(%rsp), %rdi
call cudaEventRecord@PLT
movl $1, %ecx
movl $262144, %edx
movq 32(%rsp), %rsi
movq 104(%rsp), %rdi
call cudaMemcpy@PLT
movl $256, 160(%rsp)
movl $1, 164(%rsp)
movl $16, 172(%rsp)
movl $16, 176(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 172(%rsp), %rdx
movl $1, %ecx
movq 160(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L35
.L21:
call cudaDeviceSynchronize@PLT
movl $64, 184(%rsp)
movl $1, 188(%rsp)
movl $16, 196(%rsp)
movl $16, 200(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 196(%rsp), %rdx
movl $1, %ecx
movq 184(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L36
.L22:
movl $1, 208(%rsp)
movl $1, 212(%rsp)
movl $16, 220(%rsp)
movl $16, 224(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 220(%rsp), %rdx
movl $1, %ecx
movq 208(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
jne .L23
movl $10, %r9d
movl $4096, %r8d
movl $1, %ecx
movq 152(%rsp), %rdx
movq 144(%rsp), %rsi
movq 120(%rsp), %rdi
call _Z42__device_stub__Z15gpu_matrix_multPiS_S_iiiPiS_S_iii
jmp .L23
.L24:
movsd 8(%rsp), %xmm3
movapd %xmm3, %xmm0
mulsd .LC2(%rip), %xmm0
movsd .LC1(%rip), %xmm1
divsd %xmm3, %xmm1
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $2, %eax
call __printf_chk@PLT
movq 104(%rsp), %rdi
call cudaFree@PLT
movq 112(%rsp), %rdi
call cudaFree@PLT
movq 120(%rsp), %rdi
call cudaFree@PLT
movq 128(%rsp), %rdi
call cudaFree@PLT
movq 136(%rsp), %rdi
call cudaFree@PLT
movq 32(%rsp), %rdi
call cudaFreeHost@PLT
movq 40(%rsp), %rdi
call cudaFreeHost@PLT
movq 48(%rsp), %rdi
call cudaFreeHost@PLT
movq 56(%rsp), %rdi
call cudaFreeHost@PLT
movq 64(%rsp), %rdi
call cudaFreeHost@PLT
movq 232(%rsp), %rax
subq %fs:40, %rax
jne .L37
movl $0, %eax
addq $240, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.L37:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.1,"aMS",@progbits,1
.LC4:
.string "_Z15gpu_matrix_multPiS_S_iii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC4(%rip), %rdx
movq %rdx, %rcx
leaq _Z15gpu_matrix_multPiS_S_iii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC1:
.long 0
.long 1093615616
.align 8
.LC2:
.long 0
.long 1062207488
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "dr_model_poc.hip"
.globl _Z30__device_stub__gpu_matrix_multPiS_S_iii # -- Begin function _Z30__device_stub__gpu_matrix_multPiS_S_iii
.p2align 4, 0x90
.type _Z30__device_stub__gpu_matrix_multPiS_S_iii,@function
_Z30__device_stub__gpu_matrix_multPiS_S_iii: # @_Z30__device_stub__gpu_matrix_multPiS_S_iii
.cfi_startproc
# %bb.0:
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 88(%rsp)
movq %rsi, 80(%rsp)
movq %rdx, 72(%rsp)
movl %ecx, 20(%rsp)
movl %r8d, 16(%rsp)
movl %r9d, 12(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
leaq 20(%rsp), %rax
movq %rax, 120(%rsp)
leaq 16(%rsp), %rax
movq %rax, 128(%rsp)
leaq 12(%rsp), %rax
movq %rax, 136(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z15gpu_matrix_multPiS_S_iii, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $168, %rsp
.cfi_adjust_cfa_offset -168
retq
.Lfunc_end0:
.size _Z30__device_stub__gpu_matrix_multPiS_S_iii, .Lfunc_end0-_Z30__device_stub__gpu_matrix_multPiS_S_iii
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI1_0:
.quad 0x3f50000000000000 # double 9.765625E-4
.LCPI1_1:
.quad 0x412f400000000000 # double 1024000
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $280, %rsp # imm = 0x118
.cfi_def_cfa_offset 336
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl $3333, %edi # imm = 0xD05
callq srand
leaq 144(%rsp), %rdi
xorl %ebx, %ebx
movl $262144, %esi # imm = 0x40000
xorl %edx, %edx
callq hipHostMalloc
leaq 136(%rsp), %rdi
movl $1073741824, %esi # imm = 0x40000000
xorl %edx, %edx
callq hipHostMalloc
leaq 272(%rsp), %rdi
movl $16384, %esi # imm = 0x4000
xorl %edx, %edx
callq hipHostMalloc
leaq 128(%rsp), %rdi
movl $16777216, %esi # imm = 0x1000000
xorl %edx, %edx
callq hipHostMalloc
leaq 264(%rsp), %rdi
movl $4096, %esi # imm = 0x1000
xorl %edx, %edx
callq hipHostMalloc
leaq 240(%rsp), %rdi
movl $163840, %esi # imm = 0x28000
xorl %edx, %edx
callq hipHostMalloc
leaq 256(%rsp), %rdi
movl $40, %esi
xorl %edx, %edx
callq hipHostMalloc
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB1_1: # %.preheader162
# =>This Loop Header: Depth=1
# Child Loop BB1_2 Depth 2
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB1_2: # Parent Loop BB1_1 Depth=1
# => This Inner Loop Header: Depth=2
callq rand
# kill: def $eax killed $eax def $rax
leal 1023(%rax), %ecx
testl %eax, %eax
cmovnsl %eax, %ecx
andl $-1024, %ecx # imm = 0xFC00
subl %ecx, %eax
movq 136(%rsp), %rcx
addq %rbx, %rcx
movl %eax, (%rcx,%r15,4)
incq %r15
cmpq $4096, %r15 # imm = 0x1000
jne .LBB1_2
# %bb.3: # in Loop: Header=BB1_1 Depth=1
incq %r14
addq $16384, %rbx # imm = 0x4000
cmpq $65536, %r14 # imm = 0x10000
jne .LBB1_1
# %bb.4: # %.preheader160.preheader
xorl %ebx, %ebx
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB1_5: # %.preheader160
# =>This Loop Header: Depth=1
# Child Loop BB1_6 Depth 2
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB1_6: # Parent Loop BB1_5 Depth=1
# => This Inner Loop Header: Depth=2
callq rand
# kill: def $eax killed $eax def $rax
leal 1023(%rax), %ecx
testl %eax, %eax
cmovnsl %eax, %ecx
andl $-1024, %ecx # imm = 0xFC00
subl %ecx, %eax
movq 128(%rsp), %rcx
addq %rbx, %rcx
movl %eax, (%rcx,%r15,4)
incq %r15
cmpq $1024, %r15 # imm = 0x400
jne .LBB1_6
# %bb.7: # in Loop: Header=BB1_5 Depth=1
incq %r14
addq $4096, %rbx # imm = 0x1000
cmpq $4096, %r14 # imm = 0x1000
jne .LBB1_5
# %bb.8: # %.preheader158.preheader
xorl %ebx, %ebx
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB1_9: # %.preheader158
# =>This Loop Header: Depth=1
# Child Loop BB1_10 Depth 2
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB1_10: # Parent Loop BB1_9 Depth=1
# => This Inner Loop Header: Depth=2
callq rand
# kill: def $eax killed $eax def $rax
leal 1023(%rax), %ecx
testl %eax, %eax
cmovnsl %eax, %ecx
andl $-1024, %ecx # imm = 0xFC00
subl %ecx, %eax
movq 240(%rsp), %rcx
addq %rbx, %rcx
movl %eax, (%rcx,%r15,4)
incq %r15
cmpq $10, %r15
jne .LBB1_10
# %bb.11: # in Loop: Header=BB1_9 Depth=1
incq %r14
addq $40, %rbx
cmpq $4096, %r14 # imm = 0x1000
jne .LBB1_9
# %bb.12:
movabsq $68719476752, %rbx # imm = 0x1000000010
movabsq $4294967297, %r14 # imm = 0x100000001
leaq 232(%rsp), %rdi
callq hipEventCreate
leaq 120(%rsp), %rdi
callq hipEventCreate
leaq 112(%rsp), %rdi
movl $262144, %esi # imm = 0x40000
callq hipMalloc
leaq 104(%rsp), %rdi
movl $1073741824, %esi # imm = 0x40000000
callq hipMalloc
leaq 88(%rsp), %rdi
movl $16384, %esi # imm = 0x4000
callq hipMalloc
leaq 96(%rsp), %rdi
movl $16777216, %esi # imm = 0x1000000
callq hipMalloc
leaq 224(%rsp), %rdi
movl $4096, %esi # imm = 0x1000
callq hipMalloc
leaq 216(%rsp), %rdi
movl $163840, %esi # imm = 0x28000
callq hipMalloc
leaq 208(%rsp), %rdi
movl $40, %esi
callq hipMalloc
movq 104(%rsp), %rdi
movq 136(%rsp), %rsi
movl $1073741824, %edx # imm = 0x40000000
movl $1, %ecx
callq hipMemcpy
movq 96(%rsp), %rdi
movq 128(%rsp), %rsi
movl $16777216, %edx # imm = 0x1000000
movl $1, %ecx
callq hipMemcpy
movq 216(%rsp), %rdi
movq 240(%rsp), %rsi
movl $163840, %edx # imm = 0x28000
movl $1, %ecx
callq hipMemcpy
xorpd %xmm2, %xmm2
xorl %ebp, %ebp
leaq 255(%r14), %r15
leaq 160(%rsp), %r12
leaq 63(%r14), %r13
jmp .LBB1_13
.p2align 4, 0x90
.LBB1_21: # in Loop: Header=BB1_13 Depth=1
movq 256(%rsp), %rdi
movq 208(%rsp), %rsi
movl $4096, %edx # imm = 0x1000
movl $2, %ecx
callq hipMemcpy
callq hipDeviceSynchronize
movq 120(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq 120(%rsp), %rdi
callq hipEventSynchronize
movq 232(%rsp), %rsi
movq 120(%rsp), %rdx
leaq 156(%rsp), %rdi
callq hipEventElapsedTime
incl %ebp
movss 156(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movsd 248(%rsp), %xmm2 # 8-byte Reload
# xmm2 = mem[0],zero
addsd %xmm0, %xmm2
cmpl $1024, %ebp # imm = 0x400
je .LBB1_22
.LBB1_13: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB1_14 Depth 2
movsd %xmm2, 248(%rsp) # 8-byte Spill
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB1_14: # Parent Loop BB1_13 Depth=1
# => This Inner Loop Header: Depth=2
callq rand
# kill: def $eax killed $eax def $rax
leal 1023(%rax), %ecx
testl %eax, %eax
cmovnsl %eax, %ecx
andl $-1024, %ecx # imm = 0xFC00
subl %ecx, %eax
movq 144(%rsp), %rcx
movl %eax, (%rcx,%r14,4)
incq %r14
cmpq $65536, %r14 # imm = 0x10000
jne .LBB1_14
# %bb.15: # %.critedge
# in Loop: Header=BB1_13 Depth=1
movq 232(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq 112(%rsp), %rdi
movq 144(%rsp), %rsi
movl $262144, %edx # imm = 0x40000
movl $1, %ecx
callq hipMemcpy
movq %r15, %rdi
movl $1, %esi
movq %rbx, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_17
# %bb.16: # in Loop: Header=BB1_13 Depth=1
movq 112(%rsp), %rax
movq 104(%rsp), %rcx
movq 88(%rsp), %rdx
movq %rax, 80(%rsp)
movq %rcx, 72(%rsp)
movq %rdx, 64(%rsp)
movl $1, 12(%rsp)
movl $65536, 8(%rsp) # imm = 0x10000
movl $4096, 4(%rsp) # imm = 0x1000
leaq 80(%rsp), %rax
movq %rax, 160(%rsp)
leaq 72(%rsp), %rax
movq %rax, 168(%rsp)
leaq 64(%rsp), %rax
movq %rax, 176(%rsp)
leaq 12(%rsp), %rax
movq %rax, 184(%rsp)
leaq 8(%rsp), %rax
movq %rax, 192(%rsp)
leaq 4(%rsp), %rax
movq %rax, 200(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
movl $_Z15gpu_matrix_multPiS_S_iii, %edi
movq %r12, %r9
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_17: # in Loop: Header=BB1_13 Depth=1
callq hipDeviceSynchronize
movq %r13, %rdi
movl $1, %esi
movq %rbx, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_19
# %bb.18: # in Loop: Header=BB1_13 Depth=1
movq 88(%rsp), %rax
movq 96(%rsp), %rcx
movq 224(%rsp), %rdx
movq %rax, 80(%rsp)
movq %rcx, 72(%rsp)
movq %rdx, 64(%rsp)
movl $1, 12(%rsp)
movl $4096, 8(%rsp) # imm = 0x1000
movl $1024, 4(%rsp) # imm = 0x400
leaq 80(%rsp), %rax
movq %rax, 160(%rsp)
leaq 72(%rsp), %rax
movq %rax, 168(%rsp)
leaq 64(%rsp), %rax
movq %rax, 176(%rsp)
leaq 12(%rsp), %rax
movq %rax, 184(%rsp)
leaq 8(%rsp), %rax
movq %rax, 192(%rsp)
leaq 4(%rsp), %rax
movq %rax, 200(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
movl $_Z15gpu_matrix_multPiS_S_iii, %edi
movq %r12, %r9
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_19: # in Loop: Header=BB1_13 Depth=1
movabsq $4294967297, %rdi # imm = 0x100000001
movl $1, %esi
movq %rbx, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_21
# %bb.20: # in Loop: Header=BB1_13 Depth=1
movq 88(%rsp), %rax
movq 216(%rsp), %rcx
movq 208(%rsp), %rdx
movq %rax, 80(%rsp)
movq %rcx, 72(%rsp)
movq %rdx, 64(%rsp)
movl $1, 12(%rsp)
movl $4096, 8(%rsp) # imm = 0x1000
movl $10, 4(%rsp)
leaq 80(%rsp), %rax
movq %rax, 160(%rsp)
leaq 72(%rsp), %rax
movq %rax, 168(%rsp)
leaq 64(%rsp), %rax
movq %rax, 176(%rsp)
leaq 12(%rsp), %rax
movq %rax, 184(%rsp)
leaq 8(%rsp), %rax
movq %rax, 192(%rsp)
leaq 4(%rsp), %rax
movq %rax, 200(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
movl $_Z15gpu_matrix_multPiS_S_iii, %edi
movq %r12, %r9
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
jmp .LBB1_21
.LBB1_22:
movsd .LCPI1_0(%rip), %xmm0 # xmm0 = mem[0],zero
mulsd %xmm2, %xmm0
movsd .LCPI1_1(%rip), %xmm1 # xmm1 = mem[0],zero
divsd %xmm2, %xmm1
movl $.L.str, %edi
movb $2, %al
callq printf
movq 112(%rsp), %rdi
callq hipFree
movq 104(%rsp), %rdi
callq hipFree
movq 88(%rsp), %rdi
callq hipFree
movq 96(%rsp), %rdi
callq hipFree
movq 224(%rsp), %rdi
callq hipFree
movq 144(%rsp), %rdi
callq hipHostFree
movq 136(%rsp), %rdi
callq hipHostFree
movq 272(%rsp), %rdi
callq hipHostFree
movq 128(%rsp), %rdi
callq hipHostFree
movq 264(%rsp), %rdi
callq hipHostFree
xorl %eax, %eax
addq $280, %rsp # imm = 0x118
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z15gpu_matrix_multPiS_S_iii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z15gpu_matrix_multPiS_S_iii,@object # @_Z15gpu_matrix_multPiS_S_iii
.section .rodata,"a",@progbits
.globl _Z15gpu_matrix_multPiS_S_iii
.p2align 3, 0x0
_Z15gpu_matrix_multPiS_S_iii:
.quad _Z30__device_stub__gpu_matrix_multPiS_S_iii
.size _Z15gpu_matrix_multPiS_S_iii, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Avg. Latency: %g ms :: Avg. Throughput: %g examples/sec\n"
.size .L.str, 57
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z15gpu_matrix_multPiS_S_iii"
.size .L__unnamed_1, 29
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z30__device_stub__gpu_matrix_multPiS_S_iii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z15gpu_matrix_multPiS_S_iii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void windowBlackman(float* idata, int length)
{
int tidx = threadIdx.x + blockIdx.x*blockDim.x;
if (tidx < length)
{
idata[tidx] = 0.74 / 2 * -0.5 * cos(2 * PI_F*tidx / (length - 1)) + 0.16 / 2 * sin(4 * PI_F*tidx / (length - 1));
}
} | .file "tmpxft_0007129d_00000000-6_windowBlackman.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z35__device_stub__Z14windowBlackmanPfiPfi
.type _Z35__device_stub__Z14windowBlackmanPfiPfi, @function
_Z35__device_stub__Z14windowBlackmanPfiPfi:
.LFB2051:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movl %esi, 4(%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
leaq 4(%rsp), %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z14windowBlackmanPfi(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z35__device_stub__Z14windowBlackmanPfiPfi, .-_Z35__device_stub__Z14windowBlackmanPfiPfi
.globl _Z14windowBlackmanPfi
.type _Z14windowBlackmanPfi, @function
_Z14windowBlackmanPfi:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z35__device_stub__Z14windowBlackmanPfiPfi
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z14windowBlackmanPfi, .-_Z14windowBlackmanPfi
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z14windowBlackmanPfi"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z14windowBlackmanPfi(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void windowBlackman(float* idata, int length)
{
int tidx = threadIdx.x + blockIdx.x*blockDim.x;
if (tidx < length)
{
idata[tidx] = 0.74 / 2 * -0.5 * cos(2 * PI_F*tidx / (length - 1)) + 0.16 / 2 * sin(4 * PI_F*tidx / (length - 1));
}
} | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void windowBlackman(float* idata, int length)
{
int tidx = threadIdx.x + blockIdx.x*blockDim.x;
if (tidx < length)
{
idata[tidx] = 0.74 / 2 * -0.5 * cos(2 * PI_F*tidx / (length - 1)) + 0.16 / 2 * sin(4 * PI_F*tidx / (length - 1));
}
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void windowBlackman(float* idata, int length)
{
int tidx = threadIdx.x + blockIdx.x*blockDim.x;
if (tidx < length)
{
idata[tidx] = 0.74 / 2 * -0.5 * cos(2 * PI_F*tidx / (length - 1)) + 0.16 / 2 * sin(4 * PI_F*tidx / (length - 1));
}
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z14windowBlackmanPfi
.globl _Z14windowBlackmanPfi
.p2align 8
.type _Z14windowBlackmanPfi,@function
_Z14windowBlackmanPfi:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x1c
s_load_b32 s2, s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s3, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s3, v[0:1]
s_mov_b32 s3, exec_lo
v_cmpx_gt_i32_e64 s2, v1
s_cbranch_execz .LBB0_10
v_cvt_f32_i32_e32 v5, v1
s_add_i32 s2, s2, -1
s_mov_b32 s3, exec_lo
v_cvt_f32_i32_e32 v4, s2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v0, 0x40c90fd0, v5
v_div_scale_f32 v2, null, v4, v4, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f32_e32 v3, v2
s_waitcnt_depctr 0xfff
v_fma_f32 v6, -v2, v3, 1.0
v_fmac_f32_e32 v3, v6, v3
v_div_scale_f32 v6, vcc_lo, v0, v4, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v7, v6, v3
v_fma_f32 v8, -v2, v7, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v7, v8, v3
v_fma_f32 v2, -v2, v7, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fmas_f32 v2, v2, v3, v7
v_div_fixup_f32 v0, v2, v4, v0
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_ngt_f32_e64 0x48000000, |v0|
s_xor_b32 s4, exec_lo, s3
s_cbranch_execz .LBB0_3
v_dual_mov_b32 v7, 0 :: v_dual_and_b32 v12, 0x7fffffff, v0
s_mov_b32 s2, 0x7fffff
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_and_or_b32 v15, v12, s2, 0x800000
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, v15, 0xfe5163ab, 0
v_mov_b32_e32 v6, v3
v_lshrrev_b32_e32 v3, 23, v12
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_nc_u32_e32 v3, 0xffffff88, v3
v_mad_u64_u32 v[8:9], null, v15, 0x3c439041, v[6:7]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cmp_lt_u32_e32 vcc_lo, 63, v3
v_cndmask_b32_e64 v13, 0, 0xffffffc0, vcc_lo
v_add_nc_u32_e32 v3, v13, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_lt_u32_e64 s2, 31, v3
v_cndmask_b32_e64 v14, 0, 0xffffffe0, s2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_mov_b32 v6, v9 :: v_dual_add_nc_u32 v3, v14, v3
v_mad_u64_u32 v[9:10], null, v15, 0xdb629599, v[6:7]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_lt_u32_e64 s3, 31, v3
v_mov_b32_e32 v6, v10
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v2, v9, v2, vcc_lo
v_mad_u64_u32 v[10:11], null, v15, 0xf534ddc0, v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mov_b32_e32 v6, v11
v_mad_u64_u32 v[11:12], null, v15, 0xfc2757d1, v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mov_b32_e32 v6, v12
v_mad_u64_u32 v[12:13], null, v15, 0x4e441529, v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mov_b32_e32 v6, v13
v_mad_u64_u32 v[13:14], null, v15, 0xa2f9836e, v[6:7]
v_cndmask_b32_e64 v6, 0, 0xffffffe0, s3
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v7, v12, v10, vcc_lo
v_add_nc_u32_e32 v3, v6, v3
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_dual_cndmask_b32 v13, v13, v11 :: v_dual_cndmask_b32 v12, v14, v12
v_dual_cndmask_b32 v11, v11, v9 :: v_dual_cndmask_b32 v6, v10, v8
v_cmp_eq_u32_e32 vcc_lo, 0, v3
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_cndmask_b32_e64 v8, v13, v7, s2
v_cndmask_b32_e64 v10, v12, v13, s2
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_cndmask_b32_e64 v7, v7, v11, s2
v_sub_nc_u32_e32 v12, 32, v3
v_cndmask_b32_e64 v10, v10, v8, s3
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v8, v8, v7, s3
v_alignbit_b32 v13, v10, v8, v12
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v3, v13, v10, vcc_lo
v_cndmask_b32_e64 v11, v11, v6, s2
v_cndmask_b32_e64 v2, v6, v2, s2
v_cndmask_b32_e64 v7, v7, v11, s3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cndmask_b32_e64 v2, v11, v2, s3
v_alignbit_b32 v9, v8, v7, v12
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_alignbit_b32 v11, v7, v2, v12
v_cndmask_b32_e32 v6, v9, v8, vcc_lo
v_bfe_u32 v8, v3, 29, 1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cndmask_b32_e32 v7, v11, v7, vcc_lo
v_alignbit_b32 v9, v3, v6, 30
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_sub_nc_u32_e32 v10, 0, v8
v_alignbit_b32 v6, v6, v7, 30
v_alignbit_b32 v2, v7, v2, 30
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_xor_b32_e32 v9, v9, v10
v_xor_b32_e32 v6, v6, v10
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_xor_b32_e32 v2, v2, v10
v_clz_i32_u32_e32 v11, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_min_u32_e32 v11, 32, v11
v_sub_nc_u32_e32 v7, 31, v11
v_lshlrev_b32_e32 v13, 23, v11
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
v_alignbit_b32 v9, v9, v6, v7
v_alignbit_b32 v2, v6, v2, v7
v_lshrrev_b32_e32 v7, 29, v3
v_lshrrev_b32_e32 v3, 30, v3
v_alignbit_b32 v6, v9, v2, 9
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_lshlrev_b32_e32 v7, 31, v7
v_lshrrev_b32_e32 v9, 9, v9
v_add_nc_u32_e32 v3, v8, v3
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_clz_i32_u32_e32 v10, v6
v_or_b32_e32 v12, 0.5, v7
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_min_u32_e32 v10, 32, v10
v_sub_nc_u32_e32 v12, v12, v13
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v14, 31, v10
v_alignbit_b32 v2, v6, v2, v14
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_or_b32_e32 v6, v9, v12
v_add_lshl_u32 v9, v10, v11, 23
v_lshrrev_b32_e32 v2, 9, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_f32_e32 v10, 0x3fc90fda, v6
v_sub_nc_u32_e32 v2, v2, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f32 v9, v6, 0x3fc90fda, -v10
v_add_nc_u32_e32 v2, 0x33000000, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fmamk_f32 v6, v6, 0x33a22168, v9
v_or_b32_e32 v2, v2, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v6, 0x3fc90fda, v2
v_add_f32_e32 v2, v10, v6
.LBB0_3:
s_and_not1_saveexec_b32 s2, s4
v_mul_f32_e64 v2, 0x3f22f983, |v0|
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_rndne_f32_e32 v3, v2
v_fma_f32 v2, v3, 0xbfc90fda, |v0|
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmamk_f32 v2, v3, 0xb3a22168, v2
v_fmamk_f32 v2, v3, 0xa7c234c4, v2
v_cvt_i32_f32_e32 v3, v3
s_or_b32 exec_lo, exec_lo, s2
v_mul_f32_e32 v5, 0x41490fd0, v5
s_mov_b32 s3, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_div_scale_f32 v6, null, v4, v4, v5
v_div_scale_f32 v9, vcc_lo, v5, v4, v5
v_rcp_f32_e32 v7, v6
s_waitcnt_depctr 0xfff
v_fma_f32 v8, -v6, v7, 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v7, v8, v7
v_mul_f32_e32 v8, v9, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v10, -v6, v8, v9
v_fmac_f32_e32 v8, v10, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v6, -v6, v8, v9
v_div_fmas_f32 v6, v6, v7, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fixup_f32 v4, v6, v4, v5
v_and_b32_e32 v5, 0x7fffffff, v4
v_cmpx_ngt_f32_e64 0x48000000, |v4|
s_xor_b32 s4, exec_lo, s3
s_cbranch_execz .LBB0_7
s_mov_b32 s2, 0x7fffff
v_mov_b32_e32 v8, 0
v_and_or_b32 v16, v5, s2, 0x800000
v_lshrrev_b32_e32 v13, 23, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[6:7], null, v16, 0xfe5163ab, 0
v_add_nc_u32_e32 v14, 0xffffff88, v13
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cmp_lt_u32_e32 vcc_lo, 63, v14
v_mad_u64_u32 v[9:10], null, v16, 0x3c439041, v[7:8]
v_cndmask_b32_e64 v15, 0, 0xffffffc0, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mov_b32_e32 v7, v10
v_add_nc_u32_e32 v15, v15, v14
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[10:11], null, v16, 0xdb629599, v[7:8]
v_cmp_lt_u32_e64 s2, 31, v15
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cndmask_b32_e64 v17, 0, 0xffffffe0, s2
v_dual_mov_b32 v7, v11 :: v_dual_cndmask_b32 v6, v10, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v17, v17, v15
v_mad_u64_u32 v[11:12], null, v16, 0xf534ddc0, v[7:8]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_lt_u32_e64 s3, 31, v17
v_mov_b32_e32 v7, v12
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v9, v11, v9, vcc_lo
v_mad_u64_u32 v[12:13], null, v16, 0xfc2757d1, v[7:8]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cndmask_b32_e64 v6, v9, v6, s2
v_mov_b32_e32 v7, v13
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[13:14], null, v16, 0x4e441529, v[7:8]
v_mov_b32_e32 v7, v14
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[14:15], null, v16, 0xa2f9836e, v[7:8]
v_cndmask_b32_e64 v7, 0, 0xffffffe0, s3
v_dual_cndmask_b32 v8, v13, v11 :: v_dual_add_nc_u32 v7, v7, v17
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_dual_cndmask_b32 v14, v14, v12 :: v_dual_cndmask_b32 v13, v15, v13
v_cndmask_b32_e32 v12, v12, v10, vcc_lo
v_cmp_eq_u32_e32 vcc_lo, 0, v7
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_cndmask_b32_e64 v11, v14, v8, s2
v_cndmask_b32_e64 v13, v13, v14, s2
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
v_cndmask_b32_e64 v8, v8, v12, s2
v_sub_nc_u32_e32 v14, 32, v7
v_cndmask_b32_e64 v12, v12, v9, s2
v_cndmask_b32_e64 v13, v13, v11, s3
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cndmask_b32_e64 v11, v11, v8, s3
v_cndmask_b32_e64 v8, v8, v12, s3
v_cndmask_b32_e64 v6, v12, v6, s3
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_alignbit_b32 v15, v13, v11, v14
v_alignbit_b32 v10, v11, v8, v14
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
v_cndmask_b32_e32 v7, v15, v13, vcc_lo
v_alignbit_b32 v13, v8, v6, v14
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cndmask_b32_e32 v9, v10, v11, vcc_lo
v_bfe_u32 v10, v7, 29, 1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cndmask_b32_e32 v8, v13, v8, vcc_lo
v_alignbit_b32 v11, v7, v9, 30
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_sub_nc_u32_e32 v12, 0, v10
v_alignbit_b32 v9, v9, v8, 30
v_alignbit_b32 v6, v8, v6, 30
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_xor_b32_e32 v11, v11, v12
v_xor_b32_e32 v8, v9, v12
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_xor_b32_e32 v6, v6, v12
v_clz_i32_u32_e32 v13, v11
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_min_u32_e32 v13, 32, v13
v_sub_nc_u32_e32 v9, 31, v13
v_lshlrev_b32_e32 v15, 23, v13
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_alignbit_b32 v11, v11, v8, v9
v_alignbit_b32 v6, v8, v6, v9
v_lshrrev_b32_e32 v9, 29, v7
v_alignbit_b32 v8, v11, v6, 9
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_lshlrev_b32_e32 v9, 31, v9
v_lshrrev_b32_e32 v11, 9, v11
v_clz_i32_u32_e32 v12, v8
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_or_b32_e32 v14, 0.5, v9
v_min_u32_e32 v12, 32, v12
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v14, v14, v15
v_sub_nc_u32_e32 v16, 31, v12
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_alignbit_b32 v6, v8, v6, v16
v_or_b32_e32 v8, v11, v14
v_add_lshl_u32 v11, v12, v13, 23
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshrrev_b32_e32 v6, 9, v6
v_mul_f32_e32 v12, 0x3fc90fda, v8
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v6, v6, v11
v_fma_f32 v11, v8, 0x3fc90fda, -v12
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v6, 0x33000000, v6
v_fmamk_f32 v8, v8, 0x33a22168, v11
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_or_b32_e32 v6, v6, v9
v_fmac_f32_e32 v8, 0x3fc90fda, v6
v_lshrrev_b32_e32 v7, 30, v7
s_delay_alu instid0(VALU_DEP_1)
v_dual_add_f32 v6, v12, v8 :: v_dual_add_nc_u32 v7, v10, v7
.LBB0_7:
s_and_not1_saveexec_b32 s2, s4
v_mul_f32_e64 v6, 0x3f22f983, |v4|
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_rndne_f32_e32 v7, v6
v_fma_f32 v6, v7, 0xbfc90fda, |v4|
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmamk_f32 v6, v7, 0xb3a22168, v6
v_fmamk_f32 v6, v7, 0xa7c234c4, v6
v_cvt_i32_f32_e32 v7, v7
s_or_b32 exec_lo, exec_lo, s2
v_dual_mul_f32 v8, v2, v2 :: v_dual_and_b32 v11, 1, v3
s_mov_b32 s2, 0xb94c1982
s_mov_b32 s3, 0x37d75334
v_xor_b32_e32 v5, v5, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
v_fmaak_f32 v9, s2, v8, 0x3c0881c4
v_cmp_eq_u32_e32 vcc_lo, 0, v11
s_load_b64 s[0:1], s[0:1], 0x0
v_lshlrev_b32_e32 v3, 30, v3
v_fmaak_f32 v9, v8, v9, 0xbe2aaa9d
v_fmaak_f32 v10, s3, v8, 0xbab64f3b
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_and_b32_e32 v3, 0x80000000, v3
v_mul_f32_e32 v9, v8, v9
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fmaak_f32 v10, v8, v10, 0x3d2aabf7
v_fmac_f32_e32 v2, v2, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmaak_f32 v10, v8, v10, 0xbf000004
v_fma_f32 v8, v8, v10, 1.0
v_and_b32_e32 v10, 1, v7
v_lshlrev_b32_e32 v7, 30, v7
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_cndmask_b32_e64 v2, -v2, v8, vcc_lo
v_cmp_class_f32_e64 vcc_lo, v0, 0x1f8
v_dual_mul_f32 v8, v6, v6 :: v_dual_and_b32 v7, 0x80000000, v7
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_xor_b32_e32 v2, v3, v2
v_fmaak_f32 v9, s3, v8, 0xbab64f3b
s_mov_b32 s3, 0xbfc7ae14
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v0, 0x7fc00000, v2, vcc_lo
v_cmp_eq_u32_e32 vcc_lo, 0, v10
v_cvt_f64_f32_e32 v[2:3], v0
v_fmaak_f32 v0, s2, v8, 0x3c0881c4
s_mov_b32 s2, 0x7ae147ae
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmaak_f32 v0, v8, v0, 0xbe2aaa9d
v_mul_f32_e32 v0, v8, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_fmaak_f32 v9, v8, v9, 0x3d2aabf7 :: v_dual_fmac_f32 v6, v6, v0
v_fmaak_f32 v9, v8, v9, 0xbf000004
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v0, v8, v9, 1.0
v_cndmask_b32_e32 v0, v0, v6, vcc_lo
v_cmp_class_f32_e64 vcc_lo, v4, 0x1f8
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor3_b32 v0, v5, v7, v0
v_cndmask_b32_e32 v0, 0x7fc00000, v0, vcc_lo
v_mul_f64 v[2:3], v[2:3], s[2:3]
s_mov_b32 s3, 0x3fb47ae1
s_mov_b32 s2, 0x47ae147b
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_f64_f32_e32 v[4:5], v0
v_fma_f64 v[2:3], v[4:5], s[2:3], v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cvt_f32_f64_e32 v3, v[2:3]
v_ashrrev_i32_e32 v2, 31, v1
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v3, off
.LBB0_10:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z14windowBlackmanPfi
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 18
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z14windowBlackmanPfi, .Lfunc_end0-_Z14windowBlackmanPfi
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: by_value
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
.size: 2
.value_kind: hidden_group_size_x
- .offset: 30
.size: 2
.value_kind: hidden_group_size_y
- .offset: 32
.size: 2
.value_kind: hidden_group_size_z
- .offset: 34
.size: 2
.value_kind: hidden_remainder_x
- .offset: 36
.size: 2
.value_kind: hidden_remainder_y
- .offset: 38
.size: 2
.value_kind: hidden_remainder_z
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 80
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z14windowBlackmanPfi
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z14windowBlackmanPfi.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 18
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void windowBlackman(float* idata, int length)
{
int tidx = threadIdx.x + blockIdx.x*blockDim.x;
if (tidx < length)
{
idata[tidx] = 0.74 / 2 * -0.5 * cos(2 * PI_F*tidx / (length - 1)) + 0.16 / 2 * sin(4 * PI_F*tidx / (length - 1));
}
} | .text
.file "windowBlackman.hip"
.globl _Z29__device_stub__windowBlackmanPfi # -- Begin function _Z29__device_stub__windowBlackmanPfi
.p2align 4, 0x90
.type _Z29__device_stub__windowBlackmanPfi,@function
_Z29__device_stub__windowBlackmanPfi: # @_Z29__device_stub__windowBlackmanPfi
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movl %esi, 4(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 4(%rsp), %rax
movq %rax, 72(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z14windowBlackmanPfi, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z29__device_stub__windowBlackmanPfi, .Lfunc_end0-_Z29__device_stub__windowBlackmanPfi
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z14windowBlackmanPfi, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z14windowBlackmanPfi,@object # @_Z14windowBlackmanPfi
.section .rodata,"a",@progbits
.globl _Z14windowBlackmanPfi
.p2align 3, 0x0
_Z14windowBlackmanPfi:
.quad _Z29__device_stub__windowBlackmanPfi
.size _Z14windowBlackmanPfi, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z14windowBlackmanPfi"
.size .L__unnamed_1, 22
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z29__device_stub__windowBlackmanPfi
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z14windowBlackmanPfi
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0007129d_00000000-6_windowBlackman.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z35__device_stub__Z14windowBlackmanPfiPfi
.type _Z35__device_stub__Z14windowBlackmanPfiPfi, @function
_Z35__device_stub__Z14windowBlackmanPfiPfi:
.LFB2051:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movl %esi, 4(%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
leaq 4(%rsp), %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z14windowBlackmanPfi(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z35__device_stub__Z14windowBlackmanPfiPfi, .-_Z35__device_stub__Z14windowBlackmanPfiPfi
.globl _Z14windowBlackmanPfi
.type _Z14windowBlackmanPfi, @function
_Z14windowBlackmanPfi:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z35__device_stub__Z14windowBlackmanPfiPfi
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z14windowBlackmanPfi, .-_Z14windowBlackmanPfi
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z14windowBlackmanPfi"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z14windowBlackmanPfi(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "windowBlackman.hip"
.globl _Z29__device_stub__windowBlackmanPfi # -- Begin function _Z29__device_stub__windowBlackmanPfi
.p2align 4, 0x90
.type _Z29__device_stub__windowBlackmanPfi,@function
_Z29__device_stub__windowBlackmanPfi: # @_Z29__device_stub__windowBlackmanPfi
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movl %esi, 4(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 4(%rsp), %rax
movq %rax, 72(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z14windowBlackmanPfi, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z29__device_stub__windowBlackmanPfi, .Lfunc_end0-_Z29__device_stub__windowBlackmanPfi
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z14windowBlackmanPfi, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z14windowBlackmanPfi,@object # @_Z14windowBlackmanPfi
.section .rodata,"a",@progbits
.globl _Z14windowBlackmanPfi
.p2align 3, 0x0
_Z14windowBlackmanPfi:
.quad _Z29__device_stub__windowBlackmanPfi
.size _Z14windowBlackmanPfi, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z14windowBlackmanPfi"
.size .L__unnamed_1, 22
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z29__device_stub__windowBlackmanPfi
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z14windowBlackmanPfi
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void convolutionRowGPU(double *h_Dst, double *h_Src, double *h_Filter, int imageW, int imageH, int filterR){
int k;
double sum = 0;
int ix = blockIdx.x * blockDim.x + threadIdx.x;
int iy = blockIdx.y * blockDim.y + threadIdx.y;
for (k = -filterR; k <= filterR; k++) {
int d = ix + k; //edw einai to pou tha paei to filtro gi auto elegxei apo katw kai an to d einia ektos oriwn eikonas
if (d >= 0 && d < imageW) {
sum += h_Src[iy * imageW + d] * h_Filter[filterR - k];
}
h_Dst[iy * imageW + ix] = sum;
}
} | .file "tmpxft_000e845a_00000000-6_convolutionRowGPU.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z44__device_stub__Z17convolutionRowGPUPdS_S_iiiPdS_S_iii
.type _Z44__device_stub__Z17convolutionRowGPUPdS_S_iiiPdS_S_iii, @function
_Z44__device_stub__Z17convolutionRowGPUPdS_S_iiiPdS_S_iii:
.LFB2051:
.cfi_startproc
endbr64
subq $184, %rsp
.cfi_def_cfa_offset 192
movq %rdi, 40(%rsp)
movq %rsi, 32(%rsp)
movq %rdx, 24(%rsp)
movl %ecx, 20(%rsp)
movl %r8d, 16(%rsp)
movl %r9d, 12(%rsp)
movq %fs:40, %rax
movq %rax, 168(%rsp)
xorl %eax, %eax
leaq 40(%rsp), %rax
movq %rax, 112(%rsp)
leaq 32(%rsp), %rax
movq %rax, 120(%rsp)
leaq 24(%rsp), %rax
movq %rax, 128(%rsp)
leaq 20(%rsp), %rax
movq %rax, 136(%rsp)
leaq 16(%rsp), %rax
movq %rax, 144(%rsp)
leaq 12(%rsp), %rax
movq %rax, 152(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
leaq 56(%rsp), %rcx
leaq 48(%rsp), %rdx
leaq 76(%rsp), %rsi
leaq 64(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 168(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $184, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 56(%rsp)
.cfi_def_cfa_offset 200
pushq 56(%rsp)
.cfi_def_cfa_offset 208
leaq 128(%rsp), %r9
movq 92(%rsp), %rcx
movl 100(%rsp), %r8d
movq 80(%rsp), %rsi
movl 88(%rsp), %edx
leaq _Z17convolutionRowGPUPdS_S_iii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 192
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z44__device_stub__Z17convolutionRowGPUPdS_S_iiiPdS_S_iii, .-_Z44__device_stub__Z17convolutionRowGPUPdS_S_iiiPdS_S_iii
.globl _Z17convolutionRowGPUPdS_S_iii
.type _Z17convolutionRowGPUPdS_S_iii, @function
_Z17convolutionRowGPUPdS_S_iii:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z44__device_stub__Z17convolutionRowGPUPdS_S_iiiPdS_S_iii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z17convolutionRowGPUPdS_S_iii, .-_Z17convolutionRowGPUPdS_S_iii
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "_Z17convolutionRowGPUPdS_S_iii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z17convolutionRowGPUPdS_S_iii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void convolutionRowGPU(double *h_Dst, double *h_Src, double *h_Filter, int imageW, int imageH, int filterR){
int k;
double sum = 0;
int ix = blockIdx.x * blockDim.x + threadIdx.x;
int iy = blockIdx.y * blockDim.y + threadIdx.y;
for (k = -filterR; k <= filterR; k++) {
int d = ix + k; //edw einai to pou tha paei to filtro gi auto elegxei apo katw kai an to d einia ektos oriwn eikonas
if (d >= 0 && d < imageW) {
sum += h_Src[iy * imageW + d] * h_Filter[filterR - k];
}
h_Dst[iy * imageW + ix] = sum;
}
} | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void convolutionRowGPU(double *h_Dst, double *h_Src, double *h_Filter, int imageW, int imageH, int filterR){
int k;
double sum = 0;
int ix = blockIdx.x * blockDim.x + threadIdx.x;
int iy = blockIdx.y * blockDim.y + threadIdx.y;
for (k = -filterR; k <= filterR; k++) {
int d = ix + k; //edw einai to pou tha paei to filtro gi auto elegxei apo katw kai an to d einia ektos oriwn eikonas
if (d >= 0 && d < imageW) {
sum += h_Src[iy * imageW + d] * h_Filter[filterR - k];
}
h_Dst[iy * imageW + ix] = sum;
}
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void convolutionRowGPU(double *h_Dst, double *h_Src, double *h_Filter, int imageW, int imageH, int filterR){
int k;
double sum = 0;
int ix = blockIdx.x * blockDim.x + threadIdx.x;
int iy = blockIdx.y * blockDim.y + threadIdx.y;
for (k = -filterR; k <= filterR; k++) {
int d = ix + k; //edw einai to pou tha paei to filtro gi auto elegxei apo katw kai an to d einia ektos oriwn eikonas
if (d >= 0 && d < imageW) {
sum += h_Src[iy * imageW + d] * h_Filter[filterR - k];
}
h_Dst[iy * imageW + ix] = sum;
}
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z17convolutionRowGPUPdS_S_iii
.globl _Z17convolutionRowGPUPdS_S_iii
.p2align 8
.type _Z17convolutionRowGPUPdS_S_iii,@function
_Z17convolutionRowGPUPdS_S_iii:
s_load_b32 s9, s[0:1], 0x20
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s9, 0
s_cbranch_scc1 .LBB0_5
s_clause 0x1
s_load_b32 s2, s[0:1], 0x34
s_load_b32 s8, s[0:1], 0x18
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v0, 0x3ff, v0
s_load_b128 s[4:7], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s3, s2, 16
s_and_b32 s2, s2, 0xffff
v_mad_u64_u32 v[2:3], null, s15, s3, v[1:2]
v_mad_u64_u32 v[3:4], null, s14, s2, v[0:1]
s_load_b64 s[2:3], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_lo_u32 v4, v2, s8
v_subrev_nc_u32_e32 v5, s9, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v0, v4, v3
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[6:7], 3, v[0:1]
v_mov_b32_e32 v0, 0
v_mov_b32_e32 v1, 0
v_add_co_u32 v2, vcc_lo, s4, v6
v_mov_b32_e32 v6, 0
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v7, vcc_lo
s_lshl_b32 s4, s9, 1
s_set_inst_prefetch_distance 0x1
s_branch .LBB0_3
.p2align 6
.LBB0_2:
s_or_b32 exec_lo, exec_lo, s0
v_add_nc_u32_e32 v5, 1, v5
s_add_i32 s4, s4, -1
global_store_b64 v[2:3], v[0:1], off
s_cmp_lg_u32 s4, -1
s_cbranch_scc0 .LBB0_5
.LBB0_3:
v_cmp_lt_i32_e32 vcc_lo, -1, v5
v_cmp_gt_i32_e64 s0, s8, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s1, vcc_lo, s0
s_and_saveexec_b32 s0, s1
s_cbranch_execz .LBB0_2
v_add_nc_u32_e32 v7, v4, v5
s_ashr_i32 s5, s4, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
s_lshl_b64 s[10:11], s[4:5], 3
s_waitcnt lgkmcnt(0)
s_add_u32 s10, s2, s10
v_ashrrev_i32_e32 v8, 31, v7
s_addc_u32 s11, s3, s11
v_lshlrev_b64 v[7:8], 3, v[7:8]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v7, vcc_lo, s6, v7
v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
global_load_b64 v[7:8], v[7:8], off
global_load_b64 v[9:10], v6, s[10:11]
s_waitcnt vmcnt(0)
v_fma_f64 v[0:1], v[7:8], v[9:10], v[0:1]
s_branch .LBB0_2
.LBB0_5:
s_set_inst_prefetch_distance 0x2
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z17convolutionRowGPUPdS_S_iii
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 296
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 11
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z17convolutionRowGPUPdS_S_iii, .Lfunc_end0-_Z17convolutionRowGPUPdS_S_iii
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 28
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: by_value
- .offset: 40
.size: 4
.value_kind: hidden_block_count_x
- .offset: 44
.size: 4
.value_kind: hidden_block_count_y
- .offset: 48
.size: 4
.value_kind: hidden_block_count_z
- .offset: 52
.size: 2
.value_kind: hidden_group_size_x
- .offset: 54
.size: 2
.value_kind: hidden_group_size_y
- .offset: 56
.size: 2
.value_kind: hidden_group_size_z
- .offset: 58
.size: 2
.value_kind: hidden_remainder_x
- .offset: 60
.size: 2
.value_kind: hidden_remainder_y
- .offset: 62
.size: 2
.value_kind: hidden_remainder_z
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 96
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 104
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 296
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z17convolutionRowGPUPdS_S_iii
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z17convolutionRowGPUPdS_S_iii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 11
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void convolutionRowGPU(double *h_Dst, double *h_Src, double *h_Filter, int imageW, int imageH, int filterR){
int k;
double sum = 0;
int ix = blockIdx.x * blockDim.x + threadIdx.x;
int iy = blockIdx.y * blockDim.y + threadIdx.y;
for (k = -filterR; k <= filterR; k++) {
int d = ix + k; //edw einai to pou tha paei to filtro gi auto elegxei apo katw kai an to d einia ektos oriwn eikonas
if (d >= 0 && d < imageW) {
sum += h_Src[iy * imageW + d] * h_Filter[filterR - k];
}
h_Dst[iy * imageW + ix] = sum;
}
} | .text
.file "convolutionRowGPU.hip"
.globl _Z32__device_stub__convolutionRowGPUPdS_S_iii # -- Begin function _Z32__device_stub__convolutionRowGPUPdS_S_iii
.p2align 4, 0x90
.type _Z32__device_stub__convolutionRowGPUPdS_S_iii,@function
_Z32__device_stub__convolutionRowGPUPdS_S_iii: # @_Z32__device_stub__convolutionRowGPUPdS_S_iii
.cfi_startproc
# %bb.0:
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 88(%rsp)
movq %rsi, 80(%rsp)
movq %rdx, 72(%rsp)
movl %ecx, 20(%rsp)
movl %r8d, 16(%rsp)
movl %r9d, 12(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
leaq 20(%rsp), %rax
movq %rax, 120(%rsp)
leaq 16(%rsp), %rax
movq %rax, 128(%rsp)
leaq 12(%rsp), %rax
movq %rax, 136(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z17convolutionRowGPUPdS_S_iii, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $168, %rsp
.cfi_adjust_cfa_offset -168
retq
.Lfunc_end0:
.size _Z32__device_stub__convolutionRowGPUPdS_S_iii, .Lfunc_end0-_Z32__device_stub__convolutionRowGPUPdS_S_iii
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z17convolutionRowGPUPdS_S_iii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z17convolutionRowGPUPdS_S_iii,@object # @_Z17convolutionRowGPUPdS_S_iii
.section .rodata,"a",@progbits
.globl _Z17convolutionRowGPUPdS_S_iii
.p2align 3, 0x0
_Z17convolutionRowGPUPdS_S_iii:
.quad _Z32__device_stub__convolutionRowGPUPdS_S_iii
.size _Z17convolutionRowGPUPdS_S_iii, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z17convolutionRowGPUPdS_S_iii"
.size .L__unnamed_1, 31
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z32__device_stub__convolutionRowGPUPdS_S_iii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z17convolutionRowGPUPdS_S_iii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000e845a_00000000-6_convolutionRowGPU.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z44__device_stub__Z17convolutionRowGPUPdS_S_iiiPdS_S_iii
.type _Z44__device_stub__Z17convolutionRowGPUPdS_S_iiiPdS_S_iii, @function
_Z44__device_stub__Z17convolutionRowGPUPdS_S_iiiPdS_S_iii:
.LFB2051:
.cfi_startproc
endbr64
subq $184, %rsp
.cfi_def_cfa_offset 192
movq %rdi, 40(%rsp)
movq %rsi, 32(%rsp)
movq %rdx, 24(%rsp)
movl %ecx, 20(%rsp)
movl %r8d, 16(%rsp)
movl %r9d, 12(%rsp)
movq %fs:40, %rax
movq %rax, 168(%rsp)
xorl %eax, %eax
leaq 40(%rsp), %rax
movq %rax, 112(%rsp)
leaq 32(%rsp), %rax
movq %rax, 120(%rsp)
leaq 24(%rsp), %rax
movq %rax, 128(%rsp)
leaq 20(%rsp), %rax
movq %rax, 136(%rsp)
leaq 16(%rsp), %rax
movq %rax, 144(%rsp)
leaq 12(%rsp), %rax
movq %rax, 152(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
leaq 56(%rsp), %rcx
leaq 48(%rsp), %rdx
leaq 76(%rsp), %rsi
leaq 64(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 168(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $184, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 56(%rsp)
.cfi_def_cfa_offset 200
pushq 56(%rsp)
.cfi_def_cfa_offset 208
leaq 128(%rsp), %r9
movq 92(%rsp), %rcx
movl 100(%rsp), %r8d
movq 80(%rsp), %rsi
movl 88(%rsp), %edx
leaq _Z17convolutionRowGPUPdS_S_iii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 192
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z44__device_stub__Z17convolutionRowGPUPdS_S_iiiPdS_S_iii, .-_Z44__device_stub__Z17convolutionRowGPUPdS_S_iiiPdS_S_iii
.globl _Z17convolutionRowGPUPdS_S_iii
.type _Z17convolutionRowGPUPdS_S_iii, @function
_Z17convolutionRowGPUPdS_S_iii:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z44__device_stub__Z17convolutionRowGPUPdS_S_iiiPdS_S_iii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z17convolutionRowGPUPdS_S_iii, .-_Z17convolutionRowGPUPdS_S_iii
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "_Z17convolutionRowGPUPdS_S_iii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z17convolutionRowGPUPdS_S_iii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "convolutionRowGPU.hip"
.globl _Z32__device_stub__convolutionRowGPUPdS_S_iii # -- Begin function _Z32__device_stub__convolutionRowGPUPdS_S_iii
.p2align 4, 0x90
.type _Z32__device_stub__convolutionRowGPUPdS_S_iii,@function
_Z32__device_stub__convolutionRowGPUPdS_S_iii: # @_Z32__device_stub__convolutionRowGPUPdS_S_iii
.cfi_startproc
# %bb.0:
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 88(%rsp)
movq %rsi, 80(%rsp)
movq %rdx, 72(%rsp)
movl %ecx, 20(%rsp)
movl %r8d, 16(%rsp)
movl %r9d, 12(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
leaq 20(%rsp), %rax
movq %rax, 120(%rsp)
leaq 16(%rsp), %rax
movq %rax, 128(%rsp)
leaq 12(%rsp), %rax
movq %rax, 136(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z17convolutionRowGPUPdS_S_iii, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $168, %rsp
.cfi_adjust_cfa_offset -168
retq
.Lfunc_end0:
.size _Z32__device_stub__convolutionRowGPUPdS_S_iii, .Lfunc_end0-_Z32__device_stub__convolutionRowGPUPdS_S_iii
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z17convolutionRowGPUPdS_S_iii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z17convolutionRowGPUPdS_S_iii,@object # @_Z17convolutionRowGPUPdS_S_iii
.section .rodata,"a",@progbits
.globl _Z17convolutionRowGPUPdS_S_iii
.p2align 3, 0x0
_Z17convolutionRowGPUPdS_S_iii:
.quad _Z32__device_stub__convolutionRowGPUPdS_S_iii
.size _Z17convolutionRowGPUPdS_S_iii, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z17convolutionRowGPUPdS_S_iii"
.size .L__unnamed_1, 31
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z32__device_stub__convolutionRowGPUPdS_S_iii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z17convolutionRowGPUPdS_S_iii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | //
// CrossCorrelation.cu
// CrossCorrelation
//
// Created by Vivek Sridhar on 29/06/17.
// Copyright © 2017 Vivek Sridhar. All rights reserved.
//
#include <iostream>
#include <fstream>
#include <sstream>
#include <vector>
#include <algorithm>
#include <stdio.h>
#include <stdlib.h>
#include <dirent.h>
template <typename T>
std::string to_string(const T& value) {
std::stringstream ss;
ss << value;
return ss.str();
}
long factorial(long val)
{
std::cout << val << "\n";
long result = 1;
for (long i = 1; i <= val; ++i)
{
result *= i;
}
return result;
}
long combination(long n, long r)
{
return (factorial(n)) / ((factorial(n - r)) * factorial(r));
}
__global__ void kernel(float *x1, float *y1, float *x2, float *y2, float *res, int tau, int na_frames, long nElements)
{
int index = blockIdx.x * blockDim.x + threadIdx.x;
if (tau < 0)
{
if (index >= -tau+na_frames)
{
res[index] = x1[index] * x2[index + tau] + y1[index] * y2[index + tau];
}
else res[index] = 0.0;
}
else
{
if (index < nElements - tau)
{
res[index] = x1[index] * x2[index + tau] + y1[index] * y2[index + tau];
}
else res[index] = 0.0;
}
}
// total measurement points in the time series is defined by nElements
#define M 1024 // number of threads per block
#define fps 10 // frames per second of input video (used to determine tau)
#define time 5 // time in seconds within which time delayed cross correlation is calculated (tau ranges from -time*fps to time*fps)
#define n_inds 10
int na_frames = 0; // number of frames in the start with nas
int scale = 1; // time window for analysis in seconds; varying this allows us to examine dynamics of leadership across varying timescales; setting scale larger than the entire time series or -1 gives aggregated statistics across the entire duration (otherwise, timescale of analysis is scale*fps)
//const int pairs = combination(n_inds, 2);
const bool aggregate = false; // this boolean decides whether you output a dynamic time variable leadership network or a static time aggregated network; scale is set to -1 if aggregate is true
std::ofstream outputFile1;
int main ()
{
DIR *dir;
FILE *pFile_x1; FILE *pFile_y1; FILE *pFile_x2; FILE *pFile_y2;
long lSize;
long nElements;
struct dirent *file;
float *d_x1, *d_y1, *d_x2, *d_y2, *d_res;
float *x1, *y1, *x2, *y2, *res;
size_t result_x1, result_y1, result_x2, result_y2;
if (aggregate) scale = -1;
std::vector<std::string> files;
std::string directory = "/home/user/Documents/Vivek/cuda/DirectionalCorrelation/Data/Input/pigeons/10_birds/ffA3/cross_correlation/";
dir = opendir(directory.c_str());
int idx = 0;
while ((file = readdir(dir)) != NULL)
{
if (file->d_name[0] == 'd')
{
files.push_back(file->d_name);
++idx;
}
}
std::sort(files.begin(), files.begin()+2*n_inds);
closedir(dir);
// Open output file
std::string filename_cc;
if (scale != -1) filename_cc = "cross_correlation_01.csv";
else filename_cc = "avgd_cross_correlation.csv";
outputFile1.open(filename_cc.c_str());
// Output file headers
if (aggregate || scale == -1) outputFile1 << "id1"<< ", " << "id2" << ", " << "tau" << ", " << "cc" << "\n";
else outputFile1 << "time" << ", " << "id1" << ", " << "id2" << ", " << "tau" << ", " << "cc" << "\n";
//files = {"dir_x00", "dir_x01", "dir_y00", "dir_y01"}
for (int a = 0; a < n_inds; ++a)
{
for (int b = 0; b < n_inds; ++b)
{
if (b != a)
{
pFile_x1 = fopen ((directory + files[a]).c_str(), "rb");
pFile_y1 = fopen ((directory + files[a+n_inds]).c_str(), "rb");
pFile_x2 = fopen ((directory + files[b]).c_str(), "rb");
pFile_y2 = fopen ((directory + files[b+n_inds]).c_str(), "rb");
if (pFile_x1==NULL || pFile_y1==NULL || pFile_x2==NULL || pFile_y2==NULL) { fputs ("File error",stderr); exit (1); }
// obtain file size
fseek (pFile_x1 , 0 , SEEK_END);
lSize = ftell (pFile_x1);
rewind (pFile_x1);
nElements = lSize / sizeof(float);
// allocate memory to contain the whole file
// device memory
cudaMalloc((void **) &d_x1, lSize);
cudaMalloc((void **) &d_y1, lSize);
cudaMalloc((void **) &d_x2, lSize);
cudaMalloc((void **) &d_y2, lSize);
cudaMalloc((void **) &d_res, lSize);
// host memory
x1 = (float*) malloc(lSize);
y1 = (float*) malloc(lSize);
x2 = (float*) malloc(lSize);
y2 = (float*) malloc(lSize);
res = (float*) malloc(lSize);
if (x1 == NULL || y1==NULL || x2==NULL || y2==NULL || res==NULL) { fputs ("Memory error",stderr); exit (2); }
// copy the file into the respective float pointers
result_x1 = fread (x1, sizeof(float), nElements, pFile_x1);
result_y1 = fread (y1, sizeof(float), nElements, pFile_y1);
result_x2 = fread (x2, sizeof(float), nElements, pFile_x2);
result_y2 = fread (y2, sizeof(float), nElements, pFile_y2);
if (result_x1 != nElements || result_y1 != nElements || result_x2 != nElements || result_y2 != nElements) { fputs ("Reading error",stderr); exit (3); }
// the whole files are now loaded in the memory x1, y1, x2 and y2 respectively
cudaMemcpy(d_x1, x1, lSize, cudaMemcpyHostToDevice);
cudaMemcpy(d_y1, y1, lSize, cudaMemcpyHostToDevice);
cudaMemcpy(d_x2, x2, lSize, cudaMemcpyHostToDevice);
cudaMemcpy(d_y2, y2, lSize, cudaMemcpyHostToDevice);
if (scale*fps > nElements) scale = -1;
int tau_max[nElements - scale*fps];
float res_tmp[nElements - scale*fps];
float res_max[nElements - scale*fps];
std::fill_n(tau_max, nElements - scale*fps, 0);
std::fill_n(res_tmp, nElements - scale*fps, 0.0);
std::fill_n(res_max, nElements - scale*fps, -1.0);
for (int tau = -time*fps; tau <= time*fps; ++tau)
{
kernel<<<(nElements + M - 1) / M, M>>>(d_x1, d_y1, d_x2, d_y2, d_res, tau, na_frames, nElements);
cudaMemcpy(res, d_res, lSize, cudaMemcpyDeviceToHost);
if (scale == -1)
{
float res_now = -1.0f;
for (int i = na_frames; i < nElements; ++i)
{
if (res[i] != res[i]) std::cout << x1[i] << " " << y1[i] << " " << i << " " << tau << "\n"; // if nans
res_now += res[i];
}
outputFile1 << (to_string(files[a][5])).c_str() << (to_string(files[a][6])).c_str() << (to_string(files[a][7])).c_str() << ", " << (to_string(files[b][5])).c_str() << (to_string(files[b][6])).c_str() << (to_string(files[b][7])).c_str() << ", " << tau << ", " << res_now / nElements << "\n";
}
else
{
std::fill_n(res_tmp, nElements - scale*fps, 0.0);
for (int i = na_frames; i < nElements - scale*fps; ++i)
{
for (int j = i; j < i + scale*fps; ++j)
{
res_tmp[i] += res[j];
if (j == i + scale*fps - 1 && res_max[i] < res_tmp[i]) { res_max[i] = res_tmp[i]; tau_max[i] = tau; }
}
}
}
}
if (scale != -1)
{
for (int t = 0; t < nElements - scale*fps; ++t)
{
outputFile1 << t + scale*fps/2 << ", " << (to_string(files[a][5])).c_str() << (to_string(files[a][6])).c_str() << (to_string(files[a][7])).c_str() << ", " << (to_string(files[b][5])).c_str() << (to_string(files[b][6])).c_str() << (to_string(files[b][7])).c_str() << ", " << tau_max[t] << ", " << res_max[t] / (scale*fps) << "\n";
}
}
fclose(pFile_x1);
fclose(pFile_x2);
fclose(pFile_y1);
fclose(pFile_y2);
cudaFree(d_x1); cudaFree(d_y1); cudaFree(d_x2); cudaFree(d_y2); cudaFree(d_res);
free(x1); free(y1); free(x2); free(y2);
}
}
}
// terminate
fclose(pFile_x1); fclose(pFile_y1); fclose(pFile_x2); fclose(pFile_y2);
return 0;
} | code for sm_80
Function : _Z6kernelPfS_S_S_S_iil
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e220000002500 */
/*0020*/ ISETP.LE.AND P0, PT, RZ, c[0x0][0x188], PT ; /* 0x00006200ff007a0c */
/* 0x000fe20003f03270 */
/*0030*/ ULDC.64 UR8, c[0x0][0x118] ; /* 0x0000460000087ab9 */
/* 0x000fe40000000a00 */
/*0040*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0050*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fd000078e0203 */
/*0060*/ @!P0 BRA 0x280 ; /* 0x0000021000008947 */
/* 0x000fea0003800000 */
/*0070*/ ULDC UR5, c[0x0][0x188] ; /* 0x0000620000057ab9 */
/* 0x000fe20000000800 */
/*0080*/ SHF.R.S32.HI R3, RZ, 0x1f, R0 ; /* 0x0000001fff037819 */
/* 0x000fe20000011400 */
/*0090*/ ULDC.64 UR6, c[0x0][0x190] ; /* 0x0000640000067ab9 */
/* 0x000fe40000000a00 */
/*00a0*/ USHF.R.S32.HI UR4, URZ, 0x1f, UR5 ; /* 0x0000001f3f047899 */
/* 0x000fe40008011405 */
/*00b0*/ UIADD3 UR5, UP0, -UR5, UR6, URZ ; /* 0x0000000605057290 */
/* 0x000fc8000ff1e13f */
/*00c0*/ UIADD3.X UR4, ~UR4, UR7, URZ, UP0, !UPT ; /* 0x0000000704047290 */
/* 0x000fe400087fe53f */
/*00d0*/ ISETP.LT.U32.AND P0, PT, R0, UR5, PT ; /* 0x0000000500007c0c */
/* 0x000fc8000bf01070 */
/*00e0*/ IMAD.U32 R2, RZ, RZ, UR4 ; /* 0x00000004ff027e24 */
/* 0x000fca000f8e00ff */
/*00f0*/ ISETP.GT.AND.EX P0, PT, R2, R3, PT, P0 ; /* 0x000000030200720c */
/* 0x000fda0003f04300 */
/*0100*/ @!P0 LEA R4, P1, R0, c[0x0][0x180], 0x2 ; /* 0x0000600000048a11 */
/* 0x000fc800078210ff */
/*0110*/ @!P0 LEA.HI.X R5, R0, c[0x0][0x184], R3, 0x2, P1 ; /* 0x0000610000058a11 */
/* 0x000fca00008f1403 */
/*0120*/ @!P0 STG.E [R4.64], RZ ; /* 0x000000ff04008986 */
/* 0x0001e2000c101908 */
/*0130*/ @!P0 EXIT ; /* 0x000000000000894d */
/* 0x000fea0003800000 */
/*0140*/ IMAD.SHL.U32 R10, R0.reuse, 0x4, RZ ; /* 0x00000004000a7824 */
/* 0x040fe200078e00ff */
/*0150*/ IADD3 R2, R0.reuse, c[0x0][0x188], RZ ; /* 0x0000620000027a10 */
/* 0x040fe20007ffe0ff */
/*0160*/ IMAD.MOV.U32 R7, RZ, RZ, 0x4 ; /* 0x00000004ff077424 */
/* 0x000fe200078e00ff */
/*0170*/ SHF.L.U64.HI R11, R0, 0x2, R3 ; /* 0x00000002000b7819 */
/* 0x000fe40000010203 */
/*0180*/ IADD3 R8, P1, R10, c[0x0][0x168], RZ ; /* 0x00005a000a087a10 */
/* 0x000fe20007f3e0ff */
/*0190*/ IMAD.WIDE R4, R2, R7.reuse, c[0x0][0x178] ; /* 0x00005e0002047625 */
/* 0x081fe200078e0207 */
/*01a0*/ IADD3 R6, P0, R10, c[0x0][0x160], RZ ; /* 0x000058000a067a10 */
/* 0x000fe40007f1e0ff */
/*01b0*/ IADD3.X R9, R11.reuse, c[0x0][0x16c], RZ, P1, !PT ; /* 0x00005b000b097a10 */
/* 0x040fe20000ffe4ff */
/*01c0*/ IMAD.WIDE R2, R2, R7, c[0x0][0x170] ; /* 0x00005c0002027625 */
/* 0x000fe200078e0207 */
/*01d0*/ IADD3.X R7, R11, c[0x0][0x164], RZ, P0, !PT ; /* 0x000059000b077a10 */
/* 0x000fe200007fe4ff */
/*01e0*/ LDG.E R4, [R4.64] ; /* 0x0000000804047981 */
/* 0x000ea8000c1e1900 */
/*01f0*/ LDG.E R9, [R8.64] ; /* 0x0000000808097981 */
/* 0x000ea8000c1e1900 */
/*0200*/ LDG.E R2, [R2.64] ; /* 0x0000000802027981 */
/* 0x000ee8000c1e1900 */
/*0210*/ LDG.E R7, [R6.64] ; /* 0x0000000806077981 */
/* 0x000ee2000c1e1900 */
/*0220*/ IADD3 R10, P0, R10, c[0x0][0x180], RZ ; /* 0x000060000a0a7a10 */
/* 0x000fc80007f1e0ff */
/*0230*/ IADD3.X R11, R11, c[0x0][0x184], RZ, P0, !PT ; /* 0x000061000b0b7a10 */
/* 0x000fe200007fe4ff */
/*0240*/ FMUL R0, R4, R9 ; /* 0x0000000904007220 */
/* 0x004fc80000400000 */
/*0250*/ FFMA R13, R2, R7, R0 ; /* 0x00000007020d7223 */
/* 0x008fca0000000000 */
/*0260*/ STG.E [R10.64], R13 ; /* 0x0000000d0a007986 */
/* 0x000fe2000c101908 */
/*0270*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0280*/ ULDC.64 UR4, c[0x0][0x188] ; /* 0x0000620000047ab9 */
/* 0x000fe20000000a00 */
/*0290*/ SHF.R.S32.HI R3, RZ, 0x1f, R0 ; /* 0x0000001fff037819 */
/* 0x000fe20000011400 */
/*02a0*/ UIADD3 UR4, -UR4, UR5, URZ ; /* 0x0000000504047290 */
/* 0x000fcc000fffe13f */
/*02b0*/ ISETP.GE.AND P0, PT, R0, UR4, PT ; /* 0x0000000400007c0c */
/* 0x000fda000bf06270 */
/*02c0*/ @!P0 BRA 0x410 ; /* 0x0000014000008947 */
/* 0x000fea0003800000 */
/*02d0*/ IMAD.SHL.U32 R10, R0.reuse, 0x4, RZ ; /* 0x00000004000a7824 */
/* 0x040fe200078e00ff */
/*02e0*/ IADD3 R2, R0.reuse, c[0x0][0x188], RZ ; /* 0x0000620000027a10 */
/* 0x040fe20007ffe0ff */
/*02f0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */
/* 0x000fe200078e00ff */
/*0300*/ SHF.L.U64.HI R11, R0, 0x2, R3 ; /* 0x00000002000b7819 */
/* 0x000fe40000010203 */
/*0310*/ IADD3 R8, P1, R10, c[0x0][0x168], RZ ; /* 0x00005a000a087a10 */
/* 0x000fe20007f3e0ff */
/*0320*/ IMAD.WIDE R6, R2, R5.reuse, c[0x0][0x178] ; /* 0x00005e0002067625 */
/* 0x080fe200078e0205 */
/*0330*/ IADD3 R4, P0, R10, c[0x0][0x160], RZ ; /* 0x000058000a047a10 */
/* 0x000fe40007f1e0ff */
/*0340*/ IADD3.X R9, R11.reuse, c[0x0][0x16c], RZ, P1, !PT ; /* 0x00005b000b097a10 */
/* 0x040fe20000ffe4ff */
/*0350*/ IMAD.WIDE R2, R2, R5, c[0x0][0x170] ; /* 0x00005c0002027625 */
/* 0x000fe200078e0205 */
/*0360*/ IADD3.X R5, R11, c[0x0][0x164], RZ, P0, !PT ; /* 0x000059000b057a10 */
/* 0x000fe200007fe4ff */
/*0370*/ LDG.E R6, [R6.64] ; /* 0x0000000806067981 */
/* 0x000ea8000c1e1900 */
/*0380*/ LDG.E R9, [R8.64] ; /* 0x0000000808097981 */
/* 0x000ea8000c1e1900 */
/*0390*/ LDG.E R2, [R2.64] ; /* 0x0000000802027981 */
/* 0x000ee8000c1e1900 */
/*03a0*/ LDG.E R5, [R4.64] ; /* 0x0000000804057981 */
/* 0x000ee2000c1e1900 */
/*03b0*/ IADD3 R10, P0, R10, c[0x0][0x180], RZ ; /* 0x000060000a0a7a10 */
/* 0x000fc80007f1e0ff */
/*03c0*/ IADD3.X R11, R11, c[0x0][0x184], RZ, P0, !PT ; /* 0x000061000b0b7a10 */
/* 0x000fe200007fe4ff */
/*03d0*/ FMUL R0, R6, R9 ; /* 0x0000000906007220 */
/* 0x004fc80000400000 */
/*03e0*/ FFMA R13, R2, R5, R0 ; /* 0x00000005020d7223 */
/* 0x008fca0000000000 */
/*03f0*/ STG.E [R10.64], R13 ; /* 0x0000000d0a007986 */
/* 0x000fe2000c101908 */
/*0400*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0410*/ LEA R2, P0, R0, c[0x0][0x180], 0x2 ; /* 0x0000600000027a11 */
/* 0x000fc800078010ff */
/*0420*/ LEA.HI.X R3, R0, c[0x0][0x184], R3, 0x2, P0 ; /* 0x0000610000037a11 */
/* 0x000fca00000f1403 */
/*0430*/ STG.E [R2.64], RZ ; /* 0x000000ff02007986 */
/* 0x000fe2000c101908 */
/*0440*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0450*/ BRA 0x450; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0460*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0470*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0480*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0490*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | //
// CrossCorrelation.cu
// CrossCorrelation
//
// Created by Vivek Sridhar on 29/06/17.
// Copyright © 2017 Vivek Sridhar. All rights reserved.
//
#include <iostream>
#include <fstream>
#include <sstream>
#include <vector>
#include <algorithm>
#include <stdio.h>
#include <stdlib.h>
#include <dirent.h>
template <typename T>
std::string to_string(const T& value) {
std::stringstream ss;
ss << value;
return ss.str();
}
long factorial(long val)
{
std::cout << val << "\n";
long result = 1;
for (long i = 1; i <= val; ++i)
{
result *= i;
}
return result;
}
long combination(long n, long r)
{
return (factorial(n)) / ((factorial(n - r)) * factorial(r));
}
__global__ void kernel(float *x1, float *y1, float *x2, float *y2, float *res, int tau, int na_frames, long nElements)
{
int index = blockIdx.x * blockDim.x + threadIdx.x;
if (tau < 0)
{
if (index >= -tau+na_frames)
{
res[index] = x1[index] * x2[index + tau] + y1[index] * y2[index + tau];
}
else res[index] = 0.0;
}
else
{
if (index < nElements - tau)
{
res[index] = x1[index] * x2[index + tau] + y1[index] * y2[index + tau];
}
else res[index] = 0.0;
}
}
// total measurement points in the time series is defined by nElements
#define M 1024 // number of threads per block
#define fps 10 // frames per second of input video (used to determine tau)
#define time 5 // time in seconds within which time delayed cross correlation is calculated (tau ranges from -time*fps to time*fps)
#define n_inds 10
int na_frames = 0; // number of frames in the start with nas
int scale = 1; // time window for analysis in seconds; varying this allows us to examine dynamics of leadership across varying timescales; setting scale larger than the entire time series or -1 gives aggregated statistics across the entire duration (otherwise, timescale of analysis is scale*fps)
//const int pairs = combination(n_inds, 2);
const bool aggregate = false; // this boolean decides whether you output a dynamic time variable leadership network or a static time aggregated network; scale is set to -1 if aggregate is true
std::ofstream outputFile1;
int main ()
{
DIR *dir;
FILE *pFile_x1; FILE *pFile_y1; FILE *pFile_x2; FILE *pFile_y2;
long lSize;
long nElements;
struct dirent *file;
float *d_x1, *d_y1, *d_x2, *d_y2, *d_res;
float *x1, *y1, *x2, *y2, *res;
size_t result_x1, result_y1, result_x2, result_y2;
if (aggregate) scale = -1;
std::vector<std::string> files;
std::string directory = "/home/user/Documents/Vivek/cuda/DirectionalCorrelation/Data/Input/pigeons/10_birds/ffA3/cross_correlation/";
dir = opendir(directory.c_str());
int idx = 0;
while ((file = readdir(dir)) != NULL)
{
if (file->d_name[0] == 'd')
{
files.push_back(file->d_name);
++idx;
}
}
std::sort(files.begin(), files.begin()+2*n_inds);
closedir(dir);
// Open output file
std::string filename_cc;
if (scale != -1) filename_cc = "cross_correlation_01.csv";
else filename_cc = "avgd_cross_correlation.csv";
outputFile1.open(filename_cc.c_str());
// Output file headers
if (aggregate || scale == -1) outputFile1 << "id1"<< ", " << "id2" << ", " << "tau" << ", " << "cc" << "\n";
else outputFile1 << "time" << ", " << "id1" << ", " << "id2" << ", " << "tau" << ", " << "cc" << "\n";
//files = {"dir_x00", "dir_x01", "dir_y00", "dir_y01"}
for (int a = 0; a < n_inds; ++a)
{
for (int b = 0; b < n_inds; ++b)
{
if (b != a)
{
pFile_x1 = fopen ((directory + files[a]).c_str(), "rb");
pFile_y1 = fopen ((directory + files[a+n_inds]).c_str(), "rb");
pFile_x2 = fopen ((directory + files[b]).c_str(), "rb");
pFile_y2 = fopen ((directory + files[b+n_inds]).c_str(), "rb");
if (pFile_x1==NULL || pFile_y1==NULL || pFile_x2==NULL || pFile_y2==NULL) { fputs ("File error",stderr); exit (1); }
// obtain file size
fseek (pFile_x1 , 0 , SEEK_END);
lSize = ftell (pFile_x1);
rewind (pFile_x1);
nElements = lSize / sizeof(float);
// allocate memory to contain the whole file
// device memory
cudaMalloc((void **) &d_x1, lSize);
cudaMalloc((void **) &d_y1, lSize);
cudaMalloc((void **) &d_x2, lSize);
cudaMalloc((void **) &d_y2, lSize);
cudaMalloc((void **) &d_res, lSize);
// host memory
x1 = (float*) malloc(lSize);
y1 = (float*) malloc(lSize);
x2 = (float*) malloc(lSize);
y2 = (float*) malloc(lSize);
res = (float*) malloc(lSize);
if (x1 == NULL || y1==NULL || x2==NULL || y2==NULL || res==NULL) { fputs ("Memory error",stderr); exit (2); }
// copy the file into the respective float pointers
result_x1 = fread (x1, sizeof(float), nElements, pFile_x1);
result_y1 = fread (y1, sizeof(float), nElements, pFile_y1);
result_x2 = fread (x2, sizeof(float), nElements, pFile_x2);
result_y2 = fread (y2, sizeof(float), nElements, pFile_y2);
if (result_x1 != nElements || result_y1 != nElements || result_x2 != nElements || result_y2 != nElements) { fputs ("Reading error",stderr); exit (3); }
// the whole files are now loaded in the memory x1, y1, x2 and y2 respectively
cudaMemcpy(d_x1, x1, lSize, cudaMemcpyHostToDevice);
cudaMemcpy(d_y1, y1, lSize, cudaMemcpyHostToDevice);
cudaMemcpy(d_x2, x2, lSize, cudaMemcpyHostToDevice);
cudaMemcpy(d_y2, y2, lSize, cudaMemcpyHostToDevice);
if (scale*fps > nElements) scale = -1;
int tau_max[nElements - scale*fps];
float res_tmp[nElements - scale*fps];
float res_max[nElements - scale*fps];
std::fill_n(tau_max, nElements - scale*fps, 0);
std::fill_n(res_tmp, nElements - scale*fps, 0.0);
std::fill_n(res_max, nElements - scale*fps, -1.0);
for (int tau = -time*fps; tau <= time*fps; ++tau)
{
kernel<<<(nElements + M - 1) / M, M>>>(d_x1, d_y1, d_x2, d_y2, d_res, tau, na_frames, nElements);
cudaMemcpy(res, d_res, lSize, cudaMemcpyDeviceToHost);
if (scale == -1)
{
float res_now = -1.0f;
for (int i = na_frames; i < nElements; ++i)
{
if (res[i] != res[i]) std::cout << x1[i] << " " << y1[i] << " " << i << " " << tau << "\n"; // if nans
res_now += res[i];
}
outputFile1 << (to_string(files[a][5])).c_str() << (to_string(files[a][6])).c_str() << (to_string(files[a][7])).c_str() << ", " << (to_string(files[b][5])).c_str() << (to_string(files[b][6])).c_str() << (to_string(files[b][7])).c_str() << ", " << tau << ", " << res_now / nElements << "\n";
}
else
{
std::fill_n(res_tmp, nElements - scale*fps, 0.0);
for (int i = na_frames; i < nElements - scale*fps; ++i)
{
for (int j = i; j < i + scale*fps; ++j)
{
res_tmp[i] += res[j];
if (j == i + scale*fps - 1 && res_max[i] < res_tmp[i]) { res_max[i] = res_tmp[i]; tau_max[i] = tau; }
}
}
}
}
if (scale != -1)
{
for (int t = 0; t < nElements - scale*fps; ++t)
{
outputFile1 << t + scale*fps/2 << ", " << (to_string(files[a][5])).c_str() << (to_string(files[a][6])).c_str() << (to_string(files[a][7])).c_str() << ", " << (to_string(files[b][5])).c_str() << (to_string(files[b][6])).c_str() << (to_string(files[b][7])).c_str() << ", " << tau_max[t] << ", " << res_max[t] / (scale*fps) << "\n";
}
}
fclose(pFile_x1);
fclose(pFile_x2);
fclose(pFile_y1);
fclose(pFile_y2);
cudaFree(d_x1); cudaFree(d_y1); cudaFree(d_x2); cudaFree(d_y2); cudaFree(d_res);
free(x1); free(y1); free(x2); free(y2);
}
}
}
// terminate
fclose(pFile_x1); fclose(pFile_y1); fclose(pFile_x2); fclose(pFile_y2);
return 0;
} | //
// CrossCorrelation.cu
// CrossCorrelation
//
// Created by Vivek Sridhar on 29/06/17.
// Copyright © 2017 Vivek Sridhar. All rights reserved.
//
#include <hip/hip_runtime.h>
#include <iostream>
#include <fstream>
#include <sstream>
#include <vector>
#include <algorithm>
#include <stdio.h>
#include <stdlib.h>
#include <dirent.h>
template <typename T>
std::string to_string(const T& value) {
std::stringstream ss;
ss << value;
return ss.str();
}
long factorial(long val)
{
std::cout << val << "\n";
long result = 1;
for (long i = 1; i <= val; ++i)
{
result *= i;
}
return result;
}
long combination(long n, long r)
{
return (factorial(n)) / ((factorial(n - r)) * factorial(r));
}
__global__ void kernel(float *x1, float *y1, float *x2, float *y2, float *res, int tau, int na_frames, long nElements)
{
int index = blockIdx.x * blockDim.x + threadIdx.x;
if (tau < 0)
{
if (index >= -tau+na_frames)
{
res[index] = x1[index] * x2[index + tau] + y1[index] * y2[index + tau];
}
else res[index] = 0.0;
}
else
{
if (index < nElements - tau)
{
res[index] = x1[index] * x2[index + tau] + y1[index] * y2[index + tau];
}
else res[index] = 0.0;
}
}
// total measurement points in the time series is defined by nElements
#define M 1024 // number of threads per block
#define fps 10 // frames per second of input video (used to determine tau)
#define time 5 // time in seconds within which time delayed cross correlation is calculated (tau ranges from -time*fps to time*fps)
#define n_inds 10
int na_frames = 0; // number of frames in the start with nas
int scale = 1; // time window for analysis in seconds; varying this allows us to examine dynamics of leadership across varying timescales; setting scale larger than the entire time series or -1 gives aggregated statistics across the entire duration (otherwise, timescale of analysis is scale*fps)
//const int pairs = combination(n_inds, 2);
const bool aggregate = false; // this boolean decides whether you output a dynamic time variable leadership network or a static time aggregated network; scale is set to -1 if aggregate is true
std::ofstream outputFile1;
int main ()
{
DIR *dir;
FILE *pFile_x1; FILE *pFile_y1; FILE *pFile_x2; FILE *pFile_y2;
long lSize;
long nElements;
struct dirent *file;
float *d_x1, *d_y1, *d_x2, *d_y2, *d_res;
float *x1, *y1, *x2, *y2, *res;
size_t result_x1, result_y1, result_x2, result_y2;
if (aggregate) scale = -1;
std::vector<std::string> files;
std::string directory = "/home/user/Documents/Vivek/cuda/DirectionalCorrelation/Data/Input/pigeons/10_birds/ffA3/cross_correlation/";
dir = opendir(directory.c_str());
int idx = 0;
while ((file = readdir(dir)) != NULL)
{
if (file->d_name[0] == 'd')
{
files.push_back(file->d_name);
++idx;
}
}
std::sort(files.begin(), files.begin()+2*n_inds);
closedir(dir);
// Open output file
std::string filename_cc;
if (scale != -1) filename_cc = "cross_correlation_01.csv";
else filename_cc = "avgd_cross_correlation.csv";
outputFile1.open(filename_cc.c_str());
// Output file headers
if (aggregate || scale == -1) outputFile1 << "id1"<< ", " << "id2" << ", " << "tau" << ", " << "cc" << "\n";
else outputFile1 << "time" << ", " << "id1" << ", " << "id2" << ", " << "tau" << ", " << "cc" << "\n";
//files = {"dir_x00", "dir_x01", "dir_y00", "dir_y01"}
for (int a = 0; a < n_inds; ++a)
{
for (int b = 0; b < n_inds; ++b)
{
if (b != a)
{
pFile_x1 = fopen ((directory + files[a]).c_str(), "rb");
pFile_y1 = fopen ((directory + files[a+n_inds]).c_str(), "rb");
pFile_x2 = fopen ((directory + files[b]).c_str(), "rb");
pFile_y2 = fopen ((directory + files[b+n_inds]).c_str(), "rb");
if (pFile_x1==NULL || pFile_y1==NULL || pFile_x2==NULL || pFile_y2==NULL) { fputs ("File error",stderr); exit (1); }
// obtain file size
fseek (pFile_x1 , 0 , SEEK_END);
lSize = ftell (pFile_x1);
rewind (pFile_x1);
nElements = lSize / sizeof(float);
// allocate memory to contain the whole file
// device memory
hipMalloc((void **) &d_x1, lSize);
hipMalloc((void **) &d_y1, lSize);
hipMalloc((void **) &d_x2, lSize);
hipMalloc((void **) &d_y2, lSize);
hipMalloc((void **) &d_res, lSize);
// host memory
x1 = (float*) malloc(lSize);
y1 = (float*) malloc(lSize);
x2 = (float*) malloc(lSize);
y2 = (float*) malloc(lSize);
res = (float*) malloc(lSize);
if (x1 == NULL || y1==NULL || x2==NULL || y2==NULL || res==NULL) { fputs ("Memory error",stderr); exit (2); }
// copy the file into the respective float pointers
result_x1 = fread (x1, sizeof(float), nElements, pFile_x1);
result_y1 = fread (y1, sizeof(float), nElements, pFile_y1);
result_x2 = fread (x2, sizeof(float), nElements, pFile_x2);
result_y2 = fread (y2, sizeof(float), nElements, pFile_y2);
if (result_x1 != nElements || result_y1 != nElements || result_x2 != nElements || result_y2 != nElements) { fputs ("Reading error",stderr); exit (3); }
// the whole files are now loaded in the memory x1, y1, x2 and y2 respectively
hipMemcpy(d_x1, x1, lSize, hipMemcpyHostToDevice);
hipMemcpy(d_y1, y1, lSize, hipMemcpyHostToDevice);
hipMemcpy(d_x2, x2, lSize, hipMemcpyHostToDevice);
hipMemcpy(d_y2, y2, lSize, hipMemcpyHostToDevice);
if (scale*fps > nElements) scale = -1;
int tau_max[nElements - scale*fps];
float res_tmp[nElements - scale*fps];
float res_max[nElements - scale*fps];
std::fill_n(tau_max, nElements - scale*fps, 0);
std::fill_n(res_tmp, nElements - scale*fps, 0.0);
std::fill_n(res_max, nElements - scale*fps, -1.0);
for (int tau = -time*fps; tau <= time*fps; ++tau)
{
kernel<<<(nElements + M - 1) / M, M>>>(d_x1, d_y1, d_x2, d_y2, d_res, tau, na_frames, nElements);
hipMemcpy(res, d_res, lSize, hipMemcpyDeviceToHost);
if (scale == -1)
{
float res_now = -1.0f;
for (int i = na_frames; i < nElements; ++i)
{
if (res[i] != res[i]) std::cout << x1[i] << " " << y1[i] << " " << i << " " << tau << "\n"; // if nans
res_now += res[i];
}
outputFile1 << (to_string(files[a][5])).c_str() << (to_string(files[a][6])).c_str() << (to_string(files[a][7])).c_str() << ", " << (to_string(files[b][5])).c_str() << (to_string(files[b][6])).c_str() << (to_string(files[b][7])).c_str() << ", " << tau << ", " << res_now / nElements << "\n";
}
else
{
std::fill_n(res_tmp, nElements - scale*fps, 0.0);
for (int i = na_frames; i < nElements - scale*fps; ++i)
{
for (int j = i; j < i + scale*fps; ++j)
{
res_tmp[i] += res[j];
if (j == i + scale*fps - 1 && res_max[i] < res_tmp[i]) { res_max[i] = res_tmp[i]; tau_max[i] = tau; }
}
}
}
}
if (scale != -1)
{
for (int t = 0; t < nElements - scale*fps; ++t)
{
outputFile1 << t + scale*fps/2 << ", " << (to_string(files[a][5])).c_str() << (to_string(files[a][6])).c_str() << (to_string(files[a][7])).c_str() << ", " << (to_string(files[b][5])).c_str() << (to_string(files[b][6])).c_str() << (to_string(files[b][7])).c_str() << ", " << tau_max[t] << ", " << res_max[t] / (scale*fps) << "\n";
}
}
fclose(pFile_x1);
fclose(pFile_x2);
fclose(pFile_y1);
fclose(pFile_y2);
hipFree(d_x1); hipFree(d_y1); hipFree(d_x2); hipFree(d_y2); hipFree(d_res);
free(x1); free(y1); free(x2); free(y2);
}
}
}
// terminate
fclose(pFile_x1); fclose(pFile_y1); fclose(pFile_x2); fclose(pFile_y2);
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | //
// CrossCorrelation.cu
// CrossCorrelation
//
// Created by Vivek Sridhar on 29/06/17.
// Copyright © 2017 Vivek Sridhar. All rights reserved.
//
#include <hip/hip_runtime.h>
#include <iostream>
#include <fstream>
#include <sstream>
#include <vector>
#include <algorithm>
#include <stdio.h>
#include <stdlib.h>
#include <dirent.h>
template <typename T>
std::string to_string(const T& value) {
std::stringstream ss;
ss << value;
return ss.str();
}
long factorial(long val)
{
std::cout << val << "\n";
long result = 1;
for (long i = 1; i <= val; ++i)
{
result *= i;
}
return result;
}
long combination(long n, long r)
{
return (factorial(n)) / ((factorial(n - r)) * factorial(r));
}
__global__ void kernel(float *x1, float *y1, float *x2, float *y2, float *res, int tau, int na_frames, long nElements)
{
int index = blockIdx.x * blockDim.x + threadIdx.x;
if (tau < 0)
{
if (index >= -tau+na_frames)
{
res[index] = x1[index] * x2[index + tau] + y1[index] * y2[index + tau];
}
else res[index] = 0.0;
}
else
{
if (index < nElements - tau)
{
res[index] = x1[index] * x2[index + tau] + y1[index] * y2[index + tau];
}
else res[index] = 0.0;
}
}
// total measurement points in the time series is defined by nElements
#define M 1024 // number of threads per block
#define fps 10 // frames per second of input video (used to determine tau)
#define time 5 // time in seconds within which time delayed cross correlation is calculated (tau ranges from -time*fps to time*fps)
#define n_inds 10
int na_frames = 0; // number of frames in the start with nas
int scale = 1; // time window for analysis in seconds; varying this allows us to examine dynamics of leadership across varying timescales; setting scale larger than the entire time series or -1 gives aggregated statistics across the entire duration (otherwise, timescale of analysis is scale*fps)
//const int pairs = combination(n_inds, 2);
const bool aggregate = false; // this boolean decides whether you output a dynamic time variable leadership network or a static time aggregated network; scale is set to -1 if aggregate is true
std::ofstream outputFile1;
int main ()
{
DIR *dir;
FILE *pFile_x1; FILE *pFile_y1; FILE *pFile_x2; FILE *pFile_y2;
long lSize;
long nElements;
struct dirent *file;
float *d_x1, *d_y1, *d_x2, *d_y2, *d_res;
float *x1, *y1, *x2, *y2, *res;
size_t result_x1, result_y1, result_x2, result_y2;
if (aggregate) scale = -1;
std::vector<std::string> files;
std::string directory = "/home/user/Documents/Vivek/cuda/DirectionalCorrelation/Data/Input/pigeons/10_birds/ffA3/cross_correlation/";
dir = opendir(directory.c_str());
int idx = 0;
while ((file = readdir(dir)) != NULL)
{
if (file->d_name[0] == 'd')
{
files.push_back(file->d_name);
++idx;
}
}
std::sort(files.begin(), files.begin()+2*n_inds);
closedir(dir);
// Open output file
std::string filename_cc;
if (scale != -1) filename_cc = "cross_correlation_01.csv";
else filename_cc = "avgd_cross_correlation.csv";
outputFile1.open(filename_cc.c_str());
// Output file headers
if (aggregate || scale == -1) outputFile1 << "id1"<< ", " << "id2" << ", " << "tau" << ", " << "cc" << "\n";
else outputFile1 << "time" << ", " << "id1" << ", " << "id2" << ", " << "tau" << ", " << "cc" << "\n";
//files = {"dir_x00", "dir_x01", "dir_y00", "dir_y01"}
for (int a = 0; a < n_inds; ++a)
{
for (int b = 0; b < n_inds; ++b)
{
if (b != a)
{
pFile_x1 = fopen ((directory + files[a]).c_str(), "rb");
pFile_y1 = fopen ((directory + files[a+n_inds]).c_str(), "rb");
pFile_x2 = fopen ((directory + files[b]).c_str(), "rb");
pFile_y2 = fopen ((directory + files[b+n_inds]).c_str(), "rb");
if (pFile_x1==NULL || pFile_y1==NULL || pFile_x2==NULL || pFile_y2==NULL) { fputs ("File error",stderr); exit (1); }
// obtain file size
fseek (pFile_x1 , 0 , SEEK_END);
lSize = ftell (pFile_x1);
rewind (pFile_x1);
nElements = lSize / sizeof(float);
// allocate memory to contain the whole file
// device memory
hipMalloc((void **) &d_x1, lSize);
hipMalloc((void **) &d_y1, lSize);
hipMalloc((void **) &d_x2, lSize);
hipMalloc((void **) &d_y2, lSize);
hipMalloc((void **) &d_res, lSize);
// host memory
x1 = (float*) malloc(lSize);
y1 = (float*) malloc(lSize);
x2 = (float*) malloc(lSize);
y2 = (float*) malloc(lSize);
res = (float*) malloc(lSize);
if (x1 == NULL || y1==NULL || x2==NULL || y2==NULL || res==NULL) { fputs ("Memory error",stderr); exit (2); }
// copy the file into the respective float pointers
result_x1 = fread (x1, sizeof(float), nElements, pFile_x1);
result_y1 = fread (y1, sizeof(float), nElements, pFile_y1);
result_x2 = fread (x2, sizeof(float), nElements, pFile_x2);
result_y2 = fread (y2, sizeof(float), nElements, pFile_y2);
if (result_x1 != nElements || result_y1 != nElements || result_x2 != nElements || result_y2 != nElements) { fputs ("Reading error",stderr); exit (3); }
// the whole files are now loaded in the memory x1, y1, x2 and y2 respectively
hipMemcpy(d_x1, x1, lSize, hipMemcpyHostToDevice);
hipMemcpy(d_y1, y1, lSize, hipMemcpyHostToDevice);
hipMemcpy(d_x2, x2, lSize, hipMemcpyHostToDevice);
hipMemcpy(d_y2, y2, lSize, hipMemcpyHostToDevice);
if (scale*fps > nElements) scale = -1;
int tau_max[nElements - scale*fps];
float res_tmp[nElements - scale*fps];
float res_max[nElements - scale*fps];
std::fill_n(tau_max, nElements - scale*fps, 0);
std::fill_n(res_tmp, nElements - scale*fps, 0.0);
std::fill_n(res_max, nElements - scale*fps, -1.0);
for (int tau = -time*fps; tau <= time*fps; ++tau)
{
kernel<<<(nElements + M - 1) / M, M>>>(d_x1, d_y1, d_x2, d_y2, d_res, tau, na_frames, nElements);
hipMemcpy(res, d_res, lSize, hipMemcpyDeviceToHost);
if (scale == -1)
{
float res_now = -1.0f;
for (int i = na_frames; i < nElements; ++i)
{
if (res[i] != res[i]) std::cout << x1[i] << " " << y1[i] << " " << i << " " << tau << "\n"; // if nans
res_now += res[i];
}
outputFile1 << (to_string(files[a][5])).c_str() << (to_string(files[a][6])).c_str() << (to_string(files[a][7])).c_str() << ", " << (to_string(files[b][5])).c_str() << (to_string(files[b][6])).c_str() << (to_string(files[b][7])).c_str() << ", " << tau << ", " << res_now / nElements << "\n";
}
else
{
std::fill_n(res_tmp, nElements - scale*fps, 0.0);
for (int i = na_frames; i < nElements - scale*fps; ++i)
{
for (int j = i; j < i + scale*fps; ++j)
{
res_tmp[i] += res[j];
if (j == i + scale*fps - 1 && res_max[i] < res_tmp[i]) { res_max[i] = res_tmp[i]; tau_max[i] = tau; }
}
}
}
}
if (scale != -1)
{
for (int t = 0; t < nElements - scale*fps; ++t)
{
outputFile1 << t + scale*fps/2 << ", " << (to_string(files[a][5])).c_str() << (to_string(files[a][6])).c_str() << (to_string(files[a][7])).c_str() << ", " << (to_string(files[b][5])).c_str() << (to_string(files[b][6])).c_str() << (to_string(files[b][7])).c_str() << ", " << tau_max[t] << ", " << res_max[t] / (scale*fps) << "\n";
}
}
fclose(pFile_x1);
fclose(pFile_x2);
fclose(pFile_y1);
fclose(pFile_y2);
hipFree(d_x1); hipFree(d_y1); hipFree(d_x2); hipFree(d_y2); hipFree(d_res);
free(x1); free(y1); free(x2); free(y2);
}
}
}
// terminate
fclose(pFile_x1); fclose(pFile_y1); fclose(pFile_x2); fclose(pFile_y2);
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6kernelPfS_S_S_S_iil
.globl _Z6kernelPfS_S_S_S_iil
.p2align 8
.type _Z6kernelPfS_S_S_S_iil,@function
_Z6kernelPfS_S_S_S_iil:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x44
s_load_b32 s2, s[0:1], 0x28
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s3, 0xffff
s_cmp_gt_i32 s2, -1
v_mad_u64_u32 v[1:2], null, s15, s3, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_ashrrev_i32_e32 v2, 31, v1
s_cbranch_scc0 .LBB0_2
s_load_b64 s[4:5], s[0:1], 0x30
s_mov_b32 s3, 0
s_waitcnt lgkmcnt(0)
s_sub_u32 s4, s4, s2
s_subb_u32 s5, s5, 0
s_delay_alu instid0(SALU_CYCLE_1)
v_cmp_gt_i64_e32 vcc_lo, s[4:5], v[1:2]
s_and_b32 s4, vcc_lo, exec_lo
s_cbranch_execz .LBB0_3
s_branch .LBB0_4
.LBB0_2:
s_mov_b32 s3, -1
s_mov_b32 s4, 0
.LBB0_3:
s_load_b32 s3, s[0:1], 0x2c
s_and_not1_b32 s4, s4, exec_lo
s_waitcnt lgkmcnt(0)
s_sub_i32 s3, s3, s2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
v_cmp_le_i32_e32 vcc_lo, s3, v1
s_mov_b32 s3, 0
s_and_b32 s5, vcc_lo, exec_lo
s_or_b32 s4, s4, s5
.LBB0_4:
v_mov_b32_e32 v0, s3
s_and_saveexec_b32 s3, s4
s_cbranch_execz .LBB0_6
s_load_b256 s[4:11], s[0:1], 0x0
v_add_nc_u32_e32 v3, s2, v1
v_lshlrev_b64 v[5:6], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v4, 31, v3
v_lshlrev_b64 v[3:4], 2, v[3:4]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v7, vcc_lo, s4, v5
v_add_co_ci_u32_e32 v8, vcc_lo, s5, v6, vcc_lo
v_add_co_u32 v5, vcc_lo, s6, v5
v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
v_add_co_u32 v9, vcc_lo, s10, v3
v_add_co_ci_u32_e32 v10, vcc_lo, s11, v4, vcc_lo
v_add_co_u32 v3, vcc_lo, s8, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo
global_load_b32 v0, v[5:6], off
global_load_b32 v5, v[9:10], off
global_load_b32 v6, v[7:8], off
global_load_b32 v3, v[3:4], off
s_waitcnt vmcnt(2)
v_mul_f32_e32 v0, v0, v5
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_fmac_f32_e32 v0, v6, v3
.LBB0_6:
s_or_b32 exec_lo, exec_lo, s3
s_load_b64 s[0:1], s[0:1], 0x20
v_lshlrev_b64 v[1:2], 2, v[1:2]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v1, vcc_lo, s0, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
global_store_b32 v[1:2], v0, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z6kernelPfS_S_S_S_iil
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 312
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 11
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z6kernelPfS_S_S_S_iil, .Lfunc_end0-_Z6kernelPfS_S_S_S_iil
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 24
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 32
.size: 8
.value_kind: global_buffer
- .offset: 40
.size: 4
.value_kind: by_value
- .offset: 44
.size: 4
.value_kind: by_value
- .offset: 48
.size: 8
.value_kind: by_value
- .offset: 56
.size: 4
.value_kind: hidden_block_count_x
- .offset: 60
.size: 4
.value_kind: hidden_block_count_y
- .offset: 64
.size: 4
.value_kind: hidden_block_count_z
- .offset: 68
.size: 2
.value_kind: hidden_group_size_x
- .offset: 70
.size: 2
.value_kind: hidden_group_size_y
- .offset: 72
.size: 2
.value_kind: hidden_group_size_z
- .offset: 74
.size: 2
.value_kind: hidden_remainder_x
- .offset: 76
.size: 2
.value_kind: hidden_remainder_y
- .offset: 78
.size: 2
.value_kind: hidden_remainder_z
- .offset: 96
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 104
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 112
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 120
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 312
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z6kernelPfS_S_S_S_iil
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z6kernelPfS_S_S_S_iil.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 11
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z6kernelPfS_S_S_S_iil
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e220000002500 */
/*0020*/ ISETP.LE.AND P0, PT, RZ, c[0x0][0x188], PT ; /* 0x00006200ff007a0c */
/* 0x000fe20003f03270 */
/*0030*/ ULDC.64 UR8, c[0x0][0x118] ; /* 0x0000460000087ab9 */
/* 0x000fe40000000a00 */
/*0040*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0050*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fd000078e0203 */
/*0060*/ @!P0 BRA 0x280 ; /* 0x0000021000008947 */
/* 0x000fea0003800000 */
/*0070*/ ULDC UR5, c[0x0][0x188] ; /* 0x0000620000057ab9 */
/* 0x000fe20000000800 */
/*0080*/ SHF.R.S32.HI R3, RZ, 0x1f, R0 ; /* 0x0000001fff037819 */
/* 0x000fe20000011400 */
/*0090*/ ULDC.64 UR6, c[0x0][0x190] ; /* 0x0000640000067ab9 */
/* 0x000fe40000000a00 */
/*00a0*/ USHF.R.S32.HI UR4, URZ, 0x1f, UR5 ; /* 0x0000001f3f047899 */
/* 0x000fe40008011405 */
/*00b0*/ UIADD3 UR5, UP0, -UR5, UR6, URZ ; /* 0x0000000605057290 */
/* 0x000fc8000ff1e13f */
/*00c0*/ UIADD3.X UR4, ~UR4, UR7, URZ, UP0, !UPT ; /* 0x0000000704047290 */
/* 0x000fe400087fe53f */
/*00d0*/ ISETP.LT.U32.AND P0, PT, R0, UR5, PT ; /* 0x0000000500007c0c */
/* 0x000fc8000bf01070 */
/*00e0*/ IMAD.U32 R2, RZ, RZ, UR4 ; /* 0x00000004ff027e24 */
/* 0x000fca000f8e00ff */
/*00f0*/ ISETP.GT.AND.EX P0, PT, R2, R3, PT, P0 ; /* 0x000000030200720c */
/* 0x000fda0003f04300 */
/*0100*/ @!P0 LEA R4, P1, R0, c[0x0][0x180], 0x2 ; /* 0x0000600000048a11 */
/* 0x000fc800078210ff */
/*0110*/ @!P0 LEA.HI.X R5, R0, c[0x0][0x184], R3, 0x2, P1 ; /* 0x0000610000058a11 */
/* 0x000fca00008f1403 */
/*0120*/ @!P0 STG.E [R4.64], RZ ; /* 0x000000ff04008986 */
/* 0x0001e2000c101908 */
/*0130*/ @!P0 EXIT ; /* 0x000000000000894d */
/* 0x000fea0003800000 */
/*0140*/ IMAD.SHL.U32 R10, R0.reuse, 0x4, RZ ; /* 0x00000004000a7824 */
/* 0x040fe200078e00ff */
/*0150*/ IADD3 R2, R0.reuse, c[0x0][0x188], RZ ; /* 0x0000620000027a10 */
/* 0x040fe20007ffe0ff */
/*0160*/ IMAD.MOV.U32 R7, RZ, RZ, 0x4 ; /* 0x00000004ff077424 */
/* 0x000fe200078e00ff */
/*0170*/ SHF.L.U64.HI R11, R0, 0x2, R3 ; /* 0x00000002000b7819 */
/* 0x000fe40000010203 */
/*0180*/ IADD3 R8, P1, R10, c[0x0][0x168], RZ ; /* 0x00005a000a087a10 */
/* 0x000fe20007f3e0ff */
/*0190*/ IMAD.WIDE R4, R2, R7.reuse, c[0x0][0x178] ; /* 0x00005e0002047625 */
/* 0x081fe200078e0207 */
/*01a0*/ IADD3 R6, P0, R10, c[0x0][0x160], RZ ; /* 0x000058000a067a10 */
/* 0x000fe40007f1e0ff */
/*01b0*/ IADD3.X R9, R11.reuse, c[0x0][0x16c], RZ, P1, !PT ; /* 0x00005b000b097a10 */
/* 0x040fe20000ffe4ff */
/*01c0*/ IMAD.WIDE R2, R2, R7, c[0x0][0x170] ; /* 0x00005c0002027625 */
/* 0x000fe200078e0207 */
/*01d0*/ IADD3.X R7, R11, c[0x0][0x164], RZ, P0, !PT ; /* 0x000059000b077a10 */
/* 0x000fe200007fe4ff */
/*01e0*/ LDG.E R4, [R4.64] ; /* 0x0000000804047981 */
/* 0x000ea8000c1e1900 */
/*01f0*/ LDG.E R9, [R8.64] ; /* 0x0000000808097981 */
/* 0x000ea8000c1e1900 */
/*0200*/ LDG.E R2, [R2.64] ; /* 0x0000000802027981 */
/* 0x000ee8000c1e1900 */
/*0210*/ LDG.E R7, [R6.64] ; /* 0x0000000806077981 */
/* 0x000ee2000c1e1900 */
/*0220*/ IADD3 R10, P0, R10, c[0x0][0x180], RZ ; /* 0x000060000a0a7a10 */
/* 0x000fc80007f1e0ff */
/*0230*/ IADD3.X R11, R11, c[0x0][0x184], RZ, P0, !PT ; /* 0x000061000b0b7a10 */
/* 0x000fe200007fe4ff */
/*0240*/ FMUL R0, R4, R9 ; /* 0x0000000904007220 */
/* 0x004fc80000400000 */
/*0250*/ FFMA R13, R2, R7, R0 ; /* 0x00000007020d7223 */
/* 0x008fca0000000000 */
/*0260*/ STG.E [R10.64], R13 ; /* 0x0000000d0a007986 */
/* 0x000fe2000c101908 */
/*0270*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0280*/ ULDC.64 UR4, c[0x0][0x188] ; /* 0x0000620000047ab9 */
/* 0x000fe20000000a00 */
/*0290*/ SHF.R.S32.HI R3, RZ, 0x1f, R0 ; /* 0x0000001fff037819 */
/* 0x000fe20000011400 */
/*02a0*/ UIADD3 UR4, -UR4, UR5, URZ ; /* 0x0000000504047290 */
/* 0x000fcc000fffe13f */
/*02b0*/ ISETP.GE.AND P0, PT, R0, UR4, PT ; /* 0x0000000400007c0c */
/* 0x000fda000bf06270 */
/*02c0*/ @!P0 BRA 0x410 ; /* 0x0000014000008947 */
/* 0x000fea0003800000 */
/*02d0*/ IMAD.SHL.U32 R10, R0.reuse, 0x4, RZ ; /* 0x00000004000a7824 */
/* 0x040fe200078e00ff */
/*02e0*/ IADD3 R2, R0.reuse, c[0x0][0x188], RZ ; /* 0x0000620000027a10 */
/* 0x040fe20007ffe0ff */
/*02f0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */
/* 0x000fe200078e00ff */
/*0300*/ SHF.L.U64.HI R11, R0, 0x2, R3 ; /* 0x00000002000b7819 */
/* 0x000fe40000010203 */
/*0310*/ IADD3 R8, P1, R10, c[0x0][0x168], RZ ; /* 0x00005a000a087a10 */
/* 0x000fe20007f3e0ff */
/*0320*/ IMAD.WIDE R6, R2, R5.reuse, c[0x0][0x178] ; /* 0x00005e0002067625 */
/* 0x080fe200078e0205 */
/*0330*/ IADD3 R4, P0, R10, c[0x0][0x160], RZ ; /* 0x000058000a047a10 */
/* 0x000fe40007f1e0ff */
/*0340*/ IADD3.X R9, R11.reuse, c[0x0][0x16c], RZ, P1, !PT ; /* 0x00005b000b097a10 */
/* 0x040fe20000ffe4ff */
/*0350*/ IMAD.WIDE R2, R2, R5, c[0x0][0x170] ; /* 0x00005c0002027625 */
/* 0x000fe200078e0205 */
/*0360*/ IADD3.X R5, R11, c[0x0][0x164], RZ, P0, !PT ; /* 0x000059000b057a10 */
/* 0x000fe200007fe4ff */
/*0370*/ LDG.E R6, [R6.64] ; /* 0x0000000806067981 */
/* 0x000ea8000c1e1900 */
/*0380*/ LDG.E R9, [R8.64] ; /* 0x0000000808097981 */
/* 0x000ea8000c1e1900 */
/*0390*/ LDG.E R2, [R2.64] ; /* 0x0000000802027981 */
/* 0x000ee8000c1e1900 */
/*03a0*/ LDG.E R5, [R4.64] ; /* 0x0000000804057981 */
/* 0x000ee2000c1e1900 */
/*03b0*/ IADD3 R10, P0, R10, c[0x0][0x180], RZ ; /* 0x000060000a0a7a10 */
/* 0x000fc80007f1e0ff */
/*03c0*/ IADD3.X R11, R11, c[0x0][0x184], RZ, P0, !PT ; /* 0x000061000b0b7a10 */
/* 0x000fe200007fe4ff */
/*03d0*/ FMUL R0, R6, R9 ; /* 0x0000000906007220 */
/* 0x004fc80000400000 */
/*03e0*/ FFMA R13, R2, R5, R0 ; /* 0x00000005020d7223 */
/* 0x008fca0000000000 */
/*03f0*/ STG.E [R10.64], R13 ; /* 0x0000000d0a007986 */
/* 0x000fe2000c101908 */
/*0400*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0410*/ LEA R2, P0, R0, c[0x0][0x180], 0x2 ; /* 0x0000600000027a11 */
/* 0x000fc800078010ff */
/*0420*/ LEA.HI.X R3, R0, c[0x0][0x184], R3, 0x2, P0 ; /* 0x0000610000037a11 */
/* 0x000fca00000f1403 */
/*0430*/ STG.E [R2.64], RZ ; /* 0x000000ff02007986 */
/* 0x000fe2000c101908 */
/*0440*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0450*/ BRA 0x450; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0460*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0470*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0480*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0490*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6kernelPfS_S_S_S_iil
.globl _Z6kernelPfS_S_S_S_iil
.p2align 8
.type _Z6kernelPfS_S_S_S_iil,@function
_Z6kernelPfS_S_S_S_iil:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x44
s_load_b32 s2, s[0:1], 0x28
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s3, 0xffff
s_cmp_gt_i32 s2, -1
v_mad_u64_u32 v[1:2], null, s15, s3, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_ashrrev_i32_e32 v2, 31, v1
s_cbranch_scc0 .LBB0_2
s_load_b64 s[4:5], s[0:1], 0x30
s_mov_b32 s3, 0
s_waitcnt lgkmcnt(0)
s_sub_u32 s4, s4, s2
s_subb_u32 s5, s5, 0
s_delay_alu instid0(SALU_CYCLE_1)
v_cmp_gt_i64_e32 vcc_lo, s[4:5], v[1:2]
s_and_b32 s4, vcc_lo, exec_lo
s_cbranch_execz .LBB0_3
s_branch .LBB0_4
.LBB0_2:
s_mov_b32 s3, -1
s_mov_b32 s4, 0
.LBB0_3:
s_load_b32 s3, s[0:1], 0x2c
s_and_not1_b32 s4, s4, exec_lo
s_waitcnt lgkmcnt(0)
s_sub_i32 s3, s3, s2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
v_cmp_le_i32_e32 vcc_lo, s3, v1
s_mov_b32 s3, 0
s_and_b32 s5, vcc_lo, exec_lo
s_or_b32 s4, s4, s5
.LBB0_4:
v_mov_b32_e32 v0, s3
s_and_saveexec_b32 s3, s4
s_cbranch_execz .LBB0_6
s_load_b256 s[4:11], s[0:1], 0x0
v_add_nc_u32_e32 v3, s2, v1
v_lshlrev_b64 v[5:6], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v4, 31, v3
v_lshlrev_b64 v[3:4], 2, v[3:4]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v7, vcc_lo, s4, v5
v_add_co_ci_u32_e32 v8, vcc_lo, s5, v6, vcc_lo
v_add_co_u32 v5, vcc_lo, s6, v5
v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
v_add_co_u32 v9, vcc_lo, s10, v3
v_add_co_ci_u32_e32 v10, vcc_lo, s11, v4, vcc_lo
v_add_co_u32 v3, vcc_lo, s8, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo
global_load_b32 v0, v[5:6], off
global_load_b32 v5, v[9:10], off
global_load_b32 v6, v[7:8], off
global_load_b32 v3, v[3:4], off
s_waitcnt vmcnt(2)
v_mul_f32_e32 v0, v0, v5
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_fmac_f32_e32 v0, v6, v3
.LBB0_6:
s_or_b32 exec_lo, exec_lo, s3
s_load_b64 s[0:1], s[0:1], 0x20
v_lshlrev_b64 v[1:2], 2, v[1:2]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v1, vcc_lo, s0, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
global_store_b32 v[1:2], v0, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z6kernelPfS_S_S_S_iil
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 312
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 11
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z6kernelPfS_S_S_S_iil, .Lfunc_end0-_Z6kernelPfS_S_S_S_iil
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 24
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 32
.size: 8
.value_kind: global_buffer
- .offset: 40
.size: 4
.value_kind: by_value
- .offset: 44
.size: 4
.value_kind: by_value
- .offset: 48
.size: 8
.value_kind: by_value
- .offset: 56
.size: 4
.value_kind: hidden_block_count_x
- .offset: 60
.size: 4
.value_kind: hidden_block_count_y
- .offset: 64
.size: 4
.value_kind: hidden_block_count_z
- .offset: 68
.size: 2
.value_kind: hidden_group_size_x
- .offset: 70
.size: 2
.value_kind: hidden_group_size_y
- .offset: 72
.size: 2
.value_kind: hidden_group_size_z
- .offset: 74
.size: 2
.value_kind: hidden_remainder_x
- .offset: 76
.size: 2
.value_kind: hidden_remainder_y
- .offset: 78
.size: 2
.value_kind: hidden_remainder_z
- .offset: 96
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 104
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 112
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 120
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 312
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z6kernelPfS_S_S_S_iil
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z6kernelPfS_S_S_S_iil.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 11
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <stdlib.h>
#define N 4096
#define block_Size 256
/* function to integrate, defined as a function on the GPU device */
__device__ float myfunction(float a)
{
return a*a+2.0*a + 3.0;
}
/* kernel function to compute the summation used in the trapezoidal rule
for numerical integration */
__global__ void integratorKernel(float *a, float c, float deltaX)
{
int id = blockIdx.x * blockDim.x + threadIdx.x;
float x = c + (float)id * deltaX;
if (id<N)
a[id] = myfunction(x)+myfunction(x+deltaX);
}
int main( int argc, char* argv[] )
{
double end = 1.0, start = 0.0;
// deltaX
float deltaX = (end-start)/(double) N;
// error code variable
cudaError_t errorcode = cudaSuccess;
// Size of the arrays in bytes
int size = N*sizeof(float);
// Allocate array on host and device
float* a_h = (float *)malloc(size);
float* a_d;
if (( errorcode = cudaMalloc((void **)&a_d,size))!= cudaSuccess)
{
printf("cudaMalloc(): %s/n", cudaGetErrorString(errorcode));
exit(1);
}
// Do calculation on device
int grid_Size = N/block_Size + ( N % block_Size == 0 ? 0:1);
printf("blocks: %d\n", grid_Size);
printf("block size: %d\n ", block_Size);
integratorKernel <<< grid_Size, block_Size >>> (a_d, start, deltaX);
// Copy results from device to host
if((errorcode = cudaMemcpy(a_h, a_d, sizeof(float)*N, cudaMemcpyDeviceToHost))
!=cudaSuccess)
{
printf("cudaMemcpy(): %s\n", cudaGetErrorString(errorcode));
exit(1);
}
// Add up results
float sum = 0.0;
for(int i=0; i<N; i++)
sum += a_h[i];
sum *= deltaX/2.0;
printf("The integral is: %f\n", sum);
// clean up
free(a_h);
cudaFree(a_d);
return 0;
} | code for sm_80
Function : _Z16integratorKernelPfff
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fe200078e0203 */
/*0040*/ MOV R3, c[0x0][0x16c] ; /* 0x00005b0000037a02 */
/* 0x000fc60000000f00 */
/*0050*/ I2F R2, R0 ; /* 0x0000000000027306 */
/* 0x000e220000201400 */
/*0060*/ ISETP.GT.AND P0, PT, R0, 0xfff, PT ; /* 0x00000fff0000780c */
/* 0x000fe20003f04270 */
/*0070*/ FFMA R10, R2, R3, c[0x0][0x168] ; /* 0x00005a00020a7623 */
/* 0x001fd80000000003 */
/*0080*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0090*/ FADD R12, R10.reuse, c[0x0][0x16c] ; /* 0x00005b000a0c7621 */
/* 0x040fe20000000000 */
/*00a0*/ F2F.F64.F32 R4, R10 ; /* 0x0000000a00047310 */
/* 0x000fe20000201800 */
/*00b0*/ FMUL R11, R10, R10 ; /* 0x0000000a0a0b7220 */
/* 0x000fe20000400000 */
/*00c0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*00d0*/ FMUL R13, R12, R12 ; /* 0x0000000c0c0d7220 */
/* 0x000fca0000400000 */
/*00e0*/ F2F.F64.F32 R2, R11 ; /* 0x0000000b00027310 */
/* 0x000e300000201800 */
/*00f0*/ F2F.F64.F32 R8, R12 ; /* 0x0000000c00087310 */
/* 0x000ff00000201800 */
/*0100*/ F2F.F64.F32 R6, R13 ; /* 0x0000000d00067310 */
/* 0x000e620000201800 */
/*0110*/ DFMA R2, R4, 2, R2 ; /* 0x400000000402782b */
/* 0x0010840000000002 */
/*0120*/ MOV R5, 0x4 ; /* 0x0000000400057802 */
/* 0x001fc80000000f00 */
/*0130*/ DADD R2, R2, 3 ; /* 0x4008000002027429 */
/* 0x004e220000000000 */
/*0140*/ IMAD.WIDE R4, R0, R5, c[0x0][0x160] ; /* 0x0000580000047625 */
/* 0x000fc600078e0205 */
/*0150*/ DFMA R6, R8, 2, R6 ; /* 0x400000000806782b */
/* 0x002e4c0000000006 */
/*0160*/ F2F.F32.F64 R2, R2 ; /* 0x0000000200027310 */
/* 0x001fe20000301000 */
/*0170*/ DADD R6, R6, 3 ; /* 0x4008000006067429 */
/* 0x002e140000000000 */
/*0180*/ F2F.F32.F64 R7, R6 ; /* 0x0000000600077310 */
/* 0x001e240000301000 */
/*0190*/ FADD R9, R2, R7 ; /* 0x0000000702097221 */
/* 0x001fca0000000000 */
/*01a0*/ STG.E [R4.64], R9 ; /* 0x0000000904007986 */
/* 0x000fe2000c101904 */
/*01b0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*01c0*/ BRA 0x1c0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0200*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0210*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0220*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0230*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0240*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0250*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0260*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0270*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
#define N 4096
#define block_Size 256
/* function to integrate, defined as a function on the GPU device */
__device__ float myfunction(float a)
{
return a*a+2.0*a + 3.0;
}
/* kernel function to compute the summation used in the trapezoidal rule
for numerical integration */
__global__ void integratorKernel(float *a, float c, float deltaX)
{
int id = blockIdx.x * blockDim.x + threadIdx.x;
float x = c + (float)id * deltaX;
if (id<N)
a[id] = myfunction(x)+myfunction(x+deltaX);
}
int main( int argc, char* argv[] )
{
double end = 1.0, start = 0.0;
// deltaX
float deltaX = (end-start)/(double) N;
// error code variable
cudaError_t errorcode = cudaSuccess;
// Size of the arrays in bytes
int size = N*sizeof(float);
// Allocate array on host and device
float* a_h = (float *)malloc(size);
float* a_d;
if (( errorcode = cudaMalloc((void **)&a_d,size))!= cudaSuccess)
{
printf("cudaMalloc(): %s/n", cudaGetErrorString(errorcode));
exit(1);
}
// Do calculation on device
int grid_Size = N/block_Size + ( N % block_Size == 0 ? 0:1);
printf("blocks: %d\n", grid_Size);
printf("block size: %d\n ", block_Size);
integratorKernel <<< grid_Size, block_Size >>> (a_d, start, deltaX);
// Copy results from device to host
if((errorcode = cudaMemcpy(a_h, a_d, sizeof(float)*N, cudaMemcpyDeviceToHost))
!=cudaSuccess)
{
printf("cudaMemcpy(): %s\n", cudaGetErrorString(errorcode));
exit(1);
}
// Add up results
float sum = 0.0;
for(int i=0; i<N; i++)
sum += a_h[i];
sum *= deltaX/2.0;
printf("The integral is: %f\n", sum);
// clean up
free(a_h);
cudaFree(a_d);
return 0;
} | .file "tmpxft_00121f50_00000000-6_trap.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2061:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z10myfunctionf
.type _Z10myfunctionf, @function
_Z10myfunctionf:
.LFB2057:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2057:
.size _Z10myfunctionf, .-_Z10myfunctionf
.globl _Z38__device_stub__Z16integratorKernelPfffPfff
.type _Z38__device_stub__Z16integratorKernelPfffPfff, @function
_Z38__device_stub__Z16integratorKernelPfffPfff:
.LFB2083:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movss %xmm0, 4(%rsp)
movss %xmm1, (%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
leaq 4(%rsp), %rax
movq %rax, 88(%rsp)
movq %rsp, %rax
movq %rax, 96(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L9
.L5:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L10
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L9:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z16integratorKernelPfff(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L5
.L10:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2083:
.size _Z38__device_stub__Z16integratorKernelPfffPfff, .-_Z38__device_stub__Z16integratorKernelPfffPfff
.globl _Z16integratorKernelPfff
.type _Z16integratorKernelPfff, @function
_Z16integratorKernelPfff:
.LFB2084:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z38__device_stub__Z16integratorKernelPfffPfff
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2084:
.size _Z16integratorKernelPfff, .-_Z16integratorKernelPfff
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "cudaMalloc(): %s/n"
.LC2:
.string "blocks: %d\n"
.LC3:
.string "block size: %d\n "
.LC5:
.string "cudaMemcpy(): %s\n"
.LC7:
.string "The integral is: %f\n"
.text
.globl main
.type main, @function
main:
.LFB2058:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
subq $48, %rsp
.cfi_def_cfa_offset 64
movq %fs:40, %rax
movq %rax, 40(%rsp)
xorl %eax, %eax
movl $16384, %edi
call malloc@PLT
movq %rax, %rbx
leaq 8(%rsp), %rdi
movl $16384, %esi
call cudaMalloc@PLT
testl %eax, %eax
jne .L21
movl $16, %edx
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $256, %edx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $256, 28(%rsp)
movl $1, 32(%rsp)
movl $16, 16(%rsp)
movl $1, 20(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 28(%rsp), %rdx
movl $1, %ecx
movq 16(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L22
.L15:
movl $2, %ecx
movl $16384, %edx
movq 8(%rsp), %rsi
movq %rbx, %rdi
call cudaMemcpy@PLT
testl %eax, %eax
jne .L23
movq %rbx, %rax
leaq 16384(%rbx), %rdx
pxor %xmm0, %xmm0
.L17:
addss (%rax), %xmm0
addq $4, %rax
cmpq %rdx, %rax
jne .L17
mulss .LC6(%rip), %xmm0
cvtss2sd %xmm0, %xmm0
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq %rbx, %rdi
call free@PLT
movq 8(%rsp), %rdi
call cudaFree@PLT
movq 40(%rsp), %rax
subq %fs:40, %rax
jne .L24
movl $0, %eax
addq $48, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
ret
.L21:
.cfi_restore_state
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rdx
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L22:
movss .LC4(%rip), %xmm1
pxor %xmm0, %xmm0
movq 8(%rsp), %rdi
call _Z38__device_stub__Z16integratorKernelPfffPfff
jmp .L15
.L23:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rdx
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L24:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2058:
.size main, .-main
.section .rodata.str1.1
.LC8:
.string "_Z16integratorKernelPfff"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2086:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC8(%rip), %rdx
movq %rdx, %rcx
leaq _Z16integratorKernelPfff(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2086:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC4:
.long 964689920
.align 4
.LC6:
.long 956301312
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#define N 4096
#define block_Size 256
/* function to integrate, defined as a function on the GPU device */
__device__ float myfunction(float a)
{
return a*a+2.0*a + 3.0;
}
/* kernel function to compute the summation used in the trapezoidal rule
for numerical integration */
__global__ void integratorKernel(float *a, float c, float deltaX)
{
int id = blockIdx.x * blockDim.x + threadIdx.x;
float x = c + (float)id * deltaX;
if (id<N)
a[id] = myfunction(x)+myfunction(x+deltaX);
}
int main( int argc, char* argv[] )
{
double end = 1.0, start = 0.0;
// deltaX
float deltaX = (end-start)/(double) N;
// error code variable
cudaError_t errorcode = cudaSuccess;
// Size of the arrays in bytes
int size = N*sizeof(float);
// Allocate array on host and device
float* a_h = (float *)malloc(size);
float* a_d;
if (( errorcode = cudaMalloc((void **)&a_d,size))!= cudaSuccess)
{
printf("cudaMalloc(): %s/n", cudaGetErrorString(errorcode));
exit(1);
}
// Do calculation on device
int grid_Size = N/block_Size + ( N % block_Size == 0 ? 0:1);
printf("blocks: %d\n", grid_Size);
printf("block size: %d\n ", block_Size);
integratorKernel <<< grid_Size, block_Size >>> (a_d, start, deltaX);
// Copy results from device to host
if((errorcode = cudaMemcpy(a_h, a_d, sizeof(float)*N, cudaMemcpyDeviceToHost))
!=cudaSuccess)
{
printf("cudaMemcpy(): %s\n", cudaGetErrorString(errorcode));
exit(1);
}
// Add up results
float sum = 0.0;
for(int i=0; i<N; i++)
sum += a_h[i];
sum *= deltaX/2.0;
printf("The integral is: %f\n", sum);
// clean up
free(a_h);
cudaFree(a_d);
return 0;
} | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#define N 4096
#define block_Size 256
/* function to integrate, defined as a function on the GPU device */
__device__ float myfunction(float a)
{
return a*a+2.0*a + 3.0;
}
/* kernel function to compute the summation used in the trapezoidal rule
for numerical integration */
__global__ void integratorKernel(float *a, float c, float deltaX)
{
int id = blockIdx.x * blockDim.x + threadIdx.x;
float x = c + (float)id * deltaX;
if (id<N)
a[id] = myfunction(x)+myfunction(x+deltaX);
}
int main( int argc, char* argv[] )
{
double end = 1.0, start = 0.0;
// deltaX
float deltaX = (end-start)/(double) N;
// error code variable
hipError_t errorcode = hipSuccess;
// Size of the arrays in bytes
int size = N*sizeof(float);
// Allocate array on host and device
float* a_h = (float *)malloc(size);
float* a_d;
if (( errorcode = hipMalloc((void **)&a_d,size))!= hipSuccess)
{
printf("cudaMalloc(): %s/n", hipGetErrorString(errorcode));
exit(1);
}
// Do calculation on device
int grid_Size = N/block_Size + ( N % block_Size == 0 ? 0:1);
printf("blocks: %d\n", grid_Size);
printf("block size: %d\n ", block_Size);
integratorKernel <<< grid_Size, block_Size >>> (a_d, start, deltaX);
// Copy results from device to host
if((errorcode = hipMemcpy(a_h, a_d, sizeof(float)*N, hipMemcpyDeviceToHost))
!=hipSuccess)
{
printf("cudaMemcpy(): %s\n", hipGetErrorString(errorcode));
exit(1);
}
// Add up results
float sum = 0.0;
for(int i=0; i<N; i++)
sum += a_h[i];
sum *= deltaX/2.0;
printf("The integral is: %f\n", sum);
// clean up
free(a_h);
hipFree(a_d);
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#define N 4096
#define block_Size 256
/* function to integrate, defined as a function on the GPU device */
__device__ float myfunction(float a)
{
return a*a+2.0*a + 3.0;
}
/* kernel function to compute the summation used in the trapezoidal rule
for numerical integration */
__global__ void integratorKernel(float *a, float c, float deltaX)
{
int id = blockIdx.x * blockDim.x + threadIdx.x;
float x = c + (float)id * deltaX;
if (id<N)
a[id] = myfunction(x)+myfunction(x+deltaX);
}
int main( int argc, char* argv[] )
{
double end = 1.0, start = 0.0;
// deltaX
float deltaX = (end-start)/(double) N;
// error code variable
hipError_t errorcode = hipSuccess;
// Size of the arrays in bytes
int size = N*sizeof(float);
// Allocate array on host and device
float* a_h = (float *)malloc(size);
float* a_d;
if (( errorcode = hipMalloc((void **)&a_d,size))!= hipSuccess)
{
printf("cudaMalloc(): %s/n", hipGetErrorString(errorcode));
exit(1);
}
// Do calculation on device
int grid_Size = N/block_Size + ( N % block_Size == 0 ? 0:1);
printf("blocks: %d\n", grid_Size);
printf("block size: %d\n ", block_Size);
integratorKernel <<< grid_Size, block_Size >>> (a_d, start, deltaX);
// Copy results from device to host
if((errorcode = hipMemcpy(a_h, a_d, sizeof(float)*N, hipMemcpyDeviceToHost))
!=hipSuccess)
{
printf("cudaMemcpy(): %s\n", hipGetErrorString(errorcode));
exit(1);
}
// Add up results
float sum = 0.0;
for(int i=0; i<N; i++)
sum += a_h[i];
sum *= deltaX/2.0;
printf("The integral is: %f\n", sum);
// clean up
free(a_h);
hipFree(a_d);
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z16integratorKernelPfff
.globl _Z16integratorKernelPfff
.p2align 8
.type _Z16integratorKernelPfff,@function
_Z16integratorKernelPfff:
s_load_b32 s2, s[0:1], 0x1c
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e32 0x1000, v1
s_cbranch_execz .LBB0_2
s_load_b128 s[0:3], s[0:1], 0x0
v_cvt_f32_i32_e32 v0, v1
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v0, v0, s3, s2
v_add_f32_e32 v6, s3, v0
v_mul_f32_e32 v4, v0, v0
v_cvt_f64_f32_e32 v[2:3], v0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_mul_f32_e32 v8, v6, v6
v_cvt_f64_f32_e32 v[4:5], v4
v_cvt_f64_f32_e32 v[6:7], v6
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cvt_f64_f32_e32 v[8:9], v8
v_fma_f64 v[2:3], v[2:3], 2.0, v[4:5]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[4:5], v[6:7], 2.0, v[8:9]
v_add_f64 v[2:3], v[2:3], 0x40080000
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[4:5], v[4:5], 0x40080000
v_cvt_f32_f64_e32 v3, v[2:3]
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cvt_f32_f64_e32 v4, v[4:5]
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_delay_alu instid0(VALU_DEP_4)
v_add_f32_e32 v2, v3, v4
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z16integratorKernelPfff
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 10
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z16integratorKernelPfff, .Lfunc_end0-_Z16integratorKernelPfff
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: by_value
- .offset: 12
.size: 4
.value_kind: by_value
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
.size: 2
.value_kind: hidden_group_size_x
- .offset: 30
.size: 2
.value_kind: hidden_group_size_y
- .offset: 32
.size: 2
.value_kind: hidden_group_size_z
- .offset: 34
.size: 2
.value_kind: hidden_remainder_x
- .offset: 36
.size: 2
.value_kind: hidden_remainder_y
- .offset: 38
.size: 2
.value_kind: hidden_remainder_z
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 80
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z16integratorKernelPfff
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z16integratorKernelPfff.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 10
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#define N 4096
#define block_Size 256
/* function to integrate, defined as a function on the GPU device */
__device__ float myfunction(float a)
{
return a*a+2.0*a + 3.0;
}
/* kernel function to compute the summation used in the trapezoidal rule
for numerical integration */
__global__ void integratorKernel(float *a, float c, float deltaX)
{
int id = blockIdx.x * blockDim.x + threadIdx.x;
float x = c + (float)id * deltaX;
if (id<N)
a[id] = myfunction(x)+myfunction(x+deltaX);
}
int main( int argc, char* argv[] )
{
double end = 1.0, start = 0.0;
// deltaX
float deltaX = (end-start)/(double) N;
// error code variable
hipError_t errorcode = hipSuccess;
// Size of the arrays in bytes
int size = N*sizeof(float);
// Allocate array on host and device
float* a_h = (float *)malloc(size);
float* a_d;
if (( errorcode = hipMalloc((void **)&a_d,size))!= hipSuccess)
{
printf("cudaMalloc(): %s/n", hipGetErrorString(errorcode));
exit(1);
}
// Do calculation on device
int grid_Size = N/block_Size + ( N % block_Size == 0 ? 0:1);
printf("blocks: %d\n", grid_Size);
printf("block size: %d\n ", block_Size);
integratorKernel <<< grid_Size, block_Size >>> (a_d, start, deltaX);
// Copy results from device to host
if((errorcode = hipMemcpy(a_h, a_d, sizeof(float)*N, hipMemcpyDeviceToHost))
!=hipSuccess)
{
printf("cudaMemcpy(): %s\n", hipGetErrorString(errorcode));
exit(1);
}
// Add up results
float sum = 0.0;
for(int i=0; i<N; i++)
sum += a_h[i];
sum *= deltaX/2.0;
printf("The integral is: %f\n", sum);
// clean up
free(a_h);
hipFree(a_d);
return 0;
} | .text
.file "trap.hip"
.globl _Z31__device_stub__integratorKernelPfff # -- Begin function _Z31__device_stub__integratorKernelPfff
.p2align 4, 0x90
.type _Z31__device_stub__integratorKernelPfff,@function
_Z31__device_stub__integratorKernelPfff: # @_Z31__device_stub__integratorKernelPfff
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movss %xmm0, 4(%rsp)
movss %xmm1, (%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 4(%rsp), %rax
movq %rax, 72(%rsp)
movq %rsp, %rax
movq %rax, 80(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z16integratorKernelPfff, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z31__device_stub__integratorKernelPfff, .Lfunc_end0-_Z31__device_stub__integratorKernelPfff
.cfi_endproc
# -- End function
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function main
.LCPI1_0:
.long 0x39000000 # float 1.22070313E-4
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $112, %rsp
.cfi_def_cfa_offset 128
.cfi_offset %rbx, -16
movl $16384, %edi # imm = 0x4000
callq malloc
movq %rax, %rbx
leaq 8(%rsp), %rdi
movl $16384, %esi # imm = 0x4000
callq hipMalloc
testl %eax, %eax
jne .LBB1_1
# %bb.3:
movl $.L.str.1, %edi
movl $16, %esi
xorl %eax, %eax
callq printf
movl $.L.str.2, %edi
movl $256, %esi # imm = 0x100
xorl %eax, %eax
callq printf
movabsq $4294967312, %rdi # imm = 0x100000010
leaq 240(%rdi), %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_5
# %bb.4:
movq 8(%rsp), %rax
movq %rax, 72(%rsp)
movl $0, 20(%rsp)
movl $964689920, 16(%rsp) # imm = 0x39800000
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 20(%rsp), %rax
movq %rax, 88(%rsp)
leaq 16(%rsp), %rax
movq %rax, 96(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z16integratorKernelPfff, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_5:
movq 8(%rsp), %rsi
movl $16384, %edx # imm = 0x4000
movq %rbx, %rdi
movl $2, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB1_9
# %bb.6: # %.preheader.preheader
xorps %xmm0, %xmm0
xorl %eax, %eax
.p2align 4, 0x90
.LBB1_7: # %.preheader
# =>This Inner Loop Header: Depth=1
addss (%rbx,%rax,4), %xmm0
incq %rax
cmpq $4096, %rax # imm = 0x1000
jne .LBB1_7
# %bb.8:
mulss .LCPI1_0(%rip), %xmm0
cvtss2sd %xmm0, %xmm0
movl $.L.str.4, %edi
movb $1, %al
callq printf
movq %rbx, %rdi
callq free
movq 8(%rsp), %rdi
callq hipFree
xorl %eax, %eax
addq $112, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
retq
.LBB1_1:
.cfi_def_cfa_offset 128
movl %eax, %edi
callq hipGetErrorString
movl $.L.str, %edi
jmp .LBB1_2
.LBB1_9:
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.3, %edi
.LBB1_2:
movq %rax, %rsi
xorl %eax, %eax
callq printf
movl $1, %edi
callq exit
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z16integratorKernelPfff, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z16integratorKernelPfff,@object # @_Z16integratorKernelPfff
.section .rodata,"a",@progbits
.globl _Z16integratorKernelPfff
.p2align 3, 0x0
_Z16integratorKernelPfff:
.quad _Z31__device_stub__integratorKernelPfff
.size _Z16integratorKernelPfff, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "cudaMalloc(): %s/n"
.size .L.str, 19
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "blocks: %d\n"
.size .L.str.1, 12
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "block size: %d\n "
.size .L.str.2, 17
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "cudaMemcpy(): %s\n"
.size .L.str.3, 18
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "The integral is: %f\n"
.size .L.str.4, 21
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z16integratorKernelPfff"
.size .L__unnamed_1, 25
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z31__device_stub__integratorKernelPfff
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z16integratorKernelPfff
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z16integratorKernelPfff
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fe200078e0203 */
/*0040*/ MOV R3, c[0x0][0x16c] ; /* 0x00005b0000037a02 */
/* 0x000fc60000000f00 */
/*0050*/ I2F R2, R0 ; /* 0x0000000000027306 */
/* 0x000e220000201400 */
/*0060*/ ISETP.GT.AND P0, PT, R0, 0xfff, PT ; /* 0x00000fff0000780c */
/* 0x000fe20003f04270 */
/*0070*/ FFMA R10, R2, R3, c[0x0][0x168] ; /* 0x00005a00020a7623 */
/* 0x001fd80000000003 */
/*0080*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0090*/ FADD R12, R10.reuse, c[0x0][0x16c] ; /* 0x00005b000a0c7621 */
/* 0x040fe20000000000 */
/*00a0*/ F2F.F64.F32 R4, R10 ; /* 0x0000000a00047310 */
/* 0x000fe20000201800 */
/*00b0*/ FMUL R11, R10, R10 ; /* 0x0000000a0a0b7220 */
/* 0x000fe20000400000 */
/*00c0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*00d0*/ FMUL R13, R12, R12 ; /* 0x0000000c0c0d7220 */
/* 0x000fca0000400000 */
/*00e0*/ F2F.F64.F32 R2, R11 ; /* 0x0000000b00027310 */
/* 0x000e300000201800 */
/*00f0*/ F2F.F64.F32 R8, R12 ; /* 0x0000000c00087310 */
/* 0x000ff00000201800 */
/*0100*/ F2F.F64.F32 R6, R13 ; /* 0x0000000d00067310 */
/* 0x000e620000201800 */
/*0110*/ DFMA R2, R4, 2, R2 ; /* 0x400000000402782b */
/* 0x0010840000000002 */
/*0120*/ MOV R5, 0x4 ; /* 0x0000000400057802 */
/* 0x001fc80000000f00 */
/*0130*/ DADD R2, R2, 3 ; /* 0x4008000002027429 */
/* 0x004e220000000000 */
/*0140*/ IMAD.WIDE R4, R0, R5, c[0x0][0x160] ; /* 0x0000580000047625 */
/* 0x000fc600078e0205 */
/*0150*/ DFMA R6, R8, 2, R6 ; /* 0x400000000806782b */
/* 0x002e4c0000000006 */
/*0160*/ F2F.F32.F64 R2, R2 ; /* 0x0000000200027310 */
/* 0x001fe20000301000 */
/*0170*/ DADD R6, R6, 3 ; /* 0x4008000006067429 */
/* 0x002e140000000000 */
/*0180*/ F2F.F32.F64 R7, R6 ; /* 0x0000000600077310 */
/* 0x001e240000301000 */
/*0190*/ FADD R9, R2, R7 ; /* 0x0000000702097221 */
/* 0x001fca0000000000 */
/*01a0*/ STG.E [R4.64], R9 ; /* 0x0000000904007986 */
/* 0x000fe2000c101904 */
/*01b0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*01c0*/ BRA 0x1c0; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0200*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0210*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0220*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0230*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0240*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0250*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0260*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0270*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z16integratorKernelPfff
.globl _Z16integratorKernelPfff
.p2align 8
.type _Z16integratorKernelPfff,@function
_Z16integratorKernelPfff:
s_load_b32 s2, s[0:1], 0x1c
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e32 0x1000, v1
s_cbranch_execz .LBB0_2
s_load_b128 s[0:3], s[0:1], 0x0
v_cvt_f32_i32_e32 v0, v1
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f32 v0, v0, s3, s2
v_add_f32_e32 v6, s3, v0
v_mul_f32_e32 v4, v0, v0
v_cvt_f64_f32_e32 v[2:3], v0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_mul_f32_e32 v8, v6, v6
v_cvt_f64_f32_e32 v[4:5], v4
v_cvt_f64_f32_e32 v[6:7], v6
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cvt_f64_f32_e32 v[8:9], v8
v_fma_f64 v[2:3], v[2:3], 2.0, v[4:5]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[4:5], v[6:7], 2.0, v[8:9]
v_add_f64 v[2:3], v[2:3], 0x40080000
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[4:5], v[4:5], 0x40080000
v_cvt_f32_f64_e32 v3, v[2:3]
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cvt_f32_f64_e32 v4, v[4:5]
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_delay_alu instid0(VALU_DEP_4)
v_add_f32_e32 v2, v3, v4
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z16integratorKernelPfff
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 10
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z16integratorKernelPfff, .Lfunc_end0-_Z16integratorKernelPfff
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: by_value
- .offset: 12
.size: 4
.value_kind: by_value
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
.size: 2
.value_kind: hidden_group_size_x
- .offset: 30
.size: 2
.value_kind: hidden_group_size_y
- .offset: 32
.size: 2
.value_kind: hidden_group_size_z
- .offset: 34
.size: 2
.value_kind: hidden_remainder_x
- .offset: 36
.size: 2
.value_kind: hidden_remainder_y
- .offset: 38
.size: 2
.value_kind: hidden_remainder_z
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 80
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z16integratorKernelPfff
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z16integratorKernelPfff.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 10
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00121f50_00000000-6_trap.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2061:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z10myfunctionf
.type _Z10myfunctionf, @function
_Z10myfunctionf:
.LFB2057:
.cfi_startproc
endbr64
pushq %rax
.cfi_def_cfa_offset 16
popq %rax
.cfi_def_cfa_offset 8
subq $24, %rsp
.cfi_def_cfa_offset 32
movl $1, 12(%rsp)
movl 12(%rsp), %edi
call exit@PLT
.cfi_endproc
.LFE2057:
.size _Z10myfunctionf, .-_Z10myfunctionf
.globl _Z38__device_stub__Z16integratorKernelPfffPfff
.type _Z38__device_stub__Z16integratorKernelPfffPfff, @function
_Z38__device_stub__Z16integratorKernelPfffPfff:
.LFB2083:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movss %xmm0, 4(%rsp)
movss %xmm1, (%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
leaq 4(%rsp), %rax
movq %rax, 88(%rsp)
movq %rsp, %rax
movq %rax, 96(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L9
.L5:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L10
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L9:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z16integratorKernelPfff(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L5
.L10:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2083:
.size _Z38__device_stub__Z16integratorKernelPfffPfff, .-_Z38__device_stub__Z16integratorKernelPfffPfff
.globl _Z16integratorKernelPfff
.type _Z16integratorKernelPfff, @function
_Z16integratorKernelPfff:
.LFB2084:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z38__device_stub__Z16integratorKernelPfffPfff
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2084:
.size _Z16integratorKernelPfff, .-_Z16integratorKernelPfff
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "cudaMalloc(): %s/n"
.LC2:
.string "blocks: %d\n"
.LC3:
.string "block size: %d\n "
.LC5:
.string "cudaMemcpy(): %s\n"
.LC7:
.string "The integral is: %f\n"
.text
.globl main
.type main, @function
main:
.LFB2058:
.cfi_startproc
endbr64
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
subq $48, %rsp
.cfi_def_cfa_offset 64
movq %fs:40, %rax
movq %rax, 40(%rsp)
xorl %eax, %eax
movl $16384, %edi
call malloc@PLT
movq %rax, %rbx
leaq 8(%rsp), %rdi
movl $16384, %esi
call cudaMalloc@PLT
testl %eax, %eax
jne .L21
movl $16, %edx
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $256, %edx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $256, 28(%rsp)
movl $1, 32(%rsp)
movl $16, 16(%rsp)
movl $1, 20(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 28(%rsp), %rdx
movl $1, %ecx
movq 16(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L22
.L15:
movl $2, %ecx
movl $16384, %edx
movq 8(%rsp), %rsi
movq %rbx, %rdi
call cudaMemcpy@PLT
testl %eax, %eax
jne .L23
movq %rbx, %rax
leaq 16384(%rbx), %rdx
pxor %xmm0, %xmm0
.L17:
addss (%rax), %xmm0
addq $4, %rax
cmpq %rdx, %rax
jne .L17
mulss .LC6(%rip), %xmm0
cvtss2sd %xmm0, %xmm0
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq %rbx, %rdi
call free@PLT
movq 8(%rsp), %rdi
call cudaFree@PLT
movq 40(%rsp), %rax
subq %fs:40, %rax
jne .L24
movl $0, %eax
addq $48, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
ret
.L21:
.cfi_restore_state
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rdx
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L22:
movss .LC4(%rip), %xmm1
pxor %xmm0, %xmm0
movq 8(%rsp), %rdi
call _Z38__device_stub__Z16integratorKernelPfffPfff
jmp .L15
.L23:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rdx
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L24:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2058:
.size main, .-main
.section .rodata.str1.1
.LC8:
.string "_Z16integratorKernelPfff"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2086:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC8(%rip), %rdx
movq %rdx, %rcx
leaq _Z16integratorKernelPfff(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2086:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC4:
.long 964689920
.align 4
.LC6:
.long 956301312
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "trap.hip"
.globl _Z31__device_stub__integratorKernelPfff # -- Begin function _Z31__device_stub__integratorKernelPfff
.p2align 4, 0x90
.type _Z31__device_stub__integratorKernelPfff,@function
_Z31__device_stub__integratorKernelPfff: # @_Z31__device_stub__integratorKernelPfff
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movss %xmm0, 4(%rsp)
movss %xmm1, (%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 4(%rsp), %rax
movq %rax, 72(%rsp)
movq %rsp, %rax
movq %rax, 80(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z16integratorKernelPfff, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z31__device_stub__integratorKernelPfff, .Lfunc_end0-_Z31__device_stub__integratorKernelPfff
.cfi_endproc
# -- End function
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function main
.LCPI1_0:
.long 0x39000000 # float 1.22070313E-4
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $112, %rsp
.cfi_def_cfa_offset 128
.cfi_offset %rbx, -16
movl $16384, %edi # imm = 0x4000
callq malloc
movq %rax, %rbx
leaq 8(%rsp), %rdi
movl $16384, %esi # imm = 0x4000
callq hipMalloc
testl %eax, %eax
jne .LBB1_1
# %bb.3:
movl $.L.str.1, %edi
movl $16, %esi
xorl %eax, %eax
callq printf
movl $.L.str.2, %edi
movl $256, %esi # imm = 0x100
xorl %eax, %eax
callq printf
movabsq $4294967312, %rdi # imm = 0x100000010
leaq 240(%rdi), %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_5
# %bb.4:
movq 8(%rsp), %rax
movq %rax, 72(%rsp)
movl $0, 20(%rsp)
movl $964689920, 16(%rsp) # imm = 0x39800000
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 20(%rsp), %rax
movq %rax, 88(%rsp)
leaq 16(%rsp), %rax
movq %rax, 96(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z16integratorKernelPfff, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_5:
movq 8(%rsp), %rsi
movl $16384, %edx # imm = 0x4000
movq %rbx, %rdi
movl $2, %ecx
callq hipMemcpy
testl %eax, %eax
jne .LBB1_9
# %bb.6: # %.preheader.preheader
xorps %xmm0, %xmm0
xorl %eax, %eax
.p2align 4, 0x90
.LBB1_7: # %.preheader
# =>This Inner Loop Header: Depth=1
addss (%rbx,%rax,4), %xmm0
incq %rax
cmpq $4096, %rax # imm = 0x1000
jne .LBB1_7
# %bb.8:
mulss .LCPI1_0(%rip), %xmm0
cvtss2sd %xmm0, %xmm0
movl $.L.str.4, %edi
movb $1, %al
callq printf
movq %rbx, %rdi
callq free
movq 8(%rsp), %rdi
callq hipFree
xorl %eax, %eax
addq $112, %rsp
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
retq
.LBB1_1:
.cfi_def_cfa_offset 128
movl %eax, %edi
callq hipGetErrorString
movl $.L.str, %edi
jmp .LBB1_2
.LBB1_9:
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.3, %edi
.LBB1_2:
movq %rax, %rsi
xorl %eax, %eax
callq printf
movl $1, %edi
callq exit
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z16integratorKernelPfff, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z16integratorKernelPfff,@object # @_Z16integratorKernelPfff
.section .rodata,"a",@progbits
.globl _Z16integratorKernelPfff
.p2align 3, 0x0
_Z16integratorKernelPfff:
.quad _Z31__device_stub__integratorKernelPfff
.size _Z16integratorKernelPfff, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "cudaMalloc(): %s/n"
.size .L.str, 19
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "blocks: %d\n"
.size .L.str.1, 12
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "block size: %d\n "
.size .L.str.2, 17
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "cudaMemcpy(): %s\n"
.size .L.str.3, 18
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "The integral is: %f\n"
.size .L.str.4, 21
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z16integratorKernelPfff"
.size .L__unnamed_1, 25
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z31__device_stub__integratorKernelPfff
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z16integratorKernelPfff
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <inttypes.h>
#include <cuda.h>
#include <cuda_runtime.h>
#define BLOCK_WIDTH 32
#define TAILLE 2048
#define gettime(t) clock_gettime(CLOCK_MONOTONIC_RAW, t)
#define get_sub_seconde(t) (1e-9*(double)t.tv_nsec)
/** return time in second
*/
double get_elapsedtime(void)
{
struct timespec st;
int err = gettime(&st);
if (err !=0) return 0;
return (double)st.tv_sec + get_sub_seconde(st);
}
void init(double** A, double** B, double** C, int size)
{
int i = 0, j = 0;
srand(2019);
for(i = 0; i < size; i++)
{
for(j = 0; j < size; j++)
{
A[i][j] = rand();
B[i][j] = rand();
C[i][j] = 0.0;
}
}
}
void mult(double** A, double** B, double** C, int size)
{
int i = 0, j = 0, k = 0;
for(i = 0; i < size; i++)
{
for(j = 0; j < size; j++)
{
double sum = 0.;
for(k = 0; k < size; k++)
{
sum += A[i][k] * B[k][j];
}
C[i][j] = sum;
}
}
}
// QUESTION 4
__global__
void MulMatrixKernel(double* A, double* B, double* C, int N)
{
__shared__ double share_A[BLOCK_WIDTH][BLOCK_WIDTH];
__shared__ double share_B[BLOCK_WIDTH][BLOCK_WIDTH];
double sum = 0;
int col = threadIdx.x + blockDim.x * blockIdx.x;
int line = threadIdx.y + blockDim.y * blockIdx.y;
for(int tile = 0; tile < gridDim.x; tile++)
{
share_A[threadIdx.x][threadIdx.y] = A[line * N + tile * blockDim.x + threadIdx.x];
share_B[threadIdx.x][threadIdx.y] = B[(tile*blockIdx.y + threadIdx.y) * N + col];
__syncthreads();
for(int i = 0; i < BLOCK_WIDTH; i++)
{
sum += share_A[i][threadIdx.y]*share_B[threadIdx.x][i];
}
__syncthreads();
}
C[line * N + col] = sum;
}
// FIN QUESTION 4
int main(int argc, char** argv){
int N, i;
double *A_data;
double *B_data;
double *C_data;
double **A;
double **B;
double **C;
double t0 = 0., t1 = 0., duration = 0.;
N = (argc < 2)?TAILLE:atoi(argv[1]);
fprintf(stdout, "Matrix Multiplication\n Size: %dx%d\n", N, N);
// Memory allocation
A_data = (double*) malloc(sizeof(double) * N * N);
B_data = (double*) malloc(sizeof(double) * N * N);
C_data = (double*) malloc(sizeof(double) * N * N);
A = (double**) malloc(sizeof(double *) * N);
B = (double**) malloc(sizeof(double *) * N);
C = (double**) malloc(sizeof(double *) * N);
for(i = 0; i < N; i++)
{
A[i] = &A_data[i * N];
B[i] = &B_data[i * N];
C[i] = &C_data[i * N];
}
// Value initialization
init(A, B, C, N);
// QUESTION 8
cudaEvent_t start, stop;
cudaEventCreate(&start);
cudaEventCreate(&stop);
//FIN QUESTION 8
// QUESTION 1
double *d_A, *d_B, *d_C;
cudaMalloc(&d_A, sizeof(double) * N * N);
cudaMalloc(&d_B, sizeof(double) * N * N);
cudaMalloc(&d_C, sizeof(double) * N * N);
// FIN QUESTION 1
// QUESTION 2
cudaMemcpy(d_A, A_data, sizeof(double) * N * N, cudaMemcpyHostToDevice);
cudaMemcpy(d_B, B_data, sizeof(double) * N * N, cudaMemcpyHostToDevice);
cudaMemcpy(d_C, C_data, sizeof(double) * N * N, cudaMemcpyHostToDevice);
// FIN QUESTION 2
// QUESTION 3
int nbBlocks = N / BLOCK_WIDTH;
if(N % BLOCK_WIDTH) nbBlocks++;
dim3 gridSize(nbBlocks, nbBlocks);
dim3 blockSize(BLOCK_WIDTH, BLOCK_WIDTH);
// FIN QUESTION 3
// QUESTION 4
cudaEventRecord(start); // QUESTION 8
MulMatrixKernel<<<gridSize, blockSize>>>(d_A, d_B, d_C, N);
cudaEventRecord(stop); // QUESTION 8
// FIN QUESTION 4
// QUESTION 5
cudaMemcpy(C_data, d_C, sizeof(double) * N * N, cudaMemcpyDeviceToHost);
// FIN QUESTION 5
// QUESTION 8
cudaEventSynchronize(stop);
uint64_t nb_op = N * N * N;
float milliseconds = 0;
cudaEventElapsedTime(&milliseconds, start, stop);
printf("Matrice %dx%d\n\tTemps: %f s\n\tMFlops: %.2f\n", N, N, milliseconds/1000, (nb_op / (milliseconds/1000))*1E-6);
// FIN QUESTION 8
// Compute multiplication
t0 = get_elapsedtime();
// mult(A, B, C, N);
t1 = get_elapsedtime();
// Pretty print
duration = (t1 - t0);
fprintf(stdout, "Performance results: \n");
fprintf(stdout, " Time: %lf s\n", duration);
fprintf(stdout, " MFlops: %.2f\n", (nb_op / duration)*1E-6);
return 0;
} | code for sm_80
Function : _Z15MulMatrixKernelPdS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e220000002500 */
/*0020*/ ISETP.NE.AND P0, PT, RZ, c[0x0][0xc], PT ; /* 0x00000300ff007a0c */
/* 0x000fe20003f05270 */
/*0030*/ HFMA2.MMA R17, -RZ, RZ, 0, 4.76837158203125e-07 ; /* 0x00000008ff117435 */
/* 0x000fe200000001ff */
/*0040*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0050*/ S2R R9, SR_TID.X ; /* 0x0000000000097919 */
/* 0x000e220000002100 */
/*0060*/ CS2R R22, SRZ ; /* 0x0000000000167805 */
/* 0x000fc6000001ff00 */
/*0070*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */
/* 0x000e680000002600 */
/*0080*/ S2R R3, SR_TID.Y ; /* 0x0000000000037919 */
/* 0x000e620000002200 */
/*0090*/ IMAD R2, R2, c[0x0][0x0], R9 ; /* 0x0000000002027a24 */
/* 0x001fe400078e0209 */
/*00a0*/ IMAD R5, R0, c[0x0][0x4], R3 ; /* 0x0000010000057a24 */
/* 0x002fc800078e0203 */
/*00b0*/ IMAD R16, R5, c[0x0][0x178], R2 ; /* 0x00005e0005107a24 */
/* 0x000fc800078e0202 */
/*00c0*/ IMAD.WIDE R16, R16, R17, c[0x0][0x170] ; /* 0x00005c0010107625 */
/* 0x000fe200078e0211 */
/*00d0*/ @!P0 BRA 0x730 ; /* 0x0000065000008947 */
/* 0x000fea0003800000 */
/*00e0*/ SHF.L.U32 R6, R3, 0x3, RZ ; /* 0x0000000303067819 */
/* 0x000fe200000006ff */
/*00f0*/ IMAD R4, R5, c[0x0][0x178], R9 ; /* 0x00005e0005047a24 */
/* 0x000fe200078e0209 */
/*0100*/ SHF.L.U32 R7, R9, 0x8, RZ ; /* 0x0000000809077819 */
/* 0x000fe200000006ff */
/*0110*/ IMAD R5, R3, c[0x0][0x178], R2 ; /* 0x00005e0003057a24 */
/* 0x000fe200078e0202 */
/*0120*/ LEA R6, R9, R6, 0x8 ; /* 0x0000000609067211 */
/* 0x000fe200078e40ff */
/*0130*/ CS2R R22, SRZ ; /* 0x0000000000167805 */
/* 0x000fe2000001ff00 */
/*0140*/ MOV R2, RZ ; /* 0x000000ff00027202 */
/* 0x000fe40000000f00 */
/*0150*/ HFMA2.MMA R28, -RZ, RZ, 0, 4.76837158203125e-07 ; /* 0x00000008ff1c7435 */
/* 0x000fd400000001ff */
/*0160*/ IMAD.WIDE.U32 R26, R4, R28, c[0x0][0x160] ; /* 0x00005800041a7625 */
/* 0x000fc800078e001c */
/*0170*/ IMAD.WIDE.U32 R28, R5, R28, c[0x0][0x168] ; /* 0x00005a00051c7625 */
/* 0x000fe400078e001c */
/*0180*/ LDG.E.64 R26, [R26.64] ; /* 0x000000041a1a7981 */
/* 0x000ea8000c1e1b00 */
/*0190*/ LDG.E.64 R28, [R28.64] ; /* 0x000000041c1c7981 */
/* 0x000ee2000c1e1b00 */
/*01a0*/ IADD3 R2, R2, 0x1, RZ ; /* 0x0000000102027810 */
/* 0x000fe20007ffe0ff */
/*01b0*/ IMAD R5, R0, c[0x0][0x178], R5 ; /* 0x00005e0000057a24 */
/* 0x000fe200078e0205 */
/*01c0*/ IADD3 R4, R4, c[0x0][0x0], RZ ; /* 0x0000000004047a10 */
/* 0x000fe40007ffe0ff */
/*01d0*/ ISETP.GE.U32.AND P0, PT, R2, c[0x0][0xc], PT ; /* 0x0000030002007a0c */
/* 0x000fe20003f06070 */
/*01e0*/ STS.64 [R6], R26 ; /* 0x0000001a06007388 */
/* 0x004fe80000000a00 */
/*01f0*/ STS.64 [R6+0x2000], R28 ; /* 0x0020001c06007388 */
/* 0x008fe80000000a00 */
/*0200*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0210*/ LDS.64 R18, [R3.X8] ; /* 0x0000000003127984 */
/* 0x000fe80000008a00 */
/*0220*/ LDS.128 R12, [R7+0x2000] ; /* 0x00200000070c7984 */
/* 0x000e280000000c00 */
/*0230*/ LDS.64 R24, [R3.X8+0x100] ; /* 0x0001000003187984 */
/* 0x000e680000008a00 */
/*0240*/ LDS.64 R20, [R3.X8+0x200] ; /* 0x0002000003147984 */
/* 0x000fe80000008a00 */
/*0250*/ LDS.128 R8, [R7+0x2010] ; /* 0x0020100007087984 */
/* 0x000ea20000000c00 */
/*0260*/ DFMA R12, R12, R18, R22 ; /* 0x000000120c0c722b */
/* 0x0010460000000016 */
/*0270*/ LDS.64 R22, [R3.X8+0x300] ; /* 0x0003000003167984 */
/* 0x001e260000008a00 */
/*0280*/ DFMA R24, R24, R14, R12 ; /* 0x0000000e1818722b */
/* 0x0022a2000000000c */
/*0290*/ LDS.64 R18, [R3.X8+0x400] ; /* 0x0004000003127984 */
/* 0x000fe80000008a00 */
/*02a0*/ LDS.128 R12, [R7+0x2020] ; /* 0x00202000070c7984 */
/* 0x002e620000000c00 */
/*02b0*/ DFMA R24, R8, R20, R24 ; /* 0x000000140818722b */
/* 0x0044060000000018 */
/*02c0*/ LDS.64 R20, [R3.X8+0x500] ; /* 0x0005000003147984 */
/* 0x004ea60000008a00 */
/*02d0*/ DFMA R24, R22, R10, R24 ; /* 0x0000000a1618722b */
/* 0x0010640000000018 */
/*02e0*/ LDS.64 R22, [R3.X8+0x600] ; /* 0x0006000003167984 */
/* 0x001fe80000008a00 */
/*02f0*/ LDS.128 R8, [R7+0x2030] ; /* 0x0020300007087984 */
/* 0x000e220000000c00 */
/*0300*/ DFMA R24, R12, R18, R24 ; /* 0x000000120c18722b */
/* 0x0022860000000018 */
/*0310*/ LDS.64 R18, [R3.X8+0x700] ; /* 0x0007000003127984 */
/* 0x002e660000008a00 */
/*0320*/ DFMA R24, R20, R14, R24 ; /* 0x0000000e1418722b */
/* 0x0044240000000018 */
/*0330*/ LDS.64 R20, [R3.X8+0x800] ; /* 0x0008000003147984 */
/* 0x004fe80000008a00 */
/*0340*/ LDS.128 R12, [R7+0x2040] ; /* 0x00204000070c7984 */
/* 0x000ea20000000c00 */
/*0350*/ DFMA R24, R8, R22, R24 ; /* 0x000000160818722b */
/* 0x0010460000000018 */
/*0360*/ LDS.64 R22, [R3.X8+0x900] ; /* 0x0009000003167984 */
/* 0x001e260000008a00 */
/*0370*/ DFMA R24, R18, R10, R24 ; /* 0x0000000a1218722b */
/* 0x0022a40000000018 */
/*0380*/ LDS.64 R18, [R3.X8+0xa00] ; /* 0x000a000003127984 */
/* 0x002fe80000008a00 */
/*0390*/ LDS.128 R8, [R7+0x2050] ; /* 0x0020500007087984 */
/* 0x000e620000000c00 */
/*03a0*/ DFMA R24, R12, R20, R24 ; /* 0x000000140c18722b */
/* 0x0044060000000018 */
/*03b0*/ LDS.64 R20, [R3.X8+0xb00] ; /* 0x000b000003147984 */
/* 0x004ea60000008a00 */
/*03c0*/ DFMA R24, R22, R14, R24 ; /* 0x0000000e1618722b */
/* 0x0010640000000018 */
/*03d0*/ LDS.64 R22, [R3.X8+0xc00] ; /* 0x000c000003167984 */
/* 0x001fe80000008a00 */
/*03e0*/ LDS.128 R12, [R7+0x2060] ; /* 0x00206000070c7984 */
/* 0x000e220000000c00 */
/*03f0*/ DFMA R24, R8, R18, R24 ; /* 0x000000120818722b */
/* 0x0022860000000018 */
/*0400*/ LDS.64 R18, [R3.X8+0xd00] ; /* 0x000d000003127984 */
/* 0x002e660000008a00 */
/*0410*/ DFMA R24, R20, R10, R24 ; /* 0x0000000a1418722b */
/* 0x0044240000000018 */
/*0420*/ LDS.64 R20, [R3.X8+0xe00] ; /* 0x000e000003147984 */
/* 0x004fe80000008a00 */
/*0430*/ LDS.128 R8, [R7+0x2070] ; /* 0x0020700007087984 */
/* 0x000ea20000000c00 */
/*0440*/ DFMA R24, R12, R22, R24 ; /* 0x000000160c18722b */
/* 0x0010460000000018 */
/*0450*/ LDS.64 R22, [R3.X8+0xf00] ; /* 0x000f000003167984 */
/* 0x001e260000008a00 */
/*0460*/ DFMA R24, R18, R14, R24 ; /* 0x0000000e1218722b */
/* 0x0022a40000000018 */
/*0470*/ LDS.64 R18, [R3.X8+0x1000] ; /* 0x0010000003127984 */
/* 0x002fe80000008a00 */
/*0480*/ LDS.128 R12, [R7+0x2080] ; /* 0x00208000070c7984 */
/* 0x000e620000000c00 */
/*0490*/ DFMA R24, R8, R20, R24 ; /* 0x000000140818722b */
/* 0x0044060000000018 */
/*04a0*/ LDS.64 R20, [R3.X8+0x1100] ; /* 0x0011000003147984 */
/* 0x004ea60000008a00 */
/*04b0*/ DFMA R24, R22, R10, R24 ; /* 0x0000000a1618722b */
/* 0x0010640000000018 */
/*04c0*/ LDS.64 R22, [R3.X8+0x1200] ; /* 0x0012000003167984 */
/* 0x001fe80000008a00 */
/*04d0*/ LDS.128 R8, [R7+0x2090] ; /* 0x0020900007087984 */
/* 0x000e220000000c00 */
/*04e0*/ DFMA R24, R12, R18, R24 ; /* 0x000000120c18722b */
/* 0x0022860000000018 */
/*04f0*/ LDS.64 R18, [R3.X8+0x1300] ; /* 0x0013000003127984 */
/* 0x002e660000008a00 */
/*0500*/ DFMA R24, R20, R14, R24 ; /* 0x0000000e1418722b */
/* 0x0044240000000018 */
/*0510*/ LDS.64 R20, [R3.X8+0x1400] ; /* 0x0014000003147984 */
/* 0x004fe80000008a00 */
/*0520*/ LDS.128 R12, [R7+0x20a0] ; /* 0x0020a000070c7984 */
/* 0x000ea20000000c00 */
/*0530*/ DFMA R24, R8, R22, R24 ; /* 0x000000160818722b */
/* 0x0010460000000018 */
/*0540*/ LDS.64 R22, [R3.X8+0x1500] ; /* 0x0015000003167984 */
/* 0x001e260000008a00 */
/*0550*/ DFMA R24, R18, R10, R24 ; /* 0x0000000a1218722b */
/* 0x0022a40000000018 */
/*0560*/ LDS.64 R18, [R3.X8+0x1600] ; /* 0x0016000003127984 */
/* 0x002fe80000008a00 */
/*0570*/ LDS.128 R8, [R7+0x20b0] ; /* 0x0020b00007087984 */
/* 0x000e620000000c00 */
/*0580*/ DFMA R24, R12, R20, R24 ; /* 0x000000140c18722b */
/* 0x0044060000000018 */
/*0590*/ LDS.64 R20, [R3.X8+0x1700] ; /* 0x0017000003147984 */
/* 0x004ea60000008a00 */
/*05a0*/ DFMA R24, R22, R14, R24 ; /* 0x0000000e1618722b */
/* 0x0010640000000018 */
/*05b0*/ LDS.64 R22, [R3.X8+0x1800] ; /* 0x0018000003167984 */
/* 0x001fe80000008a00 */
/*05c0*/ LDS.128 R12, [R7+0x20c0] ; /* 0x0020c000070c7984 */
/* 0x000e220000000c00 */
/*05d0*/ DFMA R24, R8, R18, R24 ; /* 0x000000120818722b */
/* 0x0022860000000018 */
/*05e0*/ LDS.64 R18, [R3.X8+0x1900] ; /* 0x0019000003127984 */
/* 0x002e660000008a00 */
/*05f0*/ DFMA R24, R20, R10, R24 ; /* 0x0000000a1418722b */
/* 0x0044240000000018 */
/*0600*/ LDS.64 R20, [R3.X8+0x1a00] ; /* 0x001a000003147984 */
/* 0x004fe80000008a00 */
/*0610*/ LDS.128 R8, [R7+0x20d0] ; /* 0x0020d00007087984 */
/* 0x000ea20000000c00 */
/*0620*/ DFMA R24, R12, R22, R24 ; /* 0x000000160c18722b */
/* 0x0010460000000018 */
/*0630*/ LDS.64 R22, [R3.X8+0x1b00] ; /* 0x001b000003167984 */
/* 0x001e260000008a00 */
/*0640*/ DFMA R24, R18, R14, R24 ; /* 0x0000000e1218722b */
/* 0x0022a40000000018 */
/*0650*/ LDS.64 R18, [R3.X8+0x1c00] ; /* 0x001c000003127984 */
/* 0x002fe80000008a00 */
/*0660*/ LDS.128 R12, [R7+0x20e0] ; /* 0x0020e000070c7984 */
/* 0x000e620000000c00 */
/*0670*/ DFMA R24, R8, R20, R24 ; /* 0x000000140818722b */
/* 0x0044060000000018 */
/*0680*/ LDS.64 R20, [R3.X8+0x1d00] ; /* 0x001d000003147984 */
/* 0x004ea60000008a00 */
/*0690*/ DFMA R24, R22, R10, R24 ; /* 0x0000000a1618722b */
/* 0x0010640000000018 */
/*06a0*/ LDS.64 R22, [R3.X8+0x1e00] ; /* 0x001e000003167984 */
/* 0x001fe80000008a00 */
/*06b0*/ LDS.128 R8, [R7+0x20f0] ; /* 0x0020f00007087984 */
/* 0x000e220000000c00 */
/*06c0*/ DFMA R18, R12, R18, R24 ; /* 0x000000120c12722b */
/* 0x0022860000000018 */
/*06d0*/ LDS.64 R12, [R3.X8+0x1f00] ; /* 0x001f0000030c7984 */
/* 0x002e660000008a00 */
/*06e0*/ DFMA R14, R20, R14, R18 ; /* 0x0000000e140e722b */
/* 0x004e0c0000000012 */
/*06f0*/ DFMA R22, R8, R22, R14 ; /* 0x000000160816722b */
/* 0x001e4c000000000e */
/*0700*/ DFMA R22, R12, R10, R22 ; /* 0x0000000a0c16722b */
/* 0x0020620000000016 */
/*0710*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0720*/ @!P0 BRA 0x150 ; /* 0xfffffa2000008947 */
/* 0x003fea000383ffff */
/*0730*/ STG.E.64 [R16.64], R22 ; /* 0x0000001610007986 */
/* 0x000fe2000c101b04 */
/*0740*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0750*/ BRA 0x750; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0760*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0770*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0780*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0790*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*07a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*07b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*07c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*07d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*07e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*07f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <inttypes.h>
#include <cuda.h>
#include <cuda_runtime.h>
#define BLOCK_WIDTH 32
#define TAILLE 2048
#define gettime(t) clock_gettime(CLOCK_MONOTONIC_RAW, t)
#define get_sub_seconde(t) (1e-9*(double)t.tv_nsec)
/** return time in second
*/
double get_elapsedtime(void)
{
struct timespec st;
int err = gettime(&st);
if (err !=0) return 0;
return (double)st.tv_sec + get_sub_seconde(st);
}
void init(double** A, double** B, double** C, int size)
{
int i = 0, j = 0;
srand(2019);
for(i = 0; i < size; i++)
{
for(j = 0; j < size; j++)
{
A[i][j] = rand();
B[i][j] = rand();
C[i][j] = 0.0;
}
}
}
void mult(double** A, double** B, double** C, int size)
{
int i = 0, j = 0, k = 0;
for(i = 0; i < size; i++)
{
for(j = 0; j < size; j++)
{
double sum = 0.;
for(k = 0; k < size; k++)
{
sum += A[i][k] * B[k][j];
}
C[i][j] = sum;
}
}
}
// QUESTION 4
__global__
void MulMatrixKernel(double* A, double* B, double* C, int N)
{
__shared__ double share_A[BLOCK_WIDTH][BLOCK_WIDTH];
__shared__ double share_B[BLOCK_WIDTH][BLOCK_WIDTH];
double sum = 0;
int col = threadIdx.x + blockDim.x * blockIdx.x;
int line = threadIdx.y + blockDim.y * blockIdx.y;
for(int tile = 0; tile < gridDim.x; tile++)
{
share_A[threadIdx.x][threadIdx.y] = A[line * N + tile * blockDim.x + threadIdx.x];
share_B[threadIdx.x][threadIdx.y] = B[(tile*blockIdx.y + threadIdx.y) * N + col];
__syncthreads();
for(int i = 0; i < BLOCK_WIDTH; i++)
{
sum += share_A[i][threadIdx.y]*share_B[threadIdx.x][i];
}
__syncthreads();
}
C[line * N + col] = sum;
}
// FIN QUESTION 4
int main(int argc, char** argv){
int N, i;
double *A_data;
double *B_data;
double *C_data;
double **A;
double **B;
double **C;
double t0 = 0., t1 = 0., duration = 0.;
N = (argc < 2)?TAILLE:atoi(argv[1]);
fprintf(stdout, "Matrix Multiplication\n Size: %dx%d\n", N, N);
// Memory allocation
A_data = (double*) malloc(sizeof(double) * N * N);
B_data = (double*) malloc(sizeof(double) * N * N);
C_data = (double*) malloc(sizeof(double) * N * N);
A = (double**) malloc(sizeof(double *) * N);
B = (double**) malloc(sizeof(double *) * N);
C = (double**) malloc(sizeof(double *) * N);
for(i = 0; i < N; i++)
{
A[i] = &A_data[i * N];
B[i] = &B_data[i * N];
C[i] = &C_data[i * N];
}
// Value initialization
init(A, B, C, N);
// QUESTION 8
cudaEvent_t start, stop;
cudaEventCreate(&start);
cudaEventCreate(&stop);
//FIN QUESTION 8
// QUESTION 1
double *d_A, *d_B, *d_C;
cudaMalloc(&d_A, sizeof(double) * N * N);
cudaMalloc(&d_B, sizeof(double) * N * N);
cudaMalloc(&d_C, sizeof(double) * N * N);
// FIN QUESTION 1
// QUESTION 2
cudaMemcpy(d_A, A_data, sizeof(double) * N * N, cudaMemcpyHostToDevice);
cudaMemcpy(d_B, B_data, sizeof(double) * N * N, cudaMemcpyHostToDevice);
cudaMemcpy(d_C, C_data, sizeof(double) * N * N, cudaMemcpyHostToDevice);
// FIN QUESTION 2
// QUESTION 3
int nbBlocks = N / BLOCK_WIDTH;
if(N % BLOCK_WIDTH) nbBlocks++;
dim3 gridSize(nbBlocks, nbBlocks);
dim3 blockSize(BLOCK_WIDTH, BLOCK_WIDTH);
// FIN QUESTION 3
// QUESTION 4
cudaEventRecord(start); // QUESTION 8
MulMatrixKernel<<<gridSize, blockSize>>>(d_A, d_B, d_C, N);
cudaEventRecord(stop); // QUESTION 8
// FIN QUESTION 4
// QUESTION 5
cudaMemcpy(C_data, d_C, sizeof(double) * N * N, cudaMemcpyDeviceToHost);
// FIN QUESTION 5
// QUESTION 8
cudaEventSynchronize(stop);
uint64_t nb_op = N * N * N;
float milliseconds = 0;
cudaEventElapsedTime(&milliseconds, start, stop);
printf("Matrice %dx%d\n\tTemps: %f s\n\tMFlops: %.2f\n", N, N, milliseconds/1000, (nb_op / (milliseconds/1000))*1E-6);
// FIN QUESTION 8
// Compute multiplication
t0 = get_elapsedtime();
// mult(A, B, C, N);
t1 = get_elapsedtime();
// Pretty print
duration = (t1 - t0);
fprintf(stdout, "Performance results: \n");
fprintf(stdout, " Time: %lf s\n", duration);
fprintf(stdout, " MFlops: %.2f\n", (nb_op / duration)*1E-6);
return 0;
} | .file "tmpxft_001155b8_00000000-6_dgemm_8.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2063:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2063:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z15get_elapsedtimev
.type _Z15get_elapsedtimev, @function
_Z15get_elapsedtimev:
.LFB2057:
.cfi_startproc
endbr64
subq $40, %rsp
.cfi_def_cfa_offset 48
movq %fs:40, %rax
movq %rax, 24(%rsp)
xorl %eax, %eax
movq %rsp, %rsi
movl $4, %edi
call clock_gettime@PLT
pxor %xmm0, %xmm0
testl %eax, %eax
jne .L3
pxor %xmm0, %xmm0
cvtsi2sdq 8(%rsp), %xmm0
mulsd .LC1(%rip), %xmm0
pxor %xmm1, %xmm1
cvtsi2sdq (%rsp), %xmm1
addsd %xmm1, %xmm0
.L3:
movq 24(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $40, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L8:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size _Z15get_elapsedtimev, .-_Z15get_elapsedtimev
.globl _Z4initPPdS0_S0_i
.type _Z4initPPdS0_S0_i, @function
_Z4initPPdS0_S0_i:
.LFB2058:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $8, %rsp
.cfi_def_cfa_offset 64
movq %rdi, %r15
movq %rsi, %r13
movq %rdx, %r12
movl %ecx, %ebx
movl $2019, %edi
call srand@PLT
testl %ebx, %ebx
jle .L9
movq %r15, %rbp
movslq %ebx, %rbx
leaq 0(,%rbx,8), %r14
addq %r14, %r15
.L11:
movl $0, %ebx
.L12:
call rand@PLT
movq 0(%rbp), %rdx
pxor %xmm0, %xmm0
cvtsi2sdl %eax, %xmm0
movsd %xmm0, (%rdx,%rbx)
call rand@PLT
movq 0(%r13), %rdx
pxor %xmm0, %xmm0
cvtsi2sdl %eax, %xmm0
movsd %xmm0, (%rdx,%rbx)
movq (%r12), %rax
movq $0x000000000, (%rax,%rbx)
addq $8, %rbx
cmpq %r14, %rbx
jne .L12
addq $8, %rbp
addq $8, %r13
addq $8, %r12
cmpq %r15, %rbp
jne .L11
.L9:
addq $8, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2058:
.size _Z4initPPdS0_S0_i, .-_Z4initPPdS0_S0_i
.globl _Z4multPPdS0_S0_i
.type _Z4multPPdS0_S0_i, @function
_Z4multPPdS0_S0_i:
.LFB2059:
.cfi_startproc
endbr64
movq %rdi, %r10
movq %rsi, %r8
movq %rdx, %r11
movl %ecx, %eax
testl %ecx, %ecx
jle .L15
cltq
leaq 0(,%rax,8), %rsi
movl $0, %r9d
.L17:
movl $0, %ecx
.L20:
movq (%r10,%r9), %rdi
movl $0, %eax
pxor %xmm1, %xmm1
.L18:
movq (%r8,%rax), %rdx
movsd (%rdx,%rcx), %xmm0
mulsd (%rdi,%rax), %xmm0
addsd %xmm0, %xmm1
addq $8, %rax
cmpq %rsi, %rax
jne .L18
movq (%r11,%r9), %rax
movsd %xmm1, (%rax,%rcx)
addq $8, %rcx
cmpq %rsi, %rcx
jne .L20
addq $8, %r9
cmpq %rsi, %r9
jne .L17
.L15:
ret
.cfi_endproc
.LFE2059:
.size _Z4multPPdS0_S0_i, .-_Z4multPPdS0_S0_i
.globl _Z40__device_stub__Z15MulMatrixKernelPdS_S_iPdS_S_i
.type _Z40__device_stub__Z15MulMatrixKernelPdS_S_iPdS_S_i, @function
_Z40__device_stub__Z15MulMatrixKernelPdS_S_iPdS_S_i:
.LFB2085:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L26
.L22:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L27
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L26:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z15MulMatrixKernelPdS_S_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L22
.L27:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2085:
.size _Z40__device_stub__Z15MulMatrixKernelPdS_S_iPdS_S_i, .-_Z40__device_stub__Z15MulMatrixKernelPdS_S_iPdS_S_i
.globl _Z15MulMatrixKernelPdS_S_i
.type _Z15MulMatrixKernelPdS_S_i, @function
_Z15MulMatrixKernelPdS_S_i:
.LFB2086:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z40__device_stub__Z15MulMatrixKernelPdS_S_iPdS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2086:
.size _Z15MulMatrixKernelPdS_S_i, .-_Z15MulMatrixKernelPdS_S_i
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC2:
.string "Matrix Multiplication\n Size: %dx%d\n"
.align 8
.LC6:
.string "Matrice %dx%d\n\tTemps: %f s\n\tMFlops: %.2f\n"
.section .rodata.str1.1,"aMS",@progbits,1
.LC7:
.string "Performance results: \n"
.LC8:
.string " Time: %lf s\n"
.LC9:
.string " MFlops: %.2f\n"
.text
.globl main
.type main, @function
main:
.LFB2060:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $120, %rsp
.cfi_def_cfa_offset 176
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
cmpl $1, %edi
jg .L45
movl $2048, %r8d
movl $2048, %ecx
leaq .LC2(%rip), %rdx
movl $2, %esi
movq stdout(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $33554432, %edi
call malloc@PLT
movq %rax, 8(%rsp)
movl $33554432, %edi
call malloc@PLT
movq %rax, 16(%rsp)
movl $33554432, %edi
call malloc@PLT
movq %rax, %r15
movl $16384, %edi
call malloc@PLT
movq %rax, %r12
movl $16384, %edi
call malloc@PLT
movq %rax, %rbp
movl $16384, %edi
call malloc@PLT
movq %rax, %rdx
movl $2048, %r13d
movl $16384, %ebx
movl $33554432, %r14d
.L40:
movq 8(%rsp), %r8
movq 16(%rsp), %rdi
movq %r15, %rsi
movl $0, %ecx
.L33:
movq %r8, (%r12,%rcx)
movq %rdi, 0(%rbp,%rcx)
movq %rsi, (%rdx,%rcx)
addq %rbx, %r8
addq %rbx, %rdi
addq %rbx, %rsi
addq $8, %rcx
cmpq %rbx, %rcx
jne .L33
.L32:
movl %r13d, %ecx
movq %rbp, %rsi
movq %r12, %rdi
call _Z4initPPdS0_S0_i
leaq 40(%rsp), %rdi
call cudaEventCreate@PLT
leaq 48(%rsp), %rdi
call cudaEventCreate@PLT
leaq 56(%rsp), %rdi
movq %r14, %rsi
call cudaMalloc@PLT
leaq 64(%rsp), %rdi
movq %r14, %rsi
call cudaMalloc@PLT
leaq 72(%rsp), %rdi
movq %r14, %rsi
call cudaMalloc@PLT
movl $1, %ecx
movq %r14, %rdx
movq 8(%rsp), %rsi
movq 56(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movq %r14, %rdx
movq 16(%rsp), %rsi
movq 64(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movq %r14, %rdx
movq %r15, %rsi
movq 72(%rsp), %rdi
call cudaMemcpy@PLT
leal 31(%r13), %eax
testl %r13d, %r13d
cmovns %r13d, %eax
sarl $5, %eax
movl %r13d, %edx
andl $31, %edx
cmpl $1, %edx
sbbl $-1, %eax
movl %eax, 80(%rsp)
movl %eax, 84(%rsp)
movl $1, 88(%rsp)
movl $32, 92(%rsp)
movl $32, 96(%rsp)
movl $1, 100(%rsp)
movl $0, %esi
movq 40(%rsp), %rdi
call cudaEventRecord@PLT
movl 100(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 92(%rsp), %rdx
movq 80(%rsp), %rdi
movl 88(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L46
.L35:
movl $0, %esi
movq 48(%rsp), %rdi
call cudaEventRecord@PLT
movl $2, %ecx
movq %r14, %rdx
movq 72(%rsp), %rsi
movq %r15, %rdi
call cudaMemcpy@PLT
movq 48(%rsp), %rdi
call cudaEventSynchronize@PLT
movl %r13d, %ebx
imull %r13d, %ebx
imull %r13d, %ebx
movslq %ebx, %rbx
movl $0x00000000, 36(%rsp)
leaq 36(%rsp), %rdi
movq 48(%rsp), %rdx
movq 40(%rsp), %rsi
call cudaEventElapsedTime@PLT
movss 36(%rsp), %xmm0
divss .LC4(%rip), %xmm0
testq %rbx, %rbx
js .L36
pxor %xmm1, %xmm1
cvtsi2ssq %rbx, %xmm1
.L37:
divss %xmm0, %xmm1
cvtss2sd %xmm1, %xmm1
cvtss2sd %xmm0, %xmm0
mulsd .LC5(%rip), %xmm1
movl %r13d, %ecx
movl %r13d, %edx
leaq .LC6(%rip), %rsi
movl $2, %edi
movl $2, %eax
call __printf_chk@PLT
call _Z15get_elapsedtimev
movsd %xmm0, 8(%rsp)
call _Z15get_elapsedtimev
movapd %xmm0, %xmm2
subsd 8(%rsp), %xmm2
movsd %xmm2, 8(%rsp)
leaq .LC7(%rip), %rdx
movl $2, %esi
movq stdout(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movsd 8(%rsp), %xmm0
leaq .LC8(%rip), %rdx
movl $2, %esi
movq stdout(%rip), %rdi
movl $1, %eax
call __fprintf_chk@PLT
testq %rbx, %rbx
js .L38
pxor %xmm0, %xmm0
cvtsi2sdq %rbx, %xmm0
.L39:
divsd 8(%rsp), %xmm0
mulsd .LC5(%rip), %xmm0
leaq .LC9(%rip), %rdx
movl $2, %esi
movq stdout(%rip), %rdi
movl $1, %eax
call __fprintf_chk@PLT
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L47
movl $0, %eax
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L45:
.cfi_restore_state
movq 8(%rsi), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, %rbx
movl %eax, %r13d
movl %eax, %r8d
movl %eax, %ecx
leaq .LC2(%rip), %rdx
movl $2, %esi
movq stdout(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movq %rbx, 24(%rsp)
movslq 24(%rsp), %rbx
movq %rbx, %r14
imulq %rbx, %r14
salq $3, %r14
movq %r14, %rdi
call malloc@PLT
movq %rax, 8(%rsp)
movq %r14, %rdi
call malloc@PLT
movq %rax, 16(%rsp)
movq %r14, %rdi
call malloc@PLT
movq %rax, %r15
salq $3, %rbx
movq %rbx, %rdi
call malloc@PLT
movq %rax, %r12
movq %rbx, %rdi
call malloc@PLT
movq %rax, %rbp
movq %rbx, %rdi
call malloc@PLT
movq %rax, %rdx
cmpl $0, 24(%rsp)
jg .L40
jmp .L32
.L46:
movl %r13d, %ecx
movq 72(%rsp), %rdx
movq 64(%rsp), %rsi
movq 56(%rsp), %rdi
call _Z40__device_stub__Z15MulMatrixKernelPdS_S_iPdS_S_i
jmp .L35
.L36:
movq %rbx, %rax
shrq %rax
movq %rbx, %rdx
andl $1, %edx
orq %rdx, %rax
pxor %xmm1, %xmm1
cvtsi2ssq %rax, %xmm1
addss %xmm1, %xmm1
jmp .L37
.L38:
movq %rbx, %rax
shrq %rax
andl $1, %ebx
orq %rbx, %rax
pxor %xmm0, %xmm0
cvtsi2sdq %rax, %xmm0
addsd %xmm0, %xmm0
jmp .L39
.L47:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2060:
.size main, .-main
.section .rodata.str1.1
.LC10:
.string "_Z15MulMatrixKernelPdS_S_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2088:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC10(%rip), %rdx
movq %rdx, %rcx
leaq _Z15MulMatrixKernelPdS_S_i(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2088:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC1:
.long -400107883
.long 1041313291
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC4:
.long 1148846080
.section .rodata.cst8
.align 8
.LC5:
.long -1598689907
.long 1051772663
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <inttypes.h>
#include <cuda.h>
#include <cuda_runtime.h>
#define BLOCK_WIDTH 32
#define TAILLE 2048
#define gettime(t) clock_gettime(CLOCK_MONOTONIC_RAW, t)
#define get_sub_seconde(t) (1e-9*(double)t.tv_nsec)
/** return time in second
*/
double get_elapsedtime(void)
{
struct timespec st;
int err = gettime(&st);
if (err !=0) return 0;
return (double)st.tv_sec + get_sub_seconde(st);
}
void init(double** A, double** B, double** C, int size)
{
int i = 0, j = 0;
srand(2019);
for(i = 0; i < size; i++)
{
for(j = 0; j < size; j++)
{
A[i][j] = rand();
B[i][j] = rand();
C[i][j] = 0.0;
}
}
}
void mult(double** A, double** B, double** C, int size)
{
int i = 0, j = 0, k = 0;
for(i = 0; i < size; i++)
{
for(j = 0; j < size; j++)
{
double sum = 0.;
for(k = 0; k < size; k++)
{
sum += A[i][k] * B[k][j];
}
C[i][j] = sum;
}
}
}
// QUESTION 4
__global__
void MulMatrixKernel(double* A, double* B, double* C, int N)
{
__shared__ double share_A[BLOCK_WIDTH][BLOCK_WIDTH];
__shared__ double share_B[BLOCK_WIDTH][BLOCK_WIDTH];
double sum = 0;
int col = threadIdx.x + blockDim.x * blockIdx.x;
int line = threadIdx.y + blockDim.y * blockIdx.y;
for(int tile = 0; tile < gridDim.x; tile++)
{
share_A[threadIdx.x][threadIdx.y] = A[line * N + tile * blockDim.x + threadIdx.x];
share_B[threadIdx.x][threadIdx.y] = B[(tile*blockIdx.y + threadIdx.y) * N + col];
__syncthreads();
for(int i = 0; i < BLOCK_WIDTH; i++)
{
sum += share_A[i][threadIdx.y]*share_B[threadIdx.x][i];
}
__syncthreads();
}
C[line * N + col] = sum;
}
// FIN QUESTION 4
int main(int argc, char** argv){
int N, i;
double *A_data;
double *B_data;
double *C_data;
double **A;
double **B;
double **C;
double t0 = 0., t1 = 0., duration = 0.;
N = (argc < 2)?TAILLE:atoi(argv[1]);
fprintf(stdout, "Matrix Multiplication\n Size: %dx%d\n", N, N);
// Memory allocation
A_data = (double*) malloc(sizeof(double) * N * N);
B_data = (double*) malloc(sizeof(double) * N * N);
C_data = (double*) malloc(sizeof(double) * N * N);
A = (double**) malloc(sizeof(double *) * N);
B = (double**) malloc(sizeof(double *) * N);
C = (double**) malloc(sizeof(double *) * N);
for(i = 0; i < N; i++)
{
A[i] = &A_data[i * N];
B[i] = &B_data[i * N];
C[i] = &C_data[i * N];
}
// Value initialization
init(A, B, C, N);
// QUESTION 8
cudaEvent_t start, stop;
cudaEventCreate(&start);
cudaEventCreate(&stop);
//FIN QUESTION 8
// QUESTION 1
double *d_A, *d_B, *d_C;
cudaMalloc(&d_A, sizeof(double) * N * N);
cudaMalloc(&d_B, sizeof(double) * N * N);
cudaMalloc(&d_C, sizeof(double) * N * N);
// FIN QUESTION 1
// QUESTION 2
cudaMemcpy(d_A, A_data, sizeof(double) * N * N, cudaMemcpyHostToDevice);
cudaMemcpy(d_B, B_data, sizeof(double) * N * N, cudaMemcpyHostToDevice);
cudaMemcpy(d_C, C_data, sizeof(double) * N * N, cudaMemcpyHostToDevice);
// FIN QUESTION 2
// QUESTION 3
int nbBlocks = N / BLOCK_WIDTH;
if(N % BLOCK_WIDTH) nbBlocks++;
dim3 gridSize(nbBlocks, nbBlocks);
dim3 blockSize(BLOCK_WIDTH, BLOCK_WIDTH);
// FIN QUESTION 3
// QUESTION 4
cudaEventRecord(start); // QUESTION 8
MulMatrixKernel<<<gridSize, blockSize>>>(d_A, d_B, d_C, N);
cudaEventRecord(stop); // QUESTION 8
// FIN QUESTION 4
// QUESTION 5
cudaMemcpy(C_data, d_C, sizeof(double) * N * N, cudaMemcpyDeviceToHost);
// FIN QUESTION 5
// QUESTION 8
cudaEventSynchronize(stop);
uint64_t nb_op = N * N * N;
float milliseconds = 0;
cudaEventElapsedTime(&milliseconds, start, stop);
printf("Matrice %dx%d\n\tTemps: %f s\n\tMFlops: %.2f\n", N, N, milliseconds/1000, (nb_op / (milliseconds/1000))*1E-6);
// FIN QUESTION 8
// Compute multiplication
t0 = get_elapsedtime();
// mult(A, B, C, N);
t1 = get_elapsedtime();
// Pretty print
duration = (t1 - t0);
fprintf(stdout, "Performance results: \n");
fprintf(stdout, " Time: %lf s\n", duration);
fprintf(stdout, " MFlops: %.2f\n", (nb_op / duration)*1E-6);
return 0;
} | #include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <inttypes.h>
#include <hip/hip_runtime.h>
#define BLOCK_WIDTH 32
#define TAILLE 2048
#define gettime(t) clock_gettime(CLOCK_MONOTONIC_RAW, t)
#define get_sub_seconde(t) (1e-9*(double)t.tv_nsec)
/** return time in second
*/
double get_elapsedtime(void)
{
struct timespec st;
int err = gettime(&st);
if (err !=0) return 0;
return (double)st.tv_sec + get_sub_seconde(st);
}
void init(double** A, double** B, double** C, int size)
{
int i = 0, j = 0;
srand(2019);
for(i = 0; i < size; i++)
{
for(j = 0; j < size; j++)
{
A[i][j] = rand();
B[i][j] = rand();
C[i][j] = 0.0;
}
}
}
void mult(double** A, double** B, double** C, int size)
{
int i = 0, j = 0, k = 0;
for(i = 0; i < size; i++)
{
for(j = 0; j < size; j++)
{
double sum = 0.;
for(k = 0; k < size; k++)
{
sum += A[i][k] * B[k][j];
}
C[i][j] = sum;
}
}
}
// QUESTION 4
__global__
void MulMatrixKernel(double* A, double* B, double* C, int N)
{
__shared__ double share_A[BLOCK_WIDTH][BLOCK_WIDTH];
__shared__ double share_B[BLOCK_WIDTH][BLOCK_WIDTH];
double sum = 0;
int col = threadIdx.x + blockDim.x * blockIdx.x;
int line = threadIdx.y + blockDim.y * blockIdx.y;
for(int tile = 0; tile < gridDim.x; tile++)
{
share_A[threadIdx.x][threadIdx.y] = A[line * N + tile * blockDim.x + threadIdx.x];
share_B[threadIdx.x][threadIdx.y] = B[(tile*blockIdx.y + threadIdx.y) * N + col];
__syncthreads();
for(int i = 0; i < BLOCK_WIDTH; i++)
{
sum += share_A[i][threadIdx.y]*share_B[threadIdx.x][i];
}
__syncthreads();
}
C[line * N + col] = sum;
}
// FIN QUESTION 4
int main(int argc, char** argv){
int N, i;
double *A_data;
double *B_data;
double *C_data;
double **A;
double **B;
double **C;
double t0 = 0., t1 = 0., duration = 0.;
N = (argc < 2)?TAILLE:atoi(argv[1]);
fprintf(stdout, "Matrix Multiplication\n Size: %dx%d\n", N, N);
// Memory allocation
A_data = (double*) malloc(sizeof(double) * N * N);
B_data = (double*) malloc(sizeof(double) * N * N);
C_data = (double*) malloc(sizeof(double) * N * N);
A = (double**) malloc(sizeof(double *) * N);
B = (double**) malloc(sizeof(double *) * N);
C = (double**) malloc(sizeof(double *) * N);
for(i = 0; i < N; i++)
{
A[i] = &A_data[i * N];
B[i] = &B_data[i * N];
C[i] = &C_data[i * N];
}
// Value initialization
init(A, B, C, N);
// QUESTION 8
hipEvent_t start, stop;
hipEventCreate(&start);
hipEventCreate(&stop);
//FIN QUESTION 8
// QUESTION 1
double *d_A, *d_B, *d_C;
hipMalloc(&d_A, sizeof(double) * N * N);
hipMalloc(&d_B, sizeof(double) * N * N);
hipMalloc(&d_C, sizeof(double) * N * N);
// FIN QUESTION 1
// QUESTION 2
hipMemcpy(d_A, A_data, sizeof(double) * N * N, hipMemcpyHostToDevice);
hipMemcpy(d_B, B_data, sizeof(double) * N * N, hipMemcpyHostToDevice);
hipMemcpy(d_C, C_data, sizeof(double) * N * N, hipMemcpyHostToDevice);
// FIN QUESTION 2
// QUESTION 3
int nbBlocks = N / BLOCK_WIDTH;
if(N % BLOCK_WIDTH) nbBlocks++;
dim3 gridSize(nbBlocks, nbBlocks);
dim3 blockSize(BLOCK_WIDTH, BLOCK_WIDTH);
// FIN QUESTION 3
// QUESTION 4
hipEventRecord(start); // QUESTION 8
MulMatrixKernel<<<gridSize, blockSize>>>(d_A, d_B, d_C, N);
hipEventRecord(stop); // QUESTION 8
// FIN QUESTION 4
// QUESTION 5
hipMemcpy(C_data, d_C, sizeof(double) * N * N, hipMemcpyDeviceToHost);
// FIN QUESTION 5
// QUESTION 8
hipEventSynchronize(stop);
uint64_t nb_op = N * N * N;
float milliseconds = 0;
hipEventElapsedTime(&milliseconds, start, stop);
printf("Matrice %dx%d\n\tTemps: %f s\n\tMFlops: %.2f\n", N, N, milliseconds/1000, (nb_op / (milliseconds/1000))*1E-6);
// FIN QUESTION 8
// Compute multiplication
t0 = get_elapsedtime();
// mult(A, B, C, N);
t1 = get_elapsedtime();
// Pretty print
duration = (t1 - t0);
fprintf(stdout, "Performance results: \n");
fprintf(stdout, " Time: %lf s\n", duration);
fprintf(stdout, " MFlops: %.2f\n", (nb_op / duration)*1E-6);
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <inttypes.h>
#include <hip/hip_runtime.h>
#define BLOCK_WIDTH 32
#define TAILLE 2048
#define gettime(t) clock_gettime(CLOCK_MONOTONIC_RAW, t)
#define get_sub_seconde(t) (1e-9*(double)t.tv_nsec)
/** return time in second
*/
double get_elapsedtime(void)
{
struct timespec st;
int err = gettime(&st);
if (err !=0) return 0;
return (double)st.tv_sec + get_sub_seconde(st);
}
void init(double** A, double** B, double** C, int size)
{
int i = 0, j = 0;
srand(2019);
for(i = 0; i < size; i++)
{
for(j = 0; j < size; j++)
{
A[i][j] = rand();
B[i][j] = rand();
C[i][j] = 0.0;
}
}
}
void mult(double** A, double** B, double** C, int size)
{
int i = 0, j = 0, k = 0;
for(i = 0; i < size; i++)
{
for(j = 0; j < size; j++)
{
double sum = 0.;
for(k = 0; k < size; k++)
{
sum += A[i][k] * B[k][j];
}
C[i][j] = sum;
}
}
}
// QUESTION 4
__global__
void MulMatrixKernel(double* A, double* B, double* C, int N)
{
__shared__ double share_A[BLOCK_WIDTH][BLOCK_WIDTH];
__shared__ double share_B[BLOCK_WIDTH][BLOCK_WIDTH];
double sum = 0;
int col = threadIdx.x + blockDim.x * blockIdx.x;
int line = threadIdx.y + blockDim.y * blockIdx.y;
for(int tile = 0; tile < gridDim.x; tile++)
{
share_A[threadIdx.x][threadIdx.y] = A[line * N + tile * blockDim.x + threadIdx.x];
share_B[threadIdx.x][threadIdx.y] = B[(tile*blockIdx.y + threadIdx.y) * N + col];
__syncthreads();
for(int i = 0; i < BLOCK_WIDTH; i++)
{
sum += share_A[i][threadIdx.y]*share_B[threadIdx.x][i];
}
__syncthreads();
}
C[line * N + col] = sum;
}
// FIN QUESTION 4
int main(int argc, char** argv){
int N, i;
double *A_data;
double *B_data;
double *C_data;
double **A;
double **B;
double **C;
double t0 = 0., t1 = 0., duration = 0.;
N = (argc < 2)?TAILLE:atoi(argv[1]);
fprintf(stdout, "Matrix Multiplication\n Size: %dx%d\n", N, N);
// Memory allocation
A_data = (double*) malloc(sizeof(double) * N * N);
B_data = (double*) malloc(sizeof(double) * N * N);
C_data = (double*) malloc(sizeof(double) * N * N);
A = (double**) malloc(sizeof(double *) * N);
B = (double**) malloc(sizeof(double *) * N);
C = (double**) malloc(sizeof(double *) * N);
for(i = 0; i < N; i++)
{
A[i] = &A_data[i * N];
B[i] = &B_data[i * N];
C[i] = &C_data[i * N];
}
// Value initialization
init(A, B, C, N);
// QUESTION 8
hipEvent_t start, stop;
hipEventCreate(&start);
hipEventCreate(&stop);
//FIN QUESTION 8
// QUESTION 1
double *d_A, *d_B, *d_C;
hipMalloc(&d_A, sizeof(double) * N * N);
hipMalloc(&d_B, sizeof(double) * N * N);
hipMalloc(&d_C, sizeof(double) * N * N);
// FIN QUESTION 1
// QUESTION 2
hipMemcpy(d_A, A_data, sizeof(double) * N * N, hipMemcpyHostToDevice);
hipMemcpy(d_B, B_data, sizeof(double) * N * N, hipMemcpyHostToDevice);
hipMemcpy(d_C, C_data, sizeof(double) * N * N, hipMemcpyHostToDevice);
// FIN QUESTION 2
// QUESTION 3
int nbBlocks = N / BLOCK_WIDTH;
if(N % BLOCK_WIDTH) nbBlocks++;
dim3 gridSize(nbBlocks, nbBlocks);
dim3 blockSize(BLOCK_WIDTH, BLOCK_WIDTH);
// FIN QUESTION 3
// QUESTION 4
hipEventRecord(start); // QUESTION 8
MulMatrixKernel<<<gridSize, blockSize>>>(d_A, d_B, d_C, N);
hipEventRecord(stop); // QUESTION 8
// FIN QUESTION 4
// QUESTION 5
hipMemcpy(C_data, d_C, sizeof(double) * N * N, hipMemcpyDeviceToHost);
// FIN QUESTION 5
// QUESTION 8
hipEventSynchronize(stop);
uint64_t nb_op = N * N * N;
float milliseconds = 0;
hipEventElapsedTime(&milliseconds, start, stop);
printf("Matrice %dx%d\n\tTemps: %f s\n\tMFlops: %.2f\n", N, N, milliseconds/1000, (nb_op / (milliseconds/1000))*1E-6);
// FIN QUESTION 8
// Compute multiplication
t0 = get_elapsedtime();
// mult(A, B, C, N);
t1 = get_elapsedtime();
// Pretty print
duration = (t1 - t0);
fprintf(stdout, "Performance results: \n");
fprintf(stdout, " Time: %lf s\n", duration);
fprintf(stdout, " MFlops: %.2f\n", (nb_op / duration)*1E-6);
return 0;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z15MulMatrixKernelPdS_S_i
.globl _Z15MulMatrixKernelPdS_S_i
.p2align 8
.type _Z15MulMatrixKernelPdS_S_i,@function
_Z15MulMatrixKernelPdS_S_i:
s_clause 0x2
s_load_b32 s4, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x20
s_load_b32 s2, s[0:1], 0x18
v_and_b32_e32 v4, 0x3ff, v0
v_bfe_u32 v3, v0, 10, 10
s_mov_b32 s9, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s8, s4, 0xffff
s_lshr_b32 s4, s4, 16
v_mad_u64_u32 v[0:1], null, s14, s8, v[4:5]
v_mad_u64_u32 v[1:2], null, s15, s4, v[3:4]
s_cmp_eq_u32 s3, 0
s_cbranch_scc1 .LBB0_5
s_load_b128 s[4:7], s[0:1], 0x0
v_dual_mov_b32 v10, 0 :: v_dual_lshlrev_b32 v5, 8, v4
v_lshlrev_b32_e32 v2, 3, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_nc_u32_e32 v8, 0x2000, v5
v_mad_u64_u32 v[6:7], null, v1, s2, v[4:5]
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v7, v5, v2
v_mov_b32_e32 v5, 0
v_add_nc_u32_e32 v9, v8, v2
s_set_inst_prefetch_distance 0x1
.p2align 6
.LBB0_2:
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
v_mad_u64_u32 v[11:12], null, s9, s15, v[3:4]
v_mad_u64_u32 v[12:13], null, s9, s8, v[6:7]
v_mov_b32_e32 v13, v10
s_mov_b32 s10, 0
v_mad_u64_u32 v[14:15], null, v11, s2, v[0:1]
v_mov_b32_e32 v15, v10
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[11:12], 3, v[12:13]
v_lshlrev_b64 v[13:14], 3, v[14:15]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v11, vcc_lo, s4, v11
v_add_co_ci_u32_e32 v12, vcc_lo, s5, v12, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v13, vcc_lo, s6, v13
v_add_co_ci_u32_e32 v14, vcc_lo, s7, v14, vcc_lo
global_load_b64 v[15:16], v[11:12], off
global_load_b64 v[12:13], v[13:14], off
v_mov_b32_e32 v11, v2
s_waitcnt vmcnt(1)
ds_store_b64 v7, v[15:16]
s_waitcnt vmcnt(0)
ds_store_b64 v9, v[12:13]
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB0_3:
v_add_nc_u32_e32 v14, s10, v8
s_add_i32 s10, s10, 8
ds_load_b64 v[12:13], v11
ds_load_b64 v[14:15], v14
v_add_nc_u32_e32 v11, 0x100, v11
s_cmpk_eq_i32 s10, 0x100
s_waitcnt lgkmcnt(0)
v_fma_f64 v[4:5], v[12:13], v[14:15], v[4:5]
s_cbranch_scc0 .LBB0_3
s_add_i32 s9, s9, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s9, s3
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB0_2
s_branch .LBB0_6
.LBB0_5:
v_mov_b32_e32 v4, 0
v_mov_b32_e32 v5, 0
.LBB0_6:
s_set_inst_prefetch_distance 0x2
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, v1, s2, v[0:1]
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 3, v[2:3]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b64 v[0:1], v[4:5], off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z15MulMatrixKernelPdS_S_i
.amdhsa_group_segment_fixed_size 16384
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 17
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z15MulMatrixKernelPdS_S_i, .Lfunc_end0-_Z15MulMatrixKernelPdS_S_i
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 16384
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z15MulMatrixKernelPdS_S_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z15MulMatrixKernelPdS_S_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 17
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <inttypes.h>
#include <hip/hip_runtime.h>
#define BLOCK_WIDTH 32
#define TAILLE 2048
#define gettime(t) clock_gettime(CLOCK_MONOTONIC_RAW, t)
#define get_sub_seconde(t) (1e-9*(double)t.tv_nsec)
/** return time in second
*/
double get_elapsedtime(void)
{
struct timespec st;
int err = gettime(&st);
if (err !=0) return 0;
return (double)st.tv_sec + get_sub_seconde(st);
}
void init(double** A, double** B, double** C, int size)
{
int i = 0, j = 0;
srand(2019);
for(i = 0; i < size; i++)
{
for(j = 0; j < size; j++)
{
A[i][j] = rand();
B[i][j] = rand();
C[i][j] = 0.0;
}
}
}
void mult(double** A, double** B, double** C, int size)
{
int i = 0, j = 0, k = 0;
for(i = 0; i < size; i++)
{
for(j = 0; j < size; j++)
{
double sum = 0.;
for(k = 0; k < size; k++)
{
sum += A[i][k] * B[k][j];
}
C[i][j] = sum;
}
}
}
// QUESTION 4
__global__
void MulMatrixKernel(double* A, double* B, double* C, int N)
{
__shared__ double share_A[BLOCK_WIDTH][BLOCK_WIDTH];
__shared__ double share_B[BLOCK_WIDTH][BLOCK_WIDTH];
double sum = 0;
int col = threadIdx.x + blockDim.x * blockIdx.x;
int line = threadIdx.y + blockDim.y * blockIdx.y;
for(int tile = 0; tile < gridDim.x; tile++)
{
share_A[threadIdx.x][threadIdx.y] = A[line * N + tile * blockDim.x + threadIdx.x];
share_B[threadIdx.x][threadIdx.y] = B[(tile*blockIdx.y + threadIdx.y) * N + col];
__syncthreads();
for(int i = 0; i < BLOCK_WIDTH; i++)
{
sum += share_A[i][threadIdx.y]*share_B[threadIdx.x][i];
}
__syncthreads();
}
C[line * N + col] = sum;
}
// FIN QUESTION 4
int main(int argc, char** argv){
int N, i;
double *A_data;
double *B_data;
double *C_data;
double **A;
double **B;
double **C;
double t0 = 0., t1 = 0., duration = 0.;
N = (argc < 2)?TAILLE:atoi(argv[1]);
fprintf(stdout, "Matrix Multiplication\n Size: %dx%d\n", N, N);
// Memory allocation
A_data = (double*) malloc(sizeof(double) * N * N);
B_data = (double*) malloc(sizeof(double) * N * N);
C_data = (double*) malloc(sizeof(double) * N * N);
A = (double**) malloc(sizeof(double *) * N);
B = (double**) malloc(sizeof(double *) * N);
C = (double**) malloc(sizeof(double *) * N);
for(i = 0; i < N; i++)
{
A[i] = &A_data[i * N];
B[i] = &B_data[i * N];
C[i] = &C_data[i * N];
}
// Value initialization
init(A, B, C, N);
// QUESTION 8
hipEvent_t start, stop;
hipEventCreate(&start);
hipEventCreate(&stop);
//FIN QUESTION 8
// QUESTION 1
double *d_A, *d_B, *d_C;
hipMalloc(&d_A, sizeof(double) * N * N);
hipMalloc(&d_B, sizeof(double) * N * N);
hipMalloc(&d_C, sizeof(double) * N * N);
// FIN QUESTION 1
// QUESTION 2
hipMemcpy(d_A, A_data, sizeof(double) * N * N, hipMemcpyHostToDevice);
hipMemcpy(d_B, B_data, sizeof(double) * N * N, hipMemcpyHostToDevice);
hipMemcpy(d_C, C_data, sizeof(double) * N * N, hipMemcpyHostToDevice);
// FIN QUESTION 2
// QUESTION 3
int nbBlocks = N / BLOCK_WIDTH;
if(N % BLOCK_WIDTH) nbBlocks++;
dim3 gridSize(nbBlocks, nbBlocks);
dim3 blockSize(BLOCK_WIDTH, BLOCK_WIDTH);
// FIN QUESTION 3
// QUESTION 4
hipEventRecord(start); // QUESTION 8
MulMatrixKernel<<<gridSize, blockSize>>>(d_A, d_B, d_C, N);
hipEventRecord(stop); // QUESTION 8
// FIN QUESTION 4
// QUESTION 5
hipMemcpy(C_data, d_C, sizeof(double) * N * N, hipMemcpyDeviceToHost);
// FIN QUESTION 5
// QUESTION 8
hipEventSynchronize(stop);
uint64_t nb_op = N * N * N;
float milliseconds = 0;
hipEventElapsedTime(&milliseconds, start, stop);
printf("Matrice %dx%d\n\tTemps: %f s\n\tMFlops: %.2f\n", N, N, milliseconds/1000, (nb_op / (milliseconds/1000))*1E-6);
// FIN QUESTION 8
// Compute multiplication
t0 = get_elapsedtime();
// mult(A, B, C, N);
t1 = get_elapsedtime();
// Pretty print
duration = (t1 - t0);
fprintf(stdout, "Performance results: \n");
fprintf(stdout, " Time: %lf s\n", duration);
fprintf(stdout, " MFlops: %.2f\n", (nb_op / duration)*1E-6);
return 0;
} | .text
.file "dgemm_8.hip"
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function _Z15get_elapsedtimev
.LCPI0_0:
.quad 0x3e112e0be826d695 # double 1.0000000000000001E-9
.text
.globl _Z15get_elapsedtimev
.p2align 4, 0x90
.type _Z15get_elapsedtimev,@function
_Z15get_elapsedtimev: # @_Z15get_elapsedtimev
.cfi_startproc
# %bb.0:
subq $24, %rsp
.cfi_def_cfa_offset 32
leaq 8(%rsp), %rsi
movl $4, %edi
callq clock_gettime
xorps %xmm0, %xmm0
testl %eax, %eax
je .LBB0_1
# %bb.2:
addq $24, %rsp
.cfi_def_cfa_offset 8
retq
.LBB0_1:
.cfi_def_cfa_offset 32
cvtsi2sdq 8(%rsp), %xmm1
xorps %xmm0, %xmm0
cvtsi2sdq 16(%rsp), %xmm0
mulsd .LCPI0_0(%rip), %xmm0
addsd %xmm1, %xmm0
addq $24, %rsp
.cfi_def_cfa_offset 8
retq
.Lfunc_end0:
.size _Z15get_elapsedtimev, .Lfunc_end0-_Z15get_elapsedtimev
.cfi_endproc
# -- End function
.globl _Z4initPPdS0_S0_i # -- Begin function _Z4initPPdS0_S0_i
.p2align 4, 0x90
.type _Z4initPPdS0_S0_i,@function
_Z4initPPdS0_S0_i: # @_Z4initPPdS0_S0_i
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
pushq %rax
.cfi_def_cfa_offset 64
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %ecx, %ebp
movq %rdx, %rbx
movq %rsi, %r14
movq %rdi, %r15
movl $2019, %edi # imm = 0x7E3
callq srand
testl %ebp, %ebp
jle .LBB1_5
# %bb.1: # %.preheader.lr.ph
movl %ebp, %r12d
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB1_2: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB1_3 Depth 2
xorl %ebp, %ebp
.p2align 4, 0x90
.LBB1_3: # Parent Loop BB1_2 Depth=1
# => This Inner Loop Header: Depth=2
callq rand
xorps %xmm0, %xmm0
cvtsi2sd %eax, %xmm0
movq (%r15,%r13,8), %rax
movsd %xmm0, (%rax,%rbp,8)
callq rand
xorps %xmm0, %xmm0
cvtsi2sd %eax, %xmm0
movq (%r14,%r13,8), %rax
movsd %xmm0, (%rax,%rbp,8)
movq (%rbx,%r13,8), %rax
movq $0, (%rax,%rbp,8)
incq %rbp
cmpq %rbp, %r12
jne .LBB1_3
# %bb.4: # %._crit_edge
# in Loop: Header=BB1_2 Depth=1
incq %r13
cmpq %r12, %r13
jne .LBB1_2
.LBB1_5: # %._crit_edge18
addq $8, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size _Z4initPPdS0_S0_i, .Lfunc_end1-_Z4initPPdS0_S0_i
.cfi_endproc
# -- End function
.globl _Z4multPPdS0_S0_i # -- Begin function _Z4multPPdS0_S0_i
.p2align 4, 0x90
.type _Z4multPPdS0_S0_i,@function
_Z4multPPdS0_S0_i: # @_Z4multPPdS0_S0_i
.cfi_startproc
# %bb.0:
testl %ecx, %ecx
jle .LBB2_8
# %bb.1: # %.preheader23.lr.ph
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset %rbx, -16
movl %ecx, %eax
xorl %ecx, %ecx
.p2align 4, 0x90
.LBB2_2: # %.preheader23
# =>This Loop Header: Depth=1
# Child Loop BB2_3 Depth 2
# Child Loop BB2_4 Depth 3
movq (%rdx,%rcx,8), %r8
movq (%rdi,%rcx,8), %r9
xorl %r10d, %r10d
.p2align 4, 0x90
.LBB2_3: # %.preheader
# Parent Loop BB2_2 Depth=1
# => This Loop Header: Depth=2
# Child Loop BB2_4 Depth 3
xorpd %xmm0, %xmm0
xorl %r11d, %r11d
.p2align 4, 0x90
.LBB2_4: # Parent Loop BB2_2 Depth=1
# Parent Loop BB2_3 Depth=2
# => This Inner Loop Header: Depth=3
movsd (%r9,%r11,8), %xmm1 # xmm1 = mem[0],zero
movq (%rsi,%r11,8), %rbx
mulsd (%rbx,%r10,8), %xmm1
addsd %xmm1, %xmm0
incq %r11
cmpq %r11, %rax
jne .LBB2_4
# %bb.5: # %._crit_edge
# in Loop: Header=BB2_3 Depth=2
movsd %xmm0, (%r8,%r10,8)
incq %r10
cmpq %rax, %r10
jne .LBB2_3
# %bb.6: # %._crit_edge27
# in Loop: Header=BB2_2 Depth=1
incq %rcx
cmpq %rax, %rcx
jne .LBB2_2
# %bb.7:
popq %rbx
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.LBB2_8: # %._crit_edge29
retq
.Lfunc_end2:
.size _Z4multPPdS0_S0_i, .Lfunc_end2-_Z4multPPdS0_S0_i
.cfi_endproc
# -- End function
.globl _Z30__device_stub__MulMatrixKernelPdS_S_i # -- Begin function _Z30__device_stub__MulMatrixKernelPdS_S_i
.p2align 4, 0x90
.type _Z30__device_stub__MulMatrixKernelPdS_S_i,@function
_Z30__device_stub__MulMatrixKernelPdS_S_i: # @_Z30__device_stub__MulMatrixKernelPdS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z15MulMatrixKernelPdS_S_i, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end3:
.size _Z30__device_stub__MulMatrixKernelPdS_S_i, .Lfunc_end3-_Z30__device_stub__MulMatrixKernelPdS_S_i
.cfi_endproc
# -- End function
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function main
.LCPI4_0:
.long 0x447a0000 # float 1000
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0
.LCPI4_1:
.quad 0x3eb0c6f7a0b5ed8d # double 9.9999999999999995E-7
.LCPI4_2:
.quad 0x3e112e0be826d695 # double 1.0000000000000001E-9
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0
.LCPI4_3:
.long 1127219200 # 0x43300000
.long 1160773632 # 0x45300000
.long 0 # 0x0
.long 0 # 0x0
.LCPI4_4:
.quad 0x4330000000000000 # double 4503599627370496
.quad 0x4530000000000000 # double 1.9342813113834067E+25
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $200, %rsp
.cfi_def_cfa_offset 256
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl $2048, %r14d # imm = 0x800
cmpl $2, %edi
jl .LBB4_2
# %bb.1:
movq 8(%rsi), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %r14
.LBB4_2:
movq stdout(%rip), %rdi
movl $.L.str, %esi
movl %r14d, %edx
movl %r14d, %ecx
xorl %eax, %eax
callq fprintf
movslq %r14d, %rbx
leaq (,%rbx,8), %r12
movq %r12, %r15
imulq %rbx, %r15
movq %r15, %rdi
callq malloc
movq %rax, 56(%rsp) # 8-byte Spill
movq %r15, %rdi
callq malloc
movq %rax, 64(%rsp) # 8-byte Spill
movq %r15, 136(%rsp) # 8-byte Spill
movq %r15, %rdi
callq malloc
movq %rax, 16(%rsp) # 8-byte Spill
movq %r12, %rdi
callq malloc
movq %rax, %rbp
movq %r12, %rdi
callq malloc
movq %rax, %r15
movq %r12, %rdi
callq malloc
movq %rax, %r12
movl %r14d, %r13d
testl %ebx, %ebx
jle .LBB4_5
# %bb.3: # %.lr.ph.preheader
leaq (,%r13,8), %rax
xorl %ecx, %ecx
movq 56(%rsp), %rdx # 8-byte Reload
movq 64(%rsp), %rsi # 8-byte Reload
movq 16(%rsp), %rdi # 8-byte Reload
.p2align 4, 0x90
.LBB4_4: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movq %rdx, (%rbp,%rcx,8)
movq %rsi, (%r15,%rcx,8)
movq %rdi, (%r12,%rcx,8)
incq %rcx
addq %rax, %rdi
addq %rax, %rsi
addq %rax, %rdx
cmpq %rcx, %r13
jne .LBB4_4
.LBB4_5: # %._crit_edge
movl $2019, %edi # imm = 0x7E3
callq srand
movq %r14, 8(%rsp) # 8-byte Spill
testl %r14d, %r14d
jle .LBB4_10
# %bb.6: # %.preheader.lr.ph.i
xorl %ebx, %ebx
.p2align 4, 0x90
.LBB4_7: # %.preheader.i
# =>This Loop Header: Depth=1
# Child Loop BB4_8 Depth 2
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB4_8: # Parent Loop BB4_7 Depth=1
# => This Inner Loop Header: Depth=2
callq rand
xorps %xmm0, %xmm0
cvtsi2sd %eax, %xmm0
movq (%rbp,%rbx,8), %rax
movsd %xmm0, (%rax,%r14,8)
callq rand
xorps %xmm0, %xmm0
cvtsi2sd %eax, %xmm0
movq (%r15,%rbx,8), %rax
movsd %xmm0, (%rax,%r14,8)
movq (%r12,%rbx,8), %rax
movq $0, (%rax,%r14,8)
incq %r14
cmpq %r14, %r13
jne .LBB4_8
# %bb.9: # %._crit_edge.i
# in Loop: Header=BB4_7 Depth=1
incq %rbx
cmpq %r13, %rbx
jne .LBB4_7
.LBB4_10: # %_Z4initPPdS0_S0_i.exit
leaq 88(%rsp), %rdi
callq hipEventCreate
leaq 32(%rsp), %rdi
callq hipEventCreate
leaq 80(%rsp), %rdi
movq 136(%rsp), %rbx # 8-byte Reload
movq %rbx, %rsi
callq hipMalloc
leaq 72(%rsp), %rdi
movq %rbx, %rsi
callq hipMalloc
leaq 24(%rsp), %rdi
movq %rbx, %rsi
callq hipMalloc
movq 80(%rsp), %rdi
movq 56(%rsp), %rsi # 8-byte Reload
movq %rbx, %rdx
movl $1, %ecx
callq hipMemcpy
movq 72(%rsp), %rdi
movq 64(%rsp), %rsi # 8-byte Reload
movq %rbx, %rdx
movl $1, %ecx
callq hipMemcpy
movq 24(%rsp), %rdi
movq 16(%rsp), %r12 # 8-byte Reload
movq %r12, %rsi
movq %rbx, %rdx
movl $1, %ecx
callq hipMemcpy
movq 8(%rsp), %r14 # 8-byte Reload
leal 31(%r14), %eax
testl %r14d, %r14d
cmovnsl %r14d, %eax
sarl $5, %eax
movl %r14d, %ecx
andl $31, %ecx
cmpl $1, %ecx
sbbl $-1, %eax
movq %rax, %r15
shlq $32, %r15
orq %rax, %r15
movq 88(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movabsq $137438953504, %rdx # imm = 0x2000000020
movq %r15, %rdi
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB4_12
# %bb.11:
movq 80(%rsp), %rax
movq 72(%rsp), %rcx
movq 24(%rsp), %rdx
movq %rax, 192(%rsp)
movq %rcx, 184(%rsp)
movq %rdx, 176(%rsp)
movl %r14d, 52(%rsp)
leaq 192(%rsp), %rax
movq %rax, 96(%rsp)
leaq 184(%rsp), %rax
movq %rax, 104(%rsp)
leaq 176(%rsp), %rax
movq %rax, 112(%rsp)
leaq 52(%rsp), %rax
movq %rax, 120(%rsp)
leaq 40(%rsp), %rdi
leaq 160(%rsp), %rsi
leaq 152(%rsp), %rdx
leaq 144(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 160(%rsp), %rcx
movl 168(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z15MulMatrixKernelPdS_S_i, %edi
pushq 144(%rsp)
.cfi_adjust_cfa_offset 8
pushq 160(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB4_12:
movq 32(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq 24(%rsp), %rsi
movq %r12, %rdi
movq %rbx, %rdx
movl $2, %ecx
callq hipMemcpy
movq 32(%rsp), %rdi
callq hipEventSynchronize
movl %r14d, %ebx
imull %ebx, %ebx
imull %r14d, %ebx
movslq %ebx, %r14
movl $0, 40(%rsp)
movq 88(%rsp), %rsi
movq 32(%rsp), %rdx
leaq 40(%rsp), %rdi
callq hipEventElapsedTime
movss 40(%rsp), %xmm1 # xmm1 = mem[0],zero,zero,zero
divss .LCPI4_0(%rip), %xmm1
cvtss2sd %xmm1, %xmm0
testq %r14, %r14
js .LBB4_13
# %bb.14:
cvtsi2ss %ebx, %xmm2
jmp .LBB4_15
.LBB4_13:
movq %r14, %rax
shrq %rax
andl $1, %ebx
orq %rax, %rbx
cvtsi2ss %rbx, %xmm2
addss %xmm2, %xmm2
.LBB4_15:
divss %xmm1, %xmm2
xorps %xmm1, %xmm1
cvtss2sd %xmm2, %xmm1
mulsd .LCPI4_1(%rip), %xmm1
movl $.L.str.1, %edi
movq 8(%rsp), %rdx # 8-byte Reload
movl %edx, %esi
# kill: def $edx killed $edx killed $rdx
movb $2, %al
callq printf
leaq 96(%rsp), %rsi
movl $4, %edi
callq clock_gettime
xorps %xmm0, %xmm0
movsd %xmm0, 8(%rsp) # 8-byte Spill
xorpd %xmm1, %xmm1
testl %eax, %eax
jne .LBB4_17
# %bb.16:
xorps %xmm0, %xmm0
cvtsi2sdq 96(%rsp), %xmm0
xorps %xmm1, %xmm1
cvtsi2sdq 104(%rsp), %xmm1
mulsd .LCPI4_2(%rip), %xmm1
addsd %xmm0, %xmm1
.LBB4_17: # %_Z15get_elapsedtimev.exit
movsd %xmm1, 16(%rsp) # 8-byte Spill
leaq 96(%rsp), %rsi
movl $4, %edi
callq clock_gettime
testl %eax, %eax
jne .LBB4_19
# %bb.18:
xorps %xmm0, %xmm0
cvtsi2sdq 96(%rsp), %xmm0
xorps %xmm1, %xmm1
cvtsi2sdq 104(%rsp), %xmm1
mulsd .LCPI4_2(%rip), %xmm1
addsd %xmm0, %xmm1
movsd %xmm1, 8(%rsp) # 8-byte Spill
.LBB4_19: # %_Z15get_elapsedtimev.exit80
movsd 8(%rsp), %xmm0 # 8-byte Reload
# xmm0 = mem[0],zero
subsd 16(%rsp), %xmm0 # 8-byte Folded Reload
movsd %xmm0, 8(%rsp) # 8-byte Spill
movq stdout(%rip), %rcx
movl $.L.str.2, %edi
movl $22, %esi
movl $1, %edx
callq fwrite@PLT
movq stdout(%rip), %rdi
movl $.L.str.3, %esi
movsd 8(%rsp), %xmm0 # 8-byte Reload
# xmm0 = mem[0],zero
movb $1, %al
callq fprintf
movq stdout(%rip), %rdi
movq %r14, %xmm1
punpckldq .LCPI4_3(%rip), %xmm1 # xmm1 = xmm1[0],mem[0],xmm1[1],mem[1]
subpd .LCPI4_4(%rip), %xmm1
movapd %xmm1, %xmm0
unpckhpd %xmm1, %xmm0 # xmm0 = xmm0[1],xmm1[1]
addsd %xmm1, %xmm0
divsd 8(%rsp), %xmm0 # 8-byte Folded Reload
mulsd .LCPI4_1(%rip), %xmm0
movl $.L.str.4, %esi
movb $1, %al
callq fprintf
xorl %eax, %eax
addq $200, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end4:
.size main, .Lfunc_end4-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB5_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB5_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z15MulMatrixKernelPdS_S_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end5:
.size __hip_module_ctor, .Lfunc_end5-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB6_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB6_2:
retq
.Lfunc_end6:
.size __hip_module_dtor, .Lfunc_end6-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z15MulMatrixKernelPdS_S_i,@object # @_Z15MulMatrixKernelPdS_S_i
.section .rodata,"a",@progbits
.globl _Z15MulMatrixKernelPdS_S_i
.p2align 3, 0x0
_Z15MulMatrixKernelPdS_S_i:
.quad _Z30__device_stub__MulMatrixKernelPdS_S_i
.size _Z15MulMatrixKernelPdS_S_i, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Matrix Multiplication\n Size: %dx%d\n"
.size .L.str, 37
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "Matrice %dx%d\n\tTemps: %f s\n\tMFlops: %.2f\n"
.size .L.str.1, 42
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "Performance results: \n"
.size .L.str.2, 23
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz " Time: %lf s\n"
.size .L.str.3, 15
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz " MFlops: %.2f\n"
.size .L.str.4, 16
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z15MulMatrixKernelPdS_S_i"
.size .L__unnamed_1, 27
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z30__device_stub__MulMatrixKernelPdS_S_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z15MulMatrixKernelPdS_S_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z15MulMatrixKernelPdS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e220000002500 */
/*0020*/ ISETP.NE.AND P0, PT, RZ, c[0x0][0xc], PT ; /* 0x00000300ff007a0c */
/* 0x000fe20003f05270 */
/*0030*/ HFMA2.MMA R17, -RZ, RZ, 0, 4.76837158203125e-07 ; /* 0x00000008ff117435 */
/* 0x000fe200000001ff */
/*0040*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0050*/ S2R R9, SR_TID.X ; /* 0x0000000000097919 */
/* 0x000e220000002100 */
/*0060*/ CS2R R22, SRZ ; /* 0x0000000000167805 */
/* 0x000fc6000001ff00 */
/*0070*/ S2R R0, SR_CTAID.Y ; /* 0x0000000000007919 */
/* 0x000e680000002600 */
/*0080*/ S2R R3, SR_TID.Y ; /* 0x0000000000037919 */
/* 0x000e620000002200 */
/*0090*/ IMAD R2, R2, c[0x0][0x0], R9 ; /* 0x0000000002027a24 */
/* 0x001fe400078e0209 */
/*00a0*/ IMAD R5, R0, c[0x0][0x4], R3 ; /* 0x0000010000057a24 */
/* 0x002fc800078e0203 */
/*00b0*/ IMAD R16, R5, c[0x0][0x178], R2 ; /* 0x00005e0005107a24 */
/* 0x000fc800078e0202 */
/*00c0*/ IMAD.WIDE R16, R16, R17, c[0x0][0x170] ; /* 0x00005c0010107625 */
/* 0x000fe200078e0211 */
/*00d0*/ @!P0 BRA 0x730 ; /* 0x0000065000008947 */
/* 0x000fea0003800000 */
/*00e0*/ SHF.L.U32 R6, R3, 0x3, RZ ; /* 0x0000000303067819 */
/* 0x000fe200000006ff */
/*00f0*/ IMAD R4, R5, c[0x0][0x178], R9 ; /* 0x00005e0005047a24 */
/* 0x000fe200078e0209 */
/*0100*/ SHF.L.U32 R7, R9, 0x8, RZ ; /* 0x0000000809077819 */
/* 0x000fe200000006ff */
/*0110*/ IMAD R5, R3, c[0x0][0x178], R2 ; /* 0x00005e0003057a24 */
/* 0x000fe200078e0202 */
/*0120*/ LEA R6, R9, R6, 0x8 ; /* 0x0000000609067211 */
/* 0x000fe200078e40ff */
/*0130*/ CS2R R22, SRZ ; /* 0x0000000000167805 */
/* 0x000fe2000001ff00 */
/*0140*/ MOV R2, RZ ; /* 0x000000ff00027202 */
/* 0x000fe40000000f00 */
/*0150*/ HFMA2.MMA R28, -RZ, RZ, 0, 4.76837158203125e-07 ; /* 0x00000008ff1c7435 */
/* 0x000fd400000001ff */
/*0160*/ IMAD.WIDE.U32 R26, R4, R28, c[0x0][0x160] ; /* 0x00005800041a7625 */
/* 0x000fc800078e001c */
/*0170*/ IMAD.WIDE.U32 R28, R5, R28, c[0x0][0x168] ; /* 0x00005a00051c7625 */
/* 0x000fe400078e001c */
/*0180*/ LDG.E.64 R26, [R26.64] ; /* 0x000000041a1a7981 */
/* 0x000ea8000c1e1b00 */
/*0190*/ LDG.E.64 R28, [R28.64] ; /* 0x000000041c1c7981 */
/* 0x000ee2000c1e1b00 */
/*01a0*/ IADD3 R2, R2, 0x1, RZ ; /* 0x0000000102027810 */
/* 0x000fe20007ffe0ff */
/*01b0*/ IMAD R5, R0, c[0x0][0x178], R5 ; /* 0x00005e0000057a24 */
/* 0x000fe200078e0205 */
/*01c0*/ IADD3 R4, R4, c[0x0][0x0], RZ ; /* 0x0000000004047a10 */
/* 0x000fe40007ffe0ff */
/*01d0*/ ISETP.GE.U32.AND P0, PT, R2, c[0x0][0xc], PT ; /* 0x0000030002007a0c */
/* 0x000fe20003f06070 */
/*01e0*/ STS.64 [R6], R26 ; /* 0x0000001a06007388 */
/* 0x004fe80000000a00 */
/*01f0*/ STS.64 [R6+0x2000], R28 ; /* 0x0020001c06007388 */
/* 0x008fe80000000a00 */
/*0200*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0210*/ LDS.64 R18, [R3.X8] ; /* 0x0000000003127984 */
/* 0x000fe80000008a00 */
/*0220*/ LDS.128 R12, [R7+0x2000] ; /* 0x00200000070c7984 */
/* 0x000e280000000c00 */
/*0230*/ LDS.64 R24, [R3.X8+0x100] ; /* 0x0001000003187984 */
/* 0x000e680000008a00 */
/*0240*/ LDS.64 R20, [R3.X8+0x200] ; /* 0x0002000003147984 */
/* 0x000fe80000008a00 */
/*0250*/ LDS.128 R8, [R7+0x2010] ; /* 0x0020100007087984 */
/* 0x000ea20000000c00 */
/*0260*/ DFMA R12, R12, R18, R22 ; /* 0x000000120c0c722b */
/* 0x0010460000000016 */
/*0270*/ LDS.64 R22, [R3.X8+0x300] ; /* 0x0003000003167984 */
/* 0x001e260000008a00 */
/*0280*/ DFMA R24, R24, R14, R12 ; /* 0x0000000e1818722b */
/* 0x0022a2000000000c */
/*0290*/ LDS.64 R18, [R3.X8+0x400] ; /* 0x0004000003127984 */
/* 0x000fe80000008a00 */
/*02a0*/ LDS.128 R12, [R7+0x2020] ; /* 0x00202000070c7984 */
/* 0x002e620000000c00 */
/*02b0*/ DFMA R24, R8, R20, R24 ; /* 0x000000140818722b */
/* 0x0044060000000018 */
/*02c0*/ LDS.64 R20, [R3.X8+0x500] ; /* 0x0005000003147984 */
/* 0x004ea60000008a00 */
/*02d0*/ DFMA R24, R22, R10, R24 ; /* 0x0000000a1618722b */
/* 0x0010640000000018 */
/*02e0*/ LDS.64 R22, [R3.X8+0x600] ; /* 0x0006000003167984 */
/* 0x001fe80000008a00 */
/*02f0*/ LDS.128 R8, [R7+0x2030] ; /* 0x0020300007087984 */
/* 0x000e220000000c00 */
/*0300*/ DFMA R24, R12, R18, R24 ; /* 0x000000120c18722b */
/* 0x0022860000000018 */
/*0310*/ LDS.64 R18, [R3.X8+0x700] ; /* 0x0007000003127984 */
/* 0x002e660000008a00 */
/*0320*/ DFMA R24, R20, R14, R24 ; /* 0x0000000e1418722b */
/* 0x0044240000000018 */
/*0330*/ LDS.64 R20, [R3.X8+0x800] ; /* 0x0008000003147984 */
/* 0x004fe80000008a00 */
/*0340*/ LDS.128 R12, [R7+0x2040] ; /* 0x00204000070c7984 */
/* 0x000ea20000000c00 */
/*0350*/ DFMA R24, R8, R22, R24 ; /* 0x000000160818722b */
/* 0x0010460000000018 */
/*0360*/ LDS.64 R22, [R3.X8+0x900] ; /* 0x0009000003167984 */
/* 0x001e260000008a00 */
/*0370*/ DFMA R24, R18, R10, R24 ; /* 0x0000000a1218722b */
/* 0x0022a40000000018 */
/*0380*/ LDS.64 R18, [R3.X8+0xa00] ; /* 0x000a000003127984 */
/* 0x002fe80000008a00 */
/*0390*/ LDS.128 R8, [R7+0x2050] ; /* 0x0020500007087984 */
/* 0x000e620000000c00 */
/*03a0*/ DFMA R24, R12, R20, R24 ; /* 0x000000140c18722b */
/* 0x0044060000000018 */
/*03b0*/ LDS.64 R20, [R3.X8+0xb00] ; /* 0x000b000003147984 */
/* 0x004ea60000008a00 */
/*03c0*/ DFMA R24, R22, R14, R24 ; /* 0x0000000e1618722b */
/* 0x0010640000000018 */
/*03d0*/ LDS.64 R22, [R3.X8+0xc00] ; /* 0x000c000003167984 */
/* 0x001fe80000008a00 */
/*03e0*/ LDS.128 R12, [R7+0x2060] ; /* 0x00206000070c7984 */
/* 0x000e220000000c00 */
/*03f0*/ DFMA R24, R8, R18, R24 ; /* 0x000000120818722b */
/* 0x0022860000000018 */
/*0400*/ LDS.64 R18, [R3.X8+0xd00] ; /* 0x000d000003127984 */
/* 0x002e660000008a00 */
/*0410*/ DFMA R24, R20, R10, R24 ; /* 0x0000000a1418722b */
/* 0x0044240000000018 */
/*0420*/ LDS.64 R20, [R3.X8+0xe00] ; /* 0x000e000003147984 */
/* 0x004fe80000008a00 */
/*0430*/ LDS.128 R8, [R7+0x2070] ; /* 0x0020700007087984 */
/* 0x000ea20000000c00 */
/*0440*/ DFMA R24, R12, R22, R24 ; /* 0x000000160c18722b */
/* 0x0010460000000018 */
/*0450*/ LDS.64 R22, [R3.X8+0xf00] ; /* 0x000f000003167984 */
/* 0x001e260000008a00 */
/*0460*/ DFMA R24, R18, R14, R24 ; /* 0x0000000e1218722b */
/* 0x0022a40000000018 */
/*0470*/ LDS.64 R18, [R3.X8+0x1000] ; /* 0x0010000003127984 */
/* 0x002fe80000008a00 */
/*0480*/ LDS.128 R12, [R7+0x2080] ; /* 0x00208000070c7984 */
/* 0x000e620000000c00 */
/*0490*/ DFMA R24, R8, R20, R24 ; /* 0x000000140818722b */
/* 0x0044060000000018 */
/*04a0*/ LDS.64 R20, [R3.X8+0x1100] ; /* 0x0011000003147984 */
/* 0x004ea60000008a00 */
/*04b0*/ DFMA R24, R22, R10, R24 ; /* 0x0000000a1618722b */
/* 0x0010640000000018 */
/*04c0*/ LDS.64 R22, [R3.X8+0x1200] ; /* 0x0012000003167984 */
/* 0x001fe80000008a00 */
/*04d0*/ LDS.128 R8, [R7+0x2090] ; /* 0x0020900007087984 */
/* 0x000e220000000c00 */
/*04e0*/ DFMA R24, R12, R18, R24 ; /* 0x000000120c18722b */
/* 0x0022860000000018 */
/*04f0*/ LDS.64 R18, [R3.X8+0x1300] ; /* 0x0013000003127984 */
/* 0x002e660000008a00 */
/*0500*/ DFMA R24, R20, R14, R24 ; /* 0x0000000e1418722b */
/* 0x0044240000000018 */
/*0510*/ LDS.64 R20, [R3.X8+0x1400] ; /* 0x0014000003147984 */
/* 0x004fe80000008a00 */
/*0520*/ LDS.128 R12, [R7+0x20a0] ; /* 0x0020a000070c7984 */
/* 0x000ea20000000c00 */
/*0530*/ DFMA R24, R8, R22, R24 ; /* 0x000000160818722b */
/* 0x0010460000000018 */
/*0540*/ LDS.64 R22, [R3.X8+0x1500] ; /* 0x0015000003167984 */
/* 0x001e260000008a00 */
/*0550*/ DFMA R24, R18, R10, R24 ; /* 0x0000000a1218722b */
/* 0x0022a40000000018 */
/*0560*/ LDS.64 R18, [R3.X8+0x1600] ; /* 0x0016000003127984 */
/* 0x002fe80000008a00 */
/*0570*/ LDS.128 R8, [R7+0x20b0] ; /* 0x0020b00007087984 */
/* 0x000e620000000c00 */
/*0580*/ DFMA R24, R12, R20, R24 ; /* 0x000000140c18722b */
/* 0x0044060000000018 */
/*0590*/ LDS.64 R20, [R3.X8+0x1700] ; /* 0x0017000003147984 */
/* 0x004ea60000008a00 */
/*05a0*/ DFMA R24, R22, R14, R24 ; /* 0x0000000e1618722b */
/* 0x0010640000000018 */
/*05b0*/ LDS.64 R22, [R3.X8+0x1800] ; /* 0x0018000003167984 */
/* 0x001fe80000008a00 */
/*05c0*/ LDS.128 R12, [R7+0x20c0] ; /* 0x0020c000070c7984 */
/* 0x000e220000000c00 */
/*05d0*/ DFMA R24, R8, R18, R24 ; /* 0x000000120818722b */
/* 0x0022860000000018 */
/*05e0*/ LDS.64 R18, [R3.X8+0x1900] ; /* 0x0019000003127984 */
/* 0x002e660000008a00 */
/*05f0*/ DFMA R24, R20, R10, R24 ; /* 0x0000000a1418722b */
/* 0x0044240000000018 */
/*0600*/ LDS.64 R20, [R3.X8+0x1a00] ; /* 0x001a000003147984 */
/* 0x004fe80000008a00 */
/*0610*/ LDS.128 R8, [R7+0x20d0] ; /* 0x0020d00007087984 */
/* 0x000ea20000000c00 */
/*0620*/ DFMA R24, R12, R22, R24 ; /* 0x000000160c18722b */
/* 0x0010460000000018 */
/*0630*/ LDS.64 R22, [R3.X8+0x1b00] ; /* 0x001b000003167984 */
/* 0x001e260000008a00 */
/*0640*/ DFMA R24, R18, R14, R24 ; /* 0x0000000e1218722b */
/* 0x0022a40000000018 */
/*0650*/ LDS.64 R18, [R3.X8+0x1c00] ; /* 0x001c000003127984 */
/* 0x002fe80000008a00 */
/*0660*/ LDS.128 R12, [R7+0x20e0] ; /* 0x0020e000070c7984 */
/* 0x000e620000000c00 */
/*0670*/ DFMA R24, R8, R20, R24 ; /* 0x000000140818722b */
/* 0x0044060000000018 */
/*0680*/ LDS.64 R20, [R3.X8+0x1d00] ; /* 0x001d000003147984 */
/* 0x004ea60000008a00 */
/*0690*/ DFMA R24, R22, R10, R24 ; /* 0x0000000a1618722b */
/* 0x0010640000000018 */
/*06a0*/ LDS.64 R22, [R3.X8+0x1e00] ; /* 0x001e000003167984 */
/* 0x001fe80000008a00 */
/*06b0*/ LDS.128 R8, [R7+0x20f0] ; /* 0x0020f00007087984 */
/* 0x000e220000000c00 */
/*06c0*/ DFMA R18, R12, R18, R24 ; /* 0x000000120c12722b */
/* 0x0022860000000018 */
/*06d0*/ LDS.64 R12, [R3.X8+0x1f00] ; /* 0x001f0000030c7984 */
/* 0x002e660000008a00 */
/*06e0*/ DFMA R14, R20, R14, R18 ; /* 0x0000000e140e722b */
/* 0x004e0c0000000012 */
/*06f0*/ DFMA R22, R8, R22, R14 ; /* 0x000000160816722b */
/* 0x001e4c000000000e */
/*0700*/ DFMA R22, R12, R10, R22 ; /* 0x0000000a0c16722b */
/* 0x0020620000000016 */
/*0710*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0720*/ @!P0 BRA 0x150 ; /* 0xfffffa2000008947 */
/* 0x003fea000383ffff */
/*0730*/ STG.E.64 [R16.64], R22 ; /* 0x0000001610007986 */
/* 0x000fe2000c101b04 */
/*0740*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0750*/ BRA 0x750; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0760*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0770*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0780*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0790*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*07a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*07b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*07c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*07d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*07e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*07f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z15MulMatrixKernelPdS_S_i
.globl _Z15MulMatrixKernelPdS_S_i
.p2align 8
.type _Z15MulMatrixKernelPdS_S_i,@function
_Z15MulMatrixKernelPdS_S_i:
s_clause 0x2
s_load_b32 s4, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x20
s_load_b32 s2, s[0:1], 0x18
v_and_b32_e32 v4, 0x3ff, v0
v_bfe_u32 v3, v0, 10, 10
s_mov_b32 s9, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s8, s4, 0xffff
s_lshr_b32 s4, s4, 16
v_mad_u64_u32 v[0:1], null, s14, s8, v[4:5]
v_mad_u64_u32 v[1:2], null, s15, s4, v[3:4]
s_cmp_eq_u32 s3, 0
s_cbranch_scc1 .LBB0_5
s_load_b128 s[4:7], s[0:1], 0x0
v_dual_mov_b32 v10, 0 :: v_dual_lshlrev_b32 v5, 8, v4
v_lshlrev_b32_e32 v2, 3, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_nc_u32_e32 v8, 0x2000, v5
v_mad_u64_u32 v[6:7], null, v1, s2, v[4:5]
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v7, v5, v2
v_mov_b32_e32 v5, 0
v_add_nc_u32_e32 v9, v8, v2
s_set_inst_prefetch_distance 0x1
.p2align 6
.LBB0_2:
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
v_mad_u64_u32 v[11:12], null, s9, s15, v[3:4]
v_mad_u64_u32 v[12:13], null, s9, s8, v[6:7]
v_mov_b32_e32 v13, v10
s_mov_b32 s10, 0
v_mad_u64_u32 v[14:15], null, v11, s2, v[0:1]
v_mov_b32_e32 v15, v10
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[11:12], 3, v[12:13]
v_lshlrev_b64 v[13:14], 3, v[14:15]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v11, vcc_lo, s4, v11
v_add_co_ci_u32_e32 v12, vcc_lo, s5, v12, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v13, vcc_lo, s6, v13
v_add_co_ci_u32_e32 v14, vcc_lo, s7, v14, vcc_lo
global_load_b64 v[15:16], v[11:12], off
global_load_b64 v[12:13], v[13:14], off
v_mov_b32_e32 v11, v2
s_waitcnt vmcnt(1)
ds_store_b64 v7, v[15:16]
s_waitcnt vmcnt(0)
ds_store_b64 v9, v[12:13]
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB0_3:
v_add_nc_u32_e32 v14, s10, v8
s_add_i32 s10, s10, 8
ds_load_b64 v[12:13], v11
ds_load_b64 v[14:15], v14
v_add_nc_u32_e32 v11, 0x100, v11
s_cmpk_eq_i32 s10, 0x100
s_waitcnt lgkmcnt(0)
v_fma_f64 v[4:5], v[12:13], v[14:15], v[4:5]
s_cbranch_scc0 .LBB0_3
s_add_i32 s9, s9, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s9, s3
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB0_2
s_branch .LBB0_6
.LBB0_5:
v_mov_b32_e32 v4, 0
v_mov_b32_e32 v5, 0
.LBB0_6:
s_set_inst_prefetch_distance 0x2
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, v1, s2, v[0:1]
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 3, v[2:3]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b64 v[0:1], v[4:5], off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z15MulMatrixKernelPdS_S_i
.amdhsa_group_segment_fixed_size 16384
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 17
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z15MulMatrixKernelPdS_S_i, .Lfunc_end0-_Z15MulMatrixKernelPdS_S_i
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 16384
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z15MulMatrixKernelPdS_S_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z15MulMatrixKernelPdS_S_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 17
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001155b8_00000000-6_dgemm_8.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2063:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2063:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z15get_elapsedtimev
.type _Z15get_elapsedtimev, @function
_Z15get_elapsedtimev:
.LFB2057:
.cfi_startproc
endbr64
subq $40, %rsp
.cfi_def_cfa_offset 48
movq %fs:40, %rax
movq %rax, 24(%rsp)
xorl %eax, %eax
movq %rsp, %rsi
movl $4, %edi
call clock_gettime@PLT
pxor %xmm0, %xmm0
testl %eax, %eax
jne .L3
pxor %xmm0, %xmm0
cvtsi2sdq 8(%rsp), %xmm0
mulsd .LC1(%rip), %xmm0
pxor %xmm1, %xmm1
cvtsi2sdq (%rsp), %xmm1
addsd %xmm1, %xmm0
.L3:
movq 24(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $40, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L8:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size _Z15get_elapsedtimev, .-_Z15get_elapsedtimev
.globl _Z4initPPdS0_S0_i
.type _Z4initPPdS0_S0_i, @function
_Z4initPPdS0_S0_i:
.LFB2058:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $8, %rsp
.cfi_def_cfa_offset 64
movq %rdi, %r15
movq %rsi, %r13
movq %rdx, %r12
movl %ecx, %ebx
movl $2019, %edi
call srand@PLT
testl %ebx, %ebx
jle .L9
movq %r15, %rbp
movslq %ebx, %rbx
leaq 0(,%rbx,8), %r14
addq %r14, %r15
.L11:
movl $0, %ebx
.L12:
call rand@PLT
movq 0(%rbp), %rdx
pxor %xmm0, %xmm0
cvtsi2sdl %eax, %xmm0
movsd %xmm0, (%rdx,%rbx)
call rand@PLT
movq 0(%r13), %rdx
pxor %xmm0, %xmm0
cvtsi2sdl %eax, %xmm0
movsd %xmm0, (%rdx,%rbx)
movq (%r12), %rax
movq $0x000000000, (%rax,%rbx)
addq $8, %rbx
cmpq %r14, %rbx
jne .L12
addq $8, %rbp
addq $8, %r13
addq $8, %r12
cmpq %r15, %rbp
jne .L11
.L9:
addq $8, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2058:
.size _Z4initPPdS0_S0_i, .-_Z4initPPdS0_S0_i
.globl _Z4multPPdS0_S0_i
.type _Z4multPPdS0_S0_i, @function
_Z4multPPdS0_S0_i:
.LFB2059:
.cfi_startproc
endbr64
movq %rdi, %r10
movq %rsi, %r8
movq %rdx, %r11
movl %ecx, %eax
testl %ecx, %ecx
jle .L15
cltq
leaq 0(,%rax,8), %rsi
movl $0, %r9d
.L17:
movl $0, %ecx
.L20:
movq (%r10,%r9), %rdi
movl $0, %eax
pxor %xmm1, %xmm1
.L18:
movq (%r8,%rax), %rdx
movsd (%rdx,%rcx), %xmm0
mulsd (%rdi,%rax), %xmm0
addsd %xmm0, %xmm1
addq $8, %rax
cmpq %rsi, %rax
jne .L18
movq (%r11,%r9), %rax
movsd %xmm1, (%rax,%rcx)
addq $8, %rcx
cmpq %rsi, %rcx
jne .L20
addq $8, %r9
cmpq %rsi, %r9
jne .L17
.L15:
ret
.cfi_endproc
.LFE2059:
.size _Z4multPPdS0_S0_i, .-_Z4multPPdS0_S0_i
.globl _Z40__device_stub__Z15MulMatrixKernelPdS_S_iPdS_S_i
.type _Z40__device_stub__Z15MulMatrixKernelPdS_S_iPdS_S_i, @function
_Z40__device_stub__Z15MulMatrixKernelPdS_S_iPdS_S_i:
.LFB2085:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L26
.L22:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L27
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L26:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z15MulMatrixKernelPdS_S_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L22
.L27:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2085:
.size _Z40__device_stub__Z15MulMatrixKernelPdS_S_iPdS_S_i, .-_Z40__device_stub__Z15MulMatrixKernelPdS_S_iPdS_S_i
.globl _Z15MulMatrixKernelPdS_S_i
.type _Z15MulMatrixKernelPdS_S_i, @function
_Z15MulMatrixKernelPdS_S_i:
.LFB2086:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z40__device_stub__Z15MulMatrixKernelPdS_S_iPdS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2086:
.size _Z15MulMatrixKernelPdS_S_i, .-_Z15MulMatrixKernelPdS_S_i
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC2:
.string "Matrix Multiplication\n Size: %dx%d\n"
.align 8
.LC6:
.string "Matrice %dx%d\n\tTemps: %f s\n\tMFlops: %.2f\n"
.section .rodata.str1.1,"aMS",@progbits,1
.LC7:
.string "Performance results: \n"
.LC8:
.string " Time: %lf s\n"
.LC9:
.string " MFlops: %.2f\n"
.text
.globl main
.type main, @function
main:
.LFB2060:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $120, %rsp
.cfi_def_cfa_offset 176
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
cmpl $1, %edi
jg .L45
movl $2048, %r8d
movl $2048, %ecx
leaq .LC2(%rip), %rdx
movl $2, %esi
movq stdout(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movl $33554432, %edi
call malloc@PLT
movq %rax, 8(%rsp)
movl $33554432, %edi
call malloc@PLT
movq %rax, 16(%rsp)
movl $33554432, %edi
call malloc@PLT
movq %rax, %r15
movl $16384, %edi
call malloc@PLT
movq %rax, %r12
movl $16384, %edi
call malloc@PLT
movq %rax, %rbp
movl $16384, %edi
call malloc@PLT
movq %rax, %rdx
movl $2048, %r13d
movl $16384, %ebx
movl $33554432, %r14d
.L40:
movq 8(%rsp), %r8
movq 16(%rsp), %rdi
movq %r15, %rsi
movl $0, %ecx
.L33:
movq %r8, (%r12,%rcx)
movq %rdi, 0(%rbp,%rcx)
movq %rsi, (%rdx,%rcx)
addq %rbx, %r8
addq %rbx, %rdi
addq %rbx, %rsi
addq $8, %rcx
cmpq %rbx, %rcx
jne .L33
.L32:
movl %r13d, %ecx
movq %rbp, %rsi
movq %r12, %rdi
call _Z4initPPdS0_S0_i
leaq 40(%rsp), %rdi
call cudaEventCreate@PLT
leaq 48(%rsp), %rdi
call cudaEventCreate@PLT
leaq 56(%rsp), %rdi
movq %r14, %rsi
call cudaMalloc@PLT
leaq 64(%rsp), %rdi
movq %r14, %rsi
call cudaMalloc@PLT
leaq 72(%rsp), %rdi
movq %r14, %rsi
call cudaMalloc@PLT
movl $1, %ecx
movq %r14, %rdx
movq 8(%rsp), %rsi
movq 56(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movq %r14, %rdx
movq 16(%rsp), %rsi
movq 64(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movq %r14, %rdx
movq %r15, %rsi
movq 72(%rsp), %rdi
call cudaMemcpy@PLT
leal 31(%r13), %eax
testl %r13d, %r13d
cmovns %r13d, %eax
sarl $5, %eax
movl %r13d, %edx
andl $31, %edx
cmpl $1, %edx
sbbl $-1, %eax
movl %eax, 80(%rsp)
movl %eax, 84(%rsp)
movl $1, 88(%rsp)
movl $32, 92(%rsp)
movl $32, 96(%rsp)
movl $1, 100(%rsp)
movl $0, %esi
movq 40(%rsp), %rdi
call cudaEventRecord@PLT
movl 100(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 92(%rsp), %rdx
movq 80(%rsp), %rdi
movl 88(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L46
.L35:
movl $0, %esi
movq 48(%rsp), %rdi
call cudaEventRecord@PLT
movl $2, %ecx
movq %r14, %rdx
movq 72(%rsp), %rsi
movq %r15, %rdi
call cudaMemcpy@PLT
movq 48(%rsp), %rdi
call cudaEventSynchronize@PLT
movl %r13d, %ebx
imull %r13d, %ebx
imull %r13d, %ebx
movslq %ebx, %rbx
movl $0x00000000, 36(%rsp)
leaq 36(%rsp), %rdi
movq 48(%rsp), %rdx
movq 40(%rsp), %rsi
call cudaEventElapsedTime@PLT
movss 36(%rsp), %xmm0
divss .LC4(%rip), %xmm0
testq %rbx, %rbx
js .L36
pxor %xmm1, %xmm1
cvtsi2ssq %rbx, %xmm1
.L37:
divss %xmm0, %xmm1
cvtss2sd %xmm1, %xmm1
cvtss2sd %xmm0, %xmm0
mulsd .LC5(%rip), %xmm1
movl %r13d, %ecx
movl %r13d, %edx
leaq .LC6(%rip), %rsi
movl $2, %edi
movl $2, %eax
call __printf_chk@PLT
call _Z15get_elapsedtimev
movsd %xmm0, 8(%rsp)
call _Z15get_elapsedtimev
movapd %xmm0, %xmm2
subsd 8(%rsp), %xmm2
movsd %xmm2, 8(%rsp)
leaq .LC7(%rip), %rdx
movl $2, %esi
movq stdout(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movsd 8(%rsp), %xmm0
leaq .LC8(%rip), %rdx
movl $2, %esi
movq stdout(%rip), %rdi
movl $1, %eax
call __fprintf_chk@PLT
testq %rbx, %rbx
js .L38
pxor %xmm0, %xmm0
cvtsi2sdq %rbx, %xmm0
.L39:
divsd 8(%rsp), %xmm0
mulsd .LC5(%rip), %xmm0
leaq .LC9(%rip), %rdx
movl $2, %esi
movq stdout(%rip), %rdi
movl $1, %eax
call __fprintf_chk@PLT
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L47
movl $0, %eax
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L45:
.cfi_restore_state
movq 8(%rsi), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, %rbx
movl %eax, %r13d
movl %eax, %r8d
movl %eax, %ecx
leaq .LC2(%rip), %rdx
movl $2, %esi
movq stdout(%rip), %rdi
movl $0, %eax
call __fprintf_chk@PLT
movq %rbx, 24(%rsp)
movslq 24(%rsp), %rbx
movq %rbx, %r14
imulq %rbx, %r14
salq $3, %r14
movq %r14, %rdi
call malloc@PLT
movq %rax, 8(%rsp)
movq %r14, %rdi
call malloc@PLT
movq %rax, 16(%rsp)
movq %r14, %rdi
call malloc@PLT
movq %rax, %r15
salq $3, %rbx
movq %rbx, %rdi
call malloc@PLT
movq %rax, %r12
movq %rbx, %rdi
call malloc@PLT
movq %rax, %rbp
movq %rbx, %rdi
call malloc@PLT
movq %rax, %rdx
cmpl $0, 24(%rsp)
jg .L40
jmp .L32
.L46:
movl %r13d, %ecx
movq 72(%rsp), %rdx
movq 64(%rsp), %rsi
movq 56(%rsp), %rdi
call _Z40__device_stub__Z15MulMatrixKernelPdS_S_iPdS_S_i
jmp .L35
.L36:
movq %rbx, %rax
shrq %rax
movq %rbx, %rdx
andl $1, %edx
orq %rdx, %rax
pxor %xmm1, %xmm1
cvtsi2ssq %rax, %xmm1
addss %xmm1, %xmm1
jmp .L37
.L38:
movq %rbx, %rax
shrq %rax
andl $1, %ebx
orq %rbx, %rax
pxor %xmm0, %xmm0
cvtsi2sdq %rax, %xmm0
addsd %xmm0, %xmm0
jmp .L39
.L47:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2060:
.size main, .-main
.section .rodata.str1.1
.LC10:
.string "_Z15MulMatrixKernelPdS_S_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2088:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC10(%rip), %rdx
movq %rdx, %rcx
leaq _Z15MulMatrixKernelPdS_S_i(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2088:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC1:
.long -400107883
.long 1041313291
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC4:
.long 1148846080
.section .rodata.cst8
.align 8
.LC5:
.long -1598689907
.long 1051772663
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "dgemm_8.hip"
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function _Z15get_elapsedtimev
.LCPI0_0:
.quad 0x3e112e0be826d695 # double 1.0000000000000001E-9
.text
.globl _Z15get_elapsedtimev
.p2align 4, 0x90
.type _Z15get_elapsedtimev,@function
_Z15get_elapsedtimev: # @_Z15get_elapsedtimev
.cfi_startproc
# %bb.0:
subq $24, %rsp
.cfi_def_cfa_offset 32
leaq 8(%rsp), %rsi
movl $4, %edi
callq clock_gettime
xorps %xmm0, %xmm0
testl %eax, %eax
je .LBB0_1
# %bb.2:
addq $24, %rsp
.cfi_def_cfa_offset 8
retq
.LBB0_1:
.cfi_def_cfa_offset 32
cvtsi2sdq 8(%rsp), %xmm1
xorps %xmm0, %xmm0
cvtsi2sdq 16(%rsp), %xmm0
mulsd .LCPI0_0(%rip), %xmm0
addsd %xmm1, %xmm0
addq $24, %rsp
.cfi_def_cfa_offset 8
retq
.Lfunc_end0:
.size _Z15get_elapsedtimev, .Lfunc_end0-_Z15get_elapsedtimev
.cfi_endproc
# -- End function
.globl _Z4initPPdS0_S0_i # -- Begin function _Z4initPPdS0_S0_i
.p2align 4, 0x90
.type _Z4initPPdS0_S0_i,@function
_Z4initPPdS0_S0_i: # @_Z4initPPdS0_S0_i
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
pushq %rax
.cfi_def_cfa_offset 64
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %ecx, %ebp
movq %rdx, %rbx
movq %rsi, %r14
movq %rdi, %r15
movl $2019, %edi # imm = 0x7E3
callq srand
testl %ebp, %ebp
jle .LBB1_5
# %bb.1: # %.preheader.lr.ph
movl %ebp, %r12d
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB1_2: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB1_3 Depth 2
xorl %ebp, %ebp
.p2align 4, 0x90
.LBB1_3: # Parent Loop BB1_2 Depth=1
# => This Inner Loop Header: Depth=2
callq rand
xorps %xmm0, %xmm0
cvtsi2sd %eax, %xmm0
movq (%r15,%r13,8), %rax
movsd %xmm0, (%rax,%rbp,8)
callq rand
xorps %xmm0, %xmm0
cvtsi2sd %eax, %xmm0
movq (%r14,%r13,8), %rax
movsd %xmm0, (%rax,%rbp,8)
movq (%rbx,%r13,8), %rax
movq $0, (%rax,%rbp,8)
incq %rbp
cmpq %rbp, %r12
jne .LBB1_3
# %bb.4: # %._crit_edge
# in Loop: Header=BB1_2 Depth=1
incq %r13
cmpq %r12, %r13
jne .LBB1_2
.LBB1_5: # %._crit_edge18
addq $8, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size _Z4initPPdS0_S0_i, .Lfunc_end1-_Z4initPPdS0_S0_i
.cfi_endproc
# -- End function
.globl _Z4multPPdS0_S0_i # -- Begin function _Z4multPPdS0_S0_i
.p2align 4, 0x90
.type _Z4multPPdS0_S0_i,@function
_Z4multPPdS0_S0_i: # @_Z4multPPdS0_S0_i
.cfi_startproc
# %bb.0:
testl %ecx, %ecx
jle .LBB2_8
# %bb.1: # %.preheader23.lr.ph
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset %rbx, -16
movl %ecx, %eax
xorl %ecx, %ecx
.p2align 4, 0x90
.LBB2_2: # %.preheader23
# =>This Loop Header: Depth=1
# Child Loop BB2_3 Depth 2
# Child Loop BB2_4 Depth 3
movq (%rdx,%rcx,8), %r8
movq (%rdi,%rcx,8), %r9
xorl %r10d, %r10d
.p2align 4, 0x90
.LBB2_3: # %.preheader
# Parent Loop BB2_2 Depth=1
# => This Loop Header: Depth=2
# Child Loop BB2_4 Depth 3
xorpd %xmm0, %xmm0
xorl %r11d, %r11d
.p2align 4, 0x90
.LBB2_4: # Parent Loop BB2_2 Depth=1
# Parent Loop BB2_3 Depth=2
# => This Inner Loop Header: Depth=3
movsd (%r9,%r11,8), %xmm1 # xmm1 = mem[0],zero
movq (%rsi,%r11,8), %rbx
mulsd (%rbx,%r10,8), %xmm1
addsd %xmm1, %xmm0
incq %r11
cmpq %r11, %rax
jne .LBB2_4
# %bb.5: # %._crit_edge
# in Loop: Header=BB2_3 Depth=2
movsd %xmm0, (%r8,%r10,8)
incq %r10
cmpq %rax, %r10
jne .LBB2_3
# %bb.6: # %._crit_edge27
# in Loop: Header=BB2_2 Depth=1
incq %rcx
cmpq %rax, %rcx
jne .LBB2_2
# %bb.7:
popq %rbx
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.LBB2_8: # %._crit_edge29
retq
.Lfunc_end2:
.size _Z4multPPdS0_S0_i, .Lfunc_end2-_Z4multPPdS0_S0_i
.cfi_endproc
# -- End function
.globl _Z30__device_stub__MulMatrixKernelPdS_S_i # -- Begin function _Z30__device_stub__MulMatrixKernelPdS_S_i
.p2align 4, 0x90
.type _Z30__device_stub__MulMatrixKernelPdS_S_i,@function
_Z30__device_stub__MulMatrixKernelPdS_S_i: # @_Z30__device_stub__MulMatrixKernelPdS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z15MulMatrixKernelPdS_S_i, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end3:
.size _Z30__device_stub__MulMatrixKernelPdS_S_i, .Lfunc_end3-_Z30__device_stub__MulMatrixKernelPdS_S_i
.cfi_endproc
# -- End function
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0 # -- Begin function main
.LCPI4_0:
.long 0x447a0000 # float 1000
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0
.LCPI4_1:
.quad 0x3eb0c6f7a0b5ed8d # double 9.9999999999999995E-7
.LCPI4_2:
.quad 0x3e112e0be826d695 # double 1.0000000000000001E-9
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0
.LCPI4_3:
.long 1127219200 # 0x43300000
.long 1160773632 # 0x45300000
.long 0 # 0x0
.long 0 # 0x0
.LCPI4_4:
.quad 0x4330000000000000 # double 4503599627370496
.quad 0x4530000000000000 # double 1.9342813113834067E+25
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $200, %rsp
.cfi_def_cfa_offset 256
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl $2048, %r14d # imm = 0x800
cmpl $2, %edi
jl .LBB4_2
# %bb.1:
movq 8(%rsi), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %r14
.LBB4_2:
movq stdout(%rip), %rdi
movl $.L.str, %esi
movl %r14d, %edx
movl %r14d, %ecx
xorl %eax, %eax
callq fprintf
movslq %r14d, %rbx
leaq (,%rbx,8), %r12
movq %r12, %r15
imulq %rbx, %r15
movq %r15, %rdi
callq malloc
movq %rax, 56(%rsp) # 8-byte Spill
movq %r15, %rdi
callq malloc
movq %rax, 64(%rsp) # 8-byte Spill
movq %r15, 136(%rsp) # 8-byte Spill
movq %r15, %rdi
callq malloc
movq %rax, 16(%rsp) # 8-byte Spill
movq %r12, %rdi
callq malloc
movq %rax, %rbp
movq %r12, %rdi
callq malloc
movq %rax, %r15
movq %r12, %rdi
callq malloc
movq %rax, %r12
movl %r14d, %r13d
testl %ebx, %ebx
jle .LBB4_5
# %bb.3: # %.lr.ph.preheader
leaq (,%r13,8), %rax
xorl %ecx, %ecx
movq 56(%rsp), %rdx # 8-byte Reload
movq 64(%rsp), %rsi # 8-byte Reload
movq 16(%rsp), %rdi # 8-byte Reload
.p2align 4, 0x90
.LBB4_4: # %.lr.ph
# =>This Inner Loop Header: Depth=1
movq %rdx, (%rbp,%rcx,8)
movq %rsi, (%r15,%rcx,8)
movq %rdi, (%r12,%rcx,8)
incq %rcx
addq %rax, %rdi
addq %rax, %rsi
addq %rax, %rdx
cmpq %rcx, %r13
jne .LBB4_4
.LBB4_5: # %._crit_edge
movl $2019, %edi # imm = 0x7E3
callq srand
movq %r14, 8(%rsp) # 8-byte Spill
testl %r14d, %r14d
jle .LBB4_10
# %bb.6: # %.preheader.lr.ph.i
xorl %ebx, %ebx
.p2align 4, 0x90
.LBB4_7: # %.preheader.i
# =>This Loop Header: Depth=1
# Child Loop BB4_8 Depth 2
xorl %r14d, %r14d
.p2align 4, 0x90
.LBB4_8: # Parent Loop BB4_7 Depth=1
# => This Inner Loop Header: Depth=2
callq rand
xorps %xmm0, %xmm0
cvtsi2sd %eax, %xmm0
movq (%rbp,%rbx,8), %rax
movsd %xmm0, (%rax,%r14,8)
callq rand
xorps %xmm0, %xmm0
cvtsi2sd %eax, %xmm0
movq (%r15,%rbx,8), %rax
movsd %xmm0, (%rax,%r14,8)
movq (%r12,%rbx,8), %rax
movq $0, (%rax,%r14,8)
incq %r14
cmpq %r14, %r13
jne .LBB4_8
# %bb.9: # %._crit_edge.i
# in Loop: Header=BB4_7 Depth=1
incq %rbx
cmpq %r13, %rbx
jne .LBB4_7
.LBB4_10: # %_Z4initPPdS0_S0_i.exit
leaq 88(%rsp), %rdi
callq hipEventCreate
leaq 32(%rsp), %rdi
callq hipEventCreate
leaq 80(%rsp), %rdi
movq 136(%rsp), %rbx # 8-byte Reload
movq %rbx, %rsi
callq hipMalloc
leaq 72(%rsp), %rdi
movq %rbx, %rsi
callq hipMalloc
leaq 24(%rsp), %rdi
movq %rbx, %rsi
callq hipMalloc
movq 80(%rsp), %rdi
movq 56(%rsp), %rsi # 8-byte Reload
movq %rbx, %rdx
movl $1, %ecx
callq hipMemcpy
movq 72(%rsp), %rdi
movq 64(%rsp), %rsi # 8-byte Reload
movq %rbx, %rdx
movl $1, %ecx
callq hipMemcpy
movq 24(%rsp), %rdi
movq 16(%rsp), %r12 # 8-byte Reload
movq %r12, %rsi
movq %rbx, %rdx
movl $1, %ecx
callq hipMemcpy
movq 8(%rsp), %r14 # 8-byte Reload
leal 31(%r14), %eax
testl %r14d, %r14d
cmovnsl %r14d, %eax
sarl $5, %eax
movl %r14d, %ecx
andl $31, %ecx
cmpl $1, %ecx
sbbl $-1, %eax
movq %rax, %r15
shlq $32, %r15
orq %rax, %r15
movq 88(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movabsq $137438953504, %rdx # imm = 0x2000000020
movq %r15, %rdi
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB4_12
# %bb.11:
movq 80(%rsp), %rax
movq 72(%rsp), %rcx
movq 24(%rsp), %rdx
movq %rax, 192(%rsp)
movq %rcx, 184(%rsp)
movq %rdx, 176(%rsp)
movl %r14d, 52(%rsp)
leaq 192(%rsp), %rax
movq %rax, 96(%rsp)
leaq 184(%rsp), %rax
movq %rax, 104(%rsp)
leaq 176(%rsp), %rax
movq %rax, 112(%rsp)
leaq 52(%rsp), %rax
movq %rax, 120(%rsp)
leaq 40(%rsp), %rdi
leaq 160(%rsp), %rsi
leaq 152(%rsp), %rdx
leaq 144(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 160(%rsp), %rcx
movl 168(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z15MulMatrixKernelPdS_S_i, %edi
pushq 144(%rsp)
.cfi_adjust_cfa_offset 8
pushq 160(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB4_12:
movq 32(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq 24(%rsp), %rsi
movq %r12, %rdi
movq %rbx, %rdx
movl $2, %ecx
callq hipMemcpy
movq 32(%rsp), %rdi
callq hipEventSynchronize
movl %r14d, %ebx
imull %ebx, %ebx
imull %r14d, %ebx
movslq %ebx, %r14
movl $0, 40(%rsp)
movq 88(%rsp), %rsi
movq 32(%rsp), %rdx
leaq 40(%rsp), %rdi
callq hipEventElapsedTime
movss 40(%rsp), %xmm1 # xmm1 = mem[0],zero,zero,zero
divss .LCPI4_0(%rip), %xmm1
cvtss2sd %xmm1, %xmm0
testq %r14, %r14
js .LBB4_13
# %bb.14:
cvtsi2ss %ebx, %xmm2
jmp .LBB4_15
.LBB4_13:
movq %r14, %rax
shrq %rax
andl $1, %ebx
orq %rax, %rbx
cvtsi2ss %rbx, %xmm2
addss %xmm2, %xmm2
.LBB4_15:
divss %xmm1, %xmm2
xorps %xmm1, %xmm1
cvtss2sd %xmm2, %xmm1
mulsd .LCPI4_1(%rip), %xmm1
movl $.L.str.1, %edi
movq 8(%rsp), %rdx # 8-byte Reload
movl %edx, %esi
# kill: def $edx killed $edx killed $rdx
movb $2, %al
callq printf
leaq 96(%rsp), %rsi
movl $4, %edi
callq clock_gettime
xorps %xmm0, %xmm0
movsd %xmm0, 8(%rsp) # 8-byte Spill
xorpd %xmm1, %xmm1
testl %eax, %eax
jne .LBB4_17
# %bb.16:
xorps %xmm0, %xmm0
cvtsi2sdq 96(%rsp), %xmm0
xorps %xmm1, %xmm1
cvtsi2sdq 104(%rsp), %xmm1
mulsd .LCPI4_2(%rip), %xmm1
addsd %xmm0, %xmm1
.LBB4_17: # %_Z15get_elapsedtimev.exit
movsd %xmm1, 16(%rsp) # 8-byte Spill
leaq 96(%rsp), %rsi
movl $4, %edi
callq clock_gettime
testl %eax, %eax
jne .LBB4_19
# %bb.18:
xorps %xmm0, %xmm0
cvtsi2sdq 96(%rsp), %xmm0
xorps %xmm1, %xmm1
cvtsi2sdq 104(%rsp), %xmm1
mulsd .LCPI4_2(%rip), %xmm1
addsd %xmm0, %xmm1
movsd %xmm1, 8(%rsp) # 8-byte Spill
.LBB4_19: # %_Z15get_elapsedtimev.exit80
movsd 8(%rsp), %xmm0 # 8-byte Reload
# xmm0 = mem[0],zero
subsd 16(%rsp), %xmm0 # 8-byte Folded Reload
movsd %xmm0, 8(%rsp) # 8-byte Spill
movq stdout(%rip), %rcx
movl $.L.str.2, %edi
movl $22, %esi
movl $1, %edx
callq fwrite@PLT
movq stdout(%rip), %rdi
movl $.L.str.3, %esi
movsd 8(%rsp), %xmm0 # 8-byte Reload
# xmm0 = mem[0],zero
movb $1, %al
callq fprintf
movq stdout(%rip), %rdi
movq %r14, %xmm1
punpckldq .LCPI4_3(%rip), %xmm1 # xmm1 = xmm1[0],mem[0],xmm1[1],mem[1]
subpd .LCPI4_4(%rip), %xmm1
movapd %xmm1, %xmm0
unpckhpd %xmm1, %xmm0 # xmm0 = xmm0[1],xmm1[1]
addsd %xmm1, %xmm0
divsd 8(%rsp), %xmm0 # 8-byte Folded Reload
mulsd .LCPI4_1(%rip), %xmm0
movl $.L.str.4, %esi
movb $1, %al
callq fprintf
xorl %eax, %eax
addq $200, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end4:
.size main, .Lfunc_end4-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB5_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB5_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z15MulMatrixKernelPdS_S_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end5:
.size __hip_module_ctor, .Lfunc_end5-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB6_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB6_2:
retq
.Lfunc_end6:
.size __hip_module_dtor, .Lfunc_end6-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z15MulMatrixKernelPdS_S_i,@object # @_Z15MulMatrixKernelPdS_S_i
.section .rodata,"a",@progbits
.globl _Z15MulMatrixKernelPdS_S_i
.p2align 3, 0x0
_Z15MulMatrixKernelPdS_S_i:
.quad _Z30__device_stub__MulMatrixKernelPdS_S_i
.size _Z15MulMatrixKernelPdS_S_i, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "Matrix Multiplication\n Size: %dx%d\n"
.size .L.str, 37
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "Matrice %dx%d\n\tTemps: %f s\n\tMFlops: %.2f\n"
.size .L.str.1, 42
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "Performance results: \n"
.size .L.str.2, 23
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz " Time: %lf s\n"
.size .L.str.3, 15
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz " MFlops: %.2f\n"
.size .L.str.4, 16
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z15MulMatrixKernelPdS_S_i"
.size .L__unnamed_1, 27
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z30__device_stub__MulMatrixKernelPdS_S_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z15MulMatrixKernelPdS_S_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <iostream>
#include <algorithm>
#include <vector>
#include <iterator>
#include <fstream>
#include <math.h>
#include <unistd.h>
#include <stdlib.h>
#include <string>
#include <stdio.h>
#include <cmath>
#include<sys/stat.h>
#include<ctime>
#include <cuda_runtime.h>
#include<thrust/reduce.h>
#include<cuda_runtime.h>
#include<thrust/sort.h>
#include<thrust/device_ptr.h>
#include<thrust/device_vector.h>
#include<thrust/host_vector.h>
#include<thrust/copy.h>
#include<thrust/execution_policy.h>
#include<thrust/scan.h>
using namespace std;
#define thrustSortBlockSize 4000000000
#define bucketNum 10
struct edge{
int src;
int dst;
};
struct cmpStruc{
__device__ bool operator () (const edge &a, const edge &b){
return (a.src < b.src) || (a.src == b.src && a.dst < b.dst) ;
}
}cmp;
class edgeVector{
public:
unsigned int capcity;
unsigned int esize;
edge *Edges;
edgeVector(){esize = 0; capcity = 0;}
void init(unsigned int s) { Edges = new edge [s]; capcity = s; return ;}
void addEdge(edge * E){
if(esize >= capcity) {
capcity *= 2;
edge* tmpEdges = new edge [capcity];
memcpy(tmpEdges,Edges,sizeof(edge)*esize);
delete [] Edges;
Edges = tmpEdges;
}
memcpy(Edges+esize,E,sizeof(edge));
esize ++;
}
void clear() {delete [] Edges; return ;}
};
unsigned int *edgeOffset;
int *edgeRow;
int *adjLength;
edge *Edges;
clock_t start_, end_;
bool preProcess(const char *fileName, unsigned int &_edgeNum, unsigned &_nodeNum)
{
//get file size
ifstream fin1(fileName,ios::in|ios::binary);
fin1.seekg(0,ios::end);
streampos Size = fin1.tellg();
fin1.close();
long int size = Size;
cout << "the size of input file is " << size << " Byte. " << endl;
unsigned int edgeNum = size/(sizeof(int)*2);
Edges = new edge [edgeNum];
//read data
ifstream fin(fileName, std::ios::binary);
if (fin.bad()) {
cout << "File not fould!" << endl;
return false;
}
cout << "start read data... ..." << endl;
fin.read((char *)Edges,sizeof(edge)*edgeNum);
fin.close();
cout << "end read data" << endl;
//pre work
//fine node number
int divideNum = 100;
unsigned int *maxNodeIDs = new unsigned int [divideNum];
memset(maxNodeIDs,0,sizeof(unsigned int)*divideNum);
#pragma omp parallel for
for (int d = 0; d < divideNum; d++) {
unsigned int step = edgeNum/divideNum;
unsigned int s = d*step;
unsigned int e = (d+1)*step;
if (d == divideNum - 1)
e = edgeNum;
for(unsigned int i = s; i < e; i ++)
{
if (Edges[i].src > maxNodeIDs[d])
maxNodeIDs[d] = Edges[i].src;
if (Edges[i].dst > maxNodeIDs[d])
maxNodeIDs[d] = Edges[i].dst;
}
}
unsigned int maxNodeID = maxNodeIDs[0];
for (int i = 1; i < divideNum; i ++)
if (maxNodeIDs[i] > maxNodeID)
maxNodeID = maxNodeIDs[i];
cout << "get max nodeid" << endl;
unsigned nodeNum = maxNodeID + 1;
delete [] maxNodeIDs;
//cal degrees
int * degreeRecord = new int[nodeNum];
memset(degreeRecord,0,sizeof(int)*nodeNum);
//#############################################
for (unsigned int i = 0; i < edgeNum; i++)
{
degreeRecord[Edges[i].src]++;
degreeRecord[Edges[i].dst]++;
}
#pragma omp parallel for
for (unsigned int i = 0; i < edgeNum; i ++) {
unsigned int src = Edges[i].src;
unsigned int dst = Edges[i].dst;
if (degreeRecord[src] > degreeRecord[dst] || (degreeRecord[src] == degreeRecord[dst] && src < dst)) {
Edges[i].src = dst;
Edges[i].dst = src;
}
}
int * toBeMini = new int[nodeNum];
int wipedEdges = 0;
memset(toBeMini,0,sizeof(int)*nodeNum);
int totalMinied = 0;
for (unsigned int i = 0; i < nodeNum; i ++) {
if (degreeRecord[i] <= 1) {
totalMinied ++;
}
toBeMini[i] = totalMinied;
}
#pragma omp parallen for
for (unsigned int i = 0; i < edgeNum; i++) {
unsigned int src = Edges[i].src;
unsigned int dst = Edges[i].dst;
if (degreeRecord[src] <= 1) {
Edges[i].src = -1;
wipedEdges ++;
continue;
}
if (degreeRecord[dst] <= 1) {
Edges[i].dst = -1;
wipedEdges ++;
continue;
}
if (src > 0) {
Edges[i].src = src - toBeMini[src-1];
}
if (dst > 0)
Edges[i].dst = dst - toBeMini[dst-1];
}
nodeNum = nodeNum - totalMinied;
delete [] toBeMini;
delete [] degreeRecord;
cout << "end rearrange dst and src" << endl;
//######################################
/*#pragma omp parallel for
for (unsigned int i = 0; i < edgeNum; i++) {
unsigned int src = Edges[i].src;
unsigned int dst = Edges[i].dst;
if (src < dst) {
Edges[i].src = dst;
Edges[i].dst = src;
}
}*/
//#########################################
//sort edges
//************sort edges && get nodeNum********
edgeVector * edgeBucket = new edgeVector [bucketNum];
for (int i = 0; i < bucketNum; i ++)
edgeBucket[i].init(edgeNum/bucketNum);
unsigned bucketStep = (nodeNum + bucketNum - 1)/bucketNum;
for (int i = 0; i < edgeNum; i ++)
{
if (Edges[i].src == -1)
continue;
int bucketID = Edges[i].src/bucketStep;
edgeBucket[bucketID].addEdge(Edges+i);
}
cout << "end pust edges in bucket" << endl;
unsigned int *bucketEdgeOffset = new unsigned int [bucketNum];
bucketEdgeOffset[0] = 0;
for (int i = 0; i < bucketNum-1; i ++) {
unsigned int bucketSize = edgeBucket[i].esize;
if (bucketSize > thrustSortBlockSize/sizeof(edge)) {
cout << "bucket " << i << "size is " << bucketSize << ", it's too large!" << endl;
return false;
}
bucketEdgeOffset[i+1] = bucketEdgeOffset[i] + bucketSize;
}
for (int i = 0; i < bucketNum; i++) {
thrust::device_vector<edge> D (edgeBucket[i].Edges, edgeBucket[i].Edges+edgeBucket[i].esize);
thrust::sort(D.begin(),D.begin()+edgeBucket[i].esize,cmp);
thrust::copy(D.begin(),D.begin()+edgeBucket[i].esize,edgeBucket[i].Edges);
}
cout << "end sort edges in GPU " << endl;
for(int i = 0; i < bucketNum; i ++) {
memcpy(Edges+bucketEdgeOffset[i],edgeBucket[i].Edges,sizeof(edge)*edgeBucket[i].esize);
}
cout << "end copy result to Edges" << endl;
delete [] bucketEdgeOffset;
for (int i = 0; i < bucketNum; i ++)
edgeBucket[i].clear();
delete [] edgeBucket;
//************end sort edges && get nodeNum********
edgeNum = edgeNum - wipedEdges;//************************************************
//unsigned int nodeNum = Edges[edgeNum-1].src + 1;
edgeOffset = new unsigned int [nodeNum+2];
edgeOffset[0] = 0;
edgeRow = new int [edgeNum+1];
adjLength = new int[nodeNum+1];
memset(adjLength,0,sizeof(int)*(nodeNum+1));
unsigned int nodePos = 0;
unsigned int edgePos = 0;
edge * edgePtr;
int formerSrc = -1,formerDst = -1;
start_ = clock();
// for (int i = 0; i < edgeNum; i++)
// printf("%d %d\n",Edges[i].src,Edges[i].dst);
for (unsigned int i = 0; i < edgeNum; i++)
{
edgePtr = Edges + i;
if (edgePtr->src == -1 || edgePtr->dst == -1)
continue;
if (edgePtr->src == edgePtr->dst) {
formerSrc = edgePtr->src;
formerDst = edgePtr->dst;
int curSrc = edgePtr->src;
for (unsigned j = nodePos + 1; j <= curSrc; j++) {
edgeOffset[j] = edgePos;
adjLength[j-1] = edgeOffset[j]-edgeOffset[j-1];
}
nodePos = curSrc;
continue;
}
if ((i > 0) && (edgePtr->src == formerSrc)) {
//TODO find a more efficienty way
if(edgePtr->dst == formerDst){
continue;
}
edgeRow[edgePos++] = edgePtr->dst;
formerDst = edgePtr->dst;
continue;
}
int curSrc = edgePtr->src;
for (unsigned j = nodePos + 1; j <= curSrc; j++) {
edgeOffset[j] = edgePos;
adjLength[j-1] = edgeOffset[j]-edgeOffset[j-1];
}
nodePos = curSrc;
edgeRow[edgePos++] = edgePtr->dst;
formerSrc = edgePtr->src;
formerDst = edgePtr->dst;
// cout << " end an edge in a loop " << endl;
}
for (unsigned i = nodePos + 1; i < nodeNum; i ++) {
edgeOffset[i] = edgePos;
adjLength[i-1] = edgeOffset[i] - edgeOffset[i-1];
}
end_ = clock();
cout << "merge and make csr use " << (double)1000*(end_-start_)/CLOCKS_PER_SEC << " ms." << endl;
edgeOffset[nodeNum] = edgePos;
edgeOffset[nodeNum+1] = edgePos + 1;
adjLength[nodeNum-1] = edgeOffset[nodeNum] - edgeOffset[nodeNum-1];
adjLength[nodeNum] = 1024;
edgeRow[edgePos] = nodeNum;
cout << "csr built, edgeNum is "<< edgePos<< ", the node num is " << nodeNum << ", origin egde num is " << edgeNum << endl;
//TODO remove empty node in edgeOffset
int maxDegreeStored = 0;
for (int i = 0; i < nodeNum; i ++)
if (adjLength[i] > maxDegreeStored)
maxDegreeStored = adjLength[i];
cout << "The max stored degree is " << maxDegreeStored << endl;
_edgeNum = edgeOffset[nodeNum];
_nodeNum = nodeNum;
delete [] Edges;
return true;
} | #include <iostream>
#include <algorithm>
#include <vector>
#include <iterator>
#include <fstream>
#include <math.h>
#include <unistd.h>
#include <stdlib.h>
#include <string>
#include <stdio.h>
#include <cmath>
#include<sys/stat.h>
#include<ctime>
#include <hip/hip_runtime.h>
#include<thrust/reduce.h>
#include<thrust/sort.h>
#include<thrust/device_ptr.h>
#include<thrust/device_vector.h>
#include<thrust/host_vector.h>
#include<thrust/copy.h>
#include<thrust/execution_policy.h>
#include<thrust/scan.h>
using namespace std;
#define thrustSortBlockSize 4000000000
#define bucketNum 10
struct edge{
int src;
int dst;
};
struct cmpStruc{
__device__ bool operator () (const edge &a, const edge &b){
return (a.src < b.src) || (a.src == b.src && a.dst < b.dst) ;
}
}cmp;
class edgeVector{
public:
unsigned int capcity;
unsigned int esize;
edge *Edges;
edgeVector(){esize = 0; capcity = 0;}
void init(unsigned int s) { Edges = new edge [s]; capcity = s; return ;}
void addEdge(edge * E){
if(esize >= capcity) {
capcity *= 2;
edge* tmpEdges = new edge [capcity];
memcpy(tmpEdges,Edges,sizeof(edge)*esize);
delete [] Edges;
Edges = tmpEdges;
}
memcpy(Edges+esize,E,sizeof(edge));
esize ++;
}
void clear() {delete [] Edges; return ;}
};
unsigned int *edgeOffset;
int *edgeRow;
int *adjLength;
edge *Edges;
clock_t start_, end_;
bool preProcess(const char *fileName, unsigned int &_edgeNum, unsigned &_nodeNum)
{
//get file size
ifstream fin1(fileName,ios::in|ios::binary);
fin1.seekg(0,ios::end);
streampos Size = fin1.tellg();
fin1.close();
long int size = Size;
cout << "the size of input file is " << size << " Byte. " << endl;
unsigned int edgeNum = size/(sizeof(int)*2);
Edges = new edge [edgeNum];
//read data
ifstream fin(fileName, std::ios::binary);
if (fin.bad()) {
cout << "File not fould!" << endl;
return false;
}
cout << "start read data... ..." << endl;
fin.read((char *)Edges,sizeof(edge)*edgeNum);
fin.close();
cout << "end read data" << endl;
//pre work
//fine node number
int divideNum = 100;
unsigned int *maxNodeIDs = new unsigned int [divideNum];
memset(maxNodeIDs,0,sizeof(unsigned int)*divideNum);
#pragma omp parallel for
for (int d = 0; d < divideNum; d++) {
unsigned int step = edgeNum/divideNum;
unsigned int s = d*step;
unsigned int e = (d+1)*step;
if (d == divideNum - 1)
e = edgeNum;
for(unsigned int i = s; i < e; i ++)
{
if (Edges[i].src > maxNodeIDs[d])
maxNodeIDs[d] = Edges[i].src;
if (Edges[i].dst > maxNodeIDs[d])
maxNodeIDs[d] = Edges[i].dst;
}
}
unsigned int maxNodeID = maxNodeIDs[0];
for (int i = 1; i < divideNum; i ++)
if (maxNodeIDs[i] > maxNodeID)
maxNodeID = maxNodeIDs[i];
cout << "get max nodeid" << endl;
unsigned nodeNum = maxNodeID + 1;
delete [] maxNodeIDs;
//cal degrees
int * degreeRecord = new int[nodeNum];
memset(degreeRecord,0,sizeof(int)*nodeNum);
//#############################################
for (unsigned int i = 0; i < edgeNum; i++)
{
degreeRecord[Edges[i].src]++;
degreeRecord[Edges[i].dst]++;
}
#pragma omp parallel for
for (unsigned int i = 0; i < edgeNum; i ++) {
unsigned int src = Edges[i].src;
unsigned int dst = Edges[i].dst;
if (degreeRecord[src] > degreeRecord[dst] || (degreeRecord[src] == degreeRecord[dst] && src < dst)) {
Edges[i].src = dst;
Edges[i].dst = src;
}
}
int * toBeMini = new int[nodeNum];
int wipedEdges = 0;
memset(toBeMini,0,sizeof(int)*nodeNum);
int totalMinied = 0;
for (unsigned int i = 0; i < nodeNum; i ++) {
if (degreeRecord[i] <= 1) {
totalMinied ++;
}
toBeMini[i] = totalMinied;
}
#pragma omp parallen for
for (unsigned int i = 0; i < edgeNum; i++) {
unsigned int src = Edges[i].src;
unsigned int dst = Edges[i].dst;
if (degreeRecord[src] <= 1) {
Edges[i].src = -1;
wipedEdges ++;
continue;
}
if (degreeRecord[dst] <= 1) {
Edges[i].dst = -1;
wipedEdges ++;
continue;
}
if (src > 0) {
Edges[i].src = src - toBeMini[src-1];
}
if (dst > 0)
Edges[i].dst = dst - toBeMini[dst-1];
}
nodeNum = nodeNum - totalMinied;
delete [] toBeMini;
delete [] degreeRecord;
cout << "end rearrange dst and src" << endl;
//######################################
/*#pragma omp parallel for
for (unsigned int i = 0; i < edgeNum; i++) {
unsigned int src = Edges[i].src;
unsigned int dst = Edges[i].dst;
if (src < dst) {
Edges[i].src = dst;
Edges[i].dst = src;
}
}*/
//#########################################
//sort edges
//************sort edges && get nodeNum********
edgeVector * edgeBucket = new edgeVector [bucketNum];
for (int i = 0; i < bucketNum; i ++)
edgeBucket[i].init(edgeNum/bucketNum);
unsigned bucketStep = (nodeNum + bucketNum - 1)/bucketNum;
for (int i = 0; i < edgeNum; i ++)
{
if (Edges[i].src == -1)
continue;
int bucketID = Edges[i].src/bucketStep;
edgeBucket[bucketID].addEdge(Edges+i);
}
cout << "end pust edges in bucket" << endl;
unsigned int *bucketEdgeOffset = new unsigned int [bucketNum];
bucketEdgeOffset[0] = 0;
for (int i = 0; i < bucketNum-1; i ++) {
unsigned int bucketSize = edgeBucket[i].esize;
if (bucketSize > thrustSortBlockSize/sizeof(edge)) {
cout << "bucket " << i << "size is " << bucketSize << ", it's too large!" << endl;
return false;
}
bucketEdgeOffset[i+1] = bucketEdgeOffset[i] + bucketSize;
}
for (int i = 0; i < bucketNum; i++) {
thrust::device_vector<edge> D (edgeBucket[i].Edges, edgeBucket[i].Edges+edgeBucket[i].esize);
thrust::sort(D.begin(),D.begin()+edgeBucket[i].esize,cmp);
thrust::copy(D.begin(),D.begin()+edgeBucket[i].esize,edgeBucket[i].Edges);
}
cout << "end sort edges in GPU " << endl;
for(int i = 0; i < bucketNum; i ++) {
memcpy(Edges+bucketEdgeOffset[i],edgeBucket[i].Edges,sizeof(edge)*edgeBucket[i].esize);
}
cout << "end copy result to Edges" << endl;
delete [] bucketEdgeOffset;
for (int i = 0; i < bucketNum; i ++)
edgeBucket[i].clear();
delete [] edgeBucket;
//************end sort edges && get nodeNum********
edgeNum = edgeNum - wipedEdges;//************************************************
//unsigned int nodeNum = Edges[edgeNum-1].src + 1;
edgeOffset = new unsigned int [nodeNum+2];
edgeOffset[0] = 0;
edgeRow = new int [edgeNum+1];
adjLength = new int[nodeNum+1];
memset(adjLength,0,sizeof(int)*(nodeNum+1));
unsigned int nodePos = 0;
unsigned int edgePos = 0;
edge * edgePtr;
int formerSrc = -1,formerDst = -1;
start_ = clock();
// for (int i = 0; i < edgeNum; i++)
// printf("%d %d\n",Edges[i].src,Edges[i].dst);
for (unsigned int i = 0; i < edgeNum; i++)
{
edgePtr = Edges + i;
if (edgePtr->src == -1 || edgePtr->dst == -1)
continue;
if (edgePtr->src == edgePtr->dst) {
formerSrc = edgePtr->src;
formerDst = edgePtr->dst;
int curSrc = edgePtr->src;
for (unsigned j = nodePos + 1; j <= curSrc; j++) {
edgeOffset[j] = edgePos;
adjLength[j-1] = edgeOffset[j]-edgeOffset[j-1];
}
nodePos = curSrc;
continue;
}
if ((i > 0) && (edgePtr->src == formerSrc)) {
//TODO find a more efficienty way
if(edgePtr->dst == formerDst){
continue;
}
edgeRow[edgePos++] = edgePtr->dst;
formerDst = edgePtr->dst;
continue;
}
int curSrc = edgePtr->src;
for (unsigned j = nodePos + 1; j <= curSrc; j++) {
edgeOffset[j] = edgePos;
adjLength[j-1] = edgeOffset[j]-edgeOffset[j-1];
}
nodePos = curSrc;
edgeRow[edgePos++] = edgePtr->dst;
formerSrc = edgePtr->src;
formerDst = edgePtr->dst;
// cout << " end an edge in a loop " << endl;
}
for (unsigned i = nodePos + 1; i < nodeNum; i ++) {
edgeOffset[i] = edgePos;
adjLength[i-1] = edgeOffset[i] - edgeOffset[i-1];
}
end_ = clock();
cout << "merge and make csr use " << (double)1000*(end_-start_)/CLOCKS_PER_SEC << " ms." << endl;
edgeOffset[nodeNum] = edgePos;
edgeOffset[nodeNum+1] = edgePos + 1;
adjLength[nodeNum-1] = edgeOffset[nodeNum] - edgeOffset[nodeNum-1];
adjLength[nodeNum] = 1024;
edgeRow[edgePos] = nodeNum;
cout << "csr built, edgeNum is "<< edgePos<< ", the node num is " << nodeNum << ", origin egde num is " << edgeNum << endl;
//TODO remove empty node in edgeOffset
int maxDegreeStored = 0;
for (int i = 0; i < nodeNum; i ++)
if (adjLength[i] > maxDegreeStored)
maxDegreeStored = adjLength[i];
cout << "The max stored degree is " << maxDegreeStored << endl;
_edgeNum = edgeOffset[nodeNum];
_nodeNum = nodeNum;
delete [] Edges;
return true;
} |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | /*
============================================================================
Name : sem1.cu
Author : maminov
Version :
Copyright : copyleft
Description : CUDA compute reciprocals
============================================================================
*/
#include <cuda_runtime.h>
#include <device_launch_parameters.h>
#include <iostream>
#include <numeric>
#include <stdlib.h>
static void CheckCudaErrorAux(const char *, unsigned, const char *, cudaError_t);
#define CUDA_CHECK_RETURN(value) CheckCudaErrorAux(__FILE__,__LINE__, #value, value)
/**
* CUDA kernel that computes reciprocal values for a given vector
*/
__global__ void heatKernel(float *data, unsigned size, unsigned iterations, float tempPerIteration, float dx, float dt) {
unsigned idx = blockIdx.x*blockDim.x + threadIdx.x;
if (idx < size)
for (int i = 0; i < iterations; ++i) {
if (idx == 0)
data[size + 1] += tempPerIteration;
data[idx + 1] += (data[idx - 1 + 1] - 2 * data[idx + 1] + data[idx + 1 + 1]) * dt / (dx*dx);
__syncthreads();
}
}
void initialize(float *data, unsigned size)
{
for (unsigned i = 0; i < size; ++i)
data[i] = 0.;
}
int main(void)
{
static const int SIM_TIME = 5;
static const int STEPS_PER_SECOND = 10;
static const int CYL_LENGTH = 10;
static const int STEPS_PER_METER = 10;
static const int WORK_SIZE = CYL_LENGTH * STEPS_PER_METER;
static const int BLOCK_SIZE = 256;
static const float TEMP_PER_SEC = 5.;
float *hostData = new float[WORK_SIZE + 2];
float *gpuData;
initialize(hostData, WORK_SIZE + 2);
CUDA_CHECK_RETURN(cudaMalloc((void **)&gpuData, sizeof(float)*(WORK_SIZE + 2)));
CUDA_CHECK_RETURN(cudaMemcpy(gpuData, hostData, sizeof(float)*(WORK_SIZE + 2), cudaMemcpyHostToDevice));
float *result = new float[WORK_SIZE + 2];
const int blockCount = (WORK_SIZE + BLOCK_SIZE - 1) / BLOCK_SIZE;
heatKernel <<< blockCount, BLOCK_SIZE >>> (gpuData, WORK_SIZE, SIM_TIME * STEPS_PER_SECOND, TEMP_PER_SEC / (STEPS_PER_SECOND*1.0f), CYL_LENGTH / (STEPS_PER_METER*1.0f), SIM_TIME / (STEPS_PER_SECOND*1.0f));
CUDA_CHECK_RETURN(cudaMemcpy(result, gpuData, sizeof(float)*(WORK_SIZE + 2), cudaMemcpyDeviceToHost));
/* Verify the results */
for (int i = 0; i < WORK_SIZE; ++i)
std::cout << result[i + 1] << std::endl;
/* Free memory */
CUDA_CHECK_RETURN(cudaFree(gpuData));
delete[] hostData;
delete[] result;
return 0;
}
/**
* Check the return value of the CUDA runtime API call and exit
* the application if the call has failed.
*/
static void CheckCudaErrorAux(const char *file, unsigned line, const char *statement, cudaError_t err)
{
if (err == cudaSuccess)
return;
std::cerr << statement << " returned " << cudaGetErrorString(err) << "(" << err << ") at " << file << ":" << line << std::endl;
exit(1);
} | code for sm_80
Function : _Z10heatKernelPfjjfff
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e220000002500 */
/*0020*/ ISETP.NE.AND P0, PT, RZ, c[0x0][0x16c], PT ; /* 0x00005b00ff007a0c */
/* 0x000fc60003f05270 */
/*0030*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0040*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fca00078e0203 */
/*0050*/ ISETP.GE.U32.OR P0, PT, R0, c[0x0][0x168], !P0 ; /* 0x00005a0000007a0c */
/* 0x000fda0004706470 */
/*0060*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0070*/ MOV R10, c[0x0][0x16c] ; /* 0x00005b00000a7a02 */
/* 0x000fe20000000f00 */
/*0080*/ IMAD.MOV.U32 R2, RZ, RZ, 0x1 ; /* 0x00000001ff027424 */
/* 0x000fe200078e00ff */
/*0090*/ IADD3 R8, R0, 0x1, RZ ; /* 0x0000000100087810 */
/* 0x000fe20007ffe0ff */
/*00a0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*00b0*/ IADD3 R3, R10, -0x1, RZ ; /* 0xffffffff0a037810 */
/* 0x000fe40007ffe0ff */
/*00c0*/ IADD3 R6, R0, 0x2, RZ ; /* 0x0000000200067810 */
/* 0x000fe40007ffe0ff */
/*00d0*/ ISETP.GE.U32.AND P0, PT, R3, 0x3, PT ; /* 0x000000030300780c */
/* 0x000fe20003f06070 */
/*00e0*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */
/* 0x000fe200078e00ff */
/*00f0*/ MOV R11, c[0x0][0x174] ; /* 0x00005d00000b7a02 */
/* 0x000fc40000000f00 */
/*0100*/ IADD3 R2, R2, c[0x0][0x168], RZ ; /* 0x00005a0002027a10 */
/* 0x000fe20007ffe0ff */
/*0110*/ IMAD.WIDE.U32 R8, R8, R3, c[0x0][0x160] ; /* 0x0000580008087625 */
/* 0x000fe200078e0003 */
/*0120*/ LOP3.LUT R10, R10, 0x3, RZ, 0xc0, !PT ; /* 0x000000030a0a7812 */
/* 0x000fc600078ec0ff */
/*0130*/ IMAD.WIDE.U32 R6, R6, R3, c[0x0][0x160] ; /* 0x0000580006067625 */
/* 0x000fc800078e0003 */
/*0140*/ IMAD.WIDE.U32 R4, R0, R3, c[0x0][0x160] ; /* 0x0000580000047625 */
/* 0x000fc800078e0003 */
/*0150*/ FMUL R11, R11, c[0x0][0x174] ; /* 0x00005d000b0b7a20 */
/* 0x000fe40000400000 */
/*0160*/ IMAD.WIDE.U32 R2, R2, R3, c[0x0][0x160] ; /* 0x0000580002027625 */
/* 0x000fe200078e0003 */
/*0170*/ @!P0 BRA 0x8e0 ; /* 0x0000076000008947 */
/* 0x000fea0003800000 */
/*0180*/ IADD3 R12, -R10, c[0x0][0x16c], RZ ; /* 0x00005b000a0c7a10 */
/* 0x000fe40007ffe1ff */
/*0190*/ ISETP.NE.AND P2, PT, R0, RZ, PT ; /* 0x000000ff0000720c */
/* 0x000fda0003f45270 */
/*01a0*/ @!P2 LDG.E R13, [R2.64] ; /* 0x00000004020da981 */
/* 0x001ea4000c1e1900 */
/*01b0*/ @!P2 FADD R15, R13, c[0x0][0x170] ; /* 0x00005c000d0fa621 */
/* 0x004fca0000000000 */
/*01c0*/ @!P2 STG.E [R2.64], R15 ; /* 0x0000000f0200a986 */
/* 0x0001e8000c101904 */
/*01d0*/ LDG.E R13, [R8.64] ; /* 0x00000004080d7981 */
/* 0x000ea8000c1e1900 */
/*01e0*/ LDG.E R14, [R4.64] ; /* 0x00000004040e7981 */
/* 0x000ee8000c1e1900 */
/*01f0*/ LDG.E R19, [R6.64] ; /* 0x0000000406137981 */
/* 0x000f22000c1e1900 */
/*0200*/ MUFU.RCP R16, R11 ; /* 0x0000000b00107308 */
/* 0x000e620000001000 */
/*0210*/ IADD3 R12, R12, -0x4, RZ ; /* 0xfffffffc0c0c7810 */
/* 0x000fe20007ffe0ff */
/*0220*/ BSSY B0, 0x330 ; /* 0x0000010000007945 */
/* 0x000fe60003800000 */
/*0230*/ ISETP.NE.AND P3, PT, R12, RZ, PT ; /* 0x000000ff0c00720c */
/* 0x000fe20003f65270 */
/*0240*/ FADD R17, R13, R13 ; /* 0x0000000d0d117221 */
/* 0x004fc80000000000 */
/*0250*/ FADD R14, R14, -R17 ; /* 0x800000110e0e7221 */
/* 0x008fe40000000000 */
/*0260*/ FFMA R17, -R11, R16, 1 ; /* 0x3f8000000b117423 */
/* 0x002fe40000000110 */
/*0270*/ FADD R14, R14, R19 ; /* 0x000000130e0e7221 */
/* 0x010fe40000000000 */
/*0280*/ FFMA R17, R16, R17, R16 ; /* 0x0000001110117223 */
/* 0x000fe40000000010 */
/*0290*/ FMUL R14, R14, c[0x0][0x178] ; /* 0x00005e000e0e7a20 */
/* 0x000fc80000400000 */
/*02a0*/ FCHK P0, R14, R11 ; /* 0x0000000b0e007302 */
/* 0x000e620000000000 */
/*02b0*/ FFMA R16, R14, R17, RZ ; /* 0x000000110e107223 */
/* 0x000fc800000000ff */
/*02c0*/ FFMA R15, -R11, R16, R14 ; /* 0x000000100b0f7223 */
/* 0x001fc8000000010e */
/*02d0*/ FFMA R16, R17, R15, R16 ; /* 0x0000000f11107223 */
/* 0x000fe20000000010 */
/*02e0*/ @!P0 BRA 0x320 ; /* 0x0000003000008947 */
/* 0x002fea0003800000 */
/*02f0*/ MOV R17, R14 ; /* 0x0000000e00117202 */
/* 0x000fe40000000f00 */
/*0300*/ MOV R14, 0x320 ; /* 0x00000320000e7802 */
/* 0x000fe40000000f00 */
/*0310*/ CALL.REL.NOINC 0xb00 ; /* 0x000007e000007944 */
/* 0x000fea0003c00000 */
/*0320*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0330*/ FADD R13, R13, R16 ; /* 0x000000100d0d7221 */
/* 0x000fe20000000000 */
/*0340*/ BSSY B0, 0x3c0 ; /* 0x0000007000007945 */
/* 0x000fe80003800000 */
/*0350*/ STG.E [R8.64], R13 ; /* 0x0000000d08007986 */
/* 0x0001e8000c101904 */
/*0360*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0370*/ @P2 BRA 0x3b0 ; /* 0x0000003000002947 */
/* 0x000fea0003800000 */
/*0380*/ LDG.E R13, [R2.64] ; /* 0x00000004020d7981 */
/* 0x001ea4000c1e1900 */
/*0390*/ FADD R13, R13, c[0x0][0x170] ; /* 0x00005c000d0d7621 */
/* 0x004fca0000000000 */
/*03a0*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0001e4000c101904 */
/*03b0*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*03c0*/ LDG.E R13, [R8.64] ; /* 0x00000004080d7981 */
/* 0x001ea8000c1e1900 */
/*03d0*/ LDG.E R14, [R4.64] ; /* 0x00000004040e7981 */
/* 0x000ee8000c1e1900 */
/*03e0*/ LDG.E R17, [R6.64] ; /* 0x0000000406117981 */
/* 0x000f22000c1e1900 */
/*03f0*/ MUFU.RCP R16, R11 ; /* 0x0000000b00107308 */
/* 0x000e220000001000 */
/*0400*/ BSSY B0, 0x500 ; /* 0x000000f000007945 */
/* 0x000fe20003800000 */
/*0410*/ FADD R15, R13, R13 ; /* 0x0000000d0d0f7221 */
/* 0x004fc80000000000 */
/*0420*/ FADD R14, R14, -R15 ; /* 0x8000000f0e0e7221 */
/* 0x008fe40000000000 */
/*0430*/ FFMA R15, -R11, R16, 1 ; /* 0x3f8000000b0f7423 */
/* 0x001fe40000000110 */
/*0440*/ FADD R14, R14, R17 ; /* 0x000000110e0e7221 */
/* 0x010fe40000000000 */
/*0450*/ FFMA R17, R16, R15, R16 ; /* 0x0000000f10117223 */
/* 0x000fe40000000010 */
/*0460*/ FMUL R14, R14, c[0x0][0x178] ; /* 0x00005e000e0e7a20 */
/* 0x000fc80000400000 */
/*0470*/ FCHK P0, R14, R11 ; /* 0x0000000b0e007302 */
/* 0x000e220000000000 */
/*0480*/ FFMA R15, R17, R14, RZ ; /* 0x0000000e110f7223 */
/* 0x000fc800000000ff */
/*0490*/ FFMA R16, -R11, R15, R14 ; /* 0x0000000f0b107223 */
/* 0x000fc8000000010e */
/*04a0*/ FFMA R16, R17, R16, R15 ; /* 0x0000001011107223 */
/* 0x000fe2000000000f */
/*04b0*/ @!P0 BRA 0x4f0 ; /* 0x0000003000008947 */
/* 0x001fea0003800000 */
/*04c0*/ IMAD.MOV.U32 R17, RZ, RZ, R14 ; /* 0x000000ffff117224 */
/* 0x000fe200078e000e */
/*04d0*/ MOV R14, 0x4f0 ; /* 0x000004f0000e7802 */
/* 0x000fe40000000f00 */
/*04e0*/ CALL.REL.NOINC 0xb00 ; /* 0x0000061000007944 */
/* 0x000fea0003c00000 */
/*04f0*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0500*/ FADD R13, R13, R16 ; /* 0x000000100d0d7221 */
/* 0x000fe20000000000 */
/*0510*/ BSSY B0, 0x590 ; /* 0x0000007000007945 */
/* 0x000fe80003800000 */
/*0520*/ STG.E [R8.64], R13 ; /* 0x0000000d08007986 */
/* 0x0001e8000c101904 */
/*0530*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0540*/ @P2 BRA 0x580 ; /* 0x0000003000002947 */
/* 0x000fea0003800000 */
/*0550*/ LDG.E R13, [R2.64] ; /* 0x00000004020d7981 */
/* 0x001ea4000c1e1900 */
/*0560*/ FADD R13, R13, c[0x0][0x170] ; /* 0x00005c000d0d7621 */
/* 0x004fca0000000000 */
/*0570*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0001e4000c101904 */
/*0580*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0590*/ LDG.E R13, [R8.64] ; /* 0x00000004080d7981 */
/* 0x001ea8000c1e1900 */
/*05a0*/ LDG.E R14, [R4.64] ; /* 0x00000004040e7981 */
/* 0x000ee8000c1e1900 */
/*05b0*/ LDG.E R17, [R6.64] ; /* 0x0000000406117981 */
/* 0x000f22000c1e1900 */
/*05c0*/ MUFU.RCP R16, R11 ; /* 0x0000000b00107308 */
/* 0x000e220000001000 */
/*05d0*/ BSSY B0, 0x6d0 ; /* 0x000000f000007945 */
/* 0x000fe20003800000 */
/*05e0*/ FADD R15, R13, R13 ; /* 0x0000000d0d0f7221 */
/* 0x004fc80000000000 */
/*05f0*/ FADD R14, R14, -R15 ; /* 0x8000000f0e0e7221 */
/* 0x008fe40000000000 */
/*0600*/ FFMA R15, -R11, R16, 1 ; /* 0x3f8000000b0f7423 */
/* 0x001fe40000000110 */
/*0610*/ FADD R14, R14, R17 ; /* 0x000000110e0e7221 */
/* 0x010fe40000000000 */
/*0620*/ FFMA R17, R16, R15, R16 ; /* 0x0000000f10117223 */
/* 0x000fe40000000010 */
/*0630*/ FMUL R14, R14, c[0x0][0x178] ; /* 0x00005e000e0e7a20 */
/* 0x000fc80000400000 */
/*0640*/ FCHK P0, R14, R11 ; /* 0x0000000b0e007302 */
/* 0x000e220000000000 */
/*0650*/ FFMA R15, R17, R14, RZ ; /* 0x0000000e110f7223 */
/* 0x000fc800000000ff */
/*0660*/ FFMA R16, -R11, R15, R14 ; /* 0x0000000f0b107223 */
/* 0x000fc8000000010e */
/*0670*/ FFMA R16, R17, R16, R15 ; /* 0x0000001011107223 */
/* 0x000fe2000000000f */
/*0680*/ @!P0 BRA 0x6c0 ; /* 0x0000003000008947 */
/* 0x001fea0003800000 */
/*0690*/ MOV R17, R14 ; /* 0x0000000e00117202 */
/* 0x000fe40000000f00 */
/*06a0*/ MOV R14, 0x6c0 ; /* 0x000006c0000e7802 */
/* 0x000fe40000000f00 */
/*06b0*/ CALL.REL.NOINC 0xb00 ; /* 0x0000044000007944 */
/* 0x000fea0003c00000 */
/*06c0*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*06d0*/ FADD R13, R13, R16 ; /* 0x000000100d0d7221 */
/* 0x000fe20000000000 */
/*06e0*/ BSSY B0, 0x760 ; /* 0x0000007000007945 */
/* 0x000fe80003800000 */
/*06f0*/ STG.E [R8.64], R13 ; /* 0x0000000d08007986 */
/* 0x0001e8000c101904 */
/*0700*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0710*/ @P2 BRA 0x750 ; /* 0x0000003000002947 */
/* 0x000fea0003800000 */
/*0720*/ LDG.E R13, [R2.64] ; /* 0x00000004020d7981 */
/* 0x001ea4000c1e1900 */
/*0730*/ FADD R13, R13, c[0x0][0x170] ; /* 0x00005c000d0d7621 */
/* 0x004fca0000000000 */
/*0740*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0001e4000c101904 */
/*0750*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0760*/ LDG.E R13, [R8.64] ; /* 0x00000004080d7981 */
/* 0x001ea8000c1e1900 */
/*0770*/ LDG.E R14, [R4.64] ; /* 0x00000004040e7981 */
/* 0x000ee8000c1e1900 */
/*0780*/ LDG.E R17, [R6.64] ; /* 0x0000000406117981 */
/* 0x000f22000c1e1900 */
/*0790*/ MUFU.RCP R16, R11 ; /* 0x0000000b00107308 */
/* 0x000e220000001000 */
/*07a0*/ BSSY B0, 0x8a0 ; /* 0x000000f000007945 */
/* 0x000fe20003800000 */
/*07b0*/ FADD R15, R13, R13 ; /* 0x0000000d0d0f7221 */
/* 0x004fc80000000000 */
/*07c0*/ FADD R14, R14, -R15 ; /* 0x8000000f0e0e7221 */
/* 0x008fe40000000000 */
/*07d0*/ FFMA R15, -R11, R16, 1 ; /* 0x3f8000000b0f7423 */
/* 0x001fe40000000110 */
/*07e0*/ FADD R14, R14, R17 ; /* 0x000000110e0e7221 */
/* 0x010fe40000000000 */
/*07f0*/ FFMA R17, R16, R15, R16 ; /* 0x0000000f10117223 */
/* 0x000fe40000000010 */
/*0800*/ FMUL R14, R14, c[0x0][0x178] ; /* 0x00005e000e0e7a20 */
/* 0x000fc80000400000 */
/*0810*/ FCHK P0, R14, R11 ; /* 0x0000000b0e007302 */
/* 0x000e220000000000 */
/*0820*/ FFMA R15, R17, R14, RZ ; /* 0x0000000e110f7223 */
/* 0x000fc800000000ff */
/*0830*/ FFMA R16, -R11, R15, R14 ; /* 0x0000000f0b107223 */
/* 0x000fc8000000010e */
/*0840*/ FFMA R16, R17, R16, R15 ; /* 0x0000001011107223 */
/* 0x000fe2000000000f */
/*0850*/ @!P0 BRA 0x890 ; /* 0x0000003000008947 */
/* 0x001fea0003800000 */
/*0860*/ IMAD.MOV.U32 R17, RZ, RZ, R14 ; /* 0x000000ffff117224 */
/* 0x000fe200078e000e */
/*0870*/ MOV R14, 0x890 ; /* 0x00000890000e7802 */
/* 0x000fe40000000f00 */
/*0880*/ CALL.REL.NOINC 0xb00 ; /* 0x0000027000007944 */
/* 0x000fea0003c00000 */
/*0890*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*08a0*/ FADD R13, R13, R16 ; /* 0x000000100d0d7221 */
/* 0x000fca0000000000 */
/*08b0*/ STG.E [R8.64], R13 ; /* 0x0000000d08007986 */
/* 0x0001e8000c101904 */
/*08c0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*08d0*/ @P3 BRA 0x190 ; /* 0xfffff8b000003947 */
/* 0x000fea000383ffff */
/*08e0*/ ISETP.NE.AND P0, PT, R10, RZ, PT ; /* 0x000000ff0a00720c */
/* 0x000fda0003f05270 */
/*08f0*/ @!P0 EXIT ; /* 0x000000000000894d */
/* 0x000fea0003800000 */
/*0900*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */
/* 0x000fda0003f05270 */
/*0910*/ @!P0 LDG.E R12, [R2.64] ; /* 0x00000004020c8981 */
/* 0x000ea4000c1e1900 */
/*0920*/ @!P0 FADD R13, R12, c[0x0][0x170] ; /* 0x00005c000c0d8621 */
/* 0x005fca0000000000 */
/*0930*/ @!P0 STG.E [R2.64], R13 ; /* 0x0000000d02008986 */
/* 0x0001e8000c101904 */
/*0940*/ LDG.E R12, [R8.64] ; /* 0x00000004080c7981 */
/* 0x000ea8000c1e1900 */
/*0950*/ LDG.E R14, [R4.64] ; /* 0x00000004040e7981 */
/* 0x000ee8000c1e1900 */
/*0960*/ LDG.E R17, [R6.64] ; /* 0x0000000406117981 */
/* 0x000f22000c1e1900 */
/*0970*/ MUFU.RCP R16, R11 ; /* 0x0000000b00107308 */
/* 0x000e620000001000 */
/*0980*/ BSSY B0, 0xa90 ; /* 0x0000010000007945 */
/* 0x000fe20003800000 */
/*0990*/ FADD R15, R12, R12 ; /* 0x0000000c0c0f7221 */
/* 0x004fc80000000000 */
/*09a0*/ FADD R14, R14, -R15 ; /* 0x8000000f0e0e7221 */
/* 0x008fe40000000000 */
/*09b0*/ FFMA R15, -R11, R16, 1 ; /* 0x3f8000000b0f7423 */
/* 0x002fe40000000110 */
/*09c0*/ FADD R14, R14, R17 ; /* 0x000000110e0e7221 */
/* 0x010fe40000000000 */
/*09d0*/ FFMA R15, R16, R15, R16 ; /* 0x0000000f100f7223 */
/* 0x000fe40000000010 */
/*09e0*/ FMUL R14, R14, c[0x0][0x178] ; /* 0x00005e000e0e7a20 */
/* 0x000fc80000400000 */
/*09f0*/ FCHK P0, R14, R11 ; /* 0x0000000b0e007302 */
/* 0x000e620000000000 */
/*0a00*/ FFMA R13, R15, R14, RZ ; /* 0x0000000e0f0d7223 */
/* 0x001fc800000000ff */
/*0a10*/ FFMA R16, -R11, R13, R14 ; /* 0x0000000d0b107223 */
/* 0x000fc8000000010e */
/*0a20*/ FFMA R13, R15, R16, R13 ; /* 0x000000100f0d7223 */
/* 0x000fe2000000000d */
/*0a30*/ @!P0 BRA 0xa80 ; /* 0x0000004000008947 */
/* 0x002fea0003800000 */
/*0a40*/ MOV R17, R14 ; /* 0x0000000e00117202 */
/* 0x000fe40000000f00 */
/*0a50*/ MOV R14, 0xa70 ; /* 0x00000a70000e7802 */
/* 0x000fe40000000f00 */
/*0a60*/ CALL.REL.NOINC 0xb00 ; /* 0x0000009000007944 */
/* 0x000fea0003c00000 */
/*0a70*/ IMAD.MOV.U32 R13, RZ, RZ, R16 ; /* 0x000000ffff0d7224 */
/* 0x000fe400078e0010 */
/*0a80*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0a90*/ IADD3 R10, R10, -0x1, RZ ; /* 0xffffffff0a0a7810 */
/* 0x000fe20007ffe0ff */
/*0aa0*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */
/* 0x000fc60000000000 */
/*0ab0*/ ISETP.NE.AND P0, PT, R10, RZ, PT ; /* 0x000000ff0a00720c */
/* 0x000fe40003f05270 */
/*0ac0*/ STG.E [R8.64], R13 ; /* 0x0000000d08007986 */
/* 0x0001e8000c101904 */
/*0ad0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fee0000010000 */
/*0ae0*/ @P0 BRA 0x900 ; /* 0xfffffe1000000947 */
/* 0x000fea000383ffff */
/*0af0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0b00*/ SHF.R.U32.HI R15, RZ, 0x17, R11 ; /* 0x00000017ff0f7819 */
/* 0x000fe2000001160b */
/*0b10*/ BSSY B1, 0x1150 ; /* 0x0000063000017945 */
/* 0x000fe20003800000 */
/*0b20*/ SHF.R.U32.HI R18, RZ, 0x17, R17 ; /* 0x00000017ff127819 */
/* 0x000fc40000011611 */
/*0b30*/ LOP3.LUT R15, R15, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff0f0f7812 */
/* 0x000fe400078ec0ff */
/*0b40*/ LOP3.LUT R18, R18, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff12127812 */
/* 0x000fe400078ec0ff */
/*0b50*/ IADD3 R21, R15, -0x1, RZ ; /* 0xffffffff0f157810 */
/* 0x000fe40007ffe0ff */
/*0b60*/ IADD3 R19, R18, -0x1, RZ ; /* 0xffffffff12137810 */
/* 0x000fe40007ffe0ff */
/*0b70*/ ISETP.GT.U32.AND P0, PT, R21, 0xfd, PT ; /* 0x000000fd1500780c */
/* 0x000fe40003f04070 */
/*0b80*/ MOV R20, R11 ; /* 0x0000000b00147202 */
/* 0x000fc40000000f00 */
/*0b90*/ ISETP.GT.U32.OR P0, PT, R19, 0xfd, P0 ; /* 0x000000fd1300780c */
/* 0x000fda0000704470 */
/*0ba0*/ @!P0 IMAD.MOV.U32 R16, RZ, RZ, RZ ; /* 0x000000ffff108224 */
/* 0x000fe200078e00ff */
/*0bb0*/ @!P0 BRA 0xd30 ; /* 0x0000017000008947 */
/* 0x000fea0003800000 */
/*0bc0*/ FSETP.GTU.FTZ.AND P0, PT, |R17|, +INF , PT ; /* 0x7f8000001100780b */
/* 0x000fe40003f1c200 */
/*0bd0*/ FSETP.GTU.FTZ.AND P1, PT, |R11|, +INF , PT ; /* 0x7f8000000b00780b */
/* 0x000fc80003f3c200 */
/*0be0*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */
/* 0x000fda0000703570 */
/*0bf0*/ @P0 BRA 0x1130 ; /* 0x0000053000000947 */
/* 0x000fea0003800000 */
/*0c00*/ LOP3.LUT P0, RZ, R20, 0x7fffffff, R17, 0xc8, !PT ; /* 0x7fffffff14ff7812 */
/* 0x000fda000780c811 */
/*0c10*/ @!P0 BRA 0x1110 ; /* 0x000004f000008947 */
/* 0x000fea0003800000 */
/*0c20*/ FSETP.NEU.FTZ.AND P4, PT, |R17|, +INF , PT ; /* 0x7f8000001100780b */
/* 0x000fe40003f9d200 */
/*0c30*/ FSETP.NEU.FTZ.AND P1, PT, |R11|, +INF , PT ; /* 0x7f8000000b00780b */
/* 0x000fe40003f3d200 */
/*0c40*/ FSETP.NEU.FTZ.AND P0, PT, |R17|, +INF , PT ; /* 0x7f8000001100780b */
/* 0x000fd60003f1d200 */
/*0c50*/ @!P1 BRA !P4, 0x1110 ; /* 0x000004b000009947 */
/* 0x000fea0006000000 */
/*0c60*/ LOP3.LUT P4, RZ, R17, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff11ff7812 */
/* 0x000fc8000788c0ff */
/*0c70*/ PLOP3.LUT P1, PT, P1, P4, PT, 0x2a, 0x0 ; /* 0x000000000000781c */
/* 0x000fda0000f28572 */
/*0c80*/ @P1 BRA 0x10f0 ; /* 0x0000046000001947 */
/* 0x000fea0003800000 */
/*0c90*/ LOP3.LUT P1, RZ, R20, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff14ff7812 */
/* 0x000fc8000782c0ff */
/*0ca0*/ PLOP3.LUT P0, PT, P0, P1, PT, 0x2a, 0x0 ; /* 0x000000000000781c */
/* 0x000fda0000702572 */
/*0cb0*/ @P0 BRA 0x10c0 ; /* 0x0000040000000947 */
/* 0x000fea0003800000 */
/*0cc0*/ ISETP.GE.AND P0, PT, R19, RZ, PT ; /* 0x000000ff1300720c */
/* 0x000fe40003f06270 */
/*0cd0*/ ISETP.GE.AND P1, PT, R21, RZ, PT ; /* 0x000000ff1500720c */
/* 0x000fd60003f26270 */
/*0ce0*/ @P0 MOV R16, RZ ; /* 0x000000ff00100202 */
/* 0x000fe20000000f00 */
/*0cf0*/ @!P0 IMAD.MOV.U32 R16, RZ, RZ, -0x40 ; /* 0xffffffc0ff108424 */
/* 0x000fe400078e00ff */
/*0d00*/ @!P0 FFMA R17, R17, 1.84467440737095516160e+19, RZ ; /* 0x5f80000011118823 */
/* 0x000fe400000000ff */
/*0d10*/ @!P1 FFMA R20, R11, 1.84467440737095516160e+19, RZ ; /* 0x5f8000000b149823 */
/* 0x000fe200000000ff */
/*0d20*/ @!P1 IADD3 R16, R16, 0x40, RZ ; /* 0x0000004010109810 */
/* 0x000fe40007ffe0ff */
/*0d30*/ LEA R19, R15, 0xc0800000, 0x17 ; /* 0xc08000000f137811 */
/* 0x000fe200078eb8ff */
/*0d40*/ BSSY B2, 0x10b0 ; /* 0x0000036000027945 */
/* 0x000fe20003800000 */
/*0d50*/ IADD3 R18, R18, -0x7f, RZ ; /* 0xffffff8112127810 */
/* 0x000fe40007ffe0ff */
/*0d60*/ IADD3 R23, -R19, R20, RZ ; /* 0x0000001413177210 */
/* 0x000fc60007ffe1ff */
/*0d70*/ IMAD R22, R18.reuse, -0x800000, R17 ; /* 0xff80000012167824 */
/* 0x040fe200078e0211 */
/*0d80*/ MUFU.RCP R20, R23 ; /* 0x0000001700147308 */
/* 0x0000620000001000 */
/*0d90*/ FADD.FTZ R19, -R23, -RZ ; /* 0x800000ff17137221 */
/* 0x000fe20000010100 */
/*0da0*/ IADD3 R23, R18, 0x7f, -R15 ; /* 0x0000007f12177810 */
/* 0x001fca0007ffe80f */
/*0db0*/ IMAD.IADD R18, R23, 0x1, R16 ; /* 0x0000000117127824 */
/* 0x000fe400078e0210 */
/*0dc0*/ FFMA R21, R20, R19, 1 ; /* 0x3f80000014157423 */
/* 0x002fc80000000013 */
/*0dd0*/ FFMA R17, R20, R21, R20 ; /* 0x0000001514117223 */
/* 0x000fc80000000014 */
/*0de0*/ FFMA R20, R22, R17, RZ ; /* 0x0000001116147223 */
/* 0x000fc800000000ff */
/*0df0*/ FFMA R21, R19, R20, R22 ; /* 0x0000001413157223 */
/* 0x000fc80000000016 */
/*0e00*/ FFMA R20, R17, R21, R20 ; /* 0x0000001511147223 */
/* 0x000fc80000000014 */
/*0e10*/ FFMA R19, R19, R20, R22 ; /* 0x0000001413137223 */
/* 0x000fc80000000016 */
/*0e20*/ FFMA R21, R17, R19, R20 ; /* 0x0000001311157223 */
/* 0x000fca0000000014 */
/*0e30*/ SHF.R.U32.HI R15, RZ, 0x17, R21 ; /* 0x00000017ff0f7819 */
/* 0x000fc80000011615 */
/*0e40*/ LOP3.LUT R15, R15, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff0f0f7812 */
/* 0x000fc800078ec0ff */
/*0e50*/ IADD3 R16, R15, R18, RZ ; /* 0x000000120f107210 */
/* 0x000fc80007ffe0ff */
/*0e60*/ IADD3 R15, R16, -0x1, RZ ; /* 0xffffffff100f7810 */
/* 0x000fc80007ffe0ff */
/*0e70*/ ISETP.GE.U32.AND P0, PT, R15, 0xfe, PT ; /* 0x000000fe0f00780c */
/* 0x000fda0003f06070 */
/*0e80*/ @!P0 BRA 0x1090 ; /* 0x0000020000008947 */
/* 0x000fea0003800000 */
/*0e90*/ ISETP.GT.AND P0, PT, R16, 0xfe, PT ; /* 0x000000fe1000780c */
/* 0x000fda0003f04270 */
/*0ea0*/ @P0 BRA 0x1060 ; /* 0x000001b000000947 */
/* 0x000fea0003800000 */
/*0eb0*/ ISETP.GE.AND P0, PT, R16, 0x1, PT ; /* 0x000000011000780c */
/* 0x000fda0003f06270 */
/*0ec0*/ @P0 BRA 0x10a0 ; /* 0x000001d000000947 */
/* 0x000fea0003800000 */
/*0ed0*/ ISETP.GE.AND P0, PT, R16, -0x18, PT ; /* 0xffffffe81000780c */
/* 0x000fe40003f06270 */
/*0ee0*/ LOP3.LUT R21, R21, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000015157812 */
/* 0x000fd600078ec0ff */
/*0ef0*/ @!P0 BRA 0x10a0 ; /* 0x000001a000008947 */
/* 0x000fea0003800000 */
/*0f00*/ FFMA.RZ R15, R17, R19.reuse, R20.reuse ; /* 0x00000013110f7223 */
/* 0x180fe2000000c014 */
/*0f10*/ ISETP.NE.AND P4, PT, R16.reuse, RZ, PT ; /* 0x000000ff1000720c */
/* 0x040fe40003f85270 */
/*0f20*/ ISETP.NE.AND P1, PT, R16.reuse, RZ, PT ; /* 0x000000ff1000720c */
/* 0x040fe40003f25270 */
/*0f30*/ LOP3.LUT R18, R15, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff0f127812 */
/* 0x000fe200078ec0ff */
/*0f40*/ FFMA.RP R15, R17.reuse, R19.reuse, R20.reuse ; /* 0x00000013110f7223 */
/* 0x1c0fe40000008014 */
/*0f50*/ FFMA.RM R20, R17, R19, R20 ; /* 0x0000001311147223 */
/* 0x000fe20000004014 */
/*0f60*/ IADD3 R17, R16, 0x20, RZ ; /* 0x0000002010117810 */
/* 0x000fe20007ffe0ff */
/*0f70*/ IMAD.MOV R16, RZ, RZ, -R16 ; /* 0x000000ffff107224 */
/* 0x000fe200078e0a10 */
/*0f80*/ LOP3.LUT R18, R18, 0x800000, RZ, 0xfc, !PT ; /* 0x0080000012127812 */
/* 0x000fc400078efcff */
/*0f90*/ FSETP.NEU.FTZ.AND P0, PT, R15, R20, PT ; /* 0x000000140f00720b */
/* 0x000fe40003f1d000 */
/*0fa0*/ SHF.L.U32 R17, R18, R17, RZ ; /* 0x0000001112117219 */
/* 0x000fe400000006ff */
/*0fb0*/ SEL R15, R16, RZ, P4 ; /* 0x000000ff100f7207 */
/* 0x000fe40002000000 */
/*0fc0*/ ISETP.NE.AND P1, PT, R17, RZ, P1 ; /* 0x000000ff1100720c */
/* 0x000fe40000f25270 */
/*0fd0*/ SHF.R.U32.HI R15, RZ, R15, R18 ; /* 0x0000000fff0f7219 */
/* 0x000fe40000011612 */
/*0fe0*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */
/* 0x000fc40000703570 */
/*0ff0*/ SHF.R.U32.HI R17, RZ, 0x1, R15 ; /* 0x00000001ff117819 */
/* 0x000fe4000001160f */
/*1000*/ SEL R16, RZ, 0x1, !P0 ; /* 0x00000001ff107807 */
/* 0x000fc80004000000 */
/*1010*/ LOP3.LUT R16, R16, 0x1, R17, 0xf8, !PT ; /* 0x0000000110107812 */
/* 0x000fc800078ef811 */
/*1020*/ LOP3.LUT R16, R16, R15, RZ, 0xc0, !PT ; /* 0x0000000f10107212 */
/* 0x000fc800078ec0ff */
/*1030*/ IADD3 R16, R17, R16, RZ ; /* 0x0000001011107210 */
/* 0x000fc80007ffe0ff */
/*1040*/ LOP3.LUT R21, R16, R21, RZ, 0xfc, !PT ; /* 0x0000001510157212 */
/* 0x000fe200078efcff */
/*1050*/ BRA 0x10a0 ; /* 0x0000004000007947 */
/* 0x000fea0003800000 */
/*1060*/ LOP3.LUT R21, R21, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000015157812 */
/* 0x000fc800078ec0ff */
/*1070*/ LOP3.LUT R21, R21, 0x7f800000, RZ, 0xfc, !PT ; /* 0x7f80000015157812 */
/* 0x000fe200078efcff */
/*1080*/ BRA 0x10a0 ; /* 0x0000001000007947 */
/* 0x000fea0003800000 */
/*1090*/ IMAD R21, R18, 0x800000, R21 ; /* 0x0080000012157824 */
/* 0x000fe400078e0215 */
/*10a0*/ BSYNC B2 ; /* 0x0000000000027941 */
/* 0x000fea0003800000 */
/*10b0*/ BRA 0x1140 ; /* 0x0000008000007947 */
/* 0x000fea0003800000 */
/*10c0*/ LOP3.LUT R17, R20, 0x80000000, R17, 0x48, !PT ; /* 0x8000000014117812 */
/* 0x000fc800078e4811 */
/*10d0*/ LOP3.LUT R21, R17, 0x7f800000, RZ, 0xfc, !PT ; /* 0x7f80000011157812 */
/* 0x000fe200078efcff */
/*10e0*/ BRA 0x1140 ; /* 0x0000005000007947 */
/* 0x000fea0003800000 */
/*10f0*/ LOP3.LUT R21, R20, 0x80000000, R17, 0x48, !PT ; /* 0x8000000014157812 */
/* 0x000fe200078e4811 */
/*1100*/ BRA 0x1140 ; /* 0x0000003000007947 */
/* 0x000fea0003800000 */
/*1110*/ MUFU.RSQ R21, -QNAN ; /* 0xffc0000000157908 */
/* 0x000e220000001400 */
/*1120*/ BRA 0x1140 ; /* 0x0000001000007947 */
/* 0x000fea0003800000 */
/*1130*/ FADD.FTZ R21, R17, R11 ; /* 0x0000000b11157221 */
/* 0x000fe40000010000 */
/*1140*/ BSYNC B1 ; /* 0x0000000000017941 */
/* 0x000fea0003800000 */
/*1150*/ IMAD.MOV.U32 R15, RZ, RZ, 0x0 ; /* 0x00000000ff0f7424 */
/* 0x000fe200078e00ff */
/*1160*/ MOV R16, R21 ; /* 0x0000001500107202 */
/* 0x001fc60000000f00 */
/*1170*/ RET.REL.NODEC R14 0x0 ; /* 0xffffee800e007950 */
/* 0x000fea0003c3ffff */
/*1180*/ BRA 0x1180; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*1190*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*11a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*11b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*11c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*11d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*11e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*11f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1200*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1210*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1220*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1230*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1240*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1250*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1260*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1270*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /*
============================================================================
Name : sem1.cu
Author : maminov
Version :
Copyright : copyleft
Description : CUDA compute reciprocals
============================================================================
*/
#include <cuda_runtime.h>
#include <device_launch_parameters.h>
#include <iostream>
#include <numeric>
#include <stdlib.h>
static void CheckCudaErrorAux(const char *, unsigned, const char *, cudaError_t);
#define CUDA_CHECK_RETURN(value) CheckCudaErrorAux(__FILE__,__LINE__, #value, value)
/**
* CUDA kernel that computes reciprocal values for a given vector
*/
__global__ void heatKernel(float *data, unsigned size, unsigned iterations, float tempPerIteration, float dx, float dt) {
unsigned idx = blockIdx.x*blockDim.x + threadIdx.x;
if (idx < size)
for (int i = 0; i < iterations; ++i) {
if (idx == 0)
data[size + 1] += tempPerIteration;
data[idx + 1] += (data[idx - 1 + 1] - 2 * data[idx + 1] + data[idx + 1 + 1]) * dt / (dx*dx);
__syncthreads();
}
}
void initialize(float *data, unsigned size)
{
for (unsigned i = 0; i < size; ++i)
data[i] = 0.;
}
int main(void)
{
static const int SIM_TIME = 5;
static const int STEPS_PER_SECOND = 10;
static const int CYL_LENGTH = 10;
static const int STEPS_PER_METER = 10;
static const int WORK_SIZE = CYL_LENGTH * STEPS_PER_METER;
static const int BLOCK_SIZE = 256;
static const float TEMP_PER_SEC = 5.;
float *hostData = new float[WORK_SIZE + 2];
float *gpuData;
initialize(hostData, WORK_SIZE + 2);
CUDA_CHECK_RETURN(cudaMalloc((void **)&gpuData, sizeof(float)*(WORK_SIZE + 2)));
CUDA_CHECK_RETURN(cudaMemcpy(gpuData, hostData, sizeof(float)*(WORK_SIZE + 2), cudaMemcpyHostToDevice));
float *result = new float[WORK_SIZE + 2];
const int blockCount = (WORK_SIZE + BLOCK_SIZE - 1) / BLOCK_SIZE;
heatKernel <<< blockCount, BLOCK_SIZE >>> (gpuData, WORK_SIZE, SIM_TIME * STEPS_PER_SECOND, TEMP_PER_SEC / (STEPS_PER_SECOND*1.0f), CYL_LENGTH / (STEPS_PER_METER*1.0f), SIM_TIME / (STEPS_PER_SECOND*1.0f));
CUDA_CHECK_RETURN(cudaMemcpy(result, gpuData, sizeof(float)*(WORK_SIZE + 2), cudaMemcpyDeviceToHost));
/* Verify the results */
for (int i = 0; i < WORK_SIZE; ++i)
std::cout << result[i + 1] << std::endl;
/* Free memory */
CUDA_CHECK_RETURN(cudaFree(gpuData));
delete[] hostData;
delete[] result;
return 0;
}
/**
* Check the return value of the CUDA runtime API call and exit
* the application if the call has failed.
*/
static void CheckCudaErrorAux(const char *file, unsigned line, const char *statement, cudaError_t err)
{
if (err == cudaSuccess)
return;
std::cerr << statement << " returned " << cudaGetErrorString(err) << "(" << err << ") at " << file << ":" << line << std::endl;
exit(1);
} | .file "tmpxft_00059100_00000000-6_kernel.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string " returned "
.LC1:
.string "("
.LC2:
.string ") at "
.LC3:
.string ":"
#NO_APP
.text
.type _ZL17CheckCudaErrorAuxPKcjS0_9cudaError, @function
_ZL17CheckCudaErrorAuxPKcjS0_9cudaError:
.LFB3710:
.cfi_startproc
testl %ecx, %ecx
jne .L7
ret
.L7:
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $8, %rsp
.cfi_def_cfa_offset 48
movq %rdi, %rbp
movl %esi, %r12d
movl %ecx, %ebx
movq %rdx, %rsi
leaq _ZSt4cerr(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
leaq .LC0(%rip), %rsi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %r13
movl %ebx, %edi
call cudaGetErrorString@PLT
movq %rax, %rsi
movq %r13, %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
leaq .LC1(%rip), %rsi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movl %ebx, %esi
call _ZNSolsEi@PLT
movq %rax, %rdi
leaq .LC2(%rip), %rsi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movq %rbp, %rsi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
leaq .LC3(%rip), %rsi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movl %r12d, %esi
call _ZNSo9_M_insertImEERSoT_@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
movl $1, %edi
call exit@PLT
.cfi_endproc
.LFE3710:
.size _ZL17CheckCudaErrorAuxPKcjS0_9cudaError, .-_ZL17CheckCudaErrorAuxPKcjS0_9cudaError
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3713:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3713:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z10initializePfj
.type _Z10initializePfj, @function
_Z10initializePfj:
.LFB3708:
.cfi_startproc
endbr64
testl %esi, %esi
je .L10
movq %rdi, %rax
movl %esi, %esi
leaq (%rdi,%rsi,4), %rdx
.L12:
movl $0x00000000, (%rax)
addq $4, %rax
cmpq %rdx, %rax
jne .L12
.L10:
ret
.cfi_endproc
.LFE3708:
.size _Z10initializePfj, .-_Z10initializePfj
.globl _Z35__device_stub__Z10heatKernelPfjjfffPfjjfff
.type _Z35__device_stub__Z10heatKernelPfjjfffPfjjfff, @function
_Z35__device_stub__Z10heatKernelPfjjfffPfjjfff:
.LFB3735:
.cfi_startproc
endbr64
subq $168, %rsp
.cfi_def_cfa_offset 176
movq %rdi, 24(%rsp)
movl %esi, 20(%rsp)
movl %edx, 16(%rsp)
movss %xmm0, 12(%rsp)
movss %xmm1, 8(%rsp)
movss %xmm2, 4(%rsp)
movq %fs:40, %rax
movq %rax, 152(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 20(%rsp), %rax
movq %rax, 104(%rsp)
leaq 16(%rsp), %rax
movq %rax, 112(%rsp)
leaq 12(%rsp), %rax
movq %rax, 120(%rsp)
leaq 8(%rsp), %rax
movq %rax, 128(%rsp)
leaq 4(%rsp), %rax
movq %rax, 136(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L18
.L14:
movq 152(%rsp), %rax
subq %fs:40, %rax
jne .L19
addq $168, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L18:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 184
pushq 40(%rsp)
.cfi_def_cfa_offset 192
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z10heatKernelPfjjfff(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 176
jmp .L14
.L19:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3735:
.size _Z35__device_stub__Z10heatKernelPfjjfffPfjjfff, .-_Z35__device_stub__Z10heatKernelPfjjfffPfjjfff
.globl _Z10heatKernelPfjjfff
.type _Z10heatKernelPfjjfff, @function
_Z10heatKernelPfjjfff:
.LFB3736:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z35__device_stub__Z10heatKernelPfjjfffPfjjfff
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3736:
.size _Z10heatKernelPfjjfff, .-_Z10heatKernelPfjjfff
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC5:
.string "cudaMalloc((void **)&gpuData, sizeof(float)*(WORK_SIZE + 2))"
.align 8
.LC6:
.string "/home/ubuntu/Datasets/stackv2/train-structured/xobotun/TP_CUDA/master/Sem1/Sem1/kernel.cu"
.align 8
.LC7:
.string "cudaMemcpy(gpuData, hostData, sizeof(float)*(WORK_SIZE + 2), cudaMemcpyHostToDevice)"
.align 8
.LC10:
.string "cudaMemcpy(result, gpuData, sizeof(float)*(WORK_SIZE + 2), cudaMemcpyDeviceToHost)"
.section .rodata.str1.1
.LC11:
.string "cudaFree(gpuData)"
.text
.globl main
.type main, @function
main:
.LFB3709:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $72, %rsp
.cfi_def_cfa_offset 128
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
movl $408, %edi
call _Znam@PLT
movq %rax, %r15
movq %rax, 8(%rsp)
movl $102, %esi
movq %rax, %rdi
call _Z10initializePfj
leaq 24(%rsp), %rdi
movl $408, %esi
call cudaMalloc@PLT
movl %eax, %ecx
leaq .LC5(%rip), %rdx
movl $58, %esi
leaq .LC6(%rip), %rbx
movq %rbx, %rdi
call _ZL17CheckCudaErrorAuxPKcjS0_9cudaError
movl $1, %ecx
movl $408, %edx
movq %r15, %rsi
movq 24(%rsp), %rdi
call cudaMemcpy@PLT
movl %eax, %ecx
leaq .LC7(%rip), %rdx
movl $59, %esi
movq %rbx, %rdi
call _ZL17CheckCudaErrorAuxPKcjS0_9cudaError
movl $408, %edi
call _Znam@PLT
movq %rax, %r15
movl $256, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 44(%rsp), %rdx
movl $1, %ecx
movq 32(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L32
.L23:
movl $2, %ecx
movl $408, %edx
movq 24(%rsp), %rsi
movq %r15, %rdi
call cudaMemcpy@PLT
movl %eax, %ecx
leaq .LC10(%rip), %rdx
movl $66, %esi
leaq .LC6(%rip), %rdi
call _ZL17CheckCudaErrorAuxPKcjS0_9cudaError
leaq 4(%r15), %r12
leaq 404(%r15), %r14
leaq _ZSt4cout(%rip), %r13
jmp .L28
.L32:
movss .LC8(%rip), %xmm2
movss .LC9(%rip), %xmm1
movaps %xmm2, %xmm0
movl $50, %edx
movl $100, %esi
movq 24(%rsp), %rdi
call _Z35__device_stub__Z10heatKernelPfjjfffPfjjfff
jmp .L23
.L35:
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L33
call _ZSt16__throw_bad_castv@PLT
.L33:
call __stack_chk_fail@PLT
.L36:
movzbl 67(%rbp), %esi
.L27:
movsbl %sil, %esi
movq %rbx, %rdi
call _ZNSo3putEc@PLT
movq %rax, %rdi
call _ZNSo5flushEv@PLT
addq $4, %r12
cmpq %r14, %r12
je .L34
.L28:
pxor %xmm0, %xmm0
cvtss2sd (%r12), %xmm0
movq %r13, %rdi
call _ZNSo9_M_insertIdEERSoT_@PLT
movq %rax, %rbx
movq (%rax), %rax
movq -24(%rax), %rax
movq 240(%rbx,%rax), %rbp
testq %rbp, %rbp
je .L35
cmpb $0, 56(%rbp)
jne .L36
movq %rbp, %rdi
call _ZNKSt5ctypeIcE13_M_widen_initEv@PLT
movq 0(%rbp), %rax
movl $10, %esi
movq %rbp, %rdi
call *48(%rax)
movl %eax, %esi
jmp .L27
.L34:
movq 24(%rsp), %rdi
call cudaFree@PLT
movl %eax, %ecx
leaq .LC11(%rip), %rdx
movl $74, %esi
leaq .LC6(%rip), %rdi
call _ZL17CheckCudaErrorAuxPKcjS0_9cudaError
movq 8(%rsp), %rdi
call _ZdaPv@PLT
movq %r15, %rdi
call _ZdaPv@PLT
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L37
movl $0, %eax
addq $72, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L37:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3709:
.size main, .-main
.section .rodata.str1.1
.LC12:
.string "_Z10heatKernelPfjjfff"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3738:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC12(%rip), %rdx
movq %rdx, %rcx
leaq _Z10heatKernelPfjjfff(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3738:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC8:
.long 1056964608
.align 4
.LC9:
.long 1065353216
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /*
============================================================================
Name : sem1.cu
Author : maminov
Version :
Copyright : copyleft
Description : CUDA compute reciprocals
============================================================================
*/
#include <cuda_runtime.h>
#include <device_launch_parameters.h>
#include <iostream>
#include <numeric>
#include <stdlib.h>
static void CheckCudaErrorAux(const char *, unsigned, const char *, cudaError_t);
#define CUDA_CHECK_RETURN(value) CheckCudaErrorAux(__FILE__,__LINE__, #value, value)
/**
* CUDA kernel that computes reciprocal values for a given vector
*/
__global__ void heatKernel(float *data, unsigned size, unsigned iterations, float tempPerIteration, float dx, float dt) {
unsigned idx = blockIdx.x*blockDim.x + threadIdx.x;
if (idx < size)
for (int i = 0; i < iterations; ++i) {
if (idx == 0)
data[size + 1] += tempPerIteration;
data[idx + 1] += (data[idx - 1 + 1] - 2 * data[idx + 1] + data[idx + 1 + 1]) * dt / (dx*dx);
__syncthreads();
}
}
void initialize(float *data, unsigned size)
{
for (unsigned i = 0; i < size; ++i)
data[i] = 0.;
}
int main(void)
{
static const int SIM_TIME = 5;
static const int STEPS_PER_SECOND = 10;
static const int CYL_LENGTH = 10;
static const int STEPS_PER_METER = 10;
static const int WORK_SIZE = CYL_LENGTH * STEPS_PER_METER;
static const int BLOCK_SIZE = 256;
static const float TEMP_PER_SEC = 5.;
float *hostData = new float[WORK_SIZE + 2];
float *gpuData;
initialize(hostData, WORK_SIZE + 2);
CUDA_CHECK_RETURN(cudaMalloc((void **)&gpuData, sizeof(float)*(WORK_SIZE + 2)));
CUDA_CHECK_RETURN(cudaMemcpy(gpuData, hostData, sizeof(float)*(WORK_SIZE + 2), cudaMemcpyHostToDevice));
float *result = new float[WORK_SIZE + 2];
const int blockCount = (WORK_SIZE + BLOCK_SIZE - 1) / BLOCK_SIZE;
heatKernel <<< blockCount, BLOCK_SIZE >>> (gpuData, WORK_SIZE, SIM_TIME * STEPS_PER_SECOND, TEMP_PER_SEC / (STEPS_PER_SECOND*1.0f), CYL_LENGTH / (STEPS_PER_METER*1.0f), SIM_TIME / (STEPS_PER_SECOND*1.0f));
CUDA_CHECK_RETURN(cudaMemcpy(result, gpuData, sizeof(float)*(WORK_SIZE + 2), cudaMemcpyDeviceToHost));
/* Verify the results */
for (int i = 0; i < WORK_SIZE; ++i)
std::cout << result[i + 1] << std::endl;
/* Free memory */
CUDA_CHECK_RETURN(cudaFree(gpuData));
delete[] hostData;
delete[] result;
return 0;
}
/**
* Check the return value of the CUDA runtime API call and exit
* the application if the call has failed.
*/
static void CheckCudaErrorAux(const char *file, unsigned line, const char *statement, cudaError_t err)
{
if (err == cudaSuccess)
return;
std::cerr << statement << " returned " << cudaGetErrorString(err) << "(" << err << ") at " << file << ":" << line << std::endl;
exit(1);
} | /*
============================================================================
Name : sem1.cu
Author : maminov
Version :
Copyright : copyleft
Description : CUDA compute reciprocals
============================================================================
*/
#include <hip/hip_runtime.h>
#include <iostream>
#include <numeric>
#include <stdlib.h>
static void CheckCudaErrorAux(const char *, unsigned, const char *, hipError_t);
#define CUDA_CHECK_RETURN(value) CheckCudaErrorAux(__FILE__,__LINE__, #value, value)
/**
* CUDA kernel that computes reciprocal values for a given vector
*/
__global__ void heatKernel(float *data, unsigned size, unsigned iterations, float tempPerIteration, float dx, float dt) {
unsigned idx = blockIdx.x*blockDim.x + threadIdx.x;
if (idx < size)
for (int i = 0; i < iterations; ++i) {
if (idx == 0)
data[size + 1] += tempPerIteration;
data[idx + 1] += (data[idx - 1 + 1] - 2 * data[idx + 1] + data[idx + 1 + 1]) * dt / (dx*dx);
__syncthreads();
}
}
void initialize(float *data, unsigned size)
{
for (unsigned i = 0; i < size; ++i)
data[i] = 0.;
}
int main(void)
{
static const int SIM_TIME = 5;
static const int STEPS_PER_SECOND = 10;
static const int CYL_LENGTH = 10;
static const int STEPS_PER_METER = 10;
static const int WORK_SIZE = CYL_LENGTH * STEPS_PER_METER;
static const int BLOCK_SIZE = 256;
static const float TEMP_PER_SEC = 5.;
float *hostData = new float[WORK_SIZE + 2];
float *gpuData;
initialize(hostData, WORK_SIZE + 2);
CUDA_CHECK_RETURN(hipMalloc((void **)&gpuData, sizeof(float)*(WORK_SIZE + 2)));
CUDA_CHECK_RETURN(hipMemcpy(gpuData, hostData, sizeof(float)*(WORK_SIZE + 2), hipMemcpyHostToDevice));
float *result = new float[WORK_SIZE + 2];
const int blockCount = (WORK_SIZE + BLOCK_SIZE - 1) / BLOCK_SIZE;
heatKernel <<< blockCount, BLOCK_SIZE >>> (gpuData, WORK_SIZE, SIM_TIME * STEPS_PER_SECOND, TEMP_PER_SEC / (STEPS_PER_SECOND*1.0f), CYL_LENGTH / (STEPS_PER_METER*1.0f), SIM_TIME / (STEPS_PER_SECOND*1.0f));
CUDA_CHECK_RETURN(hipMemcpy(result, gpuData, sizeof(float)*(WORK_SIZE + 2), hipMemcpyDeviceToHost));
/* Verify the results */
for (int i = 0; i < WORK_SIZE; ++i)
std::cout << result[i + 1] << std::endl;
/* Free memory */
CUDA_CHECK_RETURN(hipFree(gpuData));
delete[] hostData;
delete[] result;
return 0;
}
/**
* Check the return value of the CUDA runtime API call and exit
* the application if the call has failed.
*/
static void CheckCudaErrorAux(const char *file, unsigned line, const char *statement, hipError_t err)
{
if (err == hipSuccess)
return;
std::cerr << statement << " returned " << hipGetErrorString(err) << "(" << err << ") at " << file << ":" << line << std::endl;
exit(1);
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | /*
============================================================================
Name : sem1.cu
Author : maminov
Version :
Copyright : copyleft
Description : CUDA compute reciprocals
============================================================================
*/
#include <hip/hip_runtime.h>
#include <iostream>
#include <numeric>
#include <stdlib.h>
static void CheckCudaErrorAux(const char *, unsigned, const char *, hipError_t);
#define CUDA_CHECK_RETURN(value) CheckCudaErrorAux(__FILE__,__LINE__, #value, value)
/**
* CUDA kernel that computes reciprocal values for a given vector
*/
__global__ void heatKernel(float *data, unsigned size, unsigned iterations, float tempPerIteration, float dx, float dt) {
unsigned idx = blockIdx.x*blockDim.x + threadIdx.x;
if (idx < size)
for (int i = 0; i < iterations; ++i) {
if (idx == 0)
data[size + 1] += tempPerIteration;
data[idx + 1] += (data[idx - 1 + 1] - 2 * data[idx + 1] + data[idx + 1 + 1]) * dt / (dx*dx);
__syncthreads();
}
}
void initialize(float *data, unsigned size)
{
for (unsigned i = 0; i < size; ++i)
data[i] = 0.;
}
int main(void)
{
static const int SIM_TIME = 5;
static const int STEPS_PER_SECOND = 10;
static const int CYL_LENGTH = 10;
static const int STEPS_PER_METER = 10;
static const int WORK_SIZE = CYL_LENGTH * STEPS_PER_METER;
static const int BLOCK_SIZE = 256;
static const float TEMP_PER_SEC = 5.;
float *hostData = new float[WORK_SIZE + 2];
float *gpuData;
initialize(hostData, WORK_SIZE + 2);
CUDA_CHECK_RETURN(hipMalloc((void **)&gpuData, sizeof(float)*(WORK_SIZE + 2)));
CUDA_CHECK_RETURN(hipMemcpy(gpuData, hostData, sizeof(float)*(WORK_SIZE + 2), hipMemcpyHostToDevice));
float *result = new float[WORK_SIZE + 2];
const int blockCount = (WORK_SIZE + BLOCK_SIZE - 1) / BLOCK_SIZE;
heatKernel <<< blockCount, BLOCK_SIZE >>> (gpuData, WORK_SIZE, SIM_TIME * STEPS_PER_SECOND, TEMP_PER_SEC / (STEPS_PER_SECOND*1.0f), CYL_LENGTH / (STEPS_PER_METER*1.0f), SIM_TIME / (STEPS_PER_SECOND*1.0f));
CUDA_CHECK_RETURN(hipMemcpy(result, gpuData, sizeof(float)*(WORK_SIZE + 2), hipMemcpyDeviceToHost));
/* Verify the results */
for (int i = 0; i < WORK_SIZE; ++i)
std::cout << result[i + 1] << std::endl;
/* Free memory */
CUDA_CHECK_RETURN(hipFree(gpuData));
delete[] hostData;
delete[] result;
return 0;
}
/**
* Check the return value of the CUDA runtime API call and exit
* the application if the call has failed.
*/
static void CheckCudaErrorAux(const char *file, unsigned line, const char *statement, hipError_t err)
{
if (err == hipSuccess)
return;
std::cerr << statement << " returned " << hipGetErrorString(err) << "(" << err << ") at " << file << ":" << line << std::endl;
exit(1);
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z10heatKernelPfjjfff
.globl _Z10heatKernelPfjjfff
.p2align 8
.type _Z10heatKernelPfjjfff,@function
_Z10heatKernelPfjjfff:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b64 s[4:5], s[0:1], 0x8
s_mov_b32 s9, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_cmp_lg_u32 s5, 0
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_cselect_b32 s2, -1, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_u32_e32 vcc_lo, s4, v1
s_and_b32 s2, vcc_lo, s2
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB0_5
s_clause 0x2
s_load_b64 s[10:11], s[0:1], 0x0
s_load_b64 s[6:7], s[0:1], 0x10
s_load_b32 s3, s[0:1], 0x18
v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v3, 1, v1
v_cmp_eq_u32_e64 s2, 0, v1
s_add_i32 s8, s4, 1
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
v_mov_b32_e32 v4, v2
v_lshlrev_b64 v[5:6], 2, v[1:2]
v_add_nc_u32_e32 v1, 2, v1
s_lshl_b64 s[0:1], s[8:9], 2
v_lshlrev_b64 v[3:4], 2, v[3:4]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
v_lshlrev_b64 v[7:8], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s10, v5
v_add_co_ci_u32_e32 v1, vcc_lo, s11, v6, vcc_lo
v_add_co_u32 v2, vcc_lo, s10, v3
v_add_co_ci_u32_e32 v3, vcc_lo, s11, v4, vcc_lo
v_add_co_u32 v4, vcc_lo, s10, v7
v_add_co_ci_u32_e32 v5, vcc_lo, s11, v8, vcc_lo
v_mul_f32_e64 v6, s7, s7
v_mov_b32_e32 v7, 0
s_add_u32 s0, s10, s0
s_addc_u32 s1, s11, s1
s_set_inst_prefetch_distance 0x1
s_branch .LBB0_3
.p2align 6
.LBB0_2:
s_or_b32 exec_lo, exec_lo, s4
s_clause 0x2
global_load_b32 v8, v[0:1], off
global_load_b32 v9, v[2:3], off
global_load_b32 v10, v[4:5], off
s_add_i32 s5, s5, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
s_cmp_lg_u32 s5, 0
s_waitcnt vmcnt(1)
v_fmac_f32_e32 v8, -2.0, v9
s_waitcnt vmcnt(0)
v_add_f32_e32 v8, v10, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v8, s3, v8
v_div_scale_f32 v10, null, v6, v6, v8
v_div_scale_f32 v13, vcc_lo, v8, v6, v8
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f32_e32 v11, v10
s_waitcnt_depctr 0xfff
v_fma_f32 v12, -v10, v11, 1.0
v_fmac_f32_e32 v11, v12, v11
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v12, v13, v11
v_fma_f32 v14, -v10, v12, v13
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v12, v14, v11
v_fma_f32 v10, -v10, v12, v13
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fmas_f32 v10, v10, v11, v12
v_div_fixup_f32 v8, v10, v6, v8
s_delay_alu instid0(VALU_DEP_1)
v_add_f32_e32 v8, v9, v8
global_store_b32 v[2:3], v8, off
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB0_5
.LBB0_3:
s_and_saveexec_b32 s4, s2
s_cbranch_execz .LBB0_2
global_load_b32 v8, v7, s[0:1]
s_waitcnt vmcnt(0)
v_add_f32_e32 v8, s6, v8
global_store_b32 v7, v8, s[0:1]
s_branch .LBB0_2
.LBB0_5:
s_set_inst_prefetch_distance 0x2
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z10heatKernelPfjjfff
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 15
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z10heatKernelPfjjfff, .Lfunc_end0-_Z10heatKernelPfjjfff
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: by_value
- .offset: 12
.size: 4
.value_kind: by_value
- .offset: 16
.size: 4
.value_kind: by_value
- .offset: 20
.size: 4
.value_kind: by_value
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z10heatKernelPfjjfff
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z10heatKernelPfjjfff.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 15
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | /*
============================================================================
Name : sem1.cu
Author : maminov
Version :
Copyright : copyleft
Description : CUDA compute reciprocals
============================================================================
*/
#include <hip/hip_runtime.h>
#include <iostream>
#include <numeric>
#include <stdlib.h>
static void CheckCudaErrorAux(const char *, unsigned, const char *, hipError_t);
#define CUDA_CHECK_RETURN(value) CheckCudaErrorAux(__FILE__,__LINE__, #value, value)
/**
* CUDA kernel that computes reciprocal values for a given vector
*/
__global__ void heatKernel(float *data, unsigned size, unsigned iterations, float tempPerIteration, float dx, float dt) {
unsigned idx = blockIdx.x*blockDim.x + threadIdx.x;
if (idx < size)
for (int i = 0; i < iterations; ++i) {
if (idx == 0)
data[size + 1] += tempPerIteration;
data[idx + 1] += (data[idx - 1 + 1] - 2 * data[idx + 1] + data[idx + 1 + 1]) * dt / (dx*dx);
__syncthreads();
}
}
void initialize(float *data, unsigned size)
{
for (unsigned i = 0; i < size; ++i)
data[i] = 0.;
}
int main(void)
{
static const int SIM_TIME = 5;
static const int STEPS_PER_SECOND = 10;
static const int CYL_LENGTH = 10;
static const int STEPS_PER_METER = 10;
static const int WORK_SIZE = CYL_LENGTH * STEPS_PER_METER;
static const int BLOCK_SIZE = 256;
static const float TEMP_PER_SEC = 5.;
float *hostData = new float[WORK_SIZE + 2];
float *gpuData;
initialize(hostData, WORK_SIZE + 2);
CUDA_CHECK_RETURN(hipMalloc((void **)&gpuData, sizeof(float)*(WORK_SIZE + 2)));
CUDA_CHECK_RETURN(hipMemcpy(gpuData, hostData, sizeof(float)*(WORK_SIZE + 2), hipMemcpyHostToDevice));
float *result = new float[WORK_SIZE + 2];
const int blockCount = (WORK_SIZE + BLOCK_SIZE - 1) / BLOCK_SIZE;
heatKernel <<< blockCount, BLOCK_SIZE >>> (gpuData, WORK_SIZE, SIM_TIME * STEPS_PER_SECOND, TEMP_PER_SEC / (STEPS_PER_SECOND*1.0f), CYL_LENGTH / (STEPS_PER_METER*1.0f), SIM_TIME / (STEPS_PER_SECOND*1.0f));
CUDA_CHECK_RETURN(hipMemcpy(result, gpuData, sizeof(float)*(WORK_SIZE + 2), hipMemcpyDeviceToHost));
/* Verify the results */
for (int i = 0; i < WORK_SIZE; ++i)
std::cout << result[i + 1] << std::endl;
/* Free memory */
CUDA_CHECK_RETURN(hipFree(gpuData));
delete[] hostData;
delete[] result;
return 0;
}
/**
* Check the return value of the CUDA runtime API call and exit
* the application if the call has failed.
*/
static void CheckCudaErrorAux(const char *file, unsigned line, const char *statement, hipError_t err)
{
if (err == hipSuccess)
return;
std::cerr << statement << " returned " << hipGetErrorString(err) << "(" << err << ") at " << file << ":" << line << std::endl;
exit(1);
} | .text
.file "kernel.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z25__device_stub__heatKernelPfjjfff # -- Begin function _Z25__device_stub__heatKernelPfjjfff
.p2align 4, 0x90
.type _Z25__device_stub__heatKernelPfjjfff,@function
_Z25__device_stub__heatKernelPfjjfff: # @_Z25__device_stub__heatKernelPfjjfff
.cfi_startproc
# %bb.0:
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 72(%rsp)
movl %esi, 20(%rsp)
movl %edx, 16(%rsp)
movss %xmm0, 12(%rsp)
movss %xmm1, 8(%rsp)
movss %xmm2, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 20(%rsp), %rax
movq %rax, 88(%rsp)
leaq 16(%rsp), %rax
movq %rax, 96(%rsp)
leaq 12(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z10heatKernelPfjjfff, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $152, %rsp
.cfi_adjust_cfa_offset -152
retq
.Lfunc_end0:
.size _Z25__device_stub__heatKernelPfjjfff, .Lfunc_end0-_Z25__device_stub__heatKernelPfjjfff
.cfi_endproc
# -- End function
.globl _Z10initializePfj # -- Begin function _Z10initializePfj
.p2align 4, 0x90
.type _Z10initializePfj,@function
_Z10initializePfj: # @_Z10initializePfj
.cfi_startproc
# %bb.0:
testl %esi, %esi
je .LBB1_1
# %bb.2: # %.lr.ph.preheader
movl %esi, %edx
shlq $2, %rdx
xorl %esi, %esi
jmp memset@PLT # TAILCALL
.LBB1_1: # %._crit_edge
retq
.Lfunc_end1:
.size _Z10initializePfj, .Lfunc_end1-_Z10initializePfj
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %r13
.cfi_def_cfa_offset 32
pushq %r12
.cfi_def_cfa_offset 40
pushq %rbx
.cfi_def_cfa_offset 48
subq $144, %rsp
.cfi_def_cfa_offset 192
.cfi_offset %rbx, -48
.cfi_offset %r12, -40
.cfi_offset %r13, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movl $408, %edi # imm = 0x198
callq _Znam
movq %rax, %rbx
movl $408, %edx # imm = 0x198
movq %rax, %rdi
xorl %esi, %esi
callq memset@PLT
leaq 8(%rsp), %rdi
movl $408, %esi # imm = 0x198
callq hipMalloc
movl $.L.str.1, %esi
movl $58, %edi
movl %eax, %edx
callq _ZL17CheckCudaErrorAuxPKcjS0_10hipError_t
movq 8(%rsp), %rdi
movl $408, %edx # imm = 0x198
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
movl $.L.str.2, %esi
movl $59, %edi
movl %eax, %edx
callq _ZL17CheckCudaErrorAuxPKcjS0_10hipError_t
movl $408, %edi # imm = 0x198
callq _Znam
movq %rax, %r14
movabsq $4294967297, %rdi # imm = 0x100000001
leaq 255(%rdi), %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB2_2
# %bb.1:
movq 8(%rsp), %rax
movq %rax, 88(%rsp)
movl $100, 36(%rsp)
movl $50, 32(%rsp)
movl $1056964608, 28(%rsp) # imm = 0x3F000000
movl $1065353216, 24(%rsp) # imm = 0x3F800000
movl $1056964608, 20(%rsp) # imm = 0x3F000000
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 36(%rsp), %rax
movq %rax, 104(%rsp)
leaq 32(%rsp), %rax
movq %rax, 112(%rsp)
leaq 28(%rsp), %rax
movq %rax, 120(%rsp)
leaq 24(%rsp), %rax
movq %rax, 128(%rsp)
leaq 20(%rsp), %rax
movq %rax, 136(%rsp)
leaq 72(%rsp), %rdi
leaq 56(%rsp), %rsi
leaq 48(%rsp), %rdx
leaq 40(%rsp), %rcx
callq __hipPopCallConfiguration
movq 72(%rsp), %rsi
movl 80(%rsp), %edx
movq 56(%rsp), %rcx
movl 64(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z10heatKernelPfjjfff, %edi
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB2_2:
movq 8(%rsp), %rsi
movl $408, %edx # imm = 0x198
movq %r14, %rdi
movl $2, %ecx
callq hipMemcpy
movl $.L.str.3, %esi
movl $66, %edi
movl %eax, %edx
callq _ZL17CheckCudaErrorAuxPKcjS0_10hipError_t
movl $1, %r12d
jmp .LBB2_3
.p2align 4, 0x90
.LBB2_6: # in Loop: Header=BB2_3 Depth=1
movq %r15, %rdi
movq %rax, %r13
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r15), %rax
movq %r15, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r13, %rax
.LBB2_7: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit
# in Loop: Header=BB2_3 Depth=1
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
incq %r12
cmpq $101, %r12
je .LBB2_8
.LBB2_3: # =>This Inner Loop Header: Depth=1
movss (%r14,%r12,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $_ZSt4cout, %edi
callq _ZNSo9_M_insertIdEERSoT_
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %r15
testq %r15, %r15
je .LBB2_9
# %bb.4: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
# in Loop: Header=BB2_3 Depth=1
cmpb $0, 56(%r15)
je .LBB2_6
# %bb.5: # in Loop: Header=BB2_3 Depth=1
movzbl 67(%r15), %ecx
jmp .LBB2_7
.LBB2_8:
movq 8(%rsp), %rdi
callq hipFree
movl $.L.str.4, %esi
movl $74, %edi
movl %eax, %edx
callq _ZL17CheckCudaErrorAuxPKcjS0_10hipError_t
movq %rbx, %rdi
callq _ZdaPv
movq %r14, %rdi
callq _ZdaPv
xorl %eax, %eax
addq $144, %rsp
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.LBB2_9:
.cfi_def_cfa_offset 192
callq _ZSt16__throw_bad_castv
.Lfunc_end2:
.size main, .Lfunc_end2-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function _ZL17CheckCudaErrorAuxPKcjS0_10hipError_t
.type _ZL17CheckCudaErrorAuxPKcjS0_10hipError_t,@function
_ZL17CheckCudaErrorAuxPKcjS0_10hipError_t: # @_ZL17CheckCudaErrorAuxPKcjS0_10hipError_t
.cfi_startproc
# %bb.0:
testl %edx, %edx
jne .LBB3_2
# %bb.1:
retq
.LBB3_2:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %rbp, -16
movl %edi, %ebx
movl $_ZSt4cerr, %edi
movl %edx, %ebp
callq _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
movl $.L.str.5, %esi
movq %rax, %rdi
callq _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
movq %rax, %r14
movl %ebp, %edi
callq hipGetErrorString
movq %r14, %rdi
movq %rax, %rsi
callq _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
movl $.L.str.6, %esi
movq %rax, %rdi
callq _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
movq %rax, %rdi
movl %ebp, %esi
callq _ZNSolsEi
movl $.L.str.7, %esi
movq %rax, %rdi
callq _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
movl $.L.str, %esi
movq %rax, %rdi
callq _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
movl $.L.str.8, %esi
movq %rax, %rdi
callq _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
movq %rax, %rdi
movl %ebx, %esi
callq _ZNSolsEj
movq %rax, %rdi
callq _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
movl $1, %edi
callq exit
.Lfunc_end3:
.size _ZL17CheckCudaErrorAuxPKcjS0_10hipError_t, .Lfunc_end3-_ZL17CheckCudaErrorAuxPKcjS0_10hipError_t
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB4_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB4_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z10heatKernelPfjjfff, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end4:
.size __hip_module_ctor, .Lfunc_end4-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB5_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB5_2:
retq
.Lfunc_end5:
.size __hip_module_dtor, .Lfunc_end5-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z10heatKernelPfjjfff,@object # @_Z10heatKernelPfjjfff
.section .rodata,"a",@progbits
.globl _Z10heatKernelPfjjfff
.p2align 3, 0x0
_Z10heatKernelPfjjfff:
.quad _Z25__device_stub__heatKernelPfjjfff
.size _Z10heatKernelPfjjfff, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "/home/ubuntu/Datasets/stackv2/train-structured-repos-hip/xobotun/TP_CUDA/master/Sem1/Sem1/kernel.hip"
.size .L.str, 101
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "hipMalloc((void **)&gpuData, sizeof(float)*(WORK_SIZE + 2))"
.size .L.str.1, 60
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "hipMemcpy(gpuData, hostData, sizeof(float)*(WORK_SIZE + 2), hipMemcpyHostToDevice)"
.size .L.str.2, 83
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "hipMemcpy(result, gpuData, sizeof(float)*(WORK_SIZE + 2), hipMemcpyDeviceToHost)"
.size .L.str.3, 81
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "hipFree(gpuData)"
.size .L.str.4, 17
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz " returned "
.size .L.str.5, 11
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "("
.size .L.str.6, 2
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz ") at "
.size .L.str.7, 6
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz ":"
.size .L.str.8, 2
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z10heatKernelPfjjfff"
.size .L__unnamed_1, 22
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z25__device_stub__heatKernelPfjjfff
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z10heatKernelPfjjfff
.addrsig_sym _ZSt4cout
.addrsig_sym _ZSt4cerr
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z10heatKernelPfjjfff
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e220000002500 */
/*0020*/ ISETP.NE.AND P0, PT, RZ, c[0x0][0x16c], PT ; /* 0x00005b00ff007a0c */
/* 0x000fc60003f05270 */
/*0030*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0040*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fca00078e0203 */
/*0050*/ ISETP.GE.U32.OR P0, PT, R0, c[0x0][0x168], !P0 ; /* 0x00005a0000007a0c */
/* 0x000fda0004706470 */
/*0060*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0070*/ MOV R10, c[0x0][0x16c] ; /* 0x00005b00000a7a02 */
/* 0x000fe20000000f00 */
/*0080*/ IMAD.MOV.U32 R2, RZ, RZ, 0x1 ; /* 0x00000001ff027424 */
/* 0x000fe200078e00ff */
/*0090*/ IADD3 R8, R0, 0x1, RZ ; /* 0x0000000100087810 */
/* 0x000fe20007ffe0ff */
/*00a0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*00b0*/ IADD3 R3, R10, -0x1, RZ ; /* 0xffffffff0a037810 */
/* 0x000fe40007ffe0ff */
/*00c0*/ IADD3 R6, R0, 0x2, RZ ; /* 0x0000000200067810 */
/* 0x000fe40007ffe0ff */
/*00d0*/ ISETP.GE.U32.AND P0, PT, R3, 0x3, PT ; /* 0x000000030300780c */
/* 0x000fe20003f06070 */
/*00e0*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ; /* 0x00000004ff037424 */
/* 0x000fe200078e00ff */
/*00f0*/ MOV R11, c[0x0][0x174] ; /* 0x00005d00000b7a02 */
/* 0x000fc40000000f00 */
/*0100*/ IADD3 R2, R2, c[0x0][0x168], RZ ; /* 0x00005a0002027a10 */
/* 0x000fe20007ffe0ff */
/*0110*/ IMAD.WIDE.U32 R8, R8, R3, c[0x0][0x160] ; /* 0x0000580008087625 */
/* 0x000fe200078e0003 */
/*0120*/ LOP3.LUT R10, R10, 0x3, RZ, 0xc0, !PT ; /* 0x000000030a0a7812 */
/* 0x000fc600078ec0ff */
/*0130*/ IMAD.WIDE.U32 R6, R6, R3, c[0x0][0x160] ; /* 0x0000580006067625 */
/* 0x000fc800078e0003 */
/*0140*/ IMAD.WIDE.U32 R4, R0, R3, c[0x0][0x160] ; /* 0x0000580000047625 */
/* 0x000fc800078e0003 */
/*0150*/ FMUL R11, R11, c[0x0][0x174] ; /* 0x00005d000b0b7a20 */
/* 0x000fe40000400000 */
/*0160*/ IMAD.WIDE.U32 R2, R2, R3, c[0x0][0x160] ; /* 0x0000580002027625 */
/* 0x000fe200078e0003 */
/*0170*/ @!P0 BRA 0x8e0 ; /* 0x0000076000008947 */
/* 0x000fea0003800000 */
/*0180*/ IADD3 R12, -R10, c[0x0][0x16c], RZ ; /* 0x00005b000a0c7a10 */
/* 0x000fe40007ffe1ff */
/*0190*/ ISETP.NE.AND P2, PT, R0, RZ, PT ; /* 0x000000ff0000720c */
/* 0x000fda0003f45270 */
/*01a0*/ @!P2 LDG.E R13, [R2.64] ; /* 0x00000004020da981 */
/* 0x001ea4000c1e1900 */
/*01b0*/ @!P2 FADD R15, R13, c[0x0][0x170] ; /* 0x00005c000d0fa621 */
/* 0x004fca0000000000 */
/*01c0*/ @!P2 STG.E [R2.64], R15 ; /* 0x0000000f0200a986 */
/* 0x0001e8000c101904 */
/*01d0*/ LDG.E R13, [R8.64] ; /* 0x00000004080d7981 */
/* 0x000ea8000c1e1900 */
/*01e0*/ LDG.E R14, [R4.64] ; /* 0x00000004040e7981 */
/* 0x000ee8000c1e1900 */
/*01f0*/ LDG.E R19, [R6.64] ; /* 0x0000000406137981 */
/* 0x000f22000c1e1900 */
/*0200*/ MUFU.RCP R16, R11 ; /* 0x0000000b00107308 */
/* 0x000e620000001000 */
/*0210*/ IADD3 R12, R12, -0x4, RZ ; /* 0xfffffffc0c0c7810 */
/* 0x000fe20007ffe0ff */
/*0220*/ BSSY B0, 0x330 ; /* 0x0000010000007945 */
/* 0x000fe60003800000 */
/*0230*/ ISETP.NE.AND P3, PT, R12, RZ, PT ; /* 0x000000ff0c00720c */
/* 0x000fe20003f65270 */
/*0240*/ FADD R17, R13, R13 ; /* 0x0000000d0d117221 */
/* 0x004fc80000000000 */
/*0250*/ FADD R14, R14, -R17 ; /* 0x800000110e0e7221 */
/* 0x008fe40000000000 */
/*0260*/ FFMA R17, -R11, R16, 1 ; /* 0x3f8000000b117423 */
/* 0x002fe40000000110 */
/*0270*/ FADD R14, R14, R19 ; /* 0x000000130e0e7221 */
/* 0x010fe40000000000 */
/*0280*/ FFMA R17, R16, R17, R16 ; /* 0x0000001110117223 */
/* 0x000fe40000000010 */
/*0290*/ FMUL R14, R14, c[0x0][0x178] ; /* 0x00005e000e0e7a20 */
/* 0x000fc80000400000 */
/*02a0*/ FCHK P0, R14, R11 ; /* 0x0000000b0e007302 */
/* 0x000e620000000000 */
/*02b0*/ FFMA R16, R14, R17, RZ ; /* 0x000000110e107223 */
/* 0x000fc800000000ff */
/*02c0*/ FFMA R15, -R11, R16, R14 ; /* 0x000000100b0f7223 */
/* 0x001fc8000000010e */
/*02d0*/ FFMA R16, R17, R15, R16 ; /* 0x0000000f11107223 */
/* 0x000fe20000000010 */
/*02e0*/ @!P0 BRA 0x320 ; /* 0x0000003000008947 */
/* 0x002fea0003800000 */
/*02f0*/ MOV R17, R14 ; /* 0x0000000e00117202 */
/* 0x000fe40000000f00 */
/*0300*/ MOV R14, 0x320 ; /* 0x00000320000e7802 */
/* 0x000fe40000000f00 */
/*0310*/ CALL.REL.NOINC 0xb00 ; /* 0x000007e000007944 */
/* 0x000fea0003c00000 */
/*0320*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0330*/ FADD R13, R13, R16 ; /* 0x000000100d0d7221 */
/* 0x000fe20000000000 */
/*0340*/ BSSY B0, 0x3c0 ; /* 0x0000007000007945 */
/* 0x000fe80003800000 */
/*0350*/ STG.E [R8.64], R13 ; /* 0x0000000d08007986 */
/* 0x0001e8000c101904 */
/*0360*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0370*/ @P2 BRA 0x3b0 ; /* 0x0000003000002947 */
/* 0x000fea0003800000 */
/*0380*/ LDG.E R13, [R2.64] ; /* 0x00000004020d7981 */
/* 0x001ea4000c1e1900 */
/*0390*/ FADD R13, R13, c[0x0][0x170] ; /* 0x00005c000d0d7621 */
/* 0x004fca0000000000 */
/*03a0*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0001e4000c101904 */
/*03b0*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*03c0*/ LDG.E R13, [R8.64] ; /* 0x00000004080d7981 */
/* 0x001ea8000c1e1900 */
/*03d0*/ LDG.E R14, [R4.64] ; /* 0x00000004040e7981 */
/* 0x000ee8000c1e1900 */
/*03e0*/ LDG.E R17, [R6.64] ; /* 0x0000000406117981 */
/* 0x000f22000c1e1900 */
/*03f0*/ MUFU.RCP R16, R11 ; /* 0x0000000b00107308 */
/* 0x000e220000001000 */
/*0400*/ BSSY B0, 0x500 ; /* 0x000000f000007945 */
/* 0x000fe20003800000 */
/*0410*/ FADD R15, R13, R13 ; /* 0x0000000d0d0f7221 */
/* 0x004fc80000000000 */
/*0420*/ FADD R14, R14, -R15 ; /* 0x8000000f0e0e7221 */
/* 0x008fe40000000000 */
/*0430*/ FFMA R15, -R11, R16, 1 ; /* 0x3f8000000b0f7423 */
/* 0x001fe40000000110 */
/*0440*/ FADD R14, R14, R17 ; /* 0x000000110e0e7221 */
/* 0x010fe40000000000 */
/*0450*/ FFMA R17, R16, R15, R16 ; /* 0x0000000f10117223 */
/* 0x000fe40000000010 */
/*0460*/ FMUL R14, R14, c[0x0][0x178] ; /* 0x00005e000e0e7a20 */
/* 0x000fc80000400000 */
/*0470*/ FCHK P0, R14, R11 ; /* 0x0000000b0e007302 */
/* 0x000e220000000000 */
/*0480*/ FFMA R15, R17, R14, RZ ; /* 0x0000000e110f7223 */
/* 0x000fc800000000ff */
/*0490*/ FFMA R16, -R11, R15, R14 ; /* 0x0000000f0b107223 */
/* 0x000fc8000000010e */
/*04a0*/ FFMA R16, R17, R16, R15 ; /* 0x0000001011107223 */
/* 0x000fe2000000000f */
/*04b0*/ @!P0 BRA 0x4f0 ; /* 0x0000003000008947 */
/* 0x001fea0003800000 */
/*04c0*/ IMAD.MOV.U32 R17, RZ, RZ, R14 ; /* 0x000000ffff117224 */
/* 0x000fe200078e000e */
/*04d0*/ MOV R14, 0x4f0 ; /* 0x000004f0000e7802 */
/* 0x000fe40000000f00 */
/*04e0*/ CALL.REL.NOINC 0xb00 ; /* 0x0000061000007944 */
/* 0x000fea0003c00000 */
/*04f0*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0500*/ FADD R13, R13, R16 ; /* 0x000000100d0d7221 */
/* 0x000fe20000000000 */
/*0510*/ BSSY B0, 0x590 ; /* 0x0000007000007945 */
/* 0x000fe80003800000 */
/*0520*/ STG.E [R8.64], R13 ; /* 0x0000000d08007986 */
/* 0x0001e8000c101904 */
/*0530*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0540*/ @P2 BRA 0x580 ; /* 0x0000003000002947 */
/* 0x000fea0003800000 */
/*0550*/ LDG.E R13, [R2.64] ; /* 0x00000004020d7981 */
/* 0x001ea4000c1e1900 */
/*0560*/ FADD R13, R13, c[0x0][0x170] ; /* 0x00005c000d0d7621 */
/* 0x004fca0000000000 */
/*0570*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0001e4000c101904 */
/*0580*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0590*/ LDG.E R13, [R8.64] ; /* 0x00000004080d7981 */
/* 0x001ea8000c1e1900 */
/*05a0*/ LDG.E R14, [R4.64] ; /* 0x00000004040e7981 */
/* 0x000ee8000c1e1900 */
/*05b0*/ LDG.E R17, [R6.64] ; /* 0x0000000406117981 */
/* 0x000f22000c1e1900 */
/*05c0*/ MUFU.RCP R16, R11 ; /* 0x0000000b00107308 */
/* 0x000e220000001000 */
/*05d0*/ BSSY B0, 0x6d0 ; /* 0x000000f000007945 */
/* 0x000fe20003800000 */
/*05e0*/ FADD R15, R13, R13 ; /* 0x0000000d0d0f7221 */
/* 0x004fc80000000000 */
/*05f0*/ FADD R14, R14, -R15 ; /* 0x8000000f0e0e7221 */
/* 0x008fe40000000000 */
/*0600*/ FFMA R15, -R11, R16, 1 ; /* 0x3f8000000b0f7423 */
/* 0x001fe40000000110 */
/*0610*/ FADD R14, R14, R17 ; /* 0x000000110e0e7221 */
/* 0x010fe40000000000 */
/*0620*/ FFMA R17, R16, R15, R16 ; /* 0x0000000f10117223 */
/* 0x000fe40000000010 */
/*0630*/ FMUL R14, R14, c[0x0][0x178] ; /* 0x00005e000e0e7a20 */
/* 0x000fc80000400000 */
/*0640*/ FCHK P0, R14, R11 ; /* 0x0000000b0e007302 */
/* 0x000e220000000000 */
/*0650*/ FFMA R15, R17, R14, RZ ; /* 0x0000000e110f7223 */
/* 0x000fc800000000ff */
/*0660*/ FFMA R16, -R11, R15, R14 ; /* 0x0000000f0b107223 */
/* 0x000fc8000000010e */
/*0670*/ FFMA R16, R17, R16, R15 ; /* 0x0000001011107223 */
/* 0x000fe2000000000f */
/*0680*/ @!P0 BRA 0x6c0 ; /* 0x0000003000008947 */
/* 0x001fea0003800000 */
/*0690*/ MOV R17, R14 ; /* 0x0000000e00117202 */
/* 0x000fe40000000f00 */
/*06a0*/ MOV R14, 0x6c0 ; /* 0x000006c0000e7802 */
/* 0x000fe40000000f00 */
/*06b0*/ CALL.REL.NOINC 0xb00 ; /* 0x0000044000007944 */
/* 0x000fea0003c00000 */
/*06c0*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*06d0*/ FADD R13, R13, R16 ; /* 0x000000100d0d7221 */
/* 0x000fe20000000000 */
/*06e0*/ BSSY B0, 0x760 ; /* 0x0000007000007945 */
/* 0x000fe80003800000 */
/*06f0*/ STG.E [R8.64], R13 ; /* 0x0000000d08007986 */
/* 0x0001e8000c101904 */
/*0700*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0710*/ @P2 BRA 0x750 ; /* 0x0000003000002947 */
/* 0x000fea0003800000 */
/*0720*/ LDG.E R13, [R2.64] ; /* 0x00000004020d7981 */
/* 0x001ea4000c1e1900 */
/*0730*/ FADD R13, R13, c[0x0][0x170] ; /* 0x00005c000d0d7621 */
/* 0x004fca0000000000 */
/*0740*/ STG.E [R2.64], R13 ; /* 0x0000000d02007986 */
/* 0x0001e4000c101904 */
/*0750*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0760*/ LDG.E R13, [R8.64] ; /* 0x00000004080d7981 */
/* 0x001ea8000c1e1900 */
/*0770*/ LDG.E R14, [R4.64] ; /* 0x00000004040e7981 */
/* 0x000ee8000c1e1900 */
/*0780*/ LDG.E R17, [R6.64] ; /* 0x0000000406117981 */
/* 0x000f22000c1e1900 */
/*0790*/ MUFU.RCP R16, R11 ; /* 0x0000000b00107308 */
/* 0x000e220000001000 */
/*07a0*/ BSSY B0, 0x8a0 ; /* 0x000000f000007945 */
/* 0x000fe20003800000 */
/*07b0*/ FADD R15, R13, R13 ; /* 0x0000000d0d0f7221 */
/* 0x004fc80000000000 */
/*07c0*/ FADD R14, R14, -R15 ; /* 0x8000000f0e0e7221 */
/* 0x008fe40000000000 */
/*07d0*/ FFMA R15, -R11, R16, 1 ; /* 0x3f8000000b0f7423 */
/* 0x001fe40000000110 */
/*07e0*/ FADD R14, R14, R17 ; /* 0x000000110e0e7221 */
/* 0x010fe40000000000 */
/*07f0*/ FFMA R17, R16, R15, R16 ; /* 0x0000000f10117223 */
/* 0x000fe40000000010 */
/*0800*/ FMUL R14, R14, c[0x0][0x178] ; /* 0x00005e000e0e7a20 */
/* 0x000fc80000400000 */
/*0810*/ FCHK P0, R14, R11 ; /* 0x0000000b0e007302 */
/* 0x000e220000000000 */
/*0820*/ FFMA R15, R17, R14, RZ ; /* 0x0000000e110f7223 */
/* 0x000fc800000000ff */
/*0830*/ FFMA R16, -R11, R15, R14 ; /* 0x0000000f0b107223 */
/* 0x000fc8000000010e */
/*0840*/ FFMA R16, R17, R16, R15 ; /* 0x0000001011107223 */
/* 0x000fe2000000000f */
/*0850*/ @!P0 BRA 0x890 ; /* 0x0000003000008947 */
/* 0x001fea0003800000 */
/*0860*/ IMAD.MOV.U32 R17, RZ, RZ, R14 ; /* 0x000000ffff117224 */
/* 0x000fe200078e000e */
/*0870*/ MOV R14, 0x890 ; /* 0x00000890000e7802 */
/* 0x000fe40000000f00 */
/*0880*/ CALL.REL.NOINC 0xb00 ; /* 0x0000027000007944 */
/* 0x000fea0003c00000 */
/*0890*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*08a0*/ FADD R13, R13, R16 ; /* 0x000000100d0d7221 */
/* 0x000fca0000000000 */
/*08b0*/ STG.E [R8.64], R13 ; /* 0x0000000d08007986 */
/* 0x0001e8000c101904 */
/*08c0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*08d0*/ @P3 BRA 0x190 ; /* 0xfffff8b000003947 */
/* 0x000fea000383ffff */
/*08e0*/ ISETP.NE.AND P0, PT, R10, RZ, PT ; /* 0x000000ff0a00720c */
/* 0x000fda0003f05270 */
/*08f0*/ @!P0 EXIT ; /* 0x000000000000894d */
/* 0x000fea0003800000 */
/*0900*/ ISETP.NE.AND P0, PT, R0, RZ, PT ; /* 0x000000ff0000720c */
/* 0x000fda0003f05270 */
/*0910*/ @!P0 LDG.E R12, [R2.64] ; /* 0x00000004020c8981 */
/* 0x000ea4000c1e1900 */
/*0920*/ @!P0 FADD R13, R12, c[0x0][0x170] ; /* 0x00005c000c0d8621 */
/* 0x005fca0000000000 */
/*0930*/ @!P0 STG.E [R2.64], R13 ; /* 0x0000000d02008986 */
/* 0x0001e8000c101904 */
/*0940*/ LDG.E R12, [R8.64] ; /* 0x00000004080c7981 */
/* 0x000ea8000c1e1900 */
/*0950*/ LDG.E R14, [R4.64] ; /* 0x00000004040e7981 */
/* 0x000ee8000c1e1900 */
/*0960*/ LDG.E R17, [R6.64] ; /* 0x0000000406117981 */
/* 0x000f22000c1e1900 */
/*0970*/ MUFU.RCP R16, R11 ; /* 0x0000000b00107308 */
/* 0x000e620000001000 */
/*0980*/ BSSY B0, 0xa90 ; /* 0x0000010000007945 */
/* 0x000fe20003800000 */
/*0990*/ FADD R15, R12, R12 ; /* 0x0000000c0c0f7221 */
/* 0x004fc80000000000 */
/*09a0*/ FADD R14, R14, -R15 ; /* 0x8000000f0e0e7221 */
/* 0x008fe40000000000 */
/*09b0*/ FFMA R15, -R11, R16, 1 ; /* 0x3f8000000b0f7423 */
/* 0x002fe40000000110 */
/*09c0*/ FADD R14, R14, R17 ; /* 0x000000110e0e7221 */
/* 0x010fe40000000000 */
/*09d0*/ FFMA R15, R16, R15, R16 ; /* 0x0000000f100f7223 */
/* 0x000fe40000000010 */
/*09e0*/ FMUL R14, R14, c[0x0][0x178] ; /* 0x00005e000e0e7a20 */
/* 0x000fc80000400000 */
/*09f0*/ FCHK P0, R14, R11 ; /* 0x0000000b0e007302 */
/* 0x000e620000000000 */
/*0a00*/ FFMA R13, R15, R14, RZ ; /* 0x0000000e0f0d7223 */
/* 0x001fc800000000ff */
/*0a10*/ FFMA R16, -R11, R13, R14 ; /* 0x0000000d0b107223 */
/* 0x000fc8000000010e */
/*0a20*/ FFMA R13, R15, R16, R13 ; /* 0x000000100f0d7223 */
/* 0x000fe2000000000d */
/*0a30*/ @!P0 BRA 0xa80 ; /* 0x0000004000008947 */
/* 0x002fea0003800000 */
/*0a40*/ MOV R17, R14 ; /* 0x0000000e00117202 */
/* 0x000fe40000000f00 */
/*0a50*/ MOV R14, 0xa70 ; /* 0x00000a70000e7802 */
/* 0x000fe40000000f00 */
/*0a60*/ CALL.REL.NOINC 0xb00 ; /* 0x0000009000007944 */
/* 0x000fea0003c00000 */
/*0a70*/ IMAD.MOV.U32 R13, RZ, RZ, R16 ; /* 0x000000ffff0d7224 */
/* 0x000fe400078e0010 */
/*0a80*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0a90*/ IADD3 R10, R10, -0x1, RZ ; /* 0xffffffff0a0a7810 */
/* 0x000fe20007ffe0ff */
/*0aa0*/ FADD R13, R12, R13 ; /* 0x0000000d0c0d7221 */
/* 0x000fc60000000000 */
/*0ab0*/ ISETP.NE.AND P0, PT, R10, RZ, PT ; /* 0x000000ff0a00720c */
/* 0x000fe40003f05270 */
/*0ac0*/ STG.E [R8.64], R13 ; /* 0x0000000d08007986 */
/* 0x0001e8000c101904 */
/*0ad0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fee0000010000 */
/*0ae0*/ @P0 BRA 0x900 ; /* 0xfffffe1000000947 */
/* 0x000fea000383ffff */
/*0af0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0b00*/ SHF.R.U32.HI R15, RZ, 0x17, R11 ; /* 0x00000017ff0f7819 */
/* 0x000fe2000001160b */
/*0b10*/ BSSY B1, 0x1150 ; /* 0x0000063000017945 */
/* 0x000fe20003800000 */
/*0b20*/ SHF.R.U32.HI R18, RZ, 0x17, R17 ; /* 0x00000017ff127819 */
/* 0x000fc40000011611 */
/*0b30*/ LOP3.LUT R15, R15, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff0f0f7812 */
/* 0x000fe400078ec0ff */
/*0b40*/ LOP3.LUT R18, R18, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff12127812 */
/* 0x000fe400078ec0ff */
/*0b50*/ IADD3 R21, R15, -0x1, RZ ; /* 0xffffffff0f157810 */
/* 0x000fe40007ffe0ff */
/*0b60*/ IADD3 R19, R18, -0x1, RZ ; /* 0xffffffff12137810 */
/* 0x000fe40007ffe0ff */
/*0b70*/ ISETP.GT.U32.AND P0, PT, R21, 0xfd, PT ; /* 0x000000fd1500780c */
/* 0x000fe40003f04070 */
/*0b80*/ MOV R20, R11 ; /* 0x0000000b00147202 */
/* 0x000fc40000000f00 */
/*0b90*/ ISETP.GT.U32.OR P0, PT, R19, 0xfd, P0 ; /* 0x000000fd1300780c */
/* 0x000fda0000704470 */
/*0ba0*/ @!P0 IMAD.MOV.U32 R16, RZ, RZ, RZ ; /* 0x000000ffff108224 */
/* 0x000fe200078e00ff */
/*0bb0*/ @!P0 BRA 0xd30 ; /* 0x0000017000008947 */
/* 0x000fea0003800000 */
/*0bc0*/ FSETP.GTU.FTZ.AND P0, PT, |R17|, +INF , PT ; /* 0x7f8000001100780b */
/* 0x000fe40003f1c200 */
/*0bd0*/ FSETP.GTU.FTZ.AND P1, PT, |R11|, +INF , PT ; /* 0x7f8000000b00780b */
/* 0x000fc80003f3c200 */
/*0be0*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */
/* 0x000fda0000703570 */
/*0bf0*/ @P0 BRA 0x1130 ; /* 0x0000053000000947 */
/* 0x000fea0003800000 */
/*0c00*/ LOP3.LUT P0, RZ, R20, 0x7fffffff, R17, 0xc8, !PT ; /* 0x7fffffff14ff7812 */
/* 0x000fda000780c811 */
/*0c10*/ @!P0 BRA 0x1110 ; /* 0x000004f000008947 */
/* 0x000fea0003800000 */
/*0c20*/ FSETP.NEU.FTZ.AND P4, PT, |R17|, +INF , PT ; /* 0x7f8000001100780b */
/* 0x000fe40003f9d200 */
/*0c30*/ FSETP.NEU.FTZ.AND P1, PT, |R11|, +INF , PT ; /* 0x7f8000000b00780b */
/* 0x000fe40003f3d200 */
/*0c40*/ FSETP.NEU.FTZ.AND P0, PT, |R17|, +INF , PT ; /* 0x7f8000001100780b */
/* 0x000fd60003f1d200 */
/*0c50*/ @!P1 BRA !P4, 0x1110 ; /* 0x000004b000009947 */
/* 0x000fea0006000000 */
/*0c60*/ LOP3.LUT P4, RZ, R17, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff11ff7812 */
/* 0x000fc8000788c0ff */
/*0c70*/ PLOP3.LUT P1, PT, P1, P4, PT, 0x2a, 0x0 ; /* 0x000000000000781c */
/* 0x000fda0000f28572 */
/*0c80*/ @P1 BRA 0x10f0 ; /* 0x0000046000001947 */
/* 0x000fea0003800000 */
/*0c90*/ LOP3.LUT P1, RZ, R20, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff14ff7812 */
/* 0x000fc8000782c0ff */
/*0ca0*/ PLOP3.LUT P0, PT, P0, P1, PT, 0x2a, 0x0 ; /* 0x000000000000781c */
/* 0x000fda0000702572 */
/*0cb0*/ @P0 BRA 0x10c0 ; /* 0x0000040000000947 */
/* 0x000fea0003800000 */
/*0cc0*/ ISETP.GE.AND P0, PT, R19, RZ, PT ; /* 0x000000ff1300720c */
/* 0x000fe40003f06270 */
/*0cd0*/ ISETP.GE.AND P1, PT, R21, RZ, PT ; /* 0x000000ff1500720c */
/* 0x000fd60003f26270 */
/*0ce0*/ @P0 MOV R16, RZ ; /* 0x000000ff00100202 */
/* 0x000fe20000000f00 */
/*0cf0*/ @!P0 IMAD.MOV.U32 R16, RZ, RZ, -0x40 ; /* 0xffffffc0ff108424 */
/* 0x000fe400078e00ff */
/*0d00*/ @!P0 FFMA R17, R17, 1.84467440737095516160e+19, RZ ; /* 0x5f80000011118823 */
/* 0x000fe400000000ff */
/*0d10*/ @!P1 FFMA R20, R11, 1.84467440737095516160e+19, RZ ; /* 0x5f8000000b149823 */
/* 0x000fe200000000ff */
/*0d20*/ @!P1 IADD3 R16, R16, 0x40, RZ ; /* 0x0000004010109810 */
/* 0x000fe40007ffe0ff */
/*0d30*/ LEA R19, R15, 0xc0800000, 0x17 ; /* 0xc08000000f137811 */
/* 0x000fe200078eb8ff */
/*0d40*/ BSSY B2, 0x10b0 ; /* 0x0000036000027945 */
/* 0x000fe20003800000 */
/*0d50*/ IADD3 R18, R18, -0x7f, RZ ; /* 0xffffff8112127810 */
/* 0x000fe40007ffe0ff */
/*0d60*/ IADD3 R23, -R19, R20, RZ ; /* 0x0000001413177210 */
/* 0x000fc60007ffe1ff */
/*0d70*/ IMAD R22, R18.reuse, -0x800000, R17 ; /* 0xff80000012167824 */
/* 0x040fe200078e0211 */
/*0d80*/ MUFU.RCP R20, R23 ; /* 0x0000001700147308 */
/* 0x0000620000001000 */
/*0d90*/ FADD.FTZ R19, -R23, -RZ ; /* 0x800000ff17137221 */
/* 0x000fe20000010100 */
/*0da0*/ IADD3 R23, R18, 0x7f, -R15 ; /* 0x0000007f12177810 */
/* 0x001fca0007ffe80f */
/*0db0*/ IMAD.IADD R18, R23, 0x1, R16 ; /* 0x0000000117127824 */
/* 0x000fe400078e0210 */
/*0dc0*/ FFMA R21, R20, R19, 1 ; /* 0x3f80000014157423 */
/* 0x002fc80000000013 */
/*0dd0*/ FFMA R17, R20, R21, R20 ; /* 0x0000001514117223 */
/* 0x000fc80000000014 */
/*0de0*/ FFMA R20, R22, R17, RZ ; /* 0x0000001116147223 */
/* 0x000fc800000000ff */
/*0df0*/ FFMA R21, R19, R20, R22 ; /* 0x0000001413157223 */
/* 0x000fc80000000016 */
/*0e00*/ FFMA R20, R17, R21, R20 ; /* 0x0000001511147223 */
/* 0x000fc80000000014 */
/*0e10*/ FFMA R19, R19, R20, R22 ; /* 0x0000001413137223 */
/* 0x000fc80000000016 */
/*0e20*/ FFMA R21, R17, R19, R20 ; /* 0x0000001311157223 */
/* 0x000fca0000000014 */
/*0e30*/ SHF.R.U32.HI R15, RZ, 0x17, R21 ; /* 0x00000017ff0f7819 */
/* 0x000fc80000011615 */
/*0e40*/ LOP3.LUT R15, R15, 0xff, RZ, 0xc0, !PT ; /* 0x000000ff0f0f7812 */
/* 0x000fc800078ec0ff */
/*0e50*/ IADD3 R16, R15, R18, RZ ; /* 0x000000120f107210 */
/* 0x000fc80007ffe0ff */
/*0e60*/ IADD3 R15, R16, -0x1, RZ ; /* 0xffffffff100f7810 */
/* 0x000fc80007ffe0ff */
/*0e70*/ ISETP.GE.U32.AND P0, PT, R15, 0xfe, PT ; /* 0x000000fe0f00780c */
/* 0x000fda0003f06070 */
/*0e80*/ @!P0 BRA 0x1090 ; /* 0x0000020000008947 */
/* 0x000fea0003800000 */
/*0e90*/ ISETP.GT.AND P0, PT, R16, 0xfe, PT ; /* 0x000000fe1000780c */
/* 0x000fda0003f04270 */
/*0ea0*/ @P0 BRA 0x1060 ; /* 0x000001b000000947 */
/* 0x000fea0003800000 */
/*0eb0*/ ISETP.GE.AND P0, PT, R16, 0x1, PT ; /* 0x000000011000780c */
/* 0x000fda0003f06270 */
/*0ec0*/ @P0 BRA 0x10a0 ; /* 0x000001d000000947 */
/* 0x000fea0003800000 */
/*0ed0*/ ISETP.GE.AND P0, PT, R16, -0x18, PT ; /* 0xffffffe81000780c */
/* 0x000fe40003f06270 */
/*0ee0*/ LOP3.LUT R21, R21, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000015157812 */
/* 0x000fd600078ec0ff */
/*0ef0*/ @!P0 BRA 0x10a0 ; /* 0x000001a000008947 */
/* 0x000fea0003800000 */
/*0f00*/ FFMA.RZ R15, R17, R19.reuse, R20.reuse ; /* 0x00000013110f7223 */
/* 0x180fe2000000c014 */
/*0f10*/ ISETP.NE.AND P4, PT, R16.reuse, RZ, PT ; /* 0x000000ff1000720c */
/* 0x040fe40003f85270 */
/*0f20*/ ISETP.NE.AND P1, PT, R16.reuse, RZ, PT ; /* 0x000000ff1000720c */
/* 0x040fe40003f25270 */
/*0f30*/ LOP3.LUT R18, R15, 0x7fffff, RZ, 0xc0, !PT ; /* 0x007fffff0f127812 */
/* 0x000fe200078ec0ff */
/*0f40*/ FFMA.RP R15, R17.reuse, R19.reuse, R20.reuse ; /* 0x00000013110f7223 */
/* 0x1c0fe40000008014 */
/*0f50*/ FFMA.RM R20, R17, R19, R20 ; /* 0x0000001311147223 */
/* 0x000fe20000004014 */
/*0f60*/ IADD3 R17, R16, 0x20, RZ ; /* 0x0000002010117810 */
/* 0x000fe20007ffe0ff */
/*0f70*/ IMAD.MOV R16, RZ, RZ, -R16 ; /* 0x000000ffff107224 */
/* 0x000fe200078e0a10 */
/*0f80*/ LOP3.LUT R18, R18, 0x800000, RZ, 0xfc, !PT ; /* 0x0080000012127812 */
/* 0x000fc400078efcff */
/*0f90*/ FSETP.NEU.FTZ.AND P0, PT, R15, R20, PT ; /* 0x000000140f00720b */
/* 0x000fe40003f1d000 */
/*0fa0*/ SHF.L.U32 R17, R18, R17, RZ ; /* 0x0000001112117219 */
/* 0x000fe400000006ff */
/*0fb0*/ SEL R15, R16, RZ, P4 ; /* 0x000000ff100f7207 */
/* 0x000fe40002000000 */
/*0fc0*/ ISETP.NE.AND P1, PT, R17, RZ, P1 ; /* 0x000000ff1100720c */
/* 0x000fe40000f25270 */
/*0fd0*/ SHF.R.U32.HI R15, RZ, R15, R18 ; /* 0x0000000fff0f7219 */
/* 0x000fe40000011612 */
/*0fe0*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ; /* 0x000000000000781c */
/* 0x000fc40000703570 */
/*0ff0*/ SHF.R.U32.HI R17, RZ, 0x1, R15 ; /* 0x00000001ff117819 */
/* 0x000fe4000001160f */
/*1000*/ SEL R16, RZ, 0x1, !P0 ; /* 0x00000001ff107807 */
/* 0x000fc80004000000 */
/*1010*/ LOP3.LUT R16, R16, 0x1, R17, 0xf8, !PT ; /* 0x0000000110107812 */
/* 0x000fc800078ef811 */
/*1020*/ LOP3.LUT R16, R16, R15, RZ, 0xc0, !PT ; /* 0x0000000f10107212 */
/* 0x000fc800078ec0ff */
/*1030*/ IADD3 R16, R17, R16, RZ ; /* 0x0000001011107210 */
/* 0x000fc80007ffe0ff */
/*1040*/ LOP3.LUT R21, R16, R21, RZ, 0xfc, !PT ; /* 0x0000001510157212 */
/* 0x000fe200078efcff */
/*1050*/ BRA 0x10a0 ; /* 0x0000004000007947 */
/* 0x000fea0003800000 */
/*1060*/ LOP3.LUT R21, R21, 0x80000000, RZ, 0xc0, !PT ; /* 0x8000000015157812 */
/* 0x000fc800078ec0ff */
/*1070*/ LOP3.LUT R21, R21, 0x7f800000, RZ, 0xfc, !PT ; /* 0x7f80000015157812 */
/* 0x000fe200078efcff */
/*1080*/ BRA 0x10a0 ; /* 0x0000001000007947 */
/* 0x000fea0003800000 */
/*1090*/ IMAD R21, R18, 0x800000, R21 ; /* 0x0080000012157824 */
/* 0x000fe400078e0215 */
/*10a0*/ BSYNC B2 ; /* 0x0000000000027941 */
/* 0x000fea0003800000 */
/*10b0*/ BRA 0x1140 ; /* 0x0000008000007947 */
/* 0x000fea0003800000 */
/*10c0*/ LOP3.LUT R17, R20, 0x80000000, R17, 0x48, !PT ; /* 0x8000000014117812 */
/* 0x000fc800078e4811 */
/*10d0*/ LOP3.LUT R21, R17, 0x7f800000, RZ, 0xfc, !PT ; /* 0x7f80000011157812 */
/* 0x000fe200078efcff */
/*10e0*/ BRA 0x1140 ; /* 0x0000005000007947 */
/* 0x000fea0003800000 */
/*10f0*/ LOP3.LUT R21, R20, 0x80000000, R17, 0x48, !PT ; /* 0x8000000014157812 */
/* 0x000fe200078e4811 */
/*1100*/ BRA 0x1140 ; /* 0x0000003000007947 */
/* 0x000fea0003800000 */
/*1110*/ MUFU.RSQ R21, -QNAN ; /* 0xffc0000000157908 */
/* 0x000e220000001400 */
/*1120*/ BRA 0x1140 ; /* 0x0000001000007947 */
/* 0x000fea0003800000 */
/*1130*/ FADD.FTZ R21, R17, R11 ; /* 0x0000000b11157221 */
/* 0x000fe40000010000 */
/*1140*/ BSYNC B1 ; /* 0x0000000000017941 */
/* 0x000fea0003800000 */
/*1150*/ IMAD.MOV.U32 R15, RZ, RZ, 0x0 ; /* 0x00000000ff0f7424 */
/* 0x000fe200078e00ff */
/*1160*/ MOV R16, R21 ; /* 0x0000001500107202 */
/* 0x001fc60000000f00 */
/*1170*/ RET.REL.NODEC R14 0x0 ; /* 0xffffee800e007950 */
/* 0x000fea0003c3ffff */
/*1180*/ BRA 0x1180; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*1190*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*11a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*11b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*11c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*11d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*11e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*11f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1200*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1210*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1220*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1230*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1240*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1250*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1260*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*1270*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z10heatKernelPfjjfff
.globl _Z10heatKernelPfjjfff
.p2align 8
.type _Z10heatKernelPfjjfff,@function
_Z10heatKernelPfjjfff:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b64 s[4:5], s[0:1], 0x8
s_mov_b32 s9, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_cmp_lg_u32 s5, 0
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_cselect_b32 s2, -1, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_u32_e32 vcc_lo, s4, v1
s_and_b32 s2, vcc_lo, s2
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB0_5
s_clause 0x2
s_load_b64 s[10:11], s[0:1], 0x0
s_load_b64 s[6:7], s[0:1], 0x10
s_load_b32 s3, s[0:1], 0x18
v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v3, 1, v1
v_cmp_eq_u32_e64 s2, 0, v1
s_add_i32 s8, s4, 1
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
v_mov_b32_e32 v4, v2
v_lshlrev_b64 v[5:6], 2, v[1:2]
v_add_nc_u32_e32 v1, 2, v1
s_lshl_b64 s[0:1], s[8:9], 2
v_lshlrev_b64 v[3:4], 2, v[3:4]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
v_lshlrev_b64 v[7:8], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s10, v5
v_add_co_ci_u32_e32 v1, vcc_lo, s11, v6, vcc_lo
v_add_co_u32 v2, vcc_lo, s10, v3
v_add_co_ci_u32_e32 v3, vcc_lo, s11, v4, vcc_lo
v_add_co_u32 v4, vcc_lo, s10, v7
v_add_co_ci_u32_e32 v5, vcc_lo, s11, v8, vcc_lo
v_mul_f32_e64 v6, s7, s7
v_mov_b32_e32 v7, 0
s_add_u32 s0, s10, s0
s_addc_u32 s1, s11, s1
s_set_inst_prefetch_distance 0x1
s_branch .LBB0_3
.p2align 6
.LBB0_2:
s_or_b32 exec_lo, exec_lo, s4
s_clause 0x2
global_load_b32 v8, v[0:1], off
global_load_b32 v9, v[2:3], off
global_load_b32 v10, v[4:5], off
s_add_i32 s5, s5, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
s_cmp_lg_u32 s5, 0
s_waitcnt vmcnt(1)
v_fmac_f32_e32 v8, -2.0, v9
s_waitcnt vmcnt(0)
v_add_f32_e32 v8, v10, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v8, s3, v8
v_div_scale_f32 v10, null, v6, v6, v8
v_div_scale_f32 v13, vcc_lo, v8, v6, v8
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f32_e32 v11, v10
s_waitcnt_depctr 0xfff
v_fma_f32 v12, -v10, v11, 1.0
v_fmac_f32_e32 v11, v12, v11
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v12, v13, v11
v_fma_f32 v14, -v10, v12, v13
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v12, v14, v11
v_fma_f32 v10, -v10, v12, v13
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fmas_f32 v10, v10, v11, v12
v_div_fixup_f32 v8, v10, v6, v8
s_delay_alu instid0(VALU_DEP_1)
v_add_f32_e32 v8, v9, v8
global_store_b32 v[2:3], v8, off
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB0_5
.LBB0_3:
s_and_saveexec_b32 s4, s2
s_cbranch_execz .LBB0_2
global_load_b32 v8, v7, s[0:1]
s_waitcnt vmcnt(0)
v_add_f32_e32 v8, s6, v8
global_store_b32 v7, v8, s[0:1]
s_branch .LBB0_2
.LBB0_5:
s_set_inst_prefetch_distance 0x2
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z10heatKernelPfjjfff
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 15
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z10heatKernelPfjjfff, .Lfunc_end0-_Z10heatKernelPfjjfff
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: by_value
- .offset: 12
.size: 4
.value_kind: by_value
- .offset: 16
.size: 4
.value_kind: by_value
- .offset: 20
.size: 4
.value_kind: by_value
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z10heatKernelPfjjfff
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z10heatKernelPfjjfff.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 15
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00059100_00000000-6_kernel.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string " returned "
.LC1:
.string "("
.LC2:
.string ") at "
.LC3:
.string ":"
#NO_APP
.text
.type _ZL17CheckCudaErrorAuxPKcjS0_9cudaError, @function
_ZL17CheckCudaErrorAuxPKcjS0_9cudaError:
.LFB3710:
.cfi_startproc
testl %ecx, %ecx
jne .L7
ret
.L7:
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $8, %rsp
.cfi_def_cfa_offset 48
movq %rdi, %rbp
movl %esi, %r12d
movl %ecx, %ebx
movq %rdx, %rsi
leaq _ZSt4cerr(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
leaq .LC0(%rip), %rsi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %r13
movl %ebx, %edi
call cudaGetErrorString@PLT
movq %rax, %rsi
movq %r13, %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
leaq .LC1(%rip), %rsi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movl %ebx, %esi
call _ZNSolsEi@PLT
movq %rax, %rdi
leaq .LC2(%rip), %rsi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movq %rbp, %rsi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
leaq .LC3(%rip), %rsi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rax, %rdi
movl %r12d, %esi
call _ZNSo9_M_insertImEERSoT_@PLT
movq %rax, %rdi
call _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
movl $1, %edi
call exit@PLT
.cfi_endproc
.LFE3710:
.size _ZL17CheckCudaErrorAuxPKcjS0_9cudaError, .-_ZL17CheckCudaErrorAuxPKcjS0_9cudaError
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3713:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3713:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z10initializePfj
.type _Z10initializePfj, @function
_Z10initializePfj:
.LFB3708:
.cfi_startproc
endbr64
testl %esi, %esi
je .L10
movq %rdi, %rax
movl %esi, %esi
leaq (%rdi,%rsi,4), %rdx
.L12:
movl $0x00000000, (%rax)
addq $4, %rax
cmpq %rdx, %rax
jne .L12
.L10:
ret
.cfi_endproc
.LFE3708:
.size _Z10initializePfj, .-_Z10initializePfj
.globl _Z35__device_stub__Z10heatKernelPfjjfffPfjjfff
.type _Z35__device_stub__Z10heatKernelPfjjfffPfjjfff, @function
_Z35__device_stub__Z10heatKernelPfjjfffPfjjfff:
.LFB3735:
.cfi_startproc
endbr64
subq $168, %rsp
.cfi_def_cfa_offset 176
movq %rdi, 24(%rsp)
movl %esi, 20(%rsp)
movl %edx, 16(%rsp)
movss %xmm0, 12(%rsp)
movss %xmm1, 8(%rsp)
movss %xmm2, 4(%rsp)
movq %fs:40, %rax
movq %rax, 152(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 20(%rsp), %rax
movq %rax, 104(%rsp)
leaq 16(%rsp), %rax
movq %rax, 112(%rsp)
leaq 12(%rsp), %rax
movq %rax, 120(%rsp)
leaq 8(%rsp), %rax
movq %rax, 128(%rsp)
leaq 4(%rsp), %rax
movq %rax, 136(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L18
.L14:
movq 152(%rsp), %rax
subq %fs:40, %rax
jne .L19
addq $168, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L18:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 184
pushq 40(%rsp)
.cfi_def_cfa_offset 192
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z10heatKernelPfjjfff(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 176
jmp .L14
.L19:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3735:
.size _Z35__device_stub__Z10heatKernelPfjjfffPfjjfff, .-_Z35__device_stub__Z10heatKernelPfjjfffPfjjfff
.globl _Z10heatKernelPfjjfff
.type _Z10heatKernelPfjjfff, @function
_Z10heatKernelPfjjfff:
.LFB3736:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z35__device_stub__Z10heatKernelPfjjfffPfjjfff
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3736:
.size _Z10heatKernelPfjjfff, .-_Z10heatKernelPfjjfff
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC5:
.string "cudaMalloc((void **)&gpuData, sizeof(float)*(WORK_SIZE + 2))"
.align 8
.LC6:
.string "/home/ubuntu/Datasets/stackv2/train-structured/xobotun/TP_CUDA/master/Sem1/Sem1/kernel.cu"
.align 8
.LC7:
.string "cudaMemcpy(gpuData, hostData, sizeof(float)*(WORK_SIZE + 2), cudaMemcpyHostToDevice)"
.align 8
.LC10:
.string "cudaMemcpy(result, gpuData, sizeof(float)*(WORK_SIZE + 2), cudaMemcpyDeviceToHost)"
.section .rodata.str1.1
.LC11:
.string "cudaFree(gpuData)"
.text
.globl main
.type main, @function
main:
.LFB3709:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $72, %rsp
.cfi_def_cfa_offset 128
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
movl $408, %edi
call _Znam@PLT
movq %rax, %r15
movq %rax, 8(%rsp)
movl $102, %esi
movq %rax, %rdi
call _Z10initializePfj
leaq 24(%rsp), %rdi
movl $408, %esi
call cudaMalloc@PLT
movl %eax, %ecx
leaq .LC5(%rip), %rdx
movl $58, %esi
leaq .LC6(%rip), %rbx
movq %rbx, %rdi
call _ZL17CheckCudaErrorAuxPKcjS0_9cudaError
movl $1, %ecx
movl $408, %edx
movq %r15, %rsi
movq 24(%rsp), %rdi
call cudaMemcpy@PLT
movl %eax, %ecx
leaq .LC7(%rip), %rdx
movl $59, %esi
movq %rbx, %rdi
call _ZL17CheckCudaErrorAuxPKcjS0_9cudaError
movl $408, %edi
call _Znam@PLT
movq %rax, %r15
movl $256, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 44(%rsp), %rdx
movl $1, %ecx
movq 32(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L32
.L23:
movl $2, %ecx
movl $408, %edx
movq 24(%rsp), %rsi
movq %r15, %rdi
call cudaMemcpy@PLT
movl %eax, %ecx
leaq .LC10(%rip), %rdx
movl $66, %esi
leaq .LC6(%rip), %rdi
call _ZL17CheckCudaErrorAuxPKcjS0_9cudaError
leaq 4(%r15), %r12
leaq 404(%r15), %r14
leaq _ZSt4cout(%rip), %r13
jmp .L28
.L32:
movss .LC8(%rip), %xmm2
movss .LC9(%rip), %xmm1
movaps %xmm2, %xmm0
movl $50, %edx
movl $100, %esi
movq 24(%rsp), %rdi
call _Z35__device_stub__Z10heatKernelPfjjfffPfjjfff
jmp .L23
.L35:
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L33
call _ZSt16__throw_bad_castv@PLT
.L33:
call __stack_chk_fail@PLT
.L36:
movzbl 67(%rbp), %esi
.L27:
movsbl %sil, %esi
movq %rbx, %rdi
call _ZNSo3putEc@PLT
movq %rax, %rdi
call _ZNSo5flushEv@PLT
addq $4, %r12
cmpq %r14, %r12
je .L34
.L28:
pxor %xmm0, %xmm0
cvtss2sd (%r12), %xmm0
movq %r13, %rdi
call _ZNSo9_M_insertIdEERSoT_@PLT
movq %rax, %rbx
movq (%rax), %rax
movq -24(%rax), %rax
movq 240(%rbx,%rax), %rbp
testq %rbp, %rbp
je .L35
cmpb $0, 56(%rbp)
jne .L36
movq %rbp, %rdi
call _ZNKSt5ctypeIcE13_M_widen_initEv@PLT
movq 0(%rbp), %rax
movl $10, %esi
movq %rbp, %rdi
call *48(%rax)
movl %eax, %esi
jmp .L27
.L34:
movq 24(%rsp), %rdi
call cudaFree@PLT
movl %eax, %ecx
leaq .LC11(%rip), %rdx
movl $74, %esi
leaq .LC6(%rip), %rdi
call _ZL17CheckCudaErrorAuxPKcjS0_9cudaError
movq 8(%rsp), %rdi
call _ZdaPv@PLT
movq %r15, %rdi
call _ZdaPv@PLT
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L37
movl $0, %eax
addq $72, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L37:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3709:
.size main, .-main
.section .rodata.str1.1
.LC12:
.string "_Z10heatKernelPfjjfff"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3738:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC12(%rip), %rdx
movq %rdx, %rcx
leaq _Z10heatKernelPfjjfff(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3738:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC8:
.long 1056964608
.align 4
.LC9:
.long 1065353216
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "kernel.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z25__device_stub__heatKernelPfjjfff # -- Begin function _Z25__device_stub__heatKernelPfjjfff
.p2align 4, 0x90
.type _Z25__device_stub__heatKernelPfjjfff,@function
_Z25__device_stub__heatKernelPfjjfff: # @_Z25__device_stub__heatKernelPfjjfff
.cfi_startproc
# %bb.0:
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 72(%rsp)
movl %esi, 20(%rsp)
movl %edx, 16(%rsp)
movss %xmm0, 12(%rsp)
movss %xmm1, 8(%rsp)
movss %xmm2, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 20(%rsp), %rax
movq %rax, 88(%rsp)
leaq 16(%rsp), %rax
movq %rax, 96(%rsp)
leaq 12(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z10heatKernelPfjjfff, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $152, %rsp
.cfi_adjust_cfa_offset -152
retq
.Lfunc_end0:
.size _Z25__device_stub__heatKernelPfjjfff, .Lfunc_end0-_Z25__device_stub__heatKernelPfjjfff
.cfi_endproc
# -- End function
.globl _Z10initializePfj # -- Begin function _Z10initializePfj
.p2align 4, 0x90
.type _Z10initializePfj,@function
_Z10initializePfj: # @_Z10initializePfj
.cfi_startproc
# %bb.0:
testl %esi, %esi
je .LBB1_1
# %bb.2: # %.lr.ph.preheader
movl %esi, %edx
shlq $2, %rdx
xorl %esi, %esi
jmp memset@PLT # TAILCALL
.LBB1_1: # %._crit_edge
retq
.Lfunc_end1:
.size _Z10initializePfj, .Lfunc_end1-_Z10initializePfj
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %r13
.cfi_def_cfa_offset 32
pushq %r12
.cfi_def_cfa_offset 40
pushq %rbx
.cfi_def_cfa_offset 48
subq $144, %rsp
.cfi_def_cfa_offset 192
.cfi_offset %rbx, -48
.cfi_offset %r12, -40
.cfi_offset %r13, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movl $408, %edi # imm = 0x198
callq _Znam
movq %rax, %rbx
movl $408, %edx # imm = 0x198
movq %rax, %rdi
xorl %esi, %esi
callq memset@PLT
leaq 8(%rsp), %rdi
movl $408, %esi # imm = 0x198
callq hipMalloc
movl $.L.str.1, %esi
movl $58, %edi
movl %eax, %edx
callq _ZL17CheckCudaErrorAuxPKcjS0_10hipError_t
movq 8(%rsp), %rdi
movl $408, %edx # imm = 0x198
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
movl $.L.str.2, %esi
movl $59, %edi
movl %eax, %edx
callq _ZL17CheckCudaErrorAuxPKcjS0_10hipError_t
movl $408, %edi # imm = 0x198
callq _Znam
movq %rax, %r14
movabsq $4294967297, %rdi # imm = 0x100000001
leaq 255(%rdi), %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB2_2
# %bb.1:
movq 8(%rsp), %rax
movq %rax, 88(%rsp)
movl $100, 36(%rsp)
movl $50, 32(%rsp)
movl $1056964608, 28(%rsp) # imm = 0x3F000000
movl $1065353216, 24(%rsp) # imm = 0x3F800000
movl $1056964608, 20(%rsp) # imm = 0x3F000000
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 36(%rsp), %rax
movq %rax, 104(%rsp)
leaq 32(%rsp), %rax
movq %rax, 112(%rsp)
leaq 28(%rsp), %rax
movq %rax, 120(%rsp)
leaq 24(%rsp), %rax
movq %rax, 128(%rsp)
leaq 20(%rsp), %rax
movq %rax, 136(%rsp)
leaq 72(%rsp), %rdi
leaq 56(%rsp), %rsi
leaq 48(%rsp), %rdx
leaq 40(%rsp), %rcx
callq __hipPopCallConfiguration
movq 72(%rsp), %rsi
movl 80(%rsp), %edx
movq 56(%rsp), %rcx
movl 64(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z10heatKernelPfjjfff, %edi
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB2_2:
movq 8(%rsp), %rsi
movl $408, %edx # imm = 0x198
movq %r14, %rdi
movl $2, %ecx
callq hipMemcpy
movl $.L.str.3, %esi
movl $66, %edi
movl %eax, %edx
callq _ZL17CheckCudaErrorAuxPKcjS0_10hipError_t
movl $1, %r12d
jmp .LBB2_3
.p2align 4, 0x90
.LBB2_6: # in Loop: Header=BB2_3 Depth=1
movq %r15, %rdi
movq %rax, %r13
callq _ZNKSt5ctypeIcE13_M_widen_initEv
movq (%r15), %rax
movq %r15, %rdi
movl $10, %esi
callq *48(%rax)
movl %eax, %ecx
movq %r13, %rax
.LBB2_7: # %_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_.exit
# in Loop: Header=BB2_3 Depth=1
movsbl %cl, %esi
movq %rax, %rdi
callq _ZNSo3putEc
movq %rax, %rdi
callq _ZNSo5flushEv
incq %r12
cmpq $101, %r12
je .LBB2_8
.LBB2_3: # =>This Inner Loop Header: Depth=1
movss (%r14,%r12,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $_ZSt4cout, %edi
callq _ZNSo9_M_insertIdEERSoT_
movq (%rax), %rcx
movq -24(%rcx), %rcx
movq 240(%rax,%rcx), %r15
testq %r15, %r15
je .LBB2_9
# %bb.4: # %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i
# in Loop: Header=BB2_3 Depth=1
cmpb $0, 56(%r15)
je .LBB2_6
# %bb.5: # in Loop: Header=BB2_3 Depth=1
movzbl 67(%r15), %ecx
jmp .LBB2_7
.LBB2_8:
movq 8(%rsp), %rdi
callq hipFree
movl $.L.str.4, %esi
movl $74, %edi
movl %eax, %edx
callq _ZL17CheckCudaErrorAuxPKcjS0_10hipError_t
movq %rbx, %rdi
callq _ZdaPv
movq %r14, %rdi
callq _ZdaPv
xorl %eax, %eax
addq $144, %rsp
.cfi_def_cfa_offset 48
popq %rbx
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
retq
.LBB2_9:
.cfi_def_cfa_offset 192
callq _ZSt16__throw_bad_castv
.Lfunc_end2:
.size main, .Lfunc_end2-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function _ZL17CheckCudaErrorAuxPKcjS0_10hipError_t
.type _ZL17CheckCudaErrorAuxPKcjS0_10hipError_t,@function
_ZL17CheckCudaErrorAuxPKcjS0_10hipError_t: # @_ZL17CheckCudaErrorAuxPKcjS0_10hipError_t
.cfi_startproc
# %bb.0:
testl %edx, %edx
jne .LBB3_2
# %bb.1:
retq
.LBB3_2:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %rbp, -16
movl %edi, %ebx
movl $_ZSt4cerr, %edi
movl %edx, %ebp
callq _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
movl $.L.str.5, %esi
movq %rax, %rdi
callq _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
movq %rax, %r14
movl %ebp, %edi
callq hipGetErrorString
movq %r14, %rdi
movq %rax, %rsi
callq _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
movl $.L.str.6, %esi
movq %rax, %rdi
callq _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
movq %rax, %rdi
movl %ebp, %esi
callq _ZNSolsEi
movl $.L.str.7, %esi
movq %rax, %rdi
callq _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
movl $.L.str, %esi
movq %rax, %rdi
callq _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
movl $.L.str.8, %esi
movq %rax, %rdi
callq _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
movq %rax, %rdi
movl %ebx, %esi
callq _ZNSolsEj
movq %rax, %rdi
callq _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
movl $1, %edi
callq exit
.Lfunc_end3:
.size _ZL17CheckCudaErrorAuxPKcjS0_10hipError_t, .Lfunc_end3-_ZL17CheckCudaErrorAuxPKcjS0_10hipError_t
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB4_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB4_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z10heatKernelPfjjfff, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end4:
.size __hip_module_ctor, .Lfunc_end4-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB5_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB5_2:
retq
.Lfunc_end5:
.size __hip_module_dtor, .Lfunc_end5-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z10heatKernelPfjjfff,@object # @_Z10heatKernelPfjjfff
.section .rodata,"a",@progbits
.globl _Z10heatKernelPfjjfff
.p2align 3, 0x0
_Z10heatKernelPfjjfff:
.quad _Z25__device_stub__heatKernelPfjjfff
.size _Z10heatKernelPfjjfff, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "/home/ubuntu/Datasets/stackv2/train-structured-repos-hip/xobotun/TP_CUDA/master/Sem1/Sem1/kernel.hip"
.size .L.str, 101
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "hipMalloc((void **)&gpuData, sizeof(float)*(WORK_SIZE + 2))"
.size .L.str.1, 60
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "hipMemcpy(gpuData, hostData, sizeof(float)*(WORK_SIZE + 2), hipMemcpyHostToDevice)"
.size .L.str.2, 83
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "hipMemcpy(result, gpuData, sizeof(float)*(WORK_SIZE + 2), hipMemcpyDeviceToHost)"
.size .L.str.3, 81
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "hipFree(gpuData)"
.size .L.str.4, 17
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz " returned "
.size .L.str.5, 11
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "("
.size .L.str.6, 2
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz ") at "
.size .L.str.7, 6
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz ":"
.size .L.str.8, 2
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z10heatKernelPfjjfff"
.size .L__unnamed_1, 22
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z25__device_stub__heatKernelPfjjfff
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z10heatKernelPfjjfff
.addrsig_sym _ZSt4cout
.addrsig_sym _ZSt4cerr
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void gLogSoftmaxGrad(float* grad, const float* adj, const float* val, const int rows, const int cols) {
for(int bid = 0; bid < rows; bid += gridDim.x) {
int j = bid + blockIdx.x;
if(j < rows) {
extern __shared__ float _share[];
float* _sum = _share + blockDim.x;
float* gradRow = grad + j * cols;
const float* adjRow = adj + j * cols;
const float* valRow = val + j * cols;
_sum[threadIdx.x] = 0.0;
for(int tid = 0; tid < cols; tid += blockDim.x) {
int id = tid + threadIdx.x;
if(id < cols) {
_sum[threadIdx.x] += adjRow[id];
}
}
__syncthreads();
int len = blockDim.x;
while(len != 1) {
__syncthreads();
int skip = (len + 1) >> 1;
if(threadIdx.x < (len >> 1))
_sum[threadIdx.x] += _sum[threadIdx.x + skip];
len = (len + 1) >> 1;
}
__syncthreads();
for(int tid = 0; tid < cols; tid += blockDim.x) {
int id = tid + threadIdx.x;
if(id < cols)
gradRow[id] += adjRow[id] - (expf(valRow[id]) * _sum[0]);
}
}
}
} | code for sm_80
Function : _Z15gLogSoftmaxGradPfPKfS1_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ IMAD.MOV.U32 R0, RZ, RZ, c[0x0][0x178] ; /* 0x00005e00ff007624 */
/* 0x000fca00078e00ff */
/*0020*/ ISETP.GE.AND P0, PT, R0, 0x1, PT ; /* 0x000000010000780c */
/* 0x000fda0003f06270 */
/*0030*/ @!P0 EXIT ; /* 0x000000000000894d */
/* 0x000fea0003800000 */
/*0040*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e220000002100 */
/*0050*/ S2UR UR5, SR_CTAID.X ; /* 0x00000000000579c3 */
/* 0x000e620000002500 */
/*0060*/ ULDC UR4, c[0x0][0x0] ; /* 0x0000000000047ab9 */
/* 0x000fe20000000800 */
/*0070*/ IMAD.MOV.U32 R13, RZ, RZ, RZ ; /* 0x000000ffff0d7224 */
/* 0x000fe200078e00ff */
/*0080*/ USHF.L.U32 UR4, UR4, 0x2, URZ ; /* 0x0000000204047899 */
/* 0x000fe4000800063f */
/*0090*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */
/* 0x000fc80000000a00 */
/*00a0*/ LEA R2, R0, UR4, 0x2 ; /* 0x0000000400027c11 */
/* 0x001fe4000f8e10ff */
/*00b0*/ IADD3 R4, R13.reuse, UR5, RZ ; /* 0x000000050d047c10 */
/* 0x042fe4000fffe0ff */
/*00c0*/ IADD3 R13, R13, c[0x0][0xc], RZ ; /* 0x000003000d0d7a10 */
/* 0x000fe40007ffe0ff */
/*00d0*/ ISETP.GE.AND P1, PT, R4, c[0x0][0x178], PT ; /* 0x00005e0004007a0c */
/* 0x000fe40003f26270 */
/*00e0*/ ISETP.GE.AND P0, PT, R13, c[0x0][0x178], PT ; /* 0x00005e000d007a0c */
/* 0x000fd60003f06270 */
/*00f0*/ @P1 BRA 0x600 ; /* 0x0000050000001947 */
/* 0x001fea0003800000 */
/*0100*/ STS [R0.X4+UR4], RZ ; /* 0x000000ff00007988 */
/* 0x0001e20008004804 */
/*0110*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x17c] ; /* 0x00005f00ff037624 */
/* 0x000fca00078e00ff */
/*0120*/ ISETP.GE.AND P1, PT, R3, 0x1, PT ; /* 0x000000010300780c */
/* 0x000fe20003f26270 */
/*0130*/ IMAD R3, R4, c[0x0][0x17c], RZ ; /* 0x00005f0004037a24 */
/* 0x000fca00078e02ff */
/*0140*/ SHF.R.S32.HI R4, RZ, 0x1f, R3 ; /* 0x0000001fff047819 */
/* 0x000fce0000011403 */
/*0150*/ @!P1 BRA 0x270 ; /* 0x0000011000009947 */
/* 0x000fea0003800000 */
/*0160*/ IMAD.MOV.U32 R5, RZ, RZ, RZ ; /* 0x000000ffff057224 */
/* 0x001fe400078e00ff */
/*0170*/ IMAD.MOV.U32 R9, RZ, RZ, RZ ; /* 0x000000ffff097224 */
/* 0x000fe400078e00ff */
/*0180*/ IMAD.IADD R8, R0, 0x1, R5 ; /* 0x0000000100087824 */
/* 0x000fe200078e0205 */
/*0190*/ IADD3 R5, R5, c[0x0][0x0], RZ ; /* 0x0000000005057a10 */
/* 0x000fe20007ffe0ff */
/*01a0*/ BSSY B0, 0x260 ; /* 0x000000b000007945 */
/* 0x000fe60003800000 */
/*01b0*/ ISETP.GE.AND P3, PT, R8, c[0x0][0x17c], PT ; /* 0x00005f0008007a0c */
/* 0x000fe40003f66270 */
/*01c0*/ ISETP.GE.AND P2, PT, R5, c[0x0][0x17c], PT ; /* 0x00005f0005007a0c */
/* 0x000fd60003f46270 */
/*01d0*/ @P3 BRA 0x250 ; /* 0x0000007000003947 */
/* 0x001fea0003800000 */
/*01e0*/ IADD3 R7, P3, R3, R8, RZ ; /* 0x0000000803077210 */
/* 0x000fc80007f7e0ff */
/*01f0*/ LEA.HI.X.SX32 R8, R8, R4, 0x1, P3 ; /* 0x0000000408087211 */
/* 0x000fe400018f0eff */
/*0200*/ LEA R6, P3, R7, c[0x0][0x168], 0x2 ; /* 0x00005a0007067a11 */
/* 0x000fc800078610ff */
/*0210*/ LEA.HI.X R7, R7, c[0x0][0x16c], R8, 0x2, P3 ; /* 0x00005b0007077a11 */
/* 0x000fca00018f1408 */
/*0220*/ LDG.E R6, [R6.64] ; /* 0x0000000606067981 */
/* 0x000ea4000c1e1900 */
/*0230*/ FADD R9, R9, R6 ; /* 0x0000000609097221 */
/* 0x004fca0000000000 */
/*0240*/ STS [R0.X4+UR4], R9 ; /* 0x0000000900007988 */
/* 0x0001e40008004804 */
/*0250*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0260*/ @!P2 BRA 0x180 ; /* 0xffffff100000a947 */
/* 0x000fea000383ffff */
/*0270*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x0][0x0] ; /* 0x00000000ff057624 */
/* 0x001fe200078e00ff */
/*0280*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fe80000010000 */
/*0290*/ ISETP.NE.AND P2, PT, R5, 0x1, PT ; /* 0x000000010500780c */
/* 0x000fda0003f45270 */
/*02a0*/ @!P2 BRA 0x3a0 ; /* 0x000000f00000a947 */
/* 0x000fea0003800000 */
/*02b0*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x0][0x0] ; /* 0x00000000ff057624 */
/* 0x000fca00078e00ff */
/*02c0*/ SHF.R.S32.HI R7, RZ, 0x1, R5 ; /* 0x00000001ff077819 */
/* 0x000fe20000011405 */
/*02d0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fe60000010000 */
/*02e0*/ ISETP.GE.U32.AND P2, PT, R0, R7, PT ; /* 0x000000070000720c */
/* 0x000fda0003f46070 */
/*02f0*/ @!P2 LEA R6, R5.reuse, 0x2, 0x1 ; /* 0x000000020506a811 */
/* 0x040fe400078e08ff */
/*0300*/ IADD3 R5, R5, 0x1, RZ ; /* 0x0000000105057810 */
/* 0x000fe40007ffe0ff */
/*0310*/ @!P2 LOP3.LUT R7, R6, 0xfffffffc, RZ, 0xc0, !PT ; /* 0xfffffffc0607a812 */
/* 0x000fe400078ec0ff */
/*0320*/ SHF.R.S32.HI R5, RZ, 0x1, R5 ; /* 0x00000001ff057819 */
/* 0x000fe20000011405 */
/*0330*/ @!P2 LDS R6, [R0.X4+UR4] ; /* 0x000000040006a984 */
/* 0x000fe40008004800 */
/*0340*/ @!P2 IMAD.IADD R7, R2, 0x1, R7 ; /* 0x000000010207a824 */
/* 0x000fcc00078e0207 */
/*0350*/ @!P2 LDS R7, [R7] ; /* 0x000000000707a984 */
/* 0x000e240000000800 */
/*0360*/ @!P2 FADD R9, R6, R7 ; /* 0x000000070609a221 */
/* 0x001fca0000000000 */
/*0370*/ @!P2 STS [R0.X4+UR4], R9 ; /* 0x000000090000a988 */
/* 0x0001e20008004804 */
/*0380*/ ISETP.NE.AND P2, PT, R5, 0x1, PT ; /* 0x000000010500780c */
/* 0x000fda0003f45270 */
/*0390*/ @P2 BRA 0x2c0 ; /* 0xffffff2000002947 */
/* 0x001fea000383ffff */
/*03a0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*03b0*/ @!P1 BRA 0x600 ; /* 0x0000024000009947 */
/* 0x000fea0003800000 */
/*03c0*/ IMAD.MOV.U32 R5, RZ, RZ, RZ ; /* 0x000000ffff057224 */
/* 0x000fc800078e00ff */
/*03d0*/ IMAD.IADD R8, R0, 0x1, R5 ; /* 0x0000000100087824 */
/* 0x000fe200078e0205 */
/*03e0*/ IADD3 R5, R5, c[0x0][0x0], RZ ; /* 0x0000000005057a10 */
/* 0x000fe20007ffe0ff */
/*03f0*/ BSSY B0, 0x5f0 ; /* 0x000001f000007945 */
/* 0x000fe60003800000 */
/*0400*/ ISETP.GE.AND P2, PT, R8, c[0x0][0x17c], PT ; /* 0x00005f0008007a0c */
/* 0x000fc40003f46270 */
/*0410*/ ISETP.GE.AND P1, PT, R5, c[0x0][0x17c], PT ; /* 0x00005f0005007a0c */
/* 0x000fd60003f26270 */
/*0420*/ @P2 BRA 0x5e0 ; /* 0x000001b000002947 */
/* 0x001fea0003800000 */
/*0430*/ IADD3 R7, P2, R3, R8, RZ ; /* 0x0000000803077210 */
/* 0x000fe20007f5e0ff */
/*0440*/ IMAD.MOV.U32 R19, RZ, RZ, 0x3bbb989d ; /* 0x3bbb989dff137424 */
/* 0x000fe200078e00ff */
/*0450*/ LDS R15, [UR4] ; /* 0x00000004ff0f7984 */
/* 0x000e240008000800 */
/*0460*/ LEA.HI.X.SX32 R8, R8, R4, 0x1, P2 ; /* 0x0000000408087211 */
/* 0x000fe200010f0eff */
/*0470*/ IMAD.SHL.U32 R6, R7, 0x4, RZ ; /* 0x0000000407067824 */
/* 0x000fc600078e00ff */
/*0480*/ SHF.L.U64.HI R7, R7, 0x2, R8 ; /* 0x0000000207077819 */
/* 0x000fe40000010208 */
/*0490*/ IADD3 R8, P2, R6, c[0x0][0x170], RZ ; /* 0x00005c0006087a10 */
/* 0x000fc80007f5e0ff */
/*04a0*/ IADD3.X R9, R7, c[0x0][0x174], RZ, P2, !PT ; /* 0x00005d0007097a10 */
/* 0x000fca00017fe4ff */
/*04b0*/ LDG.E R8, [R8.64] ; /* 0x0000000608087981 */
/* 0x000ea2000c1e1900 */
/*04c0*/ IADD3 R10, P2, R6.reuse, c[0x0][0x168], RZ ; /* 0x00005a00060a7a10 */
/* 0x040fe40007f5e0ff */
/*04d0*/ IADD3 R6, P3, R6, c[0x0][0x160], RZ ; /* 0x0000580006067a10 */
/* 0x000fe40007f7e0ff */
/*04e0*/ IADD3.X R11, R7.reuse, c[0x0][0x16c], RZ, P2, !PT ; /* 0x00005b00070b7a10 */
/* 0x040fe400017fe4ff */
/*04f0*/ IADD3.X R7, R7, c[0x0][0x164], RZ, P3, !PT ; /* 0x0000590007077a10 */
/* 0x000fc60001ffe4ff */
/*0500*/ LDG.E R10, [R10.64] ; /* 0x000000060a0a7981 */
/* 0x000e28000c1e1900 */
/*0510*/ LDG.E R17, [R6.64] ; /* 0x0000000606117981 */
/* 0x000ee2000c1e1900 */
/*0520*/ IMAD.MOV.U32 R21, RZ, RZ, 0x437c0000 ; /* 0x437c0000ff157424 */
/* 0x000fe400078e00ff */
/*0530*/ FFMA.SAT R12, R8, R19, 0.5 ; /* 0x3f000000080c7423 */
/* 0x004fc80000002013 */
/*0540*/ FFMA.RM R12, R12, R21, 12582913 ; /* 0x4b4000010c0c7423 */
/* 0x000fc80000004015 */
/*0550*/ FADD R9, R12.reuse, -12583039 ; /* 0xcb40007f0c097421 */
/* 0x040fe40000000000 */
/*0560*/ IMAD.SHL.U32 R12, R12, 0x800000, RZ ; /* 0x008000000c0c7824 */
/* 0x000fe400078e00ff */
/*0570*/ FFMA R9, R8, 1.4426950216293334961, -R9 ; /* 0x3fb8aa3b08097823 */
/* 0x000fc80000000809 */
/*0580*/ FFMA R9, R8, 1.925963033500011079e-08, R9 ; /* 0x32a5706008097823 */
/* 0x000fcc0000000009 */
/*0590*/ MUFU.EX2 R9, R9 ; /* 0x0000000900097308 */
/* 0x000e640000000800 */
/*05a0*/ FMUL R12, R12, R9 ; /* 0x000000090c0c7220 */
/* 0x002fc80000400000 */
/*05b0*/ FFMA R10, -R12, R15, R10 ; /* 0x0000000f0c0a7223 */
/* 0x001fc8000000010a */
/*05c0*/ FADD R17, R10, R17 ; /* 0x000000110a117221 */
/* 0x008fca0000000000 */
/*05d0*/ STG.E [R6.64], R17 ; /* 0x0000001106007986 */
/* 0x0001e4000c101906 */
/*05e0*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*05f0*/ @!P1 BRA 0x3d0 ; /* 0xfffffdd000009947 */
/* 0x000fea000383ffff */
/*0600*/ @!P0 BRA 0xb0 ; /* 0xfffffaa000008947 */
/* 0x000fea000383ffff */
/*0610*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0620*/ BRA 0x620; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0630*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0640*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0650*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0660*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0670*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0680*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0690*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void gLogSoftmaxGrad(float* grad, const float* adj, const float* val, const int rows, const int cols) {
for(int bid = 0; bid < rows; bid += gridDim.x) {
int j = bid + blockIdx.x;
if(j < rows) {
extern __shared__ float _share[];
float* _sum = _share + blockDim.x;
float* gradRow = grad + j * cols;
const float* adjRow = adj + j * cols;
const float* valRow = val + j * cols;
_sum[threadIdx.x] = 0.0;
for(int tid = 0; tid < cols; tid += blockDim.x) {
int id = tid + threadIdx.x;
if(id < cols) {
_sum[threadIdx.x] += adjRow[id];
}
}
__syncthreads();
int len = blockDim.x;
while(len != 1) {
__syncthreads();
int skip = (len + 1) >> 1;
if(threadIdx.x < (len >> 1))
_sum[threadIdx.x] += _sum[threadIdx.x + skip];
len = (len + 1) >> 1;
}
__syncthreads();
for(int tid = 0; tid < cols; tid += blockDim.x) {
int id = tid + threadIdx.x;
if(id < cols)
gradRow[id] += adjRow[id] - (expf(valRow[id]) * _sum[0]);
}
}
}
} | .file "tmpxft_0012e87e_00000000-6_gLogSoftmaxGrad.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z43__device_stub__Z15gLogSoftmaxGradPfPKfS1_iiPfPKfS1_ii
.type _Z43__device_stub__Z15gLogSoftmaxGradPfPKfS1_iiPfPKfS1_ii, @function
_Z43__device_stub__Z15gLogSoftmaxGradPfPKfS1_iiPfPKfS1_ii:
.LFB2051:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movl %r8d, (%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movq %rsp, %rax
movq %rax, 128(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z15gLogSoftmaxGradPfPKfS1_ii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z43__device_stub__Z15gLogSoftmaxGradPfPKfS1_iiPfPKfS1_ii, .-_Z43__device_stub__Z15gLogSoftmaxGradPfPKfS1_iiPfPKfS1_ii
.globl _Z15gLogSoftmaxGradPfPKfS1_ii
.type _Z15gLogSoftmaxGradPfPKfS1_ii, @function
_Z15gLogSoftmaxGradPfPKfS1_ii:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z43__device_stub__Z15gLogSoftmaxGradPfPKfS1_iiPfPKfS1_ii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z15gLogSoftmaxGradPfPKfS1_ii, .-_Z15gLogSoftmaxGradPfPKfS1_ii
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z15gLogSoftmaxGradPfPKfS1_ii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z15gLogSoftmaxGradPfPKfS1_ii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void gLogSoftmaxGrad(float* grad, const float* adj, const float* val, const int rows, const int cols) {
for(int bid = 0; bid < rows; bid += gridDim.x) {
int j = bid + blockIdx.x;
if(j < rows) {
extern __shared__ float _share[];
float* _sum = _share + blockDim.x;
float* gradRow = grad + j * cols;
const float* adjRow = adj + j * cols;
const float* valRow = val + j * cols;
_sum[threadIdx.x] = 0.0;
for(int tid = 0; tid < cols; tid += blockDim.x) {
int id = tid + threadIdx.x;
if(id < cols) {
_sum[threadIdx.x] += adjRow[id];
}
}
__syncthreads();
int len = blockDim.x;
while(len != 1) {
__syncthreads();
int skip = (len + 1) >> 1;
if(threadIdx.x < (len >> 1))
_sum[threadIdx.x] += _sum[threadIdx.x + skip];
len = (len + 1) >> 1;
}
__syncthreads();
for(int tid = 0; tid < cols; tid += blockDim.x) {
int id = tid + threadIdx.x;
if(id < cols)
gradRow[id] += adjRow[id] - (expf(valRow[id]) * _sum[0]);
}
}
}
} | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void gLogSoftmaxGrad(float* grad, const float* adj, const float* val, const int rows, const int cols) {
for(int bid = 0; bid < rows; bid += gridDim.x) {
int j = bid + blockIdx.x;
if(j < rows) {
extern __shared__ float _share[];
float* _sum = _share + blockDim.x;
float* gradRow = grad + j * cols;
const float* adjRow = adj + j * cols;
const float* valRow = val + j * cols;
_sum[threadIdx.x] = 0.0;
for(int tid = 0; tid < cols; tid += blockDim.x) {
int id = tid + threadIdx.x;
if(id < cols) {
_sum[threadIdx.x] += adjRow[id];
}
}
__syncthreads();
int len = blockDim.x;
while(len != 1) {
__syncthreads();
int skip = (len + 1) >> 1;
if(threadIdx.x < (len >> 1))
_sum[threadIdx.x] += _sum[threadIdx.x + skip];
len = (len + 1) >> 1;
}
__syncthreads();
for(int tid = 0; tid < cols; tid += blockDim.x) {
int id = tid + threadIdx.x;
if(id < cols)
gradRow[id] += adjRow[id] - (expf(valRow[id]) * _sum[0]);
}
}
}
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void gLogSoftmaxGrad(float* grad, const float* adj, const float* val, const int rows, const int cols) {
for(int bid = 0; bid < rows; bid += gridDim.x) {
int j = bid + blockIdx.x;
if(j < rows) {
extern __shared__ float _share[];
float* _sum = _share + blockDim.x;
float* gradRow = grad + j * cols;
const float* adjRow = adj + j * cols;
const float* valRow = val + j * cols;
_sum[threadIdx.x] = 0.0;
for(int tid = 0; tid < cols; tid += blockDim.x) {
int id = tid + threadIdx.x;
if(id < cols) {
_sum[threadIdx.x] += adjRow[id];
}
}
__syncthreads();
int len = blockDim.x;
while(len != 1) {
__syncthreads();
int skip = (len + 1) >> 1;
if(threadIdx.x < (len >> 1))
_sum[threadIdx.x] += _sum[threadIdx.x + skip];
len = (len + 1) >> 1;
}
__syncthreads();
for(int tid = 0; tid < cols; tid += blockDim.x) {
int id = tid + threadIdx.x;
if(id < cols)
gradRow[id] += adjRow[id] - (expf(valRow[id]) * _sum[0]);
}
}
}
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z15gLogSoftmaxGradPfPKfS1_ii
.globl _Z15gLogSoftmaxGradPfPKfS1_ii
.p2align 8
.type _Z15gLogSoftmaxGradPfPKfS1_ii,@function
_Z15gLogSoftmaxGradPfPKfS1_ii:
s_load_b32 s12, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s12, 1
s_cbranch_scc1 .LBB0_19
s_clause 0x2
s_load_b64 s[2:3], s[0:1], 0x1c
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[8:9], s[0:1], 0x10
s_add_u32 s0, s0, 32
s_addc_u32 s1, s1, 0
v_mov_b32_e32 v3, 0
s_mov_b32 s14, 0
s_waitcnt lgkmcnt(0)
s_cmp_gt_i32 s2, 0
s_cselect_b32 s13, -1, 0
s_branch .LBB0_3
.LBB0_2:
s_add_i32 s14, s3, s14
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_ge_i32 s14, s12
s_cbranch_scc1 .LBB0_19
.LBB0_3:
s_add_i32 s10, s14, s15
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_ge_i32 s10, s12
s_cbranch_scc1 .LBB0_2
s_load_b32 s11, s[0:1], 0xc
s_mul_i32 s10, s10, s2
s_waitcnt lgkmcnt(0)
s_and_b32 s16, s11, 0xffff
s_ashr_i32 s11, s10, 31
s_lshl_b32 s17, s16, 2
s_lshl_b64 s[10:11], s[10:11], 2
s_add_i32 s17, s17, 0
s_add_u32 s18, s6, s10
v_lshl_add_u32 v4, v0, 2, s17
s_addc_u32 s19, s7, s11
s_and_not1_b32 vcc_lo, exec_lo, s13
ds_store_b32 v4, v3
s_cbranch_vccnz .LBB0_9
s_mov_b32 s20, 0
s_branch .LBB0_7
.p2align 6
.LBB0_6:
s_or_b32 exec_lo, exec_lo, s21
s_add_i32 s20, s20, s16
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_ge_i32 s20, s2
s_cbranch_scc1 .LBB0_9
.LBB0_7:
v_add_nc_u32_e32 v1, s20, v0
s_mov_b32 s21, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s2, v1
s_cbranch_execz .LBB0_6
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[1:2]
v_add_co_u32 v1, vcc_lo, s18, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, s19, v2, vcc_lo
global_load_b32 v1, v[1:2], off
ds_load_b32 v2, v4
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_f32_e32 v1, v1, v2
ds_store_b32 v4, v1
s_branch .LBB0_6
.LBB0_9:
s_cmp_eq_u32 s16, 1
s_waitcnt lgkmcnt(0)
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB0_14
s_mov_b32 s20, s16
s_branch .LBB0_12
.p2align 6
.LBB0_11:
s_or_b32 exec_lo, exec_lo, s21
s_cmp_lg_u32 s20, 1
s_cbranch_scc0 .LBB0_14
.LBB0_12:
s_lshr_b32 s21, s20, 1
s_add_i32 s20, s20, 1
v_cmp_gt_u32_e32 vcc_lo, s21, v0
s_lshr_b32 s20, s20, 1
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_and_saveexec_b32 s21, vcc_lo
s_cbranch_execz .LBB0_11
v_lshl_add_u32 v1, s20, 2, v4
ds_load_b32 v1, v1
ds_load_b32 v2, v4
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v1, v1, v2
ds_store_b32 v4, v1
s_branch .LBB0_11
.LBB0_14:
s_and_not1_b32 vcc_lo, exec_lo, s13
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_vccnz .LBB0_2
s_add_u32 s20, s4, s10
s_addc_u32 s21, s5, s11
s_add_u32 s10, s8, s10
s_addc_u32 s11, s9, s11
s_mov_b32 s22, 0
s_branch .LBB0_17
.LBB0_16:
s_or_b32 exec_lo, exec_lo, s23
s_add_i32 s22, s22, s16
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_lt_i32 s22, s2
s_cbranch_scc0 .LBB0_2
.LBB0_17:
v_add_nc_u32_e32 v1, s22, v0
s_mov_b32 s23, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s2, v1
s_cbranch_execz .LBB0_16
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[1:2]
v_add_co_u32 v4, vcc_lo, s10, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s11, v2, vcc_lo
global_load_b32 v6, v[4:5], off
v_add_co_u32 v4, vcc_lo, s18, v1
v_add_co_ci_u32_e32 v5, vcc_lo, s19, v2, vcc_lo
v_add_co_u32 v1, vcc_lo, s20, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s21, v2, vcc_lo
global_load_b32 v4, v[4:5], off
global_load_b32 v5, v[1:2], off
s_waitcnt vmcnt(2)
v_mul_f32_e32 v7, 0x3fb8aa3b, v6
v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fma_f32 v8, v6, 0x3fb8aa3b, -v7
v_rndne_f32_e32 v9, v7
v_dual_fmac_f32 v8, 0x32a5705f, v6 :: v_dual_sub_f32 v7, v7, v9
v_cvt_i32_f32_e32 v9, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_add_f32 v7, v7, v8 :: v_dual_mov_b32 v8, s17
v_exp_f32_e32 v7, v7
ds_load_b32 v8, v8
v_ldexp_f32 v7, v7, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v7, 0, v7, vcc_lo
v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v6
v_cndmask_b32_e32 v6, 0x7f800000, v7, vcc_lo
s_waitcnt vmcnt(1) lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fma_f32 v4, -v6, v8, v4
s_waitcnt vmcnt(0)
v_add_f32_e32 v4, v5, v4
global_store_b32 v[1:2], v4, off
s_branch .LBB0_16
.LBB0_19:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z15gLogSoftmaxGradPfPKfS1_ii
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 10
.amdhsa_next_free_sgpr 24
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z15gLogSoftmaxGradPfPKfS1_ii, .Lfunc_end0-_Z15gLogSoftmaxGradPfPKfS1_ii
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 28
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
- .offset: 152
.size: 4
.value_kind: hidden_dynamic_lds_size
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z15gLogSoftmaxGradPfPKfS1_ii
.private_segment_fixed_size: 0
.sgpr_count: 26
.sgpr_spill_count: 0
.symbol: _Z15gLogSoftmaxGradPfPKfS1_ii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 10
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void gLogSoftmaxGrad(float* grad, const float* adj, const float* val, const int rows, const int cols) {
for(int bid = 0; bid < rows; bid += gridDim.x) {
int j = bid + blockIdx.x;
if(j < rows) {
extern __shared__ float _share[];
float* _sum = _share + blockDim.x;
float* gradRow = grad + j * cols;
const float* adjRow = adj + j * cols;
const float* valRow = val + j * cols;
_sum[threadIdx.x] = 0.0;
for(int tid = 0; tid < cols; tid += blockDim.x) {
int id = tid + threadIdx.x;
if(id < cols) {
_sum[threadIdx.x] += adjRow[id];
}
}
__syncthreads();
int len = blockDim.x;
while(len != 1) {
__syncthreads();
int skip = (len + 1) >> 1;
if(threadIdx.x < (len >> 1))
_sum[threadIdx.x] += _sum[threadIdx.x + skip];
len = (len + 1) >> 1;
}
__syncthreads();
for(int tid = 0; tid < cols; tid += blockDim.x) {
int id = tid + threadIdx.x;
if(id < cols)
gradRow[id] += adjRow[id] - (expf(valRow[id]) * _sum[0]);
}
}
}
} | .text
.file "gLogSoftmaxGrad.hip"
.globl _Z30__device_stub__gLogSoftmaxGradPfPKfS1_ii # -- Begin function _Z30__device_stub__gLogSoftmaxGradPfPKfS1_ii
.p2align 4, 0x90
.type _Z30__device_stub__gLogSoftmaxGradPfPKfS1_ii,@function
_Z30__device_stub__gLogSoftmaxGradPfPKfS1_ii: # @_Z30__device_stub__gLogSoftmaxGradPfPKfS1_ii
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
movl %r8d, (%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
movq %rsp, %rax
movq %rax, 112(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z15gLogSoftmaxGradPfPKfS1_ii, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z30__device_stub__gLogSoftmaxGradPfPKfS1_ii, .Lfunc_end0-_Z30__device_stub__gLogSoftmaxGradPfPKfS1_ii
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z15gLogSoftmaxGradPfPKfS1_ii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z15gLogSoftmaxGradPfPKfS1_ii,@object # @_Z15gLogSoftmaxGradPfPKfS1_ii
.section .rodata,"a",@progbits
.globl _Z15gLogSoftmaxGradPfPKfS1_ii
.p2align 3, 0x0
_Z15gLogSoftmaxGradPfPKfS1_ii:
.quad _Z30__device_stub__gLogSoftmaxGradPfPKfS1_ii
.size _Z15gLogSoftmaxGradPfPKfS1_ii, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z15gLogSoftmaxGradPfPKfS1_ii"
.size .L__unnamed_1, 30
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z30__device_stub__gLogSoftmaxGradPfPKfS1_ii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z15gLogSoftmaxGradPfPKfS1_ii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z15gLogSoftmaxGradPfPKfS1_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ IMAD.MOV.U32 R0, RZ, RZ, c[0x0][0x178] ; /* 0x00005e00ff007624 */
/* 0x000fca00078e00ff */
/*0020*/ ISETP.GE.AND P0, PT, R0, 0x1, PT ; /* 0x000000010000780c */
/* 0x000fda0003f06270 */
/*0030*/ @!P0 EXIT ; /* 0x000000000000894d */
/* 0x000fea0003800000 */
/*0040*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e220000002100 */
/*0050*/ S2UR UR5, SR_CTAID.X ; /* 0x00000000000579c3 */
/* 0x000e620000002500 */
/*0060*/ ULDC UR4, c[0x0][0x0] ; /* 0x0000000000047ab9 */
/* 0x000fe20000000800 */
/*0070*/ IMAD.MOV.U32 R13, RZ, RZ, RZ ; /* 0x000000ffff0d7224 */
/* 0x000fe200078e00ff */
/*0080*/ USHF.L.U32 UR4, UR4, 0x2, URZ ; /* 0x0000000204047899 */
/* 0x000fe4000800063f */
/*0090*/ ULDC.64 UR6, c[0x0][0x118] ; /* 0x0000460000067ab9 */
/* 0x000fc80000000a00 */
/*00a0*/ LEA R2, R0, UR4, 0x2 ; /* 0x0000000400027c11 */
/* 0x001fe4000f8e10ff */
/*00b0*/ IADD3 R4, R13.reuse, UR5, RZ ; /* 0x000000050d047c10 */
/* 0x042fe4000fffe0ff */
/*00c0*/ IADD3 R13, R13, c[0x0][0xc], RZ ; /* 0x000003000d0d7a10 */
/* 0x000fe40007ffe0ff */
/*00d0*/ ISETP.GE.AND P1, PT, R4, c[0x0][0x178], PT ; /* 0x00005e0004007a0c */
/* 0x000fe40003f26270 */
/*00e0*/ ISETP.GE.AND P0, PT, R13, c[0x0][0x178], PT ; /* 0x00005e000d007a0c */
/* 0x000fd60003f06270 */
/*00f0*/ @P1 BRA 0x600 ; /* 0x0000050000001947 */
/* 0x001fea0003800000 */
/*0100*/ STS [R0.X4+UR4], RZ ; /* 0x000000ff00007988 */
/* 0x0001e20008004804 */
/*0110*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x17c] ; /* 0x00005f00ff037624 */
/* 0x000fca00078e00ff */
/*0120*/ ISETP.GE.AND P1, PT, R3, 0x1, PT ; /* 0x000000010300780c */
/* 0x000fe20003f26270 */
/*0130*/ IMAD R3, R4, c[0x0][0x17c], RZ ; /* 0x00005f0004037a24 */
/* 0x000fca00078e02ff */
/*0140*/ SHF.R.S32.HI R4, RZ, 0x1f, R3 ; /* 0x0000001fff047819 */
/* 0x000fce0000011403 */
/*0150*/ @!P1 BRA 0x270 ; /* 0x0000011000009947 */
/* 0x000fea0003800000 */
/*0160*/ IMAD.MOV.U32 R5, RZ, RZ, RZ ; /* 0x000000ffff057224 */
/* 0x001fe400078e00ff */
/*0170*/ IMAD.MOV.U32 R9, RZ, RZ, RZ ; /* 0x000000ffff097224 */
/* 0x000fe400078e00ff */
/*0180*/ IMAD.IADD R8, R0, 0x1, R5 ; /* 0x0000000100087824 */
/* 0x000fe200078e0205 */
/*0190*/ IADD3 R5, R5, c[0x0][0x0], RZ ; /* 0x0000000005057a10 */
/* 0x000fe20007ffe0ff */
/*01a0*/ BSSY B0, 0x260 ; /* 0x000000b000007945 */
/* 0x000fe60003800000 */
/*01b0*/ ISETP.GE.AND P3, PT, R8, c[0x0][0x17c], PT ; /* 0x00005f0008007a0c */
/* 0x000fe40003f66270 */
/*01c0*/ ISETP.GE.AND P2, PT, R5, c[0x0][0x17c], PT ; /* 0x00005f0005007a0c */
/* 0x000fd60003f46270 */
/*01d0*/ @P3 BRA 0x250 ; /* 0x0000007000003947 */
/* 0x001fea0003800000 */
/*01e0*/ IADD3 R7, P3, R3, R8, RZ ; /* 0x0000000803077210 */
/* 0x000fc80007f7e0ff */
/*01f0*/ LEA.HI.X.SX32 R8, R8, R4, 0x1, P3 ; /* 0x0000000408087211 */
/* 0x000fe400018f0eff */
/*0200*/ LEA R6, P3, R7, c[0x0][0x168], 0x2 ; /* 0x00005a0007067a11 */
/* 0x000fc800078610ff */
/*0210*/ LEA.HI.X R7, R7, c[0x0][0x16c], R8, 0x2, P3 ; /* 0x00005b0007077a11 */
/* 0x000fca00018f1408 */
/*0220*/ LDG.E R6, [R6.64] ; /* 0x0000000606067981 */
/* 0x000ea4000c1e1900 */
/*0230*/ FADD R9, R9, R6 ; /* 0x0000000609097221 */
/* 0x004fca0000000000 */
/*0240*/ STS [R0.X4+UR4], R9 ; /* 0x0000000900007988 */
/* 0x0001e40008004804 */
/*0250*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0260*/ @!P2 BRA 0x180 ; /* 0xffffff100000a947 */
/* 0x000fea000383ffff */
/*0270*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x0][0x0] ; /* 0x00000000ff057624 */
/* 0x001fe200078e00ff */
/*0280*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fe80000010000 */
/*0290*/ ISETP.NE.AND P2, PT, R5, 0x1, PT ; /* 0x000000010500780c */
/* 0x000fda0003f45270 */
/*02a0*/ @!P2 BRA 0x3a0 ; /* 0x000000f00000a947 */
/* 0x000fea0003800000 */
/*02b0*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x0][0x0] ; /* 0x00000000ff057624 */
/* 0x000fca00078e00ff */
/*02c0*/ SHF.R.S32.HI R7, RZ, 0x1, R5 ; /* 0x00000001ff077819 */
/* 0x000fe20000011405 */
/*02d0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fe60000010000 */
/*02e0*/ ISETP.GE.U32.AND P2, PT, R0, R7, PT ; /* 0x000000070000720c */
/* 0x000fda0003f46070 */
/*02f0*/ @!P2 LEA R6, R5.reuse, 0x2, 0x1 ; /* 0x000000020506a811 */
/* 0x040fe400078e08ff */
/*0300*/ IADD3 R5, R5, 0x1, RZ ; /* 0x0000000105057810 */
/* 0x000fe40007ffe0ff */
/*0310*/ @!P2 LOP3.LUT R7, R6, 0xfffffffc, RZ, 0xc0, !PT ; /* 0xfffffffc0607a812 */
/* 0x000fe400078ec0ff */
/*0320*/ SHF.R.S32.HI R5, RZ, 0x1, R5 ; /* 0x00000001ff057819 */
/* 0x000fe20000011405 */
/*0330*/ @!P2 LDS R6, [R0.X4+UR4] ; /* 0x000000040006a984 */
/* 0x000fe40008004800 */
/*0340*/ @!P2 IMAD.IADD R7, R2, 0x1, R7 ; /* 0x000000010207a824 */
/* 0x000fcc00078e0207 */
/*0350*/ @!P2 LDS R7, [R7] ; /* 0x000000000707a984 */
/* 0x000e240000000800 */
/*0360*/ @!P2 FADD R9, R6, R7 ; /* 0x000000070609a221 */
/* 0x001fca0000000000 */
/*0370*/ @!P2 STS [R0.X4+UR4], R9 ; /* 0x000000090000a988 */
/* 0x0001e20008004804 */
/*0380*/ ISETP.NE.AND P2, PT, R5, 0x1, PT ; /* 0x000000010500780c */
/* 0x000fda0003f45270 */
/*0390*/ @P2 BRA 0x2c0 ; /* 0xffffff2000002947 */
/* 0x001fea000383ffff */
/*03a0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*03b0*/ @!P1 BRA 0x600 ; /* 0x0000024000009947 */
/* 0x000fea0003800000 */
/*03c0*/ IMAD.MOV.U32 R5, RZ, RZ, RZ ; /* 0x000000ffff057224 */
/* 0x000fc800078e00ff */
/*03d0*/ IMAD.IADD R8, R0, 0x1, R5 ; /* 0x0000000100087824 */
/* 0x000fe200078e0205 */
/*03e0*/ IADD3 R5, R5, c[0x0][0x0], RZ ; /* 0x0000000005057a10 */
/* 0x000fe20007ffe0ff */
/*03f0*/ BSSY B0, 0x5f0 ; /* 0x000001f000007945 */
/* 0x000fe60003800000 */
/*0400*/ ISETP.GE.AND P2, PT, R8, c[0x0][0x17c], PT ; /* 0x00005f0008007a0c */
/* 0x000fc40003f46270 */
/*0410*/ ISETP.GE.AND P1, PT, R5, c[0x0][0x17c], PT ; /* 0x00005f0005007a0c */
/* 0x000fd60003f26270 */
/*0420*/ @P2 BRA 0x5e0 ; /* 0x000001b000002947 */
/* 0x001fea0003800000 */
/*0430*/ IADD3 R7, P2, R3, R8, RZ ; /* 0x0000000803077210 */
/* 0x000fe20007f5e0ff */
/*0440*/ IMAD.MOV.U32 R19, RZ, RZ, 0x3bbb989d ; /* 0x3bbb989dff137424 */
/* 0x000fe200078e00ff */
/*0450*/ LDS R15, [UR4] ; /* 0x00000004ff0f7984 */
/* 0x000e240008000800 */
/*0460*/ LEA.HI.X.SX32 R8, R8, R4, 0x1, P2 ; /* 0x0000000408087211 */
/* 0x000fe200010f0eff */
/*0470*/ IMAD.SHL.U32 R6, R7, 0x4, RZ ; /* 0x0000000407067824 */
/* 0x000fc600078e00ff */
/*0480*/ SHF.L.U64.HI R7, R7, 0x2, R8 ; /* 0x0000000207077819 */
/* 0x000fe40000010208 */
/*0490*/ IADD3 R8, P2, R6, c[0x0][0x170], RZ ; /* 0x00005c0006087a10 */
/* 0x000fc80007f5e0ff */
/*04a0*/ IADD3.X R9, R7, c[0x0][0x174], RZ, P2, !PT ; /* 0x00005d0007097a10 */
/* 0x000fca00017fe4ff */
/*04b0*/ LDG.E R8, [R8.64] ; /* 0x0000000608087981 */
/* 0x000ea2000c1e1900 */
/*04c0*/ IADD3 R10, P2, R6.reuse, c[0x0][0x168], RZ ; /* 0x00005a00060a7a10 */
/* 0x040fe40007f5e0ff */
/*04d0*/ IADD3 R6, P3, R6, c[0x0][0x160], RZ ; /* 0x0000580006067a10 */
/* 0x000fe40007f7e0ff */
/*04e0*/ IADD3.X R11, R7.reuse, c[0x0][0x16c], RZ, P2, !PT ; /* 0x00005b00070b7a10 */
/* 0x040fe400017fe4ff */
/*04f0*/ IADD3.X R7, R7, c[0x0][0x164], RZ, P3, !PT ; /* 0x0000590007077a10 */
/* 0x000fc60001ffe4ff */
/*0500*/ LDG.E R10, [R10.64] ; /* 0x000000060a0a7981 */
/* 0x000e28000c1e1900 */
/*0510*/ LDG.E R17, [R6.64] ; /* 0x0000000606117981 */
/* 0x000ee2000c1e1900 */
/*0520*/ IMAD.MOV.U32 R21, RZ, RZ, 0x437c0000 ; /* 0x437c0000ff157424 */
/* 0x000fe400078e00ff */
/*0530*/ FFMA.SAT R12, R8, R19, 0.5 ; /* 0x3f000000080c7423 */
/* 0x004fc80000002013 */
/*0540*/ FFMA.RM R12, R12, R21, 12582913 ; /* 0x4b4000010c0c7423 */
/* 0x000fc80000004015 */
/*0550*/ FADD R9, R12.reuse, -12583039 ; /* 0xcb40007f0c097421 */
/* 0x040fe40000000000 */
/*0560*/ IMAD.SHL.U32 R12, R12, 0x800000, RZ ; /* 0x008000000c0c7824 */
/* 0x000fe400078e00ff */
/*0570*/ FFMA R9, R8, 1.4426950216293334961, -R9 ; /* 0x3fb8aa3b08097823 */
/* 0x000fc80000000809 */
/*0580*/ FFMA R9, R8, 1.925963033500011079e-08, R9 ; /* 0x32a5706008097823 */
/* 0x000fcc0000000009 */
/*0590*/ MUFU.EX2 R9, R9 ; /* 0x0000000900097308 */
/* 0x000e640000000800 */
/*05a0*/ FMUL R12, R12, R9 ; /* 0x000000090c0c7220 */
/* 0x002fc80000400000 */
/*05b0*/ FFMA R10, -R12, R15, R10 ; /* 0x0000000f0c0a7223 */
/* 0x001fc8000000010a */
/*05c0*/ FADD R17, R10, R17 ; /* 0x000000110a117221 */
/* 0x008fca0000000000 */
/*05d0*/ STG.E [R6.64], R17 ; /* 0x0000001106007986 */
/* 0x0001e4000c101906 */
/*05e0*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*05f0*/ @!P1 BRA 0x3d0 ; /* 0xfffffdd000009947 */
/* 0x000fea000383ffff */
/*0600*/ @!P0 BRA 0xb0 ; /* 0xfffffaa000008947 */
/* 0x000fea000383ffff */
/*0610*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0620*/ BRA 0x620; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0630*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0640*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0650*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0660*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0670*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0680*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0690*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*06f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z15gLogSoftmaxGradPfPKfS1_ii
.globl _Z15gLogSoftmaxGradPfPKfS1_ii
.p2align 8
.type _Z15gLogSoftmaxGradPfPKfS1_ii,@function
_Z15gLogSoftmaxGradPfPKfS1_ii:
s_load_b32 s12, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s12, 1
s_cbranch_scc1 .LBB0_19
s_clause 0x2
s_load_b64 s[2:3], s[0:1], 0x1c
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[8:9], s[0:1], 0x10
s_add_u32 s0, s0, 32
s_addc_u32 s1, s1, 0
v_mov_b32_e32 v3, 0
s_mov_b32 s14, 0
s_waitcnt lgkmcnt(0)
s_cmp_gt_i32 s2, 0
s_cselect_b32 s13, -1, 0
s_branch .LBB0_3
.LBB0_2:
s_add_i32 s14, s3, s14
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_ge_i32 s14, s12
s_cbranch_scc1 .LBB0_19
.LBB0_3:
s_add_i32 s10, s14, s15
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_ge_i32 s10, s12
s_cbranch_scc1 .LBB0_2
s_load_b32 s11, s[0:1], 0xc
s_mul_i32 s10, s10, s2
s_waitcnt lgkmcnt(0)
s_and_b32 s16, s11, 0xffff
s_ashr_i32 s11, s10, 31
s_lshl_b32 s17, s16, 2
s_lshl_b64 s[10:11], s[10:11], 2
s_add_i32 s17, s17, 0
s_add_u32 s18, s6, s10
v_lshl_add_u32 v4, v0, 2, s17
s_addc_u32 s19, s7, s11
s_and_not1_b32 vcc_lo, exec_lo, s13
ds_store_b32 v4, v3
s_cbranch_vccnz .LBB0_9
s_mov_b32 s20, 0
s_branch .LBB0_7
.p2align 6
.LBB0_6:
s_or_b32 exec_lo, exec_lo, s21
s_add_i32 s20, s20, s16
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_ge_i32 s20, s2
s_cbranch_scc1 .LBB0_9
.LBB0_7:
v_add_nc_u32_e32 v1, s20, v0
s_mov_b32 s21, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s2, v1
s_cbranch_execz .LBB0_6
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[1:2]
v_add_co_u32 v1, vcc_lo, s18, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, s19, v2, vcc_lo
global_load_b32 v1, v[1:2], off
ds_load_b32 v2, v4
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_f32_e32 v1, v1, v2
ds_store_b32 v4, v1
s_branch .LBB0_6
.LBB0_9:
s_cmp_eq_u32 s16, 1
s_waitcnt lgkmcnt(0)
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB0_14
s_mov_b32 s20, s16
s_branch .LBB0_12
.p2align 6
.LBB0_11:
s_or_b32 exec_lo, exec_lo, s21
s_cmp_lg_u32 s20, 1
s_cbranch_scc0 .LBB0_14
.LBB0_12:
s_lshr_b32 s21, s20, 1
s_add_i32 s20, s20, 1
v_cmp_gt_u32_e32 vcc_lo, s21, v0
s_lshr_b32 s20, s20, 1
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_and_saveexec_b32 s21, vcc_lo
s_cbranch_execz .LBB0_11
v_lshl_add_u32 v1, s20, 2, v4
ds_load_b32 v1, v1
ds_load_b32 v2, v4
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v1, v1, v2
ds_store_b32 v4, v1
s_branch .LBB0_11
.LBB0_14:
s_and_not1_b32 vcc_lo, exec_lo, s13
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_vccnz .LBB0_2
s_add_u32 s20, s4, s10
s_addc_u32 s21, s5, s11
s_add_u32 s10, s8, s10
s_addc_u32 s11, s9, s11
s_mov_b32 s22, 0
s_branch .LBB0_17
.LBB0_16:
s_or_b32 exec_lo, exec_lo, s23
s_add_i32 s22, s22, s16
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_lt_i32 s22, s2
s_cbranch_scc0 .LBB0_2
.LBB0_17:
v_add_nc_u32_e32 v1, s22, v0
s_mov_b32 s23, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s2, v1
s_cbranch_execz .LBB0_16
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[1:2]
v_add_co_u32 v4, vcc_lo, s10, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s11, v2, vcc_lo
global_load_b32 v6, v[4:5], off
v_add_co_u32 v4, vcc_lo, s18, v1
v_add_co_ci_u32_e32 v5, vcc_lo, s19, v2, vcc_lo
v_add_co_u32 v1, vcc_lo, s20, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s21, v2, vcc_lo
global_load_b32 v4, v[4:5], off
global_load_b32 v5, v[1:2], off
s_waitcnt vmcnt(2)
v_mul_f32_e32 v7, 0x3fb8aa3b, v6
v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fma_f32 v8, v6, 0x3fb8aa3b, -v7
v_rndne_f32_e32 v9, v7
v_dual_fmac_f32 v8, 0x32a5705f, v6 :: v_dual_sub_f32 v7, v7, v9
v_cvt_i32_f32_e32 v9, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_add_f32 v7, v7, v8 :: v_dual_mov_b32 v8, s17
v_exp_f32_e32 v7, v7
ds_load_b32 v8, v8
v_ldexp_f32 v7, v7, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v7, 0, v7, vcc_lo
v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v6
v_cndmask_b32_e32 v6, 0x7f800000, v7, vcc_lo
s_waitcnt vmcnt(1) lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_fma_f32 v4, -v6, v8, v4
s_waitcnt vmcnt(0)
v_add_f32_e32 v4, v5, v4
global_store_b32 v[1:2], v4, off
s_branch .LBB0_16
.LBB0_19:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z15gLogSoftmaxGradPfPKfS1_ii
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 10
.amdhsa_next_free_sgpr 24
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z15gLogSoftmaxGradPfPKfS1_ii, .Lfunc_end0-_Z15gLogSoftmaxGradPfPKfS1_ii
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 28
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
- .offset: 152
.size: 4
.value_kind: hidden_dynamic_lds_size
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z15gLogSoftmaxGradPfPKfS1_ii
.private_segment_fixed_size: 0
.sgpr_count: 26
.sgpr_spill_count: 0
.symbol: _Z15gLogSoftmaxGradPfPKfS1_ii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 10
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0012e87e_00000000-6_gLogSoftmaxGrad.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z43__device_stub__Z15gLogSoftmaxGradPfPKfS1_iiPfPKfS1_ii
.type _Z43__device_stub__Z15gLogSoftmaxGradPfPKfS1_iiPfPKfS1_ii, @function
_Z43__device_stub__Z15gLogSoftmaxGradPfPKfS1_iiPfPKfS1_ii:
.LFB2051:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movl %r8d, (%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movq %rsp, %rax
movq %rax, 128(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z15gLogSoftmaxGradPfPKfS1_ii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z43__device_stub__Z15gLogSoftmaxGradPfPKfS1_iiPfPKfS1_ii, .-_Z43__device_stub__Z15gLogSoftmaxGradPfPKfS1_iiPfPKfS1_ii
.globl _Z15gLogSoftmaxGradPfPKfS1_ii
.type _Z15gLogSoftmaxGradPfPKfS1_ii, @function
_Z15gLogSoftmaxGradPfPKfS1_ii:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z43__device_stub__Z15gLogSoftmaxGradPfPKfS1_iiPfPKfS1_ii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z15gLogSoftmaxGradPfPKfS1_ii, .-_Z15gLogSoftmaxGradPfPKfS1_ii
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z15gLogSoftmaxGradPfPKfS1_ii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z15gLogSoftmaxGradPfPKfS1_ii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "gLogSoftmaxGrad.hip"
.globl _Z30__device_stub__gLogSoftmaxGradPfPKfS1_ii # -- Begin function _Z30__device_stub__gLogSoftmaxGradPfPKfS1_ii
.p2align 4, 0x90
.type _Z30__device_stub__gLogSoftmaxGradPfPKfS1_ii,@function
_Z30__device_stub__gLogSoftmaxGradPfPKfS1_ii: # @_Z30__device_stub__gLogSoftmaxGradPfPKfS1_ii
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
movl %r8d, (%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
movq %rsp, %rax
movq %rax, 112(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z15gLogSoftmaxGradPfPKfS1_ii, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end0:
.size _Z30__device_stub__gLogSoftmaxGradPfPKfS1_ii, .Lfunc_end0-_Z30__device_stub__gLogSoftmaxGradPfPKfS1_ii
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z15gLogSoftmaxGradPfPKfS1_ii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z15gLogSoftmaxGradPfPKfS1_ii,@object # @_Z15gLogSoftmaxGradPfPKfS1_ii
.section .rodata,"a",@progbits
.globl _Z15gLogSoftmaxGradPfPKfS1_ii
.p2align 3, 0x0
_Z15gLogSoftmaxGradPfPKfS1_ii:
.quad _Z30__device_stub__gLogSoftmaxGradPfPKfS1_ii
.size _Z15gLogSoftmaxGradPfPKfS1_ii, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z15gLogSoftmaxGradPfPKfS1_ii"
.size .L__unnamed_1, 30
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z30__device_stub__gLogSoftmaxGradPfPKfS1_ii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z15gLogSoftmaxGradPfPKfS1_ii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
#define INF 2147483647
extern "C" {
}
__global__ void oneReduction(int * tab, int len, int mod) {
__shared__ int begin, end;
__shared__ int tmp_T[1024];
if(threadIdx.x == 0) {
begin = blockIdx.x*len;
end = blockIdx.x*len + len;
}
__syncthreads();
if(blockIdx.x % mod < mod/2) {
for(int k = len/2; k >= 1024; k /= 2) {
for(int g = begin; g < end; g += 2*k) {
for(int j = g; j < g + k; j += 512) {
__syncthreads();
if(threadIdx.x < 512)
tmp_T[threadIdx.x] = tab[j + threadIdx.x];
else
tmp_T[threadIdx.x] = tab[j + threadIdx.x - 512 + k];
__syncthreads();
if(threadIdx.x < 512 && tmp_T[threadIdx.x] > tmp_T[threadIdx.x + 512]) {
tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
tmp_T[threadIdx.x + 512] ^= tmp_T[threadIdx.x];
tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
}
__syncthreads();
if(threadIdx.x < 512)
tab[j + threadIdx.x] = tmp_T[threadIdx.x];
else
tab[j + threadIdx.x - 512 + k] = tmp_T[threadIdx.x];
}
}
}
for(int i = begin; i < begin+len; i += 1024) {
__syncthreads();
tmp_T[threadIdx.x] = tab[i + threadIdx.x];
__syncthreads();
for(int jump = 512; jump >= 1; jump /= 2) {
if(threadIdx.x % (jump*2) < jump && threadIdx.x + jump < 1024 && tmp_T[threadIdx.x] > tmp_T[threadIdx.x + jump]) {
tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
tmp_T[threadIdx.x + jump] ^= tmp_T[threadIdx.x];
tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
}
__syncthreads();
}
tab[i + threadIdx.x] = tmp_T[threadIdx.x];
}
} else {
for(int k = len/2; k >= 1024; k /= 2) {
for(int g = begin; g < end; g += 2*k) {
for(int j = g; j < g + k; j += 512) {
__syncthreads();
if(threadIdx.x < 512)
tmp_T[threadIdx.x] = tab[j + threadIdx.x];
else
tmp_T[threadIdx.x] = tab[j + threadIdx.x - 512 + k];
__syncthreads();
if(threadIdx.x < 512 && tmp_T[threadIdx.x] < tmp_T[threadIdx.x + 512]) {
tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
tmp_T[threadIdx.x + 512] ^= tmp_T[threadIdx.x];
tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
}
__syncthreads();
if(threadIdx.x < 512)
tab[j + threadIdx.x] = tmp_T[threadIdx.x];
else
tab[j + threadIdx.x - 512 + k] = tmp_T[threadIdx.x];
}
}
}
for(int i = begin; i < begin + len; i += 1024) {
__syncthreads();
tmp_T[threadIdx.x] = tab[i + threadIdx.x];
__syncthreads();
for(int jump = 512; jump >= 1; jump /= 2) {
if(threadIdx.x % (jump*2) < jump && threadIdx.x + jump < 1024 && tmp_T[threadIdx.x] < tmp_T[threadIdx.x + jump]) {
tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
tmp_T[threadIdx.x + jump] ^= tmp_T[threadIdx.x];
tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
}
__syncthreads();
}
tab[i + threadIdx.x] = tmp_T[threadIdx.x];
}
}
} | .file "tmpxft_00002763_00000000-6_oneReduction.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z34__device_stub__Z12oneReductionPiiiPiii
.type _Z34__device_stub__Z12oneReductionPiiiPiii, @function
_Z34__device_stub__Z12oneReductionPiiiPiii:
.LFB2051:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movl %esi, 4(%rsp)
movl %edx, (%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
leaq 4(%rsp), %rax
movq %rax, 88(%rsp)
movq %rsp, %rax
movq %rax, 96(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z12oneReductionPiii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z34__device_stub__Z12oneReductionPiiiPiii, .-_Z34__device_stub__Z12oneReductionPiiiPiii
.globl _Z12oneReductionPiii
.type _Z12oneReductionPiii, @function
_Z12oneReductionPiii:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z34__device_stub__Z12oneReductionPiiiPiii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z12oneReductionPiii, .-_Z12oneReductionPiii
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z12oneReductionPiii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z12oneReductionPiii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
#define INF 2147483647
extern "C" {
}
__global__ void oneReduction(int * tab, int len, int mod) {
__shared__ int begin, end;
__shared__ int tmp_T[1024];
if(threadIdx.x == 0) {
begin = blockIdx.x*len;
end = blockIdx.x*len + len;
}
__syncthreads();
if(blockIdx.x % mod < mod/2) {
for(int k = len/2; k >= 1024; k /= 2) {
for(int g = begin; g < end; g += 2*k) {
for(int j = g; j < g + k; j += 512) {
__syncthreads();
if(threadIdx.x < 512)
tmp_T[threadIdx.x] = tab[j + threadIdx.x];
else
tmp_T[threadIdx.x] = tab[j + threadIdx.x - 512 + k];
__syncthreads();
if(threadIdx.x < 512 && tmp_T[threadIdx.x] > tmp_T[threadIdx.x + 512]) {
tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
tmp_T[threadIdx.x + 512] ^= tmp_T[threadIdx.x];
tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
}
__syncthreads();
if(threadIdx.x < 512)
tab[j + threadIdx.x] = tmp_T[threadIdx.x];
else
tab[j + threadIdx.x - 512 + k] = tmp_T[threadIdx.x];
}
}
}
for(int i = begin; i < begin+len; i += 1024) {
__syncthreads();
tmp_T[threadIdx.x] = tab[i + threadIdx.x];
__syncthreads();
for(int jump = 512; jump >= 1; jump /= 2) {
if(threadIdx.x % (jump*2) < jump && threadIdx.x + jump < 1024 && tmp_T[threadIdx.x] > tmp_T[threadIdx.x + jump]) {
tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
tmp_T[threadIdx.x + jump] ^= tmp_T[threadIdx.x];
tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
}
__syncthreads();
}
tab[i + threadIdx.x] = tmp_T[threadIdx.x];
}
} else {
for(int k = len/2; k >= 1024; k /= 2) {
for(int g = begin; g < end; g += 2*k) {
for(int j = g; j < g + k; j += 512) {
__syncthreads();
if(threadIdx.x < 512)
tmp_T[threadIdx.x] = tab[j + threadIdx.x];
else
tmp_T[threadIdx.x] = tab[j + threadIdx.x - 512 + k];
__syncthreads();
if(threadIdx.x < 512 && tmp_T[threadIdx.x] < tmp_T[threadIdx.x + 512]) {
tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
tmp_T[threadIdx.x + 512] ^= tmp_T[threadIdx.x];
tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
}
__syncthreads();
if(threadIdx.x < 512)
tab[j + threadIdx.x] = tmp_T[threadIdx.x];
else
tab[j + threadIdx.x - 512 + k] = tmp_T[threadIdx.x];
}
}
}
for(int i = begin; i < begin + len; i += 1024) {
__syncthreads();
tmp_T[threadIdx.x] = tab[i + threadIdx.x];
__syncthreads();
for(int jump = 512; jump >= 1; jump /= 2) {
if(threadIdx.x % (jump*2) < jump && threadIdx.x + jump < 1024 && tmp_T[threadIdx.x] < tmp_T[threadIdx.x + jump]) {
tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
tmp_T[threadIdx.x + jump] ^= tmp_T[threadIdx.x];
tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
}
__syncthreads();
}
tab[i + threadIdx.x] = tmp_T[threadIdx.x];
}
}
} | #include <hip/hip_runtime.h>
#include "includes.h"
#define INF 2147483647
extern "C" {
}
__global__ void oneReduction(int * tab, int len, int mod) {
__shared__ int begin, end;
__shared__ int tmp_T[1024];
if(threadIdx.x == 0) {
begin = blockIdx.x*len;
end = blockIdx.x*len + len;
}
__syncthreads();
if(blockIdx.x % mod < mod/2) {
for(int k = len/2; k >= 1024; k /= 2) {
for(int g = begin; g < end; g += 2*k) {
for(int j = g; j < g + k; j += 512) {
__syncthreads();
if(threadIdx.x < 512)
tmp_T[threadIdx.x] = tab[j + threadIdx.x];
else
tmp_T[threadIdx.x] = tab[j + threadIdx.x - 512 + k];
__syncthreads();
if(threadIdx.x < 512 && tmp_T[threadIdx.x] > tmp_T[threadIdx.x + 512]) {
tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
tmp_T[threadIdx.x + 512] ^= tmp_T[threadIdx.x];
tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
}
__syncthreads();
if(threadIdx.x < 512)
tab[j + threadIdx.x] = tmp_T[threadIdx.x];
else
tab[j + threadIdx.x - 512 + k] = tmp_T[threadIdx.x];
}
}
}
for(int i = begin; i < begin+len; i += 1024) {
__syncthreads();
tmp_T[threadIdx.x] = tab[i + threadIdx.x];
__syncthreads();
for(int jump = 512; jump >= 1; jump /= 2) {
if(threadIdx.x % (jump*2) < jump && threadIdx.x + jump < 1024 && tmp_T[threadIdx.x] > tmp_T[threadIdx.x + jump]) {
tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
tmp_T[threadIdx.x + jump] ^= tmp_T[threadIdx.x];
tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
}
__syncthreads();
}
tab[i + threadIdx.x] = tmp_T[threadIdx.x];
}
} else {
for(int k = len/2; k >= 1024; k /= 2) {
for(int g = begin; g < end; g += 2*k) {
for(int j = g; j < g + k; j += 512) {
__syncthreads();
if(threadIdx.x < 512)
tmp_T[threadIdx.x] = tab[j + threadIdx.x];
else
tmp_T[threadIdx.x] = tab[j + threadIdx.x - 512 + k];
__syncthreads();
if(threadIdx.x < 512 && tmp_T[threadIdx.x] < tmp_T[threadIdx.x + 512]) {
tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
tmp_T[threadIdx.x + 512] ^= tmp_T[threadIdx.x];
tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
}
__syncthreads();
if(threadIdx.x < 512)
tab[j + threadIdx.x] = tmp_T[threadIdx.x];
else
tab[j + threadIdx.x - 512 + k] = tmp_T[threadIdx.x];
}
}
}
for(int i = begin; i < begin + len; i += 1024) {
__syncthreads();
tmp_T[threadIdx.x] = tab[i + threadIdx.x];
__syncthreads();
for(int jump = 512; jump >= 1; jump /= 2) {
if(threadIdx.x % (jump*2) < jump && threadIdx.x + jump < 1024 && tmp_T[threadIdx.x] < tmp_T[threadIdx.x + jump]) {
tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
tmp_T[threadIdx.x + jump] ^= tmp_T[threadIdx.x];
tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
}
__syncthreads();
}
tab[i + threadIdx.x] = tmp_T[threadIdx.x];
}
}
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
#define INF 2147483647
extern "C" {
}
__global__ void oneReduction(int * tab, int len, int mod) {
__shared__ int begin, end;
__shared__ int tmp_T[1024];
if(threadIdx.x == 0) {
begin = blockIdx.x*len;
end = blockIdx.x*len + len;
}
__syncthreads();
if(blockIdx.x % mod < mod/2) {
for(int k = len/2; k >= 1024; k /= 2) {
for(int g = begin; g < end; g += 2*k) {
for(int j = g; j < g + k; j += 512) {
__syncthreads();
if(threadIdx.x < 512)
tmp_T[threadIdx.x] = tab[j + threadIdx.x];
else
tmp_T[threadIdx.x] = tab[j + threadIdx.x - 512 + k];
__syncthreads();
if(threadIdx.x < 512 && tmp_T[threadIdx.x] > tmp_T[threadIdx.x + 512]) {
tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
tmp_T[threadIdx.x + 512] ^= tmp_T[threadIdx.x];
tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
}
__syncthreads();
if(threadIdx.x < 512)
tab[j + threadIdx.x] = tmp_T[threadIdx.x];
else
tab[j + threadIdx.x - 512 + k] = tmp_T[threadIdx.x];
}
}
}
for(int i = begin; i < begin+len; i += 1024) {
__syncthreads();
tmp_T[threadIdx.x] = tab[i + threadIdx.x];
__syncthreads();
for(int jump = 512; jump >= 1; jump /= 2) {
if(threadIdx.x % (jump*2) < jump && threadIdx.x + jump < 1024 && tmp_T[threadIdx.x] > tmp_T[threadIdx.x + jump]) {
tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
tmp_T[threadIdx.x + jump] ^= tmp_T[threadIdx.x];
tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
}
__syncthreads();
}
tab[i + threadIdx.x] = tmp_T[threadIdx.x];
}
} else {
for(int k = len/2; k >= 1024; k /= 2) {
for(int g = begin; g < end; g += 2*k) {
for(int j = g; j < g + k; j += 512) {
__syncthreads();
if(threadIdx.x < 512)
tmp_T[threadIdx.x] = tab[j + threadIdx.x];
else
tmp_T[threadIdx.x] = tab[j + threadIdx.x - 512 + k];
__syncthreads();
if(threadIdx.x < 512 && tmp_T[threadIdx.x] < tmp_T[threadIdx.x + 512]) {
tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
tmp_T[threadIdx.x + 512] ^= tmp_T[threadIdx.x];
tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
}
__syncthreads();
if(threadIdx.x < 512)
tab[j + threadIdx.x] = tmp_T[threadIdx.x];
else
tab[j + threadIdx.x - 512 + k] = tmp_T[threadIdx.x];
}
}
}
for(int i = begin; i < begin + len; i += 1024) {
__syncthreads();
tmp_T[threadIdx.x] = tab[i + threadIdx.x];
__syncthreads();
for(int jump = 512; jump >= 1; jump /= 2) {
if(threadIdx.x % (jump*2) < jump && threadIdx.x + jump < 1024 && tmp_T[threadIdx.x] < tmp_T[threadIdx.x + jump]) {
tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
tmp_T[threadIdx.x + jump] ^= tmp_T[threadIdx.x];
tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
}
__syncthreads();
}
tab[i + threadIdx.x] = tmp_T[threadIdx.x];
}
}
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12oneReductionPiii
.globl _Z12oneReductionPiii
.p2align 8
.type _Z12oneReductionPiii,@function
_Z12oneReductionPiii:
s_load_b32 s4, s[0:1], 0x8
s_mov_b32 s2, exec_lo
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB0_2
s_waitcnt lgkmcnt(0)
s_mul_i32 s3, s15, s4
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v2, s3
s_add_i32 s5, s15, 1
s_mul_i32 s3, s5, s4
s_movk_i32 s5, 0x1000
v_mov_b32_e32 v3, s3
v_add_nc_u32_e32 v1, s5, v1
ds_store_2addr_b32 v1, v3, v2 offset1:1
.LBB0_2:
s_or_b32 exec_lo, exec_lo, s2
s_load_b32 s5, s[0:1], 0xc
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_cvt_f32_u32_e32 v1, s5
s_sub_i32 s3, 0, s5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v1, v1
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v1, 0x4f7ffffe, v1
v_cvt_u32_f32_e32 v1, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_readfirstlane_b32 s2, v1
s_mul_i32 s3, s3, s2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_mul_hi_u32 s3, s2, s3
s_add_i32 s2, s2, s3
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_mul_hi_u32 s2, s15, s2
s_mul_i32 s2, s2, s5
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
s_sub_i32 s6, s15, s2
s_load_b64 s[2:3], s[0:1], 0x0
s_sub_i32 s7, s6, s5
s_cmp_ge_u32 s6, s5
s_cselect_b32 s0, s7, s6
s_sub_i32 s1, s0, s5
s_cmp_ge_u32 s0, s5
s_cselect_b32 s0, s1, s0
s_lshr_b32 s1, s5, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_add_i32 s5, s5, s1
s_ashr_i32 s5, s5, 1
s_cmpk_gt_i32 s4, 0x7ff
s_cselect_b32 s1, -1, 0
s_cmp_ge_u32 s0, s5
s_mov_b32 s0, -1
s_cbranch_scc0 .LBB0_25
s_and_not1_b32 vcc_lo, exec_lo, s1
s_cbranch_vccnz .LBB0_15
v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v3, 2, v0
v_cmp_gt_u32_e64 s0, 0x200, v0
v_add_nc_u32_e32 v4, 0xfffffe00, v0
s_mov_b32 s5, s4
s_delay_alu instid0(VALU_DEP_3)
v_add_nc_u32_e32 v5, 0x800, v3
s_branch .LBB0_6
.LBB0_5:
s_cmpk_lt_u32 s5, 0x1000
s_mov_b32 s5, s6
s_cbranch_scc1 .LBB0_15
.LBB0_6:
s_movk_i32 s6, 0x1000
s_delay_alu instid0(SALU_CYCLE_1)
v_add_nc_u32_e32 v1, s6, v2
s_lshr_b32 s6, s5, 1
ds_load_2addr_b32 v[6:7], v1 offset1:1
s_waitcnt lgkmcnt(0)
v_cmp_ge_i32_e32 vcc_lo, v7, v6
v_readfirstlane_b32 s7, v7
s_cbranch_vccnz .LBB0_5
v_add_nc_u32_e32 v1, s6, v4
s_and_b32 s8, s5, 0x7ffffffe
v_add_nc_u32_e32 v6, s6, v0
s_cmp_gt_u32 s5, 1
s_cselect_b32 s9, -1, 0
v_cndmask_b32_e64 v7, v1, v0, s0
s_branch .LBB0_9
.LBB0_8:
s_set_inst_prefetch_distance 0x2
ds_load_b32 v1, v2 offset:4096
s_add_i32 s7, s7, s8
s_waitcnt lgkmcnt(0)
v_cmp_ge_i32_e32 vcc_lo, s7, v1
s_cbranch_vccnz .LBB0_5
.LBB0_9:
s_and_not1_b32 vcc_lo, exec_lo, s9
s_cbranch_vccnz .LBB0_8
s_add_i32 s10, s7, s6
s_mov_b32 s11, s7
s_set_inst_prefetch_distance 0x1
s_branch .LBB0_12
.p2align 6
.LBB0_11:
s_or_b32 exec_lo, exec_lo, s12
v_add_nc_u32_e32 v1, s11, v0
v_add3_u32 v8, v6, s11, 0xfffffe00
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
ds_load_b32 v10, v3
v_cndmask_b32_e64 v1, v8, v1, s0
s_addk_i32 s11, 0x200
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_cmp_ge_i32 s11, s10
v_lshlrev_b64 v[8:9], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v8, vcc_lo, s2, v8
v_add_co_ci_u32_e32 v9, vcc_lo, s3, v9, vcc_lo
s_waitcnt lgkmcnt(0)
global_store_b32 v[8:9], v10, off
s_cbranch_scc1 .LBB0_8
.LBB0_12:
v_add_nc_u32_e32 v1, s11, v7
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
v_lshlrev_b64 v[8:9], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v8, vcc_lo, s2, v8
v_add_co_ci_u32_e32 v9, vcc_lo, s3, v9, vcc_lo
global_load_b32 v1, v[8:9], off
s_waitcnt vmcnt(0)
ds_store_b32 v3, v1
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_and_saveexec_b32 s12, s0
s_cbranch_execz .LBB0_11
ds_load_b32 v1, v3
ds_load_b32 v8, v5
s_waitcnt lgkmcnt(0)
v_cmp_lt_i32_e32 vcc_lo, v1, v8
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_11
ds_store_b32 v5, v1
ds_store_b32 v3, v8
s_branch .LBB0_11
.LBB0_15:
s_cmp_lt_i32 s4, 1
s_cbranch_scc1 .LBB0_24
v_mov_b32_e32 v2, 0
v_lshlrev_b32_e32 v6, 2, v0
ds_load_b32 v5, v2 offset:4100
s_branch .LBB0_18
.LBB0_17:
s_set_inst_prefetch_distance 0x2
ds_load_b32 v1, v2 offset:4100
ds_load_b32 v7, v6
v_add_nc_u32_e32 v5, 0x400, v5
s_waitcnt lgkmcnt(1)
v_add_nc_u32_e32 v1, s4, v1
s_waitcnt lgkmcnt(0)
global_store_b32 v[3:4], v7, off
v_cmp_ge_i32_e32 vcc_lo, v5, v1
s_cbranch_vccnz .LBB0_24
.LBB0_18:
s_waitcnt lgkmcnt(0)
v_add_nc_u32_e32 v1, v5, v0
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_movk_i32 s0, 0x200
v_lshlrev_b64 v[3:4], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v3, vcc_lo, s2, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
global_load_b32 v1, v[3:4], off
s_waitcnt vmcnt(0)
ds_store_b32 v6, v1
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_set_inst_prefetch_distance 0x1
s_branch .LBB0_20
.p2align 6
.LBB0_19:
s_or_b32 exec_lo, exec_lo, s5
s_lshr_b32 s5, s0, 1
s_cmp_lt_u32 s0, 2
s_mov_b32 s0, s5
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB0_17
.LBB0_20:
s_lshl_b32 s5, s0, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_add_i32 s5, s5, -1
v_and_b32_e32 v1, s5, v0
s_mov_b32 s5, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_u32_e64 s0, v1
s_cbranch_execz .LBB0_19
v_add_nc_u32_e32 v1, s0, v0
s_delay_alu instid0(VALU_DEP_1)
v_cmp_gt_u32_e32 vcc_lo, 0x400, v1
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_19
v_lshlrev_b32_e32 v1, 2, v1
ds_load_b32 v7, v6
ds_load_b32 v8, v1
s_waitcnt lgkmcnt(0)
v_cmp_lt_i32_e32 vcc_lo, v7, v8
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_19
v_xor_b32_e32 v9, v8, v7
ds_store_b32 v6, v9
ds_store_b32 v1, v7
ds_store_b32 v6, v8
s_branch .LBB0_19
.LBB0_24:
s_mov_b32 s0, 0
.LBB0_25:
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 vcc_lo, exec_lo, s0
s_cbranch_vccz .LBB0_47
s_and_not1_b32 vcc_lo, exec_lo, s1
s_cbranch_vccnz .LBB0_38
v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v3, 2, v0
v_cmp_gt_u32_e64 s0, 0x200, v0
v_add_nc_u32_e32 v4, 0xfffffe00, v0
s_mov_b32 s1, s4
s_delay_alu instid0(VALU_DEP_3)
v_add_nc_u32_e32 v5, 0x800, v3
s_branch .LBB0_29
.LBB0_28:
s_cmpk_lt_u32 s1, 0x1000
s_mov_b32 s1, s5
s_cbranch_scc1 .LBB0_38
.LBB0_29:
s_movk_i32 s5, 0x1000
s_delay_alu instid0(SALU_CYCLE_1)
v_add_nc_u32_e32 v1, s5, v2
s_lshr_b32 s5, s1, 1
ds_load_2addr_b32 v[6:7], v1 offset1:1
s_waitcnt lgkmcnt(0)
v_cmp_ge_i32_e32 vcc_lo, v7, v6
v_readfirstlane_b32 s6, v7
s_cbranch_vccnz .LBB0_28
v_add_nc_u32_e32 v1, s5, v4
s_and_b32 s7, s1, 0x7ffffffe
v_add_nc_u32_e32 v6, s5, v0
s_cmp_gt_u32 s1, 1
s_cselect_b32 s8, -1, 0
v_cndmask_b32_e64 v7, v1, v0, s0
s_branch .LBB0_32
.LBB0_31:
s_set_inst_prefetch_distance 0x2
ds_load_b32 v1, v2 offset:4096
s_add_i32 s6, s6, s7
s_waitcnt lgkmcnt(0)
v_cmp_ge_i32_e32 vcc_lo, s6, v1
s_cbranch_vccnz .LBB0_28
.LBB0_32:
s_and_not1_b32 vcc_lo, exec_lo, s8
s_cbranch_vccnz .LBB0_31
s_add_i32 s9, s6, s5
s_mov_b32 s10, s6
s_set_inst_prefetch_distance 0x1
s_branch .LBB0_35
.p2align 6
.LBB0_34:
s_or_b32 exec_lo, exec_lo, s11
v_add_nc_u32_e32 v1, s10, v0
v_add3_u32 v8, v6, s10, 0xfffffe00
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
ds_load_b32 v10, v3
v_cndmask_b32_e64 v1, v8, v1, s0
s_addk_i32 s10, 0x200
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_cmp_ge_i32 s10, s9
v_lshlrev_b64 v[8:9], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v8, vcc_lo, s2, v8
v_add_co_ci_u32_e32 v9, vcc_lo, s3, v9, vcc_lo
s_waitcnt lgkmcnt(0)
global_store_b32 v[8:9], v10, off
s_cbranch_scc1 .LBB0_31
.LBB0_35:
v_add_nc_u32_e32 v1, s10, v7
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
v_lshlrev_b64 v[8:9], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v8, vcc_lo, s2, v8
v_add_co_ci_u32_e32 v9, vcc_lo, s3, v9, vcc_lo
global_load_b32 v1, v[8:9], off
s_waitcnt vmcnt(0)
ds_store_b32 v3, v1
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_and_saveexec_b32 s11, s0
s_cbranch_execz .LBB0_34
ds_load_b32 v1, v3
ds_load_b32 v8, v5
s_waitcnt lgkmcnt(0)
v_cmp_gt_i32_e32 vcc_lo, v1, v8
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_34
ds_store_b32 v5, v1
ds_store_b32 v3, v8
s_branch .LBB0_34
.LBB0_38:
s_cmp_lt_i32 s4, 1
s_cbranch_scc1 .LBB0_47
v_mov_b32_e32 v2, 0
v_lshlrev_b32_e32 v6, 2, v0
ds_load_b32 v5, v2 offset:4100
s_branch .LBB0_41
.LBB0_40:
s_set_inst_prefetch_distance 0x2
ds_load_b32 v1, v2 offset:4100
ds_load_b32 v7, v6
v_add_nc_u32_e32 v5, 0x400, v5
s_waitcnt lgkmcnt(1)
v_add_nc_u32_e32 v1, s4, v1
s_waitcnt lgkmcnt(0)
global_store_b32 v[3:4], v7, off
v_cmp_ge_i32_e32 vcc_lo, v5, v1
s_cbranch_vccnz .LBB0_47
.LBB0_41:
s_waitcnt lgkmcnt(0)
v_add_nc_u32_e32 v1, v5, v0
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_movk_i32 s0, 0x200
v_lshlrev_b64 v[3:4], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v3, vcc_lo, s2, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
global_load_b32 v1, v[3:4], off
s_waitcnt vmcnt(0)
ds_store_b32 v6, v1
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_set_inst_prefetch_distance 0x1
s_branch .LBB0_43
.p2align 6
.LBB0_42:
s_or_b32 exec_lo, exec_lo, s1
s_lshr_b32 s1, s0, 1
s_cmp_lt_u32 s0, 2
s_mov_b32 s0, s1
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB0_40
.LBB0_43:
s_lshl_b32 s1, s0, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_add_i32 s1, s1, -1
v_and_b32_e32 v1, s1, v0
s_mov_b32 s1, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_u32_e64 s0, v1
s_cbranch_execz .LBB0_42
v_add_nc_u32_e32 v1, s0, v0
s_delay_alu instid0(VALU_DEP_1)
v_cmp_gt_u32_e32 vcc_lo, 0x400, v1
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_42
v_lshlrev_b32_e32 v1, 2, v1
ds_load_b32 v7, v6
ds_load_b32 v8, v1
s_waitcnt lgkmcnt(0)
v_cmp_gt_i32_e32 vcc_lo, v7, v8
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_42
v_xor_b32_e32 v9, v8, v7
ds_store_b32 v6, v9
ds_store_b32 v1, v7
ds_store_b32 v6, v8
s_branch .LBB0_42
.LBB0_47:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z12oneReductionPiii
.amdhsa_group_segment_fixed_size 4104
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 16
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 11
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z12oneReductionPiii, .Lfunc_end0-_Z12oneReductionPiii
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: by_value
- .offset: 12
.size: 4
.value_kind: by_value
.group_segment_fixed_size: 4104
.kernarg_segment_align: 8
.kernarg_segment_size: 16
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z12oneReductionPiii
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z12oneReductionPiii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 11
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
#define INF 2147483647
extern "C" {
}
__global__ void oneReduction(int * tab, int len, int mod) {
__shared__ int begin, end;
__shared__ int tmp_T[1024];
if(threadIdx.x == 0) {
begin = blockIdx.x*len;
end = blockIdx.x*len + len;
}
__syncthreads();
if(blockIdx.x % mod < mod/2) {
for(int k = len/2; k >= 1024; k /= 2) {
for(int g = begin; g < end; g += 2*k) {
for(int j = g; j < g + k; j += 512) {
__syncthreads();
if(threadIdx.x < 512)
tmp_T[threadIdx.x] = tab[j + threadIdx.x];
else
tmp_T[threadIdx.x] = tab[j + threadIdx.x - 512 + k];
__syncthreads();
if(threadIdx.x < 512 && tmp_T[threadIdx.x] > tmp_T[threadIdx.x + 512]) {
tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
tmp_T[threadIdx.x + 512] ^= tmp_T[threadIdx.x];
tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
}
__syncthreads();
if(threadIdx.x < 512)
tab[j + threadIdx.x] = tmp_T[threadIdx.x];
else
tab[j + threadIdx.x - 512 + k] = tmp_T[threadIdx.x];
}
}
}
for(int i = begin; i < begin+len; i += 1024) {
__syncthreads();
tmp_T[threadIdx.x] = tab[i + threadIdx.x];
__syncthreads();
for(int jump = 512; jump >= 1; jump /= 2) {
if(threadIdx.x % (jump*2) < jump && threadIdx.x + jump < 1024 && tmp_T[threadIdx.x] > tmp_T[threadIdx.x + jump]) {
tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
tmp_T[threadIdx.x + jump] ^= tmp_T[threadIdx.x];
tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
}
__syncthreads();
}
tab[i + threadIdx.x] = tmp_T[threadIdx.x];
}
} else {
for(int k = len/2; k >= 1024; k /= 2) {
for(int g = begin; g < end; g += 2*k) {
for(int j = g; j < g + k; j += 512) {
__syncthreads();
if(threadIdx.x < 512)
tmp_T[threadIdx.x] = tab[j + threadIdx.x];
else
tmp_T[threadIdx.x] = tab[j + threadIdx.x - 512 + k];
__syncthreads();
if(threadIdx.x < 512 && tmp_T[threadIdx.x] < tmp_T[threadIdx.x + 512]) {
tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
tmp_T[threadIdx.x + 512] ^= tmp_T[threadIdx.x];
tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + 512];
}
__syncthreads();
if(threadIdx.x < 512)
tab[j + threadIdx.x] = tmp_T[threadIdx.x];
else
tab[j + threadIdx.x - 512 + k] = tmp_T[threadIdx.x];
}
}
}
for(int i = begin; i < begin + len; i += 1024) {
__syncthreads();
tmp_T[threadIdx.x] = tab[i + threadIdx.x];
__syncthreads();
for(int jump = 512; jump >= 1; jump /= 2) {
if(threadIdx.x % (jump*2) < jump && threadIdx.x + jump < 1024 && tmp_T[threadIdx.x] < tmp_T[threadIdx.x + jump]) {
tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
tmp_T[threadIdx.x + jump] ^= tmp_T[threadIdx.x];
tmp_T[threadIdx.x] ^= tmp_T[threadIdx.x + jump];
}
__syncthreads();
}
tab[i + threadIdx.x] = tmp_T[threadIdx.x];
}
}
} | .text
.file "oneReduction.hip"
.globl _Z27__device_stub__oneReductionPiii # -- Begin function _Z27__device_stub__oneReductionPiii
.p2align 4, 0x90
.type _Z27__device_stub__oneReductionPiii,@function
_Z27__device_stub__oneReductionPiii: # @_Z27__device_stub__oneReductionPiii
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movl %esi, 4(%rsp)
movl %edx, (%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 4(%rsp), %rax
movq %rax, 72(%rsp)
movq %rsp, %rax
movq %rax, 80(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z12oneReductionPiii, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z27__device_stub__oneReductionPiii, .Lfunc_end0-_Z27__device_stub__oneReductionPiii
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z12oneReductionPiii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z12oneReductionPiii,@object # @_Z12oneReductionPiii
.section .rodata,"a",@progbits
.globl _Z12oneReductionPiii
.p2align 3, 0x0
_Z12oneReductionPiii:
.quad _Z27__device_stub__oneReductionPiii
.size _Z12oneReductionPiii, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z12oneReductionPiii"
.size .L__unnamed_1, 21
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z27__device_stub__oneReductionPiii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z12oneReductionPiii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00002763_00000000-6_oneReduction.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z34__device_stub__Z12oneReductionPiiiPiii
.type _Z34__device_stub__Z12oneReductionPiiiPiii, @function
_Z34__device_stub__Z12oneReductionPiiiPiii:
.LFB2051:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movl %esi, 4(%rsp)
movl %edx, (%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
leaq 4(%rsp), %rax
movq %rax, 88(%rsp)
movq %rsp, %rax
movq %rax, 96(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z12oneReductionPiii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z34__device_stub__Z12oneReductionPiiiPiii, .-_Z34__device_stub__Z12oneReductionPiiiPiii
.globl _Z12oneReductionPiii
.type _Z12oneReductionPiii, @function
_Z12oneReductionPiii:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z34__device_stub__Z12oneReductionPiiiPiii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z12oneReductionPiii, .-_Z12oneReductionPiii
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z12oneReductionPiii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z12oneReductionPiii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "oneReduction.hip"
.globl _Z27__device_stub__oneReductionPiii # -- Begin function _Z27__device_stub__oneReductionPiii
.p2align 4, 0x90
.type _Z27__device_stub__oneReductionPiii,@function
_Z27__device_stub__oneReductionPiii: # @_Z27__device_stub__oneReductionPiii
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movl %esi, 4(%rsp)
movl %edx, (%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 4(%rsp), %rax
movq %rax, 72(%rsp)
movq %rsp, %rax
movq %rax, 80(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z12oneReductionPiii, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z27__device_stub__oneReductionPiii, .Lfunc_end0-_Z27__device_stub__oneReductionPiii
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z12oneReductionPiii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z12oneReductionPiii,@object # @_Z12oneReductionPiii
.section .rodata,"a",@progbits
.globl _Z12oneReductionPiii
.p2align 3, 0x0
_Z12oneReductionPiii:
.quad _Z27__device_stub__oneReductionPiii
.size _Z12oneReductionPiii, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z12oneReductionPiii"
.size .L__unnamed_1, 21
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z27__device_stub__oneReductionPiii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z12oneReductionPiii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <stdlib.h>
#include <sys/time.h>
#include <cuda_runtime.h>
#define WIDTH 32
#define ROW_M 256
#define COL_M 256
#define ROW_N 256
#define COL_N 256
#define ROW_MxN ROW_M
#define COL_MxN COL_N
__global__ void MatMulKernel(float *Md, float *Nd, float *Pd, int width);
void MatMul(float *M, float *N, float *P, int width);
void printTwoDimDynamicArray(float *Array, const int col, const int row);
int main(int argc, char *argv[])
{
int i, j, k;
int width = WIDTH;
// Dynamic
float *M = (float *)malloc(ROW_M * COL_M * sizeof(float));
float *N = (float *)malloc(ROW_N * COL_N * sizeof(float));
float *P = (float *)malloc(ROW_MxN * COL_MxN * sizeof(float));
float *MxN = (float *)malloc(ROW_MxN * COL_MxN * sizeof(float));
int pass = 1;
// Initial
for (i = 0; i < ROW_M; ++i) {
for (j = 0; j < COL_M; ++j) {
M[i*COL_M + j] = rand() % 5;
}
}
for (i = 0; i < ROW_N; ++i) {
for (j = 0; j < COL_N; ++j) {
N[i*COL_N + j] = rand() % 5;
}
}
struct timeval starttime, endtime;
gettimeofday(&starttime, NULL);
// CPU
for (i = 0; i < ROW_M; ++i) {
for (j = 0; j < COL_N; ++j) {
for (k = 0; k < COL_M; ++k) {
MxN[i*COL_N + j] += M[i*COL_M + k] * N[k*COL_N + j];
}
}
}
gettimeofday(&endtime, NULL);
double executime;
executime = (endtime.tv_sec - starttime.tv_sec) * 1000.0;
executime += (endtime.tv_usec - starttime.tv_usec) / 1000.0;
printf("CPU time: %13lf msec\n", executime);
/*
printTwoDimDynamicArray(M, COL_M, ROW_M);
printf("============================\n");
printTwoDimDynamicArray(N, COL_N, ROW_N);
printf("============================\n");
printTwoDimDynamicArray(MxN, COL_MxN, ROW_MxN);
*/
// GPU
MatMul((float *)M, (float *)N, (float *)P, width);
// Compare
for(i = 0; i < ROW_MxN; i++) {
for(j = 0; j < COL_MxN; j++) {
if(MxN[i*COL_MxN + j] != P[i*COL_MxN + j]) {
printf("MxN[%d][%d] = %2.0f P[%d][%d] = %2.0f\n", i, j, MxN[i*COL_MxN + j], i, j, P[i*COL_MxN + j]);
pass = 0;
}
}
}
free(M);
free(N);
free(P);
free(MxN);
printf("Test %s\n", (pass)?"PASSED":"FAILED");
return 0;
}
void printTwoDimDynamicArray(float *Array, const int col, const int row) {
int x, y;
for(y = 0; y != row; ++y) {
for(x = 0; x != col; ++x)
printf("%f ", Array[y*col + x]);
printf("\n");
}
}
// Matrix multiplication kernel called by MatMul()
__global__ void MatMulKernel(float *Md, float *Nd, float *Pd, int width){
int row = (blockIdx.y * blockDim.y) + threadIdx.y;
int col = (blockIdx.x * blockDim.x) + threadIdx.x;
float Pvalue = 0;
// Multiply M and N
if(row < ROW_MxN && col < COL_MxN){
for (int k = 0; k < COL_M; ++k) {
float Melement = *(Md + row*COL_M + k);
float Nelement = *(Nd + k*COL_N + col);
Pvalue += Melement * Nelement;
}
*(Pd + row*COL_N + col) = Pvalue;
}
}
// Matrix multiplication - Host code
void MatMul(float *M, float *N, float *P, int width)
{
size_t size_M = ROW_M * COL_M * sizeof(float);
size_t size_N = ROW_N * COL_N * sizeof(float);
size_t size_P = ROW_MxN * COL_MxN * sizeof(float);
float *Md, *Nd, *Pd;
// Allocate and Load M, N to device memory
cudaMalloc((void **)&Md, size_M);
cudaMemcpy(Md, M, size_M, cudaMemcpyHostToDevice);
cudaMalloc((void **)&Nd, size_N);
cudaMemcpy(Nd, N, size_N, cudaMemcpyHostToDevice);
// Allocate P on the device
cudaMalloc((void **)&Pd, size_P);
// Setup the execution configuration
int gridDim_X = (ROW_MxN + 31)/32;
int gridDim_Y = (COL_MxN + 31)/32;
dim3 dimGrid(gridDim_X, gridDim_Y);
dim3 dimBlock(width, width);
printf("============================\n");
// Get start time event
cudaEvent_t start, stop;
cudaEventCreate(&start);
cudaEventCreate(&stop);
cudaEventRecord(start, 0);
// Invoke kernel
MatMulKernel<<<dimGrid, dimBlock>>>(Md, Nd, Pd, width);
cudaError_t cuda_err = cudaGetLastError();
if ( cudaSuccess != cuda_err ){
printf("before kernel call: error = %s\n", cudaGetErrorString (cuda_err));
exit(1) ;
}
// Get stop time event
cudaEventRecord(stop, 0);
cudaEventSynchronize(stop);
// Compute execution time
float elapsedTime;
cudaEventElapsedTime(&elapsedTime, start, stop);
printf("GPU time: %13f msec\n", elapsedTime);
cudaEventDestroy(start);
cudaEventDestroy(stop);
// Read P from device memory
cudaMemcpy(P, Pd, size_P, cudaMemcpyDeviceToHost);
// Free device memory
cudaFree(Md);
cudaFree(Nd);
cudaFree(Pd);
} | code for sm_80
Function : _Z12MatMulKernelPfS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e280000002100 */
/*0030*/ S2R R7, SR_CTAID.Y ; /* 0x0000000000077919 */
/* 0x000e680000002600 */
/*0040*/ S2R R2, SR_TID.Y ; /* 0x0000000000027919 */
/* 0x000e620000002200 */
/*0050*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fca00078e0203 */
/*0060*/ ISETP.GT.AND P0, PT, R0, 0xff, PT ; /* 0x000000ff0000780c */
/* 0x000fe20003f04270 */
/*0070*/ IMAD R7, R7, c[0x0][0x4], R2 ; /* 0x0000010007077a24 */
/* 0x002fca00078e0202 */
/*0080*/ ISETP.GT.OR P0, PT, R7, 0xff, P0 ; /* 0x000000ff0700780c */
/* 0x000fda0000704670 */
/*0090*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*00a0*/ HFMA2.MMA R4, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff047435 */
/* 0x000fe200000001ff */
/*00b0*/ SHF.L.U32 R7, R7, 0x8, RZ ; /* 0x0000000807077819 */
/* 0x000fe200000006ff */
/*00c0*/ HFMA2.MMA R8, -RZ, RZ, 0, 0 ; /* 0x00000000ff087435 */
/* 0x000fe200000001ff */
/*00d0*/ SHF.R.S32.HI R6, RZ, 0x1f, R0 ; /* 0x0000001fff067819 */
/* 0x000fe20000011400 */
/*00e0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*00f0*/ MOV R15, RZ ; /* 0x000000ff000f7202 */
/* 0x000fca0000000f00 */
/*0100*/ IMAD.WIDE R2, R0, R4, c[0x0][0x168] ; /* 0x00005a0000027625 */
/* 0x000fc800078e0204 */
/*0110*/ IMAD.WIDE R4, R7, R4, c[0x0][0x160] ; /* 0x0000580007047625 */
/* 0x000fe200078e0204 */
/*0120*/ IADD3 R10, P0, R2, 0x2000, RZ ; /* 0x00002000020a7810 */
/* 0x000fc80007f1e0ff */
/*0130*/ IADD3 R2, P1, R4, 0x20, RZ ; /* 0x0000002004027810 */
/* 0x000fe40007f3e0ff */
/*0140*/ IADD3.X R11, RZ, R3, RZ, P0, !PT ; /* 0x00000003ff0b7210 */
/* 0x000fc600007fe4ff */
/*0150*/ IMAD.X R3, RZ, RZ, R5, P1 ; /* 0x000000ffff037224 */
/* 0x000fc600008e0605 */
/*0160*/ IMAD.MOV.U32 R4, RZ, RZ, R10 ; /* 0x000000ffff047224 */
/* 0x000fe200078e000a */
/*0170*/ MOV R5, R11 ; /* 0x0000000b00057202 */
/* 0x000fe20000000f00 */
/*0180*/ LDG.E R17, [R2.64+-0x20] ; /* 0xffffe00402117981 */
/* 0x000ea8000c1e1900 */
/*0190*/ LDG.E R16, [R4.64+-0x2000] ; /* 0xffe0000404107981 */
/* 0x000ea8000c1e1900 */
/*01a0*/ LDG.E R18, [R4.64+-0x1c00] ; /* 0xffe4000404127981 */
/* 0x000ee8000c1e1900 */
/*01b0*/ LDG.E R25, [R2.64+-0x1c] ; /* 0xffffe40402197981 */
/* 0x000ee8000c1e1900 */
/*01c0*/ LDG.E R19, [R4.64+-0x1800] ; /* 0xffe8000404137981 */
/* 0x000f28000c1e1900 */
/*01d0*/ LDG.E R20, [R2.64+-0x18] ; /* 0xffffe80402147981 */
/* 0x000f28000c1e1900 */
/*01e0*/ LDG.E R22, [R4.64+-0x1400] ; /* 0xffec000404167981 */
/* 0x000f68000c1e1900 */
/*01f0*/ LDG.E R21, [R2.64+-0x14] ; /* 0xffffec0402157981 */
/* 0x000f68000c1e1900 */
/*0200*/ LDG.E R23, [R4.64+-0x1000] ; /* 0xfff0000404177981 */
/* 0x000f68000c1e1900 */
/*0210*/ LDG.E R24, [R2.64+-0x10] ; /* 0xfffff00402187981 */
/* 0x000f68000c1e1900 */
/*0220*/ LDG.E R9, [R4.64+-0xc00] ; /* 0xfff4000404097981 */
/* 0x000f68000c1e1900 */
/*0230*/ LDG.E R10, [R2.64+-0xc] ; /* 0xfffff404020a7981 */
/* 0x000f68000c1e1900 */
/*0240*/ LDG.E R11, [R4.64+-0x800] ; /* 0xfff80004040b7981 */
/* 0x000f68000c1e1900 */
/*0250*/ LDG.E R12, [R2.64+-0x8] ; /* 0xfffff804020c7981 */
/* 0x000f68000c1e1900 */
/*0260*/ LDG.E R13, [R4.64+-0x400] ; /* 0xfffc0004040d7981 */
/* 0x000f68000c1e1900 */
/*0270*/ LDG.E R14, [R2.64+-0x4] ; /* 0xfffffc04020e7981 */
/* 0x000f62000c1e1900 */
/*0280*/ FFMA R17, R16, R17, R15 ; /* 0x0000001110117223 */
/* 0x004fc6000000000f */
/*0290*/ LDG.E R15, [R4.64] ; /* 0x00000004040f7981 */
/* 0x000ea8000c1e1900 */
/*02a0*/ LDG.E R16, [R2.64] ; /* 0x0000000402107981 */
/* 0x0000a2000c1e1900 */
/*02b0*/ FFMA R25, R18, R25, R17 ; /* 0x0000001912197223 */
/* 0x008fc60000000011 */
/*02c0*/ LDG.E R17, [R4.64+0x400] ; /* 0x0004000404117981 */
/* 0x000ee8000c1e1900 */
/*02d0*/ LDG.E R18, [R2.64+0x4] ; /* 0x0000040402127981 */
/* 0x0000e2000c1e1900 */
/*02e0*/ FFMA R25, R19, R20, R25 ; /* 0x0000001413197223 */
/* 0x010fc60000000019 */
/*02f0*/ LDG.E R19, [R4.64+0x800] ; /* 0x0008000404137981 */
/* 0x000f28000c1e1900 */
/*0300*/ LDG.E R20, [R2.64+0x8] ; /* 0x0000080402147981 */
/* 0x000122000c1e1900 */
/*0310*/ FFMA R25, R22, R21, R25 ; /* 0x0000001516197223 */
/* 0x020fc60000000019 */
/*0320*/ LDG.E R21, [R4.64+0xc00] ; /* 0x000c000404157981 */
/* 0x000f68000c1e1900 */
/*0330*/ LDG.E R22, [R2.64+0xc] ; /* 0x00000c0402167981 */
/* 0x000162000c1e1900 */
/*0340*/ FFMA R25, R23, R24, R25 ; /* 0x0000001817197223 */
/* 0x000fc60000000019 */
/*0350*/ LDG.E R23, [R4.64+0x1000] ; /* 0x0010000404177981 */
/* 0x000f68000c1e1900 */
/*0360*/ LDG.E R24, [R2.64+0x10] ; /* 0x0000100402187981 */
/* 0x000162000c1e1900 */
/*0370*/ FFMA R25, R9, R10, R25 ; /* 0x0000000a09197223 */
/* 0x000fc60000000019 */
/*0380*/ LDG.E R9, [R4.64+0x1400] ; /* 0x0014000404097981 */
/* 0x000f68000c1e1900 */
/*0390*/ LDG.E R10, [R2.64+0x14] ; /* 0x00001404020a7981 */
/* 0x000162000c1e1900 */
/*03a0*/ FFMA R25, R11, R12, R25 ; /* 0x0000000c0b197223 */
/* 0x000fc60000000019 */
/*03b0*/ LDG.E R12, [R4.64+0x1800] ; /* 0x00180004040c7981 */
/* 0x000f68000c1e1900 */
/*03c0*/ LDG.E R11, [R2.64+0x18] ; /* 0x00001804020b7981 */
/* 0x000162000c1e1900 */
/*03d0*/ FFMA R25, R13, R14, R25 ; /* 0x0000000e0d197223 */
/* 0x000fc60000000019 */
/*03e0*/ LDG.E R13, [R4.64+0x1c00] ; /* 0x001c0004040d7981 */
/* 0x000f68000c1e1900 */
/*03f0*/ LDG.E R14, [R2.64+0x1c] ; /* 0x00001c04020e7981 */
/* 0x000162000c1e1900 */
/*0400*/ IADD3 R8, R8, 0x10, RZ ; /* 0x0000001008087810 */
/* 0x000fc80007ffe0ff */
/*0410*/ ISETP.NE.AND P0, PT, R8, 0x100, PT ; /* 0x000001000800780c */
/* 0x000fe40003f05270 */
/*0420*/ IADD3 R2, P2, R2, 0x40, RZ ; /* 0x0000004002027810 */
/* 0x001fc80007f5e0ff */
/*0430*/ IADD3.X R3, RZ, R3, RZ, P2, !PT ; /* 0x00000003ff037210 */
/* 0x000fe200017fe4ff */
/*0440*/ FFMA R15, R15, R16, R25 ; /* 0x000000100f0f7223 */
/* 0x004fc80000000019 */
/*0450*/ FFMA R15, R17, R18, R15 ; /* 0x00000012110f7223 */
/* 0x008fc8000000000f */
/*0460*/ FFMA R15, R19, R20, R15 ; /* 0x00000014130f7223 */
/* 0x010fc8000000000f */
/*0470*/ FFMA R15, R21, R22, R15 ; /* 0x00000016150f7223 */
/* 0x020fc8000000000f */
/*0480*/ FFMA R15, R23, R24, R15 ; /* 0x00000018170f7223 */
/* 0x000fc8000000000f */
/*0490*/ FFMA R9, R9, R10, R15 ; /* 0x0000000a09097223 */
/* 0x000fe2000000000f */
/*04a0*/ IADD3 R10, P1, R4, 0x4000, RZ ; /* 0x00004000040a7810 */
/* 0x000fc60007f3e0ff */
/*04b0*/ FFMA R9, R12, R11, R9 ; /* 0x0000000b0c097223 */
/* 0x000fe20000000009 */
/*04c0*/ IADD3.X R11, RZ, R5, RZ, P1, !PT ; /* 0x00000005ff0b7210 */
/* 0x000fc60000ffe4ff */
/*04d0*/ FFMA R15, R13, R14, R9 ; /* 0x0000000e0d0f7223 */
/* 0x000fe20000000009 */
/*04e0*/ @P0 BRA 0x160 ; /* 0xfffffc7000000947 */
/* 0x000fea000383ffff */
/*04f0*/ IADD3 R0, P0, R0, R7, RZ ; /* 0x0000000700007210 */
/* 0x000fc80007f1e0ff */
/*0500*/ LEA.HI.X.SX32 R7, R7, R6, 0x1, P0 ; /* 0x0000000607077211 */
/* 0x000fe400000f0eff */
/*0510*/ LEA R2, P0, R0, c[0x0][0x170], 0x2 ; /* 0x00005c0000027a11 */
/* 0x000fc800078010ff */
/*0520*/ LEA.HI.X R3, R0, c[0x0][0x174], R7, 0x2, P0 ; /* 0x00005d0000037a11 */
/* 0x000fca00000f1407 */
/*0530*/ STG.E [R2.64], R15 ; /* 0x0000000f02007986 */
/* 0x000fe2000c101904 */
/*0540*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0550*/ BRA 0x550; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0560*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0570*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0580*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0590*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <sys/time.h>
#include <cuda_runtime.h>
#define WIDTH 32
#define ROW_M 256
#define COL_M 256
#define ROW_N 256
#define COL_N 256
#define ROW_MxN ROW_M
#define COL_MxN COL_N
__global__ void MatMulKernel(float *Md, float *Nd, float *Pd, int width);
void MatMul(float *M, float *N, float *P, int width);
void printTwoDimDynamicArray(float *Array, const int col, const int row);
int main(int argc, char *argv[])
{
int i, j, k;
int width = WIDTH;
// Dynamic
float *M = (float *)malloc(ROW_M * COL_M * sizeof(float));
float *N = (float *)malloc(ROW_N * COL_N * sizeof(float));
float *P = (float *)malloc(ROW_MxN * COL_MxN * sizeof(float));
float *MxN = (float *)malloc(ROW_MxN * COL_MxN * sizeof(float));
int pass = 1;
// Initial
for (i = 0; i < ROW_M; ++i) {
for (j = 0; j < COL_M; ++j) {
M[i*COL_M + j] = rand() % 5;
}
}
for (i = 0; i < ROW_N; ++i) {
for (j = 0; j < COL_N; ++j) {
N[i*COL_N + j] = rand() % 5;
}
}
struct timeval starttime, endtime;
gettimeofday(&starttime, NULL);
// CPU
for (i = 0; i < ROW_M; ++i) {
for (j = 0; j < COL_N; ++j) {
for (k = 0; k < COL_M; ++k) {
MxN[i*COL_N + j] += M[i*COL_M + k] * N[k*COL_N + j];
}
}
}
gettimeofday(&endtime, NULL);
double executime;
executime = (endtime.tv_sec - starttime.tv_sec) * 1000.0;
executime += (endtime.tv_usec - starttime.tv_usec) / 1000.0;
printf("CPU time: %13lf msec\n", executime);
/*
printTwoDimDynamicArray(M, COL_M, ROW_M);
printf("============================\n");
printTwoDimDynamicArray(N, COL_N, ROW_N);
printf("============================\n");
printTwoDimDynamicArray(MxN, COL_MxN, ROW_MxN);
*/
// GPU
MatMul((float *)M, (float *)N, (float *)P, width);
// Compare
for(i = 0; i < ROW_MxN; i++) {
for(j = 0; j < COL_MxN; j++) {
if(MxN[i*COL_MxN + j] != P[i*COL_MxN + j]) {
printf("MxN[%d][%d] = %2.0f P[%d][%d] = %2.0f\n", i, j, MxN[i*COL_MxN + j], i, j, P[i*COL_MxN + j]);
pass = 0;
}
}
}
free(M);
free(N);
free(P);
free(MxN);
printf("Test %s\n", (pass)?"PASSED":"FAILED");
return 0;
}
void printTwoDimDynamicArray(float *Array, const int col, const int row) {
int x, y;
for(y = 0; y != row; ++y) {
for(x = 0; x != col; ++x)
printf("%f ", Array[y*col + x]);
printf("\n");
}
}
// Matrix multiplication kernel called by MatMul()
__global__ void MatMulKernel(float *Md, float *Nd, float *Pd, int width){
int row = (blockIdx.y * blockDim.y) + threadIdx.y;
int col = (blockIdx.x * blockDim.x) + threadIdx.x;
float Pvalue = 0;
// Multiply M and N
if(row < ROW_MxN && col < COL_MxN){
for (int k = 0; k < COL_M; ++k) {
float Melement = *(Md + row*COL_M + k);
float Nelement = *(Nd + k*COL_N + col);
Pvalue += Melement * Nelement;
}
*(Pd + row*COL_N + col) = Pvalue;
}
}
// Matrix multiplication - Host code
void MatMul(float *M, float *N, float *P, int width)
{
size_t size_M = ROW_M * COL_M * sizeof(float);
size_t size_N = ROW_N * COL_N * sizeof(float);
size_t size_P = ROW_MxN * COL_MxN * sizeof(float);
float *Md, *Nd, *Pd;
// Allocate and Load M, N to device memory
cudaMalloc((void **)&Md, size_M);
cudaMemcpy(Md, M, size_M, cudaMemcpyHostToDevice);
cudaMalloc((void **)&Nd, size_N);
cudaMemcpy(Nd, N, size_N, cudaMemcpyHostToDevice);
// Allocate P on the device
cudaMalloc((void **)&Pd, size_P);
// Setup the execution configuration
int gridDim_X = (ROW_MxN + 31)/32;
int gridDim_Y = (COL_MxN + 31)/32;
dim3 dimGrid(gridDim_X, gridDim_Y);
dim3 dimBlock(width, width);
printf("============================\n");
// Get start time event
cudaEvent_t start, stop;
cudaEventCreate(&start);
cudaEventCreate(&stop);
cudaEventRecord(start, 0);
// Invoke kernel
MatMulKernel<<<dimGrid, dimBlock>>>(Md, Nd, Pd, width);
cudaError_t cuda_err = cudaGetLastError();
if ( cudaSuccess != cuda_err ){
printf("before kernel call: error = %s\n", cudaGetErrorString (cuda_err));
exit(1) ;
}
// Get stop time event
cudaEventRecord(stop, 0);
cudaEventSynchronize(stop);
// Compute execution time
float elapsedTime;
cudaEventElapsedTime(&elapsedTime, start, stop);
printf("GPU time: %13f msec\n", elapsedTime);
cudaEventDestroy(start);
cudaEventDestroy(stop);
// Read P from device memory
cudaMemcpy(P, Pd, size_P, cudaMemcpyDeviceToHost);
// Free device memory
cudaFree(Md);
cudaFree(Nd);
cudaFree(Pd);
} | .file "tmpxft_001bb9c0_00000000-6_matrix.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2062:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2062:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%f "
.LC1:
.string "\n"
.text
.globl _Z23printTwoDimDynamicArrayPfii
.type _Z23printTwoDimDynamicArrayPfii, @function
_Z23printTwoDimDynamicArrayPfii:
.LFB2058:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $40, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 16(%rsp)
testl %edx, %edx
je .L3
movl %esi, %r15d
movslq %edx, %rax
movq %rax, 8(%rsp)
movl $0, %r14d
movl $0, %r13d
movslq %esi, %rax
movq %rax, 24(%rsp)
leaq .LC0(%rip), %r12
jmp .L5
.L7:
movslq %r14d, %rax
movq 16(%rsp), %rcx
leaq (%rcx,%rax,4), %rbx
movq 24(%rsp), %rdx
addq %rdx, %rax
leaq (%rcx,%rax,4), %rbp
.L6:
pxor %xmm0, %xmm0
cvtss2sd (%rbx), %xmm0
movq %r12, %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
addq $4, %rbx
cmpq %rbp, %rbx
jne .L6
.L8:
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $1, %r13
addl %r15d, %r14d
movq 8(%rsp), %rax
cmpq %rax, %r13
je .L3
.L5:
testl %r15d, %r15d
jne .L7
jmp .L8
.L3:
addq $40, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2058:
.size _Z23printTwoDimDynamicArrayPfii, .-_Z23printTwoDimDynamicArrayPfii
.globl _Z37__device_stub__Z12MatMulKernelPfS_S_iPfS_S_i
.type _Z37__device_stub__Z12MatMulKernelPfS_S_iPfS_S_i, @function
_Z37__device_stub__Z12MatMulKernelPfS_S_iPfS_S_i:
.LFB2084:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L15
.L11:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L16
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L15:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z12MatMulKernelPfS_S_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L11
.L16:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2084:
.size _Z37__device_stub__Z12MatMulKernelPfS_S_iPfS_S_i, .-_Z37__device_stub__Z12MatMulKernelPfS_S_iPfS_S_i
.globl _Z12MatMulKernelPfS_S_i
.type _Z12MatMulKernelPfS_S_i, @function
_Z12MatMulKernelPfS_S_i:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z37__device_stub__Z12MatMulKernelPfS_S_iPfS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _Z12MatMulKernelPfS_S_i, .-_Z12MatMulKernelPfS_S_i
.section .rodata.str1.1
.LC2:
.string "============================\n"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC3:
.string "before kernel call: error = %s\n"
.section .rodata.str1.1
.LC4:
.string "GPU time: %13f msec\n"
.text
.globl _Z6MatMulPfS_S_i
.type _Z6MatMulPfS_S_i, @function
_Z6MatMulPfS_S_i:
.LFB2059:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $88, %rsp
.cfi_def_cfa_offset 128
movq %rdi, %r12
movq %rsi, %rbp
movq %rdx, %r13
movl %ecx, %ebx
movq %fs:40, %rax
movq %rax, 72(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rdi
movl $262144, %esi
call cudaMalloc@PLT
movl $1, %ecx
movl $262144, %edx
movq %r12, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
leaq 16(%rsp), %rdi
movl $262144, %esi
call cudaMalloc@PLT
movl $1, %ecx
movl $262144, %edx
movq %rbp, %rsi
movq 16(%rsp), %rdi
call cudaMemcpy@PLT
leaq 24(%rsp), %rdi
movl $262144, %esi
call cudaMalloc@PLT
movl $8, 48(%rsp)
movl $8, 52(%rsp)
movl $1, 56(%rsp)
movl %ebx, 60(%rsp)
movl %ebx, 64(%rsp)
movl $1, 68(%rsp)
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq 32(%rsp), %rdi
call cudaEventCreate@PLT
leaq 40(%rsp), %rdi
call cudaEventCreate@PLT
movl $0, %esi
movq 32(%rsp), %rdi
call cudaEventRecord@PLT
movl 68(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 60(%rsp), %rdx
movq 48(%rsp), %rdi
movl 56(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L24
.L20:
call cudaGetLastError@PLT
testl %eax, %eax
jne .L25
movl $0, %esi
movq 40(%rsp), %rdi
call cudaEventRecord@PLT
movq 40(%rsp), %rdi
call cudaEventSynchronize@PLT
leaq 4(%rsp), %rdi
movq 40(%rsp), %rdx
movq 32(%rsp), %rsi
call cudaEventElapsedTime@PLT
pxor %xmm0, %xmm0
cvtss2sd 4(%rsp), %xmm0
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq 32(%rsp), %rdi
call cudaEventDestroy@PLT
movq 40(%rsp), %rdi
call cudaEventDestroy@PLT
movl $2, %ecx
movl $262144, %edx
movq 24(%rsp), %rsi
movq %r13, %rdi
call cudaMemcpy@PLT
movq 8(%rsp), %rdi
call cudaFree@PLT
movq 16(%rsp), %rdi
call cudaFree@PLT
movq 24(%rsp), %rdi
call cudaFree@PLT
movq 72(%rsp), %rax
subq %fs:40, %rax
jne .L26
addq $88, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L24:
.cfi_restore_state
movl %ebx, %ecx
movq 24(%rsp), %rdx
movq 16(%rsp), %rsi
movq 8(%rsp), %rdi
call _Z37__device_stub__Z12MatMulKernelPfS_S_iPfS_S_i
jmp .L20
.L25:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rdx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L26:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2059:
.size _Z6MatMulPfS_S_i, .-_Z6MatMulPfS_S_i
.section .rodata.str1.1
.LC5:
.string "PASSED"
.LC6:
.string "FAILED"
.LC8:
.string "CPU time: %13lf msec\n"
.section .rodata.str1.8
.align 8
.LC9:
.string "MxN[%d][%d] = %2.0f P[%d][%d] = %2.0f\n"
.section .rodata.str1.1
.LC10:
.string "Test %s\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $88, %rsp
.cfi_def_cfa_offset 144
movq %fs:40, %rax
movq %rax, 72(%rsp)
xorl %eax, %eax
movl $262144, %edi
call malloc@PLT
movq %rax, %r14
movl $262144, %edi
call malloc@PLT
movq %rax, %r15
movl $262144, %edi
call malloc@PLT
movq %rax, 16(%rsp)
movl $262144, %edi
call malloc@PLT
movq %rax, %rbx
leaq 1024(%r14), %r12
leaq 263168(%r14), %r13
.L28:
leaq -1024(%r12), %rbp
.L29:
call rand@PLT
movslq %eax, %rdx
imulq $1717986919, %rdx, %rdx
sarq $33, %rdx
movl %eax, %ecx
sarl $31, %ecx
subl %ecx, %edx
leal (%rdx,%rdx,4), %edx
subl %edx, %eax
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
movss %xmm0, 0(%rbp)
addq $4, %rbp
cmpq %r12, %rbp
jne .L29
addq $1024, %r12
cmpq %r13, %r12
jne .L28
leaq 1024(%r15), %r12
leaq 263168(%r15), %r13
.L30:
leaq -1024(%r12), %rbp
.L31:
call rand@PLT
movslq %eax, %rdx
imulq $1717986919, %rdx, %rdx
sarq $33, %rdx
movl %eax, %ecx
sarl $31, %ecx
subl %ecx, %edx
leal (%rdx,%rdx,4), %edx
subl %edx, %eax
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
movss %xmm0, 0(%rbp)
addq $4, %rbp
cmpq %r12, %rbp
jne .L31
addq $1024, %r12
cmpq %r13, %r12
jne .L30
leaq 32(%rsp), %rdi
movl $0, %esi
call gettimeofday@PLT
movl $0, %r9d
.L33:
leaq 262144(%r15), %rcx
movq %rbx, %r12
movq %r9, %r8
salq $10, %r8
leaq (%rbx,%r8), %rdi
addq %r14, %r8
movl $0, %esi
.L37:
movss (%rdi,%rsi,4), %xmm1
leaq -262144(%rcx), %rax
movq %r8, %rdx
.L34:
movss (%rdx), %xmm0
mulss (%rax), %xmm0
addss %xmm0, %xmm1
addq $4, %rdx
addq $1024, %rax
cmpq %rcx, %rax
jne .L34
movss %xmm1, (%rdi,%rsi,4)
addq $1, %rsi
addq $4, %rcx
cmpq $256, %rsi
jne .L37
addq $1, %r9
cmpq $256, %r9
jne .L33
leaq 48(%rsp), %rdi
movl $0, %esi
call gettimeofday@PLT
movq 48(%rsp), %rax
subq 32(%rsp), %rax
pxor %xmm1, %xmm1
cvtsi2sdq %rax, %xmm1
movsd .LC7(%rip), %xmm2
mulsd %xmm2, %xmm1
movq 56(%rsp), %rax
subq 40(%rsp), %rax
pxor %xmm0, %xmm0
cvtsi2sdq %rax, %xmm0
divsd %xmm2, %xmm0
addsd %xmm1, %xmm0
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movl $32, %ecx
movq 16(%rsp), %rbp
movq %rbp, %rdx
movq %r15, %rsi
movq %r14, %rdi
call _Z6MatMulPfS_S_i
movl $1, 12(%rsp)
movl $0, %r13d
movq %rbx, %rax
jmp .L38
.L46:
movl %ebx, %ecx
cvtss2sd %xmm0, %xmm0
cvtss2sd %xmm1, %xmm1
movl %ebx, %r9d
movl %r13d, %r8d
movl %r13d, %edx
leaq .LC9(%rip), %rsi
movl $2, %edi
movl $2, %eax
call __printf_chk@PLT
movl $0, 12(%rsp)
.L39:
addq $1, %rbx
cmpq $256, %rbx
je .L53
.L41:
movss (%r12,%rbx,4), %xmm0
movss 0(%rbp,%rbx,4), %xmm1
ucomiss %xmm1, %xmm0
jp .L46
je .L39
jmp .L46
.L53:
movq %r14, %rax
movq 24(%rsp), %r14
addl $1, %r13d
addq $1024, %r12
addq $1024, %rbp
cmpl $256, %r13d
je .L42
.L38:
movl $0, %ebx
movq %r14, 24(%rsp)
movq %rax, %r14
jmp .L41
.L42:
movq %rax, %rbx
movq %r14, %rdi
call free@PLT
movq %r15, %rdi
call free@PLT
movq 16(%rsp), %rdi
call free@PLT
movq %rbx, %rdi
call free@PLT
cmpl $0, 12(%rsp)
leaq .LC6(%rip), %rdx
leaq .LC5(%rip), %rax
cmovne %rax, %rdx
leaq .LC10(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 72(%rsp), %rax
subq %fs:40, %rax
jne .L54
movl $0, %eax
addq $88, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L54:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.1
.LC11:
.string "_Z12MatMulKernelPfS_S_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2087:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC11(%rip), %rdx
movq %rdx, %rcx
leaq _Z12MatMulKernelPfS_S_i(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2087:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC7:
.long 0
.long 1083129856
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#include <sys/time.h>
#include <cuda_runtime.h>
#define WIDTH 32
#define ROW_M 256
#define COL_M 256
#define ROW_N 256
#define COL_N 256
#define ROW_MxN ROW_M
#define COL_MxN COL_N
__global__ void MatMulKernel(float *Md, float *Nd, float *Pd, int width);
void MatMul(float *M, float *N, float *P, int width);
void printTwoDimDynamicArray(float *Array, const int col, const int row);
int main(int argc, char *argv[])
{
int i, j, k;
int width = WIDTH;
// Dynamic
float *M = (float *)malloc(ROW_M * COL_M * sizeof(float));
float *N = (float *)malloc(ROW_N * COL_N * sizeof(float));
float *P = (float *)malloc(ROW_MxN * COL_MxN * sizeof(float));
float *MxN = (float *)malloc(ROW_MxN * COL_MxN * sizeof(float));
int pass = 1;
// Initial
for (i = 0; i < ROW_M; ++i) {
for (j = 0; j < COL_M; ++j) {
M[i*COL_M + j] = rand() % 5;
}
}
for (i = 0; i < ROW_N; ++i) {
for (j = 0; j < COL_N; ++j) {
N[i*COL_N + j] = rand() % 5;
}
}
struct timeval starttime, endtime;
gettimeofday(&starttime, NULL);
// CPU
for (i = 0; i < ROW_M; ++i) {
for (j = 0; j < COL_N; ++j) {
for (k = 0; k < COL_M; ++k) {
MxN[i*COL_N + j] += M[i*COL_M + k] * N[k*COL_N + j];
}
}
}
gettimeofday(&endtime, NULL);
double executime;
executime = (endtime.tv_sec - starttime.tv_sec) * 1000.0;
executime += (endtime.tv_usec - starttime.tv_usec) / 1000.0;
printf("CPU time: %13lf msec\n", executime);
/*
printTwoDimDynamicArray(M, COL_M, ROW_M);
printf("============================\n");
printTwoDimDynamicArray(N, COL_N, ROW_N);
printf("============================\n");
printTwoDimDynamicArray(MxN, COL_MxN, ROW_MxN);
*/
// GPU
MatMul((float *)M, (float *)N, (float *)P, width);
// Compare
for(i = 0; i < ROW_MxN; i++) {
for(j = 0; j < COL_MxN; j++) {
if(MxN[i*COL_MxN + j] != P[i*COL_MxN + j]) {
printf("MxN[%d][%d] = %2.0f P[%d][%d] = %2.0f\n", i, j, MxN[i*COL_MxN + j], i, j, P[i*COL_MxN + j]);
pass = 0;
}
}
}
free(M);
free(N);
free(P);
free(MxN);
printf("Test %s\n", (pass)?"PASSED":"FAILED");
return 0;
}
void printTwoDimDynamicArray(float *Array, const int col, const int row) {
int x, y;
for(y = 0; y != row; ++y) {
for(x = 0; x != col; ++x)
printf("%f ", Array[y*col + x]);
printf("\n");
}
}
// Matrix multiplication kernel called by MatMul()
__global__ void MatMulKernel(float *Md, float *Nd, float *Pd, int width){
int row = (blockIdx.y * blockDim.y) + threadIdx.y;
int col = (blockIdx.x * blockDim.x) + threadIdx.x;
float Pvalue = 0;
// Multiply M and N
if(row < ROW_MxN && col < COL_MxN){
for (int k = 0; k < COL_M; ++k) {
float Melement = *(Md + row*COL_M + k);
float Nelement = *(Nd + k*COL_N + col);
Pvalue += Melement * Nelement;
}
*(Pd + row*COL_N + col) = Pvalue;
}
}
// Matrix multiplication - Host code
void MatMul(float *M, float *N, float *P, int width)
{
size_t size_M = ROW_M * COL_M * sizeof(float);
size_t size_N = ROW_N * COL_N * sizeof(float);
size_t size_P = ROW_MxN * COL_MxN * sizeof(float);
float *Md, *Nd, *Pd;
// Allocate and Load M, N to device memory
cudaMalloc((void **)&Md, size_M);
cudaMemcpy(Md, M, size_M, cudaMemcpyHostToDevice);
cudaMalloc((void **)&Nd, size_N);
cudaMemcpy(Nd, N, size_N, cudaMemcpyHostToDevice);
// Allocate P on the device
cudaMalloc((void **)&Pd, size_P);
// Setup the execution configuration
int gridDim_X = (ROW_MxN + 31)/32;
int gridDim_Y = (COL_MxN + 31)/32;
dim3 dimGrid(gridDim_X, gridDim_Y);
dim3 dimBlock(width, width);
printf("============================\n");
// Get start time event
cudaEvent_t start, stop;
cudaEventCreate(&start);
cudaEventCreate(&stop);
cudaEventRecord(start, 0);
// Invoke kernel
MatMulKernel<<<dimGrid, dimBlock>>>(Md, Nd, Pd, width);
cudaError_t cuda_err = cudaGetLastError();
if ( cudaSuccess != cuda_err ){
printf("before kernel call: error = %s\n", cudaGetErrorString (cuda_err));
exit(1) ;
}
// Get stop time event
cudaEventRecord(stop, 0);
cudaEventSynchronize(stop);
// Compute execution time
float elapsedTime;
cudaEventElapsedTime(&elapsedTime, start, stop);
printf("GPU time: %13f msec\n", elapsedTime);
cudaEventDestroy(start);
cudaEventDestroy(stop);
// Read P from device memory
cudaMemcpy(P, Pd, size_P, cudaMemcpyDeviceToHost);
// Free device memory
cudaFree(Md);
cudaFree(Nd);
cudaFree(Pd);
} | #include <stdio.h>
#include <stdlib.h>
#include <sys/time.h>
#include <hip/hip_runtime.h>
#define WIDTH 32
#define ROW_M 256
#define COL_M 256
#define ROW_N 256
#define COL_N 256
#define ROW_MxN ROW_M
#define COL_MxN COL_N
__global__ void MatMulKernel(float *Md, float *Nd, float *Pd, int width);
void MatMul(float *M, float *N, float *P, int width);
void printTwoDimDynamicArray(float *Array, const int col, const int row);
int main(int argc, char *argv[])
{
int i, j, k;
int width = WIDTH;
// Dynamic
float *M = (float *)malloc(ROW_M * COL_M * sizeof(float));
float *N = (float *)malloc(ROW_N * COL_N * sizeof(float));
float *P = (float *)malloc(ROW_MxN * COL_MxN * sizeof(float));
float *MxN = (float *)malloc(ROW_MxN * COL_MxN * sizeof(float));
int pass = 1;
// Initial
for (i = 0; i < ROW_M; ++i) {
for (j = 0; j < COL_M; ++j) {
M[i*COL_M + j] = rand() % 5;
}
}
for (i = 0; i < ROW_N; ++i) {
for (j = 0; j < COL_N; ++j) {
N[i*COL_N + j] = rand() % 5;
}
}
struct timeval starttime, endtime;
gettimeofday(&starttime, NULL);
// CPU
for (i = 0; i < ROW_M; ++i) {
for (j = 0; j < COL_N; ++j) {
for (k = 0; k < COL_M; ++k) {
MxN[i*COL_N + j] += M[i*COL_M + k] * N[k*COL_N + j];
}
}
}
gettimeofday(&endtime, NULL);
double executime;
executime = (endtime.tv_sec - starttime.tv_sec) * 1000.0;
executime += (endtime.tv_usec - starttime.tv_usec) / 1000.0;
printf("CPU time: %13lf msec\n", executime);
/*
printTwoDimDynamicArray(M, COL_M, ROW_M);
printf("============================\n");
printTwoDimDynamicArray(N, COL_N, ROW_N);
printf("============================\n");
printTwoDimDynamicArray(MxN, COL_MxN, ROW_MxN);
*/
// GPU
MatMul((float *)M, (float *)N, (float *)P, width);
// Compare
for(i = 0; i < ROW_MxN; i++) {
for(j = 0; j < COL_MxN; j++) {
if(MxN[i*COL_MxN + j] != P[i*COL_MxN + j]) {
printf("MxN[%d][%d] = %2.0f P[%d][%d] = %2.0f\n", i, j, MxN[i*COL_MxN + j], i, j, P[i*COL_MxN + j]);
pass = 0;
}
}
}
free(M);
free(N);
free(P);
free(MxN);
printf("Test %s\n", (pass)?"PASSED":"FAILED");
return 0;
}
void printTwoDimDynamicArray(float *Array, const int col, const int row) {
int x, y;
for(y = 0; y != row; ++y) {
for(x = 0; x != col; ++x)
printf("%f ", Array[y*col + x]);
printf("\n");
}
}
// Matrix multiplication kernel called by MatMul()
__global__ void MatMulKernel(float *Md, float *Nd, float *Pd, int width){
int row = (blockIdx.y * blockDim.y) + threadIdx.y;
int col = (blockIdx.x * blockDim.x) + threadIdx.x;
float Pvalue = 0;
// Multiply M and N
if(row < ROW_MxN && col < COL_MxN){
for (int k = 0; k < COL_M; ++k) {
float Melement = *(Md + row*COL_M + k);
float Nelement = *(Nd + k*COL_N + col);
Pvalue += Melement * Nelement;
}
*(Pd + row*COL_N + col) = Pvalue;
}
}
// Matrix multiplication - Host code
void MatMul(float *M, float *N, float *P, int width)
{
size_t size_M = ROW_M * COL_M * sizeof(float);
size_t size_N = ROW_N * COL_N * sizeof(float);
size_t size_P = ROW_MxN * COL_MxN * sizeof(float);
float *Md, *Nd, *Pd;
// Allocate and Load M, N to device memory
hipMalloc((void **)&Md, size_M);
hipMemcpy(Md, M, size_M, hipMemcpyHostToDevice);
hipMalloc((void **)&Nd, size_N);
hipMemcpy(Nd, N, size_N, hipMemcpyHostToDevice);
// Allocate P on the device
hipMalloc((void **)&Pd, size_P);
// Setup the execution configuration
int gridDim_X = (ROW_MxN + 31)/32;
int gridDim_Y = (COL_MxN + 31)/32;
dim3 dimGrid(gridDim_X, gridDim_Y);
dim3 dimBlock(width, width);
printf("============================\n");
// Get start time event
hipEvent_t start, stop;
hipEventCreate(&start);
hipEventCreate(&stop);
hipEventRecord(start, 0);
// Invoke kernel
MatMulKernel<<<dimGrid, dimBlock>>>(Md, Nd, Pd, width);
hipError_t cuda_err = hipGetLastError();
if ( hipSuccess != cuda_err ){
printf("before kernel call: error = %s\n", hipGetErrorString (cuda_err));
exit(1) ;
}
// Get stop time event
hipEventRecord(stop, 0);
hipEventSynchronize(stop);
// Compute execution time
float elapsedTime;
hipEventElapsedTime(&elapsedTime, start, stop);
printf("GPU time: %13f msec\n", elapsedTime);
hipEventDestroy(start);
hipEventDestroy(stop);
// Read P from device memory
hipMemcpy(P, Pd, size_P, hipMemcpyDeviceToHost);
// Free device memory
hipFree(Md);
hipFree(Nd);
hipFree(Pd);
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <stdio.h>
#include <stdlib.h>
#include <sys/time.h>
#include <hip/hip_runtime.h>
#define WIDTH 32
#define ROW_M 256
#define COL_M 256
#define ROW_N 256
#define COL_N 256
#define ROW_MxN ROW_M
#define COL_MxN COL_N
__global__ void MatMulKernel(float *Md, float *Nd, float *Pd, int width);
void MatMul(float *M, float *N, float *P, int width);
void printTwoDimDynamicArray(float *Array, const int col, const int row);
int main(int argc, char *argv[])
{
int i, j, k;
int width = WIDTH;
// Dynamic
float *M = (float *)malloc(ROW_M * COL_M * sizeof(float));
float *N = (float *)malloc(ROW_N * COL_N * sizeof(float));
float *P = (float *)malloc(ROW_MxN * COL_MxN * sizeof(float));
float *MxN = (float *)malloc(ROW_MxN * COL_MxN * sizeof(float));
int pass = 1;
// Initial
for (i = 0; i < ROW_M; ++i) {
for (j = 0; j < COL_M; ++j) {
M[i*COL_M + j] = rand() % 5;
}
}
for (i = 0; i < ROW_N; ++i) {
for (j = 0; j < COL_N; ++j) {
N[i*COL_N + j] = rand() % 5;
}
}
struct timeval starttime, endtime;
gettimeofday(&starttime, NULL);
// CPU
for (i = 0; i < ROW_M; ++i) {
for (j = 0; j < COL_N; ++j) {
for (k = 0; k < COL_M; ++k) {
MxN[i*COL_N + j] += M[i*COL_M + k] * N[k*COL_N + j];
}
}
}
gettimeofday(&endtime, NULL);
double executime;
executime = (endtime.tv_sec - starttime.tv_sec) * 1000.0;
executime += (endtime.tv_usec - starttime.tv_usec) / 1000.0;
printf("CPU time: %13lf msec\n", executime);
/*
printTwoDimDynamicArray(M, COL_M, ROW_M);
printf("============================\n");
printTwoDimDynamicArray(N, COL_N, ROW_N);
printf("============================\n");
printTwoDimDynamicArray(MxN, COL_MxN, ROW_MxN);
*/
// GPU
MatMul((float *)M, (float *)N, (float *)P, width);
// Compare
for(i = 0; i < ROW_MxN; i++) {
for(j = 0; j < COL_MxN; j++) {
if(MxN[i*COL_MxN + j] != P[i*COL_MxN + j]) {
printf("MxN[%d][%d] = %2.0f P[%d][%d] = %2.0f\n", i, j, MxN[i*COL_MxN + j], i, j, P[i*COL_MxN + j]);
pass = 0;
}
}
}
free(M);
free(N);
free(P);
free(MxN);
printf("Test %s\n", (pass)?"PASSED":"FAILED");
return 0;
}
void printTwoDimDynamicArray(float *Array, const int col, const int row) {
int x, y;
for(y = 0; y != row; ++y) {
for(x = 0; x != col; ++x)
printf("%f ", Array[y*col + x]);
printf("\n");
}
}
// Matrix multiplication kernel called by MatMul()
__global__ void MatMulKernel(float *Md, float *Nd, float *Pd, int width){
int row = (blockIdx.y * blockDim.y) + threadIdx.y;
int col = (blockIdx.x * blockDim.x) + threadIdx.x;
float Pvalue = 0;
// Multiply M and N
if(row < ROW_MxN && col < COL_MxN){
for (int k = 0; k < COL_M; ++k) {
float Melement = *(Md + row*COL_M + k);
float Nelement = *(Nd + k*COL_N + col);
Pvalue += Melement * Nelement;
}
*(Pd + row*COL_N + col) = Pvalue;
}
}
// Matrix multiplication - Host code
void MatMul(float *M, float *N, float *P, int width)
{
size_t size_M = ROW_M * COL_M * sizeof(float);
size_t size_N = ROW_N * COL_N * sizeof(float);
size_t size_P = ROW_MxN * COL_MxN * sizeof(float);
float *Md, *Nd, *Pd;
// Allocate and Load M, N to device memory
hipMalloc((void **)&Md, size_M);
hipMemcpy(Md, M, size_M, hipMemcpyHostToDevice);
hipMalloc((void **)&Nd, size_N);
hipMemcpy(Nd, N, size_N, hipMemcpyHostToDevice);
// Allocate P on the device
hipMalloc((void **)&Pd, size_P);
// Setup the execution configuration
int gridDim_X = (ROW_MxN + 31)/32;
int gridDim_Y = (COL_MxN + 31)/32;
dim3 dimGrid(gridDim_X, gridDim_Y);
dim3 dimBlock(width, width);
printf("============================\n");
// Get start time event
hipEvent_t start, stop;
hipEventCreate(&start);
hipEventCreate(&stop);
hipEventRecord(start, 0);
// Invoke kernel
MatMulKernel<<<dimGrid, dimBlock>>>(Md, Nd, Pd, width);
hipError_t cuda_err = hipGetLastError();
if ( hipSuccess != cuda_err ){
printf("before kernel call: error = %s\n", hipGetErrorString (cuda_err));
exit(1) ;
}
// Get stop time event
hipEventRecord(stop, 0);
hipEventSynchronize(stop);
// Compute execution time
float elapsedTime;
hipEventElapsedTime(&elapsedTime, start, stop);
printf("GPU time: %13f msec\n", elapsedTime);
hipEventDestroy(start);
hipEventDestroy(stop);
// Read P from device memory
hipMemcpy(P, Pd, size_P, hipMemcpyDeviceToHost);
// Free device memory
hipFree(Md);
hipFree(Nd);
hipFree(Pd);
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12MatMulKernelPfS_S_i
.globl _Z12MatMulKernelPfS_S_i
.p2align 8
.type _Z12MatMulKernelPfS_S_i,@function
_Z12MatMulKernelPfS_S_i:
s_load_b32 s2, s[0:1], 0x2c
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v4, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s3, s2, 16
s_and_b32 s2, s2, 0xffff
v_mad_u64_u32 v[2:3], null, s15, s3, v[1:2]
v_mad_u64_u32 v[0:1], null, s14, s2, v[4:5]
s_mov_b32 s2, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_max_i32_e32 v1, v2, v0
v_cmpx_gt_i32_e32 0x100, v1
s_cbranch_execz .LBB0_4
s_load_b128 s[4:7], s[0:1], 0x0
v_lshlrev_b32_e32 v3, 8, v2
v_ashrrev_i32_e32 v1, 31, v0
v_mov_b32_e32 v5, 0
s_mov_b64 s[2:3], 0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_ashrrev_i32_e32 v4, 31, v3
v_lshlrev_b64 v[8:9], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[3:4], 2, v[3:4]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v6, vcc_lo, s4, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_ci_u32_e32 v7, vcc_lo, s5, v4, vcc_lo
v_add_co_u32 v3, vcc_lo, s6, v8
v_add_co_ci_u32_e32 v4, vcc_lo, s7, v9, vcc_lo
.LBB0_2:
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v8, vcc_lo, v6, s2
v_add_co_ci_u32_e32 v9, vcc_lo, s3, v7, vcc_lo
s_add_u32 s2, s2, 4
s_addc_u32 s3, s3, 0
global_load_b32 v10, v[3:4], off
global_load_b32 v8, v[8:9], off
v_add_co_u32 v3, vcc_lo, v3, 0x400
v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
s_cmpk_eq_i32 s2, 0x400
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v5, v8, v10
s_cbranch_scc0 .LBB0_2
s_load_b64 s[0:1], s[0:1], 0x10
v_lshlrev_b32_e32 v2, 8, v2
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s0, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, v2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, v3, v1, vcc_lo
global_store_b32 v[0:1], v5, off
.LBB0_4:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z12MatMulKernelPfS_S_i
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 11
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z12MatMulKernelPfS_S_i, .Lfunc_end0-_Z12MatMulKernelPfS_S_i
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z12MatMulKernelPfS_S_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z12MatMulKernelPfS_S_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 11
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <sys/time.h>
#include <hip/hip_runtime.h>
#define WIDTH 32
#define ROW_M 256
#define COL_M 256
#define ROW_N 256
#define COL_N 256
#define ROW_MxN ROW_M
#define COL_MxN COL_N
__global__ void MatMulKernel(float *Md, float *Nd, float *Pd, int width);
void MatMul(float *M, float *N, float *P, int width);
void printTwoDimDynamicArray(float *Array, const int col, const int row);
int main(int argc, char *argv[])
{
int i, j, k;
int width = WIDTH;
// Dynamic
float *M = (float *)malloc(ROW_M * COL_M * sizeof(float));
float *N = (float *)malloc(ROW_N * COL_N * sizeof(float));
float *P = (float *)malloc(ROW_MxN * COL_MxN * sizeof(float));
float *MxN = (float *)malloc(ROW_MxN * COL_MxN * sizeof(float));
int pass = 1;
// Initial
for (i = 0; i < ROW_M; ++i) {
for (j = 0; j < COL_M; ++j) {
M[i*COL_M + j] = rand() % 5;
}
}
for (i = 0; i < ROW_N; ++i) {
for (j = 0; j < COL_N; ++j) {
N[i*COL_N + j] = rand() % 5;
}
}
struct timeval starttime, endtime;
gettimeofday(&starttime, NULL);
// CPU
for (i = 0; i < ROW_M; ++i) {
for (j = 0; j < COL_N; ++j) {
for (k = 0; k < COL_M; ++k) {
MxN[i*COL_N + j] += M[i*COL_M + k] * N[k*COL_N + j];
}
}
}
gettimeofday(&endtime, NULL);
double executime;
executime = (endtime.tv_sec - starttime.tv_sec) * 1000.0;
executime += (endtime.tv_usec - starttime.tv_usec) / 1000.0;
printf("CPU time: %13lf msec\n", executime);
/*
printTwoDimDynamicArray(M, COL_M, ROW_M);
printf("============================\n");
printTwoDimDynamicArray(N, COL_N, ROW_N);
printf("============================\n");
printTwoDimDynamicArray(MxN, COL_MxN, ROW_MxN);
*/
// GPU
MatMul((float *)M, (float *)N, (float *)P, width);
// Compare
for(i = 0; i < ROW_MxN; i++) {
for(j = 0; j < COL_MxN; j++) {
if(MxN[i*COL_MxN + j] != P[i*COL_MxN + j]) {
printf("MxN[%d][%d] = %2.0f P[%d][%d] = %2.0f\n", i, j, MxN[i*COL_MxN + j], i, j, P[i*COL_MxN + j]);
pass = 0;
}
}
}
free(M);
free(N);
free(P);
free(MxN);
printf("Test %s\n", (pass)?"PASSED":"FAILED");
return 0;
}
void printTwoDimDynamicArray(float *Array, const int col, const int row) {
int x, y;
for(y = 0; y != row; ++y) {
for(x = 0; x != col; ++x)
printf("%f ", Array[y*col + x]);
printf("\n");
}
}
// Matrix multiplication kernel called by MatMul()
__global__ void MatMulKernel(float *Md, float *Nd, float *Pd, int width){
int row = (blockIdx.y * blockDim.y) + threadIdx.y;
int col = (blockIdx.x * blockDim.x) + threadIdx.x;
float Pvalue = 0;
// Multiply M and N
if(row < ROW_MxN && col < COL_MxN){
for (int k = 0; k < COL_M; ++k) {
float Melement = *(Md + row*COL_M + k);
float Nelement = *(Nd + k*COL_N + col);
Pvalue += Melement * Nelement;
}
*(Pd + row*COL_N + col) = Pvalue;
}
}
// Matrix multiplication - Host code
void MatMul(float *M, float *N, float *P, int width)
{
size_t size_M = ROW_M * COL_M * sizeof(float);
size_t size_N = ROW_N * COL_N * sizeof(float);
size_t size_P = ROW_MxN * COL_MxN * sizeof(float);
float *Md, *Nd, *Pd;
// Allocate and Load M, N to device memory
hipMalloc((void **)&Md, size_M);
hipMemcpy(Md, M, size_M, hipMemcpyHostToDevice);
hipMalloc((void **)&Nd, size_N);
hipMemcpy(Nd, N, size_N, hipMemcpyHostToDevice);
// Allocate P on the device
hipMalloc((void **)&Pd, size_P);
// Setup the execution configuration
int gridDim_X = (ROW_MxN + 31)/32;
int gridDim_Y = (COL_MxN + 31)/32;
dim3 dimGrid(gridDim_X, gridDim_Y);
dim3 dimBlock(width, width);
printf("============================\n");
// Get start time event
hipEvent_t start, stop;
hipEventCreate(&start);
hipEventCreate(&stop);
hipEventRecord(start, 0);
// Invoke kernel
MatMulKernel<<<dimGrid, dimBlock>>>(Md, Nd, Pd, width);
hipError_t cuda_err = hipGetLastError();
if ( hipSuccess != cuda_err ){
printf("before kernel call: error = %s\n", hipGetErrorString (cuda_err));
exit(1) ;
}
// Get stop time event
hipEventRecord(stop, 0);
hipEventSynchronize(stop);
// Compute execution time
float elapsedTime;
hipEventElapsedTime(&elapsedTime, start, stop);
printf("GPU time: %13f msec\n", elapsedTime);
hipEventDestroy(start);
hipEventDestroy(stop);
// Read P from device memory
hipMemcpy(P, Pd, size_P, hipMemcpyDeviceToHost);
// Free device memory
hipFree(Md);
hipFree(Nd);
hipFree(Pd);
} | .text
.file "matrix.hip"
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI0_0:
.quad 0x408f400000000000 # double 1000
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $56, %rsp
.cfi_def_cfa_offset 112
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl $262144, %edi # imm = 0x40000
callq malloc
movq %rax, %rbp
movl $262144, %edi # imm = 0x40000
callq malloc
movq %rax, %r13
movl $262144, %edi # imm = 0x40000
callq malloc
movq %rax, (%rsp) # 8-byte Spill
movl $262144, %edi # imm = 0x40000
callq malloc
movq %rax, %rbx
xorl %r14d, %r14d
movq %rbp, %r15
.p2align 4, 0x90
.LBB0_1: # %.preheader73
# =>This Loop Header: Depth=1
# Child Loop BB0_2 Depth 2
xorl %r12d, %r12d
.p2align 4, 0x90
.LBB0_2: # Parent Loop BB0_1 Depth=1
# => This Inner Loop Header: Depth=2
callq rand
cltq
imulq $1717986919, %rax, %rcx # imm = 0x66666667
movq %rcx, %rdx
shrq $63, %rdx
sarq $33, %rcx
addl %edx, %ecx
leal (%rcx,%rcx,4), %ecx
subl %ecx, %eax
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
movss %xmm0, (%r15,%r12,4)
incq %r12
cmpq $256, %r12 # imm = 0x100
jne .LBB0_2
# %bb.3: # in Loop: Header=BB0_1 Depth=1
incq %r14
addq $1024, %r15 # imm = 0x400
cmpq $256, %r14 # imm = 0x100
jne .LBB0_1
# %bb.4: # %.preheader71.preheader
xorl %r14d, %r14d
movq %r13, %r15
.p2align 4, 0x90
.LBB0_5: # %.preheader71
# =>This Loop Header: Depth=1
# Child Loop BB0_6 Depth 2
xorl %r12d, %r12d
.p2align 4, 0x90
.LBB0_6: # Parent Loop BB0_5 Depth=1
# => This Inner Loop Header: Depth=2
callq rand
cltq
imulq $1717986919, %rax, %rcx # imm = 0x66666667
movq %rcx, %rdx
shrq $63, %rdx
sarq $33, %rcx
addl %edx, %ecx
leal (%rcx,%rcx,4), %ecx
subl %ecx, %eax
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
movss %xmm0, (%r15,%r12,4)
incq %r12
cmpq $256, %r12 # imm = 0x100
jne .LBB0_6
# %bb.7: # in Loop: Header=BB0_5 Depth=1
incq %r14
addq $1024, %r15 # imm = 0x400
cmpq $256, %r14 # imm = 0x100
jne .LBB0_5
# %bb.8:
xorl %r15d, %r15d
leaq 40(%rsp), %rdi
xorl %esi, %esi
callq gettimeofday
movq %rbp, %rax
.p2align 4, 0x90
.LBB0_9: # %.preheader70
# =>This Loop Header: Depth=1
# Child Loop BB0_10 Depth 2
# Child Loop BB0_11 Depth 3
movq %r15, %rcx
shlq $8, %rcx
movq %r13, %rdx
xorl %esi, %esi
.p2align 4, 0x90
.LBB0_10: # %.preheader69
# Parent Loop BB0_9 Depth=1
# => This Loop Header: Depth=2
# Child Loop BB0_11 Depth 3
movq %rsi, %rdi
orq %rcx, %rdi
movss (%rbx,%rdi,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
movq %rdx, %r8
xorl %r9d, %r9d
.p2align 4, 0x90
.LBB0_11: # Parent Loop BB0_9 Depth=1
# Parent Loop BB0_10 Depth=2
# => This Inner Loop Header: Depth=3
movss (%rax,%r9,4), %xmm1 # xmm1 = mem[0],zero,zero,zero
mulss (%r8), %xmm1
addss %xmm1, %xmm0
incq %r9
addq $1024, %r8 # imm = 0x400
cmpq $256, %r9 # imm = 0x100
jne .LBB0_11
# %bb.12: # in Loop: Header=BB0_10 Depth=2
movss %xmm0, (%rbx,%rdi,4)
incq %rsi
addq $4, %rdx
cmpq $256, %rsi # imm = 0x100
jne .LBB0_10
# %bb.13: # in Loop: Header=BB0_9 Depth=1
incq %r15
addq $1024, %rax # imm = 0x400
cmpq $256, %r15 # imm = 0x100
jne .LBB0_9
# %bb.14:
movq %r13, %r14
xorl %r13d, %r13d
leaq 24(%rsp), %rdi
xorl %esi, %esi
callq gettimeofday
movq 24(%rsp), %rax
movq 32(%rsp), %rcx
subq 40(%rsp), %rax
xorps %xmm1, %xmm1
cvtsi2sd %rax, %xmm1
movsd .LCPI0_0(%rip), %xmm2 # xmm2 = mem[0],zero
mulsd %xmm2, %xmm1
subq 48(%rsp), %rcx
xorps %xmm0, %xmm0
cvtsi2sd %rcx, %xmm0
divsd %xmm2, %xmm0
addsd %xmm1, %xmm0
movl $.L.str, %edi
movb $1, %al
callq printf
movq %rbp, 16(%rsp) # 8-byte Spill
movq %rbp, %rdi
movq %r14, 8(%rsp) # 8-byte Spill
movq %r14, %rsi
movq (%rsp), %r14 # 8-byte Reload
movq %r14, %rdx
movl $32, %ecx
callq _Z6MatMulPfS_S_i
movl $1, %r15d
movq %rbx, %r12
jmp .LBB0_15
.p2align 4, 0x90
.LBB0_19: # in Loop: Header=BB0_15 Depth=1
incq %r13
addq $1024, %r14 # imm = 0x400
addq $1024, %r12 # imm = 0x400
cmpq $256, %r13 # imm = 0x100
je .LBB0_20
.LBB0_15: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB0_16 Depth 2
xorl %ebp, %ebp
jmp .LBB0_16
.p2align 4, 0x90
.LBB0_18: # in Loop: Header=BB0_16 Depth=2
incq %rbp
cmpq $256, %rbp # imm = 0x100
je .LBB0_19
.LBB0_16: # Parent Loop BB0_15 Depth=1
# => This Inner Loop Header: Depth=2
movss (%r12,%rbp,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
movss (%r14,%rbp,4), %xmm1 # xmm1 = mem[0],zero,zero,zero
ucomiss %xmm1, %xmm0
jne .LBB0_17
jnp .LBB0_18
.LBB0_17: # in Loop: Header=BB0_16 Depth=2
cvtss2sd %xmm0, %xmm0
cvtss2sd %xmm1, %xmm1
movl $.L.str.1, %edi
movl %r13d, %esi
movl %ebp, %edx
movl %r13d, %ecx
movl %ebp, %r8d
movb $2, %al
callq printf
xorl %r15d, %r15d
jmp .LBB0_18
.LBB0_20:
movq 16(%rsp), %rdi # 8-byte Reload
callq free
movq 8(%rsp), %rdi # 8-byte Reload
callq free
movq (%rsp), %rdi # 8-byte Reload
callq free
movq %rbx, %rdi
callq free
testl %r15d, %r15d
movl $.L.str.4, %eax
movl $.L.str.3, %esi
cmoveq %rax, %rsi
movl $.L.str.2, %edi
xorl %eax, %eax
callq printf
xorl %eax, %eax
addq $56, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end0:
.size main, .Lfunc_end0-main
.cfi_endproc
# -- End function
.globl _Z6MatMulPfS_S_i # -- Begin function _Z6MatMulPfS_S_i
.p2align 4, 0x90
.type _Z6MatMulPfS_S_i,@function
_Z6MatMulPfS_S_i: # @_Z6MatMulPfS_S_i
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %rbx
.cfi_def_cfa_offset 40
subq $168, %rsp
.cfi_def_cfa_offset 208
.cfi_offset %rbx, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %ecx, %ebp
movq %rdx, %rbx
movq %rsi, %r14
movq %rdi, %r15
leaq 40(%rsp), %rdi
movl $262144, %esi # imm = 0x40000
callq hipMalloc
movq 40(%rsp), %rdi
movl $262144, %edx # imm = 0x40000
movq %r15, %rsi
movl $1, %ecx
callq hipMemcpy
leaq 32(%rsp), %rdi
movl $262144, %esi # imm = 0x40000
callq hipMalloc
movq 32(%rsp), %rdi
movl $262144, %edx # imm = 0x40000
movq %r14, %rsi
movl $1, %ecx
callq hipMemcpy
leaq 24(%rsp), %rdi
movl $262144, %esi # imm = 0x40000
callq hipMalloc
movl %ebp, %eax
movq %rax, %r14
shlq $32, %r14
orq %rax, %r14
movl $.Lstr, %edi
callq puts@PLT
leaq 16(%rsp), %rdi
callq hipEventCreate
leaq 8(%rsp), %rdi
callq hipEventCreate
movq 16(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movabsq $34359738376, %rdi # imm = 0x800000008
movl $1, %esi
movq %r14, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_2
# %bb.1:
movq 40(%rsp), %rax
movq 32(%rsp), %rcx
movq 24(%rsp), %rdx
movq %rax, 120(%rsp)
movq %rcx, 112(%rsp)
movq %rdx, 104(%rsp)
movl %ebp, 52(%rsp)
leaq 120(%rsp), %rax
movq %rax, 128(%rsp)
leaq 112(%rsp), %rax
movq %rax, 136(%rsp)
leaq 104(%rsp), %rax
movq %rax, 144(%rsp)
leaq 52(%rsp), %rax
movq %rax, 152(%rsp)
leaq 88(%rsp), %rdi
leaq 72(%rsp), %rsi
leaq 64(%rsp), %rdx
leaq 56(%rsp), %rcx
callq __hipPopCallConfiguration
movq 88(%rsp), %rsi
movl 96(%rsp), %edx
movq 72(%rsp), %rcx
movl 80(%rsp), %r8d
leaq 128(%rsp), %r9
movl $_Z12MatMulKernelPfS_S_i, %edi
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
pushq 72(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_2:
callq hipGetLastError
testl %eax, %eax
jne .LBB1_4
# %bb.3:
movq 8(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq 8(%rsp), %rdi
callq hipEventSynchronize
movq 16(%rsp), %rsi
movq 8(%rsp), %rdx
leaq 128(%rsp), %rdi
callq hipEventElapsedTime
movss 128(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.9, %edi
movb $1, %al
callq printf
movq 16(%rsp), %rdi
callq hipEventDestroy
movq 8(%rsp), %rdi
callq hipEventDestroy
movq 24(%rsp), %rsi
movl $262144, %edx # imm = 0x40000
movq %rbx, %rdi
movl $2, %ecx
callq hipMemcpy
movq 40(%rsp), %rdi
callq hipFree
movq 32(%rsp), %rdi
callq hipFree
movq 24(%rsp), %rdi
callq hipFree
addq $168, %rsp
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB1_4:
.cfi_def_cfa_offset 208
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.8, %edi
movq %rax, %rsi
xorl %eax, %eax
callq printf
movl $1, %edi
callq exit
.Lfunc_end1:
.size _Z6MatMulPfS_S_i, .Lfunc_end1-_Z6MatMulPfS_S_i
.cfi_endproc
# -- End function
.globl _Z23printTwoDimDynamicArrayPfii # -- Begin function _Z23printTwoDimDynamicArrayPfii
.p2align 4, 0x90
.type _Z23printTwoDimDynamicArrayPfii,@function
_Z23printTwoDimDynamicArrayPfii: # @_Z23printTwoDimDynamicArrayPfii
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
pushq %rax
.cfi_def_cfa_offset 64
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %esi, 4(%rsp) # 4-byte Spill
testl %edx, %edx
je .LBB2_6
# %bb.1: # %.preheader.lr.ph
movq %rdi, %r14
movslq 4(%rsp), %r15 # 4-byte Folded Reload
movl %edx, %r12d
movl %r15d, %r13d
shlq $2, %r15
xorl %ebp, %ebp
jmp .LBB2_2
.p2align 4, 0x90
.LBB2_5: # %._crit_edge
# in Loop: Header=BB2_2 Depth=1
movl $10, %edi
callq putchar@PLT
incq %rbp
addq %r15, %r14
cmpq %r12, %rbp
je .LBB2_6
.LBB2_2: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB2_4 Depth 2
cmpl $0, 4(%rsp) # 4-byte Folded Reload
je .LBB2_5
# %bb.3: # %.lr.ph
# in Loop: Header=BB2_2 Depth=1
xorl %ebx, %ebx
.p2align 4, 0x90
.LBB2_4: # Parent Loop BB2_2 Depth=1
# => This Inner Loop Header: Depth=2
movss (%r14,%rbx,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.5, %edi
movb $1, %al
callq printf
incq %rbx
cmpq %rbx, %r13
jne .LBB2_4
jmp .LBB2_5
.LBB2_6: # %._crit_edge16
addq $8, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end2:
.size _Z23printTwoDimDynamicArrayPfii, .Lfunc_end2-_Z23printTwoDimDynamicArrayPfii
.cfi_endproc
# -- End function
.globl _Z27__device_stub__MatMulKernelPfS_S_i # -- Begin function _Z27__device_stub__MatMulKernelPfS_S_i
.p2align 4, 0x90
.type _Z27__device_stub__MatMulKernelPfS_S_i,@function
_Z27__device_stub__MatMulKernelPfS_S_i: # @_Z27__device_stub__MatMulKernelPfS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z12MatMulKernelPfS_S_i, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end3:
.size _Z27__device_stub__MatMulKernelPfS_S_i, .Lfunc_end3-_Z27__device_stub__MatMulKernelPfS_S_i
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB4_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB4_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z12MatMulKernelPfS_S_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end4:
.size __hip_module_ctor, .Lfunc_end4-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB5_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB5_2:
retq
.Lfunc_end5:
.size __hip_module_dtor, .Lfunc_end5-__hip_module_dtor
.cfi_endproc
# -- End function
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "CPU time: %13lf msec\n"
.size .L.str, 22
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "MxN[%d][%d] = %2.0f P[%d][%d] = %2.0f\n"
.size .L.str.1, 41
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "Test %s\n"
.size .L.str.2, 9
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "PASSED"
.size .L.str.3, 7
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "FAILED"
.size .L.str.4, 7
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "%f "
.size .L.str.5, 4
.type _Z12MatMulKernelPfS_S_i,@object # @_Z12MatMulKernelPfS_S_i
.section .rodata,"a",@progbits
.globl _Z12MatMulKernelPfS_S_i
.p2align 3, 0x0
_Z12MatMulKernelPfS_S_i:
.quad _Z27__device_stub__MatMulKernelPfS_S_i
.size _Z12MatMulKernelPfS_S_i, 8
.type .L.str.8,@object # @.str.8
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.8:
.asciz "before kernel call: error = %s\n"
.size .L.str.8, 32
.type .L.str.9,@object # @.str.9
.L.str.9:
.asciz "GPU time: %13f msec\n"
.size .L.str.9, 21
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z12MatMulKernelPfS_S_i"
.size .L__unnamed_1, 24
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "============================"
.size .Lstr, 29
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z27__device_stub__MatMulKernelPfS_S_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z12MatMulKernelPfS_S_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z12MatMulKernelPfS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e280000002100 */
/*0030*/ S2R R7, SR_CTAID.Y ; /* 0x0000000000077919 */
/* 0x000e680000002600 */
/*0040*/ S2R R2, SR_TID.Y ; /* 0x0000000000027919 */
/* 0x000e620000002200 */
/*0050*/ IMAD R0, R0, c[0x0][0x0], R3 ; /* 0x0000000000007a24 */
/* 0x001fca00078e0203 */
/*0060*/ ISETP.GT.AND P0, PT, R0, 0xff, PT ; /* 0x000000ff0000780c */
/* 0x000fe20003f04270 */
/*0070*/ IMAD R7, R7, c[0x0][0x4], R2 ; /* 0x0000010007077a24 */
/* 0x002fca00078e0202 */
/*0080*/ ISETP.GT.OR P0, PT, R7, 0xff, P0 ; /* 0x000000ff0700780c */
/* 0x000fda0000704670 */
/*0090*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*00a0*/ HFMA2.MMA R4, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff047435 */
/* 0x000fe200000001ff */
/*00b0*/ SHF.L.U32 R7, R7, 0x8, RZ ; /* 0x0000000807077819 */
/* 0x000fe200000006ff */
/*00c0*/ HFMA2.MMA R8, -RZ, RZ, 0, 0 ; /* 0x00000000ff087435 */
/* 0x000fe200000001ff */
/*00d0*/ SHF.R.S32.HI R6, RZ, 0x1f, R0 ; /* 0x0000001fff067819 */
/* 0x000fe20000011400 */
/*00e0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*00f0*/ MOV R15, RZ ; /* 0x000000ff000f7202 */
/* 0x000fca0000000f00 */
/*0100*/ IMAD.WIDE R2, R0, R4, c[0x0][0x168] ; /* 0x00005a0000027625 */
/* 0x000fc800078e0204 */
/*0110*/ IMAD.WIDE R4, R7, R4, c[0x0][0x160] ; /* 0x0000580007047625 */
/* 0x000fe200078e0204 */
/*0120*/ IADD3 R10, P0, R2, 0x2000, RZ ; /* 0x00002000020a7810 */
/* 0x000fc80007f1e0ff */
/*0130*/ IADD3 R2, P1, R4, 0x20, RZ ; /* 0x0000002004027810 */
/* 0x000fe40007f3e0ff */
/*0140*/ IADD3.X R11, RZ, R3, RZ, P0, !PT ; /* 0x00000003ff0b7210 */
/* 0x000fc600007fe4ff */
/*0150*/ IMAD.X R3, RZ, RZ, R5, P1 ; /* 0x000000ffff037224 */
/* 0x000fc600008e0605 */
/*0160*/ IMAD.MOV.U32 R4, RZ, RZ, R10 ; /* 0x000000ffff047224 */
/* 0x000fe200078e000a */
/*0170*/ MOV R5, R11 ; /* 0x0000000b00057202 */
/* 0x000fe20000000f00 */
/*0180*/ LDG.E R17, [R2.64+-0x20] ; /* 0xffffe00402117981 */
/* 0x000ea8000c1e1900 */
/*0190*/ LDG.E R16, [R4.64+-0x2000] ; /* 0xffe0000404107981 */
/* 0x000ea8000c1e1900 */
/*01a0*/ LDG.E R18, [R4.64+-0x1c00] ; /* 0xffe4000404127981 */
/* 0x000ee8000c1e1900 */
/*01b0*/ LDG.E R25, [R2.64+-0x1c] ; /* 0xffffe40402197981 */
/* 0x000ee8000c1e1900 */
/*01c0*/ LDG.E R19, [R4.64+-0x1800] ; /* 0xffe8000404137981 */
/* 0x000f28000c1e1900 */
/*01d0*/ LDG.E R20, [R2.64+-0x18] ; /* 0xffffe80402147981 */
/* 0x000f28000c1e1900 */
/*01e0*/ LDG.E R22, [R4.64+-0x1400] ; /* 0xffec000404167981 */
/* 0x000f68000c1e1900 */
/*01f0*/ LDG.E R21, [R2.64+-0x14] ; /* 0xffffec0402157981 */
/* 0x000f68000c1e1900 */
/*0200*/ LDG.E R23, [R4.64+-0x1000] ; /* 0xfff0000404177981 */
/* 0x000f68000c1e1900 */
/*0210*/ LDG.E R24, [R2.64+-0x10] ; /* 0xfffff00402187981 */
/* 0x000f68000c1e1900 */
/*0220*/ LDG.E R9, [R4.64+-0xc00] ; /* 0xfff4000404097981 */
/* 0x000f68000c1e1900 */
/*0230*/ LDG.E R10, [R2.64+-0xc] ; /* 0xfffff404020a7981 */
/* 0x000f68000c1e1900 */
/*0240*/ LDG.E R11, [R4.64+-0x800] ; /* 0xfff80004040b7981 */
/* 0x000f68000c1e1900 */
/*0250*/ LDG.E R12, [R2.64+-0x8] ; /* 0xfffff804020c7981 */
/* 0x000f68000c1e1900 */
/*0260*/ LDG.E R13, [R4.64+-0x400] ; /* 0xfffc0004040d7981 */
/* 0x000f68000c1e1900 */
/*0270*/ LDG.E R14, [R2.64+-0x4] ; /* 0xfffffc04020e7981 */
/* 0x000f62000c1e1900 */
/*0280*/ FFMA R17, R16, R17, R15 ; /* 0x0000001110117223 */
/* 0x004fc6000000000f */
/*0290*/ LDG.E R15, [R4.64] ; /* 0x00000004040f7981 */
/* 0x000ea8000c1e1900 */
/*02a0*/ LDG.E R16, [R2.64] ; /* 0x0000000402107981 */
/* 0x0000a2000c1e1900 */
/*02b0*/ FFMA R25, R18, R25, R17 ; /* 0x0000001912197223 */
/* 0x008fc60000000011 */
/*02c0*/ LDG.E R17, [R4.64+0x400] ; /* 0x0004000404117981 */
/* 0x000ee8000c1e1900 */
/*02d0*/ LDG.E R18, [R2.64+0x4] ; /* 0x0000040402127981 */
/* 0x0000e2000c1e1900 */
/*02e0*/ FFMA R25, R19, R20, R25 ; /* 0x0000001413197223 */
/* 0x010fc60000000019 */
/*02f0*/ LDG.E R19, [R4.64+0x800] ; /* 0x0008000404137981 */
/* 0x000f28000c1e1900 */
/*0300*/ LDG.E R20, [R2.64+0x8] ; /* 0x0000080402147981 */
/* 0x000122000c1e1900 */
/*0310*/ FFMA R25, R22, R21, R25 ; /* 0x0000001516197223 */
/* 0x020fc60000000019 */
/*0320*/ LDG.E R21, [R4.64+0xc00] ; /* 0x000c000404157981 */
/* 0x000f68000c1e1900 */
/*0330*/ LDG.E R22, [R2.64+0xc] ; /* 0x00000c0402167981 */
/* 0x000162000c1e1900 */
/*0340*/ FFMA R25, R23, R24, R25 ; /* 0x0000001817197223 */
/* 0x000fc60000000019 */
/*0350*/ LDG.E R23, [R4.64+0x1000] ; /* 0x0010000404177981 */
/* 0x000f68000c1e1900 */
/*0360*/ LDG.E R24, [R2.64+0x10] ; /* 0x0000100402187981 */
/* 0x000162000c1e1900 */
/*0370*/ FFMA R25, R9, R10, R25 ; /* 0x0000000a09197223 */
/* 0x000fc60000000019 */
/*0380*/ LDG.E R9, [R4.64+0x1400] ; /* 0x0014000404097981 */
/* 0x000f68000c1e1900 */
/*0390*/ LDG.E R10, [R2.64+0x14] ; /* 0x00001404020a7981 */
/* 0x000162000c1e1900 */
/*03a0*/ FFMA R25, R11, R12, R25 ; /* 0x0000000c0b197223 */
/* 0x000fc60000000019 */
/*03b0*/ LDG.E R12, [R4.64+0x1800] ; /* 0x00180004040c7981 */
/* 0x000f68000c1e1900 */
/*03c0*/ LDG.E R11, [R2.64+0x18] ; /* 0x00001804020b7981 */
/* 0x000162000c1e1900 */
/*03d0*/ FFMA R25, R13, R14, R25 ; /* 0x0000000e0d197223 */
/* 0x000fc60000000019 */
/*03e0*/ LDG.E R13, [R4.64+0x1c00] ; /* 0x001c0004040d7981 */
/* 0x000f68000c1e1900 */
/*03f0*/ LDG.E R14, [R2.64+0x1c] ; /* 0x00001c04020e7981 */
/* 0x000162000c1e1900 */
/*0400*/ IADD3 R8, R8, 0x10, RZ ; /* 0x0000001008087810 */
/* 0x000fc80007ffe0ff */
/*0410*/ ISETP.NE.AND P0, PT, R8, 0x100, PT ; /* 0x000001000800780c */
/* 0x000fe40003f05270 */
/*0420*/ IADD3 R2, P2, R2, 0x40, RZ ; /* 0x0000004002027810 */
/* 0x001fc80007f5e0ff */
/*0430*/ IADD3.X R3, RZ, R3, RZ, P2, !PT ; /* 0x00000003ff037210 */
/* 0x000fe200017fe4ff */
/*0440*/ FFMA R15, R15, R16, R25 ; /* 0x000000100f0f7223 */
/* 0x004fc80000000019 */
/*0450*/ FFMA R15, R17, R18, R15 ; /* 0x00000012110f7223 */
/* 0x008fc8000000000f */
/*0460*/ FFMA R15, R19, R20, R15 ; /* 0x00000014130f7223 */
/* 0x010fc8000000000f */
/*0470*/ FFMA R15, R21, R22, R15 ; /* 0x00000016150f7223 */
/* 0x020fc8000000000f */
/*0480*/ FFMA R15, R23, R24, R15 ; /* 0x00000018170f7223 */
/* 0x000fc8000000000f */
/*0490*/ FFMA R9, R9, R10, R15 ; /* 0x0000000a09097223 */
/* 0x000fe2000000000f */
/*04a0*/ IADD3 R10, P1, R4, 0x4000, RZ ; /* 0x00004000040a7810 */
/* 0x000fc60007f3e0ff */
/*04b0*/ FFMA R9, R12, R11, R9 ; /* 0x0000000b0c097223 */
/* 0x000fe20000000009 */
/*04c0*/ IADD3.X R11, RZ, R5, RZ, P1, !PT ; /* 0x00000005ff0b7210 */
/* 0x000fc60000ffe4ff */
/*04d0*/ FFMA R15, R13, R14, R9 ; /* 0x0000000e0d0f7223 */
/* 0x000fe20000000009 */
/*04e0*/ @P0 BRA 0x160 ; /* 0xfffffc7000000947 */
/* 0x000fea000383ffff */
/*04f0*/ IADD3 R0, P0, R0, R7, RZ ; /* 0x0000000700007210 */
/* 0x000fc80007f1e0ff */
/*0500*/ LEA.HI.X.SX32 R7, R7, R6, 0x1, P0 ; /* 0x0000000607077211 */
/* 0x000fe400000f0eff */
/*0510*/ LEA R2, P0, R0, c[0x0][0x170], 0x2 ; /* 0x00005c0000027a11 */
/* 0x000fc800078010ff */
/*0520*/ LEA.HI.X R3, R0, c[0x0][0x174], R7, 0x2, P0 ; /* 0x00005d0000037a11 */
/* 0x000fca00000f1407 */
/*0530*/ STG.E [R2.64], R15 ; /* 0x0000000f02007986 */
/* 0x000fe2000c101904 */
/*0540*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0550*/ BRA 0x550; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0560*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0570*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0580*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0590*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12MatMulKernelPfS_S_i
.globl _Z12MatMulKernelPfS_S_i
.p2align 8
.type _Z12MatMulKernelPfS_S_i,@function
_Z12MatMulKernelPfS_S_i:
s_load_b32 s2, s[0:1], 0x2c
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v4, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s3, s2, 16
s_and_b32 s2, s2, 0xffff
v_mad_u64_u32 v[2:3], null, s15, s3, v[1:2]
v_mad_u64_u32 v[0:1], null, s14, s2, v[4:5]
s_mov_b32 s2, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_max_i32_e32 v1, v2, v0
v_cmpx_gt_i32_e32 0x100, v1
s_cbranch_execz .LBB0_4
s_load_b128 s[4:7], s[0:1], 0x0
v_lshlrev_b32_e32 v3, 8, v2
v_ashrrev_i32_e32 v1, 31, v0
v_mov_b32_e32 v5, 0
s_mov_b64 s[2:3], 0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_ashrrev_i32_e32 v4, 31, v3
v_lshlrev_b64 v[8:9], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[3:4], 2, v[3:4]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v6, vcc_lo, s4, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_ci_u32_e32 v7, vcc_lo, s5, v4, vcc_lo
v_add_co_u32 v3, vcc_lo, s6, v8
v_add_co_ci_u32_e32 v4, vcc_lo, s7, v9, vcc_lo
.LBB0_2:
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v8, vcc_lo, v6, s2
v_add_co_ci_u32_e32 v9, vcc_lo, s3, v7, vcc_lo
s_add_u32 s2, s2, 4
s_addc_u32 s3, s3, 0
global_load_b32 v10, v[3:4], off
global_load_b32 v8, v[8:9], off
v_add_co_u32 v3, vcc_lo, v3, 0x400
v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
s_cmpk_eq_i32 s2, 0x400
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v5, v8, v10
s_cbranch_scc0 .LBB0_2
s_load_b64 s[0:1], s[0:1], 0x10
v_lshlrev_b32_e32 v2, 8, v2
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s0, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, v2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, v3, v1, vcc_lo
global_store_b32 v[0:1], v5, off
.LBB0_4:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z12MatMulKernelPfS_S_i
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 288
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 11
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z12MatMulKernelPfS_S_i, .Lfunc_end0-_Z12MatMulKernelPfS_S_i
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: hidden_block_count_x
- .offset: 36
.size: 4
.value_kind: hidden_block_count_y
- .offset: 40
.size: 4
.value_kind: hidden_block_count_z
- .offset: 44
.size: 2
.value_kind: hidden_group_size_x
- .offset: 46
.size: 2
.value_kind: hidden_group_size_y
- .offset: 48
.size: 2
.value_kind: hidden_group_size_z
- .offset: 50
.size: 2
.value_kind: hidden_remainder_x
- .offset: 52
.size: 2
.value_kind: hidden_remainder_y
- .offset: 54
.size: 2
.value_kind: hidden_remainder_z
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 96
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 288
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z12MatMulKernelPfS_S_i
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z12MatMulKernelPfS_S_i.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 11
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001bb9c0_00000000-6_matrix.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2062:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2062:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%f "
.LC1:
.string "\n"
.text
.globl _Z23printTwoDimDynamicArrayPfii
.type _Z23printTwoDimDynamicArrayPfii, @function
_Z23printTwoDimDynamicArrayPfii:
.LFB2058:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $40, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 16(%rsp)
testl %edx, %edx
je .L3
movl %esi, %r15d
movslq %edx, %rax
movq %rax, 8(%rsp)
movl $0, %r14d
movl $0, %r13d
movslq %esi, %rax
movq %rax, 24(%rsp)
leaq .LC0(%rip), %r12
jmp .L5
.L7:
movslq %r14d, %rax
movq 16(%rsp), %rcx
leaq (%rcx,%rax,4), %rbx
movq 24(%rsp), %rdx
addq %rdx, %rax
leaq (%rcx,%rax,4), %rbp
.L6:
pxor %xmm0, %xmm0
cvtss2sd (%rbx), %xmm0
movq %r12, %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
addq $4, %rbx
cmpq %rbp, %rbx
jne .L6
.L8:
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $1, %r13
addl %r15d, %r14d
movq 8(%rsp), %rax
cmpq %rax, %r13
je .L3
.L5:
testl %r15d, %r15d
jne .L7
jmp .L8
.L3:
addq $40, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2058:
.size _Z23printTwoDimDynamicArrayPfii, .-_Z23printTwoDimDynamicArrayPfii
.globl _Z37__device_stub__Z12MatMulKernelPfS_S_iPfS_S_i
.type _Z37__device_stub__Z12MatMulKernelPfS_S_iPfS_S_i, @function
_Z37__device_stub__Z12MatMulKernelPfS_S_iPfS_S_i:
.LFB2084:
.cfi_startproc
endbr64
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movl %ecx, 4(%rsp)
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
leaq 4(%rsp), %rax
movq %rax, 120(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L15
.L11:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L16
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L15:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 168
pushq 40(%rsp)
.cfi_def_cfa_offset 176
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z12MatMulKernelPfS_S_i(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 160
jmp .L11
.L16:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2084:
.size _Z37__device_stub__Z12MatMulKernelPfS_S_iPfS_S_i, .-_Z37__device_stub__Z12MatMulKernelPfS_S_iPfS_S_i
.globl _Z12MatMulKernelPfS_S_i
.type _Z12MatMulKernelPfS_S_i, @function
_Z12MatMulKernelPfS_S_i:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z37__device_stub__Z12MatMulKernelPfS_S_iPfS_S_i
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _Z12MatMulKernelPfS_S_i, .-_Z12MatMulKernelPfS_S_i
.section .rodata.str1.1
.LC2:
.string "============================\n"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC3:
.string "before kernel call: error = %s\n"
.section .rodata.str1.1
.LC4:
.string "GPU time: %13f msec\n"
.text
.globl _Z6MatMulPfS_S_i
.type _Z6MatMulPfS_S_i, @function
_Z6MatMulPfS_S_i:
.LFB2059:
.cfi_startproc
endbr64
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $88, %rsp
.cfi_def_cfa_offset 128
movq %rdi, %r12
movq %rsi, %rbp
movq %rdx, %r13
movl %ecx, %ebx
movq %fs:40, %rax
movq %rax, 72(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rdi
movl $262144, %esi
call cudaMalloc@PLT
movl $1, %ecx
movl $262144, %edx
movq %r12, %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
leaq 16(%rsp), %rdi
movl $262144, %esi
call cudaMalloc@PLT
movl $1, %ecx
movl $262144, %edx
movq %rbp, %rsi
movq 16(%rsp), %rdi
call cudaMemcpy@PLT
leaq 24(%rsp), %rdi
movl $262144, %esi
call cudaMalloc@PLT
movl $8, 48(%rsp)
movl $8, 52(%rsp)
movl $1, 56(%rsp)
movl %ebx, 60(%rsp)
movl %ebx, 64(%rsp)
movl $1, 68(%rsp)
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq 32(%rsp), %rdi
call cudaEventCreate@PLT
leaq 40(%rsp), %rdi
call cudaEventCreate@PLT
movl $0, %esi
movq 32(%rsp), %rdi
call cudaEventRecord@PLT
movl 68(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 60(%rsp), %rdx
movq 48(%rsp), %rdi
movl 56(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L24
.L20:
call cudaGetLastError@PLT
testl %eax, %eax
jne .L25
movl $0, %esi
movq 40(%rsp), %rdi
call cudaEventRecord@PLT
movq 40(%rsp), %rdi
call cudaEventSynchronize@PLT
leaq 4(%rsp), %rdi
movq 40(%rsp), %rdx
movq 32(%rsp), %rsi
call cudaEventElapsedTime@PLT
pxor %xmm0, %xmm0
cvtss2sd 4(%rsp), %xmm0
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movq 32(%rsp), %rdi
call cudaEventDestroy@PLT
movq 40(%rsp), %rdi
call cudaEventDestroy@PLT
movl $2, %ecx
movl $262144, %edx
movq 24(%rsp), %rsi
movq %r13, %rdi
call cudaMemcpy@PLT
movq 8(%rsp), %rdi
call cudaFree@PLT
movq 16(%rsp), %rdi
call cudaFree@PLT
movq 24(%rsp), %rdi
call cudaFree@PLT
movq 72(%rsp), %rax
subq %fs:40, %rax
jne .L26
addq $88, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L24:
.cfi_restore_state
movl %ebx, %ecx
movq 24(%rsp), %rdx
movq 16(%rsp), %rsi
movq 8(%rsp), %rdi
call _Z37__device_stub__Z12MatMulKernelPfS_S_iPfS_S_i
jmp .L20
.L25:
movl %eax, %edi
call cudaGetErrorString@PLT
movq %rax, %rdx
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %edi
call exit@PLT
.L26:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2059:
.size _Z6MatMulPfS_S_i, .-_Z6MatMulPfS_S_i
.section .rodata.str1.1
.LC5:
.string "PASSED"
.LC6:
.string "FAILED"
.LC8:
.string "CPU time: %13lf msec\n"
.section .rodata.str1.8
.align 8
.LC9:
.string "MxN[%d][%d] = %2.0f P[%d][%d] = %2.0f\n"
.section .rodata.str1.1
.LC10:
.string "Test %s\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $88, %rsp
.cfi_def_cfa_offset 144
movq %fs:40, %rax
movq %rax, 72(%rsp)
xorl %eax, %eax
movl $262144, %edi
call malloc@PLT
movq %rax, %r14
movl $262144, %edi
call malloc@PLT
movq %rax, %r15
movl $262144, %edi
call malloc@PLT
movq %rax, 16(%rsp)
movl $262144, %edi
call malloc@PLT
movq %rax, %rbx
leaq 1024(%r14), %r12
leaq 263168(%r14), %r13
.L28:
leaq -1024(%r12), %rbp
.L29:
call rand@PLT
movslq %eax, %rdx
imulq $1717986919, %rdx, %rdx
sarq $33, %rdx
movl %eax, %ecx
sarl $31, %ecx
subl %ecx, %edx
leal (%rdx,%rdx,4), %edx
subl %edx, %eax
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
movss %xmm0, 0(%rbp)
addq $4, %rbp
cmpq %r12, %rbp
jne .L29
addq $1024, %r12
cmpq %r13, %r12
jne .L28
leaq 1024(%r15), %r12
leaq 263168(%r15), %r13
.L30:
leaq -1024(%r12), %rbp
.L31:
call rand@PLT
movslq %eax, %rdx
imulq $1717986919, %rdx, %rdx
sarq $33, %rdx
movl %eax, %ecx
sarl $31, %ecx
subl %ecx, %edx
leal (%rdx,%rdx,4), %edx
subl %edx, %eax
pxor %xmm0, %xmm0
cvtsi2ssl %eax, %xmm0
movss %xmm0, 0(%rbp)
addq $4, %rbp
cmpq %r12, %rbp
jne .L31
addq $1024, %r12
cmpq %r13, %r12
jne .L30
leaq 32(%rsp), %rdi
movl $0, %esi
call gettimeofday@PLT
movl $0, %r9d
.L33:
leaq 262144(%r15), %rcx
movq %rbx, %r12
movq %r9, %r8
salq $10, %r8
leaq (%rbx,%r8), %rdi
addq %r14, %r8
movl $0, %esi
.L37:
movss (%rdi,%rsi,4), %xmm1
leaq -262144(%rcx), %rax
movq %r8, %rdx
.L34:
movss (%rdx), %xmm0
mulss (%rax), %xmm0
addss %xmm0, %xmm1
addq $4, %rdx
addq $1024, %rax
cmpq %rcx, %rax
jne .L34
movss %xmm1, (%rdi,%rsi,4)
addq $1, %rsi
addq $4, %rcx
cmpq $256, %rsi
jne .L37
addq $1, %r9
cmpq $256, %r9
jne .L33
leaq 48(%rsp), %rdi
movl $0, %esi
call gettimeofday@PLT
movq 48(%rsp), %rax
subq 32(%rsp), %rax
pxor %xmm1, %xmm1
cvtsi2sdq %rax, %xmm1
movsd .LC7(%rip), %xmm2
mulsd %xmm2, %xmm1
movq 56(%rsp), %rax
subq 40(%rsp), %rax
pxor %xmm0, %xmm0
cvtsi2sdq %rax, %xmm0
divsd %xmm2, %xmm0
addsd %xmm1, %xmm0
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
movl $32, %ecx
movq 16(%rsp), %rbp
movq %rbp, %rdx
movq %r15, %rsi
movq %r14, %rdi
call _Z6MatMulPfS_S_i
movl $1, 12(%rsp)
movl $0, %r13d
movq %rbx, %rax
jmp .L38
.L46:
movl %ebx, %ecx
cvtss2sd %xmm0, %xmm0
cvtss2sd %xmm1, %xmm1
movl %ebx, %r9d
movl %r13d, %r8d
movl %r13d, %edx
leaq .LC9(%rip), %rsi
movl $2, %edi
movl $2, %eax
call __printf_chk@PLT
movl $0, 12(%rsp)
.L39:
addq $1, %rbx
cmpq $256, %rbx
je .L53
.L41:
movss (%r12,%rbx,4), %xmm0
movss 0(%rbp,%rbx,4), %xmm1
ucomiss %xmm1, %xmm0
jp .L46
je .L39
jmp .L46
.L53:
movq %r14, %rax
movq 24(%rsp), %r14
addl $1, %r13d
addq $1024, %r12
addq $1024, %rbp
cmpl $256, %r13d
je .L42
.L38:
movl $0, %ebx
movq %r14, 24(%rsp)
movq %rax, %r14
jmp .L41
.L42:
movq %rax, %rbx
movq %r14, %rdi
call free@PLT
movq %r15, %rdi
call free@PLT
movq 16(%rsp), %rdi
call free@PLT
movq %rbx, %rdi
call free@PLT
cmpl $0, 12(%rsp)
leaq .LC6(%rip), %rdx
leaq .LC5(%rip), %rax
cmovne %rax, %rdx
leaq .LC10(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 72(%rsp), %rax
subq %fs:40, %rax
jne .L54
movl $0, %eax
addq $88, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L54:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.1
.LC11:
.string "_Z12MatMulKernelPfS_S_i"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2087:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC11(%rip), %rdx
movq %rdx, %rcx
leaq _Z12MatMulKernelPfS_S_i(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2087:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC7:
.long 0
.long 1083129856
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "matrix.hip"
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI0_0:
.quad 0x408f400000000000 # double 1000
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $56, %rsp
.cfi_def_cfa_offset 112
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl $262144, %edi # imm = 0x40000
callq malloc
movq %rax, %rbp
movl $262144, %edi # imm = 0x40000
callq malloc
movq %rax, %r13
movl $262144, %edi # imm = 0x40000
callq malloc
movq %rax, (%rsp) # 8-byte Spill
movl $262144, %edi # imm = 0x40000
callq malloc
movq %rax, %rbx
xorl %r14d, %r14d
movq %rbp, %r15
.p2align 4, 0x90
.LBB0_1: # %.preheader73
# =>This Loop Header: Depth=1
# Child Loop BB0_2 Depth 2
xorl %r12d, %r12d
.p2align 4, 0x90
.LBB0_2: # Parent Loop BB0_1 Depth=1
# => This Inner Loop Header: Depth=2
callq rand
cltq
imulq $1717986919, %rax, %rcx # imm = 0x66666667
movq %rcx, %rdx
shrq $63, %rdx
sarq $33, %rcx
addl %edx, %ecx
leal (%rcx,%rcx,4), %ecx
subl %ecx, %eax
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
movss %xmm0, (%r15,%r12,4)
incq %r12
cmpq $256, %r12 # imm = 0x100
jne .LBB0_2
# %bb.3: # in Loop: Header=BB0_1 Depth=1
incq %r14
addq $1024, %r15 # imm = 0x400
cmpq $256, %r14 # imm = 0x100
jne .LBB0_1
# %bb.4: # %.preheader71.preheader
xorl %r14d, %r14d
movq %r13, %r15
.p2align 4, 0x90
.LBB0_5: # %.preheader71
# =>This Loop Header: Depth=1
# Child Loop BB0_6 Depth 2
xorl %r12d, %r12d
.p2align 4, 0x90
.LBB0_6: # Parent Loop BB0_5 Depth=1
# => This Inner Loop Header: Depth=2
callq rand
cltq
imulq $1717986919, %rax, %rcx # imm = 0x66666667
movq %rcx, %rdx
shrq $63, %rdx
sarq $33, %rcx
addl %edx, %ecx
leal (%rcx,%rcx,4), %ecx
subl %ecx, %eax
xorps %xmm0, %xmm0
cvtsi2ss %eax, %xmm0
movss %xmm0, (%r15,%r12,4)
incq %r12
cmpq $256, %r12 # imm = 0x100
jne .LBB0_6
# %bb.7: # in Loop: Header=BB0_5 Depth=1
incq %r14
addq $1024, %r15 # imm = 0x400
cmpq $256, %r14 # imm = 0x100
jne .LBB0_5
# %bb.8:
xorl %r15d, %r15d
leaq 40(%rsp), %rdi
xorl %esi, %esi
callq gettimeofday
movq %rbp, %rax
.p2align 4, 0x90
.LBB0_9: # %.preheader70
# =>This Loop Header: Depth=1
# Child Loop BB0_10 Depth 2
# Child Loop BB0_11 Depth 3
movq %r15, %rcx
shlq $8, %rcx
movq %r13, %rdx
xorl %esi, %esi
.p2align 4, 0x90
.LBB0_10: # %.preheader69
# Parent Loop BB0_9 Depth=1
# => This Loop Header: Depth=2
# Child Loop BB0_11 Depth 3
movq %rsi, %rdi
orq %rcx, %rdi
movss (%rbx,%rdi,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
movq %rdx, %r8
xorl %r9d, %r9d
.p2align 4, 0x90
.LBB0_11: # Parent Loop BB0_9 Depth=1
# Parent Loop BB0_10 Depth=2
# => This Inner Loop Header: Depth=3
movss (%rax,%r9,4), %xmm1 # xmm1 = mem[0],zero,zero,zero
mulss (%r8), %xmm1
addss %xmm1, %xmm0
incq %r9
addq $1024, %r8 # imm = 0x400
cmpq $256, %r9 # imm = 0x100
jne .LBB0_11
# %bb.12: # in Loop: Header=BB0_10 Depth=2
movss %xmm0, (%rbx,%rdi,4)
incq %rsi
addq $4, %rdx
cmpq $256, %rsi # imm = 0x100
jne .LBB0_10
# %bb.13: # in Loop: Header=BB0_9 Depth=1
incq %r15
addq $1024, %rax # imm = 0x400
cmpq $256, %r15 # imm = 0x100
jne .LBB0_9
# %bb.14:
movq %r13, %r14
xorl %r13d, %r13d
leaq 24(%rsp), %rdi
xorl %esi, %esi
callq gettimeofday
movq 24(%rsp), %rax
movq 32(%rsp), %rcx
subq 40(%rsp), %rax
xorps %xmm1, %xmm1
cvtsi2sd %rax, %xmm1
movsd .LCPI0_0(%rip), %xmm2 # xmm2 = mem[0],zero
mulsd %xmm2, %xmm1
subq 48(%rsp), %rcx
xorps %xmm0, %xmm0
cvtsi2sd %rcx, %xmm0
divsd %xmm2, %xmm0
addsd %xmm1, %xmm0
movl $.L.str, %edi
movb $1, %al
callq printf
movq %rbp, 16(%rsp) # 8-byte Spill
movq %rbp, %rdi
movq %r14, 8(%rsp) # 8-byte Spill
movq %r14, %rsi
movq (%rsp), %r14 # 8-byte Reload
movq %r14, %rdx
movl $32, %ecx
callq _Z6MatMulPfS_S_i
movl $1, %r15d
movq %rbx, %r12
jmp .LBB0_15
.p2align 4, 0x90
.LBB0_19: # in Loop: Header=BB0_15 Depth=1
incq %r13
addq $1024, %r14 # imm = 0x400
addq $1024, %r12 # imm = 0x400
cmpq $256, %r13 # imm = 0x100
je .LBB0_20
.LBB0_15: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB0_16 Depth 2
xorl %ebp, %ebp
jmp .LBB0_16
.p2align 4, 0x90
.LBB0_18: # in Loop: Header=BB0_16 Depth=2
incq %rbp
cmpq $256, %rbp # imm = 0x100
je .LBB0_19
.LBB0_16: # Parent Loop BB0_15 Depth=1
# => This Inner Loop Header: Depth=2
movss (%r12,%rbp,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
movss (%r14,%rbp,4), %xmm1 # xmm1 = mem[0],zero,zero,zero
ucomiss %xmm1, %xmm0
jne .LBB0_17
jnp .LBB0_18
.LBB0_17: # in Loop: Header=BB0_16 Depth=2
cvtss2sd %xmm0, %xmm0
cvtss2sd %xmm1, %xmm1
movl $.L.str.1, %edi
movl %r13d, %esi
movl %ebp, %edx
movl %r13d, %ecx
movl %ebp, %r8d
movb $2, %al
callq printf
xorl %r15d, %r15d
jmp .LBB0_18
.LBB0_20:
movq 16(%rsp), %rdi # 8-byte Reload
callq free
movq 8(%rsp), %rdi # 8-byte Reload
callq free
movq (%rsp), %rdi # 8-byte Reload
callq free
movq %rbx, %rdi
callq free
testl %r15d, %r15d
movl $.L.str.4, %eax
movl $.L.str.3, %esi
cmoveq %rax, %rsi
movl $.L.str.2, %edi
xorl %eax, %eax
callq printf
xorl %eax, %eax
addq $56, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end0:
.size main, .Lfunc_end0-main
.cfi_endproc
# -- End function
.globl _Z6MatMulPfS_S_i # -- Begin function _Z6MatMulPfS_S_i
.p2align 4, 0x90
.type _Z6MatMulPfS_S_i,@function
_Z6MatMulPfS_S_i: # @_Z6MatMulPfS_S_i
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %rbx
.cfi_def_cfa_offset 40
subq $168, %rsp
.cfi_def_cfa_offset 208
.cfi_offset %rbx, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %ecx, %ebp
movq %rdx, %rbx
movq %rsi, %r14
movq %rdi, %r15
leaq 40(%rsp), %rdi
movl $262144, %esi # imm = 0x40000
callq hipMalloc
movq 40(%rsp), %rdi
movl $262144, %edx # imm = 0x40000
movq %r15, %rsi
movl $1, %ecx
callq hipMemcpy
leaq 32(%rsp), %rdi
movl $262144, %esi # imm = 0x40000
callq hipMalloc
movq 32(%rsp), %rdi
movl $262144, %edx # imm = 0x40000
movq %r14, %rsi
movl $1, %ecx
callq hipMemcpy
leaq 24(%rsp), %rdi
movl $262144, %esi # imm = 0x40000
callq hipMalloc
movl %ebp, %eax
movq %rax, %r14
shlq $32, %r14
orq %rax, %r14
movl $.Lstr, %edi
callq puts@PLT
leaq 16(%rsp), %rdi
callq hipEventCreate
leaq 8(%rsp), %rdi
callq hipEventCreate
movq 16(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movabsq $34359738376, %rdi # imm = 0x800000008
movl $1, %esi
movq %r14, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_2
# %bb.1:
movq 40(%rsp), %rax
movq 32(%rsp), %rcx
movq 24(%rsp), %rdx
movq %rax, 120(%rsp)
movq %rcx, 112(%rsp)
movq %rdx, 104(%rsp)
movl %ebp, 52(%rsp)
leaq 120(%rsp), %rax
movq %rax, 128(%rsp)
leaq 112(%rsp), %rax
movq %rax, 136(%rsp)
leaq 104(%rsp), %rax
movq %rax, 144(%rsp)
leaq 52(%rsp), %rax
movq %rax, 152(%rsp)
leaq 88(%rsp), %rdi
leaq 72(%rsp), %rsi
leaq 64(%rsp), %rdx
leaq 56(%rsp), %rcx
callq __hipPopCallConfiguration
movq 88(%rsp), %rsi
movl 96(%rsp), %edx
movq 72(%rsp), %rcx
movl 80(%rsp), %r8d
leaq 128(%rsp), %r9
movl $_Z12MatMulKernelPfS_S_i, %edi
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
pushq 72(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_2:
callq hipGetLastError
testl %eax, %eax
jne .LBB1_4
# %bb.3:
movq 8(%rsp), %rdi
xorl %esi, %esi
callq hipEventRecord
movq 8(%rsp), %rdi
callq hipEventSynchronize
movq 16(%rsp), %rsi
movq 8(%rsp), %rdx
leaq 128(%rsp), %rdi
callq hipEventElapsedTime
movss 128(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.9, %edi
movb $1, %al
callq printf
movq 16(%rsp), %rdi
callq hipEventDestroy
movq 8(%rsp), %rdi
callq hipEventDestroy
movq 24(%rsp), %rsi
movl $262144, %edx # imm = 0x40000
movq %rbx, %rdi
movl $2, %ecx
callq hipMemcpy
movq 40(%rsp), %rdi
callq hipFree
movq 32(%rsp), %rdi
callq hipFree
movq 24(%rsp), %rdi
callq hipFree
addq $168, %rsp
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB1_4:
.cfi_def_cfa_offset 208
movl %eax, %edi
callq hipGetErrorString
movl $.L.str.8, %edi
movq %rax, %rsi
xorl %eax, %eax
callq printf
movl $1, %edi
callq exit
.Lfunc_end1:
.size _Z6MatMulPfS_S_i, .Lfunc_end1-_Z6MatMulPfS_S_i
.cfi_endproc
# -- End function
.globl _Z23printTwoDimDynamicArrayPfii # -- Begin function _Z23printTwoDimDynamicArrayPfii
.p2align 4, 0x90
.type _Z23printTwoDimDynamicArrayPfii,@function
_Z23printTwoDimDynamicArrayPfii: # @_Z23printTwoDimDynamicArrayPfii
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
pushq %rax
.cfi_def_cfa_offset 64
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl %esi, 4(%rsp) # 4-byte Spill
testl %edx, %edx
je .LBB2_6
# %bb.1: # %.preheader.lr.ph
movq %rdi, %r14
movslq 4(%rsp), %r15 # 4-byte Folded Reload
movl %edx, %r12d
movl %r15d, %r13d
shlq $2, %r15
xorl %ebp, %ebp
jmp .LBB2_2
.p2align 4, 0x90
.LBB2_5: # %._crit_edge
# in Loop: Header=BB2_2 Depth=1
movl $10, %edi
callq putchar@PLT
incq %rbp
addq %r15, %r14
cmpq %r12, %rbp
je .LBB2_6
.LBB2_2: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB2_4 Depth 2
cmpl $0, 4(%rsp) # 4-byte Folded Reload
je .LBB2_5
# %bb.3: # %.lr.ph
# in Loop: Header=BB2_2 Depth=1
xorl %ebx, %ebx
.p2align 4, 0x90
.LBB2_4: # Parent Loop BB2_2 Depth=1
# => This Inner Loop Header: Depth=2
movss (%r14,%rbx,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.5, %edi
movb $1, %al
callq printf
incq %rbx
cmpq %rbx, %r13
jne .LBB2_4
jmp .LBB2_5
.LBB2_6: # %._crit_edge16
addq $8, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end2:
.size _Z23printTwoDimDynamicArrayPfii, .Lfunc_end2-_Z23printTwoDimDynamicArrayPfii
.cfi_endproc
# -- End function
.globl _Z27__device_stub__MatMulKernelPfS_S_i # -- Begin function _Z27__device_stub__MatMulKernelPfS_S_i
.p2align 4, 0x90
.type _Z27__device_stub__MatMulKernelPfS_S_i,@function
_Z27__device_stub__MatMulKernelPfS_S_i: # @_Z27__device_stub__MatMulKernelPfS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movq %rdx, 56(%rsp)
movl %ecx, 4(%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 56(%rsp), %rax
movq %rax, 96(%rsp)
leaq 4(%rsp), %rax
movq %rax, 104(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z12MatMulKernelPfS_S_i, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $136, %rsp
.cfi_adjust_cfa_offset -136
retq
.Lfunc_end3:
.size _Z27__device_stub__MatMulKernelPfS_S_i, .Lfunc_end3-_Z27__device_stub__MatMulKernelPfS_S_i
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB4_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB4_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z12MatMulKernelPfS_S_i, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end4:
.size __hip_module_ctor, .Lfunc_end4-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB5_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB5_2:
retq
.Lfunc_end5:
.size __hip_module_dtor, .Lfunc_end5-__hip_module_dtor
.cfi_endproc
# -- End function
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "CPU time: %13lf msec\n"
.size .L.str, 22
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "MxN[%d][%d] = %2.0f P[%d][%d] = %2.0f\n"
.size .L.str.1, 41
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "Test %s\n"
.size .L.str.2, 9
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "PASSED"
.size .L.str.3, 7
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "FAILED"
.size .L.str.4, 7
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "%f "
.size .L.str.5, 4
.type _Z12MatMulKernelPfS_S_i,@object # @_Z12MatMulKernelPfS_S_i
.section .rodata,"a",@progbits
.globl _Z12MatMulKernelPfS_S_i
.p2align 3, 0x0
_Z12MatMulKernelPfS_S_i:
.quad _Z27__device_stub__MatMulKernelPfS_S_i
.size _Z12MatMulKernelPfS_S_i, 8
.type .L.str.8,@object # @.str.8
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.8:
.asciz "before kernel call: error = %s\n"
.size .L.str.8, 32
.type .L.str.9,@object # @.str.9
.L.str.9:
.asciz "GPU time: %13f msec\n"
.size .L.str.9, 21
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z12MatMulKernelPfS_S_i"
.size .L__unnamed_1, 24
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "============================"
.size .Lstr, 29
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z27__device_stub__MatMulKernelPfS_S_i
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z12MatMulKernelPfS_S_i
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <stdlib.h>
#include <cuda_runtime.h>
#define BLOCK_DIM 128
const int size_x = 128;
const int size_y = 1;
__global__ static void threadDemo(unsigned int * ret)
{
unsigned int xIndex = blockDim.x *blockIdx.x + threadIdx.x;
unsigned int yIndex = blockDim.y * blockIdx.y + threadIdx.y;
printf("block Dim (%d, %d) \n", blockDim.x, blockDim.y);
printf("block id (%d, %d)\n", blockIdx.x, blockIdx.y);
printf("thread id (%d, %d) \n", threadIdx.x, threadIdx.y);
if (xIndex < size_x && yIndex < size_y) {
unsigned int index = xIndex + size_x * yIndex;
ret[index] = xIndex;
ret[index + size_x * size_y] = yIndex;
}
}
void ThreadDemo(void)
{
unsigned int * ret = 0;
unsigned int host_ret[size_x*size_y*2] = {0};
int i = 0;
cudaMalloc((void**) &ret, sizeof(unsigned int)*(size_x*size_y*2));
dim3 grid(size_x / BLOCK_DIM, 1);
dim3 block(BLOCK_DIM, 1, 1);
threadDemo<<<grid,block>>>(ret);
cudaMemcpy(&host_ret, ret, sizeof(unsigned int)*(size_x*size_y*2), cudaMemcpyDeviceToHost);
for (i = 0; i < size_x*size_y; i++) {
printf("(%u,%u)", host_ret[i], host_ret[size_x*size_y+i]);
}
cudaFree(ret);
} | code for sm_80
Function : _Z10threadDemoPj
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fca00078e00ff */
/*0010*/ IADD3 R1, R1, -0x8, RZ ; /* 0xfffffff801017810 */
/* 0x000fe20007ffe0ff */
/*0020*/ IMAD.MOV.U32 R8, RZ, RZ, c[0x0][0x0] ; /* 0x00000000ff087624 */
/* 0x000fe200078e00ff */
/*0030*/ S2R R16, SR_CTAID.X ; /* 0x0000000000107919 */
/* 0x000e220000002500 */
/*0040*/ IMAD.MOV.U32 R9, RZ, RZ, c[0x0][0x4] ; /* 0x00000100ff097624 */
/* 0x000fe200078e00ff */
/*0050*/ MOV R26, 0x0 ; /* 0x00000000001a7802 */
/* 0x000fe20000000f00 */
/*0060*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x4][0x8] ; /* 0x01000200ff047624 */
/* 0x000fe200078e00ff */
/*0070*/ S2R R18, SR_TID.X ; /* 0x0000000000127919 */
/* 0x000e220000002100 */
/*0080*/ IADD3 R25, P0, R1, c[0x0][0x20], RZ ; /* 0x0000080001197a10 */
/* 0x000fe20007f1e0ff */
/*0090*/ LDC.64 R2, c[0x4][R26] ; /* 0x010000001a027b82 */
/* 0x0002a20000000a00 */
/*00a0*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x4][0xc] ; /* 0x01000300ff057624 */
/* 0x000fe200078e00ff */
/*00b0*/ S2R R17, SR_CTAID.Y ; /* 0x0000000000117919 */
/* 0x000ee40000002600 */
/*00c0*/ IMAD.X R24, RZ, RZ, c[0x0][0x24], P0 ; /* 0x00000900ff187624 */
/* 0x000fc400000e06ff */
/*00d0*/ STL.64 [R1], R8 ; /* 0x0000000801007387 */
/* 0x0003e20000100a00 */
/*00e0*/ IMAD.MOV.U32 R6, RZ, RZ, R25 ; /* 0x000000ffff067224 */
/* 0x000fe400078e0019 */
/*00f0*/ IMAD.MOV.U32 R7, RZ, RZ, R24 ; /* 0x000000ffff077224 */
/* 0x000fe400078e0018 */
/*0100*/ IMAD R23, R16, c[0x0][0x0], R18 ; /* 0x0000000010177a24 */
/* 0x001fe400078e0212 */
/*0110*/ IMAD R22, R17, c[0x0][0x4], RZ ; /* 0x0000010011167a24 */
/* 0x008fe400078e02ff */
/*0120*/ LEPC R8 ; /* 0x000000000008734e */
/* 0x006fca0000000000 */
/*0130*/ MOV R11, 0x1a0 ; /* 0x000001a0000b7802 */
/* 0x000fe40000000f00 */
/*0140*/ MOV R20, 0x120 ; /* 0x0000012000147802 */
/* 0x000fe40000000f00 */
/*0150*/ MOV R21, 0x0 ; /* 0x0000000000157802 */
/* 0x000fc40000000f00 */
/*0160*/ MOV R0, 0x0 ; /* 0x0000000000007802 */
/* 0x000fe40000000f00 */
/*0170*/ IADD3 R20, P0, P1, -R20, R11, R8 ; /* 0x0000000b14147210 */
/* 0x000fc8000791e108 */
/*0180*/ IADD3.X R21, ~R0, R21, R9, P0, P1 ; /* 0x0000001500157210 */
/* 0x000fc800007e2509 */
/*0190*/ CALL.ABS.NOINC R2 ; /* 0x0000000002007343 */
/* 0x000fea0003c00000 */
/*01a0*/ STL.64 [R1], R16 ; /* 0x0000001001007387 */
/* 0x0001e20000100a00 */
/*01b0*/ LDC.64 R2, c[0x4][R26] ; /* 0x010000001a027b82 */
/* 0x0000620000000a00 */
/*01c0*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x4][0x10] ; /* 0x01000400ff047624 */
/* 0x000fe400078e00ff */
/*01d0*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x4][0x14] ; /* 0x01000500ff057624 */
/* 0x000fe400078e00ff */
/*01e0*/ IMAD.MOV.U32 R6, RZ, RZ, R25 ; /* 0x000000ffff067224 */
/* 0x000fe400078e0019 */
/*01f0*/ IMAD.MOV.U32 R7, RZ, RZ, R24 ; /* 0x000000ffff077224 */
/* 0x000fe400078e0018 */
/*0200*/ LEPC R8 ; /* 0x000000000008734e */
/* 0x000fca0000000000 */
/*0210*/ MOV R11, 0x280 ; /* 0x00000280000b7802 */
/* 0x000fe40000000f00 */
/*0220*/ MOV R20, 0x200 ; /* 0x0000020000147802 */
/* 0x000fc40000000f00 */
/*0230*/ MOV R21, 0x0 ; /* 0x0000000000157802 */
/* 0x000fe40000000f00 */
/*0240*/ MOV R0, 0x0 ; /* 0x0000000000007802 */
/* 0x000fe40000000f00 */
/*0250*/ IADD3 R20, P0, P1, -R20, R11, R8 ; /* 0x0000000b14147210 */
/* 0x000fc8000791e108 */
/*0260*/ IADD3.X R21, ~R0, R21, R9, P0, P1 ; /* 0x0000001500157210 */
/* 0x000fc800007e2509 */
/*0270*/ CALL.ABS.NOINC R2 ; /* 0x0000000002007343 */
/* 0x003fea0003c00000 */
/*0280*/ S2R R19, SR_TID.Y ; /* 0x0000000000137919 */
/* 0x000e220000002200 */
/*0290*/ LDC.64 R26, c[0x4][R26] ; /* 0x010000001a1a7b82 */
/* 0x000e620000000a00 */
/*02a0*/ IMAD.MOV.U32 R6, RZ, RZ, R25 ; /* 0x000000ffff067224 */
/* 0x000fe400078e0019 */
/*02b0*/ IMAD.MOV.U32 R7, RZ, RZ, R24 ; /* 0x000000ffff077224 */
/* 0x000fe400078e0018 */
/*02c0*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x4][0x18] ; /* 0x01000600ff047624 */
/* 0x000fe400078e00ff */
/*02d0*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x4][0x1c] ; /* 0x01000700ff057624 */
/* 0x000fe200078e00ff */
/*02e0*/ STL.64 [R1], R18 ; /* 0x0000001201007387 */
/* 0x0011e80000100a00 */
/*02f0*/ LEPC R2 ; /* 0x000000000002734e */
/* 0x000fe40000000000 */
/*0300*/ MOV R9, 0x370 ; /* 0x0000037000097802 */
/* 0x000fe40000000f00 */
/*0310*/ MOV R20, 0x2f0 ; /* 0x000002f000147802 */
/* 0x000fc40000000f00 */
/*0320*/ MOV R21, 0x0 ; /* 0x0000000000157802 */
/* 0x000fe40000000f00 */
/*0330*/ MOV R0, 0x0 ; /* 0x0000000000007802 */
/* 0x000fe40000000f00 */
/*0340*/ IADD3 R20, P0, P1, -R20, R9, R2 ; /* 0x0000000914147210 */
/* 0x000fc8000791e102 */
/*0350*/ IADD3.X R21, ~R0, R21, R3, P0, P1 ; /* 0x0000001500157210 */
/* 0x000fc800007e2503 */
/*0360*/ CALL.ABS.NOINC R26 ; /* 0x000000001a007343 */
/* 0x003fea0003c00000 */
/*0370*/ IMAD.MOV R19, RZ, RZ, -R19 ; /* 0x000000ffff137224 */
/* 0x000fe200078e0a13 */
/*0380*/ ISETP.GT.U32.AND P0, PT, R23, 0x7f, PT ; /* 0x0000007f1700780c */
/* 0x000fc80003f04070 */
/*0390*/ ISETP.NE.OR P0, PT, R22, R19, P0 ; /* 0x000000131600720c */
/* 0x000fda0000705670 */
/*03a0*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*03b0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ; /* 0x00000004ff057424 */
/* 0x000fe200078e00ff */
/*03c0*/ IADD3 R4, R23.reuse, 0x80, RZ ; /* 0x0000008017047810 */
/* 0x040fe20007ffe0ff */
/*03d0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*03e0*/ IMAD.WIDE.U32 R2, R23, R5, c[0x0][0x160] ; /* 0x0000580017027625 */
/* 0x000fc800078e0005 */
/*03f0*/ IMAD.WIDE.U32 R4, R4, R5, c[0x0][0x160] ; /* 0x0000580004047625 */
/* 0x000fe200078e0005 */
/*0400*/ STG.E [R2.64], R23 ; /* 0x0000001702007986 */
/* 0x000fe8000c101904 */
/*0410*/ STG.E [R4.64], RZ ; /* 0x000000ff04007986 */
/* 0x000fe2000c101904 */
/*0420*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0430*/ BRA 0x430; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0440*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0450*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0460*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0470*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0480*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0490*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*04f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <cuda_runtime.h>
#define BLOCK_DIM 128
const int size_x = 128;
const int size_y = 1;
__global__ static void threadDemo(unsigned int * ret)
{
unsigned int xIndex = blockDim.x *blockIdx.x + threadIdx.x;
unsigned int yIndex = blockDim.y * blockIdx.y + threadIdx.y;
printf("block Dim (%d, %d) \n", blockDim.x, blockDim.y);
printf("block id (%d, %d)\n", blockIdx.x, blockIdx.y);
printf("thread id (%d, %d) \n", threadIdx.x, threadIdx.y);
if (xIndex < size_x && yIndex < size_y) {
unsigned int index = xIndex + size_x * yIndex;
ret[index] = xIndex;
ret[index + size_x * size_y] = yIndex;
}
}
void ThreadDemo(void)
{
unsigned int * ret = 0;
unsigned int host_ret[size_x*size_y*2] = {0};
int i = 0;
cudaMalloc((void**) &ret, sizeof(unsigned int)*(size_x*size_y*2));
dim3 grid(size_x / BLOCK_DIM, 1);
dim3 block(BLOCK_DIM, 1, 1);
threadDemo<<<grid,block>>>(ret);
cudaMemcpy(&host_ret, ret, sizeof(unsigned int)*(size_x*size_y*2), cudaMemcpyDeviceToHost);
for (i = 0; i < size_x*size_y; i++) {
printf("(%u,%u)", host_ret[i], host_ret[size_x*size_y+i]);
}
cudaFree(ret);
} | .file "tmpxft_001a1b3a_00000000-6_threadDemo.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL30__device_stub__Z10threadDemoPjPj, @function
_ZL30__device_stub__Z10threadDemoPjPj:
.LFB2082:
.cfi_startproc
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 8(%rsp)
movq %fs:40, %rax
movq %rax, 88(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L5
.L1:
movq 88(%rsp), %rax
subq %fs:40, %rax
jne .L6
addq $104, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L5:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 120
pushq 24(%rsp)
.cfi_def_cfa_offset 128
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _ZL10threadDemoPj(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 112
jmp .L1
.L6:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _ZL30__device_stub__Z10threadDemoPjPj, .-_ZL30__device_stub__Z10threadDemoPjPj
.type _ZL10threadDemoPj, @function
_ZL10threadDemoPj:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _ZL30__device_stub__Z10threadDemoPjPj
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _ZL10threadDemoPj, .-_ZL10threadDemoPj
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "(%u,%u)"
.text
.globl _Z10ThreadDemov
.type _Z10ThreadDemov, @function
_Z10ThreadDemov:
.LFB2057:
.cfi_startproc
endbr64
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
subq $1072, %rsp
.cfi_def_cfa_offset 1104
movq %fs:40, %rax
movq %rax, 1064(%rsp)
xorl %eax, %eax
movq $0, (%rsp)
leaq 32(%rsp), %rdi
movl $128, %ecx
rep stosq
movq %rsp, %rdi
movl $1024, %esi
call cudaMalloc@PLT
movl $1, 8(%rsp)
movl $1, 12(%rsp)
movl $1, 16(%rsp)
movl $128, 20(%rsp)
movl $1, 24(%rsp)
movl $1, 28(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 20(%rsp), %rdx
movl $1, %ecx
movq 8(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L17
.L12:
leaq 32(%rsp), %rbx
movl $2, %ecx
movl $1024, %edx
movq (%rsp), %rsi
movq %rbx, %rdi
call cudaMemcpy@PLT
leaq 544(%rsp), %r12
leaq .LC0(%rip), %rbp
.L13:
movl 512(%rbx), %ecx
movl (%rbx), %edx
movq %rbp, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $4, %rbx
cmpq %r12, %rbx
jne .L13
movq (%rsp), %rdi
call cudaFree@PLT
movq 1064(%rsp), %rax
subq %fs:40, %rax
jne .L18
addq $1072, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.L17:
.cfi_restore_state
movq (%rsp), %rdi
call _ZL30__device_stub__Z10threadDemoPjPj
jmp .L12
.L18:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size _Z10ThreadDemov, .-_Z10ThreadDemov
.section .rodata.str1.1
.LC1:
.string "_Z10threadDemoPj"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC1(%rip), %rdx
movq %rdx, %rcx
leaq _ZL10threadDemoPj(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <stdlib.h>
#include <cuda_runtime.h>
#define BLOCK_DIM 128
const int size_x = 128;
const int size_y = 1;
__global__ static void threadDemo(unsigned int * ret)
{
unsigned int xIndex = blockDim.x *blockIdx.x + threadIdx.x;
unsigned int yIndex = blockDim.y * blockIdx.y + threadIdx.y;
printf("block Dim (%d, %d) \n", blockDim.x, blockDim.y);
printf("block id (%d, %d)\n", blockIdx.x, blockIdx.y);
printf("thread id (%d, %d) \n", threadIdx.x, threadIdx.y);
if (xIndex < size_x && yIndex < size_y) {
unsigned int index = xIndex + size_x * yIndex;
ret[index] = xIndex;
ret[index + size_x * size_y] = yIndex;
}
}
void ThreadDemo(void)
{
unsigned int * ret = 0;
unsigned int host_ret[size_x*size_y*2] = {0};
int i = 0;
cudaMalloc((void**) &ret, sizeof(unsigned int)*(size_x*size_y*2));
dim3 grid(size_x / BLOCK_DIM, 1);
dim3 block(BLOCK_DIM, 1, 1);
threadDemo<<<grid,block>>>(ret);
cudaMemcpy(&host_ret, ret, sizeof(unsigned int)*(size_x*size_y*2), cudaMemcpyDeviceToHost);
for (i = 0; i < size_x*size_y; i++) {
printf("(%u,%u)", host_ret[i], host_ret[size_x*size_y+i]);
}
cudaFree(ret);
} | #include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#define BLOCK_DIM 128
const int size_x = 128;
const int size_y = 1;
__global__ static void threadDemo(unsigned int * ret)
{
unsigned int xIndex = blockDim.x *blockIdx.x + threadIdx.x;
unsigned int yIndex = blockDim.y * blockIdx.y + threadIdx.y;
printf("block Dim (%d, %d) \n", blockDim.x, blockDim.y);
printf("block id (%d, %d)\n", blockIdx.x, blockIdx.y);
printf("thread id (%d, %d) \n", threadIdx.x, threadIdx.y);
if (xIndex < size_x && yIndex < size_y) {
unsigned int index = xIndex + size_x * yIndex;
ret[index] = xIndex;
ret[index + size_x * size_y] = yIndex;
}
}
void ThreadDemo(void)
{
unsigned int * ret = 0;
unsigned int host_ret[size_x*size_y*2] = {0};
int i = 0;
hipMalloc((void**) &ret, sizeof(unsigned int)*(size_x*size_y*2));
dim3 grid(size_x / BLOCK_DIM, 1);
dim3 block(BLOCK_DIM, 1, 1);
threadDemo<<<grid,block>>>(ret);
hipMemcpy(&host_ret, ret, sizeof(unsigned int)*(size_x*size_y*2), hipMemcpyDeviceToHost);
for (i = 0; i < size_x*size_y; i++) {
printf("(%u,%u)", host_ret[i], host_ret[size_x*size_y+i]);
}
hipFree(ret);
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#define BLOCK_DIM 128
const int size_x = 128;
const int size_y = 1;
__global__ static void threadDemo(unsigned int * ret)
{
unsigned int xIndex = blockDim.x *blockIdx.x + threadIdx.x;
unsigned int yIndex = blockDim.y * blockIdx.y + threadIdx.y;
printf("block Dim (%d, %d) \n", blockDim.x, blockDim.y);
printf("block id (%d, %d)\n", blockIdx.x, blockIdx.y);
printf("thread id (%d, %d) \n", threadIdx.x, threadIdx.y);
if (xIndex < size_x && yIndex < size_y) {
unsigned int index = xIndex + size_x * yIndex;
ret[index] = xIndex;
ret[index + size_x * size_y] = yIndex;
}
}
void ThreadDemo(void)
{
unsigned int * ret = 0;
unsigned int host_ret[size_x*size_y*2] = {0};
int i = 0;
hipMalloc((void**) &ret, sizeof(unsigned int)*(size_x*size_y*2));
dim3 grid(size_x / BLOCK_DIM, 1);
dim3 block(BLOCK_DIM, 1, 1);
threadDemo<<<grid,block>>>(ret);
hipMemcpy(&host_ret, ret, sizeof(unsigned int)*(size_x*size_y*2), hipMemcpyDeviceToHost);
for (i = 0; i < size_x*size_y; i++) {
printf("(%u,%u)", host_ret[i], host_ret[size_x*size_y+i]);
}
hipFree(ret);
} | .text
.file "threadDemo.hip"
.globl _Z10ThreadDemov # -- Begin function _Z10ThreadDemov
.p2align 4, 0x90
.type _Z10ThreadDemov,@function
_Z10ThreadDemov: # @_Z10ThreadDemov
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $1104, %rsp # imm = 0x450
.cfi_def_cfa_offset 1120
.cfi_offset %rbx, -16
movq $0, 8(%rsp)
leaq 80(%rsp), %rdi
movl $1024, %edx # imm = 0x400
xorl %esi, %esi
callq memset@PLT
leaq 8(%rsp), %rdi
movl $1024, %esi # imm = 0x400
callq hipMalloc
movabsq $4294967297, %rdi # imm = 0x100000001
leaq 127(%rdi), %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB0_2
# %bb.1:
movq 8(%rsp), %rax
movq %rax, 72(%rsp)
leaq 72(%rsp), %rax
movq %rax, 16(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 16(%rsp), %r9
movl $_ZL10threadDemoPj, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB0_2:
movq 8(%rsp), %rsi
leaq 80(%rsp), %rdi
movl $1024, %edx # imm = 0x400
movl $2, %ecx
callq hipMemcpy
xorl %ebx, %ebx
.p2align 4, 0x90
.LBB0_3: # =>This Inner Loop Header: Depth=1
movl 80(%rsp,%rbx,4), %esi
movl 592(%rsp,%rbx,4), %edx
movl $.L.str, %edi
xorl %eax, %eax
callq printf
incq %rbx
cmpq $128, %rbx
jne .LBB0_3
# %bb.4:
movq 8(%rsp), %rdi
callq hipFree
addq $1104, %rsp # imm = 0x450
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
retq
.Lfunc_end0:
.size _Z10ThreadDemov, .Lfunc_end0-_Z10ThreadDemov
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function _ZL25__device_stub__threadDemoPj
.type _ZL25__device_stub__threadDemoPj,@function
_ZL25__device_stub__threadDemoPj: # @_ZL25__device_stub__threadDemoPj
.cfi_startproc
# %bb.0:
subq $72, %rsp
.cfi_def_cfa_offset 80
movq %rdi, 64(%rsp)
leaq 64(%rsp), %rax
movq %rax, (%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
movq %rsp, %r9
movl $_ZL10threadDemoPj, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $88, %rsp
.cfi_adjust_cfa_offset -88
retq
.Lfunc_end1:
.size _ZL25__device_stub__threadDemoPj, .Lfunc_end1-_ZL25__device_stub__threadDemoPj
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_ZL10threadDemoPj, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _ZL10threadDemoPj,@object # @_ZL10threadDemoPj
.section .rodata,"a",@progbits
.p2align 3, 0x0
_ZL10threadDemoPj:
.quad _ZL25__device_stub__threadDemoPj
.size _ZL10threadDemoPj, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "(%u,%u)"
.size .L.str, 8
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_ZL10threadDemoPj"
.size .L__unnamed_1, 18
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _ZL25__device_stub__threadDemoPj
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _ZL10threadDemoPj
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001a1b3a_00000000-6_threadDemo.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL30__device_stub__Z10threadDemoPjPj, @function
_ZL30__device_stub__Z10threadDemoPjPj:
.LFB2082:
.cfi_startproc
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 8(%rsp)
movq %fs:40, %rax
movq %rax, 88(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L5
.L1:
movq 88(%rsp), %rax
subq %fs:40, %rax
jne .L6
addq $104, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L5:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 120
pushq 24(%rsp)
.cfi_def_cfa_offset 128
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _ZL10threadDemoPj(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 112
jmp .L1
.L6:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _ZL30__device_stub__Z10threadDemoPjPj, .-_ZL30__device_stub__Z10threadDemoPjPj
.type _ZL10threadDemoPj, @function
_ZL10threadDemoPj:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _ZL30__device_stub__Z10threadDemoPjPj
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _ZL10threadDemoPj, .-_ZL10threadDemoPj
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "(%u,%u)"
.text
.globl _Z10ThreadDemov
.type _Z10ThreadDemov, @function
_Z10ThreadDemov:
.LFB2057:
.cfi_startproc
endbr64
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
subq $1072, %rsp
.cfi_def_cfa_offset 1104
movq %fs:40, %rax
movq %rax, 1064(%rsp)
xorl %eax, %eax
movq $0, (%rsp)
leaq 32(%rsp), %rdi
movl $128, %ecx
rep stosq
movq %rsp, %rdi
movl $1024, %esi
call cudaMalloc@PLT
movl $1, 8(%rsp)
movl $1, 12(%rsp)
movl $1, 16(%rsp)
movl $128, 20(%rsp)
movl $1, 24(%rsp)
movl $1, 28(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 20(%rsp), %rdx
movl $1, %ecx
movq 8(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L17
.L12:
leaq 32(%rsp), %rbx
movl $2, %ecx
movl $1024, %edx
movq (%rsp), %rsi
movq %rbx, %rdi
call cudaMemcpy@PLT
leaq 544(%rsp), %r12
leaq .LC0(%rip), %rbp
.L13:
movl 512(%rbx), %ecx
movl (%rbx), %edx
movq %rbp, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $4, %rbx
cmpq %r12, %rbx
jne .L13
movq (%rsp), %rdi
call cudaFree@PLT
movq 1064(%rsp), %rax
subq %fs:40, %rax
jne .L18
addq $1072, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %rbp
.cfi_def_cfa_offset 16
popq %r12
.cfi_def_cfa_offset 8
ret
.L17:
.cfi_restore_state
movq (%rsp), %rdi
call _ZL30__device_stub__Z10threadDemoPjPj
jmp .L12
.L18:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size _Z10ThreadDemov, .-_Z10ThreadDemov
.section .rodata.str1.1
.LC1:
.string "_Z10threadDemoPj"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC1(%rip), %rdx
movq %rdx, %rcx
leaq _ZL10threadDemoPj(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "threadDemo.hip"
.globl _Z10ThreadDemov # -- Begin function _Z10ThreadDemov
.p2align 4, 0x90
.type _Z10ThreadDemov,@function
_Z10ThreadDemov: # @_Z10ThreadDemov
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
subq $1104, %rsp # imm = 0x450
.cfi_def_cfa_offset 1120
.cfi_offset %rbx, -16
movq $0, 8(%rsp)
leaq 80(%rsp), %rdi
movl $1024, %edx # imm = 0x400
xorl %esi, %esi
callq memset@PLT
leaq 8(%rsp), %rdi
movl $1024, %esi # imm = 0x400
callq hipMalloc
movabsq $4294967297, %rdi # imm = 0x100000001
leaq 127(%rdi), %rdx
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB0_2
# %bb.1:
movq 8(%rsp), %rax
movq %rax, 72(%rsp)
leaq 72(%rsp), %rax
movq %rax, 16(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 16(%rsp), %r9
movl $_ZL10threadDemoPj, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB0_2:
movq 8(%rsp), %rsi
leaq 80(%rsp), %rdi
movl $1024, %edx # imm = 0x400
movl $2, %ecx
callq hipMemcpy
xorl %ebx, %ebx
.p2align 4, 0x90
.LBB0_3: # =>This Inner Loop Header: Depth=1
movl 80(%rsp,%rbx,4), %esi
movl 592(%rsp,%rbx,4), %edx
movl $.L.str, %edi
xorl %eax, %eax
callq printf
incq %rbx
cmpq $128, %rbx
jne .LBB0_3
# %bb.4:
movq 8(%rsp), %rdi
callq hipFree
addq $1104, %rsp # imm = 0x450
.cfi_def_cfa_offset 16
popq %rbx
.cfi_def_cfa_offset 8
retq
.Lfunc_end0:
.size _Z10ThreadDemov, .Lfunc_end0-_Z10ThreadDemov
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function _ZL25__device_stub__threadDemoPj
.type _ZL25__device_stub__threadDemoPj,@function
_ZL25__device_stub__threadDemoPj: # @_ZL25__device_stub__threadDemoPj
.cfi_startproc
# %bb.0:
subq $72, %rsp
.cfi_def_cfa_offset 80
movq %rdi, 64(%rsp)
leaq 64(%rsp), %rax
movq %rax, (%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
movq %rsp, %r9
movl $_ZL10threadDemoPj, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $88, %rsp
.cfi_adjust_cfa_offset -88
retq
.Lfunc_end1:
.size _ZL25__device_stub__threadDemoPj, .Lfunc_end1-_ZL25__device_stub__threadDemoPj
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_ZL10threadDemoPj, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _ZL10threadDemoPj,@object # @_ZL10threadDemoPj
.section .rodata,"a",@progbits
.p2align 3, 0x0
_ZL10threadDemoPj:
.quad _ZL25__device_stub__threadDemoPj
.size _ZL10threadDemoPj, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "(%u,%u)"
.size .L.str, 8
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_ZL10threadDemoPj"
.size .L__unnamed_1, 18
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _ZL25__device_stub__threadDemoPj
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _ZL10threadDemoPj
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <cstdio>
int main(void)
{
int count;
cudaGetDeviceCount(&count);
printf("%d devices found supporting CUDA\n", count);
char split[] = "----------------------------------\n";
cudaDeviceProp p;
for(int d = 0; d < count; d++){
cudaGetDeviceProperties(&p, d);
printf("%s", split);
printf("Device %s\n", p.name);
printf("%s", split);
printf(" Device memory: \t%zu\n", p.totalGlobalMem);
printf(" Memory per-block: \t%lu\n", p.sharedMemPerBlock);
printf(" Register per-block: \t%d\n", p.regsPerBlock);
printf(" Warp size: \t\t%d\n", p.warpSize);
printf(" Memory pitch: \t\t%lu\n", p.memPitch);
printf(" Constant Memory: \t%lu\n", p.totalConstMem);
printf(" Max thread per-block: \t%d\n", p.maxThreadsPerBlock);
printf(" Max thread dim: \t%d / %d / %d\n", p.maxThreadsDim[0], p.maxThreadsDim[1], p.maxThreadsDim[2]);
printf(" Max grid size: \t%d / %d / %d\n", p.maxGridSize[0], p.maxGridSize[1], p.maxGridSize[2]);
printf(" Ver: \t\t\t%d.%d\n", p.major, p.minor);
printf(" Clock: \t\t%d\n", p.clockRate);
printf(" Texture Alignment: \t%lu\n", p.textureAlignment);
}
return 0;
} | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <cstdio>
int main(void)
{
int count;
cudaGetDeviceCount(&count);
printf("%d devices found supporting CUDA\n", count);
char split[] = "----------------------------------\n";
cudaDeviceProp p;
for(int d = 0; d < count; d++){
cudaGetDeviceProperties(&p, d);
printf("%s", split);
printf("Device %s\n", p.name);
printf("%s", split);
printf(" Device memory: \t%zu\n", p.totalGlobalMem);
printf(" Memory per-block: \t%lu\n", p.sharedMemPerBlock);
printf(" Register per-block: \t%d\n", p.regsPerBlock);
printf(" Warp size: \t\t%d\n", p.warpSize);
printf(" Memory pitch: \t\t%lu\n", p.memPitch);
printf(" Constant Memory: \t%lu\n", p.totalConstMem);
printf(" Max thread per-block: \t%d\n", p.maxThreadsPerBlock);
printf(" Max thread dim: \t%d / %d / %d\n", p.maxThreadsDim[0], p.maxThreadsDim[1], p.maxThreadsDim[2]);
printf(" Max grid size: \t%d / %d / %d\n", p.maxGridSize[0], p.maxGridSize[1], p.maxGridSize[2]);
printf(" Ver: \t\t\t%d.%d\n", p.major, p.minor);
printf(" Clock: \t\t%d\n", p.clockRate);
printf(" Texture Alignment: \t%lu\n", p.textureAlignment);
}
return 0;
} | .file "tmpxft_001b3b92_00000000-6_hello.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "%d devices found supporting CUDA\n"
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "%s"
.LC2:
.string "Device %s\n"
.LC3:
.string " Device memory: \t%zu\n"
.LC4:
.string " Memory per-block: \t%lu\n"
.LC5:
.string " Register per-block: \t%d\n"
.LC6:
.string " Warp size: \t\t%d\n"
.LC7:
.string " Memory pitch: \t\t%lu\n"
.LC8:
.string " Constant Memory: \t%lu\n"
.LC9:
.string " Max thread per-block: \t%d\n"
.section .rodata.str1.8
.align 8
.LC10:
.string " Max thread dim: \t%d / %d / %d\n"
.align 8
.LC11:
.string " Max grid size: \t%d / %d / %d\n"
.section .rodata.str1.1
.LC12:
.string " Ver: \t\t\t%d.%d\n"
.LC13:
.string " Clock: \t\t%d\n"
.LC14:
.string " Texture Alignment: \t%lu\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $1112, %rsp
.cfi_def_cfa_offset 1168
movq %fs:40, %rax
movq %rax, 1096(%rsp)
xorl %eax, %eax
leaq 12(%rsp), %rdi
call cudaGetDeviceCount@PLT
movl 12(%rsp), %edx
leaq .LC0(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movabsq $3255307777713450285, %rax
movabsq $3255307777713450285, %rdx
movq %rax, 1056(%rsp)
movq %rdx, 1064(%rsp)
movq %rax, 1072(%rsp)
movq %rdx, 1080(%rsp)
movl $666925, 1088(%rsp)
cmpl $0, 12(%rsp)
jle .L4
movl $0, %ebx
leaq .LC1(%rip), %r13
leaq .LC2(%rip), %r15
leaq .LC3(%rip), %r14
.L5:
leaq 16(%rsp), %r12
movl %ebx, %esi
movq %r12, %rdi
call cudaGetDeviceProperties_v2@PLT
leaq 1056(%rsp), %rbp
movq %rbp, %rdx
movq %r13, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %r12, %rdx
movq %r15, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %rbp, %rdx
movq %r13, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 304(%rsp), %rdx
movq %r14, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 312(%rsp), %rdx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 320(%rsp), %edx
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 324(%rsp), %edx
leaq .LC6(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 328(%rsp), %rdx
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 368(%rsp), %rdx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 336(%rsp), %edx
leaq .LC9(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 348(%rsp), %r8d
movl 344(%rsp), %ecx
movl 340(%rsp), %edx
leaq .LC10(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 360(%rsp), %r8d
movl 356(%rsp), %ecx
movl 352(%rsp), %edx
leaq .LC11(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 380(%rsp), %ecx
movl 376(%rsp), %edx
leaq .LC12(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 364(%rsp), %edx
leaq .LC13(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 384(%rsp), %rdx
leaq .LC14(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addl $1, %ebx
cmpl %ebx, 12(%rsp)
jg .L5
.L4:
movq 1096(%rsp), %rax
subq %fs:40, %rax
jne .L9
movl $0, %eax
addq $1112, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L9:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <cstdio>
int main(void)
{
int count;
cudaGetDeviceCount(&count);
printf("%d devices found supporting CUDA\n", count);
char split[] = "----------------------------------\n";
cudaDeviceProp p;
for(int d = 0; d < count; d++){
cudaGetDeviceProperties(&p, d);
printf("%s", split);
printf("Device %s\n", p.name);
printf("%s", split);
printf(" Device memory: \t%zu\n", p.totalGlobalMem);
printf(" Memory per-block: \t%lu\n", p.sharedMemPerBlock);
printf(" Register per-block: \t%d\n", p.regsPerBlock);
printf(" Warp size: \t\t%d\n", p.warpSize);
printf(" Memory pitch: \t\t%lu\n", p.memPitch);
printf(" Constant Memory: \t%lu\n", p.totalConstMem);
printf(" Max thread per-block: \t%d\n", p.maxThreadsPerBlock);
printf(" Max thread dim: \t%d / %d / %d\n", p.maxThreadsDim[0], p.maxThreadsDim[1], p.maxThreadsDim[2]);
printf(" Max grid size: \t%d / %d / %d\n", p.maxGridSize[0], p.maxGridSize[1], p.maxGridSize[2]);
printf(" Ver: \t\t\t%d.%d\n", p.major, p.minor);
printf(" Clock: \t\t%d\n", p.clockRate);
printf(" Texture Alignment: \t%lu\n", p.textureAlignment);
}
return 0;
} | #include <hip/hip_runtime.h>
#include <cstdio>
int main(void)
{
int count;
hipGetDeviceCount(&count);
printf("%d devices found supporting CUDA\n", count);
char split[] = "----------------------------------\n";
hipDeviceProp_t p;
for(int d = 0; d < count; d++){
hipGetDeviceProperties(&p, d);
printf("%s", split);
printf("Device %s\n", p.name);
printf("%s", split);
printf(" Device memory: \t%zu\n", p.totalGlobalMem);
printf(" Memory per-block: \t%lu\n", p.sharedMemPerBlock);
printf(" Register per-block: \t%d\n", p.regsPerBlock);
printf(" Warp size: \t\t%d\n", p.warpSize);
printf(" Memory pitch: \t\t%lu\n", p.memPitch);
printf(" Constant Memory: \t%lu\n", p.totalConstMem);
printf(" Max thread per-block: \t%d\n", p.maxThreadsPerBlock);
printf(" Max thread dim: \t%d / %d / %d\n", p.maxThreadsDim[0], p.maxThreadsDim[1], p.maxThreadsDim[2]);
printf(" Max grid size: \t%d / %d / %d\n", p.maxGridSize[0], p.maxGridSize[1], p.maxGridSize[2]);
printf(" Ver: \t\t\t%d.%d\n", p.major, p.minor);
printf(" Clock: \t\t%d\n", p.clockRate);
printf(" Texture Alignment: \t%lu\n", p.textureAlignment);
}
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <cstdio>
int main(void)
{
int count;
hipGetDeviceCount(&count);
printf("%d devices found supporting CUDA\n", count);
char split[] = "----------------------------------\n";
hipDeviceProp_t p;
for(int d = 0; d < count; d++){
hipGetDeviceProperties(&p, d);
printf("%s", split);
printf("Device %s\n", p.name);
printf("%s", split);
printf(" Device memory: \t%zu\n", p.totalGlobalMem);
printf(" Memory per-block: \t%lu\n", p.sharedMemPerBlock);
printf(" Register per-block: \t%d\n", p.regsPerBlock);
printf(" Warp size: \t\t%d\n", p.warpSize);
printf(" Memory pitch: \t\t%lu\n", p.memPitch);
printf(" Constant Memory: \t%lu\n", p.totalConstMem);
printf(" Max thread per-block: \t%d\n", p.maxThreadsPerBlock);
printf(" Max thread dim: \t%d / %d / %d\n", p.maxThreadsDim[0], p.maxThreadsDim[1], p.maxThreadsDim[2]);
printf(" Max grid size: \t%d / %d / %d\n", p.maxGridSize[0], p.maxGridSize[1], p.maxGridSize[2]);
printf(" Ver: \t\t\t%d.%d\n", p.major, p.minor);
printf(" Clock: \t\t%d\n", p.clockRate);
printf(" Texture Alignment: \t%lu\n", p.textureAlignment);
}
return 0;
} | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.amdgpu_metadata
---
amdhsa.kernels: []
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <cstdio>
int main(void)
{
int count;
hipGetDeviceCount(&count);
printf("%d devices found supporting CUDA\n", count);
char split[] = "----------------------------------\n";
hipDeviceProp_t p;
for(int d = 0; d < count; d++){
hipGetDeviceProperties(&p, d);
printf("%s", split);
printf("Device %s\n", p.name);
printf("%s", split);
printf(" Device memory: \t%zu\n", p.totalGlobalMem);
printf(" Memory per-block: \t%lu\n", p.sharedMemPerBlock);
printf(" Register per-block: \t%d\n", p.regsPerBlock);
printf(" Warp size: \t\t%d\n", p.warpSize);
printf(" Memory pitch: \t\t%lu\n", p.memPitch);
printf(" Constant Memory: \t%lu\n", p.totalConstMem);
printf(" Max thread per-block: \t%d\n", p.maxThreadsPerBlock);
printf(" Max thread dim: \t%d / %d / %d\n", p.maxThreadsDim[0], p.maxThreadsDim[1], p.maxThreadsDim[2]);
printf(" Max grid size: \t%d / %d / %d\n", p.maxGridSize[0], p.maxGridSize[1], p.maxGridSize[2]);
printf(" Ver: \t\t\t%d.%d\n", p.major, p.minor);
printf(" Clock: \t\t%d\n", p.clockRate);
printf(" Texture Alignment: \t%lu\n", p.textureAlignment);
}
return 0;
} | .text
.file "hello.hip"
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0 # -- Begin function main
.LCPI0_0:
.zero 16,45
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
subq $1536, %rsp # imm = 0x600
.cfi_def_cfa_offset 1568
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %rbp, -16
leaq 12(%rsp), %rdi
callq hipGetDeviceCount
movl 12(%rsp), %esi
movl $.L.str, %edi
xorl %eax, %eax
callq printf
movaps .LCPI0_0(%rip), %xmm0 # xmm0 = [45,45,45,45,45,45,45,45,45,45,45,45,45,45,45,45]
movaps %xmm0, 32(%rsp)
movaps %xmm0, 16(%rsp)
movl $666925, 48(%rsp) # imm = 0xA2D2D
cmpl $0, 12(%rsp)
jle .LBB0_3
# %bb.1: # %.lr.ph
leaq 64(%rsp), %rbx
leaq 16(%rsp), %r14
xorl %ebp, %ebp
.p2align 4, 0x90
.LBB0_2: # =>This Inner Loop Header: Depth=1
movq %rbx, %rdi
movl %ebp, %esi
callq hipGetDevicePropertiesR0600
movl $.L.str.1, %edi
movq %r14, %rsi
xorl %eax, %eax
callq printf
movl $.L.str.2, %edi
movq %rbx, %rsi
xorl %eax, %eax
callq printf
movl $.L.str.1, %edi
movq %r14, %rsi
xorl %eax, %eax
callq printf
movq 352(%rsp), %rsi
movl $.L.str.3, %edi
xorl %eax, %eax
callq printf
movq 360(%rsp), %rsi
movl $.L.str.4, %edi
xorl %eax, %eax
callq printf
movl 368(%rsp), %esi
movl $.L.str.5, %edi
xorl %eax, %eax
callq printf
movl 372(%rsp), %esi
movl $.L.str.6, %edi
xorl %eax, %eax
callq printf
movq 376(%rsp), %rsi
movl $.L.str.7, %edi
xorl %eax, %eax
callq printf
movq 416(%rsp), %rsi
movl $.L.str.8, %edi
xorl %eax, %eax
callq printf
movl 384(%rsp), %esi
movl $.L.str.9, %edi
xorl %eax, %eax
callq printf
movl 388(%rsp), %esi
movl 392(%rsp), %edx
movl 396(%rsp), %ecx
movl $.L.str.10, %edi
xorl %eax, %eax
callq printf
movl 400(%rsp), %esi
movl 404(%rsp), %edx
movl 408(%rsp), %ecx
movl $.L.str.11, %edi
xorl %eax, %eax
callq printf
movl 424(%rsp), %esi
movl 428(%rsp), %edx
movl $.L.str.12, %edi
xorl %eax, %eax
callq printf
movl 412(%rsp), %esi
movl $.L.str.13, %edi
xorl %eax, %eax
callq printf
movq 432(%rsp), %rsi
movl $.L.str.14, %edi
xorl %eax, %eax
callq printf
incl %ebp
cmpl 12(%rsp), %ebp
jl .LBB0_2
.LBB0_3: # %._crit_edge
xorl %eax, %eax
addq $1536, %rsp # imm = 0x600
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end0:
.size main, .Lfunc_end0-main
.cfi_endproc
# -- End function
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "%d devices found supporting CUDA\n"
.size .L.str, 34
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "%s"
.size .L.str.1, 3
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "Device %s\n"
.size .L.str.2, 11
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz " Device memory: \t%zu\n"
.size .L.str.3, 22
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz " Memory per-block: \t%lu\n"
.size .L.str.4, 25
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz " Register per-block: \t%d\n"
.size .L.str.5, 26
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz " Warp size: \t\t%d\n"
.size .L.str.6, 18
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz " Memory pitch: \t\t%lu\n"
.size .L.str.7, 22
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz " Constant Memory: \t%lu\n"
.size .L.str.8, 24
.type .L.str.9,@object # @.str.9
.L.str.9:
.asciz " Max thread per-block: \t%d\n"
.size .L.str.9, 28
.type .L.str.10,@object # @.str.10
.L.str.10:
.asciz " Max thread dim: \t%d / %d / %d\n"
.size .L.str.10, 32
.type .L.str.11,@object # @.str.11
.L.str.11:
.asciz " Max grid size: \t%d / %d / %d\n"
.size .L.str.11, 31
.type .L.str.12,@object # @.str.12
.L.str.12:
.asciz " Ver: \t\t\t%d.%d\n"
.size .L.str.12, 16
.type .L.str.13,@object # @.str.13
.L.str.13:
.asciz " Clock: \t\t%d\n"
.size .L.str.13, 14
.type .L.str.14,@object # @.str.14
.L.str.14:
.asciz " Texture Alignment: \t%lu\n"
.size .L.str.14, 26
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.amdgpu_metadata
---
amdhsa.kernels: []
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001b3b92_00000000-6_hello.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "%d devices found supporting CUDA\n"
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "%s"
.LC2:
.string "Device %s\n"
.LC3:
.string " Device memory: \t%zu\n"
.LC4:
.string " Memory per-block: \t%lu\n"
.LC5:
.string " Register per-block: \t%d\n"
.LC6:
.string " Warp size: \t\t%d\n"
.LC7:
.string " Memory pitch: \t\t%lu\n"
.LC8:
.string " Constant Memory: \t%lu\n"
.LC9:
.string " Max thread per-block: \t%d\n"
.section .rodata.str1.8
.align 8
.LC10:
.string " Max thread dim: \t%d / %d / %d\n"
.align 8
.LC11:
.string " Max grid size: \t%d / %d / %d\n"
.section .rodata.str1.1
.LC12:
.string " Ver: \t\t\t%d.%d\n"
.LC13:
.string " Clock: \t\t%d\n"
.LC14:
.string " Texture Alignment: \t%lu\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $1112, %rsp
.cfi_def_cfa_offset 1168
movq %fs:40, %rax
movq %rax, 1096(%rsp)
xorl %eax, %eax
leaq 12(%rsp), %rdi
call cudaGetDeviceCount@PLT
movl 12(%rsp), %edx
leaq .LC0(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movabsq $3255307777713450285, %rax
movabsq $3255307777713450285, %rdx
movq %rax, 1056(%rsp)
movq %rdx, 1064(%rsp)
movq %rax, 1072(%rsp)
movq %rdx, 1080(%rsp)
movl $666925, 1088(%rsp)
cmpl $0, 12(%rsp)
jle .L4
movl $0, %ebx
leaq .LC1(%rip), %r13
leaq .LC2(%rip), %r15
leaq .LC3(%rip), %r14
.L5:
leaq 16(%rsp), %r12
movl %ebx, %esi
movq %r12, %rdi
call cudaGetDeviceProperties_v2@PLT
leaq 1056(%rsp), %rbp
movq %rbp, %rdx
movq %r13, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %r12, %rdx
movq %r15, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq %rbp, %rdx
movq %r13, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 304(%rsp), %rdx
movq %r14, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 312(%rsp), %rdx
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 320(%rsp), %edx
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 324(%rsp), %edx
leaq .LC6(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 328(%rsp), %rdx
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 368(%rsp), %rdx
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 336(%rsp), %edx
leaq .LC9(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 348(%rsp), %r8d
movl 344(%rsp), %ecx
movl 340(%rsp), %edx
leaq .LC10(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 360(%rsp), %r8d
movl 356(%rsp), %ecx
movl 352(%rsp), %edx
leaq .LC11(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 380(%rsp), %ecx
movl 376(%rsp), %edx
leaq .LC12(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 364(%rsp), %edx
leaq .LC13(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movq 384(%rsp), %rdx
leaq .LC14(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addl $1, %ebx
cmpl %ebx, 12(%rsp)
jg .L5
.L4:
movq 1096(%rsp), %rax
subq %fs:40, %rax
jne .L9
movl $0, %eax
addq $1112, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L9:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "hello.hip"
.section .rodata.cst16,"aM",@progbits,16
.p2align 4, 0x0 # -- Begin function main
.LCPI0_0:
.zero 16,45
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
subq $1536, %rsp # imm = 0x600
.cfi_def_cfa_offset 1568
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %rbp, -16
leaq 12(%rsp), %rdi
callq hipGetDeviceCount
movl 12(%rsp), %esi
movl $.L.str, %edi
xorl %eax, %eax
callq printf
movaps .LCPI0_0(%rip), %xmm0 # xmm0 = [45,45,45,45,45,45,45,45,45,45,45,45,45,45,45,45]
movaps %xmm0, 32(%rsp)
movaps %xmm0, 16(%rsp)
movl $666925, 48(%rsp) # imm = 0xA2D2D
cmpl $0, 12(%rsp)
jle .LBB0_3
# %bb.1: # %.lr.ph
leaq 64(%rsp), %rbx
leaq 16(%rsp), %r14
xorl %ebp, %ebp
.p2align 4, 0x90
.LBB0_2: # =>This Inner Loop Header: Depth=1
movq %rbx, %rdi
movl %ebp, %esi
callq hipGetDevicePropertiesR0600
movl $.L.str.1, %edi
movq %r14, %rsi
xorl %eax, %eax
callq printf
movl $.L.str.2, %edi
movq %rbx, %rsi
xorl %eax, %eax
callq printf
movl $.L.str.1, %edi
movq %r14, %rsi
xorl %eax, %eax
callq printf
movq 352(%rsp), %rsi
movl $.L.str.3, %edi
xorl %eax, %eax
callq printf
movq 360(%rsp), %rsi
movl $.L.str.4, %edi
xorl %eax, %eax
callq printf
movl 368(%rsp), %esi
movl $.L.str.5, %edi
xorl %eax, %eax
callq printf
movl 372(%rsp), %esi
movl $.L.str.6, %edi
xorl %eax, %eax
callq printf
movq 376(%rsp), %rsi
movl $.L.str.7, %edi
xorl %eax, %eax
callq printf
movq 416(%rsp), %rsi
movl $.L.str.8, %edi
xorl %eax, %eax
callq printf
movl 384(%rsp), %esi
movl $.L.str.9, %edi
xorl %eax, %eax
callq printf
movl 388(%rsp), %esi
movl 392(%rsp), %edx
movl 396(%rsp), %ecx
movl $.L.str.10, %edi
xorl %eax, %eax
callq printf
movl 400(%rsp), %esi
movl 404(%rsp), %edx
movl 408(%rsp), %ecx
movl $.L.str.11, %edi
xorl %eax, %eax
callq printf
movl 424(%rsp), %esi
movl 428(%rsp), %edx
movl $.L.str.12, %edi
xorl %eax, %eax
callq printf
movl 412(%rsp), %esi
movl $.L.str.13, %edi
xorl %eax, %eax
callq printf
movq 432(%rsp), %rsi
movl $.L.str.14, %edi
xorl %eax, %eax
callq printf
incl %ebp
cmpl 12(%rsp), %ebp
jl .LBB0_2
.LBB0_3: # %._crit_edge
xorl %eax, %eax
addq $1536, %rsp # imm = 0x600
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end0:
.size main, .Lfunc_end0-main
.cfi_endproc
# -- End function
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "%d devices found supporting CUDA\n"
.size .L.str, 34
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "%s"
.size .L.str.1, 3
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "Device %s\n"
.size .L.str.2, 11
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz " Device memory: \t%zu\n"
.size .L.str.3, 22
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz " Memory per-block: \t%lu\n"
.size .L.str.4, 25
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz " Register per-block: \t%d\n"
.size .L.str.5, 26
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz " Warp size: \t\t%d\n"
.size .L.str.6, 18
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz " Memory pitch: \t\t%lu\n"
.size .L.str.7, 22
.type .L.str.8,@object # @.str.8
.L.str.8:
.asciz " Constant Memory: \t%lu\n"
.size .L.str.8, 24
.type .L.str.9,@object # @.str.9
.L.str.9:
.asciz " Max thread per-block: \t%d\n"
.size .L.str.9, 28
.type .L.str.10,@object # @.str.10
.L.str.10:
.asciz " Max thread dim: \t%d / %d / %d\n"
.size .L.str.10, 32
.type .L.str.11,@object # @.str.11
.L.str.11:
.asciz " Max grid size: \t%d / %d / %d\n"
.size .L.str.11, 31
.type .L.str.12,@object # @.str.12
.L.str.12:
.asciz " Ver: \t\t\t%d.%d\n"
.size .L.str.12, 16
.type .L.str.13,@object # @.str.13
.L.str.13:
.asciz " Clock: \t\t%d\n"
.size .L.str.13, 14
.type .L.str.14,@object # @.str.14
.L.str.14:
.asciz " Texture Alignment: \t%lu\n"
.size .L.str.14, 26
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <cuda.h>
#include <cuda_runtime.h>
#include <math.h>
#include <math_constants.h>
#include <stdlib.h>
#include <vector>
#include <algorithm>
#include <thrust/host_vector.h>
#include <thrust/device_vector.h>
#include <thrust/generate.h>
#include <thrust/sort.h>
#include <thrust/copy.h>
#include <cstdlib>
#define BINNUM 9
#define CELLSIZE 6
#define CELLBLOCKSIZE 3
#define STEPSIZE 3
#define K 5
#define KERNEL_WIDTH 31
__global__ void computeGradient(float* outputGr,int* outputTag,float* input,unsigned int width,unsigned int height)
{
unsigned int tx = blockIdx.x*blockDim.x + threadIdx.x;
unsigned int ty = blockIdx.y*blockDim.y + threadIdx.y;
float gradientX, gradientY;
float angle;
int nAngle;
int indTag;
if(tx < width && ty < height)
{
if(tx == 0) //image boundary
gradientX = input[tx+1 + ty*width] - input[tx + ty*width];
else if(tx == width-1)
gradientX = input[tx + ty*width] - input[tx-1 + ty*width];
else if(ty == 0 || ty == height-1)
gradientX = 0;
else
gradientX = input[tx+1 + ty*width] - input[tx-1 + ty*width];
if(ty == 0) //image boundary
gradientY = input[tx + (ty+1)*width] - input[tx + (ty)*width];
else if (ty == height-1)
gradientY = input[tx + (ty)*width] - input[tx + (ty-1)*width];
else if (tx ==0 || tx == width-1)
gradientY = 0;
else
gradientY = input[tx + (ty+1)*width] - input[tx + (ty-1)*width];
outputGr[tx + ty*width] = sqrt(gradientX*gradientX + gradientY*gradientY);
//outputGr[tx + ty*width] = gradientX;
if(gradientX == 0)
gradientX = 1e-5;
//angle = ((atan(gradientY/gradientX)));
angle = ((atan(gradientY/gradientX)+(CUDART_PI_F/2))*180)/CUDART_PI_F;
nAngle = 180/BINNUM;
indTag = ceil(angle/nAngle);
if(indTag == 0)
indTag=1;
else if(indTag==10)
indTag=9;
outputTag[tx + ty*width] = indTag;
}
//outputX[tx + ty*width] = gradientX;
//outputY[tx + ty*width] = gradientY;
}
__global__ void computeBinHOG(float* outputHOGFeature,float* outputWeight,int *outputPosition,int* outputOffset,float* Gr,int* Tag,unsigned int xStepNum,unsigned int yStepNum,
unsigned int width,unsigned int height)
{
unsigned int tx = blockIdx.x*blockDim.x + threadIdx.x;
unsigned int ty = blockIdx.y*blockDim.y + threadIdx.y;
int centerX = floor(float(width)/2.0+0.5) - 1;
int centerY = floor(float(height)/2.0+0.5) - 1;
if(tx < xStepNum && ty < yStepNum)
{
//pixel position of center
int x = tx*STEPSIZE+1.5*CELLSIZE-1;
int y = ty*STEPSIZE+1.5*CELLSIZE-1;
int leftupperX = x - 1.5*CELLSIZE +1 ;
int leftupperY = y - 1.5*CELLSIZE +1 ;
//__shared__ float tmp[CELLSIZE][CELLSIZE];
float tmp[CELLBLOCKSIZE*CELLBLOCKSIZE][BINNUM] = {0.0f};
int inc = 0;
for(int i = 0; i < CELLBLOCKSIZE;i++)
{
for(int j=0; j<CELLBLOCKSIZE;j++)
{
int indX = leftupperX + j*CELLSIZE;
int indY = leftupperY + i*CELLSIZE;
for(int p=0;p<CELLSIZE;p++)
{
for(int q=0;q<CELLSIZE;q++)
{
//int currendindX = indX+p;
//int currendindY = indY+q;
int binind = Tag[indX+q + width*(indY+p)]-1;
float tmpdebug = Gr[indX+q + width*(indY+p)];
tmp[inc][binind] +=tmpdebug;
//tmp[inc][binind] += Gr[indX+q + width*(indY+p)];
}
}
inc++;
}
}
float norm = 0.0f;
int nonempty = 0;
for(int p=0;p<CELLBLOCKSIZE*CELLBLOCKSIZE;p++)
{
for(int q=0;q<BINNUM;q++)
{
norm+= (tmp[p][q]*tmp[p][q]);
if(tmp[p][q]>0)
nonempty ++;
}
}
norm = sqrt(norm);
norm +=1e-5;
//if(norm <= 0.0f)
// norm = 1e-5;
//float acc = 0.0;
for(int p=0;p<CELLBLOCKSIZE*CELLBLOCKSIZE;p++)
{
for(int q=0;q<BINNUM;q++)
{
//outputHOGFeature[ (tx+ty*xStepNum)*CELLBLOCKSIZE*CELLBLOCKSIZE*BINNUM +(q+p*BINNUM)] = tmp[p][q]/norm;
outputHOGFeature[ (ty+tx*yStepNum)*CELLBLOCKSIZE*CELLBLOCKSIZE*BINNUM +(q+p*BINNUM)] = tmp[p][q]/norm;
//acc +=tmp[p][q]/norm;
}
}
/*outputPosition[(tx + ty*xStepNum)*2] = x;
outputPosition[(tx + ty*xStepNum)*2 + 1] = y;
outputOffset[(tx + ty*xStepNum)*2] = centerX - x;
outputOffset[(tx + ty*xStepNum)*2 + 1] = centerY - y;
outputWeight[tx + ty*xStepNum] = float(nonempty)/81.0f;*/
outputPosition[(ty+tx*yStepNum)*2] = x;
outputPosition[(ty+tx*yStepNum)*2 + 1] = y;
outputOffset[(ty+tx*yStepNum)*2] = centerX - x;
outputOffset[(ty+tx*yStepNum)*2 + 1] = centerY - y;
outputWeight[(ty+tx*yStepNum)] = float(nonempty)/81.0f;
//outputWeight[(ty+tx*yStepNum)] = float(acc)/1.0f;
}
}
__global__ void computeBinHOGTar(float* outputHOGFeature,int *outputPosition,float* Gr,int* Tag,unsigned int xStepNum,unsigned int yStepNum,
unsigned int width,unsigned int height)
{
unsigned int tx = blockIdx.x*blockDim.x + threadIdx.x;
unsigned int ty = blockIdx.y*blockDim.y + threadIdx.y;
if(tx < xStepNum && ty < yStepNum)
{
//pixel position of center
int x = tx*STEPSIZE+1.5*CELLSIZE-1;
int y = ty*STEPSIZE+1.5*CELLSIZE-1;
int leftupperX = x - 1.5*CELLSIZE +1 ;
int leftupperY = y - 1.5*CELLSIZE +1 ;
//__shared__ float tmp[CELLSIZE][CELLSIZE];
float tmp[CELLBLOCKSIZE*CELLBLOCKSIZE][BINNUM] = {0.0f};
int inc = 0;
for(int i = 0; i < CELLBLOCKSIZE;i++)
{
for(int j=0; j<CELLBLOCKSIZE;j++)
{
int indX = leftupperX + j*CELLSIZE;
int indY = leftupperY + i*CELLSIZE;
for(int p=0;p<CELLSIZE;p++)
{
for(int q=0;q<CELLSIZE;q++)
{
//int currendindX = indX+p;
//int currendindY = indY+q;
int binind = Tag[indX+q + width*(indY+p)]-1;
tmp[inc][binind] += Gr[indX+q + width*(indY+p)];
}
}
inc++;
}
}
float norm = 0.0f;
int nonempty = 0;
for(int p=0;p<CELLBLOCKSIZE*CELLBLOCKSIZE;p++)
{
for(int q=0;q<BINNUM;q++)
{
norm+= (tmp[p][q]*tmp[p][q]);
if(tmp[p][q]>0)
nonempty ++;
}
}
norm = sqrt(norm);
norm +=1e-5;
//if(norm <= 0.0f)
// norm = 1e-5;
for(int p=0;p<CELLBLOCKSIZE*CELLBLOCKSIZE;p++)
{
for(int q=0;q<BINNUM;q++)
{
//outputHOGFeature[ (tx+ty*xStepNum)*CELLBLOCKSIZE*CELLBLOCKSIZE*BINNUM +(q+p*BINNUM)] = tmp[p][q]/norm;
outputHOGFeature[ (ty+tx*yStepNum)*CELLBLOCKSIZE*CELLBLOCKSIZE*BINNUM +(q+p*BINNUM)] = tmp[p][q]/norm;
}
}
//outputPosition[(tx + ty*xStepNum)*2] = x;
//outputPosition[(tx + ty*xStepNum)*2 + 1] = y;
outputPosition[(ty+tx*yStepNum)*2] = x;
outputPosition[(ty+tx*yStepNum)*2 + 1] = y;
}
}
__global__ void computeDistance(float* output,float* hog,float* hogTar,unsigned int width,unsigned int height)
{
/*__shared__ float tmp[2][81];
unsigned int bx = blockIdx.x * 1;
unsigned int by = blockIdx.y * 1;
unsigned int tx = threadIdx.x * 1;
if(tx < 81)
{
tmp[0][tx] = hog[tx + bx*CELLBLOCKSIZE*CELLBLOCKSIZE*BINNUM];
tmp[1][tx] = hogTar[tx + by*CELLBLOCKSIZE*CELLBLOCKSIZE*BINNUM];
}
__syncthreads();
float perDistance=0.0;
float tmp1 = 0.0;
float tmp2 = 0.0;
for(int i=0;i<81;i++)
{
tmp1 = tmp[0][i];
tmp2 = tmp[1][i];
perDistance += ((tmp1-tmp2)*(tmp1-tmp2))/(tmp1 + tmp2 + 1e-5);
}
output[bx + by*width] = 0.5 * perDistance;*/
unsigned int tx = blockIdx.x*blockDim.x + threadIdx.x;
unsigned int ty = blockIdx.y*blockDim.y + threadIdx.y;
if(tx < width && ty < height)
{
float perDistance = 0.0;
//float tmp[CELLBLOCKSIZE*CELLBLOCKSIZE*BINNUM]= {0.0f};
//float tmpTar[CELLBLOCKSIZE*CELLBLOCKSIZE*BINNUM]= {0.0f};
float tmp = 0.0;
float tmpTar = 0.0;
//int i=0;
for(int i =0;i<CELLBLOCKSIZE*CELLBLOCKSIZE*BINNUM;i++)
{
tmp = hog[i + tx*CELLBLOCKSIZE*CELLBLOCKSIZE*BINNUM];
tmpTar = hogTar[i + ty*CELLBLOCKSIZE*CELLBLOCKSIZE*BINNUM];
//float tmp = hog[i*(width) + tx];
//float tmpTar = hogTar[i*height + ty];
perDistance = perDistance + ((tmp-tmpTar)*(tmp-tmpTar))/(tmp + tmpTar + 1e-5);
//perDistance=1;
}
output[tx + ty*width] = 0.5 * perDistance;
//output[ty + tx*height] = 0.5 * perDistance;
}
}
__global__ void vote(float *OutputVoteMatrix,float *HOGDistance, float *weight,int *offset,int *samplepixel,
unsigned int width,unsigned int height,unsigned int voteWidth,unsigned int voteHeight)
{
unsigned int tx = blockIdx.x*blockDim.x + threadIdx.x;
unsigned int ty = blockIdx.y*blockDim.y + threadIdx.y;
if(tx < width && ty < height)
{
//if (HOGDistance[tx + ty*width] <= threshold[ty])
if (HOGDistance[tx + ty*width] <= 2)//
{
int x = samplepixel[ty*2];
int y = samplepixel[ty*2+1];
int offsetx = offset[tx*2];
int offsety = offset[tx*2+1];
int centerx = x + offsetx;
int centery = y + offsety;
if(centerx >= 0 && centery >= 0 && centerx < voteWidth && centery< voteHeight)
{
OutputVoteMatrix[centerx + centery*voteWidth] += 1/(HOGDistance[tx + ty*width]+1e-5 + 1) * weight[tx];
}
}
}
}
__global__ void genGaussianFilter(float* output)
{
unsigned int tx = blockIdx.x*blockDim.x + threadIdx.x;
unsigned int ty = blockIdx.y*blockDim.y + threadIdx.y;
__shared__ float gaussianKernel[KERNEL_WIDTH][KERNEL_WIDTH];
float sigma = 5.0;
float gaussianSum = 0.0;
gaussianKernel[ty][tx] = powf(2.71828,-((tx-15)*(tx-15)/(2*sigma*sigma) + (ty-15)*(ty-15)/(2*sigma*sigma)));
__syncthreads();
for(int i=0;i<KERNEL_WIDTH;i++)
for(int j=0;j<KERNEL_WIDTH;j++)
{
gaussianSum += gaussianKernel[i][j];
}
output[ty*KERNEL_WIDTH + tx] = gaussianKernel[ty][tx]/gaussianSum;
}
__global__ void gaussianFilter(float* output,float* input, float* gaussianKernel,unsigned int width,unsigned int height)
{
unsigned int tx = blockIdx.x*blockDim.x + threadIdx.x;
unsigned int ty = blockIdx.y*blockDim.y + threadIdx.y;
if(tx < width && ty < height)
{
float accum = 0.0;
float offset = 15;
for (int i = 0; i < KERNEL_WIDTH; ++i)
{
for (int j = 0; j < KERNEL_WIDTH; ++j)
{
int ind = tx+j-offset + (ty+i-offset) * width;
if(ind > 0 && ind < width*height)
accum += gaussianKernel[j + KERNEL_WIDTH*i] * input[ind];
}
output[tx + ty*width] = accum;
}
}
}
__global__ void detectMaximal(float* output,float* input,unsigned int width,unsigned int height,float maximal)
{
unsigned int tx = blockIdx.x*blockDim.x + threadIdx.x;
unsigned int ty = blockIdx.y*blockDim.y + threadIdx.y;
if(tx < width-1 && ty < height-1 && tx >0 && ty>0)
{
if (input[tx + ty*width] > 0.8*maximal && input[tx + ty*width] > input[tx-1 + (ty-1)*width] &&
input[tx + ty*width] > input[tx + (ty-1)*width] && input[tx + ty*width] > input[tx+1 + (ty-1)*width] &&
input[tx + ty*width] > input[tx-1 + (ty)*width] && input[tx + ty*width] > input[tx+1 + (ty)*width] &&
input[tx + ty*width] > input[tx-1 + (ty+1)*width] && input[tx + ty*width] > input[tx + (ty+1)*width] &&
input[tx + ty*width] > input[tx+1 + (ty+1)*width])
{
output[tx + ty*width] = (tx+1) + (ty)*width;
}
}
}
__global__ void computeThreshold(float* output,float* input)
{
unsigned int tx = threadIdx.x;
unsigned int bx = blockIdx.x;
__shared__ float partialMin[500];
partialMin[tx] = input[tx + bx*blockDim.x];
unsigned int stride = 1;
for (stride = 1; stride < blockDim.x; stride *= 2)
{
__syncthreads();
if (tx % (2 * stride) == 0 && tx + stride < blockDim.x)
partialMin[tx] = partialMin[tx] < partialMin[tx + stride] ? partialMin[tx]:partialMin[tx + stride];
}
/*unsigned int stridenew = stride/2;
float kmax = partialMin[0];
for(int i=0;i<blockDim.x;i+=stridenew)
{
if(kmax < partialMin[i])
kmax = partialMin[i];
}*/
output[0] = partialMin[0];
}
extern "C" float* computeHOG(float *img,float* imgTar,unsigned int width,unsigned int height,unsigned int widthTar,unsigned int heightTar)
{
//For performance analysis
cudaEvent_t start, stop0,stop1, stop2, stop3, stop4, stop5, stop6,stop7,stop8,stop9,stop10,stop11,stop12,stop13,stop14;
cudaEventCreate(&start);
cudaEventCreate(&stop0);
cudaEventCreate(&stop1);
cudaEventCreate(&stop2);
cudaEventCreate(&stop3);
cudaEventCreate(&stop4);
cudaEventCreate(&stop5);
cudaEventCreate(&stop6);
cudaEventCreate(&stop7);
cudaEventCreate(&stop8);
cudaEventCreate(&stop9);
cudaEventCreate(&stop10);
cudaEventCreate(&stop11);
cudaEventCreate(&stop12);
cudaEventCreate(&stop13);
cudaEventCreate(&stop14);
cudaEventRecord(start, 0);
int xStepNum = floor((width-CELLSIZE*CELLBLOCKSIZE)/float(STEPSIZE));
int yStepNum = floor((height-CELLSIZE*CELLBLOCKSIZE)/float(STEPSIZE));
int xStepNumTar = floor((widthTar-CELLSIZE*CELLBLOCKSIZE)/float(STEPSIZE));
int yStepNumTar = floor((heightTar-CELLSIZE*CELLBLOCKSIZE)/float(STEPSIZE));
float *Gr;
cudaMalloc((void**)&Gr , width*height*sizeof(float));
int *Tag;
cudaMalloc((void**)&Tag , width*height*sizeof(int));
float *HOGFeature;
cudaMalloc((void**)&HOGFeature , xStepNum*yStepNum*BINNUM*CELLBLOCKSIZE*CELLBLOCKSIZE*sizeof(float));
cudaMemset(HOGFeature,0,xStepNum*yStepNum*BINNUM*CELLBLOCKSIZE*CELLBLOCKSIZE*sizeof(float));
int *centerPosition;
cudaMalloc((void**)¢erPosition , 2*xStepNum*yStepNum*sizeof(int));
int *offset;
cudaMalloc((void**)&offset , 2*xStepNum*yStepNum*sizeof(int));
float *weight;
cudaMalloc((void**)&weight , xStepNum*yStepNum*sizeof(float));
float *GrTar;
cudaMalloc((void**)&GrTar , widthTar*heightTar*sizeof(float));
int *TagTar;
cudaMalloc((void**)&TagTar , widthTar*heightTar*sizeof(int));
int *samplepixel;
cudaMalloc((void**)&samplepixel , 2*xStepNum*yStepNum*sizeof(int));
float *HOGFeatureTar;
cudaMalloc((void**)&HOGFeatureTar , xStepNumTar*yStepNumTar*BINNUM*CELLBLOCKSIZE*CELLBLOCKSIZE*sizeof(float));
cudaMemset(HOGFeatureTar,0,xStepNumTar*yStepNumTar*BINNUM*CELLBLOCKSIZE*CELLBLOCKSIZE*sizeof(float));
float *HOGDistance;
cudaMalloc((void**)&HOGDistance , xStepNumTar*yStepNumTar*xStepNum*yStepNum*sizeof(float));
cudaMemset(HOGDistance,0,xStepNumTar*yStepNumTar*xStepNum*yStepNum*sizeof(float));
float *votematrix;
cudaMalloc((void**)&votematrix , widthTar*heightTar* sizeof(float));
cudaMemset(votematrix,0,widthTar*heightTar*sizeof(float));
float *gaussianKernel_dev;
cudaMalloc((void**)&gaussianKernel_dev , KERNEL_WIDTH*KERNEL_WIDTH* sizeof(float));
cudaMemset(gaussianKernel_dev,0,KERNEL_WIDTH*KERNEL_WIDTH*sizeof(float));
float *votematrix_smoothed;
cudaMalloc((void**)&votematrix_smoothed , widthTar*heightTar* sizeof(float));
cudaMemset(votematrix_smoothed,0,widthTar*heightTar*sizeof(float));
float *vote_maxposition;
cudaMalloc((void**)&vote_maxposition , widthTar*heightTar* sizeof(float));
cudaMemset(vote_maxposition,0,widthTar*heightTar*sizeof(float));
//********************
cudaEventRecord(stop0, 0);
cudaEventSynchronize(stop0);
float elapsedTime0;
cudaEventElapsedTime(&elapsedTime0, start, stop0);
printf("Initialization :%f ms\n", elapsedTime0);
//********************
dim3 dimBlock(16,16,1);
dim3 dimGrid(width/dimBlock.x + 1, height/dimBlock.y + 1,1);
computeGradient<<<dimGrid,dimBlock>>>(Gr,Tag,img,width,height);
//********************
cudaEventRecord(stop1, 0);
cudaEventSynchronize(stop1);
float elapsedTime1;
cudaEventElapsedTime(&elapsedTime1, start, stop1);
printf("Gradient Computation for Ref Image :%f ms\n", elapsedTime1);
//********************
dimBlock = dim3(16,16,1);
dimGrid = dim3(xStepNum/dimBlock.x + 1, yStepNum/dimBlock.y + 1,1);
computeBinHOG<<<dimGrid,dimBlock>>>(HOGFeature,weight,centerPosition,offset,Gr,Tag,xStepNum,yStepNum,width,height);
//********************
cudaEventRecord(stop2, 0);
cudaEventSynchronize(stop2);
float elapsedTime2;
cudaEventElapsedTime(&elapsedTime2, start, stop2);
printf("HOG Computation for Ref Image :%f ms\n", elapsedTime2);
//********************
dimBlock = dim3(16,16,1);
dimGrid = dim3(widthTar/dimBlock.x + 1, heightTar/dimBlock.y + 1,1);
computeGradient<<<dimGrid,dimBlock>>>(GrTar,TagTar,imgTar,widthTar,heightTar);
//********************
cudaEventRecord(stop3, 0);
cudaEventSynchronize(stop3);
float elapsedTime3;
cudaEventElapsedTime(&elapsedTime3, start, stop3);
printf("Gradient Computation for Target Image :%f ms\n", elapsedTime3);
//********************
dimBlock = dim3(16,16,1);
dimGrid = dim3(xStepNumTar/dimBlock.x + 1, yStepNumTar/dimBlock.y + 1,1);
computeBinHOGTar<<<dimGrid,dimBlock>>>(HOGFeatureTar,samplepixel,GrTar,TagTar,xStepNumTar,yStepNumTar,widthTar,heightTar);
//********************
cudaEventRecord(stop4, 0);
cudaEventSynchronize(stop4);
float elapsedTime4;
cudaEventElapsedTime(&elapsedTime4, start, stop4);
printf("HOG Computation for Target Image :%f ms\n", elapsedTime4);
//********************
dimBlock = dim3(16,16,1);
dimGrid = dim3((xStepNum*yStepNum)/dimBlock.x + 1, (xStepNumTar*yStepNumTar)/dimBlock.y + 1,1);
computeDistance<<<dimGrid,dimBlock>>>(HOGDistance,HOGFeature,HOGFeatureTar,xStepNum*yStepNum,xStepNumTar*yStepNumTar);
//********************
cudaEventRecord(stop5, 0);
cudaEventSynchronize(stop5);
float elapsedTime5;
cudaEventElapsedTime(&elapsedTime5, start, stop5);
printf("Distance Matrix Computation:%f ms\n", elapsedTime5);
//********************
//float *HOGDistanceSorted = new float[xStepNumTar*yStepNumTar*xStepNum*yStepNum];
//cudaMemcpy(HOGDistanceSorted,HOGDistance, xStepNumTar*yStepNumTar*xStepNum*yStepNum*sizeof(float), cudaMemcpyDeviceToHost);
/*float *threshold_host = new float[xStepNumTar*yStepNumTar];
for(int i=0;i<xStepNumTar*yStepNumTar;i++)
{
thrust::sort(HOGDistanceSorted + i*(xStepNum*yStepNum), HOGDistanceSorted +i*(xStepNum*yStepNum) +xStepNum*yStepNum);
threshold_host[i] = HOGDistanceSorted[i*(xStepNum*yStepNum) + K - 1];
}*/
/*float *threshold_dev;
cudaMalloc((void**)&threshold_dev , xStepNumTar*yStepNumTar* sizeof(float));
cudaMemcpy(threshold_dev,threshold_host, xStepNumTar*yStepNumTar*sizeof(float), cudaMemcpyHostToDevice);*/
//cudaMemcpy(threshold_dev,threshold_host, xStepNumTar*yStepNumTar*sizeof(float), cudaMemcpyHostToDevice);
/*dimBlock = dim3(xStepNum*yStepNum,1,1);
dimGrid = dim3(xStepNumTar*yStepNumTar,1,1);
float *threshold_dev;
cudaMalloc((void**)&threshold_dev , xStepNumTar*yStepNumTar* sizeof(float));
cudaMemset(threshold_dev,0,xStepNumTar*yStepNumTar*sizeof(float));
computeThreshold<<<dimGrid,dimBlock>>>(threshold_dev,HOGDistance);*/
dimBlock = dim3(16,16,1);
dimGrid = dim3((xStepNum*yStepNum)/dimBlock.x + 1, (xStepNumTar*yStepNumTar)/dimBlock.y + 1,1);
//vote<<<dimGrid,dimBlock>>>(votematrix,threshold_dev,HOGDistance,weight,offset,samplepixel,xStepNum*yStepNum,xStepNumTar*yStepNumTar,widthTar,heightTar);
vote<<<dimGrid,dimBlock>>>(votematrix,HOGDistance,weight,offset,samplepixel,xStepNum*yStepNum,xStepNumTar*yStepNumTar,widthTar,heightTar);
//********************
cudaEventRecord(stop6, 0);
cudaEventSynchronize(stop6);
float elapsedTime6;
cudaEventElapsedTime(&elapsedTime6, start, stop6);
printf("Threshold and Voting:%f ms\n", elapsedTime6);
//********************
dimBlock = dim3(KERNEL_WIDTH,KERNEL_WIDTH,1);
dimGrid = dim3(1,1,1);
genGaussianFilter<<<dimGrid,dimBlock>>>(gaussianKernel_dev);
//********************
cudaEventRecord(stop7, 0);
cudaEventSynchronize(stop7);
float elapsedTime7;
cudaEventElapsedTime(&elapsedTime7, start, stop7);
printf("Gaussian Kernel Generation:%f ms\n", elapsedTime7);
//********************
dimBlock = dim3(16,16,1);
dimGrid = dim3(widthTar/dimBlock.x + 1, heightTar/dimBlock.y + 1,1);
gaussianFilter<<<dimGrid,dimBlock>>>(votematrix_smoothed,votematrix, gaussianKernel_dev,widthTar,heightTar);
//********************
cudaEventRecord(stop8, 0);
cudaEventSynchronize(stop8);
float elapsedTime8;
cudaEventElapsedTime(&elapsedTime8, start, stop8);
printf("Gaussian Blur:%f ms\n", elapsedTime8);
//********************
float *votematrix_smoothed_sorted = new float[widthTar*heightTar];
cudaMemcpy(votematrix_smoothed_sorted,votematrix_smoothed, widthTar*heightTar*sizeof(float), cudaMemcpyDeviceToHost);
thrust::sort(votematrix_smoothed_sorted, votematrix_smoothed_sorted +widthTar*heightTar);
float maxvalue = votematrix_smoothed_sorted[widthTar*heightTar-1];
//********************
cudaEventRecord(stop9, 0);
cudaEventSynchronize(stop9);
float elapsedTime9;
cudaEventElapsedTime(&elapsedTime9, start, stop9);
printf("Maximal Voting Value Computation:%f ms\n", elapsedTime9);
//********************
dimBlock = dim3(16,16,1);
dimGrid = dim3(widthTar/dimBlock.x + 1, heightTar/dimBlock.y + 1,1);
detectMaximal<<<dimGrid,dimBlock>>>(vote_maxposition,votematrix_smoothed,widthTar,heightTar,maxvalue);
//********************
cudaEventRecord(stop10, 0);
cudaEventSynchronize(stop10);
float elapsedTime10;
cudaEventElapsedTime(&elapsedTime10, start, stop10);
printf("Local Maximal Detection:%f ms\n", elapsedTime10);
//********************
float *vote_maxposition_sorted = new float[widthTar*heightTar];
cudaMemcpy(vote_maxposition_sorted,vote_maxposition, widthTar*heightTar*sizeof(float), cudaMemcpyDeviceToHost);
thrust::sort(vote_maxposition_sorted, vote_maxposition_sorted +widthTar*heightTar);
int centernum = 0;
for(int i=widthTar*heightTar-1;i>=0;i--)
{
if(vote_maxposition_sorted[i] > 0)
centernum++;
else
break;
}
//********************
cudaEventRecord(stop11, 0);
cudaEventSynchronize(stop11);
float elapsedTime11;
cudaEventElapsedTime(&elapsedTime11, start, stop11);
printf("Transfering Detected Logo Position to HOST:%f ms\n", elapsedTime11);
//********************
//float *ret = new float[centernum];
//cudaMemcpy(ret,vote_maxposition_sorted + widthTar*heightTar - centernum, centernum*sizeof(float), cudaMemcpyHostToHost);
float *ret = new float[centernum+1];
ret[0] = float(centernum);
cudaMemcpy(ret+1,vote_maxposition_sorted + widthTar*heightTar - centernum, centernum*sizeof(float), cudaMemcpyHostToHost);
//float *ret = new float[widthTar*heightTar];
//cudaMemcpy(ret,votematrix_smoothed, widthTar*heightTar*sizeof(float), cudaMemcpyDeviceToHost);
return ret;
} | #include <hip/hip_runtime.h>
#include <math.h>
#include <hip/hip_math_constants.h>
#include <stdlib.h>
#include <vector>
#include <algorithm>
#include <thrust/host_vector.h>
#include <thrust/device_vector.h>
#include <thrust/generate.h>
#include <thrust/sort.h>
#include <thrust/copy.h>
#include <cstdlib>
#define BINNUM 9
#define CELLSIZE 6
#define CELLBLOCKSIZE 3
#define STEPSIZE 3
#define K 5
#define KERNEL_WIDTH 31
__global__ void computeGradient(float* outputGr,int* outputTag,float* input,unsigned int width,unsigned int height)
{
unsigned int tx = blockIdx.x*blockDim.x + threadIdx.x;
unsigned int ty = blockIdx.y*blockDim.y + threadIdx.y;
float gradientX, gradientY;
float angle;
int nAngle;
int indTag;
if(tx < width && ty < height)
{
if(tx == 0) //image boundary
gradientX = input[tx+1 + ty*width] - input[tx + ty*width];
else if(tx == width-1)
gradientX = input[tx + ty*width] - input[tx-1 + ty*width];
else if(ty == 0 || ty == height-1)
gradientX = 0;
else
gradientX = input[tx+1 + ty*width] - input[tx-1 + ty*width];
if(ty == 0) //image boundary
gradientY = input[tx + (ty+1)*width] - input[tx + (ty)*width];
else if (ty == height-1)
gradientY = input[tx + (ty)*width] - input[tx + (ty-1)*width];
else if (tx ==0 || tx == width-1)
gradientY = 0;
else
gradientY = input[tx + (ty+1)*width] - input[tx + (ty-1)*width];
outputGr[tx + ty*width] = sqrt(gradientX*gradientX + gradientY*gradientY);
//outputGr[tx + ty*width] = gradientX;
if(gradientX == 0)
gradientX = 1e-5;
//angle = ((atan(gradientY/gradientX)));
angle = ((atan(gradientY/gradientX)+(HIP_PI_F/2))*180)/HIP_PI_F;
nAngle = 180/BINNUM;
indTag = ceil(angle/nAngle);
if(indTag == 0)
indTag=1;
else if(indTag==10)
indTag=9;
outputTag[tx + ty*width] = indTag;
}
//outputX[tx + ty*width] = gradientX;
//outputY[tx + ty*width] = gradientY;
}
__global__ void computeBinHOG(float* outputHOGFeature,float* outputWeight,int *outputPosition,int* outputOffset,float* Gr,int* Tag,unsigned int xStepNum,unsigned int yStepNum,
unsigned int width,unsigned int height)
{
unsigned int tx = blockIdx.x*blockDim.x + threadIdx.x;
unsigned int ty = blockIdx.y*blockDim.y + threadIdx.y;
int centerX = floor(float(width)/2.0+0.5) - 1;
int centerY = floor(float(height)/2.0+0.5) - 1;
if(tx < xStepNum && ty < yStepNum)
{
//pixel position of center
int x = tx*STEPSIZE+1.5*CELLSIZE-1;
int y = ty*STEPSIZE+1.5*CELLSIZE-1;
int leftupperX = x - 1.5*CELLSIZE +1 ;
int leftupperY = y - 1.5*CELLSIZE +1 ;
//__shared__ float tmp[CELLSIZE][CELLSIZE];
float tmp[CELLBLOCKSIZE*CELLBLOCKSIZE][BINNUM] = {0.0f};
int inc = 0;
for(int i = 0; i < CELLBLOCKSIZE;i++)
{
for(int j=0; j<CELLBLOCKSIZE;j++)
{
int indX = leftupperX + j*CELLSIZE;
int indY = leftupperY + i*CELLSIZE;
for(int p=0;p<CELLSIZE;p++)
{
for(int q=0;q<CELLSIZE;q++)
{
//int currendindX = indX+p;
//int currendindY = indY+q;
int binind = Tag[indX+q + width*(indY+p)]-1;
float tmpdebug = Gr[indX+q + width*(indY+p)];
tmp[inc][binind] +=tmpdebug;
//tmp[inc][binind] += Gr[indX+q + width*(indY+p)];
}
}
inc++;
}
}
float norm = 0.0f;
int nonempty = 0;
for(int p=0;p<CELLBLOCKSIZE*CELLBLOCKSIZE;p++)
{
for(int q=0;q<BINNUM;q++)
{
norm+= (tmp[p][q]*tmp[p][q]);
if(tmp[p][q]>0)
nonempty ++;
}
}
norm = sqrt(norm);
norm +=1e-5;
//if(norm <= 0.0f)
// norm = 1e-5;
//float acc = 0.0;
for(int p=0;p<CELLBLOCKSIZE*CELLBLOCKSIZE;p++)
{
for(int q=0;q<BINNUM;q++)
{
//outputHOGFeature[ (tx+ty*xStepNum)*CELLBLOCKSIZE*CELLBLOCKSIZE*BINNUM +(q+p*BINNUM)] = tmp[p][q]/norm;
outputHOGFeature[ (ty+tx*yStepNum)*CELLBLOCKSIZE*CELLBLOCKSIZE*BINNUM +(q+p*BINNUM)] = tmp[p][q]/norm;
//acc +=tmp[p][q]/norm;
}
}
/*outputPosition[(tx + ty*xStepNum)*2] = x;
outputPosition[(tx + ty*xStepNum)*2 + 1] = y;
outputOffset[(tx + ty*xStepNum)*2] = centerX - x;
outputOffset[(tx + ty*xStepNum)*2 + 1] = centerY - y;
outputWeight[tx + ty*xStepNum] = float(nonempty)/81.0f;*/
outputPosition[(ty+tx*yStepNum)*2] = x;
outputPosition[(ty+tx*yStepNum)*2 + 1] = y;
outputOffset[(ty+tx*yStepNum)*2] = centerX - x;
outputOffset[(ty+tx*yStepNum)*2 + 1] = centerY - y;
outputWeight[(ty+tx*yStepNum)] = float(nonempty)/81.0f;
//outputWeight[(ty+tx*yStepNum)] = float(acc)/1.0f;
}
}
__global__ void computeBinHOGTar(float* outputHOGFeature,int *outputPosition,float* Gr,int* Tag,unsigned int xStepNum,unsigned int yStepNum,
unsigned int width,unsigned int height)
{
unsigned int tx = blockIdx.x*blockDim.x + threadIdx.x;
unsigned int ty = blockIdx.y*blockDim.y + threadIdx.y;
if(tx < xStepNum && ty < yStepNum)
{
//pixel position of center
int x = tx*STEPSIZE+1.5*CELLSIZE-1;
int y = ty*STEPSIZE+1.5*CELLSIZE-1;
int leftupperX = x - 1.5*CELLSIZE +1 ;
int leftupperY = y - 1.5*CELLSIZE +1 ;
//__shared__ float tmp[CELLSIZE][CELLSIZE];
float tmp[CELLBLOCKSIZE*CELLBLOCKSIZE][BINNUM] = {0.0f};
int inc = 0;
for(int i = 0; i < CELLBLOCKSIZE;i++)
{
for(int j=0; j<CELLBLOCKSIZE;j++)
{
int indX = leftupperX + j*CELLSIZE;
int indY = leftupperY + i*CELLSIZE;
for(int p=0;p<CELLSIZE;p++)
{
for(int q=0;q<CELLSIZE;q++)
{
//int currendindX = indX+p;
//int currendindY = indY+q;
int binind = Tag[indX+q + width*(indY+p)]-1;
tmp[inc][binind] += Gr[indX+q + width*(indY+p)];
}
}
inc++;
}
}
float norm = 0.0f;
int nonempty = 0;
for(int p=0;p<CELLBLOCKSIZE*CELLBLOCKSIZE;p++)
{
for(int q=0;q<BINNUM;q++)
{
norm+= (tmp[p][q]*tmp[p][q]);
if(tmp[p][q]>0)
nonempty ++;
}
}
norm = sqrt(norm);
norm +=1e-5;
//if(norm <= 0.0f)
// norm = 1e-5;
for(int p=0;p<CELLBLOCKSIZE*CELLBLOCKSIZE;p++)
{
for(int q=0;q<BINNUM;q++)
{
//outputHOGFeature[ (tx+ty*xStepNum)*CELLBLOCKSIZE*CELLBLOCKSIZE*BINNUM +(q+p*BINNUM)] = tmp[p][q]/norm;
outputHOGFeature[ (ty+tx*yStepNum)*CELLBLOCKSIZE*CELLBLOCKSIZE*BINNUM +(q+p*BINNUM)] = tmp[p][q]/norm;
}
}
//outputPosition[(tx + ty*xStepNum)*2] = x;
//outputPosition[(tx + ty*xStepNum)*2 + 1] = y;
outputPosition[(ty+tx*yStepNum)*2] = x;
outputPosition[(ty+tx*yStepNum)*2 + 1] = y;
}
}
__global__ void computeDistance(float* output,float* hog,float* hogTar,unsigned int width,unsigned int height)
{
/*__shared__ float tmp[2][81];
unsigned int bx = blockIdx.x * 1;
unsigned int by = blockIdx.y * 1;
unsigned int tx = threadIdx.x * 1;
if(tx < 81)
{
tmp[0][tx] = hog[tx + bx*CELLBLOCKSIZE*CELLBLOCKSIZE*BINNUM];
tmp[1][tx] = hogTar[tx + by*CELLBLOCKSIZE*CELLBLOCKSIZE*BINNUM];
}
__syncthreads();
float perDistance=0.0;
float tmp1 = 0.0;
float tmp2 = 0.0;
for(int i=0;i<81;i++)
{
tmp1 = tmp[0][i];
tmp2 = tmp[1][i];
perDistance += ((tmp1-tmp2)*(tmp1-tmp2))/(tmp1 + tmp2 + 1e-5);
}
output[bx + by*width] = 0.5 * perDistance;*/
unsigned int tx = blockIdx.x*blockDim.x + threadIdx.x;
unsigned int ty = blockIdx.y*blockDim.y + threadIdx.y;
if(tx < width && ty < height)
{
float perDistance = 0.0;
//float tmp[CELLBLOCKSIZE*CELLBLOCKSIZE*BINNUM]= {0.0f};
//float tmpTar[CELLBLOCKSIZE*CELLBLOCKSIZE*BINNUM]= {0.0f};
float tmp = 0.0;
float tmpTar = 0.0;
//int i=0;
for(int i =0;i<CELLBLOCKSIZE*CELLBLOCKSIZE*BINNUM;i++)
{
tmp = hog[i + tx*CELLBLOCKSIZE*CELLBLOCKSIZE*BINNUM];
tmpTar = hogTar[i + ty*CELLBLOCKSIZE*CELLBLOCKSIZE*BINNUM];
//float tmp = hog[i*(width) + tx];
//float tmpTar = hogTar[i*height + ty];
perDistance = perDistance + ((tmp-tmpTar)*(tmp-tmpTar))/(tmp + tmpTar + 1e-5);
//perDistance=1;
}
output[tx + ty*width] = 0.5 * perDistance;
//output[ty + tx*height] = 0.5 * perDistance;
}
}
__global__ void vote(float *OutputVoteMatrix,float *HOGDistance, float *weight,int *offset,int *samplepixel,
unsigned int width,unsigned int height,unsigned int voteWidth,unsigned int voteHeight)
{
unsigned int tx = blockIdx.x*blockDim.x + threadIdx.x;
unsigned int ty = blockIdx.y*blockDim.y + threadIdx.y;
if(tx < width && ty < height)
{
//if (HOGDistance[tx + ty*width] <= threshold[ty])
if (HOGDistance[tx + ty*width] <= 2)//
{
int x = samplepixel[ty*2];
int y = samplepixel[ty*2+1];
int offsetx = offset[tx*2];
int offsety = offset[tx*2+1];
int centerx = x + offsetx;
int centery = y + offsety;
if(centerx >= 0 && centery >= 0 && centerx < voteWidth && centery< voteHeight)
{
OutputVoteMatrix[centerx + centery*voteWidth] += 1/(HOGDistance[tx + ty*width]+1e-5 + 1) * weight[tx];
}
}
}
}
__global__ void genGaussianFilter(float* output)
{
unsigned int tx = blockIdx.x*blockDim.x + threadIdx.x;
unsigned int ty = blockIdx.y*blockDim.y + threadIdx.y;
__shared__ float gaussianKernel[KERNEL_WIDTH][KERNEL_WIDTH];
float sigma = 5.0;
float gaussianSum = 0.0;
gaussianKernel[ty][tx] = powf(2.71828,-((tx-15)*(tx-15)/(2*sigma*sigma) + (ty-15)*(ty-15)/(2*sigma*sigma)));
__syncthreads();
for(int i=0;i<KERNEL_WIDTH;i++)
for(int j=0;j<KERNEL_WIDTH;j++)
{
gaussianSum += gaussianKernel[i][j];
}
output[ty*KERNEL_WIDTH + tx] = gaussianKernel[ty][tx]/gaussianSum;
}
__global__ void gaussianFilter(float* output,float* input, float* gaussianKernel,unsigned int width,unsigned int height)
{
unsigned int tx = blockIdx.x*blockDim.x + threadIdx.x;
unsigned int ty = blockIdx.y*blockDim.y + threadIdx.y;
if(tx < width && ty < height)
{
float accum = 0.0;
float offset = 15;
for (int i = 0; i < KERNEL_WIDTH; ++i)
{
for (int j = 0; j < KERNEL_WIDTH; ++j)
{
int ind = tx+j-offset + (ty+i-offset) * width;
if(ind > 0 && ind < width*height)
accum += gaussianKernel[j + KERNEL_WIDTH*i] * input[ind];
}
output[tx + ty*width] = accum;
}
}
}
__global__ void detectMaximal(float* output,float* input,unsigned int width,unsigned int height,float maximal)
{
unsigned int tx = blockIdx.x*blockDim.x + threadIdx.x;
unsigned int ty = blockIdx.y*blockDim.y + threadIdx.y;
if(tx < width-1 && ty < height-1 && tx >0 && ty>0)
{
if (input[tx + ty*width] > 0.8*maximal && input[tx + ty*width] > input[tx-1 + (ty-1)*width] &&
input[tx + ty*width] > input[tx + (ty-1)*width] && input[tx + ty*width] > input[tx+1 + (ty-1)*width] &&
input[tx + ty*width] > input[tx-1 + (ty)*width] && input[tx + ty*width] > input[tx+1 + (ty)*width] &&
input[tx + ty*width] > input[tx-1 + (ty+1)*width] && input[tx + ty*width] > input[tx + (ty+1)*width] &&
input[tx + ty*width] > input[tx+1 + (ty+1)*width])
{
output[tx + ty*width] = (tx+1) + (ty)*width;
}
}
}
__global__ void computeThreshold(float* output,float* input)
{
unsigned int tx = threadIdx.x;
unsigned int bx = blockIdx.x;
__shared__ float partialMin[500];
partialMin[tx] = input[tx + bx*blockDim.x];
unsigned int stride = 1;
for (stride = 1; stride < blockDim.x; stride *= 2)
{
__syncthreads();
if (tx % (2 * stride) == 0 && tx + stride < blockDim.x)
partialMin[tx] = partialMin[tx] < partialMin[tx + stride] ? partialMin[tx]:partialMin[tx + stride];
}
/*unsigned int stridenew = stride/2;
float kmax = partialMin[0];
for(int i=0;i<blockDim.x;i+=stridenew)
{
if(kmax < partialMin[i])
kmax = partialMin[i];
}*/
output[0] = partialMin[0];
}
extern "C" float* computeHOG(float *img,float* imgTar,unsigned int width,unsigned int height,unsigned int widthTar,unsigned int heightTar)
{
//For performance analysis
hipEvent_t start, stop0,stop1, stop2, stop3, stop4, stop5, stop6,stop7,stop8,stop9,stop10,stop11,stop12,stop13,stop14;
hipEventCreate(&start);
hipEventCreate(&stop0);
hipEventCreate(&stop1);
hipEventCreate(&stop2);
hipEventCreate(&stop3);
hipEventCreate(&stop4);
hipEventCreate(&stop5);
hipEventCreate(&stop6);
hipEventCreate(&stop7);
hipEventCreate(&stop8);
hipEventCreate(&stop9);
hipEventCreate(&stop10);
hipEventCreate(&stop11);
hipEventCreate(&stop12);
hipEventCreate(&stop13);
hipEventCreate(&stop14);
hipEventRecord(start, 0);
int xStepNum = floor((width-CELLSIZE*CELLBLOCKSIZE)/float(STEPSIZE));
int yStepNum = floor((height-CELLSIZE*CELLBLOCKSIZE)/float(STEPSIZE));
int xStepNumTar = floor((widthTar-CELLSIZE*CELLBLOCKSIZE)/float(STEPSIZE));
int yStepNumTar = floor((heightTar-CELLSIZE*CELLBLOCKSIZE)/float(STEPSIZE));
float *Gr;
hipMalloc((void**)&Gr , width*height*sizeof(float));
int *Tag;
hipMalloc((void**)&Tag , width*height*sizeof(int));
float *HOGFeature;
hipMalloc((void**)&HOGFeature , xStepNum*yStepNum*BINNUM*CELLBLOCKSIZE*CELLBLOCKSIZE*sizeof(float));
hipMemset(HOGFeature,0,xStepNum*yStepNum*BINNUM*CELLBLOCKSIZE*CELLBLOCKSIZE*sizeof(float));
int *centerPosition;
hipMalloc((void**)¢erPosition , 2*xStepNum*yStepNum*sizeof(int));
int *offset;
hipMalloc((void**)&offset , 2*xStepNum*yStepNum*sizeof(int));
float *weight;
hipMalloc((void**)&weight , xStepNum*yStepNum*sizeof(float));
float *GrTar;
hipMalloc((void**)&GrTar , widthTar*heightTar*sizeof(float));
int *TagTar;
hipMalloc((void**)&TagTar , widthTar*heightTar*sizeof(int));
int *samplepixel;
hipMalloc((void**)&samplepixel , 2*xStepNum*yStepNum*sizeof(int));
float *HOGFeatureTar;
hipMalloc((void**)&HOGFeatureTar , xStepNumTar*yStepNumTar*BINNUM*CELLBLOCKSIZE*CELLBLOCKSIZE*sizeof(float));
hipMemset(HOGFeatureTar,0,xStepNumTar*yStepNumTar*BINNUM*CELLBLOCKSIZE*CELLBLOCKSIZE*sizeof(float));
float *HOGDistance;
hipMalloc((void**)&HOGDistance , xStepNumTar*yStepNumTar*xStepNum*yStepNum*sizeof(float));
hipMemset(HOGDistance,0,xStepNumTar*yStepNumTar*xStepNum*yStepNum*sizeof(float));
float *votematrix;
hipMalloc((void**)&votematrix , widthTar*heightTar* sizeof(float));
hipMemset(votematrix,0,widthTar*heightTar*sizeof(float));
float *gaussianKernel_dev;
hipMalloc((void**)&gaussianKernel_dev , KERNEL_WIDTH*KERNEL_WIDTH* sizeof(float));
hipMemset(gaussianKernel_dev,0,KERNEL_WIDTH*KERNEL_WIDTH*sizeof(float));
float *votematrix_smoothed;
hipMalloc((void**)&votematrix_smoothed , widthTar*heightTar* sizeof(float));
hipMemset(votematrix_smoothed,0,widthTar*heightTar*sizeof(float));
float *vote_maxposition;
hipMalloc((void**)&vote_maxposition , widthTar*heightTar* sizeof(float));
hipMemset(vote_maxposition,0,widthTar*heightTar*sizeof(float));
//********************
hipEventRecord(stop0, 0);
hipEventSynchronize(stop0);
float elapsedTime0;
hipEventElapsedTime(&elapsedTime0, start, stop0);
printf("Initialization :%f ms\n", elapsedTime0);
//********************
dim3 dimBlock(16,16,1);
dim3 dimGrid(width/dimBlock.x + 1, height/dimBlock.y + 1,1);
computeGradient<<<dimGrid,dimBlock>>>(Gr,Tag,img,width,height);
//********************
hipEventRecord(stop1, 0);
hipEventSynchronize(stop1);
float elapsedTime1;
hipEventElapsedTime(&elapsedTime1, start, stop1);
printf("Gradient Computation for Ref Image :%f ms\n", elapsedTime1);
//********************
dimBlock = dim3(16,16,1);
dimGrid = dim3(xStepNum/dimBlock.x + 1, yStepNum/dimBlock.y + 1,1);
computeBinHOG<<<dimGrid,dimBlock>>>(HOGFeature,weight,centerPosition,offset,Gr,Tag,xStepNum,yStepNum,width,height);
//********************
hipEventRecord(stop2, 0);
hipEventSynchronize(stop2);
float elapsedTime2;
hipEventElapsedTime(&elapsedTime2, start, stop2);
printf("HOG Computation for Ref Image :%f ms\n", elapsedTime2);
//********************
dimBlock = dim3(16,16,1);
dimGrid = dim3(widthTar/dimBlock.x + 1, heightTar/dimBlock.y + 1,1);
computeGradient<<<dimGrid,dimBlock>>>(GrTar,TagTar,imgTar,widthTar,heightTar);
//********************
hipEventRecord(stop3, 0);
hipEventSynchronize(stop3);
float elapsedTime3;
hipEventElapsedTime(&elapsedTime3, start, stop3);
printf("Gradient Computation for Target Image :%f ms\n", elapsedTime3);
//********************
dimBlock = dim3(16,16,1);
dimGrid = dim3(xStepNumTar/dimBlock.x + 1, yStepNumTar/dimBlock.y + 1,1);
computeBinHOGTar<<<dimGrid,dimBlock>>>(HOGFeatureTar,samplepixel,GrTar,TagTar,xStepNumTar,yStepNumTar,widthTar,heightTar);
//********************
hipEventRecord(stop4, 0);
hipEventSynchronize(stop4);
float elapsedTime4;
hipEventElapsedTime(&elapsedTime4, start, stop4);
printf("HOG Computation for Target Image :%f ms\n", elapsedTime4);
//********************
dimBlock = dim3(16,16,1);
dimGrid = dim3((xStepNum*yStepNum)/dimBlock.x + 1, (xStepNumTar*yStepNumTar)/dimBlock.y + 1,1);
computeDistance<<<dimGrid,dimBlock>>>(HOGDistance,HOGFeature,HOGFeatureTar,xStepNum*yStepNum,xStepNumTar*yStepNumTar);
//********************
hipEventRecord(stop5, 0);
hipEventSynchronize(stop5);
float elapsedTime5;
hipEventElapsedTime(&elapsedTime5, start, stop5);
printf("Distance Matrix Computation:%f ms\n", elapsedTime5);
//********************
//float *HOGDistanceSorted = new float[xStepNumTar*yStepNumTar*xStepNum*yStepNum];
//cudaMemcpy(HOGDistanceSorted,HOGDistance, xStepNumTar*yStepNumTar*xStepNum*yStepNum*sizeof(float), cudaMemcpyDeviceToHost);
/*float *threshold_host = new float[xStepNumTar*yStepNumTar];
for(int i=0;i<xStepNumTar*yStepNumTar;i++)
{
thrust::sort(HOGDistanceSorted + i*(xStepNum*yStepNum), HOGDistanceSorted +i*(xStepNum*yStepNum) +xStepNum*yStepNum);
threshold_host[i] = HOGDistanceSorted[i*(xStepNum*yStepNum) + K - 1];
}*/
/*float *threshold_dev;
cudaMalloc((void**)&threshold_dev , xStepNumTar*yStepNumTar* sizeof(float));
cudaMemcpy(threshold_dev,threshold_host, xStepNumTar*yStepNumTar*sizeof(float), cudaMemcpyHostToDevice);*/
//cudaMemcpy(threshold_dev,threshold_host, xStepNumTar*yStepNumTar*sizeof(float), cudaMemcpyHostToDevice);
/*dimBlock = dim3(xStepNum*yStepNum,1,1);
dimGrid = dim3(xStepNumTar*yStepNumTar,1,1);
float *threshold_dev;
cudaMalloc((void**)&threshold_dev , xStepNumTar*yStepNumTar* sizeof(float));
cudaMemset(threshold_dev,0,xStepNumTar*yStepNumTar*sizeof(float));
computeThreshold<<<dimGrid,dimBlock>>>(threshold_dev,HOGDistance);*/
dimBlock = dim3(16,16,1);
dimGrid = dim3((xStepNum*yStepNum)/dimBlock.x + 1, (xStepNumTar*yStepNumTar)/dimBlock.y + 1,1);
//vote<<<dimGrid,dimBlock>>>(votematrix,threshold_dev,HOGDistance,weight,offset,samplepixel,xStepNum*yStepNum,xStepNumTar*yStepNumTar,widthTar,heightTar);
vote<<<dimGrid,dimBlock>>>(votematrix,HOGDistance,weight,offset,samplepixel,xStepNum*yStepNum,xStepNumTar*yStepNumTar,widthTar,heightTar);
//********************
hipEventRecord(stop6, 0);
hipEventSynchronize(stop6);
float elapsedTime6;
hipEventElapsedTime(&elapsedTime6, start, stop6);
printf("Threshold and Voting:%f ms\n", elapsedTime6);
//********************
dimBlock = dim3(KERNEL_WIDTH,KERNEL_WIDTH,1);
dimGrid = dim3(1,1,1);
genGaussianFilter<<<dimGrid,dimBlock>>>(gaussianKernel_dev);
//********************
hipEventRecord(stop7, 0);
hipEventSynchronize(stop7);
float elapsedTime7;
hipEventElapsedTime(&elapsedTime7, start, stop7);
printf("Gaussian Kernel Generation:%f ms\n", elapsedTime7);
//********************
dimBlock = dim3(16,16,1);
dimGrid = dim3(widthTar/dimBlock.x + 1, heightTar/dimBlock.y + 1,1);
gaussianFilter<<<dimGrid,dimBlock>>>(votematrix_smoothed,votematrix, gaussianKernel_dev,widthTar,heightTar);
//********************
hipEventRecord(stop8, 0);
hipEventSynchronize(stop8);
float elapsedTime8;
hipEventElapsedTime(&elapsedTime8, start, stop8);
printf("Gaussian Blur:%f ms\n", elapsedTime8);
//********************
float *votematrix_smoothed_sorted = new float[widthTar*heightTar];
hipMemcpy(votematrix_smoothed_sorted,votematrix_smoothed, widthTar*heightTar*sizeof(float), hipMemcpyDeviceToHost);
thrust::sort(votematrix_smoothed_sorted, votematrix_smoothed_sorted +widthTar*heightTar);
float maxvalue = votematrix_smoothed_sorted[widthTar*heightTar-1];
//********************
hipEventRecord(stop9, 0);
hipEventSynchronize(stop9);
float elapsedTime9;
hipEventElapsedTime(&elapsedTime9, start, stop9);
printf("Maximal Voting Value Computation:%f ms\n", elapsedTime9);
//********************
dimBlock = dim3(16,16,1);
dimGrid = dim3(widthTar/dimBlock.x + 1, heightTar/dimBlock.y + 1,1);
detectMaximal<<<dimGrid,dimBlock>>>(vote_maxposition,votematrix_smoothed,widthTar,heightTar,maxvalue);
//********************
hipEventRecord(stop10, 0);
hipEventSynchronize(stop10);
float elapsedTime10;
hipEventElapsedTime(&elapsedTime10, start, stop10);
printf("Local Maximal Detection:%f ms\n", elapsedTime10);
//********************
float *vote_maxposition_sorted = new float[widthTar*heightTar];
hipMemcpy(vote_maxposition_sorted,vote_maxposition, widthTar*heightTar*sizeof(float), hipMemcpyDeviceToHost);
thrust::sort(vote_maxposition_sorted, vote_maxposition_sorted +widthTar*heightTar);
int centernum = 0;
for(int i=widthTar*heightTar-1;i>=0;i--)
{
if(vote_maxposition_sorted[i] > 0)
centernum++;
else
break;
}
//********************
hipEventRecord(stop11, 0);
hipEventSynchronize(stop11);
float elapsedTime11;
hipEventElapsedTime(&elapsedTime11, start, stop11);
printf("Transfering Detected Logo Position to HOST:%f ms\n", elapsedTime11);
//********************
//float *ret = new float[centernum];
//cudaMemcpy(ret,vote_maxposition_sorted + widthTar*heightTar - centernum, centernum*sizeof(float), cudaMemcpyHostToHost);
float *ret = new float[centernum+1];
ret[0] = float(centernum);
hipMemcpy(ret+1,vote_maxposition_sorted + widthTar*heightTar - centernum, centernum*sizeof(float), hipMemcpyHostToHost);
//float *ret = new float[widthTar*heightTar];
//cudaMemcpy(ret,votematrix_smoothed, widthTar*heightTar*sizeof(float), cudaMemcpyDeviceToHost);
return ret;
} |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <cuda_runtime.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <math.h>
#include <time.h>
#define ELEMENT_MIN 0
#define ELEMENT_MAX 10
#define BLOCK_SIZE 16
#define TILE_SIZE 16
#define ZERO 1.e-6
int UI(int argc, char* argv[], int* jkl);
float randGenerate(int min, int max);
void initMatrix(float* matrix, int size, int min, int max);
void matrixMulCPU(float* A, float* B, float* C, int j, int k, int l);
__global__
void matrixMulGPU(float* d_A, float* d_B, float* d_C, int j, int k, int l);
void showMatrix(float* matrix, int row, int col);
void resultCheck(float* result_CPU, float* result_GPU, int size);
int main(int argc, char* argv[]){
// reset rand seed
srand((unsigned)time(NULL));
clock_t start, finish;
int total_time;
// Go through UI first.
// In UI section, only command with valid param can go to the next step.
int UIStatus;
int jkl[3];
UIStatus = UI(argc, argv, jkl);
if (UIStatus != 0) {
printf("\nApplication terminates.");
return 0;
}
printf("\nContinuing with j=%d, k=%d, l=%d", jkl[0], jkl[1], jkl[2]);
// UI section ends
// Initialize these two matrix A, B with random float type
const int j = jkl[0];
const int k = jkl[1];
const int l = jkl[2];
float* A = (float*)malloc(j * k * sizeof(float));
float* B = (float*)malloc(k * l * sizeof(float));
initMatrix(A, (j * k), ELEMENT_MIN, ELEMENT_MAX);
initMatrix(B, (k * l), ELEMENT_MIN, ELEMENT_MAX);
showMatrix(A, j, k);
showMatrix(B, k, l);
printf("\nDone initializing matrix A with size %d*%d and matrix B with %d*%d", j, k, k, l);
// Initialzing ends
// CPU code for calculating the matrix multiplication
// Use this result to varify the kernel result later
// Only do this step when j, k, l is below 5000
float* C_GPU = (float*)malloc(j * l * sizeof(float));
float* C_CPU = (float*)malloc(j * l * sizeof(float));
if (k < 5000 && j < 5000 && l < 5000) {
start = clock();
matrixMulCPU(A, B, C_CPU, j, k, l);
finish = clock();
printf("\nDone matrix multiplication with CPU");
total_time = (int)(finish - start);
printf("\n%d microseconds used.\n", total_time);
showMatrix(C_CPU, j, l);
}
// Matrix multipication with CPU ends
// Allocate device memory and copy data from host to device
float *d_A, *d_B, *d_C;
cudaMalloc((float**)&d_A, j * k * sizeof(float));
cudaMalloc((float**)&d_B, k * l * sizeof(float));
cudaMalloc((float**)&d_C, j * l * sizeof(float));
printf("\nDone allocating space in device.");
cudaMemcpy(d_A, A, j * k * sizeof(float), cudaMemcpyHostToDevice);
cudaMemcpy(d_B, B, k * l * sizeof(float), cudaMemcpyHostToDevice);
printf("\nDone copying memory from host to device");
// Done allocating and transfering
// Initialize thread block and kernel grid dimensions
dim3 threads(BLOCK_SIZE, BLOCK_SIZE);
dim3 grid((int)ceil(1.0 * l / threads.x), (int)ceil(1.0 * j / threads.y));
printf("\nDone initializing block dimention and grid dimention.");
// Done initializing thread block and kernel grid dimensions
// launch CUDA device kernel
start = clock();
matrixMulGPU<<< grid, threads>>>(d_A, d_B, d_C, j, k, l);
// Done CUDA device kernel
// Copy results from device to host and free device memory
cudaMemcpy(C_GPU, d_C, j * l * sizeof(float), cudaMemcpyDeviceToHost);
finish = clock();
printf("\nDone matrix multiplication with GPU.");
total_time = (int)(finish - start);
printf("\n%d microseconds used.\n", total_time);
showMatrix(C_GPU, j, l);
cudaFree(d_A);
cudaFree(d_B);
cudaFree(d_C);
// Done copying results and freeing device memory
// Check the result of the Calculated Matrix
if (k < 5000 && j < 5000 && l < 5000) resultCheck(C_CPU, C_GPU, j * l);
// Done result checking.
return 0;
}
// UI for main function
// return 0 means everything's fine, just continue;
// return 1 means there's invalid input or '--help', terminate running.
int UI(int argc, char* argv[], int* jkl) {
// UI for the exe file
// while input with ? or -h or --help; tell that what we need as params
// while input with [1,2] || [4, +inf) parameters; tell that we need 3 params
// while input with 3 paramerters; print the size of two input matrix; check if all params are valid;
if (argc == 2 && (strcmp(argv[1], "--help") == 0 || strcmp(argv[1], "-h") == 0 || strcmp(argv[1], "?") == 0)) {
printf("\nWe need 3 parameters j,k,l which represents the two matrix's dimention.\n");
printf("The first one with size j*k, and the second one's is k*l.\n");
printf("j,k,l must be int type and greater than 0.\n");
return 1;
}
if (argc <= 3 || argc >= 5) {
printf("\nError.\nWe need 3 parameters as input.\nYou can use '--help' for more details.\n");
return 1;
}
if (argc == 4) {
int n;
printf("\nNumber Of Arguments Passed: %d", argc);
printf("\n----Following Are The Command Line Arguments Passed----");
for (int counter = 1; counter < argc; counter++) {
n = atoi(argv[counter]);
if (n > 0) {
printf("\nargv[%d]: %d", counter, n);
jkl[counter - 1] = n;
}
else {
printf("\nargv[%d] is invalid", counter);
return 1;
}
}
}
return 0;
}
// random float generator within min and max
float randGenerate(int min, int max) {
float res;
int r = rand();
res = 1.0 * rand() / RAND_MAX * (max-min) + min;
return res;
}
// initialize matrix with float type
void initMatrix(float* matrix, int size, int min, int max) {
for (int i = 0; i < size; ++i)
matrix[i] = randGenerate(min, max);
return;
}
// matrix multiplication with CPU in the most stupid algo
// Algo Complexity: O((2k-1)*j*l)
void matrixMulCPU(float* A, float* B, float* C, int j, int k, int l) {
for (int row = 0; row < j; ++row) {
for (int col = 0; col < l; ++col) {
float eleSum = 0.0f;
for (int i = 0; i < k; ++i) {
eleSum += A[row * k + i] * B[i * l + col];
}
C[row * l + col] = eleSum;
}
}
}
// matrix multiplication with GPU device
// using tiling algorithm, take use of the shared memory to higher the compute-to-global-memory-access ratio
__global__
void matrixMulGPU(float* d_A, float* d_B, float* d_C, int j, int k, int l) {
__shared__ float Ads[TILE_SIZE][TILE_SIZE];
__shared__ float Bds[TILE_SIZE][TILE_SIZE];
int bx = blockIdx.x;
int by = blockIdx.y;
int tx = threadIdx.x;
int ty = threadIdx.y;
int row = by * blockDim.y + ty;
int col = bx * blockDim.x + tx;
float CEleValue = 0.0f;
for (int ph = 0; ph * TILE_SIZE < k; ++ph) {
if (row < j && ph * TILE_SIZE + tx < k)
Ads[ty][tx] = d_A[row * k + ph * TILE_SIZE + tx];
else
Ads[ty][tx] = 0;
if (col < l && ph * TILE_SIZE + ty < k)
Bds[ty][tx] = d_B[(ph * TILE_SIZE + ty) * l + col];
else
Bds[ty][tx] = 0;
__syncthreads();
for (int i = 0; i < TILE_SIZE; ++i) {
CEleValue += Ads[ty][i] * Bds[i][tx];
}
__syncthreads();
}
if (row < j && col < l)
d_C[row * l + col] = CEleValue;
}
// show the data in the command prompt.
// this function is used for configuration
// please don't use it when j,k,l is too large
void showMatrix(float* matrix, int row, int col) {
if (row > 5 || col > 5) return;
printf("\n");
for (int i = 0; i < row; i++) {
for (int j = 0; j < col; j++) {
printf("%f\t", matrix[i*col + j]);
}
printf("\n");
}
return;
}
// check if two matrix is the same
// 0 is defined at the very begining
void resultCheck(float* result_CPU, float* result_GPU, int size) {
// using relative error
// assuming CPU result is the true value
for (int i = 0; i < size; ++i) {
if ((result_CPU[i] - result_GPU[i])/ result_CPU[i] > ZERO || (result_GPU[i] - result_CPU[i])/result_CPU[i] < -ZERO) {
printf("\nResult check: Error!!!! Didn't pass.");
return;
}
}
printf("\nResult check: ---PASS---.");
return;
} | code for sm_80
Function : _Z12matrixMulGPUPfS_S_iii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x000e220000002500 */
/*0020*/ MOV R4, c[0x0][0x17c] ; /* 0x00005f0000047a02 */
/* 0x000fe20000000f00 */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0040*/ HFMA2.MMA R9, -RZ, RZ, 0, 0 ; /* 0x00000000ff097435 */
/* 0x000fe200000001ff */
/*0050*/ S2R R16, SR_TID.X ; /* 0x0000000000107919 */
/* 0x000e220000002100 */
/*0060*/ ISETP.GE.AND P1, PT, R4, 0x1, PT ; /* 0x000000010400780c */
/* 0x000fc60003f26270 */
/*0070*/ S2R R5, SR_CTAID.Y ; /* 0x0000000000057919 */
/* 0x000e680000002600 */
/*0080*/ S2R R2, SR_TID.Y ; /* 0x0000000000027919 */
/* 0x000e620000002200 */
/*0090*/ IMAD R3, R3, c[0x0][0x0], R16 ; /* 0x0000000003037a24 */
/* 0x001fca00078e0210 */
/*00a0*/ ISETP.GE.AND P0, PT, R3, c[0x0][0x180], PT ; /* 0x0000600003007a0c */
/* 0x000fe20003f06270 */
/*00b0*/ IMAD R0, R5, c[0x0][0x4], R2 ; /* 0x0000010005007a24 */
/* 0x002fca00078e0202 */
/*00c0*/ ISETP.GE.OR P0, PT, R0, c[0x0][0x178], P0 ; /* 0x00005e0000007a0c */
/* 0x000fe20000706670 */
/*00d0*/ @!P1 BRA 0x4f0 ; /* 0x0000041000009947 */
/* 0x000fd80003800000 */
/*00e0*/ SHF.L.U32 R17, R2, 0x6, RZ ; /* 0x0000000602117819 */
/* 0x000fe400000006ff */
/*00f0*/ MOV R5, RZ ; /* 0x000000ff00057202 */
/* 0x000fe40000000f00 */
/*0100*/ MOV R18, RZ ; /* 0x000000ff00127202 */
/* 0x000fe40000000f00 */
/*0110*/ MOV R9, RZ ; /* 0x000000ff00097202 */
/* 0x000fe40000000f00 */
/*0120*/ LEA R19, R16, R17, 0x2 ; /* 0x0000001110137211 */
/* 0x000fe400078e10ff */
/*0130*/ IADD3 R7, R16, R5.reuse, RZ ; /* 0x0000000510077210 */
/* 0x080fe20007ffe0ff */
/*0140*/ HFMA2.MMA R8, -RZ, RZ, 0, 0 ; /* 0x00000000ff087435 */
/* 0x000fe200000001ff */
/*0150*/ IADD3 R10, R2, R5, RZ ; /* 0x00000005020a7210 */
/* 0x000fc40007ffe0ff */
/*0160*/ ISETP.GE.AND P2, PT, R7, c[0x0][0x17c], PT ; /* 0x00005f0007007a0c */
/* 0x000fe40003f46270 */
/*0170*/ ISETP.GE.AND P1, PT, R10, c[0x0][0x17c], PT ; /* 0x00005f000a007a0c */
/* 0x000fe40003f26270 */
/*0180*/ ISETP.GE.OR P2, PT, R0, c[0x0][0x178], P2 ; /* 0x00005e0000007a0c */
/* 0x000fe40001746670 */
/*0190*/ ISETP.GE.OR P1, PT, R3, c[0x0][0x180], P1 ; /* 0x0000600003007a0c */
/* 0x000fe40000f26670 */
/*01a0*/ MOV R20, RZ ; /* 0x000000ff00147202 */
/* 0x000fd20000000f00 */
/*01b0*/ @!P2 MOV R5, 0x4 ; /* 0x000000040005a802 */
/* 0x000fe20000000f00 */
/*01c0*/ @!P2 IMAD R4, R0, c[0x0][0x17c], R7 ; /* 0x00005f000004aa24 */
/* 0x000fe200078e0207 */
/*01d0*/ @!P1 MOV R11, 0x4 ; /* 0x00000004000b9802 */
/* 0x000fe20000000f00 */
/*01e0*/ @!P1 IMAD R10, R10, c[0x0][0x180], R3 ; /* 0x000060000a0a9a24 */
/* 0x000fe400078e0203 */
/*01f0*/ @!P2 IMAD.WIDE R4, R4, R5, c[0x0][0x160] ; /* 0x000058000404a625 */
/* 0x000fc800078e0205 */
/*0200*/ @!P1 IMAD.WIDE R10, R10, R11, c[0x0][0x168] ; /* 0x00005a000a0a9625 */
/* 0x000fe200078e020b */
/*0210*/ @!P2 LDG.E R8, [R4.64] ; /* 0x000000040408a981 */
/* 0x000ea8000c1e1900 */
/*0220*/ @!P1 LDG.E R20, [R10.64] ; /* 0x000000040a149981 */
/* 0x000ee2000c1e1900 */
/*0230*/ IADD3 R18, R18, 0x1, RZ ; /* 0x0000000112127810 */
/* 0x000fc60007ffe0ff */
/*0240*/ STS [R19], R8 ; /* 0x0000000813007388 */
/* 0x004fe80000000800 */
/*0250*/ STS [R19+0x400], R20 ; /* 0x0004001413007388 */
/* 0x008fe80000000800 */
/*0260*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0270*/ LDS R23, [R16.X4+0x400] ; /* 0x0004000010177984 */
/* 0x000fe80000004800 */
/*0280*/ LDS.128 R12, [R17] ; /* 0x00000000110c7984 */
/* 0x000e280000000c00 */
/*0290*/ LDS R24, [R16.X4+0x440] ; /* 0x0004400010187984 */
/* 0x000e680000004800 */
/*02a0*/ LDS R25, [R16.X4+0x480] ; /* 0x0004800010197984 */
/* 0x000ea80000004800 */
/*02b0*/ LDS R26, [R16.X4+0x4c0] ; /* 0x0004c000101a7984 */
/* 0x000ee80000004800 */
/*02c0*/ LDS R27, [R16.X4+0x500] ; /* 0x00050000101b7984 */
/* 0x000fe80000004800 */
/*02d0*/ LDS.128 R4, [R17+0x10] ; /* 0x0000100011047984 */
/* 0x000f280000000c00 */
/*02e0*/ LDS R22, [R16.X4+0x540] ; /* 0x0005400010167984 */
/* 0x000f680000004800 */
/*02f0*/ LDS R21, [R16.X4+0x580] ; /* 0x0005800010157984 */
/* 0x000f680000004800 */
/*0300*/ LDS R20, [R16.X4+0x5c0] ; /* 0x0005c00010147984 */
/* 0x000f620000004800 */
/*0310*/ FFMA R12, R23, R12, R9 ; /* 0x0000000c170c7223 */
/* 0x001fc60000000009 */
/*0320*/ LDS R23, [R16.X4+0x600] ; /* 0x0006000010177984 */
/* 0x000fe20000004800 */
/*0330*/ FFMA R12, R24, R13, R12 ; /* 0x0000000d180c7223 */
/* 0x002fc6000000000c */
/*0340*/ LDS.128 R8, [R17+0x20] ; /* 0x0000200011087984 */
/* 0x000e220000000c00 */
/*0350*/ FFMA R12, R25, R14, R12 ; /* 0x0000000e190c7223 */
/* 0x004fc6000000000c */
/*0360*/ LDS R24, [R16.X4+0x640] ; /* 0x0006400010187984 */
/* 0x000e620000004800 */
/*0370*/ FFMA R12, R26, R15, R12 ; /* 0x0000000f1a0c7223 */
/* 0x008fc6000000000c */
/*0380*/ LDS R25, [R16.X4+0x680] ; /* 0x0006800010197984 */
/* 0x000ea20000004800 */
/*0390*/ FFMA R12, R27, R4, R12 ; /* 0x000000041b0c7223 */
/* 0x010fc6000000000c */
/*03a0*/ LDS R4, [R16.X4+0x6c0] ; /* 0x0006c00010047984 */
/* 0x000ee20000004800 */
/*03b0*/ FFMA R22, R22, R5, R12 ; /* 0x0000000516167223 */
/* 0x020fc6000000000c */
/*03c0*/ LDS R5, [R16.X4+0x700] ; /* 0x0007000010057984 */
/* 0x000fe20000004800 */
/*03d0*/ FFMA R26, R21, R6, R22 ; /* 0x00000006151a7223 */
/* 0x000fc60000000016 */
/*03e0*/ LDS.128 R12, [R17+0x30] ; /* 0x00003000110c7984 */
/* 0x000f220000000c00 */
/*03f0*/ FFMA R7, R20, R7, R26 ; /* 0x0000000714077223 */
/* 0x000fc6000000001a */
/*0400*/ LDS R22, [R16.X4+0x740] ; /* 0x0007400010167984 */
/* 0x000f680000004800 */
/*0410*/ LDS R21, [R16.X4+0x780] ; /* 0x0007800010157984 */
/* 0x000f680000004800 */
/*0420*/ LDS R6, [R16.X4+0x7c0] ; /* 0x0007c00010067984 */
/* 0x000f620000004800 */
/*0430*/ FFMA R7, R23, R8, R7 ; /* 0x0000000817077223 */
/* 0x001fc80000000007 */
/*0440*/ FFMA R7, R24, R9, R7 ; /* 0x0000000918077223 */
/* 0x002fc80000000007 */
/*0450*/ FFMA R7, R25, R10, R7 ; /* 0x0000000a19077223 */
/* 0x004fc80000000007 */
/*0460*/ FFMA R4, R4, R11, R7 ; /* 0x0000000b04047223 */
/* 0x008fc80000000007 */
/*0470*/ FFMA R4, R5, R12, R4 ; /* 0x0000000c05047223 */
/* 0x010fe20000000004 */
/*0480*/ SHF.L.U32 R5, R18, 0x4, RZ ; /* 0x0000000412057819 */
/* 0x000fc600000006ff */
/*0490*/ FFMA R4, R22, R13, R4 ; /* 0x0000000d16047223 */
/* 0x020fe20000000004 */
/*04a0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fe20000010000 */
/*04b0*/ ISETP.GE.AND P1, PT, R5, c[0x0][0x17c], PT ; /* 0x00005f0005007a0c */
/* 0x000fe40003f26270 */
/*04c0*/ FFMA R4, R21, R14, R4 ; /* 0x0000000e15047223 */
/* 0x000fc80000000004 */
/*04d0*/ FFMA R9, R6, R15, R4 ; /* 0x0000000f06097223 */
/* 0x000fce0000000004 */
/*04e0*/ @!P1 BRA 0x130 ; /* 0xfffffc4000009947 */
/* 0x000fea000383ffff */
/*04f0*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0500*/ HFMA2.MMA R2, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff027435 */
/* 0x000fe200000001ff */
/*0510*/ IMAD R3, R0, c[0x0][0x180], R3 ; /* 0x0000600000037a24 */
/* 0x000fd200078e0203 */
/*0520*/ IMAD.WIDE R2, R3, R2, c[0x0][0x170] ; /* 0x00005c0003027625 */
/* 0x000fca00078e0202 */
/*0530*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */
/* 0x000fe2000c101904 */
/*0540*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0550*/ BRA 0x550; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0560*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0570*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0580*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0590*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <cuda_runtime.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <math.h>
#include <time.h>
#define ELEMENT_MIN 0
#define ELEMENT_MAX 10
#define BLOCK_SIZE 16
#define TILE_SIZE 16
#define ZERO 1.e-6
int UI(int argc, char* argv[], int* jkl);
float randGenerate(int min, int max);
void initMatrix(float* matrix, int size, int min, int max);
void matrixMulCPU(float* A, float* B, float* C, int j, int k, int l);
__global__
void matrixMulGPU(float* d_A, float* d_B, float* d_C, int j, int k, int l);
void showMatrix(float* matrix, int row, int col);
void resultCheck(float* result_CPU, float* result_GPU, int size);
int main(int argc, char* argv[]){
// reset rand seed
srand((unsigned)time(NULL));
clock_t start, finish;
int total_time;
// Go through UI first.
// In UI section, only command with valid param can go to the next step.
int UIStatus;
int jkl[3];
UIStatus = UI(argc, argv, jkl);
if (UIStatus != 0) {
printf("\nApplication terminates.");
return 0;
}
printf("\nContinuing with j=%d, k=%d, l=%d", jkl[0], jkl[1], jkl[2]);
// UI section ends
// Initialize these two matrix A, B with random float type
const int j = jkl[0];
const int k = jkl[1];
const int l = jkl[2];
float* A = (float*)malloc(j * k * sizeof(float));
float* B = (float*)malloc(k * l * sizeof(float));
initMatrix(A, (j * k), ELEMENT_MIN, ELEMENT_MAX);
initMatrix(B, (k * l), ELEMENT_MIN, ELEMENT_MAX);
showMatrix(A, j, k);
showMatrix(B, k, l);
printf("\nDone initializing matrix A with size %d*%d and matrix B with %d*%d", j, k, k, l);
// Initialzing ends
// CPU code for calculating the matrix multiplication
// Use this result to varify the kernel result later
// Only do this step when j, k, l is below 5000
float* C_GPU = (float*)malloc(j * l * sizeof(float));
float* C_CPU = (float*)malloc(j * l * sizeof(float));
if (k < 5000 && j < 5000 && l < 5000) {
start = clock();
matrixMulCPU(A, B, C_CPU, j, k, l);
finish = clock();
printf("\nDone matrix multiplication with CPU");
total_time = (int)(finish - start);
printf("\n%d microseconds used.\n", total_time);
showMatrix(C_CPU, j, l);
}
// Matrix multipication with CPU ends
// Allocate device memory and copy data from host to device
float *d_A, *d_B, *d_C;
cudaMalloc((float**)&d_A, j * k * sizeof(float));
cudaMalloc((float**)&d_B, k * l * sizeof(float));
cudaMalloc((float**)&d_C, j * l * sizeof(float));
printf("\nDone allocating space in device.");
cudaMemcpy(d_A, A, j * k * sizeof(float), cudaMemcpyHostToDevice);
cudaMemcpy(d_B, B, k * l * sizeof(float), cudaMemcpyHostToDevice);
printf("\nDone copying memory from host to device");
// Done allocating and transfering
// Initialize thread block and kernel grid dimensions
dim3 threads(BLOCK_SIZE, BLOCK_SIZE);
dim3 grid((int)ceil(1.0 * l / threads.x), (int)ceil(1.0 * j / threads.y));
printf("\nDone initializing block dimention and grid dimention.");
// Done initializing thread block and kernel grid dimensions
// launch CUDA device kernel
start = clock();
matrixMulGPU<<< grid, threads>>>(d_A, d_B, d_C, j, k, l);
// Done CUDA device kernel
// Copy results from device to host and free device memory
cudaMemcpy(C_GPU, d_C, j * l * sizeof(float), cudaMemcpyDeviceToHost);
finish = clock();
printf("\nDone matrix multiplication with GPU.");
total_time = (int)(finish - start);
printf("\n%d microseconds used.\n", total_time);
showMatrix(C_GPU, j, l);
cudaFree(d_A);
cudaFree(d_B);
cudaFree(d_C);
// Done copying results and freeing device memory
// Check the result of the Calculated Matrix
if (k < 5000 && j < 5000 && l < 5000) resultCheck(C_CPU, C_GPU, j * l);
// Done result checking.
return 0;
}
// UI for main function
// return 0 means everything's fine, just continue;
// return 1 means there's invalid input or '--help', terminate running.
int UI(int argc, char* argv[], int* jkl) {
// UI for the exe file
// while input with ? or -h or --help; tell that what we need as params
// while input with [1,2] || [4, +inf) parameters; tell that we need 3 params
// while input with 3 paramerters; print the size of two input matrix; check if all params are valid;
if (argc == 2 && (strcmp(argv[1], "--help") == 0 || strcmp(argv[1], "-h") == 0 || strcmp(argv[1], "?") == 0)) {
printf("\nWe need 3 parameters j,k,l which represents the two matrix's dimention.\n");
printf("The first one with size j*k, and the second one's is k*l.\n");
printf("j,k,l must be int type and greater than 0.\n");
return 1;
}
if (argc <= 3 || argc >= 5) {
printf("\nError.\nWe need 3 parameters as input.\nYou can use '--help' for more details.\n");
return 1;
}
if (argc == 4) {
int n;
printf("\nNumber Of Arguments Passed: %d", argc);
printf("\n----Following Are The Command Line Arguments Passed----");
for (int counter = 1; counter < argc; counter++) {
n = atoi(argv[counter]);
if (n > 0) {
printf("\nargv[%d]: %d", counter, n);
jkl[counter - 1] = n;
}
else {
printf("\nargv[%d] is invalid", counter);
return 1;
}
}
}
return 0;
}
// random float generator within min and max
float randGenerate(int min, int max) {
float res;
int r = rand();
res = 1.0 * rand() / RAND_MAX * (max-min) + min;
return res;
}
// initialize matrix with float type
void initMatrix(float* matrix, int size, int min, int max) {
for (int i = 0; i < size; ++i)
matrix[i] = randGenerate(min, max);
return;
}
// matrix multiplication with CPU in the most stupid algo
// Algo Complexity: O((2k-1)*j*l)
void matrixMulCPU(float* A, float* B, float* C, int j, int k, int l) {
for (int row = 0; row < j; ++row) {
for (int col = 0; col < l; ++col) {
float eleSum = 0.0f;
for (int i = 0; i < k; ++i) {
eleSum += A[row * k + i] * B[i * l + col];
}
C[row * l + col] = eleSum;
}
}
}
// matrix multiplication with GPU device
// using tiling algorithm, take use of the shared memory to higher the compute-to-global-memory-access ratio
__global__
void matrixMulGPU(float* d_A, float* d_B, float* d_C, int j, int k, int l) {
__shared__ float Ads[TILE_SIZE][TILE_SIZE];
__shared__ float Bds[TILE_SIZE][TILE_SIZE];
int bx = blockIdx.x;
int by = blockIdx.y;
int tx = threadIdx.x;
int ty = threadIdx.y;
int row = by * blockDim.y + ty;
int col = bx * blockDim.x + tx;
float CEleValue = 0.0f;
for (int ph = 0; ph * TILE_SIZE < k; ++ph) {
if (row < j && ph * TILE_SIZE + tx < k)
Ads[ty][tx] = d_A[row * k + ph * TILE_SIZE + tx];
else
Ads[ty][tx] = 0;
if (col < l && ph * TILE_SIZE + ty < k)
Bds[ty][tx] = d_B[(ph * TILE_SIZE + ty) * l + col];
else
Bds[ty][tx] = 0;
__syncthreads();
for (int i = 0; i < TILE_SIZE; ++i) {
CEleValue += Ads[ty][i] * Bds[i][tx];
}
__syncthreads();
}
if (row < j && col < l)
d_C[row * l + col] = CEleValue;
}
// show the data in the command prompt.
// this function is used for configuration
// please don't use it when j,k,l is too large
void showMatrix(float* matrix, int row, int col) {
if (row > 5 || col > 5) return;
printf("\n");
for (int i = 0; i < row; i++) {
for (int j = 0; j < col; j++) {
printf("%f\t", matrix[i*col + j]);
}
printf("\n");
}
return;
}
// check if two matrix is the same
// 0 is defined at the very begining
void resultCheck(float* result_CPU, float* result_GPU, int size) {
// using relative error
// assuming CPU result is the true value
for (int i = 0; i < size; ++i) {
if ((result_CPU[i] - result_GPU[i])/ result_CPU[i] > ZERO || (result_GPU[i] - result_CPU[i])/result_CPU[i] < -ZERO) {
printf("\nResult check: Error!!!! Didn't pass.");
return;
}
}
printf("\nResult check: ---PASS---.");
return;
} | .file "tmpxft_0007abcf_00000000-6_hw1.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2066:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2066:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "--help"
.LC1:
.string "-h"
.LC2:
.string "?"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC3:
.string "\nWe need 3 parameters j,k,l which represents the two matrix's dimention.\n"
.align 8
.LC4:
.string "The first one with size j*k, and the second one's is k*l.\n"
.align 8
.LC5:
.string "j,k,l must be int type and greater than 0.\n"
.align 8
.LC6:
.string "\nError.\nWe need 3 parameters as input.\nYou can use '--help' for more details.\n"
.align 8
.LC7:
.string "\nNumber Of Arguments Passed: %d"
.align 8
.LC8:
.string "\n----Following Are The Command Line Arguments Passed----"
.section .rodata.str1.1
.LC9:
.string "\nargv[%d]: %d"
.LC10:
.string "\nargv[%d] is invalid"
.text
.globl _Z2UIiPPcPi
.type _Z2UIiPPcPi, @function
_Z2UIiPPcPi:
.LFB2058:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $8, %rsp
.cfi_def_cfa_offset 64
movq %rsi, %r13
cmpl $2, %edi
je .L13
movq %rdx, %r14
cmpl $4, %edi
jne .L6
movl $4, %edx
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC8(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %ebp
leaq .LC9(%rip), %r15
.L10:
movq 0(%r13,%rbp,8), %rdi
movl $10, %edx
movl $0, %esi
call __isoc23_strtol@PLT
movq %rax, %rbx
movl %eax, %ecx
testl %eax, %eax
jle .L9
movl %ebp, %edx
movq %r15, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebx, -4(%r14,%rbp,4)
addq $1, %rbp
cmpq $4, %rbp
jne .L10
movl $0, %eax
jmp .L3
.L13:
movq 8(%rsi), %rbx
leaq .LC0(%rip), %rsi
movq %rbx, %rdi
call strcmp@PLT
testl %eax, %eax
je .L5
leaq .LC1(%rip), %rsi
movq %rbx, %rdi
call strcmp@PLT
testl %eax, %eax
je .L5
leaq .LC2(%rip), %rsi
movq %rbx, %rdi
call strcmp@PLT
testl %eax, %eax
je .L5
.L6:
leaq .LC6(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
.L3:
addq $8, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L5:
.cfi_restore_state
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC4(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq .LC5(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
jmp .L3
.L9:
movl %ebp, %edx
leaq .LC10(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %eax
jmp .L3
.cfi_endproc
.LFE2058:
.size _Z2UIiPPcPi, .-_Z2UIiPPcPi
.globl _Z12randGenerateii
.type _Z12randGenerateii, @function
_Z12randGenerateii:
.LFB2059:
.cfi_startproc
endbr64
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pushq %rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
subq $8, %rsp
.cfi_def_cfa_offset 32
movl %edi, %ebp
movl %esi, %ebx
call rand@PLT
call rand@PLT
pxor %xmm0, %xmm0
cvtsi2sdl %eax, %xmm0
divsd .LC11(%rip), %xmm0
subl %ebp, %ebx
pxor %xmm1, %xmm1
cvtsi2sdl %ebx, %xmm1
mulsd %xmm1, %xmm0
pxor %xmm1, %xmm1
cvtsi2sdl %ebp, %xmm1
addsd %xmm1, %xmm0
cvtsd2ss %xmm0, %xmm0
addq $8, %rsp
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2059:
.size _Z12randGenerateii, .-_Z12randGenerateii
.globl _Z10initMatrixPfiii
.type _Z10initMatrixPfiii, @function
_Z10initMatrixPfiii:
.LFB2060:
.cfi_startproc
endbr64
testl %esi, %esi
jle .L21
pushq %r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pushq %r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
pushq %rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
pushq %rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
subq $8, %rsp
.cfi_def_cfa_offset 48
movl %edx, %ebp
movl %ecx, %r12d
movq %rdi, %rbx
movslq %esi, %rsi
leaq (%rdi,%rsi,4), %r13
.L18:
movl %r12d, %esi
movl %ebp, %edi
call _Z12randGenerateii
movss %xmm0, (%rbx)
addq $4, %rbx
cmpq %r13, %rbx
jne .L18
addq $8, %rsp
.cfi_def_cfa_offset 40
popq %rbx
.cfi_def_cfa_offset 32
popq %rbp
.cfi_def_cfa_offset 24
popq %r12
.cfi_def_cfa_offset 16
popq %r13
.cfi_def_cfa_offset 8
ret
.L21:
.cfi_restore 3
.cfi_restore 6
.cfi_restore 12
.cfi_restore 13
ret
.cfi_endproc
.LFE2060:
.size _Z10initMatrixPfiii, .-_Z10initMatrixPfiii
.globl _Z12matrixMulCPUPfS_S_iii
.type _Z12matrixMulCPUPfS_S_iii, @function
_Z12matrixMulCPUPfS_S_iii:
.LFB2061:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
movq %rsi, -16(%rsp)
movq %rdx, -8(%rsp)
movl %ecx, -20(%rsp)
testl %ecx, %ecx
jle .L24
movq %rdi, %rbx
movl %r8d, %r10d
movl %r9d, %r14d
movslq %r9d, %rbp
leaq 0(,%rbp,4), %rsi
movl $0, %r13d
movl $0, %r12d
movl $0, %edx
movslq %r8d, %r15
movq %r15, %rcx
jmp .L26
.L27:
movss (%rax), %xmm0
mulss (%rdx), %xmm0
addss %xmm0, %xmm1
addq $4, %rax
addq %rsi, %rdx
cmpq %rdi, %rax
jne .L27
.L29:
movss %xmm1, (%r11,%r8,4)
addq $1, %r8
addq $4, %r9
cmpq %r8, %rbp
je .L34
.L30:
movq %r9, %rdx
movq %r15, %rax
pxor %xmm1, %xmm1
testl %r10d, %r10d
jg .L27
jmp .L29
.L34:
movl -24(%rsp), %edx
.L28:
addl $1, %edx
addl %r14d, %r12d
addl %r10d, %r13d
cmpl %edx, -20(%rsp)
je .L24
.L26:
testl %r14d, %r14d
jle .L28
movq -16(%rsp), %r9
movslq %r13d, %rax
leaq (%rbx,%rax,4), %r15
addq %rcx, %rax
leaq (%rbx,%rax,4), %rdi
movslq %r12d, %rax
movq -8(%rsp), %r11
leaq (%r11,%rax,4), %r11
movl $0, %r8d
movl %edx, -24(%rsp)
jmp .L30
.L24:
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2061:
.size _Z12matrixMulCPUPfS_S_iii, .-_Z12matrixMulCPUPfS_S_iii
.section .rodata.str1.1
.LC13:
.string "\n"
.LC14:
.string "%f\t"
.text
.globl _Z10showMatrixPfii
.type _Z10showMatrixPfii, @function
_Z10showMatrixPfii:
.LFB2062:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $40, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 16(%rsp)
movl %esi, 12(%rsp)
cmpl $5, %esi
jg .L37
movl %esi, %ebx
movl %edx, %r14d
cmpl $5, %edx
jg .L37
leaq .LC13(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
testl %ebx, %ebx
jle .L37
movl $0, %r15d
movl $0, %r13d
movslq %r14d, %rax
movq %rax, 24(%rsp)
leaq .LC14(%rip), %r12
jmp .L39
.L41:
movslq %r15d, %rax
movq 16(%rsp), %rcx
leaq (%rcx,%rax,4), %rbx
movq 24(%rsp), %rdx
addq %rdx, %rax
leaq (%rcx,%rax,4), %rbp
.L40:
pxor %xmm0, %xmm0
cvtss2sd (%rbx), %xmm0
movq %r12, %rsi
movl $2, %edi
movl $1, %eax
call __printf_chk@PLT
addq $4, %rbx
cmpq %rbp, %rbx
jne .L40
.L42:
leaq .LC13(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addl $1, %r13d
addl %r14d, %r15d
cmpl %r13d, 12(%rsp)
je .L37
.L39:
testl %r14d, %r14d
jg .L41
jmp .L42
.L37:
addq $40, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2062:
.size _Z10showMatrixPfii, .-_Z10showMatrixPfii
.section .rodata.str1.8
.align 8
.LC17:
.string "\nResult check: Error!!!! Didn't pass."
.section .rodata.str1.1
.LC18:
.string "\nResult check: ---PASS---."
.text
.globl _Z11resultCheckPfS_i
.type _Z11resultCheckPfS_i, @function
_Z11resultCheckPfS_i:
.LFB2063:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
testl %edx, %edx
jle .L46
movslq %edx, %rdx
salq $2, %rdx
movl $0, %eax
movsd .LC15(%rip), %xmm3
movsd .LC16(%rip), %xmm4
.L51:
movss (%rdi,%rax), %xmm2
movss (%rsi,%rax), %xmm0
movaps %xmm2, %xmm1
subss %xmm0, %xmm1
divss %xmm2, %xmm1
cvtss2sd %xmm1, %xmm1
comisd %xmm3, %xmm1
ja .L47
subss %xmm2, %xmm0
divss %xmm2, %xmm0
cvtss2sd %xmm0, %xmm0
comisd %xmm0, %xmm4
ja .L47
addq $4, %rax
cmpq %rdx, %rax
jne .L51
.L46:
leaq .LC18(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
jmp .L45
.L47:
leaq .LC17(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
.L45:
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2063:
.size _Z11resultCheckPfS_i, .-_Z11resultCheckPfS_i
.globl _Z39__device_stub__Z12matrixMulGPUPfS_S_iiiPfS_S_iii
.type _Z39__device_stub__Z12matrixMulGPUPfS_S_iiiPfS_S_iii, @function
_Z39__device_stub__Z12matrixMulGPUPfS_S_iiiPfS_S_iii:
.LFB2088:
.cfi_startproc
endbr64
subq $184, %rsp
.cfi_def_cfa_offset 192
movq %rdi, 40(%rsp)
movq %rsi, 32(%rsp)
movq %rdx, 24(%rsp)
movl %ecx, 20(%rsp)
movl %r8d, 16(%rsp)
movl %r9d, 12(%rsp)
movq %fs:40, %rax
movq %rax, 168(%rsp)
xorl %eax, %eax
leaq 40(%rsp), %rax
movq %rax, 112(%rsp)
leaq 32(%rsp), %rax
movq %rax, 120(%rsp)
leaq 24(%rsp), %rax
movq %rax, 128(%rsp)
leaq 20(%rsp), %rax
movq %rax, 136(%rsp)
leaq 16(%rsp), %rax
movq %rax, 144(%rsp)
leaq 12(%rsp), %rax
movq %rax, 152(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
leaq 56(%rsp), %rcx
leaq 48(%rsp), %rdx
leaq 76(%rsp), %rsi
leaq 64(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L59
.L55:
movq 168(%rsp), %rax
subq %fs:40, %rax
jne .L60
addq $184, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L59:
.cfi_restore_state
pushq 56(%rsp)
.cfi_def_cfa_offset 200
pushq 56(%rsp)
.cfi_def_cfa_offset 208
leaq 128(%rsp), %r9
movq 92(%rsp), %rcx
movl 100(%rsp), %r8d
movq 80(%rsp), %rsi
movl 88(%rsp), %edx
leaq _Z12matrixMulGPUPfS_S_iii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 192
jmp .L55
.L60:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2088:
.size _Z39__device_stub__Z12matrixMulGPUPfS_S_iiiPfS_S_iii, .-_Z39__device_stub__Z12matrixMulGPUPfS_S_iiiPfS_S_iii
.globl _Z12matrixMulGPUPfS_S_iii
.type _Z12matrixMulGPUPfS_S_iii, @function
_Z12matrixMulGPUPfS_S_iii:
.LFB2089:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z39__device_stub__Z12matrixMulGPUPfS_S_iiiPfS_S_iii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2089:
.size _Z12matrixMulGPUPfS_S_iii, .-_Z12matrixMulGPUPfS_S_iii
.section .rodata.str1.1
.LC19:
.string "\nApplication terminates."
.section .rodata.str1.8
.align 8
.LC20:
.string "\nContinuing with j=%d, k=%d, l=%d"
.align 8
.LC21:
.string "\nDone initializing matrix A with size %d*%d and matrix B with %d*%d"
.align 8
.LC22:
.string "\nDone matrix multiplication with CPU"
.section .rodata.str1.1
.LC23:
.string "\n%d microseconds used.\n"
.section .rodata.str1.8
.align 8
.LC24:
.string "\nDone allocating space in device."
.align 8
.LC25:
.string "\nDone copying memory from host to device"
.align 8
.LC27:
.string "\nDone initializing block dimention and grid dimention."
.align 8
.LC28:
.string "\nDone matrix multiplication with GPU."
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $152, %rsp
.cfi_def_cfa_offset 208
movl %edi, %ebx
movq %rsi, %rbp
movq %fs:40, %rax
movq %rax, 136(%rsp)
xorl %eax, %eax
movl $0, %edi
call time@PLT
movl %eax, %edi
call srand@PLT
leaq 124(%rsp), %rdx
movq %rbp, %rsi
movl %ebx, %edi
call _Z2UIiPPcPi
testl %eax, %eax
jne .L70
movl 132(%rsp), %ebp
movl 128(%rsp), %r12d
movl 124(%rsp), %ebx
movl %ebp, %r8d
movl %r12d, %ecx
movl %ebx, %edx
leaq .LC20(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %r12d, %r15d
imull %ebx, %r15d
movslq %r15d, %r13
salq $2, %r13
movq %r13, %rdi
call malloc@PLT
movq %rax, (%rsp)
movl %ebp, %r14d
imull %r12d, %r14d
movslq %r14d, %rax
leaq 0(,%rax,4), %rcx
movq %rcx, 16(%rsp)
movq %rcx, %rdi
call malloc@PLT
movq %rax, 8(%rsp)
movl $10, %ecx
movl $0, %edx
movl %r15d, %esi
movq (%rsp), %rdi
call _Z10initMatrixPfiii
movl $10, %ecx
movl $0, %edx
movl %r14d, %esi
movq 8(%rsp), %r15
movq %r15, %rdi
call _Z10initMatrixPfiii
movl %r12d, %edx
movl %ebx, %esi
movq (%rsp), %rdi
call _Z10showMatrixPfii
movl %ebp, %edx
movl %r12d, %esi
movq %r15, %rdi
call _Z10showMatrixPfii
movl %ebp, %r9d
movl %r12d, %r8d
movl %r12d, %ecx
movl %ebx, %edx
leaq .LC21(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebp, %r15d
imull %ebx, %r15d
movslq %r15d, %r14
salq $2, %r14
movq %r14, %rdi
call malloc@PLT
movq %rax, 24(%rsp)
movq %r14, %rdi
call malloc@PLT
movq %rax, 40(%rsp)
cmpl $4999, %r12d
setle %al
cmpl $4999, %ebx
setle %dl
andl %edx, %eax
cmpl $4999, %ebp
setle %dl
andb %dl, %al
movb %al, 39(%rsp)
jne .L71
.L66:
leaq 72(%rsp), %rdi
movq %r13, %rsi
call cudaMalloc@PLT
leaq 80(%rsp), %rdi
movq 16(%rsp), %rsi
call cudaMalloc@PLT
leaq 88(%rsp), %rdi
movq %r14, %rsi
call cudaMalloc@PLT
leaq .LC24(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, %ecx
movq %r13, %rdx
movq (%rsp), %rsi
movq 72(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movq 16(%rsp), %rdx
movq 8(%rsp), %rsi
movq 80(%rsp), %rdi
call cudaMemcpy@PLT
leaq .LC25(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $1, 108(%rsp)
pxor %xmm0, %xmm0
cvtsi2sdl %ebx, %xmm0
mulsd .LC26(%rip), %xmm0
call ceil@PLT
movsd %xmm0, (%rsp)
pxor %xmm0, %xmm0
cvtsi2sdl %ebp, %xmm0
mulsd .LC26(%rip), %xmm0
call ceil@PLT
cvttsd2sil %xmm0, %eax
movl %eax, 112(%rsp)
cvttsd2sil (%rsp), %eax
movl %eax, 116(%rsp)
movl $1, 120(%rsp)
leaq .LC27(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
call clock@PLT
movq %rax, %r13
movl $16, 100(%rsp)
movl $16, 104(%rsp)
movl 108(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 100(%rsp), %rdx
movq 112(%rsp), %rdi
movl 120(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L72
.L67:
movl $2, %ecx
movq %r14, %rdx
movq 88(%rsp), %rsi
movq 24(%rsp), %r14
movq %r14, %rdi
call cudaMemcpy@PLT
call clock@PLT
movq %rax, %r12
leaq .LC28(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %r12d, %edx
subl %r13d, %edx
leaq .LC23(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebp, %edx
movl %ebx, %esi
movq %r14, %rdi
call _Z10showMatrixPfii
movq 72(%rsp), %rdi
call cudaFree@PLT
movq 80(%rsp), %rdi
call cudaFree@PLT
movq 88(%rsp), %rdi
call cudaFree@PLT
cmpb $0, 39(%rsp)
jne .L73
.L65:
movq 136(%rsp), %rax
subq %fs:40, %rax
jne .L74
movl $0, %eax
addq $152, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L70:
.cfi_restore_state
leaq .LC19(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
jmp .L65
.L71:
call clock@PLT
movq %rax, 48(%rsp)
movl %ebp, %r9d
movl %r12d, %r8d
movl %ebx, %ecx
movq 40(%rsp), %rdx
movq 8(%rsp), %rsi
movq (%rsp), %rdi
call _Z12matrixMulCPUPfS_S_iii
call clock@PLT
movq %rax, 56(%rsp)
leaq .LC22(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl 56(%rsp), %ecx
movl 48(%rsp), %eax
subl %eax, %ecx
movl %ecx, %edx
leaq .LC23(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebp, %edx
movl %ebx, %esi
movq 40(%rsp), %rdi
call _Z10showMatrixPfii
jmp .L66
.L72:
movl %ebp, %r9d
movl %r12d, %r8d
movl %ebx, %ecx
movq 88(%rsp), %rdx
movq 80(%rsp), %rsi
movq 72(%rsp), %rdi
call _Z39__device_stub__Z12matrixMulGPUPfS_S_iiiPfS_S_iii
jmp .L67
.L73:
movl %r15d, %edx
movq 24(%rsp), %rsi
movq 40(%rsp), %rdi
call _Z11resultCheckPfS_i
jmp .L65
.L74:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.1
.LC29:
.string "_Z12matrixMulGPUPfS_S_iii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2091:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC29(%rip), %rdx
movq %rdx, %rcx
leaq _Z12matrixMulGPUPfS_S_iii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2091:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC11:
.long -4194304
.long 1105199103
.align 8
.LC15:
.long -1598689907
.long 1051772663
.align 8
.LC16:
.long -1598689907
.long -1095710985
.align 8
.LC26:
.long 0
.long 1068498944
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <cuda_runtime.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <math.h>
#include <time.h>
#define ELEMENT_MIN 0
#define ELEMENT_MAX 10
#define BLOCK_SIZE 16
#define TILE_SIZE 16
#define ZERO 1.e-6
int UI(int argc, char* argv[], int* jkl);
float randGenerate(int min, int max);
void initMatrix(float* matrix, int size, int min, int max);
void matrixMulCPU(float* A, float* B, float* C, int j, int k, int l);
__global__
void matrixMulGPU(float* d_A, float* d_B, float* d_C, int j, int k, int l);
void showMatrix(float* matrix, int row, int col);
void resultCheck(float* result_CPU, float* result_GPU, int size);
int main(int argc, char* argv[]){
// reset rand seed
srand((unsigned)time(NULL));
clock_t start, finish;
int total_time;
// Go through UI first.
// In UI section, only command with valid param can go to the next step.
int UIStatus;
int jkl[3];
UIStatus = UI(argc, argv, jkl);
if (UIStatus != 0) {
printf("\nApplication terminates.");
return 0;
}
printf("\nContinuing with j=%d, k=%d, l=%d", jkl[0], jkl[1], jkl[2]);
// UI section ends
// Initialize these two matrix A, B with random float type
const int j = jkl[0];
const int k = jkl[1];
const int l = jkl[2];
float* A = (float*)malloc(j * k * sizeof(float));
float* B = (float*)malloc(k * l * sizeof(float));
initMatrix(A, (j * k), ELEMENT_MIN, ELEMENT_MAX);
initMatrix(B, (k * l), ELEMENT_MIN, ELEMENT_MAX);
showMatrix(A, j, k);
showMatrix(B, k, l);
printf("\nDone initializing matrix A with size %d*%d and matrix B with %d*%d", j, k, k, l);
// Initialzing ends
// CPU code for calculating the matrix multiplication
// Use this result to varify the kernel result later
// Only do this step when j, k, l is below 5000
float* C_GPU = (float*)malloc(j * l * sizeof(float));
float* C_CPU = (float*)malloc(j * l * sizeof(float));
if (k < 5000 && j < 5000 && l < 5000) {
start = clock();
matrixMulCPU(A, B, C_CPU, j, k, l);
finish = clock();
printf("\nDone matrix multiplication with CPU");
total_time = (int)(finish - start);
printf("\n%d microseconds used.\n", total_time);
showMatrix(C_CPU, j, l);
}
// Matrix multipication with CPU ends
// Allocate device memory and copy data from host to device
float *d_A, *d_B, *d_C;
cudaMalloc((float**)&d_A, j * k * sizeof(float));
cudaMalloc((float**)&d_B, k * l * sizeof(float));
cudaMalloc((float**)&d_C, j * l * sizeof(float));
printf("\nDone allocating space in device.");
cudaMemcpy(d_A, A, j * k * sizeof(float), cudaMemcpyHostToDevice);
cudaMemcpy(d_B, B, k * l * sizeof(float), cudaMemcpyHostToDevice);
printf("\nDone copying memory from host to device");
// Done allocating and transfering
// Initialize thread block and kernel grid dimensions
dim3 threads(BLOCK_SIZE, BLOCK_SIZE);
dim3 grid((int)ceil(1.0 * l / threads.x), (int)ceil(1.0 * j / threads.y));
printf("\nDone initializing block dimention and grid dimention.");
// Done initializing thread block and kernel grid dimensions
// launch CUDA device kernel
start = clock();
matrixMulGPU<<< grid, threads>>>(d_A, d_B, d_C, j, k, l);
// Done CUDA device kernel
// Copy results from device to host and free device memory
cudaMemcpy(C_GPU, d_C, j * l * sizeof(float), cudaMemcpyDeviceToHost);
finish = clock();
printf("\nDone matrix multiplication with GPU.");
total_time = (int)(finish - start);
printf("\n%d microseconds used.\n", total_time);
showMatrix(C_GPU, j, l);
cudaFree(d_A);
cudaFree(d_B);
cudaFree(d_C);
// Done copying results and freeing device memory
// Check the result of the Calculated Matrix
if (k < 5000 && j < 5000 && l < 5000) resultCheck(C_CPU, C_GPU, j * l);
// Done result checking.
return 0;
}
// UI for main function
// return 0 means everything's fine, just continue;
// return 1 means there's invalid input or '--help', terminate running.
int UI(int argc, char* argv[], int* jkl) {
// UI for the exe file
// while input with ? or -h or --help; tell that what we need as params
// while input with [1,2] || [4, +inf) parameters; tell that we need 3 params
// while input with 3 paramerters; print the size of two input matrix; check if all params are valid;
if (argc == 2 && (strcmp(argv[1], "--help") == 0 || strcmp(argv[1], "-h") == 0 || strcmp(argv[1], "?") == 0)) {
printf("\nWe need 3 parameters j,k,l which represents the two matrix's dimention.\n");
printf("The first one with size j*k, and the second one's is k*l.\n");
printf("j,k,l must be int type and greater than 0.\n");
return 1;
}
if (argc <= 3 || argc >= 5) {
printf("\nError.\nWe need 3 parameters as input.\nYou can use '--help' for more details.\n");
return 1;
}
if (argc == 4) {
int n;
printf("\nNumber Of Arguments Passed: %d", argc);
printf("\n----Following Are The Command Line Arguments Passed----");
for (int counter = 1; counter < argc; counter++) {
n = atoi(argv[counter]);
if (n > 0) {
printf("\nargv[%d]: %d", counter, n);
jkl[counter - 1] = n;
}
else {
printf("\nargv[%d] is invalid", counter);
return 1;
}
}
}
return 0;
}
// random float generator within min and max
float randGenerate(int min, int max) {
float res;
int r = rand();
res = 1.0 * rand() / RAND_MAX * (max-min) + min;
return res;
}
// initialize matrix with float type
void initMatrix(float* matrix, int size, int min, int max) {
for (int i = 0; i < size; ++i)
matrix[i] = randGenerate(min, max);
return;
}
// matrix multiplication with CPU in the most stupid algo
// Algo Complexity: O((2k-1)*j*l)
void matrixMulCPU(float* A, float* B, float* C, int j, int k, int l) {
for (int row = 0; row < j; ++row) {
for (int col = 0; col < l; ++col) {
float eleSum = 0.0f;
for (int i = 0; i < k; ++i) {
eleSum += A[row * k + i] * B[i * l + col];
}
C[row * l + col] = eleSum;
}
}
}
// matrix multiplication with GPU device
// using tiling algorithm, take use of the shared memory to higher the compute-to-global-memory-access ratio
__global__
void matrixMulGPU(float* d_A, float* d_B, float* d_C, int j, int k, int l) {
__shared__ float Ads[TILE_SIZE][TILE_SIZE];
__shared__ float Bds[TILE_SIZE][TILE_SIZE];
int bx = blockIdx.x;
int by = blockIdx.y;
int tx = threadIdx.x;
int ty = threadIdx.y;
int row = by * blockDim.y + ty;
int col = bx * blockDim.x + tx;
float CEleValue = 0.0f;
for (int ph = 0; ph * TILE_SIZE < k; ++ph) {
if (row < j && ph * TILE_SIZE + tx < k)
Ads[ty][tx] = d_A[row * k + ph * TILE_SIZE + tx];
else
Ads[ty][tx] = 0;
if (col < l && ph * TILE_SIZE + ty < k)
Bds[ty][tx] = d_B[(ph * TILE_SIZE + ty) * l + col];
else
Bds[ty][tx] = 0;
__syncthreads();
for (int i = 0; i < TILE_SIZE; ++i) {
CEleValue += Ads[ty][i] * Bds[i][tx];
}
__syncthreads();
}
if (row < j && col < l)
d_C[row * l + col] = CEleValue;
}
// show the data in the command prompt.
// this function is used for configuration
// please don't use it when j,k,l is too large
void showMatrix(float* matrix, int row, int col) {
if (row > 5 || col > 5) return;
printf("\n");
for (int i = 0; i < row; i++) {
for (int j = 0; j < col; j++) {
printf("%f\t", matrix[i*col + j]);
}
printf("\n");
}
return;
}
// check if two matrix is the same
// 0 is defined at the very begining
void resultCheck(float* result_CPU, float* result_GPU, int size) {
// using relative error
// assuming CPU result is the true value
for (int i = 0; i < size; ++i) {
if ((result_CPU[i] - result_GPU[i])/ result_CPU[i] > ZERO || (result_GPU[i] - result_CPU[i])/result_CPU[i] < -ZERO) {
printf("\nResult check: Error!!!! Didn't pass.");
return;
}
}
printf("\nResult check: ---PASS---.");
return;
} | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <math.h>
#include <time.h>
#define ELEMENT_MIN 0
#define ELEMENT_MAX 10
#define BLOCK_SIZE 16
#define TILE_SIZE 16
#define ZERO 1.e-6
int UI(int argc, char* argv[], int* jkl);
float randGenerate(int min, int max);
void initMatrix(float* matrix, int size, int min, int max);
void matrixMulCPU(float* A, float* B, float* C, int j, int k, int l);
__global__
void matrixMulGPU(float* d_A, float* d_B, float* d_C, int j, int k, int l);
void showMatrix(float* matrix, int row, int col);
void resultCheck(float* result_CPU, float* result_GPU, int size);
int main(int argc, char* argv[]){
// reset rand seed
srand((unsigned)time(NULL));
clock_t start, finish;
int total_time;
// Go through UI first.
// In UI section, only command with valid param can go to the next step.
int UIStatus;
int jkl[3];
UIStatus = UI(argc, argv, jkl);
if (UIStatus != 0) {
printf("\nApplication terminates.");
return 0;
}
printf("\nContinuing with j=%d, k=%d, l=%d", jkl[0], jkl[1], jkl[2]);
// UI section ends
// Initialize these two matrix A, B with random float type
const int j = jkl[0];
const int k = jkl[1];
const int l = jkl[2];
float* A = (float*)malloc(j * k * sizeof(float));
float* B = (float*)malloc(k * l * sizeof(float));
initMatrix(A, (j * k), ELEMENT_MIN, ELEMENT_MAX);
initMatrix(B, (k * l), ELEMENT_MIN, ELEMENT_MAX);
showMatrix(A, j, k);
showMatrix(B, k, l);
printf("\nDone initializing matrix A with size %d*%d and matrix B with %d*%d", j, k, k, l);
// Initialzing ends
// CPU code for calculating the matrix multiplication
// Use this result to varify the kernel result later
// Only do this step when j, k, l is below 5000
float* C_GPU = (float*)malloc(j * l * sizeof(float));
float* C_CPU = (float*)malloc(j * l * sizeof(float));
if (k < 5000 && j < 5000 && l < 5000) {
start = clock();
matrixMulCPU(A, B, C_CPU, j, k, l);
finish = clock();
printf("\nDone matrix multiplication with CPU");
total_time = (int)(finish - start);
printf("\n%d microseconds used.\n", total_time);
showMatrix(C_CPU, j, l);
}
// Matrix multipication with CPU ends
// Allocate device memory and copy data from host to device
float *d_A, *d_B, *d_C;
hipMalloc((float**)&d_A, j * k * sizeof(float));
hipMalloc((float**)&d_B, k * l * sizeof(float));
hipMalloc((float**)&d_C, j * l * sizeof(float));
printf("\nDone allocating space in device.");
hipMemcpy(d_A, A, j * k * sizeof(float), hipMemcpyHostToDevice);
hipMemcpy(d_B, B, k * l * sizeof(float), hipMemcpyHostToDevice);
printf("\nDone copying memory from host to device");
// Done allocating and transfering
// Initialize thread block and kernel grid dimensions
dim3 threads(BLOCK_SIZE, BLOCK_SIZE);
dim3 grid((int)ceil(1.0 * l / threads.x), (int)ceil(1.0 * j / threads.y));
printf("\nDone initializing block dimention and grid dimention.");
// Done initializing thread block and kernel grid dimensions
// launch CUDA device kernel
start = clock();
matrixMulGPU<<< grid, threads>>>(d_A, d_B, d_C, j, k, l);
// Done CUDA device kernel
// Copy results from device to host and free device memory
hipMemcpy(C_GPU, d_C, j * l * sizeof(float), hipMemcpyDeviceToHost);
finish = clock();
printf("\nDone matrix multiplication with GPU.");
total_time = (int)(finish - start);
printf("\n%d microseconds used.\n", total_time);
showMatrix(C_GPU, j, l);
hipFree(d_A);
hipFree(d_B);
hipFree(d_C);
// Done copying results and freeing device memory
// Check the result of the Calculated Matrix
if (k < 5000 && j < 5000 && l < 5000) resultCheck(C_CPU, C_GPU, j * l);
// Done result checking.
return 0;
}
// UI for main function
// return 0 means everything's fine, just continue;
// return 1 means there's invalid input or '--help', terminate running.
int UI(int argc, char* argv[], int* jkl) {
// UI for the exe file
// while input with ? or -h or --help; tell that what we need as params
// while input with [1,2] || [4, +inf) parameters; tell that we need 3 params
// while input with 3 paramerters; print the size of two input matrix; check if all params are valid;
if (argc == 2 && (strcmp(argv[1], "--help") == 0 || strcmp(argv[1], "-h") == 0 || strcmp(argv[1], "?") == 0)) {
printf("\nWe need 3 parameters j,k,l which represents the two matrix's dimention.\n");
printf("The first one with size j*k, and the second one's is k*l.\n");
printf("j,k,l must be int type and greater than 0.\n");
return 1;
}
if (argc <= 3 || argc >= 5) {
printf("\nError.\nWe need 3 parameters as input.\nYou can use '--help' for more details.\n");
return 1;
}
if (argc == 4) {
int n;
printf("\nNumber Of Arguments Passed: %d", argc);
printf("\n----Following Are The Command Line Arguments Passed----");
for (int counter = 1; counter < argc; counter++) {
n = atoi(argv[counter]);
if (n > 0) {
printf("\nargv[%d]: %d", counter, n);
jkl[counter - 1] = n;
}
else {
printf("\nargv[%d] is invalid", counter);
return 1;
}
}
}
return 0;
}
// random float generator within min and max
float randGenerate(int min, int max) {
float res;
int r = rand();
res = 1.0 * rand() / RAND_MAX * (max-min) + min;
return res;
}
// initialize matrix with float type
void initMatrix(float* matrix, int size, int min, int max) {
for (int i = 0; i < size; ++i)
matrix[i] = randGenerate(min, max);
return;
}
// matrix multiplication with CPU in the most stupid algo
// Algo Complexity: O((2k-1)*j*l)
void matrixMulCPU(float* A, float* B, float* C, int j, int k, int l) {
for (int row = 0; row < j; ++row) {
for (int col = 0; col < l; ++col) {
float eleSum = 0.0f;
for (int i = 0; i < k; ++i) {
eleSum += A[row * k + i] * B[i * l + col];
}
C[row * l + col] = eleSum;
}
}
}
// matrix multiplication with GPU device
// using tiling algorithm, take use of the shared memory to higher the compute-to-global-memory-access ratio
__global__
void matrixMulGPU(float* d_A, float* d_B, float* d_C, int j, int k, int l) {
__shared__ float Ads[TILE_SIZE][TILE_SIZE];
__shared__ float Bds[TILE_SIZE][TILE_SIZE];
int bx = blockIdx.x;
int by = blockIdx.y;
int tx = threadIdx.x;
int ty = threadIdx.y;
int row = by * blockDim.y + ty;
int col = bx * blockDim.x + tx;
float CEleValue = 0.0f;
for (int ph = 0; ph * TILE_SIZE < k; ++ph) {
if (row < j && ph * TILE_SIZE + tx < k)
Ads[ty][tx] = d_A[row * k + ph * TILE_SIZE + tx];
else
Ads[ty][tx] = 0;
if (col < l && ph * TILE_SIZE + ty < k)
Bds[ty][tx] = d_B[(ph * TILE_SIZE + ty) * l + col];
else
Bds[ty][tx] = 0;
__syncthreads();
for (int i = 0; i < TILE_SIZE; ++i) {
CEleValue += Ads[ty][i] * Bds[i][tx];
}
__syncthreads();
}
if (row < j && col < l)
d_C[row * l + col] = CEleValue;
}
// show the data in the command prompt.
// this function is used for configuration
// please don't use it when j,k,l is too large
void showMatrix(float* matrix, int row, int col) {
if (row > 5 || col > 5) return;
printf("\n");
for (int i = 0; i < row; i++) {
for (int j = 0; j < col; j++) {
printf("%f\t", matrix[i*col + j]);
}
printf("\n");
}
return;
}
// check if two matrix is the same
// 0 is defined at the very begining
void resultCheck(float* result_CPU, float* result_GPU, int size) {
// using relative error
// assuming CPU result is the true value
for (int i = 0; i < size; ++i) {
if ((result_CPU[i] - result_GPU[i])/ result_CPU[i] > ZERO || (result_GPU[i] - result_CPU[i])/result_CPU[i] < -ZERO) {
printf("\nResult check: Error!!!! Didn't pass.");
return;
}
}
printf("\nResult check: ---PASS---.");
return;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <math.h>
#include <time.h>
#define ELEMENT_MIN 0
#define ELEMENT_MAX 10
#define BLOCK_SIZE 16
#define TILE_SIZE 16
#define ZERO 1.e-6
int UI(int argc, char* argv[], int* jkl);
float randGenerate(int min, int max);
void initMatrix(float* matrix, int size, int min, int max);
void matrixMulCPU(float* A, float* B, float* C, int j, int k, int l);
__global__
void matrixMulGPU(float* d_A, float* d_B, float* d_C, int j, int k, int l);
void showMatrix(float* matrix, int row, int col);
void resultCheck(float* result_CPU, float* result_GPU, int size);
int main(int argc, char* argv[]){
// reset rand seed
srand((unsigned)time(NULL));
clock_t start, finish;
int total_time;
// Go through UI first.
// In UI section, only command with valid param can go to the next step.
int UIStatus;
int jkl[3];
UIStatus = UI(argc, argv, jkl);
if (UIStatus != 0) {
printf("\nApplication terminates.");
return 0;
}
printf("\nContinuing with j=%d, k=%d, l=%d", jkl[0], jkl[1], jkl[2]);
// UI section ends
// Initialize these two matrix A, B with random float type
const int j = jkl[0];
const int k = jkl[1];
const int l = jkl[2];
float* A = (float*)malloc(j * k * sizeof(float));
float* B = (float*)malloc(k * l * sizeof(float));
initMatrix(A, (j * k), ELEMENT_MIN, ELEMENT_MAX);
initMatrix(B, (k * l), ELEMENT_MIN, ELEMENT_MAX);
showMatrix(A, j, k);
showMatrix(B, k, l);
printf("\nDone initializing matrix A with size %d*%d and matrix B with %d*%d", j, k, k, l);
// Initialzing ends
// CPU code for calculating the matrix multiplication
// Use this result to varify the kernel result later
// Only do this step when j, k, l is below 5000
float* C_GPU = (float*)malloc(j * l * sizeof(float));
float* C_CPU = (float*)malloc(j * l * sizeof(float));
if (k < 5000 && j < 5000 && l < 5000) {
start = clock();
matrixMulCPU(A, B, C_CPU, j, k, l);
finish = clock();
printf("\nDone matrix multiplication with CPU");
total_time = (int)(finish - start);
printf("\n%d microseconds used.\n", total_time);
showMatrix(C_CPU, j, l);
}
// Matrix multipication with CPU ends
// Allocate device memory and copy data from host to device
float *d_A, *d_B, *d_C;
hipMalloc((float**)&d_A, j * k * sizeof(float));
hipMalloc((float**)&d_B, k * l * sizeof(float));
hipMalloc((float**)&d_C, j * l * sizeof(float));
printf("\nDone allocating space in device.");
hipMemcpy(d_A, A, j * k * sizeof(float), hipMemcpyHostToDevice);
hipMemcpy(d_B, B, k * l * sizeof(float), hipMemcpyHostToDevice);
printf("\nDone copying memory from host to device");
// Done allocating and transfering
// Initialize thread block and kernel grid dimensions
dim3 threads(BLOCK_SIZE, BLOCK_SIZE);
dim3 grid((int)ceil(1.0 * l / threads.x), (int)ceil(1.0 * j / threads.y));
printf("\nDone initializing block dimention and grid dimention.");
// Done initializing thread block and kernel grid dimensions
// launch CUDA device kernel
start = clock();
matrixMulGPU<<< grid, threads>>>(d_A, d_B, d_C, j, k, l);
// Done CUDA device kernel
// Copy results from device to host and free device memory
hipMemcpy(C_GPU, d_C, j * l * sizeof(float), hipMemcpyDeviceToHost);
finish = clock();
printf("\nDone matrix multiplication with GPU.");
total_time = (int)(finish - start);
printf("\n%d microseconds used.\n", total_time);
showMatrix(C_GPU, j, l);
hipFree(d_A);
hipFree(d_B);
hipFree(d_C);
// Done copying results and freeing device memory
// Check the result of the Calculated Matrix
if (k < 5000 && j < 5000 && l < 5000) resultCheck(C_CPU, C_GPU, j * l);
// Done result checking.
return 0;
}
// UI for main function
// return 0 means everything's fine, just continue;
// return 1 means there's invalid input or '--help', terminate running.
int UI(int argc, char* argv[], int* jkl) {
// UI for the exe file
// while input with ? or -h or --help; tell that what we need as params
// while input with [1,2] || [4, +inf) parameters; tell that we need 3 params
// while input with 3 paramerters; print the size of two input matrix; check if all params are valid;
if (argc == 2 && (strcmp(argv[1], "--help") == 0 || strcmp(argv[1], "-h") == 0 || strcmp(argv[1], "?") == 0)) {
printf("\nWe need 3 parameters j,k,l which represents the two matrix's dimention.\n");
printf("The first one with size j*k, and the second one's is k*l.\n");
printf("j,k,l must be int type and greater than 0.\n");
return 1;
}
if (argc <= 3 || argc >= 5) {
printf("\nError.\nWe need 3 parameters as input.\nYou can use '--help' for more details.\n");
return 1;
}
if (argc == 4) {
int n;
printf("\nNumber Of Arguments Passed: %d", argc);
printf("\n----Following Are The Command Line Arguments Passed----");
for (int counter = 1; counter < argc; counter++) {
n = atoi(argv[counter]);
if (n > 0) {
printf("\nargv[%d]: %d", counter, n);
jkl[counter - 1] = n;
}
else {
printf("\nargv[%d] is invalid", counter);
return 1;
}
}
}
return 0;
}
// random float generator within min and max
float randGenerate(int min, int max) {
float res;
int r = rand();
res = 1.0 * rand() / RAND_MAX * (max-min) + min;
return res;
}
// initialize matrix with float type
void initMatrix(float* matrix, int size, int min, int max) {
for (int i = 0; i < size; ++i)
matrix[i] = randGenerate(min, max);
return;
}
// matrix multiplication with CPU in the most stupid algo
// Algo Complexity: O((2k-1)*j*l)
void matrixMulCPU(float* A, float* B, float* C, int j, int k, int l) {
for (int row = 0; row < j; ++row) {
for (int col = 0; col < l; ++col) {
float eleSum = 0.0f;
for (int i = 0; i < k; ++i) {
eleSum += A[row * k + i] * B[i * l + col];
}
C[row * l + col] = eleSum;
}
}
}
// matrix multiplication with GPU device
// using tiling algorithm, take use of the shared memory to higher the compute-to-global-memory-access ratio
__global__
void matrixMulGPU(float* d_A, float* d_B, float* d_C, int j, int k, int l) {
__shared__ float Ads[TILE_SIZE][TILE_SIZE];
__shared__ float Bds[TILE_SIZE][TILE_SIZE];
int bx = blockIdx.x;
int by = blockIdx.y;
int tx = threadIdx.x;
int ty = threadIdx.y;
int row = by * blockDim.y + ty;
int col = bx * blockDim.x + tx;
float CEleValue = 0.0f;
for (int ph = 0; ph * TILE_SIZE < k; ++ph) {
if (row < j && ph * TILE_SIZE + tx < k)
Ads[ty][tx] = d_A[row * k + ph * TILE_SIZE + tx];
else
Ads[ty][tx] = 0;
if (col < l && ph * TILE_SIZE + ty < k)
Bds[ty][tx] = d_B[(ph * TILE_SIZE + ty) * l + col];
else
Bds[ty][tx] = 0;
__syncthreads();
for (int i = 0; i < TILE_SIZE; ++i) {
CEleValue += Ads[ty][i] * Bds[i][tx];
}
__syncthreads();
}
if (row < j && col < l)
d_C[row * l + col] = CEleValue;
}
// show the data in the command prompt.
// this function is used for configuration
// please don't use it when j,k,l is too large
void showMatrix(float* matrix, int row, int col) {
if (row > 5 || col > 5) return;
printf("\n");
for (int i = 0; i < row; i++) {
for (int j = 0; j < col; j++) {
printf("%f\t", matrix[i*col + j]);
}
printf("\n");
}
return;
}
// check if two matrix is the same
// 0 is defined at the very begining
void resultCheck(float* result_CPU, float* result_GPU, int size) {
// using relative error
// assuming CPU result is the true value
for (int i = 0; i < size; ++i) {
if ((result_CPU[i] - result_GPU[i])/ result_CPU[i] > ZERO || (result_GPU[i] - result_CPU[i])/result_CPU[i] < -ZERO) {
printf("\nResult check: Error!!!! Didn't pass.");
return;
}
}
printf("\nResult check: ---PASS---.");
return;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12matrixMulGPUPfS_S_iii
.globl _Z12matrixMulGPUPfS_S_iii
.p2align 8
.type _Z12matrixMulGPUPfS_S_iii,@function
_Z12matrixMulGPUPfS_S_iii:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x34
s_load_b64 s[8:9], s[0:1], 0x18
s_load_b32 s3, s[0:1], 0x20
v_bfe_u32 v3, v0, 10, 10
v_and_b32_e32 v4, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s4, s2, 16
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[0:1], null, s15, s4, v[3:4]
v_mad_u64_u32 v[1:2], null, s14, s2, v[4:5]
s_cmp_lt_i32 s9, 1
v_cmp_gt_i32_e64 s2, s8, v0
s_delay_alu instid0(VALU_DEP_2)
v_cmp_gt_i32_e32 vcc_lo, s3, v1
s_cbranch_scc1 .LBB0_15
s_load_b128 s[4:7], s[0:1], 0x0
v_lshlrev_b32_e32 v2, 2, v4
v_dual_mov_b32 v10, 0 :: v_dual_lshlrev_b32 v7, 6, v3
v_mad_u64_u32 v[5:6], null, v0, s9, v[4:5]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_nc_u32_e32 v8, 0x400, v2
v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v9, v7, v2
v_cmp_le_i32_e64 s10, s3, v1
s_mov_b32 s13, 0
s_delay_alu instid0(VALU_DEP_3)
v_add_nc_u32_e32 v6, v8, v7
s_xor_b32 s11, s2, -1
s_mov_b32 s12, 0
.LBB0_2:
v_add_nc_u32_e32 v12, s13, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_le_i32_e64 s2, s9, v12
s_or_b32 s2, s11, s2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_saveexec_b32 s14, s2
s_xor_b32 s2, exec_lo, s14
s_cbranch_execz .LBB0_4
ds_store_b32 v9, v10
.LBB0_4:
s_and_not1_saveexec_b32 s14, s2
s_cbranch_execz .LBB0_6
v_add_nc_u32_e32 v12, s13, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v13, 31, v12
v_lshlrev_b64 v[12:13], 2, v[12:13]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v12, s2, s4, v12
v_add_co_ci_u32_e64 v13, s2, s5, v13, s2
global_load_b32 v12, v[12:13], off
s_waitcnt vmcnt(0)
ds_store_b32 v9, v12
.LBB0_6:
s_or_b32 exec_lo, exec_lo, s14
s_mov_b32 s14, 0
s_mov_b32 s2, s10
s_and_saveexec_b32 s15, vcc_lo
v_add_nc_u32_e32 v11, s13, v3
s_and_not1_b32 s13, s10, exec_lo
s_mov_b32 s14, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_le_i32_e64 s2, s9, v11
s_and_b32 s2, s2, exec_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 s2, s13, s2
s_or_b32 exec_lo, exec_lo, s15
s_and_saveexec_b32 s13, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_xor_b32 s2, exec_lo, s13
s_cbranch_execz .LBB0_10
s_and_not1_b32 s14, s14, exec_lo
ds_store_b32 v6, v10
.LBB0_10:
s_or_b32 exec_lo, exec_lo, s2
s_and_saveexec_b32 s13, s14
s_cbranch_execz .LBB0_12
v_mad_u64_u32 v[12:13], null, v11, s3, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v13, 31, v12
v_lshlrev_b64 v[12:13], 2, v[12:13]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v12, s2, s6, v12
v_add_co_ci_u32_e64 v13, s2, s7, v13, s2
global_load_b32 v12, v[12:13], off
s_waitcnt vmcnt(0)
ds_store_b32 v6, v12
.LBB0_12:
s_or_b32 exec_lo, exec_lo, s13
v_mov_b32_e32 v12, v8
s_mov_b32 s2, 0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB0_13:
v_add_nc_u32_e32 v13, s2, v7
s_add_i32 s2, s2, 4
ds_load_b32 v14, v12
ds_load_b32 v13, v13
v_add_nc_u32_e32 v12, 64, v12
s_cmp_eq_u32 s2, 64
s_waitcnt lgkmcnt(0)
v_fmac_f32_e32 v2, v13, v14
s_cbranch_scc0 .LBB0_13
s_add_i32 s12, s12, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_lshl_b32 s13, s12, 4
s_barrier
s_cmp_ge_i32 s13, s9
buffer_gl0_inv
s_cbranch_scc0 .LBB0_2
s_branch .LBB0_16
.LBB0_15:
v_mov_b32_e32 v2, 0
.LBB0_16:
v_cmp_gt_i32_e32 vcc_lo, s8, v0
v_cmp_gt_i32_e64 s2, s3, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s2, vcc_lo, s2
s_and_saveexec_b32 s4, s2
s_cbranch_execz .LBB0_18
s_load_b64 s[0:1], s[0:1], 0x10
v_mad_u64_u32 v[3:4], null, v0, s3, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v4, 31, v3
v_lshlrev_b64 v[0:1], 2, v[3:4]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v2, off
.LBB0_18:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z12matrixMulGPUPfS_S_iii
.amdhsa_group_segment_fixed_size 2048
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 296
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 15
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z12matrixMulGPUPfS_S_iii, .Lfunc_end0-_Z12matrixMulGPUPfS_S_iii
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 28
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: by_value
- .offset: 40
.size: 4
.value_kind: hidden_block_count_x
- .offset: 44
.size: 4
.value_kind: hidden_block_count_y
- .offset: 48
.size: 4
.value_kind: hidden_block_count_z
- .offset: 52
.size: 2
.value_kind: hidden_group_size_x
- .offset: 54
.size: 2
.value_kind: hidden_group_size_y
- .offset: 56
.size: 2
.value_kind: hidden_group_size_z
- .offset: 58
.size: 2
.value_kind: hidden_remainder_x
- .offset: 60
.size: 2
.value_kind: hidden_remainder_y
- .offset: 62
.size: 2
.value_kind: hidden_remainder_z
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 96
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 104
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 2048
.kernarg_segment_align: 8
.kernarg_segment_size: 296
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z12matrixMulGPUPfS_S_iii
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z12matrixMulGPUPfS_S_iii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 15
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <math.h>
#include <time.h>
#define ELEMENT_MIN 0
#define ELEMENT_MAX 10
#define BLOCK_SIZE 16
#define TILE_SIZE 16
#define ZERO 1.e-6
int UI(int argc, char* argv[], int* jkl);
float randGenerate(int min, int max);
void initMatrix(float* matrix, int size, int min, int max);
void matrixMulCPU(float* A, float* B, float* C, int j, int k, int l);
__global__
void matrixMulGPU(float* d_A, float* d_B, float* d_C, int j, int k, int l);
void showMatrix(float* matrix, int row, int col);
void resultCheck(float* result_CPU, float* result_GPU, int size);
int main(int argc, char* argv[]){
// reset rand seed
srand((unsigned)time(NULL));
clock_t start, finish;
int total_time;
// Go through UI first.
// In UI section, only command with valid param can go to the next step.
int UIStatus;
int jkl[3];
UIStatus = UI(argc, argv, jkl);
if (UIStatus != 0) {
printf("\nApplication terminates.");
return 0;
}
printf("\nContinuing with j=%d, k=%d, l=%d", jkl[0], jkl[1], jkl[2]);
// UI section ends
// Initialize these two matrix A, B with random float type
const int j = jkl[0];
const int k = jkl[1];
const int l = jkl[2];
float* A = (float*)malloc(j * k * sizeof(float));
float* B = (float*)malloc(k * l * sizeof(float));
initMatrix(A, (j * k), ELEMENT_MIN, ELEMENT_MAX);
initMatrix(B, (k * l), ELEMENT_MIN, ELEMENT_MAX);
showMatrix(A, j, k);
showMatrix(B, k, l);
printf("\nDone initializing matrix A with size %d*%d and matrix B with %d*%d", j, k, k, l);
// Initialzing ends
// CPU code for calculating the matrix multiplication
// Use this result to varify the kernel result later
// Only do this step when j, k, l is below 5000
float* C_GPU = (float*)malloc(j * l * sizeof(float));
float* C_CPU = (float*)malloc(j * l * sizeof(float));
if (k < 5000 && j < 5000 && l < 5000) {
start = clock();
matrixMulCPU(A, B, C_CPU, j, k, l);
finish = clock();
printf("\nDone matrix multiplication with CPU");
total_time = (int)(finish - start);
printf("\n%d microseconds used.\n", total_time);
showMatrix(C_CPU, j, l);
}
// Matrix multipication with CPU ends
// Allocate device memory and copy data from host to device
float *d_A, *d_B, *d_C;
hipMalloc((float**)&d_A, j * k * sizeof(float));
hipMalloc((float**)&d_B, k * l * sizeof(float));
hipMalloc((float**)&d_C, j * l * sizeof(float));
printf("\nDone allocating space in device.");
hipMemcpy(d_A, A, j * k * sizeof(float), hipMemcpyHostToDevice);
hipMemcpy(d_B, B, k * l * sizeof(float), hipMemcpyHostToDevice);
printf("\nDone copying memory from host to device");
// Done allocating and transfering
// Initialize thread block and kernel grid dimensions
dim3 threads(BLOCK_SIZE, BLOCK_SIZE);
dim3 grid((int)ceil(1.0 * l / threads.x), (int)ceil(1.0 * j / threads.y));
printf("\nDone initializing block dimention and grid dimention.");
// Done initializing thread block and kernel grid dimensions
// launch CUDA device kernel
start = clock();
matrixMulGPU<<< grid, threads>>>(d_A, d_B, d_C, j, k, l);
// Done CUDA device kernel
// Copy results from device to host and free device memory
hipMemcpy(C_GPU, d_C, j * l * sizeof(float), hipMemcpyDeviceToHost);
finish = clock();
printf("\nDone matrix multiplication with GPU.");
total_time = (int)(finish - start);
printf("\n%d microseconds used.\n", total_time);
showMatrix(C_GPU, j, l);
hipFree(d_A);
hipFree(d_B);
hipFree(d_C);
// Done copying results and freeing device memory
// Check the result of the Calculated Matrix
if (k < 5000 && j < 5000 && l < 5000) resultCheck(C_CPU, C_GPU, j * l);
// Done result checking.
return 0;
}
// UI for main function
// return 0 means everything's fine, just continue;
// return 1 means there's invalid input or '--help', terminate running.
int UI(int argc, char* argv[], int* jkl) {
// UI for the exe file
// while input with ? or -h or --help; tell that what we need as params
// while input with [1,2] || [4, +inf) parameters; tell that we need 3 params
// while input with 3 paramerters; print the size of two input matrix; check if all params are valid;
if (argc == 2 && (strcmp(argv[1], "--help") == 0 || strcmp(argv[1], "-h") == 0 || strcmp(argv[1], "?") == 0)) {
printf("\nWe need 3 parameters j,k,l which represents the two matrix's dimention.\n");
printf("The first one with size j*k, and the second one's is k*l.\n");
printf("j,k,l must be int type and greater than 0.\n");
return 1;
}
if (argc <= 3 || argc >= 5) {
printf("\nError.\nWe need 3 parameters as input.\nYou can use '--help' for more details.\n");
return 1;
}
if (argc == 4) {
int n;
printf("\nNumber Of Arguments Passed: %d", argc);
printf("\n----Following Are The Command Line Arguments Passed----");
for (int counter = 1; counter < argc; counter++) {
n = atoi(argv[counter]);
if (n > 0) {
printf("\nargv[%d]: %d", counter, n);
jkl[counter - 1] = n;
}
else {
printf("\nargv[%d] is invalid", counter);
return 1;
}
}
}
return 0;
}
// random float generator within min and max
float randGenerate(int min, int max) {
float res;
int r = rand();
res = 1.0 * rand() / RAND_MAX * (max-min) + min;
return res;
}
// initialize matrix with float type
void initMatrix(float* matrix, int size, int min, int max) {
for (int i = 0; i < size; ++i)
matrix[i] = randGenerate(min, max);
return;
}
// matrix multiplication with CPU in the most stupid algo
// Algo Complexity: O((2k-1)*j*l)
void matrixMulCPU(float* A, float* B, float* C, int j, int k, int l) {
for (int row = 0; row < j; ++row) {
for (int col = 0; col < l; ++col) {
float eleSum = 0.0f;
for (int i = 0; i < k; ++i) {
eleSum += A[row * k + i] * B[i * l + col];
}
C[row * l + col] = eleSum;
}
}
}
// matrix multiplication with GPU device
// using tiling algorithm, take use of the shared memory to higher the compute-to-global-memory-access ratio
__global__
void matrixMulGPU(float* d_A, float* d_B, float* d_C, int j, int k, int l) {
__shared__ float Ads[TILE_SIZE][TILE_SIZE];
__shared__ float Bds[TILE_SIZE][TILE_SIZE];
int bx = blockIdx.x;
int by = blockIdx.y;
int tx = threadIdx.x;
int ty = threadIdx.y;
int row = by * blockDim.y + ty;
int col = bx * blockDim.x + tx;
float CEleValue = 0.0f;
for (int ph = 0; ph * TILE_SIZE < k; ++ph) {
if (row < j && ph * TILE_SIZE + tx < k)
Ads[ty][tx] = d_A[row * k + ph * TILE_SIZE + tx];
else
Ads[ty][tx] = 0;
if (col < l && ph * TILE_SIZE + ty < k)
Bds[ty][tx] = d_B[(ph * TILE_SIZE + ty) * l + col];
else
Bds[ty][tx] = 0;
__syncthreads();
for (int i = 0; i < TILE_SIZE; ++i) {
CEleValue += Ads[ty][i] * Bds[i][tx];
}
__syncthreads();
}
if (row < j && col < l)
d_C[row * l + col] = CEleValue;
}
// show the data in the command prompt.
// this function is used for configuration
// please don't use it when j,k,l is too large
void showMatrix(float* matrix, int row, int col) {
if (row > 5 || col > 5) return;
printf("\n");
for (int i = 0; i < row; i++) {
for (int j = 0; j < col; j++) {
printf("%f\t", matrix[i*col + j]);
}
printf("\n");
}
return;
}
// check if two matrix is the same
// 0 is defined at the very begining
void resultCheck(float* result_CPU, float* result_GPU, int size) {
// using relative error
// assuming CPU result is the true value
for (int i = 0; i < size; ++i) {
if ((result_CPU[i] - result_GPU[i])/ result_CPU[i] > ZERO || (result_GPU[i] - result_CPU[i])/result_CPU[i] < -ZERO) {
printf("\nResult check: Error!!!! Didn't pass.");
return;
}
}
printf("\nResult check: ---PASS---.");
return;
} | .text
.file "hw1.hip"
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI0_0:
.quad 0x41dfffffffc00000 # double 2147483647
.LCPI0_1:
.quad 0x4024000000000000 # double 10
.LCPI0_2:
.quad 0x3fb0000000000000 # double 0.0625
.LCPI0_3:
.quad 0x3eb0c6f7a0b5ed8d # double 9.9999999999999995E-7
.LCPI0_4:
.quad 0xbeb0c6f7a0b5ed8d # double -9.9999999999999995E-7
.LCPI0_5:
.quad 0x0000000000000000 # double 0
.text
.globl main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $264, %rsp # imm = 0x108
.cfi_def_cfa_offset 320
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rsi, %rbx
movl %edi, %ebp
xorl %edi, %edi
callq time
movl %eax, %edi
callq srand
leaq 100(%rsp), %rdx
movl %ebp, %edi
movq %rbx, %rsi
callq _Z2UIiPPcPi
testl %eax, %eax
je .LBB0_4
# %bb.1:
movl $.L.str, %edi
.LBB0_2: # %_Z11resultCheckPfS_i.exit.sink.split
xorl %eax, %eax
callq printf
.LBB0_3:
xorl %eax, %eax
addq $264, %rsp # imm = 0x108
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.LBB0_4:
.cfi_def_cfa_offset 320
movl 100(%rsp), %r12d
movl 104(%rsp), %r15d
movl 108(%rsp), %r14d
movl $.L.str.1, %edi
movl %r12d, %esi
movl %r15d, %edx
movl %r14d, %ecx
xorl %eax, %eax
callq printf
movl %r15d, %ebx
movq %r12, 32(%rsp) # 8-byte Spill
imull %r12d, %ebx
movslq %ebx, %r12
leaq (,%r12,4), %rdi
movq %rdi, 128(%rsp) # 8-byte Spill
callq malloc
movq %rax, %rbp
movl %r14d, %r13d
imull %r15d, %r13d
movslq %r13d, %rdi
shlq $2, %rdi
movq %rdi, 120(%rsp) # 8-byte Spill
callq malloc
movq %rax, 24(%rsp) # 8-byte Spill
testl %r12d, %r12d
movq %rbp, %r12
jle .LBB0_7
# %bb.5: # %.lr.ph.i
movl %ebx, %ebx
xorl %ebp, %ebp
.p2align 4, 0x90
.LBB0_6: # =>This Inner Loop Header: Depth=1
callq rand
callq rand
xorps %xmm0, %xmm0
cvtsi2sd %eax, %xmm0
divsd .LCPI0_0(%rip), %xmm0
mulsd .LCPI0_1(%rip), %xmm0
addsd .LCPI0_5(%rip), %xmm0
cvtsd2ss %xmm0, %xmm0
movss %xmm0, (%r12,%rbp,4)
incq %rbp
cmpq %rbp, %rbx
jne .LBB0_6
.LBB0_7: # %_Z10initMatrixPfiii.exit
movq %r12, 40(%rsp) # 8-byte Spill
testl %r13d, %r13d
movq 24(%rsp), %r12 # 8-byte Reload
jle .LBB0_10
# %bb.8: # %.lr.ph.i91
movl %r13d, %ebx
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB0_9: # =>This Inner Loop Header: Depth=1
callq rand
callq rand
xorps %xmm0, %xmm0
cvtsi2sd %eax, %xmm0
divsd .LCPI0_0(%rip), %xmm0
mulsd .LCPI0_1(%rip), %xmm0
addsd .LCPI0_5(%rip), %xmm0
cvtsd2ss %xmm0, %xmm0
movss %xmm0, (%r12,%r13,4)
incq %r13
cmpq %r13, %rbx
jne .LBB0_9
.LBB0_10: # %_Z10initMatrixPfiii.exit96
movq 32(%rsp), %rbx # 8-byte Reload
cmpl $5, %ebx
jg .LBB0_18
# %bb.11: # %_Z10initMatrixPfiii.exit96
cmpl $5, %r15d
jg .LBB0_18
# %bb.12:
movl $10, %edi
callq putchar@PLT
testl %ebx, %ebx
jle .LBB0_18
# %bb.13: # %.preheader.lr.ph.i
xorl %r13d, %r13d
xorl %ebx, %ebx
jmp .LBB0_15
.p2align 4, 0x90
.LBB0_14: # %._crit_edge.i
# in Loop: Header=BB0_15 Depth=1
movl $10, %edi
callq putchar@PLT
incq %rbx
addl %r15d, %r13d
cmpq 32(%rsp), %rbx # 8-byte Folded Reload
je .LBB0_18
.LBB0_15: # %.preheader.i
# =>This Loop Header: Depth=1
# Child Loop BB0_17 Depth 2
testl %r15d, %r15d
jle .LBB0_14
# %bb.16: # %.lr.ph.i97
# in Loop: Header=BB0_15 Depth=1
movl %r13d, %eax
movq 40(%rsp), %rcx # 8-byte Reload
leaq (%rcx,%rax,4), %rbp
xorl %r12d, %r12d
.p2align 4, 0x90
.LBB0_17: # Parent Loop BB0_15 Depth=1
# => This Inner Loop Header: Depth=2
movss (%rbp,%r12,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.21, %edi
movb $1, %al
callq printf
incq %r12
cmpq %r12, %r15
jne .LBB0_17
jmp .LBB0_14
.LBB0_18: # %_Z10showMatrixPfii.exit
cmpl $5, %r15d
jg .LBB0_26
# %bb.19: # %_Z10showMatrixPfii.exit
cmpl $5, %r14d
jg .LBB0_26
# %bb.20:
movl $10, %edi
callq putchar@PLT
testl %r15d, %r15d
jle .LBB0_26
# %bb.21: # %.preheader.lr.ph.i104
xorl %r13d, %r13d
xorl %ebx, %ebx
jmp .LBB0_23
.p2align 4, 0x90
.LBB0_22: # %._crit_edge.i108
# in Loop: Header=BB0_23 Depth=1
movl $10, %edi
callq putchar@PLT
incq %rbx
addl %r14d, %r13d
cmpq %r15, %rbx
je .LBB0_26
.LBB0_23: # %.preheader.i106
# =>This Loop Header: Depth=1
# Child Loop BB0_25 Depth 2
testl %r14d, %r14d
jle .LBB0_22
# %bb.24: # %.lr.ph.i112
# in Loop: Header=BB0_23 Depth=1
movl %r13d, %eax
movq 24(%rsp), %rcx # 8-byte Reload
leaq (%rcx,%rax,4), %rbp
xorl %r12d, %r12d
.p2align 4, 0x90
.LBB0_25: # Parent Loop BB0_23 Depth=1
# => This Inner Loop Header: Depth=2
movss (%rbp,%r12,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.21, %edi
movb $1, %al
callq printf
incq %r12
cmpq %r12, %r14
jne .LBB0_25
jmp .LBB0_22
.LBB0_26: # %_Z10showMatrixPfii.exit117
movl $.L.str.2, %edi
movq 32(%rsp), %rbp # 8-byte Reload
movl %ebp, %esi
movl %r15d, %edx
movl %r15d, %ecx
movl %r14d, %r8d
xorl %eax, %eax
callq printf
movl %r14d, %eax
imull %ebp, %eax
movl %eax, 4(%rsp) # 4-byte Spill
movslq %eax, %rbx
shlq $2, %rbx
movq %rbx, %rdi
callq malloc
movq %rax, 16(%rsp) # 8-byte Spill
movq %rbx, 88(%rsp) # 8-byte Spill
movq %rbx, %rdi
callq malloc
movq %rax, 8(%rsp) # 8-byte Spill
cmpl $5000, %r15d # imm = 0x1388
setl %al
cmpl $5000, %ebp # imm = 0x1388
setl %cl
andb %al, %cl
cmpl $5000, %r14d # imm = 0x1388
setl %al
andb %cl, %al
movb %al, 3(%rsp) # 1-byte Spill
cmpb $1, %al
jne .LBB0_44
# %bb.27:
callq clock
movq %rax, 112(%rsp) # 8-byte Spill
testl %ebp, %ebp
movq 8(%rsp), %r12 # 8-byte Reload
jle .LBB0_36
# %bb.28: # %.preheader27.lr.ph.i
movslq %r14d, %rax
leaq (,%rax,4), %rcx
xorl %edx, %edx
xorl %esi, %esi
jmp .LBB0_30
.p2align 4, 0x90
.LBB0_29: # %._crit_edge31.i
# in Loop: Header=BB0_30 Depth=1
incq %rsi
addl %r15d, %edx
cmpq %rbp, %rsi
je .LBB0_36
.LBB0_30: # %.preheader27.i
# =>This Loop Header: Depth=1
# Child Loop BB0_33 Depth 2
# Child Loop BB0_35 Depth 3
testl %r14d, %r14d
jle .LBB0_29
# %bb.31: # %.preheader.lr.ph.i118
# in Loop: Header=BB0_30 Depth=1
movl %edx, %edi
movq 40(%rsp), %r8 # 8-byte Reload
leaq (%r8,%rdi,4), %rdi
movq %rsi, %r8
imulq %rax, %r8
leaq (%r12,%r8,4), %r8
movq 24(%rsp), %r9 # 8-byte Reload
xorl %r10d, %r10d
jmp .LBB0_33
.p2align 4, 0x90
.LBB0_32: # %._crit_edge.i120
# in Loop: Header=BB0_33 Depth=2
movss %xmm0, (%r8,%r10,4)
incq %r10
addq $4, %r9
cmpq %r14, %r10
je .LBB0_29
.LBB0_33: # %.preheader.i119
# Parent Loop BB0_30 Depth=1
# => This Loop Header: Depth=2
# Child Loop BB0_35 Depth 3
xorps %xmm0, %xmm0
testl %r15d, %r15d
jle .LBB0_32
# %bb.34: # %.lr.ph.preheader.i
# in Loop: Header=BB0_33 Depth=2
movq %r9, %r11
xorl %ebx, %ebx
.p2align 4, 0x90
.LBB0_35: # %.lr.ph.i122
# Parent Loop BB0_30 Depth=1
# Parent Loop BB0_33 Depth=2
# => This Inner Loop Header: Depth=3
movss (%rdi,%rbx,4), %xmm1 # xmm1 = mem[0],zero,zero,zero
mulss (%r11), %xmm1
addss %xmm1, %xmm0
incq %rbx
addq %rcx, %r11
cmpq %rbx, %r15
jne .LBB0_35
jmp .LBB0_32
.LBB0_36: # %_Z12matrixMulCPUPfS_S_iii.exit
callq clock
movq %rax, %r13
movl $.L.str.3, %edi
xorl %eax, %eax
callq printf
subl 112(%rsp), %r13d # 4-byte Folded Reload
movl $.L.str.4, %edi
movl %r13d, %esi
xorl %eax, %eax
callq printf
cmpl $5, %ebp
jg .LBB0_44
# %bb.37: # %_Z12matrixMulCPUPfS_S_iii.exit
cmpl $5, %r14d
jg .LBB0_44
# %bb.38:
movl $10, %edi
callq putchar@PLT
testl %ebp, %ebp
jle .LBB0_44
# %bb.39: # %.preheader.lr.ph.i128
xorl %r13d, %r13d
xorl %ebx, %ebx
jmp .LBB0_41
.p2align 4, 0x90
.LBB0_40: # %._crit_edge.i132
# in Loop: Header=BB0_41 Depth=1
movl $10, %edi
callq putchar@PLT
incq %rbx
addl %r14d, %r13d
movq 32(%rsp), %rbp # 8-byte Reload
cmpq %rbp, %rbx
je .LBB0_44
.LBB0_41: # %.preheader.i130
# =>This Loop Header: Depth=1
# Child Loop BB0_43 Depth 2
testl %r14d, %r14d
jle .LBB0_40
# %bb.42: # %.lr.ph.i136
# in Loop: Header=BB0_41 Depth=1
movl %r13d, %eax
movq 8(%rsp), %rcx # 8-byte Reload
leaq (%rcx,%rax,4), %rbp
xorl %r12d, %r12d
.p2align 4, 0x90
.LBB0_43: # Parent Loop BB0_41 Depth=1
# => This Inner Loop Header: Depth=2
movss (%rbp,%r12,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.21, %edi
movb $1, %al
callq printf
incq %r12
cmpq %r12, %r14
jne .LBB0_43
jmp .LBB0_40
.LBB0_44: # %_Z10showMatrixPfii.exit141
leaq 64(%rsp), %rdi
movq 128(%rsp), %rbx # 8-byte Reload
movq %rbx, %rsi
callq hipMalloc
leaq 56(%rsp), %rdi
movq 120(%rsp), %r12 # 8-byte Reload
movq %r12, %rsi
callq hipMalloc
leaq 48(%rsp), %rdi
movq 88(%rsp), %rsi # 8-byte Reload
callq hipMalloc
movl $.L.str.5, %edi
xorl %eax, %eax
callq printf
movq 64(%rsp), %rdi
movq 40(%rsp), %rsi # 8-byte Reload
movq %rbx, %rdx
movl $1, %ecx
callq hipMemcpy
movq 56(%rsp), %rdi
movq 24(%rsp), %rsi # 8-byte Reload
movq %r12, %rdx
movl $1, %ecx
callq hipMemcpy
movl $.L.str.6, %edi
xorl %eax, %eax
callq printf
xorps %xmm0, %xmm0
cvtsi2sd %r14d, %xmm0
mulsd .LCPI0_2(%rip), %xmm0
callq ceil@PLT
cvttsd2si %xmm0, %ebx
xorps %xmm0, %xmm0
cvtsi2sd %ebp, %xmm0
mulsd .LCPI0_2(%rip), %xmm0
callq ceil@PLT
cvttsd2si %xmm0, %r13d
shlq $32, %r13
orq %rbx, %r13
movl $.L.str.7, %edi
xorl %eax, %eax
callq printf
callq clock
movq %rax, %r12
movabsq $68719476752, %rdx # imm = 0x1000000010
movq %r13, %rdi
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB0_46
# %bb.45:
movq 64(%rsp), %rax
movq 56(%rsp), %rcx
movq 48(%rsp), %rdx
movq %rax, 200(%rsp)
movq %rcx, 192(%rsp)
movq %rdx, 184(%rsp)
movl %ebp, 84(%rsp)
movl %r15d, 80(%rsp)
movl %r14d, 76(%rsp)
leaq 200(%rsp), %rax
movq %rax, 208(%rsp)
leaq 192(%rsp), %rax
movq %rax, 216(%rsp)
leaq 184(%rsp), %rax
movq %rax, 224(%rsp)
leaq 84(%rsp), %rax
movq %rax, 232(%rsp)
leaq 80(%rsp), %rax
movq %rax, 240(%rsp)
leaq 76(%rsp), %rax
movq %rax, 248(%rsp)
leaq 168(%rsp), %rdi
leaq 152(%rsp), %rsi
leaq 144(%rsp), %rdx
leaq 136(%rsp), %rcx
callq __hipPopCallConfiguration
movq 168(%rsp), %rsi
movl 176(%rsp), %edx
movq 152(%rsp), %rcx
movl 160(%rsp), %r8d
leaq 208(%rsp), %r9
movl $_Z12matrixMulGPUPfS_S_iii, %edi
pushq 136(%rsp)
.cfi_adjust_cfa_offset 8
pushq 152(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB0_46:
movq 48(%rsp), %rsi
movq 16(%rsp), %rdi # 8-byte Reload
movq 88(%rsp), %rdx # 8-byte Reload
movl $2, %ecx
callq hipMemcpy
callq clock
movq %rax, %r15
movl $.L.str.8, %edi
xorl %eax, %eax
callq printf
subl %r12d, %r15d
movl $.L.str.4, %edi
movl %r15d, %esi
xorl %eax, %eax
callq printf
cmpl $5, %ebp
jg .LBB0_54
# %bb.47:
cmpl $5, %r14d
jg .LBB0_54
# %bb.48:
movl $10, %edi
callq putchar@PLT
testl %ebp, %ebp
jle .LBB0_54
# %bb.49: # %.preheader.lr.ph.i144
xorl %r15d, %r15d
xorl %ebx, %ebx
jmp .LBB0_51
.p2align 4, 0x90
.LBB0_50: # %._crit_edge.i148
# in Loop: Header=BB0_51 Depth=1
movl $10, %edi
callq putchar@PLT
incq %rbx
addl %r14d, %r15d
cmpq %rbp, %rbx
je .LBB0_54
.LBB0_51: # %.preheader.i146
# =>This Loop Header: Depth=1
# Child Loop BB0_53 Depth 2
testl %r14d, %r14d
jle .LBB0_50
# %bb.52: # %.lr.ph.i152
# in Loop: Header=BB0_51 Depth=1
movl %r15d, %eax
movq 16(%rsp), %rcx # 8-byte Reload
leaq (%rcx,%rax,4), %r12
xorl %r13d, %r13d
.p2align 4, 0x90
.LBB0_53: # Parent Loop BB0_51 Depth=1
# => This Inner Loop Header: Depth=2
movss (%r12,%r13,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.21, %edi
movb $1, %al
callq printf
incq %r13
cmpq %r13, %r14
jne .LBB0_53
jmp .LBB0_50
.LBB0_54: # %_Z10showMatrixPfii.exit157
movq 64(%rsp), %rdi
callq hipFree
movq 56(%rsp), %rdi
callq hipFree
movq 48(%rsp), %rdi
callq hipFree
cmpb $0, 3(%rsp) # 1-byte Folded Reload
je .LBB0_3
# %bb.55:
cmpl $0, 4(%rsp) # 4-byte Folded Reload
jle .LBB0_64
# %bb.56: # %.lr.ph.preheader.i158
movq 8(%rsp), %rax # 8-byte Reload
movss (%rax), %xmm0 # xmm0 = mem[0],zero,zero,zero
movq 16(%rsp), %rax # 8-byte Reload
movss (%rax), %xmm1 # xmm1 = mem[0],zero,zero,zero
movaps %xmm0, %xmm2
subss %xmm1, %xmm2
divss %xmm0, %xmm2
cvtss2sd %xmm2, %xmm2
movl $.L.str.22, %edi
ucomisd .LCPI0_3(%rip), %xmm2
ja .LBB0_2
# %bb.57: # %.lr.ph.preheader
subss %xmm0, %xmm1
divss %xmm0, %xmm1
cvtss2sd %xmm1, %xmm1
movsd .LCPI0_4(%rip), %xmm0 # xmm0 = mem[0],zero
ucomisd %xmm1, %xmm0
ja .LBB0_2
# %bb.58: # %.lr.ph183.preheader
movl 4(%rsp), %ebx # 4-byte Reload
movl $1, %eax
movsd .LCPI0_3(%rip), %xmm1 # xmm1 = mem[0],zero
movq 8(%rsp), %rcx # 8-byte Reload
.p2align 4, 0x90
.LBB0_59: # %.lr.ph183
# =>This Inner Loop Header: Depth=1
cmpq %rax, %rbx
je .LBB0_64
# %bb.60: # %.lr.ph.i160
# in Loop: Header=BB0_59 Depth=1
movq %rax, %r14
movss (%rcx,%rax,4), %xmm2 # xmm2 = mem[0],zero,zero,zero
movq 16(%rsp), %rax # 8-byte Reload
movss (%rax,%r14,4), %xmm3 # xmm3 = mem[0],zero,zero,zero
movaps %xmm2, %xmm4
subss %xmm3, %xmm4
divss %xmm2, %xmm4
cvtss2sd %xmm4, %xmm4
ucomisd %xmm1, %xmm4
ja .LBB0_62
# %bb.61: # %.lr.ph
# in Loop: Header=BB0_59 Depth=1
subss %xmm2, %xmm3
divss %xmm2, %xmm3
xorps %xmm2, %xmm2
cvtss2sd %xmm3, %xmm2
leaq 1(%r14), %rax
ucomisd %xmm2, %xmm0
jbe .LBB0_59
.LBB0_62: # %._crit_edge
movl $.L.str.22, %edi
xorl %eax, %eax
callq printf
movl $.L.str.23, %edi
cmpq %rbx, %r14
jae .LBB0_2
jmp .LBB0_3
.LBB0_64:
movl $.L.str.23, %edi
jmp .LBB0_2
.Lfunc_end0:
.size main, .Lfunc_end0-main
.cfi_endproc
# -- End function
.globl _Z2UIiPPcPi # -- Begin function _Z2UIiPPcPi
.p2align 4, 0x90
.type _Z2UIiPPcPi,@function
_Z2UIiPPcPi: # @_Z2UIiPPcPi
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r12
.cfi_def_cfa_offset 40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -48
.cfi_offset %r12, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rdx, %rbx
movq %rsi, %r14
cmpl $4, %edi
je .LBB1_9
# %bb.1:
cmpl $2, %edi
jne .LBB1_7
# %bb.2:
movl %edi, %ebp
movq 8(%r14), %r15
movl $.L.str.9, %esi
movq %r15, %rdi
callq strcmp
testl %eax, %eax
je .LBB1_5
# %bb.3:
movl $.L.str.10, %esi
movq %r15, %rdi
callq strcmp
testl %eax, %eax
je .LBB1_5
# %bb.4:
movl $.L.str.11, %esi
movq %r15, %rdi
callq strcmp
testl %eax, %eax
je .LBB1_5
# %bb.6:
cmpl $4, %ebp
jne .LBB1_7
.LBB1_9:
movl $.L.str.16, %edi
movl $4, %esi
xorl %eax, %eax
callq printf
movl $.L.str.17, %edi
xorl %eax, %eax
callq printf
movq 8(%r14), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %r12
testl %r12d, %r12d
jle .LBB1_10
# %bb.11: # %.lr.ph.preheader
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB1_13: # %.lr.ph
# =>This Inner Loop Header: Depth=1
leal 1(%r15), %esi
movl $.L.str.18, %edi
movl %r12d, %edx
xorl %eax, %eax
callq printf
movl %r12d, (%rbx,%r15,4)
cmpq $2, %r15
je .LBB1_14
# %bb.12: # in Loop: Header=BB1_13 Depth=1
movq 16(%r14,%r15,8), %rdi
xorl %esi, %esi
movl $10, %edx
callq __isoc23_strtol
movq %rax, %r12
incq %r15
testl %r12d, %r12d
jg .LBB1_13
# %bb.15: # %._crit_edge
cmpq $3, %r15
setb %bl
incl %r15d
jmp .LBB1_16
.LBB1_7:
movl $.Lstr, %edi
jmp .LBB1_8
.LBB1_5:
movl $.Lstr.1, %edi
callq puts@PLT
movl $.Lstr.2, %edi
callq puts@PLT
movl $.Lstr.3, %edi
.LBB1_8:
callq puts@PLT
movl $1, %eax
jmp .LBB1_18
.LBB1_10:
movb $1, %bl
movl $1, %r15d
.LBB1_16:
movl $.L.str.19, %edi
movl %r15d, %esi
xorl %eax, %eax
callq printf
jmp .LBB1_17
.LBB1_14: # %.loopexit.loopexit
incq %r15
cmpq $3, %r15
setb %bl
.LBB1_17: # %.loopexit
movzbl %bl, %eax
.LBB1_18:
popq %rbx
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size _Z2UIiPPcPi, .Lfunc_end1-_Z2UIiPPcPi
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function _Z10initMatrixPfiii
.LCPI2_0:
.quad 0x41dfffffffc00000 # double 2147483647
.text
.globl _Z10initMatrixPfiii
.p2align 4, 0x90
.type _Z10initMatrixPfiii,@function
_Z10initMatrixPfiii: # @_Z10initMatrixPfiii
.cfi_startproc
# %bb.0:
testl %esi, %esi
jle .LBB2_4
# %bb.1: # %.lr.ph
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
subq $16, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
movq %rdi, %rbx
subl %edx, %ecx
cvtsi2sd %ecx, %xmm0
movsd %xmm0, 8(%rsp) # 8-byte Spill
xorps %xmm0, %xmm0
cvtsi2sd %edx, %xmm0
movsd %xmm0, (%rsp) # 8-byte Spill
movl %esi, %r14d
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB2_2: # =>This Inner Loop Header: Depth=1
callq rand
callq rand
xorps %xmm0, %xmm0
cvtsi2sd %eax, %xmm0
divsd .LCPI2_0(%rip), %xmm0
mulsd 8(%rsp), %xmm0 # 8-byte Folded Reload
addsd (%rsp), %xmm0 # 8-byte Folded Reload
cvtsd2ss %xmm0, %xmm0
movss %xmm0, (%rbx,%r15,4)
incq %r15
cmpq %r15, %r14
jne .LBB2_2
# %bb.3:
addq $16, %rsp
.cfi_def_cfa_offset 32
popq %rbx
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
.cfi_restore %rbx
.cfi_restore %r14
.cfi_restore %r15
.LBB2_4: # %._crit_edge
retq
.Lfunc_end2:
.size _Z10initMatrixPfiii, .Lfunc_end2-_Z10initMatrixPfiii
.cfi_endproc
# -- End function
.globl _Z10showMatrixPfii # -- Begin function _Z10showMatrixPfii
.p2align 4, 0x90
.type _Z10showMatrixPfii,@function
_Z10showMatrixPfii: # @_Z10showMatrixPfii
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $24, %rsp
.cfi_def_cfa_offset 80
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rdi, 8(%rsp) # 8-byte Spill
cmpl $5, %esi
jg .LBB3_8
# %bb.1:
movl %edx, %ebx
cmpl $5, %edx
jg .LBB3_8
# %bb.2:
movl %esi, %ebp
movl $10, %edi
callq putchar@PLT
testl %ebp, %ebp
jle .LBB3_8
# %bb.3: # %.preheader.lr.ph
movl %ebp, %eax
movq %rax, 16(%rsp) # 8-byte Spill
movl %ebx, %r12d
xorl %r13d, %r13d
xorl %ebp, %ebp
jmp .LBB3_4
.p2align 4, 0x90
.LBB3_7: # %._crit_edge
# in Loop: Header=BB3_4 Depth=1
movl $10, %edi
callq putchar@PLT
incq %rbp
addl %ebx, %r13d
cmpq 16(%rsp), %rbp # 8-byte Folded Reload
je .LBB3_8
.LBB3_4: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB3_6 Depth 2
testl %ebx, %ebx
jle .LBB3_7
# %bb.5: # %.lr.ph
# in Loop: Header=BB3_4 Depth=1
movl %r13d, %eax
movq 8(%rsp), %rcx # 8-byte Reload
leaq (%rcx,%rax,4), %r14
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB3_6: # Parent Loop BB3_4 Depth=1
# => This Inner Loop Header: Depth=2
movss (%r14,%r15,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $.L.str.21, %edi
movb $1, %al
callq printf
incq %r15
cmpq %r15, %r12
jne .LBB3_6
jmp .LBB3_7
.LBB3_8: # %.loopexit
addq $24, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end3:
.size _Z10showMatrixPfii, .Lfunc_end3-_Z10showMatrixPfii
.cfi_endproc
# -- End function
.globl _Z12matrixMulCPUPfS_S_iii # -- Begin function _Z12matrixMulCPUPfS_S_iii
.p2align 4, 0x90
.type _Z12matrixMulCPUPfS_S_iii,@function
_Z12matrixMulCPUPfS_S_iii: # @_Z12matrixMulCPUPfS_S_iii
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rdx, -8(%rsp) # 8-byte Spill
movq %rsi, -16(%rsp) # 8-byte Spill
movq %rdi, -24(%rsp) # 8-byte Spill
testl %ecx, %ecx
jle .LBB4_9
# %bb.1: # %.preheader27.lr.ph
movslq %r9d, %rdi
movl %ecx, %ecx
movl %edi, %r10d
movl %r8d, %r11d
leaq (,%rdi,4), %rbx
xorl %r14d, %r14d
xorl %r15d, %r15d
jmp .LBB4_2
.p2align 4, 0x90
.LBB4_8: # %._crit_edge31
# in Loop: Header=BB4_2 Depth=1
incq %r15
addl %r8d, %r14d
cmpq %rcx, %r15
je .LBB4_9
.LBB4_2: # %.preheader27
# =>This Loop Header: Depth=1
# Child Loop BB4_4 Depth 2
# Child Loop BB4_6 Depth 3
testl %r9d, %r9d
jle .LBB4_8
# %bb.3: # %.preheader.lr.ph
# in Loop: Header=BB4_2 Depth=1
movl %r14d, %eax
movq -24(%rsp), %rdx # 8-byte Reload
leaq (%rdx,%rax,4), %r12
movq %r15, %rax
imulq %rdi, %rax
movq -8(%rsp), %rdx # 8-byte Reload
leaq (%rdx,%rax,4), %r13
movq -16(%rsp), %rsi # 8-byte Reload
xorl %eax, %eax
jmp .LBB4_4
.p2align 4, 0x90
.LBB4_7: # %._crit_edge
# in Loop: Header=BB4_4 Depth=2
movss %xmm0, (%r13,%rax,4)
incq %rax
addq $4, %rsi
cmpq %r10, %rax
je .LBB4_8
.LBB4_4: # %.preheader
# Parent Loop BB4_2 Depth=1
# => This Loop Header: Depth=2
# Child Loop BB4_6 Depth 3
xorps %xmm0, %xmm0
testl %r8d, %r8d
jle .LBB4_7
# %bb.5: # %.lr.ph.preheader
# in Loop: Header=BB4_4 Depth=2
movq %rsi, %rbp
xorl %edx, %edx
.p2align 4, 0x90
.LBB4_6: # %.lr.ph
# Parent Loop BB4_2 Depth=1
# Parent Loop BB4_4 Depth=2
# => This Inner Loop Header: Depth=3
movss (%r12,%rdx,4), %xmm1 # xmm1 = mem[0],zero,zero,zero
mulss (%rbp), %xmm1
addss %xmm1, %xmm0
incq %rdx
addq %rbx, %rbp
cmpq %rdx, %r11
jne .LBB4_6
jmp .LBB4_7
.LBB4_9: # %._crit_edge33
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end4:
.size _Z12matrixMulCPUPfS_S_iii, .Lfunc_end4-_Z12matrixMulCPUPfS_S_iii
.cfi_endproc
# -- End function
.globl _Z27__device_stub__matrixMulGPUPfS_S_iii # -- Begin function _Z27__device_stub__matrixMulGPUPfS_S_iii
.p2align 4, 0x90
.type _Z27__device_stub__matrixMulGPUPfS_S_iii,@function
_Z27__device_stub__matrixMulGPUPfS_S_iii: # @_Z27__device_stub__matrixMulGPUPfS_S_iii
.cfi_startproc
# %bb.0:
subq $152, %rsp
.cfi_def_cfa_offset 160
movq %rdi, 88(%rsp)
movq %rsi, 80(%rsp)
movq %rdx, 72(%rsp)
movl %ecx, 20(%rsp)
movl %r8d, 16(%rsp)
movl %r9d, 12(%rsp)
leaq 88(%rsp), %rax
movq %rax, 96(%rsp)
leaq 80(%rsp), %rax
movq %rax, 104(%rsp)
leaq 72(%rsp), %rax
movq %rax, 112(%rsp)
leaq 20(%rsp), %rax
movq %rax, 120(%rsp)
leaq 16(%rsp), %rax
movq %rax, 128(%rsp)
leaq 12(%rsp), %rax
movq %rax, 136(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z12matrixMulGPUPfS_S_iii, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $168, %rsp
.cfi_adjust_cfa_offset -168
retq
.Lfunc_end5:
.size _Z27__device_stub__matrixMulGPUPfS_S_iii, .Lfunc_end5-_Z27__device_stub__matrixMulGPUPfS_S_iii
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function _Z11resultCheckPfS_i
.LCPI6_0:
.quad 0x3eb0c6f7a0b5ed8d # double 9.9999999999999995E-7
.LCPI6_1:
.quad 0xbeb0c6f7a0b5ed8d # double -9.9999999999999995E-7
.text
.globl _Z11resultCheckPfS_i
.p2align 4, 0x90
.type _Z11resultCheckPfS_i,@function
_Z11resultCheckPfS_i: # @_Z11resultCheckPfS_i
.cfi_startproc
# %bb.0:
pushq %rbx
.cfi_def_cfa_offset 16
.cfi_offset %rbx, -16
testl %edx, %edx
setg %bl
jle .LBB6_8
# %bb.1: # %.lr.ph.preheader
movss (%rdi), %xmm0 # xmm0 = mem[0],zero,zero,zero
movss (%rsi), %xmm2 # xmm2 = mem[0],zero,zero,zero
movaps %xmm0, %xmm1
subss %xmm2, %xmm1
divss %xmm0, %xmm1
cvtss2sd %xmm1, %xmm1
ucomisd .LCPI6_0(%rip), %xmm1
ja .LBB6_6
# %bb.2: # %.lr.ph24.preheader
movl %edx, %eax
movl $1, %ecx
movsd .LCPI6_1(%rip), %xmm1 # xmm1 = mem[0],zero
movsd .LCPI6_0(%rip), %xmm3 # xmm3 = mem[0],zero
.p2align 4, 0x90
.LBB6_5: # %.lr.ph24
# =>This Inner Loop Header: Depth=1
subss %xmm0, %xmm2
divss %xmm0, %xmm2
xorps %xmm0, %xmm0
cvtss2sd %xmm2, %xmm0
ucomisd %xmm0, %xmm1
ja .LBB6_6
# %bb.3: # in Loop: Header=BB6_5 Depth=1
cmpq %rcx, %rax
je .LBB6_8
# %bb.4: # %.lr.ph
# in Loop: Header=BB6_5 Depth=1
seta %bl
movss (%rdi,%rcx,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
movss (%rsi,%rcx,4), %xmm2 # xmm2 = mem[0],zero,zero,zero
movaps %xmm0, %xmm4
subss %xmm2, %xmm4
divss %xmm0, %xmm4
cvtss2sd %xmm4, %xmm4
incq %rcx
ucomisd %xmm3, %xmm4
jbe .LBB6_5
.LBB6_6: # %._crit_edge
movl $.L.str.22, %edi
xorl %eax, %eax
callq printf
testb $1, %bl
je .LBB6_8
# %bb.7:
popq %rbx
.cfi_def_cfa_offset 8
retq
.LBB6_8: # %.critedge
.cfi_def_cfa_offset 16
movl $.L.str.23, %edi
xorl %eax, %eax
popq %rbx
.cfi_def_cfa_offset 8
jmp printf # TAILCALL
.Lfunc_end6:
.size _Z11resultCheckPfS_i, .Lfunc_end6-_Z11resultCheckPfS_i
.cfi_endproc
# -- End function
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function _Z12randGenerateii
.LCPI7_0:
.quad 0x41dfffffffc00000 # double 2147483647
.text
.globl _Z12randGenerateii
.p2align 4, 0x90
.type _Z12randGenerateii,@function
_Z12randGenerateii: # @_Z12randGenerateii
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %rbx
.cfi_def_cfa_offset 24
pushq %rax
.cfi_def_cfa_offset 32
.cfi_offset %rbx, -24
.cfi_offset %rbp, -16
movl %esi, %ebx
movl %edi, %ebp
callq rand
callq rand
cvtsi2sd %eax, %xmm0
divsd .LCPI7_0(%rip), %xmm0
subl %ebp, %ebx
cvtsi2sd %ebx, %xmm1
mulsd %xmm0, %xmm1
xorps %xmm0, %xmm0
cvtsi2sd %ebp, %xmm0
addsd %xmm1, %xmm0
cvtsd2ss %xmm0, %xmm0
addq $8, %rsp
.cfi_def_cfa_offset 24
popq %rbx
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end7:
.size _Z12randGenerateii, .Lfunc_end7-_Z12randGenerateii
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB8_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB8_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z12matrixMulGPUPfS_S_iii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end8:
.size __hip_module_ctor, .Lfunc_end8-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB9_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB9_2:
retq
.Lfunc_end9:
.size __hip_module_dtor, .Lfunc_end9-__hip_module_dtor
.cfi_endproc
# -- End function
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "\nApplication terminates."
.size .L.str, 25
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz "\nContinuing with j=%d, k=%d, l=%d"
.size .L.str.1, 34
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "\nDone initializing matrix A with size %d*%d and matrix B with %d*%d"
.size .L.str.2, 68
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "\nDone matrix multiplication with CPU"
.size .L.str.3, 37
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "\n%d microseconds used.\n"
.size .L.str.4, 24
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "\nDone allocating space in device."
.size .L.str.5, 34
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "\nDone copying memory from host to device"
.size .L.str.6, 41
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz "\nDone initializing block dimention and grid dimention."
.size .L.str.7, 55
.type _Z12matrixMulGPUPfS_S_iii,@object # @_Z12matrixMulGPUPfS_S_iii
.section .rodata,"a",@progbits
.globl _Z12matrixMulGPUPfS_S_iii
.p2align 3, 0x0
_Z12matrixMulGPUPfS_S_iii:
.quad _Z27__device_stub__matrixMulGPUPfS_S_iii
.size _Z12matrixMulGPUPfS_S_iii, 8
.type .L.str.8,@object # @.str.8
.section .rodata.str1.1,"aMS",@progbits,1
.L.str.8:
.asciz "\nDone matrix multiplication with GPU."
.size .L.str.8, 38
.type .L.str.9,@object # @.str.9
.L.str.9:
.asciz "--help"
.size .L.str.9, 7
.type .L.str.10,@object # @.str.10
.L.str.10:
.asciz "-h"
.size .L.str.10, 3
.type .L.str.11,@object # @.str.11
.L.str.11:
.asciz "?"
.size .L.str.11, 2
.type .L.str.16,@object # @.str.16
.L.str.16:
.asciz "\nNumber Of Arguments Passed: %d"
.size .L.str.16, 32
.type .L.str.17,@object # @.str.17
.L.str.17:
.asciz "\n----Following Are The Command Line Arguments Passed----"
.size .L.str.17, 57
.type .L.str.18,@object # @.str.18
.L.str.18:
.asciz "\nargv[%d]: %d"
.size .L.str.18, 14
.type .L.str.19,@object # @.str.19
.L.str.19:
.asciz "\nargv[%d] is invalid"
.size .L.str.19, 21
.type .L.str.21,@object # @.str.21
.L.str.21:
.asciz "%f\t"
.size .L.str.21, 4
.type .L.str.22,@object # @.str.22
.L.str.22:
.asciz "\nResult check: Error!!!! Didn't pass."
.size .L.str.22, 38
.type .L.str.23,@object # @.str.23
.L.str.23:
.asciz "\nResult check: ---PASS---."
.size .L.str.23, 27
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z12matrixMulGPUPfS_S_iii"
.size .L__unnamed_1, 26
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "\nError.\nWe need 3 parameters as input.\nYou can use '--help' for more details."
.size .Lstr, 78
.type .Lstr.1,@object # @str.1
.Lstr.1:
.asciz "\nWe need 3 parameters j,k,l which represents the two matrix's dimention."
.size .Lstr.1, 73
.type .Lstr.2,@object # @str.2
.Lstr.2:
.asciz "The first one with size j*k, and the second one's is k*l."
.size .Lstr.2, 58
.type .Lstr.3,@object # @str.3
.Lstr.3:
.asciz "j,k,l must be int type and greater than 0."
.size .Lstr.3, 43
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z27__device_stub__matrixMulGPUPfS_S_iii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z12matrixMulGPUPfS_S_iii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z12matrixMulGPUPfS_S_iii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R3, SR_CTAID.X ; /* 0x0000000000037919 */
/* 0x000e220000002500 */
/*0020*/ MOV R4, c[0x0][0x17c] ; /* 0x00005f0000047a02 */
/* 0x000fe20000000f00 */
/*0030*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*0040*/ HFMA2.MMA R9, -RZ, RZ, 0, 0 ; /* 0x00000000ff097435 */
/* 0x000fe200000001ff */
/*0050*/ S2R R16, SR_TID.X ; /* 0x0000000000107919 */
/* 0x000e220000002100 */
/*0060*/ ISETP.GE.AND P1, PT, R4, 0x1, PT ; /* 0x000000010400780c */
/* 0x000fc60003f26270 */
/*0070*/ S2R R5, SR_CTAID.Y ; /* 0x0000000000057919 */
/* 0x000e680000002600 */
/*0080*/ S2R R2, SR_TID.Y ; /* 0x0000000000027919 */
/* 0x000e620000002200 */
/*0090*/ IMAD R3, R3, c[0x0][0x0], R16 ; /* 0x0000000003037a24 */
/* 0x001fca00078e0210 */
/*00a0*/ ISETP.GE.AND P0, PT, R3, c[0x0][0x180], PT ; /* 0x0000600003007a0c */
/* 0x000fe20003f06270 */
/*00b0*/ IMAD R0, R5, c[0x0][0x4], R2 ; /* 0x0000010005007a24 */
/* 0x002fca00078e0202 */
/*00c0*/ ISETP.GE.OR P0, PT, R0, c[0x0][0x178], P0 ; /* 0x00005e0000007a0c */
/* 0x000fe20000706670 */
/*00d0*/ @!P1 BRA 0x4f0 ; /* 0x0000041000009947 */
/* 0x000fd80003800000 */
/*00e0*/ SHF.L.U32 R17, R2, 0x6, RZ ; /* 0x0000000602117819 */
/* 0x000fe400000006ff */
/*00f0*/ MOV R5, RZ ; /* 0x000000ff00057202 */
/* 0x000fe40000000f00 */
/*0100*/ MOV R18, RZ ; /* 0x000000ff00127202 */
/* 0x000fe40000000f00 */
/*0110*/ MOV R9, RZ ; /* 0x000000ff00097202 */
/* 0x000fe40000000f00 */
/*0120*/ LEA R19, R16, R17, 0x2 ; /* 0x0000001110137211 */
/* 0x000fe400078e10ff */
/*0130*/ IADD3 R7, R16, R5.reuse, RZ ; /* 0x0000000510077210 */
/* 0x080fe20007ffe0ff */
/*0140*/ HFMA2.MMA R8, -RZ, RZ, 0, 0 ; /* 0x00000000ff087435 */
/* 0x000fe200000001ff */
/*0150*/ IADD3 R10, R2, R5, RZ ; /* 0x00000005020a7210 */
/* 0x000fc40007ffe0ff */
/*0160*/ ISETP.GE.AND P2, PT, R7, c[0x0][0x17c], PT ; /* 0x00005f0007007a0c */
/* 0x000fe40003f46270 */
/*0170*/ ISETP.GE.AND P1, PT, R10, c[0x0][0x17c], PT ; /* 0x00005f000a007a0c */
/* 0x000fe40003f26270 */
/*0180*/ ISETP.GE.OR P2, PT, R0, c[0x0][0x178], P2 ; /* 0x00005e0000007a0c */
/* 0x000fe40001746670 */
/*0190*/ ISETP.GE.OR P1, PT, R3, c[0x0][0x180], P1 ; /* 0x0000600003007a0c */
/* 0x000fe40000f26670 */
/*01a0*/ MOV R20, RZ ; /* 0x000000ff00147202 */
/* 0x000fd20000000f00 */
/*01b0*/ @!P2 MOV R5, 0x4 ; /* 0x000000040005a802 */
/* 0x000fe20000000f00 */
/*01c0*/ @!P2 IMAD R4, R0, c[0x0][0x17c], R7 ; /* 0x00005f000004aa24 */
/* 0x000fe200078e0207 */
/*01d0*/ @!P1 MOV R11, 0x4 ; /* 0x00000004000b9802 */
/* 0x000fe20000000f00 */
/*01e0*/ @!P1 IMAD R10, R10, c[0x0][0x180], R3 ; /* 0x000060000a0a9a24 */
/* 0x000fe400078e0203 */
/*01f0*/ @!P2 IMAD.WIDE R4, R4, R5, c[0x0][0x160] ; /* 0x000058000404a625 */
/* 0x000fc800078e0205 */
/*0200*/ @!P1 IMAD.WIDE R10, R10, R11, c[0x0][0x168] ; /* 0x00005a000a0a9625 */
/* 0x000fe200078e020b */
/*0210*/ @!P2 LDG.E R8, [R4.64] ; /* 0x000000040408a981 */
/* 0x000ea8000c1e1900 */
/*0220*/ @!P1 LDG.E R20, [R10.64] ; /* 0x000000040a149981 */
/* 0x000ee2000c1e1900 */
/*0230*/ IADD3 R18, R18, 0x1, RZ ; /* 0x0000000112127810 */
/* 0x000fc60007ffe0ff */
/*0240*/ STS [R19], R8 ; /* 0x0000000813007388 */
/* 0x004fe80000000800 */
/*0250*/ STS [R19+0x400], R20 ; /* 0x0004001413007388 */
/* 0x008fe80000000800 */
/*0260*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fec0000010000 */
/*0270*/ LDS R23, [R16.X4+0x400] ; /* 0x0004000010177984 */
/* 0x000fe80000004800 */
/*0280*/ LDS.128 R12, [R17] ; /* 0x00000000110c7984 */
/* 0x000e280000000c00 */
/*0290*/ LDS R24, [R16.X4+0x440] ; /* 0x0004400010187984 */
/* 0x000e680000004800 */
/*02a0*/ LDS R25, [R16.X4+0x480] ; /* 0x0004800010197984 */
/* 0x000ea80000004800 */
/*02b0*/ LDS R26, [R16.X4+0x4c0] ; /* 0x0004c000101a7984 */
/* 0x000ee80000004800 */
/*02c0*/ LDS R27, [R16.X4+0x500] ; /* 0x00050000101b7984 */
/* 0x000fe80000004800 */
/*02d0*/ LDS.128 R4, [R17+0x10] ; /* 0x0000100011047984 */
/* 0x000f280000000c00 */
/*02e0*/ LDS R22, [R16.X4+0x540] ; /* 0x0005400010167984 */
/* 0x000f680000004800 */
/*02f0*/ LDS R21, [R16.X4+0x580] ; /* 0x0005800010157984 */
/* 0x000f680000004800 */
/*0300*/ LDS R20, [R16.X4+0x5c0] ; /* 0x0005c00010147984 */
/* 0x000f620000004800 */
/*0310*/ FFMA R12, R23, R12, R9 ; /* 0x0000000c170c7223 */
/* 0x001fc60000000009 */
/*0320*/ LDS R23, [R16.X4+0x600] ; /* 0x0006000010177984 */
/* 0x000fe20000004800 */
/*0330*/ FFMA R12, R24, R13, R12 ; /* 0x0000000d180c7223 */
/* 0x002fc6000000000c */
/*0340*/ LDS.128 R8, [R17+0x20] ; /* 0x0000200011087984 */
/* 0x000e220000000c00 */
/*0350*/ FFMA R12, R25, R14, R12 ; /* 0x0000000e190c7223 */
/* 0x004fc6000000000c */
/*0360*/ LDS R24, [R16.X4+0x640] ; /* 0x0006400010187984 */
/* 0x000e620000004800 */
/*0370*/ FFMA R12, R26, R15, R12 ; /* 0x0000000f1a0c7223 */
/* 0x008fc6000000000c */
/*0380*/ LDS R25, [R16.X4+0x680] ; /* 0x0006800010197984 */
/* 0x000ea20000004800 */
/*0390*/ FFMA R12, R27, R4, R12 ; /* 0x000000041b0c7223 */
/* 0x010fc6000000000c */
/*03a0*/ LDS R4, [R16.X4+0x6c0] ; /* 0x0006c00010047984 */
/* 0x000ee20000004800 */
/*03b0*/ FFMA R22, R22, R5, R12 ; /* 0x0000000516167223 */
/* 0x020fc6000000000c */
/*03c0*/ LDS R5, [R16.X4+0x700] ; /* 0x0007000010057984 */
/* 0x000fe20000004800 */
/*03d0*/ FFMA R26, R21, R6, R22 ; /* 0x00000006151a7223 */
/* 0x000fc60000000016 */
/*03e0*/ LDS.128 R12, [R17+0x30] ; /* 0x00003000110c7984 */
/* 0x000f220000000c00 */
/*03f0*/ FFMA R7, R20, R7, R26 ; /* 0x0000000714077223 */
/* 0x000fc6000000001a */
/*0400*/ LDS R22, [R16.X4+0x740] ; /* 0x0007400010167984 */
/* 0x000f680000004800 */
/*0410*/ LDS R21, [R16.X4+0x780] ; /* 0x0007800010157984 */
/* 0x000f680000004800 */
/*0420*/ LDS R6, [R16.X4+0x7c0] ; /* 0x0007c00010067984 */
/* 0x000f620000004800 */
/*0430*/ FFMA R7, R23, R8, R7 ; /* 0x0000000817077223 */
/* 0x001fc80000000007 */
/*0440*/ FFMA R7, R24, R9, R7 ; /* 0x0000000918077223 */
/* 0x002fc80000000007 */
/*0450*/ FFMA R7, R25, R10, R7 ; /* 0x0000000a19077223 */
/* 0x004fc80000000007 */
/*0460*/ FFMA R4, R4, R11, R7 ; /* 0x0000000b04047223 */
/* 0x008fc80000000007 */
/*0470*/ FFMA R4, R5, R12, R4 ; /* 0x0000000c05047223 */
/* 0x010fe20000000004 */
/*0480*/ SHF.L.U32 R5, R18, 0x4, RZ ; /* 0x0000000412057819 */
/* 0x000fc600000006ff */
/*0490*/ FFMA R4, R22, R13, R4 ; /* 0x0000000d16047223 */
/* 0x020fe20000000004 */
/*04a0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ; /* 0x0000000000007b1d */
/* 0x000fe20000010000 */
/*04b0*/ ISETP.GE.AND P1, PT, R5, c[0x0][0x17c], PT ; /* 0x00005f0005007a0c */
/* 0x000fe40003f26270 */
/*04c0*/ FFMA R4, R21, R14, R4 ; /* 0x0000000e15047223 */
/* 0x000fc80000000004 */
/*04d0*/ FFMA R9, R6, R15, R4 ; /* 0x0000000f06097223 */
/* 0x000fce0000000004 */
/*04e0*/ @!P1 BRA 0x130 ; /* 0xfffffc4000009947 */
/* 0x000fea000383ffff */
/*04f0*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0500*/ HFMA2.MMA R2, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff027435 */
/* 0x000fe200000001ff */
/*0510*/ IMAD R3, R0, c[0x0][0x180], R3 ; /* 0x0000600000037a24 */
/* 0x000fd200078e0203 */
/*0520*/ IMAD.WIDE R2, R3, R2, c[0x0][0x170] ; /* 0x00005c0003027625 */
/* 0x000fca00078e0202 */
/*0530*/ STG.E [R2.64], R9 ; /* 0x0000000902007986 */
/* 0x000fe2000c101904 */
/*0540*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0550*/ BRA 0x550; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0560*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0570*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0580*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0590*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*05f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12matrixMulGPUPfS_S_iii
.globl _Z12matrixMulGPUPfS_S_iii
.p2align 8
.type _Z12matrixMulGPUPfS_S_iii,@function
_Z12matrixMulGPUPfS_S_iii:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x34
s_load_b64 s[8:9], s[0:1], 0x18
s_load_b32 s3, s[0:1], 0x20
v_bfe_u32 v3, v0, 10, 10
v_and_b32_e32 v4, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s4, s2, 16
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[0:1], null, s15, s4, v[3:4]
v_mad_u64_u32 v[1:2], null, s14, s2, v[4:5]
s_cmp_lt_i32 s9, 1
v_cmp_gt_i32_e64 s2, s8, v0
s_delay_alu instid0(VALU_DEP_2)
v_cmp_gt_i32_e32 vcc_lo, s3, v1
s_cbranch_scc1 .LBB0_15
s_load_b128 s[4:7], s[0:1], 0x0
v_lshlrev_b32_e32 v2, 2, v4
v_dual_mov_b32 v10, 0 :: v_dual_lshlrev_b32 v7, 6, v3
v_mad_u64_u32 v[5:6], null, v0, s9, v[4:5]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_nc_u32_e32 v8, 0x400, v2
v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v9, v7, v2
v_cmp_le_i32_e64 s10, s3, v1
s_mov_b32 s13, 0
s_delay_alu instid0(VALU_DEP_3)
v_add_nc_u32_e32 v6, v8, v7
s_xor_b32 s11, s2, -1
s_mov_b32 s12, 0
.LBB0_2:
v_add_nc_u32_e32 v12, s13, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_le_i32_e64 s2, s9, v12
s_or_b32 s2, s11, s2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_saveexec_b32 s14, s2
s_xor_b32 s2, exec_lo, s14
s_cbranch_execz .LBB0_4
ds_store_b32 v9, v10
.LBB0_4:
s_and_not1_saveexec_b32 s14, s2
s_cbranch_execz .LBB0_6
v_add_nc_u32_e32 v12, s13, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v13, 31, v12
v_lshlrev_b64 v[12:13], 2, v[12:13]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v12, s2, s4, v12
v_add_co_ci_u32_e64 v13, s2, s5, v13, s2
global_load_b32 v12, v[12:13], off
s_waitcnt vmcnt(0)
ds_store_b32 v9, v12
.LBB0_6:
s_or_b32 exec_lo, exec_lo, s14
s_mov_b32 s14, 0
s_mov_b32 s2, s10
s_and_saveexec_b32 s15, vcc_lo
v_add_nc_u32_e32 v11, s13, v3
s_and_not1_b32 s13, s10, exec_lo
s_mov_b32 s14, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_le_i32_e64 s2, s9, v11
s_and_b32 s2, s2, exec_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 s2, s13, s2
s_or_b32 exec_lo, exec_lo, s15
s_and_saveexec_b32 s13, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_xor_b32 s2, exec_lo, s13
s_cbranch_execz .LBB0_10
s_and_not1_b32 s14, s14, exec_lo
ds_store_b32 v6, v10
.LBB0_10:
s_or_b32 exec_lo, exec_lo, s2
s_and_saveexec_b32 s13, s14
s_cbranch_execz .LBB0_12
v_mad_u64_u32 v[12:13], null, v11, s3, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v13, 31, v12
v_lshlrev_b64 v[12:13], 2, v[12:13]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v12, s2, s6, v12
v_add_co_ci_u32_e64 v13, s2, s7, v13, s2
global_load_b32 v12, v[12:13], off
s_waitcnt vmcnt(0)
ds_store_b32 v6, v12
.LBB0_12:
s_or_b32 exec_lo, exec_lo, s13
v_mov_b32_e32 v12, v8
s_mov_b32 s2, 0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB0_13:
v_add_nc_u32_e32 v13, s2, v7
s_add_i32 s2, s2, 4
ds_load_b32 v14, v12
ds_load_b32 v13, v13
v_add_nc_u32_e32 v12, 64, v12
s_cmp_eq_u32 s2, 64
s_waitcnt lgkmcnt(0)
v_fmac_f32_e32 v2, v13, v14
s_cbranch_scc0 .LBB0_13
s_add_i32 s12, s12, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_lshl_b32 s13, s12, 4
s_barrier
s_cmp_ge_i32 s13, s9
buffer_gl0_inv
s_cbranch_scc0 .LBB0_2
s_branch .LBB0_16
.LBB0_15:
v_mov_b32_e32 v2, 0
.LBB0_16:
v_cmp_gt_i32_e32 vcc_lo, s8, v0
v_cmp_gt_i32_e64 s2, s3, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s2, vcc_lo, s2
s_and_saveexec_b32 s4, s2
s_cbranch_execz .LBB0_18
s_load_b64 s[0:1], s[0:1], 0x10
v_mad_u64_u32 v[3:4], null, v0, s3, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v4, 31, v3
v_lshlrev_b64 v[0:1], 2, v[3:4]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v2, off
.LBB0_18:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z12matrixMulGPUPfS_S_iii
.amdhsa_group_segment_fixed_size 2048
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 296
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 15
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z12matrixMulGPUPfS_S_iii, .Lfunc_end0-_Z12matrixMulGPUPfS_S_iii
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 28
.size: 4
.value_kind: by_value
- .offset: 32
.size: 4
.value_kind: by_value
- .offset: 40
.size: 4
.value_kind: hidden_block_count_x
- .offset: 44
.size: 4
.value_kind: hidden_block_count_y
- .offset: 48
.size: 4
.value_kind: hidden_block_count_z
- .offset: 52
.size: 2
.value_kind: hidden_group_size_x
- .offset: 54
.size: 2
.value_kind: hidden_group_size_y
- .offset: 56
.size: 2
.value_kind: hidden_group_size_z
- .offset: 58
.size: 2
.value_kind: hidden_remainder_x
- .offset: 60
.size: 2
.value_kind: hidden_remainder_y
- .offset: 62
.size: 2
.value_kind: hidden_remainder_z
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 96
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 104
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 2048
.kernarg_segment_align: 8
.kernarg_segment_size: 296
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z12matrixMulGPUPfS_S_iii
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z12matrixMulGPUPfS_S_iii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 15
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <pthread.h>
const int N = 1 << 27;
__global__ void kernel(float *x, int n)
{
int tid = threadIdx.x + blockIdx.x * blockDim.x;
for (int i = tid; i < n; i += blockDim.x * gridDim.x) {
x[i] = sqrt(pow(3.14159,i));
}
}
void *thread(void *args)
{
int * thread_data = (int*) args;
const int num_streams = 8;
cudaStream_t streams[num_streams];
float *data[num_streams];
int deviceNum;
cudaError_t ret = cudaGetDeviceCount(&deviceNum);
ret = cudaSetDevice(*thread_data);
printf("device num: %d\n", *thread_data);
for (int i = 0; i < num_streams; i++) {
cudaStreamCreate(&streams[i]);
cudaError_t ret0 = cudaMalloc(&data[i], N * sizeof(float));
if (ret0 != cudaSuccess) {
printf("allocate failed\n");
return 0;
} else {
printf("%d MB\n", N*sizeof(float)/1024/1024);
}
// launch one worker kernel per stream
kernel<<<1, 64, 0, streams[i]>>>(data[i], N);
// launch a dummy kernel on the default stream
kernel<<<1, 1>>>(0, 0);
printf("finished stream syn %d\n", i);
}
printf("finished all stream %d\n");
cudaDeviceReset();
printf("finished device reset %d\n");
return 0;
}
int main() {
pthread_t threads[4];
int thread_data[4];
for(int t=0;t<4;t++){
printf("In main: creating thread %ld\n", t);
thread_data[t] = t;
int rc = pthread_create(&threads[t], NULL, thread, &thread_data[t]);
if (rc){
printf("ERROR; return code from pthread_create() is %d\n", rc);
exit(-1);
}
}
for(int i = 0; i < 4; i++)
pthread_join(threads[i], NULL);
/* Last thing that main() should do */
pthread_exit(NULL);
} | code for sm_80
Function : _Z6kernelPfi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R8, SR_CTAID.X ; /* 0x0000000000087919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R8, R8, c[0x0][0x0], R3 ; /* 0x0000000008087a24 */
/* 0x001fca00078e0203 */
/*0040*/ ISETP.GE.AND P0, PT, R8, c[0x0][0x168], PT ; /* 0x00005a0008007a0c */
/* 0x000fda0003f06270 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe40000000a00 */
/*0070*/ I2F.F64 R2, R8 ; /* 0x0000000800027312 */
/* 0x0000620000201c00 */
/*0080*/ BSSY B0, 0xc0 ; /* 0x0000003000007945 */
/* 0x000fe20003800000 */
/*0090*/ MOV R0, 0xb0 ; /* 0x000000b000007802 */
/* 0x000fcc0000000f00 */
/*00a0*/ CALL.REL.NOINC 0x6c0 ; /* 0x0000061000007944 */
/* 0x003fea0003c00000 */
/*00b0*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*00c0*/ DADD R4, R2, c[0x2][0x0] ; /* 0x0080000002047629 */
/* 0x000e620000000000 */
/*00d0*/ BSSY B0, 0x1f0 ; /* 0x0000011000007945 */
/* 0x000ff20003800000 */
/*00e0*/ LOP3.LUT R4, R5, 0x7ff00000, RZ, 0xc0, !PT ; /* 0x7ff0000005047812 */
/* 0x002fe200078ec0ff */
/*00f0*/ IMAD.MOV.U32 R5, RZ, RZ, R15 ; /* 0x000000ffff057224 */
/* 0x000fc600078e000f */
/*0100*/ ISETP.NE.AND P0, PT, R4, 0x7ff00000, PT ; /* 0x7ff000000400780c */
/* 0x000fe20003f05270 */
/*0110*/ IMAD.MOV.U32 R4, RZ, RZ, R14 ; /* 0x000000ffff047224 */
/* 0x000fd800078e000e */
/*0120*/ @P0 BRA 0x1e0 ; /* 0x000000b000000947 */
/* 0x000fea0003800000 */
/*0130*/ DSETP.GTU.AND P0, PT, |R2|, +INF , PT ; /* 0x7ff000000200742a */
/* 0x000e5c0003f0c200 */
/*0140*/ @P0 BRA 0x1d0 ; /* 0x0000008000000947 */
/* 0x002fea0003800000 */
/*0150*/ ISETP.NE.AND P0, PT, R2, RZ, PT ; /* 0x000000ff0200720c */
/* 0x000fe40003f05270 */
/*0160*/ LOP3.LUT R0, R3, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff03007812 */
/* 0x000fc800078ec0ff */
/*0170*/ ISETP.NE.OR P0, PT, R0, 0x7ff00000, P0 ; /* 0x7ff000000000780c */
/* 0x000fda0000705670 */
/*0180*/ @P0 BRA 0x1e0 ; /* 0x0000005000000947 */
/* 0x000fea0003800000 */
/*0190*/ ISETP.GE.AND P0, PT, R3, RZ, PT ; /* 0x000000ff0300720c */
/* 0x000fe20003f06270 */
/*01a0*/ IMAD.MOV.U32 R4, RZ, RZ, RZ ; /* 0x000000ffff047224 */
/* 0x000fc600078e00ff */
/*01b0*/ SEL R5, RZ, 0x7ff00000, !P0 ; /* 0x7ff00000ff057807 */
/* 0x000fe20004000000 */
/*01c0*/ BRA 0x1e0 ; /* 0x0000001000007947 */
/* 0x000fea0003800000 */
/*01d0*/ DADD R4, R2, c[0x2][0x0] ; /* 0x0080000002047629 */
/* 0x00028c0000000000 */
/*01e0*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*01f0*/ ISETP.NE.AND P0, PT, R8, RZ, PT ; /* 0x000000ff0800720c */
/* 0x000fe20003f05270 */
/*0200*/ IMAD.MOV.U32 R10, RZ, RZ, 0x0 ; /* 0x00000000ff0a7424 */
/* 0x000fe200078e00ff */
/*0210*/ BSSY B0, 0x360 ; /* 0x0000014000007945 */
/* 0x000fe20003800000 */
/*0220*/ IMAD.MOV.U32 R11, RZ, RZ, 0x3fd80000 ; /* 0x3fd80000ff0b7424 */
/* 0x000fe200078e00ff */
/*0230*/ FSEL R5, R5, 1.875, P0 ; /* 0x3ff0000005057808 */
/* 0x004fe40000000000 */
/*0240*/ FSEL R4, R4, RZ, P0 ; /* 0x000000ff04047208 */
/* 0x000fe40000000000 */
/*0250*/ MUFU.RSQ64H R3, R5 ; /* 0x0000000500037308 */
/* 0x002e620000001c00 */
/*0260*/ IADD3 R2, R5, -0x3500000, RZ ; /* 0xfcb0000005027810 */
/* 0x000fc80007ffe0ff */
/*0270*/ ISETP.GE.U32.AND P0, PT, R2, 0x7ca00000, PT ; /* 0x7ca000000200780c */
/* 0x000fe40003f06070 */
/*0280*/ DMUL R6, R2, R2 ; /* 0x0000000202067228 */
/* 0x002e4c0000000000 */
/*0290*/ DFMA R6, -R6, R4, 1 ; /* 0x3ff000000606742b */
/* 0x002e4c0000000104 */
/*02a0*/ DFMA R10, R6, R10, 0.5 ; /* 0x3fe00000060a742b */
/* 0x002fc8000000000a */
/*02b0*/ DMUL R6, R2, R6 ; /* 0x0000000602067228 */
/* 0x000e4c0000000000 */
/*02c0*/ DFMA R12, R10, R6, R2 ; /* 0x000000060a0c722b */
/* 0x003e0c0000000002 */
/*02d0*/ DMUL R14, R12, R4 ; /* 0x000000040c0e7228 */
/* 0x001e080000000000 */
/*02e0*/ IADD3 R11, R13, -0x100000, RZ ; /* 0xfff000000d0b7810 */
/* 0x000fe20007ffe0ff */
/*02f0*/ IMAD.MOV.U32 R10, RZ, RZ, R12 ; /* 0x000000ffff0a7224 */
/* 0x000fe200078e000c */
/*0300*/ DFMA R16, R14, -R14, R4 ; /* 0x8000000e0e10722b */
/* 0x001e0c0000000004 */
/*0310*/ DFMA R6, R16, R10, R14 ; /* 0x0000000a1006722b */
/* 0x001062000000000e */
/*0320*/ @!P0 BRA 0x350 ; /* 0x0000002000008947 */
/* 0x000fea0003800000 */
/*0330*/ MOV R0, 0x350 ; /* 0x0000035000007802 */
/* 0x000fca0000000f00 */
/*0340*/ CALL.REL.NOINC 0x3f0 ; /* 0x000000a000007944 */
/* 0x003fea0003c00000 */
/*0350*/ BSYNC B0 ; /* 0x0000000000007941 */
/* 0x000fea0003800000 */
/*0360*/ F2F.F32.F64 R7, R6 ; /* 0x0000000600077310 */
/* 0x002e620000301000 */
/*0370*/ MOV R3, 0x4 ; /* 0x0000000400037802 */
/* 0x000fe20000000f00 */
/*0380*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x0][0x0] ; /* 0x00000000ff057624 */
/* 0x001fc800078e00ff */
/*0390*/ IMAD.WIDE R2, R8, R3, c[0x0][0x160] ; /* 0x0000580008027625 */
/* 0x000fc800078e0203 */
/*03a0*/ IMAD R8, R5, c[0x0][0xc], R8 ; /* 0x0000030005087a24 */
/* 0x000fca00078e0208 */
/*03b0*/ ISETP.GE.AND P0, PT, R8, c[0x0][0x168], PT ; /* 0x00005a0008007a0c */
/* 0x000fe20003f06270 */
/*03c0*/ STG.E [R2.64], R7 ; /* 0x0000000702007986 */
/* 0x0021d8000c101904 */
/*03d0*/ @!P0 BRA 0x70 ; /* 0xfffffc9000008947 */
/* 0x001fea000383ffff */
/*03e0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*03f0*/ ISETP.GE.U32.AND P0, PT, R2, -0x3400000, PT ; /* 0xfcc000000200780c */
/* 0x000fe20003f06070 */
/*0400*/ BSSY B1, 0x670 ; /* 0x0000026000017945 */
/* 0x000fe20003800000 */
/*0410*/ IMAD.MOV.U32 R10, RZ, RZ, R12 ; /* 0x000000ffff0a7224 */
/* 0x000fe400078e000c */
/*0420*/ IMAD.MOV.U32 R2, RZ, RZ, R16 ; /* 0x000000ffff027224 */
/* 0x000fe400078e0010 */
/*0430*/ IMAD.MOV.U32 R3, RZ, RZ, R17 ; /* 0x000000ffff037224 */
/* 0x000fce00078e0011 */
/*0440*/ @!P0 BRA 0x4d0 ; /* 0x0000008000008947 */
/* 0x000fea0003800000 */
/*0450*/ DFMA.RM R2, R2, R10, R14 ; /* 0x0000000a0202722b */
/* 0x000e14000000400e */
/*0460*/ IADD3 R6, P0, R2, 0x1, RZ ; /* 0x0000000102067810 */
/* 0x001fca0007f1e0ff */
/*0470*/ IMAD.X R7, RZ, RZ, R3, P0 ; /* 0x000000ffff077224 */
/* 0x000fcc00000e0603 */
/*0480*/ DFMA.RP R4, -R2, R6, R4 ; /* 0x000000060204722b */
/* 0x000e0c0000008104 */
/*0490*/ DSETP.GT.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400722a */
/* 0x001e0c0003f04000 */
/*04a0*/ FSEL R2, R6, R2, P0 ; /* 0x0000000206027208 */
/* 0x001fe40000000000 */
/*04b0*/ FSEL R3, R7, R3, P0 ; /* 0x0000000307037208 */
/* 0x000fe20000000000 */
/*04c0*/ BRA 0x660 ; /* 0x0000019000007947 */
/* 0x000fea0003800000 */
/*04d0*/ DSETP.NE.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400722a */
/* 0x000e1c0003f05000 */
/*04e0*/ @!P0 BRA 0x650 ; /* 0x0000016000008947 */
/* 0x001fea0003800000 */
/*04f0*/ ISETP.GE.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720c */
/* 0x000fda0003f06270 */
/*0500*/ @!P0 IMAD.MOV.U32 R2, RZ, RZ, 0x0 ; /* 0x00000000ff028424 */
/* 0x000fe200078e00ff */
/*0510*/ @!P0 MOV R3, 0xfff80000 ; /* 0xfff8000000038802 */
/* 0x000fe20000000f00 */
/*0520*/ @!P0 BRA 0x660 ; /* 0x0000013000008947 */
/* 0x000fea0003800000 */
/*0530*/ ISETP.GT.AND P0, PT, R5, 0x7fefffff, PT ; /* 0x7fefffff0500780c */
/* 0x000fda0003f04270 */
/*0540*/ @P0 BRA 0x650 ; /* 0x0000010000000947 */
/* 0x000fea0003800000 */
/*0550*/ DMUL R2, R4, 8.11296384146066816958e+31 ; /* 0x4690000004027828 */
/* 0x0000620000000000 */
/*0560*/ IMAD.MOV.U32 R10, RZ, RZ, 0x0 ; /* 0x00000000ff0a7424 */
/* 0x000fe400078e00ff */
/*0570*/ IMAD.MOV.U32 R4, RZ, RZ, RZ ; /* 0x000000ffff047224 */
/* 0x001fe400078e00ff */
/*0580*/ IMAD.MOV.U32 R11, RZ, RZ, 0x3fd80000 ; /* 0x3fd80000ff0b7424 */
/* 0x000fe200078e00ff */
/*0590*/ MUFU.RSQ64H R5, R3 ; /* 0x0000000300057308 */
/* 0x002e260000001c00 */
/*05a0*/ DMUL R6, R4, R4 ; /* 0x0000000404067228 */
/* 0x001e0c0000000000 */
/*05b0*/ DFMA R6, R2, -R6, 1 ; /* 0x3ff000000206742b */
/* 0x001e0c0000000806 */
/*05c0*/ DFMA R10, R6, R10, 0.5 ; /* 0x3fe00000060a742b */
/* 0x001fc8000000000a */
/*05d0*/ DMUL R6, R4, R6 ; /* 0x0000000604067228 */
/* 0x000e0c0000000000 */
/*05e0*/ DFMA R6, R10, R6, R4 ; /* 0x000000060a06722b */
/* 0x001e0c0000000004 */
/*05f0*/ DMUL R4, R2, R6 ; /* 0x0000000602047228 */
/* 0x0010480000000000 */
/*0600*/ IADD3 R7, R7, -0x100000, RZ ; /* 0xfff0000007077810 */
/* 0x001fe40007ffe0ff */
/*0610*/ DFMA R10, R4, -R4, R2 ; /* 0x80000004040a722b */
/* 0x002e0c0000000002 */
/*0620*/ DFMA R2, R6, R10, R4 ; /* 0x0000000a0602722b */
/* 0x001e140000000004 */
/*0630*/ IADD3 R3, R3, -0x3500000, RZ ; /* 0xfcb0000003037810 */
/* 0x001fe20007ffe0ff */
/*0640*/ BRA 0x660 ; /* 0x0000001000007947 */
/* 0x000fea0003800000 */
/*0650*/ DADD R2, R4, R4 ; /* 0x0000000004027229 */
/* 0x00004c0000000004 */
/*0660*/ BSYNC B1 ; /* 0x0000000000017941 */
/* 0x000fea0003800000 */
/*0670*/ IMAD.MOV.U32 R6, RZ, RZ, R2 ; /* 0x000000ffff067224 */
/* 0x002fe400078e0002 */
/*0680*/ IMAD.MOV.U32 R7, RZ, RZ, R3 ; /* 0x000000ffff077224 */
/* 0x000fe200078e0003 */
/*0690*/ MOV R3, 0x0 ; /* 0x0000000000037802 */
/* 0x000fe20000000f00 */
/*06a0*/ IMAD.MOV.U32 R2, RZ, RZ, R0 ; /* 0x000000ffff027224 */
/* 0x000fc800078e0000 */
/*06b0*/ RET.REL.NODEC R2 0x0 ; /* 0xfffff94002007950 */
/* 0x000fea0003c3ffff */
/*06c0*/ MUFU.RCP64H R11, 1.785396575927734375 ; /* 0x3ffc90fc000b7908 */
/* 0x000e220000001800 */
/*06d0*/ IMAD.MOV.U32 R4, RZ, RZ, -0x7f23cc9 ; /* 0xf80dc337ff047424 */
/* 0x000fe400078e00ff */
/*06e0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x3ffc90fc ; /* 0x3ffc90fcff057424 */
/* 0x000fe400078e00ff */
/*06f0*/ IMAD.MOV.U32 R10, RZ, RZ, RZ ; /* 0x000000ffff0a7224 */
/* 0x000fe400078e00ff */
/*0700*/ IMAD.MOV.U32 R6, RZ, RZ, 0x7d2cafe2 ; /* 0x7d2cafe2ff067424 */
/* 0x000fe400078e00ff */
/*0710*/ IMAD.MOV.U32 R7, RZ, RZ, 0x3eb0f5ff ; /* 0x3eb0f5ffff077424 */
/* 0x000fe400078e00ff */
/*0720*/ IMAD.SHL.U32 R9, R3, 0x2, RZ ; /* 0x0000000203097824 */
/* 0x000fe200078e00ff */
/*0730*/ DFMA R4, R10, -R4, 1 ; /* 0x3ff000000a04742b */
/* 0x001e080000000804 */
/*0740*/ ISETP.GT.U32.AND P0, PT, R9, -0x2000001, PT ; /* 0xfdffffff0900780c */
/* 0x000fe40003f04070 */
/*0750*/ DFMA R4, R4, R4, R4 ; /* 0x000000040404722b */
/* 0x001e0c0000000004 */
/*0760*/ DFMA R10, R10, R4, R10 ; /* 0x000000040a0a722b */
/* 0x001e0c000000000a */
/*0770*/ DMUL R4, R10, c[0x2][0x8] ; /* 0x008002000a047a28 */
/* 0x001e0c0000000000 */
/*0780*/ DFMA R4, R10, c[0x2][0x8], R4 ; /* 0x008002000a047a2b */
/* 0x001e0c0000000004 */
/*0790*/ DMUL R12, R4, R4 ; /* 0x00000004040c7228 */
/* 0x001e080000000000 */
/*07a0*/ DADD R14, -R4, c[0x2][0x8] ; /* 0x00800200040e7629 */
/* 0x000e480000000100 */
/*07b0*/ DFMA R6, R12, R6, c[0x2][0x10] ; /* 0x008004000c06762b */
/* 0x001e080000000006 */
/*07c0*/ DADD R16, R14, R14 ; /* 0x000000000e107229 */
/* 0x002fc8000000000e */
/*07d0*/ DFMA R6, R12, R6, c[0x2][0x18] ; /* 0x008006000c06762b */
/* 0x001e080000000006 */
/*07e0*/ DMUL R14, R4, R4 ; /* 0x00000004040e7228 */
/* 0x000fc80000000000 */
/*07f0*/ DFMA R6, R12, R6, c[0x2][0x20] ; /* 0x008008000c06762b */
/* 0x001e080000000006 */
/*0800*/ DFMA R20, -R4, c[0x2][0x8], R16 ; /* 0x0080020004147a2b */
/* 0x000e480000000110 */
/*0810*/ DFMA R6, R12, R6, c[0x2][0x28] ; /* 0x00800a000c06762b */
/* 0x001e080000000006 */
/*0820*/ DMUL R10, R10, R20 ; /* 0x000000140a0a7228 */
/* 0x002fc80000000000 */
/*0830*/ DFMA R6, R12, R6, c[0x2][0x30] ; /* 0x00800c000c06762b */
/* 0x001e080000000006 */
/*0840*/ DFMA R16, R4, R4, -R14 ; /* 0x000000040410722b */
/* 0x000fc8000000080e */
/*0850*/ DFMA R18, R12, R6, c[0x2][0x38] ; /* 0x00800e000c12762b */
/* 0x001e0c0000000006 */
/*0860*/ DFMA R6, R12, R18, c[0x2][0x40] ; /* 0x008010000c06762b */
/* 0x001e0c0000000012 */
/*0870*/ DADD R22, -R6, c[0x2][0x40] ; /* 0x0080100006167629 */
/* 0x001e0c0000000100 */
/*0880*/ DFMA R22, R12, R18, R22 ; /* 0x000000120c16722b */
/* 0x001e080000000016 */
/*0890*/ DMUL R12, R4, R14 ; /* 0x0000000e040c7228 */
/* 0x000e480000000000 */
/*08a0*/ DADD R18, RZ, R22 ; /* 0x00000000ff127229 */
/* 0x001e080000000016 */
/*08b0*/ DFMA R20, R4, R14, -R12 ; /* 0x0000000e0414722b */
/* 0x002e48000000080c */
/*08c0*/ DADD R18, R18, c[0x2][0x48] ; /* 0x0080120012127629 */
/* 0x001e080000000000 */
/*08d0*/ DFMA R22, R10, R14, R20 ; /* 0x0000000e0a16722b */
/* 0x0023e40000000014 */
/*08e0*/ IADD3 R21, R11, 0x100000, RZ ; /* 0x001000000b157810 */
/* 0x002fe20007ffe0ff */
/*08f0*/ IMAD.MOV.U32 R20, RZ, RZ, R10 ; /* 0x000000ffff147224 */
/* 0x000fe200078e000a */
/*0900*/ DADD R14, R6, R18 ; /* 0x00000000060e7229 */
/* 0x001e0a0000000012 */
/*0910*/ DFMA R20, R4, R20, R16 ; /* 0x000000140414722b */
/* 0x000e480000000010 */
/*0920*/ DMUL R16, R14, R12 ; /* 0x0000000c0e107228 */
/* 0x001e080000000000 */
/*0930*/ DFMA R20, R4, R20, R22 ; /* 0x000000140414722b */
/* 0x002fc80000000016 */
/*0940*/ DADD R6, R6, -R14 ; /* 0x0000000006067229 */
/* 0x000e48000000080e */
/*0950*/ DFMA R22, R14, R12, -R16 ; /* 0x0000000c0e16722b */
/* 0x001e080000000810 */
/*0960*/ DADD R6, R18, R6 ; /* 0x0000000012067229 */
/* 0x0023e40000000006 */
/*0970*/ IMAD.MOV.U32 R18, RZ, RZ, 0x69ce2bdf ; /* 0x69ce2bdfff127424 */
/* 0x002fe400078e00ff */
/*0980*/ DFMA R20, R14, R20, R22 ; /* 0x000000140e14722b */
/* 0x0010620000000016 */
/*0990*/ IMAD.MOV.U32 R19, RZ, RZ, 0x3e5ade15 ; /* 0x3e5ade15ff137424 */
/* 0x000fe200078e00ff */
/*09a0*/ MOV R14, 0xfefa39ef ; /* 0xfefa39ef000e7802 */
/* 0x001fe20000000f00 */
/*09b0*/ IMAD.MOV.U32 R15, RZ, RZ, 0x3fe62e42 ; /* 0x3fe62e42ff0f7424 */
/* 0x000fc600078e00ff */
/*09c0*/ DFMA R20, R6, R12, R20 ; /* 0x0000000c0614722b */
/* 0x002e0c0000000014 */
/*09d0*/ DADD R12, R16, R20 ; /* 0x00000000100c7229 */
/* 0x001e0c0000000014 */
/*09e0*/ DADD R6, R4, R12 ; /* 0x0000000004067229 */
/* 0x001e08000000000c */
/*09f0*/ DADD R16, R16, -R12 ; /* 0x0000000010107229 */
/* 0x000e48000000080c */
/*0a00*/ DADD R4, R4, -R6 ; /* 0x0000000004047229 */
/* 0x001e080000000806 */
/*0a10*/ DADD R16, R20, R16 ; /* 0x0000000014107229 */
/* 0x002fc80000000010 */
/*0a20*/ DADD R4, R12, R4 ; /* 0x000000000c047229 */
/* 0x001e0c0000000004 */
/*0a30*/ DADD R4, R16, R4 ; /* 0x0000000010047229 */
/* 0x001e0c0000000004 */
/*0a40*/ DADD R10, R10, R4 ; /* 0x000000000a0a7229 */
/* 0x001e0c0000000004 */
/*0a50*/ DADD R12, R6, R10 ; /* 0x00000000060c7229 */
/* 0x001e0c000000000a */
/*0a60*/ DFMA R4, R14, 2, R12 ; /* 0x400000000e04782b */
/* 0x001e08000000000c */
/*0a70*/ DADD R6, R6, -R12 ; /* 0x0000000006067229 */
/* 0x000e48000000080c */
/*0a80*/ DFMA R14, R14, -2, R4 ; /* 0xc00000000e0e782b */
/* 0x001e080000000004 */
/*0a90*/ DADD R6, R10, R6 ; /* 0x000000000a067229 */
/* 0x0023e40000000006 */
/*0aa0*/ IMAD.MOV.U32 R10, RZ, RZ, 0x3b39803f ; /* 0x3b39803fff0a7424 */
/* 0x002fe400078e00ff */
/*0ab0*/ DADD R14, -R12, R14 ; /* 0x000000000c0e7229 */
/* 0x001e22000000010e */
/*0ac0*/ IMAD.MOV.U32 R11, RZ, RZ, 0x3c7abc9e ; /* 0x3c7abc9eff0b7424 */
/* 0x000fca00078e00ff */
/*0ad0*/ DADD R6, R6, -R14 ; /* 0x0000000006067229 */
/* 0x001064000000080e */
/*0ae0*/ LOP3.LUT R15, R3, 0xff0fffff, RZ, 0xc0, !PT ; /* 0xff0fffff030f7812 */
/* 0x001fe200078ec0ff */
/*0af0*/ IMAD.MOV.U32 R14, RZ, RZ, R2 ; /* 0x000000ffff0e7224 */
/* 0x000fc600078e0002 */
/*0b00*/ DFMA R6, R10, 2, R6 ; /* 0x400000000a06782b */
/* 0x002e220000000006 */
/*0b10*/ SEL R15, R15, R3, P0 ; /* 0x000000030f0f7207 */
/* 0x000fca0000000000 */
/*0b20*/ DADD R10, R4, R6 ; /* 0x00000000040a7229 */
/* 0x001e0c0000000006 */
/*0b30*/ DADD R12, R4, -R10 ; /* 0x00000000040c7229 */
/* 0x001e08000000080a */
/*0b40*/ DMUL R4, R10, R14 ; /* 0x0000000e0a047228 */
/* 0x000e480000000000 */
/*0b50*/ DADD R6, R6, R12 ; /* 0x0000000006067229 */
/* 0x0011e4000000000c */
/*0b60*/ IMAD.MOV.U32 R12, RZ, RZ, 0x652b82fe ; /* 0x652b82feff0c7424 */
/* 0x001fe200078e00ff */
/*0b70*/ MOV R13, 0x3ff71547 ; /* 0x3ff71547000d7802 */
/* 0x000fe20000000f00 */
/*0b80*/ DFMA R10, R10, R14, -R4 ; /* 0x0000000e0a0a722b */
/* 0x002e0c0000000804 */
/*0b90*/ DFMA R6, R6, R14, R10 ; /* 0x0000000e0606722b */
/* 0x001e0c000000000a */
/*0ba0*/ DADD R10, R4, R6 ; /* 0x00000000040a7229 */
/* 0x001e0c0000000006 */
/*0bb0*/ DFMA R12, R10, R12, 6.75539944105574400000e+15 ; /* 0x433800000a0c742b */
/* 0x001e08000000000c */
/*0bc0*/ FSETP.GEU.AND P0, PT, |R11|, 4.1917929649353027344, PT ; /* 0x4086232b0b00780b */
/* 0x000fe40003f0e200 */
/*0bd0*/ DADD R14, R12, -6.75539944105574400000e+15 ; /* 0xc33800000c0e7429 */
/* 0x001e0c0000000000 */
/*0be0*/ DFMA R16, R14, c[0x2][0x50], R10 ; /* 0x008014000e107a2b */
/* 0x001e0c000000000a */
/*0bf0*/ DFMA R14, R14, c[0x2][0x58], R16 ; /* 0x008016000e0e7a2b */
/* 0x001e0c0000000010 */
/*0c00*/ DFMA R16, R14, R18, c[0x2][0x60] ; /* 0x008018000e10762b */
/* 0x001e0c0000000012 */
/*0c10*/ DFMA R16, R14, R16, c[0x2][0x68] ; /* 0x00801a000e10762b */
/* 0x001e0c0000000010 */
/*0c20*/ DFMA R16, R14, R16, c[0x2][0x70] ; /* 0x00801c000e10762b */
/* 0x001e0c0000000010 */
/*0c30*/ DFMA R16, R14, R16, c[0x2][0x78] ; /* 0x00801e000e10762b */
/* 0x001e0c0000000010 */
/*0c40*/ DFMA R16, R14, R16, c[0x2][0x80] ; /* 0x008020000e10762b */
/* 0x001e0c0000000010 */
/*0c50*/ DFMA R16, R14, R16, c[0x2][0x88] ; /* 0x008022000e10762b */
/* 0x001e0c0000000010 */
/*0c60*/ DFMA R16, R14, R16, c[0x2][0x90] ; /* 0x008024000e10762b */
/* 0x001e0c0000000010 */
/*0c70*/ DFMA R16, R14, R16, c[0x2][0x98] ; /* 0x008026000e10762b */
/* 0x001e0c0000000010 */
/*0c80*/ DFMA R16, R14, R16, c[0x2][0xa0] ; /* 0x008028000e10762b */
/* 0x001e0c0000000010 */
/*0c90*/ DFMA R16, R14, R16, 1 ; /* 0x3ff000000e10742b */
/* 0x001e0c0000000010 */
/*0ca0*/ DFMA R16, R14, R16, 1 ; /* 0x3ff000000e10742b */
/* 0x001e140000000010 */
/*0cb0*/ IMAD R15, R12, 0x100000, R17 ; /* 0x001000000c0f7824 */
/* 0x001fe400078e0211 */
/*0cc0*/ IMAD.MOV.U32 R14, RZ, RZ, R16 ; /* 0x000000ffff0e7224 */
/* 0x000fe200078e0010 */
/*0cd0*/ @!P0 BRA 0xdb0 ; /* 0x000000d000008947 */
/* 0x000fea0003800000 */
/*0ce0*/ FSETP.GEU.AND P1, PT, |R11|, 4.2275390625, PT ; /* 0x408748000b00780b */
/* 0x000fe20003f2e200 */
/*0cf0*/ DADD R14, R10, +INF ; /* 0x7ff000000a0e7429 */
/* 0x000fc80000000000 */
/*0d00*/ DSETP.GEU.AND P0, PT, R10, RZ, PT ; /* 0x000000ff0a00722a */
/* 0x000e0c0003f0e000 */
/*0d10*/ FSEL R14, R14, RZ, P0 ; /* 0x000000ff0e0e7208 */
/* 0x001fe40000000000 */
/*0d20*/ @!P1 LEA.HI R9, R12, R12, RZ, 0x1 ; /* 0x0000000c0c099211 */
/* 0x000fe400078f08ff */
/*0d30*/ FSEL R15, R15, RZ, P0 ; /* 0x000000ff0f0f7208 */
/* 0x000fe40000000000 */
/*0d40*/ @!P1 SHF.R.S32.HI R9, RZ, 0x1, R9 ; /* 0x00000001ff099819 */
/* 0x000fc80000011409 */
/*0d50*/ @!P1 LEA R13, R9, R17, 0x14 ; /* 0x00000011090d9211 */
/* 0x000fe200078ea0ff */
/*0d60*/ @!P1 IMAD.IADD R12, R12, 0x1, -R9 ; /* 0x000000010c0c9824 */
/* 0x000fca00078e0a09 */
/*0d70*/ @!P1 LEA R17, R12, 0x3ff00000, 0x14 ; /* 0x3ff000000c119811 */
/* 0x000fe200078ea0ff */
/*0d80*/ @!P1 IMAD.MOV.U32 R12, RZ, RZ, R16 ; /* 0x000000ffff0c9224 */
/* 0x000fe400078e0010 */
/*0d90*/ @!P1 IMAD.MOV.U32 R16, RZ, RZ, RZ ; /* 0x000000ffff109224 */
/* 0x000fcc00078e00ff */
/*0da0*/ @!P1 DMUL R14, R12, R16 ; /* 0x000000100c0e9228 */
/* 0x0000540000000000 */
/*0db0*/ LOP3.LUT R9, R15, 0x7fffffff, RZ, 0xc0, !PT ; /* 0x7fffffff0f097812 */
/* 0x002fe200078ec0ff */
/*0dc0*/ DADD R4, R4, -R10 ; /* 0x0000000004047229 */
/* 0x000e46000000080a */
/*0dd0*/ ISETP.NE.AND P0, PT, R9, 0x7ff00000, PT ; /* 0x7ff000000900780c */
/* 0x000fc60003f05270 */
/*0de0*/ DADD R4, R6, R4 ; /* 0x0000000006047229 */
/* 0x002e620000000004 */
/*0df0*/ ISETP.EQ.AND P0, PT, R14, RZ, !P0 ; /* 0x000000ff0e00720c */
/* 0x000fda0004702270 */
/*0e00*/ @!P0 DFMA R14, R4, R14, R14 ; /* 0x0000000e040e822b */
/* 0x0022a4000000000e */
/*0e10*/ IMAD.MOV.U32 R4, RZ, RZ, R0 ; /* 0x000000ffff047224 */
/* 0x002fe400078e0000 */
/*0e20*/ IMAD.MOV.U32 R5, RZ, RZ, 0x0 ; /* 0x00000000ff057424 */
/* 0x000fc800078e00ff */
/*0e30*/ RET.REL.NODEC R4 0x0 ; /* 0xfffff1c004007950 */
/* 0x004fea0003c3ffff */
/*0e40*/ BRA 0xe40; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0e50*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0e60*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0e70*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0e80*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0e90*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ea0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0eb0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ec0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ed0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ee0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ef0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <pthread.h>
const int N = 1 << 27;
__global__ void kernel(float *x, int n)
{
int tid = threadIdx.x + blockIdx.x * blockDim.x;
for (int i = tid; i < n; i += blockDim.x * gridDim.x) {
x[i] = sqrt(pow(3.14159,i));
}
}
void *thread(void *args)
{
int * thread_data = (int*) args;
const int num_streams = 8;
cudaStream_t streams[num_streams];
float *data[num_streams];
int deviceNum;
cudaError_t ret = cudaGetDeviceCount(&deviceNum);
ret = cudaSetDevice(*thread_data);
printf("device num: %d\n", *thread_data);
for (int i = 0; i < num_streams; i++) {
cudaStreamCreate(&streams[i]);
cudaError_t ret0 = cudaMalloc(&data[i], N * sizeof(float));
if (ret0 != cudaSuccess) {
printf("allocate failed\n");
return 0;
} else {
printf("%d MB\n", N*sizeof(float)/1024/1024);
}
// launch one worker kernel per stream
kernel<<<1, 64, 0, streams[i]>>>(data[i], N);
// launch a dummy kernel on the default stream
kernel<<<1, 1>>>(0, 0);
printf("finished stream syn %d\n", i);
}
printf("finished all stream %d\n");
cudaDeviceReset();
printf("finished device reset %d\n");
return 0;
}
int main() {
pthread_t threads[4];
int thread_data[4];
for(int t=0;t<4;t++){
printf("In main: creating thread %ld\n", t);
thread_data[t] = t;
int rc = pthread_create(&threads[t], NULL, thread, &thread_data[t]);
if (rc){
printf("ERROR; return code from pthread_create() is %d\n", rc);
exit(-1);
}
}
for(int i = 0; i < 4; i++)
pthread_join(threads[i], NULL);
/* Last thing that main() should do */
pthread_exit(NULL);
} | .file "tmpxft_00173385_00000000-6_defaultstream_devices.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2071:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2071:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "In main: creating thread %ld\n"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC1:
.string "ERROR; return code from pthread_create() is %d\n"
.text
.globl main
.type main, @function
main:
.LFB2068:
.cfi_startproc
endbr64
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
subq $64, %rsp
.cfi_def_cfa_offset 112
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
movq %rsp, %r12
movl $0, %ebp
leaq .LC0(%rip), %r14
leaq _Z6threadPv(%rip), %r13
.L5:
movl %ebp, %edx
movq %r14, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebp, (%r12)
leaq 16(%rsp), %rbx
leaq (%rbx,%rbp,8), %rdi
movq %r12, %rcx
movq %r13, %rdx
movl $0, %esi
call pthread_create@PLT
testl %eax, %eax
jne .L12
addq $1, %rbp
addq $4, %r12
cmpq $4, %rbp
jne .L5
leaq 32(%rbx), %rbp
.L6:
movq (%rbx), %rdi
movl $0, %esi
call pthread_join@PLT
addq $8, %rbx
cmpq %rbp, %rbx
jne .L6
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L13
movl $0, %edi
call pthread_exit@PLT
.L12:
movl %eax, %edx
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $-1, %edi
call exit@PLT
.L13:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2068:
.size main, .-main
.globl _Z26__device_stub__Z6kernelPfiPfi
.type _Z26__device_stub__Z6kernelPfiPfi, @function
_Z26__device_stub__Z6kernelPfiPfi:
.LFB2093:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movl %esi, 4(%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
leaq 4(%rsp), %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L18
.L14:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L19
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L18:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z6kernelPfi(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L14
.L19:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2093:
.size _Z26__device_stub__Z6kernelPfiPfi, .-_Z26__device_stub__Z6kernelPfiPfi
.globl _Z6kernelPfi
.type _Z6kernelPfi, @function
_Z6kernelPfi:
.LFB2094:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z26__device_stub__Z6kernelPfiPfi
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2094:
.size _Z6kernelPfi, .-_Z6kernelPfi
.section .rodata.str1.1
.LC2:
.string "device num: %d\n"
.LC3:
.string "allocate failed\n"
.LC4:
.string "%d MB\n"
.LC5:
.string "finished stream syn %d\n"
.LC6:
.string "finished all stream %d\n"
.LC7:
.string "finished device reset %d\n"
.text
.globl _Z6threadPv
.type _Z6threadPv, @function
_Z6threadPv:
.LFB2067:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $184, %rsp
.cfi_def_cfa_offset 240
movq %rdi, %rbx
movq %fs:40, %rax
movq %rax, 168(%rsp)
xorl %eax, %eax
leaq 4(%rsp), %rdi
call cudaGetDeviceCount@PLT
movl (%rbx), %edi
call cudaSetDevice@PLT
movl (%rbx), %edx
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq 32(%rsp), %rbp
movl $0, %ebx
leaq 96(%rsp), %r13
leaq .LC4(%rip), %r15
leaq .LC5(%rip), %r14
jmp .L27
.L32:
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
jmp .L24
.L33:
movq 0(%r13,%rbx,8), %rdi
movl $134217728, %esi
call _Z26__device_stub__Z6kernelPfiPfi
jmp .L25
.L26:
movl %r12d, %edx
movq %r14, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $1, %rbx
addq $8, %rbp
cmpq $8, %rbx
je .L31
.L27:
movl %ebx, %r12d
movq %rbp, %rdi
call cudaStreamCreate@PLT
leaq 0(%r13,%rbx,8), %rdi
movl $536870912, %esi
call cudaMalloc@PLT
testl %eax, %eax
jne .L32
movl $512, %edx
movq %r15, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $64, 20(%rsp)
movl $1, 24(%rsp)
movl $1, 28(%rsp)
movl $1, 8(%rsp)
movl $1, 12(%rsp)
movl $1, 16(%rsp)
movq 0(%rbp), %r9
movl $0, %r8d
movq 20(%rsp), %rdx
movl $1, %ecx
movq 8(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L33
.L25:
movl $1, 20(%rsp)
movl $1, 24(%rsp)
movl $1, 28(%rsp)
movl $1, 8(%rsp)
movl $1, 12(%rsp)
movl $1, 16(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 20(%rsp), %rdx
movl $1, %ecx
movq 8(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
jne .L26
movl $0, %esi
movl $0, %edi
call _Z26__device_stub__Z6kernelPfiPfi
jmp .L26
.L31:
leaq .LC6(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
call cudaDeviceReset@PLT
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
.L24:
movq 168(%rsp), %rax
subq %fs:40, %rax
jne .L34
movl $0, %eax
addq $184, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L34:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2067:
.size _Z6threadPv, .-_Z6threadPv
.section .rodata.str1.1
.LC8:
.string "_Z6kernelPfi"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2096:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC8(%rip), %rdx
movq %rdx, %rcx
leaq _Z6kernelPfi(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2096:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <pthread.h>
const int N = 1 << 27;
__global__ void kernel(float *x, int n)
{
int tid = threadIdx.x + blockIdx.x * blockDim.x;
for (int i = tid; i < n; i += blockDim.x * gridDim.x) {
x[i] = sqrt(pow(3.14159,i));
}
}
void *thread(void *args)
{
int * thread_data = (int*) args;
const int num_streams = 8;
cudaStream_t streams[num_streams];
float *data[num_streams];
int deviceNum;
cudaError_t ret = cudaGetDeviceCount(&deviceNum);
ret = cudaSetDevice(*thread_data);
printf("device num: %d\n", *thread_data);
for (int i = 0; i < num_streams; i++) {
cudaStreamCreate(&streams[i]);
cudaError_t ret0 = cudaMalloc(&data[i], N * sizeof(float));
if (ret0 != cudaSuccess) {
printf("allocate failed\n");
return 0;
} else {
printf("%d MB\n", N*sizeof(float)/1024/1024);
}
// launch one worker kernel per stream
kernel<<<1, 64, 0, streams[i]>>>(data[i], N);
// launch a dummy kernel on the default stream
kernel<<<1, 1>>>(0, 0);
printf("finished stream syn %d\n", i);
}
printf("finished all stream %d\n");
cudaDeviceReset();
printf("finished device reset %d\n");
return 0;
}
int main() {
pthread_t threads[4];
int thread_data[4];
for(int t=0;t<4;t++){
printf("In main: creating thread %ld\n", t);
thread_data[t] = t;
int rc = pthread_create(&threads[t], NULL, thread, &thread_data[t]);
if (rc){
printf("ERROR; return code from pthread_create() is %d\n", rc);
exit(-1);
}
}
for(int i = 0; i < 4; i++)
pthread_join(threads[i], NULL);
/* Last thing that main() should do */
pthread_exit(NULL);
} | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <pthread.h>
const int N = 1 << 27;
__global__ void kernel(float *x, int n)
{
int tid = threadIdx.x + blockIdx.x * blockDim.x;
for (int i = tid; i < n; i += blockDim.x * gridDim.x) {
x[i] = sqrt(pow(3.14159,i));
}
}
void *thread(void *args)
{
int * thread_data = (int*) args;
const int num_streams = 8;
hipStream_t streams[num_streams];
float *data[num_streams];
int deviceNum;
hipError_t ret = hipGetDeviceCount(&deviceNum);
ret = hipSetDevice(*thread_data);
printf("device num: %d\n", *thread_data);
for (int i = 0; i < num_streams; i++) {
hipStreamCreate(&streams[i]);
hipError_t ret0 = hipMalloc(&data[i], N * sizeof(float));
if (ret0 != hipSuccess) {
printf("allocate failed\n");
return 0;
} else {
printf("%d MB\n", N*sizeof(float)/1024/1024);
}
// launch one worker kernel per stream
kernel<<<1, 64, 0, streams[i]>>>(data[i], N);
// launch a dummy kernel on the default stream
kernel<<<1, 1>>>(0, 0);
printf("finished stream syn %d\n", i);
}
printf("finished all stream %d\n");
hipDeviceReset();
printf("finished device reset %d\n");
return 0;
}
int main() {
pthread_t threads[4];
int thread_data[4];
for(int t=0;t<4;t++){
printf("In main: creating thread %ld\n", t);
thread_data[t] = t;
int rc = pthread_create(&threads[t], NULL, thread, &thread_data[t]);
if (rc){
printf("ERROR; return code from pthread_create() is %d\n", rc);
exit(-1);
}
}
for(int i = 0; i < 4; i++)
pthread_join(threads[i], NULL);
/* Last thing that main() should do */
pthread_exit(NULL);
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <pthread.h>
const int N = 1 << 27;
__global__ void kernel(float *x, int n)
{
int tid = threadIdx.x + blockIdx.x * blockDim.x;
for (int i = tid; i < n; i += blockDim.x * gridDim.x) {
x[i] = sqrt(pow(3.14159,i));
}
}
void *thread(void *args)
{
int * thread_data = (int*) args;
const int num_streams = 8;
hipStream_t streams[num_streams];
float *data[num_streams];
int deviceNum;
hipError_t ret = hipGetDeviceCount(&deviceNum);
ret = hipSetDevice(*thread_data);
printf("device num: %d\n", *thread_data);
for (int i = 0; i < num_streams; i++) {
hipStreamCreate(&streams[i]);
hipError_t ret0 = hipMalloc(&data[i], N * sizeof(float));
if (ret0 != hipSuccess) {
printf("allocate failed\n");
return 0;
} else {
printf("%d MB\n", N*sizeof(float)/1024/1024);
}
// launch one worker kernel per stream
kernel<<<1, 64, 0, streams[i]>>>(data[i], N);
// launch a dummy kernel on the default stream
kernel<<<1, 1>>>(0, 0);
printf("finished stream syn %d\n", i);
}
printf("finished all stream %d\n");
hipDeviceReset();
printf("finished device reset %d\n");
return 0;
}
int main() {
pthread_t threads[4];
int thread_data[4];
for(int t=0;t<4;t++){
printf("In main: creating thread %ld\n", t);
thread_data[t] = t;
int rc = pthread_create(&threads[t], NULL, thread, &thread_data[t]);
if (rc){
printf("ERROR; return code from pthread_create() is %d\n", rc);
exit(-1);
}
}
for(int i = 0; i < 4; i++)
pthread_join(threads[i], NULL);
/* Last thing that main() should do */
pthread_exit(NULL);
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6kernelPfi
.globl _Z6kernelPfi
.p2align 8
.type _Z6kernelPfi,@function
_Z6kernelPfi:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x1c
s_load_b32 s33, s[0:1], 0x8
s_add_u32 s2, s0, 16
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s20, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s20, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s33, v1
s_cbranch_execz .LBB0_3
s_load_b32 s61, s[2:3], 0x0
s_load_b64 s[2:3], s[0:1], 0x0
v_mov_b32_e32 v0, 0x3ff00000
s_mov_b32 s60, 0
s_mov_b32 s5, 0x3fe55555
s_mov_b32 s4, 0x55555555
s_mov_b32 s7, 0x3fba6564
s_mov_b32 s6, 0x968915a9
s_mov_b32 s9, 0x3fbdee67
s_mov_b32 s8, 0x4222de17
s_mov_b32 s11, 0x3fbe25e4
s_mov_b32 s10, 0x3abe935a
s_mov_b32 s13, 0x3fc110ef
s_mov_b32 s12, 0x47e6c9c2
s_mov_b32 s15, 0x3fc3b13b
s_mov_b32 s14, 0xcfa74449
s_mov_b32 s17, 0x3fc745d1
s_mov_b32 s16, 0x71bf3c30
s_mov_b32 s19, 0x3fcc71c7
s_mov_b32 s18, 0x1c7792ce
s_waitcnt lgkmcnt(0)
s_mul_i32 s61, s61, s20
s_mov_b32 s21, 0x3fd24924
s_mov_b32 s20, 0x924920da
s_mov_b32 s23, 0x3fd99999
s_mov_b32 s22, 0x9999999c
s_mov_b32 s25, 0x3fe62e42
s_mov_b32 s24, 0xfefa39ef
s_mov_b32 s27, 0x3c7abc9e
s_mov_b32 s26, 0x3b39803f
s_mov_b32 s29, 0xbfe55555
s_mov_b32 s31, 0x3c8543b0
s_mov_b32 s30, 0xd5df274d
s_mov_b32 s35, 0x3ff71547
s_mov_b32 s34, 0x652b82fe
s_mov_b32 s37, 0xbfe62e42
s_mov_b32 s39, 0xbc7abc9e
s_mov_b32 s41, 0x3e928af3
s_mov_b32 s40, 0xfca7ab0c
s_mov_b32 s43, 0x3e5ade15
s_mov_b32 s42, 0x6a5dcb37
s_mov_b32 s45, 0x3ec71dee
s_mov_b32 s44, 0x623fde64
s_mov_b32 s47, 0x3efa0199
s_mov_b32 s46, 0x7c89e6b0
s_mov_b32 s49, 0x3f2a01a0
s_mov_b32 s48, 0x14761f6e
s_mov_b32 s51, 0x3f56c16c
s_mov_b32 s50, 0x1852b7b0
s_mov_b32 s53, 0x3f811111
s_mov_b32 s52, 0x11122322
s_mov_b32 s55, 0x3fa55555
s_mov_b32 s54, 0x555502a1
s_mov_b32 s57, 0x3fc55555
s_mov_b32 s56, 0x55555511
s_mov_b32 s59, 0x3fe00000
s_mov_b32 s58, 11
.LBB0_2:
v_cmp_eq_u32_e32 vcc_lo, 0, v1
s_mov_b32 s28, s4
s_mov_b32 s36, s24
s_mov_b32 s38, s26
v_cndmask_b32_e32 v3, 0x400921f9, v0, vcc_lo
v_cndmask_b32_e64 v2, 0xf01b866e, 0, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_frexp_mant_f64_e32 v[4:5], v[2:3]
v_cmp_gt_f64_e32 vcc_lo, s[4:5], v[4:5]
v_cndmask_b32_e64 v6, 0, 1, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ldexp_f64 v[4:5], v[4:5], v6
v_add_f64 v[6:7], v[4:5], 1.0
v_add_f64 v[12:13], v[4:5], -1.0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_rcp_f64_e32 v[8:9], v[6:7]
v_add_f64 v[14:15], v[6:7], -1.0
v_add_f64 v[4:5], v[4:5], -v[14:15]
s_waitcnt_depctr 0xfff
v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[8:9], v[10:11], v[8:9], v[8:9]
v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[8:9], v[10:11], v[8:9], v[8:9]
v_mul_f64 v[10:11], v[12:13], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[16:17], v[6:7], v[10:11]
v_fma_f64 v[6:7], v[10:11], v[6:7], -v[16:17]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[4:5], v[10:11], v[4:5], v[6:7]
v_add_f64 v[6:7], v[16:17], v[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_f64 v[14:15], v[12:13], -v[6:7]
v_add_f64 v[16:17], v[6:7], -v[16:17]
v_add_f64 v[12:13], v[12:13], -v[14:15]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[4:5], v[16:17], -v[4:5]
v_add_f64 v[6:7], v[12:13], -v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[4:5], v[4:5], v[6:7]
v_add_f64 v[4:5], v[14:15], v[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[4:5], v[8:9], v[4:5]
v_add_f64 v[6:7], v[10:11], v[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_f64 v[8:9], v[6:7], -v[10:11]
v_mul_f64 v[10:11], v[6:7], v[6:7]
v_add_f64 v[4:5], v[4:5], -v[8:9]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[8:9], v[6:7], v[6:7], -v[10:11]
v_add_f64 v[12:13], v[4:5], v[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[8:9], v[6:7], v[12:13], v[8:9]
v_add_f64 v[12:13], v[10:11], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_fma_f64 v[14:15], v[12:13], s[8:9], s[6:7]
v_add_f64 v[10:11], v[12:13], -v[10:11]
v_mul_f64 v[18:19], v[6:7], v[12:13]
v_fma_f64 v[14:15], v[12:13], v[14:15], s[10:11]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f64 v[8:9], v[8:9], -v[10:11]
v_fma_f64 v[22:23], v[12:13], v[6:7], -v[18:19]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[14:15], v[12:13], v[14:15], s[12:13]
v_fma_f64 v[14:15], v[12:13], v[14:15], s[14:15]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[14:15], v[12:13], v[14:15], s[16:17]
v_fma_f64 v[14:15], v[12:13], v[14:15], s[18:19]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[14:15], v[12:13], v[14:15], s[20:21]
v_fma_f64 v[14:15], v[12:13], v[14:15], s[22:23]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[16:17], v[12:13], v[14:15]
v_fma_f64 v[10:11], v[12:13], v[14:15], -v[16:17]
v_fma_f64 v[12:13], v[12:13], v[4:5], v[22:23]
v_ldexp_f64 v[4:5], v[4:5], 1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_fma_f64 v[10:11], v[8:9], v[14:15], v[10:11]
v_fma_f64 v[8:9], v[8:9], v[6:7], v[12:13]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[14:15], v[16:17], v[10:11]
v_add_f64 v[12:13], v[18:19], v[8:9]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_f64 v[20:21], v[14:15], s[4:5]
v_add_f64 v[16:17], v[14:15], -v[16:17]
v_add_f64 v[18:19], v[12:13], -v[18:19]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f64 v[24:25], v[20:21], s[28:29]
v_add_f64 v[10:11], v[10:11], -v[16:17]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f64 v[8:9], v[8:9], -v[18:19]
v_add_f64 v[14:15], v[14:15], -v[24:25]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[10:11], v[10:11], s[30:31]
v_add_f64 v[10:11], v[10:11], v[14:15]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[14:15], v[20:21], v[10:11]
v_add_f64 v[16:17], v[20:21], -v[14:15]
v_mul_f64 v[20:21], v[12:13], v[14:15]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[10:11], v[10:11], v[16:17]
v_fma_f64 v[16:17], v[12:13], v[14:15], -v[20:21]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], v[12:13], v[10:11], v[16:17]
v_fma_f64 v[8:9], v[8:9], v[14:15], v[10:11]
v_frexp_exp_i32_f64_e32 v10, v[2:3]
v_ldexp_f64 v[2:3], v[6:7], 1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f64 v[6:7], v[20:21], v[8:9]
v_subrev_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cvt_f64_i32_e32 v[10:11], v10
v_add_f64 v[12:13], v[2:3], v[6:7]
v_add_f64 v[14:15], v[6:7], -v[20:21]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_mul_f64 v[16:17], v[10:11], s[24:25]
v_add_f64 v[2:3], v[12:13], -v[2:3]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f64 v[8:9], v[8:9], -v[14:15]
v_fma_f64 v[14:15], v[10:11], s[24:25], -v[16:17]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f64 v[2:3], v[6:7], -v[2:3]
v_add_f64 v[4:5], v[4:5], v[8:9]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f64 v[6:7], v[10:11], s[26:27], v[14:15]
v_add_f64 v[2:3], v[4:5], v[2:3]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[4:5], v[16:17], v[6:7]
v_add_f64 v[8:9], v[12:13], v[2:3]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[16:17], v[4:5], -v[16:17]
v_add_f64 v[10:11], v[4:5], v[8:9]
v_add_f64 v[12:13], v[8:9], -v[12:13]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f64 v[6:7], v[6:7], -v[16:17]
v_add_f64 v[14:15], v[10:11], -v[4:5]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[2:3], v[2:3], -v[12:13]
v_add_f64 v[18:19], v[10:11], -v[14:15]
v_add_f64 v[8:9], v[8:9], -v[14:15]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f64 v[12:13], v[6:7], v[2:3]
v_add_f64 v[4:5], v[4:5], -v[18:19]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f64 v[4:5], v[8:9], v[4:5]
v_add_f64 v[8:9], v[12:13], -v[6:7]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[4:5], v[12:13], v[4:5]
v_add_f64 v[12:13], v[12:13], -v[8:9]
v_add_f64 v[2:3], v[2:3], -v[8:9]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_f64 v[14:15], v[10:11], v[4:5]
v_add_f64 v[6:7], v[6:7], -v[12:13]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_f64 v[8:9], v[14:15], -v[10:11]
v_add_f64 v[2:3], v[2:3], v[6:7]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[4:5], v[4:5], -v[8:9]
v_add_f64 v[2:3], v[2:3], v[4:5]
v_cvt_f64_i32_e32 v[4:5], v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[6:7], v[14:15], v[2:3]
v_add_f64 v[8:9], v[6:7], -v[14:15]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_f64 v[10:11], v[6:7], v[4:5]
v_add_f64 v[2:3], v[2:3], -v[8:9]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_fma_f64 v[6:7], v[4:5], v[6:7], -v[10:11]
v_cmp_class_f64_e64 vcc_lo, v[10:11], 0x204
v_fma_f64 v[2:3], v[4:5], v[2:3], v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f64 v[4:5], v[10:11], v[2:3]
v_dual_cndmask_b32 v7, v5, v11 :: v_dual_cndmask_b32 v6, v4, v10
v_add_f64 v[4:5], v[4:5], -v[10:11]
s_delay_alu instid0(VALU_DEP_2)
v_mul_f64 v[8:9], v[6:7], s[34:35]
v_cmp_nlt_f64_e64 s0, 0x40900000, v[6:7]
v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[6:7]|
v_cmp_ngt_f64_e64 s1, 0xc090cc00, v[6:7]
v_add_f64 v[2:3], v[2:3], -v[4:5]
v_rndne_f64_e32 v[8:9], v[8:9]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
v_dual_cndmask_b32 v3, 0, v3 :: v_dual_cndmask_b32 v2, 0, v2
s_and_b32 vcc_lo, s1, s0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_fma_f64 v[12:13], v[8:9], s[36:37], v[6:7]
v_cvt_i32_f64_e32 v16, v[8:9]
v_fma_f64 v[12:13], v[8:9], s[38:39], v[12:13]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[14:15], v[12:13], s[42:43], s[40:41]
v_fma_f64 v[14:15], v[12:13], v[14:15], s[44:45]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[14:15], v[12:13], v[14:15], s[46:47]
v_fma_f64 v[14:15], v[12:13], v[14:15], s[48:49]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[14:15], v[12:13], v[14:15], s[50:51]
v_fma_f64 v[14:15], v[12:13], v[14:15], s[52:53]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[14:15], v[12:13], v[14:15], s[54:55]
v_fma_f64 v[14:15], v[12:13], v[14:15], s[56:57]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[14:15], v[12:13], v[14:15], s[58:59]
v_fma_f64 v[14:15], v[12:13], v[14:15], 1.0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[8:9], v[12:13], v[14:15], 1.0
v_ldexp_f64 v[8:9], v[8:9], v16
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v4, 0x7ff00000, v9, s0
v_cndmask_b32_e64 v5, 0, v4, s1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v4, 0, v8, vcc_lo
v_fma_f64 v[2:3], v[4:5], v[2:3], v[4:5]
v_cmp_class_f64_e64 vcc_lo, v[4:5], 0x204
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_cndmask_b32 v3, v3, v5 :: v_dual_cndmask_b32 v2, v2, v4
v_cmp_gt_f64_e64 s0, 0x10000000, |v[2:3]|
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v4, 0, 1, s0
v_lshlrev_b32_e32 v4, 8, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ldexp_f64 v[2:3], |v[2:3]|, v4
v_rsq_f64_e32 v[4:5], v[2:3]
v_cmp_class_f64_e64 vcc_lo, v[2:3], 0x260
s_waitcnt_depctr 0xfff
v_mul_f64 v[6:7], v[2:3], v[4:5]
v_mul_f64 v[4:5], v[4:5], 0.5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[8:9], -v[4:5], v[6:7], 0.5
v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
v_fma_f64 v[4:5], v[4:5], v[8:9], v[4:5]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[8:9], -v[6:7], v[6:7], v[2:3]
v_fma_f64 v[6:7], v[8:9], v[4:5], v[6:7]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[8:9], -v[6:7], v[6:7], v[2:3]
v_fma_f64 v[4:5], v[8:9], v[4:5], v[6:7]
v_cndmask_b32_e64 v6, 0, 0xffffff80, s0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ldexp_f64 v[4:5], v[4:5], v6
v_dual_cndmask_b32 v3, v5, v3 :: v_dual_cndmask_b32 v2, v4, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cvt_f32_f64_e32 v4, v[2:3]
v_ashrrev_i32_e32 v2, 31, v1
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_add_nc_u32_e32 v1, s61, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cmp_le_i32_e32 vcc_lo, s33, v1
v_add_co_u32 v2, s0, s2, v2
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v3, s0, s3, v3, s0
s_or_b32 s60, vcc_lo, s60
global_store_b32 v[2:3], v4, off
s_and_not1_b32 exec_lo, exec_lo, s60
s_cbranch_execnz .LBB0_2
.LBB0_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z6kernelPfi
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 272
.amdhsa_user_sgpr_count 15
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 0
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 0
.amdhsa_next_free_vgpr 26
.amdhsa_next_free_sgpr 62
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z6kernelPfi, .Lfunc_end0-_Z6kernelPfi
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .offset: 8
.size: 4
.value_kind: by_value
- .offset: 16
.size: 4
.value_kind: hidden_block_count_x
- .offset: 20
.size: 4
.value_kind: hidden_block_count_y
- .offset: 24
.size: 4
.value_kind: hidden_block_count_z
- .offset: 28
.size: 2
.value_kind: hidden_group_size_x
- .offset: 30
.size: 2
.value_kind: hidden_group_size_y
- .offset: 32
.size: 2
.value_kind: hidden_group_size_z
- .offset: 34
.size: 2
.value_kind: hidden_remainder_x
- .offset: 36
.size: 2
.value_kind: hidden_remainder_y
- .offset: 38
.size: 2
.value_kind: hidden_remainder_z
- .offset: 56
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 64
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 72
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 80
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 272
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z6kernelPfi
.private_segment_fixed_size: 0
.sgpr_count: 64
.sgpr_spill_count: 0
.symbol: _Z6kernelPfi.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 26
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
#include <pthread.h>
const int N = 1 << 27;
__global__ void kernel(float *x, int n)
{
int tid = threadIdx.x + blockIdx.x * blockDim.x;
for (int i = tid; i < n; i += blockDim.x * gridDim.x) {
x[i] = sqrt(pow(3.14159,i));
}
}
void *thread(void *args)
{
int * thread_data = (int*) args;
const int num_streams = 8;
hipStream_t streams[num_streams];
float *data[num_streams];
int deviceNum;
hipError_t ret = hipGetDeviceCount(&deviceNum);
ret = hipSetDevice(*thread_data);
printf("device num: %d\n", *thread_data);
for (int i = 0; i < num_streams; i++) {
hipStreamCreate(&streams[i]);
hipError_t ret0 = hipMalloc(&data[i], N * sizeof(float));
if (ret0 != hipSuccess) {
printf("allocate failed\n");
return 0;
} else {
printf("%d MB\n", N*sizeof(float)/1024/1024);
}
// launch one worker kernel per stream
kernel<<<1, 64, 0, streams[i]>>>(data[i], N);
// launch a dummy kernel on the default stream
kernel<<<1, 1>>>(0, 0);
printf("finished stream syn %d\n", i);
}
printf("finished all stream %d\n");
hipDeviceReset();
printf("finished device reset %d\n");
return 0;
}
int main() {
pthread_t threads[4];
int thread_data[4];
for(int t=0;t<4;t++){
printf("In main: creating thread %ld\n", t);
thread_data[t] = t;
int rc = pthread_create(&threads[t], NULL, thread, &thread_data[t]);
if (rc){
printf("ERROR; return code from pthread_create() is %d\n", rc);
exit(-1);
}
}
for(int i = 0; i < 4; i++)
pthread_join(threads[i], NULL);
/* Last thing that main() should do */
pthread_exit(NULL);
} | .text
.file "defaultstream_devices.hip"
.globl _Z21__device_stub__kernelPfi # -- Begin function _Z21__device_stub__kernelPfi
.p2align 4, 0x90
.type _Z21__device_stub__kernelPfi,@function
_Z21__device_stub__kernelPfi: # @_Z21__device_stub__kernelPfi
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movl %esi, 4(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 4(%rsp), %rax
movq %rax, 72(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z6kernelPfi, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z21__device_stub__kernelPfi, .Lfunc_end0-_Z21__device_stub__kernelPfi
.cfi_endproc
# -- End function
.globl _Z6threadPv # -- Begin function _Z6threadPv
.p2align 4, 0x90
.type _Z6threadPv,@function
_Z6threadPv: # @_Z6threadPv
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $232, %rsp
.cfi_def_cfa_offset 288
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rdi, %r14
movabsq $4294967297, %rbx # imm = 0x100000001
leaq 92(%rsp), %rdi
callq hipGetDeviceCount
movl (%r14), %edi
callq hipSetDevice
movl (%r14), %esi
movl $.L.str, %edi
xorl %eax, %eax
callq printf
leaq 63(%rbx), %rax
movq %rax, 80(%rsp) # 8-byte Spill
xorl %r14d, %r14d
xorl %r12d, %r12d
.p2align 4, 0x90
.LBB1_2: # =>This Inner Loop Header: Depth=1
leaq (%rsp,%r14), %r15
addq $160, %r15
movq %r15, %rdi
callq hipStreamCreate
leaq (%rsp,%r14), %rbp
addq $96, %rbp
movl $536870912, %esi # imm = 0x20000000
movq %rbp, %rdi
callq hipMalloc
movl %eax, %r13d
testl %eax, %eax
je .LBB1_4
# %bb.3: # in Loop: Header=BB1_2 Depth=1
movl $.Lstr, %edi
callq puts@PLT
jmp .LBB1_9
.p2align 4, 0x90
.LBB1_4: # in Loop: Header=BB1_2 Depth=1
movl $.L.str.2, %edi
movl $512, %esi # imm = 0x200
xorl %eax, %eax
callq printf
movq (%r15), %r9
movq %rbx, %rdi
movl $1, %esi
movq 80(%rsp), %rdx # 8-byte Reload
movl $1, %ecx
xorl %r8d, %r8d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_6
# %bb.5: # in Loop: Header=BB1_2 Depth=1
movq (%rbp), %rax
movq %rax, 56(%rsp)
movl $134217728, 4(%rsp) # imm = 0x8000000
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 4(%rsp), %rax
movq %rax, 72(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
movl $_Z6kernelPfi, %edi
leaq 64(%rsp), %r9
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_6: # in Loop: Header=BB1_2 Depth=1
movq %rbx, %rdi
movl $1, %esi
movq %rbx, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_8
# %bb.7: # in Loop: Header=BB1_2 Depth=1
movq $0, 56(%rsp)
movl $0, 4(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 4(%rsp), %rax
movq %rax, 72(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
movl $_Z6kernelPfi, %edi
leaq 64(%rsp), %r9
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_8: # in Loop: Header=BB1_2 Depth=1
movl $.L.str.3, %edi
movl %r12d, %esi
xorl %eax, %eax
callq printf
.LBB1_9: # in Loop: Header=BB1_2 Depth=1
testl %r13d, %r13d
jne .LBB1_11
# %bb.1: # in Loop: Header=BB1_2 Depth=1
incl %r12d
addq $8, %r14
cmpq $64, %r14
jne .LBB1_2
# %bb.10: # %.critedge
movl $.L.str.4, %edi
xorl %eax, %eax
callq printf
callq hipDeviceReset
movl $.L.str.5, %edi
xorl %eax, %eax
callq printf
.LBB1_11: # %.loopexit
xorl %eax, %eax
addq $232, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size _Z6threadPv, .Lfunc_end1-_Z6threadPv
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
subq $48, %rsp
.cfi_def_cfa_offset 80
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
leaq 16(%rsp), %rbx
movq %rsp, %r14
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB2_1: # =>This Inner Loop Header: Depth=1
movl $.L.str.6, %edi
movl %r15d, %esi
xorl %eax, %eax
callq printf
movl %r15d, (%r14)
movl $_Z6threadPv, %edx
movq %rbx, %rdi
xorl %esi, %esi
movq %r14, %rcx
callq pthread_create
testl %eax, %eax
jne .LBB2_6
# %bb.2: # in Loop: Header=BB2_1 Depth=1
incq %r15
addq $8, %rbx
addq $4, %r14
cmpq $4, %r15
jne .LBB2_1
# %bb.3: # %.preheader.preheader
xorl %ebx, %ebx
.p2align 4, 0x90
.LBB2_4: # %.preheader
# =>This Inner Loop Header: Depth=1
movq 16(%rsp,%rbx,8), %rdi
xorl %esi, %esi
callq pthread_join
incq %rbx
cmpq $4, %rbx
jne .LBB2_4
# %bb.5:
xorl %edi, %edi
callq pthread_exit
.LBB2_6:
movl $.L.str.7, %edi
movl %eax, %esi
xorl %eax, %eax
callq printf
movl $-1, %edi
callq exit
.Lfunc_end2:
.size main, .Lfunc_end2-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB3_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB3_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z6kernelPfi, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end3:
.size __hip_module_ctor, .Lfunc_end3-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB4_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB4_2:
retq
.Lfunc_end4:
.size __hip_module_dtor, .Lfunc_end4-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z6kernelPfi,@object # @_Z6kernelPfi
.section .rodata,"a",@progbits
.globl _Z6kernelPfi
.p2align 3, 0x0
_Z6kernelPfi:
.quad _Z21__device_stub__kernelPfi
.size _Z6kernelPfi, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "device num: %d\n"
.size .L.str, 16
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "%d MB\n"
.size .L.str.2, 7
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "finished stream syn %d\n"
.size .L.str.3, 24
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "finished all stream %d\n"
.size .L.str.4, 24
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "finished device reset %d\n"
.size .L.str.5, 26
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "In main: creating thread %ld\n"
.size .L.str.6, 30
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz "ERROR
.size .L.str.7, 48
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z6kernelPfi"
.size .L__unnamed_1, 13
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "allocate failed"
.size .Lstr, 16
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z21__device_stub__kernelPfi
.addrsig_sym _Z6threadPv
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z6kernelPfi
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00173385_00000000-6_defaultstream_devices.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2071:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2071:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "In main: creating thread %ld\n"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC1:
.string "ERROR; return code from pthread_create() is %d\n"
.text
.globl main
.type main, @function
main:
.LFB2068:
.cfi_startproc
endbr64
pushq %r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
pushq %r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
pushq %r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
pushq %rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
pushq %rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
subq $64, %rsp
.cfi_def_cfa_offset 112
movq %fs:40, %rax
movq %rax, 56(%rsp)
xorl %eax, %eax
movq %rsp, %r12
movl $0, %ebp
leaq .LC0(%rip), %r14
leaq _Z6threadPv(%rip), %r13
.L5:
movl %ebp, %edx
movq %r14, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl %ebp, (%r12)
leaq 16(%rsp), %rbx
leaq (%rbx,%rbp,8), %rdi
movq %r12, %rcx
movq %r13, %rdx
movl $0, %esi
call pthread_create@PLT
testl %eax, %eax
jne .L12
addq $1, %rbp
addq $4, %r12
cmpq $4, %rbp
jne .L5
leaq 32(%rbx), %rbp
.L6:
movq (%rbx), %rdi
movl $0, %esi
call pthread_join@PLT
addq $8, %rbx
cmpq %rbp, %rbx
jne .L6
movq 56(%rsp), %rax
subq %fs:40, %rax
jne .L13
movl $0, %edi
call pthread_exit@PLT
.L12:
movl %eax, %edx
leaq .LC1(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $-1, %edi
call exit@PLT
.L13:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2068:
.size main, .-main
.globl _Z26__device_stub__Z6kernelPfiPfi
.type _Z26__device_stub__Z6kernelPfiPfi, @function
_Z26__device_stub__Z6kernelPfiPfi:
.LFB2093:
.cfi_startproc
endbr64
subq $120, %rsp
.cfi_def_cfa_offset 128
movq %rdi, 8(%rsp)
movl %esi, 4(%rsp)
movq %fs:40, %rax
movq %rax, 104(%rsp)
xorl %eax, %eax
leaq 8(%rsp), %rax
movq %rax, 80(%rsp)
leaq 4(%rsp), %rax
movq %rax, 88(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
movl $1, 40(%rsp)
movl $1, 44(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
leaq 24(%rsp), %rcx
leaq 16(%rsp), %rdx
leaq 44(%rsp), %rsi
leaq 32(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L18
.L14:
movq 104(%rsp), %rax
subq %fs:40, %rax
jne .L19
addq $120, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L18:
.cfi_restore_state
pushq 24(%rsp)
.cfi_def_cfa_offset 136
pushq 24(%rsp)
.cfi_def_cfa_offset 144
leaq 96(%rsp), %r9
movq 60(%rsp), %rcx
movl 68(%rsp), %r8d
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
leaq _Z6kernelPfi(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 128
jmp .L14
.L19:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2093:
.size _Z26__device_stub__Z6kernelPfiPfi, .-_Z26__device_stub__Z6kernelPfiPfi
.globl _Z6kernelPfi
.type _Z6kernelPfi, @function
_Z6kernelPfi:
.LFB2094:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z26__device_stub__Z6kernelPfiPfi
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2094:
.size _Z6kernelPfi, .-_Z6kernelPfi
.section .rodata.str1.1
.LC2:
.string "device num: %d\n"
.LC3:
.string "allocate failed\n"
.LC4:
.string "%d MB\n"
.LC5:
.string "finished stream syn %d\n"
.LC6:
.string "finished all stream %d\n"
.LC7:
.string "finished device reset %d\n"
.text
.globl _Z6threadPv
.type _Z6threadPv, @function
_Z6threadPv:
.LFB2067:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $184, %rsp
.cfi_def_cfa_offset 240
movq %rdi, %rbx
movq %fs:40, %rax
movq %rax, 168(%rsp)
xorl %eax, %eax
leaq 4(%rsp), %rdi
call cudaGetDeviceCount@PLT
movl (%rbx), %edi
call cudaSetDevice@PLT
movl (%rbx), %edx
leaq .LC2(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
leaq 32(%rsp), %rbp
movl $0, %ebx
leaq 96(%rsp), %r13
leaq .LC4(%rip), %r15
leaq .LC5(%rip), %r14
jmp .L27
.L32:
leaq .LC3(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
jmp .L24
.L33:
movq 0(%r13,%rbx,8), %rdi
movl $134217728, %esi
call _Z26__device_stub__Z6kernelPfiPfi
jmp .L25
.L26:
movl %r12d, %edx
movq %r14, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
addq $1, %rbx
addq $8, %rbp
cmpq $8, %rbx
je .L31
.L27:
movl %ebx, %r12d
movq %rbp, %rdi
call cudaStreamCreate@PLT
leaq 0(%r13,%rbx,8), %rdi
movl $536870912, %esi
call cudaMalloc@PLT
testl %eax, %eax
jne .L32
movl $512, %edx
movq %r15, %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $64, 20(%rsp)
movl $1, 24(%rsp)
movl $1, 28(%rsp)
movl $1, 8(%rsp)
movl $1, 12(%rsp)
movl $1, 16(%rsp)
movq 0(%rbp), %r9
movl $0, %r8d
movq 20(%rsp), %rdx
movl $1, %ecx
movq 8(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L33
.L25:
movl $1, 20(%rsp)
movl $1, 24(%rsp)
movl $1, 28(%rsp)
movl $1, 8(%rsp)
movl $1, 12(%rsp)
movl $1, 16(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 20(%rsp), %rdx
movl $1, %ecx
movq 8(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
jne .L26
movl $0, %esi
movl $0, %edi
call _Z26__device_stub__Z6kernelPfiPfi
jmp .L26
.L31:
leaq .LC6(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
call cudaDeviceReset@PLT
leaq .LC7(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
.L24:
movq 168(%rsp), %rax
subq %fs:40, %rax
jne .L34
movl $0, %eax
addq $184, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L34:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2067:
.size _Z6threadPv, .-_Z6threadPv
.section .rodata.str1.1
.LC8:
.string "_Z6kernelPfi"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2096:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC8(%rip), %rdx
movq %rdx, %rcx
leaq _Z6kernelPfi(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2096:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "defaultstream_devices.hip"
.globl _Z21__device_stub__kernelPfi # -- Begin function _Z21__device_stub__kernelPfi
.p2align 4, 0x90
.type _Z21__device_stub__kernelPfi,@function
_Z21__device_stub__kernelPfi: # @_Z21__device_stub__kernelPfi
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %rdi, 56(%rsp)
movl %esi, 4(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 4(%rsp), %rax
movq %rax, 72(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
leaq 64(%rsp), %r9
movl $_Z6kernelPfi, %edi
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $104, %rsp
.cfi_adjust_cfa_offset -104
retq
.Lfunc_end0:
.size _Z21__device_stub__kernelPfi, .Lfunc_end0-_Z21__device_stub__kernelPfi
.cfi_endproc
# -- End function
.globl _Z6threadPv # -- Begin function _Z6threadPv
.p2align 4, 0x90
.type _Z6threadPv,@function
_Z6threadPv: # @_Z6threadPv
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $232, %rsp
.cfi_def_cfa_offset 288
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movq %rdi, %r14
movabsq $4294967297, %rbx # imm = 0x100000001
leaq 92(%rsp), %rdi
callq hipGetDeviceCount
movl (%r14), %edi
callq hipSetDevice
movl (%r14), %esi
movl $.L.str, %edi
xorl %eax, %eax
callq printf
leaq 63(%rbx), %rax
movq %rax, 80(%rsp) # 8-byte Spill
xorl %r14d, %r14d
xorl %r12d, %r12d
.p2align 4, 0x90
.LBB1_2: # =>This Inner Loop Header: Depth=1
leaq (%rsp,%r14), %r15
addq $160, %r15
movq %r15, %rdi
callq hipStreamCreate
leaq (%rsp,%r14), %rbp
addq $96, %rbp
movl $536870912, %esi # imm = 0x20000000
movq %rbp, %rdi
callq hipMalloc
movl %eax, %r13d
testl %eax, %eax
je .LBB1_4
# %bb.3: # in Loop: Header=BB1_2 Depth=1
movl $.Lstr, %edi
callq puts@PLT
jmp .LBB1_9
.p2align 4, 0x90
.LBB1_4: # in Loop: Header=BB1_2 Depth=1
movl $.L.str.2, %edi
movl $512, %esi # imm = 0x200
xorl %eax, %eax
callq printf
movq (%r15), %r9
movq %rbx, %rdi
movl $1, %esi
movq 80(%rsp), %rdx # 8-byte Reload
movl $1, %ecx
xorl %r8d, %r8d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_6
# %bb.5: # in Loop: Header=BB1_2 Depth=1
movq (%rbp), %rax
movq %rax, 56(%rsp)
movl $134217728, 4(%rsp) # imm = 0x8000000
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 4(%rsp), %rax
movq %rax, 72(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
movl $_Z6kernelPfi, %edi
leaq 64(%rsp), %r9
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_6: # in Loop: Header=BB1_2 Depth=1
movq %rbx, %rdi
movl $1, %esi
movq %rbx, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_8
# %bb.7: # in Loop: Header=BB1_2 Depth=1
movq $0, 56(%rsp)
movl $0, 4(%rsp)
leaq 56(%rsp), %rax
movq %rax, 64(%rsp)
leaq 4(%rsp), %rax
movq %rax, 72(%rsp)
leaq 40(%rsp), %rdi
leaq 24(%rsp), %rsi
leaq 16(%rsp), %rdx
leaq 8(%rsp), %rcx
callq __hipPopCallConfiguration
movq 40(%rsp), %rsi
movl 48(%rsp), %edx
movq 24(%rsp), %rcx
movl 32(%rsp), %r8d
movl $_Z6kernelPfi, %edi
leaq 64(%rsp), %r9
pushq 8(%rsp)
.cfi_adjust_cfa_offset 8
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_8: # in Loop: Header=BB1_2 Depth=1
movl $.L.str.3, %edi
movl %r12d, %esi
xorl %eax, %eax
callq printf
.LBB1_9: # in Loop: Header=BB1_2 Depth=1
testl %r13d, %r13d
jne .LBB1_11
# %bb.1: # in Loop: Header=BB1_2 Depth=1
incl %r12d
addq $8, %r14
cmpq $64, %r14
jne .LBB1_2
# %bb.10: # %.critedge
movl $.L.str.4, %edi
xorl %eax, %eax
callq printf
callq hipDeviceReset
movl $.L.str.5, %edi
xorl %eax, %eax
callq printf
.LBB1_11: # %.loopexit
xorl %eax, %eax
addq $232, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size _Z6threadPv, .Lfunc_end1-_Z6threadPv
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %r15
.cfi_def_cfa_offset 16
pushq %r14
.cfi_def_cfa_offset 24
pushq %rbx
.cfi_def_cfa_offset 32
subq $48, %rsp
.cfi_def_cfa_offset 80
.cfi_offset %rbx, -32
.cfi_offset %r14, -24
.cfi_offset %r15, -16
leaq 16(%rsp), %rbx
movq %rsp, %r14
xorl %r15d, %r15d
.p2align 4, 0x90
.LBB2_1: # =>This Inner Loop Header: Depth=1
movl $.L.str.6, %edi
movl %r15d, %esi
xorl %eax, %eax
callq printf
movl %r15d, (%r14)
movl $_Z6threadPv, %edx
movq %rbx, %rdi
xorl %esi, %esi
movq %r14, %rcx
callq pthread_create
testl %eax, %eax
jne .LBB2_6
# %bb.2: # in Loop: Header=BB2_1 Depth=1
incq %r15
addq $8, %rbx
addq $4, %r14
cmpq $4, %r15
jne .LBB2_1
# %bb.3: # %.preheader.preheader
xorl %ebx, %ebx
.p2align 4, 0x90
.LBB2_4: # %.preheader
# =>This Inner Loop Header: Depth=1
movq 16(%rsp,%rbx,8), %rdi
xorl %esi, %esi
callq pthread_join
incq %rbx
cmpq $4, %rbx
jne .LBB2_4
# %bb.5:
xorl %edi, %edi
callq pthread_exit
.LBB2_6:
movl $.L.str.7, %edi
movl %eax, %esi
xorl %eax, %eax
callq printf
movl $-1, %edi
callq exit
.Lfunc_end2:
.size main, .Lfunc_end2-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB3_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB3_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z6kernelPfi, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end3:
.size __hip_module_ctor, .Lfunc_end3-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB4_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB4_2:
retq
.Lfunc_end4:
.size __hip_module_dtor, .Lfunc_end4-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z6kernelPfi,@object # @_Z6kernelPfi
.section .rodata,"a",@progbits
.globl _Z6kernelPfi
.p2align 3, 0x0
_Z6kernelPfi:
.quad _Z21__device_stub__kernelPfi
.size _Z6kernelPfi, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "device num: %d\n"
.size .L.str, 16
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "%d MB\n"
.size .L.str.2, 7
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "finished stream syn %d\n"
.size .L.str.3, 24
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "finished all stream %d\n"
.size .L.str.4, 24
.type .L.str.5,@object # @.str.5
.L.str.5:
.asciz "finished device reset %d\n"
.size .L.str.5, 26
.type .L.str.6,@object # @.str.6
.L.str.6:
.asciz "In main: creating thread %ld\n"
.size .L.str.6, 30
.type .L.str.7,@object # @.str.7
.L.str.7:
.asciz "ERROR
.size .L.str.7, 48
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z6kernelPfi"
.size .L__unnamed_1, 13
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "allocate failed"
.size .Lstr, 16
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z21__device_stub__kernelPfi
.addrsig_sym _Z6threadPv
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z6kernelPfi
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <iostream>
#include <stdio.h>
#include <math.h>
using namespace std;
#define TILE_WIDTH 2
__global__ void MatrixMult(int m, int n, int k, float *a, float *b, float *c)
{
int row = threadIdx.y + blockIdx.y*blockDim.y;
int col = threadIdx.x + blockIdx.x*blockDim.x;
if((row < m) && (col < k))
{
float temp = 0.0;
for (int i = 0; i < n; ++i)
{
temp += a[row*n+i]*b[col+i*k];
}
c[row*k+col] = temp;
}
}
// main fn
int main(void)
{
int m = 4;
int n = 6;
int k = 7;
float* a = new float[m*n];
float* b = new float[n*k];
float* c = new float[m*k];
float *dev_a, *dev_b, *dev_c;
dim3 dimGrid((k-1)/TILE_WIDTH+1,(m-1)/TILE_WIDTH+1,1);
dim3 dimBlock(TILE_WIDTH,TILE_WIDTH,1);
cudaMalloc((void**)&dev_a, m*n*sizeof(float));
cudaMalloc((void**)&dev_b, n*k*sizeof(float));
cudaMalloc((void**)&dev_c, m*k*sizeof(float));
for (int i=0; i<m*n; i++)
{
a[i] = sin((float) i);
}
for (int i=0; i<n*k; i++)
{
b[i] = cos((float) i);
}
cudaMemcpy(dev_a, a, m*n*sizeof(float), cudaMemcpyHostToDevice);
cudaMemcpy(dev_b, b, n*k*sizeof(float), cudaMemcpyHostToDevice);
MatrixMult<<<dimGrid,dimBlock>>>(m,n,k,dev_a,dev_b,dev_c);
cudaMemcpy(c, dev_c, m*k*sizeof(float), cudaMemcpyDeviceToHost);
cout<<"a matrix: \n";
for (int i=0; i<m; i++)
{
for (int j=0; j<n; j++)
{
cout<<a[n*i+j]<<" ";
}
cout<<"\n";
}
cout<<"b matrix: \n";
for (int i=0; i<n; i++)
{
for (int j=0; j<k; j++)
{
cout<<b[k*i+j]<<" ";
}
cout<<"\n";
}
cout<<"c matrix: \n";
for (int i=0; i<m; i++)
{
for (int j=0; j<k; j++)
{
cout<<c[k*i+j]<<" ";
}
cout<<"\n";
}
cudaFree(dev_a);
cudaFree(dev_b);
cudaFree(dev_c);
delete [] a;
delete [] b;
delete [] c;
} | code for sm_80
Function : _Z10MatrixMultiiiPfS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0020*/ S2R R5, SR_TID.X ; /* 0x0000000000057919 */
/* 0x000e280000002100 */
/*0030*/ S2R R3, SR_CTAID.Y ; /* 0x0000000000037919 */
/* 0x000e680000002600 */
/*0040*/ S2R R2, SR_TID.Y ; /* 0x0000000000027919 */
/* 0x000e620000002200 */
/*0050*/ IMAD R0, R0, c[0x0][0x0], R5 ; /* 0x0000000000007a24 */
/* 0x001fca00078e0205 */
/*0060*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x168], PT ; /* 0x00005a0000007a0c */
/* 0x000fe20003f06270 */
/*0070*/ IMAD R3, R3, c[0x0][0x4], R2 ; /* 0x0000010003037a24 */
/* 0x002fca00078e0202 */
/*0080*/ ISETP.GE.OR P0, PT, R3, c[0x0][0x160], P0 ; /* 0x0000580003007a0c */
/* 0x000fda0000706670 */
/*0090*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*00a0*/ MOV R4, c[0x0][0x164] ; /* 0x0000590000047a02 */
/* 0x000fe20000000f00 */
/*00b0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*00c0*/ HFMA2.MMA R24, -RZ, RZ, 0, 0 ; /* 0x00000000ff187435 */
/* 0x000fe400000001ff */
/*00d0*/ ISETP.GE.AND P0, PT, R4, 0x1, PT ; /* 0x000000010400780c */
/* 0x000fda0003f06270 */
/*00e0*/ @!P0 BRA 0xc40 ; /* 0x00000b5000008947 */
/* 0x000fea0003800000 */
/*00f0*/ IADD3 R2, R4.reuse, -0x1, RZ ; /* 0xffffffff04027810 */
/* 0x040fe40007ffe0ff */
/*0100*/ LOP3.LUT R4, R4, 0x3, RZ, 0xc0, !PT ; /* 0x0000000304047812 */
/* 0x000fe400078ec0ff */
/*0110*/ ISETP.GE.U32.AND P0, PT, R2, 0x3, PT ; /* 0x000000030200780c */
/* 0x000fe40003f06070 */
/*0120*/ MOV R24, RZ ; /* 0x000000ff00187202 */
/* 0x000fe40000000f00 */
/*0130*/ MOV R2, RZ ; /* 0x000000ff00027202 */
/* 0x000fd20000000f00 */
/*0140*/ @!P0 BRA 0xb30 ; /* 0x000009e000008947 */
/* 0x000fea0003800000 */
/*0150*/ IADD3 R5, -R4, c[0x0][0x164], RZ ; /* 0x0000590004057a10 */
/* 0x000fe20007ffe1ff */
/*0160*/ HFMA2.MMA R9, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff097435 */
/* 0x000fe200000001ff */
/*0170*/ ULDC.64 UR6, c[0x0][0x170] ; /* 0x00005c0000067ab9 */
/* 0x000fe20000000a00 */
/*0180*/ HFMA2.MMA R2, -RZ, RZ, 0, 0 ; /* 0x00000000ff027435 */
/* 0x000fe200000001ff */
/*0190*/ ISETP.GT.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720c */
/* 0x000fe20003f04270 */
/*01a0*/ IMAD R6, R3, c[0x0][0x164], RZ ; /* 0x0000590003067a24 */
/* 0x000fe200078e02ff */
/*01b0*/ MOV R24, RZ ; /* 0x000000ff00187202 */
/* 0x000fca0000000f00 */
/*01c0*/ IMAD.WIDE R8, R0, R9, c[0x0][0x178] ; /* 0x00005e0000087625 */
/* 0x000fcc00078e0209 */
/*01d0*/ @!P0 BRA 0x990 ; /* 0x000007b000008947 */
/* 0x000fea0003800000 */
/*01e0*/ ISETP.GT.AND P1, PT, R5, 0xc, PT ; /* 0x0000000c0500780c */
/* 0x000fe40003f24270 */
/*01f0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */
/* 0x000fd60003f0f070 */
/*0200*/ @!P1 BRA 0x6c0 ; /* 0x000004b000009947 */
/* 0x000fea0003800000 */
/*0210*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40003f0e170 */
/*0220*/ MOV R12, UR6 ; /* 0x00000006000c7c02 */
/* 0x000fe20008000f00 */
/*0230*/ LDG.E R21, [R8.64] ; /* 0x0000000408157981 */
/* 0x0000a2000c1e1900 */
/*0240*/ MOV R13, UR7 ; /* 0x00000007000d7c02 */
/* 0x000fca0008000f00 */
/*0250*/ IMAD.WIDE R12, R6, 0x4, R12 ; /* 0x00000004060c7825 */
/* 0x000fca00078e020c */
/*0260*/ LDG.E R20, [R12.64] ; /* 0x000000040c147981 */
/* 0x000ea2000c1e1900 */
/*0270*/ MOV R7, c[0x0][0x168] ; /* 0x00005a0000077a02 */
/* 0x000fc60000000f00 */
/*0280*/ LDG.E R14, [R12.64+0x4] ; /* 0x000004040c0e7981 */
/* 0x000ee4000c1e1900 */
/*0290*/ IMAD.WIDE R10, R7.reuse, 0x4, R8 ; /* 0x00000004070a7825 */
/* 0x040fe400078e0208 */
/*02a0*/ LDG.E R27, [R12.64+0x8] ; /* 0x000008040c1b7981 */
/* 0x000f28000c1e1900 */
/*02b0*/ LDG.E R15, [R10.64] ; /* 0x000000040a0f7981 */
/* 0x0002e2000c1e1900 */
/*02c0*/ IMAD.WIDE R22, R7, 0x4, R10 ; /* 0x0000000407167825 */
/* 0x000fc600078e020a */
/*02d0*/ LDG.E R18, [R12.64+0xc] ; /* 0x00000c040c127981 */
/* 0x000f66000c1e1900 */
/*02e0*/ IMAD.WIDE R28, R7.reuse, 0x4, R22 ; /* 0x00000004071c7825 */
/* 0x040fe200078e0216 */
/*02f0*/ LDG.E R26, [R22.64] ; /* 0x00000004161a7981 */
/* 0x000328000c1e1900 */
/*0300*/ LDG.E R19, [R28.64] ; /* 0x000000041c137981 */
/* 0x000362000c1e1900 */
/*0310*/ IMAD.WIDE R16, R7, 0x4, R28 ; /* 0x0000000407107825 */
/* 0x000fc600078e021c */
/*0320*/ LDG.E R8, [R12.64+0x10] ; /* 0x000010040c087981 */
/* 0x001f68000c1e1900 */
/*0330*/ LDG.E R9, [R16.64] ; /* 0x0000000410097981 */
/* 0x000168000c1e1900 */
/*0340*/ LDG.E R10, [R12.64+0x14] ; /* 0x000014040c0a7981 */
/* 0x002f68000c1e1900 */
/*0350*/ LDG.E R28, [R12.64+0x1c] ; /* 0x00001c040c1c7981 */
/* 0x000f62000c1e1900 */
/*0360*/ IMAD.WIDE R16, R7, 0x4, R16 ; /* 0x0000000407107825 */
/* 0x001fca00078e0210 */
/*0370*/ LDG.E R11, [R16.64] ; /* 0x00000004100b7981 */
/* 0x000562000c1e1900 */
/*0380*/ IMAD.WIDE R22, R7, 0x4, R16 ; /* 0x0000000407167825 */
/* 0x000fc800078e0210 */
/*0390*/ FFMA R16, R21, R20, R24 ; /* 0x0000001415107223 */
/* 0x004fe40000000018 */
/*03a0*/ LDG.E R20, [R12.64+0x18] ; /* 0x000018040c147981 */
/* 0x000ea2000c1e1900 */
/*03b0*/ IMAD.WIDE R24, R7, 0x4, R22 ; /* 0x0000000407187825 */
/* 0x000fc600078e0216 */
/*03c0*/ LDG.E R21, [R22.64] ; /* 0x0000000416157981 */
/* 0x0000a8000c1e1900 */
/*03d0*/ LDG.E R29, [R24.64] ; /* 0x00000004181d7981 */
/* 0x0002a2000c1e1900 */
/*03e0*/ FFMA R16, R15, R14, R16 ; /* 0x0000000e0f107223 */
/* 0x008fe40000000010 */
/*03f0*/ IMAD.WIDE R14, R7.reuse, 0x4, R24 ; /* 0x00000004070e7825 */
/* 0x040fe200078e0218 */
/*0400*/ LDG.E R23, [R12.64+0x20] ; /* 0x000020040c177981 */
/* 0x001ee6000c1e1900 */
/*0410*/ FFMA R26, R26, R27, R16 ; /* 0x0000001b1a1a7223 */
/* 0x010fe20000000010 */
/*0420*/ LDG.E R25, [R12.64+0x24] ; /* 0x000024040c197981 */
/* 0x002f22000c1e1900 */
/*0430*/ IMAD.WIDE R16, R7, 0x4, R14 ; /* 0x0000000407107825 */
/* 0x000fc600078e020e */
/*0440*/ LDG.E R14, [R14.64] ; /* 0x000000040e0e7981 */
/* 0x0000e2000c1e1900 */
/*0450*/ FFMA R26, R19, R18, R26 ; /* 0x00000012131a7223 */
/* 0x020fe4000000001a */
/*0460*/ IMAD.WIDE R18, R7, 0x4, R16 ; /* 0x0000000407127825 */
/* 0x000fe200078e0210 */
/*0470*/ LDG.E R22, [R12.64+0x28] ; /* 0x000028040c167981 */
/* 0x000f66000c1e1900 */
/*0480*/ FFMA R26, R9, R8, R26 ; /* 0x00000008091a7223 */
/* 0x000fe2000000001a */
/*0490*/ LDG.E R16, [R16.64] ; /* 0x0000000410107981 */
/* 0x000322000c1e1900 */
/*04a0*/ IMAD.WIDE R8, R7, 0x4, R18 ; /* 0x0000000407087825 */
/* 0x000fc600078e0212 */
/*04b0*/ LDG.E R18, [R18.64] ; /* 0x0000000412127981 */
/* 0x000368000c1e1900 */
/*04c0*/ LDG.E R24, [R8.64] ; /* 0x0000000408187981 */
/* 0x000568000c1e1900 */
/*04d0*/ LDG.E R15, [R12.64+0x2c] ; /* 0x00002c040c0f7981 */
/* 0x001f62000c1e1900 */
/*04e0*/ FFMA R26, R11, R10, R26 ; /* 0x0000000a0b1a7223 */
/* 0x000fe4000000001a */
/*04f0*/ IMAD.WIDE R10, R7, 0x4, R8 ; /* 0x00000004070a7825 */
/* 0x000fe200078e0208 */
/*0500*/ LDG.E R17, [R12.64+0x30] ; /* 0x000030040c117981 */
/* 0x002f66000c1e1900 */
/*0510*/ FFMA R26, R21, R20, R26 ; /* 0x00000014151a7223 */
/* 0x004fc4000000001a */
/*0520*/ IMAD.WIDE R20, R7, 0x4, R10 ; /* 0x0000000407147825 */
/* 0x000fe400078e020a */
/*0530*/ LDG.E R10, [R10.64] ; /* 0x000000040a0a7981 */
/* 0x0000a4000c1e1900 */
/*0540*/ FFMA R28, R29, R28, R26 ; /* 0x0000001c1d1c7223 */
/* 0x000fe4000000001a */
/*0550*/ IMAD.WIDE R26, R7.reuse, 0x4, R20 ; /* 0x00000004071a7825 */
/* 0x040fe200078e0214 */
/*0560*/ LDG.E R29, [R12.64+0x34] ; /* 0x000034040c1d7981 */
/* 0x000ea8000c1e1900 */
/*0570*/ LDG.E R20, [R20.64] ; /* 0x0000000414147981 */
/* 0x0002a2000c1e1900 */
/*0580*/ IMAD.WIDE R8, R7, 0x4, R26 ; /* 0x0000000407087825 */
/* 0x000fc600078e021a */
/*0590*/ LDG.E R19, [R26.64] ; /* 0x000000041a137981 */
/* 0x0006a8000c1e1900 */
/*05a0*/ LDG.E R11, [R8.64] ; /* 0x00000004080b7981 */
/* 0x0010a8000c1e1900 */
/*05b0*/ LDG.E R21, [R12.64+0x38] ; /* 0x000038040c157981 */
/* 0x002ea8000c1e1900 */
/*05c0*/ LDG.E R26, [R12.64+0x3c] ; /* 0x00003c040c1a7981 */
/* 0x008ee2000c1e1900 */
/*05d0*/ FFMA R14, R14, R23, R28 ; /* 0x000000170e0e7223 */
/* 0x000fc8000000001c */
/*05e0*/ FFMA R25, R16, R25, R14 ; /* 0x0000001910197223 */
/* 0x010fe2000000000e */
/*05f0*/ IADD3 R5, R5, -0x10, RZ ; /* 0xfffffff005057810 */
/* 0x000fc60007ffe0ff */
/*0600*/ FFMA R18, R18, R22, R25 ; /* 0x0000001612127223 */
/* 0x020fe20000000019 */
/*0610*/ ISETP.GT.AND P1, PT, R5, 0xc, PT ; /* 0x0000000c0500780c */
/* 0x000fc60003f24270 */
/*0620*/ FFMA R15, R24, R15, R18 ; /* 0x0000000f180f7223 */
/* 0x000fe20000000012 */
/*0630*/ UIADD3 UR6, UP0, UR6, 0x40, URZ ; /* 0x0000004006067890 */
/* 0x000fe2000ff1e03f */
/*0640*/ IMAD.WIDE R8, R7, 0x4, R8 ; /* 0x0000000407087825 */
/* 0x001fc600078e0208 */
/*0650*/ UIADD3.X UR7, URZ, UR7, URZ, UP0, !UPT ; /* 0x000000073f077290 */
/* 0x000fe200087fe43f */
/*0660*/ IADD3 R2, R2, 0x10, RZ ; /* 0x0000001002027810 */
/* 0x000fe20007ffe0ff */
/*0670*/ FFMA R10, R10, R17, R15 ; /* 0x000000110a0a7223 */
/* 0x004fc8000000000f */
/*0680*/ FFMA R10, R20, R29, R10 ; /* 0x0000001d140a7223 */
/* 0x000fc8000000000a */
/*0690*/ FFMA R10, R19, R21, R10 ; /* 0x00000015130a7223 */
/* 0x000fc8000000000a */
/*06a0*/ FFMA R24, R11, R26, R10 ; /* 0x0000001a0b187223 */
/* 0x008fe2000000000a */
/*06b0*/ @P1 BRA 0x220 ; /* 0xfffffb6000001947 */
/* 0x000fea000383ffff */
/*06c0*/ ISETP.GT.AND P1, PT, R5, 0x4, PT ; /* 0x000000040500780c */
/* 0x000fda0003f24270 */
/*06d0*/ @!P1 BRA 0x970 ; /* 0x0000029000009947 */
/* 0x000fea0003800000 */
/*06e0*/ MOV R7, c[0x0][0x168] ; /* 0x00005a0000077a02 */
/* 0x000fe20000000f00 */
/*06f0*/ LDG.E R23, [R8.64] ; /* 0x0000000408177981 */
/* 0x0000a2000c1e1900 */
/*0700*/ MOV R10, UR6 ; /* 0x00000006000a7c02 */
/* 0x000fe40008000f00 */
/*0710*/ MOV R11, UR7 ; /* 0x00000007000b7c02 */
/* 0x000fe20008000f00 */
/*0720*/ IMAD.WIDE R16, R7, 0x4, R8 ; /* 0x0000000407107825 */
/* 0x000fc800078e0208 */
/*0730*/ IMAD.WIDE R10, R6, 0x4, R10 ; /* 0x00000004060a7825 */
/* 0x000fc800078e020a */
/*0740*/ IMAD.WIDE R12, R7.reuse, 0x4, R16 ; /* 0x00000004070c7825 */
/* 0x040fe200078e0210 */
/*0750*/ LDG.E R22, [R10.64] ; /* 0x000000040a167981 */
/* 0x000ea8000c1e1900 */
/*0760*/ LDG.E R16, [R16.64] ; /* 0x0000000410107981 */
/* 0x0002e2000c1e1900 */
/*0770*/ IMAD.WIDE R14, R7, 0x4, R12 ; /* 0x00000004070e7825 */
/* 0x000fc600078e020c */
/*0780*/ LDG.E R25, [R10.64+0x4] ; /* 0x000004040a197981 */
/* 0x000ee6000c1e1900 */
/*0790*/ IMAD.WIDE R18, R7.reuse, 0x4, R14 ; /* 0x0000000407127825 */
/* 0x040fe200078e020e */
/*07a0*/ LDG.E R26, [R12.64] ; /* 0x000000040c1a7981 */
/* 0x000968000c1e1900 */
/*07b0*/ LDG.E R27, [R10.64+0x8] ; /* 0x000008040a1b7981 */
/* 0x000f62000c1e1900 */
/*07c0*/ IMAD.WIDE R20, R7, 0x4, R18 ; /* 0x0000000407147825 */
/* 0x000fc600078e0212 */
/*07d0*/ LDG.E R14, [R14.64] ; /* 0x000000040e0e7981 */
/* 0x000368000c1e1900 */
/*07e0*/ LDG.E R29, [R10.64+0xc] ; /* 0x00000c040a1d7981 */
/* 0x000f62000c1e1900 */
/*07f0*/ IMAD.WIDE R8, R7, 0x4, R20 ; /* 0x0000000407087825 */
/* 0x001fc600078e0214 */
/*0800*/ LDG.E R18, [R18.64] ; /* 0x0000000412127981 */
/* 0x000168000c1e1900 */
/*0810*/ LDG.E R28, [R10.64+0x10] ; /* 0x000010040a1c7981 */
/* 0x000f62000c1e1900 */
/*0820*/ IMAD.WIDE R12, R7, 0x4, R8 ; /* 0x00000004070c7825 */
/* 0x010fc600078e0208 */
/*0830*/ LDG.E R20, [R20.64] ; /* 0x0000000414147981 */
/* 0x000968000c1e1900 */
/*0840*/ LDG.E R15, [R10.64+0x14] ; /* 0x000014040a0f7981 */
/* 0x002f68000c1e1900 */
/*0850*/ LDG.E R17, [R8.64] ; /* 0x0000000408117981 */
/* 0x000368000c1e1900 */
/*0860*/ LDG.E R21, [R10.64+0x1c] ; /* 0x00001c040a157981 */
/* 0x010f28000c1e1900 */
/*0870*/ LDG.E R19, [R12.64] ; /* 0x000000040c137981 */
/* 0x001f28000c1e1900 */
/*0880*/ LDG.E R8, [R10.64+0x18] ; /* 0x000018040a087981 */
/* 0x002f22000c1e1900 */
/*0890*/ UIADD3 UR6, UP0, UR6, 0x20, URZ ; /* 0x0000002006067890 */
/* 0x000fe2000ff1e03f */
/*08a0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fc40003f0e170 */
/*08b0*/ IADD3 R2, R2, 0x8, RZ ; /* 0x0000000802027810 */
/* 0x000fe40007ffe0ff */
/*08c0*/ IADD3 R5, R5, -0x8, RZ ; /* 0xfffffff805057810 */
/* 0x000fe20007ffe0ff */
/*08d0*/ UIADD3.X UR7, URZ, UR7, URZ, UP0, !UPT ; /* 0x000000073f077290 */
/* 0x000fe200087fe43f */
/*08e0*/ FFMA R22, R23, R22, R24 ; /* 0x0000001617167223 */
/* 0x004fc80000000018 */
/*08f0*/ FFMA R16, R16, R25, R22 ; /* 0x0000001910107223 */
/* 0x008fc80000000016 */
/*0900*/ FFMA R16, R26, R27, R16 ; /* 0x0000001b1a107223 */
/* 0x020fc80000000010 */
/*0910*/ FFMA R29, R14, R29, R16 ; /* 0x0000001d0e1d7223 */
/* 0x000fc80000000010 */
/*0920*/ FFMA R18, R18, R28, R29 ; /* 0x0000001c12127223 */
/* 0x000fc8000000001d */
/*0930*/ FFMA R15, R20, R15, R18 ; /* 0x0000000f140f7223 */
/* 0x000fc80000000012 */
/*0940*/ FFMA R24, R17, R8, R15 ; /* 0x0000000811187223 */
/* 0x010fe4000000000f */
/*0950*/ IMAD.WIDE R8, R7, 0x4, R12 ; /* 0x0000000407087825 */
/* 0x000fc800078e020c */
/*0960*/ FFMA R24, R19, R21, R24 ; /* 0x0000001513187223 */
/* 0x000fe40000000018 */
/*0970*/ ISETP.NE.OR P0, PT, R5, RZ, P0 ; /* 0x000000ff0500720c */
/* 0x000fda0000705670 */
/*0980*/ @!P0 BRA 0xb30 ; /* 0x000001a000008947 */
/* 0x000fea0003800000 */
/*0990*/ MOV R10, UR6 ; /* 0x00000006000a7c02 */
/* 0x000fe40008000f00 */
/*09a0*/ MOV R11, UR7 ; /* 0x00000007000b7c02 */
/* 0x000fe40008000f00 */
/*09b0*/ MOV R7, c[0x0][0x168] ; /* 0x00005a0000077a02 */
/* 0x000fc60000000f00 */
/*09c0*/ IMAD.WIDE R10, R6, 0x4, R10 ; /* 0x00000004060a7825 */
/* 0x000fc800078e020a */
/*09d0*/ IMAD.WIDE R16, R7.reuse, 0x4, R8 ; /* 0x0000000407107825 */
/* 0x040fe200078e0208 */
/*09e0*/ LDG.E R18, [R10.64] ; /* 0x000000040a127981 */
/* 0x000ea8000c1e1900 */
/*09f0*/ LDG.E R9, [R8.64] ; /* 0x0000000408097981 */
/* 0x000ea2000c1e1900 */
/*0a00*/ IMAD.WIDE R12, R7, 0x4, R16 ; /* 0x00000004070c7825 */
/* 0x000fc600078e0210 */
/*0a10*/ LDG.E R17, [R16.64] ; /* 0x0000000410117981 */
/* 0x000ee8000c1e1900 */
/*0a20*/ LDG.E R19, [R10.64+0x4] ; /* 0x000004040a137981 */
/* 0x000ee2000c1e1900 */
/*0a30*/ IMAD.WIDE R14, R7, 0x4, R12 ; /* 0x00000004070e7825 */
/* 0x000fc600078e020c */
/*0a40*/ LDG.E R21, [R12.64] ; /* 0x000000040c157981 */
/* 0x000f28000c1e1900 */
/*0a50*/ LDG.E R20, [R10.64+0x8] ; /* 0x000008040a147981 */
/* 0x000f28000c1e1900 */
/*0a60*/ LDG.E R22, [R10.64+0xc] ; /* 0x00000c040a167981 */
/* 0x000f68000c1e1900 */
/*0a70*/ LDG.E R23, [R14.64] ; /* 0x000000040e177981 */
/* 0x000f62000c1e1900 */
/*0a80*/ IADD3 R5, R5, -0x4, RZ ; /* 0xfffffffc05057810 */
/* 0x000fc80007ffe0ff */
/*0a90*/ ISETP.NE.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720c */
/* 0x000fe20003f05270 */
/*0aa0*/ UIADD3 UR6, UP0, UR6, 0x10, URZ ; /* 0x0000001006067890 */
/* 0x000fe2000ff1e03f */
/*0ab0*/ IADD3 R2, R2, 0x4, RZ ; /* 0x0000000402027810 */
/* 0x000fc60007ffe0ff */
/*0ac0*/ UIADD3.X UR7, URZ, UR7, URZ, UP0, !UPT ; /* 0x000000073f077290 */
/* 0x000fe200087fe43f */
/*0ad0*/ FFMA R18, R9, R18, R24 ; /* 0x0000001209127223 */
/* 0x004fc80000000018 */
/*0ae0*/ FFMA R18, R17, R19, R18 ; /* 0x0000001311127223 */
/* 0x008fe40000000012 */
/*0af0*/ IMAD.WIDE R8, R7, 0x4, R14 ; /* 0x0000000407087825 */
/* 0x000fc800078e020e */
/*0b00*/ FFMA R18, R21, R20, R18 ; /* 0x0000001415127223 */
/* 0x010fc80000000012 */
/*0b10*/ FFMA R24, R23, R22, R18 ; /* 0x0000001617187223 */
/* 0x020fe20000000012 */
/*0b20*/ @P0 BRA 0x990 ; /* 0xfffffe6000000947 */
/* 0x000fea000383ffff */
/*0b30*/ ISETP.NE.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */
/* 0x000fda0003f05270 */
/*0b40*/ @!P0 BRA 0xc40 ; /* 0x000000f000008947 */
/* 0x000fea0003800000 */
/*0b50*/ HFMA2.MMA R9, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff097435 */
/* 0x000fe200000001ff */
/*0b60*/ IMAD R6, R3, c[0x0][0x164], R2 ; /* 0x0000590003067a24 */
/* 0x000fe400078e0202 */
/*0b70*/ IMAD R2, R2, c[0x0][0x168], R0 ; /* 0x00005a0002027a24 */
/* 0x000fce00078e0200 */
/*0b80*/ IMAD.WIDE R6, R6, R9, c[0x0][0x170] ; /* 0x00005c0006067625 */
/* 0x000fc800078e0209 */
/*0b90*/ IMAD.WIDE R8, R2, R9, c[0x0][0x178] ; /* 0x00005e0002087625 */
/* 0x000fca00078e0209 */
/*0ba0*/ LDG.E R5, [R8.64] ; /* 0x0000000408057981 */
/* 0x0000a8000c1e1900 */
/*0bb0*/ LDG.E R2, [R6.64] ; /* 0x0000000406027981 */
/* 0x0002a2000c1e1900 */
/*0bc0*/ IADD3 R4, R4, -0x1, RZ ; /* 0xffffffff04047810 */
/* 0x000fe40007ffe0ff */
/*0bd0*/ MOV R11, c[0x0][0x168] ; /* 0x00005a00000b7a02 */
/* 0x000fe40000000f00 */
/*0be0*/ ISETP.NE.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */
/* 0x000fc60003f05270 */
/*0bf0*/ IMAD.WIDE R8, R11, 0x4, R8 ; /* 0x000000040b087825 */
/* 0x001fe200078e0208 */
/*0c00*/ IADD3 R6, P1, R6, 0x4, RZ ; /* 0x0000000406067810 */
/* 0x002fc80007f3e0ff */
/*0c10*/ IADD3.X R7, RZ, R7, RZ, P1, !PT ; /* 0x00000007ff077210 */
/* 0x000fe20000ffe4ff */
/*0c20*/ FFMA R24, R5, R2, R24 ; /* 0x0000000205187223 */
/* 0x004fc80000000018 */
/*0c30*/ @P0 BRA 0xba0 ; /* 0xffffff6000000947 */
/* 0x000fea000383ffff */
/*0c40*/ MOV R2, 0x4 ; /* 0x0000000400027802 */
/* 0x000fe20000000f00 */
/*0c50*/ IMAD R3, R3, c[0x0][0x168], R0 ; /* 0x00005a0003037a24 */
/* 0x000fc800078e0200 */
/*0c60*/ IMAD.WIDE R2, R3, R2, c[0x0][0x180] ; /* 0x0000600003027625 */
/* 0x000fca00078e0202 */
/*0c70*/ STG.E [R2.64], R24 ; /* 0x0000001802007986 */
/* 0x000fe2000c101904 */
/*0c80*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0c90*/ BRA 0xc90; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0ca0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0cb0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0cc0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0cd0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ce0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0cf0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0d00*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0d10*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0d20*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0d30*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0d40*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0d50*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0d60*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0d70*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <iostream>
#include <stdio.h>
#include <math.h>
using namespace std;
#define TILE_WIDTH 2
__global__ void MatrixMult(int m, int n, int k, float *a, float *b, float *c)
{
int row = threadIdx.y + blockIdx.y*blockDim.y;
int col = threadIdx.x + blockIdx.x*blockDim.x;
if((row < m) && (col < k))
{
float temp = 0.0;
for (int i = 0; i < n; ++i)
{
temp += a[row*n+i]*b[col+i*k];
}
c[row*k+col] = temp;
}
}
// main fn
int main(void)
{
int m = 4;
int n = 6;
int k = 7;
float* a = new float[m*n];
float* b = new float[n*k];
float* c = new float[m*k];
float *dev_a, *dev_b, *dev_c;
dim3 dimGrid((k-1)/TILE_WIDTH+1,(m-1)/TILE_WIDTH+1,1);
dim3 dimBlock(TILE_WIDTH,TILE_WIDTH,1);
cudaMalloc((void**)&dev_a, m*n*sizeof(float));
cudaMalloc((void**)&dev_b, n*k*sizeof(float));
cudaMalloc((void**)&dev_c, m*k*sizeof(float));
for (int i=0; i<m*n; i++)
{
a[i] = sin((float) i);
}
for (int i=0; i<n*k; i++)
{
b[i] = cos((float) i);
}
cudaMemcpy(dev_a, a, m*n*sizeof(float), cudaMemcpyHostToDevice);
cudaMemcpy(dev_b, b, n*k*sizeof(float), cudaMemcpyHostToDevice);
MatrixMult<<<dimGrid,dimBlock>>>(m,n,k,dev_a,dev_b,dev_c);
cudaMemcpy(c, dev_c, m*k*sizeof(float), cudaMemcpyDeviceToHost);
cout<<"a matrix: \n";
for (int i=0; i<m; i++)
{
for (int j=0; j<n; j++)
{
cout<<a[n*i+j]<<" ";
}
cout<<"\n";
}
cout<<"b matrix: \n";
for (int i=0; i<n; i++)
{
for (int j=0; j<k; j++)
{
cout<<b[k*i+j]<<" ";
}
cout<<"\n";
}
cout<<"c matrix: \n";
for (int i=0; i<m; i++)
{
for (int j=0; j<k; j++)
{
cout<<c[k*i+j]<<" ";
}
cout<<"\n";
}
cudaFree(dev_a);
cudaFree(dev_b);
cudaFree(dev_c);
delete [] a;
delete [] b;
delete [] c;
} | .file "tmpxft_00101d16_00000000-6_matrix_mult.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3672:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z37__device_stub__Z10MatrixMultiiiPfS_S_iiiPfS_S_
.type _Z37__device_stub__Z10MatrixMultiiiPfS_S_iiiPfS_S_, @function
_Z37__device_stub__Z10MatrixMultiiiPfS_S_iiiPfS_S_:
.LFB3694:
.cfi_startproc
endbr64
subq $184, %rsp
.cfi_def_cfa_offset 192
movl %edi, 44(%rsp)
movl %esi, 40(%rsp)
movl %edx, 36(%rsp)
movq %rcx, 24(%rsp)
movq %r8, 16(%rsp)
movq %r9, 8(%rsp)
movq %fs:40, %rax
movq %rax, 168(%rsp)
xorl %eax, %eax
leaq 44(%rsp), %rax
movq %rax, 112(%rsp)
leaq 40(%rsp), %rax
movq %rax, 120(%rsp)
leaq 36(%rsp), %rax
movq %rax, 128(%rsp)
leaq 24(%rsp), %rax
movq %rax, 136(%rsp)
leaq 16(%rsp), %rax
movq %rax, 144(%rsp)
leaq 8(%rsp), %rax
movq %rax, 152(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
leaq 56(%rsp), %rcx
leaq 48(%rsp), %rdx
leaq 76(%rsp), %rsi
leaq 64(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 168(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $184, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 56(%rsp)
.cfi_def_cfa_offset 200
pushq 56(%rsp)
.cfi_def_cfa_offset 208
leaq 128(%rsp), %r9
movq 92(%rsp), %rcx
movl 100(%rsp), %r8d
movq 80(%rsp), %rsi
movl 88(%rsp), %edx
leaq _Z10MatrixMultiiiPfS_S_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 192
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3694:
.size _Z37__device_stub__Z10MatrixMultiiiPfS_S_iiiPfS_S_, .-_Z37__device_stub__Z10MatrixMultiiiPfS_S_iiiPfS_S_
.globl _Z10MatrixMultiiiPfS_S_
.type _Z10MatrixMultiiiPfS_S_, @function
_Z10MatrixMultiiiPfS_S_:
.LFB3695:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z37__device_stub__Z10MatrixMultiiiPfS_S_iiiPfS_S_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3695:
.size _Z10MatrixMultiiiPfS_S_, .-_Z10MatrixMultiiiPfS_S_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "a matrix: \n"
.LC1:
.string " "
.LC2:
.string "\n"
.LC3:
.string "b matrix: \n"
.LC4:
.string "c matrix: \n"
.text
.globl main
.type main, @function
main:
.LFB3669:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $88, %rsp
.cfi_def_cfa_offset 144
movq %fs:40, %rax
movq %rax, 72(%rsp)
xorl %eax, %eax
movl $96, %edi
call _Znam@PLT
movq %rax, %r13
movl $168, %edi
call _Znam@PLT
movq %rax, %rbp
movl $112, %edi
call _Znam@PLT
movq %rax, 8(%rsp)
movl $4, 48(%rsp)
movl $2, 52(%rsp)
movl $1, 56(%rsp)
movl $2, 60(%rsp)
movl $2, 64(%rsp)
movl $1, 68(%rsp)
leaq 24(%rsp), %rdi
movl $96, %esi
call cudaMalloc@PLT
leaq 32(%rsp), %rdi
movl $168, %esi
call cudaMalloc@PLT
leaq 40(%rsp), %rdi
movl $112, %esi
call cudaMalloc@PLT
movl $0, %ebx
.L12:
pxor %xmm0, %xmm0
cvtsi2ssl %ebx, %xmm0
call sinf@PLT
movss %xmm0, 0(%r13,%rbx,4)
addq $1, %rbx
cmpq $24, %rbx
jne .L12
movl $0, %ebx
.L13:
pxor %xmm0, %xmm0
cvtsi2ssl %ebx, %xmm0
call cosf@PLT
movss %xmm0, 0(%rbp,%rbx,4)
addq $1, %rbx
cmpq $42, %rbx
jne .L13
movl $1, %ecx
movl $96, %edx
movq %r13, %rsi
movq 24(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $168, %edx
movq %rbp, %rsi
movq 32(%rsp), %rdi
call cudaMemcpy@PLT
movl 68(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 60(%rsp), %rdx
movq 48(%rsp), %rdi
movl 56(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L31
.L14:
movl $2, %ecx
movl $112, %edx
movq 40(%rsp), %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
leaq .LC0(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %r13, %r12
movl $0, (%rsp)
leaq _ZSt4cout(%rip), %r14
leaq .LC1(%rip), %r15
.L15:
movl $0, %ebx
.L16:
pxor %xmm0, %xmm0
cvtss2sd (%r12,%rbx,4), %xmm0
movq %r14, %rdi
call _ZNSo9_M_insertIdEERSoT_@PLT
movq %rax, %rdi
movl $1, %edx
movq %r15, %rsi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
addq $1, %rbx
cmpq $6, %rbx
jne .L16
movl $1, %edx
leaq .LC2(%rip), %rsi
movq %r14, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
addl $6, (%rsp)
movl (%rsp), %eax
addq $24, %r12
cmpl $24, %eax
jne .L15
leaq .LC3(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rbp, %r12
leaq 168(%rbp), %rax
movq %rax, (%rsp)
leaq _ZSt4cout(%rip), %r14
leaq .LC1(%rip), %r15
.L18:
movl $0, %ebx
.L19:
pxor %xmm0, %xmm0
cvtss2sd (%r12,%rbx,4), %xmm0
movq %r14, %rdi
call _ZNSo9_M_insertIdEERSoT_@PLT
movq %rax, %rdi
movl $1, %edx
movq %r15, %rsi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
addq $1, %rbx
cmpq $7, %rbx
jne .L19
movl $1, %edx
leaq .LC2(%rip), %rsi
movq %r14, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
addq $28, %r12
cmpq %r12, (%rsp)
jne .L18
leaq .LC4(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq 8(%rsp), %r12
movl $0, (%rsp)
leaq _ZSt4cout(%rip), %r14
leaq .LC1(%rip), %r15
.L21:
movl $0, %ebx
.L22:
pxor %xmm0, %xmm0
cvtss2sd (%r12,%rbx,4), %xmm0
movq %r14, %rdi
call _ZNSo9_M_insertIdEERSoT_@PLT
movq %rax, %rdi
movl $1, %edx
movq %r15, %rsi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
addq $1, %rbx
cmpq $7, %rbx
jne .L22
movl $1, %edx
leaq .LC2(%rip), %rsi
movq %r14, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
addl $7, (%rsp)
movl (%rsp), %eax
addq $28, %r12
cmpl $28, %eax
jne .L21
movq 24(%rsp), %rdi
call cudaFree@PLT
movq 32(%rsp), %rdi
call cudaFree@PLT
movq 40(%rsp), %rdi
call cudaFree@PLT
movq %r13, %rdi
call _ZdaPv@PLT
movq %rbp, %rdi
call _ZdaPv@PLT
movq 8(%rsp), %rdi
call _ZdaPv@PLT
movq 72(%rsp), %rax
subq %fs:40, %rax
jne .L32
movl $0, %eax
addq $88, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L31:
.cfi_restore_state
movq 40(%rsp), %r9
movq 32(%rsp), %r8
movq 24(%rsp), %rcx
movl $7, %edx
movl $6, %esi
movl $4, %edi
call _Z37__device_stub__Z10MatrixMultiiiPfS_S_iiiPfS_S_
jmp .L14
.L32:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3669:
.size main, .-main
.section .rodata.str1.1
.LC5:
.string "_Z10MatrixMultiiiPfS_S_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3697:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC5(%rip), %rdx
movq %rdx, %rcx
leaq _Z10MatrixMultiiiPfS_S_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3697:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <iostream>
#include <stdio.h>
#include <math.h>
using namespace std;
#define TILE_WIDTH 2
__global__ void MatrixMult(int m, int n, int k, float *a, float *b, float *c)
{
int row = threadIdx.y + blockIdx.y*blockDim.y;
int col = threadIdx.x + blockIdx.x*blockDim.x;
if((row < m) && (col < k))
{
float temp = 0.0;
for (int i = 0; i < n; ++i)
{
temp += a[row*n+i]*b[col+i*k];
}
c[row*k+col] = temp;
}
}
// main fn
int main(void)
{
int m = 4;
int n = 6;
int k = 7;
float* a = new float[m*n];
float* b = new float[n*k];
float* c = new float[m*k];
float *dev_a, *dev_b, *dev_c;
dim3 dimGrid((k-1)/TILE_WIDTH+1,(m-1)/TILE_WIDTH+1,1);
dim3 dimBlock(TILE_WIDTH,TILE_WIDTH,1);
cudaMalloc((void**)&dev_a, m*n*sizeof(float));
cudaMalloc((void**)&dev_b, n*k*sizeof(float));
cudaMalloc((void**)&dev_c, m*k*sizeof(float));
for (int i=0; i<m*n; i++)
{
a[i] = sin((float) i);
}
for (int i=0; i<n*k; i++)
{
b[i] = cos((float) i);
}
cudaMemcpy(dev_a, a, m*n*sizeof(float), cudaMemcpyHostToDevice);
cudaMemcpy(dev_b, b, n*k*sizeof(float), cudaMemcpyHostToDevice);
MatrixMult<<<dimGrid,dimBlock>>>(m,n,k,dev_a,dev_b,dev_c);
cudaMemcpy(c, dev_c, m*k*sizeof(float), cudaMemcpyDeviceToHost);
cout<<"a matrix: \n";
for (int i=0; i<m; i++)
{
for (int j=0; j<n; j++)
{
cout<<a[n*i+j]<<" ";
}
cout<<"\n";
}
cout<<"b matrix: \n";
for (int i=0; i<n; i++)
{
for (int j=0; j<k; j++)
{
cout<<b[k*i+j]<<" ";
}
cout<<"\n";
}
cout<<"c matrix: \n";
for (int i=0; i<m; i++)
{
for (int j=0; j<k; j++)
{
cout<<c[k*i+j]<<" ";
}
cout<<"\n";
}
cudaFree(dev_a);
cudaFree(dev_b);
cudaFree(dev_c);
delete [] a;
delete [] b;
delete [] c;
} | #include <hip/hip_runtime.h>
#include <iostream>
#include <stdio.h>
#include <math.h>
using namespace std;
#define TILE_WIDTH 2
__global__ void MatrixMult(int m, int n, int k, float *a, float *b, float *c)
{
int row = threadIdx.y + blockIdx.y*blockDim.y;
int col = threadIdx.x + blockIdx.x*blockDim.x;
if((row < m) && (col < k))
{
float temp = 0.0;
for (int i = 0; i < n; ++i)
{
temp += a[row*n+i]*b[col+i*k];
}
c[row*k+col] = temp;
}
}
// main fn
int main(void)
{
int m = 4;
int n = 6;
int k = 7;
float* a = new float[m*n];
float* b = new float[n*k];
float* c = new float[m*k];
float *dev_a, *dev_b, *dev_c;
dim3 dimGrid((k-1)/TILE_WIDTH+1,(m-1)/TILE_WIDTH+1,1);
dim3 dimBlock(TILE_WIDTH,TILE_WIDTH,1);
hipMalloc((void**)&dev_a, m*n*sizeof(float));
hipMalloc((void**)&dev_b, n*k*sizeof(float));
hipMalloc((void**)&dev_c, m*k*sizeof(float));
for (int i=0; i<m*n; i++)
{
a[i] = sin((float) i);
}
for (int i=0; i<n*k; i++)
{
b[i] = cos((float) i);
}
hipMemcpy(dev_a, a, m*n*sizeof(float), hipMemcpyHostToDevice);
hipMemcpy(dev_b, b, n*k*sizeof(float), hipMemcpyHostToDevice);
MatrixMult<<<dimGrid,dimBlock>>>(m,n,k,dev_a,dev_b,dev_c);
hipMemcpy(c, dev_c, m*k*sizeof(float), hipMemcpyDeviceToHost);
cout<<"a matrix: \n";
for (int i=0; i<m; i++)
{
for (int j=0; j<n; j++)
{
cout<<a[n*i+j]<<" ";
}
cout<<"\n";
}
cout<<"b matrix: \n";
for (int i=0; i<n; i++)
{
for (int j=0; j<k; j++)
{
cout<<b[k*i+j]<<" ";
}
cout<<"\n";
}
cout<<"c matrix: \n";
for (int i=0; i<m; i++)
{
for (int j=0; j<k; j++)
{
cout<<c[k*i+j]<<" ";
}
cout<<"\n";
}
hipFree(dev_a);
hipFree(dev_b);
hipFree(dev_c);
delete [] a;
delete [] b;
delete [] c;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <stdio.h>
#include <math.h>
using namespace std;
#define TILE_WIDTH 2
__global__ void MatrixMult(int m, int n, int k, float *a, float *b, float *c)
{
int row = threadIdx.y + blockIdx.y*blockDim.y;
int col = threadIdx.x + blockIdx.x*blockDim.x;
if((row < m) && (col < k))
{
float temp = 0.0;
for (int i = 0; i < n; ++i)
{
temp += a[row*n+i]*b[col+i*k];
}
c[row*k+col] = temp;
}
}
// main fn
int main(void)
{
int m = 4;
int n = 6;
int k = 7;
float* a = new float[m*n];
float* b = new float[n*k];
float* c = new float[m*k];
float *dev_a, *dev_b, *dev_c;
dim3 dimGrid((k-1)/TILE_WIDTH+1,(m-1)/TILE_WIDTH+1,1);
dim3 dimBlock(TILE_WIDTH,TILE_WIDTH,1);
hipMalloc((void**)&dev_a, m*n*sizeof(float));
hipMalloc((void**)&dev_b, n*k*sizeof(float));
hipMalloc((void**)&dev_c, m*k*sizeof(float));
for (int i=0; i<m*n; i++)
{
a[i] = sin((float) i);
}
for (int i=0; i<n*k; i++)
{
b[i] = cos((float) i);
}
hipMemcpy(dev_a, a, m*n*sizeof(float), hipMemcpyHostToDevice);
hipMemcpy(dev_b, b, n*k*sizeof(float), hipMemcpyHostToDevice);
MatrixMult<<<dimGrid,dimBlock>>>(m,n,k,dev_a,dev_b,dev_c);
hipMemcpy(c, dev_c, m*k*sizeof(float), hipMemcpyDeviceToHost);
cout<<"a matrix: \n";
for (int i=0; i<m; i++)
{
for (int j=0; j<n; j++)
{
cout<<a[n*i+j]<<" ";
}
cout<<"\n";
}
cout<<"b matrix: \n";
for (int i=0; i<n; i++)
{
for (int j=0; j<k; j++)
{
cout<<b[k*i+j]<<" ";
}
cout<<"\n";
}
cout<<"c matrix: \n";
for (int i=0; i<m; i++)
{
for (int j=0; j<k; j++)
{
cout<<c[k*i+j]<<" ";
}
cout<<"\n";
}
hipFree(dev_a);
hipFree(dev_b);
hipFree(dev_c);
delete [] a;
delete [] b;
delete [] c;
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z10MatrixMultiiiPfS_S_
.globl _Z10MatrixMultiiiPfS_S_
.p2align 8
.type _Z10MatrixMultiiiPfS_S_,@function
_Z10MatrixMultiiiPfS_S_:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x34
s_load_b32 s4, s[0:1], 0x0
s_load_b32 s3, s[0:1], 0x8
v_bfe_u32 v2, v0, 10, 10
v_and_b32_e32 v3, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s5, s2, 16
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[0:1], null, s15, s5, v[2:3]
v_mad_u64_u32 v[1:2], null, s14, s2, v[3:4]
v_cmp_gt_i32_e32 vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_gt_i32_e64 s2, s3, v1
s_and_b32 s2, vcc_lo, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s4, s2
s_cbranch_execz .LBB0_6
s_load_b32 s2, s[0:1], 0x4
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s2, 1
s_cbranch_scc1 .LBB0_4
s_load_b128 s[4:7], s[0:1], 0x10
v_mul_lo_u32 v2, v0, s2
v_mov_b32_e32 v6, 0
v_mov_b32_e32 v4, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
.p2align 6
.LBB0_3:
v_ashrrev_i32_e32 v5, 31, v4
s_add_i32 s2, s2, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_cmp_eq_u32 s2, 0
v_lshlrev_b64 v[7:8], 2, v[4:5]
v_add_nc_u32_e32 v4, s3, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v7, vcc_lo, s6, v7
v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
global_load_b32 v5, v[2:3], off
global_load_b32 v7, v[7:8], off
v_add_co_u32 v2, vcc_lo, v2, 4
v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v6, v5, v7
s_cbranch_scc0 .LBB0_3
s_branch .LBB0_5
.LBB0_4:
v_mov_b32_e32 v6, 0
.LBB0_5:
s_load_b64 s[0:1], s[0:1], 0x20
v_mad_u64_u32 v[2:3], null, v0, s3, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[0:1], 2, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v6, off
.LBB0_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z10MatrixMultiiiPfS_S_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 296
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 9
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z10MatrixMultiiiPfS_S_, .Lfunc_end0-_Z10MatrixMultiiiPfS_S_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .offset: 0
.size: 4
.value_kind: by_value
- .offset: 4
.size: 4
.value_kind: by_value
- .offset: 8
.size: 4
.value_kind: by_value
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 24
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 32
.size: 8
.value_kind: global_buffer
- .offset: 40
.size: 4
.value_kind: hidden_block_count_x
- .offset: 44
.size: 4
.value_kind: hidden_block_count_y
- .offset: 48
.size: 4
.value_kind: hidden_block_count_z
- .offset: 52
.size: 2
.value_kind: hidden_group_size_x
- .offset: 54
.size: 2
.value_kind: hidden_group_size_y
- .offset: 56
.size: 2
.value_kind: hidden_group_size_z
- .offset: 58
.size: 2
.value_kind: hidden_remainder_x
- .offset: 60
.size: 2
.value_kind: hidden_remainder_y
- .offset: 62
.size: 2
.value_kind: hidden_remainder_z
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 96
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 104
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 296
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z10MatrixMultiiiPfS_S_
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z10MatrixMultiiiPfS_S_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 9
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <stdio.h>
#include <math.h>
using namespace std;
#define TILE_WIDTH 2
__global__ void MatrixMult(int m, int n, int k, float *a, float *b, float *c)
{
int row = threadIdx.y + blockIdx.y*blockDim.y;
int col = threadIdx.x + blockIdx.x*blockDim.x;
if((row < m) && (col < k))
{
float temp = 0.0;
for (int i = 0; i < n; ++i)
{
temp += a[row*n+i]*b[col+i*k];
}
c[row*k+col] = temp;
}
}
// main fn
int main(void)
{
int m = 4;
int n = 6;
int k = 7;
float* a = new float[m*n];
float* b = new float[n*k];
float* c = new float[m*k];
float *dev_a, *dev_b, *dev_c;
dim3 dimGrid((k-1)/TILE_WIDTH+1,(m-1)/TILE_WIDTH+1,1);
dim3 dimBlock(TILE_WIDTH,TILE_WIDTH,1);
hipMalloc((void**)&dev_a, m*n*sizeof(float));
hipMalloc((void**)&dev_b, n*k*sizeof(float));
hipMalloc((void**)&dev_c, m*k*sizeof(float));
for (int i=0; i<m*n; i++)
{
a[i] = sin((float) i);
}
for (int i=0; i<n*k; i++)
{
b[i] = cos((float) i);
}
hipMemcpy(dev_a, a, m*n*sizeof(float), hipMemcpyHostToDevice);
hipMemcpy(dev_b, b, n*k*sizeof(float), hipMemcpyHostToDevice);
MatrixMult<<<dimGrid,dimBlock>>>(m,n,k,dev_a,dev_b,dev_c);
hipMemcpy(c, dev_c, m*k*sizeof(float), hipMemcpyDeviceToHost);
cout<<"a matrix: \n";
for (int i=0; i<m; i++)
{
for (int j=0; j<n; j++)
{
cout<<a[n*i+j]<<" ";
}
cout<<"\n";
}
cout<<"b matrix: \n";
for (int i=0; i<n; i++)
{
for (int j=0; j<k; j++)
{
cout<<b[k*i+j]<<" ";
}
cout<<"\n";
}
cout<<"c matrix: \n";
for (int i=0; i<m; i++)
{
for (int j=0; j<k; j++)
{
cout<<c[k*i+j]<<" ";
}
cout<<"\n";
}
hipFree(dev_a);
hipFree(dev_b);
hipFree(dev_c);
delete [] a;
delete [] b;
delete [] c;
} | .text
.file "matrix_mult.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z25__device_stub__MatrixMultiiiPfS_S_ # -- Begin function _Z25__device_stub__MatrixMultiiiPfS_S_
.p2align 4, 0x90
.type _Z25__device_stub__MatrixMultiiiPfS_S_,@function
_Z25__device_stub__MatrixMultiiiPfS_S_: # @_Z25__device_stub__MatrixMultiiiPfS_S_
.cfi_startproc
# %bb.0:
subq $152, %rsp
.cfi_def_cfa_offset 160
movl %edi, 20(%rsp)
movl %esi, 16(%rsp)
movl %edx, 12(%rsp)
movq %rcx, 88(%rsp)
movq %r8, 80(%rsp)
movq %r9, 72(%rsp)
leaq 20(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
leaq 88(%rsp), %rax
movq %rax, 120(%rsp)
leaq 80(%rsp), %rax
movq %rax, 128(%rsp)
leaq 72(%rsp), %rax
movq %rax, 136(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z10MatrixMultiiiPfS_S_, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $168, %rsp
.cfi_adjust_cfa_offset -168
retq
.Lfunc_end0:
.size _Z25__device_stub__MatrixMultiiiPfS_S_, .Lfunc_end0-_Z25__device_stub__MatrixMultiiiPfS_S_
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $168, %rsp
.cfi_def_cfa_offset 224
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl $96, %edi
callq _Znam
movq %rax, %rbx
movl $168, %edi
callq _Znam
movq %rax, %r14
movl $112, %edi
callq _Znam
movq %rax, %r15
leaq 16(%rsp), %rdi
movl $96, %esi
callq hipMalloc
leaq 8(%rsp), %rdi
movl $168, %esi
callq hipMalloc
movq %rsp, %rdi
movl $112, %esi
callq hipMalloc
xorl %r12d, %r12d
.p2align 4, 0x90
.LBB1_1: # =>This Inner Loop Header: Depth=1
xorps %xmm0, %xmm0
cvtsi2ss %r12d, %xmm0
callq sinf
movss %xmm0, (%rbx,%r12,4)
incq %r12
cmpq $24, %r12
jne .LBB1_1
# %bb.2: # %.preheader90.preheader
xorl %r12d, %r12d
.p2align 4, 0x90
.LBB1_3: # %.preheader90
# =>This Inner Loop Header: Depth=1
xorps %xmm0, %xmm0
cvtsi2ss %r12d, %xmm0
callq cosf
movss %xmm0, (%r14,%r12,4)
incq %r12
cmpq $42, %r12
jne .LBB1_3
# %bb.4:
movq 16(%rsp), %rdi
movl $96, %edx
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
movq 8(%rsp), %rdi
movl $168, %edx
movq %r14, %rsi
movl $1, %ecx
callq hipMemcpy
movabsq $8589934594, %rdx # imm = 0x200000002
leaq 2(%rdx), %rdi
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_6
# %bb.5:
movq 16(%rsp), %rax
movq 8(%rsp), %rcx
movq (%rsp), %rdx
movl $4, 36(%rsp)
movl $6, 32(%rsp)
movl $7, 28(%rsp)
movq %rax, 104(%rsp)
movq %rcx, 96(%rsp)
movq %rdx, 88(%rsp)
leaq 36(%rsp), %rax
movq %rax, 112(%rsp)
leaq 32(%rsp), %rax
movq %rax, 120(%rsp)
leaq 28(%rsp), %rax
movq %rax, 128(%rsp)
leaq 104(%rsp), %rax
movq %rax, 136(%rsp)
leaq 96(%rsp), %rax
movq %rax, 144(%rsp)
leaq 88(%rsp), %rax
movq %rax, 152(%rsp)
leaq 72(%rsp), %rdi
leaq 56(%rsp), %rsi
leaq 48(%rsp), %rdx
leaq 40(%rsp), %rcx
callq __hipPopCallConfiguration
movq 72(%rsp), %rsi
movl 80(%rsp), %edx
movq 56(%rsp), %rcx
movl 64(%rsp), %r8d
leaq 112(%rsp), %r9
movl $_Z10MatrixMultiiiPfS_S_, %edi
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_6:
movq (%rsp), %rsi
movl $112, %edx
movq %r15, %rdi
movl $2, %ecx
callq hipMemcpy
movl $_ZSt4cout, %edi
movl $.L.str, %esi
movl $11, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
xorl %r12d, %r12d
movq %rbx, %r13
.p2align 4, 0x90
.LBB1_7: # %.preheader89
# =>This Loop Header: Depth=1
# Child Loop BB1_8 Depth 2
xorl %ebp, %ebp
.p2align 4, 0x90
.LBB1_8: # Parent Loop BB1_7 Depth=1
# => This Inner Loop Header: Depth=2
movss (%r13,%rbp,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $_ZSt4cout, %edi
callq _ZNSo9_M_insertIdEERSoT_
movl $.L.str.1, %esi
movl $1, %edx
movq %rax, %rdi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
incq %rbp
cmpq $6, %rbp
jne .LBB1_8
# %bb.9: # in Loop: Header=BB1_7 Depth=1
movl $_ZSt4cout, %edi
movl $.L.str.2, %esi
movl $1, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
incq %r12
addq $24, %r13
cmpq $4, %r12
jne .LBB1_7
# %bb.10:
movl $_ZSt4cout, %edi
movl $.L.str.3, %esi
movl $11, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
xorl %r12d, %r12d
movq %r14, %r13
.p2align 4, 0x90
.LBB1_11: # %.preheader88
# =>This Loop Header: Depth=1
# Child Loop BB1_12 Depth 2
xorl %ebp, %ebp
.p2align 4, 0x90
.LBB1_12: # Parent Loop BB1_11 Depth=1
# => This Inner Loop Header: Depth=2
movss (%r13,%rbp,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $_ZSt4cout, %edi
callq _ZNSo9_M_insertIdEERSoT_
movl $.L.str.1, %esi
movl $1, %edx
movq %rax, %rdi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
incq %rbp
cmpq $7, %rbp
jne .LBB1_12
# %bb.13: # in Loop: Header=BB1_11 Depth=1
movl $_ZSt4cout, %edi
movl $.L.str.2, %esi
movl $1, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
incq %r12
addq $28, %r13
cmpq $6, %r12
jne .LBB1_11
# %bb.14:
movl $_ZSt4cout, %edi
movl $.L.str.4, %esi
movl $11, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
xorl %r12d, %r12d
movq %r15, %r13
.p2align 4, 0x90
.LBB1_15: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB1_16 Depth 2
xorl %ebp, %ebp
.p2align 4, 0x90
.LBB1_16: # Parent Loop BB1_15 Depth=1
# => This Inner Loop Header: Depth=2
movss (%r13,%rbp,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $_ZSt4cout, %edi
callq _ZNSo9_M_insertIdEERSoT_
movl $.L.str.1, %esi
movl $1, %edx
movq %rax, %rdi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
incq %rbp
cmpq $7, %rbp
jne .LBB1_16
# %bb.17: # in Loop: Header=BB1_15 Depth=1
movl $_ZSt4cout, %edi
movl $.L.str.2, %esi
movl $1, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
incq %r12
addq $28, %r13
cmpq $4, %r12
jne .LBB1_15
# %bb.18:
movq 16(%rsp), %rdi
callq hipFree
movq 8(%rsp), %rdi
callq hipFree
movq (%rsp), %rdi
callq hipFree
movq %rbx, %rdi
callq _ZdaPv
movq %r14, %rdi
callq _ZdaPv
movq %r15, %rdi
callq _ZdaPv
xorl %eax, %eax
addq $168, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z10MatrixMultiiiPfS_S_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z10MatrixMultiiiPfS_S_,@object # @_Z10MatrixMultiiiPfS_S_
.section .rodata,"a",@progbits
.globl _Z10MatrixMultiiiPfS_S_
.p2align 3, 0x0
_Z10MatrixMultiiiPfS_S_:
.quad _Z25__device_stub__MatrixMultiiiPfS_S_
.size _Z10MatrixMultiiiPfS_S_, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "a matrix: \n"
.size .L.str, 12
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz " "
.size .L.str.1, 2
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "\n"
.size .L.str.2, 2
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "b matrix: \n"
.size .L.str.3, 12
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "c matrix: \n"
.size .L.str.4, 12
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z10MatrixMultiiiPfS_S_"
.size .L__unnamed_1, 24
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z25__device_stub__MatrixMultiiiPfS_S_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z10MatrixMultiiiPfS_S_
.addrsig_sym _ZSt4cout
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z10MatrixMultiiiPfS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000002500 */
/*0020*/ S2R R5, SR_TID.X ; /* 0x0000000000057919 */
/* 0x000e280000002100 */
/*0030*/ S2R R3, SR_CTAID.Y ; /* 0x0000000000037919 */
/* 0x000e680000002600 */
/*0040*/ S2R R2, SR_TID.Y ; /* 0x0000000000027919 */
/* 0x000e620000002200 */
/*0050*/ IMAD R0, R0, c[0x0][0x0], R5 ; /* 0x0000000000007a24 */
/* 0x001fca00078e0205 */
/*0060*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x168], PT ; /* 0x00005a0000007a0c */
/* 0x000fe20003f06270 */
/*0070*/ IMAD R3, R3, c[0x0][0x4], R2 ; /* 0x0000010003037a24 */
/* 0x002fca00078e0202 */
/*0080*/ ISETP.GE.OR P0, PT, R3, c[0x0][0x160], P0 ; /* 0x0000580003007a0c */
/* 0x000fda0000706670 */
/*0090*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*00a0*/ MOV R4, c[0x0][0x164] ; /* 0x0000590000047a02 */
/* 0x000fe20000000f00 */
/*00b0*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fe20000000a00 */
/*00c0*/ HFMA2.MMA R24, -RZ, RZ, 0, 0 ; /* 0x00000000ff187435 */
/* 0x000fe400000001ff */
/*00d0*/ ISETP.GE.AND P0, PT, R4, 0x1, PT ; /* 0x000000010400780c */
/* 0x000fda0003f06270 */
/*00e0*/ @!P0 BRA 0xc40 ; /* 0x00000b5000008947 */
/* 0x000fea0003800000 */
/*00f0*/ IADD3 R2, R4.reuse, -0x1, RZ ; /* 0xffffffff04027810 */
/* 0x040fe40007ffe0ff */
/*0100*/ LOP3.LUT R4, R4, 0x3, RZ, 0xc0, !PT ; /* 0x0000000304047812 */
/* 0x000fe400078ec0ff */
/*0110*/ ISETP.GE.U32.AND P0, PT, R2, 0x3, PT ; /* 0x000000030200780c */
/* 0x000fe40003f06070 */
/*0120*/ MOV R24, RZ ; /* 0x000000ff00187202 */
/* 0x000fe40000000f00 */
/*0130*/ MOV R2, RZ ; /* 0x000000ff00027202 */
/* 0x000fd20000000f00 */
/*0140*/ @!P0 BRA 0xb30 ; /* 0x000009e000008947 */
/* 0x000fea0003800000 */
/*0150*/ IADD3 R5, -R4, c[0x0][0x164], RZ ; /* 0x0000590004057a10 */
/* 0x000fe20007ffe1ff */
/*0160*/ HFMA2.MMA R9, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff097435 */
/* 0x000fe200000001ff */
/*0170*/ ULDC.64 UR6, c[0x0][0x170] ; /* 0x00005c0000067ab9 */
/* 0x000fe20000000a00 */
/*0180*/ HFMA2.MMA R2, -RZ, RZ, 0, 0 ; /* 0x00000000ff027435 */
/* 0x000fe200000001ff */
/*0190*/ ISETP.GT.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720c */
/* 0x000fe20003f04270 */
/*01a0*/ IMAD R6, R3, c[0x0][0x164], RZ ; /* 0x0000590003067a24 */
/* 0x000fe200078e02ff */
/*01b0*/ MOV R24, RZ ; /* 0x000000ff00187202 */
/* 0x000fca0000000f00 */
/*01c0*/ IMAD.WIDE R8, R0, R9, c[0x0][0x178] ; /* 0x00005e0000087625 */
/* 0x000fcc00078e0209 */
/*01d0*/ @!P0 BRA 0x990 ; /* 0x000007b000008947 */
/* 0x000fea0003800000 */
/*01e0*/ ISETP.GT.AND P1, PT, R5, 0xc, PT ; /* 0x0000000c0500780c */
/* 0x000fe40003f24270 */
/*01f0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ; /* 0x000000000000781c */
/* 0x000fd60003f0f070 */
/*0200*/ @!P1 BRA 0x6c0 ; /* 0x000004b000009947 */
/* 0x000fea0003800000 */
/*0210*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fe40003f0e170 */
/*0220*/ MOV R12, UR6 ; /* 0x00000006000c7c02 */
/* 0x000fe20008000f00 */
/*0230*/ LDG.E R21, [R8.64] ; /* 0x0000000408157981 */
/* 0x0000a2000c1e1900 */
/*0240*/ MOV R13, UR7 ; /* 0x00000007000d7c02 */
/* 0x000fca0008000f00 */
/*0250*/ IMAD.WIDE R12, R6, 0x4, R12 ; /* 0x00000004060c7825 */
/* 0x000fca00078e020c */
/*0260*/ LDG.E R20, [R12.64] ; /* 0x000000040c147981 */
/* 0x000ea2000c1e1900 */
/*0270*/ MOV R7, c[0x0][0x168] ; /* 0x00005a0000077a02 */
/* 0x000fc60000000f00 */
/*0280*/ LDG.E R14, [R12.64+0x4] ; /* 0x000004040c0e7981 */
/* 0x000ee4000c1e1900 */
/*0290*/ IMAD.WIDE R10, R7.reuse, 0x4, R8 ; /* 0x00000004070a7825 */
/* 0x040fe400078e0208 */
/*02a0*/ LDG.E R27, [R12.64+0x8] ; /* 0x000008040c1b7981 */
/* 0x000f28000c1e1900 */
/*02b0*/ LDG.E R15, [R10.64] ; /* 0x000000040a0f7981 */
/* 0x0002e2000c1e1900 */
/*02c0*/ IMAD.WIDE R22, R7, 0x4, R10 ; /* 0x0000000407167825 */
/* 0x000fc600078e020a */
/*02d0*/ LDG.E R18, [R12.64+0xc] ; /* 0x00000c040c127981 */
/* 0x000f66000c1e1900 */
/*02e0*/ IMAD.WIDE R28, R7.reuse, 0x4, R22 ; /* 0x00000004071c7825 */
/* 0x040fe200078e0216 */
/*02f0*/ LDG.E R26, [R22.64] ; /* 0x00000004161a7981 */
/* 0x000328000c1e1900 */
/*0300*/ LDG.E R19, [R28.64] ; /* 0x000000041c137981 */
/* 0x000362000c1e1900 */
/*0310*/ IMAD.WIDE R16, R7, 0x4, R28 ; /* 0x0000000407107825 */
/* 0x000fc600078e021c */
/*0320*/ LDG.E R8, [R12.64+0x10] ; /* 0x000010040c087981 */
/* 0x001f68000c1e1900 */
/*0330*/ LDG.E R9, [R16.64] ; /* 0x0000000410097981 */
/* 0x000168000c1e1900 */
/*0340*/ LDG.E R10, [R12.64+0x14] ; /* 0x000014040c0a7981 */
/* 0x002f68000c1e1900 */
/*0350*/ LDG.E R28, [R12.64+0x1c] ; /* 0x00001c040c1c7981 */
/* 0x000f62000c1e1900 */
/*0360*/ IMAD.WIDE R16, R7, 0x4, R16 ; /* 0x0000000407107825 */
/* 0x001fca00078e0210 */
/*0370*/ LDG.E R11, [R16.64] ; /* 0x00000004100b7981 */
/* 0x000562000c1e1900 */
/*0380*/ IMAD.WIDE R22, R7, 0x4, R16 ; /* 0x0000000407167825 */
/* 0x000fc800078e0210 */
/*0390*/ FFMA R16, R21, R20, R24 ; /* 0x0000001415107223 */
/* 0x004fe40000000018 */
/*03a0*/ LDG.E R20, [R12.64+0x18] ; /* 0x000018040c147981 */
/* 0x000ea2000c1e1900 */
/*03b0*/ IMAD.WIDE R24, R7, 0x4, R22 ; /* 0x0000000407187825 */
/* 0x000fc600078e0216 */
/*03c0*/ LDG.E R21, [R22.64] ; /* 0x0000000416157981 */
/* 0x0000a8000c1e1900 */
/*03d0*/ LDG.E R29, [R24.64] ; /* 0x00000004181d7981 */
/* 0x0002a2000c1e1900 */
/*03e0*/ FFMA R16, R15, R14, R16 ; /* 0x0000000e0f107223 */
/* 0x008fe40000000010 */
/*03f0*/ IMAD.WIDE R14, R7.reuse, 0x4, R24 ; /* 0x00000004070e7825 */
/* 0x040fe200078e0218 */
/*0400*/ LDG.E R23, [R12.64+0x20] ; /* 0x000020040c177981 */
/* 0x001ee6000c1e1900 */
/*0410*/ FFMA R26, R26, R27, R16 ; /* 0x0000001b1a1a7223 */
/* 0x010fe20000000010 */
/*0420*/ LDG.E R25, [R12.64+0x24] ; /* 0x000024040c197981 */
/* 0x002f22000c1e1900 */
/*0430*/ IMAD.WIDE R16, R7, 0x4, R14 ; /* 0x0000000407107825 */
/* 0x000fc600078e020e */
/*0440*/ LDG.E R14, [R14.64] ; /* 0x000000040e0e7981 */
/* 0x0000e2000c1e1900 */
/*0450*/ FFMA R26, R19, R18, R26 ; /* 0x00000012131a7223 */
/* 0x020fe4000000001a */
/*0460*/ IMAD.WIDE R18, R7, 0x4, R16 ; /* 0x0000000407127825 */
/* 0x000fe200078e0210 */
/*0470*/ LDG.E R22, [R12.64+0x28] ; /* 0x000028040c167981 */
/* 0x000f66000c1e1900 */
/*0480*/ FFMA R26, R9, R8, R26 ; /* 0x00000008091a7223 */
/* 0x000fe2000000001a */
/*0490*/ LDG.E R16, [R16.64] ; /* 0x0000000410107981 */
/* 0x000322000c1e1900 */
/*04a0*/ IMAD.WIDE R8, R7, 0x4, R18 ; /* 0x0000000407087825 */
/* 0x000fc600078e0212 */
/*04b0*/ LDG.E R18, [R18.64] ; /* 0x0000000412127981 */
/* 0x000368000c1e1900 */
/*04c0*/ LDG.E R24, [R8.64] ; /* 0x0000000408187981 */
/* 0x000568000c1e1900 */
/*04d0*/ LDG.E R15, [R12.64+0x2c] ; /* 0x00002c040c0f7981 */
/* 0x001f62000c1e1900 */
/*04e0*/ FFMA R26, R11, R10, R26 ; /* 0x0000000a0b1a7223 */
/* 0x000fe4000000001a */
/*04f0*/ IMAD.WIDE R10, R7, 0x4, R8 ; /* 0x00000004070a7825 */
/* 0x000fe200078e0208 */
/*0500*/ LDG.E R17, [R12.64+0x30] ; /* 0x000030040c117981 */
/* 0x002f66000c1e1900 */
/*0510*/ FFMA R26, R21, R20, R26 ; /* 0x00000014151a7223 */
/* 0x004fc4000000001a */
/*0520*/ IMAD.WIDE R20, R7, 0x4, R10 ; /* 0x0000000407147825 */
/* 0x000fe400078e020a */
/*0530*/ LDG.E R10, [R10.64] ; /* 0x000000040a0a7981 */
/* 0x0000a4000c1e1900 */
/*0540*/ FFMA R28, R29, R28, R26 ; /* 0x0000001c1d1c7223 */
/* 0x000fe4000000001a */
/*0550*/ IMAD.WIDE R26, R7.reuse, 0x4, R20 ; /* 0x00000004071a7825 */
/* 0x040fe200078e0214 */
/*0560*/ LDG.E R29, [R12.64+0x34] ; /* 0x000034040c1d7981 */
/* 0x000ea8000c1e1900 */
/*0570*/ LDG.E R20, [R20.64] ; /* 0x0000000414147981 */
/* 0x0002a2000c1e1900 */
/*0580*/ IMAD.WIDE R8, R7, 0x4, R26 ; /* 0x0000000407087825 */
/* 0x000fc600078e021a */
/*0590*/ LDG.E R19, [R26.64] ; /* 0x000000041a137981 */
/* 0x0006a8000c1e1900 */
/*05a0*/ LDG.E R11, [R8.64] ; /* 0x00000004080b7981 */
/* 0x0010a8000c1e1900 */
/*05b0*/ LDG.E R21, [R12.64+0x38] ; /* 0x000038040c157981 */
/* 0x002ea8000c1e1900 */
/*05c0*/ LDG.E R26, [R12.64+0x3c] ; /* 0x00003c040c1a7981 */
/* 0x008ee2000c1e1900 */
/*05d0*/ FFMA R14, R14, R23, R28 ; /* 0x000000170e0e7223 */
/* 0x000fc8000000001c */
/*05e0*/ FFMA R25, R16, R25, R14 ; /* 0x0000001910197223 */
/* 0x010fe2000000000e */
/*05f0*/ IADD3 R5, R5, -0x10, RZ ; /* 0xfffffff005057810 */
/* 0x000fc60007ffe0ff */
/*0600*/ FFMA R18, R18, R22, R25 ; /* 0x0000001612127223 */
/* 0x020fe20000000019 */
/*0610*/ ISETP.GT.AND P1, PT, R5, 0xc, PT ; /* 0x0000000c0500780c */
/* 0x000fc60003f24270 */
/*0620*/ FFMA R15, R24, R15, R18 ; /* 0x0000000f180f7223 */
/* 0x000fe20000000012 */
/*0630*/ UIADD3 UR6, UP0, UR6, 0x40, URZ ; /* 0x0000004006067890 */
/* 0x000fe2000ff1e03f */
/*0640*/ IMAD.WIDE R8, R7, 0x4, R8 ; /* 0x0000000407087825 */
/* 0x001fc600078e0208 */
/*0650*/ UIADD3.X UR7, URZ, UR7, URZ, UP0, !UPT ; /* 0x000000073f077290 */
/* 0x000fe200087fe43f */
/*0660*/ IADD3 R2, R2, 0x10, RZ ; /* 0x0000001002027810 */
/* 0x000fe20007ffe0ff */
/*0670*/ FFMA R10, R10, R17, R15 ; /* 0x000000110a0a7223 */
/* 0x004fc8000000000f */
/*0680*/ FFMA R10, R20, R29, R10 ; /* 0x0000001d140a7223 */
/* 0x000fc8000000000a */
/*0690*/ FFMA R10, R19, R21, R10 ; /* 0x00000015130a7223 */
/* 0x000fc8000000000a */
/*06a0*/ FFMA R24, R11, R26, R10 ; /* 0x0000001a0b187223 */
/* 0x008fe2000000000a */
/*06b0*/ @P1 BRA 0x220 ; /* 0xfffffb6000001947 */
/* 0x000fea000383ffff */
/*06c0*/ ISETP.GT.AND P1, PT, R5, 0x4, PT ; /* 0x000000040500780c */
/* 0x000fda0003f24270 */
/*06d0*/ @!P1 BRA 0x970 ; /* 0x0000029000009947 */
/* 0x000fea0003800000 */
/*06e0*/ MOV R7, c[0x0][0x168] ; /* 0x00005a0000077a02 */
/* 0x000fe20000000f00 */
/*06f0*/ LDG.E R23, [R8.64] ; /* 0x0000000408177981 */
/* 0x0000a2000c1e1900 */
/*0700*/ MOV R10, UR6 ; /* 0x00000006000a7c02 */
/* 0x000fe40008000f00 */
/*0710*/ MOV R11, UR7 ; /* 0x00000007000b7c02 */
/* 0x000fe20008000f00 */
/*0720*/ IMAD.WIDE R16, R7, 0x4, R8 ; /* 0x0000000407107825 */
/* 0x000fc800078e0208 */
/*0730*/ IMAD.WIDE R10, R6, 0x4, R10 ; /* 0x00000004060a7825 */
/* 0x000fc800078e020a */
/*0740*/ IMAD.WIDE R12, R7.reuse, 0x4, R16 ; /* 0x00000004070c7825 */
/* 0x040fe200078e0210 */
/*0750*/ LDG.E R22, [R10.64] ; /* 0x000000040a167981 */
/* 0x000ea8000c1e1900 */
/*0760*/ LDG.E R16, [R16.64] ; /* 0x0000000410107981 */
/* 0x0002e2000c1e1900 */
/*0770*/ IMAD.WIDE R14, R7, 0x4, R12 ; /* 0x00000004070e7825 */
/* 0x000fc600078e020c */
/*0780*/ LDG.E R25, [R10.64+0x4] ; /* 0x000004040a197981 */
/* 0x000ee6000c1e1900 */
/*0790*/ IMAD.WIDE R18, R7.reuse, 0x4, R14 ; /* 0x0000000407127825 */
/* 0x040fe200078e020e */
/*07a0*/ LDG.E R26, [R12.64] ; /* 0x000000040c1a7981 */
/* 0x000968000c1e1900 */
/*07b0*/ LDG.E R27, [R10.64+0x8] ; /* 0x000008040a1b7981 */
/* 0x000f62000c1e1900 */
/*07c0*/ IMAD.WIDE R20, R7, 0x4, R18 ; /* 0x0000000407147825 */
/* 0x000fc600078e0212 */
/*07d0*/ LDG.E R14, [R14.64] ; /* 0x000000040e0e7981 */
/* 0x000368000c1e1900 */
/*07e0*/ LDG.E R29, [R10.64+0xc] ; /* 0x00000c040a1d7981 */
/* 0x000f62000c1e1900 */
/*07f0*/ IMAD.WIDE R8, R7, 0x4, R20 ; /* 0x0000000407087825 */
/* 0x001fc600078e0214 */
/*0800*/ LDG.E R18, [R18.64] ; /* 0x0000000412127981 */
/* 0x000168000c1e1900 */
/*0810*/ LDG.E R28, [R10.64+0x10] ; /* 0x000010040a1c7981 */
/* 0x000f62000c1e1900 */
/*0820*/ IMAD.WIDE R12, R7, 0x4, R8 ; /* 0x00000004070c7825 */
/* 0x010fc600078e0208 */
/*0830*/ LDG.E R20, [R20.64] ; /* 0x0000000414147981 */
/* 0x000968000c1e1900 */
/*0840*/ LDG.E R15, [R10.64+0x14] ; /* 0x000014040a0f7981 */
/* 0x002f68000c1e1900 */
/*0850*/ LDG.E R17, [R8.64] ; /* 0x0000000408117981 */
/* 0x000368000c1e1900 */
/*0860*/ LDG.E R21, [R10.64+0x1c] ; /* 0x00001c040a157981 */
/* 0x010f28000c1e1900 */
/*0870*/ LDG.E R19, [R12.64] ; /* 0x000000040c137981 */
/* 0x001f28000c1e1900 */
/*0880*/ LDG.E R8, [R10.64+0x18] ; /* 0x000018040a087981 */
/* 0x002f22000c1e1900 */
/*0890*/ UIADD3 UR6, UP0, UR6, 0x20, URZ ; /* 0x0000002006067890 */
/* 0x000fe2000ff1e03f */
/*08a0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ; /* 0x000000000000781c */
/* 0x000fc40003f0e170 */
/*08b0*/ IADD3 R2, R2, 0x8, RZ ; /* 0x0000000802027810 */
/* 0x000fe40007ffe0ff */
/*08c0*/ IADD3 R5, R5, -0x8, RZ ; /* 0xfffffff805057810 */
/* 0x000fe20007ffe0ff */
/*08d0*/ UIADD3.X UR7, URZ, UR7, URZ, UP0, !UPT ; /* 0x000000073f077290 */
/* 0x000fe200087fe43f */
/*08e0*/ FFMA R22, R23, R22, R24 ; /* 0x0000001617167223 */
/* 0x004fc80000000018 */
/*08f0*/ FFMA R16, R16, R25, R22 ; /* 0x0000001910107223 */
/* 0x008fc80000000016 */
/*0900*/ FFMA R16, R26, R27, R16 ; /* 0x0000001b1a107223 */
/* 0x020fc80000000010 */
/*0910*/ FFMA R29, R14, R29, R16 ; /* 0x0000001d0e1d7223 */
/* 0x000fc80000000010 */
/*0920*/ FFMA R18, R18, R28, R29 ; /* 0x0000001c12127223 */
/* 0x000fc8000000001d */
/*0930*/ FFMA R15, R20, R15, R18 ; /* 0x0000000f140f7223 */
/* 0x000fc80000000012 */
/*0940*/ FFMA R24, R17, R8, R15 ; /* 0x0000000811187223 */
/* 0x010fe4000000000f */
/*0950*/ IMAD.WIDE R8, R7, 0x4, R12 ; /* 0x0000000407087825 */
/* 0x000fc800078e020c */
/*0960*/ FFMA R24, R19, R21, R24 ; /* 0x0000001513187223 */
/* 0x000fe40000000018 */
/*0970*/ ISETP.NE.OR P0, PT, R5, RZ, P0 ; /* 0x000000ff0500720c */
/* 0x000fda0000705670 */
/*0980*/ @!P0 BRA 0xb30 ; /* 0x000001a000008947 */
/* 0x000fea0003800000 */
/*0990*/ MOV R10, UR6 ; /* 0x00000006000a7c02 */
/* 0x000fe40008000f00 */
/*09a0*/ MOV R11, UR7 ; /* 0x00000007000b7c02 */
/* 0x000fe40008000f00 */
/*09b0*/ MOV R7, c[0x0][0x168] ; /* 0x00005a0000077a02 */
/* 0x000fc60000000f00 */
/*09c0*/ IMAD.WIDE R10, R6, 0x4, R10 ; /* 0x00000004060a7825 */
/* 0x000fc800078e020a */
/*09d0*/ IMAD.WIDE R16, R7.reuse, 0x4, R8 ; /* 0x0000000407107825 */
/* 0x040fe200078e0208 */
/*09e0*/ LDG.E R18, [R10.64] ; /* 0x000000040a127981 */
/* 0x000ea8000c1e1900 */
/*09f0*/ LDG.E R9, [R8.64] ; /* 0x0000000408097981 */
/* 0x000ea2000c1e1900 */
/*0a00*/ IMAD.WIDE R12, R7, 0x4, R16 ; /* 0x00000004070c7825 */
/* 0x000fc600078e0210 */
/*0a10*/ LDG.E R17, [R16.64] ; /* 0x0000000410117981 */
/* 0x000ee8000c1e1900 */
/*0a20*/ LDG.E R19, [R10.64+0x4] ; /* 0x000004040a137981 */
/* 0x000ee2000c1e1900 */
/*0a30*/ IMAD.WIDE R14, R7, 0x4, R12 ; /* 0x00000004070e7825 */
/* 0x000fc600078e020c */
/*0a40*/ LDG.E R21, [R12.64] ; /* 0x000000040c157981 */
/* 0x000f28000c1e1900 */
/*0a50*/ LDG.E R20, [R10.64+0x8] ; /* 0x000008040a147981 */
/* 0x000f28000c1e1900 */
/*0a60*/ LDG.E R22, [R10.64+0xc] ; /* 0x00000c040a167981 */
/* 0x000f68000c1e1900 */
/*0a70*/ LDG.E R23, [R14.64] ; /* 0x000000040e177981 */
/* 0x000f62000c1e1900 */
/*0a80*/ IADD3 R5, R5, -0x4, RZ ; /* 0xfffffffc05057810 */
/* 0x000fc80007ffe0ff */
/*0a90*/ ISETP.NE.AND P0, PT, R5, RZ, PT ; /* 0x000000ff0500720c */
/* 0x000fe20003f05270 */
/*0aa0*/ UIADD3 UR6, UP0, UR6, 0x10, URZ ; /* 0x0000001006067890 */
/* 0x000fe2000ff1e03f */
/*0ab0*/ IADD3 R2, R2, 0x4, RZ ; /* 0x0000000402027810 */
/* 0x000fc60007ffe0ff */
/*0ac0*/ UIADD3.X UR7, URZ, UR7, URZ, UP0, !UPT ; /* 0x000000073f077290 */
/* 0x000fe200087fe43f */
/*0ad0*/ FFMA R18, R9, R18, R24 ; /* 0x0000001209127223 */
/* 0x004fc80000000018 */
/*0ae0*/ FFMA R18, R17, R19, R18 ; /* 0x0000001311127223 */
/* 0x008fe40000000012 */
/*0af0*/ IMAD.WIDE R8, R7, 0x4, R14 ; /* 0x0000000407087825 */
/* 0x000fc800078e020e */
/*0b00*/ FFMA R18, R21, R20, R18 ; /* 0x0000001415127223 */
/* 0x010fc80000000012 */
/*0b10*/ FFMA R24, R23, R22, R18 ; /* 0x0000001617187223 */
/* 0x020fe20000000012 */
/*0b20*/ @P0 BRA 0x990 ; /* 0xfffffe6000000947 */
/* 0x000fea000383ffff */
/*0b30*/ ISETP.NE.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */
/* 0x000fda0003f05270 */
/*0b40*/ @!P0 BRA 0xc40 ; /* 0x000000f000008947 */
/* 0x000fea0003800000 */
/*0b50*/ HFMA2.MMA R9, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff097435 */
/* 0x000fe200000001ff */
/*0b60*/ IMAD R6, R3, c[0x0][0x164], R2 ; /* 0x0000590003067a24 */
/* 0x000fe400078e0202 */
/*0b70*/ IMAD R2, R2, c[0x0][0x168], R0 ; /* 0x00005a0002027a24 */
/* 0x000fce00078e0200 */
/*0b80*/ IMAD.WIDE R6, R6, R9, c[0x0][0x170] ; /* 0x00005c0006067625 */
/* 0x000fc800078e0209 */
/*0b90*/ IMAD.WIDE R8, R2, R9, c[0x0][0x178] ; /* 0x00005e0002087625 */
/* 0x000fca00078e0209 */
/*0ba0*/ LDG.E R5, [R8.64] ; /* 0x0000000408057981 */
/* 0x0000a8000c1e1900 */
/*0bb0*/ LDG.E R2, [R6.64] ; /* 0x0000000406027981 */
/* 0x0002a2000c1e1900 */
/*0bc0*/ IADD3 R4, R4, -0x1, RZ ; /* 0xffffffff04047810 */
/* 0x000fe40007ffe0ff */
/*0bd0*/ MOV R11, c[0x0][0x168] ; /* 0x00005a00000b7a02 */
/* 0x000fe40000000f00 */
/*0be0*/ ISETP.NE.AND P0, PT, R4, RZ, PT ; /* 0x000000ff0400720c */
/* 0x000fc60003f05270 */
/*0bf0*/ IMAD.WIDE R8, R11, 0x4, R8 ; /* 0x000000040b087825 */
/* 0x001fe200078e0208 */
/*0c00*/ IADD3 R6, P1, R6, 0x4, RZ ; /* 0x0000000406067810 */
/* 0x002fc80007f3e0ff */
/*0c10*/ IADD3.X R7, RZ, R7, RZ, P1, !PT ; /* 0x00000007ff077210 */
/* 0x000fe20000ffe4ff */
/*0c20*/ FFMA R24, R5, R2, R24 ; /* 0x0000000205187223 */
/* 0x004fc80000000018 */
/*0c30*/ @P0 BRA 0xba0 ; /* 0xffffff6000000947 */
/* 0x000fea000383ffff */
/*0c40*/ MOV R2, 0x4 ; /* 0x0000000400027802 */
/* 0x000fe20000000f00 */
/*0c50*/ IMAD R3, R3, c[0x0][0x168], R0 ; /* 0x00005a0003037a24 */
/* 0x000fc800078e0200 */
/*0c60*/ IMAD.WIDE R2, R3, R2, c[0x0][0x180] ; /* 0x0000600003027625 */
/* 0x000fca00078e0202 */
/*0c70*/ STG.E [R2.64], R24 ; /* 0x0000001802007986 */
/* 0x000fe2000c101904 */
/*0c80*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0c90*/ BRA 0xc90; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0ca0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0cb0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0cc0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0cd0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0ce0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0cf0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0d00*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0d10*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0d20*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0d30*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0d40*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0d50*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0d60*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0d70*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z10MatrixMultiiiPfS_S_
.globl _Z10MatrixMultiiiPfS_S_
.p2align 8
.type _Z10MatrixMultiiiPfS_S_,@function
_Z10MatrixMultiiiPfS_S_:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x34
s_load_b32 s4, s[0:1], 0x0
s_load_b32 s3, s[0:1], 0x8
v_bfe_u32 v2, v0, 10, 10
v_and_b32_e32 v3, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s5, s2, 16
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[0:1], null, s15, s5, v[2:3]
v_mad_u64_u32 v[1:2], null, s14, s2, v[3:4]
v_cmp_gt_i32_e32 vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_gt_i32_e64 s2, s3, v1
s_and_b32 s2, vcc_lo, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s4, s2
s_cbranch_execz .LBB0_6
s_load_b32 s2, s[0:1], 0x4
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s2, 1
s_cbranch_scc1 .LBB0_4
s_load_b128 s[4:7], s[0:1], 0x10
v_mul_lo_u32 v2, v0, s2
v_mov_b32_e32 v6, 0
v_mov_b32_e32 v4, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
.p2align 6
.LBB0_3:
v_ashrrev_i32_e32 v5, 31, v4
s_add_i32 s2, s2, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_cmp_eq_u32 s2, 0
v_lshlrev_b64 v[7:8], 2, v[4:5]
v_add_nc_u32_e32 v4, s3, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v7, vcc_lo, s6, v7
v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
global_load_b32 v5, v[2:3], off
global_load_b32 v7, v[7:8], off
v_add_co_u32 v2, vcc_lo, v2, 4
v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v6, v5, v7
s_cbranch_scc0 .LBB0_3
s_branch .LBB0_5
.LBB0_4:
v_mov_b32_e32 v6, 0
.LBB0_5:
s_load_b64 s[0:1], s[0:1], 0x20
v_mad_u64_u32 v[2:3], null, v0, s3, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[0:1], 2, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v6, off
.LBB0_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z10MatrixMultiiiPfS_S_
.amdhsa_group_segment_fixed_size 0
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 296
.amdhsa_user_sgpr_count 14
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 0
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 1
.amdhsa_next_free_vgpr 9
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z10MatrixMultiiiPfS_S_, .Lfunc_end0-_Z10MatrixMultiiiPfS_S_
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .offset: 0
.size: 4
.value_kind: by_value
- .offset: 4
.size: 4
.value_kind: by_value
- .offset: 8
.size: 4
.value_kind: by_value
- .address_space: global
.offset: 16
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 24
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 32
.size: 8
.value_kind: global_buffer
- .offset: 40
.size: 4
.value_kind: hidden_block_count_x
- .offset: 44
.size: 4
.value_kind: hidden_block_count_y
- .offset: 48
.size: 4
.value_kind: hidden_block_count_z
- .offset: 52
.size: 2
.value_kind: hidden_group_size_x
- .offset: 54
.size: 2
.value_kind: hidden_group_size_y
- .offset: 56
.size: 2
.value_kind: hidden_group_size_z
- .offset: 58
.size: 2
.value_kind: hidden_remainder_x
- .offset: 60
.size: 2
.value_kind: hidden_remainder_y
- .offset: 62
.size: 2
.value_kind: hidden_remainder_z
- .offset: 80
.size: 8
.value_kind: hidden_global_offset_x
- .offset: 88
.size: 8
.value_kind: hidden_global_offset_y
- .offset: 96
.size: 8
.value_kind: hidden_global_offset_z
- .offset: 104
.size: 2
.value_kind: hidden_grid_dims
.group_segment_fixed_size: 0
.kernarg_segment_align: 8
.kernarg_segment_size: 296
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z10MatrixMultiiiPfS_S_
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z10MatrixMultiiiPfS_S_.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 9
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00101d16_00000000-6_matrix_mult.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3672:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z37__device_stub__Z10MatrixMultiiiPfS_S_iiiPfS_S_
.type _Z37__device_stub__Z10MatrixMultiiiPfS_S_iiiPfS_S_, @function
_Z37__device_stub__Z10MatrixMultiiiPfS_S_iiiPfS_S_:
.LFB3694:
.cfi_startproc
endbr64
subq $184, %rsp
.cfi_def_cfa_offset 192
movl %edi, 44(%rsp)
movl %esi, 40(%rsp)
movl %edx, 36(%rsp)
movq %rcx, 24(%rsp)
movq %r8, 16(%rsp)
movq %r9, 8(%rsp)
movq %fs:40, %rax
movq %rax, 168(%rsp)
xorl %eax, %eax
leaq 44(%rsp), %rax
movq %rax, 112(%rsp)
leaq 40(%rsp), %rax
movq %rax, 120(%rsp)
leaq 36(%rsp), %rax
movq %rax, 128(%rsp)
leaq 24(%rsp), %rax
movq %rax, 136(%rsp)
leaq 16(%rsp), %rax
movq %rax, 144(%rsp)
leaq 8(%rsp), %rax
movq %rax, 152(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
movl $1, 72(%rsp)
movl $1, 76(%rsp)
movl $1, 80(%rsp)
movl $1, 84(%rsp)
leaq 56(%rsp), %rcx
leaq 48(%rsp), %rdx
leaq 76(%rsp), %rsi
leaq 64(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 168(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $184, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 56(%rsp)
.cfi_def_cfa_offset 200
pushq 56(%rsp)
.cfi_def_cfa_offset 208
leaq 128(%rsp), %r9
movq 92(%rsp), %rcx
movl 100(%rsp), %r8d
movq 80(%rsp), %rsi
movl 88(%rsp), %edx
leaq _Z10MatrixMultiiiPfS_S_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 192
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3694:
.size _Z37__device_stub__Z10MatrixMultiiiPfS_S_iiiPfS_S_, .-_Z37__device_stub__Z10MatrixMultiiiPfS_S_iiiPfS_S_
.globl _Z10MatrixMultiiiPfS_S_
.type _Z10MatrixMultiiiPfS_S_, @function
_Z10MatrixMultiiiPfS_S_:
.LFB3695:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z37__device_stub__Z10MatrixMultiiiPfS_S_iiiPfS_S_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3695:
.size _Z10MatrixMultiiiPfS_S_, .-_Z10MatrixMultiiiPfS_S_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "a matrix: \n"
.LC1:
.string " "
.LC2:
.string "\n"
.LC3:
.string "b matrix: \n"
.LC4:
.string "c matrix: \n"
.text
.globl main
.type main, @function
main:
.LFB3669:
.cfi_startproc
endbr64
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pushq %r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
pushq %r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
pushq %rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
pushq %rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
subq $88, %rsp
.cfi_def_cfa_offset 144
movq %fs:40, %rax
movq %rax, 72(%rsp)
xorl %eax, %eax
movl $96, %edi
call _Znam@PLT
movq %rax, %r13
movl $168, %edi
call _Znam@PLT
movq %rax, %rbp
movl $112, %edi
call _Znam@PLT
movq %rax, 8(%rsp)
movl $4, 48(%rsp)
movl $2, 52(%rsp)
movl $1, 56(%rsp)
movl $2, 60(%rsp)
movl $2, 64(%rsp)
movl $1, 68(%rsp)
leaq 24(%rsp), %rdi
movl $96, %esi
call cudaMalloc@PLT
leaq 32(%rsp), %rdi
movl $168, %esi
call cudaMalloc@PLT
leaq 40(%rsp), %rdi
movl $112, %esi
call cudaMalloc@PLT
movl $0, %ebx
.L12:
pxor %xmm0, %xmm0
cvtsi2ssl %ebx, %xmm0
call sinf@PLT
movss %xmm0, 0(%r13,%rbx,4)
addq $1, %rbx
cmpq $24, %rbx
jne .L12
movl $0, %ebx
.L13:
pxor %xmm0, %xmm0
cvtsi2ssl %ebx, %xmm0
call cosf@PLT
movss %xmm0, 0(%rbp,%rbx,4)
addq $1, %rbx
cmpq $42, %rbx
jne .L13
movl $1, %ecx
movl $96, %edx
movq %r13, %rsi
movq 24(%rsp), %rdi
call cudaMemcpy@PLT
movl $1, %ecx
movl $168, %edx
movq %rbp, %rsi
movq 32(%rsp), %rdi
call cudaMemcpy@PLT
movl 68(%rsp), %ecx
movl $0, %r9d
movl $0, %r8d
movq 60(%rsp), %rdx
movq 48(%rsp), %rdi
movl 56(%rsp), %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L31
.L14:
movl $2, %ecx
movl $112, %edx
movq 40(%rsp), %rsi
movq 8(%rsp), %rdi
call cudaMemcpy@PLT
leaq .LC0(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %r13, %r12
movl $0, (%rsp)
leaq _ZSt4cout(%rip), %r14
leaq .LC1(%rip), %r15
.L15:
movl $0, %ebx
.L16:
pxor %xmm0, %xmm0
cvtss2sd (%r12,%rbx,4), %xmm0
movq %r14, %rdi
call _ZNSo9_M_insertIdEERSoT_@PLT
movq %rax, %rdi
movl $1, %edx
movq %r15, %rsi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
addq $1, %rbx
cmpq $6, %rbx
jne .L16
movl $1, %edx
leaq .LC2(%rip), %rsi
movq %r14, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
addl $6, (%rsp)
movl (%rsp), %eax
addq $24, %r12
cmpl $24, %eax
jne .L15
leaq .LC3(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq %rbp, %r12
leaq 168(%rbp), %rax
movq %rax, (%rsp)
leaq _ZSt4cout(%rip), %r14
leaq .LC1(%rip), %r15
.L18:
movl $0, %ebx
.L19:
pxor %xmm0, %xmm0
cvtss2sd (%r12,%rbx,4), %xmm0
movq %r14, %rdi
call _ZNSo9_M_insertIdEERSoT_@PLT
movq %rax, %rdi
movl $1, %edx
movq %r15, %rsi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
addq $1, %rbx
cmpq $7, %rbx
jne .L19
movl $1, %edx
leaq .LC2(%rip), %rsi
movq %r14, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
addq $28, %r12
cmpq %r12, (%rsp)
jne .L18
leaq .LC4(%rip), %rsi
leaq _ZSt4cout(%rip), %rdi
call _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
movq 8(%rsp), %r12
movl $0, (%rsp)
leaq _ZSt4cout(%rip), %r14
leaq .LC1(%rip), %r15
.L21:
movl $0, %ebx
.L22:
pxor %xmm0, %xmm0
cvtss2sd (%r12,%rbx,4), %xmm0
movq %r14, %rdi
call _ZNSo9_M_insertIdEERSoT_@PLT
movq %rax, %rdi
movl $1, %edx
movq %r15, %rsi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
addq $1, %rbx
cmpq $7, %rbx
jne .L22
movl $1, %edx
leaq .LC2(%rip), %rsi
movq %r14, %rdi
call _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
addl $7, (%rsp)
movl (%rsp), %eax
addq $28, %r12
cmpl $28, %eax
jne .L21
movq 24(%rsp), %rdi
call cudaFree@PLT
movq 32(%rsp), %rdi
call cudaFree@PLT
movq 40(%rsp), %rdi
call cudaFree@PLT
movq %r13, %rdi
call _ZdaPv@PLT
movq %rbp, %rdi
call _ZdaPv@PLT
movq 8(%rsp), %rdi
call _ZdaPv@PLT
movq 72(%rsp), %rax
subq %fs:40, %rax
jne .L32
movl $0, %eax
addq $88, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %rbp
.cfi_def_cfa_offset 40
popq %r12
.cfi_def_cfa_offset 32
popq %r13
.cfi_def_cfa_offset 24
popq %r14
.cfi_def_cfa_offset 16
popq %r15
.cfi_def_cfa_offset 8
ret
.L31:
.cfi_restore_state
movq 40(%rsp), %r9
movq 32(%rsp), %r8
movq 24(%rsp), %rcx
movl $7, %edx
movl $6, %esi
movl $4, %edi
call _Z37__device_stub__Z10MatrixMultiiiPfS_S_iiiPfS_S_
jmp .L14
.L32:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE3669:
.size main, .-main
.section .rodata.str1.1
.LC5:
.string "_Z10MatrixMultiiiPfS_S_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3697:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC5(%rip), %rdx
movq %rdx, %rcx
leaq _Z10MatrixMultiiiPfS_S_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE3697:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "matrix_mult.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z25__device_stub__MatrixMultiiiPfS_S_ # -- Begin function _Z25__device_stub__MatrixMultiiiPfS_S_
.p2align 4, 0x90
.type _Z25__device_stub__MatrixMultiiiPfS_S_,@function
_Z25__device_stub__MatrixMultiiiPfS_S_: # @_Z25__device_stub__MatrixMultiiiPfS_S_
.cfi_startproc
# %bb.0:
subq $152, %rsp
.cfi_def_cfa_offset 160
movl %edi, 20(%rsp)
movl %esi, 16(%rsp)
movl %edx, 12(%rsp)
movq %rcx, 88(%rsp)
movq %r8, 80(%rsp)
movq %r9, 72(%rsp)
leaq 20(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
leaq 88(%rsp), %rax
movq %rax, 120(%rsp)
leaq 80(%rsp), %rax
movq %rax, 128(%rsp)
leaq 72(%rsp), %rax
movq %rax, 136(%rsp)
leaq 56(%rsp), %rdi
leaq 40(%rsp), %rsi
leaq 32(%rsp), %rdx
leaq 24(%rsp), %rcx
callq __hipPopCallConfiguration
movq 56(%rsp), %rsi
movl 64(%rsp), %edx
movq 40(%rsp), %rcx
movl 48(%rsp), %r8d
leaq 96(%rsp), %r9
movl $_Z10MatrixMultiiiPfS_S_, %edi
pushq 24(%rsp)
.cfi_adjust_cfa_offset 8
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $168, %rsp
.cfi_adjust_cfa_offset -168
retq
.Lfunc_end0:
.size _Z25__device_stub__MatrixMultiiiPfS_S_, .Lfunc_end0-_Z25__device_stub__MatrixMultiiiPfS_S_
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %r15
.cfi_def_cfa_offset 24
pushq %r14
.cfi_def_cfa_offset 32
pushq %r13
.cfi_def_cfa_offset 40
pushq %r12
.cfi_def_cfa_offset 48
pushq %rbx
.cfi_def_cfa_offset 56
subq $168, %rsp
.cfi_def_cfa_offset 224
.cfi_offset %rbx, -56
.cfi_offset %r12, -48
.cfi_offset %r13, -40
.cfi_offset %r14, -32
.cfi_offset %r15, -24
.cfi_offset %rbp, -16
movl $96, %edi
callq _Znam
movq %rax, %rbx
movl $168, %edi
callq _Znam
movq %rax, %r14
movl $112, %edi
callq _Znam
movq %rax, %r15
leaq 16(%rsp), %rdi
movl $96, %esi
callq hipMalloc
leaq 8(%rsp), %rdi
movl $168, %esi
callq hipMalloc
movq %rsp, %rdi
movl $112, %esi
callq hipMalloc
xorl %r12d, %r12d
.p2align 4, 0x90
.LBB1_1: # =>This Inner Loop Header: Depth=1
xorps %xmm0, %xmm0
cvtsi2ss %r12d, %xmm0
callq sinf
movss %xmm0, (%rbx,%r12,4)
incq %r12
cmpq $24, %r12
jne .LBB1_1
# %bb.2: # %.preheader90.preheader
xorl %r12d, %r12d
.p2align 4, 0x90
.LBB1_3: # %.preheader90
# =>This Inner Loop Header: Depth=1
xorps %xmm0, %xmm0
cvtsi2ss %r12d, %xmm0
callq cosf
movss %xmm0, (%r14,%r12,4)
incq %r12
cmpq $42, %r12
jne .LBB1_3
# %bb.4:
movq 16(%rsp), %rdi
movl $96, %edx
movq %rbx, %rsi
movl $1, %ecx
callq hipMemcpy
movq 8(%rsp), %rdi
movl $168, %edx
movq %r14, %rsi
movl $1, %ecx
callq hipMemcpy
movabsq $8589934594, %rdx # imm = 0x200000002
leaq 2(%rdx), %rdi
movl $1, %esi
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_6
# %bb.5:
movq 16(%rsp), %rax
movq 8(%rsp), %rcx
movq (%rsp), %rdx
movl $4, 36(%rsp)
movl $6, 32(%rsp)
movl $7, 28(%rsp)
movq %rax, 104(%rsp)
movq %rcx, 96(%rsp)
movq %rdx, 88(%rsp)
leaq 36(%rsp), %rax
movq %rax, 112(%rsp)
leaq 32(%rsp), %rax
movq %rax, 120(%rsp)
leaq 28(%rsp), %rax
movq %rax, 128(%rsp)
leaq 104(%rsp), %rax
movq %rax, 136(%rsp)
leaq 96(%rsp), %rax
movq %rax, 144(%rsp)
leaq 88(%rsp), %rax
movq %rax, 152(%rsp)
leaq 72(%rsp), %rdi
leaq 56(%rsp), %rsi
leaq 48(%rsp), %rdx
leaq 40(%rsp), %rcx
callq __hipPopCallConfiguration
movq 72(%rsp), %rsi
movl 80(%rsp), %edx
movq 56(%rsp), %rcx
movl 64(%rsp), %r8d
leaq 112(%rsp), %r9
movl $_Z10MatrixMultiiiPfS_S_, %edi
pushq 40(%rsp)
.cfi_adjust_cfa_offset 8
pushq 56(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_6:
movq (%rsp), %rsi
movl $112, %edx
movq %r15, %rdi
movl $2, %ecx
callq hipMemcpy
movl $_ZSt4cout, %edi
movl $.L.str, %esi
movl $11, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
xorl %r12d, %r12d
movq %rbx, %r13
.p2align 4, 0x90
.LBB1_7: # %.preheader89
# =>This Loop Header: Depth=1
# Child Loop BB1_8 Depth 2
xorl %ebp, %ebp
.p2align 4, 0x90
.LBB1_8: # Parent Loop BB1_7 Depth=1
# => This Inner Loop Header: Depth=2
movss (%r13,%rbp,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $_ZSt4cout, %edi
callq _ZNSo9_M_insertIdEERSoT_
movl $.L.str.1, %esi
movl $1, %edx
movq %rax, %rdi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
incq %rbp
cmpq $6, %rbp
jne .LBB1_8
# %bb.9: # in Loop: Header=BB1_7 Depth=1
movl $_ZSt4cout, %edi
movl $.L.str.2, %esi
movl $1, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
incq %r12
addq $24, %r13
cmpq $4, %r12
jne .LBB1_7
# %bb.10:
movl $_ZSt4cout, %edi
movl $.L.str.3, %esi
movl $11, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
xorl %r12d, %r12d
movq %r14, %r13
.p2align 4, 0x90
.LBB1_11: # %.preheader88
# =>This Loop Header: Depth=1
# Child Loop BB1_12 Depth 2
xorl %ebp, %ebp
.p2align 4, 0x90
.LBB1_12: # Parent Loop BB1_11 Depth=1
# => This Inner Loop Header: Depth=2
movss (%r13,%rbp,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $_ZSt4cout, %edi
callq _ZNSo9_M_insertIdEERSoT_
movl $.L.str.1, %esi
movl $1, %edx
movq %rax, %rdi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
incq %rbp
cmpq $7, %rbp
jne .LBB1_12
# %bb.13: # in Loop: Header=BB1_11 Depth=1
movl $_ZSt4cout, %edi
movl $.L.str.2, %esi
movl $1, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
incq %r12
addq $28, %r13
cmpq $6, %r12
jne .LBB1_11
# %bb.14:
movl $_ZSt4cout, %edi
movl $.L.str.4, %esi
movl $11, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
xorl %r12d, %r12d
movq %r15, %r13
.p2align 4, 0x90
.LBB1_15: # %.preheader
# =>This Loop Header: Depth=1
# Child Loop BB1_16 Depth 2
xorl %ebp, %ebp
.p2align 4, 0x90
.LBB1_16: # Parent Loop BB1_15 Depth=1
# => This Inner Loop Header: Depth=2
movss (%r13,%rbp,4), %xmm0 # xmm0 = mem[0],zero,zero,zero
cvtss2sd %xmm0, %xmm0
movl $_ZSt4cout, %edi
callq _ZNSo9_M_insertIdEERSoT_
movl $.L.str.1, %esi
movl $1, %edx
movq %rax, %rdi
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
incq %rbp
cmpq $7, %rbp
jne .LBB1_16
# %bb.17: # in Loop: Header=BB1_15 Depth=1
movl $_ZSt4cout, %edi
movl $.L.str.2, %esi
movl $1, %edx
callq _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
incq %r12
addq $28, %r13
cmpq $4, %r12
jne .LBB1_15
# %bb.18:
movq 16(%rsp), %rdi
callq hipFree
movq 8(%rsp), %rdi
callq hipFree
movq (%rsp), %rdi
callq hipFree
movq %rbx, %rdi
callq _ZdaPv
movq %r14, %rdi
callq _ZdaPv
movq %r15, %rdi
callq _ZdaPv
xorl %eax, %eax
addq $168, %rsp
.cfi_def_cfa_offset 56
popq %rbx
.cfi_def_cfa_offset 48
popq %r12
.cfi_def_cfa_offset 40
popq %r13
.cfi_def_cfa_offset 32
popq %r14
.cfi_def_cfa_offset 24
popq %r15
.cfi_def_cfa_offset 16
popq %rbp
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z10MatrixMultiiiPfS_S_, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z10MatrixMultiiiPfS_S_,@object # @_Z10MatrixMultiiiPfS_S_
.section .rodata,"a",@progbits
.globl _Z10MatrixMultiiiPfS_S_
.p2align 3, 0x0
_Z10MatrixMultiiiPfS_S_:
.quad _Z25__device_stub__MatrixMultiiiPfS_S_
.size _Z10MatrixMultiiiPfS_S_, 8
.type .L.str,@object # @.str
.section .rodata.str1.1,"aMS",@progbits,1
.L.str:
.asciz "a matrix: \n"
.size .L.str, 12
.type .L.str.1,@object # @.str.1
.L.str.1:
.asciz " "
.size .L.str.1, 2
.type .L.str.2,@object # @.str.2
.L.str.2:
.asciz "\n"
.size .L.str.2, 2
.type .L.str.3,@object # @.str.3
.L.str.3:
.asciz "b matrix: \n"
.size .L.str.3, 12
.type .L.str.4,@object # @.str.4
.L.str.4:
.asciz "c matrix: \n"
.size .L.str.4, 12
.type .L__unnamed_1,@object # @0
.L__unnamed_1:
.asciz "_Z10MatrixMultiiiPfS_S_"
.size .L__unnamed_1, 24
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z25__device_stub__MatrixMultiiiPfS_S_
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z10MatrixMultiiiPfS_S_
.addrsig_sym _ZSt4cout
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void erosionLayers3DKernel( unsigned short *d_dst, unsigned short *d_src, int w, int h, int d, int kernel_radius )
{
__shared__ unsigned short smem[ER_LAYERS_BLOCKDIM_X][ER_LAYERS_BLOCKDIM_Y][(ER_LAYERS_RESULT_STEPS + 2 * ER_LAYERS_HALO_STEPS) * ER_LAYERS_BLOCKDIM_Z + 1];
unsigned short *smem_thread = smem[threadIdx.x][threadIdx.y];
//Offset to the upper halo edge
const int baseX = blockIdx.x * ER_LAYERS_BLOCKDIM_X + threadIdx.x;
const int baseY = blockIdx.y * ER_LAYERS_BLOCKDIM_Y + threadIdx.y;
const int baseZ = (blockIdx.z * ER_LAYERS_RESULT_STEPS - ER_LAYERS_HALO_STEPS) * ER_LAYERS_BLOCKDIM_Z + threadIdx.z;
d_src += (baseZ * h + baseY) * w + baseX;
d_dst += (baseZ * h + baseY) * w + baseX;
const int pitch = w*h;
//Main data
#pragma unroll
for (int i = ER_LAYERS_HALO_STEPS; i < ER_LAYERS_HALO_STEPS + ER_LAYERS_RESULT_STEPS; i++) {
smem_thread[threadIdx.z + i * ER_LAYERS_BLOCKDIM_Z] = d_src[i * ER_LAYERS_BLOCKDIM_Z * pitch];
}
//Upper halo
#pragma unroll
for (int i = 0; i < ER_LAYERS_HALO_STEPS; i++) {
smem_thread[threadIdx.z + i * ER_LAYERS_BLOCKDIM_Z] = (baseZ + i * ER_LAYERS_BLOCKDIM_Z >= 0) ? d_src[i * ER_LAYERS_BLOCKDIM_Z * pitch] : 0;
}
//Lower halo
#pragma unroll
for (int i = ER_LAYERS_HALO_STEPS + ER_LAYERS_RESULT_STEPS; i < ER_LAYERS_HALO_STEPS + ER_LAYERS_RESULT_STEPS + ER_LAYERS_HALO_STEPS; i++) {
smem_thread[threadIdx.z + i * ER_LAYERS_BLOCKDIM_Z]= (baseZ + i * ER_LAYERS_BLOCKDIM_Z < d) ? d_src[i * ER_LAYERS_BLOCKDIM_Z * pitch] : 0;
}
//Compute and store results
__syncthreads();
#pragma unroll
for (int i = ER_LAYERS_HALO_STEPS; i < ER_LAYERS_HALO_STEPS + ER_LAYERS_RESULT_STEPS; i++) {
unsigned short *smem_kern = &smem_thread[threadIdx.z + i * ER_LAYERS_BLOCKDIM_Z - kernel_radius];
unsigned short val = smem_kern[0];
//#pragma unroll
for (int j = 1; j <= 2*kernel_radius; j++) {
val = min(val, smem_kern[j]);
}
d_dst[i * ER_LAYERS_BLOCKDIM_Z * pitch] = val;
}
} | .file "tmpxft_00012e33_00000000-6_erosionLayers3DKernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z47__device_stub__Z21erosionLayers3DKernelPtS_iiiiPtS_iiii
.type _Z47__device_stub__Z21erosionLayers3DKernelPtS_iiiiPtS_iiii, @function
_Z47__device_stub__Z21erosionLayers3DKernelPtS_iiiiPtS_iiii:
.LFB2051:
.cfi_startproc
endbr64
subq $168, %rsp
.cfi_def_cfa_offset 176
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movl %edx, 12(%rsp)
movl %ecx, 8(%rsp)
movl %r8d, 4(%rsp)
movl %r9d, (%rsp)
movq %fs:40, %rax
movq %rax, 152(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
leaq 8(%rsp), %rax
movq %rax, 120(%rsp)
leaq 4(%rsp), %rax
movq %rax, 128(%rsp)
movq %rsp, %rax
movq %rax, 136(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 152(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $168, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 184
pushq 40(%rsp)
.cfi_def_cfa_offset 192
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z21erosionLayers3DKernelPtS_iiii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 176
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z47__device_stub__Z21erosionLayers3DKernelPtS_iiiiPtS_iiii, .-_Z47__device_stub__Z21erosionLayers3DKernelPtS_iiiiPtS_iiii
.globl _Z21erosionLayers3DKernelPtS_iiii
.type _Z21erosionLayers3DKernelPtS_iiii, @function
_Z21erosionLayers3DKernelPtS_iiii:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z47__device_stub__Z21erosionLayers3DKernelPtS_iiiiPtS_iiii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z21erosionLayers3DKernelPtS_iiii, .-_Z21erosionLayers3DKernelPtS_iiii
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "_Z21erosionLayers3DKernelPtS_iiii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z21erosionLayers3DKernelPtS_iiii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void erosionLayers3DKernel( unsigned short *d_dst, unsigned short *d_src, int w, int h, int d, int kernel_radius )
{
__shared__ unsigned short smem[ER_LAYERS_BLOCKDIM_X][ER_LAYERS_BLOCKDIM_Y][(ER_LAYERS_RESULT_STEPS + 2 * ER_LAYERS_HALO_STEPS) * ER_LAYERS_BLOCKDIM_Z + 1];
unsigned short *smem_thread = smem[threadIdx.x][threadIdx.y];
//Offset to the upper halo edge
const int baseX = blockIdx.x * ER_LAYERS_BLOCKDIM_X + threadIdx.x;
const int baseY = blockIdx.y * ER_LAYERS_BLOCKDIM_Y + threadIdx.y;
const int baseZ = (blockIdx.z * ER_LAYERS_RESULT_STEPS - ER_LAYERS_HALO_STEPS) * ER_LAYERS_BLOCKDIM_Z + threadIdx.z;
d_src += (baseZ * h + baseY) * w + baseX;
d_dst += (baseZ * h + baseY) * w + baseX;
const int pitch = w*h;
//Main data
#pragma unroll
for (int i = ER_LAYERS_HALO_STEPS; i < ER_LAYERS_HALO_STEPS + ER_LAYERS_RESULT_STEPS; i++) {
smem_thread[threadIdx.z + i * ER_LAYERS_BLOCKDIM_Z] = d_src[i * ER_LAYERS_BLOCKDIM_Z * pitch];
}
//Upper halo
#pragma unroll
for (int i = 0; i < ER_LAYERS_HALO_STEPS; i++) {
smem_thread[threadIdx.z + i * ER_LAYERS_BLOCKDIM_Z] = (baseZ + i * ER_LAYERS_BLOCKDIM_Z >= 0) ? d_src[i * ER_LAYERS_BLOCKDIM_Z * pitch] : 0;
}
//Lower halo
#pragma unroll
for (int i = ER_LAYERS_HALO_STEPS + ER_LAYERS_RESULT_STEPS; i < ER_LAYERS_HALO_STEPS + ER_LAYERS_RESULT_STEPS + ER_LAYERS_HALO_STEPS; i++) {
smem_thread[threadIdx.z + i * ER_LAYERS_BLOCKDIM_Z]= (baseZ + i * ER_LAYERS_BLOCKDIM_Z < d) ? d_src[i * ER_LAYERS_BLOCKDIM_Z * pitch] : 0;
}
//Compute and store results
__syncthreads();
#pragma unroll
for (int i = ER_LAYERS_HALO_STEPS; i < ER_LAYERS_HALO_STEPS + ER_LAYERS_RESULT_STEPS; i++) {
unsigned short *smem_kern = &smem_thread[threadIdx.z + i * ER_LAYERS_BLOCKDIM_Z - kernel_radius];
unsigned short val = smem_kern[0];
//#pragma unroll
for (int j = 1; j <= 2*kernel_radius; j++) {
val = min(val, smem_kern[j]);
}
d_dst[i * ER_LAYERS_BLOCKDIM_Z * pitch] = val;
}
} | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void erosionLayers3DKernel( unsigned short *d_dst, unsigned short *d_src, int w, int h, int d, int kernel_radius )
{
__shared__ unsigned short smem[ER_LAYERS_BLOCKDIM_X][ER_LAYERS_BLOCKDIM_Y][(ER_LAYERS_RESULT_STEPS + 2 * ER_LAYERS_HALO_STEPS) * ER_LAYERS_BLOCKDIM_Z + 1];
unsigned short *smem_thread = smem[threadIdx.x][threadIdx.y];
//Offset to the upper halo edge
const int baseX = blockIdx.x * ER_LAYERS_BLOCKDIM_X + threadIdx.x;
const int baseY = blockIdx.y * ER_LAYERS_BLOCKDIM_Y + threadIdx.y;
const int baseZ = (blockIdx.z * ER_LAYERS_RESULT_STEPS - ER_LAYERS_HALO_STEPS) * ER_LAYERS_BLOCKDIM_Z + threadIdx.z;
d_src += (baseZ * h + baseY) * w + baseX;
d_dst += (baseZ * h + baseY) * w + baseX;
const int pitch = w*h;
//Main data
#pragma unroll
for (int i = ER_LAYERS_HALO_STEPS; i < ER_LAYERS_HALO_STEPS + ER_LAYERS_RESULT_STEPS; i++) {
smem_thread[threadIdx.z + i * ER_LAYERS_BLOCKDIM_Z] = d_src[i * ER_LAYERS_BLOCKDIM_Z * pitch];
}
//Upper halo
#pragma unroll
for (int i = 0; i < ER_LAYERS_HALO_STEPS; i++) {
smem_thread[threadIdx.z + i * ER_LAYERS_BLOCKDIM_Z] = (baseZ + i * ER_LAYERS_BLOCKDIM_Z >= 0) ? d_src[i * ER_LAYERS_BLOCKDIM_Z * pitch] : 0;
}
//Lower halo
#pragma unroll
for (int i = ER_LAYERS_HALO_STEPS + ER_LAYERS_RESULT_STEPS; i < ER_LAYERS_HALO_STEPS + ER_LAYERS_RESULT_STEPS + ER_LAYERS_HALO_STEPS; i++) {
smem_thread[threadIdx.z + i * ER_LAYERS_BLOCKDIM_Z]= (baseZ + i * ER_LAYERS_BLOCKDIM_Z < d) ? d_src[i * ER_LAYERS_BLOCKDIM_Z * pitch] : 0;
}
//Compute and store results
__syncthreads();
#pragma unroll
for (int i = ER_LAYERS_HALO_STEPS; i < ER_LAYERS_HALO_STEPS + ER_LAYERS_RESULT_STEPS; i++) {
unsigned short *smem_kern = &smem_thread[threadIdx.z + i * ER_LAYERS_BLOCKDIM_Z - kernel_radius];
unsigned short val = smem_kern[0];
//#pragma unroll
for (int j = 1; j <= 2*kernel_radius; j++) {
val = min(val, smem_kern[j]);
}
d_dst[i * ER_LAYERS_BLOCKDIM_Z * pitch] = val;
}
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void erosionLayers3DKernel( unsigned short *d_dst, unsigned short *d_src, int w, int h, int d, int kernel_radius )
{
__shared__ unsigned short smem[ER_LAYERS_BLOCKDIM_X][ER_LAYERS_BLOCKDIM_Y][(ER_LAYERS_RESULT_STEPS + 2 * ER_LAYERS_HALO_STEPS) * ER_LAYERS_BLOCKDIM_Z + 1];
unsigned short *smem_thread = smem[threadIdx.x][threadIdx.y];
//Offset to the upper halo edge
const int baseX = blockIdx.x * ER_LAYERS_BLOCKDIM_X + threadIdx.x;
const int baseY = blockIdx.y * ER_LAYERS_BLOCKDIM_Y + threadIdx.y;
const int baseZ = (blockIdx.z * ER_LAYERS_RESULT_STEPS - ER_LAYERS_HALO_STEPS) * ER_LAYERS_BLOCKDIM_Z + threadIdx.z;
d_src += (baseZ * h + baseY) * w + baseX;
d_dst += (baseZ * h + baseY) * w + baseX;
const int pitch = w*h;
//Main data
#pragma unroll
for (int i = ER_LAYERS_HALO_STEPS; i < ER_LAYERS_HALO_STEPS + ER_LAYERS_RESULT_STEPS; i++) {
smem_thread[threadIdx.z + i * ER_LAYERS_BLOCKDIM_Z] = d_src[i * ER_LAYERS_BLOCKDIM_Z * pitch];
}
//Upper halo
#pragma unroll
for (int i = 0; i < ER_LAYERS_HALO_STEPS; i++) {
smem_thread[threadIdx.z + i * ER_LAYERS_BLOCKDIM_Z] = (baseZ + i * ER_LAYERS_BLOCKDIM_Z >= 0) ? d_src[i * ER_LAYERS_BLOCKDIM_Z * pitch] : 0;
}
//Lower halo
#pragma unroll
for (int i = ER_LAYERS_HALO_STEPS + ER_LAYERS_RESULT_STEPS; i < ER_LAYERS_HALO_STEPS + ER_LAYERS_RESULT_STEPS + ER_LAYERS_HALO_STEPS; i++) {
smem_thread[threadIdx.z + i * ER_LAYERS_BLOCKDIM_Z]= (baseZ + i * ER_LAYERS_BLOCKDIM_Z < d) ? d_src[i * ER_LAYERS_BLOCKDIM_Z * pitch] : 0;
}
//Compute and store results
__syncthreads();
#pragma unroll
for (int i = ER_LAYERS_HALO_STEPS; i < ER_LAYERS_HALO_STEPS + ER_LAYERS_RESULT_STEPS; i++) {
unsigned short *smem_kern = &smem_thread[threadIdx.z + i * ER_LAYERS_BLOCKDIM_Z - kernel_radius];
unsigned short val = smem_kern[0];
//#pragma unroll
for (int j = 1; j <= 2*kernel_radius; j++) {
val = min(val, smem_kern[j]);
}
d_dst[i * ER_LAYERS_BLOCKDIM_Z * pitch] = val;
}
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z21erosionLayers3DKernelPtS_iiii
.globl _Z21erosionLayers3DKernelPtS_iiii
.p2align 8
.type _Z21erosionLayers3DKernelPtS_iiii,@function
_Z21erosionLayers3DKernelPtS_iiii:
s_load_b128 s[4:7], s[0:1], 0x8
v_bfe_u32 v4, v0, 20, 10
s_lshl_b32 s2, s15, 3
v_bfe_u32 v5, v0, 10, 10
v_and_b32_e32 v6, 0x3ff, v0
s_mov_b32 s3, exec_lo
v_add3_u32 v8, v4, s2, -8
s_lshl_b32 s2, s14, 3
v_mul_u32_u24_e32 v7, 50, v5
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v1, v8, s7
v_add3_u32 v1, s2, v5, v1
s_lshl_b32 s2, s13, 3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v1, v1, s6
v_add3_u32 v0, s2, v6, v1
s_mul_i32 s2, s7, s6
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
s_lshl_b32 s6, s2, 3
s_mul_i32 s8, s2, 12
v_ashrrev_i32_e32 v1, 31, v0
s_ashr_i32 s7, s6, 31
s_ashr_i32 s9, s8, 31
s_lshl_b64 s[6:7], s[6:7], 1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 1, v[0:1]
v_add_co_u32 v2, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
s_lshl_b64 s[4:5], s[8:9], 1
v_add_co_u32 v9, vcc_lo, v2, s6
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v10, vcc_lo, s7, v3, vcc_lo
v_add_co_u32 v11, vcc_lo, v2, s4
v_add_co_ci_u32_e32 v12, vcc_lo, s5, v3, vcc_lo
s_clause 0x1
global_load_u16 v13, v[9:10], off
global_load_u16 v12, v[11:12], off
v_mov_b32_e32 v11, 0
v_mad_u32_u24 v7, v6, 0x190, v7
v_mov_b32_e32 v9, 0
s_delay_alu instid0(VALU_DEP_2)
v_lshl_add_u32 v10, v4, 1, v7
s_waitcnt vmcnt(1)
ds_store_b16 v10, v13 offset:16
s_waitcnt vmcnt(0)
ds_store_b16 v10, v12 offset:24
v_cmpx_lt_i32_e32 -1, v8
s_cbranch_execz .LBB0_2
global_load_u16 v9, v[2:3], off
.LBB0_2:
s_or_b32 exec_lo, exec_lo, s3
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s3, exec_lo
s_waitcnt vmcnt(0)
ds_store_b16 v10, v9
v_cmpx_lt_i32_e32 -5, v8
s_cbranch_execz .LBB0_4
s_lshl_b32 s4, s2, 2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_ashr_i32 s5, s4, 31
s_lshl_b64 s[4:5], s[4:5], 1
s_delay_alu instid0(SALU_CYCLE_1)
v_add_co_u32 v11, vcc_lo, v2, s4
v_add_co_ci_u32_e32 v12, vcc_lo, s5, v3, vcc_lo
global_load_u16 v11, v[11:12], off
.LBB0_4:
s_or_b32 exec_lo, exec_lo, s3
s_load_b32 s3, s[0:1], 0x18
v_dual_mov_b32 v9, 0 :: v_dual_add_nc_u32 v12, 16, v8
s_waitcnt vmcnt(0)
ds_store_b16 v10, v11 offset:8
s_waitcnt lgkmcnt(0)
v_cmp_gt_i32_e32 vcc_lo, s3, v12
v_mov_b32_e32 v12, 0
s_and_saveexec_b32 s4, vcc_lo
s_cbranch_execz .LBB0_6
s_lshl_b32 s6, s2, 4
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_ashr_i32 s7, s6, 31
s_lshl_b64 s[6:7], s[6:7], 1
s_delay_alu instid0(SALU_CYCLE_1)
v_add_co_u32 v10, vcc_lo, v2, s6
v_add_co_ci_u32_e32 v11, vcc_lo, s7, v3, vcc_lo
global_load_u16 v12, v[10:11], off
.LBB0_6:
s_or_b32 exec_lo, exec_lo, s4
v_add_nc_u32_e32 v10, 20, v8
v_lshl_add_u32 v8, v4, 1, v7
s_delay_alu instid0(VALU_DEP_2)
v_cmp_gt_i32_e32 vcc_lo, s3, v10
s_waitcnt vmcnt(0)
ds_store_b16 v8, v12 offset:32
s_and_saveexec_b32 s3, vcc_lo
s_cbranch_execz .LBB0_8
s_mul_i32 s4, s2, 20
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_ashr_i32 s5, s4, 31
s_lshl_b64 s[4:5], s[4:5], 1
s_delay_alu instid0(SALU_CYCLE_1)
v_add_co_u32 v2, vcc_lo, v2, s4
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
global_load_u16 v9, v[2:3], off
.LBB0_8:
s_or_b32 exec_lo, exec_lo, s3
s_load_b32 s6, s[0:1], 0x1c
s_waitcnt vmcnt(0)
ds_store_b16 v8, v9 offset:40
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_subrev_nc_u32_e32 v3, s6, v4
s_lshl_b32 s4, s6, 1
s_cmp_gt_i32 s6, 0
s_cselect_b32 s5, -1, 0
s_delay_alu instid0(VALU_DEP_1)
v_lshl_add_u32 v2, v3, 1, v7
s_max_i32 s3, s4, 1
s_cmp_lt_i32 s6, 1
ds_load_u16 v2, v2 offset:16
s_cbranch_scc1 .LBB0_11
v_mul_u32_u24_e32 v8, 0x190, v6
v_mul_u32_u24_e32 v9, 50, v5
v_lshlrev_b32_e32 v10, 1, v4
s_mov_b32 s6, s3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add3_u32 v8, v8, v9, v10
v_subrev_nc_u32_e32 v8, s4, v8
s_delay_alu instid0(VALU_DEP_1)
v_add_nc_u32_e32 v8, 18, v8
.LBB0_10:
ds_load_u16 v9, v8
v_add_nc_u32_e32 v8, 2, v8
s_add_i32 s6, s6, -1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s6, 0
s_waitcnt lgkmcnt(0)
v_min_u16 v2, v2, v9
s_cbranch_scc0 .LBB0_10
.LBB0_11:
s_load_b64 s[0:1], s[0:1], 0x0
v_lshl_add_u32 v3, v3, 1, v7
v_lshlrev_b64 v[7:8], 1, v[0:1]
s_lshl_b32 s6, s2, 3
s_delay_alu instid0(SALU_CYCLE_1)
s_ashr_i32 s7, s6, 31
ds_load_u16 v0, v3 offset:24
s_lshl_b64 s[6:7], s[6:7], 1
s_waitcnt lgkmcnt(0)
v_add_co_u32 v1, vcc_lo, s0, v7
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v8, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v7, vcc_lo, v1, s6
v_add_co_ci_u32_e32 v8, vcc_lo, s7, v3, vcc_lo
s_and_not1_b32 vcc_lo, exec_lo, s5
global_store_b16 v[7:8], v2, off
s_cbranch_vccnz .LBB0_14
v_mul_u32_u24_e32 v2, 0x190, v6
v_mul_u32_u24_e32 v5, 50, v5
v_lshlrev_b32_e32 v4, 1, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add3_u32 v2, v2, v5, v4
v_subrev_nc_u32_e32 v2, s4, v2
s_delay_alu instid0(VALU_DEP_1)
v_add_nc_u32_e32 v2, 26, v2
.LBB0_13:
ds_load_u16 v4, v2
v_add_nc_u32_e32 v2, 2, v2
s_add_i32 s3, s3, -1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_lg_u32 s3, 0
s_waitcnt lgkmcnt(0)
v_min_u16 v0, v0, v4
s_cbranch_scc1 .LBB0_13
.LBB0_14:
s_mul_i32 s0, s2, 12
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_ashr_i32 s1, s0, 31
s_lshl_b64 s[0:1], s[0:1], 1
s_delay_alu instid0(SALU_CYCLE_1)
v_add_co_u32 v1, vcc_lo, v1, s0
v_add_co_ci_u32_e32 v2, vcc_lo, s1, v3, vcc_lo
global_store_b16 v[1:2], v0, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z21erosionLayers3DKernelPtS_iiii
.amdhsa_group_segment_fixed_size 3200
.amdhsa_private_segment_fixed_size 0
.amdhsa_kernarg_size 32
.amdhsa_user_sgpr_count 13
.amdhsa_user_sgpr_dispatch_ptr 0
.amdhsa_user_sgpr_queue_ptr 0
.amdhsa_user_sgpr_kernarg_segment_ptr 1
.amdhsa_user_sgpr_dispatch_id 0
.amdhsa_user_sgpr_private_segment_size 0
.amdhsa_wavefront_size32 1
.amdhsa_uses_dynamic_stack 0
.amdhsa_enable_private_segment 0
.amdhsa_system_sgpr_workgroup_id_x 1
.amdhsa_system_sgpr_workgroup_id_y 1
.amdhsa_system_sgpr_workgroup_id_z 1
.amdhsa_system_sgpr_workgroup_info 0
.amdhsa_system_vgpr_workitem_id 2
.amdhsa_next_free_vgpr 14
.amdhsa_next_free_sgpr 16
.amdhsa_float_round_mode_32 0
.amdhsa_float_round_mode_16_64 0
.amdhsa_float_denorm_mode_32 3
.amdhsa_float_denorm_mode_16_64 3
.amdhsa_dx10_clamp 1
.amdhsa_ieee_mode 1
.amdhsa_fp16_overflow 0
.amdhsa_workgroup_processor_mode 1
.amdhsa_memory_ordered 1
.amdhsa_forward_progress 0
.amdhsa_shared_vgpr_count 0
.amdhsa_exception_fp_ieee_invalid_op 0
.amdhsa_exception_fp_denorm_src 0
.amdhsa_exception_fp_ieee_div_zero 0
.amdhsa_exception_fp_ieee_overflow 0
.amdhsa_exception_fp_ieee_underflow 0
.amdhsa_exception_fp_ieee_inexact 0
.amdhsa_exception_int_div_zero 0
.end_amdhsa_kernel
.text
.Lfunc_end0:
.size _Z21erosionLayers3DKernelPtS_iiii, .Lfunc_end0-_Z21erosionLayers3DKernelPtS_iiii
.section .AMDGPU.csdata,"",@progbits
.text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym __hip_cuid_
.amdgpu_metadata
---
amdhsa.kernels:
- .args:
- .address_space: global
.offset: 0
.size: 8
.value_kind: global_buffer
- .address_space: global
.offset: 8
.size: 8
.value_kind: global_buffer
- .offset: 16
.size: 4
.value_kind: by_value
- .offset: 20
.size: 4
.value_kind: by_value
- .offset: 24
.size: 4
.value_kind: by_value
- .offset: 28
.size: 4
.value_kind: by_value
.group_segment_fixed_size: 3200
.kernarg_segment_align: 8
.kernarg_segment_size: 32
.language: OpenCL C
.language_version:
- 2
- 0
.max_flat_workgroup_size: 1024
.name: _Z21erosionLayers3DKernelPtS_iiii
.private_segment_fixed_size: 0
.sgpr_count: 18
.sgpr_spill_count: 0
.symbol: _Z21erosionLayers3DKernelPtS_iiii.kd
.uniform_work_group_size: 1
.uses_dynamic_stack: false
.vgpr_count: 14
.vgpr_spill_count: 0
.wavefront_size: 32
.workgroup_processor_mode: 1
amdhsa.target: amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
- 1
- 2
...
.end_amdgpu_metadata |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void erosionLayers3DKernel( unsigned short *d_dst, unsigned short *d_src, int w, int h, int d, int kernel_radius )
{
__shared__ unsigned short smem[ER_LAYERS_BLOCKDIM_X][ER_LAYERS_BLOCKDIM_Y][(ER_LAYERS_RESULT_STEPS + 2 * ER_LAYERS_HALO_STEPS) * ER_LAYERS_BLOCKDIM_Z + 1];
unsigned short *smem_thread = smem[threadIdx.x][threadIdx.y];
//Offset to the upper halo edge
const int baseX = blockIdx.x * ER_LAYERS_BLOCKDIM_X + threadIdx.x;
const int baseY = blockIdx.y * ER_LAYERS_BLOCKDIM_Y + threadIdx.y;
const int baseZ = (blockIdx.z * ER_LAYERS_RESULT_STEPS - ER_LAYERS_HALO_STEPS) * ER_LAYERS_BLOCKDIM_Z + threadIdx.z;
d_src += (baseZ * h + baseY) * w + baseX;
d_dst += (baseZ * h + baseY) * w + baseX;
const int pitch = w*h;
//Main data
#pragma unroll
for (int i = ER_LAYERS_HALO_STEPS; i < ER_LAYERS_HALO_STEPS + ER_LAYERS_RESULT_STEPS; i++) {
smem_thread[threadIdx.z + i * ER_LAYERS_BLOCKDIM_Z] = d_src[i * ER_LAYERS_BLOCKDIM_Z * pitch];
}
//Upper halo
#pragma unroll
for (int i = 0; i < ER_LAYERS_HALO_STEPS; i++) {
smem_thread[threadIdx.z + i * ER_LAYERS_BLOCKDIM_Z] = (baseZ + i * ER_LAYERS_BLOCKDIM_Z >= 0) ? d_src[i * ER_LAYERS_BLOCKDIM_Z * pitch] : 0;
}
//Lower halo
#pragma unroll
for (int i = ER_LAYERS_HALO_STEPS + ER_LAYERS_RESULT_STEPS; i < ER_LAYERS_HALO_STEPS + ER_LAYERS_RESULT_STEPS + ER_LAYERS_HALO_STEPS; i++) {
smem_thread[threadIdx.z + i * ER_LAYERS_BLOCKDIM_Z]= (baseZ + i * ER_LAYERS_BLOCKDIM_Z < d) ? d_src[i * ER_LAYERS_BLOCKDIM_Z * pitch] : 0;
}
//Compute and store results
__syncthreads();
#pragma unroll
for (int i = ER_LAYERS_HALO_STEPS; i < ER_LAYERS_HALO_STEPS + ER_LAYERS_RESULT_STEPS; i++) {
unsigned short *smem_kern = &smem_thread[threadIdx.z + i * ER_LAYERS_BLOCKDIM_Z - kernel_radius];
unsigned short val = smem_kern[0];
//#pragma unroll
for (int j = 1; j <= 2*kernel_radius; j++) {
val = min(val, smem_kern[j]);
}
d_dst[i * ER_LAYERS_BLOCKDIM_Z * pitch] = val;
}
} | .text
.file "erosionLayers3DKernel.hip"
.globl _Z36__device_stub__erosionLayers3DKernelPtS_iiii # -- Begin function _Z36__device_stub__erosionLayers3DKernelPtS_iiii
.p2align 4, 0x90
.type _Z36__device_stub__erosionLayers3DKernelPtS_iiii,@function
_Z36__device_stub__erosionLayers3DKernelPtS_iiii: # @_Z36__device_stub__erosionLayers3DKernelPtS_iiii
.cfi_startproc
# %bb.0:
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 12(%rsp)
movl %ecx, 8(%rsp)
movl %r8d, 4(%rsp)
movl %r9d, (%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 12(%rsp), %rax
movq %rax, 96(%rsp)
leaq 8(%rsp), %rax
movq %rax, 104(%rsp)
leaq 4(%rsp), %rax
movq %rax, 112(%rsp)
movq %rsp, %rax
movq %rax, 120(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z21erosionLayers3DKernelPtS_iiii, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $152, %rsp
.cfi_adjust_cfa_offset -152
retq
.Lfunc_end0:
.size _Z36__device_stub__erosionLayers3DKernelPtS_iiii, .Lfunc_end0-_Z36__device_stub__erosionLayers3DKernelPtS_iiii
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z21erosionLayers3DKernelPtS_iiii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z21erosionLayers3DKernelPtS_iiii,@object # @_Z21erosionLayers3DKernelPtS_iiii
.section .rodata,"a",@progbits
.globl _Z21erosionLayers3DKernelPtS_iiii
.p2align 3, 0x0
_Z21erosionLayers3DKernelPtS_iiii:
.quad _Z36__device_stub__erosionLayers3DKernelPtS_iiii
.size _Z21erosionLayers3DKernelPtS_iiii, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z21erosionLayers3DKernelPtS_iiii"
.size .L__unnamed_1, 34
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z36__device_stub__erosionLayers3DKernelPtS_iiii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z21erosionLayers3DKernelPtS_iiii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00012e33_00000000-6_erosionLayers3DKernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z47__device_stub__Z21erosionLayers3DKernelPtS_iiiiPtS_iiii
.type _Z47__device_stub__Z21erosionLayers3DKernelPtS_iiiiPtS_iiii, @function
_Z47__device_stub__Z21erosionLayers3DKernelPtS_iiiiPtS_iiii:
.LFB2051:
.cfi_startproc
endbr64
subq $168, %rsp
.cfi_def_cfa_offset 176
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movl %edx, 12(%rsp)
movl %ecx, 8(%rsp)
movl %r8d, 4(%rsp)
movl %r9d, (%rsp)
movq %fs:40, %rax
movq %rax, 152(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 12(%rsp), %rax
movq %rax, 112(%rsp)
leaq 8(%rsp), %rax
movq %rax, 120(%rsp)
leaq 4(%rsp), %rax
movq %rax, 128(%rsp)
movq %rsp, %rax
movq %rax, 136(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 152(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $168, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 184
pushq 40(%rsp)
.cfi_def_cfa_offset 192
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z21erosionLayers3DKernelPtS_iiii(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 176
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z47__device_stub__Z21erosionLayers3DKernelPtS_iiiiPtS_iiii, .-_Z47__device_stub__Z21erosionLayers3DKernelPtS_iiiiPtS_iiii
.globl _Z21erosionLayers3DKernelPtS_iiii
.type _Z21erosionLayers3DKernelPtS_iiii, @function
_Z21erosionLayers3DKernelPtS_iiii:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z47__device_stub__Z21erosionLayers3DKernelPtS_iiiiPtS_iiii
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z21erosionLayers3DKernelPtS_iiii, .-_Z21erosionLayers3DKernelPtS_iiii
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "_Z21erosionLayers3DKernelPtS_iiii"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z21erosionLayers3DKernelPtS_iiii(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "erosionLayers3DKernel.hip"
.globl _Z36__device_stub__erosionLayers3DKernelPtS_iiii # -- Begin function _Z36__device_stub__erosionLayers3DKernelPtS_iiii
.p2align 4, 0x90
.type _Z36__device_stub__erosionLayers3DKernelPtS_iiii,@function
_Z36__device_stub__erosionLayers3DKernelPtS_iiii: # @_Z36__device_stub__erosionLayers3DKernelPtS_iiii
.cfi_startproc
# %bb.0:
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 72(%rsp)
movq %rsi, 64(%rsp)
movl %edx, 12(%rsp)
movl %ecx, 8(%rsp)
movl %r8d, 4(%rsp)
movl %r9d, (%rsp)
leaq 72(%rsp), %rax
movq %rax, 80(%rsp)
leaq 64(%rsp), %rax
movq %rax, 88(%rsp)
leaq 12(%rsp), %rax
movq %rax, 96(%rsp)
leaq 8(%rsp), %rax
movq %rax, 104(%rsp)
leaq 4(%rsp), %rax
movq %rax, 112(%rsp)
movq %rsp, %rax
movq %rax, 120(%rsp)
leaq 48(%rsp), %rdi
leaq 32(%rsp), %rsi
leaq 24(%rsp), %rdx
leaq 16(%rsp), %rcx
callq __hipPopCallConfiguration
movq 48(%rsp), %rsi
movl 56(%rsp), %edx
movq 32(%rsp), %rcx
movl 40(%rsp), %r8d
leaq 80(%rsp), %r9
movl $_Z21erosionLayers3DKernelPtS_iiii, %edi
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
pushq 32(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $152, %rsp
.cfi_adjust_cfa_offset -152
retq
.Lfunc_end0:
.size _Z36__device_stub__erosionLayers3DKernelPtS_iiii, .Lfunc_end0-_Z36__device_stub__erosionLayers3DKernelPtS_iiii
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB1_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB1_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z21erosionLayers3DKernelPtS_iiii, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end1:
.size __hip_module_ctor, .Lfunc_end1-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB2_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB2_2:
retq
.Lfunc_end2:
.size __hip_module_dtor, .Lfunc_end2-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z21erosionLayers3DKernelPtS_iiii,@object # @_Z21erosionLayers3DKernelPtS_iiii
.section .rodata,"a",@progbits
.globl _Z21erosionLayers3DKernelPtS_iiii
.p2align 3, 0x0
_Z21erosionLayers3DKernelPtS_iiii:
.quad _Z36__device_stub__erosionLayers3DKernelPtS_iiii
.size _Z21erosionLayers3DKernelPtS_iiii, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z21erosionLayers3DKernelPtS_iiii"
.size .L__unnamed_1, 34
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z36__device_stub__erosionLayers3DKernelPtS_iiii
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z21erosionLayers3DKernelPtS_iiii
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "stdio.h"
__global__ void helloFromGPU(void) {
printf("Hello World from thread %d\n", threadIdx.x);
}
int main()
{
printf("Hello World from CPU\n");
helloFromGPU<<<10, 10>>>();
cudaDeviceReset();
// cudaDeviceSynchronize();
return 0;
} | code for sm_80
Function : _Z12helloFromGPUv
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fc800078e00ff */
/*0010*/ S2R R8, SR_TID.X ; /* 0x0000000000087919 */
/* 0x000e220000002100 */
/*0020*/ IADD3 R1, R1, -0x8, RZ ; /* 0xfffffff801017810 */
/* 0x000fe20007ffe0ff */
/*0030*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x4][0x8] ; /* 0x01000200ff047624 */
/* 0x000fe200078e00ff */
/*0040*/ MOV R0, 0x0 ; /* 0x0000000000007802 */
/* 0x000fe20000000f00 */
/*0050*/ IMAD.MOV.U32 R5, RZ, RZ, c[0x4][0xc] ; /* 0x01000300ff057624 */
/* 0x000fe200078e00ff */
/*0060*/ IADD3 R6, P0, R1, c[0x0][0x20], RZ ; /* 0x0000080001067a10 */
/* 0x000fe40007f1e0ff */
/*0070*/ LDC.64 R2, c[0x4][R0] ; /* 0x0100000000027b82 */
/* 0x0002a60000000a00 */
/*0080*/ IMAD.X R7, RZ, RZ, c[0x0][0x24], P0 ; /* 0x00000900ff077624 */
/* 0x000fe200000e06ff */
/*0090*/ STL [R1], R8 ; /* 0x0000000801007387 */
/* 0x0013e80000100800 */
/*00a0*/ LEPC R8 ; /* 0x000000000008734e */
/* 0x002fc60000000000 */
/*00b0*/ MOV R11, 0x120 ; /* 0x00000120000b7802 */
/* 0x000fe40000000f00 */
/*00c0*/ MOV R20, 0xa0 ; /* 0x000000a000147802 */
/* 0x000fc40000000f00 */
/*00d0*/ MOV R21, 0x0 ; /* 0x0000000000157802 */
/* 0x000fe40000000f00 */
/*00e0*/ MOV R0, 0x0 ; /* 0x0000000000007802 */
/* 0x000fe40000000f00 */
/*00f0*/ IADD3 R20, P0, P1, -R20, R11, R8 ; /* 0x0000000b14147210 */
/* 0x000fc8000791e108 */
/*0100*/ IADD3.X R21, ~R0, R21, R9, P0, P1 ; /* 0x0000001500157210 */
/* 0x000fc800007e2509 */
/*0110*/ CALL.ABS.NOINC R2 ; /* 0x0000000002007343 */
/* 0x004fea0003c00000 */
/*0120*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0130*/ BRA 0x130; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0180*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0190*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "stdio.h"
__global__ void helloFromGPU(void) {
printf("Hello World from thread %d\n", threadIdx.x);
}
int main()
{
printf("Hello World from CPU\n");
helloFromGPU<<<10, 10>>>();
cudaDeviceReset();
// cudaDeviceSynchronize();
return 0;
} | .file "tmpxft_000586f4_00000000-6_hello.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z31__device_stub__Z12helloFromGPUvv
.type _Z31__device_stub__Z12helloFromGPUvv, @function
_Z31__device_stub__Z12helloFromGPUvv:
.LFB2082:
.cfi_startproc
endbr64
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %fs:40, %rax
movq %rax, 72(%rsp)
xorl %eax, %eax
movl $1, 16(%rsp)
movl $1, 20(%rsp)
movl $1, 24(%rsp)
movl $1, 28(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
leaq 8(%rsp), %rcx
movq %rsp, %rdx
leaq 28(%rsp), %rsi
leaq 16(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 72(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $88, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 8(%rsp)
.cfi_def_cfa_offset 104
pushq 8(%rsp)
.cfi_def_cfa_offset 112
leaq 80(%rsp), %r9
movq 44(%rsp), %rcx
movl 52(%rsp), %r8d
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
leaq _Z12helloFromGPUv(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 96
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z31__device_stub__Z12helloFromGPUvv, .-_Z31__device_stub__Z12helloFromGPUvv
.globl _Z12helloFromGPUv
.type _Z12helloFromGPUv, @function
_Z12helloFromGPUv:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z31__device_stub__Z12helloFromGPUvv
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z12helloFromGPUv, .-_Z12helloFromGPUv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Hello World from CPU\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
subq $40, %rsp
.cfi_def_cfa_offset 48
leaq .LC0(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $10, 20(%rsp)
movl $1, 24(%rsp)
movl $10, 8(%rsp)
movl $1, 12(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 20(%rsp), %rdx
movl $1, %ecx
movq 8(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L14
.L12:
call cudaDeviceReset@PLT
movl $0, %eax
addq $40, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L14:
.cfi_restore_state
call _Z31__device_stub__Z12helloFromGPUvv
jmp .L12
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.1
.LC1:
.string "_Z12helloFromGPUv"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC1(%rip), %rdx
movq %rdx, %rcx
leaq _Z12helloFromGPUv(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "stdio.h"
__global__ void helloFromGPU(void) {
printf("Hello World from thread %d\n", threadIdx.x);
}
int main()
{
printf("Hello World from CPU\n");
helloFromGPU<<<10, 10>>>();
cudaDeviceReset();
// cudaDeviceSynchronize();
return 0;
} | #include <hip/hip_runtime.h>
#include "stdio.h"
__global__ void helloFromGPU(void) {
printf("Hello World from thread %d\n", threadIdx.x);
}
int main()
{
printf("Hello World from CPU\n");
helloFromGPU<<<10, 10>>>();
hipDeviceReset();
// cudaDeviceSynchronize();
return 0;
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "stdio.h"
__global__ void helloFromGPU(void) {
printf("Hello World from thread %d\n", threadIdx.x);
}
int main()
{
printf("Hello World from CPU\n");
helloFromGPU<<<10, 10>>>();
hipDeviceReset();
// cudaDeviceSynchronize();
return 0;
} | .text
.file "hello.hip"
.globl _Z27__device_stub__helloFromGPUv # -- Begin function _Z27__device_stub__helloFromGPUv
.p2align 4, 0x90
.type _Z27__device_stub__helloFromGPUv,@function
_Z27__device_stub__helloFromGPUv: # @_Z27__device_stub__helloFromGPUv
.cfi_startproc
# %bb.0:
subq $56, %rsp
.cfi_def_cfa_offset 64
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 48(%rsp), %r9
movl $_Z12helloFromGPUv, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $72, %rsp
.cfi_adjust_cfa_offset -72
retq
.Lfunc_end0:
.size _Z27__device_stub__helloFromGPUv, .Lfunc_end0-_Z27__device_stub__helloFromGPUv
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
subq $56, %rsp
.cfi_def_cfa_offset 64
movl $.Lstr, %edi
callq puts@PLT
movabsq $4294967306, %rdi # imm = 0x10000000A
movl $1, %esi
movq %rdi, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_2
# %bb.1:
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 48(%rsp), %r9
movl $_Z12helloFromGPUv, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_2:
callq hipDeviceReset
xorl %eax, %eax
addq $56, %rsp
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z12helloFromGPUv, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z12helloFromGPUv,@object # @_Z12helloFromGPUv
.section .rodata,"a",@progbits
.globl _Z12helloFromGPUv
.p2align 3, 0x0
_Z12helloFromGPUv:
.quad _Z27__device_stub__helloFromGPUv
.size _Z12helloFromGPUv, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z12helloFromGPUv"
.size .L__unnamed_1, 18
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "Hello World from CPU"
.size .Lstr, 21
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z27__device_stub__helloFromGPUv
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z12helloFromGPUv
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000586f4_00000000-6_hello.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2060:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z31__device_stub__Z12helloFromGPUvv
.type _Z31__device_stub__Z12helloFromGPUvv, @function
_Z31__device_stub__Z12helloFromGPUvv:
.LFB2082:
.cfi_startproc
endbr64
subq $88, %rsp
.cfi_def_cfa_offset 96
movq %fs:40, %rax
movq %rax, 72(%rsp)
xorl %eax, %eax
movl $1, 16(%rsp)
movl $1, 20(%rsp)
movl $1, 24(%rsp)
movl $1, 28(%rsp)
movl $1, 32(%rsp)
movl $1, 36(%rsp)
leaq 8(%rsp), %rcx
movq %rsp, %rdx
leaq 28(%rsp), %rsi
leaq 16(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 72(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $88, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 8(%rsp)
.cfi_def_cfa_offset 104
pushq 8(%rsp)
.cfi_def_cfa_offset 112
leaq 80(%rsp), %r9
movq 44(%rsp), %rcx
movl 52(%rsp), %r8d
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
leaq _Z12helloFromGPUv(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 96
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2082:
.size _Z31__device_stub__Z12helloFromGPUvv, .-_Z31__device_stub__Z12helloFromGPUvv
.globl _Z12helloFromGPUv
.type _Z12helloFromGPUv, @function
_Z12helloFromGPUv:
.LFB2083:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z31__device_stub__Z12helloFromGPUvv
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2083:
.size _Z12helloFromGPUv, .-_Z12helloFromGPUv
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Hello World from CPU\n"
.text
.globl main
.type main, @function
main:
.LFB2057:
.cfi_startproc
endbr64
subq $40, %rsp
.cfi_def_cfa_offset 48
leaq .LC0(%rip), %rsi
movl $2, %edi
movl $0, %eax
call __printf_chk@PLT
movl $10, 20(%rsp)
movl $1, 24(%rsp)
movl $10, 8(%rsp)
movl $1, 12(%rsp)
movl $0, %r9d
movl $0, %r8d
movq 20(%rsp), %rdx
movl $1, %ecx
movq 8(%rsp), %rdi
movl $1, %esi
call __cudaPushCallConfiguration@PLT
testl %eax, %eax
je .L14
.L12:
call cudaDeviceReset@PLT
movl $0, %eax
addq $40, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L14:
.cfi_restore_state
call _Z31__device_stub__Z12helloFromGPUvv
jmp .L12
.cfi_endproc
.LFE2057:
.size main, .-main
.section .rodata.str1.1
.LC1:
.string "_Z12helloFromGPUv"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC1(%rip), %rdx
movq %rdx, %rcx
leaq _Z12helloFromGPUv(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2085:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: | .text
.file "hello.hip"
.globl _Z27__device_stub__helloFromGPUv # -- Begin function _Z27__device_stub__helloFromGPUv
.p2align 4, 0x90
.type _Z27__device_stub__helloFromGPUv,@function
_Z27__device_stub__helloFromGPUv: # @_Z27__device_stub__helloFromGPUv
.cfi_startproc
# %bb.0:
subq $56, %rsp
.cfi_def_cfa_offset 64
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 48(%rsp), %r9
movl $_Z12helloFromGPUv, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $72, %rsp
.cfi_adjust_cfa_offset -72
retq
.Lfunc_end0:
.size _Z27__device_stub__helloFromGPUv, .Lfunc_end0-_Z27__device_stub__helloFromGPUv
.cfi_endproc
# -- End function
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
subq $56, %rsp
.cfi_def_cfa_offset 64
movl $.Lstr, %edi
callq puts@PLT
movabsq $4294967306, %rdi # imm = 0x10000000A
movl $1, %esi
movq %rdi, %rdx
movl $1, %ecx
xorl %r8d, %r8d
xorl %r9d, %r9d
callq __hipPushCallConfiguration
testl %eax, %eax
jne .LBB1_2
# %bb.1:
leaq 32(%rsp), %rdi
leaq 16(%rsp), %rsi
leaq 8(%rsp), %rdx
movq %rsp, %rcx
callq __hipPopCallConfiguration
movq 32(%rsp), %rsi
movl 40(%rsp), %edx
movq 16(%rsp), %rcx
movl 24(%rsp), %r8d
leaq 48(%rsp), %r9
movl $_Z12helloFromGPUv, %edi
pushq (%rsp)
.cfi_adjust_cfa_offset 8
pushq 16(%rsp)
.cfi_adjust_cfa_offset 8
callq hipLaunchKernel
addq $16, %rsp
.cfi_adjust_cfa_offset -16
.LBB1_2:
callq hipDeviceReset
xorl %eax, %eax
addq $56, %rsp
.cfi_def_cfa_offset 8
retq
.Lfunc_end1:
.size main, .Lfunc_end1-main
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_ctor
.type __hip_module_ctor,@function
__hip_module_ctor: # @__hip_module_ctor
.cfi_startproc
# %bb.0:
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $0, __hip_gpubin_handle(%rip)
jne .LBB2_2
# %bb.1:
movl $__hip_fatbin_wrapper, %edi
callq __hipRegisterFatBinary
movq %rax, __hip_gpubin_handle(%rip)
.LBB2_2:
movq __hip_gpubin_handle(%rip), %rdi
xorps %xmm0, %xmm0
movups %xmm0, 16(%rsp)
movups %xmm0, (%rsp)
movl $_Z12helloFromGPUv, %esi
movl $.L__unnamed_1, %edx
movl $.L__unnamed_1, %ecx
movl $-1, %r8d
xorl %r9d, %r9d
callq __hipRegisterFunction
movl $__hip_module_dtor, %edi
addq $40, %rsp
.cfi_def_cfa_offset 8
jmp atexit # TAILCALL
.Lfunc_end2:
.size __hip_module_ctor, .Lfunc_end2-__hip_module_ctor
.cfi_endproc
# -- End function
.p2align 4, 0x90 # -- Begin function __hip_module_dtor
.type __hip_module_dtor,@function
__hip_module_dtor: # @__hip_module_dtor
.cfi_startproc
# %bb.0:
movq __hip_gpubin_handle(%rip), %rdi
testq %rdi, %rdi
je .LBB3_2
# %bb.1:
pushq %rax
.cfi_def_cfa_offset 16
callq __hipUnregisterFatBinary
movq $0, __hip_gpubin_handle(%rip)
addq $8, %rsp
.cfi_def_cfa_offset 8
.LBB3_2:
retq
.Lfunc_end3:
.size __hip_module_dtor, .Lfunc_end3-__hip_module_dtor
.cfi_endproc
# -- End function
.type _Z12helloFromGPUv,@object # @_Z12helloFromGPUv
.section .rodata,"a",@progbits
.globl _Z12helloFromGPUv
.p2align 3, 0x0
_Z12helloFromGPUv:
.quad _Z27__device_stub__helloFromGPUv
.size _Z12helloFromGPUv, 8
.type .L__unnamed_1,@object # @0
.section .rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
.asciz "_Z12helloFromGPUv"
.size .L__unnamed_1, 18
.type __hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper
.section .hipFatBinSegment,"a",@progbits
.p2align 3, 0x0
__hip_fatbin_wrapper:
.long 1212764230 # 0x48495046
.long 1 # 0x1
.quad __hip_fatbin
.quad 0
.size __hip_fatbin_wrapper, 24
.type __hip_gpubin_handle,@object # @__hip_gpubin_handle
.local __hip_gpubin_handle
.comm __hip_gpubin_handle,8,8
.section .init_array,"aw",@init_array
.p2align 3, 0x0
.quad __hip_module_ctor
.type __hip_cuid_,@object # @__hip_cuid_
.bss
.globl __hip_cuid_
__hip_cuid_:
.byte 0 # 0x0
.size __hip_cuid_, 1
.type .Lstr,@object # @str
.section .rodata.str1.1,"aMS",@progbits,1
.Lstr:
.asciz "Hello World from CPU"
.size .Lstr, 21
.section ".linker-options","e",@llvm_linker_options
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
.section ".note.GNU-stack","",@progbits
.addrsig
.addrsig_sym _Z27__device_stub__helloFromGPUv
.addrsig_sym __hip_module_ctor
.addrsig_sym __hip_module_dtor
.addrsig_sym _Z12helloFromGPUv
.addrsig_sym __hip_fatbin
.addrsig_sym __hip_fatbin_wrapper
.addrsig_sym __hip_cuid_ |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
// VectorAdd.cu
#define N 10 // size of vectors
#define B 1 // blocks in the grid
#define T 10 // threads in a block
__global__ void add (int *a,int *b, int *c) {
int tid = blockIdx.x * blockDim.x + threadIdx.x;
if(tid < N) {
c[tid] = a[tid]+b[tid];
}
} | code for sm_80
Function : _Z3addPiS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R6, SR_CTAID.X ; /* 0x0000000000067919 */
/* 0x000e280000002500 */
/*0020*/ S2R R3, SR_TID.X ; /* 0x0000000000037919 */
/* 0x000e240000002100 */
/*0030*/ IMAD R6, R6, c[0x0][0x0], R3 ; /* 0x0000000006067a24 */
/* 0x001fca00078e0203 */
/*0040*/ ISETP.GT.AND P0, PT, R6, 0x9, PT ; /* 0x000000090600780c */
/* 0x000fda0003f04270 */
/*0050*/ @P0 EXIT ; /* 0x000000000000094d */
/* 0x000fea0003800000 */
/*0060*/ HFMA2.MMA R7, -RZ, RZ, 0, 2.384185791015625e-07 ; /* 0x00000004ff077435 */
/* 0x000fe200000001ff */
/*0070*/ ULDC.64 UR4, c[0x0][0x118] ; /* 0x0000460000047ab9 */
/* 0x000fd20000000a00 */
/*0080*/ IMAD.WIDE R4, R6, R7, c[0x0][0x168] ; /* 0x00005a0006047625 */
/* 0x000fc800078e0207 */
/*0090*/ IMAD.WIDE R2, R6.reuse, R7.reuse, c[0x0][0x160] ; /* 0x0000580006027625 */
/* 0x0c0fe400078e0207 */
/*00a0*/ LDG.E R4, [R4.64] ; /* 0x0000000404047981 */
/* 0x000ea8000c1e1900 */
/*00b0*/ LDG.E R3, [R2.64] ; /* 0x0000000402037981 */
/* 0x000ea2000c1e1900 */
/*00c0*/ IMAD.WIDE R6, R6, R7, c[0x0][0x170] ; /* 0x00005c0006067625 */
/* 0x000fe200078e0207 */
/*00d0*/ IADD3 R9, R4, R3, RZ ; /* 0x0000000304097210 */
/* 0x004fca0007ffe0ff */
/*00e0*/ STG.E [R6.64], R9 ; /* 0x0000000906007986 */
/* 0x000fe2000c101904 */
/*00f0*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0100*/ BRA 0x100; /* 0xfffffff000007947 */
/* 0x000fc0000383ffff */
/*0110*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0120*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0130*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0140*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0150*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0160*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0170*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0180*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*0190*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01a0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01b0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01c0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01d0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01e0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
/*01f0*/ NOP; /* 0x0000000000007918 */
/* 0x000fc00000000000 */
.......... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
// VectorAdd.cu
#define N 10 // size of vectors
#define B 1 // blocks in the grid
#define T 10 // threads in a block
__global__ void add (int *a,int *b, int *c) {
int tid = blockIdx.x * blockDim.x + threadIdx.x;
if(tid < N) {
c[tid] = a[tid]+b[tid];
}
} | .file "tmpxft_001a9806_00000000-6_add.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2029:
.size _ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
.globl _Z26__device_stub__Z3addPiS_S_PiS_S_
.type _Z26__device_stub__Z3addPiS_S_PiS_S_, @function
_Z26__device_stub__Z3addPiS_S_PiS_S_:
.LFB2051:
.cfi_startproc
endbr64
subq $136, %rsp
.cfi_def_cfa_offset 144
movq %rdi, 24(%rsp)
movq %rsi, 16(%rsp)
movq %rdx, 8(%rsp)
movq %fs:40, %rax
movq %rax, 120(%rsp)
xorl %eax, %eax
leaq 24(%rsp), %rax
movq %rax, 96(%rsp)
leaq 16(%rsp), %rax
movq %rax, 104(%rsp)
leaq 8(%rsp), %rax
movq %rax, 112(%rsp)
movl $1, 48(%rsp)
movl $1, 52(%rsp)
movl $1, 56(%rsp)
movl $1, 60(%rsp)
movl $1, 64(%rsp)
movl $1, 68(%rsp)
leaq 40(%rsp), %rcx
leaq 32(%rsp), %rdx
leaq 60(%rsp), %rsi
leaq 48(%rsp), %rdi
call __cudaPopCallConfiguration@PLT
testl %eax, %eax
je .L7
.L3:
movq 120(%rsp), %rax
subq %fs:40, %rax
jne .L8
addq $136, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
pushq 40(%rsp)
.cfi_def_cfa_offset 152
pushq 40(%rsp)
.cfi_def_cfa_offset 160
leaq 112(%rsp), %r9
movq 76(%rsp), %rcx
movl 84(%rsp), %r8d
movq 64(%rsp), %rsi
movl 72(%rsp), %edx
leaq _Z3addPiS_S_(%rip), %rdi
call cudaLaunchKernel@PLT
addq $16, %rsp
.cfi_def_cfa_offset 144
jmp .L3
.L8:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE2051:
.size _Z26__device_stub__Z3addPiS_S_PiS_S_, .-_Z26__device_stub__Z3addPiS_S_PiS_S_
.globl _Z3addPiS_S_
.type _Z3addPiS_S_, @function
_Z3addPiS_S_:
.LFB2052:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
call _Z26__device_stub__Z3addPiS_S_PiS_S_
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2052:
.size _Z3addPiS_S_, .-_Z3addPiS_S_
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "_Z3addPiS_S_"
.text
.type _ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2054:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
leaq _ZL15__fatDeviceText(%rip), %rdi
call __cudaRegisterFatBinary@PLT
movq %rax, %rdi
movq %rax, _ZL20__cudaFatCubinHandle(%rip)
pushq $0
.cfi_def_cfa_offset 24
pushq $0
.cfi_def_cfa_offset 32
pushq $0
.cfi_def_cfa_offset 40
pushq $0
.cfi_def_cfa_offset 48
movl $0, %r9d
movl $-1, %r8d
leaq .LC0(%rip), %rdx
movq %rdx, %rcx
leaq _Z3addPiS_S_(%rip), %rsi
call __cudaRegisterFunction@PLT
addq $32, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaRegisterFatBinaryEnd@PLT
leaq _ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
call atexit@PLT
addq $8, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE2054:
.size _ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
.section .init_array,"aw"
.align 8
.quad _ZL24__sti____cudaRegisterAllv
.section .nvFatBinSegment,"aw"
.align 8
.type _ZL15__fatDeviceText, @object
.size _ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
.long 1180844977
.long 1
.quad fatbinData
.quad 0
.local _ZL20__cudaFatCubinHandle
.comm _ZL20__cudaFatCubinHandle,8,8
.ident "GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4: |
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