text stringlengths 9 39.2M | dir stringlengths 25 226 | lang stringclasses 163
values | created_date timestamp[s] | updated_date timestamp[s] | repo_name stringclasses 751
values | repo_full_name stringclasses 752
values | star int64 1.01k 183k | len_tokens int64 1 18.5M |
|---|---|---|---|---|---|---|---|---|
```unknown
config SOC_SERIES_IT8XXX2
select CPU_HAS_FPU if "$(ZEPHYR_TOOLCHAIN_VARIANT)" != "zephyr" || RISCV_ISA_EXT_M
select HAS_PM
select ARCH_HAS_CUSTOM_CPU_IDLE
select ARCH_HAS_CUSTOM_CPU_ATOMIC_IDLE
if SOC_SERIES_IT8XXX2
config SOC_IT8XXX2
select RISCV
select ATOMIC_OPERATIONS_BUILTIN
select RISCV_ISA_R... | /content/code_sandbox/soc/ite/ec/it8xxx2/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,061 |
```unknown
/*
*
* When the 'M' extension is disabled, compiler can not recognize div/mul
* instructions. So mul/div instructions in the below integer arithmetic
* routines are hard coded by opcodes.
*
* IMPORTANT:
* The workaround requires the nop instruction, please don't optimize it.
*/
#ifdef CONFIG_SOC_IT8... | /content/code_sandbox/soc/ite/ec/it8xxx2/__arithmetic.S | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 372 |
```linker script
/*
*
*/
#include <soc.h>
#include <zephyr/devicetree.h>
#include <zephyr/linker/sections.h>
#include <zephyr/linker/devicetree_regions.h>
#include <zephyr/linker/linker-defs.h>
#include <zephyr/linker/linker-tool.h>
#ifdef CONFIG_XIP
#define ROMABLE_REGION ROM
#else
#define ROMABLE_R... | /content/code_sandbox/soc/ite/ec/it8xxx2/linker.ld | linker script | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 4,024 |
```unknown
# Raspberry Pi (RP) MCU line
config SOC_FAMILY_RPI_PICO
bool
config SOC_FAMILY
default "rpi_pico" if SOC_FAMILY_RPI_PICO
rsource "*/Kconfig.soc"
``` | /content/code_sandbox/soc/raspberrypi/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 48 |
```yaml
family:
- name: rpi_pico
series:
- name: rp2xxx
socs:
- name: rp2040
``` | /content/code_sandbox/soc/raspberrypi/soc.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 34 |
```unknown
# Raspberry Pi (RP) MCU line
if SOC_FAMILY_RPI_PICO
rsource "*/Kconfig.defconfig"
config PINCTRL
default y
endif # SOC_FAMILY_RPI_PICO
``` | /content/code_sandbox/soc/raspberrypi/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 43 |
```unknown
# Raspberry Pi (RP) MCU line
if SOC_FAMILY_RPI_PICO
rsource "*/Kconfig"
endif # SOC_FAMILY_RPI_PICO
``` | /content/code_sandbox/soc/raspberrypi/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 34 |
```unknown
# Raspberry Pi RP2XXX MCU line
config SOC_RP2040
bool
select SOC_SERIES_RP2XXX
config SOC_SERIES_RP2XXX
bool
select SOC_FAMILY_RPI_PICO
config SOC_SERIES
default "rp2xxx" if SOC_SERIES_RP2XXX
config SOC
default "rp2040" if SOC_RP2040
``` | /content/code_sandbox/soc/raspberrypi/rp2xxx/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 83 |
```unknown
# # Raspberry Pi RP2040 MCU
config BUILD_OUTPUT_UF2_USE_FLASH_BASE
default y if RP2_REQUIRES_SECOND_STAGE_BOOT
config BUILD_OUTPUT_UF2_USE_FLASH_OFFSET
default y if !RP2_REQUIRES_SECOND_STAGE_BOOT
``` | /content/code_sandbox/soc/raspberrypi/rp2xxx/Kconfig.defconfig.rp2040 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 53 |
```c
/*
*
*/
/**
* @file
* @brief System/hardware module for Raspberry Pi RP2040 family processor
*
* This module provides routines to initialize and support board-level hardware
* for the Raspberry Pi RP2040 family processor.
*/
#include <stdio.h>
#include <zephyr/kernel.h>
#include <zephyr/init.h>
#include... | /content/code_sandbox/soc/raspberrypi/rp2xxx/soc.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 195 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_SOC_ARM_RPI_PICO_RP2_PINCTRL_SOC_H_
#define ZEPHYR_SOC_ARM_RPI_PICO_RP2_PINCTRL_SOC_H_
#include <zephyr/dt-bindings/pinctrl/rpi-pico-rp2040-pinctrl.h>
/**
* @brief Type to hold a pin's pinctrl configuration.
*/
struct rpi_pinctrl_soc_pin {
/** Pin number 0..29 */
uint32_t ... | /content/code_sandbox/soc/raspberrypi/rp2xxx/pinctrl_soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 669 |
```objective-c
/*
*
*/
/**
* @file SoC configuration macros for the Raspberry Pi RP2040 family processors
*/
#ifndef _RPI_PICO_RP2040_SOC_H_
#define _RPI_PICO_RP2040_SOC_H_
#include <cmsis_core_m_defaults.h>
#endif /* _RPI_PICO_RP2040_SOC_H_ */
``` | /content/code_sandbox/soc/raspberrypi/rp2xxx/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 73 |
```unknown
# Raspberry Pi RP2XXX MCU line
if SOC_SERIES_RP2XXX
rsource "Kconfig.defconfig.rp2*"
config NUM_IRQS
default 26
endif # SOC_SERIES_RP2XXX
``` | /content/code_sandbox/soc/raspberrypi/rp2xxx/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 50 |
```unknown
# Raspberry Pi RP2XXX MCU line
config SOC_SERIES_RP2XXX
select ARM
select CPU_CORTEX_M0PLUS
select CPU_CORTEX_M_HAS_SYSTICK
select CPU_CORTEX_M_HAS_VTOR
select CPU_HAS_ARM_MPU
select HAS_RPI_PICO
select XIP
select HAS_SEGGER_RTT if ZEPHYR_SEGGER_MODULE
help
Enable support for Raspberry Pi RP2 M... | /content/code_sandbox/soc/raspberrypi/rp2xxx/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 358 |
```linker script
/* linker.ld - Linker command/script file */
/*
*
*/
/*
* The Second Stage Bootloader is only linked to the app that
* resides at 0x100. This can be the application, or a bootloader
* such as mcuboot.
*/
#if CONFIG_RP2_REQUIRES_SECOND_STAGE_BOOT
MEMORY
{
BOOT_FLASH (r) : ORIGIN = 0x10000000, L... | /content/code_sandbox/soc/raspberrypi/rp2xxx/linker.ld | linker script | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 143 |
```unknown
#
config SOC_FAMILY_NPCM
bool
config SOC_FAMILY
default "npcm" if SOC_FAMILY_NPCM
rsource "*/Kconfig.soc"
``` | /content/code_sandbox/soc/nuvoton/npcm/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 34 |
```yaml
family:
- name: npcm
series:
- name: npcm4
socs:
- name: npcm400
``` | /content/code_sandbox/soc/nuvoton/npcm/soc.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```unknown
#
if SOC_FAMILY_NPCM
rsource "*/Kconfig.defconfig"
endif # SOC_FAMILY_NPCM
``` | /content/code_sandbox/soc/nuvoton/npcm/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 24 |
```unknown
#
if SOC_FAMILY_NPCM
rsource "*/Kconfig"
endif # SOC_FAMILY_NPCM
``` | /content/code_sandbox/soc/nuvoton/npcm/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 22 |
```objective-c
/*
*/
#ifndef CHIP_CHIPREGS_H
#define CHIP_CHIPREGS_H
#include <zephyr/sys/util.h>
#define EC_REG_BASE_ADDR 0x00f00000
#ifdef _ASMLANGUAGE
#define ECREG(x) x
#else
/*
* Macros for hardware registers access.
*/
#define ECREG(x) (*((volatile unsigned char *)(x)))
#define ECREG_u16(x) (*((v... | /content/code_sandbox/soc/ite/ec/common/chip_chipregs.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 26,615 |
```python
#!/usr/bin/env python3
#
#
# This script will append/paste specific header to tell ROM code (Booter) of
# NPCM eSIO series how to load the firmware from flash to code ram
# Usage python3 ${ZEPHYR_BASE}/scripts/esiost.py
# -i in_file.bin -o out_file.bin
# [-chip <name>] [... | /content/code_sandbox/soc/nuvoton/npcm/common/esiost/esiost.py | python | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 5,248 |
```unknown
#
config SOC_SERIES_NPCM4
bool
select SOC_FAMILY_NPCM
help
Enable support for Nuvoton NPCM4 series
config SOC_NPCM400
bool
select SOC_SERIES_NPCM4
config SOC_SERIES
default "npcm4" if SOC_SERIES_NPCM4
config SOC
default "npcm400" if SOC_NPCM400
``` | /content/code_sandbox/soc/nuvoton/npcm/npcm4/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 82 |
```c
/*
*
*/
#include <zephyr/kernel.h>
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <soc.h>
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(soc, CONFIG_SOC_LOG_LEVEL);
static int soc_npcm4_init(void)
{
return 0;
}
SYS_INIT(soc_npcm4_init, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
... | /content/code_sandbox/soc/nuvoton/npcm/npcm4/soc.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 88 |
```objective-c
/*
*
*/
#ifndef _NUVOTON_NPCM_SOC_H_
#define _NUVOTON_NPCM_SOC_H_
/* CMSIS required definitions */
#define __FPU_PRESENT CONFIG_CPU_HAS_FPU
#define __MPU_PRESENT CONFIG_CPU_HAS_ARM_MPU
/* Add include for DTS generated information */
#include <zephyr/devicetree.h>
#include <cmsis_core_m_defaults.h>
... | /content/code_sandbox/soc/nuvoton/npcm/npcm4/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 97 |
```unknown
#
if SOC_SERIES_NPCM4
config NUM_IRQS
default 82
config ROM_START_OFFSET
default 0x600 if XIP
default 0x0 if !XIP
endif # SOC_SERIES_NPCM4
``` | /content/code_sandbox/soc/nuvoton/npcm/npcm4/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 53 |
```unknown
#
config SOC_SERIES_NPCM4
select ARM
select CPU_CORTEX_M4
select CPU_CORTEX_M_HAS_DWT
select CORTEX_M_SYSTICK
select CPU_HAS_ARM_MPU
``` | /content/code_sandbox/soc/nuvoton/npcm/npcm4/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 44 |
```unknown
#
# Author: Saravanan Sekar <saravanan@linumiz.com>
config SOC_FAMILY_NUMICRO
bool
config SOC_FAMILY
default "numicro" if SOC_FAMILY_NUMICRO
rsource "*/Kconfig.soc"
``` | /content/code_sandbox/soc/nuvoton/numicro/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 54 |
```yaml
family:
- name: numicro
series:
- name: m48x
socs:
- name: m487
``` | /content/code_sandbox/soc/nuvoton/numicro/soc.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 31 |
```unknown
#
# Author: Saravanan Sekar <saravanan@linumiz.com>
if SOC_FAMILY_NUMICRO
rsource "*/Kconfig.defconfig"
endif # SOC_FAMILY_NUMICRO
``` | /content/code_sandbox/soc/nuvoton/numicro/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 44 |
```python
#!/usr/bin/env python3
#
#
# This file contains general functions for ESIOST application
import sys
import argparse
import colorama
from colorama import Fore
INVALID_INPUT = -1
EXIT_FAILURE_STATUS = 1
# Verbose related values
NO_VERBOSE = 0
REG_VERBOSE = 1
# argument default values.
DEFAULT_VERBOSE = NO_... | /content/code_sandbox/soc/nuvoton/npcm/common/esiost/esiost_args.py | python | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 894 |
```unknown
#
# Author: Saravanan Sekar <saravanan@linumiz.com>
config SOC_FAMILY_NUMICRO
select PLATFORM_SPECIFIC_INIT
if SOC_FAMILY_NUMICRO
rsource "*/Kconfig"
endif # SOC_FAMILY_NUMICRO
``` | /content/code_sandbox/soc/nuvoton/numicro/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 55 |
```unknown
#
# Author: Saravanan Sekar <saravanan@linumiz.com>
config SOC_SERIES_M48X
bool
select SOC_FAMILY_NUMICRO
help
Enable support for NUVOTON M48X MCU series
config SOC_M487
bool
select SOC_SERIES_M48X
config SOC_SERIES
default "m48x" if SOC_SERIES_M48X
config SOC
default "m487" if SOC_M487
``` | /content/code_sandbox/soc/nuvoton/numicro/m48x/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 100 |
```unknown
#
# Author: Saravanan Sekar <saravanan@linumiz.com>
if SOC_M487
config NUM_IRQS
default 108
endif # SOC_M487
``` | /content/code_sandbox/soc/nuvoton/numicro/m48x/Kconfig.defconfig.m487 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 40 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_SOC_ARM_NUVOTON_NUMICRO_COMMON_PINCTRL_SOC_H_
#define ZEPHYR_SOC_ARM_NUVOTON_NUMICRO_COMMON_PINCTRL_SOC_H_
#include <stdint.h>
#include <zephyr/types.h>
#include <zephyr/dt-bindings/gpio/numicro-gpio.h>
#ifdef __cplusplus
extern "C" {
#endif
struct pinctrl_soc_pin {
uint32_t... | /content/code_sandbox/soc/nuvoton/numicro/common/pinctrl_soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 431 |
```objective-c
/*
* Author: Saravanan Sekar <saravanan@linumiz.com>
*
*/
#ifndef ZEPHYR_SOC_ARM_NUVOTON_M48X_SOC_H_
#define ZEPHYR_SOC_ARM_NUVOTON_M48X_SOC_H_
#include <zephyr/sys/util.h>
#include <NuMicro.h>
#endif /* ZEPHYR_SOC_ARM_NUVOTON_M48X_SOC_H_*/
``` | /content/code_sandbox/soc/nuvoton/numicro/m48x/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 90 |
```c
/*
*
* Author: Saravanan Sekar <saravanan@linumiz.com>
*/
#include <zephyr/init.h>
#include <zephyr/kernel.h>
void z_arm_platform_init(void)
{
SYS_UnlockReg();
/* system clock init */
SystemInit();
/* Enable HXT clock (external XTAL 12MHz) */
CLK_EnableXtalRC(CLK_PWRCTL_HXTEN_Msk);
/* Wait for HXT cl... | /content/code_sandbox/soc/nuvoton/numicro/m48x/soc.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 195 |
```unknown
#
# Author: Saravanan Sekar <saravanan@linumiz.com>
if SOC_SERIES_M48X
rsource "Kconfig.defconfig.m48*"
endif # SOC_SERIES_M48X
``` | /content/code_sandbox/soc/nuvoton/numicro/m48x/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 48 |
```unknown
#
# Author: Saravanan Sekar <saravanan@linumiz.com>
config SOC_SERIES_M48X
select ARM
select CPU_CORTEX_M4
select CPU_CORTEX_M_HAS_DWT
select CPU_HAS_FPU
select CPU_HAS_ARM_MPU
config SOC_M487
select HAS_NUMICRO_HAL
``` | /content/code_sandbox/soc/nuvoton/numicro/m48x/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 72 |
```unknown
# Nuvoton Cortex-M4 Embedded Controller
config SOC_FAMILY_NPCX
bool
config SOC_FAMILY
default "nuvoton_npcx" if SOC_FAMILY_NPCX
rsource "*/Kconfig.soc"
``` | /content/code_sandbox/soc/nuvoton/npcx/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 46 |
```unknown
if SOC_FAMILY_NPCX
rsource "*/Kconfig.defconfig"
endif # SOC_FAMILY_NPCX
``` | /content/code_sandbox/soc/nuvoton/npcx/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 24 |
```yaml
family:
- name: npcx
series:
- name: npcx4
socs:
- name: npcx4m3f
- name: npcx4m8f
- name: npcx7
socs:
- name: npcx7m6fb
- name: npcx7m6fc
- name: npcx7m7fc
- name: npcx9
socs:
- name: npcx9m3f
- name: npcx9m6f
- name: npcx9m7f
- name: npcx9m7fb
- name... | /content/code_sandbox/soc/nuvoton/npcx/soc.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 157 |
```objective-c
/*
*
*/
#ifndef _NUVOTON_NPCX_SOC_DBG_H_
#define _NUVOTON_NPCX_SOC_DBG_H_
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Configure the Automatic Freeze mode. If this mode is enabled, whenever
* the Core is halted, various modules clocks, counters are stopped and
* destructive reads are disab... | /content/code_sandbox/soc/nuvoton/npcx/common/soc_dbg.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 121 |
```unknown
# Nuvoton Cortex-M4 Embedded Controller
if SOC_FAMILY_NPCX
menuconfig NPCX_HEADER
bool "The output binary with NPCX binary header"
help
On NPCX series chip, the NPCX ROM code loads firmware image from flash
to RAM by the firmware binary header setting. Enable this to invoke
the 'ecst' which gen... | /content/code_sandbox/soc/nuvoton/npcx/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,477 |
```objective-c
/*
*
*/
#ifndef _NUVOTON_NPCX_SOC_MIWU_H_
#define _NUVOTON_NPCX_SOC_MIWU_H_
#include <stdint.h>
#include <zephyr/device.h>
#include <zephyr/drivers/gpio.h>
#ifdef __cplusplus
extern "C" {
#endif
enum miwu_table {
NPCX_MIWU_TABLE_0,
NPCX_MIWU_TABLE_1,
NPCX_MIWU_TABLE_2,
NPCX_MIWU_TABLE_COUNT
};... | /content/code_sandbox/soc/nuvoton/npcx/common/soc_miwu.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,683 |
```objective-c
/*
*
*/
#ifndef _NUVOTON_NPCX_SOC_NCL_H_
#define _NUVOTON_NPCX_SOC_NCL_H_
#ifdef __cplusplus
extern "C" {
#endif
/* The status code returns from Nuvoton Cryptographic Library ROM APIs */
enum ncl_status {
NCL_STATUS_OK = 0xA5A5,
NCL_STATUS_FAIL = 0x5A5A,
NCL_STATUS_INVALID_PARAM = 0x02,
NCL_STAT... | /content/code_sandbox/soc/nuvoton/npcx/common/soc_ncl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 439 |
```objective-c
/*
*
*/
#ifndef _NUVOTON_NPCX_SOC_HOST_H_
#define _NUVOTON_NPCX_SOC_HOST_H_
#include <stdint.h>
#include <zephyr/device.h>
#include <zephyr/drivers/espi.h>
#include <zephyr/sys/slist.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Initializes all host sub-modules in Core domain.
*
* This... | /content/code_sandbox/soc/nuvoton/npcx/common/soc_host.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 650 |
```objective-c
/*
*
*/
#ifndef _NUVOTON_NPCX_SOC_ESPI_TAF_H_
#define _NUVOTON_NPCX_SOC_ESPI_TAF_H_
#include <zephyr/device.h>
#ifdef __cplusplus
extern "C" {
#endif
/* Transmit buffer for eSPI TAF transaction on NPCX */
/* +-------------+--------------+--------------+---------------+ */
/* | Byte 3... | /content/code_sandbox/soc/nuvoton/npcx/common/soc_espi_taf.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,360 |
```c
/*
*
*/
#include <zephyr/device.h>
#include <soc.h>
/* CDCG register structure check */
NPCX_REG_SIZE_CHECK(cdcg_reg, 0x116);
NPCX_REG_OFFSET_CHECK(cdcg_reg, HFCBCD, 0x010);
NPCX_REG_OFFSET_CHECK(cdcg_reg, HFCBCD2, 0x014);
NPCX_REG_OFFSET_CHECK(cdcg_reg, LFCGCTL, 0x100);
NPCX_REG_OFFSET_CHECK(cdcg_reg, LFCGCTL... | /content/code_sandbox/soc/nuvoton/npcx/common/registers.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 3,164 |
```objective-c
/*
*
*/
#ifndef _NUVOTON_NPCX_SOC_PINS_H_
#define _NUVOTON_NPCX_SOC_PINS_H_
#include <stdint.h>
#include "reg/reg_def.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief NPCX pin-mux configuration structure
*
* Used to indicate the device's corresponding DEVALT register/bit for
* pin-muxing... | /content/code_sandbox/soc/nuvoton/npcx/common/soc_pins.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 565 |
```objective-c
/*
*
*/
#ifndef _NUVOTON_NPCX_SOC_DT_H_
#define _NUVOTON_NPCX_SOC_DT_H_
#include <zephyr/devicetree.h>
#include <zephyr/irq.h>
#include <zephyr/sys/util_macro.h>
/**
* @brief Like DT_PROP(), but expand parameters with
* DT_ENUM_UPPER_TOKEN not DT_PROP
*
* If the prop exists, this expands ... | /content/code_sandbox/soc/nuvoton/npcx/common/soc_dt.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 3,994 |
```objective-c
/*
*
*/
#ifndef _NUVOTON_NPCX_SOC_GPIO_H_
#define _NUVOTON_NPCX_SOC_GPIO_H_
#include <zephyr/device.h>
#ifdef __cplusplus
extern "C" {
#endif
/* Pin number for each GPIO device */
#define NPCX_GPIO_PORT_PIN_NUM 8U
/**
* @brief Get GPIO device instance by port index
*
* @param port GPIO device i... | /content/code_sandbox/soc/nuvoton/npcx/common/soc_gpio.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 249 |
```objective-c
/*
*
*/
#ifndef _NUVOTON_NPCX_SOC_ESPI_H_
#define _NUVOTON_NPCX_SOC_ESPI_H_
#include <zephyr/device.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Turn on all interrupts of eSPI host interface module.
*
* @param dev Pointer to structure device of eSPI module
*/
void npcx_espi_enable_int... | /content/code_sandbox/soc/nuvoton/npcx/common/soc_espi.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 159 |
```objective-c
/*
*
*/
#ifndef _NUVOTON_PINCTRL_SOC_H_
#define _NUVOTON_PINCTRL_SOC_H_
#include <zephyr/devicetree.h>
#include <zephyr/sys/util_macro.h>
#include <zephyr/types.h>
/**
* @brief Pinctrl node types in NPCX series
*/
enum npcx_pinctrl_type {
NPCX_PINCTRL_TYPE_PERIPH,
NPCX_PINCTRL_TYPE_DEVICE_CTRL,
... | /content/code_sandbox/soc/nuvoton/npcx/common/pinctrl_soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,695 |
```objective-c
/*
*
*/
#ifndef _NUVOTON_NPCX_SOC_CLOCK_H_
#define _NUVOTON_NPCX_SOC_CLOCK_H_
#include <stdbool.h>
#include <stdint.h>
#include <zephyr/devicetree.h>
#ifdef __cplusplus
extern "C" {
#endif
/* Common clock control device node for all NPCX series */
#define NPCX_CLK_CTRL_NODE DT_NODELABEL(pcc)
/**
... | /content/code_sandbox/soc/nuvoton/npcx/common/soc_clock.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,934 |
```c
/*
*
*/
#include <zephyr/init.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/dt-bindings/pinctrl/npcx-pinctrl.h>
#include <zephyr/kernel.h>
#include <soc.h>
#include "soc_gpio.h"
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(pimux_npcx, LOG_LEVEL_ERR);
/* Driver config */
struct npcx_scfg_config ... | /content/code_sandbox/soc/nuvoton/npcx/common/scfg.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,287 |
```objective-c
/*
*
*/
#ifndef _NUVOTON_NPCX_SOC_POWER_H_
#define _NUVOTON_NPCX_SOC_POWER_H_
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Disable UART RX wake-up interrupt.
*/
void npcx_uart_disable_access_interrupt(void);
/**
* @brief Enable UART RX wake-up interrupt.
*/
void npcx_uart_enable_access_i... | /content/code_sandbox/soc/nuvoton/npcx/common/soc_power.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 102 |
```c
/*
*
*/
/**
* @file
* @brief Nuvoton NPCX power management driver
*
* This file contains the drivers of NPCX Power Manager Modules that improves
* the efficiency of ec operation by adjusting the chips power consumption to
* the level of activity required by the application. The following table
* summariz... | /content/code_sandbox/soc/nuvoton/npcx/common/power.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,121 |
```python
#!/usr/bin/env python3
#
#
# This file contains general functions for ECST application
import sys
import argparse
import colorama
from colorama import Fore
INVALID_INPUT = -1
EXIT_FAILURE_STATUS = 1
# Header common fields
FW_HDR_CRC_DISABLE = 0x00
FW_HDR_CRC_ENABLE = 0x02
FW_CRC_DISABLE = 0x00
FW_CRC_ENAB... | /content/code_sandbox/soc/nuvoton/npcx/common/ecst/ecst_args.py | python | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,064 |
```python
#!/usr/bin/env python3
#
#
# This script will append/paste specific header to tell ROM code (Booter) of
# NPCX EC series how to load the firmware from flash to code ram
# Usage python3 ${ZEPHYR_BASE}/scripts/ecst.py
# -i in_file.bin -o out_file.bin
# [-chip <name>] [-v|-... | /content/code_sandbox/soc/nuvoton/npcx/common/ecst/ecst.py | python | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 9,105 |
```objective-c
/*
*
*/
#ifndef _NUVOTON_NPCX_REG_ACCESS_H
#define _NUVOTON_NPCX_REG_ACCESS_H
/*
* NPCX register bit/field access operations
*/
#define IS_BIT_SET(reg, bit) (((reg >> bit) & (0x1)) != 0)
#define GET_POS_FIELD(pos, size) pos
#define GET_SIZE_FIELD(pos, size) size
#define FIELD_POS(field... | /content/code_sandbox/soc/nuvoton/npcx/common/reg/reg_access.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 306 |
```unknown
# Nuvoton NPCX4 EC series
config SOC_SERIES_NPCX4
bool
select SOC_FAMILY_NPCX
help
Enable support for Nuvoton NPCX4 series
config SOC_NPCX4M3F
bool
select SOC_SERIES_NPCX4
help
NPCX4M3F
config SOC_NPCX4M8F
bool
select SOC_SERIES_NPCX4
help
NPCX4M8F
config SOC_SERIES
default "npcx4" if... | /content/code_sandbox/soc/nuvoton/npcx/npcx4/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 157 |
```c
/*
*
*/
#include <zephyr/kernel.h>
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <soc.h>
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(soc, CONFIG_SOC_LOG_LEVEL);
#define NPCX_FIU_INST_INIT(node_id) DT_REG_ADDR(node_id),
static uintptr_t fiu_insts[] = {
DT_FOREACH_STATUS_OKAY(nuvoton_np... | /content/code_sandbox/soc/nuvoton/npcx/npcx4/soc.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 247 |
```objective-c
/*
*
*/
#ifndef _NUVOTON_NPCX_SOC_H_
#define _NUVOTON_NPCX_SOC_H_
#include <cmsis_core_m_defaults.h>
/* NPCX4 SCFG multi-registers */
#define NPCX_DEVALT_OFFSET(n) (0x010 + n)
#define NPCX_PUPD_EN_OFFSET(n) (0x02b + n)
#define NPCX_LV_GPIO_CTL_OFFSET(n) (0x150 + n)
#define NPCX_DEVALT_LK_OFFSET(n)... | /content/code_sandbox/soc/nuvoton/npcx/npcx4/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 682 |
```unknown
# Nuvoton Cortex-M4 Embedded Controller
if SOC_SERIES_NPCX4
config NUM_IRQS
default 128
config CORTEX_M_SYSTICK
default !NPCX_ITIM_TIMER
config ESPI_TAF_NPCX
default y
depends on ESPI_TAF
endif # SOC_SERIES_NPCX4
``` | /content/code_sandbox/soc/nuvoton/npcx/npcx4/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 72 |
```unknown
# Nuvoton NPCX4 EC series
config SOC_SERIES_NPCX4
select ARM
select CPU_CORTEX_M4
select CPU_CORTEX_M_HAS_DWT
select CPU_HAS_FPU
select CPU_HAS_ARM_MPU
select HAS_PM
``` | /content/code_sandbox/soc/nuvoton/npcx/npcx4/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 55 |
```unknown
# Nuvoton Cortex-M4 Embedded Controller NPCX7 series
config SOC_SERIES_NPCX7
bool
select SOC_FAMILY_NPCX
help
Enable support for Nuvoton NPCX7 series
config SOC_NPCX7M6FB
bool
select SOC_SERIES_NPCX7
help
NPCX7M6FB
config SOC_NPCX7M6FC
bool
select SOC_SERIES_NPCX7
help
NPCX7M6FC
config... | /content/code_sandbox/soc/nuvoton/npcx/npcx7/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 208 |
```c
/*
*
*/
#include <zephyr/arch/arm/cortex_m/arm_mpu_mem_cfg.h>
static const struct arm_mpu_region mpu_regions[] = {
MPU_REGION_ENTRY("FLASH_0_0",
CONFIG_FLASH_BASE_ADDRESS & -KB(256),
REGION_FLASH_ATTR(REGION_256K)),
#if CONFIG_FLASH_SIZE > 256
MPU_REGION_ENTRY("FLASH_0_1",
(CONFIG_FLASH_BASE_ADDR... | /content/code_sandbox/soc/nuvoton/npcx/npcx7/mpu_regions.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 176 |
```c
/*
*
*/
#include <zephyr/kernel.h>
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <soc.h>
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(soc, CONFIG_SOC_LOG_LEVEL);
static int soc_npcx7_init(void)
{
struct scfg_reg *inst_scfg = (struct scfg_reg *)
DT_REG_ADDR_BY_NAME(DT_NODELABEL(scfg),... | /content/code_sandbox/soc/nuvoton/npcx/npcx7/soc.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 169 |
```objective-c
/*
*
*/
#ifndef _NUVOTON_NPCX_SOC_H_
#define _NUVOTON_NPCX_SOC_H_
#include <cmsis_core_m_defaults.h>
/* NPCX7 SCFG multi-registers offset */
#define NPCX_DEVALT_OFFSET(n) (0x010 + n)
#define NPCX_PUPD_EN_OFFSET(n) (0x028 + n)
#define NPCX_LV_GPIO_CTL_OFFSET(n) ((n < 5) ? (0x02a + n) : (0x021 + n))... | /content/code_sandbox/soc/nuvoton/npcx/npcx7/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 670 |
```unknown
# Nuvoton Cortex-M4 Embedded Controller
if SOC_SERIES_NPCX7
config NUM_IRQS
default 64
config CORTEX_M_SYSTICK
default !NPCX_ITIM_TIMER
endif # SOC_SERIES_NPCX7
``` | /content/code_sandbox/soc/nuvoton/npcx/npcx7/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 53 |
```unknown
# Nuvoton Cortex-M4 Embedded Controller NPCX7 series
config SOC_SERIES_NPCX7
select ARM
select CPU_CORTEX_M4
select CPU_CORTEX_M_HAS_DWT
select CPU_HAS_FPU
select CPU_HAS_ARM_MPU
select CPU_HAS_CUSTOM_FIXED_SOC_MPU_REGIONS
select HAS_PM
``` | /content/code_sandbox/soc/nuvoton/npcx/npcx7/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 70 |
```unknown
# Nuvoton Cortex-M4 Embedded Controller NPCX9 series
config SOC_SERIES_NPCX9
bool
select SOC_FAMILY_NPCX
help
Enable support for Nuvoton NPCX9 series
config SOC_NPCX9M3F
bool
select SOC_SERIES_NPCX9
help
NPCX9M3F
config SOC_NPCX9M6F
bool
select SOC_SERIES_NPCX9
help
NPCX9M6F
config SOC... | /content/code_sandbox/soc/nuvoton/npcx/npcx9/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 298 |
```c
/*
*
*/
#include <zephyr/kernel.h>
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <soc.h>
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(soc, CONFIG_SOC_LOG_LEVEL);
static int soc_npcx9_init(void)
{
if (IS_ENABLED(CONFIG_NPCX_VCC1_RST_HANG_WORKAROUND)) {
uintptr_t scfg_base = DT_REG_ADDR... | /content/code_sandbox/soc/nuvoton/npcx/npcx9/soc.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 164 |
```objective-c
/*
*
*/
#ifndef _NUVOTON_NPCX_SOC_H_
#define _NUVOTON_NPCX_SOC_H_
#include <cmsis_core_m_defaults.h>
/* NPCX9 SCFG multi-registers */
#define NPCX_DEVALT_OFFSET(n) (0x010 + n)
#define NPCX_PUPD_EN_OFFSET(n) (0x028 + n)
#define NPCX_LV_GPIO_CTL_OFFSET(n) ((n < 5) ? (0x02a + n) : (0x021 + n))
#defin... | /content/code_sandbox/soc/nuvoton/npcx/npcx9/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 660 |
```unknown
# Nuvoton Cortex-M4 Embedded Controller
if SOC_SERIES_NPCX9
config NUM_IRQS
default 64
config CORTEX_M_SYSTICK
default !NPCX_ITIM_TIMER
endif # SOC_SERIES_NPCX9
``` | /content/code_sandbox/soc/nuvoton/npcx/npcx9/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 53 |
```unknown
# Nuvoton Cortex-M4 Embedded Controller NPCX9 series
config SOC_SERIES_NPCX9
select ARM
select CPU_CORTEX_M4
select CPU_CORTEX_M_HAS_DWT
select CPU_HAS_FPU
select CPU_HAS_ARM_MPU
select SOC_FAMILY_NPCX
select HAS_PM
config NPCX_VCC1_RST_HANG_WORKAROUND
bool
depends on SOC_NPCX9M7FB
default y
he... | /content/code_sandbox/soc/nuvoton/npcx/npcx9/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 126 |
```unknown
#
config SOC_FAMILY_NUMAKER
bool
config SOC_FAMILY
default "numaker" if SOC_FAMILY_NUMAKER
rsource "*/Kconfig.soc"
``` | /content/code_sandbox/soc/nuvoton/numaker/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 34 |
```yaml
family:
- name: numaker
series:
- name: m46x
socs:
- name: m467
- name: m2l31x
socs:
- name: m2l31xxx
``` | /content/code_sandbox/soc/nuvoton/numaker/soc.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 55 |
```unknown
#
if SOC_FAMILY_NUMAKER
rsource "*/Kconfig.defconfig"
config RESET
default y
endif
``` | /content/code_sandbox/soc/nuvoton/numaker/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 25 |
```unknown
#
config SOC_FAMILY_NUMAKER
select PLATFORM_SPECIFIC_INIT
if SOC_FAMILY_NUMAKER
rsource "*/Kconfig"
endif # SOC_FAMILY_NUMAKER
``` | /content/code_sandbox/soc/nuvoton/numaker/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 34 |
```objective-c
/*
*
*/
#ifndef _NUVOTON_NUMAKER_PINCTRL_SOC_H_
#define _NUVOTON_NUMAKER_PINCTRL_SOC_H_
#include <zephyr/devicetree.h>
#include <stdint.h>
#define PORT_INDEX(pinmux) (((pinmux)&0xF0000000) >> 28)
#define PIN_INDEX(pinmux) (((pinmux)&0x0F000000) >> 24)
#define MFP_CFG(pinmux) (((pinmux)&... | /content/code_sandbox/soc/nuvoton/numaker/common/pinctrl_soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 435 |
```unknown
#
config SOC_SERIES_M2L31X
bool
select SOC_FAMILY_NUMAKER
help
Enable support for Nuvoton M2L31X MCU series
config SOC_M2L31XXX
bool
select SOC_SERIES_M2L31X
config SOC_SERIES
default "m2l31x" if SOC_SERIES_M2L31X
config SOC
default "m2l31xxx" if SOC_M2L31XXX
``` | /content/code_sandbox/soc/nuvoton/numaker/m2l31x/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 99 |
```c
/*
*
*/
#include <zephyr/kernel.h>
#include <zephyr/devicetree.h>
#include <zephyr/sys/poweroff.h>
#include <NuMicro.h>
void z_sys_poweroff(void)
{
SYS_UnlockReg();
/* Clear all wake-up flag */
CLK->PMUSTS |= CLK_PMUSTS_CLRWK_Msk;
/* Select Power-down mode */
CLK_SetPowerDownMode(DT_PROP_OR(DT_NODELABEL... | /content/code_sandbox/soc/nuvoton/numaker/m2l31x/poweroff.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 155 |
```c
/*
*
*/
#include <zephyr/devicetree.h>
#include <zephyr/drivers/clock_control/clock_control_numaker.h>
/* Hardware and starter kit includes. */
#include <NuMicro.h>
void z_arm_platform_init(void)
{
SystemInit();
/* Unlock protected registers */
SYS_UnlockReg();
/* Release I/O hold status */
CLK->IOPDCTL... | /content/code_sandbox/soc/nuvoton/numaker/m2l31x/soc.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 813 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_SOC_ARM_NUVOTON_M2L31X_SOC_H_
#define ZEPHYR_SOC_ARM_NUVOTON_M2L31X_SOC_H_
/* Hardware and starter kit includes. */
#include <NuMicro.h>
#endif /* ZEPHYR_SOC_ARM_NUVOTON_M2L31X_SOC_H_*/
``` | /content/code_sandbox/soc/nuvoton/numaker/m2l31x/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 77 |
```unknown
#
if SOC_SERIES_M2L31X
rsource "Kconfig.defconfig.m2l31*"
endif # SOC_SERIES_M2L31X
``` | /content/code_sandbox/soc/nuvoton/numaker/m2l31x/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 36 |
```unknown
#
config SOC_SERIES_M2L31X
select ARM
select CPU_CORTEX_M23
select CPU_CORTEX_M_HAS_SYSTICK
select CPU_CORTEX_M_HAS_VTOR
select CPU_HAS_ARM_MPU
select HAS_POWEROFF
config SOC_M2L31XXX
select HAS_NUMAKER_HAL
``` | /content/code_sandbox/soc/nuvoton/numaker/m2l31x/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 69 |
```unknown
#
if SOC_M2L31XXX
config NUM_IRQS
default 143
endif # SOC_M2L31XXX
``` | /content/code_sandbox/soc/nuvoton/numaker/m2l31x/Kconfig.defconfig.m2l31xxx | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 28 |
```unknown
#
config SOC_SERIES_M46X
bool
select SOC_FAMILY_NUMAKER
help
Enable support for Nuvoton M46X MCU series
config SOC_M467
bool
select SOC_SERIES_M46X
config SOC_SERIES
default "m46x" if SOC_SERIES_M46X
config SOC
default "m467" if SOC_M467
``` | /content/code_sandbox/soc/nuvoton/numaker/m46x/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 80 |
```unknown
#
if SOC_M467
config NUM_IRQS
default 127
endif # SOC_M467
``` | /content/code_sandbox/soc/nuvoton/numaker/m46x/Kconfig.defconfig.m467 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 22 |
```c
/*
*
*/
#include <zephyr/kernel.h>
#include <zephyr/devicetree.h>
#include <zephyr/sys/poweroff.h>
#include <NuMicro.h>
void z_sys_poweroff(void)
{
SYS_UnlockReg();
/* Clear all wake-up flag */
CLK->PMUSTS |= CLK_PMUSTS_CLRWK_Msk;
/* Select Power-down mode */
CLK_SetPowerDownMode(DT_PROP_OR(DT_NODELABEL... | /content/code_sandbox/soc/nuvoton/numaker/m46x/poweroff.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 154 |
```c
/*
*
*/
#include <zephyr/devicetree.h>
#include <zephyr/drivers/clock_control/clock_control_numaker.h>
/* Hardware and starter kit includes. */
#include <NuMicro.h>
void z_arm_platform_init(void)
{
SystemInit();
/* Unlock protected registers */
SYS_UnlockReg();
/* Release I/O hold status */
CLK->IOPDCTL... | /content/code_sandbox/soc/nuvoton/numaker/m46x/soc.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 821 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_SOC_ARM_NUVOTON_M46X_SOC_H_
#define ZEPHYR_SOC_ARM_NUVOTON_M46X_SOC_H_
/* Hardware and starter kit includes. */
#include <NuMicro.h>
#endif /* ZEPHYR_SOC_ARM_NUVOTON_M46X_SOC_H_*/
``` | /content/code_sandbox/soc/nuvoton/numaker/m46x/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 71 |
```unknown
#
if SOC_SERIES_M46X
rsource "Kconfig.defconfig.m46*"
endif # SOC_SERIES_M46X
``` | /content/code_sandbox/soc/nuvoton/numaker/m46x/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 30 |
```unknown
#
config SOC_SERIES_M46X
select ARM
select CPU_CORTEX_M4
select CPU_CORTEX_M_HAS_DWT
select CPU_HAS_FPU
select CPU_HAS_ARM_MPU
select CORTEX_M_SYSTICK if SYS_CLOCK_EXISTS
select HAS_POWEROFF
config SOC_M467
select HAS_NUMAKER_HAL
``` | /content/code_sandbox/soc/nuvoton/numaker/m46x/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 72 |
```unknown
config SOC_ZEPHYR_NIOS2F
bool
config SOC
default "zephyr_nios2f" if SOC_ZEPHYR_NIOS2F
``` | /content/code_sandbox/soc/altr/zephyr_nios2f/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 39 |
```yaml
socs:
- name: zephyr_nios2f
``` | /content/code_sandbox/soc/altr/zephyr_nios2f/soc.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 16 |
```objective-c
/*
*
*/
#ifndef __SOC_H_
#define __SOC_H_
#include <system.h>
#endif
``` | /content/code_sandbox/soc/altr/zephyr_nios2f/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 21 |
```unknown
if SOC_ZEPHYR_NIOS2F
config SYS_CLOCK_HW_CYCLES_PER_SEC
default 50000000
config ALTERA_AVALON_SYSID
def_bool y
config ALTERA_AVALON_QSPI
def_bool y
depends on SOC_FLASH_NIOS2_QSPI
config ALTERA_AVALON_I2C
def_bool y
depends on I2C_NIOS2
config ALTERA_AVALON_MSGDMA
def_bool y
depends on DMA_NIOS... | /content/code_sandbox/soc/altr/zephyr_nios2f/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 125 |
```unknown
config SOC_ZEPHYR_NIOS2F
select NIOS2
select HAS_MUL_INSTRUCTION
select HAS_DIV_INSTRUCTION
``` | /content/code_sandbox/soc/altr/zephyr_nios2f/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 30 |
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