text stringlengths 9 39.2M | dir stringlengths 25 226 | lang stringclasses 163
values | created_date timestamp[s] | updated_date timestamp[s] | repo_name stringclasses 751
values | repo_full_name stringclasses 752
values | star int64 1.01k 183k | len_tokens int64 1 18.5M |
|---|---|---|---|---|---|---|---|---|
```c
/*
*
*/
#include <soc.h>
#include <zephyr/arch/arm/mpu/nxp_mpu.h>
static const struct nxp_mpu_region mpu_regions[] = {
/* Region 0 */
/* Debugger access can't be disabled; ENET and USB devices will not be able
* to access RAM when their regions are dynamically disabled in NXP MPU.
*/
MPU_REGION_ENTRY("DE... | /content/code_sandbox/soc/nxp/kinetis/k6x/nxp_mpu_regions.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 454 |
```unknown
if SOC_FAMILY_NXP_MCX
config SERIAL_INIT_PRIORITY
default 55
depends on SERIAL
rsource "*/Kconfig.defconfig"
endif # SOC_FAMILY_NXP_MCX
``` | /content/code_sandbox/soc/nxp/mcx/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 42 |
```unknown
config SOC_FAMILY_NXP_MCX
select HAS_SEGGER_RTT
select CLOCK_CONTROL
select ARM
if SOC_FAMILY_NXP_MCX
rsource "*/Kconfig"
if FLASH_MCUX_FLEXSPI_XIP
# Avoid RWW hazards by defaulting logging to disabled
choice FLASH_LOG_LEVEL_CHOICE
default FLASH_LOG_LEVEL_OFF
endchoice
choice MEMC_LOG_LEVEL_CHOICE
... | /content/code_sandbox/soc/nxp/mcx/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 210 |
```unknown
config SOC_SERIES_MCXN
bool
select SOC_FAMILY_NXP_MCX
config SOC_SERIES
default "mcxn" if SOC_SERIES_MCXN
config SOC_MCXN947
bool
select SOC_SERIES_MCXN
config SOC_MCXN947_CPU0
bool
select SOC_MCXN947
config SOC_MCXN947_CPU1
bool
select SOC_MCXN947
config SOC_MCXN236
bool
select SOC_SERIES_M... | /content/code_sandbox/soc/nxp/mcx/mcxn/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 274 |
```c
/*
*
*/
/**
* @file
* @brief System/hardware module for nxp_mcxn94x platform
*
* This module provides routines to initialize and support board-level
* hardware for the nxp_mcxn94x platform.
*/
#include <zephyr/kernel.h>
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <soc.h>
#ifdef CONFIG_P... | /content/code_sandbox/soc/nxp/mcx/mcxn/soc.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 289 |
```c
/*
*/
#include <fsl_common.h>
uint32_t flexspi_clock_set_freq(uint32_t clock_name, uint32_t rate)
{
/* PLL0 is set to 150 MHz */
uint32_t pll_rate = 150000000;
uint8_t divider;
/* Disable the FLEXSPI clock */
SYSCON->FLEXSPICLKSEL = 0;
divider = ((pll_rate + (rate - 1)) / rate) - 1;
/* Max divider valu... | /content/code_sandbox/soc/nxp/mcx/mcxn/flash_clock_setup.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 201 |
```objective-c
/*
*
*/
#ifndef _SOC__H_
#define _SOC__H_
#ifndef _ASMLANGUAGE
#include <fsl_port.h>
#include <fsl_common.h>
#define PORT_MUX_GPIO kPORT_MuxAlt0 /* GPIO setting for the Port Mux Register */
#ifdef __cplusplus
extern "C" {
#endif
int flexspi_clock_set_freq(uint32_t clock_name, uint32_t rate);
void... | /content/code_sandbox/soc/nxp/mcx/mcxn/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 114 |
```unknown
if SOC_SERIES_MCXN
config NUM_IRQS
default 155
config ROM_START_OFFSET
default 0x400 if BOOTLOADER_MCUBOOT
config ZTEST_NO_YIELD
default y if (PM && ZTEST)
config MCUX_LPTMR_TIMER
default n if (DT_HAS_NXP_OS_TIMER_ENABLED || DT_HAS_ARM_ARMV8M_SYSTICK_ENABLED)
config SYS_CLOCK_HW_CYCLES_PER_SEC
def... | /content/code_sandbox/soc/nxp/mcx/mcxn/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 163 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_SOC_ARM_NXP_MCX_COMMON_PINCTRL_SOC_H_
#define ZEPHYR_SOC_ARM_NXP_MCX_COMMON_PINCTRL_SOC_H_
#include <zephyr/devicetree.h>
#include <zephyr/types.h>
#ifdef __cplusplus
extern "C" {
#endif
typedef uint32_t pinctrl_soc_pin_t;
#define Z_PINCTRL_MCX_PINCFG(node_id) \
(PORT_P... | /content/code_sandbox/soc/nxp/mcx/mcxn/pinctrl_soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 432 |
```unknown
config SOC_FAMILY_NXP_IMX
bool
config SOC_FAMILY
default "nxp_imx" if SOC_FAMILY_NXP_IMX
rsource "*/Kconfig.soc"
``` | /content/code_sandbox/soc/nxp/imx/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 40 |
```unknown
config SOC_SERIES_MCXN
select HAS_MCUX
select HAS_MCUX_FLEXCOMM
select CPU_CORTEX_M_HAS_SYSTICK
select CPU_CORTEX_M_HAS_DWT
select PLATFORM_SPECIFIC_INIT
config SOC_MCXN947_CPU0
select CPU_CORTEX_M33
select CPU_HAS_ARM_SAU
select CPU_HAS_ARM_MPU
select CPU_HAS_FPU
select ARMV8_M_DSP
select ARM_T... | /content/code_sandbox/soc/nxp/mcx/mcxn/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 529 |
```yaml
family:
- name: nxp_imx
series:
- name: imx8
socs:
- name: mimx8qm6
cpuclusters:
- name: adsp
- name: a72
- name: a53
- name: m4
- name: imx8x
socs:
- name: mimx8qx6
cpuclusters:
- name: adsp
- name: a35
- name: m4
- name: imx8ulp
... | /content/code_sandbox/soc/nxp/imx/soc.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 419 |
```unknown
if SOC_FAMILY_NXP_IMX
# Source series Kconfig files first, so SoCs
# can override the defaults given here
rsource "*/Kconfig.defconfig"
endif # SOC_FAMILY_NXP_IMX
``` | /content/code_sandbox/soc/nxp/imx/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 48 |
```unknown
config SOC_FAMILY_NXP_IMX
select HAS_SEGGER_RTT if ZEPHYR_SEGGER_MODULE
if SOC_FAMILY_NXP_IMX
# Source series Kconfig files first, so SOCs
# can override the defaults given here
rsource "*/Kconfig"
endif # SOC_FAMILY_NXP_IMX
``` | /content/code_sandbox/soc/nxp/imx/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 69 |
```unknown
config SOC_SERIES_IMX9
bool
select SOC_FAMILY_NXP_IMX
config SOC_MIMX9352
bool
select SOC_SERIES_IMX9
config SOC_MIMX9352_A55
bool
select SOC_MIMX9352
help
NXP i.MX93 A55
config SOC_PART_NUMBER_MIMX9352CVVXM
bool
config SOC_PART_NUMBER_MIMX9352DVVXM
bool
config SOC_PART_NUMBER_MIMX9352AVTXM... | /content/code_sandbox/soc/nxp/imx/imx9/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 269 |
```unknown
if SOC_SERIES_IMX9
rsource "Kconfig.defconfig.*"
endif # SOC_SERIES_IMX9
``` | /content/code_sandbox/soc/nxp/imx/imx9/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 28 |
```unknown
config SOC_MIMX9352_A55
select ARM64
select CPU_CORTEX_A55
select ARM_ARCH_TIMER if SYS_CLOCK_EXISTS
select HAS_MCUX if CLOCK_CONTROL
select HAS_MCUX_CCM_REV2 if CLOCK_CONTROL
select HAS_MCUX_IOMUXC if PINCTRL
select HAS_MCUX_CACHE
config MCUX_CORE_SUFFIX
default "_ca55" if SOC_MIMX9352_A55
``` | /content/code_sandbox/soc/nxp/imx/imx9/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 90 |
```unknown
if SOC_MIMX9352_A55
# Workaround for not being able to have commas in macro arguments
DT_CHOSEN_Z_FLASH := zephyr,flash
config FLASH_SIZE
default $(dt_chosen_reg_size_int,$(DT_CHOSEN_Z_FLASH),0,K)
config FLASH_BASE_ADDRESS
default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_FLASH))
config NUM_IRQS
int
de... | /content/code_sandbox/soc/nxp/imx/imx9/Kconfig.defconfig.mimx93.a55 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 135 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_SOC_ARM64_NXP_IMX9_PINCTRL_SOC_H_
#define ZEPHYR_SOC_ARM64_NXP_IMX9_PINCTRL_SOC_H_
#include <zephyr/devicetree.h>
#include <zephyr/types.h>
#include "fsl_common.h"
#ifdef __cplusplus
extern "C" {
#endif
#define MCUX_IMX_INPUT_SCHMITT_ENABLE_SHIFT IOMUXC1_SW_PAD_CTL_PAD_HYS_SH... | /content/code_sandbox/soc/nxp/imx/imx9/pinctrl_soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 959 |
```c
/*
*
*/
#include <zephyr/arch/arm64/arm_mmu.h>
#include <zephyr/devicetree.h>
#include <zephyr/sys/util.h>
static const struct arm_mmu_region mmu_regions[] = {
MMU_REGION_FLAT_ENTRY("GIC",
DT_REG_ADDR_BY_IDX(DT_NODELABEL(gic), 0),
DT_REG_SIZE_BY_IDX(DT_NODELABEL(gic), 0),
MT_DEVICE... | /content/code_sandbox/soc/nxp/imx/imx9/a55/mmu_regions.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 666 |
```unknown
# i.MX 6SoloX core series
config SOC_SERIES_IMX6SX
bool
select SOC_FAMILY_NXP_IMX
config SOC_MCIMX6X
bool
select SOC_SERIES_IMX6SX
config SOC_MCIMX6X_M4
select SOC_MCIMX6X
bool
help
NXP iMX6 SoloX M4 core
config SOC_SERIES
default "imx6sx" if SOC_SERIES_IMX6SX
config SOC
default "mcimx6x" ... | /content/code_sandbox/soc/nxp/imx/imx6sx/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 759 |
```objective-c
/*
*
*/
#ifndef __SOC_CLOCK_FREQ_H__
#define __SOC_CLOCK_FREQ_H__
#include "device_imx.h"
#include <zephyr/types.h>
#if defined(__cplusplus)
extern "C" {
#endif
#ifdef CONFIG_PWM_IMX
/*!
* @brief Get clock frequency applies to the PWM module
*
* @param base PWM base pointer.
* @return clock fre... | /content/code_sandbox/soc/nxp/imx/imx6sx/soc_clk_freq.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 127 |
```c
/*
*
*/
#include <ccm_imx6sx.h>
#include <ccm_analog_imx6sx.h>
#include "soc_clk_freq.h"
#ifdef CONFIG_PWM_IMX
uint32_t get_pwm_clock_freq(PWM_Type *base)
{
uint32_t root;
uint32_t hz;
uint32_t divPerclkPodf, divIpgPodf, divAhbPodf, divPeriphClk2Podf;
/* Different instance has the same clock root, it's d... | /content/code_sandbox/soc/nxp/imx/imx6sx/soc_clk_freq.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 956 |
```linker script
/*
*
*/
/* This is mostly a copy of arch/arm64/scripts/linker.ld with
* a few SOF-related changes. This is needed in order to avoid
* introducing sections based on CONFIG_SOF in the main ARM64
* linker script.
*/
#include <zephyr/linker/sections.h>
#include <zephyr/devicetree.h>
#include <zeph... | /content/code_sandbox/soc/nxp/imx/imx9/a55/linker.ld | linker script | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,469 |
```unknown
# i.MX 6SoloX
if SOC_MCIMX6X_M4
config FPU
default y
#-By default ROM_START is relocated to address 0 in a 1K region, allowing imx_rproc
# to translate it to TCM_L address
#-Select the relocation if the chosen flash is not the TCML
#-Disable this option if you use the bin format as this choice will en... | /content/code_sandbox/soc/nxp/imx/imx6sx/Kconfig.defconfig.mcimx6x_m4 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 182 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_SOC_ARM_NXP_IMX_MCIMX6X_PINCTRL_SOC_H_
#define ZEPHYR_SOC_ARM_NXP_IMX_MCIMX6X_PINCTRL_SOC_H_
#include <zephyr/devicetree.h>
#include <zephyr/types.h>
#ifdef __cplusplus
extern "C" {
#endif
#define IOMUXC_SW_MUX_CTL_PAD_MUX_MODE(x) ((x) & 0xF)
#define IOMUXC_SW_MUX_CTL_PAD_SIO... | /content/code_sandbox/soc/nxp/imx/imx6sx/pinctrl_soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,125 |
```objective-c
/*
*
*/
#ifndef _SOC__H_
#define _SOC__H_
#ifndef _ASMLANGUAGE
#include "rdc.h"
#include "rdc_defs_imx6sx.h"
#include "ccm_imx6sx.h"
#include "clock_freq.h"
#include "soc_clk_freq.h"
#endif /* !_ASMLANGUAGE */
#endif /* _SOC__H_ */
``` | /content/code_sandbox/soc/nxp/imx/imx6sx/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 77 |
```unknown
# i.MX 6SoloX core series
if SOC_SERIES_IMX6SX
config NUM_IRQS
# must be >= the highest interrupt number used
default 128
config PINCTRL_IMX
default y if HAS_IMX_IOMUXC
depends on PINCTRL
rsource "Kconfig.defconfig.*"
endif # SOC_SERIES_IMX6SX
``` | /content/code_sandbox/soc/nxp/imx/imx6sx/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 82 |
```unknown
config SOC_SERIES_IMX6SX
select ARM
select CPU_CORTEX_M4
select CPU_CORTEX_M_HAS_DWT
select HAS_IMX_HAL
select CPU_HAS_FPU
select CPU_HAS_ARM_MPU
select CLOCK_CONTROL
config SOC_MCIMX6X_M4
select HAS_IMX_HAL
select HAS_IMX_GPIO
select HAS_IMX_EPIT
select HAS_IMX_I2C
select HAS_IMX_IOMUXC
``` | /content/code_sandbox/soc/nxp/imx/imx6sx/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 98 |
```unknown
# iMX7D core series
config SOC_SERIES_IMX7D
bool
select SOC_FAMILY_NXP_IMX
help
Enable support for iMX7D MCU series
config SOC_MCIMX7D
bool
select SOC_SERIES_IMX7D
config SOC_MCIMX7D_M4
bool
select SOC_MCIMX7D
help
NXP iMX7 Dual M4 Core
config SOC_SERIES
default "imx7d" if SOC_SERIES_IMX7... | /content/code_sandbox/soc/nxp/imx/imx7d/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 274 |
```c
/*
*
*/
#include <zephyr/init.h>
#include <zephyr/sys/barrier.h>
#include <soc.h>
#include <zephyr/dt-bindings/rdc/imx_rdc.h>
#include "wdog_imx.h"
#include <cmsis_core.h>
/* Initialize Resource Domain Controller. */
static void SOC_RdcInit(void)
{
/* Move M4 core to the configured RDC domain */
RDC_SetDoma... | /content/code_sandbox/soc/nxp/imx/imx6sx/soc.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 3,544 |
```objective-c
/*
*
*/
#ifndef __SOC_CLOCK_FREQ_H__
#define __SOC_CLOCK_FREQ_H__
#include "device_imx.h"
#include <zephyr/types.h>
#if defined(__cplusplus)
extern "C" {
#endif
#ifdef CONFIG_PWM_IMX
/*!
* @brief Get clock frequency applies to the PWM module
*
* @param base PWM base pointer.
* @return clock fre... | /content/code_sandbox/soc/nxp/imx/imx7d/soc_clk_freq.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 485 |
```c
/*
*
*/
#include <ccm_imx7d.h>
#include <ccm_analog_imx7d.h>
#include "soc_clk_freq.h"
#ifdef CONFIG_PWM_IMX
uint32_t get_pwm_clock_freq(PWM_Type *base)
{
uint32_t root;
uint32_t hz;
uint32_t pre, post;
switch ((uint32_t)base) {
case PWM1_BASE:
root = CCM_GetRootMux(CCM, ccmRootPwm1);
CCM_GetRootDivi... | /content/code_sandbox/soc/nxp/imx/imx7d/soc_clk_freq.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 387 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_SOC_ARM_NXP_IMX_MCIMX6X_PINCTRL_SOC_H_
#define ZEPHYR_SOC_ARM_NXP_IMX_MCIMX6X_PINCTRL_SOC_H_
#include <zephyr/devicetree.h>
#include <zephyr/types.h>
#ifdef __cplusplus
extern "C" {
#endif
#define IOMUXC_SW_MUX_CTL_PAD_MUX_MODE(x) ((x) & 0xF)
#define IOMUXC_SW_MUX_CTL_PAD_SIO... | /content/code_sandbox/soc/nxp/imx/imx7d/pinctrl_soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,181 |
```objective-c
/*
*
*/
#ifndef _SOC__H_
#define _SOC__H_
#ifndef _ASMLANGUAGE
#include <MCIMX7D_M4.h>
#ifndef __cplusplus
#include "rdc.h"
#include "rdc_defs_imx7d.h"
#include "ccm_imx7d.h"
#include "clock_freq.h"
#include "soc_clk_freq.h"
#endif /* !__cplusplus */
#endif /* !_ASMLANGUAGE */
#endif /* _SOC__H... | /content/code_sandbox/soc/nxp/imx/imx7d/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 98 |
```unknown
# iMX7 core series
if SOC_SERIES_IMX7D
config NUM_IRQS
# must be >= the highest interrupt number used
default 127
config PINCTRL_IMX
default y if HAS_IMX_IOMUXC
depends on PINCTRL
rsource "Kconfig.defconfig.*"
endif # SOC_SERIES_IMX7D
``` | /content/code_sandbox/soc/nxp/imx/imx7d/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 78 |
```unknown
config SOC_SERIES_IMX7D
select ARM
select CPU_CORTEX_M4
select CPU_CORTEX_M_HAS_DWT
select CLOCK_CONTROL
select CPU_HAS_FPU
select CPU_HAS_ARM_MPU
config SOC_MCIMX7D_M4
select HAS_IMX_HAL
select HAS_IMX_GPIO
select HAS_IMX_I2C
select HAS_IMX_IOMUXC
``` | /content/code_sandbox/soc/nxp/imx/imx7d/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 85 |
```linker script
/*
*
*/
#include <zephyr/arch/arm/cortex_m/scripts/linker.ld>
SECTIONS
{
#ifdef CONFIG_OPENAMP_RSC_TABLE
SECTION_PROLOGUE(.resource_table,, SUBALIGN(4))
{
KEEP(*(.resource_table*))
} GROUP_LINK_IN(ROMABLE_REGION)
#endif
}
``` | /content/code_sandbox/soc/nxp/imx/imx7d/linker.ld | linker script | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 68 |
```unknown
# iMX7 M4 core series
if SOC_MCIMX7D_M4
config SYS_CLOCK_HW_CYCLES_PER_SEC
default 200000000
config GPIO
default y
#-By default ROM_START is relocated to address 0 in a 1K region, allowing imx_rproc
# to translate it to OCRAM_S address
#-Select the relocation if the chosen flash is not the OCRAM_S
#-... | /content/code_sandbox/soc/nxp/imx/imx7d/Kconfig.defconfig.mcimx7d_m4 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 200 |
```c
/*
*
*/
#include <zephyr/init.h>
#include <soc.h>
#include <zephyr/dt-bindings/rdc/imx_rdc.h>
#include <zephyr/devicetree.h>
#include "wdog_imx.h"
/* Initialize clock. */
void SOC_ClockInit(void)
{
/* OSC/PLL is already initialized by Cortex-A7 (u-boot) */
/*
* Disable WDOG3
* Note : The WDOG clock Root... | /content/code_sandbox/soc/nxp/imx/imx7d/soc.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,708 |
```unknown
config SOC_SERIES_IMX8
bool
select SOC_FAMILY_NXP_IMX
config SOC_SERIES
default "imx8" if SOC_SERIES_IMX8
config SOC_MIMX8QM6
bool
select SOC_SERIES_IMX8
config SOC
default "mimx8qm6" if SOC_MIMX8QM6
config SOC_MIMX8QM6_ADSP
bool
select SOC_MIMX8QM6
help
Enable support for NXP i.MX 8QM Audio... | /content/code_sandbox/soc/nxp/imx/imx8/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 190 |
```unknown
config SOC_MIMX8QM6_ADSP
select XTENSA
select XTENSA_HAL if ("$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xcc" && "$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xt-clang")
select XTENSA_RESET_VECTOR
select XTENSA_USE_CORE_CRT1
select ATOMIC_OPERATIONS_BUILTIN
select GEN_ISR_TABLES
select XTENSA_SMALL_VECTOR_TABLE_ENTRY
sel... | /content/code_sandbox/soc/nxp/imx/imx8/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 128 |
```unknown
if SOC_SERIES_IMX8
if SOC_MIMX8QM6_ADSP
config SYS_CLOCK_HW_CYCLES_PER_SEC
default 666000000
config SYS_CLOCK_TICKS_PER_SEC
default 50000
config DCACHE_LINE_SIZE
default 128
config GEN_IRQ_VECTOR_TABLE
default n
config CACHE_MANAGEMENT
default y
config SMP
default n
config XTENSA_TIMER
defaul... | /content/code_sandbox/soc/nxp/imx/imx8/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 167 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_SOC_XTENSA_NXP_ADSP_IMX8_PINCTRL_SOC_H_
#define ZEPHYR_SOC_XTENSA_NXP_ADSP_IMX8_PINCTRL_SOC_H_
#include <zephyr/devicetree.h>
#include <zephyr/types.h>
#ifdef __cplusplus
extern "C" {
#endif
struct pinctrl_soc_pinmux {
uint32_t pad;
uint32_t mux;
};
typedef struct pinctrl_... | /content/code_sandbox/soc/nxp/imx/imx8/adsp/pinctrl_soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 278 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_SOC_NXP_ADSP_MEMORY_H_
#define ZEPHYR_SOC_NXP_ADSP_MEMORY_H_
#define IRAM_RESERVE_HEADER_SPACE 0x400
#define IRAM_BASE 0x596f8000
#define IRAM_SIZE 0x800
#define SDRAM0_BASE 0x92400000
#define SDRAM0_SIZE 0x800000
#define SDRAM1_BASE 0x92C00000
#define SDRAM1_SIZE 0x800000
... | /content/code_sandbox/soc/nxp/imx/imx8/adsp/memory.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,465 |
```objective-c
/*
*
*/
/*
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
*
* Functions here are designed to produce efficient code to
* search an Xtensa bitmask of interrupts, inspecting only those bits
* declared to be associated with a given interrupt level. Each
* dispatcher will handle exactly one ... | /content/code_sandbox/soc/nxp/imx/imx8/adsp/_soc_inthandlers.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,359 |
```objective-c
/*
*
*/
#include <string.h>
#include <errno.h>
#include <zephyr/sys/sys_io.h>
#include <adsp/cache.h>
#ifndef __INC_IMX_SOC_H
#define __INC_IMX_SOC_H
/* Macros related to interrupt handling */
#define XTENSA_IRQ_NUM_SHIFT 0
#define XTENSA_IRQ_NUM_MASK 0xff
/*
* IRQs are mapped on levels. 2nd... | /content/code_sandbox/soc/nxp/imx/imx8/adsp/include/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 188 |
```objective-c
/*
*
*/
#ifndef __COMMON_ADSP_CACHE_H__
#define __COMMON_ADSP_CACHE_H__
#include <xtensa/hal.h>
#endif
``` | /content/code_sandbox/soc/nxp/imx/imx8/adsp/include/adsp/cache.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 30 |
```objective-c
/*
*
*/
#ifndef __INCLUDE_IO__
#define __INCLUDE_IO__
#include <stdint.h>
#include <soc/memory.h>
#include <zephyr/sys/sys_io.h>
#include <zephyr/arch/common/sys_io.h>
static inline uint32_t io_reg_read(uint32_t reg)
{
return sys_read32(reg);
}
static inline void io_reg_write(uint32_t reg, uint32_... | /content/code_sandbox/soc/nxp/imx/imx8/adsp/include/adsp/io.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 188 |
```unknown
config SOC_SERIES_IMX8ULP
bool
select SOC_FAMILY_NXP_IMX
config SOC_SERIES
default "imx8ulp" if SOC_SERIES_IMX8ULP
config SOC_MIMX8UD7
bool
select SOC_SERIES_IMX8ULP
config SOC
default "mimx8ud7" if SOC_MIMX8UD7
config SOC_MIMX8UD7_ADSP
bool
select SOC_MIMX8UD7
help
Enable support for NXP i.... | /content/code_sandbox/soc/nxp/imx/imx8ulp/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 203 |
```linker script
/*
*
*/
/**
* @file
* @brief Linker command/script file
*
* Linker script for the NXP i.MX8 platform
*/
OUTPUT_ARCH(xtensa)
#include <zephyr/devicetree.h>
#include <xtensa/config/core-isa.h>
#include <memory.h>
#include <zephyr/linker/sections.h>
#include <zephyr/linker/linker-defs.h>
#inclu... | /content/code_sandbox/soc/nxp/imx/imx8/adsp/linker.ld | linker script | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 4,515 |
```unknown
if SOC_SERIES_IMX8ULP
if SOC_MIMX8UD7_ADSP
config SYS_CLOCK_HW_CYCLES_PER_SEC
default 475200000
config SYS_CLOCK_TICKS_PER_SEC
default 50000
config DCACHE_LINE_SIZE
default 128
config GEN_IRQ_VECTOR_TABLE
default n
config CACHE_MANAGEMENT
default y
config SMP
default n
config XTENSA_TIMER
def... | /content/code_sandbox/soc/nxp/imx/imx8ulp/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 171 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_SOC_NXP_IMX_IMX8ULP_PINCTR_SOC_H_
#define ZEPHYR_SOC_NXP_IMX_IMX8ULP_PINCTR_SOC_H_
#include <zephyr/devicetree.h>
#include "fsl_iomuxc.h"
#ifdef __cplusplus
extern "C" {
#endif
struct pinctrl_soc_pinmux {
uint32_t mux_register;
uint8_t mux_mode;
uint32_t input_register;
u... | /content/code_sandbox/soc/nxp/imx/imx8ulp/pinctrl_soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 627 |
```unknown
config SOC_MIMX8UD7_ADSP
select XTENSA
select XTENSA_HAL if ("$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xcc" && "$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xt-clang")
select XTENSA_RESET_VECTOR
select XTENSA_USE_CORE_CRT1
select ATOMIC_OPERATIONS_BUILTIN
select GEN_ISR_TABLES
select XTENSA_SMALL_VECTOR_TABLE_ENTRY
sel... | /content/code_sandbox/soc/nxp/imx/imx8ulp/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 176 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_SOC_NXP_ADSP_MEMORY_H_
#define ZEPHYR_SOC_NXP_ADSP_MEMORY_H_
#define IRAM_RESERVE_HEADER_SPACE 0x400
#define IRAM_BASE 0x21170000
#define IRAM_SIZE 0x10000
#define SDRAM0_BASE 0x1a000000
#define SDRAM0_SIZE 0x800000
#define SDRAM1_BASE 0x1a800000
#define SDRAM1_SIZE 0x800000
... | /content/code_sandbox/soc/nxp/imx/imx8ulp/adsp/memory.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,476 |
```linker script
/*
*
*/
/**
* @file
* @brief Linker command/script file
*
* Linker script for the NXP i.MX8ULP platform
*/
OUTPUT_ARCH(xtensa)
#include <zephyr/devicetree.h>
#include <xtensa/config/core-isa.h>
#include <memory.h>
#include <zephyr/linker/sections.h>
#include <zephyr/linker/linker-defs.h>
#in... | /content/code_sandbox/soc/nxp/imx/imx8ulp/adsp/linker.ld | linker script | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 4,515 |
```objective-c
/*
*
*/
#include <string.h>
#include <errno.h>
#include <zephyr/sys/sys_io.h>
#include <adsp/cache.h>
#ifndef __INC_IMX_SOC_H
#define __INC_IMX_SOC_H
/* Macros related to interrupt handling */
#define XTENSA_IRQ_NUM_SHIFT 0
#define XTENSA_IRQ_NUM_MASK 0xff
/*
* IRQs are mapped on levels. 2nd... | /content/code_sandbox/soc/nxp/imx/imx8ulp/adsp/include/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 188 |
```objective-c
/*
*
*/
#ifndef __COMMON_ADSP_CACHE_H__
#define __COMMON_ADSP_CACHE_H__
#include <xtensa/hal.h>
#endif
``` | /content/code_sandbox/soc/nxp/imx/imx8ulp/adsp/include/adsp/cache.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 30 |
```objective-c
/*
*
*/
#ifndef __INCLUDE_IO__
#define __INCLUDE_IO__
#include <stdint.h>
#include <soc/memory.h>
#include <zephyr/sys/sys_io.h>
#include <zephyr/arch/common/sys_io.h>
static inline uint32_t io_reg_read(uint32_t reg)
{
return sys_read32(reg);
}
static inline void io_reg_write(uint32_t reg, uint32_... | /content/code_sandbox/soc/nxp/imx/imx8ulp/adsp/include/adsp/io.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 188 |
```unknown
config SOC_SERIES_IMX8M
bool
select SOC_FAMILY_NXP_IMX
config SOC_SERIES
default "imx8m" if SOC_SERIES_IMX8M
config SOC_MIMX8MM6
bool
select SOC_SERIES_IMX8M
config SOC_MIMX8MM6_A53
bool
select SOC_MIMX8MM6
help
NXP i.MX8MM A53
config SOC_MIMX8MM6_M4
bool
select SOC_MIMX8MM6
help
NXP i.... | /content/code_sandbox/soc/nxp/imx/imx8m/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 839 |
```objective-c
/*
*
*/
/*
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
*
* Functions here are designed to produce efficient code to
* search an Xtensa bitmask of interrupts, inspecting only those bits
* declared to be associated with a given interrupt level. Each
* dispatcher will handle exactly one ... | /content/code_sandbox/soc/nxp/imx/imx8ulp/adsp/_soc_inthandlers.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,886 |
```unknown
if SOC_MIMX8ML8_A53
# Workaround for not being able to have commas in macro arguments
DT_CHOSEN_Z_FLASH := zephyr,flash
config FLASH_SIZE
default $(dt_chosen_reg_size_int,$(DT_CHOSEN_Z_FLASH),0,K)
config FLASH_BASE_ADDRESS
default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_FLASH))
config NUM_IRQS
int
de... | /content/code_sandbox/soc/nxp/imx/imx8m/Kconfig.defconfig.mimx8ml8_a53 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 136 |
```unknown
if SOC_MIMX8MN6_A53
# Workaround for not being able to have commas in macro arguments
DT_CHOSEN_Z_FLASH := zephyr,flash
config FLASH_SIZE
default $(dt_chosen_reg_size_int,$(DT_CHOSEN_Z_FLASH),0,K)
config FLASH_BASE_ADDRESS
default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_FLASH))
config NUM_IRQS
int
de... | /content/code_sandbox/soc/nxp/imx/imx8m/Kconfig.defconfig.mimx8mn6_a53 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 136 |
```unknown
if SOC_MIMX8MM6_A53
# Workaround for not being able to have commas in macro arguments
DT_CHOSEN_Z_FLASH := zephyr,flash
config FLASH_SIZE
default $(dt_chosen_reg_size_int,$(DT_CHOSEN_Z_FLASH),0,K)
config FLASH_BASE_ADDRESS
default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_FLASH))
config NUM_IRQS
int
de... | /content/code_sandbox/soc/nxp/imx/imx8m/Kconfig.defconfig.mimx8mm6_a53 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 136 |
```unknown
if SOC_SERIES_IMX8M
rsource "Kconfig.defconfig.*"
endif # SOC_SERIES_IMX8M
``` | /content/code_sandbox/soc/nxp/imx/imx8m/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 30 |
```unknown
# MIMX8ML8 SoC defconfig
if SOC_MIMX8ML8_M7
config SOC
string
default "mimx8ml8"
config SYS_CLOCK_HW_CYCLES_PER_SEC
int
default 800000000
config GPIO
default y
config IPM_IMX
default y
depends on IPM
if CODE_ITCM
config FLASH_SIZE
default $(dt_node_reg_size_int,/soc/itcm@0,0,K)
config FLASH_... | /content/code_sandbox/soc/nxp/imx/imx8m/Kconfig.defconfig.mimx8ml8_m7 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 237 |
```unknown
# MIMX8MQ6 M4 SoC defconfig
if SOC_MIMX8MQ6_M4
config SYS_CLOCK_HW_CYCLES_PER_SEC
int
default 266000000
config PINCTRL_IMX
default y if HAS_MCUX_IOMUXC
depends on PINCTRL
config NUM_IRQS
int
# must be >= the highest interrupt number used
default 127
endif # SOC_MIMX8MQ6_M4
``` | /content/code_sandbox/soc/nxp/imx/imx8m/Kconfig.defconfig.mimx8mq6_m4 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 100 |
```unknown
if SOC_SERIES_IMX8M
if SOC_MIMX8ML8_ADSP
config SYS_CLOCK_HW_CYCLES_PER_SEC
default 800000000
config SYS_CLOCK_TICKS_PER_SEC
default 50000
config DCACHE_LINE_SIZE
default 128
config GEN_IRQ_VECTOR_TABLE
default n
config CACHE_MANAGEMENT
default y
config SMP
default n
config XTENSA_TIMER
defau... | /content/code_sandbox/soc/nxp/imx/imx8m/Kconfig.defconfig.mimx8ml8_adsp | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 178 |
```unknown
config SOC_MIMX8MM6_A53
select ARM64
select CPU_CORTEX_A53
select ARM_ARCH_TIMER if SYS_CLOCK_EXISTS
select HAS_MCUX if CLOCK_CONTROL
select HAS_MCUX_CCM if CLOCK_CONTROL
select HAS_MCUX_IOMUXC if PINCTRL
select HAS_MCUX_RDC
select HAS_MCUX_CACHE
config SOC_MIMX8MM6_M4
select ARM
select CPU_CORTE... | /content/code_sandbox/soc/nxp/imx/imx8m/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 731 |
```unknown
# MIMX8MM6 M4 SoC defconfig
if SOC_MIMX8MM6_M4
config SYS_CLOCK_HW_CYCLES_PER_SEC
int
default 400000000
config IPM_IMX
default y
depends on IPM
config NUM_IRQS
int
# must be >= the highest interrupt number used
default 127
config PINCTRL_IMX
default y if HAS_MCUX_IOMUXC
depends on PINCTRL
end... | /content/code_sandbox/soc/nxp/imx/imx8m/Kconfig.defconfig.mimx8mm6_m4 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 115 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_SOC_ARM_NXP_MIMX8MM6_PINCTRL_SOC_H_
#define ZEPHYR_SOC_ARM_NXP_MIMX8MM6_PINCTRL_SOC_H_
#include <zephyr/devicetree.h>
#include <zephyr/types.h>
#include "fsl_common.h"
#ifdef __cplusplus
extern "C" {
#endif
#define MCUX_IMX_INPUT_SCHMITT_ENABLE_SHIFT IOMUXC_SW_PAD_CTL_PAD_HYS... | /content/code_sandbox/soc/nxp/imx/imx8m/m4_mini/pinctrl_soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 970 |
```objective-c
/*
*
*/
#ifndef _SOC__H_
#define _SOC__H_
#ifdef __cplusplus
extern "C" {
#endif
#ifndef _ASMLANGUAGE
#include <fsl_device_registers.h>
#endif /* !_ASMLANGUAGE */
#ifdef __cplusplus
}
#endif
#endif /* _SOC__H_ */
``` | /content/code_sandbox/soc/nxp/imx/imx8m/m4_mini/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 63 |
```c
/*
*
*/
#include <zephyr/device.h>
#include <fsl_clock.h>
#include <fsl_common.h>
#include <fsl_rdc.h>
#include <zephyr/init.h>
#include <zephyr/kernel.h>
#include <soc.h>
#include <zephyr/dt-bindings/rdc/imx_rdc.h>
/* OSC/PLL is already initialized by ROM and Cortex-A53 (u-boot) */
static void SOC_RdcInit(vo... | /content/code_sandbox/soc/nxp/imx/imx8m/m4_mini/soc.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,699 |
```linker script
/*
*
*/
#include <zephyr/arch/arm/cortex_m/scripts/linker.ld>
SECTIONS
{
#ifdef CONFIG_OPENAMP_RSC_TABLE
SECTION_PROLOGUE(.resource_table,, SUBALIGN(8))
{
KEEP(*(.resource_table*))
} GROUP_LINK_IN(ROMABLE_REGION)
#endif
}
``` | /content/code_sandbox/soc/nxp/imx/imx8m/m4_mini/linker.ld | linker script | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 70 |
```c
/*
*
*/
#include <zephyr/arch/arm64/arm_mmu.h>
#include <zephyr/devicetree.h>
#include <zephyr/sys/util.h>
static const struct arm_mmu_region mmu_regions[] = {
MMU_REGION_FLAT_ENTRY("GIC",
DT_REG_ADDR_BY_IDX(DT_NODELABEL(gic), 0),
DT_REG_SIZE_BY_IDX(DT_NODELABEL(gic), 0),
MT_DEVICE... | /content/code_sandbox/soc/nxp/imx/imx8m/a53/mmu_regions.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 465 |
```c
/*
*
*/
#include <stdio.h>
#include <zephyr/init.h>
#include <zephyr/kernel.h>
#include <zephyr/device.h>
#include <zephyr/dt-bindings/rdc/imx_rdc.h>
#include <fsl_common.h>
#include <fsl_rdc.h>
/* set RDC permission for peripherals */
static void soc_rdc_init(void)
{
rdc_domain_assignment_t assignment = {0};... | /content/code_sandbox/soc/nxp/imx/imx8m/a53/soc.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 408 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_SOC_ARM64_NXP_IMX8M_PINCTRL_SOC_H_
#define ZEPHYR_SOC_ARM64_NXP_IMX8M_PINCTRL_SOC_H_
#include <zephyr/devicetree.h>
#include <zephyr/types.h>
#include "fsl_common.h"
#ifdef __cplusplus
extern "C" {
#endif
#define MCUX_IMX_INPUT_SCHMITT_ENABLE_SHIFT IOMUXC_SW_PAD_CTL_PAD_HYS_S... | /content/code_sandbox/soc/nxp/imx/imx8m/a53/pinctrl_soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 967 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_SOC_XTENSA_NXP_IMX8M_PINCTRL_SOC_H_
#define ZEPHYR_SOC_XTENSA_NXP_IMX8M_PINCTRL_SOC_H_
#include <zephyr/devicetree.h>
#include <zephyr/types.h>
#include "fsl_common.h"
#ifdef __cplusplus
extern "C" {
#endif
#define MCUX_IMX_INPUT_SCHMITT_ENABLE_SHIFT IOMUXC_SW_PAD_CTL_PAD_HYS... | /content/code_sandbox/soc/nxp/imx/imx8m/adsp/pinctrl_soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 973 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_SOC_NXP_ADSP_MEMORY_H_
#define ZEPHYR_SOC_NXP_ADSP_MEMORY_H_
#define PLATFORM_CORE_COUNT 1
/** Id of master DSP core */
#define PLATFORM_PRIMARY_CORE_ID 0
#define IRAM_RESERVE_HEADER_SPACE 0x400
#define IRAM_BASE 0x3B6F8000
#define IRAM_SIZE 0x800
#define SDRAM0_BASE 0x9240... | /content/code_sandbox/soc/nxp/imx/imx8m/adsp/memory.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,526 |
```objective-c
/*
*
*/
/*
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
*
* Functions here are designed to produce efficient code to
* search an Xtensa bitmask of interrupts, inspecting only those bits
* declared to be associated with a given interrupt level. Each
* dispatcher will handle exactly one ... | /content/code_sandbox/soc/nxp/imx/imx8m/adsp/_soc_inthandlers.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,359 |
```objective-c
/*
*
*/
#include <string.h>
#include <errno.h>
#include <zephyr/sys/sys_io.h>
#include <adsp/cache.h>
#ifndef __INC_IMX_SOC_H
#define __INC_IMX_SOC_H
/* Macros related to interrupt handling */
#define XTENSA_IRQ_NUM_SHIFT 0
#define XTENSA_IRQ_NUM_MASK 0xff
/*
* IRQs are mapped on levels. 2nd... | /content/code_sandbox/soc/nxp/imx/imx8m/adsp/include/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 188 |
```linker script
/*
*
*/
/**
* @file
* @brief Linker command/script file
*
* Linker script for the NXP i.MX8M platform
*/
OUTPUT_ARCH(xtensa)
#include <zephyr/devicetree.h>
#include <xtensa/config/core-isa.h>
#include <memory.h>
#include <zephyr/linker/sections.h>
#include <zephyr/linker/linker-defs.h>
#incl... | /content/code_sandbox/soc/nxp/imx/imx8m/adsp/linker.ld | linker script | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 4,624 |
```objective-c
/*
*
*/
#ifndef __COMMON_ADSP_CACHE_H__
#define __COMMON_ADSP_CACHE_H__
#include <xtensa/hal.h>
#endif
``` | /content/code_sandbox/soc/nxp/imx/imx8m/adsp/include/adsp/cache.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 30 |
```objective-c
/*
*
*/
#ifndef __INCLUDE_IO__
#define __INCLUDE_IO__
#include <stdint.h>
#include <soc/memory.h>
#include <zephyr/sys/sys_io.h>
#include <zephyr/arch/common/sys_io.h>
static inline uint32_t io_reg_read(uint32_t reg)
{
return sys_read32(reg);
}
static inline void io_reg_write(uint32_t reg, uint32_... | /content/code_sandbox/soc/nxp/imx/imx8m/adsp/include/adsp/io.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 188 |
```c
/*
*
*/
#include <zephyr/devicetree.h>
#include <zephyr/arch/arm/cortex_m/arm_mpu_mem_cfg.h>
#define REGION_MASK_BASE_ADDRESS 0x00000000U
#define REGION_ITCM_BASE_ADDRESS 0x00000000U
#define REGION_QSPI_BASE_ADDRESS 0x08000000U
#define REGION_DTCM_BASE_ADDRESS 0x20000000U
#define REGION_DDR_BASE_ADDRES... | /content/code_sandbox/soc/nxp/imx/imx8m/m7/mpu_regions.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,094 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_SOC_ARM_NXP_MIMX8ML8_M7_PINCTRL_SOC_H_
#define ZEPHYR_SOC_ARM_NXP_MIMX8ML8_M7_PINCTRL_SOC_H_
#include <zephyr/devicetree.h>
#include <zephyr/types.h>
#include "fsl_common.h"
#ifdef __cplusplus
extern "C" {
#endif
#define MCUX_IMX_INPUT_SCHMITT_ENABLE_SHIFT IOMUXC_SW_PAD_CTL_P... | /content/code_sandbox/soc/nxp/imx/imx8m/m7/pinctrl_soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 976 |
```objective-c
/*
*
*/
#ifndef _SOC__H_
#define _SOC__H_
#ifdef __cplusplus
extern "C" {
#endif
#ifndef _ASMLANGUAGE
#include <fsl_device_registers.h>
#endif /* !_ASMLANGUAGE */
#ifdef __cplusplus
}
#endif
#endif /* _SOC__H_ */
``` | /content/code_sandbox/soc/nxp/imx/imx8m/m7/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 63 |
```c
/*
*
*/
#include <zephyr/device.h>
#include <fsl_clock.h>
#include <fsl_common.h>
#include <fsl_rdc.h>
#include <zephyr/init.h>
#include <zephyr/kernel.h>
#include <soc.h>
#include <zephyr/dt-bindings/rdc/imx_rdc.h>
/* OSC/PLL is already initialized by ROM and Cortex-A53 (u-boot) */
static void SOC_RdcInit(vo... | /content/code_sandbox/soc/nxp/imx/imx8m/m7/soc.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,299 |
```linker script
/*
*
*/
#include <zephyr/devicetree.h>
MEMORY
{
#if defined(CONFIG_CODE_DDR)
DDR (wx) : ORIGIN = 0x80400000, LENGTH = 0x00C00000
#else
DDR (wx) : ORIGIN = 0x80000000, LENGTH = 0x01000000
#endif
}
#include <zephyr/arch/arm/cortex_m/scripts/linker.ld>
SECTIONS
{
#i... | /content/code_sandbox/soc/nxp/imx/imx8m/m7/linker.ld | linker script | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 150 |
```c
/*
*
*/
#include <zephyr/device.h>
#include <fsl_clock.h>
#include <fsl_common.h>
#include <fsl_rdc.h>
#include <zephyr/init.h>
#include <zephyr/kernel.h>
#include <soc.h>
#include <zephyr/dt-bindings/rdc/imx_rdc.h>
/* OSC/PLL is already initialized by ROM and Cortex-A53 (u-boot) */
static void SOC_RdcInit(vo... | /content/code_sandbox/soc/nxp/imx/imx8m/m4_quad/soc.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,314 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_SOC_ARM_NXP_MIMX8MQ6_M4_PINCTRL_SOC_H_
#define ZEPHYR_SOC_ARM_NXP_MIMX8MQ6_M4_PINCTRL_SOC_H_
#include <zephyr/devicetree.h>
#include <zephyr/types.h>
#include "fsl_common.h"
#ifdef __cplusplus
extern "C" {
#endif
#define MCUX_IMX_LVTTL_SHIFT IOMUXC_SW_PAD_CTL_PAD_LVTTL_SHIFT
... | /content/code_sandbox/soc/nxp/imx/imx8m/m4_quad/pinctrl_soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 962 |
```objective-c
/*
*
*/
#ifndef _SOC__H_
#define _SOC__H_
#ifdef __cplusplus
extern "C" {
#endif
#ifndef _ASMLANGUAGE
#include <fsl_device_registers.h>
#endif /* !_ASMLANGUAGE */
#ifdef __cplusplus
}
#endif
#endif /* _SOC__H_ */
``` | /content/code_sandbox/soc/nxp/imx/imx8m/m4_quad/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 63 |
```unknown
config SOC_SERIES_IMX8X
bool
select SOC_FAMILY_NXP_IMX
config SOC_SERIES
default "imx8x" if SOC_SERIES_IMX8X
config SOC_MIMX8QX6
bool
select SOC_SERIES_IMX8X
config SOC
default "mimx8qx6" if SOC_MIMX8QX6
config SOC_MIMX8QX6_ADSP
bool
select SOC_MIMX8QX6
help
Enable support for NXP i.MX 8QXP ... | /content/code_sandbox/soc/nxp/imx/imx8x/Kconfig.soc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 251 |
```unknown
config SOC_MIMX8QX6_ADSP
select XTENSA
select XTENSA_HAL if ("$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xcc" && "$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xt-clang")
select XTENSA_RESET_VECTOR
select XTENSA_USE_CORE_CRT1
select ATOMIC_OPERATIONS_BUILTIN
select GEN_ISR_TABLES
select XTENSA_SMALL_VECTOR_TABLE_ENTRY
sel... | /content/code_sandbox/soc/nxp/imx/imx8x/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 130 |
```unknown
if SOC_SERIES_IMX8X
if SOC_MIMX8QX6_ADSP
config SYS_CLOCK_HW_CYCLES_PER_SEC
default 640000000
config SYS_CLOCK_TICKS_PER_SEC
default 50000
config DCACHE_LINE_SIZE
default 128
config GEN_IRQ_VECTOR_TABLE
default n
config CACHE_MANAGEMENT
default y
config SMP
default n
config XTENSA_TIMER
defau... | /content/code_sandbox/soc/nxp/imx/imx8x/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 171 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_SOC_XTENSA_NXP_ADSP_IMX8_PINCTRL_SOC_H_
#define ZEPHYR_SOC_XTENSA_NXP_ADSP_IMX8_PINCTRL_SOC_H_
#include <zephyr/devicetree.h>
#include <zephyr/types.h>
#ifdef __cplusplus
extern "C" {
#endif
struct pinctrl_soc_pinmux {
uint32_t pad;
uint32_t mux;
};
typedef struct pinctrl_... | /content/code_sandbox/soc/nxp/imx/imx8x/adsp/pinctrl_soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 278 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_SOC_NXP_ADSP_MEMORY_H_
#define ZEPHYR_SOC_NXP_ADSP_MEMORY_H_
#define IRAM_RESERVE_HEADER_SPACE 0x400
#define IRAM_BASE 0x596f8000
#define IRAM_SIZE 0x800
#define SDRAM0_BASE 0x92400000
#define SDRAM0_SIZE 0x800000
#define SDRAM1_BASE 0x92C00000
#define SDRAM1_SIZE 0x800000
... | /content/code_sandbox/soc/nxp/imx/imx8x/adsp/memory.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,465 |
```objective-c
/*
*
*/
/*
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
*
* Functions here are designed to produce efficient code to
* search an Xtensa bitmask of interrupts, inspecting only those bits
* declared to be associated with a given interrupt level. Each
* dispatcher will handle exactly one ... | /content/code_sandbox/soc/nxp/imx/imx8x/adsp/_soc_inthandlers.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,359 |
```linker script
/*
*
*/
/**
* @file
* @brief Linker command/script file
*
* Linker script for the NXP i.MX8 platform
*/
OUTPUT_ARCH(xtensa)
#include <zephyr/devicetree.h>
#include <xtensa/config/core-isa.h>
#include <memory.h>
#include <zephyr/linker/sections.h>
#include <zephyr/linker/linker-defs.h>
#inclu... | /content/code_sandbox/soc/nxp/imx/imx8x/adsp/linker.ld | linker script | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 4,515 |
```objective-c
/*
*
*/
#include <string.h>
#include <errno.h>
#include <zephyr/sys/sys_io.h>
#include <adsp/cache.h>
#ifndef __INC_IMX_SOC_H
#define __INC_IMX_SOC_H
/* Macros related to interrupt handling */
#define XTENSA_IRQ_NUM_SHIFT 0
#define XTENSA_IRQ_NUM_MASK 0xff
/*
* IRQs are mapped on levels. 2nd... | /content/code_sandbox/soc/nxp/imx/imx8x/adsp/include/soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 188 |
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