text stringlengths 9 39.2M | dir stringlengths 25 226 | lang stringclasses 163 values | created_date timestamp[s] | updated_date timestamp[s] | repo_name stringclasses 751 values | repo_full_name stringclasses 752 values | star int64 1.01k 183k | len_tokens int64 1 18.5M |
|---|---|---|---|---|---|---|---|---|
```unknown
# XIAO ESP32S3 board configuration
config BOARD_XIAO_ESP32S3
select SOC_ESP32S3_WROOM_N8R8
select SOC_ESP32S3_PROCPU if BOARD_XIAO_ESP32S3_ESP32S3_PROCPU
select SOC_ESP32S3_APPCPU if BOARD_XIAO_ESP32S3_ESP32S3_APPCPU
``` | /content/code_sandbox/boards/seeed/xiao_esp32s3/Kconfig.xiao_esp32s3 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 91 |
```yaml
identifier: xiao_esp32s3/esp32s3/procpu
name: XIAO ESP32S3 PROCPU
type: mcu
arch: xtensa
toolchain:
- zephyr
supported:
- gpio
- uart
- i2c
- spi
- can
- counter
- watchdog
- entropy
- pwm
- dma
testing:
ignore_tags:
- net
- bluetooth
vendor: seeed
``` | /content/code_sandbox/boards/seeed/xiao_esp32s3/xiao_esp32s3_procpu.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 112 |
```cmake
if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*")
set(OPENOCD OPENOCD-NOTFOUND)
endif()
find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH)
include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake)
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
``` | /content/code_sandbox/boards/seeed/xiao_esp32s3/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 102 |
```unknown
CONFIG_MAIN_STACK_SIZE=2048
CONFIG_CLOCK_CONTROL=y
``` | /content/code_sandbox/boards/seeed/xiao_esp32s3/xiao_esp32s3_appcpu_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 15 |
```unknown
CONFIG_MAIN_STACK_SIZE=2048
CONFIG_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_UART_CONSOLE=y
CONFIG_GPIO=y
``` | /content/code_sandbox/boards/seeed/xiao_esp32s3/xiao_esp32s3_procpu_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 27 |
```unknown
/*
*
*/
/dts-v1/;
#include <espressif/esp32s3/esp32s3_appcpu.dtsi>
/ {
model = "Seeed Xiao ESP32S3 APPCPU";
compatible = "espressif,esp32s3";
chosen {
zephyr,sram = &sram0;
zephyr,ipc_shm = &shm0;
zephyr,ipc = &ipm0;
};
};
&trng0 {
status = "okay";
};
&ipm0 {
status = "okay";
};
&flash0 {
status = "okay";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* Reserve 64kB for the bootloader */
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 0x00010000>;
read-only;
};
/* Reserve 1024kB for the application in slot 0 */
slot0_partition: partition@10000 {
label = "image-0";
reg = <0x00010000 0x00100000>;
};
/* Reserve 1024kB for the application in slot 1 */
slot1_partition: partition@110000 {
label = "image-1";
reg = <0x00110000 0x00100000>;
};
/* Reserve 256kB for the scratch partition */
scratch_partition: partition@210000 {
label = "image-scratch";
reg = <0x00210000 0x00040000>;
};
storage_partition: partition@250000 {
label = "storage";
reg = <0x00250000 0x00006000>;
};
};
};
``` | /content/code_sandbox/boards/seeed/xiao_esp32s3/xiao_esp32s3_appcpu.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 409 |
```unknown
choice BOOTLOADER
default BOOTLOADER_MCUBOOT
endchoice
choice BOOT_SIGNATURE_TYPE
default BOOT_SIGNATURE_TYPE_NONE
endchoice
``` | /content/code_sandbox/boards/seeed/xiao_esp32s3/Kconfig.sysbuild | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```unknown
/*
*
*/
/ {
xiao_d: connector {
compatible = "seeed,xiao-gpio";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpio0 1 0>, /* D0 */
<1 0 &gpio0 2 0>, /* D1 */
<2 0 &gpio0 3 0>, /* D2 */
<3 0 &gpio0 4 0>, /* D3 */
<4 0 &gpio0 5 0>, /* D4 */
<5 0 &gpio0 6 0>, /* D5 */
<6 0 &gpio1 11 0>, /* D6 */
<7 0 &gpio1 12 0>, /* D7 */
<8 0 &gpio0 7 0>, /* D8 */
<9 0 &gpio0 8 0>, /* D9 */
<10 0 &gpio0 9 0>; /* D10 */
};
};
xiao_spi: &spi2 {};
xiao_i2c: &i2c0 {};
xiao_serial: &uart0 {};
xiao_adc: &adc0 {};
``` | /content/code_sandbox/boards/seeed/xiao_esp32s3/seeed_xiao_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 303 |
```yaml
board:
name: xiao_esp32s3
vendor: seeed
socs:
- name: esp32s3
``` | /content/code_sandbox/boards/seeed/xiao_esp32s3/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 33 |
```unknown
/*
*
*/
#include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
#include <dt-bindings/pinctrl/esp32s3-pinctrl.h>
#include <zephyr/dt-bindings/pinctrl/esp32s3-gpio-sigmap.h>
&pinctrl {
uart0_default: uart0_default {
group1 {
pinmux = <UART0_TX_GPIO43>;
output-high;
};
group2 {
pinmux = <UART0_RX_GPIO44>;
bias-pull-up;
};
};
spim2_default: spim2_default {
group1 {
pinmux = <SPIM2_MISO_GPIO8>,
<SPIM2_SCLK_GPIO7>;
};
group2 {
pinmux = <SPIM2_MOSI_GPIO9>;
output-low;
};
};
i2c0_default: i2c0_default {
group1 {
pinmux = <I2C0_SDA_GPIO5>,
<I2C0_SCL_GPIO6>;
bias-pull-up;
drive-open-drain;
output-high;
};
};
twai_default: twai_default {
group1 {
pinmux = <TWAI_TX_GPIO3>,
<TWAI_RX_GPIO4>;
};
};
};
``` | /content/code_sandbox/boards/seeed/xiao_esp32s3/xiao_esp32s3-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 303 |
```unknown
if BOARD_XIAO_ESP32S3_ESP32S3_PROCPU
config HEAP_MEM_POOL_ADD_SIZE_BOARD
int
default 65535 if WIFI && BT
default 51200 if WIFI
default 40960 if BT
default 4096
endif # BOARD_XIAO_ESP32S3_ESP32S3_PROCPU
if BOARD_XIAO_ESP32S3_ESP32S3_APPCPU
config HEAP_MEM_POOL_ADD_SIZE_BOARD
default 256
endif # BOARD_XIAO_ESP32S3_ESP32S3_APPCPU
``` | /content/code_sandbox/boards/seeed/xiao_esp32s3/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 126 |
```yaml
identifier: xiao_esp32s3/esp32s3/appcpu
name: XIAO ESP32S3 APPCPU
type: mcu
arch: xtensa
toolchain:
- zephyr
supported:
- uart
testing:
ignore_tags:
- net
- bluetooth
- flash
- cpp
- posix
- watchdog
- logging
- kernel
- pm
- gpio
- crypto
- eeprom
- heap
- cmsis_rtos
- jwt
- zdsp
vendor: seeed
``` | /content/code_sandbox/boards/seeed/xiao_esp32s3/xiao_esp32s3_appcpu.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 135 |
```restructuredtext
.. _lora_e5_dev_board:
Seeed Studio LoRa-E5 Dev Board
##############################
Overview
********
The LoRa-E5 Dev Board is a compact board for the evaluation of the
Seeed Studio LoRa-E5 STM32WLE5JC module.
The LoRa-E5-HF STM32WLE5JC Module supports multiple LPWAN protocols on the
868/915MHz frequency bands with up to 20.8dBm output power at 3.3V.
All GPIOs of the LoRa-E5 Module are laid out supporting
various data protocols and interfaces including RS-485 and Grove.
.. image:: img/lora_e5_dev_board.jpg
:align: center
:alt: LoRa-E5 Dev board
Hardware
********
The boards LoRa-E5 Module packages a STM32WLE5JC SOC, a 32MHz TCXO,
and a 32.768kHz crystal oscillator in a 28-pin SMD package.
This STM32WLEJC SOC is powered by ARM Cortex-M4 core and integrates Semtech
SX126X LoRa IP to support (G)FSK, BPSK, (G)MSK, and LoRa modulations.
- LoRa-E5 STM32WLE5JC Module with STM32WLE5JC multiprotocol LPWAN single-core
32-bit microcontroller (Arm Cortex-M4 at 48 MHz) in 28-pin SMD package
featuring:
- Ultra-low-power MCU
- RF transceiver (150 MHz to 960 MHz frequency range) supporting LoRa,
(G)FSK, (G)MSK, and BPSK modulations
- 256-Kbyte Flash memory and 64-Kbyte SRAM
- Hardware encryption AES256-bit and a True random number generator
- 1 user LED
- 1 user, 1 boot, and 1 reset push-button
- 32.768 kHz LSE crystal oscillator
- 32 MHz HSE oscillator
- 1 LM75A Temperature Sensor
- 1 SPI-Flash Bonding Pad(not populated)
- Board connectors:
- USB Type-C connector
- JST2.0 Battery connector (3-5V)
- 3 Grove connectors(2x IIC and 1x UART)
- RS-485 connector
- SMA-K and IPEX antenna connectors
- Delivered with SMA antenna (per default IPEX connector is disconnected)
- Flexible power-supply options: USB Type C, JST2.0, 2x AA 3V Battery Holder, or
external sources via header.
- Switchable 3.3V and 5V power rails.
- Comprehensive free software libraries and examples available with the
STM32CubeWL MCU Package
- Support of a wide choice of Integrated Development Environments (IDEs)
including IAR Embedded Workbench, MDK-ARM, and STM32CubeIDE
- Suitable for rapid prototyping of end nodes based on LoRaWAN, Sigfox, wM-Bus,
and many other proprietary protocols
More information about the board can be found at the `LoRa-E5 Dev Board Wiki`_.
More information about LoRa-E5 STM32WLE5JC Module can be found here:
- `LoRa-E5 STM32WLE5JC Module Wiki`_
- `LoRa-E5 STM32WLE5JC Module datasheet`_
- `STM32WLE5JC datasheet`_
- `STM32WLE5JC reference manual`_
- `STM32WLE5JC on www.st.com`_
Supported Features
==================
The Zephyr LoRa-E5 Dev Board configuration supports the following hardware
features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| ADC | on-chip | adc |
+-----------+------------+-------------------------------------+
| AES | on-chip | crypto |
+-----------+------------+-------------------------------------+
| COUNTER | on-chip | rtc |
+-----------+------------+-------------------------------------+
| CLOCK | on-chip | reset and clock control |
+-----------+------------+-------------------------------------+
| FLASH | on-chip | flash |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| MPU | on-chip | arch/arm |
+-----------+------------+-------------------------------------+
| NVIC | on-chip | arch/arm |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| RADIO | on-chip | LoRa |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | independent watchdog |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported on this Zephyr port.
The default configuration can be found in:
- :zephyr_file:`boards/seeed/lora_e5_dev_board/lora_e5_dev_board_defconfig`
- :zephyr_file:`boards/seeed/lora_e5_dev_board/lora_e5_dev_board.dts`
Connections and IOs
===================
LoRa-E5 Dev Board has 4 GPIO controllers. These controllers are responsible
for pin muxing, input/output, pull-up, etc.
Available pins:
---------------
.. image:: img/lora_e5_dev_board_pinout.jpg
:align: center
:alt: LoRa-E5 Dev Board Pinout
Default Zephyr Peripheral Mapping:
----------------------------------
.. rst-class:: rst-columns
- LPUART_1 TX : PC1
- LPUART_1 RX : PC0
- USART_1 TX : PB6
- USART_1 RX : PB7
- USART_2 TX : PA2
- USART_2 RX : PA3
- I2C_2_SCL : PB15
- I2C_2_SDA : PA15
- SPI_2_NSS : PB9
- SPI_2_SCK : PB13
- SPI_2_MISO : PB14
- SPI_2_MOSI : PA10
- BOOT_PB : PB13
- USER_PB : PA0
- LED_1 : PB5
- ADC1 IN2 : PB3
Default Zephyr Peripheral to Connector Mapping:
-----------------------------------------------
.. rst-class:: rst-columns
- RS-485: USART_2
- grove_serial: USART_1
- grove_i2c: I2C_2
Power Rails
-----------
The board has multiple power rails, which are always turned on in the default
configuration.
+---------+-------------------+-------------------+
| Name | Derived from | Controlled by |
+=========+===================+===================+
| MAIN | battery, USB, ... | Always on |
+---------+-------------------+-------------------+
| VCC | MAIN | Always on |
+---------+-------------------+-------------------+
| 5V | MAIN | SOC pin PB10 |
+---------+-------------------+-------------------+
| 3V3 | VCC | SOC pin PA9 |
+---------+-------------------+-------------------+
A list of the devices and their power rails:
+--------------------+---------+
| Device | Rail |
+====================+=========+
| STM32WLE5JC | VCC |
+--------------------+---------+
| RS-485 Transceiver | 3V3 |
+--------------------+---------+
System Clock
------------
LoRa-E5 Development board System Clock could be driven by the low-power
internal(MSI), High-speed internal(HSI) or High-speed external(HSE) oscillator,
as well as main PLL clock.
By default System clock is driven by the MSI clock at 48MHz.
Programming and Debugging
*************************
Applications for the ``lora_e5_dev_board`` board configuration can be built the
usual way (see :ref:`build_an_application`).
In the factory the module is flashed with an DFU bootloader, an AT command
firmware, and the read protection level 1 is enabled.
So before you can program a zephyr application to the module for the first time
you have to reset the read protection to level 0.
In case you use an st-link debugger you can use the STM32CubeProgrammer GUI to
set the RDP option byte to ``AA``,
or use the STM32_Programmer_CLI passing the ``--readunprotect`` command
to perform this read protection regression.
The RDP level 1 to RDP level 0 regression will erase the factory programmed AT
firmware, from which seeed studio has neither released the source code nor a binary.
Also, note that on the module the ``BOOT0`` pin of the SOC is not accessible,
so the system bootloader will only be executed if configured in the option bytes.
Flashing
========
The LoRa-E5 Dev Board does not include a on-board debug probe.
But the module can be debugged by connecting an external debug probe to the
blue 2.54mm header labeled ``SWIM/SWD``.
Depending on the external probe used, ``openocd``, the ``stm32cubeprogrammer``,
``pyocd``, ``blackmagic``, or ``jlink`` runner can be used to flash the board.
Additional notes:
- Pyocd: For STM32WL support Pyocd needs additional target information, which
can be installed by adding "pack" support with the following pyocd command:
.. code-block:: console
$ pyocd pack --update
$ pyocd pack --install stm32wl
Flashing an application to LoRa-E5 Dev board
--------------------------------------------
Connect the LoRa-E5 to your host computer using the external debug probe.
Then build and flash an application. Here is an example for the
:ref:`hello_world` application.
Run a serial host program to connect with your board:
Per default the console on ``usart1`` is available on the USB Type C connector
via the built-in USB to UART converter.
.. code-block:: console
$ picocom --baud 115200 /dev/ttyACM0
Then build and flash the application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: lora_e5_dev_board
:goals: build flash
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:zephyr:code-sample:`blinky` application.
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: lora_e5_dev_board
:maybe-skip-config:
:goals: debug
.. _LoRa-E5 Dev Board Wiki:
path_to_url
.. _LoRa-E5 STM32WLE5JC Module Wiki:
path_to_url
.. _LoRa-E5 STM32WLE5JC Module datasheet:
path_to_url
.. _STM32WLE5JC on www.st.com:
path_to_url
.. _STM32WLE5JC datasheet:
path_to_url
.. _STM32WLE5JC reference manual:
path_to_url
``` | /content/code_sandbox/boards/seeed/lora_e5_dev_board/doc/lora_e5_dev_board.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,529 |
```ini
set ESP_RTOS none
set ESP32_ONLYCPU 1
# Source the JTAG interface configuration file
source [find interface/esp_usb_jtag.cfg]
# Source the ESP32-S3 configuration file
source [find target/esp32s3.cfg]
``` | /content/code_sandbox/boards/seeed/xiao_esp32s3/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 56 |
```unknown
/*
*
*/
/dts-v1/;
#include <espressif/esp32s3/esp32s3_wroom_n8r8.dtsi>
#include "xiao_esp32s3-pinctrl.dtsi"
#include "seeed_xiao_connector.dtsi"
/ {
model = "Seeed Xiao ESP32S3 PROCPU";
compatible = "seeed,xiao-esp32s3";
chosen {
zephyr,sram = &sram0;
zephyr,console = &usb_serial;
zephyr,shell-uart = &usb_serial;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,bt-hci = &esp32_bt_hci;
};
aliases {
i2c-0 = &i2c0;
watchdog0 = &wdt0;
led0 = &led0;
};
leds {
compatible = "gpio-leds";
led0: led_0 {
gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
label = "BUILTIN LED";
};
};
};
&usb_serial {
status = "okay";
};
&uart0 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart0_default>;
pinctrl-names = "default";
};
&i2c0 {
status = "okay";
clock-frequency = <I2C_BITRATE_STANDARD>;
pinctrl-0 = <&i2c0_default>;
pinctrl-names = "default";
};
&trng0 {
status = "okay";
};
&spi2 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
pinctrl-0 = <&spim2_default>;
pinctrl-names = "default";
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&wdt0 {
status = "okay";
};
&twai {
pinctrl-0 = <&twai_default>;
pinctrl-names = "default";
};
&timer0 {
status = "okay";
};
&timer1 {
status = "okay";
};
&flash0 {
status = "okay";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 0x0000F000>;
read-only;
};
slot0_partition: partition@10000 {
label = "image-0";
reg = <0x00010000 0x00100000>;
};
slot1_partition: partition@110000 {
label = "image-1";
reg = <0x00110000 0x00100000>;
};
scratch_partition: partition@210000 {
label = "image-scratch";
reg = <0x00210000 0x00040000>;
};
storage_partition: partition@250000 {
label = "storage";
reg = <0x00250000 0x00006000>;
};
};
};
&esp32_bt_hci {
status = "okay";
};
``` | /content/code_sandbox/boards/seeed/xiao_esp32s3/xiao_esp32s3_procpu.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 733 |
```cmake
if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*")
set(OPENOCD OPENOCD-NOTFOUND)
endif()
find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH)
include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake)
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
``` | /content/code_sandbox/boards/seeed/xiao_esp32c3/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 102 |
```yaml
identifier: xiao_esp32c3
name: XIAO ESP32C3
type: mcu
arch: riscv
toolchain:
- zephyr
supported:
- gpio
- i2c
- spi
- uart
- watchdog
- can
testing:
ignore_tags:
- net
- bluetooth
vendor: seeed
``` | /content/code_sandbox/boards/seeed/xiao_esp32c3/xiao_esp32c3.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 88 |
```unknown
choice BOOTLOADER
default BOOTLOADER_MCUBOOT
endchoice
choice BOOT_SIGNATURE_TYPE
default BOOT_SIGNATURE_TYPE_NONE
endchoice
``` | /content/code_sandbox/boards/seeed/xiao_esp32c3/Kconfig.sysbuild | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```unknown
/*
*
*/
/ {
xiao_d: connector {
compatible = "seeed,xiao-gpio";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpio0 2 0>, /* D0 */
<1 0 &gpio0 3 0>, /* D1 */
<2 0 &gpio0 4 0>, /* D2 */
<3 0 &gpio0 5 0>, /* D3 */
<4 0 &gpio0 6 0>, /* D4 */
<5 0 &gpio0 7 0>, /* D5 */
<6 0 &gpio0 21 0>, /* D6 */
<7 0 &gpio0 20 0>, /* D7 */
<8 0 &gpio0 8 0>, /* D8 */
<9 0 &gpio0 9 0>, /* D9 */
<10 0 &gpio0 10 0>; /* D10 */
};
};
xiao_spi: &spi2 {};
xiao_i2c: &i2c0 {};
xiao_serial: &uart0 {};
xiao_adc: &adc0 {};
``` | /content/code_sandbox/boards/seeed/xiao_esp32c3/seeed_xiao_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 303 |
```unknown
config BOARD_XIAO_ESP32C3
select SOC_ESP32C3_FX4
``` | /content/code_sandbox/boards/seeed/xiao_esp32c3/Kconfig.xiao_esp32c3 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 24 |
```yaml
board:
name: xiao_esp32c3
vendor: seeed
socs:
- name: esp32c3
``` | /content/code_sandbox/boards/seeed/xiao_esp32c3/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 33 |
```unknown
/*
*
*/
#include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
#include <dt-bindings/pinctrl/esp32c3-pinctrl.h>
#include <zephyr/dt-bindings/pinctrl/esp32c3-gpio-sigmap.h>
&pinctrl {
uart0_default: uart0_default {
group1 {
pinmux = <UART0_TX_GPIO21>;
output-high;
};
group2 {
pinmux = <UART0_RX_GPIO20>;
bias-pull-up;
};
};
spim2_default: spim2_default {
group1 {
pinmux = <SPIM2_MISO_GPIO9>,
<SPIM2_SCLK_GPIO8>;
};
group2 {
pinmux = <SPIM2_MOSI_GPIO10>;
output-low;
};
};
i2c0_default: i2c0_default {
group1 {
pinmux = <I2C0_SDA_GPIO6>,
<I2C0_SCL_GPIO7>;
bias-pull-up;
drive-open-drain;
output-high;
};
};
twai_default: twai_default {
group1 {
pinmux = <TWAI_TX_GPIO2>,
<TWAI_RX_GPIO3>;
};
};
};
``` | /content/code_sandbox/boards/seeed/xiao_esp32c3/xiao_esp32c3-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 302 |
```unknown
config HEAP_MEM_POOL_ADD_SIZE_BOARD
int
default 65535 if WIFI && BT
default 51200 if WIFI
default 40960 if BT
default 4096
``` | /content/code_sandbox/boards/seeed/xiao_esp32c3/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 40 |
```restructuredtext
.. _xiao_esp32s3:
XIAO ESP32S3
############
Overview
********
Seeed Studio XIAO ESP32S3 is an IoT mini development board based on the
Espressif ESP32-S3 WiFi/Bluetooth dual-mode chip.
For more details see the `Seeed Studio XIAO ESP32S3`_ wiki page.
.. figure:: img/xiao_esp32s3.jpg
:align: center
:alt: XIAO ESP32S3
XIAO ESP32S3
Hardware
********
This board is based on the ESP32-S3 with 8MB of flash, WiFi and BLE support. It
has an USB-C port for programming and debugging, integrated battery charging
and an U.FL external antenna connector. It is based on a standard XIAO 14 pin
pinout.
ESP32-S3 is a low-power MCU-based system on a chip (SoC) with integrated 2.4 GHz Wi-Fi
and Bluetooth Low Energy (Bluetooth LE). It consists of high-performance dual-core microprocessor
(Xtensa 32-bit LX7), a low power coprocessor, a Wi-Fi baseband, a Bluetooth LE baseband,
RF module, and numerous peripherals.
Supported Features
==================
Current Zephyr's XIAO ESP32S3 board supports the following features:
+------------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+============+============+=====================================+
| UART | on-chip | serial port |
+------------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+------------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+------------+------------+-------------------------------------+
| USB-JTAG | on-chip | hardware interface |
+------------+------------+-------------------------------------+
| SPI Master | on-chip | spi |
+------------+------------+-------------------------------------+
| TWAI/CAN | on-chip | can |
+------------+------------+-------------------------------------+
| ADC | on-chip | adc |
+------------+------------+-------------------------------------+
| Timers | on-chip | counter |
+------------+------------+-------------------------------------+
| Watchdog | on-chip | watchdog |
+------------+------------+-------------------------------------+
| TRNG | on-chip | entropy |
+------------+------------+-------------------------------------+
| LEDC | on-chip | pwm |
+------------+------------+-------------------------------------+
| MCPWM | on-chip | pwm |
+------------+------------+-------------------------------------+
| PCNT | on-chip | qdec |
+------------+------------+-------------------------------------+
| GDMA | on-chip | dma |
+------------+------------+-------------------------------------+
Connections and IOs
===================
The board uses a standard XIAO pinout, the default pin mapping is the following:
.. figure:: img/xiao_esp32s3_pinout.jpg
:align: center
:alt: XIAO ESP32S3 Pinout
XIAO ESP32S3 Pinout
Prerequisites
-------------
Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command
below to retrieve those files.
.. code-block:: console
west blobs fetch hal_espressif
.. note::
It is recommended running the command above after :file:`west update`.
Building & Flashing
*******************
Simple boot
===========
The board could be loaded using the single binary image, without 2nd stage bootloader.
It is the default option when building the application without additional configuration.
.. note::
Simple boot does not provide any security features nor OTA updates.
MCUboot bootloader
==================
User may choose to use MCUboot bootloader instead. In that case the bootloader
must be build (and flash) at least once.
There are two options to be used when building an application:
1. Sysbuild
2. Manual build
.. note::
User can select the MCUboot bootloader by adding the following line
to the board default configuration file.
.. code:: cfg
CONFIG_BOOTLOADER_MCUBOOT=y
Sysbuild
========
The sysbuild makes possible to build and flash all necessary images needed to
bootstrap the board with the ESP32 SoC.
To build the sample application using sysbuild use the command:
.. zephyr-app-commands::
:tool: west
:app: samples/hello_world
:board: xiao_esp32s3
:goals: build
:west-args: --sysbuild
:compact:
By default, the ESP32 sysbuild creates bootloader (MCUboot) and application
images. But it can be configured to create other kind of images.
Build directory structure created by sysbuild is different from traditional
Zephyr build. Output is structured by the domain subdirectories:
.. code-block::
build/
hello_world
zephyr
zephyr.elf
zephyr.bin
mcuboot
zephyr
zephyr.elf
zephyr.bin
domains.yaml
.. note::
With ``--sysbuild`` option the bootloader will be re-build and re-flash
every time the pristine build is used.
For more information about the system build please read the :ref:`sysbuild` documentation.
Manual build
============
During the development cycle, it is intended to build & flash as quickly possible.
For that reason, images can be build one at a time using traditional build.
The instructions following are relevant for both manual build and sysbuild.
The only difference is the structure of the build directory.
.. note::
Remember that bootloader (MCUboot) needs to be flash at least once.
Build and flash applications as usual (see :ref:`build_an_application` and
:ref:`application_run` for more details).
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: xiao_esp32s3/esp32s3/procpu
:goals: build
The usual ``flash`` target will work with the ``xiao_esp32s3`` board
configuration. Here is an example for the :ref:`hello_world`
application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: xiao_esp32s3/esp32s3/procpu
:goals: flash
Open the serial monitor using the following command:
.. code-block:: shell
west espressif monitor
After the board has automatically reset and booted, you should see the following
message in the monitor:
.. code-block:: console
***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx *****
Hello World! xiao_esp32s3
Debugging
*********
ESP32-S3 support on OpenOCD is available upstream as of version 0.12.0.
Download and install OpenOCD from `OpenOCD`_.
ESP32-S3 has a built-in JTAG circuitry and can be debugged without any additional chip. Only an USB cable connected to the D+/D- pins is necessary.
Further documentation can be obtained from the SoC vendor in `JTAG debugging
for ESP32-S3`_.
Here is an example for building the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: xiao_esp32s3/esp32/procpu
:goals: build flash
You can debug an application in the usual way. Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: xiao_esp32s3/esp32/procpu
:goals: debug
.. _`JTAG debugging for ESP32-S3`: path_to_url
.. _`OpenOCD`: path_to_url
References
**********
.. target-notes::
.. _`Seeed Studio XIAO ESP32S3`: path_to_url
``` | /content/code_sandbox/boards/seeed/xiao_esp32s3/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,762 |
```unknown
CONFIG_MAIN_STACK_SIZE=2048
CONFIG_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_UART_CONSOLE=y
CONFIG_GPIO=y
``` | /content/code_sandbox/boards/seeed/xiao_esp32c3/xiao_esp32c3_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 27 |
```unknown
/*
*
*/
/dts-v1/;
#include <espressif/esp32c3/esp32c3_fx4.dtsi>
#include "xiao_esp32c3-pinctrl.dtsi"
#include "seeed_xiao_connector.dtsi"
/ {
model = "Seeed XIAO ESP32C3";
compatible = "seeed,xiao-esp32c3";
chosen {
zephyr,sram = &sram0;
zephyr,console = &usb_serial;
zephyr,shell-uart = &usb_serial;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,canbus = &twai;
zephyr,bt-hci = &esp32_bt_hci;
};
aliases {
i2c-0 = &i2c0;
watchdog0 = &wdt0;
};
};
&uart0 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart0_default>;
pinctrl-names = "default";
};
&usb_serial {
status = "okay";
};
&i2c0 {
status = "okay";
clock-frequency = <I2C_BITRATE_STANDARD>;
pinctrl-0 = <&i2c0_default>;
pinctrl-names = "default";
};
&trng0 {
status = "okay";
};
&spi2 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
pinctrl-0 = <&spim2_default>;
pinctrl-names = "default";
};
&gpio0 {
status = "okay";
};
&wdt0 {
status = "okay";
};
&timer0 {
status = "okay";
};
&timer1 {
status = "okay";
};
&twai {
status = "okay";
pinctrl-0 = <&twai_default>;
pinctrl-names = "default";
};
&wifi {
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 0x0000F000>;
read-only;
};
slot0_partition: partition@10000 {
label = "image-0";
reg = <0x00010000 0x00100000>;
};
slot1_partition: partition@110000 {
label = "image-1";
reg = <0x00110000 0x00100000>;
};
scratch_partition: partition@210000 {
label = "image-scratch";
reg = <0x00210000 0x00040000>;
};
storage_partition: partition@250000 {
label = "storage";
reg = <0x00250000 0x00006000>;
};
};
};
&esp32_bt_hci {
status = "okay";
};
``` | /content/code_sandbox/boards/seeed/xiao_esp32c3/xiao_esp32c3.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 682 |
```ini
set ESP_RTOS none
source [find interface/esp_usb_jtag.cfg]
source [find target/esp32c3.cfg]
adapter speed 5000
``` | /content/code_sandbox/boards/seeed/xiao_esp32c3/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 35 |
```unknown
config BOARD_LORA_E5_MINI
select SOC_STM32WLE5XX
``` | /content/code_sandbox/boards/seeed/lora_e5_mini/Kconfig.lora_e5_mini | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 21 |
```cmake
board_runner_args(pyocd "--target=stm32wle5jcix")
board_runner_args(pyocd "--flash-opt=-O reset_type=hw")
board_runner_args(pyocd "--flash-opt=-O connect_mode=under-reset")
board_runner_args(jlink "--device=STM32WLE5JC" "--speed=4000" "--reset-after-load")
board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
board_runner_args(blackmagicprobe "--connect-rst")
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
include(${ZEPHYR_BASE}/boards/common/blackmagicprobe.board.cmake)
``` | /content/code_sandbox/boards/seeed/lora_e5_mini/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 202 |
```yaml
identifier: lora_e5_mini
name: Seeedstudio LoRa-E5 mini
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 64
flash: 256
supported:
- counter
- gpio
- i2c
- nvs
- uart
- watchdog
- lora
vendor: seeed studio
``` | /content/code_sandbox/boards/seeed/lora_e5_mini/lora_e5_mini.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 100 |
```yaml
board:
name: lora_e5_mini
vendor: seeed
socs:
- name: stm32wle5xx
``` | /content/code_sandbox/boards/seeed/lora_e5_mini/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 33 |
```restructuredtext
.. _xiao_esp32c3:
XIAO ESP32C3
############
Overview
********
Seeed Studio XIAO ESP32C3 is an IoT mini development board based on the
Espressif ESP32-C3 WiFi/Bluetooth dual-mode chip.
For more details see the `Seeed Studio XIAO ESP32C3`_ wiki page.
.. figure:: img/xiao_esp32c.jpg
:align: center
:alt: XIAO ESP32C3
XIAO ESP32C3
Hardware
********
This board is based on the ESP32-C3 with 4MB of flash, WiFi and BLE support. It
has an USB-C port for programming and debugging, integrated battery charging
and an U.FL external antenna connector. It is based on a standard XIAO 14 pin
pinout.
Supported Features
==================
The XIAO ESP32C3 board configuration supports the following hardware features:
+-----------+------------+------------------+
| Interface | Controller | Driver/Component |
+===========+============+==================+
| PMP | on-chip | arch/riscv |
+-----------+------------+------------------+
| INTMTRX | on-chip | intc_esp32c3 |
+-----------+------------+------------------+
| PINMUX | on-chip | pinctrl_esp32 |
+-----------+------------+------------------+
| USB UART | on-chip | serial_esp32_usb |
+-----------+------------+------------------+
| GPIO | on-chip | gpio_esp32 |
+-----------+------------+------------------+
| UART | on-chip | uart_esp32 |
+-----------+------------+------------------+
| I2C | on-chip | i2c_esp32 |
+-----------+------------+------------------+
| SPI | on-chip | spi_esp32_spim |
+-----------+------------+------------------+
| TWAI | on-chip | can_esp32_twai |
+-----------+------------+------------------+
Connections and IOs
===================
The board uses a standard XIAO pinout, the default pin mapping is the following:
.. figure:: img/xiao_esp32c3_pinout.jpg
:align: center
:alt: XIAO ESP32C3 Pinout
XIAO ESP32C3 Pinout
Prerequisites
=============
Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command
below to retrieve those files.
.. code-block:: console
west blobs fetch hal_espressif
.. note::
It is recommended running the command above after :file:`west update`.
Building & Flashing
*******************
Simple boot
===========
The board could be loaded using the single binary image, without 2nd stage bootloader.
It is the default option when building the application without additional configuration.
.. note::
Simple boot does not provide any security features nor OTA updates.
MCUboot bootloader
==================
User may choose to use MCUboot bootloader instead. In that case the bootloader
must be build (and flash) at least once.
There are two options to be used when building an application:
1. Sysbuild
2. Manual build
.. note::
User can select the MCUboot bootloader by adding the following line
to the board default configuration file.
.. code:: cfg
CONFIG_BOOTLOADER_MCUBOOT=y
Sysbuild
========
The sysbuild makes possible to build and flash all necessary images needed to
bootstrap the board with the ESP32 SoC.
To build the sample application using sysbuild use the command:
.. zephyr-app-commands::
:tool: west
:app: samples/hello_world
:board: xiao_esp32c3
:goals: build
:west-args: --sysbuild
:compact:
By default, the ESP32 sysbuild creates bootloader (MCUboot) and application
images. But it can be configured to create other kind of images.
Build directory structure created by Sysbuild is different from traditional
Zephyr build. Output is structured by the domain subdirectories:
.. code-block::
build/
hello_world
zephyr
zephyr.elf
zephyr.bin
mcuboot
zephyr
zephyr.elf
zephyr.bin
domains.yaml
.. note::
With ``--sysbuild`` option the bootloader will be re-build and re-flash
every time the pristine build is used.
For more information about the system build please read the :ref:`sysbuild` documentation.
Manual build
============
During the development cycle, it is intended to build & flash as quickly possible.
For that reason, images can be build one at a time using traditional build.
The instructions following are relevant for both manual build and sysbuild.
The only difference is the structure of the build directory.
.. note::
Remember that bootloader (MCUboot) needs to be flash at least once.
For the :code:`Hello, world!` application, follow the instructions below.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: xiao_esp32c3
:goals: build flash
Since the Zephyr console is by default on the `usb_serial` device, we use
the espressif monitor to view.
.. code-block:: console
$ west espressif monitor
After the board has automatically reset and booted, you should see the following
message in the monitor:
.. code-block:: console
***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx *****
Hello World! xiao_esp32c3
Debugging
*********
As with much custom hardware, the ESP32 modules require patches to
OpenOCD that are not upstreamed yet. Espressif maintains their own fork of
the project. The custom OpenOCD can be obtained at `OpenOCD ESP32`_
The Zephyr SDK uses a bundled version of OpenOCD by default. You can overwrite that behavior by adding the
``-DOPENOCD=<path/to/bin/openocd> -DOPENOCD_DEFAULT_PATH=<path/to/openocd/share/openocd/scripts>``
parameter when building.
Here is an example for building the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: xiao_esp32c3
:goals: build flash
:gen-args: -DOPENOCD=<path/to/bin/openocd> -DOPENOCD_DEFAULT_PATH=<path/to/openocd/share/openocd/scripts>
You can debug an application in the usual way. Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: xiao_esp32c3
:goals: debug
References
**********
.. target-notes::
.. _`Seeed Studio XIAO ESP32C3`: path_to_url
.. _`OpenOCD ESP32`: path_to_url
``` | /content/code_sandbox/boards/seeed/xiao_esp32c3/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,561 |
```unknown
/*
*
*/
/dts-v1/;
#include <seeed_studio/lora-e5.dtsi>
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "Seeed Studio LoRa-E5 mini";
compatible = "seeed,lora-e5-mini";
chosen {
zephyr,console = &usart1;
zephyr,shell-uart = &usart1;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
};
leds {
compatible = "gpio-leds";
red_led_1: led_1 {
gpios = <&gpiob 5 GPIO_ACTIVE_LOW>;
label = "User LED1";
};
};
gpio_keys {
compatible = "gpio-keys";
boot_button: button_0 {
label = "SW1";
gpios = <&gpiob 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
zephyr,code = <INPUT_KEY_0>;
};
};
aliases {
led0 = &red_led_1;
sw0 = &boot_button;
lora0 = &lora;
watchdog0 = &iwdg;
};
};
stm32_lp_tick_source: &lptim1 {
status = "okay";
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>,
<&rcc STM32_SRC_LSI LPTIM1_SEL(1)>;
};
&clk_lsi {
status = "okay";
};
&clk_msi {
status = "okay";
msi-range = <11>;
};
&rcc {
clocks = <&clk_msi>;
clock-frequency = <DT_FREQ_M(48)>;
cpu1-prescaler = <1>;
ahb3-prescaler = <1>;
apb1-prescaler = <1>;
apb2-prescaler = <1>;
};
&usart1 {
pinctrl-0 = <&usart1_tx_pb6 &usart1_rx_pb7>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&i2c2 {
pinctrl-0 = <&i2c2_scl_pb15 &i2c2_sda_pa15>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000400>,
<&rcc STM32_SRC_LSI RTC_SEL(2)>;
status = "okay";
};
&iwdg {
status = "okay";
};
&aes {
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 DT_SIZE_K(48)>;
};
slot0_partition: partition@c000 {
label = "image-0";
reg = <0x0000c000 DT_SIZE_K(96)>;
};
slot1_partition: partition@24000 {
label = "image-1";
reg = <0x00024000 DT_SIZE_K(96)>;
};
/* 16KB (8x2kB pages) of storage at the end of the flash */
storage_partition: partition@3c000 {
label = "storage";
reg = <0x0003c000 DT_SIZE_K(16)>;
};
};
};
``` | /content/code_sandbox/boards/seeed/lora_e5_mini/lora_e5_mini.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 820 |
```unknown
# enable uart driver
CONFIG_SERIAL=y
# enable GPIO
CONFIG_GPIO=y
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# Enable MPU
CONFIG_ARM_MPU=y
# Enable HW stack protection
CONFIG_HW_STACK_PROTECTION=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/seeed/lora_e5_mini/lora_e5_mini_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 73 |
```ini
source [find interface/stlink.cfg]
transport select hla_swd
source [find target/stm32wlx.cfg]
reset_config srst_only
``` | /content/code_sandbox/boards/seeed/lora_e5_mini/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 33 |
```yaml
identifier: seeeduino_xiao
name: Seeeduino XIAO
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
flash: 256
ram: 32
supported:
- dma
- dac
- gpio
- hwinfo
- i2c
- spi
- uart
- usb
- usb_device
- watchdog
vendor: seeed
``` | /content/code_sandbox/boards/seeed/seeeduino_xiao/seeeduino_xiao.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 109 |
```unknown
/*
*/
#include <dt-bindings/pinctrl/samd21-da1gXabcd-pinctrl.h>
&pinctrl {
dac_default: dac_default {
group1 {
pinmux = <PA2B_DAC_VOUT>;
};
};
sercom2_i2c_default: sercom2_i2c_default {
group1 {
pinmux = <PA8D_SERCOM2_PAD0>,
<PA9D_SERCOM2_PAD1>;
};
};
sercom0_spi_default: sercom0_spi_default {
group1 {
pinmux = <PA5D_SERCOM0_PAD1>,
<PA6D_SERCOM0_PAD2>,
<PA7D_SERCOM0_PAD3>;
};
};
sercom4_uart_default: sercom4_uart_default {
group1 {
pinmux = <PB9D_SERCOM4_PAD1>,
<PB8D_SERCOM4_PAD0>;
};
};
usb_dc_default: usb_dc_default {
group1 {
pinmux = <PA25G_USB_DP>,
<PA24G_USB_DM>;
};
};
};
``` | /content/code_sandbox/boards/seeed/seeeduino_xiao/seeeduino_xiao-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 255 |
```cmake
include(${ZEPHYR_BASE}/boards/common/bossac.board.cmake)
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
``` | /content/code_sandbox/boards/seeed/seeeduino_xiao/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 36 |
```unknown
CONFIG_SOC_ATMEL_SAMD_XOSC32K=y
CONFIG_SOC_ATMEL_SAMD_XOSC32K_AS_MAIN=y
CONFIG_BUILD_OUTPUT_UF2=y
CONFIG_BOOTLOADER_BOSSA=y
CONFIG_BOOTLOADER_BOSSA_ADAFRUIT_UF2=y
CONFIG_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_UART_CONSOLE=y
CONFIG_UART_INTERRUPT_DRIVEN=y
``` | /content/code_sandbox/boards/seeed/seeeduino_xiao/seeeduino_xiao_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 83 |
```unknown
config BOARD_SEEEDUINO_XIAO
select SOC_SAMD21G18A
``` | /content/code_sandbox/boards/seeed/seeeduino_xiao/Kconfig.seeeduino_xiao | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 22 |
```cmake
# Suppress "unique_unit_address_if_enabled" to handle the following overlaps:
# - /soc/pinmux@41004400 & /soc/gpio@41004400
# - /soc/pinmux@41004480 & /soc/gpio@41004480
list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled")
``` | /content/code_sandbox/boards/seeed/seeeduino_xiao/pre_dt_board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 74 |
```unknown
/*
*
*/
/ {
xiao_d: connector {
compatible = "seeed,xiao-gpio";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map
= <0 0 &porta 2 0> /* D0 */
, <1 0 &porta 4 0> /* D1 */
, <2 0 &porta 10 0> /* D2 */
, <3 0 &porta 11 0> /* D3 */
, <4 0 &porta 8 0> /* D4 */
, <5 0 &porta 9 0> /* D5 */
, <6 0 &portb 8 0> /* D6 */
, <7 0 &portb 9 0> /* D7 */
, <8 0 &porta 7 0> /* D8 */
, <9 0 &porta 5 0> /* D9 */
, <10 0 &porta 6 0> /* D10 */
;
};
};
xiao_spi: &sercom0 {};
xiao_i2c: &sercom2 {};
xiao_serial: &sercom4 {};
xiao_dac: &dac0 {};
xiao_adc: &adc {};
``` | /content/code_sandbox/boards/seeed/seeeduino_xiao/seeed_xiao_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 349 |
```yaml
board:
name: seeeduino_xiao
vendor: seeed
socs:
- name: samd21g18a
``` | /content/code_sandbox/boards/seeed/seeeduino_xiao/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 33 |
```restructuredtext
.. _lora_e5_mini:
Seeed Studio LoRa-E5 mini
#########################
Overview
********
LoRa-E5 mini is a compacted-sized development board suitable for the rapid
testing and building of small-sized LoRa device, exposing all capabilities of
Seeed Studio LoRa-E5 STM32WLE5JC module.
.. image:: img/lora_e5_mini.jpg
:align: center
:alt: LoRa-E5 mini
Hardware
********
The boards' LoRa-E5 Module packages a STM32WLE5JC SOC, a 32MHz TCXO,
and a 32.768kHz crystal oscillator in a 28-pin SMD package.
This STM32WLEJC SOC is powered by ARM Cortex-M4 core and integrates Semtech
SX126X LoRa IP to support (G)FSK, BPSK, (G)MSK, and LoRa modulations.
- LoRa-E5 STM32WLE5JC Module with STM32WLE5JC multiprotocol LPWAN single-core
32-bit microcontroller (Arm Cortex-M4 at 48 MHz) in 28-pin SMD package
featuring:
- Ultra-low-power MCU
- RF transceiver (150 MHz to 960 MHz frequency range) supporting LoRa,
(G)FSK, (G)MSK, and BPSK modulations
- 256-Kbyte Flash memory and 64-Kbyte SRAM
- Hardware encryption AES256-bit and a True random number generator
- 1 user LED
- 2 serial communication (RX/TX) LEDs
- 1 boot/user and 1 reset push-button
- 32.768 kHz LSE crystal oscillator
- 32 MHz HSE oscillator
- Board connectors:
- USB Type-C connector
- +/- (battery) power input pins (3-5V)
- SMA-K and IPEX antenna connectors
- Delivered with SMA antenna (per default IPEX connector is disconnected)
- Flexible power-supply options: USB Type C or 3-5V battery soldered to +/- pins
- Suitable for rapid prototyping of end nodes based on LoRaWAN, Sigfox, wM-Bus,
and many other proprietary protocols
- All GPIOs led out from the LoRa-E5 STM32WLE5JC module
- 4x M2 mounting holes
More information about the board can be found at the `LoRa-E5 mini Wiki`_.
More information about LoRa-E5 STM32WLE5JC Module can be found here:
- `LoRa-E5 STM32WLE5JC Module Wiki`_
- `LoRa-E5 STM32WLE5JC Module datasheet`_
- `STM32WLE5JC datasheet`_
- `STM32WLE5JC reference manual`_
- `STM32WLE5JC on www.st.com`_
Supported Features
==================
The Zephyr LoRa-E5 mini configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| ADC | on-chip | adc |
+-----------+------------+-------------------------------------+
| AES | on-chip | crypto |
+-----------+------------+-------------------------------------+
| COUNTER | on-chip | rtc |
+-----------+------------+-------------------------------------+
| CLOCK | on-chip | reset and clock control |
+-----------+------------+-------------------------------------+
| FLASH | on-chip | flash |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| MPU | on-chip | arch/arm |
+-----------+------------+-------------------------------------+
| NVIC | on-chip | arch/arm |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| RADIO | on-chip | LoRa |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | independent watchdog |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported on this Zephyr port.
The default configuration can be found in:
- :zephyr_file:`boards/seeed/lora_e5_mini/lora_e5_mini_defconfig`
- :zephyr_file:`boards/seeed/lora_e5_mini/lora_e5_mini.dts`
Connections and IOs
===================
LoRa-E5 mini has 4 GPIO controllers. These controllers are responsible for pin
muxing, input/output, pull-up, etc.
Available pins:
---------------
.. image:: img/lora_e5_mini_pinout.jpg
:align: center
:alt: LoRa-E5 mini Pinout
Default Zephyr Peripheral Mapping:
----------------------------------
- USART_1 TX : PB6
- USART_1 RX : PB7
- I2C_2_SCL : PB15
- I2C_2_SDA : PA15
- BOOT_PB : PB13
- LED_1 : PB5
System Clock
------------
LoRa-E5 mini board System Clock could be driven by the low-power internal (MSI),
High-speed internal (HSI) or High-speed external (HSE) oscillator, as well as
main PLL clock. By default System clock is driven by the MSI clock at 48MHz.
Programming and Debugging
*************************
Applications for the ``lora_e5_mini`` board configuration can be built the
usual way (see :ref:`build_an_application`).
In the factory the module is flashed with an DFU bootloader, an AT command
firmware, and the read protection level 1 is enabled.
So before you can program a Zephyr application to the module for the first time
you have to reset the read protection to level 0.
In case you use an st-link debugger you can use the STM32CubeProgrammer GUI to
set the RDP option byte to ``AA``,
or use the STM32_Programmer_CLI passing the ``--readunprotect`` command
to perform this read protection regression.
The RDP level 1 to RDP level 0 regression will erase the factory programmed AT
firmware, from which seeed studio has neither released the source code nor a binary.
Also, note that on the module the ``BOOT0`` pin of the SOC is not accessible,
so the system bootloader will only be executed if configured in the option bytes.
Flashing
========
The LoRa-E5 mini does not include a on-board debug probe.
But the module can be debugged by connecting an external debug probe to the
2.54mm header.
Depending on the external probe used, ``openocd``, the ``stm32cubeprogrammer``,
``pyocd``, ``blackmagic``, or ``jlink`` runner can be used to flash the board.
Additional notes:
- Pyocd: For STM32WL support Pyocd needs additional target information, which
can be installed by adding "pack" support with the following pyocd command:
.. code-block:: console
$ pyocd pack --update
$ pyocd pack --install stm32wl
Flashing an application to LoRa-E5 mini
---------------------------------------
Connect the LoRa-E5 to your host computer using the external debug probe.
Then build and flash an application. Here is an example for the
:ref:`hello_world` application.
Run a serial host program to connect with your board:
Per default the console on ``usart1`` is available on the USB Type C connector
via the built-in USB to UART converter.
.. code-block:: console
$ picocom --baud 115200 /dev/ttyACM0
Then build and flash the application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: lora_e5_mini
:goals: build flash
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:zephyr:code-sample:`blinky` application.
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: lora_e5_mini
:maybe-skip-config:
:goals: debug
.. _LoRa-E5 mini Wiki:
path_to_url
.. _LoRa-E5 STM32WLE5JC Module Wiki:
path_to_url
.. _LoRa-E5 STM32WLE5JC Module datasheet:
path_to_url
.. _STM32WLE5JC on www.st.com:
path_to_url
.. _STM32WLE5JC datasheet:
path_to_url
.. _STM32WLE5JC reference manual:
path_to_url
``` | /content/code_sandbox/boards/seeed/lora_e5_mini/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,983 |
```unknown
/*
*
*/
/dts-v1/;
#include <atmel/samd21.dtsi>
#include <atmel/samx2xx18.dtsi>
#include "seeeduino_xiao-pinctrl.dtsi"
#include "seeed_xiao_connector.dtsi"
/ {
model = "Seeeduino XIAO";
compatible = "seeed,seeeduino-xiao";
chosen {
zephyr,console = &sercom4;
zephyr,shell-uart = &sercom4;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &code_partition;
};
leds {
compatible = "gpio-leds";
led: led_0 {
gpios = <&porta 17 GPIO_ACTIVE_LOW>;
label = "LED";
};
rx_led: led_1 {
gpios = <&porta 18 GPIO_ACTIVE_LOW>;
label = "RX_LED";
};
tx_led: led_2 {
gpios = <&porta 19 GPIO_ACTIVE_LOW>;
label = "TX_LED";
};
};
/* These aliases are provided for compatibility with samples */
aliases {
led0 = &led;
led1 = &rx_led;
led2 = &tx_led;
};
};
&cpu0 {
clock-frequency = <48000000>;
};
&sercom4 {
status = "okay";
compatible = "atmel,sam0-uart";
current-speed = <115200>;
rxpo = <1>;
txpo = <0>;
pinctrl-0 = <&sercom4_uart_default>;
pinctrl-names = "default";
};
&sercom0 {
status = "okay";
compatible = "atmel,sam0-spi";
dipo = <1>;
dopo = <1>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&sercom0_spi_default>;
pinctrl-names = "default";
};
&sercom2 {
status = "okay";
compatible = "atmel,sam0-i2c";
clock-frequency = <I2C_BITRATE_FAST>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&sercom2_i2c_default>;
pinctrl-names = "default";
};
zephyr_udc0: &usb0 {
status = "okay";
pinctrl-0 = <&usb_dc_default>;
pinctrl-names = "default";
};
&dac0 {
status = "okay";
pinctrl-0 = <&dac_default>;
pinctrl-names = "default";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "uf2";
reg = <0x00000000 DT_SIZE_K(8)>;
read-only;
};
code_partition: partition@2000 {
label = "code";
reg = <0x2000 DT_SIZE_K(256-8-16)>;
read-only;
};
/*
* The final 16 KiB is reserved for the application.
* Storage partition may be used by FCB or LittleFS.
*/
storage_partition: partition@3c000 {
label = "storage";
reg = <0x0003c000 DT_SIZE_K(16)>;
};
};
};
``` | /content/code_sandbox/boards/seeed/seeeduino_xiao/seeeduino_xiao.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 790 |
```ini
source [find interface/jlink.cfg]
transport select swd
set CHIPNAME atsamd21g18a
source [find target/at91samdXX.cfg]
reset_config trst_only
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
``` | /content/code_sandbox/boards/seeed/seeeduino_xiao/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 92 |
```cmake
include(${ZEPHYR_BASE}/boards/common/bossac.board.cmake)
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
``` | /content/code_sandbox/boards/seeed/wio_terminal/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 36 |
```unknown
/*
*/
#include <dt-bindings/pinctrl/samd51p-pinctrl.h>
&pinctrl {
sercom0_spi_default: sercom0_spi_default {
group1 {
pinmux = <PB24C_SERCOM0_PAD0>,
<PB25C_SERCOM0_PAD1>,
<PC24C_SERCOM0_PAD2>;
};
};
sercom1_uart_default: sercom1_uart_default {
group1 {
pinmux = <PC22C_SERCOM1_PAD0>,
<PC23C_SERCOM1_PAD1>;
};
};
sercom2_uart_default: sercom2_uart_default {
group1 {
pinmux = <PB26C_SERCOM2_PAD0>,
<PB27C_SERCOM2_PAD1>;
};
};
sercom3_i2c_default: sercom3_i2c_default {
group1 {
pinmux = <PA17D_SERCOM3_PAD0>,
<PA16D_SERCOM3_PAD1>;
};
};
sercom4_i2c_default: sercom4_i2c_default {
group1 {
pinmux = <PA13D_SERCOM4_PAD0>,
<PA12D_SERCOM4_PAD1>;
};
};
sercom5_spi_default: sercom5_spi_default {
group1 {
pinmux = <PB2D_SERCOM5_PAD0>,
<PB3D_SERCOM5_PAD1>,
<PB0D_SERCOM5_PAD2>;
};
};
sercom6_spi_default: sercom6_spi_default {
group1 {
pinmux = <PC16C_SERCOM6_PAD0>,
<PC17C_SERCOM6_PAD1>,
<PC18C_SERCOM6_PAD2>;
};
};
sercom7_spi_default: sercom7_spi_default {
group1 {
pinmux = <PB20D_SERCOM7_PAD1>,
<PB18D_SERCOM7_PAD2>,
<PB19D_SERCOM7_PAD3>;
};
};
usb_dc_default: usb_dc_default {
group1 {
pinmux = <PA25H_USB_DP>,
<PA24H_USB_DM>;
};
};
};
``` | /content/code_sandbox/boards/seeed/wio_terminal/wio_terminal-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 499 |
```unknown
/*
*/
/ {
raspberrypi_header: raspberrypi_header {
compatible = "raspberrypi-40pins-header";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &porta 17 0>, /* I2C1_SDA */
<1 0 &porta 16 0>, /* I2C1_SCL */
<2 0 &portb 14 0>, /* GPCLK0 */
<3 0 &portb 26 0>, /* TXD */
<4 0 &portb 27 0>, /* RXD */
<5 0 &porta 2 0>, /* DAC0 */
<6 0 &portb 16 0>, /* I2S_BLCK */
<7 0 &portb 8 0>, /* A0/D0 */
<8 0 &portb 9 0>, /* A1/D1 */
<9 0 &porta 7 0>, /* A2/D2 */
<10 0 &portb 4 0>, /* A3/D3 */
<11 0 &portb 2 0>, /* SPI_MOSI */
<12 0 &portb 0 0>, /* SPI_MISO */
<13 0 &portb 5 0>, /* A4/D4 */
<14 0 &portb 3 0>, /* SPI_SCK */
<15 0 &portb 1 0>, /* SPI_CS */
<16 0 &porta 5 0>, /* DAC1 */
<17 0 &porta 13 0>, /* I2C0_SDA */
<18 0 &porta 12 0>, /* I2C0_SCL */
<19 0 &portb 12 0>, /* GPCLK1 */
<20 0 &portb 13 0>, /* GPCLK2 */
<21 0 &portb 6 0>, /* A5/D5 */
<22 0 &porta 4 0>, /* A6/D6 */
<23 0 &porta 20 0>, /* I2S_LRCLK */
<24 0 &portb 7 0>, /* A7/D7 */
<25 0 &porta 6 0>, /* A8/D8 */
<26 0 &porta 21 0>, /* I2S_SDIN */
<27 0 &porta 22 0>; /* I2S_SDOUT */
};
};
raspberrypi_serial: &sercom2 {};
raspberrypi_i2c0: &sercom4 {};
raspberrypi_i2c1: &sercom3 {};
raspberrypi_spi: &sercom5 {};
``` | /content/code_sandbox/boards/seeed/wio_terminal/raspberrypi_40pins_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 682 |
```restructuredtext
.. _seeeduino_xiao:
Seeeduino XIAO
##############
Overview
********
The Seeeduino XIAO is a tiny (20 mm x 17.5 mm) ARM development
board with onboard LEDs, USB port, and range of I/O broken out
onto 14 pins.
.. image:: img/seeeduino_xiao.jpg
:align: center
:alt: Seeeduino XIAO
Hardware
********
- ATSAMD21G18A ARM Cortex-M0+ processor at 48 MHz
- 256 KiB flash memory and 32 KiB of RAM
- Three user LEDs
- Native USB port
Supported Features
==================
The seeeduino_xiao board configuration supports the following hardware
features:
+-----------+------------+------------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+==========================================+
| DMA | on-chip | Direct memory access |
+-----------+------------+------------------------------------------+
| DAC | on-chip | Digital to analogue converter |
+-----------+------------+------------------------------------------+
| Flash | on-chip | Can be used with LittleFS to store files |
+-----------+------------+------------------------------------------+
| GPIO | on-chip | I/O ports |
+-----------+------------+------------------------------------------+
| HWINFO | on-chip | Hardware info |
+-----------+------------+------------------------------------------+
| I2C | on-chip | Inter-Integrated Circuit |
+-----------+------------+------------------------------------------+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+------------------------------------------+
| SPI | on-chip | Serial Peripheral Interface ports |
+-----------+------------+------------------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+------------------------------------------+
| USART | on-chip | Serial ports |
+-----------+------------+------------------------------------------+
| USB | on-chip | USB device |
+-----------+------------+------------------------------------------+
| WDT | on-chip | Watchdog |
+-----------+------------+------------------------------------------+
Other hardware features are not currently supported by Zephyr.
The default configuration can be found in the Kconfig file
:zephyr_file:`boards/seeed/seeeduino_xiao/seeeduino_xiao_defconfig`.
Connections and IOs
===================
The `Seeeduino XIAO wiki`_ has detailed information about
the board including `pinouts`_ and the `schematic`_.
System Clock
============
The SAMD21 MCU is configured to use the 32 kHz external crystal
with the on-chip PLL generating the 48 MHz system clock. The internal
APB and GCLK unit are set up in the same way as the upstream Arduino
libraries.
SPI Port
========
The SAMD21 MCU has 6 SERCOM based SPIs. On the XIAO, SERCOM0 can be put
into SPI mode and used to connect to devices over pin 9 (MISO), pin 10
(MOSI), and pin 8 (SCK).
I2C Port
========
The SAMD21 MCU has 6 SERCOM based USARTs. On the XIAO, SERCOM2 is available on
pin 4 (SDA) and pin 5 (SCL).
Serial Port
===========
The SAMD21 MCU has 6 SERCOM based USARTs. On the XIAO, SERCOM4 is
the Zephyr console and is available on pins 7 (RX) and 6 (TX).
USB Device Port
===============
The SAMD21 MCU has a USB device port that can be used to communicate
with a host PC. See the :ref:`usb-samples` sample applications for
more, such as the :zephyr:code-sample:`usb-cdc-acm` sample which sets up a virtual
serial port that echos characters back to the host PC.
DAC
===
The SAMD21 MCU has a single channel DAC with 10 bits of resolution. On
the XIAO, the DAC is available on pin 0.
Programming and Debugging
*************************
The XIAO ships the BOSSA compatible UF2 bootloader. The bootloader can be
entered by shorting the RST and GND pads twice.
Additionally, if :code:`CONFIG_USB_CDC_ACM` is enabled then the bootloader
will be entered automatically when you run :code:`west flash`.
Flashing
========
#. Build the Zephyr kernel and the :ref:`hello_world` sample application:
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: seeeduino_xiao
:goals: build
:compact:
#. Connect the XIAO to your host computer using USB
#. Connect a 3.3 V USB to serial adapter to the board and to the
host. See the `Serial Port`_ section above for the board's pin
connections.
#. Run your favorite terminal program to listen for output. Under Linux the
terminal should be :code:`/dev/ttyUSB0`. For example:
.. code-block:: console
$ minicom -D /dev/ttyUSB0 -o
The -o option tells minicom not to send the modem initialization
string. Connection should be configured as follows:
- Speed: 115200
- Data: 8 bits
- Parity: None
- Stop bits: 1
#. Short the RST and GND pads twice quickly to enter bootloader mode
#. Flash the image:
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: seeeduino_xiao
:goals: flash
:compact:
You should see "Hello World! seeeduino_xiao" in your terminal.
References
**********
.. target-notes::
.. _Seeeduino XIAO wiki:
path_to_url
.. _pinouts:
path_to_url#hardware-overview
.. _schematic:
path_to_url#resourses
``` | /content/code_sandbox/boards/seeed/seeeduino_xiao/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,323 |
```cmake
# SPI is implemented via sercom so node name isn't spi@...
list(APPEND EXTRA_DTC_FLAGS "-Wno-spi_bus_bridge")
# Suppress "unique_unit_address_if_enabled" to handle the following overlaps:
# - /soc/pinmux@41008000 & /soc/gpio@41008000
list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled")
``` | /content/code_sandbox/boards/seeed/wio_terminal/pre_dt_board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 84 |
```yaml
identifier: wio_terminal
name: Wio Terminal
type: mcu
arch: arm
ram: 192
flash: 512
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- adc
- counter
- dma
- gpio
- i2c
- pwm
- spi
- usb_device
- watchdog
vendor: seeed
``` | /content/code_sandbox/boards/seeed/wio_terminal/wio_terminal.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 99 |
```unknown
config BOARD_WIO_TERMINAL
select SOC_SAMD51P19A
``` | /content/code_sandbox/boards/seeed/wio_terminal/Kconfig.wio_terminal | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 18 |
```yaml
board:
name: wio_terminal
vendor: seeed
socs:
- name: samd51p19a
``` | /content/code_sandbox/boards/seeed/wio_terminal/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 31 |
```unknown
# Wio Terminal board configuration
config LV_COLOR_16_SWAP
default y if LVGL
``` | /content/code_sandbox/boards/seeed/wio_terminal/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 22 |
```unknown
CONFIG_SOC_ATMEL_SAMD5X_XOSC32K=y
CONFIG_SOC_ATMEL_SAMD5X_XOSC32K_AS_MAIN=y
CONFIG_ARM_MPU=y
CONFIG_CORTEX_M_SYSTICK=y
CONFIG_HW_STACK_PROTECTION=y
CONFIG_REGULATOR=y
# BOSSA bootloader
CONFIG_BOOTLOADER_BOSSA=y
CONFIG_BOOTLOADER_BOSSA_ADAFRUIT_UF2=y
CONFIG_BUILD_OUTPUT_UF2=y
# Console over USB CDC-ACM
CONFIG_SERIAL=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_UART_INTERRUPT_DRIVEN=y
CONFIG_USB_DEVICE_STACK=y
CONFIG_USB_DEVICE_INITIALIZE_AT_BOOT=y
CONFIG_USB_DEVICE_VID=0x2886
CONFIG_USB_DEVICE_PID=0x802D
CONFIG_USB_DEVICE_MANUFACTURER="Seeed Studio"
CONFIG_USB_DEVICE_PRODUCT="Wio Terminal"
CONFIG_USB_CDC_ACM_LOG_LEVEL_OFF=y
``` | /content/code_sandbox/boards/seeed/wio_terminal/wio_terminal_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 197 |
```unknown
/*
*/
/ {
grove_header0: grove_header0 {
compatible = "grove-header";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &portb 8 0>, /* A0/D0 */
<1 0 &portb 9 0>; /* A1/D1 */
};
grove_header1: grove_header1 {
compatible = "grove-header";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &porta 16 0>, /* I2C1_SCL */
<1 0 &porta 17 0>; /* I2C1_SDA */
};
};
grove_i2c1: &sercom3 {};
``` | /content/code_sandbox/boards/seeed/wio_terminal/grove_connectors.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 227 |
```ini
source [find interface/jlink.cfg]
transport select swd
set CHIPNAME atsamd51p19
source [find target/atsame5x.cfg]
adapter speed 500
reset_config srst_only
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
``` | /content/code_sandbox/boards/seeed/wio_terminal/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 94 |
```unknown
/*
*/
/dts-v1/;
#include <atmel/samd5xx19.dtsi>
#include "wio_terminal-pinctrl.dtsi"
#include "grove_connectors.dtsi"
#include "raspberrypi_40pins_connector.dtsi"
#include <zephyr/dt-bindings/display/ili9xxx.h>
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "Wio Terminal";
compatible = "seeed,wio-terminal";
chosen {
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,console = &wio_terminal_console;
zephyr,shell-uart = &wio_terminal_console;
zephyr,code-partition = &code_partition;
zephyr,display = &ili9341;
};
/* These aliases are provided for compatibility with samples */
aliases {
led0 = &led0;
sw0 = &user_button_0;
sw1 = &user_button_1;
sw2 = &user_button_2;
i2c0 = &sercom4;
i2c1 = &sercom3;
spi0 = &sercom5;
uart0 = &sercom2;
accel0 = &lis3dh;
sdhc0 = &sdhc0;
};
/* LEDs */
leds {
compatible = "gpio-leds";
led0: led_0 {
label = "LED";
gpios = <&porta 15 GPIO_ACTIVE_HIGH>;
};
};
/* Buttons */
buttons: buttons {
compatible = "gpio-keys";
user_button_0: button_0 {
label = "User Button 0";
gpios = <&portc 26 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_0>;
};
user_button_1: button_1 {
label = "User Button 1";
gpios = <&portc 27 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_1>;
};
user_button_2: button_2 {
label = "User Button 2";
gpios = <&portc 28 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_2>;
};
};
/* Joystick */
joystick: joystick {
compatible = "gpio-keys";
polling-mode;
debounce-interval-ms = <100>;
joy_sel: joystick_selection {
label = "joystick selection";
gpios = <&portd 10 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_ENTER>;
};
joy_down: joystick_down {
label = "joystick down";
gpios = <&portd 8 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_DOWN>;
};
joy_up: joystick_up {
label = "joystick up";
gpios = <&portd 20 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_UP>;
};
joy_left: joystick_left {
label = "joystick left";
gpios = <&portd 12 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_LEFT>;
};
joy_right: joystick_right {
label = "joystick right";
gpios = <&portd 9 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_RIGHT>;
};
};
/* Regulators */
lcd_backlight_en {
compatible = "regulator-fixed";
regulator-name = "lcd_backlight_enable";
enable-gpios = <&portc 5 GPIO_ACTIVE_HIGH>;
regulator-boot-on;
};
rpi_power_3v3_en {
compatible = "regulator-fixed";
regulator-name = "rpi_power_3v3_enable";
enable-gpios = <&portc 15 GPIO_ACTIVE_LOW>;
regulator-boot-on;
};
rpi_power_5v_en {
compatible = "regulator-fixed";
regulator-name = "rpi_power_5v_enable";
enable-gpios = <&portc 14 GPIO_ACTIVE_HIGH>;
regulator-boot-on;
};
usb_power_5v_en {
compatible = "regulator-fixed";
regulator-name = "usb_power_5v_en";
enable-gpios = <&porta 27 GPIO_ACTIVE_LOW>;
};
/* LCD */
mipi_dbi {
compatible = "zephyr,mipi-dbi-spi";
dc-gpios = <&portc 6 GPIO_ACTIVE_HIGH>;
reset-gpios = <&portc 7 GPIO_ACTIVE_LOW>;
#address-cells = <1>;
#size-cells = <0>;
spi-dev = <&sercom7>;
write-only;
ili9341: ili9341@0 {
compatible = "ilitek,ili9341";
mipi-max-frequency = <24000000>;
reg = <0>;
pixel-format = <ILI9XXX_PIXEL_FORMAT_RGB565>;
rotation = <270>;
width = <320>;
height = <240>;
};
};
};
&cpu0 {
clock-frequency = <120000000>;
};
&dmac {
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "uf2";
reg = <0x00000000 DT_SIZE_K(16)>;
read-only;
};
code_partition: partition@4000 {
label = "code";
reg = <0x4000 DT_SIZE_K(512-16)>;
read-only;
};
};
};
/* RTL8720D (Wifi/BLE) */
&sercom0 {
status = "okay";
compatible = "atmel,sam0-spi";
#address-cells = <1>;
#size-cells = <0>;
dipo = <2>;
dopo = <0>;
pinctrl-0 = <&sercom0_spi_default>;
pinctrl-names = "default";
cs-gpios = <&portc 25 GPIO_ACTIVE_LOW>;
};
/* RTL8720D (Wifi/BLE) */
&sercom1 {
status = "okay";
compatible = "atmel,sam0-uart";
current-speed = <115200>;
rxpo = <1>;
txpo = <0>;
pinctrl-0 = <&sercom1_uart_default>;
pinctrl-names = "default";
};
/* UART, Raspberry Pi connector */
&sercom2 {
status = "okay";
compatible = "atmel,sam0-uart";
current-speed = <115200>;
rxpo = <1>;
txpo = <0>;
pinctrl-0 = <&sercom2_uart_default>;
pinctrl-names = "default";
};
/* I2C1, Raspberry Pi and Groove connectors */
&sercom3 {
status = "okay";
compatible = "atmel,sam0-i2c";
clock-frequency = <I2C_BITRATE_FAST>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&sercom3_i2c_default>;
pinctrl-names = "default";
};
/* I2C0, LIS3DH, ATECC608, Raspberry Pi connector */
&sercom4 {
status = "okay";
compatible = "atmel,sam0-i2c";
clock-frequency = <I2C_BITRATE_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&sercom4_i2c_default>;
pinctrl-names = "default";
/* LIS3DH */
lis3dh: lis3dh@18 {
compatible = "st,lis3dh", "st,lis2dh";
status = "okay";
reg = <0x18>;
irq-gpios = <&portc 21 GPIO_ACTIVE_HIGH>;
};
/* ATECC608A */
atecc608a@6a {
compatible = "atmel,atecc608";
reg = <0x6a>;
};
};
/* SPI, Raspberry Pi connector */
&sercom5 {
status = "okay";
compatible = "atmel,sam0-spi";
#address-cells = <1>;
#size-cells = <0>;
dipo = <2>;
dopo = <0>;
pinctrl-0 = <&sercom5_spi_default>;
pinctrl-names = "default";
cs-gpios = <&portb 1 GPIO_ACTIVE_LOW>;
};
/* microSD Card */
&sercom6 {
status = "okay";
compatible = "atmel,sam0-spi";
#address-cells = <1>;
#size-cells = <0>;
dipo = <2>;
dopo = <0>;
pinctrl-0 = <&sercom6_spi_default>;
pinctrl-names = "default";
cs-gpios = <&portc 19 GPIO_ACTIVE_LOW>;
/* microSD Card */
sdhc0: sdhc@0 {
compatible = "zephyr,sdhc-spi-slot";
reg = <0>;
spi-max-frequency = <24000000>;
mmc {
compatible = "zephyr,sdmmc-disk";
};
};
};
/* LCD */
&sercom7 {
status = "okay";
compatible = "atmel,sam0-spi";
#address-cells = <1>;
#size-cells = <0>;
dipo = <2>;
dopo = <3>;
pinctrl-0 = <&sercom7_spi_default>;
pinctrl-names = "default";
cs-gpios = <&portb 21 GPIO_ACTIVE_LOW>;
};
/* USB */
zephyr_udc0: &usb0 {
status = "okay";
pinctrl-0 = <&usb_dc_default>;
pinctrl-names = "default";
wio_terminal_console: wio_terminal_console {
compatible = "zephyr,cdc-acm-uart";
};
};
``` | /content/code_sandbox/boards/seeed/wio_terminal/wio_terminal.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,271 |
```cmake
board_runner_args(uf2 "--board-id=RPI-RP2")
include(${ZEPHYR_BASE}/boards/common/uf2.board.cmake)
``` | /content/code_sandbox/boards/seeed/xiao_rp2040/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 34 |
```unknown
# XIAO RP2040 board configuration
config BOARD_XIAO_RP2040
select SOC_RP2040
``` | /content/code_sandbox/boards/seeed/xiao_rp2040/Kconfig.xiao_rp2040 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 28 |
```unknown
/*
*
*/
/ {
xiao_d: connector {
compatible = "seeed,xiao-gpio";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map
= <0 0 &gpio0 26 0> /* D0 */
, <1 0 &gpio0 27 0> /* D1 */
, <2 0 &gpio0 28 0> /* D2 */
, <3 0 &gpio0 29 0> /* D3 */
, <4 0 &gpio0 6 0> /* D4 */
, <5 0 &gpio0 7 0> /* D5 */
, <6 0 &gpio0 0 0> /* D6 */
, <7 0 &gpio0 1 0> /* D7 */
, <8 0 &gpio0 2 0> /* D8 */
, <9 0 &gpio0 4 0> /* D9 */
, <10 0 &gpio0 3 0> /* D10 */
;
};
};
xiao_i2c: &i2c1 {
};
xiao_spi: &spi0 {
};
xiao_serial: &uart0 {
};
``` | /content/code_sandbox/boards/seeed/xiao_rp2040/seeed_xiao_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 335 |
```yaml
board:
name: xiao_rp2040
vendor: seeed
socs:
- name: rp2040
``` | /content/code_sandbox/boards/seeed/xiao_rp2040/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 30 |
```unknown
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=125000000
CONFIG_RESET=y
# Enable UART driver
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
# Enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# Enable clock control by default
CONFIG_CLOCK_CONTROL=y
# Code partition needed to target the correct flash range
CONFIG_USE_DT_CODE_PARTITION=y
# Output UF2 by default, native bootloader supports it.
CONFIG_BUILD_OUTPUT_UF2=y
``` | /content/code_sandbox/boards/seeed/xiao_rp2040/xiao_rp2040_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 99 |
```unknown
/*
*/
#include <dt-bindings/pinctrl/rpi-pico-rp2040-pinctrl.h>
&pinctrl {
uart0_default: uart0_default {
group1 {
pinmux = <UART0_TX_P0>;
};
group2 {
pinmux = <UART0_RX_P1>;
input-enable;
};
};
i2c1_default: i2c1_default {
group1 {
pinmux = <I2C1_SDA_P6>;
input-enable;
};
group2 {
pinmux = <I2C1_SCL_P7>;
input-enable;
};
};
pwm_ch4b_default: pwm_ch4b_default {
group1 {
pinmux = <PWM_4B_P25>;
};
};
spi0_default: spi0_default {
group1 {
pinmux = <SPI0_TX_P3>;
};
group2 {
pinmux = <SPI0_RX_P4>;
input-enable;
};
group3 {
pinmux = <SPI0_SCK_P2>;
};
};
adc_default: adc_default {
group1 {
pinmux = <ADC_CH0_P26>,
<ADC_CH1_P27>,
<ADC_CH2_P28>,
<ADC_CH3_P29>;
input-enable;
};
};
clocks_default: clocks_default {
};
ws2812_pio0_default: ws2812_pio0_default {
ws2812 {
pinmux = <PIO0_P12>;
};
};
};
``` | /content/code_sandbox/boards/seeed/xiao_rp2040/xiao_rp2040-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 359 |
```unknown
if BOARD_XIAO_RP2040
config RP2_FLASH_W25Q080
default y
if I2C_DW
config I2C_DW_CLOCK_SPEED
default 125
endif # I2C_DW
config USB_SELF_POWERED
default n
endif # BOARD_XIAO_RP2040
``` | /content/code_sandbox/boards/seeed/xiao_rp2040/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 72 |
```restructuredtext
.. _wio_terminal:
Wio Terminal
############
Overview
********
The Wio Terminal is a small (72 mm x 57 mm x 12 mm) and powerful ARM board with
wireless connectivity (2.4G/5G dual-band Wi-Fi and BLE 5.0), LCD display,
USB C port, FPC connector, microSD card slot, Raspberry Pi compatible 40-pins
header and 2 Grove connectors.
.. image:: img/wio_terminal.png
:width: 500px
:align: center
:alt: Seeed Studio Wio Terminal
Hardware
********
- ATSAMD51P19 ARM Cortex-M4F processor at 120 MHz
- 512 KiB flash memory and 192 KiB of RAM
- 4 MiB external flash
- MicroSD card slot
- RTL8720DN 2.4G/5G Dual Bands Wireless and BLE5.0 Combo Module
- 2.4inch LCD display
- LIS3DH accelerometer
- Microphone 1.0V-10V -42dB
- Speaker 78dB @10cm 4000Hz
- Light Sensor 400-1050nm
- Infrared Emitter 940nm
- GPIO 40 pin (Raspberry Pi compatible)
- 2x Grove connectors
- 1x user LED
- 3x user buttons
- 5-way user button
- Power/Reset/Boot mode switch
- Native USB port
Supported Features
==================
The wio_terminal board configuration supports the following hardware features:
.. list-table::
:header-rows: 1
* - Interface
- Controller
- Driver / Component
* - NVIC
- on-chip
- Nested vector interrupt controller
* - Flash
- on-chip
- Can be used with LittleFS to store files
* - SYSTICK
- on-chip
- Systick
* - WDT
- on-chip
- Watchdog
* - GPIO
- on-chip
- I/O ports
* - USART
- on-chip
- Serial port
* - I2C
- on-chip
- Inter-Integrated Circuit
* - SPI
- on-chip
- Serial Peripheral Interface port
* - TRNG
- on-chip
- True Random Number Generator
* - HWINFO
- on-chip
- Unique 128 bit serial number
* - RTC
- on-chip
- Real-Time Counter
* - USB
- on-chip
- USB device
* - PWM
- on-chip
- PWM
Other hardware features are not currently supported by Zephyr.
The default configuration can be found in the Kconfig file
:zephyr_file:`boards/seeed/wio_terminal/wio_terminal_defconfig`.
Zephyr can use the default Cortex-M SYSTICK timer or the SAM0 specific RTC.
To use the RTC, set :kconfig:option:`CONFIG_CORTEX_M_SYSTICK=n` and set
:kconfig:option:`CONFIG_SYS_CLOCK_TICKS_PER_SEC` to no more than 32 kHZ divided
by 7, i.e. no more than 4500.
Connections and IOs
===================
The `Wio Terminal Getting started guide`_ has detailed information about the
board including `pinouts`_ and its `schematics`_.
System Clock
============
The SAMD51 MCU is configured to use the 32.768 kHz internal oscillator with the
on-chip PLL generating the 120 MHz system clock.
Serial Port
===========
Zephyr console output is available using the USB connector, which is used to
make the console available on PC as USB CDC class.
USB Device Port
===============
The SAMD51 MCU has a USB device port that can be used to communicate with a
host PC. See the :ref:`usb-samples` sample applications for more, such as the
:zephyr:code-sample:`usb-cdc-acm` sample which sets up a virtual serial port that echos
characters back to the host PC.
Programming and Debugging
*************************
The Wio Terminal ships with an UF2 bootloader that is BOSSA compatible. The
bootloader can be entered by quickly tapping the reset button twice.
The UF2 file is generated when building the application, and it is possible to
use it to flash the target. Enter the bootloader by quickly sliding the power
button twice, and copy the UF2 file to the USB mass storage device. The device
reboots on the new firmware after the UF2 file has finished transferring.
Flashing
========
#. Build the Zephyr kernel and the :code:`button` sample application:
.. zephyr-app-commands::
:zephyr-app: samples/basic/button
:board: wio_terminal
:goals: build
:compact:
#. Swipe the reset/power button down twice quickly to enter bootloader mode
#. Flash the image:
.. zephyr-app-commands::
:zephyr-app: samples/basic/button
:board: wio_terminal
:goals: flash
:compact:
You should see the blue (user) LED flashing whenever you press the third
(counting from the top left) user button at the top of the Wio Terminal.
Debugging
=========
In addition to the built-in bootloader, the Wio Terminal can be flashed and
debugged using an SWD probe such as the Segger J-Link.
#. Solder cables to the :code:`SWCLK`, :code:`SWDIO`, :code:`RESET`,
:code:`GND`, and :code:`3V3` pins. See `Test with SWD`_ for more
information.
#. Connect the board to the probe by connecting the :code:`SWCLK`,
:code:`SWDIO`, :code:`RESET`, :code:`GND`, and :code:`3V3` pins on the
Wio Terminal to the :code:`SWCLK`, :code:`SWDIO`, :code:`RESET`,
:code:`GND`, and :code:`VTref` pins on the `J-Link`_.
#. Flash the image:
.. zephyr-app-commands::
:zephyr-app: samples/basic/button
:board: wio_terminal
:goals: flash
:flash-args: -r openocd
:compact:
#. Start debugging:
.. zephyr-app-commands::
:zephyr-app: samples/basic/button
:board: wio_terminal
:goals: debug
:compact:
References
**********
.. target-notes::
.. _Wio Terminal Getting started guide:
path_to_url
.. _pinouts:
path_to_url#pinout-diagram
.. _schematics:
path_to_url#resources
.. _Test with SWD:
path_to_url#test-with-swd
.. _J-Link:
path_to_url
``` | /content/code_sandbox/boards/seeed/wio_terminal/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,538 |
```yaml
identifier: xiao_rp2040
name: XIAO RP2040
type: mcu
arch: arm
flash: 2048
ram: 256
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- uart
- gpio
- adc
- i2c
- spi
- hwinfo
- watchdog
- pwm
- flash
- dma
- counter
- clock
vendor: seeed
``` | /content/code_sandbox/boards/seeed/xiao_rp2040/xiao_rp2040.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 117 |
```unknown
/*
*
*/
/dts-v1/;
#include <rpi_pico/rp2040.dtsi>
#include "xiao_rp2040-pinctrl.dtsi"
#include "seeed_xiao_connector.dtsi"
#include <freq.h>
#include <zephyr/dt-bindings/led/led.h>
#include <zephyr/dt-bindings/pwm/pwm.h>
/ {
chosen {
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,flash-controller = &ssi;
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,code-partition = &code_partition;
};
aliases {
watchdog0 = &wdt0;
led-strip = &ws2812;
pwm-led0 = &pwm_led0;
led0 = &blue_led;
led1 = &green_led;
led2 = &red_led;
};
pwm_leds {
compatible = "pwm-leds";
status = "disabled";
pwm_led0: pwm_led_0 {
pwms = <&pwm 9 PWM_MSEC(20) PWM_POLARITY_INVERTED>;
label = "PWM_LED";
};
};
leds {
compatible = "gpio-leds";
blue_led: blue_led {
gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
label = "BLUE_LED";
};
green_led: green_led {
gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
label = "GREEN_LED";
};
red_led: red_led {
gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
label = "RED_LED";
};
};
};
&pwm {
pinctrl-0 = <&pwm_ch4b_default>;
pinctrl-names = "default";
divider-int-0 = <255>;
};
&flash0 {
/*
* 2MB of flash minus the 0x100 used for the second stage bootloader
*/
reg = <0x10000000 DT_SIZE_M(2)>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
code_partition: partition@100 {
label = "code";
reg = <0x100 (DT_SIZE_M(2) - 0x100)>;
read-only;
};
};
};
&clocks {
pinctrl-0 = <&clocks_default>;
pinctrl-names = "default";
};
&timer {
status = "okay";
};
&uart0 {
current-speed = <115200>;
status = "okay";
pinctrl-0 = <&uart0_default>;
pinctrl-names = "default";
};
&i2c1 {
status = "okay";
pinctrl-0 = <&i2c1_default>;
pinctrl-names = "default";
clock-frequency = <I2C_BITRATE_FAST>;
};
&spi0 {
status = "okay";
pinctrl-0 = <&spi0_default>;
pinctrl-names = "default";
clock-frequency = <DT_FREQ_M(8)>;
};
&gpio0 {
status = "okay";
/*
* The neopixel on this board has its positive side hooked up to a GPIO pin
* rather than a positive voltage rail to save on power. This will enable
* the LED on board initialization.
*/
neopixel-power-enable {
gpio-hog;
gpios = <11 GPIO_ACTIVE_HIGH>;
output-high;
};
};
&wdt0 {
status = "okay";
};
&adc {
status = "okay";
pinctrl-0 = <&adc_default>;
pinctrl-names = "default";
};
&pio0 {
status = "okay";
pio-ws2812 {
compatible = "worldsemi,ws2812-rpi_pico-pio";
status = "okay";
pinctrl-0 = <&ws2812_pio0_default>;
pinctrl-names = "default";
bit-waveform = <3>, <3>, <4>;
ws2812: ws2812 {
status = "okay";
gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
chain-length = <1>;
color-mapping = <LED_COLOR_ID_GREEN
LED_COLOR_ID_RED
LED_COLOR_ID_BLUE>;
reset-delay = <280>;
frequency = <800000>;
};
};
};
zephyr_udc0: &usbd {
status = "okay";
};
&vreg {
regulator-always-on;
regulator-allowed-modes = <REGULATOR_RPI_PICO_MODE_NORMAL>;
};
``` | /content/code_sandbox/boards/seeed/xiao_rp2040/xiao_rp2040.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,055 |
```restructuredtext
.. _boards-bbc:
BBC
###
.. toctree::
:maxdepth: 1
:glob:
**/*
``` | /content/code_sandbox/boards/bbc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 30 |
```unknown
# nRF51 BBC_MICROBIT board configuration
config BOARD_BBC_MICROBIT
select SOC_NRF51822_QFAA
``` | /content/code_sandbox/boards/bbc/microbit/Kconfig.bbc_microbit | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 30 |
```restructuredtext
.. _xiao_rp2040:
XIAO RP2040
###########
Overview
********
The XIAO RP2040 is an IoT mini development board from Seeed Studio.
It is equipped with an RP2040 SoC, an on-board WS2812 addressable
LED, and USB connector. The USB bootloader allows it
to be flashed without any adapter, in a drag-and-drop manner.
For more details see the `Seeed Studio XIAO RP2040`_ wiki page.
.. figure:: img/xiao_rp2040.webp
:align: center
:alt: XIAO RP2040
XIAO RP2040
Hardware
********
The Seeed Studio XIAO RP2040 is a low-power microcontroller that
carries the powerful Dual-core RP2040 processor with a flexible
clock running up to 133 MHz. There is also 264KB of SRAM, and 2MB of
on-board Flash memory.
There are 14 GPIO PINs on Seeed Studio XIAO RP2040, on which there
are 11 digital pins, 4 analog pins, 11 PWM Pins,1 I2C interface,
1 UART interface, 1 SPI interface, 1 SWD Bonding pad interface.
Supported Features
==================
The ``xiao_rp2040`` board target supports the following hardware
features:
.. list-table::
:header-rows: 1
* - Peripheral
- Kconfig option
- Devicetree compatible
* - NVIC
- N/A
- :dtcompatible:`arm,v6m-nvic`
* - UART
- :kconfig:option:`CONFIG_SERIAL`
- :dtcompatible:`raspberrypi,pico-uart`
* - GPIO
- :kconfig:option:`CONFIG_GPIO`
- :dtcompatible:`raspberrypi,pico-gpio`
* - ADC
- :kconfig:option:`CONFIG_ADC`
- :dtcompatible:`raspberrypi,pico-adc`
* - I2C
- :kconfig:option:`CONFIG_I2C`
- :dtcompatible:`snps,designware-i2c`
* - SPI
- :kconfig:option:`CONFIG_SPI`
- :dtcompatible:`raspberrypi,pico-spi`
* - USB Device
- :kconfig:option:`CONFIG_USB_DEVICE_STACK`
- :dtcompatible:`raspberrypi,pico-usbd`
* - HWINFO
- :kconfig:option:`CONFIG_HWINFO`
- N/A
* - Watchdog Timer (WDT)
- :kconfig:option:`CONFIG_WATCHDOG`
- :dtcompatible:`raspberrypi,pico-watchdog`
* - PWM
- :kconfig:option:`CONFIG_PWM`
- :dtcompatible:`raspberrypi,pico-pwm`
* - Flash
- :kconfig:option:`CONFIG_FLASH`
- :dtcompatible:`raspberrypi,pico-flash-controller`
* - Clock controller
- :kconfig:option:`CONFIG_CLOCK_CONTROL`
- :dtcompatible:`raspberrypi,pico-clock-controller`
* - UART (PIO)
- :kconfig:option:`CONFIG_SERIAL`
- :dtcompatible:`raspberrypi,pico-uart-pio`
Pin Mapping
===========
The peripherals of the RP2040 SoC can be routed to various pins on the board.
The configuration of these routes can be modified through DTS. Please refer to
the datasheet to see the possible routings for each peripheral.
Default Zephyr Peripheral Mapping:
----------------------------------
.. rst-class:: rst-columns
- UART0_TX : P0
- UART0_RX : P1
- I2C1_SDA : P6
- I2C1_SCL : P7
- SPI0_RX : P4
- SPI0_SCK : P2
- SPI0_TX : P3
Connections and IOs
===================
The board uses a standard XIAO pinout, the default pin mapping is the following:
.. figure:: img/xiao_rp2040_pinout.webp
:align: center
:alt: XIAO RP2040 Pinout
XIAO RP2040 Pinout
Programming and Debugging
*************************
Flashing
========
Using UF2
---------
You can flash the Xiao RP2040 with a UF2 file.
By default, building an app for this board will generate a
:file:`build/zephyr/zephyr.uf2` file. If the Xiao RP2040 is powered on with
the ``BOOTSEL`` button pressed, it will appear on the host as a mass storage
device. The UF2 file should be copied to the device, which will
flash the Xiao RP2040.
References
**********
.. target-notes::
.. _`Seeed Studio XIAO RP2040`: path_to_url
``` | /content/code_sandbox/boards/seeed/xiao_rp2040/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,069 |
```unknown
/*
*/
&pinctrl {
uart0_default: uart0_default {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 24)>,
<NRF_PSEL(UART_RX, 0, 25)>;
};
};
uart0_sleep: uart0_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 24)>,
<NRF_PSEL(UART_RX, 0, 25)>;
low-power-enable;
};
};
i2c0_default: i2c0_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 30)>,
<NRF_PSEL(TWIM_SCL, 0, 0)>;
};
};
i2c0_sleep: i2c0_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 30)>,
<NRF_PSEL(TWIM_SCL, 0, 0)>;
low-power-enable;
};
};
};
``` | /content/code_sandbox/boards/bbc/microbit/bbc_microbit-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 252 |
```cmake
board_runner_args(pyocd "--target=nrf51822")
board_runner_args(jlink "--device=nRF51822_xxAA" "--speed=4000")
set(OPENOCD_NRF5_SUBFAMILY "nrf51")
# Note: micro:bit DAPLink may be upgraded to J-Link OB by following the instructions at
# path_to_url
# in which case the following line should be removed to default back to "jlink" OpenOCD interface
set(OPENOCD_NRF5_INTERFACE "cmsis-dap")
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
include(${ZEPHYR_BASE}/boards/common/openocd-nrf5.board.cmake)
``` | /content/code_sandbox/boards/bbc/microbit/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 188 |
```cmake
# Suppress "unique_unit_address_if_enabled" to handle the following overlaps:
# - power@40000000 & clock@40000000 & nrf-mpu@40000000
list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled")
``` | /content/code_sandbox/boards/bbc/microbit/pre_dt_board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 58 |
```yaml
board:
name: bbc_microbit
vendor: bbc
socs:
- name: nrf51822
``` | /content/code_sandbox/boards/bbc/microbit/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 28 |
```unknown
/*
*
*/
/dts-v1/;
#include <nordic/nrf51822_qfaa.dtsi>
#include "bbc_microbit-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "BBC Micro:bit";
compatible = "bbc,microbit";
/* These aliases are provided for compatibility with samples */
aliases {
sw0 = &buttonA;
sw1 = &buttonB;
magn0 = &lsm303agr_magn;
accel0 = &mma8653fc;
watchdog0 = &wdt0;
};
chosen {
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,bt-mon-uart = &uart0;
zephyr,bt-c2h-uart = &uart0;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,display = &led_matrix;
};
gpio_keys {
compatible = "gpio-keys";
buttonA: button_0 {
label = "BTN_A";
gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_A>;
};
buttonB: button_1 {
label = "BTN_B";
gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_B>;
};
};
led_matrix: led_matrix {
compatible = "nordic,nrf-led-matrix";
status = "okay";
width = <5>;
height = <5>;
pixel-mapping = [00 13 01 14 02
23 24 25 26 27
11 08 12 28 10
07 06 05 04 03
22 16 20 15 21];
row-gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>,
<&gpio0 14 GPIO_ACTIVE_HIGH>,
<&gpio0 15 GPIO_ACTIVE_HIGH>;
col-gpios = <&gpio0 4 GPIO_ACTIVE_LOW>,
<&gpio0 5 GPIO_ACTIVE_LOW>,
<&gpio0 6 GPIO_ACTIVE_LOW>,
<&gpio0 7 GPIO_ACTIVE_LOW>,
<&gpio0 8 GPIO_ACTIVE_LOW>,
<&gpio0 9 GPIO_ACTIVE_LOW>,
<&gpio0 10 GPIO_ACTIVE_LOW>,
<&gpio0 11 GPIO_ACTIVE_LOW>,
<&gpio0 12 GPIO_ACTIVE_LOW>;
refresh-frequency = <50>;
timer = <&timer2>;
pixel-group-size = <3>;
};
edge_connector: connector {
compatible = "microbit,edge-connector";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpio0 3 0>, /* P0, Analog in */
<1 0 &gpio0 2 0>, /* P1, Analog in */
<2 0 &gpio0 1 0>, /* P2, Analog in */
<3 0 &gpio0 4 0>, /* P3, Analog in, LED Col 1 */
<4 0 &gpio0 5 0>, /* P4, Analog in, LED Col 2 */
<5 0 &gpio0 17 0>, /* P5, Button A */
<6 0 &gpio0 12 0>, /* P6, LED Col 9 */
<7 0 &gpio0 11 0>, /* P7, LED Col 8 */
<8 0 &gpio0 18 0>, /* P8 */
<9 0 &gpio0 10 0>, /* P9, LED Col 7 */
<10 0 &gpio0 6 0>, /* P10, Analog in, LED Col 3 */
<11 0 &gpio0 26 0>, /* P11, Button B */
<12 0 &gpio0 20 0>, /* P12 */
<13 0 &gpio0 23 0>, /* P13, SPI1 SCK */
<14 0 &gpio0 22 0>, /* P14, SPI1 MISO */
<15 0 &gpio0 21 0>, /* P15, SPI1 MOSI */
<16 0 &gpio0 16 0>, /* P16 */
/* 17 and 18 are just 3.3V pins */
<19 0 &gpio0 0 0>, /* P19, I2C1 SCL */
<20 0 &gpio0 30 0>; /* P20, I2C1 SDA */
};
};
&gpiote {
status = "okay";
};
&gpio0 {
status = "okay";
/*
* Use the sensing mechanism for all pins by default, as GPIOTE channels
* are needed for the LED matrix and the SW PWM.
*/
sense-edge-mask = <0xffffffff>;
};
&uart0 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart0_default>;
pinctrl-1 = <&uart0_sleep>;
pinctrl-names = "default", "sleep";
};
&i2c0 {
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
/* See path_to_url for board variants */
/* v1.3 MMA8653FC (= FXOS8700) + MAG3110 */
pinctrl-0 = <&i2c0_default>;
pinctrl-1 = <&i2c0_sleep>;
pinctrl-names = "default", "sleep";
mma8653fc: mma8653fc@1d {
compatible = "nxp,fxos8700", "nxp,mma8653fc";
status = "okay";
reg = <0x1d>;
int1-gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
int2-gpios = <&gpio0 27 GPIO_ACTIVE_LOW>;
};
/* v1.5 variant 1 LSM303AGR */
lsm303agr_magn: lsm303agr-magn@1e {
compatible = "st,lis2mdl", "st,lsm303agr-magn";
status = "disabled";
reg = <0x1e>;
irq-gpios = <&gpio0 27 GPIO_ACTIVE_HIGH>; /* A3 */
};
lsm303agr_accel: lsm303agr-accel@19 {
compatible = "st,lis2dh", "st,lsm303agr-accel";
status = "disabled";
reg = <0x19>;
irq-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
};
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 0x8000>;
};
slot0_partition: partition@8000 {
label = "image-0";
reg = <0x00008000 0x1a000>;
};
slot1_partition: partition@22000 {
label = "image-1";
reg = <0x00022000 0x1a000>;
};
scratch_partition: partition@3c000 {
label = "image-scratch";
reg = <0x0003c000 0x2000>;
};
storage_partition: partition@3e000 {
label = "storage";
reg = <0x0003e000 0x00002000>;
};
};
};
``` | /content/code_sandbox/boards/bbc/microbit/bbc_microbit.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,801 |
```unknown
# Enable GPIO
CONFIG_GPIO=y
# Clock control
CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC=y
CONFIG_CLOCK_CONTROL_NRF_K32SRC_250PPM=y
# Enable uart driver
CONFIG_SERIAL=y
# Enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
``` | /content/code_sandbox/boards/bbc/microbit/bbc_microbit_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 61 |
```unknown
# nRF51 BBC_MICROBIT board configuration
if BOARD_BBC_MICROBIT
config BT_CTLR
default BT
if FXOS8700
choice FXOS8700_MODE
default FXOS8700_MODE_ACCEL
endchoice
endif # FXOS8700
endif # BOARD_BBC_MICROBIT
``` | /content/code_sandbox/boards/bbc/microbit/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 69 |
```yaml
identifier: bbc_microbit
name: BBC Micro:Bit
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 16
testing:
ignore_tags:
- net
supported:
- ble
- i2c
- gpio
- pwm
``` | /content/code_sandbox/boards/bbc/microbit/bbc_microbit.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 79 |
```objective-c
/*
*
*/
#ifndef __INC_BOARD_H
#define __INC_BOARD_H
/* External edge connector pin mappings to nRF51 GPIO pin numbers.
* More information:
* path_to_url
* path_to_url
*/
#define EXT_P0_GPIO_PIN 3 /* P0, Analog in */
#define EXT_P1_GPIO_PIN 2 /* P1, Analog in */
#define EXT_P2_GPIO_PIN 1 /* P2, Analog in */
#define EXT_P3_GPIO_PIN 4 /* P3, Analog in, LED Col 1 */
#define EXT_P4_GPIO_PIN 5 /* P4, Analog in, LED Col 2 */
#define EXT_P5_GPIO_PIN 17 /* P5, Button A */
#define EXT_P6_GPIO_PIN 12 /* P6, LED Col 9 */
#define EXT_P7_GPIO_PIN 11 /* P7, LED Col 8 */
#define EXT_P8_GPIO_PIN 18 /* P8 */
#define EXT_P9_GPIO_PIN 10 /* P9, LED Col 7 */
#define EXT_P10_GPIO_PIN 6 /* P10, Analog in, LED Col 3 */
#define EXT_P11_GPIO_PIN 26 /* P11, Button B */
#define EXT_P12_GPIO_PIN 20 /* P12 */
#define EXT_P13_GPIO_PIN 23 /* P13, SPI1 SCK */
#define EXT_P14_GPIO_PIN 22 /* P14, SPI1 MISO */
#define EXT_P15_GPIO_PIN 21 /* P15, SPI1 MOSI */
#define EXT_P16_GPIO_PIN 16 /* P16 */
/* 17 and 18 are just 3.3V pins */
#define EXT_P19_GPIO_PIN 0 /* P19, I2C1 SCL */
#define EXT_P20_GPIO_PIN 30 /* P20, I2C1 SDA */
#endif /* __INC_BOARD_H */
``` | /content/code_sandbox/boards/bbc/microbit/board.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 416 |
```unknown
/*
*/
&pinctrl {
uart0_default: uart0_default {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 6)>,
<NRF_PSEL(UART_RX, 1, 8)>;
};
};
uart0_sleep: uart0_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 6)>,
<NRF_PSEL(UART_RX, 1, 8)>;
low-power-enable;
};
};
i2c0_default: i2c0_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 16)>,
<NRF_PSEL(TWIM_SCL, 0, 8)>;
};
};
i2c0_sleep: i2c0_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 16)>,
<NRF_PSEL(TWIM_SCL, 0, 8)>;
low-power-enable;
};
};
pwm1_default: pwm1_default {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 0, 0)>;
nordic,invert;
};
};
pwm1_sleep: pwm1_sleep {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 0, 0)>;
low-power-enable;
};
};
};
``` | /content/code_sandbox/boards/bbc/microbit_v2/bbc_microbit_v2-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 343 |
```unknown
# nRF52 BBC_MICROBIT_V2 board configuration
config BOARD_BBC_MICROBIT_V2
select SOC_NRF52833_QIAA
``` | /content/code_sandbox/boards/bbc/microbit_v2/Kconfig.bbc_microbit_v2 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 34 |
```cmake
board_runner_args(pyocd "--target=nrf52833")
board_runner_args(nrfjprog "--nrf-family=NRF52")
board_runner_args(jlink "--device=nRF52833_xxAA" "--speed=4000")
set(OPENOCD_NRF5_SUBFAMILY "nrf52")
# Note: micro:bit v2 DAPLink may be upgraded to J-Link OB by following the instructions at
# path_to_url
# in which case the following line should be removed to default back to "jlink" OpenOCD interface
set(OPENOCD_NRF5_INTERFACE "cmsis-dap")
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
include(${ZEPHYR_BASE}/boards/common/openocd-nrf5.board.cmake)
``` | /content/code_sandbox/boards/bbc/microbit_v2/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 205 |
```cmake
# Suppress "unique_unit_address_if_enabled" to handle the following overlaps:
# - power@40000000 & clock@40000000 & bprot@40000000
# - acl@4001e000 & flash-controller@4001e000
list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled")
``` | /content/code_sandbox/boards/bbc/microbit_v2/pre_dt_board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 72 |
```restructuredtext
.. _bbc_microbit:
BBC MicroBit
##############
Overview
********
The Micro Bit (also referred to as BBC Micro Bit, stylized as micro:bit) is an
ARM-based embedded system designed by the BBC for use in computer education in
the UK.
The board is 4 cm 5 cm and has an ARM Cortex-M0 processor, accelerometer and
magnetometer sensors, Bluetooth and USB connectivity, a display consisting of
25 LEDs, two programmable buttons, and can be powered by either USB or an
external battery pack. The device inputs and outputs are through five ring
connectors that are part of the 23-pin edge connector.
* :abbr:`NVIC (Nested Vectored Interrupt Controller)`
* :abbr:`RTC (nRF RTC System Clock)`
* UART
* GPIO
* FLASH
* RADIO (Bluetooth Low Energy)
.. figure:: img/bbc_microbit.jpg
:align: center
:alt: BBC Micro Bit
BBC Micro Bit (Credit: path_to_url
More information about the board can be found at the `microbit website`_.
Hardware
********
The micro:bit has the following physical features:
* 25 individually-programmable LEDs
* 2 programmable buttons
* Physical connection pins
* Light and temperature sensors
* Motion sensors (accelerometer and compass)
* Wireless Communication, via Radio and Bluetooth
* USB interface
Supported Features
==================
The bbc_microbit board configuration supports the following nRF51
hardware features:
+-----------+------------+----------------------+
| Interface | Controller | Driver/Component |
+===========+============+======================+
| NVIC | on-chip | nested vectored |
| | | interrupt controller |
+-----------+------------+----------------------+
| RTC | on-chip | system clock |
+-----------+------------+----------------------+
| UART | on-chip | serial port |
+-----------+------------+----------------------+
| GPIO | on-chip | gpio |
+-----------+------------+----------------------+
| FLASH | on-chip | flash |
+-----------+------------+----------------------+
| RADIO | on-chip | Bluetooth |
+-----------+------------+----------------------+
Programming and Debugging
*************************
Flashing
========
Build and flash applications as usual (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Here is an example for the :ref:`hello_world` application.
First, run your favorite terminal program to listen for output.
.. code-block:: console
$ minicom -D <tty_device> -b 115200
Replace :code:`<tty_device>` with the port where the board nRF51 DK
can be found. For example, under Linux, :code:`/dev/ttyACM0`.
Then build and flash the application in the usual way.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: bbc_microbit
:goals: build flash
References
**********
.. target-notes::
.. _microbit website: path_to_url
``` | /content/code_sandbox/boards/bbc/microbit/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 666 |
```yaml
board:
name: bbc_microbit_v2
vendor: bbc
socs:
- name: nrf52833
``` | /content/code_sandbox/boards/bbc/microbit_v2/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 30 |
```yaml
identifier: bbc_microbit_v2
name: BBC Micro:Bit V2
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 128
testing:
ignore_tags:
- net
supported:
- ble
- i2c
- gpio
``` | /content/code_sandbox/boards/bbc/microbit_v2/bbc_microbit_v2.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 79 |
```unknown
# enable GPIO
CONFIG_GPIO=y
# clock control
CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC=y
CONFIG_CLOCK_CONTROL_NRF_K32SRC_250PPM=y
# enable uart driver
CONFIG_SERIAL=y
# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
``` | /content/code_sandbox/boards/bbc/microbit_v2/bbc_microbit_v2_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 61 |
```unknown
# nRF52 BBC_MICROBIT_V2 board configuration
if BOARD_BBC_MICROBIT_V2
config BT_CTLR
default BT
endif # BOARD_BBC_MICROBIT_V2
``` | /content/code_sandbox/boards/bbc/microbit_v2/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 43 |
```restructuredtext
.. _bbc_microbit_v2:
BBC MicroBit V2
#################
Overview
********
The Micro Bit (also referred to as BBC Micro Bit, stylized as micro:bit) is an
ARM-based embedded system designed by the BBC for use in computer education in
the UK.
The board is 4 cm 5 cm and has an ARM Cortex-M4F processor, accelerometer and
magnetometer sensors, Bluetooth and USB connectivity, a display consisting of
25 LEDs, a microphone, two programmable buttons, and can be powered by either
USB or an external battery pack. The device inputs and outputs are through five
ring connectors that are part of the 23-pin edge connector.
.. figure:: img/bbc_microbit2.jpg
:align: center
:alt: BBC Micro Bit V2
BBC Micro Bit V2 (Credit: path_to_url
More information about the board can be found at the `microbit website`_.
Hardware
********
The micro:bit-v2 has the following physical features:
* 25 individually-programmable LEDs
* 2 programmable buttons
* Microphone sensors
* Physical connection pins
* Light and temperature sensors
* Motion sensors (accelerometer and compass)
* Wireless Communication, via Radio and Bluetooth 5
* USB interface
Supported Features
==================
The bbc_microbit_v2 board configuration supports the following
hardware features:
+-----------+------------+----------------------+
| Interface | Controller | Driver/Component |
+===========+============+======================+
| NVIC | on-chip | nested vectored |
| | | interrupt controller |
+-----------+------------+----------------------+
| RTC | on-chip | system clock |
+-----------+------------+----------------------+
| UART | on-chip | serial port |
+-----------+------------+----------------------+
| GPIO | on-chip | gpio |
+-----------+------------+----------------------+
| FLASH | on-chip | flash |
+-----------+------------+----------------------+
| RADIO | on-chip | Bluetooth |
+-----------+------------+----------------------+
Programming and Debugging
*************************
Flashing
========
Build and flash applications as usual (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Here is an example for the :ref:`hello_world` application.
First, run your favorite terminal program to listen for output.
.. code-block:: console
$ minicom -D <tty_device> -b 115200
Replace :code:`<tty_device>` with the port where the micro:bit board
can be found. For example, under Linux, :code:`/dev/ttyACM0`.
Then build and flash the application in the usual way.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: bbc_microbit_v2
:goals: build flash
References
**********
.. target-notes::
.. _microbit website: path_to_url
``` | /content/code_sandbox/boards/bbc/microbit_v2/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 646 |
```restructuredtext
.. _boards-adafruit:
Adafruit Industries LLC
#######################
.. toctree::
:maxdepth: 1
:glob:
**/*
``` | /content/code_sandbox/boards/adafruit/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 36 |
```cmake
include(${ZEPHYR_BASE}/boards/common/bossac.board.cmake)
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
``` | /content/code_sandbox/boards/adafruit/grand_central_m4_express/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 36 |
```unknown
/*
*
*/
/dts-v1/;
#include <nordic/nrf52833_qiaa.dtsi>
#include "bbc_microbit_v2-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "BBC Micro:bit V2";
compatible = "bbc,microbit-v2";
/* These aliases are provided for compatibility with samples */
aliases {
sw0 = &buttonA;
sw1 = &buttonB;
magn0 = &lsm303agr_magn;
accel0 = &lsm303agr_accel;
watchdog0 = &wdt0;
};
chosen {
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,bt-mon-uart = &uart0;
zephyr,bt-c2h-uart = &uart0;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,display = &led_matrix;
};
gpio_keys {
compatible = "gpio-keys";
buttonA: button_0 {
label = "BTN_A";
gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_A>;
};
buttonB: button_1 {
label = "BTN_B";
gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_B>;
};
};
led_matrix: led_matrix {
compatible = "nordic,nrf-led-matrix";
status = "okay";
width = <5>;
height = <5>;
pixel-mapping = [00 01 02 03 04
10 11 12 13 14
20 21 22 23 24
30 31 32 33 34
40 41 42 43 44];
row-gpios = <&gpio0 21 GPIO_ACTIVE_HIGH>,
<&gpio0 22 GPIO_ACTIVE_HIGH>,
<&gpio0 15 GPIO_ACTIVE_HIGH>,
<&gpio0 24 GPIO_ACTIVE_HIGH>,
<&gpio0 19 GPIO_ACTIVE_HIGH>;
col-gpios = <&gpio0 28 GPIO_ACTIVE_LOW>,
<&gpio0 11 GPIO_ACTIVE_LOW>,
<&gpio0 31 GPIO_ACTIVE_LOW>,
<&gpio1 5 GPIO_ACTIVE_LOW>,
<&gpio0 30 GPIO_ACTIVE_LOW>;
refresh-frequency = <50>;
timer = <&timer4>;
pwm = <&pwm0>;
pixel-group-size = <4>;
};
edge_connector: connector {
compatible = "microbit,edge-connector";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpio0 2 0>, /* P0 */
<1 0 &gpio0 3 0>, /* P1 */
<2 0 &gpio0 4 0>, /* P2 */
<3 0 &gpio0 31 0>, /* P3 */
<4 0 &gpio0 28 0>, /* P4 */
<5 0 &gpio0 14 0>, /* P5 */
<6 0 &gpio1 5 0>, /* P6 */
<7 0 &gpio0 11 0>, /* P7 */
<8 0 &gpio0 10 0>, /* P8 */
<9 0 &gpio0 9 0>, /* P9 */
<10 0 &gpio0 30 0>, /* P10 */
<11 0 &gpio0 23 0>, /* P11 */
<12 0 &gpio0 12 0>, /* P12 */
<13 0 &gpio0 17 0>, /* P13 */
<14 0 &gpio0 1 0>, /* P14 */
<15 0 &gpio0 13 0>, /* P15 */
<16 0 &gpio1 2 0>, /* P16 */
<19 0 &gpio0 26 0>, /* P19 */
<20 0 &gpio1 0 0>; /* P20 */
};
};
&gpiote {
status = "okay";
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&pwm1 {
/* buzzer */
status = "okay";
pinctrl-0 = <&pwm1_default>;
pinctrl-1 = <&pwm1_sleep>;
pinctrl-names = "default", "sleep";
};
&uart0 {
compatible = "nordic,nrf-uart";
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart0_default>;
pinctrl-1 = <&uart0_sleep>;
pinctrl-names = "default", "sleep";
};
&i2c0 {
compatible = "nordic,nrf-twim";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
/* See path_to_url for board variants */
pinctrl-0 = <&i2c0_default>;
pinctrl-1 = <&i2c0_sleep>;
pinctrl-names = "default", "sleep";
lsm303agr_magn: lsm303agr-magn@1e {
compatible = "st,lis2mdl", "st,lsm303agr-magn";
status = "okay";
reg = <0x1e>;
irq-gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>; /* A3 */
};
lsm303agr_accel: lsm303agr-accel@19 {
compatible = "st,lis2dh", "st,lsm303agr-accel";
status = "okay";
reg = <0x19>;
irq-gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>;
};
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 0xC000>;
};
slot0_partition: partition@c000 {
label = "image-0";
reg = <0x0000C000 0x32000>;
};
slot1_partition: partition@3e000 {
label = "image-1";
reg = <0x0003E000 0x32000>;
};
scratch_partition: partition@70000 {
label = "image-scratch";
reg = <0x00070000 0xA000>;
};
storage_partition: partition@7a000 {
label = "storage";
reg = <0x0007A000 0x00006000>;
};
};
};
zephyr_udc0: &usbd {
compatible = "nordic,nrf-usbd";
status = "okay";
};
``` | /content/code_sandbox/boards/bbc/microbit_v2/bbc_microbit_v2.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,640 |
```unknown
CONFIG_SOC_ATMEL_SAMD5X_XOSC32K=y
CONFIG_SOC_ATMEL_SAMD5X_XOSC32K_AS_MAIN=y
CONFIG_BUILD_OUTPUT_HEX=y
CONFIG_BUILD_OUTPUT_UF2=y
CONFIG_BOOTLOADER_BOSSA=y
CONFIG_BOOTLOADER_BOSSA_ADAFRUIT_UF2=y
CONFIG_ARM_MPU=y
CONFIG_HW_STACK_PROTECTION=y
CONFIG_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_UART_CONSOLE=y
CONFIG_UART_INTERRUPT_DRIVEN=y
``` | /content/code_sandbox/boards/adafruit/grand_central_m4_express/adafruit_grand_central_m4_express_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 106 |
```unknown
/*
*/
/dts-v1/;
#include <atmel/samd5xx20.dtsi>
#include "adafruit_grand_central_m4_express-pinctrl.dtsi"
/ {
model = "Adafruit Grand Central M4 Express";
compatible = "adafruit,grand-central-m4-express";
chosen {
zephyr,console = &sercom0;
zephyr,shell-uart = &sercom0;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &code_partition;
};
/* These aliases are provided for compatibility with samples */
aliases {
led0 = &led0;
sdhc0 = &sdhc0;
};
leds {
compatible = "gpio-leds";
led0: led_0 {
gpios = <&portb 1 0>;
label = "LED";
};
};
};
&cpu0 {
clock-frequency = <120000000>;
};
&sercom0 {
status = "okay";
compatible = "atmel,sam0-uart";
current-speed = <115200>;
rxpo = <1>;
txpo = <0>;
pinctrl-0 = <&sercom0_uart_default>;
pinctrl-names = "default";
};
&sercom2 {
status = "okay";
compatible = "atmel,sam0-spi";
dipo = <3>;
dopo = <0>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&sercom2_spi_default>;
pinctrl-names = "default";
cs-gpios = <&portb 28 GPIO_ACTIVE_LOW>;
/* microSD Card */
sdhc0: sdhc@0 {
status = "okay";
compatible = "zephyr,sdhc-spi-slot";
reg = <0>;
spi-max-frequency = <20000000>;
mmc {
status = "okay";
compatible = "zephyr,sdmmc-disk";
};
};
};
&sercom3 {
status = "okay";
compatible = "atmel,sam0-i2c";
clock-frequency = <I2C_BITRATE_FAST>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&sercom3_i2c_default>;
pinctrl-names = "default";
};
&sercom7 {
status = "okay";
compatible = "atmel,sam0-spi";
dipo = <3>;
dopo = <0>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&sercom7_spi_default>;
pinctrl-names = "default";
};
zephyr_udc0: &usb0 {
status = "okay";
pinctrl-0 = <&usb_dc_default>;
pinctrl-names = "default";
};
&dmac {
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "uf2";
reg = <0x00000000 DT_SIZE_K(16)>;
read-only;
};
code_partition: partition@4000 {
label = "code";
reg = <0x4000 DT_SIZE_K(1024-16)>;
read-only;
};
};
};
``` | /content/code_sandbox/boards/adafruit/grand_central_m4_express/adafruit_grand_central_m4_express.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 784 |
```yaml
identifier: adafruit_grand_central_m4_express
name: Adafruit Grand Central M4 Express
type: mcu
arch: arm
ram: 256
flash: 1024
toolchain:
- zephyr
- gnuarmemb
supported:
- dma
- gpio
- i2c
- spi
- uart
- usb_device
- watchdog
``` | /content/code_sandbox/boards/adafruit/grand_central_m4_express/adafruit_grand_central_m4_express.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 93 |
```unknown
/*
*/
#include <dt-bindings/pinctrl/samd51p-pinctrl.h>
&pinctrl {
sercom0_uart_default: sercom0_uart_default {
group1 {
pinmux = <PB24C_SERCOM0_PAD0>,
<PB25C_SERCOM0_PAD1>;
};
};
sercom2_spi_default: sercom2_spi_default {
group1 {
pinmux = <PB26C_SERCOM2_PAD0>,
<PB27C_SERCOM2_PAD1>,
<PB29C_SERCOM2_PAD3>;
};
};
sercom3_i2c_default: sercom3_i2c_default {
group1 {
pinmux = <PB20C_SERCOM3_PAD0>,
<PB21C_SERCOM3_PAD1>;
};
};
sercom7_spi_default: sercom7_spi_default {
group1 {
pinmux = <PD8C_SERCOM7_PAD0>,
<PD9C_SERCOM7_PAD1>,
<PD11C_SERCOM7_PAD3>;
};
};
usb_dc_default: usb_dc_default {
group1 {
pinmux = <PA25H_USB_DP>,
<PA24H_USB_DM>;
};
};
};
``` | /content/code_sandbox/boards/adafruit/grand_central_m4_express/adafruit_grand_central_m4_express-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 281 |
```yaml
board:
name: adafruit_grand_central_m4_express
vendor: adafruit
socs:
- name: samd51p20a
``` | /content/code_sandbox/boards/adafruit/grand_central_m4_express/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 38 |
```unknown
config BOARD_ADAFRUIT_GRAND_CENTRAL_M4_EXPRESS
select SOC_SAMD51P20A
``` | /content/code_sandbox/boards/adafruit/grand_central_m4_express/Kconfig.adafruit_grand_central_m4_express | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 27 |
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