text stringlengths 9 39.2M | dir stringlengths 25 226 | lang stringclasses 163 values | created_date timestamp[s] | updated_date timestamp[s] | repo_name stringclasses 751 values | repo_full_name stringclasses 752 values | star int64 1.01k 183k | len_tokens int64 1 18.5M |
|---|---|---|---|---|---|---|---|---|
```unknown
/*
*
*/
/dts-v1/;
#include <nxp/nxp_rt1040.dtsi>
#include "mimxrt1040_evk-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "NXP MIMXRT1040-EVK board";
compatible = "nxp,mimxrt1042";
aliases {
led0 = &green_led;
sw0 = &user_button;
pwm-0 = &flexpwm1_pwm3;
accel0 = &fxls8974;
};
chosen {
zephyr,sram = &sdram0;
zephyr,itcm = &itcm;
zephyr,dtcm = &dtcm;
zephyr,console = &lpuart1;
zephyr,shell-uart = &lpuart1;
zephyr,flash = &w25q64jvssiq;
zephyr,flash-controller = &w25q64jvssiq;
zephyr,code-partition = &slot0_partition;
zephyr,bt-hci = &bt_hci_uart;
};
sdram0: memory@80000000 {
/* Winbond W9825G6KH SDRAM */
device_type = "memory";
reg = <0x80000000 DT_SIZE_M(32)>;
};
/*
* This node describes the GPIO pins of the parallel FPC interface,
* This interface is standard to several NXP EVKs, and is used with
* several parallel LCD displays (available as zephyr shields)
*/
nxp_parallel_lcd_connector: parallel-connector {
compatible = "nxp,parallel-lcd-connector";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpio2 31 0>; /* Pin 1, BL+ */
};
/*
* This node describes the GPIO pins of the I2C display FPC interface,
* This interface is standard to several NXP EVKs, and is used with
* several parallel LCD displays (available as zephyr shields)
*/
nxp_i2c_touch_fpc: i2c-touch-connector {
compatible = "nxp,i2c-tsc-fpc";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <1 0 &gpio1 19 0>, /* Pin 2, LCD touch RST */
<2 0 &gpio1 11 0>; /* Pin 3, LCD touch INT */
};
leds {
compatible = "gpio-leds";
green_led: led_0 {
gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
label = "User LD1";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button_0 {
label = "User SW8";
gpios = <&gpio5 0 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
zephyr,code = <INPUT_KEY_0>;
};
};
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpio1 14 0>, /* A0 */
<1 0 &gpio1 15 0>, /* A1 */
<2 0 &gpio1 20 0>, /* A2 */
<3 0 &gpio1 21 0>, /* A3 */
<4 0 &gpio1 22 0>, /* A4 */
<5 0 &gpio1 23 0>, /* A5 */
<6 0 &gpio3 1 0>, /* D0 */
<7 0 &gpio3 0 0>, /* D1 */
<8 0 &gpio1 11 0>, /* D2 */
<9 0 &gpio3 2 0>, /* D3 */
<10 0 &gpio1 9 0>, /* D4 */
<11 0 &gpio1 10 0>, /* D5 */
<12 0 &gpio1 18 0>, /* D6 */
<13 0 &gpio1 19 0>, /* D7 */
<14 0 &gpio2 30 0>, /* D8 */
<15 0 &gpio2 31 0>, /* D9 */
<16 0 &gpio3 13 0>, /* D10 */
<17 0 &gpio3 14 0>, /* D11 */
<18 0 &gpio3 15 0>, /* D12 */
<19 0 &gpio3 12 0>, /* D13 */
<20 0 &gpio1 17 0>, /* D14 */
<21 0 &gpio1 16 0>; /* D15 */
};
};
&flexspi {
status = "okay";
reg = <0x402a8000 0x4000>, <0x60000000 DT_SIZE_M(8)>;
/* Winbond external flash */
w25q64jvssiq: w25q64jvssiq@0 {
compatible = "nxp,imx-flexspi-nor";
size = <(DT_SIZE_M(8) * 8)>;
reg = <0>;
spi-max-frequency = <133000000>;
status = "okay";
jedec-id = [ef 40 17];
erase-block-size = <4096>;
write-block-size = <1>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 DT_SIZE_K(128)>;
};
/* The MCUBoot swap-move algorithm uses the last 2 sectors
* of the primary slot0 for swap status and move.
*/
slot0_partition: partition@20000 {
label = "image-0";
reg = <0x00020000 (DT_SIZE_M(3) + DT_SIZE_K(8))>;
};
slot1_partition: partition@322000 {
label = "image-1";
reg = <0x00322000 DT_SIZE_M(3)>;
};
storage_partition: partition@622000 {
label = "storage";
reg = <0x00622000 (DT_SIZE_M(2) - DT_SIZE_K(136))>;
};
};
};
};
&lpuart1 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&pinmux_lpuart1>;
pinctrl-1 = <&pinmux_lpuart1_sleep>;
pinctrl-names = "default", "sleep";
};
&flexpwm1_pwm3 {
status = "okay";
pinctrl-0 = <&pinmux_flexpwm1_pwm3>;
pinctrl-names = "default";
};
&adc1 {
status = "okay";
pinctrl-0 = <&pinmux_adc1>;
pinctrl-names = "default";
};
&lpspi1 {
status = "okay";
/* DMA channels 0 and 1, muxed to LPSPI1 RX and TX */
dmas = <&edma0 0 13>, <&edma0 1 14>;
dma-names = "rx", "tx";
pinctrl-0 = <&pinmux_lpspi1>;
pinctrl-names = "default";
};
&edma0 {
status = "okay";
};
&lpi2c1 {
status = "okay";
pinctrl-0 = <&pinmux_lpi2c1>;
pinctrl-names = "default";
};
nxp_touch_i2c: &lpi2c1 {};
zephyr_lcdif: &lcdif {
pinctrl-0 = <&pinmux_lcdif>;
pinctrl-names = "default";
};
lpi2c3: &lpi2c3 {
pinctrl-0 = <&pinmux_lpi2c3>;
pinctrl-names = "default";
status = "okay";
fxls8974: fxls8974@18 {
compatible = "nxp,fxls8974";
reg = <0x18>;
status = "okay";
/* Two zero ohm resistors (R115 and R122) isolate sensor
* interrupt gpios from the soc and are unpopulated by default.
* Note that if you populate them, they conflict with JTAG_TDO and
* ethernet PHY interrupt signals.
* int1-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
* int2-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
*/
};
};
/* GPT and Systick are enabled. If power management is enabled, the GPT
* timer will be used instead of systick, as allows the core clock to
* be gated.
*/
&gpt_hw_timer {
status = "okay";
};
&systick {
status = "okay";
};
m2_hci_uart: &lpuart3 {
pinctrl-0 = <&pinmux_lpuart3_flowcontrol>;
pinctrl-1 = <&pinmux_lpuart3_sleep>;
pinctrl-names = "default", "sleep";
bt_hci_uart: bt_hci_uart {
compatible = "zephyr,bt-hci-uart";
m2_bt_module {
compatible = "nxp,bt-hci-uart";
sdio-reset-gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
w-disable-gpios = <&gpio3 2 GPIO_ACTIVE_HIGH>;
hci-operation-speed = <115200>;
hw-flow-control;
fw-download-primary-speed = <115200>;
fw-download-secondary-speed = <3000000>;
fw-download-secondary-flowcontrol;
};
};
};
&m2_hci_uart {
status = "okay";
current-speed = <115200>;
};
``` | /content/code_sandbox/boards/nxp/mimxrt1040_evk/mimxrt1040_evk.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,353 |
```cmake
#
#
#
board_runner_args(jlink "--device=MIMXRT685S_M33" "--reset-after-load")
board_runner_args(linkserver "--device=MIMXRT685S:EVK-MIMXRT685")
include(${ZEPHYR_BASE}/boards/common/linkserver.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/nxp/mimxrt685_evk/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 80 |
```unknown
config BOARD_MIMXRT685_EVK
select SOC_PART_NUMBER_MIMXRT685SFVKB
select SOC_MIMXRT685S_CM33 if BOARD_MIMXRT685_EVK_MIMXRT685S_CM33
``` | /content/code_sandbox/boards/nxp/mimxrt685_evk/Kconfig.mimxrt685_evk | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 53 |
```unknown
#
#
#
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_PINCTRL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
CONFIG_GPIO=y
# Enable TrustZone-M
CONFIG_TRUSTED_EXECUTION_SECURE=y
CONFIG_ARM_MPU=y
CONFIG_HW_STACK_PROTECTION=y
``` | /content/code_sandbox/boards/nxp/mimxrt685_evk/mimxrt685_evk_mimxrt685s_cm33_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 61 |
```restructuredtext
.. _mimxrt1040_evk:
NXP MIMXRT1040-EVK
##################
Overview
********
i.MX RT1040 crossover MCUs add additional flexibility with new packages and an
extended temperature range up to 125 C. The i.MX RT1040 MCU has a compact
9x9 mm package, as well as the 11x11 mm package that supports implementing a
2-layer PCB design. The i.MX RT1040 MCUs run on the Arm Cortex-M7 core at
600 MHz.
.. image:: mimxrt1040_evk.jpg
:align: center
:alt: MIMXRT1040-EVK
Hardware
********
- MIMXRT1042XJM5B MCU (600 MHz, 512 KB TCM)
- Memory
- 256 MBit SDRAM (Winbond W9825G6KH)
- 64 Mbit QSPI Flash (Winbond W25Q64JVSSIQ)
- Display
- LCD connector
- Touch connector
- Ethernet
- 10/100 Mbit/s Ethernet PHY
- USB
- USB 2.0 OTG connector
- Audio
- 3.5 mm audio stereo headphone jack
- Board-mounted microphone
- Power
- 5 V DC jack
- Debug
- JTAG 20-pin connector
- OpenSDA with DAPLink
- Expansion port
- Arduino interface
- CAN bus connector
For more information about the MIMXRT1040 SoC and MIMXRT1040-EVK board, see
these references:
- `i.MX RT1040 Website`_
- `i.MX RT1040 Datasheet`_
- `i.MX RT1040 Reference Manual`_
- `MIMXRT1040-EVK Website`_
- `MIMXRT1040-EVK User Guide`_
- `MIMXRT1040-EVK Design Files`_
External Memory
===============
This platform has the following external memories:
+----------------+------------+-------------------------------------+
| Device | Controller | Status |
+================+============+=====================================+
| W9825G6KH | SEMC | Enabled via device configuration |
| | | data block, which sets up SEMC at |
| | | boot time |
+----------------+------------+-------------------------------------+
| W25Q64JVSSIQ | FLEXSPI | Enabled via flash configurationn |
| | | block, which sets up FLEXSPI at |
| | | boot time. Supported for XIP only. |
+----------------+------------+-------------------------------------+
Supported Features
==================
The mimxrt1040_evk board configuration supports the hardware features listed
below. For additional features not yet supported, please also refer to the
:ref:`mimxrt1064_evk` , which is the superset board in NXP's i.MX RT10xx family.
NXP prioritizes enabling the superset board with NXP's Full Platform Support for
Zephyr. Therefore, the mimxrt1064_evk board may have additional features
already supported, which can also be re-used on this mimxrt1040_evk board:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PWM | on-chip | pwm |
+-----------+------------+-------------------------------------+
| ADC | on-chip | adc |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| DMA | on-chip | dma |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| DISPLAY | on-chip | eLCDIF. Tested with |
| | | :ref:`rk043fn02h_ct`, and |
| | | :ref:`rk043fn66hs_ctg` shields |
+-----------+------------+-------------------------------------+
| UART | NXP NW61x | M.2 WIFI/BT module |
+-----------+------------+-------------------------------------+
The default configuration can be found in
:zephyr_file:`boards/nxp/mimxrt1040_evk/mimxrt1040_evk_defconfig`
Other hardware features are not currently supported by the port.
Connections and IOs
===================
The MIMXRT1040 SoC has five pairs of pinmux/gpio controllers.
+---------------+-----------------+---------------------------+
| Name | Function | Usage |
+===============+=================+===========================+
| GPIO_AD_B0_12 | LPUART1_TX | UART Console |
+---------------+-----------------+---------------------------+
| GPIO_AD_B0_13 | LPUART1_RX | UART Console |
+---------------+-----------------+---------------------------+
| WAKEUP | GPIO | SW0 |
+---------------+-----------------+---------------------------+
| GPIO_AD_B0_08 | GPIO | User LD1 |
+---------------+-----------------+---------------------------+
| GPIO_AD_B0_10 | FLEXPWM1 PWM3A | PWM Output |
+---------------+-----------------+---------------------------+
| GPIO_AD_B0_14 | ADC0 IN3 | ADC0 Input |
+---------------+-----------------+---------------------------+
| GPIO_AD_B0_15 | ADC0 IN4 | ADC0 Input |
+---------------+-----------------+---------------------------+
| GPIO_SD_B0_02 | LPSPI1_SDO | SPI Output |
+---------------+-----------------+---------------------------+
| GPIO_SD_B0_03 | LPSPI1_SDI | SPI Input |
+---------------+-----------------+---------------------------+
| GPIO_SD_B0_00 | LPSPI1_SCK | SPI Clock |
+---------------+-----------------+---------------------------+
| GPIO_SD_B0_00 | LPSPI1_SCK | SPI Clock |
+---------------+-----------------+---------------------------+
| GPIO_AD_B1_00 | LPI2C1_SCL | I2C Clock |
+---------------+-----------------+---------------------------+
| GPIO_AD_B1_01 | LPI2C1_SDA | I2C Data |
+---------------+-----------------+---------------------------+
| GPIO_AD_B1_06 | LPUART3_TX | M.2 BT HCI |
+---------------+-----------------+---------------------------+
| GPIO_AD_B1_07 | LPUART3_RX | M.2 BT HCI |
+---------------+-----------------+---------------------------+
| GPIO_AD_B1_04 | LPUART3_CTS_b | M.2 BT HCI |
+---------------+-----------------+---------------------------+
| GPIO_AD_B1_05 | LPUART3_RTS_b | M.2 BT HCI |
+---------------+-----------------+---------------------------+
.. note::
In order to use the SPI peripheral on this board, resistors R350, R346,
and R360 must be populated with zero ohm resistors.
System Clock
============
The MIMXRT1040 SoC is configured to use SysTick as the system clock source,
running at 600MHz.
When power management is enabled, the 32 KHz low frequency
oscillator on the board will be used as a source for the GPT timer to
generate a system clock. This clock enables lower power states, at the
cost of reduced resolution
Serial Port
===========
The MIMXRT1040 SoC has eight UARTs. ``LPUART1`` is configured for the console,
``LPUART3`` for the Bluetooth Host Controller Interface (BT HCI),
and the remaining UARTs are not used.
Fetch Binary Blobs
==================
The board Bluetooth/WiFi module requires fetching some binary blob files, to do
that run the command:
.. code-block:: console
west blobs fetch hal_nxp
.. note:: Only Bluetooth functionality is currently supported.
Programming and Debugging
*************************
This board supports 3 debug host tools. Please install your preferred host
tool, then follow the instructions in `Configuring a Debug Probe`_ to
configure the board appropriately.
* :ref:`jlink-debug-host-tools` (Default, Supported by NXP)
* :ref:`linkserver-debug-host-tools` (Supported by NXP)
* :ref:`pyocd-debug-host-tools` (Not supported by NXP)
Once the host tool and board are configured, build and flash applications
as usual (see :ref:`build_an_application` and :ref:`application_run` for more
details).
Configuring a Debug Probe
=========================
For the RT1040, J9/J10 are the SWD isolation jumpers, J12 is the DFU
mode jumper, and J2 is the 20 pin JTAG/SWD header.
.. include:: ../../common/rt1xxx-lpclink2-debug.rst
:start-after: rt1xxx-lpclink2-probes
Configuring a Console
=====================
Regardless of your choice in debug probe, we will use the OpenSDA
microcontroller as a usb-to-serial adapter for the serial console. Check that
jumpers J11 and J13 are **on** (they are on by default when boards ship from
the factory) to connect UART signals to the OpenSDA microcontroller.
Connect a USB cable from your PC to J1.
Use the following settings with your serial terminal of choice (minicom, putty,
etc.):
- Speed: 115200
- Data: 8 bits
- Parity: None
- Stop bits: 1
Flashing
========
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: mimxrt1040_evk
:goals: flash
Open a serial terminal, reset the board (press the SW1 button), and you should
see the following message in the terminal:
.. code-block:: console
***** Booting Zephyr OS Booting Zephyr OS build v3.3.0-rc3-66 *****
Hello World! mimxrt1040_evk
Debugging
=========
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: mimxrt1040_evk
:goals: debug
Open a serial terminal, step through the application in your debugger, and you
should see the following message in the terminal:
.. code-block:: console
***** Booting Zephyr OS Booting Zephyr OS build v3.3.0-rc3-66 *****
Hello World! mimxrt1040_evk
Troubleshooting
===============
USER_LED D8
-----------
The MIMXRT1040-EVK board ships with the wireless module in the M.2 connector,
and with jumper J80 shorted. This causes a conflict with the USER_LED D8,
and the LED will not turn off. Samples and applications using USER_LED D8,
like blinky, require removal of J80 jumper.
Boot Header
-----------
If the debug probe fails to connect with the following error, it's possible
that the boot header in QSPI is invalid or corrupted. The boot header is
configured by :kconfig:option:`CONFIG_NXP_IMXRT_BOOT_HEADER`.
.. code-block:: console
Remote debugging using :2331
Remote communication error. Target disconnected.: Connection reset by peer.
"monitor" command not supported by this target.
"monitor" command not supported by this target.
You can't do that when your target is `exec'
(gdb) Could not connect to target.
Please check power, connection and settings.
You can fix it by erasing and reprogramming the QSPI with the following
steps:
#. Set the SW4 DIP switches to OFF-OFF-OFF-ON to boot into the ROM bootloader.
#. Reset by pressing SW1
#. Run ``west debug`` or ``west flash`` again with a known working Zephyr
application.
#. Set the SW4 DIP switches to OFF-OFF-ON-OFF to boot from QSPI.
#. Reset by pressing SW1
Bluetooth Module
----------------
For Murate 2EL M.2 Mdoule, the following hardware rework needs to be applied,
Solder 0 ohm resistors for R96, and R93.
Remove resistors from R497, R498, R456 and R457.
And due to pin conflict issue, the PCM interface of Bluetooth module cannot be supported.
For the debugger fails to connect with the following error, please refer to section `WiFi Module`.
WiFi Module
-----------
If the debugger fails to connect with the following error, it's possible
the M.2 WiFi module is interfering with the debug signals
.. code-block:: console
Remote debugging using :2331
Remote communication error. Target disconnected.: Connection reset by peer.
"monitor" command not supported by this target.
"monitor" command not supported by this target.
You can't do that when your target is `exec'
(gdb) Could not connect to target.
Please check power, connection and settings.
To resolve this, you may remove the M.2 WiFi module from the board when
flashing or debugging it, or remove jumper J80.
.. _MIMXRT1040-EVK Website:
path_to_url
.. _MIMXRT1040-EVK User Guide:
path_to_url
.. _MIMXRT1040-EVK Design Files:
path_to_url
.. _i.MX RT1040 Website:
path_to_url
.. _i.MX RT1040 Datasheet:
path_to_url
.. _i.MX RT1040 Reference Manual:
path_to_url
.. _NXP AN13206:
path_to_url
``` | /content/code_sandbox/boards/nxp/mimxrt1040_evk/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 3,147 |
```yaml
#
#
#
identifier: mimxrt685_evk/mimxrt685s/cm33
name: NXP MIMXRT685-EVK
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 4608
flash: 65536
supported:
- arduino_gpio
- arduino_i2c
- arduino_serial
- arduino_spi
- counter
- dma
- pwm
- gpio
- hwinfo
- i2c
- i3c
- i2s
- sdhc
- spi
- watchdog
- usb_device
- usbd
vendor: nxp
``` | /content/code_sandbox/boards/nxp/mimxrt685_evk/mimxrt685_evk_mimxrt685s_cm33.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 170 |
```c
/*
*/
#include <zephyr/init.h>
#include <zephyr/devicetree.h>
#include <fsl_device_registers.h>
static int mimxrt685_evk_init(void)
{
/* flexcomm1 and flexcomm3 are configured to loopback the TX signal to RX */
#if (DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(flexcomm1), nxp_lpc_i2s, okay)) && \
(DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(flexcomm3), nxp_lpc_i2s, okay)) && \
CONFIG_I2S
/* Set shared signal set 0 SCK, WS from Transmit I2S - Flexcomm3 */
SYSCTL1->SHAREDCTRLSET[0] = SYSCTL1_SHAREDCTRLSET_SHAREDSCKSEL(3) |
SYSCTL1_SHAREDCTRLSET_SHAREDWSSEL(3);
#ifdef CONFIG_I2S_TEST_SEPARATE_DEVICES
/* Select Data in from Transmit I2S - Flexcomm 3 */
SYSCTL1->SHAREDCTRLSET[0] |= SYSCTL1_SHAREDCTRLSET_SHAREDDATASEL(3);
/* Enable Transmit I2S - Flexcomm 3 for Shared Data Out */
SYSCTL1->SHAREDCTRLSET[0] |= SYSCTL1_SHAREDCTRLSET_FC3DATAOUTEN(1);
#endif
/* Set Receive I2S - Flexcomm 1 SCK, WS from shared signal set 0 */
SYSCTL1->FCCTRLSEL[1] = SYSCTL1_FCCTRLSEL_SCKINSEL(1) |
SYSCTL1_FCCTRLSEL_WSINSEL(1);
/* Set Transmit I2S - Flexcomm 3 SCK, WS from shared signal set 0 */
SYSCTL1->FCCTRLSEL[3] = SYSCTL1_FCCTRLSEL_SCKINSEL(1) |
SYSCTL1_FCCTRLSEL_WSINSEL(1);
#ifdef CONFIG_I2S_TEST_SEPARATE_DEVICES
/* Select Receive I2S - Flexcomm 1 Data in from shared signal set 0 */
SYSCTL1->FCCTRLSEL[1] |= SYSCTL1_FCCTRLSEL_DATAINSEL(1);
/* Select Transmit I2S - Flexcomm 3 Data out to shared signal set 0 */
SYSCTL1->FCCTRLSEL[3] |= SYSCTL1_FCCTRLSEL_DATAOUTSEL(1);
#endif
#endif
#ifdef CONFIG_REBOOT
/*
* The sys_reboot API calls NVIC_SystemReset. On the RT685, the warm
* reset will not complete correctly unless the ROM toggles the
* flash reset pin. We can control this behavior using the OTP shadow
* register for OPT word BOOT_CFG1
*
* Set FLEXSPI_RESET_PIN_ENABLE=1, FLEXSPI_RESET_PIN= PIO2_12
*/
OCOTP->OTP_SHADOW[97] = 0x314000;
#endif /* CONFIG_REBOOT */
return 0;
}
SYS_INIT(mimxrt685_evk_init, PRE_KERNEL_1, CONFIG_BOARD_INIT_PRIORITY);
``` | /content/code_sandbox/boards/nxp/mimxrt685_evk/init.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 659 |
```unknown
/*
*
*/
/dts-v1/;
#include <nxp/nxp_rt6xx.dtsi>
#include <zephyr/dt-bindings/pwm/pwm.h>
#include <zephyr/dt-bindings/input/input-event-codes.h>
#include "mimxrt685_evk-pinctrl.dtsi"
/ {
model = "NXP MIMXRT685-EVK board";
compatible = "nxp,mimxrt685";
aliases {
sw0 = &user_button_1;
sw1 = &user_button_2;
led0 = &green_led;
led1 = &blue_led;
led2 = &red_led;
usart-0 = &flexcomm0;
/* For pwm test suites */
pwm-0 = &sc_timer;
pwm-led0 = &green_pwm_led;
green-pwm-led = &green_pwm_led;
blue-pwm-led = &blue_pwm_led;
red-pwm-led = &red_pwm_led;
watchdog0 = &wwdt0;
magn0 = &fxos8700;
accel0 = &fxos8700;
sdhc0 = &usdhc0;
};
chosen {
zephyr,flash-controller = &mx25um51345g;
zephyr,flash = &mx25um51345g;
zephyr,code-partition = &slot0_partition;
zephyr,sram = &sram0;
zephyr,console = &flexcomm0;
zephyr,shell-uart = &flexcomm0;
};
gpio_keys {
compatible = "gpio-keys";
user_button_1: button_0 {
label = "User SW1";
gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_0>;
};
user_button_2: button_1 {
label = "User SW2";
gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_1>;
};
};
leds: leds {
compatible = "gpio-leds";
green_led: led_1 {
gpios = <&gpio0 14 0>;
label = "User LED_GREEN";
};
blue_led: led_2 {
gpios = <&gpio0 26 0>;
label = "User LED_BLUE";
};
red_led: led_3 {
gpios = <&gpio0 31 0>;
label = "User LED_RED";
};
};
pwmleds {
compatible = "pwm-leds";
green_pwm_led: green_pwm_led {
pwms = <&sc_timer 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
label = "Green PWM LED";
status = "okay";
};
blue_pwm_led: blue_pwm_led {
pwms = <&sc_timer 6 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
label = "Blue PWM LED";
status = "okay";
};
red_pwm_led: red_pwm_led {
pwms = <&sc_timer 6 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
label = "Red PWM LED";
status = "disabled";
};
};
arduino_header: arduino-connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpio0 5 0>, /* A0 */
<1 0 &gpio0 6 0>, /* A1 */
<2 0 &gpio0 19 0>, /* A2 */
<3 0 &gpio0 20 0>, /* A3 */
<4 0 &gpio0 17 0>, /* A4 */
<5 0 &gpio0 18 0>, /* A5 */
<6 0 &gpio0 30 0>, /* D0 */
<7 0 &gpio0 29 0>, /* D1 */
<8 0 &gpio0 28 0>, /* D2 */
<9 0 &gpio0 27 0>, /* D3 */
<10 0 &gpio1 0 0>, /* D4 */
<11 0 &gpio1 10 0>, /* D5 */
<12 0 &gpio1 2 0>, /* D6 */
<13 0 &gpio1 8 0>, /* D7 */
<14 0 &gpio1 9 0>, /* D8 */
<15 0 &gpio1 7 0>, /* D9 */
<16 0 &gpio1 6 0>, /* D10 */
<17 0 &gpio1 5 0>, /* D11 */
<18 0 &gpio1 4 0>, /* D12 */
<19 0 &gpio1 3 0>, /* D13 */
<20 0 &gpio0 17 0>, /* D14 */
<21 0 &gpio0 18 0>; /* D15 */
};
};
/*
* RT600 EVK board uses OS timer as the kernel timer
* In case we need to switch to SYSTICK timer, then
* replace &os_timer with &systick
*/
&os_timer {
status = "okay";
wakeup-source;
};
&rtc {
status = "okay";
};
&flexcomm0 {
compatible = "nxp,lpc-usart";
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&pinmux_flexcomm0_usart>;
pinctrl-names = "default";
dmas = <&dma0 0>, <&dma0 1>;
dma-names = "rx", "tx";
};
arduino_i2c: &flexcomm2 {
compatible = "nxp,lpc-i2c";
status = "okay";
pinctrl-0 = <&pinmux_flexcomm2_i2c>;
pinctrl-names = "default";
clock-frequency = <I2C_BITRATE_FAST>;
#address-cells = <1>;
#size-cells = <0>;
fxos8700: fxos8700@1e {
compatible = "nxp,fxos8700";
reg = <0x1e>;
int1-gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
reset-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
};
};
arduino_serial: &flexcomm4 {
compatible = "nxp,lpc-usart";
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&pinmux_flexcomm4_usart>;
pinctrl-names = "default";
dmas = <&dma0 8>, <&dma0 9>;
dma-names = "rx", "tx";
};
arduino_spi: &flexcomm5 {
compatible = "nxp,lpc-spi";
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
dmas = <&dma0 10>, <&dma0 11>;
dma-names = "rx", "tx";
pinctrl-0 = <&pinmux_flexcomm5_spi>;
pinctrl-names = "default";
};
/* I2S receive channel */
i2s0: &flexcomm1 {
status = "okay";
compatible = "nxp,lpc-i2s";
#address-cells = <1>;
#size-cells = <0>;
dmas = <&dma0 2>;
dma-names = "rx";
pinctrl-0 = <&pinmux_flexcomm1_i2s>;
pinctrl-names = "default";
};
/* I2S transmit channel */
i2s1: &flexcomm3 {
status = "okay";
compatible = "nxp,lpc-i2s";
#address-cells = <1>;
#size-cells = <0>;
dmas = <&dma0 7>;
dma-names = "tx";
pinctrl-0 = <&pinmux_flexcomm3_i2s>;
pinctrl-names = "default";
};
/* PCA9420 PMIC */
&pmic_i2c {
status = "okay";
compatible = "nxp,lpc-i2c";
clock-frequency = <I2C_BITRATE_FAST>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&pinmux_pmic_i2c>;
pinctrl-names = "default";
pca9420: pca9420@61 {
compatible = "nxp,pca9420";
reg = <0x61>;
nxp,enable-modesel-pins;
buck1: BUCK1 {
regulator-boot-on;
};
buck2: BUCK2 {
regulator-boot-on;
};
ldo1: LDO1 {
regulator-boot-on;
};
ldo2: LDO2 {
regulator-boot-on;
};
};
};
&flexspi {
pinctrl-0 = <&pinmux_flexspi>;
pinctrl-names = "default";
status = "okay";
mx25um51345g: mx25um51345g@2 {
compatible = "nxp,imx-flexspi-mx25um51345g";
/* MX25UM51245G is 64MB, 512MBit flash part */
size = <DT_SIZE_M(64 * 8)>;
reg = <2>;
spi-max-frequency = <200000000>;
status = "okay";
jedec-id = [c2 81 3a];
erase-block-size = <4096>;
write-block-size = <16>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 DT_SIZE_K(128)>;
};
/* The MCUBoot swap-move algorithm uses the last 98 sectors
* of the primary slot0 for swap status and move.
*/
slot0_partition: partition@20000 {
label = "image-0";
reg = <0x00020000 (DT_SIZE_M(3) + DT_SIZE_K(98 * 4))>;
};
slot1_partition: partition@382000 {
label = "image-1";
reg = <0x00382000 DT_SIZE_M(3)>;
};
storage_partition: partition@682000 {
label = "storage";
reg = <0x00682000 (DT_SIZE_M(58) - DT_SIZE_K(520))>;
};
};
};
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&gpio2 {
status = "okay";
};
&dma0 {
status = "okay";
};
&wwdt0 {
status = "okay";
};
&user_button_1 {
status = "okay";
};
&user_button_2 {
status = "okay";
};
&green_led {
status = "okay";
};
&blue_led {
status = "okay";
};
&red_led {
status = "okay";
};
&sc_timer {
status = "okay";
pinctrl-0 = <&pinmux_sctimer>;
pinctrl-names = "default";
};
&usdhc0 {
status = "okay";
/* Quick fix for 1.8V SD cards on RT600- disable 1.8V negotiation */
no-1-8-v;
pwr-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
cd-gpios = <&gpio2 9 GPIO_ACTIVE_LOW>;
sdmmc {
compatible = "zephyr,sdmmc-disk";
status = "okay";
};
pinctrl-0 = <&pinmux_usdhc>;
pinctrl-names = "default";
};
&lpadc0 {
status = "okay";
pinctrl-0 = <&pinmux_lpadc0>;
pinctrl-names = "default";
};
zephyr_udc0: &usbhs {
status = "okay";
phy_handle = <&usbphy>;
};
&usbphy {
status = "okay";
tx-d-cal = <12>;
tx-cal-45-dp-ohms = <6>;
tx-cal-45-dm-ohms = <6>;
};
&ctimer0 {
status = "okay";
};
&ctimer1 {
status = "okay";
};
&ctimer2 {
status = "okay";
};
&ctimer3 {
status = "okay";
};
&ctimer4 {
status = "okay";
};
&i3c0 {
pinctrl-0 = <&pinmux_i3c>;
pinctrl-names = "default";
status = "okay";
};
/* Disable this node if not using USB and need another MPU region */
&sram1 {
status = "okay";
};
``` | /content/code_sandbox/boards/nxp/mimxrt685_evk/mimxrt685_evk_mimxrt685s_cm33.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,966 |
```yaml
board:
name: mimxrt685_evk
vendor: nxp
socs:
- name: mimxrt685s
``` | /content/code_sandbox/boards/nxp/mimxrt685_evk/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 33 |
```unknown
# MIMXRT685-EVK board
if BOARD_MIMXRT685_EVK_MIMXRT685S_CM33
config NXP_IMXRT_BOOT_HEADER
default y if !BOOTLOADER_MCUBOOT
config XTAL_SYS_CLK_HZ
default 24000000
config SYSOSC_SETTLING_US
default 260
choice FLASH_MCUX_FLEXSPI_MX25UM51345G_OPI_MODE
default FLASH_MCUX_FLEXSPI_MX25UM51345G_OPI_STR
endchoice
choice FLASH_MCUX_FLEXSPI_XIP_MEM_TARGET
default FLASH_MCUX_FLEXSPI_XIP_MEM_SRAM
endchoice
config FXOS8700_DRDY_INT1
default y
depends on FXOS8700_TRIGGER
endif # BOARD_MIMXRT685_EVK_MIMXRT685S_CM33
``` | /content/code_sandbox/boards/nxp/mimxrt685_evk/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 183 |
```unknown
config BOARD_INIT_PRIORITY
int "Board initialization priority"
default 45
help
Board initialization priority.
``` | /content/code_sandbox/boards/nxp/mimxrt685_evk/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 24 |
```unknown
/*
* NOTE: File generated by gen_board_pinctrl.py
* from MIMXRT685-EVK.mex
*
*/
#include <nxp/nxp_imx/rt/MIMXRT685SFVKB-pinctrl.h>
&pinctrl {
pinmux_flexcomm0_usart: pinmux_flexcomm0_usart {
group0 {
pinmux = <FC0_RXD_SDA_MOSI_DATA_PIO0_2>;
input-enable;
slew-rate = "normal";
drive-strength = "normal";
};
group1 {
pinmux = <FC0_TXD_SCL_MISO_WS_PIO0_1>;
slew-rate = "normal";
drive-strength = "normal";
};
};
pinmux_flexcomm1_i2s: pinmux_flexcomm1_i2s {
group0 {
pinmux = <FC1_RXD_SDA_MOSI_DATA_PIO0_9>;
input-enable;
slew-rate = "normal";
drive-strength = "high";
};
};
pinmux_flexcomm2_i2c: pinmux_flexcomm2_i2c {
group0 {
pinmux = <FC2_CTS_SDA_SSEL0_PIO0_17>,
<FC2_RTS_SCL_SSEL1_PIO0_18>;
bias-pull-up;
input-enable;
slew-rate = "normal";
drive-strength = "high";
drive-open-drain;
};
};
pinmux_flexcomm3_i2s: pinmux_flexcomm3_i2s {
group0 {
pinmux = <FC3_RXD_SDA_MOSI_DATA_PIO0_23>,
<FC3_TXD_SCL_MISO_WS_PIO0_22>,
<FC3_SCK_PIO0_21>;
input-enable;
slew-rate = "normal";
drive-strength = "high";
};
};
pinmux_flexcomm4_usart: pinmux_flexcomm4_usart {
group0 {
pinmux = <FC4_RXD_SDA_MOSI_DATA_PIO0_30>;
input-enable;
slew-rate = "normal";
drive-strength = "normal";
};
group1 {
pinmux = <FC4_TXD_SCL_MISO_WS_PIO0_29>;
slew-rate = "normal";
drive-strength = "normal";
};
};
pinmux_flexcomm5_spi: pinmux_flexcomm5_spi {
group0 {
pinmux = <FC5_SCK_PIO1_3>,
<FC5_TXD_SCL_MISO_WS_PIO1_4>,
<FC5_RXD_SDA_MOSI_DATA_PIO1_5>,
<FC5_CTS_SDA_SSEL0_PIO1_6>;
input-enable;
slew-rate = "normal";
drive-strength = "normal";
};
};
pinmux_flexspi: pinmux_flexspi {
group0 {
pinmux = <FLEXSPI0B_DATA0_PIO1_11>,
<FLEXSPI0B_DATA1_PIO1_12>,
<FLEXSPI0B_DATA2_PIO1_13>,
<FLEXSPI0B_DATA3_PIO1_14>,
<FLEXSPI0B_SCLK_PIO1_29>,
<FLEXSPI0B_DATA4_PIO2_17>,
<FLEXSPI0B_DATA5_PIO2_18>,
<FLEXSPI0B_SS0_N_PIO2_19>,
<FLEXSPI0B_DATA6_PIO2_22>,
<FLEXSPI0B_DATA7_PIO2_23>;
input-enable;
slew-rate = "normal";
drive-strength = "high";
};
group1 {
pinmux = <GPIO_PIO212_PIO2_12>;
slew-rate = "normal";
drive-strength = "normal";
};
};
/*
* The current test and sample applications uses a single channel for
* testing so we only need to enable the pin for that single use.
*
* If your application requires more then the mappings are as follows
* for the rt685_evk:
*
* +---------+------+---------+-------+
* | Port# | ADC |Schematic|Arduino|
* | pin | Chn# | |header |
* +---------+------+---------+-------+
* | PIO0_5 | CH0A | ADC0_0 | J30.1 |
* +---------+------+---------+-------+
* | PIO0_6 | CH0B | ADC0_8 | J30.2 |
* +---------+------+---------+-------+
* | PIO0_12 | CH1A | ADC0_1 | |
* +---------+------+---------+-------+
* | PIO0_13 | CH1B | ADC0_9 | |
* +---------+------+---------+-------+
* | PIO0_19 | CH2A | ADC0_2 | J30.3 |
* +---------+------+---------+-------+
* | PIO0_20 | CH2B | ADC0_10 | J30.4 |
* +---------+------+---------+-------+
* | PIO0_26 | CH3A | ADC0_3 | |
* +---------+------+---------+-------+
* | PIO0_27 | CH3B | ADC0_11 | |
* +---------+------+---------+-------+
* | PIO1_8 | CH4A | ADC0_4 | |
* +---------+------+---------+-------+
* | PIO1_9 | CH4B | ADC0_12 | |
* +---------+------+---------+-------+
* | PIO3_23 | CH5A | ADC0_5 | |
* +---------+------+---------+-------+
* | PIO3_24 | CH5B | ADC0_13 | |
* +---------+------+---------+-------+
*
* Per the mimxrt6xx reference manual, The channels 0-5 are analong input.
* Optionally, channels 0A through 5A can be paired with channels 0B
* through 5B for differential input on their respective ADC channel.
*
*/
pinmux_lpadc0: pinmux_lpadc0 {
group0 {
pinmux = <ADC0_CH0_PIO0_5>,
<ADC0_CH8_PIO0_6>;
slew-rate = "normal";
drive-strength = "normal";
nxp,analog-mode;
};
};
pinmux_pmic_i2c: pinmux_pmic_i2c {
group0 {
pinmux = <PMIC_I2C_SCL>,
<PMIC_I2C_SDA>;
bias-pull-up;
input-enable;
slew-rate = "normal";
drive-strength = "normal";
drive-open-drain;
};
};
pinmux_sctimer: pinmux_sctimer {
group0 {
pinmux = <SCT0_OUT7_PIO0_27>,
<SCT0_OUT0_PIO0_14>,
<SCT0_OUT6_PIO0_26>,
<SCT0_OUT6_PIO0_31>;
slew-rate = "normal";
drive-strength = "normal";
};
};
pinmux_usdhc: pinmux_usdhc {
group0 {
pinmux = <SD0_CMD_PIO1_31>,
<USDHC0_USDHC_DATA0_PIO2_0>,
<USDHC0_USDHC_DATA1_PIO2_1>,
<USDHC0_USDHC_DATA2_PIO2_2>,
<USDHC0_USDHC_DATA3_PIO2_3>,
<GPIO_PIO29_PIO2_9>;
bias-pull-up;
input-enable;
slew-rate = "normal";
drive-strength = "normal";
};
group1 {
pinmux = <SD0_CLK_PIO1_30>;
input-enable;
slew-rate = "normal";
drive-strength = "normal";
};
group2 {
pinmux = <GPIO_PIO210_PIO2_10>,
<GPIO_PIO24_PIO2_4>;
slew-rate = "normal";
drive-strength = "normal";
};
};
pinmux_i3c: pinmux_i3c {
group0 {
pinmux = <I3C0_SCL_PIO2_29>,
<I3C0_SDA_PIO2_30>;
input-enable;
slew-rate = "slow";
drive-strength = "high";
};
group1 {
pinmux = <I3C0_PUR_PIO2_31>;
slew-rate = "normal";
drive-strength = "normal";
};
};
pinmux_ctimer2_pwm: pinmux_ctimer2_pwm {
group0 {
pinmux = <CTIMER2_MATCH0_PIO0_14>;
slew-rate = "normal";
drive-strength = "normal";
};
};
};
``` | /content/code_sandbox/boards/nxp/mimxrt685_evk/mimxrt685_evk-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,141 |
```yaml
identifier: frdm_k82f
name: NXP FRDM-K82F
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 192
flash: 256
supported:
- adc
- arduino_gpio
- arduino_i2c
- arduino_spi
- counter
- dma
- gpio
- i2c
- nvs
- pwm
- spi
- usb_device
- watchdog
vendor: nxp
``` | /content/code_sandbox/boards/nxp/frdm_k82f/frdm_k82f.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 130 |
```unknown
CONFIG_SERIAL=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_UART_INTERRUPT_DRIVEN=y
CONFIG_PINCTRL=y
CONFIG_GPIO=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=120000000
CONFIG_OSC_LOW_POWER=y
# Enable MPU
CONFIG_ARM_MPU=y
CONFIG_HW_STACK_PROTECTION=y
``` | /content/code_sandbox/boards/nxp/frdm_k82f/frdm_k82f_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 69 |
```cmake
board_runner_args(jlink "--device=MK82FN256xxx15")
board_runner_args(pyocd "--target=k82f25615")
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
``` | /content/code_sandbox/boards/nxp/frdm_k82f/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 81 |
```unknown
/*
* NOTE: Autogenerated file by gen_board_pinctrl.py
* for MK82FN256VLL15/signal_configuration.xml
*
*/
#include <nxp/kinetis/MK82FN256VLL15-pinctrl.h>
&pinctrl {
adc0_default: adc0_default {
group0 {
pinmux = <ADC0_SE15_PTC1>;
drive-strength = "low";
slew-rate = "fast";
};
};
ftm3_default: ftm3_default {
group0 {
pinmux = <FTM3_CH4_PTC8>,
<FTM3_CH5_PTC9>,
<FTM3_CH6_PTC10>;
drive-strength = "low";
slew-rate = "fast";
};
};
i2c0_default: i2c0_default {
group0 {
pinmux = <I2C0_SCL_PTB2>,
<I2C0_SDA_PTB3>;
drive-strength = "low";
drive-open-drain;
slew-rate = "fast";
};
};
i2c3_default: i2c3_default {
group0 {
pinmux = <I2C3_SCL_PTA2>,
<I2C3_SDA_PTA1>;
drive-strength = "low";
drive-open-drain;
bias-pull-up;
slew-rate = "fast";
};
};
lpuart0_default: lpuart0_default {
group0 {
pinmux = <LPUART0_RX_PTB16>,
<LPUART0_TX_PTB17>;
drive-strength = "low";
slew-rate = "fast";
};
};
lpuart4_default: lpuart4_default {
group0 {
pinmux = <LPUART4_RX_PTC14>,
<LPUART4_TX_PTC15>;
drive-strength = "low";
slew-rate = "fast";
};
};
spi0_default: spi0_default {
group0 {
pinmux = <SPI0_SCK_PTD1>,
<SPI0_SOUT_PTD2>,
<SPI0_SIN_PTD3>,
<SPI0_PCS1_PTD4>;
drive-strength = "low";
slew-rate = "fast";
};
};
spi1_default: spi1_default {
group0 {
pinmux = <SPI1_SCK_PTE1>,
<SPI1_SOUT_PTE2>,
<SPI1_SIN_PTE4>,
<SPI1_PCS0_PTE5>;
drive-strength = "low";
slew-rate = "fast";
};
};
};
``` | /content/code_sandbox/boards/nxp/frdm_k82f/frdm_k82f-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 627 |
```unknown
config BOARD_FRDM_K82F
select SOC_MK82F25615
select SOC_PART_NUMBER_MK82FN256VLL15
``` | /content/code_sandbox/boards/nxp/frdm_k82f/Kconfig.frdm_k82f | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```yaml
board:
name: frdm_k82f
vendor: nxp
socs:
- name: mk82f25615
``` | /content/code_sandbox/boards/nxp/frdm_k82f/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```unknown
/*
*
*/
/dts-v1/;
#include <mem.h>
#include <nxp/nxp_k82fn256vxx15.dtsi>
#include <zephyr/dt-bindings/pwm/pwm.h>
#include "frdm_k82f-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "NXP Kinetis K82 Freedom Board";
compatible = "nxp,mk82f25615", "nxp,k82f", "nxp,k8x";
aliases {
led0 = &red_led;
led1 = &green_led;
led2 = &blue_led;
pwm-led0 = &red_pwm_led;
pwm-led1 = &green_pwm_led;
pwm-led2 = &blue_pwm_led;
sw0 = &user_button_0;
sw1 = &user_button_1;
magn0 = &fxos8700;
accel0 = &fxos8700;
};
chosen {
/*
* Note: when using DMA, the SRAM region must be set to
* a memory region that is not cached by the chip. If the chosen
* sram region is changed and DMA is in use, you will
* encounter issues!
*/
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,console = &lpuart4;
zephyr,shell-uart = &lpuart4;
zephyr,uart-pipe = &lpuart4;
};
leds {
compatible = "gpio-leds";
red_led: led_0 {
gpios = <&gpioc 8 0>;
label = "User LED D3 Red";
};
green_led: led_1 {
gpios = <&gpioc 9 0>;
label = "User LED D3 Green";
};
blue_led: led_2 {
gpios = <&gpioc 10 0>;
label = "User LED D3 Blue";
};
};
pwmleds {
compatible = "pwm-leds";
red_pwm_led: red_pwm_led {
pwms = <&ftm3 4 15625000 PWM_POLARITY_INVERTED>;
};
green_pwm_led: green_pwm_led {
pwms = <&ftm3 5 15625000 PWM_POLARITY_INVERTED>;
};
blue_pwm_led: blue_pwm_led {
pwms = <&ftm3 6 15625000 PWM_POLARITY_INVERTED>;
};
};
gpio_keys {
compatible = "gpio-keys";
user_button_0: button_0 {
label = "User SW2";
gpios = <&gpioa 4 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_0>;
};
user_button_1: button_1 {
label = "User SW3";
gpios = <&gpioc 6 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_1>;
};
};
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpiob 0 0>, /* A0 */
<1 0 &gpiob 1 0>, /* A1 */
<2 0 &gpioc 1 0>, /* A2 */
<3 0 &gpioc 2 0>, /* A3 */
<4 0 &gpiob 3 0>, /* A4 */
<5 0 &gpiob 2 0>, /* A5 */
<6 0 &gpiob 16 0>, /* D0 */
<7 0 &gpiob 17 0>, /* D1 */
<8 0 &gpioc 12 0>, /* D2 */
<9 0 &gpiod 0 0>, /* D3 */
<10 0 &gpioc 11 0>, /* D4 */
<11 0 &gpioc 10 0>, /* D5 */
<12 0 &gpioc 8 0>, /* D6 */
<13 0 &gpioc 9 0>, /* D7 */
<14 0 &gpioc 3 0>, /* D8 */
<15 0 &gpioc 5 0>, /* D9 */
<16 0 &gpiod 4 0>, /* D10 */
<17 0 &gpiod 2 0>, /* D11 */
<18 0 &gpiod 3 0>, /* D12 */
<19 0 &gpiod 1 0>, /* D13 */
<20 0 &gpioa 1 0>, /* D14 */
<21 0 &gpioa 2 0>; /* D15 */
};
};
&sim {
pllfll-select = <KINETIS_SIM_PLLFLLSEL_MCGPLLCLK>;
er32k-select = <KINETIS_SIM_ER32KSEL_OSC32KCLK>;
};
&adc0 {
status = "okay";
pinctrl-0 = <&adc0_default>;
pinctrl-names = "default";
};
&gpioa {
status = "okay";
};
&gpiob {
status = "okay";
};
&gpioc {
status = "okay";
};
&gpiod {
status = "okay";
};
&gpioe {
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x0 DT_SIZE_K(44)>;
};
/* The MCUBoot swap-move algorithm uses the last 2 sectors
* of the primary slot0 for swap status and move.
*/
slot0_partition: partition@b000 {
label = "image-0";
reg = <0xb000 (DT_SIZE_K(96) + DT_SIZE_K(8))>;
};
slot1_partition: partition@25000 {
label = "image-1";
reg = <0x25000 DT_SIZE_K(96)>;
};
storage_partition: partition@3d000 {
label = "storage";
reg = <0x3d000 DT_SIZE_K(12)>;
};
};
};
&i2c3 {
status = "okay";
pinctrl-0 = <&i2c3_default>;
pinctrl-names = "default";
fxos8700: fxos8700@1c {
compatible = "nxp,fxos8700";
reg = <0x1c>;
int1-gpios = <&gpioc 13 GPIO_ACTIVE_LOW>;
};
};
&lpuart4 {
status = "okay";
pinctrl-0 = <&lpuart4_default>;
pinctrl-names = "default";
current-speed = <115200>;
};
&lpuart0 {
pinctrl-0 = <&lpuart0_default>;
pinctrl-names = "default";
};
&ftm3 {
status = "okay";
compatible = "nxp,kinetis-ftm-pwm";
#pwm-cells = <3>;
pinctrl-0 = <&ftm3_default>;
pinctrl-names = "default";
clock-source = "fixed";
};
&spi1 {
status = "okay";
pinctrl-0 = <&spi1_default>;
pinctrl-names = "default";
mx25u32: mx25u3235f@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <104000000>;
wp-gpios = <&gpioe 3 0>;
reset-gpios = <&gpioe 0 0>;
size = <0x2000000>;
jedec-id = [c2 25 36];
};
};
zephyr_udc0: &usbotg {
status = "okay";
};
&edma0 {
status = "okay";
};
&adc0 {
status = "okay";
};
&pit0 {
status = "okay";
};
arduino_i2c: &i2c0 {
status = "okay";
pinctrl-0 = <&i2c0_default>;
pinctrl-names = "default";
};
arduino_spi: &spi0 {
status = "okay";
pinctrl-0 = <&spi0_default>;
pinctrl-names = "default";
};
``` | /content/code_sandbox/boards/nxp/frdm_k82f/frdm_k82f.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,023 |
```unknown
# FRDM-K82F board
if BOARD_FRDM_K82F
config OSC_XTAL0_FREQ
default 12000000
config MCG_PRDIV0
default 0x0
config MCG_VDIV0
default 0x4
config MCG_FCRDIV
default 1
config FXOS8700_DRDY_INT1
default y
depends on FXOS8700_TRIGGER
endif # BOARD_FRDM_K82F
``` | /content/code_sandbox/boards/nxp/frdm_k82f/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 99 |
```restructuredtext
.. _mimxrt685_evk:
NXP MIMXRT685-EVK
##################
Overview
********
The i.MX RT600 is a crossover MCU family optimized for 32-bit immersive audio
playback and voice user interface applications combining a high-performance
Cadence Tensilica HiFi 4 audio DSP core with a next-generation Cortex-M33
core. The i.MX RT600 family of crossover MCUs is designed to unlock the
potential of voice-assisted end nodes with a secure, power-optimized embedded
processor.
The i.MX RT600 family provides up to 4.5MB of on-chip SRAM and several
high-bandwidth interfaces to access off-chip flash, including an Octal/Quad SPI
interface with an on-the-fly decryption engine.
.. image:: mimxrt685_evk.jpg
:align: center
:alt: MIMXRT685-EVK
Hardware
********
- MIMXRT685SFVKB Cortex-M33 (300 MHz, 128 KB TCM) core processor with Cadence Xtensa HiFi4 DSP
- Onboard, high-speed USB, Link2 debug probe with CMSIS-DAP protocol (supporting Cortex M33 debug only)
- High speed USB port with micro A/B connector for the host or device functionality
- UART, I2C and SPI port bridging from i.MX RT685 target to USB via the on-board debug probe
- 512 MB Macronix Octal SPI Flash operating at 1.8 V
- 4.5 MB Apmemory PSRAM
- Full size SD card slot (SDIO)
- NXP PCA9420UK PMIC
- User LEDs
- Reset and User buttons
- Arduino and PMod/Host expansion connectors
- NXP FXOS8700CQ accelerometer
- Stereo audio codec with line in/out and electret microphone
- Stereo NXP TFA9894 digital amplifiers, with option for external +5V power for higher performance speakers
- Support for up to eight off-board digital microphones via 12-pin header
- Two on-board DMICS
For more information about the MIMXRT685 SoC and MIMXRT685-EVK board, see
these references:
- `i.MX RT685 Website`_
- `i.MX RT685 Datasheet`_
- `i.MX RT685 Reference Manual`_
- `MIMXRT685-EVK Website`_
- `MIMXRT685-EVK User Guide`_
- `MIMXRT685-EVK Schematics`_
Supported Features
==================
NXP considers the MIMXRT685-EVK as a superset board for the i.MX RT6xx
family of MCUs. This board is a focus for NXP's Full Platform Support for
Zephyr, to better enable the entire RT6xx family. NXP prioritizes enabling
this board with new support for Zephyr features. The mimxrt685_evk board
configuration supports the hardware features below. Another very similar
board is the :ref:`mimxrt595_evk`, and that board may have additional features
already supported, which can also be re-used on this mimxrt685_evk board:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+-------------------------------------+
| OS_TIMER | on-chip | os timer |
+-----------+------------+-------------------------------------+
| IOCON | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| FLASH | on-chip | OctalSPI Flash |
+-----------+------------+-------------------------------------+
| USART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| I2S | on-chip | i2s |
+-----------+------------+-------------------------------------+
| CLOCK | on-chip | clock_control |
+-----------+------------+-------------------------------------+
| HWINFO | on-chip | Unique device serial number |
+-----------+------------+-------------------------------------+
| RTC | on-chip | counter |
+-----------+------------+-------------------------------------+
| PWM | on-chip | pwm |
+-----------+------------+-------------------------------------+
| WDT | on-chip | watchdog |
+-----------+------------+-------------------------------------+
| SDHC | on-chip | disk access |
+-----------+------------+-------------------------------------+
| USB | on-chip | USB device |
+-----------+------------+-------------------------------------+
| ADC | on-chip | adc |
+-----------+------------+-------------------------------------+
| CTIMER | on-chip | counter |
+-----------+------------+-------------------------------------+
| TRNG | on-chip | entropy |
+-----------+------------+-------------------------------------+
| FLEXSPI | on-chip | flash programming |
+-----------+------------+-------------------------------------+
The default configuration can be found in
:zephyr_file:`boards/nxp/mimxrt685_evk/mimxrt685_evk_mimxrt685s_cm33_defconfig`
Other hardware features are not currently supported by the port.
Connections and IOs
===================
The MIMXRT685 SoC has IOCON registers, which can be used to configure the
functionality of a pin.
+---------+-----------------+----------------------------+
| Name | Function | Usage |
+=========+=================+============================+
| PIO0_2 | USART | USART RX |
+---------+-----------------+----------------------------+
| PIO0_1 | USART | USART TX |
+---------+-----------------+----------------------------+
| PIO0_14 | GPIO | GREEN LED |
+---------+-----------------+----------------------------+
| PIO1_1 | GPIO | SW0 |
+---------+-----------------+----------------------------+
| PIO0_17 | I2C | I2C SDA |
+---------+-----------------+----------------------------+
| PIO0_18 | I2C | I2C SCL |
+---------+-----------------+----------------------------+
| PIO1_5 | GPIO | FXOS8700 TRIGGER |
+---------+-----------------+----------------------------+
| PIO1_5 | SPI | SPI MOSI |
+---------+-----------------+----------------------------+
| PIO1_4 | SPI | SPI MISO |
+---------+-----------------+----------------------------+
| PIO1_3 | SPI | SPI SCK |
+---------+-----------------+----------------------------+
| PIO1_6 | SPI | SPI SSEL |
+---------+-----------------+----------------------------+
| PIO0_23 | I2S | I2S DATAOUT |
+---------+-----------------+----------------------------+
| PIO0_22 | I2S | I2S TX WS |
+---------+-----------------+----------------------------+
| PIO0_21 | I2S | I2S TX SCK |
+---------+-----------------+----------------------------+
| PIO0_9 | I2S | I2S DATAIN |
+---------+-----------------+----------------------------+
| PIO0_29 | USART | USART TX |
+---------+-----------------+----------------------------+
| PIO0_30 | USART | USART RX |
+---------+-----------------+----------------------------+
| PIO1_11 | FLEXSPI0B_DATA0 | OctalSPI Flash |
+---------+-----------------+----------------------------+
| PIO1_12 | FLEXSPI0B_DATA1 | OctalSPI Flash |
+---------+-----------------+----------------------------+
| PIO1_13 | FLEXSPI0B_DATA2 | OctalSPI Flash |
+---------+-----------------+----------------------------+
| PIO1_14 | FLEXSPI0B_DATA3 | OctalSPI Flash |
+---------+-----------------+----------------------------+
| PIO1_29 | FLEXSPI0B_SCLK | OctalSPI Flash |
+---------+-----------------+----------------------------+
| PIO2_12 | PIO2_12 | OctalSPI Flash |
+---------+-----------------+----------------------------+
| PIO2_17 | FLEXSPI0B_DATA4 | OctalSPI Flash |
+---------+-----------------+----------------------------+
| PIO2_18 | FLEXSPI0B_DATA5 | OctalSPI Flash |
+---------+-----------------+----------------------------+
| PIO2_19 | FLEXSPI0B_SS0_N | OctalSPI Flash |
+---------+-----------------+----------------------------+
| PIO2_22 | FLEXSPI0B_DATA6 | OctalSPI Flash |
+---------+-----------------+----------------------------+
| PIO2_23 | FLEXSPI0B_DATA7 | OctalSPI Flash |
+---------+-----------------+----------------------------+
| PIO0_27 | SCT0_OUT7 | PWM |
+---------+-----------------+----------------------------+
| PIO1_30 | SD0_CLK | SD card |
+---------+-----------------+----------------------------+
| PIO1_31 | SD0_CMD | SD card |
+---------+-----------------+----------------------------+
| PIO2_0 | SD0_D0 | SD card |
+---------+-----------------+----------------------------+
| PIO2_1 | SD0_D1 | SD card |
+---------+-----------------+----------------------------+
| PIO2_2 | SD0_D2 | SD card |
+---------+-----------------+----------------------------+
| PIO2_3 | SD0_D3 | SD card |
+---------+-----------------+----------------------------+
| PIO2_4 | SD0_WR_PRT | SD card |
+---------+-----------------+----------------------------+
| PIO2_9 | SD0_CD | SD card |
+---------+-----------------+----------------------------+
| PIO2_10 | SD0_RST | SD card |
+---------+-----------------+----------------------------+
System Clock
============
The MIMXRT685 EVK is configured to use the OS Event timer
as a source for the system clock.
Serial Port
===========
The MIMXRT685 SoC has 8 FLEXCOMM interfaces for serial communication. One is
configured as USART for the console and the remaining are not used.
Programming and Debugging
*************************
Build and flash applications as usual (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Configuring a Debug Probe
=========================
A debug probe is used for both flashing and debugging the board. This board is
configured by default to use the LPC-Link2.
.. tabs::
.. group-tab:: LinkServer CMSIS-DAP
1. Install the :ref:`linkserver-debug-host-tools` and make sure they are in your
search path. LinkServer works with the default CMSIS-DAP firmware included in
the on-board debugger.
2. Make sure the jumpers JP17, JP18 and JP19 are installed.
linkserver is the default runner for this board
.. code-block:: console
west flash
west debug
.. group-tab:: LPCLink2 JLink Onboard
1. Install the :ref:`jlink-debug-host-tools` and make sure they are in your search path.
2. To connect the SWD signals to onboard debug circuit, install jumpers JP17, JP18 and JP19,
if not already done (these jumpers are installed by default).
3. Follow the instructions in :ref:`lpclink2-jlink-onboard-debug-probe` to program the
J-Link firmware. Please make sure you have the latest firmware for this board.
.. code-block:: console
west flash -r jlink
west debug -r jlink
.. group-tab:: JLink External
1. Install the :ref:`jlink-debug-host-tools` and make sure they are in your search path.
2. To disconnect the SWD signals from onboard debug circuit, **remove** jumpers J17, J18,
and J19 (these are installed by default).
3. Connect the J-Link probe to J2 10-pin header.
See :ref:`jlink-external-debug-probe` for more information.
.. code-block:: console
west flash -r jlink
west debug -r jlink
Configuring a Console
=====================
Connect a USB cable from your PC to J16, and use the serial terminal of your choice
(minicom, putty, etc.) with the following settings:
- Speed: 115200
- Data: 8 bits
- Parity: None
- Stop bits: 1
Flashing
========
Here is an example for the :ref:`hello_world` application. This example uses the
:ref:`linkserver-debug-host-tools` as default.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: mimxrt685_evk/mimxrt685s/cm33
:goals: flash
Open a serial terminal, reset the board (press the RESET button), and you should
see the following message in the terminal:
.. code-block:: console
***** Booting Zephyr OS v1.14.0 *****
Hello World! mimxrt685_evk
Debugging
=========
Here is an example for the :ref:`hello_world` application. This example uses the
:ref:`linkserver-debug-host-tools` as default.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: mimxrt685_evk/mimxrt685s/cm33
:goals: debug
Open a serial terminal, step through the application in your debugger, and you
should see the following message in the terminal:
.. code-block:: console
***** Booting Zephyr OS zephyr-v2.3.0 *****
Hello World! mimxrt685_evk
Troubleshooting
===============
If the debug probe fails to connect with the following error, it's possible
that the image in flash is interfering and causing this issue.
.. code-block:: console
Remote debugging using :2331
Remote communication error. Target disconnected.: Connection reset by peer.
"monitor" command not supported by this target.
"monitor" command not supported by this target.
You can't do that when your target is `exec'
(gdb) Could not connect to target.
Please check power, connection and settings.
You can fix it by erasing and reprogramming the flash with the following
steps:
#. Set the SW5 DIP switches to ON-ON-ON to prevent booting from flash.
#. Reset by pressing SW3
#. Run ``west debug`` or ``west flash`` again with a known working Zephyr
application (example "Hello World").
#. Set the SW5 DIP switches to ON-OFF-ON to boot from flash.
#. Reset by pressing SW3
.. _MIMXRT685-EVK Website:
path_to_url
.. _MIMXRT685-EVK User Guide:
path_to_url
.. _MIMXRT685-EVK Schematics:
path_to_url
.. _i.MX RT685 Website:
path_to_url
.. _i.MX RT685 Datasheet:
path_to_url
.. _i.MX RT685 Reference Manual:
path_to_url
``` | /content/code_sandbox/boards/nxp/mimxrt685_evk/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 3,451 |
```unknown
#
config BOARD_LPCXPRESSO51U68
select SOC_LPC51U68
select SOC_PART_NUMBER_LPC51U68JBD64
``` | /content/code_sandbox/boards/nxp/lpcxpresso51u68/Kconfig.lpcxpresso51u68 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 34 |
```cmake
#
#
#
board_runner_args(jlink "--device=LPC51U68JBD64" "--reset-after-load")
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/nxp/lpcxpresso51u68/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 41 |
```yaml
#
#
#
identifier: lpcxpresso51u68
name: NXP LPCXpresso51u68
type: mcu
arch: arm
ram: 64
flash: 256
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- counter
- gpio
- i2c
- spi
vendor: nxp
``` | /content/code_sandbox/boards/nxp/lpcxpresso51u68/lpcxpresso51u68.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 90 |
```unknown
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
CONFIG_GPIO=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=12000000
``` | /content/code_sandbox/boards/nxp/lpcxpresso51u68/lpcxpresso51u68_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 39 |
```unknown
/*
*
*/
/dts-v1/;
#include <nxp/nxp_lpc51u68.dtsi>
#include "lpcxpresso51u68-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "NXP LPCXPRESSO51U68 board";
compatible = "nxp,lpc51xxx","nxp,lpc";
chosen {
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,console = &flexcomm0;
zephyr,shell-uart = &flexcomm0;
};
aliases {
led0 = &blue_led;
led1 = &green_led;
led2 = &red_led;
sw0 = &btn_wk;
sw1 = &isp0_button;
sw2 = &isp1_button;
usart-0 = &flexcomm0;
};
leds {
compatible = "gpio-leds";
blue_led: led_0 {
gpios = <&gpio1 9 0>;
label = "Blue LED";
};
green_led: led_1 {
gpios = <&gpio1 10 0>;
label = "Green LED";
};
red_led: led_2 {
gpios = <&gpio0 29 0>;
label = "Red LED";
};
};
gpio-keys {
compatible = "gpio-keys";
btn_wk: button_0 {
label = "Wakeup button";
gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_WAKEUP>;
};
isp0_button: button_1 {
label = "ISP0 button";
gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_0>;
};
isp1_button: button_2 {
label = "ISP1 button";
gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_1>;
};
};
};
&flexcomm0 {
status = "okay";
compatible = "nxp,lpc-usart";
current-speed = <115200>;
pinctrl-0 = <&pinmux_flexcomm0_uart>;
pinctrl-names = "default";
};
&flexcomm4 {
status = "okay";
compatible = "nxp,lpc-i2c";
clock-frequency = <I2C_BITRATE_STANDARD>;
pinctrl-0 = <&pinmux_flexcomm4_i2c>;
pinctrl-names = "default";
#address-cells = <1>;
#size-cells = <0>;
};
&flexcomm5 {
status = "okay";
compatible = "nxp,lpc-spi";
pinctrl-0 = <&pinmux_flexcomm5_spi>;
pinctrl-names = "default";
#address-cells = <1>;
#size-cells = <0>;
};
``` | /content/code_sandbox/boards/nxp/lpcxpresso51u68/lpcxpresso51u68.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 676 |
```yaml
board:
name: lpcxpresso51u68
vendor: nxp
socs:
- name: lpc51u68
``` | /content/code_sandbox/boards/nxp/lpcxpresso51u68/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 34 |
```restructuredtext
.. _frdm_k82f:
NXP FRDM-K82F
##############
Overview
********
The FRDM-K82F is a low-cost development platform for Kinetis K80, K81,
and K82 MCUs.
- Form-factor compatible with the Arduino R3 pin layout
- Peripherals enable rapid prototyping, including a six-axis digital
accelerometer and magnetometer to create full eCompass capabilities, a
tri-colored LED and two user push-buttons for direct interaction, 2x32 Mb
QuadSPI external flash, FlexIO camera header, touchpads and headers for use
with Bluetooth and 2.4 GHz radio add-on modules
- OpenSDAv2.1, the NXP open source hardware embedded serial and debug adapter
running an open source bootloader, offers options for serial communication,
flash programming, and run-control debugging
.. image:: frdm_k82f.jpg
:align: center
:alt: FRDM-K82F
Hardware
********
- MK82FN256VLL15 MCU (150 MHz, 256 KB flash memory, 256 KB RAM, low-power,
crystal-less USB, and 100 Low profile Quad Flat Package (LQFP))
- Dual role USB interface with micro-B USB connector
- RGB LED
- FXOS8700CQ accelerometer and magnetometer
- Two user push buttons
- 2x 32 Mb QSPI flash
- Flexible power supply option - OpenSDAv2.1 USB, Kinetis K82 USB, and external source
- Easy access to MCU input/output through Arduino R3 compatible I/O connectors
- Programmable OpenSDAv2.1 debug circuit supporting the CMSIS-DAP Interface
software that provides:
- Mass storage device (MSD) flash programming interface
- CMSIS-DAP debug interface over a driver-less USB HID connection providing
run-control debugging and compatibility with IDE tools
- Virtual serial port interface
- Open source CMSIS-DAP software project
- FlexIO header
For more information about the K82F SoC and FRDM-K82F board:
- `K82F Website`_
- `K82F Datasheet`_
- `K82F Reference Manual`_
- `FRDM-K82F Website`_
- `FRDM-K82F User Guide`_
- `FRDM-K82F Schematics`_
Supported Features
==================
The frdm_k82f board configuration supports the hardware features listed
below. For additional features not yet supported, please also refer to the
:ref:`frdm_k64f`, which is the superset board in NXP's Kinetis K series.
NXP prioritizes enabling the superset board with NXP's Full Platform Support for
Zephyr. Therefore, the frdm_k64f board may have additional features
already supported, which can also be re-used on this frdm_k82f board:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| ADC | on-chip | adc |
+-----------+------------+-------------------------------------+
| FLASH | on-chip | soc flash |
+-----------+------------+-------------------------------------+
| FLASH | off-chip | QSPI flash |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| PWM | on-chip | pwm |
+-----------+------------+-------------------------------------+
| RTC | on-chip | rtc |
+-----------+------------+-------------------------------------+
| SENSOR | off-chip | fxos8700 polling; |
| | | fxos8700 trigger |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| USB | on-chip | USB device |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | watchdog |
+-----------+------------+-------------------------------------+
| TRNG | on-chip | entropy |
+-----------+------------+-------------------------------------+
| FTFA | on-chip | flash programming |
+-----------+------------+-------------------------------------+
| PIT | on-chip | pit |
+-----------+------------+-------------------------------------+
The default configuration can be found in
:zephyr_file:`boards/nxp/frdm_k82f/frdm_k82f_defconfig`
Other hardware features are not currently supported by the port.
System Clock
============
The K82F SoC is configured to use the 12 MHz external oscillator on the board
with the on-chip PLL to generate a 120 MHz system clock.
Serial Port
===========
The K82F SoC has five UARTs. One is configured for the console, the remaining
ones are not used.
USB
===
The K82F SoC has a USB OTG (USBOTG) controller that supports both
device and host functions through its micro USB connector (J11).
Only USB device function is supported in Zephyr at the moment.
Programming and Debugging
*************************
Build and flash applications as usual (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Configuring a Debug Probe
=========================
A debug probe is used for both flashing and debugging the board. This board is
configured by default to use the :ref:`opensda-daplink-onboard-debug-probe`.
Early versions of this board have an outdated version of the OpenSDA bootloader
and require an update. Please see the `DAPLink Bootloader Update`_ page for
instructions to update from the CMSIS-DAP bootloader to the DAPLink bootloader.
Option 1: :ref:`opensda-daplink-onboard-debug-probe` (Recommended)
your_sha256_hash--
Install the :ref:`pyocd-debug-host-tools` and make sure they are in your search
path.
Follow the instructions in :ref:`opensda-daplink-onboard-debug-probe` to program
the `OpenSDA DAPLink FRDM-K82F Firmware`_.
Option 2: :ref:`opensda-jlink-onboard-debug-probe`
--------------------------------------------------
Install the :ref:`jlink-debug-host-tools` and make sure they are in your search
path.
Follow the instructions in :ref:`opensda-jlink-onboard-debug-probe` to program
the `OpenSDA J-Link Firmware for FRDM-K82F`_.
Add the arguments ``-DBOARD_FLASH_RUNNER=jlink`` and
``-DBOARD_DEBUG_RUNNER=jlink`` when you invoke ``west build`` to override the
default runner from pyOCD to J-Link:
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: frdm_k82f
:gen-args: -DBOARD_FLASH_RUNNER=jlink -DBOARD_DEBUG_RUNNER=jlink
:goals: build
Configuring a Console
=====================
Regardless of your choice in debug probe, we will use the OpenSDA
microcontroller as a usb-to-serial adapter for the serial console.
Connect a USB cable from your PC to J5.
Use the following settings with your serial terminal of choice (minicom, putty,
etc.):
- Speed: 115200
- Data: 8 bits
- Parity: None
- Stop bits: 1
Flashing
========
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: frdm_k82f
:goals: flash
Open a serial terminal, reset the board (press the SW1 button), and you should
see the following message in the terminal:
.. code-block:: console
***** Booting Zephyr OS v1.14.0-xxx-gxxxxxxxxxxxx *****
Hello World! frdm_k82f
Debugging
=========
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: frdm_k82f
:goals: debug
Open a serial terminal, step through the application in your debugger, and you
should see the following message in the terminal:
.. code-block:: console
***** Booting Zephyr OS v1.14.0-xxx-gxxxxxxxxxxxx *****
Hello World! frdm_k82f
.. _FRDM-K82F Website:
path_to_url
.. _FRDM-K82F User Guide:
path_to_url
.. _FRDM-K82F Schematics:
path_to_url
.. _K82F Website:
path_to_url
.. _K82F Datasheet:
path_to_url
.. _K82F Reference Manual:
path_to_url
.. _DAPLink Bootloader Update:
path_to_url
.. _OpenSDA DAPLink FRDM-K82F Firmware:
path_to_url
.. _OpenSDA J-Link Firmware for FRDM-K82F:
path_to_url
``` | /content/code_sandbox/boards/nxp/frdm_k82f/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,110 |
```unknown
/*
* NOTE: File generated by gen_board_pinctrl.py
* from LPCXpresso51U68.mex
*/
#include <nxp/lpc/LPC51U68JBD64-pinctrl.h>
&pinctrl {
pinmux_flexcomm0_uart: pinmux_flexcomm0_uart {
group0 {
pinmux = <FC0_TXD_SCL_MISO_PIO0_1>,
<FC0_RXD_SDA_MOSI_PIO0_0>;
bias-pull-up;
slew-rate = "standard";
};
};
pinmux_flexcomm4_i2c: pinmux_flexcomm4_i2c {
group0 {
pinmux = <FC4_RTS_SCL_SSEL1_PIO0_25>,
<FC4_CTS_SDA_SSEL0_PIO0_26>;
};
};
pinmux_flexcomm5_spi: pinmux_flexcomm5_spi {
group0 {
pinmux = <FC5_SSEL3_PIO1_2>;
bias-pull-up;
};
group1 {
pinmux = <FC5_TXD_SCL_MISO_PIO0_18>,
<FC5_SCK_PIO0_19>,
<FC5_RXD_SDA_MOSI_PIO0_20>;
bias-pull-up;
slew-rate = "standard";
};
};
};
``` | /content/code_sandbox/boards/nxp/lpcxpresso51u68/lpcxpresso51u68-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 319 |
```cmake
#
#
#
board_runner_args(linkserver "--device=LPC55S36:LPCXpresso55S36")
board_runner_args(jlink "--device=LPC55S36" "--reset-after-load")
board_runner_args(pyocd "--target=lpc55s36")
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
include(${ZEPHYR_BASE}/boards/common/linkserver.board.cmake)
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
``` | /content/code_sandbox/boards/nxp/lpcxpresso55s36/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 106 |
```restructuredtext
.. _lpcxpresso51u68:
NXP LPCXPRESSO51U68
###################
Overview
********
The LPCXpresso51u68 development board uses an NXP LPC51U68 MCU based
on an ARM CORTEX-M0+ core.
.. figure:: lpcxpresso51u68.jpg
:align: center
:alt: LPCXpresso51U68
Hardware
********
- LPC51U68 M0+ running at up to 150 MHz
- Memory
- 256KB of flash memory
- 96KB of SRAM
- On-board high-speed USB based debug probe with CMSIS-DAP and J-Link protocol
support, can debug the on-board LPC51U68 or an external target
- External debug probe option
- Tri-color LED, target reset, ISP & interrupt/user buttons for easy testing of
software functionality
- Expansion options based on Arduino UNO and PMOD, plus additional expansion
port pins
- FTDI UART Connector
More information can be found here:
- `LPC51U68 SoC Website`_
- `LPC51U68 Datasheet`_
Supported Features
==================
The lpcxpresso51u68 support the following features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+-------------------------------------+
| IOCON | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| CLOCK | on-chip | clock and reset control |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c master/slave controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port interrupt |
+-----------+------------+-------------------------------------+
| SPI | on-chip | SPI master |
+-----------+------------+-------------------------------------+
Other hardware is not yet supported on Zephyr.
Connections and IOs
===================
The IOCON controller can be used to configure the LPC51U68 pins.
+---------+-----------------+----------------------------+
| Name | Function | Usage |
+=========+=================+============================+
| PIO0_0 | UART | USART RX |
+---------+-----------------+----------------------------+
| PIO0_1 | UART | USART TX |
+---------+-----------------+----------------------------+
| PIO1_10 | GPIO | GREEN LED |
+---------+-----------------+----------------------------+
| PIO0_29 | GPIO | RED LED |
+---------+-----------------+----------------------------+
| PIO1_9 | GPIO | BLUE_LED |
+---------+-----------------+----------------------------+
| PIO0_25 | I2C | I2C SCL |
+---------+-----------------+----------------------------+
| PIO0_26 | I2C | I2C SDA |
+---------+-----------------+----------------------------+
| PIO0_18 | SPI | SPI MISO |
+---------+-----------------+----------------------------+
| PIO0_19 | SPI | SPI SCK |
+---------+-----------------+----------------------------+
| PIO0_20 | SPI | SPI MOSI |
+---------+-----------------+----------------------------+
| PIO1_1 | SPI | SPI SSEL2 |
+---------+-----------------+----------------------------+
Programming and Debugging
*************************
Build and flash applications as usual (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Configuring a Debug Probe
=========================
A debug probe is used for both flashing and debugging the board. This board is
configured by default to use the LPC-Link2 CMSIS-DAP Onboard Debug Probe,
however the :ref:`pyocd-debug-host-tools` do not support this probe so you must
reconfigure the board for one of the following debug probes instead.
:ref:`lpclink2-jlink-onboard-debug-probe`
-----------------------------------------
Install the :ref:`jlink-debug-host-tools` and make sure they are in your search
path.
Follow the instructions in :ref:`lpclink2-jlink-onboard-debug-probe` to program
the J-Link firmware.
Configuring a Console
=====================
Connect a USB to FTDI RX, TX & GND pins to P3 Connector.
Use the following settings with your serial terminal of choice (minicom, putty,
etc.):
- Speed: 115200
- Data: 8 bits
- Parity: None
- Stop bits: 1
Flashing
========
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: lpcxpresso51u68
:goals: flash
.. code-block:: console
***** Booting Zephyr OS build zephyr-v2.6.0-934-g4c438c0c7d13 *****
Hello World! lpcxpresso51u68
Debugging
=========
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: lpcxpresso51u68
:goals: debug
Open a serial terminal, step through the application in your debugger, and you
should see the following message in the terminal:
.. code-block:: console
***** Booting Zephyr OS build zephyr-v2.6.0-934-g4c438c0c7d13 *****
Hello World! lpcxpresso51u68
.. _LPC51U68 SoC Website:
path_to_url
.. _LPC51U68 Datasheet:
path_to_url
``` | /content/code_sandbox/boards/nxp/lpcxpresso51u68/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,327 |
```unknown
choice MCUBOOT_MODE
default MCUBOOT_MODE_OVERWRITE_ONLY
endchoice
``` | /content/code_sandbox/boards/nxp/lpcxpresso55s36/Kconfig.sysbuild | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 20 |
```yaml
board:
name: lpcxpresso55s36
vendor: nxp
socs:
- name: lpc55s36
``` | /content/code_sandbox/boards/nxp/lpcxpresso55s36/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 34 |
```unknown
/*
*
*/
/dts-v1/;
#include <nxp/nxp_lpc55S36_ns.dtsi>
#include "lpcxpresso55s36-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "NXP LPCXpresso55S36 board";
compatible = "nxp,lpc55xxx", "nxp,lpc";
chosen {
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,console = &flexcomm0;
zephyr,shell-uart = &flexcomm0;
zephyr,canbus = &can0;
zephyr,flash-controller = &iap;
};
aliases{
led0 = &red_led;
led1 = &green_led;
led2 = &blue_led;
sw0 = &btn_wk;
sw1 = &btn_usr;
usart-0 = &flexcomm0;
pwm-0 = &flexpwm1_pwm0;
};
leds {
compatible = "gpio-leds";
red_led: led_0 {
gpios = <&gpio1 28 0>;
label = "Red LED";
};
green_led: led_1 {
gpios = <&gpio0 22 0>;
label = "Green LED";
};
blue_led: led_2 {
gpios = <&gpio1 11 0>;
label = "Blue LED";
};
};
gpio_keys {
compatible = "gpio-keys";
btn_wk: button_0 {
label = "Wakeup button";
gpios = <&gpio1 18 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_WAKEUP>;
};
btn_usr: button_1 {
label = "USR button";
gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_0>;
};
};
mikrobus_header: mikrobus-connector {
compatible = "mikro-bus";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpio1 9 0>, /* AN */
/* Not a GPIO*/ /* RST */
<2 0 &gpio0 20 0>, /* CS */
<3 0 &gpio1 2 0>, /* SCK */
<4 0 &gpio1 3 0>, /* MISO */
<5 0 &gpio0 26 0>, /* MOSI */
/* +3.3V */
/* GND */
<6 0 &gpio1 8 0>, /* PWM */
<7 0 &gpio0 17 0>, /* INT */
<8 0 &gpio1 24 0>, /* RX */
<9 0 &gpio1 25 0>, /* TX */
<10 0 &gpio1 30 0>, /* SCL */
<11 0 &gpio1 21 0>; /* SDA */
/* +5V */
/* GND */
};
arduino_header: arduino-connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpio0 15 0>, /* A0 */
<1 0 &gpio0 16 0>, /* A1 */
<2 0 &gpio0 0 0>, /* A2 */
<3 0 &gpio1 13 0>, /* A3 */
<4 0 &gpio1 21 0>, /* A4 */
<5 0 &gpio1 30 0>, /* A5 */
<6 0 &gpio2 0 0>, /* D0 */
<7 0 &gpio2 1 0>, /* D1 */
<8 0 &gpio1 26 0>, /* D2 */
<9 0 &gpio1 23 0>, /* D3 */
<10 0 &gpio1 8 0>, /* D4 */
<11 0 &gpio1 25 0>, /* D5 */
<12 0 &gpio1 0 0>, /* D6 */
<13 0 &gpio1 28 0>, /* D7 */
<14 0 &gpio1 27 0>, /* D8 */
<15 0 &gpio1 29 0>, /* D9 */
<16 0 &gpio1 26 0>, /* D10 */
<17 0 &gpio0 26 0>, /* D11 */
<18 0 &gpio1 3 0>, /* D12 */
<19 0 &gpio1 2 0>, /* D13 */
<20 0 &gpio0 3 0>, /* D14 */
<21 0 &gpio0 2 0>; /* D15 */
};
};
&flexcomm0 {
status = "okay";
compatible = "nxp,lpc-usart";
current-speed = <115200>;
pinctrl-0 = <&pinmux_flexcomm0_usart>;
pinctrl-names = "default";
};
&can0 {
pinctrl-0 = <&pinmux_mcan_can0>;
pinctrl-names = "default";
status = "okay";
can-transceiver {
max-bitrate = <5000000>;
};
};
&adc0 {
status = "okay";
pinctrl-0 = <&pinmux_lpadc0>;
pinctrl-names = "default";
};
/* Flash is divided into 32 kB sub-regions.
* Each sub-region can be assigned individual
* security tier in secure AHB controller.
*/
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x0 DT_SIZE_K(32)>;
};
slot0_partition: partition@8000 {
label = "image-0";
reg = <0x00008000 DT_SIZE_K(96)>;
};
slot1_partition: partition@20000 {
label = "image-1";
reg = <0x00020000 DT_SIZE_K(96)>;
};
storage_partition: partition@38000 {
label = "storage";
reg = <0x00038000 DT_SIZE_K(20)>;
};
/* The last 12KB are reserved for PFR on the 256KB flash.
*/
};
};
&flexpwm1_pwm0 {
status = "okay";
pinctrl-0 = <&pinmux_flexpwm1_pwm0>;
pinctrl-names = "default";
};
zephyr_udc0: &usbfs {
status = "okay";
pinctrl-0 = <&pinmux_usbfs>;
pinctrl-names = "default";
};
&dma0 {
status = "okay";
};
&vref0 {
status = "okay";
};
&dac0 {
status = "okay";
pinctrl-0 = <&pinmux_dac0>;
pinctrl-names = "default";
};
``` | /content/code_sandbox/boards/nxp/lpcxpresso55s36/lpcxpresso55s36.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,775 |
```unknown
config BOARD_LPCXPRESSO55S36
select SOC_LPC55S36
select SOC_PART_NUMBER_LPC55S36JBD100
``` | /content/code_sandbox/boards/nxp/lpcxpresso55s36/Kconfig.lpcxpresso55s36 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 34 |
```unknown
# LPCXpresso55S36 board
if BOARD_LPCXPRESSO55S36
if BOOTLOADER_MCUBOOT
choice MCUBOOT_BOOTLOADER_MODE
# Board only supports MCUBoot via "upgrade only" method:
default MCUBOOT_BOOTLOADER_MODE_OVERWRITE_ONLY
endchoice
endif #BOOTLOADER_MCUBOOT
endif # BOARD_LPCXPRESSO55S36
``` | /content/code_sandbox/boards/nxp/lpcxpresso55s36/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 88 |
```yaml
#
#
#
identifier: lpcxpresso55s36
name: NXP LPCXpresso55S36
type: mcu
arch: arm
ram: 96
flash: 256
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- can
- gpio
- pwm
- dac
- usb_device
- usbd
vendor: nxp
``` | /content/code_sandbox/boards/nxp/lpcxpresso55s36/lpcxpresso55s36.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 98 |
```unknown
/*
* NOTE: File generated by gen_board_pinctrl.py
* from LPC55S36.mex
*
*/
#include <nxp/lpc/LPC55S36JBD100-pinctrl.h>
&pinctrl {
/* Configures pin routing and optionally pin electrical features. */
pinmux_flexcomm0_usart: pinmux_flexcomm0_usart {
group0 {
pinmux = <FC0_RXD_SDA_MOSI_DATA_PIO0_29>,
<FC0_TXD_SCL_MISO_WS_PIO0_30>;
slew-rate = "standard";
};
};
/* Configures pin routing and optionally pin electrical features. */
pinmux_flexcomm2_i2c: pinmux_flexcomm2_i2c {
group0 {
pinmux = <FC2_CTS_SDA_SSEL0_PIO1_26>,
<FC2_TXD_SCL_MISO_WS_PIO1_25>;
slew-rate = "standard";
};
};
/* Configures pin routing and optionally pin electrical features. */
pinmux_hs_lspi_default: pinmux_hs_lspi_default {
group0 {
pinmux = <HS_SPI_MISO_PIO1_3>,
<HS_SPI_MOSI_PIO0_26>,
<HS_SPI_SCK_PIO1_2>,
<HS_SPI_SSEL0_PIO0_20>;
slew-rate = "standard";
};
};
pinmux_lpadc0: pinmux_lpadc0 {
group0 {
pinmux = <ADC0_CH0A_PIO1_9>;
slew-rate = "standard";
nxp,analog-mode;
};
};
/* Configures pin routing and optionally pin electrical features. */
pinmux_sctimer_default: pinmux_sctimer_default {
group0 {
pinmux = <SCT0_OUT0_PIO1_4>,
<SCT0_OUT2_PIO0_15>;
slew-rate = "standard";
};
};
/* Configures pins for CAN0 */
pinmux_mcan_can0: pinmux_mcan_can0 {
group0 {
pinmux = <CAN0_RD_PIO1_3>,
<CAN0_TD_PIO1_2>;
slew-rate = "standard";
};
};
pinmux_flexpwm0_pwm0: pinmux_flexpwm0_pwm0 {
group0 {
pinmux = <PWM0_A0_PIO1_20>,
<PWM0_B0_PIO1_17>;
slew-rate = "standard";
};
};
pinmux_flexpwm0_pwm1: pinmux_flexpwm0_pwm1 {
group0 {
pinmux = <PWM0_A1_PIO1_6>,
<PWM0_B1_PIO1_22>;
slew-rate = "standard";
};
};
pinmux_flexpwm0_pwm2: pinmux_flexpwm0_pwm2 {
group0 {
pinmux = <PWM0_A2_PIO1_8>,
<PWM0_B2_PIO1_4>;
slew-rate = "standard";
};
};
pinmux_flexpwm1_pwm0: pinmux_flexpwm1_pwm0 {
group0 {
pinmux = <PWM1_A0_PIO1_21>,
<PWM1_B0_PIO0_3>;
slew-rate = "standard";
};
};
pinmux_flexpwm1_pwm1: pinmux_flexpwm1_pwm1 {
group0 {
pinmux = <PWM1_A1_PIO1_23>,
<PWM1_B1_PIO0_21>;
slew-rate = "standard";
};
};
pinmux_flexpwm1_pwm2: pinmux_flexpwm1_pwm2 {
group0 {
pinmux = <PWM1_A2_PIO1_25>,
<PWM1_B2_PIO1_31>;
slew-rate = "standard";
};
};
pinmux_usbfs: pinmux_usbfs {
group0 {
pinmux = <USB0_VBUS_PIO1_31>;
slew-rate = "standard";
};
};
pinmux_dac0: pinmux_dac0 {
group0 {
pinmux = <DAC0_OUT_PIO1_22>;
slew-rate = "standard";
nxp,analog-mode;
};
};
};
``` | /content/code_sandbox/boards/nxp/lpcxpresso55s36/lpcxpresso55s36-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,027 |
```unknown
#
#
#
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
CONFIG_GPIO=y
CONFIG_PINCTRL=y
CONFIG_ARM_MPU=y
CONFIG_RUNTIME_NMI=y
``` | /content/code_sandbox/boards/nxp/lpcxpresso55s36/lpcxpresso55s36_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 45 |
```cmake
#
#
#
if(CONFIG_SOC_MIMX8QM6_ADSP)
board_set_flasher_ifnset(misc-flasher)
board_finalize_runner_args(misc-flasher)
board_set_rimage_target(imx8)
endif()
``` | /content/code_sandbox/boards/nxp/imx8qm_mek/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 51 |
```unknown
/*
*
*/
#include <zephyr/dt-bindings/pinctrl/imx8qm-pinctrl.h>
&iomuxc {
iomuxc_uart2_rx_uart0_rts_b: IOMUXC_UART2_RX_UART0_RTS_B {
pinmux = <SC_P_UART0_RTS_B IMX8QM_DMA_LPUART2_RX_UART0_RTS_B>;
};
iomuxc_uart2_tx_uart0_cts_b: IOMUXC_UART2_TX_UART0_CTS_B {
pinmux = <SC_P_UART0_CTS_B IMX8QM_DMA_LPUART2_TX_UART0_CTS_B>;
};
iomuxc_aud_sai1_rxd_sai1_rxd: IOMUXC_AUD_SAI1_RXD_SAI1_RXD {
pinmux = <SC_P_SAI1_RXD IMX8QM_AUD_SAI1_RXD_SAI1_RXD>;
};
iomuxc_aud_sai1_txc_sai1_txc: IOMUXC_AUD_SAI1_TXC_SAI1_TXC {
pinmux = <SC_P_SAI1_TXC IMX8QM_AUD_SAI1_TXC_SAI1_TXC>;
};
iomuxc_aud_sai1_txd_sai1_txd: IOMUXC_AUD_SAI1_TXD_SAI1_TXD {
pinmux = <SC_P_SAI1_TXD IMX8QM_AUD_SAI1_TXD_SAI1_TXD>;
};
iomuxc_aud_sai1_txfs_sai1_txfs: IOMUXC_AUD_SAI1_TXFS_SAI1_TXFS {
pinmux = <SC_P_SAI1_TXFS IMX8QM_AUD_SAI1_TXFS_SAI1_TXFS>;
};
};
&pinctrl {
lpuart2_default: lpuart2_default {
group0 {
pinmux = <&iomuxc_uart2_rx_uart0_rts_b>,
<&iomuxc_uart2_tx_uart0_cts_b>;
};
};
sai1_default: sai1_default {
group0 {
pinmux = <&iomuxc_aud_sai1_rxd_sai1_rxd>,
<&iomuxc_aud_sai1_txc_sai1_txc>,
<&iomuxc_aud_sai1_txd_sai1_txd>,
<&iomuxc_aud_sai1_txfs_sai1_txfs>;
};
};
};
``` | /content/code_sandbox/boards/nxp/imx8qm_mek/imx8qm_mek_mimx8qm6_adsp-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 553 |
```yaml
identifier: imx8qm_mek/mimx8qm6/adsp
name: NXP i.MX 8QM Audio DSP
type: mcu
arch: xtensa
toolchain:
- zephyr
testing:
only_tags:
- kernel
- sof
vendor: nxp
``` | /content/code_sandbox/boards/nxp/imx8qm_mek/imx8qm_mek_mimx8qm6_adsp.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 69 |
```unknown
/*
*
*/
/dts-v1/;
#include <nxp/nxp_imx8.dtsi>
#include "imx8qm_mek_mimx8qm6_adsp-pinctrl.dtsi"
/ {
model = "NXP i.MX 8QM Audio DSP";
compatible = "nxp";
chosen {
zephyr,sram = &sram0;
zephyr,console = &lpuart2;
zephyr,shell-uart = &lpuart2;
};
};
&lpuart2 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&lpuart2_default>;
pinctrl-names = "default";
};
&sai1 {
pinctrl-0 = <&sai1_default>;
pinctrl-names = "default";
};
``` | /content/code_sandbox/boards/nxp/imx8qm_mek/imx8qm_mek_mimx8qm6_adsp.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 182 |
```yaml
board:
name: imx8qm_mek
vendor: nxp
socs:
- name: mimx8qm6
``` | /content/code_sandbox/boards/nxp/imx8qm_mek/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 33 |
```unknown
CONFIG_MAIN_STACK_SIZE=3072
# board/soc-related configurations
CONFIG_LOG=y
# TODO: maybe move this to SOF?
CONFIG_DYNAMIC_INTERRUPTS=y
CONFIG_BUILD_OUTPUT_BIN=n
# clock-related configurations
CONFIG_CLOCK_CONTROL=y
# serial-related configurations
CONFIG_SERIAL=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# interrupt-related configurations
CONFIG_MULTI_LEVEL_INTERRUPTS=y
CONFIG_2ND_LEVEL_INTERRUPTS=y
CONFIG_2ND_LVL_ISR_TBL_OFFSET=32
CONFIG_MAX_IRQ_PER_AGGREGATOR=64
CONFIG_NUM_2ND_LEVEL_AGGREGATORS=8
CONFIG_2ND_LVL_INTR_00_OFFSET=19
CONFIG_2ND_LVL_INTR_01_OFFSET=20
CONFIG_2ND_LVL_INTR_02_OFFSET=21
CONFIG_2ND_LVL_INTR_03_OFFSET=22
CONFIG_2ND_LVL_INTR_04_OFFSET=23
CONFIG_2ND_LVL_INTR_05_OFFSET=24
CONFIG_2ND_LVL_INTR_06_OFFSET=25
CONFIG_2ND_LVL_INTR_07_OFFSET=26
CONFIG_2ND_LEVEL_INTERRUPT_BITS=9
``` | /content/code_sandbox/boards/nxp/imx8qm_mek/imx8qm_mek_mimx8qm6_adsp_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 233 |
```unknown
#
#
config BOARD_IMX8QM_MEK
select SOC_MIMX8QM6_ADSP if BOARD_IMX8QM_MEK_MIMX8QM6_ADSP
select SOC_PART_NUMBER_MIMX8QM6AVUFF
``` | /content/code_sandbox/boards/nxp/imx8qm_mek/Kconfig.imx8qm_mek | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 52 |
```cmake
board_runner_args(jlink "--device=MKW41Z512xxx4")
board_runner_args(pyocd "--target=kw41z4")
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/nxp/frdm_kw41z/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 65 |
```yaml
identifier: frdm_kw41z
name: NXP FRDM-KW41Z
type: mcu
arch: arm
ram: 96
flash: 512
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- adc
- arduino_gpio
- counter
- gpio
- i2c
- spi
- pwm
testing:
ignore_tags:
- bluetooth
vendor: nxp
``` | /content/code_sandbox/boards/nxp/frdm_kw41z/frdm_kw41z.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 109 |
```restructuredtext
.. _lpcxpresso55s36:
NXP LPCXpresso55S36
###################
Overview
********
The LPCXpresso55S36 board provides the ideal platform for evaluation
of the LPC55S3x/LPC553x MCU family, based on the Arm Cortex-M33
architecture. Arduino UNO compatible shield connectors are included,
with additional expansion ports around the Arduino footprint, along
with a PMod/host interface port and MikroElektronika Click module
site.
.. image:: lpcxpresso55S36.jpg
:align: center
:alt: LPCXpresso55S36
Hardware
********
- LPC55S36 Arm Cortex-M33 microcontroller running at up to 150 MHz
- 256 KB flash and 96 KB SRAM on-chip
- LPC-Link2 debug high speed USB probe with VCOM port
- I2C and SPI USB bridging to the LPC device via LPC-Link2 probe
- MikroElektronika Click expansion option
- LPCXpresso expansion connectors compatible with Arduino UNO
- PMod compatible expansion / host connector
- Reset, ISP, wake, and user buttons for easy testing of software functionality
- Tri-color LED
- Full-speed USB device / host port
- High-speed USB device / host port
- UART header for external serial to USB cable
- CAN Transceiver
- Stereo audio codec with in/out line
For more information about the LPC55S36 SoC and LPCXPresso55S36 board, see:
- `LPC55S36 SoC Website`_
- `LPC55S36 Datasheet`_
- `LPC55S36 User Manual`_
- `LPCXpresso55S36 Website`_
- `LPCXpresso55S36 User Manual`_
- `LPCXpresso55S36 Development Board Design Files`_
Supported Features
==================
NXP considers the LPCXpresso55S36 as a superset board for the LPC55(S)3x
family of MCUs. This board is a focus for NXP's Full Platform Support for
Zephyr, to better enable the entire LPC55(S)3x family. NXP prioritizes enabling
this board with new support for Zephyr features. The lpcxpresso55s36 board
configuration supports the hardware features below. Another similar superset
board is the :ref:`lpcxpresso55s69`, and that board may have additional features
already supported, which can also be re-used on this lpcxpresso55s36 board:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+-------------------------------------+
| IOCON | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| USART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| CLOCK | on-chip | clock_control |
+-----------+------------+-------------------------------------+
| CAN | on-chip | canbus |
+-----------+------------+-------------------------------------+
| IAP | on-chip | flash |
+-----------+------------+-------------------------------------+
| PWM | on-chip | pwm |
+-----------+------------+-------------------------------------+
| USB FS | on-chip | USB Full Speed device |
+-----------+------------+-------------------------------------+
| DAC | on-chip | dac |
+-----------+------------+-------------------------------------+
Other hardware features are not currently enabled.
Currently available targets for this board are:
- *lpcxpresso55s36*
Connections and IOs
===================
The LPC55S36 SoC has IOCON registers, which can be used to configure
the functionality of a pin.
+---------+-----------------+----------------------------+
| Name | Function | Usage |
+=========+=================+============================+
| PIO0_17 | GPIO | USR SW3 |
+---------+-----------------+----------------------------+
| PIO0_22 | GPIO | GREEN LED |
+---------+-----------------+----------------------------+
| PIO0_28 | GPIO | RED LED |
+---------+-----------------+----------------------------+
| PIO0_29 | USART | USART RX |
+---------+-----------------+----------------------------+
| PIO0_30 | USART | USART TX |
+---------+-----------------+----------------------------+
| PIO1_11 | GPIO | BLUE_LED |
+---------+-----------------+----------------------------+
| PIO1_18 | GPIO | Wakeup SW1 |
+---------+-----------------+----------------------------+
| PIO1_20 | FLEXPPWM0_PWM0_A| pwm |
+---------+-----------------+----------------------------+
| PIO1_17 | FLEXPPWM0_PWM0_B| pwm |
+---------+-----------------+----------------------------+
| PIO1_6 | FLEXPPWM0_PWM1_A| pwm |
+---------+-----------------+----------------------------+
| PIO1_22 | FLEXPPWM0_PWM1_B| pwm |
+---------+-----------------+----------------------------+
| PIO1_8 | FLEXPPWM0_PWM2_A| pwm |
+---------+-----------------+----------------------------+
| PIO1_4 | FLEXPPWM0_PWM2_B| pwm |
+---------+-----------------+----------------------------+
| PIO1_21 | FLEXPPWM1_PWM0_A| pwm |
+---------+-----------------+----------------------------+
| PIO0_3 | FLEXPPWM1_PWM0_B| pwm |
+---------+-----------------+----------------------------+
| PIO1_23 | FLEXPPWM1_PWM1_A| pwm |
+---------+-----------------+----------------------------+
| PIO0_21 | FLEXPPWM1_PWM1_B| pwm |
+---------+-----------------+----------------------------+
| PIO1_25 | FLEXPPWM1_PWM2_A| pwm |
+---------+-----------------+----------------------------+
| PIO0_31 | FLEXPPWM1_PWM2_B| pwm |
+---------+-----------------+----------------------------+
| PIO1_2 | CAN0_TXD | CAN TX |
+---------+-----------------+----------------------------+
| PIO1_3 | CAN0_RXD | CAN RX |
+---------+-----------------+----------------------------+
| PIO0_22 | USB0_VBUS | USBFS VBUS |
+---------+-----------------+----------------------------+
System Clock
============
The LPC55S36 SoC is configured to use PLL1 clocked from the external 24MHz
crystal, running at 144MHz as a source for the system clock. When the flash
controller is enabled, the core clock will be reduced to 96MHz. Other sources for the system clock are
provided in the SOC, depending on your system requirements.
Serial Port
===========
The LPC55S36 SoC has 8 FLEXCOMM interfaces for serial
communication. One is configured as USART for the console and the
remaining are not used.
Programming and Debugging
*************************
Build and flash applications as usual (see :ref:`build_an_application`
and :ref:`application_run` for more details).
Configuring a Debug Probe
=========================
A debug probe is used for both flashing and debugging the board. This
board is configured by default to use the LPC-Link2 CMSIS-DAP Onboard
Debug Probe, however the :ref:`pyocd-debug-host-tools` does not yet
support the LPC55S36 so you must reconfigure the board for one of the
J-Link debug probe instead.
First install the :ref:`jlink-debug-host-tools` and make sure they are
in your search path.
Then follow the instructions in
:ref:`lpclink2-jlink-onboard-debug-probe` to program the J-Link
firmware. Please make sure you have the latest firmware for this
board.
Configuring a Console
=====================
Connect a USB cable from your PC to J1 (LINK2), and use the serial
terminal of your choice (minicom, putty, etc.) with the following
settings:
- Speed: 115200
- Data: 8 bits
- Parity: None
- Stop bits: 1
Flashing
========
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: lpcxpresso55s36
:goals: flash
Open a serial terminal, reset the board (press the RESET button), and you should
see the following message in the terminal:
.. code-block:: console
***** Booting Zephyr OS v2.2.0 *****
Hello World! lpcxpresso55s36
Debugging
=========
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: lpcxpresso55s36
:goals: debug
Open a serial terminal, step through the application in your debugger, and you
should see the following message in the terminal:
.. code-block:: console
***** Booting Zephyr OS zephyr-v2.2.0 *****
Hello World! lpcxpresso55s36
.. _LPC55S36 SoC Website:
path_to_url
.. _LPC55S36 Datasheet:
path_to_url
.. _LPC55S36 User Manual:
path_to_url
.. _LPCxpresso55S36 Website:
path_to_url
.. _LPCXpresso55S36 User Manual:
path_to_url
.. _LPCXpresso55S36 Development Board Design Files:
path_to_url
``` | /content/code_sandbox/boards/nxp/lpcxpresso55s36/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,173 |
```yaml
board:
name: frdm_kw41z
vendor: nxp
socs:
- name: mkw41z4
``` | /content/code_sandbox/boards/nxp/frdm_kw41z/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```unknown
/*
* NOTE: Autogenerated file by gen_board_pinctrl.py
* for MKW41Z512VHT4/signal_configuration.xml
*
*/
#include <nxp/kinetis/MKW41Z512VHT4-pinctrl.h>
&pinctrl {
adc0_default: adc0_default {
group0 {
pinmux = <ADC0_SE3_PTB2>;
drive-strength = "low";
slew-rate = "slow";
};
};
i2c1_default: i2c1_default {
group0 {
pinmux = <I2C1_SCL_PTC2>,
<I2C1_SDA_PTC3>;
drive-strength = "low";
slew-rate = "slow";
};
};
lpuart0_default: lpuart0_default {
group0 {
pinmux = <UART0_TX_PTC7>;
drive-strength = "low";
slew-rate = "fast";
};
group1 {
pinmux = <UART0_RX_PTC6>;
drive-strength = "low";
slew-rate = "slow";
};
};
spi0_default: spi0_default {
group0 {
pinmux = <SPI0_SCK_PTC16>,
<SPI0_SIN_PTC18>,
<SPI0_SOUT_PTC17>,
<SPI0_PCS0_PTC19>;
drive-strength = "low";
slew-rate = "fast";
};
};
tmp2_default: tmp2_default {
group0 {
pinmux = <TPM2_CH0_PTA18>,
<TPM2_CH1_PTA19>;
drive-strength = "low";
slew-rate = "fast";
};
};
tpm0_default: tpm0_default {
group0 {
pinmux = <TPM0_CH2_PTC1>;
drive-strength = "low";
slew-rate = "slow";
};
};
};
``` | /content/code_sandbox/boards/nxp/frdm_kw41z/frdm_kw41z-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 456 |
```unknown
# FRDM-KW41Z board
if BOARD_FRDM_KW41Z
config OSC_XTAL0_FREQ
default 32000000
config MCG_FRDIV
default 5
config MCG_FCRDIV
default 0
config FXOS8700_DRDY_INT1
default y
depends on FXOS8700_TRIGGER
choice ADC_MCUX_ADC16_VREF
default ADC_MCUX_ADC16_VREF_ALTERNATE
endchoice
endif # BOARD_FRDM_KW41Z
``` | /content/code_sandbox/boards/nxp/frdm_kw41z/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 110 |
```unknown
config BOARD_FRDM_KW41Z
select SOC_MKW41Z4
select SOC_PART_NUMBER_MKW41Z512VHT4
``` | /content/code_sandbox/boards/nxp/frdm_kw41z/Kconfig.frdm_kw41z | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```unknown
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_GPIO=y
CONFIG_PINCTRL=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=40000000
CONFIG_OSC_EXTERNAL=y
``` | /content/code_sandbox/boards/nxp/frdm_kw41z/frdm_kw41z_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 44 |
```unknown
/dts-v1/;
#include <nxp/nxp_kw41z.dtsi>
#include "frdm_kw41z-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "NXP Freedom KW41Z board";
compatible = "nxp,kw41z", "nxp,mkw41z4";
aliases {
led0 = &green_led;
led1 = &blue_led;
led2 = &red_led;
sw0 = &user_button_3;
sw1 = &user_button_4;
pwm-led0 = &blue_pwm_led;
pwm-led1 = &green_pwm_led;
pwm-led2 = &red_pwm_led;
blue-pwm-led = &blue_pwm_led;
green-pwm-led = &green_pwm_led;
red-pwm-led = &red_pwm_led;
magn0 = &fxos8700;
accel0 = &fxos8700;
};
chosen {
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,console = &lpuart0;
zephyr,shell-uart = &lpuart0;
zephyr,ieee802154 = &ieee802154;
zephyr,code-partition = &slot0_partition;
};
leds {
compatible = "gpio-leds";
red_led: led_0 {
gpios = <&gpioc 1 GPIO_ACTIVE_LOW>;
label = "User LD1";
};
green_led: led_1 {
gpios = <&gpioa 19 GPIO_ACTIVE_LOW>;
label = "User LD2";
};
blue_led: led_2 {
gpios = <&gpioa 18 GPIO_ACTIVE_LOW>;
label = "User LD3";
};
};
pwmleds {
compatible = "pwm-leds";
blue_pwm_led: pwm_led_0 {
pwms = <&tpm2 0 PWM_MSEC(20) PWM_POLARITY_INVERTED>;
label = "User PWM LD1";
};
green_pwm_led: pwm_led_1 {
pwms = <&tpm2 1 PWM_MSEC(20) PWM_POLARITY_INVERTED>;
label = "User PWM LD2";
};
red_pwm_led: pwm_led_2 {
pwms = <&tpm0 2 PWM_MSEC(20) PWM_POLARITY_INVERTED>;
label = "User PWM LD3";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button_3: button_0 {
label = "User SW3";
gpios = <&gpioc 4 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_0>;
};
user_button_4: button_1 {
label = "User SW4";
gpios = <&gpioc 5 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_1>;
};
};
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = /* A0 cannot be muxed as gpio */
<1 0 &gpiob 18 0>, /* A1 */
<2 0 &gpiob 2 0>, /* A2 */
<3 0 &gpiob 3 0>, /* A3 */
<4 0 &gpiob 1 0>, /* A4 */
<6 0 &gpioc 6 0>, /* D0 */
<7 0 &gpioc 7 0>, /* D1 */
<8 0 &gpioc 19 0>, /* D2 */
<9 0 &gpioc 16 0>, /* D3 */
<10 0 &gpioc 4 0>, /* D4 */
<11 0 &gpioc 17 0>, /* D5 */
<12 0 &gpioc 18 0>, /* D6 */
<13 0 &gpioa 1 0>, /* D7 */
<14 0 &gpioa 0 0>, /* D8 */
<15 0 &gpioc 1 0>, /* D9 */
<16 0 &gpioa 19 0>, /* D10 */
<17 0 &gpioa 16 0>, /* D11 */
<18 0 &gpioa 17 0>, /* D12 */
<19 0 &gpioa 18 0>, /* D13 */
<20 0 &gpioc 3 0>, /* D14 */
<21 0 &gpioc 2 0>; /* D15 */
};
};
&sim {
pllfll-select = <KINETIS_SIM_PLLFLLSEL_MCGPLLCLK>;
er32k-select = <KINETIS_SIM_ER32KSEL_OSC32KCLK>;
};
&adc0 {
status = "okay";
pinctrl-0 = <&adc0_default>;
pinctrl-names = "default";
};
&i2c1 {
status = "okay";
pinctrl-0 = <&i2c1_default>;
pinctrl-names = "default";
fxos8700: fxos8700@1f {
compatible = "nxp,fxos8700";
reg = <0x1f>;
int1-gpios = <&gpioc 1 GPIO_ACTIVE_LOW>;
};
};
&lpuart0 {
status = "okay";
pinctrl-0 = <&lpuart0_default>;
pinctrl-names = "default";
current-speed = <115200>;
};
&gpioa {
status = "okay";
};
&gpioc {
status = "okay";
};
&spi0 {
status = "okay";
pinctrl-0 = <&spi0_default>;
pinctrl-names = "default";
};
&tpm0 {
status = "okay";
pinctrl-0 = <&tpm0_default>;
pinctrl-names = "default";
};
&tpm1 {
status = "disabled";
};
&tpm2 {
status = "okay";
pinctrl-0 = <&tmp2_default>;
pinctrl-names = "default";
};
&ieee802154 {
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
slot0_partition: partition@0 {
label = "image-0";
reg = <0x00000000 0x00070000>;
};
storage_partition: partition@700000 {
label = "storage";
reg = <0x00070000 0x00010000>;
};
};
};
``` | /content/code_sandbox/boards/nxp/frdm_kw41z/frdm_kw41z.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,597 |
```cmake
#
#
#
board_runner_args(linkserver "--device=LPC55S16:LPCXpresso55S16")
board_runner_args(jlink "--device=LPC55S16" "--reset-after-load")
board_runner_args(pyocd "--target=lpc55s16")
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
include(${ZEPHYR_BASE}/boards/common/linkserver.board.cmake)
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
``` | /content/code_sandbox/boards/nxp/lpcxpresso55s16/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 106 |
```restructuredtext
.. _frdm_kw41z:
NXP FRDM-KW41Z
##############
Overview
********
The FRDM-KW41Z is a development kit enabled by the Kinetis |reg| W series
KW41Z/31Z/21Z (KW41Z) family built on ARM |reg| Cortex |reg|-M0+ processor with
integrated 2.4 GHz transceiver supporting Bluetooth |reg| Smart/Bluetooth
|reg| Low Energy
(BLE) v4.2, Generic FSK, IEEE |reg| 802.15.4 and Thread.
The FRDM-KW41Z kit contains two Freedom boards that can be used as a
development board or a shield to connect to a host processor. The FRDM-KW41Z is
form-factor compatible with the Arduino |trade| R3 pin layout for more expansion
options.
The FRDM-KW41Z highly-sensitive, optimized 2.4 GHz radio features a PCB
F-antenna which can be bypassed to test via SMA connection, multiple power
supply options, push/capacitive touch buttons, switches, LEDs and integrated
sensors.
.. image:: frdm_kw41z.jpg
:align: center
:alt: FRDM-KW41Z
Hardware
********
- Can be configured as Host or Shield for connection to Host Processor
- Supports all DC-DC configurations (Buck, Boost, Bypass)
- PCB inverted F-type antenna
- SMA RF Connector
- RF regulatory certified
- Serial Flash for OTA firmware upgrades
- On board NXP FXOS8700CQ digital sensor, 3D Accelerometer ( |plusminus| 2g/
|plusminus| 4g/ |plusminus| 8g) + 3D
Magnetometer
- OpenSDA and JTAG debug
For more information about the KW41Z SoC and FRDM-KW41Z board:
- `KW41Z Website`_
- `KW41Z Datasheet`_
- `KW41Z Reference Manual`_
- `FRDM-KW41Z Website`_
- `FRDM-KW41Z User Guide`_
- `FRDM-KW41Z Schematics`_
Supported Features
==================
The frdm_kw41z board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| COUNTER | on-chip | rtc |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| ADC | on-chip | adc |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| FLASH | on-chip | soc flash |
+-----------+------------+-------------------------------------+
| SENSOR | off-chip | fxos8700 polling: |
| | | fxos8700 trigger |
+-----------+------------+-------------------------------------+
| PWM | on-chip | tpm |
+-----------+------------+-------------------------------------+
| TRNG | on-chip | entropy |
+-----------+------------+-------------------------------------+
| FTFA | on-chip | flash programming |
+-----------+------------+-------------------------------------+
The default configuration can be found in
:zephyr_file:`boards/nxp/frdm_kw41z/frdm_kw41z_defconfig`
Other hardware features are not currently supported by the port.
Connections and IOs
===================
The KW41Z SoC has three pairs of pinmux/gpio controllers, but only two are
currently enabled (PORTA/GPIOA and PORTC/GPIOC) for the FRDM-KW41Z board.
+-------+-------------+---------------------------+
| Name | Function | Usage |
+=======+=============+===========================+
| PTC1 | GPIO | Red LED / FXOS8700 INT1 |
+-------+-------------+---------------------------+
| PTA19 | GPIO | Green LED |
+-------+-------------+---------------------------+
| PTA18 | GPIO | Blue LED |
+-------+-------------+---------------------------+
| PTB2 | ADC | ADC0 channel 3 |
+-------+-------------+---------------------------+
| PTC2 | I2C1_SCL | I2C / FXOS8700 |
+-------+-------------+---------------------------+
| PTC3 | I2C1_SDA | I2C / FXOS8700 |
+-------+-------------+---------------------------+
| PTC4 | GPIO | SW3 |
+-------+-------------+---------------------------+
| PTC5 | GPIO | SW4 |
+-------+-------------+---------------------------+
| PTC6 | LPUART0_RX | UART Console |
+-------+-------------+---------------------------+
| PTC7 | LPUART0_TX | UART Console |
+-------+-------------+---------------------------+
| PTC16 | SPI0_SCK | SPI |
+-------+-------------+---------------------------+
| PTC17 | SPI0_SOUT | SPI |
+-------+-------------+---------------------------+
| PTC18 | SPI0_SIN | SPI |
+-------+-------------+---------------------------+
| PTC19 | SPI0_PCS0 | SPI |
+-------+-------------+---------------------------+
System Clock
============
The KW41Z SoC is configured to use the 32 MHz external oscillator on the board
with the on-chip FLL to generate a 40 MHz system clock.
Serial Port
===========
The KW41Z SoC has one UART, which is used for the console.
Programming and Debugging
*************************
Build and flash applications as usual (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Configuring a Debug Probe
=========================
A debug probe is used for both flashing and debugging the board. This board is
configured by default to use the :ref:`opensda-daplink-onboard-debug-probe`.
Option 1: :ref:`opensda-daplink-onboard-debug-probe` (Recommended)
your_sha256_hash--
Install the :ref:`pyocd-debug-host-tools` and make sure they are in your search
path.
Follow the instructions in :ref:`opensda-daplink-onboard-debug-probe` to program
the `OpenSDA DAPLink FRDM-KW41Z Firmware`_.
Option 2: :ref:`opensda-jlink-onboard-debug-probe`
--------------------------------------------------
Install the :ref:`jlink-debug-host-tools` and make sure they are in your search
path.
Follow the instructions in :ref:`opensda-jlink-onboard-debug-probe` to program
the `OpenSDA J-Link FRDM-KW41Z Firmware`_.
Add the arguments ``-DBOARD_FLASH_RUNNER=jlink`` and
``-DBOARD_DEBUG_RUNNER=jlink`` when you invoke ``west build`` to override the
default runner from pyOCD to J-Link:
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: frdm_kw41z
:gen-args: -DBOARD_FLASH_RUNNER=jlink -DBOARD_DEBUG_RUNNER=jlink
:goals: build
Configuring a Console
=====================
Regardless of your choice in debug probe, we will use the OpenSDA
microcontroller as a usb-to-serial adapter for the serial console.
Connect a USB cable from your PC to J6.
Use the following settings with your serial terminal of choice (minicom, putty,
etc.):
- Speed: 115200
- Data: 8 bits
- Parity: None
- Stop bits: 1
Flashing
========
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: frdm_kw41z
:goals: flash
Open a serial terminal, reset the board (press the SW1 button), and you should
see the following message in the terminal:
.. code-block:: console
***** Booting Zephyr OS v1.14.0-rc1 *****
Hello World! frdm_kw41z
Debugging
=========
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: frdm_kw41z
:goals: debug
Open a serial terminal, step through the application in your debugger, and you
should see the following message in the terminal:
.. code-block:: console
***** Booting Zephyr OS v1.14.0-rc1 *****
Hello World! frdm_kw41z
.. _FRDM-KW41Z Website:
path_to_url
.. _FRDM-KW41Z User Guide:
path_to_url
.. _FRDM-KW41Z Schematics:
path_to_url
.. _KW41Z Website:
path_to_url
.. _KW41Z Datasheet:
path_to_url
.. _KW41Z Reference Manual:
path_to_url
.. _OpenSDA DAPLink FRDM-KW41Z Firmware:
path_to_url
.. _OpenSDA J-Link FRDM-KW41Z Firmware:
path_to_url
``` | /content/code_sandbox/boards/nxp/frdm_kw41z/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,186 |
```unknown
/*
*
*/
#include "lpcxpresso55s16-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
chosen {
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,console = &flexcomm0;
zephyr,shell-uart = &flexcomm0;
zephyr,entropy = &rng;
zephyr,canbus = &can0;
zephyr,flash-controller = &iap;
};
aliases{
led0 = &red_led;
led1 = &green_led;
led2 = &blue_led;
sw0 = &btn_wk;
sw1 = &btn_usr;
sw2 = &btn_isp;
usart-0 = &flexcomm0;
magn0 = &fxos8700;
accel0 = &fxos8700;
};
leds {
compatible = "gpio-leds";
red_led: led_0 {
gpios = <&gpio1 4 0>;
label = "Red LED";
};
green_led: led_1 {
gpios = <&gpio1 7 0>;
label = "Green LED";
};
blue_led: led_2 {
gpios = <&gpio1 6 0>;
label = "Blue LED";
};
};
gpio_keys {
compatible = "gpio-keys";
btn_wk: button_0 {
label = "Wakeup button";
gpios = <&gpio1 18 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_WAKEUP>;
};
btn_usr: button_1 {
label = "USR button";
gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_0>;
};
btn_isp: button_2 {
label = "ISP button";
gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_1>;
};
};
mikrobus_header: mikrobus-connector {
compatible = "mikro-bus";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpio0 16 0>, /* AN */
/* Not a GPIO*/ /* RST */
<2 0 &gpio1 1 0>, /* CS */
<3 0 &gpio1 2 0>, /* SCK */
<4 0 &gpio1 3 0>, /* MISO */
<5 0 &gpio0 26 0>, /* MOSI */
/* +3.3V */
/* GND */
<6 0 &gpio1 5 0>, /* PWM */
<7 0 &gpio1 18 0>, /* INT */
<8 0 &gpio1 24 0>, /* RX */
<9 0 &gpio0 27 0>, /* TX */
<10 0 &gpio1 20 0>, /* SCL */
<11 0 &gpio1 21 0>; /* SDA */
/* +5V */
/* GND */
};
arduino_header: arduino-connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpio0 16 0>, /* A0 */
<1 0 &gpio0 23 0>, /* A1 */
<2 0 &gpio0 0 0>, /* A2 */
/* R63 DNP, A3 not connected */
/* <3 0 &gpio1 31 0>,*/ /* A3 */
<4 0 &gpio0 13 0>, /* A4 */
<5 0 &gpio0 14 0>, /* A5 */
<6 0 &gpio1 24 0>, /* D0 */
<7 0 &gpio0 27 0>, /* D1 */
<8 0 &gpio0 15 0>, /* D2 */
<9 0 &gpio1 6 0>, /* D3 */
<10 0 &gpio1 7 0>, /* D4 */
<11 0 &gpio1 4 0>, /* D5 */
<12 0 &gpio1 10 0>, /* D6 */
<13 0 &gpio1 9 0>, /* D7 */
<14 0 &gpio1 8 0>, /* D8 */
<15 0 &gpio1 5 0>, /* D9 */
<16 0 &gpio1 1 0>, /* D10 */
<17 0 &gpio0 26 0>, /* D11 */
<18 0 &gpio1 3 0>, /* D12 */
<19 0 &gpio1 2 0>, /* D13 */
<20 0 &gpio1 21 0>, /* D14 */
<21 0 &gpio1 20 0>; /* D15 */
};
};
&flexcomm0 {
status = "okay";
compatible = "nxp,lpc-usart";
current-speed = <115200>;
pinctrl-0 = <&pinmux_flexcomm0_usart>;
pinctrl-names = "default";
};
&flexcomm4 {
status = "okay";
compatible = "nxp,lpc-i2c";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&pinmux_flexcomm4_i2c>;
pinctrl-names = "default";
fxos8700: fxos8700@1e {
compatible = "nxp,fxos8700";
reg = <0x1e>;
int1-gpios = <&gpio1 26 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
};
};
&can0 {
status = "okay";
pinctrl-0 = <&pinmux_can0>;
pinctrl-names = "default";
can-transceiver {
max-bitrate = <5000000>;
};
};
&hs_lspi {
status = "okay";
pinctrl-0 = <&pinmux_hs_lspi>;
pinctrl-names = "default";
};
&ctimer0 {
status = "okay";
};
&ctimer1 {
status = "okay";
};
&ctimer2 {
status = "okay";
};
&ctimer3 {
status = "okay";
};
&ctimer4 {
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x0 DT_SIZE_K(32)>;
};
slot0_partition: partition@8000 {
label = "image-0";
reg = <0x00008000 DT_SIZE_K(96)>;
};
slot1_partition: partition@20000 {
label = "image-1";
reg = <0x00020000 DT_SIZE_K(96)>;
};
storage_partition: partition@38000 {
label = "storage";
reg = <0x00038000 DT_SIZE_K(20)>;
};
/* The last 12KB are reserved for PFR on the 256KB flash. */
};
};
arduino_i2c: &flexcomm4 {};
arduino_spi: &hs_lspi {};
mikrobus_i2c: &flexcomm4 {};
mikrobus_spi: &hs_lspi {};
``` | /content/code_sandbox/boards/nxp/lpcxpresso55s16/lpcxpresso55s16_common.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,882 |
```unknown
choice MCUBOOT_MODE
default MCUBOOT_MODE_OVERWRITE_ONLY
endchoice
``` | /content/code_sandbox/boards/nxp/lpcxpresso55s16/Kconfig.sysbuild | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 20 |
```unknown
#
config BOARD_LPCXPRESSO55S16
select SOC_LPC55S16
select SOC_PART_NUMBER_LPC55S16JBD100
``` | /content/code_sandbox/boards/nxp/lpcxpresso55s16/Kconfig.lpcxpresso55s16 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 34 |
```yaml
board:
name: lpcxpresso55s16
vendor: nxp
socs:
- name: lpc55s16
``` | /content/code_sandbox/boards/nxp/lpcxpresso55s16/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 34 |
```unknown
#
#
#
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
CONFIG_GPIO=y
CONFIG_PINCTRL=y
CONFIG_ARM_MPU=y
CONFIG_RUNTIME_NMI=y
``` | /content/code_sandbox/boards/nxp/lpcxpresso55s16/lpcxpresso55s16_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 45 |
```yaml
#
#
#
identifier: lpcxpresso55s16
name: NXP LPCXpresso55S16
type: mcu
arch: arm
ram: 96
flash: 256
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- arduino_gpio
- arduino_i2c
- arduino_spi
- can
- counter
- gpio
- i2c
- spi
- usb_device
- usbd
vendor: nxp
``` | /content/code_sandbox/boards/nxp/lpcxpresso55s16/lpcxpresso55s16.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 124 |
```unknown
/*
* NOTE: File generated by gen_board_pinctrl.py
* from LPCXpresso55S16.mex
*
*/
#include <nxp/lpc/LPC55S16JBD100-pinctrl.h>
&pinctrl {
pinmux_can0: pinmux_can0 {
group0 {
pinmux = <CAN0_RD_PIO1_22>,
<CAN0_TD_PIO1_27>;
slew-rate = "standard";
};
};
pinmux_flexcomm0_usart: pinmux_flexcomm0_usart {
group0 {
pinmux = <FC0_RXD_SDA_MOSI_DATA_PIO0_29>,
<FC0_TXD_SCL_MISO_WS_PIO0_30>;
slew-rate = "standard";
};
};
pinmux_flexcomm4_i2c: pinmux_flexcomm4_i2c {
group0 {
pinmux = <FC4_TXD_SCL_MISO_WS_PIO1_20>,
<FC4_RXD_SDA_MOSI_DATA_PIO1_21>;
slew-rate = "standard";
};
};
pinmux_hs_lspi: pinmux_hs_lspi {
group0 {
pinmux = <HS_SPI_MOSI_PIO0_26>,
<HS_SPI_SSEL1_PIO1_1>,
<HS_SPI_SCK_PIO1_2>,
<HS_SPI_MISO_PIO1_3>;
bias-pull-up;
slew-rate = "standard";
};
};
};
``` | /content/code_sandbox/boards/nxp/lpcxpresso55s16/lpcxpresso55s16-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 353 |
```unknown
# LPCXpresso55S16 board
if BOARD_LPCXPRESSO55S16
config FXOS8700_DRDY_INT1
default y
depends on FXOS8700_TRIGGER
if BOOTLOADER_MCUBOOT
choice MCUBOOT_BOOTLOADER_MODE
# Board only supports MCUBoot via "upgrade only" method:
default MCUBOOT_BOOTLOADER_MODE_OVERWRITE_ONLY
endchoice
endif #BOOTLOADER_MCUBOOT
endif # BOARD_LPCXPRESSO55S16
``` | /content/code_sandbox/boards/nxp/lpcxpresso55s16/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 110 |
```unknown
/*
*
*/
/dts-v1/;
#include <nxp/nxp_lpc55S16_ns.dtsi>
#include "lpcxpresso55s16_common.dtsi"
/ {
model = "NXP LPCXpresso55S16 board";
compatible = "nxp,lpc55xxx", "nxp,lpc";
};
/*
* Default for this board is to allocate SRAM0-2 for data. But the
* application can have an application specific device tree to
* allocate the SRAMs differently.
*/
&sram0 {
reg = <0x20000000 DT_SIZE_K(64)>;
};
zephyr_udc0: &usbhs {
status = "okay";
phy_handle = <&usbphy1>;
};
&usbphy1 {
status = "okay";
tx-d-cal = <5>;
tx-cal-45-dp-ohms = <10>;
tx-cal-45-dm-ohms = <10>;
};
``` | /content/code_sandbox/boards/nxp/lpcxpresso55s16/lpcxpresso55s16.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 205 |
```cmake
#
#
#
if(CONFIG_SOC_MIMXRT1176_CM7 OR CONFIG_SECOND_CORE_MCUX)
board_runner_args(pyocd "--target=mimxrt1170_cm7")
board_runner_args(jlink "--device=MIMXRT1176xxxA_M7" "--reset-after-load")
elseif(CONFIG_SOC_MIMXRT1176_CM4)
board_runner_args(pyocd "--target=mimxrt1170_cm4")
# Note: Please use JLINK above V7.50 (Only support run cm4 image when debugging due to default boot core on board is cm7 core)
board_runner_args(jlink "--device=MIMXRT1176xxxA_M4")
endif()
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
``` | /content/code_sandbox/boards/nxp/vmu_rt1170/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 177 |
```c
/*
*
* refer to hal_nxp board file
*
*/
#include <zephyr/init.h>
#include <flexspi_nor_config.h>
/*!
* @brief ROM API init
*
* Get the bootloader api entry address.
*/
void ROM_API_Init(void);
/*!
* @brief Initialize Serial NOR devices via FLEXSPI
*
* This function checks and initializes the FLEXSPI module for the other FLEXSPI APIs.
*
* @param instance storage the instance of FLEXSPI.
* @param config A pointer to the storage for the driver runtime state.
*
* @retval kStatus_Success Api was executed successfully.
* @retval kStatus_InvalidArgument A invalid argument is provided.
* @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided.
* @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout.
* @retval kStatus_ROM_FLEXSPI_DeviceTimeout the device timeout
*/
status_t ROM_FLEXSPI_NorFlash_Init(uint32_t instance, struct flexspi_nor_config_t *config);
#ifdef CONFIG_NXP_IMXRT_BOOT_HEADER
#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
__attribute__((section(".boot_hdr.conf")))
#elif defined(__ICCARM__)
#pragma location = ".boot_hdr.conf"
#endif
/* Config used for booting */
const struct flexspi_nor_config_t Qspiflash_config = {
.memConfig = {
.tag = FLEXSPI_CFG_BLK_TAG,
.version = FLEXSPI_CFG_BLK_VERSION,
.readSampleClkSrc =
kFlexSPIReadSampleClk_LoopbackInternally,
.csHoldTime = 1u,
.csSetupTime = 1u,
.sflashPadType = kSerialFlash_1Pad,
.serialClkFreq = kFlexSpiSerialClk_80MHz,
.sflashA1Size = 64u * 1024u * 1024u,
.lookupTable = {
FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD,
0x03, RADDR_SDR,
FLEXSPI_1PAD, 0x18),
FLEXSPI_LUT_SEQ(READ_SDR, FLEXSPI_1PAD,
0x04, STOP,
FLEXSPI_1PAD, 0),
},
},
.pageSize = 256u,
.sectorSize = 4u * 1024u,
.blockSize = 64u * 1024u,
.isUniformBlockSize = false,
};
#endif /* CONFIG_NXP_IMXRT_BOOT_HEADER */
/* Config used for code execution */
const struct flexspi_nor_config_t g_flash_fast_config = {
.memConfig = {
.tag = FLEXSPI_CFG_BLK_TAG,
.version = FLEXSPI_CFG_BLK_VERSION,
.readSampleClkSrc = kFlexSPIReadSampleClk_ExternalInputFromDqsPad,
.csHoldTime = 1,
.csSetupTime = 1,
.deviceModeCfgEnable = 1,
.deviceModeType = kDeviceConfigCmdType_Spi2Xpi,
.waitTimeCfgCommands = 1,
.deviceModeSeq = {
.seqNum = 1,
.seqId = 6, /* See Lookup table for more details */
.reserved = 0,
},
.deviceModeArg = 2, /* Enable OPI DDR mode */
.controllerMiscOption =
(1u << kFlexSpiMiscOffset_SafeConfigFreqEnable)
| (1u << kFlexSpiMiscOffset_DdrModeEnable),
.deviceType = kFlexSpiDeviceType_SerialNOR,
.sflashPadType = kSerialFlash_8Pads,
.serialClkFreq = kFlexSpiSerialClk_200MHz,
.sflashA1Size = 64ul * 1024u * 1024u,
.busyOffset = 0u,
.busyBitPolarity = 0u,
.lookupTable = {
/* Read */
[0 + 0] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD,
0xEE, CMD_DDR, FLEXSPI_8PAD, 0x11),
[0 + 1] = FLEXSPI_LUT_SEQ(RADDR_DDR, FLEXSPI_8PAD,
0x20, DUMMY_DDR, FLEXSPI_8PAD, 0x28),
[0 + 2] = FLEXSPI_LUT_SEQ(READ_DDR, FLEXSPI_8PAD,
0x04, STOP, FLEXSPI_1PAD, 0x00),
/* Write enable SPI */
[4 * 3 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD,
0x06, STOP, FLEXSPI_1PAD, 0x00),
/*Write Configuration Register 2 =01, Enable OPI DDR mode*/
[4 * 6 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD,
0x72, CMD_SDR, FLEXSPI_1PAD, 0x00),
[4 * 6 + 1] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD,
0x00, CMD_SDR, FLEXSPI_1PAD, 0x00),
[4 * 6 + 2] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD,
0x00, WRITE_SDR, FLEXSPI_1PAD, 0x01),
},
},
.pageSize = 256u,
.sectorSize = 4u * 1024u,
.blockSize = 64u * 1024u,
.isUniformBlockSize = false,
.ipcmdSerialClkFreq = 1,
.serialNorType = 2,
.reserve2[0] = 0x7008200,
};
__ramfunc int imxrt_reclock_initialize(void)
{
const uint32_t instance = 1;
volatile struct flexspi_nor_config_t bootConfig;
memcpy((struct flexspi_nor_config_t *)&bootConfig, &g_flash_fast_config,
sizeof(struct flexspi_nor_config_t));
bootConfig.memConfig.tag = FLEXSPI_CFG_BLK_TAG;
ROM_API_Init();
ROM_FLEXSPI_NorFlash_Init(instance, (struct flexspi_nor_config_t *)&bootConfig);
return 0;
}
SYS_INIT(imxrt_reclock_initialize, PRE_KERNEL_1, 0);
``` | /content/code_sandbox/boards/nxp/vmu_rt1170/flexspi_nor_config.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,476 |
```restructuredtext
.. _lpcxpresso55s16:
NXP LPCXpresso55S16
###################
Overview
********
The LPCXpresso55S16 board provides the ideal platform for evaluation
of the LPC55S1x/LPC551x MCU family, based on the Arm Cortex-M33
architecture. Arduino UNO compatible shield connectors are included,
with additional expansion ports around the Arduino footprint, along
with a PMod/host interface port and MikroElektronika Click module
site.
.. image:: lpcxpresso55S16.jpg
:align: center
:alt: LPCXpresso55S16
Hardware
********
- LPC55S16 Arm Cortex-M33 microcontroller running at up to 150 MHz
- 256 KB flash and 96 KB SRAM on-chip
- LPC-Link2 debug high speed USB probe with VCOM port
- I2C and SPI USB bridging to the LPC device via LPC-Link2 probe
- MikroElektronika Click expansion option
- LPCXpresso expansion connectors compatible with Arduino UNO
- PMod compatible expansion / host connector
- Reset, ISP, wake, and user buttons for easy testing of software functionality
- Tri-color LED
- Full-speed USB device / host port
- High-speed USB device / host port
- UART header for external serial to USB cable
- CAN Transceiver
- Stereo audio codec with in/out line
- NXP FXOS8700CQ accelerometer
For more information about the LPC55S16 SoC and LPCXPresso55S16 board, see:
- `LPC55S16 SoC Website`_
- `LPC55S16 Datasheet`_
- `LPC55S16 User Manual`_
- `LPCXpresso55S16 Website`_
- `LPCXpresso55S16 User Manual`_
- `LPCXpresso55S16 Development Board Design Files`_
Supported Features
==================
The lpcxpresso55s16 board configuration supports the hardware features listed
below. For additional features not yet supported, please also refer to the
:ref:`lpcxpresso55s69` , which is the superset board in NXP's LPC55xx series.
NXP prioritizes enabling the superset board with NXP's Full Platform Support for
Zephyr. Therefore, the lpcxpresso55s69 board may have additional features
already supported, which can also be re-used on this lpcxpresso55s16 board:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+-------------------------------------+
| IOCON | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| USART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| SENSOR | off-chip | fxos8700 trigger |
+-----------+------------+-------------------------------------+
| CLOCK | on-chip | clock_control |
+-----------+------------+-------------------------------------+
| CAN | on-chip | canbus |
+-----------+------------+-------------------------------------+
| RNG | on-chip | entropy; |
| | | random |
+-----------+------------+-------------------------------------+
| IAP | on-chip | flash programming |
+-----------+------------+-------------------------------------+
| COUNTER | on-chip | counter |
+-----------+------------+-------------------------------------+
Other hardware features are not currently enabled.
Currently available targets for this board are:
- *lpcxpresso55s16*
Connections and IOs
===================
The LPC55S16 SoC has IOCON registers, which can be used to configure
the functionality of a pin.
+---------+-----------------+----------------------------+
| Name | Function | Usage |
+=========+=================+============================+
| PIO0_5 | GPIO | ISP SW4 |
+---------+-----------------+----------------------------+
| PIO0_26 | SPI | SPI MOSI |
+---------+-----------------+----------------------------+
| PIO0_29 | USART | USART RX |
+---------+-----------------+----------------------------+
| PIO0_30 | USART | USART TX |
+---------+-----------------+----------------------------+
| PIO1_1 | SPI | SPI SSEL1 |
+---------+-----------------+----------------------------+
| PIO1_2 | SPI | SPI SCK |
+---------+-----------------+----------------------------+
| PIO1_3 | SPI | SPI MISO |
+---------+-----------------+----------------------------+
| PIO1_4 | GPIO | RED LED |
+---------+-----------------+----------------------------+
| PIO1_6 | GPIO | BLUE_LED |
+---------+-----------------+----------------------------+
| PIO1_7 | GPIO | GREEN LED |
+---------+-----------------+----------------------------+
| PIO1_9 | GPIO | USR SW3 |
+---------+-----------------+----------------------------+
| PIO1_18 | GPIO | Wakeup SW1 |
+---------+-----------------+----------------------------+
| PIO1_20 | I2C | I2C SCL |
+---------+-----------------+----------------------------+
| PIO1_21 | I2C | I2C SDA |
+---------+-----------------+----------------------------+
| PIO1_26 | GPIO | FXOS8700 INT1 |
+---------+-----------------+----------------------------+
| PIO1_22 | CAN | CAN RXD |
+---------+-----------------+----------------------------+
| PIO1_27 | CAN | CAN TXD |
+---------+-----------------+----------------------------+
System Clock
============
The LPC55S16 SoC is configured to use PLL1 clocked from the external 24MHz
crystal, running at 144MHz as a source for the system clock. When the flash
controller is enabled, the core clock will be reduced to 96MHz. The application
may reconfigure clocks after initialization, provided that the core clock is
always set to 96MHz when flash programming operations are performed.
Serial Port
===========
The LPC55S16 SoC has 8 FLEXCOMM interfaces for serial
communication. One is configured as USART for the console, one is
configured for I2C, and the remaining are not used.
Programming and Debugging
*************************
Build and flash applications as usual (see :ref:`build_an_application`
and :ref:`application_run` for more details).
Configuring a Debug Probe
=========================
A debug probe is used for both flashing and debugging the board. This
board is configured by default to use the LPC-Link2 CMSIS-DAP Onboard
Debug Probe, however the :ref:`pyocd-debug-host-tools` does not yet
support the LPC55S16 so you must reconfigure the board for one of the
J-Link debug probe instead.
First install the :ref:`jlink-debug-host-tools` and make sure they are
in your search path.
Then follow the instructions in
:ref:`lpclink2-jlink-onboard-debug-probe` to program the J-Link
firmware. Please make sure you have the latest firmware for this
board.
Configuring a Console
=====================
Connect a USB cable from your PC to J1 (LINK2), and use the serial
terminal of your choice (minicom, putty, etc.) with the following
settings:
- Speed: 115200
- Data: 8 bits
- Parity: None
- Stop bits: 1
Flashing
========
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: lpcxpresso55s16
:goals: flash
Open a serial terminal, reset the board (press the RESET button), and you should
see the following message in the terminal:
.. code-block:: console
***** Booting Zephyr OS v2.2.0 *****
Hello World! lpcxpresso55s16
Debugging
=========
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: lpcxpresso55s16
:goals: debug
Open a serial terminal, step through the application in your debugger, and you
should see the following message in the terminal:
.. code-block:: console
***** Booting Zephyr OS zephyr-v2.2.0 *****
Hello World! lpcxpresso55s16
.. _LPC55S16 SoC Website:
path_to_url
.. _LPC55S16 Datasheet:
path_to_url
.. _LPC55S16 User Manual:
path_to_url
.. _LPCxpresso55S16 Website:
path_to_url
.. _LPCXpresso55S16 User Manual:
path_to_url
.. _LPCXpresso55S16 Development Board Design Files:
path_to_url
``` | /content/code_sandbox/boards/nxp/lpcxpresso55s16/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,080 |
```unknown
config BOARD_VMU_RT1170
select SOC_MIMXRT1176_CM7 if BOARD_VMU_RT1170_MIMXRT1176_CM7
select SOC_PART_NUMBER_MIMXRT1176DVMAA
``` | /content/code_sandbox/boards/nxp/vmu_rt1170/Kconfig.vmu_rt1170 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 50 |
```unknown
/*
*
*/
#include "vmu_rt1170-pinctrl.dtsi"
#include <nxp/nxp_rt1170.dtsi>
/ {
aliases {
led0 = &green_led;
led1 = &red_led;
led2 = &blue_led;
sdhc0 = &usdhc1;
};
leds {
compatible = "gpio-leds";
green_led: led-1 {
gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
label = "Green LED";
};
red_led: led-2 {
gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
label = "Red LED";
};
blue_led: led-3 {
gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
label = "Blue LED";
};
};
};
&semc {
status = "disabled";
};
&lpuart1 {
status = "okay";
pinctrl-0 = <&pinmux_lpuart1>;
pinctrl-names = "default";
current-speed = <115200>;
};
&lpuart3 {
status = "okay";
pinctrl-0 = <&pinmux_lpuart3>;
pinctrl-names = "default";
current-speed = <115200>;
};
&lpuart4 {
status = "okay";
pinctrl-0 = <&pinmux_lpuart4>;
pinctrl-names = "default";
current-speed = <115200>;
};
&lpuart5 {
status = "okay";
pinctrl-0 = <&pinmux_lpuart5>;
pinctrl-names = "default";
current-speed = <115200>;
};
&lpuart6 {
status = "okay";
pinctrl-0 = <&pinmux_lpuart6>;
pinctrl-names = "default";
current-speed = <115200>;
};
&lpuart8 {
status = "okay";
pinctrl-0 = <&pinmux_lpuart8>;
pinctrl-names = "default";
current-speed = <115200>;
};
&lpuart10 {
status = "okay";
pinctrl-0 = <&pinmux_lpuart10>;
pinctrl-names = "default";
current-speed = <115200>;
};
&lpuart11 {
status = "okay";
pinctrl-0 = <&pinmux_lpuart11>;
pinctrl-names = "default";
current-speed = <115200>;
};
&green_led {
status = "okay";
};
&enet1g_mac {
pinctrl-0 = <&pinmux_enet1g>;
pinctrl-names = "default";
phy-handle = <&enet1g_phy>;
phy-connection-type = "rmii";
zephyr,random-mac-address;
};
&enet1g_mdio {
pinctrl-0 = <&pinmux_enet1g_mdio>;
pinctrl-names = "default";
enet1g_phy: phy@1 {
compatible = "nxp,tja1103";
reg = <1>;
master-slave = "master";
};
};
&enet1g_ptp_clock {
pinctrl-0 = <&pinmux_enet1g_ptp>;
pinctrl-names = "default";
};
&flexcan1 {
pinctrl-0 = <&pinmux_flexcan1>;
pinctrl-names = "default";
};
&flexcan2 {
pinctrl-0 = <&pinmux_flexcan2>;
pinctrl-names = "default";
};
&flexcan3 {
pinctrl-0 = <&pinmux_flexcan3>;
pinctrl-names = "default";
};
&lpi2c1 {
pinctrl-0 =<&pinmux_lpi2c1>;
pinctrl-names = "default";
};
&lpi2c2 {
pinctrl-0 =<&pinmux_lpi2c2>;
pinctrl-names = "default";
};
&lpi2c3 {
pinctrl-0 =<&pinmux_lpi2c3>;
pinctrl-names = "default";
};
&lpi2c6 {
pinctrl-0 =<&pinmux_lpi2c6>;
pinctrl-names = "default";
};
&lpspi1 {
pinctrl-0 = <&pinmux_lpspi1>;
pinctrl-names = "default";
};
&lpspi2 {
pinctrl-0 = <&pinmux_lpspi2>;
pinctrl-names = "default";
};
&lpspi3 {
pinctrl-0 = <&pinmux_lpspi3>;
pinctrl-names = "default";
};
&lpspi6 {
pinctrl-0 = <&pinmux_lpspi6>;
pinctrl-names = "default";
};
&lpadc1 {
pinctrl-0 = <&pinmux_lpadc1>;
pinctrl-names = "default";
};
&flexspi {
pinctrl-0 = <&pinmux_flexspi1>;
pinctrl-names = "default";
};
&usdhc1 {
pinctrl-0 = <&pinmux_usdhc1>;
pinctrl-names = "default";
};
&flexspi {
status = "okay";
ahb-prefetch;
ahb-read-addr-opt;
rx-clock-source = <1>;
reg = <0x400cc000 0x4000>, <0x30000000 DT_SIZE_M(64)>;
mx25um51345g: mx25um51345g@0 {
compatible = "nxp,imx-flexspi-mx25um51345g";
/* MX25UM51245G is 64MB, 512MBit flash part */
size = <DT_SIZE_M(64 * 8)>;
reg = <0>;
spi-max-frequency = <200000000>;
status = "okay";
jedec-id = [c2 81 3a];
erase-block-size = <4096>;
write-block-size = <16>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 DT_SIZE_K(128)>;
};
/* The MCUBoot swap-move algorithm uses the last 14 sectors
* of the primary slot0 for swap status and move.
*/
slot0_partition: partition@20000 {
label = "image-0";
reg = <0x00020000 (DT_SIZE_M(3) + DT_SIZE_K(56))>;
};
slot1_partition: partition@32E000 {
label = "image-1";
reg = <0x0032E000 DT_SIZE_M(3)>;
};
storage_partition: partition@62E000 {
label = "storage";
reg = <0x0062E000 (DT_SIZE_M(58) - DT_SIZE_K(184))>;
};
};
};
};
``` | /content/code_sandbox/boards/nxp/vmu_rt1170/vmu_rt1170.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,555 |
```yaml
board:
name: vmu_rt1170
vendor: nxp
socs:
- name: mimxrt1176
``` | /content/code_sandbox/boards/nxp/vmu_rt1170/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```unknown
/*
*
* Note: File generated by gen_board_pinctrl.py
* from vmu_rt1170.mex, then updated manually
*/
#include <nxp/nxp_imx/rt/mimxrt1176dvmaa-pinctrl.dtsi>
&pinctrl {
pinmux_enet1g: pinmux_enet1g {
group0 {
pinmux = <&iomuxc_gpio_disp_b1_00_enet_1g_rx_en>,
<&iomuxc_gpio_disp_b1_01_enet_1g_rx_er>;
drive-strength = "high";
bias-pull-down;
slew-rate = "fast";
};
group1 {
pinmux = <&iomuxc_gpio_emc_b2_15_enet_1g_rdata00>,
<&iomuxc_gpio_emc_b2_16_enet_1g_rdata01>;
drive-strength = "high";
bias-pull-down;
slew-rate = "fast";
input-enable;
};
group2 {
pinmux = <&iomuxc_gpio_disp_b1_09_enet_1g_tdata00>,
<&iomuxc_gpio_disp_b1_08_enet_1g_tdata01>,
<&iomuxc_gpio_disp_b1_10_enet_1g_tx_en>;
drive-strength = "high";
slew-rate = "fast";
};
group3 {
pinmux = <&iomuxc_gpio_disp_b1_11_enet_1g_ref_clk1>;
drive-strength = "high";
slew-rate = "fast";
input-enable;
bias-pull-down;
};
};
pinmux_enet1g_mdio: pinmux_enet1g_mdio {
group0 {
pinmux = <&iomuxc_gpio_emc_b2_19_enet_1g_mdc>,
<&iomuxc_gpio_emc_b2_20_enet_1g_mdio>;
drive-strength = "high";
slew-rate = "fast";
};
group1 {
pinmux = <&iomuxc_gpio_disp_b2_09_gpio_mux5_io10>;
drive-strength = "high";
bias-pull-down;
slew-rate = "fast";
};
};
pinmux_enet1g_ptp: pinmux_enet1g_ptp {
};
pinmux_flexcan1: pinmux_flexcan1 {
group0 {
pinmux = <&iomuxc_gpio_ad_07_can1_rx>,
<&iomuxc_gpio_ad_06_can1_tx>;
drive-strength = "high";
slew-rate = "fast";
};
};
pinmux_flexcan2: pinmux_flexcan2 {
group0 {
pinmux = <&iomuxc_gpio_ad_01_can2_rx>,
<&iomuxc_gpio_ad_00_can2_tx>;
drive-strength = "high";
slew-rate = "fast";
};
};
pinmux_flexcan3: pinmux_flexcan3 {
group0 {
pinmux = <&iomuxc_lpsr_gpio_lpsr_01_can3_rx>,
<&iomuxc_lpsr_gpio_lpsr_00_can3_tx>;
drive-strength = "high";
slew-rate = "fast";
};
};
/* pwm pins for vmu and io ports */
pinmux_flexpwm_vmu_ch1: pinmux_flexpwm_vmu_ch1 {
group0 {
pinmux = <&iomuxc_gpio_emc_b1_23_flexpwm1_pwm0_a>;
slew-rate = "fast";
};
};
pinmux_flexpwm_vmu_ch2: pinmux_flexpwm_vmu_ch2 {
group0 {
pinmux = <&iomuxc_gpio_emc_b1_25_flexpwm1_pwm1_a>;
slew-rate = "fast";
};
};
pinmux_flexpwm_vmu_ch3: pinmux_flexpwm_vmu_ch3 {
group0 {
pinmux = <&iomuxc_gpio_emc_b1_27_flexpwm1_pwm2_a>;
slew-rate = "fast";
};
};
pinmux_flexpwm_vmu_ch4: pinmux_flexpwm_vmu_ch4 {
group0 {
pinmux = <&iomuxc_gpio_emc_b1_06_flexpwm2_pwm0_a>;
slew-rate = "fast";
};
};
pinmux_flexpwm_vmu_ch5: pinmux_flexpwm_vmu_ch5 {
group0 {
pinmux = <&iomuxc_gpio_emc_b1_08_flexpwm2_pwm1_a>;
slew-rate = "fast";
};
};
pinmux_flexpwm_vmu_ch6: pinmux_flexpwm_vmu_ch6 {
group0 {
pinmux = <&iomuxc_gpio_emc_b1_10_flexpwm2_pwm2_a>;
slew-rate = "fast";
};
};
pinmux_flexpwm_vmu_ch7: pinmux_flexpwm_vmu_ch7 {
group0 {
pinmux = <&iomuxc_gpio_emc_b1_19_flexpwm2_pwm3_a>;
slew-rate = "fast";
};
};
pinmux_flexpwm_vmu_ch8: pinmux_flexpwm_vmu_ch8 {
group0 {
pinmux = <&iomuxc_gpio_emc_b1_29_flexpwm3_pwm0_a>;
slew-rate = "fast";
};
};
pinmux_user: pinmux_user {
group0 {
pinmux = <&iomuxc_gpio_emc_b1_24_gpio_mux1_io24>;
};
};
pinmux_flexspi1: pinmux_flexspi1 {
group0 {
pinmux = <&iomuxc_gpio_sd_b2_05_flexspi1_a_dqs>,
<&iomuxc_gpio_sd_b2_06_flexspi1_a_ss0_b>,
<&iomuxc_gpio_sd_b2_07_flexspi1_a_sclk>,
<&iomuxc_gpio_sd_b2_08_flexspi1_a_data00>,
<&iomuxc_gpio_sd_b2_09_flexspi1_a_data01>,
<&iomuxc_gpio_sd_b2_10_flexspi1_a_data02>,
<&iomuxc_gpio_sd_b2_11_flexspi1_a_data03>;
bias-pull-down;
input-enable;
};
};
pinmux_gpt_ppm: pinmux_gpt_ppm {
group0 {
pinmux = <&iomuxc_gpio_emc_b1_09_gpt5_capture1>;
drive-strength = "high";
slew-rate = "fast";
};
};
pinmux_qtmr_pwm_buzzer: pinmux_qtmr_pwm_buzzer {
group0 {
pinmux = <&iomuxc_gpio_emc_b2_09_qtimer1_timer0>;
drive-strength = "high";
slew-rate = "fast";
};
};
pinmux_lpadc1: pinmux_lpadc1 {
group0 {
pinmux = <&iomuxc_gpio_ad_10_adc1_ch2a>;
drive-strength = "normal";
slew-rate = "slow";
};
};
pinmux_lpi2c1: pinmux_lpi2c1 {
group0 {
pinmux = <&iomuxc_gpio_ad_08_lpi2c1_scl>,
<&iomuxc_gpio_ad_09_lpi2c1_sda>;
drive-strength = "normal";
drive-open-drain;
slew-rate = "fast";
input-enable;
};
};
pinmux_lpi2c2: pinmux_lpi2c2 {
group0 {
pinmux = <&iomuxc_gpio_ad_18_lpi2c2_scl>,
<&iomuxc_gpio_ad_19_lpi2c2_sda>,
<&iomuxc_gpio_emc_b1_35_gpio_mux2_io03>;
drive-strength = "normal";
drive-open-drain;
slew-rate = "fast";
input-enable;
};
};
pinmux_lpi2c3: pinmux_lpi2c3 {
group0 {
pinmux = <&iomuxc_gpio_disp_b2_10_lpi2c3_scl>,
<&iomuxc_gpio_disp_b2_11_lpi2c3_sda>;
drive-strength = "normal";
drive-open-drain;
slew-rate = "fast";
input-enable;
};
};
pinmux_lpi2c6: pinmux_lpi2c6 {
group0 {
pinmux = <&iomuxc_lpsr_gpio_lpsr_07_lpi2c6_scl>,
<&iomuxc_lpsr_gpio_lpsr_06_lpi2c6_sda>;
drive-strength = "normal";
drive-open-drain;
slew-rate = "fast";
input-enable;
};
};
pinmux_lpspi1: pinmux_lpspi1 {
group0 {
pinmux = <&iomuxc_gpio_emc_b2_01_gpio_mux2_io11>,
<&iomuxc_gpio_emc_b2_00_lpspi1_sck>,
<&iomuxc_gpio_emc_b2_03_lpspi1_sdi>,
<&iomuxc_gpio_emc_b2_02_lpspi1_sdo>,
<&iomuxc_gpio_ad_20_gpio_mux3_io19>;
drive-strength = "high";
slew-rate = "fast";
};
};
pinmux_lpspi2: pinmux_lpspi2 {
group0 {
pinmux = <&iomuxc_gpio_ad_25_gpio_mux3_io24>,
<&iomuxc_gpio_ad_24_lpspi2_sck>,
<&iomuxc_gpio_ad_27_lpspi2_sdi>,
<&iomuxc_gpio_ad_26_lpspi2_sdo>,
<&iomuxc_gpio_emc_b1_39_gpio_mux2_io07>;
drive-strength = "high";
slew-rate = "fast";
};
};
pinmux_lpspi3: pinmux_lpspi3 {
group0 {
pinmux = <&iomuxc_gpio_emc_b2_04_lpspi3_sck>,
<&iomuxc_gpio_emc_b2_07_lpspi3_sdi>,
<&iomuxc_gpio_emc_b2_06_lpspi3_sdo>,
<&iomuxc_gpio_emc_b2_05_gpio_mux2_io15>,
<&iomuxc_gpio_emc_b2_08_gpio_mux2_io18>,
<&iomuxc_gpio_ad_21_gpio_mux3_io20>,
<&iomuxc_gpio_emc_b2_18_gpio_mux2_io28>;
drive-strength = "high";
slew-rate = "fast";
};
};
pinmux_lpspi6: pinmux_lpspi6 {
group0 {
pinmux = <&iomuxc_lpsr_gpio_lpsr_09_lpspi6_pcs0>,
<&iomuxc_lpsr_gpio_lpsr_10_lpspi6_sck>,
<&iomuxc_lpsr_gpio_lpsr_12_lpspi6_sdi>,
<&iomuxc_lpsr_gpio_lpsr_11_lpspi6_sdo>;
drive-strength = "high";
slew-rate = "fast";
};
};
pinmux_lpuart1: pinmux_lpuart1 {
group0 {
pinmux = <&iomuxc_gpio_disp_b1_03_lpuart1_rx>,
<&iomuxc_gpio_disp_b1_02_lpuart1_tx>;
drive-strength = "high";
bias-pull-up;
slew-rate = "fast";
};
};
pinmux_lpuart3: pinmux_lpuart3 {
group0 {
pinmux = <&iomuxc_gpio_ad_31_lpuart3_rx>,
<&iomuxc_gpio_ad_30_lpuart3_tx>;
drive-strength = "high";
bias-pull-up;
slew-rate = "fast";
};
};
pinmux_lpuart4: pinmux_lpuart4 {
group0 {
pinmux = <&iomuxc_gpio_disp_b1_04_lpuart4_rx>,
<&iomuxc_gpio_disp_b1_06_lpuart4_tx>;
drive-strength = "high";
bias-pull-up;
slew-rate = "fast";
};
};
pinmux_lpuart5: pinmux_lpuart5 {
group0 {
pinmux = <&iomuxc_gpio_ad_29_lpuart5_rx>,
<&iomuxc_gpio_ad_28_lpuart5_tx>;
drive-strength = "high";
bias-pull-up;
slew-rate = "fast";
};
};
pinmux_lpuart6: pinmux_lpuart6 {
group0 {
pinmux = <&iomuxc_gpio_emc_b1_41_lpuart6_rx>,
<&iomuxc_gpio_emc_b1_40_lpuart6_tx>;
drive-strength = "high";
bias-pull-up;
slew-rate = "fast";
};
};
pinmux_lpuart8: pinmux_lpuart8 {
group0 {
pinmux = <&iomuxc_gpio_ad_03_lpuart8_rx>,
<&iomuxc_gpio_ad_02_lpuart8_tx>;
drive-strength = "high";
bias-pull-up;
slew-rate = "fast";
};
};
pinmux_lpuart10: pinmux_lpuart10 {
group0 {
pinmux = <&iomuxc_gpio_ad_33_lpuart10_rx>,
<&iomuxc_gpio_ad_15_lpuart10_tx>;
drive-strength = "high";
bias-pull-up;
slew-rate = "fast";
};
};
pinmux_lpuart11: pinmux_lpuart11 {
group0 {
pinmux = <&iomuxc_lpsr_gpio_lpsr_05_lpuart11_rx>,
<&iomuxc_lpsr_gpio_lpsr_04_lpuart11_tx>;
drive-strength = "high";
bias-pull-up;
slew-rate = "fast";
};
};
pinmux_usdhc1: pinmux_usdhc1 {
group0 {
pinmux = <&iomuxc_gpio_sd_b1_00_usdhc1_cmd>,
<&iomuxc_gpio_sd_b1_02_usdhc1_data0>,
<&iomuxc_gpio_sd_b1_03_usdhc1_data1>,
<&iomuxc_gpio_sd_b1_04_usdhc1_data2>,
<&iomuxc_gpio_sd_b1_05_usdhc1_data3>,
<&iomuxc_gpio_sd_b1_01_usdhc1_clk>;
bias-pull-up;
input-enable;
};
};
};
``` | /content/code_sandbox/boards/nxp/vmu_rt1170/vmu_rt1170-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 3,573 |
```unknown
# VMU_RT1170 board
if BOARD_VMU_RT1170
if DISK_DRIVERS
config IMX_USDHC_DAT3_PWR_TOGGLE
default y
endif # DISK_DRIVERS
if FLASH_MCUX_FLEXSPI_XIP && MEMC_MCUX_FLEXSPI
choice FLASH_MCUX_FLEXSPI_XIP_MEM_TARGET
default FLASH_MCUX_FLEXSPI_XIP_MEM_ITCM if CPU_CORTEX_M7
default FLASH_MCUX_FLEXSPI_XIP_MEM_SRAM if CPU_CORTEX_M4
endchoice
endif # FLASH_MCUX_FLEXSPI_XIP && MEMC_MCUX_FLEXSPI
if NETWORKING
config NET_L2_ETHERNET
default y if CPU_CORTEX_M7 # No cache memory support is required for driver
config ETH_MCUX_RMII_EXT_CLK
default y
endif # NETWORKING
endif # BOARD_VMU_RT1170
``` | /content/code_sandbox/boards/nxp/vmu_rt1170/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 190 |
```unknown
#
#
#
CONFIG_CONSOLE=y
CONFIG_SHELL=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_GPIO=y
CONFIG_ARM_MPU=y
CONFIG_HW_STACK_PROTECTION=y
CONFIG_FLEXSPI_CONFIG_BLOCK_OFFSET=0x400
CONFIG_PINCTRL=y
# Enable Regulators
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_INIT_PRIORITY=75
CONFIG_TICKLESS_KERNEL=n
``` | /content/code_sandbox/boards/nxp/vmu_rt1170/vmu_rt1170_mimxrt1176_cm7_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 81 |
```yaml
#
#
#
identifier: vmu_rt1170/mimxrt1176/cm7
name: NXP VMU RT1170
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 256
flash: 65536
supported:
- adc
- counter
- can
- dma
- gpio
- hwinfo
- i2c
- netif:eth
- pwm
- spi
- usb_device
- watchdog
vendor: nxp
``` | /content/code_sandbox/boards/nxp/vmu_rt1170/vmu_rt1170.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 133 |
```unknown
/*
*
*/
/dts-v1/;
#include <nxp/nxp_rt11xx_cm7.dtsi>
#include <zephyr/dt-bindings/led/led.h>
#include "vmu_rt1170.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "NXP VMU RT1170";
compatible = "nxp,mimxrt1176";
aliases {
led0 = &green_led;
led1 = &red_led;
watchdog0 = &wdog1;
sdhc0 = &usdhc1;
sw0 = &arming_button;
pwm-led0 = &buzzer0;
};
chosen {
zephyr,sram = &ocram1; /* TODO Merge with other OCRAM */
zephyr,sram1 = &ocram2; /* TODO Merge with other OCRAM */
zephyr,dtcm = &dtcm;
zephyr,itcm = &itcm;
zephyr,console = &lpuart1;
zephyr,shell-uart = &lpuart1;
zephyr,canbus = &flexcan1;
zephyr,flash-controller = &mx25um51345g;
zephyr,flash = &mx25um51345g;
zephyr,code-partition = &slot0_partition;
};
/* This is the Arming Button on the included GPS module for 10 pin JST-GH */
gpio_keys {
compatible = "gpio-keys";
arming_button: button_0 {
label = "Arming Switch";
gpios = <&gpio1 24 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>;
zephyr,code = <INPUT_KEY_0>;
};
};
/* This regulator controls VDD_5V_PERIPH onboard supply */
reg-5v-periph {
compatible = "regulator-fixed";
regulator-name = "reg-5v-periph";
enable-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
regulator-always-on;
status = "okay";
};
/* This regulator controls VDD_5V_HIPOWER onboard supply */
reg-5v-hipower {
compatible = "regulator-fixed";
regulator-name = "reg-5v-hipower";
enable-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
regulator-always-on;
status = "okay";
};
/* This regulator controls the VDD_3V3_SENSORS1 onboard supply. */
reg-3v3-sensors-1 {
compatible = "regulator-fixed";
regulator-name = "reg-3v3-sensors-1";
enable-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
startup-delay-us = <2000>;
regulator-always-on;
status = "okay";
};
/* This regulator controls the VDD_3V3_SENSORS2 onboard supply. */
reg-3v3-sensors-2 {
compatible = "regulator-fixed";
regulator-name = "reg-3v3-sensors-2";
enable-gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
startup-delay-us = <2000>;
regulator-always-on;
status = "okay";
};
/* This regulator controls the VDD_3V3_SENSORS3 onboard supply. */
reg-3v3-sensors-3 {
compatible = "regulator-fixed";
regulator-name = "reg-3v3-sensors-3";
enable-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
startup-delay-us = <2000>;
regulator-always-on;
status = "okay";
};
/* This regulator controls the VDD_3V3_SENSORS4 onboard supply. */
reg-3v3-sensors-4 {
compatible = "regulator-fixed";
regulator-name = "reg-3v3-sensors-4";
enable-gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>;
startup-delay-us = <2000>;
regulator-always-on;
status = "okay";
};
/* This regulator controls VDD_3V3_SPEKTRUM onboard supply */
reg-3v3-spektrum {
compatible = "regulator-fixed";
regulator-name = "reg-3v3-spektrum";
enable-gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
regulator-always-on;
status = "okay";
};
/* This regulator controls ETH_VDD_3V3 supply to power up the TJA1103 PHY */
reg-eth-power {
compatible = "regulator-fixed";
regulator-name = "reg-eth-power";
enable-gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>;
regulator-always-on;
status = "okay";
};
pwm_shell: pwm_shell {
compatible = "pwm-leds";
buzzer0: buzzer0 {
pwms = <&qtmr1 0 PWM_HZ(50) PWM_POLARITY_NORMAL>;
};
};
};
&gpio1 {
status = "okay";
};
&gpio2 {
status = "okay";
};
&gpio3 {
status = "okay";
};
&gpio4 {
status = "okay";
};
&gpio5 {
status = "okay";
};
&gpio6 {
status = "okay";
};
&gpio7 {
status = "okay";
};
&gpio8 {
status = "okay";
};
&gpio9 {
status = "okay";
};
&lpuart1 {
status = "okay";
current-speed = <115200>;
};
&lpuart4 {
status = "okay";
current-speed = <115200>;
};
&lpuart6 {
status = "okay";
single-wire;
rx-invert;
sbus {
compatible = "futaba,sbus";
right_stick_x {
channel = <1>;
type = <INPUT_EV_ABS>;
zephyr,code = <INPUT_ABS_RX>;
};
right_stick_y {
channel = <2>;
type = <INPUT_EV_ABS>;
zephyr,code = <INPUT_ABS_RY>;
};
left_stick_y {
channel = <3>;
type = <INPUT_EV_ABS>;
zephyr,code = <INPUT_ABS_Y>;
};
left_stick_x {
channel = <4>;
type = <INPUT_EV_ABS>;
zephyr,code = <INPUT_ABS_X>;
};
kill_switch {
channel = <5>;
type = <INPUT_EV_KEY>;
zephyr,code = <INPUT_KEY_0>;
};
};
};
&flexcan1 {
status = "okay";
pinctrl-0 = <&pinmux_flexcan1>;
pinctrl-names = "default";
can-transceiver {
max-bitrate = <5000000>;
};
};
&flexcan2 {
status = "okay";
pinctrl-0 = <&pinmux_flexcan2>;
pinctrl-names = "default";
can-transceiver {
max-bitrate = <5000000>;
};
};
&flexcan3 {
status = "okay";
pinctrl-0 = <&pinmux_flexcan3>;
pinctrl-names = "default";
can-transceiver {
max-bitrate = <5000000>;
};
};
#include <zephyr/dt-bindings/sensor/icm42688.h>
&lpspi1 {
status = "okay";
cs-gpios =<&gpio2 11 GPIO_ACTIVE_LOW>;
icm42688_0: icm42688p0@0 {
compatible = "invensense,icm42688";
reg = <0>;
int-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
spi-max-frequency = <24000000>;
accel-pwr-mode = <ICM42688_DT_ACCEL_LN>;
accel-odr = <ICM42688_DT_ACCEL_ODR_1000>;
accel-fs = <ICM42688_DT_ACCEL_FS_16>;
gyro-pwr-mode = <ICM42688_DT_GYRO_LN>;
gyro-odr = <ICM42688_DT_GYRO_ODR_1000>;
gyro-fs = <ICM42688_DT_GYRO_FS_2000>;
};
};
&lpspi2 {
status = "okay";
cs-gpios =<&gpio3 24 GPIO_ACTIVE_LOW>;
icm42688_1: icm42688p1@0 {
compatible = "invensense,icm42688";
reg = <0>;
int-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>;
spi-max-frequency = <24000000>;
accel-pwr-mode = <ICM42688_DT_ACCEL_LN>;
accel-odr = <ICM42688_DT_ACCEL_ODR_1000>;
accel-fs = <ICM42688_DT_ACCEL_FS_16>;
gyro-pwr-mode = <ICM42688_DT_GYRO_LN>;
gyro-odr = <ICM42688_DT_GYRO_ODR_1000>;
gyro-fs = <ICM42688_DT_GYRO_FS_2000>;
};
};
&lpspi3 {
status = "okay";
cs-gpios = <&gpio2 15 GPIO_ACTIVE_LOW>,
<&gpio2 18 GPIO_ACTIVE_LOW>;
bmi08x_accel: bmi08x@0 {
compatible = "bosch,bmi08x-accel";
reg = <0>;
int-gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
spi-max-frequency = <10000000>;
int1-map-io = <0x01>;
int2-map-io = <0x00>;
int1-conf-io = <0x04>;
int2-conf-io = <0x00>;
accel-hz = "800";
accel-fs = <24>;
};
bmi08x_gyro: bmi08x@1 {
compatible = "bosch,bmi08x-gyro";
reg = <1>;
int-gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>;
spi-max-frequency = <10000000>;
int3-4-map-io = <0x01>;
int3-4-conf-io = <0x02>;
gyro-hz = "1000_116";
gyro-fs = <1000>;
};
};
&lpspi6 {
status = "okay";
};
&lpi2c1 {
status = "okay";
ist8310: ist8310@e {
compatible = "isentek,ist8310";
reg = <0xe>;
};
ncp5623c: ncp5623c@39 {
compatible = "onnn,ncp5623c";
reg = <0x39>;
led_0 {
label = "GNSS LED";
index = <0>;
color-mapping =
<LED_COLOR_ID_RED>,
<LED_COLOR_ID_GREEN>,
<LED_COLOR_ID_BLUE>;
};
};
};
&lpi2c2 {
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
bmp388_0: bmp388@76 {
compatible = "bosch,bmp388";
int-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
reg = <0x76>;
status = "okay";
odr = "50";
osr-press = <4>;
osr-temp = <2>;
};
};
&lpi2c3 {
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
bmm150: bmm150@10 {
compatible = "bosch,bmm150";
status = "okay";
reg = <0x10>;
};
bmp388_1: bmp388@77 {
compatible = "bosch,bmp388";
reg = <0x77>;
status = "okay";
odr = "50";
osr-press = <4>;
osr-temp = <2>;
};
};
&lpi2c6 {
status = "okay";
};
&flexpwm1_pwm0 {
status = "okay";
pinctrl-0 = <&pinmux_flexpwm_vmu_ch1>;
pinctrl-names = "default";
nxp,prescaler = <64>;
};
&flexpwm1_pwm1 {
status = "okay";
pinctrl-0 = <&pinmux_flexpwm_vmu_ch2>;
pinctrl-names = "default";
nxp,prescaler = <64>;
};
&flexpwm1_pwm2 {
status = "okay";
pinctrl-0 = <&pinmux_flexpwm_vmu_ch3>;
pinctrl-names = "default";
nxp,prescaler = <64>;
};
&flexpwm2_pwm0 {
status = "okay";
pinctrl-0 = <&pinmux_flexpwm_vmu_ch4>;
pinctrl-names = "default";
nxp,prescaler = <64>;
};
&flexpwm2_pwm1 {
status = "okay";
pinctrl-0 = <&pinmux_flexpwm_vmu_ch5>;
pinctrl-names = "default";
nxp,prescaler = <64>;
};
&flexpwm2_pwm2 {
status = "okay";
pinctrl-0 = <&pinmux_flexpwm_vmu_ch6>;
pinctrl-names = "default";
nxp,prescaler = <64>;
};
&flexpwm2_pwm3 {
status = "okay";
pinctrl-0 = <&pinmux_flexpwm_vmu_ch7>;
pinctrl-names = "default";
nxp,prescaler = <64>;
};
&flexpwm3_pwm0 {
status = "okay";
pinctrl-0 = <&pinmux_flexpwm_vmu_ch8>;
pinctrl-names = "default";
nxp,prescaler = <64>;
};
&gpt5 {
compatible = "nxp,gpt-ppm-input";
pinctrl-0 = <&pinmux_gpt_ppm>;
pinctrl-names = "default";
capture-channel = <1>;
};
&qtmr1 {
compatible = "nxp,qtmr-pwm";
pinctrl-0 = <&pinmux_qtmr_pwm_buzzer>;
pinctrl-names = "default";
#pwm-cells = <3>;
prescaler = <128>;
status = "okay";
};
&usdhc1 {
status = "okay";
no-1-8-v;
pwr-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
cd-gpios = <&gpio3 31 (GPIO_ACTIVE_LOW | GPIO_PULL_DOWN)>;
sdmmc {
compatible = "zephyr,sdmmc-disk";
status = "okay";
};
};
&edma0 {
status = "okay";
};
&lpadc1 {
status = "okay";
};
/* GPT and Systick are enabled. If power management is enabled, the GPT
* timer will be used instead of systick, as allows the core clock to
* be gated.
*/
&gpt_hw_timer {
status = "disabled";
};
&systick {
status = "okay";
};
&wdog1 {
status = "okay";
};
&enet1g {
status = "okay";
};
&enet1g_mac {
status = "okay";
};
&enet1g_mdio {
status = "okay";
enet1g_phy: phy@1 {
status = "okay";
int-gpios = <&gpio5 10 GPIO_ACTIVE_HIGH>;
};
};
zephyr_udc0: &usb1 {
status = "okay";
};
``` | /content/code_sandbox/boards/nxp/vmu_rt1170/vmu_rt1170_mimxrt1176_cm7.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 3,509 |
```unknown
/*
*
*/
/dts-v1/;
#include <nxp/nxp_imx8ml_m7.dtsi>
#include "imx8mp_evk-pinctrl.dtsi"
/ {
model = "NXP i.MX8M Plus EVK board";
compatible = "nxp,mimx8mp_evk";
chosen {
/* DDR */
zephyr,flash = &ddr_code;
zephyr,sram = &ddr_sys;
zephyr,console = &uart4;
zephyr,shell-uart = &uart4;
};
};
&uart4 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart4_default>;
pinctrl-names = "default";
};
&gpio3 {
status = "okay";
};
&mailbox0 {
status = "okay";
};
``` | /content/code_sandbox/boards/nxp/imx8mp_evk/imx8mp_evk_mimx8ml8_m7_ddr.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 188 |
```unknown
/*
*
*/
/dts-v1/;
#include <nxp/nxp_mimx8mp_a53.dtsi>
#include "imx8mp_evk-pinctrl.dtsi"
/ {
model = "NXP i.MX8MP A53";
compatible = "fsl,mimx8mp";
chosen {
zephyr,console = &uart4;
zephyr,shell-uart = &uart4;
zephyr,sram = &sram0;
};
cpus {
cpu@0 {
status = "disabled";
};
cpu@1 {
status = "disabled";
};
};
psci {
compatible = "arm,psci-0.2";
method = "smc";
};
sram0: memory@c0000000 {
reg = <0xc0000000 DT_SIZE_M(1)>;
};
};
&enet {
status = "okay";
};
&enet_mac {
pinctrl-0 = <&pinmux_enet>;
pinctrl-names = "default";
phy-handle = <&phy>;
zephyr,random-mac-address;
phy-connection-type = "rgmii";
status = "okay";
};
&enet_mdio {
pinctrl-0 = <&pinmux_mdio>;
pinctrl-names = "default";
status = "okay";
phy: phy@0 {
compatible = "realtek,rtl8211f";
reg = <1>;
status = "okay";
};
};
&uart4 {
current-speed = <115200>;
pinctrl-0 = <&uart4_default>;
pinctrl-names = "default";
status = "okay";
};
``` | /content/code_sandbox/boards/nxp/imx8mp_evk/imx8mp_evk_mimx8ml8_a53_smp.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 369 |
```unknown
/*
*
*/
#include <nxp/nxp_imx/mimx8ml8dvnlz-pinctrl.dtsi>
&pinctrl {
uart2_default: uart2_default {
group0 {
pinmux = <&iomuxc_uart2_rxd_uart_rx_uart2_rx>,
<&iomuxc_uart2_txd_uart_tx_uart2_tx>;
bias-pull-up;
slew-rate = "slow";
drive-strength = "x1";
};
};
uart4_default: uart4_default {
group0 {
pinmux = <&iomuxc_uart4_rxd_uart_rx_uart4_rx>,
<&iomuxc_uart4_txd_uart_tx_uart4_tx>;
bias-pull-up;
slew-rate = "slow";
drive-strength = "x1";
};
};
pinmux_mdio: pinmux_mdio {
group0 {
pinmux = <&iomuxc_sai1_rxd2_enet_mdc_enet1_mdc>,
<&iomuxc_sai1_rxd3_enet_mdio_enet1_mdio>;
slew-rate = "slow";
drive-strength = "x4";
};
};
pinmux_enet: pinmux_enet {
group0 {
pinmux = <&iomuxc_sai1_rxd4_enet_rgmii_rd_enet1_rgmii_rd0>,
<&iomuxc_sai1_rxd5_enet_rgmii_rd_enet1_rgmii_rd1>,
<&iomuxc_sai1_rxd6_enet_rgmii_rd_enet1_rgmii_rd2>,
<&iomuxc_sai1_rxd7_enet_rgmii_rd_enet1_rgmii_rd3>,
<&iomuxc_sai1_txc_enet_rgmii_rxc_enet1_rgmii_rxc>,
<&iomuxc_sai1_txfs_enet_rgmii_rx_ctl_enet1_rgmii_rx_ctl>;
input-schmitt-enable;
slew-rate = "fast";
drive-strength = "x1";
};
group1 {
pinmux = <&iomuxc_sai1_txd0_enet_rgmii_td_enet1_rgmii_td0>,
<&iomuxc_sai1_txd1_enet_rgmii_td_enet1_rgmii_td1>,
<&iomuxc_sai1_txd2_enet_rgmii_td_enet1_rgmii_td2>,
<&iomuxc_sai1_txd3_enet_rgmii_td_enet1_rgmii_td3>,
<&iomuxc_sai1_txd4_enet_rgmii_tx_ctl_enet1_rgmii_tx_ctl>,
<&iomuxc_sai1_txd5_enet_rgmii_txc_enet1_rgmii_txc>;
slew-rate = "fast";
drive-strength = "x6";
};
group2 {
pinmux = <&iomuxc_sai1_rxd0_gpio_io_gpio4_io2>;
slew-rate = "fast";
drive-strength = "x1";
};
};
};
``` | /content/code_sandbox/boards/nxp/imx8mp_evk/imx8mp_evk-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 729 |
```unknown
/*
*
*/
/dts-v1/;
#include <nxp/nxp_imx8ml_m7.dtsi>
#include "imx8mp_evk-pinctrl.dtsi"
/ {
model = "NXP i.MX8M Plus EVK board";
compatible = "nxp,mimx8mp_evk";
chosen {
/* TCM */
zephyr,flash = &itcm;
zephyr,sram = &dtcm;
zephyr,console = &uart4;
zephyr,shell-uart = &uart4;
};
};
&uart4 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart4_default>;
pinctrl-names = "default";
};
&gpio3 {
status = "okay";
};
&mailbox0 {
status = "okay";
};
``` | /content/code_sandbox/boards/nxp/imx8mp_evk/imx8mp_evk_mimx8ml8_m7.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 187 |
```yaml
identifier: imx8mp_evk/mimx8ml8/adsp
name: NXP i.MX 8MPLUS Audio DSP
type: mcu
arch: xtensa
toolchain:
- xcc
- xt-clang
- zephyr
supported:
- uart
testing:
ignore_tags:
- net
- bluetooth
- mcumgr
vendor: nxp
``` | /content/code_sandbox/boards/nxp/imx8mp_evk/imx8mp_evk_mimx8ml8_adsp.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 93 |
```cmake
#
#
#
if(CONFIG_SOC_MIMX8ML8_ADSP)
board_set_flasher_ifnset(misc-flasher)
board_finalize_runner_args(misc-flasher)
board_set_rimage_target(imx8m)
endif()
if(CONFIG_SOC_MIMX8ML8_M7)
board_set_debugger_ifnset(jlink)
board_set_flasher_ifnset(jlink)
board_runner_args(jlink "--device=MIMX8ML8_M7")
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
endif()
``` | /content/code_sandbox/boards/nxp/imx8mp_evk/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 122 |
```yaml
#
#
#
identifier: imx8mp_evk/mimx8ml8/a53
name: NXP i.MX8M Plus EVK A53
type: mcu
arch: arm64
toolchain:
- zephyr
- cross-compile
ram: 128
testing:
ignore_tags:
- net
- bluetooth
vendor: nxp
``` | /content/code_sandbox/boards/nxp/imx8mp_evk/imx8mp_evk_mimx8ml8_a53.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 85 |
```unknown
# size of stack for initialization and main thread
CONFIG_MAIN_STACK_SIZE=3072
# enable logger
CONFIG_LOG=y
# no need for a "raw" binary zephyr/zephyr.bin in the build directory
CONFIG_BUILD_OUTPUT_BIN=n
# enable uart driver
CONFIG_SERIAL=y
# clock configuration
CONFIG_CLOCK_CONTROL=y
# console (remote proc console by default)
CONFIG_CONSOLE=y
# uart console (overrides remote proc console)
CONFIG_UART_CONSOLE=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/nxp/imx8mp_evk/imx8mp_evk_mimx8ml8_adsp_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 110 |
```yaml
#
#
#
identifier: imx8mp_evk/mimx8ml8/m7
name: NXP i.MX8M Plus EVK
type: mcu
arch: arm
ram: 128
flash: 128
toolchain:
- zephyr
- gnuarmemb
- xtools
testing:
ignore_tags:
- net
- bluetooth
supported:
- spi
- uart
vendor: nxp
``` | /content/code_sandbox/boards/nxp/imx8mp_evk/imx8mp_evk_mimx8ml8_m7.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 103 |
```unknown
/*
*
*/
/dts-v1/;
#include <nxp/nxp_imx8m.dtsi>
#include <nxp/nxp_imx/mimx8ml8dvnlz-pinctrl.dtsi>
/ {
model = "NXP i.MX 8MPLUS Audio DSP";
compatible = "nxp";
chosen {
zephyr,sram = &sram0;
zephyr,console = &uart4;
zephyr,shell-uart = &uart4;
};
};
&pinctrl {
uart4_default: uart4_default {
group0 {
pinmux = <&iomuxc_uart4_rxd_uart_rx_uart4_rx>,
<&iomuxc_uart4_txd_uart_tx_uart4_tx>;
bias-pull-up;
slew-rate = "slow";
drive-strength = "x1";
};
};
};
&uart4 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart4_default>;
pinctrl-names = "default";
};
``` | /content/code_sandbox/boards/nxp/imx8mp_evk/imx8mp_evk_mimx8ml8_adsp.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 235 |
```unknown
config BOARD_IMX8MP_EVK
select SOC_MIMX8ML8_A53 if BOARD_IMX8MP_EVK_MIMX8ML8_A53 || BOARD_IMX8MP_EVK_MIMX8ML8_A53_SMP
select SOC_MIMX8ML8_ADSP if BOARD_IMX8MP_EVK_MIMX8ML8_ADSP
select SOC_MIMX8ML8_M7 if BOARD_IMX8MP_EVK_MIMX8ML8_M7 || BOARD_IMX8MP_EVK_MIMX8ML8_M7_DDR
select SOC_PART_NUMBER_MIMX8ML8DVNLZ
``` | /content/code_sandbox/boards/nxp/imx8mp_evk/Kconfig.imx8mp_evk | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 141 |
```unknown
#
#
#
CONFIG_CLOCK_CONTROL=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
CONFIG_CONSOLE=y
CONFIG_XIP=y
CONFIG_CODE_ITCM=y
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/nxp/imx8mp_evk/imx8mp_evk_mimx8ml8_m7_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 45 |
```yaml
board:
name: imx8mp_evk
vendor: nxp
socs:
- name: mimx8ml8
variants:
- name: smp
cpucluster: a53
- name: ddr
cpucluster: m7
``` | /content/code_sandbox/boards/nxp/imx8mp_evk/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 64 |
```yaml
#
#
#
identifier: imx8mp_evk/mimx8ml8/m7/ddr
name: NXP i.MX8M Plus EVK (DDR)
type: mcu
arch: arm
ram: 2048
flash: 2048
toolchain:
- zephyr
- gnuarmemb
- xtools
testing:
ignore_tags:
- net
- bluetooth
supported:
- spi
- uart
vendor: nxp
``` | /content/code_sandbox/boards/nxp/imx8mp_evk/imx8mp_evk_mimx8ml8_m7_ddr.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 109 |
```unknown
/*
*
*/
/dts-v1/;
#include <nxp/nxp_mimx8mp_a53.dtsi>
#include "imx8mp_evk-pinctrl.dtsi"
/ {
model = "NXP i.MX8MP A53";
compatible = "fsl,mimx8mp";
chosen {
zephyr,console = &uart4;
zephyr,shell-uart = &uart4;
zephyr,sram = &sram0;
};
cpus {
cpu@0 {
status = "disabled";
};
cpu@1 {
status = "disabled";
};
cpu@2 {
status = "disabled";
};
};
sram0: memory@c0000000 {
reg = <0xc0000000 DT_SIZE_M(1)>;
};
};
&enet {
status = "okay";
};
&enet_mac {
pinctrl-0 = <&pinmux_enet>;
pinctrl-names = "default";
phy-handle = <&phy>;
zephyr,random-mac-address;
phy-connection-type = "rgmii";
status = "okay";
};
&enet_mdio {
pinctrl-0 = <&pinmux_mdio>;
pinctrl-names = "default";
status = "okay";
phy: phy@0 {
compatible = "realtek,rtl8211f";
reg = <1>;
status = "okay";
};
};
&uart4 {
status = "okay";
current-speed = <115200>;
clocks = <&ccm IMX_CCM_UART4_CLK 0x6c 24>;
pinctrl-0 = <&uart4_default>;
pinctrl-names = "default";
};
``` | /content/code_sandbox/boards/nxp/imx8mp_evk/imx8mp_evk_mimx8ml8_a53.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 379 |
```unknown
if BOARD_IMX8MP_EVK
if BOARD_IMX8MP_EVK_MIMX8ML8_A53 || BOARD_IMX8MP_EVK_MIMX8ML8_A53_SMP
if NETWORKING
config NET_L2_ETHERNET
default y
config NET_TX_STACK_SIZE
default 8192
config NET_RX_STACK_SIZE
default 8192
if NET_TCP
config NET_TCP_WORKQ_STACK_SIZE
default 8192
endif # NET_TCP
if NET_MGMT_EVENT
config NET_MGMT_EVENT_STACK_SIZE
default 8192
endif # NET_MGMT_EVENT
if NET_SOCKETS_SERVICE
config NET_SOCKETS_SERVICE_STACK_SIZE
default 8192
endif # NET_SOCKETS_SERVICE
endif # NETWORKING
endif # BOARD_IMX8MP_EVK_MIMX8ML8_A53 || BOARD_IMX8MP_EVK_MIMX8ML8_A53_SMP
endif # BOARD_IMX8MP_EVK
``` | /content/code_sandbox/boards/nxp/imx8mp_evk/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 208 |
```unknown
# ARM Options
CONFIG_AARCH64_IMAGE_HEADER=y
CONFIG_ARMV8_A_NS=y
CONFIG_ARM64_VA_BITS_36=y
CONFIG_ARM64_PA_BITS_36=y
# Cache Options
CONFIG_CACHE_MANAGEMENT=y
CONFIG_DCACHE_LINE_SIZE_DETECT=y
CONFIG_ICACHE_LINE_SIZE_DETECT=y
# Zephyr Kernel Configuration
CONFIG_XIP=n
CONFIG_KERNEL_DIRECT_MAP=y
# Serial Drivers
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
# Enable Console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_CLOCK_CONTROL=y
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/nxp/imx8mp_evk/imx8mp_evk_mimx8ml8_a53_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 123 |
```yaml
#
#
#
identifier: imx8mp_evk/mimx8ml8/a53/smp
name: NXP i.MX8M Plus EVK A53 with SMP kernel
type: mcu
arch: arm64
toolchain:
- zephyr
- cross-compile
ram: 128
supported:
- smp
testing:
ignore_tags:
- net
- bluetooth
vendor: nxp
``` | /content/code_sandbox/boards/nxp/imx8mp_evk/imx8mp_evk_mimx8ml8_a53_smp.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 97 |
```unknown
# ARM Options
CONFIG_AARCH64_IMAGE_HEADER=y
CONFIG_ARMV8_A_NS=y
CONFIG_ARM64_VA_BITS_36=y
CONFIG_ARM64_PA_BITS_36=y
# Cache Options
CONFIG_CACHE_MANAGEMENT=y
CONFIG_DCACHE_LINE_SIZE_DETECT=y
CONFIG_ICACHE_LINE_SIZE_DETECT=y
# Zephyr Kernel Configuration
CONFIG_XIP=n
CONFIG_KERNEL_DIRECT_MAP=y
# SMP
CONFIG_SMP=y
CONFIG_MP_MAX_NUM_CPUS=2
CONFIG_PM_CPU_OPS=y
# Serial Drivers
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
# Enable Console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_CLOCK_CONTROL=y
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/nxp/imx8mp_evk/imx8mp_evk_mimx8ml8_a53_smp_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 147 |
```unknown
#
#
#
CONFIG_CLOCK_CONTROL=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
CONFIG_CONSOLE=y
CONFIG_XIP=y
CONFIG_CODE_DDR=y
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/nxp/imx8mp_evk/imx8mp_evk_mimx8ml8_m7_ddr_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 44 |
```restructuredtext
.. _VMU RT1170:
NXP VMU RT1170
##################
Overview
********
The VMU RT1170 features an i.MX RT1176 dual core MCU with the
Cortex-M7 core at 1 GHz and a Cortex-M4 at 400 MHz.
The i.MX RT1176 MCU offers support over a wide temperature range
and is qualified for consumer, industrial and automotive markets.
The VMU RT1170 is the default VMU for CogniPilot's Cerebri, a
Zephyr RTOS based Autopilot.
.. image:: vmu_rt1170.jpg
:align: center
:alt: VMU RT1170
Hardware
********
- MIMXRT1176DVMAA MCU
- 1GHz Cortex-M7 & 400Mhz Cortex-M4
- 2MB SRAM with 512KB of TCM for Cortex-M7 and 256KB of TCM for Cortex-M4
- Memory
- 512 Mbit Octal Flash
- TF socket for SD card
- Ethernet
- 2 wire 100BASE-T1
- USB
- USB 2.0 connector
- Power
- Redundant dual picoflex power ports
- Debug
- 10 pin debug and shell adapter board to 20 Pin JTAG debugger and USB-C shell
- Sensor
- BMI088 6-axis IMU
- BMM150 Magnetometer
- Dual BMP388 Barometer
- Dual ICM-42688 6-axis IMU
- IST8310 3-axis Magnetometer
- U-blox NEO-M8N GNSS module
- UART JST-GH connectors
- I2C JST-GH connectors
- CAN bus JST-GH connectors
- RC IN
- RC input connector for SBUS compatible RC receivers
For more information about the MIMXRT1176 SoC and VMU RT1170 board, see
these references:
- `VMU RT1170 Schematics`_
- `i.MX RT1170 Datasheet`_
- `i.MX RT1170 Reference Manual`_
Supported Features
==================
VMU-RT1170 is a "Vehicle Management Unit" based on the general i.MX RT1170
family of processors. The VMU RT1170 board configuration supports the
following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| COUNTER | on-chip | counter |
+-----------+------------+-------------------------------------+
| CAN | on-chip | flexcan |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| PWM | on-chip | flexpwm, qtmr |
+-----------+------------+-------------------------------------+
| ADC | on-chip | adc |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| DMA | on-chip | dma |
+-----------+------------+-------------------------------------+
| GPT | on-chip | gpt |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | watchdog |
+-----------+------------+-------------------------------------+
| ENET | on-chip | ethernet |
+-----------+------------+-------------------------------------+
| SAI | on-chip | i2s |
+-----------+------------+-------------------------------------+
| USB | on-chip | USB Device |
+-----------+------------+-------------------------------------+
| HWINFO | on-chip | Unique device serial number |
+-----------+------------+-------------------------------------+
| DISPLAY | on-chip | display |
+-----------+------------+-------------------------------------+
| ACMP | on-chip | analog comparator |
+-----------+------------+-------------------------------------+
| CAAM RNG | on-chip | entropy |
+-----------+------------+-------------------------------------+
| FLEXSPI | on-chip | flash programming |
+-----------+------------+-------------------------------------+
The default configuration can be found in
:zephyr_file:`boards/nxp/vmu_rt1170/vmu_rt1170_mimxrt1176_cm7_defconfig`
Other hardware features are not currently supported by the port.
Connections and I/Os
====================
The MIMXRT1170 SoC has six pairs of pinmux/gpio controllers.
+-----------------+--------------------------------+----------------------------+
| Name | Function | Usage |
+-----------------+--------------------------------+----------------------------+
| GPIO_AD_00 | FLEXCAN2_TX | CAN2_TX |
+-----------------+--------------------------------+----------------------------+
| GPIO_AD_01 | FLEXCAN2_RX | CAN2_RX |
+-----------------+--------------------------------+----------------------------+
| GPIO_AD_02 | LPUART8_TXD | UART8_TX_TELEM2 |
+-----------------+--------------------------------+----------------------------+
| GPIO_AD_03 | LPUART8_RXD | UART8_RX_TELEM2 |
+-----------------+--------------------------------+----------------------------+
| GPIO_AD_04 | LPUART8_CTS_B | UART8_CTS_TELEM2 |
+-----------------+--------------------------------+----------------------------+
| GPIO_AD_05 | LPUART8_RTS_B | UART8_RTS_TELEM2 |
+-----------------+--------------------------------+----------------------------+
| GPIO_AD_06 | FLEXCAN1_TX | CAN1_TX |
+-----------------+--------------------------------+----------------------------+
| GPIO_AD_07 | FLEXCAN1_RX | CAN1_RX |
+-----------------+--------------------------------+----------------------------+
| GPIO_AD_08 | LPI2C1_SCL | I2C1_SCL_GPS1 |
+-----------------+--------------------------------+----------------------------+
| GPIO_AD_09 | LPI2C1_SDA | I2C1_SDA_GPS1 |
+-----------------+--------------------------------+----------------------------+
| GPIO_AD_10 | LPADC1_CH2A | SCALED_VDD_3V3_SENSORS1 |
+-----------------+--------------------------------+----------------------------+
| GPIO_AD_11 | LPADC1_CH2B | SCALED_VDD_3V3_SENSORS2 |
+-----------------+--------------------------------+----------------------------+
| GPIO_AD_12 | LPADC1_CH3A | SCALED_VDD_3V3_SENSORS3 |
+-----------------+--------------------------------+----------------------------+
| GPIO_AD_13 | LPADC1_CH3B | SCALED_V5 |
+-----------------+--------------------------------+----------------------------+
| GPIO_AD_14 | LPADC1_CH4A | ADC_6V6 |
+-----------------+--------------------------------+----------------------------+
| GPIO_AD_15 | LPUART10_TXD | UART10_TX_TELEM3 |
+-----------------+--------------------------------+----------------------------+
| GPIO_AD_16 | LPADC1_CH5A | ADC_3V3 |
+-----------------+--------------------------------+----------------------------+
| GPIO_AD_17 | LPADC1_CHB | SCALED_VDD_3V3_SENSORS4 |
+-----------------+--------------------------------+----------------------------+
| GPIO_AD_18 | LPI2C2_SCL | I2C2_SCL_GPS2 |
+-----------------+--------------------------------+----------------------------+
| GPIO_AD_19 | LPI2C2_SDA | I2C2_SDA_GPS2 |
+-----------------+--------------------------------+----------------------------+
| GPIO_AD_20 | GPIO3_IO19 | SPI1_DRDY1_SENSOR1 |
+-----------------+--------------------------------+----------------------------+
| GPIO_AD_21 | GPIO3_IO20 | SPI3_DRDY1_SENSOR3 |
+-----------------+--------------------------------+----------------------------+
| GPIO_AD_22 | LPADC2_CH2A | HW_VER_SENSE |
+-----------------+--------------------------------+----------------------------+
| GPIO_AD_23 | LPADC2_CH2B | HW_REV_SENSE |
+-----------------+--------------------------------+----------------------------+
| GPIO_AD_24 | LPSPI2_SCK | SPI2_SCK_SENSOR2 |
+-----------------+--------------------------------+----------------------------+
| GPIO_AD_25 | LPSPI2_PCS0 | SPI2_nCS0_SENSOR2 |
+-----------------+--------------------------------+----------------------------+
| GPIO_AD_26 | LPSPI2_SOUT | SPI2_MOSI_SENSOR2 |
+-----------------+--------------------------------+----------------------------+
| GPIO_AD_27 | LPSPI2_SIN | SPI2_MISO_SENSOR2 |
+-----------------+--------------------------------+----------------------------+
| GPIO_AD_28 | LPUART5_TXD | UART5_TX_GPS2 |
+-----------------+--------------------------------+----------------------------+
| GPIO_AD_29 | LPUART5_RXD | UART5_RX_GPS2 |
+-----------------+--------------------------------+----------------------------+
| GPIO_AD_30 | LPUART3_TXD | UART3_TX_GPS1 |
+-----------------+--------------------------------+----------------------------+
| GPIO_AD_31 | LPUART3_RXD | UART3_RX_GPS1 |
+-----------------+--------------------------------+----------------------------+
| GPIO_AD_32 | USDHC1_CD_B | USDHC1_CD |
+-----------------+--------------------------------+----------------------------+
| GPIO_AD_33 | LPUART10_RXD | UART10_RX_TELEM3 |
+-----------------+--------------------------------+----------------------------+
| GPIO_AD_34 | LPUART10_CTS_B | UART10_CTS_TELEM3 |
+-----------------+--------------------------------+----------------------------+
| GPIO_AD_35 | LPUART10_RTS_B | UART10_RTS_TELEM3 |
+-----------------+--------------------------------+----------------------------+
| GPIO_DISP_B1_00 | ENET_1G_RX_EN | ETH_CRS_DV |
+-----------------+--------------------------------+----------------------------+
| GPIO_DISP_B1_01 | ENET_1G_RX_ER | ETH_RX_ER |
+-----------------+--------------------------------+----------------------------+
| GPIO_DISP_B1_02 | LPUART1_TXD | UART1_TX_DEBUG |
+-----------------+--------------------------------+----------------------------+
| GPIO_DISP_B1_03 | LPUART1_RXD | UART1_RX_DEBUG |
+-----------------+--------------------------------+----------------------------+
| GPIO_DISP_B1_04 | LPUART4_RXD | UART4_RX_TELEM1 |
+-----------------+--------------------------------+----------------------------+
| GPIO_DISP_B1_05 | LPUART4_CTS_B | UART4_CTS_TELEM1 |
+-----------------+--------------------------------+----------------------------+
| GPIO_DISP_B1_06 | LPUART4_TXD | UART4_TX_TELEM1 |
+-----------------+--------------------------------+----------------------------+
| GPIO_DISP_B1_07 | LPUART4_RTS_B | UART4_RTS_TELEM1 |
+-----------------+--------------------------------+----------------------------+
| GPIO_DISP_B1_08 | ENET_1G_TDATA1 | ETH_TXD1 |
+-----------------+--------------------------------+----------------------------+
| GPIO_DISP_B1_09 | ENET_1G_TDATA0 | ETH_TXD0 |
+-----------------+--------------------------------+----------------------------+
| GPIO_DISP_B1_10 | ENET_1G_TX_EN | ETH_TX_EN |
+-----------------+--------------------------------+----------------------------+
| GPIO_DISP_B1_11 | ENET_1G_REF_CLK | ETH_REF_CLK |
+-----------------+--------------------------------+----------------------------+
| GPIO_DISP_B2_00 | GPIO5_IO01 | nLED_RED |
+-----------------+--------------------------------+----------------------------+
| GPIO_DISP_B2_01 | GPIO5_IO02 | nLED_GREEN |
+-----------------+--------------------------------+----------------------------+
| GPIO_DISP_B2_02 | ARM_TRACE0 | TRACED0 |
+-----------------+--------------------------------+----------------------------+
| GPIO_DISP_B2_03 | ARM_TRACE1 | TRACED1 |
+-----------------+--------------------------------+----------------------------+
| GPIO_DISP_B2_04 | ARM_TRACE2 | TRACED2 |
+-----------------+--------------------------------+----------------------------+
| GPIO_DISP_B2_05 | ARM_TRACE3 | TRACED3 |
+-----------------+--------------------------------+----------------------------+
| GPIO_DISP_B2_06 | ARM_TRACE_CLK | TRACECLK |
+-----------------+--------------------------------+----------------------------+
| GPIO_DISP_B2_07 | ARM_TRACE_SWO | TRACESWO |
+-----------------+--------------------------------+----------------------------+
| GPIO_DISP_B2_08 | GPIO5_IO09 | ETH_POWER_EN |
+-----------------+--------------------------------+----------------------------+
| GPIO_DISP_B2_09 | GPIO5_IO10 | ETH_PHY_nINT |
+-----------------+--------------------------------+----------------------------+
| GPIO_DISP_B2_10 | LPI2C3_SCL | I2C3_SCL_FMU |
+-----------------+--------------------------------+----------------------------+
| GPIO_DISP_B2_11 | LPI2C3_SDA | I2C3_SDA_FMU |
+-----------------+--------------------------------+----------------------------+
| GPIO_DISP_B2_12 | LPSPI4_SCK | SPI4_SCK_SENSOR4 |
+-----------------+--------------------------------+----------------------------+
| GPIO_DISP_B2_13 | LPSPI4_SIN | SPI4_MISO_SENSOR4 |
+-----------------+--------------------------------+----------------------------+
| GPIO_DISP_B2_14 | LPSPI4_SOUT | SPI4_MOSI_SENSOR4 |
+-----------------+--------------------------------+----------------------------+
| GPIO_DISP_B2_15 | LPSPI4_PCS0 | SPI4_nCS0_SENSOR4 |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_00 | FLEXPWM4_PWM0_A + FLEXIO1_IO00 | FMU_CH11 |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_01 | GPIO1_IO01 | VDD_3V3_SD_CARD_EN |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_02 | FLEXPWM4_PWM1_A + FLEXIO1_IO02 | FMU_CH12 |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_03 | GPIO1_IO03 | FMU_nSAFETY_SWITCH_LED_OUT |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_04 | GPIO1_IO04 | NFC_GPIO |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_05 | GPIO1_IO05 | SPI6_DRDY1_EXTERNAL1 |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_06 | FLEXPWM2_PWM0_A + FLEXIO1_IO06 | FMU_CH4 |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_07 | GPIO1_IO07 | SPI6_DRDY2_EXTERNAL1 |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_08 | FLEXPWM2_PWM1_A + FLEXIO1_IO08 | FMU_CH5 |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_09 | GPT5_CAPTURE1 | FMU_PPM_INPUT |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_10 | FLEXPWM2_PWM2_A + FLEXIO1_IO10 | FMU_CH6 |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_11 | GPIO1_IO11 | SPI6_nRESET_EXTERNAL1 |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_12 | GPIO1_IO12 | VDD_5V_HIPOWER_nOC |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_13 | GPIO1_IO13 | nLED_BLUE |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_14 | GPIO1_IO14 | VDD_3V3_SENSORS3_EN |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_15 | GPIO1_IO15 | VDD_5V_PERIPH_nOC |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_16 | GPIO1_IO16 | SPI4_DRDY1_SENSOR4 |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_17 | GPIO1_IO17 | nARMED |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_18 | TMR2_TIMER0 | SPIX_SYNC |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_19 | FLEXPWM2_PWM3_A + FLEXIO1_IO19 | FMU_CH7 |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_20 | TMR4_TIMER0 | FMU_CAP1 |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_21 | FLEXPWM3_PWM3_A + FLEXIO1_IO21 | FMU_CH10 |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_22 | GPIO1_IO22 | VDD_3V3_SENSORS2_EN |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_23 | FLEXPWM1_PWM0_A | FMU_CH1 |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_24 | GPIO1_IO24 | FMU_SAFETY_SWITCH_IN |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_25 | FLEXPWM1_PWM1_A + FLEXIO1_IO25 | FMU_CH2 |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_26 | GPIO1_IO26 | HW_VER_REV_DRIVE |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_27 | FLEXPWM1_PWM2_A + FLEXIO1_IO27 | FMU_CH3 |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_28 | GPIO1_IO28 | nPOWER_IN_A |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_29 | FLEXPWM3_PWM0_A + FLEXIO1_IO29 | FMU_CH8 |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_30 | GPIO1_IO30 | nPOWER_IN_B |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_31 | FLEXPWM3_PWM1_A + FLEXIO1_IO31 | FMU_CH9 |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_32 | GPIO2_IO00 | nPOWER_IN_C |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_33 | GPIO2_IO01 | VDD_3V3_SENSORS1_EN |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_34 | GPIO2_IO02 | VDD_5V_PERIPH_nEN |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_35 | GPIO2_IO03 | I2C2_DRDY1 |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_36 | GPIO2_IO04 | VDD_3V3_SENSORS4_EN |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_37 | GPIO2_IO05 | VDD_5V_HIPOWER_nEN |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_38 | GPIO2_IO06 | VDD_3V3_SPEKTRUM_POWER_EN |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_39 | GPIO2_IO07 | SPI2_DRDY1_SENSOR2 |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_40 | LPUART6_TXD | UART6_TX_TO_IO__RC_INPUT |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B1_41 | LPUART6_RXD | UART6_RX_FROM_IO__NC |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B2_00 | LPSPI1_SCK | SPI1_SCK_SENSOR1 |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B2_01 | LPSPI1_PCS0 | SPI1_nCS0_SENSOR1 |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B2_02 | LPSPI1_SOUT | SPI1_MOSI_SENSOR1 |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B2_03 | LPSPI1_SIN | SPI1_MISO_SENSOR1 |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B2_04 | LPSPI3_SCK | SPI3_SCK_SENSOR3 |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B2_05 | LPSPI3_PCS0 | SPI3_nCS0_SENSOR3 |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B2_06 | LPSPI3_SOUT | SPI3_MOSI_SENSOR3 |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B2_07 | LPSPI3_SIN | SPI3_MISO_SENSOR3 |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B2_08 | LPSPI3_PCS1 | SPI3_nCS1_SENSOR3 |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B2_09 | TMR1_TIMER0 | BUZZER_1 |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B2_10 | FLEXSPI2_A_SCLK | FLEXSPI2_SCK_FRAM |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B2_11 | FLEXSPI2_A_SS0_B | FLEXSPI2_nCS0_FRAM |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B2_12 | GPIO2_IO22 | GPIO_EMC_B2_12 |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B2_13 | FLEXSPI2_A_DATA0 | FLEXSPI2_DATA0_FRAM |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B2_14 | FLEXSPI2_A_DATA1 | FLEXSPI2_DATA1_FRAM |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B2_15 | ENET_1G_RDATA0 | ETH_RXD0 |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B2_16 | ENET_1G_RDATA1 | ETH_RXD1 |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B2_17 | TMR3_TIMER0 | HEATER |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B2_18 | GPIO2_IO28 | SPI3_DRDY2_SENSOR3 |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B2_19 | ENET_1G_MDC | ETH_MDC |
+-----------------+--------------------------------+----------------------------+
| GPIO_EMC_B2_20 | ENET_1G_MDIO | ETH_MDIO |
+-----------------+--------------------------------+----------------------------+
| GPIO_LPSR_00 | FLEXCAN3_TX | CAN3_TX |
+-----------------+--------------------------------+----------------------------+
| GPIO_LPSR_01 | FLEXCAN3_RX | CAN3_RX |
+-----------------+--------------------------------+----------------------------+
| GPIO_LPSR_02 | SRC_BOOT_MODE00 | BT_MODE0 |
+-----------------+--------------------------------+----------------------------+
| GPIO_LPSR_03 | SRC_BOOT_MODE01 | BT_MODE1 |
+-----------------+--------------------------------+----------------------------+
| GPIO_LPSR_04 | LPUART11_TXD | UART11_TX_EXTERNAL2 |
+-----------------+--------------------------------+----------------------------+
| GPIO_LPSR_05 | LPUART11_RXD | UART11_RX_EXTERNAL2 |
+-----------------+--------------------------------+----------------------------+
| GPIO_LPSR_06 | LPI2C6_SDA | I2C6_SDA_EXTERNAL2 |
+-----------------+--------------------------------+----------------------------+
| GPIO_LPSR_07 | LPI2C6_SCL | I2C6_SCL_EXTERNAL2 |
+-----------------+--------------------------------+----------------------------+
| GPIO_LPSR_08 | LPSPI6_PCS1 | SPI6_nCS1_EXTERNAL1 |
+-----------------+--------------------------------+----------------------------+
| GPIO_LPSR_09 | LPSPI6_PCS0 | SPI6_nCS0 |
+-----------------+--------------------------------+----------------------------+
| GPIO_LPSR_10 | LPSPI6_SCK | SPI6_SCK_EXTERNAL1 |
+-----------------+--------------------------------+----------------------------+
| GPIO_LPSR_11 | LPSPI6_SOUT | SPI6_MOSI_EXTERNAL1 |
+-----------------+--------------------------------+----------------------------+
| GPIO_LPSR_12 | LPSPI6_SIN | SPI6_MISO_EXTERNAL1 |
+-----------------+--------------------------------+----------------------------+
| GPIO_LPSR_13 | JTAG_MOD | NC_JTAG_MOD_PD |
+-----------------+--------------------------------+----------------------------+
| GPIO_LPSR_14 | SWD_CLK | FMU_SWCLK |
+-----------------+--------------------------------+----------------------------+
| GPIO_LPSR_15 | SWD_DIO | FMU_SWDIO |
+-----------------+--------------------------------+----------------------------+
| GPIO_SD_B1_00 | USDHC1_CMD | USDHC1_CMD |
+-----------------+--------------------------------+----------------------------+
| GPIO_SD_B1_01 | USDHC1_CLK | USDHC1_CLK |
+-----------------+--------------------------------+----------------------------+
| GPIO_SD_B1_02 | USDHC1_DATA0 | USDHC1_DATA0 |
+-----------------+--------------------------------+----------------------------+
| GPIO_SD_B1_03 | USDHC1_DATA1 | USDHC1_DATA1 |
+-----------------+--------------------------------+----------------------------+
| GPIO_SD_B1_04 | USDHC1_DATA2 | USDHC1_DATA2 |
+-----------------+--------------------------------+----------------------------+
| GPIO_SD_B1_05 | USDHC1_DATA3 | USDHC1_DATA3 |
+-----------------+--------------------------------+----------------------------+
| GPIO_SD_B2_00 | FLEXSPI1_B_DATA3 | FLEXSPI1_DATA7_HYPERFLASH |
+-----------------+--------------------------------+----------------------------+
| GPIO_SD_B2_01 | FLEXSPI1_B_DATA2 | FLEXSPI1_DATA6_HYPERFLASH |
+-----------------+--------------------------------+----------------------------+
| GPIO_SD_B2_02 | FLEXSPI1_B_DATA1 | FLEXSPI1_DATA5_HYPERFLASH |
+-----------------+--------------------------------+----------------------------+
| GPIO_SD_B2_03 | FLEXSPI1_B_DATA0 | FLEXSPI1_DATA4_HYPERFLASH |
+-----------------+--------------------------------+----------------------------+
| GPIO_SD_B2_04 | FLEXSPI1_B_SCLK | FLEXSPI1_nSCK_HYPERFLASH |
+-----------------+--------------------------------+----------------------------+
| GPIO_SD_B2_05 | FLEXSPI1_A_DQS | FLEXSPI1_DQS_HYPERFLASH |
+-----------------+--------------------------------+----------------------------+
| GPIO_SD_B2_06 | FLEXSPI1_A_SS0_B | FLEXSPI1_nCS0_HYPERFLASH |
+-----------------+--------------------------------+----------------------------+
| GPIO_SD_B2_07 | FLEXSPI1_A_SCLK | FLEXSPI1_SCK_HYPERFLASH |
+-----------------+--------------------------------+----------------------------+
| GPIO_SD_B2_08 | FLEXSPI1_A_DATA0 | FLEXSPI1_DATA0_HYPERFLASH |
+-----------------+--------------------------------+----------------------------+
| GPIO_SD_B2_09 | FLEXSPI1_A_DATA0 | FLEXSPI1_DATA1_HYPERFLASH |
+-----------------+--------------------------------+----------------------------+
| GPIO_SD_B2_10 | FLEXSPI1_A_DATA2 | FLEXSPI1_DATA2_HYPERFLASH |
+-----------------+--------------------------------+----------------------------+
| GPIO_SD_B2_11 | FLEXSPI1_A_DATA3 | FLEXSPI1_DATA3_HYPERFLASH |
+-----------------+--------------------------------+----------------------------+
| USB1_DN | USB_OG1_DN | USB_D_N |
+-----------------+--------------------------------+----------------------------+
| USB1_DP | USB_OTG1_DP | USB_D_P |
+-----------------+--------------------------------+----------------------------+
| USB1_VBUS | USB_OTG1_VBUS | VBUS |
+-----------------+--------------------------------+----------------------------+
Serial Port
===========
The MIMXRT1170 SoC has 12 UARTs.
Programming and Debugging
*************************
Build and flash applications as usual (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Configuring a Debug Probe
=========================
A debug probe is used for both flashing and debugging the board.
Using J-Link
------------
Install the :ref:`jlink-debug-host-tools` and make sure they are in your search
path.
Connect the J-Link debugger through the debug adapter board.
Configuring a Console
=====================
Use the USB-C from the debug adapter board to access the console with
the following settings for your serial terminal of choice (screen, minicom, putty,
etc.):
- Speed: 115200
- Data: 8 bits
- Parity: None
- Stop bits: 1
Flashing
========
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: vmu_rt1170
:goals: flash
You should see the following message in the terminal:
.. code-block:: console
***** Booting Zephyr OS v3.4.0-xxxx-xxxxxxxxxxxxx *****
Hello World! vmu_rt1170
Debugging
=========
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: vmu_rt1170
:goals: debug
Open a serial terminal, step through the application in your debugger, and you
should see the following message in the terminal:
.. code-block:: console
***** Booting Zephyr OS v3.4.0-xxxx-xxxxxxxxxxxxx *****
Hello World! vmu_rt1170
.. _VMU RT1170 Schematics:
path_to_url
.. _i.MX RT1170 Datasheet:
path_to_url
.. _i.MX RT1170 Reference Manual:
path_to_url
``` | /content/code_sandbox/boards/nxp/vmu_rt1170/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 6,966 |
```unknown
/*
*
* Note: File generated by gen_board_pinctrl.py
* from fsl-imx8mq-evk.mex
*/
#include <nxp/nxp_imx/mimx8mq6dvajz-pinctrl.dtsi>
&pinctrl {
uart2_default: uart2_default {
group0 {
pinmux = <&iomuxc_uart2_rxd_uart_rx_uart2_rx>,
<&iomuxc_uart2_txd_uart_tx_uart2_tx>;
slew-rate = "fast";
drive-strength = "45-ohm";
};
};
};
``` | /content/code_sandbox/boards/nxp/imx8mq_evk/imx8mq_evk-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 133 |
```cmake
#
#
#
board_set_debugger_ifnset(jlink)
board_set_flasher_ifnset(jlink)
board_runner_args(jlink "--device=MIMX8MQ6_M4")
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/nxp/imx8mq_evk/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 56 |
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