text stringlengths 9 39.2M | dir stringlengths 25 226 | lang stringclasses 163 values | created_date timestamp[s] | updated_date timestamp[s] | repo_name stringclasses 751 values | repo_full_name stringclasses 752 values | star int64 1.01k 183k | len_tokens int64 1 18.5M |
|---|---|---|---|---|---|---|---|---|
```restructuredtext
.. _nrf54l15bsim:
NRF54L15 simulated boards (BabbleSim)
#####################################
.. contents::
:depth: 1
:backlinks: entry
:local:
Overview
********
To allow simulating nRF54L15 SOCs a Zephyr target boards is provided: the
``nrf54l15bsim/nrf54l15/cpuapp``.
This uses `BabbleSim`_ to simulate the radio activity, and the
:ref:`POSIX architecture<Posix arch>` and the `native simulator`_ to
run applications natively on the development system. This has the benefit of
providing native code execution performance and easy debugging using
native tools, but inherits :ref:`its limitations <posix_arch_limitations>`.
Just like for the nrf54l15pdk target,
the nrf54l15bsim/nrf54l15/cpuapp build target provides support for the application core,
on the simulated nRF54L15 SOC.
.. note::
This simulated target does **not** yet support targeting the cpuflpr core.
.. warning::
This target is experimental, and even though it includes models of the RADIO, it does not yet
include models of the AAR, CCM or ECB peripherals, so the BLE and 802.15.4 stacks can only be
run without encryption or privacy features so far.
This boards include models of some of the nRF54L15 SOC peripherals:
* CLOCK (Clock control)
* DPPI (Distributed Programmable Peripheral Interconnect)
* EGU (Event Generator Unit)
* FICR (Factory Information Configuration Registers)
* GRTC (Global Real-time Counter)
* PPIB (PPI Bridge)
* RADIO
* RRAMC (Resistive RAM Controller)
* RTC (Real Time Counter)
* TEMP (Temperature sensor)
* TIMER
* UICR (User Information Configuration Registers)
and will use the same drivers as the nrf54l15pdk targets for these.
For more information on what is modeled to which level of detail,
check the `HW models implementation status`_.
Note that unlike a real nrf54l15 device, the nrf54l15bsim boards have unlimited RAM, and code does
not occupy their RRAM.
.. _BabbleSim:
path_to_url
.. _native simulator:
path_to_url
.. _HW models implementation status:
path_to_url
Building for, and using this board
**********************************
You can follow the instructions from the :ref:`nrf52_bsim board <nrf52bsim_build_and_run>`.
Simply change the board/target appropriately when building.
TrustZone, TF-M and other security considerations
*************************************************
ARM's TrustZone is not modeled in this board. This means that:
* There is no differentiation between secure and non secure execution states or bus accesses.
* All RAM, flash and peripherals are in principle accessible from all SW. Peripherals with their
own interconnect master ports can, in principle, access any other peripheral or RAM area.
* There is no nrf54l15bsim/nrf54l15/cpuapp/ns board/build target, or possibility of mixing secure
and non-secure images.
* Currently there is no model of the SPU, and therefore neither RRAM, RAM areas or peripherals
can be labeled as restricted for secure or non secure access.
* TF-M cannot be used.
Note that the CRACEN peripheral is not modeled. The mbedTLS library can still be used
but with a SW crypto backend.
``` | /content/code_sandbox/boards/native/nrf_bsim/doc/nrf54l15bsim.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 755 |
```restructuredtext
.. _nrf5340bsim:
NRF5340 simulated boards (BabbleSim)
####################################
.. contents::
:depth: 1
:backlinks: entry
:local:
Overview
********
To allow simulating nrf5340 SOCs two Zephyr target boards are provided: the
``nrf5340bsim/nrf5340/cpuapp`` and ``nrf5340bsim/nrf5340/cpunet``.
These use `BabbleSim`_ to simulate the radio activity, and the
:ref:`POSIX architecture<Posix arch>` and the `native simulator`_ to
run applications natively on the development system. This has the benefit of
providing native code execution performance and easy debugging using
native tools, but inherits :ref:`its limitations <posix_arch_limitations>`.
Just like for the nrf5340dk targets,
the nrf5340bsim/nrf5340/cpuapp build target provides support for the application core,
and the nrf5340bsim/nrf5340/cpunet build target provides support for the network
core on the simulated nRF5340 SOC.
These boards include models of some of the nRF5340 SOC peripherals:
* AAR (Accelerated Address Resolver)
* AES CCM & AES ECB encryption HW
* CLOCK (Clock control)
* DPPI (Distributed Programmable Peripheral Interconnect)
* EGU (Event Generator Unit)
* FICR (Factory Information Configuration Registers)
* IPC (Interprocessor communication)
* MUTEX (Mutual exclusive peripheral)
* NVMC (Non-Volatile Memory Controller / Flash)
* RADIO
* RNG (Random Number Generator)
* RTC (Real Time Counter)
* TEMP (Temperature sensor)
* TIMER
* UICR (User Information Configuration Registers)
and will use the same drivers as the nrf5340dk targets for these.
For more information on what is modelled to which level of detail,
check the `HW models implementation status`_.
Note that unlike a real nrf5340 device, the nrf5340bsim boards have unlimited RAM and flash for
code.
.. _BabbleSim:
path_to_url
.. _native simulator:
path_to_url
.. _HW models implementation status:
path_to_url
Building for, and using these boards
************************************
If you are interested in developing on only one of the MCUs in this SOC, you
can use the corresponding simulated target, nrf5340bsim/nrf5340/cpuapp or nrf5340bsim/nrf5340/cpunet
following the instructions from the :ref:`nrf52_bsim board <nrf52bsim_build_and_run>`.
Simply change the board/target appropriately when building.
.. note::
Unlike in real HW, the net core MCU is set-up to automatically boot at start, to facilitate
developing without an image in the application core. You can control
this with either :kconfig:option:`CONFIG_NATIVE_SIMULATOR_AUTOSTART_MCU`, or the command line
option ``--cpu1_autostart``.
If an MCU is booted without any image, it will automatically set itself to sleep.
Assembling both MCUs images into a single executable
****************************************************
By default, when you build targeting either nrf5340bsim/nrf5340/cpuapp or
nrf5340bsim/nrf5340/cpunet you will end up with a library (``zephyr/zephyr.elf``) that corresponds
to that MCU code image, and an executable (``zephyr/zephyr.exe``) that includes the native simulator
runner, SOC HW models, that image, and an empty image for the other MCU.
If you want to assemble an executable including a previously built image for the other MCU,
built with either Zephyr's build system or another native simulator compatible build system,
you can provide that image to the Zephyr build of the second image using
:kconfig:option:`CONFIG_NATIVE_SIMULATOR_EXTRA_IMAGE_PATHS`.
You can also use :ref:`System build (sysbuild) <sysbuild>` to build your dual MCU executable.
The best way to understand how, may be to look into how this is done in one of the examples
in the tree. For example, for :ref:`the nrf53_sync_rtc sample <nrf53_sync_rtc_sample_build_bsim>`,
:zephyr_file:`samples/boards/nrf/nrf53_sync_rtc/sysbuild.cmake`.
.. note::
These libraries/images are **not** embedded images. You cannot use them for embedded devices,
and cannot use an embedded image to assemble a native executable.
TrustZone, TF-M and other security considerations
*************************************************
ARM's TrustZone is not modelled in these boards. This means that:
* There is no differentiation between secure and non secure execution states or bus accesses.
* All RAM, flash and peripherals are in principle accessible from all SW. Peripherals with their
own interconnect master ports can, in principle, access any other peripheral or RAM area.
* There is no nrf5340bsim/nrf5340/cpuapp/ns board/build target, or posibility of mixing secure
and non-secure images.
* Currently there is no model of the SPU, and therefore neither flash, RAM areas or peripherals
can be labelled as restricted for secure or non secure access.
* TF-M cannot be used.
Note that the ARM cryptocell-312 peripheral is not modelled. The mbedTLS library can still be used
but with a SW crypto backend instead of the cryptocell HW acceleration.
``` | /content/code_sandbox/boards/native/nrf_bsim/doc/nrf5340bsim.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,190 |
```restructuredtext
.. _nrf52_bsim:
NRF52 simulated board (BabbleSim)
#################################
.. contents::
:depth: 1
:backlinks: entry
:local:
Overview
********
To allow simulating a nRF52833 SOC a Zephyr target boards is provided: the
nrf52_bsim.
This uses `BabbleSim`_ to simulate the radio activity, and the
:ref:`POSIX architecture<Posix arch>` and the `native simulator`_ to
run applications natively on the development system. This has the benefit of
providing native code execution performance and easy debugging using
native tools, but inherits :ref:`its limitations <posix_arch_limitations>`.
This board includes models of some of the nRF52 SOC peripherals:
* Radio
* Timers
* AAR (Accelerated Address Resolver)
* AES CCM & AES ECB encryption HW
* CLOCK (Clock control)
* EGU (Event Generator Unit)
* FICR (Factory Information Configuration Registers)
* GPIO & GPIOTE
* NVMC (Non-Volatile Memory Controller / Flash)
* PPI (Programmable Peripheral Interconnect)
* RNG (Random Number Generator)
* RTC (Real Time Counter)
* TEMP (Temperature sensor)
* UART & UARTE (UART with Easy DMA)
* UICR (User Information Configuration Registers)
and will use the same drivers as the nrf52 dk targets for these.
For more information on what is modelled to which level of detail,
check the `HW models implementation status`_.
Note that unlike a real nrf52 device, the nrf52_bsim has unlimited RAM and flash for code.
.. _BabbleSim:
path_to_url
.. _native simulator:
path_to_url
.. _HW models implementation status:
path_to_url
.. _nrf52bsim_build_and_run:
Building and running
********************
This board requires the host 32 bit C library. See
:ref:`POSIX Arch dependencies<posix_arch_deps>`.
To target this board you also need to have `BabbleSim`_ compiled in your system.
If you do not have it yet, the easiest way to get it, is to enable the babblesim group
in your local west configuration, running west update, and building the simulator:
.. code-block:: console
west config manifest.group-filter -- +babblesim
west update
cd ${ZEPHYR_BASE}/../tools/bsim
make everything -j 8
.. note::
If you need more BabbleSim components, or more up to date versions,
you can check the `BabbleSim web page <path_to_url`_
for instructions on how to
`fetch <path_to_url`_ and
`build <path_to_url`_ it.
You will now need to define two environment variables to point to your BabbleSim
installation, ``BSIM_OUT_PATH`` and ``BSIM_COMPONENTS_PATH``.
If you followed the previous steps, you can just do:
.. code-block:: console
export BSIM_OUT_PATH=${ZEPHYR_BASE}/../tools/bsim
export BSIM_COMPONENTS_PATH=${BSIM_OUT_PATH}/components/
.. note::
You can add these two lines to your ``~/.zephyrrc`` file, or to your shell
initialization script (``~/.bashrc``), so you won't need to rerun them
manually for each new shell.
You're now ready to build applications targeting this board, for example:
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:host-os: unix
:board: nrf52_bsim
:goals: build
:compact:
Then you can execute your application using:
.. code-block:: console
$ ./build/zephyr/zephyr.exe -nosim
# Press Ctrl+C to exit
Note that the executable is a BabbleSim executable. The ``-nosim`` command line
option indicates you want to run it detached from a BabbleSim simulation. This
is possible only while there is no radio activity. But is perfectly fine for
most Zephyr samples and tests.
When you want to run a simulation with radio activity you need to run also the
BableSim 2G4 (2.4GHz) physical layer simulation (phy).
For example, if you would like to run a simple case with 1 BLE ``central_hr``
sample application connecting to a BLE ``peripheral`` sample application:
Build the ``central_hr`` application targeting this board and copy the resulting
executable to the simulator bin folder with a sensible name:
.. zephyr-app-commands::
:zephyr-app: samples/bluetooth/central_hr
:host-os: unix
:board: nrf52_bsim
:goals: build
:compact:
.. code-block:: console
$ cp build/zephyr/zephyr.exe \
${BSIM_OUT_PATH}/bin/bs_nrf52_bsim_samples_bluetooth_central_hr
Do the same for the ``peripheral`` sample app:
.. zephyr-app-commands::
:zephyr-app: samples/bluetooth/peripheral
:host-os: unix
:board: nrf52_bsim
:goals: build
:compact:
.. code-block:: console
$ cp build/zephyr/zephyr.exe \
${BSIM_OUT_PATH}/bin/bs_nrf52_bsim_samples_bluetooth_peripheral
And then run them together with BabbleSim's 2G4 physical layer simulation:
.. code-block:: console
cd ${BSIM_OUT_PATH}/bin/
./bs_nrf52_bsim_samples_bluetooth_peripheral -s=trial_sim -d=0 &
./bs_nrf52_bsim_samples_bluetooth_central_hr -s=trial_sim -d=1 &
./bs_2G4_phy_v1 -s=trial_sim -D=2 -sim_length=10e6 &
Where the ``-s`` command line option provides a string which uniquely identifies
this simulation; the ``-D`` option tells the Phy how many devices will be run
in this simulation; the ``-d`` option tells each device which is its device
number in the simulation; and the ``-sim_length`` option specifies the length
of the simulation in microseconds.
BabbleSim devices and Phy support many command line switches.
Run them with ``-help`` for more information.
You can find more information about how to run BabbleSim simulations in
`this BabbleSim example <path_to_url`_.
C library choice
****************
These nRF bsim boards use the `native simulator`_ at their core, so you can chose with which
C library you want to build your embedded code.
Check the :ref:`native simulator C library choice section<native_sim_Clib_choice>` for more info.
Debugging, coverage and address sanitizer
*****************************************
Just like with :ref:`native_sim<native_sim_debug>`, the resulting
executables are Linux native applications.
Therefore they can be debugged or instrumented with the same tools as any other
native application, like for example ``gdb`` or ``valgrind``.
The same
:ref:`code coverage analysis means from the POSIX arch<coverage_posix>`
are inherited in this board.
Similarly, the
:ref:`address and undefined behavior sanitizers can be used as in native_sim<native_sim_asan>`.
Note that BabbleSim will run fine if one or several of its components are
being run in a debugger or instrumented. For example, pausing a device in a
breakpoint will pause the whole simulation.
BabbleSim is fully deterministic by design and the results are not affected by
the host computing speed. All randomness is controlled by random seeds which can
be provided as command line options.
About time in BabbleSim
************************
Note that time in BabbleSim is simulated and decoupled from real time. Normally
simulated time will pass several orders of magnitude faster than real time,
only limited by your workstation compute power.
If for some reason you want to limit the speed of the simulation to real
time or a ratio of it, you can do so by connecting the `handbrake device`_
to the BabbleSim Phy.
.. _handbrake device:
path_to_url
``` | /content/code_sandbox/boards/native/nrf_bsim/doc/nrf52_bsim.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,792 |
```linker script
/*
*
*/
/**
* @file
* @brief Extra linker command/script file for the native simulator runner
*/
SECTIONS
{
symbol_to_keep :
{
KEEP(*(symbol_to_keep*));
}
} INSERT AFTER .data;
/*
* Note this script augments the default native simulator linker script
*/
``` | /content/code_sandbox/boards/native/common/natsim_linker_script.ld | linker script | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 67 |
```cmake
set(zephyr_build_path ${APPLICATION_BINARY_DIR}/zephyr)
get_property(CCACHE GLOBAL PROPERTY RULE_LAUNCH_COMPILE)
target_link_options(native_simulator INTERFACE
"-T ${ZEPHYR_BASE}/boards/native/common/natsim_linker_script.ld")
set(nsi_config_content
${nsi_config_content}
"NSI_BUILD_OPTIONS:=$<JOIN:$<TARGET_PROPERTY:native_simulator,INTERFACE_COMPILE_OPTIONS>,\ >"
"NSI_BUILD_PATH:=${zephyr_build_path}/NSI"
"NSI_CC:=${CCACHE} ${CMAKE_C_COMPILER}"
"NSI_OBJCOPY:=${CMAKE_OBJCOPY}"
"NSI_EMBEDDED_CPU_SW:=${zephyr_build_path}/${KERNEL_ELF_NAME} ${CONFIG_NATIVE_SIMULATOR_EXTRA_IMAGE_PATHS}"
"NSI_EXE:=${zephyr_build_path}/${KERNEL_EXE_NAME}"
"NSI_EXTRA_SRCS:=$<JOIN:$<TARGET_PROPERTY:native_simulator,INTERFACE_SOURCES>,\ >"
"NSI_LINK_OPTIONS:=$<JOIN:$<TARGET_PROPERTY:native_simulator,INTERFACE_LINK_OPTIONS>,\ >"
"NSI_EXTRA_LIBS:=$<JOIN:$<TARGET_PROPERTY:native_simulator,RUNNER_LINK_LIBRARIES>,\ >"
"NSI_PATH:=${NSI_DIR}/"
"NSI_N_CPUS:=${CONFIG_NATIVE_SIMULATOR_NUMBER_MCUS}"
"NSI_LOCALIZE_OPTIONS:=--localize-symbol=CONFIG_* $<JOIN:$<TARGET_PROPERTY:native_simulator,LOCALIZE_EXTRA_OPTIONS>,\ >"
)
string(REPLACE ";" "\n" nsi_config_content "${nsi_config_content}")
file(GENERATE OUTPUT "${zephyr_build_path}/NSI/nsi_config"
CONTENT "${nsi_config_content}"
)
``` | /content/code_sandbox/boards/native/common/natsim_config.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 386 |
```unknown
config NATIVE_EXTRA_CMDLINE_ARGS
depends on ARCH_POSIX
string "Extra command line arguments"
help
Extra command line options/arguments which will be handled like if they were passed to the
program from the shell. These will be parsed just before the shell provided ones.
``` | /content/code_sandbox/boards/native/common/extra_args/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 62 |
```c
/*
*
*/
#include <stddef.h>
#include <ctype.h>
#include <zephyr/toolchain.h>
#include <posix_native_task.h>
#include <nsi_cmdline_main_if.h>
#include <nsi_host_trampolines.h>
#include <nsi_tracing.h>
static void remove_one_char(char *str)
{
int i;
for (i = 0; str[i] != 0; i++) {
str[i] = str[i+1];
}
}
static void register_kconfig_args(void)
{
static char kconfig_args[] = CONFIG_NATIVE_EXTRA_CMDLINE_ARGS;
int argc = 0;
char **argv = NULL;
#define REALLOC_INC 100
int alloced = 0;
bool new_arg = true, literal = false, escape = false;
if (kconfig_args[0] == 0) {
return;
}
for (int i = 0; kconfig_args[i] != 0; i++) {
if ((literal == false) && (escape == false) && isspace(kconfig_args[i])) {
new_arg = true;
kconfig_args[i] = 0;
continue;
}
if ((escape == false) && (kconfig_args[i] == '\\')) {
escape = true;
remove_one_char(&kconfig_args[i]);
i--;
continue;
}
if ((escape == false) && (kconfig_args[i] == '"')) {
literal = !literal;
remove_one_char(&kconfig_args[i]);
i--;
continue;
}
escape = false;
if (new_arg) {
new_arg = false;
if (argc >= alloced) {
alloced += REALLOC_INC;
argv = nsi_host_realloc(argv, alloced*sizeof(char *));
if (argv == NULL) {
nsi_print_error_and_exit("Out of memory\n");
}
}
argv[argc++] = &kconfig_args[i];
}
}
nsi_register_extra_args(argc, argv);
nsi_host_free(argv);
}
NATIVE_TASK(register_kconfig_args, PRE_BOOT_1, 100);
``` | /content/code_sandbox/boards/native/common/extra_args/extra_args.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 464 |
```c
/*
*
*/
#include "posix_board_if.h"
#include "soc.h"
#include <zephyr/arch/posix/posix_trace.h>
#include <zephyr/kernel.h>
#include "sdl_events_bottom.h"
static void sdl_handle_events(void *p1, void *p2, void *p3)
{
ARG_UNUSED(p1);
ARG_UNUSED(p2);
ARG_UNUSED(p3);
for (;;) {
int rc = sdl_handle_pending_events();
if (rc != 0) {
posix_exit(0);
}
k_msleep(CONFIG_SDL_THREAD_INTERVAL);
}
}
static void sdl_init(void)
{
if (sdl_init_video() != 0) {
posix_print_error_and_exit("Error on SDL_Init (%s)\n", sdl_get_error());
}
}
static void sdl_cleanup(void)
{
sdl_quit();
}
NATIVE_TASK(sdl_init, PRE_BOOT_2, 1);
NATIVE_TASK(sdl_cleanup, ON_EXIT, 2);
K_THREAD_DEFINE(sdl, CONFIG_ARCH_POSIX_RECOMMENDED_STACK_SIZE,
sdl_handle_events, NULL, NULL, NULL,
CONFIG_SDL_THREAD_PRIORITY, K_ESSENTIAL, 0);
``` | /content/code_sandbox/boards/native/common/sdl/sdl_events.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 255 |
```c
/*
*
*
* "Bottom" of the SDL event handler for the POSIX architecture.
* When built with the native_simulator this will be built in the runner context,
* that is, with the host C library, and with the host include paths.
*
* Therefore it cannot include Zephyr headers
*/
#include <SDL.h>
static void sdl_handle_window_event(const SDL_Event *event)
{
SDL_Window *window;
SDL_Renderer *renderer;
switch (event->window.event) {
case SDL_WINDOWEVENT_EXPOSED:
window = SDL_GetWindowFromID(event->window.windowID);
if (window == NULL) {
return;
}
renderer = SDL_GetRenderer(window);
if (renderer == NULL) {
return;
}
SDL_RenderPresent(renderer);
break;
default:
break;
}
}
/*
* Handle all pending display events
* Return 1 if the window was closed, 0 otherwise.
*/
int sdl_handle_pending_events(void)
{
SDL_Event event;
while (SDL_PollEvent(&event)) {
switch (event.type) {
case SDL_WINDOWEVENT:
sdl_handle_window_event(&event);
break;
case SDL_QUIT:
return 1;
default:
break;
}
}
return 0;
}
/*
* Initialize the SDL library
*
* Returns 0 on success, something else on failure.
*/
int sdl_init_video(void)
{
return SDL_Init(SDL_INIT_VIDEO);
}
/*
* Trampoline to SDL_GetError
*/
const char *sdl_get_error(void)
{
return SDL_GetError();
}
/*
* Trampoline to SDL_Quit()
*/
void sdl_quit(void)
{
SDL_Quit();
}
``` | /content/code_sandbox/boards/native/common/sdl/sdl_events_bottom.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 355 |
```objective-c
/*
*
*/
#ifndef BOARDS_POSIX_COMMON_SDL_SDL_EVENTS_BOTTOM_H
#define BOARDS_POSIX_COMMON_SDL_SDL_EVENTS_BOTTOM_H
#ifdef __cplusplus
extern "C" {
#endif
/* Note: None of these functions are public interfaces. But internal to the SDL event handling */
int sdl_handle_pending_events(void);
int sdl_init_video(void);
void sdl_quit(void);
const char *sdl_get_error(void);
#ifdef __cplusplus
}
#endif
#endif /* BOARDS_POSIX_COMMON_SDL_SDL_EVENTS_BOTTOM_H */
``` | /content/code_sandbox/boards/native/common/sdl/sdl_events_bottom.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 111 |
```unknown
config HAS_SDL
depends on ARCH_POSIX
bool
help
This option specifies that the target board has SDL support
config SDL_THREAD_INTERVAL
int "SDL thread sleep interval"
default 10
depends on HAS_SDL
help
Sleep interval time of SDL thread to handle events in milliseconds.
config SDL_THREAD_PRIORITY
int "SDL thread priority"
default 0
depends on HAS_SDL
help
Priority of SDL thread to handle events.
``` | /content/code_sandbox/boards/native/common/sdl/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 101 |
```unknown
CONFIG_CONSOLE=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=1000000
``` | /content/code_sandbox/boards/native/native_sim/native_sim_64_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 20 |
```cmake
set(SUPPORTED_EMU_PLATFORMS native)
board_set_debugger_ifnset(native)
board_set_flasher_ifnset(native)
board_finalize_runner_args(native)
``` | /content/code_sandbox/boards/native/native_sim/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 38 |
```unknown
config BOARD_NATIVE_SIM
select SOC_POSIX
``` | /content/code_sandbox/boards/native/native_sim/Kconfig.native_sim | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 12 |
```objective-c
/*
*
*/
#ifndef BOARDS_POSIX_COMMON_BOARD_IRQ_H
#define BOARDS_POSIX_COMMON_BOARD_IRQ_H
#include <zephyr/sw_isr_table.h>
#include <zephyr/types.h>
#ifdef __cplusplus
extern "C" {
#endif
void posix_isr_declare(unsigned int irq_p, int flags, void isr_p(const void *),
const void *isr_param_p);
void posix_irq_priority_set(unsigned int irq, unsigned int prio,
uint32_t flags);
/**
* Configure a static interrupt.
*
* @param irq_p IRQ line number
* @param priority_p Interrupt priority
* @param isr_p Interrupt service routine
* @param isr_param_p ISR parameter
* @param flags_p IRQ options
*/
#define ARCH_IRQ_CONNECT(irq_p, priority_p, isr_p, isr_param_p, flags_p) \
{ \
posix_isr_declare(irq_p, 0, isr_p, isr_param_p); \
posix_irq_priority_set(irq_p, priority_p, flags_p); \
}
/**
* Configure a 'direct' static interrupt.
*
* See include/irq.h for details.
*/
#define ARCH_IRQ_DIRECT_CONNECT(irq_p, priority_p, isr_p, flags_p) \
{ \
posix_isr_declare(irq_p, ISR_FLAG_DIRECT, \
(void (*)(const void *))isr_p, NULL); \
posix_irq_priority_set(irq_p, priority_p, flags_p); \
}
/**
* POSIX Architecture (board) specific ISR_DIRECT_DECLARE(),
* See include/irq.h for more information.
*
* The return of "name##_body(void)" is the indication of the interrupt
* (maybe) having caused a kernel decision to context switch
*
* Note that this convention is changed relative to the ARM and x86 archs
*
* All pre/post irq work of the interrupt is handled in the board
* posix_irq_handler() both for direct and normal interrupts together
*/
#define ARCH_ISR_DIRECT_DECLARE(name) \
static inline int name##_body(void); \
int name(void) \
{ \
int check_reschedule; \
check_reschedule = name##_body(); \
return check_reschedule; \
} \
static inline int name##_body(void)
#define ARCH_ISR_DIRECT_HEADER() do { } while (false)
#define ARCH_ISR_DIRECT_FOOTER(a) do { } while (false)
#ifdef CONFIG_PM
extern void posix_irq_check_idle_exit(void);
#define ARCH_ISR_DIRECT_PM() posix_irq_check_idle_exit()
#else
#define ARCH_ISR_DIRECT_PM() do { } while (false)
#endif
#ifdef __cplusplus
}
#endif
#endif /* BOARDS_POSIX_COMMON_BOARD_IRQ_H */
``` | /content/code_sandbox/boards/native/common/irq/board_irq.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 553 |
```unknown
CONFIG_CONSOLE=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=1000000
``` | /content/code_sandbox/boards/native/native_sim/native_sim_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 20 |
```c
/*
*
*/
#include <stdint.h>
#include <stdlib.h>
#include <stdio.h>
#include <stdarg.h>
#include "nsi_cpu_es_if.h"
/*
* This file provides the interfaces the POSIX architecture and soc_inf
* expect from all boards that use them
*/
void posix_exit(int exit_code)
{
nsi_exit(exit_code);
}
void posix_vprint_error_and_exit(const char *format, va_list vargs)
{
nsi_vprint_error_and_exit(format, vargs);
}
void posix_vprint_warning(const char *format, va_list vargs)
{
nsi_vprint_warning(format, vargs);
}
void posix_vprint_trace(const char *format, va_list vargs)
{
nsi_vprint_trace(format, vargs);
}
void posix_print_error_and_exit(const char *format, ...)
{
va_list variable_args;
va_start(variable_args, format);
nsi_vprint_error_and_exit(format, variable_args);
va_end(variable_args);
}
void posix_print_warning(const char *format, ...)
{
va_list variable_args;
va_start(variable_args, format);
nsi_vprint_warning(format, variable_args);
va_end(variable_args);
}
void posix_print_trace(const char *format, ...)
{
va_list variable_args;
va_start(variable_args, format);
nsi_vprint_trace(format, variable_args);
va_end(variable_args);
}
int posix_trace_over_tty(int file_number)
{
return nsi_trace_over_tty(file_number);
}
uint64_t posix_get_hw_cycle(void)
{
return nsi_hws_get_time();
}
``` | /content/code_sandbox/boards/native/native_sim/posix_arch_if.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 319 |
```objective-c
/*
*
*/
#ifndef BOARDS_POSIX_NATIVE_SIM_IRQ_HANDLER_H
#define BOARDS_POSIX_NATIVE_SIM_IRQ_HANDLER_H
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
void posix_sw_set_pending_IRQ(unsigned int IRQn);
void posix_sw_clear_pending_IRQ(unsigned int IRQn);
#ifdef __cplusplus
}
#endif
#endif /* BOARDS_POSIX_NATIVE_SIM_IRQ_HANDLER_H */
``` | /content/code_sandbox/boards/native/native_sim/irq_handler.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 83 |
```objective-c
/*
*
*/
#ifndef BOARDS_POSIX_NATIVE_SIM_CMDLINE_COMMON_H
#define BOARDS_POSIX_NATIVE_SIM_CMDLINE_COMMON_H
/*
* To support native_posix drivers which register their own arguments
* we provide a header with the same name as in native_posix
*/
#include "nsi_cmdline.h"
#endif /* BOARDS_POSIX_NATIVE_SIM_CMDLINE_COMMON_H */
``` | /content/code_sandbox/boards/native/native_sim/cmdline_common.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 79 |
```yaml
identifier: native_sim
name: Native Simulation port - 32-bit
type: native
simulation: native
arch: posix
ram: 65536
flash: 65536
toolchain:
- host
- llvm
supported:
- can
- counter
- dma
- eeprom
- netif:eth
- mspi
- usb_device
- adc
- i2c
- spi
- gpio
- rtc
testing:
default: true
vendor: zephyr
``` | /content/code_sandbox/boards/native/native_sim/native_sim.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 122 |
```objective-c
/*
*
*/
#ifndef BOARDS_POSIX_NATIVE_SIM_CMDLINE_H
#define BOARDS_POSIX_NATIVE_SIM_CMDLINE_H
#include "nsi_cmdline.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
* To support native_posix drivers or tests which register their own arguments
* we provide a header with the same name as in native_posix
*/
void native_get_cmd_line_args(int *argc, char ***argv);
void native_get_test_cmd_line_args(int *argc, char ***argv);
void native_add_command_line_opts(struct args_struct_t *args);
#ifdef __cplusplus
}
#endif
#endif /* BOARDS_POSIX_NATIVE_SIM_CMDLINE_H */
``` | /content/code_sandbox/boards/native/native_sim/cmdline.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 138 |
```c
/*
*
*/
#include <stdbool.h>
#include <stdint.h>
#include <zephyr/arch/posix/posix_soc_if.h>
#include <posix_board_if.h>
#include <posix_soc.h>
#include "nsi_hw_scheduler.h"
#include "nsi_timer_model.h"
/**
* Replacement to the kernel k_busy_wait()
* Will block this thread (and therefore the whole Zephyr) during usec_to_wait
*
* Note that interrupts may be received in the meanwhile and that therefore this
* thread may lose context.
* Therefore the wait time may be considerably longer.
*
* All this function ensures is that it will return after usec_to_wait or later.
*
* This special arch_busy_wait() is necessary due to how the POSIX arch/SOC INF
* models a CPU. Conceptually it could be thought as if the MCU was running
* at an infinitely high clock, and therefore no simulated time passes while
* executing instructions(*1).
* Therefore to be able to busy wait this function does the equivalent of
* programming a dedicated timer which will raise a non-maskable interrupt,
* and halting the CPU.
*
* (*1) In reality simulated time is simply not advanced just due to the "MCU"
* running. Meaning, the SW running on the MCU is assumed to take 0 time.
*/
void arch_busy_wait(uint32_t usec_to_wait)
{
uint64_t time_end = nsi_hws_get_time() + usec_to_wait;
while (nsi_hws_get_time() < time_end) {
/*
* There may be wakes due to other interrupts including
* other threads calling arch_busy_wait
*/
hwtimer_wake_in_time(time_end);
posix_halt_cpu();
}
}
/**
* Will block this thread (and therefore the whole Zephyr) during usec_to_waste
*
* Very similar to arch_busy_wait(), but if an interrupt or context switch
* occurs this function will continue waiting after, ensuring that
* usec_to_waste are spent in this context, irrespectively of how much more
* time would be spent on interrupt handling or possible switched-in tasks.
*
* Can be used to emulate code execution time.
*/
void posix_cpu_hold(uint32_t usec_to_waste)
{
uint64_t time_start;
int64_t to_wait = usec_to_waste;
while (to_wait > 0) {
/*
* There may be wakes due to other interrupts or nested calls to
* cpu_hold in interrupt handlers
*/
time_start = nsi_hws_get_time();
hwtimer_wake_in_time(time_start + to_wait);
posix_change_cpu_state_and_wait(true);
to_wait -= nsi_hws_get_time() - time_start;
posix_irq_handler();
}
}
``` | /content/code_sandbox/boards/native/native_sim/cpu_wait.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 592 |
```unknown
/*
*
*/
#include "native_sim.dts"
``` | /content/code_sandbox/boards/native/native_sim/native_sim_64.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 11 |
```objective-c
/*
*
*/
/*
* This file provides in native_sim a set of APIs the native_posix board provided
* to allow building the native_posix drivers or applications which depended
* on those.
* Note that all these APIs should be considered deprecated in native_sim, as this
* exists solely as a transitional component.
*/
#ifndef BOARDS_POSIX_NATIVE_SIM_NATIVE_POSIX_COMPAT_H
#define BOARDS_POSIX_NATIVE_SIM_NATIVE_POSIX_COMPAT_H
#include <stdint.h>
#include <zephyr/toolchain.h>
#include "nsi_hw_scheduler.h"
#ifdef __cplusplus
extern "C" {
#endif
static ALWAYS_INLINE void hwm_find_next_timer(void)
{
nsi_hws_find_next_event();
}
static ALWAYS_INLINE uint64_t hwm_get_time(void)
{
return nsi_hws_get_time();
}
#define NEVER NSI_NEVER
#ifdef __cplusplus
}
#endif
#endif /* BOARDS_POSIX_NATIVE_SIM_NATIVE_POSIX_COMPAT_H */
``` | /content/code_sandbox/boards/native/native_sim/native_posix_compat.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 197 |
```c
/*
*
*/
/*
* To support native_posix drivers or tests which register their own arguments
* we provide the same API as in native_posix
*/
#include "nsi_cmdline.h"
void native_add_command_line_opts(struct args_struct_t *args)
{
nsi_add_command_line_opts(args);
}
void native_get_cmd_line_args(int *argc, char ***argv)
{
nsi_get_cmd_line_args(argc, argv);
}
void native_get_test_cmd_line_args(int *argc, char ***argv)
{
nsi_get_test_cmd_line_args(argc, argv);
}
``` | /content/code_sandbox/boards/native/native_sim/cmdline.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 118 |
```objective-c
/*
*
*/
#ifndef BOARDS_POSIX_NATIVE_SIM_BOARD_IRQ_H
#define BOARDS_POSIX_NATIVE_SIM_BOARD_IRQ_H
#include "../common/irq/board_irq.h"
#endif /* BOARDS_POSIX_NATIVE_SIM_BOARD_IRQ_H */
``` | /content/code_sandbox/boards/native/native_sim/board_irq.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 47 |
```yaml
boards:
- name: native_sim
vendor: zephyr
socs:
- name: native
variants:
- name: "64"
``` | /content/code_sandbox/boards/native/native_sim/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 36 |
```c
/*
*
*/
#include <soc.h>
#include <posix_native_task.h>
#include <nsi_cpu_if.h>
void nsif_cpu0_pre_cmdline_hooks(void)
{
run_native_tasks(_NATIVE_PRE_BOOT_1_LEVEL);
}
void nsif_cpu0_pre_hw_init_hooks(void)
{
run_native_tasks(_NATIVE_PRE_BOOT_2_LEVEL);
}
void nsif_cpu0_boot(void)
{
run_native_tasks(_NATIVE_PRE_BOOT_3_LEVEL);
posix_boot_cpu();
run_native_tasks(_NATIVE_FIRST_SLEEP_LEVEL);
}
int nsif_cpu0_cleanup(void)
{
/*
* Note posix_soc_clean_up() may not return, but in that case,
* nsif_cpu0_cleanup() will be called again
*/
posix_soc_clean_up();
return 0;
}
void nsif_cpu0_irq_raised(void)
{
posix_interrupt_raised();
}
``` | /content/code_sandbox/boards/native/native_sim/nsi_if.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 183 |
```objective-c
/*
*
*/
#ifndef BOARDS_POSIX_NATIVE_SIM_TIMER_MODEL_H
#define BOARDS_POSIX_NATIVE_SIM_TIMER_MODEL_H
/*
* To support the native_posix timer driver
* we provide a header with the same name as in native_posix
*/
#include "nsi_hw_scheduler.h"
#include "nsi_timer_model.h"
#include "native_posix_compat.h"
#endif /* BOARDS_POSIX_NATIVE_SIM_TIMER_MODEL_H */
``` | /content/code_sandbox/boards/native/native_sim/timer_model.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 89 |
```unknown
if BOARD_NATIVE_SIM
config BUILD_OUTPUT_BIN
default n
config BUILD_OUTPUT_EXE
default y
config OUTPUT_PRINT_MEMORY_USAGE
default n
if NETWORKING
config NET_L2_ETHERNET
default y if !NET_LOOPBACK && !NET_TEST
config ETH_NATIVE_POSIX
default y if NET_L2_ETHERNET && ETH_DRIVER
endif # NETWORKING
if CONSOLE
config POSIX_ARCH_CONSOLE
default y if !SERIAL
config UART_CONSOLE
default y if SERIAL
endif # CONSOLE
endif # BOARD_NATIVE_SIM
``` | /content/code_sandbox/boards/native/native_sim/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 117 |
```unknown
config BOARD_NATIVE_SIM
bool
select POSIX_ARCH_CONSOLE
select NATIVE_LIBRARY
select NATIVE_POSIX_TIMER
select 64BIT if BOARD_NATIVE_SIM_NATIVE_64
imply BOARD_NATIVE_POSIX if NATIVE_SIM_NATIVE_POSIX_COMPAT
help
Native simulator (Single Core)
Will produce a console Linux process which can be executed natively.
if BOARD_NATIVE_SIM
comment "Native Simular (Single Core) options"
config NATIVE_SIM_NATIVE_POSIX_COMPAT
bool "Pretend to be a native_posix board"
default y
help
When this option is set the native_sim board will pretend to be
a native_posix board from kconfig point of view, to allow using it directly with
code which was meant for the native_posix board and checks for the macro
CONFIG_BOARD_NATIVE_POSIX, or requires other kconfig options which depend on it.
config NATIVE_SIM_SLOWDOWN_TO_REAL_TIME
bool "Slow down execution to real time"
default n if ARCH_POSIX_LIBFUZZER
default y if BT_USERCHAN || !TEST
help
When selected the execution of the process will be slowed down to real time.
(if there is a lot of load it may be slower than real time)
If deselected, the process will run as fast as possible.
Note that this only decouples simulated time from real/wall time. In either
case the zephyr kernel and application cannot tell the difference unless they
interact with some other driver/device which runs at real time.
# This option definition exists only to enable NATIVE_SIM_NATIVE_POSIX_COMPAT
config BOARD_NATIVE_POSIX
bool
config NATIVE_POSIX_SLOWDOWN_TO_REAL_TIME
bool "Slow down execution to real time (native_posix compat)"
select NATIVE_SIM_SLOWDOWN_TO_REAL_TIME
help
Transitional option which allows applications which targeted native_posix
to set the correct native_sim option (CONFIG_NATIVE_SIM_SLOWDOWN_TO_REAL_TIME)
source "boards/native/common/sdl/Kconfig"
source "boards/native/common/extra_args/Kconfig"
endif # BOARD_NATIVE_SIM
``` | /content/code_sandbox/boards/native/native_sim/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 447 |
```c
/*
*
*/
#include "posix_native_task.h"
#include "nsi_timer_model.h"
#if defined(CONFIG_NATIVE_SIM_SLOWDOWN_TO_REAL_TIME)
static void set_realtime_default(void)
{
hwtimer_set_real_time_mode(true);
}
NATIVE_TASK(set_realtime_default, PRE_BOOT_1, 0);
#endif /* CONFIG_NATIVE_SIM_SLOWDOWN_TO_REAL_TIME */
``` | /content/code_sandbox/boards/native/native_sim/misc.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 78 |
```c
/*
*
*
* SW side of the IRQ handling
*/
#include <stdint.h>
#include <zephyr/irq_offload.h>
#include <zephyr/kernel_structs.h>
#include "kernel_internal.h"
#include "kswap.h"
#include "irq_ctrl.h"
#include "posix_core.h"
#include <zephyr/sw_isr_table.h>
#include "soc.h"
#include <zephyr/tracing/tracing.h>
#include "irq_handler.h"
#include "board_soc.h"
#include "nsi_cpu_if.h"
typedef void (*normal_irq_f_ptr)(const void *);
typedef int (*direct_irq_f_ptr)(void);
static struct _isr_list irq_vector_table[N_IRQS] = { { 0 } };
static int currently_running_irq = -1;
static inline void vector_to_irq(int irq_nbr, int *may_swap)
{
sys_trace_isr_enter();
if (irq_vector_table[irq_nbr].func == NULL) { /* LCOV_EXCL_BR_LINE */
/* LCOV_EXCL_START */
posix_print_error_and_exit("Received irq %i without a "
"registered handler\n",
irq_nbr);
/* LCOV_EXCL_STOP */
} else {
if (irq_vector_table[irq_nbr].flags & ISR_FLAG_DIRECT) {
*may_swap |= ((direct_irq_f_ptr)
irq_vector_table[irq_nbr].func)();
} else {
#ifdef CONFIG_PM
posix_irq_check_idle_exit();
#endif
((normal_irq_f_ptr)irq_vector_table[irq_nbr].func)
(irq_vector_table[irq_nbr].param);
*may_swap = 1;
}
}
sys_trace_isr_exit();
}
/**
* When an interrupt is raised, this function is called to handle it and, if
* needed, swap to a re-enabled thread
*
* Note that even that this function is executing in a Zephyr thread, it is
* effectively the model of the interrupt controller passing context to the IRQ
* handler and therefore its priority handling
*/
void posix_irq_handler(void)
{
uint64_t irq_lock;
int irq_nbr;
static int may_swap;
irq_lock = hw_irq_ctrl_get_current_lock();
if (irq_lock) {
/* "spurious" wakes can happen with interrupts locked */
return;
}
irq_nbr = hw_irq_ctrl_get_highest_prio_irq();
if (irq_nbr == -1) {
/* This is a phony interrupt during a busy wait, no need for more */
return;
}
if (_kernel.cpus[0].nested == 0) {
may_swap = 0;
}
_kernel.cpus[0].nested++;
do {
int last_current_running_prio = hw_irq_ctrl_get_cur_prio();
int last_running_irq = currently_running_irq;
hw_irq_ctrl_set_cur_prio(hw_irq_ctrl_get_prio(irq_nbr));
hw_irq_ctrl_clear_irq(irq_nbr);
currently_running_irq = irq_nbr;
vector_to_irq(irq_nbr, &may_swap);
currently_running_irq = last_running_irq;
hw_irq_ctrl_set_cur_prio(last_current_running_prio);
} while ((irq_nbr = hw_irq_ctrl_get_highest_prio_irq()) != -1);
_kernel.cpus[0].nested--;
/* Call swap if all the following is true:
* 1) may_swap was enabled
* 2) We are not nesting irq_handler calls (interrupts)
* 3) Next thread to run in the ready queue is not this thread
*/
if (may_swap
&& (hw_irq_ctrl_get_cur_prio() == 256)
&& (_kernel.ready_q.cache) && (_kernel.ready_q.cache != _current)) {
(void)z_swap_irqlock(irq_lock);
}
}
/**
* Thru this function the IRQ controller can raise an immediate interrupt which
* will interrupt the SW itself
* (this function should only be called from the HW model code, from SW threads)
*/
void nsif_cpu0_irq_raised_from_sw(void)
{
/*
* if a higher priority interrupt than the possibly currently running is
* pending we go immediately into irq_handler() to vector into its
* handler
*/
if (hw_irq_ctrl_get_highest_prio_irq() != -1) {
if (!posix_is_cpu_running()) { /* LCOV_EXCL_BR_LINE */
/* LCOV_EXCL_START */
posix_print_error_and_exit("programming error: %s "
"called from a HW model thread\n",
__func__);
/* LCOV_EXCL_STOP */
}
posix_irq_handler();
}
}
/**
* @brief Disable all interrupts on the CPU
*
* This routine disables interrupts. It can be called from either interrupt,
* task or fiber level. This routine returns an architecture-dependent
* lock-out key representing the "interrupt disable state" prior to the call;
* this key can be passed to irq_unlock() to re-enable interrupts.
*
* The lock-out key should only be used as the argument to the irq_unlock()
* API. It should never be used to manually re-enable interrupts or to inspect
* or manipulate the contents of the source register.
*
* This function can be called recursively: it will return a key to return the
* state of interrupt locking to the previous level.
*
* WARNINGS
* Invoking a kernel routine with interrupts locked may result in
* interrupts being re-enabled for an unspecified period of time. If the
* called routine blocks, interrupts will be re-enabled while another
* thread executes, or while the system is idle.
*
* The "interrupt disable state" is an attribute of a thread. Thus, if a
* fiber or task disables interrupts and subsequently invokes a kernel
* routine that causes the calling thread to block, the interrupt
* disable state will be restored when the thread is later rescheduled
* for execution.
*
* @return An architecture-dependent lock-out key representing the
* "interrupt disable state" prior to the call.
*
*/
unsigned int posix_irq_lock(void)
{
return hw_irq_ctrl_change_lock(true);
}
/**
* @brief Enable all interrupts on the CPU
*
* This routine re-enables interrupts on the CPU. The @a key parameter is a
* board-dependent lock-out key that is returned by a previous invocation of
* board_irq_lock().
*
* This routine can be called from either interrupt, task or fiber level.
*/
void posix_irq_unlock(unsigned int key)
{
hw_irq_ctrl_change_lock(key);
}
void posix_irq_full_unlock(void)
{
hw_irq_ctrl_change_lock(false);
}
void posix_irq_enable(unsigned int irq)
{
hw_irq_ctrl_enable_irq(irq);
}
void posix_irq_disable(unsigned int irq)
{
hw_irq_ctrl_disable_irq(irq);
}
int posix_irq_is_enabled(unsigned int irq)
{
return hw_irq_ctrl_is_irq_enabled(irq);
}
int posix_get_current_irq(void)
{
return currently_running_irq;
}
/**
* Configure a static interrupt.
*
* posix_isr_declare will populate the interrupt table table with the
* interrupt's parameters, the vector table and the software ISR table.
*
* We additionally set the priority in the interrupt controller at
* runtime.
*
* @param irq_p IRQ line number
* @param flags [plug it directly (1), or as a SW managed interrupt (0)]
* @param isr_p Interrupt service routine
* @param isr_param_p ISR parameter
* @param flags_p IRQ options
*/
void posix_isr_declare(unsigned int irq_p, int flags, void isr_p(const void *),
const void *isr_param_p)
{
if (irq_p >= N_IRQS) {
posix_print_error_and_exit("Attempted to configure not existent interrupt %u\n",
irq_p);
return;
}
irq_vector_table[irq_p].irq = irq_p;
irq_vector_table[irq_p].func = isr_p;
irq_vector_table[irq_p].param = isr_param_p;
irq_vector_table[irq_p].flags = flags;
}
/**
* @internal
*
* @brief Set an interrupt's priority
*
* Lower values take priority over higher values.
*/
void posix_irq_priority_set(unsigned int irq, unsigned int prio, uint32_t flags)
{
hw_irq_ctrl_prio_set(irq, prio);
}
/**
* Similar to ARM's NVIC_SetPendingIRQ
* set a pending IRQ from SW
*
* Note that this will interrupt immediately if the interrupt is not masked and
* IRQs are not locked, and this interrupt has higher priority than a possibly
* currently running interrupt
*/
void posix_sw_set_pending_IRQ(unsigned int IRQn)
{
hw_irq_ctrl_raise_im_from_sw(IRQn);
}
/**
* Similar to ARM's NVIC_ClearPendingIRQ
* clear a pending irq from SW
*/
void posix_sw_clear_pending_IRQ(unsigned int IRQn)
{
hw_irq_ctrl_clear_irq(IRQn);
}
#ifdef CONFIG_IRQ_OFFLOAD
/**
* Storage for functions offloaded to IRQ
*/
static void (*off_routine)(const void *);
static const void *off_parameter;
/**
* IRQ handler for the SW interrupt assigned to irq_offload()
*/
static void offload_sw_irq_handler(const void *a)
{
ARG_UNUSED(a);
off_routine(off_parameter);
}
/**
* @brief Run a function in interrupt context
*
* Raise the SW IRQ assigned to handled this
*/
void posix_irq_offload(void (*routine)(const void *), const void *parameter)
{
off_routine = routine;
off_parameter = parameter;
posix_isr_declare(OFFLOAD_SW_IRQ, 0, offload_sw_irq_handler, NULL);
posix_irq_enable(OFFLOAD_SW_IRQ);
posix_sw_set_pending_IRQ(OFFLOAD_SW_IRQ);
posix_irq_disable(OFFLOAD_SW_IRQ);
}
#endif /* CONFIG_IRQ_OFFLOAD */
``` | /content/code_sandbox/boards/native/native_sim/irq_handler.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,105 |
```objective-c
/*
*
*/
/**
* @file Extra definitions provided by the board to soc.h
*
* Background:
* The POSIX ARCH/SOC/board layering is different than in normal archs
* The "SOC" does not provide almost any of the typical SOC functionality
* but that is left for the "board" to define it
* Device code may rely on the soc.h defining some things (like the interrupts
* numbers)
* Therefore this file is included from the inf_clock soc.h to allow a board
* to define that kind of SOC related snippets
*/
#ifndef BOARDS_POSIX_NATIVE_SIM_BOARD_SOC_H
#define BOARDS_POSIX_NATIVE_SIM_BOARD_SOC_H
#include "nsi_cpu0_interrupts.h"
#define NSOS_IRQ 3
#endif /* BOARDS_POSIX_NATIVE_SIM_BOARD_SOC_H */
``` | /content/code_sandbox/boards/native/native_sim/board_soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 168 |
```yaml
identifier: native_sim/native/64
name: Native Simulation port - 64-bit variant
type: native
simulation: native
arch: posix
ram: 65536
flash: 65536
toolchain:
- host
- llvm
supported:
- can
- counter
- dma
- eeprom
- netif:eth
- usb_device
- adc
- gpio
- rtc
vendor: zephyr
``` | /content/code_sandbox/boards/native/native_sim/native_sim_native_64.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 104 |
```unknown
/*
*
*/
/dts-v1/;
#include <posix/posix.dtsi>
#include <zephyr/dt-bindings/adc/adc.h>
#include <zephyr/dt-bindings/i2c/i2c.h>
#include <zephyr/dt-bindings/gpio/gpio.h>
/ {
model = "Native Sim Board";
compatible = "zephyr,posix";
chosen {
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,uart-mcumgr = &uart0;
zephyr,flash = &flash0;
zephyr,entropy = &rng;
zephyr,flash-controller = &flashcontroller0;
zephyr,display = &sdl_dc;
zephyr,canbus = &can_loopback0;
zephyr,code-partition = &slot0_partition;
zephyr,bt-hci = &bt_hci_userchan;
};
aliases {
eeprom-0 = &eeprom0;
i2c-0 = &i2c0;
spi-0 = &spi0;
led0 = &led0;
rtc = &rtc;
};
leds {
compatible = "gpio-leds";
led0: led_0 {
gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
label = "Green LED";
};
};
lvgl_pointer {
compatible = "zephyr,lvgl-pointer-input";
input = <&input_sdl_touch>;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@0 {
compatible = "zephyr,native-posix-cpu";
reg = <0>;
};
};
flashcontroller0: flash-controller@0 {
compatible = "zephyr,sim-flash";
reg = <0x00000000 DT_SIZE_K(2048)>;
#address-cells = <1>;
#size-cells = <1>;
erase-value = <0xff>;
flash0: flash@0 {
status = "okay";
compatible = "soc-nv-flash";
erase-block-size = <4096>;
write-block-size = <1>;
reg = <0x00000000 DT_SIZE_K(2048)>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 0x0000C000>;
};
slot0_partition: partition@c000 {
label = "image-0";
reg = <0x0000C000 0x00069000>;
};
slot1_partition: partition@75000 {
label = "image-1";
reg = <0x00075000 0x00069000>;
};
scratch_partition: partition@de000 {
label = "image-scratch";
reg = <0x000de000 0x0001e000>;
};
storage_partition: partition@fc000 {
label = "storage";
reg = <0x000fc000 0x00004000>;
};
};
};
};
eeprom0: eeprom {
status = "okay";
compatible = "zephyr,sim-eeprom";
size = <DT_SIZE_K(32)>;
};
i2c0: i2c@100 {
status = "okay";
compatible = "zephyr,i2c-emul-controller";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
#forward-cells = <1>;
reg = <0x100 4>;
};
spi0: spi@200 {
status = "okay";
compatible = "zephyr,spi-emul-controller";
clock-frequency = <50000000>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x200 4>;
};
espi0: espi@300 {
status = "okay";
compatible = "zephyr,espi-emul-controller";
reg = <0x300 4>;
#address-cells = <1>;
#size-cells = <0>;
};
mspi0: mspi@400 {
status = "okay";
compatible = "zephyr,mspi-emul-controller";
clock-frequency = <250000000>;
reg = <0x400 4>;
#address-cells = <1>;
#size-cells = <0>;
};
uart0: uart {
status = "okay";
compatible = "zephyr,native-posix-uart";
/* Dummy current-speed entry to comply with serial
* DTS binding
*/
current-speed = <0>;
};
uart1: uart_1 {
status = "okay";
compatible = "zephyr,native-posix-uart";
/* Dummy current-speed entry to comply with serial
* DTS binding
*/
current-speed = <0>;
};
rng: rng {
status = "okay";
compatible = "zephyr,native-posix-rng";
};
counter0: counter {
status = "okay";
compatible = "zephyr,native-posix-counter";
};
gpio0: gpio_emul {
status = "okay";
compatible = "zephyr,gpio-emul";
rising-edge;
falling-edge;
high-level;
low-level;
gpio-controller;
#gpio-cells = <2>;
};
zephyr_udc0: udc0 {
compatible = "zephyr,native-posix-udc";
};
sdl_dc: sdl_dc {
compatible = "zephyr,sdl-dc";
height = <240>;
width = <320>;
};
input_sdl_touch: input-sdl-touch {
compatible = "zephyr,input-sdl-touch";
};
can_loopback0: can_loopback0 {
status = "okay";
compatible = "zephyr,can-loopback";
};
can0: can {
status = "disabled";
compatible = "zephyr,native-linux-can";
/* adjust zcan0 to desired host interface or create an alternative
* name, e.g.: sudo ip link property add dev vcan0 altname zcan0
*/
host-interface = "zcan0";
};
rtc: rtc {
status = "okay";
compatible = "zephyr,rtc-emul";
alarms-count = <2>;
};
adc0: adc {
compatible = "zephyr,adc-emul";
nchannels = <2>;
#io-channel-cells = <1>;
status = "okay";
};
dma: dma {
compatible = "zephyr,dma-emul";
#dma-cells = <1>;
stack-size = <4096>;
};
bt_hci_userchan: bt_hci_userchan {
compatible = "zephyr,bt-hci-userchan";
status = "okay";
};
};
``` | /content/code_sandbox/boards/native/native_sim/native_sim.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,663 |
```cmake
set(SUPPORTED_EMU_PLATFORMS native)
board_set_debugger_ifnset(native)
board_set_flasher_ifnset(native)
board_finalize_runner_args(native)
``` | /content/code_sandbox/boards/native/native_posix/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 38 |
```yaml
identifier: native_posix/native/64
name: Native 64-bit POSIX port
type: native
simulation: native
arch: posix
ram: 65536
flash: 65536
toolchain:
- host
- llvm
supported:
- can
- counter
- dma
- eeprom
- netif:eth
- usb_device
- adc
- gpio
- rtc
vendor: zephyr
``` | /content/code_sandbox/boards/native/native_posix/native_posix_native_64.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 103 |
```c
/*
*
*/
/**
* API to the native_posix (Real) Time Clock
*/
#include "native_rtc.h"
#include "hw_models_top.h"
#include "timer_model.h"
#include <zephyr/arch/posix/posix_trace.h>
/**
* Return the (simulation) time in microseconds
* where clock_type is one of RTC_CLOCK_*
*/
uint64_t native_rtc_gettime_us(int clock_type)
{
if (clock_type == RTC_CLOCK_BOOT) {
return hwm_get_time();
} else if (clock_type == RTC_CLOCK_REALTIME) { /* RTC_CLOCK_REALTIME */
return hwtimer_get_simu_rtc_time();
} else if (clock_type == RTC_CLOCK_PSEUDOHOSTREALTIME) {
uint32_t nsec;
uint64_t sec;
hwtimer_get_pseudohost_rtc_time(&nsec, &sec);
return sec * 1000000UL + nsec / 1000U;
}
posix_print_error_and_exit("Unknown clock source %i\n",
clock_type);
return 0;
}
/**
* Similar to POSIX clock_gettime()
* get the simulation time split in nsec and seconds
* where clock_type is one of RTC_CLOCK_*
*/
void native_rtc_gettime(int clock_type, uint32_t *nsec, uint64_t *sec)
{
if (clock_type == RTC_CLOCK_BOOT || clock_type == RTC_CLOCK_REALTIME) {
uint64_t us = native_rtc_gettime_us(clock_type);
*nsec = (us % 1000000UL) * 1000U;
*sec = us / 1000000UL;
} else { /* RTC_CLOCK_PSEUDOHOSTREALTIME */
hwtimer_get_pseudohost_rtc_time(nsec, sec);
}
}
/**
* Offset the real time clock by a number of microseconds.
* Note that this only affects the RTC_CLOCK_REALTIME and
* RTC_CLOCK_PSEUDOHOSTREALTIME clocks.
*/
void native_rtc_offset(int64_t delta_us)
{
hwtimer_adjust_rtc_offset(delta_us);
}
/**
* Adjust the speed of the clock source by a multiplicative factor
*/
void native_rtc_adjust_clock(double clock_correction)
{
hwtimer_adjust_rt_ratio(clock_correction);
}
``` | /content/code_sandbox/boards/native/native_posix/native_rtc.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 483 |
```c
/*
*
*/
/**
* Reduced set of HW models sufficient to run some of the sample apps
* and regression tests
*/
#include <stdint.h>
#include <signal.h>
#include <stddef.h>
#include <stdlib.h>
#include <pthread.h>
#include "hw_models_top.h"
#include "timer_model.h"
#include "irq_ctrl.h"
#include "posix_board_if.h"
#include "hw_counter.h"
#include <zephyr/arch/posix/posix_soc_if.h>
#include "posix_arch_internal.h"
#include <zephyr/sys/util.h>
static uint64_t simu_time; /* The actual time as known by the HW models */
static uint64_t end_of_time = NEVER; /* When will this device stop */
/* List of HW model timers: */
extern uint64_t hw_timer_timer; /* When should this timer_model be called */
extern uint64_t irq_ctrl_timer;
extern uint64_t hw_counter_timer;
static enum {
HWTIMER = 0,
IRQCNT,
HW_COUNTER,
NUMBER_OF_TIMERS,
NONE
} next_timer_index = NONE;
static uint64_t *Timer_list[NUMBER_OF_TIMERS] = {
&hw_timer_timer,
&irq_ctrl_timer,
&hw_counter_timer,
};
static uint64_t next_timer_time;
/* Have we received a SIGTERM or SIGINT */
static volatile sig_atomic_t signaled_end;
/**
* Handler for SIGTERM and SIGINT
*/
void hwm_signal_end_handler(int sig)
{
signaled_end = 1;
}
/**
* Set the handler for SIGTERM and SIGINT which will cause the
* program to exit gracefully when they are received the 1st time
*
* Note that our handler only sets a variable indicating the signal was
* received, and in each iteration of the hw main loop this variable is
* evaluated.
* If for some reason (the program is stuck) we never evaluate it, the program
* would never exit.
* Therefore we set SA_RESETHAND: This way, the 2nd time the signal is received
* the default handler would be called to terminate the program no matter what.
*
* Note that SA_RESETHAND requires either _POSIX_C_SOURCE>=200809L or
* _XOPEN_SOURCE>=500
*/
void hwm_set_sig_handler(void)
{
struct sigaction act;
act.sa_handler = hwm_signal_end_handler;
PC_SAFE_CALL(sigemptyset(&act.sa_mask));
act.sa_flags = SA_RESETHAND;
PC_SAFE_CALL(sigaction(SIGTERM, &act, NULL));
PC_SAFE_CALL(sigaction(SIGINT, &act, NULL));
}
static void hwm_sleep_until_next_timer(void)
{
if (next_timer_time >= simu_time) { /* LCOV_EXCL_BR_LINE */
simu_time = next_timer_time;
} else {
/* LCOV_EXCL_START */
posix_print_warning("next_timer_time corrupted (%"PRIu64"<= %"
PRIu64", timer idx=%i)\n",
(uint64_t)next_timer_time,
(uint64_t)simu_time,
next_timer_index);
/* LCOV_EXCL_STOP */
}
if (signaled_end || (simu_time > end_of_time)) {
posix_print_trace("\nStopped at %.3Lfs\n",
((long double)simu_time)/1.0e6L);
posix_exit(0);
}
}
/**
* Find in between all timers which is the next one
* and update next_timer_* accordingly
*/
void hwm_find_next_timer(void)
{
next_timer_index = 0;
next_timer_time = *Timer_list[0];
for (unsigned int i = 1; i < NUMBER_OF_TIMERS ; i++) {
if (next_timer_time > *Timer_list[i]) {
next_timer_index = i;
next_timer_time = *Timer_list[i];
}
}
}
/**
* Execute the next scheduled HW event/timer
*/
void hwm_one_event(void)
{
hwm_sleep_until_next_timer();
switch (next_timer_index) { /* LCOV_EXCL_BR_LINE */
case HWTIMER:
hwtimer_timer_reached();
break;
case IRQCNT:
hw_irq_ctrl_timer_triggered();
break;
case HW_COUNTER:
hw_counter_triggered();
break;
default:
/* LCOV_EXCL_START */
posix_print_error_and_exit(
"next_timer_index corrupted\n");
break;
/* LCOV_EXCL_STOP */
}
hwm_find_next_timer();
}
/**
* Set the simulated time when the process will stop
*/
void hwm_set_end_of_time(uint64_t new_end_of_time)
{
end_of_time = new_end_of_time;
}
/**
* Return the current time as known by the device
*/
uint64_t hwm_get_time(void)
{
return simu_time;
}
uint64_t posix_get_hw_cycle(void)
{
return hwm_get_time();
}
/**
* Function to initialize the HW models
*/
void hwm_init(void)
{
hwm_set_sig_handler();
hwtimer_init();
hw_counter_init();
hw_irq_ctrl_init();
hwm_find_next_timer();
}
/**
* Function to free any resources allocated by the HW models
* Note that this function needs to be designed so it is possible
* to call it more than once during cleanup
*/
void hwm_cleanup(void)
{
hwtimer_cleanup();
hw_irq_ctrl_cleanup();
}
``` | /content/code_sandbox/boards/native/native_posix/hw_models_top.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,159 |
```c
/*
*
*/
/**
* Functions to print errors and traces
*/
#include <stdlib.h> /* for exit */
#include <stdio.h> /* for printfs */
#include <stdarg.h> /* for va args */
#include <unistd.h>
#include "soc.h"
#include "posix_board_if.h"
#include "cmdline.h"
void posix_vprint_error_and_exit(const char *format, va_list vargs)
{
vfprintf(stderr, format, vargs);
posix_exit(1);
}
void posix_vprint_warning(const char *format, va_list vargs)
{
vfprintf(stderr, format, vargs);
}
void posix_vprint_trace(const char *format, va_list vargs)
{
vfprintf(stdout, format, vargs);
}
void posix_print_error_and_exit(const char *format, ...)
{
va_list variable_args;
va_start(variable_args, format);
posix_vprint_error_and_exit(format, variable_args);
va_end(variable_args);
}
void posix_print_warning(const char *format, ...)
{
va_list variable_args;
va_start(variable_args, format);
vfprintf(stderr, format, variable_args);
va_end(variable_args);
}
void posix_print_trace(const char *format, ...)
{
va_list variable_args;
va_start(variable_args, format);
vfprintf(stdout, format, variable_args);
va_end(variable_args);
}
/**
* Are stdout and stderr connected to a tty
* 0 = no
* 1 = yes
* -1 = we do not know yet
* Indexed 0:stdout, 1:stderr
*/
static int is_a_tty[2] = {-1, -1};
void trace_disable_color(char *argv, int offset)
{
is_a_tty[0] = 0;
is_a_tty[1] = 0;
}
void trace_enable_color(char *argv, int offset)
{
is_a_tty[0] = -1;
is_a_tty[1] = -1;
}
void trace_force_color(char *argv, int offset)
{
is_a_tty[0] = 1;
is_a_tty[1] = 1;
}
int posix_trace_over_tty(int file_number)
{
return is_a_tty[file_number];
}
static void decide_about_color(void)
{
if (is_a_tty[0] == -1) {
is_a_tty[0] = isatty(STDOUT_FILENO);
}
if (is_a_tty[1] == -1) {
is_a_tty[1] = isatty(STDERR_FILENO);
}
}
NATIVE_TASK(decide_about_color, PRE_BOOT_2, 0);
void native_add_tracing_options(void)
{
static struct args_struct_t trace_options[] = {
/*
* Fields:
* manual, mandatory, switch,
* option_name, var_name ,type,
* destination, callback,
* description
*/
{ false, false, true,
"color", "color", 'b',
NULL, trace_enable_color,
"(default) Enable color in traces if printing to console"},
{ false, false, true,
"no-color", "no-color", 'b',
NULL, trace_disable_color,
"Disable color in traces even if printing to console"},
{ false, false, true,
"force-color", "force-color", 'b',
NULL, trace_force_color,
"Enable color in traces even if printing to files/pipes"},
ARG_TABLE_ENDMARKER};
native_add_command_line_opts(trace_options);
}
``` | /content/code_sandbox/boards/native/native_posix/tracing.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 749 |
```unknown
CONFIG_CONSOLE=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=1000000
``` | /content/code_sandbox/boards/native/native_posix/native_posix_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 20 |
```objective-c
/*
*
*/
/**
* @file
* @brief API to the native_posix (Real) Time Clock
*/
#ifndef _NATIVE_POSIX_RTC_H
#define _NATIVE_POSIX_RTC_H
#include "hw_models_top.h"
#include <stdbool.h>
#include <zephyr/types.h>
#ifdef __cplusplus
extern "C" {
#endif
/*
* Types of clocks this RTC provides:
*/
/** Time since boot, cannot be offset. Microsecond resolution */
#define RTC_CLOCK_BOOT 0
/** Persistent clock, can be offset. Microsecond resolution */
#define RTC_CLOCK_REALTIME 1
/**
* Pseudo-host real time clock (Please see documentation).
* Nanosecond resolution
*/
#define RTC_CLOCK_PSEUDOHOSTREALTIME 2
/**
* @brief Get the value of a clock in microseconds
*
* @param clock_type Which clock to measure from
*
* @return Number of microseconds
*/
uint64_t native_rtc_gettime_us(int clock_type);
/**
* @brief Get the value of a clock split in nsec and seconds
*
* @param clock_type Which clock to measure from
* @param nsec Pointer to store the nanoseconds
* @param nsec Pointer to store the seconds
*/
void native_rtc_gettime(int clock_type, uint32_t *nsec, uint64_t *sec);
/**
* @brief Offset the real time clock by a number of microseconds.
* Note that this only affects the RTC_CLOCK_REALTIME and
* RTC_CLOCK_PSEUDOHOSTREALTIME clocks.
*
* @param delta_us Number of microseconds to offset. The value is added to all
* offsetable clocks.
*/
void native_rtc_offset(int64_t delta_us);
/**
* @brief Adjust the speed of the clock source by a multiplicative factor
*
* @param clock_correction Factor by which to correct the clock speed
*/
void native_rtc_adjust_clock(double clock_correction);
#ifdef __cplusplus
}
#endif
#endif /* _NATIVE_POSIX_RTC_H */
``` | /content/code_sandbox/boards/native/native_posix/native_rtc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 414 |
```unknown
/*
*
*/
#include "../native_sim/native_sim.dts"
``` | /content/code_sandbox/boards/native/native_posix/native_posix.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 13 |
```restructuredtext
.. _native_sim:
Native simulator - native_sim
#############################
.. contents::
:depth: 1
:backlinks: entry
:local:
Overview
********
The ``native_sim`` board is a :ref:`POSIX architecture<Posix arch>` based board.
With it, a Zephyr application can be compiled together with
the Zephyr kernel, and libraries, creating a normal Linux executable.
``native_sim`` is based on the
`native simulator <path_to_url`_
and the :ref:`POSIX architecture<Posix arch>`.
This board does not intend to simulate any particular HW, but it provides
a few peripherals such as an Ethernet driver, display, UART, etc., to enable
developing and testing application code which would require them.
See `Peripherals`_ for more information.
.. note::
| ``native_sim`` is an evolution of the older :ref:`native_posix<native_posix>`.
| Some components, code, options names, and documentation will still use the old native_posix
names. But all components which worked with native_posix will work with native_sim.
Host system dependencies
************************
Please check the
:ref:`Posix Arch Dependencies<posix_arch_deps>`
.. _nativesim_important_limitations:
Important limitations and unsupported features
**********************************************
``native_sim`` is based on the :ref:`POSIX architecture<Posix arch>`, and therefore
:ref:`its limitations <posix_arch_limitations>` and considerations apply to it.
Similarly, it inherits the POSIX architecture
:ref:`unsupported features set <posix_arch_unsupported>`.
Note that some drivers may have limitations, or may not support their whole driver API optional
functionality.
.. _native_sim_how_to_use:
How to use it
*************
Compiling
=========
To build, simply specify the ``native_sim`` board as target:
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:host-os: unix
:board: native_sim
:goals: build
:compact:
Running
=======
The result of the compilation is an executable (``zephyr.exe``) placed in the
``zephyr/`` subdirectory of the ``build`` folder.
Run the ``zephyr.exe`` executable as you would any other Linux console application.
.. code-block:: console
$ ./build/zephyr/zephyr.exe
# Press Ctrl+C to exit
This executable accepts several command line options depending on the
compilation configuration.
You can run it with the ``--help`` command line switch to get a list of
available options.
.. code-block:: console
$ ./build/zephyr/zephyr.exe --help
Note that the Zephyr kernel does not actually exit once the application is
finished. It simply goes into the idle loop forever.
Therefore you must stop the application manually (Ctrl+C in Linux).
Application tests using the :ref:`ztest framework<test-framework>` will exit after all
tests have completed.
If you want your application to gracefully finish when it reaches some point,
you may add a conditionally compiled (:kconfig:option:`CONFIG_ARCH_POSIX`) call to
``nsi_exit(int status)`` at that point.
.. _native_sim_debug:
Debugging
=========
Since the Zephyr executable is a native application, it can be debugged and
instrumented as any other native program. The program is compiled with debug
information, so it can be run directly in, for example, ``gdb`` or instrumented
with ``valgrind``.
Because the execution of your Zephyr application is normally deterministic
(there are no asynchronous or random components), you can execute the
code multiple times and get the exact same result. Instrumenting the
code does not affect its execution.
To ease debugging you may want to compile your code without optimizations
(e.g., ``-O0``) by setting :kconfig:option:`CONFIG_NO_OPTIMIZATIONS`.
For ease of debugging consider using an IDE as GUI for your debugger.
.. _native_sim_asan:
Address Sanitizer (ASan)
========================
You can also build Zephyr with the `Address Sanitizer`_. To do this, set
:kconfig:option:`CONFIG_ASAN`, for example, in the application project file, or in the
``west build`` or ``cmake`` command line invocation.
Note that you will need the ASan library installed in your system.
In Debian/Ubuntu this is ``libasan1``.
.. _Address Sanitizer:
path_to_url
Undefined Behavior Sanitizer (UBSan)
====================================
You can also build Zephyr with the `Undefined Behavior Sanitizer`_. To do this, set
:kconfig:option:`CONFIG_UBSAN`, for example, in the application project file, or in the
``west build`` or ``cmake`` command line invocation.
.. _Undefined Behavior Sanitizer:
path_to_url
Coverage reports
================
See
:ref:`coverage reports using the POSIX architecture<coverage_posix>`.
.. _native_sim32_64:
32 and 64bit versions
=====================
native_sim comes with two targets: A 32 bit and 64 bit version.
The 32 bit version, ``native_sim``, is the default target, which will compile
your code for the ILP32 ABI (i386 in a x86 or x86_64 system) where pointers
and longs are 32 bits.
This mimics the ABI of most embedded systems Zephyr targets,
and is therefore normally best to test and debug your code, as some bugs are
dependent on the size of pointers and longs.
This target requires either a 64 bit system with multilib support installed or
one with a 32bit userspace.
The 64 bit version, ``native_sim/native/64``, compiles your code targeting the
LP64 ABI (x86-64 in x86 systems), where pointers and longs are 64 bits.
You can use this target if you cannot compile or run 32 bit binaries.
.. _native_sim_Clib_choice:
C library choice
****************
native_sim may be compiled with a choice of C libraries.
By default it will be compiled with the host C library (:kconfig:option:`CONFIG_EXTERNAL_LIBC`),
but you can also select to build it with :kconfig:option:`CONFIG_MINIMAL_LIBC` or with
:kconfig:option:`CONFIG_PICOLIBC`.
If you select some feature which are not compatible with the host C library,
:ref:`Picolibc <c_library_picolibc>` will be selected by default instead.
When building with either :ref:`minimal <c_library_minimal>` or :ref:`Picolibc<c_library_picolibc>`
you will build your code in a more similar way as when building for the embedded target,
you will be able to test your code interacting with that C library,
and there will be no conflicts with the :ref:`POSIX OS abstraction<posix_support>` shim,
but, accessing the host for test purposes from your embedded code will be more
difficult, and you will have a limited choice of
:ref:`drivers and backends to chose from<native_sim_peripherals_c_compat>`.
Rationale for this port and comparison with other options
*********************************************************
The native_sim board shares the overall
:ref:`intent of the POSIX architecture<posix_arch_rationale>`,
while being a HW agnostic test platform which in some cases utilizes the host
OS peripherals.
It does not intend to model any particular HW, and as such can only be used
to develop and test application code which is far decoupled from the HW.
For developing and testing SW which requires specific HW, while retaining the
benefits of the POSIX architecture other solutions like the
:ref:`bsim boards<bsim boards>`
should be considered.
Check the :ref:`POSIX architecture comparison <posix_arch_compare>`
with other development and test options for more insights.
.. _native_sim_architecture:
Architecture
************
This board is based on the POSIX architecture port of Zephyr and shares
:ref:`its basic architecture<posix_arch_architecture>` regarding threading
and CPU/HW scheduling.
If you are interested on the inner workings of the native simulator itself, you can check
`its documentation <path_to_url`_.
This board does not try to emulate any particular embedded CPU or SOC.
The code is compiled natively for the host system (typically x86).
About time in native_sim
========================
Normally simulated time runs fully decoupled from the real host time
and as fast as the host compute power would allow.
This is desirable when running in a debugger or testing in batch, but not if
interacting with external interfaces based on the real host time.
The Zephyr kernel is only aware of the simulated time as provided by the
HW models. Therefore any normal Zephyr thread will also know only about
simulated time.
The only link between the simulated time and the real/host time, if any,
is created by the clock and timer model.
This model can be configured to slow down the execution of native_sim to
real time.
You can do this with the ``--rt`` and ``--no-rt`` options from the command line.
The default behavior is set with
:kconfig:option:`CONFIG_NATIVE_SIM_SLOWDOWN_TO_REAL_TIME`.
Note that all this model does is wait before raising the
next system tick interrupt until the corresponding real/host time.
If, for some reason, native_sim runs slower than real time, all this
model can do is "catch up" as soon as possible by not delaying the
following ticks.
So if the host load is too high, or you are running in a debugger, you will
see simulated time lagging behind the real host time.
This solution ensures that normal runs are still deterministic while
providing an illusion of real timeness to the observer.
When locked to real time, simulated time can also be set to run faster or
slower than real time.
This can be controlled with the ``--rt-ratio=<ratio>`` and ``-rt-drift=<drift>``
command line options. Note that both of these options control the same
underlying mechanism, and that ``drift`` is by definition equal to
``ratio - 1``.
It is also possible to adjust this clock speed on the fly with
:c:func:`native_rtc_adjust_clock()`.
In this way if, for example, ``--rt-ratio=2`` is given, the simulated time
will advance at twice the real time speed.
Similarly if ``--rt-drift=-100e-6`` is given, the simulated time will progress
100ppm slower than real time.
Note that these 2 options have no meaning when running in non real-time
mode.
How simulated time and real time relate to each other
-----------------------------------------------------
Simulated time (``st``) can be calculated from real time (``rt``) as
.. math::
st = (rt - last\_rt) \times ratio + last\_st
And vice-versa:
.. math::
rt = (st - last\_st) / ratio + last\_rt
Where ``last_rt`` and ``last_st`` are respectively the real time and the
simulated time when the last clock ratio adjustment took place.
All times are kept in microseconds.
.. _native_sim_peripherals:
Peripherals
***********
The following peripherals are currently provided with this board:
**Interrupt controller**
A simple yet generic interrupt controller is provided. It can nest interrupts
and provides interrupt priorities. Interrupts can be individually masked or
unmasked. SW interrupts are also supported.
**Clock, timer and system tick model**
This model provides the system tick timer. By default
:kconfig:option:`CONFIG_SYS_CLOCK_TICKS_PER_SEC` configures it to tick every 10ms.
Please refer to the section `About time in native_sim`_ for more
information.
**UART/Serial**
Two optional native UART drivers are available:
**PTTY driver (UART_NATIVE_POSIX)**
With this driver, one or two Zephyr UART devices can be created. These
can be connected to the Linux process stdin/stdout or a newly created
pseudo-tty. For more information refer to the section `PTTY UART`_.
**TTY driver (UART_NATIVE_TTY)**
An UART driver for interacting with host-attached serial port devices
(eg. USB to UART dongles). For more information refer to the section
`TTY UART`_.
**Real time clock**
The real time clock model provides a model of a constantly powered clock.
By default this is initialized to the host time at boot.
This RTC can also be set to start from time 0 with the ``--rtc-reset`` command
line option.
It is possible to offset the RTC clock value at boot with the
``--rtc-offset=<offset>`` option,
or to adjust it dynamically with the function :c:func:`native_rtc_offset`.
After start, this RTC advances with the simulated time, and is therefore
affected by the simulated time speed ratio.
See `About time in native_sim`_ for more information.
The time can be queried with the functions :c:func:`native_rtc_gettime_us`
and :c:func:`native_rtc_gettime`. Both accept as parameter the clock source:
- ``RTC_CLOCK_BOOT``: It counts the simulated time passed since boot.
It is not subject to offset adjustments
- ``RTC_CLOCK_REALTIME``: RTC persistent time. It is affected by
offset adjustments.
- ``RTC_CLOCK_PSEUDOHOSTREALTIME``: A version of the real host time,
as if the host was also affected by the clock speed ratio and offset
adjustments performed to the simulated clock and this RTC. Normally
this value will be a couple of hundredths of microseconds ahead of the
simulated time, depending on the host execution speed.
This clock source should be used with care, as depending on the actual
execution speed of native_sim and the host load,
it may return a value considerably ahead of the simulated time.
Note this device does not yet have an :ref:`RTC API compatible driver <rtc_api>`.
.. _nsim_per_entr:
**Entropy device**
An entropy device based on the host :c:func:`random` API.
This device will generate the same sequence of random numbers if initialized
with the same random seed.
You can change this random seed value by using the command line option:
:samp:`--seed={<random_seed>}` where the value specified is a 32-bit integer
such as 97229 (decimal), 0x17BCD (hex), or 0275715 (octal).
.. _nsim_per_ethe:
**Ethernet driver**
A simple TAP based ethernet driver is provided. The driver expects that the
**zeth** network interface already exists in the host system. The **zeth**
network interface can be created by the ``net-setup.sh`` script found in
the `net-tools`_ zephyr project repository. User can communicate with the
Zephyr instance via the **zeth** network interface. Multiple TAP based
network interfaces can be created if needed. The IP address configuration
can be specified for each network interface instance.
Note that this device can only be used with Linux hosts.
.. _net-tools:
path_to_url
.. _nsim_per_offloaded_sockets:
**Offloaded sockets driver**
This driver is an alternative to the :ref:`TAP based ethernet driver
<nsim_per_ethe>`. Instead of using a virtual network in the Linux side, this
driver utilizes Linux's standard BSD socket API. With this, multiple Zephyr
applications can communicate over the Linux loopback interface.
The benefit of this approach is that root privileges are not required and
that the process is connected to the same interface as other Linux processes
instead of a virtual network, facilitating testing without the need for extra
setup in the host. The drawback is that the L2 layer of Zephyr's networking
stack is not exercised.
.. _nsim_bt_host_cont:
**Bluetooth controller**
It's possible to use the host's Bluetooth adapter as a Bluetooth
controller for Zephyr. To do this the HCI device needs to be passed as
a command line option to ``zephyr.exe``. For example, to use ``hci0``,
use ``sudo zephyr.exe --bt-dev=hci0``. Using the device requires root
privileges (or the CAP_NET_ADMIN POSIX capability, to be exact) so
``zephyr.exe`` needs to be run through ``sudo``. The chosen HCI device
must be powered down and support Bluetooth Low Energy (i.e. support the
Bluetooth specification version 4.0 or greater).
Another possibility is to use a HCI TCP server which acts as a
:ref:`virtual Bluetooth controller<bluetooth_virtual_posix>` over TCP.
To connect to a HCI TCP server its IP address and port number must
be specified. For example, to connect to a HCI TCP server with IP
address 127.0.0.0 and port number 1020 use ``zephyr.exe --bt-dev=127.0.0.1:1020``.
This alternative option is mainly aimed for testing Bluetooth connectivity over
a virtual Bluetooth controller that does not depend on the Linux Bluetooth
stack and its HCI interface.
.. _nsim_per_usb:
**USB controller**
It's possible to use the Virtual USB controller working over USB/IP
protocol. More information can be found in
:ref:`Testing USB over USP/IP in native_sim <testing_USB_native_sim>`.
.. _nsim_per_disp_sdl:
**Display driver**
A display driver is provided that creates a window on the host machine to
render display content.
This driver requires a 32-bit version of the `SDL2`_ library on the host
machine and ``pkg-config`` settings to correctly pickup the SDL2 install path
and compiler flags.
On a Ubuntu 22.04 host system, for example, install the ``pkg-config`` and
``libsdl2-dev:i386`` packages, and configure the pkg-config search path with
these commands:
.. code-block:: console
$ sudo dpkg --add-architecture i386
$ sudo apt update
$ sudo apt-get install pkg-config libsdl2-dev:i386
$ export PKG_CONFIG_PATH=/usr/lib/i386-linux-gnu/pkgconfig
.. _SDL2:
path_to_url
.. _nsim_per_flash_simu:
**EEPROM simulator**
The EEPROM simulator can also be used in the native targets. In these, you have the added feature
of keeping the EEPROM content on a file on the host filesystem.
By default this is kept in the file :file:`eeprom.bin` in the current working directory, but you
can select the location of this file and its name with the command line parameter ``--eeprom``.
Some more information can be found in :ref:`the emulators page <emul_eeprom_simu_brief>`.
**Flash simulator**
The flash simulator can also be used in the native targets. In this you have the option to keep
the flash content in a binary file on the host file system or in RAM. The behavior of the flash
device can be configured through the native_sim board devicetree or Kconfig settings under
:kconfig:option:`CONFIG_FLASH_SIMULATOR`.
By default the binary data is located in the file :file:`flash.bin` in the current
working directory. The location of this file can be changed through the
command line parameter ``--flash``. The flash data will be stored in raw format
and the file will be truncated to match the size specified in the devicetree
configuration. In case the file does not exists the driver will take care of
creating the file, else the existing file is used.
Some more information can be found in :ref:`the emulators page <emul_flash_simu_brief>`.
The flash content can be accessed from the host system, as explained in the
`Host based flash access`_ section.
**Input events**
Two optional native input drivers are available:
**evdev driver**
A driver is provided to read input events from a Linux evdev input device and
inject them back into the Zephyr input subsystem.
The driver is automatically enabled when :kconfig:option:`CONFIG_INPUT` is
enabled and the devicetree contains a node such as:
.. code-block:: dts
evdev {
compatible = "zephyr,native-linux-evdev";
};
The application then has to be run with a command line option to specify
which evdev device node has to be used, for example
``zephyr.exe --evdev=/dev/input/event0``.
**Input SDL touch**
This driver emulates a touch panel input using the SDL library. It can be enabled with
:kconfig:option:`CONFIG_INPUT_SDL_TOUCH` and configured with the device tree binding
:dtcompatible:`zephyr,input-sdl-touch`.
More information on using SDL and the Display driver can be found in
:ref:`its section <nsim_per_disp_sdl>`.
**CAN controller**
It is possible to use a host CAN controller with the native SocketCAN Linux driver. It can be
enabled with :kconfig:option:`CONFIG_CAN_NATIVE_LINUX` and configured with the device tree binding
:dtcompatible:`zephyr,native-linux-can`.
It is possible to specify which CAN interface will be used by the app using the ``--can-if``
command-line option. This option overrides **every** Linux SocketCAN driver instance to use the specified
interface.
.. _native_ptty_uart:
PTTY UART
=========
This driver can be configured with :kconfig:option:`CONFIG_UART_NATIVE_POSIX`
to instantiate up to two UARTs. By default only one UART is enabled.
With :kconfig:option:`CONFIG_UART_NATIVE_POSIX_PORT_1_ENABLE`
you can enable the second one.
For the first UART, it can link it to a new
pseudoterminal (i.e. :file:`/dev/pts{<nbr>}`), or map the UART input and
output to the executable's ``stdin`` and ``stdout``.
This is chosen by selecting either
:kconfig:option:`CONFIG_NATIVE_UART_0_ON_OWN_PTY` or
:kconfig:option:`CONFIG_NATIVE_UART_0_ON_STDINOUT`
For interactive use with the :ref:`shell_api`, choose the first (OWN_PTY) option.
The second (STDINOUT) option can be used with the shell for automated
testing, such as when piping other processes' output to control it.
This is because the shell subsystem expects access to a raw terminal,
which (by default) a normal Linux terminal is not.
When :kconfig:option:`CONFIG_NATIVE_UART_0_ON_OWN_PTY` is chosen, the name of the
newly created UART pseudo-terminal will be displayed in the console.
If you want to interact with it manually, you should attach a terminal emulator
to it. This can be done, for example with the command:
.. code-block:: console
$ xterm -e screen /dev/<ttyn> &
where :file:`/dev/tty{<n>}` should be replaced with the actual TTY device.
You may also chose to automatically attach a terminal emulator to the first UART
by passing the command line option ``-attach_uart`` to the executable.
The command used for attaching to the new shell can be set with the command line
option ``-attach_uart_cmd=<"cmd">``. Where the default command is given by
:kconfig:option:`CONFIG_NATIVE_UART_AUTOATTACH_DEFAULT_CMD`.
Note that the default command assumes both ``xterm`` and ``screen`` are
installed in the system.
This driver only supports poll mode. Interrupt and async mode are not supported.
Neither runtime configuration or line control are supported.
.. _native_tty_uart:
TTY UART
========
With this driver an application can use the polling UART API (``uart_poll_out``,
``uart_poll_in``) to write and read characters to and from a connected serial
port device.
This driver is automatically enabled when a devicetree contains a node
with ``"zephyr,native-tty-uart"`` compatible property and ``okay`` status, such
as one below.
.. code-block:: dts
uart {
status = "okay";
compatible = "zephyr,native-tty-uart";
serial-port = "/dev/ttyUSB0";
current-speed = <115200>;
};
Interaction with serial ports can be configured in several different ways:
* The default serial port and baud rate can be set via the device tree
properties ``serial-port`` and ``current-speed`` respectively. The
``serial-port`` property is optional.
* Serial port and baud rate can also be set via command line options ``X_port``
and ``X_baud`` respectively, where ``X`` is a name of a node. Command line
options override values from the devicetree.
* The rest of the configuration options such as number of data and stop bits,
parity, as well as baud rate can be set at runtime with ``uart_configure``.
* This driver can emulate an interrupt-driven UART by enabling
:kconfig:option:`CONFIG_UART_INTERRUPT_DRIVEN`.
Multiple instances of such uart drivers are supported.
The :zephyr:code-sample:`uart-native-tty` sample app provides a working example of the
driver.
This driver only supports poll mode and interrupt mode. Async mode is not
supported.
It has runtime configuration support, but no line control support.
.. _native_sim_backends:
Subsystems backends
*******************
Apart from its own peripherals, the native_sim board also has some dedicated
backends for some of Zephyr's subsystems. These backends are designed to ease
development by integrating more seamlessly with the host operating system:
.. _nsim_back_console:
**Console backend**:
A console backend which by default is configured to
redirect any :c:func:`printk` write to the native host application's
``stdout``.
This driver is selected by default if the `PTTY UART`_ is not compiled in.
Otherwise :kconfig:option:`CONFIG_UART_CONSOLE` will be set to select the UART as
console backend.
.. _nsim_back_logger:
**Logger backend**:
A backend which prints all logger output to the process ``stdout``.
It supports timestamping, which can be enabled with
:kconfig:option:`CONFIG_LOG_BACKEND_FORMAT_TIMESTAMP`; and colored output which can
be enabled with :kconfig:option:`CONFIG_LOG_BACKEND_SHOW_COLOR` and controlled
with the command line options ``--color``, ``--no-color`` and
``--force-color``.
In native_sim, by default, the logger is configured with
:kconfig:option:`CONFIG_LOG_MODE_IMMEDIATE`.
This backend can be selected with :kconfig:option:`CONFIG_LOG_BACKEND_NATIVE_POSIX`
and is enabled by default.
.. _nsim_back_trace:
**Tracing**:
A backend/"bottom" for Zephyr's CTF tracing subsystem which writes the tracing
data to a file in the host filesystem.
More information can be found in :ref:`Common Tracing Format <ctf>`
Emulators
*********
All :ref:`available HW emulators <emulators>` can be used with native_sim.
.. _native_fuse_flash:
Host based flash access
***********************
If a flash device is present, the file system partitions on the flash
device can be exposed through the host file system by enabling
:kconfig:option:`CONFIG_FUSE_FS_ACCESS`. This option enables a FUSE
(File system in User space) layer that maps the Zephyr file system calls to
the required UNIX file system calls, and provides access to the flash file
system partitions with normal operating system commands such as ``cd``,
``ls`` and ``mkdir``.
By default the partitions are exposed through the directory :file:`flash/` in the
current working directory. This directory can be changed via the command line
option ``--flash-mount``. As this directory operates as a mount point for FUSE
you have to ensure that it exists before starting the native_sim board.
On exit, the native_sim board application will take care of unmounting the
directory. In the unfortunate case that the native_sim board application
crashes, you can cleanup the stale mount point by using the program
``fusermount``:
.. code-block:: console
$ fusermount -u flash
Note that this feature requires a 32-bit version of the FUSE library, with a
minimal version of 2.6, on the host system and ``pkg-config`` settings to
correctly pickup the FUSE install path and compiler flags.
On a Ubuntu 22.04 host system, for example, install the ``pkg-config`` and
``libfuse-dev:i386`` packages, and configure the pkg-config search path with
these commands:
.. code-block:: console
$ sudo dpkg --add-architecture i386
$ sudo apt update
$ sudo apt-get install pkg-config libfuse-dev:i386
$ export PKG_CONFIG_PATH=/usr/lib/i386-linux-gnu/pkgconfig
.. _native_sim_peripherals_c_compat:
Peripherals and backends C library compatibility
************************************************
Today, some native_sim peripherals and backends are, so far, only available when compiling with the
host libC (:kconfig:option:`CONFIG_EXTERNAL_LIBC`):
.. csv-table:: Drivers/backends vs libC choice
:header: Driver class, driver name, driver kconfig, libC choices
ADC, ADC emul, :kconfig:option:`CONFIG_ADC_EMUL`, All
Bluetooth, :ref:`Userchan <nsim_bt_host_cont>`, :kconfig:option:`CONFIG_BT_USERCHAN`, Host libC
CAN, CAN native Linux, :kconfig:option:`CONFIG_CAN_NATIVE_LINUX`, All
Console backend, :ref:`POSIX arch console <nsim_back_console>`, :kconfig:option:`CONFIG_POSIX_ARCH_CONSOLE`, All
Display, :ref:`Display SDL <nsim_per_disp_sdl>`, :kconfig:option:`CONFIG_SDL_DISPLAY`, All
Entropy, :ref:`Native posix entropy <nsim_per_entr>`, :kconfig:option:`CONFIG_FAKE_ENTROPY_NATIVE_POSIX`, All
EEPROM, EEPROM simulator, :kconfig:option:`CONFIG_EEPROM_SIMULATOR`, Host libC
EEPROM, EEPROM emulator, :kconfig:option:`CONFIG_EEPROM_EMULATOR`, All
Ethernet, :ref:`Eth native_posix <nsim_per_ethe>`, :kconfig:option:`CONFIG_ETH_NATIVE_POSIX`, All
Flash, :ref:`Flash simulator <nsim_per_flash_simu>`, :kconfig:option:`CONFIG_FLASH_SIMULATOR`, All
Flash, :ref:`Host based flash access <native_fuse_flash>`, :kconfig:option:`CONFIG_FUSE_FS_ACCESS`, Host libC
GPIO, GPIO emulator, :kconfig:option:`CONFIG_GPIO_EMUL`, All
GPIO, SDL GPIO emulator, :kconfig:option:`CONFIG_GPIO_EMUL_SDL`, All
I2C, I2C emulator, :kconfig:option:`CONFIG_I2C_EMUL`, All
Input, Input SDL touch, :kconfig:option:`CONFIG_INPUT_SDL_TOUCH`, All
Input, Linux evdev, :kconfig:option:`CONFIG_NATIVE_LINUX_EVDEV`, All
Logger backend, :ref:`Native backend <nsim_back_logger>`, :kconfig:option:`CONFIG_LOG_BACKEND_NATIVE_POSIX`, All
Offloaded sockets, :ref:`nsim_per_offloaded_sockets`, :kconfig:option:`CONFIG_NET_NATIVE_OFFLOADED_SOCKETS`, All
RTC, RTC emul, :kconfig:option:`CONFIG_RTC_EMUL`, All
Serial, :ref:`UART native posix/PTTY <native_ptty_uart>`, :kconfig:option:`CONFIG_UART_NATIVE_POSIX`, All
Serial, :ref:`UART native TTY <native_tty_uart>`, :kconfig:option:`CONFIG_UART_NATIVE_TTY`, All
SPI, SPI emul, :kconfig:option:`CONFIG_SPI_EMUL`, All
System tick, Native_posix timer, :kconfig:option:`CONFIG_NATIVE_POSIX_TIMER`, All
Tracing, :ref:`Posix tracing backend <nsim_back_trace>`, :kconfig:option:`CONFIG_TRACING_BACKEND_POSIX`, All
USB, :ref:`USB native posix <nsim_per_usb>`, :kconfig:option:`CONFIG_USB_NATIVE_POSIX`, Host libC
``` | /content/code_sandbox/boards/native/native_sim/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 7,104 |
```c
/*
*
*/
#include <string.h>
#include <strings.h>
#include <stdbool.h>
#include <stdlib.h>
#include <stdio.h>
#include <math.h>
#include <zephyr/arch/posix/posix_trace.h>
#include "posix_board_if.h"
#include <zephyr/types.h>
#include "cmdline_common.h"
/**
* Check if <arg> is the option <option>
* The accepted syntax is:
* * For options without a value following:
* [-[-]]<option>
* * For options with value:
* [-[-]]<option>{:|=}<value>
*
* Returns 0 if it is not, or a number > 0 if it is.
* The returned number is the number of characters it went through
* to find the end of the option including the ':' or '=' character in case of
* options with value
*/
int cmd_is_option(const char *arg, const char *option, int with_value)
{
int of = 0;
size_t to_match_len = strlen(option);
if (arg[of] == '-') {
of++;
}
if (arg[of] == '-') {
of++;
}
if (!with_value) {
if (strcmp(&arg[of], option) != 0) {
return 0;
} else {
return of + to_match_len;
}
}
while (!(arg[of] == 0 && *option == 0)) {
if (*option == 0) {
if ((arg[of] == ':') || (arg[of] == '=')) {
of++;
break;
}
return 0;
}
if (arg[of] != *option) {
return 0;
}
of++;
option++;
}
if (arg[of] == 0) { /* we need a value to follow */
posix_print_error_and_exit("Incorrect option syntax '%s'. The "
"value should follow the options. "
"For example --ratio=3\n",
arg);
}
return of;
}
/**
* Return 1 if <arg> matches an accepted help option.
* 0 otherwise
*
* Valid help options are [-[-]]{?|h|help}
* with the h or help in any case combination
*/
int cmd_is_help_option(const char *arg)
{
if (arg[0] == '-') {
arg++;
}
if (arg[0] == '-') {
arg++;
}
if ((strcasecmp(arg, "?") == 0) ||
(strcasecmp(arg, "h") == 0) ||
(strcasecmp(arg, "help") == 0)) {
return 1;
} else {
return 0;
}
}
#define CMD_TYPE_ERROR "Coding error: type %c not understood"
#define CMD_ERR_BOOL_SWI "Programming error: I only know how to "\
"automatically read boolean switches\n"
/**
* Read out a the value following an option from str, and store it into
* <dest>
* <type> indicates the type of parameter (and type of dest pointer)
* 'b' : boolean
* 's' : string (char *)
* 'u' : 32 bit unsigned integer
* 'U' : 64 bit unsigned integer
* 'i' : 32 bit signed integer
* 'I' : 64 bit signed integer
* 'd' : *double* float
*
* Note: list type ('l') cannot be handled by this function and must always be
* manual
*
* <long_d> is the long name of the option
*/
void cmd_read_option_value(const char *str, void *dest, const char type,
const char *option)
{
int error = 0;
char *endptr = NULL;
switch (type) {
case 'b':
if (strcasecmp(str, "false") == 0) {
*(bool *)dest = false;
endptr = (char *)str + 5;
} else if (strcmp(str, "0") == 0) {
*(bool *)dest = false;
endptr = (char *)str + 1;
} else if (strcasecmp(str, "true") == 0) {
*(bool *)dest = true;
endptr = (char *)str + 4;
} else if (strcmp(str, "1") == 0) {
*(bool *)dest = true;
endptr = (char *)str + 1;
} else {
error = 1;
}
break;
case 's':
*(char **)dest = (char *)str;
endptr = (char *)str + strlen(str);
break;
case 'u':
*(uint32_t *)dest = strtoul(str, &endptr, 0);
break;
case 'U':
*(uint64_t *)dest = strtoull(str, &endptr, 0);
break;
case 'i':
*(int32_t *)dest = strtol(str, &endptr, 0);
break;
case 'I':
*(int64_t *)dest = strtoll(str, &endptr, 0);
break;
case 'd':
*(double *)dest = strtod(str, &endptr);
break;
default:
posix_print_error_and_exit(CMD_TYPE_ERROR, type);
/* Unreachable */
break;
}
if (!error && endptr && *endptr != 0) {
error = 1;
}
if (error) {
posix_print_error_and_exit("Error reading value of %s '%s'. Use"
" --help for usage information\n",
option, str);
}
}
/**
* Initialize existing dest* to defaults based on type
*/
void cmd_args_set_defaults(struct args_struct_t args_struct[])
{
int count = 0;
while (args_struct[count].option != NULL) {
if (args_struct[count].dest == NULL) {
count++;
continue;
}
switch (args_struct[count].type) {
case 0: /* does not have storage */
break;
case 'b':
*(bool *)args_struct[count].dest = false;
break;
case 's':
*(char **)args_struct[count].dest = NULL;
break;
case 'u':
*(uint32_t *)args_struct[count].dest = UINT32_MAX;
break;
case 'U':
*(uint64_t *)args_struct[count].dest = UINT64_MAX;
break;
case 'i':
*(int32_t *)args_struct[count].dest = INT32_MAX;
break;
case 'I':
*(int64_t *)args_struct[count].dest = INT64_MAX;
break;
case 'd':
*(double *)args_struct[count].dest = (double)NAN;
break;
default:
posix_print_error_and_exit(CMD_TYPE_ERROR,
args_struct[count].type);
break;
}
count++;
}
}
/**
* For the help messages:
* Generate a string containing how the option described by <args_s_el>
* should be used
*
* The string is saved in <buf> which has been allocated <size> bytes by the
* caller
*/
static void cmd_gen_switch_syntax(char *buf, int size,
struct args_struct_t *args_s_el)
{
int ret = 0;
if (size <= 0) {
return;
}
if (args_s_el->is_mandatory == false) {
*buf++ = '[';
size--;
}
if (args_s_el->is_switch == true) {
ret = snprintf(buf, size, "-%s", args_s_el->option);
} else {
if (args_s_el->type != 'l') {
ret = snprintf(buf, size, "-%s=<%s>",
args_s_el->option, args_s_el->name);
} else {
ret = snprintf(buf, size, "-%s <%s>...",
args_s_el->option, args_s_el->name);
}
}
if (ret < 0) {
posix_print_error_and_exit("Unexpected error in %s %i\n",
__FILE__, __LINE__);
}
if (size - ret < 0) {
/*
* If we run out of space we can just stop,
* this is not critical
*/
return;
}
buf += ret;
size -= ret;
if (args_s_el->is_mandatory == false) {
snprintf(buf, size, "] ");
} else {
snprintf(buf, size, " ");
}
}
/**
* Print short list of available switches
*/
void cmd_print_switches_help(struct args_struct_t args_struct[])
{
int count = 0;
int printed_in_line = strlen(_HELP_SWITCH) + 1;
fprintf(stdout, "%s ", _HELP_SWITCH);
while (args_struct[count].option != NULL) {
char stringy[_MAX_STRINGY_LEN];
cmd_gen_switch_syntax(stringy, _MAX_STRINGY_LEN,
&args_struct[count]);
if (printed_in_line + strlen(stringy) > _MAX_LINE_WIDTH) {
fprintf(stdout, "\n");
printed_in_line = 0;
}
fprintf(stdout, "%s", stringy);
printed_in_line += strlen(stringy);
count++;
}
fprintf(stdout, "\n");
}
/**
* Print the long help message of the program
*/
void cmd_print_long_help(struct args_struct_t args_struct[])
{
int ret;
int count = 0;
int printed_in_line = 0;
char stringy[_MAX_STRINGY_LEN];
cmd_print_switches_help(args_struct);
fprintf(stdout, "\n %-*s:%s\n", _LONG_HELP_ALIGN-1,
_HELP_SWITCH, _HELP_DESCR);
while (args_struct[count].option != NULL) {
int printed_right;
char *toprint;
int total_to_print;
cmd_gen_switch_syntax(stringy, _MAX_STRINGY_LEN,
&args_struct[count]);
ret = fprintf(stdout, " %-*s:", _LONG_HELP_ALIGN-1, stringy);
printed_in_line = ret;
printed_right = 0;
toprint = args_struct[count].descript;
total_to_print = strlen(toprint);
ret = fprintf(stdout, "%.*s\n",
_MAX_LINE_WIDTH - printed_in_line,
&toprint[printed_right]);
printed_right += ret - 1;
while (printed_right < total_to_print) {
fprintf(stdout, "%*s", _LONG_HELP_ALIGN, "");
ret = fprintf(stdout, "%.*s\n",
_MAX_LINE_WIDTH - _LONG_HELP_ALIGN,
&toprint[printed_right]);
printed_right += ret - 1;
}
count++;
}
fprintf(stdout, "\n");
fprintf(stdout, "Note that which options are available depends on the "
"enabled features/drivers\n\n");
}
/*
* <argv> matched the argument described in <arg_element>
*
* If arg_element->dest points to a place to store a possible value, read it
* If there is a callback registered, call it after
*/
static void cmd_handle_this_matched_arg(char *argv, int offset,
struct args_struct_t *arg_element)
{
if (arg_element->dest != NULL) {
if (arg_element->is_switch) {
if (arg_element->type == 'b') {
*(bool *)arg_element->dest = true;
} else {
posix_print_error_and_exit(CMD_ERR_BOOL_SWI);
}
} else { /* if not a switch we need to read its value */
cmd_read_option_value(&argv[offset],
arg_element->dest,
arg_element->type,
arg_element->option);
}
}
if (arg_element->call_when_found) {
arg_element->call_when_found(argv, offset);
}
}
/**
* Try to find if this argument is in the list (and it is not manual)
* if it does, try to parse it, set its dest accordingly, and return true
* if it is not found, return false
*/
bool cmd_parse_one_arg(char *argv, struct args_struct_t args_struct[])
{
int count = 0;
int ret;
if (cmd_is_help_option(argv)) {
cmd_print_long_help(args_struct);
posix_exit(0);
}
while (args_struct[count].option != NULL) {
if (args_struct[count].manual) {
count++;
continue;
}
ret = cmd_is_option(argv, args_struct[count].option,
!args_struct[count].is_switch);
if (ret) {
cmd_handle_this_matched_arg(argv,
ret,
&args_struct[count]);
return true;
}
count++;
}
return false;
}
``` | /content/code_sandbox/boards/native/native_posix/cmdline_common.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,782 |
```objective-c
/*
*
*/
#ifndef _NATIVE_POSIX_IRQ_HANDLER_H
#define _NATIVE_POSIX_IRQ_HANDLER_H
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
void posix_irq_handler_im_from_sw(void);
void posix_sw_set_pending_IRQ(unsigned int IRQn);
void posix_sw_clear_pending_IRQ(unsigned int IRQn);
#ifdef __cplusplus
}
#endif
#endif /* _NATIVE_POSIX_IRQ_HANDLER_H */
``` | /content/code_sandbox/boards/native/native_posix/irq_handler.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 89 |
```objective-c
/*
*
*/
#ifndef _CMDLINE_COMMON_H
#define _CMDLINE_COMMON_H
#include <stdbool.h>
#include <stddef.h>
#ifdef __cplusplus
extern "C" {
#endif
#define _MAX_LINE_WIDTH 100 /*Total width of the help message*/
/* Horizontal alignment of the 2nd column of the help message */
#define _LONG_HELP_ALIGN 30
#define _MAXOPT_SWITCH_LEN 32 /* Maximum allowed length for a switch name */
#define _MAXOPT_NAME_LEN 32 /* Maximum allowed length for a variable name */
#define _HELP_SWITCH "[-h] [--h] [--help] [-?]"
#define _HELP_DESCR "Display this help"
#define _MAX_STRINGY_LEN (_MAXOPT_SWITCH_LEN + _MAXOPT_NAME_LEN + 2 + 1 + 2 + 1)
/**
* Prototype for a callback function when an option is found:
* inputs:
* argv: Whole argv[i] option as received in main
* offset: Offset to the end of the option string
* (including a possible ':' or '=')
* If the option had a value, it would be placed in &argv[offset]
*/
typedef void (*option_found_callback_f)(char *argv, int offset);
/*
* Structure defining each command line option
*/
struct args_struct_t {
/*
* if manual is set cmd_args_parse*() will ignore it except for
* displaying it the help messages and initializing <dest> to its
* default
*/
bool manual;
/* For help messages, should it be wrapped in "[]" */
bool is_mandatory;
/* It is just a switch: it does not have something to store after */
bool is_switch;
/* Option name we search for: --<option> */
char *option;
/*
* Name of the option destination in the help messages:
* "--<option>=<name>"
*/
char *name;
/* Type of option (see cmd_read_option_value()) */
char type;
/* Pointer to where the read value will be stored (may be NULL) */
void *dest;
/* Optional callback to be called when the switch is found */
option_found_callback_f call_when_found;
/* Long description for the help messages */
char *descript;
};
#define ARG_TABLE_ENDMARKER \
{false, false, false, NULL, NULL, 0, NULL, NULL, NULL}
int cmd_is_option(const char *arg, const char *option, int with_value);
int cmd_is_help_option(const char *arg);
void cmd_read_option_value(const char *str, void *dest, const char type,
const char *option);
void cmd_args_set_defaults(struct args_struct_t args_struct[]);
bool cmd_parse_one_arg(char *argv, struct args_struct_t args_struct[]);
void cmd_print_switches_help(struct args_struct_t args_struct[]);
#ifdef __cplusplus
}
#endif
#endif /* _CMDLINE_COMMON_H */
``` | /content/code_sandbox/boards/native/native_posix/cmdline_common.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 612 |
```yaml
identifier: native_posix
name: Native 32-bit POSIX port
type: native
simulation: native
arch: posix
ram: 65536
flash: 65536
toolchain:
- host
- llvm
supported:
- can
- counter
- dma
- eeprom
- netif:eth
- usb_device
- adc
- i2c
- spi
- gpio
- rtc
vendor: zephyr
``` | /content/code_sandbox/boards/native/native_posix/native_posix.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 110 |
```c
/*
*
*/
#include <stdbool.h>
#include "timer_model.h"
#include <zephyr/arch/posix/posix_soc_if.h>
#include <posix_board_if.h>
#include <posix_soc.h>
/**
* Replacement to the kernel k_busy_wait()
* Will block this thread (and therefore the whole Zephyr) during usec_to_wait
*
* Note that interrupts may be received in the meanwhile and that therefore this
* thread may lose context.
* Therefore the wait time may be considerably longer.
*
* All this function ensures is that it will return after usec_to_wait or later.
*
* This special arch_busy_wait() is necessary due to how the POSIX arch/SOC INF
* models a CPU. Conceptually it could be thought as if the MCU was running
* at an infinitely high clock, and therefore no simulated time passes while
* executing instructions(*1).
* Therefore to be able to busy wait this function does the equivalent of
* programming a dedicated timer which will raise a non-maskable interrupt,
* and halting the CPU.
*
* (*1) In reality simulated time is simply not advanced just due to the "MCU"
* running. Meaning, the SW running on the MCU is assumed to take 0 time.
*/
void arch_busy_wait(uint32_t usec_to_wait)
{
uint64_t time_end = hwm_get_time() + usec_to_wait;
while (hwm_get_time() < time_end) {
/*
* There may be wakes due to other interrupts including
* other threads calling arch_busy_wait
*/
hwtimer_wake_in_time(time_end);
posix_halt_cpu();
}
}
/**
* Will block this thread (and therefore the whole Zephyr) during usec_to_waste
*
* Very similar to arch_busy_wait(), but if an interrupt or context switch
* occurs this function will continue waiting after, ensuring that
* usec_to_waste are spent in this context, irrespectively of how much more
* time would be spent on interrupt handling or possible switched-in tasks.
*
* Can be used to emulate code execution time.
*/
void posix_cpu_hold(uint32_t usec_to_waste)
{
uint64_t time_start;
int64_t to_wait = usec_to_waste;
while (to_wait > 0) {
/*
* There may be wakes due to other interrupts or nested calls to
* cpu_hold in interrupt handlers
*/
time_start = hwm_get_time();
hwtimer_wake_in_time(time_start + to_wait);
posix_change_cpu_state_and_wait(true);
to_wait -= hwm_get_time() - time_start;
posix_irq_handler();
}
}
``` | /content/code_sandbox/boards/native/native_posix/cpu_wait.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 569 |
```objective-c
/*
*
*/
#ifndef _NATIVE_POSIX_HW_MODELS_H
#define _NATIVE_POSIX_HW_MODELS_H
#include <zephyr/types.h>
#include <inttypes.h>
#ifdef __cplusplus
extern "C" {
#endif
#define NEVER UINT64_MAX
#define NSI_NEVER UINT64_MAX
void hwm_one_event(void);
void hwm_init(void);
void hwm_cleanup(void);
void hwm_set_end_of_time(uint64_t new_end_of_time);
uint64_t hwm_get_time(void);
void hwm_find_next_timer(void);
#ifdef __cplusplus
}
#endif
#endif /* _NATIVE_POSIX_HW_MODELS_H */
``` | /content/code_sandbox/boards/native/native_posix/hw_models_top.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 136 |
```objective-c
/*
*
*/
#ifndef _NATIVE_POSIX_CMDLINE_H
#define _NATIVE_POSIX_CMDLINE_H
#include "cmdline_common.h"
#ifdef __cplusplus
extern "C" {
#endif
void native_handle_cmd_line(int argc, char *argv[]);
void native_get_cmd_line_args(int *argc, char ***argv);
void native_get_test_cmd_line_args(int *argc, char ***argv);
void native_add_command_line_opts(struct args_struct_t *args);
void native_cleanup_cmd_line(void);
#ifdef __cplusplus
}
#endif
#endif /* _NATIVE_POSIX_CMDLINE_H */
``` | /content/code_sandbox/boards/native/native_posix/cmdline.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 121 |
```c
/*
*
*/
/*
* The basic principle of operation is:
* No asynchronous behavior, no indeterminism.
* If you run the same thing 20 times, you get exactly the same result 20
* times.
* It does not matter if you are running from console, or in a debugger
* and you go for lunch in the middle of the debug session.
*
* This is achieved as follows:
* The execution of native_posix is decoupled from the underlying host and its
* peripherals (unless set otherwise).
* In general, time in native_posix is simulated.
*
* But, native_posix can also be linked if desired to the underlying host,
* e.g.:You can use the provided Ethernet TAP driver, or a host BLE controller.
*
* In this case, the no-indeterminism principle is lost. Runs of native_posix
* will depend on the host load and the interactions with those real host
* peripherals.
*
*/
#include <stdio.h>
#include <soc.h>
#include "hw_models_top.h"
#include <stdlib.h>
#include <zephyr/sys/util.h>
#include <zephyr/sys/time_units.h>
#include "cmdline.h"
#include "irq_ctrl.h"
void posix_exit(int exit_code)
{
static int max_exit_code;
max_exit_code = MAX(exit_code, max_exit_code);
/*
* posix_soc_clean_up may not return if this is called from a SW thread,
* but instead it would get posix_exit() recalled again
* ASAP from the HW thread
*/
posix_soc_clean_up();
hwm_cleanup();
native_cleanup_cmd_line();
exit(max_exit_code);
}
/**
* Run all early native_posix initialization steps, including command
* line parsing and CPU start, until we are ready to let the HW models
* run via hwm_one_event()
*/
void posix_init(int argc, char *argv[])
{
/*
* Let's ensure that even if we are redirecting to a file, we get stdout
* and stderr line buffered (default for console)
* Note that glibc ignores size. But just in case we set a reasonable
* number in case somebody tries to compile against a different library
*/
setvbuf(stdout, NULL, _IOLBF, 512);
setvbuf(stderr, NULL, _IOLBF, 512);
run_native_tasks(_NATIVE_PRE_BOOT_1_LEVEL);
native_handle_cmd_line(argc, argv);
run_native_tasks(_NATIVE_PRE_BOOT_2_LEVEL);
hwm_init();
run_native_tasks(_NATIVE_PRE_BOOT_3_LEVEL);
posix_boot_cpu();
run_native_tasks(_NATIVE_FIRST_SLEEP_LEVEL);
}
/**
* Execute the simulator for at least the specified timeout, then
* return. Note that this does not affect event timing, so the "next
* event" may be significantly after the request if the hardware has
* not been configured to e.g. send an interrupt when expected.
*/
void posix_exec_for(uint64_t us)
{
uint64_t start = hwm_get_time();
do {
hwm_one_event();
} while (hwm_get_time() < (start + us));
}
#ifndef CONFIG_ARCH_POSIX_LIBFUZZER
/**
* This is the actual host process main routine. The Zephyr
* application's main() is renamed via preprocessor trickery to avoid
* collisions.
*
* Not used when building fuzz cases, as libfuzzer has its own main()
* and calls the "OS" through a per-case fuzz test entry point.
*/
int main(int argc, char *argv[])
{
posix_init(argc, argv);
while (true) {
hwm_one_event();
}
/* This line should be unreachable */
return 1; /* LCOV_EXCL_LINE */
}
#endif
``` | /content/code_sandbox/boards/native/native_posix/main.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 804 |
```c
/*
*
*/
#include <stdbool.h>
#include <stdlib.h>
#include <string.h>
#include "cmdline_common.h"
#include <zephyr/types.h>
#include "hw_models_top.h"
#include "timer_model.h"
#include "cmdline.h"
#include <zephyr/toolchain.h>
#include <zephyr/arch/posix/posix_trace.h>
#include "native_tracing.h"
static int s_argc, test_argc;
static char **s_argv, **test_argv;
static struct args_struct_t *args_struct;
static int used_args;
static int args_aval;
#define ARGS_ALLOC_CHUNK_SIZE 20
void native_cleanup_cmd_line(void)
{
if (args_struct != NULL) { /* LCOV_EXCL_BR_LINE */
free(args_struct);
args_struct = NULL;
}
}
/**
* Add a set of command line options to the program.
*
* Each option to be added is described in one entry of the input <args>
* This input must be terminated with an entry containing ARG_TABLE_ENDMARKER.
*/
void native_add_command_line_opts(struct args_struct_t *args)
{
int count = 0;
while (args[count].option != NULL) {
count++;
}
count++; /*for the end marker*/
if (used_args + count >= args_aval) {
int growby = count;
/* reallocs are expensive let's do them only in big chunks */
if (growby < ARGS_ALLOC_CHUNK_SIZE) {
growby = ARGS_ALLOC_CHUNK_SIZE;
}
struct args_struct_t *new_args_struct = realloc(args_struct,
(args_aval + growby)*
sizeof(struct args_struct_t));
args_aval += growby;
/* LCOV_EXCL_START */
if (new_args_struct == NULL) {
posix_print_error_and_exit("Could not allocate memory");
} else {
args_struct = new_args_struct;
}
/* LCOV_EXCL_STOP */
}
memcpy(&args_struct[used_args], args,
count*sizeof(struct args_struct_t));
used_args += count - 1;
/*
* -1 as the end marker should be overwritten next time something
* is added
*/
}
void native_add_testargs_option(void)
{
static struct args_struct_t testargs_options[] = {
/*
* Fields:
* manual, mandatory, switch,
* option_name, var_name ,type,
* destination, callback,
* description
*/
{true, false, false,
"testargs", "arg", 'l',
(void *)NULL, NULL,
"Any argument that follows will be ignored by the top level, "
"and made available for possible tests"},
ARG_TABLE_ENDMARKER};
native_add_command_line_opts(testargs_options);
}
static void print_invalid_opt_error(char *argv)
{
posix_print_error_and_exit("Incorrect option '%s'. Did you misspell it?"
" Is that feature supported in this build?"
"\n",
argv);
}
/**
* Handle possible command line arguments.
*
* We also store them for later use by possible test applications
*/
void native_handle_cmd_line(int argc, char *argv[])
{
int i;
native_add_tracing_options();
native_add_testargs_option();
s_argv = argv;
s_argc = argc;
cmd_args_set_defaults(args_struct);
for (i = 1; i < argc; i++) {
if ((cmd_is_option(argv[i], "testargs", 0))) {
test_argc = argc - i - 1;
test_argv = &argv[i+1];
break;
}
if (!cmd_parse_one_arg(argv[i], args_struct)) {
cmd_print_switches_help(args_struct);
print_invalid_opt_error(argv[i]);
}
}
}
/**
* The application/test can use this function to inspect all the command line
* arguments
*/
void native_get_cmd_line_args(int *argc, char ***argv)
{
*argc = s_argc;
*argv = s_argv;
}
/**
* The application/test can use this function to inspect the command line
* arguments received after --testargs
*/
void native_get_test_cmd_line_args(int *argc, char ***argv)
{
*argc = test_argc;
*argv = test_argv;
}
``` | /content/code_sandbox/boards/native/native_posix/cmdline.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 924 |
```objective-c
/*
*
*/
#ifndef BOARDS_POSIX_NATIVE_POSIX_BOARD_IRQ_H
#define BOARDS_POSIX_NATIVE_POSIX_BOARD_IRQ_H
#include "../common/irq/board_irq.h"
#endif /* BOARDS_POSIX_NATIVE_POSIX_BOARD_IRQ_H */
``` | /content/code_sandbox/boards/native/native_posix/board_irq.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 50 |
```yaml
boards:
- name: native_posix
vendor: zephyr
socs:
- name: native
variants:
- name: "64"
``` | /content/code_sandbox/boards/native/native_posix/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 37 |
```objective-c
/*
*
*/
#ifndef _NATIVE_POSIX_TIMER_MODEL_H
#define _NATIVE_POSIX_TIMER_MODEL_H
#include "hw_models_top.h"
#include <stdbool.h>
#ifdef __cplusplus
extern "C" {
#endif
void hwtimer_init(void);
void hwtimer_cleanup(void);
void hwtimer_set_real_time_mode(bool new_rt);
void hwtimer_timer_reached(void);
void hwtimer_wake_in_time(uint64_t time);
void hwtimer_set_silent_ticks(int64_t sys_ticks);
void hwtimer_enable(uint64_t period);
int64_t hwtimer_get_pending_silent_ticks(void);
void hwtimer_reset_rtc(void);
void hwtimer_set_rtc_offset(int64_t offset);
void hwtimer_set_rt_ratio(double ratio);
void hwtimer_adjust_rtc_offset(int64_t offset_delta);
void hwtimer_adjust_rt_ratio(double ratio_correction);
int64_t hwtimer_get_simu_rtc_time(void);
void hwtimer_get_pseudohost_rtc_time(uint32_t *nsec, uint64_t *sec);
#ifdef __cplusplus
}
#endif
#endif /* _NATIVE_POSIX_TIMER_MODEL_H */
``` | /content/code_sandbox/boards/native/native_posix/timer_model.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 246 |
```c
/*
*
*
* SW side of the IRQ handling
*/
#include <stdint.h>
#include "irq_handler.h"
#include <zephyr/irq_offload.h>
#include <zephyr/kernel_structs.h>
#include "kernel_internal.h"
#include "kswap.h"
#include "irq_ctrl.h"
#include "posix_core.h"
#include "board_soc.h"
#include <zephyr/sw_isr_table.h>
#include "soc.h"
#include <zephyr/tracing/tracing.h>
typedef void (*normal_irq_f_ptr)(const void *);
typedef int (*direct_irq_f_ptr)(void);
typedef struct _isr_list isr_table_entry_t;
static isr_table_entry_t irq_vector_table[N_IRQS] = { { 0 } };
static int currently_running_irq = -1;
static inline void vector_to_irq(int irq_nbr, int *may_swap)
{
sys_trace_isr_enter();
if (irq_vector_table[irq_nbr].func == NULL) { /* LCOV_EXCL_BR_LINE */
/* LCOV_EXCL_START */
posix_print_error_and_exit("Received irq %i without a "
"registered handler\n",
irq_nbr);
/* LCOV_EXCL_STOP */
} else {
if (irq_vector_table[irq_nbr].flags & ISR_FLAG_DIRECT) {
*may_swap |= ((direct_irq_f_ptr)
irq_vector_table[irq_nbr].func)();
} else {
#ifdef CONFIG_PM
posix_irq_check_idle_exit();
#endif
((normal_irq_f_ptr)irq_vector_table[irq_nbr].func)
(irq_vector_table[irq_nbr].param);
*may_swap = 1;
}
}
sys_trace_isr_exit();
}
/**
* When an interrupt is raised, this function is called to handle it and, if
* needed, swap to a re-enabled thread
*
* Note that even that this function is executing in a Zephyr thread, it is
* effectively the model of the interrupt controller passing context to the IRQ
* handler and therefore its priority handling
*/
void posix_irq_handler(void)
{
uint64_t irq_lock;
int irq_nbr;
static int may_swap;
irq_lock = hw_irq_ctrl_get_current_lock();
if (irq_lock) {
/* "spurious" wakes can happen with interrupts locked */
return;
}
if (_kernel.cpus[0].nested == 0) {
may_swap = 0;
}
_kernel.cpus[0].nested++;
while ((irq_nbr = hw_irq_ctrl_get_highest_prio_irq()) != -1) {
int last_current_running_prio = hw_irq_ctrl_get_cur_prio();
int last_running_irq = currently_running_irq;
hw_irq_ctrl_set_cur_prio(hw_irq_ctrl_get_prio(irq_nbr));
hw_irq_ctrl_clear_irq(irq_nbr);
currently_running_irq = irq_nbr;
vector_to_irq(irq_nbr, &may_swap);
currently_running_irq = last_running_irq;
hw_irq_ctrl_set_cur_prio(last_current_running_prio);
}
_kernel.cpus[0].nested--;
/* Call swap if all the following is true:
* 1) may_swap was enabled
* 2) We are not nesting irq_handler calls (interrupts)
* 3) Next thread to run in the ready queue is not this thread
*/
if (may_swap
&& (hw_irq_ctrl_get_cur_prio() == 256)
&& (_kernel.ready_q.cache) && (_kernel.ready_q.cache != _current)) {
(void)z_swap_irqlock(irq_lock);
}
}
/**
* Thru this function the IRQ controller can raise an immediate interrupt which
* will interrupt the SW itself
* (this function should only be called from the HW model code, from SW threads)
*/
void posix_irq_handler_im_from_sw(void)
{
/*
* if a higher priority interrupt than the possibly currently running is
* pending we go immediately into irq_handler() to vector into its
* handler
*/
if (hw_irq_ctrl_get_highest_prio_irq() != -1) {
if (!posix_is_cpu_running()) { /* LCOV_EXCL_BR_LINE */
/* LCOV_EXCL_START */
posix_print_error_and_exit("programming error: %s "
"called from a HW model thread\n",
__func__);
/* LCOV_EXCL_STOP */
}
posix_irq_handler();
}
}
/**
* @brief Disable all interrupts on the CPU
*
* This routine disables interrupts. It can be called from either interrupt,
* task or fiber level. This routine returns an architecture-dependent
* lock-out key representing the "interrupt disable state" prior to the call;
* this key can be passed to irq_unlock() to re-enable interrupts.
*
* The lock-out key should only be used as the argument to the irq_unlock()
* API. It should never be used to manually re-enable interrupts or to inspect
* or manipulate the contents of the source register.
*
* This function can be called recursively: it will return a key to return the
* state of interrupt locking to the previous level.
*
* WARNINGS
* Invoking a kernel routine with interrupts locked may result in
* interrupts being re-enabled for an unspecified period of time. If the
* called routine blocks, interrupts will be re-enabled while another
* thread executes, or while the system is idle.
*
* The "interrupt disable state" is an attribute of a thread. Thus, if a
* fiber or task disables interrupts and subsequently invokes a kernel
* routine that causes the calling thread to block, the interrupt
* disable state will be restored when the thread is later rescheduled
* for execution.
*
* @return An architecture-dependent lock-out key representing the
* "interrupt disable state" prior to the call.
*
*/
unsigned int posix_irq_lock(void)
{
return hw_irq_ctrl_change_lock(true);
}
/**
* @brief Enable all interrupts on the CPU
*
* This routine re-enables interrupts on the CPU. The @a key parameter is a
* board-dependent lock-out key that is returned by a previous invocation of
* board_irq_lock().
*
* This routine can be called from either interrupt, task or fiber level.
*/
void posix_irq_unlock(unsigned int key)
{
hw_irq_ctrl_change_lock(key);
}
void posix_irq_full_unlock(void)
{
hw_irq_ctrl_change_lock(false);
}
void posix_irq_enable(unsigned int irq)
{
hw_irq_ctrl_enable_irq(irq);
}
void posix_irq_disable(unsigned int irq)
{
hw_irq_ctrl_disable_irq(irq);
}
int posix_irq_is_enabled(unsigned int irq)
{
return hw_irq_ctrl_is_irq_enabled(irq);
}
int posix_get_current_irq(void)
{
return currently_running_irq;
}
/**
* Configure a static interrupt.
*
* posix_isr_declare will populate the interrupt table table with the
* interrupt's parameters, the vector table and the software ISR table.
*
* We additionally set the priority in the interrupt controller at
* runtime.
*
* @param irq_p IRQ line number
* @param flags [plug it directly (1), or as a SW managed interrupt (0)]
* @param isr_p Interrupt service routine
* @param isr_param_p ISR parameter
* @param flags_p IRQ options
*/
void posix_isr_declare(unsigned int irq_p, int flags, void isr_p(const void *),
const void *isr_param_p)
{
if (irq_p >= N_IRQS) {
posix_print_error_and_exit("Attempted to configure not existent interrupt %u\n",
irq_p);
return;
}
irq_vector_table[irq_p].irq = irq_p;
irq_vector_table[irq_p].func = isr_p;
irq_vector_table[irq_p].param = isr_param_p;
irq_vector_table[irq_p].flags = flags;
}
/**
* @internal
*
* @brief Set an interrupt's priority
*
* Lower values take priority over higher values.
*/
void posix_irq_priority_set(unsigned int irq, unsigned int prio, uint32_t flags)
{
hw_irq_ctrl_prio_set(irq, prio);
}
/**
* Similar to ARM's NVIC_SetPendingIRQ
* set a pending IRQ from SW
*
* Note that this will interrupt immediately if the interrupt is not masked and
* IRQs are not locked, and this interrupt has higher priority than a possibly
* currently running interrupt
*/
void posix_sw_set_pending_IRQ(unsigned int IRQn)
{
hw_irq_ctrl_raise_im_from_sw(IRQn);
}
/**
* Similar to ARM's NVIC_ClearPendingIRQ
* clear a pending irq from SW
*/
void posix_sw_clear_pending_IRQ(unsigned int IRQn)
{
hw_irq_ctrl_clear_irq(IRQn);
}
#ifdef CONFIG_IRQ_OFFLOAD
/**
* Storage for functions offloaded to IRQ
*/
static void (*off_routine)(const void *);
static const void *off_parameter;
/**
* IRQ handler for the SW interrupt assigned to irq_offload()
*/
static void offload_sw_irq_handler(const void *a)
{
ARG_UNUSED(a);
off_routine(off_parameter);
}
/**
* @brief Run a function in interrupt context
*
* Raise the SW IRQ assigned to handled this
*/
void posix_irq_offload(void (*routine)(const void *), const void *parameter)
{
off_routine = routine;
off_parameter = parameter;
posix_isr_declare(OFFLOAD_SW_IRQ, 0, offload_sw_irq_handler, NULL);
posix_irq_enable(OFFLOAD_SW_IRQ);
posix_sw_set_pending_IRQ(OFFLOAD_SW_IRQ);
posix_irq_disable(OFFLOAD_SW_IRQ);
}
#endif /* CONFIG_IRQ_OFFLOAD */
``` | /content/code_sandbox/boards/native/native_posix/irq_handler.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,057 |
```objective-c
/*
*
*/
#ifndef _NATIVE_POSIX_IRQ_CTRL_H
#define _NATIVE_POSIX_IRQ_CTRL_H
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
void hw_irq_ctrl_init(void);
void hw_irq_ctrl_cleanup(void);
void hw_irq_ctrl_timer_triggered(void);
void hw_irq_ctrl_set_cur_prio(int new);
int hw_irq_ctrl_get_cur_prio(void);
void hw_irq_ctrl_prio_set(unsigned int irq, unsigned int prio);
uint8_t hw_irq_ctrl_get_prio(unsigned int irq);
int hw_irq_ctrl_get_highest_prio_irq(void);
uint32_t hw_irq_ctrl_get_current_lock(void);
uint32_t hw_irq_ctrl_change_lock(uint32_t new_lock);
uint64_t hw_irq_ctrl_get_irq_status(void);
void hw_irq_ctrl_disable_irq(unsigned int irq);
int hw_irq_ctrl_is_irq_enabled(unsigned int irq);
void hw_irq_ctrl_clear_irq(unsigned int irq);
void hw_irq_ctrl_enable_irq(unsigned int irq);
void hw_irq_ctrl_set_irq(unsigned int irq);
void hw_irq_ctrl_raise_im(unsigned int irq);
void hw_irq_ctrl_raise_im_from_sw(unsigned int irq);
#define N_IRQS 32
#ifdef __cplusplus
}
#endif
#endif /* _NATIVE_POSIX_IRQ_CTRL_H */
``` | /content/code_sandbox/boards/native/native_posix/irq_ctrl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 257 |
```unknown
/*
*
*/
#include "../native_sim/native_sim.dts"
``` | /content/code_sandbox/boards/native/native_posix/native_posix_64.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 13 |
```objective-c
/*
*
*/
#ifndef _NATIVE_POSIX_HW_COUNTER_H
#define _NATIVE_POSIX_HW_COUNTER_H
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
void hw_counter_init(void);
void hw_counter_triggered(void);
void hw_counter_set_period(uint64_t period);
void hw_counter_set_target(uint64_t counter_target);
void hw_counter_set_wrap_value(uint64_t wrap_value);
void hw_counter_start(void);
void hw_counter_stop(void);
bool hw_counter_is_started(void);
uint64_t hw_counter_get_value(void);
void hw_counter_reset(void);
#ifdef __cplusplus
}
#endif
#endif /* _NATIVE_POSIX_HW_COUNTER_H */
``` | /content/code_sandbox/boards/native/native_posix/hw_counter.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 137 |
```unknown
if BOARD_NATIVE_POSIX
config BOARD_DEPRECATED_RELEASE
default "v4.2.0"
config BUILD_OUTPUT_BIN
default n
config BUILD_OUTPUT_EXE
default y
config OUTPUT_PRINT_MEMORY_USAGE
default n
if NETWORKING
config NET_L2_ETHERNET
default y if !NET_LOOPBACK && !NET_TEST
config ETH_NATIVE_POSIX
default y if NET_L2_ETHERNET && ETH_DRIVER
endif # NETWORKING
if CONSOLE
config POSIX_ARCH_CONSOLE
default y if !SERIAL
config UART_CONSOLE
default y if SERIAL
endif # CONSOLE
endif # BOARD_NATIVE_POSIX
``` | /content/code_sandbox/boards/native/native_posix/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 133 |
```unknown
config BOARD_NATIVE_POSIX
bool
imply NATIVE_POSIX_TIMER
select POSIX_ARCH_CONSOLE
select NATIVE_APPLICATION
select 64BIT if BOARD_NATIVE_POSIX_NATIVE_64
help
Native POSIX
Will produce a console Linux process which can be executed natively.
It provides some minimal needed models:
An interrupt controller, timer (system tick), and redirects kernel prints to
stdout.
if BOARD_NATIVE_POSIX
comment "Native POSIX options"
config NATIVE_POSIX_SLOWDOWN_TO_REAL_TIME
bool "Slow down execution to real time"
default n if ARCH_POSIX_LIBFUZZER
default y if BT_USERCHAN || !TEST
help
When selected the execution of the process will be slowed down to real time.
(if there is a lot of load it may be slower than real time)
If deselected, the process will run as fast as possible.
Note that this only decouples simulated time from real/wall time. In either
case the zephyr kernel and application cannot tell the difference unless they
interact with some other driver/device which runs at real time.
source "boards/native/common/sdl/Kconfig"
endif # BOARD_NATIVE_POSIX
``` | /content/code_sandbox/boards/native/native_posix/Kconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 255 |
```unknown
CONFIG_CONSOLE=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=1000000
``` | /content/code_sandbox/boards/native/native_posix/native_posix_64_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 20 |
```c
/*
*
*
* HW IRQ controller model
*/
#include <stdint.h>
#include <stdbool.h>
#include "hw_models_top.h"
#include "irq_ctrl.h"
#include "irq_handler.h"
#include <zephyr/arch/posix/arch.h> /* for find_lsb_set() */
#include "board_soc.h"
#include "posix_soc.h"
#include <zephyr/types.h>
uint64_t irq_ctrl_timer = NEVER;
static uint64_t irq_status; /* pending interrupts */
static uint64_t irq_premask; /* interrupts before the mask */
/*
* Mask of which interrupts will actually cause the cpu to vector into its
* irq handler
* If an interrupt is masked in this way, it will be pending in the premask in
* case it is enabled later before clearing it.
* If the irq_mask enables and interrupt pending in irq_premask, it will cause
* the controller to raise the interrupt immediately
*/
static uint64_t irq_mask;
/*
* Interrupts lock/disable. When set, interrupts are registered
* (in the irq_status) but do not awake the cpu. if when unlocked,
* irq_status != 0 an interrupt will be raised immediately
*/
static bool irqs_locked;
static bool lock_ignore; /* For the hard fake IRQ, temporarily ignore lock */
static uint8_t irq_prio[N_IRQS]; /* Priority of each interrupt */
/* note that prio = 0 == highest, prio=255 == lowest */
static int currently_running_prio = 256; /* 255 is the lowest prio interrupt */
void hw_irq_ctrl_init(void)
{
irq_mask = 0U; /* Let's assume all interrupts are disable at boot */
irq_premask = 0U;
irqs_locked = false;
lock_ignore = false;
for (int i = 0 ; i < N_IRQS; i++) {
irq_prio[i] = 255U;
}
}
void hw_irq_ctrl_cleanup(void)
{
/* Nothing to be done */
}
void hw_irq_ctrl_set_cur_prio(int new)
{
currently_running_prio = new;
}
int hw_irq_ctrl_get_cur_prio(void)
{
return currently_running_prio;
}
void hw_irq_ctrl_prio_set(unsigned int irq, unsigned int prio)
{
irq_prio[irq] = prio;
}
uint8_t hw_irq_ctrl_get_prio(unsigned int irq)
{
return irq_prio[irq];
}
/**
* Get the currently pending highest priority interrupt which has a priority
* higher than a possibly currently running interrupt
*
* If none, return -1
*/
int hw_irq_ctrl_get_highest_prio_irq(void)
{
if (irqs_locked) {
return -1;
}
uint64_t hw_irq_status = hw_irq_ctrl_get_irq_status();
int winner = -1;
int winner_prio = 256;
while (hw_irq_status != 0U) {
int irq_nbr = find_lsb_set(hw_irq_status) - 1;
hw_irq_status &= ~((uint64_t) 1 << irq_nbr);
if ((winner_prio > (int)irq_prio[irq_nbr])
&& (currently_running_prio > (int)irq_prio[irq_nbr])) {
winner = irq_nbr;
winner_prio = irq_prio[irq_nbr];
}
}
return winner;
}
uint32_t hw_irq_ctrl_get_current_lock(void)
{
return irqs_locked;
}
uint32_t hw_irq_ctrl_change_lock(uint32_t new_lock)
{
uint32_t previous_lock = irqs_locked;
irqs_locked = new_lock;
if ((previous_lock == true) && (new_lock == false)) {
if (irq_status != 0U) {
posix_irq_handler_im_from_sw();
}
}
return previous_lock;
}
uint64_t hw_irq_ctrl_get_irq_status(void)
{
return irq_status;
}
void hw_irq_ctrl_clear_all_enabled_irqs(void)
{
irq_status = 0U;
irq_premask &= ~irq_mask;
}
void hw_irq_ctrl_clear_all_irqs(void)
{
irq_status = 0U;
irq_premask = 0U;
}
void hw_irq_ctrl_disable_irq(unsigned int irq)
{
irq_mask &= ~((uint64_t)1<<irq);
}
int hw_irq_ctrl_is_irq_enabled(unsigned int irq)
{
return (irq_mask & ((uint64_t)1 << irq))?1:0;
}
uint64_t hw_irq_ctrl_get_irq_mask(void)
{
return irq_mask;
}
void hw_irq_ctrl_clear_irq(unsigned int irq)
{
irq_status &= ~((uint64_t)1<<irq);
irq_premask &= ~((uint64_t)1<<irq);
}
/**
* Enable an interrupt
*
* This function may only be called from SW threads
*
* If the enabled interrupt is pending, it will immediately vector to its
* interrupt handler and continue (maybe with some swap() before)
*/
void hw_irq_ctrl_enable_irq(unsigned int irq)
{
irq_mask |= ((uint64_t)1<<irq);
if (irq_premask & ((uint64_t)1<<irq)) { /* if IRQ is pending */
hw_irq_ctrl_raise_im_from_sw(irq);
}
}
static inline void hw_irq_ctrl_irq_raise_prefix(unsigned int irq)
{
if (irq < N_IRQS) {
irq_premask |= ((uint64_t)1<<irq);
if (irq_mask & (1 << irq)) {
irq_status |= ((uint64_t)1<<irq);
}
} else if (irq == PHONY_HARD_IRQ) {
lock_ignore = true;
}
}
/**
* Set/Raise an interrupt
*
* This function is meant to be used by either the SW manual IRQ raising
* or by HW which wants the IRQ to be raised in one delta cycle from now
*/
void hw_irq_ctrl_set_irq(unsigned int irq)
{
hw_irq_ctrl_irq_raise_prefix(irq);
if ((irqs_locked == false) || (lock_ignore)) {
/*
* Awake CPU in 1 delta
* Note that we awake the CPU even if the IRQ is disabled
* => we assume the CPU is always idling in a WFE() like
* instruction and the CPU is allowed to awake just with the irq
* being marked as pending
*/
irq_ctrl_timer = hwm_get_time();
hwm_find_next_timer();
}
}
static void irq_raising_from_hw_now(void)
{
/*
* We always awake the CPU even if the IRQ was masked,
* but not if irqs are locked unless this is due to a
* PHONY_HARD_IRQ
*/
if ((irqs_locked == false) || (lock_ignore)) {
lock_ignore = false;
posix_interrupt_raised();
}
}
/**
* Set/Raise an interrupt immediately.
* Like hw_irq_ctrl_set_irq() but awake immediately the CPU instead of in
* 1 delta cycle
*
* Call only from HW threads
*/
void hw_irq_ctrl_raise_im(unsigned int irq)
{
hw_irq_ctrl_irq_raise_prefix(irq);
irq_raising_from_hw_now();
}
/**
* Like hw_irq_ctrl_raise_im() but for SW threads
*
* Call only from SW threads
*/
void hw_irq_ctrl_raise_im_from_sw(unsigned int irq)
{
hw_irq_ctrl_irq_raise_prefix(irq);
if (irqs_locked == false) {
posix_irq_handler_im_from_sw();
}
}
void hw_irq_ctrl_timer_triggered(void)
{
irq_ctrl_timer = NEVER;
irq_raising_from_hw_now();
}
``` | /content/code_sandbox/boards/native/native_posix/irq_ctrl.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,612 |
```objective-c
/*
*
*/
/**
* @file Extra definitions provided by the board to soc.h
*
* Background:
* The POSIX ARCH/SOC/board layering is different than in normal archs
* The "SOC" does not provide almost any of the typical SOC functionality
* but that is left for the "board" to define it
* Device code may rely on the soc.h defining some things (like the interrupts
* numbers)
* Therefore this file is included from the inf_clock soc.h to allow a board
* to define that kind of SOC related snippets
*/
#ifndef _POSIX_SP_BOARD_SOC_H
#define _POSIX_SP_BOARD_SOC_H
#ifdef __cplusplus
extern "C" {
#endif
#define TIMER_TICK_IRQ 0
#define OFFLOAD_SW_IRQ 1
#define COUNTER_EVENT_IRQ 2
/*
* This interrupt will awake the CPU if IRQs are not locked,
* This interrupt does not have an associated status bit or handler
*/
#define PHONY_WEAK_IRQ 0xFFFE
/*
* This interrupt will awake the CPU even if IRQs are locked,
* This interrupt does not have an associated status bit or handler
* (the lock is only ignored when the interrupt is raised from the HW models,
* SW threads should not try to use this)
*/
#define PHONY_HARD_IRQ 0xFFFF
#ifdef __cplusplus
}
#endif
#endif /* _POSIX_SP_BOARD_SOC_H */
``` | /content/code_sandbox/boards/native/native_posix/board_soc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 291 |
```c
/*
*
*/
#include <stdbool.h>
#include <stdint.h>
#include "hw_models_top.h"
#include "board_soc.h"
#include "board_irq.h"
#include "irq_ctrl.h"
uint64_t hw_counter_timer;
static bool counter_running;
static uint64_t counter_value;
static uint64_t counter_target;
static uint64_t counter_period;
static uint64_t counter_wrap;
/**
* Initialize the counter with prescaler of HW
*/
void hw_counter_init(void)
{
hw_counter_timer = NEVER;
counter_target = NEVER;
counter_value = 0;
counter_running = false;
counter_period = NEVER;
counter_wrap = NEVER;
}
void hw_counter_triggered(void)
{
if (!counter_running) {
hw_counter_timer = NEVER;
return;
}
hw_counter_timer = hwm_get_time() + counter_period;
counter_value = (counter_value + 1) % counter_wrap;
if (counter_value == counter_target) {
hw_irq_ctrl_set_irq(COUNTER_EVENT_IRQ);
}
}
/**
* Configures the counter period.
* The counter will be incremented every 'period' microseconds.
*/
void hw_counter_set_period(uint64_t period)
{
counter_period = period;
}
/*
* Set the count value at which the counter will wrap
* The counter will count up to (counter_wrap-1), i.e.:
* 0, 1, 2,.., (counter_wrap - 1), 0
*/
void hw_counter_set_wrap_value(uint64_t wrap_value)
{
counter_wrap = wrap_value;
}
/**
* Starts the counter. It must be previously configured with
* hw_counter_set_period() and hw_counter_set_target().
*/
void hw_counter_start(void)
{
if (counter_running) {
return;
}
counter_running = true;
hw_counter_timer = hwm_get_time() + counter_period;
hwm_find_next_timer();
}
/**
* Stops the counter at current value.
* On the next call to hw_counter_start, the counter will
* start from the value at which it was stopped.
*/
void hw_counter_stop(void)
{
counter_running = false;
hw_counter_timer = NEVER;
hwm_find_next_timer();
}
bool hw_counter_is_started(void)
{
return counter_running;
}
/**
* Returns the current counter value.
*/
uint64_t hw_counter_get_value(void)
{
return counter_value;
}
/**
* Resets the counter value.
*/
void hw_counter_reset(void)
{
counter_value = 0;
}
/**
* Configures the counter to generate an interrupt
* when its count value reaches target.
*/
void hw_counter_set_target(uint64_t target)
{
counter_target = target;
}
``` | /content/code_sandbox/boards/native/native_posix/hw_counter.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 549 |
```objective-c
/*
*
*/
#ifndef NATIVE_TRACING_H
#define NATIVE_TRACING_H
#ifdef __cplusplus
extern "C" {
#endif
void native_add_tracing_options(void);
#ifdef __cplusplus
}
#endif
#endif /* NATIVE_TRACING_H */
``` | /content/code_sandbox/boards/native/native_posix/native_tracing.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 52 |
```unknown
config BOARD_NATIVE_POSIX
select SOC_POSIX
``` | /content/code_sandbox/boards/native/native_posix/Kconfig.native_posix | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 13 |
```restructuredtext
.. _native_posix:
Native POSIX execution (native_posix)
#######################################
.. contents::
:depth: 1
:backlinks: entry
:local:
Overview
********
.. warning::
``native_posix`` is deprecated in favour of :ref:`native_sim<native_sim>`, and will be removed
in the 4.2 release.
.. note::
For native_posix users, if needed, :ref:`native_sim<native_sim>` includes a compatibility mode
:kconfig:option:`CONFIG_NATIVE_SIM_NATIVE_POSIX_COMPAT`,
which will set its configuration to mimic a native_posix-like configuration.
``native_posix`` is the predecessor of :ref:`native_sim<native_sim>`.
Just like with :ref:`native_sim<native_sim>` you can build your Zephyr application
with the Zephyr kernel, creating a normal Linux executable with your host tooling,
and can debug and instrument it like any other Linux program.
But unlike with :ref:`native_sim<native_sim>` you are limited to only using the host C library.
:ref:`native_sim<native_sim>` supports all ``native_posix`` use cases.
This board does not intend to simulate any particular HW, but it provides
a few peripherals such as an Ethernet driver, display, UART, etc., to enable
developing and testing application code which would require them.
This board supports the same :ref:`peripherals<native_sim_peripherals>`
:ref:`and backends as native_sim<native_sim_backends>`.
.. _native_posix_deps:
Host system dependencies
************************
Please check the
:ref:`Posix Arch Dependencies<posix_arch_deps>`
.. _native_important_limitations:
Important limitations
*********************
This board inherits
:ref:`the limitations of its architecture<posix_arch_limitations>`
Moreover, being limited to build only with the host C library, it is not possible to build
applications with the :ref:`Zephyr POSIX OS abstraction<posix_support>`, as there would be symbol
collisions between the host OS and this abstraction layer.
.. _native_posix_how_to_use:
How to use it
*************
To build, simply specify the ``native_posix`` board as target:
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:host-os: unix
:board: native_posix
:goals: build
:compact:
Now you have a Linux executable, ``./build/zephyr/zephyr.exe``, you can use just like any
other Linux program.
You can run, debug, build it with sanitizers or with coverage just like with
:ref:`native_sim<native_sim>`.
Please check :ref:`native_sim's how to<native_sim_how_to_use>` for more info.
.. _native_posix32_64:
32 and 64bit versions
*********************
Just like :ref:`native_sim<native_sim>`, ``native_posix`` comes with two targets:
A 32 bit and 64 bit version.
The 32 bit version, ``native_posix``, is the default target, which will compile
your code for the ILP32 ABI (i386 in a x86 or x86_64 system) where pointers
and longs are 32 bits.
This mimics the ABI of most embedded systems Zephyr targets,
and is therefore normally best to test and debug your code, as some bugs are
dependent on the size of pointers and longs.
This target requires either a 64 bit system with multilib support installed or
one with a 32bit userspace.
The 64 bit version, ``native_posix/native/64``, compiles your code targeting the
LP64 ABI (x86-64 in x86 systems), where pointers and longs are 64 bits.
You can use this target if you cannot compile or run 32 bit binaries.
``` | /content/code_sandbox/boards/native/native_posix/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 827 |
```c
/*
*
*/
/**
* This provides a model of:
* - A system tick
* - A real time clock
* - A one shot HW timer which can be used to awake the CPU at a given time
* - The clock source for all of this, and therefore for native_posix
*
* Please see doc/board.rst for more information, specially sections:
* About time in native_posix
* Peripherals:
* Clock source, system tick and timer
* Real time clock
*/
#include <stdint.h>
#include <time.h>
#include <stdbool.h>
#include <math.h>
#include "hw_models_top.h"
#include "irq_ctrl.h"
#include "board_soc.h"
#include <zephyr/types.h>
#include <zephyr/arch/posix/posix_trace.h>
#include <zephyr/sys/util.h>
#include "cmdline.h"
#include "posix_native_task.h"
#define DEBUG_NP_TIMER 0
#if DEBUG_NP_TIMER
/**
* Helper function to convert a 64 bit time in microseconds into a string.
* The format will always be: hh:mm:ss.ssssss\0
*
* Note: the caller has to allocate the destination buffer (at least 17 chars)
*/
#include <stdio.h>
static char *us_time_to_str(char *dest, uint64_t time)
{
if (time != NEVER) {
unsigned int hour;
unsigned int minute;
unsigned int second;
unsigned int us;
hour = (time / 3600U / 1000000U) % 24;
minute = (time / 60U / 1000000U) % 60;
second = (time / 1000000U) % 60;
us = time % 1000000;
sprintf(dest, "%02u:%02u:%02u.%06u", hour, minute, second, us);
} else {
sprintf(dest, " NEVER/UNKNOWN ");
}
return dest;
}
#endif
uint64_t hw_timer_timer;
uint64_t hw_timer_tick_timer;
uint64_t hw_timer_awake_timer;
static uint64_t tick_p; /* Period of the ticker */
static int64_t silent_ticks;
static bool real_time_mode =
#if defined(CONFIG_NATIVE_POSIX_SLOWDOWN_TO_REAL_TIME)
true;
#else
false;
#endif
static bool reset_rtc; /*"Reset" the RTC on boot*/
/*
* When this executable started running, this value shall not be changed after
* boot
*/
static uint64_t boot_time;
/*
* Ratio of the simulated clock to the real host time
* For ex. a clock_ratio = 1+100e-6 means the simulated time is 100ppm faster
* than real time
*/
static double clock_ratio = 1.0;
#if DEBUG_NP_TIMER
/*
* Offset of the simulated time vs the real host time due to drift/clock ratio
* until "last_radj_*time"
*
* A positive value means simulated time is ahead of the host time
*
* This variable is only kept for debugging purposes
*/
static int64_t last_drift_offset;
#endif
/*
* Offsets of the RTC relative to the hardware models simu_time
* "simu_time" == simulated time which starts at 0 on boot
*/
static int64_t rtc_offset;
/* Last host/real time when the ratio was adjusted */
static uint64_t last_radj_rtime;
/* Last simulated time when the ratio was adjusted */
static uint64_t last_radj_stime;
extern uint64_t posix_get_hw_cycle(void);
void hwtimer_set_real_time_mode(bool new_rt)
{
real_time_mode = new_rt;
}
static void hwtimer_update_timer(void)
{
hw_timer_timer = MIN(hw_timer_tick_timer, hw_timer_awake_timer);
}
static inline void host_clock_gettime(struct timespec *tv)
{
#if defined(CLOCK_MONOTONIC_RAW)
clock_gettime(CLOCK_MONOTONIC_RAW, tv);
#else
clock_gettime(CLOCK_MONOTONIC, tv);
#endif
}
uint64_t get_host_us_time(void)
{
struct timespec tv;
host_clock_gettime(&tv);
return (uint64_t)tv.tv_sec * 1e6 + tv.tv_nsec / 1000;
}
void hwtimer_init(void)
{
silent_ticks = 0;
hw_timer_tick_timer = NEVER;
hw_timer_awake_timer = NEVER;
hwtimer_update_timer();
if (real_time_mode) {
boot_time = get_host_us_time();
last_radj_rtime = boot_time;
last_radj_stime = 0U;
}
if (!reset_rtc) {
struct timespec tv;
uint64_t realhosttime;
clock_gettime(CLOCK_REALTIME, &tv);
realhosttime = (uint64_t)tv.tv_sec * 1e6 + tv.tv_nsec / 1000;
rtc_offset += realhosttime;
}
}
void hwtimer_cleanup(void)
{
}
/**
* Enable the HW timer tick interrupts with a period <period> in microseconds
*/
void hwtimer_enable(uint64_t period)
{
tick_p = period;
hw_timer_tick_timer = hwm_get_time() + tick_p;
hwtimer_update_timer();
hwm_find_next_timer();
}
static void hwtimer_tick_timer_reached(void)
{
if (real_time_mode) {
uint64_t expected_rt = (hw_timer_tick_timer - last_radj_stime)
/ clock_ratio
+ last_radj_rtime;
uint64_t real_time = get_host_us_time();
int64_t diff = expected_rt - real_time;
#if DEBUG_NP_TIMER
char es[30];
char rs[30];
us_time_to_str(es, expected_rt - boot_time);
us_time_to_str(rs, real_time - boot_time);
printf("tick @%5llims: diff = expected_rt - real_time = "
"%5lli = %s - %s\n",
hw_timer_tick_timer/1000U, diff, es, rs);
#endif
if (diff > 0) { /* we need to slow down */
struct timespec requested_time;
struct timespec remaining;
requested_time.tv_sec = diff / 1e6;
requested_time.tv_nsec = (diff -
requested_time.tv_sec*1e6)*1e3;
(void) nanosleep(&requested_time, &remaining);
}
}
hw_timer_tick_timer += tick_p;
hwtimer_update_timer();
if (silent_ticks > 0) {
silent_ticks -= 1;
} else {
hw_irq_ctrl_set_irq(TIMER_TICK_IRQ);
}
}
static void hwtimer_awake_timer_reached(void)
{
hw_timer_awake_timer = NEVER;
hwtimer_update_timer();
hw_irq_ctrl_set_irq(PHONY_HARD_IRQ);
}
void hwtimer_timer_reached(void)
{
uint64_t Now = hw_timer_timer;
if (hw_timer_awake_timer == Now) {
hwtimer_awake_timer_reached();
}
if (hw_timer_tick_timer == Now) {
hwtimer_tick_timer_reached();
}
}
/**
* The timer HW will awake the CPU (without an interrupt) at least when <time>
* comes (it may awake it earlier)
*
* If there was a previous request for an earlier time, the old one will prevail
*
* This is meant for k_busy_wait() like functionality
*/
void hwtimer_wake_in_time(uint64_t time)
{
if (hw_timer_awake_timer > time) {
hw_timer_awake_timer = time;
hwtimer_update_timer();
hwm_find_next_timer();
}
}
/**
* The kernel wants to skip the next sys_ticks tick interrupts
* If sys_ticks == 0, the next interrupt will be raised.
*/
void hwtimer_set_silent_ticks(int64_t sys_ticks)
{
silent_ticks = sys_ticks;
}
int64_t hwtimer_get_pending_silent_ticks(void)
{
return silent_ticks;
}
/**
* During boot set the real time clock simulated time not start
* from the real host time
*/
void hwtimer_reset_rtc(void)
{
reset_rtc = true;
}
/**
* Set a time offset (microseconds) of the RTC simulated time
* Note: This should not be used after starting
*/
void hwtimer_set_rtc_offset(int64_t offset)
{
rtc_offset = offset;
}
/**
* Set the ratio of the simulated time to host (real) time.
* Note: This should not be used after starting
*/
void hwtimer_set_rt_ratio(double ratio)
{
clock_ratio = ratio;
}
/**
* Increase or decrease the RTC simulated time by offset_delta
*/
void hwtimer_adjust_rtc_offset(int64_t offset_delta)
{
rtc_offset += offset_delta;
}
/**
* Adjust the ratio of the simulated time by a factor
*/
void hwtimer_adjust_rt_ratio(double ratio_correction)
{
uint64_t current_stime = hwm_get_time();
int64_t s_diff = current_stime - last_radj_stime;
/* Accumulated real time drift time since last adjustment: */
last_radj_rtime += s_diff / clock_ratio;
last_radj_stime = current_stime;
#if DEBUG_NP_TIMER
char ct[30];
int64_t r_drift = (long double)(clock_ratio-1.0)/(clock_ratio)*s_diff;
last_drift_offset += r_drift;
us_time_to_str(ct, current_stime);
printf("%s(): @%s, s_diff= %llius after last adjust\n"
" during which we drifted %.3fms\n"
" total acc drift (last_drift_offset) = %.3fms\n"
" last_radj_rtime = %.3fms (+%.3fms )\n"
" Ratio adjusted to %f\n",
__func__, ct, s_diff,
r_drift/1000.0,
last_drift_offset/1000.0,
last_radj_rtime/1000.0,
s_diff/clock_ratio/1000.0,
clock_ratio*ratio_correction);
#endif
clock_ratio *= ratio_correction;
}
/**
* Return the current simulated RTC time in microseconds
*/
int64_t hwtimer_get_simu_rtc_time(void)
{
return hwm_get_time() + rtc_offset;
}
/**
* Return a version of the host time which would have drifted as if the host
* real time clock had been running from the native_posix clock, and adjusted
* both in rate and in offsets as the native_posix has been.
*
* Note that this time may be significantly ahead of the simulated time
* (the time the Zephyr kernel thinks it is).
* This will be the case in general if native_posix is not able to run at or
* faster than real time.
*/
void hwtimer_get_pseudohost_rtc_time(uint32_t *nsec, uint64_t *sec)
{
/*
* Note: long double has a 64bits mantissa in x86.
* Therefore to avoid loss of precision after 500 odd years into
* the epoch, we first calculate the offset from the last adjustment
* time split in us and ns. So we keep the full precision for 500 odd
* years after the last clock ratio adjustment (or native_posix boot,
* whichever is latest).
* Meaning, we will still start to loose precision after 500 off
* years of runtime without a clock ratio adjustment, but that really
* should not be much of a problem, given that the ns lower digits are
* pretty much noise anyhow.
* (So, all this is a huge overkill)
*
* The operation below in plain is just:
* st = (rt - last_rt_adj_time)*ratio + last_dt_adj_time
* where st = simulated time
* rt = real time
* last_rt_adj_time = time (real) when the last ratio
* adjustment took place
* last_st_adj_time = time (simulated) when the last ratio
* adjustment took place
* ratio = ratio between simulated time and real time
*/
struct timespec tv;
host_clock_gettime(&tv);
uint64_t rt_us = (uint64_t)tv.tv_sec * 1000000ULL + tv.tv_nsec / 1000;
uint32_t rt_ns = tv.tv_nsec % 1000;
long double drt_us = (long double)rt_us - last_radj_rtime;
long double drt_ns = drt_us * 1000.0L + (long double)rt_ns;
long double st = drt_ns * (long double)clock_ratio +
(long double)(last_radj_stime + rtc_offset) * 1000.0L;
*nsec = fmodl(st, 1e9L);
*sec = st / 1e9L;
}
static struct {
double stop_at;
double rtc_offset;
double rt_drift;
double rt_ratio;
} args;
static void cmd_stop_at_found(char *argv, int offset)
{
ARG_UNUSED(offset);
if (args.stop_at < 0) {
posix_print_error_and_exit("Error: stop-at must be positive "
"(%s)\n", argv);
}
hwm_set_end_of_time(args.stop_at*1e6);
}
static void cmd_realtime_found(char *argv, int offset)
{
ARG_UNUSED(argv);
ARG_UNUSED(offset);
hwtimer_set_real_time_mode(true);
}
static void cmd_no_realtime_found(char *argv, int offset)
{
ARG_UNUSED(argv);
ARG_UNUSED(offset);
hwtimer_set_real_time_mode(false);
}
static void cmd_rtcoffset_found(char *argv, int offset)
{
ARG_UNUSED(argv);
ARG_UNUSED(offset);
hwtimer_set_rtc_offset(args.rtc_offset*1e6);
}
static void cmd_rt_drift_found(char *argv, int offset)
{
ARG_UNUSED(argv);
ARG_UNUSED(offset);
if (!(args.rt_drift > -1)) {
posix_print_error_and_exit("The drift needs to be > -1. "
"Please use --help for more info\n");
}
args.rt_ratio = args.rt_drift + 1;
hwtimer_set_rt_ratio(args.rt_ratio);
}
static void cmd_rt_ratio_found(char *argv, int offset)
{
ARG_UNUSED(argv);
ARG_UNUSED(offset);
if ((args.rt_ratio <= 0)) {
posix_print_error_and_exit("The ratio needs to be > 0. "
"Please use --help for more info\n");
}
hwtimer_set_rt_ratio(args.rt_ratio);
}
static void cmd_rtcreset_found(char *argv, int offset)
{
ARG_UNUSED(argv);
ARG_UNUSED(offset);
hwtimer_reset_rtc();
}
static void native_add_time_options(void)
{
static struct args_struct_t timer_options[] = {
/*
* Fields:
* manual, mandatory, switch,
* option_name, var_name ,type,
* destination, callback,
* description
*/
{false, false, true,
"rt", "", 'b',
NULL, cmd_realtime_found,
"Slow down the execution to the host real time, "
"or a ratio of it (see --rt-ratio below)"},
{false, false, true,
"no-rt", "", 'b',
NULL, cmd_no_realtime_found,
"Do NOT slow down the execution to real time, but advance "
"Zephyr's time as fast as possible and decoupled from the host "
"time"},
{false, false, false,
"rt-drift", "dratio", 'd',
(void *)&args.rt_drift, cmd_rt_drift_found,
"Drift of the simulated clock relative to the host real time. "
"Normally this would be set to a value of a few ppm (e.g. 50e-6"
") "
"This option has no effect in non real time mode"
},
{false, false, false,
"rt-ratio", "ratio", 'd',
(void *)&args.rt_ratio, cmd_rt_ratio_found,
"Relative speed of the simulated time vs real time. "
"For ex. set to 2 to have simulated time pass at double the "
"speed of real time. "
"Note that both rt-drift & rt-ratio adjust the same clock "
"speed, and therefore it does not make sense to use them "
"simultaneously. "
"This option has no effect in non real time mode"
},
{false, false, false,
"rtc-offset", "time_offset", 'd',
(void *)&args.rtc_offset, cmd_rtcoffset_found,
"At boot offset the RTC clock by this amount of seconds"
},
{false, false, true,
"rtc-reset", "", 'b',
NULL, cmd_rtcreset_found,
"Start the simulated real time clock at 0. Otherwise it starts "
"matching the value provided by the host real time clock"},
{false, false, false,
"stop_at", "time", 'd',
(void *)&args.stop_at, cmd_stop_at_found,
"In simulated seconds, when to stop automatically"},
ARG_TABLE_ENDMARKER};
native_add_command_line_opts(timer_options);
}
NATIVE_TASK(native_add_time_options, PRE_BOOT_1, 1);
``` | /content/code_sandbox/boards/native/native_posix/timer_model.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 3,804 |
```restructuredtext
.. _bsim boards:
Bsim boards
###########
**Available bsim boards**
* :ref:`Simulated nRF52833 (nrf52_bsim)<nrf52_bsim>`
* :ref:`Simulated nRF5340 (nrf5340bsim)<nrf5340bsim>`
* :ref:`Simulated nRF54L15 (nrf54l15bsim)<nrf54l15bsim>`
.. contents:: Table of contents
:depth: 2
:backlinks: entry
:local:
This page covers the design, architecture and rationale, of the
nrf5x_bsim boards and other similar bsim boards.
These boards are postfixed with `_bsim` as they use BabbleSim_
(shortened bsim), to simulate the radio environment.
These boards use the `native simulator`_ and the :ref:`POSIX architecture<Posix arch>` to build
and execute the embedded code natively on Linux.
Particular details on the :ref:`nRF52<nrf52_bsim>`, :ref:`nRF5340<nrf5340bsim>` and
:ref:`nRF54l15<nrf54l15bsim>` simulation boards, including how to use them,
can be found in their respective documentation.
.. _BabbleSim:
path_to_url
.. _EDTT:
path_to_url
.. _Architecture of HW models used for FW development and testing:
path_to_url
.. _native simulator:
path_to_url
.. _native simulator design documentation:
path_to_url
.. _nRF HW models design documentation:
path_to_url
Overall objective
*****************
The main purpose of these bsim boards is to be test-benches for
integration testing of embedded code on workstation/simulation.
Integration testing in the sense that the code under test will, at the very
least, run with the Zephyr RTOS just like for any other
:ref:`POSIX arch based board<posix_arch_rationale>`, but in addition these
will include some HW models which, to some degree, pretend to be the real
embedded HW.
These tests are run in workstation, that is, without using real embedded HW.
The intention being to be able to run tests much faster than real time,
without the need for real HW, and in a deterministic/reproducible fashion.
Unlike :ref:`native_sim <native_sim>`, bsim boards do not interact directly with any host
peripherals, and their execution is independent of the host load, or timing.
These boards are also designed to be used as prototyping and development environments,
which can help developing applications or communication stacks.
.. _bsim_boards_tests:
Different types of tests and how the bsim boards relate to them
===============================================================
With the POSIX architecture we provided an overall
:ref:`comparison of what the POSIX arch provides vs other options<posix_arch_compare>`.
That comparison applies fully to these boards, but in this section we expand
further on the differences, benefits and drawbacks of different testing
methodologies normally employed by embedded SW developers and how they relate
to these boards.
- Unit tests:
Typical unit tests frameworks provide unit testing
support which covers a different need: testing a component in isolation.
Zephyr provides a unit testing target (unit_testing) which is not related to
these bsim boards.
- Integration tests on real HW: Allows testing with the real SW
components that may be too dependent on the exact HW particularities, and
possibly without any changes compared to the final solution.
As such can provide better integration coverage than simulation ins ome cases,
but at the expense of slower execution, needing the real HW setups,
test in general not being reproducible, and in many cases failures
not being easy to debug.
They otherwise serve a very similar purpose to simulation integration tests.
- Integration tests on workstation (what the POSIX arch and these boards enable)
- Using bsim boards: Allow testing the embedded SW (or a subset), including
the OS, models of peripherals etc. By testing them in conjunction,
it is possible to test the components interactions and their integration.
- Using bsim boards with the BabbleSim Physical layer simulation allows
testing how several devices would interact with each other.
For ex. how a left and a right earbud synchronize and exchange data and
audio over their radio link, and how they interact with a mobile phone.
- Using bsim boards, and the `EDTT`_ framework: With the EDTT framework we can
test the embedded code under test while controlling the test from external
python test scripts. This is supported by compiling the embedded code with
an special driver that handles the EDTT communication (its RPC transport)
and an embedded application that handles the RPC calls themselves, while
the python test scripts provide the test logic.
- Using Zephyr's :ref:`native_sim <native_sim>` board: It also allows integration testing of
the embedded code, but without any specific HW. In that way, many embedded
components which are dependent on the HW would not be suited for testing in
that platform. Just like the bsim boards, this Zephyr target board can
be used with or without Zephyr's ztest system and twister.
The :ref:`native_sim <native_sim>` board shares the :ref:`POSIX architecture<Posix arch>`,
and native simulator runner with the bsim boards.
- Zephyr's ztest infrastructure and Zephyr's twister:
Based on dedicated embedded test applications build with the code under test.
The embedded test application is responsible for driving the tests and check
the results on its own, and provide a test result to a PC which directs the
test.
Originally used as a framework for integration testing on target,
with a very dedicated test application,
these are fully supported with the bsim boards.
Design
******
Layering: Zephyr's arch, soc and board layers
=============================================
The basic architecture layering of these boards is as follows:
- The `native simulator`_ runner is used to execute the code in your host.
- The architecture, SOC and board components of Zephyr are replaced with
simulation specific ones.
- The architecture (arch) is the Zephyr :ref:`POSIX architecture<Posix arch>`
layer.
The SOC layer is `inf_clock`. And the board layer is dependent on
the specific device we are simulating.
- The POSIX architecture provides an adaptation from the Zephyr arch API
(which handles mostly the thread context switching) to the native simulator
CPU thread emulation.
See :ref:`POSIX arch architecture<posix_arch_architecture>`
- The SOC `inf_clock` layer provides an adaptation to the native simulator CPU "simulation"
and the handling of control between the "CPU simulation" (Zephyr threads) and the
HW models thread ( See `Threading`_ ).
- The board layer provides all SOC/ IC specific content, including
selecting the HW models which are built in the native simulator runner context, IRQ handling,
busy wait API (see :ref:`posix_busy_wait<posix_busy_wait>`), and Zephyr's printk backend.
Note that in a normal Zephyr target interrupt handling and a custom busy wait
would be provided by the SOC layer, but abusing Zephyr's layering, and for the
`inf_clock` layer to be generic, these were delegated to the board.
The board layer provides other test specific
functionality like bs_tests hooks, trace control, etc, and
by means of the native simulator, provides the :c:func:`main` entry point for the Linux
program, command line argument handling, and the overall time scheduling of
the simulated device.
Note that the POSIX arch and `inf_clock` soc expect a set of APIs being provided by
the board. This includes the busy wait API, a basic tracing API, the interrupt
controller and interrupt handling APIs, :c:func:`posix_exit`,
and :c:func:`posix_get_hw_cycle` (see :file:`posix_board_if.h` and :file:`posix_soc_if.h`).
.. figure:: layering_natsim.svg
:align: center
:alt: Zephyr layering in native & bsim builds
:figclass: align-center
Overall architecture in a Zephyr application in an embedded target vs a bsim
target
Important limitations and unsupported features
==============================================
All native and bsim boards share the same set of
:ref:`important limitations which<posix_arch_limitations>`
are inherited from the POSIX arch and `inf_clock` design.
Similarly, they inherit the POSIX architecture
:ref:`unsupported features set <posix_arch_unsupported>`.
.. _Threading:
Threading and overall scheduling of CPU and HW models
=====================================================
The threading description, as well as the general SOC and board architecture
introduced in
:ref:`POSIX arch architecture<posix_arch_architecture>` and on the
`native simulator design documentation`_ apply to the bsim boards.
Moreover in
`Architecture of HW models used for FW development and testing`_
a general introduction to the babblesim HW models and their scheduling are provided.
In case of the nRF bsim boards, more information can be found in the
`nRF HW models design documentation`_.
Time and the time_machine
=========================
Simulated time in bsim boards is in principle fully decoupled from
real wall-clock time. As described in
:ref:`POSIX arch architecture<posix_arch_architecture>`,
simulated time is advanced
as needed to the next scheduled HW event, and does not progress while
the simulated CPU is executing code.
In general simulation time will pass much faster than real time,
and the simulation results will not be affected in any way by the
load of the simulation host or by the process execution being "paused"
in a debugger or similar.
The native simulator HW scheduler provides the overall HW event time loop
required by the HW models, which consists of a very simple
"search for next event", "advance time to next event and execute it" loop,
together with an API for components that use it to inform about their events
timers having been updated. Events are defined at design time,
they are not registered dynamically for simplicity and speed.
Use of babblesim components: tracing, random number generation, logging activity
================================================================================
The same considerations as for the HW models apply to the bsim boards, see
`Architecture of HW models used for FW development and testing`_.
The communication between a Zephyr device and other simulated devices is
handled over the bsim libPhyCom libraries. For the radio activity the figure
below represents this communication:
.. figure:: Zephyr_and_bsim.svg
:align: center
:alt: Communication between a Zephyr device and other simulated devices
:figclass: align-center
Communication between a Zephyr device and other simulated devices
Test code may also communicate with other devices' test code using the bsim
backchannels. These provide a direct, reliable pipe between devices which test code
can use to exchange data.
About using Zephyr APIs
=======================
Note that even though part of the bsim board code is linked with the Zephyr kernel,
one should in general not call Zephyr APIs from the board code itself.
In particular, one should not call Zephyr APIs from the original/HW models
thread as the Zephyr code would be called from the wrong context,
and will with all likelihood cause all kind of difficult to debug issues.
In general board code should be considered as lower level than the Zephyr OS,
and not dependent on it.
For example, board code should not use the printk API as that anyhow would
result in a call back into the board code (the bsim specific printk backend)
which relies on the bs_trace API. Instead, for tracing the bs_trace API
should be used directly.
The same applies to other Zephyr APIs, including the entropy API, etc.
posix_print and nsi_print backends
==================================
The bsim board provides a backend for the ``posix_print`` API which is expected by the posix
ARCH and `inf_clock` code, and for the ``nsi_print`` API expected by the native simulator.
These simply route this API calls into the ``bs_trace`` bsim API.
Any message printed to these APIs, and by extension by default to Zephyr's ``printk``,
will be printed to the console (stdout) together with all other device messages.
.. _bsim_boards_bs_tests:
bs_tests
========
The bsim boards provide also the bs_tests facility.
This allows tests to be defined (registered), and for each of these tests to
use a number of special test hooks which are present only in these simulated
targets.
These tests are built together with the embedded SW, and are present in the
binary but will not be executed by default.
From the command line the user can query what tests are present, and select
which test (if any) should be executed. When a test is selected its registered
callbacks are assigned to the respective hooks.
There is a set of one time hooks at different levels of initialization of the HW
and Zephyr OS, a hook to process possible command line arguments, and, a hook
that can be used to sniff or capture interrupts.
`bs_tests` also provides a hook which will be called from the embedded application
:c:func:`main`, but this will only work if the main application supports it,
that is, if the main app is a version for simulation which calls
:c:func:`bst_main` when running in the bsim board.
Apart from these hooks, the `bs_tests` system provides facilities to build a
dedicated test "task". This will be executed in the HW models thread context,
but will have access to all SW variables. This task will be driven with a
special timer which can be configured to produce either periodic or one time
ticks. When these ticks occur a registered test tick function will be called.
This can be used to support the test logic, like run checks or perform actions
at specific points in time. This can be combined with Babblesim's tb_defs macros
to build quite complex test tasks which can wait for a given amount of time,
for conditions to be fulfilled, etc.
Note when writing the tests with `bs_tests` one needs to be aware that other
bs tests will probably be built with the same application, and that therefore
the tests should not be registering initialization or callback functions using
NATIVE_TASKS or Zephyr's PRE/POST kernel driver initialization APIs as this
will execute even if the test is not selected.
Instead the equivalent `bs_tests` provided hooks should be used.
Note also that, for AMP targets like the :ref:`nrf5340bsim <nrf5340bsim>`, each embedded MCU has
its own separate `bs_tests` built with that MCU. You can select if and what test is used
for each MCU separatedly with the command line options.
Command line argument parsing
=============================
bsim boards need to handle command line arguments. There are several sets of
arguments:
- Basic arguments: to enable selecting things like trace verbosity, random seed,
simulation device number and simulation id (when connected to a phy), etc.
This follow as much as possible the same convention as other bsim
devices to ease use for developers.
- The HW models command line arguments: The HW models will expose which
arguments they need to have processed, but the bsim board as actual
integrating program ensures they are handled.
- Test (bs_tests) control: To select a test for each embedded CPU,
print which are available, and pass arguments to the tests themselves.
Command line argument parsing is handled by using the bs_cmd_line component
from Babblesim's base/libUtilv1 library. And basic arguments definitions that
comply with the expected convention are provided in bs_cmd_line_typical.h.
Other considerations
====================
- Endianness: Code will be built for the host target architecture, which is
typically x86. x86 is little endian, which is typically also the case for the
target architecture. If this is not the case, embedded code which works in one
may not work in the other due to endianness bugs.
Note that Zephyr code is be written to support both big and little endian.
- WordSize: The bsim targets, as well as normal embedded targets are 32 bit
targets. In the case of the bsim targets this is done by explicitly targeting
x86 (ILP32 ABI) instead of x86_64. This is done purposefully to provide more
accurate structures layout in memory and therefore better reproduce possible
issues related to access to structures members or array overflows.
``` | /content/code_sandbox/boards/native/doc/bsim_boards_design.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 3,609 |
```restructuredtext
.. _boards-technexion:
TECHNEXION
##########
.. toctree::
:maxdepth: 1
:glob:
**/*
``` | /content/code_sandbox/boards/technexion/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 36 |
```unknown
config BOARD_PICO_PI
select SOC_PART_NUMBER_MCIMX7D7DVM10SC
select SOC_MCIMX7D_M4 if BOARD_PICO_PI_MCIMX7D_M4
``` | /content/code_sandbox/boards/technexion/pico_pi/Kconfig.pico_pi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 45 |
```unknown
/*
*
*/
/dts-v1/;
#include <nxp/nxp_imx7d_m4.dtsi>
#include "pico_pi-pinctrl.dtsi"
/ {
model = "Pico-Pi IMX7D board";
compatible = "nxp,mcimx7d_m4";
aliases {
uart-6 = &uart6;
};
chosen {
zephyr,flash = &tcml_code;
zephyr,sram = &tcmu_sys;
zephyr,console = &uart6;
zephyr,shell-uart = &uart6;
};
};
&uart2 {
pinctrl-0 = <&uart2_default>;
pinctrl-names = "default";
};
&uart5 {
pinctrl-0 = <&uart5_default>;
pinctrl-names = "default";
};
&uart6 {
status = "okay";
current-speed = <115200>;
modem-mode = <0>;
pinctrl-0 = <&uart6_default>;
pinctrl-names = "default";
};
&i2c1 {
pinctrl-0 = <&i2c1_default>;
pinctrl-names = "default";
};
&i2c2 {
pinctrl-0 = <&i2c2_default>;
pinctrl-names = "default";
};
&i2c3 {
pinctrl-0 = <&i2c3_default>;
pinctrl-names = "default";
};
&i2c4 {
pinctrl-0 = <&i2c4_default>;
pinctrl-names = "default";
};
``` | /content/code_sandbox/boards/technexion/pico_pi/pico_pi_mcimx7d_m4.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 348 |
```unknown
#
#
#
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
CONFIG_CONSOLE=y
CONFIG_XIP=y
CONFIG_GPIO=n
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/technexion/pico_pi/pico_pi_mcimx7d_m4_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 38 |
```yaml
#
#
#
identifier: pico_pi/mcimx7d/m4
name: Pico-Pi IMX7D
type: mcu
arch: arm
ram: 32
flash: 32
toolchain:
- zephyr
- gnuarmemb
- xtools
testing:
ignore_tags:
- net
- bluetooth
vendor: nxp
``` | /content/code_sandbox/boards/technexion/pico_pi/pico_pi_mcimx7d_m4.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 88 |
```yaml
board:
name: pico_pi
vendor: technexion
socs:
- name: mcimx7d
``` | /content/code_sandbox/boards/technexion/pico_pi/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 30 |
```unknown
/*
*
*/
#include <nxp/nxp_imx7d_m4.dtsi>
#include <nxp/nxp_imx/mimx7d-pinctrl.dtsi>
&pinctrl {
uart2_default: uart2_default {
group0 {
pinmux = <&mx7d_pad_uart2_rx_data__uart2_dce_rx>,
<&mx7d_pad_uart2_tx_data__uart2_dce_tx>;
bias-pull-up;
bias-pull-up-value = "100k";
input-schmitt-enable;
slew-rate = "slow";
drive-strength = "x1";
};
};
uart5_default: uart5_default {
group0 {
pinmux = <&mx7d_pad_i2c4_scl__uart5_dce_rx>,
<&mx7d_pad_i2c4_sda__uart5_dce_tx>;
bias-pull-up;
bias-pull-up-value = "100k";
input-schmitt-enable;
slew-rate = "slow";
drive-strength = "x1";
};
};
uart6_default: uart6_default {
group0 {
pinmux = <&mx7d_pad_epdc_data08__uart6_dce_rx>,
<&mx7d_pad_epdc_data09__uart6_dce_tx>;
bias-pull-up;
bias-pull-up-value = "100k";
input-schmitt-enable;
slew-rate = "slow";
drive-strength = "x1";
};
};
i2c1_default: i2c1_default {
group0 {
pinmux = <&mx7d_pad_uart1_rx_data__i2c1_scl>,
<&mx7d_pad_uart1_tx_data__i2c1_sda>;
bias-pull-up;
bias-pull-up-value = "100k";
input-schmitt-enable;
slew-rate = "slow";
drive-strength = "x1";
input-enable;
};
};
i2c2_default: i2c2_default {
group0 {
pinmux = <&mx7d_pad_i2c2_scl__i2c2_scl>,
<&mx7d_pad_i2c2_sda__i2c2_sda>;
bias-pull-up;
bias-pull-up-value = "100k";
input-schmitt-enable;
slew-rate = "slow";
drive-strength = "x1";
input-enable;
};
};
i2c3_default: i2c3_default {
group0 {
pinmux = <&mx7d_pad_i2c3_scl__i2c3_scl>,
<&mx7d_pad_i2c3_sda__i2c3_sda>;
bias-pull-up;
bias-pull-up-value = "100k";
input-schmitt-enable;
slew-rate = "slow";
drive-strength = "x1";
input-enable;
};
};
i2c4_default: i2c4_default {
group0 {
pinmux = <&mx7d_pad_sai1_rx_sync__i2c4_scl>,
<&mx7d_pad_sai1_rx_bclk__i2c4_sda>;
bias-pull-up;
bias-pull-up-value = "100k";
input-schmitt-enable;
slew-rate = "slow";
drive-strength = "x1";
input-enable;
};
};
};
``` | /content/code_sandbox/boards/technexion/pico_pi/pico_pi-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 810 |
```restructuredtext
.. _Posix arch:
The POSIX architecture
######################
.. contents::
:depth: 1
:backlinks: entry
:local:
Overview
********
The POSIX architecture, in combination with the inf_clock SOC layer,
provides the foundation, architecture and SOC layers for a set of virtual test
boards.
Using these, a Zephyr application can be compiled together with
the Zephyr kernel, creating a normal executable that runs as
a native application on the host OS, without emulation. Instead,
you use native host tools for compiling, debugging, and analyzing your
Zephyr application, eliminating the need for architecture-specific
target hardware in the early phases of development.
.. note::
The POSIX architecture is not related and should not be confused with the
:ref:`POSIX OS abstraction<posix_support>`.
The latter provides an adaptation shim that enables running applications
which require POSIX APIs on Zephyr.
Types of POSIX arch based boards
================================
Today there are two types of POSIX boards:
:ref:`native_sim<native_sim>`, and the :ref:`bsim boards<bsim boards>`.
While they share the main objectives and principles, the first is intended as
a HW agnostic test platform which in some cases utilizes the host OS
peripherals, while the second intend to simulate a particular HW platform,
with focus on their radio (e.g. BT LE) and utilize the `BabbleSim`_ physical layer
simulation and framework, while being fully decoupled of the host.
.. _BabbleSim:
path_to_url
.. _posix_arch_deps:
Host system dependencies
========================
This port is designed and tested to run in Linux.
.. note::
You must have the 32-bit C library installed in your system
(in Ubuntu 16.04 install the gcc-multilib package)
.. note::
The POSIX architecture is known to **not** work on macOS due to
fundamental differences between macOS and other typical Unixes.
.. note::
The 32 bit version of this port does not directly work in Windows Subsystem
for Linux (WSL) because WSL does not support native 32-bit binaries.
You may want to consider WSL2, or, if using :ref:`native_sim <native_sim>`,
you can also just use the ``native_sim/native/64``
target: Check :ref:`32 and 64bit versions<native_sim32_64>`.
Otherwise `with some tinkering
<path_to_url#issuecomment-374904520>`_ it
should be possible to make it work.
.. _posix_arch_limitations:
Important limitations
*********************
The underlying assumptions behind this port set some limitations on what
can and cannot be done.
These limitations are due to the code executing natively in
the host CPU without any instrumentation or means to interrupt it unless the
simulated CPU is sleeping.
You can imagine the code executes in a simulated CPU
which runs at an infinitely fast clock: No time passes while the CPU is
running.
Therefore interrupts, including timer interrupts, will not arrive
while code executes, except immediately after the SW enables or unmasks
them if they were pending.
This behavior is intentional, as it provides a deterministic environment to
develop and debug.
For more information please see the
`Rationale for this port`_ and :ref:`Architecture<posix_arch_architecture>`
sections
Therefore these limitations apply:
- There can **not** be busy wait loops in the application code that wait for
something to happen without letting the CPU sleep.
If busy wait loops do exist, they will behave as infinite loops and
will stall the execution. For example, the following busy wait loop code,
which could be interrupted on actual hardware, will stall the execution of
all threads, kernel, and HW models:
.. code-block:: c
while (1){}
Similarly the following code where we expect ``condition`` to be
updated by an interrupt handler or another thread, will also stall
the application when compiled for this port.
.. code-block:: c
volatile condition = true;
while (condition){}
- Code that depends on its own execution speed will normally not
work as expected. For example, code such as shown below, will likely not
work as expected:
.. code-block:: c
peripheral_x->run = true;
/* Wait for a number of CPU cycles */
for (int i = 0; i < 100; i++) NOP;
/* We expect the peripheral done and ready to do something else */
- This port is not meant to, and could not possibly help debug races between
HW and SW, or similar timing related issues.
- You may not use hard coded memory addresses because there is no I/O or
MMU emulation.
Working around these limitations
================================
If a busy wait loop exists, it will become evident as the application will be
stalled in it. To find the loop, you can run the binary in a debugger and
pause it after the execution is stuck; it will be paused in
some part of that loop.
The best solution is to remove that busy wait loop, and instead use
an appropriate kernel primitive to synchronize your threads.
Note that busy wait loops are in general a bad coding practice as they
keep the CPU executing and consuming power.
If removing the busy loop is really not an option, you may add a conditionally
compiled call to :c:func:`k_cpu_idle` if you are waiting for an
interrupt, or a call to :c:func:`k_busy_wait` with some small delay in
microseconds.
In the previous example, modifying the code as follows would work:
.. code-block:: c
volatile condition = true;
while (condition) {
#if defined(CONFIG_ARCH_POSIX)
k_cpu_idle();
#endif
}
.. _posix_arch_unsupported:
Significant unsupported features
********************************
Currently, these are the most significant features which are not supported in this architecture:
* :ref:`User mode/userspace <usermode_api>`: When building for these targets,
:kconfig:option:`CONFIG_USERSPACE` will always be disabled,
and all calls into the kernel will be done as normal calls.
* Stack checks: :kconfig:option:`CONFIG_HW_STACK_PROTECTION`,
:kconfig:option:`CONFIG_STACK_CANARIES`, and
:kconfig:option:`CONFIG_THREAD_ANALYZER`.
This is due to how Zephyr allocated threads' stacks are not `actually` being used like they are
in other architectures. Check
:ref:`the architecture section's architecture layer paragraph <posix_arch_design_archl>`
for more information.
.. _posix_arch_rationale:
Rationale for this port
***********************
The main intents of this port are:
- Allow functional debugging, instrumentation and analysis of the code with
native tooling.
- Allow functional regression testing, and simulations in which we have the
full functionality of the code.
- Run tests fast: several minutes of simulated time per wall time second.
- Possibility to connect to external tools which may be able to run much
faster or much slower than real time.
- Deterministic, repeatable runs:
There must not be any randomness or indeterminism (unless host peripherals
are used).
The result must **not** be affected by:
- Debugging or instrumenting the code.
- Pausing in a breakpoint and continuing later.
- The host computer performance or its load.
The aim of this port is not to debug HW/SW races, missed HW programming
deadlines, or issues in which an interrupt comes when it was not expected.
Normally those would be debugged with a cycle accurate Instruction Set Simulator
(ISS) or with a development board.
.. _posix_arch_compare:
Comparison with other options
*****************************
This port does not try to replace cycle accurate instruction set simulators
(ISS), development boards, or QEMU, but to complement them. This port's main aim
is to meet the targets described in the previous `Rationale for this port`_
section.
.. figure:: Port_vs_QEMU_vs.svg
:align: center
:alt: Comparison of different debugging targets
:figclass: align-center
Comparison of different debugging options. Note that realism has many
dimensions: Having the real memory map or emulating the exact time an
instruction executes is just some of it; Emulating peripherals accurately
is another side.
This native port compiles your code directly for the host architecture
(typically x86), with no instrumentation or
monitoring code. Your code executes directly in the host CPU. That is, your code
executes just as fast as it possibly can.
Simulated time is normally decoupled from real host time.
The problem of how to emulate the instruction execution speed is solved
by assuming that code executes in zero simulated time.
There is no I/O or MMU emulation. If you try to access memory through hardcoded
addresses your binary will simply segfault.
The drivers and HW models for this architecture will hide this from the
application developers when it relates to those peripherals.
In general this port is not meant to help developing low level drivers for
target HW. But for developing application code.
Your code can be debugged, instrumented, or analyzed with all normal native
development tools just like any other Linux application.
Execution is fully reproducible, you can pause it without side-effects.
How does this port compare to QEMU:
===================================
With QEMU you compile your image targeting the board which is closer to
your desired board. For example an ARM based one. QEMU emulates the real memory
layout of the board, loads the compiled binary and through instructions
translation executes that ARM targeted binary on the host CPU.
Depending on configuration, QEMU also provides models of some peripherals
and, in some cases, can expose host HW as emulated target peripherals.
QEMU cannot provide any emulation of execution speed. It simply
executes code as fast as it can, and lets the host CPU speed determine the
emulated CPU speed. This produces highly indeterministic behavior,
as the execution speed depends on the host system performance and its load.
As instructions are translated to the host architecture, and the target CPU and
MMU are emulated, there is a performance penalty.
You can connect gdb to QEMU, but have few other instrumentation abilities.
Execution is not reproducible. Some bugs may be triggered only in some runs
depending on the computer and its load.
How does this port compare to an ISS:
======================================
With a cycle accurate instruction set simulator you compile targeting either
your real CPU/platform or a close enough relative. The memory layout is modeled
and some or all peripherals too.
The simulator loads your binary, slowly interprets each instruction, and
accounts for the time each instruction takes.
Time is simulated and is fully decoupled from real time.
Simulations are on the order of 10 to 100 times slower than real time.
Some instruction set simulators work with gdb, and may
provide some extra tools for analyzing your code.
Execution is fully reproducible. You can normally pause your execution without
side-effects.
.. _posix_arch_architecture:
Architecture and design
***********************
.. figure:: layering.svg
:align: center
:alt: Zephyr layering in native build
:figclass: align-center
Zephyr layering when built against an embedded target (left), and
targeting a POSIX arch based board (right)
.. _posix_arch_design_archl:
Arch layer
==========
In this architecture each Zephyr thread is mapped to one POSIX pthread.
The POSIX architecture emulates a single threaded CPU/MCU by only allowing
one SW thread to execute at a time, as commanded by the Zephyr kernel.
Whenever the Zephyr kernel desires to context switch two threads,
the POSIX arch blocks and unblocks the corresponding pthreads.
This architecture provides the same interface to the Kernel as other
architectures and is therefore transparent for the application.
When using this architecture, the code is compiled natively for the host system,
and typically as a 32-bit binary assuming pointer and integer types are 32-bits
wide.
Note that all threads use a normal Linux pthread stack, and do not use
the Zephyr thread stack allocation for their call stacks or automatic
variables. The Zephyr stacks (which are allocated in "static memory") are
only used by the POSIX architecture for thread bookkeeping.
SOC and board layers
====================
.. note::
This description applies to all current POSIX arch based boards on tree,
but it is not a requirement for another board to follow what is described here.
When the executable process is started (that is the board
:c:func:`main`, which is the linux executable C :c:func:`main`),
first, early initialization steps are taken care of
(command line argument parsing, initialization of the HW models, etc).
After, the "CPU simulation" is started, by creating a new pthread
and provisionally blocking the original thread. The original thread will only
be used for HW models after this;
while this newly created thread will be the first "SW" thread and start
executing the boot of the embedded code (including the POSIX arch code).
During this MCU boot process, the Zephyr kernel will be initialized and
eventually this will call into the embedded application `main()`,
just like in the embedded target.
As the embedded SW execution progresses, more Zephyr threads may be spawned,
and for each the POSIX architecture will create a dedicated pthread.
Eventually the simulated CPU will be put to sleep by the embedded SW
(normally when the boot is completed). This whole simulated CPU boot,
until the first time it goes to sleep happens in 0 simulated time.
At this point the last executing SW pthread will be blocked,
and the first thread (reserved for the HW models now) will be allowed
to execute again. This thread will, from now on, be the one handling both the
HW models and the device simulated time.
The HW models are designed around timed events,
and this thread will check what is the next
scheduled HW event, advance simulated time until that point, and call the
corresponding HW model event function.
Eventually one of these HW models will raise an interrupt to the
simulated CPU. When the IRQ controller wants to wake the simulated
CPU, the HW thread is blocked, and the simulated CPU is awakened by
letting the last SW thread continue executing.
This process of getting the CPU to sleep, letting the HW models run,
and raising an interrupt which wake the CPU again is repeated until the end
of the simulation, where the CPU execution always takes 0 simulated time.
When a SW thread is awakened by an interrupt, it will be made to enter the
interrupt handler by the soc_inf code.
If the SW unmasks a pending interrupt while running, or triggers a SW
interrupt, the interrupt controller may raise the interrupt immediately
depending on interrupt priorities, masking, and locking state.
Interrupts are executed in the context (and using the stack) of the SW
thread in which they are received. Meaning, there is no dedicated thread or
stack for interrupt handling.
To ensure determinism when the Zephyr code is running,
and to ease application debugging,
the board uses a different time than real time: simulated time.
How and if simulated time relates to the host time, is up to the simulated
board.
The Zephyr application sees the code executing as if the CPU were running at
an infinitely fast clock, and fully decoupled from the underlying host CPU
speed.
No simulated time passes while the application or kernel code execute.
.. _posix_busy_wait:
Busy waits
==========
Busy waits work thanks to provided board functionality.
This does not need to be the same for all boards, but both native_sim and the
nrf52_bsim board work similarly thru the combination of a board specific
`arch_busy_wait()` and a special fake HW timer (provided by the board).
When a SW thread wants to busy wait, this fake timer will be programmed in
the future time corresponding to the end of the busy wait and the CPU will
be put immediately to sleep in the busy_wait caller context.
When this fake HW timer expires the CPU will be waken with a special
non-maskable phony interrupt which does not have a corresponding interrupt
handler but will resume the busy_wait SW execution.
Note that other interrupts may arrive while the busy wait is in progress,
which may delay the `k_busy_wait()` return just like in real life.
Interrupts may be locked out or masked during this time, but the special
fake-timer non-maskable interrupt will wake the CPU nonetheless.
NATIVE_TASKS
============
The soc_inf layer provides a special type of hook called the NATIVE_TASKS.
These allow registering (at build/link time) functions which will be called
at different stages during the process execution: Before command line parsing
(so dynamic command line arguments can be registered using this hook),
before initialization of the HW models, before the simulated CPU is started,
after the simulated CPU goes to sleep for the first time,
and when the application exists.
``` | /content/code_sandbox/boards/native/doc/arch_soc.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 3,623 |
```restructuredtext
.. _boards-croxel:
Croxel
######
.. toctree::
:maxdepth: 1
:glob:
**/*
``` | /content/code_sandbox/boards/croxel/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 34 |
```unknown
# Enable MPU
CONFIG_ARM_MPU=y
# Enable hardware stack protection
CONFIG_HW_STACK_PROTECTION=y
# enable GPIO
CONFIG_GPIO=y
# Assume we start console by default
CONFIG_USB_DEVICE_INITIALIZE_AT_BOOT=y
# Console over USB CDC-ACM
CONFIG_USB_DEVICE_STACK=y
CONFIG_SERIAL=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_UART_INTERRUPT_DRIVEN=y
CONFIG_UART_LINE_CTRL=y
``` | /content/code_sandbox/boards/croxel/croxel_cx1825/croxel_cx1825_nrf52840_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 91 |
```cmake
board_runner_args(jlink "--device=nRF52840_xxAA" "--speed=4000")
board_runner_args(pyocd "--target=nrf52840" "--frequency=4000000")
include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
include(${ZEPHYR_BASE}/boards/common/nrfutil.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/openocd-nrf5.board.cmake)
``` | /content/code_sandbox/boards/croxel/croxel_cx1825/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 130 |
```unknown
config BOARD_CROXEL_CX1825
select SOC_NRF52840_QIAA
``` | /content/code_sandbox/boards/croxel/croxel_cx1825/Kconfig.croxel_cx1825 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 23 |
```cmake
# Suppress "unique_unit_address_if_enabled" to handle the following overlaps:
# - power@40000000 & clock@40000000 & bprot@40000000
# - acl@4001e000 & flash-controller@4001e000
list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled")
``` | /content/code_sandbox/boards/croxel/croxel_cx1825/pre_dt_board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 72 |
```restructuredtext
.. _pico_pi:
Pico-Pi i.MX7D - Android Things IoT Development Platform
#############################################################
Overview
********
The i.MX7D SoC is a Hybrid multi-core processor composed of Single Cortex A7
core and Single Cortex M4 core.
Zephyr was ported to run on the M4 core. In a later release, it will also
communicate with the A7 core (running Linux) via RPmsg.
.. image:: pico_pi.jpg
:align: center
:alt: Pico-Pi i.MX7D
Hardware
********
The Pico-Pi Platform is composed of a CPU and IO board.
Pico-Pi IO Board
================
- S1 - On/Off (MX7_ONOFF signal)
- Board to board connector : Edison compatible connector (70 configurable pins)
- mikroBUS expansion connector ADC, GPIO, IC, PWM, SPI, UART)
- 10-pin needle JTAG Connector
- Debug USB exposing One UART
- MIPI DSI 1 lane Connector
- LCD Touch Connector
- Audio Jack: Mic and Stereo Headphone
Pico-Pi CPU Board
=================
- CPU i.MX7 Dual with a Single Cortex A7 (1 GHz) core and
Single Cortex M4 (200MHz) core
- Memory
- RAM -> A7: 4GB
- RAM -> M4: 3x32KB (TCML, TCMU, OCRAM_S), 1x128KB (OCRAM) and 1x256MB (DDR)
- Flash -> A7: 8GB eMMC
For more information about the i.MX7 SoC and Pico-Pi i.MX7D, see these references:
- `i.MX 7 Series Website`_
- `i.MX 7 Dual Datasheet`_
- `i.MX 7 Dual Reference Manual`_
Supported Features
==================
The Pico-Pi i.MX7D configuration supports the following hardware features on the
Cortex M4 Core:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
The default configuration can be found in the defconfig file:
:zephyr_file:`boards/technexion/pico_pi/pico_pi_mcimx7d_m4_defconfig`
Other hardware features are not currently supported by the port.
Connections and IOs
===================
The Pico-Pi board Board was tested with the following pinmux controller
configuration.
+---------------+---------------------+--------------------------------+
| Board Name | SoC Name | Usage |
+===============+=====================+================================+
| UART_TX232 | UART1_TX | UART Console |
+---------------+---------------------+--------------------------------+
| UART_RX232 | UART1_RX | UART Console |
+---------------+---------------------+--------------------------------+
| RX_E | UART6_TX | UART (mikroBUS and Edison) |
+---------------+---------------------+--------------------------------+
| TX_E | UART6_RX | UART (mikroBUS and Edison) |
+---------------+---------------------+--------------------------------+
| I2CX_SDA_3V | I2C1_SDA | I2C (mikroBUS and Edison) |
+---------------+---------------------+--------------------------------+
| I2CX_SCL_3V | I2C1_SCL | I2C (mikroBUS and Edison) |
+---------------+---------------------+--------------------------------+
System Clock
============
The M4 Core is configured to run at a 200 MHz clock speed.
Serial Port
===========
The iMX7D SoC has seven UARTs. The number 6 is configured for the console and
the number 2 is used in the mikroBUS connector.
Programming and Debugging
*************************
The Pico-Pi i.MX7D doesn't have QSPI flash for the M4 and it needs to be started by
the A7 core. The A7 core is responsible to load the M4 binary application into
the RAM, put the M4 in reset, set the M4 Program Counter and Stack Pointer, and
get the M4 out of reset.
The A7 can perform these steps at bootloader level or after the Linux system
has booted.
The M4 can use up to 5 different RAMs. These are the memory mapping for A7 and
M4:
+------------+-----------------------+------------------------+-----------------------+----------------------+
| Region | Cortex-A7 | Cortex-M4 (System Bus) | Cortex-M4 (Code Bus) | Size |
+============+=======================+========================+=======================+======================+
| DDR | 0x80000000-0xFFFFFFFF | 0x80000000-0xDFFFFFFF | 0x10000000-0x1FFEFFFF | 2048MB (less for M4) |
+------------+-----------------------+------------------------+-----------------------+----------------------+
| OCRAM | 0x00900000-0x0091FFFF | 0x20200000-0x2021FFFF | 0x00900000-0x0091FFFF | 128KB |
+------------+-----------------------+------------------------+-----------------------+----------------------+
| TCMU | 0x00800000-0x00807FFF | 0x20000000-0x20007FFF | | 32KB |
+------------+-----------------------+------------------------+-----------------------+----------------------+
| TCML | 0x007F8000-0x007FFFFF | | 0x1FFF8000-0x1FFFFFFF | 32KB |
+------------+-----------------------+------------------------+-----------------------+----------------------+
| OCRAM_S | 0x00180000-0x00187FFF | 0x20180000-0x20187FFF | 0x00000000-0x00007FFF | 32KB |
+------------+-----------------------+------------------------+-----------------------+----------------------+
References
==========
- `i.MX 7 Dual Reference Manual`_ from page 182 (section 2.1.2 and 2.1.3)
- `Toradex Wiki`_
At compilation time you have to choose which RAM will be used. This
configuration is done in the file :zephyr_file:`boards/technexion/pico_pi/pico_pi_mcimx7d_m4.dts` with
"zephyr,flash" (when CONFIG_XIP=y) and "zephyr,sram" properties. The available
configurations are:
.. code-block:: none
"zephyr,flash"
- &ddr_code
- &tcml_code
- &ocram_code
- &ocram_s_code
- &ocram_pxp_code
- &ocram_epdc_code
"zephyr,sram"
- &ddr_sys
- &tcmu_sys
- &ocram_sys
- &ocram_s_sys
- &ocram_pxp_sys
- &ocram_epdc_sys
Below you will find the instructions to load and run Zephyr on M4 from A7 using
u-boot.
Connect both micro USB interfaces into the PC. This is the A7 console and the
UART6 in the Edison connector is M4 console for Zephyr with both configured to work at 115200 8N1.
The USB interface is used to power the CPU and IO boards and is connected
to the USB OTG interface of the i.MX7D.
After powering up the platform stop the u-boot execution on the A7 core and
expose the eMMC as mass storage with the following command in the u-boot
prompt: ``ums 0 mmc 0``. Copy the compiled zephyr.bin to the first FAT
partition and remove the mounted device on the PC by issuing a "Ctrl+C" in the
u-boot prompt.
Set the u-boot environment variables and run the zephyr.bin from the
appropriated memory configured in the Zephyr compilation:
.. code-block:: console
setenv bootm4 'fatload mmc 0:1 $m4addr $m4fw && dcache flush && bootaux $m4addr'
# TCML
setenv m4tcml 'setenv m4fw zephyr.bin; setenv m4addr 0x007F8000'
setenv bootm4tcml 'run m4tcml && run bootm4'
run bootm4tcml
# TCMU
setenv m4tcmu 'setenv m4fw zephyr.bin; setenv m4addr 0x00800000'
setenv bootm4tcmu 'run m4tcmu && run bootm4'
run bootm4tcmu
# OCRAM
setenv m4ocram 'setenv m4fw zephyr.bin; setenv m4addr 0x00900000'
setenv bootm4ocram 'run m4ocram && run bootm4'
run bootm4ocram
# OCRAM_S
setenv m4ocrams 'setenv m4fw zephyr.bin; setenv m4addr 0x00180000'
setenv bootm4ocrams 'run m4ocrams && run bootm4'
run bootm4ocrams
# DDR
setenv m4ddr 'setenv m4fw zephyr.bin; setenv m4addr 0x80000000'
setenv bootm4ddr 'run m4ddr && run bootm4'
run bootm4ddr
:ref:`build_an_application` and :ref:`application_run` for more details).
References
==========
- `Loading Code on Cortex-M4 from Linux for the i.MX 6SoloX and i.MX 7Dual/7Solo Application Processors`_
- `J-Link iMX7D Instructions`_
.. _i.MX 7 Series Website:
path_to_url
.. _i.MX 7 Dual Datasheet:
path_to_url
.. _i.MX 7 Dual Reference Manual:
path_to_url
.. _J-Link Tools:
path_to_url#J-LinkSoftwareAndDocumentationPack
.. _NXP iMX7D Connect CortexM4.JLinkScript:
path_to_url
.. _Loading Code on Cortex-M4 from Linux for the i.MX 6SoloX and i.MX 7Dual/7Solo Application Processors:
path_to_url
.. _J-Link iMX7D Instructions:
path_to_url
.. _Toradex Wiki:
path_to_url#Memory_areas
``` | /content/code_sandbox/boards/technexion/pico_pi/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,475 |
```yaml
identifier: croxel_cx1825/nrf52840
name: Croxel-CX1825-NRF52840
type: mcu
arch: arm
ram: 256
flash: 1024
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- ble
- counter
- gpio
- i2c
- watchdog
vendor: croxel
``` | /content/code_sandbox/boards/croxel/croxel_cx1825/croxel_cx1825_nrf52840.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 100 |
```yaml
board:
name: croxel_cx1825
vendor: croxel
socs:
- name: nrf52840
``` | /content/code_sandbox/boards/croxel/croxel_cx1825/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 34 |
```unknown
if BOARD_CROXEL_CX1825
config BT_CTLR
default BT
if LOG
# Logger cannot use itself to log
choice USB_CDC_ACM_LOG_LEVEL_CHOICE
default USB_CDC_ACM_LOG_LEVEL_OFF
endchoice
endif # LOG
endif # BOARD_CROXEL_CX1825
``` | /content/code_sandbox/boards/croxel/croxel_cx1825/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 72 |
```unknown
/*
*
*/
/dts-v1/;
#include <nordic/nrf52840_qiaa.dtsi>
#include "croxel_cx1825_nrf52840-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "Croxel CX1825 NRF52840";
compatible = "croxel,cx1825-nrf52840";
chosen {
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,console = &cdc_acm_0;
zephyr,shell-uart = &cdc_acm_0;
};
leds {
compatible = "gpio-leds";
led0: led_0 {
gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
label = "Red LED";
};
led1: led_1 {
gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
label = "Green LED";
};
};
buttons {
compatible = "gpio-keys";
button0: button_0 {
gpios = <&gpio0 16 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "Push button switch 0";
zephyr,code = <INPUT_KEY_0>;
};
};
/* These aliases are provided for compatibility with samples */
aliases {
led0 = &led0;
led1 = &led1;
sw0 = &button0;
bootloader-led0 = &led0;
mcuboot-button0 = &button0;
mcuboot-led0 = &led0;
watchdog0 = &wdt0;
dht0 = &hts221;
accel0 = &lis3dh;
prox-sensor0 = &apds9960;
};
};
®0 {
status = "okay";
};
®1 {
regulator-initial-mode = <NRF5X_REG_MODE_DCDC>;
};
&adc {
status = "okay";
};
&uicr {
gpio-as-nreset;
};
&gpiote {
status = "okay";
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&pwm0 {
status = "okay";
pinctrl-0 = <&pwm0_default>;
pinctrl-1 = <&pwm0_sleep>;
pinctrl-names = "default", "sleep";
};
&i2c0 {
compatible = "nordic,nrf-twi";
status = "okay";
pinctrl-0 = <&i2c0_default>;
pinctrl-1 = <&i2c0_sleep>;
pinctrl-names = "default", "sleep";
hts221: hts221@5f {
compatible = "st,hts221";
status = "okay";
reg = <0x5f>;
drdy-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
};
lps22hb: lps22hb-press@5c {
compatible = "st,lps22hb-press";
status = "okay";
reg = <0x5c>;
};
apds9960: apds9960@39 {
compatible = "avago,apds9960";
status = "okay";
reg = <0x39>;
int-gpios = <&gpio0 4 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
};
lis3dh: lis3dh@18 {
compatible = "st,lis3dh", "st,lis2dh";
status = "okay";
reg = <0x18>;
irq-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
};
};
zephyr_udc0: &usbd {
compatible = "nordic,nrf-usbd";
status = "okay";
cdc_acm_0: cdc_acm_0 {
compatible = "zephyr,cdc-acm-uart";
};
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 0x0000C000>;
};
slot0_partition: partition@c000 {
label = "image-0";
reg = <0x0000C000 0x00076000>;
};
slot1_partition: partition@82000 {
label = "image-1";
reg = <0x00082000 0x00076000>;
};
/*
* Storage partition will be used by FCB/LittleFS/NVS
* if enabled.
*/
storage_partition: partition@f8000 {
label = "storage";
reg = <0x000f8000 0x00008000>;
};
};
};
``` | /content/code_sandbox/boards/croxel/croxel_cx1825/croxel_cx1825_nrf52840.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,120 |
```unknown
/*
*/
&pinctrl {
i2c0_default: i2c0_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 27)>,
<NRF_PSEL(TWIM_SCL, 0, 26)>;
};
};
i2c0_sleep: i2c0_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 27)>,
<NRF_PSEL(TWIM_SCL, 0, 26)>;
low-power-enable;
};
};
pwm0_default: pwm0_default {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 1, 8)>;
};
};
pwm0_sleep: pwm0_sleep {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 1, 8)>;
low-power-enable;
};
};
};
``` | /content/code_sandbox/boards/croxel/croxel_cx1825/croxel_cx1825_nrf52840-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 220 |
```restructuredtext
.. _boards-hardkernel:
HardKernel
##########
.. toctree::
:maxdepth: 1
:glob:
**/*
``` | /content/code_sandbox/boards/hardkernel/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```unknown
/*
*
*/
#include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
#include <dt-bindings/pinctrl/esp32-pinctrl.h>
#include <zephyr/dt-bindings/pinctrl/esp32-gpio-sigmap.h>
&pinctrl {
uart0_default: uart0_default {
group1 {
pinmux = <UART0_TX_GPIO1>;
output-high;
};
group2 {
pinmux = <UART0_RX_GPIO3>;
bias-pull-up;
};
};
spim3_default: spim3_default {
group1 {
pinmux = <SPIM3_MISO_GPIO19>,
<SPIM3_SCLK_GPIO18>,
<SPIM3_CSEL_GPIO5>,
<SPIM3_CSEL1_GPIO22>;
};
group2 {
pinmux = <SPIM3_MOSI_GPIO23>;
output-low;
};
};
i2c0_default: i2c0_default {
group1 {
pinmux = <I2C0_SDA_GPIO4>,
<I2C0_SCL_GPIO15>;
bias-pull-up;
drive-open-drain;
output-high;
};
};
};
``` | /content/code_sandbox/boards/hardkernel/odroid_go/odroid_go-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 281 |
```restructuredtext
.. _croxel_cx1825_nrf52840:
CX1825 nRF52840
###############
Overview
********
Croxel's `CX1825 Bluetooth Prototyping board`_ provides support for the Nordic
Semiconductor nRF52840 ARM Cortex-M4F CPU and the following devices:
* :abbr:`ADC (Analog to Digital Converter)`
* CLOCK
* FLASH
* :abbr:`GPIO (General Purpose Input Output)`
* :abbr:`I2C (Inter-Integrated Circuit)`
* :abbr:`MPU (Memory Protection Unit)`
* :abbr:`NVIC (Nested Vectored Interrupt Controller)`
* :abbr:`PWM (Pulse Width Modulation)`
* RADIO (Bluetooth Low Energy and 802.15.4)
* :abbr:`RTC (nRF RTC System Clock)`
* Segger RTT (RTT Console)
* :abbr:`SPI (Serial Peripheral Interface)`
* :abbr:`USB (Universal Serial Bus)`
* :abbr:`WDT (Watchdog Timer)`
.. figure:: img/cx1825_nrf52840.jpg
:align: center
:alt: CX1825
Croxel's CX1825 Bluetooth Prototyping board (Credit: Croxel)
Hardware
********
- Ezurio's BL654 (nRF52840 ARM Cortex-M4F processor at 64MHz)
- 1 MB flash memory and 256 KB of SRAM
- Coin-cell retainer for Lithium coincell batteries
- 2 Discrete LEDs (Red and Green)
- User Button
- Reset Button
- Accelerometer (LIS3DH)
- Ambient & RGB Light and Proximity Sensor (APDS9960)
- Temperature and Humidity Sensor (HTS221)
- Barometric Pressure sensor (LPS22H)
- Hall Effect Switch (MLX90248)
- RGB LED with Charge-Pump driver (LP5521)
- Digital Microphone
- Beeper
- QWIIC connector supporting expansion for I2C devices
- USB Connector for data and power
- 16-pin Expansion connector
- SWD Connector
Supported Features
==================
- Discrete LEDs (red and green)
- Buttons (User and Reset)
- Sensors (Accelerometer, Light, Temperature and Humidity, Pressure and Hall-Effect sensors)
- Beeper
- Radio (Bluetooth, IEEE 802.15.4)
- SOC peripherals (ADC, Clock, Flash, GPIO, I2C, MPU, NVIC, PWM, Radio, RTC, SPI, USB, WDT)
Future Feature Support
======================
- RGB LED (Charge-Pump driver not implemented)
- Microphone
Connections and IOs
===================
Croxel's CX1825 Bluetooth Prototyping board has detailed information
about the board (`schematic`_)
LEDs
----
- LED1 (red) = P0.8
- LED2 (green) = P0.12
Digital Inputs
--------------
- User Button = P1.16
- Reset Button = P0.18
- Hall-Effect Switch = P0.15
Programming and Debugging
*************************
Applications for the ``croxel_cx1825/nrf52840`` board configuration
can be built and flashed in the usual way (see :ref:`build_an_application`
and :ref:`application_run` for more details).
Flashing
========
Flashing Zephyr onto the ``croxel_cx1825_nrf52840`` board requires
an external programmer. The programmer is attached to the SWD header.
Build the Zephyr kernel and the :zephyr:code-sample:`blinky` sample application.
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: croxel_cx1825/nrf52840
:goals: build
:compact:
Flash the image.
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: croxel_cx1825/nrf52840
:goals: flash
:compact:
You should see the red LED blink.
References
**********
.. target-notes::
.. _CX1825 Bluetooth Prototyping board:
path_to_url
.. _schematic:
path_to_url
``` | /content/code_sandbox/boards/croxel/croxel_cx1825/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 908 |
```cmake
include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake)
``` | /content/code_sandbox/boards/hardkernel/odroid_go/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 19 |
```unknown
CONFIG_MAIN_STACK_SIZE=2048
CONFIG_CLOCK_CONTROL=y
``` | /content/code_sandbox/boards/hardkernel/odroid_go/odroid_go_appcpu_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 15 |
```yaml
identifier: odroid_go/esp32/appcpu
name: ODROID-GO APPCPU
type: mcu
arch: xtensa
toolchain:
- zephyr
supported:
- uart
testing:
ignore_tags:
- net
- bluetooth
- flash
- cpp
- posix
- watchdog
- logging
- kernel
- pm
- gpio
- crypto
- eeprom
- heap
- cmsis_rtos
- jwt
- zdsp
vendor: hardkernel
``` | /content/code_sandbox/boards/hardkernel/odroid_go/odroid_go_appcpu.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 126 |
```unknown
/*
*
*/
/dts-v1/;
#include <espressif/esp32/esp32_wrover_e_n16r4.dtsi>
#include "odroid_go-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "ODROID-GO Game Kit PROCPU";
compatible = "hardkernel,odroid_go", "espressif,esp32";
chosen {
zephyr,sram = &sram0;
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,display = &ili9341;
zephyr,bt-hci = &esp32_bt_hci;
};
leds {
compatible = "gpio-leds";
blue_led: led {
gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
label = "Status Led";
};
};
gpio_keys {
compatible = "gpio-keys";
menu_button: menu_button {
label = "Menu";
gpios = <&gpio0 13 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
zephyr,code = <INPUT_KEY_MENU>;
};
volume_button: volume_button {
label = "Volume";
gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_0>;
};
select_button: select_button {
label = "Select";
gpios = <&gpio0 27 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
zephyr,code = <INPUT_BTN_SELECT>;
};
a_button: a_button {
label = "A";
gpios = <&gpio1 0 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
zephyr,code = <INPUT_KEY_A>;
};
b_button: b_button {
label = "B";
gpios = <&gpio1 1 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
zephyr,code = <INPUT_KEY_B>;
};
start_button: start_button {
label = "Start";
gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_BTN_START>;
};
};
lcd_backlight_en {
compatible = "regulator-fixed";
regulator-name = "lcd_backlight_enable";
enable-gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
regulator-boot-on;
};
aliases {
uart-0 = &uart0;
led0 = &blue_led;
sw0 = &menu_button;
watchdog0 = &wdt0;
sdhc0 = &sd0;
};
mipi_dbi {
compatible = "zephyr,mipi-dbi-spi";
dc-gpios = <&gpio0 21 GPIO_ACTIVE_HIGH>;
spi-dev = <&spi3>;
write-only;
#address-cells = <1>;
#size-cells = <0>;
ili9341: ili9341@0 {
compatible = "ilitek,ili9341";
mipi-max-frequency = <25000000>;
pixel-format = <0>;
reg = <0>;
rotation = <270>;
width = <320>;
height = <240>;
};
};
};
&uart0 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart0_default>;
pinctrl-names = "default";
};
&gpio0 {
status = "okay";
blue-led-disable {
gpio-hog;
gpios = <2 GPIO_ACTIVE_HIGH>;
output-low;
};
};
&gpio1 {
status = "okay";
};
&i2c0 {
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
sda-gpios = <&gpio0 4 GPIO_OPEN_DRAIN>;
scl-gpios = <&gpio0 15 GPIO_OPEN_DRAIN>;
pinctrl-0 = <&i2c0_default>;
pinctrl-names = "default";
};
&spi3 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
pinctrl-0 = <&spim3_default>;
pinctrl-names = "default";
sd0: sd@1 {
compatible = "zephyr,sdhc-spi-slot";
reg = <1>;
status = "okay";
mmc {
compatible = "zephyr,sdmmc-disk";
status = "okay";
};
spi-max-frequency = <20000000>;
};
};
&timer0 {
status = "okay";
};
&timer1 {
status = "okay";
};
&timer2 {
status = "okay";
};
&timer3 {
status = "okay";
};
&trng0 {
status = "okay";
};
&flash0 {
status = "okay";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* Reserve 60kB for the bootloader */
boot_partition: partition@1000 {
label = "mcuboot";
reg = <0x00001000 0x0000F000>;
read-only;
};
/* Reserve 1024kB for the application in slot 0 */
slot0_partition: partition@10000 {
label = "image-0";
reg = <0x00010000 0x00100000>;
};
/* Reserve 1024kB for the application in slot 1 */
slot1_partition: partition@110000 {
label = "image-1";
reg = <0x00110000 0x00100000>;
};
/* Reserve 256kB for the scratch partition */
scratch_partition: partition@210000 {
label = "image-scratch";
reg = <0x00210000 0x00040000>;
};
storage_partition: partition@250000 {
label = "storage";
reg = <0x00250000 0x00006000>;
};
};
};
&esp32_bt_hci {
status = "okay";
};
``` | /content/code_sandbox/boards/hardkernel/odroid_go/odroid_go_procpu.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,405 |
```yaml
identifier: odroid_go/esp32/procpu
name: ODROID-GO PROCPU
type: mcu
arch: xtensa
toolchain:
- zephyr
supported:
- gpio
- i2c
- spi
- watchdog
- uart
- nvs
testing:
ignore_tags:
- net
- bluetooth
vendor: hardkernel
``` | /content/code_sandbox/boards/hardkernel/odroid_go/odroid_go_procpu.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 88 |
```unknown
/*
*
*/
/dts-v1/;
#include <espressif/esp32/esp32_appcpu.dtsi>
/ {
model = "ODROID-GO Game Kit APPCPU";
compatible = "hardkernel,odroid_go", "espressif,esp32";
chosen {
zephyr,sram = &sram0;
zephyr,ipc_shm = &shm0;
zephyr,ipc = &ipm0;
};
};
&ipm0 {
status = "okay";
};
&trng0 {
status = "okay";
};
&flash0 {
status = "okay";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* Reserve 60kB for the bootloader */
boot_partition: partition@1000 {
label = "mcuboot";
reg = <0x00001000 0x0000F000>;
read-only;
};
/* Reserve 1024kB for the application in slot 0 */
slot0_partition: partition@10000 {
label = "image-0";
reg = <0x00010000 0x00100000>;
};
/* Reserve 1024kB for the application in slot 1 */
slot1_partition: partition@110000 {
label = "image-1";
reg = <0x00110000 0x00100000>;
};
/* Reserve 256kB for the scratch partition */
scratch_partition: partition@210000 {
label = "image-scratch";
reg = <0x00210000 0x00040000>;
};
storage_partition: partition@250000 {
label = "storage";
reg = <0x00250000 0x00006000>;
};
};
};
``` | /content/code_sandbox/boards/hardkernel/odroid_go/odroid_go_appcpu.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 412 |
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