text stringlengths 9 39.2M | dir stringlengths 25 226 | lang stringclasses 163 values | created_date timestamp[s] | updated_date timestamp[s] | repo_name stringclasses 751 values | repo_full_name stringclasses 752 values | star int64 1.01k 183k | len_tokens int64 1 18.5M |
|---|---|---|---|---|---|---|---|---|
```unknown
config BOARD_NUCLEO_F756ZG
select SOC_STM32F756XX
``` | /content/code_sandbox/boards/st/nucleo_f756zg/Kconfig.nucleo_f756zg | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 22 |
```unknown
# Enable MPU
CONFIG_ARM_MPU=y
# Enable HW stack protection
CONFIG_HW_STACK_PROTECTION=y
# Enable UART
CONFIG_SERIAL=y
# Console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# Enable GPIO
CONFIG_GPIO=y
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/nucleo_f756zg/nucleo_f756zg_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 73 |
```yaml
board:
name: nucleo_f756zg
vendor: st
socs:
- name: stm32f756xx
``` | /content/code_sandbox/boards/st/nucleo_f756zg/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```unknown
# STM32F756ZG Nucleo board configuration
if BOARD_NUCLEO_F756ZG
if NETWORKING
config NET_L2_ETHERNET
default y
endif # NETWORKING
endif # BOARD_NUCLEO_F756ZG
``` | /content/code_sandbox/boards/st/nucleo_f756zg/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 57 |
```unknown
/*
*
*/
/ {
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpioa 3 0>, /* A0 */
<1 0 &gpioc 0 0>, /* A1 */
<2 0 &gpioc 3 0>, /* A2 */
<3 0 &gpiof 3 0>, /* A3 */
<4 0 &gpiof 5 0>, /* A4 */
<5 0 &gpiof 10 0>, /* A5 */
<6 0 &gpiog 9 0>, /* D0 */
<7 0 &gpiog 14 0>, /* D1 */
<8 0 &gpiof 15 0>, /* D2 */
<9 0 &gpioe 13 0>, /* D3 */
<10 0 &gpiof 14 0>, /* D4 */
<11 0 &gpioe 11 0>, /* D5 */
<12 0 &gpioe 9 0>, /* D6 */
<13 0 &gpiof 13 0>, /* D7 */
<14 0 &gpiof 12 0>, /* D8 */
<15 0 &gpiod 15 0>, /* D9 */
<16 0 &gpiod 14 0>, /* D10 */
<17 0 &gpioa 7 0>, /* D11 */
<18 0 &gpioa 6 0>, /* D12 */
<19 0 &gpioa 5 0>, /* D13 */
<20 0 &gpiob 9 0>, /* D14 */
<21 0 &gpiob 8 0>; /* D15 */
};
};
arduino_serial: &usart6 {};
arduino_i2c: &i2c1 {};
arduino_spi: &spi1 {};
``` | /content/code_sandbox/boards/st/nucleo_f756zg/arduino_r3_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 497 |
```restructuredtext
.. _nucleo_h755zi_q_board:
ST Nucleo H755ZI-Q
###################
Overview
********
The NUCLEO-H755ZI-Q board, based on the MB1363 reference board, provides an affordable and
flexible way for users to try out new concepts and build prototypes on the STM32H755ZIT6
microcontroller.
The ST Zio connector, which extends the ARDUINO Uno V3 connectivity, and
the ST morpho headers provide an easy means of expanding the functionality of the Nucleo
open development platform with a wide choice of specialized shields.
The NUCLEO-H755ZI-Q board does not require any separate probe as it integrates
the ST-LINK V3 debugger/programmer.
Key Features
- STM32H755ZIT6 microcontroller in LQFP144 package
- Ethernet compliant with IEEE-802.3-2002 (depending on STM32 support)
- USB OTG or full-speed device (depending on STM32 support)
- 3 user LEDs
- 2 user and reset push-buttons
- 32.768 kHz crystal oscillator
- Board connectors:
- USB with Micro-AB
- Ethernet RJ45 (depending on STM32 support)
- SWDST Zio connector including Arduino* Uno V3ST
- ST morpho expansion
- Flexible power-supply options: ST-LINK USB VBUS or external sources
- External or internal SMPS to generate Vcore logic supply
- On-board ST-LINK/V3 debugger/programmer with USB re-enumeration
- capability: mass storage, virtual COM port and debug port
- USB OTG full speed or device only
.. image:: img/nucleo_h755zi_q.webp
:align: center
:alt: Nucleo H755ZI-Q
More information about the board can be found at the `Nucleo H755ZI-Q website`_.
Hardware
********
Nucleo H755ZI-Q provides the following hardware components:
- STM32H755ZI in LQFP144 package
- ARM 32-bit Cortex-M7 CPU with FPU
- ARM 32-bit Cortex-M4 CPU with FPU
- Chrom-ART Accelerator
- Hardware JPEG Codec
- 480 MHz max CPU frequency
- VDD from 1.62 V to 3.6 V
- 2 MB Flash
- 1 MB SRAM
- High-resolution timer (2.1 ns)
- 32-bit timers(2)
- 16-bit timers(12)
- SPI(6)
- I2C(4)
- I2S (3)
- USART(4)
- UART(4)
- USB OTG Full Speed and High Speed(1)
- USB OTG Full Speed(1)
- CAN-FD(2)
- SAI(2)
- SPDIF_Rx(4)
- HDMI_CEC(1)
- Dual Mode Quad SPI(1)
- Camera Interface
- GPIO (up to 114) with external interrupt capability
- 16-bit ADC(3) with 36 channels / 3.6 MSPS
- 12-bit DAC with 2 channels(2)
- True Random Number Generator (RNG)
- 16-channel DMA
- LCD-TFT Controller with XGA resolution
- CRYPT and HASH peripherals
Supported Features
==================
The Zephyr nucleo_h755zi_q board configuration supports the following hardware
features:
+-------------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+=============+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-------------+------------+-------------------------------------+
| UART/USART | on-chip | serial port |
+-------------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-------------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-------------+------------+-------------------------------------+
| RTC | on-chip | counter |
+-------------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-------------+------------+-------------------------------------+
| PWM | on-chip | pwm |
+-------------+------------+-------------------------------------+
| ETHERNET | on-chip | ethernet |
+-------------+------------+-------------------------------------+
| RNG | on-chip | True Random number generator |
+-------------+------------+-------------------------------------+
| USB OTG FS | on-chip | USB device |
+-------------+------------+-------------------------------------+
Other hardware features are not yet supported on this Zephyr port.
The default configuration per core can be found in the defconfig files:
:zephyr_file:`boards/st/nucleo_h755zi_q/nucleo_h755zi_q_stm32h755xx_m7_defconfig` and
:zephyr_file:`boards/st/nucleo_h755zi_q/nucleo_h755zi_q_stm32h755xx_m4_defconfig`
For mode details please refer to `STM32 Nucleo-144 board User Manual`_.
Default Zephyr Peripheral Mapping:
----------------------------------
The Nucleo H755ZI board features a ST Zio connector (extended Arduino Uno V3)
and a ST morpho connector. Board is configured as follows:
- USART_3 TX/RX : PD8/PD9 (ST-Link Virtual Port Com)
- USER_PB : PC13
- LD1 : PA5
- LD2 : PE1
- LD3 : PB14
- I2C : PB8, PB9
System Clock
------------
Nucleo H755ZI-Q System Clock can be driven by an internal or external
oscillator, as well as the main PLL clock. By default, the System clock is
driven by the PLL clock at 480MHz, driven by an 8MHz high-speed external clock.
Serial Port
-----------
Nucleo H755ZI-Q board has 4 UARTs and 4 USARTs. The Zephyr console output is
assigned to USART3. Default settings are 115200 8N1.
Resources sharing
-----------------
The dual core nature of STM32H755 SoC requires sharing HW resources between the
two cores. This is done in 3 ways:
- **Compilation**: Clock configuration is only accessible to M7 core. M4 core only
has access to bus clock activation and deactivation.
- **Static pre-compilation assignment**: Peripherals such as a UART are assigned in
devicetree before compilation. The user must ensure peripherals are not assigned
to both cores at the same time.
- **Run time protection**: Interrupt-controller and GPIO configurations could be
accessed by both cores at run time. Accesses are protected by a hardware semaphore
to avoid potential concurrent access issues.
Programming and Debugging
*************************
Applications for the ``nucleo_h755zi_q`` board should be built per core target,
using either ``nucleo_h755zi_q/stm32h755xx/m7`` or ``nucleo_h755zi_q/stm32h755xx/m4``
as the target (see :ref:`build_an_application` and :ref:`application_run` for more
details).
.. note::
Check if the board's ST-LINK V3 has the newest firmware version. It can be
updated with `STM32CubeIDE`_
Flashing
========
Nucleo H755ZI-Q board includes an ST-LINK/V3 embedded debug tool interface.
The board is configured to be flashed using west `STM32CubeProgrammer`_ runner
for both cores, so its installation is required to be able to flash the board.
The target core is detected automatically.
It is advised to use `STM32CubeProgrammer`_ to check and update option bytes
configuration and flash ``nucleo_h755zi_q/stm32h755xx/m7`` and
``nucleo_h755zi_q/stm32h755xx/m4`` board targets.
By default:
- CPU0 (Cortex-M7) boot address is set to 0x08000000 (OB: BOOT_CM7_ADD0)
- CPU1 (Cortex-M4) boot address is set to 0x08100000 (OB: BOOT_CM4_ADD0)
Also, default out of the box board configuration enables CM7 and CM4 boot when
board is powered (Option bytes BCM7 and BCM4 are checked).
In that configuration, Kconfig boot option ``STM32H7_BOOT_CM4_CM7`` should be selected.
Zephyr flash configuration has been set to meet these default settings.
Alternatively, openocd or JLink can also be used to flash the board using
the ``--runner`` (or ``-r``) option:
.. code-block:: console
$ west flash --runner openocd
$ west flash --runner jlink
Flashing an application to STM32H755ZI M7 Core
----------------------------------------------
First, connect the NUCLEO-H755ZI-Q to your host computer using
the USB port to prepare it for flashing. Then build and flash your application.
Here is an example for the :ref:`hello_world` application.
Run a serial host program to connect with your NUCLEO-H755ZI-Q board.
.. code-block:: console
$ minicom -b 115200 -D /dev/ttyACM0
or use screen:
.. code-block:: console
$ screen /dev/ttyACM0 115200
Build and flash the application:
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nucleo_h755zi_q/stm32h755xx/m7
:goals: build flash
You should see the following message on the console:
.. code-block:: console
$ Hello World! nucleo_h755zi_q/stm32h755xx/m7
.. note::
Sometimes, flashing via OpenOCD does not work. It is necessary to erase the flash
(with STM32CubeProgrammer for example) to make it work again.
Similarly, you can build and flash samples on the M4 target. For this, please
take care of the resource sharing (UART port used for console for instance).
Here is an example for the :zephyr:code-sample:`blinky` application on M4 core.
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: nucleo_h755zi_q/stm32h755xx/m4
:goals: build flash
.. note::
Flashing both M4 and M7 and pushing RESTART button on the board leads
to LD1 and LD2 flashing simultaneously.
Debugging
=========
You can debug an application on the Cortex M7 core in the usual way.
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nucleo_h755zi_q/stm32h755xx/m7
:maybe-skip-config:
:goals: debug
Debugging a Zephyr application on Cortex M4 side with west is currently not
available. As a workaround, `STM32CubeIDE`_ can be used.
.. _Nucleo H755ZI-Q website:
path_to_url
.. _STM32 Nucleo-144 board User Manual:
path_to_url
.. _STM32H755ZI on www.st.com:
path_to_url
.. _STM32H755 reference manual:
path_to_url
.. _OpenOCD installing Debug Version:
path_to_url
.. _OpenOCD installing with ST-LINK V3 support:
path_to_url
.. _STM32CubeIDE:
path_to_url
.. _STM32CubeProgrammer:
path_to_url
``` | /content/code_sandbox/boards/st/nucleo_h755zi_q/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,548 |
```ini
source [find board/st_nucleo_f7.cfg]
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
``` | /content/code_sandbox/boards/st/nucleo_f756zg/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 70 |
```cmake
if(CONFIG_BUILD_WITH_TFM)
set(TFM_FLASH_BASE_ADDRESS 0x0C000000)
# Flash merged TF-M + Zephyr binary
set_property(TARGET runners_yaml_props_target PROPERTY hex_file tfm_merged.hex)
if (CONFIG_HAS_FLASH_LOAD_OFFSET)
MATH(EXPR TFM_HEX_BASE_ADDRESS_NS "${TFM_FLASH_BASE_ADDRESS}+${CONFIG_FLASH_LOAD_OFFSET}")
else()
set(TFM_HEX_BASE_ADDRESS_NS ${TFM_TFM_FLASH_BASE_ADDRESS})
endif()
endif()
if(CONFIG_STM32_MEMMAP)
board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
board_runner_args(stm32cubeprogrammer "--extload=MX25LM51245G_STM32U585I-IOT02A.stldr")
else()
board_runner_args(stm32cubeprogrammer "--erase" "--port=swd" "--reset-mode=hw")
endif()
board_runner_args(openocd "--tcl-port=6666")
board_runner_args(openocd --cmd-pre-init "gdb_report_data_abort enable")
board_runner_args(openocd "--no-halt")
board_runner_args(jlink "--device=STM32U585AI" "--reset-after-load")
include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake)
# FIXME: openocd runner requires use of STMicro openocd fork.
# Check board documentation for more details.
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/st/b_u585i_iot02a/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 347 |
```restructuredtext
.. _nucleo_f756zg_board:
ST Nucleo F756ZG
################
Overview
********
The STM32 Nucleo-144 boards offer combinations of performance and power that
provide an affordable and flexible way for users to build prototypes and try
out new concepts. For compatible boards, the SMPS significantly reduces power
consumption in Run mode.
The Arduino-compatible ST Zio connector expands functionality of the Nucleo
open development platform, with a wide choice of specialized Arduino* Uno V3
shields.
The STM32 Nucleo-144 board does not require any separate probe as it integrates
the ST-LINK/V2-1 debugger/programmer.
The STM32 Nucleo-144 board comes with the STM32 comprehensive free software
libraries and examples available with the STM32Cube MCU Package.
Key Features
- STM32 microcontroller in LQFP144 package
- Ethernet compliant with IEEE-802.3-2002 (depending on STM32 support)
- USB OTG or full-speed device (depending on STM32 support)
- 3 user LEDs
- 2 user and reset push-buttons
- 32.768 kHz crystal oscillator
- Board connectors:
- USB with Micro-AB
- SWD
- Ethernet RJ45 (depending on STM32 support)
- ST Zio connector including Arduino* Uno V3
- ST morpho
- Flexible power-supply options: ST-LINK USB VBUS or external sources.
- On-board ST-LINK/V2-1 debugger/programmer with USB re-enumeration
capability: mass storage, virtual COM port and debug port.
- Comprehensive free software libraries and examples available with the
- STM32Cube MCU package.
- Arm* Mbed Enabled* compliant (only for some Nucleo part numbers)
.. image:: img/nucleo_f756zg.jpg
:align: center
:alt: Nucleo F756ZG
More information about the board can be found at the `Nucleo F756ZG website`_.
Hardware
********
Nucleo F756ZG provides the following hardware components:
- STM32F756ZG in LQFP144 package
- ARM 32-bit Cortex-M7 CPU with FPU
- Chrom-ART Accelerator
- ART Accelerator
- 216 MHz max CPU frequency
- VDD from 1.7 V to 3.6 V
- 1 MB Flash
- 320 KB SRAM
- 16-bit timers(10)
- 32-bit timers(2)
- SPI(6)
- I2C(4)
- I2S (3)
- USART(4)
- UART(4)
- USB OTG Full Speed and High Speed(1)
- USB OTG Full Speed(1)
- CAN(2)
- SAI(2)
- SPDIF_Rx(4)
- HDMI_CEC(1)
- Dual Mode Quad SPI(1)
- Camera Interface
- GPIO(up to 168) with external interrupt capability
- 12-bit ADC(3) with 24 channels / 2.4 MSPS
- 12-bit DAC with 2 channels(2)
- True Random Number Generator (RNG)
- 16-channel DMA
- LCD-TFT Controller with XGA resolution
Supported Features
==================
The Zephyr nucleo_f756zg board configuration supports the following hardware
features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| ETHERNET | on-chip | ethernet |
+-----------+------------+-------------------------------------+
| USB | on-chip | usb_device |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| PWM | on-chip | pwm |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported on this Zephyr port.
The default configuration can be found in
:zephyr_file:`boards/st/nucleo_f756zg/nucleo_f756zg_defconfig`
For more details please refer to `STM32 Nucleo-144 board User Manual`_.
Default Zephyr Peripheral Mapping:
----------------------------------
The Nucleo F756ZG board features a ST Zio connector (extended Arduino Uno V3)
and a ST morpho connector. Board is configured as follows:
- UART_2 TX/RX/RTS/CTS : PD5/PD6/PD4/PD3
- UART_3 TX/RX : PD8/PD9 (ST-Link Virtual Port Com)
- UART_6 TX/RX : PG14/PG9 (Arduino UART)
- USER_PB : PC13
- LD1 : PB0
- LD2 : PB7
- LD3 : PB14
- ETH : PA1, PA2, PA7, PB13, PC1, PC4, PC5, PG11, PG13
- USB DM : PA11
- USB DP : PA12
- I2C : PB8, PB9
- PWM : PE13
- SPI : PD14, PA5, PA6, PA7
Note. The Arduino Uno v3 specified SPI device conflicts with the on-board ETH
device on pin PA7.
System Clock
------------
Nucleo F756ZG System Clock could be driven by an internal or external
oscillator, as well as the main PLL clock. By default, the System clock is
driven by the PLL clock at 72MHz, driven by an 8MHz high-speed external clock.
Serial Port
-----------
Nucleo F756ZG board has 4 UARTs and 4 USARTs. The Zephyr console output is
assigned to UART3. Default settings are 115200 8N1.
Programming and Debugging
*************************
Applications for the ``nucleo_f756zg`` board configuration can be built and
flashed in the usual way (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Flashing
========
Nucleo F756ZG board includes an ST-LINK/V2-1 embedded debug tool interface.
Flashing an application to Nucleo F756ZG
----------------------------------------
Here is an example for the :ref:`hello_world` application.
Run a serial host program to connect with your Nucleo board.
.. code-block:: console
$ minicom -b 115200 -D /dev/ttyACM0
Build and flash the application:
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nucleo_f756zg
:goals: build flash
You should see the following message on the console:
.. code-block:: console
$ Hello World! nucleo_f756zg
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nucleo_f756zg
:maybe-skip-config:
:goals: debug
.. _Nucleo F756ZG website:
path_to_url
.. _STM32 Nucleo-144 board User Manual:
path_to_url
.. _STM32F756ZG on www.st.com:
path_to_url
.. _STM32F756 reference manual:
path_to_url
``` | /content/code_sandbox/boards/st/nucleo_f756zg/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,718 |
```unknown
/*
*
*/
/dts-v1/;
#include "b_u585i_iot02a-common.dtsi"
/ {
model = "STMicroelectronics B-U585I-IOT02A discovery kit";
compatible = "st,b-u585i-iot02a";
chosen {
zephyr,console = &usart1;
zephyr,shell-uart = &usart1;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_ns_partition;
};
aliases {
led0 = &green_led_1;
led1 = &red_led_1;
sw0 = &user_button;
};
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/*
* Following flash partition is compatible with requirements
* given in TFM configuration given for current board.
* It might require adjustment depending on evolutions on TFM.
*/
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 DT_SIZE_K(224)>;
read-only;
};
/* Secure image primary slot */
slot0_partition: partition@38000 {
label = "image-0";
reg = <0x00038000 DT_SIZE_K(384)>;
};
/* Non-secure image primary slot */
slot0_ns_partition: partition@98000 {
label = "image-0-nonsecure";
reg = <0x00098000 DT_SIZE_K(512)>;
};
/* Secure image secondary slot */
slot1_partition: partition@118000 {
label = "image-1";
reg = <0x00118000 DT_SIZE_K(384)>;
};
/* Non-secure image secondary slot */
slot1_ns_partition: partition@178000 {
label = "image-1-nonsecure";
reg = <0x00178000 DT_SIZE_K(512)>;
};
/* Applicative Non Volatile Storage */
storage_partition: partition@1f8000 {
label = "storage";
reg = <0x001f8000 DT_SIZE_K(16)>;
};
};
};
``` | /content/code_sandbox/boards/st/b_u585i_iot02a/b_u585i_iot02a_stm32u585xx_ns.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 520 |
```unknown
/*
*
*/
#include <st/u5/stm32u585Xi.dtsi>
#include <st/u5/stm32u585aiixq-pinctrl.dtsi>
#include "arduino_r3_connector.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
leds {
compatible = "gpio-leds";
green_led_1: led_1 {
gpios = <&gpioh 7 GPIO_ACTIVE_LOW>;
label = "User LD7";
};
red_led_1: led_3 {
gpios = <&gpioh 6 GPIO_ACTIVE_LOW>;
label = "User LD6";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button {
label = "User";
gpios = <&gpioc 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
zephyr,code = <INPUT_KEY_0>;
};
};
aliases {
watchdog0 = &iwdg;
die-temp0 = &die_temp;
volt-sensor0 = &vref1;
volt-sensor1 = &vbat4;
eeprom-0 = &eeprom0;
};
};
&clk_hsi48 {
status = "okay";
};
&clk_lse {
status = "okay";
};
&clk_msis {
status = "okay";
msi-range = <4>;
msi-pll-mode;
};
&pll1 {
div-m = <1>;
mul-n = <80>;
div-q = <2>;
div-r = <2>;
clocks = <&clk_msis>;
status = "okay";
};
&rcc {
clocks = <&pll1>;
clock-frequency = <DT_FREQ_M(160)>;
ahb-prescaler = <1>;
apb1-prescaler = <1>;
apb2-prescaler = <1>;
apb3-prescaler = <1>;
};
stm32_lp_tick_source: &lptim1 {
clocks = <&rcc STM32_CLOCK_BUS_APB3 0x00000800>,
<&rcc STM32_SRC_LSE LPTIM1_SEL(3)>;
status = "okay";
};
&usart1 {
pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&usart3 {
pinctrl-0 = <&usart3_tx_pd8 &usart3_rx_pd9>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&spi1 {
pinctrl-0 = <&spi1_nss_pe12 &spi1_sck_pe13
&spi1_miso_pe14 &spi1_mosi_pe15>;
pinctrl-names = "default";
status = "okay";
};
&timers4 {
status = "okay";
st,prescaler = <1>;
pwm4: pwm {
status = "okay";
pinctrl-0 = <&tim4_ch1_pb6>;
pinctrl-names = "default";
};
};
&timers3 {
status = "okay";
st,prescaler = <255>;
pwm3: pwm {
status = "okay";
pinctrl-0 = <&tim3_ch2_pe4>;
pinctrl-names = "default";
};
};
&octospi2 {
pinctrl-0 = <&octospim_p2_clk_pf4 &octospim_p2_ncs_pi5
&octospim_p2_io0_pf0 &octospim_p2_io1_pf1
&octospim_p2_io2_pf2 &octospim_p2_io3_pf3
&octospim_p2_io4_ph9 &octospim_p2_io5_ph10
&octospim_p2_io6_ph11 &octospim_p2_io7_ph12
&octospim_p2_dqs_pf12>;
pinctrl-names = "default";
status = "okay";
mx25lm51245: ospi-nor-flash@70000000 {
compatible = "st,stm32-ospi-nor";
reg = <0x70000000 DT_SIZE_M(64)>; /* 512 Mbits */
ospi-max-frequency = <DT_FREQ_M(50)>;
spi-bus-width = <OSPI_OPI_MODE>;
data-rate = <OSPI_DTR_TRANSFER>;
four-byte-opcodes;
status = "okay";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
reg = <0x00000000 DT_SIZE_M(64)>;
};
};
};
};
&i2c1 {
pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
&i2c2 {
pinctrl-0 = <&i2c2_scl_ph4 &i2c2_sda_ph5>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
veml6030@10 {
compatible ="vishay,veml7700";
reg = <0x10>;
status = "okay";
};
iis2mdc@1e {
compatible = "st,iis2mdc";
reg = <0x1e>;
drdy-gpios = <&gpiod 10 GPIO_ACTIVE_HIGH>;
};
ism330dhcx@6b {
compatible = "st,ism330dhcx";
reg = <0x6b>;
drdy-gpios = <&gpioe 11 GPIO_ACTIVE_HIGH>;
};
lps22hh@5d {
compatible = "st,lps22hh";
reg = <0x5d>;
drdy-gpios = <&gpiog 2 GPIO_ACTIVE_HIGH>;
};
eeprom0:eeprom@56 {
compatible = "atmel,at24";
reg = <0x56>;
status = "okay";
size = <DT_SIZE_K(32)>;
pagesize = <64>;
address-width = <16>;
timeout = <5>;
};
hts221@5f {
compatible = "st,hts221";
reg = <0x5f>;
};
};
&aes {
status = "okay";
};
&rng {
status = "okay";
};
zephyr_udc0: &usbotg_fs {
pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12>;
pinctrl-names = "default";
status = "okay";
};
&adc1 {
pinctrl-0 = <&adc1_in15_pb0>;
pinctrl-names = "default";
st,adc-clock-source = <ASYNC>;
st,adc-prescaler = <4>;
status = "okay";
};
&adc4 {
pinctrl-0 = <&adc4_in19_pb1>;
pinctrl-names = "default";
st,adc-clock-source = <ASYNC>;
st,adc-prescaler = <4>;
status = "okay";
};
&die_temp {
status = "okay";
};
&dac1 {
pinctrl-0 = <&dac1_out1_pa4>;
pinctrl-names = "default";
status = "okay";
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB3 0x00200000>,
<&rcc STM32_SRC_LSE RTC_SEL(1)>;
status = "okay";
};
&iwdg {
status = "okay";
};
&vref1 {
status = "okay";
};
&vbat4 {
status = "okay";
};
``` | /content/code_sandbox/boards/st/b_u585i_iot02a/b_u585i_iot02a-common.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,759 |
```unknown
config BOARD_B_U585I_IOT02A
select SOC_STM32U585XX
``` | /content/code_sandbox/boards/st/b_u585i_iot02a/Kconfig.b_u585i_iot02a | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 22 |
```cmake
# SPI is implemented via octospi so node name isn't spi@...
list(APPEND EXTRA_DTC_FLAGS "-Wno-spi_bus_bridge")
``` | /content/code_sandbox/boards/st/b_u585i_iot02a/pre_dt_board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 33 |
```yaml
identifier: b_u585i_iot02a
name: ST B_U585I_IOT02A Discovery kit
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 786
flash: 2048
supported:
- arduino_i2c
- arduino_spi
- hts221
- dma
- usb_device
- spi
- dac
- adc
- watchdog
- nvs
- backup_sram
- pwm
- counter
- i2c
- rtc
- usbd
vendor: st
``` | /content/code_sandbox/boards/st/b_u585i_iot02a/b_u585i_iot02a.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 152 |
```yaml
identifier: b_u585i_iot02a/stm32u585xx/ns
name: ST B_U585I_IOT02A Discovery kit non secure target
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 786
flash: 512
vendor: st
``` | /content/code_sandbox/boards/st/b_u585i_iot02a/b_u585i_iot02a_stm32u585xx_ns.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 80 |
```unknown
/*
*
*/
/dts-v1/;
#include "b_u585i_iot02a-common.dtsi"
#include <zephyr/dt-bindings/memory-attr/memory-attr.h>
#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
/ {
model = "STMicroelectronics B-U585I-IOT02A discovery kit";
compatible = "st,b-u585i-iot02a";
chosen {
zephyr,console = &usart1;
zephyr,shell-uart = &usart1;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,bt-hci = &bt_hci_uart;
};
aliases {
led0 = &green_led_1;
led1 = &red_led_1;
sw0 = &user_button;
};
octo_nor: memory@70000000 {
compatible = "zephyr,memory-region";
reg = <0x70000000 DT_SIZE_M(64)>;
zephyr,memory-region = "EXTMEM";
/* The ATTR_MPU_EXTMEM attribut causing a MPU FAULT */
zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_IO) )>;
};
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/*
* Following flash partition is dedicated to the use of b_u585i_iot02a
* with TZEN=0 (so w/o TFM).
* Set the partitions with first MB to make use of the whole Bank1
*/
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 DT_SIZE_K(64)>;
};
slot0_partition: partition@10000 {
label = "image-0";
reg = <0x00010000 DT_SIZE_K(416)>;
};
slot1_partition: partition@78000 {
label = "image-1";
reg = <0x00078000 DT_SIZE_K(416)>;
};
scratch_partition: partition@e0000 {
label = "image-scratch";
reg = <0x000e0000 DT_SIZE_K(64)>;
};
storage_partition: partition@f0000 {
label = "storage";
reg = <0x000f0000 DT_SIZE_K(64)>;
};
};
};
&gpdma1 {
status = "okay";
};
&uart4 {
pinctrl-0 = <&uart4_tx_pc10 &uart4_rx_pc11>;
pinctrl-names = "default";
current-speed = <100000>;
status = "okay";
bt_hci_uart: bt_hci_uart {
compatible = "zephyr,bt-hci-uart";
status = "okay";
};
};
``` | /content/code_sandbox/boards/st/b_u585i_iot02a/b_u585i_iot02a.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 675 |
```yaml
board:
name: b_u585i_iot02a
vendor: st
socs:
- name: stm32u585xx
variants:
- name: ns
``` | /content/code_sandbox/boards/st/b_u585i_iot02a/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 43 |
```unknown
# B_U585I_IOT02A discovery kit board configuration
if BOARD_B_U585I_IOT02A
config SPI_STM32_INTERRUPT
default y
depends on SPI
if BUILD_WITH_TFM
# Initial Attestation key provisioned by the BL1 bootloader
config TFM_INITIAL_ATTESTATION_KEY
default y
config TFM_DUMMY_PROVISIONING
default n
endif # BUILD_WITH_TFM
# Disable Flow control
if BT
config BT_HCI_ACL_FLOW_CONTROL
default n
endif # BT
endif # BOARD_B_U585I_IOT02A
``` | /content/code_sandbox/boards/st/b_u585i_iot02a/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 127 |
```unknown
/*
*
*/
/ {
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpioc 0 0>, /* A0 */
<1 0 &gpioc 2 0>, /* A1 */
<2 0 &gpioc 4 0>, /* A2 */
<3 0 &gpioc 5 0>, /* A3 */
<4 0 &gpioa 7 0>, /* A4 */
<5 0 &gpiob 0 0>, /* A5 */
<6 0 &gpiod 8 0>, /* D0 */
<7 0 &gpiod 9 0>, /* D1 */
<8 0 &gpiod 15 0>, /* D2 */
<9 0 &gpiob 2 0>, /* D3 */
<10 0 &gpioe 7 0>, /* D4 */
<11 0 &gpioe 0 0>, /* D5 */
<12 0 &gpiob 6 0>, /* D6 */
<13 0 &gpiof 13 0>, /* D7 */
<14 0 &gpioc 1 0>, /* D8 */
<15 0 &gpioa 8 0>, /* D9 */
<16 0 &gpioe 12 0>, /* D10 */
<17 0 &gpioe 15 0>, /* D11 */
<18 0 &gpioe 14 0>, /* D12 */
<19 0 &gpioe 13 0>, /* D13 */
<20 0 &gpiob 9 0>, /* D14 */
<21 0 &gpiob 8 0>; /* D15 */
};
};
arduino_spi: &spi1 {};
arduino_i2c: &i2c1 {};
arduino_serial: &usart3 {};
``` | /content/code_sandbox/boards/st/b_u585i_iot02a/arduino_r3_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 502 |
```unknown
# enable uart driver
CONFIG_SERIAL=y
# enable GPIO
CONFIG_GPIO=y
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# enable pin controller
CONFIG_PINCTRL=y
CONFIG_ARM_TRUSTZONE_M=y
CONFIG_RUNTIME_NMI=y
CONFIG_TRUSTED_EXECUTION_NONSECURE=y
CONFIG_TFM_MCUBOOT_SIGNATURE_TYPE="RSA-3072"
``` | /content/code_sandbox/boards/st/b_u585i_iot02a/b_u585i_iot02a_stm32u585xx_ns_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 90 |
```unknown
# enable uart driver
CONFIG_SERIAL=y
# enable GPIO
CONFIG_GPIO=y
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/b_u585i_iot02a/b_u585i_iot02a_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 51 |
```ini
source [find interface/stlink-dap.cfg]
set WORKAREASIZE 0x8000
transport select "dapdirect_swd"
set CHIPNAME STM32U575ZITxQ
set BOARDNAME B-U585I-IOT02A
# Enable debug when in low power modes
set ENABLE_LOW_POWER 1
# Stop Watchdog counters when halt
set STOP_WATCHDOG 1
# STlink Debug clock frequency
set CLOCK_FREQ 8000
# Reset configuration
# use hardware reset, connect under reset
# connect_assert_srst needed if low power mode application running (WFI...)
reset_config srst_only srst_nogate connect_assert_srst
set CONNECT_UNDER_RESET 1
set CORE_RESET 0
# ACCESS PORT NUMBER
set AP_NUM 0
# GDB PORT
set GDB_PORT 3333
# BCTM CPU variables
source [find target/stm32u5x.cfg]
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
``` | /content/code_sandbox/boards/st/b_u585i_iot02a/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 253 |
```cmake
board_runner_args(jlink "--device=STM32F303K8" "--speed=4000")
board_runner_args(pyocd "--target=stm32f303k8tx")
board_runner_args(pyocd "--flash-opt=-O reset_type=hw")
board_runner_args(pyocd "--flash-opt=-O connect_mode=under-reset")
board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake)
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/st/nucleo_f303k8/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 168 |
```unknown
config BOARD_NUCLEO_F303K8
select SOC_STM32F303X8
``` | /content/code_sandbox/boards/st/nucleo_f303k8/Kconfig.nucleo_f303k8 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 23 |
```unknown
CONFIG_SERIAL=y
# console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# enable GPIO
CONFIG_GPIO=y
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/nucleo_f303k8/nucleo_f303k8_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 46 |
```yaml
identifier: nucleo_f303k8
name: ST Nucleo F303K8
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 12
flash: 64
supported:
- adc
- i2c
- spi
- gpio
- pwm
- counter
vendor: st
``` | /content/code_sandbox/boards/st/nucleo_f303k8/nucleo_f303k8.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 93 |
```yaml
board:
name: nucleo_f303k8
vendor: st
socs:
- name: stm32f303x8
``` | /content/code_sandbox/boards/st/nucleo_f303k8/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 33 |
```unknown
/*
* Fabian Paschke <fabian.paschke@eas.iis.fraunhofer.de>
*
*/
/dts-v1/;
#include <st/f3/stm32f303X8.dtsi>
#include <st/f3/stm32f303k(6-8)tx-pinctrl.dtsi>
/ {
model = "STMicroelectronics STM32F303K8-NUCLEO board";
compatible = "st,stm32f303k8-nucleo";
chosen {
zephyr,console = &usart2;
zephyr,shell-uart = &usart2;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
};
leds: leds {
compatible = "gpio-leds";
green_led_3: green_led_3 {
gpios = <&gpiob 3 GPIO_ACTIVE_HIGH>;
label = "LD3";
};
};
pwmleds {
compatible = "pwm-leds";
green_pwm_led: green_pwm_led {
pwms = <&pwm2 2 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
};
};
aliases {
led0 = &green_led_3;
pwm-led0 = &green_pwm_led;
volt-sensor0 = &vref;
volt-sensor1 = &vbat;
};
};
&clk_lsi {
status = "okay";
};
&clk_hsi {
status = "okay";
};
&pll {
prediv = <1>;
mul = <9>;
clocks = <&clk_hsi>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(36)>;
ahb-prescaler = <1>;
apb1-prescaler = <2>;
apb2-prescaler = <1>;
adc12-prescaler = <0>;
};
&timers2 {
status = "okay";
pwm2: pwm {
status = "okay";
pinctrl-0 = <&tim2_ch2_pb3>;
pinctrl-names = "default";
};
};
&usart2 {
pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa15>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&i2c1 {
pinctrl-0 = <&i2c1_scl_pb6 &i2c1_sda_pb7>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
&spi1 {
pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pa5
&spi1_miso_pa6 &spi1_mosi_pa7>;
pinctrl-names = "default";
status = "okay";
};
&adc1 {
pinctrl-0 = <&adc1_in1_pa0>;
pinctrl-names = "default";
st,adc-clock-source = <SYNC>;
st,adc-prescaler = <2>;
status = "okay";
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>,
<&rcc STM32_SRC_LSI RTC_SEL(2)>;
status = "okay";
};
&vref {
status = "okay";
};
&vbat {
status = "okay";
};
``` | /content/code_sandbox/boards/st/nucleo_f303k8/nucleo_f303k8.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 759 |
```ini
source [find board/st_nucleo_f3.cfg]
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
``` | /content/code_sandbox/boards/st/nucleo_f303k8/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 70 |
```restructuredtext
.. _nucleo_f303k8_board:
ST Nucleo F303K8
################
Overview
********
The Nucleo F303K8 board features an ARM Cortex-M4 based STM32F303K8
mixed-signal MCU with FPU and DSP instructions capable of running at 72 MHz.
Here are some highlights of the Nucleo F303K8 board:
- STM32 microcontroller in LQFP32 package
- one type of extension resources:
- Arduino Nano V3 connectivity support
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector
- Flexible board power supply:
- 5 V from ST-LINK/V2-1 USB VBUS
- External power sources: 3.3 V, 5V and 7 - 12 V
- One user LED
- One push-buttons: RESET
.. image:: img/nucleo_f303k8.jpg
:align: center
:alt: Nucleo F303K8
More information about the board can be found at the `Nucleo F303K8 website`_,
and in the `STM32 Nucleo-32 board User Manual`_.
Hardware
********
The Nucleo F303K8 provides the following hardware components:
- STM32F303K8T6 in LQFP32 package
- ARM |reg| 32-bit Cortex |reg| -M4 CPU with FPU
- 72 MHz max CPU frequency
- VDD from 2.0 V to 3.6 V
- 64 KB Flash
- 12 KB SRAM
- RTC
- Advanced-control Timer
- General Purpose Timers (5)
- Basic Timer (2)
- Watchdog Timers (2)
- PWM channels (12)
- SPI/I2S (1)
- I2C (1)
- USART/UART (2)
- CAN (1)
- GPIO with external interrupt capability
- DMA channels (7)
- Capacitive sensing channels (18)
- 12-bit ADC with 21 channels
- 12-bit D/A converter
- Analog comparator (3)
- Op amp
More information about the STM32F303K8 can be found here:
- `STM32F303K8 on www.st.com`_
- `STM32F303K8 reference manual`_
- `STM32F303K8 datasheet`_
Supported Features
==================
The Zephyr nucleo_f303k8 board configuration supports the following hardware
features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| PWM | on-chip | pwm |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| ADC | on-chip | ADC Controller |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported on this Zephyr port.
The default configuration can be found in
:zephyr_file:`boards/st/nucleo_f303k8/nucleo_f303k8_defconfig`
Connections and IOs
===================
The Nucleo F303K8 Board has 1 GPIO controller. This controllers is responsible
for input/output, pull-up, etc.
Board connectors:
-----------------
.. image:: img/nucleo_f303k8_pinout.jpg
:align: center
:alt: Nucleo F303K8 connectors
Default Zephyr Peripheral Mapping:
----------------------------------
The Nucleo F303K8 board features an Arduino Zero V3 connector. Board is configured as follows:
- UART_2 TX/RX : PA2/PA15 (ST-Link Virtual Port Com)
- I2C1 SCL/SDA : PB7/PB6
- SPI1 CS/SCK/MISO/MOSI : PA_4/PA_5/PA_6/PA_7
- LD2 : PB3
System Clock
------------
The Nucleo F303K8 System Clock can be driven by an internal or
external oscillator, as well as by the main PLL clock. By default the
System Clock is driven by the PLL clock at 72 MHz. The input to the
PLL is an 8 MHz internal clock supply.
Serial Port
-----------
The Nucleo F303K8 board has 2 UARTs. The Zephyr console output is assigned
to UART2. Default settings are 115200 8N1.
Programming and Debugging
*************************
The Nucleo F303K8 board includes an ST-LINK/V2-1 embedded debug tool interface.
This interface is supported by the openocd version included in Zephyr SDK.
.. _Nucleo F303K8 website:
path_to_url
.. _STM32 Nucleo-32 board User Manual:
path_to_url
.. _STM32F303K8 on www.st.com:
path_to_url
.. _STM32F303K8 reference manual:
path_to_url
.. _STM32F303K8 datasheet:
path_to_url
``` | /content/code_sandbox/boards/st/nucleo_f303k8/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,218 |
```unknown
# Kernel Options due to Low Memory (4k)
CONFIG_MAIN_STACK_SIZE=512
CONFIG_IDLE_STACK_SIZE=150
CONFIG_ISR_STACK_SIZE=512
CONFIG_LOG_BUFFER_SIZE=256
# Prevent Interrupt Vector Table in RAM
CONFIG_SRAM_VECTOR_TABLE=n
# Serial Drivers
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# GPIO Controller
CONFIG_GPIO=y
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/nucleo_f031k6/nucleo_f031k6_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 112 |
```cmake
board_runner_args(jlink "--device=STM32F031K6" "--speed=4000")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/st/nucleo_f031k6/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 56 |
```yaml
identifier: nucleo_f031k6
name: ST Nucleo F031K6
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 4
flash: 32
supported:
- adc
- i2c
- spi
- gpio
testing:
ignore_tags:
- net
- bluetooth
``` | /content/code_sandbox/boards/st/nucleo_f031k6/nucleo_f031k6.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 95 |
```unknown
config BOARD_NUCLEO_F031K6
select SOC_STM32F031X6
``` | /content/code_sandbox/boards/st/nucleo_f031k6/Kconfig.nucleo_f031k6 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 23 |
```restructuredtext
.. _b_u585i_iot02a_board:
ST B_U585I_IOT02A Discovery kit
###############################
Overview
********
The B_U585I_IOT02A Discovery kit features an ARM Cortex-M33 based STM32U585AI MCU
with a wide range of connectivity support and configurations. Here are
some highlights of the B_U585I_IOT02A Discovery kit:
- STM32U585AII6Q microcontroller featuring 2 Mbyte of Flash memory, 786 Kbytes of RAM in UFBGA169 package
- 512-Mbit octal-SPI Flash memory, 64-Mbit octal-SPI PSRAM, 256-Kbit I2C EEPROM
- USB FS, Sink and Source power, 2.5 W power capability
- 802.11 b/g/n compliant Wi-Fi module from MXCHIP
- Bluetooth Low Energy from STMicroelectronics
- MEMS sensors from STMicroelectronics
- 2 digital microphones
- Relative humidity and temperature sensor
- 3-axis magnetometer
- 3D accelerometer and 3D gyroscope
- Pressure sensor, 260-1260 hPa absolute digital output barometer
- Time-of-flight and gesture-detection sensor
- Ambient-light sensor
- 2 push-buttons (user and reset)
- 2 user LEDs
- Flexible power supply options:
- ST-LINK/V3
- USB Vbus
- External sources
.. image:: img/b-u585i-iot02a.jpg
:align: center
:alt: B_U585I_IOT02A Discovery kit
More information about the board can be found at the `B U585I IOT02A Discovery kit website`_.
Hardware
********
The STM32U585xx devices are an ultra-low-power microcontrollers family (STM32U5
Series) based on the high-performance Arm|reg| Cortex|reg|-M33 32-bit RISC core.
They operate at a frequency of up to 160 MHz.
- Ultra-low-power with FlexPowerControl (down to 300 nA Standby mode and 19.5 uA/MHz run mode)
- Core: ARM |reg| 32-bit Cortex |reg| -M33 CPU with TrustZone |reg| and FPU.
- Performance benchmark:
- 1.5 DMPIS/MHz (Drystone 2.1)
- 651 CoreMark |reg| (4.07 CoreMark |reg| /MHZ)
- Security and cryptography
- Arm |reg| TrustZone |reg| and securable I/Os memories and peripherals
- Flexible life cycle scheme with RDP (readout protection) and password protected debug
- Root of trust thanks to unique boot entry and secure hide protection area (HDP)
- Secure Firmware Installation thanks to embedded Root Secure Services
- Secure data storage with hardware unique key (HUK)
- Secure Firmware Update support with TF-M
- 2 AES coprocessors including one with DPA resistance
- Public key accelerator, DPA resistant
- On-the-fly decryption of Octo-SPI external memories
- HASH hardware accelerator
- Active tampers
- True Random Number Generator NIST SP800-90B compliant
- 96-bit unique ID
- 512-byte One-Time Programmable for user data
- Active tampers
- Clock management:
- 4 to 50 MHz crystal oscillator
- 32 kHz crystal oscillator for RTC (LSE)
- Internal 16 MHz factory-trimmed RC ( |plusminus| 1%)
- Internal low-power 32 kHz RC ( |plusminus| 5%)
- 2 internal multispeed 100 kHz to 48 MHz oscillators, including one auto-trimmed by
LSE (better than |plusminus| 0.25 % accuracy)
- 3 PLLs for system clock, USB, audio, ADC
- Internal 48 MHz with clock recovery
- Power management
- Embedded regulator (LDO)
- Embedded SMPS step-down converter supporting switch on-the-fly and voltage scaling
- RTC with HW calendar and calibration
- Up to 136 fast I/Os, most 5 V-tolerant, up to 14 I/Os with independent supply down to 1.08 V
- Up to 24 capacitive sensing channels: support touchkey, linear and rotary touch sensors
- Up to 17 timers and 2 watchdogs
- 2x 16-bit advanced motor-control
- 2x 32-bit and 5 x 16-bit general purpose
- 4x low-power 16-bit timers (available in Stop mode)
- 2x watchdogs
- 2x SysTick timer
- ART accelerator
- 8-Kbyte instruction cache allowing 0-wait-state execution from Flash and
external memories: up to 160 MHz, MPU, 240 DMIPS and DSP
- 4-Kbyte data cache for external memories
- Memories
- 2-Mbyte Flash memory with ECC, 2 banks read-while-write, including 512 Kbytes with 100 kcycles
- 786-Kbyte SRAM with ECC OFF or 722-Kbyte SRAM including up to 322-Kbyte SRAM with ECC ON
- External memory interface supporting SRAM, PSRAM, NOR, NAND and FRAM memories
- 2 Octo-SPI memory interfaces
- Rich analog peripherals (independent supply)
- 14-bit ADC 2.5-Msps, resolution up to 16 bits with hardware oversampling
- 12-bit ADC 2.5-Msps, with hardware oversampling, autonomous in Stop 2 mode
- 12-bit DAC, low-power sample and hold
- 2 operational amplifiers with built-in PGA
- 2 ultra-low-power comparators
- Up to 22 communication interfaces
- USB Type-C / USB power delivery controller
- USB OTG 2.0 full-speed controller
- 2x SAIs (serial audio interface)
- 4x I2C FM+(1 Mbit/s), SMBus/PMBus
- 6x USARTs (ISO 7816, LIN, IrDA, modem)
- 3x SPIs (5x SPIs with dual OCTOSPI in SPI mode)
- 1x FDCAN
- 2x SDMMC interface
- 16- and 4-channel DMA controllers, functional in Stop mode
- 1 multi-function digital filter (6 filters)+ 1 audio digital filter with
sound-activity detection
- CRC calculation unit
- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell |trade|
- True Random Number Generator (RNG)
- Graphic features
- Chrom-ART Accelerator (DMA2D) for enhanced graphic content creation
- 1 digital camera interface
- Mathematical co-processor
- CORDIC for trigonometric functions acceleration
- FMAC (filter mathematical accelerator)
More information about STM32U585AI can be found here:
- `STM32U585 on www.st.com`_
- `STM32U585 reference manual`_
Supported Features
==================
The Zephyr b_u585i_iot02a board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| RNG | on-chip | True Random number generator |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| DAC | on-chip | dac |
+-----------+------------+-------------------------------------+
| ADC | on-chip | adc |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | independent watchdog |
+-----------+------------+-------------------------------------+
| USB | on-chip | usb_device |
+-----------+------------+-------------------------------------+
| BKP SRAM | on-chip | Backup SRAM |
+-----------+------------+-------------------------------------+
| PWM | on-chip | pwm |
| die-temp | on-chip | die temperature sensor |
+-----------+------------+-------------------------------------+
| AES | on-chip | crypto |
+-----------+------------+-------------------------------------+
| RADIO | STM32WB5MMG| Bluetooth Low Energy (BLE) |
+-----------+------------+-------------------------------------+
| RTC | on-chip | rtc |
+-----------+------------+-------------------------------------+
The default configuration can be found in the defconfig file:
:zephyr_file:`boards/st/b_u585i_iot02a/b_u585i_iot02a_defconfig`
Zephyr board options
====================
The STM32U585i is an SoC with Cortex-M33 architecture. Zephyr provides support
for building for both Secure and Non-Secure firmware.
The BOARD options are summarized below:
+-------------------------------+-------------------------------------------+
| BOARD | Description |
+===============================+===========================================+
| b_u585i_iot02a | For building Trust Zone Disabled firmware |
+-------------------------------+-------------------------------------------+
| b_u585i_iot02a/stm32u585xx/ns | For building Non-Secure firmware |
+-------------------------------+-------------------------------------------+
Here are the instructions to build Zephyr with a non-secure configuration,
using `tfm_ipc_` sample:
.. code-block:: bash
$ west build -b b_u585i_iot02a/stm32u585xx/ns samples/tfm_integration/tfm_ipc/
Once done, before flashing, you need to first run a generated script that
will set platform option bytes config and erase platform (among others,
option bit TZEN will be set).
.. code-block:: bash
$ ./build/tfm/api_ns/regression.sh
$ west flash
Please note that, after having run a TFM sample on the board, you will need to
run `./build/tfm/api_ns/regression.sh` once more to clean up the board from secure
options and get back the platform back to a "normal" state and be able to run
usual, non-TFM, binaries.
Also note that, even then, TZEN will remain set, and you will need to use
STM32CubeProgrammer_ to disable it fully, if required.
Connections and IOs
===================
B_U585I_IOT02A Discovery kit has 9 GPIO controllers (from A to I). These controllers are responsible for pin muxing,
input/output, pull-up, etc.
For more details please refer to `B U585I IOT02A board User Manual`_.
Default Zephyr Peripheral Mapping:
----------------------------------
- UART_1 TX/RX : PA9/PA10 (ST-Link Virtual Port Com)
- LD1 : PH7
- LD2 : PH6
- user button : PC13
- SPI1 NSS/SCK/MISO/MOSI : PE12/P13/P14/P15 (Arduino SPI)
- I2C_1 SDA/SDL : PB9/PB8 (Arduino I2C)
- I2C_2 SDA/SDL : PH5/PH4
- DAC1 CH1 : PA4 (STMOD+1)
- ADC1_IN15 : PB0
- USB OTG : PA11/PA12
- PWM4 : CN14 PB6
- PWM3 : CN4 PE4
System Clock
------------
B_U585I_IOT02A Discovery System Clock could be driven by an internal or external oscillator,
as well as the main PLL clock. By default the System clock is driven by the PLL clock at 80MHz,
driven by 16MHz high speed internal oscillator.
Serial Port
-----------
B_U585I_IOT02A Discovery kit has 4 U(S)ARTs. The Zephyr console output is assigned to UART1.
Default settings are 115200 8N1.
Backup SRAM
-----------
In order to test backup SRAM you may want to disconnect VBAT from VDD. You can
do it by removing ``SB6`` jumper on the back side of the board.
Programming and Debugging
*************************
B_U585I_IOT02A Discovery kit includes an ST-LINK/V3 embedded debug tool interface.
This probe allows to flash the board using various tools.
Flashing
========
Board is configured to be flashed using west STM32CubeProgrammer runner.
Installation of `STM32CubeProgrammer`_ is then required to flash the board.
Alternatively, openocd (provided in Zephyr SDK), JLink and pyocd can also be
used to flash and debug the board if west is told to use it as runner,
using ``-r openocd``.
Connect the B_U585I_IOT02A Discovery kit to your host computer using the USB
port, then run a serial host program to connect with your Discovery
board. For example:
.. code-block:: console
$ minicom -D /dev/ttyACM0
Then, build and flash in the usual way. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: b_u585i_iot02a
:goals: build flash
You should see the following message on the console:
.. code-block:: console
Hello World! arm
Debugging
=========
Default flasher for this board is openocd. It could be used in the usual way.
Here is an example for the :zephyr:code-sample:`blinky` application.
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: b_u585i_iot02a
:goals: debug
Disabling TrustZone |reg| on the board
======================================
If you have flashed a sample to the board that enables TrustZone, you will need
to disable it before you can flash and run a new non-TrustZone sample on the
board.
To disable TrustZone, it's necessary to change AT THE SAME TIME the ``TZEN``
and ``RDP`` bits. ``TZEN`` needs to get set from 1 to 0 and ``RDP``,
needs to be set from ``DC`` to ``AA`` (step 3 below).
This is docummented in the `AN5347, in section 9`_, "TrustZone deactivation".
However, it's possible that the ``RDP`` bit is not yet set to ``DC``, so you
first need to set it to ``DC`` (step 2).
Finally you need to set the "Write Protection 1 & 2" bytes properly, otherwise
some memory regions won't be erasable and mass erase will fail (step 4).
The following command sequence will fully deactivate TZ:
Step 1:
Ensure U23 BOOT0 switch is set to 1 (switch is on the left, assuming you read
"BOOT0" silkscreen label from left to right). You need to press "Reset" (B2 RST
switch) after changing the switch to make the change effective.
Step 2:
.. code-block:: console
$ STM32_Programmer_CLI -c port=/dev/ttyACM0 -ob rdp=0xDC
Step 3:
.. code-block:: console
$ STM32_Programmer_CLI -c port=/dev/ttyACM0 -tzenreg
Step 4:
.. code-block:: console
$ STM32_Programmer_CLI -c port=/dev/ttyACM0 -ob wrp1a_pstrt=0x7f
$ STM32_Programmer_CLI -c port=/dev/ttyACM0 -ob wrp1a_pend=0x0
$ STM32_Programmer_CLI -c port=/dev/ttyACM0 -ob wrp1b_pstrt=0x7f
$ STM32_Programmer_CLI -c port=/dev/ttyACM0 -ob wrp1b_pend=0x0
$ STM32_Programmer_CLI -c port=/dev/ttyACM0 -ob wrp2a_pstrt=0x7f
$ STM32_Programmer_CLI -c port=/dev/ttyACM0 -ob wrp2a_pend=0x0
$ STM32_Programmer_CLI -c port=/dev/ttyACM0 -ob wrp2b_pstrt=0x7f
$ STM32_Programmer_CLI -c port=/dev/ttyACM0 -ob wrp2b_pend=0x0
.. _B U585I IOT02A Discovery kit website:
path_to_url
.. _B U585I IOT02A board User Manual:
path_to_url
.. _STM32U585 on www.st.com:
path_to_url
.. _STM32U585 reference manual:
path_to_url
.. _STM32CubeProgrammer:
path_to_url
.. _STMicroelectronics customized version of OpenOCD:
path_to_url
.. _AN5347, in section 9:
path_to_url
``` | /content/code_sandbox/boards/st/b_u585i_iot02a/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 3,852 |
```yaml
board:
name: nucleo_f031k6
vendor: st
socs:
- name: stm32f031x6
``` | /content/code_sandbox/boards/st/nucleo_f031k6/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 33 |
```ini
source [find board/st_nucleo_f0.cfg]
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
``` | /content/code_sandbox/boards/st/nucleo_f031k6/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 70 |
```restructuredtext
.. _nucleo_f031k6_board:
ST Nucleo F031K6
################
Overview
********
The STM32 Nucleo-32 development board with STM32F031K6 MCU, supports Arduino nano connectivity.
The STM32 Nucleo board provides an affordable, and flexible way for users to try out new concepts,
and build prototypes with the STM32 microcontroller, choosing from the various
combinations of performance, power consumption and features.
The STM32 Nucleo board integrates the ST-LINK/V2-1 debugger and programmer.
The STM32 Nucleo board comes with the STM32 comprehensive software HAL library together
with various packaged software examples.
.. image:: img/nucleo_f031k6.jpg
:align: center
:alt: Nucleo F031k6
More information about the board can be found at the `Nucleo F031K6 website`_.
Hardware
********
Nucleo F031K6 provides the following hardware components:
- STM32 microcontroller in LQFP32 package
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector:
- Flexible board power supply:
- USB VBUS or external source (3.3V, 5V, 7 - 12V)
- Three LEDs:
- USB communication (LD1), user LED (LD2), power LED (LD3)
- reset push button
More information about STM32F031K6 can be found here:
- `STM32F031 reference manual`_
- `STM32F031 data sheet`_
Supported Features
==================
The Zephyr nucleo_f031k6 board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| CLOCK | on-chip | reset and clock control |
+-----------+------------+-------------------------------------+
| FLASH | on-chip | flash memory |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c controller |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi controller |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported in this Zephyr port.
The default configuration can be found in
:zephyr_file:`boards/st/nucleo_f031k6/nucleo_f031k6_defconfig`
Connections and IOs
===================
Each of the GPIO pins can be configured by software as output (push-pull or open-drain), as
input (with or without pull-up or pull-down), or as peripheral alternate function. Most of the
GPIO pins are shared with digital or analog alternate functions.
Board connectors:
-----------------
.. image:: img/nucleo_f031k6_connectors.jpg
:align: center
:alt: Nucleo F031K6 connectors
Default Zephyr Peripheral Mapping:
----------------------------------
- UART_1 TX/RX : PA2/PA15 (ST-Link Virtual COM Port)
- I2C1 SCL/SDA : PB6/PB7 (Arduino I2C)
- SPI1 NSS/SCK/MISO/MOSI : PA4/PA5/PA6/PA7 (Arduino SPI)
- LD2 : PB3
For more details please refer to `STM32 Nucleo-32 board User Manual`_.
Programming and Debugging
*************************
Applications for the ``nucleo_f031k6`` board configuration can be built and
flashed in the usual way (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Flashing
========
Nucleo F031K6 board includes an ST-LINK/V2-1 embedded debug tool interface.
This interface is supported by the openocd version included in the Zephyr SDK.
Flashing an application to Nucleo F030R8
----------------------------------------
Here is an example for the :zephyr:code-sample:`blinky` application.
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: nucleo_f031k6
:goals: build flash
You will see the LED blinking every second.
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:zephyr:code-sample:`blinky` application.
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: nucleo_f031k6
:maybe-skip-config:
:goals: debug
References
**********
.. target-notes::
.. _Nucleo F031K6 website:
path_to_url
.. _STM32F031 reference manual:
path_to_url
.. _STM32F031 data sheet:
path_to_url
.. _STM32 Nucleo-32 board User Manual:
path_to_url
``` | /content/code_sandbox/boards/st/nucleo_f031k6/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,162 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/f0/stm32f031X6.dtsi>
#include <st/f0/stm32f031k6tx-pinctrl.dtsi>
/ {
model = "STMicroelectronics STM32F031K6-NUCLEO board";
compatible = "st,stm32f031k6-nucleo";
chosen {
zephyr,console = &usart1;
zephyr,shell-uart = &usart1;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
};
leds: leds {
compatible = "gpio-leds";
green_led_3: led_3 {
gpios = <&gpiob 3 GPIO_ACTIVE_HIGH>;
label = "User LD3";
};
};
pwmleds {
compatible = "pwm-leds";
green_pwm_led: green_pwm_led {
pwms = <&pwm2 2 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
};
};
aliases {
led0 = &green_led_3;
pwm-led0 = &green_pwm_led;
volt-sensor0 = &vref;
volt-sensor1 = &vbat;
};
};
&clk_lsi {
status = "okay";
};
&clk_hsi {
status = "okay";
};
&pll {
prediv = <4>;
mul = <12>;
clocks = <&clk_hsi>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(48)>;
ahb-prescaler = <1>;
apb1-prescaler = <1>;
};
/* Due to limited available memory, don't enable gpiod and gpiof */
/* (Test cases fail due to 'SRAM' region overflow) */
&gpiod {status = "disabled";};
&gpiof {status = "disabled";};
&timers2 {
status = "okay";
pwm2: pwm {
status = "okay";
pinctrl-0 = <&tim2_ch2_pb3>;
pinctrl-names = "default";
};
};
&usart1 {
pinctrl-0 = <&usart1_tx_pa2 &usart1_rx_pa15>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&i2c1 {
pinctrl-0 = <&i2c1_scl_pb6 &i2c1_sda_pb7>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
&spi1 {
pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pa5
&spi1_miso_pa6 &spi1_mosi_pa7>;
pinctrl-names = "default";
status = "okay";
};
&adc1 {
pinctrl-0 = <&adc_in0_pa0>;
pinctrl-names = "default";
st,adc-clock-source = <SYNC>;
st,adc-prescaler = <4>;
status = "okay";
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>,
<&rcc STM32_SRC_LSI RTC_SEL(2)>;
status = "okay";
};
&vref {
status = "okay";
};
&vbat {
status = "okay";
};
``` | /content/code_sandbox/boards/st/nucleo_f031k6/nucleo_f031k6.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 763 |
```cmake
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
board_runner_args(openocd "--config=${BOARD_DIR}/support/openocd.cfg")
``` | /content/code_sandbox/boards/st/stm32mp157c_dk2/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 37 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/mp1/stm32mp157.dtsi>
#include <st/mp1/stm32mp157cacx-pinctrl.dtsi>
#include "arduino_r3_connector.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "STMicroelectronics STM32MP157-DK2 board";
compatible = "st,stm32mp157c-dk2";
chosen {
/*
* By default, Zephyr console and shell are assigned to
* remoteproc. To enable console and shell over UART, uncomment
* following lines and set the correct config in
* stm32mp157c_dk2_defconfig "Serial Port" section in Zephyr
* board documentation.
* zephyr,console = &usart3;
* zephyr,shell-uart = &usart3;
*/
zephyr,flash = &retram;
zephyr,sram = &mcusram;
};
leds {
compatible = "gpio-leds";
red_led_1: led_1 {
gpios = <&gpioh 7 GPIO_ACTIVE_HIGH>;
label = "LD7";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button {
label = "User 1";
gpios = <&gpioa 14 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_0>;
};
};
aliases {
led0 = &red_led_1;
sw0 = &user_button;
};
};
&rcc {
clock-frequency = <DT_FREQ_M(209)>;
};
&spi4_miso_pe13{ slew-rate = "very-high-speed"; };
&spi4{
pinctrl-0 = <&spi4_nss_pe11 &spi4_sck_pe12
&spi4_miso_pe13 &spi4_mosi_pe14>;
pinctrl-names = "default";
status = "okay";
};
&spi5_miso_pf8{ slew-rate = "very-high-speed"; };
&spi5{
pinctrl-0 = <&spi5_nss_pf6 &spi5_sck_pf7
&spi5_miso_pf8 &spi5_mosi_pf9>;
pinctrl-names = "default";
status = "okay";
};
&usart3 {
pinctrl-0 = <&usart3_tx_pb10 &usart3_rx_pb12>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&uart7 {
pinctrl-0 = <&uart7_tx_pe8 &uart7_rx_pe7>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&mailbox {
status = "okay";
};
&i2c5 {
pinctrl-0 = <&i2c5_scl_pa11 &i2c5_sda_pa12>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
``` | /content/code_sandbox/boards/st/stm32mp157c_dk2/stm32mp157c_dk2.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 682 |
```yaml
board:
name: stm32mp157c_dk2
vendor: st
socs:
- name: stm32mp157cxx
``` | /content/code_sandbox/boards/st/stm32mp157c_dk2/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 34 |
```unknown
config BOARD_STM32MP157C_DK2
select SOC_STM32MP15_M4
``` | /content/code_sandbox/boards/st/stm32mp157c_dk2/Kconfig.stm32mp157c_dk2 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 24 |
```unknown
# STM32MP157 discovery board configuration
if BOARD_STM32MP157C_DK2
config SPI_STM32_INTERRUPT
default y
depends on SPI
config CLOCK_STM32_HSE_CLOCK
default 24000000
endif # BOARD_STM32MP157_Dk2
``` | /content/code_sandbox/boards/st/stm32mp157c_dk2/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 64 |
```yaml
identifier: stm32mp157c_dk2
name: ST STM32MP157C-DK2 Discovery
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- arduino_i2c
- arduino_gpio
- gpio
- shell
- i2c
- spi
testing:
ignore_tags:
- cmsis_rtos_v2
- net
- mpu
- tinycrypt
- crypto
- aes
- cmm
- LED
- nfc
ram: 256
flash: 64
vendor: st
``` | /content/code_sandbox/boards/st/stm32mp157c_dk2/stm32mp157c_dk2.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 155 |
```unknown
# enable GPIO
CONFIG_GPIO=y
# Enable MPU
CONFIG_ARM_MPU=y
# Enable HW stack protection
CONFIG_HW_STACK_PROTECTION=y
# enable uart driver
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
# clock configuration
CONFIG_CLOCK_CONTROL=y
# console (remote proc console by default)
CONFIG_CONSOLE=y
CONFIG_RAM_CONSOLE=y
CONFIG_RAM_CONSOLE_BUFFER_SIZE=1024
# uart console (overrides remote proc console)
CONFIG_UART_CONSOLE=n
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/stm32mp157c_dk2/stm32mp157c_dk2_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 108 |
```unknown
/*
*
*/
/ {
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpiof 14 0>, /* A0 */
<1 0 &gpiof 13 0>, /* A1 */
/* ANA0 is not a GPIO A2 */
/* ANA1 is not a GPIO A3 */
<4 0 &gpioc 3 0>, /* A4 */
<5 0 &gpiof 12 0>, /* A5 */
<6 0 &gpioe 7 0>, /* D0 */
<7 0 &gpioe 8 0>, /* D1 */
<8 0 &gpioe 1 0>, /* D2 */
<9 0 &gpiod 14 0>, /* D3 */
<10 0 &gpioe 10 0>, /* D4 */
<11 0 &gpiod 15 0>, /* D5 */
<12 0 &gpioe 9 0>, /* D6 */
<13 0 &gpiod 1 0>, /* D7 */
<14 0 &gpiog 3 0>, /* D8 */
<15 0 &gpioh 6 0>, /* D9 */
<16 0 &gpioe 11 0>, /* D10 */
<17 0 &gpioe 14 0>, /* D11 */
<18 0 &gpioe 13 0>, /* D12 */
<19 0 &gpioe 12 0>, /* D13 */
<20 0 &gpioa 12 0>, /* D14 */
<21 0 &gpioa 11 0>; /* D15 */
};
};
arduino_i2c: &i2c5 {};
arduino_serial: &uart7 {};
arduino_spi: &spi4 {};
``` | /content/code_sandbox/boards/st/stm32mp157c_dk2/arduino_r3_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 483 |
```ini
source [find board/stm32mp15x_dk2.cfg]
# By default the port 3333 is assigned for the Cortex-A debug. Disable them
stm32mp15x.cpu0 configure -gdb-port disabled
stm32mp15x.cpu1 configure -gdb-port disabled
targets stm32mp15x.cm4
``` | /content/code_sandbox/boards/st/stm32mp157c_dk2/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 72 |
```cmake
board_runner_args(jlink "--device=STM32L476VG" "--speed=4000")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/st/stm32l476g_disco/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 55 |
```unknown
/*
*
* Based on stm32l496g_disco:
*
*
*/
/dts-v1/;
#include <st/l4/stm32l476Xg.dtsi>
#include <st/l4/stm32l476v(c-e-g)tx-pinctrl.dtsi>
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "STMicroelectronics STM32L476G-DISCO board";
compatible = "st,stm32l476g-disco";
chosen {
zephyr,console = &usart2;
zephyr,shell-uart = &usart2;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
};
leds {
compatible = "gpio-leds";
green_led_4: led_4 {
gpios = <&gpiob 2 GPIO_ACTIVE_HIGH>;
label = "User LD4";
};
green_led_5: led_5 {
gpios = <&gpioe 8 GPIO_ACTIVE_HIGH>;
label = "User LD5";
};
};
gpio_keys {
compatible = "gpio-keys";
joy_center: joystick_center {
label = "joystick center";
gpios = <&gpioa 0 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
zephyr,code = <INPUT_KEY_ENTER>;
};
joy_down: joystick_down {
label = "joystick down";
gpios = <&gpioa 5 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
zephyr,code = <INPUT_KEY_DOWN>;
};
joy_up: joystick_up {
label = "joystick up";
gpios = <&gpioa 3 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
zephyr,code = <INPUT_KEY_UP>;
};
joy_left: joystick_left {
label = "joystick left";
gpios = <&gpioa 1 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
zephyr,code = <INPUT_KEY_LEFT>;
};
joy_right: joystick_right {
label = "joystick right";
gpios = <&gpioa 2 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
zephyr,code = <INPUT_KEY_RIGHT>;
};
};
aliases {
led0 = &green_led_4;
sw0 = &joy_center;
};
};
&clk_lsi {
status = "okay";
};
&clk_hsi {
status = "okay";
};
&pll {
div-m = <1>;
mul-n = <20>;
div-p = <7>;
div-q = <2>;
div-r = <4>;
clocks = <&clk_hsi>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(80)>;
ahb-prescaler = <1>;
apb1-prescaler = <1>;
apb2-prescaler = <1>;
};
&usart2 {
pinctrl-0 = <&usart2_tx_pd5 &usart2_rx_pd6>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>,
<&rcc STM32_SRC_LSI RTC_SEL(2)>;
status = "okay";
backup_regs {
status = "okay";
};
};
``` | /content/code_sandbox/boards/st/stm32l476g_disco/stm32l476g_disco.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 768 |
```yaml
identifier: stm32l476g_disco
name: ST STM32L476G Discovery
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 96
flash: 1024
supported:
- gpio
- counter
vendor: st
``` | /content/code_sandbox/boards/st/stm32l476g_disco/stm32l476g_disco.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 76 |
```yaml
board:
name: stm32l476g_disco
vendor: st
socs:
- name: stm32l476xx
``` | /content/code_sandbox/boards/st/stm32l476g_disco/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 33 |
```unknown
config BOARD_STM32L476G_DISCO
select SOC_STM32L476XX
``` | /content/code_sandbox/boards/st/stm32l476g_disco/Kconfig.stm32l476g_disco | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 22 |
```unknown
# Enable MPU
CONFIG_ARM_MPU=y
# Enable HW stack protection
CONFIG_HW_STACK_PROTECTION=y
# enable uart driver
CONFIG_SERIAL=y
# enable GPIO
CONFIG_GPIO=y
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/stm32l476g_disco/stm32l476g_disco_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 74 |
```ini
source [find board/stm32l4discovery.cfg]
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
``` | /content/code_sandbox/boards/st/stm32l476g_disco/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 68 |
```restructuredtext
.. _stm32mp157c_dk2_board:
ST STM32MP157C-DK2 Discovery
############################
Overview
********
The STM32MP157-DK2 Discovery board leverages the capacities of the STM32MP157
multi-core processor,composed of a dual Cortex-A7 and a single Cortex-M4 core.
Zephyr OS is ported to run on the Cortex-M4 core.
- Common features:
- STM32MP157:
- Arm-based dual Cortex-A7 32 bits
- Cortex-M4 32 bits
- embedded SRAM (448 Kbytes) for Cortex-M4.
- ST PMIC STPMIC1A
- 4-Gbit DDR3L, 16 bits, 533 MHz
- 1-Gbps Ethernet (RGMII) compliant with IEEE-802.3ab
- USB OTG HS
- Audio CODEC, with a stereo headset jack, including analog microphone input
- 4 user LEDs
- 2 user and reset push-buttons, 1 wake-up button
- 5 V / 3 A USB Type-CTM power supply input (not provided)
- Board connectors:
- Ethernet RJ45
- 4 USB Host Type-A
- USB Type-C
- DRP MIPI DSI HDMI
- Stereo headset jack including analog microphone input
- microSD card
- GPIO expansion connector (Raspberry Pi shields capability)
- ArduinoTM Uno V3 expansion connectors
- On-board ST-LINK/V2-1 debugger/programmer with USB re-enumeration
capability: Virtual COM port and debug port
- Board-specific features:
- 4" TFT 480800 pixels with LED backlight, MIPI DSI interface, and capacitive
touch panel
- Wi-Fi 802.11b/g/n
- Bluetooth Low Energy 4.1
.. image:: img/en.stm32mp157c-dk2.jpg
:align: center
:alt: STM32MP157C-DK2 Discovery
More information about the board can be found at the
`STM32P157C Discovery website`_.
Hardware
********
The STM32MP157 SoC provides the following hardware capabilities:
- Core:
- 32-bit dual-core Arm Cortex-A7
- L1 32-Kbyte I / 32-Kbyte D for each core
- 256-Kbyte unified level 2 cache
- Arm NEON and Arm TrustZone
- 32-bit Arm Cortex-M4 with FPU/MPU
- Up to 209 MHz (Up to 703 CoreMark)
- Memories:
- External DDR memory up to 1 Gbyte.
- 708 Kbytes of internal SRAM: 256 KB of AXI SYSRAM + 384 KB of AHB SRAM +
64 KB of AHB SRAM in backup domain.
- Dual mode Quad-SPI memory interface
- Flexible external memory controller with up to 16-bit data bus
- Security/safety:
- Secure boot, TrustZone peripherals with Cortex-M4 resources isolation
- Clock management:
- Internal oscillators: 64 MHz HSI oscillator, 4 MHz CSI oscillator, 32 kHz
LSI oscillator
- External oscillators: 8-48 MHz HSE oscillator, 32.768 kHz LSE oscillator
- 6 PLLs with fractional mode
- General-purpose input/outputs:
- Up to 176 I/O ports with interrupt capability
- Interconnect matrix
- 3 DMA controllers
- Communication peripherals:
- 6 I2C FM+ (1 Mbit/s, SMBus/PMBus)
- 4 UART + 4 USART (12.5 Mbit/s, ISO7816 interface, LIN, IrDA, SPI slave)
- 6 SPI (50 Mbit/s, including 3 with full duplex I2S audio class accuracy)
- 4 SAI (stereo audio: I2S, PDM, SPDIF Tx)
- SPDIF Rx with 4 inputs
- HDMI-CEC interface
- MDIO Slave interface
- 3 SDMMC up to 8-bit (SD / eMMC / SDIO)
- 2 CAN controllers supporting CAN FD protocol, TTCAN capability
- 2 USB 2.0 high-speed Host+ 1 USB 2.0 full-speed OTG simultaneously
- 10/100M or Gigabit Ethernet GMAC (IEEE 1588v2 hardware, MII/RMII/GMII/RGMI)
- 8- to 14-bit camera interface up to 140 Mbyte/s
- 6 analog peripherals
- 2 ADCs with 16-bit max. resolution.
- 1 temperature sensor
- 2 12-bit D/A converters (1 MHz)
- 1 digital filters for sigma delta modulator (DFSDM) with 8 channels/6
filters
- Internal or external ADC/DAC reference VREF+
- Graphics:
- 3D GPU: Vivante - OpenGL ES 2.0
- LCD-TFT controller, up to 24-bit // RGB888, up to WXGA (1366 768) @60 fps
- MIPI DSI 2 data lanes up to 1 GHz each
- Timers:
- 2 32-bit timers with up to 4 IC/OC/PWM or pulse counter and quadrature
(incremental) encoder input
- 2 16-bit advanced motor control timers
- 10 16-bit general-purpose timers (including 2 basic timers without PWM)
- 5 16-bit low-power timers
- RTC with sub-second accuracy and hardware calendar
- 2 4 Cortex-A7 system timers (secure, non-secure, virtual, hypervisor)
- 1 SysTick Cortex-M4 timer
- Hardware acceleration:
- AES 128, 192, 256, TDES
- HASH (MD5, SHA-1, SHA224, SHA256), HMAC
- 2 true random number generator (3 oscillators each)
- 2 CRC calculation unit
- Debug mode:
- Arm CoreSight trace and debug: SWD and JTAG interfaces
- 8-Kbyte embedded trace buffer
- 3072-bit fuses including 96-bit unique ID, up to 1184-bit available for user
More information about STM32P157C can be found here:
- `STM32MP157C on www.st.com`_
- `STM32MP157C reference manual`_
Supported Features
==================
The Zephyr stm32mp157c_dk2 board configuration supports the following hardware
features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
The default configuration can be found in
:zephyr_file:`boards/st/stm32mp157c_dk2/stm32mp157c_dk2_defconfig`
Connections and IOs
===================
STM32MP157C-DK2 Discovery Board schematic is available here:
`STM32MP157C Discovery board schematics`_.
Default Zephyr Peripheral Mapping:
----------------------------------
- USART_3 TX/RX : PB10/PB12 (UART console)
- UART_7 TX/RX : PE8/PE7 (Arduino Serial)
- I2C5 SCL/SDA : PA11/PA12 (Arduino I2C)
- SPI4 SCK/MISO/MOSI : PE12/PE13/PE14 (Arduino SPI)
- SPI5 SCK/MISO/MOSI : PF7/PF8/PF9
System Clock
------------
The Cortex-M4 Core is configured to run at a 209 MHz clock speed. This value
must match the configured mlhclk_ck frequency.
Serial Port
-----------
The STM32MP157C-DK2 Discovery board has 8 U(S)ARTs.
The Zephyr console output is assigned by default to the RAM console to be dumped
by the Linux Remoteproc Framework on Cortex-A7 core. In order to keep the UART7
free for future serial interactions with Arduino shield, the Zephyr UART console
output is USART3 and is disabled by default. UART console can be enable through
board's devicetree and stm32mp157c_dk2_defconfig board file (or prj.conf
project files), and will disable existing RAM console output. Default UART
console settings are 115200 8N1.
Programming and Debugging
*************************
The STM32MP157C doesn't have QSPI flash for the Cortex-M4 and it needs to be
started by the Cortex-A7 core. The Cortex-A7 core is responsible to load the
Cortex-M4 binary application into the RAM, and get the Cortex-M4 out of reset.
The Cortex-A7 can perform these steps at bootloader level or after the Linux
system has booted.
The Cortex-M4 can use up to 2 different RAMs. The program pointer starts at
address 0x00000000 (RETRAM), the vector table should be loaded at this address
These are the memory mappings for Cortex-A7 and Cortex-M4:
+------------+-----------------------+------------------------+----------------+
| Region | Cortex-A7 | Cortex-M4 | Size |
+============+=======================+========================+================+
| RETRAM | 0x38000000-0x3800FFFF | 0x00000000-0x0000FFFF | 64KB |
+------------+-----------------------+------------------------+----------------+
| MCUSRAM | 0x10000000-0x1005FFFF | 0x10000000-0x1005FFFF | 384KB |
+------------+-----------------------+------------------------+----------------+
| DDR | 0xC0000000-0xFFFFFFFF | | up to 1 GB |
+------------+-----------------------+------------------------+----------------+
Refer to `stm32mp157c boot Cortex-M4 firmware`_ wiki page for instruction
to load and start the Cortex-M4 firmware.
Debugging
=========
You can debug an application using OpenOCD and GDB. The Solution proposed below
is based on the attach to a preloaded firmware, available only for a Linux
environment. The firmware must first be loaded by the Cortex-A7. Developer
then attaches the debugger to the running Zephyr using OpenOCD.
Principle is to attach to the firmware already loaded by the Linux.
- Build the sample:
.. code-block:: console
west build -b stm32mp157c_dk2 samples/hello_world
- Copy the firmware on the target filesystem, load it and start it (`stm32mp157c boot Cortex-M4 firmware`_).
- Attach to the target:
.. code-block:: console
west attach
.. _STM32P157C Discovery website:
path_to_url
.. _STM32MP157C Discovery board User Manual:
path_to_url
.. _STM32MP157C Discovery board schematics:
path_to_url
.. _STM32MP157C on www.st.com:
path_to_url
.. _STM32MP157C reference manual:
path_to_url
.. _stm32mp1 developer package:
path_to_url#Installing_the_SDK
.. _stm32mp157c boot Cortex-M4 firmware:
path_to_url#How_to_use_the_framework
``` | /content/code_sandbox/boards/st/stm32mp157c_dk2/doc/stm32mp157_dk2.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,651 |
```unknown
/*
*/
#include <zephyr/dt-bindings/gpio/gpio.h>
#include <zephyr/dt-bindings/gpio/st-morpho-header.h>
/ {
st_morpho_header: st-morpho-header {
compatible = "st-morpho-header";
#gpio-cells = <2>;
gpio-map-mask = <ST_MORPHO_PIN_MASK 0x0>;
gpio-map-pass-thru = <0x0 GPIO_DT_FLAGS_MASK>;
gpio-map = <ST_MORPHO_L_1 0 &gpioc 10 0>,
<ST_MORPHO_L_2 0 &gpioc 11 0>,
<ST_MORPHO_L_3 0 &gpioc 12 0>,
<ST_MORPHO_L_4 0 &gpiod 2 0>,
<ST_MORPHO_L_13 0 &gpioa 13 0>,
<ST_MORPHO_L_15 0 &gpioa 14 0>,
<ST_MORPHO_L_17 0 &gpioa 15 0>,
<ST_MORPHO_L_21 0 &gpiob 7 0>,
<ST_MORPHO_L_23 0 &gpioc 13 0>,
<ST_MORPHO_L_25 0 &gpioc 14 0>,
<ST_MORPHO_L_27 0 &gpioc 15 0>,
<ST_MORPHO_L_28 0 &gpioa 0 0>,
<ST_MORPHO_L_29 0 &gpiof 0 0>,
<ST_MORPHO_L_30 0 &gpioa 1 0>,
<ST_MORPHO_L_31 0 &gpiof 1 0>,
<ST_MORPHO_L_32 0 &gpioa 4 0>,
<ST_MORPHO_L_34 0 &gpiob 0 0>,
<ST_MORPHO_L_35 0 &gpioc 2 0>,
<ST_MORPHO_L_36 0 &gpioc 1 0>, /* SB56=ON, SB46=OFF */
<ST_MORPHO_L_37 0 &gpioc 3 0>,
<ST_MORPHO_L_38 0 &gpioc 0 0>, /* SB51=ON, SB52=OFF */
<ST_MORPHO_R_1 0 &gpioc 9 0>,
<ST_MORPHO_R_2 0 &gpioc 8 0>,
<ST_MORPHO_R_3 0 &gpiob 8 0>,
<ST_MORPHO_R_4 0 &gpioc 6 0>,
<ST_MORPHO_R_5 0 &gpiob 9 0>,
<ST_MORPHO_R_6 0 &gpioc 5 0>,
<ST_MORPHO_R_11 0 &gpiob 13 0>,
<ST_MORPHO_R_12 0 &gpioa 12 0>,
<ST_MORPHO_R_13 0 &gpiob 14 0>,
<ST_MORPHO_R_14 0 &gpioa 11 0>,
<ST_MORPHO_R_15 0 &gpiob 15 0>,
<ST_MORPHO_R_16 0 &gpiob 12 0>,
<ST_MORPHO_R_17 0 &gpiob 6 0>,
<ST_MORPHO_R_18 0 &gpiob 11 0>,
<ST_MORPHO_R_19 0 &gpioc 7 0>,
<ST_MORPHO_R_21 0 &gpioa 9 0>,
<ST_MORPHO_R_22 0 &gpiob 2 0>,
<ST_MORPHO_R_23 0 &gpioa 8 0>,
<ST_MORPHO_R_24 0 &gpiob 1 0>,
<ST_MORPHO_R_25 0 &gpiob 10 0>,
<ST_MORPHO_R_26 0 &gpioa 7 0>,
<ST_MORPHO_R_27 0 &gpiob 4 0>,
<ST_MORPHO_R_28 0 &gpioa 6 0>,
<ST_MORPHO_R_29 0 &gpiob 5 0>,
<ST_MORPHO_R_30 0 &gpioa 5 0>,
<ST_MORPHO_R_31 0 &gpiob 3 0>,
<ST_MORPHO_R_33 0 &gpioa 10 0>,
<ST_MORPHO_R_34 0 &gpioc 4 0>,
<ST_MORPHO_R_35 0 &gpioa 2 0>,
<ST_MORPHO_R_37 0 &gpioa 3 0>;
};
};
``` | /content/code_sandbox/boards/st/nucleo_f302r8/st_morpho_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,183 |
```restructuredtext
.. _stm32l476g_disco_board:
ST STM32L476G Discovery
#######################
Overview
********
The STM32L476G Discovery board features an ARM Cortex-M4 based STM32L476VG MCU
with a wide range of connectivity support and configurations. Here are
some highlights of the STM32L476G Discovery board:
- STM32L476VGT6 microcontroller featuring 1 Mbyte of Flash memory, 128 Kbytes of RAM in LQFP100 package
- On-board ST-LINK/V2-1 supporting USB re-enumeration capability
- Three different interfaces supported on USB:
- Virtual com port
- Mass storage
- Debug port
- LCD 24 segments, 4 commons in DIP 28 package
- Seven LEDs:
- LD1 (red/green) for USB communication
- LD2 (red) for 3.3 V power on
- LD3 Over current (red)
- LD4 (red), LD5 (green) two user LEDs
- LD6 (green), LD7 (red) USB OTG FS LEDs
- Pushbutton (reset)
- Four directions Joystick with selection
- USB OTG FS with micro-AB connector
- SAI Audio DAC, Stereo with output jack
- Digital microphone, accelerometer, magnetometer and gyroscope MEMS
- 128-Mbit Quad-SPI Flash memory
- MCU current ammeter with 4 ranges and auto-calibration
- Connector for external board or RF-EEPROM
- Four power supply options:
- ST-LINK/V2-1
- USB FS connector
- External 5 V
- CR2032 battery (not provided)
.. image:: img/stm32l476g_disco.jpg
:align: center
:alt: STM32L476G Discovery
More information about the board can be found at the `STM32L476G Discovery website`_.
Hardware
********
The STM32L476VG SoC provides the following hardware features:
- Ultra-low-power with FlexPowerControl (down to 130 nA Standby mode and 100 uA/MHz run mode)
- Core: ARM |reg| 32-bit Cortex |reg|-M4 CPU with FPU, frequency up to 80 MHz, 100DMIPS/1.25DMIPS/MHz (Dhrystone 2.1)
- Clock Sources:
- 4 to 48 MHz crystal oscillator
- 32 kHz crystal oscillator for RTC (LSE)
- Internal 16 MHz factory-trimmed RC ( |plusminus| 1%)
- Internal low-power 32 kHz RC ( |plusminus| 5%)
- Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by
LSE (better than |plusminus| 0.25 % accuracy)
- 3 PLLs for system clock, USB, audio, ADC
- RTC with HW calendar, alarms and calibration
- LCD 8 x 40 or 4 x 44 with step-up converter
- Up to 24 capacitive sensing channels: support touchkey, linear and rotary touch sensors
- 16x timers:
- 2x 16-bit advanced motor-control
- 2x 32-bit and 5x 16-bit general purpose
- 2x 16-bit basic
- 2x low-power 16-bit timers (available in Stop mode)
- 2x watchdogs
- SysTick timer
- Up to 114 fast I/Os, most 5 V-tolerant, up to 14 I/Os with independent supply down to 1.08 V
- Memories
- Up to 1 MB Flash, 2 banks read-while-write, proprietary code readout protection
- Up to 128 KB of SRAM including 32 KB with hardware parity check
- External memory interface for static memories supporting SRAM, PSRAM, NOR and NAND memories
- Quad SPI memory interface
- 4x digital filters for sigma delta modulator
- Rich analog peripherals (independent supply)
- 3x 12-bit ADC 5 MSPS, up to 16-bit with hardware oversampling, 200 uA/MSPS
- 2x 12-bit DAC, low-power sample and hold
- 2x operational amplifiers with built-in PGA
- 2x ultra-low-power comparators
- 18x communication interfaces
- USB OTG 2.0 full-speed, LPM and BCD
- 2x SAIs (serial audio interface)
- 3x I2C FM+(1 Mbit/s), SMBus/PMBus
- 6x USARTs (ISO 7816, LIN, IrDA, modem)
- 3x SPIs (4x SPIs with the Quad SPI)
- CAN (2.0B Active) and SDMMC interface
- SWPMI single wire protocol master I/F
- 14-channel DMA controller
- True random number generator
- CRC calculation unit, 96-bit unique ID
- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell |trade|
More information about STM32L476VG can be found here:
- `STM32L476VG on www.st.com`_
- `STM32L476 reference manual`_
Supported Features
==================
The Zephyr stm32l476g_disco board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported on this Zephyr port.
The default configuration can be found in the defconfig file:
:zephyr_file:`boards/st/stm32l476g_disco/stm32l476g_disco_defconfig`
Connections and IOs
===================
STM32L476G Discovery Board has 8 GPIO controllers. These controllers are responsible for pin muxing,
input/output, pull-up, etc.
For more details please refer to `STM32L476G Discovery board User Manual`_.
Default Zephyr Peripheral Mapping:
----------------------------------
- UART_2_TX : PD5
- UART_2_RX : PD6
- LD4 : PB2
- LD5 : PE8
System Clock
------------
STM32L476G Discovery System Clock could be driven by an internal or external oscillator,
as well as the main PLL clock. By default the System clock is driven by the PLL clock at 80MHz,
driven by 16MHz high speed internal oscillator.
Serial Port
-----------
STM32L476G Discovery board has 6 U(S)ARTs. The Zephyr console output is assigned to UART2.
Default settings are 115200 8N1.
Programming and Debugging
*************************
Flashing
========
STM32L476G Discovery board includes an ST-LINK/V2-1 embedded debug tool interface.
This interface is supported by the openocd version included in Zephyr SDK.
Flashing an application to STM32L476G Discovery
-----------------------------------------------
Connect the STM32L476G Discovery to your host computer using the USB
port, then run a serial host program to connect with your Discovery
board. For example:
.. code-block:: console
$ minicom -D /dev/ttyACM0
Then, build and flash in the usual way. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: stm32l476g_disco
:goals: build flash
You should see the following message on the console:
.. code-block:: console
Hello World! arm
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: stm32l476g_disco
:maybe-skip-config:
:goals: debug
.. _STM32L476G Discovery website:
path_to_url
.. _STM32L476G Discovery board User Manual:
path_to_url
.. _STM32L476VG on www.st.com:
path_to_url
.. _STM32L476 reference manual:
path_to_url
``` | /content/code_sandbox/boards/st/stm32l476g_disco/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,913 |
```unknown
config BOARD_NUCLEO_F302R8
select SOC_STM32F302X8
``` | /content/code_sandbox/boards/st/nucleo_f302r8/Kconfig.nucleo_f302r8 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 23 |
```yaml
identifier: nucleo_f302r8
name: ST Nucleo F302R8
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 16
flash: 64
supported:
- arduino_gpio
- arduino_i2c
- arduino_spi
- i2c
- spi
- gpio
- pwm
- counter
- adc
vendor: st
``` | /content/code_sandbox/boards/st/nucleo_f302r8/nucleo_f302r8.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 113 |
```yaml
board:
name: nucleo_f302r8
vendor: st
socs:
- name: stm32f302x8
``` | /content/code_sandbox/boards/st/nucleo_f302r8/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 33 |
```unknown
CONFIG_SERIAL=y
# console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# enable GPIO
CONFIG_GPIO=y
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/nucleo_f302r8/nucleo_f302r8_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 46 |
```unknown
/*
*
*/
/ {
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpioa 0 0>, /* A0 */
<1 0 &gpioa 1 0>, /* A1 */
<2 0 &gpioa 4 0>, /* A2 */
<3 0 &gpiob 0 0>, /* A3 */
<4 0 &gpioc 1 0>, /* A4 */
<5 0 &gpioc 0 0>, /* A5 */
<6 0 &gpioa 3 0>, /* D0 */
<7 0 &gpioa 2 0>, /* D1 */
<8 0 &gpioa 10 0>, /* D2 */
<9 0 &gpiob 3 0>, /* D3 */
<10 0 &gpiob 5 0>, /* D4 */
<11 0 &gpiob 4 0>, /* D5 */
<12 0 &gpiob 10 0>, /* D6 */
<13 0 &gpioa 8 0>, /* D7 */
<14 0 &gpioa 9 0>, /* D8 */
<15 0 &gpioc 7 0>, /* D9 */
<16 0 &gpiob 6 0>, /* D10 */
<17 0 &gpiob 15 0>, /* D11 */
<18 0 &gpiob 14 0>, /* D12 */
<19 0 &gpiob 13 0>, /* D13 */
<20 0 &gpiob 9 0>, /* D14 */
<21 0 &gpiob 8 0>; /* D15 */
};
};
arduino_i2c: &i2c1 {};
arduino_spi: &spi2 {};
``` | /content/code_sandbox/boards/st/nucleo_f302r8/arduino_r3_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 495 |
```cmake
board_runner_args(jlink "--device=STM32F302R8" "--speed=4000")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/st/nucleo_f302r8/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 56 |
```ini
source [find board/st_nucleo_f3.cfg]
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
``` | /content/code_sandbox/boards/st/nucleo_f302r8/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 70 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/f3/stm32f302X8.dtsi>
#include <st/f3/stm32f302r(6-8)tx-pinctrl.dtsi>
#include "arduino_r3_connector.dtsi"
#include "st_morpho_connector.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "STMicroelectronics STM32F302R8-NUCLEO board";
compatible = "st,stm32f302r8-nucleo";
chosen {
zephyr,console = &usart2;
zephyr,shell-uart = &usart2;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
};
leds: leds {
compatible = "gpio-leds";
green_led_2: led_2 {
gpios = <&gpiob 13 GPIO_ACTIVE_HIGH>;
label = "User LD2";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button {
label = "User";
gpios = <&gpioc 13 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_0>;
};
};
aliases {
led0 = &green_led_2;
sw0 = &user_button;
volt-sensor0 = &vref;
volt-sensor1 = &vbat;
};
};
&clk_lsi {
status = "okay";
};
&clk_hse {
hse-bypass;
clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
status = "okay";
};
&pll {
prediv = <1>;
mul = <9>;
clocks = <&clk_hse>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(72)>;
ahb-prescaler = <1>;
apb1-prescaler = <2>;
apb2-prescaler = <1>;
};
&i2c1 {
pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
&spi2 {
pinctrl-0 = <&spi2_sck_pb13 &spi2_miso_pb14 &spi2_mosi_pb15>;
pinctrl-names = "default";
cs-gpios = <&gpiob 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
status = "okay";
};
&usart1 {
pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&usart2 {
pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa3>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&usart3 {
pinctrl-0 = <&usart3_tx_pc10 &usart3_rx_pc11>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&timers2 {
status = "okay";
pwm2: pwm {
status = "okay";
pinctrl-0 = <&tim2_ch1_pa0>;
pinctrl-names = "default";
};
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>,
<&rcc STM32_SRC_LSI RTC_SEL(2)>;
status = "okay";
};
&adc1 {
pinctrl-0 = <&adc1_in1_pa0>;
pinctrl-names = "default";
st,adc-clock-source = <SYNC>;
st,adc-prescaler = <2>;
status = "okay";
};
&vref {
status = "okay";
};
&vbat {
status = "okay";
};
``` | /content/code_sandbox/boards/st/nucleo_f302r8/nucleo_f302r8.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 893 |
```unknown
/*
*/
#include <zephyr/dt-bindings/gpio/gpio.h>
#include <zephyr/dt-bindings/gpio/st-morpho-header.h>
/ {
st_morpho_header: st-morpho-header {
compatible = "st-morpho-header";
#gpio-cells = <2>;
gpio-map-mask = <ST_MORPHO_PIN_MASK 0x0>;
gpio-map-pass-thru = <0x0 GPIO_DT_FLAGS_MASK>;
gpio-map = <ST_MORPHO_L_1 0 &gpioc 10 0>,
<ST_MORPHO_L_2 0 &gpioc 11 0>,
<ST_MORPHO_L_3 0 &gpioc 12 0>,
<ST_MORPHO_L_4 0 &gpiob 11 0>,
<ST_MORPHO_L_13 0 &gpioa 13 0>,
<ST_MORPHO_L_15 0 &gpioa 14 0>,
<ST_MORPHO_L_17 0 &gpioa 15 0>,
<ST_MORPHO_L_21 0 &gpiob 7 0>,
<ST_MORPHO_L_23 0 &gpioc 13 0>,
<ST_MORPHO_L_25 0 &gpioc 14 0>,
<ST_MORPHO_L_27 0 &gpioc 15 0>,
<ST_MORPHO_L_28 0 &gpioa 0 0>,
<ST_MORPHO_L_29 0 &gpioh 0 0>,
<ST_MORPHO_L_30 0 &gpioa 1 0>,
<ST_MORPHO_L_31 0 &gpioh 1 0>,
<ST_MORPHO_L_32 0 &gpioa 4 0>,
<ST_MORPHO_L_34 0 &gpiob 0 0>,
<ST_MORPHO_L_35 0 &gpioc 2 0>,
<ST_MORPHO_L_36 0 &gpioc 1 0>, /* SB56=ON, SB46=OFF */
<ST_MORPHO_L_37 0 &gpioc 3 0>,
<ST_MORPHO_L_38 0 &gpioc 0 0>, /* SB51=ON, SB52=OFF */
<ST_MORPHO_R_1 0 &gpioc 9 0>,
<ST_MORPHO_R_2 0 &gpioc 8 0>,
<ST_MORPHO_R_3 0 &gpiob 8 0>,
<ST_MORPHO_R_4 0 &gpioc 6 0>,
<ST_MORPHO_R_5 0 &gpiob 9 0>,
<ST_MORPHO_R_6 0 &gpioc 5 0>,
<ST_MORPHO_R_11 0 &gpioa 5 0>,
<ST_MORPHO_R_12 0 &gpioa 12 0>,
<ST_MORPHO_R_13 0 &gpioa 6 0>,
<ST_MORPHO_R_14 0 &gpioa 11 0>,
<ST_MORPHO_R_15 0 &gpioa 7 0>,
<ST_MORPHO_R_16 0 &gpiob 12 0>,
<ST_MORPHO_R_17 0 &gpiob 6 0>,
<ST_MORPHO_R_19 0 &gpioc 7 0>,
<ST_MORPHO_R_21 0 &gpioa 9 0>,
<ST_MORPHO_R_22 0 &gpiob 2 0>,
<ST_MORPHO_R_23 0 &gpioa 8 0>,
<ST_MORPHO_R_24 0 &gpiob 1 0>,
<ST_MORPHO_R_25 0 &gpiob 10 0>,
<ST_MORPHO_R_26 0 &gpiob 15 0>,
<ST_MORPHO_R_27 0 &gpiob 4 0>,
<ST_MORPHO_R_28 0 &gpiob 14 0>,
<ST_MORPHO_R_29 0 &gpiob 5 0>,
<ST_MORPHO_R_30 0 &gpiob 13 0>,
<ST_MORPHO_R_31 0 &gpiob 3 0>,
<ST_MORPHO_R_33 0 &gpioa 10 0>,
<ST_MORPHO_R_34 0 &gpioc 4 0>,
<ST_MORPHO_R_35 0 &gpioa 2 0>,
<ST_MORPHO_R_37 0 &gpioa 3 0>;
};
};
``` | /content/code_sandbox/boards/st/nucleo_f410rb/st_morpho_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,162 |
```restructuredtext
.. _nucleo_f302r8_board:
ST Nucleo F302R8
################
Overview
********
The Nucleo F302R8 board features an ARM Cortex-M4 based STM32F302R8
mixed-signal MCU with FPU and DSP instructions capable of running at 72 MHz.
Here are some highlights of the Nucleo F302R8 board:
- STM32 microcontroller in LQFP64 package
- LSE crystal: 32.768 kHz crystal oscillator
- Two types of extension resources:
- Arduino* Uno V3 connectors
- ST morpho extension pin headers for full access to all STM32 I/Os
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector
- Flexible board power supply:
- 5 V from ST-LINK/V2-1 USB VBUS
- External power sources: 3.3 V and 7 - 12 V on ST Zio or ST morpho
connectors, 5 V on ST morpho connector
- One user LED
- Two push-buttons: USER and RESET
.. image:: img/nucleo_f302r8.jpg
:align: center
:alt: Nucleo F302R8
More information about the board can be found at the `Nucleo F302R8 website`_,
and in the `STM32 Nucleo-64 board User Manual`_.
Hardware
********
The Nucleo F302R8 provides the following hardware components:
- STM32F302R8T6 in QFP64 package
- ARM |reg| 32-bit Cortex |reg| -M4 CPU with FPU
- 72 MHz max CPU frequency
- VDD from 2.0 V to 3.6 V
- 64 KB Flash
- 16 KB SRAM
- RTC
- Advanced-control Timer
- General Purpose Timers (4)
- Basic Timer
- Watchdog Timers (2)
- PWM channels (18)
- SPI/I2S (2)
- I2C (3)
- USART/UART (3/3)
- USB 2.0 FS with on-chip PHY
- CAN (2)
- GPIO with external interrupt capability
- DMA channels (7)
- Capacitive sensing channels (18)
- 12-bit ADC with 15 channels
- 12-bit D/A converter
- Analog comparator (3)
- Op amp
More information about the STM32F302R8 can be found here:
- `STM32F302R8 on www.st.com`_
- `STM32F302R8 reference manual`_
- `STM32F302R8 datasheet`_
Supported Features
==================
The Zephyr nucleo_f302r8 board configuration supports the following hardware
features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| PWM | on-chip | pwm |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| ADC | on-chip | ADC Controller |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported on this Zephyr port.
The default configuration can be found in
:zephyr_file:`boards/st/nucleo_f302r8/nucleo_f302r8_defconfig`
Connections and IOs
===================
The Nucleo F302R8 Board has 5 GPIO controllers. These controllers are
responsible for pin muxing, input/output, pull-up, etc.
Board connectors:
-----------------
.. image:: img/nucleo_f302r8_connectors.jpg
:align: center
:alt: Nucleo F302R8 connectors
Default Zephyr Peripheral Mapping:
----------------------------------
The Nucleo F302R8 board features an Arduino Uno V3 connector and a ST
morpho connector. Board is configured as follows:
- UART_2 TX/RX : PA2/PA3 (ST-Link Virtual Port Com)
- UART_3 TX/RX : PC10/PC11
- I2C1 SCL/SDA : PB8/PB9 (Arduino I2C)
- SPI2 CS/SCK/MISO/MOSI : PB6/PB13/PB14/P15 (Arduino SPI)
- PWM_2_CH2 : PA0
- USER_PB : PC13
- LD2 : PB13
System Clock
------------
The Nucleo F302R8 System Clock can be driven by an internal or
external oscillator, as well as by the main PLL clock. By default the
System Clock is driven by the PLL clock at 72 MHz. The input to the
PLL is an 8 MHz external clock supplied by the processor of the
on-board ST-LINK/V2-1 debugger/programmer.
Serial Port
-----------
The Nucleo F302R8 board has 3 UARTs. The Zephyr console output is assigned
to UART2. Default settings are 115200 8N1.
Programming and Debugging
*************************
The Nucleo F302R8 board includes an ST-LINK/V2-1 embedded debug tool interface.
This interface is supported by the openocd version included in Zephyr SDK.
.. _Nucleo F302R8 website:
path_to_url
.. _STM32 Nucleo-64 board User Manual:
path_to_url
.. _STM32F302R8 on www.st.com:
path_to_url
.. _STM32F302R8 reference manual:
path_to_url
.. _STM32F302R8 datasheet:
path_to_url
``` | /content/code_sandbox/boards/st/nucleo_f302r8/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,349 |
```unknown
config BOARD_NUCLEO_F410RB
select SOC_STM32F410RX
``` | /content/code_sandbox/boards/st/nucleo_f410rb/Kconfig.nucleo_f410rb | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 21 |
```unknown
# Enable MPU
CONFIG_ARM_MPU=y
# Enable HW stack protection
CONFIG_HW_STACK_PROTECTION=y
CONFIG_SERIAL=y
# console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# enable GPIO
CONFIG_GPIO=y
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/nucleo_f410rb/nucleo_f410rb_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 69 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/f4/stm32f410Xb.dtsi>
#include <st/f4/stm32f410r(8-b)tx-pinctrl.dtsi>
#include "arduino_r3_connector.dtsi"
#include "st_morpho_connector.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "STMicroelectronics STM32F410RB-NUCLEO board";
compatible = "st,stm32f410rb-nucleo";
chosen {
zephyr,console = &usart2;
zephyr,shell-uart = &usart2;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
};
leds: leds {
compatible = "gpio-leds";
green_led_2: led_2 {
gpios = <&gpioa 5 GPIO_ACTIVE_HIGH>;
label = "User LD2";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button {
label = "User";
gpios = <&gpioc 13 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_0>;
};
};
aliases {
led0 = &green_led_2;
sw0 = &user_button;
};
};
&clk_lsi {
status = "okay";
};
&clk_hse {
hse-bypass;
clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
status = "okay";
};
&pll {
div-m = <8>;
mul-n = <384>;
div-p = <4>;
div-q = <8>;
clocks = <&clk_hse>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(96)>;
ahb-prescaler = <1>;
apb1-prescaler = <2>;
apb2-prescaler = <1>;
};
&usart1 {
pinctrl-0 = <&usart1_tx_pb6 &usart1_rx_pb7>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&usart2 {
pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa3>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&i2c1 {
pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
&i2c2 {
pinctrl-0 = <&i2c2_scl_pb10 &i2c2_sda_pb3>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
&spi1 {
pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pa5
&spi1_miso_pa6 &spi1_mosi_pa7>;
pinctrl-names = "default";
status = "okay";
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>,
<&rcc STM32_SRC_LSI RTC_SEL(2)>;
status = "okay";
};
&dac1 {
status = "okay";
pinctrl-0 = <&dac_out1_pa5>;
pinctrl-names = "default";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 DT_SIZE_K(32)>;
read-only;
};
/*
* The flash sectors 2&3 at 0x00008000 and ending at
* 0x0000ffff
*/
slot0_partition: partition@8000 {
label = "image-0";
reg = <0x00008000 DT_SIZE_K(32)>;
};
/*
* The flash sectors 4 at 0x00010000 and ending at
* 0x001ffff
*/
slot1_partition: partition@10000 {
label = "image-1";
reg = <0x00010000 DT_SIZE_K(32)>;
};
scratch_partition: partition@18000 {
label = "image-scratch";
reg = <0x00018000 DT_SIZE_K(32)>;
};
};
};
``` | /content/code_sandbox/boards/st/nucleo_f410rb/nucleo_f410rb.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,043 |
```cmake
board_runner_args(jlink "--device=STM32F410RB" "--speed=4000")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/st/nucleo_f410rb/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 55 |
```yaml
identifier: nucleo_f410rb
name: ST Nucleo F410RB
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- arduino_gpio
- arduino_i2c
- arduino_spi
- counter
- gpio
- spi
- i2c
ram: 32
flash: 128
vendor: st
``` | /content/code_sandbox/boards/st/nucleo_f410rb/nucleo_f410rb.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 103 |
```unknown
# STM32F410RB Nucleo board configuration
if BOARD_NUCLEO_F410RB
config SPI_STM32_INTERRUPT
default y
depends on SPI
endif # BOARD_NUCLEO_F410RB
``` | /content/code_sandbox/boards/st/nucleo_f410rb/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 49 |
```unknown
/*
*
*/
/ {
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpioa 0 0>, /* A0 */
<1 0 &gpioa 1 0>, /* A1 */
<2 0 &gpioa 4 0>, /* A2 */
<3 0 &gpiob 0 0>, /* A3 */
<4 0 &gpioc 1 0>, /* A4 */
<5 0 &gpioc 0 0>, /* A5 */
<6 0 &gpioa 3 0>, /* D0 */
<7 0 &gpioa 2 0>, /* D1 */
<8 0 &gpioa 10 0>, /* D2 */
<9 0 &gpiob 3 0>, /* D3 */
<10 0 &gpiob 5 0>, /* D4 */
<11 0 &gpiob 4 0>, /* D5 */
<12 0 &gpiob 10 0>, /* D6 */
<13 0 &gpioa 8 0>, /* D7 */
<14 0 &gpioa 9 0>, /* D8 */
<15 0 &gpioc 7 0>, /* D9 */
<16 0 &gpiob 6 0>, /* D10 */
<17 0 &gpioa 7 0>, /* D11 */
<18 0 &gpioa 6 0>, /* D12 */
<19 0 &gpioa 5 0>, /* D13 */
<20 0 &gpiob 9 0>, /* D14 */
<21 0 &gpiob 8 0>; /* D15 */
};
};
arduino_i2c: &i2c1 {};
arduino_spi: &spi1 {};
``` | /content/code_sandbox/boards/st/nucleo_f410rb/arduino_r3_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 492 |
```ini
source [find board/st_nucleo_f4.cfg]
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
``` | /content/code_sandbox/boards/st/nucleo_f410rb/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 70 |
```yaml
board:
name: nucleo_f410rb
vendor: st
socs:
- name: stm32f410rx
``` | /content/code_sandbox/boards/st/nucleo_f410rb/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 31 |
```cmake
board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake)
``` | /content/code_sandbox/boards/st/nucleo_c031c6/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 47 |
```unknown
# Serial Drivers
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# GPIO Controller
CONFIG_GPIO=y
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/nucleo_c031c6/nucleo_c031c6_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 58 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/c0/stm32c031X6.dtsi>
#include <st/c0/stm32c031c(4-6)tx-pinctrl.dtsi>
#include "arduino_r3_connector.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "STMicroelectronics STM32C031C6-NUCLEO board";
compatible = "st,stm32c031c6-nucleo";
chosen {
zephyr,console = &usart2;
zephyr,shell-uart = &usart2;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
};
leds: leds {
compatible = "gpio-leds";
green_led_4: led_4 {
gpios = <&gpioa 5 GPIO_ACTIVE_HIGH>;
label = "User LD4";
};
};
pwmleds {
compatible = "pwm-leds";
green_pwm_led: green_pwm_led {
pwms = <&pwm1 1 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button {
label = "user button";
gpios = <&gpioc 13 GPIO_ACTIVE_LOW>;
status = "okay";
zephyr,code = <INPUT_KEY_0>;
};
};
aliases {
led0 = &green_led_4;
pwm-led0 = &green_pwm_led;
sw0 = &user_button;
watchdog0 = &iwdg;
die-temp0 = &die_temp;
volt-sensor0 = &vref;
};
};
&clk_lse {
status = "okay";
};
&clk_hse {
clock-frequency = <DT_FREQ_M(48)>;
status = "okay";
};
&rcc {
clocks = <&clk_hse>;
clock-frequency = <DT_FREQ_M(48)>;
ahb-prescaler = <1>;
apb1-prescaler = <1>;
};
&usart1 {
pinctrl-0 = <&usart1_tx_pb6 &usart1_rx_pb7>;
pinctrl-names = "default";
current-speed = <115200>;
};
&usart2 {
pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa3>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000400>,
<&rcc STM32_SRC_LSE RTC_SEL(1)>;
status = "okay";
};
&iwdg {
status = "okay";
};
&timers1 {
st,prescaler = <10000>;
status = "okay";
pwm1: pwm {
pinctrl-0 = <&tim1_ch1_pa5>;
pinctrl-names = "default";
status = "okay";
};
};
&i2c1 {
pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
&adc1 {
pinctrl-0 = <&adc1_in0_pa0 &adc1_in1_pa1 &adc1_in4_pa4>;
pinctrl-names = "default";
st,adc-clock-source = <SYNC>;
st,adc-prescaler = <4>;
status = "okay";
};
&die_temp {
status = "okay";
};
&vref {
status = "okay";
};
&dma1 {
status = "okay";
};
&dmamux1 {
status = "okay";
};
``` | /content/code_sandbox/boards/st/nucleo_c031c6/nucleo_c031c6.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 846 |
```yaml
board:
name: nucleo_c031c6
vendor: st
socs:
- name: stm32c031xx
``` | /content/code_sandbox/boards/st/nucleo_c031c6/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```yaml
identifier: nucleo_c031c6
name: ST Nucleo C031C6
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- gpio
- counter
- watchdog
- pwm
- adc
- i2c
- dma
- rtc
ram: 12
flash: 32
vendor: st
``` | /content/code_sandbox/boards/st/nucleo_c031c6/nucleo_c031c6.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 101 |
```unknown
/*
*
*/
/ {
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpioa 0 0>, /* A0 */
<1 0 &gpioa 1 0>, /* A1 */
<2 0 &gpioa 4 0>, /* A2 */
<3 0 &gpiob 1 0>, /* A3 */
<4 0 &gpioa 11 0>, /* A4 */
<5 0 &gpioa 12 0>, /* A5 */
<6 0 &gpiob 7 0>, /* D0 */
<7 0 &gpiob 6 0>, /* D1 */
<8 0 &gpioa 10 0>, /* D2 */
<9 0 &gpiob 3 0>, /* D3 */
<10 0 &gpiob 10 0>, /* D4 */
<11 0 &gpiob 4 0>, /* D5 */
<12 0 &gpiob 5 0>, /* D6 */
<13 0 &gpioa 15 0>, /* D7 */
<14 0 &gpioa 9 0>, /* D8 */
<15 0 &gpioc 7 0>, /* D9 */
<16 0 &gpiob 0 0>, /* D10 */
<17 0 &gpioa 7 0>, /* D11 */
<18 0 &gpioa 6 0>, /* D12 */
<19 0 &gpioa 5 0>, /* D13 */
<20 0 &gpiob 9 0>, /* D14 */
<21 0 &gpiob 8 0>; /* D15 */
};
};
arduino_serial: &usart1 {};
``` | /content/code_sandbox/boards/st/nucleo_c031c6/arduino_r3_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 482 |
```unknown
config BOARD_NUCLEO_C031C6
select SOC_STM32C031XX
``` | /content/code_sandbox/boards/st/nucleo_c031c6/Kconfig.nucleo_c031c6 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 22 |
```restructuredtext
.. _nucleo_f410rb_board:
ST Nucleo F410RB
################
Overview
********
The Nucleo F410RB board features an ARM Cortex-M4 based STM32F410RB MCU
with a wide range of connectivity support and configurations. Here are
some highlights of the Nucleo F410RB board:
- STM32 microcontroller in QFP64 package
- Two types of extension resources:
- Arduino Uno V3 connectivity
- ST morpho extension pin headers for full access to all STM32 I/Os
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector
- Flexible board power supply:
- USB VBUS or external source(3.3V, 5V, 7 - 12V)
- Power management access point
- Three LEDs: USB communication (LD1), user LED (LD2), power LED (LD3)
- Two push-buttons: USER and RESET
.. image:: img/nucleo_f410rb.jpg
:align: center
:alt: Nucleo F410RB
More information about the board can be found at the `Nucleo F410RB website`_.
Hardware
********
Nucleo F410RB provides the following hardware components:
- STM32F410RBT6 in LQFP64 package
- ARM |reg| 32-bit Cortex |reg|-M4 CPU with FPU
- Adaptive real-time accelerator (ART Accelerator)
- 100 MHz max CPU frequency
- VDD from 1.7 V to 3.6 V
- 128 KB Flash
- 32 KB SRAM
- General purpose timer (4)
- Low-power timer (1)
- Advanced-control timer (1)
- Random number generator (TRNG for HW entropy)
- SPI/I2S (3)
- I2C (3)
- USART (3)
- GPIO (50) with external interrupt capability
- 12-bit ADC with 16 channels
- 12-bit DAC with 1 channel
- RTC
More information about STM32F410RB can be found here:
- `STM32F410RB on www.st.com`_
- `STM32F410 reference manual`_
Supported Features
==================
The Zephyr nucleo_f410rb board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| PWM | on-chip | pwm |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| I2S | on-chip | i2s |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| ADC | on-chip | ADC Controller |
+-----------+------------+-------------------------------------+
| DAC | on-chip | DAC Controller |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | window & independent |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported on this Zephyr port.
The default configuration can be found in
:zephyr_file:`boards/st/nucleo_f410rb/nucleo_f410rb_defconfig`
Connections and IOs
===================
Nucleo F410RB Board has 8 GPIO controllers. These controllers are responsible for pin muxing,
input/output, pull-up, etc.
Available pins:
---------------
.. image:: img/nucleo_f410rb_arduino_top_left.jpg
:align: center
:alt: Nucleo F410RB Arduino connectors (top left)
.. image:: img/nucleo_f410rb_arduino_top_right.jpg
:align: center
:alt: Nucleo F410RB Arduino connectors (top right)
.. image:: img/nucleo_f410rb_morpho_top_left.jpg
:align: center
:alt: Nucleo F410RB Morpho connectors (top left)
.. image:: img/nucleo_f410rb_morpho_top_right.jpg
:align: center
:alt: Nucleo F410RB Morpho connectors (top right)
For more details please refer to `STM32 Nucleo-64 board User Manual`_.
Default Zephyr Peripheral Mapping:
----------------------------------
- UART_1_TX : PB6
- UART_1_RX : PB7
- UART_2_TX : PA2
- UART_2_RX : PA3
- USER_PB : PC13
- LD2 : PA5
- I2C1_SDA : PB9
- I2C1_SCL : PB8
- I2C2_SDA : PB3
- I2C2_SCL : PB10
System Clock
------------
Nucleo F410RB System Clock could be driven by an internal or external oscillator,
as well as the main PLL clock. By default, the System clock is driven by the PLL clock at 84MHz,
driven by an 8MHz high-speed external clock.
Serial Port
-----------
Nucleo F410RB board has 3 USARTs. The Zephyr console output is assigned to UART2.
Default settings are 115200 8N1.
Programming and Debugging
*************************
Applications for the ``nucleo_f410rb`` board configuration can be built and
flashed in the usual way (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Flashing
========
Nucleo F410RB board includes an ST-LINK/V2-1 embedded debug tool interface.
This interface is supported by the openocd version included in the Zephyr SDK.
Flashing an application to Nucleo F410RB
----------------------------------------
Here is an example for the :ref:`hello_world` application.
Run a serial host program to connect with your Nucleo board.
.. code-block:: console
$ minicom -b 115200 -D /dev/ttyACM0
Build and flash the application:
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nucleo_f410rb
:goals: build flash
You should see the following message on the console:
.. code-block:: console
$ Hello World! arm
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nucleo_f410rb
:maybe-skip-config:
:goals: debug
.. _Nucleo F410RB website:
path_to_url
.. _STM32 Nucleo-64 board User Manual:
path_to_url
.. _STM32F410RB on www.st.com:
path_to_url
.. _STM32F410 reference manual:
path_to_url
``` | /content/code_sandbox/boards/st/nucleo_f410rb/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,593 |
```cmake
board_runner_args(jlink "--device=STM32F407VG" "--speed=4000")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/st/stm32f4_disco/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 55 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/f4/stm32f407Xg.dtsi>
#include <st/f4/stm32f407v(e-g)tx-pinctrl.dtsi>
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "STMicroelectronics STM32F4DISCOVERY board";
compatible = "st,stm32f4discovery";
chosen {
zephyr,console = &usart2;
zephyr,shell-uart = &usart2;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,ccm = &ccm0;
zephyr,canbus = &can2;
};
leds {
compatible = "gpio-leds";
orange_led_3: led_3 {
gpios = <&gpiod 13 GPIO_ACTIVE_HIGH>;
label = "User LD3";
};
green_led_4: led_4 {
gpios = <&gpiod 12 GPIO_ACTIVE_HIGH>;
label = "User LD4";
};
red_led_5: led_5 {
gpios = <&gpiod 14 GPIO_ACTIVE_HIGH>;
label = "User LD5";
};
blue_led_6: led_6 {
gpios = <&gpiod 15 GPIO_ACTIVE_HIGH>;
label = "User LD6";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button {
label = "Key";
gpios = <&gpioa 0 GPIO_ACTIVE_HIGH>;
zephyr,code = <INPUT_KEY_0>;
};
};
aliases {
led0 = &green_led_4;
led1 = &orange_led_3;
led2 = &red_led_5;
led3 = &blue_led_6;
sw0 = &user_button;
};
};
&usart1 {
pinctrl-0 = <&usart1_tx_pb6 &usart1_rx_pb7>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&clk_lsi {
status = "okay";
};
&clk_hse {
clock-frequency = <DT_FREQ_M(8)>;
status = "okay";
};
&pll {
div-m = <8>;
mul-n = <336>;
div-p = <2>;
div-q = <7>;
clocks = <&clk_hse>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(168)>;
ahb-prescaler = <1>;
apb1-prescaler = <4>;
apb2-prescaler = <2>;
};
&usart2 {
pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa3>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&timers2 {
status = "okay";
pwm2: pwm {
status = "okay";
pinctrl-0 = <&tim2_ch1_pa0>;
pinctrl-names = "default";
};
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>,
<&rcc STM32_SRC_LSI RTC_SEL(2)>;
status = "okay";
backup_regs {
status = "okay";
};
};
zephyr_udc0: &usbotg_fs {
pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12>;
pinctrl-names = "default";
status = "okay";
};
&can1 {
pinctrl-0 = <&can1_rx_pb8 &can1_tx_pb9>;
pinctrl-names = "default";
status = "disabled";
};
&can2 {
pinctrl-0 = <&can2_rx_pb5 &can2_tx_pb13>;
pinctrl-names = "default";
status = "okay";
};
``` | /content/code_sandbox/boards/st/stm32f4_disco/stm32f4_disco.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 902 |
```yaml
identifier: stm32f4_disco
name: ST STM32F4 Discovery
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 128
flash: 1024
supported:
- can
- pwm
- counter
- usb
vendor: st
``` | /content/code_sandbox/boards/st/stm32f4_disco/stm32f4_disco.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 82 |
```unknown
# Enable MPU
CONFIG_ARM_MPU=y
# Enable HW stack protection
CONFIG_HW_STACK_PROTECTION=y
CONFIG_SERIAL=y
# console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# enable GPIO
CONFIG_GPIO=y
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/stm32f4_disco/stm32f4_disco_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 69 |
```restructuredtext
.. _nucleo_c031c6_board:
ST Nucleo C031C6
################
Overview
********
The STM32 Nucleo-64 development board with STM32C031C6 MCU, supports Arduino and ST morpho connectivity.
The STM32 Nucleo board provides an affordable, and flexible way for users to try out new concepts,
and build prototypes with the STM32 microcontroller, choosing from the various
combinations of performance, power consumption and features.
The STM32 Nucleo board integrates the ST-LINK/V2-1 debugger and programmer.
The STM32 Nucleo board comes with the STM32 comprehensive software HAL library together
with various packaged software examples.
.. image:: img/nucleo_c031c6.jpg
:align: center
:alt: Nucleo C031C6
More information about the board can be found at the `Nucleo C031C6 website`_.
Hardware
********
Nucleo C031C6 provides the following hardware components:
- STM32 microcontroller in 48-pin package featuring 32 Kbytes of Flash memory
and 12 Kbytes of SRAM.
- Extension resource:
- Arduino* Uno V3 connectivity
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector:
- Flexible board power supply:
- USB VBUS or external source (3.3V, 5V, 7 - 12V)
- Current consumption measurement (IDD)
- Four LEDs:
- USB communication (LD1), USB power fault LED (LD2), power LED (LD3),
user LED (LD4)
- Two push-button: USER and RESET
- USB re-enumeration capability. Three different interfaces supported on USB:
- Virtual COM port
- Mass storage
- Debug port
More information about STM32C031C6 can be found here:
`STM32C0x1 reference manual`_
Supported Features
==================
The Zephyr nucleo_c031c6 board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| CLOCK | on-chip | reset and clock control |
+-----------+------------+-------------------------------------+
| RTC | on-chip | counter |
+-----------+------------+-------------------------------------+
| IWDG | on-chip | independent watchdog |
+-----------+------------+-------------------------------------+
| WWDG | on-chip | window watchdog |
+-----------+------------+-------------------------------------+
| PWM | on-chip | pwm |
+-----------+------------+-------------------------------------+
| ADC | on-chip | ADC Controller |
+-----------+------------+-------------------------------------+
| die-temp | on-chip | die temperature sensor |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| DMA | on-chip | Direct Memory Access |
+-----------+------------+-------------------------------------+
| RTC | on-chip | rtc |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported in this Zephyr port.
The default configuration can be found in
:zephyr_file:`boards/st/nucleo_c031c6/nucleo_c031c6_defconfig`
Connections and IOs
===================
Each of the GPIO pins can be configured by software as output (push-pull or open-drain), as
input (with or without pull-up or pull-down), or as peripheral alternate function. Most of the
GPIO pins are shared with digital or analog alternate functions. All GPIOs are high current
capable except for analog inputs.
Default Zephyr Peripheral Mapping:
----------------------------------
- UART_2 TX/RX : PA2/PA3 (ST-Link Virtual Port Com)
- LD4 : PA5
For more details please refer to `STM32 Nucleo-64 board User Manual`_.
Programming and Debugging
*************************
Applications for the ``nucleo_c031c6`` board configuration can be built and
flashed in the usual way (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Flashing
========
Nucleo C031C6 board includes an ST-LINK/V2-1 embedded debug tool interface.
Flashing an application to Nucleo C031C6
----------------------------------------
Here is an example for the :zephyr:code-sample:`blinky` application.
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: nucleo_c031c6
:goals: build flash
You will see the LED blinking every second.
References
**********
.. target-notes::
.. _Nucleo C031C6 website:
path_to_url
.. _STM32C0x1 reference manual:
path_to_url
.. _STM32 Nucleo-64 board User Manual:
path_to_url
``` | /content/code_sandbox/boards/st/nucleo_c031c6/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,184 |
```unknown
config BOARD_STM32F4_DISCO
select SOC_STM32F407XG
``` | /content/code_sandbox/boards/st/stm32f4_disco/Kconfig.stm32f4_disco | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 22 |
```yaml
board:
name: stm32f4_disco
vendor: st
socs:
- name: stm32f407xx
``` | /content/code_sandbox/boards/st/stm32f4_disco/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```ini
source [find board/stm32f4discovery.cfg]
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
``` | /content/code_sandbox/boards/st/stm32f4_disco/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 68 |
```cmake
board_runner_args(jlink "--device=STM32F769NI" "--speed=4000")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/st/stm32f769i_disco/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 55 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/f7/stm32f769Xi.dtsi>
#include <st/f7/stm32f769nihx-pinctrl.dtsi>
#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
#include "arduino_r3_connector.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "STMicroelectronics STM32F769I DISCOVERY board";
compatible = "st,stm32f769I-disco";
chosen {
zephyr,console = &usart1;
zephyr,shell-uart = &usart1;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,dtcm = &dtcm;
zephyr,flash-controller = &mx25l51245g;
};
sdram1: sdram@c0000000 {
compatible = "zephyr,memory-region", "mmio-sram";
device_type = "memory";
reg = <0xc0000000 DT_SIZE_M(16)>;
zephyr,memory-region = "SDRAM1";
zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>;
};
otghs_ulpi_phy: otghs_ulpis_phy {
compatible = "usb-ulpi-phy";
#phy-cells = <0>;
};
leds {
compatible = "gpio-leds";
red_led_1:led_1 {
gpios = <&gpioj 13 GPIO_ACTIVE_HIGH>;
label = "User LD1";
};
green_led_2:led_2 {
gpios = <&gpioj 5 GPIO_ACTIVE_HIGH>;
label = "User LD2";
};
green_led_3:led_3 {
gpios = <&gpioa 12 GPIO_ACTIVE_HIGH>;
label = "User LD3";
};
red_led_4:led_4 {
gpios = <&gpiod 4 GPIO_ACTIVE_HIGH>;
label = "User LD4";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button {
label = "User";
gpios = <&gpioa 0 GPIO_ACTIVE_HIGH>;
zephyr,code = <INPUT_KEY_0>;
};
};
lvgl_pointer {
compatible = "zephyr,lvgl-pointer-input";
input = <&ft6202>;
};
aliases {
led0 = &red_led_1;
led1 = &green_led_2;
led2 = &green_led_3;
led3 = &red_led_4;
sw0 = &user_button;
};
quadspi_memory_avail: memory-avail@90000000 {
compatible = "zephyr,memory-region", "mmio-sram";
reg = <0x90000000 DT_SIZE_M(64)>;
zephyr,memory-region = "QSPI_AVAIL";
zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_IO) )>;
};
};
&clk_hse {
clock-frequency = <DT_FREQ_M(25)>;
status = "okay";
};
&pll {
div-m = <25>;
mul-n = <432>;
div-p = <2>;
div-q = <9>;
clocks = <&clk_hse>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(216)>;
ahb-prescaler = <1>;
apb1-prescaler = <4>;
apb2-prescaler = <2>;
};
arduino_i2c: &i2c1 {};
arduino_spi: &spi2 {};
arduino_serial: &usart6 {};
&usart1 {
pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&usart6 {
pinctrl-0 = <&usart6_tx_pc6 &usart6_rx_pc7>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&i2c1 {
pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
&i2c4 {
pinctrl-0 = <&i2c4_scl_pd12 &i2c4_sda_pb7>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
ft6202: ft6202@2a {
compatible = "focaltech,ft5336";
reg = <0x2a>;
int-gpios = <&gpioi 13 0>;
};
};
&spi2 {
pinctrl-0 = <&spi2_nss_pa11 &spi2_sck_pa12 &spi2_miso_pb14 &spi2_mosi_pb15>;
pinctrl-names = "default";
status = "okay";
};
&mac {
status = "okay";
pinctrl-0 = <ð_mdc_pc1
ð_rxd0_pc4
ð_rxd1_pc5
ð_ref_clk_pa1
ð_mdio_pa2
ð_crs_dv_pa7
ð_tx_en_pg11
ð_txd0_pg13
ð_txd1_pg14>;
pinctrl-names = "default";
};
&sdmmc2 {
status = "okay";
pinctrl-0 = <&sdmmc2_d0_pg9 &sdmmc2_d1_pg10
&sdmmc2_d2_pb3 &sdmmc2_d3_pb4
&sdmmc2_ck_pd6 &sdmmc2_cmd_pd7>;
pinctrl-names = "default";
cd-gpios = <&gpioi 15 GPIO_ACTIVE_LOW>;
};
&quadspi {
pinctrl-0 = <&quadspi_clk_pb2 &quadspi_bk1_ncs_pb6
&quadspi_bk1_io0_pc9 &quadspi_bk1_io1_pc10
&quadspi_bk1_io2_pe2 &quadspi_bk1_io3_pd13>;
pinctrl-names = "default";
status = "okay";
mx25l51245g: qspi-nor-flash@90000000 {
compatible = "st,stm32-qspi-nor";
reg = <0x90000000 DT_SIZE_M(64)>; /* 512 Mbits */
qspi-max-frequency = <DT_FREQ_M(66)>;
status = "okay";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
slot1_partition: partition@0 {
label = "image-1";
reg = <0x00000000 DT_SIZE_K(16)>;
};
storage_partition: partition@1a0000 {
label = "storage";
reg = <0x001a0000 DT_SIZE_M(62)>;
};
};
};
};
&fmc {
status = "okay";
pinctrl-0 = <&fmc_nbl0_pe0 &fmc_nbl1_pe1 &fmc_nbl2_pi4 &fmc_nbl3_pi5
&fmc_sdclk_pg8 &fmc_sdnwe_ph5 &fmc_sdcke0_ph2 &fmc_sdne0_ph3
&fmc_sdnras_pf11 &fmc_sdncas_pg15
&fmc_a0_pf0 &fmc_a1_pf1 &fmc_a2_pf2 &fmc_a3_pf3
&fmc_a4_pf4 &fmc_a5_pf5 &fmc_a6_pf12 &fmc_a7_pf13
&fmc_a8_pf14 &fmc_a9_pf15 &fmc_a10_pg0 &fmc_a11_pg1
&fmc_a12_pg2 &fmc_a14_pg4 &fmc_a15_pg5
&fmc_d0_pd14 &fmc_d1_pd15 &fmc_d2_pd0 &fmc_d3_pd1
&fmc_d4_pe7 &fmc_d5_pe8 &fmc_d6_pe9 &fmc_d7_pe10
&fmc_d8_pe11 &fmc_d9_pe12 &fmc_d10_pe13 &fmc_d11_pe14
&fmc_d12_pe15 &fmc_d13_pd8 &fmc_d14_pd9 &fmc_d15_pd10
&fmc_d16_ph8 &fmc_d17_ph9 &fmc_d18_ph10 &fmc_d19_ph11
&fmc_d20_ph12 &fmc_d21_ph13 &fmc_d22_ph14 &fmc_d23_ph15
&fmc_d24_pi0 &fmc_d25_pi1 &fmc_d26_pi2 &fmc_d27_pi3
&fmc_d28_pi6 &fmc_d29_pi7 &fmc_d30_pi9 &fmc_d31_pi10>;
pinctrl-names = "default";
sdram {
status = "okay";
power-up-delay = <100>;
num-auto-refresh = <8>;
mode-register = <0x230>;
refresh-rate = <603>;
bank@0 {
reg = <0>;
st,sdram-control = <STM32_FMC_SDRAM_NC_8
STM32_FMC_SDRAM_NR_12
STM32_FMC_SDRAM_MWID_32
STM32_FMC_SDRAM_NB_4
STM32_FMC_SDRAM_CAS_3
STM32_FMC_SDRAM_SDCLK_PERIOD_2
STM32_FMC_SDRAM_RBURST_ENABLE
STM32_FMC_SDRAM_RPIPE_0>;
st,sdram-timing = <2 6 4 6 2 2 2>;
};
};
};
zephyr_udc0: &usbotg_hs {
pinctrl-0 = <&usb_otg_hs_ulpi_ck_pa5
&usb_otg_hs_ulpi_d0_pa3
&usb_otg_hs_ulpi_d1_pb0
&usb_otg_hs_ulpi_d2_pb1
&usb_otg_hs_ulpi_d3_pb10
&usb_otg_hs_ulpi_d4_pb11
&usb_otg_hs_ulpi_d5_pb12
&usb_otg_hs_ulpi_d6_pb13
&usb_otg_hs_ulpi_d7_pb5
&usb_otg_hs_ulpi_stp_pc0
&usb_otg_hs_ulpi_dir_pi11
&usb_otg_hs_ulpi_nxt_ph4>;
pinctrl-names = "default";
maximum-speed = "high-speed";
phys = <&otghs_ulpi_phy>;
status = "okay";
};
``` | /content/code_sandbox/boards/st/stm32f769i_disco/stm32f769i_disco.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,499 |
```restructuredtext
.. _stm32f4_disco_board:
ST STM32F4 Discovery
####################
Overview
********
The STM32F4DISCOVERY Discovery kit features an ARM Cortex-M4 based STM32F407VG MCU
with a wide range of connectivity support and configurations Here are
some highlights of the STM32F4DISCOVERY board:
- STM32 microcontroller in LQFP100 package
- Extension header for all LQFP100 I/Os for quick connection to prototyping board and easy probing
- On-board ST-LINK/V2 debugger/programmer with SWD connector
- Flexible board power supply:
- USB VBUS or external source(3.3V, 5V, 7 - 12V)
- Power management access point
- Eight LEDs:
- USB communication (LD1)
- 3.3 V power on (LD2)
- Four user LEDs: orange (LD3), green (LD4), red (LD5), and blue (LD6)
- 2 USB OTG LEDs for VBUS (LD7) and over-current (LD8)
- Two push-buttons: USER and RESET
- USB OTG FS with micro-AB connector
- LIS302DL or LIS3DSH ST MEMS 3-axis accelerometer
- MP45DT02 ST-MEMS audio sensor omni-directional digital microphone
- CS43L22 audio DAC with integrated class D speaker driver
.. image:: img/stm32f4_disco.jpg
:align: center
:alt: STM32F4DISCOVERY
More information about the board can be found at the `STM32F4DISCOVERY website`_.
Hardware
********
STM32F4DISCOVERY Discovery kit provides the following hardware components:
- STM32F407VGT6 in LQFP100 package
- ARM |reg| 32-bit Cortex |reg| -M4 CPU with FPU
- 168 MHz max CPU frequency
- VDD from 1.8 V to 3.6 V
- 1 MB Flash
- 192+4 KB SRAM including 64-Kbyte of core coupled memory
- GPIO with external interrupt capability
- 3x12-bit ADC with 24 channels
- 2x12-bit D/A converters
- RTC
- Advanced-control Timer
- General Purpose Timers (17)
- Watchdog Timers (2)
- USART/UART (6)
- I2C (3)
- SPI (3)
- SDIO
- 2xCAN
- USB 2.0 OTG FS with on-chip PHY
- USB 2.0 OTG HS/FS with dedicated DMA, on-chip full-speed PHY and ULPI
- 10/100 Ethernet MAC with dedicated DMA
- 8- to 14-bit parallel camera
- CRC calculation unit
- True random number generator
- DMA Controller
More information about STM32F407VG can be found here:
- `STM32F407VG on www.st.com`_
- `STM32F407 reference manual`_
Supported Features
==================
The Zephyr stm32f4_disco board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| PWM | on-chip | pwm |
+-----------+------------+-------------------------------------+
| USB | on-chip | usb |
+-----------+------------+-------------------------------------+
| CAN | on-chip | CAN controller |
+-----------+------------+-------------------------------------+
.. note:: CAN feature requires CAN transceiver, such as `SK Pang CAN breakout board`_.
Zephyr default configuration uses CAN_2 exclusively, as simultaneous use
of CAN_1 and CAN_2 is not yet supported.
Other hardware features are not yet supported on Zephyr porting.
The default configuration can be found in
:zephyr_file:`boards/st/stm32f4_disco/stm32f4_disco_defconfig`
Pin Mapping
===========
STM32F4DISCOVERY Discovery kit has 8 GPIO controllers. These controllers are responsible for pin muxing,
input/output, pull-up, etc.
For more details please refer to `STM32F4DISCOVERY board User Manual`_.
Default Zephyr Peripheral Mapping:
----------------------------------
.. rst-class:: rst-columns
- UART_1_TX : PB6
- UART_1_RX : PB7
- UART_2_TX : PA2
- UART_2_RX : PA3
- USER_PB : PA0
- LD3 : PD13
- LD4 : PD12
- LD5 : PD14
- LD6 : PD15
- USB DM : PA11
- USB DP : PA12
- CAN1_RX : PB8
- CAN1_TX : PB9
- CAN2_RX : PB5
- CAN2_TX : PB13
System Clock
============
STM32F4DISCOVERY System Clock could be driven by internal or external oscillator,
as well as main PLL clock. By default System clock is driven by PLL clock at 168MHz,
driven by 8MHz high speed external clock.
Serial Port
===========
STM32F4DISCOVERY Discovery kit has up to 6 UARTs. The Zephyr console output is assigned to UART2.
Default settings are 115200 8N1.
Please note that ST-Link Virtual Com Port is not wired to chip serial port. In order to
enable console output you should use a serial cable and connect it to UART2 pins (PA2/PA3).
Programming and Debugging
*************************
Applications for the ``stm32f4_disco`` board configuration can be built and
flashed in the usual way (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Flashing
========
STM32F4DISCOVERY Discovery kit includes an ST-LINK/V2 embedded debug tool interface.
This interface is supported by the openocd version included in Zephyr SDK.
Flashing an application to STM32F4DISCOVERY
-------------------------------------------
Here is an example for the :zephyr:code-sample:`blinky` application.
Run a serial host program to connect with your board:
.. code-block:: console
$ minicom -D /dev/ttyACM0
Build and flash the application:
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: stm32f4_disco
:goals: build flash
You should see user led "LD4" blinking.
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: stm32f4_disco
:maybe-skip-config:
:goals: debug
.. _STM32F4DISCOVERY website:
path_to_url
.. _STM32F4DISCOVERY board User Manual:
path_to_url
.. _STM32F407VG on www.st.com:
path_to_url
.. _STM32F407 reference manual:
path_to_url
.. _SK Pang CAN breakout board:
path_to_url
``` | /content/code_sandbox/boards/st/stm32f4_disco/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,657 |
```yaml
board:
name: stm32f769i_disco
vendor: st
socs:
- name: stm32f769xx
``` | /content/code_sandbox/boards/st/stm32f769i_disco/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 33 |
```unknown
# STM32F769I DISCOVERY board configuration
if BOARD_STM32F769I_DISCO
config SPI_STM32_INTERRUPT
default y
depends on SPI
config INPUT
default y if LVGL
if NETWORKING
config NET_L2_ETHERNET
default y
endif # NETWORKING
endif # BOARD_STM32F769I_DISCO
``` | /content/code_sandbox/boards/st/stm32f769i_disco/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 79 |
```yaml
identifier: stm32f769i_disco
name: ST STM32F769I Discovery
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 384
flash: 2048
supported:
- arduino_i2c
- i2c
- spi
- arduino_spi
- gpio
- arduino_gpio
- netif:eth
- memc
- kscan:touch
vendor: st
``` | /content/code_sandbox/boards/st/stm32f769i_disco/stm32f769i_disco.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 121 |
```unknown
/*
*
*/
/ {
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpioa 6 0>, /* A0 */
<1 0 &gpioa 4 0>, /* A1 */
<2 0 &gpioc 2 0>, /* A2 */
<3 0 &gpiof 10 0>, /* A3 */
<4 0 &gpiof 8 0>, /* A4 */
<5 0 &gpiof 9 0>, /* A5 */
<6 0 &gpioc 7 0>, /* D0 */
<7 0 &gpioc 6 0>, /* D1 */
<8 0 &gpioj 1 0>, /* D2 */
<9 0 &gpiof 6 0>, /* D3 */
<10 0 &gpioj 0 0>, /* D4 */
<11 0 &gpioc 8 0>, /* D5 */
<12 0 &gpiof 7 0>, /* D6 */
<13 0 &gpioj 3 0>, /* D7 */
<14 0 &gpioj 4 0>, /* D8 */
<15 0 &gpioh 6 0>, /* D9 */
<16 0 &gpioa 11 0>, /* D10 */
<17 0 &gpiob 15 0>, /* D11 */
<18 0 &gpiob 14 0>, /* D12 */
<19 0 &gpioa 12 0>, /* D13 */
<20 0 &gpiob 9 0>, /* D14 */
<21 0 &gpiob 8 0>; /* D15 */
};
};
arduino_spi: &spi2 {};
``` | /content/code_sandbox/boards/st/stm32f769i_disco/arduino_r3_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 478 |
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