text stringlengths 9 39.2M | dir stringlengths 25 226 | lang stringclasses 163 values | created_date timestamp[s] | updated_date timestamp[s] | repo_name stringclasses 751 values | repo_full_name stringclasses 752 values | star int64 1.01k 183k | len_tokens int64 1 18.5M |
|---|---|---|---|---|---|---|---|---|
```yaml
board:
name: nucleo_f767zi
vendor: st
socs:
- name: stm32f767xx
``` | /content/code_sandbox/boards/st/nucleo_f767zi/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 31 |
```unknown
# STM32F767ZI Nucleo board configuration
if BOARD_NUCLEO_F767ZI
if NETWORKING
config NET_L2_ETHERNET
default y
endif # NETWORKING
endif # BOARD_NUCLEO_F767ZI
``` | /content/code_sandbox/boards/st/nucleo_f767zi/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 57 |
```unknown
/*
*
*/
/ {
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpioa 3 0>, /* A0 */
<1 0 &gpioc 0 0>, /* A1 */
<2 0 &gpioc 3 0>, /* A2 */
<3 0 &gpiof 3 0>, /* A3 */
<4 0 &gpiof 5 0>, /* A4 */
<5 0 &gpiof 10 0>, /* A5 */
<6 0 &gpiog 9 0>, /* D0 */
<7 0 &gpiog 14 0>, /* D1 */
<8 0 &gpiof 15 0>, /* D2 */
<9 0 &gpioe 13 0>, /* D3 */
<10 0 &gpiof 14 0>, /* D4 */
<11 0 &gpioe 11 0>, /* D5 */
<12 0 &gpioe 9 0>, /* D6 */
<13 0 &gpiof 13 0>, /* D7 */
<14 0 &gpiof 12 0>, /* D8 */
<15 0 &gpiod 15 0>, /* D9 */
<16 0 &gpiod 14 0>, /* D10 */
<17 0 &gpioa 7 0>, /* D11 */
<18 0 &gpioa 6 0>, /* D12 */
<19 0 &gpioa 5 0>, /* D13 */
<20 0 &gpiob 9 0>, /* D14 */
<21 0 &gpiob 8 0>; /* D15 */
};
};
arduino_serial: &usart6 {};
arduino_i2c: &i2c1 {};
arduino_spi: &spi1 {};
``` | /content/code_sandbox/boards/st/nucleo_f767zi/arduino_r3_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 497 |
```restructuredtext
.. _steval_stwinbx1_board:
STEVAL STWINBX1 Development kit
###############################
Overview
********
The STWIN.box (STEVAL-STWINBX1) is a development kit that features an Arm|reg| Cortex|reg|-M33 based STM32U585AI MCU
and is a reference design that simplifies prototyping and testing of advanced industrial sensing applications in
IoT contexts such as condition monitoring and predictive maintenance.
The STEVAL-STWINBX1 kit consists of an STWIN.box core system, a 480mAh LiPo battery, an adapter for the ST-LINK debugger,
a plastic case, an adapter board for DIL 24 sensors and a flexible cable.
.. image:: img/steval_stwinbx1.jpg
:align: center
:alt: STEVAL-STWINBX1 Development kit
More information about the board can be found at the `STEVAL-STWINBX1 Development kit website`_.
Supported Features
******************
The STEVAL-STWINBX1 provides motion, environmental, and audio
sensor data through either the built-in RS485 transceiver, BLE, Wi-Fi, and
NFC or USB protocols to a host application running on a smartphone/PC to implement applications such as:
- Multisensing wireless platform for vibration monitoring and ultrasound detection
- Baby crying detection with Cloud AI learning
- Barometer / environmental monitoring
- Vehicle / goods tracking
- Vibration monitoring
- Compass and inclinometer
- Sensor data logger
(see `Sensing`_ section for the complete lists of available
sensors on board)
Hardware
********
The STM32U585xx devices are an ultra-low-power microcontrollers family (STM32U5
Series) based on the high-performance Arm|reg| Cortex|reg|-M33 32-bit RISC core.
They operate at a frequency of up to 160 MHz.
- Ultra-low-power with FlexPowerControl (down to 300 nA Standby mode and 19.5 uA/MHz run mode)
- Core: ARM |reg| 32-bit Cortex |reg| -M33 CPU with TrustZone |reg| and FPU.
- Performance benchmark:
- 1.5 DMPIS/MHz (Drystone 2.1)
- 651 CoreMark |reg| (4.07 CoreMark |reg| /MHZ)
- Security and cryptography
- Arm |reg| TrustZone |reg| and securable I/Os memories and peripherals
- Flexible life cycle scheme with RDP (readout protection) and password protected debug
- Root of trust thanks to unique boot entry and secure hide protection area (HDP)
- Secure Firmware Installation thanks to embedded Root Secure Services
- Secure data storage with hardware unique key (HUK)
- Secure Firmware Update support with TF-M
- 2 AES coprocessors including one with DPA resistance
- Public key accelerator, DPA resistant
- On-the-fly decryption of Octo-SPI external memories
- HASH hardware accelerator
- Active tampers
- True Random Number Generator NIST SP800-90B compliant
- 96-bit unique ID
- 512-byte One-Time Programmable for user data
- Active tampers
- Clock management:
- 4 to 50 MHz crystal oscillator
- 32 kHz crystal oscillator for RTC (LSE)
- Internal 16 MHz factory-trimmed RC ( |plusminus| 1%)
- Internal low-power 32 kHz RC ( |plusminus| 5%)
- 2 internal multispeed 100 kHz to 48 MHz oscillators, including one auto-trimmed by
LSE (better than |plusminus| 0.25 % accuracy)
- 3 PLLs for system clock, USB, audio, ADC
- Internal 48 MHz with clock recovery
- Power management
- Embedded regulator (LDO)
- Embedded SMPS step-down converter supporting switch on-the-fly and voltage scaling
- RTC with HW calendar and calibration
- Up to 136 fast I/Os, most 5 V-tolerant, up to 14 I/Os with independent supply down to 1.08 V
- Up to 24 capacitive sensing channels: support touchkey, linear and rotary touch sensors
- Up to 17 timers and 2 watchdogs
- 2x 16-bit advanced motor-control
- 2x 32-bit and 5 x 16-bit general purpose
- 4x low-power 16-bit timers (available in Stop mode)
- 2x watchdogs
- 2x SysTick timer
- ART accelerator
- 8-Kbyte instruction cache allowing 0-wait-state execution from Flash and
external memories: up to 160 MHz, MPU, 240 DMIPS and DSP
- 4-Kbyte data cache for external memories
- Memories
- 2-Mbyte Flash memory with ECC, 2 banks read-while-write, including 512 Kbytes with 100 kcycles
- 786-Kbyte SRAM with ECC OFF or 722-Kbyte SRAM including up to 322-Kbyte SRAM with ECC ON
- External memory interface supporting SRAM, PSRAM, NOR, NAND and FRAM memories
- 2 Octo-SPI memory interfaces
- Rich analog peripherals (independent supply)
- 14-bit ADC 2.5-Msps, resolution up to 16 bits with hardware oversampling
- 12-bit ADC 2.5-Msps, with hardware oversampling, autonomous in Stop 2 mode
- 12-bit DAC, low-power sample and hold
- 2 operational amplifiers with built-in PGA
- 2 ultra-low-power comparators
- Up to 22 communication interfaces
- USB Type-C / USB power delivery controller
- USB OTG 2.0 full-speed controller
- 2x SAIs (serial audio interface)
- 4x I2C FM+(1 Mbit/s), SMBus/PMBus
- 6x USARTs (ISO 7816, LIN, IrDA, modem)
- 3x SPIs (5x SPIs with dual OCTOSPI in SPI mode)
- 1x FDCAN
- 2x SDMMC interface
- 16- and 4-channel DMA controllers, functional in Stop mode
- 1 multi-function digital filter (6 filters)+ 1 audio digital filter with
sound-activity detection
- CRC calculation unit
- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell |trade|
- True Random Number Generator (RNG)
- Graphic features
- Chrom-ART Accelerator (DMA2D) for enhanced graphic content creation
- 1 digital camera interface
- Mathematical co-processor
- CORDIC for trigonometric functions acceleration
- FMAC (filter mathematical accelerator)
More information about STM32U585AI can be found here:
- `STM32U585 on www.st.com`_
- `STM32U585 reference manual`_
Connectivity
************
- **BlueNRG-M2SA** Bluetooth|reg| low energy v5.2 wireless technology module
(`BlueNRG-M2 datasheet`_)
- **MXCHIP EMW3080** (802.11 b/g/n compliant Wi-Fi module)
- **ST25DV64K** dynamic NFC/RFID tag IC with 64-Kbit EEPROM
(`st25dv64k datasheet`_)
- USB Type-C|trade| connector (power supply and data)
- STDC14 programming connector for **STLINK-V3MINI**
(`stlink-v3mini`_)
- microSD card socket
Sensing
*******
- **ILPS22QS** MEMS pressure sensor
(`ilps22qs datasheet`_)
- **STTS22H** Digital temperature sensor
(`stts22hh datasheet`_)
- **TSV912** wide-bandwidth (8 MHz) rail-to-rail I/O op-amp
(`tsv912 datasheet`_)
- **ISM330DHCX** iNEMO IMU, 3D accelerometer and 3D gyroscope with Machine Learning Core and Finite State Machine
(`ism330dhcx datasheet`_)
- **IIS3DWB** wide bandwidth accelerometer
(`iis3dwb datasheet`_)
- **IIS2DLPC** high-performance ultra-low-power 3-axis accelerometer for industrial applications
(`iis2dlpc datasheet`_)
- **IIS2MDC** 3-axis magnetometer
(`iis2mdc datasheet`_)
- **IIS2ICLX** high-accuracy, high-resolution, low-power, 2-axis digital inclinometer with Machine Learning Core
(`iis2iclx datasheet`_)
- **IMP23ABSU** analog MEMS microphone
(`imp23absu datasheet`_)
- **IMP34DT05** digital MEMS microphone
(`imp34dt05 datasheet`_)
Connections and IOs
*******************
- 2x user LEDs
- **led0** (Green)
- **led1** (Orange)
- 4x buttons/switch
- **User** / **boot0** button, available to user application
but useful to let the SensorTile.box PRO enter DFU mode
if found pressed after h/w reset (see **rst** button and
`Programming and Debugging`_ section)
- **RESET** button, used to reset the board
- **PWR** button, used to Power on/off the board
For more details please refer to `STEVAL-STWINBX1 board User Manual`_.
System Clock
------------
STEVAL-STWINBX1 System Clock could be driven by an internal or external oscillator,
as well as the main PLL clock. By default the System clock is driven by the PLL clock at 160MHz,
driven by 16MHz high speed external oscillator.
The internal AHB/APB1/APB2/APB3 AMBA buses are all clocked at 160MHz.
Serial Port
-----------
The USART2 is connected to JTAG/SWD connector
and may be used as console.
USB interface
-------------
STEVAL-STWINBX1 can be connected as a USB device to a PC host through its USB-C connector.
The final application may use it to declare STEVAL-STWINBX1 device as belonging to a
certain standard or vendor class, e.g. a CDC, a mass storage or a composite device with both
functions.
Console
-------
There are two possible options for Zephyr console output:
- through USB as USB CDC/ACM class. This is the default case present in the board dts file
and is enabled by :kconfig:option:`CONFIG_BOARD_SERIAL_BACKEND_CDC_ACM`.
.. code-block:: dts
:caption: boards/st/steval_stwinbx1/steval_stwinbx1.dts
/ {
chosen {
zephyr,console = &cdc_acm_uart0;
};
};
&zephyr_udc0 {
cdc_acm_uart0: cdc_acm_uart0 {
compatible = "zephyr,cdc-acm-uart";
};
};
- through USART2 which is available on SWD connector (CN4). In this case a JTAG adapter
can be used to connect STEVAL-STWINBX1 and have both SWD and console lines available.
To enable console and shell over UART:
- in your prj.conf, override the board's default configuration by setting :code:`CONFIG_BOARD_SERIAL_BACKEND_CDC_ACM=n`
- add an overlay file named ``<board>.overlay``:
.. code-block:: dts
/ {
chosen {
zephyr,console = &usart2;
zephyr,shell-uart = &usart2;
};
};
Console default settings are 115200 8N1.
Programming and Debugging
-------------------------
There are two alternative methods of flashing ST Sensortile.box Pro board:
1. Using DFU software tools
This method requires to enter STM32U585 ROM bootloader DFU mode
by powering up (or reset) the board while keeping the USER (BOOT0) button pressed.
No additional hardware is required except a USB-C cable. This method is fully
supported by :ref:`flash-debug-host-tools`.
You can read more about how to enable and use the ROM bootloader by checking
the application note `AN2606`_ (STM32U585xx section).
2. Using SWD hardware tools
The STEVAL-STWINBX1 does not include a on-board debug probe.
It requires to connect additional hardware, like a ST-LINK/V3
embedded debug tool, to the board STDC14 connector (CN4) labeled ``MCU-/SWD``.
Install dfu-util
----------------
.. note::
Required only to use dfu-util runner.
It is recommended to use at least v0.9 of dfu-util. The package available in
Debian and Ubuntu can be quite old, so you might have to build dfu-util from source.
Information about how to get the source code and how to build it can be found
at the `DFU-UTIL website`_
Install STM32CubeProgrammer
---------------------------
.. note::
Required to program over DFU (default) or SWD.
It is recommended to use the latest version of `STM32CubeProgrammer`_
Flash an Application to STEVAL-STWINBX1
------------------------------------------
There are two ways to enter DFU mode:
1. USB-C cable not connected
While pressing the USER button, connect the USB-C cable to the USB OTG STEVAL-STWINBX1
port and to your computer.
2. USB-C cable connected
While pressing the USER button, press the RESET button and release it.
With both methods, the board should be forced to enter DFU mode.
Check that the board is indeed in DFU mode:
.. code-block:: console
$ sudo dfu-util -l
dfu-util 0.9
This program is Free Software and has ABSOLUTELY NO WARRANTY
Please report bugs to path_to_url
Found DFU: [0483:df11] ver=0200, devnum=58, cfg=1, intf=0, path="3-1", alt=2, name="@OTP Memory /0x0BFA0000/01*512 e", serial="207136863530"
Found DFU: [0483:df11] ver=0200, devnum=58, cfg=1, intf=0, path="3-1", alt=1, name="@Option Bytes /0x40022040/01*64 e", serial="207136863530"
Found DFU: [0483:df11] ver=0200, devnum=58, cfg=1, intf=0, path="3-1", alt=0, name="@Internal Flash /0x08000000/256*08Kg", serial="207136863530"
You should see the following confirmation on your Linux host:
.. code-block:: console
$ dmesg
usb 3-1: new full-speed USB device number 16 using xhci_hcd
usb 3-1: New USB device found, idVendor=0483, idProduct=df11, bcdDevice= 2.00
usb 3-1: New USB device strings: Mfr=1, Product=2, SerialNumber=3
usb 3-1: Product: DFU in FS Mode
usb 3-1: Manufacturer: STMicroelectronics
usb 3-1: SerialNumber: 207136863530
You can build and flash the provided sample application
(:ref:`steval_stwinbx1_sample_sensors`) that reads sensors data and outputs
values on the console.
.. _STEVAL-STWINBX1 Development kit website:
path_to_url
.. _STEVAL-STWINBX1 board User Manual:
path_to_url
.. _STM32U585 on www.st.com:
path_to_url
.. _STM32U585 reference manual:
path_to_url
.. _STM32CubeProgrammer:
path_to_url
.. _DFU-UTIL website:
path_to_url
.. _AN2606:
path_to_url
.. _BlueNRG-M2 datasheet:
path_to_url
.. _st25dv64k datasheet:
path_to_url
.. _stlink-v3mini:
path_to_url
.. _ilps22qs datasheet:
path_to_url
.. _stts22hh datasheet:
path_to_url
.. _tsv912 datasheet:
path_to_url
.. _ism330dhcx datasheet:
path_to_url
.. _iis3dwb datasheet:
path_to_url
.. _iis2dlpc datasheet:
path_to_url
.. _iis2mdc datasheet:
path_to_url
.. _iis2iclx datasheet:
path_to_url
.. _imp23absu datasheet:
path_to_url
.. _imp34dt05 datasheet:
path_to_url
``` | /content/code_sandbox/boards/st/steval_stwinbx1/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 3,753 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/f7/stm32f767Xi.dtsi>
#include <st/f7/stm32f767zitx-pinctrl.dtsi>
#include "arduino_r3_connector.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/*
* WARNING: The pin PA7 will conflict on selection of SPI_1 and ETH_STM32_HAL.
* If you require both peripherals, and you do not need Arduino Uno v3
* compatibility, the pin PB5 (also on ST Zio connector) can be used
* for the SPI_1 MOSI signal.
*/
/ {
model = "STMicroelectronics STM32F767ZI-NUCLEO board";
compatible = "st,stm32f767zi-nucleo";
chosen {
zephyr,console = &usart3;
zephyr,shell-uart = &usart3;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,dtcm = &dtcm;
zephyr,canbus = &can1;
};
leds: leds {
compatible = "gpio-leds";
green_led: led_0 {
gpios = <&gpiob 0 GPIO_ACTIVE_HIGH>;
label = "User LD1";
};
blue_led: led_1 {
gpios = <&gpiob 7 GPIO_ACTIVE_HIGH>;
label = "User LD2";
};
red_led: led_2 {
gpios = <&gpiob 14 GPIO_ACTIVE_HIGH>;
label = "User LD3";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button_0 {
label = "User";
gpios = <&gpioc 13 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_0>;
};
};
aliases {
led0 = &green_led;
led1 = &blue_led;
led2 = &red_led;
sw0 = &user_button;
watchdog0 = &iwdg;
volt-sensor0 = &vref;
volt-sensor1 = &vbat;
};
};
&clk_lsi {
status = "okay";
};
&clk_hse {
hse-bypass;
clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
status = "okay";
};
&pll {
div-m = <4>;
mul-n = <216>;
div-p = <2>;
div-q = <9>;
clocks = <&clk_hse>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(216)>;
ahb-prescaler = <1>;
apb1-prescaler = <4>;
apb2-prescaler = <2>;
};
&usart2 {
pinctrl-0 = <&usart2_tx_pd5
&usart2_rx_pd6
&usart2_rts_pd4
&usart2_cts_pd3>;
pinctrl-names = "default";
current-speed = <115200>;
};
&usart3 {
pinctrl-0 = <&usart3_tx_pd8 &usart3_rx_pd9>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&usart6 {
pinctrl-0 = <&usart6_tx_pg14 &usart6_rx_pg9>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
zephyr_udc0: &usbotg_fs {
pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12>;
pinctrl-names = "default";
status = "okay";
};
&i2c1 {
pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
&timers1 {
st,prescaler = <10000>;
status = "okay";
pwm1: pwm {
status = "okay";
pinctrl-0 = <&tim1_ch3_pe13>;
pinctrl-names = "default";
};
};
&spi1 {
pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pa7>;
pinctrl-names = "default";
cs-gpios = <&gpiod 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
/*
* WARNING: The pin PA7 will conflict on selection of SPI_1 and
* ETH_STM32_HAL.
*/
status = "okay";
};
&iwdg {
status = "okay";
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>,
<&rcc STM32_SRC_LSI RTC_SEL(2)>;
status = "okay";
};
&can1 {
pinctrl-0 = <&can1_rx_pd0 &can1_tx_pd1>;
pinctrl-names = "default";
status = "okay";
};
&adc1 {
pinctrl-0 = <&adc1_in0_pa0>;
pinctrl-names = "default";
st,adc-clock-source = <SYNC>;
st,adc-prescaler = <2>;
status = "okay";
};
&dac1 {
status = "okay";
pinctrl-0 = <&dac_out1_pa4>;
pinctrl-names = "default";
};
&rng {
status = "okay";
};
&mac {
status = "okay";
pinctrl-0 = <ð_mdc_pc1
ð_rxd0_pc4
ð_rxd1_pc5
ð_ref_clk_pa1
ð_mdio_pa2
ð_crs_dv_pa7
ð_tx_en_pg11
ð_txd0_pg13
ð_txd1_pb13>;
pinctrl-names = "default";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/*
* The two sectors 0-1 (32+32 kbytes) are reserved for
* the bootloader.
*/
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x0 DT_SIZE_K(64)>;
read-only;
};
/*
* The flash starting at offset 0x10000 and ending at
* offset 0x1ffff is reserved for use by the application.
* This represents sectors 2-3 (32+32 kbytes)
*/
storage_partition: partition@10000 {
label = "storage";
reg = <0x00010000 DT_SIZE_K(64)>;
};
/*
* Sector 4 (128 kbytes) unallocated.
*/
/*
* Allocated 3 (256k x 3) sectors for image-0. Sectors 5-7.
*/
slot0_partition: partition@40000 {
label = "image-0";
reg = <0x00040000 DT_SIZE_K(768)>;
};
/*
* Allocated 3 (256k x 3) sectors for image-1. Sectors 8-10.
*/
slot1_partition: partition@100000 {
label = "image-1";
reg = <0x00100000 DT_SIZE_K(768)>;
};
/*
* Allocated 1 (256k) sector for image-scratch. Sector 11.
*/
scratch_partition: partition@1C0000 {
label = "image-scratch";
reg = <0x001C0000 DT_SIZE_K(256)>;
};
};
};
&vref {
status = "okay";
};
&vbat {
status = "okay";
};
``` | /content/code_sandbox/boards/st/nucleo_f767zi/nucleo_f767zi.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,810 |
```ini
source [find board/st_nucleo_f7.cfg]
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
``` | /content/code_sandbox/boards/st/nucleo_f767zi/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 70 |
```restructuredtext
.. _nucleo_f767zi_board:
ST Nucleo F767ZI
################
Overview
********
The STM32 Nucleo-144 F767ZI boards offer combinations of performance and
power that provide an affordable and flexible way for users to build
prototypes and try out new concepts. For compatible boards, the SMPS
significantly reduces power consumption in Run mode.
The Arduino-compatible ST Zio connector expands functionality of the Nucleo
open development platform, with a wide choice of specialized Arduino* Uno V3
shields.
The STM32 Nucleo-144 board does not require any separate probe as it integrates
the ST-LINK/V2-1 debugger/programmer.
The STM32 Nucleo-144 board comes with the STM32 comprehensive free software
libraries and examples available with the STM32Cube MCU Package.
Key Features
- STM32 microcontroller in LQFP144 package
- Ethernet compliant with IEEE-802.3-2002 (depending on STM32 support)
- USB OTG or full-speed device (depending on STM32 support)
- 3 user LEDs
- 2 user and reset push-buttons
- 32.768 kHz crystal oscillator
- Board connectors:
- USB with Micro-AB
- SWD
- Ethernet RJ45 (depending on STM32 support)
- ST Zio connector including Arduino* Uno V3
- ST morpho
- Flexible power-supply options: ST-LINK USB VBUS or external sources.
- On-board ST-LINK/V2-1 debugger/programmer with USB re-enumeration
- capability: mass storage, virtual COM port and debug port.
- Comprehensive free software libraries and examples available with the
STM32Cube MCU package.
- Arm* Mbed Enabled* compliant (only for some Nucleo part numbers)
.. image:: img/nucleo_f767zi.jpg
:align: center
:alt: Nucleo F767ZI
More information about the board can be found at the `Nucleo F767ZI website`_.
Hardware
********
Nucleo F767ZI provides the following hardware components:
- STM32F767ZI in LQFP144 package
- ARM 32-bit Cortex-M7 CPU with FPU
- Chrom-ART Accelerator
- ART Accelerator
- 216 MHz max CPU frequency
- VDD from 1.7 V to 3.6 V
- 2 MB Flash
- 512 KB SRAM
- 16-bit timers(10)
- 32-bit timers(2)
- SPI(6)
- I2C(4)
- I2S (3)
- USART(4)
- UART(4)
- USB OTG Full Speed and High Speed(1)
- USB OTG Full Speed(1)
- CAN(2)
- SAI(2)
- SPDIF_Rx(4)
- HDMI_CEC(1)
- Dual Mode Quad SPI(1)
- Camera Interface
- GPIO(up to 168) with external interrupt capability
- 12-bit ADC(3) with 24 channels / 2.4 MSPS
- 12-bit DAC with 2 channels(2)
- True Random Number Generator (RNG)
- 16-channel DMA
- LCD-TFT Controller with XGA resolution
Supported Features
==================
The Zephyr nucleo_f767zi board configuration supports the following hardware
features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| ETHERNET | on-chip | ethernet (*) |
+-----------+------------+-------------------------------------+
| USB | on-chip | usb_device |
+-----------+------------+-------------------------------------+
| COUNTER | on-chip | rtc |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| PWM | on-chip | pwm |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | independent watchdog |
+-----------+------------+-------------------------------------+
| ADC | on-chip | ADC Controller |
+-----------+------------+-------------------------------------+
| RNG | on-chip | True Random number generator |
+-----------+------------+-------------------------------------+
| DAC | on-chip | DAC Controller |
+-----------+------------+-------------------------------------+
| RTC | on-chip | rtc |
+-----------+------------+-------------------------------------+
(*) nucleo_f767zi with soc cut-A (Device marking A) has some ethernet
instability (:github:`26519`).
Use of cut-Z is advised.
see restrictions errata:
path_to_url
Other hardware features are not yet supported on this Zephyr port.
The default configuration can be found in
:zephyr_file:`boards/st/nucleo_f767zi/nucleo_f767zi_defconfig`
For more details please refer to `STM32 Nucleo-144 board User Manual`_.
Default Zephyr Peripheral Mapping:
----------------------------------
The Nucleo F767ZI board features a ST Zio connector (extended Arduino Uno V3)
and a ST morpho connector. Board is configured as follows:
- UART_2 TX/RX/RTS/CTS : PD5/PD6/PD4/PD3
- UART_3 TX/RX : PD8/PD9 (ST-Link Virtual Port Com)
- UART_6 TX/RX : PG14/PG9 (Arduino UART)
- USER_PB : PC13
- LD1 : PB0
- LD2 : PB7
- LD3 : PB14
- ETH : PA1, PA2, PA7, PB13, PC1, PC4, PC5, PG11, PG13
- USB DM : PA11
- USB DP : PA12
- I2C : PB8, PB9
- PWM : PE13
- SPI : PD14, PA5, PA6, PA7
.. note::
The Arduino Uno v3 specified SPI device conflicts with the on-board ETH
device on pin PA7.
System Clock
------------
Nucleo F767ZI System Clock could be driven by an internal or external
oscillator, as well as the main PLL clock. By default, the System clock is
driven by the PLL clock at 72MHz, driven by an 8MHz high-speed external clock.
Serial Port
-----------
Nucleo F767ZI board has 4 UARTs and 4 USARTs. The Zephyr console output is
assigned to UART3. Default settings are 115200 8N1.
Programming and Debugging
*************************
Applications for the ``nucleo_f767zi`` board configuration can be built and
flashed in the usual way (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Flashing
========
Nucleo F767ZI board includes an ST-LINK/V2-1 embedded debug tool interface.
Flashing an application to Nucleo F767ZI
----------------------------------------
Here is an example for the :ref:`hello_world` application.
Run a serial host program to connect with your Nucleo board.
.. code-block:: console
$ minicom -b 115200 -D /dev/ttyACM0
Build and flash the application:
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nucleo_f767zi
:goals: build flash
You should see the following message on the console:
.. code-block:: console
$ Hello World! nucleo_f767zi
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nucleo_f767zi
:maybe-skip-config:
:goals: debug
.. _Nucleo f767zi website:
path_to_url
.. _STM32 Nucleo-144 board User Manual:
path_to_url
.. _STM32f767zi on www.st.com:
path_to_url
.. _STM32F767 reference manual:
path_to_url
``` | /content/code_sandbox/boards/st/nucleo_f767zi/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,887 |
```unknown
config BOARD_NUCLEO_H563ZI
select SOC_STM32H563XX
``` | /content/code_sandbox/boards/st/nucleo_h563zi/Kconfig.nucleo_h563zi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 22 |
```cmake
board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
board_runner_args(pyocd "--target=stm32h563zitx")
board_runner_args(jlink "--device=STM32H563ZI" "--reset-after-load")
board_runner_args(openocd "--tcl-port=6666")
board_runner_args(openocd --cmd-pre-init "gdb_report_data_abort enable")
board_runner_args(openocd "--no-halt")
include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake)
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
#include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
# FIXME: official openocd runner not yet available.
``` | /content/code_sandbox/boards/st/nucleo_h563zi/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 189 |
```unknown
# enable uart driver
CONFIG_SERIAL=y
# console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# Enable clock
CONFIG_CLOCK_CONTROL=y
# Enable MPU
CONFIG_ARM_MPU=y
# Enable HW stack protection
CONFIG_HW_STACK_PROTECTION=y
# enable GPIO
CONFIG_GPIO=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/nucleo_h563zi/nucleo_h563zi_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 73 |
```unknown
/*
*/
#include <zephyr/dt-bindings/gpio/gpio.h>
#include <zephyr/dt-bindings/gpio/st-morpho-header.h>
/ {
st_morpho_header: st-morpho-header {
compatible = "st-morpho-header";
#gpio-cells = <2>;
gpio-map-mask = <ST_MORPHO_PIN_MASK 0x0>;
gpio-map-pass-thru = <0x0 GPIO_DT_FLAGS_MASK>;
gpio-map = <ST_MORPHO_L_1 0 &gpioc 10 0>,
<ST_MORPHO_L_2 0 &gpioc 11 0>,
<ST_MORPHO_L_3 0 &gpioc 12 0>,
<ST_MORPHO_L_4 0 &gpiod 2 0>,
<ST_MORPHO_L_9 0 &gpiof 6 0>,
<ST_MORPHO_L_11 0 &gpiof 7 0>,
<ST_MORPHO_L_13 0 &gpioa 13 0>,
<ST_MORPHO_L_15 0 &gpioa 14 0>,
<ST_MORPHO_L_17 0 &gpioa 15 0>,
<ST_MORPHO_L_21 0 &gpiob 7 0>,
<ST_MORPHO_L_23 0 &gpioc 13 0>,
<ST_MORPHO_L_25 0 &gpioc 14 0>, /* SB45=ON, R34=OFF */
<ST_MORPHO_L_27 0 &gpioc 15 0>, /* SB44=ON, R35=OFF */
<ST_MORPHO_L_28 0 &gpioa 0 0>,
<ST_MORPHO_L_29 0 &gpioh 0 0>,
<ST_MORPHO_L_30 0 &gpioa 1 0>, /* SB58=OFF */
<ST_MORPHO_L_31 0 &gpioh 1 0>,
<ST_MORPHO_L_32 0 &gpioa 4 0>, /* SB56=OFF */
<ST_MORPHO_L_34 0 &gpiob 0 0>, /* LD1 green LED if SB43=ON */
<ST_MORPHO_L_35 0 &gpioc 2 0>,
<ST_MORPHO_L_36 0 &gpioc 1 0>, /* SB62=OFF */
<ST_MORPHO_L_37 0 &gpioc 3 0>,
<ST_MORPHO_L_38 0 &gpioc 0 0>,
<ST_MORPHO_L_39 0 &gpiod 4 0>,
<ST_MORPHO_L_40 0 &gpiod 3 0>,
<ST_MORPHO_L_41 0 &gpiod 5 0>,
<ST_MORPHO_L_42 0 &gpiog 2 0>,
<ST_MORPHO_L_43 0 &gpiod 6 0>,
<ST_MORPHO_L_44 0 &gpiog 3 0>,
<ST_MORPHO_L_45 0 &gpiod 7 0>,
<ST_MORPHO_L_46 0 &gpioe 2 0>, /* SB64=ON */
<ST_MORPHO_L_47 0 &gpioe 3 0>, /* SB78=ON */
<ST_MORPHO_L_48 0 &gpioe 4 0>, /* SB8=ON */
<ST_MORPHO_L_50 0 &gpioe 5 0>, /* SB9=ON */
<ST_MORPHO_L_51 0 &gpiof 1 0>,
<ST_MORPHO_L_52 0 &gpiof 2 0>,
<ST_MORPHO_L_53 0 &gpiof 0 0>,
<ST_MORPHO_L_54 0 &gpiof 8 0>,
<ST_MORPHO_L_55 0 &gpiod 1 0>,
<ST_MORPHO_L_56 0 &gpiof 9 0>,
<ST_MORPHO_L_57 0 &gpiod 0 0>,
<ST_MORPHO_L_58 0 &gpiog 1 0>,
<ST_MORPHO_L_59 0 &gpiog 0 0>,
<ST_MORPHO_L_62 0 &gpioe 6 0>, /* SB68=ON */
<ST_MORPHO_L_63 0 &gpiog 9 0>,
<ST_MORPHO_L_64 0 &gpiog 15 0>,
<ST_MORPHO_L_65 0 &gpiog 12 0>,
<ST_MORPHO_L_66 0 &gpiog 10 0>,
<ST_MORPHO_L_68 0 &gpiog 13 0>, /* SB37=OFF */
<ST_MORPHO_L_69 0 &gpiod 9 0>, /* SB75=ON, SB18=OFF, SB65=OFF */
<ST_MORPHO_L_70 0 &gpiog 11 0>, /* SB34=OFF */
<ST_MORPHO_R_1 0 &gpioc 9 0>,
<ST_MORPHO_R_2 0 &gpioc 8 0>,
<ST_MORPHO_R_3 0 &gpiob 8 0>,
<ST_MORPHO_R_4 0 &gpioc 6 0>,
<ST_MORPHO_R_5 0 &gpiob 9 0>,
<ST_MORPHO_R_6 0 &gpioc 5 0>, /* SB36=OFF */
<ST_MORPHO_R_10 0 &gpiod 8 0>,
<ST_MORPHO_R_11 0 &gpioa 5 0>, /* LD1 green LED if SB51=ON */
<ST_MORPHO_R_12 0 &gpioa 12 0>, /* SB22=ON, SB28=OFF */
<ST_MORPHO_R_13 0 &gpioa 6 0>,
<ST_MORPHO_R_14 0 &gpioa 11 0>, /* SB21=ON, SB27=OFF */
<ST_MORPHO_R_15 0 &gpioa 7 0>, /* SB38=OFF */
<ST_MORPHO_R_16 0 &gpiob 12 0>,
<ST_MORPHO_R_17 0 &gpiob 6 0>,
<ST_MORPHO_R_19 0 &gpioc 7 0>,
<ST_MORPHO_R_21 0 &gpioa 9 0>, /* SB31=OFF */
<ST_MORPHO_R_22 0 &gpiob 2 0>,
<ST_MORPHO_R_23 0 &gpioa 8 0>,
<ST_MORPHO_R_24 0 &gpiob 1 0>,
<ST_MORPHO_R_25 0 &gpiob 10 0>,
<ST_MORPHO_R_26 0 &gpiob 15 0>, /* JP6=OFF */
<ST_MORPHO_R_27 0 &gpiob 4 0>,
<ST_MORPHO_R_28 0 &gpiob 14 0>, /* SB30=OFF */
<ST_MORPHO_R_29 0 &gpiob 5 0>,
<ST_MORPHO_R_30 0 &gpiob 13 0>, /* SB29=OFF */
<ST_MORPHO_R_31 0 &gpiob 3 0>, /* SB39=OFF */
<ST_MORPHO_R_33 0 &gpioa 10 0>,
<ST_MORPHO_R_34 0 &gpioc 4 0>, /* SB42=OFF */
<ST_MORPHO_R_35 0 &gpioa 2 0>, /* SB69=OFF */
<ST_MORPHO_R_36 0 &gpiof 5 0>,
<ST_MORPHO_R_37 0 &gpioa 3 0>,
<ST_MORPHO_R_38 0 &gpiof 4 0>, /* LD2 yellow LED */
<ST_MORPHO_R_40 0 &gpioe 8 0>,
<ST_MORPHO_R_41 0 &gpiod 13 0>,
<ST_MORPHO_R_42 0 &gpiof 10 0>,
<ST_MORPHO_R_43 0 &gpiod 12 0>,
<ST_MORPHO_R_44 0 &gpioe 7 0>,
<ST_MORPHO_R_45 0 &gpiod 11 0>,
<ST_MORPHO_R_46 0 &gpiod 14 0>,
<ST_MORPHO_R_47 0 &gpioe 10 0>,
<ST_MORPHO_R_48 0 &gpiod 15 0>,
<ST_MORPHO_R_49 0 &gpioe 12 0>,
<ST_MORPHO_R_50 0 &gpiof 14 0>,
<ST_MORPHO_R_51 0 &gpioe 14 0>,
<ST_MORPHO_R_52 0 &gpioe 9 0>,
<ST_MORPHO_R_53 0 &gpioe 15 0>,
<ST_MORPHO_R_55 0 &gpioe 13 0>,
<ST_MORPHO_R_56 0 &gpioe 11 0>,
<ST_MORPHO_R_57 0 &gpiof 13 0>,
<ST_MORPHO_R_58 0 &gpiof 3 0>,
<ST_MORPHO_R_59 0 &gpiof 12 0>,
<ST_MORPHO_R_60 0 &gpiof 15 0>,
<ST_MORPHO_R_61 0 &gpiog 14 0>,
<ST_MORPHO_R_62 0 &gpiof 11 0>,
<ST_MORPHO_R_64 0 &gpioe 0 0>,
<ST_MORPHO_R_65 0 &gpiod 10 0>,
<ST_MORPHO_R_66 0 &gpiog 8 0>,
<ST_MORPHO_R_67 0 &gpiog 7 0>, /* SB74=OFF */
<ST_MORPHO_R_68 0 &gpiog 5 0>,
<ST_MORPHO_R_69 0 &gpiog 4 0>, /* LD3 red LED */
<ST_MORPHO_R_70 0 &gpiog 6 0>;
};
};
``` | /content/code_sandbox/boards/st/nucleo_h563zi/st_morpho_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,625 |
```unknown
/*
*
*/
/dts-v1/;
#include "nucleo_h563zi-common.dtsi"
/ {
model = "STMicroelectronics STM32H563ZI-NUCLEO board";
compatible = "st,stm32h563zi-nucleo";
#address-cells = <1>;
#size-cells = <1>;
chosen {
zephyr,console = &usart3;
zephyr,shell-uart = &usart3;
zephyr,sram = &sram1;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,canbus = &fdcan1;
};
aliases {
led0 = &green_led_1;
sw0 = &user_button;
watchdog0 = &iwdg;
pwm-led0 = &pwm_led_1;
volt-sensor0 = &vref;
volt-sensor1 = &vbat;
};
};
&rng {
status = "okay";
};
&mac {
status = "okay";
pinctrl-0 = <ð_rxd0_pc4
ð_rxd1_pc5
ð_ref_clk_pa1
ð_crs_dv_pa7
ð_tx_en_pg11
ð_txd0_pg13
ð_txd1_pb15>;
pinctrl-names = "default";
};
&mdio {
status = "okay";
pinctrl-0 = <ð_mdio_pa2 ð_mdc_pc1>;
pinctrl-names = "default";
ethernet-phy@0 {
compatible = "ethernet-phy";
reg = <0x00>;
status = "okay";
};
};
``` | /content/code_sandbox/boards/st/nucleo_h563zi/nucleo_h563zi.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 393 |
```yaml
identifier: nucleo_h563zi
name: ST Nucleo H563ZI
type: mcu
arch: arm
toolchain:
- zephyr
ram: 640
flash: 2048
supported:
- arduino_gpio
- gpio
- arduino_serial
- arduino_spi
- can
- gpio
- uart
- entropy
- adc
- dac
- pwm
- netif:eth
- counter
- spi
- usb_device
- usb
- rtc
- i2c
vendor: st
``` | /content/code_sandbox/boards/st/nucleo_h563zi/nucleo_h563zi.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 139 |
```yaml
board:
name: nucleo_h563zi
vendor: st
socs:
- name: stm32h563xx
``` | /content/code_sandbox/boards/st/nucleo_h563zi/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 31 |
```unknown
# STM32H563ZI Nucleo board configuration
if BOARD_NUCLEO_H563ZI
if NETWORKING
config NET_L2_ETHERNET
default y
endif # NETWORKING
endif # BOARD_NUCLEO_H563ZI
``` | /content/code_sandbox/boards/st/nucleo_h563zi/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 57 |
```unknown
/*
*
*/
/ {
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpioa 6 0>, /* A0 */
<1 0 &gpioc 0 0>, /* A1 */
<2 0 &gpioc 3 0>, /* A2 */
<3 0 &gpiob 1 0>, /* A3 */
<4 0 &gpioc 2 0>, /* A4 */
<5 0 &gpiof 11 0>, /* A5 */
<6 0 &gpiob 7 0>, /* D0 */
<7 0 &gpiob 6 0>, /* D1 */
<8 0 &gpiog 14 0>, /* D2 */
<9 0 &gpioe 13 0>, /* D3 */
<10 0 &gpioe 14 0>, /* D4 */
<11 0 &gpioe 11 0>, /* D5 */
<12 0 &gpioe 9 0>, /* D6 */
<13 0 &gpiog 12 0>, /* D7 */
<14 0 &gpiof 3 0>, /* D8 */
<15 0 &gpiod 15 0>, /* D9 */
<16 0 &gpiod 14 0>, /* D10 */
<17 0 &gpiob 5 0>, /* D11 */
<18 0 &gpiog 9 0>, /* D12 */
<19 0 &gpioa 5 0>, /* D13 */
<20 0 &gpiob 9 0>, /* D14 */
<21 0 &gpiob 8 0>; /* D15 */
};
};
arduino_serial: &lpuart1 {};
arduino_spi: &spi1 {};
arduino_i2c: &i2c1 {};
``` | /content/code_sandbox/boards/st/nucleo_h563zi/arduino_r3_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 504 |
```unknown
/*
*
*/
#include <st/h5/stm32h563Xi.dtsi>
#include <st/h5/stm32h563zitx-pinctrl.dtsi>
#include "arduino_r3_connector.dtsi"
#include "st_morpho_connector.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
leds: leds {
compatible = "gpio-leds";
green_led_1: led_1 {
gpios = <&gpiob 0 GPIO_ACTIVE_HIGH>;
label = "User LD1";
};
yellow_led_1: led_2 {
gpios = <&gpiof 4 GPIO_ACTIVE_HIGH>;
label = "User LD2";
};
red_led_1: led_3 {
gpios = <&gpiog 4 GPIO_ACTIVE_HIGH>;
label = "User LD3";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button {
label = "User";
gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>;
zephyr,code = <INPUT_KEY_0>;
};
};
pwmleds: pwmleds {
compatible = "pwm-leds";
status = "disabled";
pwm_led_1: green_led_1 {
pwms = <&pwm3 3 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
label = "green led";
};
};
};
&clk_hse {
clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
hse-bypass;
status = "okay";
};
&clk_hsi48 {
status = "okay";
};
&clk_lse {
status = "okay";
};
&pll {
div-m = <2>;
mul-n = <120>;
div-p = <2>;
div-q = <3>;
div-r = <2>;
clocks = <&clk_hse>;
status = "okay";
};
&i2c1 {
pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
pinctrl-names = "default";
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(240)>;
ahb-prescaler = <1>;
apb1-prescaler = <2>;
apb2-prescaler = <1>;
apb3-prescaler = <2>;
};
&lpuart1 {
pinctrl-0 = <&lpuart1_tx_pb6 &lpuart1_rx_pb7>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&usart3 {
pinctrl-0 = <&usart3_tx_pd8 &usart3_rx_pd9>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&spi1 {
pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pg9 &spi1_mosi_pb5>;
pinctrl-names = "default";
cs-gpios = <&gpiod 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
status = "okay";
};
&timers3 {
st,prescaler = <10000>;
status = "okay";
pwm3: pwm {
status = "okay";
pinctrl-0 = <&tim3_ch3_pb0>;
pinctrl-names = "default";
};
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB3 0x00200000>,
<&rcc STM32_SRC_LSE RTC_SEL(1)>;
status = "okay";
};
&iwdg {
status = "okay";
};
&gpdma1 {
status = "okay";
};
&gpdma2 {
status = "okay";
};
&dac1 {
/* outputs only on 2 pins and pa4 is reserved for VBUS_SENSE */
pinctrl-0 = <&dac1_out2_pa5>; /* Zio D13 (on CN7) */
pinctrl-names = "default";
status = "okay";
};
&adc1 {
pinctrl-0 = <&adc1_inp3_pa6 &adc1_inp15_pa3>; /* Zio A0, Zio D35 */
pinctrl-names = "default";
st,adc-clock-source = <ASYNC>;
st,adc-prescaler = <6>;
status = "okay";
};
&fdcan1 {
pinctrl-0 = <&fdcan1_rx_pd0 &fdcan1_tx_pd1>;
pinctrl-names = "default";
clocks = <&rcc STM32_CLOCK_BUS_APB1_2 0x00000200>,
<&rcc STM32_SRC_PLL1_Q FDCAN_SEL(1)>;
clk-divider = <2>;
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 DT_SIZE_K(64)>;
};
slot0_partition: partition@10000 {
label = "image-0";
reg = <0x00010000 DT_SIZE_K(960)>;
};
slot1_partition: partition@100000 {
label = "image-1";
reg = <0x00100000 DT_SIZE_K(960)>;
};
storage_partition: partition@1f0000 {
label = "storage";
reg = <0x001f0000 DT_SIZE_K(64)>;
};
};
};
zephyr_udc0: &usb {
pinctrl-0 = <&usb_dm_pa11 &usb_dp_pa12>;
pinctrl-names = "default";
status = "okay";
};
&vref {
status = "okay";
};
&vbat {
status = "okay";
};
&clk_lsi {
status = "okay";
};
stm32_lp_tick_source: &lptim4 {
clocks = <&rcc STM32_CLOCK_BUS_APB3 0x2000>,
<&rcc STM32_SRC_LSI LPTIM4_SEL(4)>;
status = "okay";
};
``` | /content/code_sandbox/boards/st/nucleo_h563zi/nucleo_h563zi-common.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,390 |
```ini
source [find interface/stlink-dap.cfg]
source [find target/stm32h5x.cfg]
transport select "dapdirect_swd"
set CHIPNAME STM32H563ZITX
set BOARDNAME NUCLEO-STM32H563ZI
# Reset configuration
# use hardware reset, connect under reset
# connect_assert_srst needed if low power mode application running (WFI...)
reset_config srst_only srst_nogate connect_assert_srst
set CONNECT_UNDER_RESET 1
set CORE_RESET 0
# Due to the use of connect_assert_srst, running gdb requires
# to reset halt just after openocd init.
rename init old_init
proc init {} {
old_init
reset halt
}
``` | /content/code_sandbox/boards/st/nucleo_h563zi/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 158 |
```unknown
config BOARD_STM32G0316_DISCO
select SOC_STM32G031XX
``` | /content/code_sandbox/boards/st/stm32g0316_disco/Kconfig.stm32g0316_disco | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 22 |
```yaml
identifier: stm32g0316_disco
name: ST STM32G0316 Discovery
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 8
flash: 32
supported:
- gpio
- uart
- watchdog
- dma
vendor: st
``` | /content/code_sandbox/boards/st/stm32g0316_disco/stm32g0316_disco.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 83 |
```cmake
board_runner_args(pyocd "--target=stm32g031j6mx")
board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
board_runner_args(jlink "--device=STM32G031J6" "--speed=4000")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake)
``` | /content/code_sandbox/boards/st/stm32g0316_disco/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 134 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/g0/stm32g031X6.dtsi>
#include <st/g0/stm32g031j(4-6)mx-pinctrl.dtsi>
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "STMicroelectronics STM32G0316 Discovery board";
compatible = "st,stm32g0316-disco";
aliases {
led0 = &green_led_1;
sw0 = &user_button;
watchdog0 = &iwdg;
};
chosen {
zephyr,console = &usart1;
zephyr,shell-uart = &usart1;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
};
leds {
compatible = "gpio-leds";
green_led_1: led_2 {
gpios = <&gpioa 12 GPIO_ACTIVE_LOW>;
label = "User LD2";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button {
label = "User";
gpios = <&gpioa 0 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_0>;
};
};
};
&clk_hsi {
status = "okay";
};
&pll {
div-m = <1>;
mul-n = <8>;
div-p = <2>;
div-q = <2>;
div-r = <2>;
clocks = <&clk_hsi>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(64)>;
ahb-prescaler = <1>;
apb1-prescaler = <1>;
};
&pinctrl {
remap-pa11;
};
&usart1 {
pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pb7>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&iwdg {
status = "okay";
};
``` | /content/code_sandbox/boards/st/stm32g0316_disco/stm32g0316_disco.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 462 |
```unknown
# Kernel Options due to Low Memory (8k)
CONFIG_MAIN_STACK_SIZE=640
CONFIG_IDLE_STACK_SIZE=200
CONFIG_ISR_STACK_SIZE=512
# Serial Drivers
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# GPIO Controller
CONFIG_GPIO=y
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/stm32g0316_disco/stm32g0316_disco_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 89 |
```yaml
board:
name: stm32g0316_disco
vendor: st
socs:
- name: stm32g031xx
``` | /content/code_sandbox/boards/st/stm32g0316_disco/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 33 |
```ini
source [find interface/stlink.cfg]
transport select hla_swd
source [find target/stm32g0x.cfg]
``` | /content/code_sandbox/boards/st/stm32g0316_disco/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 28 |
```restructuredtext
.. _stm32g0316_disco_board:
ST STM32G0316 Discovery
#######################
Overview
********
The STM32G0316-DISCO Discovery kit helps to discover features of STM32G0 in SO8 package.
This discovery kit offers an SO8 to DIL8 module designed with the STM32G031J6 microcontroller
and allows the user to develop applications. It includes an on-board ST-LINK/V2-1 to debug
and program the embedded STM32 microcontroller.
.. image:: img/stm32g0316_disco.jpg
:align: center
:alt: STM32G0316-DISCO
Hardware
********
- STM32G031J6 Arm |reg| Cortex |reg|-M0+ core-based microcontroller,
featuring 32 Kbytes of Flash memory and 8 Kbytes of SRAM, in an SO8 package
- 1 user LED
- 1 reset/user push-button
- Individual and breakable STM32 SO8 to DIL8 module
- ST-LINK Micro-B USB connector
- DIL8 socket to ease programming of the STM32 MCU
- On-board ST-LINK/V2-1 debugger/programmer
For more information about the STM32G03x SoC and the STM32G0316-DISCO board, see these ST reference documents:
- `STM32G031J6 website`_
- `STM32G031 datasheet`_
- `STM32G0x1 reference manual`_
- `STM32G0316-DISCO website`_
Supported Features
==================
The Zephyr stm32g0316_disco board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| CLOCK | on-chip | reset and clock control |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | independent watchdog |
+-----------+------------+-------------------------------------+
Other hardware features are not currently supported by the port.
The default configuration can be found in the defconfig file:
:zephyr_file:`boards/st/stm32g0316_disco/stm32g0316_disco_defconfig`
Connections and IOs
===================
Due to the small number of I/O pins on the SO8 package, multiple die I/Os are bonded
to the same package pins to maximize the number of peripherals which can be used.
Care must be taken not to set two I/Os which are connected together to conflicting
states (e.g. both as outputs, one low, the other high).
Default Zephyr Peripheral Mapping:
----------------------------------
.. rst-class:: rst-columns
- UART_1 TX/RX : PA9/PB7 (pins 5/1)
- USER_PB : PA0 (pin 4)
- LD2 : PA12 (pin 6)
Programming and Debugging
*************************
Applications for the ``stm32g0316_disco`` board configuration can be built the
usual way (see :ref:`build_an_application` and :ref:`application_run` for more details).
Flashing
========
The STM32G0316-DISCO board includes an ST-LINK/V2-1 embedded debug tool
interface.
This interface is supported by the openocd version included in the Zephyr SDK.
Flashing an application to the STM32G0316-DISCO
-----------------------------------------------
Here is an example for the :zephyr:code-sample:`blinky` application.
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: stm32g0316_disco
:goals: build flash
You should see the LED blinking every second.
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: stm32g0316_disco
:maybe-skip-config:
:goals: debug
.. _STM32G031J6 website:
path_to_url
.. _STM32G031 datasheet:
path_to_url
.. _STM32G0x1 reference manual:
path_to_url
.. _STM32G0316-DISCO website:
path_to_url
``` | /content/code_sandbox/boards/st/stm32g0316_disco/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,033 |
```unknown
# Enable MPU
CONFIG_ARM_MPU=y
# Enable HW stack protection
CONFIG_HW_STACK_PROTECTION=y
CONFIG_SERIAL=y
# console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# enable GPIO
CONFIG_GPIO=y
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/stm32f429i_disc1/stm32f429i_disc1_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 69 |
```yaml
identifier: stm32f429i_disc1
name: ST STM32F429I Discovery
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 192
flash: 2048
supported:
- counter
- i2c
- spi
- display
vendor: st
``` | /content/code_sandbox/boards/st/stm32f429i_disc1/stm32f429i_disc1.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 86 |
```cmake
board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
board_runner_args(jlink "--device=STM32F429ZI" "--speed=4000")
board_runner_args(pyocd "--target=stm32f429xi")
board_runner_args(pyocd "--flash-opt=-O reset_type=hw")
board_runner_args(pyocd "--flash-opt=-O connect_mode=under-reset")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
``` | /content/code_sandbox/boards/st/stm32f429i_disc1/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 166 |
```restructuredtext
.. _nucleo_h563zi_board:
ST Nucleo H563ZI
################
Overview
********
The Nucleo H563ZI board is designed as an affordable development platform for
STMicroelectronics ARM |reg| Cortex |reg|-M33 core-based STM32H563ZIT6
microcontroller with TrustZone |reg|.
Here are some highlights of the Nucleo H563ZI board:
- STM32H563ZI microcontroller featuring 2 Mbytes of Flash memory and 640Kbyte of
SRAM in LQFP144 package
- Board connectors:
- USB Type-C |trade| Sink device FS
- Ethernet RJ45 connector compliant with IEEE-802.3-2002 (depending on STM32 support)
- ST Zio expansion connector including Arduino Uno V3 connectivity (CN7, CN8, CN9, CN10)
- ST morpho extension connector (CN11, CN12)
- Flexible board power supply:
- 5V_USB_STLK from ST-Link USB connector
- VIN (7 - 12V, 0.8A) supplied via pin header CN8 pin 15 or CN11 pin 24
- 5V_EXT on the ST morpho connector CN11 Pin 6 (5V, 1.3)
- CHGR from a USB charger via the ST-LINK USB connector
- USB_USER from the USB user connector (5V, 3A)
- 3V3_EXT supplied via a pin header CN8 pin 7 or CN11 pin 16 (3.3V, 1.3A)
- On-board ST-LINK/V3EC debugger/programmer
- mass storage
- Virtual COM port
- debug port
- Three users LEDs
- Two push-buttons: USER and RESET
- 32.789 kHz crystal oscillator
More information about the board can be found at the `NUCLEO_H563ZI website`_.
.. image:: img/nucleo_h563zi.jpg
:align: center
:alt: NUCLEO H563ZI
Hardware
********
The STM32H563xx devices are high-performance microcontrollers from the STM32H5
Series based on the high-performance Arm |reg| Cortex |reg|-M33 32-bit RISC core.
They operate at a frequency of up to 250 MHz.
- Core: ARM |reg| 32-bit Cortex |reg| -M33 CPU with TrustZone |reg| and FPU.
- Performance benchmark:
- 375 DMPIS/MHz (Dhrystone 2.1)
- Security
- Arm |reg| TrustZone |reg| with ARMv8-M mainline security extension
- Up to 8 configurable SAU regions
- TrustZone |reg| aware and securable peripherals
- Flexible lifecycle scheme with secure debug authentication
- SFI (secure firmware installation)
- Secure firmware upgrade support with TF-M
- HASH hardware accelerator
- True random number generator, NIST SP800-90B compliant
- 96-bit unique ID
- Active tampers
- Clock management:
- 25 MHz crystal oscillator (HSE)
- 32 kHz crystal oscillator for RTC (LSE)
- Internal 64 MHz (HSI) trimmable by software
- Internal low-power 32 kHz RC (LSI)( |plusminus| 5%)
- Internal 4 MHz oscillator (CSI), trimmable by software
- Internal 48 MHz (HSI48) with recovery system
- 3 PLLs for system clock, USB, audio, ADC
- Power management
- Embedded regulator (LDO) with three configurable range output to supply the digital circuitry
- Embedded SMPS step-down converter
- RTC with HW calendar, alarms and calibration
- Up to 139 fast I/Os, most 5 V-tolerant, up to 10 I/Os with independent supply down to 1.08 V
- Up to 16 timers and 2 watchdogs
- 12x 16-bit
- 2x 32-bit timers with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
- 6x 16-bit low-power 16-bit timers (available in Stop mode)
- 2x watchdogs
- 2x SysTick timer
- Memories
- Up to 2 MB Flash, 2 banks read-while-write
- 1 Kbyte OTP (one-time programmable)
- 640 KB of SRAM including 64 KB with hardware parity check and 320 Kbytes with flexible ECC
- 4 Kbytes of backup SRAM available in the lowest power modes
- Flexible external memory controller with up to 16-bit data bus: SRAM, PSRAM, FRAM, SDRAM/LPSDR SDRAM, NOR/NAND memories
- 1x OCTOSPI memory interface with on-the-fly decryption and support for serial PSRAM/NAND/NOR, Hyper RAM/Flash frame formats
- 2x SD/SDIO/MMC interfaces
- Rich analog peripherals (independent supply)
- 2x 12-bit ADC with up to 5 MSPS in 12-bit
- 1x 12-bit D/A with 2 channels
- 1x Digital temperature sensor
- 34x communication interfaces
- 1x USB Type-C / USB power-delivery controller
- 1x USB 2.0 full-speed host and device
- 4x I2C FM+ interfaces (SMBus/PMBus)
- 1x I3C interface
- 12x U(S)ARTS (ISO7816 interface, LIN, IrDA, modem control)
- 1x LP UART
- 6x SPIs including 3 muxed with full-duplex I2S
- 5x additional SPI from 5x USART when configured in Synchronous mode
- 2x SAI
- 2x FDCAN
- 1x SDMMC interface
- 2x 16 channel DMA controllers
- 1x 8- to 14- bit camera interface
- 1x HDMI-CEC
- 1x Ethernel MAC interface with DMA controller
- 1x 16-bit parallel slave synchronous-interface
- CORDIC for trigonometric functions acceleration
- FMAC (filter mathematical accelerator)
- CRC calculation unit
- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell |trade|
More information about STM32H563ZI can be found here:
- `STM32H563ZI on www.st.com`_
- `STM32H563 reference manual`_
Supported Features
==================
The Zephyr nucleo_h563zi board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| ADC | on-chip | ADC Controller |
+-----------+------------+-------------------------------------+
| CAN/CANFD | on-chip | CAN |
+-----------+------------+-------------------------------------+
| CLOCK | on-chip | reset and clock control |
+-----------+------------+-------------------------------------+
| DAC | on-chip | DAC Controller |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| PWM | on-chip | PWM |
+-----------+------------+-------------------------------------+
| RNG | on-chip | True Random number generator |
+-----------+------------+-------------------------------------+
| RTC | on-chip | Real Time Clock |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi bus |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c bus |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | independent watchdog |
+-----------+------------+-------------------------------------+
| USB | on-chip | USB full-speed host/device bus |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported on this Zephyr port.
The default configuration can be found in the defconfig and dts files:
- Secure target:
- :zephyr_file:`boards/st/nucleo_h563zi/nucleo_h563zi_defconfig`
- :zephyr_file:`boards/st/nucleo_h563zi/nucleo_h563zi.dts`
Zephyr board options
====================
The STM32H563 is an SoC with Cortex-M33 architecture. Zephyr provides support
for building for Secure firmware.
The BOARD options are summarized below:
+----------------------+-----------------------------------------------+
| BOARD | Description |
+======================+===============================================+
| nucleo_h563zi | For building Secure firmware |
+----------------------+-----------------------------------------------+
Connections and IOs
===================
Nucleo H563ZI Board has 9 GPIO controllers. These controllers are responsible for pin muxing,
input/output, pull-up, etc.
For more details please refer to `STM32H5 Nucleo-144 board User Manual`_.
Default Zephyr Peripheral Mapping:
----------------------------------
- ADC1 channel 3 input: PA6
- ADC1 channel 15 input: PA3
- DAC1 channel 2 output: PA5
- CAN/CANFD TX/RX: PD1/PD0
- LD1 (green): PB0
- LD2 (yellow): PF4
- LD3 (red): PG4
- LPUART1 TX/RX : PB6/PB7 (Arduino LPUART1)
- SPI1 SCK/MISO/MOSI/CS: PA5/PG9/PB5/PD14
- UART3 TX/RX : PD8/PD9 (VCP)
- USER_PB : PC13
System Clock
------------
Nucleo H563ZI System Clock could be driven by internal or external oscillator,
as well as main PLL clock. By default System clock is driven by PLL clock at
240MHz, driven by 8MHz external clock provided from the STLINK-V3EC.
Serial Port
-----------
Nucleo H563ZI board has up to 12 U(S)ARTs. The Zephyr console output is assigned
to USART3. Default settings are 115200 8N1.
Programming and Debugging
*************************
Applications for the ``nucleo_h563zi`` board can be built and
flashed in the usual way (see :ref:`build_an_application` and
:ref:`application_run` for more details).
OpenOCD Support
===============
For now, openocd support for stm32h5 is not available on upstream OpenOCD.
You can check `OpenOCD official Github mirror`_.
In order to use it though, you should clone from the cutomized
`STMicroelectronics OpenOCD Github`_ and compile it following usual README guidelines.
Once it is done, you can set the OPENOCD and OPENOCD_DEFAULT_PATH variables in
:zephyr_file:`boards/st/nucleo_h563zi/board.cmake` to point the build
to the paths of the OpenOCD binary and its scripts, before
including the common openocd.board.cmake file:
.. code-block:: none
set(OPENOCD "<path_to_openocd_repo>/src/openocd" CACHE FILEPATH "" FORCE)
set(OPENOCD_DEFAULT_PATH <path_to_opneocd_repo>/tcl)
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
Flashing
========
Nucleo H563ZI board includes an ST-LINK/V3EC embedded debug tool interface.
This probe allows to flash the board using various tools.
Board is configured to be flashed using west STM32CubeProgrammer runner.
Installation of `STM32CubeProgrammer`_ is then required to flash the board.
Alternatively, pyocd or jlink via an external probe can also be used to flash
and debug the board if west is told to use it as runner, which can be done by
passing either or ``-r pyocd``, or ``-r jlink``.
For pyocd additional target information needs to be installed.
This can be done by executing the following commands.
.. code-block:: console
$ pyocd pack --update
$ pyocd pack --install stm32h5
Alternatively, the openocd interface will be supported by a next openocd version.
When available, OpenOCD could be used in the same way as other tools.
Flashing an application to Nucleo H563ZI
------------------------------------------
Connect the Nucleo H563ZI to your host computer using the USB port.
Then build and flash an application. Here is an example for the
:ref:`hello_world` application.
Run a serial host program to connect with your Nucleo board:
.. code-block:: console
$ minicom -D /dev/ttyACM0
Then build and flash the application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nucleo_h563zi
:goals: build flash
You should see the following message on the console:
.. code-block:: console
Hello World! nucleo_h563zi
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:zephyr:code-sample:`blinky` application.
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: nucleo_h563zi
:goals: debug
.. _NUCLEO_H563ZI website:
path_to_url
.. _STM32H5 Nucleo-144 board User Manual:
path_to_url
.. _STM32H563ZI on www.st.com:
path_to_url
.. _STM32H563 reference manual:
path_to_url
.. _STM32CubeProgrammer:
path_to_url
.. _OpenOCD official Github mirror:
path_to_url
.. _STMicroelectronics OpenOCD Github:
path_to_url
``` | /content/code_sandbox/boards/st/nucleo_h563zi/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 3,187 |
```unknown
config BOARD_STM32F429I_DISC1
select SOC_STM32F429XX
``` | /content/code_sandbox/boards/st/stm32f429i_disc1/Kconfig.stm32f429i_disc1 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 23 |
```yaml
board:
name: stm32f429i_disc1
vendor: st
socs:
- name: stm32f429xx
``` | /content/code_sandbox/boards/st/stm32f429i_disc1/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 33 |
```unknown
# STM32F4DISCOVERY board configuration
if BOARD_STM32F429I_DISC1
config INPUT
default y if DISPLAY
config MEMC
default y if DISPLAY
endif # BOARD_STM32F429I_DISC1
``` | /content/code_sandbox/boards/st/stm32f429i_disc1/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 53 |
```ini
source [find interface/stlink-dap.cfg]
transport select "dapdirect_swd"
set CHIPNAME STM32F429ZITx
set BOARDNAME STM32F429I-DISC1
source [find target/stm32f4x.cfg]
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
``` | /content/code_sandbox/boards/st/stm32f429i_disc1/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 108 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/f4/stm32f429Xi.dtsi>
#include <st/f4/stm32f429zitx-pinctrl.dtsi>
#include <zephyr/dt-bindings/display/ili9xxx.h>
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "STMicroelectronics STM32F429I_DISC1 board";
compatible = "st,stm32f4discovery";
chosen {
zephyr,console = &usart1;
zephyr,shell-uart = &usart1;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,ccm = &ccm0;
zephyr,display = <dc;
};
sdram2: sdram@d0000000 {
compatible = "zephyr,memory-region", "mmio-sram";
device_type = "memory";
reg = <0xd0000000 DT_SIZE_M(8)>;
zephyr,memory-region = "SDRAM2";
};
leds {
compatible = "gpio-leds";
green_led_3: led_3 {
gpios = <&gpiog 13 GPIO_ACTIVE_HIGH>;
label = "User LD3";
};
red_led_4: led_4 {
gpios = <&gpiog 14 GPIO_ACTIVE_HIGH>;
label = "User LD4";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button {
label = "User";
gpios = <&gpioa 0 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_0>;
};
};
aliases {
led0 = &green_led_3;
sw0 = &user_button;
};
lvgl_pointer {
compatible = "zephyr,lvgl-pointer-input";
input = <&stmpe811>;
invert-x;
invert-y;
};
mipi_dbi {
compatible = "zephyr,mipi-dbi-spi";
dc-gpios = <&gpiod 13 GPIO_ACTIVE_HIGH>;
write-only;
#address-cells = <1>;
#size-cells = <0>;
spi-dev = <&spi5>;
ili9341: ili9341@0 {
compatible = "ilitek,ili9341";
mipi-max-frequency = <5625000>;
reg = <0>;
width = <240>;
height = <320>;
rotation = <180>;
pixel-format = <ILI9XXX_PIXEL_FORMAT_RGB565>;
pwctrla = [39 2c 00 34 02];
pwctrlb = [00 c1 30];
timctrla = [85 00 78];
timctrlb = [00 00];
pwseqctrl = [64 03 12 81];
pumpratioctrl = [20];
disctrl = [08 82 27 04];
vmctrl1 = [45 15];
vmctrl2 = [90];
enable3g = [00];
ifctl = [01 00 06];
ifmode = [c2];
gamset = [01];
frmctr1 = [00 1b];
pwctrl1 = [10];
pwctrl2 = [10];
pgamctrl = [0F 29 24 0c 0e 09 4e 78 3c 09 13 05 17 11 00];
ngamctrl = [00 16 1b 04 11 07 31 33 42 05 0c 0a 28 2f 0f];
};
};
};
&clk_lsi {
status = "okay";
};
&clk_hse {
clock-frequency = <DT_FREQ_M(8)>;
status = "okay";
};
&pll {
div-m = <8>;
mul-n = <336>;
div-p = <2>;
div-q = <7>;
clocks = <&clk_hse>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(168)>;
ahb-prescaler = <1>;
apb1-prescaler = <4>;
apb2-prescaler = <2>;
};
&usart1 {
pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>,
<&rcc STM32_SRC_LSI RTC_SEL(2)>;
status = "okay";
};
&i2c1 {
pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
&i2c2 {
pinctrl-0 = <&i2c2_scl_pb10 &i2c2_sda_pb11>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
&i2c3 {
pinctrl-0 = <&i2c3_scl_pa8 &i2c3_sda_pc9>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
stmpe811: stmpe811@41 {
compatible = "st,stmpe811";
status = "okay";
reg = <0x41>;
int-gpios = <&gpioa 15 GPIO_ACTIVE_LOW>;
screen-width = <240>;
screen-height = <320>;
raw-x-min = <240>;
raw-y-min = <200>;
raw-x-max = <3680>;
raw-y-max = <3800>;
panel-driver-settling-time-us = <1000>;
touch-detect-delay-us = <5000>;
touch-average-control = <8>;
tracking-index = <127>;
};
};
&spi5 {
pinctrl-0 = <&spi5_nss_pf6 &spi5_sck_pf7
&spi5_miso_pf8 &spi5_mosi_pf9>;
pinctrl-names = "default";
status = "okay";
cs-gpios = <&gpioc 2 GPIO_ACTIVE_LOW>;
};
&fmc {
status = "okay";
pinctrl-0 = <&fmc_nbl0_pe0 &fmc_nbl1_pe1
&fmc_sdclk_pg8 &fmc_sdnwe_pc0 &fmc_sdcke1_pb5
&fmc_sdne1_pb6 &fmc_sdnras_pf11 &fmc_sdncas_pg15
&fmc_a0_pf0 &fmc_a1_pf1 &fmc_a2_pf2 &fmc_a3_pf3
&fmc_a4_pf4 &fmc_a5_pf5 &fmc_a6_pf12 &fmc_a7_pf13
&fmc_a8_pf14 &fmc_a9_pf15 &fmc_a10_pg0 &fmc_a11_pg1
&fmc_a12_pg2 &fmc_a13_pg3 &fmc_a14_pg4 &fmc_a15_pg5
&fmc_d0_pd14 &fmc_d1_pd15 &fmc_d2_pd0 &fmc_d3_pd1
&fmc_d4_pe7 &fmc_d5_pe8 &fmc_d6_pe9 &fmc_d7_pe10
&fmc_d8_pe11 &fmc_d9_pe12 &fmc_d10_pe13 &fmc_d11_pe14
&fmc_d12_pe15 &fmc_d13_pd8 &fmc_d14_pd9 &fmc_d15_pd10>;
pinctrl-names = "default";
sdram {
status = "okay";
power-up-delay = <100>;
num-auto-refresh = <1>;
mode-register = <0>;
refresh-rate = <1386>;
bank@1 {
reg = <1>;
st,sdram-control = <STM32_FMC_SDRAM_NC_8
STM32_FMC_SDRAM_NR_12
STM32_FMC_SDRAM_MWID_16
STM32_FMC_SDRAM_NB_4
STM32_FMC_SDRAM_CAS_2
STM32_FMC_SDRAM_SDCLK_PERIOD_3
STM32_FMC_SDRAM_RBURST_DISABLE
STM32_FMC_SDRAM_RPIPE_1>;
st,sdram-timing = <2 7 4 7 2 2 2>;
};
};
};
<dc {
pinctrl-0 = <<dc_r2_pc10 <dc_r3_pb0 <dc_r4_pa11 <dc_r5_pa12
<dc_r6_pb1 <dc_r7_pg6 <dc_g2_pa6 <dc_g3_pg10
<dc_g4_pb10 <dc_g5_pb11 <dc_g6_pc7 <dc_g7_pd3
<dc_b2_pd6 <dc_b3_pg11 <dc_b4_pg12 <dc_b5_pa3
<dc_b6_pb8 <dc_b7_pb9 <dc_de_pf10 <dc_clk_pg7
<dc_hsync_pc6 <dc_vsync_pa4>;
pinctrl-names = "default";
ext-sdram = <&sdram2>;
display-controller = <&ili9341>;
status = "okay";
width = <240>;
height = <320>;
pixel-format = <PANEL_PIXEL_FORMAT_RGB_565>;
display-timings {
compatible = "zephyr,panel-timing";
de-active = <0>;
pixelclk-active = <0>;
hsync-active = <0>;
vsync-active = <0>;
hsync-len = <10>;
vsync-len = <2>;
hback-porch= <20>;
vback-porch = <2>;
hfront-porch = <10>;
vfront-porch = <4>;
};
def-back-color-red = <0xFF>;
def-back-color-green = <0xFF>;
def-back-color-blue = <0xFF>;
};
zephyr_udc0: &usbotg_hs {
pinctrl-0 = <&usb_otg_hs_dm_pb14 &usb_otg_hs_dp_pb15 &usb_otg_hs_id_pb12>;
pinctrl-names = "default";
status = "okay";
};
``` | /content/code_sandbox/boards/st/stm32f429i_disc1/stm32f429i_disc1.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,431 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/f0/stm32f072Xb.dtsi>
#include <st/f0/stm32f072v(8-b)tx-pinctrl.dtsi>
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "STMicroelectronics STM32F072-EVAL board";
compatible = "st,stm32f072-eval";
chosen {
zephyr,console = &usart2;
zephyr,shell-uart = &usart2;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
};
leds {
compatible = "gpio-leds";
green_led_1: led_1 {
gpios = <&gpiod 8 GPIO_ACTIVE_HIGH>;
label = "User LD1";
};
orange_led_2: led_2 {
gpios = <&gpiod 9 GPIO_ACTIVE_HIGH>;
label = "User LD2";
};
red_led_3: led_3 {
gpios = <&gpiod 10 GPIO_ACTIVE_HIGH>;
label = "User LD3";
};
blue_led_4: led_4 {
gpios = <&gpiod 11 GPIO_ACTIVE_HIGH>;
label = "User LD4";
};
};
gpio_keys {
compatible = "gpio-keys";
tamper: tamper_button {
label = "tamper button";
gpios = <&gpioc 13 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_0>;
};
joy_sel: joystick_selection {
label = "joystick selection";
gpios = <&gpioa 0 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
zephyr,code = <INPUT_KEY_ENTER>;
};
joy_down: joystick_down {
label = "joystick down";
gpios = <&gpiof 10 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
zephyr,code = <INPUT_KEY_DOWN>;
};
joy_up: joystick_up {
label = "joystick up";
gpios = <&gpiof 9 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
zephyr,code = <INPUT_KEY_UP>;
};
joy_left: joystick_left {
label = "joystick left";
gpios = <&gpiof 2 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
zephyr,code = <INPUT_KEY_LEFT>;
};
joy_right: joystick_right {
label = "joystick right";
gpios = <&gpioe 3 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
zephyr,code = <INPUT_KEY_RIGHT>;
};
};
aliases {
led0 = &green_led_1;
led1 = &orange_led_2;
led2 = &red_led_3;
led3 = &blue_led_4;
sw0 = &joy_sel;
watchdog0 = &iwdg;
};
};
&clk_hse {
clock-frequency = <DT_FREQ_M(8)>;
status = "okay";
};
&pll {
prediv = <1>;
mul = <6>;
clocks = <&clk_hse>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(48)>;
ahb-prescaler = <1>;
apb1-prescaler = <1>;
};
&usart2 {
pinctrl-0 = <&usart2_tx_pd5 &usart2_rx_pd6>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&iwdg {
status = "okay";
};
``` | /content/code_sandbox/boards/st/stm32f072_eval/stm32f072_eval.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 846 |
```restructuredtext
.. _stm32f429i_disc1_board:
ST STM32F429I Discovery
#######################
Overview
********
The STM32F429I-DISC1 Discovery kit features an ARM Cortex-M4 based STM32F429ZI MCU
with a wide range of connectivity support and configurations. Here are
some highlights of the STM32F429I-DISC1 board:
- STM32 microcontroller in LQFP144 package
- Extension header for all LQFP144 I/Os for quick connection to prototyping board and easy probing
- On-board ST-LINK/V2-B debugger/programmer with SWD connector
- Flexible board power supply:
- ST-LINK/V2-1 USB connector
- User USB FS connector
- VIN from Arduino* compatible connectors
- Two push-buttons: USER and RESET
- USB OTG FS with micro-AB connector
- 2.4-inch QVGA LCD with MIPI DSI interface and capacitive touch screen
- 64Mbit SDRAM
- L3GD20, ST-MEMS motion sensor 3-axis digital output gyroscope
- Six LEDs
- LD1 (red/green) for USB communication
- LD2 (red) for 3.3 V power-on
- Two user LEDs: LD3 (green), LD4 (red)
- Two USB OTG LEDs: LD5 (green) VBUS and LD6 (red) OC (over-current)
.. image:: img/stm32f429i_disc1.jpg
:align: center
:alt: STM32F429I-DISC1
More information about the board can be found at the `STM32F429I-DISC1 website`_.
Hardware
********
The STM32F429I-DISC1 Discovery kit provides the following hardware components:
- STM32F429ZIT6 in LQFP144 package
- ARM |reg| 32-bit Cortex |reg| -M4 CPU with FPU
- 180 MHz max CPU frequency
- VDD from 1.8 V to 3.6 V
- 2 MB Flash
- 256+4 KB SRAM including 64-Kbyte of core coupled memory
- GPIO with external interrupt capability
- 3x12-bit ADC with 24 channels
- 2x12-bit D/A converters
- RTC
- Advanced-control Timer
- General Purpose Timers (17)
- Watchdog Timers (2)
- USART/UART (4/4)
- I2C (3)
- SPI (6)
- SDIO
- 2xCAN
- USB 2.0 OTG FS with on-chip PHY
- USB 2.0 OTG HS/FS with dedicated DMA, on-chip full-speed PHY and ULPI
- 10/100 Ethernet MAC with dedicated DMA
- 8- to 14-bit parallel camera
- CRC calculation unit
- True random number generator
- DMA Controller
More information about STM32F429ZI can be found here:
- `STM32F429ZI on www.st.com`_
- `STM32F429 Reference Manual`_
Supported Features
==================
The Zephyr stm32f429i_disc1 board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| PWM | on-chip | pwm |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| FMC | on-chip | memc (SDRAM) |
+-----------+------------+-------------------------------------+
| OTG_HS | on-chip | usbotg_hs |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported on Zephyr porting.
The default configuration can be found in
:zephyr_file:`boards/st/stm32f429i_disc1/stm32f429i_disc1_defconfig`
Pin Mapping
===========
The STM32F429I-DISC1 Discovery kit has 8 GPIO controllers. These controllers are responsible for pin muxing,
input/output, pull-up, etc.
For more details please refer to `STM32F429I-DISC1 board User Manual`_.
Default Zephyr Peripheral Mapping:
----------------------------------
- UART_1_TX : PA9
- UART_1_RX : PA10
- USER_PB : PA0
- LD3 : PG13
- LD4 : PG12
- I2C_1_SCL : PB8
- I2C_1_SDA : PB9
- I2C_2_SCL : PB10
- I2C_2_SDA : PB11
- I2C_3_SCL : PA8
- I2C_3_SDA : PC9
- SPI_5_CS : PF6
- SPI_5_SCK : PF7
- SPI_5_MISO : PF8
- SPI_5_MOSI : PF9
- OTG_HS_ID : PB12
- OTG_HS_DM : PB14
- OTG_HS_DP : PB15
System Clock
============
The STM32F429I-DISC1 System Clock could be driven by an internal or external oscillator,
as well as by the main PLL clock. By default the system clock is driven by the PLL clock at 168MHz,
driven by an 8MHz high speed external clock.
Serial Port
===========
The STM32F429I-DISC1 Discovery kit has up to 8 UARTs. The Zephyr console output is assigned to UART1.
The default communication settings are 115200 8N1.
USB Port
===========
The STM32F429I-DISC1 Discovery kit has a USB FS capable Micro-B port. It is connected to the on-chip
OTG_HS peripheral, but operates in FS mode only since no HS PHY is present. The board supports device
and host OTG operation, but only device mode has been tested with Zephyr at this time.
Programming and Debugging
*************************
Applications for the ``stm32f429i_disc1`` board configuration can be built
and flashed in the usual way (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Flashing
========
The STM32F429I-DISC1 Discovery kit includes a ST-LINK/V2-B embedded debug tool interface.
This interface is supported by the openocd version included in Zephyr SDK.
Flashing an application to STM32F429I-DISC1
-------------------------------------------
The board is configured to be flashed using west OpenOCD runner.
Alternatively, you can use `STM32CubeProgrammer`_ (after installing it) using the ``--runner``
(or ``-r``) option:
.. code-block:: console
$ west flash --runner stm32cubeprogrammer
First, connect the STM32F429I-DISC1 Discovery kit to your host computer using
the USB port to prepare it for flashing. Then build and flash your application.
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: stm32f429i_disc1
:goals: build flash
Run a serial host program to connect with your board:
.. code-block:: console
$ minicom -D /dev/ttyACM0
Then, press the RESET button (The black one), you should see the following message:
.. code-block:: console
Hello World! arm
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: stm32f429i_disc1
:goals: debug
.. _STM32F429I-DISC1 website:
path_to_url
.. _STM32F429I-DISC1 board User Manual:
path_to_url
.. _STM32F429ZI on www.st.com:
path_to_url
.. _STM32F429 Reference Manual:
path_to_url
.. _STM32CubeProgrammer:
path_to_url
``` | /content/code_sandbox/boards/st/stm32f429i_disc1/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,902 |
```cmake
board_runner_args(jlink "--device=STM32F072VB" "--speed=4000")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/st/stm32f072_eval/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 55 |
```unknown
config BOARD_STM32F072_EVAL
select SOC_STM32F072XB
``` | /content/code_sandbox/boards/st/stm32f072_eval/Kconfig.stm32f072_eval | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 20 |
```yaml
identifier: stm32f072_eval
name: ST STM32F072 Evaluation
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 16
flash: 128
supported:
- watchdog
testing:
ignore_tags:
- net
vendor: st
``` | /content/code_sandbox/boards/st/stm32f072_eval/stm32f072_eval.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 78 |
```yaml
board:
name: stm32f072_eval
vendor: st
socs:
- name: stm32f072xb
``` | /content/code_sandbox/boards/st/stm32f072_eval/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 31 |
```ini
source [find board/stm32f0discovery.cfg]
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
``` | /content/code_sandbox/boards/st/stm32f072_eval/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 68 |
```unknown
# Serial Drivers
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# GPIO Controller
CONFIG_GPIO=y
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/stm32f072_eval/stm32f072_eval_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 58 |
```unknown
/*
*/
#include <zephyr/dt-bindings/gpio/gpio.h>
#include <zephyr/dt-bindings/gpio/st-morpho-header.h>
/ {
st_morpho_header: st-morpho-header {
compatible = "st-morpho-header";
#gpio-cells = <2>;
gpio-map-mask = <ST_MORPHO_PIN_MASK 0x0>;
gpio-map-pass-thru = <0x0 GPIO_DT_FLAGS_MASK>;
gpio-map = <ST_MORPHO_L_1 0 &gpioc 10 0>,
<ST_MORPHO_L_2 0 &gpioc 11 0>,
<ST_MORPHO_L_3 0 &gpioc 12 0>,
<ST_MORPHO_L_4 0 &gpiod 2 0>,
<ST_MORPHO_L_13 0 &gpioa 13 0>,
<ST_MORPHO_L_15 0 &gpioa 14 0>,
<ST_MORPHO_L_17 0 &gpioa 15 0>,
<ST_MORPHO_L_21 0 &gpiob 7 0>,
<ST_MORPHO_L_23 0 &gpioc 13 0>,
<ST_MORPHO_L_25 0 &gpioc 14 0>,
<ST_MORPHO_L_27 0 &gpioc 15 0>,
<ST_MORPHO_L_28 0 &gpioa 0 0>,
<ST_MORPHO_L_29 0 &gpioh 0 0>,
<ST_MORPHO_L_30 0 &gpioa 1 0>,
<ST_MORPHO_L_31 0 &gpioh 1 0>,
<ST_MORPHO_L_32 0 &gpioa 4 0>,
<ST_MORPHO_L_34 0 &gpiob 0 0>,
<ST_MORPHO_L_35 0 &gpioc 2 0>,
<ST_MORPHO_L_36 0 &gpioc 1 0>, /* SB56=ON, SB46=OFF */
<ST_MORPHO_L_37 0 &gpioc 3 0>,
<ST_MORPHO_L_38 0 &gpioc 0 0>, /* SB51=ON, SB52=OFF */
<ST_MORPHO_R_1 0 &gpioc 9 0>,
<ST_MORPHO_R_2 0 &gpioc 8 0>,
<ST_MORPHO_R_3 0 &gpiob 8 0>,
<ST_MORPHO_R_4 0 &gpioc 6 0>,
<ST_MORPHO_R_5 0 &gpiob 9 0>,
<ST_MORPHO_R_6 0 &gpioc 5 0>,
<ST_MORPHO_R_11 0 &gpioa 5 0>,
<ST_MORPHO_R_12 0 &gpioa 12 0>,
<ST_MORPHO_R_13 0 &gpioa 6 0>,
<ST_MORPHO_R_14 0 &gpioa 11 0>,
<ST_MORPHO_R_15 0 &gpioa 7 0>,
<ST_MORPHO_R_16 0 &gpiob 12 0>,
<ST_MORPHO_R_17 0 &gpiob 6 0>,
<ST_MORPHO_R_18 0 &gpiob 11 0>,
<ST_MORPHO_R_19 0 &gpioc 7 0>,
<ST_MORPHO_R_21 0 &gpioa 9 0>,
<ST_MORPHO_R_22 0 &gpiob 2 0>,
<ST_MORPHO_R_23 0 &gpioa 8 0>,
<ST_MORPHO_R_24 0 &gpiob 1 0>,
<ST_MORPHO_R_25 0 &gpiob 10 0>,
<ST_MORPHO_R_26 0 &gpiob 15 0>,
<ST_MORPHO_R_27 0 &gpiob 4 0>,
<ST_MORPHO_R_28 0 &gpiob 14 0>,
<ST_MORPHO_R_29 0 &gpiob 5 0>,
<ST_MORPHO_R_30 0 &gpiob 13 0>,
<ST_MORPHO_R_31 0 &gpiob 3 0>,
<ST_MORPHO_R_33 0 &gpioa 10 0>,
<ST_MORPHO_R_34 0 &gpioc 4 0>,
<ST_MORPHO_R_35 0 &gpioa 2 0>,
<ST_MORPHO_R_37 0 &gpioa 3 0>;
};
};
``` | /content/code_sandbox/boards/st/nucleo_l053r8/st_morpho_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,183 |
```cmake
board_runner_args(jlink "--device=STM32L053R8" "--speed=4000")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/st/nucleo_l053r8/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 56 |
```yaml
identifier: nucleo_l053r8
name: ST Nucleo L053R8
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- arduino_gpio
- arduino_i2c
- arduino_spi
- gpio
- i2c
- spi
- eeprom
ram: 8
flash: 64
vendor: st
``` | /content/code_sandbox/boards/st/nucleo_l053r8/nucleo_l053r8.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 106 |
```unknown
config BOARD_NUCLEO_L053R8
select SOC_STM32L053XX
``` | /content/code_sandbox/boards/st/nucleo_l053r8/Kconfig.nucleo_l053r8 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 22 |
```restructuredtext
.. _stm32f072_eval_board:
ST STM32F072 Evaluation
#######################
Overview
********
The STM32F072-EVAL Discovery kit features an ARM Cortex-M0 based STM32F072VBT6 MCU
with a wide range of connectivity support and configurations.
Here are some highlights of the STM32F072-EVAL board:
- Four 5 V power supply options: power jack, ST-LINK/V2 USB connector, user USB connector, or daughter board
- Stereo audio jack, which supports a headset with microphone connected to DAC and ADC of STM32F072VBT6.
- 2G Byte (or more) SPI interface MicroSD card
- I2C compatible serial interface temperature sensor
- RF E2PROM
- RS232 and RS485 communication
- IrDA transceiver
- IR LED and IR receiver
- SWD debug support, ST-LINK/V2 embedded
- 240x320 TFT color LCD connected to SPI interface of STM32F072VBT6
- Joystick with 4-direction control and selector
- Reset and tamper buttons
- Four color user LEDs and two LEDs as MCU low power alarm
- Extension connector for daughter board or wrapping board
- MCU voltage choice: fixed 3.3 V or adjustable from 1.65 V to 3.6 V
- USB full-speed connector
- Touch sensing buttons
- RTC with backup battery
- CAN2.0A/B compliant connector
- Light Dependent Resistor (LDR)
- Potentiometer
- Two HDMI connectors with DDC and CEC
- Smart Card slot
- Motor control connector
.. image:: img/stm32f072_eval.jpg
:align: center
:alt: STM32F072-EVAL
Hardware
********
STM32F072-EVAL Discovery kit provides the following hardware components:
- STM32F072VBT6 in LQFP100 package
- ARM |reg| 32-bit Cortex |reg| -M0 CPU
- 48 MHz max CPU frequency
- VDD from 2.0 V to 3.6 V
- 128 KB Flash
- 16 KB SRAM with HW parity
- GPIO with external interrupt capability
- one 12-bit ADC with 16 channels
- one 12-bit D/A converters with 2 channels
- RTC
- Advanced-control Timer
- General Purpose Timers (8)
- Watchdog Timers (2)
- USART (4)
- I2C (2)
- SPI (2)
- CAN
- USB 2.0 OTG FS with on-chip PHY
- CRC calculation unit
- DMA Controller
- HDMI CEC Controller
- 24 capacitive sensing channels for touchkey, linear, and rotary touch sensors
- Up to 87 fast I/Os: 68 I/Os with 5V tolerant capability and 19 with independent supply
More information about STM32F072VB can be found here:
- `STM32F072VB on www.st.com`_
- `STM32F072 reference manual`_
Supported Features
==================
The Zephyr stm32f072_eval board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| PWM | on-chip | pwm |
+-----------+------------+-------------------------------------+
| CLOCK | on-chip | reset and clock control |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | independent watchdog |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported on this Zephyr porting.
The default configuration can be found in
:zephyr_file:`boards/st/stm32f072_eval/stm32f072_eval_defconfig`
Pin Mapping
===========
STM32F072-EVAL Discovery kit has 6 GPIO controllers. These controllers are responsible for pin muxing,
input/output, pull-up, etc.
For more details please refer to STM32F072-EVAL board User Manual.
Default Zephyr Peripheral Mapping:
----------------------------------
- UART_2_TX : PD5
- UART_2_RX : PD6
- TAMPER_PB : PC13
- JOYSTICK_RIGHT_PB : PE3
- JOYSTICK_LEFT_PB : PF2
- JOYSTICK_UP_PB : PF9
- JOYSTICK_DOWN_PB : PF10
- JOYSTICK_SEL_PB : PA0
- LD1 : PD8
- LD2 : PD9
- LD3 : PD10
- LD4 : PD11
System Clock
============
STM32F072-EVAL System Clock could be driven by an internal or external oscillator,
as well as the main PLL clock. By default the System clock is driven by the PLL clock at 48MHz,
driven by an 8MHz high speed internal clock.
Serial Port
===========
STM32F072-EVAL Discovery kit has up to 4 UARTs. The Zephyr console output is assigned to UART2.
Default settings are 115200 8N1.
Programming and Debugging
*************************
Applications for the ``stm32f072_eval`` board configuration can be built and
flashed in the usual way (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Flashing
========
STM32F072-EVAL Discovery kit includes an ST-LINK/V2 embedded debug tool interface.
This interface is supported by the openocd version included in Zephyr SDK.
Flashing an application to STM32F072-EVAL
-------------------------------------------
Here is an example for the :zephyr:code-sample:`blinky` application.
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: stm32f072_eval
:goals: build flash
You will see the LED blinking every second.
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:zephyr:code-sample:`blinky` application.
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: stm32f072_eval
:maybe-skip-config:
:goals: debug
.. _STM32F072VB on www.st.com:
path_to_url
.. _STM32F072 reference manual:
path_to_url
``` | /content/code_sandbox/boards/st/stm32f072_eval/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,459 |
```unknown
# Enable MPU
CONFIG_ARM_MPU=y
# Kernel Options due to Low Memory (8k)
CONFIG_MAIN_STACK_SIZE=640
CONFIG_IDLE_STACK_SIZE=200
CONFIG_ISR_STACK_SIZE=512
# Serial Drivers
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# GPIO Controller
CONFIG_GPIO=y
# Clock controller
CONFIG_CLOCK_CONTROL=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/nucleo_l053r8/nucleo_l053r8_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 99 |
```yaml
board:
name: nucleo_l053r8
vendor: st
socs:
- name: stm32l053xx
``` | /content/code_sandbox/boards/st/nucleo_l053r8/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```unknown
# STM32 Nucleo-64 development board with STM32L053R8 MCU
if BOARD_NUCLEO_L053R8
config SPI_STM32_INTERRUPT
default y
depends on SPI
endif # BOARD_NUCLEO_L053R8
``` | /content/code_sandbox/boards/st/nucleo_l053r8/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 58 |
```unknown
/*
*
*/
/ {
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpioa 0 0>, /* A0 */
<1 0 &gpioa 1 0>, /* A1 */
<2 0 &gpioa 4 0>, /* A2 */
<3 0 &gpiob 0 0>, /* A3 */
<4 0 &gpioc 1 0>, /* A4 */
<5 0 &gpioc 0 0>, /* A5 */
<6 0 &gpioa 3 0>, /* D0 */
<7 0 &gpioa 2 0>, /* D1 */
<8 0 &gpioa 10 0>, /* D2 */
<9 0 &gpiob 3 0>, /* D3 */
<10 0 &gpiob 5 0>, /* D4 */
<11 0 &gpiob 4 0>, /* D5 */
<12 0 &gpiob 10 0>, /* D6 */
<13 0 &gpioa 8 0>, /* D7 */
<14 0 &gpioa 9 0>, /* D8 */
<15 0 &gpioc 7 0>, /* D9 */
<16 0 &gpiob 6 0>, /* D10 */
<17 0 &gpioa 7 0>, /* D11 */
<18 0 &gpioa 6 0>, /* D12 */
<19 0 &gpioa 5 0>, /* D13 */
<20 0 &gpiob 9 0>, /* D14 */
<21 0 &gpiob 8 0>; /* D15 */
};
};
arduino_i2c: &i2c1 {};
arduino_spi: &spi1 {};
``` | /content/code_sandbox/boards/st/nucleo_l053r8/arduino_r3_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 492 |
```ini
# This is an ST NUCLEO-L053R8 board with single STM32L053R8 chip.
# path_to_url
source [find interface/stlink.cfg]
transport select hla_swd
set WORKAREASIZE 0x2000
source [find target/stm32l0.cfg]
# Add the second flash bank.
set _FLASHNAME $_CHIPNAME.flash1
flash bank $_FLASHNAME stm32lx 0 0 0 0 $_TARGETNAME
# There is only system reset line and JTAG/SWD command can be issued when SRST
reset_config srst_only
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
``` | /content/code_sandbox/boards/st/nucleo_l053r8/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 187 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/l0/stm32l053X8.dtsi>
#include <st/l0/stm32l053r(6-8)tx-pinctrl.dtsi>
#include "arduino_r3_connector.dtsi"
#include "st_morpho_connector.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "STMicroelectronics STM32L053R8-NUCLEO board";
compatible = "st,stm32l053r8-nucleo";
chosen {
zephyr,console = &usart2;
zephyr,shell-uart = &usart2;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
};
leds: leds {
compatible = "gpio-leds";
green_led_2: led_2 {
gpios = <&gpioa 5 GPIO_ACTIVE_HIGH>;
label = "User LD2";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button {
label = "User";
gpios = <&gpioc 13 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_0>;
};
};
aliases {
led0 = &green_led_2;
sw0 = &user_button;
eeprom-0 = &eeprom;
};
};
&clk_hse {
hse-bypass;
clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
status = "okay";
};
&pll {
clocks = <&clk_hse>;
mul = <8>;
div = <2>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(32)>;
ahb-prescaler = <1>;
apb1-prescaler = <1>;
apb2-prescaler = <1>;
};
/* Due to limited available memory, don't enable gpiod and gpiof */
/* (Test cases fail due to 'SRAM' region overflow) */
&gpiod {status = "disabled";};
&gpioh {status = "disabled";};
&usart1 {
pinctrl-0 = <&usart1_tx_pb6 &usart1_rx_pb7>;
pinctrl-names = "default";
current-speed = <115200>;
};
&usart2 {
pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa3>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&i2c1 {
pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
&spi1 {
pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pa7>;
pinctrl-names = "default";
status = "okay";
};
&eeprom {
status = "okay";
};
``` | /content/code_sandbox/boards/st/nucleo_l053r8/nucleo_l053r8.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 690 |
```cmake
board_runner_args(pyocd "--target=stm32g474retx")
board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake)
``` | /content/code_sandbox/boards/st/nucleo_g474re/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 97 |
```yaml
identifier: nucleo_g474re
name: ST Nucleo G474RE
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 128
flash: 512
supported:
- arduino_gpio
- arduino_i2c
- arduino_spi
- nvs
- pwm
- i2c
- gpio
- usb device
- counter
- spi
- watchdog
- adc
- dac
- dma
- can
- rtc
vendor: st
``` | /content/code_sandbox/boards/st/nucleo_g474re/nucleo_g474re.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 141 |
```restructuredtext
.. _nucleo_l053r8_board:
ST Nucleo L053R8
################
Overview
********
The STM32 Nucleo-64 development board with STM32L053R8 MCU, supports Arduino and ST morpho connectivity.
The STM32 Nucleo board provides an affordable, and flexible way for users to try out new concepts,
and build prototypes with the STM32 microcontroller, choosing from the various
combinations of performance, power consumption, and features.
The Arduino* Uno V3 connectivity support and the ST morpho headers allow easy functionality
expansion of the STM32 Nucleo open development platform with a wide choice of
specialized shields.
The STM32 Nucleo board integrates the ST-LINK/V2-1 debugger and programmer.
The STM32 Nucleo board comes with the STM32 comprehensive software HAL library together
with various packaged software examples.
.. image:: img/nucleo_l053r8.jpg
:align: center
:alt: Nucleo L053R8
More information about the board can be found at the `Nucleo L053R8 website`_.
Hardware
********
Nucleo L053R8 provides the following hardware components:
- STM32 microcontroller in QFP64 package
- Two types of extension resources:
- Arduino* Uno V3 connectivity
- ST morpho extension pin headers for full access to all STM32 I/Os
- ARM* mbed*
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector:
- Selection-mode switch to use the kit as a standalone ST-LINK/V2-1
- Flexible board power supply:
- USB VBUS or external source (3.3V, 5V, 7 - 12V)
- Power management access point
- Three LEDs:
- USB communication (LD1), user LED (LD2), power LED (LD3)
- Two push-buttons: USER and RESET
- USB re-enumeration capability. Three different interfaces supported on USB:
- Virtual COM port
- Mass storage
- Debug port
- Support of wide choice of Integrated Development Environments (IDEs) including:
- IAR
- ARM Keil
- GCC-based IDEs
More information about STM32L053R8 can be found in the
`STM32L0x3 reference manual`_
Supported Features
==================
The Zephyr nucleo_l053r8 board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| CLOCK | on-chip | reset and clock control |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c controller |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi controller |
+-----------+------------+-------------------------------------+
| EEPROM | on-chip | eeprom |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported in this Zephyr port.
The default configuration can be found in the defconfig file:
:zephyr_file:`boards/st/nucleo_l053r8/nucleo_l053r8_defconfig`
Connections and IOs
===================
Each of the GPIO pins can be configured by software as output (push-pull or open-drain), as
input (with or without pull-up or pull-down), or as peripheral alternate function. Most of the
GPIO pins are shared with digital or analog alternate functions. All GPIOs are high current
capable except for analog inputs.
Board connectors:
-----------------
.. image:: img/nucleo_l053r8_connectors.jpg
:align: center
:alt: Nucleo L053R8 connectors
Default Zephyr Peripheral Mapping:
----------------------------------
- UART_1 TX/RX : PB6/PB7
- UART_2 TX/RX : PA2/PA3 (ST-Link Virtual Port Com)
- I2C1 SCL/SDA : PB8/PB9 (Arduino I2C)
- SPI1 SCK/MISO/MOSI : PA5/PA6/PA7 (Arduino SPI)
- USER_PB : PC13
- LD2 : PA5
For more details please refer to `STM32 Nucleo-64 board User Manual`_.
Programming and Debugging
*************************
Applications for the ``nucleo_l053r8`` board configuration can be built and
flashed in the usual way (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Flashing
========
Nucleo L053R8 board includes an ST-LINK/V2-1 embedded debug tool interface.
This interface is supported by the openocd version included in the Zephyr SDK.
Flashing an application to Nucleo L053R8
----------------------------------------
Here is an example for the :zephyr:code-sample:`blinky` application.
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: nucleo_l053r8
:goals: build flash
You will see the LED blinking every second.
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nucleo_l053r8
:maybe-skip-config:
:goals: debug
References
**********
.. target-notes::
.. _Nucleo L053R8 website:
path_to_url
.. _STM32L0x3 reference manual:
path_to_url
.. _STM32 Nucleo-64 board User Manual:
path_to_url
``` | /content/code_sandbox/boards/st/nucleo_l053r8/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,355 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/g4/stm32g474Xe.dtsi>
#include <st/g4/stm32g474r(b-c-e)tx-pinctrl.dtsi>
#include "arduino_r3_connector.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "STMicroelectronics STM32G474RE-NUCLEO board";
compatible = "st,stm32g474re-nucleo";
chosen {
zephyr,console = &lpuart1;
zephyr,shell-uart = &lpuart1;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,canbus = &fdcan1;
zephyr,code-partition = &slot0_partition;
};
leds: leds {
compatible = "gpio-leds";
green_led: led_0 {
gpios = <&gpioa 5 GPIO_ACTIVE_HIGH>;
label = "User LD2";
};
};
pwmleds {
compatible = "pwm-leds";
green_pwm_led: green_pwm_led {
pwms = <&pwm2 1 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button {
label = "User";
gpios = <&gpioc 13 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_0>;
};
};
aliases {
led0 = &green_led;
mcuboot-led0 = &green_led;
pwm-led0 = &green_pwm_led;
sw0 = &user_button;
watchdog0 = &iwdg;
die-temp0 = &die_temp;
volt-sensor0 = &vref;
volt-sensor1 = &vbat;
};
};
&clk_lsi {
status = "okay";
};
&clk_hsi48 {
status = "okay";
};
&clk_hse {
clock-frequency = <DT_FREQ_M(24)>;
status = "okay";
};
&pll {
div-m = <6>;
mul-n = <85>;
div-p = <7>;
div-q = <2>;
div-r = <2>;
clocks = <&clk_hse>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(170)>;
ahb-prescaler = <1>;
apb1-prescaler = <1>;
apb2-prescaler = <1>;
};
&usart1 {
pinctrl-0 = <&usart1_tx_pc4 &usart1_rx_pc5>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&lpuart1 {
pinctrl-0 = <&lpuart1_tx_pa2 &lpuart1_rx_pa3>;
pinctrl-1 = <&analog_pa2 &analog_pa3>;
pinctrl-names = "default", "sleep";
current-speed = <115200>;
status = "okay";
};
&i2c1 {
pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
pinctrl-names = "default";
status = "okay";
};
&spi1 {
pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pa7>;
pinctrl-names = "default";
cs-gpios = <&gpiob 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
status = "okay";
};
&spi2 {
pinctrl-0 = <&spi2_nss_pb12 &spi2_sck_pb13
&spi2_miso_pb14 &spi2_mosi_pb15>;
pinctrl-names = "default";
status = "okay";
};
&spi3 {
/* SPI3 on the ST Morpho Connector CN7 pins 17, 1, 2, 3*/
pinctrl-0 = <&spi3_nss_pa15 &spi3_sck_pc10
&spi3_miso_pc11 &spi3_mosi_pc12>;
pinctrl-names = "default";
status = "okay";
};
&timers2 {
status = "okay";
pwm2: pwm {
status = "okay";
pinctrl-0 = <&tim2_ch1_pa5>;
pinctrl-names = "default";
};
};
&timers3 {
st,prescaler = <10000>;
status = "okay";
pwm3: pwm {
status = "okay";
pinctrl-0 = <&tim3_ch1_pb4>;
pinctrl-names = "default";
};
};
stm32_lp_tick_source: &lptim1 {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>,
<&rcc STM32_SRC_LSI LPTIM1_SEL(1)>;
status = "okay";
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000400>,
<&rcc STM32_SRC_LSI RTC_SEL(2)>;
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 DT_SIZE_K(34)>;
};
slot0_partition: partition@8800 {
label = "image-0";
reg = <0x00008800 DT_SIZE_K(240)>;
};
slot1_partition: partition@44800 {
label = "image-1";
reg = <0x00044800 DT_SIZE_K(234)>;
};
/* Set 4Kb of storage at the end of the 512Kb of flash */
storage_partition: partition@7f000 {
label = "storage";
reg = <0x0007f000 DT_SIZE_K(4)>;
};
};
};
&iwdg {
status = "okay";
};
&rng {
status = "okay";
};
&adc1 {
pinctrl-0 = <&adc1_in1_pa0>;
pinctrl-names = "default";
st,adc-clock-source = <SYNC>;
st,adc-prescaler = <4>;
status = "okay";
};
&die_temp {
status = "okay";
};
&dac1 {
pinctrl-0 = <&dac1_out1_pa4>;
pinctrl-names = "default";
status = "okay";
};
&fdcan1 {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x02000000>,
<&rcc STM32_SRC_HSE FDCAN_SEL(0)>;
pinctrl-0 = <&fdcan1_rx_pa11 &fdcan1_tx_pa12>;
pinctrl-names = "default";
status = "okay";
};
&vref {
status = "okay";
};
&vbat {
status = "okay";
};
``` | /content/code_sandbox/boards/st/nucleo_g474re/nucleo_g474re.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,584 |
```unknown
# enable uart driver
CONFIG_SERIAL=y
# enable GPIO
CONFIG_GPIO=y
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# Console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# Enable MPU
CONFIG_ARM_MPU=y
# Enable HW stack protection
CONFIG_HW_STACK_PROTECTION=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/nucleo_g474re/nucleo_g474re_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 74 |
```yaml
board:
name: nucleo_g474re
vendor: st
socs:
- name: stm32g474xx
``` | /content/code_sandbox/boards/st/nucleo_g474re/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 31 |
```unknown
# STM32G474RE Nucleo board configuration
if BOARD_NUCLEO_G474RE
config SPI_STM32_INTERRUPT
default y
depends on SPI
endif # BOARD_NUCLEO_G431RB
``` | /content/code_sandbox/boards/st/nucleo_g474re/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 49 |
```unknown
/*
*
*/
/ {
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpioa 0 0>, /* A0 */
<1 0 &gpioa 1 0>, /* A1 */
<2 0 &gpioa 4 0>, /* A2 */
<3 0 &gpiob 0 0>, /* A3 */
<4 0 &gpioc 1 0>, /* A4 */
<5 0 &gpioc 0 0>, /* A5 */
<6 0 &gpioc 5 0>, /* D0 */
<7 0 &gpioc 4 0>, /* D1 */
<8 0 &gpioa 10 0>, /* D2 */
<9 0 &gpiob 3 0>, /* D3 */
<10 0 &gpiob 5 0>, /* D4 */
<11 0 &gpiob 4 0>, /* D5 */
<12 0 &gpiob 10 0>, /* D6 */
<13 0 &gpioa 8 0>, /* D7 */
<14 0 &gpioa 9 0>, /* D8 */
<15 0 &gpioc 7 0>, /* D9 */
<16 0 &gpiob 6 0>, /* D10 */
<17 0 &gpioa 7 0>, /* D11 */
<18 0 &gpioa 6 0>, /* D12 */
<19 0 &gpioa 5 0>, /* D13 */
<20 0 &gpiob 9 0>, /* D14 */
<21 0 &gpiob 8 0>; /* D15 */
};
};
arduino_i2c: &i2c1 {};
arduino_spi: &spi1 {};
arduino_serial: &usart1 {};
``` | /content/code_sandbox/boards/st/nucleo_g474re/arduino_r3_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 502 |
```unknown
config BOARD_NUCLEO_G474RE
select SOC_STM32G474XX
``` | /content/code_sandbox/boards/st/nucleo_g474re/Kconfig.nucleo_g474re | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 21 |
```ini
source [find interface/stlink.cfg]
transport select hla_swd
source [find target/stm32g4x.cfg]
reset_config srst_only
``` | /content/code_sandbox/boards/st/nucleo_g474re/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 34 |
```cmake
board_runner_args(jlink "--device=STM32L011K4" "--speed=4000")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/st/nucleo_l011k4/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 56 |
```yaml
identifier: nucleo_l011k4
name: ST Nucleo L011K4
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- gpio
- i2c
- spi
- eeprom
ram: 2
flash: 16
``` | /content/code_sandbox/boards/st/nucleo_l011k4/nucleo_l011k4.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 82 |
```unknown
# Kernel Options due to Low Memory (2k)
CONFIG_MAIN_STACK_SIZE=320
CONFIG_IDLE_STACK_SIZE=100
CONFIG_ISR_STACK_SIZE=256
# Serial Drivers
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# GPIO Controller
CONFIG_GPIO=y
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/nucleo_l011k4/nucleo_l011k4_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 90 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/l0/stm32l011X4.dtsi>
#include <st/l0/stm32l011k(3-4)tx-pinctrl.dtsi>
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "STMicroelectronics STM32L011K4-NUCLEO board";
compatible = "st,stm32l011k4-nucleo";
chosen {
zephyr,console = &usart2;
zephyr,shell-uart = &usart2;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
};
leds: leds {
compatible = "gpio-leds";
green_led_2: led_2 {
gpios = <&gpiob 3 GPIO_ACTIVE_HIGH>;
label = "User LD2";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button {
label = "User";
gpios = <&gpioa 12 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_0>;
};
};
aliases {
led0 = &green_led_2;
eeprom-0 = &eeprom;
};
};
&clk_hsi {
status = "okay";
};
&pll {
div = <2>;
mul = <4>;
clocks = <&clk_hsi>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(32)>;
ahb-prescaler = <1>;
apb1-prescaler = <1>;
apb2-prescaler = <1>;
};
&usart2 {
pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa15>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&i2c1 {
pinctrl-0 = <&i2c1_scl_pa4 &i2c1_sda_pa10>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
&spi1 {
pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pa7>;
pinctrl-names = "default";
status = "okay";
};
&eeprom {
status = "okay";
};
``` | /content/code_sandbox/boards/st/nucleo_l011k4/nucleo_l011k4.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 541 |
```yaml
board:
name: nucleo_l011k4
vendor: st
socs:
- name: stm32l011xx
``` | /content/code_sandbox/boards/st/nucleo_l011k4/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```unknown
config BOARD_NUCLEO_L011K4
select SOC_STM32L011XX
``` | /content/code_sandbox/boards/st/nucleo_l011k4/Kconfig.nucleo_l011k4 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 22 |
```unknown
# STM32 Nucleo-32 development board with STM32L011K4 MCU
if BOARD_NUCLEO_L011K4
config SPI_STM32_INTERRUPT
default y
depends on SPI
endif # BOARD_NUCLEO_L011K4
``` | /content/code_sandbox/boards/st/nucleo_l011k4/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 58 |
```ini
# This is an ST NUCLEO-L011K4 board with single STM32L011K4 chip.
# path_to_url
source [find interface/stlink.cfg]
transport select hla_swd
#set WORKAREASIZE 0x2000
source [find target/stm32l0.cfg]
# There is only system reset line and JTAG/SWD command can be issued when SRST
reset_config srst_only
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
``` | /content/code_sandbox/boards/st/nucleo_l011k4/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 151 |
```restructuredtext
.. _nucleo_l011k4_board:
ST Nucleo L011K4
################
Overview
********
The STM32 Nucleo-32 development board with STM32L011K4 MCU, supports Arduino Nano V3 connectivity.
The STM32 Nucleo board provides an affordable, and flexible way for users to try out new concepts,
and build prototypes with the STM32 microcontroller, choosing from the various
combinations of performance, power consumption, and features.
The Arduino* Nano V3 connectivity support allow easy functionality
expansion of the STM32 Nucleo open development platform with a wide choice of
specialized shields.
The STM32 Nucleo board integrates the ST-LINK/V2-1 debugger and programmer.
The STM32 Nucleo board comes with the STM32 comprehensive software HAL library together
with various packaged software examples.
.. image:: img/nucleo_l011k4.jpg
:align: center
:alt: Nucleo L011K4
More information about the board can be found at the `Nucleo L011K4 website`_.
Hardware
********
Nucleo L011K4 provides the following hardware components:
- STM32 microcontroller in LQFP32 package
- Extension resource:
- Arduino* Nano V3 connectivity
- ARM* mbed*
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector:
- Selection-mode switch to use the kit as a standalone ST-LINK/V2-1
- Flexible board power supply:
- USB VBUS or external source (3.3V, 5V, 7 - 12V)
- Power management access point
- Three LEDs:
- USB communication (LD1), user LED (LD2), power LED (LD3)
- One push-button: RESET
- USB re-enumeration capability. Three different interfaces supported on USB:
- Virtual COM port
- Mass storage
- Debug port
- Support of wide choice of Integrated Development Environments (IDEs) including:
- IAR
- ARM Keil
- GCC-based IDEs
More information about STM32L011K4 can be found in the
`STM32L0x1 reference manual`_
Supported Features
==================
The Zephyr nucleo_l011k4 board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| CLOCK | on-chip | reset and clock control |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c controller |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi controller |
+-----------+------------+-------------------------------------+
| EEPROM | on-chip | eeprom |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported in this Zephyr port.
The default configuration can be found in the defconfig file:
:zephyr_file:`boards/st/nucleo_l011k4/nucleo_l011k4_defconfig`
Connections and IOs
===================
Each of the GPIO pins can be configured by software as output (push-pull or open-drain), as
input (with or without pull-up or pull-down), or as peripheral alternate function. Most of the
GPIO pins are shared with digital or analog alternate functions. All GPIOs are high current
capable except for analog inputs.
Default Zephyr Peripheral Mapping:
----------------------------------
- UART_2 TX/RX : PA2/PA15 (ST-Link Virtual Port Com)
- I2C1 SCL/SDA : PA4/PA10 (Arduino I2C)
- SPI1 SCK/MISO/MOSI : PA5/PA6/PA7 (Arduino SPI)
- LD2 : PB3
For more details please refer to `STM32 Nucleo-32 board User Manual`_.
Programming and Debugging
*************************
Applications for the ``nucleo_l011k4`` board configuration can be built and
flashed in the usual way (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Flashing
========
Nucleo L011K4 board includes an ST-LINK/V2-1 embedded debug tool interface.
This interface is supported by the openocd version included in the Zephyr SDK.
Flashing an application to Nucleo L011K4
----------------------------------------
Here is an example for the :zephyr:code-sample:`blinky` application.
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: nucleo_l011k4
:goals: build flash
You will see the LED blinking every second.
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nucleo_l011k4
:maybe-skip-config:
:goals: debug
References
**********
.. target-notes::
.. _Nucleo L011K4 website:
path_to_url
.. _STM32L0x1 reference manual:
path_to_url
.. _STM32 Nucleo-32 board User Manual:
path_to_url
``` | /content/code_sandbox/boards/st/nucleo_l011k4/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,264 |
```restructuredtext
.. _nucleo_g474re_board:
ST Nucleo G474RE
################
Overview
********
The Nucleo G474RE board features an ARM Cortex-M4 based STM32G474RE MCU
with a wide range of connectivity support and configurations. Here are
some highlights of the Nucleo G474RE board:
- STM32 microcontroller in LQFP64 package
- Arduino Uno V3 connectivity
- On-board ST-LINK/V3E debugger/programmer with SWD connector
- Flexible board power supply:
- USB VBUS or external source(3.3V, 5V, 7 - 12V)
- Power management access point
- Three LEDs: USB communication (LD1), power LED (LD3), user LED (LD2)
- Two push-buttons: RESET and USER
.. image:: img/nucleo_g474re.jpg
:align: center
:alt: Nucleo G474RE
More information about the board can be found at the `Nucleo G474RE website`_.
Hardware
********
The STM32G474RE SoC provides the following hardware IPs:
- Ultra-low-power with FlexPowerControl (down to 28 nA Standby mode and 84
|micro| A/MHz run mode)
- Core: ARM |reg| 32-bit Cortex |reg| -M4 CPU with FPU, frequency up to 170 MHz
- Clock Sources:
- 4 to 48 MHz crystal oscillator (HSE)
- 32 kHz crystal oscillator for RTC (LSE)
- Internal 16 MHz factory-trimmed RC ( |plusminus| 1%)
- Internal low-power 32 kHz RC ( |plusminus| 5%)
- 2 PLLs for system clock, USB, audio, ADC
- RTC with HW calendar, alarms and calibration
- 14x timers:
- 1x 32-bit timer and 2x 16-bit timers with up to four IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
- 2x 16-bit 8-channel advanced motor control timers, with up to 8x PWM channels, dead time generation and emergency stop
- 1x 16-bit timer with 2x IC/OCs, one OCN/PWM, dead time generation and emergency stop
- 2x 16-bit timers with IC/OC/OCN/PWM, dead time generation and emergency stop
- 2x watchdog timers (independent, window)
- 2x 16-bit basic timers
- SysTick timer
- 1x low-power timer
- Up to 86 fast I/Os, most 5 V-tolerant
- Memories
- Up to 128 KB single bank Flash, proprietary code readout protection
- Up to 22 KB of SRAM including 16 KB with hardware parity check
- Rich analog peripherals (independent supply)
- 2x 12-bit ADC 5 MSPS, up to 16-bit with hardware oversampling, 200
|micro| A/MSPS
- 4x 12-bit DAC, low-power sample and hold
- 3x operational amplifiers with built-in PGA
- 4x ultra-fast rail-to-rail analog comparators
- 16x communication interfaces
- 1 x FDCAN controller supporting flexible data rate
- 3x I2C FM+(1 Mbit/s), SMBus/PMBus
- 4x USARTs (ISO 7816, LIN, IrDA, modem)
- 1x LPUART
- 3x SPIs (2x with multiplexed half duplex I2S interface)
- 1x SAI (serial audio interface)
- USB 2.0 full-speed interface with LPM and BCD support
- IRTIM (Infrared interface)
- USB Type-C /USB power delivery controller (UCPD)
- 12-channel DMA controller
- True random number generator (RNG)
- CRC calculation unit, 96-bit unique ID
- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell*
More information about STM32G474RE can be found here:
- `STM32G474RE on www.st.com`_
- `STM32G4 reference manual`_
Supported Features
==================
The Zephyr nucleo_g474re board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | independent watchdog |
+-----------+------------+-------------------------------------+
| PWM | on-chip | pwm |
+-----------+------------+-------------------------------------+
| ADC | on-chip | adc |
+-----------+------------+-------------------------------------+
| DAC | on-chip | DAC Controller |
+-----------+------------+-------------------------------------+
| FLASH | on-chip | flash memory |
+-----------+------------+-------------------------------------+
| COUNTER | on-chip | rtc |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| die-temp | on-chip | die temperature sensor |
+-----------+------------+-------------------------------------+
| FDCAN1 | on-chip | CAN controller |
+-----------+------------+-------------------------------------+
| RTC | on-chip | rtc |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported on this Zephyr port.
The default configuration can be found in the defconfig file:
:zephyr_file:`boards/st/nucleo_g474re/nucleo_g474re_defconfig`
Connections and IOs
===================
Nucleo G474RE Board has 6 GPIO controllers. These controllers are responsible for pin muxing,
input/output, pull-up, etc.
For more details please refer to `STM32G4 Nucleo-64 board User Manual`_.
Default Zephyr Peripheral Mapping:
----------------------------------
.. rst-class:: rst-columns
- UART_1_TX : PC4
- UART_1_RX : PC5
- LPUART_1_TX : PA2
- LPUART_1_RX : PA3
- I2C_1_SCL : PB8
- I2C_1_SDA : PB9
- SPI_1_NSS : PB6
- SPI_1_SCK : PA5
- SPI_1_MISO : PA6
- SPI_1_MOSI : PA7
- SPI_2_NSS : PB12
- SPI_2_SCK : PB13
- SPI_2_MISO : PB14
- SPI_2_MOSI : PB15
- SPI_3_NSS : PA15
- SPI_3_SCK : PC10
- SPI_3_MISO : PC11
- SPI_3_MOSI : PC12
- PWM_2_CH1 : PA5 (might conflict with SPI1)
- PWM_3_CH1 : PB4
- USER_PB : PC13
- LD2 : PA5
- ADC1_IN1 : PA0
- DAC1_OUT1 : PA4
- FDCAN1_RX: PA11
- FDCAN1_TX: PA12
System Clock
------------
Nucleo G474RE System Clock could be driven by internal or external oscillator,
as well as main PLL clock. By default System clock is driven by PLL clock at 150MHz,
driven by 16MHz high speed internal oscillator. The clock can be boosted to 170MHz if boost mode
is selected.
Serial Port
-----------
Nucleo G474RE board has 3 U(S)ARTs. The Zephyr console output is assigned to LPUART1.
Default settings are 115200 8N1.
Please note that LPUART1 baudrate is limited to 9600 if the MCU is clocked by LSE (32.768 kHz) in
low power mode.
Programming and Debugging
*************************
Applications for the ``nucleo_g474re`` board configuration can be built and
flashed in the usual way (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Flashing
========
Nucleo G474RE board includes an ST-LINK/V3E embedded debug tool interface.
Flashing an application to Nucleo G474RE
----------------------------------------
Connect the Nucleo G474RE to your host computer using the USB port,
then run a serial host program to connect with your Nucleo board.
.. code-block:: console
$ minicom -D /dev/ttyACM0
Now build and flash an application. Here is an example for
:ref:`hello_world`.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nucleo_g474re
:goals: build flash
You should see the following message on the console:
.. code-block:: console
$ Hello World! arm
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nucleo_g474re
:maybe-skip-config:
:goals: debug
.. _Nucleo G474RE website:
path_to_url
.. _STM32G4 Nucleo-64 board User Manual:
path_to_url
.. _STM32G474RE on www.st.com:
path_to_url
.. _STM32G4 reference manual:
path_to_url
``` | /content/code_sandbox/boards/st/nucleo_g474re/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,236 |
```yaml
identifier: stm32f0_disco
name: ST STM32F0 Discovery
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 8
supported:
- watchdog
vendor: st
``` | /content/code_sandbox/boards/st/stm32f0_disco/stm32f0_disco.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 64 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/f0/stm32f051X8.dtsi>
#include <st/f0/stm32f051r8tx-pinctrl.dtsi>
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "STMicroelectronics STM32F0DISCOVERY board";
compatible = "st,stm32f058r8-discovery";
chosen {
zephyr,console = &usart1;
zephyr,shell-uart = &usart1;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
};
leds {
compatible = "gpio-leds";
green_led_3: led_3 {
gpios = <&gpioc 9 GPIO_ACTIVE_HIGH>;
label = "User LD3";
};
blue_led_4: led_4 {
gpios = <&gpioc 8 GPIO_ACTIVE_HIGH>;
label = "User LD4";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button {
label = "Key";
gpios = <&gpioa 0 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_0>;
};
};
aliases {
led0 = &green_led_3;
led1 = &blue_led_4;
sw0 = &user_button;
watchdog0 = &iwdg;
};
};
&clk_lsi {
status = "okay";
};
&clk_hse {
clock-frequency = <DT_FREQ_M(8)>;
status = "okay";
};
&pll {
prediv = <1>;
mul = <6>;
clocks = <&clk_hse>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(48)>;
ahb-prescaler = <1>;
apb1-prescaler = <1>;
};
/* Due to limited available memory, don't enable gpiod and gpiof */
&gpiod {status = "disabled";};
&gpiof {status = "disabled";};
&usart1 {
pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&usart2 {
pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa3>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 DT_SIZE_K(8)>;
read-only;
};
/*
* The flash starting at offset 0x2000 and ending at
* offset 0x3999 is reserved for use by the application.
*/
slot0_partition: partition@4000 {
label = "image-0";
reg = <0x00004000 DT_SIZE_K(16)>;
};
slot1_partition: partition@8000 {
label = "image-1";
reg = <0x00008000 DT_SIZE_K(16)>;
};
scratch_partition: partition@c000 {
label = "image-scratch";
reg = <0x0000C000 DT_SIZE_K(16)>;
};
};
};
&iwdg {
status = "okay";
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>,
<&rcc STM32_SRC_LSI RTC_SEL(2)>;
status = "okay";
backup_regs {
status = "okay";
};
};
``` | /content/code_sandbox/boards/st/stm32f0_disco/stm32f0_disco.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 883 |
```cmake
board_runner_args(jlink "--device=STM32F051R8" "--speed=4000")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/st/stm32f0_disco/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 56 |
```unknown
config BOARD_STM32F0_DISCO
select SOC_STM32F051X8
``` | /content/code_sandbox/boards/st/stm32f0_disco/Kconfig.stm32f0_disco | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 22 |
```unknown
# Kernel Options due to Low Memory (8k)
CONFIG_MAIN_STACK_SIZE=640
CONFIG_IDLE_STACK_SIZE=200
CONFIG_ISR_STACK_SIZE=512
# Prevent Interrupt Vector Table in RAM
CONFIG_SRAM_VECTOR_TABLE=n
# Serial Drivers
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# GPIO Controller
CONFIG_GPIO=y
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/stm32f0_disco/stm32f0_disco_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 105 |
```ini
source [find board/stm32f0discovery.cfg]
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
``` | /content/code_sandbox/boards/st/stm32f0_disco/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 71 |
```yaml
board:
name: stm32f0_disco
vendor: st
socs:
- name: stm32f051x8
``` | /content/code_sandbox/boards/st/stm32f0_disco/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 33 |
```cmake
board_runner_args(jlink "--device=STM32F446ZE" "--speed=4000")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/st/nucleo_f446ze/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 55 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/f4/stm32f446Xe.dtsi>
#include <st/f4/stm32f446z(c-e)tx-pinctrl.dtsi>
#include "arduino_r3_connector.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "STMicroelectronics STM32F446ZE-NUCLEO board";
compatible = "st,stm32f446ze-nucleo";
chosen {
zephyr,console = &usart3;
zephyr,shell-uart = &usart3;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,canbus = &can1;
};
leds: leds {
compatible = "gpio-leds";
green_led_1: led_1 {
gpios = <&gpiob 0 GPIO_ACTIVE_HIGH>;
label = "User LD1";
};
blue_led_2: led_2 {
gpios = <&gpiob 7 GPIO_ACTIVE_HIGH>;
label = "User LD2";
};
red_led_3: led_3 {
gpios = <&gpiob 14 GPIO_ACTIVE_HIGH>;
label = "User LD3";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button {
label = "User";
gpios = <&gpioc 13 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_0>;
};
};
aliases {
led0 = &green_led_1;
led1 = &blue_led_2;
led2 = &red_led_3;
sw0 = &user_button;
volt-sensor0 = &vref;
volt-sensor1 = &vbat;
};
};
&clk_lsi {
status = "okay";
};
&clk_hse {
hse-bypass;
clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
status = "okay";
};
&pll {
div-m = <8>;
mul-n = <336>;
div-p = <2>;
div-q = <7>;
clocks = <&clk_hse>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(168)>; /* highest value to get a precise USB clock */
ahb-prescaler = <1>;
apb1-prescaler = <4>;
apb2-prescaler = <2>;
};
&adc1 {
pinctrl-0 = <&adc1_in0_pa0>;
pinctrl-names = "default";
st,adc-clock-source = <SYNC>;
st,adc-prescaler = <2>;
status = "okay";
};
&dac1 {
status = "okay";
pinctrl-0 = <&dac_out1_pa4>;
pinctrl-names = "default";
};
&usart2 {
pinctrl-0 = <&usart2_tx_pd5 &usart2_rx_pd6>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&usart3 {
pinctrl-0 = <&usart3_tx_pd8 &usart3_rx_pd9>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&usart6 {
pinctrl-0 = <&usart6_tx_pg14 &usart6_rx_pg9>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&i2c1 {
pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
&i2c2 {
pinctrl-0 = <&i2c2_scl_pf1 &i2c2_sda_pf0>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
&spi1 {
pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pa7>;
pinctrl-names = "default";
cs-gpios = <&gpiod 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
status = "okay";
};
&spi2 {
pinctrl-0 = <&spi2_nss_pb12 &spi2_sck_pb13
&spi2_miso_pb14 &spi2_mosi_pb15>;
pinctrl-names = "default";
status = "okay";
};
zephyr_udc0: &usbotg_fs {
pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12
&usb_otg_fs_id_pa10>;
pinctrl-names = "default";
status = "okay";
};
&timers1 {
status = "okay";
pwm1: pwm {
status = "okay";
pinctrl-0 = <&tim1_ch1_pe9>;
pinctrl-names = "default";
};
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>,
<&rcc STM32_SRC_LSI RTC_SEL(2)>;
status = "okay";
};
&backup_sram {
status = "okay";
};
&can1 {
pinctrl-0 = <&can1_rx_pd0 &can1_tx_pd1>;
pinctrl-names = "default";
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 DT_SIZE_K(64)>;
read-only;
};
/*
* The flash starting at 0x00010000 and ending at
* 0x0001ffff (sectors 16-31) is reserved for use
* by the application.
*/
storage_partition: partition@10000 {
label = "storage";
reg = <0x00010000 DT_SIZE_K(64)>;
};
slot0_partition: partition@20000 {
label = "image-0";
reg = <0x00020000 DT_SIZE_K(128)>;
};
slot1_partition: partition@40000 {
label = "image-1";
reg = <0x00040000 DT_SIZE_K(128)>;
};
scratch_partition: partition@60000 {
label = "image-scratch";
reg = <0x00060000 DT_SIZE_K(128)>;
};
};
};
&vref {
status = "okay";
};
&vbat {
status = "okay";
};
``` | /content/code_sandbox/boards/st/nucleo_f446ze/nucleo_f446ze.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,539 |
```restructuredtext
.. _stm32f0_disco_board:
ST STM32F0 Discovery
####################
Overview
********
The STM32F0 Discovery development board uses an STM32F051R8T6 MCU and
integrates the ST-LINK/V2-1 debugger and programmer. It also comes with a
comprehensive STM32 software HAL library and various packaged software
examples.
.. image:: img/stm32f0_disco.jpg
:align: center
:alt: STM32F0DISCOVERY
More information about the board can be found at the `STM32F0DISCOVERY website`_.
Hardware
********
The STM32 Discovery board features:
- STM32F051R8T6 microcontroller featuring 64 KB Flash memory, 8 KB RAM in an
LQFP64 package
- On-board ST-LINK/V2 with selection mode switch to use the kit as a standalone
ST-LINK/V2 (with SWD connector for programming and debugging)
- Board power supply: through USB bus or from an external 5 V supply voltage
- External application power supply: 3 V and 5 V
- Four LEDs:
- LD1 (red) for 3.3 V power on
- LD2 (red/green) for USB communication
- LD3 (green) for PC9 output
- LD4 (blue) for PC8 output
- Two push buttons (user and reset)
- Extension header for all LQFP64 I/Os for quick connection to prototyping board
and easy probing
- An additional board is provided which can be connected to the extension
connector for even easier prototyping and probing.
- Comprehensive free software including a variety of examples, part of
STM32CubeF0 package or STSW-STM32049 for legacy Standard Libraries usage
More information about STM32F051R8 can be found in the `STM32F0x8 reference manual`_.
Supported Features
==================
The Zephyr stm32f0_disco board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| CLOCK | on-chip | reset and clock control |
+-----------+------------+-------------------------------------+
| FLASH | on-chip | flash memory |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | independent watchdog |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported in this Zephyr port.
The default configuration can be found in
:zephyr_file:`boards/st/stm32f0_disco/stm32f0_disco_defconfig`
Connections and IOs
===================
Each of the GPIO pins can be configured by software as output (push-pull or open-drain), as
input (with or without pull-up or pull-down), or as peripheral alternate function. Most of the
GPIO pins are shared with digital or analog alternate functions. All GPIOs are high current
capable except for analog inputs.
Default Zephyr Peripheral Mapping:
----------------------------------
- UART_1_TX : PA9
- UART_1_RX : PA10
- UART_2_TX : PA2
- UART_2_RX : PA3
For more details please refer to `STM32F0DISCOVERY board User Manual`_.
Programming and Debugging
*************************
Applications for the ``stm32f0_disco`` board configuration can be built and
flashed in the usual way (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Flashing
========
STM32F0DISCOVERY board includes an ST-LINK/V2-1 embedded debug tool interface.
This interface is supported by the openocd version included in the Zephyr SDK.
Flashing an application to Nucleo F030R8
----------------------------------------
Here is an example for the :zephyr:code-sample:`blinky` application.
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: stm32f0_disco
:goals: build flash
You will see the LED blinking every second.
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:zephyr:code-sample:`blinky` application.
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: stm32f0_disco
:maybe-skip-config:
:goals: debug
References
**********
.. target-notes::
.. _STM32F0DISCOVERY website:
path_to_url
.. _STM32F0x8 reference manual:
path_to_url
.. _STM32F0DISCOVERY board User Manual:
path_to_url
``` | /content/code_sandbox/boards/st/stm32f0_disco/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,135 |
```yaml
identifier: nucleo_f446ze
name: ST Nucleo F446ZE
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- adc
- arduino_gpio
- arduino_i2c
- arduino_spi
- counter
- gpio
- spi
- i2c
- can
- backup_sram
- usb
- quadspi
ram: 128
flash: 512
vendor: st
``` | /content/code_sandbox/boards/st/nucleo_f446ze/nucleo_f446ze.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 126 |
```yaml
board:
name: nucleo_f446ze
vendor: st
socs:
- name: stm32f446xx
``` | /content/code_sandbox/boards/st/nucleo_f446ze/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 31 |
```unknown
# Enable MPU
CONFIG_ARM_MPU=y
# Enable HW stack protection
CONFIG_HW_STACK_PROTECTION=y
CONFIG_SERIAL=y
# console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# enable GPIO
CONFIG_GPIO=y
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/nucleo_f446ze/nucleo_f446ze_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 69 |
```unknown
config BOARD_NUCLEO_F446ZE
select SOC_STM32F446XX
``` | /content/code_sandbox/boards/st/nucleo_f446ze/Kconfig.nucleo_f446ze | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 21 |
```unknown
# STM32F446ZE Nucleo board configuration
if BOARD_NUCLEO_F446ZE
config SPI_STM32_INTERRUPT
default y
depends on SPI
endif # BOARD_NUCLEO_F446ZE
``` | /content/code_sandbox/boards/st/nucleo_f446ze/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 49 |
```ini
source [find board/st_nucleo_f4.cfg]
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
``` | /content/code_sandbox/boards/st/nucleo_f446ze/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 70 |
```unknown
/*
*
*/
/ {
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpioa 3 0>, /* A0 */
<1 0 &gpioc 0 0>, /* A1 */
<2 0 &gpioc 3 0>, /* A2 */
<3 0 &gpiof 3 0>, /* A3 */
<4 0 &gpiof 5 0>, /* A4 */
<5 0 &gpiof 10 0>, /* A5 */
<6 0 &gpiog 9 0>, /* D0 */
<7 0 &gpiog 14 0>, /* D1 */
<8 0 &gpiof 15 0>, /* D2 */
<9 0 &gpioe 13 0>, /* D3 */
<10 0 &gpiof 14 0>, /* D4 */
<11 0 &gpioe 11 0>, /* D5 */
<12 0 &gpioe 9 0>, /* D6 */
<13 0 &gpiof 13 0>, /* D7 */
<14 0 &gpiof 12 0>, /* D8 */
<15 0 &gpiod 15 0>, /* D9 */
<16 0 &gpiod 14 0>, /* D10 */
<17 0 &gpioa 7 0>, /* D11 */
<18 0 &gpioa 6 0>, /* D12 */
<19 0 &gpioa 5 0>, /* D13 */
<20 0 &gpiob 9 0>, /* D14 */
<21 0 &gpiob 8 0>; /* D15 */
};
};
arduino_i2c: &i2c1 {};
arduino_spi: &spi1 {};
arduino_serial: &usart6 {};
``` | /content/code_sandbox/boards/st/nucleo_f446ze/arduino_r3_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 497 |
```unknown
/*
*/
#include <zephyr/dt-bindings/gpio/gpio.h>
#include <zephyr/dt-bindings/gpio/st-morpho-header.h>
/ {
st_morpho_header: st-morpho-header {
compatible = "st-morpho-header";
#gpio-cells = <2>;
gpio-map-mask = <ST_MORPHO_PIN_MASK 0x0>;
gpio-map-pass-thru = <0x0 GPIO_DT_FLAGS_MASK>;
gpio-map = <ST_MORPHO_L_1 0 &gpioc 10 0>,
<ST_MORPHO_L_2 0 &gpioc 11 0>,
<ST_MORPHO_L_3 0 &gpioc 12 0>,
<ST_MORPHO_L_4 0 &gpiod 2 0>,
<ST_MORPHO_L_13 0 &gpioa 13 0>,
<ST_MORPHO_L_15 0 &gpioa 14 0>,
<ST_MORPHO_L_17 0 &gpioa 15 0>,
<ST_MORPHO_L_21 0 &gpiob 7 0>,
<ST_MORPHO_L_23 0 &gpioc 13 0>,
<ST_MORPHO_L_25 0 &gpioc 14 0>,
<ST_MORPHO_L_27 0 &gpioc 15 0>,
<ST_MORPHO_L_28 0 &gpioa 0 0>,
<ST_MORPHO_L_29 0 &gpioh 0 0>,
<ST_MORPHO_L_30 0 &gpioa 1 0>,
<ST_MORPHO_L_31 0 &gpioh 1 0>,
<ST_MORPHO_L_32 0 &gpioa 4 0>,
<ST_MORPHO_L_34 0 &gpiob 0 0>,
<ST_MORPHO_L_35 0 &gpioc 2 0>,
<ST_MORPHO_L_36 0 &gpioc 1 0>, /* SB56=ON, SB46=OFF */
<ST_MORPHO_L_37 0 &gpioc 3 0>,
<ST_MORPHO_L_38 0 &gpioc 0 0>, /* SB51=ON, SB52=OFF */
<ST_MORPHO_R_1 0 &gpioc 9 0>,
<ST_MORPHO_R_2 0 &gpioc 8 0>,
<ST_MORPHO_R_3 0 &gpiob 8 0>,
<ST_MORPHO_R_4 0 &gpioc 6 0>,
<ST_MORPHO_R_5 0 &gpiob 9 0>,
<ST_MORPHO_R_6 0 &gpioc 5 0>,
<ST_MORPHO_R_11 0 &gpioa 5 0>,
<ST_MORPHO_R_12 0 &gpioa 12 0>,
<ST_MORPHO_R_13 0 &gpioa 6 0>,
<ST_MORPHO_R_14 0 &gpioa 11 0>,
<ST_MORPHO_R_15 0 &gpioa 7 0>,
<ST_MORPHO_R_16 0 &gpiob 12 0>,
<ST_MORPHO_R_17 0 &gpiob 6 0>,
<ST_MORPHO_R_18 0 &gpiob 11 0>,
<ST_MORPHO_R_19 0 &gpioc 7 0>,
<ST_MORPHO_R_21 0 &gpioa 9 0>,
<ST_MORPHO_R_22 0 &gpiob 2 0>,
<ST_MORPHO_R_23 0 &gpioa 8 0>,
<ST_MORPHO_R_24 0 &gpiob 1 0>,
<ST_MORPHO_R_25 0 &gpiob 10 0>,
<ST_MORPHO_R_26 0 &gpiob 15 0>,
<ST_MORPHO_R_27 0 &gpiob 4 0>,
<ST_MORPHO_R_28 0 &gpiob 14 0>,
<ST_MORPHO_R_29 0 &gpiob 5 0>,
<ST_MORPHO_R_30 0 &gpiob 13 0>,
<ST_MORPHO_R_31 0 &gpiob 3 0>,
<ST_MORPHO_R_33 0 &gpioa 10 0>,
<ST_MORPHO_R_34 0 &gpioc 4 0>,
<ST_MORPHO_R_35 0 &gpioa 2 0>,
<ST_MORPHO_R_37 0 &gpioa 3 0>;
};
};
``` | /content/code_sandbox/boards/st/nucleo_l152re/st_morpho_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,183 |
```cmake
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
``` | /content/code_sandbox/boards/st/nucleo_l152re/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 19 |
```unknown
config BOARD_NUCLEO_L152RE
select SOC_STM32L152XE
``` | /content/code_sandbox/boards/st/nucleo_l152re/Kconfig.nucleo_l152re | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 21 |
```yaml
board:
name: nucleo_l152re
vendor: st
socs:
- name: stm32l152xe
``` | /content/code_sandbox/boards/st/nucleo_l152re/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 31 |
```yaml
identifier: nucleo_l152re
name: ST Nucleo L152RE
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
ram: 80
flash: 512
supported:
- arduino_gpio
- arduino_i2c
- arduino_spi
- eeprom
- gpio
- spi
- i2c
- uart
- watchdog
- counter
- adc
- dac
- pwm
- dma
- nvs
- rtc
vendor: st
``` | /content/code_sandbox/boards/st/nucleo_l152re/nucleo_l152re.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 136 |
```restructuredtext
.. _nucleo_f446ze_board:
ST Nucleo F446ZE
################
Overview
********
The Nucleo F446ZE board features an ARM Cortex-M4 based STM32F446ZE MCU
with a wide range of connectivity support and configurations. Here are
some highlights of the Nucleo F446ZE board:
- STM32F446 microcontroller in QFP144 package
- Two types of extension resources:
- ST zio support for Arduino Uno V3 connectivity (A0 to A5, D0 to D15) and additional signals exposing a wide range of peripherals
- ST morpho extension pin headers for full access to all STM32 I/Os
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector
- USB re-enumeration capability. Three different interfaces supported on USB:
- Virtual Com port
- Mass storage (USB Disk drive) for drag'n'drop programming
- Debug port
- Flexible board power supply:
- USB VBUS or external source(3.3V, 5V, 7 - 12V)
- Power management access point
- USB OTG
- Three LEDs: USB communication (LD1), user LED (LD2), power LED (LD3)
- Two push-buttons: USER and RESET
.. image:: img/nucleo_f446ze.jpg
:align: center
:alt: Nucleo F446ZE
More information about the board can be found at the `Nucleo F446ZE website`_.
Hardware
********
Nucleo F446ZE provides the following hardware components:
- STM32F446ZET6 in LQFP144 package
- ARM |reg| 32-bit Cortex |reg|-M4 CPU with FPU
- Adaptive real-time accelerator (ART Accelerator)
- 180 MHz max CPU frequency
- VDD from 1.7 V to 3.6 V
- 512 KB Flash
- 128 KB SRAM
- 10 General purpose timers
- 2 Advanced control timers
- 2 basic timers
- SPI(4)
- I2C(4)
- USART(4)
- UART(2)
- USB OTG Full Speed and High Speed
- CAN(2)
- SAI(2)
- SPDIF_Rx(1)
- HDMI_CEC(1)
- Quad SPI(1)
- Camera Interface
- GPIO(50) with external interrupt capability
- 12-bit ADC(3) with 16 channels
- 12-bit DAC with 2 channels
More information about STM32F446ZE can be found here:
- `STM32F446ZE on www.st.com`_
- `STM32F446 reference manual`_
Supported Features
==================
The Zephyr nucleo_f446ze board configuration supports the following hardware features:
+-------------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+=============+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-------------+------------+-------------------------------------+
| UART | on-chip | serial port |
+-------------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-------------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-------------+------------+-------------------------------------+
| PWM | on-chip | pwm |
+-------------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-------------+------------+-------------------------------------+
| USB | on-chip | usb |
+-------------+------------+-------------------------------------+
| Backup SRAM | on-chip | Backup SRAM |
+-------------+------------+-------------------------------------+
| CAN 1/2 | on-chip | Controller Area Network |
+-------------+------------+-------------------------------------+
| ADC | on-chip | Analog Input |
+-------------+------------+-------------------------------------+
| DAC | on-chip | Analog Output |
+-------------+------------+-------------------------------------+
Other hardware features are not yet supported on this Zephyr port.
The default configuration can be found in
:zephyr_file:`boards/st/nucleo_f446ze/nucleo_f446ze_defconfig`
Connections and IOs
===================
Nucleo F446ZE Board has 8 GPIO controllers. These controllers are responsible for pin muxing,
input/output, pull-up, etc.
Available pins:
---------------
.. image:: img/nucleo_f446ze_zio_left_2019_8_29.jpg
:align: center
:alt: Nucleo F446ZE Zio/Arduino connectors (left)
.. image:: img/nucleo_f446ze_zio_right_2019_8_29.jpg
:align: center
:alt: Nucleo F446ZE Zio/Arduino connectors (right)
.. image:: img/nucleo_f446ze_morpho_left_2019_8_29.jpg
:align: center
:alt: Nucleo F446ZE Morpho connectors (left)
.. image:: img/nucleo_f446ze_morpho_right_2019_8_29.jpg
:align: center
:alt: Nucleo F446ZE Morpho connectors (right)
For more details please refer to `STM32 Nucleo-144 board User Manual`_.
Default Zephyr Peripheral Mapping:
----------------------------------
- UART_2_TX : PD5
- UART_2_RX : PD6
- UART_3_TX : PD8
- UART_3_RX : PD9
- USER_PB : PC13
- LD0 : PB0
- LD1 : PB7
- LD2 : PB14
- I2C1_SDA : PB9
- I2C1_SCL : PB8
- I2C2_SDA : PF0
- I2C2_SCL : PF1
- SPI1_CS : PD14
- SPI1_SCK : PA5
- SPI1_MISO : PA6
- SPI1_MOSI : PA7
- SPI2_NSS : PB12
- SPI2_SCK : PB13
- SPI2_MISO : PB14
- SPI2_MOSI : PB15
- CAN1_RX : PD0
- CAN1_TX : PD1
- USB_DP : PA11
- USB_DM : PA12
- ADC1_IN0 : PA0
- DAC_OUT1 : PA4
System Clock
------------
Nucleo F446ZE System Clock could be driven by an internal or external oscillator,
as well as the main PLL clock. By default, the System clock is driven by the PLL clock at 84MHz,
driven by an 8MHz high-speed external clock.
Serial Port
-----------
Nucleo F446ZE board has 2 UARTs and 4 USARTs. The Zephyr console output is assigned to USART3.
Default settings are 115200 8N1.
Backup SRAM
-----------
In order to test backup SRAM you may want to disconnect VBAT from VDD. You can
do it by removing ``SB156`` jumper on the back side of the board.
Controller Area Network
-----------------------
The TX/RX wires are connected with pins 25/27 of CN9 connector.
Programming and Debugging
*************************
Applications for the ``nucleo_f446ze`` board configuration can be built and
flashed in the usual way (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Flashing
========
Nucleo F446ZE board includes an ST-LINK/V2-1 embedded debug tool interface.
This interface is supported by the openocd version included in the Zephyr SDK.
Flashing an application to Nucleo F446ZE
----------------------------------------
Here is an example for the :ref:`hello_world` application.
Run a serial host program to connect with your Nucleo board.
.. code-block:: console
$ minicom -b 115200 -D /dev/ttyACM0
Build and flash the application:
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nucleo_f446ze
:goals: build flash
You should see the following message on the console:
.. code-block:: console
$ Hello World! arm
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nucleo_f446ze
:maybe-skip-config:
:goals: debug
.. _Nucleo F446ZE website:
path_to_url
.. _STM32 Nucleo-144 board User Manual:
path_to_url
.. _STM32F446ZE on www.st.com:
path_to_url
.. _STM32F446 reference manual:
path_to_url
``` | /content/code_sandbox/boards/st/nucleo_f446ze/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,958 |
```unknown
/*
*
*/
/ {
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpioa 0 0>, /* A0 */
<1 0 &gpioa 1 0>, /* A1 */
<2 0 &gpioa 4 0>, /* A2 */
<3 0 &gpiob 0 0>, /* A3 */
<4 0 &gpioc 1 0>, /* A4 */
<5 0 &gpioc 0 0>, /* A5 */
<6 0 &gpioa 3 0>, /* D0 */
<7 0 &gpioa 2 0>, /* D1 */
<8 0 &gpioa 10 0>, /* D2 */
<9 0 &gpiob 3 0>, /* D3 */
<10 0 &gpiob 5 0>, /* D4 */
<11 0 &gpiob 4 0>, /* D5 */
<12 0 &gpiob 10 0>, /* D6 */
<13 0 &gpioa 8 0>, /* D7 */
<14 0 &gpioa 9 0>, /* D8 */
<15 0 &gpioc 7 0>, /* D9 */
<16 0 &gpiob 6 0>, /* D10 */
<17 0 &gpioa 7 0>, /* D11 */
<18 0 &gpioa 6 0>, /* D12 */
<19 0 &gpioa 5 0>, /* D13 */
<20 0 &gpiob 9 0>, /* D14 */
<21 0 &gpiob 8 0>; /* D15 */
};
};
arduino_i2c: &i2c1 {};
arduino_serial: &usart2 {};
arduino_spi: &spi1 {};
``` | /content/code_sandbox/boards/st/nucleo_l152re/arduino_r3_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 500 |
```unknown
# Enable MPU
CONFIG_ARM_MPU=y
# Enable HW stack protection
CONFIG_HW_STACK_PROTECTION=y
# enable uart driver
CONFIG_SERIAL=y
# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# enable GPIO
CONFIG_GPIO=y
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/nucleo_l152re/nucleo_l152re_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 75 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/l1/stm32l152Xe.dtsi>
#include <st/l1/stm32l152retx-pinctrl.dtsi>
#include "arduino_r3_connector.dtsi"
#include "st_morpho_connector.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "STMicroelectronics STM32L152RE-NUCLEO board";
compatible = "st,stm32l152re-nucleo";
chosen {
zephyr,console = &usart2;
zephyr,shell-uart = &usart2;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
};
leds: leds {
compatible = "gpio-leds";
green_led_0: led_0 {
gpios = <&gpioa 5 GPIO_ACTIVE_LOW>;
label = "User LD2";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button {
label = "User";
gpios = <&gpioc 13 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_0>;
};
};
aliases {
led0 = &green_led_0;
sw0 = &user_button;
eeprom-0 = &eeprom;
watchdog0 = &iwdg;
die-temp0 = &die_temp;
volt-sensor0 = &vref;
};
};
&clk_lsi {
status = "okay";
};
&clk_hsi {
status = "okay";
};
&pll {
div = <2>;
mul = <4>;
clocks = <&clk_hsi>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(32)>;
ahb-prescaler = <1>;
apb1-prescaler = <1>;
apb2-prescaler = <1>;
};
&usart2 {
pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa3>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&i2c1 {
pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
pinctrl-names = "default";
status = "okay";
};
&spi1 {
pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pa7>;
pinctrl-names = "default";
cs-gpios = <&gpiob 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
status = "okay";
};
&spi2 {
pinctrl-0 = <&spi2_nss_pb12 &spi2_sck_pb13
&spi2_miso_pb14 &spi2_mosi_pb15>;
pinctrl-names = "default";
status = "okay";
};
&spi3 {
/* SPI3 on the ST Morpho Connector CN7 pins 17, 1, 2, 3*/
pinctrl-0 = <&spi3_nss_pa15 &spi3_sck_pc10
&spi3_miso_pc11 &spi3_mosi_pc12>;
pinctrl-names = "default";
status = "okay";
};
&eeprom {
status = "okay";
};
&iwdg {
status = "okay";
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>,
<&rcc STM32_SRC_LSI RTC_SEL(2)>;
status = "okay";
};
&adc1 {
pinctrl-0 = <&adc_in0_pa0>;
pinctrl-names = "default";
st,adc-clock-source = <ASYNC>;
st,adc-prescaler = <4>;
status = "okay";
};
&die_temp {
status = "okay";
};
&dac1 {
status = "okay";
pinctrl-0 = <&dac_out1_pa4>;
pinctrl-names = "default";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* Set 2KB of storage at the end of 512KB flash */
storage_partition: partition@7f800 {
label = "storage";
reg = <0x0007f800 DT_SIZE_K(2)>;
};
};
};
&timers3 {
status = "okay";
pwm3: pwm {
status = "okay";
pinctrl-0 = <&tim3_ch1_pa6>;
pinctrl-names = "default";
};
};
&dma1 {
status = "okay";
};
&vref {
status = "okay";
};
``` | /content/code_sandbox/boards/st/nucleo_l152re/nucleo_l152re.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,065 |
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