text stringlengths 9 39.2M | dir stringlengths 25 226 | lang stringclasses 163 values | created_date timestamp[s] | updated_date timestamp[s] | repo_name stringclasses 751 values | repo_full_name stringclasses 752 values | star int64 1.01k 183k | len_tokens int64 1 18.5M |
|---|---|---|---|---|---|---|---|---|
```ini
# TODO: Once official openOCD fix merged and available in zephyr:
# path_to_url#/c/5829/
# revert to board/st_nucleo_l1.cfg
# source [find board/st_nucleo_l1.cfg]
source [find interface/stlink.cfg]
transport select hla_swd
source [find target/stm32l1x_dual_bank.cfg]
reset_config srst_only
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
``` | /content/code_sandbox/boards/st/nucleo_l152re/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 147 |
```cmake
board_runner_args(jlink "--device=STM32L412RB" "--speed=4000")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/st/nucleo_l412rb_p/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 55 |
```restructuredtext
.. _nucleo_l152re_board:
ST Nucleo L152RE
################
Overview
********
The STM32 Nucleo-64 development board with STM32L152RE MCU, supports Arduino and ST morpho connectivity.
The STM32 Nucleo board provides an affordable, and flexible way for users to try out new concepts,
and build prototypes with the STM32 microcontroller, choosing from the various
combinations of performance, power consumption and features.
The Arduino Uno V3 connectivity support and the ST morpho headers allow easy functionality
expansion of the STM32 Nucleo open development platform with a wide choice of
specialized shields.
The STM32 Nucleo board integrates the ST-LINK/V2-1 debugger and programmer.
The STM32 Nucleo board comes with the STM32 comprehensive software HAL library together
with various packaged software examples.
.. image:: img/nucleo_l152re.jpg
:align: center
:alt: NUCLEO-L152RE
More information about the board can be found at the `Nucleo L152RE website`_.
Hardware
********
Nucleo L152RE provides the following hardware components:
- STM32 microcontroller in QFP64 package
- Two types of extension resources:
- Arduino Uno V3 connectivity
- ST morpho extension pin headers for full access to all STM32 I/Os
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector:
- Selection-mode switch to use the kit as a standalone ST-LINK/V2-1
- Flexible board power supply:
- USB VBUS or external source (3.3V, 5V, 7 - 12V)
- Power management access point
- Three LEDs:
- USB communication (LD1), user LED (LD2), power LED (LD3)
- Two push-buttons: B1 (USER/blue) and B2 (RESET/black)
- USB re-enumeration capability. Three different interfaces supported on USB:
- Virtual COM port
- Mass storage
- Debug port
More information about STM32L152RE can be found here:
- `STM32L152 reference manual`_
- `STM32L152 data sheet`_
Supported Features
==================
The Zephyr nucleo_l152re board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| CLOCK | on-chip | reset and clock control |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c controller |
+-----------+------------+-------------------------------------+
| EEPROM | on-chip | eeprom |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | independent watchdog |
+-----------+------------+-------------------------------------+
| FLASH | on-chip | flash memory |
+-----------+------------+-------------------------------------+
| COUNTER | on-chip | rtc |
+-----------+------------+-------------------------------------+
| ADC | on-chip | ADC Controller |
+-----------+------------+-------------------------------------+
| DAC | on-chip | DAC Controller |
+-----------+------------+-------------------------------------+
| PWM | on-chip | PWM |
+-----------+------------+-------------------------------------+
| DMA | on-chip | Direct Memory Access |
+-----------+------------+-------------------------------------+
| die-temp | on-chip | die temperature sensor |
+-----------+------------+-------------------------------------+
| RTC | on-chip | rtc |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported in this Zephyr port.
The default configuration can be found in
:zephyr_file:`boards/st/nucleo_l152re/nucleo_l152re_defconfig`
Connections and IOs
===================
Each of the GPIO pins can be configured by software as output (push-pull or open-drain), as
input (with or without pull-up or pull-down), or as peripheral alternate function. Most of the
GPIO pins are shared with digital or analog alternate functions. All GPIOs are high current
capable except for analog inputs.
Board connectors:
-----------------
.. image:: img/nucleo_l152re_connectors.jpg
:align: center
:alt: Nucleo L152RE connectors
Default Zephyr Peripheral Mapping:
----------------------------------
- UART_2 TX/RX : PA2/PA3 (ST-Link Virtual COM Port)
- I2C1 SCL/SDA : PB8/PB9 (Arduino I2C)
- B1 (USER/blue) : PC13
- LD1 : PA5
- DAC : PA4
- PWM_3_CH1 : PA6
For more details please refer to `STM32 Nucleo-64 board User Manual`_.
Programming and Debugging
*************************
Applications for the ``nucleo_l152re`` board configuration can be built and
flashed in the usual way (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Flashing
========
Nucleo L152RE board includes an ST-LINK/V2-1 embedded debug tool interface.
This interface is supported by the openocd version included in the Zephyr SDK.
Flashing an application to Nucleo L152RE
----------------------------------------
Here is an example for the :zephyr:code-sample:`blinky` application.
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: nucleo_l152re
:goals: build flash
You will see the LED blinking every second.
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nucleo_l152re
:maybe-skip-config:
:goals: debug
References
**********
.. target-notes::
.. _Nucleo L152RE website:
path_to_url
.. _STM32L152 reference manual:
path_to_url
.. _STM32L152 data sheet:
path_to_url
.. _STM32 Nucleo-64 board User Manual:
path_to_url
``` | /content/code_sandbox/boards/st/nucleo_l152re/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,468 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/l4/stm32l412XB.dtsi>
#include <st/l4/stm32l412rbtx-pinctrl.dtsi>
#include "arduino_r3_connector.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "STMicroelectronics STM32L412RB-P-NUCLEO board";
compatible = "st,stm32l412rb-p-nucleo";
chosen {
zephyr,console = &lpuart1;
zephyr,shell-uart = &lpuart1;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
};
leds: leds {
compatible = "gpio-leds";
green_led: led_0 {
gpios = <&gpiob 13 GPIO_ACTIVE_HIGH>;
label = "User LD4";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button {
label = "User";
gpios = <&gpioc 13 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_0>;
};
};
aliases {
led0 = &green_led;
sw0 = &user_button;
volt-sensor0 = &vref;
volt-sensor1 = &vbat;
};
};
&clk_lsi {
status = "okay";
};
&clk_hsi {
status = "okay";
};
&pll {
div-m = <1>;
mul-n = <10>;
div-q = <2>;
div-r = <2>;
clocks = <&clk_hsi>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(80)>;
ahb-prescaler = <1>;
apb1-prescaler = <1>;
apb2-prescaler = <1>;
};
&lpuart1 {
pinctrl-0 = <&lpuart1_tx_pa2 &lpuart1_rx_pa3>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&usart1 {
pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
pinctrl-names = "default";
current-speed = <115200>;
};
&spi2 {
pinctrl-0 = <&spi2_sck_pb13 &spi2_miso_pb14 &spi2_mosi_pb15>;
pinctrl-names = "default";
cs-gpios = <&gpioa 11 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
status = "okay";
};
&i2c1 {
pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb7>;
pinctrl-names = "default";
clock-frequency = <I2C_BITRATE_FAST>;
status = "okay";
};
&timers2 {
status = "okay";
pwm2: pwm {
status = "okay";
pinctrl-0 = <&tim2_ch1_pa0>;
pinctrl-names = "default";
};
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>,
<&rcc STM32_SRC_LSI RTC_SEL(2)>;
status = "okay";
};
&adc1 {
pinctrl-0 = <&adc1_in5_pa0>;
pinctrl-names = "default";
st,adc-clock-source = <SYNC>;
st,adc-prescaler = <4>;
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/*
* Reserve the final 16 KiB for file system partition
* 128 KiB --> 131702 bytes
* 16 KiB --> 16384 bytes
* Start Addr = 131702 - 16384 --> (HEX) 0x0001c276
* Size = 16384 --> (HEX) 0x00004000
*/
storage_partition: partition@1c276 {
label = "storage";
reg = <0x0001c276 DT_SIZE_K(16)>;
};
};
};
&vref {
status = "okay";
};
&vbat {
status = "okay";
};
``` | /content/code_sandbox/boards/st/nucleo_l412rb_p/nucleo_l412rb_p.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 976 |
```unknown
config BOARD_NUCLEO_L412RB_P
select SOC_STM32L412XX
``` | /content/code_sandbox/boards/st/nucleo_l412rb_p/Kconfig.nucleo_l412rb_p | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 22 |
```yaml
board:
name: nucleo_l412rb_p
vendor: st
socs:
- name: stm32l412xx
``` | /content/code_sandbox/boards/st/nucleo_l412rb_p/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```unknown
# Enable MPU
CONFIG_ARM_MPU=y
# Enable HW stack protection
CONFIG_HW_STACK_PROTECTION=y
# enable uart driver
CONFIG_SERIAL=y
# console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# enable GPIO
CONFIG_GPIO=y
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/nucleo_l412rb_p/nucleo_l412rb_p_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 74 |
```unknown
# STM32L412RB Nucleo board configuration
if BOARD_NUCLEO_L412RB_P
config SPI_STM32_INTERRUPT
default y
depends on SPI
endif # BOARD_NUCLEO_L412RB_P
``` | /content/code_sandbox/boards/st/nucleo_l412rb_p/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 51 |
```unknown
/*
*
*/
/ {
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpioa 0 0>, /* A0 */
<1 0 &gpioa 1 0>, /* A1 */
<2 0 &gpioc 3 0>, /* A2 */
<3 0 &gpioc 2 0>, /* A3 */
<4 0 &gpioc 1 0>, /* A4 */
<5 0 &gpioc 0 0>, /* A5 */
<6 0 &gpioa 3 0>, /* D0 */
<7 0 &gpioa 2 0>, /* D1 */
<8 0 &gpioa 12 0>, /* D2 */
<9 0 &gpiob 3 0>, /* D3 */
<10 0 &gpiob 5 0>, /* D4 */
<11 0 &gpioa 15 0>, /* D5 */
<12 0 &gpiob 10 0>, /* D6 */
<13 0 &gpioc 7 0>, /* D7 */
<14 0 &gpiob 6 0>, /* D8 */
<15 0 &gpioa 8 0>, /* D9 */
<16 0 &gpioa 11 0>, /* D10 */
<17 0 &gpiob 15 0>, /* D11 */
<18 0 &gpiob 14 0>, /* D12 */
<19 0 &gpiob 13 0>, /* D13 */
<20 0 &gpiob 7 0>, /* D14 */
<21 0 &gpiob 8 0>; /* D15 */
};
};
arduino_i2c: &i2c1 {};
arduino_spi: &spi2 {};
``` | /content/code_sandbox/boards/st/nucleo_l412rb_p/arduino_r3_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 495 |
```yaml
identifier: nucleo_l412rb_p
name: ST Nucleo L412RP-P
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 40
flash: 64
supported:
- nvs
- pwm
- counter
- spi
- i2c
- adc
- arduino_gpio
- arduino_i2c
- arduino_spi
vendor: st
``` | /content/code_sandbox/boards/st/nucleo_l412rb_p/nucleo_l412rb_p.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 114 |
```ini
source [find interface/stlink.cfg]
transport select hla_swd
source [find target/stm32l4x.cfg]
reset_config srst_only
``` | /content/code_sandbox/boards/st/nucleo_l412rb_p/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 34 |
```unknown
config BOARD_STM32C0116_DK
select SOC_STM32C011XX
``` | /content/code_sandbox/boards/st/stm32c0116_dk/Kconfig.stm32c0116_dk | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 22 |
```cmake
board_runner_args(jlink "--device=STM32C011F6" "--speed=4000")
board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake)
``` | /content/code_sandbox/boards/st/stm32c0116_dk/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 84 |
```unknown
# Serial Drivers
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# GPIO Controller
CONFIG_GPIO=y
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/stm32c0116_dk/stm32c0116_dk_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 58 |
```yaml
identifier: stm32c0116_dk
name: STM32C0116 DK
type: mcu
arch: arm
toolchain:
- zephyr
supported:
- gpio
- counter
- watchdog
- pwm
- adc
- dma
ram: 6
flash: 32
vendor: st
``` | /content/code_sandbox/boards/st/stm32c0116_dk/stm32c0116_dk.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 79 |
```yaml
board:
name: stm32c0116_dk
vendor: st
socs:
- name: stm32c011xx
``` | /content/code_sandbox/boards/st/stm32c0116_dk/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 33 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/c0/stm32c011X6.dtsi>
#include <st/c0/stm32c011f(4-6)ux-pinctrl.dtsi>
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "STMicroelectronics STM32C0116-DK Discovery board";
compatible = "st,stm32c011f6-dk";
chosen {
zephyr,console = &usart1;
zephyr,shell-uart = &usart1;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
};
leds: leds {
compatible = "gpio-leds";
green_led_3: led_3 {
gpios = <&gpiob 6 GPIO_ACTIVE_LOW>;
label = "User LD3";
};
};
pwmleds {
compatible = "pwm-leds";
green_pwm_led: green_pwm_led {
pwms = <&pwm1 1 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
};
};
gpio_keys {
compatible = "gpio-keys";
reset_button: button {
label = "reset button";
gpios = <&gpiof 2 GPIO_ACTIVE_LOW>;
status = "okay";
zephyr,code = <INPUT_KEY_0>;
};
};
adc-keys {
compatible = "adc-keys";
io-channels = <&adc1 8>;
keyup-threshold-mv = <3300>;
select_key {
press-thresholds-mv = <0>;
zephyr,code = <INPUT_KEY_ENTER>;
};
left_key {
press-thresholds-mv = <670>;
zephyr,code = <INPUT_KEY_LEFT>;
};
down_key {
press-thresholds-mv = <1320>;
zephyr,code = <INPUT_KEY_DOWN>;
};
up_key {
press-thresholds-mv = <2010>;
zephyr,code = <INPUT_KEY_UP>;
};
right_key {
press-thresholds-mv = <2650>;
zephyr,code = <INPUT_KEY_RIGHT>;
};
};
aliases {
led0 = &green_led_3;
pwm-led0 = &green_pwm_led;
sw0 = &reset_button;
watchdog0 = &iwdg;
die-temp0 = &die_temp;
volt-sensor0 = &vref;
};
};
&clk_hsi {
status = "okay";
};
&rcc {
clocks = <&clk_hsi>;
clock-frequency = <DT_FREQ_M(48)>;
ahb-prescaler = <1>;
apb1-prescaler = <1>;
};
&pinctrl {
remap-pa11;
remap-pa12;
};
&usart1 {
pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&usart2 {
pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa3>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000400>,
<&rcc STM32_SRC_LSE RTC_SEL(1)>;
status = "okay";
};
&iwdg {
status = "okay";
};
&timers1 {
st,prescaler = <10000>;
status = "okay";
pwm1: pwm {
pinctrl-0 = <&tim1_ch3_pb6>;
pinctrl-names = "default";
status = "okay";
};
};
&adc1 {
pinctrl-0 = <&adc1_in8_pa8>;
pinctrl-names = "default";
st,adc-clock-source = <SYNC>;
st,adc-prescaler = <2>;
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
channel@8 {
reg = <0x8>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_INTERNAL";
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
zephyr,resolution = <12>;
zephyr,vref-mv = <3300>;
};
};
&die_temp {
status = "okay";
};
&vref {
status = "okay";
};
&dma1 {
status = "okay";
};
&dmamux1 {
status = "okay";
};
``` | /content/code_sandbox/boards/st/stm32c0116_dk/stm32c0116_dk.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,057 |
```restructuredtext
.. _nucleo_l412rb_p_board:
ST Nucleo L412RB-P
##################
Overview
********
The Nucleo L412RB board features an ARM Cortex-M4 based STM32L412RB MCU
with a wide range of connectivity support and configurations. Here are
some highlights of the Nucleo L412RB board:
- STM32 microcontroller in LQFP64 package
- 1 user LED shared with ARDUINO |reg|
- 1 user and 1 reset push-buttons
- 32.768 kHz crystal oscillator
- Two types of extension resources:
- Arduino Uno V3 connectivity
- ST morpho extension pin headers for full access to all STM32 I/Os
- On-board ST-LINK debugger/programmer with USB re-enumeration capability: mass storage, Virtual COM port and debug port
- Flexible power-supply options: ST-LINK, USB VBUS, or external sources
- USB VBUS or external source(3.3V, 5V, 7 - 12V)
- Power management access point
- Board specific features
- External SMPS to generate Vcore logic supply
- 24 MHz HSE
- Board connectors:
- External SMPS experimentation dedicated connector
- Micro-AB or Mini-AB USB connector for the ST-LINK
- MIPI debug connector
- Arm Mbed Enabled |trade| compliant
.. image:: img/nucleo_l412rb_p.jpg
:align: center
:alt: Nucleo L412RB
More information about the board can be found at the `Nucleo L412RB-P website`_.
Hardware
********
Nucleo L412RB-P provides the following hardware components:
- STM32L412RBT6 in LQFP64 package
- Ultra-low-power with FlexPowerControl
- 1.71 V to 3.6 V power supply
- -40 C to 85/125 C temperature range
- 300 nA in VBAT mode: supply for RTC and 32x32-bit backup registers
- 16 nA Shutdown mode (4 wakeup pins)
- 32 nA Standby mode (4 wakeup pins)
- 245 nA Standby mode with RTC
- 0.7 |micro| A Stop 2 mode, 0.95 |micro| A with RTC
- 79 |micro| A/MHz run mode (LDO Mode)
- 28 |micro| A/MHz run mode (@3.3 V SMPS Mode)
- Batch acquisition mode (BAM)
- 4 |micro| s wakeup from Stop mode
- Brown out reset (BOR)
- Interconnect matrix
- Core: Arm |reg| 32-bit Cortex |reg| -M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator |trade| ) allowing 0-wait-state execution from Flash memory, frequency up to 80 MHz, MPU, 100DMIPS and DSP instructions
- Performance benchmark
- 1.25 DMIPS/MHz (Drystone 2.1)
- 273.55 CoreMark |reg| (3.42 CoreMark/MHz @ 80 MHz)
- Energy benchmark
- 442 ULPMark-CP
- 165 ULPMark-PP
- Clock Sources:
- 4 to 48 MHz crystal oscillator
- 32 kHz crystal oscillator for RTC (LSE)
- Internal 16 MHz factory-trimmed RC ( |plusminus| 1%)
- Internal low-power 32 kHz RC ( |plusminus| 5%)
- Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by LSE (better than |plusminus| 0.25 % accuracy)
- Internal 48 MHz with clock recovery
- PLL for system clock
- Up to 52 fast I/Os, most 5 V-tolerant
- RTC with HW calendar, alarms and calibration
- Up to 12 capacitive sensing channels: support touchkey, linear and rotary touch sensors
- 10x timers:
- 1x 16-bit advanced motor-control
- 1x 32-bit and 2x 16-bit general purpose
- 1x 16-bit basic
- 2x low-power 16-bit timers (available in Stop mode)
- 2x watchdogs
- SysTick timer
- Memories
- 128 KB single bank Flash, proprietary code readout protection
- 40 KB of SRAM including 8 KB with hardware parity check
- Quad SPI memory interface with XIP capability
- Rich analog peripherals (independent supply)
- 2x 12-bit ADC 5 Msps, up to 16-bit with hardware oversampling, 200 |micro| A/Msps
- 2x operational amplifiers with built-in PGA
- 1x ultra-low-power comparator
- Accurate 2.5 V or 2.048 V reference voltage buffered output
- 12x communication interfaces
- USB 2.0 full-speed crystal less solution with LPM and BCD
- 3x I2C FM+(1 Mbit/s), SMBus/PMBus
- 3x USARTs (ISO 7816, LIN, IrDA, modem)
- 1x LPUART (Stop 2 wake-up)
- 2x SPIs (and 1x Quad SPI)
- IRTIM (Infrared interface)
- 14-channel DMA controller
- True random number generator
- CRC calculation unit, 96-bit unique ID
- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell |trade|
- All packages are ECOPACK2 compliant
Note: the current board revision is C. (MB1319C)
More information about STM32L412RB can be found here:
- `STM32L412RB on www.st.com`_
- `STM32L412 reference manual`_
Supported Features
==================
The Zephyr ``nucleo_l412rb_p`` board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| ADC | on-chip | ADC Controller |
+-----------+------------+-------------------------------------+
| PWM | on-chip | pwm |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported on this Zephyr port.
The default configuration can be found in the defconfig file:
:zephyr_file:`boards/st/nucleo_l412rb_p/nucleo_l412rb_p_defconfig`
Connections and IOs
===================
Nucleo L412RB-P Board has 5 GPIO controllers (Ports A, B, C, D and H). These controllers are responsible for pin muxing,
input/output, pull-up, etc.
Available pins:
---------------
.. image:: img/nucleo_l412rb_p_pinout.jpg
:align: center
:alt: Nucleo L412RB-P
For more details please refer to `ST Nucleo L412RB-P User Manual`_.
Default Zephyr Peripheral Mapping:
----------------------------------
- LPUART1 TX/RX : PA2/PA3
- I2C1 SCL/SDA : PB8/PB7 (Arduino I2C)
- SPI2 CS/SCK/MISO/MOSI : PA11/PB13/PB14/PB15 (Arduino SPI)
- UART1 TX/RX : PA9/PA10
- PWM_2_CH1 : PA0
- USER_PB : PC13
- LD4 : PB13
Note: SPI2 CS pin (PB12) is not located on the Arduino connector.
System Clock
------------
Nucleo L412RB-P System Clock could be driven by internal or external oscillator,
as well as main PLL clock. By default System clock is driven by PLL clock at 80MHz,
driven by 16MHz high speed internal oscillator.
Serial Port
-----------
Nucleo L412RB-P board has 3 U(S)ARTs and 1 LPUART. The Zephyr console output is assigned to LPUART1.
Default settings are 115200 8N1.
Programming and Debugging
*************************
Applications for the ``nucleo_l412rb_p`` board configuration can be built and
flashed in the usual way (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Flashing
========
Nucleo L412RB-P board includes an ST-LINK/V2-1 embedded debug tool
interface. This interface is supported by the openocd version
included in the Zephyr SDK since v0.9.2.
Flashing an application to Nucleo L412RB-P
------------------------------------------
Connect the Nucleo L412RB-P to your host computer using the USB port,
then run a serial host program to connect with your Nucleo board.
.. code-block:: console
$ minicom -D /dev/ttyACM0
Now build and flash an application. Here is an example for
:ref:`hello_world`.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nucleo_l412rb_p
:goals: build flash
You should see the following message on the console:
.. code-block:: console
$ Hello World! nucleo_l412rb_p
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nucleo_l412rb_p
:maybe-skip-config:
:goals: debug
.. _Nucleo L412RB-P website:
path_to_url
.. _ST Nucleo L412RB-P User Manual:
path_to_url
.. _STM32L412RB on www.st.com:
path_to_url
.. _STM32L412 reference manual:
path_to_url
``` | /content/code_sandbox/boards/st/nucleo_l412rb_p/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,343 |
```unknown
/*
*
*/
/dts-v1/;
#include "nucleo_l552ze_q-common.dtsi"
/ {
model = "STMicroelectronics STM32L552ZE-NUCLEO-Q board";
compatible = "st,stm32l552ze-nucleo-q";
#address-cells = <1>;
#size-cells = <1>;
chosen {
zephyr,console = &lpuart1;
zephyr,shell-uart = &lpuart1;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
};
aliases {
led0 = &blue_led_1;
sw0 = &user_button;
};
};
``` | /content/code_sandbox/boards/st/nucleo_l552ze_q/nucleo_l552ze_q.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 158 |
```cmake
if(CONFIG_BUILD_WITH_TFM)
set(FLASH_BASE_ADDRESS_S 0x0C000000)
# Flash merged TF-M + Zephyr binary
set_property(TARGET runners_yaml_props_target PROPERTY hex_file tfm_merged.hex)
if (CONFIG_HAS_FLASH_LOAD_OFFSET)
MATH(EXPR TFM_HEX_BASE_ADDRESS_NS "${FLASH_BASE_ADDRESS_S}+${CONFIG_FLASH_LOAD_OFFSET}")
else()
set(TFM_HEX_BASE_ADDRESS_NS ${TFM_FLASH_BASE_ADDRESS_S})
endif()
endif()
set_ifndef(BOARD_DEBUG_RUNNER pyocd)
set_ifndef(BOARD_FLASH_RUNNER pyocd)
board_runner_args(pyocd "--target=stm32l552zetxq")
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
``` | /content/code_sandbox/boards/st/nucleo_l552ze_q/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 183 |
```unknown
# enable uart driver
CONFIG_SERIAL=y
# enable GPIO
CONFIG_GPIO=y
# Enable clock
CONFIG_CLOCK_CONTROL=y
# console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# Enable MPU
CONFIG_ARM_MPU=y
# Enable HW stack protection
CONFIG_HW_STACK_PROTECTION=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/nucleo_l552ze_q/nucleo_l552ze_q_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 73 |
```restructuredtext
.. _stm32c0116_dk_board:
ST STM32C0116-DK Discovery Kit
##############################
Overview
********
The STM32C0116-DK Discovery kit helps to discover features of the STM32C0 Series
microcontroller in a UFQFPN20 package. This Discovery kit features one UFQFPN20
to DIL20 module designed with the STM32C011F6 microcontroller and allows the user to develop
and share applications. It includes an on-board ST-LINK/V2-1 to debug and program the embedded
STM32 microcontroller. Important board features include:
.. image:: img/stm32c0116_dk.jpg
:align: center
:alt: STM32C0116-DK
More information about the board can be found at the `STM32C0116-DK website`_.
Hardware
********
The STM32C0116-DK Discovery kit provides the following hardware components:
- STM32C011F6 microcontroller with 32 Kbytes of Flash memory and 6 Kbytes of RAM, in a UFQFPN20 package
- On-board ST-LINK/V2-1 debugger/programmer with USB re-enumeration capability: mass storage and debug port
- User LED
- Reset push-button
- 5 way joystick using a single ADC input pin
- Individual STM32 UFQFPN20 to DIL20 module
- Board connectors:
- USB Micro-B
- DIL20 socket
- Dedicated LCD footprint
- Grove (UART)
- 2 x 10 pin headers for MCU daughterboard
- Extension connectors
More information about STM32C011F6 can be found here:
- `STM32C011F6 on www.st.com`_
- `STM32C0x1 reference manual`_
Supported Features
==================
The Zephyr stm32c0116_dk board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| CLOCK | on-chip | reset and clock control |
+-----------+------------+-------------------------------------+
| RTC | on-chip | counter |
+-----------+------------+-------------------------------------+
| IWDG | on-chip | independent watchdog |
+-----------+------------+-------------------------------------+
| WWDG | on-chip | window watchdog |
+-----------+------------+-------------------------------------+
| PWM | on-chip | pwm |
+-----------+------------+-------------------------------------+
| ADC | on-chip | ADC Controller |
+-----------+------------+-------------------------------------+
| die-temp | on-chip | die temperature sensor |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| DMA | on-chip | Direct Memory Access |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported on Zephyr porting.
The default configuration can be found in
:zephyr_file:`boards/st/stm32c0116_dk/stm32c0116_dk_defconfig`
Pin Mapping
===========
STM32C0116-DK Discovery kit has 4 GPIO controllers. These controllers are responsible for pin muxing,
input/output, pull-up, etc.
For more details please refer to `STM32C0116-DK board User Manual`_.
Default Zephyr Peripheral Mapping:
----------------------------------
The STM32C0116 Discovery board is configured as follows:
- UART_2 TX/RX : PA2/PA3
- UART_1 TX/RX : PA9/PA10 (ST-Link Virtual Port Com)
- PWM_1_CH3 : PB6
- ADC1_CH8 : PA8
- LD3 : PB6
Programming and Debugging
*************************
Applications for the ``stm32c0116_dk`` board configuration can be built and
flashed in the usual way (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Flashing
========
STM32C0116-DK Discovery kit includes an ST-LINK/V2 embedded debug tool interface.
Flashing an application to STM32C0116-DK
-------------------------------------------
First, connect the STM32C0116 Discovery kit to your host computer using
the USB port to prepare it for flashing. Then build and flash your application.
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: stm32c0116_dk
:goals: build flash
Run a serial host program to connect with your board:
.. code-block:: console
$ minicom -D /dev/ttyACM0
You should see the following message on the console:
.. code-block:: console
Hello World! arm
.. _STM32C0116-DK website:
path_to_url
.. _STM32C0116-DK board User Manual:
path_to_url
.. _STM32C011F6 on www.st.com:
path_to_url
.. _STM32C0x1 reference manual:
path_to_url
``` | /content/code_sandbox/boards/st/stm32c0116_dk/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,229 |
```unknown
config BOARD_NUCLEO_L552ZE_Q
select SOC_STM32L552XX
``` | /content/code_sandbox/boards/st/nucleo_l552ze_q/Kconfig.nucleo_l552ze_q | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 22 |
```yaml
board:
name: nucleo_l552ze_q
vendor: st
socs:
- name: stm32l552xx
variants:
- name: ns
``` | /content/code_sandbox/boards/st/nucleo_l552ze_q/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 41 |
```yaml
identifier: nucleo_l552ze_q/stm32l552xx/ns
name: ST Nucleo L552ZE Q non secure
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
supported:
- gpio
- dac
ram: 192
flash: 36
vendor: st
``` | /content/code_sandbox/boards/st/nucleo_l552ze_q/nucleo_l552ze_q_stm32l552xx_ns.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 79 |
```unknown
/*
*
*/
/dts-v1/;
#include "nucleo_l552ze_q-common.dtsi"
/ {
model = "STMicroelectronics STM32L552ZE-NUCLEO-Q board";
compatible = "st,stm32l552ze-nucleo-q";
#address-cells = <1>;
#size-cells = <1>;
chosen {
zephyr,console = &lpuart1;
zephyr,shell-uart = &lpuart1;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_ns_partition;
};
aliases {
led0 = &blue_led_1;
sw0 = &user_button;
};
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/*
* Following flash partition is compatible with requirements
* given in TFM configuration given for current board:
* multiple image boot, no tests.
* It might require adjustment depending on evolutions on TFM.
*/
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 DT_SIZE_K(80)>;
read-only;
};
/* Secure image primary slot */
slot0_partition: partition@14000 {
label = "image-0";
reg = <0x00014000 DT_SIZE_K(180)>;
};
/* Non-secure image primary slot */
slot0_ns_partition: partition@41000 {
label = "image-0-nonsecure";
reg = <0x00041000 DT_SIZE_K(36)>;
};
/* Secure image secondary slot */
slot1_partition: partition@4a000 {
label = "image-1";
reg = <0x0004a000 DT_SIZE_K(180)>;
};
/* Non-secure image secondary slot */
slot1_ns_partition: partition@77000 {
label = "image-1-nonsecure";
reg = <0x00077000 DT_SIZE_K(36)>;
};
/* Applicative Non Volatile Storage */
/* Not available in this config, use secure storage */
};
};
``` | /content/code_sandbox/boards/st/nucleo_l552ze_q/nucleo_l552ze_q_stm32l552xx_ns.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 517 |
```yaml
identifier: nucleo_l552ze_q
name: ST Nucleo L552ZE Q
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
supported:
- gpio
- dac
- adc
- dma
- usart
- spi
ram: 192
flash: 512
vendor: st
``` | /content/code_sandbox/boards/st/nucleo_l552ze_q/nucleo_l552ze_q.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 87 |
```unknown
/*
*
*/
/ {
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpioa 3 0>, /* A0 */
<1 0 &gpioa 2 0>, /* A1 */
<2 0 &gpioc 3 0>, /* A2 */
<3 0 &gpiob 0 0>, /* A3 */
<4 0 &gpioc 1 0>, /* A4 */
<5 0 &gpioc 0 0>, /* A5 */
<6 0 &gpiod 9 0>, /* D0 */
<7 0 &gpiod 8 0>, /* D1 */
<8 0 &gpiof 15 0>, /* D2 */
<9 0 &gpioe 13 0>, /* D3 */
<10 0 &gpiof 14 0>, /* D4 */
<11 0 &gpioe 11 0>, /* D5 */
<12 0 &gpioe 9 0>, /* D6 */
<13 0 &gpiof 13 0>, /* D7 */
<14 0 &gpiof 12 0>, /* D8 */
<15 0 &gpiod 15 0>, /* D9 */
<16 0 &gpiod 14 0>, /* D10 */
<17 0 &gpioa 7 0>, /* D11 */
<18 0 &gpioa 6 0>, /* D12 */
<19 0 &gpioa 5 0>, /* D13 */
<20 0 &gpiob 9 0>, /* D14 */
<21 0 &gpiob 8 0>; /* D15 */
};
};
``` | /content/code_sandbox/boards/st/nucleo_l552ze_q/arduino_r3_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 473 |
```unknown
# enable uart driver
CONFIG_SERIAL=y
# enable GPIO
CONFIG_GPIO=y
# Enable clock
CONFIG_CLOCK_CONTROL=y
# console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# Enable MPU
CONFIG_ARM_MPU=y
CONFIG_ARM_TRUSTZONE_M=y
CONFIG_RUNTIME_NMI=y
CONFIG_TRUSTED_EXECUTION_NONSECURE=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/nucleo_l552ze_q/nucleo_l552ze_q_stm32l552xx_ns_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 85 |
```unknown
/*
*
*/
#include <st/l5/stm32l552Xe.dtsi>
#include <st/l5/stm32l552z(c-e)txq-pinctrl.dtsi>
#include "arduino_r3_connector.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
leds: leds {
compatible = "gpio-leds";
green_led_1: led_1 {
gpios = <&gpioc 7 GPIO_ACTIVE_HIGH>;
label = "User LD1";
};
blue_led_1: led_2 {
gpios = <&gpiob 7 GPIO_ACTIVE_HIGH>;
label = "User LD2";
};
red_led_1: led_3 {
gpios = <&gpioa 9 GPIO_ACTIVE_HIGH>;
label = "User LD3";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button {
label = "User";
gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>;
zephyr,code = <INPUT_KEY_0>;
};
};
aliases {
die-temp0 = &die_temp;
volt-sensor0 = &vref;
volt-sensor1 = &vbat;
};
};
&clk_hsi48 {
status = "okay";
};
&clk_msi {
status = "okay";
msi-range = <6>;
};
&pll {
div-m = <1>;
mul-n = <55>;
div-p = <7>;
div-q = <2>;
div-r = <2>;
clocks = <&clk_msi>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(110)>;
ahb-prescaler = <1>;
apb1-prescaler = <1>;
apb2-prescaler = <1>;
};
&rng {
status = "okay";
};
&dac1 {
status = "okay";
pinctrl-0 = <&dac1_out1_pa4>;
pinctrl-names = "default";
};
&adc1 {
pinctrl-0 = <&adc1_in1_pc0>;
pinctrl-names = "default";
st,adc-clock-source = <SYNC>;
st,adc-prescaler = <4>;
status = "okay";
};
&die_temp {
status = "okay";
};
&lpuart1 {
pinctrl-0 = <&lpuart1_tx_pg7 &lpuart1_rx_pg8>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&usart3 {
pinctrl-0 = <&usart3_tx_pd8 &usart3_rx_pd9>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&spi1 {
pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pa5
&spi1_miso_pa6 &spi1_mosi_pa7>;
pinctrl-names = "default";
status = "okay";
};
&vref {
status = "okay";
};
&vbat {
status = "okay";
};
``` | /content/code_sandbox/boards/st/nucleo_l552ze_q/nucleo_l552ze_q-common.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 698 |
```ini
source [find interface/stlink.cfg]
transport select hla_swd
source [find target/stm32l5x.cfg]
# use hardware reset
reset_config srst_only srst_nogate
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
``` | /content/code_sandbox/boards/st/nucleo_l552ze_q/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 101 |
```cmake
board_runner_args(pyocd "--target=stm32wb55rgvx")
board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake)
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
``` | /content/code_sandbox/boards/st/nucleo_wb55rg/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 96 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/wb/stm32wb55Xg.dtsi>
#include <st/wb/stm32wb55rgvx-pinctrl.dtsi>
#include "arduino_r3_connector.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "STMicroelectronics STM32WB55RG-NUCLEO board";
compatible = "st,stm32wb55rg-nucleo";
chosen {
zephyr,console = &usart1;
zephyr,shell-uart = &usart1;
zephyr,bt-mon-uart = &lpuart1;
zephyr,bt-c2h-uart = &lpuart1;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
};
leds: leds {
compatible = "gpio-leds";
blue_led_1: led_0 {
gpios = <&gpiob 5 GPIO_ACTIVE_HIGH>;
label = "User LED1";
};
green_led_2: led_1 {
gpios = <&gpiob 0 GPIO_ACTIVE_HIGH>;
label = "User LED2";
};
red_led_3: led_2 {
gpios = <&gpiob 1 GPIO_ACTIVE_HIGH>;
label = "User LED3";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button_1: button_0 {
label = "SW1";
gpios = <&gpioc 4 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
zephyr,code = <INPUT_KEY_0>;
};
user_button_2: button_1 {
label = "SW2";
gpios = <&gpiod 0 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
zephyr,code = <INPUT_KEY_1>;
};
user_button_3: button_2 {
label = "SW3";
gpios = <&gpiod 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
zephyr,code = <INPUT_KEY_2>;
};
};
aliases {
led0 = &blue_led_1;
led1 = &green_led_2;
led2 = &red_led_3;
sw0 = &user_button_1;
sw1 = &user_button_2;
sw2 = &user_button_3;
watchdog0 = &iwdg;
die-temp0 = &die_temp;
volt-sensor0 = &vref;
volt-sensor1 = &vbat;
mcuboot-led0 = &blue_led_1;
mcuboot-button0 = &user_button_1;
};
};
&die_temp {
status = "okay";
};
&clk_lsi1 {
status = "okay";
};
&clk_hse {
status = "okay";
};
&clk_lse {
status = "okay";
};
&clk_hsi48 {
status = "okay";
};
&clk48 {
/* Node is disabled by default as default source is HSI48 */
/* To select another clock, enable the node */
clocks = <&rcc STM32_SRC_HSI48 CLK48_SEL(0)>;
};
&rcc {
clocks = <&clk_hse>;
clock-frequency = <DT_FREQ_M(32)>;
cpu1-prescaler = <1>;
cpu2-prescaler = <1>;
ahb4-prescaler = <1>;
apb1-prescaler = <1>;
apb2-prescaler = <1>;
};
&usart1 {
pinctrl-0 = <&usart1_tx_pb6 &usart1_rx_pb7>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&i2c1 {
pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
&i2c3 {
pinctrl-0 = <&i2c3_scl_pc0 &i2c3_sda_pc1>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000400>,
<&rcc STM32_SRC_LSI RTC_SEL(2)>;
status = "okay";
backup_regs {
status = "okay";
};
};
&spi1 {
pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pa5
&spi1_miso_pa6 &spi1_mosi_pa7>;
pinctrl-names = "default";
status = "okay";
};
&timers1 {
st,prescaler = <10000>;
status = "okay";
pwm1: pwm {
status = "okay";
pinctrl-0 = <&tim1_ch1_pa8>;
pinctrl-names = "default";
};
};
&timers2 {
status = "okay";
pwm2: pwm {
status = "okay";
pinctrl-0 = <&tim2_ch1_pa15>;
pinctrl-names = "default";
};
};
&lpuart1 {
pinctrl-0 = <&lpuart1_tx_pc1 &lpuart1_rx_pc0
&lpuart1_cts_pa6 &lpuart1_rts_pb12>;
hw-flow-control;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&adc1 {
pinctrl-0 = <&adc1_in3_pc2>;
pinctrl-names = "default";
st,adc-clock-source = <SYNC>;
st,adc-prescaler = <4>;
status = "okay";
};
&iwdg {
status = "okay";
};
stm32_lp_tick_source: &lptim1 {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>,
<&rcc STM32_SRC_LSE LPTIM1_SEL(3)>;
status = "okay";
};
zephyr_udc0: &usb {
status = "okay";
pinctrl-0 = <&usb_dm_pa11 &usb_dp_pa12>;
pinctrl-names = "default";
};
&rng {
status = "okay";
};
&aes1 {
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/*
* Configure partitions while leaving space for M0 BLE f/w
* Since STM32WBCube release V1.13.2, only _HCIOnly_ f/w are supported.
* These FW are expected to be located not before 0x080DB000
* Current partition is using the first 876K of the flash for M4
*/
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 DT_SIZE_K(48)>;
};
slot0_partition: partition@c000 {
label = "image-0";
reg = <0x0000c000 DT_SIZE_K(400)>;
};
slot1_partition: partition@70000 {
label = "image-1";
reg = <0x00070000 DT_SIZE_K(400)>;
};
scratch_partition: partition@d4000 {
label = "image-scratch";
reg = <0x000d4000 DT_SIZE_K(16)>;
};
storage_partition: partition@d8000 {
label = "storage";
reg = <0x000d8000 DT_SIZE_K(8)>;
};
};
};
&vref {
status = "okay";
};
&vbat {
status = "okay";
};
``` | /content/code_sandbox/boards/st/nucleo_wb55rg/nucleo_wb55rg.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,786 |
```yaml
board:
name: nucleo_wb55rg
vendor: st
socs:
- name: stm32wb55xx
``` | /content/code_sandbox/boards/st/nucleo_wb55rg/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```yaml
identifier: nucleo_wb55rg
name: ST Nucleo WB55RG
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 192
flash: 808
supported:
- gpio
- i2c
- counter
- dma
- spi
- pwm
- adc
- watchdog
- arduino_gpio
- arduino_i2c
- arduino_spi
- usb_device
- nvs
- rtc
- usbd
vendor: st
``` | /content/code_sandbox/boards/st/nucleo_wb55rg/nucleo_wb55rg.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 139 |
```unknown
# STM32WB55RG Nucleo board configuration
if BOARD_NUCLEO_WB55RG
config BT_STM32_IPM
default y
depends on BT
endif
``` | /content/code_sandbox/boards/st/nucleo_wb55rg/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 42 |
```unknown
# enable uart driver
CONFIG_SERIAL=y
# enable GPIO
CONFIG_GPIO=y
# enable clocks
CONFIG_CLOCK_CONTROL=y
# console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# Enable MPU
CONFIG_ARM_MPU=y
# Enable HW stack protection
CONFIG_HW_STACK_PROTECTION=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/nucleo_wb55rg/nucleo_wb55rg_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 72 |
```unknown
config BOARD_NUCLEO_WB55RG
select SOC_STM32WB55XX
``` | /content/code_sandbox/boards/st/nucleo_wb55rg/Kconfig.nucleo_wb55rg | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 22 |
```unknown
/*
*
*/
/ {
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpioc 0 0>, /* A0 */
<1 0 &gpioc 1 0>, /* A1 */
<2 0 &gpioa 1 0>, /* A2 */
<3 0 &gpioa 0 0>, /* A3 */
<4 0 &gpioc 3 0>, /* A4 */
<5 0 &gpioc 2 0>, /* A5 */
<6 0 &gpioa 3 0>, /* D0 */
<7 0 &gpioa 2 0>, /* D1 */
<8 0 &gpioc 6 0>, /* D2 */
<9 0 &gpioa 10 0>, /* D3 */
<10 0 &gpioc 10 0>, /* D4 */
<11 0 &gpioa 15 0>, /* D5 */
<12 0 &gpioa 8 0>, /* D6 */
<13 0 &gpioc 13 0>, /* D7 */
<14 0 &gpioc 12 0>, /* D8 */
<15 0 &gpioa 9 0>, /* D9 */
<16 0 &gpioa 4 0>, /* D10 */
<17 0 &gpioa 7 0>, /* D11 */
<18 0 &gpioa 6 0>, /* D12 */
<19 0 &gpioa 5 0>, /* D13 */
<20 0 &gpiob 9 0>, /* D14 */
<21 0 &gpiob 8 0>; /* D15 */
};
};
arduino_i2c: &i2c1 {};
arduino_spi: &spi1 {};
arduino_serial: &lpuart1 {};
``` | /content/code_sandbox/boards/st/nucleo_wb55rg/arduino_r3_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 500 |
```ini
source [find interface/stlink.cfg]
transport select hla_swd
source [find target/stm32wbx.cfg]
reset_config srst_only
``` | /content/code_sandbox/boards/st/nucleo_wb55rg/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 33 |
```restructuredtext
.. _nucleo_l552ze_q_board:
ST Nucleo L552ZE Q
##################
Overview
********
The Nucleo L552ZE Q board, featuring an ARM Cortex-M33 based STM32L552ZE MCU,
provides an affordable and flexible way for users to try out new concepts and
build prototypes by choosing from the various combinations of performance and
power consumption features. Here are some highlights of the Nucleo L552ZE Q
board:
- STM32L552ZE microcontroller in LQFP144 package
- Two types of extension resources:
- Arduino Uno V3 connectivity
- ST morpho extension pin headers for full access to all STM32 I/Os
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector
- Flexible board power supply:
- USB VBUS or external source(3.3V, 5V, 7 - 12V)
- ST-Link
- Three LEDs: USB communication (LD1), user LED (LD2), power LED (LD3)
- Two push-buttons: USER and RESET
- External or internal SMPS to generate Vcore logic supply
- USB OTG full speed or device only
.. image:: img/nucleo_l552ze_q.jpg
:align: center
:alt: Nucleo L552ZE Q
More information about the board can be found at the `Nucleo L552ZE Q website`_.
Hardware
********
The STM32L552xx devices are an ultra-low-power microcontrollers family (STM32L5
Series) based on the high-performance Arm|reg| Cortex|reg|-M33 32-bit RISC core.
They operate at a frequency of up to 110 MHz.
- Ultra-low-power with FlexPowerControl (down to 108 nA Standby mode and 62 uA/MHz run mode)
- Core: ARM |reg| 32-bit Cortex |reg| -M33 CPU with TrustZone |reg| and FPU.
- Performance benchmark:
- 1.5 DMPIS/MHz (Drystone 2.1)
- 442 CoreMark |reg| (4.02 CoreMark |reg| /MHZ)
- Security
- Arm |reg| TrustZone |reg| and securable I/Os memories and peripherals
- Flexible life cycle scheme with RDP (readout protection)
- Root of trust thanks to unique boot entry and hide protection area (HDP)
- Secure Firmware Installation thanks to embedded Root Secure Services
- Secure Firmware Update support with TF-M
- HASH hardware accelerator
- Active tamper and protection temperature, voltage and frequency attacks
- True Random Number Generator NIST SP800-90B compliant
- 96-bit unique ID
- 512-byte One-Time Programmable for user data
- Clock management:
- 4 to 48 MHz crystal oscillator
- 32 kHz crystal oscillator for RTC (LSE)
- Internal 16 MHz factory-trimmed RC ( |plusminus| 1%)
- Internal low-power 32 kHz RC ( |plusminus| 5%)
- Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by
LSE (better than |plusminus| 0.25 % accuracy)
- 3 PLLs for system clock, USB, audio, ADC
- Power management
- Embedded regulator (LDO) with three configurable range output to supply the digital circuitry
- Embedded SMPS step-down converter
- External SMPS support
- RTC with HW calendar, alarms and calibration
- Up to 114 fast I/Os, most 5 V-tolerant, up to 14 I/Os with independent supply down to 1.08 V
- Up to 22 capacitive sensing channels: support touchkey, linear and rotary touch sensors
- Up to 16 timers and 2 watchdogs
- 2x 16-bit advanced motor-control
- 2x 32-bit and 5x 16-bit general purpose
- 2x 16-bit basic
- 3x low-power 16-bit timers (available in Stop mode)
- 2x watchdogs
- 2x SysTick timer
- Memories
- Up to 512 MB Flash, 2 banks read-while-write
- 512 KB of SRAM including 64 KB with hardware parity check
- External memory interface for static memories supporting SRAM, PSRAM, NOR, NAND and FRAM memories
- OCTOSPI memory interface
- Rich analog peripherals (independent supply)
- 3x 12-bit ADC 5 MSPS, up to 16-bit with hardware oversampling, 200 uA/MSPS
- 2x 12-bit DAC, low-power sample and hold
- 2x operational amplifiers with built-in PGA
- 2x ultra-low-power comparators
- 4x digital filters for sigma delta modulator
- 19x communication interfaces
- USB Type-C / USB power delivery controller
- 2.0 full-speed crystal less solution, LPM and BCD
- 2x SAIs (serial audio interface)
- 4x I2C FM+(1 Mbit/s), SMBus/PMBus
- 6x USARTs (ISO 7816, LIN, IrDA, modem)
- 3x SPIs (7x SPIs with USART and OCTOSPI in SPI mode)
- 1xFDCAN
- 1xSDMMC interface
- 2x 14 channel DMA controllers
- CRC calculation unit
- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell |trade|
More information about STM32L552ZE can be found here:
- `STM32L552ZE on www.st.com`_
- `STM32L552 reference manual`_
Supported Features
==================
The Zephyr nucleo_l552ze_q board configuration supports the following
hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| ADC | on-chip | ADC Controller |
+-----------+------------+-------------------------------------+
| CLOCK | on-chip | reset and clock control |
+-----------+------------+-------------------------------------+
| DAC | on-chip | DAC Controller |
+-----------+------------+-------------------------------------+
| DMA | on-chip | Direct Memory Access |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| RNG | on-chip | entropy |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| TrustZone | on-chip | Trusted Firmware-M |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| die-temp | on-chip | die temperature sensor |
+-----------+------------+-------------------------------------+
The default configuration can be found in the defconfig and dts files:
- Common:
- :zephyr_file:`boards/st/nucleo_l552ze_q/nucleo_l552ze_q-common.dtsi`
- Secure target:
- :zephyr_file:`boards/st/nucleo_l552ze_q/nucleo_l552ze_q_defconfig`
- :zephyr_file:`boards/st/nucleo_l552ze_q/nucleo_l552ze_q.dts`
- Non-Secure target:
- :zephyr_file:`boards/st/nucleo_l552ze_q/nucleo_l552ze_q_stm32l552xx_ns_defconfig`
- :zephyr_file:`boards/st/nucleo_l552ze_q/nucleo_l552ze_q_stm32l552xx_ns.dts`
Zephyr board options
====================
The STM32L552e is an SoC with Cortex-M33 architecture. Zephyr provides support
for building for both Secure and Non-Secure firmware.
The BOARD options are summarized below:
+--------------------------------+-------------------------------------------+
| BOARD | Description |
+================================+===========================================+
| nucleo_l552ze_q | For building Trust Zone Disabled firmware |
+--------------------------------+-------------------------------------------+
| nucleo_l552ze_q/stm32l552xx/ns | For building Non-Secure firmware |
+--------------------------------+-------------------------------------------+
Here are the instructions to build Zephyr with a non-secure configuration,
using `tfm_ipc_` sample:
.. code-block:: bash
$ west build -b nucleo_l552ze_q/stm32l552xx/ns samples/tfm_integration/tfm_ipc/
Once done, before flashing, you need to first run a generated script that
will set platform option bytes config and erase platform (among others,
option bit TZEN will be set).
.. code-block:: bash
$ ./build/tfm/api_ns/regression.sh
$ west flash
Please note that, after having run a TFM sample on the board, you will need to
run `./build/tfm/api_ns/regression.sh` once more to clean up the board from secure
options and get back the platform back to a "normal" state and be able to run
usual, non-TFM, binaries.
Also note that, even then, TZEN will remain set, and you will need to use
STM32CubeProgrammer_ to disable it fully, if required.
Connections and IOs
===================
Nucleo L552ZE Q Board has 8 GPIO controllers. These controllers are responsible for pin muxing,
input/output, pull-up, etc.
Available pins:
---------------
.. image:: img/nucleo_l552ze_q_zio_left_2020_2_11.jpg
:align: center
:alt: Nucleo L552ZE Q Zio left connector
.. image:: img/nucleo_l552ze_q_zio_right_2020_2_11.jpg
:align: center
:alt: Nucleo L552ZE Q Zio right connector
For more details please refer to `STM32 Nucleo-144 board User Manual`_.
Default Zephyr Peripheral Mapping:
----------------------------------
- UART_1_TX : PA9
- UART_1_RX : PA10
- UART_2_TX : PA2
- UART_2_RX : PA3
- UART_3_TX : PD8
- UART_3_RX : PD9
- I2C_1_SCL : PB6
- I2C_1_SDA : PB7
- SPI_1_NSS : PA4
- SPI_1_SCK : PA5
- SPI_1_MISO : PA6
- SPI_1_MOSI : PA7
- SPI_2_NSS : PB12
- SPI_2_SCK : PB13
- SPI_2_MISO : PB14
- SPI_2_MOSI : PB15
- SPI_3_NSS : PB12
- SPI_3_SCK : PC10
- SPI_3_MISO : PC11
- SPI_3_MOSI : PC12
- PWM_2_CH1 : PA0
- USER_PB : PC13
- LD2 : PB7
- DAC1 : PA4
- ADC1 : PC0
System Clock
------------
Nucleo L552ZE Q System Clock could be driven by internal or external oscillator,
as well as main PLL clock. By default System clock is driven by PLL clock at
110MHz, driven by 4MHz medium speed internal oscillator.
Serial Port
-----------
Nucleo L552ZE Q board has 6 U(S)ARTs. The Zephyr console output is assigned to
UART2. Default settings are 115200 8N1.
Programming and Debugging
*************************
Applications for the ``nucleo_l552ze_q`` board configuration can be built and
flashed in the usual way (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Flashing
========
Nucleo L552ZE Q board includes an ST-LINK/V2-1 embedded debug tool
interface. Support can be enabled on pyocd by adding "pack" support with the
following pyocd command:
.. code-block:: console
$ pyocd pack --update
$ pyocd pack --install stm32l552ze
Alternatively, this interface is supported by the openocd version
included in the Zephyr SDK since v0.13.1.
Flashing an application to Nucleo L552ZE Q
------------------------------------------
Connect the Nucleo L552ZE Q to your host computer using the USB port.
Then build and flash an application. Here is an example for the
:ref:`hello_world` application.
Run a serial host program to connect with your Nucleo board:
.. code-block:: console
$ minicom -D /dev/ttyACM0
Then build and flash the application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nucleo_l552ze_q
:goals: build flash
You should see the following message on the console:
.. code-block:: console
Hello World! arm
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nucleo_l552ze_q
:maybe-skip-config:
:goals: debug
.. _Nucleo L552ZE Q website:
path_to_url
.. _STM32 Nucleo-144 board User Manual:
path_to_url
.. _STM32L552ZE on www.st.com:
path_to_url
.. _STM32L552 reference manual:
path_to_url
.. _STM32CubeProgrammer:
path_to_url
``` | /content/code_sandbox/boards/st/nucleo_l552ze_q/doc/nucleol552ze_q.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 3,120 |
```yaml
identifier: nucleo_l4r5zi
name: ST Nucleo L4R5ZI
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- arduino_i2c
- arduino_gpio
- arduino_spi
- pwm
- spi
- i2c
- gpio
- usb device
- nvs
- counter
- adc
- rtc
ram: 640
flash: 2048
vendor: st
``` | /content/code_sandbox/boards/st/nucleo_l4r5zi/nucleo_l4r5zi.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 131 |
```cmake
board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
board_runner_args(jlink "--device=STM32L4R5ZI" "--speed=4000")
include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake)
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/st/nucleo_l4r5zi/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 103 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/l4/stm32l4r5Xi.dtsi>
#include <st/l4/stm32l4r5z(g-i)tx-pinctrl.dtsi>
#include "arduino_r3_connector.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "STMicroelectronics STM32L4R5ZI-NUCLEO board";
compatible = "st,stm32l4r5zi-nucleo";
chosen {
zephyr,console = &lpuart1;
zephyr,shell-uart = &lpuart1;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
};
leds: leds {
compatible = "gpio-leds";
green_led_0: led_0 {
gpios = <&gpioc 7 GPIO_ACTIVE_HIGH>;
label = "User LD1";
};
blue_led_0: led_1 {
gpios = <&gpiob 7 GPIO_ACTIVE_HIGH>;
label = "User LD2";
};
red_led_0: led_2 {
gpios = <&gpiob 14 GPIO_ACTIVE_HIGH>;
label = "User LD3";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button {
label = "User";
gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>;
zephyr,code = <INPUT_KEY_0>;
};
};
pwmleds: pwmleds {
compatible = "pwm-leds";
/* NOTE: disabled by default, PWM1 conflicts with SPI2 */
status = "disabled";
red_pwm_led: red_pwm_led {
pwms = <&pwm1 2 PWM_MSEC(20) (PWM_POLARITY_NORMAL |
STM32_PWM_COMPLEMENTARY)>;
};
};
aliases {
led0 = &green_led_0;
led1 = &blue_led_0;
led2 = &red_led_0;
sw0 = &user_button;
pwm-led0 = &red_pwm_led;
volt-sensor0 = &vref;
volt-sensor1 = &vbat;
};
};
&clk_lsi {
status = "okay";
};
&clk_hsi {
status = "okay";
};
&clk_hsi48 {
status = "okay";
};
&pll {
div-m = <4>;
mul-n = <40>;
div-p = <7>;
div-q = <2>;
div-r = <2>;
clocks = <&clk_hsi>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(80)>;
ahb-prescaler = <1>;
apb1-prescaler = <1>;
apb2-prescaler = <1>;
};
&usart1 {
pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&usart2 {
pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa3>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&usart3 {
pinctrl-0 = <&usart3_tx_pd8 &usart3_rx_pd9>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&lpuart1 {
pinctrl-0 = <&lpuart1_tx_pg7 &lpuart1_rx_pg8>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&i2c1 {
pinctrl-0 = <&i2c1_scl_pb6 &i2c1_sda_pb7>;
pinctrl-names = "default";
status = "okay";
};
&spi1 {
pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pa7>;
pinctrl-names = "default";
cs-gpios = <&gpiod 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
status = "okay";
};
&spi2 {
pinctrl-0 = <&spi2_nss_pb12 &spi2_sck_pb13
&spi2_miso_pb14 &spi2_mosi_pb15>;
pinctrl-names = "default";
status = "okay";
};
&spi3 {
/* SPI3 on the ST Morpho Connector CN7 pins 17, 1, 2, 3*/
pinctrl-0 = <&spi3_nss_pa15 &spi3_sck_pc10
&spi3_miso_pc11 &spi3_mosi_pc12>;
pinctrl-names = "default";
status = "okay";
};
zephyr_udc0: &usbotg_fs {
pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12
&usb_otg_fs_id_pa10>;
pinctrl-names = "default";
status = "okay";
};
&timers1 {
status = "okay";
pwm1: pwm {
/* NOTE: disabled by default, PWM1 conflicts with SPI2 */
pinctrl-0 = <&tim1_ch2n_pb14>;
pinctrl-names = "default";
};
};
&timers2 {
status = "okay";
pwm2: pwm {
status = "okay";
pinctrl-0 = <&tim2_ch1_pa0>;
pinctrl-names = "default";
};
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>,
<&rcc STM32_SRC_LSI RTC_SEL(2)>;
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* Reserve last 16KiB for property storage */
storage_partition: partition@1FB000 {
label = "storage";
reg = <0x001FB000 DT_SIZE_K(16)>;
};
};
};
&adc1 {
pinctrl-0 = <&adc1_in1_pc0>;
pinctrl-names = "default";
st,adc-clock-source = <SYNC>;
st,adc-prescaler = <4>;
status = "okay";
};
&vref {
status = "okay";
};
&vbat {
status = "okay";
};
``` | /content/code_sandbox/boards/st/nucleo_l4r5zi/nucleo_l4r5zi.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,479 |
```unknown
config BOARD_NUCLEO_L4R5ZI
select SOC_STM32L4R5XX
``` | /content/code_sandbox/boards/st/nucleo_l4r5zi/Kconfig.nucleo_l4r5zi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 26 |
```unknown
# enable uart driver
CONFIG_SERIAL=y
# Enable GPIO
CONFIG_GPIO=y
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# Console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# Enable MPU
CONFIG_ARM_MPU=y
# Enable HW stack protection
CONFIG_HW_STACK_PROTECTION=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/nucleo_l4r5zi/nucleo_l4r5zi_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 74 |
```yaml
board:
name: nucleo_l4r5zi
vendor: st
socs:
- name: stm32l4r5xx
``` | /content/code_sandbox/boards/st/nucleo_l4r5zi/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 35 |
```unknown
# STM32L4R5ZI Nucleo board configuration
if BOARD_NUCLEO_L4R5ZI
config SPI_STM32_INTERRUPT
default y
depends on SPI
if NETWORKING
config USB_DEVICE_STACK
default y
config USB_DEVICE_NETWORK_EEM
default y
endif # NETWORKING
endif # BOARD_NUCLEO_L4R5ZI
``` | /content/code_sandbox/boards/st/nucleo_l4r5zi/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 85 |
```restructuredtext
.. _nucleo_wb55rg_board:
ST Nucleo WB55RG
################
Overview
********
The Nucleo WB55RG board is a multi-protocol wireless and ultra-low-power device
embedding a powerful and ultra-low-power radio compliant with the Bluetooth
Low Energy (BLE) SIG specification v5.0 and with IEEE 802.15.4-2011.
- STM32 microcontroller in VFQFPN68 package
- 2.4 GHz RF transceiver supporting Bluetooth specification v5.0 and
IEEE 802.15.4-2011 PHY and MAC
- Dedicated Arm 32-bit Cortex M0+ CPU for real-time Radio layer
- Three user LEDs
- Board connector: USB user with Micro-B
- Two types of extension resources:
- Arduino Uno V3 connectivity
- ST morpho extension pin headers for full access to all STM32 I/Os
- Integrated PCB antenna or footprint for SMA connector
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector
- Flexible power-supply options: ST-LINK USB VBUS or external sources
- On-board socket for CR2032 battery
- On-board ST-LINK/V2-1 debugger/programmer with USB re- enumeration capability:
mass storage, virtual COM port and debug port
.. image:: img/nucleowb55rg.jpg
:align: center
:alt: Nucleo WB55RG
More information about the board can be found at the `Nucleo WB55RG website`_.
Hardware
********
STM32WB55RG is an ultra-low-power dual core Arm Cortex-M4 MCU 64 MHz,Cortex-M0 32MHz
with 1 Mbyte of Flash memory, Bluetooth 5, 802.15.4, USB, LCD, AES-256 SoC and
provides the following hardware capabilities:
- Ultra-low-power with FlexPowerControl (down to 600 nA Standby mode with RTC and 32KB RAM)
- Core: ARM |reg| 32-bit Cortex |reg|-M4 CPU with FPU, frequency up to 64 MHz
- Radio:
- 2.4GHz
- RF transceiver supporting Bluetooth 5 specification, IEEE 802.15.4-2011 PHY and MAC,
supporting Thread and ZigBee|reg| 3.0
- RX Sensitivity: -96 dBm (Bluetooth|reg| Low Energy at 1 Mbps), -100 dBm (802.15.4)
- Programmable output power up to +6 dBm with 1 dB steps
- Integrated balun to reduce BOM
- Support for 2 Mbps
- Dedicated Arm|reg| 32-bit Cortex|reg| M0 + CPU for real-time Radio layer
- Accurate RSSI to enable power control
- Suitable for systems requiring compliance with radio frequency regulations
ETSI EN 300 328, EN 300 440, FCC CFR47 Part 15 and ARIB STD-T66
- Support for external PA
- Clock Sources:
- 32 MHz crystal oscillator with integrated trimming capacitors (Radio and CPU clock)
- 32 kHz crystal oscillator for RTC (LSE)
- 2x Internal low-power 32 kHz RC (|plusminus| 5% and |plusminus| 500ppm)
- Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by
LSE (better than |plusminus| 0.25 % accuracy)
- 2 PLLs for system clock, USB, SAI and ADC
- RTC with HW calendar, alarms and calibration
- LCD 8 x 40 or 4 x 44 with step-up converter
- Up to 24 capacitive sensing channels: support touchkey, linear and rotary touch sensors
- 16x timers:
- 2x 16-bit advanced motor-control
- 2x 32-bit and 5x 16-bit general purpose
- 2x 16-bit basic
- 2x low-power 16-bit timers (available in Stop mode)
- 2x watchdogs
- SysTick timer
- Up to 114 fast I/Os, most 5 V-tolerant, up to 14 I/Os with independent supply down to 1.08 V
- Memories
- Up to 1 MB Flash, 2 banks read-while-write, proprietary code readout protection
- Up to 320 KB of SRAM including 64 KB with hardware parity check
- External memory interface for static memories supporting SRAM, PSRAM, NOR and NAND memories
- Quad SPI memory interface
- 4x digital filters for sigma delta modulator
- Rich analog peripherals (down to 1.62 V)
- 12-bit ADC 4.26Msps, up to 16-bit with hardware oversampling, 200 uA/Msps
- 2x ultra-low-power comparator
- Accurate 2.5 V or 2.048 V reference voltage buffered output
- System peripherals
- Inter processor communication controller (IPCC) for communication with
Bluetooth|reg| Low Energy and 802.15.4
- HW semaphores for resources sharing between CPUs
- 2x DMA controllers (7x channels each) supporting ADC, SPI, I2C, USART,
QSPI, SAI, AES, Timers
- 1x USART (ISO 7816, IrDA, SPI Master, Modbus and Smartcard mode)
- 1x LPUART (low power)
- 2x SPI 32 Mbit/s
- 2x I2C (SMBus/PMBus)
- 1x SAI (dual channel high quality audio)
- 1x USB 2.0 FS device, crystal-less, BCD and LPM
- Touch sensing controller, up to 18 sensors
- LCD 8x40 with step-up converter
- 1x 16-bit, four channels advanced timer
- 2x 16-bits, two channels timer
- 1x 32-bits, four channels timer
- 2x 16-bits ultra-low-power timer
- 1x independent Systick
- 1x independent watchdog
- 1x window watchdog
- Security and ID
- 3x hardware encryption AES maximum 256-bit for the application,
the Bluetooth|reg| Low Energy and IEEE802.15.4
- Customer key storage / key manager services
- HW public key authority (PKA)
- Cryptographic algorithms: RSA, Diffie-Helman, ECC over GF(p)
- True random number generator (RNG)
- Sector protection against R/W operation (PCROP)
- CRC calculation unit
- 96-bit unique ID
- 64-bit unique ID. Possibility to derive 802.15.5 64-bit and
Bluetooth|reg| Low Energy 48-bit EUI
- Up to 72 fast I/Os, 70 of them 5 V-tolerant
- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell |trade|
More information about STM32WB55RG can be found here:
- `STM32WB55RG on www.st.com`_
- `STM32WB5RG datasheet`_
- `STM32WB5RG reference manual`_
Supported Features
==================
The Zephyr nucleo_wb55rg board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| PWM | on-chip | pwm |
+-----------+------------+-------------------------------------+
| ADC | on-chip | adc |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | independent watchdog |
+-----------+------------+-------------------------------------+
| RADIO | on-chip | Bluetooth Low Energy |
+-----------+------------+-------------------------------------+
| die-temp | on-chip | die temperature sensor |
+-----------+------------+-------------------------------------+
| RTC | on-chip | rtc |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported on this Zephyr port.
The default configuration can be found in the defconfig file:
:zephyr_file:`boards/st/nucleo_wb55rg/nucleo_wb55rg_defconfig`
Bluetooth and compatibility with STM32WB Copro Wireless Binaries
================================================================
To operate bluetooth on Nucleo WB55RG, Cortex-M0 core should be flashed with
a valid STM32WB Coprocessor binaries (either 'Full stack' or 'HCI Layer').
These binaries are delivered in STM32WB Cube packages, under
Projects/STM32WB_Copro_Wireless_Binaries/STM32WB5x/
For compatibility information with the various versions of these binaries,
please check `modules/hal/stm32/lib/stm32wb/hci/README <path_to_url`__
in the hal_stm32 repo.
Note that since STM32WB Cube package V1.13.2, "full stack" binaries are not compatible
anymore for a use in Zephyr and only "HCI Only" versions should be used on the M0
side.
Connections and IOs
===================
Nucleo WB55RG Board has 6 GPIO controllers. These controllers are responsible for pin muxing,
input/output, pull-up, etc.
Default Zephyr Peripheral Mapping:
----------------------------------
.. rst-class:: rst-columns
- UART_1 TX/RX : PB7/PB6
- LPUART_1 TX/RX : PA3/PA2 (arduino_serial)
- I2C_1_SCL : PB8
- I2C_1_SDA : PB9
- I2C_3_SCL : PC0
- I2C_3_SDA : PC1
- USER_PB : PC4
- USER_PB1 : PD0
- USER_PB2 : PD1
- LD1 : PB5
- LD2 : PB0
- LD3 : PB1
- SPI_1_NSS : PA4 (arduino_spi)
- SPI_1_SCK : PA5 (arduino_spi)
- SPI_1_MISO : PA6 (arduino_spi)
- SPI_1_MOSI : PA7 (arduino_spi)
- PWM_2 CH 1 : PA0
- ADC_1_CH3 : PC2
System Clock
------------
Nucleo WB55RG System Clock could be driven by internal or external oscillator,
as well as main PLL clock. By default System clock is driven by HSE clock at 32MHz.
Serial Port
-----------
Nucleo WB55RG board has 2 (LP)U(S)ARTs. The Zephyr console output is assigned to USART1.
Default settings are 115200 8N1.
Programming and Debugging
*************************
Applications for the ``nucleo_wb55rg`` board configuration can be built the
usual way (see :ref:`build_an_application`).
Flashing
========
Nucleo WB55RG board includes an ST-LINK/V2-1 embedded debug tool
interface. This interface is supported by the openocd version included in the
Zephyr SDK since v0.11.0.
If you prefer, you can use pyocd, but it requires to enable "pack" support with
the following pyocd command:
.. code-block:: console
$ pyocd pack --update
$ pyocd pack --install stm32wb55rg
Flashing an application to Nucleo WB55RG
----------------------------------------
Connect the Nucleo WB55RG to your host computer using the USB port.
Then build and flash an application. Here is an example for the
:ref:`hello_world` application.
Run a serial host program to connect with your Nucleo board:
.. code-block:: console
$ minicom -D /dev/ttyUSB0
Then build and flash the application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nucleo_wb55rg
:goals: build flash
You should see the following message on the console:
.. code-block:: console
Hello World! arm
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:zephyr:code-sample:`blinky` application.
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: nucleo_wb55rg
:maybe-skip-config:
:goals: debug
.. _Nucleo WB55RG website:
path_to_url
.. _STM32WB55RG on www.st.com:
path_to_url
.. _STM32WB5RG datasheet:
path_to_url
.. _STM32WB5RG reference manual:
path_to_url
``` | /content/code_sandbox/boards/st/nucleo_wb55rg/doc/nucleo_wb55rg.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,956 |
```ini
source [find board/st_nucleo_l4.cfg]
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
``` | /content/code_sandbox/boards/st/nucleo_l4r5zi/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 67 |
```unknown
/*
*
*/
/ {
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpioa 3 0>, /* A0 */
<1 0 &gpioc 0 0>, /* A1 */
<2 0 &gpioc 3 0>, /* A2 */
<3 0 &gpioc 1 0>, /* A3 */
<4 0 &gpioc 4 0>, /* A4 */
<5 0 &gpioc 5 0>, /* A5 */
<6 0 &gpiod 9 0>, /* D0 */
<7 0 &gpiod 8 0>, /* D1 */
<8 0 &gpiof 15 0>, /* D2 */
<9 0 &gpioe 13 0>, /* D3 */
<10 0 &gpiof 14 0>, /* D4 */
<11 0 &gpioe 11 0>, /* D5 */
<12 0 &gpioe 9 0>, /* D6 */
<13 0 &gpiof 13 0>, /* D7 */
<14 0 &gpiof 12 0>, /* D8 */
<15 0 &gpiod 15 0>, /* D9 */
<16 0 &gpiod 14 0>, /* D10 */
<17 0 &gpioa 7 0>, /* D11 */
<18 0 &gpioa 6 0>, /* D12 */
<19 0 &gpioa 5 0>, /* D13 */
<20 0 &gpiob 9 0>, /* D14 */
<21 0 &gpiob 8 0>; /* D15 */
};
};
arduino_i2c: &i2c1 {};
arduino_spi: &spi1 {};
arduino_serial: &usart3 {};
``` | /content/code_sandbox/boards/st/nucleo_l4r5zi/arduino_r3_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 500 |
```cmake
board_runner_args(jlink "--device=STM32F412ZG" "--speed=4000")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/st/stm32f412g_disco/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 56 |
```yaml
identifier: stm32f412g_disco
name: ST STM32F412G Discovery
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- arduino_gpio
- arduino_serial
- arduino_i2c
- arduino_spi
- counter
vendor: st
``` | /content/code_sandbox/boards/st/stm32f412g_disco/stm32f412g_disco.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 87 |
```unknown
config BOARD_STM32F412G_DISCO
select SOC_STM32F412ZX
``` | /content/code_sandbox/boards/st/stm32f412g_disco/Kconfig.stm32f412g_disco | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 22 |
```unknown
# Enable MPU
CONFIG_ARM_MPU=y
# Enable HW stack protection
CONFIG_HW_STACK_PROTECTION=y
CONFIG_SERIAL=y
# console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# enable GPIO ports A, B, C, D, E
CONFIG_GPIO=y
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/stm32f412g_disco/stm32f412g_disco_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 79 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/f4/stm32f412Xg.dtsi>
#include <st/f4/stm32f412z(e-g)tx-pinctrl.dtsi>
#include "arduino_r3_connector.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "STMicroelectronics STM32F412G-DISCO board";
compatible = "st,stm32f412g-disco";
chosen {
zephyr,console = &usart2;
zephyr,shell-uart = &usart2;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
};
leds {
compatible = "gpio-leds";
green_led_1: led_1 {
gpios = <&gpioe 0 GPIO_ACTIVE_HIGH>;
label = "User LD1";
};
orange_led_2: led_2 {
gpios = <&gpioe 1 GPIO_ACTIVE_HIGH>;
label = "User LD2";
};
red_led_3: led_3 {
gpios = <&gpioe 2 GPIO_ACTIVE_HIGH>;
label = "User LD3";
};
blue_led_4: led_4 {
gpios = <&gpioe 3 GPIO_ACTIVE_HIGH>;
label = "User LD4";
};
};
gpio_keys {
compatible = "gpio-keys";
joy_sel: joystick_selection {
label = "joystick selection";
gpios = <&gpioa 0 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
zephyr,code = <INPUT_KEY_ENTER>;
};
joy_down: joystick_down {
label = "joystick down";
gpios = <&gpiog 1 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
zephyr,code = <INPUT_KEY_DOWN>;
};
joy_up: joystick_up {
label = "joystick up";
gpios = <&gpiog 0 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
zephyr,code = <INPUT_KEY_UP>;
};
joy_left: joystick_left {
label = "joystick left";
gpios = <&gpiof 15 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
zephyr,code = <INPUT_KEY_LEFT>;
};
joy_right: joystick_right {
label = "joystick right";
gpios = <&gpiof 14 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
zephyr,code = <INPUT_KEY_RIGHT>;
};
};
aliases {
led0 = &green_led_1;
led1 = &orange_led_2;
led2 = &red_led_3;
led3 = &blue_led_4;
sw0 = &joy_sel;
};
};
&clk_lsi {
status = "okay";
};
&clk_hse {
hse-bypass;
clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
status = "okay";
};
&pll {
div-m = <4>;
mul-n = <100>;
div-p = <2>;
div-q = <8>;
clocks = <&clk_hse>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(100)>;
ahb-prescaler = <1>;
apb1-prescaler = <2>;
apb2-prescaler = <1>;
};
&usart2 {
pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa3>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&usart6 {
pinctrl-0 = <&usart6_tx_pg14 &usart6_rx_pg9>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&i2c2 {
pinctrl-0 = <&i2c2_scl_pb10 &i2c2_sda_pb9>;
pinctrl-names = "default";
clock-frequency = <I2C_BITRATE_FAST>;
status = "okay";
};
&spi1 {
pinctrl-0 = <&spi1_nss_pa15 &spi1_sck_pa5
&spi1_miso_pa6 &spi1_mosi_pa7>;
pinctrl-names = "default";
status = "okay";
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>,
<&rcc STM32_SRC_LSI RTC_SEL(2)>;
status = "okay";
};
&quadspi {
pinctrl-0 = <&quadspi_clk_pb2 &quadspi_bk1_ncs_pg6
&quadspi_bk1_io0_pf8 &quadspi_bk1_io1_pf9
&quadspi_bk1_io2_pf7 &quadspi_bk1_io3_pf6>;
pinctrl-names = "default";
status = "okay";
n25q128a1: qspi-nor-flash@90000000 {
compatible = "st,stm32-qspi-nor";
reg = <0x90000000 DT_SIZE_M(16)>; /* 128 Mbits */
qspi-max-frequency = <72000000>;
status = "okay";
};
};
``` | /content/code_sandbox/boards/st/stm32f412g_disco/stm32f412g_disco.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,195 |
```yaml
board:
name: stm32f412g_disco
vendor: st
socs:
- name: stm32f412zx
``` | /content/code_sandbox/boards/st/stm32f412g_disco/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 33 |
```unknown
/*
*
*/
/ {
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpioa 1 0>, /* A0 */
<1 0 &gpioc 1 0>, /* A1 */
<2 0 &gpioc 3 0>, /* A2 */
<3 0 &gpioc 4 0>, /* A3 */
<4 0 &gpioc 5 0>, /* A4 */
<5 0 &gpiob 0 0>, /* A5 */
<6 0 &gpiog 9 0>, /* D0 */
<7 0 &gpiog 14 0>, /* D1 */
<8 0 &gpiog 13 0>, /* D2 */
<9 0 &gpiof 4 0>, /* D3 */
<10 0 &gpiog 12 0>, /* D4 */
<11 0 &gpiof 10 0>, /* D5 */
<12 0 &gpiof 3 0>, /* D6 */
<13 0 &gpiog 11 0>, /* D7 */
<14 0 &gpiog 10 0>, /* D8 */
<15 0 &gpiob 8 0>, /* D9 */
<16 0 &gpioa 15 0>, /* D10 */
<17 0 &gpioa 7 0>, /* D11 */
<18 0 &gpioa 6 0>, /* D12 */
<19 0 &gpioa 5 0>, /* D13 */
<20 0 &gpiob 9 0>, /* D14 */
<21 0 &gpiob 10 0>; /* D15 */
};
};
arduino_i2c: &i2c2 {};
arduino_spi: &spi1 {};
arduino_serial: &usart6 {};
``` | /content/code_sandbox/boards/st/stm32f412g_disco/arduino_r3_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 503 |
```ini
source [find board/st_nucleo_f4.cfg]
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
``` | /content/code_sandbox/boards/st/stm32f412g_disco/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 67 |
```restructuredtext
.. _nucleo_l4r5zi_board:
ST Nucleo L4R5ZI
################
Overview
********
The Nucleo L4R5ZI board features an ARM Cortex-M4 based STM32L4R5ZI MCU
with a wide range of connectivity support and configurations. Here are
some highlights of the Nucleo L4R5ZI board:
- STM32 microcontroller in LQFP144 package
- Two types of extension resources:
- Arduino Uno V3 connectivity
- ST morpho extension pin headers for full access to all STM32 I/Os
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector
- Flexible board power supply:
- USB VBUS or external source(3.3V, 5V, 7 - 12V)
- Power management access point
- Three User LEDs: LD1 (Green), LD2 (Blue), LD3 (Red)
- Two push-buttons: USER and RESET
.. image:: img/nucleo_l4r5zi.jpg
:align: center
:alt: Nucleo L4R5ZI
More information about the board can be found at the `Nucleo L4R5ZI website`_.
Hardware
********
The STM32L4R5ZI SoC provides the following hardware IPs:
- Ultra-low-power with FlexPowerControl (down to 130 nA Standby mode
and 100 uA/MHz run mode)
- Core: ARM |reg| 32-bit Cortex |reg|-M4 CPU with FPU, adaptive
real-time accelerator (ART Accelerator) allowing 0-wait-state
execution from Flash memory, frequency up to 120 MHz, MPU, 150
DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions
- Clock Sources:
- 4 to 48 MHz crystal oscillator
- 32 kHz crystal oscillator for RTC (LSE)
- Internal 16 MHz factory-trimmed RC ( |plusminus| 1%)
- Internal low-power 32 kHz RC ( |plusminus| 5%)
- Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by
LSE (better than |plusminus| 0.25 % accuracy)
- Internal 48 MHz with clock recovery
- 3 PLLs for system clock, USB, audio, ADC
- RTC with HW calendar, alarms and calibration
- Up to 24 capacitive sensing channels: support touchkey, linear and
rotary touch sensors
- Advanced graphics features
- Chrom-ART Accelerator (DMA2D) for enhanced graphic content creation
- Chrom-GRC (GFXMMU) allowing up to 20% of graphic resources optimization
- MIPI DSI Host controller with two DSI lanes running at up to 500
Mbits/s each
- LCD-TFT controller
- 16x timers
- 2 x 16-bit advanced motor-control
- 2 x 32-bit and 5 x 16-bit general purpose
- 2x 16-bit basic
- 2x low-power 16-bit timers (available in Stop mode)
- 2x watchdogs
- SysTick timer
- Up to 136 fast I/Os, most 5 V-tolerant, up to 14 I/Os with
independent supply down to 1.08 V
- Memories
- 2-Mbyte Flash, 2 banks read-while-write, proprietary code readout protection
- 640 Kbytes of SRAM including 64 Kbytes with hardware parity check
- External memory interface for static memories supporting SRAM,
PSRAM, NOR, NAND and FRAM memories
- 2 x OctoSPI memory interface
- 4x digital filters for sigma delta modulator
- Rich analog peripherals (independent supply)
- 12-bit ADC 5 Msps, up to 16-bit with hardware oversampling, 200 A/Msps
- 2x 12-bit DAC, low-power sample and hold
- 2x operational amplifiers with built-in PGA
- 2x ultra-low-power comparators
- 20x communication interfaces
- USB OTG 2.0 full-speed, LPM and BCD
- 2x SAIs (serial audio interface)
- 4x I2C FM+(1 Mbit/s), SMBus/PMBus
- 6x USARTs (ISO 7816, LIN, IrDA, modem)
- 3x SPIs (5x SPIs with the dual OctoSPI)
- CAN (2.0B Active) and SDMMC
- 14-channel DMA controller
- True random number generator
- CRC calculation unit, 96-bit unique ID
- 8- to 14-bit camera interface up to 32 MHz (black and white) or 10 MHz (color)
- Development support: serial wire debug (SWD), JTAG, Embedded Trace
Macrocell (ETM)
More information about STM32L4R5ZI can be found here:
- `STM32L4R5ZI on www.st.com`_
- `STM32L4R5 reference manual`_
Supported Features
==================
The Zephyr nucleo_l4r5zi board configuration supports the following
hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| PWM | on-chip | pwm |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| USB | on-chip | usb |
+-----------+------------+-------------------------------------+
| ADC | on-chip | adc |
+-----------+------------+-------------------------------------+
| RTC | on-chip | rtc |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported on this Zephyr port.
The default configuration can be found in the defconfig file:
:zephyr_file:`boards/st/nucleo_l4r5zi/nucleo_l4r5zi_defconfig`
Connections and IOs
===================
Nucleo L4R5ZI Board has 8 GPIO controllers. These controllers are
responsible for pin muxing, input/output, pull-up, etc.
Available pins:
---------------
.. image:: img/nucleo144_layout.jpg
:align: center
:alt: Nucleo L4R5ZI Arduino connectors
For more details please refer to `STM32 Nucleo-144 board User Manual`_.
Default Zephyr Peripheral Mapping:
----------------------------------
.. rst-class:: rst-columns
- UART_1_TX : PA9
- UART_1_RX : PA10
- UART_2_TX : PA2
- UART_2_RX : PA3
- UART_3_TX : PB10
- UART_3_RX : PB11
- I2C_1_SCL : PB6
- I2C_1_SDA : PB7
- SPI_1_NSS : PD14
- SPI_1_SCK : PA5
- SPI_1_MISO : PA6
- SPI_1_MOSI : PA7
- SPI_2_NSS : PB12
- SPI_2_SCK : PB13
- SPI_2_MISO : PB14
- SPI_2_MOSI : PB15
- SPI_3_NSS : PB12
- SPI_3_SCK : PC10
- SPI_3_MISO : PC11
- SPI_3_MOSI : PC12
- PWM_2_CH1 : PA0
- USER_PB : PC13
- LD1 : PC7
- LD2 : PB7
- LD3 : PB14
- USB DM : PA11
- USB DP : PA12
- ADC1 : PC0
System Clock
------------
Nucleo L4R5ZI System Clock could be driven by internal or external
oscillator, as well as main PLL clock. By default, the System clock is
driven by the PLL clock at 80MHz, driven by a 16MHz high speed
internal oscillator. The clock can be boosted to 120MHz if boost mode
is selected.
Serial Port
-----------
Nucleo L4R5ZI board has 5 U(S)ARTs. The Zephyr console output is
assigned to UART2. Default settings are 115200 8N1.
Network interface
-----------------
Ethernet over USB is configured as the default network interface (EEM)
Programming and Debugging
*************************
The NUCLEO-L4R5ZI board includes a ST-LINK/V2 embedded debug tool interface.
The board is configured to be flashed using west `STM32CubeProgrammer`_ runner,
so its installation is required to be able to flash the board.
Alternatively, openocd (provided in Zephyr SDK) or JLink can also be used to
flash the board using the ``--runner`` (or ``-r``) option:
.. code-block:: console
$ west flash --runner openocd
$ west flash --runner jlink
Connect the Nucleo L4R5ZI to your host computer using the USB port.
Then build and flash an application.
Here is an example for the :ref:`hello_world` application.
Run a serial host program to connect with your Nucleo board:
.. code-block:: console
$ minicom -D /dev/ttyACM0
Then build and flash the application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nucleo_l4r5zi
:goals: build flash
You should see the following message on the console:
.. code-block:: console
Hello World! arm
.. _Nucleo L4R5ZI website:
path_to_url
.. _STM32 Nucleo-144 board User Manual:
path_to_url
.. _STM32L4R5ZI on www.st.com:
path_to_url
.. _STM32L4R5 reference manual:
path_to_url
.. _STM32 ST-LINK utility:
path_to_url
.. _STM32CubeProgrammer:
path_to_url
``` | /content/code_sandbox/boards/st/nucleo_l4r5zi/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,381 |
```yaml
identifier: stm32wb5mmg
name: ST STM32WB5MMG Ultra-low-power Module
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 256
flash: 1024
supported:
- gpio
- dma
- uart
- usb_device
vendor: st
``` | /content/code_sandbox/boards/st/stm32wb5mmg/stm32wb5mmg.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 88 |
```cmake
board_runner_args(pyocd "--target=stm32wb55vgyx")
board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake)
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
``` | /content/code_sandbox/boards/st/stm32wb5mmg/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 97 |
```unknown
# enable uart driver
CONFIG_SERIAL=y
# enable GPIO
CONFIG_GPIO=y
# enable clocks
CONFIG_CLOCK_CONTROL=y
# console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# Enable MPU
CONFIG_ARM_MPU=y
# Enable HW stack protection
CONFIG_HW_STACK_PROTECTION=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/stm32wb5mmg/stm32wb5mmg_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 72 |
```yaml
board:
name: stm32wb5mmg
vendor: st
socs:
- name: stm32wb55xx
``` | /content/code_sandbox/boards/st/stm32wb5mmg/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```unknown
# STM32WB5MMG Bluetooth module board configuration
if BOARD_STM32WB5MMG
config BT_STM32_IPM
default y
depends on BT
endif
``` | /content/code_sandbox/boards/st/stm32wb5mmg/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 41 |
```unknown
config BOARD_STM32WB5MMG
select SOC_STM32WB55XX
``` | /content/code_sandbox/boards/st/stm32wb5mmg/Kconfig.stm32wb5mmg | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 21 |
```restructuredtext
.. _stm32f412g_disco_board:
ST STM32F412G Discovery
#######################
Overview
********
The STM32F412 Discovery kit features an ARM Cortex-M4 based STM32F412ZG MCU
with a wide range of connectivity support and configurations Here are
some highlights of the STM32F412G-DISCO board:
- STM32F412ZGT6 microcontroller featuring 1 Mbyte of Flash memory and 256 Kbytes of RAM in an LQFP144 package
- On-board ST-LINK/V2-1 SWD debugger supporting USB re-enumeration capability:
- USB virtual COM port
- mass storage
- debug port
- 1.54 inch 240x240 pixel TFT color LCD with parallel interface and capacitive touchscreen
- I2S Audio CODEC, with a stereo headset jack, including analog microphone input and a loudspeaker output
- Stereo digital MEMS microphones
- MicroSD card connector extension
- I2C extension connector
- 128 Mbit Quad-SPI Nor Flash
- Reset button and Joystick
- Four color user LEDs.
- USB OTG FS with Micro-AB connector
- Four power supply options:
- ST-LINK/V2-1 USB connector
- User USB FS connector
- VIN from Arduino* connectors
- + 5 V from Arduino* connectors
- Two power supplies for MCU: 2.0 V and 3.3 V
- Compatible with Arduino(tm) Uno revision 3 connectors
- Extension connector for direct access to various features of STM32F412ZGT6 MCU
- Comprehensive free software including a variety of examples, part of STM32Cube package
.. image:: img/stm32f412g_disco.jpg
:align: center
:alt: STM32F412G-DISCO
More information about the board can be found at the `32F412GDISCOVERY website`_.
Hardware
********
STM32F469I-DISCO Discovery kit provides the following hardware components:
- STM32F412ZGT6 in LQFP144 package
- ARM |reg| 32-bit Cortex |reg| -M4 CPU with FPU
- 100 MHz max CPU frequency
- VDD from 1.7 V to 3.6 V
- 1 MB Flash
- 256 KB SRAM
- GPIO with external interrupt capability
- LCD parallel interface, 8080/6800 modes
- 1x12-bit ADC with 16 channels
- RTC
- Advanced-control Timer
- General Purpose Timers (12)
- Watchdog Timers (2)
- USART/UART (4)
- I2C (4)
- SPI (5)
- SDIO
- 2xCAN
- CRC calculation unit
- True random number generator
- DMA Controller
More information about STM32F412ZG can be found here:
- `STM32F412ZG on www.st.com`_
- `STM32F412 reference manual`_
Supported Features
==================
The Zephyr stm32f412g_disco board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| QSPI NOR | on-chip | off-chip flash |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported on Zephyr porting.
The default configuration can be found in
:zephyr_file:`boards/st/stm32f412g_disco/stm32f412g_disco_defconfig`
Pin Mapping
===========
STM32F412G-DISCO Discovery kit has 8 GPIO controllers. These controllers are responsible for pin muxing,
input/output, pull-up, etc.
For more details please refer to `32F412GDISCOVERY board User Manual`_.
Default Zephyr Peripheral Mapping:
----------------------------------
- UART_2_TX : PA2
- UART_2_RX : PA3
- LD1 : PE0
- LD2 : PE1
- LD3 : PE2
- LD4 : PE3
System Clock
============
STM32F412G-DISCO System Clock could be driven by internal or external oscillator,
as well as main PLL clock. By default System clock is driven by PLL clock at 100MHz,
driven internal oscillator.
Serial Port
===========
The STM32F412G Discovery kit has up to 4 UARTs. The Zephyr console output is assigned to UART2.
Default settings are 115200 8N1.
Programming and Debugging
*************************
Applications for the ``stm32f412g_disco`` board configuration can be built and
flashed in the usual way (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Flashing
========
STM32F412G-DISCO Discovery kit includes an ST-LINK/V2 embedded debug tool interface.
This interface is supported by the openocd version included in Zephyr SDK.
Flashing an application to STM32F412G-DISCO
-------------------------------------------
Connect the STM32F412G-DISCO Discovery kit to your host computer using
the USB port, then run a serial host program to connect with your
board:
.. code-block:: console
$ minicom -D /dev/ttyACM0
Then build and flash an application. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: stm32f412g_disco
:goals: build flash
You should see the following message on the console:
.. code-block:: console
Hello World! arm
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: stm32f412g_disco
:maybe-skip-config:
:goals: debug
.. _32F412GDISCOVERY website:
path_to_url
.. _32F412GDISCOVERY board User Manual:
path_to_url
.. _STM32F412ZG on www.st.com:
path_to_url
.. _STM32F412 reference manual:
path_to_url
``` | /content/code_sandbox/boards/st/stm32f412g_disco/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,505 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/wb/stm32wb55Xg.dtsi>
#include <st/wb/stm32wb55vgyx-pinctrl.dtsi>
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "STMicroelectronics STM32WB5MMG Bluetooth module";
compatible = "st,stm32wb5mmgh6";
chosen {
zephyr,console = &usart1;
zephyr,shell-uart = &usart1;
zephyr,bt-mon-uart = &lpuart1;
zephyr,bt-c2h-uart = &lpuart1;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
};
};
&clk_hse {
status = "okay";
};
&clk_lse {
status = "okay";
};
&clk_hsi48 {
status = "okay";
};
&clk48 {
/* Node is disabled by default as default source is HSI48 */
/* To select another clock, enable the node */
clocks = <&rcc STM32_SRC_HSI48 CLK48_SEL(0)>;
};
&rcc {
clocks = <&clk_hse>;
clock-frequency = <DT_FREQ_M(32)>;
cpu1-prescaler = <1>;
cpu2-prescaler = <1>;
ahb4-prescaler = <1>;
apb1-prescaler = <1>;
apb2-prescaler = <1>;
};
&usart1 {
pinctrl-0 = <&usart1_tx_pb6 &usart1_rx_pb7>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&lpuart1 {
pinctrl-0 = <&lpuart1_tx_pa2 &lpuart1_rx_pa3>;
pinctrl-names = "default";
current-speed = <100000>;
status = "okay";
};
&adc1 {
pinctrl-0 = <&adc1_in3_pc2>;
pinctrl-names = "default";
st,adc-clock-source = <SYNC>;
st,adc-prescaler = <4>;
status = "okay";
};
zephyr_udc0: &usb {
status = "okay";
pinctrl-0 = <&usb_dm_pa11 &usb_dp_pa12>;
pinctrl-names = "default";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/*
* Configure partitions while leaving space for M0 BLE f/w
* Since STM32WBCube release V1.13.2, only _HCIOnly_ f/w are supported.
* These FW are expected to be located not before 0x080DB000
* Current partition is using the first 876K of the flash for M4
*/
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 DT_SIZE_K(48)>;
};
slot0_partition: partition@c000 {
label = "image-0";
reg = <0x0000c000 DT_SIZE_K(400)>;
};
};
};
``` | /content/code_sandbox/boards/st/stm32wb5mmg/stm32wb5mmg.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 733 |
```ini
source [find interface/stlink.cfg]
transport select hla_swd
source [find target/stm32wbx.cfg]
reset_config srst_only
``` | /content/code_sandbox/boards/st/stm32wb5mmg/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 33 |
```cmake
board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake)
``` | /content/code_sandbox/boards/st/stm32g081b_eval/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 47 |
```unknown
#
# Serial Drivers
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# GPIO Controller
CONFIG_GPIO=y
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/stm32g081b_eval/stm32g081b_eval_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 58 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/g0/stm32g081Xb.dtsi>
#include <st/g0/stm32g081rbtx-pinctrl.dtsi>
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "STM32G081B EVAL board";
compatible = "st,stm32g081-eval";
chosen {
zephyr,console = &usart3;
zephyr,shell-uart = &usart3;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
};
leds {
compatible = "gpio-leds";
led_1: led1 {
gpios = <&gpiod 5 GPIO_ACTIVE_HIGH>;
label = "LED1";
};
led_2: led2 {
gpios = <&gpiod 6 GPIO_ACTIVE_HIGH>;
label = "LED2";
};
led_3: led3 {
gpios = <&gpiod 8 GPIO_ACTIVE_HIGH>;
label = "LED3";
};
led_4: led4 {
gpios = <&gpiod 9 GPIO_ACTIVE_HIGH>;
label = "LED4";
};
};
gpio_keys {
compatible = "gpio-keys";
joy_sel: button0 {
label = "JOY_SEL";
gpios = <&gpioa 0 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
zephyr,code = <INPUT_KEY_ENTER>;
};
joy_left: button1 {
label = "JOY_LEFT";
gpios = <&gpioc 8 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
zephyr,code = <INPUT_KEY_LEFT>;
};
joy_down: button2 {
label = "JOY_DOWN";
gpios = <&gpioc 3 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
zephyr,code = <INPUT_KEY_DOWN>;
};
joy_right: button3 {
label = "JOY_RIGHT";
gpios = <&gpioc 7 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
zephyr,code = <INPUT_KEY_RIGHT>;
};
joy_up: button4 {
label = "JOY_UP";
gpios = <&gpioc 2 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
zephyr,code = <INPUT_KEY_UP>;
};
};
aliases {
led0 = &led_1;
led1 = &led_2;
led2 = &led_3;
led3 = &led_4;
sw0 = &joy_sel;
sw1 = &joy_left;
sw2 = &joy_down;
sw3 = &joy_right;
sw4 = &joy_up;
watchdog0 = &iwdg;
volt-sensor0 = &vref;
volt-sensor1 = &vbat;
};
};
&clk_hsi {
status = "okay";
};
&pll {
div-m = <1>;
mul-n = <8>;
div-p = <2>;
div-q = <2>;
div-r = <2>;
clocks = <&clk_hsi>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(64)>;
ahb-prescaler = <1>;
apb1-prescaler = <1>;
};
&usart3 {
pinctrl-0 = <&usart3_tx_pc10 &usart3_rx_pc11>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&tim15_ch1_pc1 {
slew-rate = "very-high-speed";
bias-pull-up;
drive-open-drain;
};
&timers15 {
status = "okay";
pwm15: pwm {
status = "okay";
pinctrl-0 = <&tim15_ch1_pc1>;
pinctrl-names = "default";
};
};
&adc1 {
pinctrl-0 = <&adc1_in3_pa3 &adc1_in9_pb1>;
pinctrl-names = "default";
st,adc-clock-source = <SYNC>;
st,adc-prescaler = <4>;
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
channel@3 {
reg = <3>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_INTERNAL";
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
zephyr,resolution = <12>;
zephyr,vref-mv = <3300>;
};
channel@9 {
reg = <9>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_INTERNAL";
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
zephyr,resolution = <12>;
zephyr,vref-mv = <3300>;
};
};
&ucpd1 {
status = "okay";
/*
* UCPD is fed directly from HSI which is @ 16MHz. The ucpd_clk goes to
* a prescaler who's output feeds the 'half-bit' divider which is used
* to generate clock for delay counters and BMC Rx/Tx blocks. The rx is
* designed to work in freq ranges of 6 <--> 18 MHz, however recommended
* range is 9 <--> 18 MHz.
*
* +-------+ @ 16 MHz +-------+ @ ~600 kHz +-----------+
* HSI ---->| /psc |--------->| /hbit |--------------->| trans_cnt |
* +-------+ +-------+ | +-----------+
* | +-----------+
* +----------->| ifrgap_cnt|
* +-----------+
* Requirements:
* 1. hbit_clk ~= 600 kHz: 16 MHz / 600 kHz = 26.67
* 2. tTransitionWindow - 12 to 20 uSec
* 3. tInterframGap - uSec
*
* hbit_clk = HSI_clk / 27 = 592.6 kHz = 1.687 uSec period
* tTransitionWindow = 1.687 uS * 8 = 13.5 uS
* tInterFrameGap = 1.687 uS * 17 = 28.68 uS
*/
psc-ucpdclk = <1>;
hbitclkdiv = <27>;
pinctrl-0 = <&ucpd1_cc1_pa8 &ucpd1_cc2_pb15>;
pinctrl-names = "default";
};
&ucpd2 {
status = "okay";
/*
* UCPD is fed directly from HSI which is @ 16MHz. The ucpd_clk goes to
* a prescaler who's output feeds the 'half-bit' divider which is used
* to generate clock for delay counters and BMC Rx/Tx blocks. The rx is
* designed to work in freq ranges of 6 <--> 18 MHz, however recommended
* range is 9 <--> 18 MHz.
*
* +-------+ @ 16 MHz +-------+ @ ~600 kHz +-----------+
* HSI ---->| /psc |--------->| /hbit |--------------->| trans_cnt |
* +-------+ +-------+ | +-----------+
* | +-----------+
* +----------->| ifrgap_cnt|
* +-----------+
* Requirements:
* 1. hbit_clk ~= 600 kHz: 16 MHz / 600 kHz = 26.67
* 2. tTransitionWindow - 12 to 20 uSec
* 3. tInterframGap - uSec
*
* hbit_clk = HSI_clk / 27 = 592.6 kHz = 1.687 uSec period
* tTransitionWindow = 1.687 uS * 8 = 13.5 uS
* tInterFrameGap = 1.687 uS * 17 = 28.68 uS
*/
psc-ucpdclk = <1>;
hbitclkdiv = <27>;
pinctrl-0 = <&ucpd2_cc1_pd0 &ucpd2_cc2_pd2>;
pinctrl-names = "default";
};
&iwdg {
status = "okay";
};
&vref {
status = "okay";
};
&vbat {
status = "okay";
};
``` | /content/code_sandbox/boards/st/stm32g081b_eval/stm32g081b_eval.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,947 |
```yaml
identifier: stm32g081b_eval
name: ST STM32G081B Evaluation
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 32
flash: 128
supported:
- adc
- uart
- gpio
- watchdog
- tcpc
vendor: st
``` | /content/code_sandbox/boards/st/stm32g081b_eval/stm32g081b_eval.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 87 |
```yaml
board:
name: stm32g081b_eval
vendor: st
socs:
- name: stm32g081xx
``` | /content/code_sandbox/boards/st/stm32g081b_eval/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```unknown
config BOARD_STM32G081B_EVAL
select SOC_STM32G081XX
``` | /content/code_sandbox/boards/st/stm32g081b_eval/Kconfig.stm32g081b_eval | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 21 |
```restructuredtext
.. _stm32wb5mmg_bluetooth_module:
ST STM32WB5MMG
################
Overview
********
STM32WB5MMG is an ultra-low-power and small form factor certified 2.4 GHz
wireless module. It supports Bluetooth|reg| Low Energy 5.4, Zigbee|reg| 3.0,
OpenThread, dynamic, and static concurrent modes, and 802.15.4 proprietary
protocols. This board support is added in order to make it possible use this
module on other boards as HCI layer (Specefically B-U585I-IOT02A Development board).
STM32WB5MMG supports the following features:
- Bluetooth module in SiP-LGA86 package
- Integrated chip antenna
- Bluetooth|reg| Low Energy 5.4, Zigbee|reg| 3.0, OpenThread certified
Dynamic and static concurrent modes
- IEEE 802.15.4-2011 MAC PHY Supports 2 Mbits/s
- Frequency band 2402-2480 MHz
- Advertising extension
- Tx output power up to +6 dBm
- Rx sensitivity: -96 dBm (Bluetooth|reg| Low Energy at 1 Mbps), -100 dBm (802.15.4)
- Range: up to 75 meters
- Dedicated Arm|reg| Cortex|reg|-M0+ CPU for radio and security tasks
- Dedicated Arm|reg| Cortex|reg|-M4 CPU with FPU and ART (adaptive real-time accelerator) up to 64 MHz speed
- 1-Mbyte flash memory, 256-Kbyte SRAM
- Fully integrated BOM, including 32 MHz radio and 32 kHz RTC crystals
- Integrated SMPS
- Ultra-low-power modes for battery longevity
- 68 GPIOs
- SWD, JTAG
.. image:: img/STM32WB5MMG.jpg
:align: center
:alt: STM32WB5MMG
More information about the board can be found at the `` `STM32WB5MMG on www.st.com`_.
Hardware
********
STM32WB5MMG is an ultra-low-power and small form factor certified 2.4 GHz
wireless module. It supportsBluetooth|reg| Low Energy 5.4, Zigbee|reg| 3.0, OpenThread,
dynamic, and static concurrent modes, and 802.15.4proprietary protocols. Based
on the STMicroelectronics STM32WB55VGY wireless microcontroller,STM32WB5MMG
provides best-in-class RF performance thanks to its high receiver sensitivity
and output power signal. Its low-power features enable extended battery life,
small coin-cell batteries, and energy harvesting. STM32WB5MMG revision Y is
based on cut 2.1 of the STM32WB55VGY microcontroller. Revision X is based on
cut 2.2.
- Ultra-low-power with FlexPowerControl (down to 600 nA Standby mode with RTC and 32KB RAM)
- Core: ARM |reg| 32-bit Cortex |reg|-M4 CPU with FPU, frequency up to 64 MHz
- Radio:
- 2.4GHz
- RF transceiver supporting Bluetooth|reg| 5.4
specification, IEEE 802.15.4-2011 PHY
and MAC, supporting Thread 1.3 and
- Zigbee|reg| 3.0
- RX sensitivity: -96 dBm (Bluetooth |reg| Low
Energy at 1 Mbps), -100 dBm (802.15.4)
- Programmable output power up to +6 dBm
with 1 dB steps
- Integrated balun to reduce BOM
- Support for 2 Mbps
- Support GATT caching
- Support EATT (enhanced ATT)
- Support advertising extension
- Dedicated Arm|reg| 32-bit Cortex|reg| M0+ CPU
for real-time Radio layer
- Accurate RSSI to enable power control
- Suitable for systems requiring compliance
with radio frequency regulations ETSI EN
300 328, EN 300 440, FCC CFR47 Part 15
and ARIB STD-T66
- Clock Sources:
- 32 MHz crystal oscillator with integrated
trimming capacitors (Radio and CPU clock)
- 32 kHz crystal oscillator for RTC (LSE)
- Internal low-power 32 kHz (5%) RC (LSI1)
- Internal low-power 32 kHz (stability
500 ppm) RC (LSI2)
- Internal multispeed 100 kHz to 48 MHz
oscillator, auto-trimmed by LSE (better than
0.25% accuracy)
- High speed internal 16 MHz factory
trimmed RC (1%)
- 2x PLL for system clock, USB, SAI, ADC
- 2x DMA controllers (seven channels each) supporting ADC, SPI, I2C, USART, QSPI, SAI, AES, timers
- 1x USART (ISO 7816, IrDA, SPI master, Modbus and Smartcard mode)
- 1x LPUART (low power)
- Two SPI running at 32 Mbit/s
- 2x I2C (SMBus/PMBus)
- 1x SAI (dual channel high quality audio)
- 1x USB 2.0 FS device, crystal-less, BCD and LPM
- 1x Touch sensing controller, up to 18 sensors
- 1x LCD 8x40 with step-up converter
- 1x 16-bit, four channels advanced timer
- 2x 16-bit, two channels timers
- 1x 32-bit, four channels timer
- 2x 16-bit ultra-low-power timers
- 1x independent Systick
- 1x independent watchdog
- 1x window watchdog
- Up to 72 fast I/Os, 70 of them 5 V-tolerant
- Memories
- Up to 1 MB flash memory with sector
protection (PCROP) against R/W
operations, enabling radio stack and
application
- Up to 256 KB SRAM, including 64 KB with
hardware parity check
- 20x 32-bit backup register
- Boot loader supporting USART, SPI, I2C
and USB interfaces
- OTA (over the air) Bluetooth Low Energy
and 802.15.4 update
- Quad SPI memory interface with XIP
- 1 Kbyte (128 double words) OTP
- 4x digital filters for sigma delta modulator
- Rich analog peripherals (down to 1.62 V)
- 12-bit ADC 4.26 Msps, up to 16-bit with
hardware oversampling, 200 A/Msps
- 2x ultra-low-power comparator
- Accurate 2.5 V or 2.048 V reference
voltage buffered output
- Security and ID
- Secure firmware installation (SFI) for
Bluetooth|reg| Low Energy and 802.15.4 SW stack
- 3x hardware encryption AES maximum 256-bit for
the application, the Bluetooth|reg|
- Low Energy and IEEE802.15.4
- Customer key storage/manager services
- HW public key authority (PKA)
- Cryptographic algorithms: RSA, Diffie-Helman, ECC over GF(p)
- True random number generator (RNG)
- Sector protection against R/W operation (PCROP)
- CRC calculation unit
- Die information: 96-bit unique ID
- IEEE 64-bit unique ID, possibility to derive 802.15.4 64-bit
and Bluetooth|reg| Low Energy
- 48-bit EUI
More information about STM32WB55RG can be found here:
- `STM32WB5MMG on www.st.com`_
- `STM32WB5MMG datasheet`_
Supported Features
==================
The Zephyr STM32WB5MMG board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| RADIO | on-chip | Bluetooth Low Energy |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported on this Zephyr port.
The default configuration can be found in the defconfig file:
:zephyr_file:`boards/st/stm32wb5mmg/stm32wb5mmg_defconfig`
Bluetooth and compatibility with STM32WB Copro Wireless Binaries
================================================================
To operate bluetooth on STM32WB5MMG, Cortex-M0 core should be flashed with
a valid STM32WB Coprocessor binaries (either 'Full stack' or 'HCI Layer').
These binaries are delivered in STM32WB Cube packages, under
Projects/STM32WB_Copro_Wireless_Binaries/STM32WB5x/
For compatibility information with the various versions of these binaries,
please check `modules/hal/stm32/lib/stm32wb/hci/README`_
in the hal_stm32 repo.
Note that since STM32WB Cube package V1.13.2, "full stack" binaries are not compatible
anymore for a use in Zephyr and only "HCI Only" versions should be used on the M0
side.
Connections and IOs
===================
Default Zephyr Peripheral Mapping:
----------------------------------
.. rst-class:: rst-columns
- UART_1 TX/RX : PB7/PB6
- LPUART_1 TX/RX : PA3/PA2
- USB : PA11/PA12
- SWD : PA13/PA14
System Clock
------------
STM32WB5MMG System Clock could be driven by internal or external oscillator,
as well as main PLL clock. By default System clock is driven by HSE clock at 32MHz.
Serial Port
-----------
STM32WB5MMG board has 2 (LP)U(S)ARTs. LPUART1 is connected to the main U585I
microcontroller that is used as HCI controller port. USART1 is not connected
to any external pinout, so it is not possible to debug the module directly.
Rather, users can use the available USB port (CN12) to run virtual com port
(VCP) USB stack for the debugging.
Programming and Debugging
*************************
Applications for the ``stm32wb5mmg`` board configuration can be built the
usual way (see :ref:`build_an_application`).
Flashing the module
===================
The onboard ST-Link on the ``b_u585i_iot02a`` board can be used to flash the
STM32WB5MMG module. To do this you should put SW4 on OFF and SW5 on ON mode.
In this case the firmware will be uploaded on the STM32WB5MMG module.
Flashing `hci_uart` application to STM32WB5MMG
----------------------------------------------
Connect the B-U585I-IOT02A to your host computer using the USB port. Put
the SW4 (MCU SWD) in OFF mode and SW5 (SWD BLE) in ON mode. Then build
and flash an application. Here is an example for the
:ref:`hci_uart <bluetooth-hci-uart-sample>` application.
Run a serial host program to connect with your B-U585I-IOT02A board:
.. code-block:: console
$ minicom -D /dev/ttyACM0
Then build and flash the application for the STM32WB5MMG module.
.. zephyr-app-commands::
:zephyr-app: samples/bluetooth/hci_uart
:board: stm32wb5mmg
:goals: build flash
Next, reverse back the buttons to default mode (SW4 on ON and SW5
on OFF) mode. In this case we will upload the Bluetooth sample on the
main microcontroller.Then, build the bluetooth
:zephyr_file:`samples/bluetooth/observer` demo application for
B-U585I-IOT02A board:
.. zephyr-app-commands::
:zephyr-app: samples/bluetooth/observer
:board: b_u585i_iot02a
:goals: build flash
Rest the board and you should see the following messages on the console:
.. code-block:: console
Starting Observer Demo
Started scanning...
Exiting main thread.
Device found: 2C:98:F3:64:58:06 (random) (RSSI -82), type 3, AD data len 31
Device found: CE:5B:9A:87:69:4F (random) (RSSI -80), type 3, AD data len 8
Device found: 7B:1E:DD:38:23:E1 (random) (RSSI -85), type 0, AD data len 17
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:ref:`hci_uart <bluetooth-hci-uart-sample>` application.
.. zephyr-app-commands::
:zephyr-app: samples/bluetooth/observer
:board: b_u585i_iot02a
:maybe-skip-config:
:goals: debug
.. _STM32WB5MMG on www.st.com:
path_to_url
.. _STM32WB5MMG datasheet:
path_to_url
.. _modules/hal/stm32/lib/stm32wb/hci/README:
path_to_url
``` | /content/code_sandbox/boards/st/stm32wb5mmg/doc/stm32wb5mmg.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,987 |
```unknown
#
# Serial Drivers
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# GPIO Controller
CONFIG_GPIO=y
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/stm32g071b_disco/stm32g071b_disco_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 58 |
```cmake
board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake)
``` | /content/code_sandbox/boards/st/stm32g071b_disco/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 47 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/g0/stm32g071Xb.dtsi>
#include <st/g0/stm32g071r(6-8-b)tx-pinctrl.dtsi>
#include <zephyr/dt-bindings/sensor/ina230.h>
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "STM32G071B DEMO board";
compatible = "st,stm32g071-demo";
chosen {
zephyr,console = &usart3;
zephyr,shell-uart = &usart3;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
};
leds {
compatible = "gpio-leds";
red_led_4: led4 {
gpios = <&gpiod 9 GPIO_ACTIVE_HIGH>;
label = "TO_REC";
};
red_led_5: led5 {
gpios = <&gpiod 8 GPIO_ACTIVE_HIGH>;
label = "TO_PLUG";
};
green_led_6: led6 {
gpios = <&gpiod 5 GPIO_ACTIVE_HIGH>;
label = "SINK_SPY";
};
green_led_7: led7 {
gpios = <&gpioc 12 GPIO_ACTIVE_HIGH>;
label = "SOURCE";
};
};
gpio_keys {
compatible = "gpio-keys";
joy_sel: button0 {
label = "JOY_SEL";
gpios = <&gpioc 0 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
zephyr,code = <INPUT_KEY_ENTER>;
};
joy_left: button1 {
label = "JOY_LEFT";
gpios = <&gpioc 1 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
zephyr,code = <INPUT_KEY_LEFT>;
};
joy_down: button2 {
label = "JOY_DOWN";
gpios = <&gpioc 2 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
zephyr,code = <INPUT_KEY_DOWN>;
};
joy_right: button3 {
label = "JOY_RIGHT";
gpios = <&gpioc 3 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
zephyr,code = <INPUT_KEY_RIGHT>;
};
joy_up: button4 {
label = "JOY_UP";
gpios = <&gpioc 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
zephyr,code = <INPUT_KEY_UP>;
};
};
cc_config {
compatible = "gpio-leds";
encc1 {
gpios = <&gpiob 10 GPIO_ACTIVE_HIGH>;
label = "ENCC1";
};
encc2 {
gpios = <&gpiob 11 GPIO_ACTIVE_HIGH>;
label = "ENCC2";
};
rdcc1 {
gpios = <&gpiob 12 GPIO_ACTIVE_LOW>;
label = "RDCC1";
};
};
aliases {
led0 = &red_led_4;
led1 = &red_led_5;
led2 = &green_led_6;
led3 = &green_led_7;
sw0 = &joy_sel;
sw1 = &joy_left;
sw2 = &joy_down;
sw3 = &joy_right;
sw4 = &joy_up;
watchdog0 = &iwdg;
};
};
&clk_hsi {
status = "okay";
};
&pll {
div-m = <1>;
mul-n = <8>;
div-p = <2>;
div-q = <2>;
div-r = <2>;
clocks = <&clk_hsi>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(64)>;
ahb-prescaler = <1>;
apb1-prescaler = <1>;
};
&usart3 {
pinctrl-0 = <&usart3_tx_pc10 &usart3_rx_pc11>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&i2c1 {
status = "okay";
pinctrl-0 = <&i2c1_scl_pb6 &i2c1_sda_pb7>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
/*
* Use U10, INA230 to measure VBUS. I2C Address: 0x40
*/
vbus_meas: ina230@40 {
status = "okay";
compatible = "ti,ina230";
reg = <0x40>;
adc-mode = "Bus voltage continuous";
vbus-conversion-time-us = <1100>;
vshunt-conversion-time-us = <1100>;
avg-count = <1>;
current-lsb-microamps = <1000>;
rshunt-micro-ohms = <15000>;
};
};
&ucpd1 {
status = "okay";
/*
* UCPD is fed directly from HSI which is @ 16MHz. The ucpd_clk goes to
* a prescaler who's output feeds the 'half-bit' divider which is used
* to generate clock for delay counters and BMC Rx/Tx blocks. The rx is
* designed to work in freq ranges of 6 <--> 18 MHz, however recommended
* range is 9 <--> 18 MHz.
*
* +-------+ @ 16 MHz +-------+ @ ~600 kHz +-----------+
* HSI ---->| /psc |--------->| /hbit |--------------->| trans_cnt |
* +-------+ +-------+ | +-----------+
* | +-----------+
* +----------->| ifrgap_cnt|
* +-----------+
* Requirements:
* 1. hbit_clk ~= 600 kHz: 16 MHz / 600 kHz = 26.67
* 2. tTransitionWindow - 12 to 20 uSec
* 3. tInterframGap - uSec
*
* hbit_clk = HSI_clk / 27 = 592.6 kHz = 1.687 uSec period
* tTransitionWindow = 1.687 uS * 8 = 13.5 uS
* tInterFrameGap = 1.687 uS * 17 = 28.68 uS
*/
psc-ucpdclk = <1>;
hbitclkdiv = <27>;
pinctrl-0 = <&ucpd1_cc1_pa8 &ucpd1_cc2_pb15>;
pinctrl-names = "default";
};
&iwdg {
status = "okay";
};
``` | /content/code_sandbox/boards/st/stm32g071b_disco/stm32g071b_disco.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,542 |
```unknown
config BOARD_STM32G071B_DISCO
select SOC_STM32G071XX
``` | /content/code_sandbox/boards/st/stm32g071b_disco/Kconfig.stm32g071b_disco | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 22 |
```yaml
identifier: stm32g071b_disco
name: ST STM32G071B Discovery
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 36
flash: 128
supported:
- uart
- gpio
- i2c
- watchdog
- tcpc
vendor: st
``` | /content/code_sandbox/boards/st/stm32g071b_disco/stm32g071b_disco.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 90 |
```yaml
board:
name: stm32g071b_disco
vendor: st
socs:
- name: stm32g071xx
``` | /content/code_sandbox/boards/st/stm32g071b_disco/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 33 |
```restructuredtext
.. _stm32g081b_eval_board:
ST STM32G081B Evaluation
########################
Overview
********
The STM32G081B-EVAL Evaluation board is a high-end development platform, for
Arm Cortex-M0+ core-based STM32G081RBT6 microcontroller, with USB Type-C and
power delivery controller interfaces (UCPD), compliant with USB type-C r1.2
and USB PD specification r3.0, two I2Cs, two SPIs, five USARTs, one LP UART,
one 12-bit ADC, two 12-bit DACs, two GP comparators, two LP timers, internal
32 KB SRAM and 128 KB Flash, CEC, SWD debugging support. The full range of
hardware features on the STM32G081B-EVAL Evaluation board includes a mother
board, a legacy peripheral daughterboard and a USB-C and Power Delivery
daughterboard, which help to evaluate all peripherals (USB Type-C connector
with USB PD, motor control connector, RS232, RS485, Audio DAC, microphone ADC,
TFT LCD, IrDA, IR LED, IR receiver, LDR, MicroSD card, CEC on two HDMI
connectors, smart card slot, RF E2PROM & Temperature sensor), and to develop
applications.
The board integrates an ST-LINK/V2-1 as an embedded in-circuit debugger and
programmer for the STM32 MCU. The daughterboard and extension connectors
provide an easy way to connect a daughterboard or wrapping board for the
user's specific applications.
The USB-C and Power Delivery daughterboard
features two independent USB-C ports controlled by an STM32G0. USB-C port 1
is dual role power (DRP) and can provide up-to 45 W. USB-C Port 2 is sink
only. Both support USB PD protocol and alternate mode functionality.
Application firmware examples are provided to evaluate the USB-C technology
through various use cases.
- Mother board
- STM32G081RBT6 microcontroller with 128 Kbytes of Flash memory and
32 Kbytes of RAM in LQFP64 package
- MCU voltage choice fixed 3.3 V or adjustable from 1.65 V to 3.6 V
- I2C compatible serial interface
- RTC with backup battery
- 8-Gbyte or more SPI interface microSD card
- Potentiometer
- 4 color user LEDs and one LED as MCU low-power alarm
- Reset, Tamper and User buttons
- 4-direction control and selection joystick
- Board connectors:
- 5 V power jack
- RS-232 and RS485 communications
- Stereo audio jack including analog microphone input
- microSD card
- Extension I2C connector
- Motor-control connector
- Board extension connectors:
- Daughterboard connectors for legacy peripheral daughter board or
USB-C daughterboard
- Extension connectors for daughterboard or wire-wrap board
- Flexible power-supply options:
- 5 V power jack
- ST-LINK/V2-1 USB connector
- Daughterboard
- On-board ST-LINK/V2-1 debugger/programmer with USB re-enumeration
capability: mass storage, virtual COM port and debug port
- Legacy peripheral daughterboard
- IrDA transceiver
- IR LED and IR receiver
- Light dependent resistor (LDR)
- Temperature Sensor
- Board connectors:
- Two HDMI connectors with DDC and CEC
- Smart card slot
- USB-C and Power Delivery daughterboard
- Mux for USB3.1 Gen1 / DisplayPort input and Type-C port1 output
- Mux for Type-C port2 input and DisplayPort output / USB2.0
- VCONN on Type-C port1
- USB PD on Type-C port1
- Board connectors:
- Type-C port1 DRP (dual-role port)
- Type-C port2 Sink
- DisplayPort input
- DisplayPort output
- USB 3.1 Gen1 Type-B receptacle
- USB2.0 Type-A receptacle
- 19 V power jack for USB PD
.. image:: img/stm32g081b_eval.jpg
:align: center
:alt: STM32G081B-EVAL
More information about the board can be found at the `STM32G081B-EVAL website`_.
More information about STM32G081RB can be found here:
- `G081RB on www.st.com`_
- `STM32G081 reference manual`_
Supported Features
==================
The Zephyr stm32g081b_eval board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| UCPD | on-chip + ucpd |
+-----------+------------+-------------------------------------+
| ADC | on-chip | adc |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | independent watchdog |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported in this Zephyr port.
The default configuration can be found in the defconfig file:
:zephyr_file:`boards/st/stm32g081b_eval/stm32g081b_eval_defconfig`
Connections and IOs
===================
Each of the GPIO pins can be configured by software as output (push-pull or open-drain), as
input (with or without pull-up or pull-down), or as peripheral alternate function. Most of the
GPIO pins are shared with digital or analog alternate functions. All GPIOs are high current
capable except for analog inputs.
Default Zephyr Peripheral Mapping:
----------------------------------
- UART_3 TX/RX : PC10/PC11 (ST-Link Virtual Port Com)
- UCPD2 : PD0/PD2
- BUTTON (JOY_SEL) : PA0
- BUTTON (JOY_LEFT) : PC8
- BUTTON (JOY_DOWN) : PC3
- BUTTON (JOY_RIGHT) : PC7
- BUTTON (JOY_UP) : PC2
- VBUS DISCHARGE : PB14
- LED1 : PD5
- LED2 : PD6
- LED3 : PD8
- LED4 : PD9
For more details please refer to `STM32G0 Evaluation board User Manual`_.
Programming and Debugging
*************************
Applications for the ``stm32g081b_eval`` board configuration can be built and
flashed in the usual way (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Flashing
========
The STM32G081B Evaluation board includes an ST-LINK/V2-1 embedded debug tool interface.
.. code-block:: console
$ west flash
Flashing an application to the STM32G081B_EVAL
----------------------------------------------
Here is an example for the :zephyr:code-sample:`blinky` application.
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: stm32g081b_eval
:goals: build flash
You will see the LED blinking every second.
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: stm32g081b_eval
:maybe-skip-config:
:goals: debug
References
**********
.. target-notes::
.. _STM32G081B-EVAL website:
path_to_url
.. _STM32G081 reference manual:
path_to_url
.. _STM32G0 Evaluation board User Manual:
path_to_url
.. _G081RB on www.st.com:
path_to_url
``` | /content/code_sandbox/boards/st/stm32g081b_eval/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,802 |
```cmake
board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
board_runner_args(jlink "--device=STM32H755ZI" "--speed=3300")
if(CONFIG_BOARD_NUCLEO_H755ZI_Q_STM32H755XX_M7)
board_runner_args(openocd --target-handle=_CHIPNAME.cpu0)
elseif(CONFIG_BOARD_NUCLEO_H755ZI_Q_STM32H755XX_M4)
board_runner_args(openocd --target-handle=_CHIPNAME.cpu1)
endif()
include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake)
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/st/nucleo_h755zi_q/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 177 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/h7/stm32h755Xi_m7.dtsi>
#include "nucleo_h755zi_q.dtsi"
/*
* WARNING:
* Possible pin conflicts: The pins PA2 and PB13 may conflict on selection of
* ETH_STM32_HAL, since they are used in ST Zio or ST morpho connectors. To
* avoid conflicting states the jumpers JP6 and JP7 must be in ON state.
*/
/ {
model = "STMicroelectronics STM32H755ZI-Q-NUCLEO board";
compatible = "st,stm32h755zi-q-nucleo";
/* HW resources belonging to CM7 */
chosen {
zephyr,console = &usart3;
zephyr,shell-uart = &usart3;
zephyr,dtcm = &dtcm;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
};
pwmleds {
compatible = "pwm-leds";
red_pwm_led: red_pwm_led {
pwms = <&pwm12 1 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
label = "User LD3 - PWM12";
};
};
aliases {
led0 = &green_led;
pwm-led0 = &red_pwm_led;
sw0 = &user_button;
};
};
&clk_lsi {
status = "okay";
};
&clk_hsi48 {
status = "okay";
};
&clk_hse {
hse-bypass;
clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
status = "okay";
};
&pll {
div-m = <1>;
mul-n = <120>;
div-p = <2>;
div-q = <8>;
div-r = <2>;
clocks = <&clk_hse>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(480)>;
};
&usart3 {
pinctrl-0 = <&usart3_tx_pd8 &usart3_rx_pd9>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB4 0x00010000>,
<&rcc STM32_SRC_LSI RTC_SEL(2)>;
status = "okay";
};
&i2c1 {
pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
&timers12 {
st,prescaler = <10000>;
status = "okay";
pwm12: pwm {
status = "okay";
pinctrl-0 = <&tim12_ch1_pb14>;
pinctrl-names = "default";
};
};
&mac {
status = "okay";
pinctrl-0 = <ð_ref_clk_pa1
ð_crs_dv_pa7
ð_rxd0_pc4
ð_rxd1_pc5
ð_tx_en_pg11
ð_txd0_pg13
ð_txd1_pb13>;
pinctrl-names = "default";
};
&mdio {
status = "okay";
pinctrl-0 = <ð_mdio_pa2 ð_mdc_pc1>;
pinctrl-names = "default";
ethernet-phy@0 {
compatible = "ethernet-phy";
reg = <0x00>;
status = "okay";
};
};
&rng {
status = "okay";
};
zephyr_udc0: &usbotg_fs {
pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12>;
pinctrl-names = "default";
status = "okay";
};
``` | /content/code_sandbox/boards/st/nucleo_h755zi_q/nucleo_h755zi_q_stm32h755xx_m7.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 868 |
```unknown
# Enable GPIO
CONFIG_GPIO=y
# Enable clock
CONFIG_CLOCK_CONTROL=y
# By default SERIAL peripherals are assigned to m7
# Enable uart driver
#CONFIG_SERIAL=y
# Console
#CONFIG_CONSOLE=y
#CONFIG_UART_CONSOLE=y
# Enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/nucleo_h755zi_q/nucleo_h755zi_q_stm32h755xx_m4_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 64 |
```yaml
identifier: nucleo_h755zi_q/stm32h755xx/m4
name: ST Nucleo H755ZI-Q (M4)
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
ram: 288
flash: 1024
supported:
- arduino_gpio
- gpio
- netif:eth
testing:
ignore_tags:
- mpu
- nfc
vendor: st
``` | /content/code_sandbox/boards/st/nucleo_h755zi_q/nucleo_h755zi_q_stm32h755xx_m4.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 108 |
```unknown
# Enable the internal SMPS regulator
CONFIG_POWER_SUPPLY_DIRECT_SMPS=y
# Enable MPU
CONFIG_ARM_MPU=y
# Enable HW stack protection
CONFIG_HW_STACK_PROTECTION=y
# Enable UART (disable to assign to M4 core)
CONFIG_SERIAL=y
# Console (disable to assign to M4 core)
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# Enable GPIO
CONFIG_GPIO=y
# Enable Clock
CONFIG_CLOCK_CONTROL=y
# Enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/nucleo_h755zi_q/nucleo_h755zi_q_stm32h755xx_m7_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 104 |
```yaml
identifier: nucleo_h755zi_q/stm32h755xx/m7
name: ST Nucleo H755ZI-Q (M7)
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
ram: 512
flash: 1024
supported:
- arduino_gpio
- arduino_i2c
- uart
- gpio
- counter
- i2c
- pwm
- netif:eth
- usb_device
vendor: st
``` | /content/code_sandbox/boards/st/nucleo_h755zi_q/nucleo_h755zi_q_stm32h755xx_m7.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 123 |
```restructuredtext
.. _stm32g071b_disco_board:
ST STM32G071B Discovery
#######################
Overview
********
The STM32G071B-DISCO Discovery board is a demonstration and development platform
for the STMicroelectronics Arm Cortex -M0+ core-based STM32G071RB USB Type-C
and Power Delivery microcontroller. The STM32G071B-DISCO Discovery board is
presented with all necessary interfaces for easy connection and
interoperability with other USB Type-C devices. The STM32G071B-DISCO Discovery
board is intended for discovery and display of USB Type-C port characteristics
such as data role, power role, VBUS and IBUS monitoring. It offers an advanced
user mode when associated with the STM32CubeMonUCPD software GUI and can be used
as a USB Type-C and Power Delivery analyzer.
- STM32G071RBT6 microcontroller featuring 128 Kbytes of Flash memory and
32 Kbytes of RAM in LQFP64 package
- Plastic case
- 1 128 x 64 pixels OLED LCD module with SPI interface
- USB Type-C interface plug cable and receptacle connector accessible by door
with reed sensor detection
- 3 bidirectional current and power monitors with I2C interface to measure VBUS,
CC1 and CC2 protected and isolated lines
- On-board DC/DC converter to sustain power supply with VBUS varying from 3 V to
20 V (+/- 5 %)
- 4 user status LEDs about USB Type-C configuration
- 3 LEDs for power and ST-LINK communication
- 4-way joystick with selection button
- 1 reset push-button
- Board external connectors:
- USB Type-C plug cable
- USB Type-C receptacle connector
- 8-pin user extension connector including ADC, SPI, USART and
I2C communication signals
- USB with Micro-AB (ST-LINK)
- Board internal connectors:
- 2 x 8-pin GPIOs free pins from microcontroller
(accessible internally when case is removed)
- USB Type-C test points for main signals
- Flexible power-supply options: ST-LINK USB VBUS or USB Type-C VBUS
- On-board ST-LINK/V2-1 debugger/programmer with USB enumeration capability:
mass storage, Virtual COM port and debug port
.. image:: img/stm32g071b_disco.jpg
:align: center
:alt: STM32G071B-DISCO
More information about the board can be found at the `STM32G071B-DISCO website`_.
More information about STM32G071RB can be found here:
- `G071RB on www.st.com`_
- `STM32G071 reference manual`_
Supported Features
==================
The Zephyr stm32g071b_disco board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| UCPD | on-chip | ucpd |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | independent watchdog |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported in this Zephyr port.
The default configuration can be found in the defconfig file:
:zephyr_file:`boards/st/stm32g071b_disco/stm32g071b_disco_defconfig`
Connections and IOs
===================
Each of the GPIO pins can be configured by software as output (push-pull or open-drain), as
input (with or without pull-up or pull-down), or as peripheral alternate function. Most of the
GPIO pins are shared with digital or analog alternate functions. All GPIOs are high current
capable except for analog inputs.
Default Zephyr Peripheral Mapping:
----------------------------------
- UART_3 TX/RX : PC10/PC11 (ST-Link Virtual Port Com)
- UCPD1 : PA8/PB15
- BUTTON (JOY_SEL) : PC0
- BUTTON (JOY_LEFT) : PC1
- BUTTON (JOY_DOWN) : PC2
- BUTTON (JOY_RIGHT) : PC3
- BUTTON (JOY_UP) : PC4
- LED (TO_REC) : PD9
- LED (TO_PLUG) : PD8
- LED (SINK_SPY) : PD5
- LED (SOURCE) : PC12
- ENCC1 : PB10 (Enable CC1)
- ENCC2 : PB11 (Enable CC2)
- RDCC1 : PB12 (Enable Door Sense on CC1)
For more details please refer to `STM32G0 Discovery board User Manual`_.
Programming and Debugging
*************************
Applications for the ``stm32g071b_disco`` board configuration can be built and
flashed in the usual way (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Flashing
========
The STM32G071B Discovery board includes an ST-LINK/V2-1 embedded debug tool interface.
.. code-block:: console
$ west flash
Flashing an application to the STM32G071B_DISCO
-----------------------------------------------
Here is an example for the :zephyr:code-sample:`blinky` application.
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: stm32g071b_disco
:goals: build flash
You will see the LED blinking every second.
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: stm32g071b_disco
:maybe-skip-config:
:goals: debug
References
**********
.. target-notes::
.. _STM32G071B-DISCO website:
path_to_url
.. _STM32G071 reference manual:
path_to_url
.. _STM32G0 Discovery board User Manual:
path_to_url
.. _G071RB on www.st.com:
path_to_url
``` | /content/code_sandbox/boards/st/stm32g071b_disco/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,451 |
```unknown
/*
*
*/
#include <st/h7/stm32h755zitx-pinctrl.dtsi>
#include "arduino_r3_connector.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
leds: leds {
compatible = "gpio-leds";
green_led: led_1 {
gpios = <&gpioa 5 GPIO_ACTIVE_HIGH>;
label = "User LD1";
};
yellow_led: led_2 {
gpios = <&gpioe 1 GPIO_ACTIVE_HIGH>;
label = "User LD2";
};
red_led: led_3 {
gpios = <&gpiob 14 GPIO_ACTIVE_HIGH>;
label = "User LD3";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button_0 {
gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>;
label = "User SB1";
zephyr,code = <INPUT_KEY_0>;
};
};
};
&rcc {
d1cpre = <1>;
hpre = <2>;
d1ppre = <2>;
d2ppre1 = <2>;
d2ppre2 = <2>;
d3ppre = <2>;
};
&mailbox {
status = "okay";
};
``` | /content/code_sandbox/boards/st/nucleo_h755zi_q/nucleo_h755zi_q.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 294 |
```yaml
board:
name: nucleo_h755zi_q
vendor: st
socs:
- name: stm32h755xx
``` | /content/code_sandbox/boards/st/nucleo_h755zi_q/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```unknown
# STM32H755ZI Nucleo board configuration
if BOARD_NUCLEO_H755ZI_Q
if NETWORKING
config NET_L2_ETHERNET
default y
endif # NETWORKING
endif # BOARD_NUCLEO_H755ZI_Q
``` | /content/code_sandbox/boards/st/nucleo_h755zi_q/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 59 |
```unknown
# STM32H755ZI Nucleo board configuration
config BOARD_NUCLEO_H755ZI_Q
select SOC_STM32H755XX_M7 if BOARD_NUCLEO_H755ZI_Q_STM32H755XX_M7
select SOC_STM32H755XX_M4 if BOARD_NUCLEO_H755ZI_Q_STM32H755XX_M4
``` | /content/code_sandbox/boards/st/nucleo_h755zi_q/Kconfig.nucleo_h755zi_q | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 86 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/h7/stm32h755Xi_m4.dtsi>
#include "nucleo_h755zi_q.dtsi"
/ {
model = "STMicroelectronics STM32H755ZI-Q-NUCLEO board";
compatible = "st,stm32h755zi-q-nucleo";
/* HW resources belonging to CM4 */
chosen {
zephyr,console = &uart8;
zephyr,shell-uart = &uart8;
zephyr,sram = &sram1;
zephyr,flash = &flash1;
};
aliases {
led0 = &yellow_led;
};
};
&uart8 {
pinctrl-0 = <&uart8_tx_pe1 &uart8_rx_pe0>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&rcc {
clock-frequency = <DT_FREQ_M(240)>;
};
``` | /content/code_sandbox/boards/st/nucleo_h755zi_q/nucleo_h755zi_q_stm32h755xx_m4.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 212 |
```unknown
/*
*
*/
/ {
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpioa 3 0>, /* A0 */
<1 0 &gpioc 0 0>, /* A1 */
<2 0 &gpioc 3 0>, /* A2 */
<3 0 &gpiob 1 0>, /* A3 */
<4 0 &gpioc 2 0>, /* A4 */
<5 0 &gpiof 11 0>, /* A5 */
<6 0 &gpiob 7 0>, /* D0 */
<7 0 &gpiob 6 0>, /* D1 */
<8 0 &gpiog 14 0>, /* D2 */
<9 0 &gpioe 13 0>, /* D3 */
<10 0 &gpioe 14 0>, /* D4 */
<11 0 &gpioe 11 0>, /* D5 */
<12 0 &gpioa 8 0>, /* D6 */
<13 0 &gpiog 12 0>, /* D7 */
<14 0 &gpiog 9 0>, /* D8 */
<15 0 &gpiod 15 0>, /* D9 */
<16 0 &gpiod 14 0>, /* D10 */
<17 0 &gpiob 5 0>, /* D11 */
<18 0 &gpioa 6 0>, /* D12 */
<19 0 &gpioa 5 0>, /* D13 */
<20 0 &gpiob 9 0>, /* D14 */
<21 0 &gpiob 8 0>; /* D15 */
};
};
arduino_i2c: &i2c1 {};
arduino_serial: &uart8 {};
``` | /content/code_sandbox/boards/st/nucleo_h755zi_q/arduino_r3_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 495 |
```ini
# STM32H745ZI Nucleo board OpenOCD ST-LINK V3 configuration
#
#
# Borrow the nucleo_h745zi openocd configuration as no config exists for the h755 yet.
source [find board/st_nucleo_h745zi.cfg]
# Use connect_assert_srst here to be able to program
# even when core is in sleep mode
reset_config srst_only srst_nogate connect_assert_srst
$_CHIPNAME.cpu0 configure -event gdb-attach {
echo "Debugger attaching: halting execution"
gdb_breakpoint_override hard
}
$_CHIPNAME.cpu0 configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
# Due to the use of connect_assert_srst, running gdb requires
# to reset halt just after openocd init.
rename init old_init
proc init {} {
old_init
reset halt
}
``` | /content/code_sandbox/boards/st/nucleo_h755zi_q/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 197 |
```yaml
identifier: nucleo_f756zg
name: ST Nucleo F756ZG
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 256
flash: 1024
supported:
- arduino_i2c
- arduino_gpio
- arduino_spi
- uart
- gpio
- netif:eth
- usb_device
- i2c
- pwm
- spi
- usbd
vendor: st
``` | /content/code_sandbox/boards/st/nucleo_f756zg/nucleo_f756zg.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 127 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/f7/stm32f756Xg.dtsi>
#include <st/f7/stm32f756zgtx-pinctrl.dtsi>
#include "arduino_r3_connector.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/*
* WARNING: The pin PA7 will conflict on selection of SPI_1 and ETH_STM32_HAL.
* If you require both peripherals, and you do not need Arduino Uno v3
* compatibility, the pin PB5 (also on ST Zio connector) can be used
* for the SPI_1 MOSI signal.
*/
/ {
model = "STMicroelectronics STM32F756ZG-NUCLEO board";
compatible = "st,stm32f756zg-nucleo";
chosen {
zephyr,console = &usart3;
zephyr,shell-uart = &usart3;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,dtcm = &dtcm;
};
leds: leds {
compatible = "gpio-leds";
green_led: led_0 {
gpios = <&gpiob 0 GPIO_ACTIVE_HIGH>;
label = "User LD1";
};
blue_led: led_1 {
gpios = <&gpiob 7 GPIO_ACTIVE_HIGH>;
label = "User LD2";
};
red_led: led_2 {
gpios = <&gpiob 14 GPIO_ACTIVE_HIGH>;
label = "User LD3";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button_0 {
label = "User";
gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>;
zephyr,code = <INPUT_KEY_0>;
};
};
aliases {
led0 = &green_led;
led1 = &blue_led;
led2 = &red_led;
sw0 = &user_button;
};
};
&clk_hse {
hse-bypass;
clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
status = "okay";
};
&pll {
div-m = <4>;
mul-n = <216>;
div-p = <2>;
div-q = <9>;
clocks = <&clk_hse>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(216)>;
ahb-prescaler = <1>;
apb1-prescaler = <4>;
apb2-prescaler = <2>;
};
&usart2 {
pinctrl-0 = <&usart2_tx_pd5 &usart2_rx_pd6
&usart2_rts_pd4 &usart2_cts_pd3>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&usart3 {
pinctrl-0 = <&usart3_tx_pd8 &usart3_rx_pd9>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&usart6 {
pinctrl-0 = <&usart6_tx_pg14 &usart6_rx_pg9>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
zephyr_udc0: &usbotg_fs {
pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12>;
pinctrl-names = "default";
status = "okay";
};
&i2c1 {
pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
&timers1 {
st,prescaler = <10000>;
status = "okay";
pwm1: pwm {
status = "okay";
pinctrl-0 = <&tim1_ch3_pe13>;
pinctrl-names = "default";
};
};
&spi1 {
pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pa7>;
pinctrl-names = "default";
cs-gpios = <&gpiod 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
status = "okay";
};
&mac {
status = "okay";
pinctrl-0 = <ð_mdc_pc1
ð_rxd0_pc4
ð_rxd1_pc5
ð_ref_clk_pa1
ð_mdio_pa2
ð_crs_dv_pa7
ð_tx_en_pg11
ð_txd0_pg13
ð_txd1_pb13>;
pinctrl-names = "default";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/*
* 256KB for bootloader. This is too large but
* there is no way to make the part smaller.
*/
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 DT_SIZE_K(256)>;
read-only;
};
/* application image slot: 256KB */
slot0_partition: partition@40000 {
label = "image-0";
reg = <0x00040000 DT_SIZE_K(256)>;
};
/* backup slot: 256KB */
slot1_partition: partition@80000 {
label = "image-1";
reg = <0x00080000 DT_SIZE_K(256)>;
};
/* scratch slot: 256KB */
scratch_partition: partition@C0000 {
label = "image-scratch";
reg = <0x000C0000 DT_SIZE_K(256)>;
};
};
};
``` | /content/code_sandbox/boards/st/nucleo_f756zg/nucleo_f756zg.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,360 |
```cmake
board_runner_args(jlink "--device=STM32F756ZG" "--speed=4000")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/st/nucleo_f756zg/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 56 |
Subsets and Splits
No community queries yet
The top public SQL queries from the community will appear here once available.