text stringlengths 9 39.2M | dir stringlengths 25 226 | lang stringclasses 163 values | created_date timestamp[s] | updated_date timestamp[s] | repo_name stringclasses 751 values | repo_full_name stringclasses 752 values | star int64 1.01k 183k | len_tokens int64 1 18.5M |
|---|---|---|---|---|---|---|---|---|
```unknown
config BOARD_STM32F769I_DISCO
select SOC_STM32F769XX
``` | /content/code_sandbox/boards/st/stm32f769i_disco/Kconfig.stm32f769i_disco | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 22 |
```ini
source [find board/stm32f769i-disco.cfg]
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset init
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
``` | /content/code_sandbox/boards/st/stm32f769i_disco/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 69 |
```unknown
# Enable MPU
CONFIG_ARM_MPU=y
# Enable HW stack protection
CONFIG_HW_STACK_PROTECTION=y
CONFIG_SERIAL=y
# console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# enable GPIO
CONFIG_GPIO=y
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/stm32f769i_disco/stm32f769i_disco_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 69 |
```cmake
board_runner_args(jlink "--device=STM32L072CZ" "--speed=4000")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/st/b_l072z_lrwan1/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 56 |
```unknown
config BOARD_B_L072Z_LRWAN1
select SOC_STM32L072XX
``` | /content/code_sandbox/boards/st/b_l072z_lrwan1/Kconfig.b_l072z_lrwan1 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 22 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/l0/stm32l072Xz.dtsi>
#include <st/l0/stm32l072c(b-z)tx-pinctrl.dtsi>
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "STMicroelectronics B-L072Z-LRWAN1 Discovery kit";
compatible = "st,stm32l072z-lrwan1";
chosen {
zephyr,console = &usart2;
zephyr,shell-uart = &usart2;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
};
leds {
compatible = "gpio-leds";
green_led_0: led_0 {
gpios = <&gpioa 5 GPIO_ACTIVE_HIGH>;
label = "Green LED 1";
};
green_led_1: led_1 {
gpios = <&gpiob 5 GPIO_ACTIVE_HIGH>;
label = "Green LED 2";
};
blue_led: led_2 {
gpios = <&gpiob 6 GPIO_ACTIVE_HIGH>;
label = "Blue LED";
};
red_led: led_3 {
gpios = <&gpiob 7 GPIO_ACTIVE_HIGH>;
label = "Red LED";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button_0 {
label = "Push button switch";
gpios = <&gpiob 2 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_0>;
};
};
/* These aliases are provided for compatibility with samples */
aliases {
led0 = &green_led_0;
led1 = &green_led_1;
led2 = &blue_led;
led3 = &red_led;
sw0 = &user_button;
eeprom-0 = &eeprom;
lora0 = &lora;
};
};
&clk_lse {
status = "okay";
};
&clk_hsi48 {
status = "okay";
};
&clk_hsi {
status = "okay";
};
&pll {
div = <2>;
mul = <4>;
clocks = <&clk_hsi>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(32)>;
ahb-prescaler = <1>;
apb1-prescaler = <1>;
apb2-prescaler = <1>;
};
arduino_usart: &usart1 {};
arduino_spi: &spi2 {};
arduino_i2c: &i2c1 {};
&usart1 {
pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&usart2 {
pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa3>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&spi1 {
pinctrl-0 = <&spi1_nss_pa15 &spi1_sck_pb3
&spi1_miso_pa6 &spi1_mosi_pa7>;
pinctrl-names = "default";
status = "okay";
cs-gpios = <&gpioa 15 GPIO_ACTIVE_LOW>;
lora: lora@0 {
compatible = "semtech,sx1276";
reg = <0>;
reset-gpios = <&gpioc 0 GPIO_ACTIVE_LOW>;
dio-gpios = <&gpiob 4 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>,
<&gpiob 1 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>,
<&gpiob 0 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>,
<&gpioc 13 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>,
<&gpioa 5 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>,
<&gpioa 4 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>;
rfi-enable-gpios = <&gpioa 1 GPIO_ACTIVE_HIGH>;
rfo-enable-gpios = <&gpioc 2 GPIO_ACTIVE_HIGH>;
pa-boost-enable-gpios = <&gpioc 1 GPIO_ACTIVE_HIGH>;
tcxo-power-gpios = <&gpioa 12 GPIO_ACTIVE_HIGH>;
tcxo-power-startup-delay-ms = <5>;
spi-max-frequency = <1000000>;
};
};
&spi2 {
pinctrl-0 = <&spi2_nss_pb12 &spi2_sck_pb13
&spi2_miso_pb14 &spi2_mosi_pb15>;
pinctrl-names = "default";
status = "okay";
};
&i2c1 {
pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>,
<&rcc STM32_SRC_LSE RTC_SEL(1)>;
status = "okay";
};
&rng {
status = "okay";
};
&eeprom {
status = "okay";
};
zephyr_udc0: &usb {
pinctrl-0 = <&usb_dm_pa11 &usb_dp_pa12>;
pinctrl-names = "default";
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* Set aside 32KiB for data at the end of the 192KiB flash */
storage_partition: partition@28000 {
label = "storage";
reg = <0x00028000 DT_SIZE_K(32)>;
};
};
};
``` | /content/code_sandbox/boards/st/b_l072z_lrwan1/b_l072z_lrwan1.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,325 |
```unknown
# Enable MPU
CONFIG_ARM_MPU=y
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# Serial Drivers
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# GPIO Controller
CONFIG_GPIO=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/b_l072z_lrwan1/b_l072z_lrwan1_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 68 |
```yaml
board:
name: b_l072z_lrwan1
vendor: st
socs:
- name: stm32l072xx
``` | /content/code_sandbox/boards/st/b_l072z_lrwan1/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 33 |
```yaml
identifier: b_l072z_lrwan1
name: B_L072Z_LRWAN1
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 20
flash: 192
testing:
ignore_tags:
- net
supported:
- arduino_i2c
- spi
- i2c
- gpio
- counter
- eeprom
- nvs
- lora
- usbd
vendor: st
``` | /content/code_sandbox/boards/st/b_l072z_lrwan1/b_l072z_lrwan1.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 124 |
```restructuredtext
.. _stm32f769i_disco_board:
ST STM32F769I Discovery
#######################
Overview
********
The discovery kit enables a wide diversity of applications taking benefit
from audio, multi-sensor support, graphics, security, security, video,
and high-speed connectivity features. Important board features include:
- STM32F769NIH6 microcontroller featuring 2 Mbytes of Flash memory and 512 Kbytes of RAM, in BGA216 package
- On-board ST-LINK/V2-1 supporting USB reenumeration capability
- USB ST-LINK functions: virtual COM port, mass storage, debug port
- Five power supply options:
- ST LINK/V2-1
- USB HS connector
- 5 V from RJ45 (Power Over Ethernet)
- 5 V from Arduino or external connector
- USB charger
- 4-inch capacitive touch LCD display with MIPI-DSI connector
- SAI audio codec
- Two audio line jacks, one for input and one for output
- Stereo speaker outputs
- Four ST MEMS microphones on DFSDM inputs
- Two SPDIF RCA input and output connectors
- Two push-buttons (user and reset)
- 512-Mbit Quad-SPI Flash memory
- 128-Mbit SDRAM
- Connector for microSD card
- Wi-Fi or Ext-EEP daughterboard connector
- USB OTG HS with Micro-AB connector
- Ethernet connector compliant with IEEE-802.3-2002
- Power Over Ethernet based on IEEE 802.3af (Powered Device, 48 V to 5 V, 3 W)
- Power supply output for external applications: 3.3 V or 5 V
- Arduino Uno V3 connectors
- Comprehensive free software including a variety of examples, part of the STM32Cube package
- Supported by a wide choice of integrated development environments
.. image:: img/stm32f769i_disco.jpg
:align: center
:alt: STM32F769I-DISCO
More information about the board can be found at the `32F769I-DISCO website`_.
Hardware
********
The STM32F769I Discovery kit provides the following hardware components:
- STM32F769NIH6 in BGA216 package
- ARM |reg| 32-bit Cortex |reg| -M7 CPU with FPU
- 216 MHz max CPU frequency
- VDD from 1.7 V to 3.6 V
- 2 MB Flash
- 512 + 16 + 4 KB SRAM
- Flexible external memory controller with up to 32-bit data bus
- Dual mode Quad-SPI
- Chrom-ART Accelerator(DMA2D), graphical hardware accelerator enabling enhanced graphical user interface
- Hardware JPEG codec
- LCD-TFT controller supporting up to XGA resolution
- MIPI |reg| DSI host controller supporting up to 720p 30Hz resolution
- 3x12-bit ADC with 24 channels
- 2x12-bit D/A converters
- DMA Controller
- General Purpose Timers (15)
- Watchdog Timers (2)
- I2C (4)
- USART/UART (8)
- SPI (6)
- SAI (2)
- CAN (3)
- SDMMC (2)
- SPDIFRX interface
- HDMI-CEC
- MDIO slave interface
- USB 2.0 full-speed device/host/OTG controller with on-chip PHY
- USB 2.0 high-speed/full-speed device/host/OTG controller with dedicated DMA, on-chip full-speed PHY and ULPI
- 10/100 Ethernet MAC with dedicated DMA: supports IEEE 1588v2 hardware, MII/RMII
- 8- to 14-bit camera interface up to 54 Mbyte/s
- True random number generator
- CRC calculation unit
- RTC: sub-second accuracy, hardware calendar
- 96-bit unique ID
More information about STM32F769NIH6 can be found here:
- `STM32F769NIH6 on www.st.com`_
- `STM32F76xxx reference manual`_
Supported Features
==================
The Zephyr stm32f769i_disco board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| ETHERNET | on-chip | Ethernet |
+-----------+------------+-------------------------------------+
| QSPI NOR | on-chip | flash |
+-----------+------------+-------------------------------------+
| FMC | on-chip | memc (SDRAM) |
+-----------+------------+-------------------------------------+
| TOUCH | off-chip | ft5336(FT6202) |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported on Zephyr porting.
The default configuration can be found in
:zephyr_file:`boards/st/stm32f769i_disco/stm32f769i_disco_defconfig`
Pin Mapping
===========
STM32F769I Discovery kit has 9 GPIO controllers. These controllers are responsible for pin muxing,
input/output, pull-up, etc.
For more details please refer to `32F769I-DISCO board User Manual`_.
Default Zephyr Peripheral Mapping:
----------------------------------
- UART_1 TX/RX : PA9/PA10 (ST-Link Virtual Port Com)
- UART_6 TX/RX : PC6/PC7 (Arduino Serial)
- I2C1 SCL/SDA : PB8/PB9 (Arduino I2C)
- I2C4 SCL/SDA : PD12/PB7 (Touchscreen FT6202, PI13 Interrupt Pin)
- SPI2 SCK/MISO/MOSI : PA12/PB14/PB15 (Arduino SPI)
- ETH : PA1, PA2, PA7, PC1, PC4, PC5, PG11, PG13, PG14
- LD1 : PJ13
- LD2 : PJ5
- LD3 : PA12
- LD4 : PD4
System Clock
============
The STM32F769I System Clock can be driven by an internal or external oscillator,
as well as by the main PLL clock. By default, the System clock is driven by the PLL
clock at 216MHz, driven by a 25MHz high speed external clock.
Serial Port
===========
The STM32F769I Discovery kit has up to 8 UARTs. The Zephyr console output is assigned to UART1
which connected to the onboard ST-LINK/V2 Virtual COM port interface. Default communication
settings are 115200 8N1.
Programming and Debugging
*************************
Applications for the ``stm32f769i_disco`` board configuration can be built and
flashed in the usual way (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Flashing
========
STM32F769I Discovery kit includes an ST-LINK/V2 embedded debug tool interface.
This interface is supported by the openocd version included in the Zephyr SDK.
Flashing an application to STM32F769I
-------------------------------------------
First, connect the STM32F769I Discovery kit to your host computer using
the USB port to prepare it for flashing. Then build and flash your application.
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: stm32f769i_disco
:goals: build flash
Run a serial host program to connect with your board:
.. code-block:: console
$ minicom -D /dev/ttyACM0
You should see the following message on the console:
.. code-block:: console
Hello World! arm
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: stm32f769i_disco
:goals: debug
.. _32F769I-DISCO website:
path_to_url
.. _32F769I-DISCO board User Manual:
path_to_url
.. _STM32F769NIH6 on www.st.com:
path_to_url
.. _STM32F76xxx reference manual:
path_to_url
``` | /content/code_sandbox/boards/st/stm32f769i_disco/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,964 |
```ini
source [find interface/stlink.cfg]
transport select hla_swd
set WORKAREASIZE 0x2000
source [find target/stm32l0_dual_bank.cfg]
# There is only system reset line and JTAG/SWD command can be issued when SRST
reset_config srst_only
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
``` | /content/code_sandbox/boards/st/b_l072z_lrwan1/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 123 |
```cmake
if(CONFIG_BUILD_WITH_TFM)
set(TFM_FLASH_BASE_ADDRESS 0x0C000000)
# Flash merged TF-M + Zephyr binary
set_property(TARGET runners_yaml_props_target PROPERTY hex_file tfm_merged.hex)
if (CONFIG_HAS_FLASH_LOAD_OFFSET)
MATH(EXPR TFM_HEX_BASE_ADDRESS_NS "${TFM_FLASH_BASE_ADDRESS}+${CONFIG_FLASH_LOAD_OFFSET}")
else()
set(TFM_HEX_BASE_ADDRESS_NS ${TFM_TFM_FLASH_BASE_ADDRESS})
endif()
endif()
board_runner_args(pyocd "--target=stm32l562qeixq")
board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake)
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
``` | /content/code_sandbox/boards/st/stm32l562e_dk/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 206 |
```unknown
/*
*
*/
/dts-v1/;
#include "stm32l562e_dk_common.dtsi"
/ {
model = "STMicroelectronics STM32L562E-DK Discovery board";
compatible = "st,stm32l562e-dk";
#address-cells = <1>;
#size-cells = <1>;
chosen {
zephyr,console = &usart1;
zephyr,shell-uart = &usart1;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,bt-c2h-uart = &usart1;
zephyr,display = &st7789v;
};
aliases {
led0 = &green_led_10;
sw0 = &user_button;
watchdog0 = &iwdg;
accel0 = &lsm6dso;
};
};
&timers2 {
st,prescaler = <10000>;
};
&iwdg {
status = "okay";
};
&aes {
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* 2KB at the end of 512KB flash is set for storage */
storage_partition: partition@7f800 {
reg = <0x0007f800 DT_SIZE_K(2)>;
};
};
};
``` | /content/code_sandbox/boards/st/stm32l562e_dk/stm32l562e_dk.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 328 |
```yaml
identifier: stm32l562e_dk/stm32l562xx/ns
name: ST STM32L562E-DK Discovery non secure
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
supported:
- counter
- gpio
- i2c
- lptim
- dac
- spi
- arduino_spi
- usb
- usb_device
ram: 192
flash: 512
vendor: st
``` | /content/code_sandbox/boards/st/stm32l562e_dk/stm32l562e_dk_stm32l562xx_ns.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 116 |
```restructuredtext
.. _b_l072z_lrwan1_board:
ST B-L072Z-LRWAN1 Discovery kit
###############################
Overview
********
This Discovery kit features an all-in-one open module CMWX1ZZABZ-091 (by Murata).
The module is powered by an STM32L072CZ and an SX1276 transceiver.
This kit provides:
- CMWX1ZZABZ-091 LoRa* / Sigfox* module (Murata)
- Embedded ultra-low-power STM32L072CZ Series MCUs, based on
Arm* Cortex* -M0+ core, with 192 Kbytes of Flash
memory, 20 Kbytes of RAM, 6 Kbytes of EEPROM
- Frequency range: 860 MHz - 930 MHz
- USB 2.0 FS
- 4-channel,12-bit ADC, 2xDAC
- 6-bit timers, LP-UART, I2C and SPI
- Embedded SX1276 transceiver
- LoRa* , FSK, GFSK, MSK, GMSK and OOK modulations (+ Sigfox* compatibility)
- +14 dBm or +20 dBm selectable output power
- 157 dB maximum link budget
- Programmable bit rate up to 300 kbit/s
- High sensitivity: down to -137 dBm
- Bullet-proof front end: IIP3 = -12.5 dBm
- 89 dB blocking immunity
- Low Rx current of 10 mA, 200 nA register retention
- Fully integrated synthesizer with a resolution of 61 Hz
- Built-in bit synchronizer for clock recovery
- Sync word recognition
- Preamble detection
- 127 dB+ dynamic range RSSI
- SMA and U.FL RF interface connectors
- Including 50 ohm SMA RF antenna
- On-board ST-LINK/V2-1 supporting USB re-enumeration capability
- USB ST-LINK functions:
- Board power supply:
- Through USB bus or external VIN/3.3 V supply voltage or batteries
- 3xAAA-type-battery holder for standalone operation
- 7 LEDs:
- 4 general-purpose LEDs
- A 5 V-power LED
- An ST-LINK-communication LED
- A fault-power LED
- 2 push-buttons (user and reset)
- Arduino* Uno V3 connectors
.. image:: img/b_l072z_lrwan1.jpg
:align: center
:alt: B-L072Z-LRWAN1
More information about the board can be found at the `B-L072Z-LRWAN1 website`_.
Hardware
********
The STM32L072CZ SoC provides the following hardware IPs:
- Ultra-low-power (down to 0.29 A Standby mode and 93 uA/MHz run mode)
- Core: ARM* 32-bit Cortex*-M0+ CPU, frequency up to 32 MHz
- Clock Sources:
- 1 to 32 MHz crystal oscillator
- 32 kHz crystal oscillator for RTC (LSE)
- Internal 16 MHz factory-trimmed RC ( |plusminus| 1%)
- Internal low-power 37 kHz RC ( |plusminus| 5%)
- Internal multispeed low-power 65 kHz to 4.2 MHz RC
- RTC with HW calendar, alarms and calibration
- Up to 24 capacitive sensing channels: support touchkey, linear and rotary touch sensors
- 11x timers:
- 2x 16-bit with up to 4 channels
- 2x 16-bit with up to 2 channels
- 1x 16-bit ultra-low-power timer
- 1x SysTick
- 1x RTC
- 2x 16-bit basic for DAC
- 2x watchdogs (independent/window)
- Up to 84 fast I/Os, most 5 V-tolerant.
- Memories
- Up to 192 KB Flash, 2 banks read-while-write, proprietary code readout protection
- Up to 20 KB of SRAM
- External memory interface for static memories supporting SRAM, PSRAM, NOR and NAND memories
- Rich analog peripherals (independent supply)
- 1x 12-bit ADC 1.14 MSPS
- 2x 12-bit DAC
- 2x ultra-low-power comparators
- 11x communication interfaces
- USB 2.0 full-speed device, LPM and BCD
- 3x I2C FM+(1 Mbit/s), SMBus/PMBus
- 4x USARTs (ISO 7816, LIN, IrDA, modem)
- 6x SPIs (4x SPIs with the Quad SPI)
- 7-channel DMA controller
- True random number generator
- CRC calculation unit, 96-bit unique ID
- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell*
More information about STM32L072CZ can be found here:
- `STM32L072CZ on www.st.com`_
- `STM32L0x2 reference manual`_
Supported Features
==================
The Zephyr B-L072Z-LRWAN1 Discovery board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| RTC | on-chip | counter |
+-----------+------------+-------------------------------------+
| TRNG | on-chip | true random number generator |
+-----------+------------+-------------------------------------+
| EEPROM | on-chip | eeprom |
+-----------+------------+-------------------------------------+
| USB | on-chip | usb |
+-----------+------------+-------------------------------------+
| FLASH | on-chip | flash |
+-----------+------------+-------------------------------------+
| LoRa | on-module | sx1276 |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported on this Zephyr port.
The default configuration can be found in the defconfig file:
:zephyr_file:`boards/st/b_l072z_lrwan1/b_l072z_lrwan1_defconfig`
Connections and IOs
===================
B-L072Z-LRWAN1 Discovery kit has GPIO controllers. These controllers are responsible for pin muxing,
input/output, pull-up, etc.
Available pins:
---------------
For detailed information about available pins please refer to `B-L072Z-LRWAN1 website`_.
Default Zephyr Peripheral Mapping:
----------------------------------
- UART_1_TX/RX: PA9/PA10 (Arduino Serial)
- UART_2_TX/RX: PA2/PA3 (ST-Link Virtual COM Port)
- SPI1 NSS/SCK/MISO/MOSI: PA15/PB3/PA6/PA7 (Semtech SX1276 LoRa* Transceiver)
- SPI2 NSS/SCK/MISO/MOSI: PB12/PB13/PB14/PB15 (Arduino SPI)
- I2C1 SCL/SDA : PB8/PB9 (Arduino I2C)
System Clock
------------
B-L072Z-LRWAN1 Discovery board System Clock is at 32MHz.
Serial Port
-----------
B-L072Z-LRWAN1 Discovery board has 2 U(S)ARTs. The Zephyr console output is assigned to UART2.
Default settings are 115200 8N1.
USB device
----------
B-L072Z-LRWAN1 Discovery board has 1 USB device controller. However,
the USB data lines are not connected to the MCU by default. To connect
the USB data lines to the MCU, short solder bridges SB15 and SB16.
Programming and Debugging
*************************
Applications for the ``b_l072z_lrwan1`` board configuration can be built and
flashed in the usual way (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Flashing
========
B-L072Z-LRWAN1 Discovery board includes an ST-LINK/V2-1 embedded debug
tool interface. This interface is supported by the openocd version included
in the Zephyr SDK since v0.9.2.
Flashing an application to B-L072Z-LRWAN1 Discovery board
---------------------------------------------------------
Here is an example for the :ref:`hello_world` application.
Connect the B-L072Z-LRWAN1 Discovery board to a STLinkV2 to your host computer using the USB port, then
run a serial host program to connect with your board. For example:
.. code-block:: console
$ minicom -D /dev/ttyACM0
Then build and flash the application:
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: b_l072z_lrwan1
:goals: build flash
You should see the following message on the console:
.. code-block:: console
$ Hello World! arm
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: b_l072z_lrwan1
:maybe-skip-config:
:goals: debug
.. _B-L072Z-LRWAN1 website:
path_to_url
.. _STM32L072CZ on www.st.com:
path_to_url
.. _STM32L0x2 reference manual:
path_to_url
``` | /content/code_sandbox/boards/st/b_l072z_lrwan1/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,209 |
```unknown
# enable uart driver
CONFIG_SERIAL=y
# enable GPIO
CONFIG_GPIO=y
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# Enable MPU
CONFIG_ARM_MPU=y
# Enable HW stack protection
CONFIG_HW_STACK_PROTECTION=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/stm32l562e_dk/stm32l562e_dk_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 74 |
```unknown
config BOARD_STM32L562E_DK
select SOC_STM32L562XX
``` | /content/code_sandbox/boards/st/stm32l562e_dk/Kconfig.stm32l562e_dk | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 22 |
```yaml
board:
name: stm32l562e_dk
vendor: st
socs:
- name: stm32l562xx
variants:
- name: ns
``` | /content/code_sandbox/boards/st/stm32l562e_dk/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 42 |
```unknown
# enable uart driver
CONFIG_SERIAL=y
# enable GPIO
CONFIG_GPIO=y
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# Enable MPU
CONFIG_ARM_MPU=y
CONFIG_ARM_TRUSTZONE_M=y
CONFIG_RUNTIME_NMI=y
CONFIG_TRUSTED_EXECUTION_NONSECURE=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/stm32l562e_dk/stm32l562e_dk_stm32l562xx_ns_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 86 |
```yaml
identifier: stm32l562e_dk
name: ST STM32L562E-DK Discovery
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
supported:
- gpio
- i2c
- lptim
- pwm
- counter
- watchdog
- dac
- adc
- spi
- ble
- dma
- usart
- arduino_spi
- usb
- usb_device
- nvs
- usbd
ram: 192
flash: 512
vendor: st
``` | /content/code_sandbox/boards/st/stm32l562e_dk/stm32l562e_dk.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 142 |
```unknown
# STM32L562E-DK Discovery board configuration
if BOARD_STM32L562E_DK
if BT
config SPI
default y
config BT_SPI
default y
config BT_BLUENRG_ACI
default y
# Disable Flow control
config BT_HCI_ACL_FLOW_CONTROL
default n
config BT_HCI_VS
default n
endif # BT
config MIPI_DBI_STM32_FMC_MEM_BARRIER
default n if MIPI_DBI_STM32_FMC
if DISPLAY
choice ST7789V_PIXEL_FORMAT
default ST7789V_BGR565
endchoice
endif # DISPLAY
endif # BOARD_STM32L562E_DK
``` | /content/code_sandbox/boards/st/stm32l562e_dk/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 147 |
```unknown
/*
*
*/
/dts-v1/;
#include "stm32l562e_dk_common.dtsi"
/ {
model = "STMicroelectronics STM32L562E-DK Discovery board";
compatible = "st,stm32l562e-dk";
#address-cells = <1>;
#size-cells = <1>;
chosen {
zephyr,console = &usart1;
zephyr,shell-uart = &usart1;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot1_ns_partition;
};
aliases {
led0 = &green_led_10;
sw0 = &user_button;
};
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000400>,
<&rcc STM32_SRC_LSE RTC_SEL(1)>;
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
reg = <0x00000000 DT_SIZE_K(100)>;
read-only;
};
/* Secure image primary slot */
slot0_partition: partition@19000 {
reg = <0x00019000 DT_SIZE_K(240)>;
};
/* Non-secure image primary slot */
slot1_ns_partition: partition@55000 {
reg = <0x00055000 DT_SIZE_K(168)>;
};
/* 4KB at the end of 512KB flash is set for storage */
storage_partition: partition@7f000 {
reg = <0x0007f000 DT_SIZE_K(4)>;
};
};
};
``` | /content/code_sandbox/boards/st/stm32l562e_dk/stm32l562e_dk_stm32l562xx_ns.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 409 |
```unknown
/*
*
*/
#include <st/l5/stm32l562Xe.dtsi>
#include <st/l5/stm32l562qeixq-pinctrl.dtsi>
#include "arduino_r3_connector.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
#include <zephyr/dt-bindings/memory-controller/stm32-fmc-nor-psram.h>
#include <zephyr/dt-bindings/mipi_dbi/mipi_dbi.h>
/ {
leds {
compatible = "gpio-leds";
red_led_9: led_9 {
gpios = <&gpiod 3 GPIO_ACTIVE_LOW>;
label = "User LD9";
};
green_led_10: led_10 {
gpios = <&gpiog 12 GPIO_ACTIVE_LOW>;
label = "User LD10";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button {
label = "User";
gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>;
zephyr,code = <INPUT_KEY_0>;
};
};
aliases {
die-temp0 = &die_temp;
volt-sensor0 = &vref;
volt-sensor1 = &vbat;
};
chosen {
zephyr,bt-hci = &hci_spi;
};
};
&fmc {
pinctrl-0 = <&fmc_a0_pf0 &fmc_nce_pd7 &fmc_nwe_pd5 &fmc_noe_pd4
&fmc_d0_pd14 &fmc_d1_pd15 &fmc_d2_pd0 &fmc_d3_pd1
&fmc_d4_pe7 &fmc_d5_pe8 &fmc_d6_pe9 &fmc_d7_pe10
&fmc_d8_pe11 &fmc_d9_pe12 &fmc_d10_pe13 &fmc_d11_pe14
&fmc_d12_pe15 &fmc_d13_pd8 &fmc_d14_pd9 &fmc_d15_pd10>;
pinctrl-names = "default";
status = "okay";
sram {
compatible = "st,stm32-fmc-nor-psram";
#address-cells = <1>;
#size-cells = <0>;
bank@0 {
reg = <0x0>;
st,control = <STM32_FMC_DATA_ADDRESS_MUX_DISABLE
STM32_FMC_MEMORY_TYPE_SRAM
STM32_FMC_NORSRAM_MEM_BUS_WIDTH_16
STM32_FMC_BURST_ACCESS_MODE_DISABLE
STM32_FMC_WAIT_SIGNAL_POLARITY_LOW
STM32_FMC_WAIT_TIMING_BEFORE_WS
STM32_FMC_WRITE_OPERATION_ENABLE
STM32_FMC_WAIT_SIGNAL_DISABLE
STM32_FMC_EXTENDED_MODE_DISABLE
STM32_FMC_ASYNCHRONOUS_WAIT_DISABLE
STM32_FMC_WRITE_BURST_DISABLE
STM32_FMC_CONTINUOUS_CLOCK_SYNC_ONLY
STM32_FMC_WRITE_FIFO_DISABLE
STM32_FMC_PAGE_SIZE_NONE>;
st,timing = <1 1 32 0 2 2 STM32_FMC_ACCESS_MODE_A>;
fmc-mipi-dbi {
compatible = "st,stm32-fmc-mipi-dbi";
reset-gpios = <&gpiof 14 GPIO_ACTIVE_LOW>;
power-gpios = <&gpioh 0 GPIO_ACTIVE_LOW>;
register-select-pin = <0>;
#address-cells = <1>;
#size-cells = <0>;
st7789v: lcd-panel@0 {
compatible = "sitronix,st7789v";
reg = <0>;
mipi-mode = <MIPI_DBI_MODE_8080_BUS_16_BIT>;
/* A write cycle should be 68ns */
mipi-max-frequency = <14705882>;
width = <240>;
height = <240>;
x-offset = <0>;
y-offset = <0>;
vcom = <0x1F>;
gctrl = <0x35>;
vdvs = <0x20>;
mdac = <0x00>;
gamma = <0x01>;
colmod = <0x05>;
lcm = <0x2c>;
porch-param = [0c 0c 00 33 33];
cmd2en-param = [5a 69 02 00];
pwctrl1-param = [a4 a1];
pvgam-param = [D0 08 11 08 0C 15 39 33 50 36 13 14 29 2D];
nvgam-param = [D0 08 10 08 06 06 39 44 51 0B 16 14 2F 31];
ram-param = [00 F0];
rgb-param = [40 02 14];
};
};
};
};
};
&clk_hsi48 {
status = "okay";
};
&clk_msi {
status = "okay";
msi-range = <6>;
msi-pll-mode;
};
&clk_lse {
status = "okay";
};
&pll {
div-m = <1>;
mul-n = <55>;
div-p = <7>;
div-q = <2>;
div-r = <2>;
clocks = <&clk_msi>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(110)>;
ahb-prescaler = <1>;
apb1-prescaler = <1>;
apb2-prescaler = <1>;
};
stm32_lp_tick_source: &lptim1 {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>,
<&rcc STM32_SRC_LSE LPTIM1_SEL(3)>;
status = "okay";
};
&usart1 {
current-speed = <115200>;
pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
pinctrl-names = "default";
status = "okay";
};
&usart3 {
pinctrl-0 = <&usart3_tx_pc10 &usart3_rx_pc11>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&i2c1 {
pinctrl-0 = <&i2c1_scl_pb6 &i2c1_sda_pb7>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
lsm6dso: lsm6dso@6a {
compatible = "st,lsm6dso";
reg = <0x6a>;
irq-gpios = <&gpiof 3 GPIO_ACTIVE_HIGH>;
};
};
&rng {
status = "okay";
};
&spi1 {
pinctrl-0 = <&spi1_sck_pg2 &spi1_miso_pg3 &spi1_mosi_pg4>;
pinctrl-names = "default";
cs-gpios = <&gpiog 5 GPIO_ACTIVE_LOW>;
status = "okay";
hci_spi: spbtle-rf@0 {
compatible = "st,hci-spi-v1";
reg = <0>;
irq-gpios = <&gpiog 6 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
reset-gpios = <&gpiog 8 GPIO_ACTIVE_LOW>;
spi-max-frequency = <DT_FREQ_M(2)>;
spi-hold-cs;
};
};
&octospi1 {
pinctrl-0 = <&octospi1_clk_pa3 &octospi1_ncs_pa2
&octospi1_io0_pb1 &octospi1_io1_pb0
&octospi1_io2_pa7 &octospi1_io3_pa6
&octospi1_io4_pc1 &octospi1_io5_pc2
&octospi1_io6_pc3 &octospi1_io7_pc0
&octospi1_dqs_pb2>;
pinctrl-names = "default";
status = "okay";
mx25lm51245: ospi-nor-flash@90000000 {
compatible = "st,stm32-ospi-nor";
reg = <0x90000000 DT_SIZE_M(64)>; /* 512 Mbits */
ospi-max-frequency = <DT_FREQ_M(50)>;
spi-bus-width = <OSPI_OPI_MODE>;
data-rate = <OSPI_DTR_TRANSFER>;
four-byte-opcodes;
status = "okay";
sfdp-bfp = [
53 46 44 50 06 01 02 ff
00 06 01 10 30 00 00 ff
c2 00 01 04 10 01 00 ff
84 00 01 02 c0 00 00 ff
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
e5 20 fb ff ff ff ff 1f
44 eb 08 6b 08 3b 04 bb
fe ff ff ff ff ff 00 ff
ff ff 44 eb 0c 20 0f 52
10 d8 00 ff d6 49 c5 00
81 df 04 e3 44 03 67 38
30 b0 30 b0 f7 bd d5 5c
4a 9e 29 ff f0 50 f9 85
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
7f ef ff ff 21 5c dc ff
];
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
reg = <0x00000000 DT_SIZE_M(64)>;
};
};
};
};
&timers2 {
status = "okay";
pwm2: pwm {
status = "okay";
pinctrl-0 = <&tim2_ch1_pa0>;
pinctrl-names = "default";
};
};
&dac1 {
status = "okay";
pinctrl-0 = <&dac1_out1_pa4>;
pinctrl-names = "default";
};
&adc1 {
pinctrl-0 = <&adc1_in13_pc4>;
pinctrl-names = "default";
st,adc-clock-source = <SYNC>;
st,adc-prescaler = <4>;
status = "okay";
};
&die_temp {
status = "okay";
};
&spi3 {
pinctrl-0 = <&spi3_sck_pg9 &spi3_mosi_pb5 &spi3_miso_pb4>;
pinctrl-names = "default";
cs-gpios = <&gpioe 0 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
status = "okay";
};
zephyr_udc0: &usb {
pinctrl-0 = <&usb_dp_pa12 &usb_dm_pa11>;
pinctrl-names = "default";
status = "okay";
};
&sdmmc1 {
status = "okay";
pinctrl-0 = <&sdmmc1_d0_pc8
&sdmmc1_d1_pc9
&sdmmc1_d2_pc10
&sdmmc1_d3_pc11
&sdmmc1_ck_pc12
&sdmmc1_cmd_pd2>;
pinctrl-names = "default";
cd-gpios = <&gpiof 2 GPIO_ACTIVE_LOW>;
};
&vref {
status = "okay";
};
&vbat {
status = "okay";
};
``` | /content/code_sandbox/boards/st/stm32l562e_dk/stm32l562e_dk_common.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,822 |
```ini
source [find interface/stlink.cfg]
transport select hla_swd
source [find target/stm32l5x.cfg]
# use hardware reset
reset_config srst_only srst_nogate
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
``` | /content/code_sandbox/boards/st/stm32l562e_dk/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 101 |
```unknown
/*
*
*/
/ {
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpioa 0 0>, /* A0 */
<1 0 &gpioa 1 0>, /* A1 */
<2 0 &gpioa 4 0>, /* A2 */
<3 0 &gpioa 5 0>, /* A3 */
<4 0 &gpioc 4 0>, /* A4 */
<5 0 &gpioc 5 0>, /* A5 */
<6 0 &gpiob 10 0>, /* D0 */
<7 0 &gpiob 11 0>, /* D1 */
<8 0 &gpiod 11 0>, /* D2 */
<9 0 &gpiod 12 0>, /* D3 */
<10 0 &gpiof 4 0>, /* D4 */
<11 0 &gpiod 13 0>, /* D5 */
<12 0 &gpiob 8 0>, /* D6 */
<13 0 &gpioc 6 0>, /* D7 */
<14 0 &gpiog 0 0>, /* D8 */
<15 0 &gpiob 9 0>, /* D9 */
<16 0 &gpioe 0 0>, /* D10 */
<17 0 &gpiob 5 0>, /* D11 */
<18 0 &gpiob 4 0>, /* D12 */
<19 0 &gpiog 9 0>, /* D13 */
<20 0 &gpiob 7 0>, /* D14 */
<21 0 &gpiob 6 0>; /* D15 */
};
};
arduino_spi: &spi3 {};
``` | /content/code_sandbox/boards/st/stm32l562e_dk/arduino_r3_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 486 |
```yaml
identifier: nucleo_l432kc
name: ST Nucleo L432KC
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 64
flash: 256
supported:
- nvs
- pwm
- can
- counter
- spi
vendor: st
``` | /content/code_sandbox/boards/st/nucleo_l432kc/nucleo_l432kc.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 86 |
```cmake
board_runner_args(jlink "--device=STM32L432KC" "--speed=4000")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/st/nucleo_l432kc/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 55 |
```unknown
config BOARD_NUCLEO_L432KC
select SOC_STM32L432XX
``` | /content/code_sandbox/boards/st/nucleo_l432kc/Kconfig.nucleo_l432kc | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 21 |
```unknown
# Enable MPU
CONFIG_ARM_MPU=y
# Enable HW stack protection
CONFIG_HW_STACK_PROTECTION=y
# enable uart driver
CONFIG_SERIAL=y
# enable GPIO
CONFIG_GPIO=y
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/nucleo_l432kc/nucleo_l432kc_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 74 |
```yaml
board:
name: nucleo_l432kc
vendor: st
socs:
- name: stm32l432xx
``` | /content/code_sandbox/boards/st/nucleo_l432kc/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 31 |
```unknown
# STM32L432KC Nucleo board configuration
if BOARD_NUCLEO_L432KC
config SPI_STM32_INTERRUPT
default y
depends on SPI
endif # BOARD_NUCLEO_L432KC
``` | /content/code_sandbox/boards/st/nucleo_l432kc/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 49 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/l4/stm32l432Xc.dtsi>
#include <st/l4/stm32l432k(b-c)ux-pinctrl.dtsi>
/ {
model = "STMicroelectronics STM32L432KC-NUCLEO board";
compatible = "st,stm32l432kc-nucleo";
chosen {
zephyr,console = &usart2;
zephyr,shell-uart = &usart2;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,canbus = &can1;
};
leds: leds {
compatible = "gpio-leds";
green_led: led_0 {
gpios = <&gpiob 3 GPIO_ACTIVE_HIGH>;
label = "User LD3";
};
};
aliases {
led0 = &green_led;
};
};
&clk_lsi {
status = "okay";
};
&clk_hsi {
status = "okay";
};
&pll {
div-m = <1>;
mul-n = <20>;
div-p = <7>;
div-q = <2>;
div-r = <4>;
clocks = <&clk_hsi>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(80)>;
ahb-prescaler = <1>;
apb1-prescaler = <1>;
apb2-prescaler = <1>;
};
&usart1 {
pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
pinctrl-names = "default";
current-speed = <115200>;
};
&usart2 {
pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa15>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&spi1 {
pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pa5
&spi1_miso_pa6 &spi1_mosi_pa7>;
pinctrl-names = "default";
status = "okay";
};
&i2c1 {
pinctrl-0 = <&i2c1_scl_pb6 &i2c1_sda_pb7>;
pinctrl-names = "default";
clock-frequency = <I2C_BITRATE_FAST>;
status = "okay";
};
&timers2 {
status = "okay";
pwm2: pwm {
status = "okay";
pinctrl-0 = <&tim2_ch1_pa0>;
pinctrl-names = "default";
};
};
&can1 {
pinctrl-0 = <&can1_rx_pa11 &can1_tx_pa12>;
pinctrl-names = "default";
status = "okay";
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>,
<&rcc STM32_SRC_LSI RTC_SEL(2)>;
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/*
* Reserve the final 16 KiB for file system partition
*/
storage_partition: partition@3c000 {
label = "storage";
reg = <0x0003c000 DT_SIZE_K(16)>;
};
};
};
``` | /content/code_sandbox/boards/st/nucleo_l432kc/nucleo_l432kc.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 766 |
```ini
source [find interface/stlink.cfg]
transport select hla_swd
source [find target/stm32l4x.cfg]
reset_config srst_only
``` | /content/code_sandbox/boards/st/nucleo_l432kc/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 34 |
```restructuredtext
.. _stm32l562e_dk_board:
ST STM32L562E-DK Discovery
##########################
Overview
********
The STM32L562E-DK Discovery kit is designed as a complete demonstration and
development platform for STMicroelectronics Arm |reg| Cortex |reg|-M33 core-based
STM32L562QEI6QU microcontroller with TrustZone |reg|. Here are some highlights of
the STM32L562E-DK Discovery board:
- STM32L562QEI6QU microcontroller featuring 512 Kbytes of Flash memory and 256 Kbytes of SRAM in BGA132 package
- 1.54" 240 x 240 pixel-262K color TFT LCD module with parallel interface and touch-control panel
- USB Type-C |trade| Sink device FS
- On-board energy meter: 300 nA to 150 mA measurement range with a dedicated USB interface
- SAI Audio CODEC
- MEMS digital microphones
- 512-Mbit Octal-SPI Flash memory
- Bluetooth |reg| V4.1 Low Energy module
- iNEMO 3D accelerometer and 3D gyroscope
- Board connectors
- STMod+ expansion connector with fan-out expansion board for WiFi |reg|, Grove and mikroBUS |trade| compatible connectors
- Pmod |trade| expansion connector
- Audio MEMS daughterboard expansion connector
- ARDUINO |reg| Uno V3 expansion connector
- Flexible power-supply options
- ST-LINK
- USB VBUS
- external sources
- On-board STLINK-V3E debugger/programmer with USB re-enumeration capability:
- mass storage
- Virtual COM port
- debug port
- 2 user LEDs
- User and reset push-buttons
.. image:: img/stm32l562e_dk.jpg
:align: center
:alt: STM32L562E-DK Discovery
More information about the board can be found at the `STM32L562E-DK Discovery website`_.
Hardware
********
The STM32L562xx devices are an ultra-low-power microcontrollers family (STM32L5
Series) based on the high-performance Arm |reg| Cortex |reg|-M33 32-bit RISC core.
They operate at a frequency of up to 110 MHz.
- Ultra-low-power with FlexPowerControl (down to 108 nA Standby mode and 62 uA/MHz run mode)
- Core: ARM |reg| 32-bit Cortex |reg| -M33 CPU with TrustZone |reg| and FPU.
- Performance benchmark:
- 1.5 DMPIS/MHz (Drystone 2.1)
- 442 CoreMark |reg| (4.02 CoreMark |reg| /MHZ)
- Security
- Arm |reg| TrustZone |reg| and securable I/Os memories and peripherals
- Flexible life cycle scheme with RDP (readout protection)
- Root of trust thanks to unique boot entry and hide protection area (HDP)
- Secure Firmware Installation thanks to embedded Root Secure Services
- Secure Firmware Update support with TF-M
- AES coprocessor
- Public key accelerator
- On-the-fly decryption of Octo-SPI external memories
- HASH hardware accelerator
- Active tamper and protection temperature, voltage and frequency attacks
- True Random Number Generator NIST SP800-90B compliant
- 96-bit unique ID
- 512-byte One-Time Programmable for user data
- Clock management:
- 4 to 48 MHz crystal oscillator
- 32 kHz crystal oscillator for RTC (LSE)
- Internal 16 MHz factory-trimmed RC ( |plusminus| 1%)
- Internal low-power 32 kHz RC ( |plusminus| 5%)
- Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by
LSE (better than |plusminus| 0.25 % accuracy)
- 3 PLLs for system clock, USB, audio, ADC
- Power management
- Embedded regulator (LDO) with three configurable range output to supply the digital circuitry
- Embedded SMPS step-down converter
- External SMPS support
- RTC with HW calendar, alarms and calibration
- Up to 114 fast I/Os, most 5 V-tolerant, up to 14 I/Os with independent supply down to 1.08 V
- Up to 22 capacitive sensing channels: support touchkey, linear and rotary touch sensors
- Up to 16 timers and 2 watchdogs
- 2x 16-bit advanced motor-control
- 2x 32-bit and 5x 16-bit general purpose
- 2x 16-bit basic
- 3x low-power 16-bit timers (available in Stop mode)
- 2x watchdogs
- 2x SysTick timer
- Memories
- Up to 512 MB Flash, 2 banks read-while-write
- 512 KB of SRAM including 64 KB with hardware parity check
- External memory interface for static memories supporting SRAM, PSRAM, NOR, NAND and FRAM memories
- OCTOSPI memory interface
- Rich analog peripherals (independent supply)
- 3x 12-bit ADC 5 MSPS, up to 16-bit with hardware oversampling, 200 uA/MSPS
- 2x 12-bit DAC, low-power sample and hold
- 2x operational amplifiers with built-in PGA
- 2x ultra-low-power comparators
- 4x digital filters for sigma delta modulator
- 19x communication interfaces
- USB Type-C / USB power delivery controller
- 2.0 full-speed crystal less solution, LPM and BCD
- 2x SAIs (serial audio interface)
- 4x I2C FM+(1 Mbit/s), SMBus/PMBus
- 6x USARTs (ISO 7816, LIN, IrDA, modem)
- 3x SPIs (7x SPIs with USART and OCTOSPI in SPI mode)
- 1xFDCAN
- 1xSDMMC interface
- 2x 14 channel DMA controllers
- CRC calculation unit
- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell |trade|
More information about STM32L562QE can be found here:
- `STM32L562QE on www.st.com`_
- `STM32L562 reference manual`_
Supported Features
==================
The Zephyr stm32l562e_dk board configuration supports the following
hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| ADC | on-chip | ADC Controller |
+-----------+------------+-------------------------------------+
| AES | on-chip | crypto |
+-----------+------------+-------------------------------------+
| CLOCK | on-chip | reset and clock control |
+-----------+------------+-------------------------------------+
| DAC | on-chip | DAC Controller |
+-----------+------------+-------------------------------------+
| DMA | on-chip | Direct Memory Access |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| PWM | on-chip | PWM |
+-----------+------------+-------------------------------------+
| RNG | on-chip | entropy |
+-----------+------------+-------------------------------------+
| SDMMC | on-chip | sd/mmc |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| TrustZone | on-chip | Trusted Firmware-M |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | independent watchdog |
+-----------+------------+-------------------------------------+
| USB | on-chip | usb |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported on this Zephyr port.
The default configuration can be found in the defconfig and dts files:
- Common:
- :zephyr_file:`boards/st/stm32l562e_dk/stm32l562e_dk_common.dtsi`
- Secure target:
- :zephyr_file:`boards/st/stm32l562e_dk/stm32l562e_dk_defconfig`
- :zephyr_file:`boards/st/stm32l562e_dk/stm32l562e_dk.dts`
- Non-Secure target:
- :zephyr_file:`boards/st/stm32l562e_dk/stm32l562e_dk_stm32l562xx_ns_defconfig`
- :zephyr_file:`boards/st/stm32l562e_dk/stm32l562e_dk_stm32l562xx_ns.dts`
Zephyr board options
====================
The STM32L562e is an SoC with Cortex-M33 architecture. Zephyr provides support
for building for both Secure and Non-Secure firmware.
The BOARD options are summarized below:
+------------------------------+-------------------------------------------+
| BOARD | Description |
+==============================+===========================================+
| stm32l562e_dk | For building Trust Zone Disabled firmware |
+------------------------------+-------------------------------------------+
| stm32l562e_dk/stm32l562xx/ns | For building Non-Secure firmware |
+------------------------------+-------------------------------------------+
Here are the instructions to build Zephyr with a non-secure configuration,
using `tfm_ipc_` sample:
.. code-block:: bash
$ west build -b stm32l562e_dk/stm32l562xx/ns samples/tfm_integration/tfm_ipc/
Once done, before flashing, you need to first run a generated script that
will set platform option bytes config and erase platform (among others,
option bit TZEN will be set).
.. code-block:: bash
$ ./build/tfm/api_ns/regression.sh
$ west flash
Please note that, after having run a TFM sample on the board, you will need to
run `./build/tfm/api_ns/regression.sh` once more to clean up the board from secure
options and get back the platform back to a "normal" state and be able to run
usual, non-TFM, binaries.
Also note that, even then, TZEN will remain set, and you will need to use
STM32CubeProgrammer_ to disable it fully, if required.
Connections and IOs
===================
STM32L562E-DK Discovery Board has 8 GPIO controllers. These controllers are responsible for pin muxing,
input/output, pull-up, etc.
For more details please refer to `STM32L562E-DK Discovery board User Manual`_.
Default Zephyr Peripheral Mapping:
----------------------------------
- USART_1 TX/RX : PA9/PA10
- USART_3 TX/RX : PC10/PC11
- I2C_1 SCL/SDA : PB6/PB7
- SPI_1 SCK/MISO/MOSI : PG2/PG3/PG4 (BT SPI bus)
- SPI_3 NSS/SCK/MISO/MOSI : PE0/PG9/PB4/PB5 (Arduino SPI)
- USER_PB : PC13
- LD10 : PG12
- PWM_2_CH1 : PA0
- DAC1 : PA4
- ADC1 : PC4
System Clock
------------
STM32L562E-DK System Clock could be driven by internal or external oscillator,
as well as main PLL clock. By default System clock is driven by PLL clock at
110MHz, driven by 4MHz medium speed internal oscillator.
Serial Port
-----------
STM32L562E-DK Discovery board has 6 U(S)ARTs. The Zephyr console output is
assigned to USART1. Default settings are 115200 8N1.
Programming and Debugging
*************************
Applications for the ``stm32l562e_dk`` board configuration can be built and
flashed in the usual way (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Flashing
========
STM32L562E-DK Discovery board includes an ST-LINK/V3E embedded debug tool
interface. Support can be enabled on pyocd by adding "pack" support with the
following pyocd command:
.. code-block:: console
$ pyocd pack --update
$ pyocd pack --install stm32l562qe
Alternatively, this interface is supported by the openocd version
included in the Zephyr SDK since v0.13.1.
Flashing an application to STM32L562E-DK Discovery
--------------------------------------------------
Connect the STM32L562E-DK Discovery to your host computer using the USB port.
Then build and flash an application. Here is an example for the
:ref:`hello_world` application.
Run a serial host program to connect with your Nucleo board:
.. code-block:: console
$ minicom -D /dev/ttyACM0
Then build and flash the application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: stm32l562e_dk
:goals: build flash
You should see the following message on the console:
.. code-block:: console
Hello World! stm32l562e_dk
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: stm32l562e_dk
:maybe-skip-config:
:goals: debug
.. _STM32L562E-DK Discovery website:
path_to_url
.. _STM32L562E-DK Discovery board User Manual:
path_to_url
.. _STM32L562QE on www.st.com:
path_to_url
.. _STM32L562 reference manual:
path_to_url
.. _STM32CubeProgrammer:
path_to_url
``` | /content/code_sandbox/boards/st/stm32l562e_dk/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 3,208 |
```restructuredtext
.. _nucleo_l432kc_board:
ST Nucleo L432KC
################
Overview
********
The Nucleo L432KC board features an ARM Cortex-M4 based STM32L432KC MCU
with a wide range of connectivity support and configurations. Here are
some highlights of the Nucleo L432KC board:
- STM32 microcontroller in UFQFPN32 package
- Arduino Uno V3 connectivity
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector
- Flexible board power supply:
- USB VBUS or external source(3.3V, 5V, 7 - 12V)
- Power management access point
- Three LEDs: USB communication (LD1), power LED (LD2), user LED (LD3)
- One push-button: RESET
.. image:: img/nucleo_l432kc.jpg
:align: center
:alt: Nucleo L432KC
More information about the board can be found at the `Nucleo L432KC website`_.
Hardware
********
The STM32L432KC SoC provides the following hardware IPs:
- Ultra-low-power with FlexPowerControl (down to 28 nA Standby mode and 84
|micro| A/MHz run mode)
- Core: ARM |reg| 32-bit Cortex |reg| -M4 CPU with FPU, frequency up to 80 MHz,
100DMIPS/1.25DMIPS/MHz (Dhrystone 2.1)
- Clock Sources:
- 32 kHz crystal oscillator for RTC (LSE)
- Internal 16 MHz factory-trimmed RC ( |plusminus| 1%)
- Internal low-power 32 kHz RC ( |plusminus| 5%)
- Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by
LSE (better than |plusminus| 0.25 % accuracy)
- 2 PLLs for system clock, USB, audio, ADC
- RTC with HW calendar, alarms and calibration
- Up to 3 capacitive sensing channels: support touchkey, linear and rotary touch sensors
- 11x timers:
- 1x 16-bit advanced motor-control
- 1x 32-bit and 2x 16-bit general purpose
- 2x 16-bit basic
- 2x low-power 16-bit timers (available in Stop mode)
- 2x watchdogs
- SysTick timer
- Up to 26 fast I/Os, most 5 V-tolerant
- Memories
- Up to 256 KB single bank Flash, proprietary code readout protection
- Up to 64 KB of SRAM including 16 KB with hardware parity check
- Quad SPI memory interface
- Rich analog peripherals (independent supply)
- 1x 12-bit ADC 5 MSPS, up to 16-bit with hardware oversampling, 200
|micro| A/MSPS
- 2x 12-bit DAC, low-power sample and hold
- 1x operational amplifiers with built-in PGA
- 2x ultra-low-power comparators
- 13x communication interfaces
- USB OTG 2.0 full-speed crystal less solution with LPM and BCD
- 1x SAIs (serial audio interface)
- 2x I2C FM+(1 Mbit/s), SMBus/PMBus
- 3x USARTs (ISO 7816, LIN, IrDA, modem)
- 2x SPIs (3x SPIs with the Quad SPI)
- CAN (2.0B Active)
- SWPMI single wire protocol master I/F
- IRTIM (Infrared interface)
- 14-channel DMA controller
- True random number generator
- CRC calculation unit, 96-bit unique ID
- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell*
More information about STM32L432KC can be found here:
- `STM32L432KC on www.st.com`_
- `STM32L432 reference manual`_
Supported Features
==================
The Zephyr nucleo_l432kc board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| PWM | on-chip | pwm |
+-----------+------------+-------------------------------------+
| CAN | on-chip | can |
+-----------+------------+-------------------------------------+
.. note:: CAN feature requires CAN transceiver
Other hardware features are not yet supported on this Zephyr port.
The default configuration can be found in the defconfig file:
:zephyr_file:`boards/st/nucleo_l432kc/nucleo_l432kc_defconfig`
Connections and IOs
===================
Nucleo L432KC Board has 6 GPIO controllers. These controllers are responsible for pin muxing,
input/output, pull-up, etc.
Available pins:
---------------
.. image:: img/nucleo_l432kc_arduino_nano.jpg
:align: center
:alt: Nucleo L432KC Arduino connectors
For more details please refer to `STM32 Nucleo-32 board User Manual`_.
Default Zephyr Peripheral Mapping:
----------------------------------
- UART_1_TX : PA9
- UART_1_RX : PA10
- UART_2_TX : PA2
- UART_2_RX : PA3
- I2C_1_SCL : PB6
- I2C_1_SDA : PB7
- PWM_2_CH1 : PA0
- LD3 : PB3
System Clock
------------
Nucleo L432KC System Clock could be driven by internal or external oscillator,
as well as main PLL clock. By default System clock is driven by PLL clock at 80MHz,
driven by 16MHz high speed internal oscillator.
Serial Port
-----------
Nucleo L432KC board has 3 U(S)ARTs. The Zephyr console output is assigned to UART2.
Default settings are 115200 8N1.
Programming and Debugging
*************************
Applications for the ``nucleo_l432kc`` board configuration can be built and
flashed in the usual way (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Flashing
========
Nucleo L432KC board includes an ST-LINK/V2-1 embedded debug tool
interface. This interface is supported by the openocd version
included in the Zephyr SDK since v0.9.2.
Flashing an application to Nucleo L432KC
----------------------------------------
Connect the Nucleo L432KC to your host computer using the USB port,
then run a serial host program to connect with your Nucleo board.
.. code-block:: console
$ minicom -D /dev/ttyACM0
Now build and flash an application. Here is an example for
:ref:`hello_world`.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nucleo_l432kc
:goals: build flash
You should see the following message on the console:
.. code-block:: console
$ Hello World! arm
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nucleo_l432kc
:maybe-skip-config:
:goals: debug
.. _Nucleo L432KC website:
path_to_url
.. _STM32 Nucleo-32 board User Manual:
path_to_url
.. _STM32L432KC on www.st.com:
path_to_url
.. _STM32L432 reference manual:
path_to_url
``` | /content/code_sandbox/boards/st/nucleo_l432kc/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,842 |
```cmake
board_runner_args(jlink "--device=STM32F405RG" "--speed=4000")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/st/st25dv_mb1283_disco/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 55 |
```unknown
# Enable MPU
CONFIG_ARM_MPU=y
# Enable HW stack protection
CONFIG_HW_STACK_PROTECTION=y
CONFIG_SERIAL=y
# console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# enable GPIO
CONFIG_GPIO=y
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/st25dv_mb1283_disco/st25dv_mb1283_disco_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 69 |
```yaml
board:
name: st25dv_mb1283_disco
vendor: st
socs:
- name: stm32f405xx
``` | /content/code_sandbox/boards/st/st25dv_mb1283_disco/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 34 |
```unknown
# ST25DV DISCOVERY board configuration
if BOARD_ST25DV_MB1283_DISCO
config SPI_STM32_INTERRUPT
default y
depends on SPI
endif # BOARD_ST25DV_MB1283_DISCO
``` | /content/code_sandbox/boards/st/st25dv_mb1283_disco/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 48 |
```unknown
# ST25DV DISCOVERY board configuration
config BOARD_ST25DV_MB1283_DISCO
select SOC_STM32F405XX
``` | /content/code_sandbox/boards/st/st25dv_mb1283_disco/Kconfig.st25dv_mb1283_disco | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 30 |
```yaml
identifier: st25dv_mb1283_disco
name: ST ST25DV MB1283 Discovery
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 192
flash: 1024
supported:
- gpio
- i2c
- spi
- usb_device
vendor: st
``` | /content/code_sandbox/boards/st/st25dv_mb1283_disco/st25dv_mb1283_disco.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 89 |
```ini
source [find interface/stlink.cfg]
transport select hla_swd
source [find target/stm32f4x.cfg]
adapter speed 1000
reset_config srst_only
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
``` | /content/code_sandbox/boards/st/st25dv_mb1283_disco/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 94 |
```unknown
/*
*
*/
/dts-v1/;
#include "st/f4/stm32f405Xg.dtsi"
#include "st/f4/stm32f405vgtx-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
#include <zephyr/dt-bindings/display/ili9xxx.h>
/ {
model = "ST ST25DV Discovery Kit with MB1283";
compatible = "st,st25dv_mb1283_disco", "st,stm32f405", "st,stm32f4";
chosen {
zephyr,console = &usart6;
zephyr,shell-uart = &usart6;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,display = &ili9341;
};
leds {
compatible = "gpio-leds";
orange_led: led_1 {
gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>;
};
yellow_led: led_2 {
gpios = <&gpioc 4 GPIO_ACTIVE_HIGH>;
};
};
buttons: gpio_keys {
compatible = "gpio-keys";
blue_button: button_1 {
gpios = <&gpioc 14 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_0>;
};
sel_button: button_2 {
gpios = <&gpioe 8 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_ENTER>;
};
left_button: button_3 {
gpios = <&gpioe 9 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_LEFT>;
};
right_button: button_4 {
gpios = <&gpioe 11 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_RIGHT>;
};
up_button: button_5 {
gpios = <&gpioe 10 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_UP>;
};
down_button: button_6 {
gpios = <&gpioe 12 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_DOWN>;
};
};
aliases {
led0 = &orange_led;
sw0 = &blue_button;
};
mipi_dbi {
compatible = "zephyr,mipi-dbi-spi";
reset-gpios = <&gpioc 1 GPIO_ACTIVE_HIGH>;
dc-gpios = <&gpioc 0 GPIO_ACTIVE_HIGH>;
spi-dev = <&spi2>;
#address-cells = <1>;
#size-cells = <0>;
write-only;
ili9341: ili9341@0 {
compatible = "ilitek,ili9341";
mipi-max-frequency = <DT_FREQ_M(20)>;
reg = <0>;
pixel-format = <ILI9XXX_PIXEL_FORMAT_RGB888>;
rotation = <0>;
width = <240>;
height = <320>;
duplex = <0x800>;
};
};
};
&clk_lsi {
status = "okay";
};
&clk_hse {
clock-frequency = <DT_FREQ_M(8)>;
status = "okay";
};
&pll {
div-m = <4>;
mul-n = <168>;
div-p = <2>;
div-q = <7>;
clocks = <&clk_hse>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(168)>;
ahb-prescaler = <1>;
apb1-prescaler = <4>;
apb2-prescaler = <2>;
};
&usart6 {
pinctrl-0 = <&usart6_tx_pc6 &usart6_rx_pc7>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>,
<&rcc STM32_SRC_LSI RTC_SEL(2)>;
status = "okay";
};
&spi2 { /* Max 20 Mbit/s */
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&spi2_mosi_pc3 &spi2_sck_pb13>;
cs-gpios = <&gpiob 12 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
pinctrl-names = "default";
status = "okay";
};
&i2c1 {
pinctrl-0 = <&i2c1_scl_pb6 &i2c1_sda_pb7>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
stmpe811: stmpe811@41 {
compatible = "st,stmpe811";
status = "okay";
reg = <0x41>;
int-gpios = <&gpiob 5 GPIO_ACTIVE_LOW>;
screen-width = <240>;
screen-height = <320>;
raw-x-min = <240>;
raw-y-min = <200>;
raw-x-max = <3680>;
raw-y-max = <3800>;
panel-driver-settling-time-us = <1000>;
touch-detect-delay-us = <5000>;
touch-average-control = <8>;
tracking-index = <127>;
};
};
zephyr_udc0: &usbotg_fs {
pinctrl-0 = <&usb_otg_fs_id_pa10 &usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12>;
pinctrl-names = "default";
status = "okay";
};
``` | /content/code_sandbox/boards/st/st25dv_mb1283_disco/st25dv_mb1283_disco.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,265 |
```cmake
board_runner_args(jlink "--device=STM32L496AG" "--speed=4000")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/st/stm32l496g_disco/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 55 |
```c
/*
*/
#include <zephyr/kernel.h>
#include <zephyr/init.h>
#include <stm32_ll_adc.h>
#include <zephyr/devicetree.h>
static int enable_adc_reference(void)
{
uint8_t init_status;
/* VREF+ is not connected to VDDA by default */
/* Use 2.5V as reference (instead of 3.3V) for internal channels
* calculation
*/
__HAL_RCC_SYSCFG_CLK_ENABLE();
/* VREF_OUT2 = 2.5 V */
HAL_SYSCFG_VREFBUF_VoltageScalingConfig(SYSCFG_VREFBUF_VOLTAGE_SCALE1);
HAL_SYSCFG_VREFBUF_HighImpedanceConfig(
SYSCFG_VREFBUF_HIGH_IMPEDANCE_DISABLE);
init_status = HAL_SYSCFG_EnableVREFBUF();
__ASSERT(init_status == HAL_OK, "ADC Conversion value may be incorrect");
return init_status;
}
SYS_INIT(enable_adc_reference, POST_KERNEL, 0);
``` | /content/code_sandbox/boards/st/stm32l496g_disco/board_adc_vref.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 217 |
```unknown
config BOARD_STM32L496G_DISCO
select SOC_STM32L496XX
``` | /content/code_sandbox/boards/st/stm32l496g_disco/Kconfig.stm32l496g_disco | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 22 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/l4/stm32l496Xg.dtsi>
#include <st/l4/stm32l496a(e-g)ix-pinctrl.dtsi>
#include "arduino_r3_connector.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "STMicroelectronics STM32L496G-DISCO board";
compatible = "st,stm32l496g-disco";
chosen {
zephyr,console = &usart2;
zephyr,shell-uart = &usart2;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,flash-controller = &mx25r6435;
};
leds {
compatible = "gpio-leds";
green_led_2: led_2 {
gpios = <&gpiob 13 GPIO_ACTIVE_HIGH>;
label = "User LD2";
};
};
gpio_keys {
compatible = "gpio-keys";
joy_sel: joystick_select {
label = "joystick select";
gpios = <&gpioc 13 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
zephyr,code = <INPUT_KEY_ENTER>;
};
joy_down: joystick_down {
label = "joystick down";
gpios = <&gpioi 10 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
zephyr,code = <INPUT_KEY_DOWN>;
};
joy_up: joystick_up {
label = "joystick up";
gpios = <&gpioi 8 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
zephyr,code = <INPUT_KEY_UP>;
};
joy_left: joystick_left {
label = "joystick left";
gpios = <&gpioi 9 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
zephyr,code = <INPUT_KEY_LEFT>;
};
joy_right: joystick_right {
label = "joystick right";
gpios = <&gpiof 11 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
zephyr,code = <INPUT_KEY_RIGHT>;
};
};
aliases {
led0 = &green_led_2;
sw0 = &joy_sel;
sw1 = &joy_down;
sw2 = &joy_right;
sw3 = &joy_up;
sw4 = &joy_left;
volt-sensor0 = &vref;
volt-sensor1 = &vbat;
};
};
&clk_lsi {
status = "okay";
};
&clk_hsi48 {
status = "okay";
};
&clk_hsi {
status = "okay";
};
&pll {
div-m = <1>;
mul-n = <20>;
div-p = <7>;
div-q = <2>;
div-r = <4>;
clocks = <&clk_hsi>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(80)>;
ahb-prescaler = <1>;
apb1-prescaler = <1>;
apb2-prescaler = <1>;
};
&usart1 {
pinctrl-0 = <&usart1_tx_pb6 &usart1_rx_pg10>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&usart2 {
pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pd6>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&lpuart1 {
pinctrl-0 = <&lpuart1_tx_pg7 &lpuart1_rx_pg8>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&timers2 {
status = "okay";
pwm2: pwm {
status = "okay";
pinctrl-0 = <&tim2_ch1_pa0>;
pinctrl-names = "default";
};
};
&i2c1 {
pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb7>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
&spi1 {
pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pb4 &spi1_mosi_pb5>;
pinctrl-names = "default";
cs-gpios = <&gpioa 15 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
status = "okay";
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>,
<&rcc STM32_SRC_LSI RTC_SEL(2)>;
status = "okay";
};
&sdmmc1 {
pinctrl-0 = <&sdmmc1_d0_pc8 &sdmmc1_d1_pc9
&sdmmc1_d2_pc10 &sdmmc1_d3_pc11
&sdmmc1_ck_pc12 &sdmmc1_cmd_pd2>;
pinctrl-names = "default";
status = "okay";
};
&adc1 {
pinctrl-0 = < &adc1_in2_pc1>;
pinctrl-names = "default";
st,adc-clock-source = <SYNC>;
st,adc-prescaler = <4>;
status = "okay";
};
zephyr_udc0: &usbotg_fs {
pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12
&usb_otg_fs_id_pa10>;
pinctrl-names = "default";
status = "okay";
};
&vref {
status = "okay";
};
&vbat {
status = "okay";
};
&dma2 {
status = "okay";
};
&quadspi {
pinctrl-0 = <&quadspi_bk1_io0_pb1 &quadspi_bk1_io1_pb0
&quadspi_bk1_io2_pa7 &quadspi_bk1_io3_pa6
&quadspi_bk1_ncs_pb11 &quadspi_clk_pa3>;
pinctrl-names = "default";
dmas = <&dma2 7 3 0x480>; /* channel 7 request 3 on DMA2 */
dma-names = "tx_rx";
flash-id = <1>;
status = "okay";
mx25r6435: qspi-nor-flash@90000000 {
compatible = "st,stm32-qspi-nor";
reg = <0x90000000 DT_SIZE_M(8)>; /* 64 Mbits */
qspi-max-frequency = <8000000>;
status = "okay";
spi-bus-width = <4>;
writeoc = "PP_1_4_4";
};
};
``` | /content/code_sandbox/boards/st/stm32l496g_disco/stm32l496g_disco.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,514 |
```restructuredtext
.. _st25dv_mb1283_disco_board:
ST ST25DV Discovery, MB1283 version
###################################
Overview
********
The ST25DV04K device is a dynamic NFC/RFID tag IC with a dual interface. It embeds a
4 Kbits EEPROM memory. It can be operated from an I2C interface, or by a 13.56 MHz
RFID reader, or by a NFC phone. The ST25DV04K Class 5 antenna daughter card, included
in the kit, can be replaced by Class 1 or Class 6 antennas.
The ST25DV-DISCOVERY is a demonstration kit to evaluate the features and capabilities
of the ST25DV series.
It is based on the NFC ST25DV04K device embedded on a daughter card using a Class 5 antenna
and a STM32 processor driving a mother board.
.. image:: img/st25dv_mb1283_disco.jpg
:align: center
:alt: ST25DV_MB1283_DISCO
.. note::
The ST25DV itself is not implemented yet.
Hardware
********
The ST25DV Discovery kit provides the following hardware components:
- Main board: ST25DV_Discovery_Mboard:
- STM32F405VGT6 LQFP100 32-bit microcontroller, with 1 Mbyte Flash memory, 192 + 4 Kbytes SRAM.
- LCD color screen (320 x 200 pixels)
- Touch screen driver
- Different color LEDs (power, user, ST link)
- User push button
- Joystick for menu selection
- Reset button
- On board ST link for microcontroller firmware upgrade and debug
- ST link mini USB
- User micro USB
- USB micro or mini connector for board powering
- Demonstration edition (optional add-on module) with Bluetooth Low Energy module,
Wi-Fi module and JTAG 20 pin connector
It exists in two variants, MB1283 and MB1285.
- Antenna daughter board: ST25DV_Discovery_ANT_C5:
- 40 mm x 24 mm, 13.56 MHz inductive antenna etched on the PCB
- ST25DV04K Dynamic NFC / RFID tag
- I 2 C interface connector
- Energy harvesting output (VOUT) with a 10nF capacitance filtering circuit
- GPO configurable as RF WIP/BUSY output, to indicate that an RF operation is ongoing
The antenna board can be removed, and its 14-pin 0.254mm header connector used as an eval kit header.
Connections and IOs
===================
Default Zephyr Peripheral Mapping
---------------------------------
- UART_6 TX/RX : PC6/PC7 (ST-Link Virtual Port Com)
- UART_2 TX/RX : PA2/PA3 (Available on J6 connector)
- I2C1 SCL/SDA : PB6/PB7 (Touchscreen STMPE811, interrupt pin PB5)
- SPI2 SCK/MOSI/CS : PB13/PC3/PB12 (LCD display FRD24048TP, reset pin PC1, DC pin PC0)
- SPI1 SCK/MISO/MOSI/CS : PA5/PA6/PA7/PA4 (External ST25DV connector J6)
- GPIO : PE8/PE9/PE10/PE11/PE12 (Joystick)
- LD1 : PC13 (Orange led)
- LD2 : PC4 (Yellow led)
- GPIO : PE15/PE7 (Available on external ST25DV connector J6)
- GPIO : PE14 (Available on J5 connector)
Serial Port
===========
The Zephyr console output and shell are assigned to UART6, which is connected to the
onboard ST-LINK/V2 Virtual COM port interface.
Default communication settings are 115200 8N1.
Programming and Debugging
*************************
Applications for the ``st25dv_mb1283_disco`` board configuration can be built and
flashed in the usual way (see :ref:`build_an_application` and
:ref:`application_run` for more details).
If programming fails, press the reset button (black) and release it while "west flash" is running.
Flashing
========
ST25DV Discovery kit includes an ST-LINK/V2 embedded debug tool interface.
This interface is supported by the openocd version included in the Zephyr SDK.
Flashing an application to ST25DV Discovery
--------------------------------------------
First, connect the ST25DV Discovery kit to your host computer using
the USB port to prepare it for flashing. Then build and flash your application.
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: st25dv_mb1283_disco
:goals: build flash
Run a serial host program to connect with your board:
.. code-block:: console
$ minicom -D /dev/ttyACM0
You should see the following message on the console:
.. code-block:: console
Hello World! st25dv_mb1283_disco
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: st25dv_mb1283_disco
:goals: debug
.. _ST25DV-DISCO website:
path_to_url
.. _ST25DV datasheet:
path_to_url
.. _STM32F40xxx reference manual:
path_to_url
``` | /content/code_sandbox/boards/st/st25dv_mb1283_disco/docs/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,219 |
```unknown
# STM32L476G Nucleo board configuration
if BOARD_STM32L496G_DISCO
config SPI_STM32_INTERRUPT
default y
depends on SPI
config DISK_DRIVER_SDMMC
default y if DISK_DRIVERS
endif # BOARD_STM32L496G_DISCO
``` | /content/code_sandbox/boards/st/stm32l496g_disco/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 66 |
```yaml
identifier: stm32l496g_disco
name: ST STM32L496G Discovery
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 320
flash: 1024
supported:
- arduino_i2c
- pwm
- i2c
- spi
- gpio
- counter
- adc
- qspi
vendor: st
``` | /content/code_sandbox/boards/st/stm32l496g_disco/stm32l496g_disco.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 107 |
```unknown
# Enable MPU
CONFIG_ARM_MPU=y
# Enable HW stack protection
CONFIG_HW_STACK_PROTECTION=y
# enable uart driver
CONFIG_SERIAL=y
# enable GPIOs
CONFIG_GPIO=y
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/stm32l496g_disco/stm32l496g_disco_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 75 |
```unknown
/*
*
*/
/ {
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map =
<0 0 &gpioc 4 0>, /* A0 */
<1 0 &gpioc 1 0>, /* A1 */
<2 0 &gpioc 3 0>, /* A2 */
<3 0 &gpiof 10 0>, /* A3 */
<4 0 &gpioa 1 0>, /* A4 */
<5 0 &gpioc 0 0>, /* A5 */
<6 0 &gpiog 8 0>, /* D0 */
<7 0 &gpiog 7 0>, /* D1 */
<8 0 &gpiog 13 0>, /* D2 */
<9 0 &gpioh 15 0>, /* D3 */
<10 0 &gpioi 11 0>, /* D4 */
<11 0 &gpiob 9 0>, /* D5 */
<12 0 &gpioi 6 0>, /* D6 */
<13 0 &gpiog 6 0>, /* D7 */
<14 0 &gpiog 15 0>, /* D8 */
<15 0 &gpioh 13 0>, /* D9 */
<16 0 &gpioa 15 0>, /* D10 */
<17 0 &gpiob 5 0>, /* D11 */
<18 0 &gpiob 4 0>, /* D12 */
<19 0 &gpioa 5 0>, /* D13 */
<20 0 &gpiob 7 0>, /* D14 */
<21 0 &gpiob 8 0>; /* D15 */
};
};
arduino_i2c: &i2c1 {};
arduino_spi: &spi1 {};
arduino_serial: &lpuart1 {};
``` | /content/code_sandbox/boards/st/stm32l496g_disco/arduino_r3_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 527 |
```yaml
board:
name: stm32l496g_disco
vendor: st
socs:
- name: stm32l496xx
``` | /content/code_sandbox/boards/st/stm32l496g_disco/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 33 |
```ini
source [find board/stm32l4discovery.cfg]
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
``` | /content/code_sandbox/boards/st/stm32l496g_disco/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 68 |
```unknown
/*
*/
#include <zephyr/dt-bindings/gpio/gpio.h>
#include <zephyr/dt-bindings/gpio/st-morpho-header.h>
/ {
st_morpho_header: st-morpho-header {
compatible = "st-morpho-header";
#gpio-cells = <2>;
gpio-map-mask = <ST_MORPHO_PIN_MASK 0x0>;
gpio-map-pass-thru = <0x0 GPIO_DT_FLAGS_MASK>;
gpio-map = <ST_MORPHO_L_1 0 &gpioc 10 0>,
<ST_MORPHO_L_2 0 &gpioc 11 0>,
<ST_MORPHO_L_3 0 &gpioc 12 0>,
<ST_MORPHO_L_4 0 &gpiod 2 0>,
<ST_MORPHO_L_9 0 &gpiof 6 0>,
<ST_MORPHO_L_11 0 &gpiof 7 0>,
<ST_MORPHO_L_13 0 &gpioa 13 0>,
<ST_MORPHO_L_15 0 &gpioa 14 0>,
<ST_MORPHO_L_17 0 &gpioa 15 0>,
<ST_MORPHO_L_21 0 &gpiob 7 0>,
<ST_MORPHO_L_23 0 &gpioc 13 0>,
<ST_MORPHO_L_25 0 &gpioc 14 0>,
<ST_MORPHO_L_27 0 &gpioc 15 0>,
<ST_MORPHO_L_28 0 &gpioa 0 0>,
<ST_MORPHO_L_29 0 &gpiof 0 0>,
<ST_MORPHO_L_30 0 &gpioa 1 0>,
<ST_MORPHO_L_31 0 &gpiof 1 0>,
<ST_MORPHO_L_32 0 &gpioa 4 0>,
<ST_MORPHO_L_34 0 &gpiob 0 0>,
<ST_MORPHO_L_35 0 &gpioc 2 0>,
<ST_MORPHO_L_36 0 &gpioc 1 0>, /* SB56=ON, SB46=OFF */
<ST_MORPHO_L_37 0 &gpioc 3 0>,
<ST_MORPHO_L_38 0 &gpioc 0 0>, /* SB51=ON, SB52=OFF */
<ST_MORPHO_R_1 0 &gpioc 9 0>,
<ST_MORPHO_R_2 0 &gpioc 8 0>,
<ST_MORPHO_R_3 0 &gpiob 8 0>,
<ST_MORPHO_R_4 0 &gpioc 6 0>,
<ST_MORPHO_R_5 0 &gpiob 9 0>,
<ST_MORPHO_R_6 0 &gpioc 5 0>,
<ST_MORPHO_R_11 0 &gpioa 5 0>,
<ST_MORPHO_R_12 0 &gpioa 12 0>,
<ST_MORPHO_R_13 0 &gpioa 6 0>,
<ST_MORPHO_R_14 0 &gpioa 11 0>,
<ST_MORPHO_R_15 0 &gpioa 7 0>,
<ST_MORPHO_R_16 0 &gpiob 12 0>,
<ST_MORPHO_R_17 0 &gpiob 6 0>,
<ST_MORPHO_R_18 0 &gpiob 11 0>,
<ST_MORPHO_R_19 0 &gpioc 7 0>,
<ST_MORPHO_R_21 0 &gpioa 9 0>,
<ST_MORPHO_R_22 0 &gpiob 2 0>,
<ST_MORPHO_R_23 0 &gpioa 8 0>,
<ST_MORPHO_R_24 0 &gpiob 1 0>,
<ST_MORPHO_R_25 0 &gpiob 10 0>,
<ST_MORPHO_R_26 0 &gpiob 15 0>,
<ST_MORPHO_R_27 0 &gpiob 4 0>,
<ST_MORPHO_R_28 0 &gpiob 14 0>,
<ST_MORPHO_R_29 0 &gpiob 5 0>,
<ST_MORPHO_R_30 0 &gpiob 13 0>,
<ST_MORPHO_R_31 0 &gpiob 3 0>,
<ST_MORPHO_R_33 0 &gpioa 10 0>,
<ST_MORPHO_R_34 0 &gpioc 4 0>,
<ST_MORPHO_R_35 0 &gpioa 2 0>,
<ST_MORPHO_R_36 0 &gpiof 5 0>,
<ST_MORPHO_R_37 0 &gpioa 3 0>,
<ST_MORPHO_R_38 0 &gpiof 4 0>;
};
};
``` | /content/code_sandbox/boards/st/nucleo_f030r8/st_morpho_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,263 |
```cmake
board_runner_args(jlink "--device=STM32F030R8" "--speed=4000")
board_runner_args(probe-rs "--chip=STM32F030R8Tx")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
include(${ZEPHYR_BASE}/boards/common/probe-rs.board.cmake)
``` | /content/code_sandbox/boards/st/nucleo_f030r8/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 92 |
```yaml
identifier: nucleo_f030r8
name: ST Nucleo F030R8
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 8
flash: 64
supported:
- arduino_gpio
- arduino_i2c
- arduino_spi
- i2c
- spi
- gpio
- watchdog
- adc
testing:
ignore_tags:
- net
- bluetooth
vendor: st
``` | /content/code_sandbox/boards/st/nucleo_f030r8/nucleo_f030r8_1.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 123 |
```unknown
# Kernel Options due to Low Memory (8k)
CONFIG_MAIN_STACK_SIZE=640
CONFIG_IDLE_STACK_SIZE=200
CONFIG_ISR_STACK_SIZE=512
# Prevent Interrupt Vector Table in RAM
CONFIG_SRAM_VECTOR_TABLE=n
# Serial Drivers
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# GPIO Controller
CONFIG_GPIO=y
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/nucleo_f030r8/nucleo_f030r8_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 105 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/f0/stm32f030X8.dtsi>
#include <st/f0/stm32f030r8tx-pinctrl.dtsi>
#include "arduino_r3_connector.dtsi"
#include "st_morpho_connector.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "STMicroelectronics STM32F030R8-NUCLEO board";
compatible = "st,stm32f030r8-nucleo";
chosen {
zephyr,console = &usart2;
zephyr,shell-uart = &usart2;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
};
leds: leds {
compatible = "gpio-leds";
green_led_2: led_2 {
gpios = <&gpioa 5 GPIO_ACTIVE_HIGH>;
label = "User LD2";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button {
label = "User";
gpios = <&gpioc 13 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_0>;
};
};
aliases {
led0 = &green_led_2;
sw0 = &user_button;
watchdog0 = &iwdg;
die-temp0 = &die_temp;
volt-sensor0 = &vref;
};
};
&clk_hse {
hse-bypass;
clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
status = "okay";
};
&pll {
prediv = <1>;
mul = <6>;
clocks = <&clk_hse>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(48)>;
ahb-prescaler = <1>;
apb1-prescaler = <1>;
};
/* Due to limited available memory, don't enable gpiod and gpiof */
/* (Test cases fail due to 'SRAM' region overflow) */
&gpiod {status = "disabled";};
&gpiof {status = "disabled";};
&usart1 {
pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&usart2 {
pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa3>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&i2c1 {
pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
&i2c2 {
pinctrl-0 = <&i2c2_scl_pb10 &i2c2_sda_pb11>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
&spi1 {
pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pa7>;
pinctrl-names = "default";
cs-gpios = <&gpiob 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
status = "okay";
};
&spi2 {
pinctrl-0 = <&spi2_nss_pb12 &spi2_sck_pb13
&spi2_miso_pb14 &spi2_mosi_pb15>;
pinctrl-names = "default";
status = "okay";
};
&adc1 {
pinctrl-0 = <&adc_in0_pa0>;
pinctrl-names = "default";
st,adc-clock-source = <SYNC>;
st,adc-prescaler = <4>;
status = "okay";
};
&iwdg {
status = "okay";
};
&die_temp {
status = "okay";
};
&vref {
status = "okay";
};
``` | /content/code_sandbox/boards/st/nucleo_f030r8/nucleo_f030r8.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 910 |
```restructuredtext
.. _stm32l496g_disco_board:
ST STM32L496G Discovery
#######################
Overview
********
The STM32L496G Discovery board features an ARM Cortex-M4 based STM32L496AG MCU
with a wide range of connectivity support and configurations. Here are
some highlights of the STM32L496G Discovery board:
- STM32L496AGI6 microcontroller featuring 1 Mbyte of Flash memory and 320 Kbytes of RAM in an UFBGA169 package
- 1.54 inch 240 x 240 pixel-TFT color LCD with parallel interface
- SAI Audio CODEC, with a stereo headset jack, including analog microphone input
- Stereo digital MEMS microphones
- microSD card connector (card included)
- Camera 8 bit-connector
- 8 Mbit-PSRAM
- IDD measurement
- 64 Mbit-Quad-SPI Flash
- USB OTG FS with Micro-AB connector
- Two types of extension resources:
- STMod+ and PMOD connectors
- Compatible Arduino* Uno V3 connectors
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector
- 5 source options for power supply
- ST-LINK/V2-1 USB connector
- User USB FS connector
- VIN from Arduino connector
- 5 V from Arduino connector
- USB charger
- USB VBUS or external source(3.3V, 5V, 7 - 12V)
- Power management access point
- 8 LEDs
- Reset push button
- 4 direction-joystick with selection
.. image:: img/stm32l496g_disco.jpg
:align: center
:alt: STM32L496G Discovery
More information about the board can be found at the `STM32L496G Discovery website`_.
Hardware
********
The STM32L496AG SoC provides the following hardware capabilities:
- Ultra-low-power with FlexPowerControl (down to 108 nA Standby mode and 91
|micro| A/MHz run mode)
- Core: ARM |reg| 32-bit Cortex |reg| -M4 CPU with FPU, frequency up to 80 MHz,
100DMIPS/1.25DMIPS/MHz (Dhrystone 2.1)
- Clock Sources:
- 4 to 48 MHz crystal oscillator
- 32 kHz crystal oscillator for RTC (LSE)
- Internal 16 MHz factory-trimmed RC ( |plusminus| 1%)
- Internal low-power 32 kHz RC ( |plusminus| 5%)
- Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by
LSE (better than |plusminus| 0.25 % accuracy)
- Internal 48 MHz with clock recovery
- 3 PLLs for system clock, USB, audio, ADC
- RTC with HW calendar, alarms and calibration
- LCD 8 x 40 or 4 x 44 with step-up converter
- Up to 24 capacitive sensing channels: support touchkey, linear and rotary touch sensors
- 16x timers:
- 2x 16-bit advanced motor-control
- 2x 32-bit and 5x 16-bit general purpose
- 2x 16-bit basic
- 2x low-power 16-bit timers (available in Stop mode)
- 2x watchdogs
- SysTick timer
- Up to 136 fast I/Os, most 5 V-tolerant, up to 14 I/Os with independent supply down to 1.08 V
- Memories
- Up to 1 MB Flash, 2 banks read-while-write, proprietary code readout protection
- 320 KB of SRAM including 64 KB with hardware parity check
- External memory interface for static memories supporting SRAM, PSRAM, NOR, and NAND memories
- Quad SPI memory interface
- 4x digital filters for sigma delta modulator
- Rich analog peripherals (independent supply)
- 3x 12-bit ADC 5 MSPS, up to 16-bit with hardware oversampling, 200
|micro| A/MSPS
- 2x 12-bit DAC, low-power sample and hold
- 2x operational amplifiers with built-in PGA
- 2x ultra-low-power comparators
- 20x communication interfaces
- USB OTG 2.0 full-speed, LPM and BCD
- 2x SAIs (serial audio interface)
- 4x I2C FM+(1 Mbit/s), SMBus/PMBus
- 5x USARTs (ISO 7816, LIN, IrDA, modem)
- 1x LPUART
- 3x SPIs (4x SPIs with the Quad SPI)
- 2x CAN (2.0B Active) and SDMMC interface
- SWPMI single wire protocol master I/F
- IRTIM (Infrared interface)
- 14-channel DMA controller
- True random number generator
- CRC calculation unit, 96-bit unique ID
- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell*
More information about STM32L496AG can be found in:
- `STM32L496AG on www.st.com`_
- `STM32L496 reference manual`_
Supported Features
==================
The Zephyr stm32l496g_disco board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| SDMMC | on-chip | disk access |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| QSPI NOR | on-chip | off-chip flash |
+-----------+------------+-------------------------------------+
| PWM | on-chip | pwm |
+-----------+------------+-------------------------------------+
| ADC | on-chip | adc |
+-----------+------------+-------------------------------------+
| USB | on-chip | usb_device |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported on this Zephyr port.
The default configuration can be found in the defconfig file:
:zephyr_file:`boards/st/stm32l496g_disco/stm32l496g_disco_defconfig`
Connections and IOs
===================
STM32L496G Discovery Board has 8 GPIO controllers. These controllers are responsible for pin muxing,
input/output, pull-up, etc.
For more details please refer to `STM32L496G Discovery board User Manual`_.
Default Zephyr Peripheral Mapping:
----------------------------------
- UART_1 TX/RX : PB6/PG10
- UART_2 TX/RX : PA2/PD6 (ST-Link Virtual Port Com)
- LPUART_1 TX/RX : PG7/PG8 (Arduino Serial)
- I2C1 SCL/SDA : PB8/PB7 (Arduino I2C)
- SDMMC_1 D0/D1/D2/D3/CK/CMD: PC8/PC9/PC10/PC11/PC12/PD2
- SPI1 NSS/SCK/MISO/MOSI : PA15/PA5/PB4/PB5 (Arduino SPI)
- USB DM/DP/ID : PA11/PA12/PA10
- I2C_1_SCL : PB8
- I2C_1_SDA : PB7
- PWM_2_CH1 : PA0
- LD2 : PB13
System Clock
------------
STM32L496G Discovery System Clock could be driven by an internal or external oscillator,
as well as the main PLL clock. By default the System clock is driven by the PLL clock at 80MHz,
driven by 16MHz high speed internal oscillator.
Serial Port
-----------
STM32L496G Discovery board has 5 U(S)ARTs. The Zephyr console output is assigned to UART2.
Default settings are 115200 8N1.
Programming and Debugging
*************************
Flashing
========
STM32L496G Discovery board includes an ST-LINK/V2-1 embedded debug
tool interface. This interface is supported by openocd version
v0.10.0, which has been available since Zephyr SDK v0.9.2.
Applications for the ``stm32l496g_disco`` board configuration can be
built and flashed in the usual way (see :ref:`build_an_application`
and :ref:`application_run` for more details).
Flashing an application to STM32L496G Discovery
-----------------------------------------------
Connect the STM32L496G Discovery to your host computer using the USB
port, then run a serial host program to connect with your Discovery
board. For example:
.. code-block:: console
$ minicom -D /dev/ttyACM0
Then, build and flash in the usual way. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: stm32l496g_disco
:goals: build flash
You should see the following message on the console:
.. code-block:: console
Hello World! arm
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: stm32l496g_disco
:maybe-skip-config:
:goals: debug
.. _STM32L496G Discovery website:
path_to_url
.. _STM32L496G Discovery board User Manual:
path_to_url
.. _STM32L496AG on www.st.com:
path_to_url
.. _STM32L496 reference manual:
path_to_url
``` | /content/code_sandbox/boards/st/stm32l496g_disco/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,313 |
```yaml
identifier: nucleo_f030r8@2
name: ST Nucleo F030R8 (rev. 2)
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 8
flash: 64
supported:
- arduino_gpio
- arduino_i2c
- arduino_spi
- i2c
- spi
- gpio
- watchdog
- adc
testing:
ignore_tags:
- net
- bluetooth
vendor: st
``` | /content/code_sandbox/boards/st/nucleo_f030r8/nucleo_f030r8_2.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 130 |
```yaml
board:
name: nucleo_f030r8
vendor: st
revision:
format: number
default: "1"
revisions:
- name: "1"
- name: "2"
socs:
- name: stm32f030x8
``` | /content/code_sandbox/boards/st/nucleo_f030r8/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 64 |
```unknown
/*
*
*/
&clk_hse {
status = "disabled";
};
&clk_hsi {
status = "okay";
};
&pll {
prediv = <2>;
mul = <12>;
clocks = <&clk_hsi>;
status = "okay";
};
``` | /content/code_sandbox/boards/st/nucleo_f030r8/nucleo_f030r8_stm32f030x8_1.overlay | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 56 |
```unknown
/*
*
*/
/ {
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpioa 0 0>, /* A0 */
<1 0 &gpioa 1 0>, /* A1 */
<2 0 &gpioa 4 0>, /* A2 */
<3 0 &gpiob 0 0>, /* A3 */
<4 0 &gpioc 1 0>, /* A4 */
<5 0 &gpioc 0 0>, /* A5 */
<6 0 &gpioa 3 0>, /* D0 */
<7 0 &gpioa 2 0>, /* D1 */
<8 0 &gpioa 10 0>, /* D2 */
<9 0 &gpiob 3 0>, /* D3 */
<10 0 &gpiob 5 0>, /* D4 */
<11 0 &gpiob 4 0>, /* D5 */
<12 0 &gpiob 10 0>, /* D6 */
<13 0 &gpioa 8 0>, /* D7 */
<14 0 &gpioa 9 0>, /* D8 */
<15 0 &gpioc 7 0>, /* D9 */
<16 0 &gpiob 6 0>, /* D10 */
<17 0 &gpioa 7 0>, /* D11 */
<18 0 &gpioa 6 0>, /* D12 */
<19 0 &gpioa 5 0>, /* D13 */
<20 0 &gpiob 9 0>, /* D14 */
<21 0 &gpiob 8 0>; /* D15 */
};
};
arduino_i2c: &i2c1 {};
arduino_spi: &spi1 {};
``` | /content/code_sandbox/boards/st/nucleo_f030r8/arduino_r3_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 492 |
```unknown
config BOARD_NUCLEO_F030R8
select SOC_STM32F030X8
``` | /content/code_sandbox/boards/st/nucleo_f030r8/Kconfig.nucleo_f030r8 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 23 |
```ini
source [find board/st_nucleo_f0.cfg]
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
``` | /content/code_sandbox/boards/st/nucleo_f030r8/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 70 |
```unknown
config BOARD_NUCLEO_WBA55CG
select SOC_STM32WBA55XX
``` | /content/code_sandbox/boards/st/nucleo_wba55cg/Kconfig.nucleo_wba55cg | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 23 |
```cmake
board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake)
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
``` | /content/code_sandbox/boards/st/nucleo_wba55cg/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 63 |
```restructuredtext
.. _nucleo_f030r8_board:
ST Nucleo F030R8
################
Overview
********
The STM32 Nucleo-64 development board with STM32F030R8 MCU, supports Arduino and ST morpho connectivity.
The STM32 Nucleo board provides an affordable, and flexible way for users to try out new concepts,
and build prototypes with the STM32 microcontroller, choosing from the various
combinations of performance, power consumption and features.
The Arduino* Uno V3 connectivity support and the ST morpho headers allow easy functionality
expansion of the STM32 Nucleo open development platform with a wide choice of
specialized shields.
The STM32 Nucleo board integrates the ST-LINK/V2-1 debugger and programmer.
The STM32 Nucleo board comes with the STM32 comprehensive software HAL library together
with various packaged software examples.
.. image:: img/nucleo_f030r8.jpg
:align: center
:alt: Nucleo F030R8
More information about the board can be found at the `Nucleo F030R8 website`_.
Hardware
********
Nucleo F030R8 provides the following hardware components:
- STM32 microcontroller in QFP64 package
- Two types of extension resources:
- Arduino* Uno V3 connectivity
- ST morpho extension pin headers for full access to all STM32 I/Os
- ARM* mbed*
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector:
- Selection-mode switch to use the kit as a standalone ST-LINK/V2-1
- Flexible board power supply:
- USB VBUS or external source (3.3V, 5V, 7 - 12V)
- Power management access point
- Three LEDs:
- USB communication (LD1), user LED (LD2), power LED (LD3)
- Two push-buttons: USER and RESET
- USB re-enumeration capability. Three different interfaces supported on USB:
- Virtual COM port
- Mass storage
- Debug port
- Support of wide choice of Integrated Development Environments (IDEs) including:
- IAR
- ARM Keil
- GCC-based IDEs
More information about STM32F030R8 can be found here:
- `STM32F030 reference manual`_
- `STM32F030 data sheet`_
Supported Features
==================
The Zephyr nucleo_f030r8 board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| CLOCK | on-chip | reset and clock control |
+-----------+------------+-------------------------------------+
| FLASH | on-chip | flash memory |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | independent watchdog |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c controller |
+-----------+------------+-------------------------------------+
| ADC | on-chip | ADC controller |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported in this Zephyr port.
The default configuration can be found in
:zephyr_file:`boards/st/nucleo_f030r8/nucleo_f030r8_defconfig`
Connections and IOs
===================
Each of the GPIO pins can be configured by software as output (push-pull or open-drain), as
input (with or without pull-up or pull-down), or as peripheral alternate function. Most of the
GPIO pins are shared with digital or analog alternate functions. All GPIOs are high current
capable except for analog inputs.
Board connectors:
-----------------
.. image:: img/nucleo_f030r8_connectors.jpg
:align: center
:alt: Nucleo F030R8 connectors
Default Zephyr Peripheral Mapping:
----------------------------------
- UART_1 TX/RX : PA9/PA10
- UART_2 TX/RX : PA2/PA3 (ST-Link Virtual COM Port)
- I2C1 SCL/SDA : PB8/PB9 (Arduino I2C)
- I2C2 SCL/SDA : PB10/PB11
- SPI1 NSS/SCK/MISO/MOSI : PB6/PA5/PA6/PA7 (Arduino SPI)
- SPI2 NSS/SCK/MISO/MOSI : PB12/PB13/PB14/PB15
- USER_PB : PC13
- LD1 : PA5
- ADC : PA0
For more details please refer to `STM32 Nucleo-64 board User Manual`_.
Programming and Debugging
*************************
Applications for the ``nucleo_f030r8`` board configuration can be built and
flashed in the usual way (see :ref:`build_an_application` and
:ref:`application_run` for more details).
.. _nucleo-f030r8-flashing:
Flashing
========
Nucleo F030R8 board includes an ST-LINK/V2-1 embedded debug tool interface.
This interface is supported by the openocd version included in the Zephyr SDK.
Flashing an application to Nucleo F030R8
----------------------------------------
Here is an example for the :zephyr:code-sample:`blinky` application.
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: nucleo_f030r8
:goals: build flash
You will see the LED blinking every second.
If using the C-01 board, select revision '1' that supports the board.
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: nucleo_f030r8@1
:goals: build flash
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:zephyr:code-sample:`blinky` application.
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: nucleo_f030r8
:maybe-skip-config:
:goals: debug
Again you have to use the adapted command for C-01.
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: nucleo_f030r8@1
:maybe-skip-config:
:goals: debug
Board Revisions
***************
Nucleo F030R8 has some version of board variants.
`STM32 Nucleo-64 board User Manual`_ mentions to Nucleo board variants.
| *The board version MB1136 C-01 or MB1136 C-02 is mentioned on the sticker, placed on the bottom side of the PCB.*
| *The board marking MB1136 C-01 corresponds to a board, configured as HSE not used.*
| *The board marking MB1136 C-02 (or higher) corresponds to a board, configured to use ST-LINK MCO as the clock input.*
Using revision **2** adapted for C-02(or higher) as default when not explicitly selecting revisions.
If using the C-01 board, select revision **1**.
Please see :ref:`Flashing <nucleo-f030r8-flashing>` section.
References
**********
.. target-notes::
.. _Nucleo F030R8 website:
path_to_url
.. _STM32F030 reference manual:
path_to_url
.. _STM32F030 data sheet:
path_to_url
.. _STM32 Nucleo-64 board User Manual:
path_to_url
``` | /content/code_sandbox/boards/st/nucleo_f030r8/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,762 |
```unknown
# enable uart driver
CONFIG_SERIAL=y
# enable GPIO
CONFIG_GPIO=y
# Enable clock
CONFIG_CLOCK_CONTROL=y
# console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# Enable MPU
CONFIG_ARM_MPU=y
# Enable HW stack protection
CONFIG_HW_STACK_PROTECTION=y
# enable pin controller
CONFIG_PINCTRL=y
# Enable the internal SMPS regulator
CONFIG_POWER_SUPPLY_DIRECT_SMPS=y
``` | /content/code_sandbox/boards/st/nucleo_wba55cg/nucleo_wba55cg_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 89 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/wba/stm32wba55Xg.dtsi>
/* Todo: Once available, use wba55 dedicated pinctrl.dtsi */
#include <st/wba/stm32wba52cgux-pinctrl.dtsi>
#include "arduino_r3_connector.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "STMicroelectronics STM32WBA55CG-NUCLEO board";
compatible = "st,stm32wba55cg-nucleo";
#address-cells = <1>;
#size-cells = <1>;
chosen {
zephyr,bt-c2h-uart = &usart1;
zephyr,console = &usart1;
zephyr,shell-uart = &usart1;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
};
leds: leds {
compatible = "gpio-leds";
blue_led_1: led_0 {
gpios = <&gpiob 4 GPIO_ACTIVE_LOW>;
label = "User LD1";
};
green_led_2: led_1 {
gpios = <&gpioa 9 GPIO_ACTIVE_LOW>;
label = "User LD2";
};
red_led_3: led_2 {
gpios = <&gpiob 8 GPIO_ACTIVE_LOW>;
label = "User LD3";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button_1: button_0 {
label = "User B1";
gpios = <&gpioc 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
zephyr,code = <INPUT_KEY_0>;
};
user_button_2: button_1 {
label = "User B2";
gpios = <&gpiob 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
zephyr,code = <INPUT_KEY_1>;
};
user_button_3: button_2 {
label = "User B3";
gpios = <&gpiob 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
zephyr,code = <INPUT_KEY_2>;
};
};
aliases {
led0 = &blue_led_1;
led1 = &green_led_2;
led2 = &red_led_3;
sw0 = &user_button_1;
sw1 = &user_button_2;
sw2 = &user_button_3;
mcuboot-led0 = &blue_led_1;
mcuboot-button0 = &user_button_1;
};
};
&clk_lsi {
status = "okay";
};
&clk_lse {
status = "okay";
};
&clk_hse {
status = "okay";
hse-div2;
};
&clk_hsi {
status = "okay";
};
&rcc {
clocks = <&clk_hse>;
clock-frequency = <DT_FREQ_M(16)>;
ahb-prescaler = <1>;
ahb5-prescaler = <2>;
apb1-prescaler = <1>;
apb2-prescaler = <2>;
apb7-prescaler = <1>;
};
&iwdg {
status = "okay";
};
&rtc {
status = "okay";
clocks = <&rcc STM32_CLOCK_BUS_APB7 0x00200000>,
<&rcc STM32_SRC_LSE RTC_SEL(1)>;
prescaler = <32768>;
};
&usart1 {
clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00004000>,
<&rcc STM32_SRC_HSI16 USART1_SEL(2)>;
pinctrl-0 = <&usart1_tx_pb12 &usart1_rx_pa8>;
pinctrl-1 = <&analog_pb12 &analog_pa8>;
pinctrl-names = "default", "sleep";
current-speed = <115200>;
status = "okay";
};
&lpuart1 {
pinctrl-0 = <&lpuart1_tx_pb5 &lpuart1_rx_pa10>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&spi1 {
pinctrl-0 = <&spi1_nss_pa12 &spi1_sck_pb4
&spi1_miso_pb3 &spi1_mosi_pa15>;
pinctrl-names = "default";
status = "okay";
};
&i2c1 {
pinctrl-0 = <&i2c1_scl_pb2 &i2c1_sda_pb1>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
&adc4 {
pinctrl-0 = <&adc4_in8_pa1>;
pinctrl-names = "default";
st,adc-clock-source = <ASYNC>;
st,adc-prescaler = <4>;
status = "okay";
};
stm32_lp_tick_source: &lptim1 {
clocks = <&rcc STM32_CLOCK_BUS_APB7 0x00000800>,
<&rcc STM32_SRC_LSE LPTIM1_SEL(3)>;
status = "okay";
};
&rng {
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 DT_SIZE_K(64)>;
};
slot0_partition: partition@10000 {
label = "image-0";
reg = <0x00010000 DT_SIZE_K(448)>;
};
slot1_partition: partition@80000 {
label = "image-1";
reg = <0x00080000 DT_SIZE_K(448)>;
};
scratch_partition: partition@f0000 {
label = "image-scratch";
reg = <0x000f0000 DT_SIZE_K(16)>;
};
storage_partition: partition@f4000 {
label = "storage";
reg = <0x000f4000 DT_SIZE_K(48)>;
};
};
};
``` | /content/code_sandbox/boards/st/nucleo_wba55cg/nucleo_wba55cg.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,426 |
```unknown
# STM32WBA52CG Nucleo board configuration
if BOARD_NUCLEO_WBA55CG
config SPI_STM32_INTERRUPT
default y
depends on SPI
endif # BOARD_NUCLEO_WBA55CG
``` | /content/code_sandbox/boards/st/nucleo_wba55cg/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 52 |
```yaml
board:
name: nucleo_wba55cg
vendor: st
socs:
- name: stm32wba55xx
``` | /content/code_sandbox/boards/st/nucleo_wba55cg/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 33 |
```yaml
identifier: nucleo_wba55cg
name: ST Nucleo WBA55CG
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
supported:
- gpio
- i2c
- spi
- adc
- watchdog
- rng
- arduino_gpio
- arduino_i2c
- arduino_spi
- counter
- rtc
ram: 128
flash: 1024
vendor: st
``` | /content/code_sandbox/boards/st/nucleo_wba55cg/nucleo_wba55cg.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 117 |
```unknown
/*
*
*/
/ {
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpioa 7 0>, /* A0 */
<1 0 &gpioa 6 0>, /* A1 */
<2 0 &gpioa 2 0>, /* A2 */
<3 0 &gpioa 1 0>, /* A3 */
<4 0 &gpioa 5 0>, /* A4 */
<5 0 &gpioa 0 0>, /* A5 */
<6 0 &gpioa 10 0>, /* D0 */
<7 0 &gpiob 5 0>, /* D1 */
<8 0 &gpiob 7 0>, /* D2 */
<9 0 &gpiob 6 0>, /* D3 */
<10 0 &gpioa 11 0>, /* D4 */
<11 0 &gpiob 14 0>, /* D5 */
<12 0 &gpiob 0 0>, /* D6 */
<13 0 &gpiob 9 0>, /* D7 */
<14 0 &gpiob 15 0>, /* D8 */
<15 0 &gpioa 9 0>, /* D9 */
<16 0 &gpioa 12 0>, /* D10 */
<17 0 &gpioa 15 0>, /* D11 */
<18 0 &gpiob 3 0>, /* D12 */
<19 0 &gpiob 4 0>, /* D13 */
<20 0 &gpiob 1 0>, /* D14 */
<21 0 &gpiob 2 0>; /* D15 */
};
};
arduino_i2c: &i2c1 {};
arduino_spi: &spi1 {};
``` | /content/code_sandbox/boards/st/nucleo_wba55cg/arduino_r3_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 492 |
```ini
# Note: Using OpenOCD using nucloe_wba52cg requires using openocd fork.
# See board documentation for more information
source [find interface/stlink-dap.cfg]
set WORKAREASIZE 0x8000
transport select "dapdirect_swd"
# Enable debug when in low power modes
set ENABLE_LOW_POWER 1
# Stop Watchdog counters when halt
set STOP_WATCHDOG 1
# STlink Debug clock frequency
set CLOCK_FREQ 8000
# Reset configuration
# use hardware reset, connect under reset
# connect_assert_srst needed if low power mode application running (WFI...)
reset_config srst_only srst_nogate
source [find target/stm32wbax.cfg]
gdb_memory_map disable
``` | /content/code_sandbox/boards/st/nucleo_wba55cg/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 162 |
```cmake
board_runner_args(jlink "--device=STM32F750N8" "--speed=4000")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/st/stm32f7508_dk/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 56 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/f7/stm32f750X8.dtsi>
#include <st/f7/stm32f750n8hx-pinctrl.dtsi>
#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
#include "arduino_r3_connector.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "STMicroelectronics STM32F7508-DK";
compatible = "st,stm32f7508_dk";
chosen {
zephyr,console = &usart1;
zephyr,shell-uart = &usart1;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,dtcm = &dtcm;
zephyr,flash-controller = &n25q128a1;
zephyr,display = <dc;
};
leds {
compatible = "gpio-leds";
green_led_1: led_1 {
gpios = <&gpioi 1 GPIO_ACTIVE_HIGH>;
label = "User LD1";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button {
label = "User";
gpios = <&gpioi 11 GPIO_ACTIVE_HIGH>;
zephyr,code = <INPUT_KEY_0>;
};
};
lvgl_pointer {
compatible = "zephyr,lvgl-pointer-input";
input = <&ft5336>;
};
sdram1: sdram@c0000000 {
compatible = "zephyr,memory-region", "mmio-sram";
device_type = "memory";
reg = <0xc0000000 DT_SIZE_M(16)>;
zephyr,memory-region = "SDRAM1";
zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>;
};
aliases {
led0 = &green_led_1;
sw0 = &user_button;
};
};
&clk_lsi {
status = "okay";
};
&clk_hse {
clock-frequency = <DT_FREQ_M(25)>;
status = "okay";
};
&pll {
div-m = <25>;
mul-n = <432>;
div-p = <2>;
div-q = <9>;
clocks = <&clk_hse>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(216)>;
ahb-prescaler = <1>;
apb1-prescaler = <4>;
apb2-prescaler = <2>;
};
&i2c1 {
pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
&i2c3 {
pinctrl-0 = <&i2c3_scl_ph7 &i2c3_sda_ph8>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
ft5336: ft5336@38 {
compatible = "focaltech,ft5336";
reg = <0x38>;
int-gpios = <&gpioi 13 0>;
};
};
&spi2 {
pinctrl-0 = <&spi2_sck_pi1 &spi2_miso_pb14 &spi2_mosi_pb15>;
pinctrl-names = "default";
cs-gpios = <&gpioa 8 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
status = "okay";
};
&usart1 {
pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pb7>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&usart6 {
pinctrl-0 = <&usart6_tx_pc6 &usart6_rx_pc7>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
zephyr_udc0: &usbotg_fs {
pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12>;
pinctrl-names = "default";
status = "okay";
};
&timers3 {
st,prescaler = <10000>;
status = "okay";
pwm3: pwm {
status = "okay";
pinctrl-0 = <&tim3_ch1_pb4>;
pinctrl-names = "default";
};
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>,
<&rcc STM32_SRC_LSI RTC_SEL(2)>;
status = "okay";
};
&sdmmc1 {
status = "okay";
pinctrl-0 = <&sdmmc1_d0_pc8 &sdmmc1_d1_pc9
&sdmmc1_d2_pc10 &sdmmc1_d3_pc11
&sdmmc1_ck_pc12 &sdmmc1_cmd_pd2>;
pinctrl-names = "default";
cd-gpios = <&gpioc 13 GPIO_ACTIVE_LOW>;
};
&mac {
status = "okay";
pinctrl-0 = <ð_mdc_pc1
ð_rxd0_pc4
ð_rxd1_pc5
ð_ref_clk_pa1
ð_mdio_pa2
ð_crs_dv_pa7
ð_tx_en_pg11
ð_txd0_pg13
ð_txd1_pg14>;
pinctrl-names = "default";
};
&quadspi {
pinctrl-0 = <&quadspi_clk_pb2 &quadspi_bk1_ncs_pb6
&quadspi_bk1_io0_pd11 &quadspi_bk1_io1_pd12
&quadspi_bk1_io2_pe2 &quadspi_bk1_io3_pd13>;
pinctrl-names = "default";
status = "okay";
n25q128a1: qspi-nor-flash@90000000 {
compatible = "st,stm32-qspi-nor";
reg = <0x90000000 DT_SIZE_M(16)>; /* 128 Mbits */
qspi-max-frequency = <72000000>;
status = "okay";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
slot1_partition: partition@0 {
label = "image-1";
reg = <0x00000000 DT_SIZE_K(640)>;
};
storage_partition: partition@a0000 {
label = "storage";
reg = <0x000a0000 DT_SIZE_M(15)>;
};
};
};
};
&fmc {
pinctrl-0 = <&fmc_nbl0_pe0 &fmc_nbl1_pe1
&fmc_sdclk_pg8 &fmc_sdnwe_ph5 &fmc_sdcke0_pc3
&fmc_sdne0_ph3 &fmc_sdnras_pf11 &fmc_sdncas_pg15
&fmc_a0_pf0 &fmc_a1_pf1 &fmc_a2_pf2 &fmc_a3_pf3 &fmc_a4_pf4
&fmc_a5_pf5 &fmc_a6_pf12 &fmc_a7_pf13 &fmc_a8_pf14
&fmc_a9_pf15 &fmc_a10_pg0 &fmc_a11_pg1
&fmc_a14_pg4 &fmc_a15_pg5 &fmc_d0_pd14 &fmc_d1_pd15
&fmc_d2_pd0 &fmc_d3_pd1 &fmc_d4_pe7 &fmc_d5_pe8 &fmc_d6_pe9
&fmc_d7_pe10 &fmc_d8_pe11 &fmc_d9_pe12 &fmc_d10_pe13
&fmc_d11_pe14 &fmc_d12_pe15 &fmc_d13_pd8 &fmc_d14_pd9
&fmc_d15_pd10>;
pinctrl-names = "default";
status = "okay";
sdram {
status = "okay";
power-up-delay = <100>;
num-auto-refresh = <8>;
mode-register = <0x220>;
/*
* Auto refresh command shall be issued every 15.625 us
* and is calculated as ((15.625 * SDRAM_CLK_MHZ) - 20)
* Note: SDRAM_CLK_MHZ = HCLK_MHZ / 2 (108 MHz)
*/
refresh-rate = <1667>;
bank@0 {
reg = <0>;
st,sdram-control = <STM32_FMC_SDRAM_NC_8
STM32_FMC_SDRAM_NR_12
STM32_FMC_SDRAM_MWID_16
STM32_FMC_SDRAM_NB_4
STM32_FMC_SDRAM_CAS_2
STM32_FMC_SDRAM_SDCLK_PERIOD_2
STM32_FMC_SDRAM_RBURST_ENABLE
STM32_FMC_SDRAM_RPIPE_0>;
st,sdram-timing = <2 6 4 6 2 2 2>;
};
};
};
<dc {
pinctrl-0 = <<dc_r0_pi15 <dc_r1_pj0 <dc_r2_pj1 <dc_r3_pj2
<dc_r4_pj3 <dc_r5_pj4 <dc_r6_pj5 <dc_r7_pj6
<dc_g0_pj7 <dc_g1_pj8 <dc_g2_pj9 <dc_g3_pj10
<dc_g4_pj11 <dc_g5_pk0 <dc_g6_pk1 <dc_g7_pk2
<dc_b0_pe4 <dc_b1_pj13 <dc_b2_pj14 <dc_b3_pj15
<dc_b4_pg12 <dc_b5_pk4 <dc_b6_pk5 <dc_b7_pk6
<dc_de_pk7 <dc_clk_pi14 <dc_hsync_pi10 <dc_vsync_pi9>;
pinctrl-names = "default";
disp-on-gpios = <&gpioi 12 GPIO_ACTIVE_HIGH>;
bl-ctrl-gpios = <&gpiok 3 GPIO_ACTIVE_HIGH>;
ext-sdram = <&sdram1>;
status = "okay";
width = <480>;
height = <272>;
pixel-format = <PANEL_PIXEL_FORMAT_RGB_565>;
display-timings {
compatible = "zephyr,panel-timing";
de-active = <0>;
pixelclk-active = <0>;
hsync-active = <0>;
vsync-active = <0>;
hsync-len = <1>;
vsync-len = <10>;
hback-porch = <43>;
vback-porch = <12>;
hfront-porch = <8>;
vfront-porch = <4>;
};
def-back-color-red = <0xFF>;
def-back-color-green = <0xFF>;
def-back-color-blue = <0xFF>;
};
``` | /content/code_sandbox/boards/st/stm32f7508_dk/stm32f7508_dk.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,574 |
```yaml
identifier: stm32f7508_dk
name: ST STM32F7508 DK
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 320
flash: 64
supported:
- arduino_i2c
- netif:eth
- i2c
- spi
- gpio
- pwm
- counter
- usb_device
- display
- memc
vendor: st
``` | /content/code_sandbox/boards/st/stm32f7508_dk/stm32f7508_dk.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 119 |
```unknown
# Enable MPU
CONFIG_ARM_MPU=y
# Enable HW stack protection
CONFIG_HW_STACK_PROTECTION=y
CONFIG_SERIAL=y
# console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# enable GPIO
CONFIG_GPIO=y
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/stm32f7508_dk/stm32f7508_dk_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 69 |
```yaml
board:
name: stm32f7508_dk
vendor: st
socs:
- name: stm32f750xx
``` | /content/code_sandbox/boards/st/stm32f7508_dk/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 33 |
```unknown
# STM32F7508-DK Discovery board configuration
if BOARD_STM32F7508_DK
if NETWORKING
config NET_L2_ETHERNET
default y
endif # NETWORKING
if DISPLAY
# MEMC needs to be enabled in order to store
# display buffer to external SDRAM connected to FMC
config MEMC
default y
endif # DISPLAY
config INPUT
default y if LVGL
if INPUT
config INPUT_FT5336_INTERRUPT
default y
endif # INPUT
config DISK_DRIVER_SDMMC
default y if DISK_DRIVERS
endif # BOARD_STM32F7508_DK
``` | /content/code_sandbox/boards/st/stm32f7508_dk/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 135 |
```unknown
config BOARD_STM32F7508_DK
select SOC_STM32F750XX
``` | /content/code_sandbox/boards/st/stm32f7508_dk/Kconfig.stm32f7508_dk | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 22 |
```restructuredtext
.. _nucleo_wba55cg_board:
ST Nucleo WBA55CG
#################
Overview
********
NUCLEO-WBA55CG is a Bluetooth Low Energy wireless and ultra-low-power board
embedding a powerful and ultra-low-power radio compliant with the Bluetooth
Low Energy SIG specification v5.3.
The ARDUINO Uno V3 connectivity support and the ST morpho headers allow the
easy expansion of the functionality of the STM32 Nucleo open development
platform with a wide choice of specialized shields.
- Ultra-low-power wireless STM32WBA55CG microcontroller based on the Arm
CortexM33 core, featuring 1 Mbyte of flash memory and 128 Kbytes of SRAM in
a UFQFPN48 package
- MCU RF board (MB1863):
- 2.4 GHz RF transceiver supporting Bluetooth specification v5.3
- Arm Cortex M33 CPU with TrustZone, MPU, DSP, and FPU
- Integrated PCB antenna
- Three user LEDs
- Three user and one reset push-buttons
- Board connectors:
- USB Micro-B
- ARDUINO Uno V3 expansion connector
- ST morpho headers for full access to all STM32 I/Os
- Flexible power-supply options: ST-LINK USB VBUS or external sources
- On-board STLINK-V3MODS debugger/programmer with USB re-enumeration capability:
mass storage, Virtual COM port, and debug port
.. image:: img/nucleowba55cg.jpg
:align: center
:alt: Nucleo WBA55CG
Hardware
********
The STM32WBA55xx multiprotocol wireless and ultralow power devices embed a
powerful and ultralow power radio compliant with the Bluetooth SIG Low Energy
specification 5.3. They contain a high-performance Arm Cortex-M33 32-bit RISC
core. They operate at a frequency of up to 100 MHz.
- Includes ST state-of-the-art patented technology
- Ultra low power radio:
- 2.4 GHz radio
- RF transceiver supporting Bluetooth Low Energy 5.3 specification
- Proprietary protocols
- RX sensitivity: -96 dBm (Bluetooth Low Energy at 1 Mbps)
- Programmable output power, up to +10 dBm with 1 dB steps
- Integrated balun to reduce BOM
- Suitable for systems requiring compliance with radio frequency regulations
ETSI EN 300 328, EN 300 440, FCC CFR47 Part 15 and ARIB STD-T66
- Ultra low power platform with FlexPowerControl:
- 1.71 to 3.6 V power supply
- - 40 C to 85 C temperature range
- Autonomous peripherals with DMA, functional down to Stop 1 mode
- 140 nA Standby mode (16 wake-up pins)
- 200 nA Standby mode with RTC
- 2.4 A Standby mode with 64 KB SRAM
- 16.3 A Stop mode with 64 KB SRAM
- 45 A/MHz Run mode at 3.3 V
- Radio: Rx 7.4 mA / Tx at 0 dBm 10.6 mA
- Core: Arm 32-bit Cortex-M33 CPU with TrustZone, MPU, DSP, and FPU
- ART Accelerator: 8-Kbyte instruction cache allowing 0-wait-state execution
from flash memory (frequency up to 100 MHz, 150 DMIPS)
- Power management: embedded regulator LDO supporting voltage scaling
- Benchmarks:
- 1.5 DMIPS/MHz (Drystone 2.1)
- 407 CoreMark (4.07 CoreMark/MHz)
- Clock sources:
- 32 MHz crystal oscillator
- 32 kHz crystal oscillator (LSE)
- Internal low-power 32 kHz (5%) RC
- Internal 16 MHz factory trimmed RC (1%)
- PLL for system clock and ADC
- Memories:
- 1 MB flash memory with ECC, including 256 Kbytes with 100 cycles
- 128 KB SRAM, including 64 KB with parity check
- 512-byte (32 rows) OTP
- Rich analog peripherals (independent supply):
- 12-bit ADC 2.5 Msps with hardware oversampling
- Communication peripherals:
- Three UARTs (ISO 7816, IrDA, modem)
- Two SPIs
- Two I2C Fm+ (1 Mbit/s), SMBus/PMBus
- System peripherals:
- Touch sensing controller, up to 20 sensors, supporting touch key, linear,
rotary touch sensors
- One 16-bit, advanced motor control timer
- Three 16-bit timers
- One 32-bit timer
- Two low-power 16-bit timers (available in Stop mode)
- Two Systick timers
- Two watchdogs
- 8-channel DMA controller, functional in Stop mode
- Security and cryptography:
- Arm TrustZone and securable I/Os, memories, and peripherals
- Flexible life cycle scheme with RDP and password protected debug
- Root of trust thanks to unique boot entry and secure hide protection area (HDP)
- SFI (secure firmware installation) thanks to embedded RSS (root secure services)
- Secure data storage with root hardware unique key (RHUK)
- Secure firmware upgrade support with TF-M
- Two AES co-processors, including one with DPA resistance
- Public key accelerator, DPA resistant
- HASH hardware accelerator
- True random number generator, NIST SP800-90B compliant
- 96-bit unique ID
- Active tampers
- CRC calculation unit
- Up to 35 I/Os (most of them 5 V-tolerant) with interrupt capability
- Development support:
- Serial wire debug (SWD), JTAG
- ECOPACK2 compliant package
More information about STM32WBA series can be found here:
- `STM32WBA Series on www.st.com`_
Supported Features
==================
The Zephyr nucleo_wba55cg board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| ADC | on-chip | adc |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | independent watchdog |
+-----------+------------+-------------------------------------+
| RNG | on-chip | True Random number generator |
+-----------+------------+-------------------------------------+
| RADIO | on-chip | Bluetooth Low Energy |
+-----------+------------+-------------------------------------+
| RTC | on-chip | rtc |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported on this Zephyr port.
The default configuration can be found in the defconfig file:
:zephyr_file:`boards/st/nucleo_wba55cg/nucleo_wba55cg_defconfig`
Bluetooh support
----------------
BLE support is enabled on nucleo_wba55cg. To build a zephyr sample using this board
you first need to install Bluetooth Controller libraries available in Zephyr as binary
blobs.
To fetch Binary Blobs:
.. code-block:: console
west blobs fetch stm32
Connections and IOs
===================
Nucleo WBA55CG Board has 4 GPIO controllers. These controllers are responsible for pin muxing,
input/output, pull-up, etc.
Default Zephyr Peripheral Mapping:
----------------------------------
.. rst-class:: rst-columns
- USART_1 TX/RX : PB12/PA8
- I2C_1_SCL : PB2
- I2C_1_SDA : PB1
- USER_PB : PC13
- LD1 : PB4
- SPI_1_NSS : PA12 (arduino_spi)
- SPI_1_SCK : PB4 (arduino_spi)
- SPI_1_MISO : PB3 (arduino_spi)
- SPI_1_MOSI : PA15 (arduino_spi)
System Clock
------------
Nucleo WBA55CG System Clock could be driven by internal or external oscillator,
as well as main PLL clock. By default System clock is driven by HSE+PLL clock at 100MHz.
Serial Port
-----------
Nucleo WBA55CG board has 1 U(S)ARTs. The Zephyr console output is assigned to USART1.
Default settings are 115500 8N1.
Programming and Debugging
*************************
Nucleo WBA55CG board includes an ST-LINK/V3 embedded debug tool interface.
It could be used for flash and debug using either OpenOCD or STM32Cube ecosystem tools.
Flashing
========
STM32CubeProgrammer is configured as flashing tool by default.
If available, OpenOCD could be used. Same process applies with both tools.
Flashing an application to Nucleo WBA55CG
-----------------------------------------
Here is an example for the :zephyr:code-sample:`blinky` application.
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: nucleo_wba55cg
:goals: build flash
You will see the LED blinking every second.
Debugging
=========
Debugging using OpenOCD
-----------------------
You can debug an application in the usual way using OpenOCD. Here is an example for the
:zephyr:code-sample:`blinky` application.
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: nucleo_wba55cg
:maybe-skip-config:
:goals: debug
Debugging using STM32CubeIDE
----------------------------
You can debug an application using a STM32WBA compatible version of STM32CubeIDE.
For that:
- Create an empty STM32WBA project by going to File > New > STM32 project
- Select your MCU, click Next, and select an Empty project.
- Right click on your project name, select Debug as > Debug configurations
- In the new window, create a new target in STM32 Cortex-M C/C++ Application
- Select the new target and enter the path to zephyr.elf file in the C/C++ Application field
- Check Disable auto build
- Run debug
.. _STM32WBA Series on www.st.com:
path_to_url
.. _OpenOCD official Github mirror:
path_to_url
``` | /content/code_sandbox/boards/st/nucleo_wba55cg/doc/nucleo_wba55cg.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,423 |
```ini
source [find board/stm32f746g-disco.cfg]
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
# Event reset-init already uses the maximum speed however adapter speed
# inherited from stm32f7x.cfg for reset-start defaults to 2000 kHz, so
# override that speed setting it also to the maximum speed.
$_TARGETNAME configure -event reset-start {
adapter speed 4000
}
``` | /content/code_sandbox/boards/st/stm32f7508_dk/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 132 |
```unknown
/*
*
*/
/ {
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpioa 0 0>, /* A0 */
<1 0 &gpiof 10 0>, /* A1 */
<2 0 &gpiof 9 0>, /* A2 */
<3 0 &gpiof 8 0>, /* A3 */
<4 0 &gpiof 7 0>, /* A4 */
<5 0 &gpiof 6 0>, /* A5 */
<6 0 &gpioc 7 0>, /* D0 */
<7 0 &gpioc 6 0>, /* D1 */
<8 0 &gpiog 6 0>, /* D2 */
<9 0 &gpiob 4 0>, /* D3 */
<10 0 &gpiog 7 0>, /* D4 */
<11 0 &gpioi 0 0>, /* D5 */
<12 0 &gpioh 6 0>, /* D6 */
<13 0 &gpioi 3 0>, /* D7 */
<14 0 &gpioi 2 0>, /* D8 */
<15 0 &gpioa 15 0>, /* D9 */
<16 0 &gpioa 8 0>, /* D10 */
<17 0 &gpiob 15 0>, /* D11 */
<18 0 &gpiob 14 0>, /* D12 */
<19 0 &gpioi 1 0>, /* D13 */
<20 0 &gpiob 9 0>, /* D14 */
<21 0 &gpiob 8 0>; /* D15 */
};
};
arduino_i2c: &i2c1 {};
arduino_spi: &spi2 {};
arduino_serial: &usart6 {};
``` | /content/code_sandbox/boards/st/stm32f7508_dk/arduino_r3_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 498 |
```unknown
/*
*/
#include <zephyr/dt-bindings/gpio/gpio.h>
#include <zephyr/dt-bindings/gpio/st-morpho-header.h>
/ {
st_morpho_header: st-morpho-header {
compatible = "st-morpho-header";
#gpio-cells = <2>;
gpio-map-mask = <ST_MORPHO_PIN_MASK 0x0>;
gpio-map-pass-thru = <0x0 GPIO_DT_FLAGS_MASK>;
gpio-map = <ST_MORPHO_L_1 0 &gpioc 10 0>,
<ST_MORPHO_L_2 0 &gpioc 11 0>,
<ST_MORPHO_L_3 0 &gpioc 12 0>,
<ST_MORPHO_L_4 0 &gpiod 2 0>,
<ST_MORPHO_L_13 0 &gpioa 13 0>, /* SB40=ON, SB41=ON */
<ST_MORPHO_L_15 0 &gpioa 14 0>, /* SB40=ON, SB41=ON */
<ST_MORPHO_L_17 0 &gpioa 15 0>,
<ST_MORPHO_L_23 0 &gpioc 13 0>,
<ST_MORPHO_L_25 0 &gpioc 14 0>,
<ST_MORPHO_L_27 0 &gpioc 15 0>,
<ST_MORPHO_L_28 0 &gpioa 0 0>,
<ST_MORPHO_L_29 0 &gpiof 0 0>,
<ST_MORPHO_L_30 0 &gpioa 1 0>,
<ST_MORPHO_L_31 0 &gpiof 1 0>,
<ST_MORPHO_L_32 0 &gpiob 1 0>,
<ST_MORPHO_L_34 0 &gpiob 0 0>,
<ST_MORPHO_L_35 0 &gpioc 2 0>,
<ST_MORPHO_L_36 0 &gpioc 1 0>,
<ST_MORPHO_L_37 0 &gpioc 3 0>,
<ST_MORPHO_L_38 0 &gpioc 0 0>,
<ST_MORPHO_R_2 0 &gpioa 9 0>,
<ST_MORPHO_R_3 0 &gpiob 6 0>,
<ST_MORPHO_R_4 0 &gpioa 12 0>,
<ST_MORPHO_R_5 0 &gpiob 7 0>,
<ST_MORPHO_R_6 0 &gpioc 5 0>,
<ST_MORPHO_R_11 0 &gpioa 5 0>,
<ST_MORPHO_R_12 0 &gpioa 12 0>, /* SB13=ON, SB17=ON */
<ST_MORPHO_R_13 0 &gpioa 6 0>,
<ST_MORPHO_R_14 0 &gpioa 11 0>, /* SB13=ON, SB17=ON */
<ST_MORPHO_R_15 0 &gpioa 7 0>,
<ST_MORPHO_R_16 0 &gpiob 12 0>,
<ST_MORPHO_R_17 0 &gpioc 9 0>,
<ST_MORPHO_R_19 0 &gpioc 6 0>,
<ST_MORPHO_R_21 0 &gpioc 7 0>,
<ST_MORPHO_R_22 0 &gpiob 2 0>,
<ST_MORPHO_R_23 0 &gpioa 8 0>,
<ST_MORPHO_R_25 0 &gpiob 10 0>,
<ST_MORPHO_R_26 0 &gpiob 15 0>,
<ST_MORPHO_R_27 0 &gpiob 4 0>,
<ST_MORPHO_R_28 0 &gpiob 14 0>,
<ST_MORPHO_R_29 0 &gpiob 5 0>,
<ST_MORPHO_R_30 0 &gpiob 13 0>,
<ST_MORPHO_R_31 0 &gpiob 3 0>,
<ST_MORPHO_R_33 0 &gpioc 8 0>,
<ST_MORPHO_R_34 0 &gpioc 4 0>,
<ST_MORPHO_R_35 0 &gpiob 14 0>,
<ST_MORPHO_R_36 0 &gpiob 8 0>,
<ST_MORPHO_R_37 0 &gpiob 15 0>;
};
};
``` | /content/code_sandbox/boards/st/nucleo_h533re/st_morpho_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,146 |
```unknown
config BOARD_NUCLEO_H533RE
select SOC_STM32H533XX
``` | /content/code_sandbox/boards/st/nucleo_h533re/Kconfig.nucleo_h533re | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 21 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/h5/stm32h533Xe.dtsi>
#include <st/h5/stm32h533retx-pinctrl.dtsi>
#include "arduino_r3_connector.dtsi"
#include "st_morpho_connector.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "STMicroelectronics STM32H533RE-NUCLEO board";
compatible = "st,stm32h533re-nucleo";
chosen {
zephyr,console = &usart2;
zephyr,shell-uart = &usart2;
zephyr,sram = &sram1;
zephyr,flash = &flash0;
};
leds: leds {
compatible = "gpio-leds";
green_led_2: led_42 {
gpios = <&gpioa 5 GPIO_ACTIVE_LOW>;
label = "User LD2";
};
};
pwmleds {
compatible = "pwm-leds";
green_pwm_led: green_pwm_led {
pwms = <&pwm3 1 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button {
label = "User";
gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>;
zephyr,code = <INPUT_KEY_0>;
};
};
aliases {
led0 = &green_led_2;
pwm-led0 = &green_pwm_led;
sw0 = &user_button;
watchdog0 = &iwdg;
die-temp0 = &die_temp;
volt-sensor0 = &vref;
volt-sensor1 = &vbat;
};
};
&clk_csi {
status = "okay";
};
&clk_hsi {
status = "okay";
};
&clk_hse {
clock-frequency = <DT_FREQ_M(24)>;
status = "okay";
};
&pll {
div-m = <2>;
mul-n = <40>;
div-p = <2>;
div-q = <2>;
div-r = <2>;
clocks = <&clk_hse>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(240)>;
ahb-prescaler = <1>;
apb1-prescaler = <1>;
apb2-prescaler = <1>;
apb3-prescaler = <1>;
};
&usart1 {
pinctrl-0 = <&usart1_tx_pb14 &usart1_rx_pb15>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&usart2 {
pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa3>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&iwdg {
status = "okay";
};
&timers3 {
st,prescaler = <1000>;
status = "okay";
pwm3: pwm {
pinctrl-0 = <&tim3_ch3_pb0>;
pinctrl-names = "default";
status = "okay";
};
};
&adc1 {
pinctrl-0 = <&adc1_inp0_pa0>; /* Arduino A0 */
pinctrl-names = "default";
st,adc-clock-source = <ASYNC>;
st,adc-prescaler = <8>;
status = "okay";
};
&die_temp {
status = "okay";
};
&vref {
status = "okay";
};
&vbat {
status = "okay";
};
&rng {
status = "okay";
};
&clk_lse {
status = "okay";
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB3 0x00200000>,
<&rcc STM32_SRC_LSE RTC_SEL(1)>;
status = "okay";
};
&clk_hsi48 {
status = "okay";
};
zephyr_udc0: &usb {
pinctrl-0 = <&usb_dm_pa11 &usb_dp_pa12>;
pinctrl-names = "default";
status = "okay";
};
``` | /content/code_sandbox/boards/st/nucleo_h533re/nucleo_h533re.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 932 |
```cmake
board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
board_runner_args(pyocd "--target=stm32h533retx")
board_runner_args(jlink "--device=STM32H533RE" "--reset-after-load")
board_runner_args(openocd "--tcl-port=6666")
board_runner_args(openocd --cmd-pre-init "gdb_report_data_abort enable")
board_runner_args(openocd "--no-halt")
include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake)
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
# FIXME: official openocd runner not yet available.
``` | /content/code_sandbox/boards/st/nucleo_h533re/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 187 |
```unknown
# enable uart driver
CONFIG_SERIAL=y
# console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# Enable clock
CONFIG_CLOCK_CONTROL=y
# enable GPIO
CONFIG_GPIO=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/nucleo_h533re/nucleo_h533re_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 50 |
```yaml
identifier: nucleo_h533re
name: ST Nucleo H533RE
type: mcu
arch: arm
toolchain:
- zephyr
ram: 272
flash: 512
supported:
- gpio
- watchdog
- pwm
- rtc
- adc
- usb_device
- usb
vendor: st
``` | /content/code_sandbox/boards/st/nucleo_h533re/nucleo_h533re.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 83 |
```yaml
board:
name: nucleo_h533re
vendor: st
socs:
- name: stm32h533xx
``` | /content/code_sandbox/boards/st/nucleo_h533re/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 31 |
```unknown
/*
*
*/
/ {
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpioa 0 0>, /* A0 */
<1 0 &gpioa 1 0>, /* A1 */
<2 0 &gpiob 1 0>, /* A2 */
<3 0 &gpiob 0 0>, /* A3 */
<4 0 &gpioc 1 0>, /* A4 */
<5 0 &gpioc 0 0>, /* A5 */
<6 0 &gpiob 15 0>, /* D0 */
<7 0 &gpiob 14 0>, /* D1 */
<8 0 &gpioc 8 0>, /* D2 */
<9 0 &gpiob 3 0>, /* D3 */
<10 0 &gpiob 5 0>, /* D4 */
<11 0 &gpiob 4 0>, /* D5 */
<12 0 &gpiob 10 0>, /* D6 */
<13 0 &gpioa 8 0>, /* D7 */
<14 0 &gpioc 7 0>, /* D8 */
<15 0 &gpioc 6 0>, /* D9 */
<16 0 &gpioc 9 0>, /* D10 */
<17 0 &gpioa 7 0>, /* D11 */
<18 0 &gpioa 6 0>, /* D12 */
<19 0 &gpioa 5 0>, /* D13 */
<20 0 &gpiob 7 0>, /* D14 */
<21 0 &gpiob 6 0>; /* D15 */
};
};
arduino_serial: &usart1 {};
``` | /content/code_sandbox/boards/st/nucleo_h533re/arduino_r3_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 487 |
```ini
source [find interface/stlink-dap.cfg]
source [find target/stm32h5x.cfg]
transport select "dapdirect_swd"
set CHIPNAME STM32H533RETX
set BOARDNAME NUCLEO-STM32H533RE
# Reset configuration
# use hardware reset, connect under reset
# connect_assert_srst needed if low power mode application running (WFI...)
reset_config srst_only srst_nogate connect_assert_srst
set CONNECT_UNDER_RESET 1
set CORE_RESET 0
# Due to the use of connect_assert_srst, running gdb requires
# to reset halt just after openocd init.
rename init old_init
proc init {} {
old_init
reset halt
}
``` | /content/code_sandbox/boards/st/nucleo_h533re/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 156 |
```restructuredtext
.. _stm32f7508_dk_board:
ST STM32F7508-DK Discovery Kit
##############################
Overview
********
The discovery kit enables a wide diversity of applications taking benefit
from audio, multi-sensor support, graphics, security, security, video,
and high-speed connectivity features. Important board features include:
- STM32F750N8H6 microcontroller featuring 64 Kbytes of Flash memory and 340 Kbytes of RAM, in BGA216 package
- On-board ST-LINK/V2-1 supporting USB re-enumeration capability
- Five power supply options:
- ST LINK/V2-1
- USB FS connector
- USB HS connector
- VIN from Arduino connector
- External 5 V from connector
- Two pushbuttons (user and reset)
- USB functions: virtual COM port, mass storage, debug port
- 4.3-inch 480x272 color LCD-TFT with capacitive touch screen
- SAI audio codec
- Audio line in and line out jack
- Two ST MEMS microphones
- SPDIF RCA input connector
- 128-Mbit Quad-SPI Flash memory
- 128-Mbit SDRAM (64 Mbits accessible)
- Connector for microSD card
- USB OTG HS with Micro-AB connectors
- USB OTG FS with Micro-AB connectors
- Ethernet connector compliant with IEEE-802.3-2002
.. image:: img/stm32f7508_dk.jpg
:align: center
:alt: STM32F7508-DK
More information about the board can be found at the `32F7508-DK website`_.
Hardware
********
The STM32F7508-DK Discovery kit provides the following hardware components:
- STM32F750N8H6 in BGA216 package
- ARM |reg| 32-bit Cortex |reg| -M7 CPU with FPU
- 216 MHz max CPU frequency
- 64 KB Flash
- 320+16+4 KB SRAM
- GPIO with external interrupt capability
- 4.3-inch 480x272 color LCD-TFT with capacitive touch screen
- 3x12-bit ADC
- 2x12-bit D/A converters
- RTC
- Advanced-control Timer
- General Purpose Timers (17)
- Watchdog Timers (2)
- USART/UART (8)
- I2C (4)
- SPI (6)
- 2xSAI (serial audio interface)
- 2xCAN
- USB 2.0 OTG FS with on-chip PHY
- USB 2.0 OTG HS/FS with dedicated DMA, on-chip full-speed PHY and ULPI
- 10/100 Ethernet MAC with dedicated DMA
- 8- to 14-bit parallel camera
- CRC calculation unit
- True random number generator
- DMA Controller
More information about STM32F750x8 can be found here:
- `STM32F750x8 on www.st.com`_
- `STM32F74xxx reference manual`_
Supported Features
==================
The Zephyr stm32f7508_dk board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| FLASH | on-chip | flash memory |
+-----------+------------+-------------------------------------+
| ETHERNET | on-chip | Ethernet |
+-----------+------------+-------------------------------------+
| PWM | on-chip | pwm |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| USB | on-chip | usb |
+-----------+------------+-------------------------------------+
| SDMMC | on-chip | disk access |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| QSPI NOR | on-chip | off-chip flash |
+-----------+------------+-------------------------------------+
| FMC | on-chip | memc (SDRAM) |
+-----------+------------+-------------------------------------+
| LTDC | on-chip | display |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported on Zephyr porting.
The default configuration can be found in
:zephyr_file:`boards/st/stm32f7508_dk/stm32f7508_dk_defconfig`
Pin Mapping
===========
STM32F7508-DK Discovery kit has 9 GPIO controllers. These controllers are responsible for pin muxing,
input/output, pull-up, etc.
For more details please refer to `32F7508-DK board User Manual`_.
Default Zephyr Peripheral Mapping:
----------------------------------
The STM32F7508 Discovery kit features an Arduino Uno V3 connector. Board is
configured as follows
- UART_1 TX/RX : PA9/PB7 (ST-Link Virtual Port Com)
- UART_6 TX/RX : PC6/PC7 (Arduino Serial)
- I2C1 SCL/SDA : PB8/PB9 (Arduino I2C)
- SDMMC_1 D0/D1/D2/D3/CK/CD/CMD: PC8/PC9/PC10/PC11/PC12/PC13/PD2
- SPI2 NSS/SCK/MISO/MOSI : PA8/PI1/PB14/PB15 (Arduino SPI)
- PWM_3_CH1 : PB4
- ETH : PA1, PA2, PA7, PC1, PC4, PC5, PG11, PG13, PG14
- USER_PB : PI11
- LD1 : PI1
- USB DM : PA11
- USB DP : PA12
- FMC SDRAM :
- D0-D15 : PD14/PD15/PD0/PD1/PE7/PE8/PE9/PE10/PE11/PE12/PE13/PE14/PE15/PD8/PD9/PD10
- A0-A11 : PF0/PF1/PF2/PF3/PF4/PF5/PF12/PF13/PF14/PF15/PG0/PG1
- A14/A15 : PG4/PG5
- SDNRAS/SDNCAS : PF11/PG15
- NBL0/NBL1 : PE0/PE1
- SDCLK/SDNWE/SDCKE0/SDNE0 : PG8/PH5/PC3/PH3
- LTDC :
- R0-R7 : PI15/PJ0/PJ1/PJ2/PJ3/PJ4/PJ5/PJ6
- G0-G7 : PJ7/PJ8/PJ9/PJ10/PJ11/PK0/PK1/PK2
- B0-B7 : PJ12/PK13/PJ14/PJ15/PK3/PK4/PK5/PK6
- DE/CLK/HSYNC/VSYNC : PK7/PI14/PI12/PI13
System Clock
============
The STM32F7508 System Clock can be driven by an internal or external oscillator,
as well as by the main PLL clock. By default, the System clock is driven by the PLL
clock at 216MHz, driven by a 25MHz high speed external clock.
Serial Port
===========
The STM32F7508-DK Discovery kit has up to 8 UARTs. The Zephyr console output is assigned to UART1
which connected to the onboard ST-LINK/V2 Virtual COM port interface. Default communication
settings are 115200 8N1.
Programming and Debugging
*************************
Applications for the ``stm32f7508_dk`` board configuration can be built and
flashed in the usual way (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Flashing
========
STM32F7508-DK Discovery kit includes an ST-LINK/V2 embedded debug tool interface.
This interface is supported by the openocd version included in the Zephyr SDK.
Flashing an application to STM32F7508-DK
-------------------------------------------
First, connect the STM32F746G Discovery kit to your host computer using
the USB port to prepare it for flashing. Then build and flash your application.
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: stm32f7508_dk
:goals: build flash
Run a serial host program to connect with your board:
.. code-block:: console
$ minicom -D /dev/ttyACM0
You should see the following message on the console:
.. code-block:: console
Hello World! arm
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: stm32f7508_dk
:goals: debug
.. _32F7508-DK website:
path_to_url
.. _32F7508-DK board User Manual:
path_to_url
.. _STM32F750x8 on www.st.com:
path_to_url
.. _STM32F74xxx reference manual:
path_to_url
``` | /content/code_sandbox/boards/st/stm32f7508_dk/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,168 |
```cmake
board_runner_args(jlink "--device=STM32G031K8" "--speed=4000")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/st/nucleo_g031k8/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 56 |
```yaml
identifier: nucleo_g031k8
name: ST Nucleo G031K8
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- gpio
- i2c
- spi
ram: 8
flash: 64
vendor: st
``` | /content/code_sandbox/boards/st/nucleo_g031k8/nucleo_g031k8.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 81 |
```unknown
/*
*/
/ {
arduino_nano_header: connector {
compatible = "arduino-nano-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpiob 7 0>, /* D0 / UART-RX */
<1 0 &gpiob 6 0>, /* D1 / UART-TX */
<2 0 &gpioa 15 0>, /* D2 */
<3 0 &gpiob 1 0>, /* D3 */
<4 0 &gpioa 10 0>, /* D4 */
<5 0 &gpioa 9 0>, /* D5 */
<6 0 &gpiob 0 0>, /* D6 */
<7 0 &gpiob 2 0>, /* D7 */
<8 0 &gpiob 8 0>, /* D8 */
<9 0 &gpioa 8 0>, /* D9 */
<10 0 &gpiob 9 0>, /* D10 */
<11 0 &gpiob 5 0>, /* D11 / SPI-MOSI */
<12 0 &gpiob 4 0>, /* D12 / SPI-MISO */
<13 0 &gpiob 3 0>, /* D13 / SPI-SCK */
<14 0 &gpioa 0 0>, /* D14 / A0 */
<15 0 &gpioa 1 0>, /* D15 / A1 */
<16 0 &gpioa 4 0>, /* D16 / A2 */
<17 0 &gpioa 5 0>, /* D17 / A3 */
<18 0 &gpioa 12 0>, /* D18 / A4 / I2C-SDA */
<19 0 &gpioa 11 0>, /* D19 / A5 / I2C-SCL */
<20 0 &gpioa 6 0>, /* D20 / A6 */
<21 0 &gpioa 7 0>; /* D21 / A7 */
};
};
arduino_nano_i2c: &i2c2 {};
arduino_nano_spi: &spi1 {};
arduino_nano_serial: &usart1 {};
``` | /content/code_sandbox/boards/st/nucleo_g031k8/arduino_nano_r3_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 564 |
```unknown
# Kernel Options due to Low Memory (8k)
CONFIG_MAIN_STACK_SIZE=640
CONFIG_IDLE_STACK_SIZE=200
CONFIG_ISR_STACK_SIZE=512
# Serial Drivers
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# GPIO Controller
CONFIG_GPIO=y
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/nucleo_g031k8/nucleo_g031k8_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 90 |
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