text stringlengths 9 39.2M | dir stringlengths 25 226 | lang stringclasses 163 values | created_date timestamp[s] | updated_date timestamp[s] | repo_name stringclasses 751 values | repo_full_name stringclasses 752 values | star int64 1.01k 183k | len_tokens int64 1 18.5M |
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```yaml
identifier: nucleo_h743zi
name: ST Nucleo H743ZI
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 512
flash: 2048
supported:
- arduino_gpio
- arduino_i2c
- uart
- gpio
- counter
- i2c
- pwm
- adc
- netif:eth
- spi
- backup_sram
- watchdog
- usb_device
- can
- dac
- dma
- rtc
- usbd
vendor: st
``` | /content/code_sandbox/boards/st/nucleo_h743zi/nucleo_h743zi.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 154 |
```restructuredtext
.. _nucleo_f207zg_board:
ST Nucleo F207ZG
################
Overview
********
The Nucleo F207ZG board features an ARM Cortex-M3 based STM32F207ZG MCU
with a wide range of connectivity support and configurations. Here are
some highlights of the Nucleo F207ZG board:
- STM32 microcontroller in LQFP144 package
- Ethernet compliant with IEEE-802.3-2002
- Two types of extension resources:
- ST Zio connector including: support for Arduino* Uno V3 connectivity
(A0 to A5, D0 to D15) and additional signals exposing a wide range of
peripherals
- ST morpho extension pin headers for full access to all STM32 I/Os
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector
- Flexible board power supply:
- 5 V from ST-LINK/V2-1 USB VBUS
- External power sources: 3.3 V and 7 - 12 V on ST Zio or ST morpho
connectors, 5 V on ST morpho connector
- Three user LEDs
- Two push-buttons: USER and RESET
.. image:: img/nucleo_f207zg.jpg
:align: center
:alt: Nucleo F207ZG
More information about the board can be found at the `Nucleo F207ZG website`_.
Hardware
********
Nucleo F207ZG provides the following hardware components:
- STM32F207ZGT6 in LQFP144 package
- ARM |reg| 32-bit Cortex |reg| -M3 CPU
- 120 MHz max CPU frequency
- VDD from 1.7 V to 3.6 V
- 1 MB Flash
- 128 KB SRAM
- GPIO with external interrupt capability
- 12-bit ADC with 24 channels
- RTC
- 17 General purpose timers
- 2 watchdog timers (independent and window)
- SysTick timer
- USART/UART (6)
- I2C (3)
- SPI (3)
- SDIO
- USB 2.0 OTG FS
- DMA Controller
- 10/100 Ethernet MAC with dedicated DMA
- CRC calculation unit
- True random number generator
More information about STM32F207ZG can be found here:
- `STM32F207ZG on www.st.com`_
- `STM32F207 reference manual`_
Supported Features
==================
The Zephyr nucleo_207zg board configuration supports the following hardware features:
+-------------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+=============+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-------------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-------------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-------------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-------------+------------+-------------------------------------+
| ETHERNET | on-chip | Ethernet |
+-------------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-------------+------------+-------------------------------------+
| USB | on-chip | USB device |
+-------------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-------------+------------+-------------------------------------+
| WATCHDOG | on-chip | independent watchdog |
+-------------+------------+-------------------------------------+
| ADC | on-chip | ADC Controller |
+-------------+------------+-------------------------------------+
| DAC | on-chip | DAC Controller |
+-------------+------------+-------------------------------------+
| Backup SRAM | on-chip | Backup SRAM |
+-------------+------------+-------------------------------------+
| PWM | on-chip | PWM |
+-------------+------------+-------------------------------------+
| RNG | on-chip | Random Number Generator |
+-------------+------------+-------------------------------------+
| DMA | on-chip | Direct Memory Access |
+-------------+------------+-------------------------------------+
| die-temp | on-chip | die temperature sensor |
+-------------+------------+-------------------------------------+
| RTC | on-chip | rtc |
+-------------+------------+-------------------------------------+
Other hardware features are not yet supported on this Zephyr port.
The default configuration can be found in the defconfig file:
:zephyr_file:`boards/st/nucleo_f207zg/nucleo_f207zg_defconfig`
Connections and IOs
===================
Nucleo F207ZG Board has 8 GPIO controllers. These controllers are responsible for pin muxing,
input/output, pull-up, etc.
Available pins:
---------------
.. image:: img/nucleo_f207zg_zio_left.jpg
:align: center
:alt: Nucleo F207ZG ZIO connectors (left)
.. image:: img/nucleo_f207zg_zio_right.jpg
:align: center
:alt: Nucleo F207ZG ZIO connectors (right)
.. image:: img/nucleo_f207zg_morpho_left.jpg
:align: center
:alt: Nucleo F207ZG Morpho connectors (left)
.. image:: img/nucleo_f207zg_morpho_right.jpg
:align: center
:alt: Nucleo F207ZG Morpho connectors (right)
For more details please refer to `STM32 Nucleo-144 board User Manual`_.
Default Zephyr Peripheral Mapping:
----------------------------------
- UART_3 TX/RX : PD8/PD9 (ST-Link Virtual Port Com)
- UART_6 TX/RX : PG14/PG9 (Arduino Serial)
- I2C1 SCL/SDA : PB8/PB9 (Arduino I2C)
- SPI1 NSS/SCK/MISO/MOSI : PD14/PA5/PA6/PA7 (Arduino SPI)
- ETH : PA1, PA2, PA7, PB13, PC1, PC4, PC5, PG11, PG13
- USB_DM : PA11
- USB_DP : PA12
- USER_PB : PC13
- LD1 : PB0
- LD2 : PB7
- LD3 : PB14
- DAC: PA4
- ADC: PA0
- PWM_1_CH1 : PE9
System Clock
------------
Nucleo F207ZG System Clock could be driven by internal or external oscillator,
as well as main PLL clock. By default System clock is driven by PLL clock at 120MHz,
driven by 8MHz high speed external clock.
Serial Port
-----------
Nucleo F207ZG board has 4 UARTs. The Zephyr console output is assigned to UART3.
Default settings are 115200 8N1.
Network interface
-----------------
Ethernet configured as the default network interface
USB
---
Nucleo F207ZG board has a USB OTG dual-role device (DRD) controller that
supports both device and host functions through its micro USB connector
(USB USER). Only USB device function is supported in Zephyr at the moment.
Backup SRAM
-----------
In order to test backup SRAM you may want to disconnect VBAT from VDD. You can
do it by removing ``SB156`` jumper on the back side of the board.
Programming and Debugging
*************************
Nucleo F207ZG board includes an ST-LINK/V2-1 embedded debug tool interface.
This interface is supported by the openocd version included in Zephyr SDK.
.. _Nucleo F207ZG website:
path_to_url
.. _STM32 Nucleo-144 board User Manual:
path_to_url
.. _STM32F207ZG on www.st.com:
path_to_url
.. _STM32F207 reference manual:
path_to_url
``` | /content/code_sandbox/boards/st/nucleo_f207zg/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,761 |
```unknown
# Enable MPU
CONFIG_ARM_MPU=y
# Enable HW stack protection
CONFIG_HW_STACK_PROTECTION=y
# Enable UART
CONFIG_SERIAL=y
# Console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# Enable GPIO
CONFIG_GPIO=y
# Enable clocks
CONFIG_CLOCK_CONTROL=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/nucleo_h743zi/nucleo_h743zi_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 72 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/h7/stm32h743Xi.dtsi>
#include <st/h7/stm32h743zitx-pinctrl.dtsi>
#include "arduino_r3_connector.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "STMicroelectronics STM32H743ZI-NUCLEO board";
compatible = "st,stm32h743zi-nucleo";
chosen {
zephyr,console = &usart3;
zephyr,shell-uart = &usart3;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,dtcm = &dtcm;
zephyr,code-partition = &slot0_partition;
zephyr,canbus = &fdcan1;
};
leds: leds {
compatible = "gpio-leds";
green_led: led_0 {
gpios = <&gpiob 0 GPIO_ACTIVE_HIGH>;
label = "User LD1";
};
yellow_led: led_1 {
gpios = <&gpioe 1 GPIO_ACTIVE_HIGH>;
label = "User LD2";
};
};
pwmleds {
compatible = "pwm-leds";
red_pwm_led: red_pwm_led {
pwms = <&pwm12 1 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button_0 {
label = "User";
gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>;
zephyr,code = <INPUT_KEY_0>;
};
};
aliases {
led0 = &green_led;
led1 = &yellow_led;
pwm-led0 = &red_pwm_led;
sw0 = &user_button;
watchdog0 = &iwdg;
die-temp0 = &die_temp;
volt-sensor0 = &vref;
volt-sensor1 = &vbat;
};
};
&clk_lsi {
status = "okay";
};
&clk_hsi48 {
status = "okay";
};
&clk_hse {
hse-bypass;
clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
status = "okay";
};
&pll {
div-m = <2>;
mul-n = <240>;
div-p = <2>;
div-q = <2>;
div-r = <2>;
clocks = <&clk_hse>;
status = "okay";
};
&pll2 {
div-m = <4>;
mul-n = <120>;
div-p = <2>;
div-q = <3>; /* gives 80MHz to the FDCAN */
div-r = <2>;
clocks = <&clk_hse>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(480)>;
d1cpre = <1>;
hpre = <2>;
d1ppre = <2>;
d2ppre1 = <2>;
d2ppre2 = <2>;
d3ppre = <2>;
};
&usart3 {
pinctrl-0 = <&usart3_tx_pd8 &usart3_rx_pd9>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
zephyr_udc0: &usbotg_fs {
pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12>;
pinctrl-names = "default";
status = "okay";
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB4 0x00010000>,
<&rcc STM32_SRC_LSI RTC_SEL(2)>;
status = "okay";
};
&i2c1 {
pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
&timers12 {
st,prescaler = <10000>;
status = "okay";
pwm12: pwm {
status = "okay";
pinctrl-0 = <&tim12_ch1_pb14>;
pinctrl-names = "default";
};
};
&adc1 {
pinctrl-0 = <&adc1_inp15_pa3>;
pinctrl-names = "default";
st,adc-clock-source = <SYNC>;
st,adc-prescaler = <4>;
status = "okay";
};
&die_temp {
status = "okay";
};
&adc3 {
pinctrl-0 = <&adc3_inp5_pf3>;
pinctrl-names = "default";
st,adc-clock-source = <SYNC>;
st,adc-prescaler = <4>;
status = "okay";
};
&dac1 {
status = "okay";
pinctrl-0 = <&dac1_out1_pa4>;
pinctrl-names = "default";
};
&rng {
status = "okay";
};
&fdcan1 {
pinctrl-0 = <&fdcan1_rx_pd0 &fdcan1_tx_pd1>;
pinctrl-names = "default";
clocks = <&rcc STM32_CLOCK_BUS_APB1_2 0x00000100>,
<&rcc STM32_SRC_PLL2_Q FDCAN_SEL(2)>;
status = "okay";
};
/*
* WARNING:
* Possible pin conflicts:
* The pins PA2 and PB13 may conflict on selection of ETH_STM32_HAL,
* since they are used in ST Zio or ST morpho connectors.
* To avoid conflicting states the jumpers JP6 and JP7
* must be in ON state.
*/
&mac {
status = "okay";
pinctrl-0 = <ð_rxd0_pc4
ð_rxd1_pc5
ð_ref_clk_pa1
ð_crs_dv_pa7
ð_tx_en_pg11
ð_txd0_pg13
ð_txd1_pb13>;
pinctrl-names = "default";
};
&mdio {
status = "okay";
pinctrl-0 = <ð_mdio_pa2 ð_mdc_pc1>;
pinctrl-names = "default";
ethernet-phy@0 {
compatible = "ethernet-phy";
reg = <0x00>;
status = "okay";
};
};
&spi1 {
status = "okay";
pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pb5>;
pinctrl-names = "default";
cs-gpios = <&gpiod 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
};
&backup_sram {
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* 128KB for bootloader */
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 DT_SIZE_K(128)>;
read-only;
};
/* storage: 128KB for settings */
storage_partition: partition@20000 {
label = "storage";
reg = <0x00020000 DT_SIZE_K(128)>;
};
/* application image slot: 256KB */
slot0_partition: partition@40000 {
label = "image-0";
reg = <0x00040000 DT_SIZE_K(256)>;
};
/* backup slot: 256KB */
slot1_partition: partition@80000 {
label = "image-1";
reg = <0x00080000 DT_SIZE_K(256)>;
};
/* swap slot: 128KB */
scratch_partition: partition@c0000 {
label = "image-scratch";
reg = <0x000c0000 DT_SIZE_K(128)>;
};
};
};
&iwdg1 {
status = "okay";
};
&vref {
status = "okay";
};
&vbat {
status = "okay";
};
``` | /content/code_sandbox/boards/st/nucleo_h743zi/nucleo_h743zi.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,828 |
```unknown
# STM32H743ZI Nucleo board configuration
if BOARD_NUCLEO_H743ZI
if NETWORKING
config NET_L2_ETHERNET
default y
endif # NETWORKING
endif # BOARD_NUCLEO_H743ZI
``` | /content/code_sandbox/boards/st/nucleo_h743zi/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 57 |
```yaml
board:
name: nucleo_h743zi
vendor: st
socs:
- name: stm32h743xx
``` | /content/code_sandbox/boards/st/nucleo_h743zi/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 31 |
```unknown
/*
*
*/
/ {
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpioa 3 0>, /* A0 */
<1 0 &gpioc 0 0>, /* A1 */
<2 0 &gpioc 3 0>, /* A2 */
<3 0 &gpiob 1 0>, /* A3 */
<4 0 &gpioc 2 0>, /* A4 */
<5 0 &gpiof 10 0>, /* A5 */
<6 0 &gpiob 7 0>, /* D0 */
<7 0 &gpiob 6 0>, /* D1 */
<8 0 &gpiog 14 0>, /* D2 */
<9 0 &gpioe 13 0>, /* D3 */
<10 0 &gpioe 14 0>, /* D4 */
<11 0 &gpioe 11 0>, /* D5 */
<12 0 &gpioe 9 0>, /* D6 */
<13 0 &gpiog 12 0>, /* D7 */
<14 0 &gpiof 3 0>, /* D8 */
<15 0 &gpiod 15 0>, /* D9 */
<16 0 &gpiod 14 0>, /* D10 */
<17 0 &gpiob 5 0>, /* D11 */
<18 0 &gpioa 6 0>, /* D12 */
<19 0 &gpioa 5 0>, /* D13 */
<20 0 &gpiob 9 0>, /* D14 */
<21 0 &gpiob 8 0>; /* D15 */
};
};
arduino_i2c: &i2c1 {};
arduino_spi: &spi1 {};
``` | /content/code_sandbox/boards/st/nucleo_h743zi/arduino_r3_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 494 |
```unknown
config BOARD_NUCLEO_H743ZI
select SOC_STM32H743XX
``` | /content/code_sandbox/boards/st/nucleo_h743zi/Kconfig.nucleo_h743zi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 22 |
```ini
source [find board/st_nucleo_h743zi.cfg]
reset_config srst_only srst_nogate connect_assert_srst
$_CHIPNAME.cpu0 configure -event gdb-attach {
echo "Debugger attaching: halting execution"
gdb_breakpoint_override hard
}
$_CHIPNAME.cpu0 configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
# Due to the use of connect_assert_srst, running gdb requires
# to reset halt just after openocd init.
rename init old_init
proc init {} {
old_init
reset halt
}
``` | /content/code_sandbox/boards/st/nucleo_h743zi/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 130 |
```cmake
board_runner_args(jlink "--device=STM32H723ZG" "--speed=4000")
board_runner_args(openocd --target-handle=_CHIPNAME.cpu0)
board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake)
``` | /content/code_sandbox/boards/st/nucleo_h723zg/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 116 |
```yaml
identifier: nucleo_h723zg
name: ST Nucleo H723ZG
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 372
flash: 1024
supported:
- arduino_gpio
- arduino_i2c
- arduino_spi
- uart
- gpio
- counter
- i2c
- pwm
- spi
- netif:eth
- backup_sram
- usb_device
- rtc
vendor: st
``` | /content/code_sandbox/boards/st/nucleo_h723zg/nucleo_h723zg.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 136 |
```restructuredtext
.. _nucleo_h743zi_board:
ST Nucleo H743ZI
################
Overview
********
The STM32 Nucleo-144 boards offer combinations of performance and power that
provide an affordable and flexible way for users to build prototypes and try
out new concepts. For compatible boards, the SMPS (Switched-Mode Power Supply)
significantly reduces power consumption in Run mode.
The Arduino-compatible ST Zio connector expands functionality of the Nucleo
open development platform, with a wide choice of specialized Arduino* Uno V3
shields.
The STM32 Nucleo-144 board does not require any separate probe as it integrates
the ST-LINK/V2-1 debugger/programmer.
The STM32 Nucleo-144 board comes with the STM32 comprehensive free software
libraries and examples available with the STM32Cube MCU Package.
Key Features
- STM32 microcontroller in LQFP144 package
- Ethernet compliant with IEEE-802.3-2002 (depending on STM32 support)
- USB OTG or full-speed device (depending on STM32 support)
- 3 user LEDs
- 2 user and reset push-buttons
- 32.768 kHz crystal oscillator
- Board connectors:
- USB with Micro-AB
- SWD
- Ethernet RJ45 (depending on STM32 support)
- ST Zio connector including Arduino* Uno V3
- ST morpho
- Flexible power-supply options: ST-LINK USB VBUS or external sources.
- On-board ST-LINK/V2-1 debugger/programmer with USB re-enumeration
- capability: mass storage, virtual COM port and debug port.
- Comprehensive free software libraries and examples available with the
STM32Cube MCU package.
- Arm* Mbed Enabled* compliant (only for some Nucleo part numbers)
.. image:: img/nucleo_h743zi.jpg
:align: center
:alt: Nucleo H743ZI
More information about the board can be found at the `Nucleo H743ZI website`_.
Hardware
********
Nucleo H743ZI provides the following hardware components:
- STM32H743ZI in LQFP144 package
- ARM 32-bit Cortex-M7 CPU with FPU
- Chrom-ART Accelerator
- Hardware JPEG Codec
- 480 MHz max CPU frequency
- VDD from 1.62 V to 3.6 V
- 2 MB Flash
- 1 MB SRAM
- High-resolution timer (2.1 ns)
- 32-bit timers(2)
- 16-bit timers(12)
- SPI(6)
- I2C(4)
- I2S (3)
- USART(4)
- UART(4)
- USB OTG Full Speed and High Speed(1)
- USB OTG Full Speed(1)
- CAN FD(2)
- SAI(2)
- SPDIF_Rx(4)
- HDMI_CEC(1)
- Dual Mode Quad SPI(1)
- Camera Interface
- GPIO (up to 114) with external interrupt capability
- 16-bit ADC(3) with 36 channels / 3.6 MSPS
- 12-bit DAC with 2 channels(2)
- True Random Number Generator (RNG)
- 16-channel DMA
- LCD-TFT Controller with XGA resolution
Supported Features
==================
The Zephyr nucleo_h743zi board configuration supports the following hardware
features:
+-------------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+=============+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-------------+------------+-------------------------------------+
| UART | on-chip | serial port |
+-------------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-------------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-------------+------------+-------------------------------------+
| RTC | on-chip | counter |
+-------------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-------------+------------+-------------------------------------+
| PWM | on-chip | pwm |
+-------------+------------+-------------------------------------+
| ADC | on-chip | adc |
+-------------+------------+-------------------------------------+
| DAC | on-chip | DAC Controller |
+-------------+------------+-------------------------------------+
| RNG | on-chip | True Random number generator |
+-------------+------------+-------------------------------------+
| ETHERNET | on-chip | ethernet |
+-------------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-------------+------------+-------------------------------------+
| Backup SRAM | on-chip | Backup SRAM |
+-------------+------------+-------------------------------------+
| WATCHDOG | on-chip | independent watchdog |
+-------------+------------+-------------------------------------+
| USB | on-chip | usb_device |
+-------------+------------+-------------------------------------+
| CAN/CANFD | on-chip | canbus |
+-------------+------------+-------------------------------------+
| die-temp | on-chip | die temperature sensor |
+-------------+------------+-------------------------------------+
| RTC | on-chip | rtc |
+-------------+------------+-------------------------------------+
Other hardware features are not yet supported on this Zephyr port.
The default configuration can be found in the defconfig file:
:zephyr_file:`boards/st/nucleo_h743zi/nucleo_h743zi_defconfig`
For more details please refer to `STM32 Nucleo-144 board User Manual`_.
Default Zephyr Peripheral Mapping:
----------------------------------
The Nucleo H743ZI board features a ST Zio connector (extended Arduino Uno V3)
and a ST morpho connector. Board is configured as follows:
- UART_3 TX/RX : PD8/PD9 (ST-Link Virtual Port Com)
- USER_PB : PC13
- LD1 : PB0
- LD2 : PB7
- LD3 : PB14
- I2C : PB8, PB9
- ADC1_INP15 : PA3
- DAC1_OUT1 : PA4
- ETH : PA1, PA2, PA7, PB13, PC1, PC4, PC5, PG11, PG13
- SPI1 NSS/SCK/MISO/MOSI : PD14/PA5/PA6/PB5 (Arduino SPI)
- CAN/CANFD : PD0, PD1
System Clock
------------
Nucleo H743ZI System Clock could be driven by an internal or external
oscillator, as well as the main PLL clock. By default, the System clock is
driven by the PLL clock at 96MHz, driven by an 8MHz high-speed external clock.
Serial Port
-----------
Nucleo H743ZI board has 4 UARTs and 4 USARTs. The Zephyr console output is
assigned to UART3. Default settings are 115200 8N1.
Backup SRAM
-----------
In order to test backup SRAM you may want to disconnect VBAT from VDD. You can
do it by removing ``SB156`` jumper on the back side of the board.
CAN, CANFD
----------
Requires an external CAN or CANFD transceiver.
Programming and Debugging
*************************
Applications for the ``nucleo_h743zi`` board configuration can be built and
flashed in the usual way (see :ref:`build_an_application` and
:ref:`application_run` for more details).
.. note::
If using OpenOCD you will need a recent development version as the last
official release does not support H7 series yet. You can also choose the
``stm32cubeprogrammer`` or ``pyocd``` runner.
Flashing
========
Nucleo H743ZI board includes an ST-LINK/V2-1 embedded debug tool interface.
Flashing an application to Nucleo H743ZI
----------------------------------------
Here is an example for the :ref:`hello_world` application.
Run a serial host program to connect with your Nucleo board.
.. code-block:: console
$ minicom -b 115200 -D /dev/ttyACM0
Build and flash the application:
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nucleo_h743zi
:goals: build flash
You should see the following message on the console:
.. code-block:: console
$ Hello World! nucleo_h743zi
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nucleo_h743zi
:maybe-skip-config:
:goals: debug
.. _Nucleo H743ZI website:
path_to_url
.. _STM32 Nucleo-144 board User Manual:
path_to_url
.. _STM32H743ZI on www.st.com:
path_to_url
.. _STM32H743 reference manual:
path_to_url
``` | /content/code_sandbox/boards/st/nucleo_h743zi/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,996 |
```unknown
/*
*/
/dts-v1/;
#include <st/h7/stm32h723Xg.dtsi>
#include <st/h7/stm32h723zgtx-pinctrl.dtsi>
#include "arduino_r3_connector.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/*
* WARNING:
* JP6 and SB72 must be ON when using Ethernet.
*/
/ {
model = "STMicroelectronics STM32H723ZG-NUCLEO board";
compatible = "st,stm32h723zg-nucleo";
chosen {
zephyr,console = &usart3;
zephyr,shell-uart = &usart3;
zephyr,dtcm = &dtcm;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
};
leds: leds {
compatible = "gpio-leds";
green_led: led_0 {
gpios = <&gpiob 0 GPIO_ACTIVE_HIGH>;
label = "User LD1";
};
yellow_led: led_1 {
gpios = <&gpioe 1 GPIO_ACTIVE_HIGH>;
label = "User LD2";
};
red_led: led_2 {
gpios = <&gpiob 14 GPIO_ACTIVE_HIGH>;
label = "User LD3";
};
};
pwmleds {
compatible = "pwm-leds";
red_pwm_led: red_pwm_led {
pwms = <&pwm12 1 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
label = "User LD3 - PWM12";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button_0 {
label = "User";
gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>;
zephyr,code = <INPUT_KEY_0>;
};
};
aliases {
led0 = &green_led;
led1 = &yellow_led;
led2 = &red_led;
pwm-led0 = &red_pwm_led;
sw0 = &user_button;
};
};
&clk_lsi {
status = "okay";
};
&clk_hsi48 {
status = "okay";
};
&clk_hse {
hse-bypass;
clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
status = "okay";
};
&clk_lse {
status = "okay";
};
&pll {
div-m = <4>;
mul-n = <275>;
div-p = <1>;
div-q = <4>;
div-r = <2>;
clocks = <&clk_hse>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(550)>;
d1cpre = <1>;
hpre = <2>; /* HCLK: 275 MHz */
d1ppre = <2>; /* APB1: 137.5 MHz */
d2ppre1 = <2>; /* APB2: 137.5 MHz */
d2ppre2 = <2>; /* APB3: 137.5 MHz */
d3ppre = <2>; /* APB4: 137.5 MHz */
};
&usart3 {
pinctrl-0 = <&usart3_tx_pd8 &usart3_rx_pd9>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&usart2 {
pinctrl-0 = <&usart2_tx_pd5 &usart2_rx_pd6>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB4 0x00010000>,
<&rcc STM32_SRC_LSI RTC_SEL(2)>;
status = "okay";
};
&spi1 {
status = "okay";
pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pb5>;
pinctrl-names = "default";
cs-gpios = <&gpiod 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
};
&i2c1 {
pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
&backup_sram {
status = "okay";
};
&timers12 {
st,prescaler = <10000>;
status = "okay";
pwm12: pwm {
status = "okay";
pinctrl-0 = <&tim12_ch1_pb14>;
pinctrl-names = "default";
};
};
&mac {
status = "okay";
pinctrl-0 = <ð_ref_clk_pa1
ð_crs_dv_pa7
ð_rxd0_pc4
ð_rxd1_pc5
ð_tx_en_pg11
ð_txd0_pg13
ð_txd1_pb13>;
pinctrl-names = "default";
};
&mdio {
status = "okay";
pinctrl-0 = <ð_mdio_pa2 ð_mdc_pc1>;
pinctrl-names = "default";
phy: ethernet-phy@0 {
compatible = "ethernet-phy";
reg = <0>;
status = "okay";
};
};
zephyr_udc0: &usbotg_hs {
pinctrl-0 = <&usb_otg_hs_dm_pa11 &usb_otg_hs_dp_pa12>;
pinctrl-names = "default";
status = "okay";
};
&rng {
status = "okay";
};
``` | /content/code_sandbox/boards/st/nucleo_h723zg/nucleo_h723zg.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,281 |
```unknown
config BOARD_NUCLEO_H723ZG
select SOC_STM32H723XX
``` | /content/code_sandbox/boards/st/nucleo_h723zg/Kconfig.nucleo_h723zg | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 22 |
```unknown
# Enable MPU
CONFIG_ARM_MPU=y
# Enable HW stack protection
CONFIG_HW_STACK_PROTECTION=y
# Enable UART
CONFIG_SERIAL=y
# Console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# Enable GPIO
CONFIG_GPIO=y
# Enable Clock
CONFIG_CLOCK_CONTROL=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/nucleo_h723zg/nucleo_h723zg_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 72 |
```yaml
board:
name: nucleo_h723zg
vendor: st
socs:
- name: stm32h723xx
``` | /content/code_sandbox/boards/st/nucleo_h723zg/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```unknown
/*
*/
/ {
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpioa 3 0>, /* A0 */
<1 0 &gpioc 0 0>, /* A1 */
<2 0 &gpioc 3 0>, /* A2 */
<3 0 &gpiob 1 0>, /* A3 */
<4 0 &gpioc 2 0>, /* A4 */
<5 0 &gpiof 10 0>, /* A5 */
<6 0 &gpiob 7 0>, /* D0 */
<7 0 &gpiob 6 0>, /* D1 */
<8 0 &gpiog 14 0>, /* D2 */
<9 0 &gpioe 13 0>, /* D3 */
<10 0 &gpioe 14 0>, /* D4 */
<11 0 &gpioe 11 0>, /* D5 */
<12 0 &gpioe 9 0>, /* D6 */
<13 0 &gpiog 12 0>, /* D7 */
<14 0 &gpiof 3 0>, /* D8 */
<15 0 &gpiod 15 0>, /* D9 */
<16 0 &gpiod 14 0>, /* D10 */
<17 0 &gpiob 5 0>, /* D11 */
<18 0 &gpioa 6 0>, /* D12 */
<19 0 &gpioa 5 0>, /* D13 */
<20 0 &gpiob 9 0>, /* D14 */
<21 0 &gpiob 8 0>; /* D15 */
};
};
arduino_i2c: &i2c1 {};
arduino_spi: &spi1 {};
arduino_serial: &uart8 {};
``` | /content/code_sandbox/boards/st/nucleo_h723zg/arduino_r3_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 500 |
```unknown
# STM32H723ZG Nucleo board configuration
if BOARD_NUCLEO_H723ZG
if NETWORKING
config NET_L2_ETHERNET
default y
endif # NETWORKING
config USB_DC_HAS_HS_SUPPORT
default y
depends on USB_DC_STM32
endif # BOARD_NUCLEO_H723ZG
``` | /content/code_sandbox/boards/st/nucleo_h723zg/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 76 |
```ini
# STM32H745ZI Nucleo board OpenOCD ST-LINK V3 configuration
#
#
source [find interface/stlink-dap.cfg]
transport select dapdirect_swd
set WORKAREASIZE 0x3000
set CHIPNAME STM32H723ZG
set BOARDNAME NUCLEO-H723ZG
source [find target/stm32h7x.cfg]
# Use connect_assert_srst here to be able to program
# even when core is in sleep mode
reset_config srst_only srst_nogate connect_assert_srst
$_CHIPNAME.cpu0 configure -event gdb-attach {
echo "Debugger attaching: halting execution"
gdb_breakpoint_override hard
}
$_CHIPNAME.cpu0 configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
# Due to the use of connect_assert_srst, running gdb requires
# to reset halt just after openocd init.
rename init old_init
proc init {} {
old_init
reset halt
}
``` | /content/code_sandbox/boards/st/nucleo_h723zg/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 224 |
```yaml
identifier: nucleo_l4a6zg
name: ST Nucleo L4A6ZG
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
ram: 320
flash: 1024
supported:
- arduino_i2c
- arduino_gpio
- arduino_spi
- gpio
- i2c
- spi
- pwm
- counter
- watchdog
testing:
ignore_tags:
- net
- bluetooth
vendor: st
``` | /content/code_sandbox/boards/st/nucleo_l4a6zg/nucleo_l4a6zg.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 127 |
```cmake
board_runner_args(jlink "--device=STM32L4A6ZG" "--speed=4000")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/st/nucleo_l4a6zg/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 58 |
```unknown
# enable uart driver
CONFIG_SERIAL=y
# enable GPIO
CONFIG_GPIO=y
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
#enable MPU
CONFIG_ARM_MPU=y
# Enable HW stack protection
CONFIG_HW_STACK_PROTECTION=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/nucleo_l4a6zg/nucleo_l4a6zg_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 74 |
```unknown
config BOARD_NUCLEO_L4A6ZG
select SOC_STM32L4A6XX
``` | /content/code_sandbox/boards/st/nucleo_l4a6zg/Kconfig.nucleo_l4a6zg | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 26 |
```restructuredtext
.. _nucleo_h723zg_board:
ST Nucleo H723ZG
################
Overview
********
The STM32 Nucleo-144 board provides an affordable and flexible way for users
to try out new concepts and build prototypes by choosing from the various combinations
of performance and power consumption features, provided by the STM32 microcontroller.
For the compatible boards, the internal or external SMPS significantly reduces power
consumption in Run mode.
The ST Zio connector, which extends the ARDUINO Uno V3 connectivity, and
the ST morpho headers provide an easy means of expanding the functionality of the Nucleo
open development platform with a wide choice of specialized shields.
The STM32 Nucleo-144 board does not require any separate probe as it integrates
the ST-LINK V3 debugger/programmer.
The STM32 Nucleo-144 board comes with the STM32 comprehensive free software
libraries and examples available with the STM32Cube MCU Package.
Key Features
- STM32 microcontroller in LQFP144 package
- Ethernet compliant with IEEE-802.3-2002 (depending on STM32 support)
- USB OTG or full-speed device (depending on STM32 support)
- 3 user LEDs
- 2 user and reset push-buttons
- 32.768 kHz crystal oscillator
- Board connectors:
- USB with Micro-AB
- Ethernet RJ45 (depending on STM32 support)
- SWDST Zio connector including Arduino* Uno V3ST
- ST morpho expansion
- Flexible power-supply options: ST-LINK USB VBUS or external sources
- External or internal SMPS to generate Vcore logic supply
- On-board ST-LINK/V3 debugger/programmer with USB re-enumeration
- capability: mass storage, virtual COM port and debug port
- USB OTG full speed or device only
.. image:: img/nucleo_h723zg.jpg
:align: center
:alt: Nucleo H723ZG
More information about the board can be found at the `Nucleo H723ZG website`_.
Hardware
********
Nucleo H723ZG provides the following hardware components:
- STM32H723ZG in LQFP144 package
- ARM 32-bit Cortex-M7 CPU with FPU
- Chrom-ART Accelerator
- Hardware JPEG Codec
- 550 MHz max CPU frequency
- VDD from 1.62 V to 3.6 V
- 1 MB Flash
- 562 kB SRAM max (376 kb used currently)
- High-resolution timer (2.1 ns)
- 32-bit timers(2)
- 16-bit timers(12)
- SPI(6)
- I2C(4)
- I2S (3)
- USART(4)
- UART(4)
- USB OTG Full Speed and High Speed(1)
- USB OTG Full Speed(1)
- CAN FD(2)
- SAI(2)
- SPDIF_Rx(4)
- HDMI_CEC(1)
- Dual Mode Quad SPI(1)
- Camera Interface
- GPIO (up to 114) with external interrupt capability
- 16-bit ADC(3) with 36 channels / 3.6 MSPS
- 12-bit DAC with 2 channels(2)
- True Random Number Generator (RNG)
- 16-channel DMA
- LCD-TFT Controller with XGA resolution
Supported Features
==================
The Zephyr nucleo_h723zg board configuration supports the following hardware
features:
+-------------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+=============+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-------------+------------+-------------------------------------+
| UART | on-chip | serial port |
+-------------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-------------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-------------+------------+-------------------------------------+
| RTC | on-chip | counter |
+-------------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-------------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-------------+------------+-------------------------------------+
| PWM | on-chip | pwm |
+-------------+------------+-------------------------------------+
| ETHERNET | on-chip | ethernet |
+-------------+------------+-------------------------------------+
| RNG | on-chip | True Random number generator |
+-------------+------------+-------------------------------------+
| Backup SRAM | on-chip | Backup SRAM |
+-------------+------------+-------------------------------------+
| RTC | on-chip | rtc |
+-------------+------------+-------------------------------------+
Other hardware features are not yet supported on this Zephyr port.
The default configuration can be found in the defconfig files:
:zephyr_file:`boards/st/nucleo_h723zg/nucleo_h723zg_defconfig`
For more details please refer to `STM32 Nucleo-144 board User Manual`_.
Default Zephyr Peripheral Mapping:
----------------------------------
The Nucleo H723ZG board features a ST Zio connector (extended Arduino Uno V3)
and a ST morpho connector. Board is configured as follows:
- UART_3 TX/RX : PD8/PD9 (ST-Link Virtual Port Com)
- USER_PB : PC13
- LD1 : PB0
- LD2 : PB7
- LD3 : PB14
- I2C : PB8, PB9
- SPI1 NSS/SCK/MISO/MOSI : PD14PA5/PA6/PB5 (Arduino SPI)
System Clock
------------
Nucleo H723ZG System Clock could be driven by an internal or external
oscillator, as well as the main PLL clock. By default, the System clock is
driven by the PLL clock at 550MHz, driven by an 8MHz high-speed external clock.
Serial Port
-----------
Nucleo H723ZG board has 4 UARTs and 4 USARTs. The Zephyr console output is
assigned to UART3. Default settings are 115200 8N1.
Backup SRAM
-----------
In order to test backup SRAM you may want to disconnect VBAT from VDD. You can
do it by removing ``SB52`` jumper on the back side of the board.
Programming and Debugging
*************************
Currently the ``nucleo_h723zg`` board supports stm32cubeprogrammer (default), OpenOCD and J-Link debuggers.
.. note::
Official OpenOCD support for this board was added on October '20.
Make sure your openocd version is older than that.
Following links may be helpful: `OpenOCD installing Debug Version`_
and `OpenOCD installing with ST-LINK V3 support`_
.. note::
Check if your ST-LINK V3 has newest FW version. It can be done with `STM32CubeIDE`_
Flashing
========
Nucleo H723ZG board includes an ST-LINK/V3 embedded debug tool interface.
First, connect the NUCLEO-H723ZG to your host computer using
the USB port to prepare it for flashing. Then build and flash your application.
Here is an example for the :ref:`hello_world` application.
Run a serial host program to connect with your NUCLEO-H723ZG board.
.. code-block:: console
$ minicom -b 115200 -D /dev/ttyACM0
or use screen:
.. code-block:: console
$ screen /dev/ttyACM0 115200
Build and flash the application:
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nucleo_h723zg
:goals: build flash
You should see the following message on the console:
.. code-block:: console
$ Hello World! nucleo_h723zg
Blinky example can also be used:
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: nucleo_h723zg
:goals: build flash
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nucleo_h723zg
:maybe-skip-config:
:goals: debug
.. _Nucleo H723ZG website:
path_to_url
.. _STM32 Nucleo-144 board User Manual:
path_to_url
.. _STM32H723ZG on www.st.com:
path_to_url
.. _STM32H723 reference manual:
path_to_url
.. _OpenOCD installing Debug Version:
path_to_url
.. _OpenOCD installing with ST-LINK V3 support:
path_to_url
.. _STM32CubeIDE:
path_to_url
``` | /content/code_sandbox/boards/st/nucleo_h723zg/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,970 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/l4/stm32l4a6Xg.dtsi>
#include <st/l4/stm32l4a6zgtx-pinctrl.dtsi>
#include "arduino_r3_connector.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "STMicroelectronics STM32L4A6ZG-NUCLEO board";
compatible = "st,stm32l4a6zg-nucleo";
chosen {
zephyr,console = &lpuart1;
zephyr,shell-uart = &lpuart1;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
};
leds: leds {
compatible = "gpio-leds";
green_led_1: led_1 {
gpios = <&gpioc 7 GPIO_ACTIVE_HIGH>;
label = "User LD1";
};
blue_led_2: led_2 {
gpios = <&gpiob 7 GPIO_ACTIVE_HIGH>;
label = "User LD2";
};
red_led_3: led_3 {
gpios = <&gpiob 14 GPIO_ACTIVE_HIGH>;
label = "User LD3";
};
};
pwmleds {
compatible = "pwm-leds";
red_pwm_led: red_pwm_led {
pwms = <&pwm15 1 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button {
label = "User Button";
gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>;
zephyr,code = <INPUT_KEY_0>;
};
};
aliases {
led0 = &green_led_1;
led1 = &blue_led_2;
led2 = &red_led_3;
pwm-led0 = &red_pwm_led;
sw0 = &user_button;
watchdog0 = &wwdg;
};
};
&clk_lsi {
status = "okay";
};
&clk_lse {
status = "okay";
};
&clk_hsi {
status = "okay";
};
&pll {
div-m = <1>;
mul-n = <20>;
div-q = <2>;
div-r = <4>;
clocks = <&clk_hsi>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(80)>;
ahb-prescaler = <1>;
apb1-prescaler = <1>;
apb2-prescaler = <1>;
};
&usart3 {
pinctrl-0 = <&usart3_tx_pd8 &usart3_rx_pd9>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&lpuart1 {
pinctrl-0 = <&lpuart1_tx_pg7 &lpuart1_rx_pg8>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&timers15 {
st,prescaler = <10000>;
status = "okay";
pwm15: pwm {
status = "okay";
pinctrl-0 = <&tim15_ch1_pb14>;
pinctrl-names = "default";
};
};
&i2c1 {
pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
&spi1 {
pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pa7>;
pinctrl-names = "default";
cs-gpios = <&gpiod 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
status = "okay";
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>,
<&rcc STM32_SRC_LSI RTC_SEL(2)>;
status = "okay";
};
&wwdg {
status = "okay";
};
``` | /content/code_sandbox/boards/st/nucleo_l4a6zg/nucleo_l4a6zg.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 940 |
```unknown
# STM32L4A6ZG Nucleo board configuration
if BOARD_NUCLEO_L4A6ZG
config SPI_STM32_INTERRUPT
default y
depends on SPI
endif # BOARD_NUCLEO_L4A6ZG
``` | /content/code_sandbox/boards/st/nucleo_l4a6zg/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 58 |
```unknown
/*
*
*/
/ {
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpioa 3 0>, /* A0 */
<1 0 &gpioc 0 0>, /* A1 */
<2 0 &gpioc 3 0>, /* A2 */
<3 0 &gpioc 1 0>, /* A3 */
<4 0 &gpioc 4 0>, /* A4 */
<5 0 &gpioc 5 0>, /* A5 */
<6 0 &gpiod 9 0>, /* D0 */
<7 0 &gpiod 8 0>, /* D1 */
<8 0 &gpiof 15 0>, /* D2 */
<9 0 &gpioe 13 0>, /* D3 */
<10 0 &gpiof 14 0>, /* D4 */
<11 0 &gpioe 11 0>, /* D5 */
<12 0 &gpioe 9 0>, /* D6 */
<13 0 &gpiof 13 0>, /* D7 */
<14 0 &gpiof 12 0>, /* D8 */
<15 0 &gpiod 15 0>, /* D9 */
<16 0 &gpiod 14 0>, /* D10 */
<17 0 &gpioa 7 0>, /* D11 */
<18 0 &gpioa 6 0>, /* D12 */
<19 0 &gpioa 5 0>, /* D13 */
<20 0 &gpiob 9 0>, /* D14 */
<21 0 &gpiob 8 0>; /* D15 */
};
};
arduino_i2c: &i2c1 {};
arduino_spi: &spi1 {};
arduino_serial: &usart3 {};
``` | /content/code_sandbox/boards/st/nucleo_l4a6zg/arduino_r3_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 500 |
```yaml
board:
name: nucleo_l4a6zg
vendor: st
socs:
- name: stm32l4a6xx
``` | /content/code_sandbox/boards/st/nucleo_l4a6zg/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 36 |
```ini
source [find board/st_nucleo_l4.cfg]
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
``` | /content/code_sandbox/boards/st/nucleo_l4a6zg/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 67 |
```yaml
identifier: nucleo_l433rc_p
name: ST Nucleo L433RC
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 64
flash: 256
supported:
- nvs
- pwm
- can
- counter
- spi
- i2c
- arduino_i2c
- arduino_spi
vendor: st
``` | /content/code_sandbox/boards/st/nucleo_l433rc_p/nucleo_l433rc_p.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 107 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/l4/stm32l433Xc.dtsi>
#include <st/l4/stm32l433rctxp-pinctrl.dtsi>
#include "arduino_r3_connector.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "STMicroelectronics STM32L433RC-P-NUCLEO board";
compatible = "st,stm32l433rc-p-nucleo";
chosen {
zephyr,console = &lpuart1;
zephyr,shell-uart = &lpuart1;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,canbus = &can1;
};
leds: leds {
compatible = "gpio-leds";
green_led: led_0 {
gpios = <&gpiob 13 GPIO_ACTIVE_HIGH>;
label = "User LD4";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button {
gpios = <&gpioc 13 GPIO_ACTIVE_LOW>;
label = "User";
zephyr,code = <INPUT_KEY_0>;
};
};
aliases {
led0 = &green_led;
sw0 = &user_button;
};
};
&clk_lsi {
status = "okay";
};
&clk_hsi {
status = "okay";
};
&pll {
div-m = <1>;
mul-n = <20>;
div-p = <7>;
div-q = <2>;
div-r = <4>;
clocks = <&clk_hsi>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(80)>;
ahb-prescaler = <1>;
apb1-prescaler = <1>;
apb2-prescaler = <1>;
};
&lpuart1 {
pinctrl-0 = <&lpuart1_tx_pa2 &lpuart1_rx_pa3>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&usart1 {
pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
pinctrl-names = "default";
current-speed = <115200>;
};
&spi1 {
pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pa5
&spi1_miso_pa6 &spi1_mosi_pa7>;
pinctrl-names = "default";
status = "okay";
};
&spi2 {
pinctrl-0 = <&spi2_sck_pb13 &spi2_miso_pb14 &spi2_mosi_pb15>;
pinctrl-names = "default";
cs-gpios = <&gpioa 11 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
status = "okay";
};
&i2c1 {
pinctrl-0 = <&i2c1_scl_pb6 &i2c1_sda_pb7>;
pinctrl-names = "default";
clock-frequency = <I2C_BITRATE_FAST>;
status = "okay";
};
&timers2 {
status = "okay";
pwm2: pwm {
status = "okay";
pinctrl-0 = <&tim2_ch1_pa0>;
pinctrl-names = "default";
};
};
&can1 {
pinctrl-0 = <&can1_rx_pa11 &can1_tx_pa12>;
pinctrl-names = "default";
status = "okay";
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>,
<&rcc STM32_SRC_LSI RTC_SEL(2)>;
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/*
* Reserve the final 16 KiB for file system partition
*/
storage_partition: partition@3c000 {
label = "storage";
reg = <0x0003c000 DT_SIZE_K(16)>;
};
};
};
``` | /content/code_sandbox/boards/st/nucleo_l433rc_p/nucleo_l433rc_p.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 928 |
```cmake
board_runner_args(jlink "--device=STM32L433RC" "--speed=4000")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/st/nucleo_l433rc_p/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 55 |
```unknown
# Enable MPU
CONFIG_ARM_MPU=y
# Enable HW stack protection
CONFIG_HW_STACK_PROTECTION=y
# enable uart driver
CONFIG_SERIAL=y
# enable GPIO
CONFIG_GPIO=y
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/nucleo_l433rc_p/nucleo_l433rc_p_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 74 |
```yaml
board:
name: nucleo_l433rc_p
vendor: st
socs:
- name: stm32l433xx
``` | /content/code_sandbox/boards/st/nucleo_l433rc_p/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```unknown
# STM32L433RC Nucleo board configuration
if BOARD_NUCLEO_L433RC_P
config SPI_STM32_INTERRUPT
default y
depends on SPI
endif # BOARD_NUCLEO_L433RC_P
``` | /content/code_sandbox/boards/st/nucleo_l433rc_p/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 51 |
```unknown
/*
*
*/
/ {
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpioa 0 0>, /* A0 */
<1 0 &gpioa 1 0>, /* A1 */
<2 0 &gpioc 3 0>, /* A2 */
<3 0 &gpioc 2 0>, /* A3 */
<4 0 &gpioc 1 0>, /* A4 */
<5 0 &gpioc 0 0>, /* A5 */
<6 0 &gpioa 3 0>, /* D0 */
<7 0 &gpioa 2 0>, /* D1 */
<8 0 &gpioa 12 0>, /* D2 */
<9 0 &gpiob 3 0>, /* D3 */
<10 0 &gpiob 5 0>, /* D4 */
<11 0 &gpioa 15 0>, /* D5 */
<12 0 &gpiob 10 0>, /* D6 */
<13 0 &gpioc 7 0>, /* D7 */
<14 0 &gpiob 6 0>, /* D8 */
<15 0 &gpioa 8 0>, /* D9 */
<16 0 &gpioa 11 0>, /* D10 */
<17 0 &gpiob 15 0>, /* D11 */
<18 0 &gpiob 14 0>, /* D12 */
<19 0 &gpiob 13 0>, /* D13 */
<20 0 &gpiob 7 0>, /* D14 */
<21 0 &gpiob 8 0>; /* D15 */
};
};
arduino_i2c: &i2c1 {};
arduino_spi: &spi2 {};
``` | /content/code_sandbox/boards/st/nucleo_l433rc_p/arduino_r3_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 495 |
```restructuredtext
.. _nucleo_l4a6zg_board:
ST Nucleo L4A6ZG
################
Overview
********
The Nucleo L4A6ZG board features an ARM Cortex-M4 based STM32L4A6ZG MCU
with a wide range of connectivity support and configurations. Here are
some highlights of the Nucleo L4A6ZG board:
- STM32 microcontroller in QFP144 package
- USB OTG FS with Micro-AB connector
- Two types of extension resources:
- Arduino Uno V3 connectivity
- ST morpho extension pin headers for full access to all STM32 I/Os
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector
- Flexible board power supply:
- USB VBUS or external source(3.3V, 5V, 7 - 12V)
- Power management access point
- 8 LEDs: user LEDs (LD1, LD2, LD3), communication LED (LD4), USB
power fault(LD5), power LED (LD6), USB FS OTG (LD7, LD8)
- 2 push buttons: USER and RESET
.. image:: ../../nucleo_l496zg/doc/img/nucleo_l496zg.jpg
:align: center
:alt: Nucleo L4A6ZG
More information about the board can be found at the `Nucleo L4A6ZG website`_.
Hardware
********
The STM32L4A6ZG SoC provides the following hardware capabilities:
- Ultra-low-power with FlexPowerControl (down to 108 nA Standby mode and 91 uA/MHz run mode)
- Core: ARM |reg| 32-bit Cortex |reg|-M4 CPU with FPU, frequency up to 80 MHz, 100DMIPS/1.25DMIPS/MHz (Dhrystone 2.1)
- Clock Sources:
- 4 to 48 MHz crystal oscillator
- 32 kHz crystal oscillator for RTC (LSE)
- Internal 16 MHz factory-trimmed RC ( |plusminus| 1%)
- Internal low-power 32 kHz RC ( |plusminus| 5%)
- Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by
LSE (better than |plusminus| 0.25 % accuracy)
- 3 PLLs for system clock, USB, audio, ADC
- RTC with HW calendar, alarms and calibration
- LCD 8 x 40 or 4 x 44 with step-up converter
- Up to 24 capacitive sensing channels: support touchkey, linear and rotary touch sensors
- 16x timers:
- 2x 16-bit advanced motor-control
- 2x 32-bit and 5x 16-bit general purpose
- 2x 16-bit basic
- 2x low-power 16-bit timers (available in Stop mode)
- 2x watchdogs
- SysTick timer
- Up to 136 fast I/Os, most 5 V-tolerant, up to 14 I/Os with independent supply down to 1.08 V
- Memories
- Up to 1 MB Flash, 2 banks read-while-write, proprietary code readout protection
- Up to 320 KB of SRAM including 64 KB with hardware parity check
- External memory interface for static memories supporting SRAM, PSRAM, NOR and NAND memories
- Quad SPI memory interface
- 4x digital filters for sigma delta modulator
- Rich analog peripherals (independent supply)
- 3x 12-bit ADC 5 MSPS, up to 16-bit with hardware oversampling, 200 uA/MSPS
- 2x 12-bit DAC, low-power sample and hold
- 2x operational amplifiers with built-in PGA
- 2x ultra-low-power comparators
- 20x communication interfaces
- USB OTG 2.0 full-speed, LPM and BCD
- 2x SAIs (serial audio interface)
- 4x I2C FM+(1 Mbit/s), SMBus/PMBus
- 5x U(S)ARTs (ISO 7816, LIN, IrDA, modem)
- 1x LPUART
- 3x SPIs (4x SPIs with the Quad SPI)
- 2x CAN (2.0B Active) and SDMMC interface
- SWPMI single wire protocol master I/F
- IRTIM (Infrared interface)
- 14-channel DMA controller
- True random number generator
- CRC calculation unit, 96-bit unique ID
- AES and HASH hardware accelerators
- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell |trade|
More information about STM32L4A6ZG can be found here:
- `STM32L4A6ZG on www.st.com`_
- `STM32L4A6 reference manual`_
Supported Features
==================
The Zephyr nucleo_l4a6zg board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| AES | on-chip | crypto |
+-----------+------------+-------------------------------------+
| FLASH | on-chip | flash memory |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| PWM | on-chip | pwm |
+-----------+------------+-------------------------------------+
| RTC | on-chip | rtc |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | System Window Watchdog |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported on this Zephyr port.
The default configuration can be found in the defconfig file:
:zephyr_file:`boards/st/nucleo_l4a6zg/nucleo_l4a6zg_defconfig`
Connections and IOs
===================
Nucleo L4A6ZG Board has 8 GPIO controllers. These controllers are responsible for pin muxing,
input/output, pull-up, etc.
For more details please refer to `STM32 Nucleo-144 board User Manual`_.
Default Zephyr Peripheral Mapping:
----------------------------------
- LPUART_1 TX/RX : PG7/PG8 (ST-Link Virtual COM Port)
- UART_3 TX/RX : PD8/PD9 (Arduino Serial)
- I2C_1 SCL/SDA : PB8/PB7 (Arduino I2C)
- SPI_1 SCK/MISO/MOSI/NSS : PA5/PA6/PA7/PD14 (Arduino SPI)
- USER_PB : PC13
- PWM_15_CH1 : PB14 (Red LED)
- LD1 : PC7 (Green LED)
- LD2 : PB7 (Blue LED)
- LD3 : PB14 (Red LED)
System Clock
------------
Nucleo L4A6ZG system clock could be driven by internal or external oscillator,
as well as main PLL clock. By default, system clock is driven by PLL at 80MHz, which is
driven by 16MHz high speed internal oscillator (HSI). High speed external oscillator
(HSE) is not soldered on the board, so it cannot be used to drive the PLL.
Serial Port
-----------
Nucleo L4A6ZG board has 5 UARTs. The Zephyr console output is assigned to LPUART1,
which is connected to the onboard ST-LINK/V2-1. Virtual COM port interface.
Default settings are 115200 8N1.
Programming and Debugging
*************************
Applications for the ``nucleo_l4a6zg`` board configuration can be built and
flashed in the usual way (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Flashing
========
Nucleo L4A6ZG board includes an ST-LINK/V2-1 embedded debug tool
interface. This interface is supported by the OpenOCD version
included in the Zephyr SDK since v0.9.5.
Flashing an application to Nucleo L4A6ZG
----------------------------------------
Connect the Nucleo L4A6ZG to your host computer using the ST-LINK USB port.
Then build and flash an application. Here is an example for the
:ref:`hello_world` application.
Run a serial host program to connect with your Nucleo board:
.. code-block:: console
$ minicom -D /dev/ttyUSB0
Then build and flash the application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nucleo_l4a6zg
:goals: build flash
You should see the following message on the console:
.. code-block:: console
Hello World! nucleo_l4a6zg
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nucleo_l4a6zg
:maybe-skip-config:
:goals: debug
.. _Nucleo L4A6ZG website:
path_to_url
.. _STM32 Nucleo-144 board User Manual:
path_to_url
.. _STM32L4A6ZG on www.st.com:
path_to_url
.. _STM32L4A6 reference manual:
path_to_url
``` | /content/code_sandbox/boards/st/nucleo_l4a6zg/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,265 |
```ini
source [find interface/stlink.cfg]
transport select hla_swd
source [find target/stm32l4x.cfg]
reset_config srst_only
``` | /content/code_sandbox/boards/st/nucleo_l433rc_p/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 34 |
```unknown
config BOARD_NUCLEO_L433RC_P
select SOC_STM32L433XX
``` | /content/code_sandbox/boards/st/nucleo_l433rc_p/Kconfig.nucleo_l433rc_p | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 22 |
```cmake
board_runner_args(jlink "--device=STM32F413ZH" "--speed=4000")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/st/nucleo_f413zh/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 55 |
```unknown
config BOARD_NUCLEO_F413ZH
select SOC_STM32F413XX
``` | /content/code_sandbox/boards/st/nucleo_f413zh/Kconfig.nucleo_f413zh | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 21 |
```yaml
identifier: nucleo_f413zh
name: ST Nucleo F413ZH
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 320
flash: 1536
supported:
- arduino_i2c
- arduino_gpio
- arduino_spi
- pwm
- i2c
- spi
- gpio
- usb_device
- usbd
- counter
vendor: st
``` | /content/code_sandbox/boards/st/nucleo_f413zh/nucleo_f413zh.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 118 |
```yaml
board:
name: nucleo_f413zh
vendor: st
socs:
- name: stm32f413xx
``` | /content/code_sandbox/boards/st/nucleo_f413zh/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 31 |
```unknown
# NUCLEO-144 F413ZH board configuration
if BOARD_NUCLEO_F413ZH
if NETWORKING
config USB_DEVICE_STACK
default y
config USB_DEVICE_NETWORK_ECM
default y
endif # NETWORKING
endif # BOARD_NUCLEO_F413ZH
``` | /content/code_sandbox/boards/st/nucleo_f413zh/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 62 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/f4/stm32f413Xh.dtsi>
#include <st/f4/stm32f413z(g-h)tx-pinctrl.dtsi>
#include "arduino_r3_connector.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "STMicroelectronics STM32F413ZH-NUCLEO board";
compatible = "st,stm32f413zh-nucleo";
chosen {
zephyr,console = &usart3;
zephyr,shell-uart = &usart3;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
};
leds: leds {
compatible = "gpio-leds";
green_led_1: led_1 {
gpios = <&gpiob 0 GPIO_ACTIVE_HIGH>;
label = "User LD1";
};
blue_led_1: led_2 {
gpios = <&gpiob 7 GPIO_ACTIVE_HIGH>;
label = "User LD2";
};
red_led_1: led_3 {
gpios = <&gpiob 14 GPIO_ACTIVE_HIGH>;
label = "User LD3";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button {
label = "User";
gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>;
zephyr,code = <INPUT_KEY_0>;
};
};
aliases {
led0 = &green_led_1;
led1 = &blue_led_1;
led2 = &red_led_1;
sw0 = &user_button;
};
};
&clk_lsi {
status = "okay";
};
&clk_hse {
hse-bypass;
clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
status = "okay";
};
&pll {
div-m = <8>;
mul-n = <384>;
div-p = <4>;
div-q = <8>;
clocks = <&clk_hse>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(96)>;
ahb-prescaler = <1>;
apb1-prescaler = <2>;
apb2-prescaler = <1>;
};
&usart3 {
pinctrl-0 = <&usart3_tx_pd8 &usart3_rx_pd9>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&usart6 {
pinctrl-0 = <&usart6_tx_pg14 &usart6_rx_pg9>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&i2c1 {
pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
&spi1 {
pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pa7>;
pinctrl-names = "default";
cs-gpios = <&gpiod 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
status = "okay";
};
zephyr_udc0: &usbotg_fs {
pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12>;
pinctrl-names = "default";
status = "okay";
};
&timers2 {
status = "okay";
pwm2: pwm {
status = "okay";
pinctrl-0 = <&tim2_ch1_pa0>;
pinctrl-names = "default";
};
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>,
<&rcc STM32_SRC_LSI RTC_SEL(2)>;
status = "okay";
};
``` | /content/code_sandbox/boards/st/nucleo_f413zh/nucleo_f413zh.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 897 |
```unknown
# Enable MPU
CONFIG_ARM_MPU=y
# Enable HW stack protection
CONFIG_HW_STACK_PROTECTION=y
CONFIG_SERIAL=y
# console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# enable GPIO
CONFIG_GPIO=y
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/nucleo_f413zh/nucleo_f413zh_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 69 |
```unknown
/*
*
*/
/ {
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpioa 3 0>, /* A0 */
<1 0 &gpioc 0 0>, /* A1 */
<2 0 &gpioc 3 0>, /* A2 */
<3 0 &gpioc 1 0>, /* A3 */
<4 0 &gpioc 4 0>, /* A4 */
<5 0 &gpioc 5 0>, /* A5 */
<6 0 &gpiog 9 0>, /* D0 */
<7 0 &gpiog 14 0>, /* D1 */
<8 0 &gpiof 15 0>, /* D2 */
<9 0 &gpioe 13 0>, /* D3 */
<10 0 &gpiof 14 0>, /* D4 */
<11 0 &gpioe 11 0>, /* D5 */
<12 0 &gpioe 9 0>, /* D6 */
<13 0 &gpiof 13 0>, /* D7 */
<14 0 &gpiof 12 0>, /* D8 */
<15 0 &gpiod 15 0>, /* D9 */
<16 0 &gpiod 14 0>, /* D10 */
<17 0 &gpioa 7 0>, /* D11 */
<18 0 &gpioa 6 0>, /* D12 */
<19 0 &gpioa 5 0>, /* D13 */
<20 0 &gpiob 9 0>, /* D14 */
<21 0 &gpiob 8 0>; /* D15 */
};
};
arduino_i2c: &i2c1 {};
arduino_spi: &spi1 {};
arduino_serial: &usart6 {};
``` | /content/code_sandbox/boards/st/nucleo_f413zh/arduino_r3_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 500 |
```ini
source [find board/st_nucleo_f4.cfg]
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
``` | /content/code_sandbox/boards/st/nucleo_f413zh/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 70 |
```restructuredtext
.. _nucleo_l433rc_board:
ST Nucleo L433RC
################
Overview
********
The Nucleo L433RC board features an ARM Cortex-M4 based STM32L433RC MCU
with a wide range of connectivity support and configurations. Here are
some highlights of the Nucleo L433RC board:
- STM32 microcontroller in LQFP64 package
- Arduino Uno V3 connectivity
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector
- Flexible board power supply:
- USB VBUS or external source(3.3V, 5V, 7 - 12V)
- Power management access point
- Three LEDs: USB communication (LD1), power LED (LD3), user LED (LD4)
- One push-button: RESET
.. image:: img/nucleo_l433rc_p.jpg
:align: center
:alt: Nucleo L433RC
More information about the board can be found at the `Nucleo L433RC-P website`_.
Hardware
********
The STM32L433RC SoC provides the following hardware IPs:
- Ultra-low-power with FlexPowerControl (down to 28 nA Standby mode and 84
|micro| A/MHz run mode)
- Core: ARM |reg| 32-bit Cortex |reg| -M4 CPU with FPU, frequency up to 80 MHz,
100DMIPS/1.25DMIPS/MHz (Dhrystone 2.1)
- Clock Sources:
- 32 kHz crystal oscillator for RTC (LSE)
- Internal 16 MHz factory-trimmed RC ( |plusminus| 1%)
- Internal low-power 32 kHz RC ( |plusminus| 5%)
- Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by
LSE (better than |plusminus| 0.25 % accuracy)
- 2 PLLs for system clock, USB, audio, ADC
- RTC with HW calendar, alarms and calibration
- Up to 21 capacitive sensing channels: support touchkey, linear and rotary touch sensors
- 11x timers:
- 1x 16-bit advanced motor-control
- 1x 32-bit and 2x 16-bit general purpose
- 2x 16-bit basic
- 2x low-power 16-bit timers (available in Stop mode)
- 2x watchdogs
- SysTick timer
- Up to 83 fast I/Os, most 5 V-tolerant
- Memories
- Up to 256 KB single bank Flash, proprietary code readout protection
- 64 KB of SRAM including 16 KB with hardware parity check
- Quad SPI memory interface
- Rich analog peripherals (independent supply)
- 1x 12-bit ADC 5 MSPS, up to 16-bit with hardware oversampling, 200
|micro| A/MSPS
- 2x 12-bit DAC output channels, low-power sample and hold
- 1x operational amplifiers with built-in PGA
- 2x ultra-low-power comparators
- 17x communication interfaces
- USB 2.0 full-speed crystal less solution with LPM and BCD
- 1x SAI (serial audio interface)
- 3x I2C FM+(1 Mbit/s), SMBus/PMBus
- 4x USARTs (ISO 7816, LIN, IrDA, modem)
- 1x LPUART (Stop 2 wake-up)
- 3x SPIs (and 1x Quad SPI)
- CAN (2.0B Active) and SDMMC interface
- SWPMI single wire protocol master I/F
- IRTIM (Infrared interface)
- 14-channel DMA controller
- True random number generator
- CRC calculation unit, 96-bit unique ID
- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell*
More information about STM32L433RC can be found here:
- `STM32L433RC on www.st.com`_
- `STM32L432 reference manual`_
Supported Features
==================
The Zephyr nucleo_l433rc_p board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| PWM | on-chip | pwm |
+-----------+------------+-------------------------------------+
| CAN | on-chip | can |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
.. note:: CAN feature requires CAN transceiver
Other hardware features are not yet supported on this Zephyr port.
The default configuration can be found in the defconfig file:
:zephyr_file:`boards/st/nucleo_l433rc_p/nucleo_l433rc_p_defconfig`
Connections and IOs
===================
Nucleo L433RC-P Board has 6 GPIO controllers. These controllers are responsible for pin muxing,
input/output, pull-up, etc.
Available pins:
---------------
.. image:: img/nucleo_l433rc_p_pinout.jpg
:align: center
:alt: Nucleo L433RC-P
For more details please refer to `ST Nucleo L433RC-P User Manual`_.
Default Zephyr Peripheral Mapping:
----------------------------------
- LPUART_1_TX : PA2
- LPUART_1_RX : PA3
- UART_1_TX : PA9
- UART_1_RX : PA10
- I2C_1_SCL : PB6
- I2C_1_SDA : PB7
- PWM_2_CH1 : PA0
- LD4 : PB13
- SPI_1: NSS/SCK/MISO/MOSI : PA4/PA5/PA6/PA7
- SPI_2: NSS/SCK/MISO/MOSI : PA11/PB13/PB14/PB15 (Arduino SPI)
System Clock
------------
Nucleo L433RC-P System Clock could be driven by internal or external oscillator,
as well as main PLL clock. By default System clock is driven by PLL clock at 80MHz,
driven by 16MHz high speed internal oscillator.
Serial Port
-----------
Nucleo L433RC-P board has 4 U(S)ARTs and 1 LPUART. The Zephyr console output is assigned
to LPUART1. Default settings are 115200 8N1.
Programming and Debugging
*************************
Applications for the ``nucleo_l433rc_p`` board configuration can be built and
flashed in the usual way (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Flashing
========
Nucleo L433RC-P board includes an ST-LINK/V2-1 embedded debug tool
interface. This interface is supported by the openocd version
included in the Zephyr SDK since v0.9.2.
Flashing an application to Nucleo L433RC-P
------------------------------------------
Connect the Nucleo L433RC-P to your host computer using the USB port,
then run a serial host program to connect with your Nucleo board.
.. code-block:: console
$ picocom /dev/ttyACM0 -b 115200
Now build and flash an application. Here is an example for
:ref:`hello_world`.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nucleo_l433rc_p
:goals: build flash
You should see the following message on the console:
.. code-block:: console
$ Hello World! nucleo_l433rc_p
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nucleo_l433rc_p
:maybe-skip-config:
:goals: debug
.. _Nucleo L433RC-P website:
path_to_url
.. _ST Nucleo L433RC-P User Manual:
path_to_url
.. _STM32L433RC on www.st.com:
path_to_url
.. _STM32L432 reference manual:
path_to_url
``` | /content/code_sandbox/boards/st/nucleo_l433rc_p/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,966 |
```unknown
# enable uart driver
CONFIG_SERIAL=y
# enable GPIO
CONFIG_GPIO=y
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/b_l4s5i_iot01a/b_l4s5i_iot01a_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 51 |
```cmake
board_runner_args(jlink "--device=STM32L4S5VI" "--speed=4000")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/st/b_l4s5i_iot01a/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 57 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/l4/stm32l4s5Xi.dtsi>
#include <st/l4/stm32l4s5vitx-pinctrl.dtsi>
#include "arduino_r3_connector.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "STMicroelectronics B-L4S5I-IOT01A discovery kit";
compatible = "st,b-l4s5i-iot01a";
chosen {
zephyr,console = &usart1;
zephyr,shell-uart = &usart1;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,flash-controller = &mx25r6435f;
zephyr,bt-c2h-uart = &usart1;
zephyr,bt-hci = &hci_spi;
};
leds {
compatible = "gpio-leds";
green_led_1: led_1 {
gpios = <&gpioa 5 GPIO_ACTIVE_HIGH>;
label = "User LD1";
};
green_led_2: led_2 {
gpios = <&gpiob 14 GPIO_ACTIVE_HIGH>;
label = "User LD2";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button {
label = "User";
gpios = <&gpioc 13 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_0>;
};
};
aliases {
led0 = &green_led_1;
sw0 = &user_button;
watchdog0 = &iwdg;
accel0 = &lsm6dsl;
};
};
&clk_lsi {
status = "okay";
};
&clk_hsi48 {
status = "okay";
};
&clk_hsi {
status = "okay";
};
&pll {
div-m = <4>;
mul-n = <40>;
div-q = <2>;
div-r = <2>;
clocks = <&clk_hsi>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(80)>;
ahb-prescaler = <1>;
apb1-prescaler = <1>;
apb2-prescaler = <1>;
};
&usart1 {
pinctrl-0 = <&usart1_tx_pb6 &usart1_rx_pb7>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&uart4 {
pinctrl-0 = <&uart4_tx_pa0 &uart4_rx_pa1>;
pinctrl-names = "default";
current-speed = <115200>;
};
&i2c1 {
pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
&i2c2 {
pinctrl-0 = <&i2c2_scl_pb10 &i2c2_sda_pb11>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
lis3mdl-magn@1e {
compatible = "st,lis3mdl-magn";
reg = <0x1e>;
};
hts221@5f {
compatible = "st,hts221";
reg = <0x5f>;
};
lps22hb-press@5d {
compatible = "st,lps22hb-press";
reg = <0x5d>;
};
lsm6dsl: lsm6dsl@6a {
compatible = "st,lsm6dsl";
reg = <0x6a>;
irq-gpios = <&gpiod 11 GPIO_ACTIVE_HIGH>;
};
vl53l0x@29 {
compatible = "st,vl53l0x";
reg = <0x29>;
xshut-gpios = <&gpioc 6 GPIO_ACTIVE_LOW>;
};
};
&spi1 {
pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pa7>;
pinctrl-names = "default";
cs-gpios = <&gpioa 2 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
status = "okay";
};
&spi3 {
pinctrl-0 = <&spi3_sck_pc10 &spi3_miso_pc11 &spi3_mosi_pc12>;
pinctrl-names = "default";
status = "okay";
cs-gpios = <&gpiod 13 GPIO_ACTIVE_LOW>,
<&gpioe 0 GPIO_ACTIVE_LOW>;
hci_spi: spbtle-rf@0 {
compatible = "st,hci-spi-v1";
reg = <0>;
reset-gpios = <&gpioa 8 GPIO_ACTIVE_LOW>;
irq-gpios = <&gpioe 6 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
spi-max-frequency = <DT_FREQ_M(2)>;
spi-hold-cs;
};
wifi0: ism43362@1 {
compatible = "inventek,eswifi";
spi-max-frequency = <2000000>;
reg = <1>;
resetn-gpios = <&gpioe 8 GPIO_ACTIVE_HIGH>;
boot0-gpios = <&gpiob 12 GPIO_ACTIVE_HIGH>;
wakeup-gpios = <&gpiob 13 GPIO_ACTIVE_HIGH>;
data-gpios = <&gpioe 1 GPIO_ACTIVE_HIGH>;
};
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 DT_SIZE_K(64)>;
read-only;
};
/*
* The flash starting at offset 0x10000 and ending at
* offset 0x1ffff is reserved for use by the application.
*/
slot0_partition: partition@20000 {
label = "image-0";
reg = <0x00020000 DT_SIZE_K(432)>;
};
slot1_partition: partition@8c000 {
label = "image-1";
reg = <0x0008C000 DT_SIZE_K(432)>;
};
scratch_partition: partition@f8000 {
label = "image-scratch";
reg = <0x000F8000 DT_SIZE_K(16)>;
};
storage_partition: partition@fc000 {
label = "storage";
reg = <0x000fc000 DT_SIZE_K(16)>;
};
};
};
&timers2 {
status = "okay";
pwm2: pwm {
status = "okay";
pinctrl-0 = <&tim2_ch1_pa15>;
pinctrl-names = "default";
};
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>,
<&rcc STM32_SRC_LSI RTC_SEL(2)>;
status = "okay";
};
zephyr_udc0: &usbotg_fs {
pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12
&usb_otg_fs_id_pa10>;
pinctrl-names = "default";
status = "okay";
};
&iwdg {
status = "okay";
};
&rng {
status = "okay";
};
&octospi1 {
pinctrl-0 = <&octospim_p1_clk_pe10 &octospim_p1_ncs_pe11
&octospim_p1_io0_pe12 &octospim_p1_io1_pe13
&octospim_p1_io2_pe14 &octospim_p1_io3_pe15>;
pinctrl-names = "default";
dmas = <&dma1 0 40 0x480>; /* request 40 for OCTOSPI1 */
dma-names = "tx_rx";
status = "okay";
mx25r6435f: ospi-nor-flash@90000000 {
compatible = "st,stm32-ospi-nor";
reg = <0x90000000 DT_SIZE_M(8)>; /* 64 Megabits */
ospi-max-frequency = <DT_FREQ_M(26)>; /* for Voltage Range 2 */
spi-bus-width = <OSPI_QUAD_MODE>;
data-rate = <OSPI_STR_TRANSFER>;
writeoc="PP_1_4_4";
status = "okay";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
store_partition: partition@000 {
label = "store";
reg = <0x00000000 DT_SIZE_M(8)>;
};
};
};
};
&dma1 {
status = "okay";
};
&dmamux1 {
status = "okay";
};
``` | /content/code_sandbox/boards/st/b_l4s5i_iot01a/b_l4s5i_iot01a.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,061 |
```yaml
board:
name: b_l4s5i_iot01a
vendor: st
socs:
- name: stm32l4s5xx
``` | /content/code_sandbox/boards/st/b_l4s5i_iot01a/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 38 |
```yaml
identifier: b_l4s5i_iot01a
name: ST B_L4S5I_IOT01A Discovery kit
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 640
flash: 2048
supported:
- arduino_gpio
- arduino_i2c
- i2c
- hts221
- lps22hb
- lsm6dsl
- pwm
- gpio
- ble
- spi
- vl53l0x
- watchdog
vendor: st
``` | /content/code_sandbox/boards/st/b_l4s5i_iot01a/b_l4s5i_iot01a.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 145 |
```unknown
config BOARD_B_L4S5I_IOT01A
select SOC_STM32L4S5XX
``` | /content/code_sandbox/boards/st/b_l4s5i_iot01a/Kconfig.b_l4s5i_iot01a | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 26 |
```unknown
# B_L4S5I_IOT01A discovery kit board configuration
if BOARD_B_L4S5I_IOT01A
config SPI_STM32_INTERRUPT
default y
depends on SPI
choice LIS3MDL_TRIGGER_MODE
default LIS3MDL_TRIGGER_NONE
endchoice
choice HTS221_TRIGGER_MODE
default HTS221_TRIGGER_NONE
endchoice
choice LSM6DSL_TRIGGER_MODE
default LSM6DSL_TRIGGER_GLOBAL_THREAD
depends on LSM6DSL
endchoice
if BT
config SPI
default y
config BT_SPI
default y
config BT_BLUENRG_ACI
default y
# Disable Flow control
config BT_HCI_ACL_FLOW_CONTROL
default n
config BT_HCI_VS
default n
endif # BT
endif # BOARD_B_L4S5I_IOT01A
``` | /content/code_sandbox/boards/st/b_l4s5i_iot01a/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 178 |
```restructuredtext
.. _nucleo_f413zh_board:
ST Nucleo F413ZH
################
Overview
********
The Nucleo F413ZH board features an ARM Cortex-M4 based STM32F413ZH MCU
with a wide range of connectivity support and configurations. Here are
some highlights of the Nucleo F413ZH board:
- STM32 microcontroller in LQFP144 package
- Two types of extension resources:
- ST Zio connector including: support for Arduino* Uno V3 connectivity
(A0 to A5, D0 to D15) and additional signals exposing a wide range of
peripherals
- ST morpho extension pin headers for full access to all STM32 I/Os
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector
- Flexible board power supply:
- 5 V from ST-LINK/V2-1 USB VBUS
- External power sources: 3.3 V and 7 - 12 V on ST Zio or ST morpho
connectors, 5 V on ST morpho connector
- Three user LEDs
- Two push-buttons: USER and RESET
.. image:: img/nucleo_f413zh.jpg
:align: center
:alt: Nucleo F413ZH
More information about the board can be found at the `Nucleo F413ZH website`_.
Hardware
********
Nucleo F413ZH provides the following hardware components:
- STM32F413ZHT6 in LQFP144 package
- ARM |reg| 32-bit Cortex |reg| -M4 CPU with FPU
- 100 MHz max CPU frequency
- VDD from 1.7 V to 3.6 V
- 1.5 MB Flash
- 320 KB SRAM
- GPIO with external interrupt capability
- 2 12-bit ADC with 16 channels, with FIFO and burst support
- RTC
- 14 General purpose timers
- 2 watchdog timers (independent and window)
- SysTick timer
- USART/UART (10)
- I2C (4)
- SPI (5)
- SDIO
- USB 2.0 OTG FS
- DMA Controller
- CRC calculation unit
More information about STM32F413ZH can be found here:
- `STM32F413ZH on www.st.com`_
- `STM32F413/423 reference manual`_
Supported Features
==================
The Zephyr nucleo_413zh board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| USB | on-chip | usb |
+-----------+------------+-------------------------------------+
| PWM | on-chip | pwm |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported on this Zephyr port.
The default configuration can be found in
:zephyr_file:`boards/st/nucleo_f413zh/nucleo_f413zh_defconfig`
Connections and IOs
===================
Nucleo F413ZH Board has 8 GPIO controllers. These controllers are responsible for pin muxing,
input/output, pull-up, etc.
Available pins:
---------------
.. image:: img/nucleo_f413zh_zio_left.jpg
:align: center
:alt: Nucleo F413ZH ZIO connectors (left)
.. image:: img/nucleo_f413zh_zio_right.jpg
:align: center
:alt: Nucleo F413ZH ZIO connectors (right)
.. image:: img/nucleo_f413zh_morpho_left.jpg
:align: center
:alt: Nucleo F413ZH Morpho connectors (left)
.. image:: img/nucleo_f413zh_morpho_right.jpg
:align: center
:alt: Nucleo F413ZH Morpho connectors (right)
For more details please refer to `STM32 Nucleo-144 board User Manual`_.
Default Zephyr Peripheral Mapping:
----------------------------------
- UART_3 TX/RX : PD8/PD9 (ST-Link Virtual Port Com)
- UART_6 TX/RX : PG14/PG9 (Arduino Serial)
- I2C1 SCL/SDA : PB8/PB9 (Arduino I2C)
- SPI1 NSS/SCK/MISO/MOSI : PD14/PA5/PA6/PA7 (Arduino SPI)
- PWM_2_CH1 : PA0
- USB_DM : PA11
- USB_DP : PA12
- USER_PB : PC13
- LD1 : PB0
- LD2 : PB7
- LD3 : PB14
System Clock
------------
Nucleo F413ZH System Clock could be driven by internal or external oscillator,
as well as main PLL clock. By default System clock is driven by PLL clock at 96MHz,
driven by 8MHz high speed external clock.
Serial Port
-----------
Nucleo F413ZH board has 10 UARTs. The Zephyr console output is assigned to UART3.
Default settings are 115200 8N1.
USB
===
Nucleo F413ZH board has a USB OTG dual-role device (DRD) controller that
supports both device and host functions through its micro USB connector
(USB USER). Only USB device function is supported in Zephyr at the moment.
Programming and Debugging
*************************
Nucleo F413ZH board includes an ST-LINK/V2-1 embedded debug tool interface.
This interface is supported by the openocd version included in Zephyr SDK.
.. _Nucleo F413ZH website:
path_to_url
.. _STM32 Nucleo-144 board User Manual:
path_to_url
.. _STM32F413ZH on www.st.com:
path_to_url
.. _STM32F413/423 reference manual:
path_to_url
``` | /content/code_sandbox/boards/st/nucleo_f413zh/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,419 |
```unknown
/*
*
*/
/ {
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpioc 5 0>, /* A0 */
<1 0 &gpioc 4 0>, /* A1 */
<2 0 &gpioc 3 0>, /* A2 */
<3 0 &gpioc 2 0>, /* A3 */
<4 0 &gpioc 1 0>, /* A4 */
<5 0 &gpioc 0 0>, /* A5 */
<6 0 &gpioa 1 0>, /* D0 */
<7 0 &gpioa 0 0>, /* D1 */
<8 0 &gpiod 14 0>, /* D2 */
<9 0 &gpiob 0 0>, /* D3 */
<10 0 &gpioa 3 0>, /* D4 */
<11 0 &gpiob 4 0>, /* D5 */
<12 0 &gpiob 1 0>, /* D6 */
<13 0 &gpioa 4 0>, /* D7 */
<14 0 &gpiob 2 0>, /* D8 */
<15 0 &gpioa 15 0>, /* D9 */
<16 0 &gpioa 2 0>, /* D10 */
<17 0 &gpioa 7 0>, /* D11 */
<18 0 &gpioa 6 0>, /* D12 */
<19 0 &gpioa 5 0>, /* D13 */
<20 0 &gpiob 9 0>, /* D14 */
<21 0 &gpiob 8 0>; /* D15 */
};
};
arduino_i2c: &i2c1 {};
arduino_spi: &spi1 {};
arduino_serial: &uart4 {};
``` | /content/code_sandbox/boards/st/b_l4s5i_iot01a/arduino_r3_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 501 |
```ini
source [find board/stm32l4discovery.cfg]
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
``` | /content/code_sandbox/boards/st/b_l4s5i_iot01a/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 68 |
```restructuredtext
.. _b_l4s5i_iot01a_board:
ST B_L4S5I_IOT01A Discovery kit
###############################
Overview
********
The B_L4S5I_IOT01A Discovery kit features an ARM Cortex-M4 based STM32L4S5VI MCU
with a wide range of connectivity support and configurations. Here are
some highlights of the B_L4S5I_IOT01A Discovery kit:
- STM32L4S5VIT6 microcontroller featuring 2 Mbyte of Flash memory, 640 Kbytes of RAM in LQFP100 package
- On-board ST-LINK/V2-1 supporting USB re-enumeration capability
- Three different interfaces supported on USB:
- Virtual com port
- Mass storage
- Debug port
- ARDUINO Uno V3 and Pmod TM expansion connector
- 4 LEDs (2 for user, wifi, BLE)
- 2 push-buttons (user and reset)
- USB OTG FS with micro-AB connector
- Dynamic NFC tag
- 2 digital omnidirectional microphones
- Capacitive digital sensor for relative humidity and temperature
- Time-of-flight and gesture-detection sensors
- High-performance 3-axis magnetometer
- 3D accelerometer and 3D gyroscope
- 64-Mbit Quad-SPI Flash memory
- Bluetooth 4.1 module
- 802.11 b/g/n compliant WiFi module
- MCU current ammeter with 4 ranges and auto-calibration
- Flexible power supply options:
- ST-LINK/V2-1
- USB FS connector
- External 5 V
.. image:: img/b-l4s5i_iot01a.jpg
:align: center
:alt: B_L4S5I_IOT01A Discovery kit
More information about the board can be found at the `B L4S5I IOT01A Discovery kit website`_.
Hardware
********
The STM32L4S5VI SoC provides the following hardware features:
- Ultra-low-power with FlexPowerControl (down to 130 nA Standby mode and 100 uA/MHz run mode)
- Core: ARM |reg| 32-bit Cortex |reg|-M4 CPU with FPU, frequency up to 120 MHz, 100DMIPS/1.25DMIPS/MHz (Dhrystone 2.1)
- Clock Sources:
- 4 to 48 MHz crystal oscillator
- 32 kHz crystal oscillator for RTC (LSE)
- Internal 16 MHz factory-trimmed RC ( |plusminus| 1%)
- Internal low-power 32 kHz RC ( |plusminus| 5%)
- Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by
LSE (better than |plusminus| 0.25 % accuracy)
- 3 PLLs for system clock, USB, audio, ADC
- RTC with HW calendar, alarms and calibration
- Up to 21 capacitive sensing channels: support touchkey, linear and rotary touch sensors
- 16x timers:
- 2x 16-bit advanced control
- 2x 32-bit and 5x 16-bit general purpose
- 2x 16-bit basic
- 2x low-power 16-bit timers (available in Stop mode)
- 2x watchdogs
- SysTick timer
- Up to 83 fast I/Os, most 5 V-tolerant
- Memories
- Up to 2 MB Flash, 2 banks read-while-write, proprietary code readout protection
- Up to 640 KB of SRAM including 32 KB with hardware parity check
- External memory interface for static memories supporting SRAM, PSRAM, NOR and NAND memories
- Octo SPI memory interface
- 4x digital filters for sigma delta modulator
- Rich analog peripherals (independent supply)
- 1x 12-bit ADC 5 MSPS, up to 16-bit with hardware oversampling, 200 uA/MSPS
- 2x 12-bit DAC, low-power sample and hold
- 2x operational amplifiers with built-in PGA
- 2x ultra-low-power comparators
- 18x communication interfaces
- USB OTG 2.0 full-speed, LPM and BCD
- 2x SAIs (serial audio interface)
- 4x I2C FM+(1 Mbit/s), SMBus/PMBus
- 6x USARTs (ISO 7816, LIN, IrDA, modem)
- 3x SPIs (4x SPIs with the Quad SPI)
- CAN (2.0B Active) and SDMMC interface
- SDMMC I/F
- DCMI camera interface
- 14-channel DMA controller with multiplex request router
- True random number generator
- CRC calculation unit, 96-bit unique ID
- AES and HASH hardware accelerators
- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell |trade|
More information about STM32L4S5VI can be found here:
- `STM32L4S5VI on www.st.com`_
- `STM32L4S5 reference manual`_
Supported Features
==================
The Zephyr b_l4s5i_iot01a board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| PWM | on-chip | pwm |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | independent watchdog |
+-----------+------------+-------------------------------------+
| BLE | module | bluetooth |
+-----------+------------+-------------------------------------+
| WIFI | module | es-wifi |
+-----------+------------+-------------------------------------+
The default configuration can be found in the defconfig file:
:zephyr_file:`boards/st/b_l4s5i_iot01a/b_l4s5i_iot01a_defconfig`
Connections and IOs
===================
B_L4S5I_IOT01A Discovery kit has 9 GPIO controllers (from A to I). These controllers are responsible for pin muxing,
input/output, pull-up, etc.
For more details please refer to `B L47S5I IOT01A board User Manual`_.
Default Zephyr Peripheral Mapping:
----------------------------------
- UART_1 TX/RX : PB6/PB7 (ST-Link Virtual Port Com)
- UART_4 TX/RX : PA0/PA1 (Arduino Serial)
- I2C1 SCL/SDA : PB8/PB9 (Arduino I2C)
- I2C2 SCL/SDA : PB10/PB11 (Sensor I2C bus)
- SPI1 NSS/SCK/MISO/MOSI : PA2/PA5/PA6/PA7 (Arduino SPI)
- SPI3 SCK/MISO/MOSI : PC10/PC11/PC12 (BT SPI bus)
- PWM_2_CH1 : PA15
- LD1 : PA5
- LD2 : PB14
- user button : PC13
System Clock
------------
B_L4S5I_IOT01A Discovery System Clock could be driven by an internal or external oscillator,
as well as the main PLL clock. By default the System clock is driven by the PLL clock at 80MHz,
driven by 16MHz high speed internal oscillator.
Serial Port
-----------
B_L4S5I_IOT01A Discovery kit has 4 U(S)ARTs. The Zephyr console output is assigned to UART1.
Default settings are 115200 8N1.
Programming and Debugging
*************************
Flashing
========
B_L4S5I_IOT01A Discovery kit includes an ST-LINK/V2-1 embedded debug tool interface.
This interface is supported by the openocd version included in Zephyr SDK.
Flashing an application to B_L4S5I_IOT01A Discovery kit
-------------------------------------------------------
Connect the B_L4S5I_IOT01A Discovery kit to your host computer using the USB
port, then run a serial host program to connect with your Discovery
board. For example:
.. code-block:: console
$ minicom -D /dev/ttyACM0
Then, build and flash in the usual way. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: b_l4s5i_iot01a
:goals: build flash
You should see the following message on the console:
.. code-block:: console
Hello World! arm
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: b_l4s5i_iot01a
:maybe-skip-config:
:goals: debug
.. _B L4S5I IOT01A Discovery kit website:
path_to_url
.. _B L47S5I IOT01A board User Manual:
path_to_url
.. _STM32L4S5VI on www.st.com:
path_to_url
.. _STM32L4S5 reference manual:
path_to_url
``` | /content/code_sandbox/boards/st/b_l4s5i_iot01a/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,212 |
```unknown
CONFIG_SERIAL=y
# Enable MPU
CONFIG_ARM_MPU=y
# Enable HW stack protection
CONFIG_HW_STACK_PROTECTION=y
# console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# enable GPIO
CONFIG_GPIO=y
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/nucleo_f303re/nucleo_f303re_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 69 |
```cmake
board_runner_args(jlink "--device=STM32F303RE" "--speed=4000")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/st/nucleo_f303re/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 55 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/f3/stm32f303Xe.dtsi>
#include <st/f3/stm32f303r(d-e)tx-pinctrl.dtsi>
#include "arduino_r3_connector.dtsi"
#include "st_morpho_connector.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "STMicroelectronics STM32F303RE-NUCLEO board";
compatible = "st,stm32f303re-nucleo";
chosen {
zephyr,console = &usart2;
zephyr,shell-uart = &usart2;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,canbus = &can1;
};
leds: leds {
compatible = "gpio-leds";
green_led_2: led_2 {
gpios = <&gpioa 5 GPIO_ACTIVE_HIGH>;
label = "User LD2";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button {
label = "User";
gpios = <&gpioc 13 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_0>;
};
};
aliases {
led0 = &green_led_2;
sw0 = &user_button;
};
};
&clk_lsi {
status = "okay";
};
&clk_hse {
hse-bypass;
clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
status = "okay";
};
&pll {
prediv = <1>;
mul = <9>;
clocks = <&clk_hse>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(72)>;
ahb-prescaler = <1>;
apb1-prescaler = <2>;
apb2-prescaler = <1>;
adc12-prescaler = <0>;
adc34-prescaler = <0>;
};
&usart2 {
pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa3>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&usart1 {
pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>,
<&rcc STM32_SRC_LSI RTC_SEL(2)>;
status = "okay";
};
&can1 {
pinctrl-0 = <&can_rx_pb8 &can_tx_pb9>;
pinctrl-names = "default";
status = "okay";
};
&i2c1 {
pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
status = "okay";
pinctrl-names = "default";
clock-frequency = <I2C_BITRATE_STANDARD>;
};
&spi1 {
pinctrl-0 = <&spi1_mosi_pa7 &spi1_miso_pa6 &spi1_sck_pa5>;
pinctrl-names = "default";
status = "okay";
};
``` | /content/code_sandbox/boards/st/nucleo_f303re/nucleo_f303re.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 742 |
```yaml
identifier: nucleo_f303re
name: ST Nucleo F303RE
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 80
flash: 512
supported:
- arduino_gpio
- gpio
- counter
- can
- i2c
- spi
vendor: st
``` | /content/code_sandbox/boards/st/nucleo_f303re/nucleo_f303re.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 93 |
```unknown
/*
*/
#include <zephyr/dt-bindings/gpio/gpio.h>
#include <zephyr/dt-bindings/gpio/st-morpho-header.h>
/ {
st_morpho_header: st-morpho-header {
compatible = "st-morpho-header";
#gpio-cells = <2>;
gpio-map-mask = <ST_MORPHO_PIN_MASK 0x0>;
gpio-map-pass-thru = <0x0 GPIO_DT_FLAGS_MASK>;
gpio-map = <ST_MORPHO_L_1 0 &gpioc 10 0>,
<ST_MORPHO_L_2 0 &gpioc 11 0>,
<ST_MORPHO_L_3 0 &gpioc 12 0>,
<ST_MORPHO_L_4 0 &gpiod 2 0>,
<ST_MORPHO_L_13 0 &gpioa 13 0>,
<ST_MORPHO_L_15 0 &gpioa 14 0>,
<ST_MORPHO_L_17 0 &gpioa 15 0>,
<ST_MORPHO_L_21 0 &gpiob 7 0>,
<ST_MORPHO_L_23 0 &gpioc 13 0>,
<ST_MORPHO_L_25 0 &gpioc 14 0>,
<ST_MORPHO_L_27 0 &gpioc 15 0>,
<ST_MORPHO_L_28 0 &gpioa 0 0>,
<ST_MORPHO_L_29 0 &gpiof 0 0>,
<ST_MORPHO_L_30 0 &gpioa 1 0>,
<ST_MORPHO_L_31 0 &gpiof 1 0>,
<ST_MORPHO_L_32 0 &gpioa 4 0>,
<ST_MORPHO_L_34 0 &gpiob 0 0>,
<ST_MORPHO_L_35 0 &gpioc 2 0>,
<ST_MORPHO_L_36 0 &gpioc 1 0>, /* SB56=ON, SB46=OFF */
<ST_MORPHO_L_37 0 &gpioc 3 0>,
<ST_MORPHO_L_38 0 &gpioc 0 0>, /* SB51=ON, SB52=OFF */
<ST_MORPHO_R_1 0 &gpioc 9 0>,
<ST_MORPHO_R_2 0 &gpioc 8 0>,
<ST_MORPHO_R_3 0 &gpiob 8 0>,
<ST_MORPHO_R_4 0 &gpioc 6 0>,
<ST_MORPHO_R_5 0 &gpiob 9 0>,
<ST_MORPHO_R_6 0 &gpioc 5 0>,
<ST_MORPHO_R_11 0 &gpioa 5 0>,
<ST_MORPHO_R_12 0 &gpioa 12 0>,
<ST_MORPHO_R_13 0 &gpioa 6 0>,
<ST_MORPHO_R_14 0 &gpioa 11 0>,
<ST_MORPHO_R_15 0 &gpioa 7 0>,
<ST_MORPHO_R_16 0 &gpiob 12 0>,
<ST_MORPHO_R_17 0 &gpiob 6 0>,
<ST_MORPHO_R_18 0 &gpiob 11 0>,
<ST_MORPHO_R_19 0 &gpioc 7 0>,
<ST_MORPHO_R_21 0 &gpioa 9 0>,
<ST_MORPHO_R_22 0 &gpiob 2 0>,
<ST_MORPHO_R_23 0 &gpioa 8 0>,
<ST_MORPHO_R_24 0 &gpiob 1 0>,
<ST_MORPHO_R_25 0 &gpiob 10 0>,
<ST_MORPHO_R_26 0 &gpiob 15 0>,
<ST_MORPHO_R_27 0 &gpiob 4 0>,
<ST_MORPHO_R_28 0 &gpiob 14 0>,
<ST_MORPHO_R_29 0 &gpiob 5 0>,
<ST_MORPHO_R_30 0 &gpiob 13 0>,
<ST_MORPHO_R_31 0 &gpiob 3 0>,
<ST_MORPHO_R_33 0 &gpioa 10 0>,
<ST_MORPHO_R_34 0 &gpioc 4 0>,
<ST_MORPHO_R_35 0 &gpioa 2 0>,
<ST_MORPHO_R_37 0 &gpioa 3 0>;
};
};
``` | /content/code_sandbox/boards/st/nucleo_f303re/st_morpho_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,183 |
```unknown
config BOARD_NUCLEO_F303RE
select SOC_STM32F303XE
``` | /content/code_sandbox/boards/st/nucleo_f303re/Kconfig.nucleo_f303re | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 21 |
```yaml
board:
name: nucleo_f303re
vendor: st
socs:
- name: stm32f303xe
``` | /content/code_sandbox/boards/st/nucleo_f303re/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 31 |
```ini
source [find board/st_nucleo_f3.cfg]
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
``` | /content/code_sandbox/boards/st/nucleo_f303re/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 70 |
```unknown
/*
*
*/
/ {
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpioa 0 0>, /* A0 */
<1 0 &gpioa 1 0>, /* A1 */
<2 0 &gpioa 4 0>, /* A2 */
<3 0 &gpiob 0 0>, /* A3 */
<4 0 &gpioc 1 0>, /* A4 */
<5 0 &gpioc 0 0>, /* A5 */
<6 0 &gpioa 3 0>, /* D0 */
<7 0 &gpioa 2 0>, /* D1 */
<8 0 &gpioa 10 0>, /* D2 */
<9 0 &gpiob 3 0>, /* D3 */
<10 0 &gpiob 5 0>, /* D4 */
<11 0 &gpiob 4 0>, /* D5 */
<12 0 &gpiob 10 0>, /* D6 */
<13 0 &gpioa 8 0>, /* D7 */
<14 0 &gpioa 9 0>, /* D8 */
<15 0 &gpioc 7 0>, /* D9 */
<16 0 &gpiob 6 0>, /* D10 */
<17 0 &gpiob 15 0>, /* D11 */
<18 0 &gpiob 14 0>, /* D12 */
<19 0 &gpiob 13 0>, /* D13 */
<20 0 &gpiob 9 0>, /* D14 */
<21 0 &gpiob 8 0>; /* D15 */
};
};
arduino_i2c: &i2c1 {};
arduino_spi: &spi1 {};
``` | /content/code_sandbox/boards/st/nucleo_f303re/arduino_r3_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 495 |
```restructuredtext
.. _nucleo_f303re_board:
ST Nucleo F303RE
################
Overview
********
The Nucleo F303RE board features an ARM Cortex-M4 based STM32F303RE
mixed-signal MCU with FPU and DSP instructions capable of running at 72 MHz.
Here are some highlights of the Nucleo F303RE board:
- STM32 microcontroller in LQFP64 package
- LSE crystal: 32.768 kHz crystal oscillator
- Two types of extension resources:
- Arduino* Uno V3 connectors
- ST morpho extension pin headers for full access to all STM32 I/Os
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector
- Flexible board power supply:
- 5 V from ST-LINK/V2-1 USB VBUS
- External power sources: 3.3 V and 7 - 12 V on ST Zio or ST morpho
connectors, 5 V on ST morpho connector
- One user LED
- Two push-buttons: USER and RESET
.. image:: img/nucleo_f303re.jpg
:align: center
:alt: Nucleo F303RE
More information about the board can be found at the `Nucleo F303RE website`_,
and in the `STM32 Nucleo-64 board User Manual`_.
Hardware
********
The Nucleo F303RE provides the following hardware components:
- STM32F303RET6 in QFP64 package
- ARM |reg| 32-bit Cortex |reg| -M4 CPU with FPU
- 72 MHz max CPU frequency
- VDD from 2.0 V to 3.6 V
- 512 KB Flash
- 64 + 16 KB SRAM
- RTC
- Advanced-control Timer
- General Purpose Timers (4)
- Basic Timer
- Watchdog Timers (2)
- PWM channels (18)
- SPI/I2S (2)
- I2C (3)
- USART/UART (3/3)
- USB 2.0 FS with on-chip PHY
- CAN (2)
- GPIO with external interrupt capability
- DMA channels (12)
- Capacitive sensing channels (18)
- 12-bit ADC with 40 channels (4)
- 12-bit D/A converter with two channels
- Analog comparator (7)
- Op amp (4)
- Capacitive sensing 24 channels
More information about the STM32F303RE can be found here:
- `STM32F303RE on www.st.com`_
- `STM32F303RE reference manual`_
- `STM32F303RE datasheet`_
Supported Features
==================
The Zephyr nucleo_f303re board configuration supports the following hardware
features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| RTC | on-chip | rtc |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported on this Zephyr port.
The default configuration can be found in
:zephyr_file:`boards/st/nucleo_f303re/nucleo_f303re_defconfig`
Connections and IOs
===================
The Nucleo F303RE Board has 5 GPIO controllers. These controllers are
responsible for pin muxing, input/output, pull-up, etc.
Board connectors:
-----------------
.. image:: img/nucleo_connectors.jpg
:align: center
:alt: Nucleo F303RE connectors
Default Zephyr Peripheral Mapping:
----------------------------------
The Nucleo F303RE board features an Arduino Uno V3 connector and a ST
morpho connector. Board is configured as follows:
- UART_2 TX/RX : PA2/PA3 (ST-Link Virtual Port Com)
- USER_PB : PC13
- LD2 : PA5
System Clock
------------
The Nucleo F303RE System Clock can be driven by an internal or
external oscillator, as well as by the main PLL clock. By default the
System Clock is driven by the PLL clock at 72 MHz. The input to the
PLL is an 8 MHz external clock supplied by the processor of the
on-board ST-LINK/V2-1 debugger/programmer.
Serial Port
-----------
The Nucleo F303RE board has 2 UARTs. The Zephyr console output is assigned
to UART2. Default settings are 115200 8N1.
Programming and Debugging
*************************
The Nucleo F303RE board includes an ST-LINK/V2-1 embedded debug tool interface.
This interface is supported by the openocd version included in Zephyr SDK.
.. _Nucleo F303RE website:
path_to_url
.. _STM32 Nucleo-64 board User Manual:
path_to_url
.. _STM32F303RE on www.st.com:
path_to_url
.. _STM32F303RE reference manual:
path_to_url
.. _STM32F303RE datasheet:
path_to_url
``` | /content/code_sandbox/boards/st/nucleo_f303re/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,242 |
```unknown
# enable uart driver
CONFIG_SERIAL=y
# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# enable GPIO
CONFIG_GPIO=y
# enable clock
CONFIG_CLOCK_CONTROL=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/nucleo_f103rb/nucleo_f103rb_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 51 |
```cmake
board_runner_args(jlink "--device=STM32F103RB" "--speed=4000")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/st/nucleo_f103rb/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 55 |
```unknown
/*
*/
#include <zephyr/dt-bindings/gpio/gpio.h>
#include <zephyr/dt-bindings/gpio/st-morpho-header.h>
/ {
st_morpho_header: st-morpho-header {
compatible = "st-morpho-header";
#gpio-cells = <2>;
gpio-map-mask = <ST_MORPHO_PIN_MASK 0x0>;
gpio-map-pass-thru = <0x0 GPIO_DT_FLAGS_MASK>;
gpio-map = <ST_MORPHO_L_1 0 &gpioc 10 0>,
<ST_MORPHO_L_2 0 &gpioc 11 0>,
<ST_MORPHO_L_3 0 &gpioc 12 0>,
<ST_MORPHO_L_4 0 &gpiod 2 0>,
<ST_MORPHO_L_13 0 &gpioa 13 0>,
<ST_MORPHO_L_15 0 &gpioa 14 0>,
<ST_MORPHO_L_17 0 &gpioa 15 0>,
<ST_MORPHO_L_21 0 &gpiob 7 0>,
<ST_MORPHO_L_23 0 &gpioc 13 0>,
<ST_MORPHO_L_25 0 &gpioc 14 0>,
<ST_MORPHO_L_27 0 &gpioc 15 0>,
<ST_MORPHO_L_28 0 &gpioa 0 0>,
<ST_MORPHO_L_29 0 &gpiod 0 0>,
<ST_MORPHO_L_30 0 &gpioa 1 0>,
<ST_MORPHO_L_31 0 &gpiod 1 0>,
<ST_MORPHO_L_32 0 &gpioa 4 0>,
<ST_MORPHO_L_34 0 &gpiob 0 0>,
<ST_MORPHO_L_35 0 &gpioc 2 0>,
<ST_MORPHO_L_36 0 &gpioc 1 0>, /* SB56=ON, SB46=OFF */
<ST_MORPHO_L_37 0 &gpioc 3 0>,
<ST_MORPHO_L_38 0 &gpioc 0 0>, /* SB51=ON, SB52=OFF */
<ST_MORPHO_R_1 0 &gpioc 9 0>,
<ST_MORPHO_R_2 0 &gpioc 8 0>,
<ST_MORPHO_R_3 0 &gpiob 8 0>,
<ST_MORPHO_R_4 0 &gpioc 6 0>,
<ST_MORPHO_R_5 0 &gpiob 9 0>,
<ST_MORPHO_R_6 0 &gpioc 5 0>,
<ST_MORPHO_R_11 0 &gpioa 5 0>,
<ST_MORPHO_R_12 0 &gpioa 12 0>,
<ST_MORPHO_R_13 0 &gpioa 6 0>,
<ST_MORPHO_R_14 0 &gpioa 11 0>,
<ST_MORPHO_R_15 0 &gpioa 7 0>,
<ST_MORPHO_R_16 0 &gpiob 12 0>,
<ST_MORPHO_R_17 0 &gpiob 6 0>,
<ST_MORPHO_R_18 0 &gpiob 11 0>,
<ST_MORPHO_R_19 0 &gpioc 7 0>,
<ST_MORPHO_R_21 0 &gpioa 9 0>,
<ST_MORPHO_R_22 0 &gpiob 2 0>,
<ST_MORPHO_R_23 0 &gpioa 8 0>,
<ST_MORPHO_R_24 0 &gpiob 1 0>,
<ST_MORPHO_R_25 0 &gpiob 10 0>,
<ST_MORPHO_R_26 0 &gpiob 15 0>,
<ST_MORPHO_R_27 0 &gpiob 4 0>,
<ST_MORPHO_R_28 0 &gpiob 14 0>,
<ST_MORPHO_R_29 0 &gpiob 5 0>,
<ST_MORPHO_R_30 0 &gpiob 13 0>,
<ST_MORPHO_R_31 0 &gpiob 3 0>,
<ST_MORPHO_R_33 0 &gpioa 10 0>,
<ST_MORPHO_R_34 0 &gpioc 4 0>,
<ST_MORPHO_R_35 0 &gpioa 2 0>,
<ST_MORPHO_R_37 0 &gpioa 3 0>;
};
};
``` | /content/code_sandbox/boards/st/nucleo_f103rb/st_morpho_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,185 |
```unknown
config BOARD_NUCLEO_F103RB
select SOC_STM32F103XB
``` | /content/code_sandbox/boards/st/nucleo_f103rb/Kconfig.nucleo_f103rb | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 21 |
```yaml
board:
name: nucleo_f103rb
vendor: st
socs:
- name: stm32f103xb
``` | /content/code_sandbox/boards/st/nucleo_f103rb/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 31 |
```yaml
identifier: nucleo_f103rb
name: ST Nucleo F103RB
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 20
flash: 128
supported:
- arduino_gpio
- arduino_spi
- arduino_i2c
- gpio
- spi
- pwm
- watchdog
- adc
- dma
- nvs
- counter
vendor: st
``` | /content/code_sandbox/boards/st/nucleo_f103rb/nucleo_f103rb.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 118 |
```unknown
/*
*
*/
/ {
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpioa 0 0>, /* A0 */
<1 0 &gpioa 1 0>, /* A1 */
<2 0 &gpioa 4 0>, /* A2 */
<3 0 &gpiob 0 0>, /* A3 */
<4 0 &gpioc 1 0>, /* A4 */
<5 0 &gpioc 0 0>, /* A5 */
<6 0 &gpioa 3 0>, /* D0 */
<7 0 &gpioa 2 0>, /* D1 */
<8 0 &gpioa 10 0>, /* D2 */
<9 0 &gpiob 3 0>, /* D3 */
<10 0 &gpiob 5 0>, /* D4 */
<11 0 &gpiob 4 0>, /* D5 */
<12 0 &gpiob 10 0>, /* D6 */
<13 0 &gpioa 8 0>, /* D7 */
<14 0 &gpioa 9 0>, /* D8 */
<15 0 &gpioc 7 0>, /* D9 */
<16 0 &gpiob 6 0>, /* D10 */
<17 0 &gpioa 7 0>, /* D11 */
<18 0 &gpioa 6 0>, /* D12 */
<19 0 &gpioa 5 0>, /* D13 */
<20 0 &gpiob 9 0>, /* D14 */
<21 0 &gpiob 8 0>; /* D15 */
};
};
arduino_spi: &spi1 {};
arduino_i2c: &i2c1 {};
``` | /content/code_sandbox/boards/st/nucleo_f103rb/arduino_r3_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 492 |
```ini
source [find board/st_nucleo_f103rb.cfg]
reset_config connect_assert_srst
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
rename init old_init
proc init {} {
old_init
reset halt
}
``` | /content/code_sandbox/boards/st/nucleo_f103rb/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 96 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/f1/stm32f103Xb.dtsi>
#include <st/f1/stm32f103r(8-b)tx-pinctrl.dtsi>
#include "arduino_r3_connector.dtsi"
#include "st_morpho_connector.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "STMicroelectronics STM32F103RB-NUCLEO board";
compatible = "st,stm32f103rb-nucleo";
chosen {
zephyr,console = &usart2;
zephyr,shell-uart = &usart2;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
};
leds: leds {
compatible = "gpio-leds";
green_led_2: led_2 {
gpios = <&gpioa 5 GPIO_ACTIVE_HIGH>;
label = "User LD2";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button {
label = "User";
gpios = <&gpioc 13 GPIO_ACTIVE_LOW>;
zephyr,code = <INPUT_KEY_0>;
};
};
aliases {
led0 = &green_led_2;
sw0 = &user_button;
watchdog0 = &iwdg;
die-temp0 = &die_temp;
};
};
&clk_lsi {
status = "okay";
};
&clk_hse {
hse-bypass;
clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
status = "okay";
};
&pll {
mul = <9>;
clocks = <&clk_hse>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(72)>;
ahb-prescaler = <1>;
apb1-prescaler = <2>;
apb2-prescaler = <1>;
adc-prescaler = <2>;
};
&usart1 {
pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&usart2 {
pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa3>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&usart3 {
pinctrl-0 = <&usart3_tx_pb10 &usart3_rx_pb11>;
pinctrl-names = "default";
current-speed = <115200>;
};
&i2c1 {
pinctrl-0 = <&i2c1_scl_remap1_pb8 &i2c1_sda_remap1_pb9>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
&spi1 {
pinctrl-0 = <&spi1_sck_master_pa5 &spi1_miso_master_pa6 &spi1_mosi_master_pa7>;
pinctrl-names = "default";
cs-gpios = <&gpiob 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
status = "okay";
};
&spi2 {
pinctrl-0 = <&spi2_nss_master_pb12 &spi2_sck_master_pb13
&spi2_miso_master_pb14 &spi2_mosi_master_pb15>;
pinctrl-names = "default";
status = "okay";
};
&timers1 {
st,prescaler = <10000>;
status = "okay";
pwm1: pwm {
status = "okay";
pinctrl-0 = <&tim1_ch1_pwm_out_pa8>;
pinctrl-names = "default";
};
};
&timers2 {
st,prescaler = <255>;
status = "okay";
pwm2: pwm {
status = "okay";
pinctrl-0 = <&tim2_ch2_pwm_in_pa1>;
pinctrl-names = "default";
};
};
&iwdg {
status = "okay";
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>,
<&rcc STM32_SRC_LSI RTC_SEL(2)>;
status = "okay";
};
&adc1 {
pinctrl-0 = <&adc1_in0_pa0>;
pinctrl-names = "default";
status = "okay";
};
&die_temp {
status = "okay";
};
&dma1 {
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* Set 2KB of storage at the end of 128KB flash */
storage_partition: partition@1f800 {
label = "storage";
reg = <0x0001f800 DT_SIZE_K(2)>;
};
};
};
``` | /content/code_sandbox/boards/st/nucleo_f103rb/nucleo_f103rb.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,111 |
```cmake
board_runner_args(jlink "--device=STM32F042K6" "--speed=4000")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/st/nucleo_f042k6/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 56 |
```unknown
config BOARD_NUCLEO_F042K6
select SOC_STM32F042X6
``` | /content/code_sandbox/boards/st/nucleo_f042k6/Kconfig.nucleo_f042k6 | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 23 |
```unknown
# Serial Drivers
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# GPIO Controller
CONFIG_GPIO=y
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/nucleo_f042k6/nucleo_f042k6_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 58 |
```yaml
board:
name: nucleo_f042k6
vendor: st
socs:
- name: stm32f042x6
``` | /content/code_sandbox/boards/st/nucleo_f042k6/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 33 |
```yaml
identifier: nucleo_f042k6
name: ST Nucleo F042K6
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 6
flash: 32
supported:
- i2c
- spi
- gpio
- adc
- usbd
testing:
ignore_tags:
- net
- bluetooth
``` | /content/code_sandbox/boards/st/nucleo_f042k6/nucleo_f042k6.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 100 |
```restructuredtext
.. _nucleo_f103rb_board:
ST Nucleo F103RB
################
Overview
********
The STM32 Nucleo-64 development board with STM32F103RB MCU, supports Arduino and ST morpho connectivity.
The STM32 Nucleo board provides an affordable, and flexible way for users to try out new concepts,
and build prototypes with the STM32 microcontroller, choosing from the various
combinations of performance, power consumption, and features.
The Arduino* Uno V3 connectivity support and the ST morpho headers allow easy functionality
expansion of the STM32 Nucleo open development platform with a wide choice of
specialized shields.
The STM32 Nucleo board integrates the ST-LINK/V2-1 debugger and programmer.
The STM32 Nucleo board comes with the STM32 comprehensive software HAL library together
with various packaged software examples.
.. image:: img/nucleo_f103rb.jpg
:align: center
:alt: Nucleo F103RB
More information about the board can be found at the `Nucleo F103RB website`_.
Hardware
********
Nucleo F103RB provides the following hardware components:
- STM32 microcontroller in QFP64 package
- Two types of extension resources:
- Arduino* Uno V3 connectivity
- ST morpho extension pin headers for full access to all STM32 I/Os
- ARM* mbed*
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector:
- Selection-mode switch to use the kit as a standalone ST-LINK/V2-1
- Flexible board power supply:
- USB VBUS or external source (3.3V, 5V, 7 - 12V)
- Power management access point
- Three LEDs:
- USB communication (LD1), user LED (LD2), power LED (LD3)
- Two push-buttons: USER and RESET
- USB re-enumeration capability. Three different interfaces supported on USB:
- Virtual COM port
- Mass storage
- Debug port
- Support of wide choice of Integrated Development Environments (IDEs) including:
- IAR
- ARM Keil
- GCC-based IDEs
More information about STM32F103RB can be found here:
- `STM32F103 reference manual`_
- `STM32F103 data sheet`_
Supported Features
==================
The Zephyr nucleo_f103rb board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| CLOCK | on-chip | reset and clock control |
+-----------+------------+-------------------------------------+
| FLASH | on-chip | flash memory |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | independent watchdog |
+-----------+------------+-------------------------------------+
| ADC | on-chip | ADC Controller |
+-----------+------------+-------------------------------------+
| DMA | on-chip | Direct Memory Access |
+-----------+------------+-------------------------------------+
| die-temp | on-chip | die temperature sensor |
+-----------+------------+-------------------------------------+
| COUNTER | on-chip | rtc |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported in this Zephyr port.
The default configuration can be found in
:zephyr_file:`boards/st/nucleo_f103rb/nucleo_f103rb_defconfig`
Connections and IOs
===================
Each of the GPIO pins can be configured by software as output (push-pull or open-drain), as
input (with or without pull-up or pull-down), or as peripheral alternate function. Most of the
GPIO pins are shared with digital or analog alternate functions. All GPIOs are high current
capable except for analog inputs.
Board connectors:
-----------------
.. image:: img/nucleo_f103rb_connectors.jpg
:align: center
:alt: Nucleo F103RB connectors
Default Zephyr Peripheral Mapping:
----------------------------------
- UART_1 TX/RX : PA9/PA10
- UART_2 TX/RX : PA2/PA3 (ST-Link Virtual COM Port)
- SPI1 NSS/SCK/MISO/MOSI : PB6/PA5/PA6/PA7 (Arduino SPI)
- SPI2 SCK/MISO/MOSI : PB12/PB13/PB14/PB15
- I2C1 SDA/SCL: PB9/PB8 (Arduino I2C)
- PWM1_CH1: PA8
- USER_PB : PC13
- LD1 : PA5
For more details please refer to `STM32 Nucleo-64 board User Manual`_.
Programming and Debugging
*************************
Applications for the ``nucleo_f103rb`` board configuration can be built and
flashed in the usual way (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Flashing
========
Nucleo F103RB board includes an ST-LINK/V2-1 embedded debug tool interface.
This interface is supported by the openocd version included in the Zephyr SDK.
Flashing an application to Nucleo F103RB
----------------------------------------
Here is an example for the :zephyr:code-sample:`blinky` application.
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: nucleo_f103rb
:goals: build flash
You will see the LED blinking every second.
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:zephyr:code-sample:`blinky` application.
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: nucleo_f103rb
:maybe-skip-config:
:goals: debug
References
**********
.. target-notes::
.. _Nucleo F103RB website:
path_to_url
.. _STM32F103 reference manual:
path_to_url
.. _STM32F103 data sheet:
path_to_url
.. _STM32 Nucleo-64 board User Manual:
path_to_url
``` | /content/code_sandbox/boards/st/nucleo_f103rb/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,452 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/f0/stm32f042X6.dtsi>
#include <st/f0/stm32f042k(4-6)tx-pinctrl.dtsi>
/ {
model = "STMicroelectronics STM32F042K6-NUCLEO board";
compatible = "st,stm32f042k6-nucleo";
chosen {
zephyr,console = &usart2;
zephyr,shell-uart = &usart2;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
};
leds: leds {
compatible = "gpio-leds";
green_led_3: led_3 {
gpios = <&gpiob 3 GPIO_ACTIVE_HIGH>;
label = "User LD3";
};
};
pwmleds {
compatible = "pwm-leds";
green_pwm_led: green_pwm_led {
pwms = <&pwm3 3 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
};
};
aliases {
led0 = &green_led_3;
pwm-led0 = &green_pwm_led;
volt-sensor0 = &vref;
volt-sensor1 = &vbat;
};
};
&clk_lsi {
status = "okay";
};
&clk_hsi {
status = "okay";
};
&pll {
prediv = <1>;
mul = <6>;
clocks = <&clk_hsi>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(48)>;
ahb-prescaler = <1>;
apb1-prescaler = <1>;
};
&timers3 {
status = "okay";
st,prescaler = <10000>;
pwm3: pwm {
status = "okay";
pinctrl-0 = <&tim3_ch3_pb0>;
pinctrl-names = "default";
};
};
&usart2 {
pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa15>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&i2c1 {
pinctrl-0 = <&i2c1_scl_pb6 &i2c1_sda_pb7>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
&spi1 {
pinctrl-0 = <&spi1_sck_pb3 &spi1_miso_pb4 &spi1_mosi_pb5>;
pinctrl-names = "default";
cs-gpios = <&gpioa 11 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
status = "okay";
};
&adc1 {
pinctrl-0 = <&adc_in0_pa0>;
pinctrl-names = "default";
st,adc-clock-source = <SYNC>;
st,adc-prescaler = <4>;
status = "okay";
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>,
<&rcc STM32_SRC_LSI RTC_SEL(2)>;
status = "okay";
};
&vref {
status = "okay";
};
&vbat {
status = "okay";
};
zephyr_udc0: &usb {
pinctrl-0 = <&usb_dm_pa11 &usb_dp_pa12>;
pinctrl-names = "default";
status = "okay";
};
``` | /content/code_sandbox/boards/st/nucleo_f042k6/nucleo_f042k6.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 776 |
```ini
source [find board/st_nucleo_f0.cfg]
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
``` | /content/code_sandbox/boards/st/nucleo_f042k6/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 70 |
```restructuredtext
.. _nucleo_f042k6_board:
ST Nucleo F042K6
################
Overview
********
The STM32 Nucleo-32 development board with STM32F042K6 MCU, supports Arduino nano connectivity.
The STM32 Nucleo board provides an affordable, and flexible way for users to try out new concepts,
and build prototypes with the STM32 microcontroller, choosing from the various
combinations of performance, power consumption and features.
The STM32 Nucleo board integrates the ST-LINK/V2-1 debugger and programmer.
The STM32 Nucleo board comes with the STM32 comprehensive software HAL library together
with various packaged software examples.
.. image:: img/nucleo_f042k6.jpg
:align: center
:alt: Nucleo F042k6
More information about the board can be found at the `Nucleo F042K6 website`_.
Hardware
********
Nucleo F042K6 provides the following hardware components:
- STM32 microcontroller in LQFP32 package
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector:
- Flexible board power supply:
- USB VBUS or external source (3.3V, 5V, 7 - 12V)
- Three LEDs:
- USB communication (LD1), user LED (LD2), power LED (LD3)
- reset push button
More information about STM32F042K6 can be found here:
- `STM32F042 reference manual`_
- `STM32F042 data sheet`_
Supported Features
==================
The Zephyr nucleo_f042k6 board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| CLOCK | on-chip | reset and clock control |
+-----------+------------+-------------------------------------+
| FLASH | on-chip | flash memory |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c controller |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi controller |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported in this Zephyr port.
The default configuration can be found in
:zephyr_file:`boards/st/nucleo_f042k6/nucleo_f042k6_defconfig`
Connections and IOs
===================
Each of the GPIO pins can be configured by software as output (push-pull or open-drain), as
input (with or without pull-up or pull-down), or as peripheral alternate function. Most of the
GPIO pins are shared with digital or analog alternate functions.
Board connectors:
-----------------
.. image:: img/nucleo_f042k6_connectors.jpg
:align: center
:alt: Nucleo F042K6 connectors
Default Zephyr Peripheral Mapping:
----------------------------------
- UART_1 TX/RX : PA2/PA15 (ST-Link Virtual COM Port)
- I2C1 SCL/SDA : PB6/PB7 (Arduino I2C)
- SPI1 NSS/SCK/MISO/MOSI : PA4/PA5/PA6/PA7 (Arduino SPI)
- LD2 : PB3
For more details please refer to `STM32 Nucleo-32 board User Manual`_.
Programming and Debugging
*************************
Applications for the ``nucleo_f042k6`` board configuration can be built and
flashed in the usual way (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Flashing
========
Nucleo F042K6 board includes an ST-LINK/V2-1 embedded debug tool interface.
This interface is supported by the openocd version included in the Zephyr SDK.
Flashing an application to Nucleo F042K6
----------------------------------------
Here is an example for the :zephyr:code-sample:`blinky` application.
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: nucleo_f042k6
:goals: build flash
You will see the LED blinking every second.
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:zephyr:code-sample:`blinky` application.
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: nucleo_f042k6
:maybe-skip-config:
:goals: debug
References
**********
.. target-notes::
.. _Nucleo F042K6 website:
path_to_url
.. _STM32F042 reference manual:
path_to_url
.. _STM32F042 data sheet:
path_to_url
.. _STM32 Nucleo-32 board User Manual:
path_to_url
``` | /content/code_sandbox/boards/st/nucleo_f042k6/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,162 |
```cmake
board_runner_args(pyocd "--target=stm32g431rbtx")
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
``` | /content/code_sandbox/boards/st/nucleo_g431rb/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 51 |
```unknown
/*
*/
#include <zephyr/dt-bindings/gpio/gpio.h>
#include <zephyr/dt-bindings/gpio/st-morpho-header.h>
/ {
st_morpho_header: st-morpho-header {
compatible = "st-morpho-header";
#gpio-cells = <2>;
gpio-map-mask = <ST_MORPHO_PIN_MASK 0x0>;
gpio-map-pass-thru = <0x0 GPIO_DT_FLAGS_MASK>;
gpio-map = <ST_MORPHO_L_1 0 &gpioc 10 0>,
<ST_MORPHO_L_2 0 &gpioc 11 0>,
<ST_MORPHO_L_3 0 &gpioc 12 0>,
<ST_MORPHO_L_4 0 &gpiod 2 0>,
<ST_MORPHO_L_13 0 &gpioa 13 0>,
<ST_MORPHO_L_15 0 &gpioa 14 0>,
<ST_MORPHO_L_17 0 &gpioa 15 0>,
<ST_MORPHO_L_21 0 &gpiob 7 0>,
<ST_MORPHO_L_23 0 &gpioc 13 0>,
<ST_MORPHO_L_25 0 &gpioc 14 0>,
<ST_MORPHO_L_27 0 &gpioc 15 0>,
<ST_MORPHO_L_28 0 &gpioa 0 0>,
<ST_MORPHO_L_29 0 &gpiof 0 0>,
<ST_MORPHO_L_30 0 &gpioa 1 0>,
<ST_MORPHO_L_31 0 &gpiof 1 0>,
<ST_MORPHO_L_32 0 &gpioa 4 0>,
<ST_MORPHO_L_34 0 &gpiob 0 0>,
<ST_MORPHO_L_35 0 &gpioc 2 0>,
<ST_MORPHO_L_36 0 &gpioc 1 0>, /* SB56=ON, SB46=OFF */
<ST_MORPHO_L_37 0 &gpioc 3 0>,
<ST_MORPHO_L_38 0 &gpioc 0 0>, /* SB51=ON, SB52=OFF */
<ST_MORPHO_R_1 0 &gpioc 9 0>,
<ST_MORPHO_R_2 0 &gpioc 8 0>,
<ST_MORPHO_R_3 0 &gpiob 8 0>,
<ST_MORPHO_R_4 0 &gpioc 6 0>,
<ST_MORPHO_R_5 0 &gpiob 9 0>,
<ST_MORPHO_R_6 0 &gpioc 5 0>,
<ST_MORPHO_R_11 0 &gpiob 13 0>,
<ST_MORPHO_R_12 0 &gpioa 12 0>,
<ST_MORPHO_R_13 0 &gpiob 14 0>,
<ST_MORPHO_R_14 0 &gpioa 11 0>,
<ST_MORPHO_R_15 0 &gpiob 15 0>,
<ST_MORPHO_R_16 0 &gpiob 12 0>,
<ST_MORPHO_R_17 0 &gpiob 6 0>,
<ST_MORPHO_R_18 0 &gpiob 11 0>,
<ST_MORPHO_R_19 0 &gpioc 7 0>,
<ST_MORPHO_R_21 0 &gpioa 9 0>,
<ST_MORPHO_R_22 0 &gpiob 2 0>,
<ST_MORPHO_R_23 0 &gpioa 8 0>,
<ST_MORPHO_R_24 0 &gpiob 1 0>,
<ST_MORPHO_R_25 0 &gpiob 10 0>,
<ST_MORPHO_R_26 0 &gpioa 7 0>,
<ST_MORPHO_R_27 0 &gpiob 4 0>,
<ST_MORPHO_R_28 0 &gpioa 6 0>,
<ST_MORPHO_R_29 0 &gpiob 5 0>,
<ST_MORPHO_R_30 0 &gpioa 5 0>,
<ST_MORPHO_R_31 0 &gpiob 3 0>,
<ST_MORPHO_R_33 0 &gpioa 10 0>,
<ST_MORPHO_R_34 0 &gpioc 4 0>,
<ST_MORPHO_R_35 0 &gpioa 2 0>,
<ST_MORPHO_R_37 0 &gpioa 3 0>;
};
};
``` | /content/code_sandbox/boards/st/nucleo_g431rb/st_morpho_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,183 |
```unknown
config BOARD_NUCLEO_G431RB
select SOC_STM32G431XX
``` | /content/code_sandbox/boards/st/nucleo_g431rb/Kconfig.nucleo_g431rb | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 21 |
```unknown
/*
*
*/
/dts-v1/;
#include <st/g4/stm32g431Xb.dtsi>
#include <st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi>
#include "arduino_r3_connector.dtsi"
#include "st_morpho_connector.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "STMicroelectronics STM32G431RB-NUCLEO board";
compatible = "st,stm32g431rb-nucleo";
chosen {
zephyr,console = &lpuart1;
zephyr,shell-uart = &lpuart1;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
};
leds: leds {
compatible = "gpio-leds";
green_led: led_0 {
gpios = <&gpioa 5 GPIO_ACTIVE_HIGH>;
label = "User LD2";
};
};
pwmleds {
compatible = "pwm-leds";
green_pwm_led: green_pwm_led {
pwms = <&pwm2 1 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button {
label = "User";
gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>;
zephyr,code = <INPUT_KEY_0>;
};
};
aliases {
led0 = &green_led;
mcuboot-led0 = &green_led;
pwm-led0 = &green_pwm_led;
sw0 = &user_button;
watchdog0 = &iwdg;
};
};
&clk_lsi {
status = "okay";
};
&clk_lse {
status = "okay";
};
&clk_hsi48 {
status = "okay";
};
&clk_hse {
clock-frequency = <DT_FREQ_M(24)>;
status = "okay";
};
&pll {
div-m = <6>;
mul-n = <85>;
div-p = <7>;
div-q = <2>;
div-r = <2>;
clocks = <&clk_hse>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(170)>;
ahb-prescaler = <1>;
apb1-prescaler = <1>;
apb2-prescaler = <1>;
};
&rng {
clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x04000000>,
<&rcc STM32_SRC_HSI48 CLK48_SEL(0)>;
status = "okay";
};
&usart1 {
pinctrl-0 = <&usart1_tx_pc4 &usart1_rx_pc5>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&lpuart1 {
pinctrl-0 = <&lpuart1_tx_pa2 &lpuart1_rx_pa3>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&i2c1 {
pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
pinctrl-names = "default";
status = "okay";
};
&spi1 {
pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pa7>;
pinctrl-names = "default";
cs-gpios = <&gpiob 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
status = "okay";
};
&spi2 {
pinctrl-0 = <&spi2_nss_pb12 &spi2_sck_pb13
&spi2_miso_pb14 &spi2_mosi_pb15>;
pinctrl-names = "default";
status = "okay";
};
&spi3 {
/* SPI3 on the ST Morpho Connector CN7 pins 17, 1, 2, 3*/
pinctrl-0 = <&spi3_nss_pa15 &spi3_sck_pc10
&spi3_miso_pc11 &spi3_mosi_pc12>;
pinctrl-names = "default";
status = "okay";
};
&timers2 {
status = "okay";
pwm2: pwm {
status = "okay";
pinctrl-0 = <&tim2_ch1_pa5>;
pinctrl-names = "default";
};
};
stm32_lp_tick_source: &lptim1 {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>,
<&rcc STM32_SRC_LSE LPTIM1_SEL(3)>;
status = "okay";
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000400>,
<&rcc STM32_SRC_LSI RTC_SEL(2)>;
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 DT_SIZE_K(34)>;
};
slot0_partition: partition@8800 {
label = "image-0";
reg = <0x00008800 DT_SIZE_K(48)>;
};
slot1_partition: partition@14800 {
label = "image-1";
reg = <0x00014800 DT_SIZE_K(42)>;
};
/* Set 4Kb of storage at the end of the 128Kb of flash */
storage_partition: partition@1f000 {
label = "storage";
reg = <0x0001f000 DT_SIZE_K(4)>;
};
};
};
&iwdg {
status = "okay";
};
&dac1 {
status = "okay";
pinctrl-0 = <&dac1_out1_pa4>;
pinctrl-names = "default";
};
``` | /content/code_sandbox/boards/st/nucleo_g431rb/nucleo_g431rb.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,362 |
```unknown
# enable uart driver
CONFIG_SERIAL=y
# enable GPIO
CONFIG_GPIO=y
# enable clocks
CONFIG_CLOCK_CONTROL=y
# Console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# Enable MPU
CONFIG_ARM_MPU=y
# Enable HW stack protection
CONFIG_HW_STACK_PROTECTION=y
# enable pin controller
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/st/nucleo_g431rb/nucleo_g431rb_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 73 |
```yaml
board:
name: nucleo_g431rb
vendor: st
socs:
- name: stm32g431xx
``` | /content/code_sandbox/boards/st/nucleo_g431rb/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 31 |
```unknown
# STM32G431RB Nucleo board configuration
if BOARD_NUCLEO_G431RB
config SPI_STM32_INTERRUPT
default y
depends on SPI
endif # BOARD_NUCLEO_G431RB
``` | /content/code_sandbox/boards/st/nucleo_g431rb/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 49 |
```yaml
identifier: nucleo_g431rb
name: ST Nucleo G431RB
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 32
flash: 128
supported:
- arduino_gpio
- arduino_i2c
- arduino_spi
- nvs
- pwm
- i2c
- gpio
- usb device
- counter
- spi
- rng
- dac
- watchdog
vendor: st
``` | /content/code_sandbox/boards/st/nucleo_g431rb/nucleo_g431rb.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 129 |
```ini
source [find interface/stlink.cfg]
transport select hla_swd
source [find target/stm32g4x.cfg]
reset_config srst_only
``` | /content/code_sandbox/boards/st/nucleo_g431rb/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 34 |
```unknown
/*
*
*/
/ {
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpioa 0 0>, /* A0 */
<1 0 &gpioa 1 0>, /* A1 */
<2 0 &gpioa 4 0>, /* A2 */
<3 0 &gpiob 0 0>, /* A3 */
<4 0 &gpioc 1 0>, /* A4 */
<5 0 &gpioc 0 0>, /* A5 */
<6 0 &gpioc 5 0>, /* D0 */
<7 0 &gpioc 4 0>, /* D1 */
<8 0 &gpioa 10 0>, /* D2 */
<9 0 &gpiob 3 0>, /* D3 */
<10 0 &gpiob 5 0>, /* D4 */
<11 0 &gpiob 4 0>, /* D5 */
<12 0 &gpiob 10 0>, /* D6 */
<13 0 &gpioa 8 0>, /* D7 */
<14 0 &gpioa 9 0>, /* D8 */
<15 0 &gpioc 7 0>, /* D9 */
<16 0 &gpiob 6 0>, /* D10 */
<17 0 &gpioa 7 0>, /* D11 */
<18 0 &gpioa 6 0>, /* D12 */
<19 0 &gpioa 5 0>, /* D13 */
<20 0 &gpiob 9 0>, /* D14 */
<21 0 &gpiob 8 0>; /* D15 */
};
};
arduino_i2c: &i2c1 {};
arduino_spi: &spi1 {};
arduino_serial: &usart1 {};
``` | /content/code_sandbox/boards/st/nucleo_g431rb/arduino_r3_connector.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 502 |
```cmake
board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
board_runner_args(openocd "--tcl-port=6666")
board_runner_args(openocd --cmd-pre-init "gdb_report_data_abort enable")
board_runner_args(openocd "--no-halt")
board_runner_args(pyocd "--target=stm32u575zitx")
board_runner_args(jlink "--device=STM32U575ZI" "--reset-after-load")
include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake)
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/st/nucleo_u575zi_q/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 199 |
```restructuredtext
.. _nucleo_g431rb_board:
ST Nucleo G431RB
################
Overview
********
The Nucleo G431RB board features an ARM Cortex-M4 based STM32G431RB MCU
with a wide range of connectivity support and configurations. Here are
some highlights of the Nucleo G431RB board:
- STM32 microcontroller in LQFP64 package
- Arduino Uno V3 connectivity
- On-board ST-LINK/V3E debugger/programmer with SWD connector
- Flexible board power supply:
- USB VBUS or external source(3.3V, 5V, 7 - 12V)
- Power management access point
- Three LEDs: USB communication (LD1), power LED (LD3), user LED (LD2)
- Two push-buttons: RESET and USER
.. image:: img/nucleo_g431rb.jpg
:align: center
:alt: Nucleo G431RB
More information about the board can be found at the `Nucleo G431RB website`_.
Hardware
********
The STM32G431RB SoC provides the following hardware IPs:
- Ultra-low-power with FlexPowerControl (down to 28 nA Standby mode and 84
|micro| A/MHz run mode)
- Core: ARM |reg| 32-bit Cortex |reg| -M4 CPU with FPU, frequency up to 170 MHz
- Clock Sources:
- 4 to 48 MHz crystal oscillator (HSE)
- 32 kHz crystal oscillator for RTC (LSE)
- Internal 16 MHz factory-trimmed RC ( |plusminus| 1%)
- Internal low-power 32 kHz RC ( |plusminus| 5%)
- 2 PLLs for system clock, USB, audio, ADC
- RTC with HW calendar, alarms and calibration
- 14x timers:
- 1x 32-bit timer and 2x 16-bit timers with up to four IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
- 2x 16-bit 8-channel advanced motor control timers, with up to 8x PWM channels, dead time generation and emergency stop
- 1x 16-bit timer with 2x IC/OCs, one OCN/PWM, dead time generation and emergency stop
- 2x 16-bit timers with IC/OC/OCN/PWM, dead time generation and emergency stop
- 2x watchdog timers (independent, window)
- 2x 16-bit basic timers
- SysTick timer
- 1x low-power timer
- Up to 86 fast I/Os, most 5 V-tolerant
- Memories
- Up to 128 KB single bank Flash, proprietary code readout protection
- Up to 22 KB of SRAM including 16 KB with hardware parity check
- Rich analog peripherals (independent supply)
- 2x 12-bit ADC 5 MSPS, up to 16-bit with hardware oversampling, 200
|micro| A/MSPS
- 4x 12-bit DAC, low-power sample and hold
- 3x operational amplifiers with built-in PGA
- 4x ultra-fast rail-to-rail analog comparators
- 16x communication interfaces
- 1 x FDCAN controller supporting flexible data rate
- 3x I2C FM+(1 Mbit/s), SMBus/PMBus
- 4x USARTs (ISO 7816, LIN, IrDA, modem)
- 1x LPUART
- 3x SPIs (2x with multiplexed half duplex I2S interface)
- 1x SAI (serial audio interface)
- USB 2.0 full-speed interface with LPM and BCD support
- IRTIM (Infrared interface)
- USB Type-C /USB power delivery controller (UCPD)
- 12-channel DMA controller
- True random number generator (RNG)
- CRC calculation unit, 96-bit unique ID
- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell*
More information about STM32G431RB can be found here:
- `STM32G431RB on www.st.com`_
- `STM32G4 reference manual`_
Supported Features
==================
The Zephyr nucleo_g431rb board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| PWM | on-chip | pwm |
+-----------+------------+-------------------------------------+
| DAC | on-chip | dac |
+-----------+------------+-------------------------------------+
| COUNTER | on-chip | rtc |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| RNG | on-chip | rng |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported on this Zephyr port.
The default configuration can be found in the defconfig file:
:zephyr_file:`boards/st/nucleo_g431rb/nucleo_g431rb_defconfig`
Connections and IOs
===================
Nucleo G431RB Board has 6 GPIO controllers. These controllers are responsible for pin muxing,
input/output, pull-up, etc.
For more details please refer to `STM32G4 Nucleo-64 board User Manual`_.
Default Zephyr Peripheral Mapping:
----------------------------------
.. rst-class:: rst-columns
- UART_1_TX : PC4
- UART_1_RX : PC5
- LPUART_1_TX : PA2
- LPUART_1_RX : PA3
- I2C_1_SCL : PB8
- I2C_1_SDA : PB9
- SPI_1_NSS : PB6
- SPI_1_SCK : PA5
- SPI_1_MISO : PA6
- SPI_1_MOSI : PA7
- SPI_2_NSS : PB12
- SPI_2_SCK : PB13
- SPI_2_MISO : PB14
- SPI_2_MOSI : PB15
- SPI_3_NSS : PA15
- SPI_3_SCK : PC10
- SPI_3_MISO : PC11
- SPI_3_MOSI : PC12
- PWM_3_CH1 : PB4
- USER_PB : PC13
- LD2 : PA5
- DAC1_OUT1 : PA4
System Clock
------------
Nucleo G431RB System Clock could be driven by internal or external oscillator,
as well as main PLL clock. By default System clock is driven by PLL clock at 150MHz,
driven by 16MHz high speed internal oscillator. The clock can be boosted to 170MHz if boost mode
is selected.
Serial Port
-----------
Nucleo G431RB board has 3 U(S)ARTs and one LPUART. The Zephyr console output is assigned to LPUART1.
Default settings are 115200 8N1.
Please note that LPUART1 baudrate is limited to 9600 if the MCU is clocked by LSE (32.768 kHz) in
low power mode.
Programming and Debugging
*************************
Applications for the ``nucleo_g431rb`` board configuration can be built and
flashed in the usual way (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Flashing
========
Nucleo G431RB board includes an ST-LINK/V3E embedded debug tool interface.
This interface is not yet supported by the openocd version included in the Zephyr SDK.
Instead, support can be enabled on pyocd by adding "pack" support with
the following pyocd command:
.. code-block:: console
$ pyocd pack --update
$ pyocd pack --install stm32g431rb
Note:
To manually enable the openocd interface, You can still update, compile and install
a 'local' openocd from the official openocd repo path_to_url .
Then run the following openocd command where the '/usr/local/bin/openocd'is your path
for the freshly installed openocd, given by "$ which openocd" :
.. code-block:: console
$ west flash --openocd /usr/local/bin/openocd
Flashing an application to Nucleo G431RB
----------------------------------------
Connect the Nucleo G431RB to your host computer using the USB port,
then run a serial host program to connect with your Nucleo board.
.. code-block:: console
$ minicom -D /dev/ttyACM0
Now build and flash an application. Here is an example for
:ref:`hello_world`.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nucleo_g431rb
:goals: build flash
You should see the following message on the console:
.. code-block:: console
$ Hello World! arm
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nucleo_g431rb
:maybe-skip-config:
:goals: debug
.. _Nucleo G431RB website:
path_to_url
.. _STM32G4 Nucleo-64 board User Manual:
path_to_url
.. _STM32G431RB on www.st.com:
path_to_url
.. _STM32G4 reference manual:
path_to_url
``` | /content/code_sandbox/boards/st/nucleo_g431rb/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,258 |
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