text stringlengths 9 39.2M | dir stringlengths 25 226 | lang stringclasses 163 values | created_date timestamp[s] | updated_date timestamp[s] | repo_name stringclasses 751 values | repo_full_name stringclasses 752 values | star int64 1.01k 183k | len_tokens int64 1 18.5M |
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```objective-c
/*
*
*/
/**
* @file
* @brief Public APIs for the USB BC1.2 battery charging detect drivers.
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_USB_USB_BC12_H_
#define ZEPHYR_INCLUDE_DRIVERS_USB_USB_BC12_H_
#include <zephyr/device.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief BC1.2 driver APIs
* @defgroup b12_interface BC1.2 driver APIs
* @ingroup io_interfaces
* @{
*/
/* FIXME - make these Kconfig options */
/**
* @name BC1.2 constants
* @{
*/
/** BC1.2 USB charger voltage. */
#define BC12_CHARGER_VOLTAGE_UV 5000 * 1000
/**
* BC1.2 USB charger minimum current. Set to match the Isusp of 2.5 mA parameter.
* This is returned by the driver when either BC1.2 detection fails, or the
* attached partner is a SDP (standard downstream port).
*
* The application may increase the current draw after determining the USB device
* state of suspended/unconfigured/configured.
* Suspended: 2.5 mA
* Unconfigured: 100 mA
* Configured: 500 mA (USB 2.0)
*/
#define BC12_CHARGER_MIN_CURR_UA 2500
/** BC1.2 USB charger maximum current. */
#define BC12_CHARGER_MAX_CURR_UA 1500 * 1000
/** @} */
/** @cond INTERNAL_HIDDEN
* @brief Helper macro for setting a BC1.2 current limit
*
* @param val Current limit value, in uA.
* @return A valid BC1.2 current limit, in uA, clamped between the BC1.2 minimum
* and maximum values.
*/
#define BC12_CURR_UA(val) CLAMP(val, BC12_CHARGER_MIN_CURR_UA, BC12_CHARGER_MAX_CURR_UA)
/** @endcond */
/** @brief BC1.2 device role. */
enum bc12_role {
BC12_DISCONNECTED,
BC12_PORTABLE_DEVICE,
BC12_CHARGING_PORT,
};
/** @brief BC1.2 charging partner type. */
enum bc12_type {
/** No partner connected. */
BC12_TYPE_NONE,
/** Standard Downstream Port */
BC12_TYPE_SDP,
/** Dedicated Charging Port */
BC12_TYPE_DCP,
/** Charging Downstream Port */
BC12_TYPE_CDP,
/** Proprietary charging port */
BC12_TYPE_PROPRIETARY,
/** Unknown charging port, BC1.2 detection failed. */
BC12_TYPE_UNKNOWN,
/** Count of valid BC12 types. */
BC12_TYPE_COUNT,
};
/**
* @brief BC1.2 detected partner state.
*
* @param bc12_role Current role of the BC1.2 device.
* @param type Charging partner type. Valid when bc12_role is BC12_PORTABLE_DEVICE.
* @param current_ma Current, in uA, that the charging partner provides. Valid when bc12_role is
* BC12_PORTABLE_DEVICE.
* @param voltage_mv Voltage, in uV, that the charging partner provides. Valid when bc12_role is
* BC12_PORTABLE_DEVICE.
* @param pd_partner_connected True if a PD partner is currently connected. Valid when bc12_role is
* BC12_CHARGING_PORT.
*/
struct bc12_partner_state {
enum bc12_role bc12_role;
union {
struct {
enum bc12_type type;
int current_ua;
int voltage_uv;
};
struct {
bool pd_partner_connected;
};
};
};
/**
* @brief BC1.2 callback for charger configuration
*
* @param dev BC1.2 device which is notifying of the new charger state.
* @param state Current state of the BC1.2 client, including BC1.2 type
* detected, voltage, and current limits.
* If NULL, then the partner charger is disconnected or the BC1.2 device is
* operating in host mode.
* @param user_data Requester supplied data which is passed along to the callback.
*/
typedef void (*bc12_callback_t)(const struct device *dev, struct bc12_partner_state *state,
void *user_data);
/**
* @cond INTERNAL_HIDDEN
*
* These are for internal use only, so skip these in public documentation.
*/
__subsystem struct bc12_driver_api {
int (*set_role)(const struct device *dev, enum bc12_role role);
int (*set_result_cb)(const struct device *dev, bc12_callback_t cb, void *user_data);
};
/**
* @endcond
*/
/**
* @brief Set the BC1.2 role.
*
* @param dev Pointer to the device structure for the BC1.2 driver instance.
* @param role New role for the BC1.2 device.
*
* @retval 0 If successful.
* @retval -EIO general input/output error.
*/
__syscall int bc12_set_role(const struct device *dev, enum bc12_role role);
static inline int z_impl_bc12_set_role(const struct device *dev, enum bc12_role role)
{
const struct bc12_driver_api *api = (const struct bc12_driver_api *)dev->api;
return api->set_role(dev, role);
}
/**
* @brief Register a callback for BC1.2 results.
*
* @param dev Pointer to the device structure for the BC1.2 driver instance.
* @param cb Function pointer for the result callback.
* @param user_data Requester supplied data which is passed along to the callback.
*
* @retval 0 If successful.
* @retval -EIO general input/output error.
*/
__syscall int bc12_set_result_cb(const struct device *dev, bc12_callback_t cb, void *user_data);
static inline int z_impl_bc12_set_result_cb(const struct device *dev, bc12_callback_t cb,
void *user_data)
{
const struct bc12_driver_api *api = (const struct bc12_driver_api *)dev->api;
return api->set_result_cb(dev, cb, user_data);
}
#ifdef __cplusplus
}
#endif
/**
* @}
*/
#include <zephyr/syscalls/usb_bc12.h>
#endif /* ZEPHYR_INCLUDE_DRIVERS_USB_USB_BC12_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/usb/usb_bc12.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,349 |
```objective-c
/*
*
*/
/**
* @file
* @brief USB host controller (UHC) driver API
*/
#ifndef ZEPHYR_INCLUDE_UHC_H
#define ZEPHYR_INCLUDE_UHC_H
#include <zephyr/kernel.h>
#include <zephyr/device.h>
#include <zephyr/net/buf.h>
#include <zephyr/usb/usb_ch9.h>
#include <zephyr/sys/dlist.h>
/**
* @brief USB host controller (UHC) driver API
* @defgroup uhc_api USB host controller driver API
* @ingroup io_interfaces
* @{
*/
/**
* @brief USB control transfer stage
*/
enum uhc_control_stage {
UHC_CONTROL_STAGE_SETUP = 0,
UHC_CONTROL_STAGE_DATA,
UHC_CONTROL_STAGE_STATUS,
};
/**
* UHC endpoint buffer info
*
* This structure is mandatory for all UHC request.
* It contains the meta data about the request and FIFOs
* to store net_buf structures for each request.
*
* The members of this structure should not be used
* directly by a higher layer (host stack).
*/
struct uhc_transfer {
/** dlist node */
sys_dnode_t node;
/** Control transfer setup packet */
uint8_t setup_pkt[8];
/** Transfer data buffer */
struct net_buf *buf;
/** Device (peripheral) address */
uint8_t addr;
/** Endpoint to which request is associated */
uint8_t ep;
/** Endpoint attributes (TBD) */
uint8_t attrib;
/** Maximum packet size */
uint16_t mps;
/** Timeout in number of frames */
uint16_t timeout;
/** Flag marks request buffer is queued */
unsigned int queued : 1;
/** Control stage status, up to the driver to use it or not */
unsigned int stage : 2;
/** Pointer to USB device (opaque for the UHC) */
void *udev;
/** Pointer to transfer completion callback (opaque for the UHC) */
void *cb;
/** Transfer result, 0 on success, other values on error */
int err;
};
/**
* @brief USB host controller event types
*/
enum uhc_event_type {
/** Low speed device connected */
UHC_EVT_DEV_CONNECTED_LS,
/** Full speed device connected */
UHC_EVT_DEV_CONNECTED_FS,
/** High speed device connected */
UHC_EVT_DEV_CONNECTED_HS,
/** Device (peripheral) removed */
UHC_EVT_DEV_REMOVED,
/** Bus reset operation finished */
UHC_EVT_RESETED,
/** Bus suspend operation finished */
UHC_EVT_SUSPENDED,
/** Bus resume operation finished */
UHC_EVT_RESUMED,
/** Remote wakeup signal */
UHC_EVT_RWUP,
/** Endpoint request result event */
UHC_EVT_EP_REQUEST,
/**
* Non-correctable error event, requires attention from higher
* levels or application.
*/
UHC_EVT_ERROR,
};
/**
* USB host controller event
*
* Common structure for all events that originate from
* the UHC driver and are passed to higher layer using
* message queue and a callback (uhc_event_cb_t) provided
* by higher layer during controller initialization (uhc_init).
*/
struct uhc_event {
/** slist node for the message queue */
sys_snode_t node;
/** Event type */
enum uhc_event_type type;
union {
/** Event status value, if any */
int status;
/** Pointer to request used only for UHC_EVT_EP_REQUEST */
struct uhc_transfer *xfer;
};
/** Pointer to controller's device struct */
const struct device *dev;
};
/**
* @typedef uhc_event_cb_t
* @brief Callback to submit UHC event to higher layer.
*
* At the higher level, the event is to be inserted into a message queue.
*
* @param[in] dev Pointer to device struct of the driver instance
* @param[in] event Point to event structure
*
* @return 0 on success, all other values should be treated as error.
*/
typedef int (*uhc_event_cb_t)(const struct device *dev,
const struct uhc_event *const event);
/**
* USB host controller capabilities
*
* This structure is mainly intended for the USB host stack.
*/
struct uhc_device_caps {
/** USB high speed capable controller */
uint32_t hs : 1;
};
/**
* Controller is initialized by uhc_init()
*/
#define UHC_STATUS_INITIALIZED 0
/**
* Controller is enabled and all API functions are available
*/
#define UHC_STATUS_ENABLED 1
/**
* Common UHC driver data structure
*
* Mandatory structure for each UHC controller driver.
* To be implemented as device's private data (device->data).
*/
struct uhc_data {
/** Controller capabilities */
struct uhc_device_caps caps;
/** Driver access mutex */
struct k_mutex mutex;
/** dlist for control transfers */
sys_dlist_t ctrl_xfers;
/** dlist for bulk transfers */
sys_dlist_t bulk_xfers;
/** Callback to submit an UHC event to upper layer */
uhc_event_cb_t event_cb;
/** USB host controller status */
atomic_t status;
/** Driver private data */
void *priv;
};
/**
* @brief Checks whether the controller is initialized.
*
* @param[in] dev Pointer to device struct of the driver instance
*
* @return true if controller is initialized, false otherwise
*/
static inline bool uhc_is_initialized(const struct device *dev)
{
struct uhc_data *data = dev->data;
return atomic_test_bit(&data->status, UHC_STATUS_INITIALIZED);
}
/**
* @brief Checks whether the controller is enabled.
*
* @param[in] dev Pointer to device struct of the driver instance
*
* @return true if controller is enabled, false otherwise
*/
static inline bool uhc_is_enabled(const struct device *dev)
{
struct uhc_data *data = dev->data;
return atomic_test_bit(&data->status, UHC_STATUS_ENABLED);
}
/**
* @cond INTERNAL_HIDDEN
*/
struct uhc_api {
int (*lock)(const struct device *dev);
int (*unlock)(const struct device *dev);
int (*init)(const struct device *dev);
int (*enable)(const struct device *dev);
int (*disable)(const struct device *dev);
int (*shutdown)(const struct device *dev);
int (*bus_reset)(const struct device *dev);
int (*sof_enable)(const struct device *dev);
int (*bus_suspend)(const struct device *dev);
int (*bus_resume)(const struct device *dev);
int (*ep_enqueue)(const struct device *dev,
struct uhc_transfer *const xfer);
int (*ep_dequeue)(const struct device *dev,
struct uhc_transfer *const xfer);
};
/**
* @endcond
*/
/**
* @brief Reset USB bus
*
* Perform USB bus reset, controller may emit UHC_EVT_RESETED
* at the end of reset signaling.
*
* @param[in] dev Pointer to device struct of the driver instance
*
* @return 0 on success, all other values should be treated as error.
* @retval -EBUSY if the controller is already performing a bus operation
*/
static inline int uhc_bus_reset(const struct device *dev)
{
const struct uhc_api *api = dev->api;
int ret;
api->lock(dev);
ret = api->bus_reset(dev);
api->unlock(dev);
return ret;
}
/**
* @brief Enable Start of Frame generator
*
* Enable SOF generator.
*
* @param[in] dev Pointer to device struct of the driver instance
*
* @return 0 on success, all other values should be treated as error.
* @retval -EALREADY if already enabled
*/
static inline int uhc_sof_enable(const struct device *dev)
{
const struct uhc_api *api = dev->api;
int ret;
api->lock(dev);
ret = api->sof_enable(dev);
api->unlock(dev);
return ret;
}
/**
* @brief Suspend USB bus
*
* Disable SOF generator and emit UHC_EVT_SUSPENDED event when USB bus
* is suspended.
*
* @param[in] dev Pointer to device struct of the driver instance
*
* @return 0 on success, all other values should be treated as error.
* @retval -EALREADY if already suspended
*/
static inline int uhc_bus_suspend(const struct device *dev)
{
const struct uhc_api *api = dev->api;
int ret;
api->lock(dev);
ret = api->bus_suspend(dev);
api->unlock(dev);
return ret;
}
/**
* @brief Resume USB bus
*
* Signal resume for at least 20ms, emit UHC_EVT_RESUMED at the end of USB
* bus resume signaling. The SoF generator should subsequently start within 3ms.
*
* @param[in] dev Pointer to device struct of the driver instance
*
* @return 0 on success, all other values should be treated as error.
* @retval -EBUSY if the controller is already performing a bus operation
*/
static inline int uhc_bus_resume(const struct device *dev)
{
const struct uhc_api *api = dev->api;
int ret;
api->lock(dev);
ret = api->bus_resume(dev);
api->unlock(dev);
return ret;
}
/**
* @brief Allocate UHC transfer
*
* Allocate a new transfer from common transfer pool.
* Transfer has no buffer after allocation, but can be allocated
* and added from different pools.
*
* @param[in] dev Pointer to device struct of the driver instance
* @param[in] addr Device (peripheral) address
* @param[in] ep Endpoint address
* @param[in] attrib Endpoint attributes
* @param[in] mps Maximum packet size of the endpoint
* @param[in] timeout Timeout in number of frames
* @param[in] udev Opaque pointer to USB device
* @param[in] cb Transfer completion callback
*
* @return pointer to allocated transfer or NULL on error.
*/
struct uhc_transfer *uhc_xfer_alloc(const struct device *dev,
const uint8_t addr,
const uint8_t ep,
const uint8_t attrib,
const uint16_t mps,
const uint16_t timeout,
void *const udev,
void *const cb);
/**
* @brief Allocate UHC transfer with buffer
*
* Allocate a new transfer from common transfer pool with buffer.
*
* @param[in] dev Pointer to device struct of the driver instance
* @param[in] addr Device (peripheral) address
* @param[in] ep Endpoint address
* @param[in] attrib Endpoint attributes
* @param[in] mps Maximum packet size of the endpoint
* @param[in] timeout Timeout in number of frames
* @param[in] udev Opaque pointer to USB device
* @param[in] cb Transfer completion callback
* @param[in] size Size of the buffer
*
* @return pointer to allocated transfer or NULL on error.
*/
struct uhc_transfer *uhc_xfer_alloc_with_buf(const struct device *dev,
const uint8_t addr,
const uint8_t ep,
const uint8_t attrib,
const uint16_t mps,
const uint16_t timeout,
void *const udev,
void *const cb,
size_t size);
/**
* @brief Free UHC transfer and any buffers
*
* Free any buffers and put the transfer back into the transfer pool.
*
* @param[in] dev Pointer to device struct of the driver instance
* @param[in] xfer Pointer to UHC transfer
*
* @return 0 on success, all other values should be treated as error.
*/
int uhc_xfer_free(const struct device *dev,
struct uhc_transfer *const xfer);
/**
* @brief Add UHC transfer buffer
*
* Add a previously allocated buffer to the transfer.
*
* @param[in] dev Pointer to device struct of the driver instance
* @param[in] xfer Pointer to UHC transfer
* @param[in] buf Pointer to UHC request buffer
*
* @return pointer to allocated request or NULL on error.
*/
int uhc_xfer_buf_add(const struct device *dev,
struct uhc_transfer *const xfer,
struct net_buf *buf);
/**
* @brief Allocate UHC transfer buffer
*
* Allocate a new buffer from common request buffer pool and
* assign it to the transfer if the xfer parameter is not NULL.
*
* @param[in] dev Pointer to device struct of the driver instance
* @param[in] size Size of the request buffer
*
* @return pointer to allocated request or NULL on error.
*/
struct net_buf *uhc_xfer_buf_alloc(const struct device *dev,
const size_t size);
/**
* @brief Free UHC request buffer
*
* Put the buffer back into the request buffer pool.
*
* @param[in] dev Pointer to device struct of the driver instance
* @param[in] buf Pointer to UHC request buffer
*/
void uhc_xfer_buf_free(const struct device *dev, struct net_buf *const buf);
/**
* @brief Queue USB host controller transfer
*
* Add transfer to the queue. If the queue is empty, the transfer
* can be claimed by the controller immediately.
*
* @param[in] dev Pointer to device struct of the driver instance
* @param[in] xfer Pointer to UHC transfer
*
* @return 0 on success, all other values should be treated as error.
* @retval -EPERM controller is not initialized
*/
int uhc_ep_enqueue(const struct device *dev, struct uhc_transfer *const xfer);
/**
* @brief Remove a USB host controller transfers from queue
*
* Not implemented yet.
*
* @param[in] dev Pointer to device struct of the driver instance
* @param[in] xfer Pointer to UHC transfer
*
* @return 0 on success, all other values should be treated as error.
* @retval -EPERM controller is not initialized
*/
int uhc_ep_dequeue(const struct device *dev, struct uhc_transfer *const xfer);
/**
* @brief Initialize USB host controller
*
* Initialize USB host controller.
*
* @param[in] dev Pointer to device struct of the driver instance
* @param[in] event_cb Event callback from the higher layer (USB host stack)
*
* @return 0 on success, all other values should be treated as error.
* @retval -EINVAL on parameter error (no callback is passed)
* @retval -EALREADY already initialized
*/
int uhc_init(const struct device *dev, uhc_event_cb_t event_cb);
/**
* @brief Enable USB host controller
*
* Enable powered USB host controller and allow host stack to
* recognize and enumerate devices.
*
* @param[in] dev Pointer to device struct of the driver instance
*
* @return 0 on success, all other values should be treated as error.
* @retval -EPERM controller is not initialized
* @retval -EALREADY already enabled
*/
int uhc_enable(const struct device *dev);
/**
* @brief Disable USB host controller
*
* Disable enabled USB host controller.
*
* @param[in] dev Pointer to device struct of the driver instance
*
* @return 0 on success, all other values should be treated as error.
* @retval -EALREADY already disabled
*/
int uhc_disable(const struct device *dev);
/**
* @brief Poweroff USB host controller
*
* Shut down the controller completely to reduce energy consumption
* or to change the role of the controller.
*
* @param[in] dev Pointer to device struct of the driver instance
*
* @return 0 on success, all other values should be treated as error.
* @retval -EALREADY controller is already uninitialized
*/
int uhc_shutdown(const struct device *dev);
/**
* @brief Get USB host controller capabilities
*
* Obtain the capabilities of the controller
* such as high speed (HS), and more.
*
* @param[in] dev Pointer to device struct of the driver instance
*
* @return USB host controller capabilities.
*/
static inline struct uhc_device_caps uhc_caps(const struct device *dev)
{
struct uhc_data *data = dev->data;
return data->caps;
}
/**
* @}
*/
#endif /* ZEPHYR_INCLUDE_UHC_H */
``` | /content/code_sandbox/include/zephyr/drivers/usb/uhc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 3,498 |
```objective-c
/*
*
*/
/**
* @file
* @brief Buffers for USB device support
*/
#ifndef ZEPHYR_INCLUDE_UDC_BUF_H
#define ZEPHYR_INCLUDE_UDC_BUF_H
#include <zephyr/kernel.h>
#include <zephyr/net/buf.h>
#if defined(CONFIG_DCACHE) && !defined(CONFIG_UDC_BUF_FORCE_NOCACHE)
/*
* Here we try to get DMA-safe buffers, but we lack a consistent source of
* information about data cache properties, such as line cache size, and a
* consistent source of information about what part of memory is DMA'able.
* For now, we simply assume that all available memory is DMA'able and use
* Kconfig option DCACHE_LINE_SIZE for alignment and granularity.
*/
#define Z_UDC_BUF_ALIGN CONFIG_DCACHE_LINE_SIZE
#define Z_UDC_BUF_GRANULARITY CONFIG_DCACHE_LINE_SIZE
#else
/*
* Default alignment and granularity to pointer size if the platform does not
* have a data cache or buffers are placed in nocache memory region.
*/
#define Z_UDC_BUF_ALIGN sizeof(void *)
#define Z_UDC_BUF_GRANULARITY sizeof(void *)
#endif
/**
* @brief Buffer macros and definitions used in USB device support
* @defgroup udc_buf Buffer macros and definitions used in USB device support
* @ingroup usb
* @{
*/
/** Buffer alignment required by the UDC driver */
#define UDC_BUF_ALIGN Z_UDC_BUF_ALIGN
/** Buffer granularity required by the UDC driver */
#define UDC_BUF_GRANULARITY Z_UDC_BUF_GRANULARITY
/**
* @brief Define a UDC driver-compliant static buffer
*
* This macro should be used if the application defines its own buffers to be
* used for USB transfers.
*
* @param name Buffer name
* @param size Buffer size
*/
#define UDC_STATIC_BUF_DEFINE(name, size) \
static uint8_t __aligned(UDC_BUF_ALIGN) name[ROUND_UP(size, UDC_BUF_GRANULARITY)];
/**
* @brief Verify that the buffer is aligned as required by the UDC driver
*
* @see IS_ALIGNED
*
* @param buf Buffer pointer
*/
#define IS_UDC_ALIGNED(buf) IS_ALIGNED(buf, UDC_BUF_ALIGN)
/**
* @cond INTERNAL_HIDDEN
*/
#define UDC_HEAP_DEFINE(name, bytes, in_section) \
uint8_t in_section __aligned(UDC_BUF_ALIGN) \
kheap_##name[MAX(bytes, Z_HEAP_MIN_SIZE)]; \
STRUCT_SECTION_ITERABLE(k_heap, name) = { \
.heap = { \
.init_mem = kheap_##name, \
.init_bytes = MAX(bytes, Z_HEAP_MIN_SIZE), \
}, \
}
#define UDC_K_HEAP_DEFINE(name, size) \
COND_CODE_1(CONFIG_UDC_BUF_FORCE_NOCACHE, \
(UDC_HEAP_DEFINE(name, size, __nocache)), \
(UDC_HEAP_DEFINE(name, size, __noinit)))
extern const struct net_buf_data_cb net_buf_dma_cb;
/** @endcond */
/**
* @brief Define a new pool for UDC buffers with variable-size payloads
*
* This macro is similar to `NET_BUF_POOL_VAR_DEFINE`, but provides buffers
* with alignment and granularity suitable for use by UDC driver.
*
* @see NET_BUF_POOL_VAR_DEFINE
*
* @param pname Name of the pool variable.
* @param count Number of buffers in the pool.
* @param size Maximum data payload per buffer.
* @param ud_size User data space to reserve per buffer.
* @param fdestroy Optional destroy callback when buffer is freed.
*/
#define UDC_BUF_POOL_VAR_DEFINE(pname, count, size, ud_size, fdestroy) \
_NET_BUF_ARRAY_DEFINE(pname, count, ud_size); \
UDC_K_HEAP_DEFINE(net_buf_mem_pool_##pname, size); \
static const struct net_buf_data_alloc net_buf_data_alloc_##pname = { \
.cb = &net_buf_dma_cb, \
.alloc_data = &net_buf_mem_pool_##pname, \
.max_alloc_size = 0, \
}; \
static STRUCT_SECTION_ITERABLE(net_buf_pool, pname) = \
NET_BUF_POOL_INITIALIZER(pname, &net_buf_data_alloc_##pname, \
_net_buf_##pname, count, ud_size, \
fdestroy)
/**
* @brief Define a new pool for UDC buffers based on fixed-size data
*
* This macro is similar to `NET_BUF_POOL_DEFINE`, but provides buffers
* with alignment and granularity suitable for use by UDC driver.
*
* @see NET_BUF_POOL_DEFINE
* @param pname Name of the pool variable.
* @param count Number of buffers in the pool.
* @param size Maximum data payload per buffer.
* @param ud_size User data space to reserve per buffer.
* @param fdestroy Optional destroy callback when buffer is freed.
*/
#define UDC_BUF_POOL_DEFINE(pname, count, size, ud_size, fdestroy) \
_NET_BUF_ARRAY_DEFINE(pname, count, ud_size); \
static uint8_t __nocache __aligned(UDC_BUF_ALIGN) \
net_buf_data_##pname[count][size]; \
static const struct net_buf_pool_fixed net_buf_fixed_##pname = { \
.data_pool = (uint8_t *)net_buf_data_##pname, \
}; \
static const struct net_buf_data_alloc net_buf_fixed_alloc_##pname = { \
.cb = &net_buf_fixed_cb, \
.alloc_data = (void *)&net_buf_fixed_##pname, \
.max_alloc_size = size, \
}; \
static STRUCT_SECTION_ITERABLE(net_buf_pool, pname) = \
NET_BUF_POOL_INITIALIZER(pname, &net_buf_fixed_alloc_##pname, \
_net_buf_##pname, count, ud_size, \
fdestroy)
/**
* @}
*/
#endif /* ZEPHYR_INCLUDE_UDC_BUF_H */
``` | /content/code_sandbox/include/zephyr/drivers/usb/udc_buf.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,327 |
```objective-c
/*
*
*/
/**
* @file
* @brief New USB device controller (UDC) driver API
*/
#ifndef ZEPHYR_INCLUDE_UDC_H
#define ZEPHYR_INCLUDE_UDC_H
#include <zephyr/kernel.h>
#include <zephyr/device.h>
#include <zephyr/drivers/usb/udc_buf.h>
#include <zephyr/sys/atomic.h>
#include <zephyr/usb/usb_ch9.h>
/**
* @brief Maximum packet size of control endpoint supported by the controller.
*/
enum udc_mps0 {
UDC_MPS0_8,
UDC_MPS0_16,
UDC_MPS0_32,
UDC_MPS0_64,
};
/**
* USB device controller capabilities
*
* This structure is mainly intended for the USB device stack.
*/
struct udc_device_caps {
/** USB high speed capable controller */
uint32_t hs : 1;
/** Controller supports USB remote wakeup */
uint32_t rwup : 1;
/** Controller performs status OUT stage automatically */
uint32_t out_ack : 1;
/** Controller expects device address to be set before status stage */
uint32_t addr_before_status : 1;
/** Controller can detect the state change of USB supply VBUS.*/
uint32_t can_detect_vbus : 1;
/** Maximum packet size for control endpoint */
enum udc_mps0 mps0 : 2;
};
/**
* @brief USB device actual speed
*/
enum udc_bus_speed {
/** Device is probably not connected */
UDC_BUS_UNKNOWN,
/** Device is connected to a full speed bus */
UDC_BUS_SPEED_FS,
/** Device is connected to a high speed bus */
UDC_BUS_SPEED_HS,
/** Device is connected to a super speed bus */
UDC_BUS_SPEED_SS,
};
/**
* USB device controller endpoint capabilities
*/
struct udc_ep_caps {
/** Maximum packet size of the endpoint buffer */
uint32_t mps : 16;
/** Control transfer capable endpoint (for completeness) */
uint32_t control : 1;
/** Interrupt transfer capable endpoint */
uint32_t interrupt : 1;
/** Bulk transfer capable endpoint */
uint32_t bulk : 1;
/** ISO transfer capable endpoint */
uint32_t iso : 1;
/** IN transfer capable endpoint */
uint32_t in : 1;
/** OUT transfer capable endpoint */
uint32_t out : 1;
};
/**
* USB device controller endpoint status
*/
struct udc_ep_stat {
/** Endpoint is enabled */
uint32_t enabled : 1;
/** Endpoint is halted (returning STALL PID) */
uint32_t halted : 1;
/** Last submitted PID is DATA1 */
uint32_t data1 : 1;
/** If double buffering is supported, last used buffer is odd */
uint32_t odd : 1;
/** Endpoint is busy */
uint32_t busy : 1;
};
/**
* USB device controller endpoint configuration
*
* This structure is mandatory for configuration and management of endpoints.
* It is not exposed to higher layer and is used only by internal part
* of UDC API and driver.
*/
struct udc_ep_config {
/** Endpoint requests FIFO */
struct k_fifo fifo;
/** Endpoint capabilities */
struct udc_ep_caps caps;
/** Endpoint status */
struct udc_ep_stat stat;
/** Endpoint address */
uint8_t addr;
/** Endpoint attributes */
uint8_t attributes;
/** Maximum packet size */
uint16_t mps;
/** Polling interval */
uint8_t interval;
};
/**
* @brief USB device controller event types
*/
enum udc_event_type {
/** VBUS ready event. Signals that VBUS is in stable condition. */
UDC_EVT_VBUS_READY,
/** VBUS removed event. Signals that VBUS is below the valid range. */
UDC_EVT_VBUS_REMOVED,
/** Device resume event */
UDC_EVT_RESUME,
/** Device suspended event */
UDC_EVT_SUSPEND,
/** Port reset detected */
UDC_EVT_RESET,
/** Start of Frame event */
UDC_EVT_SOF,
/** Endpoint request result event */
UDC_EVT_EP_REQUEST,
/**
* Non-correctable error event, requires attention from higher
* levels or application.
*/
UDC_EVT_ERROR,
};
/**
* USB device controller event
*
* Common structure for all events that originate from
* the UDC driver and are passed to higher layer using
* message queue and a callback (udc_event_cb_t) provided
* by higher layer during controller initialization (udc_init).
*/
struct udc_event {
/** Event type */
enum udc_event_type type;
union {
/** Event value */
uint32_t value;
/** Event status value, if any */
int status;
/** Pointer to request used only for UDC_EVT_EP_REQUEST */
struct net_buf *buf;
};
/** Pointer to device struct */
const struct device *dev;
};
/**
* UDC endpoint buffer info
*
* This structure is mandatory for all UDC request.
* It contains the meta data about the request and is stored in
* user_data array of net_buf structure for each request.
*/
struct udc_buf_info {
/** Endpoint to which request is associated */
uint8_t ep;
/** Flag marks setup transfer */
unsigned int setup : 1;
/** Flag marks data stage of setup transfer */
unsigned int data : 1;
/** Flag marks status stage of setup transfer */
unsigned int status : 1;
/** Flag marks ZLP at the end of a transfer */
unsigned int zlp : 1;
/** Flag marks request buffer claimed by the controller (TBD) */
unsigned int claimed : 1;
/** Flag marks request buffer is queued (TBD) */
unsigned int queued : 1;
/** Transfer owner (usually pointer to a class instance) */
void *owner;
/** Transfer result, 0 on success, other values on error */
int err;
} __packed;
/**
* @typedef udc_event_cb_t
* @brief Callback to submit UDC event to higher layer.
*
* At the higher level, the event is to be inserted into a message queue.
* (TBD) Maybe it is better to provide a pointer to k_msgq passed during
* initialization.
*
* @param[in] dev Pointer to device struct of the driver instance
* @param[in] event Point to event structure
*
* @return 0 on success, all other values should be treated as error.
*/
typedef int (*udc_event_cb_t)(const struct device *dev,
const struct udc_event *const event);
/**
* @brief UDC driver API
* This is the mandatory API any USB device controller driver needs to expose
* with exception of:
* device_speed(), test_mode() are only required for HS controllers
*/
struct udc_api {
enum udc_bus_speed (*device_speed)(const struct device *dev);
int (*ep_enqueue)(const struct device *dev,
struct udc_ep_config *const cfg,
struct net_buf *const buf);
int (*ep_dequeue)(const struct device *dev,
struct udc_ep_config *const cfg);
int (*ep_set_halt)(const struct device *dev,
struct udc_ep_config *const cfg);
int (*ep_clear_halt)(const struct device *dev,
struct udc_ep_config *const cfg);
int (*ep_try_config)(const struct device *dev,
struct udc_ep_config *const cfg);
int (*ep_enable)(const struct device *dev,
struct udc_ep_config *const cfg);
int (*ep_disable)(const struct device *dev,
struct udc_ep_config *const cfg);
int (*host_wakeup)(const struct device *dev);
int (*set_address)(const struct device *dev,
const uint8_t addr);
int (*test_mode)(const struct device *dev,
const uint8_t mode, const bool dryrun);
int (*enable)(const struct device *dev);
int (*disable)(const struct device *dev);
int (*init)(const struct device *dev);
int (*shutdown)(const struct device *dev);
int (*lock)(const struct device *dev);
int (*unlock)(const struct device *dev);
};
/**
* Controller is initialized by udc_init() and can generate the VBUS events,
* if capable, but shall not be recognizable by host.
*/
#define UDC_STATUS_INITIALIZED 0
/**
* Controller is enabled and all API functions are available,
* controller is recognizable by host.
*/
#define UDC_STATUS_ENABLED 1
/** Controller is suspended by the host */
#define UDC_STATUS_SUSPENDED 2
/**
* Common UDC driver data structure
*
* Mandatory structure for each UDC controller driver.
* To be implemented as device's private data (device->data).
*/
struct udc_data {
/** LUT for endpoint management */
struct udc_ep_config *ep_lut[32];
/** Controller capabilities */
struct udc_device_caps caps;
/** Driver access mutex */
struct k_mutex mutex;
/** Callback to submit an UDC event to higher layer */
udc_event_cb_t event_cb;
/** Opaque pointer to store higher layer context */
const void *event_ctx;
/** USB device controller status */
atomic_t status;
/** Internal used Control Sequence Stage */
int stage;
/** Pointer to buffer containing setup packet */
struct net_buf *setup;
/** Driver private data */
void *priv;
};
/**
* @brief New USB device controller (UDC) driver API
* @defgroup udc_api USB device controller driver API
* @ingroup io_interfaces
* @{
*/
/**
* @brief Checks whether the controller is initialized.
*
* @param[in] dev Pointer to device struct of the driver instance
*
* @return true if controller is initialized, false otherwise
*/
static inline bool udc_is_initialized(const struct device *dev)
{
struct udc_data *data = dev->data;
return atomic_test_bit(&data->status, UDC_STATUS_INITIALIZED);
}
/**
* @brief Checks whether the controller is enabled.
*
* @param[in] dev Pointer to device struct of the driver instance
*
* @return true if controller is enabled, false otherwise
*/
static inline bool udc_is_enabled(const struct device *dev)
{
struct udc_data *data = dev->data;
return atomic_test_bit(&data->status, UDC_STATUS_ENABLED);
}
/**
* @brief Checks whether the controller is suspended.
*
* @param[in] dev Pointer to device struct of the driver instance
*
* @return true if controller is suspended, false otherwise
*/
static inline bool udc_is_suspended(const struct device *dev)
{
struct udc_data *data = dev->data;
return atomic_test_bit(&data->status, UDC_STATUS_SUSPENDED);
}
/**
* @brief Initialize USB device controller
*
* Initialize USB device controller and control IN/OUT endpoint.
* After initialization controller driver should be able to detect
* power state of the bus and signal power state changes.
*
* @param[in] dev Pointer to device struct of the driver instance
* @param[in] event_cb Event callback from the higher layer (USB device stack)
* @param[in] event_ctx Opaque pointer to higher layer context
*
* @return 0 on success, all other values should be treated as error.
* @retval -EINVAL on parameter error (no callback is passed)
* @retval -EALREADY already initialized
*/
int udc_init(const struct device *dev,
udc_event_cb_t event_cb, const void *const event_ctx);
/**
* @brief Enable USB device controller
*
* Enable powered USB device controller and allow host to
* recognize and enumerate the device.
*
* @param[in] dev Pointer to device struct of the driver instance
*
* @return 0 on success, all other values should be treated as error.
* @retval -EPERM controller is not initialized
* @retval -EALREADY already enabled
*/
int udc_enable(const struct device *dev);
/**
* @brief Disable USB device controller
*
* Disable enabled USB device controller.
* The driver should continue to detect power state changes.
*
* @param[in] dev Pointer to device struct of the driver instance
*
* @return 0 on success, all other values should be treated as error.
* @retval -EALREADY already disabled
*/
int udc_disable(const struct device *dev);
/**
* @brief Poweroff USB device controller
*
* Shut down the controller completely to reduce energy consumption
* or to change the role of the controller.
*
* @param[in] dev Pointer to device struct of the driver instance
*
* @return 0 on success, all other values should be treated as error.
* @retval -EALREADY controller is not initialized
*/
int udc_shutdown(const struct device *dev);
/**
* @brief Get USB device controller capabilities
*
* Obtain the capabilities of the controller
* such as full speed (FS), high speed (HS), and more.
*
* @param[in] dev Pointer to device struct of the driver instance
*
* @return USB device controller capabilities.
*/
static inline struct udc_device_caps udc_caps(const struct device *dev)
{
struct udc_data *data = dev->data;
return data->caps;
}
/**
* @brief Get actual USB device speed
*
* The function should be called after the reset event to determine
* the actual bus speed.
*
* @param[in] dev Pointer to device struct of the driver instance
*
* @return USB device controller capabilities.
*/
enum udc_bus_speed udc_device_speed(const struct device *dev);
/**
* @brief Set USB device address.
*
* Set address of enabled USB device.
*
* @param[in] dev Pointer to device struct of the driver instance
* @param[in] addr USB device address
*
* @return 0 on success, all other values should be treated as error.
* @retval -EPERM controller is not enabled (or not initialized)
*/
static inline int udc_set_address(const struct device *dev, const uint8_t addr)
{
const struct udc_api *api = dev->api;
int ret;
if (!udc_is_enabled(dev)) {
return -EPERM;
}
api->lock(dev);
ret = api->set_address(dev, addr);
api->unlock(dev);
return ret;
}
/**
* @brief Enable Test Mode.
*
* For compliance testing, high-speed controllers must support test modes.
* A particular test is enabled by a SetFeature(TEST_MODE) request.
* To disable a test mode, device needs to be power cycled.
*
* @param[in] dev Pointer to device struct of the driver instance
* @param[in] mode Test mode
* @param[in] dryrun Verify that a particular mode can be enabled, but do not
* enable test mode
*
* @return 0 on success, all other values should be treated as error.
* @retval -ENOTSUP Test mode is not supported
*/
static inline int udc_test_mode(const struct device *dev,
const uint8_t mode, const bool dryrun)
{
const struct udc_api *api = dev->api;
int ret;
if (!udc_is_enabled(dev)) {
return -EPERM;
}
if (api->test_mode != NULL) {
api->lock(dev);
ret = api->test_mode(dev, mode, dryrun);
api->unlock(dev);
} else {
ret = -ENOTSUP;
}
return ret;
}
/**
* @brief Initiate host wakeup procedure.
*
* Initiate host wakeup. Only possible when the bus is suspended.
*
* @param[in] dev Pointer to device struct of the driver instance
*
* @return 0 on success, all other values should be treated as error.
* @retval -EPERM controller is not enabled (or not initialized)
*/
static inline int udc_host_wakeup(const struct device *dev)
{
const struct udc_api *api = dev->api;
int ret;
if (!udc_is_enabled(dev)) {
return -EPERM;
}
api->lock(dev);
ret = api->host_wakeup(dev);
api->unlock(dev);
return ret;
}
/**
* @brief Try an endpoint configuration.
*
* Try an endpoint configuration based on endpoint descriptor.
* This function may modify wMaxPacketSize descriptor fields
* of the endpoint. All properties of the descriptor,
* such as direction, and transfer type, should be set correctly.
* If wMaxPacketSize value is zero, it will be
* updated to maximum buffer size of the endpoint.
*
* @param[in] dev Pointer to device struct of the driver instance
* @param[in] ep Endpoint address (same as bEndpointAddress)
* @param[in] attributes Endpoint attributes (same as bmAttributes)
* @param[in] mps Maximum packet size (same as wMaxPacketSize)
* @param[in] interval Polling interval (same as bInterval)
*
* @return 0 on success, all other values should be treated as error.
* @retval -EINVAL on wrong parameter
* @retval -ENOTSUP endpoint configuration not supported
* @retval -ENODEV no endpoints available
*/
int udc_ep_try_config(const struct device *dev,
const uint8_t ep,
const uint8_t attributes,
uint16_t *const mps,
const uint8_t interval);
/**
* @brief Configure and enable endpoint.
*
* Configure and make an endpoint ready for use.
* Valid for all endpoints except control IN/OUT.
*
* @param[in] dev Pointer to device struct of the driver instance
* @param[in] ep Endpoint address (same as bEndpointAddress)
* @param[in] attributes Endpoint attributes (same as bmAttributes)
* @param[in] mps Maximum packet size (same as wMaxPacketSize)
* @param[in] interval Polling interval (same as bInterval)
*
* @return 0 on success, all other values should be treated as error.
* @retval -EINVAL on wrong parameter (control IN/OUT endpoint)
* @retval -EPERM controller is not initialized
* @retval -ENODEV endpoint configuration not found
* @retval -EALREADY endpoint is already enabled
*/
int udc_ep_enable(const struct device *dev,
const uint8_t ep,
const uint8_t attributes,
const uint16_t mps,
const uint8_t interval);
/**
* @brief Disable endpoint.
*
* Valid for all endpoints except control IN/OUT.
*
* @param[in] dev Pointer to device struct of the driver instance
* @param[in] ep Endpoint address
*
* @return 0 on success, all other values should be treated as error.
* @retval -EINVAL on wrong parameter (control IN/OUT endpoint)
* @retval -ENODEV endpoint configuration not found
* @retval -EALREADY endpoint is already disabled
* @retval -EPERM controller is not initialized
*/
int udc_ep_disable(const struct device *dev, const uint8_t ep);
/**
* @brief Halt endpoint
*
* Valid for all endpoints.
*
* @param[in] dev Pointer to device struct of the driver instance
* @param[in] ep Endpoint address
*
* @return 0 on success, all other values should be treated as error.
* @retval -ENODEV endpoint configuration not found
* @retval -ENOTSUP not supported (e.g. isochronous endpoint)
* @retval -EPERM controller is not enabled
*/
int udc_ep_set_halt(const struct device *dev, const uint8_t ep);
/**
* @brief Clear endpoint halt
*
* Valid for all endpoints.
*
* @param[in] dev Pointer to device struct of the driver instance
* @param[in] ep Endpoint address
*
* @return 0 on success, all other values should be treated as error.
* @retval -ENODEV endpoint configuration not found
* @retval -ENOTSUP not supported (e.g. isochronous endpoint)
* @retval -EPERM controller is not enabled
*/
int udc_ep_clear_halt(const struct device *dev, const uint8_t ep);
/**
* @brief Queue USB device controller request
*
* Add request to the queue. If the queue is empty, the request
* buffer can be claimed by the controller immediately.
*
* @param[in] dev Pointer to device struct of the driver instance
* @param[in] buf Pointer to UDC request buffer
*
* @return 0 on success, all other values should be treated as error.
* @retval -ENODEV endpoint configuration not found
* @retval -EACCES endpoint is not enabled (TBD)
* @retval -EBUSY request can not be queued
* @retval -EPERM controller is not initialized
*/
int udc_ep_enqueue(const struct device *dev, struct net_buf *const buf);
/**
* @brief Remove all USB device controller requests from endpoint queue
*
* UDC_EVT_EP_REQUEST event will be generated when the driver
* releases claimed buffer, no new requests will be claimed,
* all requests in the queue will passed as chained list of
* the event variable buf. The endpoint queue is empty after that.
*
* @param[in] dev Pointer to device struct of the driver instance
* @param[in] ep Endpoint address
*
* @return 0 on success, all other values should be treated as error.
* @retval -ENODEV endpoint configuration not found
* @retval -EACCES endpoint is not disabled
* @retval -EPERM controller is not initialized
*/
int udc_ep_dequeue(const struct device *dev, const uint8_t ep);
/**
* @brief Allocate UDC request buffer
*
* Allocate a new buffer from common request buffer pool.
*
* @param[in] dev Pointer to device struct of the driver instance
* @param[in] ep Endpoint address
* @param[in] size Size of the request buffer
*
* @return pointer to allocated request or NULL on error.
*/
struct net_buf *udc_ep_buf_alloc(const struct device *dev,
const uint8_t ep,
const size_t size);
/**
* @brief Free UDC request buffer
*
* Put the buffer back into the request buffer pool.
*
* @param[in] dev Pointer to device struct of the driver instance
* @param[in] buf Pointer to UDC request buffer
*
* @return 0 on success, all other values should be treated as error.
*/
int udc_ep_buf_free(const struct device *dev, struct net_buf *const buf);
/**
* @brief Set ZLP flag in requests metadata.
*
* The controller should send a ZLP at the end of the transfer.
*
* @param[in] buf Pointer to UDC request buffer
*/
static inline void udc_ep_buf_set_zlp(struct net_buf *const buf)
{
struct udc_buf_info *bi;
__ASSERT_NO_MSG(buf);
bi = (struct udc_buf_info *)net_buf_user_data(buf);
if (USB_EP_DIR_IS_IN(bi->ep)) {
bi->zlp = 1;
}
}
/**
* @brief Get requests metadata.
*
* @param[in] buf Pointer to UDC request buffer
*
* @return pointer to metadata structure.
*/
static inline struct udc_buf_info *udc_get_buf_info(const struct net_buf *const buf)
{
__ASSERT_NO_MSG(buf);
return (struct udc_buf_info *)net_buf_user_data(buf);
}
/**
* @brief Get pointer to higher layer context
*
* The address of the context is passed as an argument to the udc_init()
* function and is stored in the UDC data.
*
* @param[in] dev Pointer to device struct of the driver instance
*
* @return Opaque pointer to higher layer context
*/
static inline const void *udc_get_event_ctx(const struct device *dev)
{
struct udc_data *data = dev->data;
return data->event_ctx;
}
/**
* @}
*/
#endif /* ZEPHYR_INCLUDE_UDC_H */
``` | /content/code_sandbox/include/zephyr/drivers/usb/udc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 5,138 |
```objective-c
/* usb_dc.h - USB device controller driver interface */
/*
*
*/
/**
* @file
* @brief USB device controller APIs
*
* This file contains the USB device controller APIs. All device controller
* drivers should implement the APIs described in this file.
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_USB_USB_DC_H_
#define ZEPHYR_INCLUDE_DRIVERS_USB_USB_DC_H_
#include <zephyr/device.h>
/**
* @brief USB Device Controller API
* @defgroup _usb_device_controller_api USB Device Controller API
* @{
*/
/**
* @brief USB Driver Status Codes
*
* Status codes reported by the registered device status callback.
*/
enum usb_dc_status_code {
/** USB error reported by the controller */
USB_DC_ERROR,
/** USB reset */
USB_DC_RESET,
/** USB connection established, hardware enumeration is completed */
USB_DC_CONNECTED,
/** USB configuration done */
USB_DC_CONFIGURED,
/** USB connection lost */
USB_DC_DISCONNECTED,
/** USB connection suspended by the HOST */
USB_DC_SUSPEND,
/** USB connection resumed by the HOST */
USB_DC_RESUME,
/** USB interface selected */
USB_DC_INTERFACE,
/** Set Feature ENDPOINT_HALT received */
USB_DC_SET_HALT,
/** Clear Feature ENDPOINT_HALT received */
USB_DC_CLEAR_HALT,
/** Start of Frame received */
USB_DC_SOF,
/** Initial USB connection status */
USB_DC_UNKNOWN
};
/**
* @brief USB Endpoint Callback Status Codes
*
* Status Codes reported by the registered endpoint callback.
*/
enum usb_dc_ep_cb_status_code {
/** SETUP received */
USB_DC_EP_SETUP,
/** Out transaction on this EP, data is available for read */
USB_DC_EP_DATA_OUT,
/** In transaction done on this EP */
USB_DC_EP_DATA_IN
};
/**
* @brief USB Endpoint Transfer Type
*/
enum usb_dc_ep_transfer_type {
/** Control type endpoint */
USB_DC_EP_CONTROL = 0,
/** Isochronous type endpoint */
USB_DC_EP_ISOCHRONOUS,
/** Bulk type endpoint */
USB_DC_EP_BULK,
/** Interrupt type endpoint */
USB_DC_EP_INTERRUPT
};
/**
* @brief USB Endpoint Synchronization Type
*
* @note Valid only for Isochronous Endpoints
*/
enum usb_dc_ep_synchronozation_type {
/** No Synchronization */
USB_DC_EP_NO_SYNCHRONIZATION = (0U << 2U),
/** Asynchronous */
USB_DC_EP_ASYNCHRONOUS = (1U << 2U),
/** Adaptive */
USB_DC_EP_ADAPTIVE = (2U << 2U),
/** Synchronous*/
USB_DC_EP_SYNCHRONOUS = (3U << 2U)
};
/**
* @brief USB Endpoint Configuration.
*
* Structure containing the USB endpoint configuration.
*/
struct usb_dc_ep_cfg_data {
/** The number associated with the EP in the device
* configuration structure
* IN EP = 0x80 | \<endpoint number\>
* OUT EP = 0x00 | \<endpoint number\>
*/
uint8_t ep_addr;
/** Endpoint max packet size */
uint16_t ep_mps;
/** Endpoint Transfer Type.
* May be Bulk, Interrupt, Control or Isochronous
*/
enum usb_dc_ep_transfer_type ep_type;
};
/**
* Callback function signature for the USB Endpoint status
*/
typedef void (*usb_dc_ep_callback)(uint8_t ep,
enum usb_dc_ep_cb_status_code cb_status);
/**
* Callback function signature for the device
*/
typedef void (*usb_dc_status_callback)(enum usb_dc_status_code cb_status,
const uint8_t *param);
/**
* @brief Attach USB for device connection
*
* Function to attach USB for device connection. Upon success, the USB PLL
* is enabled, and the USB device is now capable of transmitting and receiving
* on the USB bus and of generating interrupts.
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_attach(void);
/**
* @brief Detach the USB device
*
* Function to detach the USB device. Upon success, the USB hardware PLL
* is powered down and USB communication is disabled.
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_detach(void);
/**
* @brief Reset the USB device
*
* This function returns the USB device and firmware back to it's initial state.
* N.B. the USB PLL is handled by the usb_detach function
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_reset(void);
/**
* @brief Set USB device address
*
* @param[in] addr Device address
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_set_address(const uint8_t addr);
/**
* @brief Set USB device controller status callback
*
* Function to set USB device controller status callback. The registered
* callback is used to report changes in the status of the device controller.
* The status code are described by the usb_dc_status_code enumeration.
*
* @param[in] cb Callback function
*/
void usb_dc_set_status_callback(const usb_dc_status_callback cb);
/**
* @brief check endpoint capabilities
*
* Function to check capabilities of an endpoint. usb_dc_ep_cfg_data structure
* provides the endpoint configuration parameters: endpoint address,
* endpoint maximum packet size and endpoint type.
* The driver should check endpoint capabilities and return 0 if the
* endpoint configuration is possible.
*
* @param[in] cfg Endpoint config
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_check_cap(const struct usb_dc_ep_cfg_data * const cfg);
/**
* @brief Configure endpoint
*
* Function to configure an endpoint. usb_dc_ep_cfg_data structure provides
* the endpoint configuration parameters: endpoint address, endpoint maximum
* packet size and endpoint type.
*
* @param[in] cfg Endpoint config
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_configure(const struct usb_dc_ep_cfg_data * const cfg);
/**
* @brief Set stall condition for the selected endpoint
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_set_stall(const uint8_t ep);
/**
* @brief Clear stall condition for the selected endpoint
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_clear_stall(const uint8_t ep);
/**
* @brief Check if the selected endpoint is stalled
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
* @param[out] stalled Endpoint stall status
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_is_stalled(const uint8_t ep, uint8_t *const stalled);
/**
* @brief Halt the selected endpoint
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_halt(const uint8_t ep);
/**
* @brief Enable the selected endpoint
*
* Function to enable the selected endpoint. Upon success interrupts are
* enabled for the corresponding endpoint and the endpoint is ready for
* transmitting/receiving data.
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_enable(const uint8_t ep);
/**
* @brief Disable the selected endpoint
*
* Function to disable the selected endpoint. Upon success interrupts are
* disabled for the corresponding endpoint and the endpoint is no longer able
* for transmitting/receiving data.
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_disable(const uint8_t ep);
/**
* @brief Flush the selected endpoint
*
* This function flushes the FIFOs for the selected endpoint.
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_flush(const uint8_t ep);
/**
* @brief Write data to the specified endpoint
*
* This function is called to write data to the specified endpoint. The
* supplied usb_ep_callback function will be called when data is transmitted
* out.
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
* @param[in] data Pointer to data to write
* @param[in] data_len Length of the data requested to write. This may
* be zero for a zero length status packet.
* @param[out] ret_bytes Bytes scheduled for transmission. This value
* may be NULL if the application expects all
* bytes to be written
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_write(const uint8_t ep, const uint8_t *const data,
const uint32_t data_len, uint32_t * const ret_bytes);
/**
* @brief Read data from the specified endpoint
*
* This function is called by the endpoint handler function, after an OUT
* interrupt has been received for that EP. The application must only call this
* function through the supplied usb_ep_callback function. This function clears
* the ENDPOINT NAK, if all data in the endpoint FIFO has been read,
* so as to accept more data from host.
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
* @param[in] data Pointer to data buffer to write to
* @param[in] max_data_len Max length of data to read
* @param[out] read_bytes Number of bytes read. If data is NULL and
* max_data_len is 0 the number of bytes
* available for read should be returned.
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_read(const uint8_t ep, uint8_t *const data,
const uint32_t max_data_len, uint32_t *const read_bytes);
/**
* @brief Set callback function for the specified endpoint
*
* Function to set callback function for notification of data received and
* available to application or transmit done on the selected endpoint,
* NULL if callback not required by application code. The callback status
* code is described by usb_dc_ep_cb_status_code.
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
* @param[in] cb Callback function
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_set_callback(const uint8_t ep, const usb_dc_ep_callback cb);
/**
* @brief Read data from the specified endpoint
*
* This is similar to usb_dc_ep_read, the difference being that, it doesn't
* clear the endpoint NAKs so that the consumer is not bogged down by further
* upcalls till he is done with the processing of the data. The caller should
* reactivate ep by invoking usb_dc_ep_read_continue() do so.
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
* @param[in] data Pointer to data buffer to write to
* @param[in] max_data_len Max length of data to read
* @param[out] read_bytes Number of bytes read. If data is NULL and
* max_data_len is 0 the number of bytes
* available for read should be returned.
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_read_wait(uint8_t ep, uint8_t *data, uint32_t max_data_len,
uint32_t *read_bytes);
/**
* @brief Continue reading data from the endpoint
*
* Clear the endpoint NAK and enable the endpoint to accept more data
* from the host. Usually called after usb_dc_ep_read_wait() when the consumer
* is fine to accept more data. Thus these calls together act as a flow control
* mechanism.
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_read_continue(uint8_t ep);
/**
* @brief Get endpoint max packet size
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
*
* @return Endpoint max packet size (mps)
*/
int usb_dc_ep_mps(uint8_t ep);
/**
* @brief Start the host wake up procedure.
*
* Function to wake up the host if it's currently in sleep mode.
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_wakeup_request(void);
/**
* @}
*/
#endif /* ZEPHYR_INCLUDE_DRIVERS_USB_USB_DC_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/usb/usb_dc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,870 |
```objective-c
/*
*
*/
/**
* @file
* @brief Backend APIs for the BC1.2 emulators.
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_USB_EMUL_BC12_H_
#define ZEPHYR_INCLUDE_DRIVERS_USB_EMUL_BC12_H_
#include <zephyr/drivers/emul.h>
#include <zephyr/drivers/usb/usb_bc12.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief BC1.2 backend emulator APIs
* @defgroup b12_emulator_backend BC1.2 backed emulator APIs
* @ingroup io_interfaces
* @{
*/
/**
* @cond INTERNAL_HIDDEN
*
* These are for internal use only, so skip these in public documentation.
*/
__subsystem struct bc12_emul_driver_api {
int (*set_charging_partner)(const struct emul *emul, enum bc12_type partner_type);
int (*set_pd_partner)(const struct emul *emul, bool connected);
};
/**
* @endcond
*/
/**
* @brief Set the charging partner type connected to the BC1.2 device.
*
* The corresponding BC1.2 emulator updates the vendor specific registers
* to simulate connection of the specified charging partner type. The emulator
* also generates an interrupt for processing by the real driver, if supported.
*
* @param target Pointer to the emulator structure for the BC1.2 emulator instance.
* @param partner_type The simulated partner type. Set to BC12_TYPE_NONE to
* disconnect the charging partner.
*
* @retval 0 If successful.
* @retval -EINVAL if the partner type is not supported.
*/
static inline int bc12_emul_set_charging_partner(const struct emul *target,
enum bc12_type partner_type)
{
const struct bc12_emul_driver_api *backend_api =
(const struct bc12_emul_driver_api *)target->backend_api;
return backend_api->set_charging_partner(target, partner_type);
}
/**
* @brief Set the portable device partner state.
*
* The corresponding BC1.2 emulator updates the vendor specific registers
* to simulate connection or disconnection of a portable device partner.
* The emulator also generates an interrupt for processing by the real driver,
* if supported.
*
* @param target Pointer to the emulator structure for the BC1.2 emulator instance.
* @param connected If true, emulate a connection of a portable device partner. If
* false, emulate a disconnect event.
*
* @retval 0 If successful.
* @retval -EINVAL if the connection/disconnection of PD partner is not supported.
*/
static inline int bc12_emul_set_pd_partner(const struct emul *target, bool connected)
{
const struct bc12_emul_driver_api *backend_api =
(const struct bc12_emul_driver_api *)target->backend_api;
return backend_api->set_pd_partner(target, connected);
}
#ifdef __cplusplus
}
#endif
/**
* @}
*/
#endif /* ZEPHYR_INCLUDE_DRIVERS_USB_EMUL_BC12_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/usb/emul_bc12.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 626 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_PWM_MAX31790_H_
#define ZEPHYR_INCLUDE_DRIVERS_PWM_MAX31790_H_
/**
* @name custom PWM flags for MAX31790
* These flags can be used with the PWM API in the upper 8 bits of pwm_flags_t
* They allow the usage of the RPM mode, which will cause the MAX31790 to
* measure the actual speed of the fan and automatically control it to the
* desired speed.
* @{
*/
/** @cond INTERNAL_HIDDEN */
#define PWM_MAX31790_FLAG_RPM_MODE_POS 8
#define PWM_MAX31790_FLAG_SPEED_RANGE_POS 9
#define PWM_MAX31790_FLAG_PWM_RATE_OF_CHANGE_POS 12
#define PWM_MAX31790_FLAG_SPIN_UP_POS 15
/** @endcond */
/*!
* @brief RPM mode
*
* Activating the RPM mode will cause the parameter pulse of @ref pwm_set_cycles
* to be interpreted as TACH target count. This basically is the number of internal
* pulses which occur during each TACH period. Hence, a bigger value means a slower
* rotation of the fan. The details about the TACH target count has to be calculated
* can be taken from the datasheet of the MAX31790.
*/
#define PWM_MAX31790_FLAG_RPM_MODE (1 << PWM_MAX31790_FLAG_RPM_MODE_POS)
/*!
* @brief speed range of fan
*
* This represents a multiplicator for the TACH count and should be chosen depending
* on the nominal RPM of the fan. A detailed table on how to choose a proper value
* can be found in the datasheet of the MAX31790.
*/
#define PWM_MAX31790_FLAG_SPEED_RANGE_1 (0 << PWM_MAX31790_FLAG_SPEED_RANGE_POS)
#define PWM_MAX31790_FLAG_SPEED_RANGE_2 (1 << PWM_MAX31790_FLAG_SPEED_RANGE_POS)
#define PWM_MAX31790_FLAG_SPEED_RANGE_4 (2 << PWM_MAX31790_FLAG_SPEED_RANGE_POS)
#define PWM_MAX31790_FLAG_SPEED_RANGE_8 (3 << PWM_MAX31790_FLAG_SPEED_RANGE_POS)
#define PWM_MAX31790_FLAG_SPEED_RANGE_16 (4 << PWM_MAX31790_FLAG_SPEED_RANGE_POS)
#define PWM_MAX31790_FLAG_SPEED_RANGE_32 (5 << PWM_MAX31790_FLAG_SPEED_RANGE_POS)
/*!
* @brief PWM rate of change
*
* Configures the internal control loop of the fan. Details about these values can be found
* in the datasheet of the MAX31790.
*/
#define PWM_MAX31790_FLAG_PWM_RATE_OF_CHANGE_0 (0 << PWM_MAX31790_FLAG_PWM_RATE_OF_CHANGE_POS)
#define PWM_MAX31790_FLAG_PWM_RATE_OF_CHANGE_1 (1 << PWM_MAX31790_FLAG_PWM_RATE_OF_CHANGE_POS)
#define PWM_MAX31790_FLAG_PWM_RATE_OF_CHANGE_2 (2 << PWM_MAX31790_FLAG_PWM_RATE_OF_CHANGE_POS)
#define PWM_MAX31790_FLAG_PWM_RATE_OF_CHANGE_3 (3 << PWM_MAX31790_FLAG_PWM_RATE_OF_CHANGE_POS)
#define PWM_MAX31790_FLAG_PWM_RATE_OF_CHANGE_4 (4 << PWM_MAX31790_FLAG_PWM_RATE_OF_CHANGE_POS)
#define PWM_MAX31790_FLAG_PWM_RATE_OF_CHANGE_5 (5 << PWM_MAX31790_FLAG_PWM_RATE_OF_CHANGE_POS)
#define PWM_MAX31790_FLAG_PWM_RATE_OF_CHANGE_6 (6 << PWM_MAX31790_FLAG_PWM_RATE_OF_CHANGE_POS)
#define PWM_MAX31790_FLAG_PWM_RATE_OF_CHANGE_7 (7 << PWM_MAX31790_FLAG_PWM_RATE_OF_CHANGE_POS)
/*!
* @brief activate spin up for fan
*
* This activates the spin up of the fan, which means that the controller will force the fan
* to maximum speed for a startup from a completely stopped state.
*/
#define PWM_MAX31790_FLAG_SPIN_UP (1 << PWM_MAX31790_FLAG_SPIN_UP_POS)
/** @} */
#endif /* ZEPHYR_INCLUDE_DRIVERS_PWM_MAX31790_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/pwm/max31790.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 828 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_INTERRUPT_CONTROLLER_GD32_EXTI_H_
#define ZEPHYR_INCLUDE_DRIVERS_INTERRUPT_CONTROLLER_GD32_EXTI_H_
#include <stdint.h>
#include <zephyr/sys/util_macro.h>
/**
* @name EXTI trigger modes.
* @anchor GD32_EXTI_TRIG
* @{
*/
/** No trigger */
#define GD32_EXTI_TRIG_NONE 0U
/** Trigger on rising edge */
#define GD32_EXTI_TRIG_RISING BIT(0)
/** Trigger on falling edge */
#define GD32_EXTI_TRIG_FALLING BIT(1)
/** Trigger on rising and falling edge */
#define GD32_EXTI_TRIG_BOTH (GD32_EXTI_TRIG_RISING | GD32_EXTI_TRIG_FALLING)
/** @} */
/** Callback for EXTI interrupt. */
typedef void (*gd32_exti_cb_t)(uint8_t line, void *user);
/**
* @brief Enable EXTI interrupt for the given line.
*
* @param line EXTI line.
*/
void gd32_exti_enable(uint8_t line);
/**
* @brief Disable EXTI interrupt for the given line.
*
* @param line EXTI line.
*/
void gd32_exti_disable(uint8_t line);
/**
* @brief Configure EXTI interrupt trigger mode for the given line.
*
* @param line EXTI line.
* @param trigger Trigger mode (see @ref GD32_EXTI_TRIG).
*/
void gd32_exti_trigger(uint8_t line, uint8_t trigger);
/**
* @brief Configure EXTI interrupt callback.
*
* @param line EXTI line.
* @param cb Callback (NULL to disable).
* @param user User data (optional).
*
* @retval 0 On success.
* @retval -EALREADY If callback is already set and @p cb is not NULL.
*/
int gd32_exti_configure(uint8_t line, gd32_exti_cb_t cb, void *user);
#endif /* ZEPHYR_INCLUDE_DRIVERS_INTERRUPT_CONTROLLER_GD32_EXTI_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/interrupt_controller/gd32_exti.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 420 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_SAM0_EIC_H_
#define ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_SAM0_EIC_H_
#include <zephyr/types.h>
/* callback for EIC interrupt */
typedef void (*sam0_eic_callback_t)(uint32_t pins, void *data);
/**
* @brief EIC trigger condition
*/
enum sam0_eic_trigger {
/* Rising edge */
SAM0_EIC_RISING,
/* Falling edge */
SAM0_EIC_FALLING,
/* Both edges */
SAM0_EIC_BOTH,
/* High level detection */
SAM0_EIC_HIGH,
/* Low level detection */
SAM0_EIC_LOW,
};
/**
* @brief Acquire an EIC interrupt for specific port and pin combination
*
* This acquires the EIC interrupt for a specific port and pin combination,
* or returns an error if the required line is not available. Only a single
* callback per port is supported and supplying a different one will
* change it for all lines on that port.
*
* @param port port index (A=0, etc)
* @param pin pin in the port
* @param trigger trigger condition
* @param filter enable filter
* @param cb interrupt callback
* @param data parameter to the interrupt callback
*/
int sam0_eic_acquire(int port, int pin, enum sam0_eic_trigger trigger,
bool filter, sam0_eic_callback_t cb, void *data);
/**
* @brief Release the EIC interrupt for a specific port and pin combination
*
* Release the EIC configuration for a specific port and pin combination.
* No effect if that combination does not currently hold the associated
* EIC line.
*
* @param port port index (A=0, etc)
* @param pin pin in the port
*/
int sam0_eic_release(int port, int pin);
/**
* @brief Enable the EIC interrupt for a specific port and pin combination
*
* @param port port index (A=0, etc)
* @param pin pin in the port
*/
int sam0_eic_enable_interrupt(int port, int pin);
/**
* @brief Disable the EIC interrupt for a specific port and pin combination
*
* @param port port index (A=0, etc)
* @param pin pin in the port
*/
int sam0_eic_disable_interrupt(int port, int pin);
/**
* @brief Test if there is an EIC interrupt pending for a port
*
* @param port port index (A=0, etc)
*/
uint32_t sam0_eic_interrupt_pending(int port);
#endif /* ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_SAM0_EIC_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/interrupt_controller/sam0_eic.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 580 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_SYSAPIC_H_
#define ZEPHYR_INCLUDE_DRIVERS_SYSAPIC_H_
#include <zephyr/drivers/interrupt_controller/loapic.h>
#define IRQ_TRIGGER_EDGE IOAPIC_EDGE
#define IRQ_TRIGGER_LEVEL IOAPIC_LEVEL
#define IRQ_POLARITY_HIGH IOAPIC_HIGH
#define IRQ_POLARITY_LOW IOAPIC_LOW
#ifndef _ASMLANGUAGE
#include <zephyr/types.h>
#define LOAPIC_IRQ_COUNT 6 /* Default to LOAPIC_TIMER to LOAPIC_ERROR */
void z_irq_controller_irq_config(unsigned int vector, unsigned int irq,
uint32_t flags);
int z_irq_controller_isr_vector_get(void);
static inline void z_irq_controller_eoi(void)
{
x86_write_loapic(LOAPIC_EOI, 0);
}
#endif /* _ASMLANGUAGE */
#endif /* ZEPHYR_INCLUDE_DRIVERS_SYSAPIC_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/interrupt_controller/sysapic.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 203 |
```objective-c
/*
*
*/
/**
* @brief Driver for Pin interrupt and pattern match engine in NXP MCUs
*
* The Pin interrupt and pattern match engine (PINT) supports
* sourcing inputs from any pins on GPIO ports 0 and 1 of NXP MCUs
* featuring the module, and generating interrupts based on these inputs.
* Pin inputs can generate separate interrupts to the NVIC, or be combined
* using the PINT's boolean logic based pattern match engine.
* This driver currently only supports the pin interrupt feature of
* the PINT.
*/
#ifndef ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_NXP_PINT_H_
#define ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_NXP_PINT_H_
#include <fsl_pint.h>
/**
* @brief Pin interrupt sources
*
* Pin interrupt sources available for use.
*/
enum nxp_pint_trigger {
/* Do not generate Pin Interrupt */
NXP_PINT_NONE = kPINT_PinIntEnableNone,
/* Generate Pin Interrupt on rising edge */
NXP_PINT_RISING = kPINT_PinIntEnableRiseEdge,
/* Generate Pin Interrupt on falling edge */
NXP_PINT_FALLING = kPINT_PinIntEnableFallEdge,
/* Generate Pin Interrupt on both edges */
NXP_PINT_BOTH = kPINT_PinIntEnableBothEdges,
/* Generate Pin Interrupt on low level */
NXP_PINT_LOW = kPINT_PinIntEnableLowLevel,
/* Generate Pin Interrupt on high level */
NXP_PINT_HIGH = kPINT_PinIntEnableHighLevel
};
/* Callback for NXP PINT interrupt */
typedef void (*nxp_pint_cb_t) (uint8_t pin, void *user);
/**
* @brief Enable PINT interrupt source.
*
* @param pin: pin to use as interrupt source
* 0-64, corresponding to GPIO0 pin 1 - GPIO1 pin 31)
* @param trigger: one of nxp_pint_trigger flags
* @param wake: indicates if the pin should wakeup the system
*/
int nxp_pint_pin_enable(uint8_t pin, enum nxp_pint_trigger trigger, bool wake);
/**
* @brief disable PINT interrupt source.
*
* @param pin: pin interrupt source to disable
*/
void nxp_pint_pin_disable(uint8_t pin);
/**
* @brief Install PINT callback
*
* @param pin: interrupt source to install callback for
* @param cb: callback to install
* @param data: user data to include in callback
* @return 0 on success, or negative value on error
*/
int nxp_pint_pin_set_callback(uint8_t pin, nxp_pint_cb_t cb, void *data);
/**
* @brief Remove PINT callback
*
* @param pin: interrupt source to remove callback for
*/
void nxp_pint_pin_unset_callback(uint8_t pin);
#endif /* ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_NXP_PINT_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/interrupt_controller/nxp_pint.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 630 |
```objective-c
/* loapic.h - public LOAPIC APIs */
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_LOAPIC_H_
#define ZEPHYR_INCLUDE_DRIVERS_LOAPIC_H_
#include <zephyr/arch/cpu.h>
#include <zephyr/arch/x86/msr.h>
#include <zephyr/sys/device_mmio.h>
/* Local APIC Register Offset */
#define LOAPIC_ID 0x020 /* Local APIC ID Reg */
#define LOAPIC_VER 0x030 /* Local APIC Version Reg */
#define LOAPIC_TPR 0x080 /* Task Priority Reg */
#define LOAPIC_APR 0x090 /* Arbitration Priority Reg */
#define LOAPIC_PPR 0x0a0 /* Processor Priority Reg */
#define LOAPIC_EOI 0x0b0 /* EOI Reg */
#define LOAPIC_LDR 0x0d0 /* Logical Destination Reg */
#define LOAPIC_DFR 0x0e0 /* Destination Format Reg */
#define LOAPIC_SVR 0x0f0 /* Spurious Interrupt Reg */
#define LOAPIC_ISR 0x100 /* In-service Reg */
#define LOAPIC_TMR 0x180 /* Trigger Mode Reg */
#define LOAPIC_IRR 0x200 /* Interrupt Request Reg */
#define LOAPIC_ESR 0x280 /* Error Status Reg */
#define LOAPIC_ICRLO 0x300 /* Interrupt Command Reg */
#define LOAPIC_ICRHI 0x310 /* Interrupt Command Reg */
#define LOAPIC_TIMER 0x320 /* LVT (Timer) */
#define LOAPIC_THERMAL 0x330 /* LVT (Thermal) */
#define LOAPIC_PMC 0x340 /* LVT (PMC) */
#define LOAPIC_LINT0 0x350 /* LVT (LINT0) */
#define LOAPIC_LINT1 0x360 /* LVT (LINT1) */
#define LOAPIC_ERROR 0x370 /* LVT (ERROR) */
#define LOAPIC_TIMER_ICR 0x380 /* Timer Initial Count Reg */
#define LOAPIC_TIMER_CCR 0x390 /* Timer Current Count Reg */
#define LOAPIC_TIMER_CONFIG 0x3e0 /* Timer Divide Config Reg */
#define LOAPIC_SELF_IPI 0x3f0 /* Self IPI Reg, only support in X2APIC mode */
#define LOAPIC_ICR_BUSY 0x00001000 /* delivery status: 1 = busy */
#define LOAPIC_ICR_IPI_OTHERS 0x000C4000U /* normal IPI to other CPUs */
#define LOAPIC_ICR_IPI_INIT 0x00004500U
#define LOAPIC_ICR_IPI_STARTUP 0x00004600U
#define LOAPIC_LVT_MASKED 0x00010000 /* mask */
/* Defined in intc_loapic.c */
#define LOAPIC_REGS_STR loapic_regs /* mmio device name */
#ifndef _ASMLANGUAGE
#ifdef __cplusplus
extern "C" {
#endif
DEVICE_MMIO_TOPLEVEL_DECLARE(LOAPIC_REGS_STR);
uint32_t z_loapic_irq_base(void);
void z_loapic_enable(unsigned char cpu_number);
void z_loapic_int_vec_set(unsigned int irq, unsigned int vector);
void z_loapic_irq_enable(unsigned int irq);
void z_loapic_irq_disable(unsigned int irq);
/**
* @brief Read 64-bit value from the local APIC in x2APIC mode.
*
* @param reg the LOAPIC register number to read (LOAPIC_*)
*/
static inline uint64_t x86_read_x2apic(unsigned int reg)
{
reg >>= 4;
return z_x86_msr_read(X86_X2APIC_BASE_MSR + reg);
}
/**
* @brief Read 32-bit value from the local APIC in xAPIC (MMIO) mode.
*
* @param reg the LOAPIC register number to read (LOAPIC_*)
*/
static inline uint32_t x86_read_xapic(unsigned int reg)
{
mm_reg_t base;
base = DEVICE_MMIO_TOPLEVEL_GET(LOAPIC_REGS_STR);
return sys_read32(base + reg);
}
/**
* @brief Read value from the local APIC using the default mode.
*
* Returns a 32-bit value read from the local APIC, using the access
* method determined by CONFIG_X2APIC (either xAPIC or x2APIC). Note
* that 64-bit reads are only allowed in x2APIC mode and can only be
* done by calling x86_read_x2apic() directly. (This is intentional.)
*
* @param reg the LOAPIC register number to read (LOAPIC_*)
*/
static inline uint32_t x86_read_loapic(unsigned int reg)
{
#ifdef CONFIG_X2APIC
return x86_read_x2apic(reg);
#else
return x86_read_xapic(reg);
#endif
}
/**
* @brief Write 64-bit value to the local APIC in x2APIC mode.
*
* @param reg the LOAPIC register number to write (one of LOAPIC_*)
* @param val 64-bit value to write
*/
static inline void x86_write_x2apic(unsigned int reg, uint64_t val)
{
reg >>= 4;
z_x86_msr_write(X86_X2APIC_BASE_MSR + reg, val);
}
/**
* @brief Write 32-bit value to the local APIC in xAPIC (MMIO) mode.
*
* @param reg the LOAPIC register number to write (one of LOAPIC_*)
* @param val 32-bit value to write
*/
static inline void x86_write_xapic(unsigned int reg, uint32_t val)
{
mm_reg_t base;
base = DEVICE_MMIO_TOPLEVEL_GET(LOAPIC_REGS_STR);
sys_write32(val, base + reg);
}
/**
* @brief Write 32-bit value to the local APIC using the default mode.
*
* Write a 32-bit value to the local APIC, using the access method
* determined by CONFIG_X2APIC (either xAPIC or x2APIC). Note that
* 64-bit writes are only available in x2APIC mode and can only be
* done by calling x86_write_x2apic() directly. (This is intentional.)
*
* @param reg the LOAPIC register number to write (one of LOAPIC_*)
* @param val 32-bit value to write
*/
static inline void x86_write_loapic(unsigned int reg, uint32_t val)
{
#ifdef CONFIG_X2APIC
x86_write_x2apic(reg, val);
#else
x86_write_xapic(reg, val);
#endif
}
/**
* @brief Send an IPI.
*
* @param apic_id If applicable, the target CPU APIC ID (0 otherwise).
* @param ipi Type of IPI: one of the LOAPIC_ICR_IPI_* constants.
* @param vector If applicable, the target vector (0 otherwise).
*/
static inline void z_loapic_ipi(uint8_t apic_id, uint32_t ipi, uint8_t vector)
{
ipi |= vector;
#ifndef CONFIG_X2APIC
/*
* Legacy xAPIC mode: first wait for any previous IPI to be delivered.
*/
while (x86_read_xapic(LOAPIC_ICRLO) & LOAPIC_ICR_BUSY) {
}
x86_write_xapic(LOAPIC_ICRHI, apic_id << 24);
x86_write_xapic(LOAPIC_ICRLO, ipi);
#else
/*
* x2APIC mode is greatly simplified: one write, no delivery status.
*/
x86_write_x2apic(LOAPIC_ICRLO, (((uint64_t) apic_id) << 32) | ipi);
#endif
}
#ifdef __cplusplus
}
#endif
#endif /* _ASMLANGUAGE */
#endif /* ZEPHYR_INCLUDE_DRIVERS_LOAPIC_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/interrupt_controller/loapic.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,765 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_ESP_INTR_ALLOC_H__
#define ZEPHYR_INCLUDE_DRIVERS_ESP_INTR_ALLOC_H__
#include <stdint.h>
#include <stdbool.h>
/* number of possible interrupts per core */
#define ESP_INTC_INTS_NUM (32)
/*
* Interrupt allocation flags - These flags can be used to specify
* which interrupt qualities the code calling esp_intr_alloc* needs.
*
*/
/* Keep the LEVELx values as they are here; they match up with (1<<level) */
#define ESP_INTR_FLAG_LEVEL1 (1<<1) /* Accept a Level 1 int vector, lowest priority */
#define ESP_INTR_FLAG_LEVEL2 (1<<2) /* Accept a Level 2 int vector */
#define ESP_INTR_FLAG_LEVEL3 (1<<3) /* Accept a Level 3 int vector */
#define ESP_INTR_FLAG_LEVEL4 (1<<4) /* Accept a Level 4 int vector */
#define ESP_INTR_FLAG_LEVEL5 (1<<5) /* Accept a Level 5 int vector */
#define ESP_INTR_FLAG_LEVEL6 (1<<6) /* Accept a Level 6 int vector */
#define ESP_INTR_FLAG_NMI (1<<7) /* Accept a Level 7 int vector, highest priority */
#define ESP_INTR_FLAG_SHARED (1<<8) /* Interrupt can be shared between ISRs */
#define ESP_INTR_FLAG_EDGE (1<<9) /* Edge-triggered interrupt */
#define ESP_INTR_FLAG_IRAM (1<<10) /* ISR can be called if cache is disabled */
#define ESP_INTR_FLAG_INTRDISABLED (1<<11) /* Return with this interrupt disabled */
/* Low and medium prio interrupts. These can be handled in C. */
#define ESP_INTR_FLAG_LOWMED (ESP_INTR_FLAG_LEVEL1|ESP_INTR_FLAG_LEVEL2|ESP_INTR_FLAG_LEVEL3)
/* High level interrupts. Need to be handled in assembly. */
#define ESP_INTR_FLAG_HIGH (ESP_INTR_FLAG_LEVEL4|ESP_INTR_FLAG_LEVEL5|ESP_INTR_FLAG_LEVEL6| \
ESP_INTR_FLAG_NMI)
/* Mask for all level flags */
#define ESP_INTR_FLAG_LEVELMASK (ESP_INTR_FLAG_LEVEL1|ESP_INTR_FLAG_LEVEL2|ESP_INTR_FLAG_LEVEL3| \
ESP_INTR_FLAG_LEVEL4|ESP_INTR_FLAG_LEVEL5|ESP_INTR_FLAG_LEVEL6| \
ESP_INTR_FLAG_NMI)
/*
* The esp_intr_alloc* functions can allocate an int for all *_INTR_SOURCE int sources that
* are routed through the interrupt mux. Apart from these sources, each core also has some internal
* sources that do not pass through the interrupt mux. To allocate an interrupt for these sources,
* pass these pseudo-sources to the functions.
*/
#define ETS_INTERNAL_TIMER0_INTR_SOURCE -1 /* Xtensa timer 0 interrupt source */
#define ETS_INTERNAL_TIMER1_INTR_SOURCE -2 /* Xtensa timer 1 interrupt source */
#define ETS_INTERNAL_TIMER2_INTR_SOURCE -3 /* Xtensa timer 2 interrupt source */
#define ETS_INTERNAL_SW0_INTR_SOURCE -4 /* Software int source 1 */
#define ETS_INTERNAL_SW1_INTR_SOURCE -5 /* Software int source 2 */
#define ETS_INTERNAL_PROFILING_INTR_SOURCE -6 /* Int source for profiling */
/* Function prototype for interrupt handler function */
typedef void (*intr_handler_t)(void *arg);
struct shared_vector_desc_t {
int disabled : 1;
int source : 8;
volatile uint32_t *statusreg;
uint32_t statusmask;
intr_handler_t isr;
void *arg;
struct shared_vector_desc_t *next;
};
/* Pack using bitfields for better memory use */
struct vector_desc_t {
int flags : 16; /* OR of VECDESC_FLAG_* defines */
unsigned int cpu : 1;
unsigned int intno : 5;
int source : 8; /* Int mux flags, used when not shared */
struct shared_vector_desc_t *shared_vec_info; /* used when VECDESC_FL_SHARED */
struct vector_desc_t *next;
};
/** Interrupt handler associated data structure */
struct intr_handle_data_t {
struct vector_desc_t *vector_desc;
struct shared_vector_desc_t *shared_vector_desc;
};
/**
* @brief Initializes interrupt table to its defaults
*/
void esp_intr_initialize(void);
/**
* @brief Mark an interrupt as a shared interrupt
*
* This will mark a certain interrupt on the specified CPU as
* an interrupt that can be used to hook shared interrupt handlers
* to.
*
* @param intno The number of the interrupt (0-31)
* @param cpu CPU on which the interrupt should be marked as shared (0 or 1)
* @param is_in_iram Shared interrupt is for handlers that reside in IRAM and
* the int can be left enabled while the flash cache is disabled.
*
* @return -EINVAL if cpu or intno is invalid
* 0 otherwise
*/
int esp_intr_mark_shared(int intno, int cpu, bool is_in_iram);
/**
* @brief Reserve an interrupt to be used outside of this framework
*
* This will mark a certain interrupt on the specified CPU as
* reserved, not to be allocated for any reason.
*
* @param intno The number of the interrupt (0-31)
* @param cpu CPU on which the interrupt should be marked as shared (0 or 1)
*
* @return -EINVAL if cpu or intno is invalid
* 0 otherwise
*/
int esp_intr_reserve(int intno, int cpu);
/**
* @brief Allocate an interrupt with the given parameters.
*
* This finds an interrupt that matches the restrictions as given in the flags
* parameter, maps the given interrupt source to it and hooks up the given
* interrupt handler (with optional argument) as well. If needed, it can return
* a handle for the interrupt as well.
*
* The interrupt will always be allocated on the core that runs this function.
*
* If ESP_INTR_FLAG_IRAM flag is used, and handler address is not in IRAM or
* RTC_FAST_MEM, then ESP_ERR_INVALID_ARG is returned.
*
* @param source The interrupt source. One of the *_INTR_SOURCE interrupt mux
* sources, as defined in esp-xtensa-intmux.h, or one of the internal
* ETS_INTERNAL_*_INTR_SOURCE sources as defined in this header.
* @param flags An ORred mask of the ESP_INTR_FLAG_* defines. These restrict the
* choice of interrupts that this routine can choose from. If this value
* is 0, it will default to allocating a non-shared interrupt of level
* 1, 2 or 3. If this is ESP_INTR_FLAG_SHARED, it will allocate a shared
* interrupt of level 1. Setting ESP_INTR_FLAG_INTRDISABLED will return
* from this function with the interrupt disabled.
* @param handler The interrupt handler. Must be NULL when an interrupt of level >3
* is requested, because these types of interrupts aren't C-callable.
* @param arg Optional argument for passed to the interrupt handler
* @param ret_handle Pointer to a struct intr_handle_data_t pointer to store a handle that can
* later be used to request details or free the interrupt. Can be NULL if no handle
* is required.
*
* @return -EINVAL if the combination of arguments is invalid.
* -ENODEV No free interrupt found with the specified flags
* 0 otherwise
*/
int esp_intr_alloc(int source,
int flags,
intr_handler_t handler,
void *arg,
struct intr_handle_data_t **ret_handle);
/**
* @brief Allocate an interrupt with the given parameters.
*
*
* This essentially does the same as esp_intr_alloc, but allows specifying a register and mask
* combo. For shared interrupts, the handler is only called if a read from the specified
* register, ANDed with the mask, returns non-zero. By passing an interrupt status register
* address and a fitting mask, this can be used to accelerate interrupt handling in the case
* a shared interrupt is triggered; by checking the interrupt statuses first, the code can
* decide which ISRs can be skipped
*
* @param source The interrupt source. One of the *_INTR_SOURCE interrupt mux
* sources, as defined in esp-xtensa-intmux.h, or one of the internal
* ETS_INTERNAL_*_INTR_SOURCE sources as defined in this header.
* @param flags An ORred mask of the ESP_INTR_FLAG_* defines. These restrict the
* choice of interrupts that this routine can choose from. If this value
* is 0, it will default to allocating a non-shared interrupt of level
* 1, 2 or 3. If this is ESP_INTR_FLAG_SHARED, it will allocate a shared
* interrupt of level 1. Setting ESP_INTR_FLAG_INTRDISABLED will return
* from this function with the interrupt disabled.
* @param intrstatusreg The address of an interrupt status register
* @param intrstatusmask A mask. If a read of address intrstatusreg has any of the bits
* that are 1 in the mask set, the ISR will be called. If not, it will be
* skipped.
* @param handler The interrupt handler. Must be NULL when an interrupt of level >3
* is requested, because these types of interrupts aren't C-callable.
* @param arg Optional argument for passed to the interrupt handler
* @param ret_handle Pointer to a struct intr_handle_data_t pointer to store a handle that can
* later be used to request details or free the interrupt. Can be NULL if no handle
* is required.
*
* @return -EINVAL if the combination of arguments is invalid.
* -ENODEV No free interrupt found with the specified flags
* 0 otherwise
*/
int esp_intr_alloc_intrstatus(int source,
int flags,
uint32_t intrstatusreg,
uint32_t intrstatusmask,
intr_handler_t handler,
void *arg,
struct intr_handle_data_t **ret_handle);
/**
* @brief Disable and free an interrupt.
*
* Use an interrupt handle to disable the interrupt and release the resources associated with it.
* If the current core is not the core that registered this interrupt, this routine will be
* assigned to the core that allocated this interrupt, blocking and waiting until the resource
* is successfully released.
*
* @note
* When the handler shares its source with other handlers, the interrupt status bits
* it's responsible for should be managed properly before freeing it. See ``esp_intr_disable``
* for more details. Please do not call this function in ``esp_ipc_call_blocking``.
*
* @param handle The handle, as obtained by esp_intr_alloc or esp_intr_alloc_intrstatus
*
* @return -EINVAL the handle is NULL
* 0 otherwise
*/
int esp_intr_free(struct intr_handle_data_t *handle);
/**
* @brief Get CPU number an interrupt is tied to
*
* @param handle The handle, as obtained by esp_intr_alloc or esp_intr_alloc_intrstatus
*
* @return The core number where the interrupt is allocated
*/
int esp_intr_get_cpu(struct intr_handle_data_t *handle);
/**
* @brief Get the allocated interrupt for a certain handle
*
* @param handle The handle, as obtained by esp_intr_alloc or esp_intr_alloc_intrstatus
*
* @return The interrupt number
*/
int esp_intr_get_intno(struct intr_handle_data_t *handle);
/**
* @brief Disable the interrupt associated with the handle
*
* @note
* 1. For local interrupts (``ESP_INTERNAL_*`` sources), this function has to be called on the
* CPU the interrupt is allocated on. Other interrupts have no such restriction.
* 2. When several handlers sharing a same interrupt source, interrupt status bits, which are
* handled in the handler to be disabled, should be masked before the disabling, or handled
* in other enabled interrupts properly. Miss of interrupt status handling will cause infinite
* interrupt calls and finally system crash.
*
* @param handle The handle, as obtained by esp_intr_alloc or esp_intr_alloc_intrstatus
*
* @return -EINVAL if the combination of arguments is invalid.
* 0 otherwise
*/
int esp_intr_disable(struct intr_handle_data_t *handle);
/**
* @brief Enable the interrupt associated with the handle
*
* @note For local interrupts (``ESP_INTERNAL_*`` sources), this function has to be called on the
* CPU the interrupt is allocated on. Other interrupts have no such restriction.
*
* @param handle The handle, as obtained by esp_intr_alloc or esp_intr_alloc_intrstatus
*
* @return -EINVAL if the combination of arguments is invalid.
* 0 otherwise
*/
int esp_intr_enable(struct intr_handle_data_t *handle);
/**
* @brief Set the "in IRAM" status of the handler.
*
* @note Does not work on shared interrupts.
*
* @param handle The handle, as obtained by esp_intr_alloc or esp_intr_alloc_intrstatus
* @param is_in_iram Whether the handler associated with this handle resides in IRAM.
* Handlers residing in IRAM can be called when cache is disabled.
*
* @return -EINVAL if the combination of arguments is invalid.
* 0 otherwise
*/
int esp_intr_set_in_iram(struct intr_handle_data_t *handle, bool is_in_iram);
/**
* @brief Disable interrupts that aren't specifically marked as running from IRAM
*/
void esp_intr_noniram_disable(void);
/**
* @brief Re-enable interrupts disabled by esp_intr_noniram_disable
*/
void esp_intr_noniram_enable(void);
#endif
``` | /content/code_sandbox/include/zephyr/drivers/interrupt_controller/intc_esp32.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,894 |
```objective-c
/* ioapic.h - public IOAPIC APIs */
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_IOAPIC_H_
#define ZEPHYR_INCLUDE_DRIVERS_IOAPIC_H_
#ifdef __cplusplus
extern "C" {
#endif
/*
* Redirection table entry bits: lower 32 bit
* Used as flags argument in ioapic_irq_set
*/
#define IOAPIC_INT_MASK 0x00010000
#define IOAPIC_TRIGGER_MASK 0x00008000
#define IOAPIC_LEVEL 0x00008000
#define IOAPIC_EDGE 0x00000000
#define IOAPIC_REMOTE 0x00004000
#define IOAPIC_POLARITY_MASK 0x00002000
#define IOAPIC_LOW 0x00002000
#define IOAPIC_HIGH 0x00000000
#define IOAPIC_LOGICAL 0x00000800
#define IOAPIC_PHYSICAL 0x00000000
#define IOAPIC_DELIVERY_MODE_MASK 0x00000700
#define IOAPIC_FIXED 0x00000000
#define IOAPIC_LOWEST 0x00000100
#define IOAPIC_SMI 0x00000200
#define IOAPIC_NMI 0x00000400
#define IOAPIC_INIT 0x00000500
#define IOAPIC_EXTINT 0x00000700
#ifndef _ASMLANGUAGE
uint32_t z_ioapic_num_rtes(void);
void z_ioapic_irq_enable(unsigned int irq);
void z_ioapic_irq_disable(unsigned int irq);
void z_ioapic_int_vec_set(unsigned int irq, unsigned int vector);
void z_ioapic_irq_set(unsigned int irq, unsigned int vector, uint32_t flags);
#endif /* _ASMLANGUAGE */
#ifdef __cplusplus
}
#endif
#endif /* ZEPHYR_INCLUDE_DRIVERS_IOAPIC_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/interrupt_controller/ioapic.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 402 |
```objective-c
/*
*
*/
/**
* @file
* @brief Driver for Core-Local Interrupt Controller (CLIC)
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_RISCV_CLIC_H_
#define ZEPHYR_INCLUDE_DRIVERS_RISCV_CLIC_H_
/**
* @brief Enable interrupt
*
* @param irq interrupt ID
*/
void riscv_clic_irq_enable(uint32_t irq);
/**
* @brief Disable interrupt
*
* @param irq interrupt ID
*/
void riscv_clic_irq_disable(uint32_t irq);
/**
* @brief Check if an interrupt is enabled
*
* @param irq interrupt ID
* @return Returns true if interrupt is enabled, false otherwise
*/
int riscv_clic_irq_is_enabled(uint32_t irq);
/**
* @brief Set interrupt priority
*
* @param irq interrupt ID
* @param prio interrupt priority
* @param flags interrupt flags
*/
void riscv_clic_irq_priority_set(uint32_t irq, uint32_t prio, uint32_t flags);
#endif /* ZEPHYR_INCLUDE_DRIVERS_RISCV_CLIC_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/interrupt_controller/riscv_clic.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 231 |
```objective-c
/*
*
*/
/**
* @file
* @brief Driver for ARM Generic Interrupt Controller
*
* The Generic Interrupt Controller (GIC) is the default interrupt controller
* for the ARM A and R profile cores. This driver is used by the ARM arch
* implementation to handle interrupts.
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_GIC_H_
#define ZEPHYR_INCLUDE_DRIVERS_GIC_H_
/*
* GIC Register Interface Base Addresses
*/
#define GIC_DIST_BASE DT_REG_ADDR_BY_IDX(DT_INST(0, arm_gic), 0)
#define GIC_CPU_BASE DT_REG_ADDR_BY_IDX(DT_INST(0, arm_gic), 1)
/*
* GIC Distributor Interface
*/
/*
* 0x000 Distributor Control Register
* v1 ICDDCR
* v2/v3 GICD_CTLR
*/
#define GICD_CTLR (GIC_DIST_BASE + 0x0)
/*
* 0x004 Interrupt Controller Type Register
* v1 ICDICTR
* v2/v3 GICD_TYPER
*/
#define GICD_TYPER (GIC_DIST_BASE + 0x4)
/*
* 0x008 Distributor Implementer Identification Register
* v1 ICDIIDR
* v2/v3 GICD_IIDR
*/
#define GICD_IIDR (GIC_DIST_BASE + 0x8)
/*
* 0x080 Interrupt Group Registers
* v1 ICDISRn
* v2/v3 GICD_IGROUPRn
*/
#define GICD_IGROUPRn (GIC_DIST_BASE + 0x80)
/*
* 0x100 Interrupt Set-Enable Registers
* v1 ICDISERn
* v2/v3 GICD_ISENABLERn
*/
#define GICD_ISENABLERn (GIC_DIST_BASE + 0x100)
/*
* 0x180 Interrupt Clear-Enable Registers
* v1 ICDICERn
* v2/v3 GICD_ICENABLERn
*/
#define GICD_ICENABLERn (GIC_DIST_BASE + 0x180)
/*
* 0x200 Interrupt Set-Pending Registers
* v1 ICDISPRn
* v2/v3 GICD_ISPENDRn
*/
#define GICD_ISPENDRn (GIC_DIST_BASE + 0x200)
/*
* 0x280 Interrupt Clear-Pending Registers
* v1 ICDICPRn
* v2/v3 GICD_ICPENDRn
*/
#define GICD_ICPENDRn (GIC_DIST_BASE + 0x280)
/*
* 0x300 Interrupt Set-Active Registers
* v1 ICDABRn
* v2/v3 GICD_ISACTIVERn
*/
#define GICD_ISACTIVERn (GIC_DIST_BASE + 0x300)
#if CONFIG_GIC_VER >= 2
/*
* 0x380 Interrupt Clear-Active Registers
* v2/v3 GICD_ICACTIVERn
*/
#define GICD_ICACTIVERn (GIC_DIST_BASE + 0x380)
#endif
/*
* 0x400 Interrupt Priority Registers
* v1 ICDIPRn
* v2/v3 GICD_IPRIORITYRn
*/
#define GICD_IPRIORITYRn (GIC_DIST_BASE + 0x400)
/*
* 0x800 Interrupt Processor Targets Registers
* v1 ICDIPTRn
* v2/v3 GICD_ITARGETSRn
*/
#define GICD_ITARGETSRn (GIC_DIST_BASE + 0x800)
/*
* 0xC00 Interrupt Configuration Registers
* v1 ICDICRn
* v2/v3 GICD_ICFGRn
*/
#define GICD_ICFGRn (GIC_DIST_BASE + 0xc00)
/*
* 0xF00 Software Generated Interrupt Register
* v1 ICDSGIR
* v2/v3 GICD_SGIR
*/
#define GICD_SGIR (GIC_DIST_BASE + 0xf00)
/*
* GIC CPU Interface
*/
#if CONFIG_GIC_VER <= 2
/*
* 0x0000 CPU Interface Control Register
* v1 ICCICR
* v2/v3 GICC_CTLR
*/
#define GICC_CTLR (GIC_CPU_BASE + 0x0)
/*
* 0x0004 Interrupt Priority Mask Register
* v1 ICCPMR
* v2/v3 GICC_PMR
*/
#define GICC_PMR (GIC_CPU_BASE + 0x4)
/*
* 0x0008 Binary Point Register
* v1 ICCBPR
* v2/v3 GICC_BPR
*/
#define GICC_BPR (GIC_CPU_BASE + 0x8)
/*
* 0x000C Interrupt Acknowledge Register
* v1 ICCIAR
* v2/v3 GICC_IAR
*/
#define GICC_IAR (GIC_CPU_BASE + 0xc)
/*
* 0x0010 End of Interrupt Register
* v1 ICCEOIR
* v2/v3 GICC_EOIR
*/
#define GICC_EOIR (GIC_CPU_BASE + 0x10)
/*
* Helper Constants
*/
/* GICC_CTLR */
#define GICC_CTLR_ENABLEGRP0 BIT(0)
#define GICC_CTLR_ENABLEGRP1 BIT(1)
#define GICC_CTLR_ENABLE_MASK (GICC_CTLR_ENABLEGRP0 | GICC_CTLR_ENABLEGRP1)
#if defined(CONFIG_GIC_V2)
#define GICC_CTLR_FIQBYPDISGRP0 BIT(5)
#define GICC_CTLR_IRQBYPDISGRP0 BIT(6)
#define GICC_CTLR_FIQBYPDISGRP1 BIT(7)
#define GICC_CTLR_IRQBYPDISGRP1 BIT(8)
#define GICC_CTLR_BYPASS_MASK (GICC_CTLR_FIQBYPDISGRP0 | \
GICC_CTLR_IRQBYPDISGRP1 | \
GICC_CTLR_FIQBYPDISGRP1 | \
GICC_CTLR_IRQBYPDISGRP1)
#endif /* CONFIG_GIC_V2 */
/* GICD_SGIR */
#define GICD_SGIR_TGTFILT(x) ((x) << 24)
#define GICD_SGIR_TGTFILT_CPULIST GICD_SGIR_TGTFILT(0b00)
#define GICD_SGIR_TGTFILT_ALLBUTREQ GICD_SGIR_TGTFILT(0b01)
#define GICD_SGIR_TGTFILT_REQONLY GICD_SGIR_TGTFILT(0b10)
#define GICD_SGIR_CPULIST(x) ((x) << 16)
#define GICD_SGIR_CPULIST_CPU(n) GICD_SGIR_CPULIST(BIT(n))
#define GICD_SGIR_CPULIST_MASK 0xff
#define GICD_SGIR_NSATT BIT(15)
#define GICD_SGIR_SGIINTID(x) (x)
#endif /* CONFIG_GIC_VER <= 2 */
/* GICD_ICFGR */
#define GICD_ICFGR_MASK BIT_MASK(2)
#define GICD_ICFGR_TYPE BIT(1)
/* GICD_TYPER.ITLinesNumber 0:4 */
#define GICD_TYPER_ITLINESNUM_MASK 0x1f
/* GICD_TYPER.IDbits */
#define GICD_TYPER_IDBITS(typer) ((((typer) >> 19) & 0x1f) + 1)
/*
* Common Helper Constants
*/
#define GIC_SGI_INT_BASE 0
#define GIC_PPI_INT_BASE 16
#define GIC_IS_SGI(intid) (((intid) >= GIC_SGI_INT_BASE) && \
((intid) < GIC_PPI_INT_BASE))
#define GIC_SPI_INT_BASE 32
#define GIC_SPI_MAX_INTID 1019
#define GIC_IS_SPI(intid) (((intid) >= GIC_SPI_INT_BASE) && \
((intid) <= GIC_SPI_MAX_INTID))
#define GIC_NUM_INTR_PER_REG 32
#define GIC_NUM_CFG_PER_REG 16
#define GIC_NUM_PRI_PER_REG 4
/* GIC idle priority : value '0xff' will allow all interrupts */
#define GIC_IDLE_PRIO 0xff
/* Priority levels 0:255 */
#define GIC_PRI_MASK 0xff
/*
* '0xa0'is used to initialize each interrupt default priority.
* This is an arbitrary value in current context.
* Any value '0x80' to '0xff' will work for both NS and S state.
* The values of individual interrupt and default has to be chosen
* carefully if PMR and BPR based nesting and preemption has to be done.
*/
#define GIC_INT_DEF_PRI_X4 0xa0a0a0a0
/* GIC special interrupt id */
#define GIC_INTID_SPURIOUS 1023
/* Fixme: update from platform specific define or dt */
#define GIC_NUM_CPU_IF CONFIG_MP_MAX_NUM_CPUS
#ifndef _ASMLANGUAGE
#include <zephyr/types.h>
#include <zephyr/device.h>
/*
* GIC Driver Interface Functions
*/
/**
* @brief Enable interrupt
*
* @param irq interrupt ID
*/
void arm_gic_irq_enable(unsigned int irq);
/**
* @brief Disable interrupt
*
* @param irq interrupt ID
*/
void arm_gic_irq_disable(unsigned int irq);
/**
* @brief Check if an interrupt is enabled
*
* @param irq interrupt ID
* @return Returns true if interrupt is enabled, false otherwise
*/
bool arm_gic_irq_is_enabled(unsigned int irq);
/**
* @brief Check if an interrupt is pending
*
* @param irq interrupt ID
* @return Returns true if interrupt is pending, false otherwise
*/
bool arm_gic_irq_is_pending(unsigned int irq);
/**
* @brief Set interrupt as pending
*
* @param irq interrupt ID
*/
void arm_gic_irq_set_pending(unsigned int irq);
/**
* @brief Clear the pending irq
*
* @param irq interrupt ID
*/
void arm_gic_irq_clear_pending(unsigned int irq);
/**
* @brief Set interrupt priority
*
* @param irq interrupt ID
* @param prio interrupt priority
* @param flags interrupt flags
*/
void arm_gic_irq_set_priority(
unsigned int irq, unsigned int prio, unsigned int flags);
/**
* @brief Get active interrupt ID
*
* @return Returns the ID of an active interrupt
*/
unsigned int arm_gic_get_active(void);
/**
* @brief Signal end-of-interrupt
*
* @param irq interrupt ID
*/
void arm_gic_eoi(unsigned int irq);
#ifdef CONFIG_SMP
/**
* @brief Initialize GIC of secondary cores
*/
void arm_gic_secondary_init(void);
#endif
/**
* @brief raise SGI to target cores
*
* @param sgi_id SGI ID 0 to 15
* @param target_aff target affinity in mpidr form.
* Aff level 1 2 3 will be extracted by api.
* @param target_list bitmask of target cores
*/
void gic_raise_sgi(unsigned int sgi_id, uint64_t target_aff,
uint16_t target_list);
#endif /* !_ASMLANGUAGE */
#endif /* ZEPHYR_INCLUDE_DRIVERS_GIC_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/interrupt_controller/gic.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,580 |
```objective-c
*
*/
#ifndef ZEPHYR_DRIVERS_INTC_VIM_H_
#define ZEPHYR_DRIVERS_INTC_VIM_H_
#include <stdint.h>
#include <zephyr/devicetree.h>
#include <zephyr/dt-bindings/interrupt-controller/ti-vim.h>
#include <zephyr/sys/util_macro.h>
#define VIM_BASE_ADDR DT_REG_ADDR(DT_INST(0, ti_vim))
#define VIM_MAX_IRQ_PER_GROUP (32)
#define VIM_MAX_GROUP_NUM ((uint32_t)(CONFIG_NUM_IRQS / VIM_MAX_IRQ_PER_GROUP))
#define VIM_GET_IRQ_GROUP_NUM(n) ((uint32_t)((n) / VIM_MAX_IRQ_PER_GROUP))
#define VIM_GET_IRQ_BIT_NUM(n) ((uint32_t)((n) % VIM_MAX_IRQ_PER_GROUP))
#define VIM_PRI_INT_MAX (15)
#define VIM_PID (VIM_BASE_ADDR + 0x0000)
#define VIM_INFO (VIM_BASE_ADDR + 0x0004)
#define VIM_PRIIRQ (VIM_BASE_ADDR + 0x0008)
#define VIM_PRIFIQ (VIM_BASE_ADDR + 0x000C)
#define VIM_IRQGSTS (VIM_BASE_ADDR + 0x0010)
#define VIM_FIQGSTS (VIM_BASE_ADDR + 0x0014)
#define VIM_IRQVEC (VIM_BASE_ADDR + 0x0018)
#define VIM_FIQVEC (VIM_BASE_ADDR + 0x001C)
#define VIM_ACTIRQ (VIM_BASE_ADDR + 0x0020)
#define VIM_ACTFIQ (VIM_BASE_ADDR + 0x0024)
#define VIM_DEDVEC (VIM_BASE_ADDR + 0x0030)
#define VIM_RAW(n) (VIM_BASE_ADDR + (0x400) + ((n) * 0x20))
#define VIM_STS(n) (VIM_BASE_ADDR + (0x404) + ((n) * 0x20))
#define VIM_INTR_EN_SET(n) (VIM_BASE_ADDR + (0x408) + ((n) * 0x20))
#define VIM_INTR_EN_CLR(n) (VIM_BASE_ADDR + (0x40c) + ((n) * 0x20))
#define VIM_IRQSTS(n) (VIM_BASE_ADDR + (0x410) + ((n) * 0x20))
#define VIM_FIQSTS(n) (VIM_BASE_ADDR + (0x414) + ((n) * 0x20))
#define VIM_INTMAP(n) (VIM_BASE_ADDR + (0x418) + ((n) * 0x20))
#define VIM_INTTYPE(n) (VIM_BASE_ADDR + (0x41c) + ((n) * 0x20))
#define VIM_PRI_INT(n) (VIM_BASE_ADDR + (0x1000) + ((n) * 0x4))
#define VIM_VEC_INT(n) (VIM_BASE_ADDR + (0x2000) + ((n) * 0x4))
/* RAW */
#define VIM_GRP_RAW_STS_MASK (BIT_MASK(32))
#define VIM_GRP_RAW_STS_SHIFT (0x00000000U)
#define VIM_GRP_RAW_STS_RESETVAL (0x00000000U)
#define VIM_GRP_RAW_STS_MAX (BIT_MASK(32))
#define VIM_GRP_RAW_RESETVAL (0x00000000U)
/* STS */
#define VIM_GRP_STS_MSK_MASK (BIT_MASK(32))
#define VIM_GRP_STS_MSK_SHIFT (0x00000000U)
#define VIM_GRP_STS_MSK_RESETVAL (0x00000000U)
#define VIM_GRP_STS_MSK_MAX (BIT_MASK(32))
#define VIM_GRP_STS_RESETVAL (0x00000000U)
/* INTR_EN_SET */
#define VIM_GRP_INTR_EN_SET_MSK_MASK (BIT_MASK(32))
#define VIM_GRP_INTR_EN_SET_MSK_SHIFT (0x00000000U)
#define VIM_GRP_INTR_EN_SET_MSK_RESETVAL (0x00000000U)
#define VIM_GRP_INTR_EN_SET_MSK_MAX (BIT_MASK(32))
#define VIM_GRP_INTR_EN_SET_RESETVAL (0x00000000U)
/* INTR_EN_CLR */
#define VIM_GRP_INTR_EN_CLR_MSK_MASK (BIT_MASK(32))
#define VIM_GRP_INTR_EN_CLR_MSK_SHIFT (0x00000000U)
#define VIM_GRP_INTR_EN_CLR_MSK_RESETVAL (0x00000000U)
#define VIM_GRP_INTR_EN_CLR_MSK_MAX (BIT_MASK(32))
#define VIM_GRP_INTR_EN_CLR_RESETVAL (0x00000000U)
/* IRQSTS */
#define VIM_GRP_IRQSTS_MSK_MASK (BIT_MASK(32))
#define VIM_GRP_IRQSTS_MSK_SHIFT (0x00000000U)
#define VIM_GRP_IRQSTS_MSK_RESETVAL (0x00000000U)
#define VIM_GRP_IRQSTS_MSK_MAX (BIT_MASK(32))
#define VIM_GRP_IRQSTS_RESETVAL (0x00000000U)
/* FIQSTS */
#define VIM_GRP_FIQSTS_MSK_MASK (BIT_MASK(32))
#define VIM_GRP_FIQSTS_MSK_SHIFT (0x00000000U)
#define VIM_GRP_FIQSTS_MSK_RESETVAL (0x00000000U)
#define VIM_GRP_FIQSTS_MSK_MAX (BIT_MASK(32))
#define VIM_GRP_FIQSTS_RESETVAL (0x00000000U)
/* INTMAP */
#define VIM_GRP_INTMAP_MSK_MASK (BIT_MASK(32))
#define VIM_GRP_INTMAP_MSK_SHIFT (0x00000000U)
#define VIM_GRP_INTMAP_MSK_RESETVAL (0x00000000U)
#define VIM_GRP_INTMAP_MSK_MAX (BIT_MASK(32))
#define VIM_GRP_INTMAP_RESETVAL (0x00000000U)
/* INTTYPE */
#define VIM_GRP_INTTYPE_MSK_MASK (BIT_MASK(32))
#define VIM_GRP_INTTYPE_MSK_SHIFT (0x00000000U)
#define VIM_GRP_INTTYPE_MSK_RESETVAL (0x00000000U)
#define VIM_GRP_INTTYPE_MSK_MAX (BIT_MASK(32))
#define VIM_GRP_INTTYPE_RESETVAL (0x00000000U)
/* INT */
#define VIM_PRI_INT_VAL_MASK (BIT_MASK(4))
#define VIM_PRI_INT_VAL_SHIFT (0x00000000U)
#define VIM_PRI_INT_VAL_RESETVAL (BIT_MASK(4))
#define VIM_PRI_INT_VAL_MAX (BIT_MASK(4))
#define VIM_PRI_INT_RESETVAL (BIT_MASK(4))
/* INT */
#define VIM_VEC_INT_VAL_MASK (0xFFFFFFFCU)
#define VIM_VEC_INT_VAL_SHIFT (0x00000002U)
#define VIM_VEC_INT_VAL_RESETVAL (0x00000000U)
#define VIM_VEC_INT_VAL_MAX (BIT_MASK(30))
#define VIM_VEC_INT_RESETVAL (0x00000000U)
/* INFO */
#define VIM_INFO_INTERRUPTS_MASK (BIT_MASK(11))
#define VIM_INFO_INTERRUPTS_SHIFT (0x00000000U)
#define VIM_INFO_INTERRUPTS_RESETVAL (0x00000400U)
#define VIM_INFO_INTERRUPTS_MAX (BIT_MASK(11))
#define VIM_INFO_RESETVAL (0x00000400U)
/* PRIIRQ */
#define VIM_PRIIRQ_VALID_MASK (0x80000000U)
#define VIM_PRIIRQ_VALID_SHIFT (BIT_MASK(5))
#define VIM_PRIIRQ_VALID_RESETVAL (0x00000000U)
#define VIM_PRIIRQ_VALID_MAX (0x00000001U)
#define VIM_PRIIRQ_VALID_VAL_TRUE (0x1U)
#define VIM_PRIIRQ_VALID_VAL_FALSE (0x0U)
#define VIM_PRIIRQ_PRI_MASK (0x000F0000U)
#define VIM_PRIIRQ_PRI_SHIFT (0x00000010U)
#define VIM_PRIIRQ_PRI_RESETVAL (0x00000000U)
#define VIM_PRIIRQ_PRI_MAX (BIT_MASK(4))
#define VIM_PRIIRQ_NUM_MASK (BIT_MASK(10))
#define VIM_PRIIRQ_NUM_SHIFT (0x00000000U)
#define VIM_PRIIRQ_NUM_RESETVAL (0x00000000U)
#define VIM_PRIIRQ_NUM_MAX (BIT_MASK(10))
#define VIM_PRIIRQ_RESETVAL (0x00000000U)
/* PRIFIQ */
#define VIM_PRIFIQ_VALID_MASK (0x80000000U)
#define VIM_PRIFIQ_VALID_SHIFT (BIT_MASK(5))
#define VIM_PRIFIQ_VALID_RESETVAL (0x00000000U)
#define VIM_PRIFIQ_VALID_MAX (0x00000001U)
#define VIM_PRIFIQ_VALID_VAL_TRUE (0x1U)
#define VIM_PRIFIQ_VALID_VAL_FALSE (0x0U)
#define VIM_PRIFIQ_PRI_MASK (0x000F0000U)
#define VIM_PRIFIQ_PRI_SHIFT (0x00000010U)
#define VIM_PRIFIQ_PRI_RESETVAL (0x00000000U)
#define VIM_PRIFIQ_PRI_MAX (BIT_MASK(4))
#define VIM_PRIFIQ_NUM_MASK (BIT_MASK(10))
#define VIM_PRIFIQ_NUM_SHIFT (0x00000000U)
#define VIM_PRIFIQ_NUM_RESETVAL (0x00000000U)
#define VIM_PRIFIQ_NUM_MAX (BIT_MASK(10))
#define VIM_PRIFIQ_RESETVAL (0x00000000U)
/* IRQGSTS */
#define VIM_IRQGSTS_STS_MASK (BIT_MASK(32))
#define VIM_IRQGSTS_STS_SHIFT (0x00000000U)
#define VIM_IRQGSTS_STS_RESETVAL (0x00000000U)
#define VIM_IRQGSTS_STS_MAX (BIT_MASK(32))
#define VIM_IRQGSTS_RESETVAL (0x00000000U)
/* FIQGSTS */
#define VIM_FIQGSTS_STS_MASK (BIT_MASK(32))
#define VIM_FIQGSTS_STS_SHIFT (0x00000000U)
#define VIM_FIQGSTS_STS_RESETVAL (0x00000000U)
#define VIM_FIQGSTS_STS_MAX (BIT_MASK(32))
#define VIM_FIQGSTS_RESETVAL (0x00000000U)
/* IRQVEC */
#define VIM_IRQVEC_ADDR_MASK (0xFFFFFFFCU)
#define VIM_IRQVEC_ADDR_SHIFT (0x00000002U)
#define VIM_IRQVEC_ADDR_RESETVAL (0x00000000U)
#define VIM_IRQVEC_ADDR_MAX (BIT_MASK(30))
#define VIM_IRQVEC_RESETVAL (0x00000000U)
/* FIQVEC */
#define VIM_FIQVEC_ADDR_MASK (0xFFFFFFFCU)
#define VIM_FIQVEC_ADDR_SHIFT (0x00000002U)
#define VIM_FIQVEC_ADDR_RESETVAL (0x00000000U)
#define VIM_FIQVEC_ADDR_MAX (BIT_MASK(30))
#define VIM_FIQVEC_RESETVAL (0x00000000U)
/* ACTIRQ */
#define VIM_ACTIRQ_VALID_MASK (0x80000000U)
#define VIM_ACTIRQ_VALID_SHIFT (BIT_MASK(5))
#define VIM_ACTIRQ_VALID_RESETVAL (0x00000000U)
#define VIM_ACTIRQ_VALID_MAX (0x00000001U)
#define VIM_ACTIRQ_VALID_VAL_TRUE (0x1U)
#define VIM_ACTIRQ_VALID_VAL_FALSE (0x0U)
#define VIM_ACTIRQ_PRI_MASK (0x000F0000U)
#define VIM_ACTIRQ_PRI_SHIFT (0x00000010U)
#define VIM_ACTIRQ_PRI_RESETVAL (0x00000000U)
#define VIM_ACTIRQ_PRI_MAX (BIT_MASK(4))
#define VIM_ACTIRQ_NUM_MASK (BIT_MASK(10))
#define VIM_ACTIRQ_NUM_SHIFT (0x00000000U)
#define VIM_ACTIRQ_NUM_RESETVAL (0x00000000U)
#define VIM_ACTIRQ_NUM_MAX (BIT_MASK(10))
#define VIM_ACTIRQ_RESETVAL (0x00000000U)
/* ACTFIQ */
#define VIM_ACTFIQ_VALID_MASK (0x80000000U)
#define VIM_ACTFIQ_VALID_SHIFT (BIT_MASK(5))
#define VIM_ACTFIQ_VALID_RESETVAL (0x00000000U)
#define VIM_ACTFIQ_VALID_MAX (0x00000001U)
#define VIM_ACTFIQ_VALID_VAL_TRUE (0x1U)
#define VIM_ACTFIQ_VALID_VAL_FALSE (0x0U)
#define VIM_ACTFIQ_PRI_MASK (0x000F0000U)
#define VIM_ACTFIQ_PRI_SHIFT (0x00000010U)
#define VIM_ACTFIQ_PRI_RESETVAL (0x00000000U)
#define VIM_ACTFIQ_PRI_MAX (BIT_MASK(4))
#define VIM_ACTFIQ_NUM_MASK (BIT_MASK(10))
#define VIM_ACTFIQ_NUM_SHIFT (0x00000000U)
#define VIM_ACTFIQ_NUM_RESETVAL (0x00000000U)
#define VIM_ACTFIQ_NUM_MAX (BIT_MASK(10))
#define VIM_ACTFIQ_RESETVAL (0x00000000U)
/* DEDVEC */
#define VIM_DEDVEC_ADDR_MASK (0xFFFFFFFCU)
#define VIM_DEDVEC_ADDR_SHIFT (0x00000002U)
#define VIM_DEDVEC_ADDR_RESETVAL (0x00000000U)
#define VIM_DEDVEC_ADDR_MAX (BIT_MASK(30))
#define VIM_DEDVEC_RESETVAL (0x00000000U)
/*
* VIM Driver Interface Functions
*/
/**
* @brief Get active interrupt ID.
*
* @return Returns the ID of an active interrupt.
*/
unsigned int z_vim_irq_get_active(void);
/**
* @brief Signal end-of-interrupt.
*
* @param irq interrupt ID.
*/
void z_vim_irq_eoi(unsigned int irq);
/**
* @brief Interrupt controller initialization.
*/
void z_vim_irq_init(void);
/**
* @brief Configure priority, irq type for the interrupt ID.
*
* @param irq interrupt ID.
* @param prio interrupt priority.
* @param flags interrupt flags.
*/
void z_vim_irq_priority_set(unsigned int irq, unsigned int prio, uint32_t flags);
/**
* @brief Enable Interrupt.
*
* @param irq interrupt ID.
*/
void z_vim_irq_enable(unsigned int irq);
/**
* @brief Disable Interrupt.
*
* @param irq interrupt ID.
*/
void z_vim_irq_disable(unsigned int irq);
/**
* @brief Check if an interrupt is enabled.
*
* @param irq interrupt ID.
*
* @retval 0 If interrupt is disabled.
* @retval 1 If interrupt is enabled.
*/
int z_vim_irq_is_enabled(unsigned int irq);
/**
* @brief Raise a software interrupt.
*
* @param irq interrupt ID.
*/
void z_vim_arm_enter_irq(int irq);
#endif /* ZEPHYR_DRIVERS_INTC_VIM_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/interrupt_controller/intc_vim.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 3,328 |
```objective-c
/*
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_DW_ACE_H
#define ZEPHYR_INCLUDE_DRIVERS_DW_ACE_H
#include <zephyr/device.h>
typedef void (*irq_enable_t)(const struct device *dev, uint32_t irq);
typedef void (*irq_disable_t)(const struct device *dev, uint32_t irq);
typedef int (*irq_is_enabled_t)(const struct device *dev, unsigned int irq);
typedef int (*irq_connect_dynamic_t)(const struct device *dev,
unsigned int irq, unsigned int priority,
void (*routine)(const void *parameter),
const void *parameter, uint32_t flags);
struct dw_ace_v1_ictl_driver_api {
irq_enable_t intr_enable;
irq_disable_t intr_disable;
irq_is_enabled_t intr_is_enabled;
#ifdef CONFIG_DYNAMIC_INTERRUPTS
irq_connect_dynamic_t intr_connect_dynamic;
#endif
};
#endif /* ZEPHYR_INCLUDE_DRIVERS_DW_ACE_H */
``` | /content/code_sandbox/include/zephyr/drivers/interrupt_controller/dw_ace.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 205 |
```objective-c
/*
*
*/
/**
* @brief Driver for External interrupt/event controller in STM32 MCUs
*
* Based on reference manuals:
* RM0008 Reference Manual: STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx
* and STM32F107xx advanced ARM(r)-based 32-bit MCUs
* and
* RM0368 Reference manual STM32F401xB/C and STM32F401xD/E
* advanced ARM(r)-based 32-bit MCUs
*
* Chapter 10.2: External interrupt/event controller (EXTI)
*
*/
#ifndef ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_EXTI_STM32_H_
#define ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_EXTI_STM32_H_
#include <zephyr/types.h>
#define STM32_EXTI_LINE_NONE 0xFFFFFFFFU
/**
* @brief enable EXTI interrupt for specific line
*
* @param line EXTI# line
*/
void stm32_exti_enable(int line);
/**
* @brief disable EXTI interrupt for specific line
*
* @param line EXTI# line
*/
void stm32_exti_disable(int line);
/**
* @brief EXTI trigger flags
*/
enum stm32_exti_trigger {
/* clear trigger */
STM32_EXTI_TRIG_NONE = 0x0,
/* trigger on rising edge */
STM32_EXTI_TRIG_RISING = 0x1,
/* trigger on falling edge */
STM32_EXTI_TRIG_FALLING = 0x2,
/* trigger on both rising & falling edge */
STM32_EXTI_TRIG_BOTH = 0x3,
};
/**
* @brief set EXTI interrupt line triggers
*
* @param line EXTI# line
* @param trg OR'ed stm32_exti_trigger flags
*/
void stm32_exti_trigger(int line, int trg);
/* callback for exti interrupt */
typedef void (*stm32_exti_callback_t) (int line, void *user);
/**
* @brief set EXTI interrupt callback
*
* @param line EXI# line
* @param cb user callback
* @param data user data
*/
int stm32_exti_set_callback(int line, stm32_exti_callback_t cb, void *data);
/**
* @brief unset EXTI interrupt callback
*
* @param line EXI# line
*/
void stm32_exti_unset_callback(int line);
#endif /* ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_EXTI_STM32_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/interrupt_controller/exti_stm32.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 534 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_XMC4XXX_INTC_H_
#define ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_XMC4XXX_INTC_H_
/**
* @brief Enable interrupt for specific port_id and pin combination
*
* @param port_id Port index
* @param pin pin Pin the port
* @param mode Level or edge interrupt
* @param trig Trigger edge type (falling, rising or both)
* @param fn Callback function
* @param user_data Parameter to the interrupt callback
*
* @retval 0 On success
* @retval -ENOTSUP If the specific port_id/pin combination is not supported or
* not defined in the dts
* @retval -EBUSY If the interrupt line is already used by a different port_id/pin
* @retval -EINVAL If the trigger combination is invalid
*
*/
int intc_xmc4xxx_gpio_enable_interrupt(int port_id, int pin, enum gpio_int_mode mode,
enum gpio_int_trig trig, void(*fn)(const struct device*, int), void *user_data);
/**
* @brief Disable interrupt for specific port_id and pin combination
*
* @param port_id Port index
* @param pin pin Pin the port
* @retval 0 On susccess
* @retval -EINVAL If the specific port_id and pin combination has no interrupt
* enabled
*/
int intc_xmc4xxx_gpio_disable_interrupt(int port_id, int pin);
#endif /* ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_XMC4XXX_INTC_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/interrupt_controller/intc_xmc4xxx.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 331 |
```objective-c
/*
*
*/
/**
* @brief Driver for Wake-up interrupt/event controller in NXP S32 MCUs
*/
#ifndef ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_WKPU_NXP_S32_H_
#define ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_WKPU_NXP_S32_H_
/** NXP WKPU callback */
typedef void (*wkpu_nxp_s32_callback_t)(uint8_t pin, void *arg);
/**
* @brief NXP WKPU pin activation type
*/
enum wkpu_nxp_s32_trigger {
/** Interrupt triggered on rising edge */
WKPU_NXP_S32_RISING_EDGE,
/** Interrupt triggered on falling edge */
WKPU_NXP_S32_FALLING_EDGE,
/** Interrupt triggered on either edge */
WKPU_NXP_S32_BOTH_EDGES,
};
/**
* @brief Unset WKPU callback for line
*
* @param dev WKPU device
* @param irq WKPU interrupt number
*/
void wkpu_nxp_s32_unset_callback(const struct device *dev, uint8_t irq);
/**
* @brief Set WKPU callback for line
*
* @param dev WKPU device
* @param irq WKPU interrupt number
* @param pin GPIO pin
* @param cb Callback
* @param arg Callback data
*
* @retval 0 on SUCCESS
* @retval -EBUSY if callback for the line is already set
*/
int wkpu_nxp_s32_set_callback(const struct device *dev, uint8_t irq, uint8_t pin,
wkpu_nxp_s32_callback_t cb, void *arg);
/**
* @brief Set edge event and enable interrupt for WKPU line
*
* @param dev WKPU device
* @param irq WKPU interrupt number
* @param trigger pin activation trigger
*/
void wkpu_nxp_s32_enable_interrupt(const struct device *dev, uint8_t irq,
enum wkpu_nxp_s32_trigger trigger);
/**
* @brief Disable interrupt for WKPU line
*
* @param dev WKPU device
* @param irq WKPU interrupt number
*/
void wkpu_nxp_s32_disable_interrupt(const struct device *dev, uint8_t irq);
/**
* @brief Get pending interrupt for WKPU device
*
* @param dev WKPU device
* @return A bitmask containing pending interrupts
*/
uint64_t wkpu_nxp_s32_get_pending(const struct device *dev);
#endif /* ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_WKPU_NXP_S32_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/interrupt_controller/intc_wkpu_nxp_s32.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 541 |
```objective-c
/*
*
*/
#include <zephyr/dt-bindings/interrupt-controller/renesas-ra-icu.h>
#ifndef ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_RA_ICU_H_
#define ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_RA_ICU_H_
#define RA_ICU_FLAG_EVENT_OFFSET 8
#define RA_ICU_FLAG_EVENT_MASK (BIT_MASK(8) << RA_ICU_FLAG_EVENT_OFFSET)
#define RA_ICU_FLAG_INTCFG_OFFSET 16
#define RA_ICU_FLAG_INTCFG_MASK (BIT_MASK(8) << RA_ICU_FLAG_INTCFG_OFFSET)
enum icu_irq_mode {
ICU_FALLING,
ICU_RISING,
ICU_BOTH_EDGE,
ICU_LOW_LEVEL,
};
typedef void (*ra_isr_handler)(const void *);
extern void ra_icu_clear_int_flag(unsigned int irqn);
extern int ra_icu_query_available_irq(uint32_t event);
extern int ra_icu_query_exists_irq(uint32_t event);
extern void ra_icu_query_irq_config(unsigned int irq, uint32_t *intcfg, ra_isr_handler *pisr,
const void **cbarg);
extern int ra_icu_irq_connect_dynamic(unsigned int irq, unsigned int priority,
void (*routine)(const void *parameter), const void *parameter,
uint32_t flags);
extern int ra_icu_irq_disconnect_dynamic(unsigned int irq, unsigned int priority,
void (*routine)(const void *parameter),
const void *parameter, uint32_t flags);
#endif /* ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_RA_ICU_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/interrupt_controller/intc_ra_icu.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 334 |
```objective-c
/*
*
*/
/**
* @file
* @brief Driver for ARM Generic Interrupt Controller V3 Interrupt Translation Service
*
* The Generic Interrupt Controller (GIC) Interrupt Translation Service translates an input
* EventID from a device, identified by its DeviceID, determines a corresponding INTID for
* this input and the target Redistributor and, through this, the target PE for that INTID.
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_GICV3_ITS_H_
#define ZEPHYR_INCLUDE_DRIVERS_GICV3_ITS_H_
typedef unsigned int (*its_api_alloc_intid_t)(const struct device *dev);
typedef int (*its_api_setup_deviceid_t)(const struct device *dev, uint32_t device_id,
unsigned int nites);
typedef int (*its_api_map_intid_t)(const struct device *dev, uint32_t device_id,
uint32_t event_id, unsigned int intid);
typedef int (*its_api_send_int_t)(const struct device *dev, uint32_t device_id, uint32_t event_id);
typedef uint32_t (*its_api_get_msi_addr_t)(const struct device *dev);
__subsystem struct its_driver_api {
its_api_alloc_intid_t alloc_intid;
its_api_setup_deviceid_t setup_deviceid;
its_api_map_intid_t map_intid;
its_api_send_int_t send_int;
its_api_get_msi_addr_t get_msi_addr;
};
static inline int its_alloc_intid(const struct device *dev)
{
const struct its_driver_api *api =
(const struct its_driver_api *)dev->api;
return api->alloc_intid(dev);
}
static inline int its_setup_deviceid(const struct device *dev, uint32_t device_id,
unsigned int nites)
{
const struct its_driver_api *api =
(const struct its_driver_api *)dev->api;
return api->setup_deviceid(dev, device_id, nites);
}
static inline int its_map_intid(const struct device *dev, uint32_t device_id,
uint32_t event_id, unsigned int intid)
{
const struct its_driver_api *api =
(const struct its_driver_api *)dev->api;
return api->map_intid(dev, device_id, event_id, intid);
}
static inline int its_send_int(const struct device *dev, uint32_t device_id, uint32_t event_id)
{
const struct its_driver_api *api =
(const struct its_driver_api *)dev->api;
return api->send_int(dev, device_id, event_id);
}
static inline uint32_t its_get_msi_addr(const struct device *dev)
{
const struct its_driver_api *api =
(const struct its_driver_api *)dev->api;
return api->get_msi_addr(dev);
}
#endif /* ZEPHYR_INCLUDE_DRIVERS_GICV3_ITS_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/interrupt_controller/gicv3_its.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 602 |
```objective-c
/*
*
*/
/**
* @file
* @brief Driver for Platform Level Interrupt Controller (PLIC)
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_RISCV_PLIC_H_
#define ZEPHYR_INCLUDE_DRIVERS_RISCV_PLIC_H_
#include <zephyr/device.h>
/**
* @brief Enable interrupt
*
* @param irq Multi-level encoded interrupt ID
*/
void riscv_plic_irq_enable(uint32_t irq);
/**
* @brief Disable interrupt
*
* @param irq Multi-level encoded interrupt ID
*/
void riscv_plic_irq_disable(uint32_t irq);
/**
* @brief Check if an interrupt is enabled
*
* @param irq Multi-level encoded interrupt ID
* @return Returns true if interrupt is enabled, false otherwise
*/
int riscv_plic_irq_is_enabled(uint32_t irq);
/**
* @brief Set interrupt priority
*
* @param irq Multi-level encoded interrupt ID
* @param prio interrupt priority
*/
void riscv_plic_set_priority(uint32_t irq, uint32_t prio);
/**
* @brief Get active interrupt ID
*
* @return Returns the ID of an active interrupt
*/
unsigned int riscv_plic_get_irq(void);
/**
* @brief Get active interrupt controller device
*
* @return Returns device pointer of the active interrupt device
*/
const struct device *riscv_plic_get_dev(void);
#endif /* ZEPHYR_INCLUDE_DRIVERS_RISCV_PLIC_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/interrupt_controller/riscv_plic.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 306 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_IT8XXX2_WUC_H_
#define ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_IT8XXX2_WUC_H_
#include <zephyr/device.h>
#include <stdint.h>
/**
* @brief A trigger condition on the corresponding input generates
* a wake-up signal to the power management control of EC
*
* @param dev Pointer to the device structure for the driver instance
* @param mask Pin mask of WUC group
*/
void it8xxx2_wuc_enable(const struct device *dev, uint8_t mask);
/**
* @brief A trigger condition on the corresponding input doesn't
* assert the wake-up signal (canceled not pending)
*
* @param dev Pointer to the device structure for the driver instance
* @param mask Pin mask of WUC group
*/
void it8xxx2_wuc_disable(const struct device *dev, uint8_t mask);
/**
* @brief Write-1-clear a trigger condition that occurs on the
* corresponding input
*
* @param dev Pointer to the device structure for the driver instance
* @param mask Pin mask of WUC group
*/
void it8xxx2_wuc_clear_status(const struct device *dev, uint8_t mask);
/**
* @brief Select the trigger edge mode on the corresponding input
*
* @param dev Pointer to the device structure for the driver instance
* @param mask Pin mask of WUC group
* @param flags Select the trigger edge mode
*/
void it8xxx2_wuc_set_polarity(const struct device *dev, uint8_t mask,
uint32_t flags);
#endif /* ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_IT8XXX2_WUC_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/interrupt_controller/wuc_ite_it8xxx2.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 362 |
```objective-c
/*
*
*/
/**
* @brief Driver for External interrupt/event controller in NXP S32 MCUs
*
*/
#ifndef ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_EIRQ_NXP_S32_H_
#define ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_EIRQ_NXP_S32_H_
/** NXP SIUL2 EIRQ callback */
typedef void (*eirq_nxp_s32_callback_t)(uint8_t pin, void *arg);
/**
* @brief NXP SIUL2 EIRQ pin activation type
*/
enum eirq_nxp_s32_trigger {
/** Interrupt triggered on rising edge */
EIRQ_NXP_S32_RISING_EDGE,
/** Interrupt triggered on falling edge */
EIRQ_NXP_S32_FALLING_EDGE,
/** Interrupt triggered on either edge */
EIRQ_NXP_S32_BOTH_EDGES,
};
/**
* @brief Unset interrupt callback
*
* @param dev SIUL2 EIRQ device
* @param irq interrupt number
*/
void eirq_nxp_s32_unset_callback(const struct device *dev, uint8_t irq);
/**
* @brief Set callback for an interrupt associated with a given pin
*
* @param dev SIUL2 EIRQ device
* @param irq interrupt number
* @param pin GPIO pin associated with the interrupt
* @param cb callback to install
* @param arg user data to include in callback
*
* @retval 0 on success
* @retval -EBUSY if callback for the interrupt is already set
*/
int eirq_nxp_s32_set_callback(const struct device *dev, uint8_t irq, uint8_t pin,
eirq_nxp_s32_callback_t cb, void *arg);
/**
* @brief Enable interrupt on a given trigger event
*
* @param dev SIUL2 EIRQ device
* @param irq interrupt number
* @param trigger trigger event
*/
void eirq_nxp_s32_enable_interrupt(const struct device *dev, uint8_t irq,
enum eirq_nxp_s32_trigger trigger);
/**
* @brief Disable interrupt
*
* @param dev SIUL2 EIRQ device
* @param irq interrupt number
*/
void eirq_nxp_s32_disable_interrupt(const struct device *dev, uint8_t irq);
/**
* @brief Get pending interrupts
*
* @param dev SIUL2 EIRQ device
* @return A bitmask containing pending pending interrupts
*/
uint32_t eirq_nxp_s32_get_pending(const struct device *dev);
#endif /* ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_EIRQ_NXP_S32_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/interrupt_controller/intc_eirq_nxp_s32.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 539 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_ESP_INTR_ALLOC_H__
#define ZEPHYR_INCLUDE_DRIVERS_ESP_INTR_ALLOC_H__
#include <stdint.h>
#include <stdbool.h>
#include <soc.h>
/*
* Interrupt allocation flags - These flags can be used to specify
* which interrupt qualities the code calling esp_intr_alloc* needs.
*/
/* Keep the LEVELx values as they are here; they match up with (1<<level) */
#define ESP_INTR_FLAG_LEVEL1 (1<<1) /* Accept a Level 1 int vector, lowest priority */
#define ESP_INTR_FLAG_LEVEL2 (1<<2) /* Accept a Level 2 int vector */
#define ESP_INTR_FLAG_LEVEL3 (1<<3) /* Accept a Level 3 int vector */
#define ESP_INTR_FLAG_LEVEL4 (1<<4) /* Accept a Level 4 int vector */
#define ESP_INTR_FLAG_LEVEL5 (1<<5) /* Accept a Level 5 int vector */
#define ESP_INTR_FLAG_LEVEL6 (1<<6) /* Accept a Level 6 int vector */
#define ESP_INTR_FLAG_NMI (1<<7) /* Accept a Level 7 int vector, highest priority */
#define ESP_INTR_FLAG_SHARED (1<<8) /* Interrupt can be shared between ISRs */
#define ESP_INTR_FLAG_EDGE (1<<9) /* Edge-triggered interrupt */
#define ESP_INTR_FLAG_IRAM (1<<10) /* ISR can be called if cache is disabled */
#define ESP_INTR_FLAG_INTRDISABLED (1<<11) /* Return with this interrupt disabled */
/* Low and medium prio interrupts. These can be handled in C. */
#define ESP_INTR_FLAG_LOWMED (ESP_INTR_FLAG_LEVEL1|ESP_INTR_FLAG_LEVEL2|ESP_INTR_FLAG_LEVEL3)
/* High level interrupts. Need to be handled in assembly. */
#define ESP_INTR_FLAG_HIGH (ESP_INTR_FLAG_LEVEL4|ESP_INTR_FLAG_LEVEL5|ESP_INTR_FLAG_LEVEL6| \
ESP_INTR_FLAG_NMI)
/* Mask for all level flags */
#define ESP_INTR_FLAG_LEVELMASK (ESP_INTR_FLAG_LEVEL1|ESP_INTR_FLAG_LEVEL2|ESP_INTR_FLAG_LEVEL3| \
ESP_INTR_FLAG_LEVEL4|ESP_INTR_FLAG_LEVEL5|ESP_INTR_FLAG_LEVEL6| \
ESP_INTR_FLAG_NMI)
/* Function prototype for interrupt handler function */
typedef void (*isr_handler_t)(const void *arg);
/**
* @brief Initializes interrupt table to its defaults
*/
void esp_intr_initialize(void);
/**
* @brief Allocate an interrupt with the given parameters.
*
* This finds an interrupt that matches the restrictions as given in the flags
* parameter, maps the given interrupt source to it and hooks up the given
* interrupt handler (with optional argument) as well. If needed, it can return
* a handle for the interrupt as well.
*
* @param source The interrupt source.
* @param flags An ORred mask of the ESP_INTR_FLAG_* defines. These restrict the
* choice of interrupts that this routine can choose from. If this value
* is 0, it will default to allocating a non-shared interrupt of level
* 1, 2 or 3. If this is ESP_INTR_FLAG_SHARED, it will allocate a shared
* interrupt of level 1. Setting ESP_INTR_FLAG_INTRDISABLED will return
* from this function with the interrupt disabled.
* @param handler The interrupt handler.
* @param arg Optional argument for passed to the interrupt handler
* @param ret_handle Pointer to a struct intr_handle_data_t pointer to store a handle that can
* later be used to request details or free the interrupt. Can be NULL if no handle
* is required.
*
* @return -EINVAL if the combination of arguments is invalid.
* -ENODEV No free interrupt found with the specified flags
* 0 otherwise
*/
int esp_intr_alloc(int source,
int flags,
isr_handler_t handler,
void *arg,
void **ret_handle);
/**
* @brief Disable the interrupt associated with the source
*
* @param source The interrupt source
*
* @return -EINVAL if the combination of arguments is invalid.
* 0 otherwise
*/
int esp_intr_disable(int source);
/**
* @brief Enable the interrupt associated with the source
*
* @param source The interrupt source
* @return -EINVAL if the combination of arguments is invalid.
* 0 otherwise
*/
int esp_intr_enable(int source);
/**
* @brief Gets the current enabled interrupts
*
* @param status_mask_number the status mask can be 0 or 1
* @return bitmask of enabled interrupt sources
*/
uint32_t esp_intr_get_enabled_intmask(int status_mask_number);
#endif
``` | /content/code_sandbox/include/zephyr/drivers/interrupt_controller/intc_esp32c3.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,007 |
```objective-c
/*
*
*/
/**
* @brief Driver for External interrupt controller in Microchip XEC devices
*
* Based on reference manuals:
* Reference Manuals for MEC152x and MEC172x ARM(r) 32-bit MCUs
*
* Chapter: EC Interrupt Aggregator (ECIA)
*
*/
#ifndef ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_MCHP_XEC_ECIA_H_
#define ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_MCHP_XEC_ECIA_H_
#include <zephyr/device.h>
#include <zephyr/irq.h>
/**
* @brief enable GIRQn interrupt for specific source
*
* @param girq_id is the GIRQ number (8 - 26)
* @param src is the interrupt source in the GIRQ (0 - 31)
*/
int mchp_xec_ecia_enable(int girq_id, int src);
/**
* @brief enable EXTI interrupt for specific line specified by parameter
* encoded with MCHP_XEC_ECIA macro.
*
* @param ecia_info is GIRQ connection encoded with MCHP_XEC_ECIA
*/
int mchp_xec_ecia_info_enable(int ecia_info);
/**
* @brief disable EXTI interrupt for specific line
*
* @param girq_id is the GIRQ number (8 - 26)
* @param src is the interrupt source in the GIRQ (0 - 31)
*/
int mchp_xec_ecia_disable(int girq_id, int src);
/**
* @brief disable EXTI interrupt for specific line specified by parameter
* encoded with MCHP_XEC_ECIA macro.
*
* @param ecia_info is GIRQ connection encoded with MCHP_XEC_ECIA
*/
int mchp_xec_ecia_info_disable(int ecia_info);
/* callback for ECIA GIRQ interrupt source */
typedef void (*mchp_xec_ecia_callback_t) (int girq_id, int src, void *user);
/**
* @brief set GIRQn interrupt source callback
*
* @param girq_id is the GIRQ number (8 - 26)
* @param src is the interrupt source in the GIRQ (0 - 31)
* @param cb user callback
* @param data user data
*/
int mchp_xec_ecia_set_callback(int girq_id, int src,
mchp_xec_ecia_callback_t cb, void *data);
/**
* @brief set GIRQn interrupt source callback
*
* @param ecia_info is GIRQ connection encoded with MCHP_XEC_ECIA
* @param cb user callback
* @param data user data
*/
int mchp_xec_ecia_info_set_callback(int ecia_info, mchp_xec_ecia_callback_t cb,
void *data);
/**
* @brief set GIRQn interrupt source callback
*
* @param dev_girq is a handle to the GIRQn device
* @param src is the interrupt source in the GIRQ (0 - 31)
* @param cb user callback
* @param data user data
*/
int mchp_xec_ecia_set_callback_by_dev(const struct device *dev_girq, int src,
mchp_xec_ecia_callback_t cb, void *data);
/**
* @brief unset GIRQn interrupt source callback
*
* @param girq_id is the GIRQ number (8 - 26)
* @param src is the interrupt source in the GIRQ (0 - 31)
*/
int mchp_ecia_unset_callback(int girq_id, int src);
/**
* @brief unset GIRQn interrupt source callback
*
* @param dev_girq is a handle to the GIRQn device
* @param src is the interrupt source in the GIRQ (0 - 31)
*/
int mchp_ecia_unset_callback_by_dev(const struct device *dev_girq, int src);
/* platform specific */
/** @brief enable or disable aggregated GIRQ output
*
* @param girq_id is the GIRQ number (8 - 26)
* @param enable non-zero enables aggregated output else disables
*/
void mchp_xec_ecia_girq_aggr_en(uint8_t girq_id, uint8_t enable);
/** @brief clear GIRQ latched source status bit
*
* @param girq_id is the GIRQ number (8 - 26)
* @param src_bit is the source bit position in the GIRQ registers (0 - 31)
*/
void mchp_xec_ecia_girq_src_clr(uint8_t girq_id, uint8_t src_bit);
/** @brief enable a source in a GIRQ
*
* @param girq_id is the GIRQ number (8 - 26)
* @param src_bit is the source bit position in the GIRQ registers (0 - 31)
*/
void mchp_xec_ecia_girq_src_en(uint8_t girq_id, uint8_t src_bit);
/** @brief disable a source in a GIRQ
*
* @param girq_id is the GIRQ number (8 - 26)
* @param src_bit is the source bit position in the GIRQ registers (0 - 31)
*/
void mchp_xec_ecia_girq_src_dis(uint8_t girq_id, uint8_t src_bit);
/** @brief clear GIRQ latches sources specified in bitmap
*
* @param girq_id is the GIRQ number (8 - 26)
* @param bitmap contains the source bits to clear
*/
void mchp_xec_ecia_girq_src_clr_bitmap(uint8_t girq_id, uint32_t bitmap);
/** @brief enable sources in a GIRQ
*
* @param girq_id is the GIRQ number (8 - 26)
* @param bitmap contains the source bits to enable
*/
void mchp_xec_ecia_girq_src_en_bitmap(uint8_t girq_id, uint32_t bitmap);
/** @brief disable sources in a GIRQ
*
* @param girq_id is the GIRQ number (8 - 26)
* @param bitmap contains the source bits to disable
*/
void mchp_xec_ecia_girq_src_dis_bitmap(uint8_t girq_id, uint32_t bitmap);
/** @brief Read GIRQ result register (bit-wise OR of enable and source)
*
* @param girq_id is the GIRQ number (8 - 26)
* @return 32-bit unsigned result register value
*/
uint32_t mchp_xec_ecia_girq_result(uint8_t girq_id);
/** @brief Clear external NVIC input pending status
*
* @param nvic_num is 0 to maximum NVIC inputs for the chip.
*/
void mchp_xec_ecia_nvic_clr_pend(uint32_t nvic_num);
/* API using GIRQ parameters encoded with MCHP_XEC_ECIA */
/** @brief enable or disable aggregated GIRQ output
*
* @param ecia_info is GIRQ connection encoded with MCHP_XEC_ECIA
* @param enable is flag to indicate enable(1) or disable(0)
*/
void mchp_xec_ecia_info_girq_aggr_en(int ecia_info, uint8_t enable);
/** @brief clear GIRQ latched source status bit
*
* @param ecia_info is GIRQ connection encoded with MCHP_XEC_ECIA
*/
void mchp_xec_ecia_info_girq_src_clr(int ecia_info);
/** @brief enable a source in a GIRQ
*
* @param ecia_info is GIRQ connection encoded with MCHP_XEC_ECIA
*/
void mchp_xec_ecia_info_girq_src_en(int ecia_info);
/** @brief disable a source in a GIRQ
*
* @param ecia_info is GIRQ connection encoded with MCHP_XEC_ECIA
*/
void mchp_xec_ecia_info_girq_src_dis(int ecia_info);
/** @brief Read GIRQ result register (bit-wise OR of enable and source)
*
* @param ecia_info is GIRQ connection encoded with MCHP_XEC_ECIA
* @return 32-bit unsigned result register value
*/
uint32_t mchp_xec_ecia_info_girq_result(int ecia_info);
/** @brief Clear external NVIC input pending status given encoded ECIA info.
*
* @param ecia_info is GIRQ connection encoded with MCHP_XEC_ECIA
*/
void mchp_xec_ecia_info_nvic_clr_pend(int ecia_info);
#endif /* ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_MCHP_XEC_ECIA_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/interrupt_controller/intc_mchp_xec_ecia.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,826 |
```objective-c
/*
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_INTEL_VTD_H_
#define ZEPHYR_INCLUDE_DRIVERS_INTEL_VTD_H_
#include <zephyr/drivers/pcie/msi.h>
typedef int (*vtd_alloc_entries_f)(const struct device *dev,
uint8_t n_entries);
typedef uint32_t (*vtd_remap_msi_f)(const struct device *dev,
msi_vector_t *vector,
uint8_t n_vector);
typedef int (*vtd_remap_f)(const struct device *dev,
uint8_t irte_idx,
uint16_t vector,
uint32_t flags,
uint16_t src_id);
typedef int (*vtd_set_irte_vector_f)(const struct device *dev,
uint8_t irte_idx,
uint16_t vector);
typedef int (*vtd_get_irte_by_vector_f)(const struct device *dev,
uint16_t vector);
typedef uint16_t (*vtd_get_irte_vector_f)(const struct device *dev,
uint8_t irte_idx);
typedef int (*vtd_set_irte_irq_f)(const struct device *dev,
uint8_t irte_idx,
unsigned int irq);
typedef int (*vtd_get_irte_by_irq_f)(const struct device *dev,
unsigned int irq);
typedef void (*vtd_set_irte_msi_f)(const struct device *dev,
uint8_t irte_idx,
bool msi);
typedef bool (*vtd_irte_is_msi_f)(const struct device *dev,
uint8_t irte_idx);
__subsystem struct vtd_driver_api {
vtd_alloc_entries_f allocate_entries;
vtd_remap_msi_f remap_msi;
vtd_remap_f remap;
vtd_set_irte_vector_f set_irte_vector;
vtd_get_irte_by_vector_f get_irte_by_vector;
vtd_get_irte_vector_f get_irte_vector;
vtd_set_irte_irq_f set_irte_irq;
vtd_get_irte_by_irq_f get_irte_by_irq;
vtd_set_irte_msi_f set_irte_msi;
vtd_irte_is_msi_f irte_is_msi;
};
/**
* @brief Allocate contiguous IRTEs
*
* @param dev Pointer to the device structure for the driver instance
* @param n_entries How many IRTE to allocate
*
* Note: It will try to allocate all, or it will fail.
*
* @return The first allocated IRTE index, or -EBUSY on failure
*/
static inline int vtd_allocate_entries(const struct device *dev,
uint8_t n_entries)
{
const struct vtd_driver_api *api =
(const struct vtd_driver_api *)dev->api;
return api->allocate_entries(dev, n_entries);
}
/**
* @brief Generate the MSI Message Address data for the given vector
*
* @param dev Pointer to the device structure for the driver instance
* @param vector A valid allocated MSI vector array
* @param n_vector the size of the vector array
*
* @return The MSI Message Address value
*/
static inline uint32_t vtd_remap_msi(const struct device *dev,
msi_vector_t *vector,
uint8_t n_vector)
{
const struct vtd_driver_api *api =
(const struct vtd_driver_api *)dev->api;
return api->remap_msi(dev, vector, n_vector);
}
/**
* @brief Remap the given vector
*
* @param dev Pointer to the device structure for the driver instance
* @param irte_idx A previously allocated irte entry index number
* @param vector An allocated interrupt vector
* @param flags interrupt flags
* @param src_id a valid source ID or USHRT_MAX if none
*
* @return 0 on success, a negative errno otherwise
*/
static inline int vtd_remap(const struct device *dev,
uint8_t irte_idx,
uint16_t vector,
uint32_t flags,
uint16_t src_id)
{
const struct vtd_driver_api *api =
(const struct vtd_driver_api *)dev->api;
return api->remap(dev, irte_idx, vector, flags, src_id);
}
/**
* @brief Set the vector on the allocated irte
*
* @param dev Pointer to the device structure for the driver instance
* @param irte_idx A previously allocated irte entry index number
* @param vector An allocated interrupt vector
*
* @return 0, a negative errno otherwise
*/
static inline int vtd_set_irte_vector(const struct device *dev,
uint8_t irte_idx,
uint16_t vector)
{
const struct vtd_driver_api *api =
(const struct vtd_driver_api *)dev->api;
return api->set_irte_vector(dev, irte_idx, vector);
}
/**
* @brief Get the irte allocated for the given vector
*
* @param dev Pointer to the device structure for the driver instance
* @param vector An allocated interrupt vector
*
* @return 0 or positive value on success, a negative errno otherwise
*/
static inline int vtd_get_irte_by_vector(const struct device *dev,
uint16_t vector)
{
const struct vtd_driver_api *api =
(const struct vtd_driver_api *)dev->api;
return api->get_irte_by_vector(dev, vector);
}
/**
* @brief Get the vector given to the IRTE
*
* @param dev Pointer to the device structure for the driver instance
* @param irte_idx A previously allocated irte entry index number
*
* @return the vector set to this IRTE
*/
static inline uint16_t vtd_get_irte_vector(const struct device *dev,
uint8_t irte_idx)
{
const struct vtd_driver_api *api =
(const struct vtd_driver_api *)dev->api;
return api->get_irte_vector(dev, irte_idx);
}
/**
* @brief Set the irq on the allocated irte
*
* @param dev Pointer to the device structure for the driver instance
* @param irte_idx A previously allocated irte entry index number
* @param irq A valid IRQ number
*
* @return 0, a negative errno otherwise
*/
static inline int vtd_set_irte_irq(const struct device *dev,
uint8_t irte_idx,
unsigned int irq)
{
const struct vtd_driver_api *api =
(const struct vtd_driver_api *)dev->api;
return api->set_irte_irq(dev, irte_idx, irq);
}
/**
* @brief Get the irte allocated for the given irq
*
* @param dev Pointer to the device structure for the driver instance
* @param irq A valid IRQ number
*
* @return 0 or positive value on success, a negative errno otherwise
*/
static inline int vtd_get_irte_by_irq(const struct device *dev,
unsigned int irq)
{
const struct vtd_driver_api *api =
(const struct vtd_driver_api *)dev->api;
return api->get_irte_by_irq(dev, irq);
}
static inline void vtd_set_irte_msi(const struct device *dev,
uint8_t irte_idx,
bool msi)
{
const struct vtd_driver_api *api =
(const struct vtd_driver_api *)dev->api;
return api->set_irte_msi(dev, irte_idx, msi);
}
static inline bool vtd_irte_is_msi(const struct device *dev,
uint8_t irte_idx)
{
const struct vtd_driver_api *api =
(const struct vtd_driver_api *)dev->api;
return api->irte_is_msi(dev, irte_idx);
}
#endif /* ZEPHYR_INCLUDE_DRIVERS_INTEL_VTD_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/interrupt_controller/intel_vtd.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,653 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_DMA_MCUX_SMARTDMA_H_
#define ZEPHYR_INCLUDE_DRIVERS_DMA_MCUX_SMARTDMA_H_
/* Write RGB565 data to MIPI DSI via DMA. */
#define DMA_SMARTDMA_MIPI_RGB565_DMA 0
/* Write RGB888 data to MIPI DSI via DMA */
#define DMA_SMARTDMA_MIPI_RGB888_DMA 1
/* Write RGB565 data to MIPI DSI via DMA. Rotate output data by 180 degrees */
#define DMA_SMARTDMA_MIPI_RGB565_180 2
/* Write RGB888 data to MIPI DSI via DMA. Rotate output data by 180 degrees */
#define DMA_SMARTDMA_MIPI_RGB888_180 3
/* Write RGB565 data to MIPI DSI via DMA. Swap data endianness, so that
* little endian RGB565 data will be written big endian style.
*/
#define DMA_SMARTDMA_MIPI_RGB565_DMA_SWAP 4
/* Write RGB888 data to MIPI DSI via DMA. Swap data endianness, so that
* little endian RGB888 data will be written big endian style.
*/
#define DMA_SMARTDMA_MIPI_RGB888_DMA_SWAP 5
/* Write RGB565 data to MIPI DSI via DMA. Rotate output data by 180 degrees,
* and swap data endianness
*/
#define DMA_SMARTDMA_MIPI_RGB565_180_SWAP 6
/* Write RGB888 data to MIPI DSI via DMA. Rotate output data by 180 degrees,
* and swap data endianness
*/
#define DMA_SMARTDMA_MIPI_RGB888_180_SWAP 7
/**
* @brief install SMARTDMA firmware
*
* Install a custom firmware for the smartDMA. This function allows the user
* to install a custom firmware into the smartDMA, which implements
* different API functions than the standard MCUX SDK firmware.
* @param dev: smartDMA device
* @param firmware: address of buffer containing smartDMA firmware
* @param len: length of firmware buffer
*/
void dma_smartdma_install_fw(const struct device *dev, uint8_t *firmware,
uint32_t len);
#define GD32_DMA_FEATURES_FIFO_THRESHOLD(threshold) (threshold & 0x3)
#endif /* ZEPHYR_INCLUDE_DRIVERS_DMA_MCUX_SMARTDMA_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/dma/dma_mcux_smartdma.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 496 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_DMA_GD32_H_
#define ZEPHYR_INCLUDE_DRIVERS_DMA_GD32_H_
#define GD32_DMA_CONFIG_DIRECTION(config) ((config >> 6) & 0x3)
#define GD32_DMA_CONFIG_PERIPH_ADDR_INC(config) ((config >> 9) & 0x1)
#define GD32_DMA_CONFIG_MEMORY_ADDR_INC(config) ((config >> 10) & 0x1)
#define GD32_DMA_CONFIG_PERIPH_WIDTH(config) ((config >> 11) & 0x3)
#define GD32_DMA_CONFIG_MEMORY_WIDTH(config) ((config >> 13) & 0x3)
#define GD32_DMA_CONFIG_PERIPHERAL_INC_FIXED(config) ((config >> 15) & 0x1)
#define GD32_DMA_CONFIG_PRIORITY(config) ((config >> 16) & 0x3)
#define GD32_DMA_FEATURES_FIFO_THRESHOLD(threshold) (threshold & 0x3)
#endif /* ZEPHYR_INCLUDE_DRIVERS_DMA_GD32_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/dma/dma_gd32.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 225 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_DMA_ESP32_H_
#define ZEPHYR_INCLUDE_DRIVERS_DMA_ESP32_H_
enum gdma_trigger_peripheral {
ESP_GDMA_TRIG_PERIPH_M2M = -1,
ESP_GDMA_TRIG_PERIPH_SPI2 = 0,
ESP_GDMA_TRIG_PERIPH_SPI3 = 1,
ESP_GDMA_TRIG_PERIPH_UHCI0 = 2,
ESP_GDMA_TRIG_PERIPH_I2S0 = 3,
ESP_GDMA_TRIG_PERIPH_I2S1 = 4,
ESP_GDMA_TRIG_PERIPH_LCD0 = 5,
ESP_GDMA_TRIG_PERIPH_CAM0 = 5,
ESP_GDMA_TRIG_PERIPH_AES = 6,
ESP_GDMA_TRIG_PERIPH_SHA = 7,
ESP_GDMA_TRIG_PERIPH_ADC0 = 8,
ESP_GDMA_TRIG_PERIPH_DAC0 = 8,
ESP_GDMA_TRIG_PERIPH_RMT = 9,
ESP_GDMA_TRIG_PERIPH_INVALID = 0x3F,
};
#define ESP32_DT_INST_DMA_CTLR(n, name) \
COND_CODE_1(DT_INST_NODE_HAS_PROP(n, dmas), \
(DEVICE_DT_GET(DT_INST_DMAS_CTLR_BY_NAME(n, name))), \
(NULL))
#define ESP32_DT_INST_DMA_CELL(n, name, cell) \
COND_CODE_1(DT_INST_NODE_HAS_PROP(n, dmas), \
(DT_INST_DMAS_CELL_BY_NAME(n, name, cell)), \
(0xff))
#endif /* ZEPHYR_INCLUDE_DRIVERS_DMA_ESP32_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/dma/dma_esp32.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 373 |
```objective-c
/*
*
*/
#ifndef DMA_SMARTBOND_H_
#define DMA_SMARTBOND_H_
/**
* @brief Vendror-specific DMA peripheral triggering sources.
*
* A valid triggering source should be provided when DMA
* is configured for peripheral to peripheral or memory to peripheral
* transactions.
*/
enum dma_smartbond_trig_mux {
DMA_SMARTBOND_TRIG_MUX_SPI = 0x0,
DMA_SMARTBOND_TRIG_MUX_SPI2 = 0x1,
DMA_SMARTBOND_TRIG_MUX_UART = 0x2,
DMA_SMARTBOND_TRIG_MUX_UART2 = 0x3,
DMA_SMARTBOND_TRIG_MUX_I2C = 0x4,
DMA_SMARTBOND_TRIG_MUX_I2C2 = 0x5,
DMA_SMARTBOND_TRIG_MUX_USB = 0x6,
DMA_SMARTBOND_TRIG_MUX_UART3 = 0x7,
DMA_SMARTBOND_TRIG_MUX_PCM = 0x8,
DMA_SMARTBOND_TRIG_MUX_SRC = 0x9,
DMA_SMARTBOND_TRIG_MUX_GPADC = 0xC,
DMA_SMARTBOND_TRIG_MUX_SDADC = 0xD,
DMA_SMARTBOND_TRIG_MUX_NONE = 0xF
};
#endif /* DMA_SMARTBOND_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/dma/dma_smartbond.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 303 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_DMA_INTEL_LPSS_H_
#define ZEPHYR_INCLUDE_DRIVERS_DMA_INTEL_LPSS_H_
#define DMA_INTEL_LPSS_OFFSET 0x800
#define DMA_INTEL_LPSS_REMAP_LOW 0x240
#define DMA_INTEL_LPSS_REMAP_HI 0x244
#define DMA_INTEL_LPSS_TX_CHAN 0
#define DMA_INTEL_LPSS_RX_CHAN 1
#define DMA_INTEL_LPSS_ADDR_RIGHT_SHIFT 32
void dma_intel_lpss_isr(const struct device *dev);
int dma_intel_lpss_setup(const struct device *dev);
void dma_intel_lpss_set_base(const struct device *dev, uintptr_t base);
#endif /* ZEPHYR_INCLUDE_DRIVERS_DMA_INTEL_LPSS_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/dma/dma_intel_lpss.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 173 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_DMA_MCUX_PXP_H_
#define ZEPHYR_INCLUDE_DRIVERS_DMA_MCUX_PXP_H_
#define DMA_MCUX_PXP_CMD_MASK 0xE0
#define DMA_MCUX_PXP_CMD_SHIFT 0x5
#define DMA_MCUX_PXP_FMT_MASK 0x1F
#define DMA_MCUX_PXP_FMT_SHIFT 0x0
/*
* In order to configure the PXP for rotation, the user should
* supply a format and command as the DMA slot parameter, like so:
* dma_slot = (DMA_MCUX_PXP_FTM(DMA_MCUX_PXP_FMT_RGB565) |
* DMA_MCUX_PXP_CMD(DMA_MCUX_PXP_CMD_ROTATE_90))
* head block source address: input buffer address
* head block destination address: output buffer address
* source data size: input buffer size in bytes
* source burst length: height of source buffer in pixels
* dest data size: output buffer size in bytes
* dest burst length: height of destination buffer in pixels
*/
#define DMA_MCUX_PXP_FMT(x) ((x << DMA_MCUX_PXP_FMT_SHIFT) & DMA_MCUX_PXP_FMT_MASK)
#define DMA_MCUX_PXP_CMD(x) ((x << DMA_MCUX_PXP_CMD_SHIFT) & DMA_MCUX_PXP_CMD_MASK)
#define DMA_MCUX_PXP_CMD_ROTATE_0 0
#define DMA_MCUX_PXP_CMD_ROTATE_90 1
#define DMA_MCUX_PXP_CMD_ROTATE_180 2
#define DMA_MCUX_PXP_CMD_ROTATE_270 3
#define DMA_MCUX_PXP_FMT_RGB565 0
#define DMA_MCUX_PXP_FMT_RGB888 1
#define DMA_MCUX_PXP_FMT_ARGB8888 2
#define DMA_MCUX_PXP_FLIP_MASK 0x3
#define DMA_MCUX_PXP_FLIP_SHIFT 0x0
/*
* In order to configure the PXP to flip, the user should
* supply a flip setting as the DMA linked_channel parameter, like so:
* linked_channel |= DMA_MCUX_PXP_FLIP(DMA_MCUX_PXP_FLIP_HORIZONTAL)
*/
#define DMA_MCUX_PXP_FLIP(x) ((x << DMA_MCUX_PXP_FLIP_SHIFT) & DMA_MCUX_PXP_FLIP_MASK)
#define DMA_MCUX_PXP_FLIP_DISABLE 0
#define DMA_MCUX_PXP_FLIP_HORIZONTAL 1
#define DMA_MCUX_PXP_FLIP_VERTICAL 2
#define DMA_MCUX_PXP_FLIP_BOTH 3
#endif /* ZEPHYR_INCLUDE_DRIVERS_DMA_MCUX_PXP_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/dma/dma_mcux_pxp.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 568 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_DMA_STM32_H_
#define ZEPHYR_INCLUDE_DRIVERS_DMA_STM32_H_
/* @brief linked_channel value to inform zephyr dma driver that
* DMA channel will be handled by HAL
*/
#define STM32_DMA_HAL_OVERRIDE 0x7F
/* @brief gives the first DMA channel : 0 or 1 in the register map
* when counting channels from 1 to N or from 0 to N-1
*/
#if defined(CONFIG_DMA_STM32U5)
/* from DTS the dma stream id is in range 0..N-1 */
#define STM32_DMA_STREAM_OFFSET 0
#elif !defined(CONFIG_DMA_STM32_V1)
/* from DTS the dma stream id is in range 1..N */
/* so decrease to set range from 0 from now on */
#define STM32_DMA_STREAM_OFFSET 1
#elif defined(CONFIG_DMA_STM32_V1) && defined(CONFIG_DMAMUX_STM32)
/* typically on the stm32H7 series, DMA V1 with mux */
#define STM32_DMA_STREAM_OFFSET 1
#else
/* from DTS the dma stream id is in range 0..N-1 */
#define STM32_DMA_STREAM_OFFSET 0
#endif /* ! CONFIG_DMA_STM32_V1 */
/* macro for dma slot (only for dma-v1 or dma-v2 types) */
#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32_dma_v2bis)
#define STM32_DMA_SLOT(id, dir, slot) 0
#define STM32_DMA_SLOT_BY_IDX(id, idx, slot) 0
#else
#define STM32_DMA_SLOT(id, dir, slot) DT_INST_DMAS_CELL_BY_NAME(id, dir, slot)
#define STM32_DMA_SLOT_BY_IDX(id, idx, slot) DT_INST_DMAS_CELL_BY_IDX(id, idx, slot)
#endif
#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32_dma_v2) || \
DT_HAS_COMPAT_STATUS_OKAY(st_stm32_dma_v2bis) || \
DT_HAS_COMPAT_STATUS_OKAY(st_stm32_dmamux)
#define STM32_DMA_FEATURES(id, dir) 0
#else
#define STM32_DMA_FEATURES(id, dir) \
DT_INST_DMAS_CELL_BY_NAME(id, dir, features)
#endif
#define STM32_DMA_CTLR(id, dir) \
DT_INST_DMAS_CTLR_BY_NAME(id, dir)
#define STM32_DMA_CHANNEL_CONFIG(id, dir) \
DT_INST_DMAS_CELL_BY_NAME(id, dir, channel_config)
#define STM32_DMA_CHANNEL_CONFIG_BY_IDX(id, idx) \
DT_INST_DMAS_CELL_BY_IDX(id, idx, channel_config)
/* macros for channel-config */
/* direction defined on bits 6-7 */
/* 0 -> MEM_TO_MEM, 1 -> MEM_TO_PERIPH, 2 -> PERIPH_TO_MEM */
#define STM32_DMA_CONFIG_DIRECTION(config) ((config >> 6) & 0x3)
/* periph increment defined on bit 9 as true/false */
#define STM32_DMA_CONFIG_PERIPHERAL_ADDR_INC(config) ((config >> 9) & 0x1)
/* mem increment defined on bit 10 as true/false */
#define STM32_DMA_CONFIG_MEMORY_ADDR_INC(config) ((config >> 10) & 0x1)
/* periph data size defined on bits 11-12 */
/* 0 -> 1 byte, 1 -> 2 bytes, 2 -> 4 bytes */
#define STM32_DMA_CONFIG_PERIPHERAL_DATA_SIZE(config) \
(1 << ((config >> 11) & 0x3))
/* memory data size defined on bits 13, 14 */
/* 0 -> 1 byte, 1 -> 2 bytes, 2 -> 4 bytes */
#define STM32_DMA_CONFIG_MEMORY_DATA_SIZE(config) \
(1 << ((config >> 13) & 0x3))
/* priority increment offset defined on bit 15 */
#define STM32_DMA_CONFIG_PERIPHERAL_INC_FIXED(config) ((config >> 15) & 0x1)
/* priority defined on bits 16-17 as 0, 1, 2, 3 */
#define STM32_DMA_CONFIG_PRIORITY(config) ((config >> 16) & 0x3)
/* macro for features (only for dma-v1) */
#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32_dma_v1)
#define STM32_DMA_FEATURES_FIFO_THRESHOLD(features) (features & 0x3)
#else
#define STM32_DMA_FEATURES_FIFO_THRESHOLD(features) 0
#endif
#endif /* ZEPHYR_INCLUDE_DRIVERS_DMA_STM32_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/dma/dma_stm32.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,001 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_DMA_DMA_MCUX_LPC_H_
#define ZEPHYR_INCLUDE_DRIVERS_DMA_DMA_MCUX_LPC_H_
/*
* LPC DMA engine channel hardware trigger attributes.
* These attributes can be set to the "dma_slot" field
* in a dma_config structure to configure a channel for
* hardware triggering.
*/
/* Peripheral request enable. When set, the peripheral
* request line associated with this channel is used to pace DMA transfers.
*/
#define LPC_DMA_PERIPH_REQ_EN BIT(0)
/* Hardware trigger enable. When set, the hardware trigger connected to this
* channel via INPUTMUX can be used to trigger a transfer
*/
#define LPC_DMA_HWTRIG_EN BIT(1)
/* HW trigger polarity. When this bit is set, the trigger will be active
* high or rising edge triggered, based on TRIG_TYPE selection
*/
#define LPC_DMA_TRIGPOL_HIGH_RISING BIT(2)
/* HW trigger type. When this bit is set, the trigger will be level triggered.
* When it is cleared, the hardware trigger will be edge triggered.
*/
#define LPC_DMA_TRIGTYPE_LEVEL BIT(3)
/* HW trigger burst mode. When set, the hardware trigger will cause a burst
* transfer to occur, the length of which is determined by BURST_POWER.
* When cleared, a single transfer (of the width selected by XFERCFG register)
* will occur.
*/
#define LPC_DMA_TRIGBURST BIT(4)
/* HW trigger burst power. Note that due to the size limit of the dma_slot
* field, the maximum transfer burst possible is 128. The hardware supports
* up to 1024 transfers in BURSTPOWER. The value set here will result in
* 2^BURSTPOWER transfers occurring. So for BURSTPOWER=3, 8 transfers would
* occur.
*/
#define LPC_DMA_BURSTPOWER(pwr) (((pwr) & 0x7) << 5)
/* Used by driver to extract burstpower setting */
#define LPC_DMA_GET_BURSTPOWER(slot) (((slot) & 0xE0) >> 5)
#endif /* ZEPHYR_INCLUDE_DRIVERS_DMA_DMA_MCUX_LPC_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/dma/dma_mcux_lpc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 469 |
```objective-c
/** @file
* @brief BlueNRG HCI extended API.
*/
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_BLUETOOTH_HCI_DRIVER_BLUENRG_H_
#define ZEPHYR_INCLUDE_DRIVERS_BLUETOOTH_HCI_DRIVER_BLUENRG_H_
/**
* @brief BlueNRG HCI Driver-Specific API
* @defgroup bluenrg_hci_driver BlueNRG HCI driver extended API
* @ingroup bluetooth
* @{
*/
#include <stdbool.h>
#ifdef __cplusplus
extern "C" {
#endif
/** @brief Hardware reset the BlueNRG network coprocessor.
*
* Performs hardware reset of the BLE network coprocessor.
* It can also force to enter firmware updater mode.
*
* @param updater_mode flag to indicate whether updater mode needs to be entered.
*
* @return a non-negative value indicating success, or a
* negative error code for failure
*/
int bluenrg_bt_reset(bool updater_mode);
#ifdef __cplusplus
}
#endif
/**
* @}
*/
#endif /* ZEPHYR_INCLUDE_DRIVERS_BLUETOOTH_HCI_DRIVER_BLUENRG_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/bluetooth/hci_driver_bluenrg.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 238 |
```unknown
Miscellaneous Drivers
Misc (or miscellaneous) drivers are device drivers that do not expose generic
Zephyr Device Drivers API. Such drivers have only device-specific API providing
functionalities not covered by any Generic Device Driver API.
This directory contains header files of the Miscellaneous Drivers.
* FT8xx
Embedded Video Engine containing graphic controller, audio processing, and
resistive touch controller. The graphic controller does not provide frame
buffer required by generic display driver API. Instead, it exposes higher
layer graphic operations like widgets, shapes, fonts, text, or bitmaps
rendering. These operations are controlled by a vendor-specific API designed
for this device.
* STM32 Wake-up Pins
STM32 wake-up pins are part of the Power Control (PWR) peripheral.
They can be used to wake-up the system from Poweroff through GPIO pins.
``` | /content/code_sandbox/include/zephyr/drivers/misc/README | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 182 |
```objective-c
/*
*
*/
/**
* @file
* @brief Public APIs for the Device Multiplexer driver
*/
#ifndef INCLUDE_ZEPHYR_DRIVERS_MISC_DEVMUX_H_
#define INCLUDE_ZEPHYR_DRIVERS_MISC_DEVMUX_H_
#include <stdint.h>
#include <zephyr/device.h>
#include <zephyr/kernel.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Devmux Driver APIs
* @defgroup demux_interface Devmux Driver APIs
* @ingroup misc_interfaces
*
* @details
* Devmux operates as a device multiplexer, forwarding the characteristics of
* the selected device.
*
* ```
* +----------+ +----------+
* | devmux | | devmux |
* | | | |
* dev0 | | dev0 | |
* +----------> \ | +----------> |
* | \ | | |
* dev1 | \ | dev0 dev1 | | dev2
* +----------> O +----------> +----------> O +---------->
* | | | / |
* dev2 | | dev2 | / |
* +----------> | +----------> / |
* | | | |
* | | | |
* | | | |
* +-----^----+ +-----^----+
* | |
* select == 0 | select == 2 |
* +--------------+ +---------------+
* ```
* @{
*/
/**
* @brief Get the current selection of a devmux device.
*
* Return the index of the currently selected device.
*
* @param dev the devmux device
* @return The index (>= 0) of the currently active multiplexed device on success
* @retval -EINVAL If @p dev is invalid
*/
__syscall ssize_t devmux_select_get(const struct device *dev);
/**
* @brief Set the selection of a devmux device.
*
* Select the device at @p index.
*
* @param[in] dev the devmux device
* @param index the index representing the desired selection
* @retval 0 On success
* @retval -EINVAL If @p dev is invalid
* @retval -ENODEV If the multiplexed device at @p index is not ready
*/
__syscall int devmux_select_set(struct device *dev, size_t index);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#include <zephyr/syscalls/devmux.h>
#endif /* INCLUDE_ZEPHYR_DRIVERS_MISC_DEVMUX_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/misc/devmux/devmux.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 591 |
```objective-c
/** @file
* @brief Bluetooth HCI driver API.
*/
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_BLUETOOTH_HCI_DRIVER_H_
#define ZEPHYR_INCLUDE_DRIVERS_BLUETOOTH_HCI_DRIVER_H_
/**
* @brief HCI drivers
*
* @deprecated This is the old HCI driver API. Drivers should use @ref bt_hci_api instead.
*
* @defgroup bt_hci_driver HCI drivers
* @ingroup bluetooth
* @{
*/
#include <stdbool.h>
#include <zephyr/net/buf.h>
#include <zephyr/bluetooth/buf.h>
#include <zephyr/bluetooth/hci_vs.h>
#include <zephyr/device.h>
#ifdef __cplusplus
extern "C" {
#endif
enum {
/* The host should never send HCI_Reset */
BT_QUIRK_NO_RESET = BIT(0),
/* The controller does not auto-initiate a DLE procedure when the
* initial connection data length parameters are not equal to the
* default data length parameters. Therefore the host should initiate
* the DLE procedure after connection establishment. */
BT_QUIRK_NO_AUTO_DLE = BIT(1),
};
/**
* @brief Receive data from the controller/HCI driver.
*
* This is the main function through which the HCI driver provides the
* host with data from the controller. The buffer needs to have its type
* set with the help of bt_buf_set_type() before calling this API.
*
* @param buf Network buffer containing data from the controller.
*
* @return 0 on success or negative error number on failure.
*
* @deprecated Use the new HCI driver interface instead: @ref bt_hci_api
*/
__deprecated int bt_recv(struct net_buf *buf);
/** Possible values for the 'bus' member of the bt_hci_driver struct */
enum bt_hci_driver_bus {
BT_HCI_DRIVER_BUS_VIRTUAL = 0,
BT_HCI_DRIVER_BUS_USB = 1,
BT_HCI_DRIVER_BUS_PCCARD = 2,
BT_HCI_DRIVER_BUS_UART = 3,
BT_HCI_DRIVER_BUS_RS232 = 4,
BT_HCI_DRIVER_BUS_PCI = 5,
BT_HCI_DRIVER_BUS_SDIO = 6,
BT_HCI_DRIVER_BUS_SPI = 7,
BT_HCI_DRIVER_BUS_I2C = 8,
BT_HCI_DRIVER_BUS_IPM = 9,
};
#if defined(CONFIG_BT_HCI_SETUP) || defined(__DOXYGEN__)
struct bt_hci_setup_params {
/** The public identity address to give to the controller. This field is used when the
* driver selects @kconfig{CONFIG_BT_HCI_SET_PUBLIC_ADDR} to indicate that it supports
* setting the controller's public address.
*/
bt_addr_t public_addr;
};
#endif
/**
* @brief Abstraction which represents the HCI transport to the controller.
*
* This struct is used to represent the HCI transport to the Bluetooth
* controller.
*/
struct bt_hci_driver {
/** Name of the driver */
const char *name;
/** Bus of the transport (BT_HCI_DRIVER_BUS_*) */
enum bt_hci_driver_bus bus;
/** Specific controller quirks. These are set by the HCI driver
* and acted upon by the host. They can either be statically
* set at buildtime, or set at runtime before the HCI driver's
* open() callback returns.
*/
uint32_t quirks;
/**
* @brief Open the HCI transport.
*
* Opens the HCI transport for operation. This function must not
* return until the transport is ready for operation, meaning it
* is safe to start calling the send() handler.
*
* @return 0 on success or negative error number on failure.
*/
int (*open)(void);
/**
* @brief Close the HCI transport.
*
* Closes the HCI transport. This function must not return until the
* transport is closed.
*
* @return 0 on success or negative error number on failure.
*/
int (*close)(void);
/**
* @brief Send HCI buffer to controller.
*
* Send an HCI command or ACL data to the controller. The exact
* type of the data can be checked with the help of bt_buf_get_type().
*
* @note This function must only be called from a cooperative thread.
*
* @param buf Buffer containing data to be sent to the controller.
*
* @return 0 on success or negative error number on failure.
*/
int (*send)(struct net_buf *buf);
#if defined(CONFIG_BT_HCI_SETUP) || defined(__DOXYGEN__)
/**
* @brief HCI vendor-specific setup
*
* Executes vendor-specific commands sequence to initialize
* BT Controller before BT Host executes Reset sequence.
*
* @note @kconfig{CONFIG_BT_HCI_SETUP} must be selected for this
* field to be available.
*
* @return 0 on success or negative error number on failure.
*/
int (*setup)(const struct bt_hci_setup_params *params);
#endif /* defined(CONFIG_BT_HCI_SETUP) || defined(__DOXYGEN__)*/
};
/**
* @brief Register a new HCI driver to the Bluetooth stack.
*
* This needs to be called before any application code runs. The bt_enable()
* API will fail if there is no driver registered.
*
* @param drv A bt_hci_driver struct representing the driver.
*
* @return 0 on success or negative error number on failure.
*
* @deprecated Use the new HCI driver interface instead: @ref bt_hci_api
*/
__deprecated int bt_hci_driver_register(const struct bt_hci_driver *drv);
/**
* @brief Setup the HCI transport, which usually means to reset the
* Bluetooth IC.
*
* @note A weak version of this function is included in the H4 driver, so
* defining it is optional per board.
*
* @param dev The device structure for the bus connecting to the IC
*
* @return 0 on success, negative error value on failure
*/
int bt_hci_transport_setup(const struct device *dev);
/**
* @brief Teardown the HCI transport.
*
* @note A weak version of this function is included in the IPC driver, so
* defining it is optional. NRF5340 includes support to put network core
* in reset state.
*
* @param dev The device structure for the bus connecting to the IC
*
* @return 0 on success, negative error value on failure
*/
int bt_hci_transport_teardown(const struct device *dev);
/** Allocate an HCI event buffer.
*
* This function allocates a new buffer for an HCI event. It is given the
* event code and the total length of the parameters. Upon successful return
* the buffer is ready to have the parameters encoded into it.
*
* @param evt Event OpCode.
* @param len Length of event parameters.
*
* @return Newly allocated buffer.
*/
struct net_buf *bt_hci_evt_create(uint8_t evt, uint8_t len);
/** Allocate an HCI Command Complete event buffer.
*
* This function allocates a new buffer for HCI Command Complete event.
* It is given the OpCode (encoded e.g. using the BT_OP macro) and the total
* length of the parameters. Upon successful return the buffer is ready to have
* the parameters encoded into it.
*
* @param op Command OpCode.
* @param plen Length of command parameters.
*
* @return Newly allocated buffer.
*/
struct net_buf *bt_hci_cmd_complete_create(uint16_t op, uint8_t plen);
/** Allocate an HCI Command Status event buffer.
*
* This function allocates a new buffer for HCI Command Status event.
* It is given the OpCode (encoded e.g. using the BT_OP macro) and the status
* code. Upon successful return the buffer is ready to have the parameters
* encoded into it.
*
* @param op Command OpCode.
* @param status Status code.
*
* @return Newly allocated buffer.
*/
struct net_buf *bt_hci_cmd_status_create(uint16_t op, uint8_t status);
#ifdef __cplusplus
}
#endif
/**
* @}
*/
#endif /* ZEPHYR_INCLUDE_DRIVERS_BLUETOOTH_HCI_DRIVER_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/bluetooth/hci_driver.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,785 |
```objective-c
/*
*
*/
/**
* @file
* @brief FT8XX display list commands
*/
#ifndef ZEPHYR_DRIVERS_MISC_FT8XX_FT8XX_DL_H_
#define ZEPHYR_DRIVERS_MISC_FT8XX_FT8XX_DL_H_
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief FT8xx display list commands
* @defgroup ft8xx_dl FT8xx display list
* @ingroup ft8xx_interface
* @{
*/
/** Rectangular pixel arrays, in various color formats */
#define FT8XX_BITMAPS 1U
/** Anti-aliased points, point radius is 1-256 pixels */
#define FT8XX_POINTS 2U
/**
* Anti-aliased lines, with width from 0 to 4095 1/16th of pixel units.
* (width is from center of the line to boundary)
*/
#define FT8XX_LINES 3U
/** Anti-aliased lines, connected head-to-tail */
#define FT8XX_LINE_STRIP 4U
/** Edge strips for right */
#define FT8XX_EDGE_STRIP_R 5U
/** Edge strips for left */
#define FT8XX_EDGE_STRIP_L 6U
/** Edge strips for above */
#define FT8XX_EDGE_STRIP_A 7U
/** Edge strips for below */
#define FT8XX_EDGE_STRIP_B 8U
/**
* Round-cornered rectangles, curvature of the corners can be adjusted using
* FT8XX_LINE_WIDTH
*/
#define FT8XX_RECTS 9U
/**
* @brief Begin drawing a graphics primitive
*
* The valid primitives are defined as:
* - @ref FT8XX_BITMAPS
* - @ref FT8XX_POINTS
* - @ref FT8XX_LINES
* - @ref FT8XX_LINE_STRIP
* - @ref FT8XX_EDGE_STRIP_R
* - @ref FT8XX_EDGE_STRIP_L
* - @ref FT8XX_EDGE_STRIP_A
* - @ref FT8XX_EDGE_STRIP_B
* - @ref FT8XX_RECTS
*
* The primitive to be drawn is selected by the @ref FT8XX_BEGIN command. Once
* the primitive is selected, it will be valid till the new primitive is
* selected by the @ref FT8XX_BEGIN command.
*
* @note The primitive drawing operation will not be performed until
* @ref FT8XX_VERTEX2II or @ref FT8XX_VERTEX2F is executed.
*
* @param prim Graphics primitive
*/
#define FT8XX_BEGIN(prim) (0x1f000000 | ((prim) & 0x0f))
/**
* @brief Clear buffers to preset values
*
* Setting @p c to true will clear the color buffer of the FT8xx to the preset
* value. Setting this bit to false will maintain the color buffer of the FT8xx
* with an unchanged value. The preset value is defined in command
* @ref FT8XX_CLEAR_COLOR_RGB for RGB channel and FT8XX_CLEAR_COLOR_A for alpha
* channel.
*
* Setting @p s to true will clear the stencil buffer of the FT8xx to the preset
* value. Setting this bit to false will maintain the stencil buffer of the
* FT8xx with an unchanged value. The preset value is defined in command
* FT8XX_CLEAR_STENCIL.
*
* Setting @p t to true will clear the tag buffer of the FT8xx to the preset
* value. Setting this bit to false will maintain the tag buffer of the FT8xx
* with an unchanged value. The preset value is defined in command
* FT8XX_CLEAR_TAG.
*
* @param c Clear color buffer
* @param s Clear stencil buffer
* @param t Clear tag buffer
*/
#define FT8XX_CLEAR(c, s, t) (0x26000000 | \
((c) ? 0x04 : 0) | ((s) ? 0x02 : 0) | ((t) ? 0x01 : 0))
/**
* @brief Specify clear values for red, green and blue channels
*
* Sets the color values used by a following @ref FT8XX_CLEAR.
*
* @param red Red value used when the color buffer is cleared
* @param green Green value used when the color buffer is cleared
* @param blue Blue value used when the color buffer is cleared
*/
#define FT8XX_CLEAR_COLOR_RGB(red, green, blue) (0x02000000 | \
(((uint32_t)(red) & 0xff) << 16) | \
(((uint32_t)(green) & 0xff) << 8) | \
((uint32_t)(blue) & 0xff))
/**
* @brief Set the current color red, green and blue
*
* Sets red, green and blue values of the FT8xx color buffer which will be
* applied to the following draw operation.
*
* @param red Red value for the current color
* @param green Green value for the current color
* @param blue Blue value for the current color
*/
#define FT8XX_COLOR_RGB(red, green, blue) (0x04000000 | \
(((uint32_t)(red) & 0xff) << 16) | \
(((uint32_t)(green) & 0xff) << 8) | \
((uint32_t)(blue) & 0xff))
/**
* @brief End the display list
*
* FT8xx will ignore all the commands following this command.
*/
#define FT8XX_DISPLAY() 0
/**
* @brief End drawing a graphics primitive
*
* It is recommended to have an @ref FT8XX_END for each @ref FT8XX_BEGIN.
* Whereas advanced users can avoid the usage of @ref FT8XX_END in order to
* save extra graphics instructions in the display list RAM.
*/
#define FT8XX_END() 0x21000000
/**
* @brief Specify the width of lines to be drawn with primitive @ref FT8XX_LINES
*
* Sets the width of drawn lines. The width is the distance from the center of
* the line to the outermost drawn pixel, in units of 1/16 pixel. The valid
* range is from 16 to 4095 in terms of 1/16th pixel units.
*
* @note The @ref FT8XX_LINE_WIDTH command will affect the @ref FT8XX_LINES,
* @ref FT8XX_LINE_STRIP, @ref FT8XX_RECTS, @ref FT8XX_EDGE_STRIP_A /B/R/L
* primitives.
*
* @param width Line width in 1/16 pixel
*/
#define FT8XX_LINE_WIDTH(width) (0x0e000000 | ((uint32_t)(width) & 0xfff))
/**
* @brief Attach the tag value for the following graphics objects.
*
* The initial value of the tag buffer of the FT8xx is specified by command
* FT8XX_CLEAR_TAG and taken effect by command @ref FT8XX_CLEAR. @ref FT8XX_TAG
* command can specify the value of the tag buffer of the FT8xx that applies to
* the graphics objects when they are drawn on the screen. This tag value will
* be assigned to all the following objects, unless the FT8XX_TAG_MASK command
* is used to disable it. Once the following graphics objects are drawn, they
* are attached with the tag value successfully. When the graphics objects
* attached with the tag value are touched, the register
* @ref FT800_REG_TOUCH_TAG or @ref FT810_REG_TOUCH_TAG will be updated with the
* tag value of the graphics object being touched. If there is no @ref FT8XX_TAG
* commands in one display list, all the graphics objects rendered by the
* display list will report tag value as 255 in @ref FT800_REG_TOUCH_TAG or
* @ref FT810_REG_TOUCH_TAG when they were touched.
*
* @param s Tag value 1-255
*/
#define FT8XX_TAG(s) (0x03000000 | (uint8_t)(s))
/**
* @brief Start the operation of graphics primitives at the specified coordinate
*
* The range of coordinates is from -16384 to +16383 in terms of 1/16th pixel
* units. The negative x coordinate value means the coordinate in the left
* virtual screen from (0, 0), while the negative y coordinate value means the
* coordinate in the upper virtual screen from (0, 0). If drawing on the
* negative coordinate position, the drawing operation will not be visible.
*
* @param x Signed x-coordinate in 1/16 pixel precision
* @param y Signed y-coordinate in 1/16 pixel precision
*/
#define FT8XX_VERTEX2F(x, y) (0x40000000 | \
(((int32_t)(x) & 0x7fff) << 15) | \
((int32_t)(y) & 0x7fff))
/**
* @brief Start the operation of graphics primitive at the specified coordinates
*
* The valid range of @p handle is from 0 to 31. From 16 to 31 the bitmap handle
* is dedicated to the FT8xx built-in font.
*
* Cell number is the index of bitmap with same bitmap layout and format.
* For example, for handle 31, the cell 65 means the character "A" in the
* largest built in font.
*
* @param x x-coordinate in pixels, from 0 to 511
* @param y y-coordinate in pixels, from 0 to 511
* @param handle Bitmap handle
* @param cell Cell number
*/
#define FT8XX_VERTEX2II(x, y, handle, cell) (0x80000000 | \
(((uint32_t)(x) & 0x01ff) << 21) | \
(((uint32_t)(y) & 0x01ff) << 12) | \
(((uint32_t)(handle) & 0x1f) << 7) | \
((uint32_t)(cell) & 0x7f))
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* ZEPHYR_DRIVERS_MISC_FT8XX_FT8XX_DL_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/misc/ft8xx/ft8xx_dl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,214 |
```objective-c
/*
*
*/
/**
* @file
* @brief FT8XX coprocessor functions
*/
#ifndef ZEPHYR_DRIVERS_MISC_FT8XX_FT8XX_COPRO_H_
#define ZEPHYR_DRIVERS_MISC_FT8XX_FT8XX_COPRO_H_
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief FT8xx co-processor engine functions
* @defgroup ft8xx_copro FT8xx co-processor
* @ingroup ft8xx_interface
* @{
*/
/** Co-processor widget is drawn in 3D effect */
#define FT8XX_OPT_3D 0
/** Co-processor option to decode the JPEG image to RGB565 format */
#define FT8XX_OPT_RGB565 0
/** Co-processor option to decode the JPEG image to L8 format, i.e., monochrome */
#define FT8XX_OPT_MONO 1
/** No display list commands generated for bitmap decoded from JPEG image */
#define FT8XX_OPT_NODL 2
/** Co-processor widget is drawn without 3D effect */
#define FT8XX_OPT_FLAT 256
/** The number is treated as 32 bit signed integer */
#define FT8XX_OPT_SIGNED 256
/** Co-processor widget centers horizontally */
#define FT8XX_OPT_CENTERX 512
/** Co-processor widget centers vertically */
#define FT8XX_OPT_CENTERY 1024
/** Co-processor widget centers horizontally and vertically */
#define FT8XX_OPT_CENTER 1536
/** The label on the Coprocessor widget is right justified */
#define FT8XX_OPT_RIGHTX 2048
/** Co-processor widget has no background drawn */
#define FT8XX_OPT_NOBACK 4096
/** Co-processor clock widget is drawn without hour ticks.
* Gauge widget is drawn without major and minor ticks.
*/
#define FT8XX_OPT_NOTICKS 8192
/** Co-processor clock widget is drawn without hour and minutes hands,
* only seconds hand is drawn
*/
#define FT8XX_OPT_NOHM 16384
/** The Co-processor gauge has no pointer */
#define FT8XX_OPT_NOPOINTER 16384
/** Co-processor clock widget is drawn without seconds hand */
#define FT8XX_OPT_NOSECS 32768
/** Co-processor clock widget is drawn without hour, minutes and seconds hands */
#define FT8XX_OPT_NOHANDS 49152
/**
* @brief Execute a display list command by co-processor engine
*
* @param cmd Display list command to execute
*/
void ft8xx_copro_cmd(uint32_t cmd);
/**
* @brief Start a new display list
*/
void ft8xx_copro_cmd_dlstart(void);
/**
* @brief Swap the current display list
*/
void ft8xx_copro_cmd_swap(void);
/**
* @brief Draw text
*
* By default (@p x, @p y) is the top-left pixel of the text and the value of
* @p options is zero. @ref FT8XX_OPT_CENTERX centers the text horizontally,
* @ref FT8XX_OPT_CENTERY centers it vertically. @ref FT8XX_OPT_CENTER centers
* the text in both directions. @ref FT8XX_OPT_RIGHTX right-justifies the text,
* so that the @p x is the rightmost pixel.
*
* @param x x-coordinate of text base, in pixels
* @param y y-coordinate of text base, in pixels
* @param font Font to use for text, 0-31. 16-31 are ROM fonts
* @param options Options to apply
* @param s Character string to display, terminated with a null character
*/
void ft8xx_copro_cmd_text(int16_t x,
int16_t y,
int16_t font,
uint16_t options,
const char *s);
/**
* @brief Draw a decimal number
*
* By default (@p x, @p y) is the top-left pixel of the text.
* @ref FT8XX_OPT_CENTERX centers the text horizontally, @ref FT8XX_OPT_CENTERY
* centers it vertically. @ref FT8XX_OPT_CENTER centers the text in both
* directions. @ref FT8XX_OPT_RIGHTX right-justifies the text, so that the @p x
* is the rightmost pixel. By default the number is displayed with no leading
* zeroes, but if a width 1-9 is specified in the @p options, then the number
* is padded if necessary with leading zeroes so that it has the given width.
* If @ref FT8XX_OPT_SIGNED is given, the number is treated as signed, and
* prefixed by a minus sign if negative.
*
* @param x x-coordinate of text base, in pixels
* @param y y-coordinate of text base, in pixels
* @param font Font to use for text, 0-31. 16-31 are ROM fonts
* @param options Options to apply
* @param n The number to display.
*/
void ft8xx_copro_cmd_number(int16_t x,
int16_t y,
int16_t font,
uint16_t options,
int32_t n);
/**
* @brief Execute the touch screen calibration routine
*
* The calibration procedure collects three touches from the touch screen, then
* computes and loads an appropriate matrix into REG_TOUCH_TRANSFORM_A-F. To
* use it, create a display list and then use CMD_CALIBRATE. The co-processor
* engine overlays the touch targets on the current display list, gathers the
* calibration input and updates REG_TOUCH_TRANSFORM_A-F.
*
* @param result Calibration result, written with 0 on failure of calibration
*/
void ft8xx_copro_cmd_calibrate(uint32_t *result);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* ZEPHYR_DRIVERS_MISC_FT8XX_FT8XX_COPRO_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/misc/ft8xx/ft8xx_copro.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,269 |
```objective-c
/*
*
*/
/**
* @file
* @brief FT8XX common functions
*/
#ifndef ZEPHYR_DRIVERS_MISC_FT8XX_FT8XX_COMMON_H_
#define ZEPHYR_DRIVERS_MISC_FT8XX_FT8XX_COMMON_H_
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief FT8xx functions to write and read memory
* @defgroup ft8xx_common FT8xx common functions
* @ingroup ft8xx_interface
* @{
*/
/**
* @brief Write 1 byte (8 bits) to FT8xx memory
*
* @param address Memory address to write to
* @param data Byte to write
*/
void ft8xx_wr8(uint32_t address, uint8_t data);
/**
* @brief Write 2 bytes (16 bits) to FT8xx memory
*
* @param address Memory address to write to
* @param data Value to write
*/
void ft8xx_wr16(uint32_t address, uint16_t data);
/**
* @brief Write 4 bytes (32 bits) to FT8xx memory
*
* @param address Memory address to write to
* @param data Value to write
*/
void ft8xx_wr32(uint32_t address, uint32_t data);
/**
* @brief Read 1 byte (8 bits) from FT8xx memory
*
* @param address Memory address to read from
*
* @return Value read from memory
*/
uint8_t ft8xx_rd8(uint32_t address);
/**
* @brief Read 2 bytes (16 bits) from FT8xx memory
*
* @param address Memory address to read from
*
* @return Value read from memory
*/
uint16_t ft8xx_rd16(uint32_t address);
/**
* @brief Read 4 bytes (32 bits) from FT8xx memory
*
* @param address Memory address to read from
*
* @return Value read from memory
*/
uint32_t ft8xx_rd32(uint32_t address);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* ZEPHYR_DRIVERS_MISC_FT8XX_FT8XX_COMMON_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/misc/ft8xx/ft8xx_common.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 456 |
```objective-c
/*
*
*/
/**
* @file
* @brief FT8XX reference API
*/
#ifndef ZEPHYR_DRIVERS_MISC_FT8XX_FT8XX_REFERENCE_API_H_
#define ZEPHYR_DRIVERS_MISC_FT8XX_FT8XX_REFERENCE_API_H_
#include <stdint.h>
#include <zephyr/drivers/misc/ft8xx/ft8xx_copro.h>
#include <zephyr/drivers/misc/ft8xx/ft8xx_common.h>
#include <zephyr/drivers/misc/ft8xx/ft8xx_dl.h>
#include <zephyr/drivers/misc/ft8xx/ft8xx_memory.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief FT8xx reference API
*
* API defined according to FT800 Programmers Guide API reference definition.
*
* @note Function names defined in this header may easily collide with names
* provided by other modules. Include this header with caution. If naming
* conflict occurs instead of including this header, use @c ft8xx_
* prefixed names.
*
* @defgroup ft8xx_reference_api FT8xx reference API
* @ingroup ft8xx_interface
* @{
*/
/**
* @brief Write 1 byte (8 bits) to FT8xx memory
*
* @param address Memory address to write to
* @param data Byte to write
*/
static inline void wr8(uint32_t address, uint8_t data)
{
ft8xx_wr8(address, data);
}
/**
* @brief Write 2 bytes (16 bits) to FT8xx memory
*
* @param address Memory address to write to
* @param data Value to write
*/
static inline void wr16(uint32_t address, uint16_t data)
{
ft8xx_wr16(address, data);
}
/**
* @brief Write 4 bytes (32 bits) to FT8xx memory
*
* @param address Memory address to write to
* @param data Value to write
*/
static inline void wr32(uint32_t address, uint32_t data)
{
ft8xx_wr32(address, data);
}
/**
* @brief Read 1 byte (8 bits) from FT8xx memory
*
* @param address Memory address to read from
*
* @return Value read from memory
*/
static inline uint8_t rd8(uint32_t address)
{
return ft8xx_rd8(address);
}
/**
* @brief Read 2 bytes (16 bits) from FT8xx memory
*
* @param address Memory address to read from
*
* @return Value read from memory
*/
static inline uint16_t rd16(uint32_t address)
{
return ft8xx_rd16(address);
}
/**
* @brief Read 4 bytes (32 bits) from FT8xx memory
*
* @param address Memory address to read from
*
* @return Value read from memory
*/
static inline uint32_t rd32(uint32_t address)
{
return ft8xx_rd32(address);
}
/** Co-processor widget is drawn in 3D effect */
#define OPT_3D FT8XX_OPT_3D
/** Co-processor option to decode the JPEG image to RGB565 format */
#define OPT_RGB565 FT8XX_OPT_RGB565
/** Co-processor option to decode the JPEG image to L8 format, i.e., monochrome */
#define OPT_MONO FT8XX_OPT_MONO
/** No display list commands generated for bitmap decoded from JPEG image */
#define OPT_NODL FT8XX_OPT_NODL
/** Co-processor widget is drawn without 3D effect */
#define OPT_FLAT FT8XX_OPT_FLAT
/** The number is treated as 32 bit signed integer */
#define OPT_SIGNED FT8XX_OPT_SIGNED
/** Co-processor widget centers horizontally */
#define OPT_CENTERX FT8XX_OPT_CENTERX
/** Co-processor widget centers vertically */
#define OPT_CENTERY FT8XX_OPT_CENTERY
/** Co-processor widget centers horizontally and vertically */
#define OPT_CENTER FT8XX_OPT_CENTER
/** The label on the Coprocessor widget is right justified */
#define OPT_RIGHTX FT8XX_OPT_RIGHTX
/** Co-processor widget has no background drawn */
#define OPT_NOBACK FT8XX_OPT_NOBACK
/** Co-processor clock widget is drawn without hour ticks.
* Gauge widget is drawn without major and minor ticks.
*/
#define OPT_NOTICKS FT8XX_OPT_NOTICKS
/** Co-processor clock widget is drawn without hour and minutes hands,
* only seconds hand is drawn
*/
#define OPT_NOHM FT8XX_OPT_NOHM
/** The Co-processor gauge has no pointer */
#define OPT_NOPOINTER FT8XX_OPT_NOPOINTER
/** Co-processor clock widget is drawn without seconds hand */
#define OPT_NOSECS FT8XX_OPT_NOSECS
/** Co-processor clock widget is drawn without hour, minutes and seconds hands */
#define OPT_NOHANDS FT8XX_OPT_NOHANDS
/**
* @brief Execute a display list command by co-processor engine
*
* @param command Display list command to execute
*/
static inline void cmd(uint32_t command)
{
ft8xx_copro_cmd(command);
}
/**
* @brief Start a new display list
*/
static inline void cmd_dlstart(void)
{
ft8xx_copro_cmd_dlstart();
}
/**
* @brief Swap the current display list
*/
static inline void cmd_swap(void)
{
ft8xx_copro_cmd_swap();
}
/**
* @brief Draw text
*
* By default (x,y) is the top-left pixel of the text and the value of
* @p options is zero. OPT_CENTERX centers the text horizontally, OPT_CENTERY
* centers it vertically. OPT_CENTER centers the text in both directions.
* OPT_RIGHTX right-justifies the text, so that the x is the rightmost pixel.
*
* @param x x-coordinate of text base, in pixels
* @param y y-coordinate of text base, in pixels
* @param font Font to use for text, 0-31. 16-31 are ROM fonts
* @param options Options to apply
* @param s Character string to display, terminated with a null character
*/
static inline void cmd_text(int16_t x,
int16_t y,
int16_t font,
uint16_t options,
const char *s)
{
ft8xx_copro_cmd_text(x, y, font, options, s);
}
/**
* @brief Draw a decimal number
*
* By default (@p x, @p y) is the top-left pixel of the text. OPT_CENTERX
* centers the text horizontally, OPT_CENTERY centers it vertically. OPT_CENTER
* centers the text in both directions. OPT_RIGHTX right-justifies the text, so
* that the @p x is the rightmost pixel. By default the number is displayed
* with no leading zeroes, but if a width 1-9 is specified in the @p options,
* then the number is padded if necessary with leading zeroes so that it has
* the given width. If OPT_SIGNED is given, the number is treated as signed,
* and prefixed by a minus sign if negative.
*
* @param x x-coordinate of text base, in pixels
* @param y y-coordinate of text base, in pixels
* @param font Font to use for text, 0-31. 16-31 are ROM fonts
* @param options Options to apply
* @param n The number to display.
*/
static inline void cmd_number(int16_t x,
int16_t y,
int16_t font,
uint16_t options,
int32_t n)
{
ft8xx_copro_cmd_number(x, y, font, options, n);
}
/**
* @brief Execute the touch screen calibration routine
*
* The calibration procedure collects three touches from the touch screen, then
* computes and loads an appropriate matrix into REG_TOUCH_TRANSFORM_A-F. To
* use it, create a display list and then use CMD_CALIBRATE. The co-processor
* engine overlays the touch targets on the current display list, gathers the
* calibration input and updates REG_TOUCH_TRANSFORM_A-F.
*
* @param result Calibration result, written with 0 on failure of calibration
*/
static inline void cmd_calibrate(uint32_t *result)
{
ft8xx_copro_cmd_calibrate(result);
}
/** Rectangular pixel arrays, in various color formats */
#define BITMAPS FT8XX_BITMAPS
/** Anti-aliased points, point radius is 1-256 pixels */
#define POINTS FT8XX_POINTS
/**
* Anti-aliased lines, with width from 0 to 4095 1/16th of pixel units.
* (width is from center of the line to boundary)
*/
#define LINES FT8XX_LINES
/** Anti-aliased lines, connected head-to-tail */
#define LINE_STRIP FT8XX_LINE_STRIP
/** Edge strips for right */
#define EDGE_STRIP_R FT8XX_EDGE_STRIP_R
/** Edge strips for left */
#define EDGE_STRIP_L FT8XX_EDGE_STRIP_L
/** Edge strips for above */
#define EDGE_STRIP_A FT8XX_EDGE_STRIP_A
/** Edge strips for below */
#define EDGE_STRIP_B FT8XX_EDGE_STRIP_B
/**
* Round-cornered rectangles, curvature of the corners can be adjusted using
* LINE_WIDTH
*/
#define RECTS FT8XX_RECTS
/**
* @brief Begin drawing a graphics primitive
*
* The valid primitives are defined as:
* - @ref BITMAPS
* - @ref POINTS
* - @ref LINES
* - @ref LINE_STRIP
* - @ref EDGE_STRIP_R
* - @ref EDGE_STRIP_L
* - @ref EDGE_STRIP_A
* - @ref EDGE_STRIP_B
* - @ref RECTS
*
* The primitive to be drawn is selected by the @ref BEGIN command. Once the
* primitive is selected, it will be valid till the new primitive is selected
* by the @ref BEGIN command.
*
* @note The primitive drawing operation will not be performed until
* @ref VERTEX2II or @ref VERTEX2F is executed.
*
* @param prim Graphics primitive
*/
#define BEGIN(prim) FT8XX_BEGIN(prim)
/**
* @brief Clear buffers to preset values
*
* Setting @p c to true will clear the color buffer of the FT8xx to the preset
* value. Setting this bit to false will maintain the color buffer of the FT8xx
* with an unchanged value. The preset value is defined in command
* @ref CLEAR_COLOR_RGB for RGB channel and CLEAR_COLOR_A for alpha channel.
*
* Setting @p s to true will clear the stencil buffer of the FT8xx to the preset
* value. Setting this bit to false will maintain the stencil buffer of the
* FT8xx with an unchanged value. The preset value is defined in command
* CLEAR_STENCIL.
*
* Setting @p t to true will clear the tag buffer of the FT8xx to the preset
* value. Setting this bit to false will maintain the tag buffer of the FT8xx
* with an unchanged value. The preset value is defined in command CLEAR_TAG.
*
* @param c Clear color buffer
* @param s Clear stencil buffer
* @param t Clear tag buffer
*/
#define CLEAR(c, s, t) FT8XX_CLEAR(c, s, t)
/**
* @brief Specify clear values for red, green and blue channels
*
* Sets the color values used by a following @ref CLEAR.
*
* @param red Red value used when the color buffer is cleared
* @param green Green value used when the color buffer is cleared
* @param blue Blue value used when the color buffer is cleared
*/
#define CLEAR_COLOR_RGB(red, green, blue) FT8XX_CLEAR_COLOR_RGB(red, green, blue)
/**
* @brief Set the current color red, green and blue
*
* Sets red, green and blue values of the FT8xx color buffer which will be
* applied to the following draw operation.
*
* @param red Red value for the current color
* @param green Green value for the current color
* @param blue Blue value for the current color
*/
#define COLOR_RGB(red, green, blue) FT8XX_COLOR_RGB(red, green, blue)
/**
* @brief End the display list
*
* FT8xx will ignore all the commands following this command.
*/
#define DISPLAY() FT8XX_DISPLAY()
/**
* @brief End drawing a graphics primitive
*
* It is recommended to have an @ref END for each @ref BEGIN. Whereas advanced
* users can avoid the usage of @ref END in order to save extra graphics
* instructions in the display list RAM.
*/
#define END() FT8XX_END()
/**
* @brief Specify the width of lines to be drawn with primitive @ref LINES
*
* Sets the width of drawn lines. The width is the distance from the center of
* the line to the outermost drawn pixel, in units of 1/16 pixel. The valid
* range is from 16 to 4095 in terms of 1/16th pixel units.
*
* @note The @ref LINE_WIDTH command will affect the @ref LINES,
* @ref LINE_STRIP, @ref RECTS, @ref EDGE_STRIP_A /B/R/L primitives.
*
* @param width Line width in 1/16 pixel
*/
#define LINE_WIDTH(width) FT8XX_LINE_WIDTH(width)
/**
* @brief Attach the tag value for the following graphics objects.
*
* The initial value of the tag buffer of the FT8xx is specified by command
* CLEAR_TAG and taken effect by command @ref CLEAR. @ref TAG command can
* specify the value of the tag buffer of the FT8xx that applies to the graphics
* objects when they are drawn on the screen. This @ref TAG value will be
* assigned to all the following objects, unless the TAG_MASK command is used to
* disable it. Once the following graphics objects are drawn, they are attached
* with the tag value successfully. When the graphics objects attached with the
* tag value are touched, the register @ref REG_TOUCH_TAG will be updated with
* the tag value of the graphics object being touched. If there is no @ref TAG
* commands in one display list, all the graphics objects rendered by the
* display list will report tag value as 255 in @ref REG_TOUCH_TAG when they
* were touched.
*
* @param s Tag value 1-255
*/
#define TAG(s) FT8XX_TAG(s)
/**
* @brief Start the operation of graphics primitives at the specified coordinate
*
* The range of coordinates is from -16384 to +16383 in terms of 1/16th pixel
* units. The negative x coordinate value means the coordinate in the left
* virtual screen from (0, 0), while the negative y coordinate value means the
* coordinate in the upper virtual screen from (0, 0). If drawing on the
* negative coordinate position, the drawing operation will not be visible.
*
* @param x Signed x-coordinate in 1/16 pixel precision
* @param y Signed y-coordinate in 1/16 pixel precision
*/
#define VERTEX2F(x, y) FT8XX_VERTEX2F(x, y)
/**
* @brief Start the operation of graphics primitive at the specified coordinates
*
* The valid range of @p handle is from 0 to 31. From 16 to 31 the bitmap handle
* is dedicated to the FT8xx built-in font.
*
* Cell number is the index of bitmap with same bitmap layout and format.
* For example, for handle 31, the cell 65 means the character "A" in the
* largest built in font.
*
* @param x x-coordinate in pixels, from 0 to 511
* @param y y-coordinate in pixels, from 0 to 511
* @param handle Bitmap handle
* @param cell Cell number
*/
#define VERTEX2II(x, y, handle, cell) FT8XX_VERTEX2II(x, y, handle, cell)
#if defined(CONFIG_FT800)
/** Main parts of FT800 memory map */
enum ft8xx_memory_map_t {
RAM_G = FT800_RAM_G,
ROM_CHIPID = FT800_ROM_CHIPID,
ROM_FONT = FT800_ROM_FONT,
ROM_FONT_ADDR = FT800_ROM_FONT_ADDR,
RAM_DL = FT800_RAM_DL,
RAM_PAL = FT800_RAM_PAL,
REG_ = FT800_REG_,
RAM_CMD = FT800_RAM_CMD
};
#else /* Definition of FT810 memory map */
/** Main parts of FT810 memory map */
enum ft8xx_memory_map_t {
RAM_G = FT810_RAM_G,
RAM_DL = FT810_RAM_DL,
REG_ = FT810_REG_,
RAM_CMD = FT810_RAM_CMD
};
#endif
#if defined(CONFIG_FT800)
/** FT800 register addresses */
enum ft8xx_register_address_t {
REG_ID = FT800_REG_ID,
REG_FRAMES = FT800_REG_FRAMES,
REG_CLOCK = FT800_REG_CLOCK,
REG_FREQUENCY = FT800_REG_FREQUENCY,
REG_RENDERMODE = FT800_REG_RENDERMODE,
REG_SNAPY = FT800_REG_SNAPY,
REG_SNAPSHOT = FT800_REG_SNAPSHOT,
REG_CPURESET = FT800_REG_CPURESET,
REG_TAP_CRC = FT800_REG_TAP_CRC,
REG_TAP_MASK = FT800_REG_TAP_MASK,
REG_HCYCLE = FT800_REG_HCYCLE,
REG_HOFFSET = FT800_REG_HOFFSET,
REG_HSIZE = FT800_REG_HSIZE,
REG_HSYNC0 = FT800_REG_HSYNC0,
REG_HSYNC1 = FT800_REG_HSYNC1,
REG_VCYCLE = FT800_REG_VCYCLE,
REG_VOFFSET = FT800_REG_VOFFSET,
REG_VSIZE = FT800_REG_VSIZE,
REG_VSYNC0 = FT800_REG_VSYNC0,
REG_VSYNC1 = FT800_REG_VSYNC1,
REG_DLSWAP = FT800_REG_DLSWAP,
REG_ROTATE = FT800_REG_ROTATE,
REG_OUTBITS = FT800_REG_OUTBITS,
REG_DITHER = FT800_REG_DITHER,
REG_SWIZZLE = FT800_REG_SWIZZLE,
REG_CSPREAD = FT800_REG_CSPREAD,
REG_PCLK_POL = FT800_REG_PCLK_POL,
REG_PCLK = FT800_REG_PCLK,
REG_TAG_X = FT800_REG_TAG_X,
REG_TAG_Y = FT800_REG_TAG_Y,
REG_TAG = FT800_REG_TAG,
REG_VOL_PB = FT800_REG_VOL_PB,
REG_VOL_SOUND = FT800_REG_VOL_SOUND,
REG_SOUND = FT800_REG_SOUND,
REG_PLAY = FT800_REG_PLAY,
REG_GPIO_DIR = FT800_REG_GPIO_DIR,
REG_GPIO = FT800_REG_GPIO,
REG_INT_FLAGS = FT800_REG_INT_FLAGS,
REG_INT_EN = FT800_REG_INT_EN,
REG_INT_MASK = FT800_REG_INT_MASK,
REG_PLAYBACK_START = FT800_REG_PLAYBACK_START,
REG_PLAYBACK_LENGTH = FT800_REG_PLAYBACK_LENGTH,
REG_PLAYBACK_READPTR = FT800_REG_PLAYBACK_READPTR,
REG_PLAYBACK_FREQ = FT800_REG_PLAYBACK_FREQ,
REG_PLAYBACK_FORMAT = FT800_REG_PLAYBACK_FORMAT,
REG_PLAYBACK_LOOP = FT800_REG_PLAYBACK_LOOP,
REG_PLAYBACK_PLAY = FT800_REG_PLAYBACK_PLAY,
REG_PWM_HZ = FT800_REG_PWM_HZ,
REG_PWM_DUTY = FT800_REG_PWM_DUTY,
REG_MACRO_0 = FT800_REG_MACRO_0,
REG_MACRO_1 = FT800_REG_MACRO_1,
REG_CMD_READ = FT800_REG_CMD_READ,
REG_CMD_WRITE = FT800_REG_CMD_WRITE,
REG_CMD_DL = FT800_REG_CMD_DL,
REG_TOUCH_MODE = FT800_REG_TOUCH_MODE,
REG_TOUCH_ADC_MODE = FT800_REG_TOUCH_ADC_MODE,
REG_TOUCH_CHARGE = FT800_REG_TOUCH_CHARGE,
REG_TOUCH_SETTLE = FT800_REG_TOUCH_SETTLE,
REG_TOUCH_OVERSAMPLE = FT800_REG_TOUCH_OVERSAMPLE,
REG_TOUCH_RZTHRESH = FT800_REG_TOUCH_RZTHRESH,
REG_TOUCH_RAW_XY = FT800_REG_TOUCH_RAW_XY,
REG_TOUCH_RZ = FT800_REG_TOUCH_RZ,
REG_TOUCH_SCREEN_XY = FT800_REG_TOUCH_SCREEN_XY,
REG_TOUCH_TAG_XY = FT800_REG_TOUCH_TAG_XY,
REG_TOUCH_TAG = FT800_REG_TOUCH_TAG,
REG_TOUCH_TRANSFORM_A = FT800_REG_TOUCH_TRANSFORM_A,
REG_TOUCH_TRANSFORM_B = FT800_REG_TOUCH_TRANSFORM_B,
REG_TOUCH_TRANSFORM_C = FT800_REG_TOUCH_TRANSFORM_C,
REG_TOUCH_TRANSFORM_D = FT800_REG_TOUCH_TRANSFORM_D,
REG_TOUCH_TRANSFORM_E = FT800_REG_TOUCH_TRANSFORM_E,
REG_TOUCH_TRANSFORM_F = FT800_REG_TOUCH_TRANSFORM_F,
REG_TOUCH_DIRECT_XY = FT800_REG_TOUCH_DIRECT_XY,
REG_TOUCH_DIRECT_Z1Z2 = FT800_REG_TOUCH_DIRECT_Z1Z2,
REG_TRACKER = FT800_REG_TRACKER
};
#else /* Definition of FT810 registers */
/** FT810 register addresses */
enum ft8xx_register_address_t {
REG_TRIM = FT810_REG_TRIM,
REG_ID = FT810_REG_ID,
REG_FRAMES = FT810_REG_FRAMES,
REG_CLOCK = FT810_REG_CLOCK,
REG_FREQUENCY = FT810_REG_FREQUENCY,
REG_RENDERMODE = FT810_REG_RENDERMODE,
REG_SNAPY = FT810_REG_SNAPY,
REG_SNAPSHOT = FT810_REG_SNAPSHOT,
REG_CPURESET = FT810_REG_CPURESET,
REG_TAP_CRC = FT810_REG_TAP_CRC,
REG_TAP_MASK = FT810_REG_TAP_MASK,
REG_HCYCLE = FT810_REG_HCYCLE,
REG_HOFFSET = FT810_REG_HOFFSET,
REG_HSIZE = FT810_REG_HSIZE,
REG_HSYNC0 = FT810_REG_HSYNC0,
REG_HSYNC1 = FT810_REG_HSYNC1,
REG_VCYCLE = FT810_REG_VCYCLE,
REG_VOFFSET = FT810_REG_VOFFSET,
REG_VSIZE = FT810_REG_VSIZE,
REG_VSYNC0 = FT810_REG_VSYNC0,
REG_VSYNC1 = FT810_REG_VSYNC1,
REG_DLSWAP = FT810_REG_DLSWAP,
REG_ROTATE = FT810_REG_ROTATE,
REG_OUTBITS = FT810_REG_OUTBITS,
REG_DITHER = FT810_REG_DITHER,
REG_SWIZZLE = FT810_REG_SWIZZLE,
REG_CSPREAD = FT810_REG_CSPREAD,
REG_PCLK_POL = FT810_REG_PCLK_POL,
REG_PCLK = FT810_REG_PCLK,
REG_TAG_X = FT810_REG_TAG_X,
REG_TAG_Y = FT810_REG_TAG_Y,
REG_TAG = FT810_REG_TAG,
REG_VOL_PB = FT810_REG_VOL_PB,
REG_VOL_SOUND = FT810_REG_VOL_SOUND,
REG_SOUND = FT810_REG_SOUND,
REG_PLAY = FT810_REG_PLAY,
REG_GPIO_DIR = FT810_REG_GPIO_DIR,
REG_GPIO = FT810_REG_GPIO,
REG_GPIOX_DIR = FT810_REG_GPIOX_DIR,
REG_GPIOX = FT810_REG_GPIOX,
REG_INT_FLAGS = FT810_REG_INT_FLAGS,
REG_INT_EN = FT810_REG_INT_EN,
REG_INT_MASK = FT810_REG_INT_MASK,
REG_PLAYBACK_START = FT810_REG_PLAYBACK_START,
REG_PLAYBACK_LENGTH = FT810_REG_PLAYBACK_LENGTH,
REG_PLAYBACK_READPTR = FT810_REG_PLAYBACK_READPTR,
REG_PLAYBACK_FREQ = FT810_REG_PLAYBACK_FREQ,
REG_PLAYBACK_FORMAT = FT810_REG_PLAYBACK_FORMAT,
REG_PLAYBACK_LOOP = FT810_REG_PLAYBACK_LOOP,
REG_PLAYBACK_PLAY = FT810_REG_PLAYBACK_PLAY,
REG_PWM_HZ = FT810_REG_PWM_HZ,
REG_PWM_DUTY = FT810_REG_PWM_DUTY,
REG_CMD_READ = FT810_REG_CMD_READ,
REG_CMD_WRITE = FT810_REG_CMD_WRITE,
REG_CMD_DL = FT810_REG_CMD_DL,
REG_TOUCH_MODE = FT810_REG_TOUCH_MODE,
REG_TOUCH_ADC_MODE = FT810_REG_TOUCH_ADC_MODE,
REG_TOUCH_CHARGE = FT810_REG_TOUCH_CHARGE,
REG_TOUCH_SETTLE = FT810_REG_TOUCH_SETTLE,
REG_TOUCH_OVERSAMPLE = FT810_REG_TOUCH_OVERSAMPLE,
REG_TOUCH_RZTHRESH = FT810_REG_TOUCH_RZTHRESH,
REG_TOUCH_RAW_XY = FT810_REG_TOUCH_RAW_XY,
REG_TOUCH_RZ = FT810_REG_TOUCH_RZ,
REG_TOUCH_SCREEN_XY = FT810_REG_TOUCH_SCREEN_XY,
REG_TOUCH_TAG_XY = FT810_REG_TOUCH_TAG_XY,
REG_TOUCH_TAG = FT810_REG_TOUCH_TAG,
REG_TOUCH_TRANSFORM_A = FT810_REG_TOUCH_TRANSFORM_A,
REG_TOUCH_TRANSFORM_B = FT810_REG_TOUCH_TRANSFORM_B,
REG_TOUCH_TRANSFORM_C = FT810_REG_TOUCH_TRANSFORM_C,
REG_TOUCH_TRANSFORM_D = FT810_REG_TOUCH_TRANSFORM_D,
REG_TOUCH_TRANSFORM_E = FT810_REG_TOUCH_TRANSFORM_E,
REG_TOUCH_TRANSFORM_F = FT810_REG_TOUCH_TRANSFORM_F,
REG_TOUCH_CONFIG = FT810_REG_TOUCH_CONFIG,
REG_SPI_WIDTH = FT810_REG_SPI_WIDTH,
REG_TOUCH_DIRECT_XY = FT810_REG_TOUCH_DIRECT_XY,
REG_TOUCH_DIRECT_Z1Z2 = FT810_REG_TOUCH_DIRECT_Z1Z2,
REG_CMDB_SPACE = FT810_REG_CMDB_SPACE,
REG_CMDB_WRITE = FT810_REG_CMDB_WRITE,
REG_TRACKER = FT810_REG_TRACKER,
REG_TRACKER1 = FT810_REG_TRACKER1,
REG_TRACKER2 = FT810_REG_TRACKER2,
REG_TRACKER3 = FT810_REG_TRACKER3,
REG_TRACKER4 = FT810_REG_TRACKER4,
REG_MEDIAFIFO_READ = FT810_REG_MEDIAFIFO_READ,
REG_MEDIAFIFO_WRITE = FT810_REG_MEDIAFIFO_WRITE,
};
#endif
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* ZEPHYR_DRIVERS_MISC_FT8XX_FT8XX_REFERENCE_API_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/misc/ft8xx/ft8xx_reference_api.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 5,569 |
```objective-c
/*
*
*/
/**
* @file
* @brief FT8XX memory map
*/
#ifndef ZEPHYR_DRIVERS_MISC_FT8XX_FT8XX_MEMORY_H_
#define ZEPHYR_DRIVERS_MISC_FT8XX_FT8XX_MEMORY_H_
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief FT8xx memory addresses
* @defgroup ft8xx_memory FT8xx memory map
* @ingroup ft8xx_interface
* @{
*/
/** Main parts of FT800 memory map */
enum ft800_memory_map_t {
FT800_RAM_G = 0x000000,
FT800_ROM_CHIPID = 0x0C0000,
FT800_ROM_FONT = 0x0BB23C,
FT800_ROM_FONT_ADDR = 0x0FFFFC,
FT800_RAM_DL = 0x100000,
FT800_RAM_PAL = 0x102000,
FT800_REG_ = 0x102400,
FT800_RAM_CMD = 0x108000
};
/** Main parts of FT810 memory map */
enum ft810_memory_map_t {
FT810_RAM_G = 0x000000,
FT810_RAM_DL = 0x300000,
FT810_REG_ = 0x302000,
FT810_RAM_CMD = 0x308000
};
/** FT800 register addresses */
enum ft800_register_address_t {
FT800_REG_ID = 0x102400,
FT800_REG_FRAMES = 0x102404,
FT800_REG_CLOCK = 0x102408,
FT800_REG_FREQUENCY = 0x10240C,
FT800_REG_RENDERMODE = 0x102410,
FT800_REG_SNAPY = 0x102414,
FT800_REG_SNAPSHOT = 0x102418,
FT800_REG_CPURESET = 0x10241C,
FT800_REG_TAP_CRC = 0x102420,
FT800_REG_TAP_MASK = 0x102424,
FT800_REG_HCYCLE = 0x102428,
FT800_REG_HOFFSET = 0x10242C,
FT800_REG_HSIZE = 0x102430,
FT800_REG_HSYNC0 = 0x102434,
FT800_REG_HSYNC1 = 0x102438,
FT800_REG_VCYCLE = 0x10243C,
FT800_REG_VOFFSET = 0x102440,
FT800_REG_VSIZE = 0x102444,
FT800_REG_VSYNC0 = 0x102448,
FT800_REG_VSYNC1 = 0x10244C,
FT800_REG_DLSWAP = 0x102450,
FT800_REG_ROTATE = 0x102454,
FT800_REG_OUTBITS = 0x102458,
FT800_REG_DITHER = 0x10245C,
FT800_REG_SWIZZLE = 0x102460,
FT800_REG_CSPREAD = 0x102464,
FT800_REG_PCLK_POL = 0x102468,
FT800_REG_PCLK = 0x10246C,
FT800_REG_TAG_X = 0x102470,
FT800_REG_TAG_Y = 0x102474,
FT800_REG_TAG = 0x102478,
FT800_REG_VOL_PB = 0x10247C,
FT800_REG_VOL_SOUND = 0x102480,
FT800_REG_SOUND = 0x102484,
FT800_REG_PLAY = 0x102488,
FT800_REG_GPIO_DIR = 0x10248C,
FT800_REG_GPIO = 0x102490,
FT800_REG_INT_FLAGS = 0x102498,
FT800_REG_INT_EN = 0x10249C,
FT800_REG_INT_MASK = 0x1024A0,
FT800_REG_PLAYBACK_START = 0x1024A4,
FT800_REG_PLAYBACK_LENGTH = 0x1024A8,
FT800_REG_PLAYBACK_READPTR = 0x1024AC,
FT800_REG_PLAYBACK_FREQ = 0x1024B0,
FT800_REG_PLAYBACK_FORMAT = 0x1024B4,
FT800_REG_PLAYBACK_LOOP = 0x1024B8,
FT800_REG_PLAYBACK_PLAY = 0x1024BC,
FT800_REG_PWM_HZ = 0x1024C0,
FT800_REG_PWM_DUTY = 0x1024C4,
FT800_REG_MACRO_0 = 0x1024C8,
FT800_REG_MACRO_1 = 0x1024CC,
FT800_REG_CMD_READ = 0x1024E4,
FT800_REG_CMD_WRITE = 0x1024E8,
FT800_REG_CMD_DL = 0x1024EC,
FT800_REG_TOUCH_MODE = 0x1024F0,
FT800_REG_TOUCH_ADC_MODE = 0x1024F4,
FT800_REG_TOUCH_CHARGE = 0x1024F8,
FT800_REG_TOUCH_SETTLE = 0x1024FC,
FT800_REG_TOUCH_OVERSAMPLE = 0x102500,
FT800_REG_TOUCH_RZTHRESH = 0x102504,
FT800_REG_TOUCH_RAW_XY = 0x102508,
FT800_REG_TOUCH_RZ = 0x10250C,
FT800_REG_TOUCH_SCREEN_XY = 0x102510,
FT800_REG_TOUCH_TAG_XY = 0x102514,
FT800_REG_TOUCH_TAG = 0x102518,
FT800_REG_TOUCH_TRANSFORM_A = 0x10251C,
FT800_REG_TOUCH_TRANSFORM_B = 0x102520,
FT800_REG_TOUCH_TRANSFORM_C = 0x102524,
FT800_REG_TOUCH_TRANSFORM_D = 0x102528,
FT800_REG_TOUCH_TRANSFORM_E = 0x10252C,
FT800_REG_TOUCH_TRANSFORM_F = 0x102530,
FT800_REG_TOUCH_DIRECT_XY = 0x102574,
FT800_REG_TOUCH_DIRECT_Z1Z2 = 0x102578,
FT800_REG_TRACKER = 0x109000
};
/** FT810 register addresses */
enum ft810_register_address_t {
FT810_REG_TRIM = 0x10256C,
FT810_REG_ID = 0x302000,
FT810_REG_FRAMES = 0x302004,
FT810_REG_CLOCK = 0x302008,
FT810_REG_FREQUENCY = 0x30200C,
FT810_REG_RENDERMODE = 0x302010,
FT810_REG_SNAPY = 0x302014,
FT810_REG_SNAPSHOT = 0x302018,
FT810_REG_CPURESET = 0x302020,
FT810_REG_TAP_CRC = 0x302020,
FT810_REG_TAP_MASK = 0x302024,
FT810_REG_HCYCLE = 0x30202C,
FT810_REG_HOFFSET = 0x302030,
FT810_REG_HSIZE = 0x302034,
FT810_REG_HSYNC0 = 0x302038,
FT810_REG_HSYNC1 = 0x30203C,
FT810_REG_VCYCLE = 0x302040,
FT810_REG_VOFFSET = 0x302044,
FT810_REG_VSIZE = 0x302048,
FT810_REG_VSYNC0 = 0x30204C,
FT810_REG_VSYNC1 = 0x302050,
FT810_REG_DLSWAP = 0x302054,
FT810_REG_ROTATE = 0x302058,
FT810_REG_OUTBITS = 0x30205C,
FT810_REG_DITHER = 0x302060,
FT810_REG_SWIZZLE = 0x302064,
FT810_REG_CSPREAD = 0x302068,
FT810_REG_PCLK_POL = 0x30206C,
FT810_REG_PCLK = 0x302070,
FT810_REG_TAG_X = 0x302074,
FT810_REG_TAG_Y = 0x302078,
FT810_REG_TAG = 0x30207C,
FT810_REG_VOL_PB = 0x302080,
FT810_REG_VOL_SOUND = 0x302084,
FT810_REG_SOUND = 0x302088,
FT810_REG_PLAY = 0x30208C,
FT810_REG_GPIO_DIR = 0x302090,
FT810_REG_GPIO = 0x302094,
FT810_REG_GPIOX_DIR = 0x302098,
FT810_REG_GPIOX = 0x30209C,
FT810_REG_INT_FLAGS = 0x3020A8,
FT810_REG_INT_EN = 0x3020AC,
FT810_REG_INT_MASK = 0x3020B0,
FT810_REG_PLAYBACK_START = 0x3020B4,
FT810_REG_PLAYBACK_LENGTH = 0x3020B8,
FT810_REG_PLAYBACK_READPTR = 0x3020BC,
FT810_REG_PLAYBACK_FREQ = 0x3020C0,
FT810_REG_PLAYBACK_FORMAT = 0x3020C4,
FT810_REG_PLAYBACK_LOOP = 0x3020C8,
FT810_REG_PLAYBACK_PLAY = 0x3020CC,
FT810_REG_PWM_HZ = 0x3020D0,
FT810_REG_PWM_DUTY = 0x3020D4,
FT810_REG_CMD_READ = 0x3020F8,
FT810_REG_CMD_WRITE = 0x3020FC,
FT810_REG_CMD_DL = 0x302100,
FT810_REG_TOUCH_MODE = 0x302104,
FT810_REG_TOUCH_ADC_MODE = 0x302108,
FT810_REG_TOUCH_CHARGE = 0x30210C,
FT810_REG_TOUCH_SETTLE = 0x302110,
FT810_REG_TOUCH_OVERSAMPLE = 0x302114,
FT810_REG_TOUCH_RZTHRESH = 0x302118,
FT810_REG_TOUCH_RAW_XY = 0x30211C,
FT810_REG_TOUCH_RZ = 0x302120,
FT810_REG_TOUCH_SCREEN_XY = 0x302124,
FT810_REG_TOUCH_TAG_XY = 0x302128,
FT810_REG_TOUCH_TAG = 0x30212C,
FT810_REG_TOUCH_TRANSFORM_A = 0x302150,
FT810_REG_TOUCH_TRANSFORM_B = 0x302154,
FT810_REG_TOUCH_TRANSFORM_C = 0x302158,
FT810_REG_TOUCH_TRANSFORM_D = 0x30215C,
FT810_REG_TOUCH_TRANSFORM_E = 0x302160,
FT810_REG_TOUCH_TRANSFORM_F = 0x302164,
FT810_REG_TOUCH_CONFIG = 0x302168,
FT810_REG_SPI_WIDTH = 0x302180,
FT810_REG_TOUCH_DIRECT_XY = 0x30218C,
FT810_REG_TOUCH_DIRECT_Z1Z2 = 0x302190,
FT810_REG_CMDB_SPACE = 0x302574,
FT810_REG_CMDB_WRITE = 0x302578,
FT810_REG_TRACKER = 0x309000,
FT810_REG_TRACKER1 = 0x309004,
FT810_REG_TRACKER2 = 0x309008,
FT810_REG_TRACKER3 = 0x30900C,
FT810_REG_TRACKER4 = 0x309010,
FT810_REG_MEDIAFIFO_READ = 0x309014,
FT810_REG_MEDIAFIFO_WRITE = 0x309018,
};
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* ZEPHYR_DRIVERS_MISC_FT8XX_FT8XX_MEMORY_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/misc/ft8xx/ft8xx_memory.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,718 |
```objective-c
/*
*
*/
/**
* @file
* @brief FT8XX public API
*/
#ifndef ZEPHYR_DRIVERS_MISC_FT8XX_FT8XX_H_
#define ZEPHYR_DRIVERS_MISC_FT8XX_FT8XX_H_
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief FT8xx driver public APIs
* @defgroup ft8xx_interface FT8xx driver APIs
* @ingroup misc_interfaces
* @{
*/
/**
* @struct ft8xx_touch_transform
* @brief Structure holding touchscreen calibration data
*
* The content of this structure is filled by ft8xx_calibrate().
*/
struct ft8xx_touch_transform {
uint32_t a;
uint32_t b;
uint32_t c;
uint32_t d;
uint32_t e;
uint32_t f;
};
/**
* @typedef ft8xx_int_callback
* @brief Callback API to inform API user that FT8xx triggered interrupt
*
* This callback is called from IRQ context.
*/
typedef void (*ft8xx_int_callback)(void);
/**
* @brief Calibrate touchscreen
*
* Run touchscreen calibration procedure that collects three touches from touch
* screen. Computed calibration result is automatically applied to the
* touchscreen processing and returned with @p data.
*
* The content of @p data may be stored and used after reset in
* ft8xx_touch_transform_set() to avoid calibrating touchscreen after each
* device reset.
*
* @param data Pointer to touchscreen transform structure to populate
*/
void ft8xx_calibrate(struct ft8xx_touch_transform *data);
/**
* @brief Set touchscreen calibration data
*
* Apply given touchscreen transform data to the touchscreen processing.
* Data is to be obtained from calibration procedure started with
* ft8xx_calibrate().
*
* @param data Pointer to touchscreen transform structure to apply
*/
void ft8xx_touch_transform_set(const struct ft8xx_touch_transform *data);
/**
* @brief Get tag of recently touched element
*
* @return Tag value 0-255 of recently touched element
*/
int ft8xx_get_touch_tag(void);
/**
* @brief Set callback executed when FT8xx triggers interrupt
*
* This function configures FT8xx to trigger interrupt when touch event changes
* tag value.
*
* When touch event changes tag value, FT8xx activates INT line. The line is
* kept active until ft8xx_get_touch_tag() is called. It results in single
* execution of @p callback until ft8xx_get_touch_tag() is called.
*
* @param callback Pointer to function called when FT8xx triggers interrupt
*/
void ft8xx_register_int(ft8xx_int_callback callback);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* ZEPHYR_DRIVERS_MISC_FT8XX_FT8XX_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/misc/ft8xx/ft8xx.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 591 |
```objective-c
/* grove_lcd.h - Public API for the Grove RGB LCD device */
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DISPLAY_GROVE_LCD_H_
#define ZEPHYR_INCLUDE_DISPLAY_GROVE_LCD_H_
#include <stdint.h>
#include <zephyr/device.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Grove display APIs
* @defgroup grove_display Grove display APIs
* @ingroup third_party
* @{
*/
/**
* @brief Send text to the screen
*
* @param dev Pointer to device structure for driver instance.
* @param data the ASCII text to display
* @param size the length of the text in bytes
*/
void glcd_print(const struct device *dev, char *data, uint32_t size);
/**
* @brief Set text cursor position for next additions
*
* @param dev Pointer to device structure for driver instance.
* @param col the column for the cursor to be moved to (0-15)
* @param row the row it should be moved to (0 or 1)
*/
void glcd_cursor_pos_set(const struct device *dev, uint8_t col, uint8_t row);
/**
* @brief Clear the current display
*
* @param dev Pointer to device structure for driver instance.
*/
void glcd_clear(const struct device *dev);
/* Defines for the GLCD_CMD_DISPLAY_SWITCH options */
#define GLCD_DS_DISPLAY_ON (1 << 2)
#define GLCD_DS_DISPLAY_OFF (0 << 2)
#define GLCD_DS_CURSOR_ON (1 << 1)
#define GLCD_DS_CURSOR_OFF (0 << 1)
#define GLCD_DS_BLINK_ON (1 << 0)
#define GLCD_DS_BLINK_OFF (0 << 0)
/**
* @brief Function to change the display state.
* @details This function provides the user the ability to change the state
* of the display as per needed. Controlling things like powering on or off
* the screen, the option to display the cursor or not, and the ability to
* blink the cursor.
*
* @param dev Pointer to device structure for driver instance.
* @param opt An 8bit bitmask of GLCD_DS_* options.
*
*/
void glcd_display_state_set(const struct device *dev, uint8_t opt);
/**
* @brief return the display feature set associated with the device
*
* @param dev the Grove LCD to get the display features set
*
* @return the display feature set associated with the device.
*/
uint8_t glcd_display_state_get(const struct device *dev);
/* Defines for the GLCD_CMD_INPUT_SET to change text direction */
#define GLCD_IS_SHIFT_INCREMENT (1 << 1)
#define GLCD_IS_SHIFT_DECREMENT (0 << 1)
#define GLCD_IS_ENTRY_LEFT (1 << 0)
#define GLCD_IS_ENTRY_RIGHT (0 << 0)
/**
* @brief Function to change the input state.
* @details This function provides the user the ability to change the state
* of the text input. Controlling things like text entry from the left or
* right side, and how far to increment on new text
*
* @param dev Pointer to device structure for driver instance.
* @param opt A bitmask of GLCD_IS_* options
*
*/
void glcd_input_state_set(const struct device *dev, uint8_t opt);
/**
* @brief return the input set associated with the device
*
* @param dev the Grove LCD to get the input features set
*
* @return the input set associated with the device.
*/
uint8_t glcd_input_state_get(const struct device *dev);
/* Defines for the LCD_FUNCTION_SET */
#define GLCD_FS_8BIT_MODE (1 << 4)
#define GLCD_FS_ROWS_2 (1 << 3)
#define GLCD_FS_ROWS_1 (0 << 3)
#define GLCD_FS_DOT_SIZE_BIG (1 << 2)
#define GLCD_FS_DOT_SIZE_LITTLE (0 << 2)
/* Bits 0, 1 are not defined for this register */
/**
* @brief Function to set the functional state of the display.
* @param dev Pointer to device structure for driver instance.
* @param opt A bitmask of GLCD_FS_* options
*
* @details This function provides the user the ability to change the state
* of the display as per needed. Controlling things like the number of rows,
* dot size, and text display quality.
*/
void glcd_function_set(const struct device *dev, uint8_t opt);
/**
* @brief return the function set associated with the device
*
* @param dev the Grove LCD to get the functions set
*
* @return the function features set associated with the device.
*/
uint8_t glcd_function_get(const struct device *dev);
/* Available color selections */
#define GROVE_RGB_WHITE 0
#define GROVE_RGB_RED 1
#define GROVE_RGB_GREEN 2
#define GROVE_RGB_BLUE 3
/**
* @brief Set LCD background to a predefined color
* @param dev Pointer to device structure for driver instance.
* @param color One of the predefined color options
*/
void glcd_color_select(const struct device *dev, uint8_t color);
/**
* @brief Set LCD background to custom RGB color value
*
* @param dev Pointer to device structure for driver instance.
* @param r A numeric value for the red color (max is 255)
* @param g A numeric value for the green color (max is 255)
* @param b A numeric value for the blue color (max is 255)
*/
void glcd_color_set(const struct device *dev, uint8_t r, uint8_t g,
uint8_t b);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* ZEPHYR_INCLUDE_DISPLAY_GROVE_LCD_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/misc/grove_lcd/grove_lcd.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,283 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_DRIVERS_MISC_NXP_FLEXIO_NXP_FLEXIO_H_
#define ZEPHYR_DRIVERS_MISC_NXP_FLEXIO_NXP_FLEXIO_H_
#include <zephyr/device.h>
/**
* @struct nxp_flexio_child_res
* @brief Structure containing information about the required
* resources for a FlexIO child.
*/
struct nxp_flexio_child_res {
uint8_t *shifter_index;
uint8_t shifter_count;
uint8_t *timer_index;
uint8_t timer_count;
};
/**
* @typedef nxp_flexio_child_isr_t
* @brief Callback API to inform API user that FlexIO triggered interrupt
*
* This callback is called from IRQ context.
*/
typedef int (*nxp_flexio_child_isr_t)(void *user_data);
/**
* @struct nxp_flexio_child
* @brief Structure containing the required child data for FlexIO
*/
struct nxp_flexio_child {
nxp_flexio_child_isr_t isr;
void *user_data;
struct nxp_flexio_child_res res;
};
/**
* @brief Enable FlexIO IRQ
* @param dev Pointer to the device structure for the FlexIO driver instance
*/
void nxp_flexio_irq_enable(const struct device *dev);
/**
* @brief Disable FlexIO IRQ
* @param dev Pointer to the device structure for the FlexIO driver instance
*/
void nxp_flexio_irq_disable(const struct device *dev);
/**
* @brief Lock FlexIO mutex.
* @param dev Pointer to the device structure for the FlexIO driver instance
*/
void nxp_flexio_lock(const struct device *dev);
/**
* @brief Unlock FlexIO mutex.
* @param dev Pointer to the device structure for the FlexIO driver instance
*/
void nxp_flexio_unlock(const struct device *dev);
/**
* @brief Obtain the clock rate of sub-system used by the FlexIO
* @param dev Pointer to the device structure for the FlexIO driver instance
* @param[out] rate Subsystem clock rate
* @retval 0 on successful rate reading.
* @retval -EAGAIN if rate cannot be read. Some drivers do not support returning the rate when the
* clock is off.
* @retval -ENOTSUP if reading the clock rate is not supported for the given sub-system.
* @retval -ENOSYS if the interface is not implemented.
*/
int nxp_flexio_get_rate(const struct device *dev, uint32_t *rate);
/**
* @brief Attach flexio child to flexio controller
* @param dev Pointer to the device structure for the FlexIO driver instance
* @param child Pointer to flexio child
* @retval 0 if successful
* @retval -ENOBUFS if there are not enough available resources
*/
int nxp_flexio_child_attach(const struct device *dev,
const struct nxp_flexio_child *child);
#endif /* ZEPHYR_DRIVERS_MISC_NXP_FLEXIO_NXP_FLEXIO_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/misc/nxp_flexio/nxp_flexio.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 643 |
```objective-c
/*
*
*/
/**
* @file
* @brief Public APIs for STM32 PWR wake-up pins configuration
*/
#ifndef ZEPHYR_DRIVERS_MISC_STM32_WKUP_PINS_H_
#define ZEPHYR_DRIVERS_MISC_STM32_WKUP_PINS_H_
#include <zephyr/drivers/gpio.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Configure a GPIO pin as a source for STM32 PWR wake-up pins
*
* @param gpio Container for GPIO pin information specified in devicetree
*
* @return 0 on success, -EINVAL on invalid values
*/
int stm32_pwr_wkup_pin_cfg_gpio(const struct gpio_dt_spec *gpio);
/**
* @brief Enable or Disable pull-up and pull-down configuration for
* GPIO Ports that are associated with STM32 PWR wake-up pins
*/
void stm32_pwr_wkup_pin_cfg_pupd(void);
#ifdef __cplusplus
}
#endif
#endif /* ZEPHYR_DRIVERS_MISC_STM32_WKUP_PINS_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/misc/stm32_wkup_pins/stm32_wkup_pins.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 223 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_DRIVERS_MISC_PIO_PICO_RPI_PIO_PICO_RPI_H_
#define ZEPHYR_DRIVERS_MISC_PIO_PICO_RPI_PIO_PICO_RPI_H_
#include <zephyr/devicetree/gpio.h>
#include <hardware/pio.h>
/**
* @brief Utility macro to define a PIO program. The program is a list
* of 16 bit instructions, generated by the pioasm tool.
*
* @param name Name of the program.
* @param wrap_target Wrap target as specified by the PIO program.
* @param wrap Wrap source as specified by the PIO program.
* @param ... Comma separated list of PIO instructions.
*/
#define RPI_PICO_PIO_DEFINE_PROGRAM(name, wrap_target, wrap, ...) \
static const uint32_t name ## _wrap_target = wrap_target; \
static const uint32_t name ## _wrap = wrap; \
static const uint16_t name ## _program_instructions[] = { \
__VA_ARGS__ \
}; \
static const struct pio_program name ## _program = { \
.instructions = name ## _program_instructions, \
.length = ARRAY_SIZE(name ## _program_instructions), \
.origin = -1, \
}
/**
* @brief Utility macro to get the wrap target of a program.
*
* @param name Name of the program.
*/
#define RPI_PICO_PIO_GET_WRAP_TARGET(name) name ## _wrap_target
/**
* @brief Utility macro to get the wrap source of a program.
*
* @param name Name of the program.
*/
#define RPI_PICO_PIO_GET_WRAP(name) name ## _wrap
/**
* @brief Utility macro to get a pointer to a PIO program.
*
* @param name Name of the program.
*/
#define RPI_PICO_PIO_GET_PROGRAM(name) &name ## _program
/**
* @brief Get a pin number from a pinctrl / group name and index
*
* Example devicetree fragment(s):
*
* @code{.dts}
* pinctrl {
* pio_child_default: pio_child_default {
* tx_gpio {
* pinmux = <PIO0_P0>, <PIO0_P2>;
* };
*
* rx_gpio {
* pinmux = <PIO0_P1>;
* input-enable;
* };
* };
* };
* @endcode
*
* @code{.dts}
* pio {
* status = "okay";
* c: child {
* pinctrl-0 = <&pio_child_default>;
* pinctrl-names = "default";
* };
* };
* @endcode
*
* Example usage:
*
* @code{.c}
* DT_RPI_PICO_PIO_PIN_BY_NAME(node, default, 0, tx_gpio, 0) // 0
* DT_RPI_PICO_PIO_PIN_BY_NAME(node, default, 0, tx_gpio, 1) // 2
* DT_RPI_PICO_PIO_PIN_BY_NAME(node, default, 0, rx_gpio, 0) // 1
* @endcode
*
* @param node_id node identifier
* @param p_name pinctrl name
* @param p_idx pinctrl index
* @param g_name group name
* @param g_idx group index
* @return pin number
*/
#define DT_RPI_PICO_PIO_PIN_BY_NAME(node_id, p_name, p_idx, g_name, g_idx) \
RP2_GET_PIN_NUM(DT_PROP_BY_IDX( \
DT_CHILD(DT_PINCTRL_BY_NAME(node_id, p_name, p_idx), g_name), pinmux, g_idx))
/**
* @brief Get a pin number from a pinctrl / group name and index
*
* @param inst instance number
* @param p_name pinctrl name
* @param p_idx pinctrl index
* @param g_name group name
* @param g_idx group index
* @return pin number
*
* @see DT_RPI_PICO_PIO_PIN_BY_NAME
*/
#define DT_INST_RPI_PICO_PIO_PIN_BY_NAME(inst, p_name, p_idx, g_name, g_idx) \
DT_RPI_PICO_PIO_PIN_BY_NAME(DT_DRV_INST(inst), p_name, p_idx, g_name, g_idx)
/**
* @brief Get the pin number of a pin by its name.
*
* @param inst instance number
* @param name name of the pin (e.g. tx, rx, sck).
*/
#define DT_INST_PIO_PIN_BY_NAME(inst, name) \
DT_PIO_PIN_BY_NAME(DT_DRV_INST(inst), name)
/**
* Get PIO object
*
* @param dev Pointer to device structure for rpi_pio device instance
* @return PIO object
*/
PIO pio_rpi_pico_get_pio(const struct device *dev);
/**
* Allocate a state machine.
*
* @param dev Pointer to device structure for rpi_pio device instance
* @param sm Pointer to store allocated state machine
* @retval 0 on success
* @retval -EBUSY if no state machines were available
*/
int pio_rpi_pico_allocate_sm(const struct device *dev, size_t *sm);
#endif /* ZEPHYR_DRIVERS_MISC_PIO_PICO_RPI_PIO_PICO_RPI_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/misc/pio_rpi_pico/pio_rpi_pico.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,185 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_SMARTBOND_CLOCK_CONTROL_H_
#define ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_SMARTBOND_CLOCK_CONTROL_H_
#include <zephyr/device.h>
#include <zephyr/drivers/clock_control.h>
#ifdef __cplusplus
extern "C" {
#endif
/** @brief Smartbond clocks
*
* Enum oscillators and clocks.
*/
enum smartbond_clock {
/* Not a clock, used for error case only */
SMARTBOND_CLK_NONE,
SMARTBOND_CLK_RC32K,
SMARTBOND_CLK_RCX,
SMARTBOND_CLK_XTAL32K,
SMARTBOND_CLK_RC32M,
SMARTBOND_CLK_XTAL32M,
SMARTBOND_CLK_PLL96M,
SMARTBOND_CLK_USB,
SMARTBOND_CLK_DIVN_32M,
SMARTBOND_CLK_HCLK,
SMARTBOND_CLK_LP_CLK,
SMARTBOND_CLK_SYS_CLK,
};
/** @brief Selects system clock
*
* @param sys_clk system clock to switch to.
*
* @return 0 on success
*/
int z_smartbond_select_sys_clk(enum smartbond_clock sys_clk);
/** @brief Selects low power clock
*
* @param lp_clk low power clock to switch to.
*
* @return 0 on success
*/
int z_smartbond_select_lp_clk(enum smartbond_clock lp_clk);
#ifdef __cplusplus
}
#endif
#endif /* ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_SMARTBOND_CLOCK_CONTROL_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/clock_control/smartbond_clock_control.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 339 |
```objective-c
/*
*
*/
/**
* @file
* @brief Public APIs for Time-aware GPIO drivers
*/
#ifndef ZEPHYR_DRIVERS_MISC_TIMEAWARE_GPIO_TIMEAWARE_GPIO
#define ZEPHYR_DRIVERS_MISC_TIMEAWARE_GPIO_TIMEAWARE_GPIO
/**
* @brief Time-aware GPIO Interface
* @defgroup tgpio_interface Time-aware GPIO Interface
* @since 3.5
* @version 0.1.0
* @ingroup io_interfaces
* @{
*/
#include <zephyr/sys/__assert.h>
#include <zephyr/sys/slist.h>
#include <zephyr/types.h>
#include <stddef.h>
#include <zephyr/device.h>
#include <zephyr/internal/syscall_handler.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Event polarity
*/
enum tgpio_pin_polarity {
TGPIO_RISING_EDGE = 0,
TGPIO_FALLING_EDGE,
TGPIO_TOGGLE_EDGE,
};
/**
* @cond INTERNAL_HIDDEN
*
* TGPIO driver API definition and system call entry points
*
* (Internal use only.)
*/
__subsystem struct tgpio_driver_api {
int (*pin_disable)(const struct device *dev, uint32_t pin);
int (*get_time)(const struct device *dev, uint64_t *current_time);
int (*cyc_per_sec)(const struct device *dev, uint32_t *cycles);
int (*set_perout)(const struct device *dev, uint32_t pin, uint64_t start_time,
uint64_t repeat_interval, bool periodic_enable);
int (*config_ext_ts)(const struct device *dev, uint32_t pin, uint32_t event_polarity);
int (*read_ts_ec)(const struct device *dev, uint32_t pin, uint64_t *timestamp,
uint64_t *event_count);
};
/**
* @endcond
*/
/**
* @brief Get time from ART timer
*
* @param dev TGPIO device
* @param current_time Pointer to store timer value in cycles
*
* @return 0 if successful
* @return negative errno code on failure.
*/
__syscall int tgpio_port_get_time(const struct device *dev, uint64_t *current_time);
static inline int z_impl_tgpio_port_get_time(const struct device *dev, uint64_t *current_time)
{
const struct tgpio_driver_api *api = (const struct tgpio_driver_api *)dev->api;
return api->get_time(dev, current_time);
}
/**
* @brief Get current running rate
*
* @param dev TGPIO device
* @param cycles pointer to store current running frequency
*
* @return 0 if successful, negative errno code on failure.
*/
__syscall int tgpio_port_get_cycles_per_second(const struct device *dev, uint32_t *cycles);
static inline int z_impl_tgpio_port_get_cycles_per_second(const struct device *dev,
uint32_t *cycles)
{
const struct tgpio_driver_api *api = (const struct tgpio_driver_api *)dev->api;
return api->cyc_per_sec(dev, cycles);
}
/**
* @brief Disable operation on pin
*
* @param dev TGPIO device
* @param pin TGPIO pin
*
* @return 0 if successful, negative errno code on failure.
*/
__syscall int tgpio_pin_disable(const struct device *dev, uint32_t pin);
static inline int z_impl_tgpio_pin_disable(const struct device *dev, uint32_t pin)
{
const struct tgpio_driver_api *api = (const struct tgpio_driver_api *)dev->api;
return api->pin_disable(dev, pin);
}
/**
* @brief Enable/Continue operation on pin
*
* @param dev TGPIO device
* @param pin TGPIO pin
* @param event_polarity TGPIO pin event polarity
*
* @return 0 if successful, negative errno code on failure.
*/
__syscall int tgpio_pin_config_ext_timestamp(const struct device *dev, uint32_t pin,
uint32_t event_polarity);
static inline int z_impl_tgpio_pin_config_ext_timestamp(const struct device *dev, uint32_t pin,
uint32_t event_polarity)
{
const struct tgpio_driver_api *api = (const struct tgpio_driver_api *)dev->api;
return api->config_ext_ts(dev, pin, event_polarity);
}
/**
* @brief Enable periodic pulse generation on a pin
*
* @param dev TGPIO device
* @param pin TGPIO pin
* @param start_time start_time of first pulse in hw cycles
* @param repeat_interval repeat interval between two pulses in hw cycles
* @param periodic_enable enables periodic mode if 'true' is passed.
*
* @return 0 if successful, negative errno code on failure.
*/
__syscall int tgpio_pin_periodic_output(const struct device *dev, uint32_t pin,
uint64_t start_time, uint64_t repeat_interval,
bool periodic_enable);
static inline int z_impl_tgpio_pin_periodic_output(const struct device *dev, uint32_t pin,
uint64_t start_time, uint64_t repeat_interval,
bool periodic_enable)
{
const struct tgpio_driver_api *api = (const struct tgpio_driver_api *)dev->api;
return api->set_perout(dev, pin, start_time, repeat_interval, periodic_enable);
}
/**
* @brief Read timestamp and event counter from TGPIO
*
* @param dev TGPIO device
* @param pin TGPIO pin
* @param timestamp timestamp of the last pulse received
* @param event_count number of pulses received since the pin is enabled
*
* @return 0 if successful, negative errno code on failure.
*/
__syscall int tgpio_pin_read_ts_ec(const struct device *dev, uint32_t pin, uint64_t *timestamp,
uint64_t *event_count);
static inline int z_impl_tgpio_pin_read_ts_ec(const struct device *dev, uint32_t pin,
uint64_t *timestamp, uint64_t *event_count)
{
const struct tgpio_driver_api *api = (const struct tgpio_driver_api *)dev->api;
return api->read_ts_ec(dev, pin, timestamp, event_count);
}
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#include <zephyr/syscalls/timeaware_gpio.h>
#endif /* ZEPHYR_DRIVERS_MISC_TIMEAWARE_GPIO_TIMEAWARE_GPIO */
``` | /content/code_sandbox/include/zephyr/drivers/misc/timeaware_gpio/timeaware_gpio.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,335 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_GD32_H_
#define ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_GD32_H_
#include <zephyr/device.h>
/**
* @brief Obtain a reference to the GD32 clock controller.
*
* There is a single clock controller in the GD32: cctl. The device can be
* used without checking for it to be ready since it has no initialization
* code subject to failures.
*/
#define GD32_CLOCK_CONTROLLER DEVICE_DT_GET(DT_NODELABEL(cctl))
#endif /* ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_GD32_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/clock_control/gd32.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 131 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_ARM_CLOCK_CONTROL_H_
#define ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_ARM_CLOCK_CONTROL_H_
#include <zephyr/drivers/clock_control.h>
/**
* @file
*
* @brief Clock subsystem IDs for ARM family SoCs
*/
/* CMSDK BUS Mapping */
enum arm_bus_type_t {
CMSDK_AHB = 0,
CMSDK_APB,
};
/* CPU States */
enum arm_soc_state_t {
SOC_ACTIVE = 0,
SOC_SLEEP,
SOC_DEEPSLEEP,
};
struct arm_clock_control_t {
/* ARM family SoCs supported Bus types */
enum arm_bus_type_t bus;
/* Clock can be configured for 3 states: Active, Sleep, Deep Sleep */
enum arm_soc_state_t state;
/* Identifies the device on the bus */
uint32_t device;
};
#endif /* ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_ARM_CLOCK_CONTROL_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/clock_control/arm_clock_control.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 199 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_MCHP_XEC_H_
#define ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_MCHP_XEC_H_
#include <zephyr/drivers/clock_control.h>
#include <zephyr/dt-bindings/clock/mchp_xec_pcr.h>
/*
* Set/clear Microchip XEC peripheral sleep enable.
* SoC layer contains the chip specific sleep index and positions
*/
int z_mchp_xec_pcr_periph_sleep(uint8_t slp_idx, uint8_t slp_pos,
uint8_t slp_en);
int z_mchp_xec_pcr_periph_reset(uint8_t slp_idx, uint8_t slp_pos);
#if defined(CONFIG_PM)
void mchp_xec_clk_ctrl_sys_sleep_enable(bool is_deep);
void mchp_xec_clk_ctrl_sys_sleep_disable(void);
#endif
#endif /* ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_LPC11U6X_CLOCK_CONTROL_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/clock_control/mchp_xec_clock_control.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 213 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_RCAR_CLOCK_CONTROL_H_
#define ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_RCAR_CLOCK_CONTROL_H_
#include <zephyr/drivers/clock_control.h>
#include <zephyr/dt-bindings/clock/renesas_cpg_mssr.h>
struct rcar_cpg_clk {
uint32_t domain;
uint32_t module;
uint32_t rate;
};
#endif /* ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_RCAR_CLOCK_CONTROL_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/clock_control/renesas_cpg_mssr.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 110 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_NRF_CLOCK_CONTROL_H_
#define ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_NRF_CLOCK_CONTROL_H_
#include <zephyr/device.h>
#include <hal/nrf_clock.h>
#include <zephyr/sys/onoff.h>
#include <zephyr/drivers/clock_control.h>
#ifdef __cplusplus
extern "C" {
#endif
/** @brief Clocks handled by the CLOCK peripheral.
*
* Enum shall be used as a sys argument in clock_control API.
*/
enum clock_control_nrf_type {
CLOCK_CONTROL_NRF_TYPE_HFCLK,
CLOCK_CONTROL_NRF_TYPE_LFCLK,
#if NRF_CLOCK_HAS_HFCLK192M
CLOCK_CONTROL_NRF_TYPE_HFCLK192M,
#endif
#if NRF_CLOCK_HAS_HFCLKAUDIO
CLOCK_CONTROL_NRF_TYPE_HFCLKAUDIO,
#endif
CLOCK_CONTROL_NRF_TYPE_COUNT
};
/* Define can be used with clock control API instead of enum directly to
* increase code readability.
*/
#define CLOCK_CONTROL_NRF_SUBSYS_HF \
((clock_control_subsys_t)CLOCK_CONTROL_NRF_TYPE_HFCLK)
#define CLOCK_CONTROL_NRF_SUBSYS_LF \
((clock_control_subsys_t)CLOCK_CONTROL_NRF_TYPE_LFCLK)
#define CLOCK_CONTROL_NRF_SUBSYS_HF192M \
((clock_control_subsys_t)CLOCK_CONTROL_NRF_TYPE_HFCLK192M)
#define CLOCK_CONTROL_NRF_SUBSYS_HFAUDIO \
((clock_control_subsys_t)CLOCK_CONTROL_NRF_TYPE_HFCLKAUDIO)
/** @brief LF clock start modes. */
enum nrf_lfclk_start_mode {
CLOCK_CONTROL_NRF_LF_START_NOWAIT,
CLOCK_CONTROL_NRF_LF_START_AVAILABLE,
CLOCK_CONTROL_NRF_LF_START_STABLE,
};
/* Define 32KHz clock source */
#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC
#define CLOCK_CONTROL_NRF_K32SRC NRF_CLOCK_LFCLK_RC
#endif
#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_XTAL
#define CLOCK_CONTROL_NRF_K32SRC NRF_CLOCK_LFCLK_XTAL
#endif
#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_SYNTH
#define CLOCK_CONTROL_NRF_K32SRC NRF_CLOCK_LFCLK_SYNTH
#endif
#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_EXT_LOW_SWING
#define CLOCK_CONTROL_NRF_K32SRC NRF_CLOCK_LFCLK_XTAL_LOW_SWING
#endif
#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_EXT_FULL_SWING
#define CLOCK_CONTROL_NRF_K32SRC NRF_CLOCK_LFCLK_XTAL_FULL_SWING
#endif
/* Define 32KHz clock accuracy */
#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_500PPM
#define CLOCK_CONTROL_NRF_K32SRC_ACCURACY 0
#endif
#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_250PPM
#define CLOCK_CONTROL_NRF_K32SRC_ACCURACY 1
#endif
#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_150PPM
#define CLOCK_CONTROL_NRF_K32SRC_ACCURACY 2
#endif
#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_100PPM
#define CLOCK_CONTROL_NRF_K32SRC_ACCURACY 3
#endif
#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_75PPM
#define CLOCK_CONTROL_NRF_K32SRC_ACCURACY 4
#endif
#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_50PPM
#define CLOCK_CONTROL_NRF_K32SRC_ACCURACY 5
#endif
#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_30PPM
#define CLOCK_CONTROL_NRF_K32SRC_ACCURACY 6
#endif
#ifdef CONFIG_CLOCK_CONTROL_NRF_K32SRC_20PPM
#define CLOCK_CONTROL_NRF_K32SRC_ACCURACY 7
#endif
/** @brief Force LF clock calibration. */
void z_nrf_clock_calibration_force_start(void);
/** @brief Return number of calibrations performed.
*
* Valid when @kconfig{CONFIG_CLOCK_CONTROL_NRF_CALIBRATION_DEBUG} is set.
*
* @return Number of calibrations or -1 if feature is disabled.
*/
int z_nrf_clock_calibration_count(void);
/** @brief Return number of attempts when calibration was skipped.
*
* Valid when @kconfig{CONFIG_CLOCK_CONTROL_NRF_CALIBRATION_DEBUG} is set.
*
* @return Number of calibrations or -1 if feature is disabled.
*/
int z_nrf_clock_calibration_skips_count(void);
/** @brief Get onoff service for given clock subsystem.
*
* @param sys Subsystem.
*
* @return Service handler or NULL.
*/
struct onoff_manager *z_nrf_clock_control_get_onoff(clock_control_subsys_t sys);
/** @brief Permanently enable low frequency clock.
*
* Low frequency clock is usually enabled during application lifetime because
* of long startup time and low power consumption. Multiple modules can request
* it but never release.
*
* @param start_mode Specify if function should block until clock is available.
*/
void z_nrf_clock_control_lf_on(enum nrf_lfclk_start_mode start_mode);
/** @brief Request high frequency clock from Bluetooth Controller.
*
* Function is optimized for Bluetooth Controller which turns HF clock before
* each radio activity and has hard timing requirements but does not require
* any confirmation when clock is ready because it assumes that request is
* performed long enough before radio activity. Clock is released immediately
* after radio activity.
*
* Function does not perform any validation. It is the caller responsibility to
* ensure that every z_nrf_clock_bt_ctlr_hf_request matches
* z_nrf_clock_bt_ctlr_hf_release call.
*/
void z_nrf_clock_bt_ctlr_hf_request(void);
/** @brief Release high frequency clock from Bluetooth Controller.
*
* See z_nrf_clock_bt_ctlr_hf_request for details.
*/
void z_nrf_clock_bt_ctlr_hf_release(void);
#ifdef __cplusplus
}
#endif
#endif /* ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_NRF_CLOCK_CONTROL_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/clock_control/nrf_clock_control.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,271 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_RENESAS_RA_CGC_H_
#define ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_RENESAS_RA_CGC_H_
#include <zephyr/drivers/clock_control.h>
#include <zephyr/dt-bindings/clock/ra_clock.h>
struct clock_control_ra_pclk_cfg {
uint32_t clk_src;
uint32_t clk_div;
};
struct clock_control_ra_subsys_cfg {
volatile uint32_t *mstp;
uint32_t stop_bit;
};
#endif /* ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_RENESAS_RA_CGC_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/clock_control/renesas_ra_cgc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 131 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_ATMEL_SAM_PMC_H_
#define ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_ATMEL_SAM_PMC_H_
#include <zephyr/drivers/clock_control.h>
#include <zephyr/dt-bindings/clock/atmel_sam_pmc.h>
#define SAM_DT_PMC_CONTROLLER DEVICE_DT_GET(DT_NODELABEL(pmc))
struct atmel_sam_pmc_config {
uint32_t clock_type;
uint32_t peripheral_id;
};
#define SAM_DT_CLOCK_PMC_CFG(clock_id, node_id) \
{ \
.clock_type = DT_CLOCKS_CELL_BY_IDX(node_id, clock_id, clock_type), \
.peripheral_id = DT_CLOCKS_CELL_BY_IDX(node_id, clock_id, peripheral_id)\
}
#define SAM_DT_INST_CLOCK_PMC_CFG(inst) SAM_DT_CLOCK_PMC_CFG(0, DT_DRV_INST(inst))
#define SAM_DT_CLOCKS_PMC_CFG(node_id) \
{ \
LISTIFY(DT_NUM_CLOCKS(node_id), \
SAM_DT_CLOCK_PMC_CFG, (,), node_id) \
}
#define SAM_DT_INST_CLOCKS_PMC_CFG(inst) \
SAM_DT_CLOCKS_PMC_CFG(DT_DRV_INST(inst))
#endif /* ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_ATMEL_SAM_PMC_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/clock_control/atmel_sam_pmc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 300 |
```objective-c
/*
*
*/
/**
* @file
* @brief LiteX Clock Control driver interface
*/
#ifndef CLK_CTRL_LITEX_H
#define CLK_CTRL_LITEX_H
/**
* @brief LiteX Clock Control driver interface
* @defgroup clock_control_litex_interface LiteX Clock Control driver interface
* @brief LiteX Clock Control driver interface
* @ingroup clock_control_interface
* @{
*/
#include <zephyr/types.h>
#define MMCM DT_NODELABEL(clock0)
#define NCLKOUT DT_PROP_LEN(MMCM, clock_output_names)
/**
* @brief Structure for interfacing with clock control API
*
* @param clkout_nr Number of clock output to be changed
* @param rate Frequency to set given in Hz
* @param phase Phase offset in degrees
* @param duty Duty cycle of clock signal in percent
*
*/
struct litex_clk_setup {
uint8_t clkout_nr;
uint32_t rate;
uint16_t phase;
uint8_t duty;
};
/**
* @}
*/
#endif /* CLK_CTRL_LITEX_H */
``` | /content/code_sandbox/include/zephyr/drivers/clock_control/clock_control_litex.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 223 |
```objective-c
/*
*
*/
#ifndef CLOCKMANAGER_H
#define CLOCKMANAGER_H
#include <socfpga_handoff.h>
/* Clock Manager Registers */
#define CLKMGR_OFFSET 0xffd10000
#define CLKMGR_CTRL 0x0
#define CLKMGR_STAT 0x4
#define CLKMGR_INTRCLR 0x14
/* Main PLL Group */
#define CLKMGR_MAINPLL 0xffd10024
#define CLKMGR_MAINPLL_EN 0x0
#define CLKMGR_MAINPLL_BYPASS 0xc
#define CLKMGR_MAINPLL_MPUCLK 0x18
#define CLKMGR_MAINPLL_NOCCLK 0x1c
#define CLKMGR_MAINPLL_NOCDIV 0x20
#define CLKMGR_MAINPLL_PLLGLOB 0x24
#define CLKMGR_MAINPLL_FDBCK 0x28
#define CLKMGR_MAINPLL_MEM 0x2c
#define CLKMGR_MAINPLL_MEMSTAT 0x30
#define CLKMGR_MAINPLL_PLLC0 0x34
#define CLKMGR_MAINPLL_PLLC1 0x38
#define CLKMGR_MAINPLL_VCOCALIB 0x3c
#define CLKMGR_MAINPLL_PLLC2 0x40
#define CLKMGR_MAINPLL_PLLC3 0x44
#define CLKMGR_MAINPLL_PLLM 0x48
#define CLKMGR_MAINPLL_LOSTLOCK 0x54
/* Peripheral PLL Group */
#define CLKMGR_PERPLL 0xffd1007c
#define CLKMGR_PERPLL_EN 0x0
#define CLKMGR_PERPLL_BYPASS 0xc
#define CLKMGR_PERPLL_EMACCTL 0x18
#define CLKMGR_PERPLL_GPIODIV 0x1c
#define CLKMGR_PERPLL_PLLGLOB 0x20
#define CLKMGR_PERPLL_FDBCK 0x24
#define CLKMGR_PERPLL_MEM 0x28
#define CLKMGR_PERPLL_MEMSTAT 0x2c
#define CLKMGR_PERPLL_PLLC0 0x30
#define CLKMGR_PERPLL_PLLC1 0x34
#define CLKMGR_PERPLL_VCOCALIB 0x38
#define CLKMGR_PERPLL_PLLC2 0x3c
#define CLKMGR_PERPLL_PLLC3 0x40
#define CLKMGR_PERPLL_PLLM 0x44
#define CLKMGR_PERPLL_LOSTLOCK 0x50
/* Altera Group */
#define CLKMGR_ALTERA 0xffd100d0
#define CLKMGR_ALTERA_JTAG 0x0
#define CLKMGR_ALTERA_EMACACTR 0x4
#define CLKMGR_ALTERA_EMACBCTR 0x8
#define CLKMGR_ALTERA_EMACPTPCTR 0xc
#define CLKMGR_ALTERA_GPIODBCTR 0x10
#define CLKMGR_ALTERA_SDMMCCTR 0x14
#define CLKMGR_ALTERA_S2FUSER0CTR 0x18
#define CLKMGR_ALTERA_S2FUSER1CTR 0x1c
#define CLKMGR_ALTERA_PSIREFCTR 0x20
#define CLKMGR_ALTERA_EXTCNTRST 0x24
/* Membus */
#define CLKMGR_MEM_REQ BIT(24)
#define CLKMGR_MEM_WR BIT(25)
#define CLKMGR_MEM_ERR BIT(26)
#define CLKMGR_MEM_WDAT_OFFSET 16
#define CLKMGR_MEM_ADDR 0x4027
#define CLKMGR_MEM_WDAT 0x80
/* Clock Manager Macros */
#define CLKMGR_CTRL_BOOTMODE_SET_MSK 0x00000001
#define CLKMGR_STAT_BUSY_E_BUSY 0x1
#define CLKMGR_STAT_BUSY(x) (((x) & 0x00000001) >> 0)
#define CLKMGR_STAT_MAINPLLLOCKED(x) (((x) & 0x00000100) >> 8)
#define CLKMGR_STAT_PERPLLLOCKED(x) (((x) & 0x00010000) >> 16)
#define CLKMGR_INTRCLR_MAINLOCKLOST_SET_MSK 0x00000004
#define CLKMGR_INTRCLR_PERLOCKLOST_SET_MSK 0x00000008
#define CLKMGR_INTOSC_HZ 460000000
/* Main PLL Macros */
#define CLKMGR_MAINPLL_EN_RESET 0x000000ff
/* Peripheral PLL Macros */
#define CLKMGR_PERPLL_EN_RESET 0x00000fff
#define CLKMGR_PERPLL_EN_SDMMCCLK BIT(5)
#define CLKMGR_PERPLL_GPIODIV_GPIODBCLK_SET(x) (((x) << 0) & 0x0000ffff)
/* Altera Macros */
#define CLKMGR_ALTERA_EXTCNTRST_RESET 0xff
/* Shared Macros */
#define CLKMGR_PSRC(x) (((x) & 0x00030000) >> 16)
#define CLKMGR_PSRC_MAIN 0
#define CLKMGR_PSRC_PER 1
#define CLKMGR_PLLGLOB_PSRC_EOSC1 0x0
#define CLKMGR_PLLGLOB_PSRC_INTOSC 0x1
#define CLKMGR_PLLGLOB_PSRC_F2S 0x2
#define CLKMGR_PLLM_MDIV(x) ((x) & 0x000003ff)
#define CLKMGR_PLLGLOB_PD_SET_MSK 0x00000001
#define CLKMGR_PLLGLOB_RST_SET_MSK 0x00000002
#define CLKMGR_PLLGLOB_REFCLKDIV(x) (((x) & 0x00003f00) >> 8)
#define CLKMGR_PLLGLOB_AREFCLKDIV(x) (((x) & 0x00000f00) >> 8)
#define CLKMGR_PLLGLOB_DREFCLKDIV(x) (((x) & 0x00003000) >> 12)
#define CLKMGR_VCOCALIB_HSCNT_SET(x) (((x) << 0) & 0x000003ff)
#define CLKMGR_VCOCALIB_MSCNT_SET(x) (((x) << 16) & 0x00ff0000)
#define CLKMGR_CLR_LOSTLOCK_BYPASS 0x20000000
void config_clkmgr_handoff(struct handoff *hoff_ptr);
uint32_t get_mpu_clk(void);
uint32_t get_wdt_clk(void);
uint32_t get_uart_clk(void);
uint32_t get_mmc_clk(void);
#endif
``` | /content/code_sandbox/include/zephyr/drivers/clock_control/clock_agilex_ll.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,515 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_ESP32_CLOCK_CONTROL_H_
#define ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_ESP32_CLOCK_CONTROL_H_
#if defined(CONFIG_SOC_SERIES_ESP32)
#include <zephyr/dt-bindings/clock/esp32_clock.h>
#elif defined(CONFIG_SOC_SERIES_ESP32S2)
#include <zephyr/dt-bindings/clock/esp32s2_clock.h>
#elif defined(CONFIG_SOC_SERIES_ESP32S3)
#include <zephyr/dt-bindings/clock/esp32s3_clock.h>
#elif defined(CONFIG_SOC_SERIES_ESP32C2)
#include <zephyr/dt-bindings/clock/esp32c2_clock.h>
#elif defined(CONFIG_SOC_SERIES_ESP32C3)
#include <zephyr/dt-bindings/clock/esp32c3_clock.h>
#elif defined(CONFIG_SOC_SERIES_ESP32C6)
#include <zephyr/dt-bindings/clock/esp32c6_clock.h>
#endif /* CONFIG_SOC_SERIES_ESP32xx */
#define ESP32_CLOCK_CONTROL_SUBSYS_CPU 50
#define ESP32_CLOCK_CONTROL_SUBSYS_RTC_FAST 51
#define ESP32_CLOCK_CONTROL_SUBSYS_RTC_SLOW 52
struct esp32_cpu_clock_config {
int clk_src;
uint32_t cpu_freq;
uint32_t xtal_freq;
};
struct esp32_rtc_clock_config {
uint32_t rtc_fast_clock_src;
uint32_t rtc_slow_clock_src;
};
struct esp32_clock_config {
struct esp32_cpu_clock_config cpu;
struct esp32_rtc_clock_config rtc;
};
#endif /* ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_ESP32_CLOCK_CONTROL_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/clock_control/esp32_clock_control.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 360 |
```objective-c
/*
*
*/
#ifndef CLOCK_CONTROL_ADSP_H_
#define CLOCK_CONTROL_ADSP_H_
#include <adsp_clk.h>
#endif /* CLOCK_CONTROL_ADSP_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/clock_control/clock_control_adsp.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 34 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_CLOCK_CONTROL_AMBIQ_H_
#define ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_CLOCK_CONTROL_AMBIQ_H_
#ifdef __cplusplus
extern "C" {
#endif
/** @brief Clocks handled by the CLOCK peripheral.
*
* Enum shall be used as a sys argument in clock_control API.
*/
enum clock_control_ambiq_type {
CLOCK_CONTROL_AMBIQ_TYPE_HFXTAL_BLE,
CLOCK_CONTROL_AMBIQ_TYPE_HFXTAL_USB,
CLOCK_CONTROL_AMBIQ_TYPE_HFXTAL_ADC,
CLOCK_CONTROL_AMBIQ_TYPE_HFXTAL_AUADC,
CLOCK_CONTROL_AMBIQ_TYPE_HCXTAL_DBGCTRL,
CLOCK_CONTROL_AMBIQ_TYPE_HCXTAL_CLKGEN_MISC,
CLOCK_CONTROL_AMBIQ_TYPE_HCXTAL_CLKGEN_CLKOUT,
CLOCK_CONTROL_AMBIQ_TYPE_HCXTAL_PDM,
CLOCK_CONTROL_AMBIQ_TYPE_HCXTAL_IIS,
CLOCK_CONTROL_AMBIQ_TYPE_HCXTAL_IOM,
CLOCK_CONTROL_AMBIQ_TYPE_LFXTAL,
CLOCK_CONTROL_AMBIQ_TYPE_MAX
};
#ifdef __cplusplus
}
#endif
#endif /* ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_CLOCK_CONTROL_AMBIQ_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/clock_control/clock_control_ambiq.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 267 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_LPC11U6X_CLOCK_CONTROL_H_
#define ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_LPC11U6X_CLOCK_CONTROL_H_
#include <zephyr/drivers/clock_control.h>
#include <zephyr/dt-bindings/clock/lpc11u6x_clock.h>
#endif /* ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_LPC11U6X_CLOCK_CONTROL_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/clock_control/lpc11u6x_clock_control.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 97 |
```objective-c
/*
*
*/
#include <stdint.h>
#ifndef ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_NUMAKER_H_
#define ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_NUMAKER_H_
/**
* @brief Enable/disable oscillators or other clocks
*/
#define NUMAKER_SCC_CLKSW_UNTOUCHED 0
#define NUMAKER_SCC_CLKSW_ENABLE 1
#define NUMAKER_SCC_CLKSW_DISABLE 2
/**
* @brief SCC subsystem ID
*/
#define NUMAKER_SCC_SUBSYS_ID_PCC 1
struct numaker_scc_subsys {
uint32_t subsys_id; /* SCC subsystem ID */
/* Peripheral clock control configuration structure
* clk_modidx is same as u32ModuleIdx in BSP CLK_SetModuleClock().
* clk_src is same as u32ClkSrc in BSP CLK_SetModuleClock().
* clk_div is same as u32ClkDiv in BSP CLK_SetModuleClock().
*/
union {
struct {
uint32_t clk_modidx;
uint32_t clk_src;
uint32_t clk_div;
} pcc;
};
};
#endif /* ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_NUMAKER_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/clock_control/clock_control_numaker.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 249 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_ADI_MAX32_CLOCK_CONTROL_H_
#define ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_ADI_MAX32_CLOCK_CONTROL_H_
#include <zephyr/drivers/clock_control.h>
#include <zephyr/dt-bindings/clock/adi_max32_clock.h>
#include <wrap_max32_sys.h>
/** Driver structure definition */
struct max32_perclk {
uint32_t bus;
uint32_t bit;
/* Peripheral clock source:
* Can be (see: adi_max32_clock.h file):
*
* ADI_MAX32_PRPH_CLK_SRC_PCLK
* ADI_MAX32_PRPH_CLK_SRC_EXTCLK
* ADI_MAX32_PRPH_CLK_SRC_IBRO
* ADI_MAX32_PRPH_CLK_SRC_ERFO
* ADI_MAX32_PRPH_CLK_SRC_ERTCO
* ADI_MAX32_PRPH_CLK_SRC_INRO
* ADI_MAX32_PRPH_CLK_SRC_ISO
* ADI_MAX32_PRPH_CLK_SRC_IBRO_DIV8
*/
uint32_t clk_src;
};
/** Get prescaler value if it defined */
#define ADI_MAX32_SYSCLK_PRESCALER DT_PROP_OR(DT_NODELABEL(gcr), sysclk_prescaler, 1)
#define ADI_MAX32_CLK_IPO_FREQ DT_PROP(DT_NODELABEL(clk_ipo), clock_frequency)
#define ADI_MAX32_CLK_ERFO_FREQ DT_PROP(DT_NODELABEL(clk_erfo), clock_frequency)
#define ADI_MAX32_CLK_IBRO_FREQ DT_PROP(DT_NODELABEL(clk_ibro), clock_frequency)
#define ADI_MAX32_CLK_ISO_FREQ DT_PROP_OR(DT_NODELABEL(clk_iso), clock_frequency, 0)
#define ADI_MAX32_CLK_INRO_FREQ DT_PROP(DT_NODELABEL(clk_inro), clock_frequency)
#define ADI_MAX32_CLK_ERTCO_FREQ DT_PROP(DT_NODELABEL(clk_ertco), clock_frequency)
/* External clock may not be defined so _OR is used */
#define ADI_MAX32_CLK_EXTCLK_FREQ DT_PROP_OR(DT_NODELABEL(clk_extclk), clock_frequency, 0)
#define DT_GCR_CLOCKS_CTRL DT_CLOCKS_CTLR(DT_NODELABEL(gcr))
#if DT_SAME_NODE(DT_GCR_CLOCKS_CTRL, DT_NODELABEL(clk_ipo))
#define ADI_MAX32_SYSCLK_SRC ADI_MAX32_CLK_IPO
#define ADI_MAX32_SYSCLK_FREQ (ADI_MAX32_CLK_IPO_FREQ / ADI_MAX32_SYSCLK_PRESCALER)
#endif
#if DT_SAME_NODE(DT_GCR_CLOCKS_CTRL, DT_NODELABEL(clk_erfo))
#define ADI_MAX32_SYSCLK_SRC ADI_MAX32_CLK_ERFO
#define ADI_MAX32_SYSCLK_FREQ (ADI_MAX32_CLK_ERFO_FREQ / ADI_MAX32_SYSCLK_PRESCALER)
#endif
#if DT_SAME_NODE(DT_GCR_CLOCKS_CTRL, DT_NODELABEL(clk_ibro))
#define ADI_MAX32_SYSCLK_SRC ADI_MAX32_CLK_IBRO
#define ADI_MAX32_SYSCLK_FREQ (ADI_MAX32_CLK_IBRO_FREQ / ADI_MAX32_SYSCLK_PRESCALER)
#endif
#if DT_SAME_NODE(DT_GCR_CLOCKS_CTRL, DT_NODELABEL(clk_iso))
#define ADI_MAX32_SYSCLK_SRC ADI_MAX32_CLK_ISO
#define ADI_MAX32_SYSCLK_FREQ (ADI_MAX32_CLK_ISO_FREQ / ADI_MAX32_SYSCLK_PRESCALER)
#endif
#if DT_SAME_NODE(DT_GCR_CLOCKS_CTRL, DT_NODELABEL(clk_inro))
#define ADI_MAX32_SYSCLK_SRC ADI_MAX32_CLK_INRO
#define ADI_MAX32_SYSCLK_FREQ (ADI_MAX32_CLK_INRO_FREQ / ADI_MAX32_SYSCLK_PRESCALER)
#endif
#if DT_SAME_NODE(DT_GCR_CLOCKS_CTRL, DT_NODELABEL(clk_ertco))
#define ADI_MAX32_SYSCLK_SRC ADI_MAX32_CLK_ERTCO
#define ADI_MAX32_SYSCLK_FREQ (ADI_MAX32_CLK_ERTCO_FREQ / ADI_MAX32_SYSCLK_PRESCALER)
#endif
#if DT_SAME_NODE(DT_GCR_CLOCKS_CTRL, DT_NODELABEL(clk_extclk))
#define ADI_MAX32_SYSCLK_SRC ADI_MAX32_CLK_EXTCLK
#define ADI_MAX32_SYSCLK_FREQ (ADI_MAX32_CLK_EXTCLK_FREQ / ADI_MAX32_SYSCLK_PRESCALER)
#endif
#ifndef ADI_MAX32_SYSCLK_SRC
#define ADI_MAX32_SYSCLK_SRC ADI_MAX32_CLK_IPO
#define ADI_MAX32_SYSCLK_FREQ (ADI_MAX32_CLK_IPO_FREQ / ADI_MAX32_SYSCLK_PRESCALER)
#endif
#define ADI_MAX32_PCLK_FREQ (ADI_MAX32_SYSCLK_FREQ / 2)
#define ADI_MAX32_GET_PRPH_CLK_FREQ(clk_src) \
((clk_src) == ADI_MAX32_PRPH_CLK_SRC_PCLK ? ADI_MAX32_PCLK_FREQ \
: (clk_src) == ADI_MAX32_PRPH_CLK_SRC_IBRO ? ADI_MAX32_CLK_IBRO_FREQ \
: (clk_src) == ADI_MAX32_PRPH_CLK_SRC_ERFO ? ADI_MAX32_CLK_ERFO_FREQ \
: (clk_src) == ADI_MAX32_PRPH_CLK_SRC_ERTCO ? ADI_MAX32_CLK_ERTCO_FREQ \
: (clk_src) == ADI_MAX32_PRPH_CLK_SRC_INRO ? ADI_MAX32_CLK_INRO_FREQ \
: (clk_src) == ADI_MAX32_PRPH_CLK_SRC_ISO ? ADI_MAX32_CLK_ISO_FREQ \
: (clk_src) == ADI_MAX32_PRPH_CLK_SRC_IBRO_DIV8 ? (ADI_MAX32_CLK_IBRO_FREQ / 8) \
: (clk_src) == ADI_MAX32_PRPH_CLK_SRC_EXTCLK ? ADI_MAX32_CLK_EXTCLK_FREQ \
: 0)
#endif /* ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_ADI_MAX32_CLOCK_CONTROL_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/clock_control/adi_max32_clock_control.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,308 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_ADC_VOLTAGE_DIVIDER_H_
#define ZEPHYR_INCLUDE_DRIVERS_ADC_VOLTAGE_DIVIDER_H_
#include <zephyr/drivers/adc.h>
struct voltage_divider_dt_spec {
const struct adc_dt_spec port;
uint32_t full_ohms;
uint32_t output_ohms;
};
/**
* @brief Get voltage divider information from devicetree.
*
* This returns a static initializer for a @p voltage_divider_dt_spec structure
* given a devicetree node.
*
* @param node_id Devicetree node identifier.
*
* @return Static initializer for an voltage_divider_dt_spec structure.
*/
#define VOLTAGE_DIVIDER_DT_SPEC_GET(node_id) \
{ \
.port = ADC_DT_SPEC_GET(node_id), \
.full_ohms = DT_PROP_OR(node_id, full_ohms, 0), \
.output_ohms = DT_PROP(node_id, output_ohms), \
}
/**
* @brief Calculates the actual voltage from the measured voltage
*
* @param[in] spec voltage divider specification from Devicetree.
* @param[in,out] v_to_v Pointer to the measured voltage on input, and the
* corresponding scaled voltage value on output.
*
* @retval 0 on success
* @retval -ENOTSUP if "full_ohms" is not specified
*/
static inline int voltage_divider_scale_dt(const struct voltage_divider_dt_spec *spec,
int32_t *v_to_v)
{
/* cannot be scaled if "full_ohms" is not specified */
if (spec->full_ohms == 0) {
return -ENOTSUP;
}
/* voltage scaled by voltage divider values using DT binding */
*v_to_v = (int64_t)*v_to_v * spec->full_ohms / spec->output_ohms;
return 0;
}
#endif /* ZEPHYR_INCLUDE_DRIVERS_ADC_VOLTAGE_DIVIDER_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/adc/voltage_divider.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 434 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_ADC_LMP90XXX_H_
#define ZEPHYR_INCLUDE_DRIVERS_ADC_LMP90XXX_H_
#include <zephyr/device.h>
#include <zephyr/drivers/gpio.h>
/* LMP90xxx supports GPIO D0..D6 */
#define LMP90XXX_GPIO_MAX 6
int lmp90xxx_gpio_set_output(const struct device *dev, uint8_t pin);
int lmp90xxx_gpio_set_input(const struct device *dev, uint8_t pin);
int lmp90xxx_gpio_set_pin_value(const struct device *dev, uint8_t pin,
bool value);
int lmp90xxx_gpio_get_pin_value(const struct device *dev, uint8_t pin,
bool *value);
int lmp90xxx_gpio_port_get_raw(const struct device *dev,
gpio_port_value_t *value);
int lmp90xxx_gpio_port_set_masked_raw(const struct device *dev,
gpio_port_pins_t mask,
gpio_port_value_t value);
int lmp90xxx_gpio_port_set_bits_raw(const struct device *dev,
gpio_port_pins_t pins);
int lmp90xxx_gpio_port_clear_bits_raw(const struct device *dev,
gpio_port_pins_t pins);
int lmp90xxx_gpio_port_toggle_bits(const struct device *dev,
gpio_port_pins_t pins);
#endif /* ZEPHYR_INCLUDE_DRIVERS_ADC_LMP90XXX_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/adc/lmp90xxx.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 300 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_ADC_CURRENT_SENSE_SHUNT_H_
#define ZEPHYR_INCLUDE_DRIVERS_ADC_CURRENT_SENSE_SHUNT_H_
#include <zephyr/drivers/adc.h>
struct current_sense_shunt_dt_spec {
const struct adc_dt_spec port;
uint32_t shunt_micro_ohms;
};
/**
* @brief Get current sensor information from devicetree.
*
* This returns a static initializer for a @p current_sense_shunt_dt_spec structure
* given a devicetree node.
*
* @param node_id Devicetree node identifier.
*
* @return Static initializer for an current_sense_shunt_dt_spec structure.
*/
#define CURRENT_SENSE_SHUNT_DT_SPEC_GET(node_id) \
{ \
.port = ADC_DT_SPEC_GET(node_id), \
.shunt_micro_ohms = DT_PROP(node_id, shunt_resistor_micro_ohms), \
}
/**
* @brief Calculates the actual amperage from the measured voltage
*
* @param[in] spec current sensor specification from Devicetree.
* @param[in,out] v_to_i Pointer to the measured voltage in millivolts on input, and the
* corresponding scaled current value in milliamps on output.
*/
static inline void current_sense_shunt_scale_dt(const struct current_sense_shunt_dt_spec *spec,
int32_t *v_to_i)
{
/* store in a temporary 64 bit variable to prevent overflow during calculation */
int64_t tmp = *v_to_i;
/* multiplies by 1,000,000 before dividing by shunt resistance in micro-ohms. */
tmp = tmp * 1000000 / spec->shunt_micro_ohms;
*v_to_i = (int32_t)tmp;
}
#endif /* ZEPHYR_INCLUDE_DRIVERS_ADC_CURRENT_SENSE_SHUNT_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/adc/current_sense_shunt.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 404 |
```objective-c
/*
*
*/
#ifndef _ADC_NPCX_THRESHOLD_H_
#define _ADC_NPCX_THRESHOLD_H_
#include <zephyr/device.h>
enum adc_npcx_threshold_param_l_h {
ADC_NPCX_THRESHOLD_PARAM_L_H_HIGHER,
ADC_NPCX_THRESHOLD_PARAM_L_H_LOWER,
};
enum adc_npcx_threshold_param_type {
/* Selects ADC channel to be used for measurement */
ADC_NPCX_THRESHOLD_PARAM_CHNSEL,
/* Sets relation between measured value and assetion threshold value.*/
ADC_NPCX_THRESHOLD_PARAM_L_H,
/* Sets the threshold value to which measured data is compared. */
ADC_NPCX_THRESHOLD_PARAM_THVAL,
/* Sets worker queue thread to be notified */
ADC_NPCX_THRESHOLD_PARAM_WORK,
ADC_NPCX_THRESHOLD_PARAM_MAX,
};
struct adc_npcx_threshold_param {
/* Threshold ocntrol parameter */
enum adc_npcx_threshold_param_type type;
/* Parameter value */
uint32_t val;
};
/**
* @brief Convert input value in millivolts to corresponding threshold register
* value.
*
* @note This function is available only if @kconfig{CONFIG_ADC_CMP_NPCX}
* is selected.
*
* @param dev Pointer to the device structure for the driver instance.
* @param val_mv Input value in millivolts to be converted.
* @param thrval Pointer of variable to hold the result of conversion.
*
* @returns 0 on success, negative result if input cannot be converted due to
* overflow.
*/
int adc_npcx_threshold_mv_to_thrval(const struct device *dev, uint32_t val_mv,
uint32_t *thrval);
/**
* @brief Set ADC threshold parameter.
*
* @note This function is available only if @kconfig{CONFIG_ADC_CMP_NPCX}
* is selected.
*
* @param dev Pointer to the device structure for the driver instance.
* @param th_sel Threshold selected.
* @param param Pointer of parameter structure.
* See struct adc_npcx_threshold_param for supported
* parameters.
*
* @returns 0 on success, negative error code otherwise.
*/
int adc_npcx_threshold_ctrl_set_param(const struct device *dev,
const uint8_t th_sel,
const struct adc_npcx_threshold_param
*param);
/**
* @brief Enables/Disables ADC threshold interruption.
*
* @note This function is available only if @kconfig{CONFIG_ADC_CMP_NPCX}
* is selected.
*
* @param dev Pointer to the device structure for the driver instance.
* @param th_sel Threshold selected.
* @param enable Enable or disables threshold interruption.
*
* @returns 0 on success, negative error code otherwise.
* all parameters must be configure prior enabling threshold
* interruption, otherwise error will be returned.
*/
int adc_npcx_threshold_ctrl_enable(const struct device *dev, uint8_t th_sel,
const bool enable);
#endif /*_ADC_NPCX_THRESHOLD_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/adc/adc_npcx_threshold.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 617 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_STM32_CLOCK_CONTROL_H_
#define ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_STM32_CLOCK_CONTROL_H_
#include <zephyr/drivers/clock_control.h>
#if defined(CONFIG_SOC_SERIES_STM32C0X)
#include <zephyr/dt-bindings/clock/stm32c0_clock.h>
#elif defined(CONFIG_SOC_SERIES_STM32F0X)
#include <zephyr/dt-bindings/clock/stm32f0_clock.h>
#elif defined(CONFIG_SOC_SERIES_STM32F1X)
#include <zephyr/dt-bindings/clock/stm32f1_clock.h>
#elif defined(CONFIG_SOC_SERIES_STM32F3X)
#include <zephyr/dt-bindings/clock/stm32f3_clock.h>
#elif defined(CONFIG_SOC_SERIES_STM32F2X) || \
defined(CONFIG_SOC_SERIES_STM32F4X)
#include <zephyr/dt-bindings/clock/stm32f4_clock.h>
#elif defined(CONFIG_SOC_SERIES_STM32F7X)
#include <zephyr/dt-bindings/clock/stm32f7_clock.h>
#elif defined(CONFIG_SOC_SERIES_STM32G0X)
#include <zephyr/dt-bindings/clock/stm32g0_clock.h>
#elif defined(CONFIG_SOC_SERIES_STM32G4X)
#include <zephyr/dt-bindings/clock/stm32g4_clock.h>
#elif defined(CONFIG_SOC_SERIES_STM32L0X)
#include <zephyr/dt-bindings/clock/stm32l0_clock.h>
#elif defined(CONFIG_SOC_SERIES_STM32L1X)
#include <zephyr/dt-bindings/clock/stm32l1_clock.h>
#elif defined(CONFIG_SOC_SERIES_STM32L4X) || \
defined(CONFIG_SOC_SERIES_STM32L5X)
#include <zephyr/dt-bindings/clock/stm32l4_clock.h>
#elif defined(CONFIG_SOC_SERIES_STM32WBX)
#include <zephyr/dt-bindings/clock/stm32wb_clock.h>
#elif defined(CONFIG_SOC_SERIES_STM32WLX)
#include <zephyr/dt-bindings/clock/stm32wl_clock.h>
#elif defined(CONFIG_SOC_SERIES_STM32H5X)
#include <zephyr/dt-bindings/clock/stm32h5_clock.h>
#elif defined(CONFIG_SOC_SERIES_STM32H7X)
#include <zephyr/dt-bindings/clock/stm32h7_clock.h>
#elif defined(CONFIG_SOC_SERIES_STM32H7RSX)
#include <zephyr/dt-bindings/clock/stm32h7rs_clock.h>
#elif defined(CONFIG_SOC_SERIES_STM32U5X)
#include <zephyr/dt-bindings/clock/stm32u5_clock.h>
#elif defined(CONFIG_SOC_SERIES_STM32WBAX)
#include <zephyr/dt-bindings/clock/stm32wba_clock.h>
#else
#include <zephyr/dt-bindings/clock/stm32_clock.h>
#endif
/** Common clock control device node for all STM32 chips */
#define STM32_CLOCK_CONTROL_NODE DT_NODELABEL(rcc)
/** RCC node related symbols */
#define STM32_AHB_PRESCALER DT_PROP(DT_NODELABEL(rcc), ahb_prescaler)
#define STM32_APB1_PRESCALER DT_PROP(DT_NODELABEL(rcc), apb1_prescaler)
#define STM32_APB2_PRESCALER DT_PROP(DT_NODELABEL(rcc), apb2_prescaler)
#define STM32_APB3_PRESCALER DT_PROP(DT_NODELABEL(rcc), apb3_prescaler)
#define STM32_APB5_PRESCALER DT_PROP(DT_NODELABEL(rcc), apb5_prescaler)
#define STM32_APB7_PRESCALER DT_PROP(DT_NODELABEL(rcc), apb7_prescaler)
#define STM32_AHB3_PRESCALER DT_PROP(DT_NODELABEL(rcc), ahb3_prescaler)
#define STM32_AHB4_PRESCALER DT_PROP(DT_NODELABEL(rcc), ahb4_prescaler)
#define STM32_AHB5_PRESCALER DT_PROP_OR(DT_NODELABEL(rcc), ahb5_prescaler, 1)
#define STM32_CPU1_PRESCALER DT_PROP(DT_NODELABEL(rcc), cpu1_prescaler)
#define STM32_CPU2_PRESCALER DT_PROP(DT_NODELABEL(rcc), cpu2_prescaler)
#if DT_NODE_HAS_PROP(DT_NODELABEL(rcc), ahb_prescaler)
#define STM32_CORE_PRESCALER STM32_AHB_PRESCALER
#elif DT_NODE_HAS_PROP(DT_NODELABEL(rcc), cpu1_prescaler)
#define STM32_CORE_PRESCALER STM32_CPU1_PRESCALER
#endif
#if DT_NODE_HAS_PROP(DT_NODELABEL(rcc), ahb3_prescaler)
#define STM32_FLASH_PRESCALER STM32_AHB3_PRESCALER
#elif DT_NODE_HAS_PROP(DT_NODELABEL(rcc), ahb4_prescaler)
#define STM32_FLASH_PRESCALER STM32_AHB4_PRESCALER
#else
#define STM32_FLASH_PRESCALER STM32_CORE_PRESCALER
#endif
#define STM32_ADC_PRESCALER DT_PROP(DT_NODELABEL(rcc), adc_prescaler)
#define STM32_ADC12_PRESCALER DT_PROP(DT_NODELABEL(rcc), adc12_prescaler)
#define STM32_ADC34_PRESCALER DT_PROP(DT_NODELABEL(rcc), adc34_prescaler)
/** STM2H7RS specific RCC dividers */
#if defined(CONFIG_SOC_SERIES_STM32H7RSX)
#define STM32_D1CPRE DT_PROP(DT_NODELABEL(rcc), dcpre)
#define STM32_HPRE DT_PROP(DT_NODELABEL(rcc), hpre)
#define STM32_PPRE1 DT_PROP(DT_NODELABEL(rcc), ppre1)
#define STM32_PPRE2 DT_PROP(DT_NODELABEL(rcc), ppre2)
#define STM32_PPRE4 DT_PROP(DT_NODELABEL(rcc), ppre4)
#define STM32_PPRE5 DT_PROP(DT_NODELABEL(rcc), ppre5)
#else
#define STM32_D1CPRE DT_PROP(DT_NODELABEL(rcc), d1cpre)
#define STM32_HPRE DT_PROP(DT_NODELABEL(rcc), hpre)
#define STM32_D2PPRE1 DT_PROP(DT_NODELABEL(rcc), d2ppre1)
#define STM32_D2PPRE2 DT_PROP(DT_NODELABEL(rcc), d2ppre2)
#define STM32_D1PPRE DT_PROP(DT_NODELABEL(rcc), d1ppre)
#define STM32_D3PPRE DT_PROP(DT_NODELABEL(rcc), d3ppre)
#endif /* CONFIG_SOC_SERIES_STM32H7RSX */
/** STM2WBA specifics RCC dividers */
#define STM32_AHB5_DIV DT_PROP(DT_NODELABEL(rcc), ahb5_div)
#define DT_RCC_CLOCKS_CTRL DT_CLOCKS_CTLR(DT_NODELABEL(rcc))
/* To enable use of IS_ENABLED utility macro, these symbols
* should not be defined directly using DT_SAME_NODE.
*/
#if DT_SAME_NODE(DT_RCC_CLOCKS_CTRL, DT_NODELABEL(pll))
#define STM32_SYSCLK_SRC_PLL 1
#endif
#if DT_SAME_NODE(DT_RCC_CLOCKS_CTRL, DT_NODELABEL(clk_hsi))
#define STM32_SYSCLK_SRC_HSI 1
#endif
#if DT_SAME_NODE(DT_RCC_CLOCKS_CTRL, DT_NODELABEL(clk_hse))
#define STM32_SYSCLK_SRC_HSE 1
#endif
#if DT_SAME_NODE(DT_RCC_CLOCKS_CTRL, DT_NODELABEL(clk_msi))
#define STM32_SYSCLK_SRC_MSI 1
#endif
#if DT_SAME_NODE(DT_RCC_CLOCKS_CTRL, DT_NODELABEL(clk_msis))
#define STM32_SYSCLK_SRC_MSIS 1
#endif
#if DT_SAME_NODE(DT_RCC_CLOCKS_CTRL, DT_NODELABEL(clk_csi))
#define STM32_SYSCLK_SRC_CSI 1
#endif
/** PLL node related symbols */
#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f2_pll_clock, okay) || \
DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f4_pll_clock, okay) || \
DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f7_pll_clock, okay) || \
DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32g0_pll_clock, okay) || \
DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32g4_pll_clock, okay) || \
DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32l4_pll_clock, okay) || \
DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32u5_pll_clock, okay) || \
DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32wb_pll_clock, okay) || \
DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32wba_pll_clock, okay) || \
DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32h7_pll_clock, okay) || \
DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32h7rs_pll_clock, okay)
#define STM32_PLL_ENABLED 1
#define STM32_PLL_M_DIVISOR DT_PROP(DT_NODELABEL(pll), div_m)
#define STM32_PLL_N_MULTIPLIER DT_PROP(DT_NODELABEL(pll), mul_n)
#define STM32_PLL_P_ENABLED DT_NODE_HAS_PROP(DT_NODELABEL(pll), div_p)
#define STM32_PLL_P_DIVISOR DT_PROP_OR(DT_NODELABEL(pll), div_p, 1)
#define STM32_PLL_Q_ENABLED DT_NODE_HAS_PROP(DT_NODELABEL(pll), div_q)
#define STM32_PLL_Q_DIVISOR DT_PROP_OR(DT_NODELABEL(pll), div_q, 1)
#define STM32_PLL_R_ENABLED DT_NODE_HAS_PROP(DT_NODELABEL(pll), div_r)
#define STM32_PLL_R_DIVISOR DT_PROP_OR(DT_NODELABEL(pll), div_r, 1)
#define STM32_PLL_S_ENABLED DT_NODE_HAS_PROP(DT_NODELABEL(pll), div_s)
#define STM32_PLL_S_DIVISOR DT_PROP_OR(DT_NODELABEL(pll), div_s, 1)
#define STM32_PLL_FRACN_ENABLED DT_NODE_HAS_PROP(DT_NODELABEL(pll), fracn)
#define STM32_PLL_FRACN_VALUE DT_PROP_OR(DT_NODELABEL(pll), fracn, 1)
#endif
#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(plli2s), st_stm32f4_plli2s_clock, okay)
#define STM32_PLLI2S_ENABLED 1
#define STM32_PLLI2S_M_DIVISOR STM32_PLL_M_DIVISOR
#define STM32_PLLI2S_N_MULTIPLIER DT_PROP(DT_NODELABEL(plli2s), mul_n)
#define STM32_PLLI2S_R_ENABLED DT_NODE_HAS_PROP(DT_NODELABEL(plli2s), div_r)
#define STM32_PLLI2S_R_DIVISOR DT_PROP_OR(DT_NODELABEL(plli2s), div_r, 1)
#endif
#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(plli2s), st_stm32f412_plli2s_clock, okay)
#define STM32_PLLI2S_ENABLED 1
#define STM32_PLLI2S_M_DIVISOR DT_PROP(DT_NODELABEL(plli2s), div_m)
#define STM32_PLLI2S_N_MULTIPLIER DT_PROP(DT_NODELABEL(plli2s), mul_n)
#define STM32_PLLI2S_R_ENABLED DT_NODE_HAS_PROP(DT_NODELABEL(plli2s), div_r)
#define STM32_PLLI2S_R_DIVISOR DT_PROP_OR(DT_NODELABEL(plli2s), div_r, 1)
#endif
#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll2), st_stm32u5_pll_clock, okay) || \
DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll2), st_stm32h7_pll_clock, okay) || \
DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll2), st_stm32h7rs_pll_clock, okay)
#define STM32_PLL2_ENABLED 1
#define STM32_PLL2_M_DIVISOR DT_PROP(DT_NODELABEL(pll2), div_m)
#define STM32_PLL2_N_MULTIPLIER DT_PROP(DT_NODELABEL(pll2), mul_n)
#define STM32_PLL2_P_ENABLED DT_NODE_HAS_PROP(DT_NODELABEL(pll2), div_p)
#define STM32_PLL2_P_DIVISOR DT_PROP_OR(DT_NODELABEL(pll2), div_p, 1)
#define STM32_PLL2_Q_ENABLED DT_NODE_HAS_PROP(DT_NODELABEL(pll2), div_q)
#define STM32_PLL2_Q_DIVISOR DT_PROP_OR(DT_NODELABEL(pll2), div_q, 1)
#define STM32_PLL2_R_ENABLED DT_NODE_HAS_PROP(DT_NODELABEL(pll2), div_r)
#define STM32_PLL2_R_DIVISOR DT_PROP_OR(DT_NODELABEL(pll2), div_r, 1)
#define STM32_PLL2_S_ENABLED DT_NODE_HAS_PROP(DT_NODELABEL(pll2), div_s)
#define STM32_PLL2_S_DIVISOR DT_PROP_OR(DT_NODELABEL(pll2), div_s, 1)
#define STM32_PLL2_T_ENABLED DT_NODE_HAS_PROP(DT_NODELABEL(pll2), div_t)
#define STM32_PLL2_T_DIVISOR DT_PROP_OR(DT_NODELABEL(pll2), div_t, 1)
#define STM32_PLL2_FRACN_ENABLED DT_NODE_HAS_PROP(DT_NODELABEL(pll2), fracn)
#define STM32_PLL2_FRACN_VALUE DT_PROP_OR(DT_NODELABEL(pll2), fracn, 1)
#endif
#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll3), st_stm32h7_pll_clock, okay) || \
DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll3), st_stm32u5_pll_clock, okay) || \
DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll3), st_stm32h7rs_pll_clock, okay)
#define STM32_PLL3_ENABLED 1
#define STM32_PLL3_M_DIVISOR DT_PROP(DT_NODELABEL(pll3), div_m)
#define STM32_PLL3_N_MULTIPLIER DT_PROP(DT_NODELABEL(pll3), mul_n)
#define STM32_PLL3_P_ENABLED DT_NODE_HAS_PROP(DT_NODELABEL(pll3), div_p)
#define STM32_PLL3_P_DIVISOR DT_PROP_OR(DT_NODELABEL(pll3), div_p, 1)
#define STM32_PLL3_Q_ENABLED DT_NODE_HAS_PROP(DT_NODELABEL(pll3), div_q)
#define STM32_PLL3_Q_DIVISOR DT_PROP_OR(DT_NODELABEL(pll3), div_q, 1)
#define STM32_PLL3_R_ENABLED DT_NODE_HAS_PROP(DT_NODELABEL(pll3), div_r)
#define STM32_PLL3_R_DIVISOR DT_PROP_OR(DT_NODELABEL(pll3), div_r, 1)
#define STM32_PLL3_S_ENABLED DT_NODE_HAS_PROP(DT_NODELABEL(pll3), div_s)
#define STM32_PLL3_S_DIVISOR DT_PROP_OR(DT_NODELABEL(pll3), div_s, 1)
#define STM32_PLL3_FRACN_ENABLED DT_NODE_HAS_PROP(DT_NODELABEL(pll3), fracn)
#define STM32_PLL3_FRACN_VALUE DT_PROP_OR(DT_NODELABEL(pll3), fracn, 1)
#endif
#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f1_pll_clock, okay)
#define STM32_PLL_ENABLED 1
#define STM32_PLL_XTPRE DT_PROP(DT_NODELABEL(pll), xtpre)
#define STM32_PLL_MULTIPLIER DT_PROP(DT_NODELABEL(pll), mul)
#define STM32_PLL_USBPRE DT_PROP(DT_NODELABEL(pll), usbpre)
#elif DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f0_pll_clock, okay) || \
DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f100_pll_clock, okay) || \
DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32f105_pll_clock, okay)
#define STM32_PLL_ENABLED 1
#define STM32_PLL_MULTIPLIER DT_PROP(DT_NODELABEL(pll), mul)
#define STM32_PLL_PREDIV DT_PROP(DT_NODELABEL(pll), prediv)
#define STM32_PLL_USBPRE DT_PROP(DT_NODELABEL(pll), otgfspre)
#elif DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll), st_stm32l0_pll_clock, okay)
#define STM32_PLL_ENABLED 1
#define STM32_PLL_DIVISOR DT_PROP(DT_NODELABEL(pll), div)
#define STM32_PLL_MULTIPLIER DT_PROP(DT_NODELABEL(pll), mul)
#endif
#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll2), st_stm32f105_pll2_clock, okay)
#define STM32_PLL2_ENABLED 1
#define STM32_PLL2_MULTIPLIER DT_PROP(DT_NODELABEL(pll2), mul)
#define STM32_PLL2_PREDIV DT_PROP(DT_NODELABEL(pll2), prediv)
#endif
/** PLL/PLL1 clock source */
#if DT_NODE_HAS_STATUS(DT_NODELABEL(pll), okay) && \
DT_NODE_HAS_PROP(DT_NODELABEL(pll), clocks)
#define DT_PLL_CLOCKS_CTRL DT_CLOCKS_CTLR(DT_NODELABEL(pll))
#if DT_SAME_NODE(DT_PLL_CLOCKS_CTRL, DT_NODELABEL(clk_msi))
#define STM32_PLL_SRC_MSI 1
#endif
#if DT_SAME_NODE(DT_PLL_CLOCKS_CTRL, DT_NODELABEL(clk_msis))
#define STM32_PLL_SRC_MSIS 1
#endif
#if DT_SAME_NODE(DT_PLL_CLOCKS_CTRL, DT_NODELABEL(clk_hsi))
#define STM32_PLL_SRC_HSI 1
#endif
#if DT_SAME_NODE(DT_PLL_CLOCKS_CTRL, DT_NODELABEL(clk_csi))
#define STM32_PLL_SRC_CSI 1
#endif
#if DT_SAME_NODE(DT_PLL_CLOCKS_CTRL, DT_NODELABEL(clk_hse))
#define STM32_PLL_SRC_HSE 1
#endif
#if DT_SAME_NODE(DT_PLL_CLOCKS_CTRL, DT_NODELABEL(pll2))
#define STM32_PLL_SRC_PLL2 1
#endif
#endif
/** PLL2 clock source */
#if DT_NODE_HAS_STATUS(DT_NODELABEL(pll2), okay) && \
DT_NODE_HAS_PROP(DT_NODELABEL(pll2), clocks)
#define DT_PLL2_CLOCKS_CTRL DT_CLOCKS_CTLR(DT_NODELABEL(pll2))
#if DT_SAME_NODE(DT_PLL2_CLOCKS_CTRL, DT_NODELABEL(clk_msis))
#define STM32_PLL2_SRC_MSIS 1
#endif
#if DT_SAME_NODE(DT_PLL2_CLOCKS_CTRL, DT_NODELABEL(clk_hsi))
#define STM32_PLL2_SRC_HSI 1
#endif
#if DT_SAME_NODE(DT_PLL2_CLOCKS_CTRL, DT_NODELABEL(clk_hse))
#define STM32_PLL2_SRC_HSE 1
#endif
#endif
/** PLL3 clock source */
#if DT_NODE_HAS_STATUS(DT_NODELABEL(pll3), okay) && \
DT_NODE_HAS_PROP(DT_NODELABEL(pll3), clocks)
#define DT_PLL3_CLOCKS_CTRL DT_CLOCKS_CTLR(DT_NODELABEL(pll3))
#if DT_SAME_NODE(DT_PLL3_CLOCKS_CTRL, DT_NODELABEL(clk_msis))
#define STM32_PLL3_SRC_MSIS 1
#endif
#if DT_SAME_NODE(DT_PLL3_CLOCKS_CTRL, DT_NODELABEL(clk_hsi))
#define STM32_PLL3_SRC_HSI 1
#endif
#if DT_SAME_NODE(DT_PLL3_CLOCKS_CTRL, DT_NODELABEL(clk_hse))
#define STM32_PLL3_SRC_HSE 1
#endif
#endif
/** Fixed clocks related symbols */
#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_lse), fixed_clock, okay)
#define STM32_LSE_ENABLED 1
#define STM32_LSE_FREQ DT_PROP(DT_NODELABEL(clk_lse), clock_frequency)
#define STM32_LSE_DRIVING 0
#define STM32_LSE_BYPASS DT_PROP(DT_NODELABEL(clk_lse), lse_bypass)
#elif DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_lse), st_stm32_lse_clock, okay)
#define STM32_LSE_ENABLED 1
#define STM32_LSE_FREQ DT_PROP(DT_NODELABEL(clk_lse), clock_frequency)
#define STM32_LSE_DRIVING DT_PROP(DT_NODELABEL(clk_lse), driving_capability)
#define STM32_LSE_BYPASS DT_PROP(DT_NODELABEL(clk_lse), lse_bypass)
#else
#define STM32_LSE_ENABLED 0
#define STM32_LSE_FREQ 0
#define STM32_LSE_DRIVING 0
#define STM32_LSE_BYPASS 0
#endif
#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_msi), st_stm32_msi_clock, okay) || \
DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_msi), st_stm32l0_msi_clock, okay)
#define STM32_MSI_ENABLED 1
#define STM32_MSI_RANGE DT_PROP(DT_NODELABEL(clk_msi), msi_range)
#endif
#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_msi), st_stm32_msi_clock, okay)
#define STM32_MSI_ENABLED 1
#define STM32_MSI_PLL_MODE DT_PROP(DT_NODELABEL(clk_msi), msi_pll_mode)
#endif
#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_msis), st_stm32u5_msi_clock, okay)
#define STM32_MSIS_ENABLED 1
#define STM32_MSIS_RANGE DT_PROP(DT_NODELABEL(clk_msis), msi_range)
#define STM32_MSIS_PLL_MODE DT_PROP(DT_NODELABEL(clk_msis), msi_pll_mode)
#else
#define STM32_MSIS_ENABLED 0
#define STM32_MSIS_RANGE 0
#define STM32_MSIS_PLL_MODE 0
#endif
#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_msik), st_stm32u5_msi_clock, okay)
#define STM32_MSIK_ENABLED 1
#define STM32_MSIK_RANGE DT_PROP(DT_NODELABEL(clk_msik), msi_range)
#define STM32_MSIK_PLL_MODE DT_PROP(DT_NODELABEL(clk_msik), msi_pll_mode)
#else
#define STM32_MSIK_ENABLED 0
#define STM32_MSIK_RANGE 0
#define STM32_MSIK_PLL_MODE 0
#endif
#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_csi), fixed_clock, okay)
#define STM32_CSI_ENABLED 1
#define STM32_CSI_FREQ DT_PROP(DT_NODELABEL(clk_csi), clock_frequency)
#else
#define STM32_CSI_FREQ 0
#endif
#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_lsi), fixed_clock, okay)
#define STM32_LSI_ENABLED 1
#define STM32_LSI_FREQ DT_PROP(DT_NODELABEL(clk_lsi), clock_frequency)
#elif DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_lsi1), fixed_clock, okay)
#define STM32_LSI_ENABLED 1
#define STM32_LSI_FREQ DT_PROP(DT_NODELABEL(clk_lsi1), clock_frequency)
#elif DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_lsi2), fixed_clock, okay)
#define STM32_LSI_ENABLED 1
#define STM32_LSI_FREQ DT_PROP(DT_NODELABEL(clk_lsi2), clock_frequency)
#else
#define STM32_LSI_FREQ 0
#endif
#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_hsi), fixed_clock, okay)
#define STM32_HSI_DIV_ENABLED 0
#define STM32_HSI_ENABLED 1
#define STM32_HSI_FREQ DT_PROP(DT_NODELABEL(clk_hsi), clock_frequency)
#elif DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_hsi), st_stm32h7_hsi_clock, okay) \
|| DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_hsi), st_stm32g0_hsi_clock, okay) \
|| DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_hsi), st_stm32c0_hsi_clock, okay)
#define STM32_HSI_DIV_ENABLED 1
#define STM32_HSI_ENABLED 1
#define STM32_HSI_DIVISOR DT_PROP(DT_NODELABEL(clk_hsi), hsi_div)
#define STM32_HSI_FREQ DT_PROP(DT_NODELABEL(clk_hsi), clock_frequency)
#else
#define STM32_HSI_DIV_ENABLED 0
#define STM32_HSI_DIVISOR 1
#define STM32_HSI_FREQ 0
#endif
#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_hse), fixed_clock, okay)
#define STM32_HSE_ENABLED 1
#define STM32_HSE_FREQ DT_PROP(DT_NODELABEL(clk_hse), clock_frequency)
#elif DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_hse), st_stm32_hse_clock, okay)
#define STM32_HSE_ENABLED 1
#define STM32_HSE_BYPASS DT_PROP(DT_NODELABEL(clk_hse), hse_bypass)
#define STM32_HSE_FREQ DT_PROP(DT_NODELABEL(clk_hse), clock_frequency)
#define STM32_HSE_CSS DT_PROP(DT_NODELABEL(clk_hse), css_enabled)
#elif DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_hse), st_stm32wl_hse_clock, okay)
#define STM32_HSE_ENABLED 1
#define STM32_HSE_TCXO DT_PROP(DT_NODELABEL(clk_hse), hse_tcxo)
#define STM32_HSE_DIV2 DT_PROP(DT_NODELABEL(clk_hse), hse_div2)
#define STM32_HSE_FREQ DT_PROP(DT_NODELABEL(clk_hse), clock_frequency)
#elif DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_hse), st_stm32wba_hse_clock, okay)
#define STM32_HSE_ENABLED 1
#define STM32_HSE_DIV2 DT_PROP(DT_NODELABEL(clk_hse), hse_div2)
#define STM32_HSE_FREQ DT_PROP(DT_NODELABEL(clk_hse), clock_frequency)
#else
#define STM32_HSE_FREQ 0
#endif
#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_hsi48), fixed_clock, okay)
#define STM32_HSI48_ENABLED 1
#define STM32_HSI48_FREQ DT_PROP(DT_NODELABEL(clk_hsi48), clock_frequency)
#elif DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(clk_hsi48), st_stm32_hsi48_clock, okay)
#define STM32_HSI48_ENABLED 1
#define STM32_HSI48_FREQ DT_PROP(DT_NODELABEL(clk_hsi48), clock_frequency)
#define STM32_HSI48_CRS_USB_SOF DT_PROP(DT_NODELABEL(clk_hsi48), crs_usb_sof)
#endif
#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(perck), st_stm32_clock_mux, okay)
#define STM32_CKPER_ENABLED 1
#endif
/** Driver structure definition */
struct stm32_pclken {
uint32_t bus;
uint32_t enr;
};
/** Device tree clocks helpers */
#define STM32_CLOCK_INFO(clk_index, node_id) \
{ \
.enr = DT_CLOCKS_CELL_BY_IDX(node_id, clk_index, bits), \
.bus = DT_CLOCKS_CELL_BY_IDX(node_id, clk_index, bus) \
}
#define STM32_DT_CLOCKS(node_id) \
{ \
LISTIFY(DT_NUM_CLOCKS(node_id), \
STM32_CLOCK_INFO, (,), node_id) \
}
#define STM32_DT_INST_CLOCKS(inst) \
STM32_DT_CLOCKS(DT_DRV_INST(inst))
#define STM32_DOMAIN_CLOCK_INST_SUPPORT(inst) DT_INST_CLOCKS_HAS_IDX(inst, 1) ||
#define STM32_DT_INST_DEV_DOMAIN_CLOCK_SUPPORT \
(DT_INST_FOREACH_STATUS_OKAY(STM32_DOMAIN_CLOCK_INST_SUPPORT) 0)
#define STM32_DOMAIN_CLOCK_SUPPORT(id) DT_CLOCKS_HAS_IDX(DT_NODELABEL(id), 1) ||
#define STM32_DT_DEV_DOMAIN_CLOCK_SUPPORT \
(DT_FOREACH_STATUS_OKAY(STM32_DOMAIN_CLOCK_SUPPORT) 0)
/** Clock source binding accessors */
/**
* @brief Obtain register field from clock configuration.
*
* @param clock clock bit field value.
*/
#define STM32_CLOCK_REG_GET(clock) \
(((clock) >> STM32_CLOCK_REG_SHIFT) & STM32_CLOCK_REG_MASK)
/**
* @brief Obtain position field from clock configuration.
*
* @param clock Clock bit field value.
*/
#define STM32_CLOCK_SHIFT_GET(clock) \
(((clock) >> STM32_CLOCK_SHIFT_SHIFT) & STM32_CLOCK_SHIFT_MASK)
/**
* @brief Obtain mask field from clock configuration.
*
* @param clock Clock bit field value.
*/
#define STM32_CLOCK_MASK_GET(clock) \
(((clock) >> STM32_CLOCK_MASK_SHIFT) & STM32_CLOCK_MASK_MASK)
/**
* @brief Obtain value field from clock configuration.
*
* @param clock Clock bit field value.
*/
#define STM32_CLOCK_VAL_GET(clock) \
(((clock) >> STM32_CLOCK_VAL_SHIFT) & STM32_CLOCK_VAL_MASK)
#if defined(STM32_HSE_CSS)
/**
* @brief Called if the HSE clock security system detects a clock fault.
*
* The function is called in interrupt context.
*
* The default (weakly-linked) implementation does nothing and should be
* overridden.
*/
void stm32_hse_css_callback(void);
#endif
#endif /* ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_STM32_CLOCK_CONTROL_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/clock_control/stm32_clock_control.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 6,615 |
```objective-c
/**
* @file
*
* @brief Backend API for emulated ADC
*/
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_ADC_ADC_EMUL_H_
#define ZEPHYR_INCLUDE_DRIVERS_ADC_ADC_EMUL_H_
#include <zephyr/types.h>
#include <zephyr/drivers/adc.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Emulated ADC backend API
* @defgroup adc_emul Emulated ADC
* @ingroup adc_interface
* @{
*
* Behaviour of emulated ADC is application-defined. As-such, each
* application may
*
* - define a Device Tree overlay file to indicate the number of ADC
* controllers as well as the number of channels for each controller
* - set default reference voltages in Device Tree or using
* @ref adc_emul_ref_voltage_set
* - asynchronously call @ref adc_emul_const_value_set in order to set
* constant mV value on emulated ADC input
* - asynchronously call @ref adc_emul_value_func_set in order to assign
* function which will be used to obtain voltage on emulated ADC input
*
* An example of an appropriate Device Tree overlay file is in
* tests/drivers/adc/adc_api/boards/native_sim.overlay
*
* An example of using emulated ADC backend API is in the file
* tests/drivers/adc/adc_emul/src/main.c
*/
/**
* @brief Type definition of the function which is used to obtain ADC
* mV input values
*
* @param dev Pointer to the device structure for the driver instance
* @param chan ADC channel to sample
* @param data User data which was passed on @ref adc_emul_value_func_set
* @param result The result value which will be set as input for ADC @p chan
*
* @return 0 on success
* @return other as error code which ends ADC context
*/
typedef int (*adc_emul_value_func)(const struct device *dev, unsigned int chan,
void *data, uint32_t *result);
/**
* @brief Set constant mV value input for emulated ADC @p chan
*
* @param dev The emulated ADC device
* @param chan The channel of ADC which input is assigned
* @param value New voltage in mV to assign to @p chan input
*
* @return 0 on success
* @return -EINVAL if an invalid argument is provided
*/
int adc_emul_const_value_set(const struct device *dev, unsigned int chan,
uint32_t value);
/**
* @brief Set function used to obtain voltage for input of emulated
* ADC @p chan
*
* @param dev The emulated ADC device
* @param chan The channel of ADC to which @p func is assigned
* @param func New function to assign to @p chan
* @param data Pointer to data passed to @p func on call
*
* @return 0 on success
* @return -EINVAL if an invalid argument is provided
*/
int adc_emul_value_func_set(const struct device *dev, unsigned int chan,
adc_emul_value_func func, void *data);
/**
* @brief Set reference voltage
*
* @param dev The emulated ADC device
* @param ref Reference config which is changed
* @param value New reference voltage in mV
*
* @return 0 on success
* @return -EINVAL if an invalid argument is provided
*/
int adc_emul_ref_voltage_set(const struct device *dev, enum adc_reference ref,
uint16_t value);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* ZEPHYR_INCLUDE_DRIVERS_ADC_ADC_EMUL_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/adc/adc_emul.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 785 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_ADC_CURRENT_SENSE_AMPLIFIER_H_
#define ZEPHYR_INCLUDE_DRIVERS_ADC_CURRENT_SENSE_AMPLIFIER_H_
#include <zephyr/drivers/adc.h>
#include <zephyr/drivers/gpio.h>
struct current_sense_amplifier_dt_spec {
const struct adc_dt_spec port;
uint32_t sense_micro_ohms;
uint32_t sense_gain_mult;
uint32_t sense_gain_div;
struct gpio_dt_spec power_gpio;
};
/**
* @brief Get current sensor information from devicetree.
*
* This returns a static initializer for a @p current_sense_amplifier_dt_spec structure
* given a devicetree node.
*
* @param node_id Devicetree node identifier.
*
* @return Static initializer for an current_sense_amplifier_dt_spec structure.
*/
#define CURRENT_SENSE_AMPLIFIER_DT_SPEC_GET(node_id) \
{ \
.port = ADC_DT_SPEC_GET(node_id), \
.sense_micro_ohms = DT_PROP(node_id, sense_resistor_micro_ohms), \
.sense_gain_mult = DT_PROP(node_id, sense_gain_mult), \
.sense_gain_div = DT_PROP(node_id, sense_gain_div), \
.power_gpio = GPIO_DT_SPEC_GET_OR(node_id, power_gpios, {0}), \
}
/**
* @brief Calculates the actual amperage from the measured voltage
*
* @param[in] spec current sensor specification from Devicetree.
* @param[in,out] v_to_i Pointer to the measured voltage in millivolts on input, and the
* corresponding scaled current value in milliamps on output.
*/
static inline void
current_sense_amplifier_scale_dt(const struct current_sense_amplifier_dt_spec *spec,
int32_t *v_to_i)
{
/* store in a temporary 64 bit variable to prevent overflow during calculation */
int64_t tmp = *v_to_i;
/* multiplies by 1,000,000 before dividing by sense resistance in micro-ohms. */
tmp = tmp * 1000000 / spec->sense_micro_ohms * spec->sense_gain_div / spec->sense_gain_mult;
*v_to_i = (int32_t)tmp;
}
#endif /* ZEPHYR_INCLUDE_DRIVERS_ADC_CURRENT_SENSE_AMPLIFIER_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/adc/current_sense_amplifier.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 510 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_ADC_ADS114S0X_H_
#define ZEPHYR_INCLUDE_DRIVERS_ADC_ADS114S0X_H_
#include <zephyr/device.h>
#include <zephyr/drivers/gpio.h>
int ads114s0x_gpio_set_output(const struct device *dev, uint8_t pin, bool initial_value);
int ads114s0x_gpio_set_input(const struct device *dev, uint8_t pin);
int ads114s0x_gpio_deconfigure(const struct device *dev, uint8_t pin);
int ads114s0x_gpio_set_pin_value(const struct device *dev, uint8_t pin,
bool value);
int ads114s0x_gpio_get_pin_value(const struct device *dev, uint8_t pin,
bool *value);
int ads114s0x_gpio_port_get_raw(const struct device *dev,
gpio_port_value_t *value);
int ads114s0x_gpio_port_set_masked_raw(const struct device *dev,
gpio_port_pins_t mask,
gpio_port_value_t value);
int ads114s0x_gpio_port_toggle_bits(const struct device *dev,
gpio_port_pins_t pins);
#endif /* ZEPHYR_INCLUDE_DRIVERS_ADC_ADS114S0X_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/adc/ads114s0x.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 268 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_PM_CPU_OPS_PSCI_H_
#define ZEPHYR_INCLUDE_DRIVERS_PM_CPU_OPS_PSCI_H_
#include <zephyr/types.h>
#include <zephyr/arch/arm64/arm-smccc.h>
#include <stddef.h>
#include <zephyr/device.h>
#ifdef __cplusplus
extern "C" {
#endif
/* PSCI version decoding (independent of PSCI version) */
#define PSCI_VERSION_MAJOR_SHIFT 16
#define PSCI_VERSION_MINOR_MASK \
((1U << PSCI_VERSION_MAJOR_SHIFT) - 1)
#define PSCI_VERSION_MAJOR_MASK ~PSCI_VERSION_MINOR_MASK
#define PSCI_VERSION_MAJOR(ver) \
(((ver) & PSCI_VERSION_MAJOR_MASK) >> PSCI_VERSION_MAJOR_SHIFT)
#define PSCI_VERSION_MINOR(ver) \
((ver) & PSCI_VERSION_MINOR_MASK)
uint32_t psci_version(void);
#ifdef __cplusplus
}
#endif
#endif /* ZEPHYR_INCLUDE_DRIVERS_PM_CPU_OPS_PSCI_H_ */
``` | /content/code_sandbox/include/zephyr/drivers/pm_cpu_ops/psci.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 229 |
```objective-c
/*
*
*/
/*
* This library uses CMUX to create multiple data channels, called DLCIs, on a single serial bus.
* Each DLCI has an address from 1 to 63. DLCI address 0 is reserved for control commands.
*
* Design overview:
*
* DLCI1 <-----------+ +-------> DLCI1
* v v
* DLCI2 <---> CMUX instance <--> Serial bus <--> Client <--> DLCI2
* ^ ^
* DLCI3 <-----------+ +-------> DLCI3
*
* Writing to and from the CMUX instances is done using the modem_pipe API.
*/
#include <zephyr/kernel.h>
#include <zephyr/types.h>
#include <zephyr/sys/ring_buffer.h>
#include <zephyr/sys/atomic.h>
#include <zephyr/modem/pipe.h>
#include <zephyr/modem/stats.h>
#ifndef ZEPHYR_MODEM_CMUX_
#define ZEPHYR_MODEM_CMUX_
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Modem CMUX
* @defgroup modem_cmux Modem CMUX
* @ingroup modem
* @{
*/
struct modem_cmux;
enum modem_cmux_event {
MODEM_CMUX_EVENT_CONNECTED = 0,
MODEM_CMUX_EVENT_DISCONNECTED,
};
typedef void (*modem_cmux_callback)(struct modem_cmux *cmux, enum modem_cmux_event event,
void *user_data);
/**
* @cond INTERNAL_HIDDEN
*/
enum modem_cmux_state {
MODEM_CMUX_STATE_DISCONNECTED = 0,
MODEM_CMUX_STATE_CONNECTING,
MODEM_CMUX_STATE_CONNECTED,
MODEM_CMUX_STATE_DISCONNECTING,
};
enum modem_cmux_receive_state {
MODEM_CMUX_RECEIVE_STATE_SOF = 0,
MODEM_CMUX_RECEIVE_STATE_RESYNC,
MODEM_CMUX_RECEIVE_STATE_ADDRESS,
MODEM_CMUX_RECEIVE_STATE_ADDRESS_CONT,
MODEM_CMUX_RECEIVE_STATE_CONTROL,
MODEM_CMUX_RECEIVE_STATE_LENGTH,
MODEM_CMUX_RECEIVE_STATE_LENGTH_CONT,
MODEM_CMUX_RECEIVE_STATE_DATA,
MODEM_CMUX_RECEIVE_STATE_FCS,
MODEM_CMUX_RECEIVE_STATE_DROP,
MODEM_CMUX_RECEIVE_STATE_EOF,
};
enum modem_cmux_dlci_state {
MODEM_CMUX_DLCI_STATE_CLOSED,
MODEM_CMUX_DLCI_STATE_OPENING,
MODEM_CMUX_DLCI_STATE_OPEN,
MODEM_CMUX_DLCI_STATE_CLOSING,
};
struct modem_cmux_dlci {
sys_snode_t node;
/* Pipe */
struct modem_pipe pipe;
/* Context */
uint16_t dlci_address;
struct modem_cmux *cmux;
/* Receive buffer */
struct ring_buf receive_rb;
struct k_mutex receive_rb_lock;
/* Work */
struct k_work_delayable open_work;
struct k_work_delayable close_work;
/* State */
enum modem_cmux_dlci_state state;
/* Statistics */
#if CONFIG_MODEM_STATS
struct modem_stats_buffer receive_buf_stats;
#endif
};
struct modem_cmux_frame {
uint8_t dlci_address;
bool cr;
bool pf;
uint8_t type;
const uint8_t *data;
uint16_t data_len;
};
struct modem_cmux_work {
struct k_work_delayable dwork;
struct modem_cmux *cmux;
};
struct modem_cmux {
/* Bus pipe */
struct modem_pipe *pipe;
/* Event handler */
modem_cmux_callback callback;
void *user_data;
/* DLCI channel contexts */
sys_slist_t dlcis;
/* State */
enum modem_cmux_state state;
bool flow_control_on;
/* Work lock */
bool attached;
struct k_spinlock work_lock;
/* Receive state*/
enum modem_cmux_receive_state receive_state;
/* Receive buffer */
uint8_t *receive_buf;
uint16_t receive_buf_size;
uint16_t receive_buf_len;
uint8_t work_buf[CONFIG_MODEM_CMUX_WORK_BUFFER_SIZE];
/* Transmit buffer */
struct ring_buf transmit_rb;
struct k_mutex transmit_rb_lock;
/* Received frame */
struct modem_cmux_frame frame;
uint8_t frame_header[5];
uint16_t frame_header_len;
/* Work */
struct k_work_delayable receive_work;
struct k_work_delayable transmit_work;
struct k_work_delayable connect_work;
struct k_work_delayable disconnect_work;
/* Synchronize actions */
struct k_event event;
/* Statistics */
#if CONFIG_MODEM_STATS
struct modem_stats_buffer receive_buf_stats;
struct modem_stats_buffer transmit_buf_stats;
#endif
};
/**
* @endcond
*/
/**
* @brief Contains CMUX instance configuration data
*/
struct modem_cmux_config {
/** Invoked when event occurs */
modem_cmux_callback callback;
/** Free to use pointer passed to event handler when invoked */
void *user_data;
/** Receive buffer */
uint8_t *receive_buf;
/** Size of receive buffer in bytes [127, ...] */
uint16_t receive_buf_size;
/** Transmit buffer */
uint8_t *transmit_buf;
/** Size of transmit buffer in bytes [149, ...] */
uint16_t transmit_buf_size;
};
/**
* @brief Initialize CMUX instance
* @param cmux CMUX instance
* @param config Configuration to apply to CMUX instance
*/
void modem_cmux_init(struct modem_cmux *cmux, const struct modem_cmux_config *config);
/**
* @brief CMUX DLCI configuration
*/
struct modem_cmux_dlci_config {
/** DLCI channel address */
uint8_t dlci_address;
/** Receive buffer used by pipe */
uint8_t *receive_buf;
/** Size of receive buffer used by pipe [127, ...] */
uint16_t receive_buf_size;
};
/**
* @brief Initialize DLCI instance and register it with CMUX instance
*
* @param cmux CMUX instance which the DLCI will be registered to
* @param dlci DLCI instance which will be registered and configured
* @param config Configuration to apply to DLCI instance
*/
struct modem_pipe *modem_cmux_dlci_init(struct modem_cmux *cmux, struct modem_cmux_dlci *dlci,
const struct modem_cmux_dlci_config *config);
/**
* @brief Attach CMUX instance to pipe
*
* @param cmux CMUX instance
* @param pipe Pipe instance to attach CMUX instance to
*/
int modem_cmux_attach(struct modem_cmux *cmux, struct modem_pipe *pipe);
/**
* @brief Connect CMUX instance
*
* @details This will send a CMUX connect request to target on the serial bus. If successful,
* DLCI channels can be now be opened using modem_pipe_open()
*
* @param cmux CMUX instance
*
* @note When connected, the bus pipe must not be used directly
*/
int modem_cmux_connect(struct modem_cmux *cmux);
/**
* @brief Connect CMUX instance asynchronously
*
* @details This will send a CMUX connect request to target on the serial bus. If successful,
* DLCI channels can be now be opened using modem_pipe_open().
*
* @param cmux CMUX instance
*
* @note When connected, the bus pipe must not be used directly
*/
int modem_cmux_connect_async(struct modem_cmux *cmux);
/**
* @brief Close down and disconnect CMUX instance
*
* @details This will close all open DLCI channels, and close down the CMUX connection.
*
* @param cmux CMUX instance
*
* @note The bus pipe must be released using modem_cmux_release() after disconnecting
* before being reused.
*/
int modem_cmux_disconnect(struct modem_cmux *cmux);
/**
* @brief Close down and disconnect CMUX instance asynchronously
*
* @details This will close all open DLCI channels, and close down the CMUX connection.
*
* @param cmux CMUX instance
*
* @note The bus pipe must be released using modem_cmux_release() after disconnecting
* before being reused.
*/
int modem_cmux_disconnect_async(struct modem_cmux *cmux);
/**
* @brief Release CMUX instance from pipe
*
* @details Releases the pipe and hard resets the CMUX instance internally. CMUX should
* be disconnected using modem_cmux_disconnect().
*
* @param cmux CMUX instance
*
* @note The bus pipe can be used directly again after CMUX instance is released.
*/
void modem_cmux_release(struct modem_cmux *cmux);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* ZEPHYR_MODEM_CMUX_ */
``` | /content/code_sandbox/include/zephyr/modem/cmux.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,838 |
```objective-c
/*
*
*/
#include <zephyr/modem/pipe.h>
#include <zephyr/devicetree.h>
#include <zephyr/sys/util.h>
#ifndef ZEPHYR_MODEM_PIPELINK_
#define ZEPHYR_MODEM_PIPELINK_
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Modem pipelink
* @defgroup modem_pipelink Modem pipelink
* @ingroup modem
* @{
*/
/** Pipelink event */
enum modem_pipelink_event {
/** Modem pipe has been connected and can be opened */
MODEM_PIPELINK_EVENT_CONNECTED = 0,
/** Modem pipe has been disconnected and can't be opened */
MODEM_PIPELINK_EVENT_DISCONNECTED,
};
/** @cond INTERNAL_HIDDEN */
/** Forward declaration */
struct modem_pipelink;
/** @endcond */
/**
* @brief Pipelink callback definition
* @param link Modem pipelink instance
* @param event Modem pipelink event
* @param user_data User data passed to modem_pipelink_attach()
*/
typedef void (*modem_pipelink_callback)(struct modem_pipelink *link,
enum modem_pipelink_event event,
void *user_data);
/** @cond INTERNAL_HIDDEN */
/** Pipelink structure */
struct modem_pipelink {
struct modem_pipe *pipe;
modem_pipelink_callback callback;
void *user_data;
bool connected;
struct k_spinlock spinlock;
};
/** @endcond */
/**
* @brief Attach callback to pipelink
* @param link Pipelink instance
* @param callback Pipelink callback
* @param user_data User data passed to pipelink callback
*/
void modem_pipelink_attach(struct modem_pipelink *link,
modem_pipelink_callback callback,
void *user_data);
/**
* @brief Check whether pipelink pipe is connected
* @param link Pipelink instance
* @retval true if pipe is connected
* @retval false if pipe is not connected
*/
bool modem_pipelink_is_connected(struct modem_pipelink *link);
/**
* @brief Get pipe from pipelink
* @param link Pipelink instance
* @retval Pointer to pipe if pipelink has been initialized
* @retval NULL if pipelink has not been initialized
*/
struct modem_pipe *modem_pipelink_get_pipe(struct modem_pipelink *link);
/**
* @brief Clear callback
* @param link Pipelink instance
*/
void modem_pipelink_release(struct modem_pipelink *link);
/** @cond INTERNAL_HIDDEN */
/** Initialize modem pipelink */
void modem_pipelink_init(struct modem_pipelink *link, struct modem_pipe *pipe);
/** Notify user of pipelink that pipe has been connected */
void modem_pipelink_notify_connected(struct modem_pipelink *link);
/** Notify user of pipelink that pipe has been disconnected */
void modem_pipelink_notify_disconnected(struct modem_pipelink *link);
/** @endcond */
/** @cond INTERNAL_HIDDEN */
/**
* @brief Synthesize pipelink symbol from devicetree node identifier and name
* @param node_id Devicetree node identifier
* @param name Pipelink name
*/
#define MODEM_PIPELINK_DT_SYM(node_id, name) \
_CONCAT_4(__modem_pipelink_, DT_DEP_ORD(node_id), _, name)
/** @endcond */
/**
* @brief Declare pipelink from devicetree node identifier and name
* @param node_id Devicetree node identifier
* @param name Pipelink name
*/
#define MODEM_PIPELINK_DT_DECLARE(node_id, name) \
extern struct modem_pipelink MODEM_PIPELINK_DT_SYM(node_id, name)
/**
* @brief Define pipelink from devicetree node identifier and name
* @param node_id Devicetree node identifier
* @param name Pipelink name
*/
#define MODEM_PIPELINK_DT_DEFINE(node_id, name) \
struct modem_pipelink MODEM_PIPELINK_DT_SYM(node_id, name)
/**
* @brief Get pointer to pipelink from devicetree node identifier and name
* @param node_id Devicetree node identifier
* @param name Pipelink name
*/
#define MODEM_PIPELINK_DT_GET(node_id, name) \
(&MODEM_PIPELINK_DT_SYM(node_id, name))
/**
* @brief Device driver instance variants of MODEM_PIPELINK_DT macros
* @name MODEM_PIPELINK_DT_INST macros
* @anchor MODEM_PIPELINK_DT_INST
* @{
*/
#define MODEM_PIPELINK_DT_INST_DECLARE(inst, name) \
MODEM_PIPELINK_DT_DECLARE(DT_DRV_INST(inst), name)
#define MODEM_PIPELINK_DT_INST_DEFINE(inst, name) \
MODEM_PIPELINK_DT_DEFINE(DT_DRV_INST(inst), name)
#define MODEM_PIPELINK_DT_INST_GET(inst, name) \
MODEM_PIPELINK_DT_GET(DT_DRV_INST(inst), name)
/** @} */
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* ZEPHYR_MODEM_PIPELINK_ */
``` | /content/code_sandbox/include/zephyr/modem/pipelink.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,079 |
```objective-c
/*
*
*/
#include <zephyr/kernel.h>
#include <zephyr/types.h>
#include <zephyr/device.h>
#include <zephyr/sys/ring_buffer.h>
#include <zephyr/modem/pipe.h>
#include <zephyr/modem/stats.h>
#ifndef ZEPHYR_MODEM_CHAT_
#define ZEPHYR_MODEM_CHAT_
#ifdef __cplusplus
extern "C" {
#endif
struct modem_chat;
/**
* @brief Callback called when matching chat is received
*
* @param chat Pointer to chat instance instance
* @param argv Pointer to array of parsed arguments
* @param argc Number of parsed arguments, arg 0 holds the exact match
* @param user_data Free to use user data set during modem_chat_init()
*/
typedef void (*modem_chat_match_callback)(struct modem_chat *chat, char **argv, uint16_t argc,
void *user_data);
/**
* @brief Modem chat match
*/
struct modem_chat_match {
/** Match array */
const uint8_t *match;
/** Size of match */
uint8_t match_size;
/** Separators array */
const uint8_t *separators;
/** Size of separators array */
uint8_t separators_size;
/** Set if modem chat instance shall use wildcards when matching */
bool wildcards;
/** Set if script shall not continue to next step in case of match */
bool partial;
/** Type of modem chat instance */
modem_chat_match_callback callback;
};
#define MODEM_CHAT_MATCH(_match, _separators, _callback) \
{ \
.match = (uint8_t *)(_match), .match_size = (uint8_t)(sizeof(_match) - 1), \
.separators = (uint8_t *)(_separators), \
.separators_size = (uint8_t)(sizeof(_separators) - 1), .wildcards = false, \
.callback = _callback, \
}
#define MODEM_CHAT_MATCH_WILDCARD(_match, _separators, _callback) \
{ \
.match = (uint8_t *)(_match), .match_size = (uint8_t)(sizeof(_match) - 1), \
.separators = (uint8_t *)(_separators), \
.separators_size = (uint8_t)(sizeof(_separators) - 1), .wildcards = true, \
.callback = _callback, \
}
#define MODEM_CHAT_MATCH_INITIALIZER(_match, _separators, _callback, _wildcards, _partial) \
{ \
.match = (uint8_t *)(_match), \
.match_size = (uint8_t)(sizeof(_match) - 1), \
.separators = (uint8_t *)(_separators), \
.separators_size = (uint8_t)(sizeof(_separators) - 1), \
.wildcards = _wildcards, \
.partial = _partial, \
.callback = _callback, \
}
#define MODEM_CHAT_MATCH_DEFINE(_sym, _match, _separators, _callback) \
const static struct modem_chat_match _sym = MODEM_CHAT_MATCH(_match, _separators, _callback)
/* Helper struct to match any response without callback. */
extern const struct modem_chat_match modem_chat_any_match;
#define MODEM_CHAT_MATCHES_DEFINE(_sym, ...) \
const static struct modem_chat_match _sym[] = {__VA_ARGS__}
/* Helper struct to match nothing. */
extern const struct modem_chat_match modem_chat_empty_matches[0];
/**
* @brief Modem chat script chat
*/
struct modem_chat_script_chat {
/** Request to send to modem */
const uint8_t *request;
/** Size of request */
uint16_t request_size;
/** Expected responses to request */
const struct modem_chat_match *response_matches;
/** Number of elements in expected responses */
uint16_t response_matches_size;
/** Timeout before chat script may continue to next step in milliseconds */
uint16_t timeout;
};
#define MODEM_CHAT_SCRIPT_CMD_RESP(_request, _response_match) \
{ \
.request = (uint8_t *)(_request), \
.request_size = (uint16_t)(sizeof(_request) - 1), \
.response_matches = &_response_match, \
.response_matches_size = 1, \
.timeout = 0, \
}
#define MODEM_CHAT_SCRIPT_CMD_RESP_MULT(_request, _response_matches) \
{ \
.request = (uint8_t *)(_request), \
.request_size = (uint16_t)(sizeof(_request) - 1), \
.response_matches = _response_matches, \
.response_matches_size = ARRAY_SIZE(_response_matches), \
.timeout = 0, \
}
#define MODEM_CHAT_SCRIPT_CMD_RESP_NONE(_request, _timeout_ms) \
{ \
.request = (uint8_t *)(_request), \
.request_size = (uint16_t)(sizeof(_request) - 1), \
.response_matches = NULL, \
.response_matches_size = 0, \
.timeout = _timeout_ms, \
}
#define MODEM_CHAT_SCRIPT_CMDS_DEFINE(_sym, ...) \
const struct modem_chat_script_chat _sym[] = {__VA_ARGS__}
/* Helper struct to have no chat script command. */
extern const struct modem_chat_script_chat modem_chat_empty_script_chats[0];
enum modem_chat_script_result {
MODEM_CHAT_SCRIPT_RESULT_SUCCESS,
MODEM_CHAT_SCRIPT_RESULT_ABORT,
MODEM_CHAT_SCRIPT_RESULT_TIMEOUT
};
/**
* @brief Callback called when script chat is received
*
* @param chat Pointer to chat instance instance
* @param result Result of script execution
* @param user_data Free to use user data set during modem_chat_init()
*/
typedef void (*modem_chat_script_callback)(struct modem_chat *chat,
enum modem_chat_script_result result, void *user_data);
/**
* @brief Modem chat script
*/
struct modem_chat_script {
/** Name of script */
const char *name;
/** Array of script chats */
const struct modem_chat_script_chat *script_chats;
/** Elements in array of script chats */
uint16_t script_chats_size;
/** Array of abort matches */
const struct modem_chat_match *abort_matches;
/** Number of elements in array of abort matches */
uint16_t abort_matches_size;
/** Callback called when script execution terminates */
modem_chat_script_callback callback;
/** Timeout in seconds within which the script execution must terminate */
uint32_t timeout;
};
#define MODEM_CHAT_SCRIPT_DEFINE(_sym, _script_chats, _abort_matches, _callback, _timeout_s) \
const static struct modem_chat_script _sym = { \
.name = #_sym, \
.script_chats = _script_chats, \
.script_chats_size = ARRAY_SIZE(_script_chats), \
.abort_matches = _abort_matches, \
.abort_matches_size = ARRAY_SIZE(_abort_matches), \
.callback = _callback, \
.timeout = _timeout_s, \
}
#define MODEM_CHAT_SCRIPT_NO_ABORT_DEFINE(_sym, _script_chats, _callback, _timeout_s) \
MODEM_CHAT_SCRIPT_DEFINE(_sym, _script_chats, modem_chat_empty_matches, \
_callback, _timeout_s)
#define MODEM_CHAT_SCRIPT_EMPTY_DEFINE(_sym) \
MODEM_CHAT_SCRIPT_NO_ABORT_DEFINE(_sym, modem_chat_empty_script_chats, NULL, 0)
enum modem_chat_script_send_state {
/* No data to send */
MODEM_CHAT_SCRIPT_SEND_STATE_IDLE,
/* Sending request */
MODEM_CHAT_SCRIPT_SEND_STATE_REQUEST,
/* Sending delimiter */
MODEM_CHAT_SCRIPT_SEND_STATE_DELIMITER,
};
/**
* @brief Chat instance internal context
* @warning Do not modify any members of this struct directly
*/
struct modem_chat {
/* Pipe used to send and receive data */
struct modem_pipe *pipe;
/* User data passed with match callbacks */
void *user_data;
/* Receive buffer */
uint8_t *receive_buf;
uint16_t receive_buf_size;
uint16_t receive_buf_len;
/* Work buffer */
uint8_t work_buf[32];
uint16_t work_buf_len;
/* Chat delimiter */
uint8_t *delimiter;
uint16_t delimiter_size;
uint16_t delimiter_match_len;
/* Array of bytes which are discarded out by parser */
uint8_t *filter;
uint16_t filter_size;
/* Parsed arguments */
uint8_t **argv;
uint16_t argv_size;
uint16_t argc;
/* Matches
* Index 0 -> Response matches
* Index 1 -> Abort matches
* Index 2 -> Unsolicited matches
*/
const struct modem_chat_match *matches[3];
uint16_t matches_size[3];
/* Script execution */
const struct modem_chat_script *script;
const struct modem_chat_script *pending_script;
struct k_work script_run_work;
struct k_work_delayable script_timeout_work;
struct k_work script_abort_work;
uint16_t script_chat_it;
atomic_t script_state;
enum modem_chat_script_result script_result;
struct k_sem script_stopped_sem;
/* Script sending */
enum modem_chat_script_send_state script_send_state;
uint16_t script_send_pos;
struct k_work script_send_work;
struct k_work_delayable script_send_timeout_work;
/* Match parsing */
const struct modem_chat_match *parse_match;
uint16_t parse_match_len;
uint16_t parse_arg_len;
uint16_t parse_match_type;
/* Process received data */
struct k_work receive_work;
/* Statistics */
#if CONFIG_MODEM_STATS
struct modem_stats_buffer receive_buf_stats;
struct modem_stats_buffer work_buf_stats;
#endif
};
/**
* @brief Chat configuration
*/
struct modem_chat_config {
/** Free to use user data passed with modem match callbacks */
void *user_data;
/** Receive buffer used to store parsed arguments */
uint8_t *receive_buf;
/** Size of receive buffer should be longest line + longest match */
uint16_t receive_buf_size;
/** Delimiter */
uint8_t *delimiter;
/** Size of delimiter */
uint8_t delimiter_size;
/** Bytes which are discarded by parser */
uint8_t *filter;
/** Size of filter */
uint8_t filter_size;
/** Array of pointers used to point to parsed arguments */
uint8_t **argv;
/** Elements in array of pointers */
uint16_t argv_size;
/** Array of unsolicited matches */
const struct modem_chat_match *unsol_matches;
/** Elements in array of unsolicited matches */
uint16_t unsol_matches_size;
};
/**
* @brief Initialize modem pipe chat instance
* @param chat Chat instance
* @param config Configuration which shall be applied to Chat instance
* @note Chat instance must be attached to pipe
*/
int modem_chat_init(struct modem_chat *chat, const struct modem_chat_config *config);
/**
* @brief Attach modem chat instance to pipe
* @param chat Chat instance
* @param pipe Pipe instance to attach Chat instance to
* @returns 0 if successful
* @returns negative errno code if failure
* @note Chat instance is enabled if successful
*/
int modem_chat_attach(struct modem_chat *chat, struct modem_pipe *pipe);
/**
* @brief Run script asynchronously
* @param chat Chat instance
* @param script Script to run
* @returns 0 if script successfully started
* @returns -EBUSY if a script is currently running
* @returns -EPERM if modem pipe is not attached
* @returns -EINVAL if arguments or script is invalid
* @note Script runs asynchronously until complete or aborted.
*/
int modem_chat_run_script_async(struct modem_chat *chat, const struct modem_chat_script *script);
/**
* @brief Run script
* @param chat Chat instance
* @param script Script to run
* @returns 0 if successful
* @returns -EBUSY if a script is currently running
* @returns -EPERM if modem pipe is not attached
* @returns -EINVAL if arguments or script is invalid
* @note Script runs until complete or aborted.
*/
int modem_chat_run_script(struct modem_chat *chat, const struct modem_chat_script *script);
/**
* @brief Run script asynchronously
* @note Function exists for backwards compatibility and should be deprecated
* @param chat Chat instance
* @param script Script to run
* @returns 0 if script successfully started
* @returns -EBUSY if a script is currently running
* @returns -EPERM if modem pipe is not attached
* @returns -EINVAL if arguments or script is invalid
*/
static inline int modem_chat_script_run(struct modem_chat *chat,
const struct modem_chat_script *script)
{
return modem_chat_run_script_async(chat, script);
}
/**
* @brief Abort script
* @param chat Chat instance
*/
void modem_chat_script_abort(struct modem_chat *chat);
/**
* @brief Release pipe from chat instance
* @param chat Chat instance
*/
void modem_chat_release(struct modem_chat *chat);
/**
* @brief Initialize modem chat match
* @param chat_match Modem chat match instance
*/
void modem_chat_match_init(struct modem_chat_match *chat_match);
/**
* @brief Set match of modem chat match instance
* @param chat_match Modem chat match instance
* @param match Match to set
* @note The lifetime of match must match or exceed the lifetime of chat_match
* @warning Always call this API after match is modified
*
* @retval 0 if successful, negative errno code otherwise
*/
int modem_chat_match_set_match(struct modem_chat_match *chat_match, const char *match);
/**
* @brief Set separators of modem chat match instance
* @param chat_match Modem chat match instance
* @param separators Separators to set
* @note The lifetime of separators must match or exceed the lifetime of chat_match
* @warning Always call this API after separators are modified
*
* @retval 0 if successful, negative errno code otherwise
*/
int modem_chat_match_set_separators(struct modem_chat_match *chat_match, const char *separators);
/**
* @brief Set modem chat match callback
* @param chat_match Modem chat match instance
* @param callback Callback to set
*/
void modem_chat_match_set_callback(struct modem_chat_match *chat_match,
modem_chat_match_callback callback);
/**
* @brief Set modem chat match partial flag
* @param chat_match Modem chat match instance
* @param partial Partial flag to set
*/
void modem_chat_match_set_partial(struct modem_chat_match *chat_match, bool partial);
/**
* @brief Set modem chat match wildcards flag
* @param chat_match Modem chat match instance
* @param enable Enable/disable Wildcards
*/
void modem_chat_match_enable_wildcards(struct modem_chat_match *chat_match, bool enable);
/**
* @brief Initialize modem chat script chat
* @param script_chat Modem chat script chat instance
*/
void modem_chat_script_chat_init(struct modem_chat_script_chat *script_chat);
/**
* @brief Set request of modem chat script chat instance
* @param script_chat Modem chat script chat instance
* @param request Request to set
* @note The lifetime of request must match or exceed the lifetime of script_chat
* @warning Always call this API after request is modified
*
* @retval 0 if successful, negative errno code otherwise
*/
int modem_chat_script_chat_set_request(struct modem_chat_script_chat *script_chat,
const char *request);
/**
* @brief Set modem chat script chat matches
* @param script_chat Modem chat script chat instance
* @param response_matches Response match array to set
* @param response_matches_size Size of response match array
* @note The lifetime of response_matches must match or exceed the lifetime of script_chat
*
* @retval 0 if successful, negative errno code otherwise
*/
int modem_chat_script_chat_set_response_matches(struct modem_chat_script_chat *script_chat,
const struct modem_chat_match *response_matches,
uint16_t response_matches_size);
/**
* @brief Set modem chat script chat timeout
* @param script_chat Modem chat script chat instance
* @param timeout_ms Timeout in milliseconds
*/
void modem_chat_script_chat_set_timeout(struct modem_chat_script_chat *script_chat,
uint16_t timeout_ms);
/**
* @brief Initialize modem chat script
* @param script Modem chat script instance
*/
void modem_chat_script_init(struct modem_chat_script *script);
/**
* @brief Set modem chat script name
* @param script Modem chat script instance
* @param name Name to set
* @note The lifetime of name must match or exceed the lifetime of script
*/
void modem_chat_script_set_name(struct modem_chat_script *script, const char *name);
/**
* @brief Set modem chat script chats
* @param script Modem chat script instance
* @param script_chats Chat script array to set
* @param script_chats_size Size of chat script array
* @note The lifetime of script_chats must match or exceed the lifetime of script
*
* @retval 0 if successful, negative errno code otherwise
*/
int modem_chat_script_set_script_chats(struct modem_chat_script *script,
const struct modem_chat_script_chat *script_chats,
uint16_t script_chats_size);
/**
* @brief Set modem chat script abort matches
* @param script Modem chat script instance
* @param abort_matches Abort match array to set
* @param abort_matches_size Size of abort match array
* @note The lifetime of abort_matches must match or exceed the lifetime of script
*
* @retval 0 if successful, negative errno code otherwise
*/
int modem_chat_script_set_abort_matches(struct modem_chat_script *script,
const struct modem_chat_match *abort_matches,
uint16_t abort_matches_size);
/**
* @brief Set modem chat script callback
* @param script Modem chat script instance
* @param callback Callback to set
*/
void modem_chat_script_set_callback(struct modem_chat_script *script,
modem_chat_script_callback callback);
/**
* @brief Set modem chat script timeout
* @param script Modem chat script instance
* @param timeout_s Timeout in seconds
*/
void modem_chat_script_set_timeout(struct modem_chat_script *script, uint32_t timeout_s);
#ifdef __cplusplus
}
#endif
#endif /* ZEPHYR_MODEM_CHAT_ */
``` | /content/code_sandbox/include/zephyr/modem/chat.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 3,955 |
```objective-c
/*
*
*/
#include <zephyr/kernel.h>
#include <zephyr/types.h>
#include <zephyr/sys/atomic.h>
#include <zephyr/modem/pipe.h>
#ifndef ZEPHYR_MODEM_UBX_
#define ZEPHYR_MODEM_UBX_
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Modem Ubx
* @defgroup modem_ubx Modem Ubx
* @ingroup modem
* @{
*/
#define UBX_FRM_HEADER_SZ 6
#define UBX_FRM_FOOTER_SZ 2
#define UBX_FRM_SZ_WITHOUT_PAYLOAD (UBX_FRM_HEADER_SZ + UBX_FRM_FOOTER_SZ)
#define UBX_FRM_SZ(payload_size) (payload_size + UBX_FRM_SZ_WITHOUT_PAYLOAD)
#define UBX_PREAMBLE_SYNC_CHAR_1 0xB5
#define UBX_PREAMBLE_SYNC_CHAR_2 0x62
#define UBX_FRM_PREAMBLE_SYNC_CHAR_1_IDX 0
#define UBX_FRM_PREAMBLE_SYNC_CHAR_2_IDX 1
#define UBX_FRM_MSG_CLASS_IDX 2
#define UBX_FRM_MSG_ID_IDX 3
#define UBX_FRM_PAYLOAD_SZ_L_IDX 4
#define UBX_FRM_PAYLOAD_SZ_H_IDX 5
#define UBX_FRM_PAYLOAD_IDX 6
#define UBX_FRM_CHECKSUM_START_IDX 2
#define UBX_FRM_CHECKSUM_STOP_IDX(frame_len) (frame_len - 2)
#define UBX_PAYLOAD_SZ_MAX 256
#define UBX_FRM_SZ_MAX UBX_FRM_SZ(UBX_PAYLOAD_SZ_MAX)
struct ubx_frame {
uint8_t preamble_sync_char_1;
uint8_t preamble_sync_char_2;
uint8_t message_class;
uint8_t message_id;
uint8_t payload_size_low;
uint8_t payload_size_high;
uint8_t payload_and_checksum[];
};
struct modem_ubx_script {
struct ubx_frame *request;
struct ubx_frame *response;
struct ubx_frame *match;
uint16_t retry_count;
k_timeout_t timeout;
};
struct modem_ubx {
void *user_data;
atomic_t state;
uint8_t *receive_buf;
uint16_t receive_buf_size;
uint8_t *work_buf;
uint16_t work_buf_size;
uint16_t work_buf_len;
bool ubx_preamble_sync_chars_received;
const struct modem_ubx_script *script;
struct modem_pipe *pipe;
struct k_work send_work;
struct k_work process_work;
struct k_sem script_stopped_sem;
struct k_sem script_running_sem;
};
struct modem_ubx_config {
void *user_data;
uint8_t *receive_buf;
uint16_t receive_buf_size;
uint8_t *work_buf;
uint16_t work_buf_size;
};
/**
* @brief Attach pipe to Modem Ubx
*
* @param ubx Modem Ubx instance
* @param pipe Pipe instance to attach Modem Ubx instance to
* @returns 0 if successful
* @returns negative errno code if failure
* @note Modem Ubx instance is enabled if successful
*/
int modem_ubx_attach(struct modem_ubx *ubx, struct modem_pipe *pipe);
/**
* @brief Release pipe from Modem Ubx instance
*
* @param ubx Modem Ubx instance
*/
void modem_ubx_release(struct modem_ubx *ubx);
/**
* @brief Initialize Modem Ubx instance
* @param ubx Modem Ubx instance
* @param config Configuration which shall be applied to the Modem Ubx instance
* @note Modem Ubx instance must be attached to a pipe instance
*/
int modem_ubx_init(struct modem_ubx *ubx, const struct modem_ubx_config *config);
/**
* @brief Writes the ubx frame in script.request and reads back its response (if available)
* @details For each ubx frame sent, the device responds in 0, 1 or both of the following ways:
* 1. The device sends back a UBX-ACK frame to denote 'acknowledge' and 'not-acknowledge'.
* Note: the message id of UBX-ACK frame determines whether the device acknowledged.
* Ex: when we send a UBX-CFG frame, the device responds with a UBX-ACK frame.
* 2. The device sends back the same frame that we sent to it, with it's payload populated.
* It's used to get the current configuration corresponding to the frame that we sent.
* Ex: frame types such as "get" or "poll" ubx frames respond this way.
* This response (if received) is written to script.response.
*
* This function writes the ubx frame in script.request then reads back it's response.
* If script.match is not NULL, then every ubx frame received from the device is compared with
* script.match to check if a match occurred. This could be used to match UBX-ACK frame sent
* from the device by populating script.match with UBX-ACK that the script expects to receive.
*
* The script terminates when either of the following happens:
* 1. script.match is successfully received and matched.
* 2. timeout (denoted by script.timeout) occurs.
* @param ubx Modem Ubx instance
* @param script Script to be executed
* @note The length of ubx frame in the script.request should not exceed UBX_FRM_SZ_MAX
* @note Modem Ubx instance must be attached to a pipe instance
* @returns 0 if device acknowledged via UBX-ACK and no "get" response was received
* @returns positive integer denoting the length of "get" response that was received
* @returns negative errno code if failure
*/
int modem_ubx_run_script(struct modem_ubx *ubx, const struct modem_ubx_script *script);
/**
* @brief Initialize ubx frame
* @param ubx_frame Ubx frame buffer
* @param ubx_frame_size Ubx frame buffer size
* @param msg_cls Message class
* @param msg_id Message id
* @param payload Payload buffer
* @param payload_size Payload buffer size
* @returns positive integer denoting the length of the ubx frame created
* @returns negative errno code if failure
*/
int modem_ubx_create_frame(uint8_t *ubx_frame, uint16_t ubx_frame_size, uint8_t msg_cls,
uint8_t msg_id, const void *payload, uint16_t payload_size);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* ZEPHYR_MODEM_UBX_ */
``` | /content/code_sandbox/include/zephyr/modem/ubx.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,424 |
```objective-c
/*
*
*/
#include <zephyr/types.h>
#include <zephyr/kernel.h>
#ifndef ZEPHYR_MODEM_STATS_
#define ZEPHYR_MODEM_STATS_
/**
* @cond INTERNAL_HIDDEN
*/
/** Modem statistics buffer structure */
struct modem_stats_buffer {
sys_snode_t node;
char name[CONFIG_MODEM_STATS_BUFFER_NAME_SIZE];
uint32_t max_used;
uint32_t size;
};
/**
* @endcond
*/
/**
* @brief Initialize modem statistics buffer
*
* @param buffer Modem statistics buffer instance
* @param name Name of buffer instance
* @param size Size of buffer
*/
void modem_stats_buffer_init(struct modem_stats_buffer *buffer,
const char *name, uint32_t size);
/**
* @brief Advertise modem statistics buffer size
*
* @param buffer Modem statistics buffer instance
* @param length Length of buffer
*
* @note Invoke when buffer size changes
* @note Safe to invoke from ISR
*/
void modem_stats_buffer_advertise_length(struct modem_stats_buffer *buffer, uint32_t length);
#endif /* ZEPHYR_MODEM_STATS_ */
``` | /content/code_sandbox/include/zephyr/modem/stats.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 235 |
```objective-c
/*
*
*/
#include <zephyr/kernel.h>
#include <zephyr/types.h>
#include <zephyr/net/net_if.h>
#include <zephyr/net/net_pkt.h>
#include <zephyr/sys/ring_buffer.h>
#include <zephyr/sys/atomic.h>
#include <zephyr/modem/pipe.h>
#include <zephyr/modem/stats.h>
#ifndef ZEPHYR_MODEM_PPP_
#define ZEPHYR_MODEM_PPP_
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Modem PPP
* @defgroup modem_ppp Modem PPP
* @ingroup modem
* @{
*/
/** L2 network interface init callback */
typedef void (*modem_ppp_init_iface)(struct net_if *iface);
/**
* @cond INTERNAL_HIDDEN
*/
enum modem_ppp_receive_state {
/* Searching for start of frame and header */
MODEM_PPP_RECEIVE_STATE_HDR_SOF = 0,
MODEM_PPP_RECEIVE_STATE_HDR_FF,
MODEM_PPP_RECEIVE_STATE_HDR_7D,
MODEM_PPP_RECEIVE_STATE_HDR_23,
/* Writing bytes to network packet */
MODEM_PPP_RECEIVE_STATE_WRITING,
/* Unescaping next byte before writing to network packet */
MODEM_PPP_RECEIVE_STATE_UNESCAPING,
};
enum modem_ppp_transmit_state {
/* Idle */
MODEM_PPP_TRANSMIT_STATE_IDLE = 0,
/* Writing header */
MODEM_PPP_TRANSMIT_STATE_SOF,
MODEM_PPP_TRANSMIT_STATE_HDR_FF,
MODEM_PPP_TRANSMIT_STATE_HDR_7D,
MODEM_PPP_TRANSMIT_STATE_HDR_23,
/* Writing protocol */
MODEM_PPP_TRANSMIT_STATE_PROTOCOL_HIGH,
MODEM_PPP_TRANSMIT_STATE_ESCAPING_PROTOCOL_HIGH,
MODEM_PPP_TRANSMIT_STATE_PROTOCOL_LOW,
MODEM_PPP_TRANSMIT_STATE_ESCAPING_PROTOCOL_LOW,
/* Writing data */
MODEM_PPP_TRANSMIT_STATE_DATA,
MODEM_PPP_TRANSMIT_STATE_ESCAPING_DATA,
/* Writing FCS */
MODEM_PPP_TRANSMIT_STATE_FCS_LOW,
MODEM_PPP_TRANSMIT_STATE_ESCAPING_FCS_LOW,
MODEM_PPP_TRANSMIT_STATE_FCS_HIGH,
MODEM_PPP_TRANSMIT_STATE_ESCAPING_FCS_HIGH,
/* Writing end of frame */
MODEM_PPP_TRANSMIT_STATE_EOF,
};
struct modem_ppp {
/* Network interface instance is bound to */
struct net_if *iface;
/* Hook for PPP L2 network interface initialization */
modem_ppp_init_iface init_iface;
atomic_t state;
/* Buffers used for processing partial frames */
uint8_t *receive_buf;
uint8_t *transmit_buf;
uint16_t buf_size;
/* Wrapped PPP frames are sent and received through this pipe */
struct modem_pipe *pipe;
/* Receive PPP frame state */
enum modem_ppp_receive_state receive_state;
/* Allocated network packet being created */
struct net_pkt *rx_pkt;
/* Packet being sent */
enum modem_ppp_transmit_state transmit_state;
struct net_pkt *tx_pkt;
uint8_t tx_pkt_escaped;
uint16_t tx_pkt_protocol;
uint16_t tx_pkt_fcs;
/* Ring buffer used for transmitting partial PPP frame */
struct ring_buf transmit_rb;
struct k_fifo tx_pkt_fifo;
/* Work */
struct k_work send_work;
struct k_work process_work;
#if defined(CONFIG_NET_STATISTICS_PPP)
struct net_stats_ppp stats;
#endif
#if CONFIG_MODEM_STATS
struct modem_stats_buffer receive_buf_stats;
struct modem_stats_buffer transmit_buf_stats;
#endif
};
/**
* @endcond
*/
/**
* @brief Attach pipe to instance and connect
*
* @param ppp Modem PPP instance
* @param pipe Pipe to attach to modem PPP instance
*/
int modem_ppp_attach(struct modem_ppp *ppp, struct modem_pipe *pipe);
/**
* @brief Get network interface modem PPP instance is bound to
*
* @param ppp Modem PPP instance
* @returns Pointer to network interface modem PPP instance is bound to
*/
struct net_if *modem_ppp_get_iface(struct modem_ppp *ppp);
/**
* @brief Release pipe from instance
*
* @param ppp Modem PPP instance
*/
void modem_ppp_release(struct modem_ppp *ppp);
/**
* @cond INTERNAL_HIDDEN
*/
/**
* @brief Initialize modem PPP instance device
* @param dev Device instance associated with network interface
* @warning Should not be used directly
*/
int modem_ppp_init_internal(const struct device *dev);
/**
* @endcond
*/
/**
* @brief Define a modem PPP module and bind it to a network interface
*
* @details This macro defines the modem_ppp instance, initializes a PPP L2
* network device instance, and binds the modem_ppp instance to the PPP L2
* instance.
*
* @param _name Name of the statically defined modem_ppp instance
* @param _init_iface Hook for the PPP L2 network interface init function
* @param _prio Initialization priority of the PPP L2 net iface
* @param _mtu Max size of net_pkt data sent and received on PPP L2 net iface
* @param _buf_size Size of partial PPP frame transmit and receive buffers
*/
#define MODEM_PPP_DEFINE(_name, _init_iface, _prio, _mtu, _buf_size) \
extern const struct ppp_api modem_ppp_ppp_api; \
\
static uint8_t _CONCAT(_name, _receive_buf)[_buf_size]; \
static uint8_t _CONCAT(_name, _transmit_buf)[_buf_size]; \
\
static struct modem_ppp _name = { \
.init_iface = _init_iface, \
.receive_buf = _CONCAT(_name, _receive_buf), \
.transmit_buf = _CONCAT(_name, _transmit_buf), \
.buf_size = _buf_size, \
}; \
\
NET_DEVICE_INIT(_CONCAT(ppp_net_dev_, _name), "modem_ppp_" # _name, \
modem_ppp_init_internal, NULL, &_name, NULL, _prio, &modem_ppp_ppp_api, \
PPP_L2, NET_L2_GET_CTX_TYPE(PPP_L2), _mtu)
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* ZEPHYR_MODEM_PPP_ */
``` | /content/code_sandbox/include/zephyr/modem/ppp.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,418 |
```objective-c
/*
*
*/
#include <zephyr/types.h>
#include <zephyr/kernel.h>
#ifndef ZEPHYR_MODEM_PIPE_
#define ZEPHYR_MODEM_PIPE_
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Modem Pipe
* @defgroup modem_pipe Modem Pipe
* @ingroup modem
* @{
*/
/** Modem pipe event */
enum modem_pipe_event {
MODEM_PIPE_EVENT_OPENED = 0,
MODEM_PIPE_EVENT_RECEIVE_READY,
MODEM_PIPE_EVENT_TRANSMIT_IDLE,
MODEM_PIPE_EVENT_CLOSED,
};
/**
* @cond INTERNAL_HIDDEN
*/
struct modem_pipe;
/**
* @endcond
*/
typedef void (*modem_pipe_api_callback)(struct modem_pipe *pipe, enum modem_pipe_event event,
void *user_data);
/**
* @cond INTERNAL_HIDDEN
*/
typedef int (*modem_pipe_api_open)(void *data);
typedef int (*modem_pipe_api_transmit)(void *data, const uint8_t *buf, size_t size);
typedef int (*modem_pipe_api_receive)(void *data, uint8_t *buf, size_t size);
typedef int (*modem_pipe_api_close)(void *data);
struct modem_pipe_api {
modem_pipe_api_open open;
modem_pipe_api_transmit transmit;
modem_pipe_api_receive receive;
modem_pipe_api_close close;
};
struct modem_pipe {
void *data;
const struct modem_pipe_api *api;
modem_pipe_api_callback callback;
void *user_data;
struct k_spinlock spinlock;
struct k_event event;
};
/**
* @brief Initialize a modem pipe
*
* @param pipe Pipe instance to initialize
* @param data Pipe data to bind to pipe instance
* @param api Pipe API implementation to bind to pipe instance
*/
void modem_pipe_init(struct modem_pipe *pipe, void *data, const struct modem_pipe_api *api);
/**
* @endcond
*/
/**
* @brief Open pipe
*
* @param pipe Pipe instance
* @param timeout Timeout waiting for pipe to open
*
* @retval 0 if pipe was successfully opened or was already open
* @retval -errno code otherwise
*
* @warning Be cautious when using this synchronous version of the call.
* It may block the calling thread, which in the case of the system workqueue
* can result in a deadlock until this call times out waiting for the pipe to be open.
*/
int modem_pipe_open(struct modem_pipe *pipe, k_timeout_t timeout);
/**
* @brief Open pipe asynchronously
*
* @param pipe Pipe instance
*
* @note The MODEM_PIPE_EVENT_OPENED event is invoked immediately if pipe is
* already opened.
*
* @retval 0 if pipe open was called successfully or pipe was already open
* @retval -errno code otherwise
*/
int modem_pipe_open_async(struct modem_pipe *pipe);
/**
* @brief Attach pipe to callback
*
* @param pipe Pipe instance
* @param callback Callback called when pipe event occurs
* @param user_data Free to use user data passed with callback
*
* @note The MODEM_PIPE_EVENT_RECEIVE_READY event is invoked immediately if pipe has pending
* data ready to receive.
*/
void modem_pipe_attach(struct modem_pipe *pipe, modem_pipe_api_callback callback, void *user_data);
/**
* @brief Transmit data through pipe
*
* @param pipe Pipe to transmit through
* @param buf Data to transmit
* @param size Number of bytes to transmit
*
* @retval Number of bytes placed in pipe
* @retval -EPERM if pipe is closed
* @retval -errno code on error
*
* @warning This call must be non-blocking
*/
int modem_pipe_transmit(struct modem_pipe *pipe, const uint8_t *buf, size_t size);
/**
* @brief Receive data through pipe
*
* @param pipe Pipe to receive from
* @param buf Destination for received data; must not be already in use in a modem module.
* @param size Capacity of destination for received data
*
* @retval Number of bytes received from pipe
* @retval -EPERM if pipe is closed
* @retval -errno code on error
*
* @warning This call must be non-blocking
*/
int modem_pipe_receive(struct modem_pipe *pipe, uint8_t *buf, size_t size);
/**
* @brief Clear callback
*
* @param pipe Pipe instance
*/
void modem_pipe_release(struct modem_pipe *pipe);
/**
* @brief Close pipe
*
* @param pipe Pipe instance
* @param timeout Timeout waiting for pipe to close
*
* @retval 0 if pipe open was called closed or pipe was already closed
* @retval -errno code otherwise
*
* @warning Be cautious when using this synchronous version of the call.
* It may block the calling thread, which in the case of the system workqueue
* can result in a deadlock until this call times out waiting for the pipe to be closed.
*/
int modem_pipe_close(struct modem_pipe *pipe, k_timeout_t timeout);
/**
* @brief Close pipe asynchronously
*
* @param pipe Pipe instance
*
* @note The MODEM_PIPE_EVENT_CLOSED event is invoked immediately if pipe is
* already closed.
*
* @retval 0 if pipe close was called successfully or pipe was already closed
* @retval -errno code otherwise
*/
int modem_pipe_close_async(struct modem_pipe *pipe);
/**
* @cond INTERNAL_HIDDEN
*/
/**
* @brief Notify user of pipe that it has opened
*
* @param pipe Pipe instance
*
* @note Invoked from instance which initialized the pipe instance
*/
void modem_pipe_notify_opened(struct modem_pipe *pipe);
/**
* @brief Notify user of pipe that it has closed
*
* @param pipe Pipe instance
*
* @note Invoked from instance which initialized the pipe instance
*/
void modem_pipe_notify_closed(struct modem_pipe *pipe);
/**
* @brief Notify user of pipe that data is ready to be received
*
* @param pipe Pipe instance
*
* @note Invoked from instance which initialized the pipe instance
*/
void modem_pipe_notify_receive_ready(struct modem_pipe *pipe);
/**
* @brief Notify user of pipe that pipe has no more data to transmit
*
* @param pipe Pipe instance
*
* @note Invoked from instance which initialized the pipe instance
*/
void modem_pipe_notify_transmit_idle(struct modem_pipe *pipe);
/**
* @endcond
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* ZEPHYR_MODEM_PIPE_ */
``` | /content/code_sandbox/include/zephyr/modem/pipe.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,361 |
```objective-c
/*
*
*/
#include <zephyr/kernel.h>
#include <zephyr/types.h>
#include <zephyr/device.h>
#include <zephyr/sys/ring_buffer.h>
#include <zephyr/sys/atomic.h>
#include <zephyr/modem/pipe.h>
#ifndef ZEPHYR_MODEM_BACKEND_TTY_
#define ZEPHYR_MODEM_BACKEND_TTY_
#ifdef __cplusplus
extern "C" {
#endif
struct modem_backend_tty {
const char *tty_path;
int tty_fd;
struct modem_pipe pipe;
struct k_thread thread;
k_thread_stack_t *stack;
size_t stack_size;
atomic_t state;
};
struct modem_backend_tty_config {
const char *tty_path;
k_thread_stack_t *stack;
size_t stack_size;
};
struct modem_pipe *modem_backend_tty_init(struct modem_backend_tty *backend,
const struct modem_backend_tty_config *config);
#ifdef __cplusplus
}
#endif
#endif /* ZEPHYR_MODEM_BACKEND_TTY_ */
``` | /content/code_sandbox/include/zephyr/modem/backend/tty.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 211 |
```objective-c
/*
*
*/
#include <zephyr/kernel.h>
#include <zephyr/types.h>
#include <zephyr/device.h>
#include <zephyr/drivers/uart.h>
#include <zephyr/sys/ring_buffer.h>
#include <zephyr/sys/atomic.h>
#include <zephyr/modem/pipe.h>
#include <zephyr/modem/stats.h>
#ifndef ZEPHYR_MODEM_BACKEND_UART_
#define ZEPHYR_MODEM_BACKEND_UART_
#ifdef __cplusplus
extern "C" {
#endif
struct modem_backend_uart_isr {
struct ring_buf receive_rdb[2];
struct ring_buf transmit_rb;
atomic_t transmit_buf_len;
atomic_t receive_buf_len;
uint8_t receive_rdb_used;
uint32_t transmit_buf_put_limit;
};
struct modem_backend_uart_async {
uint8_t *receive_bufs[2];
uint32_t receive_buf_size;
struct ring_buf receive_rb;
struct k_spinlock receive_rb_lock;
uint8_t *transmit_buf;
uint32_t transmit_buf_size;
struct k_work rx_disabled_work;
atomic_t state;
};
struct modem_backend_uart {
const struct device *uart;
struct modem_pipe pipe;
struct k_work_delayable receive_ready_work;
struct k_work transmit_idle_work;
#if CONFIG_MODEM_STATS
struct modem_stats_buffer receive_buf_stats;
struct modem_stats_buffer transmit_buf_stats;
#endif
union {
struct modem_backend_uart_isr isr;
struct modem_backend_uart_async async;
};
};
struct modem_backend_uart_config {
const struct device *uart;
uint8_t *receive_buf;
uint32_t receive_buf_size;
uint8_t *transmit_buf;
uint32_t transmit_buf_size;
};
struct modem_pipe *modem_backend_uart_init(struct modem_backend_uart *backend,
const struct modem_backend_uart_config *config);
#ifdef __cplusplus
}
#endif
#endif /* ZEPHYR_MODEM_BACKEND_UART_ */
``` | /content/code_sandbox/include/zephyr/modem/backend/uart.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 389 |
```objective-c
/*
*
*/
/**
* @file
* @brief Flash image header file
*
* This header file declares prototypes for the flash image APIs used for DFU.
*/
#ifndef ZEPHYR_INCLUDE_DFU_FLASH_IMG_H_
#define ZEPHYR_INCLUDE_DFU_FLASH_IMG_H_
#include <zephyr/storage/stream_flash.h>
/**
* @brief Abstraction layer to write firmware images to flash
*
* @defgroup flash_img_api Flash image API
* @ingroup os_services
* @{
*/
#ifdef __cplusplus
extern "C" {
#endif
struct flash_img_context {
uint8_t buf[CONFIG_IMG_BLOCK_BUF_SIZE];
const struct flash_area *flash_area;
struct stream_flash_ctx stream;
};
/**
* @brief Structure for verify flash region integrity
*
* Match vector length is fixed and depends on size from hash algorithm used
* to verify flash integrity. The current available algorithm is SHA-256.
*/
struct flash_img_check {
const uint8_t *match; /** Match vector data */
size_t clen; /** Content to be compared */
};
/**
* @brief Initialize context needed for writing the image to the flash.
*
* @param ctx context to be initialized
* @param area_id flash area id of partition where the image should be written
*
* @return 0 on success, negative errno code on fail
*/
int flash_img_init_id(struct flash_img_context *ctx, uint8_t area_id);
/**
* @brief Initialize context needed for writing the image to the flash.
*
* @param ctx context to be initialized
*
* @return 0 on success, negative errno code on fail
*/
int flash_img_init(struct flash_img_context *ctx);
/**
* @brief Read number of bytes of the image written to the flash.
*
* @param ctx context
*
* @return Number of bytes written to the image flash.
*/
size_t flash_img_bytes_written(struct flash_img_context *ctx);
/**
* @brief Process input buffers to be written to the image slot 1. flash
* memory in single blocks. Will store remainder between calls.
*
* A final call to this function with flush set to true
* will write out the remaining block buffer to flash. Since flash is written to
* in blocks, the contents of flash from the last byte written up to the next
* multiple of CONFIG_IMG_BLOCK_BUF_SIZE is padded with 0xff.
*
* @param ctx context
* @param data data to write
* @param len Number of bytes to write
* @param flush when true this forces any buffered
* data to be written to flash
*
* @return 0 on success, negative errno code on fail
*/
int flash_img_buffered_write(struct flash_img_context *ctx, const uint8_t *data,
size_t len, bool flush);
/**
* @brief Verify flash memory length bytes integrity from a flash area. The
* start point is indicated by an offset value.
*
* The function is enabled via CONFIG_IMG_ENABLE_IMAGE_CHECK Kconfig options.
*
* @param[in] ctx context.
* @param[in] fic flash img check data.
* @param[in] area_id flash area id of partition where the image should be
* verified.
*
* @return 0 on success, negative errno code on fail
*/
int flash_img_check(struct flash_img_context *ctx,
const struct flash_img_check *fic,
uint8_t area_id);
#ifdef __cplusplus
}
#endif
/**
* @}
*/
#endif /* ZEPHYR_INCLUDE_DFU_FLASH_IMG_H_ */
``` | /content/code_sandbox/include/zephyr/dfu/flash_img.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 743 |
```objective-c
/*
*
*/
#ifndef __XEN_GENERIC_H__
#define __XEN_GENERIC_H__
#include <zephyr/xen/public/xen.h>
#define XEN_PAGE_SIZE 4096
#define XEN_PAGE_SHIFT 12
#define XEN_PFN_UP(x) (unsigned long)(((x) + XEN_PAGE_SIZE-1) >> XEN_PAGE_SHIFT)
#define XEN_PFN_DOWN(x) (unsigned long)((x) >> XEN_PAGE_SHIFT)
#define XEN_PFN_PHYS(x) ((unsigned long)(x) << XEN_PAGE_SHIFT)
#define XEN_PHYS_PFN(x) (unsigned long)((x) >> XEN_PAGE_SHIFT)
#define xen_to_phys(x) ((unsigned long) (x))
#define xen_to_virt(x) ((void *) (x))
#define xen_virt_to_gfn(_virt) (XEN_PFN_DOWN(xen_to_phys(_virt)))
#define xen_gfn_to_virt(_gfn) (xen_to_virt(XEN_PFN_PHYS(_gfn)))
/*
* Atomically exchange value on "ptr" position. If value on "ptr" contains
* "old", then store and return "new". Otherwise, return the "old" value.
*/
#define synch_cmpxchg(ptr, old, new) \
({ __typeof__(*ptr) stored = old; \
__atomic_compare_exchange_n(ptr, &stored, new, 0, __ATOMIC_SEQ_CST, \
__ATOMIC_SEQ_CST) ? new : old; \
})
#endif /* __XEN_GENERIC_H__ */
``` | /content/code_sandbox/include/zephyr/xen/generic.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 335 |
```objective-c
/*
*
*/
#ifndef __XEN_CONSOLE_H__
#define __XEN_CONSOLE_H__
#include <zephyr/init.h>
#include <zephyr/device.h>
#include <zephyr/drivers/uart.h>
#include <zephyr/sys/device_mmio.h>
struct hvc_xen_data {
DEVICE_MMIO_RAM; /* should be first */
const struct device *dev;
struct xencons_interface *intf;
uint64_t evtchn;
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
uart_irq_callback_user_data_t irq_cb;
void *irq_cb_data;
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
};
int xen_console_init(const struct device *dev);
#endif /* __XEN_CONSOLE_H__ */
``` | /content/code_sandbox/include/zephyr/xen/console.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 145 |
```objective-c
/*
*
*/
#ifndef __XEN_EVENTS_H__
#define __XEN_EVENTS_H__
#include <zephyr/xen/public/event_channel.h>
#include <zephyr/kernel.h>
typedef void (*evtchn_cb_t)(void *priv);
struct event_channel_handle {
evtchn_cb_t cb;
void *priv;
};
typedef struct event_channel_handle evtchn_handle_t;
/*
* Following functions just wrap Xen hypercalls, detailed description
* of parameters and return values are located in include/xen/public/event_channel.h
*/
int evtchn_status(evtchn_status_t *status);
int evtchn_close(evtchn_port_t port);
int evtchn_set_priority(evtchn_port_t port, uint32_t priority);
void notify_evtchn(evtchn_port_t port);
/*
* Allocate event-channel between caller and remote domain
*
* @param remote_dom - remote domain domid
* @return - local event channel port on success, negative on error
*/
int alloc_unbound_event_channel(domid_t remote_dom);
#ifdef CONFIG_XEN_DOM0
/*
* Allocate event-channel between remote domains. Can be used only from Dom0.
*
* @param dom - first remote domain domid (may be DOMID_SELF)
* @param remote_dom - second remote domain domid
* @return - local event channel port on success, negative on error
*/
int alloc_unbound_event_channel_dom0(domid_t dom, domid_t remote_dom);
#endif /* CONFIG_XEN_DOM0 */
/*
* Allocate local event channel, binded to remote port and attach specified callback
* to it
*
* @param remote_dom - remote domain domid
* @param remote_port - remote domain event channel port number
* @param cb - callback, attached to locat port
* @param data - private data, that will be passed to cb
* @return - local event channel port on success, negative on error
*/
int bind_interdomain_event_channel(domid_t remote_dom, evtchn_port_t remote_port,
evtchn_cb_t cb, void *data);
/*
* Bind user-defined handler to specified event-channel
*
* @param port - event channel number
* @param cb - pointer to event channel handler
* @param data - private data, that will be passed to handler as parameter
* @return - zero on success
*/
int bind_event_channel(evtchn_port_t port, evtchn_cb_t cb, void *data);
/*
* Unbind handler from event channel, substitute it with empty callback
*
* @param port - event channel number to unbind
* @return - zero on success
*/
int unbind_event_channel(evtchn_port_t port);
int get_missed_events(evtchn_port_t port);
int xen_events_init(void);
#endif /* __XEN_EVENTS_H__ */
``` | /content/code_sandbox/include/zephyr/xen/events.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 576 |
```objective-c
/*
*
*/
#ifndef __XEN_HVM_H__
#define __XEN_HVM_H__
#include <zephyr/xen/public/hvm/hvm_op.h>
#include <zephyr/xen/public/hvm/params.h>
#include <zephyr/kernel.h>
int hvm_set_parameter(int idx, int domid, uint64_t value);
int hvm_get_parameter(int idx, int domid, uint64_t *value);
#endif /* __XEN_HVM_H__ */
``` | /content/code_sandbox/include/zephyr/xen/hvm.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 102 |
```objective-c
/*
*
*/
/**
* @file
* @brief MCUboot public API for MCUboot control of image boot process
*
* The header declares API functions that can be used to get information
* on and select application images for boot.
*/
#ifndef ZEPHYR_INCLUDE_DFU_MCUBOOT_H_
#define ZEPHYR_INCLUDE_DFU_MCUBOOT_H_
#include <stdbool.h>
#include <stddef.h>
#include <sys/types.h>
#include <zephyr/types.h>
/**
* @brief MCUboot public API for MCUboot control of image boot process
*
* @defgroup mcuboot_api MCUboot image control API
* @ingroup third_party
* @{
*/
#ifdef __cplusplus
extern "C" {
#endif
#ifdef BOOT_SWAP_TYPE_NONE
#if BOOT_SWAP_TYPE_NONE != 1 /*ensure the same definition in MCUboot */
#error "definition incompatible"
#endif
#else
/** Attempt to boot the contents of slot 0. */
#define BOOT_SWAP_TYPE_NONE 1
#endif
#ifdef BOOT_SWAP_TYPE_TEST
#if BOOT_SWAP_TYPE_TEST != 2 /*ensure the same definition in MCUboot */
#error "definition incompatible"
#endif
#else
/** Swap to slot 1. Absent a confirm command, revert back on next boot. */
#define BOOT_SWAP_TYPE_TEST 2
#endif
#ifdef BOOT_SWAP_TYPE_PERM
#if BOOT_SWAP_TYPE_PERM != 3 /*ensure the same definition in MCUboot */
#error "definition incompatible"
#endif
#else
/** Swap to slot 1, and permanently switch to booting its contents. */
#define BOOT_SWAP_TYPE_PERM 3
#endif
#ifdef BOOT_SWAP_TYPE_REVERT
#if BOOT_SWAP_TYPE_REVERT != 4 /*ensure the same definition in MCUboot */
#error "definition incompatible"
#endif
#else
/** Swap back to alternate slot. A confirm changes this state to NONE. */
#define BOOT_SWAP_TYPE_REVERT 4
#endif
#ifdef BOOT_SWAP_TYPE_FAIL
#if BOOT_SWAP_TYPE_FAIL != 5 /*ensure the same definition in MCUboot */
#error "definition incompatible"
#endif
#else
/** Swap failed because image to be run is not valid */
#define BOOT_SWAP_TYPE_FAIL 5
#endif
#define BOOT_IMG_VER_STRLEN_MAX 25 /* 255.255.65535.4294967295\0 */
/**
* @brief MCUboot image header representation for image version
*
* The header for an MCUboot firmware image contains an embedded
* version number, in semantic versioning format. This structure
* represents the information it contains.
*/
struct mcuboot_img_sem_ver {
uint8_t major;
uint8_t minor;
uint16_t revision;
uint32_t build_num;
};
/**
* @brief Model for the MCUboot image header as of version 1
*
* This represents the data present in the image header, in version 1
* of the header format.
*
* Some information present in the header but not currently relevant
* to applications is omitted.
*/
struct mcuboot_img_header_v1 {
/** The size of the image, in bytes. */
uint32_t image_size;
/** The image version. */
struct mcuboot_img_sem_ver sem_ver;
};
/**
* @brief Model for the MCUBoot image header
*
* This contains the decoded image header, along with the major
* version of MCUboot that the header was built for.
*
* (The MCUboot project guarantees that incompatible changes to the
* image header will result in major version changes to the bootloader
* itself, and will be detectable in the persistent representation of
* the header.)
*/
struct mcuboot_img_header {
/**
* The version of MCUboot the header is built for.
*
* The value 1 corresponds to MCUboot versions 1.x.y.
*/
uint32_t mcuboot_version;
/**
* The header information. It is only valid to access fields
* in the union member corresponding to the mcuboot_version
* field above.
*/
union {
/** Header information for MCUboot version 1. */
struct mcuboot_img_header_v1 v1;
} h;
};
/**
* @brief Read the MCUboot image header information from an image bank.
*
* This attempts to parse the image header,
* From the start of the @a area_id image.
*
* @param area_id flash_area ID of image bank which stores the image.
* @param header On success, the returned header information is available
* in this structure.
* @param header_size Size of the header structure passed by the caller.
* If this is not large enough to contain all of the
* necessary information, an error is returned.
* @return Zero on success, a negative value on error.
*/
int boot_read_bank_header(uint8_t area_id,
struct mcuboot_img_header *header,
size_t header_size);
/**
* @brief Check if the currently running image is confirmed as OK.
*
* MCUboot can perform "test" upgrades. When these occur, a new
* firmware image is installed and booted, but the old version will be
* reverted at the next reset unless the new image explicitly marks
* itself OK.
*
* This routine can be used to check if the currently running image
* has been marked as OK.
*
* @return True if the image is confirmed as OK, false otherwise.
* @see boot_write_img_confirmed()
*/
bool boot_is_img_confirmed(void);
/**
* @brief Marks the currently running image as confirmed.
*
* This routine attempts to mark the currently running firmware image
* as OK, which will install it permanently, preventing MCUboot from
* reverting it for an older image at the next reset.
*
* This routine is safe to call if the current image has already been
* confirmed. It will return a successful result in this case.
*
* @return 0 on success, negative errno code on fail.
*/
int boot_write_img_confirmed(void);
/**
* @brief Marks the image with the given index in the primary slot as confirmed.
*
* This routine attempts to mark the firmware image in the primary slot
* as OK, which will install it permanently, preventing MCUboot from
* reverting it for an older image at the next reset.
*
* This routine is safe to call if the current image has already been
* confirmed. It will return a successful result in this case.
*
* @param image_index Image pair index.
*
* @return 0 on success, negative errno code on fail.
*/
int boot_write_img_confirmed_multi(int image_index);
/**
* @brief Determines the action, if any, that mcuboot will take on the next
* reboot.
* @return a BOOT_SWAP_TYPE_[...] constant on success, negative errno code on
* fail.
*/
int mcuboot_swap_type(void);
/**
* @brief Determines the action, if any, that mcuboot will take on the next
* reboot.
*
* @param image_index Image pair index.
*
* @return a BOOT_SWAP_TYPE_[...] constant on success, negative errno code on
* fail.
*/
int mcuboot_swap_type_multi(int image_index);
/** Boot upgrade request modes */
#define BOOT_UPGRADE_TEST 0
#define BOOT_UPGRADE_PERMANENT 1
/**
* @brief Marks the image in slot 1 as pending. On the next reboot, the system
* will perform a boot of the slot 1 image.
*
* @param permanent Whether the image should be used permanently or
* only tested once:
* BOOT_UPGRADE_TEST=run image once, then confirm or revert.
* BOOT_UPGRADE_PERMANENT=run image forever.
* @return 0 on success, negative errno code on fail.
*/
int boot_request_upgrade(int permanent);
/**
* @brief Marks the image with the given index in the secondary slot as pending.
* On the next reboot, the system will perform a boot of the secondary slot
* image.
*
* @param image_index Image pair index.
* @param permanent Whether the image should be used permanently or
* only tested once:
* BOOT_UPGRADE_TEST=run image once, then confirm or revert.
* BOOT_UPGRADE_PERMANENT=run image forever.
* @return 0 on success, negative errno code on fail.
*/
int boot_request_upgrade_multi(int image_index, int permanent);
/**
* @brief Erase the image Bank.
*
* @param area_id flash_area ID of image bank to be erased.
* @return 0 on success, negative errno code on fail.
*/
int boot_erase_img_bank(uint8_t area_id);
/**
* @brief Get the offset of the status in the image bank
*
* @param area_id flash_area ID of image bank to get the status offset
* @return a positive offset on success, negative errno code on fail
*/
ssize_t boot_get_area_trailer_status_offset(uint8_t area_id);
/**
* @brief Get the offset of the status from an image bank size
*
* @param area_size size of image bank
* @return offset of the status. When negative the status will not fit
* the given size
*/
ssize_t boot_get_trailer_status_offset(size_t area_size);
#ifdef __cplusplus
}
#endif
/**
* @}
*/
#endif /* ZEPHYR_INCLUDE_DFU_MCUBOOT_H_ */
``` | /content/code_sandbox/include/zephyr/dfu/mcuboot.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,957 |
```objective-c
/*
*/
#include <zephyr/kernel.h>
#include <zephyr/xen/public/memory.h>
#include <zephyr/xen/public/xen.h>
/**
* Add mapping for specified page frame in Xen domain physmap.
*
* @param domid domain id, where mapping will be added. For unprivileged should
* be DOMID_SELF.
* @param idx index into space being mapped.
* @param space XENMAPSPACE_* mapping space identifier.
* @param gpfn page frame where the source mapping page should appear.
* @return zero on success, negative errno on error.
*/
int xendom_add_to_physmap(int domid, unsigned long idx, unsigned int space,
xen_pfn_t gpfn);
/**
* Add mapping for specified set of page frames to Xen domain physmap.
*
* @param domid domain id, where mapping will be added. For unprivileged
* should be DOMID_SELF.
* @param foreign_domid for gmfn_foreign - domain id, whose pages being mapped,
* 0 for other.
* @param space XENMAPSPACE_* mapping space identifier.
* @param size number of page frames being mapped.
* @param idxs array of indexes into space being mapped.
* @param gpfns array of page frames where the mapping should appear.
* @param errs array of per-index error codes.
* @return zero on success, negative errno on error.
*/
int xendom_add_to_physmap_batch(int domid, int foreign_domid,
unsigned int space, unsigned int size,
xen_ulong_t *idxs, xen_pfn_t *gpfns, int *errs);
/**
* Removes page frame from Xen domain physmap.
*
* @param domid domain id, whose page is going to be removed. For unprivileged
* should be DOMID_SELF.
* @param gpfn page frame number, that needs to be removed
* @return zero on success, negative errno on error.
*/
int xendom_remove_from_physmap(int domid, xen_pfn_t gpfn);
/**
* Populate specified Xen domain page frames with memory.
*
* @param domid domain id, where mapping will be added. For unprivileged
* should be DOMID_SELF.
* @param extent_order size/alignment of each extent (size is 2^extent_order),
* e.g. 0 for 4K extents, 9 for 2M etc.
* @param nr_extents number of page frames being populated.
* @param mem_flags N/A, should be 0 for Arm.
* @param extent_start page frame bases of extents to populate with memory.
* @return number of populated frames success, negative errno on
* error.
*/
int xendom_populate_physmap(int domid, unsigned int extent_order,
unsigned int nr_extents, unsigned int mem_flags,
xen_pfn_t *extent_start);
``` | /content/code_sandbox/include/zephyr/xen/memory.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 633 |
```objective-c
/*
*
*/
#ifndef __XEN_GNTTAB_H__
#define __XEN_GNTTAB_H__
#include <zephyr/xen/public/grant_table.h>
/*
* Assigns gref and permits access to 4K page for specific domain.
*
* @param domid - id of the domain you sharing gref with
* @param gfn - guest frame number of page, where grant will be located
* @param readonly - permit readonly access to shared grant
* @return - gref assigned to shared grant
*/
grant_ref_t gnttab_grant_access(domid_t domid, unsigned long gfn,
bool readonly);
/*
* Finished access for previously shared grant. Does NOT
* free memory, if it was previously allocated by
* gnttab_alloc_and_grant().
*
* @param gref - grant reference that need to be closed
* @return - zero on success, non-zero on failure
*/
int gnttab_end_access(grant_ref_t gref);
/*
* Allocates 4K page for grant and share it via returned
* gref. Need to k_free memory, which was allocated in
* @map parameter after grant releasing.
*
* @param map - double pointer to memory, where grant will be allocated
* @param readonly - permit readonly access to allocated grant
* @return - grant ref on success or negative errno on failure
*/
int32_t gnttab_alloc_and_grant(void **map, bool readonly);
/*
* Provides interface to acquire free page, that can be used for
* mapping of foreign frames. Should be freed by gnttab_put_page()
* after usage.
*
* @return - pointer to page start address, that can be used as host_addr
* in struct gnttab_map_grant_ref, NULL on error.
*/
void *gnttab_get_page(void);
/*
* Releases provided page, that was used for mapping foreign grant frame,
* should be called after unmapping.
*
* @param page_addr - pointer to start address of used page.
*/
void gnttab_put_page(void *page_addr);
/*
* Maps foreign grant ref to Zephyr address space.
*
* @param map_ops - array of prepared gnttab_map_grant_ref's for mapping
* @param count - number of grefs in map_ops array
* @return - zero on success or negative errno on failure
* also per-page status will be set in map_ops[i].status (GNTST_*)
*
* To map foreign frame you need 4K-aligned 4K memory page, which will be
* used as host_addr for grant mapping - it should be acquired by gnttab_get_page()
* function.
*/
int gnttab_map_refs(struct gnttab_map_grant_ref *map_ops, unsigned int count);
/*
* Unmap foreign grant refs. The gnttab_put_page() should be used after this for
* each page, that was successfully unmapped.
*
* @param unmap_ops - array of prepared gnttab_map_grant_ref's for unmapping
* @param count - number of grefs in unmap_ops array
* @return - @count on success or negative errno on failure
* also per-page status will be set in unmap_ops[i].status (GNTST_*)
*/
int gnttab_unmap_refs(struct gnttab_map_grant_ref *unmap_ops, unsigned int count);
/*
* Convert grant ref status codes (GNTST_*) to text messages.
*
* @param status - negative GNTST_* code, that needs to be converted
* @return - constant pointer to text message, associated with @status
*/
const char *gnttabop_error(int16_t status);
#endif /* __XEN_GNTTAB_H__ */
``` | /content/code_sandbox/include/zephyr/xen/gnttab.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 798 |
```objective-c
/*
*
*/
#ifndef __XEN_DOM0_DOMCTL_H__
#define __XEN_DOM0_DOMCTL_H__
#include <zephyr/xen/generic.h>
#include <zephyr/xen/public/domctl.h>
#include <zephyr/xen/public/xen.h>
#include <zephyr/kernel.h>
int xen_domctl_scheduler_op(int domid, struct xen_domctl_scheduler_op *sched_op);
int xen_domctl_pausedomain(int domid);
int xen_domctl_unpausedomain(int domid);
int xen_domctl_resumedomain(int domid);
int xen_domctl_getvcpucontext(int domid, int vcpu, vcpu_guest_context_t *ctxt);
int xen_domctl_setvcpucontext(int domid, int vcpu, vcpu_guest_context_t *ctxt);
int xen_domctl_getdomaininfo(int domid, xen_domctl_getdomaininfo_t *dom_info);
int xen_domctl_set_paging_mempool_size(int domid, uint64_t size_mb);
int xen_domctl_max_mem(int domid, uint64_t max_memkb);
int xen_domctl_set_address_size(int domid, int addr_size);
int xen_domctl_iomem_permission(int domid, uint64_t first_mfn,
uint64_t nr_mfns, uint8_t allow_access);
int xen_domctl_memory_mapping(int domid, uint64_t first_gfn, uint64_t first_mfn,
uint64_t nr_mfns, uint32_t add_mapping);
int xen_domctl_assign_dt_device(int domid, char *dtdev_path);
int xen_domctl_bind_pt_irq(int domid, uint32_t machine_irq, uint8_t irq_type, uint8_t bus,
uint8_t device, uint8_t intx, uint8_t isa_irq, uint16_t spi);
int xen_domctl_max_vcpus(int domid, int max_vcpus);
int xen_domctl_createdomain(int domid, struct xen_domctl_createdomain *config);
int xen_domctl_cacheflush(int domid, struct xen_domctl_cacheflush *cacheflush);
int xen_domctl_destroydomain(int domid);
#endif /* __XEN_DOM0_DOMCTL_H__ */
``` | /content/code_sandbox/include/zephyr/xen/dom0/domctl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 470 |
```objective-c
/******************************************************************************
* event_channel.h
*
* Event channels between domains.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to
* deal in the Software without restriction, including without limitation the
* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*
*/
#ifndef __XEN_PUBLIC_EVENT_CHANNEL_H__
#define __XEN_PUBLIC_EVENT_CHANNEL_H__
#include "xen.h"
/*
* `incontents 150 evtchn Event Channels
*
* Event channels are the basic primitive provided by Xen for event
* notifications. An event is the Xen equivalent of a hardware
* interrupt. They essentially store one bit of information, the event
* of interest is signalled by transitioning this bit from 0 to 1.
*
* Notifications are received by a guest via an upcall from Xen,
* indicating when an event arrives (setting the bit). Further
* notifications are masked until the bit is cleared again (therefore,
* guests must check the value of the bit after re-enabling event
* delivery to ensure no missed notifications).
*
* Event notifications can be masked by setting a flag; this is
* equivalent to disabling interrupts and can be used to ensure
* atomicity of certain operations in the guest kernel.
*
* Event channels are represented by the evtchn_* fields in
* struct shared_info and struct vcpu_info.
*/
#define EVTCHNOP_bind_interdomain 0
#define EVTCHNOP_bind_virq 1
#define EVTCHNOP_bind_pirq 2
#define EVTCHNOP_close 3
#define EVTCHNOP_send 4
#define EVTCHNOP_status 5
#define EVTCHNOP_alloc_unbound 6
#define EVTCHNOP_bind_ipi 7
#define EVTCHNOP_bind_vcpu 8
#define EVTCHNOP_unmask 9
#define EVTCHNOP_reset 10
#define EVTCHNOP_init_control 11
#define EVTCHNOP_expand_array 12
#define EVTCHNOP_set_priority 13
#ifdef __XEN__
#define EVTCHNOP_reset_cont 14
#endif
typedef uint32_t evtchn_port_t;
DEFINE_XEN_GUEST_HANDLE(evtchn_port_t);
/*
* EVTCHNOP_alloc_unbound: Allocate a port in domain <dom> and mark as
* accepting interdomain bindings from domain <remote_dom>. A fresh port
* is allocated in <dom> and returned as <port>.
* NOTES:
* 1. If the caller is unprivileged then <dom> must be DOMID_SELF.
* 2. <remote_dom> may be DOMID_SELF, allowing loopback connections.
*/
struct evtchn_alloc_unbound {
/* IN parameters */
domid_t dom, remote_dom;
/* OUT parameters */
evtchn_port_t port;
};
typedef struct evtchn_alloc_unbound evtchn_alloc_unbound_t;
/*
* EVTCHNOP_bind_interdomain: Construct an interdomain event channel between
* the calling domain and <remote_dom>. <remote_dom,remote_port> must identify
* a port that is unbound and marked as accepting bindings from the calling
* domain. A fresh port is allocated in the calling domain and returned as
* <local_port>.
*
* In case the peer domain has already tried to set our event channel
* pending, before it was bound, EVTCHNOP_bind_interdomain always sets
* the local event channel pending.
*
* The usual pattern of use, in the guest's upcall (or subsequent
* handler) is as follows: (Re-enable the event channel for subsequent
* signalling and then) check for the existence of whatever condition
* is being waited for by other means, and take whatever action is
* needed (if any).
*
* NOTES:
* 1. <remote_dom> may be DOMID_SELF, allowing loopback connections.
*/
struct evtchn_bind_interdomain {
/* IN parameters. */
domid_t remote_dom;
evtchn_port_t remote_port;
/* OUT parameters. */
evtchn_port_t local_port;
};
typedef struct evtchn_bind_interdomain evtchn_bind_interdomain_t;
/*
* EVTCHNOP_close: Close a local event channel <port>. If the channel is
* interdomain then the remote end is placed in the unbound state
* (EVTCHNSTAT_unbound), awaiting a new connection.
*/
struct evtchn_close {
/* IN parameters. */
evtchn_port_t port;
};
typedef struct evtchn_close evtchn_close_t;
/*
* EVTCHNOP_send: Send an event to the remote end of the channel whose local
* endpoint is <port>.
*/
struct evtchn_send {
/* IN parameters. */
evtchn_port_t port;
};
typedef struct evtchn_send evtchn_send_t;
/*
* EVTCHNOP_status: Get the current status of the communication channel which
* has an endpoint at <dom, port>.
* NOTES:
* 1. <dom> may be specified as DOMID_SELF.
* 2. Only a sufficiently-privileged domain may obtain the status of an event
* channel for which <dom> is not DOMID_SELF.
*/
struct evtchn_status {
/* IN parameters */
domid_t dom;
evtchn_port_t port;
/* OUT parameters */
#define EVTCHNSTAT_closed 0 /* Channel is not in use. */
#define EVTCHNSTAT_unbound 1 /* Channel is waiting interdom connection.*/
#define EVTCHNSTAT_interdomain 2 /* Channel is connected to remote domain. */
#define EVTCHNSTAT_pirq 3 /* Channel is bound to a phys IRQ line. */
#define EVTCHNSTAT_virq 4 /* Channel is bound to a virtual IRQ line */
#define EVTCHNSTAT_ipi 5 /* Channel is bound to a virtual IPI line */
uint32_t status;
uint32_t vcpu; /* VCPU to which this channel is bound. */
union {
struct {
domid_t dom;
} unbound; /* EVTCHNSTAT_unbound */
struct {
domid_t dom;
evtchn_port_t port;
} interdomain; /* EVTCHNSTAT_interdomain */
uint32_t pirq; /* EVTCHNSTAT_pirq */
uint32_t virq; /* EVTCHNSTAT_virq */
} u;
};
typedef struct evtchn_status evtchn_status_t;
/*
* EVTCHNOP_unmask: Unmask the specified local event-channel port and deliver
* a notification to the appropriate VCPU if an event is pending.
*/
struct evtchn_unmask {
/* IN parameters. */
evtchn_port_t port;
};
typedef struct evtchn_unmask evtchn_unmask_t;
/*
* EVTCHNOP_reset: Close all event channels associated with specified domain.
* NOTES:
* 1. <dom> may be specified as DOMID_SELF.
* 2. Only a sufficiently-privileged domain may specify other than DOMID_SELF.
* 3. Destroys all control blocks and event array, resets event channel
* operations to 2-level ABI if called with <dom> == DOMID_SELF and FIFO
* ABI was used. Guests should not bind events during EVTCHNOP_reset call
* as these events are likely to be lost.
*/
struct evtchn_reset {
/* IN parameters. */
domid_t dom;
};
typedef struct evtchn_reset evtchn_reset_t;
/*
* EVTCHNOP_set_priority: set the priority for an event channel.
*/
struct evtchn_set_priority {
/* IN parameters. */
evtchn_port_t port;
uint32_t priority;
};
typedef struct evtchn_set_priority evtchn_set_priority_t;
#define EVTCHN_2L_NR_CHANNELS (sizeof(xen_ulong_t) * sizeof(xen_ulong_t) * 64)
#endif /* __XEN_PUBLIC_EVENT_CHANNEL_H__ */
``` | /content/code_sandbox/include/zephyr/xen/public/event_channel.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,842 |
```objective-c
/******************************************************************************
* xen.h
*
* Guest OS interface to Xen.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to
* deal in the Software without restriction, including without limitation the
* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*
*/
#ifndef __XEN_PUBLIC_XEN_H__
#define __XEN_PUBLIC_XEN_H__
#if defined(CONFIG_ARM64)
#include "arch-arm.h"
#else
#error "Unsupported architecture"
#endif
#ifndef __ASSEMBLY__
/* Guest handles for primitive C types. */
DEFINE_XEN_GUEST_HANDLE(char);
__DEFINE_XEN_GUEST_HANDLE(uchar, unsigned char);
DEFINE_XEN_GUEST_HANDLE(int);
__DEFINE_XEN_GUEST_HANDLE(uint, unsigned int);
#if __XEN_INTERFACE_VERSION__ < 0x00040300
DEFINE_XEN_GUEST_HANDLE(long);
__DEFINE_XEN_GUEST_HANDLE(ulong, unsigned long);
#endif
DEFINE_XEN_GUEST_HANDLE(void);
DEFINE_XEN_GUEST_HANDLE(uint8_t);
DEFINE_XEN_GUEST_HANDLE(uint64_t);
DEFINE_XEN_GUEST_HANDLE(xen_pfn_t);
DEFINE_XEN_GUEST_HANDLE(xen_ulong_t);
/* Define a variable length array (depends on compiler). */
#if defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L
#define XEN_FLEX_ARRAY_DIM
#elif defined(__GNUC__)
#define XEN_FLEX_ARRAY_DIM 0
#else
#define XEN_FLEX_ARRAY_DIM 1 /* variable size */
#endif
/* Turn a plain number into a C unsigned (long (long)) constant. */
#define __xen_mk_uint(x) x ## U
#define __xen_mk_ulong(x) x ## UL
#ifndef __xen_mk_ullong
#define __xen_mk_ullong(x) x ## ULL
#endif
#define xen_mk_uint(x) __xen_mk_uint(x)
#define xen_mk_ulong(x) __xen_mk_ulong(x)
#define xen_mk_ullong(x) __xen_mk_ullong(x)
#else
/* In assembly code we cannot use C numeric constant suffixes. */
#define xen_mk_uint(x) x
#define xen_mk_ulong(x) x
#define xen_mk_ullong(x) x
#endif
/*
* HYPERCALLS
*/
/* `incontents 100 hcalls List of hypercalls
* ` enum hypercall_num { // __HYPERVISOR_* => HYPERVISOR_*()
*/
#define __HYPERVISOR_set_trap_table 0
#define __HYPERVISOR_mmu_update 1
#define __HYPERVISOR_set_gdt 2
#define __HYPERVISOR_stack_switch 3
#define __HYPERVISOR_set_callbacks 4
#define __HYPERVISOR_fpu_taskswitch 5
/* compat since 0x00030101 */
#define __HYPERVISOR_sched_op_compat 6
#define __HYPERVISOR_platform_op 7
#define __HYPERVISOR_set_debugreg 8
#define __HYPERVISOR_get_debugreg 9
#define __HYPERVISOR_update_descriptor 10
#define __HYPERVISOR_memory_op 12
#define __HYPERVISOR_multicall 13
#define __HYPERVISOR_update_va_mapping 14
#define __HYPERVISOR_set_timer_op 15
/* compat since 0x00030202 */
#define __HYPERVISOR_event_channel_op_compat 16
#define __HYPERVISOR_xen_version 17
#define __HYPERVISOR_console_io 18
/* compat since 0x00030202 */
#define __HYPERVISOR_physdev_op_compat 19
#define __HYPERVISOR_grant_table_op 20
#define __HYPERVISOR_vm_assist 21
#define __HYPERVISOR_update_va_mapping_otherdomain 22
/* x86 only */
#define __HYPERVISOR_iret 23
#define __HYPERVISOR_vcpu_op 24
/* x86/64 only */
#define __HYPERVISOR_set_segment_base 25
#define __HYPERVISOR_mmuext_op 26
#define __HYPERVISOR_xsm_op 27
#define __HYPERVISOR_nmi_op 28
#define __HYPERVISOR_sched_op 29
#define __HYPERVISOR_callback_op 30
#define __HYPERVISOR_xenoprof_op 31
#define __HYPERVISOR_event_channel_op 32
#define __HYPERVISOR_physdev_op 33
#define __HYPERVISOR_hvm_op 34
#define __HYPERVISOR_sysctl 35
#define __HYPERVISOR_domctl 36
#define __HYPERVISOR_kexec_op 37
#define __HYPERVISOR_tmem_op 38
#define __HYPERVISOR_argo_op 39
#define __HYPERVISOR_xenpmu_op 40
#define __HYPERVISOR_dm_op 41
#define __HYPERVISOR_hypfs_op 42
/*
* ` int
* ` HYPERVISOR_console_io(unsigned int cmd,
* ` unsigned int count,
* ` char buffer[]);
*
* @cmd: Command (see below)
* @count: Size of the buffer to read/write
* @buffer: Pointer in the guest memory
*
* List of commands:
*
* * CONSOLEIO_write: Write the buffer to Xen console.
* For the hardware domain, all the characters in the buffer will
* be written. Characters will be printed directly to the console.
* For all the other domains, only the printable characters will be
* written. Characters may be buffered until a newline (i.e '\n') is
* found.
* @return 0 on success, otherwise return an error code.
* * CONSOLEIO_read: Attempts to read up to @count characters from Xen
* console. The maximum buffer size (i.e. @count) supported is 2GB.
* @return the number of characters read on success, otherwise return
* an error code.
*/
#define CONSOLEIO_write 0
#define CONSOLEIO_read 1
/* Domain ids >= DOMID_FIRST_RESERVED cannot be used for ordinary domains. */
#define DOMID_FIRST_RESERVED xen_mk_uint(0x7FF0)
/* DOMID_SELF is used in certain contexts to refer to oneself. */
#define DOMID_SELF xen_mk_uint(0x7FF0)
/*
* DOMID_IO is used to restrict page-table updates to mapping I/O memory.
* Although no Foreign Domain need be specified to map I/O pages, DOMID_IO
* is useful to ensure that no mappings to the OS's own heap are accidentally
* installed. (e.g., in Linux this could cause havoc as reference counts
* aren't adjusted on the I/O-mapping code path).
* This only makes sense as HYPERVISOR_mmu_update()'s and
* HYPERVISOR_update_va_mapping_otherdomain()'s "foreigndom" argument. For
* HYPERVISOR_mmu_update() context it can be specified by any calling domain,
* otherwise it's only permitted if the caller is privileged.
*/
#define DOMID_IO xen_mk_uint(0x7FF1)
/*
* DOMID_XEN is used to allow privileged domains to map restricted parts of
* Xen's heap space (e.g., the machine_to_phys table).
* This only makes sense as
* - HYPERVISOR_mmu_update()'s, HYPERVISOR_mmuext_op()'s, or
* HYPERVISOR_update_va_mapping_otherdomain()'s "foreigndom" argument,
* - with XENMAPSPACE_gmfn_foreign,
* and is only permitted if the caller is privileged.
*/
#define DOMID_XEN xen_mk_uint(0x7FF2)
/*
* DOMID_COW is used as the owner of sharable pages.
*/
#define DOMID_COW xen_mk_uint(0x7FF3)
/* DOMID_INVALID is used to identify pages with unknown owner. */
#define DOMID_INVALID xen_mk_uint(0x7FF4)
/* Idle domain. */
#define DOMID_IDLE xen_mk_uint(0x7FFF)
/* Mask for valid domain id values */
#define DOMID_MASK xen_mk_uint(0x7FFF)
#ifndef __ASSEMBLY__
typedef uint16_t domid_t;
#if __XEN_INTERFACE_VERSION__ < 0x00040400
/*
* Event channel endpoints per domain (when using the 2-level ABI):
* 1024 if a long is 32 bits; 4096 if a long is 64 bits.
*/
#define NR_EVENT_CHANNELS EVTCHN_2L_NR_CHANNELS
#endif
struct vcpu_time_info {
/*
* Updates to the following values are preceded and followed by an
* increment of 'version'. The guest can therefore detect updates by
* looking for changes to 'version'. If the least-significant bit of
* the version number is set then an update is in progress and the
* guest must wait to read a consistent set of values.
* The correct way to interact with the version number is similar to
* Linux's seqlock: see the implementations of
* read_seqbegin/read_seqretry.
*/
uint32_t version;
uint32_t pad0;
uint64_t tsc_timestamp; /* TSC at last update of time vals. */
uint64_t system_time; /* Time, in nanosecs, since boot.*/
/*
* Current system time:
* system_time +
* ((((tsc - tsc_timestamp) << tsc_shift) * tsc_to_system_mul) >> 32)
* CPU frequency (Hz):
* ((10^9 << 32) / tsc_to_system_mul) >> tsc_shift
*/
uint32_t tsc_to_system_mul;
int8_t tsc_shift;
#if __XEN_INTERFACE_VERSION__ > 0x040600
uint8_t flags;
uint8_t pad1[2];
#else
int8_t pad1[3];
#endif
}; /* 32 bytes */
typedef struct vcpu_time_info vcpu_time_info_t;
#define XEN_PVCLOCK_TSC_STABLE_BIT (1 << 0)
#define XEN_PVCLOCK_GUEST_STOPPED (1 << 1)
struct vcpu_info {
/*
* 'evtchn_upcall_pending' is written non-zero by Xen to indicate
* a pending notification for a particular VCPU. It is then cleared
* by the guest OS /before/ checking for pending work, thus avoiding
* a set-and-check race. Note that the mask is only accessed by Xen
* on the CPU that is currently hosting the VCPU. This means that the
* pending and mask flags can be updated by the guest without special
* synchronisation (i.e., no need for the x86 LOCK prefix).
* This may seem suboptimal because if the pending flag is set by
* a different CPU then an IPI may be scheduled even when the mask
* is set. However, note:
* 1. The task of 'interrupt holdoff' is covered by the per-event-
* channel mask bits. A 'noisy' event that is continually being
* triggered can be masked at source at this very precise
* granularity.
* 2. The main purpose of the per-VCPU mask is therefore to restrict
* reentrant execution: whether for concurrency control, or to
* prevent unbounded stack usage. Whatever the purpose, we expect
* that the mask will be asserted only for short periods at a time,
* and so the likelihood of a 'spurious' IPI is suitably small.
* The mask is read before making an event upcall to the guest: a
* non-zero mask therefore guarantees that the VCPU will not receive
* an upcall activation. The mask is cleared when the VCPU requests
* to block: this avoids wakeup-waiting races.
*/
uint8_t evtchn_upcall_pending;
#ifdef XEN_HAVE_PV_UPCALL_MASK
uint8_t evtchn_upcall_mask;
#else /* XEN_HAVE_PV_UPCALL_MASK */
uint8_t pad0;
#endif /* XEN_HAVE_PV_UPCALL_MASK */
xen_ulong_t evtchn_pending_sel;
struct arch_vcpu_info arch;
vcpu_time_info_t time;
}; /* 64 bytes (x86) */
#ifndef __XEN__
typedef struct vcpu_info vcpu_info_t;
#endif
/*
* `incontents 200 startofday_shared Start-of-day shared data structure
* Xen/kernel shared data -- pointer provided in start_info.
*
* This structure is defined to be both smaller than a page, and the
* only data on the shared page, but may vary in actual size even within
* compatible Xen versions; guests should not rely on the size
* of this structure remaining constant.
*/
struct shared_info {
struct vcpu_info vcpu_info[XEN_LEGACY_MAX_VCPUS];
/*
* A domain can create "event channels" on which it can send and receive
* asynchronous event notifications. There are three classes of event that
* are delivered by this mechanism:
* 1. Bi-directional inter- and intra-domain connections. Domains must
* arrange out-of-band to set up a connection (usually by allocating
* an unbound 'listener' port and advertising that via a storage service
* such as xenstore).
* 2. Physical interrupts. A domain with suitable hardware-access
* privileges can bind an event-channel port to a physical interrupt
* source.
* 3. Virtual interrupts ('events'). A domain can bind an event-channel
* port to a virtual interrupt source, such as the virtual-timer
* device or the emergency console.
*
* Event channels are addressed by a "port index". Each channel is
* associated with two bits of information:
* 1. PENDING -- notifies the domain that there is a pending notification
* to be processed. This bit is cleared by the guest.
* 2. MASK -- if this bit is clear then a 0->1 transition of PENDING
* will cause an asynchronous upcall to be scheduled. This bit is only
* updated by the guest. It is read-only within Xen. If a channel
* becomes pending while the channel is masked then the 'edge' is lost
* (i.e., when the channel is unmasked, the guest must manually handle
* pending notifications as no upcall will be scheduled by Xen).
*
* To expedite scanning of pending notifications, any 0->1 pending
* transition on an unmasked channel causes a corresponding bit in a
* per-vcpu selector word to be set. Each bit in the selector covers a
* 'C long' in the PENDING bitfield array.
*/
xen_ulong_t evtchn_pending[sizeof(xen_ulong_t) * 8];
xen_ulong_t evtchn_mask[sizeof(xen_ulong_t) * 8];
/*
* Wallclock time: updated by control software or RTC emulation.
* Guests should base their gettimeofday() syscall on this
* wallclock-base value.
* The values of wc_sec and wc_nsec are offsets from the Unix epoch
* adjusted by the domain's 'time offset' (in seconds) as set either
* by XEN_DOMCTL_settimeoffset, or adjusted via a guest write to the
* emulated RTC.
*/
uint32_t wc_version; /* Version counter: see vcpu_time_info_t. */
uint32_t wc_sec;
uint32_t wc_nsec;
#if !defined(__i386__)
uint32_t wc_sec_hi;
# define xen_wc_sec_hi wc_sec_hi
#elif !defined(__XEN__) && !defined(__XEN_TOOLS__)
# define xen_wc_sec_hi arch.wc_sec_hi
#endif
struct arch_shared_info arch;
};
#ifndef __XEN__
typedef struct shared_info shared_info_t;
#endif
typedef uint8_t xen_domain_handle_t[16];
#ifndef int64_aligned_t
#define int64_aligned_t int64_t
#endif
#ifndef uint64_aligned_t
#define uint64_aligned_t uint64_t
#endif
#ifndef XEN_GUEST_HANDLE_64
#define XEN_GUEST_HANDLE_64(name) XEN_GUEST_HANDLE(name)
#endif
#ifndef __ASSEMBLY__
struct xenctl_bitmap {
XEN_GUEST_HANDLE_64(uint8_t) bitmap;
uint32_t nr_bits;
};
typedef struct xenctl_bitmap xenctl_bitmap_t;
#endif
#endif /* !__ASSEMBLY__ */
#endif /* __XEN_PUBLIC_XEN_H__ */
``` | /content/code_sandbox/include/zephyr/xen/public/xen.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 3,838 |
```objective-c
/******************************************************************************
* grant_table.h
*
* Interface for granting foreign access to page frames, and receiving
* page-ownership transfers.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to
* deal in the Software without restriction, including without limitation the
* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*
*/
#ifndef __XEN_PUBLIC_GRANT_TABLE_H__
#define __XEN_PUBLIC_GRANT_TABLE_H__
#include "xen.h"
/*
* `incontents 150 gnttab Grant Tables
*
* Xen's grant tables provide a generic mechanism to memory sharing
* between domains. This shared memory interface underpins the split
* device drivers for block and network IO.
*
* Each domain has its own grant table. This is a data structure that
* is shared with Xen; it allows the domain to tell Xen what kind of
* permissions other domains have on its pages. Entries in the grant
* table are identified by grant references. A grant reference is an
* integer, which indexes into the grant table. It acts as a
* capability which the grantee can use to perform operations on the
* granter's memory.
*
* This capability-based system allows shared-memory communications
* between unprivileged domains. A grant reference also encapsulates
* the details of a shared page, removing the need for a domain to
* know the real machine address of a page it is sharing. This makes
* it possible to share memory correctly with domains running in
* fully virtualised memory.
*/
/***********************************
* GRANT TABLE REPRESENTATION
*/
/* Some rough guidelines on accessing and updating grant-table entries
* in a concurrency-safe manner. For more information, Linux contains a
* reference implementation for guest OSes (drivers/xen/grant_table.c, see
* path_to_url
*
* NB. WMB is a no-op on current-generation x86 processors. However, a
* compiler barrier will still be required.
*
* Introducing a valid entry into the grant table:
* 1. Write ent->domid.
* 2. Write ent->frame:
* GTF_permit_access: Frame to which access is permitted.
* GTF_accept_transfer: Pseudo-phys frame slot being filled by new
* frame, or zero if none.
* 3. Write memory barrier (WMB).
* 4. Write ent->flags, inc. valid type.
*
* Invalidating an unused GTF_permit_access entry:
* 1. flags = ent->flags.
* 2. Observe that !(flags & (GTF_reading|GTF_writing)).
* 3. Check result of SMP-safe CMPXCHG(&ent->flags, flags, 0).
* NB. No need for WMB as reuse of entry is control-dependent on success of
* step 3, and all architectures guarantee ordering of ctrl-dep writes.
*
* Invalidating an in-use GTF_permit_access entry:
* This cannot be done directly. Request assistance from the domain controller
* which can set a timeout on the use of a grant entry and take necessary
* action. (NB. This is not yet implemented!).
*
* Invalidating an unused GTF_accept_transfer entry:
* 1. flags = ent->flags.
* 2. Observe that !(flags & GTF_transfer_committed). [*]
* 3. Check result of SMP-safe CMPXCHG(&ent->flags, flags, 0).
* NB. No need for WMB as reuse of entry is control-dependent on success of
* step 3, and all architectures guarantee ordering of ctrl-dep writes.
* [*] If GTF_transfer_committed is set then the grant entry is 'committed'.
* The guest must /not/ modify the grant entry until the address of the
* transferred frame is written. It is safe for the guest to spin waiting
* for this to occur (detect by observing GTF_transfer_completed in
* ent->flags).
*
* Invalidating a committed GTF_accept_transfer entry:
* 1. Wait for (ent->flags & GTF_transfer_completed).
*
* Changing a GTF_permit_access from writable to read-only:
* Use SMP-safe CMPXCHG to set GTF_readonly, while checking !GTF_writing.
*
* Changing a GTF_permit_access from read-only to writable:
* Use SMP-safe bit-setting instruction.
*/
/*
* Reference to a grant entry in a specified domain's grant table.
*/
typedef uint32_t grant_ref_t;
/*
* A grant table comprises a packed array of grant entries in one or more
* page frames shared between Xen and a guest.
* [XEN]: This field is written by Xen and read by the sharing guest.
* [GST]: This field is written by the guest and read by Xen.
*/
/*
* Version 1 of the grant table entry structure is maintained purely
* for backwards compatibility. New guests should use version 2.
*/
#if __XEN_INTERFACE_VERSION__ < 0x0003020a
#define grant_entry_v1 grant_entry
#define grant_entry_v1_t grant_entry_t
#endif
struct grant_entry_v1 {
/* GTF_xxx: various type and flag information. [XEN,GST] */
uint16_t flags;
/* The domain being granted foreign privileges. [GST] */
domid_t domid;
/*
* GTF_permit_access: GFN that @domid is allowed to map and access. [GST]
* GTF_accept_transfer: GFN that @domid is allowed to transfer into. [GST]
* GTF_transfer_completed: MFN whose ownership transferred by @domid
* (non-translated guests only). [XEN]
*/
uint32_t frame;
};
typedef struct grant_entry_v1 grant_entry_v1_t;
/* The first few grant table entries will be preserved across grant table
* version changes and may be pre-populated at domain creation by tools.
*/
#define GNTTAB_NR_RESERVED_ENTRIES 8
#define GNTTAB_RESERVED_CONSOLE 0
#define GNTTAB_RESERVED_XENSTORE 1
/*
* Type of grant entry.
* GTF_invalid: This grant entry grants no privileges.
* GTF_permit_access: Allow @domid to map/access @frame.
* GTF_accept_transfer: Allow @domid to transfer ownership of one page frame
* to this guest. Xen writes the page number to @frame.
* GTF_transitive: Allow @domid to transitively access a subrange of
* @trans_grant in @trans_domid. No mappings are allowed.
*/
#define GTF_invalid (0U << 0)
#define GTF_permit_access (1U << 0)
#define GTF_accept_transfer (2U << 0)
#define GTF_transitive (3U << 0)
#define GTF_type_mask (3U << 0)
/*
* Subflags for GTF_permit_access and GTF_transitive.
* GTF_readonly: Restrict @domid to read-only mappings and accesses. [GST]
* GTF_reading: Grant entry is currently mapped for reading by @domid. [XEN]
* GTF_writing: Grant entry is currently mapped for writing by @domid. [XEN]
* Further subflags for GTF_permit_access only.
* GTF_PAT, GTF_PWT, GTF_PCD: (x86) cache attribute flags to be used for
* mappings of the grant [GST]
* GTF_sub_page: Grant access to only a subrange of the page. @domid
* will only be allowed to copy from the grant, and not
* map it. [GST]
*/
#define _GTF_readonly (2)
#define GTF_readonly (1U << _GTF_readonly)
#define _GTF_reading (3)
#define GTF_reading (1U << _GTF_reading)
#define _GTF_writing (4)
#define GTF_writing (1U << _GTF_writing)
#define _GTF_PWT (5)
#define GTF_PWT (1U << _GTF_PWT)
#define _GTF_PCD (6)
#define GTF_PCD (1U << _GTF_PCD)
#define _GTF_PAT (7)
#define GTF_PAT (1U << _GTF_PAT)
#define _GTF_sub_page (8)
#define GTF_sub_page (1U << _GTF_sub_page)
/*
* Subflags for GTF_accept_transfer:
* GTF_transfer_committed: Xen sets this flag to indicate that it is committed
* to transferring ownership of a page frame. When a guest sees this flag
* it must /not/ modify the grant entry until GTF_transfer_completed is
* set by Xen.
* GTF_transfer_completed: It is safe for the guest to spin-wait on this flag
* after reading GTF_transfer_committed. Xen will always write the frame
* address, followed by ORing this flag, in a timely manner.
*/
#define _GTF_transfer_committed (2)
#define GTF_transfer_committed (1U << _GTF_transfer_committed)
#define _GTF_transfer_completed (3)
#define GTF_transfer_completed (1U << _GTF_transfer_completed)
/***********************************
* GRANT TABLE QUERIES AND USES
*/
/* ` enum neg_errnoval
* ` HYPERVISOR_grant_table_op(enum grant_table_op cmd,
* ` void *args,
* ` unsigned int count)
* `
*
* @args points to an array of a per-command data structure. The array
* has @count members
*/
/* ` enum grant_table_op { // GNTTABOP_* => struct gnttab_* */
#define GNTTABOP_map_grant_ref 0
#define GNTTABOP_unmap_grant_ref 1
#define GNTTABOP_setup_table 2
#define GNTTABOP_dump_table 3
#define GNTTABOP_transfer 4
#define GNTTABOP_copy 5
#define GNTTABOP_query_size 6
#define GNTTABOP_unmap_and_replace 7
#if __XEN_INTERFACE_VERSION__ >= 0x0003020a
#define GNTTABOP_set_version 8
#define GNTTABOP_get_status_frames 9
#define GNTTABOP_get_version 10
#define GNTTABOP_swap_grant_ref 11
#define GNTTABOP_cache_flush 12
#endif /* __XEN_INTERFACE_VERSION__ */
/* ` } */
/*
* Handle to track a mapping created via a grant reference.
*/
typedef uint32_t grant_handle_t;
/*
* GNTTABOP_map_grant_ref: Map the grant entry (<dom>,<ref>) for access
* by devices and/or host CPUs. If successful, <handle> is a tracking number
* that must be presented later to destroy the mapping(s). On error, <status>
* is a negative status code.
* NOTES:
* 1. If GNTMAP_device_map is specified then <dev_bus_addr> is the address
* via which I/O devices may access the granted frame.
* 2. If GNTMAP_host_map is specified then a mapping will be added at
* either a host virtual address in the current address space, or at
* a PTE at the specified machine address. The type of mapping to
* perform is selected through the GNTMAP_contains_pte flag, and the
* address is specified in <host_addr>.
* 3. Mappings should only be destroyed via GNTTABOP_unmap_grant_ref. If a
* host mapping is destroyed by other means then it is *NOT* guaranteed
* to be accounted to the correct grant reference!
*/
struct gnttab_map_grant_ref {
/* IN parameters. */
uint64_t host_addr;
uint32_t flags; /* GNTMAP_* */
grant_ref_t ref;
domid_t dom;
/* OUT parameters. */
int16_t status; /* => enum grant_status */
grant_handle_t handle;
uint64_t dev_bus_addr;
};
typedef struct gnttab_map_grant_ref gnttab_map_grant_ref_t;
DEFINE_XEN_GUEST_HANDLE(gnttab_map_grant_ref_t);
/*
* GNTTABOP_unmap_grant_ref: Destroy one or more grant-reference mappings
* tracked by <handle>. If <host_addr> or <dev_bus_addr> is zero, that
* field is ignored. If non-zero, they must refer to a device/host mapping
* that is tracked by <handle>
* NOTES:
* 1. The call may fail in an undefined manner if either mapping is not
* tracked by <handle>.
* 3. After executing a batch of unmaps, it is guaranteed that no stale
* mappings will remain in the device or host TLBs.
*/
struct gnttab_unmap_grant_ref {
/* IN parameters. */
uint64_t host_addr;
uint64_t dev_bus_addr;
grant_handle_t handle;
/* OUT parameters. */
int16_t status; /* => enum grant_status */
};
typedef struct gnttab_unmap_grant_ref gnttab_unmap_grant_ref_t;
DEFINE_XEN_GUEST_HANDLE(gnttab_unmap_grant_ref_t);
/*
* GNTTABOP_setup_table: Set up a grant table for <dom> comprising at least
* <nr_frames> pages. The frame addresses are written to the <frame_list>.
* Only <nr_frames> addresses are written, even if the table is larger.
* NOTES:
* 1. <dom> may be specified as DOMID_SELF.
* 2. Only a sufficiently-privileged domain may specify <dom> != DOMID_SELF.
* 3. Xen may not support more than a single grant-table page per domain.
*/
struct gnttab_setup_table {
/* IN parameters. */
domid_t dom;
uint32_t nr_frames;
/* OUT parameters. */
int16_t status; /* => enum grant_status */
#if __XEN_INTERFACE_VERSION__ < 0x00040300
XEN_GUEST_HANDLE(ulong) frame_list;
#else
XEN_GUEST_HANDLE(xen_pfn_t) frame_list;
#endif
};
typedef struct gnttab_setup_table gnttab_setup_table_t;
DEFINE_XEN_GUEST_HANDLE(gnttab_setup_table_t);
/*
* Bitfield values for gnttab_map_grant_ref.flags.
*/
/* Map the grant entry for access by I/O devices. */
#define _GNTMAP_device_map (0)
#define GNTMAP_device_map (1<<_GNTMAP_device_map)
/* Map the grant entry for access by host CPUs. */
#define _GNTMAP_host_map (1)
#define GNTMAP_host_map (1<<_GNTMAP_host_map)
/* Accesses to the granted frame will be restricted to read-only access. */
#define _GNTMAP_readonly (2)
#define GNTMAP_readonly (1<<_GNTMAP_readonly)
/*
* GNTMAP_host_map subflag:
* 0 => The host mapping is usable only by the guest OS.
* 1 => The host mapping is usable by guest OS + current application.
*/
#define _GNTMAP_application_map (3)
#define GNTMAP_application_map (1<<_GNTMAP_application_map)
/*
* GNTMAP_contains_pte subflag:
* 0 => This map request contains a host virtual address.
* 1 => This map request contains the machine address of the PTE to update.
*/
#define _GNTMAP_contains_pte (4)
#define GNTMAP_contains_pte (1<<_GNTMAP_contains_pte)
/*
* Bits to be placed in guest kernel available PTE bits (architecture
* dependent; only supported when XENFEAT_gnttab_map_avail_bits is set).
*/
#define _GNTMAP_guest_avail0 (16)
#define GNTMAP_guest_avail_mask ((uint32_t)~0 << _GNTMAP_guest_avail0)
/*
* Values for error status returns. All errors are -ve.
*/
/* ` enum grant_status { */
#define GNTST_okay (0) /* Normal return */
#define GNTST_general_error (-1) /* General undefined error */
#define GNTST_bad_domain (-2) /* Unrecognsed domain id */
#define GNTST_bad_gntref (-3) /* Unrecognised or inappropriate gntref */
#define GNTST_bad_handle (-4) /* Unrecognised or inappropriate handle */
#define GNTST_bad_virt_addr (-5) /* Inappropriate virtual address to map */
#define GNTST_bad_dev_addr (-6) /* Inappropriate device address to unmap */
#define GNTST_no_device_space (-7) /* Out of space in I/O MMU */
#define GNTST_permission_denied (-8) /* Not enough privilege for operation */
#define GNTST_bad_page (-9) /* Specified page was invalid for op */
#define GNTST_bad_copy_arg (-10) /* copy arguments cross page boundary */
#define GNTST_address_too_big (-11) /* transfer page address too large */
#define GNTST_eagain (-12) /* Operation not done; try again */
/* ` } */
#define GNTTABOP_error_msgs { \
"okay", \
"undefined error", \
"unrecognised domain id", \
"invalid grant reference", \
"invalid mapping handle", \
"invalid virtual address", \
"invalid device address", \
"no spare translation slot in the I/O MMU", \
"permission denied", \
"bad page", \
"copy arguments cross page boundary", \
"page address size too large", \
"operation not done; try again" \
}
#endif /* __XEN_PUBLIC_GRANT_TABLE_H__ */
``` | /content/code_sandbox/include/zephyr/xen/public/grant_table.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 4,132 |
```objective-c
/******************************************************************************
* sched.h
*
* Scheduler state interactions
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to
* deal in the Software without restriction, including without limitation the
* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*
*/
#ifndef __XEN_PUBLIC_SCHED_H__
#define __XEN_PUBLIC_SCHED_H__
#include "event_channel.h"
/*
* `incontents 150 sched Guest Scheduler Operations
*
* The SCHEDOP interface provides mechanisms for a guest to interact
* with the scheduler, including yield, blocking and shutting itself
* down.
*/
/*
* The prototype for this hypercall is:
* ` long HYPERVISOR_sched_op(enum sched_op cmd, void *arg, ...)
*
* @cmd == SCHEDOP_??? (scheduler operation).
* @arg == Operation-specific extra argument(s), as described below.
* ... == Additional Operation-specific extra arguments, described below.
*
* Versions of Xen prior to 3.0.2 provided only the following legacy version
* of this hypercall, supporting only the commands yield, block and shutdown:
* long sched_op(int cmd, unsigned long arg)
* @cmd == SCHEDOP_??? (scheduler operation).
* @arg == 0 (SCHEDOP_yield and SCHEDOP_block)
* == SHUTDOWN_* code (SCHEDOP_shutdown)
*
* This legacy version is available to new guests as:
* ` long HYPERVISOR_sched_op_compat(enum sched_op cmd, unsigned long arg)
*/
/*
* Voluntarily yield the CPU.
* @arg == NULL.
*/
#define SCHEDOP_yield 0
/*
* Block execution of this VCPU until an event is received for processing.
* If called with event upcalls masked, this operation will atomically
* reenable event delivery and check for pending events before blocking the
* VCPU. This avoids a "wakeup waiting" race.
* @arg == NULL.
*/
#define SCHEDOP_block 1
/*
* Halt execution of this domain (all VCPUs) and notify the system controller.
* @arg == pointer to sched_shutdown_t structure.
*
* If the sched_shutdown_t reason is SHUTDOWN_suspend then
* x86 PV guests must also set RDX (EDX for 32-bit guests) to the MFN
* of the guest's start info page. RDX/EDX is the third hypercall
* argument.
*
* In addition, which reason is SHUTDOWN_suspend this hypercall
* returns 1 if suspend was cancelled or the domain was merely
* checkpointed, and 0 if it is resuming in a new domain.
*/
#define SCHEDOP_shutdown 2
/*
* Poll a set of event-channel ports. Return when one or more are pending. An
* optional timeout may be specified.
* @arg == pointer to sched_poll_t structure.
*/
#define SCHEDOP_poll 3
/*
* Declare a shutdown for another domain. The main use of this function is
* in interpreting shutdown requests and reasons for fully-virtualized
* domains. A para-virtualized domain may use SCHEDOP_shutdown directly.
* @arg == pointer to sched_remote_shutdown_t structure.
*/
#define SCHEDOP_remote_shutdown 4
/*
* Latch a shutdown code, so that when the domain later shuts down it
* reports this code to the control tools.
* @arg == sched_shutdown_t, as for SCHEDOP_shutdown.
*/
#define SCHEDOP_shutdown_code 5
/*
* Setup, poke and destroy a domain watchdog timer.
* @arg == pointer to sched_watchdog_t structure.
* With id == 0, setup a domain watchdog timer to cause domain shutdown
* after timeout, returns watchdog id.
* With id != 0 and timeout == 0, destroy domain watchdog timer.
* With id != 0 and timeout != 0, poke watchdog timer and set new timeout.
*/
#define SCHEDOP_watchdog 6
/*
* Override the current vcpu affinity by pinning it to one physical cpu or
* undo this override restoring the previous affinity.
* @arg == pointer to sched_pin_override_t structure.
*
* A negative pcpu value will undo a previous pin override and restore the
* previous cpu affinity.
* This call is allowed for the hardware domain only and requires the cpu
* to be part of the domain's cpupool.
*/
#define SCHEDOP_pin_override 7
struct sched_shutdown {
unsigned int reason; /* SHUTDOWN_* => enum sched_shutdown_reason */
};
typedef struct sched_shutdown sched_shutdown_t;
DEFINE_XEN_GUEST_HANDLE(sched_shutdown_t);
struct sched_poll {
XEN_GUEST_HANDLE(evtchn_port_t) ports;
unsigned int nr_ports;
uint64_t timeout;
};
typedef struct sched_poll sched_poll_t;
DEFINE_XEN_GUEST_HANDLE(sched_poll_t);
struct sched_remote_shutdown {
domid_t domain_id; /* Remote domain ID */
unsigned int reason; /* SHUTDOWN_* => enum sched_shutdown_reason */
};
typedef struct sched_remote_shutdown sched_remote_shutdown_t;
DEFINE_XEN_GUEST_HANDLE(sched_remote_shutdown_t);
struct sched_watchdog {
uint32_t id; /* watchdog ID */
uint32_t timeout; /* timeout */
};
typedef struct sched_watchdog sched_watchdog_t;
DEFINE_XEN_GUEST_HANDLE(sched_watchdog_t);
struct sched_pin_override {
int32_t pcpu;
};
typedef struct sched_pin_override sched_pin_override_t;
DEFINE_XEN_GUEST_HANDLE(sched_pin_override_t);
/*
* Reason codes for SCHEDOP_shutdown. These may be interpreted by control
* software to determine the appropriate action. For the most part, Xen does
* not care about the shutdown code.
*/
/* Domain exited normally. Clean up and kill. */
#define SHUTDOWN_poweroff 0
/* Clean up, kill, and then restart. */
#define SHUTDOWN_reboot 1
/* Clean up, save suspend info, kill. */
#define SHUTDOWN_suspend 2
/* Tell controller we've crashed. */
#define SHUTDOWN_crash 3
/* Restart because watchdog time expired. */
#define SHUTDOWN_watchdog 4
/*
* Domain asked to perform 'soft reset' for it. The expected behavior is to
* reset internal Xen state for the domain returning it to the point where it
* was created but leaving the domain's memory contents and vCPU contexts
* intact. This will allow the domain to start over and set up all Xen specific
* interfaces again.
*/
#define SHUTDOWN_soft_reset 5
/* Maximum valid shutdown reason. */
#define SHUTDOWN_MAX 5
#endif /* __XEN_PUBLIC_SCHED_H__ */
``` | /content/code_sandbox/include/zephyr/xen/public/sched.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,567 |
```objective-c
/******************************************************************************
* memory.h
*
* Memory reservation and information.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to
* deal in the Software without restriction, including without limitation the
* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*
*/
#ifndef __XEN_PUBLIC_MEMORY_H__
#define __XEN_PUBLIC_MEMORY_H__
#include "xen.h"
#define XENMEM_populate_physmap 6
struct xen_memory_reservation {
/*
* XENMEM_increase_reservation:
* OUT: MFN (*not* GMFN) bases of extents that were allocated
* XENMEM_decrease_reservation:
* IN: GMFN bases of extents to free
* XENMEM_populate_physmap:
* IN: GPFN bases of extents to populate with memory
* OUT: GMFN bases of extents that were allocated
* (NB. This command also updates the mach_to_phys translation table)
* XENMEM_claim_pages:
* IN: must be zero
*/
XEN_GUEST_HANDLE(xen_pfn_t) extent_start;
/* Number of extents, and size/alignment of each (2^extent_order pages). */
xen_ulong_t nr_extents;
unsigned int extent_order;
#if __XEN_INTERFACE_VERSION__ >= 0x00030209
/* XENMEMF flags. */
unsigned int mem_flags;
#else
unsigned int address_bits;
#endif
/*
* Domain whose reservation is being changed.
* Unprivileged domains can specify only DOMID_SELF.
*/
domid_t domid;
};
typedef struct xen_memory_reservation xen_memory_reservation_t;
DEFINE_XEN_GUEST_HANDLE(xen_memory_reservation_t);
/* A batched version of add_to_physmap. */
#define XENMEM_add_to_physmap_batch 23
struct xen_add_to_physmap_batch {
/* IN */
/* Which domain to change the mapping for. */
domid_t domid;
uint16_t space; /* => enum phys_map_space */
/* Number of pages to go through */
uint16_t size;
#if __XEN_INTERFACE_VERSION__ < 0x00040700
domid_t foreign_domid; /* IFF gmfn_foreign. Should be 0 for other spaces. */
#else
union xen_add_to_physmap_batch_extra {
domid_t foreign_domid; /* gmfn_foreign */
uint16_t res0; /* All the other spaces. Should be 0 */
} u;
#endif
/* Indexes into space being mapped. */
XEN_GUEST_HANDLE(xen_ulong_t) idxs;
/* GPFN in domid where the source mapping page should appear. */
XEN_GUEST_HANDLE(xen_pfn_t) gpfns;
/* OUT */
/* Per index error code. */
XEN_GUEST_HANDLE(int) errs;
};
typedef struct xen_add_to_physmap_batch xen_add_to_physmap_batch_t;
DEFINE_XEN_GUEST_HANDLE(xen_add_to_physmap_batch_t);
#define XENMAPSPACE_shared_info 0 /* shared info page */
#define XENMAPSPACE_grant_table 1 /* grant table page */
#define XENMAPSPACE_gmfn 2 /* GMFN */
/* GMFN range, XENMEM_add_to_physmap only.*/
#define XENMAPSPACE_gmfn_range 3
/* GMFN from another dom, XENMEM_add_to_physmap_batch only. */
#define XENMAPSPACE_gmfn_foreign 4
/*
* Device mmio region ARM only; the region is mapped in Stage-2 using the
* Normal Memory Inner/Outer Write-Back Cacheable memory attribute.
*/
#define XENMAPSPACE_dev_mmio 5
/*
* Sets the GPFN at which a particular page appears in the specified guest's
* physical address space (translated guests only).
* arg == addr of xen_add_to_physmap_t.
*/
#define XENMEM_add_to_physmap 7
struct xen_add_to_physmap {
/* Which domain to change the mapping for. */
domid_t domid;
/* Number of pages to go through for gmfn_range */
uint16_t size;
unsigned int space; /* => enum phys_map_space */
#define XENMAPIDX_grant_table_status 0x80000000
/* Index into space being mapped. */
xen_ulong_t idx;
/* GPFN in domid where the source mapping page should appear. */
xen_pfn_t gpfn;
};
typedef struct xen_add_to_physmap xen_add_to_physmap_t;
DEFINE_XEN_GUEST_HANDLE(xen_add_to_physmap_t);
/*
* Unmaps the page appearing at a particular GPFN from the specified guest's
* physical address space (translated guests only).
* arg == addr of xen_remove_from_physmap_t.
*/
#define XENMEM_remove_from_physmap 15
struct xen_remove_from_physmap {
/* Which domain to change the mapping for. */
domid_t domid;
/* GPFN of the current mapping of the page. */
xen_pfn_t gpfn;
};
typedef struct xen_remove_from_physmap xen_remove_from_physmap_t;
DEFINE_XEN_GUEST_HANDLE(xen_remove_from_physmap_t);
#endif /* __XEN_PUBLIC_MEMORY_H__ */
``` | /content/code_sandbox/include/zephyr/xen/public/memory.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,297 |
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