text stringlengths 9 39.2M | dir stringlengths 25 226 | lang stringclasses 163 values | created_date timestamp[s] | updated_date timestamp[s] | repo_name stringclasses 751 values | repo_full_name stringclasses 752 values | star int64 1.01k 183k | len_tokens int64 1 18.5M |
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```objective-c
/******************************************************************************
* domctl.h
*
* Domain management operations. For use by node control stack.
*
*/
#ifndef __XEN_PUBLIC_DOMCTL_H__
#define __XEN_PUBLIC_DOMCTL_H__
#ifndef CONFIG_XEN_DOM0
#error "domctl operations are intended for use by node control tools only"
#endif
#include "xen.h"
#include "event_channel.h"
#include "grant_table.h"
#include "memory.h"
#define XEN_DOMCTL_INTERFACE_VERSION 0x00000015
/*
* NB. xen_domctl.domain is an IN/OUT parameter for this operation.
* If it is specified as an invalid value (0 or >= DOMID_FIRST_RESERVED),
* an id is auto-allocated and returned.
*/
/* XEN_DOMCTL_createdomain */
struct xen_domctl_createdomain {
/* IN parameters */
uint32_t ssidref;
xen_domain_handle_t handle;
/* Is this an HVM guest (as opposed to a PV guest)? */
#define _XEN_DOMCTL_CDF_hvm 0
#define XEN_DOMCTL_CDF_hvm (1U << _XEN_DOMCTL_CDF_hvm)
/* Use hardware-assisted paging if available? */
#define _XEN_DOMCTL_CDF_hap 1
#define XEN_DOMCTL_CDF_hap (1U << _XEN_DOMCTL_CDF_hap)
/* Should domain memory integrity be verified by tboot during Sx? */
#define _XEN_DOMCTL_CDF_s3_integrity 2
#define XEN_DOMCTL_CDF_s3_integrity (1U << _XEN_DOMCTL_CDF_s3_integrity)
/* Disable out-of-sync shadow page tables? */
#define _XEN_DOMCTL_CDF_oos_off 3
#define XEN_DOMCTL_CDF_oos_off (1U << _XEN_DOMCTL_CDF_oos_off)
/* Is this a xenstore domain? */
#define _XEN_DOMCTL_CDF_xs_domain 4
#define XEN_DOMCTL_CDF_xs_domain (1U << _XEN_DOMCTL_CDF_xs_domain)
/* Should this domain be permitted to use the IOMMU? */
#define _XEN_DOMCTL_CDF_iommu 5
#define XEN_DOMCTL_CDF_iommu (1U << _XEN_DOMCTL_CDF_iommu)
#define _XEN_DOMCTL_CDF_nested_virt 6
#define XEN_DOMCTL_CDF_nested_virt (1U << _XEN_DOMCTL_CDF_nested_virt)
/* Should we expose the vPMU to the guest? */
#define XEN_DOMCTL_CDF_vpmu (1U << 7)
/* Max XEN_DOMCTL_CDF_* constant. Used for ABI checking. */
#define XEN_DOMCTL_CDF_MAX XEN_DOMCTL_CDF_vpmu
uint32_t flags;
#define _XEN_DOMCTL_IOMMU_no_sharept 0
#define XEN_DOMCTL_IOMMU_no_sharep (1U << _XEN_DOMCTL_IOMMU_no_sharept)
/* Max XEN_DOMCTL_IOMMU_* constant. Used for ABI checking. */
#define XEN_DOMCTL_IOMMU_MAX XEN_DOMCTL_IOMMU_no_sharept
uint32_t iommu_opts;
/*
* Various domain limits, which impact the quantity of resources
* (global mapping space, xenheap, etc) a guest may consume. For
* max_grant_frames and max_maptrack_frames, < 0 means "use the
* default maximum value in the hypervisor".
*/
uint32_t max_vcpus;
uint32_t max_evtchn_port;
int32_t max_grant_frames;
int32_t max_maptrack_frames;
/* Grant version, use low 4 bits. */
#define XEN_DOMCTL_GRANT_version_mask 0xf
#define XEN_DOMCTL_GRANT_version(v) ((v) & XEN_DOMCTL_GRANT_version_mask)
uint32_t grant_opts;
/* Per-vCPU buffer size in bytes. 0 to disable. */
uint32_t vmtrace_size;
/* CPU pool to use; specify 0 or a specific existing pool */
uint32_t cpupool_id;
struct xen_arch_domainconfig arch;
};
/* XEN_DOMCTL_getdomaininfo */
struct xen_domctl_getdomaininfo {
/* OUT variables. */
domid_t domain; /* Also echoed in domctl.domain */
uint16_t pad1;
/* Domain is scheduled to die. */
#define _XEN_DOMINF_dying 0
#define XEN_DOMINF_dying (1U << _XEN_DOMINF_dying)
/* Domain is an HVM guest (as opposed to a PV guest). */
#define _XEN_DOMINF_hvm_guest 1
#define XEN_DOMINF_hvm_guest (1U << _XEN_DOMINF_hvm_guest)
/* The guest OS has shut down. */
#define _XEN_DOMINF_shutdown 2
#define XEN_DOMINF_shutdown (1U << _XEN_DOMINF_shutdown)
/* Currently paused by control software. */
#define _XEN_DOMINF_paused 3
#define XEN_DOMINF_paused (1U << _XEN_DOMINF_paused)
/* Currently blocked pending an event. */
#define _XEN_DOMINF_blocked 4
#define XEN_DOMINF_blocked (1U << _XEN_DOMINF_blocked)
/* Domain is currently running. */
#define _XEN_DOMINF_running 5
#define XEN_DOMINF_running (1U << _XEN_DOMINF_running)
/* Being debugged. */
#define _XEN_DOMINF_debugged 6
#define XEN_DOMINF_debugged (1U << _XEN_DOMINF_debugged)
/* domain is a xenstore domain */
#define _XEN_DOMINF_xs_domain 7
#define XEN_DOMINF_xs_domain (1U << _XEN_DOMINF_xs_domain)
/* domain has hardware assisted paging */
#define _XEN_DOMINF_hap 8
#define XEN_DOMINF_hap (1U << _XEN_DOMINF_hap)
/* XEN_DOMINF_shutdown guest-supplied code. */
#define XEN_DOMINF_shutdownmask 255
#define XEN_DOMINF_shutdownshift 16
uint32_t flags; /* XEN_DOMINF_* */
uint64_aligned_t tot_pages;
uint64_aligned_t max_pages;
uint64_aligned_t outstanding_pages;
uint64_aligned_t shr_pages;
uint64_aligned_t paged_pages;
uint64_aligned_t shared_info_frame; /* GMFN of shared_info struct */
uint64_aligned_t cpu_time;
uint32_t nr_online_vcpus; /* Number of VCPUs currently online. */
#define XEN_INVALID_MAX_VCPU_ID (~0U) /* Domain has no vcpus? */
uint32_t max_vcpu_id; /* Maximum VCPUID in use by this domain. */
uint32_t ssidref;
xen_domain_handle_t handle;
uint32_t cpupool;
uint8_t gpaddr_bits; /* Guest physical address space size. */
uint8_t pad2[7];
struct xen_arch_domainconfig arch_config;
};
typedef struct xen_domctl_getdomaininfo xen_domctl_getdomaininfo_t;
DEFINE_XEN_GUEST_HANDLE(xen_domctl_getdomaininfo_t);
/*
* Control shadow pagetables operation
*/
/* XEN_DOMCTL_shadow_op */
/* Memory allocation accessors. */
#define XEN_DOMCTL_SHADOW_OP_GET_ALLOCATION 30
#define XEN_DOMCTL_SHADOW_OP_SET_ALLOCATION 31
struct xen_domctl_shadow_op_stats {
uint32_t fault_count;
uint32_t dirty_count;
};
struct xen_domctl_shadow_op {
/* IN variables. */
uint32_t op; /* XEN_DOMCTL_SHADOW_OP_* */
/* OP_ENABLE: XEN_DOMCTL_SHADOW_ENABLE_* */
/* OP_PEAK / OP_CLEAN: XEN_DOMCTL_SHADOW_LOGDIRTY_* */
uint32_t mode;
/* OP_GET_ALLOCATION / OP_SET_ALLOCATION */
uint32_t mb; /* Shadow memory allocation in MB */
/* OP_PEEK / OP_CLEAN */
XEN_GUEST_HANDLE_64(uint8_t) dirty_bitmap;
uint64_aligned_t pages; /* Size of buffer. Updated with actual size. */
struct xen_domctl_shadow_op_stats stats;
};
/* XEN_DOMCTL_max_mem */
struct xen_domctl_max_mem {
/* IN variables. */
uint64_aligned_t max_memkb;
};
/* XEN_DOMCTL_setvcpucontext */
/* XEN_DOMCTL_getvcpucontext */
struct xen_domctl_vcpucontext {
uint32_t vcpu; /* IN */
XEN_GUEST_HANDLE_64(vcpu_guest_context_t) ctxt; /* IN/OUT */
};
/*
* XEN_DOMCTL_max_vcpus:
*
* The parameter passed to XEN_DOMCTL_max_vcpus must match the value passed to
* XEN_DOMCTL_createdomain. This hypercall is in the process of being removed
* (once the failure paths in domain_create() have been improved), but is
* still required in the short term to allocate the vcpus themselves.
*/
struct xen_domctl_max_vcpus {
uint32_t max; /* maximum number of vcpus */
};
/* XEN_DOMCTL_scheduler_op */
/* Scheduler types. */
/* #define XEN_SCHEDULER_SEDF 4 (Removed) */
#define XEN_SCHEDULER_CREDIT 5
#define XEN_SCHEDULER_CREDIT2 6
#define XEN_SCHEDULER_ARINC653 7
#define XEN_SCHEDULER_RTDS 8
#define XEN_SCHEDULER_NULL 9
struct xen_domctl_sched_credit {
uint16_t weight;
uint16_t cap;
};
struct xen_domctl_sched_credit2 {
uint16_t weight;
uint16_t cap;
};
struct xen_domctl_sched_rtds {
uint32_t period;
uint32_t budget;
/* Can this vCPU execute beyond its reserved amount of time? */
#define _XEN_DOMCTL_SCHEDRT_extra 0
#define XEN_DOMCTL_SCHEDRT_extra (1U<<_XEN_DOMCTL_SCHEDRT_extra)
uint32_t flags;
};
typedef struct xen_domctl_schedparam_vcpu {
union {
struct xen_domctl_sched_credit credit;
struct xen_domctl_sched_credit2 credit2;
struct xen_domctl_sched_rtds rtds;
} u;
uint32_t vcpuid;
} xen_domctl_schedparam_vcpu_t;
DEFINE_XEN_GUEST_HANDLE(xen_domctl_schedparam_vcpu_t);
/*
* Set or get info?
* For schedulers supporting per-vcpu settings (e.g., RTDS):
* XEN_DOMCTL_SCHEDOP_putinfo sets params for all vcpus;
* XEN_DOMCTL_SCHEDOP_getinfo gets default params;
* XEN_DOMCTL_SCHEDOP_put(get)vcpuinfo sets (gets) params of vcpus;
*
* For schedulers not supporting per-vcpu settings:
* XEN_DOMCTL_SCHEDOP_putinfo sets params for all vcpus;
* XEN_DOMCTL_SCHEDOP_getinfo gets domain-wise params;
* XEN_DOMCTL_SCHEDOP_put(get)vcpuinfo returns error;
*/
#define XEN_DOMCTL_SCHEDOP_putinfo 0
#define XEN_DOMCTL_SCHEDOP_getinfo 1
#define XEN_DOMCTL_SCHEDOP_putvcpuinfo 2
#define XEN_DOMCTL_SCHEDOP_getvcpuinfo 3
struct xen_domctl_scheduler_op {
uint32_t sched_id; /* XEN_SCHEDULER_* */
uint32_t cmd; /* XEN_DOMCTL_SCHEDOP_* */
/* IN/OUT */
union {
struct xen_domctl_sched_credit credit;
struct xen_domctl_sched_credit2 credit2;
struct xen_domctl_sched_rtds rtds;
struct {
XEN_GUEST_HANDLE_64(xen_domctl_schedparam_vcpu_t) vcpus;
/*
* IN: Number of elements in vcpus array.
* OUT: Number of processed elements of vcpus array.
*/
uint32_t nr_vcpus;
uint32_t padding;
} v;
} u;
};
/* XEN_DOMCTL_iomem_permission */
struct xen_domctl_iomem_permission {
uint64_aligned_t first_mfn;/* first page (physical page number) in range */
uint64_aligned_t nr_mfns; /* number of pages in range (>0) */
uint8_t allow_access; /* allow (!0) or deny (0) access to range? */
};
/* XEN_DOMCTL_set_address_size */
/* XEN_DOMCTL_get_address_size */
struct xen_domctl_address_size {
uint32_t size;
};
/* Assign a device to a guest. Sets up IOMMU structures. */
/* XEN_DOMCTL_assign_device */
/*
* XEN_DOMCTL_test_assign_device: Pass DOMID_INVALID to find out whether the
* given device is assigned to any DomU at all. Pass a specific domain ID to
* find out whether the given device can be assigned to that domain.
*/
/*
* XEN_DOMCTL_deassign_device: The behavior of this DOMCTL differs
* between the different type of device:
* - PCI device (XEN_DOMCTL_DEV_PCI) will be reassigned to DOM0
* - DT device (XEN_DOMCTL_DEV_DT) will left unassigned. DOM0
* will have to call XEN_DOMCTL_assign_device in order to use the
* device.
*/
#define XEN_DOMCTL_DEV_PCI 0
#define XEN_DOMCTL_DEV_DT 1
struct xen_domctl_assign_device {
/* IN */
uint32_t dev; /* XEN_DOMCTL_DEV_* */
uint32_t flags;
#define XEN_DOMCTL_DEV_RDM_RELAXED 1 /* assign only */
union {
struct {
uint32_t machine_sbdf; /* machine PCI ID of assigned device */
} pci;
struct {
uint32_t size; /* Length of the path */
XEN_GUEST_HANDLE_64(char) path; /* path to the device tree node */
} dt;
} u;
};
/* Pass-through interrupts: bind real irq -> hvm devfn. */
/* XEN_DOMCTL_bind_pt_irq */
/* XEN_DOMCTL_unbind_pt_irq */
enum pt_irq_type {
PT_IRQ_TYPE_PCI,
PT_IRQ_TYPE_ISA,
PT_IRQ_TYPE_MSI,
PT_IRQ_TYPE_MSI_TRANSLATE,
PT_IRQ_TYPE_SPI, /* ARM: valid range 32-1019 */
};
struct xen_domctl_bind_pt_irq {
uint32_t machine_irq;
uint32_t irq_type; /* enum pt_irq_type */
union {
struct {
uint8_t isa_irq;
} isa;
struct {
uint8_t bus;
uint8_t device;
uint8_t intx;
} pci;
struct {
uint8_t gvec;
uint32_t gflags;
#define XEN_DOMCTL_VMSI_X86_DEST_ID_MASK 0x0000ff
#define XEN_DOMCTL_VMSI_X86_RH_MASK 0x000100
#define XEN_DOMCTL_VMSI_X86_DM_MASK 0x000200
#define XEN_DOMCTL_VMSI_X86_DELIV_MASK 0x007000
#define XEN_DOMCTL_VMSI_X86_TRIG_MASK 0x008000
#define XEN_DOMCTL_VMSI_X86_UNMASKED 0x010000
uint64_aligned_t gtable;
} msi;
struct {
uint16_t spi;
} spi;
} u;
};
/* Bind machine I/O address range -> HVM address range. */
/* XEN_DOMCTL_memory_mapping */
/* Returns
* - zero success, everything done
* - -E2BIG passed in nr_mfns value too large for the implementation
* - positive partial success for the first <result> page frames (with
* <result> less than nr_mfns), requiring re-invocation by the
* caller after updating inputs
* - negative error; other than -E2BIG
*/
#define DPCI_ADD_MAPPING 1
#define DPCI_REMOVE_MAPPING 0
struct xen_domctl_memory_mapping {
uint64_aligned_t first_gfn; /* first page (hvm guest phys page) in range */
uint64_aligned_t first_mfn; /* first page (machine page) in range */
uint64_aligned_t nr_mfns; /* number of pages in range (>0) */
uint32_t add_mapping; /* add or remove mapping */
uint32_t padding; /* padding for 64-bit aligned structure */
};
/*
* ARM: Clean and invalidate caches associated with given region of
* guest memory.
*/
struct xen_domctl_cacheflush {
/* IN: page range to flush. */
xen_pfn_t start_pfn, nr_pfns;
};
/*
* XEN_DOMCTL_get_paging_mempool_size / XEN_DOMCTL_set_paging_mempool_size.
*
* Get or set the paging memory pool size. The size is in bytes.
*
* This is a dedicated pool of memory for Xen to use while managing the guest,
* typically containing pagetables. As such, there is an implementation
* specific minimum granularity.
*
* The set operation can fail mid-way through the request (e.g. Xen running
* out of memory, no free memory to reclaim from the pool, etc.).
*/
struct xen_domctl_paging_mempool {
uint64_aligned_t size; /* Size in bytes. */
};
struct xen_domctl {
uint32_t cmd;
#define XEN_DOMCTL_createdomain 1
#define XEN_DOMCTL_destroydomain 2
#define XEN_DOMCTL_pausedomain 3
#define XEN_DOMCTL_unpausedomain 4
#define XEN_DOMCTL_getdomaininfo 5
#define XEN_DOMCTL_setvcpuaffinity 9
#define XEN_DOMCTL_shadow_op 10
#define XEN_DOMCTL_max_mem 11
#define XEN_DOMCTL_setvcpucontext 12
#define XEN_DOMCTL_getvcpucontext 13
#define XEN_DOMCTL_getvcpuinfo 14
#define XEN_DOMCTL_max_vcpus 15
#define XEN_DOMCTL_scheduler_op 16
#define XEN_DOMCTL_setdomainhandle 17
#define XEN_DOMCTL_setdebugging 18
#define XEN_DOMCTL_irq_permission 19
#define XEN_DOMCTL_iomem_permission 20
#define XEN_DOMCTL_ioport_permission 21
#define XEN_DOMCTL_hypercall_init 22
#define XEN_DOMCTL_settimeoffset 24
#define XEN_DOMCTL_getvcpuaffinity 25
#define XEN_DOMCTL_real_mode_area 26 /* Obsolete PPC only */
#define XEN_DOMCTL_resumedomain 27
#define XEN_DOMCTL_sendtrigger 28
#define XEN_DOMCTL_subscribe 29
#define XEN_DOMCTL_gethvmcontext 33
#define XEN_DOMCTL_sethvmcontext 34
#define XEN_DOMCTL_set_address_size 35
#define XEN_DOMCTL_get_address_size 36
#define XEN_DOMCTL_assign_device 37
#define XEN_DOMCTL_bind_pt_irq 38
#define XEN_DOMCTL_memory_mapping 39
#define XEN_DOMCTL_ioport_mapping 40
#define XEN_DOMCTL_set_ext_vcpucontext 42
#define XEN_DOMCTL_get_ext_vcpucontext 43
#define XEN_DOMCTL_set_opt_feature 44 /* Obsolete IA64 only */
#define XEN_DOMCTL_test_assign_device 45
#define XEN_DOMCTL_set_target 46
#define XEN_DOMCTL_deassign_device 47
#define XEN_DOMCTL_unbind_pt_irq 48
#define XEN_DOMCTL_get_device_group 50
#define XEN_DOMCTL_debug_op 54
#define XEN_DOMCTL_gethvmcontext_partial 55
#define XEN_DOMCTL_vm_event_op 56
#define XEN_DOMCTL_mem_sharing_op 57
#define XEN_DOMCTL_gettscinfo 59
#define XEN_DOMCTL_settscinfo 60
#define XEN_DOMCTL_getpageframeinfo3 61
#define XEN_DOMCTL_setvcpuextstate 62
#define XEN_DOMCTL_getvcpuextstate 63
#define XEN_DOMCTL_set_access_required 64
#define XEN_DOMCTL_audit_p2m 65
#define XEN_DOMCTL_set_virq_handler 66
#define XEN_DOMCTL_set_broken_page_p2m 67
#define XEN_DOMCTL_setnodeaffinity 68
#define XEN_DOMCTL_getnodeaffinity 69
#define XEN_DOMCTL_cacheflush 71
#define XEN_DOMCTL_get_vcpu_msrs 72
#define XEN_DOMCTL_set_vcpu_msrs 73
#define XEN_DOMCTL_setvnumainfo 74
#define XEN_DOMCTL_psr_cmt_op 75
#define XEN_DOMCTL_monitor_op 77
#define XEN_DOMCTL_psr_alloc 78
#define XEN_DOMCTL_soft_reset 79
#define XEN_DOMCTL_vuart_op 81
#define XEN_DOMCTL_get_cpu_policy 82
#define XEN_DOMCTL_set_cpu_policy 83
#define XEN_DOMCTL_vmtrace_op 84
#define XEN_DOMCTL_get_paging_mempool_size 85
#define XEN_DOMCTL_set_paging_mempool_size 86
#define XEN_DOMCTL_gdbsx_guestmemio 1000
#define XEN_DOMCTL_gdbsx_pausevcpu 1001
#define XEN_DOMCTL_gdbsx_unpausevcpu 1002
#define XEN_DOMCTL_gdbsx_domstatus 1003
uint32_t interface_version; /* XEN_DOMCTL_INTERFACE_VERSION */
domid_t domain;
uint16_t _pad[3];
union {
struct xen_domctl_createdomain createdomain;
struct xen_domctl_getdomaininfo getdomaininfo;
struct xen_domctl_max_mem max_mem;
struct xen_domctl_vcpucontext vcpucontext;
struct xen_domctl_max_vcpus max_vcpus;
struct xen_domctl_scheduler_op scheduler_op;
struct xen_domctl_iomem_permission iomem_permission;
struct xen_domctl_address_size address_size;
struct xen_domctl_assign_device assign_device;
struct xen_domctl_bind_pt_irq bind_pt_irq;
struct xen_domctl_memory_mapping memory_mapping;
struct xen_domctl_cacheflush cacheflush;
struct xen_domctl_paging_mempool paging_mempool;
uint8_t pad[128];
} u;
};
typedef struct xen_domctl xen_domctl_t;
DEFINE_XEN_GUEST_HANDLE(xen_domctl_t);
#endif /* __XEN_PUBLIC_DOMCTL_H__ */
``` | /content/code_sandbox/include/zephyr/xen/public/domctl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 4,948 |
```objective-c
/*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to
* deal in the Software without restriction, including without limitation the
* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*
*/
#ifndef __XEN_PUBLIC_HVM_HVM_OP_H__
#define __XEN_PUBLIC_HVM_HVM_OP_H__
#include "../xen.h"
/* Get/set subcommands: extra argument == pointer to xen_hvm_param struct. */
#define HVMOP_set_param 0
#define HVMOP_get_param 1
struct xen_hvm_param {
domid_t domid; /* IN */
uint16_t pad;
uint32_t index; /* IN */
uint64_t value; /* IN/OUT */
};
typedef struct xen_hvm_param xen_hvm_param_t;
DEFINE_XEN_GUEST_HANDLE(xen_hvm_param_t);
#endif /* __XEN_PUBLIC_HVM_HVM_OP_H__ */
``` | /content/code_sandbox/include/zephyr/xen/public/hvm/hvm_op.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 373 |
```objective-c
/*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to
* deal in the Software without restriction, including without limitation the
* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*
*/
#ifndef __XEN_PUBLIC_HVM_PARAMS_H__
#define __XEN_PUBLIC_HVM_PARAMS_H__
#include "hvm_op.h"
/*
* These are not used by Xen. They are here for convenience of HVM-guest
* xenbus implementations.
*/
#define HVM_PARAM_STORE_PFN 1
#define HVM_PARAM_STORE_EVTCHN 2
/* Console debug shared memory ring and event channel */
#define HVM_PARAM_CONSOLE_PFN 17
#define HVM_PARAM_CONSOLE_EVTCHN 18
#endif /* __XEN_PUBLIC_HVM_PARAMS_H__ */
``` | /content/code_sandbox/include/zephyr/xen/public/hvm/params.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 345 |
```objective-c
/******************************************************************************
* console.h
*
* Console I/O interface for Xen guest OSes.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to
* deal in the Software without restriction, including without limitation the
* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*
*/
#ifndef __XEN_PUBLIC_IO_CONSOLE_H__
#define __XEN_PUBLIC_IO_CONSOLE_H__
typedef uint32_t XENCONS_RING_IDX;
#define MASK_XENCONS_IDX(idx, ring) ((idx) & (sizeof(ring)-1))
struct xencons_interface {
char in[1024];
char out[2048];
XENCONS_RING_IDX in_cons, in_prod;
XENCONS_RING_IDX out_cons, out_prod;
};
#ifdef XEN_WANT_FLEX_CONSOLE_RING
#include "ring.h"
DEFINE_XEN_FLEX_RING(xencons);
#endif
#endif /* __XEN_PUBLIC_IO_CONSOLE_H__ */
``` | /content/code_sandbox/include/zephyr/xen/public/io/console.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 369 |
```objective-c
/******************************************************************************
* arch-arm.h
*
* Guest OS interface to ARM Xen.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to
* deal in the Software without restriction, including without limitation the
* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*
*/
#ifndef __XEN_PUBLIC_ARCH_ARM_H__
#define __XEN_PUBLIC_ARCH_ARM_H__
#include <zephyr/kernel.h>
/*
* `incontents 50 arm_abi Hypercall Calling Convention
*
* A hypercall is issued using the ARM HVC instruction.
*
* A hypercall can take up to 5 arguments. These are passed in
* registers, the first argument in x0/r0 (for arm64/arm32 guests
* respectively irrespective of whether the underlying hypervisor is
* 32- or 64-bit), the second argument in x1/r1, the third in x2/r2,
* the forth in x3/r3 and the fifth in x4/r4.
*
* The hypercall number is passed in r12 (arm) or x16 (arm64). In both
* cases the relevant ARM procedure calling convention specifies this
* is an inter-procedure-call scratch register (e.g. for use in linker
* stubs). This use does not conflict with use during a hypercall.
*
* The HVC ISS must contain a Xen specific TAG: XEN_HYPERCALL_TAG.
*
* The return value is in x0/r0.
*
* The hypercall will clobber x16/r12 and the argument registers used
* by that hypercall (except r0 which is the return value) i.e. in
* addition to x16/r12 a 2 argument hypercall will clobber x1/r1 and a
* 4 argument hypercall will clobber x1/r1, x2/r2 and x3/r3.
*
* Parameter structs passed to hypercalls are laid out according to
* the Procedure Call Standard for the ARM Architecture (AAPCS, AKA
* EABI) and Procedure Call Standard for the ARM 64-bit Architecture
* (AAPCS64). Where there is a conflict the 64-bit standard should be
* used regardless of guest type. Structures which are passed as
* hypercall arguments are always little endian.
*
* All memory which is shared with other entities in the system
* (including the hypervisor and other guests) must reside in memory
* which is mapped as Normal Inner Write-Back Outer Write-Back Inner-Shareable.
* This applies to:
* - hypercall arguments passed via a pointer to guest memory.
* - memory shared via the grant table mechanism (including PV I/O
* rings etc).
* - memory shared with the hypervisor (struct shared_info, struct
* vcpu_info, the grant table, etc).
*
* Any cache allocation hints are acceptable.
*/
/*
* `incontents 55 arm_hcall Supported Hypercalls
*
* Xen on ARM makes extensive use of hardware facilities and therefore
* only a subset of the potential hypercalls are required.
*
* Since ARM uses second stage paging any machine/physical addresses
* passed to hypercalls are Guest Physical Addresses (Intermediate
* Physical Addresses) unless otherwise noted.
*
* The following hypercalls (and sub operations) are supported on the
* ARM platform. Other hypercalls should be considered
* unavailable/unsupported.
*
* HYPERVISOR_memory_op
* All generic sub-operations
*
* HYPERVISOR_domctl
* All generic sub-operations, with the exception of:
* * XEN_DOMCTL_irq_permission (not yet implemented)
*
* HYPERVISOR_sched_op
* All generic sub-operations, with the exception of:
* * SCHEDOP_block -- prefer wfi hardware instruction
*
* HYPERVISOR_console_io
* All generic sub-operations
*
* HYPERVISOR_xen_version
* All generic sub-operations
*
* HYPERVISOR_event_channel_op
* All generic sub-operations
*
* HYPERVISOR_physdev_op
* No sub-operations are currently supported
*
* HYPERVISOR_sysctl
* All generic sub-operations, with the exception of:
* * XEN_SYSCTL_page_offline_op
* * XEN_SYSCTL_get_pmstat
* * XEN_SYSCTL_pm_op
*
* HYPERVISOR_hvm_op
* Exactly these sub-operations are supported:
* * HVMOP_set_param
* * HVMOP_get_param
*
* HYPERVISOR_grant_table_op
* All generic sub-operations
*
* HYPERVISOR_vcpu_op
* Exactly these sub-operations are supported:
* * VCPUOP_register_vcpu_info
* * VCPUOP_register_runstate_memory_area
*
*
* Other notes on the ARM ABI:
*
* - struct start_info is not exported to ARM guests.
*
* - struct shared_info is mapped by ARM guests using the
* HYPERVISOR_memory_op sub-op XENMEM_add_to_physmap, passing
* XENMAPSPACE_shared_info as space parameter.
*
* - All the per-cpu struct vcpu_info are mapped by ARM guests using the
* HYPERVISOR_vcpu_op sub-op VCPUOP_register_vcpu_info, including cpu0
* struct vcpu_info.
*
* - The grant table is mapped using the HYPERVISOR_memory_op sub-op
* XENMEM_add_to_physmap, passing XENMAPSPACE_grant_table as space
* parameter. The memory range specified under the Xen compatible
* hypervisor node on device tree can be used as target gpfn for the
* mapping.
*
* - Xenstore is initialized by using the two hvm_params
* HVM_PARAM_STORE_PFN and HVM_PARAM_STORE_EVTCHN. They can be read
* with the HYPERVISOR_hvm_op sub-op HVMOP_get_param.
*
* - The paravirtualized console is initialized by using the two
* hvm_params HVM_PARAM_CONSOLE_PFN and HVM_PARAM_CONSOLE_EVTCHN. They
* can be read with the HYPERVISOR_hvm_op sub-op HVMOP_get_param.
*
* - Event channel notifications are delivered using the percpu GIC
* interrupt specified under the Xen compatible hypervisor node on
* device tree.
*
* - The device tree Xen compatible node is fully described under Linux
* at Documentation/devicetree/bindings/arm/xen.txt.
*/
#define XEN_HYPERCALL_TAG 0XEA1
#define int64_aligned_t int64_t __aligned(8)
#define uint64_aligned_t uint64_t __aligned(8)
#ifndef __ASSEMBLY__
#define ___DEFINE_XEN_GUEST_HANDLE(name, type) \
typedef union { type *p; unsigned long q; } \
__guest_handle_ ## name; \
typedef union { type *p; uint64_aligned_t q; } \
__guest_handle_64_ ## name
/*
* XEN_GUEST_HANDLE represents a guest pointer, when passed as a field
* in a struct in memory. On ARM is always 8 bytes sizes and 8 bytes
* aligned.
* XEN_GUEST_HANDLE_PARAM represents a guest pointer, when passed as an
* hypercall argument. It is 4 bytes on aarch32 and 8 bytes on aarch64.
*/
#define __DEFINE_XEN_GUEST_HANDLE(name, type) \
___DEFINE_XEN_GUEST_HANDLE(name, type); \
___DEFINE_XEN_GUEST_HANDLE(const_##name, const type)
#define DEFINE_XEN_GUEST_HANDLE(name) __DEFINE_XEN_GUEST_HANDLE(name, name)
#define __XEN_GUEST_HANDLE(name) __guest_handle_64_ ## name
#define XEN_GUEST_HANDLE(name) __XEN_GUEST_HANDLE(name)
#define XEN_GUEST_HANDLE_PARAM(name) __guest_handle_ ## name
#define set_xen_guest_handle_raw(hnd, val) \
do { \
__typeof__(&(hnd)) _sxghr_tmp = &(hnd); \
_sxghr_tmp->q = 0; \
_sxghr_tmp->p = val; \
} while (0)
#define set_xen_guest_handle(hnd, val) set_xen_guest_handle_raw(hnd, val)
typedef uint64_t xen_pfn_t;
#define PRI_xen_pfn PRIx64
#define PRIu_xen_pfn PRIu64
/*
* Maximum number of virtual CPUs in legacy multi-processor guests.
* Only one. All other VCPUS must use VCPUOP_register_vcpu_info.
*/
#define XEN_LEGACY_MAX_VCPUS 1
typedef uint64_t xen_ulong_t;
#define PRI_xen_ulong PRIx64
#ifdef CONFIG_XEN_DOM0
#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
/* Anonymous union includes both 32- and 64-bit names (e.g., r0/x0). */
# define __DECL_REG(n64, n32) union { \
uint64_t n64; \
uint32_t n32; \
}
#else
/* Non-gcc sources must always use the proper 64-bit name (e.g., x0). */
#define __DECL_REG(n64, n32) uint64_t n64
#endif
struct vcpu_guest_core_regs {
/* Aarch64 Aarch32 */
__DECL_REG(x0, r0_usr);
__DECL_REG(x1, r1_usr);
__DECL_REG(x2, r2_usr);
__DECL_REG(x3, r3_usr);
__DECL_REG(x4, r4_usr);
__DECL_REG(x5, r5_usr);
__DECL_REG(x6, r6_usr);
__DECL_REG(x7, r7_usr);
__DECL_REG(x8, r8_usr);
__DECL_REG(x9, r9_usr);
__DECL_REG(x10, r10_usr);
__DECL_REG(x11, r11_usr);
__DECL_REG(x12, r12_usr);
__DECL_REG(x13, sp_usr);
__DECL_REG(x14, lr_usr);
__DECL_REG(x15, __unused_sp_hyp);
__DECL_REG(x16, lr_irq);
__DECL_REG(x17, sp_irq);
__DECL_REG(x18, lr_svc);
__DECL_REG(x19, sp_svc);
__DECL_REG(x20, lr_abt);
__DECL_REG(x21, sp_abt);
__DECL_REG(x22, lr_und);
__DECL_REG(x23, sp_und);
__DECL_REG(x24, r8_fiq);
__DECL_REG(x25, r9_fiq);
__DECL_REG(x26, r10_fiq);
__DECL_REG(x27, r11_fiq);
__DECL_REG(x28, r12_fiq);
__DECL_REG(x29, sp_fiq);
__DECL_REG(x30, lr_fiq);
/* Return address and mode */
__DECL_REG(pc64, pc32); /* ELR_EL2 */
uint32_t cpsr; /* SPSR_EL2 */
union {
uint32_t spsr_el1; /* AArch64 */
uint32_t spsr_svc; /* AArch32 */
};
/* AArch32 guests only */
uint32_t spsr_fiq, spsr_irq, spsr_und, spsr_abt;
/* AArch64 guests only */
uint64_t sp_el0;
uint64_t sp_el1, elr_el1;
};
typedef struct vcpu_guest_core_regs vcpu_guest_core_regs_t;
DEFINE_XEN_GUEST_HANDLE(vcpu_guest_core_regs_t);
#undef __DECL_REG
struct vcpu_guest_context {
#define _VGCF_online 0
#define VGCF_online (1 << _VGCF_online)
uint32_t flags; /* VGCF_* */
struct vcpu_guest_core_regs user_regs; /* Core CPU registers */
uint64_t sctlr;
uint64_t ttbcr, ttbr0, ttbr1;
};
typedef struct vcpu_guest_context vcpu_guest_context_t;
DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t);
/*
* struct xen_arch_domainconfig's ABI is covered by
* XEN_DOMCTL_INTERFACE_VERSION.
*/
#define XEN_DOMCTL_CONFIG_GIC_NATIVE 0
#define XEN_DOMCTL_CONFIG_GIC_V2 1
#define XEN_DOMCTL_CONFIG_GIC_V3 2
#define XEN_DOMCTL_CONFIG_TEE_NONE 0
#define XEN_DOMCTL_CONFIG_TEE_OPTEE 1
struct xen_arch_domainconfig {
/* IN/OUT */
uint8_t gic_version;
/* IN */
uint16_t tee_type;
/* IN */
uint32_t nr_spis;
/*
* OUT
* Based on the property clock-frequency in the DT timer node.
* The property may be present when the bootloader/firmware doesn't
* set correctly CNTFRQ which hold the timer frequency.
*
* As it's not possible to trap this register, we have to replicate
* the value in the guest DT.
*
* = 0 => property not present
* > 0 => Value of the property
*
*/
uint32_t clock_frequency;
};
#endif /* CONFIG_XEN_DOM0 */
struct arch_vcpu_info {
};
typedef struct arch_vcpu_info arch_vcpu_info_t;
struct arch_shared_info {
};
typedef struct arch_shared_info arch_shared_info_t;
typedef uint64_t xen_callback_t;
#endif /* __ASSEMBLY__ */
#ifdef CONFIG_XEN_DOM0
/* PSR bits (CPSR, SPSR) */
#define PSR_THUMB (1 << 5) /* Thumb Mode enable */
#define PSR_FIQ_MASK (1 << 6) /* Fast Interrupt mask */
#define PSR_IRQ_MASK (1 << 7) /* Interrupt mask */
#define PSR_ABT_MASK (1 << 8) /* Asynchronous Abort mask */
#define PSR_BIG_ENDIAN (1 << 9) /* arm32: Big Endian Mode */
#define PSR_DBG_MASK (1 << 9) /* arm64: Debug Exception mask */
#define PSR_IT_MASK (0x0600fc00) /* Thumb If-Then Mask */
#define PSR_JAZELLE (1<<24) /* Jazelle Mode */
/* 32 bit modes */
#define PSR_MODE_USR 0x10
#define PSR_MODE_FIQ 0x11
#define PSR_MODE_IRQ 0x12
#define PSR_MODE_SVC 0x13
#define PSR_MODE_MON 0x16
#define PSR_MODE_ABT 0x17
#define PSR_MODE_HYP 0x1a
#define PSR_MODE_UND 0x1b
#define PSR_MODE_SYS 0x1f
/* 64 bit modes */
#define PSR_MODE_BIT 0x10 /* Set iff AArch32 */
#define PSR_MODE_EL3h 0x0d
#define PSR_MODE_EL3t 0x0c
#define PSR_MODE_EL2h 0x09
#define PSR_MODE_EL2t 0x08
#define PSR_MODE_EL1h 0x05
#define PSR_MODE_EL1t 0x04
#define PSR_MODE_EL0t 0x00
#define PSR_GUEST32_INIT (PSR_ABT_MASK|PSR_FIQ_MASK|PSR_IRQ_MASK|PSR_MODE_SVC)
#define PSR_GUEST64_INIT (PSR_ABT_MASK|PSR_FIQ_MASK|PSR_IRQ_MASK|PSR_MODE_EL1h)
#define SCTLR_GUEST_INIT xen_mk_ullong(0x00c50078)
/*
* Virtual machine platform (memory layout, interrupts)
*
* These are defined for consistency between the tools and the
* hypervisor. Guests must not rely on these hardcoded values but
* should instead use the FDT.
*/
/* Physical Address Space */
/*
* vGIC mappings: Only one set of mapping is used by the guest.
* Therefore they can overlap.
*/
/* vGIC v2 mappings */
#define GUEST_GICD_BASE xen_mk_ullong(0x03001000)
#define GUEST_GICD_SIZE xen_mk_ullong(0x00001000)
#define GUEST_GICC_BASE xen_mk_ullong(0x03002000)
#define GUEST_GICC_SIZE xen_mk_ullong(0x00002000)
/* vGIC v3 mappings */
#define GUEST_GICV3_GICD_BASE xen_mk_ullong(0x03001000)
#define GUEST_GICV3_GICD_SIZE xen_mk_ullong(0x00010000)
#define GUEST_GICV3_RDIST_REGIONS 1
#define GUEST_GICV3_GICR0_BASE xen_mk_ullong(0x03020000) /* vCPU0..127 */
#define GUEST_GICV3_GICR0_SIZE xen_mk_ullong(0x01000000)
/* ACPI tables physical address */
#define GUEST_ACPI_BASE xen_mk_ullong(0x20000000)
#define GUEST_ACPI_SIZE xen_mk_ullong(0x02000000)
/* PL011 mappings */
#define GUEST_PL011_BASE xen_mk_ullong(0x22000000)
#define GUEST_PL011_SIZE xen_mk_ullong(0x00001000)
/*
* 16MB == 4096 pages reserved for guest to use as a region to map its
* grant table in.
*/
#define GUEST_GNTTAB_BASE xen_mk_ullong(0x38000000)
#define GUEST_GNTTAB_SIZE xen_mk_ullong(0x01000000)
#define GUEST_MAGIC_BASE xen_mk_ullong(0x39000000)
#define GUEST_MAGIC_SIZE xen_mk_ullong(0x01000000)
#define GUEST_RAM_BANKS 2
#define GUEST_RAM0_BASE xen_mk_ullong(0x40000000) /* 3GB of low RAM @ 1GB */
#define GUEST_RAM0_SIZE xen_mk_ullong(0xc0000000)
#define GUEST_RAM1_BASE xen_mk_ullong(0x0200000000) /* 1016GB of RAM @ 8GB */
#define GUEST_RAM1_SIZE xen_mk_ullong(0xfe00000000)
#define GUEST_RAM_BASE GUEST_RAM0_BASE /* Lowest RAM address */
/* Largest amount of actual RAM, not including holes */
#define GUEST_RAM_MAX (GUEST_RAM0_SIZE + GUEST_RAM1_SIZE)
/* Suitable for e.g. const uint64_t ramfoo[] = GUEST_RAM_BANK_FOOS; */
#define GUEST_RAM_BANK_BASES { GUEST_RAM0_BASE, GUEST_RAM1_BASE }
#define GUEST_RAM_BANK_SIZES { GUEST_RAM0_SIZE, GUEST_RAM1_SIZE }
/* Current supported guest VCPUs */
#define GUEST_MAX_VCPUS 128
/* Interrupts */
#define GUEST_TIMER_VIRT_PPI 27
#define GUEST_TIMER_PHYS_S_PPI 29
#define GUEST_TIMER_PHYS_NS_PPI 30
#define GUEST_EVTCHN_PPI 31
#define GUEST_VPL011_SPI 32
/* PSCI functions */
#define PSCI_cpu_suspend 0
#define PSCI_cpu_off 1
#define PSCI_cpu_on 2
#define PSCI_migrate 3
#endif /* CONFIG_XEN_DOM0 */
#ifndef __ASSEMBLY__
/* Stub definition of PMU structure */
typedef struct xen_pmu_arch { uint8_t dummy; } xen_pmu_arch_t;
#endif /* __ASSEMBLY__ */
#endif /* __XEN_PUBLIC_ARCH_ARM_H__ */
``` | /content/code_sandbox/include/zephyr/xen/public/arch-arm.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 4,578 |
```objective-c
/**
* @file
* @brief SPI Devicetree macro public API header file.
*/
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DEVICETREE_SPI_H_
#define ZEPHYR_INCLUDE_DEVICETREE_SPI_H_
#ifdef __cplusplus
extern "C" {
#endif
/**
* @defgroup devicetree-spi Devicetree SPI API
* @ingroup devicetree
* @{
*/
/**
* @brief Does a SPI controller node have chip select GPIOs configured?
*
* SPI bus controllers use the "cs-gpios" property for configuring
* chip select GPIOs. Its value is a phandle-array which specifies the
* chip select lines.
*
* Example devicetree fragment:
*
* spi1: spi@... {
* compatible = "vnd,spi";
* cs-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>,
* <&gpio2 20 GPIO_ACTIVE_LOW>;
* };
*
* spi2: spi@... {
* compatible = "vnd,spi";
* };
*
* Example usage:
*
* DT_SPI_HAS_CS_GPIOS(DT_NODELABEL(spi1)) // 1
* DT_SPI_HAS_CS_GPIOS(DT_NODELABEL(spi2)) // 0
*
* @param spi a SPI bus controller node identifier
* @return 1 if "spi" has a cs-gpios property, 0 otherwise
*/
#define DT_SPI_HAS_CS_GPIOS(spi) DT_NODE_HAS_PROP(spi, cs_gpios)
/**
* @brief Number of chip select GPIOs in a SPI controller's cs-gpios property
*
* Example devicetree fragment:
*
* spi1: spi@... {
* compatible = "vnd,spi";
* cs-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>,
* <&gpio2 20 GPIO_ACTIVE_LOW>;
* };
*
* spi2: spi@... {
* compatible = "vnd,spi";
* };
*
* Example usage:
*
* DT_SPI_NUM_CS_GPIOS(DT_NODELABEL(spi1)) // 2
* DT_SPI_NUM_CS_GPIOS(DT_NODELABEL(spi2)) // 0
*
* @param spi a SPI bus controller node identifier
* @return Logical length of spi's cs-gpios property, or 0 if "spi" doesn't
* have a cs-gpios property
*/
#define DT_SPI_NUM_CS_GPIOS(spi) \
COND_CODE_1(DT_SPI_HAS_CS_GPIOS(spi), \
(DT_PROP_LEN(spi, cs_gpios)), (0))
/**
* @brief Does a SPI device have a chip select line configured?
* Example devicetree fragment:
*
* spi1: spi@... {
* compatible = "vnd,spi";
* cs-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>,
* <&gpio2 20 GPIO_ACTIVE_LOW>;
*
* a: spi-dev-a@0 {
* reg = <0>;
* };
*
* b: spi-dev-b@1 {
* reg = <1>;
* };
* };
*
* spi2: spi@... {
* compatible = "vnd,spi";
* c: spi-dev-c@0 {
* reg = <0>;
* };
* };
*
* Example usage:
*
* DT_SPI_DEV_HAS_CS_GPIOS(DT_NODELABEL(a)) // 1
* DT_SPI_DEV_HAS_CS_GPIOS(DT_NODELABEL(b)) // 1
* DT_SPI_DEV_HAS_CS_GPIOS(DT_NODELABEL(c)) // 0
*
* @param spi_dev a SPI device node identifier
* @return 1 if spi_dev's bus node DT_BUS(spi_dev) has a chip select
* pin at index DT_REG_ADDR(spi_dev), 0 otherwise
*/
#define DT_SPI_DEV_HAS_CS_GPIOS(spi_dev) DT_SPI_HAS_CS_GPIOS(DT_BUS(spi_dev))
/**
* @brief Get a SPI device's chip select GPIO controller's node identifier
*
* Example devicetree fragment:
*
* gpio1: gpio@... { ... };
*
* gpio2: gpio@... { ... };
*
* spi@... {
* compatible = "vnd,spi";
* cs-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>,
* <&gpio2 20 GPIO_ACTIVE_LOW>;
*
* a: spi-dev-a@0 {
* reg = <0>;
* };
*
* b: spi-dev-b@1 {
* reg = <1>;
* };
* };
*
* Example usage:
*
* DT_SPI_DEV_CS_GPIOS_CTLR(DT_NODELABEL(a)) // DT_NODELABEL(gpio1)
* DT_SPI_DEV_CS_GPIOS_CTLR(DT_NODELABEL(b)) // DT_NODELABEL(gpio2)
*
* @param spi_dev a SPI device node identifier
* @return node identifier for spi_dev's chip select GPIO controller
*/
#define DT_SPI_DEV_CS_GPIOS_CTLR(spi_dev) \
DT_GPIO_CTLR_BY_IDX(DT_BUS(spi_dev), cs_gpios, DT_REG_ADDR(spi_dev))
/**
* @brief Get a SPI device's chip select GPIO pin number
*
* It's an error if the GPIO specifier for spi_dev's entry in its
* bus node's cs-gpios property has no pin cell.
*
* Example devicetree fragment:
*
* spi1: spi@... {
* compatible = "vnd,spi";
* cs-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>,
* <&gpio2 20 GPIO_ACTIVE_LOW>;
*
* a: spi-dev-a@0 {
* reg = <0>;
* };
*
* b: spi-dev-b@1 {
* reg = <1>;
* };
* };
*
* Example usage:
*
* DT_SPI_DEV_CS_GPIOS_PIN(DT_NODELABEL(a)) // 10
* DT_SPI_DEV_CS_GPIOS_PIN(DT_NODELABEL(b)) // 20
*
* @param spi_dev a SPI device node identifier
* @return pin number of spi_dev's chip select GPIO
*/
#define DT_SPI_DEV_CS_GPIOS_PIN(spi_dev) \
DT_GPIO_PIN_BY_IDX(DT_BUS(spi_dev), cs_gpios, DT_REG_ADDR(spi_dev))
/**
* @brief Get a SPI device's chip select GPIO flags
*
* Example devicetree fragment:
*
* spi1: spi@... {
* compatible = "vnd,spi";
* cs-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
*
* a: spi-dev-a@0 {
* reg = <0>;
* };
* };
*
* Example usage:
*
* DT_SPI_DEV_CS_GPIOS_FLAGS(DT_NODELABEL(a)) // GPIO_ACTIVE_LOW
*
* If the GPIO specifier for spi_dev's entry in its bus node's
* cs-gpios property has no flags cell, this expands to zero.
*
* @param spi_dev a SPI device node identifier
* @return flags value of spi_dev's chip select GPIO specifier, or
* zero if there is none
*/
#define DT_SPI_DEV_CS_GPIOS_FLAGS(spi_dev) \
DT_GPIO_FLAGS_BY_IDX(DT_BUS(spi_dev), cs_gpios, DT_REG_ADDR(spi_dev))
/**
* @brief Equivalent to DT_SPI_DEV_HAS_CS_GPIOS(DT_DRV_INST(inst)).
* @param inst DT_DRV_COMPAT instance number
* @return 1 if the instance's bus has a CS pin at index
* DT_INST_REG_ADDR(inst), 0 otherwise
* @see DT_SPI_DEV_HAS_CS_GPIOS()
*/
#define DT_INST_SPI_DEV_HAS_CS_GPIOS(inst) \
DT_SPI_DEV_HAS_CS_GPIOS(DT_DRV_INST(inst))
/**
* @brief Get GPIO controller node identifier for a SPI device instance
* This is equivalent to DT_SPI_DEV_CS_GPIOS_CTLR(DT_DRV_INST(inst)).
* @param inst DT_DRV_COMPAT instance number
* @return node identifier for instance's chip select GPIO controller
* @see DT_SPI_DEV_CS_GPIOS_CTLR()
*/
#define DT_INST_SPI_DEV_CS_GPIOS_CTLR(inst) \
DT_SPI_DEV_CS_GPIOS_CTLR(DT_DRV_INST(inst))
/**
* @brief Equivalent to DT_SPI_DEV_CS_GPIOS_PIN(DT_DRV_INST(inst)).
* @param inst DT_DRV_COMPAT instance number
* @return pin number of the instance's chip select GPIO
* @see DT_SPI_DEV_CS_GPIOS_PIN()
*/
#define DT_INST_SPI_DEV_CS_GPIOS_PIN(inst) \
DT_SPI_DEV_CS_GPIOS_PIN(DT_DRV_INST(inst))
/**
* @brief DT_SPI_DEV_CS_GPIOS_FLAGS(DT_DRV_INST(inst)).
* @param inst DT_DRV_COMPAT instance number
* @return flags value of the instance's chip select GPIO specifier,
* or zero if there is none
* @see DT_SPI_DEV_CS_GPIOS_FLAGS()
*/
#define DT_INST_SPI_DEV_CS_GPIOS_FLAGS(inst) \
DT_SPI_DEV_CS_GPIOS_FLAGS(DT_DRV_INST(inst))
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* ZEPHYR_INCLUDE_DEVICETREE_SPI_H_ */
``` | /content/code_sandbox/include/zephyr/devicetree/spi.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,016 |
```objective-c
/**
* @file
* @brief GPIO Devicetree macro public API header file.
*/
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DEVICETREE_GPIO_H_
#define ZEPHYR_INCLUDE_DEVICETREE_GPIO_H_
#ifdef __cplusplus
extern "C" {
#endif
/**
* @defgroup devicetree-gpio Devicetree GPIO API
* @ingroup devicetree
* @{
*/
/**
* @brief Get the node identifier for the controller phandle from a
* gpio phandle-array property at an index
*
* Example devicetree fragment:
*
* gpio1: gpio@... { };
*
* gpio2: gpio@... { };
*
* n: node {
* gpios = <&gpio1 10 GPIO_ACTIVE_LOW>,
* <&gpio2 30 GPIO_ACTIVE_HIGH>;
* };
*
* Example usage:
*
* DT_GPIO_CTLR_BY_IDX(DT_NODELABEL(n), gpios, 1) // DT_NODELABEL(gpio2)
*
* @param node_id node identifier
* @param gpio_pha lowercase-and-underscores GPIO property with
* type "phandle-array"
* @param idx logical index into "gpio_pha"
* @return the node identifier for the gpio controller referenced at
* index "idx"
* @see DT_PHANDLE_BY_IDX()
*/
#define DT_GPIO_CTLR_BY_IDX(node_id, gpio_pha, idx) \
DT_PHANDLE_BY_IDX(node_id, gpio_pha, idx)
/**
* @brief Equivalent to DT_GPIO_CTLR_BY_IDX(node_id, gpio_pha, 0)
* @param node_id node identifier
* @param gpio_pha lowercase-and-underscores GPIO property with
* type "phandle-array"
* @return a node identifier for the gpio controller at index 0
* in "gpio_pha"
* @see DT_GPIO_CTLR_BY_IDX()
*/
#define DT_GPIO_CTLR(node_id, gpio_pha) \
DT_GPIO_CTLR_BY_IDX(node_id, gpio_pha, 0)
/**
* @brief Get a GPIO specifier's pin cell at an index
*
* This macro only works for GPIO specifiers with cells named "pin".
* Refer to the node's binding to check if necessary.
*
* Example devicetree fragment:
*
* gpio1: gpio@... {
* compatible = "vnd,gpio";
* #gpio-cells = <2>;
* };
*
* gpio2: gpio@... {
* compatible = "vnd,gpio";
* #gpio-cells = <2>;
* };
*
* n: node {
* gpios = <&gpio1 10 GPIO_ACTIVE_LOW>,
* <&gpio2 30 GPIO_ACTIVE_HIGH>;
* };
*
* Bindings fragment for the vnd,gpio compatible:
*
* gpio-cells:
* - pin
* - flags
*
* Example usage:
*
* DT_GPIO_PIN_BY_IDX(DT_NODELABEL(n), gpios, 0) // 10
* DT_GPIO_PIN_BY_IDX(DT_NODELABEL(n), gpios, 1) // 30
*
* @param node_id node identifier
* @param gpio_pha lowercase-and-underscores GPIO property with
* type "phandle-array"
* @param idx logical index into "gpio_pha"
* @return the pin cell value at index "idx"
* @see DT_PHA_BY_IDX()
*/
#define DT_GPIO_PIN_BY_IDX(node_id, gpio_pha, idx) \
DT_PHA_BY_IDX(node_id, gpio_pha, idx, pin)
/**
* @brief Equivalent to DT_GPIO_PIN_BY_IDX(node_id, gpio_pha, 0)
* @param node_id node identifier
* @param gpio_pha lowercase-and-underscores GPIO property with
* type "phandle-array"
* @return the pin cell value at index 0
* @see DT_GPIO_PIN_BY_IDX()
*/
#define DT_GPIO_PIN(node_id, gpio_pha) \
DT_GPIO_PIN_BY_IDX(node_id, gpio_pha, 0)
/**
* @brief Get a GPIO specifier's flags cell at an index
*
* This macro expects GPIO specifiers with cells named "flags".
* If there is no "flags" cell in the GPIO specifier, zero is returned.
* Refer to the node's binding to check specifier cell names if necessary.
*
* Example devicetree fragment:
*
* gpio1: gpio@... {
* compatible = "vnd,gpio";
* #gpio-cells = <2>;
* };
*
* gpio2: gpio@... {
* compatible = "vnd,gpio";
* #gpio-cells = <2>;
* };
*
* n: node {
* gpios = <&gpio1 10 GPIO_ACTIVE_LOW>,
* <&gpio2 30 GPIO_ACTIVE_HIGH>;
* };
*
* Bindings fragment for the vnd,gpio compatible:
*
* gpio-cells:
* - pin
* - flags
*
* Example usage:
*
* DT_GPIO_FLAGS_BY_IDX(DT_NODELABEL(n), gpios, 0) // GPIO_ACTIVE_LOW
* DT_GPIO_FLAGS_BY_IDX(DT_NODELABEL(n), gpios, 1) // GPIO_ACTIVE_HIGH
*
* @param node_id node identifier
* @param gpio_pha lowercase-and-underscores GPIO property with
* type "phandle-array"
* @param idx logical index into "gpio_pha"
* @return the flags cell value at index "idx", or zero if there is none
* @see DT_PHA_BY_IDX()
*/
#define DT_GPIO_FLAGS_BY_IDX(node_id, gpio_pha, idx) \
DT_PHA_BY_IDX_OR(node_id, gpio_pha, idx, flags, 0)
/**
* @brief Equivalent to DT_GPIO_FLAGS_BY_IDX(node_id, gpio_pha, 0)
* @param node_id node identifier
* @param gpio_pha lowercase-and-underscores GPIO property with
* type "phandle-array"
* @return the flags cell value at index 0, or zero if there is none
* @see DT_GPIO_FLAGS_BY_IDX()
*/
#define DT_GPIO_FLAGS(node_id, gpio_pha) \
DT_GPIO_FLAGS_BY_IDX(node_id, gpio_pha, 0)
/**
* @brief Get the number of GPIO hogs in a node
*
* This expands to the number of hogged GPIOs, or zero if there are none.
*
* Example devicetree fragment:
*
* gpio1: gpio@... {
* compatible = "vnd,gpio";
* #gpio-cells = <2>;
*
* n1: node-1 {
* gpio-hog;
* gpios = <0 GPIO_ACTIVE_HIGH>, <1 GPIO_ACTIVE_LOW>;
* output-high;
* };
*
* n2: node-2 {
* gpio-hog;
* gpios = <3 GPIO_ACTIVE_HIGH>;
* output-low;
* };
* };
*
* Bindings fragment for the vnd,gpio compatible:
*
* gpio-cells:
* - pin
* - flags
*
* Example usage:
*
* DT_NUM_GPIO_HOGS(DT_NODELABEL(n1)) // 2
* DT_NUM_GPIO_HOGS(DT_NODELABEL(n2)) // 1
*
* @param node_id node identifier; may or may not be a GPIO hog node.
* @return number of hogged GPIOs in the node
*/
#define DT_NUM_GPIO_HOGS(node_id) \
COND_CODE_1(IS_ENABLED(DT_CAT(node_id, _GPIO_HOGS_EXISTS)), \
(DT_CAT(node_id, _GPIO_HOGS_NUM)), (0))
/**
* @brief Get a GPIO hog specifier's pin cell at an index
*
* This macro only works for GPIO specifiers with cells named "pin".
* Refer to the node's binding to check if necessary.
*
* Example devicetree fragment:
*
* gpio1: gpio@... {
* compatible = "vnd,gpio";
* #gpio-cells = <2>;
*
* n1: node-1 {
* gpio-hog;
* gpios = <0 GPIO_ACTIVE_HIGH>, <1 GPIO_ACTIVE_LOW>;
* output-high;
* };
*
* n2: node-2 {
* gpio-hog;
* gpios = <3 GPIO_ACTIVE_HIGH>;
* output-low;
* };
* };
*
* Bindings fragment for the vnd,gpio compatible:
*
* gpio-cells:
* - pin
* - flags
*
* Example usage:
*
* DT_GPIO_HOG_PIN_BY_IDX(DT_NODELABEL(n1), 0) // 0
* DT_GPIO_HOG_PIN_BY_IDX(DT_NODELABEL(n1), 1) // 1
* DT_GPIO_HOG_PIN_BY_IDX(DT_NODELABEL(n2), 0) // 3
*
* @param node_id node identifier
* @param idx logical index into "gpios"
* @return the pin cell value at index "idx"
*/
#define DT_GPIO_HOG_PIN_BY_IDX(node_id, idx) \
DT_CAT4(node_id, _GPIO_HOGS_IDX_, idx, _VAL_pin)
/**
* @brief Get a GPIO hog specifier's flags cell at an index
*
* This macro expects GPIO specifiers with cells named "flags".
* If there is no "flags" cell in the GPIO specifier, zero is returned.
* Refer to the node's binding to check specifier cell names if necessary.
*
* Example devicetree fragment:
*
* gpio1: gpio@... {
* compatible = "vnd,gpio";
* #gpio-cells = <2>;
*
* n1: node-1 {
* gpio-hog;
* gpios = <0 GPIO_ACTIVE_HIGH>, <1 GPIO_ACTIVE_LOW>;
* output-high;
* };
*
* n2: node-2 {
* gpio-hog;
* gpios = <3 GPIO_ACTIVE_HIGH>;
* output-low;
* };
* };
*
* Bindings fragment for the vnd,gpio compatible:
*
* gpio-cells:
* - pin
* - flags
*
* Example usage:
*
* DT_GPIO_HOG_FLAGS_BY_IDX(DT_NODELABEL(n1), 0) // GPIO_ACTIVE_HIGH
* DT_GPIO_HOG_FLAGS_BY_IDX(DT_NODELABEL(n1), 1) // GPIO_ACTIVE_LOW
* DT_GPIO_HOG_FLAGS_BY_IDX(DT_NODELABEL(n2), 0) // GPIO_ACTIVE_HIGH
*
* @param node_id node identifier
* @param idx logical index into "gpios"
* @return the flags cell value at index "idx", or zero if there is none
*/
#define DT_GPIO_HOG_FLAGS_BY_IDX(node_id, idx) \
COND_CODE_1(IS_ENABLED(DT_CAT4(node_id, _GPIO_HOGS_IDX_, idx, _VAL_flags_EXISTS)), \
(DT_CAT4(node_id, _GPIO_HOGS_IDX_, idx, _VAL_flags)), (0))
/**
* @brief Get a DT_DRV_COMPAT instance's GPIO specifier's pin cell value
* at an index
* @param inst DT_DRV_COMPAT instance number
* @param gpio_pha lowercase-and-underscores GPIO property with
* type "phandle-array"
* @param idx logical index into "gpio_pha"
* @return the pin cell value at index "idx"
* @see DT_GPIO_PIN_BY_IDX()
*/
#define DT_INST_GPIO_PIN_BY_IDX(inst, gpio_pha, idx) \
DT_GPIO_PIN_BY_IDX(DT_DRV_INST(inst), gpio_pha, idx)
/**
* @brief Equivalent to DT_INST_GPIO_PIN_BY_IDX(inst, gpio_pha, 0)
* @param inst DT_DRV_COMPAT instance number
* @param gpio_pha lowercase-and-underscores GPIO property with
* type "phandle-array"
* @return the pin cell value at index 0
* @see DT_INST_GPIO_PIN_BY_IDX()
*/
#define DT_INST_GPIO_PIN(inst, gpio_pha) \
DT_INST_GPIO_PIN_BY_IDX(inst, gpio_pha, 0)
/**
* @brief Get a DT_DRV_COMPAT instance's GPIO specifier's flags cell
* at an index
* @param inst DT_DRV_COMPAT instance number
* @param gpio_pha lowercase-and-underscores GPIO property with
* type "phandle-array"
* @param idx logical index into "gpio_pha"
* @return the flags cell value at index "idx", or zero if there is none
* @see DT_GPIO_FLAGS_BY_IDX()
*/
#define DT_INST_GPIO_FLAGS_BY_IDX(inst, gpio_pha, idx) \
DT_GPIO_FLAGS_BY_IDX(DT_DRV_INST(inst), gpio_pha, idx)
/**
* @brief Equivalent to DT_INST_GPIO_FLAGS_BY_IDX(inst, gpio_pha, 0)
* @param inst DT_DRV_COMPAT instance number
* @param gpio_pha lowercase-and-underscores GPIO property with
* type "phandle-array"
* @return the flags cell value at index 0, or zero if there is none
* @see DT_INST_GPIO_FLAGS_BY_IDX()
*/
#define DT_INST_GPIO_FLAGS(inst, gpio_pha) \
DT_INST_GPIO_FLAGS_BY_IDX(inst, gpio_pha, 0)
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* ZEPHYR_INCLUDE_DEVICETREE_GPIO_H_ */
``` | /content/code_sandbox/include/zephyr/devicetree/gpio.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,895 |
```objective-c
/**
* @file
* @brief MBOX Devicetree macro public API header file.
*/
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DEVICETREE_MBOX_H_
#define ZEPHYR_INCLUDE_DEVICETREE_MBOX_H_
#ifdef __cplusplus
extern "C" {
#endif
/**
* @defgroup devicetree-mbox Devicetree MBOX API
* @ingroup devicetree
* @{
*/
/**
* @brief Get the node identifier for the MBOX controller from a mboxes
* property by name
*
* Example devicetree fragment:
*
* mbox1: mbox-controller@... { ... };
*
* n: node {
* mboxes = <&mbox1 8>,
* <&mbox1 9>;
* mbox-names = "tx", "rx";
* };
*
* Example usage:
*
* DT_MBOX_CTLR_BY_NAME(DT_NODELABEL(n), tx) // DT_NODELABEL(mbox1)
* DT_MBOX_CTLR_BY_NAME(DT_NODELABEL(n), rx) // DT_NODELABEL(mbox1)
*
* @param node_id node identifier for a node with a mboxes property
* @param name lowercase-and-underscores name of a mboxes element
* as defined by the node's mbox-names property
*
* @return the node identifier for the MBOX controller in the named element
*
* @see DT_PHANDLE_BY_NAME()
*/
#define DT_MBOX_CTLR_BY_NAME(node_id, name) \
DT_PHANDLE_BY_NAME(node_id, mboxes, name)
/**
* @brief Get a MBOX channel value by name
*
* Example devicetree fragment:
*
* mbox1: mbox@... {
* #mbox-cells = <1>;
* };
*
* n: node {
* mboxes = <&mbox1 1>,
* <&mbox1 6>;
* mbox-names = "tx", "rx";
* };
*
* Bindings fragment for the mbox compatible:
*
* mbox-cells:
* - channel
*
* Example usage:
*
* DT_MBOX_CHANNEL_BY_NAME(DT_NODELABEL(n), tx) // 1
* DT_MBOX_CHANNEL_BY_NAME(DT_NODELABEL(n), rx) // 6
*
* @param node_id node identifier for a node with a mboxes property
* @param name lowercase-and-underscores name of a mboxes element
* as defined by the node's mbox-names property
*
* @return the channel value in the specifier at the named element or 0 if no
* channels are supported
*
* @see DT_PHA_BY_NAME_OR()
*/
#define DT_MBOX_CHANNEL_BY_NAME(node_id, name) \
DT_PHA_BY_NAME_OR(node_id, mboxes, name, channel, 0)
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* ZEPHYR_INCLUDE_DEVICETREE_MBOX_H_ */
``` | /content/code_sandbox/include/zephyr/devicetree/mbox.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 644 |
```objective-c
/**
* @file
* @brief CAN devicetree macro public API header file.
*/
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DEVICETREE_CAN_H_
#define ZEPHYR_INCLUDE_DEVICETREE_CAN_H_
#ifdef __cplusplus
extern "C" {
#endif
/**
* @defgroup devicetree-can Devicetree CAN API
* @ingroup devicetree
* @{
*/
/**
* @brief Get the minimum transceiver bitrate for a CAN controller
*
* The bitrate will be limited to the minimum bitrate supported by the CAN
* controller. If no CAN transceiver is present in the devicetree, the minimum
* bitrate will be that of the CAN controller.
*
* Example devicetree fragment:
*
* transceiver0: can-phy0 {
* compatible = "vnd,can-transceiver";
* min-bitrate = <15000>;
* max-bitrate = <1000000>;
* #phy-cells = <0>;
* };
*
* can0: can@... {
* compatible = "vnd,can-controller";
* phys = <&transceiver0>;
* };
*
* can1: can@... {
* compatible = "vnd,can-controller";
*
* can-transceiver {
* min-bitrate = <25000>;
* max-bitrate = <2000000>;
* };
* };
*
* can2: can@... {
* compatible = "vnd,can-controller";
*
* can-transceiver {
* max-bitrate = <2000000>;
* };
* };
*
* Example usage:
*
* DT_CAN_TRANSCEIVER_MIN_BITRATE(DT_NODELABEL(can0), 10000) // 15000
* DT_CAN_TRANSCEIVER_MIN_BITRATE(DT_NODELABEL(can1), 0) // 250000
* DT_CAN_TRANSCEIVER_MIN_BITRATE(DT_NODELABEL(can1), 50000) // 500000
* DT_CAN_TRANSCEIVER_MIN_BITRATE(DT_NODELABEL(can2), 0) // 0
*
* @param node_id node identifier
* @param min minimum bitrate supported by the CAN controller
* @return the minimum bitrate supported by the CAN controller/transceiver combination
*/
#define DT_CAN_TRANSCEIVER_MIN_BITRATE(node_id, min) \
COND_CODE_1(DT_NODE_HAS_PROP(node_id, phys), \
MAX(DT_PROP_OR(DT_PHANDLE(node_id, phys), min_bitrate, 0), min), \
MAX(DT_PROP_OR(DT_CHILD(node_id, can_transceiver), min_bitrate, min), min))
/**
* @brief Get the maximum transceiver bitrate for a CAN controller
*
* The bitrate will be limited to the maximum bitrate supported by the CAN
* controller. If no CAN transceiver is present in the devicetree, the maximum
* bitrate will be that of the CAN controller.
*
* Example devicetree fragment:
*
* transceiver0: can-phy0 {
* compatible = "vnd,can-transceiver";
* max-bitrate = <1000000>;
* #phy-cells = <0>;
* };
*
* can0: can@... {
* compatible = "vnd,can-controller";
* phys = <&transceiver0>;
* };
*
* can1: can@... {
* compatible = "vnd,can-controller";
*
* can-transceiver {
* max-bitrate = <2000000>;
* };
* };
*
* Example usage:
*
* DT_CAN_TRANSCEIVER_MAX_BITRATE(DT_NODELABEL(can0), 5000000) // 1000000
* DT_CAN_TRANSCEIVER_MAX_BITRATE(DT_NODELABEL(can1), 5000000) // 2000000
* DT_CAN_TRANSCEIVER_MAX_BITRATE(DT_NODELABEL(can1), 1000000) // 1000000
*
* @param node_id node identifier
* @param max maximum bitrate supported by the CAN controller
* @return the maximum bitrate supported by the CAN controller/transceiver combination
*/
#define DT_CAN_TRANSCEIVER_MAX_BITRATE(node_id, max) \
COND_CODE_1(DT_NODE_HAS_PROP(node_id, phys), \
MIN(DT_PROP(DT_PHANDLE(node_id, phys), max_bitrate), max), \
MIN(DT_PROP_OR(DT_CHILD(node_id, can_transceiver), max_bitrate, max), max))
/**
* @brief Get the minimum transceiver bitrate for a DT_DRV_COMPAT CAN controller
* @param inst DT_DRV_COMPAT instance number
* @param min minimum bitrate supported by the CAN controller
* @return the minimum bitrate supported by the CAN controller/transceiver combination
* @see DT_CAN_TRANSCEIVER_MIN_BITRATE()
*/
#define DT_INST_CAN_TRANSCEIVER_MIN_BITRATE(inst, min) \
DT_CAN_TRANSCEIVER_MIN_BITRATE(DT_DRV_INST(inst), min)
/**
* @brief Get the maximum transceiver bitrate for a DT_DRV_COMPAT CAN controller
* @param inst DT_DRV_COMPAT instance number
* @param max maximum bitrate supported by the CAN controller
* @return the maximum bitrate supported by the CAN controller/transceiver combination
* @see DT_CAN_TRANSCEIVER_MAX_BITRATE()
*/
#define DT_INST_CAN_TRANSCEIVER_MAX_BITRATE(inst, max) \
DT_CAN_TRANSCEIVER_MAX_BITRATE(DT_DRV_INST(inst), max)
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* ZEPHYR_INCLUDE_DEVICETREE_CAN_H_ */
``` | /content/code_sandbox/include/zephyr/devicetree/can.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,214 |
```objective-c
/**
* @file
* @brief Flash Devicetree macro public API header file.
*/
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DEVICETREE_FIXED_PARTITION_H_
#define ZEPHYR_INCLUDE_DEVICETREE_FIXED_PARTITION_H_
#ifdef __cplusplus
extern "C" {
#endif
/**
* @defgroup devicetree-fixed-partition Devicetree Fixed Partition API
* @ingroup devicetree
* @{
*/
/**
* @brief Get a node identifier for a fixed partition with
* a given label property
*
* Example devicetree fragment:
*
* flash@... {
* partitions {
* compatible = "fixed-partitions";
* boot_partition: partition@0 {
* label = "mcuboot";
* };
* slot0_partition: partition@c000 {
* label = "image-0";
* };
* ...
* };
* };
*
* Example usage:
*
* DT_NODE_BY_FIXED_PARTITION_LABEL(mcuboot) // node identifier for boot_partition
* DT_NODE_BY_FIXED_PARTITION_LABEL(image_0) // node identifier for slot0_partition
*
* @param label lowercase-and-underscores label property value
* @return a node identifier for the partition with that label property
*/
#define DT_NODE_BY_FIXED_PARTITION_LABEL(label) \
DT_CAT(DT_COMPAT_fixed_partitions_LABEL_, label)
/**
* @brief Test if a fixed partition with a given label property exists
* @param label lowercase-and-underscores label property value
* @return 1 if any "fixed-partitions" child node has the given label,
* 0 otherwise.
*/
#define DT_HAS_FIXED_PARTITION_LABEL(label) \
IS_ENABLED(DT_CAT3(DT_COMPAT_fixed_partitions_LABEL_, label, _EXISTS))
/**
* @brief Test if fixed-partition compatible node exists
*
* @param node_id DTS node to test
* @return 1 if node exists and is fixed-partition compatible, 0 otherwise.
*/
#define DT_FIXED_PARTITION_EXISTS(node_id) \
DT_NODE_HAS_COMPAT(DT_PARENT(node_id), fixed_partitions)
/**
* @brief Get a numeric identifier for a fixed partition
* @param node_id node identifier for a fixed-partitions child node
* @return the partition's ID, a unique zero-based index number
*/
#define DT_FIXED_PARTITION_ID(node_id) DT_CAT(node_id, _PARTITION_ID)
/**
* @brief Get the node identifier of the flash memory for a partition
* @param node_id node identifier for a fixed-partitions child node
* @return the node identifier of the internal memory that contains the
* fixed-partitions node, or @ref DT_INVALID_NODE if it doesn't exist.
*/
#define DT_MEM_FROM_FIXED_PARTITION(node_id) \
COND_CODE_1(DT_NODE_HAS_COMPAT(DT_GPARENT(node_id), soc_nv_flash), (DT_GPARENT(node_id)), \
(DT_INVALID_NODE))
/**
* @brief Get the node identifier of the flash controller for a partition
* @param node_id node identifier for a fixed-partitions child node
* @return the node identifier of the memory technology device that
* contains the fixed-partitions node.
*/
#define DT_MTD_FROM_FIXED_PARTITION(node_id) \
COND_CODE_1(DT_NODE_EXISTS(DT_MEM_FROM_FIXED_PARTITION(node_id)), \
(DT_PARENT(DT_MEM_FROM_FIXED_PARTITION(node_id))), (DT_GPARENT(node_id)))
/**
* @brief Get the absolute address of a fixed partition
*
* Example devicetree fragment:
*
* &flash_controller {
* flash@1000000 {
* compatible = "soc-nv-flash";
* partitions {
* compatible = "fixed-partitions";
* storage_partition: partition@3a000 {
* label = "storage";
* };
* };
* };
* };
*
* Here, the "storage" partition is seen to belong to flash memory
* starting at address 0x1000000. The partition's unit address of
* 0x3a000 represents an offset inside that flash memory.
*
* Example usage:
*
* DT_FIXED_PARTITION_ADDR(DT_NODELABEL(storage_partition)) // 0x103a000
*
* This macro can only be used with partitions of internal memory
* addressable by the CPU. Otherwise, it may produce a compile-time
* error, such as: `'__REG_IDX_0_VAL_ADDRESS' undeclared`.
*
* @param node_id node identifier for a fixed-partitions child node
* @return the partition's offset plus the base address of the flash
* node containing it.
*/
#define DT_FIXED_PARTITION_ADDR(node_id) \
(DT_REG_ADDR(DT_MEM_FROM_FIXED_PARTITION(node_id)) + DT_REG_ADDR(node_id))
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* ZEPHYR_INCLUDE_DEVICETREE_FIXED_PARTITION_H_ */
``` | /content/code_sandbox/include/zephyr/devicetree/fixed-partitions.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,035 |
```objective-c
/**
* @file
* @brief Reset Controller Devicetree macro public API header file.
*/
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DEVICETREE_RESET_H_
#define ZEPHYR_INCLUDE_DEVICETREE_RESET_H_
#ifdef __cplusplus
extern "C" {
#endif
/**
* @defgroup devicetree-reset-controller Devicetree Reset Controller API
* @ingroup devicetree
* @{
*/
/**
* @brief Get the node identifier for the controller phandle from a
* "resets" phandle-array property at an index
*
* Example devicetree fragment:
*
* reset1: reset-controller@... { ... };
*
* reset2: reset-controller@... { ... };
*
* n: node {
* resets = <&reset1 10>, <&reset2 20>;
* };
*
* Example usage:
*
* DT_RESET_CTLR_BY_IDX(DT_NODELABEL(n), 0)) // DT_NODELABEL(reset1)
* DT_RESET_CTLR_BY_IDX(DT_NODELABEL(n), 1)) // DT_NODELABEL(reset2)
*
* @param node_id node identifier
* @param idx logical index into "resets"
* @return the node identifier for the reset controller referenced at
* index "idx"
* @see DT_PHANDLE_BY_IDX()
*/
#define DT_RESET_CTLR_BY_IDX(node_id, idx) \
DT_PHANDLE_BY_IDX(node_id, resets, idx)
/**
* @brief Equivalent to DT_RESET_CTLR_BY_IDX(node_id, 0)
* @param node_id node identifier
* @return a node identifier for the reset controller at index 0
* in "resets"
* @see DT_RESET_CTLR_BY_IDX()
*/
#define DT_RESET_CTLR(node_id) \
DT_RESET_CTLR_BY_IDX(node_id, 0)
/**
* @brief Get the node identifier for the controller phandle from a
* resets phandle-array property by name
*
* Example devicetree fragment:
*
* reset1: reset-controller@... { ... };
*
* reset2: reset-controller@... { ... };
*
* n: node {
* resets = <&reset1 10>, <&reset2 20>;
* reset-names = "alpha", "beta";
* };
*
* Example usage:
*
* DT_RESET_CTLR_BY_NAME(DT_NODELABEL(n), alpha) // DT_NODELABEL(reset1)
* DT_RESET_CTLR_BY_NAME(DT_NODELABEL(n), beta) // DT_NODELABEL(reset2)
*
* @param node_id node identifier
* @param name lowercase-and-underscores name of a resets element
* as defined by the node's reset-names property
* @return the node identifier for the reset controller referenced by name
* @see DT_PHANDLE_BY_NAME()
*/
#define DT_RESET_CTLR_BY_NAME(node_id, name) \
DT_PHANDLE_BY_NAME(node_id, resets, name)
/**
* @brief Get a reset specifier's cell value at an index
*
* Example devicetree fragment:
*
* reset: reset-controller@... {
* compatible = "vnd,reset";
* #reset-cells = <1>;
* };
*
* n: node {
* resets = <&reset 10>;
* };
*
* Bindings fragment for the vnd,reset compatible:
*
* reset-cells:
* - id
*
* Example usage:
*
* DT_RESET_CELL_BY_IDX(DT_NODELABEL(n), 0, id) // 10
*
* @param node_id node identifier for a node with a resets property
* @param idx logical index into resets property
* @param cell lowercase-and-underscores cell name
* @return the cell value at index "idx"
* @see DT_PHA_BY_IDX()
*/
#define DT_RESET_CELL_BY_IDX(node_id, idx, cell) \
DT_PHA_BY_IDX(node_id, resets, idx, cell)
/**
* @brief Get a reset specifier's cell value by name
*
* Example devicetree fragment:
*
* reset: reset-controller@... {
* compatible = "vnd,reset";
* #reset-cells = <1>;
* };
*
* n: node {
* resets = <&reset 10>;
* reset-names = "alpha";
* };
*
* Bindings fragment for the vnd,reset compatible:
*
* reset-cells:
* - id
*
* Example usage:
*
* DT_RESET_CELL_BY_NAME(DT_NODELABEL(n), alpha, id) // 10
*
* @param node_id node identifier for a node with a resets property
* @param name lowercase-and-underscores name of a resets element
* as defined by the node's reset-names property
* @param cell lowercase-and-underscores cell name
* @return the cell value in the specifier at the named element
* @see DT_PHA_BY_NAME()
*/
#define DT_RESET_CELL_BY_NAME(node_id, name, cell) \
DT_PHA_BY_NAME(node_id, resets, name, cell)
/**
* @brief Equivalent to DT_RESET_CELL_BY_IDX(node_id, 0, cell)
* @param node_id node identifier for a node with a resets property
* @param cell lowercase-and-underscores cell name
* @return the cell value at index 0
* @see DT_RESET_CELL_BY_IDX()
*/
#define DT_RESET_CELL(node_id, cell) \
DT_RESET_CELL_BY_IDX(node_id, 0, cell)
/**
* @brief Get the node identifier for the controller phandle from a
* "resets" phandle-array property at an index
*
* @param inst instance number
* @param idx logical index into "resets"
* @return the node identifier for the reset controller referenced at
* index "idx"
* @see DT_RESET_CTLR_BY_IDX()
*/
#define DT_INST_RESET_CTLR_BY_IDX(inst, idx) \
DT_RESET_CTLR_BY_IDX(DT_DRV_INST(inst), idx)
/**
* @brief Equivalent to DT_INST_RESET_CTLR_BY_IDX(inst, 0)
* @param inst instance number
* @return a node identifier for the reset controller at index 0
* in "resets"
* @see DT_RESET_CTLR()
*/
#define DT_INST_RESET_CTLR(inst) \
DT_INST_RESET_CTLR_BY_IDX(inst, 0)
/**
* @brief Get the node identifier for the controller phandle from a
* resets phandle-array property by name
*
* @param inst instance number
* @param name lowercase-and-underscores name of a resets element
* as defined by the node's reset-names property
* @return the node identifier for the reset controller referenced by
* the named element
* @see DT_RESET_CTLR_BY_NAME()
*/
#define DT_INST_RESET_CTLR_BY_NAME(inst, name) \
DT_RESET_CTLR_BY_NAME(DT_DRV_INST(inst), name)
/**
* @brief Get a DT_DRV_COMPAT instance's reset specifier's cell value
* at an index
* @param inst DT_DRV_COMPAT instance number
* @param idx logical index into resets property
* @param cell lowercase-and-underscores cell name
* @return the cell value at index "idx"
* @see DT_RESET_CELL_BY_IDX()
*/
#define DT_INST_RESET_CELL_BY_IDX(inst, idx, cell) \
DT_RESET_CELL_BY_IDX(DT_DRV_INST(inst), idx, cell)
/**
* @brief Get a DT_DRV_COMPAT instance's reset specifier's cell value by name
* @param inst DT_DRV_COMPAT instance number
* @param name lowercase-and-underscores name of a resets element
* as defined by the node's reset-names property
* @param cell lowercase-and-underscores cell name
* @return the cell value in the specifier at the named element
* @see DT_RESET_CELL_BY_NAME()
*/
#define DT_INST_RESET_CELL_BY_NAME(inst, name, cell) \
DT_RESET_CELL_BY_NAME(DT_DRV_INST(inst), name, cell)
/**
* @brief Equivalent to DT_INST_RESET_CELL_BY_IDX(inst, 0, cell)
* @param inst DT_DRV_COMPAT instance number
* @param cell lowercase-and-underscores cell name
* @return the value of the cell inside the specifier at index 0
*/
#define DT_INST_RESET_CELL(inst, cell) \
DT_INST_RESET_CELL_BY_IDX(inst, 0, cell)
/**
* @brief Get a Reset Controller specifier's id cell at an index
*
* This macro only works for Reset Controller specifiers with cells named "id".
* Refer to the node's binding to check if necessary.
*
* Example devicetree fragment:
*
* reset: reset-controller@... {
* compatible = "vnd,reset";
* #reset-cells = <1>;
* };
*
* n: node {
* resets = <&reset 10>;
* };
*
* Bindings fragment for the vnd,reset compatible:
*
* reset-cells:
* - id
*
* Example usage:
*
* DT_RESET_ID_BY_IDX(DT_NODELABEL(n), 0) // 10
*
* @param node_id node identifier
* @param idx logical index into "resets"
* @return the id cell value at index "idx"
* @see DT_PHA_BY_IDX()
*/
#define DT_RESET_ID_BY_IDX(node_id, idx) \
DT_PHA_BY_IDX(node_id, resets, idx, id)
/**
* @brief Equivalent to DT_RESET_ID_BY_IDX(node_id, 0)
* @param node_id node identifier
* @return the id cell value at index 0
* @see DT_RESET_ID_BY_IDX()
*/
#define DT_RESET_ID(node_id) \
DT_RESET_ID_BY_IDX(node_id, 0)
/**
* @brief Get a DT_DRV_COMPAT instance's Reset Controller specifier's id cell value
* at an index
* @param inst DT_DRV_COMPAT instance number
* @param idx logical index into "resets"
* @return the id cell value at index "idx"
* @see DT_RESET_ID_BY_IDX()
*/
#define DT_INST_RESET_ID_BY_IDX(inst, idx) \
DT_RESET_ID_BY_IDX(DT_DRV_INST(inst), idx)
/**
* @brief Equivalent to DT_INST_RESET_ID_BY_IDX(inst, 0)
* @param inst DT_DRV_COMPAT instance number
* @return the id cell value at index 0
* @see DT_INST_RESET_ID_BY_IDX()
*/
#define DT_INST_RESET_ID(inst) \
DT_INST_RESET_ID_BY_IDX(inst, 0)
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* ZEPHYR_INCLUDE_DEVICETREE_RESET_H_ */
``` | /content/code_sandbox/include/zephyr/devicetree/reset.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,289 |
```objective-c
/**
* @file
* @brief IO channels devicetree macro public API header file.
*/
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DEVICETREE_IO_CHANNELS_H_
#define ZEPHYR_INCLUDE_DEVICETREE_IO_CHANNELS_H_
#ifdef __cplusplus
extern "C" {
#endif
/**
* @defgroup devicetree-io-channels Devicetree IO Channels API
* @ingroup devicetree
* @{
*/
/**
*
* @brief Get the node identifier for the node referenced by an
* io-channels property at an index
*
* Example devicetree fragment:
*
* adc1: adc@... { ... };
*
* adc2: adc@... { ... };
*
* n: node {
* io-channels = <&adc1 10>, <&adc2 20>;
* };
*
* Example usage:
*
* DT_IO_CHANNELS_CTLR_BY_IDX(DT_NODELABEL(n), 0) // DT_NODELABEL(adc1)
* DT_IO_CHANNELS_CTLR_BY_IDX(DT_NODELABEL(n), 1) // DT_NODELABEL(adc2)
*
* @param node_id node identifier for a node with an io-channels property
* @param idx logical index into io-channels property
* @return the node identifier for the node referenced at index "idx"
* @see DT_PROP_BY_PHANDLE_IDX()
*/
#define DT_IO_CHANNELS_CTLR_BY_IDX(node_id, idx) \
DT_PHANDLE_BY_IDX(node_id, io_channels, idx)
/**
* @brief Get the node identifier for the node referenced by an
* io-channels property by name
*
* Example devicetree fragment:
*
* adc1: adc@... { ... };
*
* adc2: adc@... { ... };
*
* n: node {
* io-channels = <&adc1 10>, <&adc2 20>;
* io-channel-names = "SENSOR", "BANDGAP";
* };
*
* Example usage:
*
* DT_IO_CHANNELS_CTLR_BY_NAME(DT_NODELABEL(n), sensor) // DT_NODELABEL(adc1)
* DT_IO_CHANNELS_CTLR_BY_NAME(DT_NODELABEL(n), bandgap) // DT_NODELABEL(adc2)
*
* @param node_id node identifier for a node with an io-channels property
* @param name lowercase-and-underscores name of an io-channels element
* as defined by the node's io-channel-names property
* @return the node identifier for the node referenced at the named element
* @see DT_PHANDLE_BY_NAME()
*/
#define DT_IO_CHANNELS_CTLR_BY_NAME(node_id, name) \
DT_PHANDLE_BY_NAME(node_id, io_channels, name)
/**
* @brief Equivalent to DT_IO_CHANNELS_CTLR_BY_IDX(node_id, 0)
* @param node_id node identifier for a node with an io-channels property
* @return the node identifier for the node referenced at index 0
* in the node's "io-channels" property
* @see DT_IO_CHANNELS_CTLR_BY_IDX()
*/
#define DT_IO_CHANNELS_CTLR(node_id) DT_IO_CHANNELS_CTLR_BY_IDX(node_id, 0)
/**
* @brief Get the node identifier from a DT_DRV_COMPAT instance's io-channels
* property at an index
*
* @param inst DT_DRV_COMPAT instance number
* @param idx logical index into io-channels property
* @return the node identifier for the node referenced at index "idx"
* @see DT_IO_CHANNELS_CTLR_BY_IDX()
*/
#define DT_INST_IO_CHANNELS_CTLR_BY_IDX(inst, idx) \
DT_IO_CHANNELS_CTLR_BY_IDX(DT_DRV_INST(inst), idx)
/**
* @brief Get the node identifier from a DT_DRV_COMPAT instance's io-channels
* property by name
* @param inst DT_DRV_COMPAT instance number
* @param name lowercase-and-underscores name of an io-channels element
* as defined by the node's io-channel-names property
* @return the node identifier for the node referenced at the named element
* @see DT_IO_CHANNELS_CTLR_BY_NAME()
*/
#define DT_INST_IO_CHANNELS_CTLR_BY_NAME(inst, name) \
DT_IO_CHANNELS_CTLR_BY_NAME(DT_DRV_INST(inst), name)
/**
* @brief Equivalent to DT_INST_IO_CHANNELS_CTLR_BY_IDX(inst, 0)
* @param inst DT_DRV_COMPAT instance number
* @return the node identifier for the node referenced at index 0
* in the node's "io-channels" property
* @see DT_IO_CHANNELS_CTLR_BY_IDX()
*/
#define DT_INST_IO_CHANNELS_CTLR(inst) DT_INST_IO_CHANNELS_CTLR_BY_IDX(inst, 0)
/**
* @brief Get an io-channels specifier input cell at an index
*
* This macro only works for io-channels specifiers with cells named
* "input". Refer to the node's binding to check if necessary.
*
* Example devicetree fragment:
*
* adc1: adc@... {
* compatible = "vnd,adc";
* #io-channel-cells = <1>;
* };
*
* adc2: adc@... {
* compatible = "vnd,adc";
* #io-channel-cells = <1>;
* };
*
* n: node {
* io-channels = <&adc1 10>, <&adc2 20>;
* };
*
* Bindings fragment for the vnd,adc compatible:
*
* io-channel-cells:
* - input
*
* Example usage:
*
* DT_IO_CHANNELS_INPUT_BY_IDX(DT_NODELABEL(n), 0) // 10
* DT_IO_CHANNELS_INPUT_BY_IDX(DT_NODELABEL(n), 1) // 20
*
* @param node_id node identifier for a node with an io-channels property
* @param idx logical index into io-channels property
* @return the input cell in the specifier at index "idx"
* @see DT_PHA_BY_IDX()
*/
#define DT_IO_CHANNELS_INPUT_BY_IDX(node_id, idx) \
DT_PHA_BY_IDX(node_id, io_channels, idx, input)
/**
* @brief Get an io-channels specifier input cell by name
*
* This macro only works for io-channels specifiers with cells named
* "input". Refer to the node's binding to check if necessary.
*
* Example devicetree fragment:
*
* adc1: adc@... {
* compatible = "vnd,adc";
* #io-channel-cells = <1>;
* };
*
* adc2: adc@... {
* compatible = "vnd,adc";
* #io-channel-cells = <1>;
* };
*
* n: node {
* io-channels = <&adc1 10>, <&adc2 20>;
* io-channel-names = "SENSOR", "BANDGAP";
* };
*
* Bindings fragment for the vnd,adc compatible:
*
* io-channel-cells:
* - input
*
* Example usage:
*
* DT_IO_CHANNELS_INPUT_BY_NAME(DT_NODELABEL(n), sensor) // 10
* DT_IO_CHANNELS_INPUT_BY_NAME(DT_NODELABEL(n), bandgap) // 20
*
* @param node_id node identifier for a node with an io-channels property
* @param name lowercase-and-underscores name of an io-channels element
* as defined by the node's io-channel-names property
* @return the input cell in the specifier at the named element
* @see DT_PHA_BY_NAME()
*/
#define DT_IO_CHANNELS_INPUT_BY_NAME(node_id, name) \
DT_PHA_BY_NAME(node_id, io_channels, name, input)
/**
* @brief Equivalent to DT_IO_CHANNELS_INPUT_BY_IDX(node_id, 0)
* @param node_id node identifier for a node with an io-channels property
* @return the input cell in the specifier at index 0
* @see DT_IO_CHANNELS_INPUT_BY_IDX()
*/
#define DT_IO_CHANNELS_INPUT(node_id) DT_IO_CHANNELS_INPUT_BY_IDX(node_id, 0)
/**
* @brief Get an input cell from the "DT_DRV_INST(inst)" io-channels
* property at an index
* @param inst DT_DRV_COMPAT instance number
* @param idx logical index into io-channels property
* @return the input cell in the specifier at index "idx"
* @see DT_IO_CHANNELS_INPUT_BY_IDX()
*/
#define DT_INST_IO_CHANNELS_INPUT_BY_IDX(inst, idx) \
DT_IO_CHANNELS_INPUT_BY_IDX(DT_DRV_INST(inst), idx)
/**
* @brief Get an input cell from the "DT_DRV_INST(inst)" io-channels
* property by name
* @param inst DT_DRV_COMPAT instance number
* @param name lowercase-and-underscores name of an io-channels element
* as defined by the instance's io-channel-names property
* @return the input cell in the specifier at the named element
* @see DT_IO_CHANNELS_INPUT_BY_NAME()
*/
#define DT_INST_IO_CHANNELS_INPUT_BY_NAME(inst, name) \
DT_IO_CHANNELS_INPUT_BY_NAME(DT_DRV_INST(inst), name)
/**
* @brief Equivalent to DT_INST_IO_CHANNELS_INPUT_BY_IDX(inst, 0)
* @param inst DT_DRV_COMPAT instance number
* @return the input cell in the specifier at index 0
*/
#define DT_INST_IO_CHANNELS_INPUT(inst) DT_INST_IO_CHANNELS_INPUT_BY_IDX(inst, 0)
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* ZEPHYR_INCLUDE_DEVICETREE_IO_CHANNELS_H_ */
``` | /content/code_sandbox/include/zephyr/devicetree/io-channels.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,048 |
```objective-c
/*
*/
#ifndef ZEPHYR_INCLUDE_DEVICETREE_ORDINALS_H_
#define ZEPHYR_INCLUDE_DEVICETREE_ORDINALS_H_
/**
* @file
* @brief Devicetree node dependency ordinals
*/
/**
* @defgroup devicetree-dep-ord Dependency tracking
* @ingroup devicetree
* @{
*/
/**
* @brief Get a node's dependency ordinal
* @param node_id Node identifier
* @return the node's dependency ordinal as an integer literal
*/
#define DT_DEP_ORD(node_id) DT_CAT(node_id, _ORD)
/**
* @brief Get a node's dependency ordinal in string sortable form
* @param node_id Node identifier
* @return the node's dependency ordinal as a zero-padded integer literal
*/
#define DT_DEP_ORD_STR_SORTABLE(node_id) DT_CAT(node_id, _ORD_STR_SORTABLE)
/**
* @brief Get a list of dependency ordinals of a node's direct dependencies
*
* There is a comma after each ordinal in the expansion, **including**
* the last one:
*
* DT_REQUIRES_DEP_ORDS(my_node) // required_ord_1, ..., required_ord_n,
*
* The one case DT_REQUIRES_DEP_ORDS() expands to nothing is when
* given the root node identifier @p DT_ROOT as argument. The root has
* no direct dependencies; every other node at least depends on its
* parent.
*
* @param node_id Node identifier
* @return a list of dependency ordinals, with each ordinal followed
* by a comma (<tt>,</tt>), or an empty expansion
*/
#define DT_REQUIRES_DEP_ORDS(node_id) DT_CAT(node_id, _REQUIRES_ORDS)
/**
* @brief Get a list of dependency ordinals of what depends directly on a node
*
* There is a comma after each ordinal in the expansion, **including**
* the last one:
*
* DT_SUPPORTS_DEP_ORDS(my_node) // supported_ord_1, ..., supported_ord_n,
*
* DT_SUPPORTS_DEP_ORDS() may expand to nothing. This happens when @p node_id
* refers to a leaf node that nothing else depends on.
*
* @param node_id Node identifier
* @return a list of dependency ordinals, with each ordinal followed
* by a comma (<tt>,</tt>), or an empty expansion
*/
#define DT_SUPPORTS_DEP_ORDS(node_id) DT_CAT(node_id, _SUPPORTS_ORDS)
/**
* @brief Get a DT_DRV_COMPAT instance's dependency ordinal
*
* Equivalent to DT_DEP_ORD(DT_DRV_INST(inst)).
*
* @param inst instance number
* @return The instance's dependency ordinal
*/
#define DT_INST_DEP_ORD(inst) DT_DEP_ORD(DT_DRV_INST(inst))
/**
* @brief Get a list of dependency ordinals of a DT_DRV_COMPAT instance's
* direct dependencies
*
* Equivalent to DT_REQUIRES_DEP_ORDS(DT_DRV_INST(inst)).
*
* @param inst instance number
* @return a list of dependency ordinals for the nodes the instance depends
* on directly
*/
#define DT_INST_REQUIRES_DEP_ORDS(inst) DT_REQUIRES_DEP_ORDS(DT_DRV_INST(inst))
/**
* @brief Get a list of dependency ordinals of what depends directly on a
* DT_DRV_COMPAT instance
*
* Equivalent to DT_SUPPORTS_DEP_ORDS(DT_DRV_INST(inst)).
*
* @param inst instance number
* @return a list of node identifiers for the nodes that depend directly
* on the instance
*/
#define DT_INST_SUPPORTS_DEP_ORDS(inst) DT_SUPPORTS_DEP_ORDS(DT_DRV_INST(inst))
/**
* @}
*/
#endif /* ZEPHYR_INCLUDE_DEVICETREE_ORDINALS_H_ */
``` | /content/code_sandbox/include/zephyr/devicetree/ordinals.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 808 |
```objective-c
/*
*/
#ifndef ZEPHYR_INCLUDE_DEVICETREE_PINCTRL_H_
#define ZEPHYR_INCLUDE_DEVICETREE_PINCTRL_H_
/**
* @file
* @brief Devicetree pin control helpers
*/
/**
* @defgroup devicetree-pinctrl Pin control
* @ingroup devicetree
* @{
*/
/**
* @brief Get a node identifier for a phandle in a pinctrl property by index
*
* Example devicetree fragment:
*
* n: node {
* pinctrl-0 = <&foo &bar>;
* pinctrl-1 = <&baz &blub>;
* }
*
* Example usage:
*
* DT_PINCTRL_BY_IDX(DT_NODELABEL(n), 0, 1) // DT_NODELABEL(bar)
* DT_PINCTRL_BY_IDX(DT_NODELABEL(n), 1, 0) // DT_NODELABEL(baz)
*
* @param node_id node with a pinctrl-'pc_idx' property
* @param pc_idx index of the pinctrl property itself
* @param idx index into the value of the pinctrl property
* @return node identifier for the phandle at index 'idx' in 'pinctrl-'pc_idx''
*/
#define DT_PINCTRL_BY_IDX(node_id, pc_idx, idx) \
DT_CAT6(node_id, _P_pinctrl_, pc_idx, _IDX_, idx, _PH)
/**
* @brief Get a node identifier from a pinctrl-0 property
*
* This is equivalent to:
*
* DT_PINCTRL_BY_IDX(node_id, 0, idx)
*
* It is provided for convenience since pinctrl-0 is commonly used.
*
* @param node_id node with a pinctrl-0 property
* @param idx index into the pinctrl-0 property
* @return node identifier for the phandle at index idx in the pinctrl-0
* property of that node
*/
#define DT_PINCTRL_0(node_id, idx) DT_PINCTRL_BY_IDX(node_id, 0, idx)
/**
* @brief Get a node identifier for a phandle inside a pinctrl node by name
*
* Example devicetree fragment:
*
* n: node {
* pinctrl-0 = <&foo &bar>;
* pinctrl-1 = <&baz &blub>;
* pinctrl-names = "default", "sleep";
* };
*
* Example usage:
*
* DT_PINCTRL_BY_NAME(DT_NODELABEL(n), default, 1) // DT_NODELABEL(bar)
* DT_PINCTRL_BY_NAME(DT_NODELABEL(n), sleep, 0) // DT_NODELABEL(baz)
*
* @param node_id node with a named pinctrl property
* @param name lowercase-and-underscores pinctrl property name
* @param idx index into the value of the named pinctrl property
* @return node identifier for the phandle at that index in the pinctrl
* property
*/
#define DT_PINCTRL_BY_NAME(node_id, name, idx) \
DT_CAT6(node_id, _PINCTRL_NAME_, name, _IDX_, idx, _PH)
/**
* @brief Convert a pinctrl name to its corresponding index
*
* Example devicetree fragment:
*
* n: node {
* pinctrl-0 = <&foo &bar>;
* pinctrl-1 = <&baz &blub>;
* pinctrl-names = "default", "sleep";
* };
*
* Example usage:
*
* DT_PINCTRL_NAME_TO_IDX(DT_NODELABEL(n), default) // 0
* DT_PINCTRL_NAME_TO_IDX(DT_NODELABEL(n), sleep) // 1
*
* @param node_id node identifier with a named pinctrl property
* @param name lowercase-and-underscores name name of the pinctrl whose index to get
* @return integer literal for the index of the pinctrl property with that name
*/
#define DT_PINCTRL_NAME_TO_IDX(node_id, name) \
DT_CAT4(node_id, _PINCTRL_NAME_, name, _IDX)
/**
* @brief Convert a pinctrl property index to its name as a token
*
* This allows you to get a pinctrl property's name, and "remove the
* quotes" from it.
*
* DT_PINCTRL_IDX_TO_NAME_TOKEN() can only be used if the node has a
* pinctrl-'pc_idx' property and a pinctrl-names property element for
* that index. It is an error to use it in other circumstances.
*
* Example devicetree fragment:
*
* n: node {
* pinctrl-0 = <...>;
* pinctrl-1 = <...>;
* pinctrl-names = "default", "f.o.o2";
* };
*
* Example usage:
*
* DT_PINCTRL_IDX_TO_NAME_TOKEN(DT_NODELABEL(n), 0) // default
* DT_PINCTRL_IDX_TO_NAME_TOKEN(DT_NODELABEL(n), 1) // f_o_o2
*
* The same caveats and restrictions that apply to DT_STRING_TOKEN()'s
* return value also apply here.
*
* @param node_id node identifier
* @param pc_idx index of a pinctrl property in that node
* @return name of the pinctrl property, as a token, without any quotes
* and with non-alphanumeric characters converted to underscores
*/
#define DT_PINCTRL_IDX_TO_NAME_TOKEN(node_id, pc_idx) \
DT_CAT4(node_id, _PINCTRL_IDX_, pc_idx, _TOKEN)
/**
* @brief Like DT_PINCTRL_IDX_TO_NAME_TOKEN(), but with an uppercased result
*
* This does the a similar conversion as
* DT_PINCTRL_IDX_TO_NAME_TOKEN(node_id, pc_idx). The only difference
* is that alphabetical characters in the result are uppercased.
*
* Example devicetree fragment:
*
* n: node {
* pinctrl-0 = <...>;
* pinctrl-1 = <...>;
* pinctrl-names = "default", "f.o.o2";
* };
*
* Example usage:
*
* DT_PINCTRL_IDX_TO_NAME_TOKEN(DT_NODELABEL(n), 0) // DEFAULT
* DT_PINCTRL_IDX_TO_NAME_TOKEN(DT_NODELABEL(n), 1) // F_O_O2
*
* The same caveats and restrictions that apply to
* DT_STRING_UPPER_TOKEN()'s return value also apply here.
*/
#define DT_PINCTRL_IDX_TO_NAME_UPPER_TOKEN(node_id, pc_idx) \
DT_CAT4(node_id, _PINCTRL_IDX_, pc_idx, _UPPER_TOKEN)
/**
* @brief Get the number of phandles in a pinctrl property
*
* Example devicetree fragment:
*
* n1: node-1 {
* pinctrl-0 = <&foo &bar>;
* };
*
* n2: node-2 {
* pinctrl-0 = <&baz>;
* };
*
* Example usage:
*
* DT_NUM_PINCTRLS_BY_IDX(DT_NODELABEL(n1), 0) // 2
* DT_NUM_PINCTRLS_BY_IDX(DT_NODELABEL(n2), 0) // 1
*
* @param node_id node identifier with a pinctrl property
* @param pc_idx index of the pinctrl property itself
* @return number of phandles in the property with that index
*/
#define DT_NUM_PINCTRLS_BY_IDX(node_id, pc_idx) \
DT_CAT4(node_id, _P_pinctrl_, pc_idx, _LEN)
/**
* @brief Like DT_NUM_PINCTRLS_BY_IDX(), but by name instead
*
* Example devicetree fragment:
*
* n: node {
* pinctrl-0 = <&foo &bar>;
* pinctrl-1 = <&baz>
* pinctrl-names = "default", "sleep";
* };
*
* Example usage:
*
* DT_NUM_PINCTRLS_BY_NAME(DT_NODELABEL(n), default) // 2
* DT_NUM_PINCTRLS_BY_NAME(DT_NODELABEL(n), sleep) // 1
*
* @param node_id node identifier with a pinctrl property
* @param name lowercase-and-underscores name name of the pinctrl property
* @return number of phandles in the property with that name
*/
#define DT_NUM_PINCTRLS_BY_NAME(node_id, name) \
DT_NUM_PINCTRLS_BY_IDX(node_id, DT_PINCTRL_NAME_TO_IDX(node_id, name))
/**
* @brief Get the number of pinctrl properties in a node
*
* This expands to 0 if there are no pinctrl-i properties.
* Otherwise, it expands to the number of such properties.
*
* Example devicetree fragment:
*
* n1: node-1 {
* pinctrl-0 = <...>;
* pinctrl-1 = <...>;
* };
*
* n2: node-2 {
* };
*
* Example usage:
*
* DT_NUM_PINCTRL_STATES(DT_NODELABEL(n1)) // 2
* DT_NUM_PINCTRL_STATES(DT_NODELABEL(n2)) // 0
*
* @param node_id node identifier; may or may not have any pinctrl properties
* @return number of pinctrl properties in the node
*/
#define DT_NUM_PINCTRL_STATES(node_id) DT_CAT(node_id, _PINCTRL_NUM)
/**
* @brief Test if a node has a pinctrl property with an index
*
* This expands to 1 if the pinctrl-'idx' property exists.
* Otherwise, it expands to 0.
*
* Example devicetree fragment:
*
* n1: node-1 {
* pinctrl-0 = <...>;
* pinctrl-1 = <...>;
* };
*
* n2: node-2 {
* };
*
* Example usage:
*
* DT_PINCTRL_HAS_IDX(DT_NODELABEL(n1), 0) // 1
* DT_PINCTRL_HAS_IDX(DT_NODELABEL(n1), 1) // 1
* DT_PINCTRL_HAS_IDX(DT_NODELABEL(n1), 2) // 0
* DT_PINCTRL_HAS_IDX(DT_NODELABEL(n2), 0) // 0
*
* @param node_id node identifier; may or may not have any pinctrl properties
* @param pc_idx index of a pinctrl property whose existence to check
* @return 1 if the property exists, 0 otherwise
*/
#define DT_PINCTRL_HAS_IDX(node_id, pc_idx) \
IS_ENABLED(DT_CAT4(node_id, _PINCTRL_IDX_, pc_idx, _EXISTS))
/**
* @brief Test if a node has a pinctrl property with a name
*
* This expands to 1 if the named pinctrl property exists.
* Otherwise, it expands to 0.
*
* Example devicetree fragment:
*
* n1: node-1 {
* pinctrl-0 = <...>;
* pinctrl-names = "default";
* };
*
* n2: node-2 {
* };
*
* Example usage:
*
* DT_PINCTRL_HAS_NAME(DT_NODELABEL(n1), default) // 1
* DT_PINCTRL_HAS_NAME(DT_NODELABEL(n1), sleep) // 0
* DT_PINCTRL_HAS_NAME(DT_NODELABEL(n2), default) // 0
*
* @param node_id node identifier; may or may not have any pinctrl properties
* @param name lowercase-and-underscores pinctrl property name to check
* @return 1 if the property exists, 0 otherwise
*/
#define DT_PINCTRL_HAS_NAME(node_id, name) \
IS_ENABLED(DT_CAT4(node_id, _PINCTRL_NAME_, name, _EXISTS))
/**
* @brief Get a node identifier for a phandle in a pinctrl property by index
* for a DT_DRV_COMPAT instance
*
* This is equivalent to DT_PINCTRL_BY_IDX(DT_DRV_INST(inst), pc_idx, idx).
*
* @param inst instance number
* @param pc_idx index of the pinctrl property itself
* @param idx index into the value of the pinctrl property
* @return node identifier for the phandle at index 'idx' in 'pinctrl-'pc_idx''
*/
#define DT_INST_PINCTRL_BY_IDX(inst, pc_idx, idx) \
DT_PINCTRL_BY_IDX(DT_DRV_INST(inst), pc_idx, idx)
/**
* @brief Get a node identifier from a pinctrl-0 property for a
* DT_DRV_COMPAT instance
*
* This is equivalent to:
*
* DT_PINCTRL_BY_IDX(DT_DRV_INST(inst), 0, idx)
*
* It is provided for convenience since pinctrl-0 is commonly used.
*
* @param inst instance number
* @param idx index into the pinctrl-0 property
* @return node identifier for the phandle at index idx in the pinctrl-0
* property of that instance
*/
#define DT_INST_PINCTRL_0(inst, idx) \
DT_PINCTRL_BY_IDX(DT_DRV_INST(inst), 0, idx)
/**
* @brief Get a node identifier for a phandle inside a pinctrl node
* for a DT_DRV_COMPAT instance
*
* This is equivalent to DT_PINCTRL_BY_NAME(DT_DRV_INST(inst), name, idx).
*
* @param inst instance number
* @param name lowercase-and-underscores pinctrl property name
* @param idx index into the value of the named pinctrl property
* @return node identifier for the phandle at that index in the pinctrl
* property
*/
#define DT_INST_PINCTRL_BY_NAME(inst, name, idx) \
DT_PINCTRL_BY_NAME(DT_DRV_INST(inst), name, idx)
/**
* @brief Convert a pinctrl name to its corresponding index
* for a DT_DRV_COMPAT instance
*
* This is equivalent to DT_PINCTRL_NAME_TO_IDX(DT_DRV_INST(inst),
* name).
*
* @param inst instance number
* @param name lowercase-and-underscores name of the pinctrl whose index to get
* @return integer literal for the index of the pinctrl property with that name
*/
#define DT_INST_PINCTRL_NAME_TO_IDX(inst, name) \
DT_PINCTRL_NAME_TO_IDX(DT_DRV_INST(inst), name)
/**
* @brief Convert a pinctrl index to its name as an uppercased token
*
* This is equivalent to
* DT_PINCTRL_IDX_TO_NAME_TOKEN(DT_DRV_INST(inst), pc_idx).
*
* @param inst instance number
* @param pc_idx index of the pinctrl property itself
* @return name of the pin control property as a token
*/
#define DT_INST_PINCTRL_IDX_TO_NAME_TOKEN(inst, pc_idx) \
DT_PINCTRL_IDX_TO_NAME_TOKEN(DT_DRV_INST(inst), pc_idx)
/**
* @brief Convert a pinctrl index to its name as an uppercased token
*
* This is equivalent to
* DT_PINCTRL_IDX_TO_NAME_UPPER_TOKEN(DT_DRV_INST(inst), idx).
*
* @param inst instance number
* @param pc_idx index of the pinctrl property itself
* @return name of the pin control property as an uppercase token
*/
#define DT_INST_PINCTRL_IDX_TO_NAME_UPPER_TOKEN(inst, pc_idx) \
DT_PINCTRL_IDX_TO_NAME_UPPER_TOKEN(DT_DRV_INST(inst), pc_idx)
/**
* @brief Get the number of phandles in a pinctrl property
* for a DT_DRV_COMPAT instance
*
* This is equivalent to DT_NUM_PINCTRLS_BY_IDX(DT_DRV_INST(inst),
* pc_idx).
*
* @param inst instance number
* @param pc_idx index of the pinctrl property itself
* @return number of phandles in the property with that index
*/
#define DT_INST_NUM_PINCTRLS_BY_IDX(inst, pc_idx) \
DT_NUM_PINCTRLS_BY_IDX(DT_DRV_INST(inst), pc_idx)
/**
* @brief Like DT_INST_NUM_PINCTRLS_BY_IDX(), but by name instead
*
* This is equivalent to DT_NUM_PINCTRLS_BY_NAME(DT_DRV_INST(inst),
* name).
*
* @param inst instance number
* @param name lowercase-and-underscores name of the pinctrl property
* @return number of phandles in the property with that name
*/
#define DT_INST_NUM_PINCTRLS_BY_NAME(inst, name) \
DT_NUM_PINCTRLS_BY_NAME(DT_DRV_INST(inst), name)
/**
* @brief Get the number of pinctrl properties in a DT_DRV_COMPAT instance
*
* This is equivalent to DT_NUM_PINCTRL_STATES(DT_DRV_INST(inst)).
*
* @param inst instance number
* @return number of pinctrl properties in the instance
*/
#define DT_INST_NUM_PINCTRL_STATES(inst) \
DT_NUM_PINCTRL_STATES(DT_DRV_INST(inst))
/**
* @brief Test if a DT_DRV_COMPAT instance has a pinctrl property
* with an index
*
* This is equivalent to DT_PINCTRL_HAS_IDX(DT_DRV_INST(inst), pc_idx).
*
* @param inst instance number
* @param pc_idx index of a pinctrl property whose existence to check
* @return 1 if the property exists, 0 otherwise
*/
#define DT_INST_PINCTRL_HAS_IDX(inst, pc_idx) \
DT_PINCTRL_HAS_IDX(DT_DRV_INST(inst), pc_idx)
/**
* @brief Test if a DT_DRV_COMPAT instance has a pinctrl property with a name
*
* This is equivalent to DT_PINCTRL_HAS_NAME(DT_DRV_INST(inst), name).
*
* @param inst instance number
* @param name lowercase-and-underscores pinctrl property name to check
* @return 1 if the property exists, 0 otherwise
*/
#define DT_INST_PINCTRL_HAS_NAME(inst, name) \
DT_PINCTRL_HAS_NAME(DT_DRV_INST(inst), name)
/**
* @}
*/
#endif /* ZEPHYR_INCLUDE_DEVICETREE_PINCTRL_H_ */
``` | /content/code_sandbox/include/zephyr/devicetree/pinctrl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 3,921 |
```objective-c
/*
*
*/
/**
* @file
* @brief Interrupt controller devicetree macro public API header file.
*/
#ifndef ZEPHYR_INCLUDE_DEVICETREE_INTERRUPT_CONTROLLER_H_
#define ZEPHYR_INCLUDE_DEVICETREE_INTERRUPT_CONTROLLER_H_
#ifdef __cplusplus
extern "C" {
#endif
#include <zephyr/devicetree.h>
#include <zephyr/sys/util_macro.h>
/**
* @defgroup devicetree-interrupt_controller Devicetree Interrupt Controller API
* @ingroup devicetree
* @{
*/
/**
* @brief Get the aggregator level of an interrupt controller
*
* @note Aggregator level is equivalent to IRQ_LEVEL + 1 (a 2nd level aggregator has Zephyr level 1
* IRQ encoding)
*
* @param node_id node identifier of an interrupt controller
*
* @return Level of the interrupt controller
*/
#define DT_INTC_GET_AGGREGATOR_LEVEL(node_id) UTIL_INC(DT_IRQ_LEVEL(node_id))
/**
* @brief Get the aggregator level of a `DT_DRV_COMPAT` interrupt controller
*
* @note Aggregator level is equivalent to IRQ_LEVEL + 1 (a 2nd level aggregator has Zephyr level 1
* IRQ encoding)
*
* @param inst instance of an interrupt controller
*
* @return Level of the interrupt controller
*/
#define DT_INST_INTC_GET_AGGREGATOR_LEVEL(inst) DT_INTC_GET_AGGREGATOR_LEVEL(DT_DRV_INST(inst))
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* ZEPHYR_INCLUDE_DEVICETREE_INTERRUPT_CONTROLLER_H_ */
``` | /content/code_sandbox/include/zephyr/devicetree/interrupt_controller.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 338 |
```objective-c
/**
* @file
* @brief DMA Devicetree macro public API header file.
*/
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DEVICETREE_DMAS_H_
#define ZEPHYR_INCLUDE_DEVICETREE_DMAS_H_
#ifdef __cplusplus
extern "C" {
#endif
/**
* @defgroup devicetree-dmas Devicetree DMA API
* @ingroup devicetree
* @{
*/
/**
* @brief Get the node identifier for the DMA controller from a
* dmas property at an index
*
* Example devicetree fragment:
*
* dma1: dma@... { ... };
*
* dma2: dma@... { ... };
*
* n: node {
* dmas = <&dma1 1 2 0x400 0x3>,
* <&dma2 6 3 0x404 0x5>;
* };
*
* Example usage:
*
* DT_DMAS_CTLR_BY_IDX(DT_NODELABEL(n), 0) // DT_NODELABEL(dma1)
* DT_DMAS_CTLR_BY_IDX(DT_NODELABEL(n), 1) // DT_NODELABEL(dma2)
*
* @param node_id node identifier for a node with a dmas property
* @param idx logical index into dmas property
* @return the node identifier for the DMA controller referenced at
* index "idx"
* @see DT_PROP_BY_PHANDLE_IDX()
*/
#define DT_DMAS_CTLR_BY_IDX(node_id, idx) DT_PHANDLE_BY_IDX(node_id, dmas, idx)
/**
* @brief Get the node identifier for the DMA controller from a
* dmas property by name
*
* Example devicetree fragment:
*
* dma1: dma@... { ... };
*
* dma2: dma@... { ... };
*
* n: node {
* dmas = <&dma1 1 2 0x400 0x3>,
* <&dma2 6 3 0x404 0x5>;
* dma-names = "tx", "rx";
* };
*
* Example usage:
*
* DT_DMAS_CTLR_BY_NAME(DT_NODELABEL(n), tx) // DT_NODELABEL(dma1)
* DT_DMAS_CTLR_BY_NAME(DT_NODELABEL(n), rx) // DT_NODELABEL(dma2)
*
* @param node_id node identifier for a node with a dmas property
* @param name lowercase-and-underscores name of a dmas element
* as defined by the node's dma-names property
* @return the node identifier for the DMA controller in the named element
* @see DT_PHANDLE_BY_NAME()
*/
#define DT_DMAS_CTLR_BY_NAME(node_id, name) \
DT_PHANDLE_BY_NAME(node_id, dmas, name)
/**
* @brief Equivalent to DT_DMAS_CTLR_BY_IDX(node_id, 0)
* @param node_id node identifier for a node with a dmas property
* @return the node identifier for the DMA controller at index 0
* in the node's "dmas" property
* @see DT_DMAS_CTLR_BY_IDX()
*/
#define DT_DMAS_CTLR(node_id) DT_DMAS_CTLR_BY_IDX(node_id, 0)
/**
* @brief Get the node identifier for the DMA controller from a
* DT_DRV_COMPAT instance's dmas property at an index
*
* @param inst DT_DRV_COMPAT instance number
* @param idx logical index into dmas property
* @return the node identifier for the DMA controller referenced at
* index "idx"
* @see DT_DMAS_CTLR_BY_IDX()
*/
#define DT_INST_DMAS_CTLR_BY_IDX(inst, idx) \
DT_DMAS_CTLR_BY_IDX(DT_DRV_INST(inst), idx)
/**
* @brief Get the node identifier for the DMA controller from a
* DT_DRV_COMPAT instance's dmas property by name
* @param inst DT_DRV_COMPAT instance number
* @param name lowercase-and-underscores name of a dmas element
* as defined by the node's dma-names property
* @return the node identifier for the DMA controller in the named element
* @see DT_DMAS_CTLR_BY_NAME()
*/
#define DT_INST_DMAS_CTLR_BY_NAME(inst, name) \
DT_DMAS_CTLR_BY_NAME(DT_DRV_INST(inst), name)
/**
* @brief Equivalent to DT_INST_DMAS_CTLR_BY_IDX(inst, 0)
* @param inst DT_DRV_COMPAT instance number
* @return the node identifier for the DMA controller at index 0
* in the instance's "dmas" property
* @see DT_DMAS_CTLR_BY_IDX()
*/
#define DT_INST_DMAS_CTLR(inst) DT_INST_DMAS_CTLR_BY_IDX(inst, 0)
/**
* @brief Get a DMA specifier's cell value at an index
*
* Example devicetree fragment:
*
* dma1: dma@... {
* compatible = "vnd,dma";
* #dma-cells = <2>;
* };
*
* dma2: dma@... {
* compatible = "vnd,dma";
* #dma-cells = <2>;
* };
*
* n: node {
* dmas = <&dma1 1 0x400>,
* <&dma2 6 0x404>;
* };
*
* Bindings fragment for the vnd,dma compatible:
*
* dma-cells:
* - channel
* - config
*
* Example usage:
*
* DT_DMAS_CELL_BY_IDX(DT_NODELABEL(n), 0, channel) // 1
* DT_DMAS_CELL_BY_IDX(DT_NODELABEL(n), 1, channel) // 6
* DT_DMAS_CELL_BY_IDX(DT_NODELABEL(n), 0, config) // 0x400
* DT_DMAS_CELL_BY_IDX(DT_NODELABEL(n), 1, config) // 0x404
*
* @param node_id node identifier for a node with a dmas property
* @param idx logical index into dmas property
* @param cell lowercase-and-underscores cell name
* @return the cell value at index "idx"
* @see DT_PHA_BY_IDX()
*/
#define DT_DMAS_CELL_BY_IDX(node_id, idx, cell) \
DT_PHA_BY_IDX(node_id, dmas, idx, cell)
/**
* @brief Get a DT_DRV_COMPAT instance's DMA specifier's cell value at an index
* @param inst DT_DRV_COMPAT instance number
* @param idx logical index into dmas property
* @param cell lowercase-and-underscores cell name
* @return the cell value at index "idx"
* @see DT_DMAS_CELL_BY_IDX()
*/
#define DT_INST_DMAS_CELL_BY_IDX(inst, idx, cell) \
DT_PHA_BY_IDX(DT_DRV_INST(inst), dmas, idx, cell)
/**
* @brief Get a DMA specifier's cell value by name
*
* Example devicetree fragment:
*
* dma1: dma@... {
* compatible = "vnd,dma";
* #dma-cells = <2>;
* };
*
* dma2: dma@... {
* compatible = "vnd,dma";
* #dma-cells = <2>;
* };
*
* n: node {
* dmas = <&dma1 1 0x400>,
* <&dma2 6 0x404>;
* dma-names = "tx", "rx";
* };
*
* Bindings fragment for the vnd,dma compatible:
*
* dma-cells:
* - channel
* - config
*
* Example usage:
*
* DT_DMAS_CELL_BY_NAME(DT_NODELABEL(n), tx, channel) // 1
* DT_DMAS_CELL_BY_NAME(DT_NODELABEL(n), rx, channel) // 6
* DT_DMAS_CELL_BY_NAME(DT_NODELABEL(n), tx, config) // 0x400
* DT_DMAS_CELL_BY_NAME(DT_NODELABEL(n), rx, config) // 0x404
*
* @param node_id node identifier for a node with a dmas property
* @param name lowercase-and-underscores name of a dmas element
* as defined by the node's dma-names property
* @param cell lowercase-and-underscores cell name
* @return the cell value in the specifier at the named element
* @see DT_PHA_BY_NAME()
*/
#define DT_DMAS_CELL_BY_NAME(node_id, name, cell) \
DT_PHA_BY_NAME(node_id, dmas, name, cell)
/**
* @brief Get a DT_DRV_COMPAT instance's DMA specifier's cell value by name
* @param inst DT_DRV_COMPAT instance number
* @param name lowercase-and-underscores name of a dmas element
* as defined by the node's dma-names property
* @param cell lowercase-and-underscores cell name
* @return the cell value in the specifier at the named element
* @see DT_DMAS_CELL_BY_NAME()
*/
#define DT_INST_DMAS_CELL_BY_NAME(inst, name, cell) \
DT_DMAS_CELL_BY_NAME(DT_DRV_INST(inst), name, cell)
/**
* @brief Is index "idx" valid for a dmas property?
* @param node_id node identifier for a node with a dmas property
* @param idx logical index into dmas property
* @return 1 if the "dmas" property has index "idx", 0 otherwise
*/
#define DT_DMAS_HAS_IDX(node_id, idx) \
IS_ENABLED(DT_CAT4(node_id, _P_dmas_IDX_, idx, _EXISTS))
/**
* @brief Is index "idx" valid for a DT_DRV_COMPAT instance's dmas property?
* @param inst DT_DRV_COMPAT instance number
* @param idx logical index into dmas property
* @return 1 if the "dmas" property has a specifier at index "idx", 0 otherwise
*/
#define DT_INST_DMAS_HAS_IDX(inst, idx) \
DT_DMAS_HAS_IDX(DT_DRV_INST(inst), idx)
/**
* @brief Does a dmas property have a named element?
* @param node_id node identifier for a node with a dmas property
* @param name lowercase-and-underscores name of a dmas element
* as defined by the node's dma-names property
* @return 1 if the dmas property has the named element, 0 otherwise
*/
#define DT_DMAS_HAS_NAME(node_id, name) \
DT_PROP_HAS_NAME(node_id, dmas, name)
/**
* @brief Does a DT_DRV_COMPAT instance's dmas property have a named element?
* @param inst DT_DRV_COMPAT instance number
* @param name lowercase-and-underscores name of a dmas element
* as defined by the node's dma-names property
* @return 1 if the dmas property has the named element, 0 otherwise
*/
#define DT_INST_DMAS_HAS_NAME(inst, name) \
DT_DMAS_HAS_NAME(DT_DRV_INST(inst), name)
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* ZEPHYR_INCLUDE_DEVICETREE_DMAS_H_ */
``` | /content/code_sandbox/include/zephyr/devicetree/dma.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,430 |
```objective-c
/**
* @file
* @brief PWMs Devicetree macro public API header file.
*/
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DEVICETREE_PWMS_H_
#define ZEPHYR_INCLUDE_DEVICETREE_PWMS_H_
#ifdef __cplusplus
extern "C" {
#endif
/**
* @defgroup devicetree-pwms Devicetree PWMs API
* @ingroup devicetree
* @{
*/
/**
* @brief Get the node identifier for the PWM controller from a
* pwms property at an index
*
* Example devicetree fragment:
*
* pwm1: pwm-controller@... { ... };
*
* pwm2: pwm-controller@... { ... };
*
* n: node {
* pwms = <&pwm1 1 PWM_POLARITY_NORMAL>,
* <&pwm2 3 PWM_POLARITY_INVERTED>;
* };
*
* Example usage:
*
* DT_PWMS_CTLR_BY_IDX(DT_NODELABEL(n), 0) // DT_NODELABEL(pwm1)
* DT_PWMS_CTLR_BY_IDX(DT_NODELABEL(n), 1) // DT_NODELABEL(pwm2)
*
* @param node_id node identifier for a node with a pwms property
* @param idx logical index into pwms property
* @return the node identifier for the PWM controller referenced at
* index "idx"
* @see DT_PROP_BY_PHANDLE_IDX()
*/
#define DT_PWMS_CTLR_BY_IDX(node_id, idx) \
DT_PHANDLE_BY_IDX(node_id, pwms, idx)
/**
* @brief Get the node identifier for the PWM controller from a
* pwms property by name
*
* Example devicetree fragment:
*
* pwm1: pwm-controller@... { ... };
*
* pwm2: pwm-controller@... { ... };
*
* n: node {
* pwms = <&pwm1 1 PWM_POLARITY_NORMAL>,
* <&pwm2 3 PWM_POLARITY_INVERTED>;
* pwm-names = "alpha", "beta";
* };
*
* Example usage:
*
* DT_PWMS_CTLR_BY_NAME(DT_NODELABEL(n), alpha) // DT_NODELABEL(pwm1)
* DT_PWMS_CTLR_BY_NAME(DT_NODELABEL(n), beta) // DT_NODELABEL(pwm2)
*
* @param node_id node identifier for a node with a pwms property
* @param name lowercase-and-underscores name of a pwms element
* as defined by the node's pwm-names property
* @return the node identifier for the PWM controller in the named element
* @see DT_PHANDLE_BY_NAME()
*/
#define DT_PWMS_CTLR_BY_NAME(node_id, name) \
DT_PHANDLE_BY_NAME(node_id, pwms, name)
/**
* @brief Equivalent to DT_PWMS_CTLR_BY_IDX(node_id, 0)
* @param node_id node identifier for a node with a pwms property
* @return the node identifier for the PWM controller at index 0
* in the node's "pwms" property
* @see DT_PWMS_CTLR_BY_IDX()
*/
#define DT_PWMS_CTLR(node_id) DT_PWMS_CTLR_BY_IDX(node_id, 0)
/**
* @brief Get PWM specifier's cell value at an index
*
* Example devicetree fragment:
*
* pwm1: pwm-controller@... {
* compatible = "vnd,pwm";
* #pwm-cells = <2>;
* };
*
* pwm2: pwm-controller@... {
* compatible = "vnd,pwm";
* #pwm-cells = <2>;
* };
*
* n: node {
* pwms = <&pwm1 1 200000 PWM_POLARITY_NORMAL>,
* <&pwm2 3 100000 PWM_POLARITY_INVERTED>;
* };
*
* Bindings fragment for the "vnd,pwm" compatible:
*
* pwm-cells:
* - channel
* - period
* - flags
*
* Example usage:
*
* DT_PWMS_CELL_BY_IDX(DT_NODELABEL(n), 0, channel) // 1
* DT_PWMS_CELL_BY_IDX(DT_NODELABEL(n), 1, channel) // 3
* DT_PWMS_CELL_BY_IDX(DT_NODELABEL(n), 0, period) // 200000
* DT_PWMS_CELL_BY_IDX(DT_NODELABEL(n), 1, period) // 100000
* DT_PWMS_CELL_BY_IDX(DT_NODELABEL(n), 0, flags) // PWM_POLARITY_NORMAL
* DT_PWMS_CELL_BY_IDX(DT_NODELABEL(n), 1, flags) // PWM_POLARITY_INVERTED
*
* @param node_id node identifier for a node with a pwms property
* @param idx logical index into pwms property
* @param cell lowercase-and-underscores cell name
* @return the cell value at index "idx"
* @see DT_PHA_BY_IDX()
*/
#define DT_PWMS_CELL_BY_IDX(node_id, idx, cell) \
DT_PHA_BY_IDX(node_id, pwms, idx, cell)
/**
* @brief Get a PWM specifier's cell value by name
*
* Example devicetree fragment:
*
* pwm1: pwm-controller@... {
* compatible = "vnd,pwm";
* #pwm-cells = <2>;
* };
*
* pwm2: pwm-controller@... {
* compatible = "vnd,pwm";
* #pwm-cells = <2>;
* };
*
* n: node {
* pwms = <&pwm1 1 200000 PWM_POLARITY_NORMAL>,
* <&pwm2 3 100000 PWM_POLARITY_INVERTED>;
* pwm-names = "alpha", "beta";
* };
*
* Bindings fragment for the "vnd,pwm" compatible:
*
* pwm-cells:
* - channel
* - period
* - flags
*
* Example usage:
*
* DT_PWMS_CELL_BY_NAME(DT_NODELABEL(n), alpha, channel) // 1
* DT_PWMS_CELL_BY_NAME(DT_NODELABEL(n), beta, channel) // 3
* DT_PWMS_CELL_BY_NAME(DT_NODELABEL(n), alpha, period) // 200000
* DT_PWMS_CELL_BY_NAME(DT_NODELABEL(n), beta, period) // 100000
* DT_PWMS_CELL_BY_NAME(DT_NODELABEL(n), alpha, flags) // PWM_POLARITY_NORMAL
* DT_PWMS_CELL_BY_NAME(DT_NODELABEL(n), beta, flags) // PWM_POLARITY_INVERTED
*
* @param node_id node identifier for a node with a pwms property
* @param name lowercase-and-underscores name of a pwms element
* as defined by the node's pwm-names property
* @param cell lowercase-and-underscores cell name
* @return the cell value in the specifier at the named element
* @see DT_PHA_BY_NAME()
*/
#define DT_PWMS_CELL_BY_NAME(node_id, name, cell) \
DT_PHA_BY_NAME(node_id, pwms, name, cell)
/**
* @brief Equivalent to DT_PWMS_CELL_BY_IDX(node_id, 0, cell)
* @param node_id node identifier for a node with a pwms property
* @param cell lowercase-and-underscores cell name
* @return the cell value at index 0
* @see DT_PWMS_CELL_BY_IDX()
*/
#define DT_PWMS_CELL(node_id, cell) DT_PWMS_CELL_BY_IDX(node_id, 0, cell)
/**
* @brief Get a PWM specifier's channel cell value at an index
*
* This macro only works for PWM specifiers with cells named "channel".
* Refer to the node's binding to check if necessary.
*
* This is equivalent to DT_PWMS_CELL_BY_IDX(node_id, idx, channel).
*
* @param node_id node identifier for a node with a pwms property
* @param idx logical index into pwms property
* @return the channel cell value at index "idx"
* @see DT_PWMS_CELL_BY_IDX()
*/
#define DT_PWMS_CHANNEL_BY_IDX(node_id, idx) \
DT_PWMS_CELL_BY_IDX(node_id, idx, channel)
/**
* @brief Get a PWM specifier's channel cell value by name
*
* This macro only works for PWM specifiers with cells named "channel".
* Refer to the node's binding to check if necessary.
*
* This is equivalent to DT_PWMS_CELL_BY_NAME(node_id, name, channel).
*
* @param node_id node identifier for a node with a pwms property
* @param name lowercase-and-underscores name of a pwms element
* as defined by the node's pwm-names property
* @return the channel cell value in the specifier at the named element
* @see DT_PWMS_CELL_BY_NAME()
*/
#define DT_PWMS_CHANNEL_BY_NAME(node_id, name) \
DT_PWMS_CELL_BY_NAME(node_id, name, channel)
/**
* @brief Equivalent to DT_PWMS_CHANNEL_BY_IDX(node_id, 0)
* @param node_id node identifier for a node with a pwms property
* @return the channel cell value at index 0
* @see DT_PWMS_CHANNEL_BY_IDX()
*/
#define DT_PWMS_CHANNEL(node_id) DT_PWMS_CHANNEL_BY_IDX(node_id, 0)
/**
* @brief Get PWM specifier's period cell value at an index
*
* This macro only works for PWM specifiers with cells named "period".
* Refer to the node's binding to check if necessary.
*
* This is equivalent to DT_PWMS_CELL_BY_IDX(node_id, idx, period).
*
* @param node_id node identifier for a node with a pwms property
* @param idx logical index into pwms property
* @return the period cell value at index "idx"
* @see DT_PWMS_CELL_BY_IDX()
*/
#define DT_PWMS_PERIOD_BY_IDX(node_id, idx) \
DT_PWMS_CELL_BY_IDX(node_id, idx, period)
/**
* @brief Get a PWM specifier's period cell value by name
*
* This macro only works for PWM specifiers with cells named "period".
* Refer to the node's binding to check if necessary.
*
* This is equivalent to DT_PWMS_CELL_BY_NAME(node_id, name, period).
*
* @param node_id node identifier for a node with a pwms property
* @param name lowercase-and-underscores name of a pwms element
* as defined by the node's pwm-names property
* @return the period cell value in the specifier at the named element
* @see DT_PWMS_CELL_BY_NAME()
*/
#define DT_PWMS_PERIOD_BY_NAME(node_id, name) \
DT_PWMS_CELL_BY_NAME(node_id, name, period)
/**
* @brief Equivalent to DT_PWMS_PERIOD_BY_IDX(node_id, 0)
* @param node_id node identifier for a node with a pwms property
* @return the period cell value at index 0
* @see DT_PWMS_PERIOD_BY_IDX()
*/
#define DT_PWMS_PERIOD(node_id) DT_PWMS_PERIOD_BY_IDX(node_id, 0)
/**
* @brief Get a PWM specifier's flags cell value at an index
*
* This macro expects PWM specifiers with cells named "flags".
* If there is no "flags" cell in the PWM specifier, zero is returned.
* Refer to the node's binding to check specifier cell names if necessary.
*
* This is equivalent to DT_PWMS_CELL_BY_IDX(node_id, idx, flags).
*
* @param node_id node identifier for a node with a pwms property
* @param idx logical index into pwms property
* @return the flags cell value at index "idx", or zero if there is none
* @see DT_PWMS_CELL_BY_IDX()
*/
#define DT_PWMS_FLAGS_BY_IDX(node_id, idx) \
DT_PHA_BY_IDX_OR(node_id, pwms, idx, flags, 0)
/**
* @brief Get a PWM specifier's flags cell value by name
*
* This macro expects PWM specifiers with cells named "flags".
* If there is no "flags" cell in the PWM specifier, zero is returned.
* Refer to the node's binding to check specifier cell names if necessary.
*
* This is equivalent to DT_PWMS_CELL_BY_NAME(node_id, name, flags) if
* there is a flags cell, but expands to zero if there is none.
*
* @param node_id node identifier for a node with a pwms property
* @param name lowercase-and-underscores name of a pwms element
* as defined by the node's pwm-names property
* @return the flags cell value in the specifier at the named element,
* or zero if there is none
* @see DT_PWMS_CELL_BY_NAME()
*/
#define DT_PWMS_FLAGS_BY_NAME(node_id, name) \
DT_PHA_BY_NAME_OR(node_id, pwms, name, flags, 0)
/**
* @brief Equivalent to DT_PWMS_FLAGS_BY_IDX(node_id, 0)
* @param node_id node identifier for a node with a pwms property
* @return the flags cell value at index 0, or zero if there is none
* @see DT_PWMS_FLAGS_BY_IDX()
*/
#define DT_PWMS_FLAGS(node_id) DT_PWMS_FLAGS_BY_IDX(node_id, 0)
/**
* @brief Get the node identifier for the PWM controller from a
* DT_DRV_COMPAT instance's pwms property at an index
*
* @param inst DT_DRV_COMPAT instance number
* @param idx logical index into pwms property
* @return the node identifier for the PWM controller referenced at
* index "idx"
* @see DT_PWMS_CTLR_BY_IDX()
*/
#define DT_INST_PWMS_CTLR_BY_IDX(inst, idx) \
DT_PWMS_CTLR_BY_IDX(DT_DRV_INST(inst), idx)
/**
* @brief Get the node identifier for the PWM controller from a
* DT_DRV_COMPAT instance's pwms property by name
* @param inst DT_DRV_COMPAT instance number
* @param name lowercase-and-underscores name of a pwms element
* as defined by the node's pwm-names property
* @return the node identifier for the PWM controller in the named element
* @see DT_PWMS_CTLR_BY_NAME()
*/
#define DT_INST_PWMS_CTLR_BY_NAME(inst, name) \
DT_PWMS_CTLR_BY_NAME(DT_DRV_INST(inst), name)
/**
* @brief Equivalent to DT_INST_PWMS_CTLR_BY_IDX(inst, 0)
* @param inst DT_DRV_COMPAT instance number
* @return the node identifier for the PWM controller at index 0
* in the instance's "pwms" property
* @see DT_PWMS_CTLR_BY_IDX()
*/
#define DT_INST_PWMS_CTLR(inst) DT_INST_PWMS_CTLR_BY_IDX(inst, 0)
/**
* @brief Get a DT_DRV_COMPAT instance's PWM specifier's cell value
* at an index
* @param inst DT_DRV_COMPAT instance number
* @param idx logical index into pwms property
* @param cell lowercase-and-underscores cell name
* @return the cell value at index "idx"
*/
#define DT_INST_PWMS_CELL_BY_IDX(inst, idx, cell) \
DT_PWMS_CELL_BY_IDX(DT_DRV_INST(inst), idx, cell)
/**
* @brief Get a DT_DRV_COMPAT instance's PWM specifier's cell value by name
* @param inst DT_DRV_COMPAT instance number
* @param name lowercase-and-underscores name of a pwms element
* as defined by the node's pwm-names property
* @param cell lowercase-and-underscores cell name
* @return the cell value in the specifier at the named element
* @see DT_PWMS_CELL_BY_NAME()
*/
#define DT_INST_PWMS_CELL_BY_NAME(inst, name, cell) \
DT_PWMS_CELL_BY_NAME(DT_DRV_INST(inst), name, cell)
/**
* @brief Equivalent to DT_INST_PWMS_CELL_BY_IDX(inst, 0, cell)
* @param inst DT_DRV_COMPAT instance number
* @param cell lowercase-and-underscores cell name
* @return the cell value at index 0
*/
#define DT_INST_PWMS_CELL(inst, cell) \
DT_INST_PWMS_CELL_BY_IDX(inst, 0, cell)
/**
* @brief Equivalent to DT_INST_PWMS_CELL_BY_IDX(inst, idx, channel)
* @param inst DT_DRV_COMPAT instance number
* @param idx logical index into pwms property
* @return the channel cell value at index "idx"
* @see DT_INST_PWMS_CELL_BY_IDX()
*/
#define DT_INST_PWMS_CHANNEL_BY_IDX(inst, idx) \
DT_INST_PWMS_CELL_BY_IDX(inst, idx, channel)
/**
* @brief Equivalent to DT_INST_PWMS_CELL_BY_NAME(inst, name, channel)
* @param inst DT_DRV_COMPAT instance number
* @param name lowercase-and-underscores name of a pwms element
* as defined by the node's pwm-names property
* @return the channel cell value in the specifier at the named element
* @see DT_INST_PWMS_CELL_BY_NAME()
*/
#define DT_INST_PWMS_CHANNEL_BY_NAME(inst, name) \
DT_INST_PWMS_CELL_BY_NAME(inst, name, channel)
/**
* @brief Equivalent to DT_INST_PWMS_CHANNEL_BY_IDX(inst, 0)
* @param inst DT_DRV_COMPAT instance number
* @return the channel cell value at index 0
* @see DT_INST_PWMS_CHANNEL_BY_IDX()
*/
#define DT_INST_PWMS_CHANNEL(inst) DT_INST_PWMS_CHANNEL_BY_IDX(inst, 0)
/**
* @brief Equivalent to DT_INST_PWMS_CELL_BY_IDX(inst, idx, period)
* @param inst DT_DRV_COMPAT instance number
* @param idx logical index into pwms property
* @return the period cell value at index "idx"
* @see DT_INST_PWMS_CELL_BY_IDX()
*/
#define DT_INST_PWMS_PERIOD_BY_IDX(inst, idx) \
DT_INST_PWMS_CELL_BY_IDX(inst, idx, period)
/**
* @brief Equivalent to DT_INST_PWMS_CELL_BY_NAME(inst, name, period)
* @param inst DT_DRV_COMPAT instance number
* @param name lowercase-and-underscores name of a pwms element
* as defined by the node's pwm-names property
* @return the period cell value in the specifier at the named element
* @see DT_INST_PWMS_CELL_BY_NAME()
*/
#define DT_INST_PWMS_PERIOD_BY_NAME(inst, name) \
DT_INST_PWMS_CELL_BY_NAME(inst, name, period)
/**
* @brief Equivalent to DT_INST_PWMS_PERIOD_BY_IDX(inst, 0)
* @param inst DT_DRV_COMPAT instance number
* @return the period cell value at index 0
* @see DT_INST_PWMS_PERIOD_BY_IDX()
*/
#define DT_INST_PWMS_PERIOD(inst) DT_INST_PWMS_PERIOD_BY_IDX(inst, 0)
/**
* @brief Equivalent to DT_INST_PWMS_CELL_BY_IDX(inst, idx, flags)
* @param inst DT_DRV_COMPAT instance number
* @param idx logical index into pwms property
* @return the flags cell value at index "idx", or zero if there is none
* @see DT_INST_PWMS_CELL_BY_IDX()
*/
#define DT_INST_PWMS_FLAGS_BY_IDX(inst, idx) \
DT_INST_PWMS_CELL_BY_IDX(inst, idx, flags)
/**
* @brief Equivalent to DT_INST_PWMS_CELL_BY_NAME(inst, name, flags)
* @param inst DT_DRV_COMPAT instance number
* @param name lowercase-and-underscores name of a pwms element
* as defined by the node's pwm-names property
* @return the flags cell value in the specifier at the named element,
* or zero if there is none
* @see DT_INST_PWMS_CELL_BY_NAME()
*/
#define DT_INST_PWMS_FLAGS_BY_NAME(inst, name) \
DT_INST_PWMS_CELL_BY_NAME(inst, name, flags)
/**
* @brief Equivalent to DT_INST_PWMS_FLAGS_BY_IDX(inst, 0)
* @param inst DT_DRV_COMPAT instance number
* @return the flags cell value at index 0, or zero if there is none
* @see DT_INST_PWMS_FLAGS_BY_IDX()
*/
#define DT_INST_PWMS_FLAGS(inst) DT_INST_PWMS_FLAGS_BY_IDX(inst, 0)
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* ZEPHYR_INCLUDE_DEVICETREE_PWMS_H_ */
``` | /content/code_sandbox/include/zephyr/devicetree/pwms.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 4,418 |
```objective-c
/**
* @file
* @brief Clocks Devicetree macro public API header file.
*/
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DEVICETREE_CLOCKS_H_
#define ZEPHYR_INCLUDE_DEVICETREE_CLOCKS_H_
#ifdef __cplusplus
extern "C" {
#endif
/**
* @defgroup devicetree-clocks Devicetree Clocks API
* @ingroup devicetree
* @{
*/
/**
* @brief Test if a node has a clocks phandle-array property at a given index
*
* This expands to 1 if the given index is valid clocks property phandle-array index.
* Otherwise, it expands to 0.
*
* Example devicetree fragment:
*
* n1: node-1 {
* clocks = <...>, <...>;
* };
*
* n2: node-2 {
* clocks = <...>;
* };
*
* Example usage:
*
* DT_CLOCKS_HAS_IDX(DT_NODELABEL(n1), 0) // 1
* DT_CLOCKS_HAS_IDX(DT_NODELABEL(n1), 1) // 1
* DT_CLOCKS_HAS_IDX(DT_NODELABEL(n1), 2) // 0
* DT_CLOCKS_HAS_IDX(DT_NODELABEL(n2), 1) // 0
*
* @param node_id node identifier; may or may not have any clocks property
* @param idx index of a clocks property phandle-array whose existence to check
* @return 1 if the index exists, 0 otherwise
*/
#define DT_CLOCKS_HAS_IDX(node_id, idx) \
DT_PROP_HAS_IDX(node_id, clocks, idx)
/**
* @brief Test if a node has a clock-names array property holds a given name
*
* This expands to 1 if the name is available as clocks-name array property cell.
* Otherwise, it expands to 0.
*
* Example devicetree fragment:
*
* n1: node-1 {
* clocks = <...>, <...>;
* clock-names = "alpha", "beta";
* };
*
* n2: node-2 {
* clocks = <...>;
* clock-names = "alpha";
* };
*
* Example usage:
*
* DT_CLOCKS_HAS_NAME(DT_NODELABEL(n1), alpha) // 1
* DT_CLOCKS_HAS_NAME(DT_NODELABEL(n1), beta) // 1
* DT_CLOCKS_HAS_NAME(DT_NODELABEL(n2), beta) // 0
*
* @param node_id node identifier; may or may not have any clock-names property.
* @param name lowercase-and-underscores clock-names cell value name to check
* @return 1 if the clock name exists, 0 otherwise
*/
#define DT_CLOCKS_HAS_NAME(node_id, name) \
DT_PROP_HAS_NAME(node_id, clocks, name)
/**
* @brief Get the number of elements in a clocks property
*
* Example devicetree fragment:
*
* n1: node-1 {
* clocks = <&foo>, <&bar>;
* };
*
* n2: node-2 {
* clocks = <&foo>;
* };
*
* Example usage:
*
* DT_NUM_CLOCKS(DT_NODELABEL(n1)) // 2
* DT_NUM_CLOCKS(DT_NODELABEL(n2)) // 1
*
* @param node_id node identifier with a clocks property
* @return number of elements in the property
*/
#define DT_NUM_CLOCKS(node_id) \
DT_PROP_LEN(node_id, clocks)
/**
* @brief Get the node identifier for the controller phandle from a
* "clocks" phandle-array property at an index
*
* Example devicetree fragment:
*
* clk1: clock-controller@... { ... };
*
* clk2: clock-controller@... { ... };
*
* n: node {
* clocks = <&clk1 10 20>, <&clk2 30 40>;
* };
*
* Example usage:
*
* DT_CLOCKS_CTLR_BY_IDX(DT_NODELABEL(n), 0)) // DT_NODELABEL(clk1)
* DT_CLOCKS_CTLR_BY_IDX(DT_NODELABEL(n), 1)) // DT_NODELABEL(clk2)
*
* @param node_id node identifier
* @param idx logical index into "clocks"
* @return the node identifier for the clock controller referenced at
* index "idx"
* @see DT_PHANDLE_BY_IDX()
*/
#define DT_CLOCKS_CTLR_BY_IDX(node_id, idx) \
DT_PHANDLE_BY_IDX(node_id, clocks, idx)
/**
* @brief Equivalent to DT_CLOCKS_CTLR_BY_IDX(node_id, 0)
* @param node_id node identifier
* @return a node identifier for the clocks controller at index 0
* in "clocks"
* @see DT_CLOCKS_CTLR_BY_IDX()
*/
#define DT_CLOCKS_CTLR(node_id) DT_CLOCKS_CTLR_BY_IDX(node_id, 0)
/**
* @brief Get the node identifier for the controller phandle from a
* clocks phandle-array property by name
*
* Example devicetree fragment:
*
* clk1: clock-controller@... { ... };
*
* clk2: clock-controller@... { ... };
*
* n: node {
* clocks = <&clk1 10 20>, <&clk2 30 40>;
* clock-names = "alpha", "beta";
* };
*
* Example usage:
*
* DT_CLOCKS_CTLR_BY_NAME(DT_NODELABEL(n), beta) // DT_NODELABEL(clk2)
*
* @param node_id node identifier
* @param name lowercase-and-underscores name of a clocks element
* as defined by the node's clock-names property
* @return the node identifier for the clock controller referenced by name
* @see DT_PHANDLE_BY_NAME()
*/
#define DT_CLOCKS_CTLR_BY_NAME(node_id, name) \
DT_PHANDLE_BY_NAME(node_id, clocks, name)
/**
* @brief Get a clock specifier's cell value at an index
*
* Example devicetree fragment:
*
* clk1: clock-controller@... {
* compatible = "vnd,clock";
* #clock-cells = < 2 >;
* };
*
* n: node {
* clocks = < &clk1 10 20 >, < &clk1 30 40 >;
* };
*
* Bindings fragment for the vnd,clock compatible:
*
* clock-cells:
* - bus
* - bits
*
* Example usage:
*
* DT_CLOCKS_CELL_BY_IDX(DT_NODELABEL(n), 0, bus) // 10
* DT_CLOCKS_CELL_BY_IDX(DT_NODELABEL(n), 1, bits) // 40
*
* @param node_id node identifier for a node with a clocks property
* @param idx logical index into clocks property
* @param cell lowercase-and-underscores cell name
* @return the cell value at index "idx"
* @see DT_PHA_BY_IDX()
*/
#define DT_CLOCKS_CELL_BY_IDX(node_id, idx, cell) \
DT_PHA_BY_IDX(node_id, clocks, idx, cell)
/**
* @brief Get a clock specifier's cell value by name
*
* Example devicetree fragment:
*
* clk1: clock-controller@... {
* compatible = "vnd,clock";
* #clock-cells = < 2 >;
* };
*
* n: node {
* clocks = < &clk1 10 20 >, < &clk1 30 40 >;
* clock-names = "alpha", "beta";
* };
*
* Bindings fragment for the vnd,clock compatible:
*
* clock-cells:
* - bus
* - bits
*
* Example usage:
*
* DT_CLOCKS_CELL_BY_NAME(DT_NODELABEL(n), alpha, bus) // 10
* DT_CLOCKS_CELL_BY_NAME(DT_NODELABEL(n), beta, bits) // 40
*
* @param node_id node identifier for a node with a clocks property
* @param name lowercase-and-underscores name of a clocks element
* as defined by the node's clock-names property
* @param cell lowercase-and-underscores cell name
* @return the cell value in the specifier at the named element
* @see DT_PHA_BY_NAME()
*/
#define DT_CLOCKS_CELL_BY_NAME(node_id, name, cell) \
DT_PHA_BY_NAME(node_id, clocks, name, cell)
/**
* @brief Equivalent to DT_CLOCKS_CELL_BY_IDX(node_id, 0, cell)
* @param node_id node identifier for a node with a clocks property
* @param cell lowercase-and-underscores cell name
* @return the cell value at index 0
* @see DT_CLOCKS_CELL_BY_IDX()
*/
#define DT_CLOCKS_CELL(node_id, cell) DT_CLOCKS_CELL_BY_IDX(node_id, 0, cell)
/**
* @brief Equivalent to DT_CLOCKS_HAS_IDX(DT_DRV_INST(inst), idx)
* @param inst DT_DRV_COMPAT instance number; may or may not have any clocks property
* @param idx index of a clocks property phandle-array whose existence to check
* @return 1 if the index exists, 0 otherwise
*/
#define DT_INST_CLOCKS_HAS_IDX(inst, idx) \
DT_CLOCKS_HAS_IDX(DT_DRV_INST(inst), idx)
/**
* @brief Equivalent to DT_CLOCK_HAS_NAME(DT_DRV_INST(inst), name)
* @param inst DT_DRV_COMPAT instance number; may or may not have any clock-names property.
* @param name lowercase-and-underscores clock-names cell value name to check
* @return 1 if the clock name exists, 0 otherwise
*/
#define DT_INST_CLOCKS_HAS_NAME(inst, name) \
DT_CLOCKS_HAS_NAME(DT_DRV_INST(inst), name)
/**
* @brief Equivalent to DT_NUM_CLOCKS(DT_DRV_INST(inst))
* @param inst instance number
* @return number of elements in the clocks property
*/
#define DT_INST_NUM_CLOCKS(inst) \
DT_NUM_CLOCKS(DT_DRV_INST(inst))
/**
* @brief Get the node identifier for the controller phandle from a
* "clocks" phandle-array property at an index
*
* @param inst instance number
* @param idx logical index into "clocks"
* @return the node identifier for the clock controller referenced at
* index "idx"
* @see DT_CLOCKS_CTLR_BY_IDX()
*/
#define DT_INST_CLOCKS_CTLR_BY_IDX(inst, idx) \
DT_CLOCKS_CTLR_BY_IDX(DT_DRV_INST(inst), idx)
/**
* @brief Equivalent to DT_INST_CLOCKS_CTLR_BY_IDX(inst, 0)
* @param inst instance number
* @return a node identifier for the clocks controller at index 0
* in "clocks"
* @see DT_CLOCKS_CTLR()
*/
#define DT_INST_CLOCKS_CTLR(inst) DT_INST_CLOCKS_CTLR_BY_IDX(inst, 0)
/**
* @brief Get the node identifier for the controller phandle from a
* clocks phandle-array property by name
*
* @param inst instance number
* @param name lowercase-and-underscores name of a clocks element
* as defined by the node's clock-names property
* @return the node identifier for the clock controller referenced by
* the named element
* @see DT_CLOCKS_CTLR_BY_NAME()
*/
#define DT_INST_CLOCKS_CTLR_BY_NAME(inst, name) \
DT_CLOCKS_CTLR_BY_NAME(DT_DRV_INST(inst), name)
/**
* @brief Get a DT_DRV_COMPAT instance's clock specifier's cell value
* at an index
* @param inst DT_DRV_COMPAT instance number
* @param idx logical index into clocks property
* @param cell lowercase-and-underscores cell name
* @return the cell value at index "idx"
* @see DT_CLOCKS_CELL_BY_IDX()
*/
#define DT_INST_CLOCKS_CELL_BY_IDX(inst, idx, cell) \
DT_CLOCKS_CELL_BY_IDX(DT_DRV_INST(inst), idx, cell)
/**
* @brief Get a DT_DRV_COMPAT instance's clock specifier's cell value by name
* @param inst DT_DRV_COMPAT instance number
* @param name lowercase-and-underscores name of a clocks element
* as defined by the node's clock-names property
* @param cell lowercase-and-underscores cell name
* @return the cell value in the specifier at the named element
* @see DT_CLOCKS_CELL_BY_NAME()
*/
#define DT_INST_CLOCKS_CELL_BY_NAME(inst, name, cell) \
DT_CLOCKS_CELL_BY_NAME(DT_DRV_INST(inst), name, cell)
/**
* @brief Equivalent to DT_INST_CLOCKS_CELL_BY_IDX(inst, 0, cell)
* @param inst DT_DRV_COMPAT instance number
* @param cell lowercase-and-underscores cell name
* @return the value of the cell inside the specifier at index 0
*/
#define DT_INST_CLOCKS_CELL(inst, cell) \
DT_INST_CLOCKS_CELL_BY_IDX(inst, 0, cell)
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* ZEPHYR_INCLUDE_DEVICETREE_CLOCKS_H_ */
``` | /content/code_sandbox/include/zephyr/devicetree/clocks.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,866 |
```objective-c
/*
*
* Author: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
* Sathish Kuttan <sathish.k.kuttan@intel.com>
*
*/
/**
* @file
* @brief Public API header file for Digital Microphones
*
* This file contains the Digital Microphone APIs
*/
#ifndef ZEPHYR_INCLUDE_AUDIO_DMIC_H_
#define ZEPHYR_INCLUDE_AUDIO_DMIC_H_
/**
* @defgroup audio_interface Audio
* @{
* @}
*/
/**
* @brief Abstraction for digital microphones
*
* @defgroup audio_dmic_interface Digital Microphone Interface
* @since 1.13
* @version 0.1.0
* @ingroup audio_interface
* @{
*/
#include <zephyr/kernel.h>
#include <zephyr/device.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* DMIC driver states
*/
enum dmic_state {
DMIC_STATE_UNINIT, /**< Uninitialized */
DMIC_STATE_INITIALIZED, /**< Initialized */
DMIC_STATE_CONFIGURED, /**< Configured */
DMIC_STATE_ACTIVE, /**< Active */
DMIC_STATE_PAUSED, /**< Paused */
DMIC_STATE_ERROR, /**< Error */
};
/**
* DMIC driver trigger commands
*/
enum dmic_trigger {
DMIC_TRIGGER_STOP, /**< Stop stream */
DMIC_TRIGGER_START, /**< Start stream */
DMIC_TRIGGER_PAUSE, /**< Pause stream */
DMIC_TRIGGER_RELEASE, /**< Release paused stream */
DMIC_TRIGGER_RESET, /**< Reset stream */
};
/**
* PDM Channels LEFT / RIGHT
*/
enum pdm_lr {
PDM_CHAN_LEFT, /**< Left channel */
PDM_CHAN_RIGHT, /**< Right channel */
};
/**
* PDM Input/Output signal configuration
*/
struct pdm_io_cfg {
/**
* @name Parameters common to all PDM controllers
*@{
*/
/** Minimum clock frequency supported by the mic */
uint32_t min_pdm_clk_freq;
/** Maximum clock frequency supported by the mic */
uint32_t max_pdm_clk_freq;
/** Minimum duty cycle in % supported by the mic */
uint8_t min_pdm_clk_dc;
/** Maximum duty cycle in % supported by the mic */
uint8_t max_pdm_clk_dc;
/**
* @}
*/
/**
* @name Parameters unique to each PDM controller
* @{
*/
/** Bit mask to optionally invert PDM clock */
uint8_t pdm_clk_pol;
/** Bit mask to optionally invert mic data */
uint8_t pdm_data_pol;
/** Collection of clock skew values for each PDM port */
uint32_t pdm_clk_skew;
/**
* @}
*/
};
/**
* Configuration of the PCM streams to be output by the PDM hardware
*
* @note if either \ref pcm_rate or \ref pcm_width is set to 0 for a stream,
* the stream would be disabled
*/
struct pcm_stream_cfg {
/** PCM sample rate of stream */
uint32_t pcm_rate;
/** PCM sample width of stream */
uint8_t pcm_width;
/** PCM sample block size per transfer */
uint16_t block_size;
/** SLAB for DMIC driver to allocate buffers for stream */
struct k_mem_slab *mem_slab;
};
/**
* Mapping/ordering of the PDM channels to logical PCM output channel
*
* Since each controller can have 2 audio channels (stereo),
* there can be a total of 8x2=16 channels. The actual number of channels
* shall be described in \ref act_num_chan.
*
* If 2 streams are enabled, the channel order will be the same for
* both streams.
*
* Each channel is described as a 4-bit number, the least significant
* bit indicates LEFT/RIGHT selection of the PDM controller.
*
* The most significant 3 bits indicate the PDM controller number:
* - bits 0-3 are for channel 0, bit 0 indicates LEFT or RIGHT
* - bits 4-7 are for channel 1, bit 4 indicates LEFT or RIGHT
* and so on.
*
* CONSTRAINT: The LEFT and RIGHT channels of EACH PDM controller needs
* to be adjacent to each other.
*/
struct pdm_chan_cfg {
/**
* @name Requested channel map
* @{
*/
uint32_t req_chan_map_lo; /**< Channels 0 to 7 */
uint32_t req_chan_map_hi; /**< Channels 8 to 15 */
/** @} */
/**
* @name Actual channel map that the driver could configure
* @{
*/
uint32_t act_chan_map_lo; /**< Channels 0 to 7 */
uint32_t act_chan_map_hi; /**< Channels 8 to 15 */
/** @} */
/** Requested number of channels */
uint8_t req_num_chan;
/** Actual number of channels that the driver could configure */
uint8_t act_num_chan;
/** Requested number of streams for each channel */
uint8_t req_num_streams;
/** Actual number of streams that the driver could configure */
uint8_t act_num_streams;
};
/**
* Input configuration structure for the DMIC configuration API
*/
struct dmic_cfg {
struct pdm_io_cfg io;
/**
* Array of pcm_stream_cfg for application to provide
* configuration for each stream
*/
struct pcm_stream_cfg *streams;
struct pdm_chan_cfg channel;
};
/**
* Function pointers for the DMIC driver operations
*/
struct _dmic_ops {
int (*configure)(const struct device *dev, struct dmic_cfg *config);
int (*trigger)(const struct device *dev, enum dmic_trigger cmd);
int (*read)(const struct device *dev, uint8_t stream, void **buffer,
size_t *size, int32_t timeout);
};
/**
* Build the channel map to populate struct pdm_chan_cfg
*
* Returns the map of PDM controller and LEFT/RIGHT channel shifted to
* the bit position corresponding to the input logical channel value
*
* @param channel The logical channel number
* @param pdm The PDM hardware controller number
* @param lr LEFT/RIGHT channel within the chosen PDM hardware controller
*
* @return Bit-map containing the PDM and L/R channel information
*/
static inline uint32_t dmic_build_channel_map(uint8_t channel, uint8_t pdm,
enum pdm_lr lr)
{
return ((((pdm & BIT_MASK(3)) << 1) | lr) <<
((channel & BIT_MASK(3)) * 4U));
}
/**
* Helper function to parse the channel map in pdm_chan_cfg
*
* Returns the PDM controller and LEFT/RIGHT channel corresponding to
* the channel map and the logical channel provided as input
*
* @param channel_map_lo Lower order/significant bits of the channel map
* @param channel_map_hi Higher order/significant bits of the channel map
* @param channel The logical channel number
* @param pdm Pointer to the PDM hardware controller number
* @param lr Pointer to the LEFT/RIGHT channel within the PDM controller
*/
static inline void dmic_parse_channel_map(uint32_t channel_map_lo,
uint32_t channel_map_hi, uint8_t channel, uint8_t *pdm, enum pdm_lr *lr)
{
uint32_t channel_map;
channel_map = (channel < 8) ? channel_map_lo : channel_map_hi;
channel_map >>= ((channel & BIT_MASK(3)) * 4U);
*pdm = (channel_map >> 1) & BIT_MASK(3);
*lr = (enum pdm_lr) (channel_map & BIT(0));
}
/**
* Build a bit map of clock skew values for each PDM channel
*
* Returns the bit-map of clock skew value shifted to the bit position
* corresponding to the input PDM controller value
*
* @param pdm The PDM hardware controller number
* @param skew The skew to apply for the clock output from the PDM controller
*
* @return Bit-map containing the clock skew information
*/
static inline uint32_t dmic_build_clk_skew_map(uint8_t pdm, uint8_t skew)
{
return ((skew & BIT_MASK(4)) << ((pdm & BIT_MASK(3)) * 4U));
}
/**
* Configure the DMIC driver and controller(s)
*
* Configures the DMIC driver device according to the number of channels,
* channel mapping, PDM I/O configuration, PCM stream configuration, etc.
*
* @param dev Pointer to the device structure for DMIC driver instance
* @param cfg Pointer to the structure containing the DMIC configuration
*
* @return 0 on success, a negative error code on failure
*/
static inline int dmic_configure(const struct device *dev,
struct dmic_cfg *cfg)
{
const struct _dmic_ops *api =
(const struct _dmic_ops *)dev->api;
return api->configure(dev, cfg);
}
/**
* Send a command to the DMIC driver
*
* Sends a command to the driver to perform a specific action
*
* @param dev Pointer to the device structure for DMIC driver instance
* @param cmd The command to be sent to the driver instance
*
* @return 0 on success, a negative error code on failure
*/
static inline int dmic_trigger(const struct device *dev,
enum dmic_trigger cmd)
{
const struct _dmic_ops *api =
(const struct _dmic_ops *)dev->api;
return api->trigger(dev, cmd);
}
/**
* Read received decimated PCM data stream
*
* Optionally waits for audio to be received and provides the received
* audio buffer from the requested stream
*
* @param dev Pointer to the device structure for DMIC driver instance
* @param stream Stream identifier
* @param buffer Pointer to the received buffer address
* @param size Pointer to the received buffer size
* @param timeout Timeout in milliseconds to wait in case audio is not yet
* received, or @ref SYS_FOREVER_MS
*
* @return 0 on success, a negative error code on failure
*/
static inline int dmic_read(const struct device *dev, uint8_t stream,
void **buffer,
size_t *size, int32_t timeout)
{
const struct _dmic_ops *api =
(const struct _dmic_ops *)dev->api;
return api->read(dev, stream, buffer, size, timeout);
}
#ifdef __cplusplus
}
#endif
/**
* @}
*/
#endif /* ZEPHYR_INCLUDE_AUDIO_DMIC_H_ */
``` | /content/code_sandbox/include/zephyr/audio/dmic.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,271 |
```objective-c
/*
*
*/
/**
* @file
* @brief Public API header file for Audio Codec
*
* This file contains the Audio Codec APIs
*/
#ifndef ZEPHYR_INCLUDE_AUDIO_CODEC_H_
#define ZEPHYR_INCLUDE_AUDIO_CODEC_H_
/**
* @brief Abstraction for audio codecs
*
* @defgroup audio_codec_interface Audio Codec Interface
* @since 1.13
* @version 0.1.0
* @ingroup audio_interface
* @{
*/
#include <zephyr/drivers/i2s.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* PCM audio sample rates
*/
typedef enum {
AUDIO_PCM_RATE_8K = 8000, /**< 8 kHz sample rate */
AUDIO_PCM_RATE_16K = 16000, /**< 16 kHz sample rate */
AUDIO_PCM_RATE_24K = 24000, /**< 24 kHz sample rate */
AUDIO_PCM_RATE_32K = 32000, /**< 32 kHz sample rate */
AUDIO_PCM_RATE_44P1K = 44100, /**< 44.1 kHz sample rate */
AUDIO_PCM_RATE_48K = 48000, /**< 48 kHz sample rate */
AUDIO_PCM_RATE_96K = 96000, /**< 96 kHz sample rate */
AUDIO_PCM_RATE_192K = 192000, /**< 192 kHz sample rate */
} audio_pcm_rate_t;
/**
* PCM audio sample bit widths
*/
typedef enum {
AUDIO_PCM_WIDTH_16_BITS = 16, /**< 16-bit sample width */
AUDIO_PCM_WIDTH_20_BITS = 20, /**< 20-bit sample width */
AUDIO_PCM_WIDTH_24_BITS = 24, /**< 24-bit sample width */
AUDIO_PCM_WIDTH_32_BITS = 32, /**< 32-bit sample width */
} audio_pcm_width_t;
/**
* Digital Audio Interface (DAI) type
*/
typedef enum {
AUDIO_DAI_TYPE_I2S, /**< I2S Interface */
AUDIO_DAI_TYPE_INVALID, /**< Other interfaces can be added here */
} audio_dai_type_t;
/**
* Codec properties that can be set by audio_codec_set_property().
*/
typedef enum {
AUDIO_PROPERTY_OUTPUT_VOLUME, /**< Output volume */
AUDIO_PROPERTY_OUTPUT_MUTE, /**< Output mute/unmute */
} audio_property_t;
/**
* Audio channel identifiers to use in audio_codec_set_property().
*/
typedef enum {
AUDIO_CHANNEL_FRONT_LEFT, /**< Front left channel */
AUDIO_CHANNEL_FRONT_RIGHT, /**< Front right channel */
AUDIO_CHANNEL_LFE, /**< Low frequency effect channel */
AUDIO_CHANNEL_FRONT_CENTER, /**< Front center channel */
AUDIO_CHANNEL_REAR_LEFT, /**< Rear left channel */
AUDIO_CHANNEL_REAR_RIGHT, /**< Rear right channel */
AUDIO_CHANNEL_REAR_CENTER, /**< Rear center channel */
AUDIO_CHANNEL_SIDE_LEFT, /**< Side left channel */
AUDIO_CHANNEL_SIDE_RIGHT, /**< Side right channel */
AUDIO_CHANNEL_ALL, /**< All channels */
} audio_channel_t;
/**
* @brief Digital Audio Interface Configuration.
*
* Configuration is dependent on DAI type
*/
typedef union {
struct i2s_config i2s; /**< I2S configuration */
/* Other DAI types go here */
} audio_dai_cfg_t;
/**
* Codec configuration parameters
*/
struct audio_codec_cfg {
uint32_t mclk_freq; /**< MCLK input frequency in Hz */
audio_dai_type_t dai_type; /**< Digital interface type */
audio_dai_cfg_t dai_cfg; /**< DAI configuration info */
};
/**
* Codec property values
*/
typedef union {
int vol; /**< Volume level in 0.5dB resolution */
bool mute; /**< Mute if @a true, unmute if @a false */
} audio_property_value_t;
/**
* @brief Codec error type
*/
enum audio_codec_error_type {
/** Output over-current */
AUDIO_CODEC_ERROR_OVERCURRENT = BIT(0),
/** Codec over-temperature */
AUDIO_CODEC_ERROR_OVERTEMPERATURE = BIT(1),
/** Power low voltage */
AUDIO_CODEC_ERROR_UNDERVOLTAGE = BIT(2),
/** Power high voltage */
AUDIO_CODEC_ERROR_OVERVOLTAGE = BIT(3),
/** Output direct-current */
AUDIO_CODEC_ERROR_DC = BIT(4),
};
/**
* @typedef audio_codec_error_callback_t
* @brief Callback for error interrupt
*
* @param dev Pointer to the codec device
* @param errors Device errors (bitmask of @ref audio_codec_error_type values)
*/
typedef void (*audio_codec_error_callback_t)(const struct device *dev, uint32_t errors);
/**
* @cond INTERNAL_HIDDEN
*
* For internal use only, skip these in public documentation.
*/
struct audio_codec_api {
int (*configure)(const struct device *dev,
struct audio_codec_cfg *cfg);
void (*start_output)(const struct device *dev);
void (*stop_output)(const struct device *dev);
int (*set_property)(const struct device *dev,
audio_property_t property,
audio_channel_t channel,
audio_property_value_t val);
int (*apply_properties)(const struct device *dev);
int (*clear_errors)(const struct device *dev);
int (*register_error_callback)(const struct device *dev,
audio_codec_error_callback_t cb);
};
/**
* @endcond
*/
/**
* @brief Configure the audio codec
*
* Configure the audio codec device according to the configuration
* parameters provided as input
*
* @param dev Pointer to the device structure for codec driver instance.
* @param cfg Pointer to the structure containing the codec configuration.
*
* @return 0 on success, negative error code on failure
*/
static inline int audio_codec_configure(const struct device *dev,
struct audio_codec_cfg *cfg)
{
const struct audio_codec_api *api =
(const struct audio_codec_api *)dev->api;
return api->configure(dev, cfg);
}
/**
* @brief Set codec to start output audio playback
*
* Setup the audio codec device to start the audio playback
*
* @param dev Pointer to the device structure for codec driver instance.
*/
static inline void audio_codec_start_output(const struct device *dev)
{
const struct audio_codec_api *api =
(const struct audio_codec_api *)dev->api;
api->start_output(dev);
}
/**
* @brief Set codec to stop output audio playback
*
* Setup the audio codec device to stop the audio playback
*
* @param dev Pointer to the device structure for codec driver instance.
*/
static inline void audio_codec_stop_output(const struct device *dev)
{
const struct audio_codec_api *api =
(const struct audio_codec_api *)dev->api;
api->stop_output(dev);
}
/**
* @brief Set a codec property defined by audio_property_t
*
* Set a property such as volume level, clock configuration etc.
*
* @param dev Pointer to the device structure for codec driver instance.
* @param property The codec property to set
* @param channel The audio channel for which the property has to be set
* @param val pointer to a property value of type audio_codec_property_value_t
*
* @return 0 on success, negative error code on failure
*/
static inline int audio_codec_set_property(const struct device *dev,
audio_property_t property,
audio_channel_t channel,
audio_property_value_t val)
{
const struct audio_codec_api *api =
(const struct audio_codec_api *)dev->api;
return api->set_property(dev, property, channel, val);
}
/**
* @brief Atomically apply any cached properties
*
* Following one or more invocations of audio_codec_set_property, that may have
* been cached by the driver, audio_codec_apply_properties can be invoked to
* apply all the properties as atomic as possible
*
* @param dev Pointer to the device structure for codec driver instance.
*
* @return 0 on success, negative error code on failure
*/
static inline int audio_codec_apply_properties(const struct device *dev)
{
const struct audio_codec_api *api =
(const struct audio_codec_api *)dev->api;
return api->apply_properties(dev);
}
/**
* @brief Clear any codec errors
*
* Clear all codec errors.
* If an error interrupt exists, it will be de-asserted.
*
* @param dev Pointer to the device structure for codec driver instance.
*
* @return 0 on success, negative error code on failure
*/
static inline int audio_codec_clear_errors(const struct device *dev)
{
const struct audio_codec_api *api =
(const struct audio_codec_api *)dev->api;
if (api->clear_errors == NULL) {
return -ENOSYS;
}
return api->clear_errors(dev);
}
/**
* @brief Register a callback function for codec error
*
* The callback will be called from a thread, so I2C or SPI operations are
* safe. However, the thread's stack is limited and defined by the
* driver. It is currently up to the caller to ensure that the callback
* does not overflow the stack.
*
* @param dev Pointer to the audio codec device
* @param cb The function that should be called when an error is detected
* fires
*
* @return 0 if successful, negative errno code if failure.
*/
static inline int audio_codec_register_error_callback(const struct device *dev,
audio_codec_error_callback_t cb)
{
const struct audio_codec_api *api =
(const struct audio_codec_api *)dev->api;
if (api->register_error_callback == NULL) {
return -ENOSYS;
}
return api->register_error_callback(dev, cb);
}
#ifdef __cplusplus
}
#endif
/**
* @}
*/
#endif /* ZEPHYR_INCLUDE_AUDIO_CODEC_H_ */
``` | /content/code_sandbox/include/zephyr/audio/codec.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,071 |
```objective-c
/*
*
*
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
*
* your_sha256_hash------
*
* $Date: 30. October 2017
* $Revision: V2.1.2
*
* Project: CMSIS-RTOS2 API
* Title: cmsis_os2.h header file
*
* Version 2.1.2
* Additional functions allowed to be called from Interrupt Service Routines:
* - osKernelGetInfo, osKernelGetState
* Version 2.1.1
* Additional functions allowed to be called from Interrupt Service Routines:
* - osKernelGetTickCount, osKernelGetTickFreq
* Changed Kernel Tick type to uint32_t:
* - updated: osKernelGetTickCount, osDelayUntil
* Version 2.1.0
* Support for critical and uncritical sections (nesting safe):
* - updated: osKernelLock, osKernelUnlock
* - added: osKernelRestoreLock
* Updated Thread and Event Flags:
* - changed flags parameter and return type from int32_t to uint32_t
* Version 2.0.0
* Initial Release
*your_sha256_hash-----------*/
#ifndef CMSIS_OS2_H_
#define CMSIS_OS2_H_
#ifndef __NO_RETURN
#if defined(__CC_ARM)
#define __NO_RETURN __declspec(noreturn)
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
#define __NO_RETURN __attribute__((__noreturn__))
#elif defined(__GNUC__)
#define __NO_RETURN __attribute__((__noreturn__))
#elif defined(__ICCARM__)
#define __NO_RETURN __noreturn
#else
#define __NO_RETURN
#endif
#endif
#include <stdint.h>
#include <stddef.h>
#ifdef __cplusplus
extern "C"
{
#endif
/* ==== Enumerations, structures, defines ==== */
/* / Version information. */
typedef struct {
uint32_t api; /* /< API version (major.minor.rev: mmnnnrrrr dec). */
uint32_t kernel; /* /< Kernel version (major.minor.rev: mmnnnrrrr dec). */
} osVersion_t;
/* / Kernel state. */
typedef enum {
osKernelInactive = 0, /* /< Inactive. */
osKernelReady = 1, /* /< Ready. */
osKernelRunning = 2, /* /< Running. */
osKernelLocked = 3, /* /< Locked. */
osKernelSuspended = 4, /* /< Suspended. */
osKernelError = -1, /* /< Error. */
osKernelReserved = 0x7FFFFFFFU /* /< Prevents enum down-size compiler optimization. */
} osKernelState_t;
/* / Thread state. */
typedef enum {
osThreadInactive = 0, /* /< Inactive. */
osThreadReady = 1, /* /< Ready. */
osThreadRunning = 2, /* /< Running. */
osThreadBlocked = 3, /* /< Blocked. */
osThreadTerminated = 4, /* /< Terminated. */
osThreadError = -1, /* /< Error. */
osThreadReserved = 0x7FFFFFFF /* /< Prevents enum down-size compiler optimization. */
} osThreadState_t;
/* / Priority values. */
typedef enum {
osPriorityNone = 0, /* /< No priority (not initialized). */
osPriorityIdle = 1, /* /< Reserved for Idle thread. */
osPriorityLow = 8, /* /< Priority: low */
osPriorityLow1 = 8+1, /* /< Priority: low + 1 */
osPriorityLow2 = 8+2, /* /< Priority: low + 2 */
osPriorityLow3 = 8+3, /* /< Priority: low + 3 */
osPriorityLow4 = 8+4, /* /< Priority: low + 4 */
osPriorityLow5 = 8+5, /* /< Priority: low + 5 */
osPriorityLow6 = 8+6, /* /< Priority: low + 6 */
osPriorityLow7 = 8+7, /* /< Priority: low + 7 */
osPriorityBelowNormal = 16, /* /< Priority: below normal */
osPriorityBelowNormal1 = 16+1, /* /< Priority: below normal + 1 */
osPriorityBelowNormal2 = 16+2, /* /< Priority: below normal + 2 */
osPriorityBelowNormal3 = 16+3, /* /< Priority: below normal + 3 */
osPriorityBelowNormal4 = 16+4, /* /< Priority: below normal + 4 */
osPriorityBelowNormal5 = 16+5, /* /< Priority: below normal + 5 */
osPriorityBelowNormal6 = 16+6, /* /< Priority: below normal + 6 */
osPriorityBelowNormal7 = 16+7, /* /< Priority: below normal + 7 */
osPriorityNormal = 24, /* /< Priority: normal */
osPriorityNormal1 = 24+1, /* /< Priority: normal + 1 */
osPriorityNormal2 = 24+2, /* /< Priority: normal + 2 */
osPriorityNormal3 = 24+3, /* /< Priority: normal + 3 */
osPriorityNormal4 = 24+4, /* /< Priority: normal + 4 */
osPriorityNormal5 = 24+5, /* /< Priority: normal + 5 */
osPriorityNormal6 = 24+6, /* /< Priority: normal + 6 */
osPriorityNormal7 = 24+7, /* /< Priority: normal + 7 */
osPriorityAboveNormal = 32, /* /< Priority: above normal */
osPriorityAboveNormal1 = 32+1, /* /< Priority: above normal + 1 */
osPriorityAboveNormal2 = 32+2, /* /< Priority: above normal + 2 */
osPriorityAboveNormal3 = 32+3, /* /< Priority: above normal + 3 */
osPriorityAboveNormal4 = 32+4, /* /< Priority: above normal + 4 */
osPriorityAboveNormal5 = 32+5, /* /< Priority: above normal + 5 */
osPriorityAboveNormal6 = 32+6, /* /< Priority: above normal + 6 */
osPriorityAboveNormal7 = 32+7, /* /< Priority: above normal + 7 */
osPriorityHigh = 40, /* /< Priority: high */
osPriorityHigh1 = 40+1, /* /< Priority: high + 1 */
osPriorityHigh2 = 40+2, /* /< Priority: high + 2 */
osPriorityHigh3 = 40+3, /* /< Priority: high + 3 */
osPriorityHigh4 = 40+4, /* /< Priority: high + 4 */
osPriorityHigh5 = 40+5, /* /< Priority: high + 5 */
osPriorityHigh6 = 40+6, /* /< Priority: high + 6 */
osPriorityHigh7 = 40+7, /* /< Priority: high + 7 */
osPriorityRealtime = 48, /* /< Priority: realtime */
osPriorityRealtime1 = 48+1, /* /< Priority: realtime + 1 */
osPriorityRealtime2 = 48+2, /* /< Priority: realtime + 2 */
osPriorityRealtime3 = 48+3, /* /< Priority: realtime + 3 */
osPriorityRealtime4 = 48+4, /* /< Priority: realtime + 4 */
osPriorityRealtime5 = 48+5, /* /< Priority: realtime + 5 */
osPriorityRealtime6 = 48+6, /* /< Priority: realtime + 6 */
osPriorityRealtime7 = 48+7, /* /< Priority: realtime + 7 */
osPriorityISR = 56, /* /< Reserved for ISR deferred thread. */
osPriorityError = -1, /* /< System cannot determine priority or illegal priority. */
osPriorityReserved = 0x7FFFFFFF /* /< Prevents enum down-size compiler optimization. */
} osPriority_t;
/* / Entry point of a thread. */
typedef void (*osThreadFunc_t) (void *argument);
/* / Timer callback function. */
typedef void (*osTimerFunc_t) (void *argument);
/* / Timer type. */
typedef enum {
osTimerOnce = 0, /* /< One-shot timer. */
osTimerPeriodic = 1 /* /< Repeating timer. */
} osTimerType_t;
/* Timeout value. */
#define osWaitForever 0xFFFFFFFFU /* /< Wait forever timeout value. */
/* Flags options (\ref osThreadFlagsWait and \ref osEventFlagsWait). */
#define osFlagsWaitAny 0x00000000U /* /< Wait for any flag (default). */
#define osFlagsWaitAll 0x00000001U /* /< Wait for all flags. */
#define osFlagsNoClear 0x00000002U /* /< Do not clear flags which have been specified to wait for. */
/* Flags errors (returned by osThreadFlagsXxxx and osEventFlagsXxxx). */
#define osFlagsError 0x80000000U /* /< Error indicator. */
#define osFlagsErrorUnknown 0xFFFFFFFFU /* /< osError (-1). */
#define osFlagsErrorTimeout 0xFFFFFFFEU /* /< osErrorTimeout (-2). */
#define osFlagsErrorResource 0xFFFFFFFDU /* /< osErrorResource (-3). */
#define osFlagsErrorParameter 0xFFFFFFFCU /* /< osErrorParameter (-4). */
#define osFlagsErrorISR 0xFFFFFFFAU /* /< osErrorISR (-6). */
/* Thread attributes (attr_bits in \ref osThreadAttr_t). */
#define osThreadDetached 0x00000000U /* /< Thread created in detached mode (default) */
#define osThreadJoinable 0x00000001U /* /< Thread created in joinable mode */
/* Mutex attributes (attr_bits in \ref osMutexAttr_t). */
#define osMutexRecursive 0x00000001U /* /< Recursive mutex. */
#define osMutexPrioInherit 0x00000002U /* /< Priority inherit protocol. */
#define osMutexRobust 0x00000008U /* /< Robust mutex. */
/* / Status code values returned by CMSIS-RTOS functions. */
typedef enum {
osOK = 0, /* /< Operation completed successfully. */
osError = -1, /* /< Unspecified RTOS error: run-time error but no other error message fits. */
osErrorTimeout = -2, /* /< Operation not completed within the timeout period. */
osErrorResource = -3, /* /< Resource not available. */
osErrorParameter = -4, /* /< Parameter error. */
osErrorNoMemory = -5, /* /< System is out of memory: it was impossible to allocate or reserve memory for the operation. */
osErrorISR = -6, /* /< Not allowed in ISR context: the function cannot be called from interrupt service routines. */
osStatusReserved = 0x7FFFFFFF /* /< Prevents enum down-size compiler optimization. */
} osStatus_t;
/* / \details Thread ID identifies the thread. */
typedef void *osThreadId_t;
/* / \details Timer ID identifies the timer. */
typedef void *osTimerId_t;
/* / \details Event Flags ID identifies the event flags. */
typedef void *osEventFlagsId_t;
/* / \details Mutex ID identifies the mutex. */
typedef void *osMutexId_t;
/* / \details Semaphore ID identifies the semaphore. */
typedef void *osSemaphoreId_t;
/* / \details Memory Pool ID identifies the memory pool. */
typedef void *osMemoryPoolId_t;
/* / \details Message Queue ID identifies the message queue. */
typedef void *osMessageQueueId_t;
#ifndef TZ_MODULEID_T
#define TZ_MODULEID_T
/* / \details Data type that identifies secure software modules called by a process. */
typedef uint32_t TZ_ModuleId_t;
#endif
/* / Attributes structure for thread. */
typedef struct {
const char *name; /* /< name of the thread */
uint32_t attr_bits; /* /< attribute bits */
void *cb_mem; /* /< memory for control block */
uint32_t cb_size; /* /< size of provided memory for control block */
void *stack_mem; /* /< memory for stack */
uint32_t stack_size; /* /< size of stack */
osPriority_t priority; /* /< initial thread priority (default: osPriorityNormal) */
TZ_ModuleId_t tz_module; /* /< TrustZone module identifier */
uint32_t reserved; /* /< reserved (must be 0) */
} osThreadAttr_t;
/* / Attributes structure for timer. */
typedef struct {
const char *name; /* /< name of the timer */
uint32_t attr_bits; /* /< attribute bits */
void *cb_mem; /* /< memory for control block */
uint32_t cb_size; /* /< size of provided memory for control block */
} osTimerAttr_t;
/* / Attributes structure for event flags. */
typedef struct {
const char *name; /* /< name of the event flags */
uint32_t attr_bits; /* /< attribute bits */
void *cb_mem; /* /< memory for control block */
uint32_t cb_size; /* /< size of provided memory for control block */
} osEventFlagsAttr_t;
/* / Attributes structure for mutex. */
typedef struct {
const char *name; /* /< name of the mutex */
uint32_t attr_bits; /* /< attribute bits */
void *cb_mem; /* /< memory for control block */
uint32_t cb_size; /* /< size of provided memory for control block */
} osMutexAttr_t;
/* / Attributes structure for semaphore. */
typedef struct {
const char *name; /* /< name of the semaphore */
uint32_t attr_bits; /* /< attribute bits */
void *cb_mem; /* /< memory for control block */
uint32_t cb_size; /* /< size of provided memory for control block */
} osSemaphoreAttr_t;
/* / Attributes structure for memory pool. */
typedef struct {
const char *name; /* /< name of the memory pool */
uint32_t attr_bits; /* /< attribute bits */
void *cb_mem; /* /< memory for control block */
uint32_t cb_size; /* /< size of provided memory for control block */
void *mp_mem; /* /< memory for data storage */
uint32_t mp_size; /* /< size of provided memory for data storage */
} osMemoryPoolAttr_t;
/* / Attributes structure for message queue. */
typedef struct {
const char *name; /* /< name of the message queue */
uint32_t attr_bits; /* /< attribute bits */
void *cb_mem; /* /< memory for control block */
uint32_t cb_size; /* /< size of provided memory for control block */
void *mq_mem; /* /< memory for data storage */
uint32_t mq_size; /* /< size of provided memory for data storage */
} osMessageQueueAttr_t;
/* ==== Kernel Management Functions ==== */
/* / Initialize the RTOS Kernel. */
/* / \return status code that indicates the execution status of the function. */
osStatus_t osKernelInitialize(void);
/* / Get RTOS Kernel Information. */
/* / \param[out] version pointer to buffer for retrieving version information. */
/* / \param[out] id_buf pointer to buffer for retrieving kernel identification string. */
/* / \param[in] id_size size of buffer for kernel identification string. */
/* / \return status code that indicates the execution status of the function. */
osStatus_t osKernelGetInfo(osVersion_t *version, char *id_buf, uint32_t id_size);
/* / Get the current RTOS Kernel state. */
/* / \return current RTOS Kernel state. */
osKernelState_t osKernelGetState(void);
/* / Start the RTOS Kernel scheduler. */
/* / \return status code that indicates the execution status of the function. */
osStatus_t osKernelStart(void);
/* / Lock the RTOS Kernel scheduler. */
/* / \return previous lock state (1 - locked, 0 - not locked, error code if negative). */
int32_t osKernelLock(void);
/* / Unlock the RTOS Kernel scheduler. */
/* / \return previous lock state (1 - locked, 0 - not locked, error code if negative). */
int32_t osKernelUnlock(void);
/* / Restore the RTOS Kernel scheduler lock state. */
/* / \param[in] lock lock state obtained by \ref osKernelLock or \ref osKernelUnlock. */
/* / \return new lock state (1 - locked, 0 - not locked, error code if negative). */
int32_t osKernelRestoreLock(int32_t lock);
/* / Suspend the RTOS Kernel scheduler. */
/* / \return time in ticks, for how long the system can sleep or power-down. */
uint32_t osKernelSuspend(void);
/* / Resume the RTOS Kernel scheduler. */
/* / \param[in] sleep_ticks time in ticks for how long the system was in sleep or power-down mode. */
void osKernelResume(uint32_t sleep_ticks);
/* / Get the RTOS kernel tick count. */
/* / \return RTOS kernel current tick count. */
uint32_t osKernelGetTickCount(void);
/* / Get the RTOS kernel tick frequency. */
/* / \return frequency of the kernel tick in hertz, i.e. kernel ticks per second. */
uint32_t osKernelGetTickFreq(void);
/* / Get the RTOS kernel system timer count. */
/* / \return RTOS kernel current system timer count as 32-bit value. */
uint32_t osKernelGetSysTimerCount(void);
/* / Get the RTOS kernel system timer frequency. */
/* / \return frequency of the system timer in hertz, i.e. timer ticks per second. */
uint32_t osKernelGetSysTimerFreq(void);
/* ==== Thread Management Functions ==== */
/* / Create a thread and add it to Active Threads. */
/* / \param[in] func thread function. */
/* / \param[in] argument pointer that is passed to the thread function as start argument. */
/* / \param[in] attr thread attributes; NULL: default values. */
/* / \return thread ID for reference by other functions or NULL in case of error. */
osThreadId_t osThreadNew(osThreadFunc_t func, void *argument, const osThreadAttr_t *attr);
/* / Get name of a thread. */
/* / \param[in] thread_id thread ID obtained by \ref osThreadNew or \ref osThreadGetId. */
/* / \return name as NULL terminated string. */
const char *osThreadGetName(osThreadId_t thread_id);
/* / Return the thread ID of the current running thread. */
/* / \return thread ID for reference by other functions or NULL in case of error. */
osThreadId_t osThreadGetId(void);
/* / Get current thread state of a thread. */
/* / \param[in] thread_id thread ID obtained by \ref osThreadNew or \ref osThreadGetId. */
/* / \return current thread state of the specified thread. */
osThreadState_t osThreadGetState(osThreadId_t thread_id);
/* / Get stack size of a thread. */
/* / \param[in] thread_id thread ID obtained by \ref osThreadNew or \ref osThreadGetId. */
/* / \return stack size in bytes. */
uint32_t osThreadGetStackSize(osThreadId_t thread_id);
/* / Get available stack space of a thread based on stack watermark recording during execution. */
/* / \param[in] thread_id thread ID obtained by \ref osThreadNew or \ref osThreadGetId. */
/* / \return remaining stack space in bytes. */
uint32_t osThreadGetStackSpace(osThreadId_t thread_id);
/* / Change priority of a thread. */
/* / \param[in] thread_id thread ID obtained by \ref osThreadNew or \ref osThreadGetId. */
/* / \param[in] priority new priority value for the thread function. */
/* / \return status code that indicates the execution status of the function. */
osStatus_t osThreadSetPriority(osThreadId_t thread_id, osPriority_t priority);
/* / Get current priority of a thread. */
/* / \param[in] thread_id thread ID obtained by \ref osThreadNew or \ref osThreadGetId. */
/* / \return current priority value of the specified thread. */
osPriority_t osThreadGetPriority(osThreadId_t thread_id);
/* / Pass control to next thread that is in state \b READY. */
/* / \return status code that indicates the execution status of the function. */
osStatus_t osThreadYield(void);
/* / Suspend execution of a thread. */
/* / \param[in] thread_id thread ID obtained by \ref osThreadNew or \ref osThreadGetId. */
/* / \return status code that indicates the execution status of the function. */
osStatus_t osThreadSuspend(osThreadId_t thread_id);
/* / Resume execution of a thread. */
/* / \param[in] thread_id thread ID obtained by \ref osThreadNew or \ref osThreadGetId. */
/* / \return status code that indicates the execution status of the function. */
osStatus_t osThreadResume(osThreadId_t thread_id);
/* / Detach a thread (thread storage can be reclaimed when thread terminates). */
/* / \param[in] thread_id thread ID obtained by \ref osThreadNew or \ref osThreadGetId. */
/* / \return status code that indicates the execution status of the function. */
osStatus_t osThreadDetach(osThreadId_t thread_id);
/* / Wait for specified thread to terminate. */
/* / \param[in] thread_id thread ID obtained by \ref osThreadNew or \ref osThreadGetId. */
/* / \return status code that indicates the execution status of the function. */
osStatus_t osThreadJoin(osThreadId_t thread_id);
/* / Terminate execution of current running thread. */
__NO_RETURN void osThreadExit(void);
/* / Terminate execution of a thread. */
/* / \param[in] thread_id thread ID obtained by \ref osThreadNew or \ref osThreadGetId. */
/* / \return status code that indicates the execution status of the function. */
osStatus_t osThreadTerminate(osThreadId_t thread_id);
/* / Get number of active threads. */
/* / \return number of active threads. */
uint32_t osThreadGetCount(void);
/* / Enumerate active threads. */
/* / \param[out] thread_array pointer to array for retrieving thread IDs. */
/* / \param[in] array_items maximum number of items in array for retrieving thread IDs. */
/* / \return number of enumerated threads. */
uint32_t osThreadEnumerate(osThreadId_t *thread_array, uint32_t array_items);
/* ==== Thread Flags Functions ==== */
/* / Set the specified Thread Flags of a thread. */
/* / \param[in] thread_id thread ID obtained by \ref osThreadNew or \ref osThreadGetId. */
/* / \param[in] flags specifies the flags of the thread that shall be set. */
/* / \return thread flags after setting or error code if highest bit set. */
uint32_t osThreadFlagsSet(osThreadId_t thread_id, uint32_t flags);
/* / Clear the specified Thread Flags of current running thread. */
/* / \param[in] flags specifies the flags of the thread that shall be cleared. */
/* / \return thread flags before clearing or error code if highest bit set. */
uint32_t osThreadFlagsClear(uint32_t flags);
/* / Get the current Thread Flags of current running thread. */
/* / \return current thread flags. */
uint32_t osThreadFlagsGet(void);
/* / Wait for one or more Thread Flags of the current running thread to become signaled. */
/* / \param[in] flags specifies the flags to wait for. */
/* / \param[in] options specifies flags options (osFlagsXxxx). */
/* / \param[in] timeout \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out. */
/* / \return thread flags before clearing or error code if highest bit set. */
uint32_t osThreadFlagsWait(uint32_t flags, uint32_t options, uint32_t timeout);
/* ==== Generic Wait Functions ==== */
/* / Wait for Timeout (Time Delay). */
/* / \param[in] ticks \ref CMSIS_RTOS_TimeOutValue "time ticks" value */
/* / \return status code that indicates the execution status of the function. */
osStatus_t osDelay(uint32_t ticks);
/* / Wait until specified time. */
/* / \param[in] ticks absolute time in ticks */
/* / \return status code that indicates the execution status of the function. */
osStatus_t osDelayUntil(uint32_t ticks);
/* ==== Timer Management Functions ==== */
/* / Create and Initialize a timer. */
/* / \param[in] func function pointer to callback function. */
/* / \param[in] type \ref osTimerOnce for one-shot or \ref osTimerPeriodic for periodic behavior. */
/* / \param[in] argument argument to the timer callback function. */
/* / \param[in] attr timer attributes; NULL: default values. */
/* / \return timer ID for reference by other functions or NULL in case of error. */
osTimerId_t osTimerNew(osTimerFunc_t func, osTimerType_t type, void *argument, const osTimerAttr_t *attr);
/* / Get name of a timer. */
/* / \param[in] timer_id timer ID obtained by \ref osTimerNew. */
/* / \return name as NULL terminated string. */
const char *osTimerGetName(osTimerId_t timer_id);
/* / Start or restart a timer. */
/* / \param[in] timer_id timer ID obtained by \ref osTimerNew. */
/* / \param[in] ticks \ref CMSIS_RTOS_TimeOutValue "time ticks" value of the timer. */
/* / \return status code that indicates the execution status of the function. */
osStatus_t osTimerStart(osTimerId_t timer_id, uint32_t ticks);
/* / Stop a timer. */
/* / \param[in] timer_id timer ID obtained by \ref osTimerNew. */
/* / \return status code that indicates the execution status of the function. */
osStatus_t osTimerStop(osTimerId_t timer_id);
/* / Check if a timer is running. */
/* / \param[in] timer_id timer ID obtained by \ref osTimerNew. */
/* / \return 0 not running, 1 running. */
uint32_t osTimerIsRunning(osTimerId_t timer_id);
/* / Delete a timer. */
/* / \param[in] timer_id timer ID obtained by \ref osTimerNew. */
/* / \return status code that indicates the execution status of the function. */
osStatus_t osTimerDelete(osTimerId_t timer_id);
/* ==== Event Flags Management Functions ==== */
/* / Create and Initialize an Event Flags object. */
/* / \param[in] attr event flags attributes; NULL: default values. */
/* / \return event flags ID for reference by other functions or NULL in case of error. */
osEventFlagsId_t osEventFlagsNew(const osEventFlagsAttr_t *attr);
/* / Get name of an Event Flags object. */
/* / \param[in] ef_id event flags ID obtained by \ref osEventFlagsNew. */
/* / \return name as NULL terminated string. */
const char *osEventFlagsGetName(osEventFlagsId_t ef_id);
/* / Set the specified Event Flags. */
/* / \param[in] ef_id event flags ID obtained by \ref osEventFlagsNew. */
/* / \param[in] flags specifies the flags that shall be set. */
/* / \return event flags after setting or error code if highest bit set. */
uint32_t osEventFlagsSet(osEventFlagsId_t ef_id, uint32_t flags);
/* / Clear the specified Event Flags. */
/* / \param[in] ef_id event flags ID obtained by \ref osEventFlagsNew. */
/* / \param[in] flags specifies the flags that shall be cleared. */
/* / \return event flags before clearing or error code if highest bit set. */
uint32_t osEventFlagsClear(osEventFlagsId_t ef_id, uint32_t flags);
/* / Get the current Event Flags. */
/* / \param[in] ef_id event flags ID obtained by \ref osEventFlagsNew. */
/* / \return current event flags. */
uint32_t osEventFlagsGet(osEventFlagsId_t ef_id);
/* / Wait for one or more Event Flags to become signaled. */
/* / \param[in] ef_id event flags ID obtained by \ref osEventFlagsNew. */
/* / \param[in] flags specifies the flags to wait for. */
/* / \param[in] options specifies flags options (osFlagsXxxx). */
/* / \param[in] timeout \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out. */
/* / \return event flags before clearing or error code if highest bit set. */
uint32_t osEventFlagsWait(osEventFlagsId_t ef_id, uint32_t flags, uint32_t options, uint32_t timeout);
/* / Delete an Event Flags object. */
/* / \param[in] ef_id event flags ID obtained by \ref osEventFlagsNew. */
/* / \return status code that indicates the execution status of the function. */
osStatus_t osEventFlagsDelete(osEventFlagsId_t ef_id);
/* ==== Mutex Management Functions ==== */
/* / Create and Initialize a Mutex object. */
/* / \param[in] attr mutex attributes; NULL: default values. */
/* / \return mutex ID for reference by other functions or NULL in case of error. */
osMutexId_t osMutexNew(const osMutexAttr_t *attr);
/* / Get name of a Mutex object. */
/* / \param[in] mutex_id mutex ID obtained by \ref osMutexNew. */
/* / \return name as NULL terminated string. */
const char *osMutexGetName(osMutexId_t mutex_id);
/* / Acquire a Mutex or timeout if it is locked. */
/* / \param[in] mutex_id mutex ID obtained by \ref osMutexNew. */
/* / \param[in] timeout \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out. */
/* / \return status code that indicates the execution status of the function. */
osStatus_t osMutexAcquire(osMutexId_t mutex_id, uint32_t timeout);
/* / Release a Mutex that was acquired by \ref osMutexAcquire. */
/* / \param[in] mutex_id mutex ID obtained by \ref osMutexNew. */
/* / \return status code that indicates the execution status of the function. */
osStatus_t osMutexRelease(osMutexId_t mutex_id);
/* / Get Thread which owns a Mutex object. */
/* / \param[in] mutex_id mutex ID obtained by \ref osMutexNew. */
/* / \return thread ID of owner thread or NULL when mutex was not acquired. */
osThreadId_t osMutexGetOwner(osMutexId_t mutex_id);
/* / Delete a Mutex object. */
/* / \param[in] mutex_id mutex ID obtained by \ref osMutexNew. */
/* / \return status code that indicates the execution status of the function. */
osStatus_t osMutexDelete(osMutexId_t mutex_id);
/* ==== Semaphore Management Functions ==== */
/* / Create and Initialize a Semaphore object. */
/* / \param[in] max_count maximum number of available tokens. */
/* / \param[in] initial_count initial number of available tokens. */
/* / \param[in] attr semaphore attributes; NULL: default values. */
/* / \return semaphore ID for reference by other functions or NULL in case of error. */
osSemaphoreId_t osSemaphoreNew(uint32_t max_count, uint32_t initial_count, const osSemaphoreAttr_t *attr);
/* / Get name of a Semaphore object. */
/* / \param[in] semaphore_id semaphore ID obtained by \ref osSemaphoreNew. */
/* / \return name as NULL terminated string. */
const char *osSemaphoreGetName(osSemaphoreId_t semaphore_id);
/* / Acquire a Semaphore token or timeout if no tokens are available. */
/* / \param[in] semaphore_id semaphore ID obtained by \ref osSemaphoreNew. */
/* / \param[in] timeout \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out. */
/* / \return status code that indicates the execution status of the function. */
osStatus_t osSemaphoreAcquire(osSemaphoreId_t semaphore_id, uint32_t timeout);
/* / Release a Semaphore token up to the initial maximum count. */
/* / \param[in] semaphore_id semaphore ID obtained by \ref osSemaphoreNew. */
/* / \return status code that indicates the execution status of the function. */
osStatus_t osSemaphoreRelease(osSemaphoreId_t semaphore_id);
/* / Get current Semaphore token count. */
/* / \param[in] semaphore_id semaphore ID obtained by \ref osSemaphoreNew. */
/* / \return number of tokens available. */
uint32_t osSemaphoreGetCount(osSemaphoreId_t semaphore_id);
/* / Delete a Semaphore object. */
/* / \param[in] semaphore_id semaphore ID obtained by \ref osSemaphoreNew. */
/* / \return status code that indicates the execution status of the function. */
osStatus_t osSemaphoreDelete(osSemaphoreId_t semaphore_id);
/* ==== Memory Pool Management Functions ==== */
/* / Create and Initialize a Memory Pool object. */
/* / \param[in] block_count maximum number of memory blocks in memory pool. */
/* / \param[in] block_size memory block size in bytes. */
/* / \param[in] attr memory pool attributes; NULL: default values. */
/* / \return memory pool ID for reference by other functions or NULL in case of error. */
osMemoryPoolId_t osMemoryPoolNew(uint32_t block_count, uint32_t block_size, const osMemoryPoolAttr_t *attr);
/* / Get name of a Memory Pool object. */
/* / \param[in] mp_id memory pool ID obtained by \ref osMemoryPoolNew. */
/* / \return name as NULL terminated string. */
const char *osMemoryPoolGetName(osMemoryPoolId_t mp_id);
/* / Allocate a memory block from a Memory Pool. */
/* / \param[in] mp_id memory pool ID obtained by \ref osMemoryPoolNew. */
/* / \param[in] timeout \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out. */
/* / \return address of the allocated memory block or NULL in case of no memory is available. */
void *osMemoryPoolAlloc(osMemoryPoolId_t mp_id, uint32_t timeout);
/* / Return an allocated memory block back to a Memory Pool. */
/* / \param[in] mp_id memory pool ID obtained by \ref osMemoryPoolNew. */
/* / \param[in] block address of the allocated memory block to be returned to the memory pool. */
/* / \return status code that indicates the execution status of the function. */
osStatus_t osMemoryPoolFree(osMemoryPoolId_t mp_id, void *block);
/* / Get maximum number of memory blocks in a Memory Pool. */
/* / \param[in] mp_id memory pool ID obtained by \ref osMemoryPoolNew. */
/* / \return maximum number of memory blocks. */
uint32_t osMemoryPoolGetCapacity(osMemoryPoolId_t mp_id);
/* / Get memory block size in a Memory Pool. */
/* / \param[in] mp_id memory pool ID obtained by \ref osMemoryPoolNew. */
/* / \return memory block size in bytes. */
uint32_t osMemoryPoolGetBlockSize(osMemoryPoolId_t mp_id);
/* / Get number of memory blocks used in a Memory Pool. */
/* / \param[in] mp_id memory pool ID obtained by \ref osMemoryPoolNew. */
/* / \return number of memory blocks used. */
uint32_t osMemoryPoolGetCount(osMemoryPoolId_t mp_id);
/* / Get number of memory blocks available in a Memory Pool. */
/* / \param[in] mp_id memory pool ID obtained by \ref osMemoryPoolNew. */
/* / \return number of memory blocks available. */
uint32_t osMemoryPoolGetSpace(osMemoryPoolId_t mp_id);
/* / Delete a Memory Pool object. */
/* / \param[in] mp_id memory pool ID obtained by \ref osMemoryPoolNew. */
/* / \return status code that indicates the execution status of the function. */
osStatus_t osMemoryPoolDelete(osMemoryPoolId_t mp_id);
/* ==== Message Queue Management Functions ==== */
/* / Create and Initialize a Message Queue object. */
/* / \param[in] msg_count maximum number of messages in queue. */
/* / \param[in] msg_size maximum message size in bytes. */
/* / \param[in] attr message queue attributes; NULL: default values. */
/* / \return message queue ID for reference by other functions or NULL in case of error. */
osMessageQueueId_t osMessageQueueNew(uint32_t msg_count, uint32_t msg_size, const osMessageQueueAttr_t *attr);
/* / Get name of a Message Queue object. */
/* / \param[in] mq_id message queue ID obtained by \ref osMessageQueueNew. */
/* / \return name as NULL terminated string. */
const char *osMessageQueueGetName(osMessageQueueId_t mq_id);
/* / Put a Message into a Queue or timeout if Queue is full. */
/* / \param[in] mq_id message queue ID obtained by \ref osMessageQueueNew. */
/* / \param[in] msg_ptr pointer to buffer with message to put into a queue. */
/* / \param[in] msg_prio message priority. */
/* / \param[in] timeout \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out. */
/* / \return status code that indicates the execution status of the function. */
osStatus_t osMessageQueuePut(osMessageQueueId_t mq_id, const void *msg_ptr, uint8_t msg_prio, uint32_t timeout);
/* / Get a Message from a Queue or timeout if Queue is empty. */
/* / \param[in] mq_id message queue ID obtained by \ref osMessageQueueNew. */
/* / \param[out] msg_ptr pointer to buffer for message to get from a queue. */
/* / \param[out] msg_prio pointer to buffer for message priority or NULL. */
/* / \param[in] timeout \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out. */
/* / \return status code that indicates the execution status of the function. */
osStatus_t osMessageQueueGet(osMessageQueueId_t mq_id, void *msg_ptr, uint8_t *msg_prio, uint32_t timeout);
/* / Get maximum number of messages in a Message Queue. */
/* / \param[in] mq_id message queue ID obtained by \ref osMessageQueueNew. */
/* / \return maximum number of messages. */
uint32_t osMessageQueueGetCapacity(osMessageQueueId_t mq_id);
/* / Get maximum message size in a Memory Pool. */
/* / \param[in] mq_id message queue ID obtained by \ref osMessageQueueNew. */
/* / \return maximum message size in bytes. */
uint32_t osMessageQueueGetMsgSize(osMessageQueueId_t mq_id);
/* / Get number of queued messages in a Message Queue. */
/* / \param[in] mq_id message queue ID obtained by \ref osMessageQueueNew. */
/* / \return number of queued messages. */
uint32_t osMessageQueueGetCount(osMessageQueueId_t mq_id);
/* / Get number of available slots for messages in a Message Queue. */
/* / \param[in] mq_id message queue ID obtained by \ref osMessageQueueNew. */
/* / \return number of available slots for messages. */
uint32_t osMessageQueueGetSpace(osMessageQueueId_t mq_id);
/* / Reset a Message Queue to initial empty state. */
/* / \param[in] mq_id message queue ID obtained by \ref osMessageQueueNew. */
/* / \return status code that indicates the execution status of the function. */
osStatus_t osMessageQueueReset(osMessageQueueId_t mq_id);
/* / Delete a Message Queue object. */
/* / \param[in] mq_id message queue ID obtained by \ref osMessageQueueNew. */
/* / \return status code that indicates the execution status of the function. */
osStatus_t osMessageQueueDelete(osMessageQueueId_t mq_id);
#ifdef __cplusplus
}
#endif
#endif /* CMSIS_OS2_H_ */
``` | /content/code_sandbox/include/zephyr/portability/cmsis_os2.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 9,295 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_DT_UTIL_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_DT_UTIL_H_
/*
* This file exists to keep in-tree DTS clean. This means, only
* #include <zephyr/dt-bindings/foo.h> form should be included. The
* <zephyr/dt-bindings/dt-util.h> wraps <zephyr/sys/util_macro.h> file exposing
* all macro base definitions to DTS preprocessor. It provides
* necessary background to elaborate complex constructions like
* variable length macros with zero or more elements.
*/
#include <zephyr/sys/util_macro.h>
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_DT_UTIL_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/dt-util.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 158 |
```objective-c
/* your_sha256_hash------
* $Date: 5. February 2013
* $Revision: V1.02
*
* Project: CMSIS-RTOS API
* Title: cmsis_os.h template header file
*
* Version 0.02
* Initial Proposal Phase
* Version 0.03
* osKernelStart added, optional feature: main started as thread
* osSemaphores have standard behavior
* osTimerCreate does not start the timer, added osTimerStart
* osThreadPass is renamed to osThreadYield
* Version 1.01
* Support for C++ interface
* - const attribute removed from the osXxxxDef_t typedef's
* - const attribute added to the osXxxxDef macros
* Added: osTimerDelete, osMutexDelete, osSemaphoreDelete
* Added: osKernelInitialize
* Version 1.02
* Control functions for short timeouts in microsecond resolution:
* Added: osKernelSysTick, osKernelSysTickFrequency, osKernelSysTickMicroSec
* Removed: osSignalGet
*your_sha256_hash------------
*
*
*
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
*your_sha256_hash-----------*/
#ifndef ZEPHYR_INCLUDE_CMSIS_RTOS_V1_CMSIS_OS_H_
#define ZEPHYR_INCLUDE_CMSIS_RTOS_V1_CMSIS_OS_H_
/// \note MUST REMAIN UNCHANGED: \b osCMSIS identifies the CMSIS-RTOS API version.
#define osCMSIS 0x10002 ///< API version (main [31:16] .sub [15:0])
/// \note CAN BE CHANGED: \b osCMSIS_KERNEL identifies the underlying RTOS kernel and version number.
#define osCMSIS_KERNEL 0x10000 ///< RTOS identification and version (main [31:16] .sub [15:0])
/// \note MUST REMAIN UNCHANGED: \b osKernelSystemId shall be consistent in every CMSIS-RTOS.
#define osKernelSystemId "KERNEL V1.00" ///< RTOS identification string
/// \note MUST REMAIN UNCHANGED: \b osFeature_xxx shall be consistent in every CMSIS-RTOS.
#define osFeature_MainThread 1 ///< main thread 1=main can be thread, 0=not available
#define osFeature_Pool 1 ///< Memory Pools: 1=available, 0=not available
#define osFeature_MailQ 1 ///< Mail Queues: 1=available, 0=not available
#define osFeature_MessageQ 1 ///< Message Queues: 1=available, 0=not available
#define osFeature_Signals 8 ///< maximum number of Signal Flags available per thread
#define osFeature_Semaphore 30 ///< maximum count for \ref osSemaphoreCreate function
#define osFeature_Wait 0 ///< osWait function: 1=available, 0=not available
#define osFeature_SysTick 1 ///< osKernelSysTick functions: 1=available, 0=not available
#include <stdint.h>
#include <stddef.h>
#include <zephyr/kernel.h>
#include <zephyr/sys/bitarray.h>
#ifdef __cplusplus
extern "C"
{
#endif
// ==== Enumeration, structures, defines ====
/// Priority used for thread control.
/// \note MUST REMAIN UNCHANGED: \b osPriority shall be consistent in every CMSIS-RTOS.
typedef enum {
osPriorityIdle = -3, ///< priority: idle (lowest)
osPriorityLow = -2, ///< priority: low
osPriorityBelowNormal = -1, ///< priority: below normal
osPriorityNormal = 0, ///< priority: normal (default)
osPriorityAboveNormal = +1, ///< priority: above normal
osPriorityHigh = +2, ///< priority: high
osPriorityRealtime = +3, ///< priority: realtime (highest)
osPriorityError = 0x84 ///< system cannot determine priority or thread has illegal priority
} osPriority;
/// Timeout value.
/// \note MUST REMAIN UNCHANGED: \b osWaitForever shall be consistent in every CMSIS-RTOS.
#define osWaitForever 0xFFFFFFFF ///< wait forever timeout value
/// Status code values returned by CMSIS-RTOS functions.
/// \note MUST REMAIN UNCHANGED: \b osStatus shall be consistent in every CMSIS-RTOS.
typedef enum {
osOK = 0, ///< function completed; no error or event occurred.
osEventSignal = 0x08, ///< function completed; signal event occurred.
osEventMessage = 0x10, ///< function completed; message event occurred.
osEventMail = 0x20, ///< function completed; mail event occurred.
osEventTimeout = 0x40, ///< function completed; timeout occurred.
osErrorParameter = 0x80, ///< parameter error: a mandatory parameter was missing or specified an incorrect object.
osErrorResource = 0x81, ///< resource not available: a specified resource was not available.
osErrorTimeoutResource = 0xC1, ///< resource not available within given time: a specified resource was not available within the timeout period.
osErrorISR = 0x82, ///< not allowed in ISR context: the function cannot be called from interrupt service routines.
osErrorISRRecursive = 0x83, ///< function called multiple times from ISR with same object.
osErrorPriority = 0x84, ///< system cannot determine priority or thread has illegal priority.
osErrorNoMemory = 0x85, ///< system is out of memory: it was impossible to allocate or reserve memory for the operation.
osErrorValue = 0x86, ///< value of a parameter is out of range.
osErrorOS = 0xFF, ///< unspecified RTOS error: run-time error but no other error message fits.
os_status_reserved = 0x7FFFFFFF ///< prevent from enum down-size compiler optimization.
} osStatus;
/// Timer type value for the timer definition.
/// \note MUST REMAIN UNCHANGED: \b os_timer_type shall be consistent in every CMSIS-RTOS.
typedef enum {
osTimerOnce = 0, ///< one-shot timer
osTimerPeriodic = 1 ///< repeating timer
} os_timer_type;
/// Entry point of a thread.
/// \note MUST REMAIN UNCHANGED: \b os_pthread shall be consistent in every CMSIS-RTOS.
typedef void (*os_pthread) (void const *argument);
/// Entry point of a timer call back function.
/// \note MUST REMAIN UNCHANGED: \b os_ptimer shall be consistent in every CMSIS-RTOS.
typedef void (*os_ptimer) (void const *argument);
// >>> the following data type definitions may shall adapted towards a specific RTOS
/// Thread ID identifies the thread (pointer to a thread control block).
/// \note CAN BE CHANGED: \b os_thread_cb is implementation specific in every CMSIS-RTOS.
typedef struct os_thread_cb *osThreadId;
/// Timer ID identifies the timer (pointer to a timer control block).
/// \note CAN BE CHANGED: \b os_timer_cb is implementation specific in every CMSIS-RTOS.
typedef struct os_timer_cb *osTimerId;
/// Mutex ID identifies the mutex (pointer to a mutex control block).
/// \note CAN BE CHANGED: \b os_mutex_cb is implementation specific in every CMSIS-RTOS.
typedef struct os_mutex_cb *osMutexId;
/// Semaphore ID identifies the semaphore (pointer to a semaphore control block).
/// \note CAN BE CHANGED: \b os_semaphore_cb is implementation specific in every CMSIS-RTOS.
typedef struct os_semaphore_cb *osSemaphoreId;
/// Pool ID identifies the memory pool (pointer to a memory pool control block).
/// \note CAN BE CHANGED: \b os_pool_cb is implementation specific in every CMSIS-RTOS.
typedef struct os_pool_cb *osPoolId;
/// Message ID identifies the message queue (pointer to a message queue control block).
/// \note CAN BE CHANGED: \b os_messageQ_cb is implementation specific in every CMSIS-RTOS.
typedef struct os_messageQ_cb *osMessageQId;
/// Mail ID identifies the mail queue (pointer to a mail queue control block).
/// \note CAN BE CHANGED: \b os_mailQ_cb is implementation specific in every CMSIS-RTOS.
typedef struct os_mailQ_cb *osMailQId;
/// Thread Definition structure contains startup information of a thread.
/// \note CAN BE CHANGED: \b os_thread_def is implementation specific in every CMSIS-RTOS.
typedef struct os_thread_def {
os_pthread pthread; ///< start address of thread function
osPriority tpriority; ///< initial thread priority
uint32_t instances; ///< maximum number of instances of that thread function
uint32_t stacksize; ///< stack size requirements in bytes; 0 is default stack size
void *stack_mem; ///< pointer to array of stack memory
struct k_thread *cm_thread; ///< pointer to k_thread structure
struct k_poll_signal *poll_signal;
struct k_poll_event *poll_event;
int32_t signal_results;
///< a bitarray used to indicate whether the thread is used or not, 0: unused, 1: used
void *status_mask;
} osThreadDef_t;
/// Timer Definition structure contains timer parameters.
/// \note CAN BE CHANGED: \b os_timer_def is implementation specific in every CMSIS-RTOS.
typedef struct os_timer_def {
os_ptimer ptimer; ///< start address of a timer function
} osTimerDef_t;
/// Mutex Definition structure contains setup information for a mutex.
/// \note CAN BE CHANGED: \b os_mutex_def is implementation specific in every CMSIS-RTOS.
typedef struct os_mutex_def {
uint32_t dummy; ///< dummy value.
} osMutexDef_t;
/// Semaphore Definition structure contains setup information for a semaphore.
/// \note CAN BE CHANGED: \b os_semaphore_def is implementation specific in every CMSIS-RTOS.
typedef struct os_semaphore_def {
uint32_t dummy; ///< dummy value.
} osSemaphoreDef_t;
/// Definition structure for memory block allocation.
/// \note CAN BE CHANGED: \b os_pool_def is implementation specific in every CMSIS-RTOS.
typedef struct os_pool_def {
uint32_t pool_sz; ///< number of items (elements) in the pool
uint32_t item_sz; ///< size of an item
void *pool; ///< pointer to memory for pool
} osPoolDef_t;
/// Definition structure for message queue.
/// \note CAN BE CHANGED: \b os_messageQ_def is implementation specific in every CMSIS-RTOS.
typedef struct os_messageQ_def {
uint32_t queue_sz; ///< number of elements in the queue
uint32_t item_sz; ///< size of an item
void *pool; ///< memory array for messages
struct k_msgq *msgq;
} osMessageQDef_t;
/// Definition structure for mail queue.
/// \note CAN BE CHANGED: \b os_mailQ_def is implementation specific in every CMSIS-RTOS.
typedef struct os_mailQ_def {
uint32_t queue_sz; ///< number of elements in the queue
uint32_t item_sz; ///< size of an item
void *pool; ///< memory array for mail
struct k_mbox *mbox;
} osMailQDef_t;
/// Event structure contains detailed information about an event.
/// \note MUST REMAIN UNCHANGED: \b os_event shall be consistent in every CMSIS-RTOS.
/// However the struct may be extended at the end.
typedef struct {
osStatus status; ///< status code: event or error information
union {
uint32_t v; ///< message as 32-bit value
void *p; ///< message or mail as void pointer
int32_t signals; ///< signal flags
} value; ///< event value
union {
osMailQId mail_id; ///< mail id obtained by \ref osMailCreate
osMessageQId message_id; ///< message id obtained by \ref osMessageCreate
} def; ///< event definition
} osEvent;
// ==== Kernel Control Functions ====
/// Initialize the RTOS Kernel for creating objects.
/// \return status code that indicates the execution status of the function.
/// \note MUST REMAIN UNCHANGED: \b osKernelInitialize shall be consistent in every CMSIS-RTOS.
osStatus osKernelInitialize (void);
/// Start the RTOS Kernel.
/// \return status code that indicates the execution status of the function.
/// \note MUST REMAIN UNCHANGED: \b osKernelStart shall be consistent in every CMSIS-RTOS.
osStatus osKernelStart (void);
/// Check if the RTOS kernel is already started.
/// \note MUST REMAIN UNCHANGED: \b osKernelRunning shall be consistent in every CMSIS-RTOS.
/// \return 0 RTOS is not started, 1 RTOS is started.
int32_t osKernelRunning(void);
#if (defined (osFeature_SysTick) && (osFeature_SysTick != 0)) // System Timer available
/// Get the RTOS kernel system timer counter
/// \note MUST REMAIN UNCHANGED: \b osKernelSysTick shall be consistent in every CMSIS-RTOS.
/// \return RTOS kernel system timer as 32-bit value
uint32_t osKernelSysTick (void);
/// The RTOS kernel system timer frequency in Hz
/// \note Reflects the system timer setting and is typically defined in a configuration file.
#define osKernelSysTickFrequency sys_clock_hw_cycles_per_sec
/// Convert a microseconds value to a RTOS kernel system timer value.
/// \param microsec time value in microseconds.
/// \return time value normalized to the \ref osKernelSysTickFrequency
#define osKernelSysTickMicroSec(microsec) (((uint64_t)microsec * (osKernelSysTickFrequency)) / 1000000U)
#endif // System Timer available
// ==== Thread Management ====
/// Create a Thread Definition with function, priority, and stack requirements.
/// \param name name of the thread function.
/// \param priority initial priority of the thread function.
/// \param instances number of possible thread instances.
/// \param stacksz stack size (in bytes) requirements for the thread function.
/// \note CAN BE CHANGED: The parameters to \b osThreadDef shall be consistent but the
/// macro body is implementation specific in every CMSIS-RTOS.
#if defined (osObjectsExternal) // object is external
#define osThreadDef(name, priority, instances, stacksz) \
extern const osThreadDef_t os_thread_def_##name
#else // define the object
#define osThreadDef(name, priority, instances, stacksz) \
static K_THREAD_STACK_ARRAY_DEFINE(stacks_##name, instances, CONFIG_CMSIS_THREAD_MAX_STACK_SIZE); \
static struct k_thread cm_thread_##name[instances]; \
static struct k_poll_signal wait_signal_##name; \
static struct k_poll_event wait_events_##name; \
SYS_BITARRAY_DEFINE_STATIC(bitarray_##name, instances); \
static osThreadDef_t os_thread_def_##name = \
{ (name), (priority), (instances), (stacksz), (void *)(stacks_##name), \
(cm_thread_##name), (&wait_signal_##name), \
(&wait_events_##name), 0, (void *)(&bitarray_##name)}
#endif
/// Access a Thread definition.
/// \param name name of the thread definition object.
/// \note CAN BE CHANGED: The parameter to \b osThread shall be consistent but the
/// macro body is implementation specific in every CMSIS-RTOS.
#define osThread(name) \
&os_thread_def_##name
/// Create a thread and add it to Active Threads and set it to state READY.
/// \param[in] thread_def thread definition referenced with \ref osThread.
/// \param[in] argument pointer that is passed to the thread function as start argument.
/// \return thread ID for reference by other functions or NULL in case of error.
/// \note MUST REMAIN UNCHANGED: \b osThreadCreate shall be consistent in every CMSIS-RTOS.
osThreadId osThreadCreate (const osThreadDef_t *thread_def, void *argument);
/// Return the thread ID of the current running thread.
/// \return thread ID for reference by other functions or NULL in case of error.
/// \note MUST REMAIN UNCHANGED: \b osThreadGetId shall be consistent in every CMSIS-RTOS.
osThreadId osThreadGetId (void);
/// Terminate execution of a thread and remove it from Active Threads.
/// \param[in] thread_id thread ID obtained by \ref osThreadCreate or \ref osThreadGetId.
/// \return status code that indicates the execution status of the function.
/// \note MUST REMAIN UNCHANGED: \b osThreadTerminate shall be consistent in every CMSIS-RTOS.
osStatus osThreadTerminate (osThreadId thread_id);
/// Pass control to next thread that is in state \b READY.
/// \return status code that indicates the execution status of the function.
/// \note MUST REMAIN UNCHANGED: \b osThreadYield shall be consistent in every CMSIS-RTOS.
osStatus osThreadYield (void);
/// Change priority of an active thread.
/// \param[in] thread_id thread ID obtained by \ref osThreadCreate or \ref osThreadGetId.
/// \param[in] priority new priority value for the thread function.
/// \return status code that indicates the execution status of the function.
/// \note MUST REMAIN UNCHANGED: \b osThreadSetPriority shall be consistent in every CMSIS-RTOS.
osStatus osThreadSetPriority (osThreadId thread_id, osPriority priority);
/// Get current priority of an active thread.
/// \param[in] thread_id thread ID obtained by \ref osThreadCreate or \ref osThreadGetId.
/// \return current priority value of the thread function.
/// \note MUST REMAIN UNCHANGED: \b osThreadGetPriority shall be consistent in every CMSIS-RTOS.
osPriority osThreadGetPriority (osThreadId thread_id);
// ==== Generic Wait Functions ====
/// Wait for Timeout (Time Delay).
/// \param[in] millisec \ref CMSIS_RTOS_TimeOutValue "time delay" value
/// \return status code that indicates the execution status of the function.
osStatus osDelay (uint32_t millisec);
#if (defined (osFeature_Wait) && (osFeature_Wait != 0)) // Generic Wait available
/// Wait for Signal, Message, Mail, or Timeout.
/// \param[in] millisec \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out
/// \return event that contains signal, message, or mail information or error code.
/// \note MUST REMAIN UNCHANGED: \b osWait shall be consistent in every CMSIS-RTOS.
osEvent osWait (uint32_t millisec);
#endif // Generic Wait available
// ==== Timer Management Functions ====
/// Define a Timer object.
/// \param name name of the timer object.
/// \param function name of the timer call back function.
/// \note CAN BE CHANGED: The parameter to \b osTimerDef shall be consistent but the
/// macro body is implementation specific in every CMSIS-RTOS.
#if defined (osObjectsExternal) // object is external
#define osTimerDef(name, function) \
extern const osTimerDef_t os_timer_def_##name
#else // define the object
#define osTimerDef(name, function) \
const osTimerDef_t os_timer_def_##name = \
{ (function) }
#endif
/// Access a Timer definition.
/// \param name name of the timer object.
/// \note CAN BE CHANGED: The parameter to \b osTimer shall be consistent but the
/// macro body is implementation specific in every CMSIS-RTOS.
#define osTimer(name) \
&os_timer_def_##name
/// Create a timer.
/// \param[in] timer_def timer object referenced with \ref osTimer.
/// \param[in] type osTimerOnce for one-shot or osTimerPeriodic for periodic behavior.
/// \param[in] argument argument to the timer call back function.
/// \return timer ID for reference by other functions or NULL in case of error.
/// \note MUST REMAIN UNCHANGED: \b osTimerCreate shall be consistent in every CMSIS-RTOS.
osTimerId osTimerCreate (const osTimerDef_t *timer_def, os_timer_type type, void *argument);
/// Start or restart a timer.
/// \param[in] timer_id timer ID obtained by \ref osTimerCreate.
/// \param[in] millisec \ref CMSIS_RTOS_TimeOutValue "time delay" value of the timer.
/// \return status code that indicates the execution status of the function.
/// \note MUST REMAIN UNCHANGED: \b osTimerStart shall be consistent in every CMSIS-RTOS.
osStatus osTimerStart (osTimerId timer_id, uint32_t millisec);
/// Stop the timer.
/// \param[in] timer_id timer ID obtained by \ref osTimerCreate.
/// \return status code that indicates the execution status of the function.
/// \note MUST REMAIN UNCHANGED: \b osTimerStop shall be consistent in every CMSIS-RTOS.
osStatus osTimerStop (osTimerId timer_id);
/// Delete a timer that was created by \ref osTimerCreate.
/// \param[in] timer_id timer ID obtained by \ref osTimerCreate.
/// \return status code that indicates the execution status of the function.
/// \note MUST REMAIN UNCHANGED: \b osTimerDelete shall be consistent in every CMSIS-RTOS.
osStatus osTimerDelete (osTimerId timer_id);
// ==== Signal Management ====
/// Set the specified Signal Flags of an active thread.
/// \param[in] thread_id thread ID obtained by \ref osThreadCreate or \ref osThreadGetId.
/// \param[in] signals specifies the signal flags of the thread that should be set.
/// \return previous signal flags of the specified thread or 0x80000000 in case of incorrect parameters.
/// \note MUST REMAIN UNCHANGED: \b osSignalSet shall be consistent in every CMSIS-RTOS.
int32_t osSignalSet (osThreadId thread_id, int32_t signals);
/// Clear the specified Signal Flags of an active thread.
/// \param[in] thread_id thread ID obtained by \ref osThreadCreate or \ref osThreadGetId.
/// \param[in] signals specifies the signal flags of the thread that shall be cleared.
/// \return previous signal flags of the specified thread or 0x80000000 in case of incorrect parameters or call from ISR.
/// \note MUST REMAIN UNCHANGED: \b osSignalClear shall be consistent in every CMSIS-RTOS.
int32_t osSignalClear (osThreadId thread_id, int32_t signals);
/// Wait for one or more Signal Flags to become signaled for the current \b RUNNING thread.
/// \param[in] signals wait until all specified signal flags set or 0 for any single signal flag.
/// \param[in] millisec \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.
/// \return event flag information or error code.
/// \note MUST REMAIN UNCHANGED: \b osSignalWait shall be consistent in every CMSIS-RTOS.
osEvent osSignalWait (int32_t signals, uint32_t millisec);
// ==== Mutex Management ====
/// Define a Mutex.
/// \param name name of the mutex object.
/// \note CAN BE CHANGED: The parameter to \b osMutexDef shall be consistent but the
/// macro body is implementation specific in every CMSIS-RTOS.
#if defined (osObjectsExternal) // object is external
#define osMutexDef(name) \
extern const osMutexDef_t os_mutex_def_##name
#else // define the object
#define osMutexDef(name) \
const osMutexDef_t os_mutex_def_##name = { 0 }
#endif
/// Access a Mutex definition.
/// \param name name of the mutex object.
/// \note CAN BE CHANGED: The parameter to \b osMutex shall be consistent but the
/// macro body is implementation specific in every CMSIS-RTOS.
#define osMutex(name) \
&os_mutex_def_##name
/// Create and Initialize a Mutex object.
/// \param[in] mutex_def mutex definition referenced with \ref osMutex.
/// \return mutex ID for reference by other functions or NULL in case of error.
/// \note MUST REMAIN UNCHANGED: \b osMutexCreate shall be consistent in every CMSIS-RTOS.
osMutexId osMutexCreate (const osMutexDef_t *mutex_def);
/// Wait until a Mutex becomes available.
/// \param[in] mutex_id mutex ID obtained by \ref osMutexCreate.
/// \param[in] millisec \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.
/// \return status code that indicates the execution status of the function.
/// \note MUST REMAIN UNCHANGED: \b osMutexWait shall be consistent in every CMSIS-RTOS.
osStatus osMutexWait (osMutexId mutex_id, uint32_t millisec);
/// Release a Mutex that was obtained by \ref osMutexWait.
/// \param[in] mutex_id mutex ID obtained by \ref osMutexCreate.
/// \return status code that indicates the execution status of the function.
/// \note MUST REMAIN UNCHANGED: \b osMutexRelease shall be consistent in every CMSIS-RTOS.
osStatus osMutexRelease (osMutexId mutex_id);
/// Delete a Mutex that was created by \ref osMutexCreate.
/// \param[in] mutex_id mutex ID obtained by \ref osMutexCreate.
/// \return status code that indicates the execution status of the function.
/// \note MUST REMAIN UNCHANGED: \b osMutexDelete shall be consistent in every CMSIS-RTOS.
osStatus osMutexDelete (osMutexId mutex_id);
// ==== Semaphore Management Functions ====
#if (defined (osFeature_Semaphore) && (osFeature_Semaphore != 0)) // Semaphore available
/// Define a Semaphore object.
/// \param name name of the semaphore object.
/// \note CAN BE CHANGED: The parameter to \b osSemaphoreDef shall be consistent but the
/// macro body is implementation specific in every CMSIS-RTOS.
#if defined (osObjectsExternal) // object is external
#define osSemaphoreDef(name) \
extern const osSemaphoreDef_t os_semaphore_def_##name
#else // define the object
#define osSemaphoreDef(name) \
const osSemaphoreDef_t os_semaphore_def_##name = { 0 }
#endif
/// Access a Semaphore definition.
/// \param name name of the semaphore object.
/// \note CAN BE CHANGED: The parameter to \b osSemaphore shall be consistent but the
/// macro body is implementation specific in every CMSIS-RTOS.
#define osSemaphore(name) \
&os_semaphore_def_##name
/// Create and Initialize a Semaphore object used for managing resources.
/// \param[in] semaphore_def semaphore definition referenced with \ref osSemaphore.
/// \param[in] count number of available resources.
/// \return semaphore ID for reference by other functions or NULL in case of error.
/// \note MUST REMAIN UNCHANGED: \b osSemaphoreCreate shall be consistent in every CMSIS-RTOS.
osSemaphoreId osSemaphoreCreate (const osSemaphoreDef_t *semaphore_def, int32_t count);
/// Wait until a Semaphore token becomes available.
/// \param[in] semaphore_id semaphore object referenced with \ref osSemaphoreCreate.
/// \param[in] millisec \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.
/// \return number of available tokens, or -1 in case of incorrect parameters.
/// \note MUST REMAIN UNCHANGED: \b osSemaphoreWait shall be consistent in every CMSIS-RTOS.
int32_t osSemaphoreWait (osSemaphoreId semaphore_id, uint32_t millisec);
/// Release a Semaphore token.
/// \param[in] semaphore_id semaphore object referenced with \ref osSemaphoreCreate.
/// \return status code that indicates the execution status of the function.
/// \note MUST REMAIN UNCHANGED: \b osSemaphoreRelease shall be consistent in every CMSIS-RTOS.
osStatus osSemaphoreRelease (osSemaphoreId semaphore_id);
/// Delete a Semaphore that was created by \ref osSemaphoreCreate.
/// \param[in] semaphore_id semaphore object referenced with \ref osSemaphoreCreate.
/// \return status code that indicates the execution status of the function.
/// \note MUST REMAIN UNCHANGED: \b osSemaphoreDelete shall be consistent in every CMSIS-RTOS.
osStatus osSemaphoreDelete (osSemaphoreId semaphore_id);
#endif // Semaphore available
// ==== Memory Pool Management Functions ====
#if (defined (osFeature_Pool) && (osFeature_Pool != 0)) // Memory Pool Management available
/// \brief Define a Memory Pool.
/// \param name name of the memory pool.
/// \param no maximum number of blocks (objects) in the memory pool.
/// \param type data type of a single block (object).
/// \note CAN BE CHANGED: The parameter to \b osPoolDef shall be consistent but the
/// macro body is implementation specific in every CMSIS-RTOS.
#if defined (osObjectsExternal) // object is external
#define osPoolDef(name, no, type) \
extern const osPoolDef_t os_pool_def_##name
#else // define the object
#define osPoolDef(name, no, type) \
K_MEM_SLAB_DEFINE(os_mem_##name, sizeof(type), no, 4); \
const osPoolDef_t os_pool_def_##name = \
{ (no), sizeof(type), &os_mem_##name }
#endif
/// \brief Access a Memory Pool definition.
/// \param name name of the memory pool
/// \note CAN BE CHANGED: The parameter to \b osPool shall be consistent but the
/// macro body is implementation specific in every CMSIS-RTOS.
#define osPool(name) \
&os_pool_def_##name
/// Create and Initialize a memory pool.
/// \param[in] pool_def memory pool definition referenced with \ref osPool.
/// \return memory pool ID for reference by other functions or NULL in case of error.
/// \note MUST REMAIN UNCHANGED: \b osPoolCreate shall be consistent in every CMSIS-RTOS.
osPoolId osPoolCreate (const osPoolDef_t *pool_def);
/// Allocate a memory block from a memory pool.
/// \param[in] pool_id memory pool ID obtain referenced with \ref osPoolCreate.
/// \return address of the allocated memory block or NULL in case of no memory available.
/// \note MUST REMAIN UNCHANGED: \b osPoolAlloc shall be consistent in every CMSIS-RTOS.
void *osPoolAlloc (osPoolId pool_id);
/// Allocate a memory block from a memory pool and set memory block to zero.
/// \param[in] pool_id memory pool ID obtain referenced with \ref osPoolCreate.
/// \return address of the allocated memory block or NULL in case of no memory available.
/// \note MUST REMAIN UNCHANGED: \b osPoolCAlloc shall be consistent in every CMSIS-RTOS.
void *osPoolCAlloc (osPoolId pool_id);
/// Return an allocated memory block back to a specific memory pool.
/// \param[in] pool_id memory pool ID obtain referenced with \ref osPoolCreate.
/// \param[in] block address of the allocated memory block that is returned to the memory pool.
/// \return status code that indicates the execution status of the function.
/// \note MUST REMAIN UNCHANGED: \b osPoolFree shall be consistent in every CMSIS-RTOS.
osStatus osPoolFree (osPoolId pool_id, void *block);
#endif // Memory Pool Management available
// ==== Message Queue Management Functions ====
#if (defined (osFeature_MessageQ) && (osFeature_MessageQ != 0)) // Message Queues available
/// \brief Create a Message Queue Definition.
/// \param name name of the queue.
/// \param queue_sz maximum number of messages in the queue.
/// \param type data type of a single message element (for debugger).
/// \note CAN BE CHANGED: The parameter to \b osMessageQDef shall be consistent but the
/// macro body is implementation specific in every CMSIS-RTOS.
#if defined (osObjectsExternal) // object is external
#define osMessageQDef(name, queue_sz, type) \
extern const osMessageQDef_t os_messageQ_def_##name
#else // define the object
#define osMessageQDef(name, queue_sz, type) \
struct k_msgq msgq_##name; \
static char __aligned(4) buf_##name[queue_sz * sizeof(type)]; \
const osMessageQDef_t os_messageQ_def_##name = \
{ (queue_sz), sizeof (type), (buf_##name), (&msgq_##name) }
#endif
/// \brief Access a Message Queue Definition.
/// \param name name of the queue
/// \note CAN BE CHANGED: The parameter to \b osMessageQ shall be consistent but the
/// macro body is implementation specific in every CMSIS-RTOS.
#define osMessageQ(name) \
&os_messageQ_def_##name
/// Create and Initialize a Message Queue.
/// \param[in] queue_def queue definition referenced with \ref osMessageQ.
/// \param[in] thread_id thread ID (obtained by \ref osThreadCreate or \ref osThreadGetId) or NULL.
/// \return message queue ID for reference by other functions or NULL in case of error.
/// \note MUST REMAIN UNCHANGED: \b osMessageCreate shall be consistent in every CMSIS-RTOS.
osMessageQId osMessageCreate (const osMessageQDef_t *queue_def, osThreadId thread_id);
/// Put a Message to a Queue.
/// \param[in] queue_id message queue ID obtained with \ref osMessageCreate.
/// \param[in] info message information.
/// \param[in] millisec \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.
/// \return status code that indicates the execution status of the function.
/// \note MUST REMAIN UNCHANGED: \b osMessagePut shall be consistent in every CMSIS-RTOS.
osStatus osMessagePut (osMessageQId queue_id, uint32_t info, uint32_t millisec);
/// Get a Message or Wait for a Message from a Queue.
/// \param[in] queue_id message queue ID obtained with \ref osMessageCreate.
/// \param[in] millisec \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out.
/// \return event information that includes status code.
/// \note MUST REMAIN UNCHANGED: \b osMessageGet shall be consistent in every CMSIS-RTOS.
osEvent osMessageGet (osMessageQId queue_id, uint32_t millisec);
#endif // Message Queues available
// ==== Mail Queue Management Functions ====
#if (defined (osFeature_MailQ) && (osFeature_MailQ != 0)) // Mail Queues available
/// \brief Create a Mail Queue Definition.
/// \param name name of the queue
/// \param queue_sz maximum number of messages in queue
/// \param type data type of a single message element
/// \note CAN BE CHANGED: The parameter to \b osMailQDef shall be consistent but the
/// macro body is implementation specific in every CMSIS-RTOS.
#if defined (osObjectsExternal) // object is external
#define osMailQDef(name, queue_sz, type) \
extern const osMailQDef_t os_mailQ_def_##name
#else // define the object
#define osMailQDef(name, queue_sz, type) \
struct k_mbox mbox_##name; \
K_MEM_SLAB_DEFINE(mailq_slab_##name, sizeof(type), queue_sz, 4); \
const osMailQDef_t os_mailQ_def_##name = \
{ (queue_sz), sizeof (type), (&mailq_slab_##name), (&mbox_##name) }
#endif
/// \brief Access a Mail Queue Definition.
/// \param name name of the queue
/// \note CAN BE CHANGED: The parameter to \b osMailQ shall be consistent but the
/// macro body is implementation specific in every CMSIS-RTOS.
#define osMailQ(name) \
&os_mailQ_def_##name
/// Create and Initialize mail queue.
/// \param[in] queue_def reference to the mail queue definition obtain with \ref osMailQ
/// \param[in] thread_id thread ID (obtained by \ref osThreadCreate or \ref osThreadGetId) or NULL.
/// \return mail queue ID for reference by other functions or NULL in case of error.
/// \note MUST REMAIN UNCHANGED: \b osMailCreate shall be consistent in every CMSIS-RTOS.
osMailQId osMailCreate (const osMailQDef_t *queue_def, osThreadId thread_id);
/// Allocate a memory block from a mail.
/// \param[in] queue_id mail queue ID obtained with \ref osMailCreate.
/// \param[in] millisec \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out
/// \return pointer to memory block that can be filled with mail or NULL in case of error.
/// \note MUST REMAIN UNCHANGED: \b osMailAlloc shall be consistent in every CMSIS-RTOS.
void *osMailAlloc (osMailQId queue_id, uint32_t millisec);
/// Allocate a memory block from a mail and set memory block to zero.
/// \param[in] queue_id mail queue ID obtained with \ref osMailCreate.
/// \param[in] millisec \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out
/// \return pointer to memory block that can be filled with mail or NULL in case of error.
/// \note MUST REMAIN UNCHANGED: \b osMailCAlloc shall be consistent in every CMSIS-RTOS.
void *osMailCAlloc (osMailQId queue_id, uint32_t millisec);
/// Put a mail to a queue.
/// \param[in] queue_id mail queue ID obtained with \ref osMailCreate.
/// \param[in] mail memory block previously allocated with \ref osMailAlloc or \ref osMailCAlloc.
/// \return status code that indicates the execution status of the function.
/// \note MUST REMAIN UNCHANGED: \b osMailPut shall be consistent in every CMSIS-RTOS.
osStatus osMailPut (osMailQId queue_id, void *mail);
/// Get a mail from a queue.
/// \param[in] queue_id mail queue ID obtained with \ref osMailCreate.
/// \param[in] millisec \ref CMSIS_RTOS_TimeOutValue or 0 in case of no time-out
/// \return event that contains mail information or error code.
/// \note MUST REMAIN UNCHANGED: \b osMailGet shall be consistent in every CMSIS-RTOS.
osEvent osMailGet (osMailQId queue_id, uint32_t millisec);
/// Free a memory block from a mail.
/// \param[in] queue_id mail queue ID obtained with \ref osMailCreate.
/// \param[in] mail pointer to the memory block that was obtained with \ref osMailGet.
/// \return status code that indicates the execution status of the function.
/// \note MUST REMAIN UNCHANGED: \b osMailFree shall be consistent in every CMSIS-RTOS.
osStatus osMailFree (osMailQId queue_id, void *mail);
#endif // Mail Queues available
#ifdef __cplusplus
}
#endif
#endif /* ZEPHYR_INCLUDE_CMSIS_RTOS_V1_CMSIS_OS_H_ */
``` | /content/code_sandbox/include/zephyr/portability/cmsis_os.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 8,980 |
```objective-c
/*
*
*/
#ifndef your_sha256_hash_
#define your_sha256_hash_
#define WIFI_MAC_INTR_SOURCE 0
#define WIFI_MAC_NMI_SOURCE 1
#define WIFI_PWR_INTR_SOURCE 2
#define WIFI_BB_INTR_SOURCE 3
#define BT_MAC_INTR_SOURCE 4
#define BT_BB_INTR_SOURCE 5
#define BT_BB_NMI_SOURCE 6
#define LP_TIMER_SOURCE 7
#define COEX_SOURCE 8
#define BLE_TIMER_SOURCE 9
#define BLE_SEC_SOURCE 10
#define I2C_MASTER_SOURCE 11
#define APB_CTRL_INTR_SOURCE 12
#define GPIO_INTR_SOURCE 13
#define GPIO_NMI_SOURCE 14
#define SPI1_INTR_SOURCE 15
#define SPI2_INTR_SOURCE 16
#define UART0_INTR_SOURCE 17
#define UART1_INTR_SOURCE 18
#define LEDC_INTR_SOURCE 19
#define EFUSE_INTR_SOURCE 20
#define RTC_CORE_INTR_SOURCE 21
#define I2C_EXT0_INTR_SOURCE 22
#define TG0_T0_LEVEL_INTR_SOURCE 23
#define TG0_WDT_LEVEL_INTR_SOURCE 24
#define CACHE_IA_INTR_SOURCE 25
#define SYSTIMER_TARGET0_EDGE_INTR_SOURCE 26
#define SYSTIMER_TARGET1_EDGE_INTR_SOURCE 27
#define SYSTIMER_TARGET2_EDGE_INTR_SOURCE 28
#define SPI_MEM_REJECT_CACHE_INTR_SOURCE 29
#define ICACHE_PRELOAD0_INTR_SOURCE 30
#define ICACHE_SYNC0_INTR_SOURCE 31
#define APB_ADC_INTR_SOURCE 32
#define DMA_CH0_INTR_SOURCE 33
#define SHA_INTR_SOURCE 34
#define ECC_INTR_SOURCE 35
#define FROM_CPU_INTR0_SOURCE 36
#define FROM_CPU_INTR1_SOURCE 37
#define FROM_CPU_INTR2_SOURCE 38
#define FROM_CPU_INTR3_SOURCE 39
#define ASSIST_DEBUG_INTR_SOURCE 40
#define CORE0_PIF_PMS_SIZE_INTR_SOURCE 41
#define CACHE_CORE0_ACS_INTR_SOURCE 42
#endif
``` | /content/code_sandbox/include/zephyr/dt-bindings/interrupt-controller/esp-esp32c2-intmux.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 446 |
```objective-c
/*
*
*/
#ifndef your_sha256_hash_
#define your_sha256_hash_
#define WIFI_MAC_INTR_SOURCE 0 /* interrupt of WiFi MAC, level*/
#define WIFI_MAC_NMI_SOURCE 1 /* interrupt of WiFi MAC, NMI*/
#define WIFI_PWR_INTR_SOURCE 2
#define WIFI_BB_INTR_SOURCE 3 /* interrupt of WiFi BB, level*/
#define BT_MAC_INTR_SOURCE 4 /* will be cancelled*/
#define BT_BB_INTR_SOURCE 5 /* interrupt of BT BB, level*/
#define BT_BB_NMI_SOURCE 6 /* interrupt of BT BB, NMI*/
#define LP_TIMER_INTR_SOURCE 7
#define COEX_INTR_SOURCE 8
#define BLE_TIMER_INTR_SOURCE 9
#define BLE_SEC_INTR_SOURCE 10
#define I2C_MASTER_SOURCE 11 /* interrupt of I2C Master, level*/
#define ZB_MAC_SOURCE 12
#define PMU_INTR_SOURCE 13
#define EFUSE_INTR_SOURCE 14 /* interrupt of efuse, level, not likely to use*/
#define LP_RTC_TIMER_INTR_SOURCE 15
#define LP_UART_INTR_SOURCE 16
#define LP_I2C_INTR_SOURCE 17
#define LP_WDT_INTR_SOURCE 18
#define LP_PERI_TIMEOUT_INTR_SOURCE 19
#define LP_APM_M0_INTR_SOURCE 20
#define LP_APM_M1_INTR_SOURCE 21
#define FROM_CPU_INTR0_SOURCE 22 /* interrupt0 generated from a CPU, level*/
#define FROM_CPU_INTR1_SOURCE 23 /* interrupt1 generated from a CPU, level*/
#define FROM_CPU_INTR2_SOURCE 24 /* interrupt2 generated from a CPU, level*/
#define FROM_CPU_INTR3_SOURCE 25 /* interrupt3 generated from a CPU, level*/
#define ASSIST_DEBUG_INTR_SOURCE 26 /* interrupt of Assist debug module, LEVEL*/
#define TRACE_INTR_SOURCE 27
#define CACHE_INTR_SOURCE 28
#define CPU_PERI_TIMEOUT_INTR_SOURCE 29
#define GPIO_INTR_SOURCE 30 /* interrupt of GPIO, level*/
#define GPIO_NMI_SOURCE 31 /* interrupt of GPIO, NMI*/
#define PAU_INTR_SOURCE 32
#define HP_PERI_TIMEOUT_INTR_SOURCE 33
#define MODEM_PERI_TIMEOUT_INTR_SOURCE 34
#define HP_APM_M0_INTR_SOURCE 35
#define HP_APM_M1_INTR_SOURCE 36
#define HP_APM_M2_INTR_SOURCE 37
#define HP_APM_M3_INTR_SOURCE 38
#define LP_APM0_INTR_SOURCE 39
#define MSPI_INTR_SOURCE 40
#define I2S1_INTR_SOURCE 41 /* interrupt of I2S1, level*/
#define UHCI0_INTR_SOURCE 42 /* interrupt of UHCI0, level*/
#define UART0_INTR_SOURCE 43 /* interrupt of UART0, level*/
#define UART1_INTR_SOURCE 44 /* interrupt of UART1, level*/
#define LEDC_INTR_SOURCE 45 /* interrupt of LED PWM, level*/
#define TWAI0_INTR_SOURCE 46 /* interrupt of can0, level*/
#define TWAI1_INTR_SOURCE 47 /* interrupt of can1, level*/
#define USB_SERIAL_JTAG_INTR_SOURCE 48 /* interrupt of USB, level*/
#define RMT_INTR_SOURCE 49 /* interrupt of remote controller, level*/
#define I2C_EXT0_INTR_SOURCE 50 /* interrupt of I2C controller1, level*/
#define TG0_T0_LEVEL_INTR_SOURCE 51 /* interrupt of TIMER_GROUP0, TIMER0, level*/
#define TG0_T1_LEVEL_INTR_SOURCE 52 /* interrupt of TIMER_GROUP0, TIMER1, level*/
#define TG0_WDT_LEVEL_INTR_SOURCE 53 /* interrupt of TIMER_GROUP0, WATCH DOG, level*/
#define TG1_T0_LEVEL_INTR_SOURCE 54 /* interrupt of TIMER_GROUP1, TIMER0, level*/
#define TG1_T1_LEVEL_INTR_SOURCE 55 /* interrupt of TIMER_GROUP1, TIMER1, level*/
#define TG1_WDT_LEVEL_INTR_SOURCE 56 /* interrupt of TIMER_GROUP1, WATCHDOG, level*/
#define SYSTIMER_TARGET0_EDGE_INTR_SOURCE 57 /* interrupt of system timer 0, EDGE*/
#define SYSTIMER_TARGET1_EDGE_INTR_SOURCE 58 /* interrupt of system timer 1, EDGE*/
#define SYSTIMER_TARGET2_EDGE_INTR_SOURCE 59 /* interrupt of system timer 2, EDGE*/
#define APB_ADC_INTR_SOURCE 60 /* interrupt of APB ADC, LEVEL*/
#define MCPWM0_INTR_SOURCE 61 /* interrupt of MCPWM0, LEVEL*/
#define PCNT_INTR_SOURCE 62
#define PARL_IO_INTR_SOURCE 63
#define SLC0_INTR_SOURCE 64
#define SLC_INTR_SOURCE 65
#define DMA_IN_CH0_INTR_SOURCE 66 /* interrupt of general DMA IN channel 0, LEVEL*/
#define DMA_IN_CH1_INTR_SOURCE 67 /* interrupt of general DMA IN channel 1, LEVEL*/
#define DMA_IN_CH2_INTR_SOURCE 68 /* interrupt of general DMA IN channel 2, LEVEL*/
#define DMA_OUT_CH0_INTR_SOURCE 69 /* interrupt of general DMA OUT channel 0, LEVEL*/
#define DMA_OUT_CH1_INTR_SOURCE 70 /* interrupt of general DMA OUT channel 1, LEVEL*/
#define DMA_OUT_CH2_INTR_SOURCE 71 /* interrupt of general DMA OUT channel 2, LEVEL*/
#define GSPI2_INTR_SOURCE 72
#define AES_INTR_SOURCE 73 /* interrupt of AES accelerator, level*/
#define SHA_INTR_SOURCE 74 /* interrupt of SHA accelerator, level*/
#define RSA_INTR_SOURCE 75 /* interrupt of RSA accelerator, level*/
#define ECC_INTR_SOURCE 76 /* interrupt of ECC accelerator, level*/
#define MAX_INTR_SOURCE 77
#endif /* your_sha256_hash_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/interrupt-controller/esp-esp32c6-intmux.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,260 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_INTERRUPT_CONTROLLER_IT8XXX2_WUC_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_INTERRUPT_CONTROLLER_IT8XXX2_WUC_H_
#include <zephyr/dt-bindings/dt-util.h>
/** WUC reserved register of reg property */
#define IT8XXX2_WUC_UNUSED_REG 0
/**
* @name wakeup controller flags
* @{
*/
/** WUC rising edge trigger mode */
#define WUC_TYPE_EDGE_RISING BIT(0)
/** WUC falling edge trigger mode */
#define WUC_TYPE_EDGE_FALLING BIT(1)
/** WUC both edge trigger mode */
#define WUC_TYPE_EDGE_BOTH (WUC_TYPE_EDGE_RISING | WUC_TYPE_EDGE_FALLING)
/** @} */
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_INTERRUPT_CONTROLLER_IT8XXX2_WUC_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/interrupt-controller/it8xxx2-wuc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 179 |
```objective-c
*
*/
#ifndef __DT_BINDING_TI_VIM_H
#define __DT_BINDING_TI_VIM_H
#include <zephyr/sys/util_macro.h>
#define IRQ_TYPE_LEVEL BIT(1)
#define IRQ_TYPE_EDGE BIT(2)
#define IRQ_DEFAULT_PRIORITY 0xf
#endif /* __DT_BINDING_TI_VIM_H */
``` | /content/code_sandbox/include/zephyr/dt-bindings/interrupt-controller/ti-vim.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 68 |
```objective-c
/*
*
*/
#ifndef your_sha256_hash_INTC_H_
#define your_sha256_hash_INTC_H_
#define XMC4XXX_INTC_PORT_POS 0
#define XMC4XXX_INTC_PORT_MASK 0xf
#define XMC4XXX_INTC_PIN_POS 4
#define XMC4XXX_INTC_PIN_MASK 0xf
#define XMC4XXX_INTC_LINE_POS 8
#define XMC4XXX_INTC_LINE_MASK 0x7
#define XMC4XXX_INTC_ERU_SRC_POS 11
#define XMC4XXX_INTC_ERU_SRC_MASK 0x7
#define XMC4XXX_INTC_GET_PORT(mx) ((mx >> XMC4XXX_INTC_PORT_POS) & XMC4XXX_INTC_PORT_MASK)
#define XMC4XXX_INTC_GET_PIN(mx) ((mx >> XMC4XXX_INTC_PIN_POS) & XMC4XXX_INTC_PIN_MASK)
#define XMC4XXX_INTC_GET_LINE(mx) ((mx >> XMC4XXX_INTC_LINE_POS) & XMC4XXX_INTC_LINE_MASK)
#define XMC4XXX_INTC_GET_ERU_SRC(mx) ((mx >> XMC4XXX_INTC_ERU_SRC_POS) & XMC4XXX_INTC_ERU_SRC_MASK)
#define XMC4XXX_INTC_SET_LINE_MAP(port, pin, eru_src, line) \
((port) << XMC4XXX_INTC_PORT_POS | (pin) << XMC4XXX_INTC_PIN_POS | \
(eru_src) << XMC4XXX_INTC_ERU_SRC_POS | (line) << XMC4XXX_INTC_LINE_POS)
#endif /* your_sha256_hash_INTC_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/interrupt-controller/infineon-xmc4xxx-intc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 366 |
```objective-c
/*
*
*/
#ifndef __DT_BINDING_ARM_GIC_H
#define __DT_BINDING_ARM_GIC_H
#include <zephyr/dt-bindings/dt-util.h>
/* CPU Interrupt numbers */
#define GIC_INT_VIRT_MAINT 25
#define GIC_INT_HYP_TIMER 26
#define GIC_INT_VIRT_TIMER 27
#define GIC_INT_LEGACY_FIQ 28
#define GIC_INT_PHYS_TIMER 29
#define GIC_INT_NS_PHYS_TIMER 30
#define GIC_INT_LEGACY_IRQ 31
/* BIT(0) reserved for IRQ_ZERO_LATENCY */
#define IRQ_TYPE_LEVEL BIT(1)
#define IRQ_TYPE_EDGE BIT(2)
#define GIC_SPI 0x0
#define GIC_PPI 0x1
#define IRQ_DEFAULT_PRIORITY 0xa0
#endif
``` | /content/code_sandbox/include/zephyr/dt-bindings/interrupt-controller/arm-gic.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 182 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_DT_BINDINGS_INTERRUPT_CONTROLLER_RENESAS_RA_ICU_H_
#define ZEPHYR_DT_BINDINGS_INTERRUPT_CONTROLLER_RENESAS_RA_ICU_H_
#define RA_ICU_IRQ_UNSPECIFIED (-1)
#define RA_ICU_PORT_IRQ0 (1 << 8)
#define RA_ICU_PORT_IRQ1 (2 << 8)
#define RA_ICU_PORT_IRQ2 (3 << 8)
#define RA_ICU_PORT_IRQ3 (4 << 8)
#define RA_ICU_PORT_IRQ4 (5 << 8)
#define RA_ICU_PORT_IRQ5 (6 << 8)
#define RA_ICU_PORT_IRQ6 (7 << 8)
#define RA_ICU_PORT_IRQ7 (8 << 8)
#define RA_ICU_PORT_IRQ8 (9 << 8)
#define RA_ICU_PORT_IRQ9 (10 << 8)
#define RA_ICU_PORT_IRQ10 (11 << 8)
#define RA_ICU_PORT_IRQ11 (12 << 8)
#define RA_ICU_PORT_IRQ12 (13 << 8)
#define RA_ICU_PORT_IRQ14 (15 << 8)
#define RA_ICU_PORT_IRQ15 (16 << 8)
#define RA_ICU_DMAC0_INT (17 << 8)
#define RA_ICU_DMAC1_INT (18 << 8)
#define RA_ICU_DMAC2_INT (19 << 8)
#define RA_ICU_DMAC3_INT (20 << 8)
#define RA_ICU_DTC_COMPLETE (21 << 8)
#define RA_ICU_ICU_SNZCANCEL (23 << 8)
#define RA_ICU_FCU_FRDYI (24 << 8)
#define RA_ICU_LVD_LVD1 (25 << 8)
#define RA_ICU_LVD_LVD2 (26 << 8)
#define RA_ICU_VBATT_LVD (27 << 8)
#define RA_ICU_MOSC_STOP (28 << 8)
#define RA_ICU_SYSTEM_SNZREQ (29 << 8)
#define RA_ICU_AGT0_AGTI (30 << 8)
#define RA_ICU_AGT0_AGTCMAI (31 << 8)
#define RA_ICU_AGT0_AGTCMBI (32 << 8)
#define RA_ICU_AGT1_AGTI (33 << 8)
#define RA_ICU_AGT1_AGTCMAI (34 << 8)
#define RA_ICU_AGT1_AGTCMBI (35 << 8)
#define RA_ICU_IWDT_NMIUNDF (36 << 8)
#define RA_ICU_WDT_NMIUNDF (37 << 8)
#define RA_ICU_RTC_ALM (38 << 8)
#define RA_ICU_RTC_PRD (39 << 8)
#define RA_ICU_RTC_CUP (40 << 8)
#define RA_ICU_ADC140_ADI (41 << 8)
#define RA_ICU_ADC140_GBADI (42 << 8)
#define RA_ICU_ADC140_CMPAI (43 << 8)
#define RA_ICU_ADC140_CMPBI (44 << 8)
#define RA_ICU_ADC140_WCMPM (45 << 8)
#define RA_ICU_ADC140_WCMPUM (46 << 8)
#define RA_ICU_ACMP_LP0 (47 << 8)
#define RA_ICU_ACMP_LP1 (48 << 8)
#define RA_ICU_USBFS_D0FIFO (49 << 8)
#define RA_ICU_USBFS_D1FIFO (50 << 8)
#define RA_ICU_USBFS_USBI (51 << 8)
#define RA_ICU_USBFS_USBR (52 << 8)
#define RA_ICU_IIC0_RXI (53 << 8)
#define RA_ICU_IIC0_TXI (54 << 8)
#define RA_ICU_IIC0_TEI (55 << 8)
#define RA_ICU_IIC0_EEI (56 << 8)
#define RA_ICU_IIC0_WUI (57 << 8)
#define RA_ICU_IIC1_RXI (58 << 8)
#define RA_ICU_IIC1_TXI (59 << 8)
#define RA_ICU_IIC1_TEI (60 << 8)
#define RA_ICU_IIC1_EEI (61 << 8)
#define RA_ICU_SSIE0_SSITXI (62 << 8)
#define RA_ICU_SSIE0_SSIRXI (63 << 8)
#define RA_ICU_SSIE0_SSIF (65 << 8)
#define RA_ICU_CTSU_CTSUWR (66 << 8)
#define RA_ICU_CTSU_CTSURD (67 << 8)
#define RA_ICU_CTSU_CTSUFN (68 << 8)
#define RA_ICU_KEY_INTKR (69 << 8)
#define RA_ICU_DOC_DOPCI (70 << 8)
#define RA_ICU_CAC_FERRI (71 << 8)
#define RA_ICU_CAC_MENDI (72 << 8)
#define RA_ICU_CAC_OVFI (73 << 8)
#define RA_ICU_CAN0_ERS (74 << 8)
#define RA_ICU_CAN0_RXF (75 << 8)
#define RA_ICU_CAN0_TXF (76 << 8)
#define RA_ICU_CAN0_RXM (77 << 8)
#define RA_ICU_CAN0_TXM (78 << 8)
#define RA_ICU_IOPORT_GROUP1 (70 << 8)
#define RA_ICU_IOPORT_GROUP2 (80 << 8)
#define RA_ICU_IOPORT_GROUP3 (81 << 8)
#define RA_ICU_IOPORT_GROUP4 (82 << 8)
#define RA_ICU_ELC_SWEVT0 (83 << 8)
#define RA_ICU_ELC_SWEVT1 (84 << 8)
#define RA_ICU_POEG_GROUP0 (85 << 8)
#define RA_ICU_POEG_GROUP1 (86 << 8)
#define RA_ICU_GPT0_CCMPA (87 << 8)
#define RA_ICU_GPT0_CCMPB (88 << 8)
#define RA_ICU_GPT0_CMPC (89 << 8)
#define RA_ICU_GPT0_CMPD (90 << 8)
#define RA_ICU_GPT0_CMPE (91 << 8)
#define RA_ICU_GPT0_CMPF (92 << 8)
#define RA_ICU_GPT0_OVF (93 << 8)
#define RA_ICU_GPT0_UDF (94 << 8)
#define RA_ICU_GPT1_CCMPA (95 << 8)
#define RA_ICU_GPT1_CCMPB (96 << 8)
#define RA_ICU_GPT1_CMPC (97 << 8)
#define RA_ICU_GPT1_CMPD (98 << 8)
#define RA_ICU_GPT1_CMPE (99 << 8)
#define RA_ICU_GPT1_CMPF (100 << 8)
#define RA_ICU_GPT1_OVF (101 << 8)
#define RA_ICU_GPT1_UDF (102 << 8)
#define RA_ICU_GPT2_CCMPA (103 << 8)
#define RA_ICU_GPT2_CCMPB (104 << 8)
#define RA_ICU_GPT2_CMPC (105 << 8)
#define RA_ICU_GPT2_CMPD (106 << 8)
#define RA_ICU_GPT2_CMPE (107 << 8)
#define RA_ICU_GPT2_CMPF (108 << 8)
#define RA_ICU_GPT2_OVF (109 << 8)
#define RA_ICU_GPT2_UDF (110 << 8)
#define RA_ICU_GPT3_CCMPA (111 << 8)
#define RA_ICU_GPT3_CCMPB (112 << 8)
#define RA_ICU_GPT3_CMPC (113 << 8)
#define RA_ICU_GPT3_CMPD (114 << 8)
#define RA_ICU_GPT3_CMPE (115 << 8)
#define RA_ICU_GPT3_CMPF (116 << 8)
#define RA_ICU_GPT3_OVF (117 << 8)
#define RA_ICU_GPT3_UDF (118 << 8)
#define RA_ICU_GPT4_CCMPA (119 << 8)
#define RA_ICU_GPT4_CCMPB (120 << 8)
#define RA_ICU_GPT4_CMPC (121 << 8)
#define RA_ICU_GPT4_CMPD (122 << 8)
#define RA_ICU_GPT4_CMPE (123 << 8)
#define RA_ICU_GPT4_CMPF (124 << 8)
#define RA_ICU_GPT4_OVF (125 << 8)
#define RA_ICU_GPT4_UDF (126 << 8)
#define RA_ICU_GPT5_CCMPA (127 << 8)
#define RA_ICU_GPT5_CCMPB (128 << 8)
#define RA_ICU_GPT5_CMPC (129 << 8)
#define RA_ICU_GPT5_CMPD (130 << 8)
#define RA_ICU_GPT5_CMPE (131 << 8)
#define RA_ICU_GPT5_CMPF (132 << 8)
#define RA_ICU_GPT5_OVF (133 << 8)
#define RA_ICU_GPT5_UDF (134 << 8)
#define RA_ICU_GPT6_CCMPA (135 << 8)
#define RA_ICU_GPT6_CCMPB (136 << 8)
#define RA_ICU_GPT6_CMPC (137 << 8)
#define RA_ICU_GPT6_CMPD (138 << 8)
#define RA_ICU_GPT6_CMPE (139 << 8)
#define RA_ICU_GPT6_CMPF (140 << 8)
#define RA_ICU_GPT6_OVF (141 << 8)
#define RA_ICU_GPT6_UDF (142 << 8)
#define RA_ICU_GPT7_CCMPA (143 << 8)
#define RA_ICU_GPT7_CCMPB (144 << 8)
#define RA_ICU_GPT7_CMPC (145 << 8)
#define RA_ICU_GPT7_CMPD (146 << 8)
#define RA_ICU_GPT7_CMPE (147 << 8)
#define RA_ICU_GPT7_CMPF (148 << 8)
#define RA_ICU_GPT7_OVF (149 << 8)
#define RA_ICU_GPT7_UDF (150 << 8)
#define RA_ICU_GPT_UVWEDGE (151 << 8)
#define RA_ICU_SCI0_RXI (152 << 8)
#define RA_ICU_SCI0_TXI (153 << 8)
#define RA_ICU_SCI0_TEI (154 << 8)
#define RA_ICU_SCI0_ERI (155 << 8)
#define RA_ICU_SCI0_AM (156 << 8)
#define RA_ICU_SCI0_RXI_OR_ERI (157 << 8)
#define RA_ICU_SCI1_RXI (158 << 8)
#define RA_ICU_SCI1_TXI (159 << 8)
#define RA_ICU_SCI1_TEI (160 << 8)
#define RA_ICU_SCI1_ERI (161 << 8)
#define RA_ICU_SCI1_AM (162 << 8)
#define RA_ICU_SCI2_RXI (163 << 8)
#define RA_ICU_SCI2_TXI (164 << 8)
#define RA_ICU_SCI2_TEI (165 << 8)
#define RA_ICU_SCI2_ERI (166 << 8)
#define RA_ICU_SCI2_AM (167 << 8)
#define RA_ICU_SCI9_RXI (168 << 8)
#define RA_ICU_SCI9_TXI (169 << 8)
#define RA_ICU_SCI9_TEI (170 << 8)
#define RA_ICU_SCI9_ERI (171 << 8)
#define RA_ICU_SCI9_AM (172 << 8)
#define RA_ICU_SPI0_SPRI (173 << 8)
#define RA_ICU_SPI0_SPTI (174 << 8)
#define RA_ICU_SPI0_SPII (175 << 8)
#define RA_ICU_SPI0_SPEI (176 << 8)
#define RA_ICU_SPI0_SPTEND (177 << 8)
#define RA_ICU_SPI1_SPRI (178 << 8)
#define RA_ICU_SPI1_SPTI (179 << 8)
#define RA_ICU_SPI1_SPII (180 << 8)
#define RA_ICU_SPI1_SPEI (181 << 8)
#define RA_ICU_SPI1_SPTEND (182 << 8)
#endif /* ZEPHYR_DT_BINDINGS_INTERRUPT_CONTROLLER_RENESAS_RA_ICU_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/interrupt-controller/renesas-ra-icu.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,905 |
```objective-c
/*
*
*/
#ifndef your_sha256_hash
#define your_sha256_hash
#define WIFI_MAC_INTR_SOURCE 0 /* WiFi MAC, level */
#define WIFI_MAC_NMI_SOURCE 1 /* WiFi MAC, NMI, use if MAC needs fix in NMI */
#define WIFI_BB_INTR_SOURCE 2 /* WiFi BB, level, we can do some calibration */
#define BT_MAC_INTR_SOURCE 3 /* will be cancelled */
#define BT_BB_INTR_SOURCE 4 /* BB, level */
#define BT_BB_NMI_SOURCE 5 /* BT BB, NMI, use if BB have bug to fix in NMI */
#define RWBT_INTR_SOURCE 6 /* RWBT, level */
#define RWBLE_INTR_SOURCE 7 /* RWBLE, level */
#define RWBT_NMI_SOURCE 8 /* RWBT, NMI, use if RWBT has bug to fix in NMI */
#define RWBLE_NMI_SOURCE 9 /* RWBLE, NMI, use if RWBT has bug to fix in NMI */
#define SLC0_INTR_SOURCE 10 /* SLC0, level */
#define SLC1_INTR_SOURCE 11 /* SLC1, level */
#define UHCI0_INTR_SOURCE 12 /* UHCI0, level */
#define UHCI1_INTR_SOURCE 13 /* UHCI1, level */
#define TG0_T0_LEVEL_INTR_SOURCE 14 /* TIMER_GROUP0, TIMER0, level */
#define TG0_T1_LEVEL_INTR_SOURCE 15 /* TIMER_GROUP0, TIMER1, level */
#define TG0_WDT_LEVEL_INTR_SOURCE 16 /* TIMER_GROUP0, WATCHDOG, level */
#define TG0_LACT_LEVEL_INTR_SOURCE 17 /* TIMER_GROUP0, LACT, level */
#define TG1_T0_LEVEL_INTR_SOURCE 18 /* TIMER_GROUP1, TIMER0, level */
#define TG1_T1_LEVEL_INTR_SOURCE 19 /* TIMER_GROUP1, TIMER1, level */
#define TG1_WDT_LEVEL_INTR_SOURCE 20 /* TIMER_GROUP1, WATCHDOG, level */
#define TG1_LACT_LEVEL_INTR_SOURCE 21 /* TIMER_GROUP1, LACT, level */
#define GPIO_INTR_SOURCE 22 /* interrupt of GPIO, level */
#define GPIO_NMI_SOURCE 23 /* interrupt of GPIO, NMI */
#define FROM_CPU_INTR0_SOURCE 24 /* int0 from a CPU, level */
#define FROM_CPU_INTR1_SOURCE 25 /* int1 from a CPU, level */
#define FROM_CPU_INTR2_SOURCE 26 /* int2 from a CPU, level, for DPORT Access */
#define FROM_CPU_INTR3_SOURCE 27 /* int3 from a CPU, level, for DPORT Access */
#define SPI0_INTR_SOURCE 28 /* SPI0, level, for $ Access, do not use this */
#define SPI1_INTR_SOURCE 29 /* SPI1, level, flash r/w, do not use this */
#define SPI2_INTR_SOURCE 30 /* SPI2, level */
#define SPI3_INTR_SOURCE 31 /* SPI3, level */
#define I2S0_INTR_SOURCE 32 /* I2S0, level */
#define I2S1_INTR_SOURCE 33 /* I2S1, level */
#define UART0_INTR_SOURCE 34 /* UART0, level */
#define UART1_INTR_SOURCE 35 /* UART1, level */
#define UART2_INTR_SOURCE 36 /* UART2, level */
#define SDIO_HOST_INTR_SOURCE 37 /* SD/SDIO/MMC HOST, level */
#define ETH_MAC_INTR_SOURCE 38 /* ethernet mac, level */
#define PWM0_INTR_SOURCE 39 /* PWM0, level, Reserved */
#define PWM1_INTR_SOURCE 40 /* PWM1, level, Reserved */
#define PWM2_INTR_SOURCE 41 /* PWM2, level */
#define PWM3_INTR_SOURCE 42 /* PWM3, level */
#define LEDC_INTR_SOURCE 43 /* LED PWM, level */
#define EFUSE_INTR_SOURCE 44 /* efuse, level, not likely to use */
#define TWAI_INTR_SOURCE 45 /* twai, level */
#define CAN_INTR_SOURCE TWAI_INTR_SOURCE
#define RTC_CORE_INTR_SOURCE 46 /* rtc core, level, include rtc watchdog */
#define RMT_INTR_SOURCE 47 /* remote controller, level */
#define PCNT_INTR_SOURCE 48 /* pulse count, level */
#define I2C_EXT0_INTR_SOURCE 49 /* I2C controller1, level */
#define I2C_EXT1_INTR_SOURCE 50 /* I2C controller0, level */
#define RSA_INTR_SOURCE 51 /* RSA accelerator, level */
#define SPI1_DMA_INTR_SOURCE 52 /* SPI1 DMA, for flash r/w, do not use it */
#define SPI2_DMA_INTR_SOURCE 53 /* SPI2 DMA, level */
#define SPI3_DMA_INTR_SOURCE 54 /* interrupt of SPI3 DMA, level */
#define WDT_INTR_SOURCE 55 /* will be cancelled */
#define TIMER1_INTR_SOURCE 56 /* will be cancelled */
#define TIMER2_INTR_SOURCE 57 /* will be cancelled */
#define TG0_T0_EDGE_INTR_SOURCE 58 /* TIMER_GROUP0, TIMER0, EDGE */
#define TG0_T1_EDGE_INTR_SOURCE 59 /* TIMER_GROUP0, TIMER1, EDGE */
#define TG0_WDT_EDGE_INTR_SOURCE 60 /* TIMER_GROUP0, WATCH DOG, EDGE */
#define TG0_LACT_EDGE_INTR_SOURCE 61 /* TIMER_GROUP0, LACT, EDGE */
#define TG1_T0_EDGE_INTR_SOURCE 62 /* TIMER_GROUP1, TIMER0, EDGE */
#define TG1_T1_EDGE_INTR_SOURCE 63 /* TIMER_GROUP1, TIMER1, EDGE */
#define TG1_WDT_EDGE_INTR_SOURCE 64 /* TIMER_GROUP1, WATCHDOG, EDGE */
#define TG1_LACT_EDGE_INTR_SOURCE 65 /* TIMER_GROUP0, LACT, EDGE */
#define MMU_IA_INTR_SOURCE 66 /* MMU Invalid Access, LEVEL */
#define MPU_IA_INTR_SOURCE 67 /* MPU Invalid Access, LEVEL */
#define CACHE_IA_INTR_SOURCE 68 /* Cache Invalid Access, LEVEL */
#define MAX_INTR_SOURCE 69 /* total number of interrupt sources */
#endif
``` | /content/code_sandbox/include/zephyr/dt-bindings/interrupt-controller/esp-xtensa-intmux.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,357 |
```objective-c
/*
*
*/
#ifndef __DT_BINDING_MCHP_XEC_ECIA_H
#define __DT_BINDING_MCHP_XEC_ECIA_H
/*
* Encode peripheral interrupt information into a 32-bit unsigned.
* g = bits[0:4], GIRQ number in [8, 26]
* gb = bits[12:8], peripheral source bit position [0, 31] in the GIRQ
* na = bits[23:16], aggregated GIRQ NVIC number
* nd = bits[31:24], direct NVIC number. For sources without a direct
* connection nd = na.
* NOTE: GIRQ22 is a peripheral clock wake only. GIRQ22 and its sources
* are not connected to the NVIC. Use 255 for na and nd.
*/
#define MCHP_XEC_ECIA(g, gb, na, nd) \
(((g) & 0x1f) + (((gb) & 0x1f) << 8) + (((na) & 0xff) << 16) + \
(((nd) & 0xff) << 24))
/* extract specific information from encoded MCHP_XEC_ECIA */
#define MCHP_XEC_ECIA_GIRQ(e) ((e) & 0x1f)
#define MCHP_XEC_ECIA_GIRQ_POS(e) (((e) >> 8) & 0x1f)
#define MCHP_XEC_ECIA_NVIC_AGGR(e) (((e) >> 16) & 0xff)
#define MCHP_XEC_ECIA_NVIC_DIRECT(e) (((e) >> 24) & 0xff)
#endif /* __DT_BINDING_MCHP_XEC_ECIA_H */
``` | /content/code_sandbox/include/zephyr/dt-bindings/interrupt-controller/mchp-xec-ecia.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 372 |
```objective-c
/*
*
*/
#ifndef your_sha256_hashNTMUX_H_
#define your_sha256_hashNTMUX_H_
#define WIFI_MAC_INTR_SOURCE 0 /* WiFi MAC, level */
#define WIFI_MAC_NMI_SOURCE 1 /* WiFi MAC, NMI, use if MAC needs fix in NMI */
#define WIFI_PWR_INTR_SOURCE 2
#define WIFI_BB_INTR_SOURCE 3 /* WiFi BB, level, we can do some calibration */
#define BT_MAC_INTR_SOURCE 4 /* will be cancelled */
#define BT_BB_INTR_SOURCE 5 /* BB, level */
#define BT_BB_NMI_SOURCE 6 /* BT BB, NMI, use if BB have bug to fix in NMI */
#define RWBT_INTR_SOURCE 7 /* RWBT, level */
#define RWBLE_INTR_SOURCE 8 /* RWBLE, level */
#define RWBT_NMI_SOURCE 9 /* RWBT, NMI, use if RWBT has bug to fix in NMI */
#define RWBLE_NMI_SOURCE 10 /* RWBLE, NMI, use if RWBT has bug to fix in NMI */
#define SLC0_INTR_SOURCE 11 /* SLC0, level */
#define SLC1_INTR_SOURCE 12 /* SLC1, level */
#define UHCI0_INTR_SOURCE 13 /* UHCI0, level */
#define UHCI1_INTR_SOURCE 14 /* UHCI1, level */
#define TG0_T0_LEVEL_INTR_SOURCE 15 /* TIMER_GROUP0, TIMER0, level */
#define TG0_T1_LEVEL_INTR_SOURCE 16 /* TIMER_GROUP0, TIMER1, level */
#define TG0_WDT_LEVEL_INTR_SOURCE 17 /* TIMER_GROUP0, WATCHDOG, level */
#define TG0_LACT_LEVEL_INTR_SOURCE 18 /* TIMER_GROUP0, LACT, level */
#define TG1_T0_LEVEL_INTR_SOURCE 19 /* TIMER_GROUP1, TIMER0, level */
#define TG1_T1_LEVEL_INTR_SOURCE 20 /* TIMER_GROUP1, TIMER1, level */
#define TG1_WDT_LEVEL_INTR_SOURCE 21 /* TIMER_GROUP1, WATCHDOG, level */
#define TG1_LACT_LEVEL_INTR_SOURCE 22 /* TIMER_GROUP1, LACT, level */
#define GPIO_INTR_SOURCE 23 /* interrupt of GPIO, level */
#define GPIO_NMI_SOURCE 24 /* interrupt of GPIO, NMI */
#define GPIO_INTR_SOURCE2 25 /* interrupt of GPIO, level */
#define GPIO_NMI_SOURCE2 26 /* interrupt of GPIO, NMI */
#define DEDICATED_GPIO_INTR_SOURCE 27 /* interrupt of dedicated GPIO, level */
#define FROM_CPU_INTR0_SOURCE 28 /* int0 from a CPU, level */
#define FROM_CPU_INTR1_SOURCE 29 /* int1 from a CPU, level */
#define FROM_CPU_INTR2_SOURCE 30 /* int2 from a CPU, level, for DPORT Access */
#define FROM_CPU_INTR3_SOURCE 31 /* int3 from a CPU, level, for DPORT Access */
#define SPI1_INTR_SOURCE 32 /* SPI1, level, flash r/w, do not use this */
#define SPI2_INTR_SOURCE 33 /* SPI2, level */
#define SPI3_INTR_SOURCE 34 /* SPI3, level */
#define I2S0_INTR_SOURCE 35 /* I2S0, level */
#define I2S1_INTR_SOURCE 36 /* I2S1, level */
#define UART0_INTR_SOURCE 37 /* UART0, level */
#define UART1_INTR_SOURCE 38 /* UART1, level */
#define UART2_INTR_SOURCE 39 /* UART2, level */
#define SDIO_HOST_INTR_SOURCE 40 /* SD/SDIO/MMC HOST, level */
#define PWM0_INTR_SOURCE 41 /* PWM0, level, Reserved */
#define PWM1_INTR_SOURCE 42 /* PWM1, level, Reserved */
#define PWM2_INTR_SOURCE 43 /* PWM2, level */
#define PWM3_INTR_SOURCE 44 /* PWM3, level */
#define LEDC_INTR_SOURCE 45 /* LED PWM, level */
#define EFUSE_INTR_SOURCE 46 /* efuse, level, not likely to use */
#define TWAI_INTR_SOURCE 47 /* twai, level */
#define USB_INTR_SOURCE 48 /* interrupt of USB, level */
#define RTC_CORE_INTR_SOURCE 49 /* rtc core, level, include rtc watchdog */
#define RMT_INTR_SOURCE 50 /* remote controller, level */
#define PCNT_INTR_SOURCE 51 /* pulse count, level */
#define I2C_EXT0_INTR_SOURCE 52 /* I2C controller1, level */
#define I2C_EXT1_INTR_SOURCE 53 /* I2C controller0, level */
#define RSA_INTR_SOURCE 54 /* RSA accelerator, level */
#define SHA_INTR_SOURCE 55 /* interrupt of RSA accelerator, level */
#define AES_INTR_SOURCE 56 /* interrupt of SHA accelerator, level */
#define SPI2_DMA_INTR_SOURCE 57 /* SPI2 DMA, level */
#define SPI3_DMA_INTR_SOURCE 58 /* interrupt of SPI3 DMA, level */
#define WDT_INTR_SOURCE 59 /* will be cancelled */
#define TIMER1_INTR_SOURCE 60 /* will be cancelled */
#define TIMER2_INTR_SOURCE 61 /* will be cancelled */
#define TG0_T0_EDGE_INTR_SOURCE 62 /* TIMER_GROUP0, TIMER0, EDGE */
#define TG0_T1_EDGE_INTR_SOURCE 63 /* TIMER_GROUP0, TIMER1, EDGE */
#define TG0_WDT_EDGE_INTR_SOURCE 64 /* TIMER_GROUP0, WATCH DOG, EDGE */
#define TG0_LACT_EDGE_INTR_SOURCE 65 /* TIMER_GROUP0, LACT, EDGE */
#define TG1_T0_EDGE_INTR_SOURCE 66 /* TIMER_GROUP1, TIMER0, EDGE */
#define TG1_T1_EDGE_INTR_SOURCE 67 /* TIMER_GROUP1, TIMER1, EDGE */
#define TG1_WDT_EDGE_INTR_SOURCE 68 /* TIMER_GROUP1, WATCHDOG, EDGE */
#define TG1_LACT_EDGE_INTR_SOURCE 69 /* TIMER_GROUP0, LACT, EDGE */
#define CACHE_IA_INTR_SOURCE 70 /* Cache Invalid Access, level */
#define SYSTIMER_TARGET0_EDGE_INTR_SOURCE 71 /* system timer 0, edge */
#define SYSTIMER_TARGET1_EDGE_INTR_SOURCE 72 /* system timer 1, edge */
#define SYSTIMER_TARGET2_EDGE_INTR_SOURCE 73 /* system timer 2, edge */
#define ASSIST_DEBUG_INTR_SOURCE 74 /* Assist debug module, level */
#define PMS_PRO_IRAM0_ILG_INTR_SOURCE 75 /* illegal IRAM1 access, level */
#define PMS_PRO_DRAM0_ILG_INTR_SOURCE 76 /* illegal DRAM0 access, level */
#define PMS_PRO_DPORT_ILG_INTR_SOURCE 77 /* illegal DPORT access, level */
#define PMS_PRO_AHB_ILG_INTR_SOURCE 78 /* illegal AHB access, level */
#define PMS_PRO_CACHE_ILG_INTR_SOURCE 79 /* illegal CACHE access, level */
#define PMS_DMA_APB_I_ILG_INTR_SOURCE 80 /* illegal APB access, level */
#define PMS_DMA_RX_I_ILG_INTR_SOURCE 81 /* illegal DMA RX access, level */
#define PMS_DMA_TX_I_ILG_INTR_SOURCE 82 /* illegal DMA TX access, level */
#define SPI_MEM_REJECT_CACHE_INTR_SOURCE 83 /* SPI0 Cache access and
* SPI1 access rejected, level
*/
#define DMA_COPY_INTR_SOURCE 84 /* DMA copy, level */
#define SPI4_DMA_INTR_SOURCE 85 /* SPI4 DMA, level */
#define SPI4_INTR_SOURCE 86 /* SPI4, level */
#define ICACHE_PRELOAD_INTR_SOURCE 87 /* ICache preload operation, level */
#define DCACHE_PRELOAD_INTR_SOURCE 88 /* DCache preload operation, level */
#define APB_ADC_INTR_SOURCE 89 /* APB ADC, level */
#define CRYPTO_DMA_INTR_SOURCE 90 /* encrypted DMA, level */
#define CPU_PERI_ERROR_INTR_SOURCE 91 /* CPU peripherals error, level */
#define APB_PERI_ERROR_INTR_SOURCE 92 /* APB peripherals error, level */
#define DCACHE_SYNC_INTR_SOURCE 93 /* data cache sync done, level */
#define ICACHE_SYNC_INTR_SOURCE 94 /* instruction cache sync done, level */
#define MAX_INTR_SOURCE 95 /* total number of interrupt sources */
#endif
``` | /content/code_sandbox/include/zephyr/dt-bindings/interrupt-controller/esp32s2-xtensa-intmux.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,844 |
```objective-c
/*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_INTERRUPT_CONTROLLER_ITE_INTC_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_INTERRUPT_CONTROLLER_ITE_INTC_H_
#define IRQ_TYPE_NONE 0
#define IRQ_TYPE_EDGE_RISING 1
#define IRQ_TYPE_EDGE_FALLING 2
#define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)
#define IRQ_TYPE_LEVEL_HIGH 4
#define IRQ_TYPE_LEVEL_LOW 8
/* IRQ numbers of WUC */
/* Group 0 of INTC */
#define IT8XXX2_IRQ_WU20 1
#define IT8XXX2_IRQ_KBC_OBE 2
#define IT8XXX2_IRQ_SMB_D 4
#define IT8XXX2_IRQ_WKINTD 5
#define IT8XXX2_IRQ_WU23 6
/* Group 1 */
#define IT8XXX2_IRQ_SMB_A 9
#define IT8XXX2_IRQ_SMB_B 10
#define IT8XXX2_IRQ_WU26 12
#define IT8XXX2_IRQ_WKINTC 13
#define IT8XXX2_IRQ_WU25 14
/* Group 2 */
#define IT8XXX2_IRQ_SMB_C 16
#define IT8XXX2_IRQ_WU24 17
#define IT8XXX2_IRQ_WU22 21
#define IT8XXX2_IRQ_USB 23
/* Group 3 */
#define IT8XXX2_IRQ_KBC_IBF 24
#define IT8XXX2_IRQ_PMC1_IBF 25
#define IT8XXX2_IRQ_PMC2_IBF 27
#define IT8XXX2_IRQ_TIMER1 30
#define IT8XXX2_IRQ_WU21 31
/* Group 5 */
#define IT8XXX2_IRQ_WU50 40
#define IT8XXX2_IRQ_WU51 41
#define IT8XXX2_IRQ_WU52 42
#define IT8XXX2_IRQ_WU53 43
#define IT8XXX2_IRQ_WU54 44
#define IT8XXX2_IRQ_WU55 45
#define IT8XXX2_IRQ_WU56 46
#define IT8XXX2_IRQ_WU57 47
/* Group 6 */
#define IT8XXX2_IRQ_WU60 48
#define IT8XXX2_IRQ_WU61 49
#define IT8XXX2_IRQ_WU62 50
#define IT8XXX2_IRQ_WU63 51
#define IT8XXX2_IRQ_WU64 52
#define IT8XXX2_IRQ_WU65 53
#define IT8XXX2_IRQ_WU66 54
#define IT8XXX2_IRQ_WU67 55
/* Group 7 */
#define IT8XXX2_IRQ_TIMER2 58
/* Group 9 */
#define IT8XXX2_IRQ_WU70 72
#define IT8XXX2_IRQ_WU71 73
#define IT8XXX2_IRQ_WU72 74
#define IT8XXX2_IRQ_WU73 75
#define IT8XXX2_IRQ_WU74 76
#define IT8XXX2_IRQ_WU75 77
#define IT8XXX2_IRQ_WU76 78
#define IT8XXX2_IRQ_WU77 79
/* Group 10 */
#define IT8XXX2_IRQ_TIMER8 80
#define IT8XXX2_IRQ_WU88 85
#define IT8XXX2_IRQ_WU89 86
#define IT8XXX2_IRQ_WU90 87
/* Group 11 */
#define IT8XXX2_IRQ_WU80 88
#define IT8XXX2_IRQ_WU81 89
#define IT8XXX2_IRQ_WU82 90
#define IT8XXX2_IRQ_WU83 91
#define IT8XXX2_IRQ_WU84 92
#define IT8XXX2_IRQ_WU85 93
#define IT8XXX2_IRQ_WU86 94
#define IT8XXX2_IRQ_WU87 95
/* Group 12 */
#define IT8XXX2_IRQ_WU91 96
#define IT8XXX2_IRQ_WU92 97
#define IT8XXX2_IRQ_WU93 98
#define IT8XXX2_IRQ_WU94 99
#define IT8XXX2_IRQ_WU95 100
#define IT8XXX2_IRQ_WU96 101
#define IT8XXX2_IRQ_WU97 102
#define IT8XXX2_IRQ_WU98 103
/* Group 13 */
#define IT8XXX2_IRQ_WU99 104
#define IT8XXX2_IRQ_WU100 105
#define IT8XXX2_IRQ_WU101 106
#define IT8XXX2_IRQ_WU102 107
#define IT8XXX2_IRQ_WU103 108
#define IT8XXX2_IRQ_WU104 109
#define IT8XXX2_IRQ_WU105 110
#define IT8XXX2_IRQ_WU106 111
/* Group 14 */
#define IT8XXX2_IRQ_WU107 112
#define IT8XXX2_IRQ_WU108 113
#define IT8XXX2_IRQ_WU109 114
#define IT8XXX2_IRQ_WU110 115
#define IT8XXX2_IRQ_WU111 116
#define IT8XXX2_IRQ_WU112 117
#define IT8XXX2_IRQ_WU113 118
#define IT8XXX2_IRQ_WU114 119
/* Group 15 */
#define IT8XXX2_IRQ_WU115 120
#define IT8XXX2_IRQ_WU116 121
#define IT8XXX2_IRQ_WU117 122
#define IT8XXX2_IRQ_WU118 123
#define IT8XXX2_IRQ_WU119 124
#define IT8XXX2_IRQ_WU120 125
#define IT8XXX2_IRQ_WU121 126
#define IT8XXX2_IRQ_WU122 127
/* Group 16 */
#define IT8XXX2_IRQ_WU128 128
#define IT8XXX2_IRQ_WU129 129
#define IT8XXX2_IRQ_WU130 130
#define IT8XXX2_IRQ_WU131 131
#define IT8XXX2_IRQ_WU132 132
#define IT8XXX2_IRQ_WU133 133
#define IT8XXX2_IRQ_WU134 134
#define IT8XXX2_IRQ_WU135 135
/* Group 17 */
#define IT8XXX2_IRQ_WU136 136
#define IT8XXX2_IRQ_WU137 137
#define IT8XXX2_IRQ_WU138 138
#define IT8XXX2_IRQ_WU139 139
#define IT8XXX2_IRQ_WU140 140
#define IT8XXX2_IRQ_WU141 141
#define IT8XXX2_IRQ_WU142 142
#define IT8XXX2_IRQ_WU143 143
/* Group 18 */
#define IT8XXX2_IRQ_WU123 144
#define IT8XXX2_IRQ_WU124 145
#define IT8XXX2_IRQ_WU125 146
#define IT8XXX2_IRQ_WU126 147
#define IT8XXX2_IRQ_V_CMP 151
/* Group 19 */
#define IT8XXX2_IRQ_SMB_E 152
#define IT8XXX2_IRQ_SMB_F 153
#define IT8XXX2_IRQ_TIMER3 155
#define IT8XXX2_IRQ_TIMER4 156
#define IT8XXX2_IRQ_TIMER5 157
#define IT8XXX2_IRQ_TIMER6 158
#define IT8XXX2_IRQ_TIMER7 159
/* Group 20 */
#define IT8XXX2_IRQ_ESPI 162
#define IT8XXX2_IRQ_ESPI_VW 163
#define IT8XXX2_IRQ_PCH_P80 164
#define IT8XXX2_IRQ_USBPD0 165
#define IT8XXX2_IRQ_USBPD1 166
/* Group 21 */
#define IT8XXX2_IRQ_USBPD2 174
/* Group 22 */
#define IT8XXX2_IRQ_WU40 176
#define IT8XXX2_IRQ_WU45 177
#define IT8XXX2_IRQ_WU46 178
#define IT8XXX2_IRQ_WU144 179
#define IT8XXX2_IRQ_WU145 180
#define IT8XXX2_IRQ_WU146 181
#define IT8XXX2_IRQ_WU147 182
#define IT8XXX2_IRQ_WU148 183
/* Group 23 */
#define IT8XXX2_IRQ_WU149 184
#define IT8XXX2_IRQ_WU150 185
#define IT8XXX2_IRQ_COUNT (CONFIG_NUM_IRQS + 1)
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_INTERRUPT_CONTROLLER_ITE_INTC_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/interrupt-controller/ite-intc.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,972 |
```objective-c
/*
*
*/
#ifndef your_sha256_hash_
#define your_sha256_hash_
#define WIFI_MAC_INTR_SOURCE 0
#define WIFI_MAC_NMI_SOURCE 1
#define WIFI_PWR_INTR_SOURCE 2
#define WIFI_BB_INTR_SOURCE 3
#define BT_MAC_INTR_SOURCE 4
#define BT_BB_INTR_SOURCE 5
#define BT_BB_NMI_SOURCE 6
#define RWBT_INTR_SOURCE 7
#define RWBLE_INTR_SOURCE 8
#define RWBT_NMI_SOURCE 9
#define RWBLE_NMI_SOURCE 10
#define I2C_MASTER_SOURCE 11
#define SLC0_INTR_SOURCE 12
#define SLC1_INTR_SOURCE 13
#define APB_CTRL_INTR_SOURCE 14
#define UHCI0_INTR_SOURCE 15
#define GPIO_INTR_SOURCE 16
#define GPIO_NMI_SOURCE 17
#define SPI1_INTR_SOURCE 18
#define SPI2_INTR_SOURCE 19
#define I2S1_INTR_SOURCE 20
#define UART0_INTR_SOURCE 21
#define UART1_INTR_SOURCE 22
#define LEDC_INTR_SOURCE 23
#define EFUSE_INTR_SOURCE 24
#define TWAI_INTR_SOURCE 25
#define USB_INTR_SOURCE 26
#define RTC_CORE_INTR_SOURCE 27
#define RMT_INTR_SOURCE 28
#define I2C_EXT0_INTR_SOURCE 29
#define TIMER1_INTR_SOURCE 30
#define TIMER2_INTR_SOURCE 31
#define TG0_T0_LEVEL_INTR_SOURCE 32
#define TG0_WDT_LEVEL_INTR_SOURCE 33
#define TG1_T0_LEVEL_INTR_SOURCE 34
#define TG1_WDT_LEVEL_INTR_SOURCE 35
#define CACHE_IA_INTR_SOURCE 36
#define SYSTIMER_TARGET0_EDGE_INTR_SOURCE 37
#define SYSTIMER_TARGET1_EDGE_INTR_SOURCE 38
#define SYSTIMER_TARGET2_EDGE_INTR_SOURCE 39
#define SPI_MEM_REJECT_CACHE_INTR_SOURCE 40
#define ICACHE_PRELOAD0_INTR_SOURCE 41
#define ICACHE_SYNC0_INTR_SOURCE 42
#define APB_ADC_INTR_SOURCE 43
#define DMA_CH0_INTR_SOURCE 44
#define DMA_CH1_INTR_SOURCE 45
#define DMA_CH2_INTR_SOURCE 46
#define RSA_INTR_SOURCE 47
#define AES_INTR_SOURCE 48
#define SHA_INTR_SOURCE 49
#define FROM_CPU_INTR0_SOURCE 50
#define FROM_CPU_INTR1_SOURCE 51
#define FROM_CPU_INTR2_SOURCE 52
#define FROM_CPU_INTR3_SOURCE 53
#define ASSIST_DEBUG_INTR_SOURCE 54
#define DMA_APBPERI_PMS_INTR_SOURCE 55
#define CORE0_IRAM0_PMS_INTR_SOURCE 56
#define CORE0_DRAM0_PMS_INTR_SOURCE 57
#define CORE0_PIF_PMS_INTR_SOURCE 58
#define CORE0_PIF_PMS_SIZE_INTR_SOURCE 59
#define BAK_PMS_VIOLATE_INTR_SOURCE 60
#define CACHE_CORE0_ACS_INTR_SOURCE 61
#endif
``` | /content/code_sandbox/include/zephyr/dt-bindings/interrupt-controller/esp-esp32c3-intmux.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 658 |
```objective-c
/*
*
*/
#ifndef your_sha256_hashNTMUX_H_
#define your_sha256_hashNTMUX_H_
#define WIFI_MAC_INTR_SOURCE 0 /* interrupt of WiFi MAC, level*/
#define WIFI_MAC_NMI_SOURCE 1 /* interrupt of WiFi MAC, NMI */
#define WIFI_PWR_INTR_SOURCE 2
#define WIFI_BB_INTR_SOURCE 3 /* interrupt of WiFi BB, level*/
#define BT_MAC_INTR_SOURCE 4 /* will be cancelled*/
#define BT_BB_INTR_SOURCE 5 /* interrupt of BT BB, level*/
#define BT_BB_NMI_SOURCE 6 /* interrupt of BT BB, NMI*/
#define RWBT_INTR_SOURCE 7 /* interrupt of RWBT, level*/
#define RWBLE_INTR_SOURCE 8 /* interrupt of RWBLE, level*/
#define RWBT_NMI_SOURCE 9 /* interrupt of RWBT, NMI*/
#define RWBLE_NMI_SOURCE 10 /* interrupt of RWBLE, NMI*/
#define I2C_MASTER_SOURCE 11 /* interrupt of I2C Master, level*/
#define SLC0_INTR_SOURCE 12 /* interrupt of SLC0, level*/
#define SLC1_INTR_SOURCE 13 /* interrupt of SLC1, level*/
#define UHCI0_INTR_SOURCE 14 /* interrupt of UHCI0, level*/
#define UHCI1_INTR_SOURCE 15 /* interrupt of UHCI1, level*/
#define GPIO_INTR_SOURCE 16 /* interrupt of GPIO, level*/
#define GPIO_NMI_SOURCE 17 /* interrupt of GPIO, NMI*/
#define GPIO_INTR_SOURCE2 18 /* interrupt of GPIO, level*/
#define GPIO_NMI_SOURCE2 19 /* interrupt of GPIO, NMI*/
#define SPI1_INTR_SOURCE 20 /* interrupt of SPI1, level*/
#define SPI2_INTR_SOURCE 21 /* interrupt of SPI2, level*/
#define SPI3_INTR_SOURCE 22 /* interrupt of SPI3, level*/
#define LCD_CAM_INTR_SOURCE 24 /* interrupt of LCD camera, level*/
#define I2S0_INTR_SOURCE 25 /* interrupt of I2S0, level*/
#define I2S1_INTR_SOURCE 26 /* interrupt of I2S1, level*/
#define UART0_INTR_SOURCE 27 /* interrupt of UART0, level*/
#define UART1_INTR_SOURCE 28 /* interrupt of UART1, level*/
#define UART2_INTR_SOURCE 29 /* interrupt of UART2, level*/
#define SDIO_HOST_INTR_SOURCE 30 /* interrupt of SD/SDIO/MMC HOST, level*/
#define PWM0_INTR_SOURCE 31 /* interrupt of PWM0, level, Reserved*/
#define PWM1_INTR_SOURCE 32 /* interrupt of PWM1, level, Reserved*/
#define LEDC_INTR_SOURCE 35 /* interrupt of LED PWM, level*/
#define EFUSE_INTR_SOURCE 36 /* interrupt of efuse, level, not likely to use*/
#define TWAI_INTR_SOURCE 37 /* interrupt of can, level*/
#define USB_INTR_SOURCE 38 /* interrupt of USB, level*/
#define RTC_CORE_INTR_SOURCE 39 /* interrupt of rtc core and watchdog, level*/
#define RMT_INTR_SOURCE 40 /* interrupt of remote controller, level*/
#define PCNT_INTR_SOURCE 41 /* interrupt of pulse count, level*/
#define I2C_EXT0_INTR_SOURCE 42 /* interrupt of I2C controller1, level*/
#define I2C_EXT1_INTR_SOURCE 43 /* interrupt of I2C controller0, level*/
#define SPI2_DMA_INTR_SOURCE 44 /* interrupt of SPI2 DMA, level*/
#define SPI3_DMA_INTR_SOURCE 45 /* interrupt of SPI3 DMA, level*/
#define WDT_INTR_SOURCE 47 /* will be cancelled*/
#define TIMER1_INTR_SOURCE 48
#define TIMER2_INTR_SOURCE 49
#define TG0_T0_LEVEL_INTR_SOURCE 50 /* interrupt of TIMER_GROUP0, TIMER0, EDGE*/
#define TG0_T1_LEVEL_INTR_SOURCE 51 /* interrupt of TIMER_GROUP0, TIMER1, EDGE*/
#define TG0_WDT_LEVEL_INTR_SOURCE 52 /* interrupt of TIMER_GROUP0, WATCH DOG, EDGE*/
#define TG1_T0_LEVEL_INTR_SOURCE 53 /* interrupt of TIMER_GROUP1, TIMER0, EDGE*/
#define TG1_T1_LEVEL_INTR_SOURCE 54 /* interrupt of TIMER_GROUP1, TIMER1, EDGE*/
#define TG1_WDT_LEVEL_INTR_SOURCE 55 /* interrupt of TIMER_GROUP1, WATCHDOG, EDGE*/
#define CACHE_IA_INTR_SOURCE 56 /* interrupt of Cache Invalid Access, LEVEL*/
#define SYSTIMER_TARGET0_EDGE_INTR_SOURCE 57 /* interrupt of system timer 0, EDGE*/
#define SYSTIMER_TARGET1_EDGE_INTR_SOURCE 58 /* interrupt of system timer 1, EDGE*/
#define SYSTIMER_TARGET2_EDGE_INTR_SOURCE 59 /* interrupt of system timer 2, EDGE*/
#define SPI_MEM_REJECT_CACHE_INTR_SOURCE 60 /* interrupt of SPI0/SPI1 Cache/Rejected, LEVEL*/
#define DCACHE_PRELOAD0_INTR_SOURCE 61 /* interrupt of DCache preload operation, LEVEL*/
#define ICACHE_PRELOAD0_INTR_SOURCE 62 /* interrupt of ICache perload operation, LEVEL*/
#define DCACHE_SYNC0_INTR_SOURCE 63 /* interrupt of data cache sync done, LEVEL*/
#define ICACHE_SYNC0_INTR_SOURCE 64 /* interrupt of instr. cache sync done, LEVEL*/
#define APB_ADC_INTR_SOURCE 65 /* interrupt of APB ADC, LEVEL*/
#define DMA_IN_CH0_INTR_SOURCE 66 /* interrupt of general DMA RX channel 0, LEVEL*/
#define DMA_IN_CH1_INTR_SOURCE 67 /* interrupt of general DMA RX channel 1, LEVEL*/
#define DMA_IN_CH2_INTR_SOURCE 68 /* interrupt of general DMA RX channel 2, LEVEL*/
#define DMA_IN_CH3_INTR_SOURCE 69 /* interrupt of general DMA RX channel 3, LEVEL*/
#define DMA_IN_CH4_INTR_SOURCE 70 /* interrupt of general DMA RX channel 4, LEVEL*/
#define DMA_OUT_CH0_INTR_SOURCE 71 /* interrupt of general DMA TX channel 0, LEVEL*/
#define DMA_OUT_CH1_INTR_SOURCE 72 /* interrupt of general DMA TX channel 1, LEVEL*/
#define DMA_OUT_CH2_INTR_SOURCE 73 /* interrupt of general DMA TX channel 2, LEVEL*/
#define DMA_OUT_CH3_INTR_SOURCE 74 /* interrupt of general DMA TX channel 3, LEVEL*/
#define DMA_OUT_CH4_INTR_SOURCE 75 /* interrupt of general DMA TX channel 4, LEVEL*/
#define RSA_INTR_SOURCE 76 /* interrupt of RSA accelerator, level*/
#define AES_INTR_SOURCE 77 /* interrupt of AES accelerator, level*/
#define SHA_INTR_SOURCE 78 /* interrupt of SHA accelerator, level*/
#define FROM_CPU_INTR0_SOURCE 79 /* interrupt0 generated from a CPU, level*/
#define FROM_CPU_INTR1_SOURCE 80 /* interrupt1 generated from a CPU, level*/
#define FROM_CPU_INTR2_SOURCE 81 /* interrupt2 generated from a CPU, level*/
#define FROM_CPU_INTR3_SOURCE 82 /* interrupt3 generated from a CPU, level*/
#define ASSIST_DEBUG_INTR_SOURCE 83 /* interrupt of Assist debug module, LEVEL*/
#define DMA_APBPERI_PMS_INTR_SOURCE 84
#define CORE0_IRAM0_PMS_INTR_SOURCE 85
#define CORE0_DRAM0_PMS_INTR_SOURCE 86
#define CORE0_PIF_PMS_INTR_SOURCE 87
#define CORE0_PIF_PMS_SIZE_INTR_SOURCE 88
#define CORE1_IRAM0_PMS_INTR_SOURCE 89
#define CORE1_DRAM0_PMS_INTR_SOURCE 90
#define CORE1_PIF_PMS_INTR_SOURCE 91
#define CORE1_PIF_PMS_SIZE_INTR_SOURCE 92
#define BACKUP_PMS_VIOLATE_INTR_SOURCE 93
#define CACHE_CORE0_ACS_INTR_SOURCE 94
#define CACHE_CORE1_ACS_INTR_SOURCE 95
#define USB_SERIAL_JTAG_INTR_SOURCE 96
#define PREI_BACKUP_INTR_SOURCE 97
#define DMA_EXTMEM_REJECT_SOURCE 98
#define MAX_INTR_SOURCE 99 /* number of interrupt sources */
#endif
``` | /content/code_sandbox/include/zephyr/dt-bindings/interrupt-controller/esp32s3-xtensa-intmux.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,704 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_INTERRUPT_CONTROLLER_INTEL_IOAPIC_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_INTERRUPT_CONTROLLER_INTEL_IOAPIC_H_
#define IRQ_TYPE_LEVEL 0x00008000
#define IRQ_TYPE_EDGE 0x00000000
#define IRQ_TYPE_LOW 0x00002000
#define IRQ_TYPE_HIGH 0x00000000
#define IRQ_DELIVERY_LOWEST 0x00000100
#define IRQ_DELIVERY_FIXED 0x00000000
/*
* for most device interrupts, lowest priority delivery is preferred
* since this ensures only one CPU gets the interrupt in SMP systems.
*/
#define IRQ_TYPE_LOWEST_EDGE_RISING (IRQ_DELIVERY_LOWEST | IRQ_TYPE_EDGE | IRQ_TYPE_HIGH)
#define IRQ_TYPE_LOWEST_EDGE_FALLING (IRQ_DELIVERY_LOWEST | IRQ_TYPE_EDGE | IRQ_TYPE_LOW)
#define IRQ_TYPE_LOWEST_LEVEL_HIGH (IRQ_DELIVERY_LOWEST | IRQ_TYPE_LEVEL | IRQ_TYPE_HIGH)
#define IRQ_TYPE_LOWEST_LEVEL_LOW (IRQ_DELIVERY_LOWEST | IRQ_TYPE_LEVEL | IRQ_TYPE_LOW)
/* for interrupts that want to be delivered to all CPUs, e.g. HPET */
#define IRQ_TYPE_FIXED_EDGE_RISING (IRQ_DELIVERY_FIXED | IRQ_TYPE_EDGE | IRQ_TYPE_HIGH)
#define IRQ_TYPE_FIXED_EDGE_FALLING (IRQ_DELIVERY_FIXED | IRQ_TYPE_EDGE | IRQ_TYPE_LOW)
#define IRQ_TYPE_FIXED_LEVEL_HIGH (IRQ_DELIVERY_FIXED | IRQ_TYPE_LEVEL | IRQ_TYPE_HIGH)
#define IRQ_TYPE_FIXED_LEVEL_LOW (IRQ_DELIVERY_FIXED | IRQ_TYPE_LEVEL | IRQ_TYPE_LOW)
#endif
``` | /content/code_sandbox/include/zephyr/dt-bindings/interrupt-controller/intel-ioapic.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 357 |
```objective-c
/*
*
*/
#ifndef your_sha256_hash_
#define your_sha256_hash_
/*
* Level 1 IRQ offsets for each INTMUX channel.
*/
#define INTMUX_CH0_IRQ 24
#define INTMUX_CH1_IRQ 25
#define INTMUX_CH2_IRQ 26
#define INTMUX_CH3_IRQ 27
#define INTMUX_CH4_IRQ 28
#define INTMUX_CH5_IRQ 29
#define INTMUX_CH6_IRQ 30
#define INTMUX_CH7_IRQ 31
#endif
``` | /content/code_sandbox/include/zephyr/dt-bindings/interrupt-controller/openisa-intmux.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 104 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_SPI_SPI_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_SPI_SPI_H_
/**
* @brief SPI Interface
* @defgroup spi_interface SPI Interface
* @ingroup io_interfaces
* @{
*/
/**
* @name SPI duplex mode
* @{
*
* Some controllers support half duplex transfer, which results in 3-wire usage.
* By default, full duplex will prevail.
*/
#define SPI_FULL_DUPLEX (0U << 11)
#define SPI_HALF_DUPLEX (1U << 11)
/** @} */
/**
* @name SPI Frame Format
* @{
*
* 2 frame formats are exposed: Motorola and TI.
* The main difference is the behavior of the CS line. In Motorola it stays
* active the whole transfer. In TI, it's active only one serial clock period
* prior to actually make the transfer, it is thus inactive during the transfer,
* which ends when the clocks ends as well.
* By default, as it is the most commonly used, the Motorola frame format
* will prevail.
*/
#define SPI_FRAME_FORMAT_MOTOROLA (0U << 15)
#define SPI_FRAME_FORMAT_TI (1U << 15)
/** @} */
/**
* @}
*/
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_SPI_SPI_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/spi/spi.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 283 |
```objective-c
/*
*
*/
#ifndef _INCLUDE_ZEPHYR_DT_BINDINGS_DAI_ESAI_H_
#define _INCLUDE_ZEPHYR_DT_BINDINGS_DAI_ESAI_H_
/* ESAI pin IDs
* the values of these macros are meant to match
* the bit position from PCRC/PRRC's PC/PDC associated
* with each of these pins.
*/
#define ESAI_PIN_SCKR 0
#define ESAI_PIN_FSR 1
#define ESAI_PIN_HCKR 2
#define ESAI_PIN_SCKT 3
#define ESAI_PIN_FST 4
#define ESAI_PIN_HCKT 5
#define ESAI_PIN_SDO5_SDI0 6
#define ESAI_PIN_SDO4_SDI1 7
#define ESAI_PIN_SDO3_SDI2 8
#define ESAI_PIN_SDO2_SDI3 9
#define ESAI_PIN_SDO1 10
#define ESAI_PIN_SDO0 11
/* ESAI pin modes
* the values of these macros are set according to
* the following table:
*
* PDC = 0, PC = 0 => DISCONNECTED (0)
* PDC = 0, PC = 1 => GPIO INPUT (1)
* PDC = 1, PC = 0 => GPIO OUTPUT (2)
* PDC = 1, PC = 1 => ESAI (3)
*/
#define ESAI_PIN_DISCONNECTED 0
#define ESAI_PIN_GPIO_INPUT 1
#define ESAI_PIN_GPIO_OUTPUT 2
#define ESAI_PIN_ESAI 3
/* ESAI clock IDs */
#define ESAI_CLOCK_HCKT 0
#define ESAI_CLOCK_HCKR 1
#define ESAI_CLOCK_SCKR 2
#define ESAI_CLOCK_SCKT 3
#define ESAI_CLOCK_FSR 4
#define ESAI_CLOCK_FST 5
/* ESAI clock directions */
#define ESAI_CLOCK_INPUT 0
#define ESAI_CLOCK_OUTPUT 1
#endif /* _INCLUDE_ZEPHYR_DT_BINDINGS_DAI_ESAI_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/dai/esai.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 440 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_NPCK_FIU_QSPI_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_NPCK_FIU_QSPI_H_
#include <zephyr/dt-bindings/dt-util.h>
/* Software controlled Chip-Select number for UMA transactions */
#define NPCX_QSPI_SW_CS0 BIT(0)
#define NPCX_QSPI_SW_CS1 BIT(1)
#define NPCX_QSPI_SW_CS2 BIT(2)
#define NPCX_QSPI_SW_CS_MASK (NPCX_QSPI_SW_CS0 | NPCX_QSPI_SW_CS1 | NPCX_QSPI_SW_CS2)
/* Supported flash interfaces for UMA transactions */
#define NPCX_QSPI_SEC_FLASH_SL BIT(4)
/* Supported read mode for Direct Read Access */
#define NPCX_RD_MODE_NORMAL 0
#define NPCX_RD_MODE_FAST 1
#define NPCX_RD_MODE_FAST_DUAL 3
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_NPCK_FIU_QSPI_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/flash_controller/npcx_fiu_qspi.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 218 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_XSPI_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_XSPI_H_
/**
* @name XSPI definition for the xSPI peripherals
* Note that
* SPI mode impossible in STR transfer rate only
*/
/* XSPI mode operating on 1 line, 2 lines, 4 lines or 8 lines */
/* 1 Cmd Line, 1 Address Line and 1 Data Line */
#define XSPI_SPI_MODE 1
/* 2 Cmd Lines, 2 Address Lines and 2 Data Lines */
#define XSPI_DUAL_MODE 2
/* 4 Cmd Lines, 4 Address Lines and 4 Data Lines */
#define XSPI_QUAD_MODE 4
/* 8 Cmd Lines, 8 Address Lines and 8 Data Lines */
#define XSPI_OCTO_MODE 8
/* XSPI mode operating on Single or Double Transfer Rate */
/* Single Transfer Rate */
#define XSPI_STR_TRANSFER 1
/* Double Transfer Rate */
#define XSPI_DTR_TRANSFER 2
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_XSPI_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/flash_controller/xspi.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 242 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_IMX8QXP_PINCTRL_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_IMX8QXP_PINCTRL_H_
/* values for pad field */
#define SC_P_SAI1_RXD 86
#define SC_P_SAI1_RXC 87
#define SC_P_SAI1_RXFS 88
#define SC_P_SPI0_CS1 96
#define SC_P_UART2_TX 113
#define SC_P_UART2_RX 114
/* mux values */
#define IMX8QXP_DMA_LPUART2_RX_UART2_RX 0 /* UART2_RX ---> DMA_LPUART2_RX */
#define IMX8QXP_DMA_LPUART2_TX_UART2_TX 0 /* DMA_LPUART2_TX ---> UART2_TX */
#define IMX8QXP_ADMA_SAI1_TXFS_SAI1_RXFS 1 /* ADMA_SAI1_TXFS <---> SAI1_RXFS */
#define IMX8QXP_ADMA_SAI1_RXD_SAI1_RXD 0 /* ADMA_SAI1_RXD <--- SAI1_RXD */
#define IMX8QXP_ADMA_SAI1_TXC_SAI1_RXC 1 /* ADMA_SAI1_TXC <---> SAI1_RXC */
#define IMX8QXP_ADMA_SAI1_TXD_SPI0_CS1 2 /* ADMA_SAI1_TXD ---> SPI0_CS1 */
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_IMX8QXP_PINCTRL_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/imx8qxp-pinctrl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 336 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_OSPI_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_OSPI_H_
/**
* @name OSPI definition for the OctoSPI peripherals
* Note that the possible combination is
* SPI mode in STR transfer rate
* OPI mode in STR transfer rate
* OPI mode in DTR transfer rate
*/
/* OSPI mode operating on 1 line, 2 lines, 4 lines or 8 lines */
/* 1 Cmd Line, 1 Address Line and 1 Data Line */
#define OSPI_SPI_MODE 1
/* 2 Cmd Lines, 2 Address Lines and 2 Data Lines */
#define OSPI_DUAL_MODE 2
/* 4 Cmd Lines, 4 Address Lines and 4 Data Lines */
#define OSPI_QUAD_MODE 4
/* 8 Cmd Lines, 8 Address Lines and 8 Data Lines */
#define OSPI_OPI_MODE 8
/* OSPI mode operating on Single or Double Transfer Rate */
/* Single Transfer Rate */
#define OSPI_STR_TRANSFER 1
/* Double Transfer Rate */
#define OSPI_DTR_TRANSFER 2
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_OSPI_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/flash_controller/ospi.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 265 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_QUICKLOGIC_EOS_S3_PINCTRL_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_QUICKLOGIC_EOS_S3_PINCTRL_H_
#include <zephyr/dt-bindings/dt-util.h>
#define IO_MUX_REG_MAX_OFFSET 107
#define IO_MUX_MAX_PAD_NR 45
#define FUNC_SEL_UART_RX (77 << 13)
#define QUICKLOGIC_EOS_S3_PINMUX(pin, fun) (pin) (fun)
#define UART_TX_PAD44 QUICKLOGIC_EOS_S3_PINMUX(44, 0x3)
#define UART_RX_PAD45 QUICKLOGIC_EOS_S3_PINMUX(45, FUNC_SEL_UART_RX | BIT(2))
#define USB_PU_CTRL_PAD23 QUICKLOGIC_EOS_S3_PINMUX(23, 0x0)
#define USB_DN_PAD28 QUICKLOGIC_EOS_S3_PINMUX(28, 0x0)
#define USB_DP_PAD31 QUICKLOGIC_EOS_S3_PINMUX(31, 0x0)
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_QUICKLOGIC_EOS_S3_PINCTRL_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/quicklogic-eos-s3-pinctrl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 270 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_NPCX_PINCTRL_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_NPCX_PINCTRL_H_
/**
* @brief NPCX specific PIN configuration flag
*
* Pin configuration is coded with the following fields
* Reserved [ 0 : 31]
*/
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_NPCX_PINCTRL_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/npcx-pinctrl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 92 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_STM32_PINCTRL_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_STM32_PINCTRL_H_
#include <zephyr/dt-bindings/pinctrl/stm32-pinctrl-common.h>
/* Adapted from Linux: include/dt-bindings/pinctrl/stm32-pinfunc.h */
/**
* @brief Pin modes
*/
#define STM32_AF0 0x0
#define STM32_AF1 0x1
#define STM32_AF2 0x2
#define STM32_AF3 0x3
#define STM32_AF4 0x4
#define STM32_AF5 0x5
#define STM32_AF6 0x6
#define STM32_AF7 0x7
#define STM32_AF8 0x8
#define STM32_AF9 0x9
#define STM32_AF10 0xa
#define STM32_AF11 0xb
#define STM32_AF12 0xc
#define STM32_AF13 0xd
#define STM32_AF14 0xe
#define STM32_AF15 0xf
#define STM32_ANALOG 0x10
#define STM32_GPIO 0x11
/**
* @brief Macro to generate pinmux int using port, pin number and mode arguments
* This is inspired from Linux equivalent st,stm32f429-pinctrl binding
*/
#define STM32_MODE_SHIFT 0U
#define STM32_MODE_MASK 0x1FU
#define STM32_LINE_SHIFT 5U
#define STM32_LINE_MASK 0xFU
#define STM32_PORT_SHIFT 9U
#define STM32_PORT_MASK 0x1FU
/**
* @brief Pin configuration configuration bit field.
*
* Fields:
*
* - mode [ 0 : 4 ]
* - line [ 5 : 8 ]
* - port [ 9 : 13 ]
*
* @param port Port ('A'..'P')
* @param line Pin (0..15)
* @param mode Mode (ANALOG, GPIO_IN, ALTERNATE).
*/
#define STM32_PINMUX(port, line, mode) \
(((((port) - 'A') & STM32_PORT_MASK) << STM32_PORT_SHIFT) | \
(((line) & STM32_LINE_MASK) << STM32_LINE_SHIFT) | \
(((STM32_ ## mode) & STM32_MODE_MASK) << STM32_MODE_SHIFT))
/**
* @brief PIN configuration bitfield
*
* Pin configuration is coded with the following
* fields
* Alternate Functions [ 0 : 3 ]
* GPIO Mode [ 4 : 5 ]
* GPIO Output type [ 6 ]
* GPIO Speed [ 7 : 8 ]
* GPIO PUPD config [ 9 : 10 ]
* GPIO Output data [ 11 ]
*
*/
/* GPIO Mode */
#define STM32_MODER_INPUT_MODE (0x0 << STM32_MODER_SHIFT)
#define STM32_MODER_OUTPUT_MODE (0x1 << STM32_MODER_SHIFT)
#define STM32_MODER_ALT_MODE (0x2 << STM32_MODER_SHIFT)
#define STM32_MODER_ANALOG_MODE (0x3 << STM32_MODER_SHIFT)
#define STM32_MODER_MASK 0x3
#define STM32_MODER_SHIFT 4
/* GPIO Output type */
#define STM32_OTYPER_PUSH_PULL (0x0 << STM32_OTYPER_SHIFT)
#define STM32_OTYPER_OPEN_DRAIN (0x1 << STM32_OTYPER_SHIFT)
#define STM32_OTYPER_MASK 0x1
#define STM32_OTYPER_SHIFT 6
/* GPIO speed */
#define STM32_OSPEEDR_LOW_SPEED (0x0 << STM32_OSPEEDR_SHIFT)
#define STM32_OSPEEDR_MEDIUM_SPEED (0x1 << STM32_OSPEEDR_SHIFT)
#define STM32_OSPEEDR_HIGH_SPEED (0x2 << STM32_OSPEEDR_SHIFT)
#define STM32_OSPEEDR_VERY_HIGH_SPEED (0x3 << STM32_OSPEEDR_SHIFT)
#define STM32_OSPEEDR_MASK 0x3
#define STM32_OSPEEDR_SHIFT 7
/* GPIO High impedance/Pull-up/pull-down */
#define STM32_PUPDR_NO_PULL (0x0 << STM32_PUPDR_SHIFT)
#define STM32_PUPDR_PULL_UP (0x1 << STM32_PUPDR_SHIFT)
#define STM32_PUPDR_PULL_DOWN (0x2 << STM32_PUPDR_SHIFT)
#define STM32_PUPDR_MASK 0x3
#define STM32_PUPDR_SHIFT 9
/* GPIO plain output value */
#define STM32_ODR_0 (0x0 << STM32_ODR_SHIFT)
#define STM32_ODR_1 (0x1 << STM32_ODR_SHIFT)
#define STM32_ODR_MASK 0x1
#define STM32_ODR_SHIFT 11
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_STM32_PINCTRL_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/stm32-pinctrl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,125 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_TI_K3_PINCTRL_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_TI_K3_PINCTRL_H_
#define PULLUDEN_SHIFT 16
#define PULLTYPESEL_SHIFT 17
#define RXACTIVE_SHIFT 18
#define PULL_DISABLE (1 << PULLUDEN_SHIFT)
#define PULL_ENABLE (0 << PULLUDEN_SHIFT)
#define PULL_UP ((1 << PULLTYPESEL_SHIFT) | PULL_ENABLE)
#define PULL_DOWN ((0 << PULLTYPESEL_SHIFT) | PULL_ENABLE)
#define INPUT_ENABLE (1 << RXACTIVE_SHIFT)
#define INPUT_DISABLE (0 << RXACTIVE_SHIFT)
/* Only the following macros are intended be used in DTS files */
#define PIN_OUTPUT (INPUT_DISABLE | PULL_DISABLE)
#define PIN_OUTPUT_PULLUP (INPUT_DISABLE | PULL_UP)
#define PIN_OUTPUT_PULLDOWN (INPUT_DISABLE | PULL_DOWN)
#define PIN_INPUT (INPUT_ENABLE | PULL_DISABLE)
#define PIN_INPUT_PULLUP (INPUT_ENABLE | PULL_UP)
#define PIN_INPUT_PULLDOWN (INPUT_ENABLE | PULL_DOWN)
#define MUX_MODE_0 0
#define MUX_MODE_1 1
#define MUX_MODE_2 2
#define MUX_MODE_3 3
#define MUX_MODE_4 4
#define MUX_MODE_5 5
#define MUX_MODE_6 6
#define MUX_MODE_7 7
#define MUX_MODE_8 8
#define MUX_MODE_9 9
#define K3_PINMUX(offset, value, mux_mode) (((offset) & 0x1fff)) ((value) | (mux_mode))
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_TI_K3_PINCTRL_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/ti-k3-pinctrl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 402 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_XMC4XXX_PINCTRL_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_XMC4XXX_PINCTRL_H_
/* Bit Masks */
#define XMC4XXX_PORT_POS 0
#define XMC4XXX_PORT_MASK 0xf
#define XMC4XXX_PIN_POS 4
#define XMC4XXX_PIN_MASK 0xf
#define XMC4XXX_ALT_POS 8
#define XMC4XXX_ALT_MASK 0xf
#define XMC4XXX_PULL_DOWN_POS 12
#define XMC4XXX_PULL_DOWN_MASK 0x1
#define XMC4XXX_PULL_UP_POS 13
#define XMC4XXX_PULL_UP_MASK 0x1
#define XMC4XXX_PUSH_PULL_POS 14
#define XMC4XXX_PUSH_PULL_MASK 0x1
#define XMC4XXX_OPEN_DRAIN_POS 15
#define XMC4XXX_OPEN_DRAIN_MASK 0x1
#define XMC4XXX_OUT_HIGH_POS 16
#define XMC4XXX_OUT_HIGH_MASK 0x1
#define XMC4XXX_OUT_LOW_POS 17
#define XMC4XXX_OUT_LOW_MASK 0x1
#define XMC4XXX_INV_INPUT_POS 18
#define XMC4XXX_INV_INPUT_MASK 0x1
#define XMC4XXX_DRIVE_POS 19
#define XMC4XXX_DRIVE_MASK 0x7
#define XMC4XXX_HWCTRL_POS 22
#define XMC4XXX_HWCTRL_MASK 0x3
/* Setters and getters */
#define XMC4XXX_PINMUX_SET(port, pin, alt_fun) \
((port) << XMC4XXX_PORT_POS | (pin) << XMC4XXX_PIN_POS | (alt_fun) << XMC4XXX_ALT_POS)
#define XMC4XXX_PINMUX_GET_PORT(mx) ((mx >> XMC4XXX_PORT_POS) & XMC4XXX_PORT_MASK)
#define XMC4XXX_PINMUX_GET_PIN(mx) ((mx >> XMC4XXX_PIN_POS) & XMC4XXX_PIN_MASK)
#define XMC4XXX_PINMUX_GET_ALT(mx) ((mx >> XMC4XXX_ALT_POS) & XMC4XXX_ALT_MASK)
#define XMC4XXX_PINMUX_GET_PULL_DOWN(mx) ((mx >> XMC4XXX_PULL_DOWN_POS) & XMC4XXX_PULL_DOWN_MASK)
#define XMC4XXX_PINMUX_GET_PULL_UP(mx) ((mx >> XMC4XXX_PULL_UP_POS) & XMC4XXX_PULL_UP_MASK)
#define XMC4XXX_PINMUX_GET_PUSH_PULL(mx) ((mx >> XMC4XXX_PUSH_PULL_POS) & XMC4XXX_PUSH_PULL_MASK)
#define XMC4XXX_PINMUX_GET_OPEN_DRAIN(mx) ((mx >> XMC4XXX_OPEN_DRAIN_POS) & XMC4XXX_OPEN_DRAIN_MASK)
#define XMC4XXX_PINMUX_GET_OUT_HIGH(mx) ((mx >> XMC4XXX_OUT_HIGH_POS) & XMC4XXX_OUT_HIGH_MASK)
#define XMC4XXX_PINMUX_GET_OUT_LOW(mx) ((mx >> XMC4XXX_OUT_LOW_POS) & XMC4XXX_OUT_LOW_MASK)
#define XMC4XXX_PINMUX_GET_INV_INPUT(mx) ((mx >> XMC4XXX_INV_INPUT_POS) & XMC4XXX_INV_INPUT_MASK)
#define XMC4XXX_PINMUX_GET_DRIVE(mx) ((mx >> XMC4XXX_DRIVE_POS) & XMC4XXX_DRIVE_MASK)
#define XMC4XXX_PINMUX_GET_HWCTRL(mx) ((mx >> XMC4XXX_HWCTRL_POS) & XMC4XXX_HWCTRL_MASK)
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_XMC4XXX_PINCTRL_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/xmc4xxx-pinctrl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 823 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_B91_PINCTRL_COMMON_H_
#define ZEPHYR_B91_PINCTRL_COMMON_H_
/* IDs for GPIO functions */
#define B91_FUNC_A 0x00
#define B91_FUNC_B 0x01
#define B91_FUNC_C 0x02
/* IDs for GPIO Ports */
#define B91_PORT_A 0x00
#define B91_PORT_B 0x01
#define B91_PORT_C 0x02
#define B91_PORT_D 0x03
#define B91_PORT_E 0x04
/* IDs for GPIO Pins */
#define B91_PIN_0 0x01
#define B91_PIN_1 0x02
#define B91_PIN_2 0x04
#define B91_PIN_3 0x08
#define B91_PIN_4 0x10
#define B91_PIN_5 0x20
#define B91_PIN_6 0x40
#define B91_PIN_7 0x80
/* B91 pinctrl pull-up/down */
#define B91_PULL_NONE 0
#define B91_PULL_DOWN 2
#define B91_PULL_UP 3
/* Pin function positions */
#define B91_PIN_0_FUNC_POS 0x00
#define B91_PIN_1_FUNC_POS 0x02
#define B91_PIN_2_FUNC_POS 0x04
#define B91_PIN_3_FUNC_POS 0x06
#define B91_PIN_4_FUNC_POS 0x00
#define B91_PIN_5_FUNC_POS 0x02
#define B91_PIN_6_FUNC_POS 0x04
#define B91_PIN_7_FUNC_POS 0x06
/* B91 pin configuration bit field positions and masks */
#define B91_PULL_POS 19
#define B91_PULL_MSK 0x3
#define B91_FUNC_POS 16
#define B91_FUNC_MSK 0x3
#define B91_PORT_POS 8
#define B91_PORT_MSK 0xFF
#define B91_PIN_POS 0
#define B91_PIN_MSK 0xFFFF
#define B91_PIN_ID_MSK 0xFF
/* Setters and getters */
#define B91_PINMUX_SET(port, pin, func) ((func << B91_FUNC_POS) | \
(port << B91_PORT_POS) | \
(pin << B91_PIN_POS))
#define B91_PINMUX_GET_PULL(pinmux) ((pinmux >> B91_PULL_POS) & B91_PULL_MSK)
#define B91_PINMUX_GET_FUNC(pinmux) ((pinmux >> B91_FUNC_POS) & B91_FUNC_MSK)
#define B91_PINMUX_GET_PIN(pinmux) ((pinmux >> B91_PIN_POS) & B91_PIN_MSK)
#define B91_PINMUX_GET_PIN_ID(pinmux) ((pinmux >> B91_PIN_POS) & B91_PIN_ID_MSK)
#endif /* ZEPHYR_B91_PINCTRL_COMMON_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/b91-pinctrl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 655 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_ESP32_GPIO_SIGMAP_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_ESP32_GPIO_SIGMAP_H_
#define ESP_NOSIG ESP_SIG_INVAL
#define ESP_SPICLK_IN 0
#define ESP_SPICLK_OUT 0
#define ESP_SPIQ_IN 1
#define ESP_SPIQ_OUT 1
#define ESP_SPID_IN 2
#define ESP_SPID_OUT 2
#define ESP_SPIHD_IN 3
#define ESP_SPIHD_OUT 3
#define ESP_SPIWP_IN 4
#define ESP_SPIWP_OUT 4
#define ESP_SPICS0_IN 5
#define ESP_SPICS0_OUT 5
#define ESP_SPICS1_IN 6
#define ESP_SPICS1_OUT 6
#define ESP_SPICS2_IN 7
#define ESP_SPICS2_OUT 7
#define ESP_HSPICLK_IN 8
#define ESP_HSPICLK_OUT 8
#define ESP_HSPIQ_IN 9
#define ESP_HSPIQ_OUT 9
#define ESP_HSPID_IN 10
#define ESP_HSPID_OUT 10
#define ESP_HSPICS0_IN 11
#define ESP_HSPICS0_OUT 11
#define ESP_HSPIHD_IN 12
#define ESP_HSPIHD_OUT 12
#define ESP_HSPIWP_IN 13
#define ESP_HSPIWP_OUT 13
#define ESP_U0RXD_IN 14
#define ESP_U0TXD_OUT 14
#define ESP_U0CTS_IN 15
#define ESP_U0RTS_OUT 15
#define ESP_U0DSR_IN 16
#define ESP_U0DTR_OUT 16
#define ESP_U1RXD_IN 17
#define ESP_U1TXD_OUT 17
#define ESP_U1CTS_IN 18
#define ESP_U1RTS_OUT 18
#define ESP_I2CM_SCL_O 19
#define ESP_I2CM_SDA_I 20
#define ESP_I2CM_SDA_O 20
#define ESP_EXT_I2C_SCL_O 21
#define ESP_EXT_I2C_SDA_O 22
#define ESP_EXT_I2C_SDA_I 22
#define ESP_I2S0O_BCK_IN 23
#define ESP_I2S0O_BCK_OUT 23
#define ESP_I2S1O_BCK_IN 24
#define ESP_I2S1O_BCK_OUT 24
#define ESP_I2S0O_WS_IN 25
#define ESP_I2S0O_WS_OUT 25
#define ESP_I2S1O_WS_IN 26
#define ESP_I2S1O_WS_OUT 26
#define ESP_I2S0I_BCK_IN 27
#define ESP_I2S0I_BCK_OUT 27
#define ESP_I2S0I_WS_IN 28
#define ESP_I2S0I_WS_OUT 28
#define ESP_I2CEXT0_SCL_IN 29
#define ESP_I2CEXT0_SCL_OUT 29
#define ESP_I2CEXT0_SDA_IN 30
#define ESP_I2CEXT0_SDA_OUT 30
#define ESP_PWM0_SYNC0_IN 31
#define ESP_SDIO_TOHOST_INT_OUT 31
#define ESP_PWM0_SYNC1_IN 32
#define ESP_PWM0_OUT0A 32
#define ESP_PWM0_SYNC2_IN 33
#define ESP_PWM0_OUT0B 33
#define ESP_PWM0_F0_IN 34
#define ESP_PWM0_OUT1A 34
#define ESP_PWM0_F1_IN 35
#define ESP_PWM0_OUT1B 35
#define ESP_PWM0_F2_IN 36
#define ESP_PWM0_OUT2A 36
#define ESP_GPIO_BT_ACTIVE 37
#define ESP_PWM0_OUT2B 37
#define ESP_GPIO_BT_PRIORITY 38
#define ESP_PCNT_SIG_CH0_IN0 39
#define ESP_PCNT_SIG_CH1_IN0 40
#define ESP_GPIO_WLAN_ACTIVE 40
#define ESP_PCNT_CTRL_CH0_IN0 41
#define ESP_BB_DIAG0 41
#define ESP_PCNT_CTRL_CH1_IN0 42
#define ESP_BB_DIAG1 42
#define ESP_PCNT_SIG_CH0_IN1 43
#define ESP_BB_DIAG2 43
#define ESP_PCNT_SIG_CH1_IN1 44
#define ESP_BB_DIAG3 44
#define ESP_PCNT_CTRL_CH0_IN1 45
#define ESP_BB_DIAG4 45
#define ESP_PCNT_CTRL_CH1_IN1 46
#define ESP_BB_DIAG5 46
#define ESP_PCNT_SIG_CH0_IN2 47
#define ESP_BB_DIAG6 47
#define ESP_PCNT_SIG_CH1_IN2 48
#define ESP_BB_DIAG7 48
#define ESP_PCNT_CTRL_CH0_IN2 49
#define ESP_BB_DIAG8 49
#define ESP_PCNT_CTRL_CH1_IN2 50
#define ESP_BB_DIAG9 50
#define ESP_PCNT_SIG_CH0_IN3 51
#define ESP_BB_DIAG10 51
#define ESP_PCNT_SIG_CH1_IN3 52
#define ESP_BB_DIAG11 52
#define ESP_PCNT_CTRL_CH0_IN3 53
#define ESP_BB_DIAG12 53
#define ESP_PCNT_CTRL_CH1_IN3 54
#define ESP_BB_DIAG13 54
#define ESP_PCNT_SIG_CH0_IN4 55
#define ESP_BB_DIAG14 55
#define ESP_PCNT_SIG_CH1_IN4 56
#define ESP_BB_DIAG15 56
#define ESP_PCNT_CTRL_CH0_IN4 57
#define ESP_BB_DIAG16 57
#define ESP_PCNT_CTRL_CH1_IN4 58
#define ESP_BB_DIAG17 58
#define ESP_BB_DIAG18 59
#define ESP_BB_DIAG19 60
#define ESP_HSPICS1_IN 61
#define ESP_HSPICS1_OUT 61
#define ESP_HSPICS2_IN 62
#define ESP_HSPICS2_OUT 62
#define ESP_VSPICLK_IN 63
#define ESP_VSPICLK_OUT 63
#define ESP_VSPIQ_IN 64
#define ESP_VSPIQ_OUT 64
#define ESP_VSPID_IN 65
#define ESP_VSPID_OUT 65
#define ESP_VSPIHD_IN 66
#define ESP_VSPIHD_OUT 66
#define ESP_VSPIWP_IN 67
#define ESP_VSPIWP_OUT 67
#define ESP_VSPICS0_IN 68
#define ESP_VSPICS0_OUT 68
#define ESP_VSPICS1_IN 69
#define ESP_VSPICS1_OUT 69
#define ESP_VSPICS2_IN 70
#define ESP_VSPICS2_OUT 70
#define ESP_PCNT_SIG_CH0_IN5 71
#define ESP_LEDC_HS_SIG_OUT0 71
#define ESP_PCNT_SIG_CH1_IN5 72
#define ESP_LEDC_HS_SIG_OUT1 72
#define ESP_PCNT_CTRL_CH0_IN5 73
#define ESP_LEDC_HS_SIG_OUT2 73
#define ESP_PCNT_CTRL_CH1_IN5 74
#define ESP_LEDC_HS_SIG_OUT3 74
#define ESP_PCNT_SIG_CH0_IN6 75
#define ESP_LEDC_HS_SIG_OUT4 75
#define ESP_PCNT_SIG_CH1_IN6 76
#define ESP_LEDC_HS_SIG_OUT5 76
#define ESP_PCNT_CTRL_CH0_IN6 77
#define ESP_LEDC_HS_SIG_OUT6 77
#define ESP_PCNT_CTRL_CH1_IN6 78
#define ESP_LEDC_HS_SIG_OUT7 78
#define ESP_PCNT_SIG_CH0_IN7 79
#define ESP_LEDC_LS_SIG_OUT0 79
#define ESP_PCNT_SIG_CH1_IN7 80
#define ESP_LEDC_LS_SIG_OUT1 80
#define ESP_PCNT_CTRL_CH0_IN7 81
#define ESP_LEDC_LS_SIG_OUT2 81
#define ESP_PCNT_CTRL_CH1_IN7 82
#define ESP_LEDC_LS_SIG_OUT3 82
#define ESP_RMT_SIG_IN0 83
#define ESP_LEDC_LS_SIG_OUT4 83
#define ESP_RMT_SIG_IN1 84
#define ESP_LEDC_LS_SIG_OUT5 84
#define ESP_RMT_SIG_IN2 85
#define ESP_LEDC_LS_SIG_OUT6 85
#define ESP_RMT_SIG_IN3 86
#define ESP_LEDC_LS_SIG_OUT7 86
#define ESP_RMT_SIG_IN4 87
#define ESP_RMT_SIG_OUT0 87
#define ESP_RMT_SIG_IN5 88
#define ESP_RMT_SIG_OUT1 88
#define ESP_RMT_SIG_IN6 89
#define ESP_RMT_SIG_OUT2 89
#define ESP_RMT_SIG_IN7 90
#define ESP_RMT_SIG_OUT3 90
#define ESP_RMT_SIG_OUT4 91
#define ESP_RMT_SIG_OUT5 92
#define ESP_EXT_ADC_START 93
#define ESP_RMT_SIG_OUT6 93
#define ESP_TWAI_RX 94
#define ESP_CAN_RX ESP_TWAI_RX
#define ESP_RMT_SIG_OUT7 94
#define ESP_I2CEXT1_SCL_IN 95
#define ESP_I2CEXT1_SCL_OUT 95
#define ESP_I2CEXT1_SDA_IN 96
#define ESP_I2CEXT1_SDA_OUT 96
#define ESP_HOST_CARD_DETECT_N_1 97
#define ESP_HOST_CCMD_OD_PULLUP_EN_N 97
#define ESP_HOST_CARD_DETECT_N_2 98
#define ESP_HOST_RST_N_1 98
#define ESP_HOST_CARD_WRITE_PRT_1 99
#define ESP_HOST_RST_N_2 99
#define ESP_HOST_CARD_WRITE_PRT_2 100
#define ESP_GPIO_SD0_OUT 100
#define ESP_HOST_CARD_INT_N_1 101
#define ESP_GPIO_SD1_OUT 101
#define ESP_HOST_CARD_INT_N_2 102
#define ESP_GPIO_SD2_OUT 102
#define ESP_PWM1_SYNC0_IN 103
#define ESP_GPIO_SD3_OUT 103
#define ESP_PWM1_SYNC1_IN 104
#define ESP_GPIO_SD4_OUT 104
#define ESP_PWM1_SYNC2_IN 105
#define ESP_GPIO_SD5_OUT 105
#define ESP_PWM1_F0_IN 106
#define ESP_GPIO_SD6_OUT 106
#define ESP_PWM1_F1_IN 107
#define ESP_GPIO_SD7_OUT 107
#define ESP_PWM1_F2_IN 108
#define ESP_PWM1_OUT0A 108
#define ESP_PWM0_CAP0_IN 109
#define ESP_PWM1_OUT0B 109
#define ESP_PWM0_CAP1_IN 110
#define ESP_PWM1_OUT1A 110
#define ESP_PWM0_CAP2_IN 111
#define ESP_PWM1_OUT1B 111
#define ESP_PWM1_CAP0_IN 112
#define ESP_PWM1_OUT2A 112
#define ESP_PWM1_CAP1_IN 113
#define ESP_PWM1_OUT2B 113
#define ESP_PWM1_CAP2_IN 114
#define ESP_PWM2_OUT1H 114
#define ESP_PWM2_FLTA 115
#define ESP_PWM2_OUT1L 115
#define ESP_PWM2_FLTB 116
#define ESP_PWM2_OUT2H 116
#define ESP_PWM2_CAP1_IN 117
#define ESP_PWM2_OUT2L 117
#define ESP_PWM2_CAP2_IN 118
#define ESP_PWM2_OUT3H 118
#define ESP_PWM2_CAP3_IN 119
#define ESP_PWM2_OUT3L 119
#define ESP_PWM3_FLTA 120
#define ESP_PWM2_OUT4H 120
#define ESP_PWM3_FLTB 121
#define ESP_PWM2_OUT4L 121
#define ESP_PWM3_CAP1_IN 122
#define ESP_PWM3_CAP2_IN 123
#define ESP_TWAI_TX 123
#define ESP_CAN_TX ESP_TWAI_TX
#define ESP_PWM3_CAP3_IN 124
#define ESP_TWAI_BUS_OFF_ON 124
#define ESP_CAN_BUS_OFF_ON ESP_TWAI_BUS_OFF_ON
#define ESP_TWAI_CLKOUT 125
#define ESP_CAN_CLKOUT ESP_TWAI_CLKOUT
#define ESP_SPID4_IN 128
#define ESP_SPID4_OUT 128
#define ESP_SPID5_IN 129
#define ESP_SPID5_OUT 129
#define ESP_SPID6_IN 130
#define ESP_SPID6_OUT 130
#define ESP_SPID7_IN 131
#define ESP_SPID7_OUT 131
#define ESP_HSPID4_IN 132
#define ESP_HSPID4_OUT 132
#define ESP_HSPID5_IN 133
#define ESP_HSPID5_OUT 133
#define ESP_HSPID6_IN 134
#define ESP_HSPID6_OUT 134
#define ESP_HSPID7_IN 135
#define ESP_HSPID7_OUT 135
#define ESP_VSPID4_IN 136
#define ESP_VSPID4_OUT 136
#define ESP_VSPID5_IN 137
#define ESP_VSPID5_OUT 137
#define ESP_VSPID6_IN 138
#define ESP_VSPID6_OUT 138
#define ESP_VSPID7_IN 139
#define ESP_VSPID7_OUT 139
#define ESP_I2S0I_DATA_IN0 140
#define ESP_I2S0O_DATA_OUT0 140
#define ESP_I2S0I_DATA_IN1 141
#define ESP_I2S0O_DATA_OUT1 141
#define ESP_I2S0I_DATA_IN2 142
#define ESP_I2S0O_DATA_OUT2 142
#define ESP_I2S0I_DATA_IN3 143
#define ESP_I2S0O_DATA_OUT3 143
#define ESP_I2S0I_DATA_IN4 144
#define ESP_I2S0O_DATA_OUT4 144
#define ESP_I2S0I_DATA_IN5 145
#define ESP_I2S0O_DATA_OUT5 145
#define ESP_I2S0I_DATA_IN6 146
#define ESP_I2S0O_DATA_OUT6 146
#define ESP_I2S0I_DATA_IN7 147
#define ESP_I2S0O_DATA_OUT7 147
#define ESP_I2S0I_DATA_IN8 148
#define ESP_I2S0O_DATA_OUT8 148
#define ESP_I2S0I_DATA_IN9 149
#define ESP_I2S0O_DATA_OUT9 149
#define ESP_I2S0I_DATA_IN10 150
#define ESP_I2S0O_DATA_OUT10 150
#define ESP_I2S0I_DATA_IN11 151
#define ESP_I2S0O_DATA_OUT11 151
#define ESP_I2S0I_DATA_IN12 152
#define ESP_I2S0O_DATA_OUT12 152
#define ESP_I2S0I_DATA_IN13 153
#define ESP_I2S0O_DATA_OUT13 153
#define ESP_I2S0I_DATA_IN14 154
#define ESP_I2S0O_DATA_OUT14 154
#define ESP_I2S0I_DATA_IN15 155
#define ESP_I2S0O_DATA_OUT15 155
#define ESP_I2S0O_DATA_OUT16 156
#define ESP_I2S0O_DATA_OUT17 157
#define ESP_I2S0O_DATA_OUT18 158
#define ESP_I2S0O_DATA_OUT19 159
#define ESP_I2S0O_DATA_OUT20 160
#define ESP_I2S0O_DATA_OUT21 161
#define ESP_I2S0O_DATA_OUT22 162
#define ESP_I2S0O_DATA_OUT23 163
#define ESP_I2S1I_BCK_IN 164
#define ESP_I2S1I_BCK_OUT 164
#define ESP_I2S1I_WS_IN 165
#define ESP_I2S1I_WS_OUT 165
#define ESP_I2S1I_DATA_IN0 166
#define ESP_I2S1O_DATA_OUT0 166
#define ESP_I2S1I_DATA_IN1 167
#define ESP_I2S1O_DATA_OUT1 167
#define ESP_I2S1I_DATA_IN2 168
#define ESP_I2S1O_DATA_OUT2 168
#define ESP_I2S1I_DATA_IN3 169
#define ESP_I2S1O_DATA_OUT3 169
#define ESP_I2S1I_DATA_IN4 170
#define ESP_I2S1O_DATA_OUT4 170
#define ESP_I2S1I_DATA_IN5 171
#define ESP_I2S1O_DATA_OUT5 171
#define ESP_I2S1I_DATA_IN6 172
#define ESP_I2S1O_DATA_OUT6 172
#define ESP_I2S1I_DATA_IN7 173
#define ESP_I2S1O_DATA_OUT7 173
#define ESP_I2S1I_DATA_IN8 174
#define ESP_I2S1O_DATA_OUT8 174
#define ESP_I2S1I_DATA_IN9 175
#define ESP_I2S1O_DATA_OUT9 175
#define ESP_I2S1I_DATA_IN10 176
#define ESP_I2S1O_DATA_OUT10 176
#define ESP_I2S1I_DATA_IN11 177
#define ESP_I2S1O_DATA_OUT11 177
#define ESP_I2S1I_DATA_IN12 178
#define ESP_I2S1O_DATA_OUT12 178
#define ESP_I2S1I_DATA_IN13 179
#define ESP_I2S1O_DATA_OUT13 179
#define ESP_I2S1I_DATA_IN14 180
#define ESP_I2S1O_DATA_OUT14 180
#define ESP_I2S1I_DATA_IN15 181
#define ESP_I2S1O_DATA_OUT15 181
#define ESP_I2S1O_DATA_OUT16 182
#define ESP_I2S1O_DATA_OUT17 183
#define ESP_I2S1O_DATA_OUT18 184
#define ESP_I2S1O_DATA_OUT19 185
#define ESP_I2S1O_DATA_OUT20 186
#define ESP_I2S1O_DATA_OUT21 187
#define ESP_I2S1O_DATA_OUT22 188
#define ESP_I2S1O_DATA_OUT23 189
#define ESP_I2S0I_H_SYNC 190
#define ESP_PWM3_OUT1H 190
#define ESP_I2S0I_V_SYNC 191
#define ESP_PWM3_OUT1L 191
#define ESP_I2S0I_H_ENABLE 192
#define ESP_PWM3_OUT2H 192
#define ESP_I2S1I_H_SYNC 193
#define ESP_PWM3_OUT2L 193
#define ESP_I2S1I_V_SYNC 194
#define ESP_PWM3_OUT3H 194
#define ESP_I2S1I_H_ENABLE 195
#define ESP_PWM3_OUT3L 195
#define ESP_PWM3_OUT4H 196
#define ESP_PWM3_OUT4L 197
#define ESP_U2RXD_IN 198
#define ESP_U2TXD_OUT 198
#define ESP_U2CTS_IN 199
#define ESP_U2RTS_OUT 199
#define ESP_EMAC_MDC_I 200
#define ESP_EMAC_MDC_O 200
#define ESP_EMAC_MDI_I 201
#define ESP_EMAC_MDO_O 201
#define ESP_EMAC_CRS_I 202
#define ESP_EMAC_CRS_O 202
#define ESP_EMAC_COL_I 203
#define ESP_EMAC_COL_O 203
#define ESP_PCMFSYNC_IN 204
#define ESP_BT_AUDIO0_IRQ 204
#define ESP_PCMCLK_IN 205
#define ESP_BT_AUDIO1_IRQ 205
#define ESP_PCMDIN 206
#define ESP_BT_AUDIO2_IRQ 206
#define ESP_BLE_AUDIO0_IRQ 207
#define ESP_BLE_AUDIO1_IRQ 208
#define ESP_BLE_AUDIO2_IRQ 209
#define ESP_PCMFSYNC_OUT 210
#define ESP_PCMCLK_OUT 211
#define ESP_PCMDOUT 212
#define ESP_BLE_AUDIO_SYNC0_P 213
#define ESP_BLE_AUDIO_SYNC1_P 214
#define ESP_BLE_AUDIO_SYNC2_P 215
#define ESP_ANT_SEL0 216
#define ESP_ANT_SEL1 217
#define ESP_ANT_SEL2 218
#define ESP_ANT_SEL3 219
#define ESP_ANT_SEL4 220
#define ESP_ANT_SEL5 221
#define ESP_ANT_SEL6 222
#define ESP_ANT_SEL7 223
#define ESP_SIG_IN_FUNC224 224
#define ESP_SIG_IN_FUNC225 225
#define ESP_SIG_IN_FUNC226 226
#define ESP_SIG_IN_FUNC227 227
#define ESP_SIG_IN_FUNC228 228
#define ESP_SIG_GPIO_OUT 256
/* RTC-IO MUX */
#define ESP_ADC1_CH0 0
#define ESP_ADC1_CH1 1
#define ESP_ADC1_CH2 2
#define ESP_ADC1_CH3 3
#define ESP_ADC1_CH6 4
#define ESP_ADC1_CH7 5
#define ESP_ADC2_CH8 6
#define ESP_ADC2_CH9 7
#define ESP_DAC1_OUT 6
#define ESP_DAC2_OUT 7
#define ESP_ADC1_CH5 8
#define ESP_ADC1_CH4 9
#define ESP_ADC2_CH0 10
#define ESP_ADC2_CH1 11
#define ESP_ADC2_CH2 12
#define ESP_ADC2_CH3 13
#define ESP_ADC2_CH4 14
#define ESP_ADC2_CH5 15
#define ESP_ADC2_CH6 16
#define ESP_ADC2_CH7 17
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_ESP32_GPIO_SIGMAP_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/esp32-gpio-sigmap.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 5,035 |
```objective-c
/*
*
*/
#ifndef __RP2040_PINCTRL_H__
#define __RP2040_PINCTRL_H__
#define RP2_PINCTRL_GPIO_FUNC_XIP 0
#define RP2_PINCTRL_GPIO_FUNC_SPI 1
#define RP2_PINCTRL_GPIO_FUNC_UART 2
#define RP2_PINCTRL_GPIO_FUNC_I2C 3
#define RP2_PINCTRL_GPIO_FUNC_PWM 4
#define RP2_PINCTRL_GPIO_FUNC_SIO 5
#define RP2_PINCTRL_GPIO_FUNC_PIO0 6
#define RP2_PINCTRL_GPIO_FUNC_PIO1 7
#define RP2_PINCTRL_GPIO_FUNC_GPCK 8
#define RP2_PINCTRL_GPIO_FUNC_USB 9
#define RP2_PINCTRL_GPIO_FUNC_NULL 0xf
#define RP2_ALT_FUNC_POS 0
#define RP2_ALT_FUNC_MASK 0xf
#define RP2_PIN_NUM_POS 4
#define RP2_PIN_NUM_MASK 0x1f
#define RP2_GPIO_OVERRIDE_NORMAL 0
#define RP2_GPIO_OVERRIDE_INVERT 1
#define RP2_GPIO_OVERRIDE_LOW 2
#define RP2_GPIO_OVERRIDE_HIGH 3
#define RP2040_PINMUX(pin_num, alt_func) (pin_num << RP2_PIN_NUM_POS | \
alt_func << RP2_ALT_FUNC_POS)
#define UART0_TX_P0 RP2040_PINMUX(0, RP2_PINCTRL_GPIO_FUNC_UART)
#define UART0_RX_P1 RP2040_PINMUX(1, RP2_PINCTRL_GPIO_FUNC_UART)
#define UART0_CTS_P2 RP2040_PINMUX(2, RP2_PINCTRL_GPIO_FUNC_UART)
#define UART0_RTS_P3 RP2040_PINMUX(3, RP2_PINCTRL_GPIO_FUNC_UART)
#define UART1_TX_P4 RP2040_PINMUX(4, RP2_PINCTRL_GPIO_FUNC_UART)
#define UART1_RX_P5 RP2040_PINMUX(5, RP2_PINCTRL_GPIO_FUNC_UART)
#define UART1_CTS_P6 RP2040_PINMUX(6, RP2_PINCTRL_GPIO_FUNC_UART)
#define UART1_RTS_P7 RP2040_PINMUX(7, RP2_PINCTRL_GPIO_FUNC_UART)
#define UART1_TX_P8 RP2040_PINMUX(8, RP2_PINCTRL_GPIO_FUNC_UART)
#define UART1_RX_P9 RP2040_PINMUX(9, RP2_PINCTRL_GPIO_FUNC_UART)
#define UART1_CTS_P10 RP2040_PINMUX(10, RP2_PINCTRL_GPIO_FUNC_UART)
#define UART1_RTS_P11 RP2040_PINMUX(11, RP2_PINCTRL_GPIO_FUNC_UART)
#define UART0_TX_P12 RP2040_PINMUX(12, RP2_PINCTRL_GPIO_FUNC_UART)
#define UART0_RX_P13 RP2040_PINMUX(13, RP2_PINCTRL_GPIO_FUNC_UART)
#define UART0_CTS_P14 RP2040_PINMUX(14, RP2_PINCTRL_GPIO_FUNC_UART)
#define UART0_RTS_P15 RP2040_PINMUX(15, RP2_PINCTRL_GPIO_FUNC_UART)
#define UART0_TX_P16 RP2040_PINMUX(16, RP2_PINCTRL_GPIO_FUNC_UART)
#define UART0_RX_P17 RP2040_PINMUX(17, RP2_PINCTRL_GPIO_FUNC_UART)
#define UART0_CTS_P18 RP2040_PINMUX(18, RP2_PINCTRL_GPIO_FUNC_UART)
#define UART0_RTS_P19 RP2040_PINMUX(19, RP2_PINCTRL_GPIO_FUNC_UART)
#define UART1_TX_P20 RP2040_PINMUX(20, RP2_PINCTRL_GPIO_FUNC_UART)
#define UART1_RX_P21 RP2040_PINMUX(21, RP2_PINCTRL_GPIO_FUNC_UART)
#define UART1_CTS_P22 RP2040_PINMUX(22, RP2_PINCTRL_GPIO_FUNC_UART)
#define UART1_RTS_P23 RP2040_PINMUX(23, RP2_PINCTRL_GPIO_FUNC_UART)
#define UART1_TX_P24 RP2040_PINMUX(24, RP2_PINCTRL_GPIO_FUNC_UART)
#define UART1_RX_P25 RP2040_PINMUX(25, RP2_PINCTRL_GPIO_FUNC_UART)
#define UART1_CTS_P26 RP2040_PINMUX(26, RP2_PINCTRL_GPIO_FUNC_UART)
#define UART1_RTS_P27 RP2040_PINMUX(27, RP2_PINCTRL_GPIO_FUNC_UART)
#define UART0_TX_P28 RP2040_PINMUX(28, RP2_PINCTRL_GPIO_FUNC_UART)
#define UART0_RX_P29 RP2040_PINMUX(29, RP2_PINCTRL_GPIO_FUNC_UART)
#define I2C0_SDA_P0 RP2040_PINMUX(0, RP2_PINCTRL_GPIO_FUNC_I2C)
#define I2C0_SCL_P1 RP2040_PINMUX(1, RP2_PINCTRL_GPIO_FUNC_I2C)
#define I2C1_SDA_P2 RP2040_PINMUX(2, RP2_PINCTRL_GPIO_FUNC_I2C)
#define I2C1_SCL_P3 RP2040_PINMUX(3, RP2_PINCTRL_GPIO_FUNC_I2C)
#define I2C0_SDA_P4 RP2040_PINMUX(4, RP2_PINCTRL_GPIO_FUNC_I2C)
#define I2C0_SCL_P5 RP2040_PINMUX(5, RP2_PINCTRL_GPIO_FUNC_I2C)
#define I2C1_SDA_P6 RP2040_PINMUX(6, RP2_PINCTRL_GPIO_FUNC_I2C)
#define I2C1_SCL_P7 RP2040_PINMUX(7, RP2_PINCTRL_GPIO_FUNC_I2C)
#define I2C0_SDA_P8 RP2040_PINMUX(8, RP2_PINCTRL_GPIO_FUNC_I2C)
#define I2C0_SCL_P9 RP2040_PINMUX(9, RP2_PINCTRL_GPIO_FUNC_I2C)
#define I2C1_SDA_P10 RP2040_PINMUX(10, RP2_PINCTRL_GPIO_FUNC_I2C)
#define I2C1_SCL_P11 RP2040_PINMUX(11, RP2_PINCTRL_GPIO_FUNC_I2C)
#define I2C0_SDA_P12 RP2040_PINMUX(12, RP2_PINCTRL_GPIO_FUNC_I2C)
#define I2C0_SCL_P13 RP2040_PINMUX(13, RP2_PINCTRL_GPIO_FUNC_I2C)
#define I2C1_SDA_P14 RP2040_PINMUX(14, RP2_PINCTRL_GPIO_FUNC_I2C)
#define I2C1_SCL_P15 RP2040_PINMUX(15, RP2_PINCTRL_GPIO_FUNC_I2C)
#define I2C0_SDA_P16 RP2040_PINMUX(16, RP2_PINCTRL_GPIO_FUNC_I2C)
#define I2C0_SCL_P17 RP2040_PINMUX(17, RP2_PINCTRL_GPIO_FUNC_I2C)
#define I2C1_SDA_P18 RP2040_PINMUX(18, RP2_PINCTRL_GPIO_FUNC_I2C)
#define I2C1_SCL_P19 RP2040_PINMUX(19, RP2_PINCTRL_GPIO_FUNC_I2C)
#define I2C0_SDA_P20 RP2040_PINMUX(20, RP2_PINCTRL_GPIO_FUNC_I2C)
#define I2C0_SCL_P21 RP2040_PINMUX(21, RP2_PINCTRL_GPIO_FUNC_I2C)
#define I2C1_SDA_P22 RP2040_PINMUX(22, RP2_PINCTRL_GPIO_FUNC_I2C)
#define I2C1_SCL_P23 RP2040_PINMUX(23, RP2_PINCTRL_GPIO_FUNC_I2C)
#define I2C0_SDA_P24 RP2040_PINMUX(24, RP2_PINCTRL_GPIO_FUNC_I2C)
#define I2C0_SCL_P25 RP2040_PINMUX(25, RP2_PINCTRL_GPIO_FUNC_I2C)
#define I2C1_SDA_P26 RP2040_PINMUX(26, RP2_PINCTRL_GPIO_FUNC_I2C)
#define I2C1_SCL_P27 RP2040_PINMUX(27, RP2_PINCTRL_GPIO_FUNC_I2C)
#define I2C0_SDA_P28 RP2040_PINMUX(28, RP2_PINCTRL_GPIO_FUNC_I2C)
#define I2C0_SCL_P29 RP2040_PINMUX(29, RP2_PINCTRL_GPIO_FUNC_I2C)
#define PWM_0A_P0 RP2040_PINMUX(0, RP2_PINCTRL_GPIO_FUNC_PWM)
#define PWM_0B_P1 RP2040_PINMUX(1, RP2_PINCTRL_GPIO_FUNC_PWM)
#define PWM_1A_P2 RP2040_PINMUX(2, RP2_PINCTRL_GPIO_FUNC_PWM)
#define PWM_1B_P3 RP2040_PINMUX(3, RP2_PINCTRL_GPIO_FUNC_PWM)
#define PWM_2A_P4 RP2040_PINMUX(4, RP2_PINCTRL_GPIO_FUNC_PWM)
#define PWM_2B_P5 RP2040_PINMUX(5, RP2_PINCTRL_GPIO_FUNC_PWM)
#define PWM_3A_P6 RP2040_PINMUX(6, RP2_PINCTRL_GPIO_FUNC_PWM)
#define PWM_3B_P7 RP2040_PINMUX(7, RP2_PINCTRL_GPIO_FUNC_PWM)
#define PWM_4A_P8 RP2040_PINMUX(8, RP2_PINCTRL_GPIO_FUNC_PWM)
#define PWM_4B_P9 RP2040_PINMUX(9, RP2_PINCTRL_GPIO_FUNC_PWM)
#define PWM_5A_P10 RP2040_PINMUX(10, RP2_PINCTRL_GPIO_FUNC_PWM)
#define PWM_5B_P11 RP2040_PINMUX(11, RP2_PINCTRL_GPIO_FUNC_PWM)
#define PWM_6A_P12 RP2040_PINMUX(12, RP2_PINCTRL_GPIO_FUNC_PWM)
#define PWM_6B_P13 RP2040_PINMUX(13, RP2_PINCTRL_GPIO_FUNC_PWM)
#define PWM_7A_P14 RP2040_PINMUX(14, RP2_PINCTRL_GPIO_FUNC_PWM)
#define PWM_7B_P15 RP2040_PINMUX(15, RP2_PINCTRL_GPIO_FUNC_PWM)
#define PWM_0A_P16 RP2040_PINMUX(16, RP2_PINCTRL_GPIO_FUNC_PWM)
#define PWM_0B_P17 RP2040_PINMUX(17, RP2_PINCTRL_GPIO_FUNC_PWM)
#define PWM_1A_P18 RP2040_PINMUX(18, RP2_PINCTRL_GPIO_FUNC_PWM)
#define PWM_1B_P19 RP2040_PINMUX(19, RP2_PINCTRL_GPIO_FUNC_PWM)
#define PWM_2A_P20 RP2040_PINMUX(20, RP2_PINCTRL_GPIO_FUNC_PWM)
#define PWM_2B_P21 RP2040_PINMUX(21, RP2_PINCTRL_GPIO_FUNC_PWM)
#define PWM_3A_P22 RP2040_PINMUX(22, RP2_PINCTRL_GPIO_FUNC_PWM)
#define PWM_3B_P22 RP2040_PINMUX(23, RP2_PINCTRL_GPIO_FUNC_PWM)
#define PWM_4A_P24 RP2040_PINMUX(24, RP2_PINCTRL_GPIO_FUNC_PWM)
#define PWM_4B_P25 RP2040_PINMUX(25, RP2_PINCTRL_GPIO_FUNC_PWM)
#define PWM_5A_P26 RP2040_PINMUX(26, RP2_PINCTRL_GPIO_FUNC_PWM)
#define PWM_5B_P27 RP2040_PINMUX(27, RP2_PINCTRL_GPIO_FUNC_PWM)
#define PWM_6A_P28 RP2040_PINMUX(28, RP2_PINCTRL_GPIO_FUNC_PWM)
#define PWM_6B_P29 RP2040_PINMUX(29, RP2_PINCTRL_GPIO_FUNC_PWM)
#define SPI0_RX_P0 RP2040_PINMUX(0, RP2_PINCTRL_GPIO_FUNC_SPI)
#define SPI0_CSN_P1 RP2040_PINMUX(1, RP2_PINCTRL_GPIO_FUNC_SPI)
#define SPI0_SCK_P2 RP2040_PINMUX(2, RP2_PINCTRL_GPIO_FUNC_SPI)
#define SPI0_TX_P3 RP2040_PINMUX(3, RP2_PINCTRL_GPIO_FUNC_SPI)
#define SPI0_RX_P4 RP2040_PINMUX(4, RP2_PINCTRL_GPIO_FUNC_SPI)
#define SPI0_CSN_P5 RP2040_PINMUX(5, RP2_PINCTRL_GPIO_FUNC_SPI)
#define SPI0_SCK_P6 RP2040_PINMUX(6, RP2_PINCTRL_GPIO_FUNC_SPI)
#define SPI0_TX_P7 RP2040_PINMUX(7, RP2_PINCTRL_GPIO_FUNC_SPI)
#define SPI1_RX_P8 RP2040_PINMUX(8, RP2_PINCTRL_GPIO_FUNC_SPI)
#define SPI1_CSN_P9 RP2040_PINMUX(9, RP2_PINCTRL_GPIO_FUNC_SPI)
#define SPI1_SCK_P10 RP2040_PINMUX(10, RP2_PINCTRL_GPIO_FUNC_SPI)
#define SPI1_TX_P11 RP2040_PINMUX(11, RP2_PINCTRL_GPIO_FUNC_SPI)
#define SPI1_RX_P12 RP2040_PINMUX(12, RP2_PINCTRL_GPIO_FUNC_SPI)
#define SPI1_CSN_P13 RP2040_PINMUX(13, RP2_PINCTRL_GPIO_FUNC_SPI)
#define SPI1_SCK_P14 RP2040_PINMUX(14, RP2_PINCTRL_GPIO_FUNC_SPI)
#define SPI1_TX_P15 RP2040_PINMUX(15, RP2_PINCTRL_GPIO_FUNC_SPI)
#define SPI0_RX_P16 RP2040_PINMUX(16, RP2_PINCTRL_GPIO_FUNC_SPI)
#define SPI0_CSN_P17 RP2040_PINMUX(17, RP2_PINCTRL_GPIO_FUNC_SPI)
#define SPI0_SCK_P18 RP2040_PINMUX(18, RP2_PINCTRL_GPIO_FUNC_SPI)
#define SPI0_TX_P19 RP2040_PINMUX(19, RP2_PINCTRL_GPIO_FUNC_SPI)
#define SPI0_RX_P20 RP2040_PINMUX(20, RP2_PINCTRL_GPIO_FUNC_SPI)
#define SPI0_CSN_P21 RP2040_PINMUX(21, RP2_PINCTRL_GPIO_FUNC_SPI)
#define SPI0_SCK_P22 RP2040_PINMUX(22, RP2_PINCTRL_GPIO_FUNC_SPI)
#define SPI0_TX_P23 RP2040_PINMUX(23, RP2_PINCTRL_GPIO_FUNC_SPI)
#define SPI1_RX_P24 RP2040_PINMUX(24, RP2_PINCTRL_GPIO_FUNC_SPI)
#define SPI1_CSN_P25 RP2040_PINMUX(25, RP2_PINCTRL_GPIO_FUNC_SPI)
#define SPI1_SCK_P26 RP2040_PINMUX(26, RP2_PINCTRL_GPIO_FUNC_SPI)
#define SPI1_TX_P27 RP2040_PINMUX(27, RP2_PINCTRL_GPIO_FUNC_SPI)
#define SPI1_RX_P28 RP2040_PINMUX(28, RP2_PINCTRL_GPIO_FUNC_SPI)
#define SPI1_CSN_P29 RP2040_PINMUX(29, RP2_PINCTRL_GPIO_FUNC_SPI)
#define ADC_CH0_P26 RP2040_PINMUX(26, RP2_PINCTRL_GPIO_FUNC_NULL)
#define ADC_CH1_P27 RP2040_PINMUX(27, RP2_PINCTRL_GPIO_FUNC_NULL)
#define ADC_CH2_P28 RP2040_PINMUX(28, RP2_PINCTRL_GPIO_FUNC_NULL)
#define ADC_CH3_P29 RP2040_PINMUX(29, RP2_PINCTRL_GPIO_FUNC_NULL)
#define PIO0_P0 RP2040_PINMUX(0, RP2_PINCTRL_GPIO_FUNC_PIO0)
#define PIO0_P1 RP2040_PINMUX(1, RP2_PINCTRL_GPIO_FUNC_PIO0)
#define PIO0_P2 RP2040_PINMUX(2, RP2_PINCTRL_GPIO_FUNC_PIO0)
#define PIO0_P3 RP2040_PINMUX(3, RP2_PINCTRL_GPIO_FUNC_PIO0)
#define PIO0_P4 RP2040_PINMUX(4, RP2_PINCTRL_GPIO_FUNC_PIO0)
#define PIO0_P5 RP2040_PINMUX(5, RP2_PINCTRL_GPIO_FUNC_PIO0)
#define PIO0_P6 RP2040_PINMUX(6, RP2_PINCTRL_GPIO_FUNC_PIO0)
#define PIO0_P7 RP2040_PINMUX(7, RP2_PINCTRL_GPIO_FUNC_PIO0)
#define PIO0_P8 RP2040_PINMUX(8, RP2_PINCTRL_GPIO_FUNC_PIO0)
#define PIO0_P9 RP2040_PINMUX(9, RP2_PINCTRL_GPIO_FUNC_PIO0)
#define PIO0_P10 RP2040_PINMUX(10, RP2_PINCTRL_GPIO_FUNC_PIO0)
#define PIO0_P11 RP2040_PINMUX(11, RP2_PINCTRL_GPIO_FUNC_PIO0)
#define PIO0_P12 RP2040_PINMUX(12, RP2_PINCTRL_GPIO_FUNC_PIO0)
#define PIO0_P13 RP2040_PINMUX(13, RP2_PINCTRL_GPIO_FUNC_PIO0)
#define PIO0_P14 RP2040_PINMUX(14, RP2_PINCTRL_GPIO_FUNC_PIO0)
#define PIO0_P15 RP2040_PINMUX(15, RP2_PINCTRL_GPIO_FUNC_PIO0)
#define PIO0_P16 RP2040_PINMUX(16, RP2_PINCTRL_GPIO_FUNC_PIO0)
#define PIO0_P17 RP2040_PINMUX(17, RP2_PINCTRL_GPIO_FUNC_PIO0)
#define PIO0_P18 RP2040_PINMUX(18, RP2_PINCTRL_GPIO_FUNC_PIO0)
#define PIO0_P19 RP2040_PINMUX(19, RP2_PINCTRL_GPIO_FUNC_PIO0)
#define PIO0_P20 RP2040_PINMUX(20, RP2_PINCTRL_GPIO_FUNC_PIO0)
#define PIO0_P21 RP2040_PINMUX(21, RP2_PINCTRL_GPIO_FUNC_PIO0)
#define PIO0_P22 RP2040_PINMUX(22, RP2_PINCTRL_GPIO_FUNC_PIO0)
#define PIO0_P23 RP2040_PINMUX(23, RP2_PINCTRL_GPIO_FUNC_PIO0)
#define PIO0_P24 RP2040_PINMUX(24, RP2_PINCTRL_GPIO_FUNC_PIO0)
#define PIO0_P25 RP2040_PINMUX(25, RP2_PINCTRL_GPIO_FUNC_PIO0)
#define PIO0_P26 RP2040_PINMUX(26, RP2_PINCTRL_GPIO_FUNC_PIO0)
#define PIO0_P27 RP2040_PINMUX(27, RP2_PINCTRL_GPIO_FUNC_PIO0)
#define PIO0_P28 RP2040_PINMUX(28, RP2_PINCTRL_GPIO_FUNC_PIO0)
#define PIO0_P29 RP2040_PINMUX(29, RP2_PINCTRL_GPIO_FUNC_PIO0)
#define PIO1_P0 RP2040_PINMUX(0, RP2_PINCTRL_GPIO_FUNC_PIO1)
#define PIO1_P1 RP2040_PINMUX(1, RP2_PINCTRL_GPIO_FUNC_PIO1)
#define PIO1_P2 RP2040_PINMUX(2, RP2_PINCTRL_GPIO_FUNC_PIO1)
#define PIO1_P3 RP2040_PINMUX(3, RP2_PINCTRL_GPIO_FUNC_PIO1)
#define PIO1_P4 RP2040_PINMUX(4, RP2_PINCTRL_GPIO_FUNC_PIO1)
#define PIO1_P5 RP2040_PINMUX(5, RP2_PINCTRL_GPIO_FUNC_PIO1)
#define PIO1_P6 RP2040_PINMUX(6, RP2_PINCTRL_GPIO_FUNC_PIO1)
#define PIO1_P7 RP2040_PINMUX(7, RP2_PINCTRL_GPIO_FUNC_PIO1)
#define PIO1_P8 RP2040_PINMUX(8, RP2_PINCTRL_GPIO_FUNC_PIO1)
#define PIO1_P9 RP2040_PINMUX(9, RP2_PINCTRL_GPIO_FUNC_PIO1)
#define PIO1_P10 RP2040_PINMUX(10, RP2_PINCTRL_GPIO_FUNC_PIO1)
#define PIO1_P11 RP2040_PINMUX(11, RP2_PINCTRL_GPIO_FUNC_PIO1)
#define PIO1_P12 RP2040_PINMUX(12, RP2_PINCTRL_GPIO_FUNC_PIO1)
#define PIO1_P13 RP2040_PINMUX(13, RP2_PINCTRL_GPIO_FUNC_PIO1)
#define PIO1_P14 RP2040_PINMUX(14, RP2_PINCTRL_GPIO_FUNC_PIO1)
#define PIO1_P15 RP2040_PINMUX(15, RP2_PINCTRL_GPIO_FUNC_PIO1)
#define PIO1_P16 RP2040_PINMUX(16, RP2_PINCTRL_GPIO_FUNC_PIO1)
#define PIO1_P17 RP2040_PINMUX(17, RP2_PINCTRL_GPIO_FUNC_PIO1)
#define PIO1_P18 RP2040_PINMUX(18, RP2_PINCTRL_GPIO_FUNC_PIO1)
#define PIO1_P19 RP2040_PINMUX(19, RP2_PINCTRL_GPIO_FUNC_PIO1)
#define PIO1_P20 RP2040_PINMUX(20, RP2_PINCTRL_GPIO_FUNC_PIO1)
#define PIO1_P21 RP2040_PINMUX(21, RP2_PINCTRL_GPIO_FUNC_PIO1)
#define PIO1_P22 RP2040_PINMUX(22, RP2_PINCTRL_GPIO_FUNC_PIO1)
#define PIO1_P23 RP2040_PINMUX(23, RP2_PINCTRL_GPIO_FUNC_PIO1)
#define PIO1_P24 RP2040_PINMUX(24, RP2_PINCTRL_GPIO_FUNC_PIO1)
#define PIO1_P25 RP2040_PINMUX(25, RP2_PINCTRL_GPIO_FUNC_PIO1)
#define PIO1_P26 RP2040_PINMUX(26, RP2_PINCTRL_GPIO_FUNC_PIO1)
#define PIO1_P27 RP2040_PINMUX(27, RP2_PINCTRL_GPIO_FUNC_PIO1)
#define PIO1_P28 RP2040_PINMUX(28, RP2_PINCTRL_GPIO_FUNC_PIO1)
#define PIO1_P29 RP2040_PINMUX(29, RP2_PINCTRL_GPIO_FUNC_PIO1)
#define GPIN0_P20 RP2040_PINMUX(20, RP2_PINCTRL_GPIO_FUNC_GPCK)
#define GPIN1_P22 RP2040_PINMUX(22, RP2_PINCTRL_GPIO_FUNC_GPCK)
#define GPOUT0_P21 RP2040_PINMUX(21, RP2_PINCTRL_GPIO_FUNC_GPCK)
#define GPOUT1_P23 RP2040_PINMUX(23, RP2_PINCTRL_GPIO_FUNC_GPCK)
#define GPOUT2_P24 RP2040_PINMUX(24, RP2_PINCTRL_GPIO_FUNC_GPCK)
#define GPOUT3_P25 RP2040_PINMUX(25, RP2_PINCTRL_GPIO_FUNC_GPCK)
#endif /* __RP2040_PINCTRL_H__ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/rpi-pico-rp2040-pinctrl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 4,720 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_NXP_S32_PINCTRL_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_NXP_S32_PINCTRL_H_
#include <zephyr/dt-bindings/dt-util.h>
/*
* The NXP S32 pinmux configuration is encoded in a 32-bit field value as follows:
*
* - 0..2: Output mux Source Signal Selection (MSCR.SSS)
* - 3..6: Input mux Source Signal Selection (IMCR.SSS)
* - 7..15: Input Multiplexed Signal Configuration Register (IMCR) index
* - 16..24: Multiplexed Signal Configuration Register (MSCR) index
* - 25..27: MSCR SIUL2 instance index (0..7)
* - 28..30: IMCR SIUL2 instance index (0..7)
* - 31: Reserved for future use
*/
#define NXP_S32_MSCR_SSS_SHIFT 0U
#define NXP_S32_MSCR_SSS_MASK BIT_MASK(3)
#define NXP_S32_IMCR_SSS_SHIFT 3U
#define NXP_S32_IMCR_SSS_MASK BIT_MASK(4)
#define NXP_S32_IMCR_IDX_SHIFT 7U
#define NXP_S32_IMCR_IDX_MASK BIT_MASK(9)
#define NXP_S32_MSCR_IDX_SHIFT 16U
#define NXP_S32_MSCR_IDX_MASK BIT_MASK(9)
#define NXP_S32_MSCR_SIUL2_IDX_SHIFT 25U
#define NXP_S32_MSCR_SIUL2_IDX_MASK BIT_MASK(3)
#define NXP_S32_IMCR_SIUL2_IDX_SHIFT 28U
#define NXP_S32_IMCR_SIUL2_IDX_MASK BIT_MASK(3)
#define NXP_S32_PINMUX_MSCR_SSS(cfg) \
(((cfg) & NXP_S32_MSCR_SSS_MASK) << NXP_S32_MSCR_SSS_SHIFT)
#define NXP_S32_PINMUX_IMCR_SSS(cfg) \
(((cfg) & NXP_S32_IMCR_SSS_MASK) << NXP_S32_IMCR_SSS_SHIFT)
#define NXP_S32_PINMUX_IMCR_IDX(cfg) \
(((cfg) & NXP_S32_IMCR_IDX_MASK) << NXP_S32_IMCR_IDX_SHIFT)
#define NXP_S32_PINMUX_MSCR_IDX(cfg) \
(((cfg) & NXP_S32_MSCR_IDX_MASK) << NXP_S32_MSCR_IDX_SHIFT)
#define NXP_S32_PINMUX_MSCR_SIUL2_IDX(cfg) \
(((cfg) & NXP_S32_MSCR_SIUL2_IDX_MASK) << NXP_S32_MSCR_SIUL2_IDX_SHIFT)
#define NXP_S32_PINMUX_IMCR_SIUL2_IDX(cfg) \
(((cfg) & NXP_S32_IMCR_SIUL2_IDX_MASK) << NXP_S32_IMCR_SIUL2_IDX_SHIFT)
#define NXP_S32_PINMUX_GET_MSCR_SSS(cfg) \
(((cfg) >> NXP_S32_MSCR_SSS_SHIFT) & NXP_S32_MSCR_SSS_MASK)
#define NXP_S32_PINMUX_GET_IMCR_SSS(cfg) \
(((cfg) >> NXP_S32_IMCR_SSS_SHIFT) & NXP_S32_IMCR_SSS_MASK)
#define NXP_S32_PINMUX_GET_IMCR_IDX(cfg) \
(((cfg) >> NXP_S32_IMCR_IDX_SHIFT) & NXP_S32_IMCR_IDX_MASK)
#define NXP_S32_PINMUX_GET_MSCR_IDX(cfg) \
(((cfg) >> NXP_S32_MSCR_IDX_SHIFT) & NXP_S32_MSCR_IDX_MASK)
#define NXP_S32_PINMUX_GET_MSCR_SIUL2_IDX(cfg) \
(((cfg) >> NXP_S32_MSCR_SIUL2_IDX_SHIFT) & NXP_S32_MSCR_SIUL2_IDX_MASK)
#define NXP_S32_PINMUX_GET_IMCR_SIUL2_IDX(cfg) \
(((cfg) >> NXP_S32_IMCR_SIUL2_IDX_SHIFT) & NXP_S32_IMCR_SIUL2_IDX_MASK)
/**
* @brief Utility macro to build NXP S32 pinmux property for pinctrl nodes.
*
* @param mscr_siul2_idx MSCR SIUL2 instance index
* @param imcr_siul2_idx IMCR SIUL2 instance index
* @param mscr_idx Multiplexed Signal Configuration Register (MSCR) index
* @param mscr_sss Output mux Source Signal Selection (MSCR.SSS)
* @param imcr_idx Input Multiplexed Signal Configuration Register (IMCR) index
* @param imcr_sss Input mux Source Signal Selection (IMCR.SSS)
*/
#define NXP_S32_PINMUX(mscr_siul2_idx, imcr_siul2_idx, mscr_idx, mscr_sss, imcr_idx, imcr_sss) \
(NXP_S32_PINMUX_MSCR_SIUL2_IDX(mscr_siul2_idx) | \
NXP_S32_PINMUX_IMCR_SIUL2_IDX(imcr_siul2_idx) | \
NXP_S32_PINMUX_MSCR_IDX(mscr_idx) | \
NXP_S32_PINMUX_MSCR_SSS(mscr_sss) | \
NXP_S32_PINMUX_IMCR_IDX(imcr_idx) | \
NXP_S32_PINMUX_IMCR_SSS(imcr_sss))
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_NXP_NXP_S32_PINCTRL_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/nxp-s32-pinctrl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,215 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_ESP32C6_GPIO_SIGMAP_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_ESP32C6_GPIO_SIGMAP_H_
#define ESP_NOSIG ESP_SIG_INVAL
#define ESP_EXT_ADC_START 0
#define ESP_LEDC_LS_SIG_OUT0 0
#define ESP_LEDC_LS_SIG_OUT1 1
#define ESP_LEDC_LS_SIG_OUT2 2
#define ESP_LEDC_LS_SIG_OUT3 3
#define ESP_LEDC_LS_SIG_OUT4 4
#define ESP_LEDC_LS_SIG_OUT5 5
#define ESP_U0RXD_IN 6
#define ESP_U0TXD_OUT 6
#define ESP_U0CTS_IN 7
#define ESP_U0RTS_OUT 7
#define ESP_U0DSR_IN 8
#define ESP_U0DTR_OUT 8
#define ESP_U1RXD_IN 9
#define ESP_U1TXD_OUT 9
#define ESP_U1CTS_IN 10
#define ESP_U1RTS_OUT 10
#define ESP_U1DSR_IN 11
#define ESP_U1DTR_OUT 11
#define ESP_I2S_MCLK_IN 12
#define ESP_I2S_MCLK_OUT 12
#define ESP_I2SO_BCK_IN 13
#define ESP_I2SO_BCK_OUT 13
#define ESP_I2SO_WS_IN 14
#define ESP_I2SO_WS_OUT 14
#define ESP_I2SI_SD_IN 15
#define ESP_I2SO_SD_OUT 15
#define ESP_I2SI_BCK_IN 16
#define ESP_I2SI_BCK_OUT 16
#define ESP_I2SI_WS_IN 17
#define ESP_I2SI_WS_OUT 17
#define ESP_I2SO_SD1_OUT 18
#define ESP_USB_JTAG_TDO_BRIDGE 19
#define ESP_USB_JTAG_TRST 19
#define ESP_CPU_TESTBUS0 20
#define ESP_CPU_TESTBUS1 21
#define ESP_CPU_TESTBUS2 22
#define ESP_CPU_TESTBUS3 23
#define ESP_CPU_TESTBUS4 24
#define ESP_CPU_TESTBUS5 25
#define ESP_CPU_TESTBUS6 26
#define ESP_CPU_TESTBUS7 27
#define ESP_CPU_GPIO_IN0 28
#define ESP_CPU_GPIO_OUT0 28
#define ESP_CPU_GPIO_IN1 29
#define ESP_CPU_GPIO_OUT1 29
#define ESP_CPU_GPIO_IN2 30
#define ESP_CPU_GPIO_OUT2 30
#define ESP_CPU_GPIO_IN3 31
#define ESP_CPU_GPIO_OUT3 31
#define ESP_CPU_GPIO_IN4 32
#define ESP_CPU_GPIO_OUT4 32
#define ESP_CPU_GPIO_IN5 33
#define ESP_CPU_GPIO_OUT5 33
#define ESP_CPU_GPIO_IN6 34
#define ESP_CPU_GPIO_OUT6 34
#define ESP_CPU_GPIO_IN7 35
#define ESP_CPU_GPIO_OUT7 35
#define ESP_USB_JTAG_TCK 36
#define ESP_USB_JTAG_TMS 37
#define ESP_USB_JTAG_TDI 38
#define ESP_USB_JTAG_TDO 39
#define ESP_USB_EXTPHY_VP 40
#define ESP_USB_EXTPHY_OEN 40
#define ESP_USB_EXTPHY_VM 41
#define ESP_USB_EXTPHY_SPEED 41
#define ESP_USB_EXTPHY_RCV 42
#define ESP_USB_EXTPHY_VPO 42
#define ESP_USB_EXTPHY_VMO 43
#define ESP_USB_EXTPHY_SUSPND 44
#define ESP_I2CEXT0_SCL_IN 45
#define ESP_I2CEXT0_SCL_OUT 45
#define ESP_I2CEXT0_SDA_IN 46
#define ESP_I2CEXT0_SDA_OUT 46
#define ESP_PARL_RX_DATA0 47
#define ESP_PARL_TX_DATA0 47
#define ESP_PARL_RX_DATA1 48
#define ESP_PARL_TX_DATA1 48
#define ESP_PARL_RX_DATA2 49
#define ESP_PARL_TX_DATA2 49
#define ESP_PARL_RX_DATA3 50
#define ESP_PARL_TX_DATA3 50
#define ESP_PARL_RX_DATA4 51
#define ESP_PARL_TX_DATA4 51
#define ESP_PARL_RX_DATA5 52
#define ESP_PARL_TX_DATA5 52
#define ESP_PARL_RX_DATA6 53
#define ESP_PARL_TX_DATA6 53
#define ESP_PARL_RX_DATA7 54
#define ESP_PARL_TX_DATA7 54
#define ESP_PARL_RX_DATA8 55
#define ESP_PARL_TX_DATA8 55
#define ESP_PARL_RX_DATA9 56
#define ESP_PARL_TX_DATA9 56
#define ESP_PARL_RX_DATA10 57
#define ESP_PARL_TX_DATA10 57
#define ESP_PARL_RX_DATA11 58
#define ESP_PARL_TX_DATA11 58
#define ESP_PARL_RX_DATA12 59
#define ESP_PARL_TX_DATA12 59
#define ESP_PARL_RX_DATA13 60
#define ESP_PARL_TX_DATA13 60
#define ESP_PARL_RX_DATA14 61
#define ESP_PARL_TX_DATA14 61
#define ESP_PARL_RX_DATA15 62
#define ESP_PARL_TX_DATA15 62
#define ESP_FSPICLK_IN 63
#define ESP_FSPICLK_OUT 63
#define ESP_FSPIQ_IN 64
#define ESP_FSPIQ_OUT 64
#define ESP_FSPID_IN 65
#define ESP_FSPID_OUT 65
#define ESP_FSPIHD_IN 66
#define ESP_FSPIHD_OUT 66
#define ESP_FSPIWP_IN 67
#define ESP_FSPIWP_OUT 67
#define ESP_FSPICS0_IN 68
#define ESP_FSPICS0_OUT 68
#define ESP_PARL_RX_CLK_IN 69
#define ESP_SDIO_TOHOST_INT_OUT 69
#define ESP_PARL_TX_CLK_IN 70
#define ESP_PARL_TX_CLK_OUT 70
#define ESP_RMT_SIG_IN0 71
#define ESP_RMT_SIG_OUT0 71
#define ESP_MODEM_DIAG0 71
#define ESP_RMT_SIG_IN1 72
#define ESP_RMT_SIG_OUT1 72
#define ESP_MODEM_DIAG1 72
#define ESP_TWAI0_RX 73
#define ESP_TWAI0_TX 73
#define ESP_MODEM_DIAG2 73
#define ESP_TWAI0_BUS_OFF_ON 74
#define ESP_MODEM_DIAG3 74
#define ESP_TWAI0_CLKOUT 75
#define ESP_MODEM_DIAG4 75
#define ESP_TWAI0_STANDBY 76
#define ESP_MODEM_DIAG5 76
#define ESP_TWAI1_RX 77
#define ESP_TWAI1_TX 77
#define ESP_MODEM_DIAG6 77
#define ESP_TWAI1_BUS_OFF_ON 78
#define ESP_MODEM_DIAG7 78
#define ESP_TWAI1_CLKOUT 79
#define ESP_MODEM_DIAG8 79
#define ESP_TWAI1_STANDBY 80
#define ESP_MODEM_DIAG9 80
#define ESP_EXTERN_PRIORITY_I 81
#define ESP_EXTERN_PRIORITY_O 81
#define ESP_EXTERN_ACTIVE_I 82
#define ESP_EXTERN_ACTIVE_O 82
#define ESP_GPIO_SD0_OUT 83
#define ESP_GPIO_SD1_OUT 84
#define ESP_GPIO_SD2_OUT 85
#define ESP_GPIO_SD3_OUT 86
#define ESP_PWM0_SYNC0_IN 87
#define ESP_PWM0_OUT0A 87
#define ESP_MODEM_DIAG10 87
#define ESP_PWM0_SYNC1_IN 88
#define ESP_PWM0_OUT0B 88
#define ESP_MODEM_DIAG11 88
#define ESP_PWM0_SYNC2_IN 89
#define ESP_PWM0_OUT1A 89
#define ESP_MODEM_DIAG12 89
#define ESP_PWM0_F0_IN 90
#define ESP_PWM0_OUT1B 90
#define ESP_MODEM_DIAG13 90
#define ESP_PWM0_F1_IN 91
#define ESP_PWM0_OUT2A 91
#define ESP_MODEM_DIAG14 91
#define ESP_PWM0_F2_IN 92
#define ESP_PWM0_OUT2B 92
#define ESP_MODEM_DIAG15 92
#define ESP_PWM0_CAP0_IN 93
#define ESP_ANT_SEL0 93
#define ESP_PWM0_CAP1_IN 94
#define ESP_ANT_SEL1 94
#define ESP_PWM0_CAP2_IN 95
#define ESP_ANT_SEL2 95
#define ESP_ANT_SEL3 96
#define ESP_SIG_IN_FUNC_97 97
#define ESP_SIG_IN_FUNC97 97
#define ESP_SIG_IN_FUNC_98 98
#define ESP_SIG_IN_FUNC98 98
#define ESP_SIG_IN_FUNC_99 99
#define ESP_SIG_IN_FUNC99 99
#define ESP_SIG_IN_FUNC_100 100
#define ESP_SIG_IN_FUNC100 100
#define ESP_PCNT_SIG_CH0_IN0 101
#define ESP_FSPICS1_OUT 101
#define ESP_MODEM_DIAG16 101
#define ESP_PCNT_SIG_CH1_IN0 102
#define ESP_FSPICS2_OUT 102
#define ESP_MODEM_DIAG17 102
#define ESP_PCNT_CTRL_CH0_IN0 103
#define ESP_FSPICS3_OUT 103
#define ESP_MODEM_DIAG18 103
#define ESP_PCNT_CTRL_CH1_IN0 104
#define ESP_FSPICS4_OUT 104
#define ESP_MODEM_DIAG19 104
#define ESP_PCNT_SIG_CH0_IN1 105
#define ESP_FSPICS5_OUT 105
#define ESP_MODEM_DIAG20 105
#define ESP_PCNT_SIG_CH1_IN1 106
#define ESP_MODEM_DIAG21 106
#define ESP_PCNT_CTRL_CH0_IN1 107
#define ESP_MODEM_DIAG22 107
#define ESP_PCNT_CTRL_CH1_IN1 108
#define ESP_MODEM_DIAG23 108
#define ESP_PCNT_SIG_CH0_IN2 109
#define ESP_MODEM_DIAG24 109
#define ESP_PCNT_SIG_CH1_IN2 110
#define ESP_MODEM_DIAG25 110
#define ESP_PCNT_CTRL_CH0_IN2 111
#define ESP_MODEM_DIAG26 111
#define ESP_PCNT_CTRL_CH1_IN2 112
#define ESP_MODEM_DIAG27 112
#define ESP_PCNT_SIG_CH0_IN3 113
#define ESP_MODEM_DIAG28 113
#define ESP_PCNT_SIG_CH1_IN3 114
#define ESP_SPICLK_OUT 114
#define ESP_MODEM_DIAG29 114
#define ESP_PCNT_CTRL_CH0_IN3 115
#define ESP_SPICS0_OUT 115
#define ESP_MODEM_DIAG30 115
#define ESP_PCNT_CTRL_CH1_IN3 116
#define ESP_SPICS1_OUT 116
#define ESP_MODEM_DIAG31 116
#define ESP_GPIO_EVENT_MATRIX_IN0 117
#define ESP_GPIO_TASK_MATRIX_OUT0 117
#define ESP_GPIO_EVENT_MATRIX_IN1 118
#define ESP_GPIO_TASK_MATRIX_OUT1 118
#define ESP_GPIO_EVENT_MATRIX_IN2 119
#define ESP_GPIO_TASK_MATRIX_OUT2 119
#define ESP_GPIO_EVENT_MATRIX_IN3 120
#define ESP_GPIO_TASK_MATRIX_OUT3 120
#define ESP_SPIQ_IN 121
#define ESP_SPIQ_OUT 121
#define ESP_SPID_IN 122
#define ESP_SPID_OUT 122
#define ESP_SPIHD_IN 123
#define ESP_SPIHD_OUT 123
#define ESP_SPIWP_IN 124
#define ESP_SPIWP_OUT 124
#define ESP_CLK_OUT_OUT1 125
#define ESP_CLK_OUT_OUT2 126
#define ESP_CLK_OUT_OUT3 127
#define ESP_SIG_GPIO_OUT 128
#define ESP_GPIO_MAP_DATE 0x2201120
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_ESP32C6_GPIO_SIGMAP_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/esp32c6-gpio-sigmap.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,762 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_ESP32S3_GPIO_SIGMAP_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_ESP32S3_GPIO_SIGMAP_H_
#define ESP_NOSIG ESP_SIG_INVAL
#define ESP_SPIQ_IN 0
#define ESP_SPIQ_OUT 0
#define ESP_SPID_IN 1
#define ESP_SPID_OUT 1
#define ESP_SPIHD_IN 2
#define ESP_SPIHD_OUT 2
#define ESP_SPIWP_IN 3
#define ESP_SPIWP_OUT 3
#define ESP_SPICLK_OUT 4
#define ESP_SPICS0_OUT 5
#define ESP_SPICS1_OUT 6
#define ESP_SPID4_IN 7
#define ESP_SPID4_OUT 7
#define ESP_SPID5_IN 8
#define ESP_SPID5_OUT 8
#define ESP_SPID6_IN 9
#define ESP_SPID6_OUT 9
#define ESP_SPID7_IN 10
#define ESP_SPID7_OUT 10
#define ESP_SPIDQS_IN 11
#define ESP_SPIDQS_OUT 11
#define ESP_U0RXD_IN 12
#define ESP_U0TXD_OUT 12
#define ESP_U0CTS_IN 13
#define ESP_U0RTS_OUT 13
#define ESP_U0DSR_IN 14
#define ESP_U0DTR_OUT 14
#define ESP_U1RXD_IN 15
#define ESP_U1TXD_OUT 15
#define ESP_U1CTS_IN 16
#define ESP_U1RTS_OUT 16
#define ESP_U1DSR_IN 17
#define ESP_U1DTR_OUT 17
#define ESP_U2RXD_IN 18
#define ESP_U2TXD_OUT 18
#define ESP_U2CTS_IN 19
#define ESP_U2RTS_OUT 19
#define ESP_U2DSR_IN 20
#define ESP_U2DTR_OUT 20
#define ESP_I2S1_MCLK_IN 21
#define ESP_I2S1_MCLK_OUT 21
#define ESP_I2S0O_BCK_IN 22
#define ESP_I2S0O_BCK_OUT 22
#define ESP_I2S0_MCLK_IN 23
#define ESP_I2S0_MCLK_OUT 23
#define ESP_I2S0O_WS_IN 24
#define ESP_I2S0O_WS_OUT 24
#define ESP_I2S0I_SD_IN 25
#define ESP_I2S0O_SD_OUT 25
#define ESP_I2S0I_BCK_IN 26
#define ESP_I2S0I_BCK_OUT 26
#define ESP_I2S0I_WS_IN 27
#define ESP_I2S0I_WS_OUT 27
#define ESP_I2S1O_BCK_IN 28
#define ESP_I2S1O_BCK_OUT 28
#define ESP_I2S1O_WS_IN 29
#define ESP_I2S1O_WS_OUT 29
#define ESP_I2S1I_SD_IN 30
#define ESP_I2S1O_SD_OUT 30
#define ESP_I2S1I_BCK_IN 31
#define ESP_I2S1I_BCK_OUT 31
#define ESP_I2S1I_WS_IN 32
#define ESP_I2S1I_WS_OUT 32
#define ESP_PCNT_SIG_CH0_IN0 33
#define ESP_GPIO_WLAN_PRIO 33
#define ESP_PCNT_SIG_CH1_IN0 34
#define ESP_GPIO_WLAN_ACTIVE 34
#define ESP_PCNT_CTRL_CH0_IN0 35
#define ESP_BB_DIAG0 35
#define ESP_PCNT_CTRL_CH1_IN0 36
#define ESP_BB_DIAG1 36
#define ESP_PCNT_SIG_CH0_IN1 37
#define ESP_BB_DIAG2 37
#define ESP_PCNT_SIG_CH1_IN1 38
#define ESP_BB_DIAG3 38
#define ESP_PCNT_CTRL_CH0_IN1 39
#define ESP_BB_DIAG4 39
#define ESP_PCNT_CTRL_CH1_IN1 40
#define ESP_BB_DIAG5 40
#define ESP_PCNT_SIG_CH0_IN2 41
#define ESP_BB_DIAG6 41
#define ESP_PCNT_SIG_CH1_IN2 42
#define ESP_BB_DIAG7 42
#define ESP_PCNT_CTRL_CH0_IN2 43
#define ESP_BB_DIAG8 43
#define ESP_PCNT_CTRL_CH1_IN2 44
#define ESP_BB_DIAG9 44
#define ESP_PCNT_SIG_CH0_IN3 45
#define ESP_BB_DIAG10 45
#define ESP_PCNT_SIG_CH1_IN3 46
#define ESP_BB_DIAG11 46
#define ESP_PCNT_CTRL_CH0_IN3 47
#define ESP_BB_DIAG12 47
#define ESP_PCNT_CTRL_CH1_IN3 48
#define ESP_BB_DIAG13 48
#define ESP_GPIO_BT_ACTIVE 49
#define ESP_BB_DIAG14 49
#define ESP_GPIO_BT_PRIORITY 50
#define ESP_BB_DIAG15 50
#define ESP_I2S0I_SD1_IN 51
#define ESP_BB_DIAG16 51
#define ESP_I2S0I_SD2_IN 52
#define ESP_BB_DIAG17 52
#define ESP_I2S0I_SD3_IN 53
#define ESP_BB_DIAG18 53
#define ESP_CORE1_GPIO_IN7 54
#define ESP_CORE1_GPIO_OUT7 54
#define ESP_USB_EXTPHY_VP 55
#define ESP_USB_EXTPHY_OEN 55
#define ESP_USB_EXTPHY_VM 56
#define ESP_USB_EXTPHY_SPEED 56
#define ESP_USB_EXTPHY_RCV 57
#define ESP_USB_EXTPHY_VPO 57
#define ESP_USB_OTG_IDDIG_IN 58
#define ESP_USB_EXTPHY_VMO 58
#define ESP_USB_OTG_AVALID_IN 59
#define ESP_USB_EXTPHY_SUSPND 59
#define ESP_USB_SRP_BVALID_IN 60
#define ESP_USB_OTG_IDPULLUP 60
#define ESP_USB_OTG_VBUSVALID_IN 61
#define ESP_USB_OTG_DPPULLDOWN 61
#define ESP_USB_SRP_SESSEND_IN 62
#define ESP_USB_OTG_DMPULLDOWN 62
#define ESP_USB_OTG_DRVVBUS 63
#define ESP_USB_SRP_CHRGVBUS 64
#define ESP_USB_SRP_DISCHRGVBUS 65
#define ESP_SPI3_CLK_IN 66
#define ESP_SPI3_CLK_OUT 66
#define ESP_SPI3_Q_IN 67
#define ESP_SPI3_Q_OUT 67
#define ESP_SPI3_D_IN 68
#define ESP_SPI3_D_OUT 68
#define ESP_SPI3_HD_IN 69
#define ESP_SPI3_HD_OUT 69
#define ESP_SPI3_WP_IN 70
#define ESP_SPI3_WP_OUT 70
#define ESP_SPI3_CS0_IN 71
#define ESP_SPI3_CS0_OUT 71
#define ESP_SPI3_CS1_OUT 72
#define ESP_EXT_ADC_START 73
#define ESP_LEDC_LS_SIG_OUT0 73
#define ESP_LEDC_LS_SIG_OUT1 74
#define ESP_LEDC_LS_SIG_OUT2 75
#define ESP_LEDC_LS_SIG_OUT3 76
#define ESP_LEDC_LS_SIG_OUT4 77
#define ESP_LEDC_LS_SIG_OUT5 78
#define ESP_LEDC_LS_SIG_OUT6 79
#define ESP_LEDC_LS_SIG_OUT7 80
#define ESP_RMT_SIG_IN0 81
#define ESP_RMT_SIG_OUT0 81
#define ESP_RMT_SIG_IN1 82
#define ESP_RMT_SIG_OUT1 82
#define ESP_RMT_SIG_IN2 83
#define ESP_RMT_SIG_OUT2 83
#define ESP_RMT_SIG_IN3 84
#define ESP_RMT_SIG_OUT3 84
#define ESP_USB_JTAG_TCK 85
#define ESP_USB_JTAG_TMS 86
#define ESP_USB_JTAG_TDI 87
#define ESP_USB_JTAG_TDO 88
#define ESP_I2CEXT0_SCL_IN 89
#define ESP_I2CEXT0_SCL_OUT 89
#define ESP_I2CEXT0_SDA_IN 90
#define ESP_I2CEXT0_SDA_OUT 90
#define ESP_I2CEXT1_SCL_IN 91
#define ESP_I2CEXT1_SCL_OUT 91
#define ESP_I2CEXT1_SDA_IN 92
#define ESP_I2CEXT1_SDA_OUT 92
#define ESP_GPIO_SD0_OUT 93
#define ESP_GPIO_SD1_OUT 94
#define ESP_GPIO_SD2_OUT 95
#define ESP_GPIO_SD3_OUT 96
#define ESP_GPIO_SD4_OUT 97
#define ESP_GPIO_SD5_OUT 98
#define ESP_GPIO_SD6_OUT 99
#define ESP_GPIO_SD7_OUT 100
#define ESP_FSPICLK_IN 101
#define ESP_FSPICLK_OUT 101
#define ESP_FSPIQ_IN 102
#define ESP_FSPIQ_OUT 102
#define ESP_FSPID_IN 103
#define ESP_FSPID_OUT 103
#define ESP_FSPIHD_IN 104
#define ESP_FSPIHD_OUT 104
#define ESP_FSPIWP_IN 105
#define ESP_FSPIWP_OUT 105
#define ESP_FSPIIO4_IN 106
#define ESP_FSPIIO4_OUT 106
#define ESP_FSPIIO5_IN 107
#define ESP_FSPIIO5_OUT 107
#define ESP_FSPIIO6_IN 108
#define ESP_FSPIIO6_OUT 108
#define ESP_FSPIIO7_IN 109
#define ESP_FSPIIO7_OUT 109
#define ESP_FSPICS0_IN 110
#define ESP_FSPICS0_OUT 110
#define ESP_FSPICS1_OUT 111
#define ESP_FSPICS2_OUT 112
#define ESP_FSPICS3_OUT 113
#define ESP_FSPICS4_OUT 114
#define ESP_FSPICS5_OUT 115
#define ESP_TWAI_RX 116
#define ESP_TWAI_TX 116
#define ESP_TWAI_BUS_OFF_ON 117
#define ESP_TWAI_CLKOUT 118
#define ESP_SUBSPICLK_OUT 119
#define ESP_SUBSPIQ_IN 120
#define ESP_SUBSPIQ_OUT 120
#define ESP_SUBSPID_IN 121
#define ESP_SUBSPID_OUT 121
#define ESP_SUBSPIHD_IN 122
#define ESP_SUBSPIHD_OUT 122
#define ESP_SUBSPIWP_IN 123
#define ESP_SUBSPIWP_OUT 123
#define ESP_SUBSPICS0_OUT 124
#define ESP_SUBSPICS1_OUT 125
#define ESP_FSPIDQS_OUT 126
#define ESP_SPI3_CS2_OUT 127
#define ESP_I2S0O_SD1_OUT 128
#define ESP_CORE1_GPIO_IN0 129
#define ESP_CORE1_GPIO_OUT0 129
#define ESP_CORE1_GPIO_IN1 130
#define ESP_CORE1_GPIO_OUT1 130
#define ESP_CORE1_GPIO_IN2 131
#define ESP_CORE1_GPIO_OUT2 131
#define ESP_LCD_CS 132
#define ESP_CAM_DATA_IN0 133
#define ESP_LCD_DATA_OUT0 133
#define ESP_CAM_DATA_IN1 134
#define ESP_LCD_DATA_OUT1 134
#define ESP_CAM_DATA_IN2 135
#define ESP_LCD_DATA_OUT2 135
#define ESP_CAM_DATA_IN3 136
#define ESP_LCD_DATA_OUT3 136
#define ESP_CAM_DATA_IN4 137
#define ESP_LCD_DATA_OUT4 137
#define ESP_CAM_DATA_IN5 138
#define ESP_LCD_DATA_OUT5 138
#define ESP_CAM_DATA_IN6 139
#define ESP_LCD_DATA_OUT6 139
#define ESP_CAM_DATA_IN7 140
#define ESP_LCD_DATA_OUT7 140
#define ESP_CAM_DATA_IN8 141
#define ESP_LCD_DATA_OUT8 141
#define ESP_CAM_DATA_IN9 142
#define ESP_LCD_DATA_OUT9 142
#define ESP_CAM_DATA_IN10 143
#define ESP_LCD_DATA_OUT10 143
#define ESP_CAM_DATA_IN11 144
#define ESP_LCD_DATA_OUT11 144
#define ESP_CAM_DATA_IN12 145
#define ESP_LCD_DATA_OUT12 145
#define ESP_CAM_DATA_IN13 146
#define ESP_LCD_DATA_OUT13 146
#define ESP_CAM_DATA_IN14 147
#define ESP_LCD_DATA_OUT14 147
#define ESP_CAM_DATA_IN15 148
#define ESP_LCD_DATA_OUT15 148
#define ESP_CAM_PCLK 149
#define ESP_CAM_CLK 149
#define ESP_CAM_H_ENABLE 150
#define ESP_LCD_H_ENABLE 150
#define ESP_CAM_H_SYNC 151
#define ESP_LCD_H_SYNC 151
#define ESP_CAM_V_SYNC 152
#define ESP_LCD_V_SYNC 152
#define ESP_LCD_DC 153
#define ESP_LCD_PCLK 154
#define ESP_SUBSPID4_IN 155
#define ESP_SUBSPID4_OUT 155
#define ESP_SUBSPID5_IN 156
#define ESP_SUBSPID5_OUT 156
#define ESP_SUBSPID6_IN 157
#define ESP_SUBSPID6_OUT 157
#define ESP_SUBSPID7_IN 158
#define ESP_SUBSPID7_OUT 158
#define ESP_SUBSPIDQS_IN 159
#define ESP_SUBSPIDQS_OUT 159
#define ESP_PWM0_SYNC0_IN 160
#define ESP_PWM0_OUT0A 160
#define ESP_PWM0_SYNC1_IN 161
#define ESP_PWM0_OUT0B 161
#define ESP_PWM0_SYNC2_IN 162
#define ESP_PWM0_OUT1A 162
#define ESP_PWM0_F0_IN 163
#define ESP_PWM0_OUT1B 163
#define ESP_PWM0_F1_IN 164
#define ESP_PWM0_OUT2A 164
#define ESP_PWM0_F2_IN 165
#define ESP_PWM0_OUT2B 165
#define ESP_PWM0_CAP0_IN 166
#define ESP_PWM1_OUT0A 166
#define ESP_PWM0_CAP1_IN 167
#define ESP_PWM1_OUT0B 167
#define ESP_PWM0_CAP2_IN 168
#define ESP_PWM1_OUT1A 168
#define ESP_PWM1_SYNC0_IN 169
#define ESP_PWM1_OUT1B 169
#define ESP_PWM1_SYNC1_IN 170
#define ESP_PWM1_OUT2A 170
#define ESP_PWM1_SYNC2_IN 171
#define ESP_PWM1_OUT2B 171
#define ESP_PWM1_F0_IN 172
#define ESP_SDHOST_CCLK_OUT_1 172
#define ESP_PWM1_F1_IN 173
#define ESP_SDHOST_CCLK_OUT_2 173
#define ESP_PWM1_F2_IN 174
#define ESP_SDHOST_RST_N_1 174
#define ESP_PWM1_CAP0_IN 175
#define ESP_SDHOST_RST_N_2 175
#define ESP_PWM1_CAP1_IN 176
#define ESP_SDHOST_CCMD_OD_PULLUP_EN_N176
#define ESP_PWM1_CAP2_IN 177
#define ESP_SDIO_TOHOST_INT_OUT 177
#define ESP_SDHOST_CCMD_IN_1 178
#define ESP_SDHOST_CCMD_OUT_1 178
#define ESP_SDHOST_CCMD_IN_2 179
#define ESP_SDHOST_CCMD_OUT_2 179
#define ESP_SDHOST_CDATA_IN_10 180
#define ESP_SDHOST_CDATA_OUT_10 180
#define ESP_SDHOST_CDATA_IN_11 181
#define ESP_SDHOST_CDATA_OUT_11 181
#define ESP_SDHOST_CDATA_IN_12 182
#define ESP_SDHOST_CDATA_OUT_12 182
#define ESP_SDHOST_CDATA_IN_13 183
#define ESP_SDHOST_CDATA_OUT_13 183
#define ESP_SDHOST_CDATA_IN_14 184
#define ESP_SDHOST_CDATA_OUT_14 184
#define ESP_SDHOST_CDATA_IN_15 185
#define ESP_SDHOST_CDATA_OUT_15 185
#define ESP_SDHOST_CDATA_IN_16 186
#define ESP_SDHOST_CDATA_OUT_16 186
#define ESP_SDHOST_CDATA_IN_17 187
#define ESP_SDHOST_CDATA_OUT_17 187
#define ESP_PCMFSYNC_IN 188
#define ESP_BT_AUDIO0_IRQ 188
#define ESP_PCMCLK_IN 189
#define ESP_BT_AUDIO1_IRQ 189
#define ESP_PCMDIN 190
#define ESP_BT_AUDIO2_IRQ 190
#define ESP_RW_WAKEUP_REQ 191
#define ESP_BLE_AUDIO0_IRQ 191
#define ESP_SDHOST_DATA_STROBE_1 192
#define ESP_BLE_AUDIO1_IRQ 192
#define ESP_SDHOST_DATA_STROBE_2 193
#define ESP_BLE_AUDIO2_IRQ 193
#define ESP_SDHOST_CARD_DETECT_N_1 194
#define ESP_PCMFSYNC_OUT 194
#define ESP_SDHOST_CARD_DETECT_N_2 195
#define ESP_PCMCLK_OUT 195
#define ESP_SDHOST_CARD_WRITE_PRT_1 196
#define ESP_PCMDOUT 196
#define ESP_SDHOST_CARD_WRITE_PRT_2 197
#define ESP_BLE_AUDIO_SYNC0_P 197
#define ESP_SDHOST_CARD_INT_N_1 198
#define ESP_BLE_AUDIO_SYNC1_P 198
#define ESP_SDHOST_CARD_INT_N_2 199
#define ESP_BLE_AUDIO_SYNC2_P 199
#define ESP_ANT_SEL0 200
#define ESP_ANT_SEL1 201
#define ESP_ANT_SEL2 202
#define ESP_ANT_SEL3 203
#define ESP_ANT_SEL4 204
#define ESP_ANT_SEL5 205
#define ESP_ANT_SEL6 206
#define ESP_ANT_SEL7 207
#define ESP_SIG_IN_FUNC_208 208
#define ESP_SIG_IN_FUNC208 208
#define ESP_SIG_IN_FUNC_209 209
#define ESP_SIG_IN_FUNC209 209
#define ESP_SIG_IN_FUNC_210 210
#define ESP_SIG_IN_FUNC210 210
#define ESP_SIG_IN_FUNC_211 211
#define ESP_SIG_IN_FUNC211 211
#define ESP_SIG_IN_FUNC_212 212
#define ESP_SIG_IN_FUNC212 212
#define ESP_SDHOST_CDATA_IN_20 213
#define ESP_SDHOST_CDATA_OUT_20 213
#define ESP_SDHOST_CDATA_IN_21 214
#define ESP_SDHOST_CDATA_OUT_21 214
#define ESP_SDHOST_CDATA_IN_22 215
#define ESP_SDHOST_CDATA_OUT_22 215
#define ESP_SDHOST_CDATA_IN_23 216
#define ESP_SDHOST_CDATA_OUT_23 216
#define ESP_SDHOST_CDATA_IN_24 217
#define ESP_SDHOST_CDATA_OUT_24 217
#define ESP_SDHOST_CDATA_IN_25 218
#define ESP_SDHOST_CDATA_OUT_25 218
#define ESP_SDHOST_CDATA_IN_26 219
#define ESP_SDHOST_CDATA_OUT_26 219
#define ESP_SDHOST_CDATA_IN_27 220
#define ESP_SDHOST_CDATA_OUT_27 220
#define ESP_PRO_ALONEGPIO_IN0 221
#define ESP_PRO_ALONEGPIO_OUT0 221
#define ESP_PRO_ALONEGPIO_IN1 222
#define ESP_PRO_ALONEGPIO_OUT1 222
#define ESP_PRO_ALONEGPIO_IN2 223
#define ESP_PRO_ALONEGPIO_OUT2 223
#define ESP_PRO_ALONEGPIO_IN3 224
#define ESP_PRO_ALONEGPIO_OUT3 224
#define ESP_PRO_ALONEGPIO_IN4 225
#define ESP_PRO_ALONEGPIO_OUT4 225
#define ESP_PRO_ALONEGPIO_IN5 226
#define ESP_PRO_ALONEGPIO_OUT5 226
#define ESP_PRO_ALONEGPIO_IN6 227
#define ESP_PRO_ALONEGPIO_OUT6 227
#define ESP_PRO_ALONEGPIO_IN7 228
#define ESP_PRO_ALONEGPIO_OUT7 228
#define ESP_SYNCERR 229
#define ESP_SYNCFOUND_FLAG 230
#define ESP_EVT_CNTL_IMMEDIATE_ABORT 231
#define ESP_LINKLBL 232
#define ESP_DATA_EN 233
#define ESP_DATA 234
#define ESP_PKT_TX_ON 235
#define ESP_PKT_RX_ON 236
#define ESP_RW_TX_ON 237
#define ESP_RW_RX_ON 238
#define ESP_EVT_REQ_P 239
#define ESP_EVT_STOP_P 240
#define ESP_BT_MODE_ON 241
#define ESP_GPIO_LC_DIAG0 242
#define ESP_GPIO_LC_DIAG1 243
#define ESP_GPIO_LC_DIAG2 244
#define ESP_CH 245
#define ESP_RX_WINDOW 246
#define ESP_UPDATE_RX 247
#define ESP_RX_STATUS 248
#define ESP_CLK_GPIO 249
#define ESP_NBT_BLE 250
#define ESP_USB_JTAG_TDO_BRIDGE 251
#define ESP_USB_JTAG_TRST 251
#define ESP_CORE1_GPIO_IN3 252
#define ESP_CORE1_GPIO_OUT3 252
#define ESP_CORE1_GPIO_IN4 253
#define ESP_CORE1_GPIO_OUT4 253
#define ESP_CORE1_GPIO_IN5 254
#define ESP_CORE1_GPIO_OUT5 254
#define ESP_CORE1_GPIO_IN6 255
#define ESP_CORE1_GPIO_OUT6 255
#define ESP_SIG_GPIO_OUT 256
#define ESP_GPIO_MAP_DATE 0x1907040
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_ESP32S3_GPIO_SIGMAP_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/esp32s3-gpio-sigmap.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 4,959 |
```objective-c
/*
*
*
* NOTE: Autogenerated file using esp_genpinctrl.py
*/
#ifndef INC_DT_BINDS_PINCTRL_ESP32C6_PINCTRL_HAL_H_
#define INC_DT_BINDS_PINCTRL_ESP32C6_PINCTRL_HAL_H_
/* LEDC_CH0 */
#define LEDC_CH0_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
/* LEDC_CH1 */
#define LEDC_CH1_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
/* LEDC_CH2 */
#define LEDC_CH2_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
/* LEDC_CH3 */
#define LEDC_CH3_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
/* LEDC_CH4 */
#define LEDC_CH4_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
/* LEDC_CH5 */
#define LEDC_CH5_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
/* SPIM2_CSEL */
#define SPIM2_CSEL_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_FSPICS0_OUT)
/* SPIM2_CSEL1 */
#define SPIM2_CSEL1_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_FSPICS1_OUT)
/* SPIM2_CSEL2 */
#define SPIM2_CSEL2_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_FSPICS2_OUT)
/* SPIM2_CSEL3 */
#define SPIM2_CSEL3_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_FSPICS3_OUT)
/* SPIM2_CSEL4 */
#define SPIM2_CSEL4_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_FSPICS4_OUT)
/* SPIM2_CSEL5 */
#define SPIM2_CSEL5_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_FSPICS5_OUT)
/* SPIM2_MISO */
#define SPIM2_MISO_GPIO0 \
ESP32_PINMUX(0, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO1 \
ESP32_PINMUX(1, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO2 \
ESP32_PINMUX(2, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO3 \
ESP32_PINMUX(3, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO4 \
ESP32_PINMUX(4, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO5 \
ESP32_PINMUX(5, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO6 \
ESP32_PINMUX(6, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO7 \
ESP32_PINMUX(7, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO8 \
ESP32_PINMUX(8, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO9 \
ESP32_PINMUX(9, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO10 \
ESP32_PINMUX(10, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO11 \
ESP32_PINMUX(11, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO12 \
ESP32_PINMUX(12, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO13 \
ESP32_PINMUX(13, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO14 \
ESP32_PINMUX(14, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO15 \
ESP32_PINMUX(15, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO16 \
ESP32_PINMUX(16, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO17 \
ESP32_PINMUX(17, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO18 \
ESP32_PINMUX(18, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO19 \
ESP32_PINMUX(19, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO20 \
ESP32_PINMUX(20, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO21 \
ESP32_PINMUX(21, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO22 \
ESP32_PINMUX(22, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO23 \
ESP32_PINMUX(23, ESP_FSPIQ_IN, ESP_NOSIG)
/* SPIM2_MOSI */
#define SPIM2_MOSI_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_FSPID_OUT)
/* SPIM2_SCLK */
#define SPIM2_SCLK_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_FSPICLK_OUT)
/* UART0_CTS */
#define UART0_CTS_GPIO0 \
ESP32_PINMUX(0, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO1 \
ESP32_PINMUX(1, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO2 \
ESP32_PINMUX(2, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO3 \
ESP32_PINMUX(3, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO4 \
ESP32_PINMUX(4, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO5 \
ESP32_PINMUX(5, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO6 \
ESP32_PINMUX(6, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO7 \
ESP32_PINMUX(7, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO8 \
ESP32_PINMUX(8, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO9 \
ESP32_PINMUX(9, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO10 \
ESP32_PINMUX(10, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO11 \
ESP32_PINMUX(11, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO12 \
ESP32_PINMUX(12, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO13 \
ESP32_PINMUX(13, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO14 \
ESP32_PINMUX(14, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO15 \
ESP32_PINMUX(15, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO16 \
ESP32_PINMUX(16, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO17 \
ESP32_PINMUX(17, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO18 \
ESP32_PINMUX(18, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO19 \
ESP32_PINMUX(19, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO20 \
ESP32_PINMUX(20, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO21 \
ESP32_PINMUX(21, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO22 \
ESP32_PINMUX(22, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO23 \
ESP32_PINMUX(23, ESP_U0CTS_IN, ESP_NOSIG)
/* UART0_DSR */
#define UART0_DSR_GPIO0 \
ESP32_PINMUX(0, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO1 \
ESP32_PINMUX(1, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO2 \
ESP32_PINMUX(2, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO3 \
ESP32_PINMUX(3, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO4 \
ESP32_PINMUX(4, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO5 \
ESP32_PINMUX(5, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO6 \
ESP32_PINMUX(6, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO7 \
ESP32_PINMUX(7, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO8 \
ESP32_PINMUX(8, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO9 \
ESP32_PINMUX(9, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO10 \
ESP32_PINMUX(10, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO11 \
ESP32_PINMUX(11, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO12 \
ESP32_PINMUX(12, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO13 \
ESP32_PINMUX(13, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO14 \
ESP32_PINMUX(14, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO15 \
ESP32_PINMUX(15, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO16 \
ESP32_PINMUX(16, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO17 \
ESP32_PINMUX(17, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO18 \
ESP32_PINMUX(18, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO19 \
ESP32_PINMUX(19, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO20 \
ESP32_PINMUX(20, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO21 \
ESP32_PINMUX(21, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO22 \
ESP32_PINMUX(22, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO23 \
ESP32_PINMUX(23, ESP_U0DSR_IN, ESP_NOSIG)
/* UART0_DTR */
#define UART0_DTR_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_U0DTR_OUT)
/* UART0_RTS */
#define UART0_RTS_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_U0RTS_OUT)
/* UART0_RX */
#define UART0_RX_GPIO0 \
ESP32_PINMUX(0, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO1 \
ESP32_PINMUX(1, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO2 \
ESP32_PINMUX(2, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO3 \
ESP32_PINMUX(3, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO4 \
ESP32_PINMUX(4, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO5 \
ESP32_PINMUX(5, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO6 \
ESP32_PINMUX(6, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO7 \
ESP32_PINMUX(7, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO8 \
ESP32_PINMUX(8, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO9 \
ESP32_PINMUX(9, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO10 \
ESP32_PINMUX(10, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO11 \
ESP32_PINMUX(11, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO12 \
ESP32_PINMUX(12, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO13 \
ESP32_PINMUX(13, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO14 \
ESP32_PINMUX(14, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO15 \
ESP32_PINMUX(15, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO16 \
ESP32_PINMUX(16, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO17 \
ESP32_PINMUX(17, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO18 \
ESP32_PINMUX(18, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO19 \
ESP32_PINMUX(19, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO20 \
ESP32_PINMUX(20, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO21 \
ESP32_PINMUX(21, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO22 \
ESP32_PINMUX(22, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO23 \
ESP32_PINMUX(23, ESP_U0RXD_IN, ESP_NOSIG)
/* UART0_TX */
#define UART0_TX_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_U0TXD_OUT)
/* UART1_CTS */
#define UART1_CTS_GPIO0 \
ESP32_PINMUX(0, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO1 \
ESP32_PINMUX(1, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO2 \
ESP32_PINMUX(2, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO3 \
ESP32_PINMUX(3, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO4 \
ESP32_PINMUX(4, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO5 \
ESP32_PINMUX(5, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO6 \
ESP32_PINMUX(6, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO7 \
ESP32_PINMUX(7, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO8 \
ESP32_PINMUX(8, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO9 \
ESP32_PINMUX(9, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO10 \
ESP32_PINMUX(10, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO11 \
ESP32_PINMUX(11, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO12 \
ESP32_PINMUX(12, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO13 \
ESP32_PINMUX(13, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO14 \
ESP32_PINMUX(14, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO15 \
ESP32_PINMUX(15, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO16 \
ESP32_PINMUX(16, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO17 \
ESP32_PINMUX(17, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO18 \
ESP32_PINMUX(18, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO19 \
ESP32_PINMUX(19, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO20 \
ESP32_PINMUX(20, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO21 \
ESP32_PINMUX(21, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO22 \
ESP32_PINMUX(22, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO23 \
ESP32_PINMUX(23, ESP_U1CTS_IN, ESP_NOSIG)
/* UART1_DSR */
#define UART1_DSR_GPIO0 \
ESP32_PINMUX(0, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO1 \
ESP32_PINMUX(1, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO2 \
ESP32_PINMUX(2, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO3 \
ESP32_PINMUX(3, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO4 \
ESP32_PINMUX(4, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO5 \
ESP32_PINMUX(5, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO6 \
ESP32_PINMUX(6, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO7 \
ESP32_PINMUX(7, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO8 \
ESP32_PINMUX(8, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO9 \
ESP32_PINMUX(9, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO10 \
ESP32_PINMUX(10, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO11 \
ESP32_PINMUX(11, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO12 \
ESP32_PINMUX(12, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO13 \
ESP32_PINMUX(13, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO14 \
ESP32_PINMUX(14, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO15 \
ESP32_PINMUX(15, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO16 \
ESP32_PINMUX(16, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO17 \
ESP32_PINMUX(17, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO18 \
ESP32_PINMUX(18, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO19 \
ESP32_PINMUX(19, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO20 \
ESP32_PINMUX(20, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO21 \
ESP32_PINMUX(21, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO22 \
ESP32_PINMUX(22, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO23 \
ESP32_PINMUX(23, ESP_U1DSR_IN, ESP_NOSIG)
/* UART1_DTR */
#define UART1_DTR_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_U1DTR_OUT)
/* UART1_RTS */
#define UART1_RTS_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_U1RTS_OUT)
/* UART1_RX */
#define UART1_RX_GPIO0 \
ESP32_PINMUX(0, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO1 \
ESP32_PINMUX(1, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO2 \
ESP32_PINMUX(2, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO3 \
ESP32_PINMUX(3, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO4 \
ESP32_PINMUX(4, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO5 \
ESP32_PINMUX(5, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO6 \
ESP32_PINMUX(6, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO7 \
ESP32_PINMUX(7, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO8 \
ESP32_PINMUX(8, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO9 \
ESP32_PINMUX(9, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO10 \
ESP32_PINMUX(10, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO11 \
ESP32_PINMUX(11, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO12 \
ESP32_PINMUX(12, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO13 \
ESP32_PINMUX(13, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO14 \
ESP32_PINMUX(14, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO15 \
ESP32_PINMUX(15, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO16 \
ESP32_PINMUX(16, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO17 \
ESP32_PINMUX(17, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO18 \
ESP32_PINMUX(18, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO19 \
ESP32_PINMUX(19, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO20 \
ESP32_PINMUX(20, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO21 \
ESP32_PINMUX(21, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO22 \
ESP32_PINMUX(22, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO23 \
ESP32_PINMUX(23, ESP_U1RXD_IN, ESP_NOSIG)
/* UART1_TX */
#define UART1_TX_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_U1TXD_OUT)
#endif /* INC_DT_BINDS_PINCTRL_ESP32C6_PINCTRL_HAL_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/esp32c6-pinctrl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 18,701 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_MAX32_PINCTRL_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_MAX32_PINCTRL_H_
/**
* @brief Pin modes
*/
#define MAX32_MODE_GPIO 0x00
#define MAX32_MODE_AF1 0x01
#define MAX32_MODE_AF2 0x02
#define MAX32_MODE_AF3 0x03
#define MAX32_MODE_AF4 0x04
#define MAX32_MODE_AF5 0x05
/**
* @brief Mode, port, pin shift number
*/
#define MAX32_MODE_SHIFT 0U
#define MAX32_MODE_MASK 0x0FU
#define MAX32_PORT_SHIFT 4U
#define MAX32_PORT_MASK 0x0FU
#define MAX32_PIN_SHIFT 8U
#define MAX32_PIN_MASK 0xFFU
/**
* @brief Pin configuration bit field.
*
* Fields:
*
* - mode [ 0 : 3 ]
* - port [ 4 : 7 ]
* - pin [ 8 : 15 ]
*
* @param port Port (0 .. 15)
* @param pin Pin (0..31)
* @param mode Mode (GPIO, AF1, AF2...).
*/
#define MAX32_PINMUX(port, pin, mode) \
((((port)&MAX32_PORT_MASK) << MAX32_PORT_SHIFT) | \
(((pin)&MAX32_PIN_MASK) << MAX32_PIN_SHIFT) | \
(((MAX32_MODE_##mode) & MAX32_MODE_MASK) << MAX32_MODE_SHIFT))
#define MAX32_PINMUX_PORT(pinmux) (((pinmux) >> MAX32_PORT_SHIFT) & MAX32_PORT_MASK)
#define MAX32_PINMUX_PIN(pinmux) (((pinmux) >> MAX32_PIN_SHIFT) & MAX32_PIN_MASK)
#define MAX32_PINMUX_MODE(pinmux) (((pinmux) >> MAX32_MODE_SHIFT) & MAX32_MODE_MASK)
/* Selects the voltage rail used for the pin */
#define MAX32_VSEL_VDDIO 0
#define MAX32_VSEL_VDDIOH 1
/**
* @brief Pin configuration
*/
#define MAX32_INPUT_ENABLE_SHIFT 0x00
#define MAX32_BIAS_PULL_UP_SHIFT 0x01
#define MAX32_BIAS_PULL_DOWN_SHIFT 0x02
#define MAX32_OUTPUT_ENABLE_SHIFT 0x03
#define MAX32_POWER_SOURCE_SHIFT 0x04
#define MAX32_OUTPUT_HIGH_SHIFT 0x05
#define MAX32_DRV_STRENGTH_SHIFT 0x06 /* 2 bits */
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_MAX32_PINCTRL_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/max32-pinctrl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 574 |
```objective-c
/*
*
*/
#ifndef __APOLLO3_PINCTRL_H__
#define __APOLLO3_PINCTRL_H__
#define APOLLO3_ALT_FUNC_POS 0
#define APOLLO3_ALT_FUNC_MASK 0xf
#define APOLLO3_PIN_NUM_POS 4
#define APOLLO3_PIN_NUM_MASK 0x7f
#define APOLLO3_PINMUX(pin_num, alt_func) \
(pin_num << APOLLO3_PIN_NUM_POS | alt_func << APOLLO3_ALT_FUNC_POS)
#define SLSCL_P0 APOLLO3_PINMUX(0, 0)
#define SLSCK_P0 APOLLO3_PINMUX(0, 1)
#define CLKOUT_P0 APOLLO3_PINMUX(0, 2)
#define GPIO_P0 APOLLO3_PINMUX(0, 3)
#define MSPI0_4_P0 APOLLO3_PINMUX(0, 5)
#define NCE0_P0 APOLLO3_PINMUX(0, 7)
#define SLSDAWIR3_P1 APOLLO3_PINMUX(1, 0)
#define SLMOSI_P1 APOLLO3_PINMUX(1, 1)
#define UART0TX_P1 APOLLO3_PINMUX(1, 2)
#define GPIO_P1 APOLLO3_PINMUX(1, 3)
#define MSPI0_5_P1 APOLLO3_PINMUX(1, 5)
#define NCE1_P1 APOLLO3_PINMUX(1, 7)
#define UART1RX_P2 APOLLO3_PINMUX(2, 0)
#define SLMISO_P2 APOLLO3_PINMUX(2, 1)
#define UART0RX_P2 APOLLO3_PINMUX(2, 2)
#define GPIO_P2 APOLLO3_PINMUX(2, 3)
#define MSPI0_6_P2 APOLLO3_PINMUX(2, 5)
#define NCE2_P2 APOLLO3_PINMUX(2, 7)
#define UA0RTS_P3 APOLLO3_PINMUX(3, 0)
#define SLNCE_P3 APOLLO3_PINMUX(3, 1)
#define NCE3_P3 APOLLO3_PINMUX(3, 2)
#define GPIO_P3 APOLLO3_PINMUX(3, 3)
#define MSPI0_7_P3 APOLLO3_PINMUX(3, 5)
#define TRIG1_P3 APOLLO3_PINMUX(3, 6)
#define I2SWCLK_P3 APOLLO3_PINMUX(3, 7)
#define UA0CTS_P4 APOLLO3_PINMUX(4, 0)
#define SLINT_P4 APOLLO3_PINMUX(4, 1)
#define NCE4_P4 APOLLO3_PINMUX(4, 2)
#define GPIO_P4 APOLLO3_PINMUX(4, 3)
#define UART1RX_P4 APOLLO3_PINMUX(4, 5)
#define CTIM17_P4 APOLLO3_PINMUX(4, 6)
#define MSPI0_2_P4 APOLLO3_PINMUX(4, 7)
#define M0SCL_P5 APOLLO3_PINMUX(5, 0)
#define M0SCK_P5 APOLLO3_PINMUX(5, 1)
#define UA0RTS_P5 APOLLO3_PINMUX(5, 2)
#define GPIO_P5 APOLLO3_PINMUX(5, 3)
#define CT8_P5 APOLLO3_PINMUX(5, 7)
#define M0SDAWIR3_P6 APOLLO3_PINMUX(6, 0)
#define M0MISO_P6 APOLLO3_PINMUX(6, 1)
#define UA0CTS_P6 APOLLO3_PINMUX(6, 2)
#define GPIO_P6 APOLLO3_PINMUX(6, 3)
#define CTIM10_P6 APOLLO3_PINMUX(6, 5)
#define I2SDAT_P6 APOLLO3_PINMUX(6, 7)
#define NCE7_P7 APOLLO3_PINMUX(7, 0)
#define M0MOSI_P7 APOLLO3_PINMUX(7, 1)
#define CLKOUT_P7 APOLLO3_PINMUX(7, 2)
#define GPIO_P7 APOLLO3_PINMUX(7, 3)
#define TRIG0_P7 APOLLO3_PINMUX(7, 4)
#define UART0TX_P7 APOLLO3_PINMUX(7, 5)
#define CTIM19_P7 APOLLO3_PINMUX(7, 7)
#define M1SCL_P8 APOLLO3_PINMUX(8, 0)
#define M1SCK_P8 APOLLO3_PINMUX(8, 1)
#define NCE8_P8 APOLLO3_PINMUX(8, 2)
#define GPIO_P8 APOLLO3_PINMUX(8, 3)
#define SCCCLK_P8 APOLLO3_PINMUX(8, 4)
#define UART1TX_P8 APOLLO3_PINMUX(8, 6)
#define M1SDAWIR3_P9 APOLLO3_PINMUX(9, 0)
#define M1MISO_P9 APOLLO3_PINMUX(9, 1)
#define NCE9_P9 APOLLO3_PINMUX(9, 2)
#define GPIO_P9 APOLLO3_PINMUX(9, 3)
#define SCCIO_P9 APOLLO3_PINMUX(9, 4)
#define UART1RX_P9 APOLLO3_PINMUX(9, 6)
#define UART1TX_P10 APOLLO3_PINMUX(10, 0)
#define M1MOSI_P10 APOLLO3_PINMUX(10, 1)
#define NCE10_P10 APOLLO3_PINMUX(10, 2)
#define GPIO_P10 APOLLO3_PINMUX(10, 3)
#define PDMCLK_P10 APOLLO3_PINMUX(10, 4)
#define UA1RTS_P10 APOLLO3_PINMUX(10, 6)
#define ADCSE2_P11 APOLLO3_PINMUX(11, 0)
#define NCE11_P11 APOLLO3_PINMUX(11, 1)
#define CTIM31_P11 APOLLO3_PINMUX(11, 2)
#define GPIO_P11 APOLLO3_PINMUX(11, 3)
#define SLINT_P11 APOLLO3_PINMUX(11, 4)
#define UA1CTS_P11 APOLLO3_PINMUX(11, 5)
#define UART0RX_P11 APOLLO3_PINMUX(11, 6)
#define PDMDATA_P11 APOLLO3_PINMUX(11, 7)
#define ADCD0NSE9_P12 APOLLO3_PINMUX(12, 0)
#define NCE12_P12 APOLLO3_PINMUX(12, 1)
#define CT0_P12 APOLLO3_PINMUX(12, 2)
#define GPIO_P12 APOLLO3_PINMUX(12, 3)
#define PDMCLK_P12 APOLLO3_PINMUX(12, 5)
#define UA0CTS_P12 APOLLO3_PINMUX(12, 6)
#define UART1TX_P12 APOLLO3_PINMUX(12, 7)
#define ADCD0PSE8_P13 APOLLO3_PINMUX(13, 0)
#define NCE13_P13 APOLLO3_PINMUX(13, 1)
#define CTIM2_P13 APOLLO3_PINMUX(13, 2)
#define GPIO_P13 APOLLO3_PINMUX(13, 3)
#define I2SBCLK_P13 APOLLO3_PINMUX(13, 4)
#define UA0RTS_P13 APOLLO3_PINMUX(13, 6)
#define UART1RX_P13 APOLLO3_PINMUX(13, 7)
#define ADCD1P_P14 APOLLO3_PINMUX(14, 0)
#define NCE14_P14 APOLLO3_PINMUX(14, 1)
#define UART1TX_P14 APOLLO3_PINMUX(14, 2)
#define GPIO_P14 APOLLO3_PINMUX(14, 3)
#define PDMCLK_P14 APOLLO3_PINMUX(14, 4)
#define SWDCK_P14 APOLLO3_PINMUX(14, 6)
#define XT32KHz_P14 APOLLO3_PINMUX(14, 7)
#define ADCD1N_P15 APOLLO3_PINMUX(15, 0)
#define NCE15_P15 APOLLO3_PINMUX(15, 1)
#define UART1RX_P15 APOLLO3_PINMUX(15, 2)
#define GPIO_P15 APOLLO3_PINMUX(15, 3)
#define PDMDATA_P15 APOLLO3_PINMUX(15, 4)
#define SWDIO_P15 APOLLO3_PINMUX(15, 6)
#define SWO_P15 APOLLO3_PINMUX(15, 7)
#define ADCSE0_P16 APOLLO3_PINMUX(16, 0)
#define NCE16_P16 APOLLO3_PINMUX(16, 1)
#define TRIG0_P16 APOLLO3_PINMUX(16, 2)
#define GPIO_P16 APOLLO3_PINMUX(16, 3)
#define SCCRST_P16 APOLLO3_PINMUX(16, 4)
#define CMPIN0_P16 APOLLO3_PINMUX(16, 5)
#define UART0TX_P16 APOLLO3_PINMUX(16, 6)
#define UA1RTS_P16 APOLLO3_PINMUX(16, 7)
#define CMPRF1_P17 APOLLO3_PINMUX(17, 0)
#define NCE17_P17 APOLLO3_PINMUX(17, 1)
#define TRIG1_P17 APOLLO3_PINMUX(17, 2)
#define GPIO_P17 APOLLO3_PINMUX(17, 3)
#define SCCCLK_P17 APOLLO3_PINMUX(17, 4)
#define UART0RX_P17 APOLLO3_PINMUX(17, 6)
#define UA1CTS_P17 APOLLO3_PINMUX(17, 7)
#define CMPIN1_P18 APOLLO3_PINMUX(18, 0)
#define NCE18_P18 APOLLO3_PINMUX(18, 1)
#define CTIM4_P18 APOLLO3_PINMUX(18, 2)
#define GPIO_P18 APOLLO3_PINMUX(18, 3)
#define UA0RTS_P18 APOLLO3_PINMUX(18, 4)
#define UART1TX_P18 APOLLO3_PINMUX(18, 6)
#define SCCIO_P18 APOLLO3_PINMUX(18, 7)
#define CMPRF0_P19 APOLLO3_PINMUX(19, 0)
#define NCE19_P19 APOLLO3_PINMUX(19, 1)
#define CTIM6_P19 APOLLO3_PINMUX(19, 2)
#define GPIO_P19 APOLLO3_PINMUX(19, 3)
#define SCCCLK_P19 APOLLO3_PINMUX(19, 4)
#define UART1RX_P19 APOLLO3_PINMUX(19, 6)
#define I2SBCLK_P19 APOLLO3_PINMUX(19, 7)
#define SWDCK_P20 APOLLO3_PINMUX(20, 0)
#define NCE20_P20 APOLLO3_PINMUX(20, 1)
#define GPIO_P20 APOLLO3_PINMUX(20, 3)
#define UART0TX_P20 APOLLO3_PINMUX(20, 4)
#define UART1TX_P20 APOLLO3_PINMUX(20, 5)
#define I2SBCLK_P20 APOLLO3_PINMUX(20, 6)
#define UA1RTS_P20 APOLLO3_PINMUX(20, 7)
#define SWDIO_P21 APOLLO3_PINMUX(21, 0)
#define NCE21_P21 APOLLO3_PINMUX(21, 1)
#define GPIO_P21 APOLLO3_PINMUX(21, 3)
#define UART0RX_P21 APOLLO3_PINMUX(21, 4)
#define UART1RX_P21 APOLLO3_PINMUX(21, 5)
#define SCCRST_P21 APOLLO3_PINMUX(21, 6)
#define UA1CTS_P21 APOLLO3_PINMUX(21, 7)
#define UART0TX_P22 APOLLO3_PINMUX(22, 0)
#define NCE22_P22 APOLLO3_PINMUX(22, 1)
#define CTIM12_P22 APOLLO3_PINMUX(22, 2)
#define GPIO_P22 APOLLO3_PINMUX(22, 3)
#define PDMCLK_P22 APOLLO3_PINMUX(22, 4)
#define MSPI0_0_P22 APOLLO3_PINMUX(22, 6)
#define SWO_P22 APOLLO3_PINMUX(22, 7)
#define UART0RX_P23 APOLLO3_PINMUX(23, 0)
#define NCE23_P23 APOLLO3_PINMUX(23, 1)
#define CTIM14_P23 APOLLO3_PINMUX(23, 2)
#define GPIO_P23 APOLLO3_PINMUX(23, 3)
#define I2SWCLK_P23 APOLLO3_PINMUX(23, 4)
#define CMPOUT_P23 APOLLO3_PINMUX(23, 5)
#define MSPI0_3_P23 APOLLO3_PINMUX(23, 6)
#define UART1TX_P24 APOLLO3_PINMUX(24, 0)
#define NCE24_P24 APOLLO3_PINMUX(24, 1)
#define MSPI0_8_P24 APOLLO3_PINMUX(24, 2)
#define GPIO_P24 APOLLO3_PINMUX(24, 3)
#define UA0CTS_P24 APOLLO3_PINMUX(24, 4)
#define CTIM21_P24 APOLLO3_PINMUX(24, 5)
#define XT32KHz_P24 APOLLO3_PINMUX(24, 6)
#define SWO_P24 APOLLO3_PINMUX(24, 7)
#define UART1RX_P25 APOLLO3_PINMUX(25, 0)
#define NCE25_P25 APOLLO3_PINMUX(25, 1)
#define CTIM1_P25 APOLLO3_PINMUX(25, 2)
#define GPIO_P25 APOLLO3_PINMUX(25, 3)
#define M2SDAWIR3_P25 APOLLO3_PINMUX(25, 4)
#define M2MISO_P25 APOLLO3_PINMUX(25, 5)
#define NCE26_P26 APOLLO3_PINMUX(26, 1)
#define CTIM3_P26 APOLLO3_PINMUX(26, 2)
#define GPIO_P26 APOLLO3_PINMUX(26, 3)
#define SCCRST_P26 APOLLO3_PINMUX(26, 4)
#define MSPI0_1_P26 APOLLO3_PINMUX(26, 5)
#define UART0TX_P26 APOLLO3_PINMUX(26, 6)
#define UA1CTS_P26 APOLLO3_PINMUX(26, 7)
#define UART0RX_P27 APOLLO3_PINMUX(27, 0)
#define NCE27_P27 APOLLO3_PINMUX(27, 1)
#define CTIM5_P27 APOLLO3_PINMUX(27, 2)
#define GPIO_P27 APOLLO3_PINMUX(27, 3)
#define M2SCL_P27 APOLLO3_PINMUX(27, 4)
#define M2SCK_P27 APOLLO3_PINMUX(27, 5)
#define I2SWCLK_P28 APOLLO3_PINMUX(28, 0)
#define NCE28_P28 APOLLO3_PINMUX(28, 1)
#define CTIM7_P28 APOLLO3_PINMUX(28, 2)
#define GPIO_P28 APOLLO3_PINMUX(28, 3)
#define M2MOSI_P28 APOLLO3_PINMUX(28, 5)
#define UART0TX_P28 APOLLO3_PINMUX(28, 6)
#define ADCSE1_P29 APOLLO3_PINMUX(29, 0)
#define NCE29_P29 APOLLO3_PINMUX(29, 1)
#define CTIM9_P29 APOLLO3_PINMUX(29, 2)
#define GPIO_P29 APOLLO3_PINMUX(29, 3)
#define UA0CTS_P29 APOLLO3_PINMUX(29, 4)
#define UA1CTS_P29 APOLLO3_PINMUX(29, 5)
#define UART0RX_P29 APOLLO3_PINMUX(29, 6)
#define PDMDATA_P29 APOLLO3_PINMUX(29, 7)
#define NCE30_P30 APOLLO3_PINMUX(30, 1)
#define CTIM11_P30 APOLLO3_PINMUX(30, 2)
#define GPIO_P30 APOLLO3_PINMUX(30, 3)
#define UART0TX_P30 APOLLO3_PINMUX(30, 4)
#define UA1RTS_P30 APOLLO3_PINMUX(30, 5)
#define BLEIF_SCK_P30 APOLLO3_PINMUX(30, 6)
#define I2SDAT_P30 APOLLO3_PINMUX(30, 7)
#define ADCSE3_P31 APOLLO3_PINMUX(31, 0)
#define NCE31_P31 APOLLO3_PINMUX(31, 1)
#define CTIM13_P31 APOLLO3_PINMUX(31, 2)
#define GPIO_P31 APOLLO3_PINMUX(31, 3)
#define UART0RX_P31 APOLLO3_PINMUX(31, 4)
#define SCCCLK_P31 APOLLO3_PINMUX(31, 5)
#define BLEIF_MISO_P31 APOLLO3_PINMUX(31, 6)
#define UA1RTS_P31 APOLLO3_PINMUX(31, 7)
#define ADCSE4_P32 APOLLO3_PINMUX(32, 0)
#define NCE32_P32 APOLLO3_PINMUX(32, 1)
#define CTIM15_P32 APOLLO3_PINMUX(32, 2)
#define GPIO_P32 APOLLO3_PINMUX(32, 3)
#define SCCIO_P32 APOLLO3_PINMUX(32, 4)
#define BLEIF_MOSI_P32 APOLLO3_PINMUX(32, 6)
#define UA1CTS_P32 APOLLO3_PINMUX(32, 7)
#define ADCSE5_P33 APOLLO3_PINMUX(33, 0)
#define NCE33_P33 APOLLO3_PINMUX(33, 1)
#define XT32KHz_P33 APOLLO3_PINMUX(33, 2)
#define GPIO_P33 APOLLO3_PINMUX(33, 3)
#define BLEIF_CSN_P33 APOLLO3_PINMUX(33, 4)
#define UA0CTS_P33 APOLLO3_PINMUX(33, 5)
#define CTIM23_P33 APOLLO3_PINMUX(33, 6)
#define SWO_P33 APOLLO3_PINMUX(33, 7)
#define ADCSE6_P34 APOLLO3_PINMUX(34, 0)
#define NCE34_P34 APOLLO3_PINMUX(34, 1)
#define UA1RTS_P34 APOLLO3_PINMUX(34, 2)
#define GPIO_P34 APOLLO3_PINMUX(34, 3)
#define CMPRF2_P34 APOLLO3_PINMUX(34, 4)
#define UA0RTS_P34 APOLLO3_PINMUX(34, 5)
#define UART0RX_P34 APOLLO3_PINMUX(34, 6)
#define PDMDATA_P34 APOLLO3_PINMUX(34, 7)
#define ADCSE7_P35 APOLLO3_PINMUX(35, 0)
#define NCE35_P35 APOLLO3_PINMUX(35, 1)
#define UART1TX_P35 APOLLO3_PINMUX(35, 2)
#define GPIO_P35 APOLLO3_PINMUX(35, 3)
#define I2SDAT_P35 APOLLO3_PINMUX(35, 4)
#define CTIM27_P35 APOLLO3_PINMUX(35, 5)
#define UA0RTS_P35 APOLLO3_PINMUX(35, 6)
#define BLEIF_STATUS_P35 APOLLO3_PINMUX(35, 7)
#define TRIG1_P36 APOLLO3_PINMUX(36, 0)
#define NCE36_P36 APOLLO3_PINMUX(36, 1)
#define UART1RX_P36 APOLLO3_PINMUX(36, 2)
#define GPIO_P36 APOLLO3_PINMUX(36, 3)
#define XT32KHz_P36 APOLLO3_PINMUX(36, 4)
#define UA1CTS_P36 APOLLO3_PINMUX(36, 5)
#define UA0CTS_P36 APOLLO3_PINMUX(36, 6)
#define PDMDATA_P36 APOLLO3_PINMUX(36, 7)
#define TRIG2_P37 APOLLO3_PINMUX(37, 0)
#define NCE37_P37 APOLLO3_PINMUX(37, 1)
#define UA0RTS_P37 APOLLO3_PINMUX(37, 2)
#define GPIO_P37 APOLLO3_PINMUX(37, 3)
#define SCCIO_P37 APOLLO3_PINMUX(37, 4)
#define UART1TX_P37 APOLLO3_PINMUX(37, 5)
#define PDMCLK_P37 APOLLO3_PINMUX(37, 6)
#define CTIM29_P37 APOLLO3_PINMUX(37, 7)
#define TRIG3_P38 APOLLO3_PINMUX(38, 0)
#define NCE38_P38 APOLLO3_PINMUX(38, 1)
#define UA0CTS_P38 APOLLO3_PINMUX(38, 2)
#define GPIO_P38 APOLLO3_PINMUX(38, 3)
#define M3MOSI_P38 APOLLO3_PINMUX(38, 5)
#define UART1RX_P38 APOLLO3_PINMUX(38, 6)
#define UART0TX_P39 APOLLO3_PINMUX(39, 0)
#define UART1TX_P39 APOLLO3_PINMUX(39, 1)
#define CTIM25_P39 APOLLO3_PINMUX(39, 2)
#define GPIO_P39 APOLLO3_PINMUX(39, 3)
#define M4SCL_P39 APOLLO3_PINMUX(39, 4)
#define M4SCK_P39 APOLLO3_PINMUX(39, 5)
#define UART0RX_P40 APOLLO3_PINMUX(40, 0)
#define UART1RX_P40 APOLLO3_PINMUX(40, 1)
#define TRIG0_P40 APOLLO3_PINMUX(40, 2)
#define GPIO_P40 APOLLO3_PINMUX(40, 3)
#define M4SDAWIR3_P40 APOLLO3_PINMUX(40, 4)
#define M4MISO_P40 APOLLO3_PINMUX(40, 5)
#define NCE41_P41 APOLLO3_PINMUX(41, 0)
#define BLEIF_IRQ_P41 APOLLO3_PINMUX(41, 1)
#define SWO_P41 APOLLO3_PINMUX(41, 2)
#define GPIO_P41 APOLLO3_PINMUX(41, 3)
#define I2SWCLK_P41 APOLLO3_PINMUX(41, 4)
#define UA1RTS_P41 APOLLO3_PINMUX(41, 5)
#define UART0TX_P41 APOLLO3_PINMUX(41, 6)
#define UA0RTS_P41 APOLLO3_PINMUX(41, 7)
#define UART1TX_P42 APOLLO3_PINMUX(42, 0)
#define NCE42_P42 APOLLO3_PINMUX(42, 1)
#define CTIM16_P42 APOLLO3_PINMUX(42, 2)
#define GPIO_P42 APOLLO3_PINMUX(42, 3)
#define M3SCL_P42 APOLLO3_PINMUX(42, 4)
#define M3SCK_P42 APOLLO3_PINMUX(42, 5)
#define UART1RX_P43 APOLLO3_PINMUX(43, 0)
#define NCE43_P43 APOLLO3_PINMUX(43, 1)
#define CTIM18_P43 APOLLO3_PINMUX(43, 2)
#define GPIO_P43 APOLLO3_PINMUX(43, 3)
#define M3SDAWIR3_P43 APOLLO3_PINMUX(43, 4)
#define M3MISO_P43 APOLLO3_PINMUX(43, 5)
#define UA1RTS_P44 APOLLO3_PINMUX(44, 0)
#define NCE44_P44 APOLLO3_PINMUX(44, 1)
#define CTIM20_P44 APOLLO3_PINMUX(44, 2)
#define GPIO_P44 APOLLO3_PINMUX(44, 3)
#define M4MOSI_P44 APOLLO3_PINMUX(44, 5)
#define UART0TX_P44 APOLLO3_PINMUX(44, 6)
#define UA1CTS_P45 APOLLO3_PINMUX(45, 0)
#define NCE45_P45 APOLLO3_PINMUX(45, 1)
#define CTIM22_P45 APOLLO3_PINMUX(45, 2)
#define GPIO_P45 APOLLO3_PINMUX(45, 3)
#define I2SDAT_P45 APOLLO3_PINMUX(45, 4)
#define PDMDATA_P45 APOLLO3_PINMUX(45, 5)
#define UART0RX_P45 APOLLO3_PINMUX(45, 6)
#define SWO_P45 APOLLO3_PINMUX(45, 7)
#define I2SBCLK_P46 APOLLO3_PINMUX(46, 0)
#define NCE46_P46 APOLLO3_PINMUX(46, 1)
#define CTIM24_P46 APOLLO3_PINMUX(46, 2)
#define GPIO_P46 APOLLO3_PINMUX(46, 3)
#define SCCRST_P46 APOLLO3_PINMUX(46, 4)
#define PDMCLK_P46 APOLLO3_PINMUX(46, 5)
#define UART1TX_P46 APOLLO3_PINMUX(46, 6)
#define SWO_P46 APOLLO3_PINMUX(46, 7)
#define XT32KHz_P47 APOLLO3_PINMUX(47, 0)
#define NCE47_P47 APOLLO3_PINMUX(47, 1)
#define CTIM26_P47 APOLLO3_PINMUX(47, 2)
#define GPIO_P47 APOLLO3_PINMUX(47, 3)
#define M5MOSI_P47 APOLLO3_PINMUX(47, 5)
#define UART1RX_P47 APOLLO3_PINMUX(47, 6)
#define UART0TX_P48 APOLLO3_PINMUX(48, 0)
#define NCE48_P48 APOLLO3_PINMUX(48, 1)
#define CTIM28_P48 APOLLO3_PINMUX(48, 2)
#define GPIO_P48 APOLLO3_PINMUX(48, 3)
#define M5SCL_P48 APOLLO3_PINMUX(48, 4)
#define M5SCK_P48 APOLLO3_PINMUX(48, 5)
#define UART0RX_P49 APOLLO3_PINMUX(49, 0)
#define NCE49_P49 APOLLO3_PINMUX(49, 1)
#define CTIM30_P49 APOLLO3_PINMUX(49, 2)
#define GPIO_P49 APOLLO3_PINMUX(49, 3)
#define M5SDAWIR3_P49 APOLLO3_PINMUX(49, 4)
#define M5MISO_P49 APOLLO3_PINMUX(49, 5)
#define SWO_P50 APOLLO3_PINMUX(50, 0)
#define NCE50_P50 APOLLO3_PINMUX(50, 1)
#define CT0_P50 APOLLO3_PINMUX(50, 2)
#define GPIO_P50 APOLLO3_PINMUX(50, 3)
#define UART0TX_P50 APOLLO3_PINMUX(50, 4)
#define UART0RX_P50 APOLLO3_PINMUX(50, 5)
#define UART1TX_P50 APOLLO3_PINMUX(50, 6)
#define UART1RX_P50 APOLLO3_PINMUX(50, 7)
#define MSPI1_0_P51 APOLLO3_PINMUX(51, 0)
#define NCE51_P51 APOLLO3_PINMUX(51, 1)
#define CTIM1_P51 APOLLO3_PINMUX(51, 2)
#define GPIO_P51 APOLLO3_PINMUX(51, 3)
#define MSPI1_1_P52 APOLLO3_PINMUX(52, 0)
#define NCE52_P52 APOLLO3_PINMUX(52, 1)
#define CTIM2_P52 APOLLO3_PINMUX(52, 2)
#define GPIO_P52 APOLLO3_PINMUX(52, 3)
#define MSPI1_2_P53 APOLLO3_PINMUX(53, 0)
#define NCE53_P53 APOLLO3_PINMUX(53, 1)
#define CTIM3_P53 APOLLO3_PINMUX(53, 2)
#define GPIO_P53 APOLLO3_PINMUX(53, 3)
#define MSPI1_3_P54 APOLLO3_PINMUX(54, 0)
#define NCE54_P54 APOLLO3_PINMUX(54, 1)
#define CTIM4_P54 APOLLO3_PINMUX(54, 2)
#define GPIO_P54 APOLLO3_PINMUX(54, 3)
#define MSPI1_4_P55 APOLLO3_PINMUX(55, 0)
#define NCE55_P55 APOLLO3_PINMUX(55, 1)
#define CTIM5_P55 APOLLO3_PINMUX(55, 2)
#define GPIO_P55 APOLLO3_PINMUX(55, 3)
#define MSPI1_5_P56 APOLLO3_PINMUX(56, 0)
#define NCE56_P56 APOLLO3_PINMUX(56, 1)
#define CTIM6_P56 APOLLO3_PINMUX(56, 2)
#define GPIO_P56 APOLLO3_PINMUX(56, 3)
#define MSPI1_6_P57 APOLLO3_PINMUX(57, 0)
#define NCE57_P57 APOLLO3_PINMUX(57, 1)
#define CTIM7_P57 APOLLO3_PINMUX(57, 2)
#define GPIO_P57 APOLLO3_PINMUX(57, 3)
#define MSPI1_7_P58 APOLLO3_PINMUX(58, 0)
#define NCE58_P58 APOLLO3_PINMUX(58, 1)
#define CTIM8_P58 APOLLO3_PINMUX(58, 2)
#define GPIO_P58 APOLLO3_PINMUX(58, 3)
#define MSPI1_8_P59 APOLLO3_PINMUX(59, 0)
#define NCE59_P59 APOLLO3_PINMUX(59, 1)
#define CTIM9_P59 APOLLO3_PINMUX(59, 2)
#define GPIO_P59 APOLLO3_PINMUX(59, 3)
#define MSPI1_9_P60 APOLLO3_PINMUX(60, 0)
#define NCE60_P60 APOLLO3_PINMUX(60, 1)
#define CTIM10_P60 APOLLO3_PINMUX(60, 2)
#define GPIO_P60 APOLLO3_PINMUX(60, 3)
#define SWO_P61 APOLLO3_PINMUX(61, 0)
#define NCE61_P61 APOLLO3_PINMUX(61, 1)
#define CTIM11_P61 APOLLO3_PINMUX(61, 2)
#define GPIO_P61 APOLLO3_PINMUX(61, 3)
#define UART0TX_P61 APOLLO3_PINMUX(61, 4)
#define UART0RX_P61 APOLLO3_PINMUX(61, 5)
#define UART1TX_P61 APOLLO3_PINMUX(61, 6)
#define UART1RX_P61 APOLLO3_PINMUX(61, 7)
#define SWO_P62 APOLLO3_PINMUX(62, 0)
#define NCE62_P62 APOLLO3_PINMUX(62, 1)
#define CTIM12_P62 APOLLO3_PINMUX(62, 2)
#define GPIO_P62 APOLLO3_PINMUX(62, 3)
#define UA0CTS_P62 APOLLO3_PINMUX(62, 4)
#define UA0RTS_P62 APOLLO3_PINMUX(62, 5)
#define UA1CTS_P62 APOLLO3_PINMUX(62, 6)
#define UA1RTS_P62 APOLLO3_PINMUX(62, 7)
#define SWO_P63 APOLLO3_PINMUX(63, 0)
#define NCE63_P63 APOLLO3_PINMUX(63, 1)
#define CTIM13_P63 APOLLO3_PINMUX(63, 2)
#define GPIO_P63 APOLLO3_PINMUX(63, 3)
#define UA0CTS_P63 APOLLO3_PINMUX(63, 4)
#define UA0RTS_P63 APOLLO3_PINMUX(63, 5)
#define UA1CTS_P63 APOLLO3_PINMUX(63, 6)
#define UA1RTS_P63 APOLLO3_PINMUX(63, 7)
#define MSPI2_0_P64 APOLLO3_PINMUX(64, 0)
#define NCE64_P64 APOLLO3_PINMUX(64, 1)
#define CTIM14_P64 APOLLO3_PINMUX(64, 2)
#define GPIO_P64 APOLLO3_PINMUX(64, 3)
#define MSPI2_1_P65 APOLLO3_PINMUX(65, 0)
#define NCE65_P65 APOLLO3_PINMUX(65, 1)
#define CTIM15_P65 APOLLO3_PINMUX(65, 2)
#define GPIO_P65 APOLLO3_PINMUX(65, 3)
#define MSPI2_2_P66 APOLLO3_PINMUX(66, 0)
#define NCE66_P66 APOLLO3_PINMUX(66, 1)
#define CTIM16_P66 APOLLO3_PINMUX(66, 2)
#define GPIO_P66 APOLLO3_PINMUX(66, 3)
#define MSPI2_3_P67 APOLLO3_PINMUX(67, 0)
#define NCE67_P67 APOLLO3_PINMUX(67, 1)
#define CTIM17_P67 APOLLO3_PINMUX(67, 2)
#define GPIO_P67 APOLLO3_PINMUX(67, 3)
#define MSPI2_4_P68 APOLLO3_PINMUX(68, 0)
#define NCE68_P68 APOLLO3_PINMUX(68, 1)
#define CTIM18_P68 APOLLO3_PINMUX(68, 2)
#define GPIO_P68 APOLLO3_PINMUX(68, 3)
#define SWO_P69 APOLLO3_PINMUX(69, 0)
#define NCE69_P69 APOLLO3_PINMUX(69, 1)
#define CTIM19_P69 APOLLO3_PINMUX(69, 2)
#define GPIO_P69 APOLLO3_PINMUX(69, 3)
#define UART0TX_P69 APOLLO3_PINMUX(69, 4)
#define UART0RX_P69 APOLLO3_PINMUX(69, 5)
#define UART1TX_P69 APOLLO3_PINMUX(69, 6)
#define UART1RX_P69 APOLLO3_PINMUX(69, 7)
#define SWO_P70 APOLLO3_PINMUX(70, 0)
#define NCE70_P70 APOLLO3_PINMUX(70, 1)
#define CTIM20_P70 APOLLO3_PINMUX(70, 2)
#define GPIO_P70 APOLLO3_PINMUX(70, 3)
#define UART0TX_P70 APOLLO3_PINMUX(70, 4)
#define UART0RX_P70 APOLLO3_PINMUX(70, 5)
#define UART1TX_P70 APOLLO3_PINMUX(70, 6)
#define UART1RX_P70 APOLLO3_PINMUX(70, 7)
#define SWO_P71 APOLLO3_PINMUX(71, 0)
#define NCE71_P71 APOLLO3_PINMUX(71, 1)
#define CTIM21_P71 APOLLO3_PINMUX(71, 2)
#define GPIO_P71 APOLLO3_PINMUX(71, 3)
#define UART0TX_P71 APOLLO3_PINMUX(71, 4)
#define UART0RX_P71 APOLLO3_PINMUX(71, 5)
#define UART1TX_P71 APOLLO3_PINMUX(71, 6)
#define UART1RX_P71 APOLLO3_PINMUX(71, 7)
#define SWO_P72 APOLLO3_PINMUX(72, 0)
#define NCE72_P72 APOLLO3_PINMUX(72, 1)
#define CTIM22_P72 APOLLO3_PINMUX(72, 2)
#define GPIO_P72 APOLLO3_PINMUX(72, 3)
#define UART0TX_P72 APOLLO3_PINMUX(72, 4)
#define UART0RX_P72 APOLLO3_PINMUX(72, 5)
#define UART1TX_P72 APOLLO3_PINMUX(72, 6)
#define UART1RX_P72 APOLLO3_PINMUX(72, 7)
#define SWO_P73 APOLLO3_PINMUX(73, 0)
#define NCE73_P73 APOLLO3_PINMUX(73, 1)
#define CTIM23_P73 APOLLO3_PINMUX(73, 2)
#define GPIO_P73 APOLLO3_PINMUX(73, 3)
#define UA0CTS_P73 APOLLO3_PINMUX(73, 4)
#define UA0RTS_P73 APOLLO3_PINMUX(73, 5)
#define UA1CTS_P73 APOLLO3_PINMUX(73, 6)
#define UA1RTS_P73 APOLLO3_PINMUX(73, 7)
#endif /* __APOLLO3_PINCTRL_H__ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/ambiq-apollo3-pinctrl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 9,100 |
```objective-c
/*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_TI_CC32XX_PINCTRL_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_TI_CC32XX_PINCTRL_H_
/*
* The whole TI CC32XX pin configuration information is encoded in a 32-bit
* bitfield organized as follows:
*
* - 31..22: Reserved
* - 21..16: Pin.
* - 15..10: Reserved.
* - 9: Pull-down flag.
* - 8: Pull-up flag.
* - 7..5: Drive strength.
* - 4: Enable open-drain flag.
* - 3..0: Configuration mode
*
* Note that the lower bits (11..0) map directly to the MEM_GPIO_PAD_CONFIG
* register.
*/
/**
* @name TI CC32XX pin configuration bit field positions and masks.
* @{
*/
#define TI_CC32XX_PIN_MSK 0x3FU
#define TI_CC32XX_PIN_POS 16U
#define TI_CC32XX_MUX_MSK 0xFU
#define TI_CC32XX_MUX_POS 0U
/** @} */
/**
* @brief Utility macro to build TI CC32XX pinmux property entry.
*
* @param pin Pin
* @param mux Multiplexer choice
*/
#define TI_CC32XX_PINMUX(pin, mux) \
((((pin)&TI_CC32XX_PIN_MSK) << TI_CC32XX_PIN_POS) | \
(((mux)&TI_CC32XX_MUX_MSK) << TI_CC32XX_MUX_POS))
/**
* @name TI CC32XX pinctrl pin functions (reference: SWRU465).
* @{
*/
#define GPIO10_P1 TI_CC32XX_PINMUX(1U, 0U)
#define I2C_SCL_P1 TI_CC32XX_PINMUX(1U, 1U)
#define GT_PWM06_P1 TI_CC32XX_PINMUX(1U, 3U)
#define UART1_TX_P1 TI_CC32XX_PINMUX(1U, 7U)
#define SDCARD_CLK_P1 TI_CC32XX_PINMUX(1U, 6U)
#define GT_CCP01_P1 TI_CC32XX_PINMUX(1U, 12U)
#define GPIO11_P2 TI_CC32XX_PINMUX(2U, 0U)
#define I2C_SDA_P2 TI_CC32XX_PINMUX(2U, 1U)
#define GT_PWM07_P2 TI_CC32XX_PINMUX(2U, 3U)
#define PXCLK_P2 TI_CC32XX_PINMUX(2U, 4U)
#define SDCARD_CMD_P2 TI_CC32XX_PINMUX(2U, 6U)
#define UART1_RX_P2 TI_CC32XX_PINMUX(2U, 7U)
#define GT_CCP02_P2 TI_CC32XX_PINMUX(2U, 12U)
#define MCAFSX_P2 TI_CC32XX_PINMUX(2U, 13U)
#define GPIO12_P3 TI_CC32XX_PINMUX(3U, 0U)
#define MCACLK_P3 TI_CC32XX_PINMUX(3U, 3U)
#define PVS_P3 TI_CC32XX_PINMUX(3U, 4U)
#define I2C_SCL_P3 TI_CC32XX_PINMUX(3U, 5U)
#define UART0_TX_P3 TI_CC32XX_PINMUX(3U, 7U)
#define GT_CCP03_P3 TI_CC32XX_PINMUX(3U, 12U)
#define GPIO13_P4 TI_CC32XX_PINMUX(4U, 0U)
#define I2C_SDA_P4 TI_CC32XX_PINMUX(4U, 5U)
#define PHS_P4 TI_CC32XX_PINMUX(4U, 4U)
#define UART0_RX_P4 TI_CC32XX_PINMUX(4U, 7U)
#define GT_CCP04_P4 TI_CC32XX_PINMUX(4U, 12U)
#define GPIO14_P5 TI_CC32XX_PINMUX(5U, 0U)
#define I2C_SCL_P5 TI_CC32XX_PINMUX(5U, 5U)
#define GSPI_CLK_P5 TI_CC32XX_PINMUX(5U, 7U)
#define PDATA8_P5 TI_CC32XX_PINMUX(5U, 4U)
#define GT_CCP05_P5 TI_CC32XX_PINMUX(5U, 12U)
#define GPIO15_P6 TI_CC32XX_PINMUX(6U, 0U)
#define I2C_SDA_P6 TI_CC32XX_PINMUX(6U, 5U)
#define GSPI_MISO_P6 TI_CC32XX_PINMUX(6U, 7U)
#define PDATA9_P6 TI_CC32XX_PINMUX(6U, 4U)
#define SDCARD_DATA3_P6 TI_CC32XX_PINMUX(6U, 8U)
#define GT_CCP06_P6 TI_CC32XX_PINMUX(6U, 13U)
#define GPIO16_P7 TI_CC32XX_PINMUX(7U, 0U)
#define GSPI_MOSI_P7 TI_CC32XX_PINMUX(7U, 7U)
#define PDATA10_P7 TI_CC32XX_PINMUX(7U, 4U)
#define UART1_TX_P7 TI_CC32XX_PINMUX(7U, 5U)
#define SDCARD_CLK_P7 TI_CC32XX_PINMUX(7U, 8U)
#define GT_CCP07_P7 TI_CC32XX_PINMUX(7U, 13U)
#define GPIO17_P8 TI_CC32XX_PINMUX(8U, 0U)
#define UART1_RX_P8 TI_CC32XX_PINMUX(8U, 5U)
#define GSPI_CS_P8 TI_CC32XX_PINMUX(8U, 7U)
#define SDCARD_CMD_P8 TI_CC32XX_PINMUX(8U, 8U)
#define PDATA11_P8 TI_CC32XX_PINMUX(8U, 4U)
#define GPIO22_P15 TI_CC32XX_PINMUX(15U, 0U)
#define MCAFSX_P15 TI_CC32XX_PINMUX(15U, 7U)
#define GT_CCP04_P15 TI_CC32XX_PINMUX(15U, 5U)
#define GPIO23_P16 TI_CC32XX_PINMUX(16U, 0U)
#define TDI_P16 TI_CC32XX_PINMUX(16U, 1U)
#define UART1_TX_P16 TI_CC32XX_PINMUX(16U, 2U)
#define I2C_SCL_P16 TI_CC32XX_PINMUX(16U, 9U)
#define GPIO24_P17 TI_CC32XX_PINMUX(17U, 0U)
#define TDO_P17 TI_CC32XX_PINMUX(17U, 1U)
#define PWM0_P17 TI_CC32XX_PINMUX(17U, 5U)
#define UART1_RX_P17 TI_CC32XX_PINMUX(17U, 2U)
#define I2C_SDA_P17 TI_CC32XX_PINMUX(17U, 9U)
#define GT_CCP06_P17 TI_CC32XX_PINMUX(17U, 4U)
#define MCAFSX_P17 TI_CC32XX_PINMUX(17U, 6U)
#define GPIO28_P18 TI_CC32XX_PINMUX(18U, 0U)
#define TCK_P19 TI_CC32XX_PINMUX(19U, 1U)
#define GT_PWM03_P19 TI_CC32XX_PINMUX(19U, 8U)
#define GPIO29_P20 TI_CC32XX_PINMUX(20U, 0U)
#define TMS_P20 TI_CC32XX_PINMUX(20U, 1U)
#define GPIO25_P21 TI_CC32XX_PINMUX(21U, 0U)
#define GT_PWM02_P21 TI_CC32XX_PINMUX(21U, 9U)
#define MCASFX_P21 TI_CC32XX_PINMUX(21U, 2U)
#define ANTSEL1_P29 TI_CC32XX_PINMUX(29U, 0U)
#define ANTSEL2_P30 TI_CC32XX_PINMUX(30U, 0U)
#define GPIO31_P45 TI_CC32XX_PINMUX(45U, 0U)
#define UART0_RX_P45 TI_CC32XX_PINMUX(45U, 9U)
#define MCAFSX_P45 TI_CC32XX_PINMUX(45U, 12U)
#define UART1_RX_P45 TI_CC32XX_PINMUX(45U, 2U)
#define MCAXR0_P45 TI_CC32XX_PINMUX(45U, 6U)
#define GSPI_CLK_P45 TI_CC32XX_PINMUX(45U, 7U)
#define GPIO0_P50 TI_CC32XX_PINMUX(50U, 0U)
#define UART0_CTSN_P50 TI_CC32XX_PINMUX(50U, 12U)
#define MCAXR1_P50 TI_CC32XX_PINMUX(50U, 6U)
#define GT_CCP00_P50 TI_CC32XX_PINMUX(50U, 7U)
#define GSPI_CS_P50 TI_CC32XX_PINMUX(50U, 9U)
#define UART1_RTS_P50 TI_CC32XX_PINMUX(50U, 10U)
#define UART0_RTS_P50 TI_CC32XX_PINMUX(50U, 3U)
#define MCAXR0_P50 TI_CC32XX_PINMUX(50U, 4U)
#define GPIO32_P52 TI_CC32XX_PINMUX(52U, 0U)
#define MCACLK_P52 TI_CC32XX_PINMUX(52U, 2U)
#define MCAXR0_P52 TI_CC32XX_PINMUX(52U, 4U)
#define UART0_RTS_P52 TI_CC32XX_PINMUX(52U, 6U)
#define GSPI_MOSI_P52 TI_CC32XX_PINMUX(52U, 8U)
#define GPIO30_P53 TI_CC32XX_PINMUX(53U, 0U)
#define UART0_TX_P53 TI_CC32XX_PINMUX(53U, 9U)
#define MCACLK_P53 TI_CC32XX_PINMUX(53U, 2U)
#define MCAFSX_P53 TI_CC32XX_PINMUX(53U, 3U)
#define GT_CCP05_P53 TI_CC32XX_PINMUX(53U, 4U)
#define GSPI_MISO_P53 TI_CC32XX_PINMUX(53U, 7U)
#define GPIO1_P55 TI_CC32XX_PINMUX(55U, 0U)
#define UART0_TX_P55 TI_CC32XX_PINMUX(55U, 3U)
#define PCLK_P55 TI_CC32XX_PINMUX(55U, 4U)
#define UART1_TX_P55 TI_CC32XX_PINMUX(55U, 6U)
#define GT_CCP01_P55 TI_CC32XX_PINMUX(55U, 7U)
#define GPIO2_P57 TI_CC32XX_PINMUX(57U, 0U)
#define UART0_RX_P57 TI_CC32XX_PINMUX(57U, 3U)
#define UART1_RX_P57 TI_CC32XX_PINMUX(57U, 6U)
#define GT_CCP02_P57 TI_CC32XX_PINMUX(57U, 7U)
#define GPIO3_P58 TI_CC32XX_PINMUX(58U, 0U)
#define UART1_TX_P58 TI_CC32XX_PINMUX(58U, 6U)
#define PDATA7_P58 TI_CC32XX_PINMUX(58U, 7U)
#define GPIO5_P59 TI_CC32XX_PINMUX(59U, 0U)
#define UART1_RX_P59 TI_CC32XX_PINMUX(59U, 6U)
#define PDATA6_P59 TI_CC32XX_PINMUX(59U, 4U)
#define GPIO5_P60 TI_CC32XX_PINMUX(60U, 0U)
#define PDATA5_P60 TI_CC32XX_PINMUX(60U, 4U)
#define MCAXR1_P60 TI_CC32XX_PINMUX(60U, 6U)
#define GT_CCP05_P60 TI_CC32XX_PINMUX(60U, 7U)
#define GPIO6_P61 TI_CC32XX_PINMUX(61U, 0U)
#define UART0_RTS_P61 TI_CC32XX_PINMUX(61U, 5U)
#define PDATA4_P61 TI_CC32XX_PINMUX(61U, 4U)
#define UART1_CTS_P61 TI_CC32XX_PINMUX(61U, 3U)
#define UART0_CTS_P61 TI_CC32XX_PINMUX(61U, 6U)
#define GT_CCP06_P61 TI_CC32XX_PINMUX(61U, 7U)
#define GPIO7_P62 TI_CC32XX_PINMUX(62U, 0U)
#define MCACLKX_P62 TI_CC32XX_PINMUX(62U, 13U)
#define UART1_RTS_P62 TI_CC32XX_PINMUX(62U, 3U)
#define UART0_RTS_P62 TI_CC32XX_PINMUX(62U, 10U)
#define UART0_TX_P62 TI_CC32XX_PINMUX(62U, 11U)
#define GPIO8_P63 TI_CC32XX_PINMUX(63U, 0U)
#define SDCARD_IRQ_P63 TI_CC32XX_PINMUX(63U, 6U)
#define MCAFSX_P63 TI_CC32XX_PINMUX(63U, 7U)
#define GT_CCP06_P63 TI_CC32XX_PINMUX(63U, 12U)
#define GPIO9_P64 TI_CC32XX_PINMUX(64U, 0U)
#define GT_PWM05_P64 TI_CC32XX_PINMUX(64U, 3U)
#define SDCARD_DATA_P64 TI_CC32XX_PINMUX(64U, 6U)
#define MCAXR0_P64 TI_CC32XX_PINMUX(64U, 7U)
#define GT_CCP00_P64 TI_CC32XX_PINMUX(64U, 12U)
/** @} */
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_TI_CC32XX_PINCTRL_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/ti-cc32xx-pinctrl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 3,198 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_LPC11U6X_PINCTRL_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_LPC11U6X_PINCTRL_H_
/**
* @brief Pin control register for standard digital I/O pins:
*
* [0:2] function.
* [3:4] mode.
* [5] hysteresis.
* [6] invert input.
* [7:9] reserved.
* [10] open-drain mode.
* [11:12] digital filter sample mode.
* [13:15] clock divisor.
* [16:31] reserved.
*/
/**
* @brief Control registers for digital/analog I/O pins:
*
* [0:2] function.
* [3:4] mode.
* [5] hysteresis.
* [6] invert input.
* [7] analog mode.
* [8] input glitch filter.
* [9] reserved.
* [10] open-drain mode.
* [11:12] digital filter sample mode.
* [13:15] clock divisor.
* [16:31] reserved.
*/
/**
* @brief Control registers for open-drain I/O pins (I2C):
*
* [0:2] function.
* [3:7] reserved.
* [8:9] I2C mode.
* [10] reserved.
* [11:12] digital filter sample mode.
* [13:15] clock divisor.
* [16:31] reserved.
*/
#define IOCON_FUNC0 0
#define IOCON_FUNC1 1
#define IOCON_FUNC2 2
#define IOCON_FUNC3 3
#define IOCON_FUNC4 4
#define IOCON_FUNC5 5
#define IOCON_MODE_INACT (0 << 3) /* No pull resistor. */
#define IOCON_MODE_PULLDOWN (1 << 3) /* Enable pull-down resistor. */
#define IOCON_MODE_PULLUP (2 << 3) /* Enable Pull-up resistor. */
#define IOCON_MODE_REPEATER (3 << 3) /* Repeater mode. */
#define IOCON_HYS_EN (1 << 5) /* Enable hysteresis. */
#define IOCON_INV_EN (1 << 6) /* Invert input polarity. */
/* Only for analog pins. */
#define IOCON_ADMODE_EN (0 << 7) /* Enable analog input mode. */
#define IOCON_DIGMODE_EN (1 << 7) /* Enable digital I/O mode. */
#define IOCON_FILTR_DIS (1 << 8) /* Disable noise filtering. */
/* Only for open-drain pins (I2C). */
#define IOCON_SFI2C_EN (0 << 8) /* I2C standard mode / Fast-mode. */
#define IOCON_STDI2C_EN (1 << 8) /* GPIO functionality. */
#define IOCON_FASTI2C_EN (2 << 8) /* I2C Fast-mode Plus. */
#define IOCON_OPENDRAIN_EN (1 << 10) /* Enable open-drain mode. */
/*
* The digital filter mode allows to discard input pulses shorter than
* 1, 2 or 3 clock cycles.
*/
#define IOCON_S_MODE_0CLK (0 << 11) /* No input filter. */
#define IOCON_S_MODE_1CLK (1 << 11)
#define IOCON_S_MODE_2CLK (2 << 11)
#define IOCON_S_MODE_3CLK (3 << 11)
/*
* Clock divisor.
*/
#define IOCON_CLKDIV0 (0 << 13)
#define IOCON_CLKDIV1 (1 << 13)
#define IOCON_CLKDIV2 (2 << 13)
#define IOCON_CLKDIV3 (3 << 13)
#define IOCON_CLKDIV4 (4 << 13)
#define IOCON_CLKDIV5 (5 << 13)
#define IOCON_CLKDIV6 (6 << 13)
/*
* Pin control definitions used by LPC pin control driver to make pinmux
* selections.
*/
#define IOCON_MUX(offset, type, mux) \
(((offset & 0xFFF) << 20) | \
(((type) & 0x3) << 18) | \
(((mux) & 0xF) << 0))
#define IOCON_TYPE_D 0x0
#define IOCON_TYPE_I 0x1
#define IOCON_TYPE_A 0x2
#define RESET_PIO0_0 IOCON_MUX(0, IOCON_TYPE_D, 0) /* PIO0_0 */
#define PIO0_0_PIO0_0 IOCON_MUX(0, IOCON_TYPE_D, 1) /* PIO0_0 */
#define PIO0_1_PIO0_1 IOCON_MUX(1, IOCON_TYPE_D, 0) /* PIO0_1 */
#define CLKOUT_PIO0_1 IOCON_MUX(1, IOCON_TYPE_D, 1) /* PIO0_1 */
#define CT32B0_MAT2_PIO0_1 IOCON_MUX(1, IOCON_TYPE_D, 2) /* PIO0_1 */
#define USB_FTOGGLE_PIO0_1 IOCON_MUX(1, IOCON_TYPE_D, 3) /* PIO0_1 */
#define PIO0_2_PIO0_2 IOCON_MUX(2, IOCON_TYPE_D, 0) /* PIO0_2 */
#define SSP0_SSEL_PIO0_2 IOCON_MUX(2, IOCON_TYPE_D, 1) /* PIO0_2 */
#define CT16B0_CAP0_PIO0_2 IOCON_MUX(2, IOCON_TYPE_D, 2) /* PIO0_2 */
#define R_0_PIO0_2 IOCON_MUX(2, IOCON_TYPE_D, 3) /* PIO0_2 */
#define PIO0_3_PIO0_3 IOCON_MUX(3, IOCON_TYPE_D, 0) /* PIO0_3 */
#define USB_VBUS_PIO0_3 IOCON_MUX(3, IOCON_TYPE_D, 1) /* PIO0_3 */
#define R_1_PIO0_3 IOCON_MUX(3, IOCON_TYPE_D, 2) /* PIO0_3 */
#define PIO0_4_PIO0_4 IOCON_MUX(4, IOCON_TYPE_I, 0) /* PIO0_4 */
#define I2C0_SCL_PIO0_4 IOCON_MUX(4, IOCON_TYPE_I, 1) /* PIO0_4 */
#define R_2_PIO0_4 IOCON_MUX(4, IOCON_TYPE_I, 2) /* PIO0_4 */
#define PIO0_5_PIO0_5 IOCON_MUX(5, IOCON_TYPE_I, 0) /* PIO0_5 */
#define I2C0_SDA_PIO0_5 IOCON_MUX(5, IOCON_TYPE_I, 1) /* PIO0_5 */
#define R_3_PIO0_5 IOCON_MUX(5, IOCON_TYPE_I, 2) /* PIO0_5 */
#define PIO0_6_PIO0_6 IOCON_MUX(6, IOCON_TYPE_D, 0) /* PIO0_6 */
#define R_PIO0_6 IOCON_MUX(6, IOCON_TYPE_D, 1) /* PIO0_6 */
#define SSP0_SCK_PIO0_6 IOCON_MUX(6, IOCON_TYPE_D, 2) /* PIO0_6 */
#define R_4_PIO0_6 IOCON_MUX(6, IOCON_TYPE_D, 3) /* PIO0_6 */
#define PIO0_7_PIO0_7 IOCON_MUX(7, IOCON_TYPE_D, 0) /* PIO0_7 */
#define U0_CTS_PIO0_7 IOCON_MUX(7, IOCON_TYPE_D, 1) /* PIO0_7 */
#define R_5_PIO0_7 IOCON_MUX(7, IOCON_TYPE_D, 2) /* PIO0_7 */
#define I2C1_SCL_PIO0_7 IOCON_MUX(7, IOCON_TYPE_D, 3) /* PIO0_7 */
#define PIO0_8_PIO0_8 IOCON_MUX(8, IOCON_TYPE_D, 0) /* PIO0_8 */
#define SSP0_MISO_PIO0_8 IOCON_MUX(8, IOCON_TYPE_D, 1) /* PIO0_8 */
#define CT16B0_MAT0_PIO0_8 IOCON_MUX(8, IOCON_TYPE_D, 2) /* PIO0_8 */
#define R_6_PIO0_8 IOCON_MUX(8, IOCON_TYPE_D, 3) /* PIO0_8 */
#define PIO0_9_PIO0_9 IOCON_MUX(9, IOCON_TYPE_D, 0) /* PIO0_9 */
#define SSP0_MOSI_PIO0_9 IOCON_MUX(9, IOCON_TYPE_D, 1) /* PIO0_9 */
#define CT16B0_MAT1_PIO0_9 IOCON_MUX(9, IOCON_TYPE_D, 2) /* PIO0_9 */
#define R_7_PIO0_9 IOCON_MUX(9, IOCON_TYPE_D, 3) /* PIO0_9 */
#define SWCLK_PIO0_10 IOCON_MUX(10, IOCON_TYPE_D, 0) /* PIO0_10 */
#define PIO0_10_PIO0_10 IOCON_MUX(10, IOCON_TYPE_D, 1) /* PIO0_10 */
#define SSP0_SCK_PIO0_10 IOCON_MUX(10, IOCON_TYPE_D, 2) /* PIO0_10 */
#define CT16B0_MAT2_PIO0_10 IOCON_MUX(10, IOCON_TYPE_D, 3) /* PIO0_10 */
#define TDI_PIO0_11 IOCON_MUX(11, IOCON_TYPE_A, 0) /* PIO0_11 */
#define PIO0_11_PIO0_11 IOCON_MUX(11, IOCON_TYPE_A, 1) /* PIO0_11 */
#define ADC_9_PIO0_11 IOCON_MUX(11, IOCON_TYPE_A, 2) /* PIO0_11 */
#define CT32B0_MAT3_PIO0_11 IOCON_MUX(11, IOCON_TYPE_A, 3) /* PIO0_11 */
#define U1_RTS_PIO0_11 IOCON_MUX(11, IOCON_TYPE_A, 4) /* PIO0_11 */
#define U1_SCLK_PIO0_11 IOCON_MUX(11, IOCON_TYPE_A, 5) /* PIO0_11 */
#define TMS_PIO0_12 IOCON_MUX(12, IOCON_TYPE_A, 0) /* PIO0_12 */
#define PIO0_12_PIO0_12 IOCON_MUX(12, IOCON_TYPE_A, 1) /* PIO0_12 */
#define ADC_8_PIO0_12 IOCON_MUX(12, IOCON_TYPE_A, 2) /* PIO0_12 */
#define CT32B1_CAP0_PIO0_12 IOCON_MUX(12, IOCON_TYPE_A, 3) /* PIO0_12 */
#define U1_CTS_PIO0_12 IOCON_MUX(12, IOCON_TYPE_A, 4) /* PIO0_12 */
#define PIO0_12_PIO0_12 IOCON_MUX(12, IOCON_TYPE_A, 5) /* PIO0_12 */
#define TDO_PIO0_13 IOCON_MUX(13, IOCON_TYPE_A, 0) /* PIO0_13 */
#define PIO0_13_PIO0_13 IOCON_MUX(13, IOCON_TYPE_A, 1) /* PIO0_13 */
#define ADC_7_PIO0_13 IOCON_MUX(13, IOCON_TYPE_A, 2) /* PIO0_13 */
#define CT32B1_MAT0_PIO0_13 IOCON_MUX(13, IOCON_TYPE_A, 3) /* PIO0_13 */
#define U1_RXD_PIO0_13 IOCON_MUX(13, IOCON_TYPE_A, 4) /* PIO0_13 */
#define PIO0_13_PIO0_13 IOCON_MUX(13, IOCON_TYPE_A, 5) /* PIO0_13 */
#define TRST_PIO0_14 IOCON_MUX(14, IOCON_TYPE_A, 0) /* PIO0_14 */
#define PIO0_14_PIO0_14 IOCON_MUX(14, IOCON_TYPE_A, 1) /* PIO0_14 */
#define ADC_6_PIO0_14 IOCON_MUX(14, IOCON_TYPE_A, 2) /* PIO0_14 */
#define CT32B1_MAT1_PIO0_14 IOCON_MUX(14, IOCON_TYPE_A, 3) /* PIO0_14 */
#define U1_TXD_PIO0_14 IOCON_MUX(14, IOCON_TYPE_A, 4) /* PIO0_14 */
#define SWDIO_PIO0_15 IOCON_MUX(15, IOCON_TYPE_A, 0) /* PIO0_15 */
#define PIO0_15_PIO0_15 IOCON_MUX(15, IOCON_TYPE_A, 1) /* PIO0_15 */
#define ADC_3_PIO0_15 IOCON_MUX(15, IOCON_TYPE_A, 2) /* PIO0_15 */
#define CT32B1_MAT2_PIO0_15 IOCON_MUX(15, IOCON_TYPE_A, 3) /* PIO0_15 */
#define WAKEUP_PIO0_16 IOCON_MUX(16, IOCON_TYPE_A, 0) /* PIO0_16 */
#define PIO0_16_PIO0_16 IOCON_MUX(16, IOCON_TYPE_A, 1) /* PIO0_16 */
#define ADC_2_PIO0_16 IOCON_MUX(16, IOCON_TYPE_A, 2) /* PIO0_16 */
#define CT32B1_MAT3_PIO0_16 IOCON_MUX(16, IOCON_TYPE_A, 3) /* PIO0_16 */
#define R_8_PIO0_16 IOCON_MUX(16, IOCON_TYPE_A, 4) /* PIO0_16 */
#define PIO0_17_PIO0_17 IOCON_MUX(17, IOCON_TYPE_D, 0) /* PIO0_17 */
#define U0_RTS_PIO0_17 IOCON_MUX(17, IOCON_TYPE_D, 1) /* PIO0_17 */
#define CT32B0_CAP0_PIO0_17 IOCON_MUX(17, IOCON_TYPE_D, 2) /* PIO0_17 */
#define U0_SCLK_PIO0_17 IOCON_MUX(17, IOCON_TYPE_D, 3) /* PIO0_17 */
#define PIO0_18_PIO0_18 IOCON_MUX(18, IOCON_TYPE_D, 0) /* PIO0_18 */
#define U0_RXD_PIO0_18 IOCON_MUX(18, IOCON_TYPE_D, 1) /* PIO0_18 */
#define CT32B0_MAT0_PIO0_18 IOCON_MUX(18, IOCON_TYPE_D, 2) /* PIO0_18 */
#define PIO0_19_PIO0_19 IOCON_MUX(19, IOCON_TYPE_D, 0) /* PIO0_19 */
#define U0_TXD_PIO0_19 IOCON_MUX(19, IOCON_TYPE_D, 1) /* PIO0_19 */
#define CT32B0_MAT1_PIO0_19 IOCON_MUX(19, IOCON_TYPE_D, 2) /* PIO0_19 */
#define PIO0_20_PIO0_20 IOCON_MUX(20, IOCON_TYPE_D, 0) /* PIO0_20 */
#define CT16B1_CAP0_PIO0_20 IOCON_MUX(20, IOCON_TYPE_D, 1) /* PIO0_20 */
#define U2_RXD_PIO0_20 IOCON_MUX(20, IOCON_TYPE_D, 2) /* PIO0_20 */
#define PIO0_21_PIO0_21 IOCON_MUX(21, IOCON_TYPE_D, 0) /* PIO0_21 */
#define CT16B1_MAT0_PIO0_21 IOCON_MUX(21, IOCON_TYPE_D, 1) /* PIO0_21 */
#define SSP1_MOSI_PIO0_21 IOCON_MUX(21, IOCON_TYPE_D, 2) /* PIO0_21 */
#define PIO0_22_PIO0_22 IOCON_MUX(22, IOCON_TYPE_A, 0) /* PIO0_22 */
#define ADC_11_PIO0_22 IOCON_MUX(22, IOCON_TYPE_A, 1) /* PIO0_22 */
#define CT16B1_CAP1_PIO0_22 IOCON_MUX(22, IOCON_TYPE_A, 2) /* PIO0_22 */
#define SSP1_MISO_PIO0_22 IOCON_MUX(22, IOCON_TYPE_A, 3) /* PIO0_22 */
#define PIO0_23_PIO0_23 IOCON_MUX(23, IOCON_TYPE_A, 0) /* PIO0_23 */
#define ADC_1_PIO0_23 IOCON_MUX(23, IOCON_TYPE_A, 1) /* PIO0_23 */
#define R_9_PIO0_23 IOCON_MUX(23, IOCON_TYPE_A, 2) /* PIO0_23 */
#define U0_RI_PIO0_23 IOCON_MUX(23, IOCON_TYPE_A, 3) /* PIO0_23 */
#define SSP1_SSEL_PIO0_23 IOCON_MUX(23, IOCON_TYPE_A, 4) /* PIO0_23 */
#define PIO1_0_PIO1_0 IOCON_MUX(24, IOCON_TYPE_D, 0) /* PIO1_0 */
#define CT32B1_MAT0_PIO1_0 IOCON_MUX(24, IOCON_TYPE_D, 1) /* PIO1_0 */
#define R_10_PIO1_0 IOCON_MUX(24, IOCON_TYPE_D, 2) /* PIO1_0 */
#define U2_TXD_PIO1_0 IOCON_MUX(24, IOCON_TYPE_D, 3) /* PIO1_0 */
#define PIO1_1_PIO1_1 IOCON_MUX(25, IOCON_TYPE_D, 0) /* PIO1_1 */
#define CT32B1_MAT1_PIO1_1 IOCON_MUX(25, IOCON_TYPE_D, 1) /* PIO1_1 */
#define R_11_PIO1_1 IOCON_MUX(25, IOCON_TYPE_D, 2) /* PIO1_1 */
#define U0_DTR_PIO1_1 IOCON_MUX(25, IOCON_TYPE_D, 3) /* PIO1_1 */
#define PIO1_2_PIO1_2 IOCON_MUX(26, IOCON_TYPE_D, 0) /* PIO1_2 */
#define CT32B1_MAT2_PIO1_2 IOCON_MUX(26, IOCON_TYPE_D, 1) /* PIO1_2 */
#define R_12_PIO1_2 IOCON_MUX(26, IOCON_TYPE_D, 2) /* PIO1_2 */
#define U1_RXD_PIO1_2 IOCON_MUX(26, IOCON_TYPE_D, 3) /* PIO1_2 */
#define PIO1_3_PIO1_3 IOCON_MUX(27, IOCON_TYPE_A, 0) /* PIO1_3 */
#define CT32B1_MAT3_PIO1_3 IOCON_MUX(27, IOCON_TYPE_A, 1) /* PIO1_3 */
#define R_13_PIO1_3 IOCON_MUX(27, IOCON_TYPE_A, 2) /* PIO1_3 */
#define I2C1_SDA_PIO1_3 IOCON_MUX(27, IOCON_TYPE_A, 3) /* PIO1_3 */
#define ADC_5_PIO1_3 IOCON_MUX(27, IOCON_TYPE_A, 4) /* PIO1_3 */
#define PIO1_4_PIO1_4 IOCON_MUX(28, IOCON_TYPE_D, 0) /* PIO1_4 */
#define CT32B1_CAP0_PIO1_4 IOCON_MUX(28, IOCON_TYPE_D, 1) /* PIO1_4 */
#define R_14_PIO1_4 IOCON_MUX(28, IOCON_TYPE_D, 2) /* PIO1_4 */
#define U0_DSR_PIO1_4 IOCON_MUX(28, IOCON_TYPE_D, 3) /* PIO1_4 */
#define PIO1_5_PIO1_5 IOCON_MUX(29, IOCON_TYPE_D, 0) /* PIO1_5 */
#define CT32B1_CAP1_PIO1_5 IOCON_MUX(29, IOCON_TYPE_D, 1) /* PIO1_5 */
#define R_15_PIO1_5 IOCON_MUX(29, IOCON_TYPE_D, 2) /* PIO1_5 */
#define U0_DCD_PIO1_5 IOCON_MUX(29, IOCON_TYPE_D, 3) /* PIO1_5 */
#define PIO1_6_PIO1_6 IOCON_MUX(30, IOCON_TYPE_D, 0) /* PIO1_6 */
#define R_16_PIO1_6 IOCON_MUX(30, IOCON_TYPE_D, 1) /* PIO1_6 */
#define U2_RXD_PIO1_6 IOCON_MUX(30, IOCON_TYPE_D, 2) /* PIO1_6 */
#define CT32B0_CAP1_PIO1_6 IOCON_MUX(30, IOCON_TYPE_D, 3) /* PIO1_6 */
#define PIO1_7_PIO1_7 IOCON_MUX(31, IOCON_TYPE_D, 0) /* PIO1_7 */
#define R_17_PIO1_7 IOCON_MUX(31, IOCON_TYPE_D, 1) /* PIO1_7 */
#define U2_CTS_PIO1_7 IOCON_MUX(31, IOCON_TYPE_D, 2) /* PIO1_7 */
#define CT16B1_CAP0_PIO1_7 IOCON_MUX(31, IOCON_TYPE_D, 3) /* PIO1_7 */
#define PIO1_8_PIO1_8 IOCON_MUX(32, IOCON_TYPE_D, 0) /* PIO1_8 */
#define R_18_PIO1_8 IOCON_MUX(32, IOCON_TYPE_D, 1) /* PIO1_8 */
#define U1_TXD_PIO1_8 IOCON_MUX(32, IOCON_TYPE_D, 2) /* PIO1_8 */
#define CT16B0_CAP0_PIO1_8 IOCON_MUX(32, IOCON_TYPE_D, 3) /* PIO1_8 */
#define PIO1_9_PIO1_9 IOCON_MUX(33, IOCON_TYPE_A, 0) /* PIO1_9 */
#define U0_CTS_PIO1_9 IOCON_MUX(33, IOCON_TYPE_A, 1) /* PIO1_9 */
#define CT16B1_MAT1_PIO1_9 IOCON_MUX(33, IOCON_TYPE_A, 2) /* PIO1_9 */
#define ADC_0_PIO1_9 IOCON_MUX(33, IOCON_TYPE_A, 3) /* PIO1_9 */
#define PIO1_10_PIO1_10 IOCON_MUX(34, IOCON_TYPE_D, 0) /* PIO1_10 */
#define U2_RTS_PIO1_10 IOCON_MUX(34, IOCON_TYPE_D, 1) /* PIO1_10 */
#define U2_SCLK_PIO1_10 IOCON_MUX(34, IOCON_TYPE_D, 2) /* PIO1_10 */
#define CT16B1_MAT0_PIO1_10 IOCON_MUX(34, IOCON_TYPE_D, 3) /* PIO1_10 */
#define PIO1_11_PIO1_11 IOCON_MUX(35, IOCON_TYPE_D, 0) /* PIO1_11 */
#define I2C1_SCL_PIO1_11 IOCON_MUX(35, IOCON_TYPE_D, 1) /* PIO1_11 */
#define CT16B0_MAT2_PIO1_11 IOCON_MUX(35, IOCON_TYPE_D, 2) /* PIO1_11 */
#define U0_RI_PIO1_11 IOCON_MUX(35, IOCON_TYPE_D, 3) /* PIO1_11 */
#define PIO1_12_PIO1_12 IOCON_MUX(36, IOCON_TYPE_D, 0) /* PIO1_12 */
#define SSP0_MOSI_PIO1_12 IOCON_MUX(36, IOCON_TYPE_D, 1) /* PIO1_12 */
#define CT16B0_MAT1_PIO1_12 IOCON_MUX(36, IOCON_TYPE_D, 2) /* PIO1_12 */
#define R_21_PIO1_12 IOCON_MUX(36, IOCON_TYPE_D, 3) /* PIO1_12 */
#define PIO1_13_PIO1_13 IOCON_MUX(37, IOCON_TYPE_D, 0) /* PIO1_13 */
#define U1_CTS_PIO1_13 IOCON_MUX(37, IOCON_TYPE_D, 1) /* PIO1_13 */
#define SCT0_OUT3_PIO1_13 IOCON_MUX(37, IOCON_TYPE_D, 2) /* PIO1_13 */
#define R_22_PIO1_13 IOCON_MUX(37, IOCON_TYPE_D, 3) /* PIO1_13 */
#define PIO1_14_PIO1_14 IOCON_MUX(38, IOCON_TYPE_D, 0) /* PIO1_14 */
#define I2C1_SDA_PIO1_14 IOCON_MUX(38, IOCON_TYPE_D, 1) /* PIO1_14 */
#define CT32B1_MAT2_PIO1_14 IOCON_MUX(38, IOCON_TYPE_D, 2) /* PIO1_14 */
#define R_23_PIO1_14 IOCON_MUX(38, IOCON_TYPE_D, 3) /* PIO1_14 */
#define PIO1_15_PIO1_15 IOCON_MUX(39, IOCON_TYPE_D, 0) /* PIO1_15 */
#define SSP0_SSEL_PIO1_15 IOCON_MUX(39, IOCON_TYPE_D, 1) /* PIO1_15 */
#define CT32B1_MAT3_PIO1_15 IOCON_MUX(39, IOCON_TYPE_D, 2) /* PIO1_15 */
#define R_24_PIO1_15 IOCON_MUX(39, IOCON_TYPE_D, 3) /* PIO1_15 */
#define PIO1_16_PIO1_16 IOCON_MUX(40, IOCON_TYPE_D, 0) /* PIO1_16 */
#define SSP0_MISO_PIO1_16 IOCON_MUX(40, IOCON_TYPE_D, 1) /* PIO1_16 */
#define CT16B0_MAT0_PIO1_16 IOCON_MUX(40, IOCON_TYPE_D, 2) /* PIO1_16 */
#define R_25_PIO1_16 IOCON_MUX(40, IOCON_TYPE_D, 3) /* PIO1_16 */
#define PIO1_17_PIO1_17 IOCON_MUX(41, IOCON_TYPE_D, 0) /* PIO1_17 */
#define CT16B0_CAP2_PIO1_17 IOCON_MUX(41, IOCON_TYPE_D, 1) /* PIO1_17 */
#define U0_RXD_PIO1_17 IOCON_MUX(41, IOCON_TYPE_D, 2) /* PIO1_17 */
#define R_26_PIO1_17 IOCON_MUX(41, IOCON_TYPE_D, 3) /* PIO1_17 */
#define PIO1_18_PIO1_18 IOCON_MUX(42, IOCON_TYPE_D, 0) /* PIO1_18 */
#define CT16B1_CAP1_PIO1_18 IOCON_MUX(42, IOCON_TYPE_D, 1) /* PIO1_18 */
#define U0_TXD_PIO1_18 IOCON_MUX(42, IOCON_TYPE_D, 2) /* PIO1_18 */
#define R_27_PIO1_18 IOCON_MUX(42, IOCON_TYPE_D, 3) /* PIO1_18 */
#define PIO1_19_PIO1_19 IOCON_MUX(43, IOCON_TYPE_D, 0) /* PIO1_19 */
#define U2_CTS_PIO1_19 IOCON_MUX(43, IOCON_TYPE_D, 1) /* PIO1_19 */
#define SCT0_OUT0_PIO1_19 IOCON_MUX(43, IOCON_TYPE_D, 2) /* PIO1_19 */
#define R_28_PIO1_19 IOCON_MUX(43, IOCON_TYPE_D, 3) /* PIO1_19 */
#define PIO1_20_PIO1_20 IOCON_MUX(44, IOCON_TYPE_D, 0) /* PIO1_20 */
#define U0_DSR_PIO1_20 IOCON_MUX(44, IOCON_TYPE_D, 1) /* PIO1_20 */
#define SSP1_SCK_PIO1_20 IOCON_MUX(44, IOCON_TYPE_D, 2) /* PIO1_20 */
#define CT16B0_MAT0_PIO1_20 IOCON_MUX(44, IOCON_TYPE_D, 3) /* PIO1_20 */
#define PIO1_21_PIO1_21 IOCON_MUX(45, IOCON_TYPE_D, 0) /* PIO1_21 */
#define U0_DCD_PIO1_21 IOCON_MUX(45, IOCON_TYPE_D, 1) /* PIO1_21 */
#define SSP1_MISO_PIO1_21 IOCON_MUX(45, IOCON_TYPE_D, 2) /* PIO1_21 */
#define CT16B0_CAP1_PIO1_21 IOCON_MUX(45, IOCON_TYPE_D, 3) /* PIO1_21 */
#define PIO1_22_PIO1_22 IOCON_MUX(46, IOCON_TYPE_A, 0) /* PIO1_22 */
#define SSP1_MOSI_PIO1_22 IOCON_MUX(46, IOCON_TYPE_A, 1) /* PIO1_22 */
#define CT32B1_CAP1_PIO1_22 IOCON_MUX(46, IOCON_TYPE_A, 2) /* PIO1_22 */
#define ADC_4_PIO1_22 IOCON_MUX(46, IOCON_TYPE_A, 3) /* PIO1_22 */
#define R_29_PIO1_22 IOCON_MUX(46, IOCON_TYPE_A, 4) /* PIO1_22 */
#define PIO1_23_PIO1_23 IOCON_MUX(47, IOCON_TYPE_D, 0) /* PIO1_23 */
#define CT16B1_MAT1_PIO1_23 IOCON_MUX(47, IOCON_TYPE_D, 1) /* PIO1_23 */
#define SSP1_SSEL_PIO1_23 IOCON_MUX(47, IOCON_TYPE_D, 2) /* PIO1_23 */
#define U2_TXD_PIO1_23 IOCON_MUX(47, IOCON_TYPE_D, 3) /* PIO1_23 */
#define PIO1_24_PIO1_24 IOCON_MUX(48, IOCON_TYPE_D, 0) /* PIO1_24 */
#define CT32B0_MAT0_PIO1_24 IOCON_MUX(48, IOCON_TYPE_D, 1) /* PIO1_24 */
#define I2C1_SDA_PIO1_24 IOCON_MUX(48, IOCON_TYPE_D, 2) /* PIO1_24 */
#define PIO1_25_PIO1_25 IOCON_MUX(49, IOCON_TYPE_D, 0) /* PIO1_25 */
#define U2_RTS_PIO1_25 IOCON_MUX(49, IOCON_TYPE_D, 1) /* PIO1_25 */
#define U2_SCLK_PIO1_25 IOCON_MUX(49, IOCON_TYPE_D, 2) /* PIO1_25 */
#define SCT0_IN0_PIO1_25 IOCON_MUX(49, IOCON_TYPE_D, 3) /* PIO1_25 */
#define R_30_PIO1_25 IOCON_MUX(49, IOCON_TYPE_D, 4) /* PIO1_25 */
#define PIO1_26_PIO1_26 IOCON_MUX(50, IOCON_TYPE_D, 0) /* PIO1_26 */
#define CT32B0_MAT2_PIO1_26 IOCON_MUX(50, IOCON_TYPE_D, 1) /* PIO1_26 */
#define U0_RXD_PIO1_26 IOCON_MUX(50, IOCON_TYPE_D, 2) /* PIO1_26 */
#define R_19_PIO1_26 IOCON_MUX(50, IOCON_TYPE_D, 3) /* PIO1_26 */
#define PIO1_27_PIO1_27 IOCON_MUX(51, IOCON_TYPE_D, 0) /* PIO1_27 */
#define CT32B0_MAT3_PIO1_27 IOCON_MUX(51, IOCON_TYPE_D, 1) /* PIO1_27 */
#define U0_TXD_PIO1_27 IOCON_MUX(51, IOCON_TYPE_D, 2) /* PIO1_27 */
#define R_20_PIO1_27 IOCON_MUX(51, IOCON_TYPE_D, 3) /* PIO1_27 */
#define SSP1_SCK_PIO1_27 IOCON_MUX(51, IOCON_TYPE_D, 4) /* PIO1_27 */
#define PIO1_28_PIO1_28 IOCON_MUX(52, IOCON_TYPE_D, 0) /* PIO1_28 */
#define CT32B0_CAP0_PIO1_28 IOCON_MUX(52, IOCON_TYPE_D, 1) /* PIO1_28 */
#define U0_SCLK_PIO1_28 IOCON_MUX(52, IOCON_TYPE_D, 2) /* PIO1_28 */
#define U0_RTS_PIO1_28 IOCON_MUX(52, IOCON_TYPE_D, 3) /* PIO1_28 */
#define PIO1_29_PIO1_29 IOCON_MUX(53, IOCON_TYPE_A, 0) /* PIO1_29 */
#define SSP0_SCK_PIO1_29 IOCON_MUX(53, IOCON_TYPE_A, 1) /* PIO1_29 */
#define CT32B0_CAP1_PIO1_29 IOCON_MUX(53, IOCON_TYPE_A, 2) /* PIO1_29 */
#define U0_DTRn_PIO1_29 IOCON_MUX(53, IOCON_TYPE_A, 3) /* PIO1_29 */
#define ADC_10_PIO1_29 IOCON_MUX(53, IOCON_TYPE_A, 4) /* PIO1_29 */
#define PIO1_30_PIO1_30 IOCON_MUX(54, IOCON_TYPE_D, 0) /* PIO1_30 */
#define I2C1_SCL_PIO1_30 IOCON_MUX(54, IOCON_TYPE_D, 1) /* PIO1_30 */
#define SCT0_IN3_PIO1_30 IOCON_MUX(54, IOCON_TYPE_D, 2) /* PIO1_30 */
#define R_31_PIO1_30 IOCON_MUX(54, IOCON_TYPE_D, 3) /* PIO1_30 */
#define PIO1_31_PIO1_31 IOCON_MUX(55, IOCON_TYPE_D, 0) /* PIO1_31 */
#define PIO2_0_PIO2_0 IOCON_MUX(60, IOCON_TYPE_A, 0) /* PIO2_0 */
#define XTALIN_PIO2_0 IOCON_MUX(60, IOCON_TYPE_A, 1) /* PIO2_0 */
#define PIO2_1_PIO2_1 IOCON_MUX(61, IOCON_TYPE_A, 0) /* PIO2_1 */
#define XTALOUT_PIO2_1 IOCON_MUX(61, IOCON_TYPE_A, 1) /* PIO2_1 */
#define PIO2_2_PIO2_2 IOCON_MUX(63, IOCON_TYPE_D, 0) /* PIO2_2 */
#define U3_RTS_PIO2_2 IOCON_MUX(63, IOCON_TYPE_D, 1) /* PIO2_2 */
#define U3_SCLK_PIO2_2 IOCON_MUX(63, IOCON_TYPE_D, 2) /* PIO2_2 */
#define SCT0_OUT1_PIO2_2 IOCON_MUX(63, IOCON_TYPE_D, 3) /* PIO2_2 */
#define PIO2_3_PIO2_3 IOCON_MUX(64, IOCON_TYPE_D, 0) /* PIO2_3 */
#define U3_RXD_PIO2_3 IOCON_MUX(64, IOCON_TYPE_D, 1) /* PIO2_3 */
#define CT32B0_MAT1_PIO2_3 IOCON_MUX(64, IOCON_TYPE_D, 2) /* PIO2_3 */
#define PIO2_4_PIO2_4 IOCON_MUX(65, IOCON_TYPE_D, 0) /* PIO2_4 */
#define U3_TXD_PIO2_4 IOCON_MUX(65, IOCON_TYPE_D, 1) /* PIO2_4 */
#define CT32B0_MAT2_PIO2_4 IOCON_MUX(65, IOCON_TYPE_D, 2) /* PIO2_4 */
#define PIO2_5_PIO2_5 IOCON_MUX(66, IOCON_TYPE_D, 0) /* PIO2_5 */
#define U3_CTS_PIO2_5 IOCON_MUX(66, IOCON_TYPE_D, 1) /* PIO2_5 */
#define SCT0_IN1_PIO2_5 IOCON_MUX(66, IOCON_TYPE_D, 2) /* PIO2_5 */
#define PIO2_6_PIO2_6 IOCON_MUX(67, IOCON_TYPE_D, 0) /* PIO2_6 */
#define U1_RTS_PIO2_6 IOCON_MUX(67, IOCON_TYPE_D, 1) /* PIO2_6 */
#define U1_SCLK_PIO2_6 IOCON_MUX(67, IOCON_TYPE_D, 2) /* PIO2_6 */
#define SCT0_IN2_PIO2_6 IOCON_MUX(67, IOCON_TYPE_D, 3) /* PIO2_6 */
#define PIO2_7_PIO2_7 IOCON_MUX(68, IOCON_TYPE_D, 0) /* PIO2_7 */
#define SSP0_SCK_PIO2_7 IOCON_MUX(68, IOCON_TYPE_D, 1) /* PIO2_7 */
#define SCT0_OUT2_PIO2_7 IOCON_MUX(68, IOCON_TYPE_D, 2) /* PIO2_7 */
#define PIO2_8_PIO2_8 IOCON_MUX(69, IOCON_TYPE_D, 0) /* PIO2_8 */
#define SCT1_IN0_PIO2_8 IOCON_MUX(69, IOCON_TYPE_D, 1) /* PIO2_8 */
#define PIO2_9_PIO2_9 IOCON_MUX(70, IOCON_TYPE_D, 0) /* PIO2_9 */
#define SCT1_IN1_PIO2_9 IOCON_MUX(70, IOCON_TYPE_D, 1) /* PIO2_9 */
#define PIO2_10_PIO2_10 IOCON_MUX(71, IOCON_TYPE_D, 0) /* PIO2_10 */
#define U4_RTS_PIO2_10 IOCON_MUX(71, IOCON_TYPE_D, 1) /* PIO2_10 */
#define U4_SCLK_PIO2_10 IOCON_MUX(71, IOCON_TYPE_D, 2) /* PIO2_10 */
#define PIO2_11_PIO2_11 IOCON_MUX(72, IOCON_TYPE_D, 0) /* PIO2_11 */
#define U4_RXD_PIO2_11 IOCON_MUX(72, IOCON_TYPE_D, 1) /* PIO2_11 */
#define PIO2_12_PIO2_12 IOCON_MUX(73, IOCON_TYPE_D, 0) /* PIO2_12 */
#define U4_TXD_PIO2_12 IOCON_MUX(73, IOCON_TYPE_D, 1) /* PIO2_12 */
#define PIO2_13_PIO2_13 IOCON_MUX(74, IOCON_TYPE_D, 0) /* PIO2_13 */
#define U4_CTS_PIO2_13 IOCON_MUX(74, IOCON_TYPE_D, 1) /* PIO2_13 */
#define PIO2_14_PIO2_14 IOCON_MUX(75, IOCON_TYPE_D, 0) /* PIO2_14 */
#define SCT1_IN2_PIO2_14 IOCON_MUX(75, IOCON_TYPE_D, 1) /* PIO2_14 */
#define PIO2_15_PIO2_15 IOCON_MUX(76, IOCON_TYPE_D, 0) /* PIO2_15 */
#define SCT1_IN3_PIO2_15 IOCON_MUX(76, IOCON_TYPE_D, 1) /* PIO2_15 */
#define PIO2_16_PIO2_16 IOCON_MUX(77, IOCON_TYPE_D, 0) /* PIO2_16 */
#define SCT1_OUT0_PIO2_16 IOCON_MUX(77, IOCON_TYPE_D, 1) /* PIO2_16 */
#define PIO2_17_PIO2_17 IOCON_MUX(78, IOCON_TYPE_D, 0) /* PIO2_17 */
#define SCT1_OUT1_PIO2_17 IOCON_MUX(78, IOCON_TYPE_D, 1) /* PIO2_17 */
#define PIO2_18_PIO2_18 IOCON_MUX(79, IOCON_TYPE_D, 0) /* PIO2_18 */
#define SCT1_OUT2_PIO2_18 IOCON_MUX(79, IOCON_TYPE_D, 1) /* PIO2_18 */
#define PIO2_19_PIO2_19 IOCON_MUX(80, IOCON_TYPE_D, 0) /* PIO2_19 */
#define SCT1_OUT3_PIO2_19 IOCON_MUX(80, IOCON_TYPE_D, 1) /* PIO2_19 */
#define PIO2_20_PIO2_20 IOCON_MUX(81, IOCON_TYPE_D, 0) /* PIO2_20 */
#define PIO2_21_PIO2_21 IOCON_MUX(82, IOCON_TYPE_D, 0) /* PIO2_21 */
#define PIO2_22_PIO2_22 IOCON_MUX(83, IOCON_TYPE_D, 0) /* PIO2_22 */
#define PIO2_23_PIO2_23 IOCON_MUX(84, IOCON_TYPE_D, 0) /* PIO2_23 */
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_LPC11U6X_PINCTRL_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/lpc11u6x-pinctrl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 9,397 |
```objective-c
/*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_GECKO_PINCTRL_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_GECKO_PINCTRL_H_
/*
* The whole GECKO_pin configuration information is encoded in a 32-bit bitfield
* organized as follows:
*
* - 31..24: Pin function.
* - 23..16: Reserved.
* - 15..8: Port for UART_RX/UART_TX functions.
* - 7..0: Pin number for UART_RX/UART_TX functions.
* - 15..8: Reserved for UART_LOC function.
* - 7..0: Loc for UART_LOC function.
*/
/**
* @name GECKO_pin configuration bit field positions and masks.
* @{
*/
/** Position of the function field. */
#define GECKO_FUN_POS 24U
/** Mask for the function field. */
#define GECKO_FUN_MSK 0xFFU
/** Position of the pin field. */
#define GECKO_PIN_POS 0U
/** Mask for the pin field. */
#define GECKO_PIN_MSK 0xFFU
/** Position of the port field. */
#define GECKO_PORT_POS 8U
/** Mask for the port field. */
#define GECKO_PORT_MSK 0xFFU
/** Position of the loc field. */
#define GECKO_LOC_POS 0U
/** Mask for the pin field. */
#define GECKO_LOC_MSK 0xFFU
/** @} */
/**
* @name GECKO_pinctrl pin functions.
* @{
*/
/** UART TX */
#define GECKO_FUN_UART_TX 0U
/** UART RX */
#define GECKO_FUN_UART_RX 1U
/** UART RTS */
#define GECKO_FUN_UART_RTS 2U
/** UART CTS */
#define GECKO_FUN_UART_CTS 3U
/** UART RX LOCATION */
#define GECKO_FUN_UART_RX_LOC 4U
/** UART TX LOCATION */
#define GECKO_FUN_UART_TX_LOC 5U
/** UART RTS LOCATION */
#define GECKO_FUN_UART_RTS_LOC 6U
/** UART CTS LOCATION */
#define GECKO_FUN_UART_CTS_LOC 7U
#define GECKO_FUN_SPIM_MISO 8U
#define GECKO_FUN_SPIM_MOSI 9U
#define GECKO_FUN_SPIM_CS 10U
#define GECKO_FUN_SPIM_SCK 11U
#define GECKO_FUN_LEUART_RX_LOC 12U
#define GECKO_FUN_LEUART_TX_LOC 13U
#define GECKO_FUN_SPIS_MISO 14U
#define GECKO_FUN_SPIS_MOSI 15U
#define GECKO_FUN_SPIS_CS 16U
#define GECKO_FUN_SPIS_SCK 17U
#define GECKO_FUN_SPI_MISO_LOC 18U
#define GECKO_FUN_SPI_MOSI_LOC 19U
#define GECKO_FUN_SPI_CS_LOC 20U
#define GECKO_FUN_SPI_SCK_LOC 21U
#define GECKO_FUN_I2C_SDA 22U
#define GECKO_FUN_I2C_SCL 23U
#define GECKO_FUN_I2C_SDA_LOC 24U
#define GECKO_FUN_I2C_SCL_LOC 25U
/** @} */
/**
* @brief Utility macro to build GECKO psels property entry.
*
* @param fun Pin function configuration (see GECKO_FUNC_{name} macros).
* @param port Port (0 or 1).
* @param pin Pin (0..31).
*/
#define GECKO_PSEL(fun, port, pin) \
(((GECKO_PORT_##port & GECKO_PORT_MSK) << GECKO_PORT_POS) | \
((GECKO_PIN(##pin##) & GECKO_PIN_MSK) << GECKO_PIN_POS) | \
((GECKO_FUN_##fun & GECKO_FUN_MSK) << GECKO_FUN_POS))
/**
* @brief Utility macro to build GECKO_psels property entry.
*
* @param fun Pin function configuration (see GECKO_FUNC_{name} macros).
* @param loc Location.
*/
#define GECKO_LOC(fun, loc) \
(((GECKO_LOCATION(##loc##) & GECKO_LOC_MSK) << GECKO_LOC_POS) | \
((GECKO_FUN_##fun##_LOC & GECKO_FUN_MSK) << GECKO_FUN_POS))
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_GECKO_PINCTRL_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/gecko-pinctrl-s1.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 987 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_PINCTRL_ZYNQ_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_PINCTRL_ZYNQ_H_
/**
* @name IO buffer type
*
* Definitions for Xilinx Zynq-7000 pinctrl `power-source` devicetree property values. The value
* corresponds to what is written to the IO_Type field in the MIO_PIN_xx SLCR register.
*
* @{
*/
#define IO_STANDARD_LVCMOS18 1
#define IO_STANDARD_LVCMOS25 2
#define IO_STANDARD_LVCMOS33 3
#define IO_STANDARD_HSTL 4
/** @} */
/**
* @name IO buffer edge rate
*
* Definitions for Xilinx Zynq-7000 pinctrl `slew-rate` devicetree property values. The value
* corresponds to what is written to the Speed field in the MIO_PIN_xx SLCR register.
*
* @{
*/
#define IO_SPEED_SLOW 0
#define IO_SPEED_FAST 1
/** @} */
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_PINCTRL_ZYNQ_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/pinctrl-zynq.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 251 |
```objective-c
/*
*
*/
#ifndef __RENESAS_RZT2M_PINCTRL_H__
#define __RENESAS_RZT2M_PINCTRL_H__
#define RZT2M_PINMUX(port, pin, func) ((port << 16) | (pin << 8) | func)
#define UART0TX_P16_5 RZT2M_PINMUX(16, 5, 1)
#define UART0RX_P16_6 RZT2M_PINMUX(16, 6, 2)
#define UART3TX_P18_0 RZT2M_PINMUX(18, 0, 4)
#define UART3RX_P17_7 RZT2M_PINMUX(17, 7, 4)
#endif /* __RENESAS_RZT2M_PINCTRL_H__ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/renesas-rzt2m-pinctrl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 174 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_ESP_PINCTRL_COMMON_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_ESP_PINCTRL_COMMON_H_
#include <zephyr/dt-bindings/dt-util.h>
#define ESP32_PIN_NUM_SHIFT 0U
#define ESP32_PIN_NUM_MASK 0x3FU
/*
* Definitions used to extract I/O
* signal indexes used by the GPIO
* matrix signal routing mechanism
*/
#define ESP32_PIN_SIGI_MASK 0x1FFU
#define ESP32_PIN_SIGI_SHIFT 6U
#define ESP32_PIN_SIGO_MASK 0x1FFU
#define ESP32_PIN_SIGO_SHIFT 15U
#define ESP_SIG_INVAL ESP32_PIN_SIGI_MASK
#define ESP32_PINMUX(pin, sig_i, sig_o) \
(((pin & ESP32_PIN_NUM_MASK) << ESP32_PIN_NUM_SHIFT) | \
((sig_i & ESP32_PIN_SIGI_MASK) << ESP32_PIN_SIGI_SHIFT) | \
((sig_o & ESP32_PIN_SIGO_MASK) << ESP32_PIN_SIGO_SHIFT))
/*
* Definitions used to extract pin
* properties: bias, drive and
* initial pin level
*/
#define ESP32_PIN_BIAS_SHIFT 0U
#define ESP32_PIN_BIAS_MASK 0x3U
#define ESP32_PIN_DRV_SHIFT 2U
#define ESP32_PIN_DRV_MASK 0x3U
#define ESP32_PIN_OUT_SHIFT 4U
#define ESP32_PIN_OUT_MASK 0x3U
#define ESP32_PIN_EN_DIR_SHIFT 6U
#define ESP32_PIN_EN_DIR_MASK 0x3U
/* Bias definitions */
#define ESP32_NO_PULL 0x1
#define ESP32_PULL_UP 0x2
#define ESP32_PULL_DOWN 0x3
/* Pin drive definitions */
#define ESP32_PUSH_PULL 0x1
#define ESP32_OPEN_DRAIN 0x2
/*
* An output pin can be initialized
* to either high or low
*/
#define ESP32_PIN_OUT_HIGH 0x1
#define ESP32_PIN_OUT_LOW 0x2
/*
* Enable input or output on pin
* regardless of its direction
*/
#define ESP32_PIN_OUT_EN 0x1
#define ESP32_PIN_IN_EN 0x2
/*
* These flags are used by the pinctrl
* driver, based on the DTS properties
* assigned to a specific pin state
*/
#define ESP32_NO_PULL_FLAG BIT(0)
#define ESP32_PULL_UP_FLAG BIT(1)
#define ESP32_PULL_DOWN_FLAG BIT(2)
#define ESP32_PUSH_PULL_FLAG BIT(3)
#define ESP32_OPEN_DRAIN_FLAG BIT(4)
#define ESP32_DIR_INP_FLAG BIT(5)
#define ESP32_DIR_OUT_FLAG BIT(6)
#define ESP32_PIN_OUT_HIGH_FLAG BIT(7)
#define ESP32_PIN_OUT_LOW_FLAG BIT(8)
#define ESP32_PIN_OUT_EN_FLAG BIT(9)
#define ESP32_PIN_IN_EN_FLAG BIT(10)
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_ESP_PINCTRL_COMMON_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 699 |
```objective-c
/*
*
*
* NOTE: Autogenerated file using esp_genpinctrl.py
*/
#ifndef INC_DT_BINDS_PINCTRL_ESP32_PINCTRL_HAL_H_
#define INC_DT_BINDS_PINCTRL_ESP32_PINCTRL_HAL_H_
/* DAC_CH1 */
#define DAC_CH1_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_DAC1_OUT)
/* DAC_CH2 */
#define DAC_CH2_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_DAC2_OUT)
/* I2C0_SCL */
#define I2C0_SCL_GPIO0 \
ESP32_PINMUX(0, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO1 \
ESP32_PINMUX(1, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO2 \
ESP32_PINMUX(2, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO3 \
ESP32_PINMUX(3, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO4 \
ESP32_PINMUX(4, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO5 \
ESP32_PINMUX(5, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO6 \
ESP32_PINMUX(6, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO7 \
ESP32_PINMUX(7, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO8 \
ESP32_PINMUX(8, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO9 \
ESP32_PINMUX(9, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO10 \
ESP32_PINMUX(10, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO11 \
ESP32_PINMUX(11, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO12 \
ESP32_PINMUX(12, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO13 \
ESP32_PINMUX(13, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO14 \
ESP32_PINMUX(14, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO15 \
ESP32_PINMUX(15, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO16 \
ESP32_PINMUX(16, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO17 \
ESP32_PINMUX(17, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO18 \
ESP32_PINMUX(18, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO19 \
ESP32_PINMUX(19, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO20 \
ESP32_PINMUX(20, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO21 \
ESP32_PINMUX(21, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO22 \
ESP32_PINMUX(22, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO23 \
ESP32_PINMUX(23, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO25 \
ESP32_PINMUX(25, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO26 \
ESP32_PINMUX(26, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO27 \
ESP32_PINMUX(27, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO32 \
ESP32_PINMUX(32, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO33 \
ESP32_PINMUX(33, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
/* I2C0_SDA */
#define I2C0_SDA_GPIO0 \
ESP32_PINMUX(0, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO1 \
ESP32_PINMUX(1, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO2 \
ESP32_PINMUX(2, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO3 \
ESP32_PINMUX(3, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO4 \
ESP32_PINMUX(4, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO5 \
ESP32_PINMUX(5, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO6 \
ESP32_PINMUX(6, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO7 \
ESP32_PINMUX(7, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO8 \
ESP32_PINMUX(8, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO9 \
ESP32_PINMUX(9, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO10 \
ESP32_PINMUX(10, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO11 \
ESP32_PINMUX(11, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO12 \
ESP32_PINMUX(12, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO13 \
ESP32_PINMUX(13, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO14 \
ESP32_PINMUX(14, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO15 \
ESP32_PINMUX(15, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO16 \
ESP32_PINMUX(16, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO17 \
ESP32_PINMUX(17, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO18 \
ESP32_PINMUX(18, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO19 \
ESP32_PINMUX(19, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO20 \
ESP32_PINMUX(20, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO21 \
ESP32_PINMUX(21, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO22 \
ESP32_PINMUX(22, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO23 \
ESP32_PINMUX(23, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO25 \
ESP32_PINMUX(25, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO26 \
ESP32_PINMUX(26, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO27 \
ESP32_PINMUX(27, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO32 \
ESP32_PINMUX(32, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO33 \
ESP32_PINMUX(33, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
/* I2C1_SCL */
#define I2C1_SCL_GPIO0 \
ESP32_PINMUX(0, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO1 \
ESP32_PINMUX(1, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO2 \
ESP32_PINMUX(2, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO3 \
ESP32_PINMUX(3, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO4 \
ESP32_PINMUX(4, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO5 \
ESP32_PINMUX(5, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO6 \
ESP32_PINMUX(6, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO7 \
ESP32_PINMUX(7, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO8 \
ESP32_PINMUX(8, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO9 \
ESP32_PINMUX(9, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO10 \
ESP32_PINMUX(10, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO11 \
ESP32_PINMUX(11, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO12 \
ESP32_PINMUX(12, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO13 \
ESP32_PINMUX(13, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO14 \
ESP32_PINMUX(14, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO15 \
ESP32_PINMUX(15, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO16 \
ESP32_PINMUX(16, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO17 \
ESP32_PINMUX(17, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO18 \
ESP32_PINMUX(18, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO19 \
ESP32_PINMUX(19, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO20 \
ESP32_PINMUX(20, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO21 \
ESP32_PINMUX(21, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO22 \
ESP32_PINMUX(22, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO23 \
ESP32_PINMUX(23, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO25 \
ESP32_PINMUX(25, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO26 \
ESP32_PINMUX(26, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO27 \
ESP32_PINMUX(27, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO32 \
ESP32_PINMUX(32, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO33 \
ESP32_PINMUX(33, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
/* I2C1_SDA */
#define I2C1_SDA_GPIO0 \
ESP32_PINMUX(0, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO1 \
ESP32_PINMUX(1, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO2 \
ESP32_PINMUX(2, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO3 \
ESP32_PINMUX(3, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO4 \
ESP32_PINMUX(4, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO5 \
ESP32_PINMUX(5, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO6 \
ESP32_PINMUX(6, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO7 \
ESP32_PINMUX(7, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO8 \
ESP32_PINMUX(8, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO9 \
ESP32_PINMUX(9, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO10 \
ESP32_PINMUX(10, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO11 \
ESP32_PINMUX(11, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO12 \
ESP32_PINMUX(12, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO13 \
ESP32_PINMUX(13, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO14 \
ESP32_PINMUX(14, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO15 \
ESP32_PINMUX(15, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO16 \
ESP32_PINMUX(16, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO17 \
ESP32_PINMUX(17, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO18 \
ESP32_PINMUX(18, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO19 \
ESP32_PINMUX(19, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO20 \
ESP32_PINMUX(20, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO21 \
ESP32_PINMUX(21, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO22 \
ESP32_PINMUX(22, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO23 \
ESP32_PINMUX(23, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO25 \
ESP32_PINMUX(25, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO26 \
ESP32_PINMUX(26, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO27 \
ESP32_PINMUX(27, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO32 \
ESP32_PINMUX(32, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO33 \
ESP32_PINMUX(33, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
/* LEDC_CH0 */
#define LEDC_CH0_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
/* LEDC_CH1 */
#define LEDC_CH1_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
/* LEDC_CH10 */
#define LEDC_CH10_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT2)
#define LEDC_CH10_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT2)
#define LEDC_CH10_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT2)
#define LEDC_CH10_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT2)
#define LEDC_CH10_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT2)
#define LEDC_CH10_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT2)
#define LEDC_CH10_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT2)
#define LEDC_CH10_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT2)
#define LEDC_CH10_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT2)
#define LEDC_CH10_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT2)
#define LEDC_CH10_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT2)
#define LEDC_CH10_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT2)
#define LEDC_CH10_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT2)
#define LEDC_CH10_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT2)
#define LEDC_CH10_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT2)
#define LEDC_CH10_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT2)
#define LEDC_CH10_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT2)
#define LEDC_CH10_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT2)
#define LEDC_CH10_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT2)
#define LEDC_CH10_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT2)
#define LEDC_CH10_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT2)
#define LEDC_CH10_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT2)
#define LEDC_CH10_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT2)
#define LEDC_CH10_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT2)
#define LEDC_CH10_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT2)
#define LEDC_CH10_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT2)
#define LEDC_CH10_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT2)
#define LEDC_CH10_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT2)
#define LEDC_CH10_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT2)
/* LEDC_CH11 */
#define LEDC_CH11_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT3)
#define LEDC_CH11_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT3)
#define LEDC_CH11_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT3)
#define LEDC_CH11_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT3)
#define LEDC_CH11_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT3)
#define LEDC_CH11_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT3)
#define LEDC_CH11_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT3)
#define LEDC_CH11_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT3)
#define LEDC_CH11_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT3)
#define LEDC_CH11_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT3)
#define LEDC_CH11_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT3)
#define LEDC_CH11_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT3)
#define LEDC_CH11_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT3)
#define LEDC_CH11_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT3)
#define LEDC_CH11_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT3)
#define LEDC_CH11_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT3)
#define LEDC_CH11_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT3)
#define LEDC_CH11_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT3)
#define LEDC_CH11_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT3)
#define LEDC_CH11_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT3)
#define LEDC_CH11_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT3)
#define LEDC_CH11_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT3)
#define LEDC_CH11_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT3)
#define LEDC_CH11_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT3)
#define LEDC_CH11_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT3)
#define LEDC_CH11_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT3)
#define LEDC_CH11_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT3)
#define LEDC_CH11_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT3)
#define LEDC_CH11_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT3)
/* LEDC_CH12 */
#define LEDC_CH12_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT4)
#define LEDC_CH12_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT4)
#define LEDC_CH12_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT4)
#define LEDC_CH12_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT4)
#define LEDC_CH12_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT4)
#define LEDC_CH12_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT4)
#define LEDC_CH12_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT4)
#define LEDC_CH12_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT4)
#define LEDC_CH12_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT4)
#define LEDC_CH12_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT4)
#define LEDC_CH12_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT4)
#define LEDC_CH12_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT4)
#define LEDC_CH12_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT4)
#define LEDC_CH12_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT4)
#define LEDC_CH12_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT4)
#define LEDC_CH12_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT4)
#define LEDC_CH12_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT4)
#define LEDC_CH12_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT4)
#define LEDC_CH12_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT4)
#define LEDC_CH12_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT4)
#define LEDC_CH12_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT4)
#define LEDC_CH12_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT4)
#define LEDC_CH12_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT4)
#define LEDC_CH12_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT4)
#define LEDC_CH12_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT4)
#define LEDC_CH12_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT4)
#define LEDC_CH12_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT4)
#define LEDC_CH12_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT4)
#define LEDC_CH12_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT4)
/* LEDC_CH13 */
#define LEDC_CH13_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT5)
#define LEDC_CH13_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT5)
#define LEDC_CH13_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT5)
#define LEDC_CH13_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT5)
#define LEDC_CH13_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT5)
#define LEDC_CH13_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT5)
#define LEDC_CH13_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT5)
#define LEDC_CH13_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT5)
#define LEDC_CH13_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT5)
#define LEDC_CH13_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT5)
#define LEDC_CH13_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT5)
#define LEDC_CH13_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT5)
#define LEDC_CH13_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT5)
#define LEDC_CH13_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT5)
#define LEDC_CH13_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT5)
#define LEDC_CH13_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT5)
#define LEDC_CH13_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT5)
#define LEDC_CH13_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT5)
#define LEDC_CH13_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT5)
#define LEDC_CH13_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT5)
#define LEDC_CH13_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT5)
#define LEDC_CH13_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT5)
#define LEDC_CH13_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT5)
#define LEDC_CH13_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT5)
#define LEDC_CH13_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT5)
#define LEDC_CH13_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT5)
#define LEDC_CH13_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT5)
#define LEDC_CH13_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT5)
#define LEDC_CH13_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT5)
/* LEDC_CH14 */
#define LEDC_CH14_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT6)
#define LEDC_CH14_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT6)
#define LEDC_CH14_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT6)
#define LEDC_CH14_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT6)
#define LEDC_CH14_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT6)
#define LEDC_CH14_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT6)
#define LEDC_CH14_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT6)
#define LEDC_CH14_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT6)
#define LEDC_CH14_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT6)
#define LEDC_CH14_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT6)
#define LEDC_CH14_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT6)
#define LEDC_CH14_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT6)
#define LEDC_CH14_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT6)
#define LEDC_CH14_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT6)
#define LEDC_CH14_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT6)
#define LEDC_CH14_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT6)
#define LEDC_CH14_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT6)
#define LEDC_CH14_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT6)
#define LEDC_CH14_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT6)
#define LEDC_CH14_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT6)
#define LEDC_CH14_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT6)
#define LEDC_CH14_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT6)
#define LEDC_CH14_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT6)
#define LEDC_CH14_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT6)
#define LEDC_CH14_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT6)
#define LEDC_CH14_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT6)
#define LEDC_CH14_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT6)
#define LEDC_CH14_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT6)
#define LEDC_CH14_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT6)
/* LEDC_CH15 */
#define LEDC_CH15_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT7)
#define LEDC_CH15_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT7)
#define LEDC_CH15_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT7)
#define LEDC_CH15_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT7)
#define LEDC_CH15_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT7)
#define LEDC_CH15_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT7)
#define LEDC_CH15_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT7)
#define LEDC_CH15_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT7)
#define LEDC_CH15_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT7)
#define LEDC_CH15_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT7)
#define LEDC_CH15_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT7)
#define LEDC_CH15_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT7)
#define LEDC_CH15_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT7)
#define LEDC_CH15_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT7)
#define LEDC_CH15_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT7)
#define LEDC_CH15_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT7)
#define LEDC_CH15_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT7)
#define LEDC_CH15_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT7)
#define LEDC_CH15_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT7)
#define LEDC_CH15_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT7)
#define LEDC_CH15_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT7)
#define LEDC_CH15_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT7)
#define LEDC_CH15_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT7)
#define LEDC_CH15_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT7)
#define LEDC_CH15_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT7)
#define LEDC_CH15_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT7)
#define LEDC_CH15_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT7)
#define LEDC_CH15_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT7)
#define LEDC_CH15_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT7)
/* LEDC_CH2 */
#define LEDC_CH2_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
/* LEDC_CH3 */
#define LEDC_CH3_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
/* LEDC_CH4 */
#define LEDC_CH4_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
/* LEDC_CH5 */
#define LEDC_CH5_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
/* LEDC_CH6 */
#define LEDC_CH6_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
/* LEDC_CH7 */
#define LEDC_CH7_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
/* LEDC_CH8 */
#define LEDC_CH8_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT0)
#define LEDC_CH8_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT0)
#define LEDC_CH8_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT0)
#define LEDC_CH8_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT0)
#define LEDC_CH8_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT0)
#define LEDC_CH8_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT0)
#define LEDC_CH8_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT0)
#define LEDC_CH8_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT0)
#define LEDC_CH8_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT0)
#define LEDC_CH8_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT0)
#define LEDC_CH8_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT0)
#define LEDC_CH8_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT0)
#define LEDC_CH8_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT0)
#define LEDC_CH8_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT0)
#define LEDC_CH8_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT0)
#define LEDC_CH8_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT0)
#define LEDC_CH8_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT0)
#define LEDC_CH8_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT0)
#define LEDC_CH8_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT0)
#define LEDC_CH8_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT0)
#define LEDC_CH8_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT0)
#define LEDC_CH8_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT0)
#define LEDC_CH8_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT0)
#define LEDC_CH8_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT0)
#define LEDC_CH8_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT0)
#define LEDC_CH8_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT0)
#define LEDC_CH8_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT0)
#define LEDC_CH8_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT0)
#define LEDC_CH8_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT0)
/* LEDC_CH9 */
#define LEDC_CH9_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT1)
#define LEDC_CH9_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT1)
#define LEDC_CH9_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT1)
#define LEDC_CH9_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT1)
#define LEDC_CH9_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT1)
#define LEDC_CH9_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT1)
#define LEDC_CH9_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT1)
#define LEDC_CH9_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT1)
#define LEDC_CH9_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT1)
#define LEDC_CH9_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT1)
#define LEDC_CH9_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT1)
#define LEDC_CH9_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT1)
#define LEDC_CH9_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT1)
#define LEDC_CH9_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT1)
#define LEDC_CH9_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT1)
#define LEDC_CH9_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT1)
#define LEDC_CH9_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT1)
#define LEDC_CH9_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT1)
#define LEDC_CH9_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT1)
#define LEDC_CH9_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT1)
#define LEDC_CH9_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT1)
#define LEDC_CH9_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT1)
#define LEDC_CH9_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT1)
#define LEDC_CH9_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT1)
#define LEDC_CH9_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT1)
#define LEDC_CH9_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT1)
#define LEDC_CH9_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT1)
#define LEDC_CH9_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT1)
#define LEDC_CH9_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_LEDC_HS_SIG_OUT1)
/* MCPWM0_CAP0 */
#define MCPWM0_CAP0_GPIO0 \
ESP32_PINMUX(0, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO1 \
ESP32_PINMUX(1, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO2 \
ESP32_PINMUX(2, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO3 \
ESP32_PINMUX(3, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO4 \
ESP32_PINMUX(4, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO5 \
ESP32_PINMUX(5, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO6 \
ESP32_PINMUX(6, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO7 \
ESP32_PINMUX(7, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO8 \
ESP32_PINMUX(8, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO9 \
ESP32_PINMUX(9, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO10 \
ESP32_PINMUX(10, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO11 \
ESP32_PINMUX(11, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO12 \
ESP32_PINMUX(12, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO13 \
ESP32_PINMUX(13, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO14 \
ESP32_PINMUX(14, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO15 \
ESP32_PINMUX(15, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO16 \
ESP32_PINMUX(16, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO17 \
ESP32_PINMUX(17, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO18 \
ESP32_PINMUX(18, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO19 \
ESP32_PINMUX(19, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO20 \
ESP32_PINMUX(20, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO21 \
ESP32_PINMUX(21, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO22 \
ESP32_PINMUX(22, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO23 \
ESP32_PINMUX(23, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO25 \
ESP32_PINMUX(25, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO26 \
ESP32_PINMUX(26, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO27 \
ESP32_PINMUX(27, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO32 \
ESP32_PINMUX(32, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO33 \
ESP32_PINMUX(33, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO34 \
ESP32_PINMUX(34, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO35 \
ESP32_PINMUX(35, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO36 \
ESP32_PINMUX(36, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO37 \
ESP32_PINMUX(37, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO38 \
ESP32_PINMUX(38, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO39 \
ESP32_PINMUX(39, ESP_PWM0_CAP0_IN, ESP_NOSIG)
/* MCPWM0_CAP1 */
#define MCPWM0_CAP1_GPIO0 \
ESP32_PINMUX(0, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO1 \
ESP32_PINMUX(1, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO2 \
ESP32_PINMUX(2, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO3 \
ESP32_PINMUX(3, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO4 \
ESP32_PINMUX(4, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO5 \
ESP32_PINMUX(5, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO6 \
ESP32_PINMUX(6, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO7 \
ESP32_PINMUX(7, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO8 \
ESP32_PINMUX(8, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO9 \
ESP32_PINMUX(9, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO10 \
ESP32_PINMUX(10, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO11 \
ESP32_PINMUX(11, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO12 \
ESP32_PINMUX(12, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO13 \
ESP32_PINMUX(13, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO14 \
ESP32_PINMUX(14, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO15 \
ESP32_PINMUX(15, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO16 \
ESP32_PINMUX(16, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO17 \
ESP32_PINMUX(17, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO18 \
ESP32_PINMUX(18, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO19 \
ESP32_PINMUX(19, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO20 \
ESP32_PINMUX(20, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO21 \
ESP32_PINMUX(21, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO22 \
ESP32_PINMUX(22, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO23 \
ESP32_PINMUX(23, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO25 \
ESP32_PINMUX(25, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO26 \
ESP32_PINMUX(26, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO27 \
ESP32_PINMUX(27, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO32 \
ESP32_PINMUX(32, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO33 \
ESP32_PINMUX(33, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO34 \
ESP32_PINMUX(34, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO35 \
ESP32_PINMUX(35, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO36 \
ESP32_PINMUX(36, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO37 \
ESP32_PINMUX(37, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO38 \
ESP32_PINMUX(38, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO39 \
ESP32_PINMUX(39, ESP_PWM0_CAP1_IN, ESP_NOSIG)
/* MCPWM0_CAP2 */
#define MCPWM0_CAP2_GPIO0 \
ESP32_PINMUX(0, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO1 \
ESP32_PINMUX(1, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO2 \
ESP32_PINMUX(2, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO3 \
ESP32_PINMUX(3, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO4 \
ESP32_PINMUX(4, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO5 \
ESP32_PINMUX(5, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO6 \
ESP32_PINMUX(6, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO7 \
ESP32_PINMUX(7, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO8 \
ESP32_PINMUX(8, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO9 \
ESP32_PINMUX(9, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO10 \
ESP32_PINMUX(10, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO11 \
ESP32_PINMUX(11, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO12 \
ESP32_PINMUX(12, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO13 \
ESP32_PINMUX(13, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO14 \
ESP32_PINMUX(14, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO15 \
ESP32_PINMUX(15, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO16 \
ESP32_PINMUX(16, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO17 \
ESP32_PINMUX(17, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO18 \
ESP32_PINMUX(18, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO19 \
ESP32_PINMUX(19, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO20 \
ESP32_PINMUX(20, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO21 \
ESP32_PINMUX(21, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO22 \
ESP32_PINMUX(22, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO23 \
ESP32_PINMUX(23, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO25 \
ESP32_PINMUX(25, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO26 \
ESP32_PINMUX(26, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO27 \
ESP32_PINMUX(27, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO32 \
ESP32_PINMUX(32, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO33 \
ESP32_PINMUX(33, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO34 \
ESP32_PINMUX(34, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO35 \
ESP32_PINMUX(35, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO36 \
ESP32_PINMUX(36, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO37 \
ESP32_PINMUX(37, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO38 \
ESP32_PINMUX(38, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO39 \
ESP32_PINMUX(39, ESP_PWM0_CAP2_IN, ESP_NOSIG)
/* MCPWM0_FAULT0 */
#define MCPWM0_FAULT0_GPIO0 \
ESP32_PINMUX(0, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO1 \
ESP32_PINMUX(1, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO2 \
ESP32_PINMUX(2, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO3 \
ESP32_PINMUX(3, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO4 \
ESP32_PINMUX(4, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO5 \
ESP32_PINMUX(5, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO6 \
ESP32_PINMUX(6, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO7 \
ESP32_PINMUX(7, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO8 \
ESP32_PINMUX(8, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO9 \
ESP32_PINMUX(9, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO10 \
ESP32_PINMUX(10, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO11 \
ESP32_PINMUX(11, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO12 \
ESP32_PINMUX(12, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO13 \
ESP32_PINMUX(13, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO14 \
ESP32_PINMUX(14, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO15 \
ESP32_PINMUX(15, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO16 \
ESP32_PINMUX(16, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO17 \
ESP32_PINMUX(17, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO18 \
ESP32_PINMUX(18, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO19 \
ESP32_PINMUX(19, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO20 \
ESP32_PINMUX(20, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO21 \
ESP32_PINMUX(21, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO22 \
ESP32_PINMUX(22, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO23 \
ESP32_PINMUX(23, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO25 \
ESP32_PINMUX(25, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO26 \
ESP32_PINMUX(26, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO27 \
ESP32_PINMUX(27, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO32 \
ESP32_PINMUX(32, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO33 \
ESP32_PINMUX(33, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO34 \
ESP32_PINMUX(34, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO35 \
ESP32_PINMUX(35, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO36 \
ESP32_PINMUX(36, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO37 \
ESP32_PINMUX(37, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO38 \
ESP32_PINMUX(38, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO39 \
ESP32_PINMUX(39, ESP_PWM0_F0_IN, ESP_NOSIG)
/* MCPWM0_FAULT1 */
#define MCPWM0_FAULT1_GPIO0 \
ESP32_PINMUX(0, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO1 \
ESP32_PINMUX(1, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO2 \
ESP32_PINMUX(2, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO3 \
ESP32_PINMUX(3, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO4 \
ESP32_PINMUX(4, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO5 \
ESP32_PINMUX(5, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO6 \
ESP32_PINMUX(6, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO7 \
ESP32_PINMUX(7, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO8 \
ESP32_PINMUX(8, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO9 \
ESP32_PINMUX(9, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO10 \
ESP32_PINMUX(10, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO11 \
ESP32_PINMUX(11, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO12 \
ESP32_PINMUX(12, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO13 \
ESP32_PINMUX(13, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO14 \
ESP32_PINMUX(14, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO15 \
ESP32_PINMUX(15, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO16 \
ESP32_PINMUX(16, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO17 \
ESP32_PINMUX(17, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO18 \
ESP32_PINMUX(18, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO19 \
ESP32_PINMUX(19, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO20 \
ESP32_PINMUX(20, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO21 \
ESP32_PINMUX(21, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO22 \
ESP32_PINMUX(22, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO23 \
ESP32_PINMUX(23, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO25 \
ESP32_PINMUX(25, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO26 \
ESP32_PINMUX(26, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO27 \
ESP32_PINMUX(27, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO32 \
ESP32_PINMUX(32, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO33 \
ESP32_PINMUX(33, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO34 \
ESP32_PINMUX(34, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO35 \
ESP32_PINMUX(35, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO36 \
ESP32_PINMUX(36, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO37 \
ESP32_PINMUX(37, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO38 \
ESP32_PINMUX(38, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO39 \
ESP32_PINMUX(39, ESP_PWM0_F1_IN, ESP_NOSIG)
/* MCPWM0_FAULT2 */
#define MCPWM0_FAULT2_GPIO0 \
ESP32_PINMUX(0, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO1 \
ESP32_PINMUX(1, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO2 \
ESP32_PINMUX(2, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO3 \
ESP32_PINMUX(3, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO4 \
ESP32_PINMUX(4, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO5 \
ESP32_PINMUX(5, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO6 \
ESP32_PINMUX(6, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO7 \
ESP32_PINMUX(7, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO8 \
ESP32_PINMUX(8, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO9 \
ESP32_PINMUX(9, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO10 \
ESP32_PINMUX(10, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO11 \
ESP32_PINMUX(11, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO12 \
ESP32_PINMUX(12, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO13 \
ESP32_PINMUX(13, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO14 \
ESP32_PINMUX(14, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO15 \
ESP32_PINMUX(15, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO16 \
ESP32_PINMUX(16, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO17 \
ESP32_PINMUX(17, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO18 \
ESP32_PINMUX(18, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO19 \
ESP32_PINMUX(19, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO20 \
ESP32_PINMUX(20, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO21 \
ESP32_PINMUX(21, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO22 \
ESP32_PINMUX(22, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO23 \
ESP32_PINMUX(23, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO25 \
ESP32_PINMUX(25, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO26 \
ESP32_PINMUX(26, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO27 \
ESP32_PINMUX(27, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO32 \
ESP32_PINMUX(32, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO33 \
ESP32_PINMUX(33, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO34 \
ESP32_PINMUX(34, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO35 \
ESP32_PINMUX(35, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO36 \
ESP32_PINMUX(36, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO37 \
ESP32_PINMUX(37, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO38 \
ESP32_PINMUX(38, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO39 \
ESP32_PINMUX(39, ESP_PWM0_F2_IN, ESP_NOSIG)
/* MCPWM0_OUT0A */
#define MCPWM0_OUT0A_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_PWM0_OUT0A)
/* MCPWM0_OUT0B */
#define MCPWM0_OUT0B_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_PWM0_OUT0B)
/* MCPWM0_OUT1A */
#define MCPWM0_OUT1A_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_PWM0_OUT1A)
/* MCPWM0_OUT1B */
#define MCPWM0_OUT1B_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_PWM0_OUT1B)
/* MCPWM0_OUT2A */
#define MCPWM0_OUT2A_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_PWM0_OUT2A)
/* MCPWM0_OUT2B */
#define MCPWM0_OUT2B_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_PWM0_OUT2B)
/* MCPWM0_SYNC0 */
#define MCPWM0_SYNC0_GPIO0 \
ESP32_PINMUX(0, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO1 \
ESP32_PINMUX(1, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO2 \
ESP32_PINMUX(2, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO3 \
ESP32_PINMUX(3, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO4 \
ESP32_PINMUX(4, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO5 \
ESP32_PINMUX(5, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO6 \
ESP32_PINMUX(6, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO7 \
ESP32_PINMUX(7, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO8 \
ESP32_PINMUX(8, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO9 \
ESP32_PINMUX(9, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO10 \
ESP32_PINMUX(10, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO11 \
ESP32_PINMUX(11, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO12 \
ESP32_PINMUX(12, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO13 \
ESP32_PINMUX(13, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO14 \
ESP32_PINMUX(14, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO15 \
ESP32_PINMUX(15, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO16 \
ESP32_PINMUX(16, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO17 \
ESP32_PINMUX(17, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO18 \
ESP32_PINMUX(18, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO19 \
ESP32_PINMUX(19, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO20 \
ESP32_PINMUX(20, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO21 \
ESP32_PINMUX(21, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO22 \
ESP32_PINMUX(22, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO23 \
ESP32_PINMUX(23, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO25 \
ESP32_PINMUX(25, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO26 \
ESP32_PINMUX(26, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO27 \
ESP32_PINMUX(27, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO32 \
ESP32_PINMUX(32, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO33 \
ESP32_PINMUX(33, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO34 \
ESP32_PINMUX(34, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO35 \
ESP32_PINMUX(35, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO36 \
ESP32_PINMUX(36, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO37 \
ESP32_PINMUX(37, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO38 \
ESP32_PINMUX(38, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO39 \
ESP32_PINMUX(39, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
/* MCPWM0_SYNC1 */
#define MCPWM0_SYNC1_GPIO0 \
ESP32_PINMUX(0, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO1 \
ESP32_PINMUX(1, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO2 \
ESP32_PINMUX(2, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO3 \
ESP32_PINMUX(3, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO4 \
ESP32_PINMUX(4, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO5 \
ESP32_PINMUX(5, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO6 \
ESP32_PINMUX(6, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO7 \
ESP32_PINMUX(7, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO8 \
ESP32_PINMUX(8, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO9 \
ESP32_PINMUX(9, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO10 \
ESP32_PINMUX(10, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO11 \
ESP32_PINMUX(11, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO12 \
ESP32_PINMUX(12, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO13 \
ESP32_PINMUX(13, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO14 \
ESP32_PINMUX(14, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO15 \
ESP32_PINMUX(15, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO16 \
ESP32_PINMUX(16, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO17 \
ESP32_PINMUX(17, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO18 \
ESP32_PINMUX(18, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO19 \
ESP32_PINMUX(19, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO20 \
ESP32_PINMUX(20, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO21 \
ESP32_PINMUX(21, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO22 \
ESP32_PINMUX(22, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO23 \
ESP32_PINMUX(23, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO25 \
ESP32_PINMUX(25, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO26 \
ESP32_PINMUX(26, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO27 \
ESP32_PINMUX(27, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO32 \
ESP32_PINMUX(32, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO33 \
ESP32_PINMUX(33, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO34 \
ESP32_PINMUX(34, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO35 \
ESP32_PINMUX(35, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO36 \
ESP32_PINMUX(36, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO37 \
ESP32_PINMUX(37, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO38 \
ESP32_PINMUX(38, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO39 \
ESP32_PINMUX(39, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
/* MCPWM0_SYNC2 */
#define MCPWM0_SYNC2_GPIO0 \
ESP32_PINMUX(0, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO1 \
ESP32_PINMUX(1, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO2 \
ESP32_PINMUX(2, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO3 \
ESP32_PINMUX(3, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO4 \
ESP32_PINMUX(4, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO5 \
ESP32_PINMUX(5, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO6 \
ESP32_PINMUX(6, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO7 \
ESP32_PINMUX(7, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO8 \
ESP32_PINMUX(8, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO9 \
ESP32_PINMUX(9, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO10 \
ESP32_PINMUX(10, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO11 \
ESP32_PINMUX(11, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO12 \
ESP32_PINMUX(12, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO13 \
ESP32_PINMUX(13, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO14 \
ESP32_PINMUX(14, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO15 \
ESP32_PINMUX(15, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO16 \
ESP32_PINMUX(16, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO17 \
ESP32_PINMUX(17, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO18 \
ESP32_PINMUX(18, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO19 \
ESP32_PINMUX(19, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO20 \
ESP32_PINMUX(20, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO21 \
ESP32_PINMUX(21, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO22 \
ESP32_PINMUX(22, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO23 \
ESP32_PINMUX(23, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO25 \
ESP32_PINMUX(25, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO26 \
ESP32_PINMUX(26, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO27 \
ESP32_PINMUX(27, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO32 \
ESP32_PINMUX(32, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO33 \
ESP32_PINMUX(33, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO34 \
ESP32_PINMUX(34, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO35 \
ESP32_PINMUX(35, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO36 \
ESP32_PINMUX(36, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO37 \
ESP32_PINMUX(37, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO38 \
ESP32_PINMUX(38, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO39 \
ESP32_PINMUX(39, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
/* MCPWM1_CAP0 */
#define MCPWM1_CAP0_GPIO0 \
ESP32_PINMUX(0, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO1 \
ESP32_PINMUX(1, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO2 \
ESP32_PINMUX(2, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO3 \
ESP32_PINMUX(3, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO4 \
ESP32_PINMUX(4, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO5 \
ESP32_PINMUX(5, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO6 \
ESP32_PINMUX(6, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO7 \
ESP32_PINMUX(7, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO8 \
ESP32_PINMUX(8, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO9 \
ESP32_PINMUX(9, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO10 \
ESP32_PINMUX(10, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO11 \
ESP32_PINMUX(11, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO12 \
ESP32_PINMUX(12, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO13 \
ESP32_PINMUX(13, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO14 \
ESP32_PINMUX(14, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO15 \
ESP32_PINMUX(15, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO16 \
ESP32_PINMUX(16, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO17 \
ESP32_PINMUX(17, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO18 \
ESP32_PINMUX(18, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO19 \
ESP32_PINMUX(19, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO20 \
ESP32_PINMUX(20, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO21 \
ESP32_PINMUX(21, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO22 \
ESP32_PINMUX(22, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO23 \
ESP32_PINMUX(23, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO25 \
ESP32_PINMUX(25, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO26 \
ESP32_PINMUX(26, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO27 \
ESP32_PINMUX(27, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO32 \
ESP32_PINMUX(32, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO33 \
ESP32_PINMUX(33, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO34 \
ESP32_PINMUX(34, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO35 \
ESP32_PINMUX(35, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO36 \
ESP32_PINMUX(36, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO37 \
ESP32_PINMUX(37, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO38 \
ESP32_PINMUX(38, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO39 \
ESP32_PINMUX(39, ESP_PWM1_CAP0_IN, ESP_NOSIG)
/* MCPWM1_CAP1 */
#define MCPWM1_CAP1_GPIO0 \
ESP32_PINMUX(0, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO1 \
ESP32_PINMUX(1, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO2 \
ESP32_PINMUX(2, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO3 \
ESP32_PINMUX(3, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO4 \
ESP32_PINMUX(4, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO5 \
ESP32_PINMUX(5, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO6 \
ESP32_PINMUX(6, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO7 \
ESP32_PINMUX(7, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO8 \
ESP32_PINMUX(8, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO9 \
ESP32_PINMUX(9, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO10 \
ESP32_PINMUX(10, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO11 \
ESP32_PINMUX(11, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO12 \
ESP32_PINMUX(12, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO13 \
ESP32_PINMUX(13, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO14 \
ESP32_PINMUX(14, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO15 \
ESP32_PINMUX(15, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO16 \
ESP32_PINMUX(16, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO17 \
ESP32_PINMUX(17, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO18 \
ESP32_PINMUX(18, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO19 \
ESP32_PINMUX(19, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO20 \
ESP32_PINMUX(20, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO21 \
ESP32_PINMUX(21, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO22 \
ESP32_PINMUX(22, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO23 \
ESP32_PINMUX(23, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO25 \
ESP32_PINMUX(25, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO26 \
ESP32_PINMUX(26, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO27 \
ESP32_PINMUX(27, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO32 \
ESP32_PINMUX(32, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO33 \
ESP32_PINMUX(33, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO34 \
ESP32_PINMUX(34, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO35 \
ESP32_PINMUX(35, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO36 \
ESP32_PINMUX(36, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO37 \
ESP32_PINMUX(37, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO38 \
ESP32_PINMUX(38, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO39 \
ESP32_PINMUX(39, ESP_PWM1_CAP1_IN, ESP_NOSIG)
/* MCPWM1_CAP2 */
#define MCPWM1_CAP2_GPIO0 \
ESP32_PINMUX(0, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO1 \
ESP32_PINMUX(1, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO2 \
ESP32_PINMUX(2, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO3 \
ESP32_PINMUX(3, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO4 \
ESP32_PINMUX(4, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO5 \
ESP32_PINMUX(5, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO6 \
ESP32_PINMUX(6, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO7 \
ESP32_PINMUX(7, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO8 \
ESP32_PINMUX(8, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO9 \
ESP32_PINMUX(9, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO10 \
ESP32_PINMUX(10, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO11 \
ESP32_PINMUX(11, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO12 \
ESP32_PINMUX(12, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO13 \
ESP32_PINMUX(13, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO14 \
ESP32_PINMUX(14, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO15 \
ESP32_PINMUX(15, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO16 \
ESP32_PINMUX(16, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO17 \
ESP32_PINMUX(17, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO18 \
ESP32_PINMUX(18, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO19 \
ESP32_PINMUX(19, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO20 \
ESP32_PINMUX(20, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO21 \
ESP32_PINMUX(21, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO22 \
ESP32_PINMUX(22, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO23 \
ESP32_PINMUX(23, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO25 \
ESP32_PINMUX(25, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO26 \
ESP32_PINMUX(26, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO27 \
ESP32_PINMUX(27, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO32 \
ESP32_PINMUX(32, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO33 \
ESP32_PINMUX(33, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO34 \
ESP32_PINMUX(34, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO35 \
ESP32_PINMUX(35, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO36 \
ESP32_PINMUX(36, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO37 \
ESP32_PINMUX(37, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO38 \
ESP32_PINMUX(38, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO39 \
ESP32_PINMUX(39, ESP_PWM1_CAP2_IN, ESP_NOSIG)
/* MCPWM1_FAULT0 */
#define MCPWM1_FAULT0_GPIO0 \
ESP32_PINMUX(0, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO1 \
ESP32_PINMUX(1, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO2 \
ESP32_PINMUX(2, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO3 \
ESP32_PINMUX(3, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO4 \
ESP32_PINMUX(4, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO5 \
ESP32_PINMUX(5, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO6 \
ESP32_PINMUX(6, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO7 \
ESP32_PINMUX(7, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO8 \
ESP32_PINMUX(8, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO9 \
ESP32_PINMUX(9, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO10 \
ESP32_PINMUX(10, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO11 \
ESP32_PINMUX(11, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO12 \
ESP32_PINMUX(12, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO13 \
ESP32_PINMUX(13, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO14 \
ESP32_PINMUX(14, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO15 \
ESP32_PINMUX(15, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO16 \
ESP32_PINMUX(16, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO17 \
ESP32_PINMUX(17, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO18 \
ESP32_PINMUX(18, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO19 \
ESP32_PINMUX(19, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO20 \
ESP32_PINMUX(20, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO21 \
ESP32_PINMUX(21, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO22 \
ESP32_PINMUX(22, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO23 \
ESP32_PINMUX(23, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO25 \
ESP32_PINMUX(25, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO26 \
ESP32_PINMUX(26, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO27 \
ESP32_PINMUX(27, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO32 \
ESP32_PINMUX(32, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO33 \
ESP32_PINMUX(33, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO34 \
ESP32_PINMUX(34, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO35 \
ESP32_PINMUX(35, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO36 \
ESP32_PINMUX(36, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO37 \
ESP32_PINMUX(37, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO38 \
ESP32_PINMUX(38, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO39 \
ESP32_PINMUX(39, ESP_PWM1_F0_IN, ESP_NOSIG)
/* MCPWM1_FAULT1 */
#define MCPWM1_FAULT1_GPIO0 \
ESP32_PINMUX(0, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO1 \
ESP32_PINMUX(1, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO2 \
ESP32_PINMUX(2, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO3 \
ESP32_PINMUX(3, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO4 \
ESP32_PINMUX(4, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO5 \
ESP32_PINMUX(5, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO6 \
ESP32_PINMUX(6, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO7 \
ESP32_PINMUX(7, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO8 \
ESP32_PINMUX(8, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO9 \
ESP32_PINMUX(9, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO10 \
ESP32_PINMUX(10, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO11 \
ESP32_PINMUX(11, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO12 \
ESP32_PINMUX(12, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO13 \
ESP32_PINMUX(13, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO14 \
ESP32_PINMUX(14, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO15 \
ESP32_PINMUX(15, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO16 \
ESP32_PINMUX(16, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO17 \
ESP32_PINMUX(17, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO18 \
ESP32_PINMUX(18, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO19 \
ESP32_PINMUX(19, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO20 \
ESP32_PINMUX(20, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO21 \
ESP32_PINMUX(21, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO22 \
ESP32_PINMUX(22, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO23 \
ESP32_PINMUX(23, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO25 \
ESP32_PINMUX(25, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO26 \
ESP32_PINMUX(26, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO27 \
ESP32_PINMUX(27, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO32 \
ESP32_PINMUX(32, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO33 \
ESP32_PINMUX(33, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO34 \
ESP32_PINMUX(34, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO35 \
ESP32_PINMUX(35, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO36 \
ESP32_PINMUX(36, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO37 \
ESP32_PINMUX(37, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO38 \
ESP32_PINMUX(38, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO39 \
ESP32_PINMUX(39, ESP_PWM1_F1_IN, ESP_NOSIG)
/* MCPWM1_FAULT2 */
#define MCPWM1_FAULT2_GPIO0 \
ESP32_PINMUX(0, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO1 \
ESP32_PINMUX(1, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO2 \
ESP32_PINMUX(2, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO3 \
ESP32_PINMUX(3, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO4 \
ESP32_PINMUX(4, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO5 \
ESP32_PINMUX(5, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO6 \
ESP32_PINMUX(6, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO7 \
ESP32_PINMUX(7, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO8 \
ESP32_PINMUX(8, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO9 \
ESP32_PINMUX(9, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO10 \
ESP32_PINMUX(10, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO11 \
ESP32_PINMUX(11, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO12 \
ESP32_PINMUX(12, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO13 \
ESP32_PINMUX(13, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO14 \
ESP32_PINMUX(14, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO15 \
ESP32_PINMUX(15, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO16 \
ESP32_PINMUX(16, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO17 \
ESP32_PINMUX(17, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO18 \
ESP32_PINMUX(18, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO19 \
ESP32_PINMUX(19, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO20 \
ESP32_PINMUX(20, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO21 \
ESP32_PINMUX(21, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO22 \
ESP32_PINMUX(22, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO23 \
ESP32_PINMUX(23, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO25 \
ESP32_PINMUX(25, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO26 \
ESP32_PINMUX(26, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO27 \
ESP32_PINMUX(27, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO32 \
ESP32_PINMUX(32, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO33 \
ESP32_PINMUX(33, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO34 \
ESP32_PINMUX(34, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO35 \
ESP32_PINMUX(35, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO36 \
ESP32_PINMUX(36, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO37 \
ESP32_PINMUX(37, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO38 \
ESP32_PINMUX(38, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO39 \
ESP32_PINMUX(39, ESP_PWM1_F2_IN, ESP_NOSIG)
/* MCPWM1_OUT0A */
#define MCPWM1_OUT0A_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_PWM1_OUT0A)
/* MCPWM1_OUT0B */
#define MCPWM1_OUT0B_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_PWM1_OUT0B)
/* MCPWM1_OUT1A */
#define MCPWM1_OUT1A_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_PWM1_OUT1A)
/* MCPWM1_OUT1B */
#define MCPWM1_OUT1B_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_PWM1_OUT1B)
/* MCPWM1_OUT2A */
#define MCPWM1_OUT2A_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_PWM1_OUT2A)
/* MCPWM1_OUT2B */
#define MCPWM1_OUT2B_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_PWM1_OUT2B)
/* MCPWM1_SYNC0 */
#define MCPWM1_SYNC0_GPIO0 \
ESP32_PINMUX(0, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO1 \
ESP32_PINMUX(1, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO2 \
ESP32_PINMUX(2, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO3 \
ESP32_PINMUX(3, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO4 \
ESP32_PINMUX(4, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO5 \
ESP32_PINMUX(5, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO6 \
ESP32_PINMUX(6, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO7 \
ESP32_PINMUX(7, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO8 \
ESP32_PINMUX(8, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO9 \
ESP32_PINMUX(9, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO10 \
ESP32_PINMUX(10, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO11 \
ESP32_PINMUX(11, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO12 \
ESP32_PINMUX(12, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO13 \
ESP32_PINMUX(13, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO14 \
ESP32_PINMUX(14, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO15 \
ESP32_PINMUX(15, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO16 \
ESP32_PINMUX(16, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO17 \
ESP32_PINMUX(17, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO18 \
ESP32_PINMUX(18, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO19 \
ESP32_PINMUX(19, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO20 \
ESP32_PINMUX(20, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO21 \
ESP32_PINMUX(21, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO22 \
ESP32_PINMUX(22, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO23 \
ESP32_PINMUX(23, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO25 \
ESP32_PINMUX(25, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO26 \
ESP32_PINMUX(26, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO27 \
ESP32_PINMUX(27, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO32 \
ESP32_PINMUX(32, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO33 \
ESP32_PINMUX(33, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO34 \
ESP32_PINMUX(34, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO35 \
ESP32_PINMUX(35, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO36 \
ESP32_PINMUX(36, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO37 \
ESP32_PINMUX(37, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO38 \
ESP32_PINMUX(38, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO39 \
ESP32_PINMUX(39, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
/* MCPWM1_SYNC1 */
#define MCPWM1_SYNC1_GPIO0 \
ESP32_PINMUX(0, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO1 \
ESP32_PINMUX(1, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO2 \
ESP32_PINMUX(2, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO3 \
ESP32_PINMUX(3, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO4 \
ESP32_PINMUX(4, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO5 \
ESP32_PINMUX(5, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO6 \
ESP32_PINMUX(6, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO7 \
ESP32_PINMUX(7, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO8 \
ESP32_PINMUX(8, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO9 \
ESP32_PINMUX(9, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO10 \
ESP32_PINMUX(10, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO11 \
ESP32_PINMUX(11, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO12 \
ESP32_PINMUX(12, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO13 \
ESP32_PINMUX(13, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO14 \
ESP32_PINMUX(14, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO15 \
ESP32_PINMUX(15, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO16 \
ESP32_PINMUX(16, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO17 \
ESP32_PINMUX(17, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO18 \
ESP32_PINMUX(18, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO19 \
ESP32_PINMUX(19, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO20 \
ESP32_PINMUX(20, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO21 \
ESP32_PINMUX(21, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO22 \
ESP32_PINMUX(22, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO23 \
ESP32_PINMUX(23, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO25 \
ESP32_PINMUX(25, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO26 \
ESP32_PINMUX(26, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO27 \
ESP32_PINMUX(27, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO32 \
ESP32_PINMUX(32, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO33 \
ESP32_PINMUX(33, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO34 \
ESP32_PINMUX(34, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO35 \
ESP32_PINMUX(35, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO36 \
ESP32_PINMUX(36, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO37 \
ESP32_PINMUX(37, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO38 \
ESP32_PINMUX(38, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO39 \
ESP32_PINMUX(39, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
/* MCPWM1_SYNC2 */
#define MCPWM1_SYNC2_GPIO0 \
ESP32_PINMUX(0, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO1 \
ESP32_PINMUX(1, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO2 \
ESP32_PINMUX(2, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO3 \
ESP32_PINMUX(3, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO4 \
ESP32_PINMUX(4, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO5 \
ESP32_PINMUX(5, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO6 \
ESP32_PINMUX(6, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO7 \
ESP32_PINMUX(7, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO8 \
ESP32_PINMUX(8, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO9 \
ESP32_PINMUX(9, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO10 \
ESP32_PINMUX(10, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO11 \
ESP32_PINMUX(11, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO12 \
ESP32_PINMUX(12, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO13 \
ESP32_PINMUX(13, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO14 \
ESP32_PINMUX(14, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO15 \
ESP32_PINMUX(15, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO16 \
ESP32_PINMUX(16, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO17 \
ESP32_PINMUX(17, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO18 \
ESP32_PINMUX(18, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO19 \
ESP32_PINMUX(19, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO20 \
ESP32_PINMUX(20, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO21 \
ESP32_PINMUX(21, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO22 \
ESP32_PINMUX(22, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO23 \
ESP32_PINMUX(23, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO25 \
ESP32_PINMUX(25, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO26 \
ESP32_PINMUX(26, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO27 \
ESP32_PINMUX(27, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO32 \
ESP32_PINMUX(32, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO33 \
ESP32_PINMUX(33, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO34 \
ESP32_PINMUX(34, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO35 \
ESP32_PINMUX(35, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO36 \
ESP32_PINMUX(36, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO37 \
ESP32_PINMUX(37, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO38 \
ESP32_PINMUX(38, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO39 \
ESP32_PINMUX(39, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
/* PCNT0_CH0CTRL */
#define PCNT0_CH0CTRL_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO22 \
ESP32_PINMUX(22, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO23 \
ESP32_PINMUX(23, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO25 \
ESP32_PINMUX(25, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
/* PCNT0_CH0SIG */
#define PCNT0_CH0SIG_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO22 \
ESP32_PINMUX(22, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO23 \
ESP32_PINMUX(23, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO25 \
ESP32_PINMUX(25, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
/* PCNT0_CH1CTRL */
#define PCNT0_CH1CTRL_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO22 \
ESP32_PINMUX(22, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO23 \
ESP32_PINMUX(23, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO25 \
ESP32_PINMUX(25, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
/* PCNT0_CH1SIG */
#define PCNT0_CH1SIG_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO22 \
ESP32_PINMUX(22, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO23 \
ESP32_PINMUX(23, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO25 \
ESP32_PINMUX(25, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
/* PCNT1_CH0CTRL */
#define PCNT1_CH0CTRL_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO22 \
ESP32_PINMUX(22, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO23 \
ESP32_PINMUX(23, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO25 \
ESP32_PINMUX(25, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
/* PCNT1_CH0SIG */
#define PCNT1_CH0SIG_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO22 \
ESP32_PINMUX(22, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO23 \
ESP32_PINMUX(23, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO25 \
ESP32_PINMUX(25, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
/* PCNT1_CH1CTRL */
#define PCNT1_CH1CTRL_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO22 \
ESP32_PINMUX(22, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO23 \
ESP32_PINMUX(23, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO25 \
ESP32_PINMUX(25, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
/* PCNT1_CH1SIG */
#define PCNT1_CH1SIG_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO22 \
ESP32_PINMUX(22, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO23 \
ESP32_PINMUX(23, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO25 \
ESP32_PINMUX(25, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
/* PCNT2_CH0CTRL */
#define PCNT2_CH0CTRL_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO22 \
ESP32_PINMUX(22, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO23 \
ESP32_PINMUX(23, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO25 \
ESP32_PINMUX(25, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
/* PCNT2_CH0SIG */
#define PCNT2_CH0SIG_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO22 \
ESP32_PINMUX(22, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO23 \
ESP32_PINMUX(23, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO25 \
ESP32_PINMUX(25, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
/* PCNT2_CH1CTRL */
#define PCNT2_CH1CTRL_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO22 \
ESP32_PINMUX(22, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO23 \
ESP32_PINMUX(23, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO25 \
ESP32_PINMUX(25, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
/* PCNT2_CH1SIG */
#define PCNT2_CH1SIG_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO22 \
ESP32_PINMUX(22, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO23 \
ESP32_PINMUX(23, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO25 \
ESP32_PINMUX(25, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
/* PCNT3_CH0CTRL */
#define PCNT3_CH0CTRL_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO22 \
ESP32_PINMUX(22, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO23 \
ESP32_PINMUX(23, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO25 \
ESP32_PINMUX(25, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
/* PCNT3_CH0SIG */
#define PCNT3_CH0SIG_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO22 \
ESP32_PINMUX(22, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO23 \
ESP32_PINMUX(23, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO25 \
ESP32_PINMUX(25, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
/* PCNT3_CH1CTRL */
#define PCNT3_CH1CTRL_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO22 \
ESP32_PINMUX(22, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO23 \
ESP32_PINMUX(23, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO25 \
ESP32_PINMUX(25, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
/* PCNT3_CH1SIG */
#define PCNT3_CH1SIG_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO22 \
ESP32_PINMUX(22, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO23 \
ESP32_PINMUX(23, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO25 \
ESP32_PINMUX(25, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
/* PCNT4_CH0CTRL */
#define PCNT4_CH0CTRL_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_CTRL_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0CTRL_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_CTRL_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0CTRL_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_CTRL_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0CTRL_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_CTRL_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0CTRL_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_CTRL_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0CTRL_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_CTRL_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0CTRL_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_CTRL_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0CTRL_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_CTRL_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0CTRL_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_CTRL_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0CTRL_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_CTRL_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0CTRL_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_CTRL_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0CTRL_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_CTRL_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0CTRL_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_CTRL_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0CTRL_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_CTRL_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0CTRL_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_CTRL_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0CTRL_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_CTRL_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0CTRL_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_CTRL_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0CTRL_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_CTRL_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0CTRL_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_CTRL_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0CTRL_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_CTRL_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0CTRL_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_CTRL_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0CTRL_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_CTRL_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0CTRL_GPIO22 \
ESP32_PINMUX(22, ESP_PCNT_CTRL_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0CTRL_GPIO23 \
ESP32_PINMUX(23, ESP_PCNT_CTRL_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0CTRL_GPIO25 \
ESP32_PINMUX(25, ESP_PCNT_CTRL_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0CTRL_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_CTRL_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0CTRL_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_CTRL_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0CTRL_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_CTRL_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0CTRL_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_CTRL_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0CTRL_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_CTRL_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0CTRL_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_CTRL_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0CTRL_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_CTRL_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0CTRL_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_CTRL_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0CTRL_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_CTRL_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0CTRL_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_CTRL_CH0_IN4, ESP_NOSIG)
/* PCNT4_CH0SIG */
#define PCNT4_CH0SIG_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_SIG_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0SIG_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_SIG_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0SIG_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_SIG_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0SIG_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_SIG_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0SIG_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_SIG_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0SIG_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_SIG_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0SIG_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_SIG_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0SIG_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_SIG_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0SIG_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_SIG_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0SIG_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_SIG_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0SIG_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_SIG_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0SIG_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_SIG_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0SIG_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_SIG_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0SIG_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_SIG_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0SIG_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_SIG_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0SIG_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_SIG_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0SIG_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_SIG_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0SIG_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_SIG_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0SIG_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_SIG_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0SIG_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_SIG_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0SIG_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_SIG_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0SIG_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_SIG_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0SIG_GPIO22 \
ESP32_PINMUX(22, ESP_PCNT_SIG_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0SIG_GPIO23 \
ESP32_PINMUX(23, ESP_PCNT_SIG_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0SIG_GPIO25 \
ESP32_PINMUX(25, ESP_PCNT_SIG_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0SIG_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_SIG_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0SIG_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_SIG_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0SIG_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_SIG_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0SIG_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_SIG_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0SIG_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_SIG_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0SIG_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_SIG_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0SIG_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_SIG_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0SIG_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_SIG_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0SIG_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_SIG_CH0_IN4, ESP_NOSIG)
#define PCNT4_CH0SIG_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_SIG_CH0_IN4, ESP_NOSIG)
/* PCNT4_CH1CTRL */
#define PCNT4_CH1CTRL_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_CTRL_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1CTRL_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_CTRL_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1CTRL_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_CTRL_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1CTRL_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_CTRL_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1CTRL_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_CTRL_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1CTRL_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_CTRL_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1CTRL_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_CTRL_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1CTRL_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_CTRL_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1CTRL_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_CTRL_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1CTRL_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_CTRL_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1CTRL_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_CTRL_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1CTRL_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_CTRL_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1CTRL_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_CTRL_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1CTRL_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_CTRL_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1CTRL_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_CTRL_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1CTRL_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_CTRL_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1CTRL_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_CTRL_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1CTRL_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_CTRL_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1CTRL_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_CTRL_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1CTRL_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_CTRL_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1CTRL_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_CTRL_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1CTRL_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_CTRL_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1CTRL_GPIO22 \
ESP32_PINMUX(22, ESP_PCNT_CTRL_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1CTRL_GPIO23 \
ESP32_PINMUX(23, ESP_PCNT_CTRL_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1CTRL_GPIO25 \
ESP32_PINMUX(25, ESP_PCNT_CTRL_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1CTRL_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_CTRL_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1CTRL_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_CTRL_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1CTRL_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_CTRL_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1CTRL_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_CTRL_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1CTRL_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_CTRL_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1CTRL_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_CTRL_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1CTRL_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_CTRL_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1CTRL_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_CTRL_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1CTRL_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_CTRL_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1CTRL_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_CTRL_CH1_IN4, ESP_NOSIG)
/* PCNT4_CH1SIG */
#define PCNT4_CH1SIG_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_SIG_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1SIG_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_SIG_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1SIG_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_SIG_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1SIG_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_SIG_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1SIG_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_SIG_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1SIG_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_SIG_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1SIG_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_SIG_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1SIG_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_SIG_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1SIG_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_SIG_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1SIG_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_SIG_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1SIG_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_SIG_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1SIG_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_SIG_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1SIG_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_SIG_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1SIG_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_SIG_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1SIG_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_SIG_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1SIG_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_SIG_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1SIG_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_SIG_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1SIG_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_SIG_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1SIG_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_SIG_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1SIG_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_SIG_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1SIG_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_SIG_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1SIG_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_SIG_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1SIG_GPIO22 \
ESP32_PINMUX(22, ESP_PCNT_SIG_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1SIG_GPIO23 \
ESP32_PINMUX(23, ESP_PCNT_SIG_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1SIG_GPIO25 \
ESP32_PINMUX(25, ESP_PCNT_SIG_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1SIG_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_SIG_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1SIG_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_SIG_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1SIG_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_SIG_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1SIG_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_SIG_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1SIG_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_SIG_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1SIG_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_SIG_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1SIG_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_SIG_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1SIG_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_SIG_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1SIG_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_SIG_CH1_IN4, ESP_NOSIG)
#define PCNT4_CH1SIG_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_SIG_CH1_IN4, ESP_NOSIG)
/* PCNT5_CH0CTRL */
#define PCNT5_CH0CTRL_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_CTRL_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0CTRL_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_CTRL_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0CTRL_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_CTRL_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0CTRL_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_CTRL_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0CTRL_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_CTRL_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0CTRL_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_CTRL_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0CTRL_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_CTRL_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0CTRL_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_CTRL_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0CTRL_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_CTRL_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0CTRL_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_CTRL_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0CTRL_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_CTRL_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0CTRL_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_CTRL_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0CTRL_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_CTRL_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0CTRL_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_CTRL_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0CTRL_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_CTRL_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0CTRL_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_CTRL_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0CTRL_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_CTRL_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0CTRL_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_CTRL_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0CTRL_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_CTRL_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0CTRL_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_CTRL_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0CTRL_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_CTRL_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0CTRL_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_CTRL_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0CTRL_GPIO22 \
ESP32_PINMUX(22, ESP_PCNT_CTRL_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0CTRL_GPIO23 \
ESP32_PINMUX(23, ESP_PCNT_CTRL_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0CTRL_GPIO25 \
ESP32_PINMUX(25, ESP_PCNT_CTRL_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0CTRL_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_CTRL_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0CTRL_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_CTRL_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0CTRL_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_CTRL_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0CTRL_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_CTRL_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0CTRL_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_CTRL_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0CTRL_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_CTRL_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0CTRL_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_CTRL_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0CTRL_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_CTRL_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0CTRL_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_CTRL_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0CTRL_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_CTRL_CH0_IN5, ESP_NOSIG)
/* PCNT5_CH0SIG */
#define PCNT5_CH0SIG_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_SIG_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0SIG_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_SIG_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0SIG_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_SIG_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0SIG_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_SIG_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0SIG_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_SIG_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0SIG_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_SIG_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0SIG_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_SIG_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0SIG_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_SIG_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0SIG_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_SIG_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0SIG_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_SIG_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0SIG_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_SIG_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0SIG_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_SIG_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0SIG_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_SIG_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0SIG_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_SIG_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0SIG_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_SIG_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0SIG_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_SIG_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0SIG_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_SIG_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0SIG_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_SIG_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0SIG_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_SIG_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0SIG_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_SIG_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0SIG_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_SIG_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0SIG_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_SIG_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0SIG_GPIO22 \
ESP32_PINMUX(22, ESP_PCNT_SIG_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0SIG_GPIO23 \
ESP32_PINMUX(23, ESP_PCNT_SIG_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0SIG_GPIO25 \
ESP32_PINMUX(25, ESP_PCNT_SIG_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0SIG_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_SIG_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0SIG_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_SIG_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0SIG_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_SIG_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0SIG_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_SIG_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0SIG_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_SIG_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0SIG_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_SIG_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0SIG_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_SIG_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0SIG_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_SIG_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0SIG_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_SIG_CH0_IN5, ESP_NOSIG)
#define PCNT5_CH0SIG_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_SIG_CH0_IN5, ESP_NOSIG)
/* PCNT5_CH1CTRL */
#define PCNT5_CH1CTRL_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_CTRL_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1CTRL_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_CTRL_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1CTRL_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_CTRL_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1CTRL_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_CTRL_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1CTRL_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_CTRL_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1CTRL_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_CTRL_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1CTRL_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_CTRL_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1CTRL_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_CTRL_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1CTRL_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_CTRL_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1CTRL_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_CTRL_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1CTRL_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_CTRL_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1CTRL_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_CTRL_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1CTRL_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_CTRL_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1CTRL_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_CTRL_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1CTRL_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_CTRL_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1CTRL_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_CTRL_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1CTRL_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_CTRL_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1CTRL_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_CTRL_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1CTRL_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_CTRL_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1CTRL_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_CTRL_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1CTRL_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_CTRL_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1CTRL_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_CTRL_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1CTRL_GPIO22 \
ESP32_PINMUX(22, ESP_PCNT_CTRL_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1CTRL_GPIO23 \
ESP32_PINMUX(23, ESP_PCNT_CTRL_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1CTRL_GPIO25 \
ESP32_PINMUX(25, ESP_PCNT_CTRL_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1CTRL_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_CTRL_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1CTRL_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_CTRL_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1CTRL_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_CTRL_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1CTRL_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_CTRL_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1CTRL_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_CTRL_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1CTRL_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_CTRL_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1CTRL_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_CTRL_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1CTRL_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_CTRL_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1CTRL_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_CTRL_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1CTRL_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_CTRL_CH1_IN5, ESP_NOSIG)
/* PCNT5_CH1SIG */
#define PCNT5_CH1SIG_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_SIG_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1SIG_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_SIG_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1SIG_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_SIG_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1SIG_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_SIG_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1SIG_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_SIG_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1SIG_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_SIG_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1SIG_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_SIG_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1SIG_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_SIG_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1SIG_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_SIG_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1SIG_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_SIG_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1SIG_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_SIG_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1SIG_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_SIG_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1SIG_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_SIG_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1SIG_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_SIG_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1SIG_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_SIG_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1SIG_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_SIG_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1SIG_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_SIG_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1SIG_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_SIG_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1SIG_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_SIG_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1SIG_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_SIG_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1SIG_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_SIG_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1SIG_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_SIG_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1SIG_GPIO22 \
ESP32_PINMUX(22, ESP_PCNT_SIG_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1SIG_GPIO23 \
ESP32_PINMUX(23, ESP_PCNT_SIG_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1SIG_GPIO25 \
ESP32_PINMUX(25, ESP_PCNT_SIG_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1SIG_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_SIG_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1SIG_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_SIG_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1SIG_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_SIG_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1SIG_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_SIG_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1SIG_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_SIG_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1SIG_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_SIG_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1SIG_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_SIG_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1SIG_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_SIG_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1SIG_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_SIG_CH1_IN5, ESP_NOSIG)
#define PCNT5_CH1SIG_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_SIG_CH1_IN5, ESP_NOSIG)
/* PCNT6_CH0CTRL */
#define PCNT6_CH0CTRL_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_CTRL_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0CTRL_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_CTRL_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0CTRL_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_CTRL_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0CTRL_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_CTRL_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0CTRL_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_CTRL_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0CTRL_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_CTRL_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0CTRL_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_CTRL_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0CTRL_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_CTRL_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0CTRL_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_CTRL_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0CTRL_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_CTRL_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0CTRL_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_CTRL_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0CTRL_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_CTRL_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0CTRL_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_CTRL_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0CTRL_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_CTRL_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0CTRL_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_CTRL_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0CTRL_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_CTRL_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0CTRL_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_CTRL_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0CTRL_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_CTRL_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0CTRL_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_CTRL_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0CTRL_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_CTRL_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0CTRL_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_CTRL_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0CTRL_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_CTRL_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0CTRL_GPIO22 \
ESP32_PINMUX(22, ESP_PCNT_CTRL_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0CTRL_GPIO23 \
ESP32_PINMUX(23, ESP_PCNT_CTRL_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0CTRL_GPIO25 \
ESP32_PINMUX(25, ESP_PCNT_CTRL_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0CTRL_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_CTRL_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0CTRL_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_CTRL_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0CTRL_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_CTRL_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0CTRL_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_CTRL_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0CTRL_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_CTRL_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0CTRL_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_CTRL_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0CTRL_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_CTRL_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0CTRL_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_CTRL_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0CTRL_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_CTRL_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0CTRL_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_CTRL_CH0_IN6, ESP_NOSIG)
/* PCNT6_CH0SIG */
#define PCNT6_CH0SIG_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_SIG_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0SIG_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_SIG_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0SIG_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_SIG_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0SIG_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_SIG_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0SIG_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_SIG_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0SIG_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_SIG_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0SIG_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_SIG_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0SIG_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_SIG_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0SIG_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_SIG_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0SIG_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_SIG_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0SIG_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_SIG_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0SIG_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_SIG_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0SIG_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_SIG_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0SIG_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_SIG_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0SIG_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_SIG_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0SIG_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_SIG_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0SIG_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_SIG_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0SIG_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_SIG_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0SIG_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_SIG_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0SIG_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_SIG_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0SIG_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_SIG_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0SIG_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_SIG_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0SIG_GPIO22 \
ESP32_PINMUX(22, ESP_PCNT_SIG_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0SIG_GPIO23 \
ESP32_PINMUX(23, ESP_PCNT_SIG_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0SIG_GPIO25 \
ESP32_PINMUX(25, ESP_PCNT_SIG_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0SIG_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_SIG_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0SIG_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_SIG_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0SIG_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_SIG_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0SIG_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_SIG_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0SIG_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_SIG_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0SIG_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_SIG_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0SIG_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_SIG_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0SIG_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_SIG_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0SIG_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_SIG_CH0_IN6, ESP_NOSIG)
#define PCNT6_CH0SIG_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_SIG_CH0_IN6, ESP_NOSIG)
/* PCNT6_CH1CTRL */
#define PCNT6_CH1CTRL_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_CTRL_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1CTRL_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_CTRL_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1CTRL_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_CTRL_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1CTRL_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_CTRL_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1CTRL_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_CTRL_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1CTRL_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_CTRL_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1CTRL_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_CTRL_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1CTRL_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_CTRL_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1CTRL_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_CTRL_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1CTRL_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_CTRL_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1CTRL_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_CTRL_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1CTRL_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_CTRL_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1CTRL_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_CTRL_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1CTRL_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_CTRL_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1CTRL_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_CTRL_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1CTRL_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_CTRL_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1CTRL_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_CTRL_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1CTRL_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_CTRL_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1CTRL_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_CTRL_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1CTRL_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_CTRL_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1CTRL_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_CTRL_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1CTRL_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_CTRL_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1CTRL_GPIO22 \
ESP32_PINMUX(22, ESP_PCNT_CTRL_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1CTRL_GPIO23 \
ESP32_PINMUX(23, ESP_PCNT_CTRL_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1CTRL_GPIO25 \
ESP32_PINMUX(25, ESP_PCNT_CTRL_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1CTRL_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_CTRL_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1CTRL_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_CTRL_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1CTRL_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_CTRL_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1CTRL_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_CTRL_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1CTRL_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_CTRL_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1CTRL_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_CTRL_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1CTRL_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_CTRL_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1CTRL_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_CTRL_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1CTRL_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_CTRL_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1CTRL_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_CTRL_CH1_IN6, ESP_NOSIG)
/* PCNT6_CH1SIG */
#define PCNT6_CH1SIG_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_SIG_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1SIG_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_SIG_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1SIG_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_SIG_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1SIG_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_SIG_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1SIG_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_SIG_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1SIG_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_SIG_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1SIG_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_SIG_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1SIG_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_SIG_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1SIG_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_SIG_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1SIG_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_SIG_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1SIG_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_SIG_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1SIG_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_SIG_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1SIG_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_SIG_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1SIG_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_SIG_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1SIG_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_SIG_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1SIG_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_SIG_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1SIG_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_SIG_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1SIG_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_SIG_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1SIG_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_SIG_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1SIG_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_SIG_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1SIG_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_SIG_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1SIG_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_SIG_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1SIG_GPIO22 \
ESP32_PINMUX(22, ESP_PCNT_SIG_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1SIG_GPIO23 \
ESP32_PINMUX(23, ESP_PCNT_SIG_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1SIG_GPIO25 \
ESP32_PINMUX(25, ESP_PCNT_SIG_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1SIG_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_SIG_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1SIG_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_SIG_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1SIG_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_SIG_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1SIG_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_SIG_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1SIG_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_SIG_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1SIG_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_SIG_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1SIG_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_SIG_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1SIG_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_SIG_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1SIG_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_SIG_CH1_IN6, ESP_NOSIG)
#define PCNT6_CH1SIG_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_SIG_CH1_IN6, ESP_NOSIG)
/* PCNT7_CH0CTRL */
#define PCNT7_CH0CTRL_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_CTRL_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0CTRL_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_CTRL_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0CTRL_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_CTRL_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0CTRL_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_CTRL_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0CTRL_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_CTRL_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0CTRL_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_CTRL_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0CTRL_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_CTRL_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0CTRL_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_CTRL_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0CTRL_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_CTRL_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0CTRL_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_CTRL_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0CTRL_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_CTRL_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0CTRL_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_CTRL_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0CTRL_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_CTRL_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0CTRL_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_CTRL_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0CTRL_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_CTRL_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0CTRL_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_CTRL_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0CTRL_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_CTRL_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0CTRL_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_CTRL_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0CTRL_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_CTRL_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0CTRL_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_CTRL_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0CTRL_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_CTRL_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0CTRL_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_CTRL_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0CTRL_GPIO22 \
ESP32_PINMUX(22, ESP_PCNT_CTRL_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0CTRL_GPIO23 \
ESP32_PINMUX(23, ESP_PCNT_CTRL_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0CTRL_GPIO25 \
ESP32_PINMUX(25, ESP_PCNT_CTRL_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0CTRL_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_CTRL_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0CTRL_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_CTRL_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0CTRL_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_CTRL_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0CTRL_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_CTRL_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0CTRL_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_CTRL_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0CTRL_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_CTRL_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0CTRL_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_CTRL_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0CTRL_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_CTRL_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0CTRL_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_CTRL_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0CTRL_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_CTRL_CH0_IN7, ESP_NOSIG)
/* PCNT7_CH0SIG */
#define PCNT7_CH0SIG_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_SIG_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0SIG_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_SIG_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0SIG_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_SIG_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0SIG_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_SIG_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0SIG_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_SIG_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0SIG_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_SIG_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0SIG_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_SIG_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0SIG_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_SIG_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0SIG_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_SIG_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0SIG_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_SIG_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0SIG_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_SIG_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0SIG_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_SIG_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0SIG_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_SIG_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0SIG_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_SIG_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0SIG_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_SIG_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0SIG_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_SIG_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0SIG_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_SIG_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0SIG_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_SIG_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0SIG_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_SIG_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0SIG_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_SIG_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0SIG_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_SIG_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0SIG_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_SIG_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0SIG_GPIO22 \
ESP32_PINMUX(22, ESP_PCNT_SIG_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0SIG_GPIO23 \
ESP32_PINMUX(23, ESP_PCNT_SIG_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0SIG_GPIO25 \
ESP32_PINMUX(25, ESP_PCNT_SIG_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0SIG_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_SIG_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0SIG_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_SIG_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0SIG_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_SIG_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0SIG_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_SIG_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0SIG_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_SIG_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0SIG_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_SIG_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0SIG_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_SIG_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0SIG_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_SIG_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0SIG_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_SIG_CH0_IN7, ESP_NOSIG)
#define PCNT7_CH0SIG_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_SIG_CH0_IN7, ESP_NOSIG)
/* PCNT7_CH1CTRL */
#define PCNT7_CH1CTRL_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_CTRL_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1CTRL_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_CTRL_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1CTRL_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_CTRL_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1CTRL_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_CTRL_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1CTRL_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_CTRL_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1CTRL_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_CTRL_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1CTRL_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_CTRL_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1CTRL_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_CTRL_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1CTRL_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_CTRL_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1CTRL_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_CTRL_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1CTRL_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_CTRL_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1CTRL_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_CTRL_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1CTRL_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_CTRL_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1CTRL_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_CTRL_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1CTRL_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_CTRL_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1CTRL_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_CTRL_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1CTRL_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_CTRL_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1CTRL_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_CTRL_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1CTRL_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_CTRL_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1CTRL_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_CTRL_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1CTRL_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_CTRL_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1CTRL_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_CTRL_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1CTRL_GPIO22 \
ESP32_PINMUX(22, ESP_PCNT_CTRL_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1CTRL_GPIO23 \
ESP32_PINMUX(23, ESP_PCNT_CTRL_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1CTRL_GPIO25 \
ESP32_PINMUX(25, ESP_PCNT_CTRL_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1CTRL_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_CTRL_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1CTRL_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_CTRL_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1CTRL_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_CTRL_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1CTRL_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_CTRL_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1CTRL_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_CTRL_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1CTRL_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_CTRL_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1CTRL_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_CTRL_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1CTRL_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_CTRL_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1CTRL_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_CTRL_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1CTRL_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_CTRL_CH1_IN7, ESP_NOSIG)
/* PCNT7_CH1SIG */
#define PCNT7_CH1SIG_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_SIG_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1SIG_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_SIG_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1SIG_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_SIG_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1SIG_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_SIG_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1SIG_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_SIG_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1SIG_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_SIG_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1SIG_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_SIG_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1SIG_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_SIG_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1SIG_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_SIG_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1SIG_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_SIG_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1SIG_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_SIG_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1SIG_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_SIG_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1SIG_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_SIG_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1SIG_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_SIG_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1SIG_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_SIG_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1SIG_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_SIG_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1SIG_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_SIG_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1SIG_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_SIG_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1SIG_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_SIG_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1SIG_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_SIG_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1SIG_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_SIG_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1SIG_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_SIG_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1SIG_GPIO22 \
ESP32_PINMUX(22, ESP_PCNT_SIG_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1SIG_GPIO23 \
ESP32_PINMUX(23, ESP_PCNT_SIG_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1SIG_GPIO25 \
ESP32_PINMUX(25, ESP_PCNT_SIG_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1SIG_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_SIG_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1SIG_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_SIG_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1SIG_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_SIG_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1SIG_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_SIG_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1SIG_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_SIG_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1SIG_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_SIG_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1SIG_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_SIG_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1SIG_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_SIG_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1SIG_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_SIG_CH1_IN7, ESP_NOSIG)
#define PCNT7_CH1SIG_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_SIG_CH1_IN7, ESP_NOSIG)
/* SDHC0_CD */
#define SDHC0_CD_GPIO5 \
ESP32_PINMUX(5, ESP_HOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC0_CD_GPIO6 \
ESP32_PINMUX(6, ESP_HOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC0_CD_GPIO7 \
ESP32_PINMUX(7, ESP_HOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC0_CD_GPIO8 \
ESP32_PINMUX(8, ESP_HOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC0_CD_GPIO9 \
ESP32_PINMUX(9, ESP_HOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC0_CD_GPIO10 \
ESP32_PINMUX(10, ESP_HOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC0_CD_GPIO11 \
ESP32_PINMUX(11, ESP_HOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC0_CD_GPIO16 \
ESP32_PINMUX(16, ESP_HOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC0_CD_GPIO17 \
ESP32_PINMUX(17, ESP_HOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC0_CD_GPIO18 \
ESP32_PINMUX(18, ESP_HOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC0_CD_GPIO19 \
ESP32_PINMUX(19, ESP_HOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC0_CD_GPIO20 \
ESP32_PINMUX(20, ESP_HOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC0_CD_GPIO21 \
ESP32_PINMUX(21, ESP_HOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC0_CD_GPIO22 \
ESP32_PINMUX(22, ESP_HOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC0_CD_GPIO23 \
ESP32_PINMUX(23, ESP_HOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC0_CD_GPIO25 \
ESP32_PINMUX(25, ESP_HOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC0_CD_GPIO26 \
ESP32_PINMUX(26, ESP_HOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC0_CD_GPIO27 \
ESP32_PINMUX(27, ESP_HOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC0_CD_GPIO32 \
ESP32_PINMUX(32, ESP_HOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC0_CD_GPIO33 \
ESP32_PINMUX(33, ESP_HOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC0_CD_GPIO34 \
ESP32_PINMUX(34, ESP_HOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC0_CD_GPIO35 \
ESP32_PINMUX(35, ESP_HOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC0_CD_GPIO36 \
ESP32_PINMUX(36, ESP_HOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC0_CD_GPIO37 \
ESP32_PINMUX(37, ESP_HOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC0_CD_GPIO38 \
ESP32_PINMUX(38, ESP_HOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC0_CD_GPIO39 \
ESP32_PINMUX(39, ESP_HOST_CARD_DETECT_N_2, ESP_NOSIG)
/* SDHC0_WP */
#define SDHC0_WP_GPIO5 \
ESP32_PINMUX(5, ESP_HOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC0_WP_GPIO6 \
ESP32_PINMUX(6, ESP_HOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC0_WP_GPIO7 \
ESP32_PINMUX(7, ESP_HOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC0_WP_GPIO8 \
ESP32_PINMUX(8, ESP_HOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC0_WP_GPIO9 \
ESP32_PINMUX(9, ESP_HOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC0_WP_GPIO10 \
ESP32_PINMUX(10, ESP_HOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC0_WP_GPIO11 \
ESP32_PINMUX(11, ESP_HOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC0_WP_GPIO16 \
ESP32_PINMUX(16, ESP_HOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC0_WP_GPIO17 \
ESP32_PINMUX(17, ESP_HOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC0_WP_GPIO18 \
ESP32_PINMUX(18, ESP_HOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC0_WP_GPIO19 \
ESP32_PINMUX(19, ESP_HOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC0_WP_GPIO20 \
ESP32_PINMUX(20, ESP_HOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC0_WP_GPIO21 \
ESP32_PINMUX(21, ESP_HOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC0_WP_GPIO22 \
ESP32_PINMUX(22, ESP_HOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC0_WP_GPIO23 \
ESP32_PINMUX(23, ESP_HOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC0_WP_GPIO25 \
ESP32_PINMUX(25, ESP_HOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC0_WP_GPIO26 \
ESP32_PINMUX(26, ESP_HOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC0_WP_GPIO27 \
ESP32_PINMUX(27, ESP_HOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC0_WP_GPIO32 \
ESP32_PINMUX(32, ESP_HOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC0_WP_GPIO33 \
ESP32_PINMUX(33, ESP_HOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC0_WP_GPIO34 \
ESP32_PINMUX(34, ESP_HOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC0_WP_GPIO35 \
ESP32_PINMUX(35, ESP_HOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC0_WP_GPIO36 \
ESP32_PINMUX(36, ESP_HOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC0_WP_GPIO37 \
ESP32_PINMUX(37, ESP_HOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC0_WP_GPIO38 \
ESP32_PINMUX(38, ESP_HOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC0_WP_GPIO39 \
ESP32_PINMUX(39, ESP_HOST_CARD_WRITE_PRT_2, ESP_NOSIG)
/* SMI_MDC */
#define SMI_MDC_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_EMAC_MDC_O)
#define SMI_MDC_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_EMAC_MDC_O)
#define SMI_MDC_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_EMAC_MDC_O)
#define SMI_MDC_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_EMAC_MDC_O)
#define SMI_MDC_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_EMAC_MDC_O)
#define SMI_MDC_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_EMAC_MDC_O)
#define SMI_MDC_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_EMAC_MDC_O)
#define SMI_MDC_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_EMAC_MDC_O)
#define SMI_MDC_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_EMAC_MDC_O)
#define SMI_MDC_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_EMAC_MDC_O)
#define SMI_MDC_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_EMAC_MDC_O)
#define SMI_MDC_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_EMAC_MDC_O)
#define SMI_MDC_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_EMAC_MDC_O)
#define SMI_MDC_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_EMAC_MDC_O)
#define SMI_MDC_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_EMAC_MDC_O)
#define SMI_MDC_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_EMAC_MDC_O)
#define SMI_MDC_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_EMAC_MDC_O)
#define SMI_MDC_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_EMAC_MDC_O)
#define SMI_MDC_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_EMAC_MDC_O)
#define SMI_MDC_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_EMAC_MDC_O)
#define SMI_MDC_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_EMAC_MDC_O)
#define SMI_MDC_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_EMAC_MDC_O)
#define SMI_MDC_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_EMAC_MDC_O)
#define SMI_MDC_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_EMAC_MDC_O)
#define SMI_MDC_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_EMAC_MDC_O)
#define SMI_MDC_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_EMAC_MDC_O)
#define SMI_MDC_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_EMAC_MDC_O)
#define SMI_MDC_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_EMAC_MDC_O)
#define SMI_MDC_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_EMAC_MDC_O)
/* SMI_MDIO */
#define SMI_MDIO_GPIO0 \
ESP32_PINMUX(0, ESP_EMAC_MDI_I, ESP_EMAC_MDO_O)
#define SMI_MDIO_GPIO1 \
ESP32_PINMUX(1, ESP_EMAC_MDI_I, ESP_EMAC_MDO_O)
#define SMI_MDIO_GPIO2 \
ESP32_PINMUX(2, ESP_EMAC_MDI_I, ESP_EMAC_MDO_O)
#define SMI_MDIO_GPIO3 \
ESP32_PINMUX(3, ESP_EMAC_MDI_I, ESP_EMAC_MDO_O)
#define SMI_MDIO_GPIO4 \
ESP32_PINMUX(4, ESP_EMAC_MDI_I, ESP_EMAC_MDO_O)
#define SMI_MDIO_GPIO5 \
ESP32_PINMUX(5, ESP_EMAC_MDI_I, ESP_EMAC_MDO_O)
#define SMI_MDIO_GPIO6 \
ESP32_PINMUX(6, ESP_EMAC_MDI_I, ESP_EMAC_MDO_O)
#define SMI_MDIO_GPIO7 \
ESP32_PINMUX(7, ESP_EMAC_MDI_I, ESP_EMAC_MDO_O)
#define SMI_MDIO_GPIO8 \
ESP32_PINMUX(8, ESP_EMAC_MDI_I, ESP_EMAC_MDO_O)
#define SMI_MDIO_GPIO9 \
ESP32_PINMUX(9, ESP_EMAC_MDI_I, ESP_EMAC_MDO_O)
#define SMI_MDIO_GPIO10 \
ESP32_PINMUX(10, ESP_EMAC_MDI_I, ESP_EMAC_MDO_O)
#define SMI_MDIO_GPIO11 \
ESP32_PINMUX(11, ESP_EMAC_MDI_I, ESP_EMAC_MDO_O)
#define SMI_MDIO_GPIO12 \
ESP32_PINMUX(12, ESP_EMAC_MDI_I, ESP_EMAC_MDO_O)
#define SMI_MDIO_GPIO13 \
ESP32_PINMUX(13, ESP_EMAC_MDI_I, ESP_EMAC_MDO_O)
#define SMI_MDIO_GPIO14 \
ESP32_PINMUX(14, ESP_EMAC_MDI_I, ESP_EMAC_MDO_O)
#define SMI_MDIO_GPIO15 \
ESP32_PINMUX(15, ESP_EMAC_MDI_I, ESP_EMAC_MDO_O)
#define SMI_MDIO_GPIO16 \
ESP32_PINMUX(16, ESP_EMAC_MDI_I, ESP_EMAC_MDO_O)
#define SMI_MDIO_GPIO17 \
ESP32_PINMUX(17, ESP_EMAC_MDI_I, ESP_EMAC_MDO_O)
#define SMI_MDIO_GPIO18 \
ESP32_PINMUX(18, ESP_EMAC_MDI_I, ESP_EMAC_MDO_O)
#define SMI_MDIO_GPIO19 \
ESP32_PINMUX(19, ESP_EMAC_MDI_I, ESP_EMAC_MDO_O)
#define SMI_MDIO_GPIO20 \
ESP32_PINMUX(20, ESP_EMAC_MDI_I, ESP_EMAC_MDO_O)
#define SMI_MDIO_GPIO21 \
ESP32_PINMUX(21, ESP_EMAC_MDI_I, ESP_EMAC_MDO_O)
#define SMI_MDIO_GPIO22 \
ESP32_PINMUX(22, ESP_EMAC_MDI_I, ESP_EMAC_MDO_O)
#define SMI_MDIO_GPIO23 \
ESP32_PINMUX(23, ESP_EMAC_MDI_I, ESP_EMAC_MDO_O)
#define SMI_MDIO_GPIO25 \
ESP32_PINMUX(25, ESP_EMAC_MDI_I, ESP_EMAC_MDO_O)
#define SMI_MDIO_GPIO26 \
ESP32_PINMUX(26, ESP_EMAC_MDI_I, ESP_EMAC_MDO_O)
#define SMI_MDIO_GPIO27 \
ESP32_PINMUX(27, ESP_EMAC_MDI_I, ESP_EMAC_MDO_O)
#define SMI_MDIO_GPIO32 \
ESP32_PINMUX(32, ESP_EMAC_MDI_I, ESP_EMAC_MDO_O)
#define SMI_MDIO_GPIO33 \
ESP32_PINMUX(33, ESP_EMAC_MDI_I, ESP_EMAC_MDO_O)
/* SPIM2_CSEL */
#define SPIM2_CSEL_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_HSPICS0_OUT)
#define SPIM2_CSEL_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_HSPICS0_OUT)
#define SPIM2_CSEL_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_HSPICS0_OUT)
#define SPIM2_CSEL_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_HSPICS0_OUT)
#define SPIM2_CSEL_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_HSPICS0_OUT)
#define SPIM2_CSEL_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_HSPICS0_OUT)
#define SPIM2_CSEL_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_HSPICS0_OUT)
#define SPIM2_CSEL_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_HSPICS0_OUT)
#define SPIM2_CSEL_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_HSPICS0_OUT)
#define SPIM2_CSEL_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_HSPICS0_OUT)
#define SPIM2_CSEL_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_HSPICS0_OUT)
#define SPIM2_CSEL_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_HSPICS0_OUT)
#define SPIM2_CSEL_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_HSPICS0_OUT)
#define SPIM2_CSEL_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_HSPICS0_OUT)
#define SPIM2_CSEL_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_HSPICS0_OUT)
#define SPIM2_CSEL_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_HSPICS0_OUT)
#define SPIM2_CSEL_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_HSPICS0_OUT)
#define SPIM2_CSEL_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_HSPICS0_OUT)
#define SPIM2_CSEL_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_HSPICS0_OUT)
#define SPIM2_CSEL_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_HSPICS0_OUT)
#define SPIM2_CSEL_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_HSPICS0_OUT)
#define SPIM2_CSEL_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_HSPICS0_OUT)
#define SPIM2_CSEL_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_HSPICS0_OUT)
#define SPIM2_CSEL_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_HSPICS0_OUT)
#define SPIM2_CSEL_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_HSPICS0_OUT)
#define SPIM2_CSEL_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_HSPICS0_OUT)
#define SPIM2_CSEL_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_HSPICS0_OUT)
#define SPIM2_CSEL_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_HSPICS0_OUT)
#define SPIM2_CSEL_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_HSPICS0_OUT)
/* SPIM2_CSEL1 */
#define SPIM2_CSEL1_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_HSPICS1_OUT)
#define SPIM2_CSEL1_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_HSPICS1_OUT)
#define SPIM2_CSEL1_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_HSPICS1_OUT)
#define SPIM2_CSEL1_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_HSPICS1_OUT)
#define SPIM2_CSEL1_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_HSPICS1_OUT)
#define SPIM2_CSEL1_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_HSPICS1_OUT)
#define SPIM2_CSEL1_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_HSPICS1_OUT)
#define SPIM2_CSEL1_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_HSPICS1_OUT)
#define SPIM2_CSEL1_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_HSPICS1_OUT)
#define SPIM2_CSEL1_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_HSPICS1_OUT)
#define SPIM2_CSEL1_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_HSPICS1_OUT)
#define SPIM2_CSEL1_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_HSPICS1_OUT)
#define SPIM2_CSEL1_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_HSPICS1_OUT)
#define SPIM2_CSEL1_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_HSPICS1_OUT)
#define SPIM2_CSEL1_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_HSPICS1_OUT)
#define SPIM2_CSEL1_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_HSPICS1_OUT)
#define SPIM2_CSEL1_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_HSPICS1_OUT)
#define SPIM2_CSEL1_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_HSPICS1_OUT)
#define SPIM2_CSEL1_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_HSPICS1_OUT)
#define SPIM2_CSEL1_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_HSPICS1_OUT)
#define SPIM2_CSEL1_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_HSPICS1_OUT)
#define SPIM2_CSEL1_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_HSPICS1_OUT)
#define SPIM2_CSEL1_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_HSPICS1_OUT)
#define SPIM2_CSEL1_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_HSPICS1_OUT)
#define SPIM2_CSEL1_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_HSPICS1_OUT)
#define SPIM2_CSEL1_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_HSPICS1_OUT)
#define SPIM2_CSEL1_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_HSPICS1_OUT)
#define SPIM2_CSEL1_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_HSPICS1_OUT)
#define SPIM2_CSEL1_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_HSPICS1_OUT)
/* SPIM2_CSEL2 */
#define SPIM2_CSEL2_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_HSPICS2_OUT)
#define SPIM2_CSEL2_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_HSPICS2_OUT)
#define SPIM2_CSEL2_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_HSPICS2_OUT)
#define SPIM2_CSEL2_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_HSPICS2_OUT)
#define SPIM2_CSEL2_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_HSPICS2_OUT)
#define SPIM2_CSEL2_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_HSPICS2_OUT)
#define SPIM2_CSEL2_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_HSPICS2_OUT)
#define SPIM2_CSEL2_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_HSPICS2_OUT)
#define SPIM2_CSEL2_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_HSPICS2_OUT)
#define SPIM2_CSEL2_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_HSPICS2_OUT)
#define SPIM2_CSEL2_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_HSPICS2_OUT)
#define SPIM2_CSEL2_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_HSPICS2_OUT)
#define SPIM2_CSEL2_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_HSPICS2_OUT)
#define SPIM2_CSEL2_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_HSPICS2_OUT)
#define SPIM2_CSEL2_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_HSPICS2_OUT)
#define SPIM2_CSEL2_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_HSPICS2_OUT)
#define SPIM2_CSEL2_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_HSPICS2_OUT)
#define SPIM2_CSEL2_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_HSPICS2_OUT)
#define SPIM2_CSEL2_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_HSPICS2_OUT)
#define SPIM2_CSEL2_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_HSPICS2_OUT)
#define SPIM2_CSEL2_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_HSPICS2_OUT)
#define SPIM2_CSEL2_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_HSPICS2_OUT)
#define SPIM2_CSEL2_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_HSPICS2_OUT)
#define SPIM2_CSEL2_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_HSPICS2_OUT)
#define SPIM2_CSEL2_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_HSPICS2_OUT)
#define SPIM2_CSEL2_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_HSPICS2_OUT)
#define SPIM2_CSEL2_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_HSPICS2_OUT)
#define SPIM2_CSEL2_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_HSPICS2_OUT)
#define SPIM2_CSEL2_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_HSPICS2_OUT)
/* SPIM2_MISO */
#define SPIM2_MISO_GPIO0 \
ESP32_PINMUX(0, ESP_HSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO1 \
ESP32_PINMUX(1, ESP_HSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO2 \
ESP32_PINMUX(2, ESP_HSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO3 \
ESP32_PINMUX(3, ESP_HSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO4 \
ESP32_PINMUX(4, ESP_HSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO5 \
ESP32_PINMUX(5, ESP_HSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO6 \
ESP32_PINMUX(6, ESP_HSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO7 \
ESP32_PINMUX(7, ESP_HSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO8 \
ESP32_PINMUX(8, ESP_HSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO9 \
ESP32_PINMUX(9, ESP_HSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO10 \
ESP32_PINMUX(10, ESP_HSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO11 \
ESP32_PINMUX(11, ESP_HSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO12 \
ESP32_PINMUX(12, ESP_HSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO13 \
ESP32_PINMUX(13, ESP_HSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO14 \
ESP32_PINMUX(14, ESP_HSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO15 \
ESP32_PINMUX(15, ESP_HSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO16 \
ESP32_PINMUX(16, ESP_HSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO17 \
ESP32_PINMUX(17, ESP_HSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO18 \
ESP32_PINMUX(18, ESP_HSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO19 \
ESP32_PINMUX(19, ESP_HSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO20 \
ESP32_PINMUX(20, ESP_HSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO21 \
ESP32_PINMUX(21, ESP_HSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO22 \
ESP32_PINMUX(22, ESP_HSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO23 \
ESP32_PINMUX(23, ESP_HSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO25 \
ESP32_PINMUX(25, ESP_HSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO26 \
ESP32_PINMUX(26, ESP_HSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO27 \
ESP32_PINMUX(27, ESP_HSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO32 \
ESP32_PINMUX(32, ESP_HSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO33 \
ESP32_PINMUX(33, ESP_HSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO34 \
ESP32_PINMUX(34, ESP_HSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO35 \
ESP32_PINMUX(35, ESP_HSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO36 \
ESP32_PINMUX(36, ESP_HSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO37 \
ESP32_PINMUX(37, ESP_HSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO38 \
ESP32_PINMUX(38, ESP_HSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO39 \
ESP32_PINMUX(39, ESP_HSPIQ_IN, ESP_NOSIG)
/* SPIM2_MOSI */
#define SPIM2_MOSI_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_HSPID_OUT)
#define SPIM2_MOSI_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_HSPID_OUT)
#define SPIM2_MOSI_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_HSPID_OUT)
#define SPIM2_MOSI_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_HSPID_OUT)
#define SPIM2_MOSI_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_HSPID_OUT)
#define SPIM2_MOSI_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_HSPID_OUT)
#define SPIM2_MOSI_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_HSPID_OUT)
#define SPIM2_MOSI_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_HSPID_OUT)
#define SPIM2_MOSI_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_HSPID_OUT)
#define SPIM2_MOSI_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_HSPID_OUT)
#define SPIM2_MOSI_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_HSPID_OUT)
#define SPIM2_MOSI_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_HSPID_OUT)
#define SPIM2_MOSI_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_HSPID_OUT)
#define SPIM2_MOSI_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_HSPID_OUT)
#define SPIM2_MOSI_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_HSPID_OUT)
#define SPIM2_MOSI_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_HSPID_OUT)
#define SPIM2_MOSI_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_HSPID_OUT)
#define SPIM2_MOSI_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_HSPID_OUT)
#define SPIM2_MOSI_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_HSPID_OUT)
#define SPIM2_MOSI_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_HSPID_OUT)
#define SPIM2_MOSI_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_HSPID_OUT)
#define SPIM2_MOSI_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_HSPID_OUT)
#define SPIM2_MOSI_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_HSPID_OUT)
#define SPIM2_MOSI_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_HSPID_OUT)
#define SPIM2_MOSI_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_HSPID_OUT)
#define SPIM2_MOSI_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_HSPID_OUT)
#define SPIM2_MOSI_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_HSPID_OUT)
#define SPIM2_MOSI_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_HSPID_OUT)
#define SPIM2_MOSI_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_HSPID_OUT)
/* SPIM2_SCLK */
#define SPIM2_SCLK_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_HSPICLK_OUT)
#define SPIM2_SCLK_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_HSPICLK_OUT)
#define SPIM2_SCLK_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_HSPICLK_OUT)
#define SPIM2_SCLK_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_HSPICLK_OUT)
#define SPIM2_SCLK_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_HSPICLK_OUT)
#define SPIM2_SCLK_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_HSPICLK_OUT)
#define SPIM2_SCLK_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_HSPICLK_OUT)
#define SPIM2_SCLK_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_HSPICLK_OUT)
#define SPIM2_SCLK_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_HSPICLK_OUT)
#define SPIM2_SCLK_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_HSPICLK_OUT)
#define SPIM2_SCLK_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_HSPICLK_OUT)
#define SPIM2_SCLK_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_HSPICLK_OUT)
#define SPIM2_SCLK_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_HSPICLK_OUT)
#define SPIM2_SCLK_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_HSPICLK_OUT)
#define SPIM2_SCLK_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_HSPICLK_OUT)
#define SPIM2_SCLK_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_HSPICLK_OUT)
#define SPIM2_SCLK_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_HSPICLK_OUT)
#define SPIM2_SCLK_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_HSPICLK_OUT)
#define SPIM2_SCLK_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_HSPICLK_OUT)
#define SPIM2_SCLK_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_HSPICLK_OUT)
#define SPIM2_SCLK_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_HSPICLK_OUT)
#define SPIM2_SCLK_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_HSPICLK_OUT)
#define SPIM2_SCLK_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_HSPICLK_OUT)
#define SPIM2_SCLK_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_HSPICLK_OUT)
#define SPIM2_SCLK_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_HSPICLK_OUT)
#define SPIM2_SCLK_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_HSPICLK_OUT)
#define SPIM2_SCLK_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_HSPICLK_OUT)
#define SPIM2_SCLK_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_HSPICLK_OUT)
#define SPIM2_SCLK_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_HSPICLK_OUT)
/* SPIM3_CSEL */
#define SPIM3_CSEL_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_VSPICS0_OUT)
#define SPIM3_CSEL_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_VSPICS0_OUT)
#define SPIM3_CSEL_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_VSPICS0_OUT)
#define SPIM3_CSEL_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_VSPICS0_OUT)
#define SPIM3_CSEL_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_VSPICS0_OUT)
#define SPIM3_CSEL_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_VSPICS0_OUT)
#define SPIM3_CSEL_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_VSPICS0_OUT)
#define SPIM3_CSEL_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_VSPICS0_OUT)
#define SPIM3_CSEL_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_VSPICS0_OUT)
#define SPIM3_CSEL_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_VSPICS0_OUT)
#define SPIM3_CSEL_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_VSPICS0_OUT)
#define SPIM3_CSEL_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_VSPICS0_OUT)
#define SPIM3_CSEL_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_VSPICS0_OUT)
#define SPIM3_CSEL_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_VSPICS0_OUT)
#define SPIM3_CSEL_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_VSPICS0_OUT)
#define SPIM3_CSEL_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_VSPICS0_OUT)
#define SPIM3_CSEL_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_VSPICS0_OUT)
#define SPIM3_CSEL_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_VSPICS0_OUT)
#define SPIM3_CSEL_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_VSPICS0_OUT)
#define SPIM3_CSEL_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_VSPICS0_OUT)
#define SPIM3_CSEL_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_VSPICS0_OUT)
#define SPIM3_CSEL_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_VSPICS0_OUT)
#define SPIM3_CSEL_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_VSPICS0_OUT)
#define SPIM3_CSEL_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_VSPICS0_OUT)
#define SPIM3_CSEL_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_VSPICS0_OUT)
#define SPIM3_CSEL_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_VSPICS0_OUT)
#define SPIM3_CSEL_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_VSPICS0_OUT)
#define SPIM3_CSEL_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_VSPICS0_OUT)
#define SPIM3_CSEL_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_VSPICS0_OUT)
/* SPIM3_CSEL1 */
#define SPIM3_CSEL1_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_VSPICS1_OUT)
#define SPIM3_CSEL1_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_VSPICS1_OUT)
#define SPIM3_CSEL1_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_VSPICS1_OUT)
#define SPIM3_CSEL1_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_VSPICS1_OUT)
#define SPIM3_CSEL1_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_VSPICS1_OUT)
#define SPIM3_CSEL1_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_VSPICS1_OUT)
#define SPIM3_CSEL1_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_VSPICS1_OUT)
#define SPIM3_CSEL1_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_VSPICS1_OUT)
#define SPIM3_CSEL1_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_VSPICS1_OUT)
#define SPIM3_CSEL1_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_VSPICS1_OUT)
#define SPIM3_CSEL1_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_VSPICS1_OUT)
#define SPIM3_CSEL1_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_VSPICS1_OUT)
#define SPIM3_CSEL1_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_VSPICS1_OUT)
#define SPIM3_CSEL1_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_VSPICS1_OUT)
#define SPIM3_CSEL1_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_VSPICS1_OUT)
#define SPIM3_CSEL1_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_VSPICS1_OUT)
#define SPIM3_CSEL1_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_VSPICS1_OUT)
#define SPIM3_CSEL1_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_VSPICS1_OUT)
#define SPIM3_CSEL1_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_VSPICS1_OUT)
#define SPIM3_CSEL1_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_VSPICS1_OUT)
#define SPIM3_CSEL1_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_VSPICS1_OUT)
#define SPIM3_CSEL1_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_VSPICS1_OUT)
#define SPIM3_CSEL1_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_VSPICS1_OUT)
#define SPIM3_CSEL1_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_VSPICS1_OUT)
#define SPIM3_CSEL1_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_VSPICS1_OUT)
#define SPIM3_CSEL1_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_VSPICS1_OUT)
#define SPIM3_CSEL1_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_VSPICS1_OUT)
#define SPIM3_CSEL1_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_VSPICS1_OUT)
#define SPIM3_CSEL1_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_VSPICS1_OUT)
/* SPIM3_CSEL2 */
#define SPIM3_CSEL2_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_VSPICS2_OUT)
#define SPIM3_CSEL2_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_VSPICS2_OUT)
#define SPIM3_CSEL2_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_VSPICS2_OUT)
#define SPIM3_CSEL2_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_VSPICS2_OUT)
#define SPIM3_CSEL2_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_VSPICS2_OUT)
#define SPIM3_CSEL2_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_VSPICS2_OUT)
#define SPIM3_CSEL2_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_VSPICS2_OUT)
#define SPIM3_CSEL2_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_VSPICS2_OUT)
#define SPIM3_CSEL2_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_VSPICS2_OUT)
#define SPIM3_CSEL2_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_VSPICS2_OUT)
#define SPIM3_CSEL2_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_VSPICS2_OUT)
#define SPIM3_CSEL2_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_VSPICS2_OUT)
#define SPIM3_CSEL2_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_VSPICS2_OUT)
#define SPIM3_CSEL2_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_VSPICS2_OUT)
#define SPIM3_CSEL2_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_VSPICS2_OUT)
#define SPIM3_CSEL2_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_VSPICS2_OUT)
#define SPIM3_CSEL2_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_VSPICS2_OUT)
#define SPIM3_CSEL2_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_VSPICS2_OUT)
#define SPIM3_CSEL2_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_VSPICS2_OUT)
#define SPIM3_CSEL2_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_VSPICS2_OUT)
#define SPIM3_CSEL2_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_VSPICS2_OUT)
#define SPIM3_CSEL2_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_VSPICS2_OUT)
#define SPIM3_CSEL2_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_VSPICS2_OUT)
#define SPIM3_CSEL2_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_VSPICS2_OUT)
#define SPIM3_CSEL2_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_VSPICS2_OUT)
#define SPIM3_CSEL2_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_VSPICS2_OUT)
#define SPIM3_CSEL2_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_VSPICS2_OUT)
#define SPIM3_CSEL2_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_VSPICS2_OUT)
#define SPIM3_CSEL2_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_VSPICS2_OUT)
/* SPIM3_MISO */
#define SPIM3_MISO_GPIO0 \
ESP32_PINMUX(0, ESP_VSPIQ_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO1 \
ESP32_PINMUX(1, ESP_VSPIQ_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO2 \
ESP32_PINMUX(2, ESP_VSPIQ_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO3 \
ESP32_PINMUX(3, ESP_VSPIQ_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO4 \
ESP32_PINMUX(4, ESP_VSPIQ_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO5 \
ESP32_PINMUX(5, ESP_VSPIQ_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO6 \
ESP32_PINMUX(6, ESP_VSPIQ_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO7 \
ESP32_PINMUX(7, ESP_VSPIQ_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO8 \
ESP32_PINMUX(8, ESP_VSPIQ_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO9 \
ESP32_PINMUX(9, ESP_VSPIQ_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO10 \
ESP32_PINMUX(10, ESP_VSPIQ_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO11 \
ESP32_PINMUX(11, ESP_VSPIQ_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO12 \
ESP32_PINMUX(12, ESP_VSPIQ_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO13 \
ESP32_PINMUX(13, ESP_VSPIQ_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO14 \
ESP32_PINMUX(14, ESP_VSPIQ_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO15 \
ESP32_PINMUX(15, ESP_VSPIQ_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO16 \
ESP32_PINMUX(16, ESP_VSPIQ_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO17 \
ESP32_PINMUX(17, ESP_VSPIQ_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO18 \
ESP32_PINMUX(18, ESP_VSPIQ_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO19 \
ESP32_PINMUX(19, ESP_VSPIQ_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO20 \
ESP32_PINMUX(20, ESP_VSPIQ_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO21 \
ESP32_PINMUX(21, ESP_VSPIQ_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO22 \
ESP32_PINMUX(22, ESP_VSPIQ_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO23 \
ESP32_PINMUX(23, ESP_VSPIQ_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO25 \
ESP32_PINMUX(25, ESP_VSPIQ_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO26 \
ESP32_PINMUX(26, ESP_VSPIQ_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO27 \
ESP32_PINMUX(27, ESP_VSPIQ_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO32 \
ESP32_PINMUX(32, ESP_VSPIQ_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO33 \
ESP32_PINMUX(33, ESP_VSPIQ_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO34 \
ESP32_PINMUX(34, ESP_VSPIQ_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO35 \
ESP32_PINMUX(35, ESP_VSPIQ_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO36 \
ESP32_PINMUX(36, ESP_VSPIQ_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO37 \
ESP32_PINMUX(37, ESP_VSPIQ_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO38 \
ESP32_PINMUX(38, ESP_VSPIQ_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO39 \
ESP32_PINMUX(39, ESP_VSPIQ_IN, ESP_NOSIG)
/* SPIM3_MOSI */
#define SPIM3_MOSI_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_VSPID_OUT)
#define SPIM3_MOSI_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_VSPID_OUT)
#define SPIM3_MOSI_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_VSPID_OUT)
#define SPIM3_MOSI_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_VSPID_OUT)
#define SPIM3_MOSI_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_VSPID_OUT)
#define SPIM3_MOSI_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_VSPID_OUT)
#define SPIM3_MOSI_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_VSPID_OUT)
#define SPIM3_MOSI_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_VSPID_OUT)
#define SPIM3_MOSI_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_VSPID_OUT)
#define SPIM3_MOSI_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_VSPID_OUT)
#define SPIM3_MOSI_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_VSPID_OUT)
#define SPIM3_MOSI_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_VSPID_OUT)
#define SPIM3_MOSI_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_VSPID_OUT)
#define SPIM3_MOSI_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_VSPID_OUT)
#define SPIM3_MOSI_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_VSPID_OUT)
#define SPIM3_MOSI_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_VSPID_OUT)
#define SPIM3_MOSI_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_VSPID_OUT)
#define SPIM3_MOSI_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_VSPID_OUT)
#define SPIM3_MOSI_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_VSPID_OUT)
#define SPIM3_MOSI_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_VSPID_OUT)
#define SPIM3_MOSI_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_VSPID_OUT)
#define SPIM3_MOSI_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_VSPID_OUT)
#define SPIM3_MOSI_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_VSPID_OUT)
#define SPIM3_MOSI_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_VSPID_OUT)
#define SPIM3_MOSI_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_VSPID_OUT)
#define SPIM3_MOSI_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_VSPID_OUT)
#define SPIM3_MOSI_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_VSPID_OUT)
#define SPIM3_MOSI_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_VSPID_OUT)
#define SPIM3_MOSI_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_VSPID_OUT)
/* SPIM3_SCLK */
#define SPIM3_SCLK_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_VSPICLK_OUT)
#define SPIM3_SCLK_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_VSPICLK_OUT)
#define SPIM3_SCLK_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_VSPICLK_OUT)
#define SPIM3_SCLK_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_VSPICLK_OUT)
#define SPIM3_SCLK_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_VSPICLK_OUT)
#define SPIM3_SCLK_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_VSPICLK_OUT)
#define SPIM3_SCLK_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_VSPICLK_OUT)
#define SPIM3_SCLK_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_VSPICLK_OUT)
#define SPIM3_SCLK_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_VSPICLK_OUT)
#define SPIM3_SCLK_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_VSPICLK_OUT)
#define SPIM3_SCLK_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_VSPICLK_OUT)
#define SPIM3_SCLK_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_VSPICLK_OUT)
#define SPIM3_SCLK_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_VSPICLK_OUT)
#define SPIM3_SCLK_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_VSPICLK_OUT)
#define SPIM3_SCLK_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_VSPICLK_OUT)
#define SPIM3_SCLK_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_VSPICLK_OUT)
#define SPIM3_SCLK_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_VSPICLK_OUT)
#define SPIM3_SCLK_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_VSPICLK_OUT)
#define SPIM3_SCLK_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_VSPICLK_OUT)
#define SPIM3_SCLK_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_VSPICLK_OUT)
#define SPIM3_SCLK_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_VSPICLK_OUT)
#define SPIM3_SCLK_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_VSPICLK_OUT)
#define SPIM3_SCLK_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_VSPICLK_OUT)
#define SPIM3_SCLK_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_VSPICLK_OUT)
#define SPIM3_SCLK_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_VSPICLK_OUT)
#define SPIM3_SCLK_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_VSPICLK_OUT)
#define SPIM3_SCLK_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_VSPICLK_OUT)
#define SPIM3_SCLK_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_VSPICLK_OUT)
#define SPIM3_SCLK_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_VSPICLK_OUT)
/* TWAI_BUS_OFF */
#define TWAI_BUS_OFF_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
/* TWAI_CLKOUT */
#define TWAI_CLKOUT_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_TWAI_CLKOUT)
/* TWAI_RX */
#define TWAI_RX_GPIO0 \
ESP32_PINMUX(0, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO1 \
ESP32_PINMUX(1, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO2 \
ESP32_PINMUX(2, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO3 \
ESP32_PINMUX(3, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO4 \
ESP32_PINMUX(4, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO5 \
ESP32_PINMUX(5, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO6 \
ESP32_PINMUX(6, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO7 \
ESP32_PINMUX(7, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO8 \
ESP32_PINMUX(8, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO9 \
ESP32_PINMUX(9, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO10 \
ESP32_PINMUX(10, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO11 \
ESP32_PINMUX(11, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO12 \
ESP32_PINMUX(12, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO13 \
ESP32_PINMUX(13, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO14 \
ESP32_PINMUX(14, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO15 \
ESP32_PINMUX(15, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO16 \
ESP32_PINMUX(16, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO17 \
ESP32_PINMUX(17, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO18 \
ESP32_PINMUX(18, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO19 \
ESP32_PINMUX(19, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO20 \
ESP32_PINMUX(20, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO21 \
ESP32_PINMUX(21, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO22 \
ESP32_PINMUX(22, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO23 \
ESP32_PINMUX(23, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO25 \
ESP32_PINMUX(25, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO26 \
ESP32_PINMUX(26, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO27 \
ESP32_PINMUX(27, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO32 \
ESP32_PINMUX(32, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO33 \
ESP32_PINMUX(33, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO34 \
ESP32_PINMUX(34, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO35 \
ESP32_PINMUX(35, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO36 \
ESP32_PINMUX(36, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO37 \
ESP32_PINMUX(37, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO38 \
ESP32_PINMUX(38, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO39 \
ESP32_PINMUX(39, ESP_TWAI_RX, ESP_NOSIG)
/* TWAI_TX */
#define TWAI_TX_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_TWAI_TX)
/* UART0_CTS */
#define UART0_CTS_GPIO0 \
ESP32_PINMUX(0, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO1 \
ESP32_PINMUX(1, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO2 \
ESP32_PINMUX(2, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO3 \
ESP32_PINMUX(3, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO4 \
ESP32_PINMUX(4, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO5 \
ESP32_PINMUX(5, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO6 \
ESP32_PINMUX(6, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO7 \
ESP32_PINMUX(7, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO8 \
ESP32_PINMUX(8, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO9 \
ESP32_PINMUX(9, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO10 \
ESP32_PINMUX(10, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO11 \
ESP32_PINMUX(11, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO12 \
ESP32_PINMUX(12, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO13 \
ESP32_PINMUX(13, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO14 \
ESP32_PINMUX(14, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO15 \
ESP32_PINMUX(15, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO16 \
ESP32_PINMUX(16, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO17 \
ESP32_PINMUX(17, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO18 \
ESP32_PINMUX(18, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO19 \
ESP32_PINMUX(19, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO20 \
ESP32_PINMUX(20, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO21 \
ESP32_PINMUX(21, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO22 \
ESP32_PINMUX(22, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO23 \
ESP32_PINMUX(23, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO25 \
ESP32_PINMUX(25, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO26 \
ESP32_PINMUX(26, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO27 \
ESP32_PINMUX(27, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO32 \
ESP32_PINMUX(32, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO33 \
ESP32_PINMUX(33, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO34 \
ESP32_PINMUX(34, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO35 \
ESP32_PINMUX(35, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO36 \
ESP32_PINMUX(36, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO37 \
ESP32_PINMUX(37, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO38 \
ESP32_PINMUX(38, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO39 \
ESP32_PINMUX(39, ESP_U0CTS_IN, ESP_NOSIG)
/* UART0_DSR */
#define UART0_DSR_GPIO0 \
ESP32_PINMUX(0, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO1 \
ESP32_PINMUX(1, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO2 \
ESP32_PINMUX(2, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO3 \
ESP32_PINMUX(3, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO4 \
ESP32_PINMUX(4, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO5 \
ESP32_PINMUX(5, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO6 \
ESP32_PINMUX(6, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO7 \
ESP32_PINMUX(7, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO8 \
ESP32_PINMUX(8, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO9 \
ESP32_PINMUX(9, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO10 \
ESP32_PINMUX(10, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO11 \
ESP32_PINMUX(11, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO12 \
ESP32_PINMUX(12, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO13 \
ESP32_PINMUX(13, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO14 \
ESP32_PINMUX(14, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO15 \
ESP32_PINMUX(15, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO16 \
ESP32_PINMUX(16, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO17 \
ESP32_PINMUX(17, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO18 \
ESP32_PINMUX(18, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO19 \
ESP32_PINMUX(19, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO20 \
ESP32_PINMUX(20, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO21 \
ESP32_PINMUX(21, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO22 \
ESP32_PINMUX(22, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO23 \
ESP32_PINMUX(23, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO25 \
ESP32_PINMUX(25, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO26 \
ESP32_PINMUX(26, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO27 \
ESP32_PINMUX(27, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO32 \
ESP32_PINMUX(32, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO33 \
ESP32_PINMUX(33, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO34 \
ESP32_PINMUX(34, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO35 \
ESP32_PINMUX(35, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO36 \
ESP32_PINMUX(36, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO37 \
ESP32_PINMUX(37, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO38 \
ESP32_PINMUX(38, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO39 \
ESP32_PINMUX(39, ESP_U0DSR_IN, ESP_NOSIG)
/* UART0_DTR */
#define UART0_DTR_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_U0DTR_OUT)
/* UART0_RTS */
#define UART0_RTS_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_U0RTS_OUT)
/* UART0_RX */
#define UART0_RX_GPIO0 \
ESP32_PINMUX(0, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO1 \
ESP32_PINMUX(1, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO2 \
ESP32_PINMUX(2, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO3 \
ESP32_PINMUX(3, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO4 \
ESP32_PINMUX(4, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO5 \
ESP32_PINMUX(5, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO6 \
ESP32_PINMUX(6, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO7 \
ESP32_PINMUX(7, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO8 \
ESP32_PINMUX(8, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO9 \
ESP32_PINMUX(9, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO10 \
ESP32_PINMUX(10, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO11 \
ESP32_PINMUX(11, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO12 \
ESP32_PINMUX(12, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO13 \
ESP32_PINMUX(13, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO14 \
ESP32_PINMUX(14, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO15 \
ESP32_PINMUX(15, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO16 \
ESP32_PINMUX(16, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO17 \
ESP32_PINMUX(17, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO18 \
ESP32_PINMUX(18, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO19 \
ESP32_PINMUX(19, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO20 \
ESP32_PINMUX(20, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO21 \
ESP32_PINMUX(21, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO22 \
ESP32_PINMUX(22, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO23 \
ESP32_PINMUX(23, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO25 \
ESP32_PINMUX(25, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO26 \
ESP32_PINMUX(26, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO27 \
ESP32_PINMUX(27, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO32 \
ESP32_PINMUX(32, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO33 \
ESP32_PINMUX(33, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO34 \
ESP32_PINMUX(34, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO35 \
ESP32_PINMUX(35, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO36 \
ESP32_PINMUX(36, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO37 \
ESP32_PINMUX(37, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO38 \
ESP32_PINMUX(38, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO39 \
ESP32_PINMUX(39, ESP_U0RXD_IN, ESP_NOSIG)
/* UART0_TX */
#define UART0_TX_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_U0TXD_OUT)
/* UART1_CTS */
#define UART1_CTS_GPIO0 \
ESP32_PINMUX(0, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO1 \
ESP32_PINMUX(1, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO2 \
ESP32_PINMUX(2, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO3 \
ESP32_PINMUX(3, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO4 \
ESP32_PINMUX(4, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO5 \
ESP32_PINMUX(5, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO6 \
ESP32_PINMUX(6, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO7 \
ESP32_PINMUX(7, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO8 \
ESP32_PINMUX(8, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO9 \
ESP32_PINMUX(9, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO10 \
ESP32_PINMUX(10, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO11 \
ESP32_PINMUX(11, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO12 \
ESP32_PINMUX(12, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO13 \
ESP32_PINMUX(13, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO14 \
ESP32_PINMUX(14, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO15 \
ESP32_PINMUX(15, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO16 \
ESP32_PINMUX(16, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO17 \
ESP32_PINMUX(17, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO18 \
ESP32_PINMUX(18, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO19 \
ESP32_PINMUX(19, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO20 \
ESP32_PINMUX(20, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO21 \
ESP32_PINMUX(21, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO22 \
ESP32_PINMUX(22, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO23 \
ESP32_PINMUX(23, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO25 \
ESP32_PINMUX(25, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO26 \
ESP32_PINMUX(26, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO27 \
ESP32_PINMUX(27, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO32 \
ESP32_PINMUX(32, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO33 \
ESP32_PINMUX(33, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO34 \
ESP32_PINMUX(34, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO35 \
ESP32_PINMUX(35, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO36 \
ESP32_PINMUX(36, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO37 \
ESP32_PINMUX(37, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO38 \
ESP32_PINMUX(38, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO39 \
ESP32_PINMUX(39, ESP_U1CTS_IN, ESP_NOSIG)
/* UART1_DSR */
#define UART1_DSR_GPIO0 \
ESP32_PINMUX(0, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO1 \
ESP32_PINMUX(1, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO2 \
ESP32_PINMUX(2, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO3 \
ESP32_PINMUX(3, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO4 \
ESP32_PINMUX(4, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO5 \
ESP32_PINMUX(5, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO6 \
ESP32_PINMUX(6, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO7 \
ESP32_PINMUX(7, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO8 \
ESP32_PINMUX(8, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO9 \
ESP32_PINMUX(9, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO10 \
ESP32_PINMUX(10, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO11 \
ESP32_PINMUX(11, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO12 \
ESP32_PINMUX(12, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO13 \
ESP32_PINMUX(13, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO14 \
ESP32_PINMUX(14, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO15 \
ESP32_PINMUX(15, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO16 \
ESP32_PINMUX(16, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO17 \
ESP32_PINMUX(17, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO18 \
ESP32_PINMUX(18, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO19 \
ESP32_PINMUX(19, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO20 \
ESP32_PINMUX(20, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO21 \
ESP32_PINMUX(21, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO22 \
ESP32_PINMUX(22, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO23 \
ESP32_PINMUX(23, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO25 \
ESP32_PINMUX(25, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO26 \
ESP32_PINMUX(26, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO27 \
ESP32_PINMUX(27, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO32 \
ESP32_PINMUX(32, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO33 \
ESP32_PINMUX(33, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO34 \
ESP32_PINMUX(34, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO35 \
ESP32_PINMUX(35, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO36 \
ESP32_PINMUX(36, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO37 \
ESP32_PINMUX(37, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO38 \
ESP32_PINMUX(38, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO39 \
ESP32_PINMUX(39, ESP_U1DSR_IN, ESP_NOSIG)
/* UART1_DTR */
#define UART1_DTR_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_U1DTR_OUT)
/* UART1_RTS */
#define UART1_RTS_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_U1RTS_OUT)
/* UART1_RX */
#define UART1_RX_GPIO0 \
ESP32_PINMUX(0, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO1 \
ESP32_PINMUX(1, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO2 \
ESP32_PINMUX(2, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO3 \
ESP32_PINMUX(3, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO4 \
ESP32_PINMUX(4, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO5 \
ESP32_PINMUX(5, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO6 \
ESP32_PINMUX(6, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO7 \
ESP32_PINMUX(7, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO8 \
ESP32_PINMUX(8, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO9 \
ESP32_PINMUX(9, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO10 \
ESP32_PINMUX(10, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO11 \
ESP32_PINMUX(11, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO12 \
ESP32_PINMUX(12, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO13 \
ESP32_PINMUX(13, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO14 \
ESP32_PINMUX(14, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO15 \
ESP32_PINMUX(15, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO16 \
ESP32_PINMUX(16, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO17 \
ESP32_PINMUX(17, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO18 \
ESP32_PINMUX(18, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO19 \
ESP32_PINMUX(19, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO20 \
ESP32_PINMUX(20, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO21 \
ESP32_PINMUX(21, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO22 \
ESP32_PINMUX(22, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO23 \
ESP32_PINMUX(23, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO25 \
ESP32_PINMUX(25, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO26 \
ESP32_PINMUX(26, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO27 \
ESP32_PINMUX(27, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO32 \
ESP32_PINMUX(32, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO33 \
ESP32_PINMUX(33, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO34 \
ESP32_PINMUX(34, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO35 \
ESP32_PINMUX(35, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO36 \
ESP32_PINMUX(36, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO37 \
ESP32_PINMUX(37, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO38 \
ESP32_PINMUX(38, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO39 \
ESP32_PINMUX(39, ESP_U1RXD_IN, ESP_NOSIG)
/* UART1_TX */
#define UART1_TX_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_U1TXD_OUT)
/* UART2_CTS */
#define UART2_CTS_GPIO0 \
ESP32_PINMUX(0, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO1 \
ESP32_PINMUX(1, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO2 \
ESP32_PINMUX(2, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO3 \
ESP32_PINMUX(3, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO4 \
ESP32_PINMUX(4, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO5 \
ESP32_PINMUX(5, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO6 \
ESP32_PINMUX(6, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO7 \
ESP32_PINMUX(7, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO8 \
ESP32_PINMUX(8, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO9 \
ESP32_PINMUX(9, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO10 \
ESP32_PINMUX(10, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO11 \
ESP32_PINMUX(11, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO12 \
ESP32_PINMUX(12, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO13 \
ESP32_PINMUX(13, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO14 \
ESP32_PINMUX(14, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO15 \
ESP32_PINMUX(15, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO16 \
ESP32_PINMUX(16, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO17 \
ESP32_PINMUX(17, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO18 \
ESP32_PINMUX(18, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO19 \
ESP32_PINMUX(19, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO20 \
ESP32_PINMUX(20, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO21 \
ESP32_PINMUX(21, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO22 \
ESP32_PINMUX(22, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO23 \
ESP32_PINMUX(23, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO25 \
ESP32_PINMUX(25, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO26 \
ESP32_PINMUX(26, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO27 \
ESP32_PINMUX(27, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO32 \
ESP32_PINMUX(32, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO33 \
ESP32_PINMUX(33, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO34 \
ESP32_PINMUX(34, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO35 \
ESP32_PINMUX(35, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO36 \
ESP32_PINMUX(36, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO37 \
ESP32_PINMUX(37, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO38 \
ESP32_PINMUX(38, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO39 \
ESP32_PINMUX(39, ESP_U2CTS_IN, ESP_NOSIG)
/* UART2_RTS */
#define UART2_RTS_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_U2RTS_OUT)
/* UART2_RX */
#define UART2_RX_GPIO0 \
ESP32_PINMUX(0, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO1 \
ESP32_PINMUX(1, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO2 \
ESP32_PINMUX(2, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO3 \
ESP32_PINMUX(3, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO4 \
ESP32_PINMUX(4, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO5 \
ESP32_PINMUX(5, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO6 \
ESP32_PINMUX(6, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO7 \
ESP32_PINMUX(7, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO8 \
ESP32_PINMUX(8, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO9 \
ESP32_PINMUX(9, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO10 \
ESP32_PINMUX(10, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO11 \
ESP32_PINMUX(11, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO12 \
ESP32_PINMUX(12, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO13 \
ESP32_PINMUX(13, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO14 \
ESP32_PINMUX(14, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO15 \
ESP32_PINMUX(15, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO16 \
ESP32_PINMUX(16, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO17 \
ESP32_PINMUX(17, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO18 \
ESP32_PINMUX(18, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO19 \
ESP32_PINMUX(19, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO20 \
ESP32_PINMUX(20, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO21 \
ESP32_PINMUX(21, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO22 \
ESP32_PINMUX(22, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO23 \
ESP32_PINMUX(23, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO25 \
ESP32_PINMUX(25, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO26 \
ESP32_PINMUX(26, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO27 \
ESP32_PINMUX(27, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO32 \
ESP32_PINMUX(32, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO33 \
ESP32_PINMUX(33, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO34 \
ESP32_PINMUX(34, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO35 \
ESP32_PINMUX(35, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO36 \
ESP32_PINMUX(36, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO37 \
ESP32_PINMUX(37, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO38 \
ESP32_PINMUX(38, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO39 \
ESP32_PINMUX(39, ESP_U2RXD_IN, ESP_NOSIG)
/* UART2_TX */
#define UART2_TX_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO22 \
ESP32_PINMUX(22, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO23 \
ESP32_PINMUX(23, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO25 \
ESP32_PINMUX(25, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_U2TXD_OUT)
#endif /* INC_DT_BINDS_PINCTRL_ESP32_PINCTRL_HAL_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/esp32-pinctrl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 114,468 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_MCHP_XEC_PINCTRL_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_MCHP_XEC_PINCTRL_H_
#include <zephyr/dt-bindings/dt-util.h>
#define MCHP_GPIO 0x0
#define MCHP_AF0 0x0
#define MCHP_AF1 0x1
#define MCHP_AF2 0x2
#define MCHP_AF3 0x3
#define MCHP_AF4 0x4
#define MCHP_AF5 0x5
#define MCHP_AF6 0x6
#define MCHP_AF7 0x7
#define MCHP_AFMAX 0x8
#define MCHP_XEC_NO_PUD_POS 12
#define MCHP_XEC_PD_POS 13
#define MCHP_XEC_PU_POS 14
#define MCHP_XEC_PUSH_PULL_POS 15
#define MCHP_XEC_OPEN_DRAIN_POS 16
#define MCHP_XEC_OUT_DIS_POS 17
#define MCHP_XEC_OUT_EN_POS 18
#define MCHP_XEC_OUT_HI_POS 19
#define MCHP_XEC_OUT_LO_POS 20
/* bit[21] unused */
#define MCHP_XEC_SLEW_RATE_POS 22
#define MCHP_XEC_SLEW_RATE_MSK0 0x3
#define MCHP_XEC_SLEW_RATE_SLOW0 0x1
#define MCHP_XEC_SLEW_RATE_FAST0 0x2
#define MCHP_XEC_DRV_STR_POS 24
#define MCHP_XEC_DRV_STR_MSK0 0x7
#define MCHP_XEC_DRV_STR0_1X 0x1 /* 2 or 4(PIO-24) mA */
#define MCHP_XEC_DRV_STR0_2X 0x2 /* 4 or 8(PIO-24) mA */
#define MCHP_XEC_DRV_STR0_4X 0x3 /* 8 or 16(PIO-24) mA */
#define MCHP_XEC_DRV_STR0_6X 0x4 /* 12 or 24(PIO-24) mA */
#define MCHP_XEC_PIN_LOW_POWER_POS 27
#define MCHP_XEC_FUNC_INV_POS 29
#define MCHP_XEC_PINMUX_PORT_POS 0
#define MCHP_XEC_PINMUX_PORT_MSK 0xf
#define MCHP_XEC_PINMUX_PIN_POS 4
#define MCHP_XEC_PINMUX_PIN_MSK 0x1f
#define MCHP_XEC_PINMUX_FUNC_POS 9
#define MCHP_XEC_PINMUX_FUNC_MSK 0x7
/* n is octal pin number or equivalent in another base.
* MCHP XEC documentation specifies pin numbers in octal.
* f is function number
* b[3:0] = pin bank
* b[8:4] = pin position in bank
* b[11:9] = function
*/
#define MCHP_XEC_PINMUX(n, f) \
(((((n) >> 5) & MCHP_XEC_PINMUX_PORT_MSK) << MCHP_XEC_PINMUX_PORT_POS) | \
(((n) & MCHP_XEC_PINMUX_PIN_MSK) << MCHP_XEC_PINMUX_PIN_POS) | \
(((f) & MCHP_XEC_PINMUX_FUNC_MSK) << MCHP_XEC_PINMUX_FUNC_POS))
#define MCHP_XEC_PINMUX_PORT(p) \
(((p) >> MCHP_XEC_PINMUX_PORT_POS) & MCHP_XEC_PINMUX_PORT_MSK)
#define MCHP_XEC_PINMUX_PIN(p) \
(((p) >> MCHP_XEC_PINMUX_PIN_POS) & MCHP_XEC_PINMUX_PIN_MSK)
#define MCHP_XEC_PINMUX_FUNC(p) \
(((p) >> MCHP_XEC_PINMUX_FUNC_POS) & MCHP_XEC_PINMUX_FUNC_MSK)
#define MEC_XEC_PINMUX_PORT_PIN(p) \
((p) & ((MCHP_XEC_PINMUX_PORT_MSK << MCHP_XEC_PINMUX_PORT_POS) | \
(MCHP_XEC_PINMUX_PIN_MSK << MCHP_XEC_PINMUX_PIN_POS)))
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_MCHP_XEC_PINCTRL_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/mchp-xec-pinctrl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,000 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_STM32_AFIO_H_
#define ZEPHYR_STM32_AFIO_H_
#define STM32_REMAP_REG_MASK 0x1U
#define STM32_REMAP_REG_SHIFT 0U
#define STM32_REMAP_SHIFT_MASK 0x1FU
#define STM32_REMAP_SHIFT_SHIFT 1U
#define STM32_REMAP_MASK_MASK 0x3U
#define STM32_REMAP_MASK_SHIFT 6U
#define STM32_REMAP_VAL_MASK 0x3U
#define STM32_REMAP_VAL_SHIFT 8U
/**
* @brief STM32F1 Remap configuration bit field.
*
* - reg (0/1) [ 0 : 0 ]
* - shift (0..31) [ 1 : 5 ]
* - mask (0x1, 0x3) [ 6 : 7 ]
* - val (0..3) [ 8 : 9 ]
*
* @param reg AFIO_MAPRx register (MAPR, MAPR2).
* @param shift Position within AFIO_MAPRx.
* @param mask Mask for the AFIO_MAPRx field.
* @param val Remap value (0, 1, 2 or 3).
*/
#define STM32_REMAP(val, mask, shift, reg) \
((((reg) & STM32_REMAP_REG_MASK) << STM32_REMAP_REG_SHIFT) | \
(((shift) & STM32_REMAP_SHIFT_MASK) << STM32_REMAP_SHIFT_SHIFT) | \
(((mask) & STM32_REMAP_MASK_MASK) << STM32_REMAP_MASK_SHIFT) | \
(((val) & STM32_REMAP_VAL_MASK) << STM32_REMAP_VAL_SHIFT))
/* Accessors for remap value */
/**
* Obtain register field from remap configuration.
*
* @param remap Remap bit field value.
*/
#define STM32_REMAP_REG_GET(remap) \
(((remap) >> STM32_REMAP_REG_SHIFT) & STM32_REMAP_REG_MASK)
/**
* Obtain position field from remap configuration.
*
* @param remap Remap bit field value.
*/
#define STM32_REMAP_SHIFT_GET(remap) \
(((remap) >> STM32_REMAP_SHIFT_SHIFT) & STM32_REMAP_SHIFT_MASK)
/**
* Obtain mask field from remap configuration.
*
* @param remap Remap bit field value.
*/
#define STM32_REMAP_MASK_GET(remap) \
(((remap) >> STM32_REMAP_MASK_SHIFT) & STM32_REMAP_MASK_MASK)
/**
* Obtain value field from remap configuration.
*
* @param remap Remap bit field value.
*/
#define STM32_REMAP_VAL_GET(remap) \
(((remap) >> STM32_REMAP_VAL_SHIFT) & STM32_REMAP_VAL_MASK)
/* Remap values definitions, according to RM0008.pdf */
#define STM32_AFIO_MAPR 0U
#define STM32_AFIO_MAPR2 1U
/** Device not remappable **/
#define NO_REMAP 0
/** SPI1 (no remap) */
#define SPI1_REMAP0 STM32_REMAP(0U, 0x1U, 0U, STM32_AFIO_MAPR)
/** SPI1 (remap) */
#define SPI1_REMAP1 STM32_REMAP(1U, 0x1U, 0U, STM32_AFIO_MAPR)
/** I2C1 (no remap) */
#define I2C1_REMAP0 STM32_REMAP(0U, 0x1U, 1U, STM32_AFIO_MAPR)
/** I2C1 (remap) */
#define I2C1_REMAP1 STM32_REMAP(1U, 0x1U, 1U, STM32_AFIO_MAPR)
/** USART1 (no remap) */
#define USART1_REMAP0 STM32_REMAP(0U, 0x1U, 2U, STM32_AFIO_MAPR)
/** USART1 (remap) */
#define USART1_REMAP1 STM32_REMAP(1U, 0x1U, 2U, STM32_AFIO_MAPR)
/** USART2 (no remap) */
#define USART2_REMAP0 STM32_REMAP(0U, 0x1U, 3U, STM32_AFIO_MAPR)
/** USART2 (remap) */
#define USART2_REMAP1 STM32_REMAP(1U, 0x1U, 3U, STM32_AFIO_MAPR)
/** USART3 (no remap) */
#define USART3_REMAP0 STM32_REMAP(0U, 0x3U, 4U, STM32_AFIO_MAPR)
/** USART3 (partial remap) */
#define USART3_REMAP1 STM32_REMAP(1U, 0x3U, 4U, STM32_AFIO_MAPR)
/** USART3 (full remap) */
#define USART3_REMAP2 STM32_REMAP(3U, 0x3U, 4U, STM32_AFIO_MAPR)
/** TIM1 (no remap) */
#define TIM1_REMAP0 STM32_REMAP(0U, 0x3U, 6U, STM32_AFIO_MAPR)
/** TIM1 (partial remap) */
#define TIM1_REMAP1 STM32_REMAP(1U, 0x3U, 6U, STM32_AFIO_MAPR)
/** TIM1 (full remap) */
#define TIM1_REMAP2 STM32_REMAP(3U, 0x3U, 6U, STM32_AFIO_MAPR)
/** TIM2 (no remap) */
#define TIM2_REMAP0 STM32_REMAP(0U, 0x3U, 8U, STM32_AFIO_MAPR)
/** TIM2 (partial remap 1) */
#define TIM2_REMAP1 STM32_REMAP(1U, 0x3U, 8U, STM32_AFIO_MAPR)
/** TIM2 (partial remap 2) */
#define TIM2_REMAP2 STM32_REMAP(2U, 0x3U, 8U, STM32_AFIO_MAPR)
/** TIM2 (full remap) */
#define TIM2_REMAP3 STM32_REMAP(3U, 0x3U, 8U, STM32_AFIO_MAPR)
/** TIM3 (no remap) */
#define TIM3_REMAP0 STM32_REMAP(0U, 0x3U, 10U, STM32_AFIO_MAPR)
/** TIM3 (partial remap 1) */
#define TIM3_REMAP1 STM32_REMAP(1U, 0x3U, 10U, STM32_AFIO_MAPR)
/** TIM3 (partial remap 2) */
#define TIM3_REMAP2 STM32_REMAP(2U, 0x3U, 10U, STM32_AFIO_MAPR)
/** TIM3 (full remap) */
#define TIM3_REMAP3 STM32_REMAP(3U, 0x3U, 10U, STM32_AFIO_MAPR)
/** TIM4 (no remap) */
#define TIM4_REMAP0 STM32_REMAP(0U, 0x1U, 12U, STM32_AFIO_MAPR)
/** TIM4 (remap) */
#define TIM4_REMAP1 STM32_REMAP(1U, 0x1U, 12U, STM32_AFIO_MAPR)
/** CAN (no remap) */
#define CAN_REMAP0 STM32_REMAP(0U, 0x3U, 13U, STM32_AFIO_MAPR)
/** CAN (partial remap) */
#define CAN_REMAP1 STM32_REMAP(2U, 0x3U, 13U, STM32_AFIO_MAPR)
/** CAN (full remap) */
#define CAN_REMAP2 STM32_REMAP(3U, 0x3U, 13U, STM32_AFIO_MAPR)
/** CAN1 alias */
#define CAN1_REMAP0 CAN_REMAP0
#define CAN1_REMAP1 CAN_REMAP1
#define CAN1_REMAP2 CAN_REMAP2
/** ETH (no remap) */
#define ETH_REMAP0 STM32_REMAP(0U, 0x1U, 21U, STM32_AFIO_MAPR)
/** ETH (remap) */
#define ETH_REMAP1 STM32_REMAP(1U, 0x1U, 21U, STM32_AFIO_MAPR)
/** CAN2 (no remap) */
#define CAN2_REMAP0 STM32_REMAP(0U, 0x1U, 22U, STM32_AFIO_MAPR)
/** CAN2 (remap) */
#define CAN2_REMAP1 STM32_REMAP(1U, 0x1U, 22U, STM32_AFIO_MAPR)
/** SPI3 (no remap) */
#define SPI3_REMAP0 STM32_REMAP(0U, 0x1U, 28U, STM32_AFIO_MAPR)
/** SPI3 (remap) */
#define SPI3_REMAP1 STM32_REMAP(1U, 0x1U, 28U, STM32_AFIO_MAPR)
/** I2S3 (SPI3) (no remap) */
#define I2S3_REMAP0 SPI3_REMAP0
/** I2S3 (SPI3) (remap) */
#define I2S3_REMAP1 SPI3_REMAP1
/** TIM9 (no remap) */
#define TIM9_REMAP0 STM32_REMAP(0U, 0x1U, 5U, STM32_AFIO_MAPR2)
/** TIM9 (remap) */
#define TIM9_REMAP1 STM32_REMAP(1U, 0x1U, 5U, STM32_AFIO_MAPR2)
/** TIM10 (no remap) */
#define TIM10_REMAP0 STM32_REMAP(0U, 0x1U, 6U, STM32_AFIO_MAPR2)
/** TIM10 (remap) */
#define TIM10_REMAP1 STM32_REMAP(1U, 0x1U, 6U, STM32_AFIO_MAPR2)
/** TIM11 (no remap) */
#define TIM11_REMAP0 STM32_REMAP(0U, 0x1U, 7U, STM32_AFIO_MAPR2)
/** TIM11 (remap) */
#define TIM11_REMAP1 STM32_REMAP(1U, 0x1U, 7U, STM32_AFIO_MAPR2)
/** TIM13 (no remap) */
#define TIM13_REMAP0 STM32_REMAP(0U, 0x1U, 8U, STM32_AFIO_MAPR2)
/** TIM13 (remap) */
#define TIM13_REMAP1 STM32_REMAP(1U, 0x1U, 8U, STM32_AFIO_MAPR2)
/** TIM14 (no remap) */
#define TIM14_REMAP0 STM32_REMAP(0U, 0x1U, 9U, STM32_AFIO_MAPR2)
/** TIM14 (remap) */
#define TIM14_REMAP1 STM32_REMAP(1U, 0x1U, 9U, STM32_AFIO_MAPR2)
/** TIM15 (no remap) */
#define TIM15_REMAP0 STM32_REMAP(0U, 0x1U, 0U, STM32_AFIO_MAPR2)
/** TIM15 (remap) */
#define TIM15_REMAP1 STM32_REMAP(1U, 0x1U, 0U, STM32_AFIO_MAPR2)
/** TIM16 (no remap) */
#define TIM16_REMAP0 STM32_REMAP(0U, 0x1U, 1U, STM32_AFIO_MAPR2)
/** TIM16 (remap) */
#define TIM16_REMAP1 STM32_REMAP(1U, 0x1U, 1U, STM32_AFIO_MAPR2)
/** TIM17 (no remap) */
#define TIM17_REMAP0 STM32_REMAP(0U, 0x1U, 2U, STM32_AFIO_MAPR2)
/** TIM17 (remap) */
#define TIM17_REMAP1 STM32_REMAP(1U, 0x1U, 2U, STM32_AFIO_MAPR2)
#endif /* ZEPHYR_STM32_AFIO_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/stm32f1-afio.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 2,850 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_IT8XXX2_PINCTRL_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_IT8XXX2_PINCTRL_H_
#define NO_FUNC 0
/**
* @brief PIN alternate function.
*/
#define IT8XXX2_ALT_FUNC_1 0U
#define IT8XXX2_ALT_FUNC_2 1U
#define IT8XXX2_ALT_FUNC_3 2U
#define IT8XXX2_ALT_FUNC_4 3U
#define IT8XXX2_ALT_DEFAULT 4U
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_IT8XXX2_PINCTRL_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/it8xxx2-pinctrl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 146 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_STM32_PINCTRLF1_H_
#define ZEPHYR_STM32_PINCTRLF1_H_
#include <zephyr/dt-bindings/pinctrl/stm32-pinctrl-common.h>
#include <zephyr/dt-bindings/pinctrl/stm32f1-afio.h>
/* Adapted from Linux: include/dt-bindings/pinctrl/stm32-pinfunc.h */
/**
* @brief Macro to generate pinmux int using port, pin number and mode arguments
* This is adapted from Linux equivalent st,stm32f429-pinctrl binding
*/
#define STM32_MODE_SHIFT 0U
#define STM32_MODE_MASK 0x3U
#define STM32_LINE_SHIFT 2U
#define STM32_LINE_MASK 0xFU
#define STM32_PORT_SHIFT 6U
#define STM32_PORT_MASK 0xFU
#define STM32_REMAP_SHIFT 10U
#define STM32_REMAP_MASK 0x3FFU
/**
* @brief Pin configuration configuration bit field.
*
* Fields:
*
* - mode [ 0 : 1 ]
* - line [ 2 : 5 ]
* - port [ 6 : 9 ]
* - remap [ 10 : 19 ]
*
* @param port Port ('A'..'K')
* @param line Pin (0..15)
* @param mode Pin mode (ANALOG, GPIO_IN, ALTERNATE).
* @param remap Pin remapping configuration (NO_REMAP, REMAP_1, ...)
*/
#define STM32F1_PINMUX(port, line, mode, remap) \
(((((port) - 'A') & STM32_PORT_MASK) << STM32_PORT_SHIFT) | \
(((line) & STM32_LINE_MASK) << STM32_LINE_SHIFT) | \
(((mode) & STM32_MODE_MASK) << STM32_MODE_SHIFT) | \
(((remap) & STM32_REMAP_MASK) << STM32_REMAP_SHIFT))
/**
* @brief Pin modes
*/
#define ALTERNATE 0x0 /* Alternate function output */
#define GPIO_IN 0x1 /* Input */
#define ANALOG 0x2 /* Analog */
#define GPIO_OUT 0x3 /* Output */
/**
* @brief PIN configuration bitfield
*
* Pin configuration is coded with the following
* fields
* GPIO I/O Mode [ 0 ]
* GPIO Input config [ 1 : 2 ]
* GPIO Output speed [ 3 : 4 ]
* GPIO Output PP/OD [ 5 ]
* GPIO Output AF/GP [ 6 ]
* GPIO PUPD Config [ 7 : 8 ]
* GPIO ODR [ 9 ]
*
* Applicable to STM32F1 series
*/
/* Port Mode */
#define STM32_MODE_INPUT (0x0 << STM32_MODE_INOUT_SHIFT)
#define STM32_MODE_OUTPUT (0x1 << STM32_MODE_INOUT_SHIFT)
#define STM32_MODE_INOUT_MASK 0x1
#define STM32_MODE_INOUT_SHIFT 0
/* Input Port configuration */
#define STM32_CNF_IN_ANALOG (0x0 << STM32_CNF_IN_SHIFT)
#define STM32_CNF_IN_FLOAT (0x1 << STM32_CNF_IN_SHIFT)
#define STM32_CNF_IN_PUPD (0x2 << STM32_CNF_IN_SHIFT)
#define STM32_CNF_IN_MASK 0x3
#define STM32_CNF_IN_SHIFT 1
/* Output Port configuration */
#define STM32_MODE_OUTPUT_MAX_10 (0x0 << STM32_MODE_OSPEED_SHIFT)
#define STM32_MODE_OUTPUT_MAX_2 (0x1 << STM32_MODE_OSPEED_SHIFT)
#define STM32_MODE_OUTPUT_MAX_50 (0x2 << STM32_MODE_OSPEED_SHIFT)
#define STM32_MODE_OSPEED_MASK 0x3
#define STM32_MODE_OSPEED_SHIFT 3
#define STM32_CNF_PUSH_PULL (0x0 << STM32_CNF_OUT_0_SHIFT)
#define STM32_CNF_OPEN_DRAIN (0x1 << STM32_CNF_OUT_0_SHIFT)
#define STM32_CNF_OUT_0_MASK 0x1
#define STM32_CNF_OUT_0_SHIFT 5
#define STM32_CNF_GP_OUTPUT (0x0 << STM32_CNF_OUT_1_SHIFT)
#define STM32_CNF_ALT_FUNC (0x1 << STM32_CNF_OUT_1_SHIFT)
#define STM32_CNF_OUT_1_MASK 0x1
#define STM32_CNF_OUT_1_SHIFT 6
/* GPIO High impedance/Pull-up/Pull-down */
#define STM32_PUPD_NO_PULL (0x0 << STM32_PUPD_SHIFT)
#define STM32_PUPD_PULL_UP (0x1 << STM32_PUPD_SHIFT)
#define STM32_PUPD_PULL_DOWN (0x2 << STM32_PUPD_SHIFT)
#define STM32_PUPD_MASK 0x3
#define STM32_PUPD_SHIFT 7
/* GPIO plain output value */
#define STM32_ODR_0 (0x0 << STM32_ODR_SHIFT)
#define STM32_ODR_1 (0x1 << STM32_ODR_SHIFT)
#define STM32_ODR_MASK 0x1
#define STM32_ODR_SHIFT 9
#endif /* ZEPHYR_STM32_PINCTRLF1_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/stm32f1-pinctrl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,211 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_ESP32C3_GPIO_SIGMAP_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_ESP32C3_GPIO_SIGMAP_H_
#define ESP_NOSIG ESP_SIG_INVAL
#define ESP_SPICLK_OUT_MUX ESP_SPICLK_OUT
#define ESP_SPIQ_IN 0
#define ESP_SPIQ_OUT 0
#define ESP_SPID_IN 1
#define ESP_SPID_OUT 1
#define ESP_SPIHD_IN 2
#define ESP_SPIHD_OUT 2
#define ESP_SPIWP_IN 3
#define ESP_SPIWP_OUT 3
#define ESP_SPICLK_OUT 4
#define ESP_SPICS0_OUT 5
#define ESP_U0RXD_IN 6
#define ESP_U0TXD_OUT 6
#define ESP_U0CTS_IN 7
#define ESP_U0RTS_OUT 7
#define ESP_U0DSR_IN 8
#define ESP_U0DTR_OUT 8
#define ESP_U1RXD_IN 9
#define ESP_U1TXD_OUT 9
#define ESP_U1CTS_IN 10
#define ESP_U1RTS_OUT 10
#define ESP_U1DSR_IN 11
#define ESP_U1DTR_OUT 11
#define ESP_I2S_MCLK_IN 12
#define ESP_I2S_MCLK_OUT 12
#define ESP_I2SO_BCK_IN 13
#define ESP_I2SO_BCK_OUT 13
#define ESP_I2SO_WS_IN 14
#define ESP_I2SO_WS_OUT 14
#define ESP_I2SI_SD_IN 15
#define ESP_I2SO_SD_OUT 15
#define ESP_I2SI_BCK_IN 16
#define ESP_I2SI_BCK_OUT 16
#define ESP_I2SI_WS_IN 17
#define ESP_I2SI_WS_OUT 17
#define ESP_GPIO_BT_PRIORITY 18
#define ESP_GPIO_WLAN_PRIO 18
#define ESP_GPIO_BT_ACTIVE 19
#define ESP_GPIO_WLAN_ACTIVE 19
#define ESP_BB_DIAG0 20
#define ESP_BB_DIAG1 21
#define ESP_BB_DIAG2 22
#define ESP_BB_DIAG3 23
#define ESP_BB_DIAG4 24
#define ESP_BB_DIAG5 25
#define ESP_BB_DIAG6 26
#define ESP_BB_DIAG7 27
#define ESP_BB_DIAG8 28
#define ESP_BB_DIAG9 29
#define ESP_BB_DIAG10 30
#define ESP_BB_DIAG11 31
#define ESP_BB_DIAG12 32
#define ESP_BB_DIAG13 33
#define ESP_BB_DIAG14 34
#define ESP_BB_DIAG15 35
#define ESP_BB_DIAG16 36
#define ESP_BB_DIAG17 37
#define ESP_BB_DIAG18 38
#define ESP_BB_DIAG19 39
#define ESP_USB_EXTPHY_VP 40
#define ESP_USB_EXTPHY_OEN 40
#define ESP_USB_EXTPHY_VM 41
#define ESP_USB_EXTPHY_SPEED 41
#define ESP_USB_EXTPHY_RCV 42
#define ESP_USB_EXTPHY_VPO 42
#define ESP_USB_EXTPHY_VMO 43
#define ESP_USB_EXTPHY_SUSPND 44
#define ESP_EXT_ADC_START 45
#define ESP_LEDC_LS_SIG_OUT0 45
#define ESP_LEDC_LS_SIG_OUT1 46
#define ESP_LEDC_LS_SIG_OUT2 47
#define ESP_LEDC_LS_SIG_OUT3 48
#define ESP_LEDC_LS_SIG_OUT4 49
#define ESP_LEDC_LS_SIG_OUT5 50
#define ESP_RMT_SIG_IN0 51
#define ESP_RMT_SIG_OUT0 51
#define ESP_RMT_SIG_IN1 52
#define ESP_RMT_SIG_OUT1 52
#define ESP_I2CEXT0_SCL_IN 53
#define ESP_I2CEXT0_SCL_OUT 53
#define ESP_I2CEXT0_SDA_IN 54
#define ESP_I2CEXT0_SDA_OUT 54
#define ESP_GPIO_SD0_OUT 55
#define ESP_GPIO_SD1_OUT 56
#define ESP_GPIO_SD2_OUT 57
#define ESP_GPIO_SD3_OUT 58
#define ESP_FSPICLK_IN 63
#define ESP_FSPICLK_OUT 63
#define ESP_FSPIQ_IN 64
#define ESP_FSPIQ_OUT 64
#define ESP_FSPID_IN 65
#define ESP_FSPID_OUT 65
#define ESP_FSPIHD_IN 66
#define ESP_FSPIHD_OUT 66
#define ESP_FSPIWP_IN 67
#define ESP_FSPIWP_OUT 67
#define ESP_FSPICS0_IN 68
#define ESP_FSPICS0_OUT 68
#define ESP_FSPICS1_OUT 69
#define ESP_FSPICS2_OUT 70
#define ESP_FSPICS3_OUT 71
#define ESP_FSPICS4_OUT 72
#define ESP_FSPICS5_OUT 73
#define ESP_TWAI_RX 74
#define ESP_TWAI_TX 74
#define ESP_TWAI_BUS_OFF_ON 75
#define ESP_TWAI_CLKOUT 76
#define ESP_PCMFSYNC_IN 77
#define ESP_BT_AUDIO0_IRQ 77
#define ESP_PCMCLK_IN 78
#define ESP_BT_AUDIO1_IRQ 78
#define ESP_PCMDIN 79
#define ESP_BT_AUDIO2_IRQ 79
#define ESP_RW_WAKEUP_REQ 80
#define ESP_BLE_AUDIO0_IRQ 80
#define ESP_BLE_AUDIO1_IRQ 81
#define ESP_BLE_AUDIO2_IRQ 82
#define ESP_PCMFSYNC_OUT 83
#define ESP_PCMCLK_OUT 84
#define ESP_PCMDOUT 85
#define ESP_BLE_AUDIO_SYNC0_P 86
#define ESP_BLE_AUDIO_SYNC1_P 87
#define ESP_BLE_AUDIO_SYNC2_P 88
#define ESP_ANT_SEL0 89
#define ESP_ANT_SEL1 90
#define ESP_ANT_SEL2 91
#define ESP_ANT_SEL3 92
#define ESP_ANT_SEL4 93
#define ESP_ANT_SEL5 94
#define ESP_ANT_SEL6 95
#define ESP_ANT_SEL7 96
#define ESP_SIG_IN_FUNC_97 97
#define ESP_SIG_IN_FUNC97 97
#define ESP_SIG_IN_FUNC_98 98
#define ESP_SIG_IN_FUNC98 98
#define ESP_SIG_IN_FUNC_99 99
#define ESP_SIG_IN_FUNC99 99
#define ESP_SIG_IN_FUNC_100 100
#define ESP_SIG_IN_FUNC100 100
#define ESP_SYNCERR 101
#define ESP_SYNCFOUND_FLAG 102
#define ESP_EVT_CNTL_IMMEDIATE_ABORT 103
#define ESP_LINKLBL 104
#define ESP_DATA_EN 105
#define ESP_DATA 106
#define ESP_PKT_TX_ON 107
#define ESP_PKT_RX_ON 108
#define ESP_RW_TX_ON 109
#define ESP_RW_RX_ON 110
#define ESP_EVT_REQ_P 111
#define ESP_EVT_STOP_P 112
#define ESP_BT_MODE_ON 113
#define ESP_GPIO_LC_DIAG0 114
#define ESP_GPIO_LC_DIAG1 115
#define ESP_GPIO_LC_DIAG2 116
#define ESP_CH 117
#define ESP_RX_WINDOW 118
#define ESP_UPDATE_RX 119
#define ESP_RX_STATUS 120
#define ESP_CLK_GPIO 121
#define ESP_NBT_BLE 122
#define ESP_CLK_OUT_OUT1 123
#define ESP_CLK_OUT_OUT2 124
#define ESP_CLK_OUT_OUT3 125
#define ESP_SPICS1_OUT 126
#define ESP_SIG_GPIO_OUT 128
#define ESP_GPIO_MAP_DATE 0x2006130
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_ESP32C3_GPIO_SIGMAP_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/esp32c3-gpio-sigmap.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,778 |
```objective-c
/*
*
*
* NOTE: Autogenerated file using esp_genpinctrl.py
*/
#ifndef INC_DT_BINDS_PINCTRL_ESP32S3_PINCTRL_HAL_H_
#define INC_DT_BINDS_PINCTRL_ESP32S3_PINCTRL_HAL_H_
/* I2C0_SCL */
#define I2C0_SCL_GPIO0 \
ESP32_PINMUX(0, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO1 \
ESP32_PINMUX(1, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO2 \
ESP32_PINMUX(2, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO3 \
ESP32_PINMUX(3, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO4 \
ESP32_PINMUX(4, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO5 \
ESP32_PINMUX(5, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO6 \
ESP32_PINMUX(6, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO7 \
ESP32_PINMUX(7, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO8 \
ESP32_PINMUX(8, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO9 \
ESP32_PINMUX(9, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO10 \
ESP32_PINMUX(10, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO11 \
ESP32_PINMUX(11, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO12 \
ESP32_PINMUX(12, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO13 \
ESP32_PINMUX(13, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO14 \
ESP32_PINMUX(14, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO15 \
ESP32_PINMUX(15, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO16 \
ESP32_PINMUX(16, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO17 \
ESP32_PINMUX(17, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO18 \
ESP32_PINMUX(18, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO19 \
ESP32_PINMUX(19, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO20 \
ESP32_PINMUX(20, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO21 \
ESP32_PINMUX(21, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO26 \
ESP32_PINMUX(26, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO27 \
ESP32_PINMUX(27, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO28 \
ESP32_PINMUX(28, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO29 \
ESP32_PINMUX(29, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO30 \
ESP32_PINMUX(30, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO31 \
ESP32_PINMUX(31, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO32 \
ESP32_PINMUX(32, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO33 \
ESP32_PINMUX(33, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO34 \
ESP32_PINMUX(34, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO35 \
ESP32_PINMUX(35, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO36 \
ESP32_PINMUX(36, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO37 \
ESP32_PINMUX(37, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO38 \
ESP32_PINMUX(38, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO39 \
ESP32_PINMUX(39, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO40 \
ESP32_PINMUX(40, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO41 \
ESP32_PINMUX(41, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO42 \
ESP32_PINMUX(42, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO43 \
ESP32_PINMUX(43, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO44 \
ESP32_PINMUX(44, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO45 \
ESP32_PINMUX(45, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO46 \
ESP32_PINMUX(46, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO47 \
ESP32_PINMUX(47, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO48 \
ESP32_PINMUX(48, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
/* I2C0_SDA */
#define I2C0_SDA_GPIO0 \
ESP32_PINMUX(0, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO1 \
ESP32_PINMUX(1, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO2 \
ESP32_PINMUX(2, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO3 \
ESP32_PINMUX(3, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO4 \
ESP32_PINMUX(4, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO5 \
ESP32_PINMUX(5, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO6 \
ESP32_PINMUX(6, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO7 \
ESP32_PINMUX(7, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO8 \
ESP32_PINMUX(8, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO9 \
ESP32_PINMUX(9, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO10 \
ESP32_PINMUX(10, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO11 \
ESP32_PINMUX(11, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO12 \
ESP32_PINMUX(12, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO13 \
ESP32_PINMUX(13, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO14 \
ESP32_PINMUX(14, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO15 \
ESP32_PINMUX(15, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO16 \
ESP32_PINMUX(16, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO17 \
ESP32_PINMUX(17, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO18 \
ESP32_PINMUX(18, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO19 \
ESP32_PINMUX(19, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO20 \
ESP32_PINMUX(20, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO21 \
ESP32_PINMUX(21, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO26 \
ESP32_PINMUX(26, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO27 \
ESP32_PINMUX(27, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO28 \
ESP32_PINMUX(28, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO29 \
ESP32_PINMUX(29, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO30 \
ESP32_PINMUX(30, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO31 \
ESP32_PINMUX(31, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO32 \
ESP32_PINMUX(32, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO33 \
ESP32_PINMUX(33, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO34 \
ESP32_PINMUX(34, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO35 \
ESP32_PINMUX(35, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO36 \
ESP32_PINMUX(36, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO37 \
ESP32_PINMUX(37, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO38 \
ESP32_PINMUX(38, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO39 \
ESP32_PINMUX(39, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO40 \
ESP32_PINMUX(40, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO41 \
ESP32_PINMUX(41, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO42 \
ESP32_PINMUX(42, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO43 \
ESP32_PINMUX(43, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO44 \
ESP32_PINMUX(44, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO45 \
ESP32_PINMUX(45, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO46 \
ESP32_PINMUX(46, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO47 \
ESP32_PINMUX(47, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO48 \
ESP32_PINMUX(48, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
/* I2C1_SCL */
#define I2C1_SCL_GPIO0 \
ESP32_PINMUX(0, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO1 \
ESP32_PINMUX(1, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO2 \
ESP32_PINMUX(2, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO3 \
ESP32_PINMUX(3, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO4 \
ESP32_PINMUX(4, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO5 \
ESP32_PINMUX(5, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO6 \
ESP32_PINMUX(6, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO7 \
ESP32_PINMUX(7, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO8 \
ESP32_PINMUX(8, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO9 \
ESP32_PINMUX(9, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO10 \
ESP32_PINMUX(10, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO11 \
ESP32_PINMUX(11, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO12 \
ESP32_PINMUX(12, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO13 \
ESP32_PINMUX(13, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO14 \
ESP32_PINMUX(14, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO15 \
ESP32_PINMUX(15, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO16 \
ESP32_PINMUX(16, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO17 \
ESP32_PINMUX(17, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO18 \
ESP32_PINMUX(18, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO19 \
ESP32_PINMUX(19, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO20 \
ESP32_PINMUX(20, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO21 \
ESP32_PINMUX(21, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO26 \
ESP32_PINMUX(26, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO27 \
ESP32_PINMUX(27, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO28 \
ESP32_PINMUX(28, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO29 \
ESP32_PINMUX(29, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO30 \
ESP32_PINMUX(30, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO31 \
ESP32_PINMUX(31, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO32 \
ESP32_PINMUX(32, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO33 \
ESP32_PINMUX(33, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO34 \
ESP32_PINMUX(34, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO35 \
ESP32_PINMUX(35, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO36 \
ESP32_PINMUX(36, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO37 \
ESP32_PINMUX(37, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO38 \
ESP32_PINMUX(38, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO39 \
ESP32_PINMUX(39, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO40 \
ESP32_PINMUX(40, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO41 \
ESP32_PINMUX(41, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO42 \
ESP32_PINMUX(42, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO43 \
ESP32_PINMUX(43, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO44 \
ESP32_PINMUX(44, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO45 \
ESP32_PINMUX(45, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO46 \
ESP32_PINMUX(46, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO47 \
ESP32_PINMUX(47, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO48 \
ESP32_PINMUX(48, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
/* I2C1_SDA */
#define I2C1_SDA_GPIO0 \
ESP32_PINMUX(0, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO1 \
ESP32_PINMUX(1, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO2 \
ESP32_PINMUX(2, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO3 \
ESP32_PINMUX(3, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO4 \
ESP32_PINMUX(4, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO5 \
ESP32_PINMUX(5, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO6 \
ESP32_PINMUX(6, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO7 \
ESP32_PINMUX(7, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO8 \
ESP32_PINMUX(8, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO9 \
ESP32_PINMUX(9, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO10 \
ESP32_PINMUX(10, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO11 \
ESP32_PINMUX(11, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO12 \
ESP32_PINMUX(12, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO13 \
ESP32_PINMUX(13, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO14 \
ESP32_PINMUX(14, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO15 \
ESP32_PINMUX(15, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO16 \
ESP32_PINMUX(16, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO17 \
ESP32_PINMUX(17, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO18 \
ESP32_PINMUX(18, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO19 \
ESP32_PINMUX(19, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO20 \
ESP32_PINMUX(20, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO21 \
ESP32_PINMUX(21, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO26 \
ESP32_PINMUX(26, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO27 \
ESP32_PINMUX(27, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO28 \
ESP32_PINMUX(28, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO29 \
ESP32_PINMUX(29, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO30 \
ESP32_PINMUX(30, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO31 \
ESP32_PINMUX(31, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO32 \
ESP32_PINMUX(32, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO33 \
ESP32_PINMUX(33, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO34 \
ESP32_PINMUX(34, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO35 \
ESP32_PINMUX(35, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO36 \
ESP32_PINMUX(36, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO37 \
ESP32_PINMUX(37, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO38 \
ESP32_PINMUX(38, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO39 \
ESP32_PINMUX(39, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO40 \
ESP32_PINMUX(40, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO41 \
ESP32_PINMUX(41, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO42 \
ESP32_PINMUX(42, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO43 \
ESP32_PINMUX(43, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO44 \
ESP32_PINMUX(44, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO45 \
ESP32_PINMUX(45, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO46 \
ESP32_PINMUX(46, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO47 \
ESP32_PINMUX(47, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO48 \
ESP32_PINMUX(48, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
/* LEDC_CH0 */
#define LEDC_CH0_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
/* LEDC_CH1 */
#define LEDC_CH1_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
/* LEDC_CH2 */
#define LEDC_CH2_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
/* LEDC_CH3 */
#define LEDC_CH3_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
/* LEDC_CH4 */
#define LEDC_CH4_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
/* LEDC_CH5 */
#define LEDC_CH5_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
/* LEDC_CH6 */
#define LEDC_CH6_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
/* LEDC_CH7 */
#define LEDC_CH7_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
/* MCPWM0_CAP0 */
#define MCPWM0_CAP0_GPIO0 \
ESP32_PINMUX(0, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO1 \
ESP32_PINMUX(1, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO2 \
ESP32_PINMUX(2, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO3 \
ESP32_PINMUX(3, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO4 \
ESP32_PINMUX(4, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO5 \
ESP32_PINMUX(5, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO6 \
ESP32_PINMUX(6, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO7 \
ESP32_PINMUX(7, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO8 \
ESP32_PINMUX(8, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO9 \
ESP32_PINMUX(9, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO10 \
ESP32_PINMUX(10, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO11 \
ESP32_PINMUX(11, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO12 \
ESP32_PINMUX(12, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO13 \
ESP32_PINMUX(13, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO14 \
ESP32_PINMUX(14, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO15 \
ESP32_PINMUX(15, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO16 \
ESP32_PINMUX(16, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO17 \
ESP32_PINMUX(17, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO18 \
ESP32_PINMUX(18, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO19 \
ESP32_PINMUX(19, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO20 \
ESP32_PINMUX(20, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO21 \
ESP32_PINMUX(21, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO26 \
ESP32_PINMUX(26, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO27 \
ESP32_PINMUX(27, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO28 \
ESP32_PINMUX(28, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO29 \
ESP32_PINMUX(29, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO30 \
ESP32_PINMUX(30, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO31 \
ESP32_PINMUX(31, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO32 \
ESP32_PINMUX(32, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO33 \
ESP32_PINMUX(33, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO34 \
ESP32_PINMUX(34, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO35 \
ESP32_PINMUX(35, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO36 \
ESP32_PINMUX(36, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO37 \
ESP32_PINMUX(37, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO38 \
ESP32_PINMUX(38, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO39 \
ESP32_PINMUX(39, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO40 \
ESP32_PINMUX(40, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO41 \
ESP32_PINMUX(41, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO42 \
ESP32_PINMUX(42, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO43 \
ESP32_PINMUX(43, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO44 \
ESP32_PINMUX(44, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO45 \
ESP32_PINMUX(45, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO46 \
ESP32_PINMUX(46, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO47 \
ESP32_PINMUX(47, ESP_PWM0_CAP0_IN, ESP_NOSIG)
#define MCPWM0_CAP0_GPIO48 \
ESP32_PINMUX(48, ESP_PWM0_CAP0_IN, ESP_NOSIG)
/* MCPWM0_CAP1 */
#define MCPWM0_CAP1_GPIO0 \
ESP32_PINMUX(0, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO1 \
ESP32_PINMUX(1, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO2 \
ESP32_PINMUX(2, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO3 \
ESP32_PINMUX(3, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO4 \
ESP32_PINMUX(4, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO5 \
ESP32_PINMUX(5, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO6 \
ESP32_PINMUX(6, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO7 \
ESP32_PINMUX(7, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO8 \
ESP32_PINMUX(8, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO9 \
ESP32_PINMUX(9, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO10 \
ESP32_PINMUX(10, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO11 \
ESP32_PINMUX(11, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO12 \
ESP32_PINMUX(12, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO13 \
ESP32_PINMUX(13, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO14 \
ESP32_PINMUX(14, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO15 \
ESP32_PINMUX(15, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO16 \
ESP32_PINMUX(16, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO17 \
ESP32_PINMUX(17, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO18 \
ESP32_PINMUX(18, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO19 \
ESP32_PINMUX(19, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO20 \
ESP32_PINMUX(20, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO21 \
ESP32_PINMUX(21, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO26 \
ESP32_PINMUX(26, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO27 \
ESP32_PINMUX(27, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO28 \
ESP32_PINMUX(28, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO29 \
ESP32_PINMUX(29, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO30 \
ESP32_PINMUX(30, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO31 \
ESP32_PINMUX(31, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO32 \
ESP32_PINMUX(32, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO33 \
ESP32_PINMUX(33, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO34 \
ESP32_PINMUX(34, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO35 \
ESP32_PINMUX(35, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO36 \
ESP32_PINMUX(36, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO37 \
ESP32_PINMUX(37, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO38 \
ESP32_PINMUX(38, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO39 \
ESP32_PINMUX(39, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO40 \
ESP32_PINMUX(40, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO41 \
ESP32_PINMUX(41, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO42 \
ESP32_PINMUX(42, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO43 \
ESP32_PINMUX(43, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO44 \
ESP32_PINMUX(44, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO45 \
ESP32_PINMUX(45, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO46 \
ESP32_PINMUX(46, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO47 \
ESP32_PINMUX(47, ESP_PWM0_CAP1_IN, ESP_NOSIG)
#define MCPWM0_CAP1_GPIO48 \
ESP32_PINMUX(48, ESP_PWM0_CAP1_IN, ESP_NOSIG)
/* MCPWM0_CAP2 */
#define MCPWM0_CAP2_GPIO0 \
ESP32_PINMUX(0, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO1 \
ESP32_PINMUX(1, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO2 \
ESP32_PINMUX(2, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO3 \
ESP32_PINMUX(3, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO4 \
ESP32_PINMUX(4, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO5 \
ESP32_PINMUX(5, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO6 \
ESP32_PINMUX(6, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO7 \
ESP32_PINMUX(7, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO8 \
ESP32_PINMUX(8, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO9 \
ESP32_PINMUX(9, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO10 \
ESP32_PINMUX(10, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO11 \
ESP32_PINMUX(11, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO12 \
ESP32_PINMUX(12, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO13 \
ESP32_PINMUX(13, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO14 \
ESP32_PINMUX(14, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO15 \
ESP32_PINMUX(15, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO16 \
ESP32_PINMUX(16, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO17 \
ESP32_PINMUX(17, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO18 \
ESP32_PINMUX(18, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO19 \
ESP32_PINMUX(19, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO20 \
ESP32_PINMUX(20, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO21 \
ESP32_PINMUX(21, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO26 \
ESP32_PINMUX(26, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO27 \
ESP32_PINMUX(27, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO28 \
ESP32_PINMUX(28, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO29 \
ESP32_PINMUX(29, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO30 \
ESP32_PINMUX(30, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO31 \
ESP32_PINMUX(31, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO32 \
ESP32_PINMUX(32, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO33 \
ESP32_PINMUX(33, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO34 \
ESP32_PINMUX(34, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO35 \
ESP32_PINMUX(35, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO36 \
ESP32_PINMUX(36, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO37 \
ESP32_PINMUX(37, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO38 \
ESP32_PINMUX(38, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO39 \
ESP32_PINMUX(39, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO40 \
ESP32_PINMUX(40, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO41 \
ESP32_PINMUX(41, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO42 \
ESP32_PINMUX(42, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO43 \
ESP32_PINMUX(43, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO44 \
ESP32_PINMUX(44, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO45 \
ESP32_PINMUX(45, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO46 \
ESP32_PINMUX(46, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO47 \
ESP32_PINMUX(47, ESP_PWM0_CAP2_IN, ESP_NOSIG)
#define MCPWM0_CAP2_GPIO48 \
ESP32_PINMUX(48, ESP_PWM0_CAP2_IN, ESP_NOSIG)
/* MCPWM0_FAULT0 */
#define MCPWM0_FAULT0_GPIO0 \
ESP32_PINMUX(0, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO1 \
ESP32_PINMUX(1, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO2 \
ESP32_PINMUX(2, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO3 \
ESP32_PINMUX(3, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO4 \
ESP32_PINMUX(4, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO5 \
ESP32_PINMUX(5, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO6 \
ESP32_PINMUX(6, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO7 \
ESP32_PINMUX(7, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO8 \
ESP32_PINMUX(8, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO9 \
ESP32_PINMUX(9, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO10 \
ESP32_PINMUX(10, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO11 \
ESP32_PINMUX(11, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO12 \
ESP32_PINMUX(12, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO13 \
ESP32_PINMUX(13, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO14 \
ESP32_PINMUX(14, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO15 \
ESP32_PINMUX(15, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO16 \
ESP32_PINMUX(16, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO17 \
ESP32_PINMUX(17, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO18 \
ESP32_PINMUX(18, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO19 \
ESP32_PINMUX(19, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO20 \
ESP32_PINMUX(20, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO21 \
ESP32_PINMUX(21, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO26 \
ESP32_PINMUX(26, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO27 \
ESP32_PINMUX(27, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO28 \
ESP32_PINMUX(28, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO29 \
ESP32_PINMUX(29, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO30 \
ESP32_PINMUX(30, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO31 \
ESP32_PINMUX(31, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO32 \
ESP32_PINMUX(32, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO33 \
ESP32_PINMUX(33, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO34 \
ESP32_PINMUX(34, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO35 \
ESP32_PINMUX(35, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO36 \
ESP32_PINMUX(36, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO37 \
ESP32_PINMUX(37, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO38 \
ESP32_PINMUX(38, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO39 \
ESP32_PINMUX(39, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO40 \
ESP32_PINMUX(40, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO41 \
ESP32_PINMUX(41, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO42 \
ESP32_PINMUX(42, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO43 \
ESP32_PINMUX(43, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO44 \
ESP32_PINMUX(44, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO45 \
ESP32_PINMUX(45, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO46 \
ESP32_PINMUX(46, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO47 \
ESP32_PINMUX(47, ESP_PWM0_F0_IN, ESP_NOSIG)
#define MCPWM0_FAULT0_GPIO48 \
ESP32_PINMUX(48, ESP_PWM0_F0_IN, ESP_NOSIG)
/* MCPWM0_FAULT1 */
#define MCPWM0_FAULT1_GPIO0 \
ESP32_PINMUX(0, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO1 \
ESP32_PINMUX(1, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO2 \
ESP32_PINMUX(2, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO3 \
ESP32_PINMUX(3, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO4 \
ESP32_PINMUX(4, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO5 \
ESP32_PINMUX(5, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO6 \
ESP32_PINMUX(6, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO7 \
ESP32_PINMUX(7, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO8 \
ESP32_PINMUX(8, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO9 \
ESP32_PINMUX(9, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO10 \
ESP32_PINMUX(10, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO11 \
ESP32_PINMUX(11, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO12 \
ESP32_PINMUX(12, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO13 \
ESP32_PINMUX(13, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO14 \
ESP32_PINMUX(14, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO15 \
ESP32_PINMUX(15, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO16 \
ESP32_PINMUX(16, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO17 \
ESP32_PINMUX(17, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO18 \
ESP32_PINMUX(18, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO19 \
ESP32_PINMUX(19, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO20 \
ESP32_PINMUX(20, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO21 \
ESP32_PINMUX(21, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO26 \
ESP32_PINMUX(26, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO27 \
ESP32_PINMUX(27, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO28 \
ESP32_PINMUX(28, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO29 \
ESP32_PINMUX(29, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO30 \
ESP32_PINMUX(30, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO31 \
ESP32_PINMUX(31, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO32 \
ESP32_PINMUX(32, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO33 \
ESP32_PINMUX(33, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO34 \
ESP32_PINMUX(34, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO35 \
ESP32_PINMUX(35, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO36 \
ESP32_PINMUX(36, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO37 \
ESP32_PINMUX(37, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO38 \
ESP32_PINMUX(38, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO39 \
ESP32_PINMUX(39, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO40 \
ESP32_PINMUX(40, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO41 \
ESP32_PINMUX(41, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO42 \
ESP32_PINMUX(42, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO43 \
ESP32_PINMUX(43, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO44 \
ESP32_PINMUX(44, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO45 \
ESP32_PINMUX(45, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO46 \
ESP32_PINMUX(46, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO47 \
ESP32_PINMUX(47, ESP_PWM0_F1_IN, ESP_NOSIG)
#define MCPWM0_FAULT1_GPIO48 \
ESP32_PINMUX(48, ESP_PWM0_F1_IN, ESP_NOSIG)
/* MCPWM0_FAULT2 */
#define MCPWM0_FAULT2_GPIO0 \
ESP32_PINMUX(0, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO1 \
ESP32_PINMUX(1, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO2 \
ESP32_PINMUX(2, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO3 \
ESP32_PINMUX(3, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO4 \
ESP32_PINMUX(4, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO5 \
ESP32_PINMUX(5, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO6 \
ESP32_PINMUX(6, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO7 \
ESP32_PINMUX(7, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO8 \
ESP32_PINMUX(8, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO9 \
ESP32_PINMUX(9, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO10 \
ESP32_PINMUX(10, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO11 \
ESP32_PINMUX(11, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO12 \
ESP32_PINMUX(12, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO13 \
ESP32_PINMUX(13, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO14 \
ESP32_PINMUX(14, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO15 \
ESP32_PINMUX(15, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO16 \
ESP32_PINMUX(16, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO17 \
ESP32_PINMUX(17, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO18 \
ESP32_PINMUX(18, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO19 \
ESP32_PINMUX(19, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO20 \
ESP32_PINMUX(20, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO21 \
ESP32_PINMUX(21, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO26 \
ESP32_PINMUX(26, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO27 \
ESP32_PINMUX(27, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO28 \
ESP32_PINMUX(28, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO29 \
ESP32_PINMUX(29, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO30 \
ESP32_PINMUX(30, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO31 \
ESP32_PINMUX(31, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO32 \
ESP32_PINMUX(32, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO33 \
ESP32_PINMUX(33, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO34 \
ESP32_PINMUX(34, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO35 \
ESP32_PINMUX(35, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO36 \
ESP32_PINMUX(36, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO37 \
ESP32_PINMUX(37, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO38 \
ESP32_PINMUX(38, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO39 \
ESP32_PINMUX(39, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO40 \
ESP32_PINMUX(40, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO41 \
ESP32_PINMUX(41, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO42 \
ESP32_PINMUX(42, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO43 \
ESP32_PINMUX(43, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO44 \
ESP32_PINMUX(44, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO45 \
ESP32_PINMUX(45, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO46 \
ESP32_PINMUX(46, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO47 \
ESP32_PINMUX(47, ESP_PWM0_F2_IN, ESP_NOSIG)
#define MCPWM0_FAULT2_GPIO48 \
ESP32_PINMUX(48, ESP_PWM0_F2_IN, ESP_NOSIG)
/* MCPWM0_OUT0A */
#define MCPWM0_OUT0A_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_PWM0_OUT0A)
#define MCPWM0_OUT0A_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_PWM0_OUT0A)
/* MCPWM0_OUT0B */
#define MCPWM0_OUT0B_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_PWM0_OUT0B)
#define MCPWM0_OUT0B_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_PWM0_OUT0B)
/* MCPWM0_OUT1A */
#define MCPWM0_OUT1A_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_PWM0_OUT1A)
#define MCPWM0_OUT1A_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_PWM0_OUT1A)
/* MCPWM0_OUT1B */
#define MCPWM0_OUT1B_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_PWM0_OUT1B)
#define MCPWM0_OUT1B_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_PWM0_OUT1B)
/* MCPWM0_OUT2A */
#define MCPWM0_OUT2A_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_PWM0_OUT2A)
#define MCPWM0_OUT2A_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_PWM0_OUT2A)
/* MCPWM0_OUT2B */
#define MCPWM0_OUT2B_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_PWM0_OUT2B)
#define MCPWM0_OUT2B_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_PWM0_OUT2B)
/* MCPWM0_SYNC0 */
#define MCPWM0_SYNC0_GPIO0 \
ESP32_PINMUX(0, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO1 \
ESP32_PINMUX(1, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO2 \
ESP32_PINMUX(2, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO3 \
ESP32_PINMUX(3, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO4 \
ESP32_PINMUX(4, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO5 \
ESP32_PINMUX(5, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO6 \
ESP32_PINMUX(6, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO7 \
ESP32_PINMUX(7, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO8 \
ESP32_PINMUX(8, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO9 \
ESP32_PINMUX(9, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO10 \
ESP32_PINMUX(10, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO11 \
ESP32_PINMUX(11, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO12 \
ESP32_PINMUX(12, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO13 \
ESP32_PINMUX(13, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO14 \
ESP32_PINMUX(14, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO15 \
ESP32_PINMUX(15, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO16 \
ESP32_PINMUX(16, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO17 \
ESP32_PINMUX(17, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO18 \
ESP32_PINMUX(18, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO19 \
ESP32_PINMUX(19, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO20 \
ESP32_PINMUX(20, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO21 \
ESP32_PINMUX(21, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO26 \
ESP32_PINMUX(26, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO27 \
ESP32_PINMUX(27, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO28 \
ESP32_PINMUX(28, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO29 \
ESP32_PINMUX(29, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO30 \
ESP32_PINMUX(30, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO31 \
ESP32_PINMUX(31, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO32 \
ESP32_PINMUX(32, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO33 \
ESP32_PINMUX(33, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO34 \
ESP32_PINMUX(34, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO35 \
ESP32_PINMUX(35, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO36 \
ESP32_PINMUX(36, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO37 \
ESP32_PINMUX(37, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO38 \
ESP32_PINMUX(38, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO39 \
ESP32_PINMUX(39, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO40 \
ESP32_PINMUX(40, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO41 \
ESP32_PINMUX(41, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO42 \
ESP32_PINMUX(42, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO43 \
ESP32_PINMUX(43, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO44 \
ESP32_PINMUX(44, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO45 \
ESP32_PINMUX(45, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO46 \
ESP32_PINMUX(46, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO47 \
ESP32_PINMUX(47, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
#define MCPWM0_SYNC0_GPIO48 \
ESP32_PINMUX(48, ESP_PWM0_SYNC0_IN, ESP_NOSIG)
/* MCPWM0_SYNC1 */
#define MCPWM0_SYNC1_GPIO0 \
ESP32_PINMUX(0, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO1 \
ESP32_PINMUX(1, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO2 \
ESP32_PINMUX(2, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO3 \
ESP32_PINMUX(3, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO4 \
ESP32_PINMUX(4, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO5 \
ESP32_PINMUX(5, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO6 \
ESP32_PINMUX(6, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO7 \
ESP32_PINMUX(7, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO8 \
ESP32_PINMUX(8, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO9 \
ESP32_PINMUX(9, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO10 \
ESP32_PINMUX(10, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO11 \
ESP32_PINMUX(11, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO12 \
ESP32_PINMUX(12, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO13 \
ESP32_PINMUX(13, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO14 \
ESP32_PINMUX(14, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO15 \
ESP32_PINMUX(15, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO16 \
ESP32_PINMUX(16, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO17 \
ESP32_PINMUX(17, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO18 \
ESP32_PINMUX(18, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO19 \
ESP32_PINMUX(19, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO20 \
ESP32_PINMUX(20, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO21 \
ESP32_PINMUX(21, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO26 \
ESP32_PINMUX(26, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO27 \
ESP32_PINMUX(27, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO28 \
ESP32_PINMUX(28, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO29 \
ESP32_PINMUX(29, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO30 \
ESP32_PINMUX(30, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO31 \
ESP32_PINMUX(31, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO32 \
ESP32_PINMUX(32, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO33 \
ESP32_PINMUX(33, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO34 \
ESP32_PINMUX(34, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO35 \
ESP32_PINMUX(35, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO36 \
ESP32_PINMUX(36, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO37 \
ESP32_PINMUX(37, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO38 \
ESP32_PINMUX(38, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO39 \
ESP32_PINMUX(39, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO40 \
ESP32_PINMUX(40, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO41 \
ESP32_PINMUX(41, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO42 \
ESP32_PINMUX(42, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO43 \
ESP32_PINMUX(43, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO44 \
ESP32_PINMUX(44, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO45 \
ESP32_PINMUX(45, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO46 \
ESP32_PINMUX(46, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO47 \
ESP32_PINMUX(47, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
#define MCPWM0_SYNC1_GPIO48 \
ESP32_PINMUX(48, ESP_PWM0_SYNC1_IN, ESP_NOSIG)
/* MCPWM0_SYNC2 */
#define MCPWM0_SYNC2_GPIO0 \
ESP32_PINMUX(0, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO1 \
ESP32_PINMUX(1, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO2 \
ESP32_PINMUX(2, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO3 \
ESP32_PINMUX(3, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO4 \
ESP32_PINMUX(4, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO5 \
ESP32_PINMUX(5, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO6 \
ESP32_PINMUX(6, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO7 \
ESP32_PINMUX(7, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO8 \
ESP32_PINMUX(8, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO9 \
ESP32_PINMUX(9, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO10 \
ESP32_PINMUX(10, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO11 \
ESP32_PINMUX(11, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO12 \
ESP32_PINMUX(12, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO13 \
ESP32_PINMUX(13, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO14 \
ESP32_PINMUX(14, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO15 \
ESP32_PINMUX(15, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO16 \
ESP32_PINMUX(16, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO17 \
ESP32_PINMUX(17, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO18 \
ESP32_PINMUX(18, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO19 \
ESP32_PINMUX(19, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO20 \
ESP32_PINMUX(20, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO21 \
ESP32_PINMUX(21, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO26 \
ESP32_PINMUX(26, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO27 \
ESP32_PINMUX(27, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO28 \
ESP32_PINMUX(28, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO29 \
ESP32_PINMUX(29, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO30 \
ESP32_PINMUX(30, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO31 \
ESP32_PINMUX(31, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO32 \
ESP32_PINMUX(32, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO33 \
ESP32_PINMUX(33, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO34 \
ESP32_PINMUX(34, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO35 \
ESP32_PINMUX(35, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO36 \
ESP32_PINMUX(36, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO37 \
ESP32_PINMUX(37, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO38 \
ESP32_PINMUX(38, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO39 \
ESP32_PINMUX(39, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO40 \
ESP32_PINMUX(40, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO41 \
ESP32_PINMUX(41, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO42 \
ESP32_PINMUX(42, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO43 \
ESP32_PINMUX(43, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO44 \
ESP32_PINMUX(44, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO45 \
ESP32_PINMUX(45, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO46 \
ESP32_PINMUX(46, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO47 \
ESP32_PINMUX(47, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
#define MCPWM0_SYNC2_GPIO48 \
ESP32_PINMUX(48, ESP_PWM0_SYNC2_IN, ESP_NOSIG)
/* MCPWM1_CAP0 */
#define MCPWM1_CAP0_GPIO0 \
ESP32_PINMUX(0, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO1 \
ESP32_PINMUX(1, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO2 \
ESP32_PINMUX(2, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO3 \
ESP32_PINMUX(3, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO4 \
ESP32_PINMUX(4, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO5 \
ESP32_PINMUX(5, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO6 \
ESP32_PINMUX(6, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO7 \
ESP32_PINMUX(7, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO8 \
ESP32_PINMUX(8, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO9 \
ESP32_PINMUX(9, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO10 \
ESP32_PINMUX(10, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO11 \
ESP32_PINMUX(11, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO12 \
ESP32_PINMUX(12, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO13 \
ESP32_PINMUX(13, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO14 \
ESP32_PINMUX(14, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO15 \
ESP32_PINMUX(15, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO16 \
ESP32_PINMUX(16, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO17 \
ESP32_PINMUX(17, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO18 \
ESP32_PINMUX(18, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO19 \
ESP32_PINMUX(19, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO20 \
ESP32_PINMUX(20, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO21 \
ESP32_PINMUX(21, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO26 \
ESP32_PINMUX(26, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO27 \
ESP32_PINMUX(27, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO28 \
ESP32_PINMUX(28, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO29 \
ESP32_PINMUX(29, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO30 \
ESP32_PINMUX(30, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO31 \
ESP32_PINMUX(31, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO32 \
ESP32_PINMUX(32, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO33 \
ESP32_PINMUX(33, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO34 \
ESP32_PINMUX(34, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO35 \
ESP32_PINMUX(35, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO36 \
ESP32_PINMUX(36, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO37 \
ESP32_PINMUX(37, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO38 \
ESP32_PINMUX(38, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO39 \
ESP32_PINMUX(39, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO40 \
ESP32_PINMUX(40, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO41 \
ESP32_PINMUX(41, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO42 \
ESP32_PINMUX(42, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO43 \
ESP32_PINMUX(43, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO44 \
ESP32_PINMUX(44, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO45 \
ESP32_PINMUX(45, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO46 \
ESP32_PINMUX(46, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO47 \
ESP32_PINMUX(47, ESP_PWM1_CAP0_IN, ESP_NOSIG)
#define MCPWM1_CAP0_GPIO48 \
ESP32_PINMUX(48, ESP_PWM1_CAP0_IN, ESP_NOSIG)
/* MCPWM1_CAP1 */
#define MCPWM1_CAP1_GPIO0 \
ESP32_PINMUX(0, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO1 \
ESP32_PINMUX(1, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO2 \
ESP32_PINMUX(2, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO3 \
ESP32_PINMUX(3, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO4 \
ESP32_PINMUX(4, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO5 \
ESP32_PINMUX(5, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO6 \
ESP32_PINMUX(6, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO7 \
ESP32_PINMUX(7, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO8 \
ESP32_PINMUX(8, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO9 \
ESP32_PINMUX(9, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO10 \
ESP32_PINMUX(10, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO11 \
ESP32_PINMUX(11, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO12 \
ESP32_PINMUX(12, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO13 \
ESP32_PINMUX(13, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO14 \
ESP32_PINMUX(14, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO15 \
ESP32_PINMUX(15, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO16 \
ESP32_PINMUX(16, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO17 \
ESP32_PINMUX(17, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO18 \
ESP32_PINMUX(18, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO19 \
ESP32_PINMUX(19, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO20 \
ESP32_PINMUX(20, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO21 \
ESP32_PINMUX(21, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO26 \
ESP32_PINMUX(26, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO27 \
ESP32_PINMUX(27, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO28 \
ESP32_PINMUX(28, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO29 \
ESP32_PINMUX(29, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO30 \
ESP32_PINMUX(30, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO31 \
ESP32_PINMUX(31, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO32 \
ESP32_PINMUX(32, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO33 \
ESP32_PINMUX(33, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO34 \
ESP32_PINMUX(34, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO35 \
ESP32_PINMUX(35, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO36 \
ESP32_PINMUX(36, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO37 \
ESP32_PINMUX(37, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO38 \
ESP32_PINMUX(38, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO39 \
ESP32_PINMUX(39, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO40 \
ESP32_PINMUX(40, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO41 \
ESP32_PINMUX(41, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO42 \
ESP32_PINMUX(42, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO43 \
ESP32_PINMUX(43, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO44 \
ESP32_PINMUX(44, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO45 \
ESP32_PINMUX(45, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO46 \
ESP32_PINMUX(46, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO47 \
ESP32_PINMUX(47, ESP_PWM1_CAP1_IN, ESP_NOSIG)
#define MCPWM1_CAP1_GPIO48 \
ESP32_PINMUX(48, ESP_PWM1_CAP1_IN, ESP_NOSIG)
/* MCPWM1_CAP2 */
#define MCPWM1_CAP2_GPIO0 \
ESP32_PINMUX(0, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO1 \
ESP32_PINMUX(1, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO2 \
ESP32_PINMUX(2, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO3 \
ESP32_PINMUX(3, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO4 \
ESP32_PINMUX(4, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO5 \
ESP32_PINMUX(5, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO6 \
ESP32_PINMUX(6, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO7 \
ESP32_PINMUX(7, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO8 \
ESP32_PINMUX(8, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO9 \
ESP32_PINMUX(9, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO10 \
ESP32_PINMUX(10, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO11 \
ESP32_PINMUX(11, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO12 \
ESP32_PINMUX(12, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO13 \
ESP32_PINMUX(13, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO14 \
ESP32_PINMUX(14, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO15 \
ESP32_PINMUX(15, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO16 \
ESP32_PINMUX(16, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO17 \
ESP32_PINMUX(17, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO18 \
ESP32_PINMUX(18, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO19 \
ESP32_PINMUX(19, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO20 \
ESP32_PINMUX(20, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO21 \
ESP32_PINMUX(21, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO26 \
ESP32_PINMUX(26, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO27 \
ESP32_PINMUX(27, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO28 \
ESP32_PINMUX(28, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO29 \
ESP32_PINMUX(29, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO30 \
ESP32_PINMUX(30, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO31 \
ESP32_PINMUX(31, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO32 \
ESP32_PINMUX(32, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO33 \
ESP32_PINMUX(33, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO34 \
ESP32_PINMUX(34, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO35 \
ESP32_PINMUX(35, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO36 \
ESP32_PINMUX(36, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO37 \
ESP32_PINMUX(37, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO38 \
ESP32_PINMUX(38, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO39 \
ESP32_PINMUX(39, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO40 \
ESP32_PINMUX(40, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO41 \
ESP32_PINMUX(41, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO42 \
ESP32_PINMUX(42, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO43 \
ESP32_PINMUX(43, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO44 \
ESP32_PINMUX(44, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO45 \
ESP32_PINMUX(45, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO46 \
ESP32_PINMUX(46, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO47 \
ESP32_PINMUX(47, ESP_PWM1_CAP2_IN, ESP_NOSIG)
#define MCPWM1_CAP2_GPIO48 \
ESP32_PINMUX(48, ESP_PWM1_CAP2_IN, ESP_NOSIG)
/* MCPWM1_FAULT0 */
#define MCPWM1_FAULT0_GPIO0 \
ESP32_PINMUX(0, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO1 \
ESP32_PINMUX(1, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO2 \
ESP32_PINMUX(2, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO3 \
ESP32_PINMUX(3, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO4 \
ESP32_PINMUX(4, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO5 \
ESP32_PINMUX(5, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO6 \
ESP32_PINMUX(6, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO7 \
ESP32_PINMUX(7, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO8 \
ESP32_PINMUX(8, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO9 \
ESP32_PINMUX(9, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO10 \
ESP32_PINMUX(10, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO11 \
ESP32_PINMUX(11, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO12 \
ESP32_PINMUX(12, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO13 \
ESP32_PINMUX(13, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO14 \
ESP32_PINMUX(14, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO15 \
ESP32_PINMUX(15, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO16 \
ESP32_PINMUX(16, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO17 \
ESP32_PINMUX(17, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO18 \
ESP32_PINMUX(18, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO19 \
ESP32_PINMUX(19, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO20 \
ESP32_PINMUX(20, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO21 \
ESP32_PINMUX(21, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO26 \
ESP32_PINMUX(26, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO27 \
ESP32_PINMUX(27, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO28 \
ESP32_PINMUX(28, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO29 \
ESP32_PINMUX(29, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO30 \
ESP32_PINMUX(30, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO31 \
ESP32_PINMUX(31, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO32 \
ESP32_PINMUX(32, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO33 \
ESP32_PINMUX(33, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO34 \
ESP32_PINMUX(34, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO35 \
ESP32_PINMUX(35, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO36 \
ESP32_PINMUX(36, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO37 \
ESP32_PINMUX(37, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO38 \
ESP32_PINMUX(38, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO39 \
ESP32_PINMUX(39, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO40 \
ESP32_PINMUX(40, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO41 \
ESP32_PINMUX(41, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO42 \
ESP32_PINMUX(42, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO43 \
ESP32_PINMUX(43, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO44 \
ESP32_PINMUX(44, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO45 \
ESP32_PINMUX(45, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO46 \
ESP32_PINMUX(46, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO47 \
ESP32_PINMUX(47, ESP_PWM1_F0_IN, ESP_NOSIG)
#define MCPWM1_FAULT0_GPIO48 \
ESP32_PINMUX(48, ESP_PWM1_F0_IN, ESP_NOSIG)
/* MCPWM1_FAULT1 */
#define MCPWM1_FAULT1_GPIO0 \
ESP32_PINMUX(0, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO1 \
ESP32_PINMUX(1, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO2 \
ESP32_PINMUX(2, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO3 \
ESP32_PINMUX(3, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO4 \
ESP32_PINMUX(4, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO5 \
ESP32_PINMUX(5, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO6 \
ESP32_PINMUX(6, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO7 \
ESP32_PINMUX(7, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO8 \
ESP32_PINMUX(8, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO9 \
ESP32_PINMUX(9, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO10 \
ESP32_PINMUX(10, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO11 \
ESP32_PINMUX(11, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO12 \
ESP32_PINMUX(12, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO13 \
ESP32_PINMUX(13, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO14 \
ESP32_PINMUX(14, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO15 \
ESP32_PINMUX(15, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO16 \
ESP32_PINMUX(16, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO17 \
ESP32_PINMUX(17, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO18 \
ESP32_PINMUX(18, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO19 \
ESP32_PINMUX(19, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO20 \
ESP32_PINMUX(20, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO21 \
ESP32_PINMUX(21, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO26 \
ESP32_PINMUX(26, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO27 \
ESP32_PINMUX(27, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO28 \
ESP32_PINMUX(28, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO29 \
ESP32_PINMUX(29, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO30 \
ESP32_PINMUX(30, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO31 \
ESP32_PINMUX(31, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO32 \
ESP32_PINMUX(32, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO33 \
ESP32_PINMUX(33, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO34 \
ESP32_PINMUX(34, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO35 \
ESP32_PINMUX(35, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO36 \
ESP32_PINMUX(36, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO37 \
ESP32_PINMUX(37, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO38 \
ESP32_PINMUX(38, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO39 \
ESP32_PINMUX(39, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO40 \
ESP32_PINMUX(40, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO41 \
ESP32_PINMUX(41, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO42 \
ESP32_PINMUX(42, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO43 \
ESP32_PINMUX(43, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO44 \
ESP32_PINMUX(44, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO45 \
ESP32_PINMUX(45, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO46 \
ESP32_PINMUX(46, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO47 \
ESP32_PINMUX(47, ESP_PWM1_F1_IN, ESP_NOSIG)
#define MCPWM1_FAULT1_GPIO48 \
ESP32_PINMUX(48, ESP_PWM1_F1_IN, ESP_NOSIG)
/* MCPWM1_FAULT2 */
#define MCPWM1_FAULT2_GPIO0 \
ESP32_PINMUX(0, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO1 \
ESP32_PINMUX(1, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO2 \
ESP32_PINMUX(2, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO3 \
ESP32_PINMUX(3, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO4 \
ESP32_PINMUX(4, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO5 \
ESP32_PINMUX(5, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO6 \
ESP32_PINMUX(6, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO7 \
ESP32_PINMUX(7, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO8 \
ESP32_PINMUX(8, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO9 \
ESP32_PINMUX(9, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO10 \
ESP32_PINMUX(10, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO11 \
ESP32_PINMUX(11, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO12 \
ESP32_PINMUX(12, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO13 \
ESP32_PINMUX(13, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO14 \
ESP32_PINMUX(14, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO15 \
ESP32_PINMUX(15, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO16 \
ESP32_PINMUX(16, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO17 \
ESP32_PINMUX(17, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO18 \
ESP32_PINMUX(18, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO19 \
ESP32_PINMUX(19, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO20 \
ESP32_PINMUX(20, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO21 \
ESP32_PINMUX(21, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO26 \
ESP32_PINMUX(26, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO27 \
ESP32_PINMUX(27, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO28 \
ESP32_PINMUX(28, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO29 \
ESP32_PINMUX(29, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO30 \
ESP32_PINMUX(30, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO31 \
ESP32_PINMUX(31, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO32 \
ESP32_PINMUX(32, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO33 \
ESP32_PINMUX(33, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO34 \
ESP32_PINMUX(34, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO35 \
ESP32_PINMUX(35, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO36 \
ESP32_PINMUX(36, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO37 \
ESP32_PINMUX(37, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO38 \
ESP32_PINMUX(38, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO39 \
ESP32_PINMUX(39, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO40 \
ESP32_PINMUX(40, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO41 \
ESP32_PINMUX(41, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO42 \
ESP32_PINMUX(42, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO43 \
ESP32_PINMUX(43, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO44 \
ESP32_PINMUX(44, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO45 \
ESP32_PINMUX(45, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO46 \
ESP32_PINMUX(46, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO47 \
ESP32_PINMUX(47, ESP_PWM1_F2_IN, ESP_NOSIG)
#define MCPWM1_FAULT2_GPIO48 \
ESP32_PINMUX(48, ESP_PWM1_F2_IN, ESP_NOSIG)
/* MCPWM1_OUT0A */
#define MCPWM1_OUT0A_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_PWM1_OUT0A)
#define MCPWM1_OUT0A_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_PWM1_OUT0A)
/* MCPWM1_OUT0B */
#define MCPWM1_OUT0B_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_PWM1_OUT0B)
#define MCPWM1_OUT0B_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_PWM1_OUT0B)
/* MCPWM1_OUT1A */
#define MCPWM1_OUT1A_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_PWM1_OUT1A)
#define MCPWM1_OUT1A_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_PWM1_OUT1A)
/* MCPWM1_OUT1B */
#define MCPWM1_OUT1B_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_PWM1_OUT1B)
#define MCPWM1_OUT1B_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_PWM1_OUT1B)
/* MCPWM1_OUT2A */
#define MCPWM1_OUT2A_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_PWM1_OUT2A)
#define MCPWM1_OUT2A_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_PWM1_OUT2A)
/* MCPWM1_OUT2B */
#define MCPWM1_OUT2B_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_PWM1_OUT2B)
#define MCPWM1_OUT2B_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_PWM1_OUT2B)
/* MCPWM1_SYNC0 */
#define MCPWM1_SYNC0_GPIO0 \
ESP32_PINMUX(0, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO1 \
ESP32_PINMUX(1, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO2 \
ESP32_PINMUX(2, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO3 \
ESP32_PINMUX(3, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO4 \
ESP32_PINMUX(4, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO5 \
ESP32_PINMUX(5, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO6 \
ESP32_PINMUX(6, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO7 \
ESP32_PINMUX(7, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO8 \
ESP32_PINMUX(8, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO9 \
ESP32_PINMUX(9, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO10 \
ESP32_PINMUX(10, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO11 \
ESP32_PINMUX(11, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO12 \
ESP32_PINMUX(12, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO13 \
ESP32_PINMUX(13, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO14 \
ESP32_PINMUX(14, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO15 \
ESP32_PINMUX(15, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO16 \
ESP32_PINMUX(16, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO17 \
ESP32_PINMUX(17, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO18 \
ESP32_PINMUX(18, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO19 \
ESP32_PINMUX(19, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO20 \
ESP32_PINMUX(20, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO21 \
ESP32_PINMUX(21, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO26 \
ESP32_PINMUX(26, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO27 \
ESP32_PINMUX(27, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO28 \
ESP32_PINMUX(28, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO29 \
ESP32_PINMUX(29, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO30 \
ESP32_PINMUX(30, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO31 \
ESP32_PINMUX(31, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO32 \
ESP32_PINMUX(32, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO33 \
ESP32_PINMUX(33, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO34 \
ESP32_PINMUX(34, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO35 \
ESP32_PINMUX(35, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO36 \
ESP32_PINMUX(36, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO37 \
ESP32_PINMUX(37, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO38 \
ESP32_PINMUX(38, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO39 \
ESP32_PINMUX(39, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO40 \
ESP32_PINMUX(40, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO41 \
ESP32_PINMUX(41, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO42 \
ESP32_PINMUX(42, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO43 \
ESP32_PINMUX(43, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO44 \
ESP32_PINMUX(44, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO45 \
ESP32_PINMUX(45, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO46 \
ESP32_PINMUX(46, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO47 \
ESP32_PINMUX(47, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
#define MCPWM1_SYNC0_GPIO48 \
ESP32_PINMUX(48, ESP_PWM1_SYNC0_IN, ESP_NOSIG)
/* MCPWM1_SYNC1 */
#define MCPWM1_SYNC1_GPIO0 \
ESP32_PINMUX(0, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO1 \
ESP32_PINMUX(1, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO2 \
ESP32_PINMUX(2, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO3 \
ESP32_PINMUX(3, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO4 \
ESP32_PINMUX(4, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO5 \
ESP32_PINMUX(5, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO6 \
ESP32_PINMUX(6, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO7 \
ESP32_PINMUX(7, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO8 \
ESP32_PINMUX(8, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO9 \
ESP32_PINMUX(9, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO10 \
ESP32_PINMUX(10, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO11 \
ESP32_PINMUX(11, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO12 \
ESP32_PINMUX(12, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO13 \
ESP32_PINMUX(13, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO14 \
ESP32_PINMUX(14, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO15 \
ESP32_PINMUX(15, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO16 \
ESP32_PINMUX(16, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO17 \
ESP32_PINMUX(17, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO18 \
ESP32_PINMUX(18, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO19 \
ESP32_PINMUX(19, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO20 \
ESP32_PINMUX(20, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO21 \
ESP32_PINMUX(21, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO26 \
ESP32_PINMUX(26, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO27 \
ESP32_PINMUX(27, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO28 \
ESP32_PINMUX(28, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO29 \
ESP32_PINMUX(29, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO30 \
ESP32_PINMUX(30, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO31 \
ESP32_PINMUX(31, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO32 \
ESP32_PINMUX(32, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO33 \
ESP32_PINMUX(33, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO34 \
ESP32_PINMUX(34, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO35 \
ESP32_PINMUX(35, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO36 \
ESP32_PINMUX(36, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO37 \
ESP32_PINMUX(37, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO38 \
ESP32_PINMUX(38, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO39 \
ESP32_PINMUX(39, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO40 \
ESP32_PINMUX(40, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO41 \
ESP32_PINMUX(41, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO42 \
ESP32_PINMUX(42, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO43 \
ESP32_PINMUX(43, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO44 \
ESP32_PINMUX(44, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO45 \
ESP32_PINMUX(45, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO46 \
ESP32_PINMUX(46, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO47 \
ESP32_PINMUX(47, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
#define MCPWM1_SYNC1_GPIO48 \
ESP32_PINMUX(48, ESP_PWM1_SYNC1_IN, ESP_NOSIG)
/* MCPWM1_SYNC2 */
#define MCPWM1_SYNC2_GPIO0 \
ESP32_PINMUX(0, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO1 \
ESP32_PINMUX(1, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO2 \
ESP32_PINMUX(2, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO3 \
ESP32_PINMUX(3, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO4 \
ESP32_PINMUX(4, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO5 \
ESP32_PINMUX(5, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO6 \
ESP32_PINMUX(6, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO7 \
ESP32_PINMUX(7, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO8 \
ESP32_PINMUX(8, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO9 \
ESP32_PINMUX(9, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO10 \
ESP32_PINMUX(10, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO11 \
ESP32_PINMUX(11, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO12 \
ESP32_PINMUX(12, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO13 \
ESP32_PINMUX(13, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO14 \
ESP32_PINMUX(14, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO15 \
ESP32_PINMUX(15, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO16 \
ESP32_PINMUX(16, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO17 \
ESP32_PINMUX(17, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO18 \
ESP32_PINMUX(18, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO19 \
ESP32_PINMUX(19, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO20 \
ESP32_PINMUX(20, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO21 \
ESP32_PINMUX(21, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO26 \
ESP32_PINMUX(26, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO27 \
ESP32_PINMUX(27, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO28 \
ESP32_PINMUX(28, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO29 \
ESP32_PINMUX(29, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO30 \
ESP32_PINMUX(30, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO31 \
ESP32_PINMUX(31, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO32 \
ESP32_PINMUX(32, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO33 \
ESP32_PINMUX(33, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO34 \
ESP32_PINMUX(34, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO35 \
ESP32_PINMUX(35, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO36 \
ESP32_PINMUX(36, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO37 \
ESP32_PINMUX(37, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO38 \
ESP32_PINMUX(38, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO39 \
ESP32_PINMUX(39, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO40 \
ESP32_PINMUX(40, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO41 \
ESP32_PINMUX(41, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO42 \
ESP32_PINMUX(42, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO43 \
ESP32_PINMUX(43, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO44 \
ESP32_PINMUX(44, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO45 \
ESP32_PINMUX(45, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO46 \
ESP32_PINMUX(46, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO47 \
ESP32_PINMUX(47, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
#define MCPWM1_SYNC2_GPIO48 \
ESP32_PINMUX(48, ESP_PWM1_SYNC2_IN, ESP_NOSIG)
/* PCNT0_CH0CTRL */
#define PCNT0_CH0CTRL_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO28 \
ESP32_PINMUX(28, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO29 \
ESP32_PINMUX(29, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO30 \
ESP32_PINMUX(30, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO31 \
ESP32_PINMUX(31, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO40 \
ESP32_PINMUX(40, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO41 \
ESP32_PINMUX(41, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO42 \
ESP32_PINMUX(42, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO43 \
ESP32_PINMUX(43, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO44 \
ESP32_PINMUX(44, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO45 \
ESP32_PINMUX(45, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO46 \
ESP32_PINMUX(46, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO47 \
ESP32_PINMUX(47, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO48 \
ESP32_PINMUX(48, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
/* PCNT0_CH0SIG */
#define PCNT0_CH0SIG_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO28 \
ESP32_PINMUX(28, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO29 \
ESP32_PINMUX(29, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO30 \
ESP32_PINMUX(30, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO31 \
ESP32_PINMUX(31, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO40 \
ESP32_PINMUX(40, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO41 \
ESP32_PINMUX(41, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO42 \
ESP32_PINMUX(42, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO43 \
ESP32_PINMUX(43, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO44 \
ESP32_PINMUX(44, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO45 \
ESP32_PINMUX(45, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO46 \
ESP32_PINMUX(46, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO47 \
ESP32_PINMUX(47, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO48 \
ESP32_PINMUX(48, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
/* PCNT0_CH1CTRL */
#define PCNT0_CH1CTRL_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO28 \
ESP32_PINMUX(28, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO29 \
ESP32_PINMUX(29, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO30 \
ESP32_PINMUX(30, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO31 \
ESP32_PINMUX(31, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO40 \
ESP32_PINMUX(40, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO41 \
ESP32_PINMUX(41, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO42 \
ESP32_PINMUX(42, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO43 \
ESP32_PINMUX(43, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO44 \
ESP32_PINMUX(44, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO45 \
ESP32_PINMUX(45, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO46 \
ESP32_PINMUX(46, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO47 \
ESP32_PINMUX(47, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO48 \
ESP32_PINMUX(48, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
/* PCNT0_CH1SIG */
#define PCNT0_CH1SIG_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO28 \
ESP32_PINMUX(28, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO29 \
ESP32_PINMUX(29, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO30 \
ESP32_PINMUX(30, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO31 \
ESP32_PINMUX(31, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO40 \
ESP32_PINMUX(40, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO41 \
ESP32_PINMUX(41, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO42 \
ESP32_PINMUX(42, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO43 \
ESP32_PINMUX(43, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO44 \
ESP32_PINMUX(44, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO45 \
ESP32_PINMUX(45, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO46 \
ESP32_PINMUX(46, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO47 \
ESP32_PINMUX(47, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO48 \
ESP32_PINMUX(48, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
/* PCNT1_CH0CTRL */
#define PCNT1_CH0CTRL_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO28 \
ESP32_PINMUX(28, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO29 \
ESP32_PINMUX(29, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO30 \
ESP32_PINMUX(30, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO31 \
ESP32_PINMUX(31, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO40 \
ESP32_PINMUX(40, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO41 \
ESP32_PINMUX(41, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO42 \
ESP32_PINMUX(42, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO43 \
ESP32_PINMUX(43, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO44 \
ESP32_PINMUX(44, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO45 \
ESP32_PINMUX(45, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO46 \
ESP32_PINMUX(46, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO47 \
ESP32_PINMUX(47, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO48 \
ESP32_PINMUX(48, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
/* PCNT1_CH0SIG */
#define PCNT1_CH0SIG_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO28 \
ESP32_PINMUX(28, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO29 \
ESP32_PINMUX(29, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO30 \
ESP32_PINMUX(30, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO31 \
ESP32_PINMUX(31, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO40 \
ESP32_PINMUX(40, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO41 \
ESP32_PINMUX(41, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO42 \
ESP32_PINMUX(42, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO43 \
ESP32_PINMUX(43, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO44 \
ESP32_PINMUX(44, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO45 \
ESP32_PINMUX(45, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO46 \
ESP32_PINMUX(46, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO47 \
ESP32_PINMUX(47, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO48 \
ESP32_PINMUX(48, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
/* PCNT1_CH1CTRL */
#define PCNT1_CH1CTRL_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO28 \
ESP32_PINMUX(28, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO29 \
ESP32_PINMUX(29, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO30 \
ESP32_PINMUX(30, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO31 \
ESP32_PINMUX(31, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO40 \
ESP32_PINMUX(40, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO41 \
ESP32_PINMUX(41, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO42 \
ESP32_PINMUX(42, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO43 \
ESP32_PINMUX(43, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO44 \
ESP32_PINMUX(44, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO45 \
ESP32_PINMUX(45, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO46 \
ESP32_PINMUX(46, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO47 \
ESP32_PINMUX(47, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO48 \
ESP32_PINMUX(48, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
/* PCNT1_CH1SIG */
#define PCNT1_CH1SIG_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO28 \
ESP32_PINMUX(28, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO29 \
ESP32_PINMUX(29, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO30 \
ESP32_PINMUX(30, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO31 \
ESP32_PINMUX(31, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO40 \
ESP32_PINMUX(40, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO41 \
ESP32_PINMUX(41, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO42 \
ESP32_PINMUX(42, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO43 \
ESP32_PINMUX(43, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO44 \
ESP32_PINMUX(44, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO45 \
ESP32_PINMUX(45, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO46 \
ESP32_PINMUX(46, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO47 \
ESP32_PINMUX(47, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO48 \
ESP32_PINMUX(48, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
/* PCNT2_CH0CTRL */
#define PCNT2_CH0CTRL_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO28 \
ESP32_PINMUX(28, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO29 \
ESP32_PINMUX(29, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO30 \
ESP32_PINMUX(30, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO31 \
ESP32_PINMUX(31, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO40 \
ESP32_PINMUX(40, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO41 \
ESP32_PINMUX(41, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO42 \
ESP32_PINMUX(42, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO43 \
ESP32_PINMUX(43, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO44 \
ESP32_PINMUX(44, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO45 \
ESP32_PINMUX(45, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO46 \
ESP32_PINMUX(46, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO47 \
ESP32_PINMUX(47, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO48 \
ESP32_PINMUX(48, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
/* PCNT2_CH0SIG */
#define PCNT2_CH0SIG_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO28 \
ESP32_PINMUX(28, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO29 \
ESP32_PINMUX(29, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO30 \
ESP32_PINMUX(30, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO31 \
ESP32_PINMUX(31, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO40 \
ESP32_PINMUX(40, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO41 \
ESP32_PINMUX(41, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO42 \
ESP32_PINMUX(42, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO43 \
ESP32_PINMUX(43, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO44 \
ESP32_PINMUX(44, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO45 \
ESP32_PINMUX(45, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO46 \
ESP32_PINMUX(46, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO47 \
ESP32_PINMUX(47, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO48 \
ESP32_PINMUX(48, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
/* PCNT2_CH1CTRL */
#define PCNT2_CH1CTRL_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO28 \
ESP32_PINMUX(28, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO29 \
ESP32_PINMUX(29, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO30 \
ESP32_PINMUX(30, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO31 \
ESP32_PINMUX(31, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO40 \
ESP32_PINMUX(40, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO41 \
ESP32_PINMUX(41, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO42 \
ESP32_PINMUX(42, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO43 \
ESP32_PINMUX(43, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO44 \
ESP32_PINMUX(44, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO45 \
ESP32_PINMUX(45, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO46 \
ESP32_PINMUX(46, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO47 \
ESP32_PINMUX(47, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO48 \
ESP32_PINMUX(48, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
/* PCNT2_CH1SIG */
#define PCNT2_CH1SIG_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO28 \
ESP32_PINMUX(28, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO29 \
ESP32_PINMUX(29, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO30 \
ESP32_PINMUX(30, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO31 \
ESP32_PINMUX(31, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO40 \
ESP32_PINMUX(40, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO41 \
ESP32_PINMUX(41, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO42 \
ESP32_PINMUX(42, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO43 \
ESP32_PINMUX(43, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO44 \
ESP32_PINMUX(44, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO45 \
ESP32_PINMUX(45, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO46 \
ESP32_PINMUX(46, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO47 \
ESP32_PINMUX(47, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO48 \
ESP32_PINMUX(48, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
/* PCNT3_CH0CTRL */
#define PCNT3_CH0CTRL_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO28 \
ESP32_PINMUX(28, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO29 \
ESP32_PINMUX(29, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO30 \
ESP32_PINMUX(30, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO31 \
ESP32_PINMUX(31, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO40 \
ESP32_PINMUX(40, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO41 \
ESP32_PINMUX(41, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO42 \
ESP32_PINMUX(42, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO43 \
ESP32_PINMUX(43, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO44 \
ESP32_PINMUX(44, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO45 \
ESP32_PINMUX(45, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO46 \
ESP32_PINMUX(46, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO47 \
ESP32_PINMUX(47, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO48 \
ESP32_PINMUX(48, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
/* PCNT3_CH0SIG */
#define PCNT3_CH0SIG_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO28 \
ESP32_PINMUX(28, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO29 \
ESP32_PINMUX(29, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO30 \
ESP32_PINMUX(30, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO31 \
ESP32_PINMUX(31, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO40 \
ESP32_PINMUX(40, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO41 \
ESP32_PINMUX(41, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO42 \
ESP32_PINMUX(42, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO43 \
ESP32_PINMUX(43, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO44 \
ESP32_PINMUX(44, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO45 \
ESP32_PINMUX(45, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO46 \
ESP32_PINMUX(46, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO47 \
ESP32_PINMUX(47, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO48 \
ESP32_PINMUX(48, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
/* PCNT3_CH1CTRL */
#define PCNT3_CH1CTRL_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO28 \
ESP32_PINMUX(28, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO29 \
ESP32_PINMUX(29, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO30 \
ESP32_PINMUX(30, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO31 \
ESP32_PINMUX(31, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO40 \
ESP32_PINMUX(40, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO41 \
ESP32_PINMUX(41, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO42 \
ESP32_PINMUX(42, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO43 \
ESP32_PINMUX(43, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO44 \
ESP32_PINMUX(44, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO45 \
ESP32_PINMUX(45, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO46 \
ESP32_PINMUX(46, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO47 \
ESP32_PINMUX(47, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO48 \
ESP32_PINMUX(48, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
/* PCNT3_CH1SIG */
#define PCNT3_CH1SIG_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO28 \
ESP32_PINMUX(28, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO29 \
ESP32_PINMUX(29, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO30 \
ESP32_PINMUX(30, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO31 \
ESP32_PINMUX(31, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO40 \
ESP32_PINMUX(40, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO41 \
ESP32_PINMUX(41, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO42 \
ESP32_PINMUX(42, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO43 \
ESP32_PINMUX(43, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO44 \
ESP32_PINMUX(44, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO45 \
ESP32_PINMUX(45, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO46 \
ESP32_PINMUX(46, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO47 \
ESP32_PINMUX(47, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO48 \
ESP32_PINMUX(48, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
/* SDHC0_CD */
#define SDHC0_CD_GPIO0 \
ESP32_PINMUX(0, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO1 \
ESP32_PINMUX(1, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO2 \
ESP32_PINMUX(2, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO3 \
ESP32_PINMUX(3, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO4 \
ESP32_PINMUX(4, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO5 \
ESP32_PINMUX(5, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO6 \
ESP32_PINMUX(6, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO7 \
ESP32_PINMUX(7, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO8 \
ESP32_PINMUX(8, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO9 \
ESP32_PINMUX(9, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO10 \
ESP32_PINMUX(10, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO11 \
ESP32_PINMUX(11, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO12 \
ESP32_PINMUX(12, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO13 \
ESP32_PINMUX(13, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO14 \
ESP32_PINMUX(14, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO15 \
ESP32_PINMUX(15, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO16 \
ESP32_PINMUX(16, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO17 \
ESP32_PINMUX(17, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO18 \
ESP32_PINMUX(18, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO19 \
ESP32_PINMUX(19, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO20 \
ESP32_PINMUX(20, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO21 \
ESP32_PINMUX(21, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO26 \
ESP32_PINMUX(26, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO27 \
ESP32_PINMUX(27, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO28 \
ESP32_PINMUX(28, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO29 \
ESP32_PINMUX(29, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO30 \
ESP32_PINMUX(30, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO31 \
ESP32_PINMUX(31, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO32 \
ESP32_PINMUX(32, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO33 \
ESP32_PINMUX(33, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO34 \
ESP32_PINMUX(34, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO35 \
ESP32_PINMUX(35, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO36 \
ESP32_PINMUX(36, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO37 \
ESP32_PINMUX(37, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO38 \
ESP32_PINMUX(38, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO39 \
ESP32_PINMUX(39, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO40 \
ESP32_PINMUX(40, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO41 \
ESP32_PINMUX(41, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO42 \
ESP32_PINMUX(42, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO43 \
ESP32_PINMUX(43, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO44 \
ESP32_PINMUX(44, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO45 \
ESP32_PINMUX(45, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO46 \
ESP32_PINMUX(46, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO47 \
ESP32_PINMUX(47, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
#define SDHC0_CD_GPIO48 \
ESP32_PINMUX(48, ESP_SDHOST_CARD_DETECT_N_1, ESP_NOSIG)
/* SDHC0_CLKOUT */
#define SDHC0_CLKOUT_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
#define SDHC0_CLKOUT_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_1)
/* SDHC0_CMD */
#define SDHC0_CMD_GPIO0 \
ESP32_PINMUX(0, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO1 \
ESP32_PINMUX(1, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO2 \
ESP32_PINMUX(2, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO3 \
ESP32_PINMUX(3, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO4 \
ESP32_PINMUX(4, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO5 \
ESP32_PINMUX(5, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO6 \
ESP32_PINMUX(6, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO7 \
ESP32_PINMUX(7, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO8 \
ESP32_PINMUX(8, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO9 \
ESP32_PINMUX(9, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO10 \
ESP32_PINMUX(10, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO11 \
ESP32_PINMUX(11, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO12 \
ESP32_PINMUX(12, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO13 \
ESP32_PINMUX(13, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO14 \
ESP32_PINMUX(14, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO15 \
ESP32_PINMUX(15, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO16 \
ESP32_PINMUX(16, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO17 \
ESP32_PINMUX(17, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO18 \
ESP32_PINMUX(18, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO19 \
ESP32_PINMUX(19, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO20 \
ESP32_PINMUX(20, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO21 \
ESP32_PINMUX(21, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO26 \
ESP32_PINMUX(26, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO27 \
ESP32_PINMUX(27, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO28 \
ESP32_PINMUX(28, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO29 \
ESP32_PINMUX(29, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO30 \
ESP32_PINMUX(30, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO31 \
ESP32_PINMUX(31, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO32 \
ESP32_PINMUX(32, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO33 \
ESP32_PINMUX(33, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO34 \
ESP32_PINMUX(34, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO35 \
ESP32_PINMUX(35, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO36 \
ESP32_PINMUX(36, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO37 \
ESP32_PINMUX(37, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO38 \
ESP32_PINMUX(38, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO39 \
ESP32_PINMUX(39, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO40 \
ESP32_PINMUX(40, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO41 \
ESP32_PINMUX(41, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO42 \
ESP32_PINMUX(42, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO43 \
ESP32_PINMUX(43, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO44 \
ESP32_PINMUX(44, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO45 \
ESP32_PINMUX(45, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO46 \
ESP32_PINMUX(46, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO47 \
ESP32_PINMUX(47, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
#define SDHC0_CMD_GPIO48 \
ESP32_PINMUX(48, ESP_SDHOST_CCMD_IN_1, ESP_SDHOST_CCMD_OUT_1)
/* SDHC0_DATA0 */
#define SDHC0_DATA0_GPIO0 \
ESP32_PINMUX(0, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO1 \
ESP32_PINMUX(1, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO2 \
ESP32_PINMUX(2, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO3 \
ESP32_PINMUX(3, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO4 \
ESP32_PINMUX(4, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO5 \
ESP32_PINMUX(5, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO6 \
ESP32_PINMUX(6, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO7 \
ESP32_PINMUX(7, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO8 \
ESP32_PINMUX(8, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO9 \
ESP32_PINMUX(9, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO10 \
ESP32_PINMUX(10, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO11 \
ESP32_PINMUX(11, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO12 \
ESP32_PINMUX(12, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO13 \
ESP32_PINMUX(13, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO14 \
ESP32_PINMUX(14, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO15 \
ESP32_PINMUX(15, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO16 \
ESP32_PINMUX(16, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO17 \
ESP32_PINMUX(17, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO18 \
ESP32_PINMUX(18, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO19 \
ESP32_PINMUX(19, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO20 \
ESP32_PINMUX(20, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO21 \
ESP32_PINMUX(21, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO26 \
ESP32_PINMUX(26, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO27 \
ESP32_PINMUX(27, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO28 \
ESP32_PINMUX(28, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO29 \
ESP32_PINMUX(29, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO30 \
ESP32_PINMUX(30, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO31 \
ESP32_PINMUX(31, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO32 \
ESP32_PINMUX(32, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO33 \
ESP32_PINMUX(33, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO34 \
ESP32_PINMUX(34, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO35 \
ESP32_PINMUX(35, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO36 \
ESP32_PINMUX(36, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO37 \
ESP32_PINMUX(37, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO38 \
ESP32_PINMUX(38, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO39 \
ESP32_PINMUX(39, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO40 \
ESP32_PINMUX(40, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO41 \
ESP32_PINMUX(41, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO42 \
ESP32_PINMUX(42, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO43 \
ESP32_PINMUX(43, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO44 \
ESP32_PINMUX(44, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO45 \
ESP32_PINMUX(45, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO46 \
ESP32_PINMUX(46, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO47 \
ESP32_PINMUX(47, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
#define SDHC0_DATA0_GPIO48 \
ESP32_PINMUX(48, ESP_SDHOST_CDATA_IN_10, ESP_SDHOST_CDATA_OUT_10)
/* SDHC0_DATA1 */
#define SDHC0_DATA1_GPIO0 \
ESP32_PINMUX(0, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO1 \
ESP32_PINMUX(1, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO2 \
ESP32_PINMUX(2, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO3 \
ESP32_PINMUX(3, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO4 \
ESP32_PINMUX(4, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO5 \
ESP32_PINMUX(5, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO6 \
ESP32_PINMUX(6, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO7 \
ESP32_PINMUX(7, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO8 \
ESP32_PINMUX(8, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO9 \
ESP32_PINMUX(9, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO10 \
ESP32_PINMUX(10, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO11 \
ESP32_PINMUX(11, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO12 \
ESP32_PINMUX(12, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO13 \
ESP32_PINMUX(13, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO14 \
ESP32_PINMUX(14, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO15 \
ESP32_PINMUX(15, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO16 \
ESP32_PINMUX(16, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO17 \
ESP32_PINMUX(17, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO18 \
ESP32_PINMUX(18, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO19 \
ESP32_PINMUX(19, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO20 \
ESP32_PINMUX(20, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO21 \
ESP32_PINMUX(21, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO26 \
ESP32_PINMUX(26, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO27 \
ESP32_PINMUX(27, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO28 \
ESP32_PINMUX(28, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO29 \
ESP32_PINMUX(29, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO30 \
ESP32_PINMUX(30, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO31 \
ESP32_PINMUX(31, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO32 \
ESP32_PINMUX(32, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO33 \
ESP32_PINMUX(33, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO34 \
ESP32_PINMUX(34, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO35 \
ESP32_PINMUX(35, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO36 \
ESP32_PINMUX(36, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO37 \
ESP32_PINMUX(37, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO38 \
ESP32_PINMUX(38, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO39 \
ESP32_PINMUX(39, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO40 \
ESP32_PINMUX(40, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO41 \
ESP32_PINMUX(41, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO42 \
ESP32_PINMUX(42, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO43 \
ESP32_PINMUX(43, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO44 \
ESP32_PINMUX(44, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO45 \
ESP32_PINMUX(45, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO46 \
ESP32_PINMUX(46, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO47 \
ESP32_PINMUX(47, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
#define SDHC0_DATA1_GPIO48 \
ESP32_PINMUX(48, ESP_SDHOST_CDATA_IN_11, ESP_SDHOST_CDATA_OUT_11)
/* SDHC0_DATA2 */
#define SDHC0_DATA2_GPIO0 \
ESP32_PINMUX(0, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO1 \
ESP32_PINMUX(1, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO2 \
ESP32_PINMUX(2, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO3 \
ESP32_PINMUX(3, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO4 \
ESP32_PINMUX(4, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO5 \
ESP32_PINMUX(5, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO6 \
ESP32_PINMUX(6, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO7 \
ESP32_PINMUX(7, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO8 \
ESP32_PINMUX(8, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO9 \
ESP32_PINMUX(9, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO10 \
ESP32_PINMUX(10, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO11 \
ESP32_PINMUX(11, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO12 \
ESP32_PINMUX(12, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO13 \
ESP32_PINMUX(13, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO14 \
ESP32_PINMUX(14, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO15 \
ESP32_PINMUX(15, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO16 \
ESP32_PINMUX(16, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO17 \
ESP32_PINMUX(17, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO18 \
ESP32_PINMUX(18, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO19 \
ESP32_PINMUX(19, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO20 \
ESP32_PINMUX(20, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO21 \
ESP32_PINMUX(21, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO26 \
ESP32_PINMUX(26, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO27 \
ESP32_PINMUX(27, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO28 \
ESP32_PINMUX(28, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO29 \
ESP32_PINMUX(29, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO30 \
ESP32_PINMUX(30, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO31 \
ESP32_PINMUX(31, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO32 \
ESP32_PINMUX(32, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO33 \
ESP32_PINMUX(33, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO34 \
ESP32_PINMUX(34, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO35 \
ESP32_PINMUX(35, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO36 \
ESP32_PINMUX(36, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO37 \
ESP32_PINMUX(37, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO38 \
ESP32_PINMUX(38, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO39 \
ESP32_PINMUX(39, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO40 \
ESP32_PINMUX(40, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO41 \
ESP32_PINMUX(41, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO42 \
ESP32_PINMUX(42, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO43 \
ESP32_PINMUX(43, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO44 \
ESP32_PINMUX(44, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO45 \
ESP32_PINMUX(45, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO46 \
ESP32_PINMUX(46, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO47 \
ESP32_PINMUX(47, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
#define SDHC0_DATA2_GPIO48 \
ESP32_PINMUX(48, ESP_SDHOST_CDATA_IN_12, ESP_SDHOST_CDATA_OUT_12)
/* SDHC0_DATA3 */
#define SDHC0_DATA3_GPIO0 \
ESP32_PINMUX(0, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO1 \
ESP32_PINMUX(1, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO2 \
ESP32_PINMUX(2, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO3 \
ESP32_PINMUX(3, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO4 \
ESP32_PINMUX(4, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO5 \
ESP32_PINMUX(5, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO6 \
ESP32_PINMUX(6, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO7 \
ESP32_PINMUX(7, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO8 \
ESP32_PINMUX(8, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO9 \
ESP32_PINMUX(9, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO10 \
ESP32_PINMUX(10, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO11 \
ESP32_PINMUX(11, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO12 \
ESP32_PINMUX(12, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO13 \
ESP32_PINMUX(13, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO14 \
ESP32_PINMUX(14, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO15 \
ESP32_PINMUX(15, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO16 \
ESP32_PINMUX(16, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO17 \
ESP32_PINMUX(17, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO18 \
ESP32_PINMUX(18, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO19 \
ESP32_PINMUX(19, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO20 \
ESP32_PINMUX(20, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO21 \
ESP32_PINMUX(21, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO26 \
ESP32_PINMUX(26, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO27 \
ESP32_PINMUX(27, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO28 \
ESP32_PINMUX(28, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO29 \
ESP32_PINMUX(29, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO30 \
ESP32_PINMUX(30, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO31 \
ESP32_PINMUX(31, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO32 \
ESP32_PINMUX(32, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO33 \
ESP32_PINMUX(33, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO34 \
ESP32_PINMUX(34, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO35 \
ESP32_PINMUX(35, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO36 \
ESP32_PINMUX(36, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO37 \
ESP32_PINMUX(37, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO38 \
ESP32_PINMUX(38, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO39 \
ESP32_PINMUX(39, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO40 \
ESP32_PINMUX(40, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO41 \
ESP32_PINMUX(41, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO42 \
ESP32_PINMUX(42, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO43 \
ESP32_PINMUX(43, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO44 \
ESP32_PINMUX(44, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO45 \
ESP32_PINMUX(45, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO46 \
ESP32_PINMUX(46, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO47 \
ESP32_PINMUX(47, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
#define SDHC0_DATA3_GPIO48 \
ESP32_PINMUX(48, ESP_SDHOST_CDATA_IN_13, ESP_SDHOST_CDATA_OUT_13)
/* SDHC0_WP */
#define SDHC0_WP_GPIO0 \
ESP32_PINMUX(0, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO1 \
ESP32_PINMUX(1, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO2 \
ESP32_PINMUX(2, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO3 \
ESP32_PINMUX(3, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO4 \
ESP32_PINMUX(4, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO5 \
ESP32_PINMUX(5, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO6 \
ESP32_PINMUX(6, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO7 \
ESP32_PINMUX(7, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO8 \
ESP32_PINMUX(8, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO9 \
ESP32_PINMUX(9, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO10 \
ESP32_PINMUX(10, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO11 \
ESP32_PINMUX(11, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO12 \
ESP32_PINMUX(12, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO13 \
ESP32_PINMUX(13, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO14 \
ESP32_PINMUX(14, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO15 \
ESP32_PINMUX(15, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO16 \
ESP32_PINMUX(16, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO17 \
ESP32_PINMUX(17, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO18 \
ESP32_PINMUX(18, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO19 \
ESP32_PINMUX(19, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO20 \
ESP32_PINMUX(20, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO21 \
ESP32_PINMUX(21, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO26 \
ESP32_PINMUX(26, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO27 \
ESP32_PINMUX(27, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO28 \
ESP32_PINMUX(28, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO29 \
ESP32_PINMUX(29, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO30 \
ESP32_PINMUX(30, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO31 \
ESP32_PINMUX(31, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO32 \
ESP32_PINMUX(32, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO33 \
ESP32_PINMUX(33, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO34 \
ESP32_PINMUX(34, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO35 \
ESP32_PINMUX(35, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO36 \
ESP32_PINMUX(36, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO37 \
ESP32_PINMUX(37, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO38 \
ESP32_PINMUX(38, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO39 \
ESP32_PINMUX(39, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO40 \
ESP32_PINMUX(40, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO41 \
ESP32_PINMUX(41, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO42 \
ESP32_PINMUX(42, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO43 \
ESP32_PINMUX(43, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO44 \
ESP32_PINMUX(44, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO45 \
ESP32_PINMUX(45, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO46 \
ESP32_PINMUX(46, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO47 \
ESP32_PINMUX(47, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
#define SDHC0_WP_GPIO48 \
ESP32_PINMUX(48, ESP_SDHOST_CARD_WRITE_PRT_1, ESP_NOSIG)
/* SDHC1_CD */
#define SDHC1_CD_GPIO0 \
ESP32_PINMUX(0, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO1 \
ESP32_PINMUX(1, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO2 \
ESP32_PINMUX(2, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO3 \
ESP32_PINMUX(3, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO4 \
ESP32_PINMUX(4, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO5 \
ESP32_PINMUX(5, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO6 \
ESP32_PINMUX(6, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO7 \
ESP32_PINMUX(7, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO8 \
ESP32_PINMUX(8, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO9 \
ESP32_PINMUX(9, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO10 \
ESP32_PINMUX(10, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO11 \
ESP32_PINMUX(11, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO12 \
ESP32_PINMUX(12, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO13 \
ESP32_PINMUX(13, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO14 \
ESP32_PINMUX(14, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO15 \
ESP32_PINMUX(15, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO16 \
ESP32_PINMUX(16, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO17 \
ESP32_PINMUX(17, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO18 \
ESP32_PINMUX(18, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO19 \
ESP32_PINMUX(19, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO20 \
ESP32_PINMUX(20, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO21 \
ESP32_PINMUX(21, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO26 \
ESP32_PINMUX(26, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO27 \
ESP32_PINMUX(27, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO28 \
ESP32_PINMUX(28, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO29 \
ESP32_PINMUX(29, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO30 \
ESP32_PINMUX(30, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO31 \
ESP32_PINMUX(31, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO32 \
ESP32_PINMUX(32, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO33 \
ESP32_PINMUX(33, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO34 \
ESP32_PINMUX(34, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO35 \
ESP32_PINMUX(35, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO36 \
ESP32_PINMUX(36, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO37 \
ESP32_PINMUX(37, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO38 \
ESP32_PINMUX(38, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO39 \
ESP32_PINMUX(39, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO40 \
ESP32_PINMUX(40, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO41 \
ESP32_PINMUX(41, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO42 \
ESP32_PINMUX(42, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO43 \
ESP32_PINMUX(43, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO44 \
ESP32_PINMUX(44, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO45 \
ESP32_PINMUX(45, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO46 \
ESP32_PINMUX(46, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO47 \
ESP32_PINMUX(47, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
#define SDHC1_CD_GPIO48 \
ESP32_PINMUX(48, ESP_SDHOST_CARD_DETECT_N_2, ESP_NOSIG)
/* SDHC1_CLKOUT */
#define SDHC1_CLKOUT_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
#define SDHC1_CLKOUT_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_SDHOST_CCLK_OUT_2)
/* SDHC1_CMD */
#define SDHC1_CMD_GPIO0 \
ESP32_PINMUX(0, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO1 \
ESP32_PINMUX(1, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO2 \
ESP32_PINMUX(2, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO3 \
ESP32_PINMUX(3, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO4 \
ESP32_PINMUX(4, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO5 \
ESP32_PINMUX(5, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO6 \
ESP32_PINMUX(6, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO7 \
ESP32_PINMUX(7, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO8 \
ESP32_PINMUX(8, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO9 \
ESP32_PINMUX(9, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO10 \
ESP32_PINMUX(10, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO11 \
ESP32_PINMUX(11, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO12 \
ESP32_PINMUX(12, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO13 \
ESP32_PINMUX(13, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO14 \
ESP32_PINMUX(14, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO15 \
ESP32_PINMUX(15, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO16 \
ESP32_PINMUX(16, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO17 \
ESP32_PINMUX(17, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO18 \
ESP32_PINMUX(18, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO19 \
ESP32_PINMUX(19, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO20 \
ESP32_PINMUX(20, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO21 \
ESP32_PINMUX(21, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO26 \
ESP32_PINMUX(26, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO27 \
ESP32_PINMUX(27, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO28 \
ESP32_PINMUX(28, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO29 \
ESP32_PINMUX(29, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO30 \
ESP32_PINMUX(30, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO31 \
ESP32_PINMUX(31, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO32 \
ESP32_PINMUX(32, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO33 \
ESP32_PINMUX(33, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO34 \
ESP32_PINMUX(34, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO35 \
ESP32_PINMUX(35, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO36 \
ESP32_PINMUX(36, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO37 \
ESP32_PINMUX(37, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO38 \
ESP32_PINMUX(38, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO39 \
ESP32_PINMUX(39, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO40 \
ESP32_PINMUX(40, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO41 \
ESP32_PINMUX(41, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO42 \
ESP32_PINMUX(42, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO43 \
ESP32_PINMUX(43, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO44 \
ESP32_PINMUX(44, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO45 \
ESP32_PINMUX(45, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO46 \
ESP32_PINMUX(46, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO47 \
ESP32_PINMUX(47, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
#define SDHC1_CMD_GPIO48 \
ESP32_PINMUX(48, ESP_SDHOST_CCMD_IN_2, ESP_SDHOST_CCMD_OUT_2)
/* SDHC1_DATA0 */
#define SDHC1_DATA0_GPIO0 \
ESP32_PINMUX(0, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO1 \
ESP32_PINMUX(1, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO2 \
ESP32_PINMUX(2, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO3 \
ESP32_PINMUX(3, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO4 \
ESP32_PINMUX(4, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO5 \
ESP32_PINMUX(5, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO6 \
ESP32_PINMUX(6, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO7 \
ESP32_PINMUX(7, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO8 \
ESP32_PINMUX(8, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO9 \
ESP32_PINMUX(9, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO10 \
ESP32_PINMUX(10, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO11 \
ESP32_PINMUX(11, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO12 \
ESP32_PINMUX(12, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO13 \
ESP32_PINMUX(13, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO14 \
ESP32_PINMUX(14, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO15 \
ESP32_PINMUX(15, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO16 \
ESP32_PINMUX(16, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO17 \
ESP32_PINMUX(17, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO18 \
ESP32_PINMUX(18, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO19 \
ESP32_PINMUX(19, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO20 \
ESP32_PINMUX(20, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO21 \
ESP32_PINMUX(21, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO26 \
ESP32_PINMUX(26, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO27 \
ESP32_PINMUX(27, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO28 \
ESP32_PINMUX(28, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO29 \
ESP32_PINMUX(29, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO30 \
ESP32_PINMUX(30, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO31 \
ESP32_PINMUX(31, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO32 \
ESP32_PINMUX(32, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO33 \
ESP32_PINMUX(33, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO34 \
ESP32_PINMUX(34, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO35 \
ESP32_PINMUX(35, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO36 \
ESP32_PINMUX(36, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO37 \
ESP32_PINMUX(37, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO38 \
ESP32_PINMUX(38, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO39 \
ESP32_PINMUX(39, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO40 \
ESP32_PINMUX(40, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO41 \
ESP32_PINMUX(41, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO42 \
ESP32_PINMUX(42, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO43 \
ESP32_PINMUX(43, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO44 \
ESP32_PINMUX(44, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO45 \
ESP32_PINMUX(45, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO46 \
ESP32_PINMUX(46, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO47 \
ESP32_PINMUX(47, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
#define SDHC1_DATA0_GPIO48 \
ESP32_PINMUX(48, ESP_SDHOST_CDATA_IN_20, ESP_SDHOST_CDATA_OUT_20)
/* SDHC1_DATA1 */
#define SDHC1_DATA1_GPIO0 \
ESP32_PINMUX(0, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO1 \
ESP32_PINMUX(1, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO2 \
ESP32_PINMUX(2, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO3 \
ESP32_PINMUX(3, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO4 \
ESP32_PINMUX(4, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO5 \
ESP32_PINMUX(5, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO6 \
ESP32_PINMUX(6, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO7 \
ESP32_PINMUX(7, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO8 \
ESP32_PINMUX(8, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO9 \
ESP32_PINMUX(9, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO10 \
ESP32_PINMUX(10, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO11 \
ESP32_PINMUX(11, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO12 \
ESP32_PINMUX(12, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO13 \
ESP32_PINMUX(13, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO14 \
ESP32_PINMUX(14, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO15 \
ESP32_PINMUX(15, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO16 \
ESP32_PINMUX(16, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO17 \
ESP32_PINMUX(17, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO18 \
ESP32_PINMUX(18, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO19 \
ESP32_PINMUX(19, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO20 \
ESP32_PINMUX(20, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO21 \
ESP32_PINMUX(21, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO26 \
ESP32_PINMUX(26, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO27 \
ESP32_PINMUX(27, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO28 \
ESP32_PINMUX(28, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO29 \
ESP32_PINMUX(29, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO30 \
ESP32_PINMUX(30, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO31 \
ESP32_PINMUX(31, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO32 \
ESP32_PINMUX(32, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO33 \
ESP32_PINMUX(33, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO34 \
ESP32_PINMUX(34, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO35 \
ESP32_PINMUX(35, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO36 \
ESP32_PINMUX(36, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO37 \
ESP32_PINMUX(37, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO38 \
ESP32_PINMUX(38, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO39 \
ESP32_PINMUX(39, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO40 \
ESP32_PINMUX(40, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO41 \
ESP32_PINMUX(41, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO42 \
ESP32_PINMUX(42, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO43 \
ESP32_PINMUX(43, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO44 \
ESP32_PINMUX(44, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO45 \
ESP32_PINMUX(45, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO46 \
ESP32_PINMUX(46, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO47 \
ESP32_PINMUX(47, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
#define SDHC1_DATA1_GPIO48 \
ESP32_PINMUX(48, ESP_SDHOST_CDATA_IN_21, ESP_SDHOST_CDATA_OUT_21)
/* SDHC1_DATA2 */
#define SDHC1_DATA2_GPIO0 \
ESP32_PINMUX(0, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO1 \
ESP32_PINMUX(1, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO2 \
ESP32_PINMUX(2, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO3 \
ESP32_PINMUX(3, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO4 \
ESP32_PINMUX(4, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO5 \
ESP32_PINMUX(5, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO6 \
ESP32_PINMUX(6, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO7 \
ESP32_PINMUX(7, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO8 \
ESP32_PINMUX(8, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO9 \
ESP32_PINMUX(9, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO10 \
ESP32_PINMUX(10, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO11 \
ESP32_PINMUX(11, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO12 \
ESP32_PINMUX(12, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO13 \
ESP32_PINMUX(13, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO14 \
ESP32_PINMUX(14, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO15 \
ESP32_PINMUX(15, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO16 \
ESP32_PINMUX(16, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO17 \
ESP32_PINMUX(17, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO18 \
ESP32_PINMUX(18, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO19 \
ESP32_PINMUX(19, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO20 \
ESP32_PINMUX(20, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO21 \
ESP32_PINMUX(21, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO26 \
ESP32_PINMUX(26, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO27 \
ESP32_PINMUX(27, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO28 \
ESP32_PINMUX(28, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO29 \
ESP32_PINMUX(29, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO30 \
ESP32_PINMUX(30, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO31 \
ESP32_PINMUX(31, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO32 \
ESP32_PINMUX(32, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO33 \
ESP32_PINMUX(33, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO34 \
ESP32_PINMUX(34, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO35 \
ESP32_PINMUX(35, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO36 \
ESP32_PINMUX(36, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO37 \
ESP32_PINMUX(37, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO38 \
ESP32_PINMUX(38, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO39 \
ESP32_PINMUX(39, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO40 \
ESP32_PINMUX(40, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO41 \
ESP32_PINMUX(41, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO42 \
ESP32_PINMUX(42, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO43 \
ESP32_PINMUX(43, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO44 \
ESP32_PINMUX(44, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO45 \
ESP32_PINMUX(45, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO46 \
ESP32_PINMUX(46, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO47 \
ESP32_PINMUX(47, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
#define SDHC1_DATA2_GPIO48 \
ESP32_PINMUX(48, ESP_SDHOST_CDATA_IN_22, ESP_SDHOST_CDATA_OUT_22)
/* SDHC1_DATA3 */
#define SDHC1_DATA3_GPIO0 \
ESP32_PINMUX(0, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO1 \
ESP32_PINMUX(1, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO2 \
ESP32_PINMUX(2, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO3 \
ESP32_PINMUX(3, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO4 \
ESP32_PINMUX(4, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO5 \
ESP32_PINMUX(5, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO6 \
ESP32_PINMUX(6, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO7 \
ESP32_PINMUX(7, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO8 \
ESP32_PINMUX(8, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO9 \
ESP32_PINMUX(9, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO10 \
ESP32_PINMUX(10, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO11 \
ESP32_PINMUX(11, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO12 \
ESP32_PINMUX(12, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO13 \
ESP32_PINMUX(13, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO14 \
ESP32_PINMUX(14, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO15 \
ESP32_PINMUX(15, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO16 \
ESP32_PINMUX(16, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO17 \
ESP32_PINMUX(17, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO18 \
ESP32_PINMUX(18, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO19 \
ESP32_PINMUX(19, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO20 \
ESP32_PINMUX(20, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO21 \
ESP32_PINMUX(21, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO26 \
ESP32_PINMUX(26, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO27 \
ESP32_PINMUX(27, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO28 \
ESP32_PINMUX(28, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO29 \
ESP32_PINMUX(29, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO30 \
ESP32_PINMUX(30, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO31 \
ESP32_PINMUX(31, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO32 \
ESP32_PINMUX(32, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO33 \
ESP32_PINMUX(33, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO34 \
ESP32_PINMUX(34, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO35 \
ESP32_PINMUX(35, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO36 \
ESP32_PINMUX(36, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO37 \
ESP32_PINMUX(37, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO38 \
ESP32_PINMUX(38, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO39 \
ESP32_PINMUX(39, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO40 \
ESP32_PINMUX(40, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO41 \
ESP32_PINMUX(41, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO42 \
ESP32_PINMUX(42, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO43 \
ESP32_PINMUX(43, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO44 \
ESP32_PINMUX(44, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO45 \
ESP32_PINMUX(45, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO46 \
ESP32_PINMUX(46, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO47 \
ESP32_PINMUX(47, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
#define SDHC1_DATA3_GPIO48 \
ESP32_PINMUX(48, ESP_SDHOST_CDATA_IN_23, ESP_SDHOST_CDATA_OUT_23)
/* SDHC1_WP */
#define SDHC1_WP_GPIO0 \
ESP32_PINMUX(0, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO1 \
ESP32_PINMUX(1, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO2 \
ESP32_PINMUX(2, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO3 \
ESP32_PINMUX(3, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO4 \
ESP32_PINMUX(4, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO5 \
ESP32_PINMUX(5, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO6 \
ESP32_PINMUX(6, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO7 \
ESP32_PINMUX(7, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO8 \
ESP32_PINMUX(8, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO9 \
ESP32_PINMUX(9, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO10 \
ESP32_PINMUX(10, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO11 \
ESP32_PINMUX(11, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO12 \
ESP32_PINMUX(12, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO13 \
ESP32_PINMUX(13, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO14 \
ESP32_PINMUX(14, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO15 \
ESP32_PINMUX(15, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO16 \
ESP32_PINMUX(16, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO17 \
ESP32_PINMUX(17, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO18 \
ESP32_PINMUX(18, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO19 \
ESP32_PINMUX(19, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO20 \
ESP32_PINMUX(20, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO21 \
ESP32_PINMUX(21, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO26 \
ESP32_PINMUX(26, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO27 \
ESP32_PINMUX(27, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO28 \
ESP32_PINMUX(28, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO29 \
ESP32_PINMUX(29, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO30 \
ESP32_PINMUX(30, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO31 \
ESP32_PINMUX(31, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO32 \
ESP32_PINMUX(32, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO33 \
ESP32_PINMUX(33, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO34 \
ESP32_PINMUX(34, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO35 \
ESP32_PINMUX(35, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO36 \
ESP32_PINMUX(36, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO37 \
ESP32_PINMUX(37, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO38 \
ESP32_PINMUX(38, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO39 \
ESP32_PINMUX(39, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO40 \
ESP32_PINMUX(40, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO41 \
ESP32_PINMUX(41, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO42 \
ESP32_PINMUX(42, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO43 \
ESP32_PINMUX(43, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO44 \
ESP32_PINMUX(44, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO45 \
ESP32_PINMUX(45, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO46 \
ESP32_PINMUX(46, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO47 \
ESP32_PINMUX(47, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
#define SDHC1_WP_GPIO48 \
ESP32_PINMUX(48, ESP_SDHOST_CARD_WRITE_PRT_2, ESP_NOSIG)
/* SPIM2_CSEL */
#define SPIM2_CSEL_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_FSPICS0_OUT)
/* SPIM2_CSEL1 */
#define SPIM2_CSEL1_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_FSPICS1_OUT)
/* SPIM2_CSEL2 */
#define SPIM2_CSEL2_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_FSPICS2_OUT)
/* SPIM2_CSEL3 */
#define SPIM2_CSEL3_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_FSPICS3_OUT)
/* SPIM2_CSEL4 */
#define SPIM2_CSEL4_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_FSPICS4_OUT)
/* SPIM2_CSEL5 */
#define SPIM2_CSEL5_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_FSPICS5_OUT)
/* SPIM2_MISO */
#define SPIM2_MISO_GPIO0 \
ESP32_PINMUX(0, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO1 \
ESP32_PINMUX(1, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO2 \
ESP32_PINMUX(2, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO3 \
ESP32_PINMUX(3, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO4 \
ESP32_PINMUX(4, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO5 \
ESP32_PINMUX(5, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO6 \
ESP32_PINMUX(6, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO7 \
ESP32_PINMUX(7, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO8 \
ESP32_PINMUX(8, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO9 \
ESP32_PINMUX(9, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO10 \
ESP32_PINMUX(10, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO11 \
ESP32_PINMUX(11, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO12 \
ESP32_PINMUX(12, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO13 \
ESP32_PINMUX(13, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO14 \
ESP32_PINMUX(14, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO15 \
ESP32_PINMUX(15, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO16 \
ESP32_PINMUX(16, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO17 \
ESP32_PINMUX(17, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO18 \
ESP32_PINMUX(18, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO19 \
ESP32_PINMUX(19, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO20 \
ESP32_PINMUX(20, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO21 \
ESP32_PINMUX(21, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO26 \
ESP32_PINMUX(26, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO27 \
ESP32_PINMUX(27, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO28 \
ESP32_PINMUX(28, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO29 \
ESP32_PINMUX(29, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO30 \
ESP32_PINMUX(30, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO31 \
ESP32_PINMUX(31, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO32 \
ESP32_PINMUX(32, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO33 \
ESP32_PINMUX(33, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO34 \
ESP32_PINMUX(34, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO35 \
ESP32_PINMUX(35, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO36 \
ESP32_PINMUX(36, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO37 \
ESP32_PINMUX(37, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO38 \
ESP32_PINMUX(38, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO39 \
ESP32_PINMUX(39, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO40 \
ESP32_PINMUX(40, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO41 \
ESP32_PINMUX(41, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO42 \
ESP32_PINMUX(42, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO43 \
ESP32_PINMUX(43, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO44 \
ESP32_PINMUX(44, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO45 \
ESP32_PINMUX(45, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO46 \
ESP32_PINMUX(46, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO47 \
ESP32_PINMUX(47, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO48 \
ESP32_PINMUX(48, ESP_FSPIQ_IN, ESP_NOSIG)
/* SPIM2_MOSI */
#define SPIM2_MOSI_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_FSPID_OUT)
/* SPIM2_SCLK */
#define SPIM2_SCLK_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_FSPICLK_OUT)
/* SPIM3_CSEL */
#define SPIM3_CSEL_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_SPI3_CS0_OUT)
/* SPIM3_CSEL1 */
#define SPIM3_CSEL1_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_SPI3_CS1_OUT)
/* SPIM3_CSEL2 */
#define SPIM3_CSEL2_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_SPI3_CS2_OUT)
/* SPIM3_MISO */
#define SPIM3_MISO_GPIO0 \
ESP32_PINMUX(0, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO1 \
ESP32_PINMUX(1, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO2 \
ESP32_PINMUX(2, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO3 \
ESP32_PINMUX(3, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO4 \
ESP32_PINMUX(4, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO5 \
ESP32_PINMUX(5, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO6 \
ESP32_PINMUX(6, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO7 \
ESP32_PINMUX(7, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO8 \
ESP32_PINMUX(8, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO9 \
ESP32_PINMUX(9, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO10 \
ESP32_PINMUX(10, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO11 \
ESP32_PINMUX(11, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO12 \
ESP32_PINMUX(12, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO13 \
ESP32_PINMUX(13, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO14 \
ESP32_PINMUX(14, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO15 \
ESP32_PINMUX(15, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO16 \
ESP32_PINMUX(16, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO17 \
ESP32_PINMUX(17, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO18 \
ESP32_PINMUX(18, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO19 \
ESP32_PINMUX(19, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO20 \
ESP32_PINMUX(20, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO21 \
ESP32_PINMUX(21, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO26 \
ESP32_PINMUX(26, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO27 \
ESP32_PINMUX(27, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO28 \
ESP32_PINMUX(28, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO29 \
ESP32_PINMUX(29, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO30 \
ESP32_PINMUX(30, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO31 \
ESP32_PINMUX(31, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO32 \
ESP32_PINMUX(32, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO33 \
ESP32_PINMUX(33, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO34 \
ESP32_PINMUX(34, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO35 \
ESP32_PINMUX(35, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO36 \
ESP32_PINMUX(36, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO37 \
ESP32_PINMUX(37, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO38 \
ESP32_PINMUX(38, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO39 \
ESP32_PINMUX(39, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO40 \
ESP32_PINMUX(40, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO41 \
ESP32_PINMUX(41, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO42 \
ESP32_PINMUX(42, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO43 \
ESP32_PINMUX(43, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO44 \
ESP32_PINMUX(44, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO45 \
ESP32_PINMUX(45, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO46 \
ESP32_PINMUX(46, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO47 \
ESP32_PINMUX(47, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO48 \
ESP32_PINMUX(48, ESP_SPI3_Q_IN, ESP_NOSIG)
/* SPIM3_MOSI */
#define SPIM3_MOSI_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_SPI3_D_OUT)
/* SPIM3_SCLK */
#define SPIM3_SCLK_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_SPI3_CLK_OUT)
#define SPIM3_SCLK_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_SPI3_CLK_OUT)
/* TWAI_BUS_OFF */
#define TWAI_BUS_OFF_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
/* TWAI_CLKOUT */
#define TWAI_CLKOUT_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_TWAI_CLKOUT)
/* TWAI_RX */
#define TWAI_RX_GPIO0 \
ESP32_PINMUX(0, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO1 \
ESP32_PINMUX(1, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO2 \
ESP32_PINMUX(2, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO3 \
ESP32_PINMUX(3, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO4 \
ESP32_PINMUX(4, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO5 \
ESP32_PINMUX(5, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO6 \
ESP32_PINMUX(6, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO7 \
ESP32_PINMUX(7, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO8 \
ESP32_PINMUX(8, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO9 \
ESP32_PINMUX(9, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO10 \
ESP32_PINMUX(10, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO11 \
ESP32_PINMUX(11, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO12 \
ESP32_PINMUX(12, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO13 \
ESP32_PINMUX(13, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO14 \
ESP32_PINMUX(14, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO15 \
ESP32_PINMUX(15, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO16 \
ESP32_PINMUX(16, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO17 \
ESP32_PINMUX(17, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO18 \
ESP32_PINMUX(18, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO19 \
ESP32_PINMUX(19, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO20 \
ESP32_PINMUX(20, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO21 \
ESP32_PINMUX(21, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO26 \
ESP32_PINMUX(26, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO27 \
ESP32_PINMUX(27, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO28 \
ESP32_PINMUX(28, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO29 \
ESP32_PINMUX(29, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO30 \
ESP32_PINMUX(30, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO31 \
ESP32_PINMUX(31, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO32 \
ESP32_PINMUX(32, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO33 \
ESP32_PINMUX(33, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO34 \
ESP32_PINMUX(34, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO35 \
ESP32_PINMUX(35, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO36 \
ESP32_PINMUX(36, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO37 \
ESP32_PINMUX(37, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO38 \
ESP32_PINMUX(38, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO39 \
ESP32_PINMUX(39, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO40 \
ESP32_PINMUX(40, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO41 \
ESP32_PINMUX(41, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO42 \
ESP32_PINMUX(42, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO43 \
ESP32_PINMUX(43, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO44 \
ESP32_PINMUX(44, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO45 \
ESP32_PINMUX(45, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO46 \
ESP32_PINMUX(46, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO47 \
ESP32_PINMUX(47, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO48 \
ESP32_PINMUX(48, ESP_TWAI_RX, ESP_NOSIG)
/* TWAI_TX */
#define TWAI_TX_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_TWAI_TX)
/* UART0_CTS */
#define UART0_CTS_GPIO0 \
ESP32_PINMUX(0, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO1 \
ESP32_PINMUX(1, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO2 \
ESP32_PINMUX(2, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO3 \
ESP32_PINMUX(3, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO4 \
ESP32_PINMUX(4, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO5 \
ESP32_PINMUX(5, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO6 \
ESP32_PINMUX(6, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO7 \
ESP32_PINMUX(7, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO8 \
ESP32_PINMUX(8, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO9 \
ESP32_PINMUX(9, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO10 \
ESP32_PINMUX(10, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO11 \
ESP32_PINMUX(11, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO12 \
ESP32_PINMUX(12, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO13 \
ESP32_PINMUX(13, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO14 \
ESP32_PINMUX(14, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO15 \
ESP32_PINMUX(15, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO16 \
ESP32_PINMUX(16, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO17 \
ESP32_PINMUX(17, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO18 \
ESP32_PINMUX(18, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO19 \
ESP32_PINMUX(19, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO20 \
ESP32_PINMUX(20, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO21 \
ESP32_PINMUX(21, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO26 \
ESP32_PINMUX(26, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO27 \
ESP32_PINMUX(27, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO28 \
ESP32_PINMUX(28, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO29 \
ESP32_PINMUX(29, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO30 \
ESP32_PINMUX(30, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO31 \
ESP32_PINMUX(31, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO32 \
ESP32_PINMUX(32, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO33 \
ESP32_PINMUX(33, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO34 \
ESP32_PINMUX(34, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO35 \
ESP32_PINMUX(35, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO36 \
ESP32_PINMUX(36, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO37 \
ESP32_PINMUX(37, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO38 \
ESP32_PINMUX(38, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO39 \
ESP32_PINMUX(39, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO40 \
ESP32_PINMUX(40, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO41 \
ESP32_PINMUX(41, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO42 \
ESP32_PINMUX(42, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO43 \
ESP32_PINMUX(43, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO44 \
ESP32_PINMUX(44, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO45 \
ESP32_PINMUX(45, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO46 \
ESP32_PINMUX(46, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO47 \
ESP32_PINMUX(47, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO48 \
ESP32_PINMUX(48, ESP_U0CTS_IN, ESP_NOSIG)
/* UART0_DSR */
#define UART0_DSR_GPIO0 \
ESP32_PINMUX(0, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO1 \
ESP32_PINMUX(1, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO2 \
ESP32_PINMUX(2, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO3 \
ESP32_PINMUX(3, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO4 \
ESP32_PINMUX(4, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO5 \
ESP32_PINMUX(5, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO6 \
ESP32_PINMUX(6, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO7 \
ESP32_PINMUX(7, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO8 \
ESP32_PINMUX(8, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO9 \
ESP32_PINMUX(9, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO10 \
ESP32_PINMUX(10, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO11 \
ESP32_PINMUX(11, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO12 \
ESP32_PINMUX(12, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO13 \
ESP32_PINMUX(13, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO14 \
ESP32_PINMUX(14, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO15 \
ESP32_PINMUX(15, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO16 \
ESP32_PINMUX(16, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO17 \
ESP32_PINMUX(17, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO18 \
ESP32_PINMUX(18, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO19 \
ESP32_PINMUX(19, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO20 \
ESP32_PINMUX(20, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO21 \
ESP32_PINMUX(21, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO26 \
ESP32_PINMUX(26, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO27 \
ESP32_PINMUX(27, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO28 \
ESP32_PINMUX(28, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO29 \
ESP32_PINMUX(29, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO30 \
ESP32_PINMUX(30, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO31 \
ESP32_PINMUX(31, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO32 \
ESP32_PINMUX(32, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO33 \
ESP32_PINMUX(33, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO34 \
ESP32_PINMUX(34, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO35 \
ESP32_PINMUX(35, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO36 \
ESP32_PINMUX(36, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO37 \
ESP32_PINMUX(37, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO38 \
ESP32_PINMUX(38, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO39 \
ESP32_PINMUX(39, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO40 \
ESP32_PINMUX(40, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO41 \
ESP32_PINMUX(41, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO42 \
ESP32_PINMUX(42, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO43 \
ESP32_PINMUX(43, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO44 \
ESP32_PINMUX(44, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO45 \
ESP32_PINMUX(45, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO46 \
ESP32_PINMUX(46, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO47 \
ESP32_PINMUX(47, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO48 \
ESP32_PINMUX(48, ESP_U0DSR_IN, ESP_NOSIG)
/* UART0_DTR */
#define UART0_DTR_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_U0DTR_OUT)
/* UART0_RTS */
#define UART0_RTS_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_U0RTS_OUT)
/* UART0_RX */
#define UART0_RX_GPIO0 \
ESP32_PINMUX(0, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO1 \
ESP32_PINMUX(1, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO2 \
ESP32_PINMUX(2, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO3 \
ESP32_PINMUX(3, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO4 \
ESP32_PINMUX(4, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO5 \
ESP32_PINMUX(5, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO6 \
ESP32_PINMUX(6, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO7 \
ESP32_PINMUX(7, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO8 \
ESP32_PINMUX(8, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO9 \
ESP32_PINMUX(9, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO10 \
ESP32_PINMUX(10, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO11 \
ESP32_PINMUX(11, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO12 \
ESP32_PINMUX(12, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO13 \
ESP32_PINMUX(13, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO14 \
ESP32_PINMUX(14, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO15 \
ESP32_PINMUX(15, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO16 \
ESP32_PINMUX(16, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO17 \
ESP32_PINMUX(17, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO18 \
ESP32_PINMUX(18, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO19 \
ESP32_PINMUX(19, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO20 \
ESP32_PINMUX(20, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO21 \
ESP32_PINMUX(21, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO26 \
ESP32_PINMUX(26, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO27 \
ESP32_PINMUX(27, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO28 \
ESP32_PINMUX(28, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO29 \
ESP32_PINMUX(29, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO30 \
ESP32_PINMUX(30, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO31 \
ESP32_PINMUX(31, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO32 \
ESP32_PINMUX(32, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO33 \
ESP32_PINMUX(33, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO34 \
ESP32_PINMUX(34, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO35 \
ESP32_PINMUX(35, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO36 \
ESP32_PINMUX(36, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO37 \
ESP32_PINMUX(37, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO38 \
ESP32_PINMUX(38, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO39 \
ESP32_PINMUX(39, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO40 \
ESP32_PINMUX(40, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO41 \
ESP32_PINMUX(41, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO42 \
ESP32_PINMUX(42, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO43 \
ESP32_PINMUX(43, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO44 \
ESP32_PINMUX(44, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO45 \
ESP32_PINMUX(45, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO46 \
ESP32_PINMUX(46, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO47 \
ESP32_PINMUX(47, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO48 \
ESP32_PINMUX(48, ESP_U0RXD_IN, ESP_NOSIG)
/* UART0_TX */
#define UART0_TX_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_U0TXD_OUT)
/* UART1_CTS */
#define UART1_CTS_GPIO0 \
ESP32_PINMUX(0, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO1 \
ESP32_PINMUX(1, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO2 \
ESP32_PINMUX(2, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO3 \
ESP32_PINMUX(3, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO4 \
ESP32_PINMUX(4, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO5 \
ESP32_PINMUX(5, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO6 \
ESP32_PINMUX(6, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO7 \
ESP32_PINMUX(7, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO8 \
ESP32_PINMUX(8, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO9 \
ESP32_PINMUX(9, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO10 \
ESP32_PINMUX(10, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO11 \
ESP32_PINMUX(11, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO12 \
ESP32_PINMUX(12, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO13 \
ESP32_PINMUX(13, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO14 \
ESP32_PINMUX(14, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO15 \
ESP32_PINMUX(15, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO16 \
ESP32_PINMUX(16, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO17 \
ESP32_PINMUX(17, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO18 \
ESP32_PINMUX(18, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO19 \
ESP32_PINMUX(19, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO20 \
ESP32_PINMUX(20, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO21 \
ESP32_PINMUX(21, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO26 \
ESP32_PINMUX(26, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO27 \
ESP32_PINMUX(27, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO28 \
ESP32_PINMUX(28, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO29 \
ESP32_PINMUX(29, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO30 \
ESP32_PINMUX(30, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO31 \
ESP32_PINMUX(31, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO32 \
ESP32_PINMUX(32, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO33 \
ESP32_PINMUX(33, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO34 \
ESP32_PINMUX(34, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO35 \
ESP32_PINMUX(35, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO36 \
ESP32_PINMUX(36, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO37 \
ESP32_PINMUX(37, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO38 \
ESP32_PINMUX(38, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO39 \
ESP32_PINMUX(39, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO40 \
ESP32_PINMUX(40, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO41 \
ESP32_PINMUX(41, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO42 \
ESP32_PINMUX(42, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO43 \
ESP32_PINMUX(43, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO44 \
ESP32_PINMUX(44, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO45 \
ESP32_PINMUX(45, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO46 \
ESP32_PINMUX(46, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO47 \
ESP32_PINMUX(47, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO48 \
ESP32_PINMUX(48, ESP_U1CTS_IN, ESP_NOSIG)
/* UART1_DSR */
#define UART1_DSR_GPIO0 \
ESP32_PINMUX(0, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO1 \
ESP32_PINMUX(1, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO2 \
ESP32_PINMUX(2, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO3 \
ESP32_PINMUX(3, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO4 \
ESP32_PINMUX(4, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO5 \
ESP32_PINMUX(5, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO6 \
ESP32_PINMUX(6, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO7 \
ESP32_PINMUX(7, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO8 \
ESP32_PINMUX(8, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO9 \
ESP32_PINMUX(9, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO10 \
ESP32_PINMUX(10, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO11 \
ESP32_PINMUX(11, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO12 \
ESP32_PINMUX(12, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO13 \
ESP32_PINMUX(13, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO14 \
ESP32_PINMUX(14, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO15 \
ESP32_PINMUX(15, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO16 \
ESP32_PINMUX(16, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO17 \
ESP32_PINMUX(17, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO18 \
ESP32_PINMUX(18, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO19 \
ESP32_PINMUX(19, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO20 \
ESP32_PINMUX(20, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO21 \
ESP32_PINMUX(21, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO26 \
ESP32_PINMUX(26, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO27 \
ESP32_PINMUX(27, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO28 \
ESP32_PINMUX(28, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO29 \
ESP32_PINMUX(29, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO30 \
ESP32_PINMUX(30, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO31 \
ESP32_PINMUX(31, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO32 \
ESP32_PINMUX(32, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO33 \
ESP32_PINMUX(33, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO34 \
ESP32_PINMUX(34, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO35 \
ESP32_PINMUX(35, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO36 \
ESP32_PINMUX(36, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO37 \
ESP32_PINMUX(37, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO38 \
ESP32_PINMUX(38, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO39 \
ESP32_PINMUX(39, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO40 \
ESP32_PINMUX(40, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO41 \
ESP32_PINMUX(41, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO42 \
ESP32_PINMUX(42, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO43 \
ESP32_PINMUX(43, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO44 \
ESP32_PINMUX(44, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO45 \
ESP32_PINMUX(45, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO46 \
ESP32_PINMUX(46, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO47 \
ESP32_PINMUX(47, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO48 \
ESP32_PINMUX(48, ESP_U1DSR_IN, ESP_NOSIG)
/* UART1_DTR */
#define UART1_DTR_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_U1DTR_OUT)
/* UART1_RTS */
#define UART1_RTS_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_U1RTS_OUT)
/* UART1_RX */
#define UART1_RX_GPIO0 \
ESP32_PINMUX(0, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO1 \
ESP32_PINMUX(1, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO2 \
ESP32_PINMUX(2, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO3 \
ESP32_PINMUX(3, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO4 \
ESP32_PINMUX(4, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO5 \
ESP32_PINMUX(5, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO6 \
ESP32_PINMUX(6, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO7 \
ESP32_PINMUX(7, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO8 \
ESP32_PINMUX(8, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO9 \
ESP32_PINMUX(9, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO10 \
ESP32_PINMUX(10, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO11 \
ESP32_PINMUX(11, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO12 \
ESP32_PINMUX(12, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO13 \
ESP32_PINMUX(13, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO14 \
ESP32_PINMUX(14, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO15 \
ESP32_PINMUX(15, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO16 \
ESP32_PINMUX(16, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO17 \
ESP32_PINMUX(17, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO18 \
ESP32_PINMUX(18, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO19 \
ESP32_PINMUX(19, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO20 \
ESP32_PINMUX(20, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO21 \
ESP32_PINMUX(21, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO26 \
ESP32_PINMUX(26, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO27 \
ESP32_PINMUX(27, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO28 \
ESP32_PINMUX(28, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO29 \
ESP32_PINMUX(29, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO30 \
ESP32_PINMUX(30, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO31 \
ESP32_PINMUX(31, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO32 \
ESP32_PINMUX(32, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO33 \
ESP32_PINMUX(33, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO34 \
ESP32_PINMUX(34, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO35 \
ESP32_PINMUX(35, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO36 \
ESP32_PINMUX(36, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO37 \
ESP32_PINMUX(37, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO38 \
ESP32_PINMUX(38, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO39 \
ESP32_PINMUX(39, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO40 \
ESP32_PINMUX(40, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO41 \
ESP32_PINMUX(41, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO42 \
ESP32_PINMUX(42, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO43 \
ESP32_PINMUX(43, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO44 \
ESP32_PINMUX(44, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO45 \
ESP32_PINMUX(45, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO46 \
ESP32_PINMUX(46, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO47 \
ESP32_PINMUX(47, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO48 \
ESP32_PINMUX(48, ESP_U1RXD_IN, ESP_NOSIG)
/* UART1_TX */
#define UART1_TX_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_U1TXD_OUT)
/* UART2_CTS */
#define UART2_CTS_GPIO0 \
ESP32_PINMUX(0, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO1 \
ESP32_PINMUX(1, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO2 \
ESP32_PINMUX(2, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO3 \
ESP32_PINMUX(3, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO4 \
ESP32_PINMUX(4, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO5 \
ESP32_PINMUX(5, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO6 \
ESP32_PINMUX(6, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO7 \
ESP32_PINMUX(7, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO8 \
ESP32_PINMUX(8, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO9 \
ESP32_PINMUX(9, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO10 \
ESP32_PINMUX(10, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO11 \
ESP32_PINMUX(11, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO12 \
ESP32_PINMUX(12, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO13 \
ESP32_PINMUX(13, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO14 \
ESP32_PINMUX(14, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO15 \
ESP32_PINMUX(15, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO16 \
ESP32_PINMUX(16, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO17 \
ESP32_PINMUX(17, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO18 \
ESP32_PINMUX(18, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO19 \
ESP32_PINMUX(19, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO20 \
ESP32_PINMUX(20, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO21 \
ESP32_PINMUX(21, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO26 \
ESP32_PINMUX(26, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO27 \
ESP32_PINMUX(27, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO28 \
ESP32_PINMUX(28, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO29 \
ESP32_PINMUX(29, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO30 \
ESP32_PINMUX(30, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO31 \
ESP32_PINMUX(31, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO32 \
ESP32_PINMUX(32, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO33 \
ESP32_PINMUX(33, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO34 \
ESP32_PINMUX(34, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO35 \
ESP32_PINMUX(35, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO36 \
ESP32_PINMUX(36, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO37 \
ESP32_PINMUX(37, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO38 \
ESP32_PINMUX(38, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO39 \
ESP32_PINMUX(39, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO40 \
ESP32_PINMUX(40, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO41 \
ESP32_PINMUX(41, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO42 \
ESP32_PINMUX(42, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO43 \
ESP32_PINMUX(43, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO44 \
ESP32_PINMUX(44, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO45 \
ESP32_PINMUX(45, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO46 \
ESP32_PINMUX(46, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO47 \
ESP32_PINMUX(47, ESP_U2CTS_IN, ESP_NOSIG)
#define UART2_CTS_GPIO48 \
ESP32_PINMUX(48, ESP_U2CTS_IN, ESP_NOSIG)
/* UART2_RTS */
#define UART2_RTS_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_U2RTS_OUT)
#define UART2_RTS_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_U2RTS_OUT)
/* UART2_RX */
#define UART2_RX_GPIO0 \
ESP32_PINMUX(0, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO1 \
ESP32_PINMUX(1, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO2 \
ESP32_PINMUX(2, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO3 \
ESP32_PINMUX(3, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO4 \
ESP32_PINMUX(4, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO5 \
ESP32_PINMUX(5, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO6 \
ESP32_PINMUX(6, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO7 \
ESP32_PINMUX(7, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO8 \
ESP32_PINMUX(8, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO9 \
ESP32_PINMUX(9, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO10 \
ESP32_PINMUX(10, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO11 \
ESP32_PINMUX(11, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO12 \
ESP32_PINMUX(12, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO13 \
ESP32_PINMUX(13, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO14 \
ESP32_PINMUX(14, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO15 \
ESP32_PINMUX(15, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO16 \
ESP32_PINMUX(16, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO17 \
ESP32_PINMUX(17, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO18 \
ESP32_PINMUX(18, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO19 \
ESP32_PINMUX(19, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO20 \
ESP32_PINMUX(20, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO21 \
ESP32_PINMUX(21, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO26 \
ESP32_PINMUX(26, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO27 \
ESP32_PINMUX(27, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO28 \
ESP32_PINMUX(28, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO29 \
ESP32_PINMUX(29, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO30 \
ESP32_PINMUX(30, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO31 \
ESP32_PINMUX(31, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO32 \
ESP32_PINMUX(32, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO33 \
ESP32_PINMUX(33, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO34 \
ESP32_PINMUX(34, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO35 \
ESP32_PINMUX(35, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO36 \
ESP32_PINMUX(36, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO37 \
ESP32_PINMUX(37, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO38 \
ESP32_PINMUX(38, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO39 \
ESP32_PINMUX(39, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO40 \
ESP32_PINMUX(40, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO41 \
ESP32_PINMUX(41, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO42 \
ESP32_PINMUX(42, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO43 \
ESP32_PINMUX(43, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO44 \
ESP32_PINMUX(44, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO45 \
ESP32_PINMUX(45, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO46 \
ESP32_PINMUX(46, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO47 \
ESP32_PINMUX(47, ESP_U2RXD_IN, ESP_NOSIG)
#define UART2_RX_GPIO48 \
ESP32_PINMUX(48, ESP_U2RXD_IN, ESP_NOSIG)
/* UART2_TX */
#define UART2_TX_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO47 \
ESP32_PINMUX(47, ESP_NOSIG, ESP_U2TXD_OUT)
#define UART2_TX_GPIO48 \
ESP32_PINMUX(48, ESP_NOSIG, ESP_U2TXD_OUT)
#endif /* INC_DT_BINDS_PINCTRL_ESP32S3_PINCTRL_HAL_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/esp32s3-pinctrl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 148,747 |
```objective-c
/*
*
*
* NOTE: Autogenerated file using esp_genpinctrl.py
*/
#ifndef INC_DT_BINDS_PINCTRL_ESP32C2_PINCTRL_HAL_H_
#define INC_DT_BINDS_PINCTRL_ESP32C2_PINCTRL_HAL_H_
/* UART0_CTS */
#define UART0_CTS_GPIO0 \
ESP32_PINMUX(0, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO1 \
ESP32_PINMUX(1, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO2 \
ESP32_PINMUX(2, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO3 \
ESP32_PINMUX(3, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO4 \
ESP32_PINMUX(4, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO5 \
ESP32_PINMUX(5, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO6 \
ESP32_PINMUX(6, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO7 \
ESP32_PINMUX(7, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO8 \
ESP32_PINMUX(8, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO9 \
ESP32_PINMUX(9, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO10 \
ESP32_PINMUX(10, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO18 \
ESP32_PINMUX(18, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO19 \
ESP32_PINMUX(19, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO20 \
ESP32_PINMUX(20, ESP_U0CTS_IN, ESP_NOSIG)
/* UART0_DSR */
#define UART0_DSR_GPIO0 \
ESP32_PINMUX(0, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO1 \
ESP32_PINMUX(1, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO2 \
ESP32_PINMUX(2, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO3 \
ESP32_PINMUX(3, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO4 \
ESP32_PINMUX(4, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO5 \
ESP32_PINMUX(5, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO6 \
ESP32_PINMUX(6, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO7 \
ESP32_PINMUX(7, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO8 \
ESP32_PINMUX(8, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO9 \
ESP32_PINMUX(9, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO10 \
ESP32_PINMUX(10, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO18 \
ESP32_PINMUX(18, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO19 \
ESP32_PINMUX(19, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO20 \
ESP32_PINMUX(20, ESP_U0DSR_IN, ESP_NOSIG)
/* UART0_DTR */
#define UART0_DTR_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_U0DTR_OUT)
/* UART0_RTS */
#define UART0_RTS_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_U0RTS_OUT)
/* UART0_RX */
#define UART0_RX_GPIO0 \
ESP32_PINMUX(0, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO1 \
ESP32_PINMUX(1, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO2 \
ESP32_PINMUX(2, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO3 \
ESP32_PINMUX(3, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO4 \
ESP32_PINMUX(4, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO5 \
ESP32_PINMUX(5, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO6 \
ESP32_PINMUX(6, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO7 \
ESP32_PINMUX(7, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO8 \
ESP32_PINMUX(8, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO9 \
ESP32_PINMUX(9, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO10 \
ESP32_PINMUX(10, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO18 \
ESP32_PINMUX(18, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO19 \
ESP32_PINMUX(19, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO20 \
ESP32_PINMUX(20, ESP_U0RXD_IN, ESP_NOSIG)
/* UART0_TX */
#define UART0_TX_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_U0TXD_OUT)
/* UART1_CTS */
#define UART1_CTS_GPIO0 \
ESP32_PINMUX(0, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO1 \
ESP32_PINMUX(1, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO2 \
ESP32_PINMUX(2, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO3 \
ESP32_PINMUX(3, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO4 \
ESP32_PINMUX(4, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO5 \
ESP32_PINMUX(5, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO6 \
ESP32_PINMUX(6, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO7 \
ESP32_PINMUX(7, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO8 \
ESP32_PINMUX(8, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO9 \
ESP32_PINMUX(9, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO10 \
ESP32_PINMUX(10, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO18 \
ESP32_PINMUX(18, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO19 \
ESP32_PINMUX(19, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO20 \
ESP32_PINMUX(20, ESP_U1CTS_IN, ESP_NOSIG)
/* UART1_DSR */
#define UART1_DSR_GPIO0 \
ESP32_PINMUX(0, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO1 \
ESP32_PINMUX(1, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO2 \
ESP32_PINMUX(2, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO3 \
ESP32_PINMUX(3, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO4 \
ESP32_PINMUX(4, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO5 \
ESP32_PINMUX(5, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO6 \
ESP32_PINMUX(6, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO7 \
ESP32_PINMUX(7, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO8 \
ESP32_PINMUX(8, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO9 \
ESP32_PINMUX(9, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO10 \
ESP32_PINMUX(10, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO18 \
ESP32_PINMUX(18, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO19 \
ESP32_PINMUX(19, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO20 \
ESP32_PINMUX(20, ESP_U1DSR_IN, ESP_NOSIG)
/* UART1_DTR */
#define UART1_DTR_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_U1DTR_OUT)
/* UART1_RTS */
#define UART1_RTS_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_U1RTS_OUT)
/* UART1_RX */
#define UART1_RX_GPIO0 \
ESP32_PINMUX(0, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO1 \
ESP32_PINMUX(1, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO2 \
ESP32_PINMUX(2, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO3 \
ESP32_PINMUX(3, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO4 \
ESP32_PINMUX(4, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO5 \
ESP32_PINMUX(5, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO6 \
ESP32_PINMUX(6, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO7 \
ESP32_PINMUX(7, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO8 \
ESP32_PINMUX(8, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO9 \
ESP32_PINMUX(9, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO10 \
ESP32_PINMUX(10, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO18 \
ESP32_PINMUX(18, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO19 \
ESP32_PINMUX(19, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO20 \
ESP32_PINMUX(20, ESP_U1RXD_IN, ESP_NOSIG)
/* UART1_TX */
#define UART1_TX_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_U1TXD_OUT)
#endif /* INC_DT_BINDS_PINCTRL_ESP32C2_PINCTRL_HAL_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/esp32c2-pinctrl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 4,760 |
```objective-c
/*
*
*/
#ifndef CC13XX_CC26XX_PINCTRL_COMMON_H_
#define CC13XX_CC26XX_PINCTRL_COMMON_H_
/* Adapted from hal/ti/simplelink/source/ti/devices/cc13x2_cc26x2/driverlib/ioc.h */
/* IOC Peripheral Port Mapping */
#define IOC_PORT_GPIO 0x00000000 /* Default general purpose IO usage */
#define IOC_PORT_AON_CLK32K 0x00000007 /* AON External 32kHz clock */
#define IOC_PORT_AUX_IO 0x00000008 /* AUX IO Pin */
#define IOC_PORT_MCU_SSI0_RX 0x00000009 /* MCU SSI0 Receive Pin */
#define IOC_PORT_MCU_SSI0_TX 0x0000000A /* MCU SSI0 Transmit Pin */
#define IOC_PORT_MCU_SSI0_FSS 0x0000000B /* MCU SSI0 FSS Pin */
#define IOC_PORT_MCU_SSI0_CLK 0x0000000C /* MCU SSI0 Clock Pin */
#define IOC_PORT_MCU_I2C_MSSDA 0x0000000D /* MCU I2C Data Pin */
#define IOC_PORT_MCU_I2C_MSSCL 0x0000000E /* MCU I2C Clock Pin */
#define IOC_PORT_MCU_UART0_RX 0x0000000F /* MCU UART0 Receive Pin */
#define IOC_PORT_MCU_UART0_TX 0x00000010 /* MCU UART0 Transmit Pin */
#define IOC_PORT_MCU_UART0_CTS 0x00000011 /* MCU UART0 Clear To Send Pin */
#define IOC_PORT_MCU_UART0_RTS 0x00000012 /* MCU UART0 Request To Send Pin */
#define IOC_PORT_MCU_UART1_RX 0x00000013 /* MCU UART1 Receive Pin */
#define IOC_PORT_MCU_UART1_TX 0x00000014 /* MCU UART1 Transmit Pin */
#define IOC_PORT_MCU_UART1_CTS 0x00000015 /* MCU UART1 Clear To Send Pin */
#define IOC_PORT_MCU_UART1_RTS 0x00000016 /* MCU UART1 Request To Send Pin */
#define IOC_PORT_MCU_PORT_EVENT0 0x00000017 /* MCU PORT EVENT 0 */
#define IOC_PORT_MCU_PORT_EVENT1 0x00000018 /* MCU PORT EVENT 1 */
#define IOC_PORT_MCU_PORT_EVENT2 0x00000019 /* MCU PORT EVENT 2 */
#define IOC_PORT_MCU_PORT_EVENT3 0x0000001A /* MCU PORT EVENT 3 */
#define IOC_PORT_MCU_PORT_EVENT4 0x0000001B /* MCU PORT EVENT 4 */
#define IOC_PORT_MCU_PORT_EVENT5 0x0000001C /* MCU PORT EVENT 5 */
#define IOC_PORT_MCU_PORT_EVENT6 0x0000001D /* MCU PORT EVENT 6 */
#define IOC_PORT_MCU_PORT_EVENT7 0x0000001E /* MCU PORT EVENT 7 */
#define IOC_PORT_MCU_SWV 0x00000020 /* Serial Wire Viewer */
#define IOC_PORT_MCU_SSI1_RX 0x00000021 /* MCU SSI1 Receive Pin */
#define IOC_PORT_MCU_SSI1_TX 0x00000022 /* MCU SSI1 Transmit Pin */
#define IOC_PORT_MCU_SSI1_FSS 0x00000023 /* MCU SSI1 FSS Pin */
#define IOC_PORT_MCU_SSI1_CLK 0x00000024 /* MCU SSI1 Clock Pin */
#define IOC_PORT_MCU_I2S_AD0 0x00000025 /* MCU I2S Data Pin 0 */
#define IOC_PORT_MCU_I2S_AD1 0x00000026 /* MCU I2S Data Pin 1 */
#define IOC_PORT_MCU_I2S_WCLK 0x00000027 /* MCU I2S Frame/Word Clock */
#define IOC_PORT_MCU_I2S_BCLK 0x00000028 /* MCU I2S Bit Clock */
#define IOC_PORT_MCU_I2S_MCLK 0x00000029 /* MCU I2S Master clock 2 */
#define IOC_PORT_RFC_TRC 0x0000002E /* RF Core Tracer */
#define IOC_PORT_RFC_GPO0 0x0000002F /* RC Core Data Out Pin 0 */
#define IOC_PORT_RFC_GPO1 0x00000030 /* RC Core Data Out Pin 1 */
#define IOC_PORT_RFC_GPO2 0x00000031 /* RC Core Data Out Pin 2 */
#define IOC_PORT_RFC_GPO3 0x00000032 /* RC Core Data Out Pin 3 */
#define IOC_PORT_RFC_GPI0 0x00000033 /* RC Core Data In Pin 0 */
#define IOC_PORT_RFC_GPI1 0x00000034 /* RC Core Data In Pin 1 */
#define IOC_PORT_RFC_SMI_DL_OUT 0x00000035 /* RF Core SMI Data Link Out */
#define IOC_PORT_RFC_SMI_DL_IN 0x00000036 /* RF Core SMI Data Link in */
#define IOC_PORT_RFC_SMI_CL_OUT 0x00000037 /* RF Core SMI Command Link Out */
#define IOC_PORT_RFC_SMI_CL_IN 0x00000038 /* RF Core SMI Command Link In */
/* Edge Detection */
#define IOC_NO_EDGE 0x00000000 /* No edge detection */
#define IOC_FALLING_EDGE 0x00010000 /* Edge detection on falling edge */
#define IOC_RISING_EDGE 0x00020000 /* Edge detection on rising edge */
#define IOC_BOTH_EDGES 0x00030000 /* Edge detection on both edges */
#endif /* CC13XX_CC26XX_PINCTRL_COMMON_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/cc13xx_cc26xx-pinctrl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,299 |
```objective-c
/*
*
*
* NOTE: Autogenerated file using esp_genpinctrl.py
*/
#ifndef INC_DT_BINDS_PINCTRL_ESP32S2_PINCTRL_HAL_H_
#define INC_DT_BINDS_PINCTRL_ESP32S2_PINCTRL_HAL_H_
/* I2C0_SCL */
#define I2C0_SCL_GPIO0 \
ESP32_PINMUX(0, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO1 \
ESP32_PINMUX(1, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO2 \
ESP32_PINMUX(2, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO3 \
ESP32_PINMUX(3, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO4 \
ESP32_PINMUX(4, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO5 \
ESP32_PINMUX(5, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO6 \
ESP32_PINMUX(6, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO7 \
ESP32_PINMUX(7, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO8 \
ESP32_PINMUX(8, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO9 \
ESP32_PINMUX(9, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO10 \
ESP32_PINMUX(10, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO11 \
ESP32_PINMUX(11, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO12 \
ESP32_PINMUX(12, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO13 \
ESP32_PINMUX(13, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO14 \
ESP32_PINMUX(14, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO15 \
ESP32_PINMUX(15, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO16 \
ESP32_PINMUX(16, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO17 \
ESP32_PINMUX(17, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO18 \
ESP32_PINMUX(18, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO19 \
ESP32_PINMUX(19, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO20 \
ESP32_PINMUX(20, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO21 \
ESP32_PINMUX(21, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO26 \
ESP32_PINMUX(26, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO27 \
ESP32_PINMUX(27, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO28 \
ESP32_PINMUX(28, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO29 \
ESP32_PINMUX(29, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO30 \
ESP32_PINMUX(30, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO31 \
ESP32_PINMUX(31, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO32 \
ESP32_PINMUX(32, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO33 \
ESP32_PINMUX(33, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO34 \
ESP32_PINMUX(34, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO35 \
ESP32_PINMUX(35, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO36 \
ESP32_PINMUX(36, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO37 \
ESP32_PINMUX(37, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO38 \
ESP32_PINMUX(38, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO39 \
ESP32_PINMUX(39, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO40 \
ESP32_PINMUX(40, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO41 \
ESP32_PINMUX(41, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO42 \
ESP32_PINMUX(42, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO43 \
ESP32_PINMUX(43, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO44 \
ESP32_PINMUX(44, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO45 \
ESP32_PINMUX(45, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
/* I2C0_SDA */
#define I2C0_SDA_GPIO0 \
ESP32_PINMUX(0, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO1 \
ESP32_PINMUX(1, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO2 \
ESP32_PINMUX(2, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO3 \
ESP32_PINMUX(3, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO4 \
ESP32_PINMUX(4, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO5 \
ESP32_PINMUX(5, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO6 \
ESP32_PINMUX(6, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO7 \
ESP32_PINMUX(7, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO8 \
ESP32_PINMUX(8, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO9 \
ESP32_PINMUX(9, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO10 \
ESP32_PINMUX(10, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO11 \
ESP32_PINMUX(11, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO12 \
ESP32_PINMUX(12, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO13 \
ESP32_PINMUX(13, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO14 \
ESP32_PINMUX(14, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO15 \
ESP32_PINMUX(15, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO16 \
ESP32_PINMUX(16, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO17 \
ESP32_PINMUX(17, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO18 \
ESP32_PINMUX(18, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO19 \
ESP32_PINMUX(19, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO20 \
ESP32_PINMUX(20, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO21 \
ESP32_PINMUX(21, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO26 \
ESP32_PINMUX(26, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO27 \
ESP32_PINMUX(27, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO28 \
ESP32_PINMUX(28, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO29 \
ESP32_PINMUX(29, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO30 \
ESP32_PINMUX(30, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO31 \
ESP32_PINMUX(31, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO32 \
ESP32_PINMUX(32, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO33 \
ESP32_PINMUX(33, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO34 \
ESP32_PINMUX(34, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO35 \
ESP32_PINMUX(35, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO36 \
ESP32_PINMUX(36, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO37 \
ESP32_PINMUX(37, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO38 \
ESP32_PINMUX(38, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO39 \
ESP32_PINMUX(39, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO40 \
ESP32_PINMUX(40, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO41 \
ESP32_PINMUX(41, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO42 \
ESP32_PINMUX(42, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO43 \
ESP32_PINMUX(43, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO44 \
ESP32_PINMUX(44, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO45 \
ESP32_PINMUX(45, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
/* I2C1_SCL */
#define I2C1_SCL_GPIO0 \
ESP32_PINMUX(0, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO1 \
ESP32_PINMUX(1, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO2 \
ESP32_PINMUX(2, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO3 \
ESP32_PINMUX(3, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO4 \
ESP32_PINMUX(4, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO5 \
ESP32_PINMUX(5, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO6 \
ESP32_PINMUX(6, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO7 \
ESP32_PINMUX(7, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO8 \
ESP32_PINMUX(8, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO9 \
ESP32_PINMUX(9, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO10 \
ESP32_PINMUX(10, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO11 \
ESP32_PINMUX(11, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO12 \
ESP32_PINMUX(12, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO13 \
ESP32_PINMUX(13, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO14 \
ESP32_PINMUX(14, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO15 \
ESP32_PINMUX(15, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO16 \
ESP32_PINMUX(16, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO17 \
ESP32_PINMUX(17, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO18 \
ESP32_PINMUX(18, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO19 \
ESP32_PINMUX(19, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO20 \
ESP32_PINMUX(20, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO21 \
ESP32_PINMUX(21, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO26 \
ESP32_PINMUX(26, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO27 \
ESP32_PINMUX(27, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO28 \
ESP32_PINMUX(28, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO29 \
ESP32_PINMUX(29, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO30 \
ESP32_PINMUX(30, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO31 \
ESP32_PINMUX(31, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO32 \
ESP32_PINMUX(32, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO33 \
ESP32_PINMUX(33, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO34 \
ESP32_PINMUX(34, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO35 \
ESP32_PINMUX(35, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO36 \
ESP32_PINMUX(36, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO37 \
ESP32_PINMUX(37, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO38 \
ESP32_PINMUX(38, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO39 \
ESP32_PINMUX(39, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO40 \
ESP32_PINMUX(40, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO41 \
ESP32_PINMUX(41, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO42 \
ESP32_PINMUX(42, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO43 \
ESP32_PINMUX(43, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO44 \
ESP32_PINMUX(44, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
#define I2C1_SCL_GPIO45 \
ESP32_PINMUX(45, ESP_I2CEXT1_SCL_IN, ESP_I2CEXT1_SCL_OUT)
/* I2C1_SDA */
#define I2C1_SDA_GPIO0 \
ESP32_PINMUX(0, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO1 \
ESP32_PINMUX(1, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO2 \
ESP32_PINMUX(2, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO3 \
ESP32_PINMUX(3, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO4 \
ESP32_PINMUX(4, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO5 \
ESP32_PINMUX(5, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO6 \
ESP32_PINMUX(6, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO7 \
ESP32_PINMUX(7, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO8 \
ESP32_PINMUX(8, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO9 \
ESP32_PINMUX(9, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO10 \
ESP32_PINMUX(10, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO11 \
ESP32_PINMUX(11, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO12 \
ESP32_PINMUX(12, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO13 \
ESP32_PINMUX(13, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO14 \
ESP32_PINMUX(14, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO15 \
ESP32_PINMUX(15, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO16 \
ESP32_PINMUX(16, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO17 \
ESP32_PINMUX(17, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO18 \
ESP32_PINMUX(18, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO19 \
ESP32_PINMUX(19, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO20 \
ESP32_PINMUX(20, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO21 \
ESP32_PINMUX(21, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO26 \
ESP32_PINMUX(26, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO27 \
ESP32_PINMUX(27, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO28 \
ESP32_PINMUX(28, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO29 \
ESP32_PINMUX(29, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO30 \
ESP32_PINMUX(30, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO31 \
ESP32_PINMUX(31, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO32 \
ESP32_PINMUX(32, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO33 \
ESP32_PINMUX(33, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO34 \
ESP32_PINMUX(34, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO35 \
ESP32_PINMUX(35, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO36 \
ESP32_PINMUX(36, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO37 \
ESP32_PINMUX(37, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO38 \
ESP32_PINMUX(38, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO39 \
ESP32_PINMUX(39, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO40 \
ESP32_PINMUX(40, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO41 \
ESP32_PINMUX(41, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO42 \
ESP32_PINMUX(42, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO43 \
ESP32_PINMUX(43, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO44 \
ESP32_PINMUX(44, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
#define I2C1_SDA_GPIO45 \
ESP32_PINMUX(45, ESP_I2CEXT1_SDA_IN, ESP_I2CEXT1_SDA_OUT)
/* LEDC_CH0 */
#define LEDC_CH0_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
/* LEDC_CH1 */
#define LEDC_CH1_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
/* LEDC_CH2 */
#define LEDC_CH2_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
/* LEDC_CH3 */
#define LEDC_CH3_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
/* LEDC_CH4 */
#define LEDC_CH4_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
/* LEDC_CH5 */
#define LEDC_CH5_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
/* LEDC_CH6 */
#define LEDC_CH6_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
#define LEDC_CH6_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT6)
/* LEDC_CH7 */
#define LEDC_CH7_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
#define LEDC_CH7_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT7)
/* PCNT0_CH0CTRL */
#define PCNT0_CH0CTRL_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO28 \
ESP32_PINMUX(28, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO29 \
ESP32_PINMUX(29, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO30 \
ESP32_PINMUX(30, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO31 \
ESP32_PINMUX(31, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO40 \
ESP32_PINMUX(40, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO41 \
ESP32_PINMUX(41, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO42 \
ESP32_PINMUX(42, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO43 \
ESP32_PINMUX(43, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO44 \
ESP32_PINMUX(44, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO45 \
ESP32_PINMUX(45, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0CTRL_GPIO46 \
ESP32_PINMUX(46, ESP_PCNT_CTRL_CH0_IN0, ESP_NOSIG)
/* PCNT0_CH0SIG */
#define PCNT0_CH0SIG_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO28 \
ESP32_PINMUX(28, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO29 \
ESP32_PINMUX(29, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO30 \
ESP32_PINMUX(30, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO31 \
ESP32_PINMUX(31, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO40 \
ESP32_PINMUX(40, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO41 \
ESP32_PINMUX(41, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO42 \
ESP32_PINMUX(42, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO43 \
ESP32_PINMUX(43, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO44 \
ESP32_PINMUX(44, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO45 \
ESP32_PINMUX(45, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
#define PCNT0_CH0SIG_GPIO46 \
ESP32_PINMUX(46, ESP_PCNT_SIG_CH0_IN0, ESP_NOSIG)
/* PCNT0_CH1CTRL */
#define PCNT0_CH1CTRL_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO28 \
ESP32_PINMUX(28, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO29 \
ESP32_PINMUX(29, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO30 \
ESP32_PINMUX(30, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO31 \
ESP32_PINMUX(31, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO40 \
ESP32_PINMUX(40, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO41 \
ESP32_PINMUX(41, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO42 \
ESP32_PINMUX(42, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO43 \
ESP32_PINMUX(43, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO44 \
ESP32_PINMUX(44, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO45 \
ESP32_PINMUX(45, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1CTRL_GPIO46 \
ESP32_PINMUX(46, ESP_PCNT_CTRL_CH1_IN0, ESP_NOSIG)
/* PCNT0_CH1SIG */
#define PCNT0_CH1SIG_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO28 \
ESP32_PINMUX(28, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO29 \
ESP32_PINMUX(29, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO30 \
ESP32_PINMUX(30, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO31 \
ESP32_PINMUX(31, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO40 \
ESP32_PINMUX(40, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO41 \
ESP32_PINMUX(41, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO42 \
ESP32_PINMUX(42, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO43 \
ESP32_PINMUX(43, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO44 \
ESP32_PINMUX(44, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO45 \
ESP32_PINMUX(45, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
#define PCNT0_CH1SIG_GPIO46 \
ESP32_PINMUX(46, ESP_PCNT_SIG_CH1_IN0, ESP_NOSIG)
/* PCNT1_CH0CTRL */
#define PCNT1_CH0CTRL_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO28 \
ESP32_PINMUX(28, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO29 \
ESP32_PINMUX(29, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO30 \
ESP32_PINMUX(30, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO31 \
ESP32_PINMUX(31, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO40 \
ESP32_PINMUX(40, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO41 \
ESP32_PINMUX(41, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO42 \
ESP32_PINMUX(42, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO43 \
ESP32_PINMUX(43, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO44 \
ESP32_PINMUX(44, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO45 \
ESP32_PINMUX(45, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0CTRL_GPIO46 \
ESP32_PINMUX(46, ESP_PCNT_CTRL_CH0_IN1, ESP_NOSIG)
/* PCNT1_CH0SIG */
#define PCNT1_CH0SIG_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO28 \
ESP32_PINMUX(28, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO29 \
ESP32_PINMUX(29, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO30 \
ESP32_PINMUX(30, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO31 \
ESP32_PINMUX(31, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO40 \
ESP32_PINMUX(40, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO41 \
ESP32_PINMUX(41, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO42 \
ESP32_PINMUX(42, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO43 \
ESP32_PINMUX(43, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO44 \
ESP32_PINMUX(44, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO45 \
ESP32_PINMUX(45, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
#define PCNT1_CH0SIG_GPIO46 \
ESP32_PINMUX(46, ESP_PCNT_SIG_CH0_IN1, ESP_NOSIG)
/* PCNT1_CH1CTRL */
#define PCNT1_CH1CTRL_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO28 \
ESP32_PINMUX(28, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO29 \
ESP32_PINMUX(29, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO30 \
ESP32_PINMUX(30, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO31 \
ESP32_PINMUX(31, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO40 \
ESP32_PINMUX(40, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO41 \
ESP32_PINMUX(41, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO42 \
ESP32_PINMUX(42, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO43 \
ESP32_PINMUX(43, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO44 \
ESP32_PINMUX(44, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO45 \
ESP32_PINMUX(45, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1CTRL_GPIO46 \
ESP32_PINMUX(46, ESP_PCNT_CTRL_CH1_IN1, ESP_NOSIG)
/* PCNT1_CH1SIG */
#define PCNT1_CH1SIG_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO28 \
ESP32_PINMUX(28, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO29 \
ESP32_PINMUX(29, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO30 \
ESP32_PINMUX(30, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO31 \
ESP32_PINMUX(31, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO40 \
ESP32_PINMUX(40, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO41 \
ESP32_PINMUX(41, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO42 \
ESP32_PINMUX(42, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO43 \
ESP32_PINMUX(43, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO44 \
ESP32_PINMUX(44, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO45 \
ESP32_PINMUX(45, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
#define PCNT1_CH1SIG_GPIO46 \
ESP32_PINMUX(46, ESP_PCNT_SIG_CH1_IN1, ESP_NOSIG)
/* PCNT2_CH0CTRL */
#define PCNT2_CH0CTRL_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO28 \
ESP32_PINMUX(28, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO29 \
ESP32_PINMUX(29, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO30 \
ESP32_PINMUX(30, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO31 \
ESP32_PINMUX(31, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO40 \
ESP32_PINMUX(40, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO41 \
ESP32_PINMUX(41, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO42 \
ESP32_PINMUX(42, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO43 \
ESP32_PINMUX(43, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO44 \
ESP32_PINMUX(44, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO45 \
ESP32_PINMUX(45, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
#define PCNT2_CH0CTRL_GPIO46 \
ESP32_PINMUX(46, ESP_PCNT_CTRL_CH0_IN2, ESP_NOSIG)
/* PCNT2_CH0SIG */
#define PCNT2_CH0SIG_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO28 \
ESP32_PINMUX(28, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO29 \
ESP32_PINMUX(29, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO30 \
ESP32_PINMUX(30, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO31 \
ESP32_PINMUX(31, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO40 \
ESP32_PINMUX(40, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO41 \
ESP32_PINMUX(41, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO42 \
ESP32_PINMUX(42, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO43 \
ESP32_PINMUX(43, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO44 \
ESP32_PINMUX(44, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO45 \
ESP32_PINMUX(45, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT2_CH0SIG_GPIO46 \
ESP32_PINMUX(46, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
/* PCNT2_CH1CTRL */
#define PCNT2_CH1CTRL_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO28 \
ESP32_PINMUX(28, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO29 \
ESP32_PINMUX(29, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO30 \
ESP32_PINMUX(30, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO31 \
ESP32_PINMUX(31, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO40 \
ESP32_PINMUX(40, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO41 \
ESP32_PINMUX(41, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO42 \
ESP32_PINMUX(42, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO43 \
ESP32_PINMUX(43, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO44 \
ESP32_PINMUX(44, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO45 \
ESP32_PINMUX(45, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1CTRL_GPIO46 \
ESP32_PINMUX(46, ESP_PCNT_CTRL_CH1_IN2, ESP_NOSIG)
/* PCNT2_CH1SIG */
#define PCNT2_CH1SIG_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO28 \
ESP32_PINMUX(28, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO29 \
ESP32_PINMUX(29, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO30 \
ESP32_PINMUX(30, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO31 \
ESP32_PINMUX(31, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO40 \
ESP32_PINMUX(40, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO41 \
ESP32_PINMUX(41, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO42 \
ESP32_PINMUX(42, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO43 \
ESP32_PINMUX(43, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO44 \
ESP32_PINMUX(44, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO45 \
ESP32_PINMUX(45, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
#define PCNT2_CH1SIG_GPIO46 \
ESP32_PINMUX(46, ESP_PCNT_SIG_CH1_IN2, ESP_NOSIG)
/* PCNT3_CH0CTRL */
#define PCNT3_CH0CTRL_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO28 \
ESP32_PINMUX(28, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO29 \
ESP32_PINMUX(29, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO30 \
ESP32_PINMUX(30, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO31 \
ESP32_PINMUX(31, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO40 \
ESP32_PINMUX(40, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO41 \
ESP32_PINMUX(41, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO42 \
ESP32_PINMUX(42, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO43 \
ESP32_PINMUX(43, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO44 \
ESP32_PINMUX(44, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO45 \
ESP32_PINMUX(45, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0CTRL_GPIO46 \
ESP32_PINMUX(46, ESP_PCNT_CTRL_CH0_IN3, ESP_NOSIG)
/* PCNT3_CH0SIG */
#define PCNT3_CH0SIG_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO28 \
ESP32_PINMUX(28, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO29 \
ESP32_PINMUX(29, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO30 \
ESP32_PINMUX(30, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO31 \
ESP32_PINMUX(31, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO40 \
ESP32_PINMUX(40, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO41 \
ESP32_PINMUX(41, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO42 \
ESP32_PINMUX(42, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO43 \
ESP32_PINMUX(43, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO44 \
ESP32_PINMUX(44, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO45 \
ESP32_PINMUX(45, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
#define PCNT3_CH0SIG_GPIO46 \
ESP32_PINMUX(46, ESP_PCNT_SIG_CH0_IN3, ESP_NOSIG)
/* PCNT3_CH1CTRL */
#define PCNT3_CH1CTRL_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO28 \
ESP32_PINMUX(28, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO29 \
ESP32_PINMUX(29, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO30 \
ESP32_PINMUX(30, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO31 \
ESP32_PINMUX(31, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO40 \
ESP32_PINMUX(40, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO41 \
ESP32_PINMUX(41, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO42 \
ESP32_PINMUX(42, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO43 \
ESP32_PINMUX(43, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO44 \
ESP32_PINMUX(44, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO45 \
ESP32_PINMUX(45, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1CTRL_GPIO46 \
ESP32_PINMUX(46, ESP_PCNT_CTRL_CH1_IN3, ESP_NOSIG)
/* PCNT3_CH1SIG */
#define PCNT3_CH1SIG_GPIO0 \
ESP32_PINMUX(0, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO1 \
ESP32_PINMUX(1, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO2 \
ESP32_PINMUX(2, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO3 \
ESP32_PINMUX(3, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO4 \
ESP32_PINMUX(4, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO5 \
ESP32_PINMUX(5, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO6 \
ESP32_PINMUX(6, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO7 \
ESP32_PINMUX(7, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO8 \
ESP32_PINMUX(8, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO9 \
ESP32_PINMUX(9, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO10 \
ESP32_PINMUX(10, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO11 \
ESP32_PINMUX(11, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO12 \
ESP32_PINMUX(12, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO13 \
ESP32_PINMUX(13, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO14 \
ESP32_PINMUX(14, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO15 \
ESP32_PINMUX(15, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO16 \
ESP32_PINMUX(16, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO17 \
ESP32_PINMUX(17, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO18 \
ESP32_PINMUX(18, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO19 \
ESP32_PINMUX(19, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO20 \
ESP32_PINMUX(20, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO21 \
ESP32_PINMUX(21, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO26 \
ESP32_PINMUX(26, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO27 \
ESP32_PINMUX(27, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO28 \
ESP32_PINMUX(28, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO29 \
ESP32_PINMUX(29, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO30 \
ESP32_PINMUX(30, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO31 \
ESP32_PINMUX(31, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO32 \
ESP32_PINMUX(32, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO33 \
ESP32_PINMUX(33, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO34 \
ESP32_PINMUX(34, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO35 \
ESP32_PINMUX(35, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO36 \
ESP32_PINMUX(36, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO37 \
ESP32_PINMUX(37, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO38 \
ESP32_PINMUX(38, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO39 \
ESP32_PINMUX(39, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO40 \
ESP32_PINMUX(40, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO41 \
ESP32_PINMUX(41, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO42 \
ESP32_PINMUX(42, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO43 \
ESP32_PINMUX(43, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO44 \
ESP32_PINMUX(44, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO45 \
ESP32_PINMUX(45, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
#define PCNT3_CH1SIG_GPIO46 \
ESP32_PINMUX(46, ESP_PCNT_SIG_CH1_IN3, ESP_NOSIG)
/* SPIM2_CSEL */
#define SPIM2_CSEL_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_FSPICS0_OUT)
/* SPIM2_CSEL1 */
#define SPIM2_CSEL1_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_FSPICS1_OUT)
/* SPIM2_CSEL2 */
#define SPIM2_CSEL2_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_FSPICS2_OUT)
/* SPIM2_CSEL3 */
#define SPIM2_CSEL3_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_FSPICS3_OUT)
/* SPIM2_CSEL4 */
#define SPIM2_CSEL4_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_FSPICS4_OUT)
/* SPIM2_CSEL5 */
#define SPIM2_CSEL5_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_FSPICS5_OUT)
/* SPIM2_MISO */
#define SPIM2_MISO_GPIO0 \
ESP32_PINMUX(0, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO1 \
ESP32_PINMUX(1, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO2 \
ESP32_PINMUX(2, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO3 \
ESP32_PINMUX(3, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO4 \
ESP32_PINMUX(4, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO5 \
ESP32_PINMUX(5, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO6 \
ESP32_PINMUX(6, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO7 \
ESP32_PINMUX(7, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO8 \
ESP32_PINMUX(8, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO9 \
ESP32_PINMUX(9, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO10 \
ESP32_PINMUX(10, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO11 \
ESP32_PINMUX(11, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO12 \
ESP32_PINMUX(12, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO13 \
ESP32_PINMUX(13, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO14 \
ESP32_PINMUX(14, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO15 \
ESP32_PINMUX(15, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO16 \
ESP32_PINMUX(16, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO17 \
ESP32_PINMUX(17, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO18 \
ESP32_PINMUX(18, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO19 \
ESP32_PINMUX(19, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO20 \
ESP32_PINMUX(20, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO21 \
ESP32_PINMUX(21, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO26 \
ESP32_PINMUX(26, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO27 \
ESP32_PINMUX(27, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO28 \
ESP32_PINMUX(28, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO29 \
ESP32_PINMUX(29, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO30 \
ESP32_PINMUX(30, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO31 \
ESP32_PINMUX(31, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO32 \
ESP32_PINMUX(32, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO33 \
ESP32_PINMUX(33, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO34 \
ESP32_PINMUX(34, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO35 \
ESP32_PINMUX(35, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO36 \
ESP32_PINMUX(36, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO37 \
ESP32_PINMUX(37, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO38 \
ESP32_PINMUX(38, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO39 \
ESP32_PINMUX(39, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO40 \
ESP32_PINMUX(40, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO41 \
ESP32_PINMUX(41, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO42 \
ESP32_PINMUX(42, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO43 \
ESP32_PINMUX(43, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO44 \
ESP32_PINMUX(44, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO45 \
ESP32_PINMUX(45, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO46 \
ESP32_PINMUX(46, ESP_FSPIQ_IN, ESP_NOSIG)
/* SPIM2_MOSI */
#define SPIM2_MOSI_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_FSPID_OUT)
/* SPIM2_SCLK */
#define SPIM2_SCLK_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_FSPICLK_OUT)
/* SPIM3_CSEL */
#define SPIM3_CSEL_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_SPI3_CS0_OUT)
#define SPIM3_CSEL_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_SPI3_CS0_OUT)
/* SPIM3_CSEL1 */
#define SPIM3_CSEL1_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_SPI3_CS1_OUT)
#define SPIM3_CSEL1_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_SPI3_CS1_OUT)
/* SPIM3_CSEL2 */
#define SPIM3_CSEL2_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_SPI3_CS2_OUT)
#define SPIM3_CSEL2_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_SPI3_CS2_OUT)
/* SPIM3_MISO */
#define SPIM3_MISO_GPIO0 \
ESP32_PINMUX(0, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO1 \
ESP32_PINMUX(1, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO2 \
ESP32_PINMUX(2, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO3 \
ESP32_PINMUX(3, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO4 \
ESP32_PINMUX(4, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO5 \
ESP32_PINMUX(5, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO6 \
ESP32_PINMUX(6, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO7 \
ESP32_PINMUX(7, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO8 \
ESP32_PINMUX(8, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO9 \
ESP32_PINMUX(9, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO10 \
ESP32_PINMUX(10, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO11 \
ESP32_PINMUX(11, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO12 \
ESP32_PINMUX(12, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO13 \
ESP32_PINMUX(13, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO14 \
ESP32_PINMUX(14, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO15 \
ESP32_PINMUX(15, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO16 \
ESP32_PINMUX(16, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO17 \
ESP32_PINMUX(17, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO18 \
ESP32_PINMUX(18, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO19 \
ESP32_PINMUX(19, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO20 \
ESP32_PINMUX(20, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO21 \
ESP32_PINMUX(21, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO26 \
ESP32_PINMUX(26, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO27 \
ESP32_PINMUX(27, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO28 \
ESP32_PINMUX(28, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO29 \
ESP32_PINMUX(29, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO30 \
ESP32_PINMUX(30, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO31 \
ESP32_PINMUX(31, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO32 \
ESP32_PINMUX(32, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO33 \
ESP32_PINMUX(33, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO34 \
ESP32_PINMUX(34, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO35 \
ESP32_PINMUX(35, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO36 \
ESP32_PINMUX(36, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO37 \
ESP32_PINMUX(37, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO38 \
ESP32_PINMUX(38, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO39 \
ESP32_PINMUX(39, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO40 \
ESP32_PINMUX(40, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO41 \
ESP32_PINMUX(41, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO42 \
ESP32_PINMUX(42, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO43 \
ESP32_PINMUX(43, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO44 \
ESP32_PINMUX(44, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO45 \
ESP32_PINMUX(45, ESP_SPI3_Q_IN, ESP_NOSIG)
#define SPIM3_MISO_GPIO46 \
ESP32_PINMUX(46, ESP_SPI3_Q_IN, ESP_NOSIG)
/* SPIM3_MOSI */
#define SPIM3_MOSI_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_SPI3_D_OUT)
#define SPIM3_MOSI_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_SPI3_D_OUT)
/* SPIM3_SCLK */
#define SPIM3_SCLK_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
#define SPIM3_SCLK_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
#define SPIM3_SCLK_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
#define SPIM3_SCLK_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
#define SPIM3_SCLK_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
#define SPIM3_SCLK_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
#define SPIM3_SCLK_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
#define SPIM3_SCLK_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
#define SPIM3_SCLK_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
#define SPIM3_SCLK_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
#define SPIM3_SCLK_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
#define SPIM3_SCLK_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
#define SPIM3_SCLK_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
#define SPIM3_SCLK_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
#define SPIM3_SCLK_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
#define SPIM3_SCLK_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
#define SPIM3_SCLK_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
#define SPIM3_SCLK_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
#define SPIM3_SCLK_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
#define SPIM3_SCLK_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
#define SPIM3_SCLK_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
#define SPIM3_SCLK_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
#define SPIM3_SCLK_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
#define SPIM3_SCLK_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
#define SPIM3_SCLK_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
#define SPIM3_SCLK_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
#define SPIM3_SCLK_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
#define SPIM3_SCLK_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
#define SPIM3_SCLK_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
#define SPIM3_SCLK_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
#define SPIM3_SCLK_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
#define SPIM3_SCLK_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
#define SPIM3_SCLK_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
#define SPIM3_SCLK_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
#define SPIM3_SCLK_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
#define SPIM3_SCLK_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
#define SPIM3_SCLK_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
#define SPIM3_SCLK_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
#define SPIM3_SCLK_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
#define SPIM3_SCLK_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
#define SPIM3_SCLK_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
#define SPIM3_SCLK_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_SPI3_CLK_OUT_MUX)
/* TWAI_BUS_OFF */
#define TWAI_BUS_OFF_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
/* TWAI_CLKOUT */
#define TWAI_CLKOUT_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_TWAI_CLKOUT)
/* TWAI_RX */
#define TWAI_RX_GPIO0 \
ESP32_PINMUX(0, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO1 \
ESP32_PINMUX(1, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO2 \
ESP32_PINMUX(2, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO3 \
ESP32_PINMUX(3, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO4 \
ESP32_PINMUX(4, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO5 \
ESP32_PINMUX(5, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO6 \
ESP32_PINMUX(6, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO7 \
ESP32_PINMUX(7, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO8 \
ESP32_PINMUX(8, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO9 \
ESP32_PINMUX(9, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO10 \
ESP32_PINMUX(10, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO11 \
ESP32_PINMUX(11, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO12 \
ESP32_PINMUX(12, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO13 \
ESP32_PINMUX(13, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO14 \
ESP32_PINMUX(14, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO15 \
ESP32_PINMUX(15, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO16 \
ESP32_PINMUX(16, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO17 \
ESP32_PINMUX(17, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO18 \
ESP32_PINMUX(18, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO19 \
ESP32_PINMUX(19, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO20 \
ESP32_PINMUX(20, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO21 \
ESP32_PINMUX(21, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO26 \
ESP32_PINMUX(26, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO27 \
ESP32_PINMUX(27, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO28 \
ESP32_PINMUX(28, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO29 \
ESP32_PINMUX(29, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO30 \
ESP32_PINMUX(30, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO31 \
ESP32_PINMUX(31, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO32 \
ESP32_PINMUX(32, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO33 \
ESP32_PINMUX(33, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO34 \
ESP32_PINMUX(34, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO35 \
ESP32_PINMUX(35, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO36 \
ESP32_PINMUX(36, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO37 \
ESP32_PINMUX(37, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO38 \
ESP32_PINMUX(38, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO39 \
ESP32_PINMUX(39, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO40 \
ESP32_PINMUX(40, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO41 \
ESP32_PINMUX(41, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO42 \
ESP32_PINMUX(42, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO43 \
ESP32_PINMUX(43, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO44 \
ESP32_PINMUX(44, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO45 \
ESP32_PINMUX(45, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO46 \
ESP32_PINMUX(46, ESP_TWAI_RX, ESP_NOSIG)
/* TWAI_TX */
#define TWAI_TX_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_TWAI_TX)
/* UART0_CTS */
#define UART0_CTS_GPIO0 \
ESP32_PINMUX(0, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO1 \
ESP32_PINMUX(1, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO2 \
ESP32_PINMUX(2, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO3 \
ESP32_PINMUX(3, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO4 \
ESP32_PINMUX(4, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO5 \
ESP32_PINMUX(5, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO6 \
ESP32_PINMUX(6, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO7 \
ESP32_PINMUX(7, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO8 \
ESP32_PINMUX(8, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO9 \
ESP32_PINMUX(9, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO10 \
ESP32_PINMUX(10, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO11 \
ESP32_PINMUX(11, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO12 \
ESP32_PINMUX(12, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO13 \
ESP32_PINMUX(13, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO14 \
ESP32_PINMUX(14, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO15 \
ESP32_PINMUX(15, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO16 \
ESP32_PINMUX(16, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO17 \
ESP32_PINMUX(17, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO18 \
ESP32_PINMUX(18, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO19 \
ESP32_PINMUX(19, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO20 \
ESP32_PINMUX(20, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO21 \
ESP32_PINMUX(21, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO26 \
ESP32_PINMUX(26, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO27 \
ESP32_PINMUX(27, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO28 \
ESP32_PINMUX(28, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO29 \
ESP32_PINMUX(29, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO30 \
ESP32_PINMUX(30, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO31 \
ESP32_PINMUX(31, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO32 \
ESP32_PINMUX(32, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO33 \
ESP32_PINMUX(33, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO34 \
ESP32_PINMUX(34, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO35 \
ESP32_PINMUX(35, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO36 \
ESP32_PINMUX(36, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO37 \
ESP32_PINMUX(37, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO38 \
ESP32_PINMUX(38, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO39 \
ESP32_PINMUX(39, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO40 \
ESP32_PINMUX(40, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO41 \
ESP32_PINMUX(41, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO42 \
ESP32_PINMUX(42, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO43 \
ESP32_PINMUX(43, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO44 \
ESP32_PINMUX(44, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO45 \
ESP32_PINMUX(45, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO46 \
ESP32_PINMUX(46, ESP_U0CTS_IN, ESP_NOSIG)
/* UART0_DSR */
#define UART0_DSR_GPIO0 \
ESP32_PINMUX(0, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO1 \
ESP32_PINMUX(1, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO2 \
ESP32_PINMUX(2, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO3 \
ESP32_PINMUX(3, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO4 \
ESP32_PINMUX(4, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO5 \
ESP32_PINMUX(5, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO6 \
ESP32_PINMUX(6, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO7 \
ESP32_PINMUX(7, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO8 \
ESP32_PINMUX(8, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO9 \
ESP32_PINMUX(9, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO10 \
ESP32_PINMUX(10, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO11 \
ESP32_PINMUX(11, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO12 \
ESP32_PINMUX(12, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO13 \
ESP32_PINMUX(13, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO14 \
ESP32_PINMUX(14, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO15 \
ESP32_PINMUX(15, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO16 \
ESP32_PINMUX(16, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO17 \
ESP32_PINMUX(17, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO18 \
ESP32_PINMUX(18, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO19 \
ESP32_PINMUX(19, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO20 \
ESP32_PINMUX(20, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO21 \
ESP32_PINMUX(21, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO26 \
ESP32_PINMUX(26, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO27 \
ESP32_PINMUX(27, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO28 \
ESP32_PINMUX(28, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO29 \
ESP32_PINMUX(29, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO30 \
ESP32_PINMUX(30, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO31 \
ESP32_PINMUX(31, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO32 \
ESP32_PINMUX(32, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO33 \
ESP32_PINMUX(33, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO34 \
ESP32_PINMUX(34, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO35 \
ESP32_PINMUX(35, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO36 \
ESP32_PINMUX(36, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO37 \
ESP32_PINMUX(37, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO38 \
ESP32_PINMUX(38, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO39 \
ESP32_PINMUX(39, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO40 \
ESP32_PINMUX(40, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO41 \
ESP32_PINMUX(41, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO42 \
ESP32_PINMUX(42, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO43 \
ESP32_PINMUX(43, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO44 \
ESP32_PINMUX(44, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO45 \
ESP32_PINMUX(45, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO46 \
ESP32_PINMUX(46, ESP_U0DSR_IN, ESP_NOSIG)
/* UART0_DTR */
#define UART0_DTR_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_U0DTR_OUT)
/* UART0_RTS */
#define UART0_RTS_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_U0RTS_OUT)
/* UART0_RX */
#define UART0_RX_GPIO0 \
ESP32_PINMUX(0, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO1 \
ESP32_PINMUX(1, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO2 \
ESP32_PINMUX(2, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO3 \
ESP32_PINMUX(3, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO4 \
ESP32_PINMUX(4, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO5 \
ESP32_PINMUX(5, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO6 \
ESP32_PINMUX(6, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO7 \
ESP32_PINMUX(7, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO8 \
ESP32_PINMUX(8, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO9 \
ESP32_PINMUX(9, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO10 \
ESP32_PINMUX(10, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO11 \
ESP32_PINMUX(11, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO12 \
ESP32_PINMUX(12, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO13 \
ESP32_PINMUX(13, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO14 \
ESP32_PINMUX(14, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO15 \
ESP32_PINMUX(15, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO16 \
ESP32_PINMUX(16, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO17 \
ESP32_PINMUX(17, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO18 \
ESP32_PINMUX(18, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO19 \
ESP32_PINMUX(19, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO20 \
ESP32_PINMUX(20, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO21 \
ESP32_PINMUX(21, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO26 \
ESP32_PINMUX(26, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO27 \
ESP32_PINMUX(27, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO28 \
ESP32_PINMUX(28, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO29 \
ESP32_PINMUX(29, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO30 \
ESP32_PINMUX(30, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO31 \
ESP32_PINMUX(31, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO32 \
ESP32_PINMUX(32, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO33 \
ESP32_PINMUX(33, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO34 \
ESP32_PINMUX(34, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO35 \
ESP32_PINMUX(35, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO36 \
ESP32_PINMUX(36, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO37 \
ESP32_PINMUX(37, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO38 \
ESP32_PINMUX(38, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO39 \
ESP32_PINMUX(39, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO40 \
ESP32_PINMUX(40, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO41 \
ESP32_PINMUX(41, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO42 \
ESP32_PINMUX(42, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO43 \
ESP32_PINMUX(43, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO44 \
ESP32_PINMUX(44, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO45 \
ESP32_PINMUX(45, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO46 \
ESP32_PINMUX(46, ESP_U0RXD_IN, ESP_NOSIG)
/* UART0_TX */
#define UART0_TX_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_U0TXD_OUT)
/* UART1_CTS */
#define UART1_CTS_GPIO0 \
ESP32_PINMUX(0, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO1 \
ESP32_PINMUX(1, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO2 \
ESP32_PINMUX(2, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO3 \
ESP32_PINMUX(3, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO4 \
ESP32_PINMUX(4, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO5 \
ESP32_PINMUX(5, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO6 \
ESP32_PINMUX(6, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO7 \
ESP32_PINMUX(7, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO8 \
ESP32_PINMUX(8, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO9 \
ESP32_PINMUX(9, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO10 \
ESP32_PINMUX(10, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO11 \
ESP32_PINMUX(11, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO12 \
ESP32_PINMUX(12, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO13 \
ESP32_PINMUX(13, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO14 \
ESP32_PINMUX(14, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO15 \
ESP32_PINMUX(15, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO16 \
ESP32_PINMUX(16, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO17 \
ESP32_PINMUX(17, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO18 \
ESP32_PINMUX(18, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO19 \
ESP32_PINMUX(19, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO20 \
ESP32_PINMUX(20, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO21 \
ESP32_PINMUX(21, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO26 \
ESP32_PINMUX(26, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO27 \
ESP32_PINMUX(27, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO28 \
ESP32_PINMUX(28, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO29 \
ESP32_PINMUX(29, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO30 \
ESP32_PINMUX(30, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO31 \
ESP32_PINMUX(31, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO32 \
ESP32_PINMUX(32, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO33 \
ESP32_PINMUX(33, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO34 \
ESP32_PINMUX(34, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO35 \
ESP32_PINMUX(35, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO36 \
ESP32_PINMUX(36, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO37 \
ESP32_PINMUX(37, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO38 \
ESP32_PINMUX(38, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO39 \
ESP32_PINMUX(39, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO40 \
ESP32_PINMUX(40, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO41 \
ESP32_PINMUX(41, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO42 \
ESP32_PINMUX(42, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO43 \
ESP32_PINMUX(43, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO44 \
ESP32_PINMUX(44, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO45 \
ESP32_PINMUX(45, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO46 \
ESP32_PINMUX(46, ESP_U1CTS_IN, ESP_NOSIG)
/* UART1_DSR */
#define UART1_DSR_GPIO0 \
ESP32_PINMUX(0, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO1 \
ESP32_PINMUX(1, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO2 \
ESP32_PINMUX(2, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO3 \
ESP32_PINMUX(3, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO4 \
ESP32_PINMUX(4, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO5 \
ESP32_PINMUX(5, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO6 \
ESP32_PINMUX(6, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO7 \
ESP32_PINMUX(7, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO8 \
ESP32_PINMUX(8, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO9 \
ESP32_PINMUX(9, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO10 \
ESP32_PINMUX(10, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO11 \
ESP32_PINMUX(11, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO12 \
ESP32_PINMUX(12, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO13 \
ESP32_PINMUX(13, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO14 \
ESP32_PINMUX(14, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO15 \
ESP32_PINMUX(15, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO16 \
ESP32_PINMUX(16, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO17 \
ESP32_PINMUX(17, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO18 \
ESP32_PINMUX(18, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO19 \
ESP32_PINMUX(19, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO20 \
ESP32_PINMUX(20, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO21 \
ESP32_PINMUX(21, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO26 \
ESP32_PINMUX(26, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO27 \
ESP32_PINMUX(27, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO28 \
ESP32_PINMUX(28, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO29 \
ESP32_PINMUX(29, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO30 \
ESP32_PINMUX(30, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO31 \
ESP32_PINMUX(31, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO32 \
ESP32_PINMUX(32, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO33 \
ESP32_PINMUX(33, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO34 \
ESP32_PINMUX(34, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO35 \
ESP32_PINMUX(35, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO36 \
ESP32_PINMUX(36, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO37 \
ESP32_PINMUX(37, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO38 \
ESP32_PINMUX(38, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO39 \
ESP32_PINMUX(39, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO40 \
ESP32_PINMUX(40, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO41 \
ESP32_PINMUX(41, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO42 \
ESP32_PINMUX(42, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO43 \
ESP32_PINMUX(43, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO44 \
ESP32_PINMUX(44, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO45 \
ESP32_PINMUX(45, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO46 \
ESP32_PINMUX(46, ESP_U1DSR_IN, ESP_NOSIG)
/* UART1_DTR */
#define UART1_DTR_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO46 \
ESP32_PINMUX(46, ESP_NOSIG, ESP_U1DTR_OUT)
/* UART1_RTS */
#define UART1_RTS_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_U1RTS_OUT)
/* UART1_RX */
#define UART1_RX_GPIO0 \
ESP32_PINMUX(0, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO1 \
ESP32_PINMUX(1, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO2 \
ESP32_PINMUX(2, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO3 \
ESP32_PINMUX(3, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO4 \
ESP32_PINMUX(4, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO5 \
ESP32_PINMUX(5, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO6 \
ESP32_PINMUX(6, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO7 \
ESP32_PINMUX(7, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO8 \
ESP32_PINMUX(8, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO9 \
ESP32_PINMUX(9, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO10 \
ESP32_PINMUX(10, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO11 \
ESP32_PINMUX(11, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO12 \
ESP32_PINMUX(12, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO13 \
ESP32_PINMUX(13, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO14 \
ESP32_PINMUX(14, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO15 \
ESP32_PINMUX(15, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO16 \
ESP32_PINMUX(16, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO17 \
ESP32_PINMUX(17, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO18 \
ESP32_PINMUX(18, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO19 \
ESP32_PINMUX(19, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO20 \
ESP32_PINMUX(20, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO21 \
ESP32_PINMUX(21, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO26 \
ESP32_PINMUX(26, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO27 \
ESP32_PINMUX(27, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO28 \
ESP32_PINMUX(28, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO29 \
ESP32_PINMUX(29, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO30 \
ESP32_PINMUX(30, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO31 \
ESP32_PINMUX(31, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO32 \
ESP32_PINMUX(32, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO33 \
ESP32_PINMUX(33, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO34 \
ESP32_PINMUX(34, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO35 \
ESP32_PINMUX(35, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO36 \
ESP32_PINMUX(36, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO37 \
ESP32_PINMUX(37, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO38 \
ESP32_PINMUX(38, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO39 \
ESP32_PINMUX(39, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO40 \
ESP32_PINMUX(40, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO41 \
ESP32_PINMUX(41, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO42 \
ESP32_PINMUX(42, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO43 \
ESP32_PINMUX(43, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO44 \
ESP32_PINMUX(44, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO45 \
ESP32_PINMUX(45, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO46 \
ESP32_PINMUX(46, ESP_U1RXD_IN, ESP_NOSIG)
/* UART1_TX */
#define UART1_TX_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO26 \
ESP32_PINMUX(26, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO27 \
ESP32_PINMUX(27, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO28 \
ESP32_PINMUX(28, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO29 \
ESP32_PINMUX(29, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO30 \
ESP32_PINMUX(30, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO31 \
ESP32_PINMUX(31, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO32 \
ESP32_PINMUX(32, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO33 \
ESP32_PINMUX(33, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO34 \
ESP32_PINMUX(34, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO35 \
ESP32_PINMUX(35, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO36 \
ESP32_PINMUX(36, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO37 \
ESP32_PINMUX(37, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO38 \
ESP32_PINMUX(38, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO39 \
ESP32_PINMUX(39, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO40 \
ESP32_PINMUX(40, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO41 \
ESP32_PINMUX(41, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO42 \
ESP32_PINMUX(42, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO43 \
ESP32_PINMUX(43, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO44 \
ESP32_PINMUX(44, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO45 \
ESP32_PINMUX(45, ESP_NOSIG, ESP_U1TXD_OUT)
#endif /* INC_DT_BINDS_PINCTRL_ESP32S2_PINCTRL_HAL_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/esp32s2-pinctrl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 75,425 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_ESP32S2_GPIO_SIGMAP_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_ESP32S2_GPIO_SIGMAP_H_
#define ESP_NOSIG ESP_SIG_INVAL
#define ESP_SPICLK_OUT ESP_SPICLK_OUT_MUX
#define ESP_CLK_I2S ESP_CLK_I2S_MUX
#define ESP_FSPICLK_OUT ESP_FSPICLK_OUT_MUX
#define ESP_SPIQ_IN 0
#define ESP_SPIQ_OUT 0
#define ESP_SPID_IN 1
#define ESP_SPID_OUT 1
#define ESP_SPIHD_IN 2
#define ESP_SPIHD_OUT 2
#define ESP_SPIWP_IN 3
#define ESP_SPIWP_OUT 3
#define ESP_SPICLK_OUT_MUX 4
#define ESP_SPICS0_OUT 5
#define ESP_SPICS1_OUT 6
#define ESP_SPID4_IN 7
#define ESP_SPID4_OUT 7
#define ESP_SPID5_IN 8
#define ESP_SPID5_OUT 8
#define ESP_SPID6_IN 9
#define ESP_SPID6_OUT 9
#define ESP_SPID7_IN 10
#define ESP_SPID7_OUT 10
#define ESP_SPIDQS_IN 11
#define ESP_SPIDQS_OUT 11
#define ESP_U0RXD_IN 14
#define ESP_U0TXD_OUT 14
#define ESP_U0CTS_IN 15
#define ESP_U0RTS_OUT 15
#define ESP_U0DSR_IN 16
#define ESP_U0DTR_OUT 16
#define ESP_U1RXD_IN 17
#define ESP_U1TXD_OUT 17
#define ESP_U1CTS_IN 18
#define ESP_U1RTS_OUT 18
#define ESP_U1DSR_IN 21
#define ESP_U1DTR_OUT 21
#define ESP_I2S0O_BCK_IN 23
#define ESP_I2S0O_BCK_OUT 23
#define ESP_I2S0O_WS_IN 25
#define ESP_I2S0O_WS_OUT 25
#define ESP_I2S0I_BCK_IN 27
#define ESP_I2S0I_BCK_OUT 27
#define ESP_I2S0I_WS_IN 28
#define ESP_I2S0I_WS_OUT 28
#define ESP_I2CEXT0_SCL_IN 29
#define ESP_I2CEXT0_SCL_OUT 29
#define ESP_I2CEXT0_SDA_IN 30
#define ESP_I2CEXT0_SDA_OUT 30
#define ESP_SDIO_TOHOST_INT_OUT 31
#define ESP_GPIO_BT_ACTIVE 37
#define ESP_GPIO_BT_PRIORITY 38
#define ESP_PCNT_SIG_CH0_IN0 39
#define ESP_GPIO_WLAN_PRIO 39
#define ESP_PCNT_SIG_CH1_IN0 40
#define ESP_GPIO_WLAN_ACTIVE 40
#define ESP_PCNT_CTRL_CH0_IN0 41
#define ESP_BB_DIAG0 41
#define ESP_PCNT_CTRL_CH1_IN0 42
#define ESP_BB_DIAG1 42
#define ESP_PCNT_SIG_CH0_IN1 43
#define ESP_BB_DIAG2 43
#define ESP_PCNT_SIG_CH1_IN1 44
#define ESP_BB_DIAG3 44
#define ESP_PCNT_CTRL_CH0_IN1 45
#define ESP_BB_DIAG4 45
#define ESP_PCNT_CTRL_CH1_IN1 46
#define ESP_BB_DIAG5 46
#define ESP_PCNT_SIG_CH0_IN2 47
#define ESP_BB_DIAG6 47
#define ESP_PCNT_SIG_CH1_IN2 48
#define ESP_BB_DIAG7 48
#define ESP_PCNT_CTRL_CH0_IN2 49
#define ESP_BB_DIAG8 49
#define ESP_PCNT_CTRL_CH1_IN2 50
#define ESP_BB_DIAG9 50
#define ESP_PCNT_SIG_CH0_IN3 51
#define ESP_BB_DIAG10 51
#define ESP_PCNT_SIG_CH1_IN3 52
#define ESP_BB_DIAG11 52
#define ESP_PCNT_CTRL_CH0_IN3 53
#define ESP_BB_DIAG12 53
#define ESP_PCNT_CTRL_CH1_IN3 54
#define ESP_BB_DIAG13 54
#define ESP_BB_DIAG14 55
#define ESP_BB_DIAG15 56
#define ESP_BB_DIAG16 57
#define ESP_BB_DIAG17 58
#define ESP_BB_DIAG18 59
#define ESP_BB_DIAG19 60
#define ESP_USB_EXTPHY_VP 61
#define ESP_USB_EXTPHY_OEN 61
#define ESP_USB_EXTPHY_VM 62
#define ESP_USB_EXTPHY_SPEED 62
#define ESP_USB_EXTPHY_RCV 63
#define ESP_USB_EXTPHY_VPO 63
#define ESP_USB_OTG_IDDIG_IN 64
#define ESP_USB_EXTPHY_VMO 64
#define ESP_USB_OTG_AVALID_IN 65
#define ESP_USB_EXTPHY_SUSPND 65
#define ESP_USB_SRP_BVALID_IN 66
#define ESP_USB_OTG_IDPULLUP 66
#define ESP_USB_OTG_VBUSVALID_IN 67
#define ESP_USB_OTG_DPPULLDOWN 67
#define ESP_USB_SRP_SESSEND_IN 68
#define ESP_USB_OTG_DMPULLDOWN 68
#define ESP_USB_OTG_DRVVBUS 69
#define ESP_USB_SRP_CHRGVBUS 70
#define ESP_USB_SRP_DISCHRGVBUS 71
#define ESP_SPI3_CLK_IN 72
#define ESP_SPI3_CLK_OUT_MUX 72
#define ESP_SPI3_Q_IN 73
#define ESP_SPI3_Q_OUT 73
#define ESP_SPI3_D_IN 74
#define ESP_SPI3_D_OUT 74
#define ESP_SPI3_HD_IN 75
#define ESP_SPI3_HD_OUT 75
#define ESP_SPI3_CS0_IN 76
#define ESP_SPI3_CS0_OUT 76
#define ESP_SPI3_CS1_OUT 77
#define ESP_SPI3_CS2_OUT 78
#define ESP_LEDC_LS_SIG_OUT0 79
#define ESP_LEDC_LS_SIG_OUT1 80
#define ESP_LEDC_LS_SIG_OUT2 81
#define ESP_LEDC_LS_SIG_OUT3 82
#define ESP_RMT_SIG_IN0 83
#define ESP_LEDC_LS_SIG_OUT4 83
#define ESP_RMT_SIG_IN1 84
#define ESP_LEDC_LS_SIG_OUT5 84
#define ESP_RMT_SIG_IN2 85
#define ESP_LEDC_LS_SIG_OUT6 85
#define ESP_RMT_SIG_IN3 86
#define ESP_LEDC_LS_SIG_OUT7 86
#define ESP_RMT_SIG_OUT0 87
#define ESP_RMT_SIG_OUT1 88
#define ESP_RMT_SIG_OUT2 89
#define ESP_RMT_SIG_OUT3 90
#define ESP_EXT_ADC_START 93
#define ESP_I2CEXT1_SCL_IN 95
#define ESP_I2CEXT1_SCL_OUT 95
#define ESP_I2CEXT1_SDA_IN 96
#define ESP_I2CEXT1_SDA_OUT 96
#define ESP_GPIO_SD0_OUT 100
#define ESP_GPIO_SD1_OUT 101
#define ESP_GPIO_SD2_OUT 102
#define ESP_GPIO_SD3_OUT 103
#define ESP_GPIO_SD4_OUT 104
#define ESP_GPIO_SD5_OUT 105
#define ESP_GPIO_SD6_OUT 106
#define ESP_GPIO_SD7_OUT 107
#define ESP_FSPICLK_IN 108
#define ESP_FSPICLK_OUT_MUX 108
#define ESP_FSPIQ_IN 109
#define ESP_FSPIQ_OUT 109
#define ESP_FSPID_IN 110
#define ESP_FSPID_OUT 110
#define ESP_FSPIHD_IN 111
#define ESP_FSPIHD_OUT 111
#define ESP_FSPIWP_IN 112
#define ESP_FSPIWP_OUT 112
#define ESP_FSPIIO4_IN 113
#define ESP_FSPIIO4_OUT 113
#define ESP_FSPIIO5_IN 114
#define ESP_FSPIIO5_OUT 114
#define ESP_FSPIIO6_IN 115
#define ESP_FSPIIO6_OUT 115
#define ESP_FSPIIO7_IN 116
#define ESP_FSPIIO7_OUT 116
#define ESP_FSPICS0_IN 117
#define ESP_FSPICS0_OUT 117
#define ESP_FSPICS1_OUT 118
#define ESP_FSPICS2_OUT 119
#define ESP_FSPICS3_OUT 120
#define ESP_FSPICS4_OUT 121
#define ESP_FSPICS5_OUT 122
#define ESP_TWAI_RX 123
#define ESP_TWAI_TX 123
#define ESP_TWAI_BUS_OFF_ON 124
#define ESP_TWAI_CLKOUT 125
#define ESP_SUBSPICLK_OUT_MUX 126
#define ESP_SUBSPIQ_IN 127
#define ESP_SUBSPIQ_OUT 127
#define ESP_SUBSPID_IN 128
#define ESP_SUBSPID_OUT 128
#define ESP_SUBSPIHD_IN 129
#define ESP_SUBSPIHD_OUT 129
#define ESP_SUBSPIWP_IN 130
#define ESP_SUBSPIWP_OUT 130
#define ESP_SUBSPICS0_OUT 131
#define ESP_SUBSPICS1_OUT 132
#define ESP_FSPIDQS_OUT 133
#define ESP_FSPI_HSYNC_OUT 134
#define ESP_FSPI_VSYNC_OUT 135
#define ESP_FSPI_DE_OUT 136
#define ESP_FSPICD_OUT 137
#define ESP_SPI3_CD_OUT 139
#define ESP_SPI3_DQS_OUT 140
#define ESP_I2S0I_DATA_IN0 143
#define ESP_I2S0O_DATA_OUT0 143
#define ESP_I2S0I_DATA_IN1 144
#define ESP_I2S0O_DATA_OUT1 144
#define ESP_I2S0I_DATA_IN2 145
#define ESP_I2S0O_DATA_OUT2 145
#define ESP_I2S0I_DATA_IN3 146
#define ESP_I2S0O_DATA_OUT3 146
#define ESP_I2S0I_DATA_IN4 147
#define ESP_I2S0O_DATA_OUT4 147
#define ESP_I2S0I_DATA_IN5 148
#define ESP_I2S0O_DATA_OUT5 148
#define ESP_I2S0I_DATA_IN6 149
#define ESP_I2S0O_DATA_OUT6 149
#define ESP_I2S0I_DATA_IN7 150
#define ESP_I2S0O_DATA_OUT7 150
#define ESP_I2S0I_DATA_IN8 151
#define ESP_I2S0O_DATA_OUT8 151
#define ESP_I2S0I_DATA_IN9 152
#define ESP_I2S0O_DATA_OUT9 152
#define ESP_I2S0I_DATA_IN10 153
#define ESP_I2S0O_DATA_OUT10 153
#define ESP_I2S0I_DATA_IN11 154
#define ESP_I2S0O_DATA_OUT11 154
#define ESP_I2S0I_DATA_IN12 155
#define ESP_I2S0O_DATA_OUT12 155
#define ESP_I2S0I_DATA_IN13 156
#define ESP_I2S0O_DATA_OUT13 156
#define ESP_I2S0I_DATA_IN14 157
#define ESP_I2S0O_DATA_OUT14 157
#define ESP_I2S0I_DATA_IN15 158
#define ESP_I2S0O_DATA_OUT15 158
#define ESP_I2S0O_DATA_OUT16 159
#define ESP_I2S0O_DATA_OUT17 160
#define ESP_I2S0O_DATA_OUT18 161
#define ESP_I2S0O_DATA_OUT19 162
#define ESP_I2S0O_DATA_OUT20 163
#define ESP_I2S0O_DATA_OUT21 164
#define ESP_I2S0O_DATA_OUT22 165
#define ESP_I2S0O_DATA_OUT23 166
#define ESP_SUBSPID4_IN 167
#define ESP_SUBSPID4_OUT 167
#define ESP_SUBSPID5_IN 168
#define ESP_SUBSPID5_OUT 168
#define ESP_SUBSPID6_IN 169
#define ESP_SUBSPID6_OUT 169
#define ESP_SUBSPID7_IN 170
#define ESP_SUBSPID7_OUT 170
#define ESP_SUBSPIDQS_IN 171
#define ESP_SUBSPIDQS_OUT 171
#define ESP_I2S0I_H_SYNC 193
#define ESP_I2S0I_V_SYNC 194
#define ESP_I2S0I_H_ENABLE 195
#define ESP_PCMFSYNC_IN 203
#define ESP_BT_AUDIO0_IRQ 203
#define ESP_PCMCLK_IN 204
#define ESP_BT_AUDIO1_IRQ 204
#define ESP_PCMDIN 205
#define ESP_BT_AUDIO2_IRQ 205
#define ESP_RW_WAKEUP_REQ 206
#define ESP_BLE_AUDIO0_IRQ 206
#define ESP_BLE_AUDIO1_IRQ 207
#define ESP_BLE_AUDIO2_IRQ 208
#define ESP_PCMFSYNC_OUT 209
#define ESP_PCMCLK_OUT 210
#define ESP_PCMDOUT 211
#define ESP_BLE_AUDIO_SYNC0_P 212
#define ESP_BLE_AUDIO_SYNC1_P 213
#define ESP_BLE_AUDIO_SYNC2_P 214
#define ESP_ANT_SEL0 215
#define ESP_ANT_SEL1 216
#define ESP_ANT_SEL2 217
#define ESP_ANT_SEL3 218
#define ESP_ANT_SEL4 219
#define ESP_ANT_SEL5 220
#define ESP_ANT_SEL6 221
#define ESP_ANT_SEL7 222
#define ESP_SIG_IN_FUNC_223 223
#define ESP_SIG_IN_FUNC223 223
#define ESP_SIG_IN_FUNC_224 224
#define ESP_SIG_IN_FUNC224 224
#define ESP_SIG_IN_FUNC_225 225
#define ESP_SIG_IN_FUNC225 225
#define ESP_SIG_IN_FUNC_226 226
#define ESP_SIG_IN_FUNC226 226
#define ESP_SIG_IN_FUNC_227 227
#define ESP_SIG_IN_FUNC227 227
#define ESP_PRO_ALONEGPIO_IN0 235
#define ESP_PRO_ALONEGPIO_OUT0 235
#define ESP_PRO_ALONEGPIO_IN1 236
#define ESP_PRO_ALONEGPIO_OUT1 236
#define ESP_PRO_ALONEGPIO_IN2 237
#define ESP_PRO_ALONEGPIO_OUT2 237
#define ESP_PRO_ALONEGPIO_IN3 238
#define ESP_PRO_ALONEGPIO_OUT3 238
#define ESP_PRO_ALONEGPIO_IN4 239
#define ESP_PRO_ALONEGPIO_OUT4 239
#define ESP_PRO_ALONEGPIO_IN5 240
#define ESP_PRO_ALONEGPIO_OUT5 240
#define ESP_PRO_ALONEGPIO_IN6 241
#define ESP_PRO_ALONEGPIO_OUT6 241
#define ESP_PRO_ALONEGPIO_IN7 242
#define ESP_PRO_ALONEGPIO_OUT7 242
#define ESP_CLK_I2S_MUX 251
#define ESP_SIG_GPIO_OUT 256
#define ESP_GPIO_MAP_DATE 0x1904100
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_ESP32S2_GPIO_SIGMAP_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/esp32s2-gpio-sigmap.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 3,514 |
```objective-c
/*
*
*
* NOTE: Autogenerated file using esp_genpinctrl.py
*/
#ifndef INC_DT_BINDS_PINCTRL_ESP32C3_PINCTRL_HAL_H_
#define INC_DT_BINDS_PINCTRL_ESP32C3_PINCTRL_HAL_H_
/* I2C0_SCL */
#define I2C0_SCL_GPIO0 \
ESP32_PINMUX(0, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO1 \
ESP32_PINMUX(1, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO2 \
ESP32_PINMUX(2, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO3 \
ESP32_PINMUX(3, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO4 \
ESP32_PINMUX(4, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO5 \
ESP32_PINMUX(5, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO6 \
ESP32_PINMUX(6, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO7 \
ESP32_PINMUX(7, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO8 \
ESP32_PINMUX(8, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO9 \
ESP32_PINMUX(9, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO10 \
ESP32_PINMUX(10, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO11 \
ESP32_PINMUX(11, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO12 \
ESP32_PINMUX(12, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO13 \
ESP32_PINMUX(13, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO14 \
ESP32_PINMUX(14, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO15 \
ESP32_PINMUX(15, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO16 \
ESP32_PINMUX(16, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO17 \
ESP32_PINMUX(17, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO18 \
ESP32_PINMUX(18, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO19 \
ESP32_PINMUX(19, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO20 \
ESP32_PINMUX(20, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
#define I2C0_SCL_GPIO21 \
ESP32_PINMUX(21, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
/* I2C0_SDA */
#define I2C0_SDA_GPIO0 \
ESP32_PINMUX(0, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO1 \
ESP32_PINMUX(1, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO2 \
ESP32_PINMUX(2, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO3 \
ESP32_PINMUX(3, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO4 \
ESP32_PINMUX(4, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO5 \
ESP32_PINMUX(5, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO6 \
ESP32_PINMUX(6, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO7 \
ESP32_PINMUX(7, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO8 \
ESP32_PINMUX(8, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO9 \
ESP32_PINMUX(9, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO10 \
ESP32_PINMUX(10, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO11 \
ESP32_PINMUX(11, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO12 \
ESP32_PINMUX(12, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO13 \
ESP32_PINMUX(13, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO14 \
ESP32_PINMUX(14, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO15 \
ESP32_PINMUX(15, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO16 \
ESP32_PINMUX(16, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO17 \
ESP32_PINMUX(17, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO18 \
ESP32_PINMUX(18, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO19 \
ESP32_PINMUX(19, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO20 \
ESP32_PINMUX(20, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
#define I2C0_SDA_GPIO21 \
ESP32_PINMUX(21, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
/* LEDC_CH0 */
#define LEDC_CH0_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
#define LEDC_CH0_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
/* LEDC_CH1 */
#define LEDC_CH1_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
#define LEDC_CH1_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
/* LEDC_CH2 */
#define LEDC_CH2_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
#define LEDC_CH2_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
/* LEDC_CH3 */
#define LEDC_CH3_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
#define LEDC_CH3_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
/* LEDC_CH4 */
#define LEDC_CH4_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
#define LEDC_CH4_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
/* LEDC_CH5 */
#define LEDC_CH5_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
#define LEDC_CH5_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
/* SPIM2_CSEL */
#define SPIM2_CSEL_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_FSPICS0_OUT)
#define SPIM2_CSEL_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_FSPICS0_OUT)
/* SPIM2_CSEL1 */
#define SPIM2_CSEL1_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_FSPICS1_OUT)
#define SPIM2_CSEL1_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_FSPICS1_OUT)
/* SPIM2_CSEL2 */
#define SPIM2_CSEL2_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_FSPICS2_OUT)
#define SPIM2_CSEL2_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_FSPICS2_OUT)
/* SPIM2_CSEL3 */
#define SPIM2_CSEL3_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_FSPICS3_OUT)
#define SPIM2_CSEL3_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_FSPICS3_OUT)
/* SPIM2_CSEL4 */
#define SPIM2_CSEL4_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_FSPICS4_OUT)
#define SPIM2_CSEL4_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_FSPICS4_OUT)
/* SPIM2_CSEL5 */
#define SPIM2_CSEL5_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_FSPICS5_OUT)
#define SPIM2_CSEL5_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_FSPICS5_OUT)
/* SPIM2_MISO */
#define SPIM2_MISO_GPIO0 \
ESP32_PINMUX(0, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO1 \
ESP32_PINMUX(1, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO2 \
ESP32_PINMUX(2, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO3 \
ESP32_PINMUX(3, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO4 \
ESP32_PINMUX(4, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO5 \
ESP32_PINMUX(5, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO6 \
ESP32_PINMUX(6, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO7 \
ESP32_PINMUX(7, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO8 \
ESP32_PINMUX(8, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO9 \
ESP32_PINMUX(9, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO10 \
ESP32_PINMUX(10, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO11 \
ESP32_PINMUX(11, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO12 \
ESP32_PINMUX(12, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO13 \
ESP32_PINMUX(13, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO14 \
ESP32_PINMUX(14, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO15 \
ESP32_PINMUX(15, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO16 \
ESP32_PINMUX(16, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO17 \
ESP32_PINMUX(17, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO18 \
ESP32_PINMUX(18, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO19 \
ESP32_PINMUX(19, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO20 \
ESP32_PINMUX(20, ESP_FSPIQ_IN, ESP_NOSIG)
#define SPIM2_MISO_GPIO21 \
ESP32_PINMUX(21, ESP_FSPIQ_IN, ESP_NOSIG)
/* SPIM2_MOSI */
#define SPIM2_MOSI_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_FSPID_OUT)
#define SPIM2_MOSI_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_FSPID_OUT)
/* SPIM2_SCLK */
#define SPIM2_SCLK_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_FSPICLK_OUT)
#define SPIM2_SCLK_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_FSPICLK_OUT)
/* TWAI_BUS_OFF */
#define TWAI_BUS_OFF_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
#define TWAI_BUS_OFF_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)
/* TWAI_CLKOUT */
#define TWAI_CLKOUT_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_TWAI_CLKOUT)
#define TWAI_CLKOUT_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_TWAI_CLKOUT)
/* TWAI_RX */
#define TWAI_RX_GPIO0 \
ESP32_PINMUX(0, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO1 \
ESP32_PINMUX(1, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO2 \
ESP32_PINMUX(2, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO3 \
ESP32_PINMUX(3, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO4 \
ESP32_PINMUX(4, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO5 \
ESP32_PINMUX(5, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO6 \
ESP32_PINMUX(6, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO7 \
ESP32_PINMUX(7, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO8 \
ESP32_PINMUX(8, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO9 \
ESP32_PINMUX(9, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO10 \
ESP32_PINMUX(10, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO11 \
ESP32_PINMUX(11, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO12 \
ESP32_PINMUX(12, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO13 \
ESP32_PINMUX(13, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO14 \
ESP32_PINMUX(14, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO15 \
ESP32_PINMUX(15, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO16 \
ESP32_PINMUX(16, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO17 \
ESP32_PINMUX(17, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO18 \
ESP32_PINMUX(18, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO19 \
ESP32_PINMUX(19, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO20 \
ESP32_PINMUX(20, ESP_TWAI_RX, ESP_NOSIG)
#define TWAI_RX_GPIO21 \
ESP32_PINMUX(21, ESP_TWAI_RX, ESP_NOSIG)
/* TWAI_TX */
#define TWAI_TX_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_TWAI_TX)
#define TWAI_TX_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_TWAI_TX)
/* UART0_CTS */
#define UART0_CTS_GPIO0 \
ESP32_PINMUX(0, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO1 \
ESP32_PINMUX(1, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO2 \
ESP32_PINMUX(2, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO3 \
ESP32_PINMUX(3, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO4 \
ESP32_PINMUX(4, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO5 \
ESP32_PINMUX(5, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO6 \
ESP32_PINMUX(6, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO7 \
ESP32_PINMUX(7, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO8 \
ESP32_PINMUX(8, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO9 \
ESP32_PINMUX(9, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO10 \
ESP32_PINMUX(10, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO11 \
ESP32_PINMUX(11, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO12 \
ESP32_PINMUX(12, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO13 \
ESP32_PINMUX(13, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO14 \
ESP32_PINMUX(14, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO15 \
ESP32_PINMUX(15, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO16 \
ESP32_PINMUX(16, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO17 \
ESP32_PINMUX(17, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO18 \
ESP32_PINMUX(18, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO19 \
ESP32_PINMUX(19, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO20 \
ESP32_PINMUX(20, ESP_U0CTS_IN, ESP_NOSIG)
#define UART0_CTS_GPIO21 \
ESP32_PINMUX(21, ESP_U0CTS_IN, ESP_NOSIG)
/* UART0_DSR */
#define UART0_DSR_GPIO0 \
ESP32_PINMUX(0, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO1 \
ESP32_PINMUX(1, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO2 \
ESP32_PINMUX(2, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO3 \
ESP32_PINMUX(3, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO4 \
ESP32_PINMUX(4, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO5 \
ESP32_PINMUX(5, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO6 \
ESP32_PINMUX(6, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO7 \
ESP32_PINMUX(7, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO8 \
ESP32_PINMUX(8, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO9 \
ESP32_PINMUX(9, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO10 \
ESP32_PINMUX(10, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO11 \
ESP32_PINMUX(11, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO12 \
ESP32_PINMUX(12, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO13 \
ESP32_PINMUX(13, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO14 \
ESP32_PINMUX(14, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO15 \
ESP32_PINMUX(15, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO16 \
ESP32_PINMUX(16, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO17 \
ESP32_PINMUX(17, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO18 \
ESP32_PINMUX(18, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO19 \
ESP32_PINMUX(19, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO20 \
ESP32_PINMUX(20, ESP_U0DSR_IN, ESP_NOSIG)
#define UART0_DSR_GPIO21 \
ESP32_PINMUX(21, ESP_U0DSR_IN, ESP_NOSIG)
/* UART0_DTR */
#define UART0_DTR_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_U0DTR_OUT)
#define UART0_DTR_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_U0DTR_OUT)
/* UART0_RTS */
#define UART0_RTS_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_U0RTS_OUT)
#define UART0_RTS_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_U0RTS_OUT)
/* UART0_RX */
#define UART0_RX_GPIO0 \
ESP32_PINMUX(0, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO1 \
ESP32_PINMUX(1, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO2 \
ESP32_PINMUX(2, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO3 \
ESP32_PINMUX(3, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO4 \
ESP32_PINMUX(4, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO5 \
ESP32_PINMUX(5, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO6 \
ESP32_PINMUX(6, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO7 \
ESP32_PINMUX(7, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO8 \
ESP32_PINMUX(8, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO9 \
ESP32_PINMUX(9, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO10 \
ESP32_PINMUX(10, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO11 \
ESP32_PINMUX(11, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO12 \
ESP32_PINMUX(12, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO13 \
ESP32_PINMUX(13, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO14 \
ESP32_PINMUX(14, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO15 \
ESP32_PINMUX(15, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO16 \
ESP32_PINMUX(16, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO17 \
ESP32_PINMUX(17, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO18 \
ESP32_PINMUX(18, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO19 \
ESP32_PINMUX(19, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO20 \
ESP32_PINMUX(20, ESP_U0RXD_IN, ESP_NOSIG)
#define UART0_RX_GPIO21 \
ESP32_PINMUX(21, ESP_U0RXD_IN, ESP_NOSIG)
/* UART0_TX */
#define UART0_TX_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_U0TXD_OUT)
#define UART0_TX_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_U0TXD_OUT)
/* UART1_CTS */
#define UART1_CTS_GPIO0 \
ESP32_PINMUX(0, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO1 \
ESP32_PINMUX(1, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO2 \
ESP32_PINMUX(2, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO3 \
ESP32_PINMUX(3, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO4 \
ESP32_PINMUX(4, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO5 \
ESP32_PINMUX(5, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO6 \
ESP32_PINMUX(6, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO7 \
ESP32_PINMUX(7, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO8 \
ESP32_PINMUX(8, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO9 \
ESP32_PINMUX(9, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO10 \
ESP32_PINMUX(10, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO11 \
ESP32_PINMUX(11, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO12 \
ESP32_PINMUX(12, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO13 \
ESP32_PINMUX(13, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO14 \
ESP32_PINMUX(14, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO15 \
ESP32_PINMUX(15, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO16 \
ESP32_PINMUX(16, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO17 \
ESP32_PINMUX(17, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO18 \
ESP32_PINMUX(18, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO19 \
ESP32_PINMUX(19, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO20 \
ESP32_PINMUX(20, ESP_U1CTS_IN, ESP_NOSIG)
#define UART1_CTS_GPIO21 \
ESP32_PINMUX(21, ESP_U1CTS_IN, ESP_NOSIG)
/* UART1_DSR */
#define UART1_DSR_GPIO0 \
ESP32_PINMUX(0, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO1 \
ESP32_PINMUX(1, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO2 \
ESP32_PINMUX(2, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO3 \
ESP32_PINMUX(3, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO4 \
ESP32_PINMUX(4, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO5 \
ESP32_PINMUX(5, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO6 \
ESP32_PINMUX(6, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO7 \
ESP32_PINMUX(7, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO8 \
ESP32_PINMUX(8, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO9 \
ESP32_PINMUX(9, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO10 \
ESP32_PINMUX(10, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO11 \
ESP32_PINMUX(11, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO12 \
ESP32_PINMUX(12, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO13 \
ESP32_PINMUX(13, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO14 \
ESP32_PINMUX(14, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO15 \
ESP32_PINMUX(15, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO16 \
ESP32_PINMUX(16, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO17 \
ESP32_PINMUX(17, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO18 \
ESP32_PINMUX(18, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO19 \
ESP32_PINMUX(19, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO20 \
ESP32_PINMUX(20, ESP_U1DSR_IN, ESP_NOSIG)
#define UART1_DSR_GPIO21 \
ESP32_PINMUX(21, ESP_U1DSR_IN, ESP_NOSIG)
/* UART1_DTR */
#define UART1_DTR_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_U1DTR_OUT)
#define UART1_DTR_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_U1DTR_OUT)
/* UART1_RTS */
#define UART1_RTS_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_U1RTS_OUT)
#define UART1_RTS_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_U1RTS_OUT)
/* UART1_RX */
#define UART1_RX_GPIO0 \
ESP32_PINMUX(0, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO1 \
ESP32_PINMUX(1, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO2 \
ESP32_PINMUX(2, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO3 \
ESP32_PINMUX(3, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO4 \
ESP32_PINMUX(4, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO5 \
ESP32_PINMUX(5, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO6 \
ESP32_PINMUX(6, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO7 \
ESP32_PINMUX(7, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO8 \
ESP32_PINMUX(8, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO9 \
ESP32_PINMUX(9, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO10 \
ESP32_PINMUX(10, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO11 \
ESP32_PINMUX(11, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO12 \
ESP32_PINMUX(12, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO13 \
ESP32_PINMUX(13, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO14 \
ESP32_PINMUX(14, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO15 \
ESP32_PINMUX(15, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO16 \
ESP32_PINMUX(16, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO17 \
ESP32_PINMUX(17, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO18 \
ESP32_PINMUX(18, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO19 \
ESP32_PINMUX(19, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO20 \
ESP32_PINMUX(20, ESP_U1RXD_IN, ESP_NOSIG)
#define UART1_RX_GPIO21 \
ESP32_PINMUX(21, ESP_U1RXD_IN, ESP_NOSIG)
/* UART1_TX */
#define UART1_TX_GPIO0 \
ESP32_PINMUX(0, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO1 \
ESP32_PINMUX(1, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO2 \
ESP32_PINMUX(2, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO3 \
ESP32_PINMUX(3, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO4 \
ESP32_PINMUX(4, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO5 \
ESP32_PINMUX(5, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO6 \
ESP32_PINMUX(6, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO7 \
ESP32_PINMUX(7, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO8 \
ESP32_PINMUX(8, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO9 \
ESP32_PINMUX(9, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO10 \
ESP32_PINMUX(10, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO11 \
ESP32_PINMUX(11, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO12 \
ESP32_PINMUX(12, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO13 \
ESP32_PINMUX(13, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO14 \
ESP32_PINMUX(14, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO15 \
ESP32_PINMUX(15, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO16 \
ESP32_PINMUX(16, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO17 \
ESP32_PINMUX(17, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO18 \
ESP32_PINMUX(18, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO19 \
ESP32_PINMUX(19, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO20 \
ESP32_PINMUX(20, ESP_NOSIG, ESP_U1TXD_OUT)
#define UART1_TX_GPIO21 \
ESP32_PINMUX(21, ESP_NOSIG, ESP_U1TXD_OUT)
#endif /* INC_DT_BINDS_PINCTRL_ESP32C3_PINCTRL_HAL_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/esp32c3-pinctrl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 21,116 |
```objective-c
/*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_GECKO_PINCTRL_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_GECKO_PINCTRL_H_
/*
* The whole GECKO_pin configuration information is encoded in a 32-bit bitfield
* organized as follows:
*
* - 31..24: Pin function.
* - 23..16: Reserved.
* - 15..8: Port for UART_RX/UART_TX functions.
* - 7..0: Pin number for UART_RX/UART_TX functions.
* - 15..8: Reserved for UART_LOC function.
* - 7..0: Loc for UART_LOC function.
*/
/**
* @name GECKO_pin configuration bit field positions and masks.
* @{
*/
/** Position of the function field. */
#define GECKO_FUN_POS 24U
/** Mask for the function field. */
#define GECKO_FUN_MSK 0xFFU
/** Position of the pin field. */
#define GECKO_PIN_POS 0U
/** Mask for the pin field. */
#define GECKO_PIN_MSK 0xFFU
/** Position of the port field. */
#define GECKO_PORT_POS 8U
/** Mask for the port field. */
#define GECKO_PORT_MSK 0xFFU
/** Position of the loc field. */
#define GECKO_LOC_POS 0U
/** Mask for the pin field. */
#define GECKO_LOC_MSK 0xFFU
/** @} */
/**
* @name GECKO_pinctrl pin functions.
* @{
*/
/** UART TX */
#define GECKO_FUN_UART_TX 0U
/** UART RX */
#define GECKO_FUN_UART_RX 1U
/** UART RTS */
#define GECKO_FUN_UART_RTS 2U
/** UART CTS */
#define GECKO_FUN_UART_CTS 3U
/** UART LOCATION */
#define GECKO_FUN_UART_LOC 4U
#define GECKO_FUN_SPI_MISO 5U
#define GECKO_FUN_SPI_MOSI 6U
#define GECKO_FUN_SPI_CSN 7U
#define GECKO_FUN_SPI_SCK 8U
#define GECKO_FUN_I2C_SDA 9U
#define GECKO_FUN_I2C_SCL 10U
#define GECKO_FUN_I2C_SDA_LOC 11U
#define GECKO_FUN_I2C_SCL_LOC 12U
/** @} */
/**
* @brief Utility macro to build GECKO psels property entry.
*
* @param fun Pin function configuration (see GECKO_FUNC_{name} macros).
* @param port Port (0 or 1).
* @param pin Pin (0..31).
*/
#define GECKO_PSEL(fun, port, pin) \
(((GECKO_PORT_##port & GECKO_PORT_MSK) << GECKO_PORT_POS) | \
((GECKO_PIN(##pin##) & GECKO_PIN_MSK) << GECKO_PIN_POS) | \
((GECKO_FUN_##fun & GECKO_FUN_MSK) << GECKO_FUN_POS))
/**
* @brief Utility macro to build GECKO_psels property entry.
*
* @param fun Pin function configuration (see GECKO_FUNC_{name} macros).
* @param loc Location.
*/
#define GECKO_LOC(fun, loc) \
(((GECKO_LOCATION(##loc##) & GECKO_LOC_MSK) << GECKO_LOC_POS) | \
((GECKO_FUN_##fun##_LOC & GECKO_FUN_MSK) << GECKO_FUN_POS))
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_GECKO_PINCTRL_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/gecko-pinctrl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 794 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_NUMICRO_PINCTRL_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_NUMICRO_PINCTRL_H_
#define NUMICRO_MFP_SHIFT 0U
#define NUMICRO_MFP_MASK 0xFU
#define NUMICRO_PIN_SHIFT 4U
#define NUMICRO_PIN_MASK 0xFU
#define NUMICRO_PORT_SHIFT 8U
#define NUMICRO_PORT_MASK 0xFU
/**
* @brief Pin configuration configuration bit field.
*
* Fields:
*
* - mfp [ 0 : 3 ]
* - pin [ 4 : 7 ]
* - port [ 8 : 11 ]
*
* @param port Port ('A'..'H')
* @param pin Pin (0..15)
* @param mfp Multi-function value (0..15)
*/
#define NUMICRO_PINMUX(port, pin, mfp) \
(((((port) - 'A') & NUMICRO_PORT_MASK) << NUMICRO_PORT_SHIFT) | \
(((pin) & NUMICRO_PIN_MASK) << NUMICRO_PIN_SHIFT) | \
(((mfp) & NUMICRO_MFP_MASK) << NUMICRO_MFP_SHIFT))
#define NUMICRO_PORT(pinmux) \
(((pinmux) >> NUMICRO_PORT_SHIFT) & NUMICRO_PORT_MASK)
#define NUMICRO_PIN(pinmux) \
(((pinmux) >> NUMICRO_PIN_SHIFT) & NUMICRO_PIN_MASK)
#define NUMICRO_MFP(pinmux) \
(((pinmux) >> NUMICRO_MFP_SHIFT) & NUMICRO_MFP_MASK)
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_NUMICRO_PINCTRL_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/numicro-pinctrl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 385 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_EMSDP_PINCTRL_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_EMSDP_PINCTRL_H_
#define PMOD_A 0
#define PMOD_B 1
#define PMOD_C 2
#define ARDUINO_PIN_0 3
#define ARDUINO_PIN_1 4
#define ARDUINO_PIN_2 5
#define ARDUINO_PIN_3 6
#define ARDUINO_PIN_4 7
#define ARDUINO_PIN_5 8
#define ARDUINO_PIN_6 9
#define ARDUINO_PIN_7 10
#define ARDUINO_PIN_8 11
#define ARDUINO_PIN_9 12
#define ARDUINO_PIN_10 13
#define ARDUINO_PIN_11 14
#define ARDUINO_PIN_12 15
#define ARDUINO_PIN_13 16
#define ARDUINO_PIN_AD0 17
#define ARDUINO_PIN_AD1 18
#define ARDUINO_PIN_AD2 19
#define ARDUINO_PIN_AD3 20
#define ARDUINO_PIN_AD4 21
#define ARDUINO_PIN_AD5 22
#define UNMUXED_PIN 23
#define PMOD_GPIO 0
#define PMOD_UARTA 1
#define PMOD_UARTB 2
#define PMOD_SPI 3
#define PMOD_I2C 4
#define PMOD_PWM_MODE1 5
#define PMOD_PWM_MODE2 6
#define PMOD_PWM_MODE3 7
#define ARDUINO_GPIO 8
#define ARDUINO_UART 9
#define ARDUINO_SPI 10
#define ARDUINO_I2C 11
#define ARDUINO_PWM 12
#define ARDUINO_ADC 13
#define NOT_PINMUX 14
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_EMSDP_PINCTRL_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/emsdp-pinctrl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 451 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_STM32_PINCTRL_COMMON_H_
#define ZEPHYR_STM32_PINCTRL_COMMON_H_
/**
* @brief numerical IDs for IO ports
*/
#define STM32_PORTA 0 /* IO port A */
#define STM32_PORTB 1 /* .. */
#define STM32_PORTC 2
#define STM32_PORTD 3
#define STM32_PORTE 4
#define STM32_PORTF 5
#define STM32_PORTG 6
#define STM32_PORTH 7
#define STM32_PORTI 8
#define STM32_PORTJ 9
#define STM32_PORTK 10 /* IO port K */
#define STM32_PORTM 12 /* IO port M (0xC) */
#define STM32_PORTN 13
#define STM32_PORTO 14
#define STM32_PORTP 15 /* IO port P (0xF) */
#ifndef STM32_PORTS_MAX
#define STM32_PORTS_MAX (STM32_PORTP + 1)
#endif
/**
* @brief helper macro to encode an IO port pin in a numerical format
*/
#define STM32PIN(_port, _pin) \
(_port << 4 | _pin)
#endif /* ZEPHYR_STM32_PINCTRL_COMMON_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/stm32-pinctrl-common.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 285 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_ESP32C2_GPIO_SIGMAP_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_ESP32C2_GPIO_SIGMAP_H_
#define ESP_NOSIG ESP_SIG_INVAL
#define ESP_SPICLK_OUT_MUX ESP_SPICLK_OUT
#define ESP_SPIQ_IN 0
#define ESP_SPIQ_OUT 0
#define ESP_SPID_IN 1
#define ESP_SPID_OUT 1
#define ESP_SPIHD_IN 2
#define ESP_SPIHD_OUT 2
#define ESP_SPIWP_IN 3
#define ESP_SPIWP_OUT 3
#define ESP_SPICLK_OUT 4
#define ESP_SPICS0_OUT 5
#define ESP_U0RXD_IN 6
#define ESP_U0TXD_OUT 6
#define ESP_U0CTS_IN 7
#define ESP_U0RTS_OUT 7
#define ESP_U0DSR_IN 8
#define ESP_U0DTR_OUT 8
#define ESP_U1RXD_IN 9
#define ESP_U1TXD_OUT 9
#define ESP_U1CTS_IN 10
#define ESP_U1RTS_OUT 10
#define ESP_U1DSR_IN 11
#define ESP_U1DTR_OUT 11
#define ESP_SPIQ_MONITOR 15
#define ESP_SPID_MONITOR 16
#define ESP_SPIHD_MONITOR 17
#define ESP_SPIWP_MONITOR 18
#define ESP_SPICS1_OUT 19
#define ESP_CPU_TESTBUS0 20
#define ESP_CPU_TESTBUS1 21
#define ESP_CPU_TESTBUS2 22
#define ESP_CPU_TESTBUS3 23
#define ESP_CPU_TESTBUS4 24
#define ESP_CPU_TESTBUS5 25
#define ESP_CPU_TESTBUS6 26
#define ESP_CPU_TESTBUS7 27
#define ESP_CPU_GPIO_IN0 28
#define ESP_CPU_GPIO_OUT0 28
#define ESP_CPU_GPIO_IN1 29
#define ESP_CPU_GPIO_OUT1 29
#define ESP_CPU_GPIO_IN2 30
#define ESP_CPU_GPIO_OUT2 30
#define ESP_CPU_GPIO_IN3 31
#define ESP_CPU_GPIO_OUT3 31
#define ESP_CPU_GPIO_IN4 32
#define ESP_CPU_GPIO_OUT4 32
#define ESP_CPU_GPIO_IN5 33
#define ESP_CPU_GPIO_OUT5 33
#define ESP_CPU_GPIO_IN6 34
#define ESP_CPU_GPIO_OUT6 34
#define ESP_CPU_GPIO_IN7 35
#define ESP_CPU_GPIO_OUT7 35
#define ESP_EXT_ADC_START 45
#define ESP_LEDC_LS_SIG_OUT0 45
#define ESP_LEDC_LS_SIG_OUT1 46
#define ESP_LEDC_LS_SIG_OUT2 47
#define ESP_LEDC_LS_SIG_OUT3 48
#define ESP_LEDC_LS_SIG_OUT4 49
#define ESP_LEDC_LS_SIG_OUT5 50
#define ESP_RMT_SIG_IN0 51
#define ESP_RMT_SIG_OUT0 51
#define ESP_RMT_SIG_IN1 52
#define ESP_RMT_SIG_OUT1 52
#define ESP_I2CEXT0_SCL_IN 53
#define ESP_I2CEXT0_SCL_OUT 53
#define ESP_I2CEXT0_SDA_IN 54
#define ESP_I2CEXT0_SDA_OUT 54
#define ESP_FSPICLK_IN 63
#define ESP_FSPICLK_OUT 63
#define ESP_FSPIQ_IN 64
#define ESP_FSPIQ_OUT 64
#define ESP_FSPID_IN 65
#define ESP_FSPID_OUT 65
#define ESP_FSPIHD_IN 66
#define ESP_FSPIHD_OUT 66
#define ESP_FSPIWP_IN 67
#define ESP_FSPIWP_OUT 67
#define ESP_FSPICS0_IN 68
#define ESP_FSPICS0_OUT 68
#define ESP_FSPICS1_OUT 69
#define ESP_FSPICS2_OUT 70
#define ESP_FSPICS3_OUT 71
#define ESP_FSPICS4_OUT 72
#define ESP_FSPICS5_OUT 73
#define ESP_EXTERN_PRIORITY_I 77
#define ESP_EXTERN_PRIORITY_O 77
#define ESP_EXTERN_ACTIVE_I 78
#define ESP_EXTERN_ACTIVE_O 78
#define ESP_GPIO_EVENT_MATRIX_IN0 79
#define ESP_GPIO_TASK_MATRIX_OUT0 79
#define ESP_GPIO_EVENT_MATRIX_IN1 80
#define ESP_GPIO_TASK_MATRIX_OUT1 80
#define ESP_GPIO_EVENT_MATRIX_IN2 81
#define ESP_GPIO_TASK_MATRIX_OUT2 81
#define ESP_GPIO_EVENT_MATRIX_IN3 82
#define ESP_GPIO_TASK_MATRIX_OUT3 82
#define ESP_BB_DIAG8_OUT 83
#define ESP_BB_DIAG9_OUT 84
#define ESP_BB_DIAG10_OUT 85
#define ESP_BB_DIAG11_OUT 86
#define ESP_BB_DIAG12_OUT 87
#define ESP_BB_DIAG13_OUT 88
#define ESP_ANT_SEL0 89
#define ESP_ANT_SEL1 90
#define ESP_ANT_SEL2 91
#define ESP_ANT_SEL3 92
#define ESP_ANT_SEL4 93
#define ESP_ANT_SEL5 94
#define ESP_ANT_SEL6 95
#define ESP_ANT_SEL7 96
#define ESP_SIG_IN_FUNC_97 97
#define ESP_SIG_IN_FUNC97 97
#define ESP_SIG_IN_FUNC_98 98
#define ESP_SIG_IN_FUNC98 98
#define ESP_SIG_IN_FUNC_99 99
#define ESP_SIG_IN_FUNC99 99
#define ESP_SIG_IN_FUNC_100 100
#define ESP_SIG_IN_FUNC100 100
#define ESP_BLE_DBG_SYNCERR 101
#define ESP_BLE_DBG_SYNC_FOUND 102
#define ESP_BLE_DBG_CH_IDX 103
#define ESP_BLE_DBG_SYNC_WINDOW 104
#define ESP_BLE_DBG_DATA_EN 105
#define ESP_BLE_DBG_DATA 106
#define ESP_BLE_DBG_PKT_TX_ON 107
#define ESP_BLE_DBG_PKT_RX_ON 108
#define ESP_BLE_DBG_TXRU_ON 109
#define ESP_BLE_DBG_RXRU_ON 110
#define ESP_BLE_DBG_LELC_ST0 111
#define ESP_BLE_DBG_LELC_ST1 112
#define ESP_BLE_DBG_LELC_ST2 113
#define ESP_BLE_DBG_LELC_ST3 114
#define ESP_BLE_DBG_CRCOK 115
#define ESP_BLE_DBG_CLK_GPIO 116
#define ESP_BLE_DBG_RADIO_START 117
#define ESP_BLE_DBG_SEQUENCE_ON 118
#define ESP_BLE_DBG_COEX_BT_ON 119
#define ESP_BLE_DBG_COEX_WIFI_ON 120
#define ESP_CLK_OUT_OUT1 123
#define ESP_CLK_OUT_OUT2 124
#define ESP_CLK_OUT_OUT3 125
#define ESP_SIG_GPIO_OUT 128
#define ESP_GPIO_MAP_DATE 0x2106190
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_ESP32C2_GPIO_SIGMAP_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/esp32c2-gpio-sigmap.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,568 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_SIFIVE_PINCTRL_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_SIFIVE_PINCTRL_H_
#define SIFIVE_PINMUX_IOF0 0x00
#define SIFIVE_PINMUX_IOF1 0x01
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_SIFIVE_PINCTRL_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/sifive-pinctrl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 88 |
```objective-c
/*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_NRF_PINCTRL_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_NRF_PINCTRL_H_
/*
* The whole nRF pin configuration information is encoded in a 32-bit bitfield
* organized as follows:
*
* - 31..18: Pin function.
* - 17: Clockpin enable.
* - 16: Pin inversion mode.
* - 15: Pin low power mode.
* - 14..11: Pin output drive configuration.
* - 10..9: Pin pull configuration.
* - 8..0: Pin number (combination of port and pin).
*/
/**
* @name nRF pin configuration bit field positions and masks.
* @{
*/
/** Position of the function field. */
#define NRF_FUN_POS 18U
/** Mask for the function field. */
#define NRF_FUN_MSK 0x3FFFU
/** Position of the clockpin enable field. */
#define NRF_CLOCKPIN_ENABLE_POS 17U
/** Mask for the clockpin enable field. */
#define NRF_CLOCKPIN_ENABLE_MSK 0x1U
/** Position of the invert field. */
#define NRF_INVERT_POS 16U
/** Mask for the invert field. */
#define NRF_INVERT_MSK 0x1U
/** Position of the low power field. */
#define NRF_LP_POS 15U
/** Mask for the low power field. */
#define NRF_LP_MSK 0x1U
/** Position of the drive configuration field. */
#define NRF_DRIVE_POS 11U
/** Mask for the drive configuration field. */
#define NRF_DRIVE_MSK 0xFU
/** Position of the pull configuration field. */
#define NRF_PULL_POS 9U
/** Mask for the pull configuration field. */
#define NRF_PULL_MSK 0x3U
/** Position of the pin field. */
#define NRF_PIN_POS 0U
/** Mask for the pin field. */
#define NRF_PIN_MSK 0x1FFU
/** @} */
/**
* @name nRF pinctrl pin functions.
* @{
*/
/** UART TX */
#define NRF_FUN_UART_TX 0U
/** UART RX */
#define NRF_FUN_UART_RX 1U
/** UART RTS */
#define NRF_FUN_UART_RTS 2U
/** UART CTS */
#define NRF_FUN_UART_CTS 3U
/** SPI master SCK */
#define NRF_FUN_SPIM_SCK 4U
/** SPI master MOSI */
#define NRF_FUN_SPIM_MOSI 5U
/** SPI master MISO */
#define NRF_FUN_SPIM_MISO 6U
/** SPI slave SCK */
#define NRF_FUN_SPIS_SCK 7U
/** SPI slave MOSI */
#define NRF_FUN_SPIS_MOSI 8U
/** SPI slave MISO */
#define NRF_FUN_SPIS_MISO 9U
/** SPI slave CSN */
#define NRF_FUN_SPIS_CSN 10U
/** TWI master SCL */
#define NRF_FUN_TWIM_SCL 11U
/** TWI master SDA */
#define NRF_FUN_TWIM_SDA 12U
/** I2S SCK in master mode */
#define NRF_FUN_I2S_SCK_M 13U
/** I2S SCK in slave mode */
#define NRF_FUN_I2S_SCK_S 14U
/** I2S LRCK in master mode */
#define NRF_FUN_I2S_LRCK_M 15U
/** I2S LRCK in slave mode */
#define NRF_FUN_I2S_LRCK_S 16U
/** I2S SDIN */
#define NRF_FUN_I2S_SDIN 17U
/** I2S SDOUT */
#define NRF_FUN_I2S_SDOUT 18U
/** I2S MCK */
#define NRF_FUN_I2S_MCK 19U
/** PDM CLK */
#define NRF_FUN_PDM_CLK 20U
/** PDM DIN */
#define NRF_FUN_PDM_DIN 21U
/** PWM OUT0 */
#define NRF_FUN_PWM_OUT0 22U
/** PWM OUT1 */
#define NRF_FUN_PWM_OUT1 23U
/** PWM OUT2 */
#define NRF_FUN_PWM_OUT2 24U
/** PWM OUT3 */
#define NRF_FUN_PWM_OUT3 25U
/** QDEC A */
#define NRF_FUN_QDEC_A 26U
/** QDEC B */
#define NRF_FUN_QDEC_B 27U
/** QDEC LED */
#define NRF_FUN_QDEC_LED 28U
/** QSPI SCK */
#define NRF_FUN_QSPI_SCK 29U
/** QSPI CSN */
#define NRF_FUN_QSPI_CSN 30U
/** QSPI IO0 */
#define NRF_FUN_QSPI_IO0 31U
/** QSPI IO1 */
#define NRF_FUN_QSPI_IO1 32U
/** QSPI IO2 */
#define NRF_FUN_QSPI_IO2 33U
/** QSPI IO3 */
#define NRF_FUN_QSPI_IO3 34U
/** EXMIF CK */
#define NRF_FUN_EXMIF_CK 35U
/** EXMIF DQ0 */
#define NRF_FUN_EXMIF_DQ0 36U
/** EXMIF DQ1 */
#define NRF_FUN_EXMIF_DQ1 37U
/** EXMIF DQ2 */
#define NRF_FUN_EXMIF_DQ2 38U
/** EXMIF DQ3 */
#define NRF_FUN_EXMIF_DQ3 39U
/** EXMIF DQ4 */
#define NRF_FUN_EXMIF_DQ4 40U
/** EXMIF DQ5 */
#define NRF_FUN_EXMIF_DQ5 41U
/** EXMIF DQ6 */
#define NRF_FUN_EXMIF_DQ6 42U
/** EXMIF DQ7 */
#define NRF_FUN_EXMIF_DQ7 43U
/** EXMIF CS0 */
#define NRF_FUN_EXMIF_CS0 44U
/** EXMIF CS1 */
#define NRF_FUN_EXMIF_CS1 45U
/** CAN TX */
#define NRF_FUN_CAN_TX 46U
/** CAN RX */
#define NRF_FUN_CAN_RX 47U
/** @} */
/**
* @name nRF pinctrl output drive.
* @{
*/
/** Standard '0', standard '1'. */
#define NRF_DRIVE_S0S1 0U
/** High drive '0', standard '1'. */
#define NRF_DRIVE_H0S1 1U
/** Standard '0', high drive '1'. */
#define NRF_DRIVE_S0H1 2U
/** High drive '0', high drive '1'. */
#define NRF_DRIVE_H0H1 3U
/** Disconnect '0' standard '1'. */
#define NRF_DRIVE_D0S1 4U
/** Disconnect '0', high drive '1'. */
#define NRF_DRIVE_D0H1 5U
/** Standard '0', disconnect '1'. */
#define NRF_DRIVE_S0D1 6U
/** High drive '0', disconnect '1'. */
#define NRF_DRIVE_H0D1 7U
/** Extra high drive '0', extra high drive '1'. */
#define NRF_DRIVE_E0E1 8U
/** @} */
/**
* @name nRF pinctrl pull-up/down.
* @note Values match nrf_gpio_pin_pull_t constants.
* @{
*/
/** Pull-up disabled. */
#define NRF_PULL_NONE 0U
/** Pull-down enabled. */
#define NRF_PULL_DOWN 1U
/** Pull-up enabled. */
#define NRF_PULL_UP 3U
/** @} */
/**
* @name nRF pinctrl low power mode.
* @{
*/
/** Input. */
#define NRF_LP_DISABLE 0U
/** Output. */
#define NRF_LP_ENABLE 1U
/** @} */
/**
* @name nRF pinctrl helpers to indicate disconnected pins.
* @{
*/
/** Indicates that a pin is disconnected */
#define NRF_PIN_DISCONNECTED NRF_PIN_MSK
/** @} */
/**
* @brief Utility macro to build nRF psels property entry.
*
* @param fun Pin function configuration (see NRF_FUNC_{name} macros).
* @param port Port (0 or 15).
* @param pin Pin (0..31).
*/
#define NRF_PSEL(fun, port, pin) \
((((((port) * 32U) + (pin)) & NRF_PIN_MSK) << NRF_PIN_POS) | \
((NRF_FUN_ ## fun & NRF_FUN_MSK) << NRF_FUN_POS))
/**
* @brief Utility macro to build nRF psels property entry when a pin is disconnected.
*
* This can be useful in situations where code running before Zephyr, e.g. a bootloader
* configures pins that later needs to be disconnected.
*
* @param fun Pin function configuration (see NRF_FUN_{name} macros).
*/
#define NRF_PSEL_DISCONNECTED(fun) \
(NRF_PIN_DISCONNECTED | \
((NRF_FUN_ ## fun & NRF_FUN_MSK) << NRF_FUN_POS))
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_NRF_PINCTRL_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/nrf-pinctrl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,899 |
```objective-c
/*
*
*/
#ifndef __APOLLO4_PINCTRL_H__
#define __APOLLO4_PINCTRL_H__
#define APOLLO4_ALT_FUNC_POS 0
#define APOLLO4_ALT_FUNC_MASK 0xf
#define APOLLO4_PIN_NUM_POS 4
#define APOLLO4_PIN_NUM_MASK 0x7f
#define APOLLO4_PINMUX(pin_num, alt_func) (pin_num << APOLLO4_PIN_NUM_POS | \
alt_func << APOLLO4_ALT_FUNC_POS)
#define SWTRACECLK_P0 APOLLO4_PINMUX(0, 0)
#define SLSCL_P0 APOLLO4_PINMUX(0, 1)
#define SLSCK_P0 APOLLO4_PINMUX(0, 2)
#define GPIO_P0 APOLLO4_PINMUX(0, 3)
#define UART0TX_P0 APOLLO4_PINMUX(0, 4)
#define UART1TX_P0 APOLLO4_PINMUX(0, 5)
#define CT0_P0 APOLLO4_PINMUX(0, 6)
#define NCE0_P0 APOLLO4_PINMUX(0, 7)
#define OBSBUS0_P0 APOLLO4_PINMUX(0, 8)
#define VCMPO_P0 APOLLO4_PINMUX(0, 9)
#define FPIO_P0 APOLLO4_PINMUX(0, 11)
#define SWTRACE0_P1 APOLLO4_PINMUX(1, 0)
#define SLSDAWIR3_P1 APOLLO4_PINMUX(1, 1)
#define SLMOSI_P1 APOLLO4_PINMUX(1, 2)
#define GPIO_P1 APOLLO4_PINMUX(1, 3)
#define UART2TX_P1 APOLLO4_PINMUX(1, 4)
#define UART3TX_P1 APOLLO4_PINMUX(1, 5)
#define CT1_P1 APOLLO4_PINMUX(1, 6)
#define NCE1_P1 APOLLO4_PINMUX(1, 7)
#define OBSBUS1_P1 APOLLO4_PINMUX(1, 8)
#define VCMPO_P1 APOLLO4_PINMUX(1, 9)
#define FPIO_P1 APOLLO4_PINMUX(1, 11)
#define SCANIN4_P1 APOLLO4_PINMUX(1, 15)
#define SWTRACE1_P2 APOLLO4_PINMUX(2, 0)
#define SLMISO_P2 APOLLO4_PINMUX(2, 1)
#define TRIG1_P2 APOLLO4_PINMUX(2, 2)
#define GPIO_P2 APOLLO4_PINMUX(2, 3)
#define UART0RX_P2 APOLLO4_PINMUX(2, 4)
#define UART1RX_P2 APOLLO4_PINMUX(2, 5)
#define CT2_P2 APOLLO4_PINMUX(2, 6)
#define NCE2_P2 APOLLO4_PINMUX(2, 7)
#define OBSBUS2_P2 APOLLO4_PINMUX(2, 8)
#define VCMPO_P2 APOLLO4_PINMUX(2, 9)
#define FPIO_P2 APOLLO4_PINMUX(2, 11)
#define SCANRSTN_P2 APOLLO4_PINMUX(2, 15)
#define SWTRACE2_P3 APOLLO4_PINMUX(3, 0)
#define SLNCE_P3 APOLLO4_PINMUX(3, 1)
#define SWO_P3 APOLLO4_PINMUX(3, 2)
#define GPIO_P3 APOLLO4_PINMUX(3, 3)
#define UART2RX_P3 APOLLO4_PINMUX(3, 4)
#define UART3RX_P3 APOLLO4_PINMUX(3, 5)
#define CT3_P3 APOLLO4_PINMUX(3, 6)
#define NCE3_P3 APOLLO4_PINMUX(3, 7)
#define OBSBUS3_P3 APOLLO4_PINMUX(3, 8)
#define FPIO_P3 APOLLO4_PINMUX(3, 11)
#define SCANIN5_P3 APOLLO4_PINMUX(3, 15)
#define SWTRACE3_P4 APOLLO4_PINMUX(4, 0)
#define SLINT_P4 APOLLO4_PINMUX(4, 1)
#define XT32KHZ_P4 APOLLO4_PINMUX(4, 2)
#define GPIO_P4 APOLLO4_PINMUX(4, 3)
#define UART0RTS_P4 APOLLO4_PINMUX(4, 4)
#define UART1RTS_P4 APOLLO4_PINMUX(4, 5)
#define CT4_P4 APOLLO4_PINMUX(4, 6)
#define NCE4_P4 APOLLO4_PINMUX(4, 7)
#define OBSBUS4_P4 APOLLO4_PINMUX(4, 8)
#define I2S0_SDIN_P4 APOLLO4_PINMUX(4, 9)
#define I2S1_SDIN_P4 APOLLO4_PINMUX(4, 10)
#define FPIO_P4 APOLLO4_PINMUX(4, 11)
#define FLB_TDO_P4 APOLLO4_PINMUX(4, 12)
#define FLLOAD_DIR_P4 APOLLO4_PINMUX(4, 13)
#define MDA_TDO_P4 APOLLO4_PINMUX(4, 14)
#define OPCG_TRIG_P4 APOLLO4_PINMUX(4, 15)
#define M0SCL_P5 APOLLO4_PINMUX(5, 0)
#define M0SCK_P5 APOLLO4_PINMUX(5, 1)
#define I2S0_CLK_P5 APOLLO4_PINMUX(5, 2)
#define GPIO_P5 APOLLO4_PINMUX(5, 3)
#define UART2RTS_P5 APOLLO4_PINMUX(5, 4)
#define UART3RTS_P5 APOLLO4_PINMUX(5, 5)
#define CT5_P5 APOLLO4_PINMUX(5, 6)
#define NCE5_P5 APOLLO4_PINMUX(5, 7)
#define OBSBUS5_P5 APOLLO4_PINMUX(5, 8)
#define I2S1_CLK_P5 APOLLO4_PINMUX(5, 10)
#define FPIO_P5 APOLLO4_PINMUX(5, 11)
#define FLB_TDI_P5 APOLLO4_PINMUX(5, 12)
#define FLLOAD_DATA_P5 APOLLO4_PINMUX(5, 13)
#define MDA_SRST_P5 APOLLO4_PINMUX(5, 14)
#define DFT_ISO_P5 APOLLO4_PINMUX(5, 15)
#define M0SDAWIR3_P6 APOLLO4_PINMUX(6, 0)
#define M0MOSI_P6 APOLLO4_PINMUX(6, 1)
#define I2S0_DATA_P6 APOLLO4_PINMUX(6, 2)
#define GPIO_P6 APOLLO4_PINMUX(6, 3)
#define UART0CTS_P6 APOLLO4_PINMUX(6, 4)
#define UART1CTS_P6 APOLLO4_PINMUX(6, 5)
#define CT6_P6 APOLLO4_PINMUX(6, 6)
#define NCE6_P6 APOLLO4_PINMUX(6, 7)
#define OBSBUS6_P6 APOLLO4_PINMUX(6, 8)
#define I2S0_SDOUT_P6 APOLLO4_PINMUX(6, 9)
#define I2S1_SDOUT_P6 APOLLO4_PINMUX(6, 10)
#define FPIO_P6 APOLLO4_PINMUX(6, 11)
#define SCANIN6_P6 APOLLO4_PINMUX(6, 15)
#define M0MISO_P7 APOLLO4_PINMUX(7, 0)
#define TRIG0_P7 APOLLO4_PINMUX(7, 1)
#define I2S0_WS_P7 APOLLO4_PINMUX(7, 2)
#define GPIO_P7 APOLLO4_PINMUX(7, 3)
#define UART2CTS_P7 APOLLO4_PINMUX(7, 4)
#define UART3CTS_P7 APOLLO4_PINMUX(7, 5)
#define CT7_P7 APOLLO4_PINMUX(7, 6)
#define NCE7_P7 APOLLO4_PINMUX(7, 7)
#define OBSBUS7_P7 APOLLO4_PINMUX(7, 8)
#define I2S1_WS_P7 APOLLO4_PINMUX(7, 10)
#define FPIO_P7 APOLLO4_PINMUX(7, 11)
#define SCANIN7_P7 APOLLO4_PINMUX(7, 15)
#define CMPRF1_P8 APOLLO4_PINMUX(8, 0)
#define TRIG1_P8 APOLLO4_PINMUX(8, 1)
#define GPIO_P8 APOLLO4_PINMUX(8, 3)
#define M1SCL_P8 APOLLO4_PINMUX(8, 4)
#define M1SCK_P8 APOLLO4_PINMUX(8, 5)
#define CT8_P8 APOLLO4_PINMUX(8, 6)
#define NCE8_P8 APOLLO4_PINMUX(8, 7)
#define OBSBUS8_P8 APOLLO4_PINMUX(8, 8)
#define FPIO_P8 APOLLO4_PINMUX(8, 11)
#define SCANOUT4_P8 APOLLO4_PINMUX(8, 15)
#define CMPRF0_P9 APOLLO4_PINMUX(9, 0)
#define TRIG2_P9 APOLLO4_PINMUX(9, 1)
#define GPIO_P9 APOLLO4_PINMUX(9, 3)
#define M1SDAWIR3_P9 APOLLO4_PINMUX(9, 4)
#define M1MOSI_P9 APOLLO4_PINMUX(9, 5)
#define CT9_P9 APOLLO4_PINMUX(9, 6)
#define NCE9_P9 APOLLO4_PINMUX(9, 7)
#define OBSBUS9_P9 APOLLO4_PINMUX(9, 8)
#define FPIO_P9 APOLLO4_PINMUX(9, 11)
#define SCANOUT5_P9 APOLLO4_PINMUX(9, 15)
#define CMPIN0_P10 APOLLO4_PINMUX(10, 0)
#define TRIG3_P10 APOLLO4_PINMUX(10, 1)
#define GPIO_P10 APOLLO4_PINMUX(10, 3)
#define M1MISO_P10 APOLLO4_PINMUX(10, 4)
#define CT10_P10 APOLLO4_PINMUX(10, 6)
#define NCE10_P10 APOLLO4_PINMUX(10, 7)
#define OBSBUS10_P10 APOLLO4_PINMUX(10, 8)
#define DISP_TE_P10 APOLLO4_PINMUX(10, 9)
#define FPIO_P10 APOLLO4_PINMUX(10, 11)
#define OPCG_LOAD_P10 APOLLO4_PINMUX(10, 15)
#define CMPIN1_P11 APOLLO4_PINMUX(11, 0)
#define TRIG0_P11 APOLLO4_PINMUX(11, 1)
#define I2S0_CLK_P11 APOLLO4_PINMUX(11, 2)
#define GPIO_P11 APOLLO4_PINMUX(11, 3)
#define UART2RX_P11 APOLLO4_PINMUX(11, 4)
#define UART3RX_P11 APOLLO4_PINMUX(11, 5)
#define CT11_P11 APOLLO4_PINMUX(11, 6)
#define NCE11_P11 APOLLO4_PINMUX(11, 7)
#define OBSBUS11_P11 APOLLO4_PINMUX(11, 8)
#define FPIO_P11 APOLLO4_PINMUX(11, 11)
#define FLB_TCLK_P11 APOLLO4_PINMUX(11, 12)
#define FLLOAD_ADDR_P11 APOLLO4_PINMUX(11, 13)
#define MDA_TCK_P11 APOLLO4_PINMUX(11, 14)
#define SCANIN0_P11 APOLLO4_PINMUX(11, 15)
#define ADCSE7_P12 APOLLO4_PINMUX(12, 0)
#define TRIG1_P12 APOLLO4_PINMUX(12, 1)
#define I2S0_DATA_P12 APOLLO4_PINMUX(12, 2)
#define GPIO_P12 APOLLO4_PINMUX(12, 3)
#define UART0TX_P12 APOLLO4_PINMUX(12, 4)
#define UART1TX_P12 APOLLO4_PINMUX(12, 5)
#define CT12_P12 APOLLO4_PINMUX(12, 6)
#define NCE12_P12 APOLLO4_PINMUX(12, 7)
#define OBSBUS12_P12 APOLLO4_PINMUX(12, 8)
#define CMPRF2_P12 APOLLO4_PINMUX(12, 9)
#define I2S0_SDOUT_P12 APOLLO4_PINMUX(12, 10)
#define FPIO_P12 APOLLO4_PINMUX(12, 11)
#define SCANOUT3_P12 APOLLO4_PINMUX(12, 15)
#define ADCSE6_P13 APOLLO4_PINMUX(13, 0)
#define TRIG2_P13 APOLLO4_PINMUX(13, 1)
#define I2S0_WS_P13 APOLLO4_PINMUX(13, 2)
#define GPIO_P13 APOLLO4_PINMUX(13, 3)
#define UART2TX_P13 APOLLO4_PINMUX(13, 4)
#define UART3TX_P13 APOLLO4_PINMUX(13, 5)
#define CT13_P13 APOLLO4_PINMUX(13, 6)
#define NCE13_P13 APOLLO4_PINMUX(13, 7)
#define OBSBUS13_P13 APOLLO4_PINMUX(13, 8)
#define FPIO_P13 APOLLO4_PINMUX(13, 11)
#define FLB_FCLK_P13 APOLLO4_PINMUX(13, 12)
#define FLLOAD_DATA_P13 APOLLO4_PINMUX(13, 13)
#define MDA_TDI_P13 APOLLO4_PINMUX(13, 14)
#define SCANOUT0_P13 APOLLO4_PINMUX(13, 15)
#define ADCSE5_P14 APOLLO4_PINMUX(14, 0)
#define TRIG3_P14 APOLLO4_PINMUX(14, 1)
#define GPIO_P14 APOLLO4_PINMUX(14, 3)
#define MILLI_CLK_P14 APOLLO4_PINMUX(14, 4)
#define UART1RX_P14 APOLLO4_PINMUX(14, 5)
#define CT14_P14 APOLLO4_PINMUX(14, 6)
#define NCE14_P14 APOLLO4_PINMUX(14, 7)
#define OBSBUS14_P14 APOLLO4_PINMUX(14, 8)
#define I2S0_SDIN_P14 APOLLO4_PINMUX(14, 10)
#define FPIO_P14 APOLLO4_PINMUX(14, 11)
#define FLLOAD_ADDR_P14 APOLLO4_PINMUX(14, 13)
#define MDA_TRSTN_P14 APOLLO4_PINMUX(14, 14)
#define SCANOUT2_P14 APOLLO4_PINMUX(14, 15)
#define ADCSE4_P15 APOLLO4_PINMUX(15, 0)
#define TRIG0_P15 APOLLO4_PINMUX(15, 1)
#define GPIO_P15 APOLLO4_PINMUX(15, 3)
#define MILLI_REC_DAT_P15 APOLLO4_PINMUX(15, 4)
#define UART3RX_P15 APOLLO4_PINMUX(15, 5)
#define CT15_P15 APOLLO4_PINMUX(15, 6)
#define NCE15_P15 APOLLO4_PINMUX(15, 7)
#define OBSBUS15_P15 APOLLO4_PINMUX(15, 8)
#define REFCLK_EXT_P15 APOLLO4_PINMUX(15, 10)
#define FPIO_P15 APOLLO4_PINMUX(15, 11)
#define FLLOAD_DATA_P15 APOLLO4_PINMUX(15, 13)
#define SCANOUT1_P15 APOLLO4_PINMUX(15, 15)
#define ADCSE3_P16 APOLLO4_PINMUX(16, 0)
#define TRIG1_P16 APOLLO4_PINMUX(16, 1)
#define I2S1_CLK_P16 APOLLO4_PINMUX(16, 2)
#define GPIO_P16 APOLLO4_PINMUX(16, 3)
#define MILLI_PBDATA1_P16 APOLLO4_PINMUX(16, 4)
#define UART1RTS_P16 APOLLO4_PINMUX(16, 5)
#define CT16_P16 APOLLO4_PINMUX(16, 6)
#define NCE16_P16 APOLLO4_PINMUX(16, 7)
#define OBSBUS0_P16 APOLLO4_PINMUX(16, 8)
#define FPIO_P16 APOLLO4_PINMUX(16, 11)
#define DFT_RET_P16 APOLLO4_PINMUX(16, 15)
#define ADCSE2_P17 APOLLO4_PINMUX(17, 0)
#define TRIG2_P17 APOLLO4_PINMUX(17, 1)
#define I2S1_DATA_P17 APOLLO4_PINMUX(17, 2)
#define GPIO_P17 APOLLO4_PINMUX(17, 3)
#define MILLI_PBDATA2_P17 APOLLO4_PINMUX(17, 4)
#define UART3RTS_P17 APOLLO4_PINMUX(17, 5)
#define CT17_P17 APOLLO4_PINMUX(17, 6)
#define NCE17_P17 APOLLO4_PINMUX(17, 7)
#define OBSBUS1_P17 APOLLO4_PINMUX(17, 8)
#define I2S1_SDOUT_P17 APOLLO4_PINMUX(17, 9)
#define FPIO_P17 APOLLO4_PINMUX(17, 11)
#define FLLOAD_STRB_P17 APOLLO4_PINMUX(17, 13)
#define MDA_TMS_P17 APOLLO4_PINMUX(17, 14)
#define OPCG_CLK_P17 APOLLO4_PINMUX(17, 15)
#define ADCSE1_P18 APOLLO4_PINMUX(18, 0)
#define ANATEST2_P18 APOLLO4_PINMUX(18, 1)
#define I2S1_WS_P18 APOLLO4_PINMUX(18, 2)
#define GPIO_P18 APOLLO4_PINMUX(18, 3)
#define UART0CTS_P18 APOLLO4_PINMUX(18, 4)
#define UART1CTS_P18 APOLLO4_PINMUX(18, 5)
#define CT18_P18 APOLLO4_PINMUX(18, 6)
#define NCE18_P18 APOLLO4_PINMUX(18, 7)
#define OBSBUS2_P18 APOLLO4_PINMUX(18, 8)
#define FPIO_P18 APOLLO4_PINMUX(18, 11)
#define FLB_TMS_P18 APOLLO4_PINMUX(18, 12)
#define FLLOAD_DATA_P18 APOLLO4_PINMUX(18, 13)
#define MDA_HFRC_EXT_P18 APOLLO4_PINMUX(18, 14)
#define SCANIN1_P18 APOLLO4_PINMUX(18, 15)
#define ADCSE0_P19 APOLLO4_PINMUX(19, 0)
#define ANATEST1_P19 APOLLO4_PINMUX(19, 1)
#define GPIO_P19 APOLLO4_PINMUX(19, 3)
#define UART2CTS_P19 APOLLO4_PINMUX(19, 4)
#define UART3CTS_P19 APOLLO4_PINMUX(19, 5)
#define CT19_P19 APOLLO4_PINMUX(19, 6)
#define NCE19_P19 APOLLO4_PINMUX(19, 7)
#define OBSBUS3_P19 APOLLO4_PINMUX(19, 8)
#define I2S1_SDIN_P19 APOLLO4_PINMUX(19, 9)
#define FPIO_P19 APOLLO4_PINMUX(19, 11)
#define FLB_TRSTN_P19 APOLLO4_PINMUX(19, 12)
#define FLLOAD_ADDR_P19 APOLLO4_PINMUX(19, 13)
#define SCANIN2_P19 APOLLO4_PINMUX(19, 15)
#define SWDCK_P20 APOLLO4_PINMUX(20, 0)
#define TRIG1_P20 APOLLO4_PINMUX(20, 1)
#define GPIO_P20 APOLLO4_PINMUX(20, 3)
#define UART0TX_P20 APOLLO4_PINMUX(20, 4)
#define UART1TX_P20 APOLLO4_PINMUX(20, 5)
#define CT20_P20 APOLLO4_PINMUX(20, 6)
#define NCE20_P20 APOLLO4_PINMUX(20, 7)
#define OBSBUS4_P20 APOLLO4_PINMUX(20, 8)
#define FPIO_P20 APOLLO4_PINMUX(20, 11)
#define SCANCLK_P20 APOLLO4_PINMUX(20, 15)
#define SWDIO_P21 APOLLO4_PINMUX(21, 0)
#define TRIG2_P21 APOLLO4_PINMUX(21, 1)
#define GPIO_P21 APOLLO4_PINMUX(21, 3)
#define UART2TX_P21 APOLLO4_PINMUX(21, 4)
#define UART3TX_P21 APOLLO4_PINMUX(21, 5)
#define CT21_P21 APOLLO4_PINMUX(21, 6)
#define NCE21_P21 APOLLO4_PINMUX(21, 7)
#define OBSBUS5_P21 APOLLO4_PINMUX(21, 8)
#define FPIO_P21 APOLLO4_PINMUX(21, 11)
#define SCANSHFT_P21 APOLLO4_PINMUX(21, 15)
#define M7SCL_P22 APOLLO4_PINMUX(22, 0)
#define M7SCK_P22 APOLLO4_PINMUX(22, 1)
#define SWO_P22 APOLLO4_PINMUX(22, 2)
#define GPIO_P22 APOLLO4_PINMUX(22, 3)
#define UART0RX_P22 APOLLO4_PINMUX(22, 4)
#define UART1RX_P22 APOLLO4_PINMUX(22, 5)
#define CT22_P22 APOLLO4_PINMUX(22, 6)
#define NCE22_P22 APOLLO4_PINMUX(22, 7)
#define OBSBUS6_P22 APOLLO4_PINMUX(22, 8)
#define VCMPO_P22 APOLLO4_PINMUX(22, 9)
#define I3CM1_SCL_P22 APOLLO4_PINMUX(22, 10)
#define FPIO_P22 APOLLO4_PINMUX(22, 11)
#define SCANIN3_P22 APOLLO4_PINMUX(22, 15)
#define M7SDAWIR3_P23 APOLLO4_PINMUX(23, 0)
#define M7MOSI_P23 APOLLO4_PINMUX(23, 1)
#define SWO_P23 APOLLO4_PINMUX(23, 2)
#define GPIO_P23 APOLLO4_PINMUX(23, 3)
#define UART2RX_P23 APOLLO4_PINMUX(23, 4)
#define UART3RX_P23 APOLLO4_PINMUX(23, 5)
#define CT23_P23 APOLLO4_PINMUX(23, 6)
#define NCE23_P23 APOLLO4_PINMUX(23, 7)
#define OBSBUS7_P23 APOLLO4_PINMUX(23, 8)
#define VCMPO_P23 APOLLO4_PINMUX(23, 9)
#define I3CM1_SDA_P23 APOLLO4_PINMUX(23, 10)
#define FPIO_P23 APOLLO4_PINMUX(23, 11)
#define SCANOUT6_P23 APOLLO4_PINMUX(23, 15)
#define M7MISO_P24 APOLLO4_PINMUX(24, 0)
#define TRIG3_P24 APOLLO4_PINMUX(24, 1)
#define SWO_P24 APOLLO4_PINMUX(24, 2)
#define GPIO_P24 APOLLO4_PINMUX(24, 3)
#define UART0RTS_P24 APOLLO4_PINMUX(24, 4)
#define UART1RTS_P24 APOLLO4_PINMUX(24, 5)
#define CT24_P24 APOLLO4_PINMUX(24, 6)
#define NCE24_P24 APOLLO4_PINMUX(24, 7)
#define OBSBUS8_P24 APOLLO4_PINMUX(24, 8)
#define FPIO_P24 APOLLO4_PINMUX(24, 11)
#define SCANOUT7_P24 APOLLO4_PINMUX(24, 15)
#define M2SCL_P25 APOLLO4_PINMUX(25, 0)
#define M2SCK_P25 APOLLO4_PINMUX(25, 1)
#define GPIO_P25 APOLLO4_PINMUX(25, 3)
#define LFRC_EXT_P25 APOLLO4_PINMUX(25, 4)
#define DSP_TMS_P25 APOLLO4_PINMUX(25, 5)
#define CT25_P25 APOLLO4_PINMUX(25, 6)
#define NCE25_P25 APOLLO4_PINMUX(25, 7)
#define OBSBUS9_P25 APOLLO4_PINMUX(25, 8)
#define FPIO_P25 APOLLO4_PINMUX(25, 11)
#define SCANIN8_P25 APOLLO4_PINMUX(25, 15)
#define M2SDAWIR3_P26 APOLLO4_PINMUX(26, 0)
#define M2MOSI_P26 APOLLO4_PINMUX(26, 1)
#define GPIO_P26 APOLLO4_PINMUX(26, 3)
#define HFRC_EXT_P26 APOLLO4_PINMUX(26, 4)
#define CT26_P26 APOLLO4_PINMUX(26, 6)
#define NCE26_P26 APOLLO4_PINMUX(26, 7)
#define OBSBUS10_P26 APOLLO4_PINMUX(26, 8)
#define VCMPO_P26 APOLLO4_PINMUX(26, 9)
#define FPIO_P26 APOLLO4_PINMUX(26, 11)
#define SCANIN9_P26 APOLLO4_PINMUX(26, 15)
#define M2MISO_P27 APOLLO4_PINMUX(27, 0)
#define TRIG0_P27 APOLLO4_PINMUX(27, 1)
#define GPIO_P27 APOLLO4_PINMUX(27, 3)
#define XT_EXT_P27 APOLLO4_PINMUX(27, 4)
#define DSP_TCK_P27 APOLLO4_PINMUX(27, 5)
#define CT27_P27 APOLLO4_PINMUX(27, 6)
#define NCE27_P27 APOLLO4_PINMUX(27, 7)
#define OBSBUS11_P27 APOLLO4_PINMUX(27, 8)
#define I2S0_SDIN_P27 APOLLO4_PINMUX(27, 9)
#define FPIO_P27 APOLLO4_PINMUX(27, 11)
#define SCANIN10_P27 APOLLO4_PINMUX(27, 15)
#define SWO_P28 APOLLO4_PINMUX(28, 0)
#define VCMPO_P28 APOLLO4_PINMUX(28, 1)
#define I2S0_CLK_P28 APOLLO4_PINMUX(28, 2)
#define GPIO_P28 APOLLO4_PINMUX(28, 3)
#define UART2CTS_P28 APOLLO4_PINMUX(28, 4)
#define DSP_TDO_P28 APOLLO4_PINMUX(28, 5)
#define CT28_P28 APOLLO4_PINMUX(28, 6)
#define NCE28_P28 APOLLO4_PINMUX(28, 7)
#define OBSBUS12_P28 APOLLO4_PINMUX(28, 8)
#define FPIO_P28 APOLLO4_PINMUX(28, 11)
#define CME_P28 APOLLO4_PINMUX(28, 15)
#define TRIG0_P29 APOLLO4_PINMUX(29, 0)
#define VCMPO_P29 APOLLO4_PINMUX(29, 1)
#define I2S0_DATA_P29 APOLLO4_PINMUX(29, 2)
#define GPIO_P29 APOLLO4_PINMUX(29, 3)
#define UART1CTS_P29 APOLLO4_PINMUX(29, 4)
#define DSP_TRSTN_P29 APOLLO4_PINMUX(29, 5)
#define CT29_P29 APOLLO4_PINMUX(29, 6)
#define NCE29_P29 APOLLO4_PINMUX(29, 7)
#define OBSBUS13_P29 APOLLO4_PINMUX(29, 8)
#define I2S0_SDOUT_P29 APOLLO4_PINMUX(29, 9)
#define FPIO_P29 APOLLO4_PINMUX(29, 11)
#define CMLE_P29 APOLLO4_PINMUX(29, 15)
#define TRIG1_P30 APOLLO4_PINMUX(30, 0)
#define VCMPO_P30 APOLLO4_PINMUX(30, 1)
#define I2S0_WS_P30 APOLLO4_PINMUX(30, 2)
#define GPIO_P30 APOLLO4_PINMUX(30, 3)
#define UART0TX_P30 APOLLO4_PINMUX(30, 4)
#define DSP_TDI_P30 APOLLO4_PINMUX(30, 5)
#define CT30_P30 APOLLO4_PINMUX(30, 6)
#define NCE30_P30 APOLLO4_PINMUX(30, 7)
#define OBSBUS14_P30 APOLLO4_PINMUX(30, 8)
#define FPIO_P30 APOLLO4_PINMUX(30, 11)
#define SCANOUT8_P30 APOLLO4_PINMUX(30, 15)
#define M3SCL_P31 APOLLO4_PINMUX(31, 0)
#define M3SCK_P31 APOLLO4_PINMUX(31, 1)
#define GPIO_P31 APOLLO4_PINMUX(31, 3)
#define UART2TX_P31 APOLLO4_PINMUX(31, 4)
#define CT31_P31 APOLLO4_PINMUX(31, 6)
#define NCE31_P31 APOLLO4_PINMUX(31, 7)
#define OBSBUS15_P31 APOLLO4_PINMUX(31, 8)
#define VCMPO_P31 APOLLO4_PINMUX(31, 9)
#define FPIO_P31 APOLLO4_PINMUX(31, 11)
#define SCANOUT9_P31 APOLLO4_PINMUX(31, 15)
#define M3SDAWIR3_P32 APOLLO4_PINMUX(32, 0)
#define M3MOSI_P32 APOLLO4_PINMUX(32, 1)
#define GPIO_P32 APOLLO4_PINMUX(32, 3)
#define UART0RX_P32 APOLLO4_PINMUX(32, 4)
#define CT32_P32 APOLLO4_PINMUX(32, 6)
#define NCE32_P32 APOLLO4_PINMUX(32, 7)
#define OBSBUS0_P32 APOLLO4_PINMUX(32, 8)
#define FPIO_P32 APOLLO4_PINMUX(32, 11)
#define SCANOUT10_P32 APOLLO4_PINMUX(32, 15)
#define M3MISO_P33 APOLLO4_PINMUX(33, 0)
#define CLKOUT_P33 APOLLO4_PINMUX(33, 1)
#define GPIO_P33 APOLLO4_PINMUX(33, 3)
#define UART2RX_P33 APOLLO4_PINMUX(33, 4)
#define CT33_P33 APOLLO4_PINMUX(33, 6)
#define NCE33_P33 APOLLO4_PINMUX(33, 7)
#define OBSBUS1_P33 APOLLO4_PINMUX(33, 8)
#define DISP_TE_P33 APOLLO4_PINMUX(33, 9)
#define FPIO_P33 APOLLO4_PINMUX(33, 11)
#define SCANOUT11_P33 APOLLO4_PINMUX(33, 15)
#define M4SCL_P34 APOLLO4_PINMUX(34, 0)
#define M4SCK_P34 APOLLO4_PINMUX(34, 1)
#define SWO_P34 APOLLO4_PINMUX(34, 2)
#define GPIO_P34 APOLLO4_PINMUX(34, 3)
#define UART0TX_P34 APOLLO4_PINMUX(34, 4)
#define CT34_P34 APOLLO4_PINMUX(34, 6)
#define NCE34_P34 APOLLO4_PINMUX(34, 7)
#define OBSBUS2_P34 APOLLO4_PINMUX(34, 8)
#define VCMPO_P34 APOLLO4_PINMUX(34, 9)
#define FPIO_P34 APOLLO4_PINMUX(34, 11)
#define M4SDAWIR3_P35 APOLLO4_PINMUX(35, 0)
#define M4MOSI_P35 APOLLO4_PINMUX(35, 1)
#define SWO_P35 APOLLO4_PINMUX(35, 2)
#define GPIO_P35 APOLLO4_PINMUX(35, 3)
#define UART2TX_P35 APOLLO4_PINMUX(35, 4)
#define UART3TX_P35 APOLLO4_PINMUX(35, 5)
#define CT35_P35 APOLLO4_PINMUX(35, 6)
#define NCE35_P35 APOLLO4_PINMUX(35, 7)
#define OBSBUS3_P35 APOLLO4_PINMUX(35, 8)
#define VCMPO_P35 APOLLO4_PINMUX(35, 9)
#define FPIO_P35 APOLLO4_PINMUX(35, 11)
#define M4MISO_P36 APOLLO4_PINMUX(36, 0)
#define TRIG0_P36 APOLLO4_PINMUX(36, 1)
#define SWO_P36 APOLLO4_PINMUX(36, 2)
#define GPIO_P36 APOLLO4_PINMUX(36, 3)
#define UART0RX_P36 APOLLO4_PINMUX(36, 4)
#define UART1RX_P36 APOLLO4_PINMUX(36, 5)
#define CT36_P36 APOLLO4_PINMUX(36, 6)
#define NCE36_P36 APOLLO4_PINMUX(36, 7)
#define OBSBUS4_P36 APOLLO4_PINMUX(36, 8)
#define FPIO_P36 APOLLO4_PINMUX(36, 11)
#define MSPI1_0_P37 APOLLO4_PINMUX(37, 0)
#define TRIG1_P37 APOLLO4_PINMUX(37, 1)
#define XT32KHZ_P37 APOLLO4_PINMUX(37, 2)
#define GPIO_P37 APOLLO4_PINMUX(37, 3)
#define UART2RX_P37 APOLLO4_PINMUX(37, 4)
#define DISP_D15_P37 APOLLO4_PINMUX(37, 5)
#define CT37_P37 APOLLO4_PINMUX(37, 6)
#define NCE37_P37 APOLLO4_PINMUX(37, 7)
#define OBSBUS5_P37 APOLLO4_PINMUX(37, 8)
#define FPIO_P37 APOLLO4_PINMUX(37, 11)
#define MSPI1_1_P38 APOLLO4_PINMUX(38, 0)
#define TRIG2_P38 APOLLO4_PINMUX(38, 1)
#define SWTRACECLK_P38 APOLLO4_PINMUX(38, 2)
#define GPIO_P38 APOLLO4_PINMUX(38, 3)
#define UART0RTS_P38 APOLLO4_PINMUX(38, 4)
#define DISP_D16_P38 APOLLO4_PINMUX(38, 5)
#define CT38_P38 APOLLO4_PINMUX(38, 6)
#define NCE38_P38 APOLLO4_PINMUX(38, 7)
#define OBSBUS6_P38 APOLLO4_PINMUX(38, 8)
#define FPIO_P38 APOLLO4_PINMUX(38, 11)
#define MSPI1_2_P39 APOLLO4_PINMUX(39, 0)
#define TRIG3_P39 APOLLO4_PINMUX(39, 1)
#define SWTRACE0_P39 APOLLO4_PINMUX(39, 2)
#define GPIO_P39 APOLLO4_PINMUX(39, 3)
#define UART2RTS_P39 APOLLO4_PINMUX(39, 4)
#define DISP_D17_P39 APOLLO4_PINMUX(39, 5)
#define CT39_P39 APOLLO4_PINMUX(39, 6)
#define NCE39_P39 APOLLO4_PINMUX(39, 7)
#define OBSBUS7_P39 APOLLO4_PINMUX(39, 8)
#define FPIO_P39 APOLLO4_PINMUX(39, 11)
#define MSPI1_3_P40 APOLLO4_PINMUX(40, 0)
#define TRIG1_P40 APOLLO4_PINMUX(40, 1)
#define SWTRACE1_P40 APOLLO4_PINMUX(40, 2)
#define GPIO_P40 APOLLO4_PINMUX(40, 3)
#define UART0CTS_P40 APOLLO4_PINMUX(40, 4)
#define DISP_D18_P40 APOLLO4_PINMUX(40, 5)
#define CT40_P40 APOLLO4_PINMUX(40, 6)
#define NCE40_P40 APOLLO4_PINMUX(40, 7)
#define OBSBUS8_P40 APOLLO4_PINMUX(40, 8)
#define FPIO_P40 APOLLO4_PINMUX(40, 11)
#define MSPI1_4_P41 APOLLO4_PINMUX(41, 0)
#define TRIG0_P41 APOLLO4_PINMUX(41, 1)
#define SWTRACE2_P41 APOLLO4_PINMUX(41, 2)
#define GPIO_P41 APOLLO4_PINMUX(41, 3)
#define UART0TX_P41 APOLLO4_PINMUX(41, 4)
#define DISP_D19_P41 APOLLO4_PINMUX(41, 5)
#define CT41_P41 APOLLO4_PINMUX(41, 6)
#define NCE41_P41 APOLLO4_PINMUX(41, 7)
#define OBSBUS9_P41 APOLLO4_PINMUX(41, 8)
#define SWO_P41 APOLLO4_PINMUX(41, 9)
#define FPIO_P41 APOLLO4_PINMUX(41, 11)
#define MSPI1_5_P42 APOLLO4_PINMUX(42, 0)
#define TRIG2_P42 APOLLO4_PINMUX(42, 1)
#define SWTRACE3_P42 APOLLO4_PINMUX(42, 2)
#define GPIO_P42 APOLLO4_PINMUX(42, 3)
#define UART2TX_P42 APOLLO4_PINMUX(42, 4)
#define DISP_D20_P42 APOLLO4_PINMUX(42, 5)
#define CT42_P42 APOLLO4_PINMUX(42, 6)
#define NCE42_P42 APOLLO4_PINMUX(42, 7)
#define OBSBUS10_P42 APOLLO4_PINMUX(42, 8)
#define FPIO_P42 APOLLO4_PINMUX(42, 11)
#define MSPI1_6_P43 APOLLO4_PINMUX(43, 0)
#define TRIG3_P43 APOLLO4_PINMUX(43, 1)
#define SWTRACECTL_P43 APOLLO4_PINMUX(43, 2)
#define GPIO_P43 APOLLO4_PINMUX(43, 3)
#define UART0RX_P43 APOLLO4_PINMUX(43, 4)
#define DISP_D21_P43 APOLLO4_PINMUX(43, 5)
#define CT43_P43 APOLLO4_PINMUX(43, 6)
#define NCE43_P43 APOLLO4_PINMUX(43, 7)
#define OBSBUS11_P43 APOLLO4_PINMUX(43, 8)
#define FPIO_P43 APOLLO4_PINMUX(43, 11)
#define MSPI1_7_P44 APOLLO4_PINMUX(44, 0)
#define TRIG1_P44 APOLLO4_PINMUX(44, 1)
#define SWO_P44 APOLLO4_PINMUX(44, 2)
#define GPIO_P44 APOLLO4_PINMUX(44, 3)
#define UART2RX_P44 APOLLO4_PINMUX(44, 4)
#define DISP_D22_P44 APOLLO4_PINMUX(44, 5)
#define CT44_P44 APOLLO4_PINMUX(44, 6)
#define NCE44_P44 APOLLO4_PINMUX(44, 7)
#define OBSBUS12_P44 APOLLO4_PINMUX(44, 8)
#define VCMPO_P44 APOLLO4_PINMUX(44, 9)
#define FPIO_P44 APOLLO4_PINMUX(44, 11)
#define MSPI1_8_P45 APOLLO4_PINMUX(45, 0)
#define TRIG2_P45 APOLLO4_PINMUX(45, 1)
#define XT32KHZ_P45 APOLLO4_PINMUX(45, 2)
#define GPIO_P45 APOLLO4_PINMUX(45, 3)
#define UART0TX_P45 APOLLO4_PINMUX(45, 4)
#define DISP_D23_P45 APOLLO4_PINMUX(45, 5)
#define CT45_P45 APOLLO4_PINMUX(45, 6)
#define NCE45_P45 APOLLO4_PINMUX(45, 7)
#define OBSBUS13_P45 APOLLO4_PINMUX(45, 8)
#define FPIO_P45 APOLLO4_PINMUX(45, 11)
#define MSPI1_9_P46 APOLLO4_PINMUX(46, 0)
#define TRIG3_P46 APOLLO4_PINMUX(46, 1)
#define CLKOUT_32M_P46 APOLLO4_PINMUX(46, 2)
#define GPIO_P46 APOLLO4_PINMUX(46, 3)
#define UART2TX_P46 APOLLO4_PINMUX(46, 4)
#define UART3TX_P46 APOLLO4_PINMUX(46, 5)
#define CT46_P46 APOLLO4_PINMUX(46, 6)
#define NCE46_P46 APOLLO4_PINMUX(46, 7)
#define OBSBUS14_P46 APOLLO4_PINMUX(46, 8)
#define I2S1_SDIN_P46 APOLLO4_PINMUX(46, 9)
#define I2S0_SDIN_P46 APOLLO4_PINMUX(46, 10)
#define FPIO_P46 APOLLO4_PINMUX(46, 11)
#define M5SCL_P47 APOLLO4_PINMUX(47, 0)
#define M5SCK_P47 APOLLO4_PINMUX(47, 1)
#define I2S1_CLK_P47 APOLLO4_PINMUX(47, 2)
#define GPIO_P47 APOLLO4_PINMUX(47, 3)
#define UART0RX_P47 APOLLO4_PINMUX(47, 4)
#define UART1RX_P47 APOLLO4_PINMUX(47, 5)
#define CT47_P47 APOLLO4_PINMUX(47, 6)
#define NCE47_P47 APOLLO4_PINMUX(47, 7)
#define OBSBUS15_P47 APOLLO4_PINMUX(47, 8)
#define I2S0_CLK_P47 APOLLO4_PINMUX(47, 10)
#define FPIO_P47 APOLLO4_PINMUX(47, 11)
#define M5SDAWIR3_P48 APOLLO4_PINMUX(48, 0)
#define M5MOSI_P48 APOLLO4_PINMUX(48, 1)
#define I2S1_DATA_P48 APOLLO4_PINMUX(48, 2)
#define GPIO_P48 APOLLO4_PINMUX(48, 3)
#define UART2RX_P48 APOLLO4_PINMUX(48, 4)
#define UART3RX_P48 APOLLO4_PINMUX(48, 5)
#define CT48_P48 APOLLO4_PINMUX(48, 6)
#define NCE48_P48 APOLLO4_PINMUX(48, 7)
#define OBSBUS0_P48 APOLLO4_PINMUX(48, 8)
#define I2S1_SDOUT_P48 APOLLO4_PINMUX(48, 9)
#define I2S0_SDOUT_P48 APOLLO4_PINMUX(48, 10)
#define FPIO_P48 APOLLO4_PINMUX(48, 11)
#define M5MISO_P49 APOLLO4_PINMUX(49, 0)
#define TRIG0_P49 APOLLO4_PINMUX(49, 1)
#define I2S1_WS_P49 APOLLO4_PINMUX(49, 2)
#define GPIO_P49 APOLLO4_PINMUX(49, 3)
#define UART0RTS_P49 APOLLO4_PINMUX(49, 4)
#define UART1RTS_P49 APOLLO4_PINMUX(49, 5)
#define CT49_P49 APOLLO4_PINMUX(49, 6)
#define NCE49_P49 APOLLO4_PINMUX(49, 7)
#define OBSBUS1_P49 APOLLO4_PINMUX(49, 8)
#define I2S0_WS_P49 APOLLO4_PINMUX(49, 10)
#define FPIO_P49 APOLLO4_PINMUX(49, 11)
#define PDM0_CLK_P50 APOLLO4_PINMUX(50, 0)
#define TRIG0_P50 APOLLO4_PINMUX(50, 1)
#define SWTRACECLK_P50 APOLLO4_PINMUX(50, 2)
#define GPIO_P50 APOLLO4_PINMUX(50, 3)
#define UART2RTS_P50 APOLLO4_PINMUX(50, 4)
#define UART3RTS_P50 APOLLO4_PINMUX(50, 5)
#define CT50_P50 APOLLO4_PINMUX(50, 6)
#define NCE50_P50 APOLLO4_PINMUX(50, 7)
#define OBSBUS2_P50 APOLLO4_PINMUX(50, 8)
#define DISP_TE_P50 APOLLO4_PINMUX(50, 9)
#define FPIO_P50 APOLLO4_PINMUX(50, 11)
#define PDM0_DATA_P51 APOLLO4_PINMUX(51, 0)
#define TRIG1_P51 APOLLO4_PINMUX(51, 1)
#define SWTRACE0_P51 APOLLO4_PINMUX(51, 2)
#define GPIO_P51 APOLLO4_PINMUX(51, 3)
#define UART0CTS_P51 APOLLO4_PINMUX(51, 4)
#define UART1CTS_P51 APOLLO4_PINMUX(51, 5)
#define CT51_P51 APOLLO4_PINMUX(51, 6)
#define NCE51_P51 APOLLO4_PINMUX(51, 7)
#define OBSBUS3_P51 APOLLO4_PINMUX(51, 8)
#define FPIO_P51 APOLLO4_PINMUX(51, 11)
#define PDM1_CLK_P52 APOLLO4_PINMUX(52, 0)
#define TRIG2_P52 APOLLO4_PINMUX(52, 1)
#define SWTRACE1_P52 APOLLO4_PINMUX(52, 2)
#define GPIO_P52 APOLLO4_PINMUX(52, 3)
#define UART2CTS_P52 APOLLO4_PINMUX(52, 4)
#define UART3CTS_P52 APOLLO4_PINMUX(52, 5)
#define CT52_P52 APOLLO4_PINMUX(52, 6)
#define NCE52_P52 APOLLO4_PINMUX(52, 7)
#define OBSBUS4_P52 APOLLO4_PINMUX(52, 8)
#define VCMPO_P52 APOLLO4_PINMUX(52, 9)
#define FPIO_P52 APOLLO4_PINMUX(52, 11)
#define PDM1_DATA_P53 APOLLO4_PINMUX(53, 0)
#define TRIG3_P53 APOLLO4_PINMUX(53, 1)
#define SWTRACE2_P53 APOLLO4_PINMUX(53, 2)
#define GPIO_P53 APOLLO4_PINMUX(53, 3)
#define UART0TX_P53 APOLLO4_PINMUX(53, 4)
#define UART1TX_P53 APOLLO4_PINMUX(53, 5)
#define CT53_P53 APOLLO4_PINMUX(53, 6)
#define NCE53_P53 APOLLO4_PINMUX(53, 7)
#define OBSBUS5_P53 APOLLO4_PINMUX(53, 8)
#define FPIO_P53 APOLLO4_PINMUX(53, 11)
#define PDM2_CLK_P54 APOLLO4_PINMUX(54, 0)
#define TRIG0_P54 APOLLO4_PINMUX(54, 1)
#define SWTRACE3_P54 APOLLO4_PINMUX(54, 2)
#define GPIO_P54 APOLLO4_PINMUX(54, 3)
#define UART2TX_P54 APOLLO4_PINMUX(54, 4)
#define UART3TX_P54 APOLLO4_PINMUX(54, 5)
#define CT54_P54 APOLLO4_PINMUX(54, 6)
#define NCE54_P54 APOLLO4_PINMUX(54, 7)
#define OBSBUS6_P54 APOLLO4_PINMUX(54, 8)
#define FPIO_P54 APOLLO4_PINMUX(54, 11)
#define PDM2_DATA_P55 APOLLO4_PINMUX(55, 0)
#define TRIG1_P55 APOLLO4_PINMUX(55, 1)
#define SWTRACECTL_P55 APOLLO4_PINMUX(55, 2)
#define GPIO_P55 APOLLO4_PINMUX(55, 3)
#define UART0RX_P55 APOLLO4_PINMUX(55, 4)
#define UART1RX_P55 APOLLO4_PINMUX(55, 5)
#define CT55_P55 APOLLO4_PINMUX(55, 6)
#define NCE55_P55 APOLLO4_PINMUX(55, 7)
#define OBSBUS7_P55 APOLLO4_PINMUX(55, 8)
#define FPIO_P55 APOLLO4_PINMUX(55, 11)
#define PDM3_CLK_P56 APOLLO4_PINMUX(56, 0)
#define TRIG2_P56 APOLLO4_PINMUX(56, 1)
#define SWO_P56 APOLLO4_PINMUX(56, 2)
#define GPIO_P56 APOLLO4_PINMUX(56, 3)
#define UART2RX_P56 APOLLO4_PINMUX(56, 4)
#define UART3RX_P56 APOLLO4_PINMUX(56, 5)
#define CT56_P56 APOLLO4_PINMUX(56, 6)
#define NCE56_P56 APOLLO4_PINMUX(56, 7)
#define OBSBUS8_P56 APOLLO4_PINMUX(56, 8)
#define FPIO_P56 APOLLO4_PINMUX(56, 11)
#define PDM3_DATA_P57 APOLLO4_PINMUX(57, 0)
#define TRIG3_P57 APOLLO4_PINMUX(57, 1)
#define SWO_P57 APOLLO4_PINMUX(57, 2)
#define GPIO_P57 APOLLO4_PINMUX(57, 3)
#define UART0RTS_P57 APOLLO4_PINMUX(57, 4)
#define UART1RTS_P57 APOLLO4_PINMUX(57, 5)
#define CT57_P57 APOLLO4_PINMUX(57, 6)
#define NCE57_P57 APOLLO4_PINMUX(57, 7)
#define OBSBUS9_P57 APOLLO4_PINMUX(57, 8)
#define VCMPO_P57 APOLLO4_PINMUX(57, 9)
#define FPIO_P57 APOLLO4_PINMUX(57, 11)
#define GPIO_P58 APOLLO4_PINMUX(58, 3)
#define UART0RTS_P58 APOLLO4_PINMUX(58, 4)
#define UART3RTS_P58 APOLLO4_PINMUX(58, 5)
#define CT58_P58 APOLLO4_PINMUX(58, 6)
#define NCE58_P58 APOLLO4_PINMUX(58, 7)
#define OBSBUS10_P58 APOLLO4_PINMUX(58, 8)
#define FPIO_P58 APOLLO4_PINMUX(58, 11)
#define TRIG0_P59 APOLLO4_PINMUX(59, 1)
#define GPIO_P59 APOLLO4_PINMUX(59, 3)
#define UART0CTS_P59 APOLLO4_PINMUX(59, 4)
#define UART1CTS_P59 APOLLO4_PINMUX(59, 5)
#define CT59_P59 APOLLO4_PINMUX(59, 6)
#define NCE59_P59 APOLLO4_PINMUX(59, 7)
#define OBSBUS11_P59 APOLLO4_PINMUX(59, 8)
#define FPIO_P59 APOLLO4_PINMUX(59, 11)
#define TRIG1_P60 APOLLO4_PINMUX(60, 1)
#define GPIO_P60 APOLLO4_PINMUX(60, 3)
#define UART0TX_P60 APOLLO4_PINMUX(60, 4)
#define UART3CTS_P60 APOLLO4_PINMUX(60, 5)
#define CT60_P60 APOLLO4_PINMUX(60, 6)
#define NCE60_P60 APOLLO4_PINMUX(60, 7)
#define OBSBUS12_P60 APOLLO4_PINMUX(60, 8)
#define FPIO_P60 APOLLO4_PINMUX(60, 11)
#define M6SCL_P61 APOLLO4_PINMUX(61, 0)
#define M6SCK_P61 APOLLO4_PINMUX(61, 1)
#define I2S1_CLK_P61 APOLLO4_PINMUX(61, 2)
#define GPIO_P61 APOLLO4_PINMUX(61, 3)
#define UART2TX_P61 APOLLO4_PINMUX(61, 4)
#define UART3TX_P61 APOLLO4_PINMUX(61, 5)
#define CT61_P61 APOLLO4_PINMUX(61, 6)
#define NCE61_P61 APOLLO4_PINMUX(61, 7)
#define OBSBUS13_P61 APOLLO4_PINMUX(61, 8)
#define I3CM0_SCL_P61 APOLLO4_PINMUX(61, 10)
#define FPIO_P61 APOLLO4_PINMUX(61, 11)
#define M6SDAWIR3_P62 APOLLO4_PINMUX(62, 0)
#define M6MOSI_P62 APOLLO4_PINMUX(62, 1)
#define I2S1_DATA_P62 APOLLO4_PINMUX(62, 2)
#define GPIO_P62 APOLLO4_PINMUX(62, 3)
#define UART0RX_P62 APOLLO4_PINMUX(62, 4)
#define UART1RX_P62 APOLLO4_PINMUX(62, 5)
#define CT62_P62 APOLLO4_PINMUX(62, 6)
#define NCE62_P62 APOLLO4_PINMUX(62, 7)
#define OBSBUS14_P62 APOLLO4_PINMUX(62, 8)
#define I2S1_SDOUT_P62 APOLLO4_PINMUX(62, 9)
#define I3CM0_SDA_P62 APOLLO4_PINMUX(62, 10)
#define FPIO_P62 APOLLO4_PINMUX(62, 11)
#define M6MISO_P63 APOLLO4_PINMUX(63, 0)
#define CLKOUT_P63 APOLLO4_PINMUX(63, 1)
#define I2S1_WS_P63 APOLLO4_PINMUX(63, 2)
#define GPIO_P63 APOLLO4_PINMUX(63, 3)
#define UART2RX_P63 APOLLO4_PINMUX(63, 4)
#define UART3RX_P63 APOLLO4_PINMUX(63, 5)
#define CT63_P63 APOLLO4_PINMUX(63, 6)
#define NCE63_P63 APOLLO4_PINMUX(63, 7)
#define OBSBUS15_P63 APOLLO4_PINMUX(63, 8)
#define DISP_TE_P63 APOLLO4_PINMUX(63, 9)
#define FPIO_P63 APOLLO4_PINMUX(63, 11)
#define MSPI0_0_P64 APOLLO4_PINMUX(64, 0)
#define XT32KHZ_P64 APOLLO4_PINMUX(64, 1)
#define SWO_P64 APOLLO4_PINMUX(64, 2)
#define GPIO_P64 APOLLO4_PINMUX(64, 3)
#define UART0RTS_P64 APOLLO4_PINMUX(64, 4)
#define DISP_D0_P64 APOLLO4_PINMUX(64, 5)
#define CT64_P64 APOLLO4_PINMUX(64, 6)
#define NCE64_P64 APOLLO4_PINMUX(64, 7)
#define OBSBUS0_P64 APOLLO4_PINMUX(64, 8)
#define I2S1_SDIN_P64 APOLLO4_PINMUX(64, 9)
#define FPIO_P64 APOLLO4_PINMUX(64, 11)
#define MSPI0_1_P65 APOLLO4_PINMUX(65, 0)
#define XT32KHZ_P65 APOLLO4_PINMUX(65, 1)
#define SWO_P65 APOLLO4_PINMUX(65, 2)
#define GPIO_P65 APOLLO4_PINMUX(65, 3)
#define UART0CTS_P65 APOLLO4_PINMUX(65, 4)
#define DISP_D1_P65 APOLLO4_PINMUX(65, 5)
#define CT65_P65 APOLLO4_PINMUX(65, 6)
#define NCE65_P65 APOLLO4_PINMUX(65, 7)
#define OBSBUS1_P65 APOLLO4_PINMUX(65, 8)
#define FPIO_P65 APOLLO4_PINMUX(65, 11)
#define MSPI0_2_P66 APOLLO4_PINMUX(66, 0)
#define CLKOUT_P66 APOLLO4_PINMUX(66, 1)
#define SWO_P66 APOLLO4_PINMUX(66, 2)
#define GPIO_P66 APOLLO4_PINMUX(66, 3)
#define UART0TX_P66 APOLLO4_PINMUX(66, 4)
#define DISP_D2_P66 APOLLO4_PINMUX(66, 5)
#define CT66_P66 APOLLO4_PINMUX(66, 6)
#define NCE66_P66 APOLLO4_PINMUX(66, 7)
#define OBSBUS2_P66 APOLLO4_PINMUX(66, 8)
#define FPIO_P66 APOLLO4_PINMUX(66, 11)
#define MSPI0_3_P67 APOLLO4_PINMUX(67, 0)
#define CLKOUT_P67 APOLLO4_PINMUX(67, 1)
#define SWO_P67 APOLLO4_PINMUX(67, 2)
#define GPIO_P67 APOLLO4_PINMUX(67, 3)
#define UART2TX_P67 APOLLO4_PINMUX(67, 4)
#define DISP_D3_P67 APOLLO4_PINMUX(67, 5)
#define CT67_P67 APOLLO4_PINMUX(67, 6)
#define NCE67_P67 APOLLO4_PINMUX(67, 7)
#define OBSBUS3_P67 APOLLO4_PINMUX(67, 8)
#define FPIO_P67 APOLLO4_PINMUX(67, 11)
#define MSPI0_4_P68 APOLLO4_PINMUX(68, 0)
#define SWO_P68 APOLLO4_PINMUX(68, 1)
#define GPIO_P68 APOLLO4_PINMUX(68, 3)
#define UART0RX_P68 APOLLO4_PINMUX(68, 4)
#define DISP_D4_P68 APOLLO4_PINMUX(68, 5)
#define CT68_P68 APOLLO4_PINMUX(68, 6)
#define NCE68_P68 APOLLO4_PINMUX(68, 7)
#define OBSBUS4_P68 APOLLO4_PINMUX(68, 8)
#define FPIO_P68 APOLLO4_PINMUX(68, 11)
#define MSPI0_5_P69 APOLLO4_PINMUX(69, 0)
#define XT32KHZ_P69 APOLLO4_PINMUX(69, 1)
#define SWO_P69 APOLLO4_PINMUX(69, 2)
#define GPIO_P69 APOLLO4_PINMUX(69, 3)
#define UART2RX_P69 APOLLO4_PINMUX(69, 4)
#define DISP_D5_P69 APOLLO4_PINMUX(69, 5)
#define CT69_P69 APOLLO4_PINMUX(69, 6)
#define NCE69_P69 APOLLO4_PINMUX(69, 7)
#define OBSBUS5_P69 APOLLO4_PINMUX(69, 8)
#define FPIO_P69 APOLLO4_PINMUX(69, 11)
#define MSPI0_6_P70 APOLLO4_PINMUX(70, 0)
#define XT32KHZ_P70 APOLLO4_PINMUX(70, 1)
#define SWTRACE0_P70 APOLLO4_PINMUX(70, 2)
#define GPIO_P70 APOLLO4_PINMUX(70, 3)
#define UART0RTS_P70 APOLLO4_PINMUX(70, 4)
#define DISP_D6_P70 APOLLO4_PINMUX(70, 5)
#define CT70_P70 APOLLO4_PINMUX(70, 6)
#define NCE70_P70 APOLLO4_PINMUX(70, 7)
#define OBSBUS6_P70 APOLLO4_PINMUX(70, 8)
#define FPIO_P70 APOLLO4_PINMUX(70, 11)
#define MSPI0_7_P71 APOLLO4_PINMUX(71, 0)
#define CLKOUT_P71 APOLLO4_PINMUX(71, 1)
#define SWTRACE1_P71 APOLLO4_PINMUX(71, 2)
#define GPIO_P71 APOLLO4_PINMUX(71, 3)
#define UART0CTS_P71 APOLLO4_PINMUX(71, 4)
#define DISP_D7_P71 APOLLO4_PINMUX(71, 5)
#define CT71_P71 APOLLO4_PINMUX(71, 6)
#define NCE71_P71 APOLLO4_PINMUX(71, 7)
#define OBSBUS7_P71 APOLLO4_PINMUX(71, 8)
#define FPIO_P71 APOLLO4_PINMUX(71, 11)
#define MSPI0_8_P72 APOLLO4_PINMUX(72, 0)
#define CLKOUT_P72 APOLLO4_PINMUX(72, 1)
#define SWTRACE2_P72 APOLLO4_PINMUX(72, 2)
#define GPIO_P72 APOLLO4_PINMUX(72, 3)
#define UART0TX_P72 APOLLO4_PINMUX(72, 4)
#define DISP_D8_P72 APOLLO4_PINMUX(72, 5)
#define CT72_P72 APOLLO4_PINMUX(72, 6)
#define NCE72_P72 APOLLO4_PINMUX(72, 7)
#define OBSBUS8_P72 APOLLO4_PINMUX(72, 8)
#define VCMPO_P72 APOLLO4_PINMUX(72, 9)
#define FPIO_P72 APOLLO4_PINMUX(72, 11)
#define MSPI0_9_P73 APOLLO4_PINMUX(73, 0)
#define SWTRACE3_P73 APOLLO4_PINMUX(73, 2)
#define GPIO_P73 APOLLO4_PINMUX(73, 3)
#define UART2TX_P73 APOLLO4_PINMUX(73, 4)
#define DISP_D9_P73 APOLLO4_PINMUX(73, 5)
#define CT73_P73 APOLLO4_PINMUX(73, 6)
#define NCE73_P73 APOLLO4_PINMUX(73, 7)
#define OBSBUS9_P73 APOLLO4_PINMUX(73, 8)
#define FPIO_P73 APOLLO4_PINMUX(73, 11)
#define MSPI2_0_P74 APOLLO4_PINMUX(74, 0)
#define DISP_QSPI_D0_OUT_P74 APOLLO4_PINMUX(74, 1)
#define DISP_QSPI_D0_P74 APOLLO4_PINMUX(74, 2)
#define GPIO_P74 APOLLO4_PINMUX(74, 3)
#define UART0RX_P74 APOLLO4_PINMUX(74, 4)
#define DISP_D10_P74 APOLLO4_PINMUX(74, 5)
#define CT74_P74 APOLLO4_PINMUX(74, 6)
#define NCE74_P74 APOLLO4_PINMUX(74, 7)
#define OBSBUS10_P74 APOLLO4_PINMUX(74, 8)
#define DISP_SPI_SD_P74 APOLLO4_PINMUX(74, 9)
#define DISP_SPI_SDO_P74 APOLLO4_PINMUX(74, 10)
#define FPIO_P74 APOLLO4_PINMUX(74, 11)
#define MSPI2_1_P75 APOLLO4_PINMUX(75, 0)
#define XT32KHZ_P75 APOLLO4_PINMUX(75, 1)
#define DISP_QSPI_D1_P75 APOLLO4_PINMUX(75, 2)
#define GPIO_P75 APOLLO4_PINMUX(75, 3)
#define UART2RX_P75 APOLLO4_PINMUX(75, 4)
#define DISP_D11_P75 APOLLO4_PINMUX(75, 5)
#define CT75_P75 APOLLO4_PINMUX(75, 6)
#define NCE75_P75 APOLLO4_PINMUX(75, 7)
#define OBSBUS11_P75 APOLLO4_PINMUX(75, 8)
#define DISP_SPI_DCX_P75 APOLLO4_PINMUX(75, 9)
#define FPIO_P75 APOLLO4_PINMUX(75, 11)
#define MSPI2_2_P76 APOLLO4_PINMUX(76, 0)
#define XT32KHZ_P76 APOLLO4_PINMUX(76, 1)
#define DISP_QSPI_D2_P76 APOLLO4_PINMUX(76, 2)
#define GPIO_P76 APOLLO4_PINMUX(76, 3)
#define UART0RTS_P76 APOLLO4_PINMUX(76, 4)
#define DISP_D12_P76 APOLLO4_PINMUX(76, 5)
#define CT76_P76 APOLLO4_PINMUX(76, 6)
#define NCE76_P76 APOLLO4_PINMUX(76, 7)
#define OBSBUS12_P76 APOLLO4_PINMUX(76, 8)
#define FPIO_P76 APOLLO4_PINMUX(76, 11)
#define MSPI2_3_P77 APOLLO4_PINMUX(77, 0)
#define DISP_QSPI_D3_P77 APOLLO4_PINMUX(77, 2)
#define GPIO_P77 APOLLO4_PINMUX(77, 3)
#define UART0CTS_P77 APOLLO4_PINMUX(77, 4)
#define DISP_D13_P77 APOLLO4_PINMUX(77, 5)
#define CT77_P77 APOLLO4_PINMUX(77, 6)
#define NCE77_P77 APOLLO4_PINMUX(77, 7)
#define OBSBUS13_P77 APOLLO4_PINMUX(77, 8)
#define FPIO_P77 APOLLO4_PINMUX(77, 11)
#define MSPI2_4_P78 APOLLO4_PINMUX(78, 0)
#define DISP_QSPI_SCK_P78 APOLLO4_PINMUX(78, 2)
#define GPIO_P78 APOLLO4_PINMUX(78, 3)
#define UART0TX_P78 APOLLO4_PINMUX(78, 4)
#define DISP_D14_P78 APOLLO4_PINMUX(78, 5)
#define CT78_P78 APOLLO4_PINMUX(78, 6)
#define NCE78_P78 APOLLO4_PINMUX(78, 7)
#define OBSBUS14_P78 APOLLO4_PINMUX(78, 8)
#define DISP_SPI_SCK_P78 APOLLO4_PINMUX(78, 9)
#define FPIO_P78 APOLLO4_PINMUX(78, 11)
#define MSPI2_5_P79 APOLLO4_PINMUX(79, 0)
#define SDIF_DAT4_P79 APOLLO4_PINMUX(79, 2)
#define GPIO_P79 APOLLO4_PINMUX(79, 3)
#define SWO_P79 APOLLO4_PINMUX(79, 4)
#define DISP_VS_P79 APOLLO4_PINMUX(79, 5)
#define CT79_P79 APOLLO4_PINMUX(79, 6)
#define NCE79_P79 APOLLO4_PINMUX(79, 7)
#define OBSBUS15_P79 APOLLO4_PINMUX(79, 8)
#define DISP_SPI_SDI_P79 APOLLO4_PINMUX(79, 9)
#define FPIO_P79 APOLLO4_PINMUX(79, 11)
#define MSPI2_6_P80 APOLLO4_PINMUX(80, 0)
#define CLKOUT_P80 APOLLO4_PINMUX(80, 1)
#define SDIF_DAT5_P80 APOLLO4_PINMUX(80, 2)
#define GPIO_P80 APOLLO4_PINMUX(80, 3)
#define SWTRACE0_P80 APOLLO4_PINMUX(80, 4)
#define DISP_HS_P80 APOLLO4_PINMUX(80, 5)
#define CT80_P80 APOLLO4_PINMUX(80, 6)
#define NCE80_P80 APOLLO4_PINMUX(80, 7)
#define OBSBUS0_P80 APOLLO4_PINMUX(80, 8)
#define FPIO_P80 APOLLO4_PINMUX(80, 11)
#define MSPI2_7_P81 APOLLO4_PINMUX(81, 0)
#define CLKOUT_P81 APOLLO4_PINMUX(81, 1)
#define SDIF_DAT6_P81 APOLLO4_PINMUX(81, 2)
#define GPIO_P81 APOLLO4_PINMUX(81, 3)
#define SWTRACE1_P81 APOLLO4_PINMUX(81, 4)
#define DISP_DE_P81 APOLLO4_PINMUX(81, 5)
#define CT81_P81 APOLLO4_PINMUX(81, 6)
#define NCE81_P81 APOLLO4_PINMUX(81, 7)
#define OBSBUS1_P81 APOLLO4_PINMUX(81, 8)
#define FPIO_P81 APOLLO4_PINMUX(81, 11)
#define MSPI2_8_P82 APOLLO4_PINMUX(82, 0)
#define XT32KHZ_P82 APOLLO4_PINMUX(82, 1)
#define SDIF_DAT7_P82 APOLLO4_PINMUX(82, 2)
#define GPIO_P82 APOLLO4_PINMUX(82, 3)
#define SWTRACE2_P82 APOLLO4_PINMUX(82, 4)
#define DISP_PCLK_P82 APOLLO4_PINMUX(82, 5)
#define CT82_P82 APOLLO4_PINMUX(82, 6)
#define NCE82_P82 APOLLO4_PINMUX(82, 7)
#define OBSBUS2_P82 APOLLO4_PINMUX(82, 8)
#define FPIO_P82 APOLLO4_PINMUX(82, 11)
#define MSPI2_9_P83 APOLLO4_PINMUX(83, 0)
#define XT32KHZ_P83 APOLLO4_PINMUX(83, 1)
#define SDIF_CMD_P83 APOLLO4_PINMUX(83, 2)
#define GPIO_P83 APOLLO4_PINMUX(83, 3)
#define SWTRACE3_P83 APOLLO4_PINMUX(83, 4)
#define DISP_SD_P83 APOLLO4_PINMUX(83, 5)
#define CT83_P83 APOLLO4_PINMUX(83, 6)
#define NCE83_P83 APOLLO4_PINMUX(83, 7)
#define OBSBUS3_P83 APOLLO4_PINMUX(83, 8)
#define FPIO_P83 APOLLO4_PINMUX(83, 11)
#define SDIF_DAT0_P84 APOLLO4_PINMUX(84, 2)
#define GPIO_P84 APOLLO4_PINMUX(84, 3)
#define CT84_P84 APOLLO4_PINMUX(84, 6)
#define NCE84_P84 APOLLO4_PINMUX(84, 7)
#define OBSBUS4_P84 APOLLO4_PINMUX(84, 8)
#define FPIO_P84 APOLLO4_PINMUX(84, 11)
#define SDIF_DAT1_P85 APOLLO4_PINMUX(85, 2)
#define GPIO_P85 APOLLO4_PINMUX(85, 3)
#define CT85_P85 APOLLO4_PINMUX(85, 6)
#define NCE85_P85 APOLLO4_PINMUX(85, 7)
#define OBSBUS5_P85 APOLLO4_PINMUX(85, 8)
#define FPIO_P85 APOLLO4_PINMUX(85, 11)
#define SDIF_DAT2_P86 APOLLO4_PINMUX(86, 2)
#define GPIO_P86 APOLLO4_PINMUX(86, 3)
#define CT86_P86 APOLLO4_PINMUX(86, 6)
#define NCE86_P86 APOLLO4_PINMUX(86, 7)
#define OBSBUS6_P86 APOLLO4_PINMUX(86, 8)
#define FPIO_P86 APOLLO4_PINMUX(86, 11)
#define SDIF_DAT3_P87 APOLLO4_PINMUX(87, 2)
#define GPIO_P87 APOLLO4_PINMUX(87, 3)
#define CT87_P87 APOLLO4_PINMUX(87, 6)
#define NCE87_P87 APOLLO4_PINMUX(87, 7)
#define OBSBUS7_P87 APOLLO4_PINMUX(87, 8)
#define DISP_TE_P87 APOLLO4_PINMUX(87, 9)
#define FPIO_P87 APOLLO4_PINMUX(87, 11)
#define SDIF_CLKOUT_P88 APOLLO4_PINMUX(88, 2)
#define GPIO_P88 APOLLO4_PINMUX(88, 3)
#define CT88_P88 APOLLO4_PINMUX(88, 6)
#define NCE88_P88 APOLLO4_PINMUX(88, 7)
#define OBSBUS8_P88 APOLLO4_PINMUX(88, 8)
#define FPIO_P88 APOLLO4_PINMUX(88, 11)
#define GPIO_P89 APOLLO4_PINMUX(89, 3)
#define DISP_CM_P89 APOLLO4_PINMUX(89, 5)
#define CT89_P89 APOLLO4_PINMUX(89, 6)
#define NCE89_P89 APOLLO4_PINMUX(89, 7)
#define OBSBUS9_P89 APOLLO4_PINMUX(89, 8)
#define FPIO_P89 APOLLO4_PINMUX(89, 11)
#define GPIO_P90 APOLLO4_PINMUX(90, 3)
#define CT90_P90 APOLLO4_PINMUX(90, 6)
#define NCE90_P90 APOLLO4_PINMUX(90, 7)
#define OBSBUS10_P90 APOLLO4_PINMUX(90, 8)
#define VCMPO_P90 APOLLO4_PINMUX(90, 9)
#define FPIO_P90 APOLLO4_PINMUX(90, 11)
#define GPIO_P91 APOLLO4_PINMUX(91, 3)
#define CT91_P91 APOLLO4_PINMUX(91, 6)
#define NCE91_P91 APOLLO4_PINMUX(91, 7)
#define OBSBUS11_P91 APOLLO4_PINMUX(91, 8)
#define VCMPO_P91 APOLLO4_PINMUX(91, 9)
#define FPIO_P91 APOLLO4_PINMUX(91, 11)
#define GPIO_P92 APOLLO4_PINMUX(92, 3)
#define CT92_P92 APOLLO4_PINMUX(92, 6)
#define NCE92_P92 APOLLO4_PINMUX(92, 7)
#define OBSBUS12_P92 APOLLO4_PINMUX(92, 8)
#define VCMPO_P92 APOLLO4_PINMUX(92, 9)
#define FPIO_P92 APOLLO4_PINMUX(92, 11)
#define MSPI2_9_P93 APOLLO4_PINMUX(93, 0)
#define GPIO_P93 APOLLO4_PINMUX(93, 3)
#define CT93_P93 APOLLO4_PINMUX(93, 6)
#define NCE93_P93 APOLLO4_PINMUX(93, 7)
#define OBSBUS13_P93 APOLLO4_PINMUX(93, 8)
#define VCMPO_P93 APOLLO4_PINMUX(93, 9)
#define FPIO_P93 APOLLO4_PINMUX(93, 11)
#define GPIO_P94 APOLLO4_PINMUX(94, 3)
#define CT94_P94 APOLLO4_PINMUX(94, 6)
#define NCE94_P94 APOLLO4_PINMUX(94, 7)
#define OBSBUS14_P94 APOLLO4_PINMUX(94, 8)
#define VCMPO_P94 APOLLO4_PINMUX(94, 9)
#define FPIO_P94 APOLLO4_PINMUX(94, 11)
#define GPIO_P95 APOLLO4_PINMUX(95, 3)
#define CT95_P95 APOLLO4_PINMUX(95, 6)
#define NCE95_P95 APOLLO4_PINMUX(95, 7)
#define OBSBUS15_P95 APOLLO4_PINMUX(95, 8)
#define FPIO_P95 APOLLO4_PINMUX(95, 11)
#define GPIO_P96 APOLLO4_PINMUX(96, 3)
#define CT96_P96 APOLLO4_PINMUX(96, 6)
#define NCE96_P96 APOLLO4_PINMUX(96, 7)
#define OBSBUS0_P96 APOLLO4_PINMUX(96, 8)
#define FPIO_P96 APOLLO4_PINMUX(96, 11)
#define GPIO_P97 APOLLO4_PINMUX(97, 3)
#define CT97_P97 APOLLO4_PINMUX(97, 6)
#define NCE97_P97 APOLLO4_PINMUX(97, 7)
#define OBSBUS1_P97 APOLLO4_PINMUX(97, 8)
#define FPIO_P97 APOLLO4_PINMUX(97, 11)
#define GPIO_P98 APOLLO4_PINMUX(98, 3)
#define CT98_P98 APOLLO4_PINMUX(98, 6)
#define NCE98_P98 APOLLO4_PINMUX(98, 7)
#define OBSBUS2_P98 APOLLO4_PINMUX(98, 8)
#define FPIO_P98 APOLLO4_PINMUX(98, 11)
#define GPIO_P99 APOLLO4_PINMUX(99, 3)
#define CT99_P99 APOLLO4_PINMUX(99, 6)
#define NCE99_P99 APOLLO4_PINMUX(99, 7)
#define OBSBUS3_P99 APOLLO4_PINMUX(99, 8)
#define FPIO_P99 APOLLO4_PINMUX(99, 11)
#define GPIO_P100 APOLLO4_PINMUX(100, 3)
#define CT100_P100 APOLLO4_PINMUX(100, 6)
#define NCE100_P100 APOLLO4_PINMUX(100, 7)
#define OBSBUS4_P100 APOLLO4_PINMUX(100, 8)
#define FPIO_P100 APOLLO4_PINMUX(100, 11)
#define GPIO_P101 APOLLO4_PINMUX(101, 3)
#define CT101_P101 APOLLO4_PINMUX(101, 6)
#define NCE101_P101 APOLLO4_PINMUX(101, 7)
#define OBSBUS5_P101 APOLLO4_PINMUX(101, 8)
#define FPIO_P101 APOLLO4_PINMUX(101, 11)
#define GPIO_P102 APOLLO4_PINMUX(102, 3)
#define CT102_P102 APOLLO4_PINMUX(102, 6)
#define NCE102_P102 APOLLO4_PINMUX(102, 7)
#define OBSBUS6_P102 APOLLO4_PINMUX(102, 8)
#define FPIO_P102 APOLLO4_PINMUX(102, 11)
#define GPIO_P103 APOLLO4_PINMUX(103, 3)
#define CT103_P103 APOLLO4_PINMUX(103, 6)
#define NCE103_P103 APOLLO4_PINMUX(103, 7)
#define OBSBUS7_P103 APOLLO4_PINMUX(103, 8)
#define FPIO_P103 APOLLO4_PINMUX(103, 11)
#define MSPI1_9_P104 APOLLO4_PINMUX(104, 0)
#define GPIO_P104 APOLLO4_PINMUX(104, 3)
#define CT104_P104 APOLLO4_PINMUX(104, 6)
#define NCE104_P104 APOLLO4_PINMUX(104, 7)
#define OBSBUS8_P104 APOLLO4_PINMUX(104, 8)
#define FPIO_P104 APOLLO4_PINMUX(104, 11)
#define GPIO_P105 APOLLO4_PINMUX(105, 3)
#define CT105_P105 APOLLO4_PINMUX(105, 6)
#define OBSBUS9_P105 APOLLO4_PINMUX(105, 8)
#define GPIO_P106 APOLLO4_PINMUX(106, 3)
#define CT106_P106 APOLLO4_PINMUX(106, 6)
#define OBSBUS10_P106 APOLLO4_PINMUX(106, 8)
#define GPIO_P107 APOLLO4_PINMUX(107, 3)
#define CT107_P107 APOLLO4_PINMUX(107, 6)
#define OBSBUS11_P107 APOLLO4_PINMUX(107, 8)
#define GPIO_P108 APOLLO4_PINMUX(108, 3)
#define CT108_P108 APOLLO4_PINMUX(108, 6)
#define OBSBUS12_P108 APOLLO4_PINMUX(108, 8)
#define GPIO_P109 APOLLO4_PINMUX(109, 3)
#define CT109_P109 APOLLO4_PINMUX(109, 6)
#define OBSBUS13_P109 APOLLO4_PINMUX(109, 8)
#define GPIO_P110 APOLLO4_PINMUX(110, 3)
#define CT110_P110 APOLLO4_PINMUX(110, 6)
#define OBSBUS14_P110 APOLLO4_PINMUX(110, 8)
#define GPIO_P111 APOLLO4_PINMUX(111, 3)
#define CT111_P111 APOLLO4_PINMUX(111, 6)
#define OBSBUS15_P111 APOLLO4_PINMUX(111, 8)
#define GPIO_P112 APOLLO4_PINMUX(112, 3)
#define CT112_P112 APOLLO4_PINMUX(112, 6)
#define OBSBUS0_P112 APOLLO4_PINMUX(112, 8)
#define GPIO_P113 APOLLO4_PINMUX(113, 3)
#define CT113_P113 APOLLO4_PINMUX(113, 6)
#define OBSBUS1_P113 APOLLO4_PINMUX(113, 8)
#define GPIO_P114 APOLLO4_PINMUX(114, 3)
#define CT114_P114 APOLLO4_PINMUX(114, 6)
#define OBSBUS2_P114 APOLLO4_PINMUX(114, 8)
#define GPIO_P115 APOLLO4_PINMUX(115, 3)
#define CT115_P115 APOLLO4_PINMUX(115, 6)
#define OBSBUS3_P115 APOLLO4_PINMUX(115, 8)
#define GPIO_P116 APOLLO4_PINMUX(116, 3)
#define CT116_P116 APOLLO4_PINMUX(116, 6)
#define OBSBUS4_P116 APOLLO4_PINMUX(116, 8)
#define GPIO_P117 APOLLO4_PINMUX(117, 3)
#define CT117_P117 APOLLO4_PINMUX(117, 6)
#define OBSBUS5_P117 APOLLO4_PINMUX(117, 8)
#define GPIO_P118 APOLLO4_PINMUX(118, 3)
#define CT118_P118 APOLLO4_PINMUX(118, 6)
#define OBSBUS6_P118 APOLLO4_PINMUX(118, 8)
#define GPIO_P119 APOLLO4_PINMUX(119, 3)
#define CT119_P119 APOLLO4_PINMUX(119, 6)
#define OBSBUS7_P119 APOLLO4_PINMUX(119, 8)
#define GPIO_P120 APOLLO4_PINMUX(120, 3)
#define CT120_P120 APOLLO4_PINMUX(120, 6)
#define OBSBUS8_P120 APOLLO4_PINMUX(120, 8)
#define GPIO_P121 APOLLO4_PINMUX(121, 3)
#define CT121_P121 APOLLO4_PINMUX(121, 6)
#define OBSBUS9_P121 APOLLO4_PINMUX(121, 8)
#define GPIO_P122 APOLLO4_PINMUX(122, 3)
#define CT122_P122 APOLLO4_PINMUX(122, 6)
#define OBSBUS10_P122 APOLLO4_PINMUX(122, 8)
#define GPIO_P123 APOLLO4_PINMUX(123, 3)
#define CT123_P123 APOLLO4_PINMUX(123, 6)
#define OBSBUS11_P123 APOLLO4_PINMUX(123, 8)
#define GPIO_P124 APOLLO4_PINMUX(124, 3)
#define CT124_P124 APOLLO4_PINMUX(124, 6)
#define OBSBUS12_P124 APOLLO4_PINMUX(124, 8)
#define GPIO_P125 APOLLO4_PINMUX(125, 3)
#define CT125_P125 APOLLO4_PINMUX(125, 6)
#define OBSBUS13_P125 APOLLO4_PINMUX(125, 8)
#define GPIO_P126 APOLLO4_PINMUX(126, 3)
#define CT126_P126 APOLLO4_PINMUX(126, 6)
#define OBSBUS14_P126 APOLLO4_PINMUX(126, 8)
#define GPIO_P127 APOLLO4_PINMUX(127, 3)
#define CT127_P127 APOLLO4_PINMUX(127, 6)
#define OBSBUS15_P127 APOLLO4_PINMUX(127, 8)
#endif /* __APOLLO4_PINCTRL_H__ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/ambiq-apollo4-pinctrl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 19,722 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_ZYNQMP_PINCTRL_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_ZYNQMP_PINCTRL_H_
/*
* The offset is defined at `pictrl_soc.h` for the ZynqMP platform
*/
#define FUNCTION_OFFSET 8
#define UART_FUNCTION 0x1
/*
* For functions that can be selected for a subset of MIO pins,
* specific macro identifiers were generated to avoid complex checking
* logic at compile time. For more generalized applications existing on
* every pin (eg. GPIO), a generic macro function to generate a driver-compliant
* selector value can be used.
*/
#define UART0_RX_2 (2U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART0_RX_6 (6U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART0_RX_10 (10U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART0_RX_14 (14U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART0_RX_18 (18U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART0_RX_22 (22U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART0_RX_26 (26U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART0_RX_30 (30U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART0_RX_34 (34U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART0_RX_38 (38U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART0_RX_42 (42U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART0_RX_46 (46U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART0_RX_50 (50U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART0_RX_54 (54U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART0_RX_58 (58U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART0_RX_62 (62U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART0_RX_66 (66U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART0_RX_70 (70U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART0_RX_74 (74U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART0_TX_3 (3U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART0_TX_7 (7U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART0_TX_11 (11U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART0_TX_15 (15U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART0_TX_19 (19U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART0_TX_23 (23U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART0_TX_27 (27U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART0_TX_31 (31U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART0_TX_35 (35U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART0_TX_39 (39U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART0_TX_43 (43U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART0_TX_47 (47U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART0_TX_51 (51U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART0_TX_55 (55U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART0_TX_59 (59U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART0_TX_63 (63U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART0_TX_67 (67U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART0_TX_71 (71U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART0_TX_75 (75U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART1_RX_1 (1U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART1_RX_5 (5U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART1_RX_9 (9U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART1_RX_13 (13U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART1_RX_17 (17U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART1_RX_21 (21U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART1_RX_25 (25U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART1_RX_29 (29U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART1_RX_33 (33U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART1_RX_37 (37U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART1_RX_41 (41U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART1_RX_45 (45U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART1_RX_49 (49U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART1_RX_53 (53U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART1_RX_57 (57U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART1_RX_61 (61U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART1_RX_65 (65U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART1_RX_69 (69U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART1_RX_73 (73U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART1_TX_0 (0U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART1_TX_4 (4U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART1_TX_8 (8U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART1_TX_12 (12U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART1_TX_16 (16U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART1_TX_20 (20U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART1_TX_24 (24U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART1_TX_28 (28U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART1_TX_32 (32U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART1_TX_36 (36U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART1_TX_40 (40U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART1_TX_44 (44U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART1_TX_48 (28U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART1_TX_52 (52U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART1_TX_56 (56U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART1_TX_60 (60U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART1_TX_64 (64U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART1_TX_68 (28U | (UART_FUNCTION << FUNCTION_OFFSET))
#define UART1_TX_72 (72U | (UART_FUNCTION << FUNCTION_OFFSET))
#endif
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/pinctrl-zynqmp.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,449 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_SMARTBOND_PINCTRL_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_SMARTBOND_PINCTRL_H_
/** Definitions of pin functions */
#define SMARTBOND_FUNC_GPIO 0
#define SMARTBOND_FUNC_UART_RX 1
#define SMARTBOND_FUNC_UART_TX 2
#define SMARTBOND_FUNC_UART2_RX 3
#define SMARTBOND_FUNC_UART2_TX 4
#define SMARTBOND_FUNC_UART2_CTSN 5
#define SMARTBOND_FUNC_UART2_RTSN 6
#define SMARTBOND_FUNC_UART3_RX 7
#define SMARTBOND_FUNC_UART3_TX 8
#define SMARTBOND_FUNC_UART3_CTSN 9
#define SMARTBOND_FUNC_UART3_RTSN 10
#define SMARTBOND_FUNC_ISO_CLK 11
#define SMARTBOND_FUNC_ISO_DATA 12
#define SMARTBOND_FUNC_SPI_DI 13
#define SMARTBOND_FUNC_SPI_DO 14
#define SMARTBOND_FUNC_SPI_CLK 15
#define SMARTBOND_FUNC_SPI_EN 16
#define SMARTBOND_FUNC_SPI2_DI 17
#define SMARTBOND_FUNC_SPI2_DO 18
#define SMARTBOND_FUNC_SPI2_CLK 19
#define SMARTBOND_FUNC_SPI2_EN 20
#define SMARTBOND_FUNC_I2C_SCL 21
#define SMARTBOND_FUNC_I2C_SDA 22
#define SMARTBOND_FUNC_I2C2_SCL 23
#define SMARTBOND_FUNC_I2C2_SDA 24
#define SMARTBOND_FUNC_USB_SOF 25
#define SMARTBOND_FUNC_ADC 26
#define SMARTBOND_FUNC_USB 27
#define SMARTBOND_FUNC_PCM_DI 28
#define SMARTBOND_FUNC_PCM_DO 29
#define SMARTBOND_FUNC_PCM_FSC 30
#define SMARTBOND_FUNC_PCM_CLK 31
#define SMARTBOND_FUNC_PDM_DATA 32
#define SMARTBOND_FUNC_PDM_CLK 33
#define SMARTBOND_FUNC_COEX_EXT_ACT 34
#define SMARTBOND_FUNC_COEX_SMART_ACT 35
#define SMARTBOND_FUNC_COEX_SMART_PRI 36
#define SMARTBOND_FUNC_PORT0_DCF 37
#define SMARTBOND_FUNC_PORT1_DCF 38
#define SMARTBOND_FUNC_PORT2_DCF 39
#define SMARTBOND_FUNC_PORT3_DCF 40
#define SMARTBOND_FUNC_PORT4_DCF 41
#define SMARTBOND_FUNC_CLOCK 42
#define SMARTBOND_FUNC_PG 43
#define SMARTBOND_FUNC_LCD 44
#define SMARTBOND_FUNC_LCD_SPI_DC 45
#define SMARTBOND_FUNC_LCD_SPI_DO 46
#define SMARTBOND_FUNC_LCD_SPI_CLK 47
#define SMARTBOND_FUNC_LCD_SPI_EN 48
#define SMARTBOND_FUNC_TIM_PWM 49
#define SMARTBOND_FUNC_TIM2_PWM 50
#define SMARTBOND_FUNC_TIM_1SHOT 51
#define SMARTBOND_FUNC_TIM2_1SHOT 52
#define SMARTBOND_FUNC_TIM3_PWM 53
#define SMARTBOND_FUNC_TIM4_PWM 54
/** Definitions of bit positions and bit masks in pinmux */
#define SMARTBOND_PINMUX_PIN_POS 0
#define SMARTBOND_PINMUX_PIN_MASK 0x1f
#define SMARTBOND_PINMUX_PORT_POS 5
#define SMARTBOND_PINMUX_PORT_MASK 0x01
#define SMARTBOND_PINMUX_FUNC_POS 6
#define SMARTBOND_PINMUX_FUNC_MASK 0xff
/** Utility macro to create pinmux */
#define SMARTBOND_PINMUX(func, port, pin) \
(((SMARTBOND_FUNC_ ## func) << SMARTBOND_PINMUX_FUNC_POS) | \
((port) << SMARTBOND_PINMUX_PORT_POS) | \
(pin) << SMARTBOND_PINMUX_PIN_POS)
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_SMARTBOND_PINCTRL_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/smartbond-pinctrl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 875 |
```objective-c
* an affiliate of Cypress Semiconductor Corporation
*
*/
/**
* @brief Pin control binding helper.
*/
/**
* Bit definition in PINMUX field
*/
#define SOC_PINMUX_PORT_POS (0)
#define SOC_PINMUX_PORT_MASK (0xFFul << SOC_PINMUX_PORT_POS)
#define SOC_PINMUX_PIN_POS (8)
#define SOC_PINMUX_PIN_MASK (0xFFul << SOC_PINMUX_PIN_POS)
#define SOC_PINMUX_HSIOM_FUNC_POS (16)
#define SOC_PINMUX_HSIOM_MASK (0xFFul << SOC_PINMUX_HSIOM_FUNC_POS)
#define SOC_PINMUX_SIGNAL_POS (24)
#define SOC_PINMUX_SIGNAL_MASK (0xFFul << SOC_PINMUX_SIGNAL_POS)
/**
* Functions are defined using HSIOM SEL
*/
#define HSIOM_SEL_GPIO (0)
#define HSIOM_SEL_GPIO_DSI (1)
#define HSIOM_SEL_DSI_DSI (2)
#define HSIOM_SEL_DSI_GPIO (3)
#define HSIOM_SEL_AMUXA (4)
#define HSIOM_SEL_AMUXB (5)
#define HSIOM_SEL_AMUXA_DSI (6)
#define HSIOM_SEL_AMUXB_DSI (7)
#define HSIOM_SEL_ACT_0 (8)
#define HSIOM_SEL_ACT_1 (9)
#define HSIOM_SEL_ACT_2 (10)
#define HSIOM_SEL_ACT_3 (11)
#define HSIOM_SEL_DS_0 (12)
#define HSIOM_SEL_DS_1 (13)
#define HSIOM_SEL_DS_2 (14)
#define HSIOM_SEL_DS_3 (15)
#define HSIOM_SEL_ACT_4 (16)
#define HSIOM_SEL_ACT_5 (17)
#define HSIOM_SEL_ACT_6 (18)
#define HSIOM_SEL_ACT_7 (19)
#define HSIOM_SEL_ACT_8 (20)
#define HSIOM_SEL_ACT_9 (21)
#define HSIOM_SEL_ACT_10 (22)
#define HSIOM_SEL_ACT_11 (23)
#define HSIOM_SEL_ACT_12 (24)
#define HSIOM_SEL_ACT_13 (25)
#define HSIOM_SEL_ACT_14 (26)
#define HSIOM_SEL_ACT_15 (27)
#define HSIOM_SEL_DS_4 (28)
#define HSIOM_SEL_DS_5 (29)
#define HSIOM_SEL_DS_6 (30)
#define HSIOM_SEL_DS_7 (31)
/**
* Macro to set drive mode
*/
#define DT_CAT1_DRIVE_MODE_INFO(peripheral_signal) \
CAT1_PIN_MAP_DRIVE_MODE_##peripheral_signal
/**
* Macro to set pin control information (from pinctrl node)
*/
#define DT_CAT1_PINMUX(port, pin, hsiom) \
((port << SOC_PINMUX_PORT_POS) | \
(pin << SOC_PINMUX_PIN_POS) | \
(hsiom << SOC_PINMUX_HSIOM_FUNC_POS))
/* Redefine DT GPIO label (Px) to CYHAL port macros (CYHAL_PORT_x) */
#define P0 CYHAL_PORT_0
#define P1 CYHAL_PORT_1
#define P2 CYHAL_PORT_2
#define P3 CYHAL_PORT_3
#define P4 CYHAL_PORT_4
#define P5 CYHAL_PORT_5
#define P6 CYHAL_PORT_6
#define P7 CYHAL_PORT_7
#define P8 CYHAL_PORT_8
#define P9 CYHAL_PORT_9
#define P10 CYHAL_PORT_10
#define P11 CYHAL_PORT_11
#define P12 CYHAL_PORT_12
#define P13 CYHAL_PORT_13
#define P14 CYHAL_PORT_14
#define P15 CYHAL_PORT_15
#define P16 CYHAL_PORT_16
#define P17 CYHAL_PORT_17
#define P18 CYHAL_PORT_18
#define P19 CYHAL_PORT_19
#define P20 CYHAL_PORT_20
/* Returns CYHAL GPIO from Board device tree GPIO configuration
* CYHAL_GET_GPIO(port_number, pin_number),
* port_number = ((REG ADDR of node) - (REG ADDR of gpio_prt0)) / (REG SIZE of gpio_prt0)
* pin_number = DT_PHA_BY_IDX(node, gpios_prop, 0, pin)
*/
#define DT_GET_CYHAL_GPIO_FROM_DT_GPIOS(node, gpios_prop) \
CYHAL_GET_GPIO( \
(DT_REG_ADDR_BY_IDX(DT_GPIO_CTLR_BY_IDX(node, gpios_prop, 0), 0) - \
DT_REG_ADDR_BY_IDX(DT_NODELABEL(gpio_prt0), 0)) / \
DT_REG_ADDR_BY_IDX(DT_NODELABEL(gpio_prt0), 1), \
DT_PHA_BY_IDX(node, gpios_prop, 0, pin) \
)
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/ifx_cat1-pinctrl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,072 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_IMX8QM_PINCTRL_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_IMX8QM_PINCTRL_H_
/* values for pad field */
#define SC_P_UART0_RTS_B 23
#define SC_P_UART0_CTS_B 24
#define SC_P_SAI1_RXD 128
#define SC_P_SAI1_TXC 130
#define SC_P_SAI1_TXD 131
#define SC_P_SAI1_TXFS 132
/* mux values */
#define IMX8QM_DMA_LPUART2_RX_UART0_RTS_B 2 /* UART0_RTS_B ---> DMA_LPUART2_RX */
#define IMX8QM_DMA_LPUART2_TX_UART0_CTS_B 2 /* DMA_LPUART2_TX ---> UART0_CTS_B */
#define IMX8QM_AUD_SAI1_RXD_SAI1_RXD 0 /* AUD_SAI1_RXD <--- SAI1_RXD */
#define IMX8QM_AUD_SAI1_TXC_SAI1_TXC 0 /* AUD_SAI1_TXC <---> SAI1_TXC */
#define IMX8QM_AUD_SAI1_TXD_SAI1_TXD 0 /* AUD_SAI1_TXD ---> SAI1_TXD */
#define IMX8QM_AUD_SAI1_TXFS_SAI1_TXFS 0 /* AUD_SAI1_TXFS <---> SAI1_TXFS */
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_IMX8QM_PINCTRL_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/imx8qm-pinctrl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 334 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_ENE_KB1200_PINCTRL_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_ENE_KB1200_PINCTRL_H_
#include <zephyr/dt-bindings/dt-util.h>
#define PINMUX_FUNC_GPIO 0x00
#define PINMUX_FUNC_A 0x00
#define PINMUX_FUNC_B 0x01
#define PINMUX_FUNC_C 0x02
#define PINMUX_FUNC_D 0x03
#define PINMUX_FUNC_MAX 0x04
#define ENE_KB1200_NO_PUD_POS 12
#define ENE_KB1200_PD_POS 13
#define ENE_KB1200_PU_POS 14
#define ENE_KB1200_PUSH_PULL_POS 15
#define ENE_KB1200_OPEN_DRAIN_POS 16
#define ENE_KB1200_OUT_DIS_POS 17
#define ENE_KB1200_OUT_EN_POS 18
#define ENE_KB1200_OUT_HI_POS 19
#define ENE_KB1200_OUT_LO_POS 20
#define ENE_KB1200_PIN_LOW_POWER_POS 21
#define ENE_KB1200_PINMUX_PORT_POS 5
#define ENE_KB1200_PINMUX_PORT_MSK 0x7
#define ENE_KB1200_PINMUX_PIN_POS 0
#define ENE_KB1200_PINMUX_PIN_MSK 0x1f
#define ENE_KB1200_PINMUX_FUNC_POS 8
#define ENE_KB1200_PINMUX_FUNC_MSK 0xf
/*
* f is function number
* b[7:5] = pin bank
* b[4:0] = pin position in bank
* b[11:8] = function
*/
#define ENE_KB1200_PINMUX(n, f) \
(((((n) >> 5) & ENE_KB1200_PINMUX_PORT_MSK) << ENE_KB1200_PINMUX_PORT_POS) | \
(((n) & ENE_KB1200_PINMUX_PIN_MSK) << ENE_KB1200_PINMUX_PIN_POS) | \
(((f) & ENE_KB1200_PINMUX_FUNC_MSK) << ENE_KB1200_PINMUX_FUNC_POS))
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_ENE_KB1200_PINCTRL_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/ene-kb1200-pinctrl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 533 |
```objective-c
/*
*/
#ifndef _ZEPHYR_DT_BINDINGS_PINCTRL_RV32M1_PINCTRL_
#define _ZEPHYR_DT_BINDINGS_PINCTRL_RV32M1_PINCTRL_
/**
* @brief Specify PORTx->PCR register MUX field
*
* @param port Port name ('A' to 'E')
* @param pin Port pin number (0 to 31)
* @param mux Alternate function number (0 to 7)
*/
#define RV32M1_MUX(port, pin, mux) \
(((((port) - 'A') & 0xF) << 28) | \
(((pin) & 0x3F) << 22) | \
(((mux) & 0x7) << 8))
#endif /* _ZEPHYR_DT_BINDINGS_PINCTRL_RV32M1_PINCTRL_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/rv32m1-pinctrl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 184 |
```objective-c
/*
*
*/
#ifndef __ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_RENESAS_RA_PINCTRL_H__
#define __ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_RENESAS_RA_PINCTRL_H__
#define RA_PORT_NUM_POS 0
#define RA_PORT_NUM_MASK 0xf
#define RA_PIN_NUM_POS 4
#define RA_PIN_NUM_MASK 0xf
#define RA_PSEL_HIZ_JTAG_SWD 0x0
#define RA_PSEL_AGT 0x1
#define RA_PSEL_GPT0 0x2
#define RA_PSEL_GPT1 0x3
#define RA_PSEL_SCI_0 0x4
#define RA_PSEL_SCI_2 0x4
#define RA_PSEL_SCI_4 0x4
#define RA_PSEL_SCI_6 0x4
#define RA_PSEL_SCI_8 0x4
#define RA_PSEL_SCI_1 0x5
#define RA_PSEL_SCI_3 0x5
#define RA_PSEL_SCI_5 0x5
#define RA_PSEL_SCI_7 0x5
#define RA_PSEL_SCI_9 0x5
#define RA_PSEL_SPI 0x6
#define RA_PSEL_I2C 0x7
#define RA_PSEL_CLKOUT_RTC 0x9
#define RA_PSEL_CAC_ADC 0xa
#define RA_PSEL_BUS 0xb
#define RA_PSEL_CANFD 0x10
#define RA_PSEL_QSPI 0x11
#define RA_PSEL_SSIE 0x12
#define RA_PSEL_USBFS 0x13
#define RA_PSEL_USBHS 0x14
#define RA_PSEL_SDHI 0x15
#define RA_PSEL_ETH_MII 0x16
#define RA_PSEL_ETH_RMII 0x17
#define RA_PSEL_GLCDC 0x19
#define RA_PSEL_OSPI 0x1c
#define RA_PSEL_ADC 0x00
#define RA_PSEL_POS 8
#define RA_PSEL_MASK 0x1f
#define RA_MODE_POS 13
#define RA_MODE_MASK 0x1
#define RA_PSEL(psel, port_num, pin_num) \
(1 << RA_MODE_POS | psel << RA_PSEL_POS | port_num << RA_PORT_NUM_POS | \
pin_num << RA_PIN_NUM_POS)
#endif /* __ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_RENESAS_RA_PINCTRL_H__ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/renesas/pinctrl-ra.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 576 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_RENESAS_PINCTRL_RA_COMMON_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_RENESAS_PINCTRL_RA_COMMON_H_
#define PORT4_POS 29
#define PORT4_MASK 0x1
#define PSEL_POS 24
#define PSEL_MASK 0x5
#define PORT_POS 21
#define PORT_MASK 0x7
#define PIN_POS 17
#define PIN_MASK 0xF
#define OPT_POS 0
#define OPT_MASK 0x1B000
#define RA_PINCFG_GPIO 0x00000
#define RA_PINCFG_FUNC 0x10000
#define RA_PINCFG_ANALOG 0x08000
#define RA_PINCFG(port, pin, psel, opt) \
((((psel)&PSEL_MASK) << PSEL_POS) | (((pin)&PIN_MASK) << PIN_POS) | \
(((port)&PORT_MASK) << PORT_POS) | ((((port) >> 3) & PORT4_MASK) << PORT4_POS) | \
(((opt)&OPT_MASK) << OPT_POS))
#if RA_SOC_PINS >= 40
#define RA_PINCFG__40(port, pin, psel, opt) RA_PINCFG(port, pin, psel, opt)
#endif
#if RA_SOC_PINS >= 48
#define RA_PINCFG__48(port, pin, psel, opt) RA_PINCFG(port, pin, psel, opt)
#endif
#if RA_SOC_PINS >= 64
#define RA_PINCFG__64(port, pin, psel, opt) RA_PINCFG(port, pin, psel, opt)
#endif
#if RA_SOC_PINS >= 100
#define RA_PINCFG_100(port, pin, psel, opt) RA_PINCFG(port, pin, psel, opt)
#endif
#endif
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/renesas/pinctrl-ra-common.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 404 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_RENESAS_PINCTRL_R8A77951_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_RENESAS_PINCTRL_R8A77951_H_
#include "pinctrl-rcar-common.h"
/* Pins declaration */
#define PIN_NONE -1
#define PIN_D0 RCAR_GP_PIN(0, 0)
#define PIN_D1 RCAR_GP_PIN(0, 1)
#define PIN_D2 RCAR_GP_PIN(0, 2)
#define PIN_D3 RCAR_GP_PIN(0, 3)
#define PIN_D4 RCAR_GP_PIN(0, 4)
#define PIN_D5 RCAR_GP_PIN(0, 5)
#define PIN_D6 RCAR_GP_PIN(0, 6)
#define PIN_D7 RCAR_GP_PIN(0, 7)
#define PIN_D8 RCAR_GP_PIN(0, 8)
#define PIN_D9 RCAR_GP_PIN(0, 9)
#define PIN_D10 RCAR_GP_PIN(0, 10)
#define PIN_D11 RCAR_GP_PIN(0, 11)
#define PIN_D12 RCAR_GP_PIN(0, 12)
#define PIN_D13 RCAR_GP_PIN(0, 13)
#define PIN_D14 RCAR_GP_PIN(0, 14)
#define PIN_D15 RCAR_GP_PIN(0, 15)
#define PIN_A0 RCAR_GP_PIN(1, 0)
#define PIN_A1 RCAR_GP_PIN(1, 1)
#define PIN_A2 RCAR_GP_PIN(1, 2)
#define PIN_A3 RCAR_GP_PIN(1, 3)
#define PIN_A4 RCAR_GP_PIN(1, 4)
#define PIN_A5 RCAR_GP_PIN(1, 5)
#define PIN_A6 RCAR_GP_PIN(1, 6)
#define PIN_A7 RCAR_GP_PIN(1, 7)
#define PIN_A8 RCAR_GP_PIN(1, 8)
#define PIN_A9 RCAR_GP_PIN(1, 9)
#define PIN_A10 RCAR_GP_PIN(1, 10)
#define PIN_A11 RCAR_GP_PIN(1, 11)
#define PIN_A12 RCAR_GP_PIN(1, 12)
#define PIN_A13 RCAR_GP_PIN(1, 13)
#define PIN_A14 RCAR_GP_PIN(1, 14)
#define PIN_A15 RCAR_GP_PIN(1, 15)
#define PIN_A16 RCAR_GP_PIN(1, 16)
#define PIN_A17 RCAR_GP_PIN(1, 17)
#define PIN_A18 RCAR_GP_PIN(1, 18)
#define PIN_A19 RCAR_GP_PIN(1, 19)
#define PIN_CS0 RCAR_GP_PIN(1, 20)
#define PIN_CS1 RCAR_GP_PIN(1, 21)
#define PIN_BS RCAR_GP_PIN(1, 22)
#define PIN_RD RCAR_GP_PIN(1, 23)
#define PIN_RD_WR RCAR_GP_PIN(1, 24)
#define PIN_WE0 RCAR_GP_PIN(1, 25)
#define PIN_WE1 RCAR_GP_PIN(1, 26)
#define PIN_EX_WAIT0 RCAR_GP_PIN(1, 27)
#define PIN_CLKOUT RCAR_GP_PIN(1, 28)
#define PIN_IRQ0 RCAR_GP_PIN(2, 0)
#define PIN_IRQ1 RCAR_GP_PIN(2, 1)
#define PIN_IRQ2 RCAR_GP_PIN(2, 2)
#define PIN_IRQ3 RCAR_GP_PIN(2, 3)
#define PIN_IRQ4 RCAR_GP_PIN(2, 4)
#define PIN_IRQ5 RCAR_GP_PIN(2, 5)
#define PIN_PWM0 RCAR_GP_PIN(2, 6)
#define PIN_PWM1_A RCAR_GP_PIN(2, 7)
#define PIN_PWM2_A RCAR_GP_PIN(2, 8)
#define PIN_AVB_MDC RCAR_GP_PIN(2, 9)
#define PIN_AVB_MAGIC RCAR_GP_PIN(2, 10)
#define PIN_AVB_PHY_INT RCAR_GP_PIN(2, 11)
#define PIN_AVB_LINK RCAR_GP_PIN(2, 12)
#define PIN_AVB_AVTP_MATCH_A RCAR_GP_PIN(2, 13)
#define PIN_AVB_AVTP_CAPTURE_A RCAR_GP_PIN(2, 14)
#define PIN_SD0_CLK RCAR_GP_PIN(3, 0)
#define PIN_SD0_CMD RCAR_GP_PIN(3, 1)
#define PIN_SD0_DATA0 RCAR_GP_PIN(3, 2)
#define PIN_SD0_DATA1 RCAR_GP_PIN(3, 3)
#define PIN_SD0_DATA2 RCAR_GP_PIN(3, 4)
#define PIN_SD0_DATA3 RCAR_GP_PIN(3, 5)
#define PIN_SD1_CLK RCAR_GP_PIN(3, 6)
#define PIN_SD1_CMD RCAR_GP_PIN(3, 7)
#define PIN_SD1_DATA0 RCAR_GP_PIN(3, 8)
#define PIN_SD1_DATA1 RCAR_GP_PIN(3, 9)
#define PIN_SD1_DATA2 RCAR_GP_PIN(3, 10)
#define PIN_SD1_DATA3 RCAR_GP_PIN(3, 11)
#define PIN_SD0_CD RCAR_GP_PIN(3, 12)
#define PIN_SD0_WP RCAR_GP_PIN(3, 13)
#define PIN_SD1_CD RCAR_GP_PIN(3, 14)
#define PIN_SD1_WP RCAR_GP_PIN(3, 15)
#define PIN_SD2_CLK RCAR_GP_PIN(4, 0)
#define PIN_SD2_CMD RCAR_GP_PIN(4, 1)
#define PIN_SD2_DATA0 RCAR_GP_PIN(4, 2)
#define PIN_SD2_DATA1 RCAR_GP_PIN(4, 3)
#define PIN_SD2_DATA2 RCAR_GP_PIN(4, 4)
#define PIN_SD2_DATA3 RCAR_GP_PIN(4, 5)
#define PIN_SD2_DS RCAR_GP_PIN(4, 6)
#define PIN_SD3_CLK RCAR_GP_PIN(4, 7)
#define PIN_SD3_CMD RCAR_GP_PIN(4, 8)
#define PIN_SD3_DATA0 RCAR_GP_PIN(4, 9)
#define PIN_SD3_DATA1 RCAR_GP_PIN(4, 10)
#define PIN_SD3_DATA2 RCAR_GP_PIN(4, 11)
#define PIN_SD3_DATA3 RCAR_GP_PIN(4, 12)
#define PIN_SD3_DATA4 RCAR_GP_PIN(4, 13)
#define PIN_SD3_DATA5 RCAR_GP_PIN(4, 14)
#define PIN_SD3_DATA6 RCAR_GP_PIN(4, 15)
#define PIN_SD3_DATA7 RCAR_GP_PIN(4, 16)
#define PIN_SD3_DS RCAR_GP_PIN(4, 17)
#define PIN_SCK0 RCAR_GP_PIN(5, 0)
#define PIN_RX0 RCAR_GP_PIN(5, 1)
#define PIN_TX0 RCAR_GP_PIN(5, 2)
#define PIN_CTS0 RCAR_GP_PIN(5, 3)
#define PIN_RTS0 RCAR_GP_PIN(5, 4)
#define PIN_RX1_A RCAR_GP_PIN(5, 5)
#define PIN_TX1_A RCAR_GP_PIN(5, 6)
#define PIN_CTS1 RCAR_GP_PIN(5, 7)
#define PIN_RTS1 RCAR_GP_PIN(5, 8)
#define PIN_SCK2 RCAR_GP_PIN(5, 9)
#define PIN_TX2_A RCAR_GP_PIN(5, 10)
#define PIN_RX2_A RCAR_GP_PIN(5, 11)
#define PIN_HSCK0 RCAR_GP_PIN(5, 12)
#define PIN_HRX0 RCAR_GP_PIN(5, 13)
#define PIN_HTX0 RCAR_GP_PIN(5, 14)
#define PIN_HCTS0 RCAR_GP_PIN(5, 15)
#define PIN_HRTS0 RCAR_GP_PIN(5, 16)
#define PIN_MSIOF0_SCK RCAR_GP_PIN(5, 17)
#define PIN_MSIOF0_SYNC RCAR_GP_PIN(5, 18)
#define PIN_MSIOF0_SS1 RCAR_GP_PIN(5, 19)
#define PIN_MSIOF0_TXD RCAR_GP_PIN(5, 20)
#define PIN_MSIOF0_SS2 RCAR_GP_PIN(5, 21)
#define PIN_MSIOF0_RXD RCAR_GP_PIN(5, 22)
#define PIN_MLB_CLK RCAR_GP_PIN(5, 23)
#define PIN_MLB_SIG RCAR_GP_PIN(5, 24)
#define PIN_MLB_DAT RCAR_GP_PIN(5, 25)
#define PIN_SSI_SCK01239 RCAR_GP_PIN(6, 0)
#define PIN_SSI_WS01239 RCAR_GP_PIN(6, 1)
#define PIN_SSI_SDATA0 RCAR_GP_PIN(6, 2)
#define PIN_SSI_SDATA1_A RCAR_GP_PIN(6, 3)
#define PIN_SSI_SDATA2_A RCAR_GP_PIN(6, 4)
#define PIN_SSI_SCK349 RCAR_GP_PIN(6, 5)
#define PIN_SSI_WS349 RCAR_GP_PIN(6, 6)
#define PIN_SSI_SDATA3 RCAR_GP_PIN(6, 7)
#define PIN_SSI_SCK4 RCAR_GP_PIN(6, 8)
#define PIN_SSI_WS4 RCAR_GP_PIN(6, 9)
#define PIN_SSI_SDAT_A4 RCAR_GP_PIN(6, 10)
#define PIN_SSI_SCK5 RCAR_GP_PIN(6, 11)
#define PIN_SSI_WS5 RCAR_GP_PIN(6, 12)
#define PIN_SSI_SDAT_A5 RCAR_GP_PIN(6, 13)
#define PIN_SSI_SCK6 RCAR_GP_PIN(6, 14)
#define PIN_SSI_WS6 RCAR_GP_PIN(6, 15)
#define PIN_SSI_SDATA6 RCAR_GP_PIN(6, 16)
#define PIN_SSI_SCK78 RCAR_GP_PIN(6, 17)
#define PIN_WS78 RCAR_GP_PIN(6, 18)
#define PIN_SSI_SDATA7 RCAR_GP_PIN(6, 19)
#define PIN_SSI_SDATA8 RCAR_GP_PIN(6, 20)
#define PIN_SSI_SDATA9_A RCAR_GP_PIN(6, 21)
#define PIN_AUDIO_CLKA_A RCAR_GP_PIN(6, 22)
#define PIN_AUDIO_CLKB_B RCAR_GP_PIN(6, 23)
#define PIN_USB0_PWEN RCAR_GP_PIN(6, 24)
#define PIN_USB0_OVC RCAR_GP_PIN(6, 25)
#define PIN_USB1_PWEN RCAR_GP_PIN(6, 26)
#define PIN_USB1_OVC RCAR_GP_PIN(6, 27)
#define PIN_USB30_PWEN RCAR_GP_PIN(6, 28)
#define PIN_USB30_OVC RCAR_GP_PIN(6, 29)
#define PIN_USB2_CH3_PWEN RCAR_GP_PIN(6, 30)
#define PIN_USB2_CH3_OVC RCAR_GP_PIN(6, 31)
#define PIN_AVS1 RCAR_GP_PIN(7, 0)
#define PIN_AVS2 RCAR_GP_PIN(7, 1)
#define PIN_GP7_02 RCAR_GP_PIN(7, 2)
#define PIN_GP7_03 RCAR_GP_PIN(7, 3)
#define PIN_ASEBRK RCAR_NOGP_PIN(1)
#define PIN_AVB_MDIO RCAR_NOGP_PIN(2)
#define PIN_AVB_RD0 RCAR_NOGP_PIN(3)
#define PIN_AVB_RD1 RCAR_NOGP_PIN(4)
#define PIN_AVB_RD2 RCAR_NOGP_PIN(5)
#define PIN_AVB_RD3 RCAR_NOGP_PIN(6)
#define PIN_AVB_RXC RCAR_NOGP_PIN(7)
#define PIN_AVB_RX_CTL RCAR_NOGP_PIN(8)
#define PIN_AVB_TD0 RCAR_NOGP_PIN(9)
#define PIN_AVB_TD1 RCAR_NOGP_PIN(10)
#define PIN_AVB_TD2 RCAR_NOGP_PIN(11)
#define PIN_AVB_TD3 RCAR_NOGP_PIN(12)
#define PIN_AVB_TXC RCAR_NOGP_PIN(13)
#define PIN_AVB_TXCREFCLK RCAR_NOGP_PIN(14)
#define PIN_AVB_TX_CTL RCAR_NOGP_PIN(15)
#define PIN_DU_DOTCLKIN0 RCAR_NOGP_PIN(16)
#define PIN_DU_DOTCLKIN1 RCAR_NOGP_PIN(17)
#define PIN_DU_DOTCLKIN2 RCAR_NOGP_PIN(18)
#define PIN_DU_DOTCLKIN3 RCAR_NOGP_PIN(19)
#define PIN_EXTALR RCAR_NOGP_PIN(20)
#define PIN_FSCLKST_N RCAR_NOGP_PIN(21)
#define PIN_MLB_REF RCAR_NOGP_PIN(22)
#define PIN_PRESETOUT_N RCAR_NOGP_PIN(23)
#define PIN_QSPI0_IO2 RCAR_NOGP_PIN(24)
#define PIN_QSPI0_IO3 RCAR_NOGP_PIN(25)
#define PIN_QSPI0_MISO_IO1 RCAR_NOGP_PIN(26)
#define PIN_QSPI0_MOSI_IO0 RCAR_NOGP_PIN(27)
#define PIN_QSPI0_SPCLK RCAR_NOGP_PIN(28)
#define PIN_QSPI0_SSL RCAR_NOGP_PIN(29)
#define PIN_QSPI1_IO2 RCAR_NOGP_PIN(30)
#define PIN_QSPI1_IO3 RCAR_NOGP_PIN(31)
#define PIN_QSPI1_MISO_IO1 RCAR_NOGP_PIN(32)
#define PIN_QSPI1_MOSI_IO0 RCAR_NOGP_PIN(33)
#define PIN_QSPI1_SPCLK RCAR_NOGP_PIN(34)
#define PIN_QSPI1_SSL RCAR_NOGP_PIN(35)
#define PIN_RPC_INT_N RCAR_NOGP_PIN(36)
#define PIN_RPC_RESET_N RCAR_NOGP_PIN(37)
#define PIN_RPC_WP_N RCAR_NOGP_PIN(38)
#define PIN_TCK RCAR_NOGP_PIN(39)
#define PIN_TDI RCAR_NOGP_PIN(40)
#define PIN_TDO RCAR_NOGP_PIN(41)
#define PIN_TMS RCAR_NOGP_PIN(42)
#define PIN_TRST_N RCAR_NOGP_PIN(43)
/* Pinmux function declarations */
#define FUNC_AVB_MDC IPSR(0, 0, 0)
#define FUNC_MSIOD2_SSI2_C IPSR(0, 0, 3)
#define FUNC_AVB_MAGIC IPSR(0, 4, 0)
#define FUNC_MSIOF2_SSI1_C IPSR(0, 4, 2)
#define FUNC_SCK4_A IPSR(0, 4, 3)
#define FUNC_AVB_PHY_INT IPSR(0, 8, 0)
#define FUNC_MSIOF2_SYNC_C IPSR(0, 8, 2)
#define FUNC_RX4_A IPSR(0, 8, 3)
#define FUNC_AVB_LINK IPSR(0, 12, 0)
#define FUNC_MSIOF2_SCK_C IPSR(0, 12, 2)
#define FUNC_TX4_A IPSR(0, 12, 3)
#define FUNC_AVB_AVTP_MATCH_A IPSR(0, 16, 0)
#define FUNC_MSIOF2_RXD_C IPSR(0, 16, 2)
#define FUNC_CTS4_N_A IPSR(0, 16, 3)
#define FUNC_FSCLKST2_N_A IPSR(0, 16, 5)
#define FUNC_AVB_AVTP_CAPTURE_A IPSR(0, 20, 0)
#define FUNC_MSIOF2_TXD_C IPSR(0, 20, 2)
#define FUNC_RTS4_N_A IPSR(0, 20, 3)
#define FUNC_IRQ0 IPSR(0, 24, 0)
#define FUNC_QPOLB IPSR(0, 24, 1)
#define FUNC_DU_CDE IPSR(0, 24, 3)
#define FUNC_VI4_DATA0_B IPSR(0, 24, 4)
#define FUNC_CAN0_TX_B IPSR(0, 24, 5)
#define FUNC_CANFD0_TX_B IPSR(0, 24, 6)
#define FUNC_MSIOF3_SS2_E IPSR(0, 24, 7)
#define FUNC_IRQ1 IPSR(0, 28, 0)
#define FUNC_QPOLA IPSR(0, 28, 1)
#define FUNC_DU_DISP IPSR(0, 28, 3)
#define FUNC_VI4_DATA1_B IPSR(0, 28, 4)
#define FUNC_CAN0_RX_B IPSR(0, 28, 5)
#define FUNC_CANFD0_RX_B IPSR(0, 28, 6)
#define FUNC_MSIOF3_SS1_E IPSR(0, 28, 7)
#define FUNC_IRQ2 IPSR(1, 0, 0)
#define FUNC_QCPV_QDE IPSR(1, 0, 1)
#define FUNC_DU_EXODDF_DU_ODDF_DISP_CDE IPSR(1, 0, 3)
#define FUNC_VI4_DATA2_B IPSR(1, 0, 4)
#define FUNC_MSIOF3_SYNC_E IPSR(1, 0, 7)
#define FUNC_PWM3_B IPSR(1, 0, 9)
#define FUNC_IRQ3 IPSR(1, 4, 0)
#define FUNC_QSTVB_QVE IPSR(1, 4, 1)
#define FUNC_DU_DOTCLKOUT1 IPSR(1, 4, 3)
#define FUNC_VI4_DATA3_B IPSR(1, 4, 4)
#define FUNC_MSIOF3_SCK_E IPSR(1, 4, 7)
#define FUNC_PWM4_B IPSR(1, 4, 9)
#define FUNC_IRQ4 IPSR(1, 8, 0)
#define FUNC_QSTH_QHS IPSR(1, 8, 1)
#define FUNC_DU_EXHSYNC_DU_HSYNC IPSR(1, 8, 3)
#define FUNC_VI4_DATA4_B IPSR(1, 8, 4)
#define FUNC_MSIOF3_RXD_E IPSR(1, 8, 7)
#define FUNC_PWM5_B IPSR(1, 8, 9)
#define FUNC_IRQ5 IPSR(1, 12, 0)
#define FUNC_QSTB_QHE IPSR(1, 12, 1)
#define FUNC_DU_EXVSYNC_DU_VSYNC IPSR(1, 12, 3)
#define FUNC_VI4_DATA5_B IPSR(1, 12, 4)
#define FUNC_FSCLKST2_N_B IPSR(1, 12, 5)
#define FUNC_MSIOF3_TXD_E IPSR(1, 12, 7)
#define FUNC_PWM6_B IPSR(1, 12, 9)
#define FUNC_PWM0 IPSR(1, 16, 0)
#define FUNC_AVB_AVTP_PPS IPSR(1, 16, 1)
#define FUNC_VI4_DATA6_B IPSR(1, 16, 4)
#define FUNC_IECLK_B IPSR(1, 16, 9)
#define FUNC_PWM1_A IPSR(1, 20, 0)
#define FUNC_HRX3_D IPSR(1, 20, 1)
#define FUNC_VI4_DATA7_B IPSR(1, 20, 4)
#define FUNC_IERX_B IPSR(1, 20, 9)
#define FUNC_PWM2_A IPSR(1, 24, 0)
#define FUNC_HTX3_D IPSR(1, 24, 3)
#define FUNC_IETX_B IPSR(1, 24, 9)
#define FUNC_A0 IPSR(1, 28, 0)
#define FUNC_LCDOUT16 IPSR(1, 28, 1)
#define FUNC_MSIOF3_SYNC_B IPSR(1, 28, 2)
#define FUNC_VI4_DATA8 IPSR(1, 28, 4)
#define FUNC_DU_DB0 IPSR(1, 28, 6)
#define FUNC_PWM3_A IPSR(1, 28, 9)
#define FUNC_A1 IPSR(2, 0, 0)
#define FUNC_LCDOUT17 IPSR(2, 0, 1)
#define FUNC_MSIOF3_TXD_B IPSR(2, 0, 2)
#define FUNC_VI4_DATA9 IPSR(2, 0, 4)
#define FUNC_DU_DB1 IPSR(2, 0, 6)
#define FUNC_PWM4_A IPSR(2, 0, 9)
#define FUNC_A2 IPSR(2, 4, 0)
#define FUNC_LCDOUT18 IPSR(2, 4, 1)
#define FUNC_MSIOF3_SCK_B IPSR(2, 4, 2)
#define FUNC_VI4_DATA10 IPSR(2, 4, 4)
#define FUNC_DU_DB2 IPSR(2, 4, 6)
#define FUNC_PWM5_A IPSR(2, 4, 9)
#define FUNC_A3 IPSR(2, 8, 0)
#define FUNC_LCDOUT19 IPSR(2, 8, 1)
#define FUNC_MSIOF3_RXD_B IPSR(2, 8, 2)
#define FUNC_VI4_DATA11 IPSR(2, 8, 4)
#define FUNC_DU_DB3 IPSR(2, 8, 6)
#define FUNC_PWM6_A IPSR(2, 8, 9)
#define FUNC_A4 IPSR(2, 12, 0)
#define FUNC_LCDOUT20 IPSR(2, 12, 1)
#define FUNC_MSIOF3_SS1_B IPSR(2, 12, 2)
#define FUNC_VI4_DATA12 IPSR(2, 12, 4)
#define FUNC_VI5_DATA12 IPSR(2, 12, 5)
#define FUNC_DU_DB4 IPSR(2, 12, 6)
#define FUNC_A5 IPSR(2, 16, 0)
#define FUNC_LCDOUT21 IPSR(2, 16, 1)
#define FUNC_MSIOF3_SS2_B IPSR(2, 16, 2)
#define FUNC_SCK4_B IPSR(2, 16, 3)
#define FUNC_VI4_DATA13 IPSR(2, 16, 4)
#define FUNC_VI5_DATA13 IPSR(2, 16, 5)
#define FUNC_DU_DB5 IPSR(2, 16, 6)
#define FUNC_A6 IPSR(2, 20, 0)
#define FUNC_LCDOUT22 IPSR(2, 20, 1)
#define FUNC_MSIOF2_SS1_A IPSR(2, 20, 2)
#define FUNC_RX4_B IPSR(2, 20, 3)
#define FUNC_VI4_DATA14 IPSR(2, 20, 4)
#define FUNC_VI5_DATA14 IPSR(2, 20, 5)
#define FUNC_DU_DB6 IPSR(2, 20, 6)
#define FUNC_A7 IPSR(2, 24, 0)
#define FUNC_LCDOUT23 IPSR(2, 24, 1)
#define FUNC_MSIOF2_SS2_A IPSR(2, 24, 2)
#define FUNC_TX4_B IPSR(2, 24, 3)
#define FUNC_VI4_DATA15 IPSR(2, 24, 4)
#define FUNC_VI5_DATA15 IPSR(2, 24, 5)
#define FUNC_DU_DB7 IPSR(2, 24, 6)
#define FUNC_A8 IPSR(2, 24, 0)
#define FUNC_RX3_B IPSR(2, 24, 1)
#define FUNC_MSIOF2_SYNC_A IPSR(2, 24, 2)
#define FUNC_HRX4_B IPSR(2, 24, 3)
#define FUNC_SDA6_A IPSR(2, 24, 7)
#define FUNC_AVB_AVTP_MATCH_B IPSR(2, 24, 8)
#define FUNC_PWM1_B IPSR(2, 24, 9)
#define FUNC_A9 IPSR(3, 0, 0)
#define FUNC_MSIOF2_SCK_A IPSR(3, 0, 2)
#define FUNC_CTS4_N_B IPSR(3, 0, 3)
#define FUNC_VI5_VSYNC_N IPSR(3, 0, 5)
#define FUNC_A10 IPSR(3, 4, 0)
#define FUNC_MSIOF2_RXD_A IPSR(3, 4, 2)
#define FUNC_RTS4_N_B IPSR(3, 4, 3)
#define FUNC_VI5_HSYNC_N IPSR(3, 4, 5)
#define FUNC_A11 IPSR(3, 8, 0)
#define FUNC_TX3_B IPSR(3, 8, 1)
#define FUNC_MSIOF2_TXD_A IPSR(3, 8, 2)
#define FUNC_HTX4_B IPSR(3, 8, 3)
#define FUNC_HSCK4 IPSR(3, 8, 4)
#define FUNC_VI5_FIELD IPSR(3, 8, 5)
#define FUNC_SCL6_A IPSR(3, 8, 7)
#define FUNC_AVB_AVTP_CAPTURE_B IPSR(3, 8, 8)
#define FUNC_PWM2_B IPSR(3, 8, 9)
#define FUNC_A12 IPSR(3, 12, 0)
#define FUNC_LCDOUT12 IPSR(3, 12, 1)
#define FUNC_MSIOF3_SCK_C IPSR(3, 12, 2)
#define FUNC_HRX4_A IPSR(3, 12, 4)
#define FUNC_VI5_DATA8 IPSR(3, 12, 5)
#define FUNC_DU_DG4 IPSR(3, 12, 6)
#define FUNC_A13 IPSR(3, 16, 0)
#define FUNC_LCDOUT13 IPSR(3, 16, 1)
#define FUNC_MSIOF3_SYNC_C IPSR(3, 16, 2)
#define FUNC_HTX4_A IPSR(3, 16, 5)
#define FUNC_VI5_DATA9 IPSR(3, 16, 6)
#define FUNC_DU_DG5 IPSR(3, 16, 7)
#define FUNC_A14 IPSR(3, 20, 0)
#define FUNC_LCDOUT14 IPSR(3, 20, 1)
#define FUNC_MSIOF3_RXD_C IPSR(3, 20, 2)
#define FUNC_HCTS4_N IPSR(3, 20, 4)
#define FUNC_VI5_DATA10 IPSR(3, 20, 5)
#define FUNC_DU_DG6 IPSR(3, 20, 6)
#define FUNC_A15 IPSR(3, 24, 0)
#define FUNC_LCDOUT15 IPSR(3, 24, 1)
#define FUNC_MSIOF3_TXD_C IPSR(3, 24, 2)
#define FUNC_HRTS4_N IPSR(3, 24, 4)
#define FUNC_VI5_DATA11 IPSR(3, 24, 5)
#define FUNC_DU_DG7 IPSR(3, 24, 6)
#define FUNC_A16 IPSR(3, 28, 0)
#define FUNC_LCDOUT8 IPSR(3, 28, 1)
#define FUNC_VI4_FIELD IPSR(3, 28, 4)
#define FUNC_DU_DG0 IPSR(3, 28, 6)
#define FUNC_A17 IPSR(4, 0, 0)
#define FUNC_LCDOUT9 IPSR(4, 0, 1)
#define FUNC_VI4_VSYNC_N IPSR(4, 0, 4)
#define FUNC_DU_DG1 IPSR(4, 0, 6)
#define FUNC_A18 IPSR(4, 4, 0)
#define FUNC_LCDOUT10 IPSR(4, 4, 1)
#define FUNC_VI4_HSYNC_N IPSR(4, 4, 4)
#define FUNC_DU_DG2 IPSR(4, 4, 6)
#define FUNC_A19 IPSR(4, 8, 0)
#define FUNC_LCDOUT11 IPSR(4, 8, 1)
#define FUNC_VI4_CLKENB IPSR(4, 8, 4)
#define FUNC_DU_DG3 IPSR(4, 8, 6)
#define FUNC_CS0_N IPSR(4, 12, 0)
#define FUNC_VI5_CLKENB IPSR(4, 12, 5)
#define FUNC_CS1_N IPSR(4, 16, 0)
#define FUNC_VI5_CLK IPSR(4, 16, 5)
#define FUNC_EX_WAIT0_B IPSR(4, 16, 7)
#define FUNC_BS_N IPSR(4, 20, 0)
#define FUNC_QSTVA_QVS IPSR(4, 20, 1)
#define FUNC_MSIOF3_SCK_D IPSR(4, 20, 2)
#define FUNC_SCK3 IPSR(4, 20, 3)
#define FUNC_HSCK3 IPSR(4, 20, 4)
#define FUNC_CAN1_TX IPSR(4, 20, 8)
#define FUNC_CANFD1_TX IPSR(4, 20, 9)
#define FUNC_IETX_A IPSR(4, 20, 0xA)
#define FUNC_RD_N IPSR(4, 24, 0)
#define FUNC_MSIOF3_SYNC_D IPSR(4, 24, 2)
#define FUNC_RX3_A IPSR(4, 24, 3)
#define FUNC_HRX3_A IPSR(4, 24, 4)
#define FUNC_CAN0_TX_A IPSR(4, 24, 8)
#define FUNC_CANFD0_TX_A IPSR(4, 24, 9)
#define FUNC_RD_WR_N IPSR(4, 28, 0)
#define FUNC_MSIOF3_RXD_D IPSR(4, 28, 2)
#define FUNC_TX3_A IPSR(4, 28, 3)
#define FUNC_HTX3_A IPSR(4, 28, 4)
#define FUNC_CAN0_RX_A IPSR(4, 28, 8)
#define FUNC_CANFD0_RX_A IPSR(4, 28, 9)
#define FUNC_WE0_N IPSR(5, 0, 0)
#define FUNC_MSIOF3_TXD_D IPSR(5, 0, 2)
#define FUNC_CTS3_N IPSR(5, 0, 3)
#define FUNC_HCTS3_N IPSR(5, 0, 4)
#define FUNC_SCL6_B IPSR(5, 0, 7)
#define FUNC_CAN_CLK IPSR(5, y, 8)
#define FUNC_IECLK_A IPSR(5, 0, 0xA)
#define FUNC_WE1_N IPSR(5, 4, 0)
#define FUNC_MSIOF3_SS1_D IPSR(5, 4, 2)
#define FUNC_RTS3_N IPSR(5, 4, 3)
#define FUNC_HRTS3_N IPSR(5, 4, 4)
#define FUNC_SDA6_B IPSR(5, 4, 7)
#define FUNC_CAN1_RX IPSR(5, 4, 8)
#define FUNC_CANFD1_RX IPSR(5, 4, 9)
#define FUNC_IERX_A IPSR(5, 4, 0xA)
#define FUNC_EX_WAIT0_A IPSR(5, 8, 0)
#define FUNC_QCLK IPSR(5, 8, 1)
#define FUNC_VI4_CLK IPSR(5, 8, 4)
#define FUNC_DU_DOTCLKOUT0 IPSR(5, 8, 6)
#define FUNC_D0 IPSR(5, 12, 0)
#define FUNC_MSIOF2_SS1_B IPSR(5, 12, 1)
#define FUNC_MSIOF3_SCK_A IPSR(5, 12, 2)
#define FUNC_VI4_DATA16 IPSR(5, 12, 4)
#define FUNC_VI5_DATA0 IPSR(5, 12, 5)
#define FUNC_D1 IPSR(5, 16, 0)
#define FUNC_MSIOF2_SS2_B IPSR(5, 16, 1)
#define FUNC_MSIOF3_SYNC_A IPSR(5, 12, 2)
#define FUNC_VI4_DATA17 IPSR(5, 16, 4)
#define FUNC_VI5_DATA1 IPSR(5, 16, 5)
#define FUNC_D2 IPSR(5, 20, 0)
#define FUNC_MSIOF3_RXD_A IPSR(5, 20, 2)
#define FUNC_VI4_DATA18 IPSR(5, 20, 4)
#define FUNC_VI5_DATA2 IPSR(5, 20, 5)
#define FUNC_D3 IPSR(5, 24, 0)
#define FUNC_MSIOF3_TXD_A IPSR(5, 24, 2)
#define FUNC_VI4_DATA19 IPSR(5, 24, 4)
#define FUNC_VI5_DATA3 IPSR(5, 24, 5)
#define FUNC_D4 IPSR(5, 28, 0)
#define FUNC_MSIOF2_SCK_B IPSR(5, 28, 1)
#define FUNC_VI4_DATA20 IPSR(5, 28, 4)
#define FUNC_VI5_DATA4 IPSR(5, 28, 5)
#define FUNC_D5 IPSR(6, 0, 0)
#define FUNC_MSIOF2_SYNC_B IPSR(6, 0, 1)
#define FUNC_VI4_DATA21 IPSR(6, 0, 4)
#define FUNC_VI5_DATA5 IPSR(6, 0, 5)
#define FUNC_D6 IPSR(6, 4, 0)
#define FUNC_MSIOF2_RXD_B IPSR(6, 4, 1)
#define FUNC_VI4_DATA22 IPSR(6, 4, 4)
#define FUNC_VI5_DATA6 IPSR(6, 4, 5)
#define FUNC_D7 IPSR(6, 8, 0)
#define FUNC_MSIOF2_TXD_B IPSR(6, 8, 1)
#define FUNC_VI4_DATA23 IPSR(6, 8, 4)
#define FUNC_VI5_DATA7 IPSR(6, 8, 5)
#define FUNC_D8 IPSR(6, 12, 0)
#define FUNC_LCDOUT0 IPSR(6, 12, 1)
#define FUNC_MSIOF2_SCK_D IPSR(6, 12, 2)
#define FUNC_SCK4_C IPSR(6, 12, 3)
#define FUNC_VI4_DATA0_A IPSR(6, 12, 4)
#define FUNC_DU_DR0 IPSR(6, 12, 6)
#define FUNC_D9 IPSR(6, 16, 0)
#define FUNC_LCDOUT1 IPSR(6, 16, 1)
#define FUNC_MSIOF2_SYNC_D IPSR(6, 16, 2)
#define FUNC_VI4_DATA1_A IPSR(6, 16, 4)
#define FUNC_DU_DR1 IPSR(6, 16, 6)
#define FUNC_D10 IPSR(6, 20, 0)
#define FUNC_LCDOUT2 IPSR(6, 20, 1)
#define FUNC_MSIOF2_RXD_D IPSR(6, 20, 2)
#define FUNC_HRX3_B IPSR(6, 20, 3)
#define FUNC_VI4_DATA2_A IPSR(6, 20, 4)
#define FUNC_CTS4_N_C IPSR(6, 20, 5)
#define FUNC_DU_DR2 IPSR(6, 20, 6)
#define FUNC_D11 IPSR(6, 24, 0)
#define FUNC_LCDOUT3 IPSR(6, 24, 1)
#define FUNC_MSIOF2_TXD_D IPSR(6, 24, 2)
#define FUNC_HTX3_B IPSR(6, 24, 3)
#define FUNC_VI4_DATA3_A IPSR(6, 24, 4)
#define FUNC_RTS4_N_C IPSR(6, 24, 5)
#define FUNC_DU_DR3 IPSR(6, 24, 6)
#define FUNC_D12 IPSR(6, 28, 0)
#define FUNC_LCDOUT4 IPSR(6, 28, 1)
#define FUNC_MSIOF2_SS1_D IPSR(6, 28, 2)
#define FUNC_RX4_C IPSR(6, 28, 3)
#define FUNC_VI4_DATA4_A IPSR(6, 28, 4)
#define FUNC_DU_DR4 IPSR(6, 28, 6)
#define FUNC_D13 IPSR(7, 0, 0)
#define FUNC_LCDOUT5 IPSR(7, 0, 1)
#define FUNC_MSIOF2_SS2_D IPSR(7, 0, 2)
#define FUNC_TX4_C IPSR(7, 0, 3)
#define FUNC_VI4_DATA5_A IPSR(7, 0, 4)
#define FUNC_DU_DR5 IPSR(7, 0, 6)
#define FUNC_D14 IPSR(7, 4, 0)
#define FUNC_LCDOUT6 IPSR(7, 4, 1)
#define FUNC_MSIOF3_SS1_A IPSR(7, 4, 2)
#define FUNC_HRX3_C IPSR(7, 4, 3)
#define FUNC_VI4_DATA6_A IPSR(7, 4, 4)
#define FUNC_DU_DR6 IPSR(7, 4, 6)
#define FUNC_SCL6_C IPSR(7, 4, 7)
#define FUNC_D15 IPSR(7, 8, 0)
#define FUNC_LCDOUT7 IPSR(7, 8, 1)
#define FUNC_MSIOF3_SS2_A IPSR(7, 8, 2)
#define FUNC_HTX3_C IPSR(7, 8, 3)
#define FUNC_VI4_DATA7_A IPSR(7, 8, 4)
#define FUNC_DU_DR7 IPSR(7, 8, 6)
#define FUNC_SDA6_C IPSR(7, 8, 7)
#define FUNC_SD0_CLK IPSR(7, 12, 0)
#define FUNC_MSIOF1_SCK_E IPSR(7, 12, 2)
#define FUNC_STP_OPWM_0_B IPSR(7, 12, 6)
#define FUNC_SD0_CMD IPSR(7, 16, 0)
#define FUNC_MSIOF1_SYNC_E IPSR(7, 16, 2)
#define FUNC_STP_IVCXO27_0_B IPSR(7, 16, 6)
#define FUNC_SD0_DAT0 IPSR(7, 20, 0)
#define FUNC_MSIOF1_RXD_E IPSR(7, 20, 2)
#define FUNC_TS_SCK0_B IPSR(7, 20, 5)
#define FUNC_STP_ISCLK_0_B IPSR(7, 20, 6)
#define FUNC_SD0_DAT1 IPSR(7, 24, 0)
#define FUNC_MSIOF1_TXD_E IPSR(7, 24, 2)
#define FUNC_TS_SPSYNC0_B IPSR(7, 24, 5)
#define FUNC_STP_ISSYNC_0_B IPSR(7, 24, 6)
#define FUNC_SD0_DAT2 IPSR(8, 0, 0)
#define FUNC_MSIOF1_SS1_E IPSR(8, 0, 2)
#define FUNC_TS_SDAT0_B IPSR(8, 0, 5)
#define FUNC_STP_ISD_0_B IPSR(8, 0, 6)
#define FUNC_SD0_DAT3 IPSR(8, 4, 0)
#define FUNC_MSIOF1_SS2_E IPSR(8, 4, 2)
#define FUNC_TS_SDEN0_B IPSR(8, 4, 5)
#define FUNC_STP_ISEN_0_B IPSR(8, 4, 6)
#define FUNC_SD1_CLK IPSR(8, 8, 0)
#define FUNC_MSIOF1_SCK_G IPSR(8, 8, 2)
#define FUNC_SIM0_CLK_A IPSR(8, 8, 5)
#define FUNC_SD1_CMD IPSR(8, 12, 0)
#define FUNC_MSIOF1_SYNC_G IPSR(8, 12, 2)
#define FUNC_NFCE_N_B IPSR(8, 12, 3)
#define FUNC_SIM0_D_A IPSR(8, 12, 5)
#define FUNC_STP_IVCXO27_1_B IPSR(8, 12, 6)
#define FUNC_SD1_DAT0 IPSR(8, 16, 0)
#define FUNC_SD2_DAT4 IPSR(8, 16, 1)
#define FUNC_MSIOF1_RXD_G IPSR(8, 16, 2)
#define FUNC_NFWP_N_B IPSR(8, 16, 3)
#define FUNC_TS_SCK1_B IPSR(8, 16, 5)
#define FUNC_STP_ISCLK_1_B IPSR(8, 16, 6)
#define FUNC_SD1_DAT1 IPSR(8, 20, 0)
#define FUNC_SD2_DAT5 IPSR(8, 20, 1)
#define FUNC_MSIOF1_TXD_G IPSR(8, 20, 2)
#define FUNC_NFDATA14_B IPSR(8, 20, 3)
#define FUNC_TS_SPSYNC1_B IPSR(8, 20, 5)
#define FUNC_STP_ISSYNC_1_B IPSR(8, 20, 6)
#define FUNC_SD1_DAT2 IPSR(8, 24, 0)
#define FUNC_SD2_DAT6 IPSR(8, 24, 1)
#define FUNC_MSIOF1_SS1_G IPSR(8, 24, 2)
#define FUNC_NFDATA15_B IPSR(8, 24, 3)
#define FUNC_TS_SDAT1_B IPSR(8, 24, 5)
#define FUNC_STP_ISD_1_B IPSR(8, 24, 6)
#define FUNC_SD1_DAT3 IPSR(8, 28, 0)
#define FUNC_SD2_DAT7 IPSR(8, 28, 1)
#define FUNC_MSIOF1_SS2_G IPSR(8, 28, 2)
#define FUNC_NFRB_N_B IPSR(8, 28, 3)
#define FUNC_TS_SDEN1_B IPSR(8, 28, 5)
#define FUNC_STP_ISEN_1_B IPSR(8, 28, 6)
#define FUNC_SD2_CLK IPSR(9, 0, 0)
#define FUNC_NFDATA8 IPSR(9, 0, 2)
#define FUNC_SD2_CMD IPSR(9, 4, 0)
#define FUNC_NFDATA9 IPSR(9, 4, 2)
#define FUNC_SD2_DAT0 IPSR(9, 8, 0)
#define FUNC_NFDATA10 IPSR(9, 8, 2)
#define FUNC_SD2_DAT1 IPSR(9, 12, 0)
#define FUNC_NFDATA11 IPSR(9, 12, 2)
#define FUNC_SD2_DAT2 IPSR(9, 16, 0)
#define FUNC_NFDATA12 IPSR(9, 16, 2)
#define FUNC_SD2_DAT3 IPSR(9, 20, 0)
#define FUNC_NFDATA13 IPSR(9, 20, 2)
#define FUNC_SD2_DS IPSR(9, 24, 0)
#define FUNC_NFALE IPSR(9, 24, 2)
#define FUNC_SATA_DEVSLP_B IPSR(9, 24, 8)
#define FUNC_SD3_CLK IPSR(9, 28, 0)
#define FUNC_NFWE_N IPSR(9, 28, 2)
#define FUNC_SD3_CMD IPSR(10, 0, 0)
#define FUNC_NFRE_N IPSR(10, 0, 2)
#define FUNC_SD3_DAT0 IPSR(10, 4, 0)
#define FUNC_NFDATA0 IPSR(10, 4, 2)
#define FUNC_SD3_DAT1 IPSR(10, 8, 0)
#define FUNC_NFDATA1 IPSR(10, 8, 2)
#define FUNC_SD3_DAT2 IPSR(10, 12, 0)
#define FUNC_NFDATA2 IPSR(10, 12, 2)
#define FUNC_SD3_DAT3 IPSR(10, 16, 0)
#define FUNC_NFDATA3 IPSR(10, 16, 2)
#define FUNC_SD3_DAT4 IPSR(10, 20, 0)
#define FUNC_SD2_CD_A IPSR(10, 20, 1)
#define FUNC_NFDATA4 IPSR(10, 20, 2)
#define FUNC_SD3_DAT5 IPSR(10, 24, 0)
#define FUNC_SD2_WP_A IPSR(10, 24, 1)
#define FUNC_NFDATA5 IPSR(10, 24, 2)
#define FUNC_SD3_DAT6 IPSR(10, 28, 0)
#define FUNC_SD3_CD IPSR(10, 28, 1)
#define FUNC_NFDATA6 IPSR(10, 28, 2)
#define FUNC_SD3_DAT7 IPSR(11, 0, 0)
#define FUNC_SD3_WP IPSR(11, 0, 1)
#define FUNC_NFDATA7 IPSR(11, 0, 2)
#define FUNC_SD3_DS IPSR(11, 4, 0)
#define FUNC_NFCLE IPSR(11, 4, 2)
#define FUNC_SD0_CD IPSR(11, 8, 0)
#define FUNC_NFDATA14_A IPSR(11, 8, 2)
#define FUNC_SCL2_B IPSR(11, 8, 4)
#define FUNC_SIM0_RST_A IPSR(11, 8, 5)
#define FUNC_SD0_WP IPSR(11, 12, 0)
#define FUNC_NFDATA15_A IPSR(11, 12, 2)
#define FUNC_SDA2_B IPSR(11, 12, 4)
#define FUNC_SD1_CD IPSR(11, 16, 0)
#define FUNC_NFRB_N_A IPSR(11, 16, 2)
#define FUNC_SIM0_CLK_B IPSR(11, 16, 5)
#define FUNC_SD1_WP IPSR(11, 20, 0)
#define FUNC_NFCE_N_A IPSR(11, 20, 2)
#define FUNC_SIM0_D_B IPSR(11, 20, 5)
#define FUNC_SCK0 IPSR(11, 24, 0)
#define FUNC_HSCK1_B IPSR(11, 24, 1)
#define FUNC_MSIOF1_SS2_B IPSR(11, 24, 2)
#define FUNC_AUDIO_CLKC_B IPSR(11, 24, 3)
#define FUNC_SDA2_A IPSR(11, 24, 4)
#define FUNC_SIM0_RST_B IPSR(11, 24, 5)
#define FUNC_STP_OPWM_0_C IPSR(11, 24, 6)
#define FUNC_RIF0_CLK_B IPSR(11, 24, 7)
#define FUNC_ADICHS2 IPSR(11, 24, 9)
#define FUNC_SCK5_B IPSR(11, 24, 0xA)
#define FUNC_RX0 IPSR(11, 28, 0)
#define FUNC_HRX1_B IPSR(11, 28, 1)
#define FUNC_TS_SCK0_C IPSR(11, 28, 5)
#define FUNC_STP_ISCLK_0_C IPSR(11, 28, 6)
#define FUNC_RIF0_D0_B IPSR(11, 28, 7)
#define FUNC_TX0 IPSR(12, 0, 0)
#define FUNC_HTX1_B IPSR(12, 0, 1)
#define FUNC_TS_SPSYNC0_C IPSR(12, 0, 5)
#define FUNC_STP_ISSYNC_0_C IPSR(12, 0, 6)
#define FUNC_RIF0_D1_B IPSR(12, 0, 7)
#define FUNC_CTS0_N IPSR(12, 4, 0)
#define FUNC_HCTS1_N_B IPSR(12, 4, 1)
#define FUNC_MSIOF1_SYNC_B IPSR(12, 4, 2)
#define FUNC_TS_SPSYNC1_C IPSR(12, 4, 5)
#define FUNC_STP_ISSYNC_1_C IPSR(12, 4, 6)
#define FUNC_RIF1_SYNC_B IPSR(12, 4, 7)
#define FUNC_AUDIO_CLKOUT_C IPSR(12, 4, 8)
#define FUNC_ADICS_SAMP IPSR(12, 4, 9)
#define FUNC_RTS0_N IPSR(12, 8, 0)
#define FUNC_HRTS1_N_B IPSR(12, 8, 1)
#define FUNC_MSIOF1_SS1_B IPSR(12, 8, 2)
#define FUNC_AUDIO_CLKA_B IPSR(12, 8, 3)
#define FUNC_SCL2_A IPSR(12, 8, 4)
#define FUNC_STP_IVCXO27_1_C IPSR(12, 8, 6)
#define FUNC_RIF0_SYNC_B IPSR(12, 8, 7)
#define FUNC_ADICHS1 IPSR(12, 8, 9)
#define FUNC_RX1_A IPSR(12, 12, 0)
#define FUNC_HRX1_A IPSR(12, 12, 1)
#define FUNC_TS_SDAT0_C IPSR(12, 12, 5)
#define FUNC_STP_ISD_0_C IPSR(12, 12, 6)
#define FUNC_RIF1_CLK_C IPSR(12, 12, 7)
#define FUNC_TX1_A IPSR(12, 16, 0)
#define FUNC_HTX1_A IPSR(12, 16, 1)
#define FUNC_TS_SDEN0_C IPSR(12, 16, 5)
#define FUNC_STP_ISEN_0_C IPSR(12, 16, 6)
#define FUNC_RIF1_D0_C IPSR(12, 16, 7)
#define FUNC_CTS1_N IPSR(12, 20, 0)
#define FUNC_HCTS1_N_A IPSR(12, 20, 1)
#define FUNC_MSIOF1_RXD_B IPSR(12, 20, 2)
#define FUNC_TS_SDEN1_C IPSR(12, 20, 5)
#define FUNC_STP_ISEN_1_C IPSR(12, 20, 6)
#define FUNC_RIF1_D0_B IPSR(12, 20, 7)
#define FUNC_ADIDATA IPSR(12, 20, 9)
#define FUNC_RTS1_N IPSR(12, 24, 0)
#define FUNC_HRTS1_N_A IPSR(12, 24, 1)
#define FUNC_MSIOF1_TXD_B IPSR(12, 24, 2)
#define FUNC_TS_SDAT1_C IPSR(12, 24, 5)
#define FUNC_STP_ISD_1_C IPSR(12, 24, 6)
#define FUNC_RIF1_D1_B IPSR(12, 24, 7)
#define FUNC_ADICHS0 IPSR(12, 24, 9)
#define FUNC_SCK2 IPSR(12, 28, 0)
#define FUNC_SCIF_CLK_B IPSR(12, 28, 1)
#define FUNC_MSIOF1_SCK_B IPSR(12, 28, 2)
#define FUNC_TS_SCK1_C IPSR(12, 28, 5)
#define FUNC_STP_ISCLK_1_C IPSR(12, 28, 6)
#define FUNC_RIF1_CLK_B IPSR(12, 28, 7)
#define FUNC_ADICLK IPSR(12, 28, 9)
#define FUNC_TX2_A IPSR(13, 0, 0)
#define FUNC_SD2_CD_B IPSR(13, 0, 3)
#define FUNC_SCL1_A IPSR(13, 0, 4)
#define FUNC_FMCLK_A IPSR(13, 0, 6)
#define FUNC_RIF1_D1_C IPSR(13, 0, 7)
#define FUNC_FSO_CFE_0_N IPSR(13, 0, 9)
#define FUNC_RX2_A IPSR(13, 4, 0)
#define FUNC_SD2_WP_B IPSR(13, 4, 3)
#define FUNC_SDA1_A IPSR(13, 4, 4)
#define FUNC_FMIN_A IPSR(13, 4, 6)
#define FUNC_RIF1_SYNC_C IPSR(13, 4, 7)
#define FUNC_FSO_CFE_1_N IPSR(13, 4, 9)
#define FUNC_HSCK0 IPSR(13, 8, 0)
#define FUNC_MSIOF1_SCK_D IPSR(13, 8, 2)
#define FUNC_AUDIO_CLKB_A IPSR(13, 8, 3)
#define FUNC_SSI_SDATA1_B IPSR(13, 8, 4)
#define FUNC_TS_SCK0_D IPSR(13, 8, 5)
#define FUNC_STP_ISCLK_0_D IPSR(13, 8, 6)
#define FUNC_RIF0_CLK_C IPSR(13, 8, 7)
#define FUNC_RX5_B IPSR(13, 8, 0xA)
#define FUNC_HRX0 IPSR(13, 12, 0)
#define FUNC_MSIOF1_RXD_D IPSR(13, 12, 2)
#define FUNC_SSI_SDATA2_B IPSR(13, 12, 4)
#define FUNC_TS_SDEN0_D IPSR(13, 12, 5)
#define FUNC_STP_ISEN_0_D IPSR(13, 12, 6)
#define FUNC_RIF0_D0_C IPSR(13, 12, 7)
#define FUNC_HTX0 IPSR(13, 16, 0)
#define FUNC_MSIOF1_TXD_D IPSR(13, 16, 2)
#define FUNC_SSI_SDATA9_B IPSR(13, 16, 4)
#define FUNC_TS_SDAT0_D IPSR(13, 16, 5)
#define FUNC_STP_ISD_0_D IPSR(13, 16, 6)
#define FUNC_RIF0_D1_C IPSR(13, 16, 7)
#define FUNC_HCTS0_N IPSR(13, 20, 0)
#define FUNC_RX2_B IPSR(13, 20, 1)
#define FUNC_MSIOF1_SYNC_D IPSR(13, 20, 2)
#define FUNC_SSI_SCK9_A IPSR(13, 20, 4)
#define FUNC_TS_SPSYNC0_D IPSR(13, 20, 5)
#define FUNC_STP_ISSYNC_0_D IPSR(13, 20, 6)
#define FUNC_RIF0_SYNC_C IPSR(13, 20, 7)
#define FUNC_AUDIO_CLKOUT1_A IPSR(13, 20, 8)
#define FUNC_HRTS0_N IPSR(13, 24, 0)
#define FUNC_TX2_B IPSR(13, 24, 1)
#define FUNC_MSIOF1_SS1_D IPSR(13, 24, 2)
#define FUNC_SSI_WS9_A IPSR(13, 24, 4)
#define FUNC_STP_IVCXO27_0_D IPSR(13, 24, 6)
#define FUNC_BPFCLK_A IPSR(13, 24, 7)
#define FUNC_AUDIO_CLKOUT2_A IPSR(13, 24, 8)
#define FUNC_MSIOF0_SYNC IPSR(13, 28, 0)
#define FUNC_AUDIO_CLKOUT_A IPSR(13, 28, 8)
#define FUNC_TX5_B IPSR(13, 28, 0xA)
#define FUNC_MSIOF0_SS1 IPSR(14, 0, 0)
#define FUNC_RX5_A IPSR(14, 0, 1)
#define FUNC_NFWP_N_A IPSR(14, 0, 2)
#define FUNC_AUDIO_CLKA_C IPSR(14, 0, 3)
#define FUNC_SSI_SCK2_A IPSR(14, 0, 4)
#define FUNC_STP_IVCXO27_0_C IPSR(14, 0, 6)
#define FUNC_AUDIO_CLKOUT3_A IPSR(14, 0, 8)
#define FUNC_TCLK1_B IPSR(14, 0, 0xA)
#define FUNC_MSIOF0_SS2 IPSR(14, 4, 0)
#define FUNC_TX5_A IPSR(14, 4, 1)
#define FUNC_MSIOF1_SS2_D IPSR(14, 4, 2)
#define FUNC_AUDIO_CLKC_A IPSR(14, 4, 3)
#define FUNC_SSI_WS2_A IPSR(14, 4, 4)
#define FUNC_STP_OPWM_0_D IPSR(14, 4, 6)
#define FUNC_AUDIO_CLKOUT_D IPSR(14, 4, 8)
#define FUNC_SPEEDIN_B IPSR(14, 4, 0xA)
#define FUNC_MLB_CLK IPSR(14, 4, 0)
#define FUNC_MSIOF1_SCK_F IPSR(14, 4, 2)
#define FUNC_SCL1_B IPSR(14, 4, 4)
#define FUNC_MLB_SIG IPSR(14, 8, 0)
#define FUNC_RX1_B IPSR(14, 8, 1)
#define FUNC_MSIOF1_SYNC_F IPSR(14, 8, 2)
#define FUNC_SDA1_B IPSR(14, 8, 4)
#define FUNC_MLB_DAT IPSR(14, 12, 0)
#define FUNC_TX1_B IPSR(14, 12, 1)
#define FUNC_MSIOF1_RXD_F IPSR(14, 12, 2)
#define FUNC_SSI_SCK01239 IPSR(14, 16, 0)
#define FUNC_MSIOF1_TXD_F IPSR(14, 16, 2)
#define FUNC_SSI_WS01239 IPSR(14, 16, 0)
#define FUNC_MSIOF1_SS1_F IPSR(14, 16, 2)
#define FUNC_SSI_SDATA0 IPSR(14, 20, 0)
#define FUNC_MSIOF1_SS2_F IPSR(14, 20, 2)
#define FUNC_SSI_SDATA1_A IPSR(15, 0, 0)
#define FUNC_SSI_SDATA2_A IPSR(15, 4, 0)
#define FUNC_SSI_SCK1_B IPSR(15, 4, 4)
#define FUNC_SSI_SCK349 IPSR(15, 8, 0)
#define FUNC_MSIOF1_SS1_A IPSR(15, 8, 2)
#define FUNC_STP_OPWM_0_A IPSR(15, 8, 6)
#define FUNC_SSI_WS349 IPSR(15, 12, 0)
#define FUNC_HCTS2_N_A IPSR(15, 12, 1)
#define FUNC_MSIOF1_SS2_A IPSR(15, 12, 2)
#define FUNC_STP_IVCXO27_0_A IPSR(15, 12, 6)
#define FUNC_SSI_SDATA3 IPSR(15, 16, 0)
#define FUNC_HRTS2_N_A IPSR(15, 16, 1)
#define FUNC_MSIOF1_TXD_A IPSR(15, 16, 2)
#define FUNC_TS_SCK0_A IPSR(15, 16, 5)
#define FUNC_STP_ISCLK_0_A IPSR(15, 16, 6)
#define FUNC_RIF0_D1_A IPSR(15, 16, 7)
#define FUNC_RIF2_D0_A IPSR(15, 16, 8)
#define FUNC_SSI_SCK4 IPSR(15, 20, 0)
#define FUNC_HRX2_A IPSR(15, 20, 1)
#define FUNC_MSIOF1_SCK_A IPSR(15, 20, 2)
#define FUNC_TS_SDAT0_A IPSR(15, 20, 5)
#define FUNC_STP_ISD_0_A IPSR(15, 20, 6)
#define FUNC_RIF0_CLK_A IPSR(15, 20, 7)
#define FUNC_RIF2_CLK_A IPSR(15, 20, 8)
#define FUNC_SSI_WS4 IPSR(15, 24, 0)
#define FUNC_HTX2_A IPSR(15, 24, 1)
#define FUNC_MSIOF1_SYNC_A IPSR(15, 24, 2)
#define FUNC_TS_SDEN0_A IPSR(15, 24, 5)
#define FUNC_STP_ISEN_0_A IPSR(15, 24, 6)
#define FUNC_RIF0_SYNC_A IPSR(15, 24, 7)
#define FUNC_RIF2_SYNC_A IPSR(15, 24, 8)
#define FUNC_SSI_SDATA4 IPSR(15, 28, 0)
#define FUNC_HSCK2_A IPSR(15, 28, 1)
#define FUNC_MSIOF1_RXD_A IPSR(15, 28, 2)
#define FUNC_TS_SPSYNC0_A IPSR(15, 28, 5)
#define FUNC_STP_ISSYNC_0_A IPSR(15, 28, 6)
#define FUNC_RIF0_D0_A IPSR(15, 28, 7)
#define FUNC_RIF2_D1_A IPSR(15, 28, 8)
#define FUNC_SSI_SCK6 IPSR(16, 0, 0)
#define FUNC_USB2_PWEN IPSR(16, 0, 1)
#define FUNC_SIM0_RST_D IPSR(16, 0, 3)
#define FUNC_SSI_WS6 IPSR(16, 4, 0)
#define FUNC_USB2_OVC IPSR(16, 4, 1)
#define FUNC_SIM0_D_D IPSR(16, 4, 3)
#define FUNC_SSI_SDATA6 IPSR(16, 8, 0)
#define FUNC_SIM0_CLK_D IPSR(16, 8, 3)
#define FUNC_SATA_DEVSLP_A IPSR(16, 8, 8)
#define FUNC_SSI_SCK78 IPSR(16, 12, 0)
#define FUNC_HRX2_B IPSR(16, 12, 1)
#define FUNC_MSIOF1_SCK_C IPSR(16, y, 2)
#define FUNC_TS_SCK1_A IPSR(16, y, 5)
#define FUNC_STP_ISCLK_1_A IPSR(16, y, 6)
#define FUNC_RIF1_CLK_A IPSR(16, y, 7)
#define FUNC_RIF3_CLK_A IPSR(16, y, 8)
#define FUNC_SSI_WS78 IPSR(16, 16, 0)
#define FUNC_HTX2_B IPSR(16, 16, 1)
#define FUNC_MSIOF1_SYNC_C IPSR(16, 16, 2)
#define FUNC_TS_SDAT1_A IPSR(16, 16, 5)
#define FUNC_STP_ISD_1_A IPSR(16, 16, 6)
#define FUNC_RIF1_SYNC_A IPSR(16, 16, 7)
#define FUNC_RIF3_SYNC_A IPSR(16, 16, 8)
#define FUNC_SSI_SDATA7 IPSR(16, 20, 0)
#define FUNC_HCTS2_N_B IPSR(16, 20, 1)
#define FUNC_MSIOF1_RXD_C IPSR(16, 20, 2)
#define FUNC_TS_SDEN1_A IPSR(16, 20, 5)
#define FUNC_STP_ISEN_1_A IPSR(16, 20, 6)
#define FUNC_RIF1_D0_A IPSR(16, 20, 7)
#define FUNC_RIF3_D0_A IPSR(16, 20, 8)
#define FUNC_TCLK2_A IPSR(16, 20, 0xA)
#define FUNC_SSI_SDATA8 IPSR(16, 24, 0)
#define FUNC_HRTS2_N_B IPSR(16, 24, 1)
#define FUNC_MSIOF1_TXD_C IPSR(16, 24, 2)
#define FUNC_TS_SPSYNC1_A IPSR(16, 24, 5)
#define FUNC_STP_ISSYNC_1_A IPSR(16, 24, 6)
#define FUNC_RIF1_D1_A IPSR(16, 24, 7)
#define FUNC_RIF3_D1_A IPSR(16, 24, 8)
#define FUNC_SSI_SDATA9_A IPSR(16, 28, 0)
#define FUNC_HSCK2_B IPSR(16, 28, 1)
#define FUNC_MSIOF1_SS1_C IPSR(16, 28, 2)
#define FUNC_HSCK1_A IPSR(16, 28, 3)
#define FUNC_SSI_WS1_B IPSR(16, 28, 4)
#define FUNC_SCK1 IPSR(16, 28, 5)
#define FUNC_STP_IVCXO27_1_A IPSR(16, 28, 6)
#define FUNC_SCK5_A IPSR(16, 28, 7)
#define FUNC_AUDIO_CLKA_A IPSR(17, 0, 0)
#define FUNC_AUDIO_CLKB_B IPSR(17, 4, 0)
#define FUNC_SCIF_CLK_A IPSR(17, 4, 1)
#define FUNC_STP_IVCXO27_1_D IPSR(17, 4, 6)
#define FUNC_REMOCON_A IPSR(17, 4, 7)
#define FUNC_TCLK1_A IPSR(17, 4, 0xA)
#define FUNC_USB0_PWEN IPSR(17, 8, 0)
#define FUNC_SIM0_RST_C IPSR(17, 8, 3)
#define FUNC_TS_SCK1_D IPSR(17, 8, 5)
#define FUNC_STP_ISCLK_1_D IPSR(17, 8, 6)
#define FUNC_BPFCLK_B IPSR(17, 8, 7)
#define FUNC_RIF3_CLK_B IPSR(17, 8, 8)
#define FUNC_HSCK2_C IPSR(17, 8, 0xD)
#define FUNC_USB0_OVC IPSR(17, 12, 0)
#define FUNC_SIM0_D_C IPSR(17, 12, 3)
#define FUNC_TS_SDAT1_D IPSR(17, 12, 5)
#define FUNC_STP_ISD_1_D IPSR(17, 12, 6)
#define FUNC_RIF3_SYNC_B IPSR(17, 12, 8)
#define FUNC_HRX2_C IPSR(17, 12, 0xD)
#define FUNC_USB1_PWEN IPSR(17, 16, 0)
#define FUNC_SIM0_CLK_C IPSR(17, 16, 3)
#define FUNC_SSI_SCK1_A IPSR(17, 16, 4)
#define FUNC_TS_SCK0_E IPSR(17, 16, 5)
#define FUNC_STP_ISCLK_0_E IPSR(17, 16, 6)
#define FUNC_FMCLK_B IPSR(17, 16, 7)
#define FUNC_RIF2_CLK_B IPSR(17, 16, 8)
#define FUNC_SPEEDIN_A IPSR(17, 16, 9)
#define FUNC_HTX2_C IPSR(17, 16, 0xD)
#define FUNC_USB1_OVC IPSR(17, 20, 0)
#define FUNC_MSIOF1_SS2_C IPSR(17, 20, 2)
#define FUNC_SSI_WS1_A IPSR(17, 20, 4)
#define FUNC_TS_SDAT0_E IPSR(17, 20, 5)
#define FUNC_STP_ISD_0_E IPSR(17, 20, 6)
#define FUNC_FMIN_B IPSR(17, 20, 7)
#define FUNC_RIF2_SYNC_B IPSR(17, 20, 8)
#define FUNC_REMOCON_B IPSR(17, 20, 0xA)
#define FUNC_HCTS2_N_C IPSR(17, 20, 0xD)
#define FUNC_USB30_PWEN IPSR(17, 24, 0)
#define FUNC_AUDIO_CLKOUT_B IPSR(17, 24, 3)
#define FUNC_SSI_SCK2_B IPSR(17, 24, 4)
#define FUNC_TS_SDEN1_D IPSR(17, 24, 5)
#define FUNC_STP_ISEN_1_D IPSR(17, 24, 6)
#define FUNC_STP_OPWM_0_E IPSR(17, 24, 7)
#define FUNC_RIF3_D0_B IPSR(17, 24, 8)
#define FUNC_TCLK2_B IPSR(17, 24, 0xA)
#define FUNC_TPU0TO0 IPSR(17, 24, 0xB)
#define FUNC_BPFCLK_C IPSR(17, 24, 0xC)
#define FUNC_HRTS2_N_C IPSR(17, 24, 0xD)
#define FUNC_USB30_OVC IPSR(17, 28, 0)
#define FUNC_AUDIO_CLKOUT1_B IPSR(17, 28, 3)
#define FUNC_SSI_WS2_B IPSR(17, 28, 4)
#define FUNC_TS_SPSYNC1_D IPSR(17, 28, 5)
#define FUNC_STP_ISSYNC_1_D IPSR(17, 28, 6)
#define FUNC_STP_IVCXO27_0_E IPSR(17, 28, 7)
#define FUNC_RIF3_D1_B IPSR(17, 28, 8)
#define FUNC_FSO_TOE_N IPSR(17, 28, 0xA)
#define FUNC_TPU0TO1 IPSR(17, 28, 0xB)
#define FUNC_USB2_CH3_PWEN IPSR(18, 0, 0)
#define FUNC_AUDIO_CLKOUT2_B IPSR(18, 0, 3)
#define FUNC_SSI_SCK9_B IPSR(18, 0, 4)
#define FUNC_TS_SDEN0_E IPSR(18, 0, 5)
#define FUNC_STP_ISEN_0_E IPSR(18, 0, 6)
#define FUNC_RIF2_D0_B IPSR(18, 0, 8)
#define FUNC_TPU0TO2 IPSR(18, 0, 0xB)
#define FUNC_FMCLK_C IPSR(18, 0, 0xC)
#define FUNC_FMCLK_D IPSR(18, 0, 0xD)
#define FUNC_USB2_CH3_OVC IPSR(18, 4, 0)
#define FUNC_AUDIO_CLKOUT3_B IPSR(18, 4, 3)
#define FUNC_SSI_WS9_B IPSR(18, 4, 4)
#define FUNC_TS_SPSYNC0_E IPSR(18, 4, 5)
#define FUNC_STP_ISSYNC_0_E IPSR(18, 4, 6)
#define FUNC_RIF2_D1_B IPSR(18, 4, 8)
#define FUNC_TPU0TO3 IPSR(18, 4, 0xB)
#define FUNC_FMIN_C IPSR(18, 4, 0xC)
#define FUNC_FMIN_D IPSR(18, 4, 0xD)
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_RENESAS_PINCTRL_R8A77951_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/renesas/pinctrl-r8a77951.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 16,968 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_NUMAKER_M46X_PINCTRL_H
#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_NUMAKER_M46X_PINCTRL_H
/* Beginning of M460 BSP sys_reg.h pin-mux module copy */
#define NUMAKER_SYS_GPA_MFP0_PA0MFP_Pos (0)
#define NUMAKER_SYS_GPA_MFP0_PA1MFP_Pos (8)
#define NUMAKER_SYS_GPA_MFP0_PA2MFP_Pos (16)
#define NUMAKER_SYS_GPA_MFP0_PA3MFP_Pos (24)
#define NUMAKER_SYS_GPA_MFP1_PA4MFP_Pos (0)
#define NUMAKER_SYS_GPA_MFP1_PA5MFP_Pos (8)
#define NUMAKER_SYS_GPA_MFP1_PA6MFP_Pos (16)
#define NUMAKER_SYS_GPA_MFP1_PA7MFP_Pos (24)
#define NUMAKER_SYS_GPA_MFP2_PA8MFP_Pos (0)
#define NUMAKER_SYS_GPA_MFP2_PA9MFP_Pos (8)
#define NUMAKER_SYS_GPA_MFP2_PA10MFP_Pos (16)
#define NUMAKER_SYS_GPA_MFP2_PA11MFP_Pos (24)
#define NUMAKER_SYS_GPA_MFP3_PA12MFP_Pos (0)
#define NUMAKER_SYS_GPA_MFP3_PA13MFP_Pos (8)
#define NUMAKER_SYS_GPA_MFP3_PA14MFP_Pos (16)
#define NUMAKER_SYS_GPA_MFP3_PA15MFP_Pos (24)
#define NUMAKER_SYS_GPB_MFP0_PB0MFP_Pos (0)
#define NUMAKER_SYS_GPB_MFP0_PB1MFP_Pos (8)
#define NUMAKER_SYS_GPB_MFP0_PB2MFP_Pos (16)
#define NUMAKER_SYS_GPB_MFP0_PB3MFP_Pos (24)
#define NUMAKER_SYS_GPB_MFP1_PB4MFP_Pos (0)
#define NUMAKER_SYS_GPB_MFP1_PB5MFP_Pos (8)
#define NUMAKER_SYS_GPB_MFP1_PB6MFP_Pos (16)
#define NUMAKER_SYS_GPB_MFP1_PB7MFP_Pos (24)
#define NUMAKER_SYS_GPB_MFP2_PB8MFP_Pos (0)
#define NUMAKER_SYS_GPB_MFP2_PB9MFP_Pos (8)
#define NUMAKER_SYS_GPB_MFP2_PB10MFP_Pos (16)
#define NUMAKER_SYS_GPB_MFP2_PB11MFP_Pos (24)
#define NUMAKER_SYS_GPB_MFP3_PB12MFP_Pos (0)
#define NUMAKER_SYS_GPB_MFP3_PB13MFP_Pos (8)
#define NUMAKER_SYS_GPB_MFP3_PB14MFP_Pos (16)
#define NUMAKER_SYS_GPB_MFP3_PB15MFP_Pos (24)
#define NUMAKER_SYS_GPC_MFP0_PC0MFP_Pos (0)
#define NUMAKER_SYS_GPC_MFP0_PC1MFP_Pos (8)
#define NUMAKER_SYS_GPC_MFP0_PC2MFP_Pos (16)
#define NUMAKER_SYS_GPC_MFP0_PC3MFP_Pos (24)
#define NUMAKER_SYS_GPC_MFP1_PC4MFP_Pos (0)
#define NUMAKER_SYS_GPC_MFP1_PC5MFP_Pos (8)
#define NUMAKER_SYS_GPC_MFP1_PC6MFP_Pos (16)
#define NUMAKER_SYS_GPC_MFP1_PC7MFP_Pos (24)
#define NUMAKER_SYS_GPC_MFP2_PC8MFP_Pos (0)
#define NUMAKER_SYS_GPC_MFP2_PC9MFP_Pos (8)
#define NUMAKER_SYS_GPC_MFP2_PC10MFP_Pos (16)
#define NUMAKER_SYS_GPC_MFP2_PC11MFP_Pos (24)
#define NUMAKER_SYS_GPC_MFP3_PC12MFP_Pos (0)
#define NUMAKER_SYS_GPC_MFP3_PC13MFP_Pos (8)
#define NUMAKER_SYS_GPC_MFP3_PC14MFP_Pos (16)
#define NUMAKER_SYS_GPD_MFP0_PD0MFP_Pos (0)
#define NUMAKER_SYS_GPD_MFP0_PD1MFP_Pos (8)
#define NUMAKER_SYS_GPD_MFP0_PD2MFP_Pos (16)
#define NUMAKER_SYS_GPD_MFP0_PD3MFP_Pos (24)
#define NUMAKER_SYS_GPD_MFP1_PD4MFP_Pos (0)
#define NUMAKER_SYS_GPD_MFP1_PD5MFP_Pos (8)
#define NUMAKER_SYS_GPD_MFP1_PD6MFP_Pos (16)
#define NUMAKER_SYS_GPD_MFP1_PD7MFP_Pos (24)
#define NUMAKER_SYS_GPD_MFP2_PD8MFP_Pos (0)
#define NUMAKER_SYS_GPD_MFP2_PD9MFP_Pos (8)
#define NUMAKER_SYS_GPD_MFP2_PD10MFP_Pos (16)
#define NUMAKER_SYS_GPD_MFP2_PD11MFP_Pos (24)
#define NUMAKER_SYS_GPD_MFP3_PD12MFP_Pos (0)
#define NUMAKER_SYS_GPD_MFP3_PD13MFP_Pos (8)
#define NUMAKER_SYS_GPD_MFP3_PD14MFP_Pos (16)
#define NUMAKER_SYS_GPE_MFP0_PE0MFP_Pos (0)
#define NUMAKER_SYS_GPE_MFP0_PE1MFP_Pos (8)
#define NUMAKER_SYS_GPE_MFP0_PE2MFP_Pos (16)
#define NUMAKER_SYS_GPE_MFP0_PE3MFP_Pos (24)
#define NUMAKER_SYS_GPE_MFP1_PE4MFP_Pos (0)
#define NUMAKER_SYS_GPE_MFP1_PE5MFP_Pos (8)
#define NUMAKER_SYS_GPE_MFP1_PE6MFP_Pos (16)
#define NUMAKER_SYS_GPE_MFP1_PE7MFP_Pos (24)
#define NUMAKER_SYS_GPE_MFP2_PE8MFP_Pos (0)
#define NUMAKER_SYS_GPE_MFP2_PE9MFP_Pos (8)
#define NUMAKER_SYS_GPE_MFP2_PE10MFP_Pos (16)
#define NUMAKER_SYS_GPE_MFP2_PE11MFP_Pos (24)
#define NUMAKER_SYS_GPE_MFP3_PE12MFP_Pos (0)
#define NUMAKER_SYS_GPE_MFP3_PE13MFP_Pos (8)
#define NUMAKER_SYS_GPE_MFP3_PE14MFP_Pos (16)
#define NUMAKER_SYS_GPE_MFP3_PE15MFP_Pos (24)
#define NUMAKER_SYS_GPF_MFP0_PF0MFP_Pos (0)
#define NUMAKER_SYS_GPF_MFP0_PF1MFP_Pos (8)
#define NUMAKER_SYS_GPF_MFP0_PF2MFP_Pos (16)
#define NUMAKER_SYS_GPF_MFP0_PF3MFP_Pos (24)
#define NUMAKER_SYS_GPF_MFP1_PF4MFP_Pos (0)
#define NUMAKER_SYS_GPF_MFP1_PF5MFP_Pos (8)
#define NUMAKER_SYS_GPF_MFP1_PF6MFP_Pos (16)
#define NUMAKER_SYS_GPF_MFP1_PF7MFP_Pos (24)
#define NUMAKER_SYS_GPF_MFP2_PF8MFP_Pos (0)
#define NUMAKER_SYS_GPF_MFP2_PF9MFP_Pos (8)
#define NUMAKER_SYS_GPF_MFP2_PF10MFP_Pos (16)
#define NUMAKER_SYS_GPF_MFP2_PF11MFP_Pos (24)
#define NUMAKER_SYS_GPG_MFP0_PG0MFP_Pos (0)
#define NUMAKER_SYS_GPG_MFP0_PG1MFP_Pos (8)
#define NUMAKER_SYS_GPG_MFP0_PG2MFP_Pos (16)
#define NUMAKER_SYS_GPG_MFP0_PG3MFP_Pos (24)
#define NUMAKER_SYS_GPG_MFP1_PG4MFP_Pos (0)
#define NUMAKER_SYS_GPG_MFP1_PG5MFP_Pos (8)
#define NUMAKER_SYS_GPG_MFP1_PG6MFP_Pos (16)
#define NUMAKER_SYS_GPG_MFP1_PG7MFP_Pos (24)
#define NUMAKER_SYS_GPG_MFP2_PG8MFP_Pos (0)
#define NUMAKER_SYS_GPG_MFP2_PG9MFP_Pos (8)
#define NUMAKER_SYS_GPG_MFP2_PG10MFP_Pos (16)
#define NUMAKER_SYS_GPG_MFP2_PG11MFP_Pos (24)
#define NUMAKER_SYS_GPG_MFP3_PG12MFP_Pos (0)
#define NUMAKER_SYS_GPG_MFP3_PG13MFP_Pos (8)
#define NUMAKER_SYS_GPG_MFP3_PG14MFP_Pos (16)
#define NUMAKER_SYS_GPG_MFP3_PG15MFP_Pos (24)
#define NUMAKER_SYS_GPH_MFP0_PH0MFP_Pos (0)
#define NUMAKER_SYS_GPH_MFP0_PH1MFP_Pos (8)
#define NUMAKER_SYS_GPH_MFP0_PH2MFP_Pos (16)
#define NUMAKER_SYS_GPH_MFP0_PH3MFP_Pos (24)
#define NUMAKER_SYS_GPH_MFP1_PH4MFP_Pos (0)
#define NUMAKER_SYS_GPH_MFP1_PH5MFP_Pos (8)
#define NUMAKER_SYS_GPH_MFP1_PH6MFP_Pos (16)
#define NUMAKER_SYS_GPH_MFP1_PH7MFP_Pos (24)
#define NUMAKER_SYS_GPH_MFP2_PH8MFP_Pos (0)
#define NUMAKER_SYS_GPH_MFP2_PH9MFP_Pos (8)
#define NUMAKER_SYS_GPH_MFP2_PH10MFP_Pos (16)
#define NUMAKER_SYS_GPH_MFP2_PH11MFP_Pos (24)
#define NUMAKER_SYS_GPH_MFP3_PH12MFP_Pos (0)
#define NUMAKER_SYS_GPH_MFP3_PH13MFP_Pos (8)
#define NUMAKER_SYS_GPH_MFP3_PH14MFP_Pos (16)
#define NUMAKER_SYS_GPH_MFP3_PH15MFP_Pos (24)
#define NUMAKER_SYS_GPI_MFP1_PI6MFP_Pos (16)
#define NUMAKER_SYS_GPI_MFP1_PI7MFP_Pos (24)
#define NUMAKER_SYS_GPI_MFP2_PI8MFP_Pos (0)
#define NUMAKER_SYS_GPI_MFP2_PI9MFP_Pos (8)
#define NUMAKER_SYS_GPI_MFP2_PI10MFP_Pos (16)
#define NUMAKER_SYS_GPI_MFP2_PI11MFP_Pos (24)
#define NUMAKER_SYS_GPI_MFP3_PI12MFP_Pos (0)
#define NUMAKER_SYS_GPI_MFP3_PI13MFP_Pos (8)
#define NUMAKER_SYS_GPI_MFP3_PI14MFP_Pos (16)
#define NUMAKER_SYS_GPI_MFP3_PI15MFP_Pos (24)
#define NUMAKER_SYS_GPJ_MFP0_PJ0MFP_Pos (0)
#define NUMAKER_SYS_GPJ_MFP0_PJ1MFP_Pos (8)
#define NUMAKER_SYS_GPJ_MFP0_PJ2MFP_Pos (16)
#define NUMAKER_SYS_GPJ_MFP0_PJ3MFP_Pos (24)
#define NUMAKER_SYS_GPJ_MFP1_PJ4MFP_Pos (0)
#define NUMAKER_SYS_GPJ_MFP1_PJ5MFP_Pos (8)
#define NUMAKER_SYS_GPJ_MFP1_PJ6MFP_Pos (16)
#define NUMAKER_SYS_GPJ_MFP1_PJ7MFP_Pos (24)
#define NUMAKER_SYS_GPJ_MFP2_PJ8MFP_Pos (0)
#define NUMAKER_SYS_GPJ_MFP2_PJ9MFP_Pos (8)
#define NUMAKER_SYS_GPJ_MFP2_PJ10MFP_Pos (16)
#define NUMAKER_SYS_GPJ_MFP2_PJ11MFP_Pos (24)
#define NUMAKER_SYS_GPJ_MFP3_PJ12MFP_Pos (0)
#define NUMAKER_SYS_GPJ_MFP3_PJ13MFP_Pos (8)
/* End of M460 BSP sys_reg.h pin-mux module copy */
/* Beginning of M460 BSP sys.h pin-mux module copy */
/*
*your_sha256_hash------------
* Multi-Function constant definitions.
*your_sha256_hash------------
*/
/* PA.0 MFP */
#define NUMAKER_SYS_GPA_MFP0_PA0MFP_GPIO (0x00UL << NUMAKER_SYS_GPA_MFP0_PA0MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA0MFP_SPIM_MOSI (0x02UL << NUMAKER_SYS_GPA_MFP0_PA0MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA0MFP_QSPI0_MOSI0 (0x03UL << NUMAKER_SYS_GPA_MFP0_PA0MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA0MFP_SPI0_MOSI (0x04UL << NUMAKER_SYS_GPA_MFP0_PA0MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA0MFP_SD1_DAT0 (0x05UL << NUMAKER_SYS_GPA_MFP0_PA0MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA0MFP_SC0_CLK (0x06UL << NUMAKER_SYS_GPA_MFP0_PA0MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA0MFP_UART0_RXD (0x07UL << NUMAKER_SYS_GPA_MFP0_PA0MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA0MFP_UART1_nRTS (0x08UL << NUMAKER_SYS_GPA_MFP0_PA0MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA0MFP_I2C2_SDA (0x09UL << NUMAKER_SYS_GPA_MFP0_PA0MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA0MFP_CCAP_DATA6 (0x0aUL << NUMAKER_SYS_GPA_MFP0_PA0MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA0MFP_BPWM0_CH0 (0x0cUL << NUMAKER_SYS_GPA_MFP0_PA0MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA0MFP_EPWM0_CH5 (0x0dUL << NUMAKER_SYS_GPA_MFP0_PA0MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA0MFP_EQEI3_B (0x0eUL << NUMAKER_SYS_GPA_MFP0_PA0MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA0MFP_DAC0_ST (0x0fUL << NUMAKER_SYS_GPA_MFP0_PA0MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA0MFP_PSIO0_CH7 (0x11UL << NUMAKER_SYS_GPA_MFP0_PA0MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA0MFP_BMC19 (0x14UL << NUMAKER_SYS_GPA_MFP0_PA0MFP_Pos)
/* PA.1 MFP */
#define NUMAKER_SYS_GPA_MFP0_PA1MFP_GPIO (0x00UL << NUMAKER_SYS_GPA_MFP0_PA1MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA1MFP_SPIM_MISO (0x02UL << NUMAKER_SYS_GPA_MFP0_PA1MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA1MFP_QSPI0_MISO0 (0x03UL << NUMAKER_SYS_GPA_MFP0_PA1MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA1MFP_SPI0_MISO (0x04UL << NUMAKER_SYS_GPA_MFP0_PA1MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA1MFP_SD1_DAT1 (0x05UL << NUMAKER_SYS_GPA_MFP0_PA1MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA1MFP_SC0_DAT (0x06UL << NUMAKER_SYS_GPA_MFP0_PA1MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA1MFP_UART0_TXD (0x07UL << NUMAKER_SYS_GPA_MFP0_PA1MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA1MFP_UART1_nCTS (0x08UL << NUMAKER_SYS_GPA_MFP0_PA1MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA1MFP_I2C2_SCL (0x09UL << NUMAKER_SYS_GPA_MFP0_PA1MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA1MFP_CCAP_DATA7 (0x0aUL << NUMAKER_SYS_GPA_MFP0_PA1MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA1MFP_BPWM0_CH1 (0x0cUL << NUMAKER_SYS_GPA_MFP0_PA1MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA1MFP_EPWM0_CH4 (0x0dUL << NUMAKER_SYS_GPA_MFP0_PA1MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA1MFP_EQEI3_A (0x0eUL << NUMAKER_SYS_GPA_MFP0_PA1MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA1MFP_DAC1_ST (0x0fUL << NUMAKER_SYS_GPA_MFP0_PA1MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA1MFP_PSIO0_CH6 (0x11UL << NUMAKER_SYS_GPA_MFP0_PA1MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA1MFP_BMC18 (0x14UL << NUMAKER_SYS_GPA_MFP0_PA1MFP_Pos)
/* PA.2 MFP */
#define NUMAKER_SYS_GPA_MFP0_PA2MFP_GPIO (0x00UL << NUMAKER_SYS_GPA_MFP0_PA2MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA2MFP_SPIM_CLK (0x02UL << NUMAKER_SYS_GPA_MFP0_PA2MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA2MFP_QSPI0_CLK (0x03UL << NUMAKER_SYS_GPA_MFP0_PA2MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA2MFP_SPI0_CLK (0x04UL << NUMAKER_SYS_GPA_MFP0_PA2MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA2MFP_SD1_DAT2 (0x05UL << NUMAKER_SYS_GPA_MFP0_PA2MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA2MFP_SC0_RST (0x06UL << NUMAKER_SYS_GPA_MFP0_PA2MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA2MFP_UART4_RXD (0x07UL << NUMAKER_SYS_GPA_MFP0_PA2MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA2MFP_UART1_RXD (0x08UL << NUMAKER_SYS_GPA_MFP0_PA2MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA2MFP_I2C1_SDA (0x09UL << NUMAKER_SYS_GPA_MFP0_PA2MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA2MFP_I2C0_SMBSUS (0x0aUL << NUMAKER_SYS_GPA_MFP0_PA2MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA2MFP_BPWM0_CH2 (0x0cUL << NUMAKER_SYS_GPA_MFP0_PA2MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA2MFP_EPWM0_CH3 (0x0dUL << NUMAKER_SYS_GPA_MFP0_PA2MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA2MFP_EQEI3_INDEX (0x0eUL << NUMAKER_SYS_GPA_MFP0_PA2MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA2MFP_PSIO0_CH5 (0x11UL << NUMAKER_SYS_GPA_MFP0_PA2MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA2MFP_BMC17 (0x14UL << NUMAKER_SYS_GPA_MFP0_PA2MFP_Pos)
/* PA.3 MFP */
#define NUMAKER_SYS_GPA_MFP0_PA3MFP_GPIO (0x00UL << NUMAKER_SYS_GPA_MFP0_PA3MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA3MFP_SPIM_SS (0x02UL << NUMAKER_SYS_GPA_MFP0_PA3MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA3MFP_QSPI0_SS (0x03UL << NUMAKER_SYS_GPA_MFP0_PA3MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA3MFP_SPI0_SS (0x04UL << NUMAKER_SYS_GPA_MFP0_PA3MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA3MFP_SD1_DAT3 (0x05UL << NUMAKER_SYS_GPA_MFP0_PA3MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA3MFP_SC0_PWR (0x06UL << NUMAKER_SYS_GPA_MFP0_PA3MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA3MFP_UART4_TXD (0x07UL << NUMAKER_SYS_GPA_MFP0_PA3MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA3MFP_UART1_TXD (0x08UL << NUMAKER_SYS_GPA_MFP0_PA3MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA3MFP_I2C1_SCL (0x09UL << NUMAKER_SYS_GPA_MFP0_PA3MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA3MFP_I2C0_SMBAL (0x0aUL << NUMAKER_SYS_GPA_MFP0_PA3MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA3MFP_BPWM0_CH3 (0x0cUL << NUMAKER_SYS_GPA_MFP0_PA3MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA3MFP_EPWM0_CH2 (0x0dUL << NUMAKER_SYS_GPA_MFP0_PA3MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA3MFP_EQEI0_B (0x0eUL << NUMAKER_SYS_GPA_MFP0_PA3MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA3MFP_EPWM1_BRAKE1 (0x0fUL << NUMAKER_SYS_GPA_MFP0_PA3MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA3MFP_PSIO0_CH4 (0x11UL << NUMAKER_SYS_GPA_MFP0_PA3MFP_Pos)
#define NUMAKER_SYS_GPA_MFP0_PA3MFP_BMC16 (0x14UL << NUMAKER_SYS_GPA_MFP0_PA3MFP_Pos)
/* PA.4 MFP */
#define NUMAKER_SYS_GPA_MFP1_PA4MFP_GPIO (0x00UL << NUMAKER_SYS_GPA_MFP1_PA4MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA4MFP_SPIM_D3 (0x02UL << NUMAKER_SYS_GPA_MFP1_PA4MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA4MFP_QSPI0_MOSI1 (0x03UL << NUMAKER_SYS_GPA_MFP1_PA4MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA4MFP_SPI0_I2SMCLK (0x04UL << NUMAKER_SYS_GPA_MFP1_PA4MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA4MFP_SD1_CLK (0x05UL << NUMAKER_SYS_GPA_MFP1_PA4MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA4MFP_SC0_nCD (0x06UL << NUMAKER_SYS_GPA_MFP1_PA4MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA4MFP_UART0_nRTS (0x07UL << NUMAKER_SYS_GPA_MFP1_PA4MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA4MFP_UART5_RXD (0x08UL << NUMAKER_SYS_GPA_MFP1_PA4MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA4MFP_I2C0_SDA (0x09UL << NUMAKER_SYS_GPA_MFP1_PA4MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA4MFP_CAN0_RXD (0x0aUL << NUMAKER_SYS_GPA_MFP1_PA4MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA4MFP_UART0_RXD (0x0bUL << NUMAKER_SYS_GPA_MFP1_PA4MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA4MFP_BPWM0_CH4 (0x0cUL << NUMAKER_SYS_GPA_MFP1_PA4MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA4MFP_EPWM0_CH1 (0x0dUL << NUMAKER_SYS_GPA_MFP1_PA4MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA4MFP_EQEI0_A (0x0eUL << NUMAKER_SYS_GPA_MFP1_PA4MFP_Pos)
/* PA.5 MFP */
#define NUMAKER_SYS_GPA_MFP1_PA5MFP_GPIO (0x00UL << NUMAKER_SYS_GPA_MFP1_PA5MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA5MFP_SPIM_D2 (0x02UL << NUMAKER_SYS_GPA_MFP1_PA5MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA5MFP_QSPI0_MISO1 (0x03UL << NUMAKER_SYS_GPA_MFP1_PA5MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA5MFP_SPI1_I2SMCLK (0x04UL << NUMAKER_SYS_GPA_MFP1_PA5MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA5MFP_SD1_CMD (0x05UL << NUMAKER_SYS_GPA_MFP1_PA5MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA5MFP_SC2_nCD (0x06UL << NUMAKER_SYS_GPA_MFP1_PA5MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA5MFP_UART0_nCTS (0x07UL << NUMAKER_SYS_GPA_MFP1_PA5MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA5MFP_UART5_TXD (0x08UL << NUMAKER_SYS_GPA_MFP1_PA5MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA5MFP_I2C0_SCL (0x09UL << NUMAKER_SYS_GPA_MFP1_PA5MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA5MFP_CAN0_TXD (0x0aUL << NUMAKER_SYS_GPA_MFP1_PA5MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA5MFP_UART0_TXD (0x0bUL << NUMAKER_SYS_GPA_MFP1_PA5MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA5MFP_BPWM0_CH5 (0x0cUL << NUMAKER_SYS_GPA_MFP1_PA5MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA5MFP_EPWM0_CH0 (0x0dUL << NUMAKER_SYS_GPA_MFP1_PA5MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA5MFP_EQEI0_INDEX (0x0eUL << NUMAKER_SYS_GPA_MFP1_PA5MFP_Pos)
/* PA.6 MFP */
#define NUMAKER_SYS_GPA_MFP1_PA6MFP_GPIO (0x00UL << NUMAKER_SYS_GPA_MFP1_PA6MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA6MFP_EBI_AD6 (0x02UL << NUMAKER_SYS_GPA_MFP1_PA6MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA6MFP_EMAC0_RMII_RXERR (0x03UL << NUMAKER_SYS_GPA_MFP1_PA6MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA6MFP_SPI1_SS (0x04UL << NUMAKER_SYS_GPA_MFP1_PA6MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA6MFP_SD1_nCD (0x05UL << NUMAKER_SYS_GPA_MFP1_PA6MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA6MFP_SC2_CLK (0x06UL << NUMAKER_SYS_GPA_MFP1_PA6MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA6MFP_UART0_RXD (0x07UL << NUMAKER_SYS_GPA_MFP1_PA6MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA6MFP_I2C1_SDA (0x08UL << NUMAKER_SYS_GPA_MFP1_PA6MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA6MFP_QSPI1_MOSI1 (0x09UL << NUMAKER_SYS_GPA_MFP1_PA6MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA6MFP_EPWM1_CH5 (0x0bUL << NUMAKER_SYS_GPA_MFP1_PA6MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA6MFP_BPWM1_CH3 (0x0cUL << NUMAKER_SYS_GPA_MFP1_PA6MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA6MFP_ACMP1_WLAT (0x0dUL << NUMAKER_SYS_GPA_MFP1_PA6MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA6MFP_TM3 (0x0eUL << NUMAKER_SYS_GPA_MFP1_PA6MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA6MFP_INT0 (0x0fUL << NUMAKER_SYS_GPA_MFP1_PA6MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA6MFP_SPI5_CLK (0x11UL << NUMAKER_SYS_GPA_MFP1_PA6MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA6MFP_KPI_COL0 (0x12UL << NUMAKER_SYS_GPA_MFP1_PA6MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA6MFP_SPI6_CLK (0x13UL << NUMAKER_SYS_GPA_MFP1_PA6MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA6MFP_BMC15 (0x14UL << NUMAKER_SYS_GPA_MFP1_PA6MFP_Pos)
/* PA.7 MFP */
#define NUMAKER_SYS_GPA_MFP1_PA7MFP_GPIO (0x00UL << NUMAKER_SYS_GPA_MFP1_PA7MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA7MFP_EBI_AD7 (0x02UL << NUMAKER_SYS_GPA_MFP1_PA7MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA7MFP_EMAC0_RMII_CRSDV (0x03UL << NUMAKER_SYS_GPA_MFP1_PA7MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA7MFP_SPI1_CLK (0x04UL << NUMAKER_SYS_GPA_MFP1_PA7MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA7MFP_SC2_DAT (0x06UL << NUMAKER_SYS_GPA_MFP1_PA7MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA7MFP_UART0_TXD (0x07UL << NUMAKER_SYS_GPA_MFP1_PA7MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA7MFP_I2C1_SCL (0x08UL << NUMAKER_SYS_GPA_MFP1_PA7MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA7MFP_QSPI1_MISO1 (0x09UL << NUMAKER_SYS_GPA_MFP1_PA7MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA7MFP_EPWM1_CH4 (0x0bUL << NUMAKER_SYS_GPA_MFP1_PA7MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA7MFP_BPWM1_CH2 (0x0cUL << NUMAKER_SYS_GPA_MFP1_PA7MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA7MFP_ACMP0_WLAT (0x0dUL << NUMAKER_SYS_GPA_MFP1_PA7MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA7MFP_TM2 (0x0eUL << NUMAKER_SYS_GPA_MFP1_PA7MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA7MFP_INT1 (0x0fUL << NUMAKER_SYS_GPA_MFP1_PA7MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA7MFP_SPI5_SS (0x11UL << NUMAKER_SYS_GPA_MFP1_PA7MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA7MFP_KPI_COL1 (0x12UL << NUMAKER_SYS_GPA_MFP1_PA7MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA7MFP_SPI6_SS (0x13UL << NUMAKER_SYS_GPA_MFP1_PA7MFP_Pos)
#define NUMAKER_SYS_GPA_MFP1_PA7MFP_BMC14 (0x14UL << NUMAKER_SYS_GPA_MFP1_PA7MFP_Pos)
/* PA.8 MFP */
#define NUMAKER_SYS_GPA_MFP2_PA8MFP_GPIO (0x00UL << NUMAKER_SYS_GPA_MFP2_PA8MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA8MFP_EADC1_CH4 (0x01UL << NUMAKER_SYS_GPA_MFP2_PA8MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA8MFP_EADC2_CH4 (0x01UL << NUMAKER_SYS_GPA_MFP2_PA8MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA8MFP_EBI_ALE (0x02UL << NUMAKER_SYS_GPA_MFP2_PA8MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA8MFP_SC2_CLK (0x03UL << NUMAKER_SYS_GPA_MFP2_PA8MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA8MFP_SPI2_MOSI (0x04UL << NUMAKER_SYS_GPA_MFP2_PA8MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA8MFP_SD1_DAT0 (0x05UL << NUMAKER_SYS_GPA_MFP2_PA8MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA8MFP_USCI0_CTL1 (0x06UL << NUMAKER_SYS_GPA_MFP2_PA8MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA8MFP_UART1_RXD (0x07UL << NUMAKER_SYS_GPA_MFP2_PA8MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA8MFP_UART7_RXD (0x08UL << NUMAKER_SYS_GPA_MFP2_PA8MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA8MFP_BPWM0_CH3 (0x09UL << NUMAKER_SYS_GPA_MFP2_PA8MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA8MFP_EQEI1_B (0x0aUL << NUMAKER_SYS_GPA_MFP2_PA8MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA8MFP_ECAP0_IC2 (0x0bUL << NUMAKER_SYS_GPA_MFP2_PA8MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA8MFP_I2S1_DO (0x0cUL << NUMAKER_SYS_GPA_MFP2_PA8MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA8MFP_TM3_EXT (0x0dUL << NUMAKER_SYS_GPA_MFP2_PA8MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA8MFP_INT4 (0x0fUL << NUMAKER_SYS_GPA_MFP2_PA8MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA8MFP_BMC9 (0x14UL << NUMAKER_SYS_GPA_MFP2_PA8MFP_Pos)
/* PA.9 MFP */
#define NUMAKER_SYS_GPA_MFP2_PA9MFP_GPIO (0x00UL << NUMAKER_SYS_GPA_MFP2_PA9MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA9MFP_EADC1_CH5 (0x01UL << NUMAKER_SYS_GPA_MFP2_PA9MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA9MFP_EADC2_CH5 (0x01UL << NUMAKER_SYS_GPA_MFP2_PA9MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA9MFP_EBI_MCLK (0x02UL << NUMAKER_SYS_GPA_MFP2_PA9MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA9MFP_SC2_DAT (0x03UL << NUMAKER_SYS_GPA_MFP2_PA9MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA9MFP_SPI2_MISO (0x04UL << NUMAKER_SYS_GPA_MFP2_PA9MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA9MFP_SD1_DAT1 (0x05UL << NUMAKER_SYS_GPA_MFP2_PA9MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA9MFP_USCI0_DAT1 (0x06UL << NUMAKER_SYS_GPA_MFP2_PA9MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA9MFP_UART1_TXD (0x07UL << NUMAKER_SYS_GPA_MFP2_PA9MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA9MFP_UART7_TXD (0x08UL << NUMAKER_SYS_GPA_MFP2_PA9MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA9MFP_BPWM0_CH2 (0x09UL << NUMAKER_SYS_GPA_MFP2_PA9MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA9MFP_EQEI1_A (0x0aUL << NUMAKER_SYS_GPA_MFP2_PA9MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA9MFP_ECAP0_IC1 (0x0bUL << NUMAKER_SYS_GPA_MFP2_PA9MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA9MFP_I2S1_DI (0x0cUL << NUMAKER_SYS_GPA_MFP2_PA9MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA9MFP_TM2_EXT (0x0dUL << NUMAKER_SYS_GPA_MFP2_PA9MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA9MFP_SWDH_DAT (0x0fUL << NUMAKER_SYS_GPA_MFP2_PA9MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA9MFP_BMC8 (0x14UL << NUMAKER_SYS_GPA_MFP2_PA9MFP_Pos)
/* PA.10 MFP */
#define NUMAKER_SYS_GPA_MFP2_PA10MFP_GPIO (0x00UL << NUMAKER_SYS_GPA_MFP2_PA10MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA10MFP_EADC1_CH6 (0x01UL << NUMAKER_SYS_GPA_MFP2_PA10MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA10MFP_EADC2_CH6 (0x01UL << NUMAKER_SYS_GPA_MFP2_PA10MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA10MFP_ACMP1_P0 (0x01UL << NUMAKER_SYS_GPA_MFP2_PA10MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA10MFP_EBI_nWR (0x02UL << NUMAKER_SYS_GPA_MFP2_PA10MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA10MFP_SC2_RST (0x03UL << NUMAKER_SYS_GPA_MFP2_PA10MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA10MFP_SPI2_CLK (0x04UL << NUMAKER_SYS_GPA_MFP2_PA10MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA10MFP_SD1_DAT2 (0x05UL << NUMAKER_SYS_GPA_MFP2_PA10MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA10MFP_USCI0_DAT0 (0x06UL << NUMAKER_SYS_GPA_MFP2_PA10MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA10MFP_I2C2_SDA (0x07UL << NUMAKER_SYS_GPA_MFP2_PA10MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA10MFP_UART6_RXD (0x08UL << NUMAKER_SYS_GPA_MFP2_PA10MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA10MFP_BPWM0_CH1 (0x09UL << NUMAKER_SYS_GPA_MFP2_PA10MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA10MFP_EQEI1_INDEX (0x0aUL << NUMAKER_SYS_GPA_MFP2_PA10MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA10MFP_ECAP0_IC0 (0x0bUL << NUMAKER_SYS_GPA_MFP2_PA10MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA10MFP_I2S1_MCLK (0x0cUL << NUMAKER_SYS_GPA_MFP2_PA10MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA10MFP_TM1_EXT (0x0dUL << NUMAKER_SYS_GPA_MFP2_PA10MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA10MFP_DAC0_ST (0x0eUL << NUMAKER_SYS_GPA_MFP2_PA10MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA10MFP_SWDH_CLK (0x0fUL << NUMAKER_SYS_GPA_MFP2_PA10MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA10MFP_KPI_ROW5 (0x12UL << NUMAKER_SYS_GPA_MFP2_PA10MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA10MFP_BMC7 (0x14UL << NUMAKER_SYS_GPA_MFP2_PA10MFP_Pos)
/* PA.11 MFP */
#define NUMAKER_SYS_GPA_MFP2_PA11MFP_GPIO (0x00UL << NUMAKER_SYS_GPA_MFP2_PA11MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA11MFP_EADC1_CH7 (0x01UL << NUMAKER_SYS_GPA_MFP2_PA11MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA11MFP_EADC2_CH7 (0x01UL << NUMAKER_SYS_GPA_MFP2_PA11MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA11MFP_ACMP0_P0 (0x01UL << NUMAKER_SYS_GPA_MFP2_PA11MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA11MFP_EBI_nRD (0x02UL << NUMAKER_SYS_GPA_MFP2_PA11MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA11MFP_SC2_PWR (0x03UL << NUMAKER_SYS_GPA_MFP2_PA11MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA11MFP_SPI2_SS (0x04UL << NUMAKER_SYS_GPA_MFP2_PA11MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA11MFP_SD1_DAT3 (0x05UL << NUMAKER_SYS_GPA_MFP2_PA11MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA11MFP_USCI0_CLK (0x06UL << NUMAKER_SYS_GPA_MFP2_PA11MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA11MFP_I2C2_SCL (0x07UL << NUMAKER_SYS_GPA_MFP2_PA11MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA11MFP_UART6_TXD (0x08UL << NUMAKER_SYS_GPA_MFP2_PA11MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA11MFP_BPWM0_CH0 (0x09UL << NUMAKER_SYS_GPA_MFP2_PA11MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA11MFP_EPWM0_SYNC_OUT (0x0aUL << NUMAKER_SYS_GPA_MFP2_PA11MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA11MFP_I2S1_BCLK (0x0cUL << NUMAKER_SYS_GPA_MFP2_PA11MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA11MFP_TM0_EXT (0x0dUL << NUMAKER_SYS_GPA_MFP2_PA11MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA11MFP_DAC1_ST (0x0eUL << NUMAKER_SYS_GPA_MFP2_PA11MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA11MFP_KPI_ROW4 (0x12UL << NUMAKER_SYS_GPA_MFP2_PA11MFP_Pos)
#define NUMAKER_SYS_GPA_MFP2_PA11MFP_BMC6 (0x14UL << NUMAKER_SYS_GPA_MFP2_PA11MFP_Pos)
/* PA.12 MFP */
#define NUMAKER_SYS_GPA_MFP3_PA12MFP_GPIO (0x00UL << NUMAKER_SYS_GPA_MFP3_PA12MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA12MFP_I2S0_BCLK (0x02UL << NUMAKER_SYS_GPA_MFP3_PA12MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA12MFP_UART4_TXD (0x03UL << NUMAKER_SYS_GPA_MFP3_PA12MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA12MFP_I2C1_SCL (0x04UL << NUMAKER_SYS_GPA_MFP3_PA12MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA12MFP_SPI2_SS (0x05UL << NUMAKER_SYS_GPA_MFP3_PA12MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA12MFP_CAN0_TXD (0x06UL << NUMAKER_SYS_GPA_MFP3_PA12MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA12MFP_SC2_PWR (0x07UL << NUMAKER_SYS_GPA_MFP3_PA12MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA12MFP_SD1_nCD (0x08UL << NUMAKER_SYS_GPA_MFP3_PA12MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA12MFP_SPI0_SS (0x09UL << NUMAKER_SYS_GPA_MFP3_PA12MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA12MFP_QSPI1_MISO0 (0x0aUL << NUMAKER_SYS_GPA_MFP3_PA12MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA12MFP_BPWM1_CH2 (0x0bUL << NUMAKER_SYS_GPA_MFP3_PA12MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA12MFP_EQEI1_INDEX (0x0cUL << NUMAKER_SYS_GPA_MFP3_PA12MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA12MFP_ECAP3_IC0 (0x0dUL << NUMAKER_SYS_GPA_MFP3_PA12MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA12MFP_USB_VBUS (0x0eUL << NUMAKER_SYS_GPA_MFP3_PA12MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA12MFP_PSIO0_CH4 (0x11UL << NUMAKER_SYS_GPA_MFP3_PA12MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA12MFP_SPI10_SS (0x13UL << NUMAKER_SYS_GPA_MFP3_PA12MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA12MFP_BMC12 (0x14UL << NUMAKER_SYS_GPA_MFP3_PA12MFP_Pos)
/* PA.13 MFP */
#define NUMAKER_SYS_GPA_MFP3_PA13MFP_GPIO (0x00UL << NUMAKER_SYS_GPA_MFP3_PA13MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA13MFP_I2S0_MCLK (0x02UL << NUMAKER_SYS_GPA_MFP3_PA13MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA13MFP_UART4_RXD (0x03UL << NUMAKER_SYS_GPA_MFP3_PA13MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA13MFP_I2C1_SDA (0x04UL << NUMAKER_SYS_GPA_MFP3_PA13MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA13MFP_SPI2_CLK (0x05UL << NUMAKER_SYS_GPA_MFP3_PA13MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA13MFP_CAN0_RXD (0x06UL << NUMAKER_SYS_GPA_MFP3_PA13MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA13MFP_SC2_RST (0x07UL << NUMAKER_SYS_GPA_MFP3_PA13MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA13MFP_SPI0_CLK (0x09UL << NUMAKER_SYS_GPA_MFP3_PA13MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA13MFP_QSPI1_MOSI0 (0x0aUL << NUMAKER_SYS_GPA_MFP3_PA13MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA13MFP_BPWM1_CH3 (0x0bUL << NUMAKER_SYS_GPA_MFP3_PA13MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA13MFP_EQEI1_A (0x0cUL << NUMAKER_SYS_GPA_MFP3_PA13MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA13MFP_ECAP3_IC1 (0x0dUL << NUMAKER_SYS_GPA_MFP3_PA13MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA13MFP_USB_D_N (0x0eUL << NUMAKER_SYS_GPA_MFP3_PA13MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA13MFP_PSIO0_CH5 (0x11UL << NUMAKER_SYS_GPA_MFP3_PA13MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA13MFP_SPI10_CLK (0x13UL << NUMAKER_SYS_GPA_MFP3_PA13MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA13MFP_BMC13 (0x14UL << NUMAKER_SYS_GPA_MFP3_PA13MFP_Pos)
/* PA.14 MFP */
#define NUMAKER_SYS_GPA_MFP3_PA14MFP_GPIO (0x00UL << NUMAKER_SYS_GPA_MFP3_PA14MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA14MFP_I2S0_DI (0x02UL << NUMAKER_SYS_GPA_MFP3_PA14MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA14MFP_UART0_TXD (0x03UL << NUMAKER_SYS_GPA_MFP3_PA14MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA14MFP_EBI_AD5 (0x04UL << NUMAKER_SYS_GPA_MFP3_PA14MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA14MFP_SPI2_MISO (0x05UL << NUMAKER_SYS_GPA_MFP3_PA14MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA14MFP_I2C2_SCL (0x06UL << NUMAKER_SYS_GPA_MFP3_PA14MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA14MFP_SC2_DAT (0x07UL << NUMAKER_SYS_GPA_MFP3_PA14MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA14MFP_SPI0_MISO (0x09UL << NUMAKER_SYS_GPA_MFP3_PA14MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA14MFP_BPWM1_CH4 (0x0bUL << NUMAKER_SYS_GPA_MFP3_PA14MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA14MFP_EQEI1_B (0x0cUL << NUMAKER_SYS_GPA_MFP3_PA14MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA14MFP_ECAP3_IC2 (0x0dUL << NUMAKER_SYS_GPA_MFP3_PA14MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA14MFP_USB_D_P (0x0eUL << NUMAKER_SYS_GPA_MFP3_PA14MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA14MFP_I2C0_SCL (0x10UL << NUMAKER_SYS_GPA_MFP3_PA14MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA14MFP_PSIO0_CH6 (0x11UL << NUMAKER_SYS_GPA_MFP3_PA14MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA14MFP_SPI10_MISO (0x13UL << NUMAKER_SYS_GPA_MFP3_PA14MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA14MFP_BMC14 (0x14UL << NUMAKER_SYS_GPA_MFP3_PA14MFP_Pos)
/* PA.15 MFP */
#define NUMAKER_SYS_GPA_MFP3_PA15MFP_GPIO (0x00UL << NUMAKER_SYS_GPA_MFP3_PA15MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA15MFP_I2S0_DO (0x02UL << NUMAKER_SYS_GPA_MFP3_PA15MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA15MFP_UART0_RXD (0x03UL << NUMAKER_SYS_GPA_MFP3_PA15MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA15MFP_SPIM_MOSI (0x04UL << NUMAKER_SYS_GPA_MFP3_PA15MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA15MFP_SPI2_MOSI (0x05UL << NUMAKER_SYS_GPA_MFP3_PA15MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA15MFP_I2C2_SDA (0x06UL << NUMAKER_SYS_GPA_MFP3_PA15MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA15MFP_SC2_CLK (0x07UL << NUMAKER_SYS_GPA_MFP3_PA15MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA15MFP_SPI0_MOSI (0x09UL << NUMAKER_SYS_GPA_MFP3_PA15MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA15MFP_BPWM1_CH5 (0x0bUL << NUMAKER_SYS_GPA_MFP3_PA15MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA15MFP_EPWM0_SYNC_IN (0x0cUL << NUMAKER_SYS_GPA_MFP3_PA15MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA15MFP_EQEI3_INDEX (0x0dUL << NUMAKER_SYS_GPA_MFP3_PA15MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA15MFP_USB_OTG_ID (0x0eUL << NUMAKER_SYS_GPA_MFP3_PA15MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA15MFP_I2C0_SDA (0x10UL << NUMAKER_SYS_GPA_MFP3_PA15MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA15MFP_PSIO0_CH7 (0x11UL << NUMAKER_SYS_GPA_MFP3_PA15MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA15MFP_SPI10_MOSI (0x13UL << NUMAKER_SYS_GPA_MFP3_PA15MFP_Pos)
#define NUMAKER_SYS_GPA_MFP3_PA15MFP_BMC15 (0x14UL << NUMAKER_SYS_GPA_MFP3_PA15MFP_Pos)
/* PB.0 MFP */
#define NUMAKER_SYS_GPB_MFP0_PB0MFP_GPIO (0x00UL << NUMAKER_SYS_GPB_MFP0_PB0MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB0MFP_EADC0_CH0 (0x01UL << NUMAKER_SYS_GPB_MFP0_PB0MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB0MFP_EADC1_CH8 (0x01UL << NUMAKER_SYS_GPB_MFP0_PB0MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB0MFP_EADC2_CH8 (0x01UL << NUMAKER_SYS_GPB_MFP0_PB0MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB0MFP_ACMP3_N (0x01UL << NUMAKER_SYS_GPB_MFP0_PB0MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB0MFP_EBI_ADR9 (0x02UL << NUMAKER_SYS_GPB_MFP0_PB0MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB0MFP_SD0_CMD (0x03UL << NUMAKER_SYS_GPB_MFP0_PB0MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB0MFP_SPI2_I2SMCLK (0x04UL << NUMAKER_SYS_GPB_MFP0_PB0MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB0MFP_USCI0_CTL0 (0x06UL << NUMAKER_SYS_GPB_MFP0_PB0MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB0MFP_UART2_RXD (0x07UL << NUMAKER_SYS_GPB_MFP0_PB0MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB0MFP_SPI0_I2SMCLK (0x08UL << NUMAKER_SYS_GPB_MFP0_PB0MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB0MFP_I2C1_SDA (0x09UL << NUMAKER_SYS_GPB_MFP0_PB0MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB0MFP_I2S1_LRCK (0x0aUL << NUMAKER_SYS_GPB_MFP0_PB0MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB0MFP_EPWM0_CH5 (0x0bUL << NUMAKER_SYS_GPB_MFP0_PB0MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB0MFP_EPWM1_CH5 (0x0cUL << NUMAKER_SYS_GPB_MFP0_PB0MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB0MFP_EPWM0_BRAKE1 (0x0dUL << NUMAKER_SYS_GPB_MFP0_PB0MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB0MFP_ACMP3_O (0x0eUL << NUMAKER_SYS_GPB_MFP0_PB0MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB0MFP_QSPI0_MOSI1 (0x0fUL << NUMAKER_SYS_GPB_MFP0_PB0MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB0MFP_KPI_ROW3 (0x12UL << NUMAKER_SYS_GPB_MFP0_PB0MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB0MFP_SPI4_MOSI (0x13UL << NUMAKER_SYS_GPB_MFP0_PB0MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB0MFP_BMC5 (0x14UL << NUMAKER_SYS_GPB_MFP0_PB0MFP_Pos)
/* PB.1 MFP */
#define NUMAKER_SYS_GPB_MFP0_PB1MFP_GPIO (0x00UL << NUMAKER_SYS_GPB_MFP0_PB1MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB1MFP_EADC0_CH1 (0x01UL << NUMAKER_SYS_GPB_MFP0_PB1MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB1MFP_EADC1_CH9 (0x01UL << NUMAKER_SYS_GPB_MFP0_PB1MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB1MFP_EADC2_CH9 (0x01UL << NUMAKER_SYS_GPB_MFP0_PB1MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB1MFP_ACMP3_P0 (0x01UL << NUMAKER_SYS_GPB_MFP0_PB1MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB1MFP_EBI_ADR8 (0x02UL << NUMAKER_SYS_GPB_MFP0_PB1MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB1MFP_SD0_CLK (0x03UL << NUMAKER_SYS_GPB_MFP0_PB1MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB1MFP_EMAC0_RMII_RXERR (0x04UL << NUMAKER_SYS_GPB_MFP0_PB1MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB1MFP_SPI1_I2SMCLK (0x05UL << NUMAKER_SYS_GPB_MFP0_PB1MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB1MFP_SPI3_I2SMCLK (0x06UL << NUMAKER_SYS_GPB_MFP0_PB1MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB1MFP_UART2_TXD (0x07UL << NUMAKER_SYS_GPB_MFP0_PB1MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB1MFP_I2C1_SCL (0x09UL << NUMAKER_SYS_GPB_MFP0_PB1MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB1MFP_I2S0_LRCK (0x0aUL << NUMAKER_SYS_GPB_MFP0_PB1MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB1MFP_EPWM0_CH4 (0x0bUL << NUMAKER_SYS_GPB_MFP0_PB1MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB1MFP_EPWM1_CH4 (0x0cUL << NUMAKER_SYS_GPB_MFP0_PB1MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB1MFP_EPWM0_BRAKE0 (0x0dUL << NUMAKER_SYS_GPB_MFP0_PB1MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB1MFP_ACMP2_O (0x0eUL << NUMAKER_SYS_GPB_MFP0_PB1MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB1MFP_QSPI0_MISO1 (0x0fUL << NUMAKER_SYS_GPB_MFP0_PB1MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB1MFP_KPI_ROW2 (0x12UL << NUMAKER_SYS_GPB_MFP0_PB1MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB1MFP_SPI4_MISO (0x13UL << NUMAKER_SYS_GPB_MFP0_PB1MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB1MFP_BMC4 (0x14UL << NUMAKER_SYS_GPB_MFP0_PB1MFP_Pos)
/* PB.2 MFP */
#define NUMAKER_SYS_GPB_MFP0_PB2MFP_GPIO (0x00UL << NUMAKER_SYS_GPB_MFP0_PB2MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB2MFP_EADC0_CH2 (0x01UL << NUMAKER_SYS_GPB_MFP0_PB2MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB2MFP_EADC1_CH10 (0x01UL << NUMAKER_SYS_GPB_MFP0_PB2MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB2MFP_ACMP0_P1 (0x01UL << NUMAKER_SYS_GPB_MFP0_PB2MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB2MFP_EBI_ADR3 (0x02UL << NUMAKER_SYS_GPB_MFP0_PB2MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB2MFP_SD0_DAT0 (0x03UL << NUMAKER_SYS_GPB_MFP0_PB2MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB2MFP_EMAC0_RMII_CRSDV (0x04UL << NUMAKER_SYS_GPB_MFP0_PB2MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB2MFP_SPI1_SS (0x05UL << NUMAKER_SYS_GPB_MFP0_PB2MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB2MFP_UART1_RXD (0x06UL << NUMAKER_SYS_GPB_MFP0_PB2MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB2MFP_UART5_nCTS (0x07UL << NUMAKER_SYS_GPB_MFP0_PB2MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB2MFP_SC0_PWR (0x09UL << NUMAKER_SYS_GPB_MFP0_PB2MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB2MFP_I2S0_DO (0x0aUL << NUMAKER_SYS_GPB_MFP0_PB2MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB2MFP_EPWM0_CH3 (0x0bUL << NUMAKER_SYS_GPB_MFP0_PB2MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB2MFP_I2C1_SDA (0x0cUL << NUMAKER_SYS_GPB_MFP0_PB2MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB2MFP_TM3 (0x0eUL << NUMAKER_SYS_GPB_MFP0_PB2MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB2MFP_INT3 (0x0fUL << NUMAKER_SYS_GPB_MFP0_PB2MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB2MFP_PSIO0_CH7 (0x11UL << NUMAKER_SYS_GPB_MFP0_PB2MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB2MFP_KPI_ROW1 (0x12UL << NUMAKER_SYS_GPB_MFP0_PB2MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB2MFP_SPI4_CLK (0x13UL << NUMAKER_SYS_GPB_MFP0_PB2MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB2MFP_BMC3 (0x14UL << NUMAKER_SYS_GPB_MFP0_PB2MFP_Pos)
/* PB.3 MFP */
#define NUMAKER_SYS_GPB_MFP0_PB3MFP_GPIO (0x00UL << NUMAKER_SYS_GPB_MFP0_PB3MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB3MFP_EADC0_CH3 (0x01UL << NUMAKER_SYS_GPB_MFP0_PB3MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB3MFP_EADC1_CH11 (0x01UL << NUMAKER_SYS_GPB_MFP0_PB3MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB3MFP_ACMP0_N (0x01UL << NUMAKER_SYS_GPB_MFP0_PB3MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB3MFP_EBI_ADR2 (0x02UL << NUMAKER_SYS_GPB_MFP0_PB3MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB3MFP_SD0_DAT1 (0x03UL << NUMAKER_SYS_GPB_MFP0_PB3MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB3MFP_EMAC0_RMII_RXD1 (0x04UL << NUMAKER_SYS_GPB_MFP0_PB3MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB3MFP_SPI1_CLK (0x05UL << NUMAKER_SYS_GPB_MFP0_PB3MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB3MFP_UART1_TXD (0x06UL << NUMAKER_SYS_GPB_MFP0_PB3MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB3MFP_UART5_nRTS (0x07UL << NUMAKER_SYS_GPB_MFP0_PB3MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB3MFP_SC0_RST (0x09UL << NUMAKER_SYS_GPB_MFP0_PB3MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB3MFP_I2S0_DI (0x0aUL << NUMAKER_SYS_GPB_MFP0_PB3MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB3MFP_EPWM0_CH2 (0x0bUL << NUMAKER_SYS_GPB_MFP0_PB3MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB3MFP_I2C1_SCL (0x0cUL << NUMAKER_SYS_GPB_MFP0_PB3MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB3MFP_TM2 (0x0eUL << NUMAKER_SYS_GPB_MFP0_PB3MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB3MFP_INT2 (0x0fUL << NUMAKER_SYS_GPB_MFP0_PB3MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB3MFP_PSIO0_CH6 (0x11UL << NUMAKER_SYS_GPB_MFP0_PB3MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB3MFP_KPI_ROW0 (0x12UL << NUMAKER_SYS_GPB_MFP0_PB3MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB3MFP_SPI4_SS (0x13UL << NUMAKER_SYS_GPB_MFP0_PB3MFP_Pos)
#define NUMAKER_SYS_GPB_MFP0_PB3MFP_BMC2 (0x14UL << NUMAKER_SYS_GPB_MFP0_PB3MFP_Pos)
/* PB.4 MFP */
#define NUMAKER_SYS_GPB_MFP1_PB4MFP_GPIO (0x00UL << NUMAKER_SYS_GPB_MFP1_PB4MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB4MFP_EADC0_CH4 (0x01UL << NUMAKER_SYS_GPB_MFP1_PB4MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB4MFP_ACMP1_P1 (0x01UL << NUMAKER_SYS_GPB_MFP1_PB4MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB4MFP_EBI_ADR1 (0x02UL << NUMAKER_SYS_GPB_MFP1_PB4MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB4MFP_SD0_DAT2 (0x03UL << NUMAKER_SYS_GPB_MFP1_PB4MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB4MFP_EMAC0_RMII_RXD0 (0x04UL << NUMAKER_SYS_GPB_MFP1_PB4MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB4MFP_SPI1_MOSI (0x05UL << NUMAKER_SYS_GPB_MFP1_PB4MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB4MFP_I2C0_SDA (0x06UL << NUMAKER_SYS_GPB_MFP1_PB4MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB4MFP_UART5_RXD (0x07UL << NUMAKER_SYS_GPB_MFP1_PB4MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB4MFP_SC0_DAT (0x09UL << NUMAKER_SYS_GPB_MFP1_PB4MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB4MFP_I2S0_MCLK (0x0aUL << NUMAKER_SYS_GPB_MFP1_PB4MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB4MFP_EPWM0_CH1 (0x0bUL << NUMAKER_SYS_GPB_MFP1_PB4MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB4MFP_UART2_RXD (0x0cUL << NUMAKER_SYS_GPB_MFP1_PB4MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB4MFP_TM1 (0x0eUL << NUMAKER_SYS_GPB_MFP1_PB4MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB4MFP_INT1 (0x0fUL << NUMAKER_SYS_GPB_MFP1_PB4MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB4MFP_PSIO0_CH5 (0x11UL << NUMAKER_SYS_GPB_MFP1_PB4MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB4MFP_KPI_COL7 (0x12UL << NUMAKER_SYS_GPB_MFP1_PB4MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB4MFP_BMC1 (0x14UL << NUMAKER_SYS_GPB_MFP1_PB4MFP_Pos)
/* PB.5 MFP */
#define NUMAKER_SYS_GPB_MFP1_PB5MFP_GPIO (0x00UL << NUMAKER_SYS_GPB_MFP1_PB5MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB5MFP_EADC0_CH5 (0x01UL << NUMAKER_SYS_GPB_MFP1_PB5MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB5MFP_ACMP1_N (0x01UL << NUMAKER_SYS_GPB_MFP1_PB5MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB5MFP_EBI_ADR0 (0x02UL << NUMAKER_SYS_GPB_MFP1_PB5MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB5MFP_SD0_DAT3 (0x03UL << NUMAKER_SYS_GPB_MFP1_PB5MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB5MFP_EMAC0_RMII_REFCLK (0x04UL << NUMAKER_SYS_GPB_MFP1_PB5MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB5MFP_SPI1_MISO (0x05UL << NUMAKER_SYS_GPB_MFP1_PB5MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB5MFP_I2C0_SCL (0x06UL << NUMAKER_SYS_GPB_MFP1_PB5MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB5MFP_UART5_TXD (0x07UL << NUMAKER_SYS_GPB_MFP1_PB5MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB5MFP_SC0_CLK (0x09UL << NUMAKER_SYS_GPB_MFP1_PB5MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB5MFP_I2S0_BCLK (0x0aUL << NUMAKER_SYS_GPB_MFP1_PB5MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB5MFP_EPWM0_CH0 (0x0bUL << NUMAKER_SYS_GPB_MFP1_PB5MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB5MFP_UART2_TXD (0x0cUL << NUMAKER_SYS_GPB_MFP1_PB5MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB5MFP_TM0 (0x0eUL << NUMAKER_SYS_GPB_MFP1_PB5MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB5MFP_INT0 (0x0fUL << NUMAKER_SYS_GPB_MFP1_PB5MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB5MFP_PSIO0_CH4 (0x11UL << NUMAKER_SYS_GPB_MFP1_PB5MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB5MFP_KPI_COL6 (0x12UL << NUMAKER_SYS_GPB_MFP1_PB5MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB5MFP_BMC0 (0x14UL << NUMAKER_SYS_GPB_MFP1_PB5MFP_Pos)
/* PB.6 MFP */
#define NUMAKER_SYS_GPB_MFP1_PB6MFP_GPIO (0x00UL << NUMAKER_SYS_GPB_MFP1_PB6MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB6MFP_EADC0_CH6 (0x01UL << NUMAKER_SYS_GPB_MFP1_PB6MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB6MFP_EADC2_CH14 (0x01UL << NUMAKER_SYS_GPB_MFP1_PB6MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB6MFP_ACMP2_N (0x01UL << NUMAKER_SYS_GPB_MFP1_PB6MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB6MFP_EBI_nWRH (0x02UL << NUMAKER_SYS_GPB_MFP1_PB6MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB6MFP_EMAC0_PPS (0x03UL << NUMAKER_SYS_GPB_MFP1_PB6MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB6MFP_CAN1_RXD (0x05UL << NUMAKER_SYS_GPB_MFP1_PB6MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB6MFP_UART1_RXD (0x06UL << NUMAKER_SYS_GPB_MFP1_PB6MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB6MFP_SD1_CLK (0x07UL << NUMAKER_SYS_GPB_MFP1_PB6MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB6MFP_EBI_nCS1 (0x08UL << NUMAKER_SYS_GPB_MFP1_PB6MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB6MFP_BPWM1_CH5 (0x0aUL << NUMAKER_SYS_GPB_MFP1_PB6MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB6MFP_EPWM1_BRAKE1 (0x0bUL << NUMAKER_SYS_GPB_MFP1_PB6MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB6MFP_EPWM1_CH5 (0x0cUL << NUMAKER_SYS_GPB_MFP1_PB6MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB6MFP_INT4 (0x0dUL << NUMAKER_SYS_GPB_MFP1_PB6MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB6MFP_USB_VBUS_EN (0x0eUL << NUMAKER_SYS_GPB_MFP1_PB6MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB6MFP_ACMP1_O (0x0fUL << NUMAKER_SYS_GPB_MFP1_PB6MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB6MFP_SPI3_MOSI (0x10UL << NUMAKER_SYS_GPB_MFP1_PB6MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB6MFP_KPI_COL5 (0x12UL << NUMAKER_SYS_GPB_MFP1_PB6MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB6MFP_SPI1_SS (0x13UL << NUMAKER_SYS_GPB_MFP1_PB6MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB6MFP_BMC31 (0x14UL << NUMAKER_SYS_GPB_MFP1_PB6MFP_Pos)
/* PB.7 MFP */
#define NUMAKER_SYS_GPB_MFP1_PB7MFP_GPIO (0x00UL << NUMAKER_SYS_GPB_MFP1_PB7MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB7MFP_EADC0_CH7 (0x01UL << NUMAKER_SYS_GPB_MFP1_PB7MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB7MFP_EADC2_CH15 (0x01UL << NUMAKER_SYS_GPB_MFP1_PB7MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB7MFP_ACMP2_P0 (0x01UL << NUMAKER_SYS_GPB_MFP1_PB7MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB7MFP_EBI_nWRL (0x02UL << NUMAKER_SYS_GPB_MFP1_PB7MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB7MFP_EMAC0_RMII_TXEN (0x03UL << NUMAKER_SYS_GPB_MFP1_PB7MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB7MFP_CAN1_TXD (0x05UL << NUMAKER_SYS_GPB_MFP1_PB7MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB7MFP_UART1_TXD (0x06UL << NUMAKER_SYS_GPB_MFP1_PB7MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB7MFP_SD1_CMD (0x07UL << NUMAKER_SYS_GPB_MFP1_PB7MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB7MFP_EBI_nCS0 (0x08UL << NUMAKER_SYS_GPB_MFP1_PB7MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB7MFP_BPWM1_CH4 (0x0aUL << NUMAKER_SYS_GPB_MFP1_PB7MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB7MFP_EPWM1_BRAKE0 (0x0bUL << NUMAKER_SYS_GPB_MFP1_PB7MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB7MFP_EPWM1_CH4 (0x0cUL << NUMAKER_SYS_GPB_MFP1_PB7MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB7MFP_INT5 (0x0dUL << NUMAKER_SYS_GPB_MFP1_PB7MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB7MFP_USB_VBUS_ST (0x0eUL << NUMAKER_SYS_GPB_MFP1_PB7MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB7MFP_ACMP0_O (0x0fUL << NUMAKER_SYS_GPB_MFP1_PB7MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB7MFP_SPI3_MISO (0x10UL << NUMAKER_SYS_GPB_MFP1_PB7MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB7MFP_KPI_COL4 (0x12UL << NUMAKER_SYS_GPB_MFP1_PB7MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB7MFP_SPI1_CLK (0x13UL << NUMAKER_SYS_GPB_MFP1_PB7MFP_Pos)
#define NUMAKER_SYS_GPB_MFP1_PB7MFP_BMC30 (0x14UL << NUMAKER_SYS_GPB_MFP1_PB7MFP_Pos)
/* PB.8 MFP */
#define NUMAKER_SYS_GPB_MFP2_PB8MFP_GPIO (0x00UL << NUMAKER_SYS_GPB_MFP2_PB8MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB8MFP_EADC0_CH8 (0x01UL << NUMAKER_SYS_GPB_MFP2_PB8MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB8MFP_ACMP2_P1 (0x01UL << NUMAKER_SYS_GPB_MFP2_PB8MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB8MFP_EBI_ADR19 (0x02UL << NUMAKER_SYS_GPB_MFP2_PB8MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB8MFP_EMAC0_RMII_TXD1 (0x03UL << NUMAKER_SYS_GPB_MFP2_PB8MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB8MFP_UART0_RXD (0x05UL << NUMAKER_SYS_GPB_MFP2_PB8MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB8MFP_UART1_nRTS (0x06UL << NUMAKER_SYS_GPB_MFP2_PB8MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB8MFP_I2C1_SMBSUS (0x07UL << NUMAKER_SYS_GPB_MFP2_PB8MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB8MFP_UART7_RXD (0x08UL << NUMAKER_SYS_GPB_MFP2_PB8MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB8MFP_I2C0_SDA (0x09UL << NUMAKER_SYS_GPB_MFP2_PB8MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB8MFP_BPWM1_CH3 (0x0aUL << NUMAKER_SYS_GPB_MFP2_PB8MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB8MFP_SPI3_MOSI (0x0bUL << NUMAKER_SYS_GPB_MFP2_PB8MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB8MFP_CAN2_RXD (0x0cUL << NUMAKER_SYS_GPB_MFP2_PB8MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB8MFP_INT6 (0x0dUL << NUMAKER_SYS_GPB_MFP2_PB8MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB8MFP_EADC2_ST (0x0eUL << NUMAKER_SYS_GPB_MFP2_PB8MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB8MFP_BMC23 (0x14UL << NUMAKER_SYS_GPB_MFP2_PB8MFP_Pos)
/* PB.9 MFP */
#define NUMAKER_SYS_GPB_MFP2_PB9MFP_GPIO (0x00UL << NUMAKER_SYS_GPB_MFP2_PB9MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB9MFP_EADC0_CH9 (0x01UL << NUMAKER_SYS_GPB_MFP2_PB9MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB9MFP_ACMP2_P2 (0x01UL << NUMAKER_SYS_GPB_MFP2_PB9MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB9MFP_EBI_ADR18 (0x02UL << NUMAKER_SYS_GPB_MFP2_PB9MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB9MFP_EMAC0_RMII_TXD0 (0x03UL << NUMAKER_SYS_GPB_MFP2_PB9MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB9MFP_UART0_TXD (0x05UL << NUMAKER_SYS_GPB_MFP2_PB9MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB9MFP_UART1_nCTS (0x06UL << NUMAKER_SYS_GPB_MFP2_PB9MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB9MFP_I2C1_SMBAL (0x07UL << NUMAKER_SYS_GPB_MFP2_PB9MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB9MFP_UART7_TXD (0x08UL << NUMAKER_SYS_GPB_MFP2_PB9MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB9MFP_I2C0_SCL (0x09UL << NUMAKER_SYS_GPB_MFP2_PB9MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB9MFP_BPWM1_CH2 (0x0aUL << NUMAKER_SYS_GPB_MFP2_PB9MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB9MFP_SPI3_MISO (0x0bUL << NUMAKER_SYS_GPB_MFP2_PB9MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB9MFP_CAN2_TXD (0x0cUL << NUMAKER_SYS_GPB_MFP2_PB9MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB9MFP_INT7 (0x0dUL << NUMAKER_SYS_GPB_MFP2_PB9MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB9MFP_CCAP_HSYNC (0x0eUL << NUMAKER_SYS_GPB_MFP2_PB9MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB9MFP_BMC22 (0x14UL << NUMAKER_SYS_GPB_MFP2_PB9MFP_Pos)
/* PB.10 MFP */
#define NUMAKER_SYS_GPB_MFP2_PB10MFP_GPIO (0x00UL << NUMAKER_SYS_GPB_MFP2_PB10MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB10MFP_EADC0_CH10 (0x01UL << NUMAKER_SYS_GPB_MFP2_PB10MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB10MFP_ACMP2_P3 (0x01UL << NUMAKER_SYS_GPB_MFP2_PB10MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB10MFP_EBI_ADR17 (0x02UL << NUMAKER_SYS_GPB_MFP2_PB10MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB10MFP_EMAC0_RMII_MDIO (0x03UL << NUMAKER_SYS_GPB_MFP2_PB10MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB10MFP_UART0_nRTS (0x05UL << NUMAKER_SYS_GPB_MFP2_PB10MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB10MFP_UART4_RXD (0x06UL << NUMAKER_SYS_GPB_MFP2_PB10MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB10MFP_I2C1_SDA (0x07UL << NUMAKER_SYS_GPB_MFP2_PB10MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB10MFP_CAN0_RXD (0x08UL << NUMAKER_SYS_GPB_MFP2_PB10MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB10MFP_BPWM1_CH1 (0x0aUL << NUMAKER_SYS_GPB_MFP2_PB10MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB10MFP_SPI3_SS (0x0bUL << NUMAKER_SYS_GPB_MFP2_PB10MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB10MFP_CCAP_VSYNC (0x0cUL << NUMAKER_SYS_GPB_MFP2_PB10MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB10MFP_HSUSB_VBUS_EN (0x0eUL << NUMAKER_SYS_GPB_MFP2_PB10MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB10MFP_BMC21 (0x14UL << NUMAKER_SYS_GPB_MFP2_PB10MFP_Pos)
/* PB.11 MFP */
#define NUMAKER_SYS_GPB_MFP2_PB11MFP_GPIO (0x00UL << NUMAKER_SYS_GPB_MFP2_PB11MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB11MFP_EADC0_CH11 (0x01UL << NUMAKER_SYS_GPB_MFP2_PB11MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB11MFP_EBI_ADR16 (0x02UL << NUMAKER_SYS_GPB_MFP2_PB11MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB11MFP_EMAC0_RMII_MDC (0x03UL << NUMAKER_SYS_GPB_MFP2_PB11MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB11MFP_UART0_nCTS (0x05UL << NUMAKER_SYS_GPB_MFP2_PB11MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB11MFP_UART4_TXD (0x06UL << NUMAKER_SYS_GPB_MFP2_PB11MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB11MFP_I2C1_SCL (0x07UL << NUMAKER_SYS_GPB_MFP2_PB11MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB11MFP_CAN0_TXD (0x08UL << NUMAKER_SYS_GPB_MFP2_PB11MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB11MFP_SPI0_I2SMCLK (0x09UL << NUMAKER_SYS_GPB_MFP2_PB11MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB11MFP_BPWM1_CH0 (0x0aUL << NUMAKER_SYS_GPB_MFP2_PB11MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB11MFP_SPI3_CLK (0x0bUL << NUMAKER_SYS_GPB_MFP2_PB11MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB11MFP_CCAP_SFIELD (0x0cUL << NUMAKER_SYS_GPB_MFP2_PB11MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB11MFP_HSUSB_VBUS_ST (0x0eUL << NUMAKER_SYS_GPB_MFP2_PB11MFP_Pos)
#define NUMAKER_SYS_GPB_MFP2_PB11MFP_BMC20 (0x14UL << NUMAKER_SYS_GPB_MFP2_PB11MFP_Pos)
/* PB.12 MFP */
#define NUMAKER_SYS_GPB_MFP3_PB12MFP_GPIO (0x00UL << NUMAKER_SYS_GPB_MFP3_PB12MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB12MFP_EADC0_CH12 (0x01UL << NUMAKER_SYS_GPB_MFP3_PB12MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB12MFP_EADC1_CH12 (0x01UL << NUMAKER_SYS_GPB_MFP3_PB12MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB12MFP_DAC0_OUT (0x01UL << NUMAKER_SYS_GPB_MFP3_PB12MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB12MFP_ACMP0_P2 (0x01UL << NUMAKER_SYS_GPB_MFP3_PB12MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB12MFP_ACMP1_P2 (0x01UL << NUMAKER_SYS_GPB_MFP3_PB12MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB12MFP_EBI_AD15 (0x02UL << NUMAKER_SYS_GPB_MFP3_PB12MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB12MFP_SC1_CLK (0x03UL << NUMAKER_SYS_GPB_MFP3_PB12MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB12MFP_SPI0_MOSI (0x04UL << NUMAKER_SYS_GPB_MFP3_PB12MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB12MFP_USCI0_CLK (0x05UL << NUMAKER_SYS_GPB_MFP3_PB12MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB12MFP_UART0_RXD (0x06UL << NUMAKER_SYS_GPB_MFP3_PB12MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB12MFP_UART3_nCTS (0x07UL << NUMAKER_SYS_GPB_MFP3_PB12MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB12MFP_I2C2_SDA (0x08UL << NUMAKER_SYS_GPB_MFP3_PB12MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB12MFP_SD0_nCD (0x09UL << NUMAKER_SYS_GPB_MFP3_PB12MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB12MFP_CCAP_SCLK (0x0aUL << NUMAKER_SYS_GPB_MFP3_PB12MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB12MFP_EPWM1_CH3 (0x0bUL << NUMAKER_SYS_GPB_MFP3_PB12MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB12MFP_ETMC_TRACE_DATA3 (0x0cUL << NUMAKER_SYS_GPB_MFP3_PB12MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB12MFP_TM3_EXT (0x0dUL << NUMAKER_SYS_GPB_MFP3_PB12MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB12MFP_CAN3_RXD (0x0eUL << NUMAKER_SYS_GPB_MFP3_PB12MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB12MFP_SPI3_SS (0x10UL << NUMAKER_SYS_GPB_MFP3_PB12MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB12MFP_PSIO0_CH3 (0x11UL << NUMAKER_SYS_GPB_MFP3_PB12MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB12MFP_KPI_COL3 (0x12UL << NUMAKER_SYS_GPB_MFP3_PB12MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB12MFP_BMC29 (0x14UL << NUMAKER_SYS_GPB_MFP3_PB12MFP_Pos)
/* PB.13 MFP */
#define NUMAKER_SYS_GPB_MFP3_PB13MFP_GPIO (0x00UL << NUMAKER_SYS_GPB_MFP3_PB13MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB13MFP_EADC0_CH13 (0x01UL << NUMAKER_SYS_GPB_MFP3_PB13MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB13MFP_EADC1_CH13 (0x01UL << NUMAKER_SYS_GPB_MFP3_PB13MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB13MFP_DAC1_OUT (0x01UL << NUMAKER_SYS_GPB_MFP3_PB13MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB13MFP_ACMP0_P3 (0x01UL << NUMAKER_SYS_GPB_MFP3_PB13MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB13MFP_ACMP1_P3 (0x01UL << NUMAKER_SYS_GPB_MFP3_PB13MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB13MFP_EBI_AD14 (0x02UL << NUMAKER_SYS_GPB_MFP3_PB13MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB13MFP_SC1_DAT (0x03UL << NUMAKER_SYS_GPB_MFP3_PB13MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB13MFP_SPI0_MISO (0x04UL << NUMAKER_SYS_GPB_MFP3_PB13MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB13MFP_USCI0_DAT0 (0x05UL << NUMAKER_SYS_GPB_MFP3_PB13MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB13MFP_UART0_TXD (0x06UL << NUMAKER_SYS_GPB_MFP3_PB13MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB13MFP_UART3_nRTS (0x07UL << NUMAKER_SYS_GPB_MFP3_PB13MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB13MFP_I2C2_SCL (0x08UL << NUMAKER_SYS_GPB_MFP3_PB13MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB13MFP_CCAP_PIXCLK (0x0aUL << NUMAKER_SYS_GPB_MFP3_PB13MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB13MFP_EPWM1_CH2 (0x0bUL << NUMAKER_SYS_GPB_MFP3_PB13MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB13MFP_ETMC_TRACE_DATA2 (0x0cUL << NUMAKER_SYS_GPB_MFP3_PB13MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB13MFP_TM2_EXT (0x0dUL << NUMAKER_SYS_GPB_MFP3_PB13MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB13MFP_CAN3_TXD (0x0eUL << NUMAKER_SYS_GPB_MFP3_PB13MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB13MFP_SPI3_CLK (0x10UL << NUMAKER_SYS_GPB_MFP3_PB13MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB13MFP_PSIO0_CH2 (0x11UL << NUMAKER_SYS_GPB_MFP3_PB13MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB13MFP_KPI_COL2 (0x12UL << NUMAKER_SYS_GPB_MFP3_PB13MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB13MFP_SPI9_MISO (0x13UL << NUMAKER_SYS_GPB_MFP3_PB13MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB13MFP_BMC28 (0x14UL << NUMAKER_SYS_GPB_MFP3_PB13MFP_Pos)
/* PB.14 MFP */
#define NUMAKER_SYS_GPB_MFP3_PB14MFP_GPIO (0x00UL << NUMAKER_SYS_GPB_MFP3_PB14MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB14MFP_EADC0_CH14 (0x01UL << NUMAKER_SYS_GPB_MFP3_PB14MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB14MFP_EADC1_CH14 (0x01UL << NUMAKER_SYS_GPB_MFP3_PB14MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB14MFP_EBI_AD13 (0x02UL << NUMAKER_SYS_GPB_MFP3_PB14MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB14MFP_SC1_RST (0x03UL << NUMAKER_SYS_GPB_MFP3_PB14MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB14MFP_SPI0_CLK (0x04UL << NUMAKER_SYS_GPB_MFP3_PB14MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB14MFP_USCI0_DAT1 (0x05UL << NUMAKER_SYS_GPB_MFP3_PB14MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB14MFP_UART0_nRTS (0x06UL << NUMAKER_SYS_GPB_MFP3_PB14MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB14MFP_UART3_RXD (0x07UL << NUMAKER_SYS_GPB_MFP3_PB14MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB14MFP_I2C2_SMBSUS (0x08UL << NUMAKER_SYS_GPB_MFP3_PB14MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB14MFP_CCAP_DATA0 (0x09UL << NUMAKER_SYS_GPB_MFP3_PB14MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB14MFP_EPWM1_CH1 (0x0bUL << NUMAKER_SYS_GPB_MFP3_PB14MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB14MFP_ETMC_TRACE_DATA1 (0x0cUL << NUMAKER_SYS_GPB_MFP3_PB14MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB14MFP_TM1_EXT (0x0dUL << NUMAKER_SYS_GPB_MFP3_PB14MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB14MFP_CLKO (0x0eUL << NUMAKER_SYS_GPB_MFP3_PB14MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB14MFP_USB_VBUS_ST (0x0fUL << NUMAKER_SYS_GPB_MFP3_PB14MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB14MFP_PSIO0_CH1 (0x11UL << NUMAKER_SYS_GPB_MFP3_PB14MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB14MFP_KPI_COL1 (0x12UL << NUMAKER_SYS_GPB_MFP3_PB14MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB14MFP_SPI9_SS (0x13UL << NUMAKER_SYS_GPB_MFP3_PB14MFP_Pos)
/* PB.15 MFP */
#define NUMAKER_SYS_GPB_MFP3_PB15MFP_GPIO (0x00UL << NUMAKER_SYS_GPB_MFP3_PB15MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB15MFP_EADC0_CH15 (0x01UL << NUMAKER_SYS_GPB_MFP3_PB15MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB15MFP_EADC1_CH15 (0x01UL << NUMAKER_SYS_GPB_MFP3_PB15MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB15MFP_EBI_AD12 (0x02UL << NUMAKER_SYS_GPB_MFP3_PB15MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB15MFP_SC1_PWR (0x03UL << NUMAKER_SYS_GPB_MFP3_PB15MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB15MFP_SPI0_SS (0x04UL << NUMAKER_SYS_GPB_MFP3_PB15MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB15MFP_USCI0_CTL1 (0x05UL << NUMAKER_SYS_GPB_MFP3_PB15MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB15MFP_UART0_nCTS (0x06UL << NUMAKER_SYS_GPB_MFP3_PB15MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB15MFP_UART3_TXD (0x07UL << NUMAKER_SYS_GPB_MFP3_PB15MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB15MFP_I2C2_SMBAL (0x08UL << NUMAKER_SYS_GPB_MFP3_PB15MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB15MFP_CCAP_DATA1 (0x09UL << NUMAKER_SYS_GPB_MFP3_PB15MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB15MFP_EPWM0_BRAKE1 (0x0aUL << NUMAKER_SYS_GPB_MFP3_PB15MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB15MFP_EPWM1_CH0 (0x0bUL << NUMAKER_SYS_GPB_MFP3_PB15MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB15MFP_ETMC_TRACE_DATA0 (0x0cUL << NUMAKER_SYS_GPB_MFP3_PB15MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB15MFP_TM0_EXT (0x0dUL << NUMAKER_SYS_GPB_MFP3_PB15MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB15MFP_USB_VBUS_EN (0x0eUL << NUMAKER_SYS_GPB_MFP3_PB15MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB15MFP_HSUSB_VBUS_EN (0x0fUL << NUMAKER_SYS_GPB_MFP3_PB15MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB15MFP_PSIO0_CH0 (0x11UL << NUMAKER_SYS_GPB_MFP3_PB15MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB15MFP_KPI_COL0 (0x12UL << NUMAKER_SYS_GPB_MFP3_PB15MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB15MFP_SPI9_CLK (0x13UL << NUMAKER_SYS_GPB_MFP3_PB15MFP_Pos)
#define NUMAKER_SYS_GPB_MFP3_PB15MFP_BMC27 (0x14UL << NUMAKER_SYS_GPB_MFP3_PB15MFP_Pos)
/* PC.0 MFP */
#define NUMAKER_SYS_GPC_MFP0_PC0MFP_GPIO (0x00UL << NUMAKER_SYS_GPC_MFP0_PC0MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC0MFP_EBI_AD0 (0x02UL << NUMAKER_SYS_GPC_MFP0_PC0MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC0MFP_SPIM_MOSI (0x03UL << NUMAKER_SYS_GPC_MFP0_PC0MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC0MFP_QSPI0_MOSI0 (0x04UL << NUMAKER_SYS_GPC_MFP0_PC0MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC0MFP_SC1_CLK (0x05UL << NUMAKER_SYS_GPC_MFP0_PC0MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC0MFP_I2S0_LRCK (0x06UL << NUMAKER_SYS_GPC_MFP0_PC0MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC0MFP_SPI1_SS (0x07UL << NUMAKER_SYS_GPC_MFP0_PC0MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC0MFP_UART2_RXD (0x08UL << NUMAKER_SYS_GPC_MFP0_PC0MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC0MFP_I2C0_SDA (0x09UL << NUMAKER_SYS_GPC_MFP0_PC0MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC0MFP_CAN2_RXD (0x0aUL << NUMAKER_SYS_GPC_MFP0_PC0MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC0MFP_EPWM1_CH5 (0x0cUL << NUMAKER_SYS_GPC_MFP0_PC0MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC0MFP_CCAP_DATA0 (0x0dUL << NUMAKER_SYS_GPC_MFP0_PC0MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC0MFP_ACMP1_O (0x0eUL << NUMAKER_SYS_GPC_MFP0_PC0MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC0MFP_EADC1_ST (0x0fUL << NUMAKER_SYS_GPC_MFP0_PC0MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC0MFP_HBI_D2 (0x10UL << NUMAKER_SYS_GPC_MFP0_PC0MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC0MFP_QSPI1_CLK (0x11UL << NUMAKER_SYS_GPC_MFP0_PC0MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC0MFP_KPI_ROW5 (0x12UL << NUMAKER_SYS_GPC_MFP0_PC0MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC0MFP_SPI7_MOSI (0x13UL << NUMAKER_SYS_GPC_MFP0_PC0MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC0MFP_BMC25 (0x14UL << NUMAKER_SYS_GPC_MFP0_PC0MFP_Pos)
/* PC.1 MFP */
#define NUMAKER_SYS_GPC_MFP0_PC1MFP_GPIO (0x00UL << NUMAKER_SYS_GPC_MFP0_PC1MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC1MFP_EBI_AD1 (0x02UL << NUMAKER_SYS_GPC_MFP0_PC1MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC1MFP_SPIM_MISO (0x03UL << NUMAKER_SYS_GPC_MFP0_PC1MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC1MFP_QSPI0_MISO0 (0x04UL << NUMAKER_SYS_GPC_MFP0_PC1MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC1MFP_SC1_DAT (0x05UL << NUMAKER_SYS_GPC_MFP0_PC1MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC1MFP_I2S0_DO (0x06UL << NUMAKER_SYS_GPC_MFP0_PC1MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC1MFP_SPI1_CLK (0x07UL << NUMAKER_SYS_GPC_MFP0_PC1MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC1MFP_UART2_TXD (0x08UL << NUMAKER_SYS_GPC_MFP0_PC1MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC1MFP_I2C0_SCL (0x09UL << NUMAKER_SYS_GPC_MFP0_PC1MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC1MFP_CAN2_TXD (0x0aUL << NUMAKER_SYS_GPC_MFP0_PC1MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC1MFP_EPWM1_CH4 (0x0cUL << NUMAKER_SYS_GPC_MFP0_PC1MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC1MFP_CCAP_DATA1 (0x0dUL << NUMAKER_SYS_GPC_MFP0_PC1MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC1MFP_ACMP0_O (0x0eUL << NUMAKER_SYS_GPC_MFP0_PC1MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC1MFP_EADC0_ST (0x0fUL << NUMAKER_SYS_GPC_MFP0_PC1MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC1MFP_HBI_RWDS (0x10UL << NUMAKER_SYS_GPC_MFP0_PC1MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC1MFP_QSPI1_SS (0x11UL << NUMAKER_SYS_GPC_MFP0_PC1MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC1MFP_KPI_ROW4 (0x12UL << NUMAKER_SYS_GPC_MFP0_PC1MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC1MFP_SPI7_MISO (0x13UL << NUMAKER_SYS_GPC_MFP0_PC1MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC1MFP_BMC24 (0x14UL << NUMAKER_SYS_GPC_MFP0_PC1MFP_Pos)
/* PC.2 MFP */
#define NUMAKER_SYS_GPC_MFP0_PC2MFP_GPIO (0x00UL << NUMAKER_SYS_GPC_MFP0_PC2MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC2MFP_EBI_AD2 (0x02UL << NUMAKER_SYS_GPC_MFP0_PC2MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC2MFP_SPIM_CLK (0x03UL << NUMAKER_SYS_GPC_MFP0_PC2MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC2MFP_QSPI0_CLK (0x04UL << NUMAKER_SYS_GPC_MFP0_PC2MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC2MFP_SC1_RST (0x05UL << NUMAKER_SYS_GPC_MFP0_PC2MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC2MFP_I2S0_DI (0x06UL << NUMAKER_SYS_GPC_MFP0_PC2MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC2MFP_SPI1_MOSI (0x07UL << NUMAKER_SYS_GPC_MFP0_PC2MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC2MFP_UART2_nCTS (0x08UL << NUMAKER_SYS_GPC_MFP0_PC2MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC2MFP_I2C0_SMBSUS (0x09UL << NUMAKER_SYS_GPC_MFP0_PC2MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC2MFP_CAN1_RXD (0x0aUL << NUMAKER_SYS_GPC_MFP0_PC2MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC2MFP_UART3_RXD (0x0bUL << NUMAKER_SYS_GPC_MFP0_PC2MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC2MFP_EPWM1_CH3 (0x0cUL << NUMAKER_SYS_GPC_MFP0_PC2MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC2MFP_CCAP_DATA2 (0x0dUL << NUMAKER_SYS_GPC_MFP0_PC2MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC2MFP_QSPI1_MOSI0 (0x0eUL << NUMAKER_SYS_GPC_MFP0_PC2MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC2MFP_I2C3_SDA (0x0fUL << NUMAKER_SYS_GPC_MFP0_PC2MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC2MFP_HBI_nRESET (0x10UL << NUMAKER_SYS_GPC_MFP0_PC2MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC2MFP_PSIO0_CH3 (0x11UL << NUMAKER_SYS_GPC_MFP0_PC2MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC2MFP_KPI_ROW3 (0x12UL << NUMAKER_SYS_GPC_MFP0_PC2MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC2MFP_SPI7_CLK (0x13UL << NUMAKER_SYS_GPC_MFP0_PC2MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC2MFP_BMC23 (0x14UL << NUMAKER_SYS_GPC_MFP0_PC2MFP_Pos)
/* PC.3 MFP */
#define NUMAKER_SYS_GPC_MFP0_PC3MFP_GPIO (0x00UL << NUMAKER_SYS_GPC_MFP0_PC3MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC3MFP_EBI_AD3 (0x02UL << NUMAKER_SYS_GPC_MFP0_PC3MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC3MFP_SPIM_SS (0x03UL << NUMAKER_SYS_GPC_MFP0_PC3MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC3MFP_QSPI0_SS (0x04UL << NUMAKER_SYS_GPC_MFP0_PC3MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC3MFP_SC1_PWR (0x05UL << NUMAKER_SYS_GPC_MFP0_PC3MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC3MFP_I2S0_MCLK (0x06UL << NUMAKER_SYS_GPC_MFP0_PC3MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC3MFP_SPI1_MISO (0x07UL << NUMAKER_SYS_GPC_MFP0_PC3MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC3MFP_UART2_nRTS (0x08UL << NUMAKER_SYS_GPC_MFP0_PC3MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC3MFP_I2C0_SMBAL (0x09UL << NUMAKER_SYS_GPC_MFP0_PC3MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC3MFP_CAN1_TXD (0x0aUL << NUMAKER_SYS_GPC_MFP0_PC3MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC3MFP_UART3_TXD (0x0bUL << NUMAKER_SYS_GPC_MFP0_PC3MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC3MFP_EPWM1_CH2 (0x0cUL << NUMAKER_SYS_GPC_MFP0_PC3MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC3MFP_CCAP_DATA3 (0x0dUL << NUMAKER_SYS_GPC_MFP0_PC3MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC3MFP_QSPI1_MISO0 (0x0eUL << NUMAKER_SYS_GPC_MFP0_PC3MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC3MFP_I2C3_SCL (0x0fUL << NUMAKER_SYS_GPC_MFP0_PC3MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC3MFP_HBI_nCS (0x10UL << NUMAKER_SYS_GPC_MFP0_PC3MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC3MFP_PSIO0_CH2 (0x11UL << NUMAKER_SYS_GPC_MFP0_PC3MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC3MFP_KPI_ROW2 (0x12UL << NUMAKER_SYS_GPC_MFP0_PC3MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC3MFP_SPI7_SS (0x13UL << NUMAKER_SYS_GPC_MFP0_PC3MFP_Pos)
#define NUMAKER_SYS_GPC_MFP0_PC3MFP_BMC22 (0x14UL << NUMAKER_SYS_GPC_MFP0_PC3MFP_Pos)
/* PC.4 MFP */
#define NUMAKER_SYS_GPC_MFP1_PC4MFP_GPIO (0x00UL << NUMAKER_SYS_GPC_MFP1_PC4MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC4MFP_EBI_AD4 (0x02UL << NUMAKER_SYS_GPC_MFP1_PC4MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC4MFP_SPIM_D3 (0x03UL << NUMAKER_SYS_GPC_MFP1_PC4MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC4MFP_QSPI0_MOSI1 (0x04UL << NUMAKER_SYS_GPC_MFP1_PC4MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC4MFP_SC1_nCD (0x05UL << NUMAKER_SYS_GPC_MFP1_PC4MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC4MFP_I2S0_BCLK (0x06UL << NUMAKER_SYS_GPC_MFP1_PC4MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC4MFP_SPI1_I2SMCLK (0x07UL << NUMAKER_SYS_GPC_MFP1_PC4MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC4MFP_UART2_RXD (0x08UL << NUMAKER_SYS_GPC_MFP1_PC4MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC4MFP_I2C1_SDA (0x09UL << NUMAKER_SYS_GPC_MFP1_PC4MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC4MFP_CAN0_RXD (0x0aUL << NUMAKER_SYS_GPC_MFP1_PC4MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC4MFP_UART4_RXD (0x0bUL << NUMAKER_SYS_GPC_MFP1_PC4MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC4MFP_EPWM1_CH1 (0x0cUL << NUMAKER_SYS_GPC_MFP1_PC4MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC4MFP_CCAP_DATA4 (0x0dUL << NUMAKER_SYS_GPC_MFP1_PC4MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC4MFP_QSPI1_CLK (0x0eUL << NUMAKER_SYS_GPC_MFP1_PC4MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC4MFP_I2C3_SMBSUS (0x0fUL << NUMAKER_SYS_GPC_MFP1_PC4MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC4MFP_HBI_CK (0x10UL << NUMAKER_SYS_GPC_MFP1_PC4MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC4MFP_PSIO0_CH1 (0x11UL << NUMAKER_SYS_GPC_MFP1_PC4MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC4MFP_KPI_ROW1 (0x12UL << NUMAKER_SYS_GPC_MFP1_PC4MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC4MFP_BMC21 (0x14UL << NUMAKER_SYS_GPC_MFP1_PC4MFP_Pos)
/* PC.5 MFP */
#define NUMAKER_SYS_GPC_MFP1_PC5MFP_GPIO (0x00UL << NUMAKER_SYS_GPC_MFP1_PC5MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC5MFP_EBI_AD5 (0x02UL << NUMAKER_SYS_GPC_MFP1_PC5MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC5MFP_SPIM_D2 (0x03UL << NUMAKER_SYS_GPC_MFP1_PC5MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC5MFP_QSPI0_MISO1 (0x04UL << NUMAKER_SYS_GPC_MFP1_PC5MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC5MFP_UART2_TXD (0x08UL << NUMAKER_SYS_GPC_MFP1_PC5MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC5MFP_I2C1_SCL (0x09UL << NUMAKER_SYS_GPC_MFP1_PC5MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC5MFP_CAN0_TXD (0x0aUL << NUMAKER_SYS_GPC_MFP1_PC5MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC5MFP_UART4_TXD (0x0bUL << NUMAKER_SYS_GPC_MFP1_PC5MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC5MFP_EPWM1_CH0 (0x0cUL << NUMAKER_SYS_GPC_MFP1_PC5MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC5MFP_CCAP_DATA5 (0x0dUL << NUMAKER_SYS_GPC_MFP1_PC5MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC5MFP_QSPI1_SS (0x0eUL << NUMAKER_SYS_GPC_MFP1_PC5MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC5MFP_I2C3_SMBAL (0x0fUL << NUMAKER_SYS_GPC_MFP1_PC5MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC5MFP_HBI_nCK (0x10UL << NUMAKER_SYS_GPC_MFP1_PC5MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC5MFP_PSIO0_CH0 (0x11UL << NUMAKER_SYS_GPC_MFP1_PC5MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC5MFP_KPI_ROW0 (0x12UL << NUMAKER_SYS_GPC_MFP1_PC5MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC5MFP_BMC20 (0x14UL << NUMAKER_SYS_GPC_MFP1_PC5MFP_Pos)
/* PC.6 MFP */
#define NUMAKER_SYS_GPC_MFP1_PC6MFP_GPIO (0x00UL << NUMAKER_SYS_GPC_MFP1_PC6MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC6MFP_EBI_AD8 (0x02UL << NUMAKER_SYS_GPC_MFP1_PC6MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC6MFP_EMAC0_RMII_RXD1 (0x03UL << NUMAKER_SYS_GPC_MFP1_PC6MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC6MFP_SPI1_MOSI (0x04UL << NUMAKER_SYS_GPC_MFP1_PC6MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC6MFP_UART4_RXD (0x05UL << NUMAKER_SYS_GPC_MFP1_PC6MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC6MFP_SC2_RST (0x06UL << NUMAKER_SYS_GPC_MFP1_PC6MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC6MFP_UART0_nRTS (0x07UL << NUMAKER_SYS_GPC_MFP1_PC6MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC6MFP_I2C1_SMBSUS (0x08UL << NUMAKER_SYS_GPC_MFP1_PC6MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC6MFP_UART6_RXD (0x09UL << NUMAKER_SYS_GPC_MFP1_PC6MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC6MFP_ACMP3_WLAT (0x0aUL << NUMAKER_SYS_GPC_MFP1_PC6MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC6MFP_EPWM1_CH3 (0x0bUL << NUMAKER_SYS_GPC_MFP1_PC6MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC6MFP_BPWM1_CH1 (0x0cUL << NUMAKER_SYS_GPC_MFP1_PC6MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC6MFP_CAN3_RXD (0x0dUL << NUMAKER_SYS_GPC_MFP1_PC6MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC6MFP_TM1 (0x0eUL << NUMAKER_SYS_GPC_MFP1_PC6MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC6MFP_INT2 (0x0fUL << NUMAKER_SYS_GPC_MFP1_PC6MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC6MFP_KPI_COL2 (0x12UL << NUMAKER_SYS_GPC_MFP1_PC6MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC6MFP_SPI6_MOSI (0x13UL << NUMAKER_SYS_GPC_MFP1_PC6MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC6MFP_BMC25 (0x14UL << NUMAKER_SYS_GPC_MFP1_PC6MFP_Pos)
/* PC.7 MFP */
#define NUMAKER_SYS_GPC_MFP1_PC7MFP_GPIO (0x00UL << NUMAKER_SYS_GPC_MFP1_PC7MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC7MFP_EBI_AD9 (0x02UL << NUMAKER_SYS_GPC_MFP1_PC7MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC7MFP_EMAC0_RMII_RXD0 (0x03UL << NUMAKER_SYS_GPC_MFP1_PC7MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC7MFP_SPI1_MISO (0x04UL << NUMAKER_SYS_GPC_MFP1_PC7MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC7MFP_UART4_TXD (0x05UL << NUMAKER_SYS_GPC_MFP1_PC7MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC7MFP_SC2_PWR (0x06UL << NUMAKER_SYS_GPC_MFP1_PC7MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC7MFP_UART0_nCTS (0x07UL << NUMAKER_SYS_GPC_MFP1_PC7MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC7MFP_I2C1_SMBAL (0x08UL << NUMAKER_SYS_GPC_MFP1_PC7MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC7MFP_UART6_TXD (0x09UL << NUMAKER_SYS_GPC_MFP1_PC7MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC7MFP_ACMP2_WLAT (0x0aUL << NUMAKER_SYS_GPC_MFP1_PC7MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC7MFP_EPWM1_CH2 (0x0bUL << NUMAKER_SYS_GPC_MFP1_PC7MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC7MFP_BPWM1_CH0 (0x0cUL << NUMAKER_SYS_GPC_MFP1_PC7MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC7MFP_CAN3_TXD (0x0dUL << NUMAKER_SYS_GPC_MFP1_PC7MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC7MFP_TM0 (0x0eUL << NUMAKER_SYS_GPC_MFP1_PC7MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC7MFP_INT3 (0x0fUL << NUMAKER_SYS_GPC_MFP1_PC7MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC7MFP_KPI_COL3 (0x12UL << NUMAKER_SYS_GPC_MFP1_PC7MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC7MFP_SPI6_MISO (0x13UL << NUMAKER_SYS_GPC_MFP1_PC7MFP_Pos)
#define NUMAKER_SYS_GPC_MFP1_PC7MFP_BMC24 (0x14UL << NUMAKER_SYS_GPC_MFP1_PC7MFP_Pos)
/* PC.8 MFP */
#define NUMAKER_SYS_GPC_MFP2_PC8MFP_GPIO (0x00UL << NUMAKER_SYS_GPC_MFP2_PC8MFP_Pos)
#define NUMAKER_SYS_GPC_MFP2_PC8MFP_EBI_ADR16 (0x02UL << NUMAKER_SYS_GPC_MFP2_PC8MFP_Pos)
#define NUMAKER_SYS_GPC_MFP2_PC8MFP_EMAC0_RMII_REFCLK (0x03UL << NUMAKER_SYS_GPC_MFP2_PC8MFP_Pos)
#define NUMAKER_SYS_GPC_MFP2_PC8MFP_I2C0_SDA (0x04UL << NUMAKER_SYS_GPC_MFP2_PC8MFP_Pos)
#define NUMAKER_SYS_GPC_MFP2_PC8MFP_UART4_nCTS (0x05UL << NUMAKER_SYS_GPC_MFP2_PC8MFP_Pos)
#define NUMAKER_SYS_GPC_MFP2_PC8MFP_UART1_RXD (0x08UL << NUMAKER_SYS_GPC_MFP2_PC8MFP_Pos)
#define NUMAKER_SYS_GPC_MFP2_PC8MFP_EPWM1_CH1 (0x0bUL << NUMAKER_SYS_GPC_MFP2_PC8MFP_Pos)
#define NUMAKER_SYS_GPC_MFP2_PC8MFP_BPWM1_CH4 (0x0cUL << NUMAKER_SYS_GPC_MFP2_PC8MFP_Pos)
#define NUMAKER_SYS_GPC_MFP2_PC8MFP_KPI_COL4 (0x12UL << NUMAKER_SYS_GPC_MFP2_PC8MFP_Pos)
/* PC.9 MFP */
#define NUMAKER_SYS_GPC_MFP2_PC9MFP_GPIO (0x00UL << NUMAKER_SYS_GPC_MFP2_PC9MFP_Pos)
#define NUMAKER_SYS_GPC_MFP2_PC9MFP_EADC2_CH10 (0x01UL << NUMAKER_SYS_GPC_MFP2_PC9MFP_Pos)
#define NUMAKER_SYS_GPC_MFP2_PC9MFP_ACMP3_P1 (0x01UL << NUMAKER_SYS_GPC_MFP2_PC9MFP_Pos)
#define NUMAKER_SYS_GPC_MFP2_PC9MFP_EBI_ADR7 (0x02UL << NUMAKER_SYS_GPC_MFP2_PC9MFP_Pos)
#define NUMAKER_SYS_GPC_MFP2_PC9MFP_UART6_nCTS (0x05UL << NUMAKER_SYS_GPC_MFP2_PC9MFP_Pos)
#define NUMAKER_SYS_GPC_MFP2_PC9MFP_SPI3_SS (0x06UL << NUMAKER_SYS_GPC_MFP2_PC9MFP_Pos)
#define NUMAKER_SYS_GPC_MFP2_PC9MFP_UART3_RXD (0x07UL << NUMAKER_SYS_GPC_MFP2_PC9MFP_Pos)
#define NUMAKER_SYS_GPC_MFP2_PC9MFP_CAN1_RXD (0x09UL << NUMAKER_SYS_GPC_MFP2_PC9MFP_Pos)
#define NUMAKER_SYS_GPC_MFP2_PC9MFP_I2C4_SMBSUS (0x0aUL << NUMAKER_SYS_GPC_MFP2_PC9MFP_Pos)
#define NUMAKER_SYS_GPC_MFP2_PC9MFP_EPWM1_CH3 (0x0cUL << NUMAKER_SYS_GPC_MFP2_PC9MFP_Pos)
#define NUMAKER_SYS_GPC_MFP2_PC9MFP_EADC1_ST (0x0eUL << NUMAKER_SYS_GPC_MFP2_PC9MFP_Pos)
/* PC.10 MFP */
#define NUMAKER_SYS_GPC_MFP2_PC10MFP_GPIO (0x00UL << NUMAKER_SYS_GPC_MFP2_PC10MFP_Pos)
#define NUMAKER_SYS_GPC_MFP2_PC10MFP_EADC2_CH11 (0x01UL << NUMAKER_SYS_GPC_MFP2_PC10MFP_Pos)
#define NUMAKER_SYS_GPC_MFP2_PC10MFP_ACMP3_P2 (0x01UL << NUMAKER_SYS_GPC_MFP2_PC10MFP_Pos)
#define NUMAKER_SYS_GPC_MFP2_PC10MFP_EBI_ADR6 (0x02UL << NUMAKER_SYS_GPC_MFP2_PC10MFP_Pos)
#define NUMAKER_SYS_GPC_MFP2_PC10MFP_UART6_nRTS (0x05UL << NUMAKER_SYS_GPC_MFP2_PC10MFP_Pos)
#define NUMAKER_SYS_GPC_MFP2_PC10MFP_SPI3_CLK (0x06UL << NUMAKER_SYS_GPC_MFP2_PC10MFP_Pos)
#define NUMAKER_SYS_GPC_MFP2_PC10MFP_UART3_TXD (0x07UL << NUMAKER_SYS_GPC_MFP2_PC10MFP_Pos)
#define NUMAKER_SYS_GPC_MFP2_PC10MFP_CAN1_TXD (0x09UL << NUMAKER_SYS_GPC_MFP2_PC10MFP_Pos)
#define NUMAKER_SYS_GPC_MFP2_PC10MFP_I2C4_SMBAL (0x0aUL << NUMAKER_SYS_GPC_MFP2_PC10MFP_Pos)
#define NUMAKER_SYS_GPC_MFP2_PC10MFP_ECAP1_IC0 (0x0bUL << NUMAKER_SYS_GPC_MFP2_PC10MFP_Pos)
#define NUMAKER_SYS_GPC_MFP2_PC10MFP_EPWM1_CH2 (0x0cUL << NUMAKER_SYS_GPC_MFP2_PC10MFP_Pos)
#define NUMAKER_SYS_GPC_MFP2_PC10MFP_EADC1_ST (0x0eUL << NUMAKER_SYS_GPC_MFP2_PC10MFP_Pos)
/* PC.11 MFP */
#define NUMAKER_SYS_GPC_MFP2_PC11MFP_GPIO (0x00UL << NUMAKER_SYS_GPC_MFP2_PC11MFP_Pos)
#define NUMAKER_SYS_GPC_MFP2_PC11MFP_EADC2_CH12 (0x01UL << NUMAKER_SYS_GPC_MFP2_PC11MFP_Pos)
#define NUMAKER_SYS_GPC_MFP2_PC11MFP_ACMP3_P3 (0x01UL << NUMAKER_SYS_GPC_MFP2_PC11MFP_Pos)
#define NUMAKER_SYS_GPC_MFP2_PC11MFP_EBI_ADR5 (0x02UL << NUMAKER_SYS_GPC_MFP2_PC11MFP_Pos)
#define NUMAKER_SYS_GPC_MFP2_PC11MFP_UART0_RXD (0x03UL << NUMAKER_SYS_GPC_MFP2_PC11MFP_Pos)
#define NUMAKER_SYS_GPC_MFP2_PC11MFP_I2C0_SDA (0x04UL << NUMAKER_SYS_GPC_MFP2_PC11MFP_Pos)
#define NUMAKER_SYS_GPC_MFP2_PC11MFP_UART6_RXD (0x05UL << NUMAKER_SYS_GPC_MFP2_PC11MFP_Pos)
#define NUMAKER_SYS_GPC_MFP2_PC11MFP_SPI3_MOSI (0x06UL << NUMAKER_SYS_GPC_MFP2_PC11MFP_Pos)
#define NUMAKER_SYS_GPC_MFP2_PC11MFP_I2C4_SDA (0x0aUL << NUMAKER_SYS_GPC_MFP2_PC11MFP_Pos)
#define NUMAKER_SYS_GPC_MFP2_PC11MFP_ECAP1_IC1 (0x0bUL << NUMAKER_SYS_GPC_MFP2_PC11MFP_Pos)
#define NUMAKER_SYS_GPC_MFP2_PC11MFP_EPWM1_CH1 (0x0cUL << NUMAKER_SYS_GPC_MFP2_PC11MFP_Pos)
#define NUMAKER_SYS_GPC_MFP2_PC11MFP_ACMP1_O (0x0eUL << NUMAKER_SYS_GPC_MFP2_PC11MFP_Pos)
/* PC.12 MFP */
#define NUMAKER_SYS_GPC_MFP3_PC12MFP_GPIO (0x00UL << NUMAKER_SYS_GPC_MFP3_PC12MFP_Pos)
#define NUMAKER_SYS_GPC_MFP3_PC12MFP_EADC2_CH13 (0x01UL << NUMAKER_SYS_GPC_MFP3_PC12MFP_Pos)
#define NUMAKER_SYS_GPC_MFP3_PC12MFP_EBI_ADR4 (0x02UL << NUMAKER_SYS_GPC_MFP3_PC12MFP_Pos)
#define NUMAKER_SYS_GPC_MFP3_PC12MFP_UART0_TXD (0x03UL << NUMAKER_SYS_GPC_MFP3_PC12MFP_Pos)
#define NUMAKER_SYS_GPC_MFP3_PC12MFP_I2C0_SCL (0x04UL << NUMAKER_SYS_GPC_MFP3_PC12MFP_Pos)
#define NUMAKER_SYS_GPC_MFP3_PC12MFP_UART6_TXD (0x05UL << NUMAKER_SYS_GPC_MFP3_PC12MFP_Pos)
#define NUMAKER_SYS_GPC_MFP3_PC12MFP_SPI3_MISO (0x06UL << NUMAKER_SYS_GPC_MFP3_PC12MFP_Pos)
#define NUMAKER_SYS_GPC_MFP3_PC12MFP_SC0_nCD (0x09UL << NUMAKER_SYS_GPC_MFP3_PC12MFP_Pos)
#define NUMAKER_SYS_GPC_MFP3_PC12MFP_I2C4_SCL (0x0aUL << NUMAKER_SYS_GPC_MFP3_PC12MFP_Pos)
#define NUMAKER_SYS_GPC_MFP3_PC12MFP_ECAP1_IC2 (0x0bUL << NUMAKER_SYS_GPC_MFP3_PC12MFP_Pos)
#define NUMAKER_SYS_GPC_MFP3_PC12MFP_EPWM1_CH0 (0x0cUL << NUMAKER_SYS_GPC_MFP3_PC12MFP_Pos)
#define NUMAKER_SYS_GPC_MFP3_PC12MFP_ACMP0_O (0x0eUL << NUMAKER_SYS_GPC_MFP3_PC12MFP_Pos)
/* PC.13 MFP */
#define NUMAKER_SYS_GPC_MFP3_PC13MFP_GPIO (0x00UL << NUMAKER_SYS_GPC_MFP3_PC13MFP_Pos)
#define NUMAKER_SYS_GPC_MFP3_PC13MFP_EADC1_CH3 (0x01UL << NUMAKER_SYS_GPC_MFP3_PC13MFP_Pos)
#define NUMAKER_SYS_GPC_MFP3_PC13MFP_EADC2_CH3 (0x01UL << NUMAKER_SYS_GPC_MFP3_PC13MFP_Pos)
#define NUMAKER_SYS_GPC_MFP3_PC13MFP_EBI_ADR10 (0x02UL << NUMAKER_SYS_GPC_MFP3_PC13MFP_Pos)
#define NUMAKER_SYS_GPC_MFP3_PC13MFP_SC2_nCD (0x03UL << NUMAKER_SYS_GPC_MFP3_PC13MFP_Pos)
#define NUMAKER_SYS_GPC_MFP3_PC13MFP_SPI2_I2SMCLK (0x04UL << NUMAKER_SYS_GPC_MFP3_PC13MFP_Pos)
#define NUMAKER_SYS_GPC_MFP3_PC13MFP_CAN1_TXD (0x05UL << NUMAKER_SYS_GPC_MFP3_PC13MFP_Pos)
#define NUMAKER_SYS_GPC_MFP3_PC13MFP_USCI0_CTL0 (0x06UL << NUMAKER_SYS_GPC_MFP3_PC13MFP_Pos)
#define NUMAKER_SYS_GPC_MFP3_PC13MFP_UART2_TXD (0x07UL << NUMAKER_SYS_GPC_MFP3_PC13MFP_Pos)
#define NUMAKER_SYS_GPC_MFP3_PC13MFP_UART8_nCTS (0x08UL << NUMAKER_SYS_GPC_MFP3_PC13MFP_Pos)
#define NUMAKER_SYS_GPC_MFP3_PC13MFP_BPWM0_CH4 (0x09UL << NUMAKER_SYS_GPC_MFP3_PC13MFP_Pos)
#define NUMAKER_SYS_GPC_MFP3_PC13MFP_CLKO (0x0dUL << NUMAKER_SYS_GPC_MFP3_PC13MFP_Pos)
#define NUMAKER_SYS_GPC_MFP3_PC13MFP_EADC0_ST (0x0eUL << NUMAKER_SYS_GPC_MFP3_PC13MFP_Pos)
#define NUMAKER_SYS_GPC_MFP3_PC13MFP_SPI9_SS (0x13UL << NUMAKER_SYS_GPC_MFP3_PC13MFP_Pos)
/* PC.14 MFP */
#define NUMAKER_SYS_GPC_MFP3_PC14MFP_GPIO (0x00UL << NUMAKER_SYS_GPC_MFP3_PC14MFP_Pos)
#define NUMAKER_SYS_GPC_MFP3_PC14MFP_EBI_AD11 (0x02UL << NUMAKER_SYS_GPC_MFP3_PC14MFP_Pos)
#define NUMAKER_SYS_GPC_MFP3_PC14MFP_SC1_nCD (0x03UL << NUMAKER_SYS_GPC_MFP3_PC14MFP_Pos)
#define NUMAKER_SYS_GPC_MFP3_PC14MFP_SPI0_I2SMCLK (0x04UL << NUMAKER_SYS_GPC_MFP3_PC14MFP_Pos)
#define NUMAKER_SYS_GPC_MFP3_PC14MFP_USCI0_CTL0 (0x05UL << NUMAKER_SYS_GPC_MFP3_PC14MFP_Pos)
#define NUMAKER_SYS_GPC_MFP3_PC14MFP_QSPI0_CLK (0x06UL << NUMAKER_SYS_GPC_MFP3_PC14MFP_Pos)
#define NUMAKER_SYS_GPC_MFP3_PC14MFP_TRACE_SWO (0x0aUL << NUMAKER_SYS_GPC_MFP3_PC14MFP_Pos)
#define NUMAKER_SYS_GPC_MFP3_PC14MFP_EPWM0_SYNC_IN (0x0bUL << NUMAKER_SYS_GPC_MFP3_PC14MFP_Pos)
#define NUMAKER_SYS_GPC_MFP3_PC14MFP_ETMC_TRACE_CLK (0x0cUL << NUMAKER_SYS_GPC_MFP3_PC14MFP_Pos)
#define NUMAKER_SYS_GPC_MFP3_PC14MFP_TM1 (0x0dUL << NUMAKER_SYS_GPC_MFP3_PC14MFP_Pos)
#define NUMAKER_SYS_GPC_MFP3_PC14MFP_USB_VBUS_ST (0x0eUL << NUMAKER_SYS_GPC_MFP3_PC14MFP_Pos)
#define NUMAKER_SYS_GPC_MFP3_PC14MFP_HSUSB_VBUS_ST (0x0fUL << NUMAKER_SYS_GPC_MFP3_PC14MFP_Pos)
#define NUMAKER_SYS_GPC_MFP3_PC14MFP_SPI9_MOSI (0x13UL << NUMAKER_SYS_GPC_MFP3_PC14MFP_Pos)
#define NUMAKER_SYS_GPC_MFP3_PC14MFP_BMC26 (0x14UL << NUMAKER_SYS_GPC_MFP3_PC14MFP_Pos)
/* PD.0 MFP */
#define NUMAKER_SYS_GPD_MFP0_PD0MFP_GPIO (0x00UL << NUMAKER_SYS_GPD_MFP0_PD0MFP_Pos)
#define NUMAKER_SYS_GPD_MFP0_PD0MFP_EBI_AD13 (0x02UL << NUMAKER_SYS_GPD_MFP0_PD0MFP_Pos)
#define NUMAKER_SYS_GPD_MFP0_PD0MFP_USCI0_CLK (0x03UL << NUMAKER_SYS_GPD_MFP0_PD0MFP_Pos)
#define NUMAKER_SYS_GPD_MFP0_PD0MFP_SPI0_MOSI (0x04UL << NUMAKER_SYS_GPD_MFP0_PD0MFP_Pos)
#define NUMAKER_SYS_GPD_MFP0_PD0MFP_UART3_RXD (0x05UL << NUMAKER_SYS_GPD_MFP0_PD0MFP_Pos)
#define NUMAKER_SYS_GPD_MFP0_PD0MFP_I2C2_SDA (0x06UL << NUMAKER_SYS_GPD_MFP0_PD0MFP_Pos)
#define NUMAKER_SYS_GPD_MFP0_PD0MFP_SC2_CLK (0x07UL << NUMAKER_SYS_GPD_MFP0_PD0MFP_Pos)
#define NUMAKER_SYS_GPD_MFP0_PD0MFP_I2S1_DO (0x0aUL << NUMAKER_SYS_GPD_MFP0_PD0MFP_Pos)
#define NUMAKER_SYS_GPD_MFP0_PD0MFP_EQEI2_A (0x0cUL << NUMAKER_SYS_GPD_MFP0_PD0MFP_Pos)
#define NUMAKER_SYS_GPD_MFP0_PD0MFP_ECAP2_IC1 (0x0dUL << NUMAKER_SYS_GPD_MFP0_PD0MFP_Pos)
#define NUMAKER_SYS_GPD_MFP0_PD0MFP_TM2 (0x0eUL << NUMAKER_SYS_GPD_MFP0_PD0MFP_Pos)
/* PD.1 MFP */
#define NUMAKER_SYS_GPD_MFP0_PD1MFP_GPIO (0x00UL << NUMAKER_SYS_GPD_MFP0_PD1MFP_Pos)
#define NUMAKER_SYS_GPD_MFP0_PD1MFP_EBI_AD12 (0x02UL << NUMAKER_SYS_GPD_MFP0_PD1MFP_Pos)
#define NUMAKER_SYS_GPD_MFP0_PD1MFP_USCI0_DAT0 (0x03UL << NUMAKER_SYS_GPD_MFP0_PD1MFP_Pos)
#define NUMAKER_SYS_GPD_MFP0_PD1MFP_SPI0_MISO (0x04UL << NUMAKER_SYS_GPD_MFP0_PD1MFP_Pos)
#define NUMAKER_SYS_GPD_MFP0_PD1MFP_UART3_TXD (0x05UL << NUMAKER_SYS_GPD_MFP0_PD1MFP_Pos)
#define NUMAKER_SYS_GPD_MFP0_PD1MFP_I2C2_SCL (0x06UL << NUMAKER_SYS_GPD_MFP0_PD1MFP_Pos)
#define NUMAKER_SYS_GPD_MFP0_PD1MFP_SC2_DAT (0x07UL << NUMAKER_SYS_GPD_MFP0_PD1MFP_Pos)
#define NUMAKER_SYS_GPD_MFP0_PD1MFP_I2S1_DI (0x0aUL << NUMAKER_SYS_GPD_MFP0_PD1MFP_Pos)
#define NUMAKER_SYS_GPD_MFP0_PD1MFP_EQEI2_INDEX (0x0cUL << NUMAKER_SYS_GPD_MFP0_PD1MFP_Pos)
#define NUMAKER_SYS_GPD_MFP0_PD1MFP_ECAP2_IC0 (0x0dUL << NUMAKER_SYS_GPD_MFP0_PD1MFP_Pos)
/* PD.2 MFP */
#define NUMAKER_SYS_GPD_MFP0_PD2MFP_GPIO (0x00UL << NUMAKER_SYS_GPD_MFP0_PD2MFP_Pos)
#define NUMAKER_SYS_GPD_MFP0_PD2MFP_EBI_AD11 (0x02UL << NUMAKER_SYS_GPD_MFP0_PD2MFP_Pos)
#define NUMAKER_SYS_GPD_MFP0_PD2MFP_USCI0_DAT1 (0x03UL << NUMAKER_SYS_GPD_MFP0_PD2MFP_Pos)
#define NUMAKER_SYS_GPD_MFP0_PD2MFP_SPI0_CLK (0x04UL << NUMAKER_SYS_GPD_MFP0_PD2MFP_Pos)
#define NUMAKER_SYS_GPD_MFP0_PD2MFP_UART3_nCTS (0x05UL << NUMAKER_SYS_GPD_MFP0_PD2MFP_Pos)
#define NUMAKER_SYS_GPD_MFP0_PD2MFP_SC2_RST (0x07UL << NUMAKER_SYS_GPD_MFP0_PD2MFP_Pos)
#define NUMAKER_SYS_GPD_MFP0_PD2MFP_UART0_RXD (0x09UL << NUMAKER_SYS_GPD_MFP0_PD2MFP_Pos)
#define NUMAKER_SYS_GPD_MFP0_PD2MFP_I2S1_MCLK (0x0aUL << NUMAKER_SYS_GPD_MFP0_PD2MFP_Pos)
#define NUMAKER_SYS_GPD_MFP0_PD2MFP_EQEI3_B (0x0dUL << NUMAKER_SYS_GPD_MFP0_PD2MFP_Pos)
/* PD.3 MFP */
#define NUMAKER_SYS_GPD_MFP0_PD3MFP_GPIO (0x00UL << NUMAKER_SYS_GPD_MFP0_PD3MFP_Pos)
#define NUMAKER_SYS_GPD_MFP0_PD3MFP_EBI_AD10 (0x02UL << NUMAKER_SYS_GPD_MFP0_PD3MFP_Pos)
#define NUMAKER_SYS_GPD_MFP0_PD3MFP_USCI0_CTL1 (0x03UL << NUMAKER_SYS_GPD_MFP0_PD3MFP_Pos)
#define NUMAKER_SYS_GPD_MFP0_PD3MFP_SPI0_SS (0x04UL << NUMAKER_SYS_GPD_MFP0_PD3MFP_Pos)
#define NUMAKER_SYS_GPD_MFP0_PD3MFP_UART3_nRTS (0x05UL << NUMAKER_SYS_GPD_MFP0_PD3MFP_Pos)
#define NUMAKER_SYS_GPD_MFP0_PD3MFP_SC2_PWR (0x07UL << NUMAKER_SYS_GPD_MFP0_PD3MFP_Pos)
#define NUMAKER_SYS_GPD_MFP0_PD3MFP_SC1_nCD (0x08UL << NUMAKER_SYS_GPD_MFP0_PD3MFP_Pos)
#define NUMAKER_SYS_GPD_MFP0_PD3MFP_UART0_TXD (0x09UL << NUMAKER_SYS_GPD_MFP0_PD3MFP_Pos)
#define NUMAKER_SYS_GPD_MFP0_PD3MFP_I2S1_BCLK (0x0aUL << NUMAKER_SYS_GPD_MFP0_PD3MFP_Pos)
#define NUMAKER_SYS_GPD_MFP0_PD3MFP_EQEI3_A (0x0dUL << NUMAKER_SYS_GPD_MFP0_PD3MFP_Pos)
/* PD.4 MFP */
#define NUMAKER_SYS_GPD_MFP1_PD4MFP_GPIO (0x00UL << NUMAKER_SYS_GPD_MFP1_PD4MFP_Pos)
#define NUMAKER_SYS_GPD_MFP1_PD4MFP_USCI0_CTL0 (0x03UL << NUMAKER_SYS_GPD_MFP1_PD4MFP_Pos)
#define NUMAKER_SYS_GPD_MFP1_PD4MFP_I2C1_SDA (0x04UL << NUMAKER_SYS_GPD_MFP1_PD4MFP_Pos)
#define NUMAKER_SYS_GPD_MFP1_PD4MFP_SPI1_SS (0x05UL << NUMAKER_SYS_GPD_MFP1_PD4MFP_Pos)
#define NUMAKER_SYS_GPD_MFP1_PD4MFP_SC1_CLK (0x08UL << NUMAKER_SYS_GPD_MFP1_PD4MFP_Pos)
#define NUMAKER_SYS_GPD_MFP1_PD4MFP_USB_VBUS_ST (0x0eUL << NUMAKER_SYS_GPD_MFP1_PD4MFP_Pos)
#define NUMAKER_SYS_GPD_MFP1_PD4MFP_PSIO0_CH7 (0x11UL << NUMAKER_SYS_GPD_MFP1_PD4MFP_Pos)
/* PD.5 MFP */
#define NUMAKER_SYS_GPD_MFP1_PD5MFP_GPIO (0x00UL << NUMAKER_SYS_GPD_MFP1_PD5MFP_Pos)
#define NUMAKER_SYS_GPD_MFP1_PD5MFP_I2C1_SCL (0x04UL << NUMAKER_SYS_GPD_MFP1_PD5MFP_Pos)
#define NUMAKER_SYS_GPD_MFP1_PD5MFP_SPI1_CLK (0x05UL << NUMAKER_SYS_GPD_MFP1_PD5MFP_Pos)
#define NUMAKER_SYS_GPD_MFP1_PD5MFP_SC1_DAT (0x08UL << NUMAKER_SYS_GPD_MFP1_PD5MFP_Pos)
#define NUMAKER_SYS_GPD_MFP1_PD5MFP_ACMP1_O (0x0eUL << NUMAKER_SYS_GPD_MFP1_PD5MFP_Pos)
#define NUMAKER_SYS_GPD_MFP1_PD5MFP_EADC1_ST (0x0fUL << NUMAKER_SYS_GPD_MFP1_PD5MFP_Pos)
#define NUMAKER_SYS_GPD_MFP1_PD5MFP_HBI_nRESET (0x10UL << NUMAKER_SYS_GPD_MFP1_PD5MFP_Pos)
#define NUMAKER_SYS_GPD_MFP1_PD5MFP_PSIO0_CH6 (0x11UL << NUMAKER_SYS_GPD_MFP1_PD5MFP_Pos)
/* PD.6 MFP */
#define NUMAKER_SYS_GPD_MFP1_PD6MFP_GPIO (0x00UL << NUMAKER_SYS_GPD_MFP1_PD6MFP_Pos)
#define NUMAKER_SYS_GPD_MFP1_PD6MFP_EBI_AD5 (0x02UL << NUMAKER_SYS_GPD_MFP1_PD6MFP_Pos)
#define NUMAKER_SYS_GPD_MFP1_PD6MFP_UART1_RXD (0x03UL << NUMAKER_SYS_GPD_MFP1_PD6MFP_Pos)
#define NUMAKER_SYS_GPD_MFP1_PD6MFP_I2C0_SDA (0x04UL << NUMAKER_SYS_GPD_MFP1_PD6MFP_Pos)
#define NUMAKER_SYS_GPD_MFP1_PD6MFP_SPI1_MOSI (0x05UL << NUMAKER_SYS_GPD_MFP1_PD6MFP_Pos)
#define NUMAKER_SYS_GPD_MFP1_PD6MFP_QSPI1_MOSI0 (0x06UL << NUMAKER_SYS_GPD_MFP1_PD6MFP_Pos)
#define NUMAKER_SYS_GPD_MFP1_PD6MFP_SC1_RST (0x08UL << NUMAKER_SYS_GPD_MFP1_PD6MFP_Pos)
#define NUMAKER_SYS_GPD_MFP1_PD6MFP_ACMP0_O (0x0eUL << NUMAKER_SYS_GPD_MFP1_PD6MFP_Pos)
#define NUMAKER_SYS_GPD_MFP1_PD6MFP_EADC0_ST (0x0fUL << NUMAKER_SYS_GPD_MFP1_PD6MFP_Pos)
#define NUMAKER_SYS_GPD_MFP1_PD6MFP_HBI_D0 (0x10UL << NUMAKER_SYS_GPD_MFP1_PD6MFP_Pos)
#define NUMAKER_SYS_GPD_MFP1_PD6MFP_PSIO0_CH5 (0x11UL << NUMAKER_SYS_GPD_MFP1_PD6MFP_Pos)
/* PD.7 MFP */
#define NUMAKER_SYS_GPD_MFP1_PD7MFP_GPIO (0x00UL << NUMAKER_SYS_GPD_MFP1_PD7MFP_Pos)
#define NUMAKER_SYS_GPD_MFP1_PD7MFP_EBI_AD4 (0x02UL << NUMAKER_SYS_GPD_MFP1_PD7MFP_Pos)
#define NUMAKER_SYS_GPD_MFP1_PD7MFP_UART1_TXD (0x03UL << NUMAKER_SYS_GPD_MFP1_PD7MFP_Pos)
#define NUMAKER_SYS_GPD_MFP1_PD7MFP_I2C0_SCL (0x04UL << NUMAKER_SYS_GPD_MFP1_PD7MFP_Pos)
#define NUMAKER_SYS_GPD_MFP1_PD7MFP_SPI1_MISO (0x05UL << NUMAKER_SYS_GPD_MFP1_PD7MFP_Pos)
#define NUMAKER_SYS_GPD_MFP1_PD7MFP_QSPI1_MISO0 (0x06UL << NUMAKER_SYS_GPD_MFP1_PD7MFP_Pos)
#define NUMAKER_SYS_GPD_MFP1_PD7MFP_CCAP_HSYNC (0x07UL << NUMAKER_SYS_GPD_MFP1_PD7MFP_Pos)
#define NUMAKER_SYS_GPD_MFP1_PD7MFP_SC1_PWR (0x08UL << NUMAKER_SYS_GPD_MFP1_PD7MFP_Pos)
#define NUMAKER_SYS_GPD_MFP1_PD7MFP_HBI_D1 (0x10UL << NUMAKER_SYS_GPD_MFP1_PD7MFP_Pos)
#define NUMAKER_SYS_GPD_MFP1_PD7MFP_PSIO0_CH4 (0x11UL << NUMAKER_SYS_GPD_MFP1_PD7MFP_Pos)
/* PD.8 MFP */
#define NUMAKER_SYS_GPD_MFP2_PD8MFP_GPIO (0x00UL << NUMAKER_SYS_GPD_MFP2_PD8MFP_Pos)
#define NUMAKER_SYS_GPD_MFP2_PD8MFP_EBI_AD6 (0x02UL << NUMAKER_SYS_GPD_MFP2_PD8MFP_Pos)
#define NUMAKER_SYS_GPD_MFP2_PD8MFP_I2C2_SDA (0x03UL << NUMAKER_SYS_GPD_MFP2_PD8MFP_Pos)
#define NUMAKER_SYS_GPD_MFP2_PD8MFP_UART2_nRTS (0x04UL << NUMAKER_SYS_GPD_MFP2_PD8MFP_Pos)
#define NUMAKER_SYS_GPD_MFP2_PD8MFP_UART7_RXD (0x05UL << NUMAKER_SYS_GPD_MFP2_PD8MFP_Pos)
#define NUMAKER_SYS_GPD_MFP2_PD8MFP_CAN2_RXD (0x06UL << NUMAKER_SYS_GPD_MFP2_PD8MFP_Pos)
#define NUMAKER_SYS_GPD_MFP2_PD8MFP_PSIO0_CH3 (0x11UL << NUMAKER_SYS_GPD_MFP2_PD8MFP_Pos)
/* PD.9 MFP */
#define NUMAKER_SYS_GPD_MFP2_PD9MFP_GPIO (0x00UL << NUMAKER_SYS_GPD_MFP2_PD9MFP_Pos)
#define NUMAKER_SYS_GPD_MFP2_PD9MFP_EBI_AD7 (0x02UL << NUMAKER_SYS_GPD_MFP2_PD9MFP_Pos)
#define NUMAKER_SYS_GPD_MFP2_PD9MFP_I2C2_SCL (0x03UL << NUMAKER_SYS_GPD_MFP2_PD9MFP_Pos)
#define NUMAKER_SYS_GPD_MFP2_PD9MFP_UART2_nCTS (0x04UL << NUMAKER_SYS_GPD_MFP2_PD9MFP_Pos)
#define NUMAKER_SYS_GPD_MFP2_PD9MFP_UART7_TXD (0x05UL << NUMAKER_SYS_GPD_MFP2_PD9MFP_Pos)
#define NUMAKER_SYS_GPD_MFP2_PD9MFP_CAN2_TXD (0x06UL << NUMAKER_SYS_GPD_MFP2_PD9MFP_Pos)
#define NUMAKER_SYS_GPD_MFP2_PD9MFP_PSIO0_CH2 (0x11UL << NUMAKER_SYS_GPD_MFP2_PD9MFP_Pos)
/* PD.10 MFP */
#define NUMAKER_SYS_GPD_MFP2_PD10MFP_GPIO (0x00UL << NUMAKER_SYS_GPD_MFP2_PD10MFP_Pos)
#define NUMAKER_SYS_GPD_MFP2_PD10MFP_EADC1_CH0 (0x01UL << NUMAKER_SYS_GPD_MFP2_PD10MFP_Pos)
#define NUMAKER_SYS_GPD_MFP2_PD10MFP_EADC2_CH0 (0x01UL << NUMAKER_SYS_GPD_MFP2_PD10MFP_Pos)
#define NUMAKER_SYS_GPD_MFP2_PD10MFP_EBI_nCS2 (0x02UL << NUMAKER_SYS_GPD_MFP2_PD10MFP_Pos)
#define NUMAKER_SYS_GPD_MFP2_PD10MFP_UART1_RXD (0x03UL << NUMAKER_SYS_GPD_MFP2_PD10MFP_Pos)
#define NUMAKER_SYS_GPD_MFP2_PD10MFP_CAN0_RXD (0x04UL << NUMAKER_SYS_GPD_MFP2_PD10MFP_Pos)
#define NUMAKER_SYS_GPD_MFP2_PD10MFP_UART8_RXD (0x08UL << NUMAKER_SYS_GPD_MFP2_PD10MFP_Pos)
#define NUMAKER_SYS_GPD_MFP2_PD10MFP_EQEI0_B (0x0aUL << NUMAKER_SYS_GPD_MFP2_PD10MFP_Pos)
#define NUMAKER_SYS_GPD_MFP2_PD10MFP_ECAP3_IC2 (0x0bUL << NUMAKER_SYS_GPD_MFP2_PD10MFP_Pos)
#define NUMAKER_SYS_GPD_MFP2_PD10MFP_INT7 (0x0fUL << NUMAKER_SYS_GPD_MFP2_PD10MFP_Pos)
#define NUMAKER_SYS_GPD_MFP2_PD10MFP_SPI9_MOSI (0x13UL << NUMAKER_SYS_GPD_MFP2_PD10MFP_Pos)
/* PD.11 MFP */
#define NUMAKER_SYS_GPD_MFP2_PD11MFP_GPIO (0x00UL << NUMAKER_SYS_GPD_MFP2_PD11MFP_Pos)
#define NUMAKER_SYS_GPD_MFP2_PD11MFP_EADC1_CH1 (0x01UL << NUMAKER_SYS_GPD_MFP2_PD11MFP_Pos)
#define NUMAKER_SYS_GPD_MFP2_PD11MFP_EADC2_CH1 (0x01UL << NUMAKER_SYS_GPD_MFP2_PD11MFP_Pos)
#define NUMAKER_SYS_GPD_MFP2_PD11MFP_EBI_nCS1 (0x02UL << NUMAKER_SYS_GPD_MFP2_PD11MFP_Pos)
#define NUMAKER_SYS_GPD_MFP2_PD11MFP_UART1_TXD (0x03UL << NUMAKER_SYS_GPD_MFP2_PD11MFP_Pos)
#define NUMAKER_SYS_GPD_MFP2_PD11MFP_CAN0_TXD (0x04UL << NUMAKER_SYS_GPD_MFP2_PD11MFP_Pos)
#define NUMAKER_SYS_GPD_MFP2_PD11MFP_UART8_TXD (0x08UL << NUMAKER_SYS_GPD_MFP2_PD11MFP_Pos)
#define NUMAKER_SYS_GPD_MFP2_PD11MFP_EQEI0_A (0x0aUL << NUMAKER_SYS_GPD_MFP2_PD11MFP_Pos)
#define NUMAKER_SYS_GPD_MFP2_PD11MFP_ECAP3_IC1 (0x0bUL << NUMAKER_SYS_GPD_MFP2_PD11MFP_Pos)
#define NUMAKER_SYS_GPD_MFP2_PD11MFP_INT6 (0x0fUL << NUMAKER_SYS_GPD_MFP2_PD11MFP_Pos)
#define NUMAKER_SYS_GPD_MFP2_PD11MFP_SPI9_MISO (0x13UL << NUMAKER_SYS_GPD_MFP2_PD11MFP_Pos)
/* PD.12 MFP */
#define NUMAKER_SYS_GPD_MFP3_PD12MFP_GPIO (0x00UL << NUMAKER_SYS_GPD_MFP3_PD12MFP_Pos)
#define NUMAKER_SYS_GPD_MFP3_PD12MFP_EADC1_CH2 (0x01UL << NUMAKER_SYS_GPD_MFP3_PD12MFP_Pos)
#define NUMAKER_SYS_GPD_MFP3_PD12MFP_EADC2_CH2 (0x01UL << NUMAKER_SYS_GPD_MFP3_PD12MFP_Pos)
#define NUMAKER_SYS_GPD_MFP3_PD12MFP_EBI_nCS0 (0x02UL << NUMAKER_SYS_GPD_MFP3_PD12MFP_Pos)
#define NUMAKER_SYS_GPD_MFP3_PD12MFP_CAN1_RXD (0x05UL << NUMAKER_SYS_GPD_MFP3_PD12MFP_Pos)
#define NUMAKER_SYS_GPD_MFP3_PD12MFP_UART2_RXD (0x07UL << NUMAKER_SYS_GPD_MFP3_PD12MFP_Pos)
#define NUMAKER_SYS_GPD_MFP3_PD12MFP_UART8_nRTS (0x08UL << NUMAKER_SYS_GPD_MFP3_PD12MFP_Pos)
#define NUMAKER_SYS_GPD_MFP3_PD12MFP_BPWM0_CH5 (0x09UL << NUMAKER_SYS_GPD_MFP3_PD12MFP_Pos)
#define NUMAKER_SYS_GPD_MFP3_PD12MFP_EQEI0_INDEX (0x0aUL << NUMAKER_SYS_GPD_MFP3_PD12MFP_Pos)
#define NUMAKER_SYS_GPD_MFP3_PD12MFP_ECAP3_IC0 (0x0bUL << NUMAKER_SYS_GPD_MFP3_PD12MFP_Pos)
#define NUMAKER_SYS_GPD_MFP3_PD12MFP_CLKO (0x0dUL << NUMAKER_SYS_GPD_MFP3_PD12MFP_Pos)
#define NUMAKER_SYS_GPD_MFP3_PD12MFP_EADC0_ST (0x0eUL << NUMAKER_SYS_GPD_MFP3_PD12MFP_Pos)
#define NUMAKER_SYS_GPD_MFP3_PD12MFP_INT5 (0x0fUL << NUMAKER_SYS_GPD_MFP3_PD12MFP_Pos)
#define NUMAKER_SYS_GPD_MFP3_PD12MFP_SPI9_CLK (0x13UL << NUMAKER_SYS_GPD_MFP3_PD12MFP_Pos)
/* PD.13 MFP */
#define NUMAKER_SYS_GPD_MFP3_PD13MFP_GPIO (0x00UL << NUMAKER_SYS_GPD_MFP3_PD13MFP_Pos)
#define NUMAKER_SYS_GPD_MFP3_PD13MFP_EBI_AD10 (0x02UL << NUMAKER_SYS_GPD_MFP3_PD13MFP_Pos)
#define NUMAKER_SYS_GPD_MFP3_PD13MFP_SD0_nCD (0x03UL << NUMAKER_SYS_GPD_MFP3_PD13MFP_Pos)
#define NUMAKER_SYS_GPD_MFP3_PD13MFP_SPI0_I2SMCLK (0x04UL << NUMAKER_SYS_GPD_MFP3_PD13MFP_Pos)
#define NUMAKER_SYS_GPD_MFP3_PD13MFP_SPI1_I2SMCLK (0x05UL << NUMAKER_SYS_GPD_MFP3_PD13MFP_Pos)
#define NUMAKER_SYS_GPD_MFP3_PD13MFP_QSPI1_MOSI0 (0x06UL << NUMAKER_SYS_GPD_MFP3_PD13MFP_Pos)
#define NUMAKER_SYS_GPD_MFP3_PD13MFP_SC2_nCD (0x07UL << NUMAKER_SYS_GPD_MFP3_PD13MFP_Pos)
#define NUMAKER_SYS_GPD_MFP3_PD13MFP_SD1_CLK (0x08UL << NUMAKER_SYS_GPD_MFP3_PD13MFP_Pos)
#define NUMAKER_SYS_GPD_MFP3_PD13MFP_UART6_RXD (0x09UL << NUMAKER_SYS_GPD_MFP3_PD13MFP_Pos)
#define NUMAKER_SYS_GPD_MFP3_PD13MFP_I2S1_LRCK (0x0aUL << NUMAKER_SYS_GPD_MFP3_PD13MFP_Pos)
#define NUMAKER_SYS_GPD_MFP3_PD13MFP_BPWM0_CH0 (0x0bUL << NUMAKER_SYS_GPD_MFP3_PD13MFP_Pos)
#define NUMAKER_SYS_GPD_MFP3_PD13MFP_EQEI2_B (0x0cUL << NUMAKER_SYS_GPD_MFP3_PD13MFP_Pos)
#define NUMAKER_SYS_GPD_MFP3_PD13MFP_ECAP2_IC2 (0x0dUL << NUMAKER_SYS_GPD_MFP3_PD13MFP_Pos)
#define NUMAKER_SYS_GPD_MFP3_PD13MFP_CLKO (0x0eUL << NUMAKER_SYS_GPD_MFP3_PD13MFP_Pos)
#define NUMAKER_SYS_GPD_MFP3_PD13MFP_EADC0_ST (0x0fUL << NUMAKER_SYS_GPD_MFP3_PD13MFP_Pos)
#define NUMAKER_SYS_GPD_MFP3_PD13MFP_QSPI1_MOSI1 (0x13UL << NUMAKER_SYS_GPD_MFP3_PD13MFP_Pos)
/* PD.14 MFP */
#define NUMAKER_SYS_GPD_MFP3_PD14MFP_GPIO (0x00UL << NUMAKER_SYS_GPD_MFP3_PD14MFP_Pos)
#define NUMAKER_SYS_GPD_MFP3_PD14MFP_EBI_nCS0 (0x02UL << NUMAKER_SYS_GPD_MFP3_PD14MFP_Pos)
#define NUMAKER_SYS_GPD_MFP3_PD14MFP_SPI3_I2SMCLK (0x03UL << NUMAKER_SYS_GPD_MFP3_PD14MFP_Pos)
#define NUMAKER_SYS_GPD_MFP3_PD14MFP_SC1_nCD (0x04UL << NUMAKER_SYS_GPD_MFP3_PD14MFP_Pos)
#define NUMAKER_SYS_GPD_MFP3_PD14MFP_SPI0_I2SMCLK (0x05UL << NUMAKER_SYS_GPD_MFP3_PD14MFP_Pos)
#define NUMAKER_SYS_GPD_MFP3_PD14MFP_I2S1_BCLK (0x0aUL << NUMAKER_SYS_GPD_MFP3_PD14MFP_Pos)
#define NUMAKER_SYS_GPD_MFP3_PD14MFP_EPWM0_CH4 (0x0bUL << NUMAKER_SYS_GPD_MFP3_PD14MFP_Pos)
/* PE.0 MFP */
#define NUMAKER_SYS_GPE_MFP0_PE0MFP_GPIO (0x00UL << NUMAKER_SYS_GPE_MFP0_PE0MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE0MFP_EBI_AD11 (0x02UL << NUMAKER_SYS_GPE_MFP0_PE0MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE0MFP_QSPI0_MOSI0 (0x03UL << NUMAKER_SYS_GPE_MFP0_PE0MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE0MFP_SC2_CLK (0x04UL << NUMAKER_SYS_GPE_MFP0_PE0MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE0MFP_I2S0_MCLK (0x05UL << NUMAKER_SYS_GPE_MFP0_PE0MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE0MFP_SPI1_MOSI (0x06UL << NUMAKER_SYS_GPE_MFP0_PE0MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE0MFP_UART3_RXD (0x07UL << NUMAKER_SYS_GPE_MFP0_PE0MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE0MFP_I2C1_SDA (0x08UL << NUMAKER_SYS_GPE_MFP0_PE0MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE0MFP_UART4_nRTS (0x09UL << NUMAKER_SYS_GPE_MFP0_PE0MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE0MFP_UART8_RXD (0x0aUL << NUMAKER_SYS_GPE_MFP0_PE0MFP_Pos)
/* PE.1 MFP */
#define NUMAKER_SYS_GPE_MFP0_PE1MFP_GPIO (0x00UL << NUMAKER_SYS_GPE_MFP0_PE1MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE1MFP_EBI_AD10 (0x02UL << NUMAKER_SYS_GPE_MFP0_PE1MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE1MFP_QSPI0_MISO0 (0x03UL << NUMAKER_SYS_GPE_MFP0_PE1MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE1MFP_SC2_DAT (0x04UL << NUMAKER_SYS_GPE_MFP0_PE1MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE1MFP_I2S0_BCLK (0x05UL << NUMAKER_SYS_GPE_MFP0_PE1MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE1MFP_SPI1_MISO (0x06UL << NUMAKER_SYS_GPE_MFP0_PE1MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE1MFP_UART3_TXD (0x07UL << NUMAKER_SYS_GPE_MFP0_PE1MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE1MFP_I2C1_SCL (0x08UL << NUMAKER_SYS_GPE_MFP0_PE1MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE1MFP_UART4_nCTS (0x09UL << NUMAKER_SYS_GPE_MFP0_PE1MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE1MFP_UART8_TXD (0x0aUL << NUMAKER_SYS_GPE_MFP0_PE1MFP_Pos)
/* PE.2 MFP */
#define NUMAKER_SYS_GPE_MFP0_PE2MFP_GPIO (0x00UL << NUMAKER_SYS_GPE_MFP0_PE2MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE2MFP_EBI_ALE (0x02UL << NUMAKER_SYS_GPE_MFP0_PE2MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE2MFP_SD0_DAT0 (0x03UL << NUMAKER_SYS_GPE_MFP0_PE2MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE2MFP_SPIM_MOSI (0x04UL << NUMAKER_SYS_GPE_MFP0_PE2MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE2MFP_SPI3_MOSI (0x05UL << NUMAKER_SYS_GPE_MFP0_PE2MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE2MFP_SC0_CLK (0x06UL << NUMAKER_SYS_GPE_MFP0_PE2MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE2MFP_USCI0_CLK (0x07UL << NUMAKER_SYS_GPE_MFP0_PE2MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE2MFP_UART6_nCTS (0x08UL << NUMAKER_SYS_GPE_MFP0_PE2MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE2MFP_UART7_RXD (0x09UL << NUMAKER_SYS_GPE_MFP0_PE2MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE2MFP_UART8_nRTS (0x0aUL << NUMAKER_SYS_GPE_MFP0_PE2MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE2MFP_EQEI0_B (0x0bUL << NUMAKER_SYS_GPE_MFP0_PE2MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE2MFP_EPWM0_CH5 (0x0cUL << NUMAKER_SYS_GPE_MFP0_PE2MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE2MFP_BPWM0_CH0 (0x0dUL << NUMAKER_SYS_GPE_MFP0_PE2MFP_Pos)
/* PE.3 MFP */
#define NUMAKER_SYS_GPE_MFP0_PE3MFP_GPIO (0x00UL << NUMAKER_SYS_GPE_MFP0_PE3MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE3MFP_EBI_MCLK (0x02UL << NUMAKER_SYS_GPE_MFP0_PE3MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE3MFP_SD0_DAT1 (0x03UL << NUMAKER_SYS_GPE_MFP0_PE3MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE3MFP_SPIM_MISO (0x04UL << NUMAKER_SYS_GPE_MFP0_PE3MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE3MFP_SPI3_MISO (0x05UL << NUMAKER_SYS_GPE_MFP0_PE3MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE3MFP_SC0_DAT (0x06UL << NUMAKER_SYS_GPE_MFP0_PE3MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE3MFP_USCI0_DAT0 (0x07UL << NUMAKER_SYS_GPE_MFP0_PE3MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE3MFP_UART6_nRTS (0x08UL << NUMAKER_SYS_GPE_MFP0_PE3MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE3MFP_UART7_TXD (0x09UL << NUMAKER_SYS_GPE_MFP0_PE3MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE3MFP_UART8_nCTS (0x0aUL << NUMAKER_SYS_GPE_MFP0_PE3MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE3MFP_EQEI0_A (0x0bUL << NUMAKER_SYS_GPE_MFP0_PE3MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE3MFP_EPWM0_CH4 (0x0cUL << NUMAKER_SYS_GPE_MFP0_PE3MFP_Pos)
#define NUMAKER_SYS_GPE_MFP0_PE3MFP_BPWM0_CH1 (0x0dUL << NUMAKER_SYS_GPE_MFP0_PE3MFP_Pos)
/* PE.4 MFP */
#define NUMAKER_SYS_GPE_MFP1_PE4MFP_GPIO (0x00UL << NUMAKER_SYS_GPE_MFP1_PE4MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE4MFP_EBI_nWR (0x02UL << NUMAKER_SYS_GPE_MFP1_PE4MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE4MFP_SD0_DAT2 (0x03UL << NUMAKER_SYS_GPE_MFP1_PE4MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE4MFP_SPIM_CLK (0x04UL << NUMAKER_SYS_GPE_MFP1_PE4MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE4MFP_SPI3_CLK (0x05UL << NUMAKER_SYS_GPE_MFP1_PE4MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE4MFP_SC0_RST (0x06UL << NUMAKER_SYS_GPE_MFP1_PE4MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE4MFP_USCI0_DAT1 (0x07UL << NUMAKER_SYS_GPE_MFP1_PE4MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE4MFP_UART6_RXD (0x08UL << NUMAKER_SYS_GPE_MFP1_PE4MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE4MFP_UART7_nCTS (0x09UL << NUMAKER_SYS_GPE_MFP1_PE4MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE4MFP_UART9_RXD (0x0aUL << NUMAKER_SYS_GPE_MFP1_PE4MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE4MFP_EQEI0_INDEX (0x0bUL << NUMAKER_SYS_GPE_MFP1_PE4MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE4MFP_EPWM0_CH3 (0x0cUL << NUMAKER_SYS_GPE_MFP1_PE4MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE4MFP_BPWM0_CH2 (0x0dUL << NUMAKER_SYS_GPE_MFP1_PE4MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE4MFP_PSIO0_CH3 (0x11UL << NUMAKER_SYS_GPE_MFP1_PE4MFP_Pos)
/* PE.5 MFP */
#define NUMAKER_SYS_GPE_MFP1_PE5MFP_GPIO (0x00UL << NUMAKER_SYS_GPE_MFP1_PE5MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE5MFP_EBI_nRD (0x02UL << NUMAKER_SYS_GPE_MFP1_PE5MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE5MFP_SD0_DAT3 (0x03UL << NUMAKER_SYS_GPE_MFP1_PE5MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE5MFP_SPIM_SS (0x04UL << NUMAKER_SYS_GPE_MFP1_PE5MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE5MFP_SPI3_SS (0x05UL << NUMAKER_SYS_GPE_MFP1_PE5MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE5MFP_SC0_PWR (0x06UL << NUMAKER_SYS_GPE_MFP1_PE5MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE5MFP_USCI0_CTL1 (0x07UL << NUMAKER_SYS_GPE_MFP1_PE5MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE5MFP_UART6_TXD (0x08UL << NUMAKER_SYS_GPE_MFP1_PE5MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE5MFP_UART7_nRTS (0x09UL << NUMAKER_SYS_GPE_MFP1_PE5MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE5MFP_UART9_TXD (0x0aUL << NUMAKER_SYS_GPE_MFP1_PE5MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE5MFP_EQEI1_B (0x0bUL << NUMAKER_SYS_GPE_MFP1_PE5MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE5MFP_EPWM0_CH2 (0x0cUL << NUMAKER_SYS_GPE_MFP1_PE5MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE5MFP_BPWM0_CH3 (0x0dUL << NUMAKER_SYS_GPE_MFP1_PE5MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE5MFP_PSIO0_CH2 (0x11UL << NUMAKER_SYS_GPE_MFP1_PE5MFP_Pos)
/* PE.6 MFP */
#define NUMAKER_SYS_GPE_MFP1_PE6MFP_GPIO (0x00UL << NUMAKER_SYS_GPE_MFP1_PE6MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE6MFP_SD0_CLK (0x03UL << NUMAKER_SYS_GPE_MFP1_PE6MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE6MFP_SPIM_D3 (0x04UL << NUMAKER_SYS_GPE_MFP1_PE6MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE6MFP_SPI3_I2SMCLK (0x05UL << NUMAKER_SYS_GPE_MFP1_PE6MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE6MFP_SC0_nCD (0x06UL << NUMAKER_SYS_GPE_MFP1_PE6MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE6MFP_USCI0_CTL0 (0x07UL << NUMAKER_SYS_GPE_MFP1_PE6MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE6MFP_UART5_RXD (0x08UL << NUMAKER_SYS_GPE_MFP1_PE6MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE6MFP_CAN1_RXD (0x09UL << NUMAKER_SYS_GPE_MFP1_PE6MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE6MFP_UART9_nRTS (0x0aUL << NUMAKER_SYS_GPE_MFP1_PE6MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE6MFP_EQEI1_A (0x0bUL << NUMAKER_SYS_GPE_MFP1_PE6MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE6MFP_EPWM0_CH1 (0x0cUL << NUMAKER_SYS_GPE_MFP1_PE6MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE6MFP_BPWM0_CH4 (0x0dUL << NUMAKER_SYS_GPE_MFP1_PE6MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE6MFP_ACMP3_O (0x0eUL << NUMAKER_SYS_GPE_MFP1_PE6MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE6MFP_PSIO0_CH1 (0x11UL << NUMAKER_SYS_GPE_MFP1_PE6MFP_Pos)
/* PE.7 MFP */
#define NUMAKER_SYS_GPE_MFP1_PE7MFP_GPIO (0x00UL << NUMAKER_SYS_GPE_MFP1_PE7MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE7MFP_SD0_CMD (0x03UL << NUMAKER_SYS_GPE_MFP1_PE7MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE7MFP_SPIM_D2 (0x04UL << NUMAKER_SYS_GPE_MFP1_PE7MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE7MFP_UART5_TXD (0x08UL << NUMAKER_SYS_GPE_MFP1_PE7MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE7MFP_CAN1_TXD (0x09UL << NUMAKER_SYS_GPE_MFP1_PE7MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE7MFP_UART9_nCTS (0x0aUL << NUMAKER_SYS_GPE_MFP1_PE7MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE7MFP_EQEI1_INDEX (0x0bUL << NUMAKER_SYS_GPE_MFP1_PE7MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE7MFP_EPWM0_CH0 (0x0cUL << NUMAKER_SYS_GPE_MFP1_PE7MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE7MFP_BPWM0_CH5 (0x0dUL << NUMAKER_SYS_GPE_MFP1_PE7MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE7MFP_ACMP2_O (0x0eUL << NUMAKER_SYS_GPE_MFP1_PE7MFP_Pos)
#define NUMAKER_SYS_GPE_MFP1_PE7MFP_PSIO0_CH0 (0x11UL << NUMAKER_SYS_GPE_MFP1_PE7MFP_Pos)
/* PE.8 MFP */
#define NUMAKER_SYS_GPE_MFP2_PE8MFP_GPIO (0x00UL << NUMAKER_SYS_GPE_MFP2_PE8MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE8MFP_EBI_ADR10 (0x02UL << NUMAKER_SYS_GPE_MFP2_PE8MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE8MFP_EMAC0_RMII_MDC (0x03UL << NUMAKER_SYS_GPE_MFP2_PE8MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE8MFP_I2S0_BCLK (0x04UL << NUMAKER_SYS_GPE_MFP2_PE8MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE8MFP_SPI2_CLK (0x05UL << NUMAKER_SYS_GPE_MFP2_PE8MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE8MFP_UART2_TXD (0x07UL << NUMAKER_SYS_GPE_MFP2_PE8MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE8MFP_EPWM0_CH0 (0x0aUL << NUMAKER_SYS_GPE_MFP2_PE8MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE8MFP_EPWM0_BRAKE0 (0x0bUL << NUMAKER_SYS_GPE_MFP2_PE8MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE8MFP_ECAP0_IC0 (0x0cUL << NUMAKER_SYS_GPE_MFP2_PE8MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE8MFP_EQEI2_INDEX (0x0dUL << NUMAKER_SYS_GPE_MFP2_PE8MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE8MFP_TRACE_DATA3 (0x0eUL << NUMAKER_SYS_GPE_MFP2_PE8MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE8MFP_ECAP3_IC0 (0x0fUL << NUMAKER_SYS_GPE_MFP2_PE8MFP_Pos)
/* PE.9 MFP */
#define NUMAKER_SYS_GPE_MFP2_PE9MFP_GPIO (0x00UL << NUMAKER_SYS_GPE_MFP2_PE9MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE9MFP_EBI_ADR11 (0x02UL << NUMAKER_SYS_GPE_MFP2_PE9MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE9MFP_EMAC0_RMII_MDIO (0x03UL << NUMAKER_SYS_GPE_MFP2_PE9MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE9MFP_I2S0_MCLK (0x04UL << NUMAKER_SYS_GPE_MFP2_PE9MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE9MFP_SPI2_MISO (0x05UL << NUMAKER_SYS_GPE_MFP2_PE9MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE9MFP_UART2_RXD (0x07UL << NUMAKER_SYS_GPE_MFP2_PE9MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE9MFP_EPWM0_CH1 (0x0aUL << NUMAKER_SYS_GPE_MFP2_PE9MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE9MFP_EPWM0_BRAKE1 (0x0bUL << NUMAKER_SYS_GPE_MFP2_PE9MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE9MFP_ECAP0_IC1 (0x0cUL << NUMAKER_SYS_GPE_MFP2_PE9MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE9MFP_EQEI2_A (0x0dUL << NUMAKER_SYS_GPE_MFP2_PE9MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE9MFP_TRACE_DATA2 (0x0eUL << NUMAKER_SYS_GPE_MFP2_PE9MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE9MFP_ECAP3_IC1 (0x0fUL << NUMAKER_SYS_GPE_MFP2_PE9MFP_Pos)
/* PE.10 MFP */
#define NUMAKER_SYS_GPE_MFP2_PE10MFP_GPIO (0x00UL << NUMAKER_SYS_GPE_MFP2_PE10MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE10MFP_EBI_ADR12 (0x02UL << NUMAKER_SYS_GPE_MFP2_PE10MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE10MFP_EMAC0_RMII_TXD0 (0x03UL << NUMAKER_SYS_GPE_MFP2_PE10MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE10MFP_I2S0_DI (0x04UL << NUMAKER_SYS_GPE_MFP2_PE10MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE10MFP_SPI2_MOSI (0x05UL << NUMAKER_SYS_GPE_MFP2_PE10MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE10MFP_UART3_TXD (0x07UL << NUMAKER_SYS_GPE_MFP2_PE10MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE10MFP_EPWM0_CH2 (0x0aUL << NUMAKER_SYS_GPE_MFP2_PE10MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE10MFP_EPWM1_BRAKE0 (0x0bUL << NUMAKER_SYS_GPE_MFP2_PE10MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE10MFP_ECAP0_IC2 (0x0cUL << NUMAKER_SYS_GPE_MFP2_PE10MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE10MFP_EQEI2_B (0x0dUL << NUMAKER_SYS_GPE_MFP2_PE10MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE10MFP_TRACE_DATA1 (0x0eUL << NUMAKER_SYS_GPE_MFP2_PE10MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE10MFP_ECAP3_IC2 (0x0fUL << NUMAKER_SYS_GPE_MFP2_PE10MFP_Pos)
/* PE.11 MFP */
#define NUMAKER_SYS_GPE_MFP2_PE11MFP_GPIO (0x00UL << NUMAKER_SYS_GPE_MFP2_PE11MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE11MFP_EBI_ADR13 (0x02UL << NUMAKER_SYS_GPE_MFP2_PE11MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE11MFP_EMAC0_RMII_TXD1 (0x03UL << NUMAKER_SYS_GPE_MFP2_PE11MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE11MFP_I2S0_DO (0x04UL << NUMAKER_SYS_GPE_MFP2_PE11MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE11MFP_SPI2_SS (0x05UL << NUMAKER_SYS_GPE_MFP2_PE11MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE11MFP_UART3_RXD (0x07UL << NUMAKER_SYS_GPE_MFP2_PE11MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE11MFP_UART1_nCTS (0x08UL << NUMAKER_SYS_GPE_MFP2_PE11MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE11MFP_EPWM0_CH3 (0x0aUL << NUMAKER_SYS_GPE_MFP2_PE11MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE11MFP_EPWM1_BRAKE1 (0x0bUL << NUMAKER_SYS_GPE_MFP2_PE11MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE11MFP_ECAP1_IC2 (0x0dUL << NUMAKER_SYS_GPE_MFP2_PE11MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE11MFP_TRACE_DATA0 (0x0eUL << NUMAKER_SYS_GPE_MFP2_PE11MFP_Pos)
#define NUMAKER_SYS_GPE_MFP2_PE11MFP_KPI_COL7 (0x12UL << NUMAKER_SYS_GPE_MFP2_PE11MFP_Pos)
/* PE.12 MFP */
#define NUMAKER_SYS_GPE_MFP3_PE12MFP_GPIO (0x00UL << NUMAKER_SYS_GPE_MFP3_PE12MFP_Pos)
#define NUMAKER_SYS_GPE_MFP3_PE12MFP_EBI_ADR14 (0x02UL << NUMAKER_SYS_GPE_MFP3_PE12MFP_Pos)
#define NUMAKER_SYS_GPE_MFP3_PE12MFP_EMAC0_RMII_TXEN (0x03UL << NUMAKER_SYS_GPE_MFP3_PE12MFP_Pos)
#define NUMAKER_SYS_GPE_MFP3_PE12MFP_I2S0_LRCK (0x04UL << NUMAKER_SYS_GPE_MFP3_PE12MFP_Pos)
#define NUMAKER_SYS_GPE_MFP3_PE12MFP_SPI2_I2SMCLK (0x05UL << NUMAKER_SYS_GPE_MFP3_PE12MFP_Pos)
#define NUMAKER_SYS_GPE_MFP3_PE12MFP_UART1_nRTS (0x08UL << NUMAKER_SYS_GPE_MFP3_PE12MFP_Pos)
#define NUMAKER_SYS_GPE_MFP3_PE12MFP_EPWM0_CH4 (0x0aUL << NUMAKER_SYS_GPE_MFP3_PE12MFP_Pos)
#define NUMAKER_SYS_GPE_MFP3_PE12MFP_ECAP1_IC1 (0x0dUL << NUMAKER_SYS_GPE_MFP3_PE12MFP_Pos)
#define NUMAKER_SYS_GPE_MFP3_PE12MFP_TRACE_CLK (0x0eUL << NUMAKER_SYS_GPE_MFP3_PE12MFP_Pos)
#define NUMAKER_SYS_GPE_MFP3_PE12MFP_KPI_COL6 (0x12UL << NUMAKER_SYS_GPE_MFP3_PE12MFP_Pos)
/* PE.13 MFP */
#define NUMAKER_SYS_GPE_MFP3_PE13MFP_GPIO (0x00UL << NUMAKER_SYS_GPE_MFP3_PE13MFP_Pos)
#define NUMAKER_SYS_GPE_MFP3_PE13MFP_EBI_ADR15 (0x02UL << NUMAKER_SYS_GPE_MFP3_PE13MFP_Pos)
#define NUMAKER_SYS_GPE_MFP3_PE13MFP_EMAC0_PPS (0x03UL << NUMAKER_SYS_GPE_MFP3_PE13MFP_Pos)
#define NUMAKER_SYS_GPE_MFP3_PE13MFP_I2C0_SCL (0x04UL << NUMAKER_SYS_GPE_MFP3_PE13MFP_Pos)
#define NUMAKER_SYS_GPE_MFP3_PE13MFP_UART4_nRTS (0x05UL << NUMAKER_SYS_GPE_MFP3_PE13MFP_Pos)
#define NUMAKER_SYS_GPE_MFP3_PE13MFP_UART1_TXD (0x08UL << NUMAKER_SYS_GPE_MFP3_PE13MFP_Pos)
#define NUMAKER_SYS_GPE_MFP3_PE13MFP_EPWM0_CH5 (0x0aUL << NUMAKER_SYS_GPE_MFP3_PE13MFP_Pos)
#define NUMAKER_SYS_GPE_MFP3_PE13MFP_EPWM1_CH0 (0x0bUL << NUMAKER_SYS_GPE_MFP3_PE13MFP_Pos)
#define NUMAKER_SYS_GPE_MFP3_PE13MFP_BPWM1_CH5 (0x0cUL << NUMAKER_SYS_GPE_MFP3_PE13MFP_Pos)
#define NUMAKER_SYS_GPE_MFP3_PE13MFP_ECAP1_IC0 (0x0dUL << NUMAKER_SYS_GPE_MFP3_PE13MFP_Pos)
#define NUMAKER_SYS_GPE_MFP3_PE13MFP_TRACE_SWO (0x0eUL << NUMAKER_SYS_GPE_MFP3_PE13MFP_Pos)
#define NUMAKER_SYS_GPE_MFP3_PE13MFP_KPI_COL5 (0x12UL << NUMAKER_SYS_GPE_MFP3_PE13MFP_Pos)
/* PE.14 MFP */
#define NUMAKER_SYS_GPE_MFP3_PE14MFP_GPIO (0x00UL << NUMAKER_SYS_GPE_MFP3_PE14MFP_Pos)
#define NUMAKER_SYS_GPE_MFP3_PE14MFP_EBI_AD8 (0x02UL << NUMAKER_SYS_GPE_MFP3_PE14MFP_Pos)
#define NUMAKER_SYS_GPE_MFP3_PE14MFP_UART2_TXD (0x03UL << NUMAKER_SYS_GPE_MFP3_PE14MFP_Pos)
#define NUMAKER_SYS_GPE_MFP3_PE14MFP_CAN0_TXD (0x04UL << NUMAKER_SYS_GPE_MFP3_PE14MFP_Pos)
#define NUMAKER_SYS_GPE_MFP3_PE14MFP_SD1_nCD (0x05UL << NUMAKER_SYS_GPE_MFP3_PE14MFP_Pos)
#define NUMAKER_SYS_GPE_MFP3_PE14MFP_UART6_TXD (0x06UL << NUMAKER_SYS_GPE_MFP3_PE14MFP_Pos)
#define NUMAKER_SYS_GPE_MFP3_PE14MFP_PSIO0_CH0 (0x11UL << NUMAKER_SYS_GPE_MFP3_PE14MFP_Pos)
/* PE.15 MFP */
#define NUMAKER_SYS_GPE_MFP3_PE15MFP_GPIO (0x00UL << NUMAKER_SYS_GPE_MFP3_PE15MFP_Pos)
#define NUMAKER_SYS_GPE_MFP3_PE15MFP_EBI_AD9 (0x02UL << NUMAKER_SYS_GPE_MFP3_PE15MFP_Pos)
#define NUMAKER_SYS_GPE_MFP3_PE15MFP_UART2_RXD (0x03UL << NUMAKER_SYS_GPE_MFP3_PE15MFP_Pos)
#define NUMAKER_SYS_GPE_MFP3_PE15MFP_CAN0_RXD (0x04UL << NUMAKER_SYS_GPE_MFP3_PE15MFP_Pos)
#define NUMAKER_SYS_GPE_MFP3_PE15MFP_UART6_RXD (0x06UL << NUMAKER_SYS_GPE_MFP3_PE15MFP_Pos)
#define NUMAKER_SYS_GPE_MFP3_PE15MFP_PSIO0_CH1 (0x11UL << NUMAKER_SYS_GPE_MFP3_PE15MFP_Pos)
/* PF.0 MFP */
#define NUMAKER_SYS_GPF_MFP0_PF0MFP_GPIO (0x00UL << NUMAKER_SYS_GPF_MFP0_PF0MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF0MFP_UART1_TXD (0x02UL << NUMAKER_SYS_GPF_MFP0_PF0MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF0MFP_I2C1_SCL (0x03UL << NUMAKER_SYS_GPF_MFP0_PF0MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF0MFP_UART0_TXD (0x04UL << NUMAKER_SYS_GPF_MFP0_PF0MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF0MFP_SC1_DAT (0x05UL << NUMAKER_SYS_GPF_MFP0_PF0MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF0MFP_I2S0_DO (0x06UL << NUMAKER_SYS_GPF_MFP0_PF0MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF0MFP_UART2_TXD (0x08UL << NUMAKER_SYS_GPF_MFP0_PF0MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF0MFP_I2C0_SCL (0x09UL << NUMAKER_SYS_GPF_MFP0_PF0MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF0MFP_CAN2_TXD (0x0aUL << NUMAKER_SYS_GPF_MFP0_PF0MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF0MFP_EPWM1_CH4 (0x0bUL << NUMAKER_SYS_GPF_MFP0_PF0MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF0MFP_BPWM1_CH0 (0x0cUL << NUMAKER_SYS_GPF_MFP0_PF0MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF0MFP_ACMP0_O (0x0dUL << NUMAKER_SYS_GPF_MFP0_PF0MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF0MFP_ICE_DAT (0x0eUL << NUMAKER_SYS_GPF_MFP0_PF0MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF0MFP_EADC0_ST (0x0fUL << NUMAKER_SYS_GPF_MFP0_PF0MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF0MFP_QSPI1_MISO0 (0x13UL << NUMAKER_SYS_GPF_MFP0_PF0MFP_Pos)
/* PF.1 MFP */
#define NUMAKER_SYS_GPF_MFP0_PF1MFP_GPIO (0x00UL << NUMAKER_SYS_GPF_MFP0_PF1MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF1MFP_UART1_RXD (0x02UL << NUMAKER_SYS_GPF_MFP0_PF1MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF1MFP_I2C1_SDA (0x03UL << NUMAKER_SYS_GPF_MFP0_PF1MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF1MFP_UART0_RXD (0x04UL << NUMAKER_SYS_GPF_MFP0_PF1MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF1MFP_SC1_CLK (0x05UL << NUMAKER_SYS_GPF_MFP0_PF1MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF1MFP_I2S0_LRCK (0x06UL << NUMAKER_SYS_GPF_MFP0_PF1MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF1MFP_UART2_RXD (0x08UL << NUMAKER_SYS_GPF_MFP0_PF1MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF1MFP_I2C0_SDA (0x09UL << NUMAKER_SYS_GPF_MFP0_PF1MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF1MFP_CAN2_RXD (0x0aUL << NUMAKER_SYS_GPF_MFP0_PF1MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF1MFP_EPWM1_CH5 (0x0bUL << NUMAKER_SYS_GPF_MFP0_PF1MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF1MFP_BPWM1_CH1 (0x0cUL << NUMAKER_SYS_GPF_MFP0_PF1MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF1MFP_ACMP1_O (0x0dUL << NUMAKER_SYS_GPF_MFP0_PF1MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF1MFP_ICE_CLK (0x0eUL << NUMAKER_SYS_GPF_MFP0_PF1MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF1MFP_EADC1_ST (0x0fUL << NUMAKER_SYS_GPF_MFP0_PF1MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF1MFP_QSPI1_MOSI0 (0x13UL << NUMAKER_SYS_GPF_MFP0_PF1MFP_Pos)
/* PF.2 MFP */
#define NUMAKER_SYS_GPF_MFP0_PF2MFP_GPIO (0x00UL << NUMAKER_SYS_GPF_MFP0_PF2MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF2MFP_EBI_nCS1 (0x02UL << NUMAKER_SYS_GPF_MFP0_PF2MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF2MFP_UART0_RXD (0x03UL << NUMAKER_SYS_GPF_MFP0_PF2MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF2MFP_I2C0_SDA (0x04UL << NUMAKER_SYS_GPF_MFP0_PF2MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF2MFP_QSPI0_CLK (0x05UL << NUMAKER_SYS_GPF_MFP0_PF2MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF2MFP_UART9_RXD (0x07UL << NUMAKER_SYS_GPF_MFP0_PF2MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF2MFP_XT1_OUT (0x0aUL << NUMAKER_SYS_GPF_MFP0_PF2MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF2MFP_BPWM1_CH1 (0x0bUL << NUMAKER_SYS_GPF_MFP0_PF2MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF2MFP_I2C4_SMBSUS (0x0cUL << NUMAKER_SYS_GPF_MFP0_PF2MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF2MFP_ACMP3_O (0x0dUL << NUMAKER_SYS_GPF_MFP0_PF2MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF2MFP_BMC13 (0x14UL << NUMAKER_SYS_GPF_MFP0_PF2MFP_Pos)
/* PF.3 MFP */
#define NUMAKER_SYS_GPF_MFP0_PF3MFP_GPIO (0x00UL << NUMAKER_SYS_GPF_MFP0_PF3MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF3MFP_EBI_nCS0 (0x02UL << NUMAKER_SYS_GPF_MFP0_PF3MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF3MFP_UART0_TXD (0x03UL << NUMAKER_SYS_GPF_MFP0_PF3MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF3MFP_I2C0_SCL (0x04UL << NUMAKER_SYS_GPF_MFP0_PF3MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF3MFP_UART9_TXD (0x07UL << NUMAKER_SYS_GPF_MFP0_PF3MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF3MFP_XT1_IN (0x0aUL << NUMAKER_SYS_GPF_MFP0_PF3MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF3MFP_BPWM1_CH0 (0x0bUL << NUMAKER_SYS_GPF_MFP0_PF3MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF3MFP_I2C4_SMBAL (0x0cUL << NUMAKER_SYS_GPF_MFP0_PF3MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF3MFP_ACMP2_O (0x0dUL << NUMAKER_SYS_GPF_MFP0_PF3MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF3MFP_EADC2_ST (0x0fUL << NUMAKER_SYS_GPF_MFP0_PF3MFP_Pos)
#define NUMAKER_SYS_GPF_MFP0_PF3MFP_BMC12 (0x14UL << NUMAKER_SYS_GPF_MFP0_PF3MFP_Pos)
/* PF.4 MFP */
#define NUMAKER_SYS_GPF_MFP1_PF4MFP_GPIO (0x00UL << NUMAKER_SYS_GPF_MFP1_PF4MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF4MFP_UART2_TXD (0x02UL << NUMAKER_SYS_GPF_MFP1_PF4MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF4MFP_EBI_AD0 (0x03UL << NUMAKER_SYS_GPF_MFP1_PF4MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF4MFP_UART2_nRTS (0x04UL << NUMAKER_SYS_GPF_MFP1_PF4MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF4MFP_EPWM0_CH1 (0x07UL << NUMAKER_SYS_GPF_MFP1_PF4MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF4MFP_BPWM0_CH5 (0x08UL << NUMAKER_SYS_GPF_MFP1_PF4MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF4MFP_X32_OUT (0x0aUL << NUMAKER_SYS_GPF_MFP1_PF4MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF4MFP_EADC1_ST (0x0bUL << NUMAKER_SYS_GPF_MFP1_PF4MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF4MFP_I2C4_SDA (0x0cUL << NUMAKER_SYS_GPF_MFP1_PF4MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF4MFP_EQEI2_B (0x0dUL << NUMAKER_SYS_GPF_MFP1_PF4MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF4MFP_SPI5_MISO (0x13UL << NUMAKER_SYS_GPF_MFP1_PF4MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF4MFP_BMC11 (0x14UL << NUMAKER_SYS_GPF_MFP1_PF4MFP_Pos)
/* PF.5 MFP */
#define NUMAKER_SYS_GPF_MFP1_PF5MFP_GPIO (0x00UL << NUMAKER_SYS_GPF_MFP1_PF5MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF5MFP_UART2_RXD (0x02UL << NUMAKER_SYS_GPF_MFP1_PF5MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF5MFP_EBI_AD1 (0x03UL << NUMAKER_SYS_GPF_MFP1_PF5MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF5MFP_UART2_nCTS (0x04UL << NUMAKER_SYS_GPF_MFP1_PF5MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF5MFP_EPWM0_CH0 (0x07UL << NUMAKER_SYS_GPF_MFP1_PF5MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF5MFP_BPWM0_CH4 (0x08UL << NUMAKER_SYS_GPF_MFP1_PF5MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF5MFP_EPWM0_SYNC_OUT (0x09UL << NUMAKER_SYS_GPF_MFP1_PF5MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF5MFP_X32_IN (0x0aUL << NUMAKER_SYS_GPF_MFP1_PF5MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF5MFP_EADC0_ST (0x0bUL << NUMAKER_SYS_GPF_MFP1_PF5MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF5MFP_I2C4_SCL (0x0cUL << NUMAKER_SYS_GPF_MFP1_PF5MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF5MFP_EQEI2_A (0x0dUL << NUMAKER_SYS_GPF_MFP1_PF5MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF5MFP_SPI5_MOSI (0x13UL << NUMAKER_SYS_GPF_MFP1_PF5MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF5MFP_BMC10 (0x14UL << NUMAKER_SYS_GPF_MFP1_PF5MFP_Pos)
/* PF.6 MFP */
#define NUMAKER_SYS_GPF_MFP1_PF6MFP_GPIO (0x00UL << NUMAKER_SYS_GPF_MFP1_PF6MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF6MFP_EBI_ADR19 (0x02UL << NUMAKER_SYS_GPF_MFP1_PF6MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF6MFP_SC0_CLK (0x03UL << NUMAKER_SYS_GPF_MFP1_PF6MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF6MFP_I2S0_LRCK (0x04UL << NUMAKER_SYS_GPF_MFP1_PF6MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF6MFP_SPI0_MOSI (0x05UL << NUMAKER_SYS_GPF_MFP1_PF6MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF6MFP_UART4_RXD (0x06UL << NUMAKER_SYS_GPF_MFP1_PF6MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF6MFP_EBI_nCS0 (0x07UL << NUMAKER_SYS_GPF_MFP1_PF6MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF6MFP_CAN2_RXD (0x08UL << NUMAKER_SYS_GPF_MFP1_PF6MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF6MFP_SPI3_I2SMCLK (0x09UL << NUMAKER_SYS_GPF_MFP1_PF6MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF6MFP_TAMPER0 (0x0aUL << NUMAKER_SYS_GPF_MFP1_PF6MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF6MFP_EQEI2_INDEX (0x0dUL << NUMAKER_SYS_GPF_MFP1_PF6MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF6MFP_TRACE_SWO (0x0eUL << NUMAKER_SYS_GPF_MFP1_PF6MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF6MFP_SPI5_CLK (0x13UL << NUMAKER_SYS_GPF_MFP1_PF6MFP_Pos)
/* PF.7 MFP */
#define NUMAKER_SYS_GPF_MFP1_PF7MFP_GPIO (0x00UL << NUMAKER_SYS_GPF_MFP1_PF7MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF7MFP_EBI_ADR18 (0x02UL << NUMAKER_SYS_GPF_MFP1_PF7MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF7MFP_SC0_DAT (0x03UL << NUMAKER_SYS_GPF_MFP1_PF7MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF7MFP_I2S0_DO (0x04UL << NUMAKER_SYS_GPF_MFP1_PF7MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF7MFP_SPI0_MISO (0x05UL << NUMAKER_SYS_GPF_MFP1_PF7MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF7MFP_UART4_TXD (0x06UL << NUMAKER_SYS_GPF_MFP1_PF7MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF7MFP_CCAP_DATA0 (0x07UL << NUMAKER_SYS_GPF_MFP1_PF7MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF7MFP_CAN2_TXD (0x08UL << NUMAKER_SYS_GPF_MFP1_PF7MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF7MFP_TAMPER1 (0x0aUL << NUMAKER_SYS_GPF_MFP1_PF7MFP_Pos)
#define NUMAKER_SYS_GPF_MFP1_PF7MFP_SPI5_SS (0x13UL << NUMAKER_SYS_GPF_MFP1_PF7MFP_Pos)
/* PF.8 MFP */
#define NUMAKER_SYS_GPF_MFP2_PF8MFP_GPIO (0x00UL << NUMAKER_SYS_GPF_MFP2_PF8MFP_Pos)
#define NUMAKER_SYS_GPF_MFP2_PF8MFP_EBI_ADR17 (0x02UL << NUMAKER_SYS_GPF_MFP2_PF8MFP_Pos)
#define NUMAKER_SYS_GPF_MFP2_PF8MFP_SC0_RST (0x03UL << NUMAKER_SYS_GPF_MFP2_PF8MFP_Pos)
#define NUMAKER_SYS_GPF_MFP2_PF8MFP_I2S0_DI (0x04UL << NUMAKER_SYS_GPF_MFP2_PF8MFP_Pos)
#define NUMAKER_SYS_GPF_MFP2_PF8MFP_SPI0_CLK (0x05UL << NUMAKER_SYS_GPF_MFP2_PF8MFP_Pos)
#define NUMAKER_SYS_GPF_MFP2_PF8MFP_UART5_nCTS (0x06UL << NUMAKER_SYS_GPF_MFP2_PF8MFP_Pos)
#define NUMAKER_SYS_GPF_MFP2_PF8MFP_CCAP_DATA1 (0x07UL << NUMAKER_SYS_GPF_MFP2_PF8MFP_Pos)
#define NUMAKER_SYS_GPF_MFP2_PF8MFP_CAN1_RXD (0x08UL << NUMAKER_SYS_GPF_MFP2_PF8MFP_Pos)
#define NUMAKER_SYS_GPF_MFP2_PF8MFP_TAMPER2 (0x0aUL << NUMAKER_SYS_GPF_MFP2_PF8MFP_Pos)
#define NUMAKER_SYS_GPF_MFP2_PF8MFP_UART9_RXD (0x0bUL << NUMAKER_SYS_GPF_MFP2_PF8MFP_Pos)
/* PF.9 MFP */
#define NUMAKER_SYS_GPF_MFP2_PF9MFP_GPIO (0x00UL << NUMAKER_SYS_GPF_MFP2_PF9MFP_Pos)
#define NUMAKER_SYS_GPF_MFP2_PF9MFP_EBI_ADR16 (0x02UL << NUMAKER_SYS_GPF_MFP2_PF9MFP_Pos)
#define NUMAKER_SYS_GPF_MFP2_PF9MFP_SC0_PWR (0x03UL << NUMAKER_SYS_GPF_MFP2_PF9MFP_Pos)
#define NUMAKER_SYS_GPF_MFP2_PF9MFP_I2S0_MCLK (0x04UL << NUMAKER_SYS_GPF_MFP2_PF9MFP_Pos)
#define NUMAKER_SYS_GPF_MFP2_PF9MFP_SPI0_SS (0x05UL << NUMAKER_SYS_GPF_MFP2_PF9MFP_Pos)
#define NUMAKER_SYS_GPF_MFP2_PF9MFP_UART5_nRTS (0x06UL << NUMAKER_SYS_GPF_MFP2_PF9MFP_Pos)
#define NUMAKER_SYS_GPF_MFP2_PF9MFP_CCAP_DATA2 (0x07UL << NUMAKER_SYS_GPF_MFP2_PF9MFP_Pos)
#define NUMAKER_SYS_GPF_MFP2_PF9MFP_CAN1_TXD (0x08UL << NUMAKER_SYS_GPF_MFP2_PF9MFP_Pos)
#define NUMAKER_SYS_GPF_MFP2_PF9MFP_TAMPER3 (0x0aUL << NUMAKER_SYS_GPF_MFP2_PF9MFP_Pos)
#define NUMAKER_SYS_GPF_MFP2_PF9MFP_UART9_TXD (0x0bUL << NUMAKER_SYS_GPF_MFP2_PF9MFP_Pos)
/* PF.10 MFP */
#define NUMAKER_SYS_GPF_MFP2_PF10MFP_GPIO (0x00UL << NUMAKER_SYS_GPF_MFP2_PF10MFP_Pos)
#define NUMAKER_SYS_GPF_MFP2_PF10MFP_EBI_ADR15 (0x02UL << NUMAKER_SYS_GPF_MFP2_PF10MFP_Pos)
#define NUMAKER_SYS_GPF_MFP2_PF10MFP_SC0_nCD (0x03UL << NUMAKER_SYS_GPF_MFP2_PF10MFP_Pos)
#define NUMAKER_SYS_GPF_MFP2_PF10MFP_I2S0_BCLK (0x04UL << NUMAKER_SYS_GPF_MFP2_PF10MFP_Pos)
#define NUMAKER_SYS_GPF_MFP2_PF10MFP_SPI0_I2SMCLK (0x05UL << NUMAKER_SYS_GPF_MFP2_PF10MFP_Pos)
#define NUMAKER_SYS_GPF_MFP2_PF10MFP_UART5_RXD (0x06UL << NUMAKER_SYS_GPF_MFP2_PF10MFP_Pos)
#define NUMAKER_SYS_GPF_MFP2_PF10MFP_CCAP_DATA3 (0x07UL << NUMAKER_SYS_GPF_MFP2_PF10MFP_Pos)
#define NUMAKER_SYS_GPF_MFP2_PF10MFP_CAN3_RXD (0x08UL << NUMAKER_SYS_GPF_MFP2_PF10MFP_Pos)
#define NUMAKER_SYS_GPF_MFP2_PF10MFP_TAMPER4 (0x0aUL << NUMAKER_SYS_GPF_MFP2_PF10MFP_Pos)
#define NUMAKER_SYS_GPF_MFP2_PF10MFP_UART9_nRTS (0x0bUL << NUMAKER_SYS_GPF_MFP2_PF10MFP_Pos)
/* PF.11 MFP */
#define NUMAKER_SYS_GPF_MFP2_PF11MFP_GPIO (0x00UL << NUMAKER_SYS_GPF_MFP2_PF11MFP_Pos)
#define NUMAKER_SYS_GPF_MFP2_PF11MFP_EBI_ADR14 (0x02UL << NUMAKER_SYS_GPF_MFP2_PF11MFP_Pos)
#define NUMAKER_SYS_GPF_MFP2_PF11MFP_SPI2_MOSI (0x03UL << NUMAKER_SYS_GPF_MFP2_PF11MFP_Pos)
#define NUMAKER_SYS_GPF_MFP2_PF11MFP_UART5_TXD (0x06UL << NUMAKER_SYS_GPF_MFP2_PF11MFP_Pos)
#define NUMAKER_SYS_GPF_MFP2_PF11MFP_CCAP_DATA4 (0x07UL << NUMAKER_SYS_GPF_MFP2_PF11MFP_Pos)
#define NUMAKER_SYS_GPF_MFP2_PF11MFP_CAN3_TXD (0x08UL << NUMAKER_SYS_GPF_MFP2_PF11MFP_Pos)
#define NUMAKER_SYS_GPF_MFP2_PF11MFP_TAMPER5 (0x0aUL << NUMAKER_SYS_GPF_MFP2_PF11MFP_Pos)
#define NUMAKER_SYS_GPF_MFP2_PF11MFP_UART9_nCTS (0x0bUL << NUMAKER_SYS_GPF_MFP2_PF11MFP_Pos)
#define NUMAKER_SYS_GPF_MFP2_PF11MFP_TM3 (0x0dUL << NUMAKER_SYS_GPF_MFP2_PF11MFP_Pos)
/* PG.0 MFP */
#define NUMAKER_SYS_GPG_MFP0_PG0MFP_GPIO (0x00UL << NUMAKER_SYS_GPG_MFP0_PG0MFP_Pos)
#define NUMAKER_SYS_GPG_MFP0_PG0MFP_EBI_ADR8 (0x02UL << NUMAKER_SYS_GPG_MFP0_PG0MFP_Pos)
#define NUMAKER_SYS_GPG_MFP0_PG0MFP_I2C0_SCL (0x04UL << NUMAKER_SYS_GPG_MFP0_PG0MFP_Pos)
#define NUMAKER_SYS_GPG_MFP0_PG0MFP_I2C1_SMBAL (0x05UL << NUMAKER_SYS_GPG_MFP0_PG0MFP_Pos)
#define NUMAKER_SYS_GPG_MFP0_PG0MFP_UART2_RXD (0x06UL << NUMAKER_SYS_GPG_MFP0_PG0MFP_Pos)
#define NUMAKER_SYS_GPG_MFP0_PG0MFP_CAN1_TXD (0x07UL << NUMAKER_SYS_GPG_MFP0_PG0MFP_Pos)
#define NUMAKER_SYS_GPG_MFP0_PG0MFP_UART1_TXD (0x08UL << NUMAKER_SYS_GPG_MFP0_PG0MFP_Pos)
#define NUMAKER_SYS_GPG_MFP0_PG0MFP_I2C3_SCL (0x09UL << NUMAKER_SYS_GPG_MFP0_PG0MFP_Pos)
/* PG.1 MFP */
#define NUMAKER_SYS_GPG_MFP0_PG1MFP_GPIO (0x00UL << NUMAKER_SYS_GPG_MFP0_PG1MFP_Pos)
#define NUMAKER_SYS_GPG_MFP0_PG1MFP_EBI_ADR9 (0x02UL << NUMAKER_SYS_GPG_MFP0_PG1MFP_Pos)
#define NUMAKER_SYS_GPG_MFP0_PG1MFP_SPI2_I2SMCLK (0x03UL << NUMAKER_SYS_GPG_MFP0_PG1MFP_Pos)
#define NUMAKER_SYS_GPG_MFP0_PG1MFP_I2C0_SDA (0x04UL << NUMAKER_SYS_GPG_MFP0_PG1MFP_Pos)
#define NUMAKER_SYS_GPG_MFP0_PG1MFP_I2C1_SMBSUS (0x05UL << NUMAKER_SYS_GPG_MFP0_PG1MFP_Pos)
#define NUMAKER_SYS_GPG_MFP0_PG1MFP_UART2_TXD (0x06UL << NUMAKER_SYS_GPG_MFP0_PG1MFP_Pos)
#define NUMAKER_SYS_GPG_MFP0_PG1MFP_CAN1_RXD (0x07UL << NUMAKER_SYS_GPG_MFP0_PG1MFP_Pos)
#define NUMAKER_SYS_GPG_MFP0_PG1MFP_UART1_RXD (0x08UL << NUMAKER_SYS_GPG_MFP0_PG1MFP_Pos)
#define NUMAKER_SYS_GPG_MFP0_PG1MFP_I2C3_SDA (0x09UL << NUMAKER_SYS_GPG_MFP0_PG1MFP_Pos)
/* PG.2 MFP */
#define NUMAKER_SYS_GPG_MFP0_PG2MFP_GPIO (0x00UL << NUMAKER_SYS_GPG_MFP0_PG2MFP_Pos)
#define NUMAKER_SYS_GPG_MFP0_PG2MFP_EBI_ADR11 (0x02UL << NUMAKER_SYS_GPG_MFP0_PG2MFP_Pos)
#define NUMAKER_SYS_GPG_MFP0_PG2MFP_SPI2_SS (0x03UL << NUMAKER_SYS_GPG_MFP0_PG2MFP_Pos)
#define NUMAKER_SYS_GPG_MFP0_PG2MFP_I2C0_SMBAL (0x04UL << NUMAKER_SYS_GPG_MFP0_PG2MFP_Pos)
#define NUMAKER_SYS_GPG_MFP0_PG2MFP_I2C1_SCL (0x05UL << NUMAKER_SYS_GPG_MFP0_PG2MFP_Pos)
#define NUMAKER_SYS_GPG_MFP0_PG2MFP_CCAP_DATA7 (0x07UL << NUMAKER_SYS_GPG_MFP0_PG2MFP_Pos)
#define NUMAKER_SYS_GPG_MFP0_PG2MFP_I2C3_SMBAL (0x09UL << NUMAKER_SYS_GPG_MFP0_PG2MFP_Pos)
#define NUMAKER_SYS_GPG_MFP0_PG2MFP_TM0 (0x0dUL << NUMAKER_SYS_GPG_MFP0_PG2MFP_Pos)
/* PG.3 MFP */
#define NUMAKER_SYS_GPG_MFP0_PG3MFP_GPIO (0x00UL << NUMAKER_SYS_GPG_MFP0_PG3MFP_Pos)
#define NUMAKER_SYS_GPG_MFP0_PG3MFP_EBI_ADR12 (0x02UL << NUMAKER_SYS_GPG_MFP0_PG3MFP_Pos)
#define NUMAKER_SYS_GPG_MFP0_PG3MFP_SPI2_CLK (0x03UL << NUMAKER_SYS_GPG_MFP0_PG3MFP_Pos)
#define NUMAKER_SYS_GPG_MFP0_PG3MFP_I2C0_SMBSUS (0x04UL << NUMAKER_SYS_GPG_MFP0_PG3MFP_Pos)
#define NUMAKER_SYS_GPG_MFP0_PG3MFP_I2C1_SDA (0x05UL << NUMAKER_SYS_GPG_MFP0_PG3MFP_Pos)
#define NUMAKER_SYS_GPG_MFP0_PG3MFP_CCAP_DATA6 (0x07UL << NUMAKER_SYS_GPG_MFP0_PG3MFP_Pos)
#define NUMAKER_SYS_GPG_MFP0_PG3MFP_I2C3_SMBSUS (0x09UL << NUMAKER_SYS_GPG_MFP0_PG3MFP_Pos)
#define NUMAKER_SYS_GPG_MFP0_PG3MFP_TM1 (0x0dUL << NUMAKER_SYS_GPG_MFP0_PG3MFP_Pos)
/* PG.4 MFP */
#define NUMAKER_SYS_GPG_MFP1_PG4MFP_GPIO (0x00UL << NUMAKER_SYS_GPG_MFP1_PG4MFP_Pos)
#define NUMAKER_SYS_GPG_MFP1_PG4MFP_EBI_ADR13 (0x02UL << NUMAKER_SYS_GPG_MFP1_PG4MFP_Pos)
#define NUMAKER_SYS_GPG_MFP1_PG4MFP_SPI2_MISO (0x03UL << NUMAKER_SYS_GPG_MFP1_PG4MFP_Pos)
#define NUMAKER_SYS_GPG_MFP1_PG4MFP_CCAP_DATA5 (0x07UL << NUMAKER_SYS_GPG_MFP1_PG4MFP_Pos)
#define NUMAKER_SYS_GPG_MFP1_PG4MFP_TM2 (0x0dUL << NUMAKER_SYS_GPG_MFP1_PG4MFP_Pos)
/* PG.5 MFP */
#define NUMAKER_SYS_GPG_MFP1_PG5MFP_GPIO (0x00UL << NUMAKER_SYS_GPG_MFP1_PG5MFP_Pos)
#define NUMAKER_SYS_GPG_MFP1_PG5MFP_EBI_nCS1 (0x02UL << NUMAKER_SYS_GPG_MFP1_PG5MFP_Pos)
#define NUMAKER_SYS_GPG_MFP1_PG5MFP_SPI3_SS (0x03UL << NUMAKER_SYS_GPG_MFP1_PG5MFP_Pos)
#define NUMAKER_SYS_GPG_MFP1_PG5MFP_SC1_PWR (0x04UL << NUMAKER_SYS_GPG_MFP1_PG5MFP_Pos)
#define NUMAKER_SYS_GPG_MFP1_PG5MFP_I2C3_SMBAL (0x08UL << NUMAKER_SYS_GPG_MFP1_PG5MFP_Pos)
#define NUMAKER_SYS_GPG_MFP1_PG5MFP_I2S1_MCLK (0x0aUL << NUMAKER_SYS_GPG_MFP1_PG5MFP_Pos)
#define NUMAKER_SYS_GPG_MFP1_PG5MFP_EPWM0_CH3 (0x0bUL << NUMAKER_SYS_GPG_MFP1_PG5MFP_Pos)
/* PG.6 MFP */
#define NUMAKER_SYS_GPG_MFP1_PG6MFP_GPIO (0x00UL << NUMAKER_SYS_GPG_MFP1_PG6MFP_Pos)
#define NUMAKER_SYS_GPG_MFP1_PG6MFP_EBI_nCS2 (0x02UL << NUMAKER_SYS_GPG_MFP1_PG6MFP_Pos)
#define NUMAKER_SYS_GPG_MFP1_PG6MFP_SPI3_CLK (0x03UL << NUMAKER_SYS_GPG_MFP1_PG6MFP_Pos)
#define NUMAKER_SYS_GPG_MFP1_PG6MFP_SC1_RST (0x04UL << NUMAKER_SYS_GPG_MFP1_PG6MFP_Pos)
#define NUMAKER_SYS_GPG_MFP1_PG6MFP_I2C3_SMBSUS (0x08UL << NUMAKER_SYS_GPG_MFP1_PG6MFP_Pos)
#define NUMAKER_SYS_GPG_MFP1_PG6MFP_I2S1_DI (0x0aUL << NUMAKER_SYS_GPG_MFP1_PG6MFP_Pos)
#define NUMAKER_SYS_GPG_MFP1_PG6MFP_EPWM0_CH2 (0x0bUL << NUMAKER_SYS_GPG_MFP1_PG6MFP_Pos)
/* PG.7 MFP */
#define NUMAKER_SYS_GPG_MFP1_PG7MFP_GPIO (0x00UL << NUMAKER_SYS_GPG_MFP1_PG7MFP_Pos)
#define NUMAKER_SYS_GPG_MFP1_PG7MFP_EBI_nWRL (0x02UL << NUMAKER_SYS_GPG_MFP1_PG7MFP_Pos)
#define NUMAKER_SYS_GPG_MFP1_PG7MFP_SPI3_MISO (0x03UL << NUMAKER_SYS_GPG_MFP1_PG7MFP_Pos)
#define NUMAKER_SYS_GPG_MFP1_PG7MFP_SC1_DAT (0x04UL << NUMAKER_SYS_GPG_MFP1_PG7MFP_Pos)
#define NUMAKER_SYS_GPG_MFP1_PG7MFP_I2C3_SCL (0x08UL << NUMAKER_SYS_GPG_MFP1_PG7MFP_Pos)
#define NUMAKER_SYS_GPG_MFP1_PG7MFP_I2S1_DO (0x0aUL << NUMAKER_SYS_GPG_MFP1_PG7MFP_Pos)
#define NUMAKER_SYS_GPG_MFP1_PG7MFP_EPWM0_CH1 (0x0bUL << NUMAKER_SYS_GPG_MFP1_PG7MFP_Pos)
/* PG.8 MFP */
#define NUMAKER_SYS_GPG_MFP2_PG8MFP_GPIO (0x00UL << NUMAKER_SYS_GPG_MFP2_PG8MFP_Pos)
#define NUMAKER_SYS_GPG_MFP2_PG8MFP_EBI_nWRH (0x02UL << NUMAKER_SYS_GPG_MFP2_PG8MFP_Pos)
#define NUMAKER_SYS_GPG_MFP2_PG8MFP_SPI3_MOSI (0x03UL << NUMAKER_SYS_GPG_MFP2_PG8MFP_Pos)
#define NUMAKER_SYS_GPG_MFP2_PG8MFP_SC1_CLK (0x04UL << NUMAKER_SYS_GPG_MFP2_PG8MFP_Pos)
#define NUMAKER_SYS_GPG_MFP2_PG8MFP_I2C3_SDA (0x08UL << NUMAKER_SYS_GPG_MFP2_PG8MFP_Pos)
#define NUMAKER_SYS_GPG_MFP2_PG8MFP_I2S1_LRCK (0x0aUL << NUMAKER_SYS_GPG_MFP2_PG8MFP_Pos)
#define NUMAKER_SYS_GPG_MFP2_PG8MFP_EPWM0_CH0 (0x0bUL << NUMAKER_SYS_GPG_MFP2_PG8MFP_Pos)
/* PG.9 MFP */
#define NUMAKER_SYS_GPG_MFP2_PG9MFP_GPIO (0x00UL << NUMAKER_SYS_GPG_MFP2_PG9MFP_Pos)
#define NUMAKER_SYS_GPG_MFP2_PG9MFP_EBI_AD0 (0x02UL << NUMAKER_SYS_GPG_MFP2_PG9MFP_Pos)
#define NUMAKER_SYS_GPG_MFP2_PG9MFP_SD1_DAT3 (0x03UL << NUMAKER_SYS_GPG_MFP2_PG9MFP_Pos)
#define NUMAKER_SYS_GPG_MFP2_PG9MFP_SPIM_D2 (0x04UL << NUMAKER_SYS_GPG_MFP2_PG9MFP_Pos)
#define NUMAKER_SYS_GPG_MFP2_PG9MFP_QSPI1_MISO1 (0x05UL << NUMAKER_SYS_GPG_MFP2_PG9MFP_Pos)
#define NUMAKER_SYS_GPG_MFP2_PG9MFP_CCAP_PIXCLK (0x07UL << NUMAKER_SYS_GPG_MFP2_PG9MFP_Pos)
#define NUMAKER_SYS_GPG_MFP2_PG9MFP_I2C4_SCL (0x08UL << NUMAKER_SYS_GPG_MFP2_PG9MFP_Pos)
#define NUMAKER_SYS_GPG_MFP2_PG9MFP_ECAP2_IC0 (0x09UL << NUMAKER_SYS_GPG_MFP2_PG9MFP_Pos)
#define NUMAKER_SYS_GPG_MFP2_PG9MFP_BPWM0_CH5 (0x0cUL << NUMAKER_SYS_GPG_MFP2_PG9MFP_Pos)
#define NUMAKER_SYS_GPG_MFP2_PG9MFP_HBI_D4 (0x10UL << NUMAKER_SYS_GPG_MFP2_PG9MFP_Pos)
#define NUMAKER_SYS_GPG_MFP2_PG9MFP_SPI8_SS (0x13UL << NUMAKER_SYS_GPG_MFP2_PG9MFP_Pos)
#define NUMAKER_SYS_GPG_MFP2_PG9MFP_BMC16 (0x14UL << NUMAKER_SYS_GPG_MFP2_PG9MFP_Pos)
/* PG.10 MFP */
#define NUMAKER_SYS_GPG_MFP2_PG10MFP_GPIO (0x00UL << NUMAKER_SYS_GPG_MFP2_PG10MFP_Pos)
#define NUMAKER_SYS_GPG_MFP2_PG10MFP_EBI_AD1 (0x02UL << NUMAKER_SYS_GPG_MFP2_PG10MFP_Pos)
#define NUMAKER_SYS_GPG_MFP2_PG10MFP_SD1_DAT2 (0x03UL << NUMAKER_SYS_GPG_MFP2_PG10MFP_Pos)
#define NUMAKER_SYS_GPG_MFP2_PG10MFP_SPIM_D3 (0x04UL << NUMAKER_SYS_GPG_MFP2_PG10MFP_Pos)
#define NUMAKER_SYS_GPG_MFP2_PG10MFP_QSPI1_MOSI1 (0x05UL << NUMAKER_SYS_GPG_MFP2_PG10MFP_Pos)
#define NUMAKER_SYS_GPG_MFP2_PG10MFP_CCAP_SCLK (0x07UL << NUMAKER_SYS_GPG_MFP2_PG10MFP_Pos)
#define NUMAKER_SYS_GPG_MFP2_PG10MFP_I2C4_SDA (0x08UL << NUMAKER_SYS_GPG_MFP2_PG10MFP_Pos)
#define NUMAKER_SYS_GPG_MFP2_PG10MFP_ECAP2_IC1 (0x09UL << NUMAKER_SYS_GPG_MFP2_PG10MFP_Pos)
#define NUMAKER_SYS_GPG_MFP2_PG10MFP_BPWM0_CH4 (0x0cUL << NUMAKER_SYS_GPG_MFP2_PG10MFP_Pos)
#define NUMAKER_SYS_GPG_MFP2_PG10MFP_HBI_D3 (0x10UL << NUMAKER_SYS_GPG_MFP2_PG10MFP_Pos)
#define NUMAKER_SYS_GPG_MFP2_PG10MFP_SPI8_CLK (0x13UL << NUMAKER_SYS_GPG_MFP2_PG10MFP_Pos)
#define NUMAKER_SYS_GPG_MFP2_PG10MFP_BMC17 (0x14UL << NUMAKER_SYS_GPG_MFP2_PG10MFP_Pos)
/* PG.11 MFP */
#define NUMAKER_SYS_GPG_MFP2_PG11MFP_GPIO (0x00UL << NUMAKER_SYS_GPG_MFP2_PG11MFP_Pos)
#define NUMAKER_SYS_GPG_MFP2_PG11MFP_EBI_AD2 (0x02UL << NUMAKER_SYS_GPG_MFP2_PG11MFP_Pos)
#define NUMAKER_SYS_GPG_MFP2_PG11MFP_SD1_DAT1 (0x03UL << NUMAKER_SYS_GPG_MFP2_PG11MFP_Pos)
#define NUMAKER_SYS_GPG_MFP2_PG11MFP_SPIM_SS (0x04UL << NUMAKER_SYS_GPG_MFP2_PG11MFP_Pos)
#define NUMAKER_SYS_GPG_MFP2_PG11MFP_QSPI1_SS (0x05UL << NUMAKER_SYS_GPG_MFP2_PG11MFP_Pos)
#define NUMAKER_SYS_GPG_MFP2_PG11MFP_UART7_TXD (0x06UL << NUMAKER_SYS_GPG_MFP2_PG11MFP_Pos)
#define NUMAKER_SYS_GPG_MFP2_PG11MFP_CCAP_SFIELD (0x07UL << NUMAKER_SYS_GPG_MFP2_PG11MFP_Pos)
#define NUMAKER_SYS_GPG_MFP2_PG11MFP_I2C4_SMBAL (0x08UL << NUMAKER_SYS_GPG_MFP2_PG11MFP_Pos)
#define NUMAKER_SYS_GPG_MFP2_PG11MFP_ECAP2_IC2 (0x09UL << NUMAKER_SYS_GPG_MFP2_PG11MFP_Pos)
#define NUMAKER_SYS_GPG_MFP2_PG11MFP_BPWM0_CH3 (0x0cUL << NUMAKER_SYS_GPG_MFP2_PG11MFP_Pos)
#define NUMAKER_SYS_GPG_MFP2_PG11MFP_HBI_D0 (0x10UL << NUMAKER_SYS_GPG_MFP2_PG11MFP_Pos)
#define NUMAKER_SYS_GPG_MFP2_PG11MFP_SPI8_MOSI (0x13UL << NUMAKER_SYS_GPG_MFP2_PG11MFP_Pos)
#define NUMAKER_SYS_GPG_MFP2_PG11MFP_BMC18 (0x14UL << NUMAKER_SYS_GPG_MFP2_PG11MFP_Pos)
/* PG.12 MFP */
#define NUMAKER_SYS_GPG_MFP3_PG12MFP_GPIO (0x00UL << NUMAKER_SYS_GPG_MFP3_PG12MFP_Pos)
#define NUMAKER_SYS_GPG_MFP3_PG12MFP_EBI_AD3 (0x02UL << NUMAKER_SYS_GPG_MFP3_PG12MFP_Pos)
#define NUMAKER_SYS_GPG_MFP3_PG12MFP_SD1_DAT0 (0x03UL << NUMAKER_SYS_GPG_MFP3_PG12MFP_Pos)
#define NUMAKER_SYS_GPG_MFP3_PG12MFP_SPIM_CLK (0x04UL << NUMAKER_SYS_GPG_MFP3_PG12MFP_Pos)
#define NUMAKER_SYS_GPG_MFP3_PG12MFP_QSPI1_CLK (0x05UL << NUMAKER_SYS_GPG_MFP3_PG12MFP_Pos)
#define NUMAKER_SYS_GPG_MFP3_PG12MFP_UART7_RXD (0x06UL << NUMAKER_SYS_GPG_MFP3_PG12MFP_Pos)
#define NUMAKER_SYS_GPG_MFP3_PG12MFP_CCAP_VSYNC (0x07UL << NUMAKER_SYS_GPG_MFP3_PG12MFP_Pos)
#define NUMAKER_SYS_GPG_MFP3_PG12MFP_I2C4_SMBSUS (0x08UL << NUMAKER_SYS_GPG_MFP3_PG12MFP_Pos)
#define NUMAKER_SYS_GPG_MFP3_PG12MFP_BPWM0_CH2 (0x0cUL << NUMAKER_SYS_GPG_MFP3_PG12MFP_Pos)
#define NUMAKER_SYS_GPG_MFP3_PG12MFP_HBI_D1 (0x10UL << NUMAKER_SYS_GPG_MFP3_PG12MFP_Pos)
#define NUMAKER_SYS_GPG_MFP3_PG12MFP_SPI8_MISO (0x13UL << NUMAKER_SYS_GPG_MFP3_PG12MFP_Pos)
#define NUMAKER_SYS_GPG_MFP3_PG12MFP_BMC19 (0x14UL << NUMAKER_SYS_GPG_MFP3_PG12MFP_Pos)
/* PG.13 MFP */
#define NUMAKER_SYS_GPG_MFP3_PG13MFP_GPIO (0x00UL << NUMAKER_SYS_GPG_MFP3_PG13MFP_Pos)
#define NUMAKER_SYS_GPG_MFP3_PG13MFP_EBI_AD4 (0x02UL << NUMAKER_SYS_GPG_MFP3_PG13MFP_Pos)
#define NUMAKER_SYS_GPG_MFP3_PG13MFP_SD1_CMD (0x03UL << NUMAKER_SYS_GPG_MFP3_PG13MFP_Pos)
#define NUMAKER_SYS_GPG_MFP3_PG13MFP_SPIM_MISO (0x04UL << NUMAKER_SYS_GPG_MFP3_PG13MFP_Pos)
#define NUMAKER_SYS_GPG_MFP3_PG13MFP_QSPI1_MISO0 (0x05UL << NUMAKER_SYS_GPG_MFP3_PG13MFP_Pos)
#define NUMAKER_SYS_GPG_MFP3_PG13MFP_UART6_TXD (0x06UL << NUMAKER_SYS_GPG_MFP3_PG13MFP_Pos)
#define NUMAKER_SYS_GPG_MFP3_PG13MFP_CCAP_HSYNC (0x07UL << NUMAKER_SYS_GPG_MFP3_PG13MFP_Pos)
#define NUMAKER_SYS_GPG_MFP3_PG13MFP_BPWM0_CH1 (0x0cUL << NUMAKER_SYS_GPG_MFP3_PG13MFP_Pos)
#define NUMAKER_SYS_GPG_MFP3_PG13MFP_HBI_D5 (0x10UL << NUMAKER_SYS_GPG_MFP3_PG13MFP_Pos)
/* PG.14 MFP */
#define NUMAKER_SYS_GPG_MFP3_PG14MFP_GPIO (0x00UL << NUMAKER_SYS_GPG_MFP3_PG14MFP_Pos)
#define NUMAKER_SYS_GPG_MFP3_PG14MFP_EBI_AD5 (0x02UL << NUMAKER_SYS_GPG_MFP3_PG14MFP_Pos)
#define NUMAKER_SYS_GPG_MFP3_PG14MFP_SD1_CLK (0x03UL << NUMAKER_SYS_GPG_MFP3_PG14MFP_Pos)
#define NUMAKER_SYS_GPG_MFP3_PG14MFP_SPIM_MOSI (0x04UL << NUMAKER_SYS_GPG_MFP3_PG14MFP_Pos)
#define NUMAKER_SYS_GPG_MFP3_PG14MFP_QSPI1_MOSI0 (0x05UL << NUMAKER_SYS_GPG_MFP3_PG14MFP_Pos)
#define NUMAKER_SYS_GPG_MFP3_PG14MFP_UART6_RXD (0x06UL << NUMAKER_SYS_GPG_MFP3_PG14MFP_Pos)
#define NUMAKER_SYS_GPG_MFP3_PG14MFP_BPWM0_CH0 (0x0cUL << NUMAKER_SYS_GPG_MFP3_PG14MFP_Pos)
#define NUMAKER_SYS_GPG_MFP3_PG14MFP_HBI_D6 (0x10UL << NUMAKER_SYS_GPG_MFP3_PG14MFP_Pos)
/* PG.15 MFP */
#define NUMAKER_SYS_GPG_MFP3_PG15MFP_GPIO (0x00UL << NUMAKER_SYS_GPG_MFP3_PG15MFP_Pos)
#define NUMAKER_SYS_GPG_MFP3_PG15MFP_SD1_nCD (0x03UL << NUMAKER_SYS_GPG_MFP3_PG15MFP_Pos)
#define NUMAKER_SYS_GPG_MFP3_PG15MFP_CLKO (0x0eUL << NUMAKER_SYS_GPG_MFP3_PG15MFP_Pos)
#define NUMAKER_SYS_GPG_MFP3_PG15MFP_EADC0_ST (0x0fUL << NUMAKER_SYS_GPG_MFP3_PG15MFP_Pos)
#define NUMAKER_SYS_GPG_MFP3_PG15MFP_HBI_D7 (0x10UL << NUMAKER_SYS_GPG_MFP3_PG15MFP_Pos)
#define NUMAKER_SYS_GPG_MFP3_PG15MFP_QSPI1_MISO1 (0x13UL << NUMAKER_SYS_GPG_MFP3_PG15MFP_Pos)
/* PH.0 MFP */
#define NUMAKER_SYS_GPH_MFP0_PH0MFP_GPIO (0x00UL << NUMAKER_SYS_GPH_MFP0_PH0MFP_Pos)
#define NUMAKER_SYS_GPH_MFP0_PH0MFP_EBI_ADR7 (0x02UL << NUMAKER_SYS_GPH_MFP0_PH0MFP_Pos)
#define NUMAKER_SYS_GPH_MFP0_PH0MFP_UART5_TXD (0x04UL << NUMAKER_SYS_GPH_MFP0_PH0MFP_Pos)
#define NUMAKER_SYS_GPH_MFP0_PH0MFP_TM0_EXT (0x0dUL << NUMAKER_SYS_GPH_MFP0_PH0MFP_Pos)
/* PH.1 MFP */
#define NUMAKER_SYS_GPH_MFP0_PH1MFP_GPIO (0x00UL << NUMAKER_SYS_GPH_MFP0_PH1MFP_Pos)
#define NUMAKER_SYS_GPH_MFP0_PH1MFP_EBI_ADR6 (0x02UL << NUMAKER_SYS_GPH_MFP0_PH1MFP_Pos)
#define NUMAKER_SYS_GPH_MFP0_PH1MFP_UART5_RXD (0x04UL << NUMAKER_SYS_GPH_MFP0_PH1MFP_Pos)
#define NUMAKER_SYS_GPH_MFP0_PH1MFP_TM1_EXT (0x0dUL << NUMAKER_SYS_GPH_MFP0_PH1MFP_Pos)
/* PH.2 MFP */
#define NUMAKER_SYS_GPH_MFP0_PH2MFP_GPIO (0x00UL << NUMAKER_SYS_GPH_MFP0_PH2MFP_Pos)
#define NUMAKER_SYS_GPH_MFP0_PH2MFP_EBI_ADR5 (0x02UL << NUMAKER_SYS_GPH_MFP0_PH2MFP_Pos)
#define NUMAKER_SYS_GPH_MFP0_PH2MFP_UART5_nRTS (0x04UL << NUMAKER_SYS_GPH_MFP0_PH2MFP_Pos)
#define NUMAKER_SYS_GPH_MFP0_PH2MFP_UART4_TXD (0x05UL << NUMAKER_SYS_GPH_MFP0_PH2MFP_Pos)
#define NUMAKER_SYS_GPH_MFP0_PH2MFP_I2C0_SCL (0x06UL << NUMAKER_SYS_GPH_MFP0_PH2MFP_Pos)
#define NUMAKER_SYS_GPH_MFP0_PH2MFP_TM2_EXT (0x0dUL << NUMAKER_SYS_GPH_MFP0_PH2MFP_Pos)
/* PH.3 MFP */
#define NUMAKER_SYS_GPH_MFP0_PH3MFP_GPIO (0x00UL << NUMAKER_SYS_GPH_MFP0_PH3MFP_Pos)
#define NUMAKER_SYS_GPH_MFP0_PH3MFP_EBI_ADR4 (0x02UL << NUMAKER_SYS_GPH_MFP0_PH3MFP_Pos)
#define NUMAKER_SYS_GPH_MFP0_PH3MFP_SPI1_I2SMCLK (0x03UL << NUMAKER_SYS_GPH_MFP0_PH3MFP_Pos)
#define NUMAKER_SYS_GPH_MFP0_PH3MFP_UART5_nCTS (0x04UL << NUMAKER_SYS_GPH_MFP0_PH3MFP_Pos)
#define NUMAKER_SYS_GPH_MFP0_PH3MFP_UART4_RXD (0x05UL << NUMAKER_SYS_GPH_MFP0_PH3MFP_Pos)
#define NUMAKER_SYS_GPH_MFP0_PH3MFP_I2C0_SDA (0x06UL << NUMAKER_SYS_GPH_MFP0_PH3MFP_Pos)
#define NUMAKER_SYS_GPH_MFP0_PH3MFP_TM3_EXT (0x0dUL << NUMAKER_SYS_GPH_MFP0_PH3MFP_Pos)
/* PH.4 MFP */
#define NUMAKER_SYS_GPH_MFP1_PH4MFP_GPIO (0x00UL << NUMAKER_SYS_GPH_MFP1_PH4MFP_Pos)
#define NUMAKER_SYS_GPH_MFP1_PH4MFP_EBI_ADR3 (0x02UL << NUMAKER_SYS_GPH_MFP1_PH4MFP_Pos)
#define NUMAKER_SYS_GPH_MFP1_PH4MFP_SPI1_MISO (0x03UL << NUMAKER_SYS_GPH_MFP1_PH4MFP_Pos)
#define NUMAKER_SYS_GPH_MFP1_PH4MFP_UART7_nRTS (0x04UL << NUMAKER_SYS_GPH_MFP1_PH4MFP_Pos)
#define NUMAKER_SYS_GPH_MFP1_PH4MFP_UART6_TXD (0x05UL << NUMAKER_SYS_GPH_MFP1_PH4MFP_Pos)
/* PH.5 MFP */
#define NUMAKER_SYS_GPH_MFP1_PH5MFP_GPIO (0x00UL << NUMAKER_SYS_GPH_MFP1_PH5MFP_Pos)
#define NUMAKER_SYS_GPH_MFP1_PH5MFP_EBI_ADR2 (0x02UL << NUMAKER_SYS_GPH_MFP1_PH5MFP_Pos)
#define NUMAKER_SYS_GPH_MFP1_PH5MFP_SPI1_MOSI (0x03UL << NUMAKER_SYS_GPH_MFP1_PH5MFP_Pos)
#define NUMAKER_SYS_GPH_MFP1_PH5MFP_UART7_nCTS (0x04UL << NUMAKER_SYS_GPH_MFP1_PH5MFP_Pos)
#define NUMAKER_SYS_GPH_MFP1_PH5MFP_UART6_RXD (0x05UL << NUMAKER_SYS_GPH_MFP1_PH5MFP_Pos)
/* PH.6 MFP */
#define NUMAKER_SYS_GPH_MFP1_PH6MFP_GPIO (0x00UL << NUMAKER_SYS_GPH_MFP1_PH6MFP_Pos)
#define NUMAKER_SYS_GPH_MFP1_PH6MFP_EBI_ADR1 (0x02UL << NUMAKER_SYS_GPH_MFP1_PH6MFP_Pos)
#define NUMAKER_SYS_GPH_MFP1_PH6MFP_SPI1_CLK (0x03UL << NUMAKER_SYS_GPH_MFP1_PH6MFP_Pos)
#define NUMAKER_SYS_GPH_MFP1_PH6MFP_UART7_TXD (0x04UL << NUMAKER_SYS_GPH_MFP1_PH6MFP_Pos)
#define NUMAKER_SYS_GPH_MFP1_PH6MFP_UART9_nCTS (0x07UL << NUMAKER_SYS_GPH_MFP1_PH6MFP_Pos)
/* PH.7 MFP */
#define NUMAKER_SYS_GPH_MFP1_PH7MFP_GPIO (0x00UL << NUMAKER_SYS_GPH_MFP1_PH7MFP_Pos)
#define NUMAKER_SYS_GPH_MFP1_PH7MFP_EBI_ADR0 (0x02UL << NUMAKER_SYS_GPH_MFP1_PH7MFP_Pos)
#define NUMAKER_SYS_GPH_MFP1_PH7MFP_SPI1_SS (0x03UL << NUMAKER_SYS_GPH_MFP1_PH7MFP_Pos)
#define NUMAKER_SYS_GPH_MFP1_PH7MFP_UART7_RXD (0x04UL << NUMAKER_SYS_GPH_MFP1_PH7MFP_Pos)
#define NUMAKER_SYS_GPH_MFP1_PH7MFP_UART9_nRTS (0x07UL << NUMAKER_SYS_GPH_MFP1_PH7MFP_Pos)
/* PH.8 MFP */
#define NUMAKER_SYS_GPH_MFP2_PH8MFP_GPIO (0x00UL << NUMAKER_SYS_GPH_MFP2_PH8MFP_Pos)
#define NUMAKER_SYS_GPH_MFP2_PH8MFP_EBI_AD12 (0x02UL << NUMAKER_SYS_GPH_MFP2_PH8MFP_Pos)
#define NUMAKER_SYS_GPH_MFP2_PH8MFP_QSPI0_CLK (0x03UL << NUMAKER_SYS_GPH_MFP2_PH8MFP_Pos)
#define NUMAKER_SYS_GPH_MFP2_PH8MFP_SC2_PWR (0x04UL << NUMAKER_SYS_GPH_MFP2_PH8MFP_Pos)
#define NUMAKER_SYS_GPH_MFP2_PH8MFP_I2S0_DI (0x05UL << NUMAKER_SYS_GPH_MFP2_PH8MFP_Pos)
#define NUMAKER_SYS_GPH_MFP2_PH8MFP_SPI1_CLK (0x06UL << NUMAKER_SYS_GPH_MFP2_PH8MFP_Pos)
#define NUMAKER_SYS_GPH_MFP2_PH8MFP_UART3_nRTS (0x07UL << NUMAKER_SYS_GPH_MFP2_PH8MFP_Pos)
#define NUMAKER_SYS_GPH_MFP2_PH8MFP_I2C1_SMBAL (0x08UL << NUMAKER_SYS_GPH_MFP2_PH8MFP_Pos)
#define NUMAKER_SYS_GPH_MFP2_PH8MFP_I2C2_SCL (0x09UL << NUMAKER_SYS_GPH_MFP2_PH8MFP_Pos)
#define NUMAKER_SYS_GPH_MFP2_PH8MFP_UART1_TXD (0x0aUL << NUMAKER_SYS_GPH_MFP2_PH8MFP_Pos)
#define NUMAKER_SYS_GPH_MFP2_PH8MFP_UART9_nCTS (0x0dUL << NUMAKER_SYS_GPH_MFP2_PH8MFP_Pos)
/* PH.9 MFP */
#define NUMAKER_SYS_GPH_MFP2_PH9MFP_GPIO (0x00UL << NUMAKER_SYS_GPH_MFP2_PH9MFP_Pos)
#define NUMAKER_SYS_GPH_MFP2_PH9MFP_EBI_AD13 (0x02UL << NUMAKER_SYS_GPH_MFP2_PH9MFP_Pos)
#define NUMAKER_SYS_GPH_MFP2_PH9MFP_QSPI0_SS (0x03UL << NUMAKER_SYS_GPH_MFP2_PH9MFP_Pos)
#define NUMAKER_SYS_GPH_MFP2_PH9MFP_SC2_RST (0x04UL << NUMAKER_SYS_GPH_MFP2_PH9MFP_Pos)
#define NUMAKER_SYS_GPH_MFP2_PH9MFP_I2S0_DO (0x05UL << NUMAKER_SYS_GPH_MFP2_PH9MFP_Pos)
#define NUMAKER_SYS_GPH_MFP2_PH9MFP_SPI1_SS (0x06UL << NUMAKER_SYS_GPH_MFP2_PH9MFP_Pos)
#define NUMAKER_SYS_GPH_MFP2_PH9MFP_UART3_nCTS (0x07UL << NUMAKER_SYS_GPH_MFP2_PH9MFP_Pos)
#define NUMAKER_SYS_GPH_MFP2_PH9MFP_I2C1_SMBSUS (0x08UL << NUMAKER_SYS_GPH_MFP2_PH9MFP_Pos)
#define NUMAKER_SYS_GPH_MFP2_PH9MFP_I2C2_SDA (0x09UL << NUMAKER_SYS_GPH_MFP2_PH9MFP_Pos)
#define NUMAKER_SYS_GPH_MFP2_PH9MFP_UART1_RXD (0x0aUL << NUMAKER_SYS_GPH_MFP2_PH9MFP_Pos)
#define NUMAKER_SYS_GPH_MFP2_PH9MFP_UART9_nRTS (0x0dUL << NUMAKER_SYS_GPH_MFP2_PH9MFP_Pos)
/* PH.10 MFP */
#define NUMAKER_SYS_GPH_MFP2_PH10MFP_GPIO (0x00UL << NUMAKER_SYS_GPH_MFP2_PH10MFP_Pos)
#define NUMAKER_SYS_GPH_MFP2_PH10MFP_EBI_AD14 (0x02UL << NUMAKER_SYS_GPH_MFP2_PH10MFP_Pos)
#define NUMAKER_SYS_GPH_MFP2_PH10MFP_QSPI0_MISO1 (0x03UL << NUMAKER_SYS_GPH_MFP2_PH10MFP_Pos)
#define NUMAKER_SYS_GPH_MFP2_PH10MFP_SC2_nCD (0x04UL << NUMAKER_SYS_GPH_MFP2_PH10MFP_Pos)
#define NUMAKER_SYS_GPH_MFP2_PH10MFP_I2S0_LRCK (0x05UL << NUMAKER_SYS_GPH_MFP2_PH10MFP_Pos)
#define NUMAKER_SYS_GPH_MFP2_PH10MFP_SPI1_I2SMCLK (0x06UL << NUMAKER_SYS_GPH_MFP2_PH10MFP_Pos)
#define NUMAKER_SYS_GPH_MFP2_PH10MFP_UART4_TXD (0x07UL << NUMAKER_SYS_GPH_MFP2_PH10MFP_Pos)
#define NUMAKER_SYS_GPH_MFP2_PH10MFP_UART0_TXD (0x08UL << NUMAKER_SYS_GPH_MFP2_PH10MFP_Pos)
#define NUMAKER_SYS_GPH_MFP2_PH10MFP_UART9_TXD (0x0dUL << NUMAKER_SYS_GPH_MFP2_PH10MFP_Pos)
/* PH.11 MFP */
#define NUMAKER_SYS_GPH_MFP2_PH11MFP_GPIO (0x00UL << NUMAKER_SYS_GPH_MFP2_PH11MFP_Pos)
#define NUMAKER_SYS_GPH_MFP2_PH11MFP_EBI_AD15 (0x02UL << NUMAKER_SYS_GPH_MFP2_PH11MFP_Pos)
#define NUMAKER_SYS_GPH_MFP2_PH11MFP_QSPI0_MOSI1 (0x03UL << NUMAKER_SYS_GPH_MFP2_PH11MFP_Pos)
#define NUMAKER_SYS_GPH_MFP2_PH11MFP_UART4_RXD (0x07UL << NUMAKER_SYS_GPH_MFP2_PH11MFP_Pos)
#define NUMAKER_SYS_GPH_MFP2_PH11MFP_UART0_RXD (0x08UL << NUMAKER_SYS_GPH_MFP2_PH11MFP_Pos)
#define NUMAKER_SYS_GPH_MFP2_PH11MFP_EPWM0_CH5 (0x0bUL << NUMAKER_SYS_GPH_MFP2_PH11MFP_Pos)
#define NUMAKER_SYS_GPH_MFP2_PH11MFP_UART9_RXD (0x0dUL << NUMAKER_SYS_GPH_MFP2_PH11MFP_Pos)
/* PH.12 MFP */
#define NUMAKER_SYS_GPH_MFP3_PH12MFP_GPIO (0x00UL << NUMAKER_SYS_GPH_MFP3_PH12MFP_Pos)
#define NUMAKER_SYS_GPH_MFP3_PH12MFP_EBI_AD0 (0x02UL << NUMAKER_SYS_GPH_MFP3_PH12MFP_Pos)
#define NUMAKER_SYS_GPH_MFP3_PH12MFP_UART9_TXD (0x03UL << NUMAKER_SYS_GPH_MFP3_PH12MFP_Pos)
#define NUMAKER_SYS_GPH_MFP3_PH12MFP_QSPI1_MISO1 (0x06UL << NUMAKER_SYS_GPH_MFP3_PH12MFP_Pos)
#define NUMAKER_SYS_GPH_MFP3_PH12MFP_CCAP_PIXCLK (0x07UL << NUMAKER_SYS_GPH_MFP3_PH12MFP_Pos)
#define NUMAKER_SYS_GPH_MFP3_PH12MFP_CAN3_TXD (0x0aUL << NUMAKER_SYS_GPH_MFP3_PH12MFP_Pos)
#define NUMAKER_SYS_GPH_MFP3_PH12MFP_HBI_nCK (0x10UL << NUMAKER_SYS_GPH_MFP3_PH12MFP_Pos)
/* PH.13 MFP */
#define NUMAKER_SYS_GPH_MFP3_PH13MFP_GPIO (0x00UL << NUMAKER_SYS_GPH_MFP3_PH13MFP_Pos)
#define NUMAKER_SYS_GPH_MFP3_PH13MFP_EBI_AD1 (0x02UL << NUMAKER_SYS_GPH_MFP3_PH13MFP_Pos)
#define NUMAKER_SYS_GPH_MFP3_PH13MFP_UART9_RXD (0x03UL << NUMAKER_SYS_GPH_MFP3_PH13MFP_Pos)
#define NUMAKER_SYS_GPH_MFP3_PH13MFP_QSPI1_MOSI1 (0x06UL << NUMAKER_SYS_GPH_MFP3_PH13MFP_Pos)
#define NUMAKER_SYS_GPH_MFP3_PH13MFP_CCAP_SCLK (0x07UL << NUMAKER_SYS_GPH_MFP3_PH13MFP_Pos)
#define NUMAKER_SYS_GPH_MFP3_PH13MFP_CAN3_RXD (0x0aUL << NUMAKER_SYS_GPH_MFP3_PH13MFP_Pos)
#define NUMAKER_SYS_GPH_MFP3_PH13MFP_HBI_nCS (0x10UL << NUMAKER_SYS_GPH_MFP3_PH13MFP_Pos)
/* PH.14 MFP */
#define NUMAKER_SYS_GPH_MFP3_PH14MFP_GPIO (0x00UL << NUMAKER_SYS_GPH_MFP3_PH14MFP_Pos)
#define NUMAKER_SYS_GPH_MFP3_PH14MFP_EBI_AD2 (0x02UL << NUMAKER_SYS_GPH_MFP3_PH14MFP_Pos)
#define NUMAKER_SYS_GPH_MFP3_PH14MFP_QSPI1_SS (0x06UL << NUMAKER_SYS_GPH_MFP3_PH14MFP_Pos)
#define NUMAKER_SYS_GPH_MFP3_PH14MFP_CCAP_SFIELD (0x07UL << NUMAKER_SYS_GPH_MFP3_PH14MFP_Pos)
#define NUMAKER_SYS_GPH_MFP3_PH14MFP_HBI_D3 (0x10UL << NUMAKER_SYS_GPH_MFP3_PH14MFP_Pos)
/* PH.15 MFP */
#define NUMAKER_SYS_GPH_MFP3_PH15MFP_GPIO (0x00UL << NUMAKER_SYS_GPH_MFP3_PH15MFP_Pos)
#define NUMAKER_SYS_GPH_MFP3_PH15MFP_EBI_AD3 (0x02UL << NUMAKER_SYS_GPH_MFP3_PH15MFP_Pos)
#define NUMAKER_SYS_GPH_MFP3_PH15MFP_QSPI1_CLK (0x06UL << NUMAKER_SYS_GPH_MFP3_PH15MFP_Pos)
#define NUMAKER_SYS_GPH_MFP3_PH15MFP_CCAP_VSYNC (0x07UL << NUMAKER_SYS_GPH_MFP3_PH15MFP_Pos)
#define NUMAKER_SYS_GPH_MFP3_PH15MFP_HBI_D2 (0x10UL << NUMAKER_SYS_GPH_MFP3_PH15MFP_Pos)
/* PI.6 MFP */
#define NUMAKER_SYS_GPI_MFP1_PI6MFP_GPIO (0x00UL << NUMAKER_SYS_GPI_MFP1_PI6MFP_Pos)
#define NUMAKER_SYS_GPI_MFP1_PI6MFP_SC1_nCD (0x05UL << NUMAKER_SYS_GPI_MFP1_PI6MFP_Pos)
#define NUMAKER_SYS_GPI_MFP1_PI6MFP_I2S0_BCLK (0x06UL << NUMAKER_SYS_GPI_MFP1_PI6MFP_Pos)
#define NUMAKER_SYS_GPI_MFP1_PI6MFP_SPI1_I2SMCLK (0x07UL << NUMAKER_SYS_GPI_MFP1_PI6MFP_Pos)
#define NUMAKER_SYS_GPI_MFP1_PI6MFP_UART2_TXD (0x08UL << NUMAKER_SYS_GPI_MFP1_PI6MFP_Pos)
#define NUMAKER_SYS_GPI_MFP1_PI6MFP_I2C1_SCL (0x09UL << NUMAKER_SYS_GPI_MFP1_PI6MFP_Pos)
#define NUMAKER_SYS_GPI_MFP1_PI6MFP_CAN3_TXD (0x0dUL << NUMAKER_SYS_GPI_MFP1_PI6MFP_Pos)
#define NUMAKER_SYS_GPI_MFP1_PI6MFP_USB_VBUS_ST (0x0fUL << NUMAKER_SYS_GPI_MFP1_PI6MFP_Pos)
/* PI.7 MFP */
#define NUMAKER_SYS_GPI_MFP1_PI7MFP_GPIO (0x00UL << NUMAKER_SYS_GPI_MFP1_PI7MFP_Pos)
#define NUMAKER_SYS_GPI_MFP1_PI7MFP_SC1_PWR (0x05UL << NUMAKER_SYS_GPI_MFP1_PI7MFP_Pos)
#define NUMAKER_SYS_GPI_MFP1_PI7MFP_I2S0_MCLK (0x06UL << NUMAKER_SYS_GPI_MFP1_PI7MFP_Pos)
#define NUMAKER_SYS_GPI_MFP1_PI7MFP_SPI1_MISO (0x07UL << NUMAKER_SYS_GPI_MFP1_PI7MFP_Pos)
#define NUMAKER_SYS_GPI_MFP1_PI7MFP_UART2_RXD (0x08UL << NUMAKER_SYS_GPI_MFP1_PI7MFP_Pos)
#define NUMAKER_SYS_GPI_MFP1_PI7MFP_I2C1_SDA (0x09UL << NUMAKER_SYS_GPI_MFP1_PI7MFP_Pos)
#define NUMAKER_SYS_GPI_MFP1_PI7MFP_CAN3_RXD (0x0dUL << NUMAKER_SYS_GPI_MFP1_PI7MFP_Pos)
#define NUMAKER_SYS_GPI_MFP1_PI7MFP_USB_VBUS_EN (0x0fUL << NUMAKER_SYS_GPI_MFP1_PI7MFP_Pos)
/* PI.8 MFP */
#define NUMAKER_SYS_GPI_MFP2_PI8MFP_GPIO (0x00UL << NUMAKER_SYS_GPI_MFP2_PI8MFP_Pos)
#define NUMAKER_SYS_GPI_MFP2_PI8MFP_SC1_RST (0x05UL << NUMAKER_SYS_GPI_MFP2_PI8MFP_Pos)
#define NUMAKER_SYS_GPI_MFP2_PI8MFP_I2S0_DI (0x06UL << NUMAKER_SYS_GPI_MFP2_PI8MFP_Pos)
#define NUMAKER_SYS_GPI_MFP2_PI8MFP_SPI1_MOSI (0x07UL << NUMAKER_SYS_GPI_MFP2_PI8MFP_Pos)
#define NUMAKER_SYS_GPI_MFP2_PI8MFP_UART2_nRTS (0x08UL << NUMAKER_SYS_GPI_MFP2_PI8MFP_Pos)
#define NUMAKER_SYS_GPI_MFP2_PI8MFP_I2C0_SMBAL (0x09UL << NUMAKER_SYS_GPI_MFP2_PI8MFP_Pos)
#define NUMAKER_SYS_GPI_MFP2_PI8MFP_CAN2_TXD (0x0dUL << NUMAKER_SYS_GPI_MFP2_PI8MFP_Pos)
/* PI.9 MFP */
#define NUMAKER_SYS_GPI_MFP2_PI9MFP_GPIO (0x00UL << NUMAKER_SYS_GPI_MFP2_PI9MFP_Pos)
#define NUMAKER_SYS_GPI_MFP2_PI9MFP_SC1_DAT (0x05UL << NUMAKER_SYS_GPI_MFP2_PI9MFP_Pos)
#define NUMAKER_SYS_GPI_MFP2_PI9MFP_I2S0_DO (0x06UL << NUMAKER_SYS_GPI_MFP2_PI9MFP_Pos)
#define NUMAKER_SYS_GPI_MFP2_PI9MFP_SPI1_CLK (0x07UL << NUMAKER_SYS_GPI_MFP2_PI9MFP_Pos)
#define NUMAKER_SYS_GPI_MFP2_PI9MFP_UART2_nCTS (0x08UL << NUMAKER_SYS_GPI_MFP2_PI9MFP_Pos)
#define NUMAKER_SYS_GPI_MFP2_PI9MFP_I2C0_SMBSUS (0x09UL << NUMAKER_SYS_GPI_MFP2_PI9MFP_Pos)
#define NUMAKER_SYS_GPI_MFP2_PI9MFP_CAN2_RXD (0x0dUL << NUMAKER_SYS_GPI_MFP2_PI9MFP_Pos)
/* PI.10 MFP */
#define NUMAKER_SYS_GPI_MFP2_PI10MFP_GPIO (0x00UL << NUMAKER_SYS_GPI_MFP2_PI10MFP_Pos)
#define NUMAKER_SYS_GPI_MFP2_PI10MFP_SC1_CLK (0x05UL << NUMAKER_SYS_GPI_MFP2_PI10MFP_Pos)
#define NUMAKER_SYS_GPI_MFP2_PI10MFP_I2S0_LRCK (0x06UL << NUMAKER_SYS_GPI_MFP2_PI10MFP_Pos)
#define NUMAKER_SYS_GPI_MFP2_PI10MFP_SPI1_SS (0x07UL << NUMAKER_SYS_GPI_MFP2_PI10MFP_Pos)
#define NUMAKER_SYS_GPI_MFP2_PI10MFP_UART2_TXD (0x08UL << NUMAKER_SYS_GPI_MFP2_PI10MFP_Pos)
#define NUMAKER_SYS_GPI_MFP2_PI10MFP_I2C0_SCL (0x09UL << NUMAKER_SYS_GPI_MFP2_PI10MFP_Pos)
#define NUMAKER_SYS_GPI_MFP2_PI10MFP_CAN3_TXD (0x0dUL << NUMAKER_SYS_GPI_MFP2_PI10MFP_Pos)
/* PI.11 MFP */
#define NUMAKER_SYS_GPI_MFP2_PI11MFP_GPIO (0x00UL << NUMAKER_SYS_GPI_MFP2_PI11MFP_Pos)
#define NUMAKER_SYS_GPI_MFP2_PI11MFP_UART2_RXD (0x08UL << NUMAKER_SYS_GPI_MFP2_PI11MFP_Pos)
#define NUMAKER_SYS_GPI_MFP2_PI11MFP_I2C0_SDA (0x09UL << NUMAKER_SYS_GPI_MFP2_PI11MFP_Pos)
#define NUMAKER_SYS_GPI_MFP2_PI11MFP_CAN3_RXD (0x0dUL << NUMAKER_SYS_GPI_MFP2_PI11MFP_Pos)
/* PI.12 MFP */
#define NUMAKER_SYS_GPI_MFP3_PI12MFP_GPIO (0x00UL << NUMAKER_SYS_GPI_MFP3_PI12MFP_Pos)
#define NUMAKER_SYS_GPI_MFP3_PI12MFP_SPIM_SS (0x03UL << NUMAKER_SYS_GPI_MFP3_PI12MFP_Pos)
#define NUMAKER_SYS_GPI_MFP3_PI12MFP_QSPI0_MISO1 (0x04UL << NUMAKER_SYS_GPI_MFP3_PI12MFP_Pos)
#define NUMAKER_SYS_GPI_MFP3_PI12MFP_CAN0_TXD (0x0aUL << NUMAKER_SYS_GPI_MFP3_PI12MFP_Pos)
#define NUMAKER_SYS_GPI_MFP3_PI12MFP_UART4_TXD (0x0bUL << NUMAKER_SYS_GPI_MFP3_PI12MFP_Pos)
#define NUMAKER_SYS_GPI_MFP3_PI12MFP_EPWM1_CH0 (0x0cUL << NUMAKER_SYS_GPI_MFP3_PI12MFP_Pos)
#define NUMAKER_SYS_GPI_MFP3_PI12MFP_I2C3_SMBAL (0x0fUL << NUMAKER_SYS_GPI_MFP3_PI12MFP_Pos)
/* PI.13 MFP */
#define NUMAKER_SYS_GPI_MFP3_PI13MFP_GPIO (0x00UL << NUMAKER_SYS_GPI_MFP3_PI13MFP_Pos)
#define NUMAKER_SYS_GPI_MFP3_PI13MFP_SPIM_MISO (0x03UL << NUMAKER_SYS_GPI_MFP3_PI13MFP_Pos)
#define NUMAKER_SYS_GPI_MFP3_PI13MFP_QSPI0_MOSI1 (0x04UL << NUMAKER_SYS_GPI_MFP3_PI13MFP_Pos)
#define NUMAKER_SYS_GPI_MFP3_PI13MFP_CAN0_RXD (0x0aUL << NUMAKER_SYS_GPI_MFP3_PI13MFP_Pos)
#define NUMAKER_SYS_GPI_MFP3_PI13MFP_UART4_RXD (0x0bUL << NUMAKER_SYS_GPI_MFP3_PI13MFP_Pos)
#define NUMAKER_SYS_GPI_MFP3_PI13MFP_EPWM1_CH1 (0x0cUL << NUMAKER_SYS_GPI_MFP3_PI13MFP_Pos)
#define NUMAKER_SYS_GPI_MFP3_PI13MFP_I2C3_SMBSUS (0x0fUL << NUMAKER_SYS_GPI_MFP3_PI13MFP_Pos)
/* PI.14 MFP */
#define NUMAKER_SYS_GPI_MFP3_PI14MFP_GPIO (0x00UL << NUMAKER_SYS_GPI_MFP3_PI14MFP_Pos)
#define NUMAKER_SYS_GPI_MFP3_PI14MFP_SPIM_D2 (0x03UL << NUMAKER_SYS_GPI_MFP3_PI14MFP_Pos)
#define NUMAKER_SYS_GPI_MFP3_PI14MFP_QSPI0_SS (0x04UL << NUMAKER_SYS_GPI_MFP3_PI14MFP_Pos)
#define NUMAKER_SYS_GPI_MFP3_PI14MFP_UART8_nCTS (0x07UL << NUMAKER_SYS_GPI_MFP3_PI14MFP_Pos)
#define NUMAKER_SYS_GPI_MFP3_PI14MFP_CAN1_TXD (0x0aUL << NUMAKER_SYS_GPI_MFP3_PI14MFP_Pos)
#define NUMAKER_SYS_GPI_MFP3_PI14MFP_UART3_TXD (0x0bUL << NUMAKER_SYS_GPI_MFP3_PI14MFP_Pos)
#define NUMAKER_SYS_GPI_MFP3_PI14MFP_EPWM1_CH2 (0x0cUL << NUMAKER_SYS_GPI_MFP3_PI14MFP_Pos)
#define NUMAKER_SYS_GPI_MFP3_PI14MFP_I2C3_SCL (0x0fUL << NUMAKER_SYS_GPI_MFP3_PI14MFP_Pos)
/* PI.15 MFP */
#define NUMAKER_SYS_GPI_MFP3_PI15MFP_GPIO (0x00UL << NUMAKER_SYS_GPI_MFP3_PI15MFP_Pos)
#define NUMAKER_SYS_GPI_MFP3_PI15MFP_SPIM_D3 (0x03UL << NUMAKER_SYS_GPI_MFP3_PI15MFP_Pos)
#define NUMAKER_SYS_GPI_MFP3_PI15MFP_QSPI0_CLK (0x04UL << NUMAKER_SYS_GPI_MFP3_PI15MFP_Pos)
#define NUMAKER_SYS_GPI_MFP3_PI15MFP_UART8_nRTS (0x07UL << NUMAKER_SYS_GPI_MFP3_PI15MFP_Pos)
#define NUMAKER_SYS_GPI_MFP3_PI15MFP_CAN1_RXD (0x0aUL << NUMAKER_SYS_GPI_MFP3_PI15MFP_Pos)
#define NUMAKER_SYS_GPI_MFP3_PI15MFP_UART3_RXD (0x0bUL << NUMAKER_SYS_GPI_MFP3_PI15MFP_Pos)
#define NUMAKER_SYS_GPI_MFP3_PI15MFP_EPWM1_CH3 (0x0cUL << NUMAKER_SYS_GPI_MFP3_PI15MFP_Pos)
#define NUMAKER_SYS_GPI_MFP3_PI15MFP_I2C3_SDA (0x0fUL << NUMAKER_SYS_GPI_MFP3_PI15MFP_Pos)
/* PJ.0 MFP */
#define NUMAKER_SYS_GPJ_MFP0_PJ0MFP_GPIO (0x00UL << NUMAKER_SYS_GPJ_MFP0_PJ0MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP0_PJ0MFP_SPIM_CLK (0x03UL << NUMAKER_SYS_GPJ_MFP0_PJ0MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP0_PJ0MFP_QSPI0_MISO0 (0x04UL << NUMAKER_SYS_GPJ_MFP0_PJ0MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP0_PJ0MFP_UART8_TXD (0x07UL << NUMAKER_SYS_GPJ_MFP0_PJ0MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP0_PJ0MFP_CAN2_TXD (0x0aUL << NUMAKER_SYS_GPJ_MFP0_PJ0MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP0_PJ0MFP_EPWM1_CH4 (0x0cUL << NUMAKER_SYS_GPJ_MFP0_PJ0MFP_Pos)
/* PJ.1 MFP */
#define NUMAKER_SYS_GPJ_MFP0_PJ1MFP_GPIO (0x00UL << NUMAKER_SYS_GPJ_MFP0_PJ1MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP0_PJ1MFP_SPIM_MOSI (0x03UL << NUMAKER_SYS_GPJ_MFP0_PJ1MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP0_PJ1MFP_QSPI0_MOSI0 (0x04UL << NUMAKER_SYS_GPJ_MFP0_PJ1MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP0_PJ1MFP_UART8_RXD (0x07UL << NUMAKER_SYS_GPJ_MFP0_PJ1MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP0_PJ1MFP_CAN2_RXD (0x0aUL << NUMAKER_SYS_GPJ_MFP0_PJ1MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP0_PJ1MFP_EPWM1_CH5 (0x0cUL << NUMAKER_SYS_GPJ_MFP0_PJ1MFP_Pos)
/* PJ.2 MFP */
#define NUMAKER_SYS_GPJ_MFP0_PJ2MFP_GPIO (0x00UL << NUMAKER_SYS_GPJ_MFP0_PJ2MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP0_PJ2MFP_EBI_AD5 (0x02UL << NUMAKER_SYS_GPJ_MFP0_PJ2MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP0_PJ2MFP_UART8_nCTS (0x03UL << NUMAKER_SYS_GPJ_MFP0_PJ2MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP0_PJ2MFP_QSPI1_SS (0x06UL << NUMAKER_SYS_GPJ_MFP0_PJ2MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP0_PJ2MFP_CCAP_DATA5 (0x07UL << NUMAKER_SYS_GPJ_MFP0_PJ2MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP0_PJ2MFP_CAN0_TXD (0x0aUL << NUMAKER_SYS_GPJ_MFP0_PJ2MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP0_PJ2MFP_HBI_RWDS (0x10UL << NUMAKER_SYS_GPJ_MFP0_PJ2MFP_Pos)
/* PJ.3 MFP */
#define NUMAKER_SYS_GPJ_MFP0_PJ3MFP_GPIO (0x00UL << NUMAKER_SYS_GPJ_MFP0_PJ3MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP0_PJ3MFP_EBI_AD4 (0x02UL << NUMAKER_SYS_GPJ_MFP0_PJ3MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP0_PJ3MFP_UART8_nRTS (0x03UL << NUMAKER_SYS_GPJ_MFP0_PJ3MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP0_PJ3MFP_QSPI1_CLK (0x06UL << NUMAKER_SYS_GPJ_MFP0_PJ3MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP0_PJ3MFP_CCAP_DATA4 (0x07UL << NUMAKER_SYS_GPJ_MFP0_PJ3MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP0_PJ3MFP_CAN0_RXD (0x0aUL << NUMAKER_SYS_GPJ_MFP0_PJ3MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP0_PJ3MFP_HBI_D7 (0x10UL << NUMAKER_SYS_GPJ_MFP0_PJ3MFP_Pos)
/* PJ.4 MFP */
#define NUMAKER_SYS_GPJ_MFP1_PJ4MFP_GPIO (0x00UL << NUMAKER_SYS_GPJ_MFP1_PJ4MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP1_PJ4MFP_EBI_AD3 (0x02UL << NUMAKER_SYS_GPJ_MFP1_PJ4MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP1_PJ4MFP_UART8_TXD (0x03UL << NUMAKER_SYS_GPJ_MFP1_PJ4MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP1_PJ4MFP_QSPI1_MISO0 (0x06UL << NUMAKER_SYS_GPJ_MFP1_PJ4MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP1_PJ4MFP_CCAP_DATA3 (0x07UL << NUMAKER_SYS_GPJ_MFP1_PJ4MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP1_PJ4MFP_CAN1_TXD (0x0aUL << NUMAKER_SYS_GPJ_MFP1_PJ4MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP1_PJ4MFP_HBI_D6 (0x10UL << NUMAKER_SYS_GPJ_MFP1_PJ4MFP_Pos)
/* PJ.5 MFP */
#define NUMAKER_SYS_GPJ_MFP1_PJ5MFP_GPIO (0x00UL << NUMAKER_SYS_GPJ_MFP1_PJ5MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP1_PJ5MFP_EBI_AD2 (0x02UL << NUMAKER_SYS_GPJ_MFP1_PJ5MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP1_PJ5MFP_UART8_RXD (0x03UL << NUMAKER_SYS_GPJ_MFP1_PJ5MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP1_PJ5MFP_QSPI1_MOSI0 (0x06UL << NUMAKER_SYS_GPJ_MFP1_PJ5MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP1_PJ5MFP_CCAP_DATA2 (0x07UL << NUMAKER_SYS_GPJ_MFP1_PJ5MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP1_PJ5MFP_CAN1_RXD (0x0aUL << NUMAKER_SYS_GPJ_MFP1_PJ5MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP1_PJ5MFP_HBI_D5 (0x10UL << NUMAKER_SYS_GPJ_MFP1_PJ5MFP_Pos)
/* PJ.6 MFP */
#define NUMAKER_SYS_GPJ_MFP1_PJ6MFP_GPIO (0x00UL << NUMAKER_SYS_GPJ_MFP1_PJ6MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP1_PJ6MFP_EBI_AD1 (0x02UL << NUMAKER_SYS_GPJ_MFP1_PJ6MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP1_PJ6MFP_UART9_nCTS (0x03UL << NUMAKER_SYS_GPJ_MFP1_PJ6MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP1_PJ6MFP_CCAP_DATA1 (0x07UL << NUMAKER_SYS_GPJ_MFP1_PJ6MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP1_PJ6MFP_CAN2_TXD (0x0aUL << NUMAKER_SYS_GPJ_MFP1_PJ6MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP1_PJ6MFP_HBI_D4 (0x10UL << NUMAKER_SYS_GPJ_MFP1_PJ6MFP_Pos)
/* PJ.7 MFP */
#define NUMAKER_SYS_GPJ_MFP1_PJ7MFP_GPIO (0x00UL << NUMAKER_SYS_GPJ_MFP1_PJ7MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP1_PJ7MFP_EBI_AD0 (0x02UL << NUMAKER_SYS_GPJ_MFP1_PJ7MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP1_PJ7MFP_UART9_nRTS (0x03UL << NUMAKER_SYS_GPJ_MFP1_PJ7MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP1_PJ7MFP_CCAP_DATA0 (0x07UL << NUMAKER_SYS_GPJ_MFP1_PJ7MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP1_PJ7MFP_CAN2_RXD (0x0aUL << NUMAKER_SYS_GPJ_MFP1_PJ7MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP1_PJ7MFP_HBI_CK (0x10UL << NUMAKER_SYS_GPJ_MFP1_PJ7MFP_Pos)
/* PJ.8 MFP */
#define NUMAKER_SYS_GPJ_MFP2_PJ8MFP_GPIO (0x00UL << NUMAKER_SYS_GPJ_MFP2_PJ8MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP2_PJ8MFP_EBI_nRD (0x02UL << NUMAKER_SYS_GPJ_MFP2_PJ8MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP2_PJ8MFP_SD1_DAT3 (0x03UL << NUMAKER_SYS_GPJ_MFP2_PJ8MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP2_PJ8MFP_SPIM_SS (0x04UL << NUMAKER_SYS_GPJ_MFP2_PJ8MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP2_PJ8MFP_UART7_TXD (0x06UL << NUMAKER_SYS_GPJ_MFP2_PJ8MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP2_PJ8MFP_CAN2_TXD (0x0bUL << NUMAKER_SYS_GPJ_MFP2_PJ8MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP2_PJ8MFP_BPWM0_CH5 (0x0cUL << NUMAKER_SYS_GPJ_MFP2_PJ8MFP_Pos)
/* PJ.9 MFP */
#define NUMAKER_SYS_GPJ_MFP2_PJ9MFP_GPIO (0x00UL << NUMAKER_SYS_GPJ_MFP2_PJ9MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP2_PJ9MFP_EBI_nWR (0x02UL << NUMAKER_SYS_GPJ_MFP2_PJ9MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP2_PJ9MFP_SD1_DAT2 (0x03UL << NUMAKER_SYS_GPJ_MFP2_PJ9MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP2_PJ9MFP_SPIM_MISO (0x04UL << NUMAKER_SYS_GPJ_MFP2_PJ9MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP2_PJ9MFP_UART7_RXD (0x06UL << NUMAKER_SYS_GPJ_MFP2_PJ9MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP2_PJ9MFP_CAN2_RXD (0x0bUL << NUMAKER_SYS_GPJ_MFP2_PJ9MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP2_PJ9MFP_BPWM0_CH4 (0x0cUL << NUMAKER_SYS_GPJ_MFP2_PJ9MFP_Pos)
/* PJ.10 MFP */
#define NUMAKER_SYS_GPJ_MFP2_PJ10MFP_GPIO (0x00UL << NUMAKER_SYS_GPJ_MFP2_PJ10MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP2_PJ10MFP_EBI_MCLK (0x02UL << NUMAKER_SYS_GPJ_MFP2_PJ10MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP2_PJ10MFP_SD1_DAT1 (0x03UL << NUMAKER_SYS_GPJ_MFP2_PJ10MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP2_PJ10MFP_SPIM_D2 (0x04UL << NUMAKER_SYS_GPJ_MFP2_PJ10MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP2_PJ10MFP_UART6_TXD (0x06UL << NUMAKER_SYS_GPJ_MFP2_PJ10MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP2_PJ10MFP_I2C4_SCL (0x08UL << NUMAKER_SYS_GPJ_MFP2_PJ10MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP2_PJ10MFP_ECAP2_IC0 (0x09UL << NUMAKER_SYS_GPJ_MFP2_PJ10MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP2_PJ10MFP_CAN0_TXD (0x0bUL << NUMAKER_SYS_GPJ_MFP2_PJ10MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP2_PJ10MFP_BPWM0_CH3 (0x0cUL << NUMAKER_SYS_GPJ_MFP2_PJ10MFP_Pos)
/* PJ.11 MFP */
#define NUMAKER_SYS_GPJ_MFP2_PJ11MFP_GPIO (0x00UL << NUMAKER_SYS_GPJ_MFP2_PJ11MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP2_PJ11MFP_EBI_ALE (0x02UL << NUMAKER_SYS_GPJ_MFP2_PJ11MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP2_PJ11MFP_SD1_DAT0 (0x03UL << NUMAKER_SYS_GPJ_MFP2_PJ11MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP2_PJ11MFP_SPIM_D3 (0x04UL << NUMAKER_SYS_GPJ_MFP2_PJ11MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP2_PJ11MFP_UART6_RXD (0x06UL << NUMAKER_SYS_GPJ_MFP2_PJ11MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP2_PJ11MFP_I2C4_SDA (0x08UL << NUMAKER_SYS_GPJ_MFP2_PJ11MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP2_PJ11MFP_ECAP2_IC1 (0x09UL << NUMAKER_SYS_GPJ_MFP2_PJ11MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP2_PJ11MFP_CAN0_RXD (0x0bUL << NUMAKER_SYS_GPJ_MFP2_PJ11MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP2_PJ11MFP_BPWM0_CH2 (0x0cUL << NUMAKER_SYS_GPJ_MFP2_PJ11MFP_Pos)
/* PJ.12 MFP */
#define NUMAKER_SYS_GPJ_MFP3_PJ12MFP_GPIO (0x00UL << NUMAKER_SYS_GPJ_MFP3_PJ12MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP3_PJ12MFP_EBI_nCS0 (0x02UL << NUMAKER_SYS_GPJ_MFP3_PJ12MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP3_PJ12MFP_SD1_CMD (0x03UL << NUMAKER_SYS_GPJ_MFP3_PJ12MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP3_PJ12MFP_SPIM_CLK (0x04UL << NUMAKER_SYS_GPJ_MFP3_PJ12MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP3_PJ12MFP_I2C4_SMBAL (0x08UL << NUMAKER_SYS_GPJ_MFP3_PJ12MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP3_PJ12MFP_ECAP2_IC2 (0x09UL << NUMAKER_SYS_GPJ_MFP3_PJ12MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP3_PJ12MFP_CAN1_TXD (0x0bUL << NUMAKER_SYS_GPJ_MFP3_PJ12MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP3_PJ12MFP_BPWM0_CH1 (0x0cUL << NUMAKER_SYS_GPJ_MFP3_PJ12MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP3_PJ12MFP_HSUSB_VBUS_ST (0x0fUL << NUMAKER_SYS_GPJ_MFP3_PJ12MFP_Pos)
/* PJ.13 MFP */
#define NUMAKER_SYS_GPJ_MFP3_PJ13MFP_GPIO (0x00UL << NUMAKER_SYS_GPJ_MFP3_PJ13MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP3_PJ13MFP_SD1_CLK (0x03UL << NUMAKER_SYS_GPJ_MFP3_PJ13MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP3_PJ13MFP_SPIM_MOSI (0x04UL << NUMAKER_SYS_GPJ_MFP3_PJ13MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP3_PJ13MFP_I2C4_SMBSUS (0x08UL << NUMAKER_SYS_GPJ_MFP3_PJ13MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP3_PJ13MFP_CAN1_RXD (0x0bUL << NUMAKER_SYS_GPJ_MFP3_PJ13MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP3_PJ13MFP_BPWM0_CH0 (0x0cUL << NUMAKER_SYS_GPJ_MFP3_PJ13MFP_Pos)
#define NUMAKER_SYS_GPJ_MFP3_PJ13MFP_HSUSB_VBUS_EN (0x0fUL << NUMAKER_SYS_GPJ_MFP3_PJ13MFP_Pos)
/* End of M460 BSP sys.h pin-mux module copy */
#endif
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/numaker-m46x-pinctrl.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 68,313 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_DT_BINDINGS_PINCTRL_RENESAS_PINCTRL_R7FA4M1XXXXXX_H_
#define ZEPHYR_DT_BINDINGS_PINCTRL_RENESAS_PINCTRL_R7FA4M1XXXXXX_H_
#include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-ra-common.h>
#define P000_AMP0P RA_PINCFG__40(0, 0, 0x02, RA_PINCFG_FUNC | RA_PINCFG_ANALOG)
#define P000_AN000 RA_PINCFG__40(0, 0, 0x01, RA_PINCFG_ANALOG)
#define P000_TS21 RA_PINCFG__40(0, 0, 0x0C, RA_PINCFG_FUNC)
#define P001_AMP0M RA_PINCFG__40(0, 1, 0x02, RA_PINCFG_FUNC | RA_PINCFG_ANALOG)
#define P001_AN001 RA_PINCFG__40(0, 1, 0x01, RA_PINCFG_ANALOG)
#define P001_TS22 RA_PINCFG__40(0, 1, 0x0C, RA_PINCFG_FUNC)
#define P002_AMP0O RA_PINCFG__48(0, 2, 0x02, RA_PINCFG_FUNC | RA_PINCFG_ANALOG)
#define P002_AN002 RA_PINCFG__48(0, 2, 0x01, RA_PINCFG_ANALOG)
#define P003_AMP1O RA_PINCFG__64(0, 3, 0x02, RA_PINCFG_FUNC | RA_PINCFG_ANALOG)
#define P003_AN003 RA_PINCFG__64(0, 3, 0x01, RA_PINCFG_ANALOG)
#define P004_AMP2O RA_PINCFG__64(0, 4, 0x02, RA_PINCFG_FUNC | RA_PINCFG_ANALOG)
#define P004_AN004 RA_PINCFG__64(0, 4, 0x01, RA_PINCFG_ANALOG)
#define P005_AMP3P RA_PINCFG_100(0, 5, 0x02, RA_PINCFG_FUNC | RA_PINCFG_ANALOG)
#define P005_AN011 RA_PINCFG_100(0, 5, 0x01, RA_PINCFG_ANALOG)
#define P006_AMP3M RA_PINCFG_100(0, 6, 0x02, RA_PINCFG_FUNC | RA_PINCFG_ANALOG)
#define P006_AN012 RA_PINCFG_100(0, 6, 0x01, RA_PINCFG_ANALOG)
#define P007_AMP3O RA_PINCFG_100(0, 7, 0x02, RA_PINCFG_FUNC | RA_PINCFG_ANALOG)
#define P007_AN013 RA_PINCFG_100(0, 7, 0x01, RA_PINCFG_ANALOG)
#define P008_AN014 RA_PINCFG_100(0, 8, 0x01, RA_PINCFG_ANALOG)
#define P010_AMP2M RA_PINCFG__40(0, 10, 0x02, RA_PINCFG_FUNC | RA_PINCFG_ANALOG)
#define P010_AN005 RA_PINCFG__40(0, 10, 0x01, RA_PINCFG_ANALOG)
#define P010_TS30 RA_PINCFG__40(0, 10, 0x0C, RA_PINCFG_FUNC)
#define P010_VREFH0 RA_PINCFG__40(0, 10, 0x03, RA_PINCFG_FUNC | RA_PINCFG_ANALOG)
#define P011_AN006 RA_PINCFG__40(0, 11, 0x01, RA_PINCFG_ANALOG)
#define P011_TS31 RA_PINCFG__40(0, 11, 0x0C, RA_PINCFG_FUNC)
#define P011_VREFL0 RA_PINCFG__40(0, 11, 0x03, RA_PINCFG_FUNC | RA_PINCFG_ANALOG)
#define P012_AN007 RA_PINCFG__40(0, 12, 0x01, RA_PINCFG_ANALOG)
#define P012_VREFH RA_PINCFG__40(0, 12, 0x03, RA_PINCFG_FUNC | RA_PINCFG_ANALOG)
#define P013_AN008 RA_PINCFG__40(0, 13, 0x01, RA_PINCFG_ANALOG)
#define P013_VREFL RA_PINCFG__40(0, 13, 0x03, RA_PINCFG_FUNC | RA_PINCFG_ANALOG)
#define P014_AN009 RA_PINCFG__40(0, 14, 0x01, RA_PINCFG_ANALOG)
#define P014_DA0 RA_PINCFG__40(0, 14, 0x02, RA_PINCFG_FUNC | RA_PINCFG_ANALOG)
#define P015_AN010 RA_PINCFG__40(0, 15, 0x01, RA_PINCFG_ANALOG)
#define P015_TS28 RA_PINCFG__40(0, 15, 0x0C, RA_PINCFG_FUNC)
#define P100_AGTIO0 RA_PINCFG__40(1, 0, 0x01, RA_PINCFG_FUNC)
#define P100_AN022 RA_PINCFG__40(1, 0, 0x01, RA_PINCFG_ANALOG)
#define P100_CMPIN0 RA_PINCFG__40(1, 0, 0x02, RA_PINCFG_FUNC | RA_PINCFG_ANALOG)
#define P100_GTETRGA RA_PINCFG__40(1, 0, 0x02, RA_PINCFG_FUNC)
#define P100_GTIOC5B RA_PINCFG__40(1, 0, 0x03, RA_PINCFG_FUNC)
#define P100_KR00 RA_PINCFG__40(1, 0, 0x08, RA_PINCFG_FUNC)
#define P100_MISO0 RA_PINCFG__40(1, 0, 0x04, RA_PINCFG_FUNC)
#define P100_MISOA RA_PINCFG__40(1, 0, 0x06, RA_PINCFG_FUNC)
#define P100_RXD0 RA_PINCFG__40(1, 0, 0x04, RA_PINCFG_FUNC)
#define P100_SCK1 RA_PINCFG__40(1, 0, 0x05, RA_PINCFG_FUNC)
#define P100_SCL0 RA_PINCFG__40(1, 0, 0x04, RA_PINCFG_FUNC)
#define P100_SCL1 RA_PINCFG__40(1, 0, 0x07, RA_PINCFG_FUNC)
#define P100_VL1 RA_PINCFG__40(1, 0, 0x0D, RA_PINCFG_FUNC)
#define P101_AGTEE0 RA_PINCFG__40(1, 1, 0x01, RA_PINCFG_FUNC)
#define P101_AN021 RA_PINCFG__40(1, 1, 0x01, RA_PINCFG_ANALOG)
#define P101_CMPREF0 RA_PINCFG__40(1, 1, 0x02, RA_PINCFG_FUNC | RA_PINCFG_ANALOG)
#define P101_CTS1_RTS1 RA_PINCFG__40(1, 1, 0x05, RA_PINCFG_FUNC)
#define P101_GTETRGB RA_PINCFG__40(1, 1, 0x02, RA_PINCFG_FUNC)
#define P101_GTIOC5A RA_PINCFG__40(1, 1, 0x03, RA_PINCFG_FUNC)
#define P101_KR01 RA_PINCFG__40(1, 1, 0x08, RA_PINCFG_FUNC)
#define P101_MOSI0 RA_PINCFG__40(1, 1, 0x04, RA_PINCFG_FUNC)
#define P101_MOSIA RA_PINCFG__40(1, 1, 0x06, RA_PINCFG_FUNC)
#define P101_SDA0 RA_PINCFG__40(1, 1, 0x04, RA_PINCFG_FUNC)
#define P101_SDA1 RA_PINCFG__40(1, 1, 0x07, RA_PINCFG_FUNC)
#define P101_SS1 RA_PINCFG__40(1, 1, 0x05, RA_PINCFG_FUNC)
#define P101_TXD0 RA_PINCFG__40(1, 1, 0x04, RA_PINCFG_FUNC)
#define P101_VL2 RA_PINCFG__40(1, 1, 0x0D, RA_PINCFG_FUNC)
#define P102_ADTRG0 RA_PINCFG__40(1, 2, 0x0A, RA_PINCFG_FUNC)
#define P102_AGTO0 RA_PINCFG__40(1, 2, 0x01, RA_PINCFG_FUNC)
#define P102_AN020 RA_PINCFG__40(1, 2, 0x01, RA_PINCFG_ANALOG)
#define P102_CMPIN1 RA_PINCFG__40(1, 2, 0x02, RA_PINCFG_FUNC | RA_PINCFG_ANALOG)
#define P102_CRX0 RA_PINCFG__40(1, 2, 0x10, RA_PINCFG_FUNC)
#define P102_GTIOC2B RA_PINCFG__40(1, 2, 0x03, RA_PINCFG_FUNC)
#define P102_GTOWLO RA_PINCFG__40(1, 2, 0x02, RA_PINCFG_FUNC)
#define P102_KR02 RA_PINCFG__40(1, 2, 0x08, RA_PINCFG_FUNC)
#define P102_MOSI2 RA_PINCFG__40(1, 2, 0x05, RA_PINCFG_FUNC)
#define P102_RSPCKA RA_PINCFG__40(1, 2, 0x06, RA_PINCFG_FUNC)
#define P102_SCK0 RA_PINCFG__40(1, 2, 0x04, RA_PINCFG_FUNC)
#define P102_SDA2 RA_PINCFG__40(1, 2, 0x05, RA_PINCFG_FUNC)
#define P102_TXD2 RA_PINCFG__40(1, 2, 0x05, RA_PINCFG_FUNC)
#define P102_VL3 RA_PINCFG__40(1, 2, 0x0D, RA_PINCFG_FUNC)
#define P103_AN019 RA_PINCFG__48(1, 3, 0x01, RA_PINCFG_ANALOG)
#define P103_CMPREF1 RA_PINCFG__48(1, 3, 0x02, RA_PINCFG_FUNC | RA_PINCFG_ANALOG)
#define P103_CTS0_RTS0 RA_PINCFG__48(1, 3, 0x04, RA_PINCFG_FUNC)
#define P103_CTX0 RA_PINCFG__48(1, 3, 0x10, RA_PINCFG_FUNC)
#define P103_GTIOC2A RA_PINCFG__48(1, 3, 0x03, RA_PINCFG_FUNC)
#define P103_GTOWUP RA_PINCFG__48(1, 3, 0x02, RA_PINCFG_FUNC)
#define P103_KR03 RA_PINCFG__48(1, 3, 0x08, RA_PINCFG_FUNC)
#define P103_SS0 RA_PINCFG__48(1, 3, 0x04, RA_PINCFG_FUNC)
#define P103_SSLA0 RA_PINCFG__48(1, 3, 0x06, RA_PINCFG_FUNC)
#define P103_VL4 RA_PINCFG__48(1, 3, 0x0D, RA_PINCFG_FUNC)
#define P104_COM0 RA_PINCFG__48(1, 4, 0x0D, RA_PINCFG_FUNC)
#define P104_GTETRGB RA_PINCFG__48(1, 4, 0x02, RA_PINCFG_FUNC)
#define P104_GTIOC1B RA_PINCFG__48(1, 4, 0x03, RA_PINCFG_FUNC)
#define P104_KR04 RA_PINCFG__48(1, 4, 0x08, RA_PINCFG_FUNC)
#define P104_MISO0 RA_PINCFG__48(1, 4, 0x04, RA_PINCFG_FUNC)
#define P104_RXD0 RA_PINCFG__48(1, 4, 0x04, RA_PINCFG_FUNC)
#define P104_SCL0 RA_PINCFG__48(1, 4, 0x04, RA_PINCFG_FUNC)
#define P104_SSLA1 RA_PINCFG__48(1, 4, 0x06, RA_PINCFG_FUNC)
#define P104_TS13 RA_PINCFG__48(1, 4, 0x0C, RA_PINCFG_FUNC)
#define P105_COM1 RA_PINCFG__64(1, 5, 0x0D, RA_PINCFG_FUNC)
#define P105_GTETRGA RA_PINCFG__64(1, 5, 0x02, RA_PINCFG_FUNC)
#define P105_GTIOC1A RA_PINCFG__64(1, 5, 0x03, RA_PINCFG_FUNC)
#define P105_KR05 RA_PINCFG__64(1, 5, 0x08, RA_PINCFG_FUNC)
#define P105_SSLA2 RA_PINCFG__64(1, 5, 0x06, RA_PINCFG_FUNC)
#define P105_TS34 RA_PINCFG__64(1, 5, 0x0C, RA_PINCFG_FUNC)
#define P106_COM2 RA_PINCFG__64(1, 6, 0x0D, RA_PINCFG_FUNC)
#define P106_GTIOC0B RA_PINCFG__64(1, 6, 0x03, RA_PINCFG_FUNC)
#define P106_KR06 RA_PINCFG__64(1, 6, 0x08, RA_PINCFG_FUNC)
#define P106_SSLA3 RA_PINCFG__64(1, 6, 0x06, RA_PINCFG_FUNC)
#define P107_COM3 RA_PINCFG__64(1, 7, 0x0D, RA_PINCFG_FUNC)
#define P107_GTIOC0A RA_PINCFG__64(1, 7, 0x03, RA_PINCFG_FUNC)
#define P107_KR07 RA_PINCFG__64(1, 7, 0x08, RA_PINCFG_FUNC)
#define P108_CTS9_RTS9 RA_PINCFG__40(1, 8, 0x05, RA_PINCFG_FUNC)
#define P108_GTIOC0B RA_PINCFG__40(1, 8, 0x03, RA_PINCFG_FUNC)
#define P108_GTOULO RA_PINCFG__40(1, 8, 0x02, RA_PINCFG_FUNC)
#define P108_SS9 RA_PINCFG__40(1, 8, 0x05, RA_PINCFG_FUNC)
#define P108_SSLB0 RA_PINCFG__40(1, 8, 0x06, RA_PINCFG_FUNC)
#define P109_CLKOUT RA_PINCFG__40(1, 9, 0x09, RA_PINCFG_FUNC)
#define P109_CTX0 RA_PINCFG__40(1, 9, 0x10, RA_PINCFG_FUNC)
#define P109_GTIOC1A RA_PINCFG__40(1, 9, 0x03, RA_PINCFG_FUNC)
#define P109_GTOVUP RA_PINCFG__40(1, 9, 0x02, RA_PINCFG_FUNC)
#define P109_MOSI9 RA_PINCFG__40(1, 9, 0x05, RA_PINCFG_FUNC)
#define P109_MOSIB RA_PINCFG__40(1, 9, 0x06, RA_PINCFG_FUNC)
#define P109_SCK1 RA_PINCFG__40(1, 9, 0x04, RA_PINCFG_FUNC)
#define P109_SDA9 RA_PINCFG__40(1, 9, 0x05, RA_PINCFG_FUNC)
#define P109_SEG23 RA_PINCFG__40(1, 9, 0x0D, RA_PINCFG_FUNC)
#define P109_TS10 RA_PINCFG__40(1, 9, 0x0C, RA_PINCFG_FUNC)
#define P109_TXD9 RA_PINCFG__40(1, 9, 0x05, RA_PINCFG_FUNC)
#define P110_CRX0 RA_PINCFG__40(1, 10, 0x10, RA_PINCFG_FUNC)
#define P110_CTS2_RTS2 RA_PINCFG__40(1, 10, 0x04, RA_PINCFG_FUNC)
#define P110_GTIOC1B RA_PINCFG__40(1, 10, 0x03, RA_PINCFG_FUNC)
#define P110_GTOVLO RA_PINCFG__40(1, 10, 0x02, RA_PINCFG_FUNC)
#define P110_MISO9 RA_PINCFG__40(1, 10, 0x05, RA_PINCFG_FUNC)
#define P110_MISOB RA_PINCFG__40(1, 10, 0x06, RA_PINCFG_FUNC)
#define P110_RXD9 RA_PINCFG__40(1, 10, 0x05, RA_PINCFG_FUNC)
#define P110_SCL9 RA_PINCFG__40(1, 10, 0x05, RA_PINCFG_FUNC)
#define P110_SEG24 RA_PINCFG__40(1, 10, 0x0D, RA_PINCFG_FUNC)
#define P110_SS2 RA_PINCFG__40(1, 10, 0x04, RA_PINCFG_FUNC)
#define P110_VCOUT RA_PINCFG__40(1, 10, 0x09, RA_PINCFG_FUNC)
#define P111_CAPH RA_PINCFG__40(1, 11, 0x0D, RA_PINCFG_FUNC)
#define P111_GTIOC3A RA_PINCFG__40(1, 11, 0x03, RA_PINCFG_FUNC)
#define P111_RSPCKB RA_PINCFG__40(1, 11, 0x06, RA_PINCFG_FUNC)
#define P111_SCK2 RA_PINCFG__40(1, 11, 0x04, RA_PINCFG_FUNC)
#define P111_SCK9 RA_PINCFG__40(1, 11, 0x05, RA_PINCFG_FUNC)
#define P111_TS12 RA_PINCFG__40(1, 11, 0x0C, RA_PINCFG_FUNC)
#define P112_CAPL RA_PINCFG__40(1, 12, 0x0D, RA_PINCFG_FUNC)
#define P112_GTIOC3B RA_PINCFG__40(1, 12, 0x03, RA_PINCFG_FUNC)
#define P112_MOSI2 RA_PINCFG__40(1, 12, 0x04, RA_PINCFG_FUNC)
#define P112_SCK1 RA_PINCFG__40(1, 12, 0x05, RA_PINCFG_FUNC)
#define P112_SDA2 RA_PINCFG__40(1, 12, 0x04, RA_PINCFG_FUNC)
#define P112_SSIBCK0 RA_PINCFG__40(1, 12, 0x12, RA_PINCFG_FUNC)
#define P112_SSLB0 RA_PINCFG__40(1, 12, 0x06, RA_PINCFG_FUNC)
#define P112_TSCAP RA_PINCFG__40(1, 12, 0x0C, RA_PINCFG_FUNC)
#define P112_TXD2 RA_PINCFG__40(1, 12, 0x04, RA_PINCFG_FUNC)
#define P113_GTIOC2A RA_PINCFG__64(1, 13, 0x03, RA_PINCFG_FUNC)
#define P113_SEG00COM4 RA_PINCFG__64(1, 13, 0x0D, RA_PINCFG_FUNC)
#define P113_SSIFS0 RA_PINCFG__64(1, 13, 0x12, RA_PINCFG_FUNC)
#define P113_SSILRCK0 RA_PINCFG__64(1, 13, 0x12, RA_PINCFG_FUNC)
#define P113_TS27 RA_PINCFG__64(1, 13, 0x0C, RA_PINCFG_FUNC)
#define P114_GTIOC2B RA_PINCFG_100(1, 14, 0x03, RA_PINCFG_FUNC)
#define P114_SEG25 RA_PINCFG_100(1, 14, 0x0D, RA_PINCFG_FUNC)
#define P114_SSIRXD0 RA_PINCFG_100(1, 14, 0x12, RA_PINCFG_FUNC)
#define P114_TS29 RA_PINCFG_100(1, 14, 0x0C, RA_PINCFG_FUNC)
#define P115_GTIOC4A RA_PINCFG_100(1, 15, 0x03, RA_PINCFG_FUNC)
#define P115_SEG26 RA_PINCFG_100(1, 15, 0x0D, RA_PINCFG_FUNC)
#define P115_SSITXD0 RA_PINCFG_100(1, 15, 0x12, RA_PINCFG_FUNC)
#define P115_TS35 RA_PINCFG_100(1, 15, 0x0C, RA_PINCFG_FUNC)
#define P202_GTIOC5B RA_PINCFG_100(2, 2, 0x03, RA_PINCFG_FUNC)
#define P202_MISO9 RA_PINCFG_100(2, 2, 0x05, RA_PINCFG_FUNC)
#define P202_MISOB RA_PINCFG_100(2, 2, 0x06, RA_PINCFG_FUNC)
#define P202_RXD9 RA_PINCFG_100(2, 2, 0x05, RA_PINCFG_FUNC)
#define P202_SCK2 RA_PINCFG_100(2, 2, 0x04, RA_PINCFG_FUNC)
#define P202_SCL9 RA_PINCFG_100(2, 2, 0x05, RA_PINCFG_FUNC)
#define P202_SEG16 RA_PINCFG_100(2, 2, 0x0D, RA_PINCFG_FUNC)
#define P203_CTS2_RTS2 RA_PINCFG_100(2, 3, 0x04, RA_PINCFG_FUNC)
#define P203_GTIOC5A RA_PINCFG_100(2, 3, 0x03, RA_PINCFG_FUNC)
#define P203_MOSI9 RA_PINCFG_100(2, 3, 0x05, RA_PINCFG_FUNC)
#define P203_MOSIB RA_PINCFG_100(2, 3, 0x06, RA_PINCFG_FUNC)
#define P203_SDA9 RA_PINCFG_100(2, 3, 0x05, RA_PINCFG_FUNC)
#define P203_SEG15 RA_PINCFG_100(2, 3, 0x0D, RA_PINCFG_FUNC)
#define P203_SS2 RA_PINCFG_100(2, 3, 0x04, RA_PINCFG_FUNC)
#define P203_TSCAP RA_PINCFG_100(2, 3, 0x0C, RA_PINCFG_FUNC)
#define P203_TXD9 RA_PINCFG_100(2, 3, 0x05, RA_PINCFG_FUNC)
#define P204_AGTIO1 RA_PINCFG__64(2, 4, 0x01, RA_PINCFG_FUNC)
#define P204_CACREF RA_PINCFG__64(2, 4, 0x0A, RA_PINCFG_FUNC)
#define P204_GTIOC4B RA_PINCFG__64(2, 4, 0x03, RA_PINCFG_FUNC)
#define P204_GTIW RA_PINCFG__64(2, 4, 0x02, RA_PINCFG_FUNC)
#define P204_RSPCKB RA_PINCFG__64(2, 4, 0x06, RA_PINCFG_FUNC)
#define P204_SCK0 RA_PINCFG__64(2, 4, 0x04, RA_PINCFG_FUNC)
#define P204_SCK9 RA_PINCFG__64(2, 4, 0x05, RA_PINCFG_FUNC)
#define P204_SCL0 RA_PINCFG__64(2, 4, 0x07, RA_PINCFG_FUNC)
#define P204_SEG14 RA_PINCFG__64(2, 4, 0x0D, RA_PINCFG_FUNC)
#define P204_TS00 RA_PINCFG__64(2, 4, 0x0C, RA_PINCFG_FUNC)
#define P204_USB_OVRCUR_B RA_PINCFG__64(2, 4, 0x13, RA_PINCFG_FUNC)
#define P205_AGTO1 RA_PINCFG__64(2, 5, 0x01, RA_PINCFG_FUNC)
#define P205_CLKOUT RA_PINCFG__64(2, 5, 0x09, RA_PINCFG_FUNC)
#define P205_CTS9_RTS9 RA_PINCFG__64(2, 5, 0x05, RA_PINCFG_FUNC)
#define P205_GTIOC4A RA_PINCFG__64(2, 5, 0x03, RA_PINCFG_FUNC)
#define P205_GTIV RA_PINCFG__64(2, 5, 0x02, RA_PINCFG_FUNC)
#define P205_MOSI0 RA_PINCFG__64(2, 5, 0x04, RA_PINCFG_FUNC)
#define P205_SCL1 RA_PINCFG__64(2, 5, 0x07, RA_PINCFG_FUNC)
#define P205_SDA0 RA_PINCFG__64(2, 5, 0x04, RA_PINCFG_FUNC)
#define P205_SEG13 RA_PINCFG__64(2, 5, 0x0D, RA_PINCFG_FUNC)
#define P205_SS9 RA_PINCFG__64(2, 5, 0x05, RA_PINCFG_FUNC)
#define P205_SSLB0 RA_PINCFG__64(2, 5, 0x06, RA_PINCFG_FUNC)
#define P205_TSCAP RA_PINCFG__64(2, 5, 0x0C, RA_PINCFG_FUNC)
#define P205_TXD0 RA_PINCFG__64(2, 5, 0x04, RA_PINCFG_FUNC)
#define P205_USB_OVRCUR_A RA_PINCFG__64(2, 5, 0x13, RA_PINCFG_FUNC)
#define P206_GTIU RA_PINCFG__48(2, 6, 0x02, RA_PINCFG_FUNC)
#define P206_MISO0 RA_PINCFG__48(2, 6, 0x04, RA_PINCFG_FUNC)
#define P206_RXD0 RA_PINCFG__48(2, 6, 0x04, RA_PINCFG_FUNC)
#define P206_SCL0 RA_PINCFG__48(2, 6, 0x04, RA_PINCFG_FUNC)
#define P206_SDA1 RA_PINCFG__48(2, 6, 0x07, RA_PINCFG_FUNC)
#define P206_SEG12 RA_PINCFG__48(2, 6, 0x0D, RA_PINCFG_FUNC)
#define P206_SSLB1 RA_PINCFG__48(2, 6, 0x06, RA_PINCFG_FUNC)
#define P206_TS01 RA_PINCFG__48(2, 6, 0x0C, RA_PINCFG_FUNC)
#define P206_USB_VBUSEN RA_PINCFG__48(2, 6, 0x13, RA_PINCFG_FUNC)
#define P212_AGTEE1 RA_PINCFG__40(2, 12, 0x01, RA_PINCFG_FUNC)
#define P212_GTETRGB RA_PINCFG__40(2, 12, 0x02, RA_PINCFG_FUNC)
#define P212_GTIOC0B RA_PINCFG__40(2, 12, 0x03, RA_PINCFG_FUNC)
#define P212_MISO1 RA_PINCFG__40(2, 12, 0x05, RA_PINCFG_FUNC)
#define P212_RXD1 RA_PINCFG__40(2, 12, 0x05, RA_PINCFG_FUNC)
#define P212_SCL1 RA_PINCFG__40(2, 12, 0x05, RA_PINCFG_FUNC)
#define P213_GTETRGA RA_PINCFG__40(2, 13, 0x02, RA_PINCFG_FUNC)
#define P213_GTIOC0A RA_PINCFG__40(2, 13, 0x03, RA_PINCFG_FUNC)
#define P213_MOSI1 RA_PINCFG__40(2, 13, 0x05, RA_PINCFG_FUNC)
#define P213_SDA1 RA_PINCFG__40(2, 13, 0x05, RA_PINCFG_FUNC)
#define P213_TXD1 RA_PINCFG__40(2, 13, 0x05, RA_PINCFG_FUNC)
#define P300_GTIOC0A RA_PINCFG__40(3, 0, 0x03, RA_PINCFG_FUNC)
#define P300_GTOUUP RA_PINCFG__40(3, 0, 0x02, RA_PINCFG_FUNC)
#define P300_SSLB1 RA_PINCFG__40(3, 0, 0x06, RA_PINCFG_FUNC)
#define P301_AGTIO0 RA_PINCFG__40(3, 1, 0x01, RA_PINCFG_FUNC)
#define P301_COM5 RA_PINCFG__40(3, 1, 0x10, RA_PINCFG_FUNC)
#define P301_CTS9_RTS9 RA_PINCFG__40(3, 1, 0x05, RA_PINCFG_FUNC)
#define P301_GTIOC4B RA_PINCFG__40(3, 1, 0x03, RA_PINCFG_FUNC)
#define P301_GTOULO RA_PINCFG__40(3, 1, 0x02, RA_PINCFG_FUNC)
#define P301_MISO2 RA_PINCFG__40(3, 1, 0x04, RA_PINCFG_FUNC)
#define P301_RXD2 RA_PINCFG__40(3, 1, 0x04, RA_PINCFG_FUNC)
#define P301_SCL2 RA_PINCFG__40(3, 1, 0x04, RA_PINCFG_FUNC)
#define P301_SEG01 RA_PINCFG__40(3, 1, 0x0D, RA_PINCFG_FUNC)
#define P301_SS9 RA_PINCFG__40(3, 1, 0x05, RA_PINCFG_FUNC)
#define P301_SSLB2 RA_PINCFG__40(3, 1, 0x06, RA_PINCFG_FUNC)
#define P301_TS09 RA_PINCFG__40(3, 1, 0x0C, RA_PINCFG_FUNC)
#define P302_COM6 RA_PINCFG__48(3, 2, 0x10, RA_PINCFG_FUNC)
#define P302_GTIOC4A RA_PINCFG__48(3, 2, 0x03, RA_PINCFG_FUNC)
#define P302_GTOUUP RA_PINCFG__48(3, 2, 0x02, RA_PINCFG_FUNC)
#define P302_MOSI2 RA_PINCFG__48(3, 2, 0x04, RA_PINCFG_FUNC)
#define P302_SDA2 RA_PINCFG__48(3, 2, 0x04, RA_PINCFG_FUNC)
#define P302_SEG02 RA_PINCFG__48(3, 2, 0x0D, RA_PINCFG_FUNC)
#define P302_SSLB3 RA_PINCFG__48(3, 2, 0x06, RA_PINCFG_FUNC)
#define P302_TS08 RA_PINCFG__48(3, 2, 0x0C, RA_PINCFG_FUNC)
#define P302_TXD2 RA_PINCFG__48(3, 2, 0x04, RA_PINCFG_FUNC)
#define P303_COM7 RA_PINCFG__64(3, 3, 0x10, RA_PINCFG_FUNC)
#define P303_GTIOC7B RA_PINCFG__64(3, 3, 0x03, RA_PINCFG_FUNC)
#define P303_SEG03 RA_PINCFG__64(3, 3, 0x0D, RA_PINCFG_FUNC)
#define P303_TS02 RA_PINCFG__64(3, 3, 0x0C, RA_PINCFG_FUNC)
#define P304_GTIOC7A RA_PINCFG__64(3, 4, 0x03, RA_PINCFG_FUNC)
#define P304_SEG20 RA_PINCFG__64(3, 4, 0x0D, RA_PINCFG_FUNC)
#define P304_TS11 RA_PINCFG__64(3, 4, 0x0C, RA_PINCFG_FUNC)
#define P305_SEG19 RA_PINCFG_100(3, 5, 0x0D, RA_PINCFG_FUNC)
#define P306_SEG18 RA_PINCFG_100(3, 6, 0x0D, RA_PINCFG_FUNC)
#define P307_SEG17 RA_PINCFG_100(3, 7, 0x0D, RA_PINCFG_FUNC)
#define P400_AGTIO1 RA_PINCFG__48(4, 0, 0x01, RA_PINCFG_FUNC)
#define P400_AUDIO_CLK RA_PINCFG__48(4, 0, 0x12, RA_PINCFG_FUNC)
#define P400_CACREF RA_PINCFG__48(4, 0, 0x0A, RA_PINCFG_FUNC)
#define P400_GTIOC6A RA_PINCFG__48(4, 0, 0x04, RA_PINCFG_FUNC)
#define P400_SCK0 RA_PINCFG__48(4, 0, 0x04, RA_PINCFG_FUNC)
#define P400_SCK1 RA_PINCFG__48(4, 0, 0x05, RA_PINCFG_FUNC)
#define P400_SCL0 RA_PINCFG__48(4, 0, 0x07, RA_PINCFG_FUNC)
#define P400_SEG04 RA_PINCFG__48(4, 0, 0x0D, RA_PINCFG_FUNC)
#define P400_TS20 RA_PINCFG__48(4, 0, 0x0C, RA_PINCFG_FUNC)
#define P401_CTS0_RTS0 RA_PINCFG__64(4, 1, 0x04, RA_PINCFG_FUNC)
#define P401_CTX0 RA_PINCFG__64(4, 1, 0x10, RA_PINCFG_FUNC)
#define P401_GTETRGA RA_PINCFG__64(4, 1, 0x03, RA_PINCFG_FUNC)
#define P401_GTIOC6B RA_PINCFG__64(4, 1, 0x04, RA_PINCFG_FUNC)
#define P401_MOSI1 RA_PINCFG__64(4, 1, 0x05, RA_PINCFG_FUNC)
#define P401_SDA0 RA_PINCFG__64(4, 1, 0x07, RA_PINCFG_FUNC)
#define P401_SDA1 RA_PINCFG__64(4, 1, 0x05, RA_PINCFG_FUNC)
#define P401_SEG05 RA_PINCFG__64(4, 1, 0x0D, RA_PINCFG_FUNC)
#define P401_SS0 RA_PINCFG__64(4, 1, 0x04, RA_PINCFG_FUNC)
#define P401_TS19 RA_PINCFG__64(4, 1, 0x0C, RA_PINCFG_FUNC)
#define P401_TXD1 RA_PINCFG__64(4, 1, 0x05, RA_PINCFG_FUNC)
#define P402_AGTIO0 RA_PINCFG__64(4, 2, 0x01, RA_PINCFG_FUNC)
#define P402_AGTIO1 RA_PINCFG__64(4, 2, 0x02, RA_PINCFG_FUNC)
#define P402_CRX0 RA_PINCFG__64(4, 2, 0x10, RA_PINCFG_FUNC)
#define P402_MISO1 RA_PINCFG__64(4, 2, 0x05, RA_PINCFG_FUNC)
#define P402_RTCIC0 RA_PINCFG__64(4, 2, 0x00, RA_PINCFG_GPIO)
#define P402_RXD1 RA_PINCFG__64(4, 2, 0x05, RA_PINCFG_FUNC)
#define P402_SCL1 RA_PINCFG__64(4, 2, 0x05, RA_PINCFG_FUNC)
#define P402_SEG06 RA_PINCFG__64(4, 2, 0x0D, RA_PINCFG_FUNC)
#define P402_TS18 RA_PINCFG__64(4, 2, 0x0C, RA_PINCFG_FUNC)
#define P403_AGTIO0 RA_PINCFG_100(4, 3, 0x01, RA_PINCFG_FUNC)
#define P403_AGTIO1 RA_PINCFG_100(4, 3, 0x02, RA_PINCFG_FUNC)
#define P403_CTS1_RTS1 RA_PINCFG_100(4, 3, 0x05, RA_PINCFG_FUNC)
#define P403_GTIOC3A RA_PINCFG_100(4, 3, 0x04, RA_PINCFG_FUNC)
#define P403_RTCIC1 RA_PINCFG_100(4, 3, 0x00, RA_PINCFG_GPIO)
#define P403_SS1 RA_PINCFG_100(4, 3, 0x05, RA_PINCFG_FUNC)
#define P403_SSIBCK0 RA_PINCFG_100(4, 3, 0x12, RA_PINCFG_FUNC)
#define P403_TS17 RA_PINCFG_100(4, 3, 0x0C, RA_PINCFG_FUNC)
#define P404_GTIOC3B RA_PINCFG_100(4, 4, 0x04, RA_PINCFG_FUNC)
#define P404_RTCIC2 RA_PINCFG_100(4, 4, 0x00, RA_PINCFG_GPIO)
#define P404_SSIFS0 RA_PINCFG_100(4, 4, 0x12, RA_PINCFG_FUNC)
#define P404_SSILRCK0 RA_PINCFG_100(4, 4, 0x12, RA_PINCFG_FUNC)
#define P405_GTIOC1A RA_PINCFG_100(4, 5, 0x04, RA_PINCFG_FUNC)
#define P405_SSITXD0 RA_PINCFG_100(4, 5, 0x12, RA_PINCFG_FUNC)
#define P406_GTIOC1B RA_PINCFG_100(4, 6, 0x04, RA_PINCFG_FUNC)
#define P406_SSIRXD0 RA_PINCFG_100(4, 6, 0x12, RA_PINCFG_FUNC)
#define P407_ADTRG0 RA_PINCFG__40(4, 7, 0x0A, RA_PINCFG_FUNC)
#define P407_AGTIO0 RA_PINCFG__40(4, 7, 0x01, RA_PINCFG_FUNC)
#define P407_CTS0_RTS0 RA_PINCFG__40(4, 7, 0x04, RA_PINCFG_FUNC)
#define P407_RTCOUT RA_PINCFG__40(4, 7, 0x09, RA_PINCFG_FUNC)
#define P407_SDA0 RA_PINCFG__40(4, 7, 0x07, RA_PINCFG_FUNC)
#define P407_SEG11 RA_PINCFG__40(4, 7, 0x0D, RA_PINCFG_FUNC)
#define P407_SS0 RA_PINCFG__40(4, 7, 0x04, RA_PINCFG_FUNC)
#define P407_SSLB3 RA_PINCFG__40(4, 7, 0x06, RA_PINCFG_FUNC)
#define P407_TS03 RA_PINCFG__40(4, 7, 0x0C, RA_PINCFG_FUNC)
#define P407_USB_VBUS RA_PINCFG__40(4, 7, 0x13, RA_PINCFG_FUNC)
#define P408_CTS1_RTS1 RA_PINCFG__40(4, 8, 0x04, RA_PINCFG_FUNC)
#define P408_GTIOC5B RA_PINCFG__40(4, 8, 0x04, RA_PINCFG_FUNC)
#define P408_GTOWLO RA_PINCFG__40(4, 8, 0x03, RA_PINCFG_FUNC)
#define P408_MISO9 RA_PINCFG__40(4, 8, 0x05, RA_PINCFG_FUNC)
#define P408_RXD9 RA_PINCFG__40(4, 8, 0x05, RA_PINCFG_FUNC)
#define P408_SCL0 RA_PINCFG__40(4, 8, 0x07, RA_PINCFG_FUNC)
#define P408_SCL9 RA_PINCFG__40(4, 8, 0x05, RA_PINCFG_FUNC)
#define P408_SEG10 RA_PINCFG__40(4, 8, 0x0D, RA_PINCFG_FUNC)
#define P408_SS1 RA_PINCFG__40(4, 8, 0x04, RA_PINCFG_FUNC)
#define P408_TS04 RA_PINCFG__40(4, 8, 0x0C, RA_PINCFG_FUNC)
#define P408_USB_ID RA_PINCFG__40(4, 8, 0x13, RA_PINCFG_FUNC)
#define P409_GTIOC5A RA_PINCFG__48(4, 9, 0x04, RA_PINCFG_FUNC)
#define P409_GTOWUP RA_PINCFG__48(4, 9, 0x03, RA_PINCFG_FUNC)
#define P409_MOSI9 RA_PINCFG__48(4, 9, 0x05, RA_PINCFG_FUNC)
#define P409_SDA9 RA_PINCFG__48(4, 9, 0x05, RA_PINCFG_FUNC)
#define P409_SEG09 RA_PINCFG__48(4, 9, 0x0D, RA_PINCFG_FUNC)
#define P409_TS05 RA_PINCFG__48(4, 9, 0x0C, RA_PINCFG_FUNC)
#define P409_TXD9 RA_PINCFG__48(4, 9, 0x05, RA_PINCFG_FUNC)
#define P409_USB_EXICEN RA_PINCFG__48(4, 9, 0x13, RA_PINCFG_FUNC)
#define P410_AGTOB1 RA_PINCFG__64(4, 10, 0x01, RA_PINCFG_FUNC)
#define P410_GTIOC6B RA_PINCFG__64(4, 10, 0x04, RA_PINCFG_FUNC)
#define P410_GTOVLO RA_PINCFG__64(4, 10, 0x03, RA_PINCFG_FUNC)
#define P410_MISO0 RA_PINCFG__64(4, 10, 0x04, RA_PINCFG_FUNC)
#define P410_MISOA RA_PINCFG__64(4, 10, 0x06, RA_PINCFG_FUNC)
#define P410_RXD0 RA_PINCFG__64(4, 10, 0x04, RA_PINCFG_FUNC)
#define P410_SCL0 RA_PINCFG__64(4, 10, 0x04, RA_PINCFG_FUNC)
#define P410_SEG08 RA_PINCFG__64(4, 10, 0x0D, RA_PINCFG_FUNC)
#define P410_TS06 RA_PINCFG__64(4, 10, 0x0C, RA_PINCFG_FUNC)
#define P411_AGTOA1 RA_PINCFG__64(4, 11, 0x01, RA_PINCFG_FUNC)
#define P411_GTIOC6A RA_PINCFG__64(4, 11, 0x04, RA_PINCFG_FUNC)
#define P411_GTOVUP RA_PINCFG__64(4, 11, 0x03, RA_PINCFG_FUNC)
#define P411_MOSI0 RA_PINCFG__64(4, 11, 0x04, RA_PINCFG_FUNC)
#define P411_MOSIA RA_PINCFG__64(4, 11, 0x06, RA_PINCFG_FUNC)
#define P411_SDA0 RA_PINCFG__64(4, 11, 0x04, RA_PINCFG_FUNC)
#define P411_SEG07 RA_PINCFG__64(4, 11, 0x0D, RA_PINCFG_FUNC)
#define P411_TS07 RA_PINCFG__64(4, 11, 0x0C, RA_PINCFG_FUNC)
#define P411_TXD0 RA_PINCFG__64(4, 11, 0x04, RA_PINCFG_FUNC)
#define P412_RSPCKA RA_PINCFG_100(4, 12, 0x06, RA_PINCFG_FUNC)
#define P412_SCK0 RA_PINCFG_100(4, 12, 0x04, RA_PINCFG_FUNC)
#define P413_CTS0_RTS0 RA_PINCFG_100(4, 13, 0x04, RA_PINCFG_FUNC)
#define P413_SS0 RA_PINCFG_100(4, 13, 0x04, RA_PINCFG_FUNC)
#define P413_SSLA0 RA_PINCFG_100(4, 13, 0x06, RA_PINCFG_FUNC)
#define P414_GTIOC0B RA_PINCFG_100(4, 14, 0x04, RA_PINCFG_FUNC)
#define P414_SSLA1 RA_PINCFG_100(4, 14, 0x06, RA_PINCFG_FUNC)
#define P415_GTIOC0A RA_PINCFG_100(4, 15, 0x04, RA_PINCFG_FUNC)
#define P415_SSLA2 RA_PINCFG_100(4, 15, 0x06, RA_PINCFG_FUNC)
#define P500_AGTOA0 RA_PINCFG__48(5, 0, 0x01, RA_PINCFG_FUNC)
#define P500_AN016 RA_PINCFG__48(5, 0, 0x01, RA_PINCFG_ANALOG)
#define P500_CMPREF1 RA_PINCFG__48(5, 0, 0x02, RA_PINCFG_FUNC | RA_PINCFG_ANALOG)
#define P500_GTIOC2A RA_PINCFG__48(5, 0, 0x04, RA_PINCFG_FUNC)
#define P500_GTIU RA_PINCFG__48(5, 0, 0x03, RA_PINCFG_FUNC)
#define P500_SEG34 RA_PINCFG__48(5, 0, 0x0D, RA_PINCFG_FUNC)
#define P500_USB_VBUSEN RA_PINCFG__48(5, 0, 0x13, RA_PINCFG_FUNC)
#define P501_AGTOB0 RA_PINCFG__64(5, 1, 0x01, RA_PINCFG_FUNC)
#define P501_AN017 RA_PINCFG__64(5, 1, 0x01, RA_PINCFG_ANALOG)
#define P501_CMPIN1 RA_PINCFG__64(5, 1, 0x02, RA_PINCFG_FUNC | RA_PINCFG_ANALOG)
#define P501_GTIOC2B RA_PINCFG__64(5, 1, 0x04, RA_PINCFG_FUNC)
#define P501_GTIV RA_PINCFG__64(5, 1, 0x03, RA_PINCFG_FUNC)
#define P501_MOSI1 RA_PINCFG__64(5, 1, 0x05, RA_PINCFG_FUNC)
#define P501_SDA1 RA_PINCFG__64(5, 1, 0x05, RA_PINCFG_FUNC)
#define P501_SEG35 RA_PINCFG__64(5, 1, 0x0D, RA_PINCFG_FUNC)
#define P501_TXD1 RA_PINCFG__64(5, 1, 0x05, RA_PINCFG_FUNC)
#define P501_USB_OVRCUR_A RA_PINCFG__64(5, 1, 0x13, RA_PINCFG_FUNC)
#define P502_AN018 RA_PINCFG__64(5, 2, 0x01, RA_PINCFG_ANALOG)
#define P502_CMPREF0 RA_PINCFG__64(5, 2, 0x02, RA_PINCFG_FUNC | RA_PINCFG_ANALOG)
#define P502_GTIOC3B RA_PINCFG__64(5, 2, 0x04, RA_PINCFG_FUNC)
#define P502_GTIW RA_PINCFG__64(5, 2, 0x03, RA_PINCFG_FUNC)
#define P502_MISO1 RA_PINCFG__64(5, 2, 0x05, RA_PINCFG_FUNC)
#define P502_RXD1 RA_PINCFG__64(5, 2, 0x05, RA_PINCFG_FUNC)
#define P502_SCL1 RA_PINCFG__64(5, 2, 0x05, RA_PINCFG_FUNC)
#define P502_SEG36 RA_PINCFG__64(5, 2, 0x0D, RA_PINCFG_FUNC)
#define P502_USB_OVRCUR_B RA_PINCFG__64(5, 2, 0x13, RA_PINCFG_FUNC)
#define P503_AN023 RA_PINCFG_100(5, 3, 0x01, RA_PINCFG_ANALOG)
#define P503_CMPIN0 RA_PINCFG_100(5, 3, 0x02, RA_PINCFG_FUNC | RA_PINCFG_ANALOG)
#define P503_SCK1 RA_PINCFG_100(5, 3, 0x05, RA_PINCFG_FUNC)
#define P503_SEG37 RA_PINCFG_100(5, 3, 0x0D, RA_PINCFG_FUNC)
#define P503_USB_EXICEN RA_PINCFG_100(5, 3, 0x13, RA_PINCFG_FUNC)
#define P504_AN024 RA_PINCFG_100(5, 4, 0x01, RA_PINCFG_ANALOG)
#define P504_CTS1_RTS1 RA_PINCFG_100(5, 4, 0x05, RA_PINCFG_FUNC)
#define P504_SS1 RA_PINCFG_100(5, 4, 0x05, RA_PINCFG_FUNC)
#define P504_USB_ID RA_PINCFG_100(5, 4, 0x13, RA_PINCFG_FUNC)
#define P505_AN025 RA_PINCFG_100(5, 5, 0x01, RA_PINCFG_ANALOG)
#define P600_GTIOC6B RA_PINCFG_100(6, 0, 0x01, RA_PINCFG_FUNC)
#define P600_SCK9 RA_PINCFG_100(6, 0, 0x05, RA_PINCFG_FUNC)
#define P600_SEG33 RA_PINCFG_100(6, 0, 0x0D, RA_PINCFG_FUNC)
#define P601_GTIOC6A RA_PINCFG_100(6, 1, 0x01, RA_PINCFG_FUNC)
#define P601_MISO9 RA_PINCFG_100(6, 1, 0x05, RA_PINCFG_FUNC)
#define P601_RXD9 RA_PINCFG_100(6, 1, 0x05, RA_PINCFG_FUNC)
#define P601_SCL9 RA_PINCFG_100(6, 1, 0x05, RA_PINCFG_FUNC)
#define P601_SEG32 RA_PINCFG_100(6, 1, 0x0D, RA_PINCFG_FUNC)
#define P602_GTIOC7B RA_PINCFG_100(6, 2, 0x01, RA_PINCFG_FUNC)
#define P602_MOSI9 RA_PINCFG_100(6, 2, 0x05, RA_PINCFG_FUNC)
#define P602_SDA9 RA_PINCFG_100(6, 2, 0x05, RA_PINCFG_FUNC)
#define P602_SEG31 RA_PINCFG_100(6, 2, 0x0D, RA_PINCFG_FUNC)
#define P602_TXD9 RA_PINCFG_100(6, 2, 0x05, RA_PINCFG_FUNC)
#define P603_CTS9_RTS9 RA_PINCFG_100(6, 3, 0x05, RA_PINCFG_FUNC)
#define P603_GTIOC7A RA_PINCFG_100(6, 3, 0x01, RA_PINCFG_FUNC)
#define P603_SEG30 RA_PINCFG_100(6, 3, 0x0D, RA_PINCFG_FUNC)
#define P603_SS9 RA_PINCFG_100(6, 3, 0x05, RA_PINCFG_FUNC)
#define P608_GTIOC4B RA_PINCFG_100(6, 8, 0x01, RA_PINCFG_FUNC)
#define P608_SEG27 RA_PINCFG_100(6, 8, 0x0D, RA_PINCFG_FUNC)
#define P609_GTIOC5A RA_PINCFG_100(6, 9, 0x01, RA_PINCFG_FUNC)
#define P609_SEG28 RA_PINCFG_100(6, 9, 0x0D, RA_PINCFG_FUNC)
#define P610_GTIOC5B RA_PINCFG_100(6, 10, 0x01, RA_PINCFG_FUNC)
#define P610_SEG29 RA_PINCFG_100(6, 10, 0x0D, RA_PINCFG_FUNC)
#define P708_MISO1 RA_PINCFG_100(7, 8, 0x05, RA_PINCFG_FUNC)
#define P708_RXD1 RA_PINCFG_100(7, 8, 0x05, RA_PINCFG_FUNC)
#define P708_SCL1 RA_PINCFG_100(7, 8, 0x05, RA_PINCFG_FUNC)
#define P708_SSLA3 RA_PINCFG_100(7, 8, 0x06, RA_PINCFG_FUNC)
#define P808_SEG21 RA_PINCFG_100(8, 8, 0x0D, RA_PINCFG_FUNC)
#define P809_SEG22 RA_PINCFG_100(8, 9, 0x0D, RA_PINCFG_FUNC)
#define P914_USB_DP RA_PINCFG__40(9, 14, 0x00, RA_PINCFG_GPIO)
#define P915_USB_DM RA_PINCFG__40(9, 15, 0x00, RA_PINCFG_GPIO)
#endif
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/renesas/pinctrl-r7fa4m1xxxxxx.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 12,238 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_RENESAS_PINCTRL_R8A779F0_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_RENESAS_PINCTRL_R8A779F0_H_
#include "pinctrl-rcar-common.h"
/* Pins declaration */
#define PIN_NONE -1
#define PIN_SCIF_CLK RCAR_GP_PIN(0, 0)
#define PIN_HSCK0 RCAR_GP_PIN(0, 1)
#define PIN_HRX0 RCAR_GP_PIN(0, 2)
#define PIN_HTX0 RCAR_GP_PIN(0, 3)
#define PIN_HCTS0_N RCAR_GP_PIN(0, 4)
#define PIN_HRTS0_N RCAR_GP_PIN(0, 5)
#define PIN_RX0 RCAR_GP_PIN(0, 6)
#define PIN_TX0 RCAR_GP_PIN(0, 7)
#define PIN_SCK0 RCAR_GP_PIN(0, 8)
#define PIN_RTS0_N RCAR_GP_PIN(0, 9)
#define PIN_CTS0_N RCAR_GP_PIN(0, 10)
#define PIN_MSIOF0_SYNC RCAR_GP_PIN(0, 11)
#define PIN_MSIOF0_RXD RCAR_GP_PIN(0, 12)
#define PIN_MSIOF0_TXD RCAR_GP_PIN(0, 13)
#define PIN_MSIOF0_SCK RCAR_GP_PIN(0, 14)
#define PIN_MSIOF0_SS1 RCAR_GP_PIN(0, 15)
#define PIN_MSIOF0_SS2 RCAR_GP_PIN(0, 16)
#define PIN_IRQ0 RCAR_GP_PIN(0, 17)
#define PIN_IRQ1 RCAR_GP_PIN(0, 18)
#define PIN_IRQ2 RCAR_GP_PIN(0, 19)
#define PIN_IRQ3 RCAR_GP_PIN(0, 20)
#define PIN_GP1_00 RCAR_GP_PIN(1, 0)
#define PIN_GP1_01 RCAR_GP_PIN(1, 1)
#define PIN_GP1_02 RCAR_GP_PIN(1, 2)
#define PIN_GP1_03 RCAR_GP_PIN(1, 3)
#define PIN_GP1_04 RCAR_GP_PIN(1, 4)
#define PIN_GP1_05 RCAR_GP_PIN(1, 5)
#define PIN_GP1_06 RCAR_GP_PIN(1, 6)
#define PIN_GP1_07 RCAR_GP_PIN(1, 7)
#define PIN_GP1_08 RCAR_GP_PIN(1, 8)
#define PIN_GP1_09 RCAR_GP_PIN(1, 9)
#define PIN_GP1_10 RCAR_GP_PIN(1, 10)
#define PIN_GP1_11 RCAR_GP_PIN(1, 11)
#define PIN_MMC_SD_CLK RCAR_GP_PIN(1, 12)
#define PIN_MMC_SD_D0 RCAR_GP_PIN(1, 13)
#define PIN_MMC_SD_D1 RCAR_GP_PIN(1, 14)
#define PIN_MMC_SD_D2 RCAR_GP_PIN(1, 15)
#define PIN_MMC_SD_D3 RCAR_GP_PIN(1, 16)
#define PIN_MMC_D5 RCAR_GP_PIN(1, 17)
#define PIN_MMC_D4 RCAR_GP_PIN(1, 18)
#define PIN_MMC_D6 RCAR_GP_PIN(1, 19)
#define PIN_MMC_DS RCAR_GP_PIN(1, 20)
#define PIN_MMC_D7 RCAR_GP_PIN(1, 21)
#define PIN_MMC_SD_CMD RCAR_GP_PIN(1, 22)
#define PIN_SD_CD RCAR_GP_PIN(1, 23)
#define PIN_SD_WP RCAR_GP_PIN(1, 24)
#define PIN_RPC_INT_N RCAR_GP_PIN(2, 0)
#define PIN_RPC_WP_N RCAR_GP_PIN(2, 1)
#define PIN_RPC_RESET_N RCAR_GP_PIN(2, 2)
#define PIN_QSPI1_SSL RCAR_GP_PIN(2, 3)
#define PIN_QSPI1_IO3 RCAR_GP_PIN(2, 4)
#define PIN_QSPI1_MISO_IO1 RCAR_GP_PIN(2, 5)
#define PIN_QSPI1_IO2 RCAR_GP_PIN(2, 6)
#define PIN_QSPI1_MOSI_IO0 RCAR_GP_PIN(2, 7)
#define PIN_QSPI1_SPCLK RCAR_GP_PIN(2, 8)
#define PIN_QSPI0_MOSI_IO0 RCAR_GP_PIN(2, 9)
#define PIN_QSPI0_SPCLK RCAR_GP_PIN(2, 10)
#define PIN_QSPI0_IO2 RCAR_GP_PIN(2, 11)
#define PIN_QSPI0_MISO_IO1 RCAR_GP_PIN(2, 12)
#define PIN_QSPI0_SSL RCAR_GP_PIN(2, 13)
#define PIN_QSPI0_IO3 RCAR_GP_PIN(2, 14)
#define PIN_PCIE0_CLKREQ_N RCAR_GP_PIN(2, 15)
#define PIN_PCIE1_CLKREQ_N RCAR_GP_PIN(2, 16)
#define PIN_TSN1_MDIO RCAR_GP_PIN(3, 0)
#define PIN_TSN2_MDIO RCAR_GP_PIN(3, 1)
#define PIN_TSN0_MDIO RCAR_GP_PIN(3, 2)
#define PIN_TSN2_MDC RCAR_GP_PIN(3, 3)
#define PIN_TSN0_MDC RCAR_GP_PIN(3, 4)
#define PIN_TSN1_MDC RCAR_GP_PIN(3, 5)
#define PIN_TSN1_LINK RCAR_GP_PIN(3, 6)
#define PIN_TSN2_LINK RCAR_GP_PIN(3, 7)
#define PIN_TSN0_LINK RCAR_GP_PIN(3, 8)
#define PIN_TSN2_PHY_INT RCAR_GP_PIN(3, 9)
#define PIN_TSN0_PHY_INT RCAR_GP_PIN(3, 10)
#define PIN_TSN1_PHY_INT RCAR_GP_PIN(3, 11)
#define PIN_TSN0_MAGIC RCAR_GP_PIN(3, 12)
#define PIN_TSN1_AVTP_PPS RCAR_GP_PIN(3, 13)
#define PIN_TSN1_AVTP_MATCH RCAR_GP_PIN(3, 14)
#define PIN_TSN1_AVTP_CAPTURE RCAR_GP_PIN(3, 15)
#define PIN_TSN0_AVTP_PPS RCAR_GP_PIN(3, 16)
#define PIN_TSN0_AVTP_MATCH RCAR_GP_PIN(3, 17)
#define PIN_TSN0_AVTP_CAPTURE RCAR_GP_PIN(3, 18)
#define PIN_GP4_00 RCAR_GP_PIN(4, 0)
#define PIN_GP4_01 RCAR_GP_PIN(4, 1)
#define PIN_GP4_02 RCAR_GP_PIN(4, 2)
#define PIN_GP4_03 RCAR_GP_PIN(4, 3)
#define PIN_GP4_04 RCAR_GP_PIN(4, 4)
#define PIN_GP4_05 RCAR_GP_PIN(4, 5)
#define PIN_GP4_06 RCAR_GP_PIN(4, 6)
#define PIN_GP4_07 RCAR_GP_PIN(4, 7)
#define PIN_GP4_08 RCAR_GP_PIN(4, 8)
#define PIN_GP4_09 RCAR_GP_PIN(4, 9)
#define PIN_GP4_10 RCAR_GP_PIN(4, 10)
#define PIN_GP4_11 RCAR_GP_PIN(4, 11)
#define PIN_GP4_12 RCAR_GP_PIN(4, 12)
#define PIN_GP4_13 RCAR_GP_PIN(4, 13)
#define PIN_GP4_14 RCAR_GP_PIN(4, 14)
#define PIN_GP4_15 RCAR_GP_PIN(4, 15)
#define PIN_GP4_16 RCAR_GP_PIN(4, 16)
#define PIN_GP4_17 RCAR_GP_PIN(4, 17)
#define PIN_GP4_18 RCAR_GP_PIN(4, 18)
#define PIN_GP4_19 RCAR_GP_PIN(4, 19)
#define PIN_MSPI0SC RCAR_GP_PIN(4, 20)
#define PIN_MSPI0SI RCAR_GP_PIN(4, 21)
#define PIN_MSPI0SO_MSPI0DCS RCAR_GP_PIN(4, 22)
#define PIN_MSPI0CSS1 RCAR_GP_PIN(4, 23)
#define PIN_MSPI0CSS0 RCAR_GP_PIN(4, 24)
#define PIN_MSPI1SI RCAR_GP_PIN(4, 25)
#define PIN_MSPI1SO_MSPI1DCS RCAR_GP_PIN(4, 26)
#define PIN_MSPI1CSS0 RCAR_GP_PIN(4, 27)
#define PIN_MSPI1SC RCAR_GP_PIN(4, 28)
#define PIN_MSPI1CSS2 RCAR_GP_PIN(4, 29)
#define PIN_MSPI1CSS1 RCAR_GP_PIN(4, 30)
#define PIN_RIIC0SCL RCAR_GP_PIN(5, 0)
#define PIN_RIIC0SDA RCAR_GP_PIN(5, 1)
#define PIN_ETNB0MD RCAR_GP_PIN(5, 2)
#define PIN_ETNB0WOL RCAR_GP_PIN(5, 3)
#define PIN_ETNB0LINKSTA RCAR_GP_PIN(5, 4)
#define PIN_ETNB0MDC RCAR_GP_PIN(5, 5)
#define PIN_ETNB0RXER RCAR_GP_PIN(5, 6)
#define PIN_ETNB0RXD3 RCAR_GP_PIN(5, 7)
#define PIN_ETNB0RXD1 RCAR_GP_PIN(5, 8)
#define PIN_ETNB0RXD2 RCAR_GP_PIN(5, 9)
#define PIN_ETNB0RXDV RCAR_GP_PIN(5, 10)
#define PIN_ETNB0RXD0 RCAR_GP_PIN(5, 11)
#define PIN_ETNB0RXCLK RCAR_GP_PIN(5, 12)
#define PIN_ETNB0TXER RCAR_GP_PIN(5, 13)
#define PIN_ETNB0TXD3 RCAR_GP_PIN(5, 14)
#define PIN_ETNB0TXCLK RCAR_GP_PIN(5, 15)
#define PIN_ETNB0TXD1 RCAR_GP_PIN(5, 16)
#define PIN_ETNB0TXD2 RCAR_GP_PIN(5, 17)
#define PIN_ETNB0TXEN RCAR_GP_PIN(5, 18)
#define PIN_ETNB0TXD0 RCAR_GP_PIN(5, 19)
#define PIN_RLIN37TX RCAR_GP_PIN(6, 0)
#define PIN_RLIN37RX_INTP23 RCAR_GP_PIN(6, 1)
#define PIN_RLIN36TX RCAR_GP_PIN(6, 2)
#define PIN_RLIN36RX_INTP22 RCAR_GP_PIN(6, 3)
#define PIN_RLIN35TX RCAR_GP_PIN(6, 4)
#define PIN_RLIN35RX_INTP21 RCAR_GP_PIN(6, 5)
#define PIN_RLIN34TX RCAR_GP_PIN(6, 6)
#define PIN_RLIN34RX_INTP20 RCAR_GP_PIN(6, 7)
#define PIN_RLIN33TX RCAR_GP_PIN(6, 8)
#define PIN_RLIN33RX_INTP19 RCAR_GP_PIN(6, 9)
#define PIN_RLIN32TX RCAR_GP_PIN(6, 10)
#define PIN_RLIN32RX_INTP18 RCAR_GP_PIN(6, 11)
#define PIN_RLIN31TX RCAR_GP_PIN(6, 12)
#define PIN_RLIN31RX_INTP17 RCAR_GP_PIN(6, 13)
#define PIN_RLIN30TX RCAR_GP_PIN(6, 14)
#define PIN_RLIN30RX_INTP16 RCAR_GP_PIN(6, 15)
#define PIN_INTP37 RCAR_GP_PIN(6, 16)
#define PIN_INTP36 RCAR_GP_PIN(6, 17)
#define PIN_INTP35 RCAR_GP_PIN(6, 18)
#define PIN_INTP34 RCAR_GP_PIN(6, 19)
#define PIN_INTP33 RCAR_GP_PIN(6, 20)
#define PIN_INTP32 RCAR_GP_PIN(6, 21)
#define PIN_NMI1 RCAR_GP_PIN(6, 22)
#define PIN_PRESETOUT1_N RCAR_GP_PIN(6, 31)
#define PIN_CAN0TX RCAR_GP_PIN(7, 0)
#define PIN_CAN0RX_INTP0 RCAR_GP_PIN(7, 1)
#define PIN_CAN1TX RCAR_GP_PIN(7, 2)
#define PIN_CAN1RX_INTP1 RCAR_GP_PIN(7, 3)
#define PIN_CAN2TX RCAR_GP_PIN(7, 4)
#define PIN_CAN2RX_INTP2 RCAR_GP_PIN(7, 5)
#define PIN_CAN3TX RCAR_GP_PIN(7, 6)
#define PIN_CAN3RX_INTP3 RCAR_GP_PIN(7, 7)
#define PIN_CAN4TX RCAR_GP_PIN(7, 8)
#define PIN_CAN4RX_INTP4 RCAR_GP_PIN(7, 9)
#define PIN_CAN5TX RCAR_GP_PIN(7, 10)
#define PIN_CAN5RX_INTP5 RCAR_GP_PIN(7, 11)
#define PIN_CAN6TX RCAR_GP_PIN(7, 12)
#define PIN_CAN6RX_INTP6 RCAR_GP_PIN(7, 13)
#define PIN_CAN7TX RCAR_GP_PIN(7, 14)
#define PIN_CAN7RX_INTP7 RCAR_GP_PIN(7, 15)
#define PIN_CAN8TX RCAR_GP_PIN(7, 16)
#define PIN_CAN8RX_INTP8 RCAR_GP_PIN(7, 17)
#define PIN_CAN9TX RCAR_GP_PIN(7, 18)
#define PIN_CAN9RX_INTP9 RCAR_GP_PIN(7, 19)
#define PIN_CAN10TX RCAR_GP_PIN(7, 20)
#define PIN_CAN10RX_INTP10 RCAR_GP_PIN(7, 21)
#define PIN_CAN11TX RCAR_GP_PIN(7, 22)
#define PIN_CAN11RX_INTP11 RCAR_GP_PIN(7, 23)
#define PIN_CAN12TX RCAR_GP_PIN(7, 24)
#define PIN_CAN12RX_INTP12 RCAR_GP_PIN(7, 25)
#define PIN_CAN13TX RCAR_GP_PIN(7, 26)
#define PIN_CAN13RX_INTP13 RCAR_GP_PIN(7, 27)
#define PIN_CAN14TX RCAR_GP_PIN(7, 28)
#define PIN_CAN14RX_INTP14 RCAR_GP_PIN(7, 29)
#define PIN_CAN15TX RCAR_GP_PIN(7, 30)
#define PIN_CAN15RX_INTP15 RCAR_GP_PIN(7, 31)
/* Pinmux function declarations */
#define FUNC_SCIF_CLK IP0SR0(0, 0)
#define FUNC_HSCK0 IP0SR0(4, 0)
#define FUNC_SCK3 IP0SR0(4, 1)
#define FUNC_MSIOF3_SCK IP0SR0(4, 2)
#define FUNC_TSN0_AVTP_CAPTURE_A IP0SR0(4, 5)
#define FUNC_HRX0 IP0SR0(8, 0)
#define FUNC_RX3 IP0SR0(8, 1)
#define FUNC_MSIOF3_RXD IP0SR0(8, 2)
#define FUNC_TSN0_AVTP_MATCH_A IP0SR0(8, 5)
#define FUNC_HTX0 IP0SR0(12, 0)
#define FUNC_TX3 IP0SR0(12, 1)
#define FUNC_MSIOF3_TXD IP0SR0(12, 2)
#define FUNC_HCTS0_N IP0SR0(16, 0)
#define FUNC_CTS3_N IP0SR0(16, 1)
#define FUNC_MSIOF3_SS1 IP0SR0(16, 2)
#define FUNC_TSN0_MDC_A IP0SR0(16, 5)
#define FUNC_HRTS0_N IP0SR0(20, 0)
#define FUNC_RTS3_N IP0SR0(20, 1)
#define FUNC_MSIOF3_SS2 IP0SR0(20, 2)
#define FUNC_TSN0_MDIO_A IP0SR0(20, 5)
#define FUNC_RX0 IP0SR0(24, 0)
#define FUNC_HRX1 IP0SR0(24, 1)
#define FUNC_MSIOF1_RXD IP0SR0(24, 3)
#define FUNC_TSN1_AVTP_MATCH_A IP0SR0(24, 5)
#define FUNC_TX0 IP0SR0(28, 0)
#define FUNC_HTX1 IP0SR0(28, 1)
#define FUNC_MSIOF1_TXD IP0SR0(28, 3)
#define FUNC_TSN1_AVTP_CAPTURE_A IP0SR0(28, 5)
#define FUNC_SCK0 IP1SR0(0, 0)
#define FUNC_HSCK1 IP1SR0(0, 1)
#define FUNC_MSIOF1_SCK IP1SR0(0, 3)
#define FUNC_RTS0_N IP1SR0(4, 0)
#define FUNC_HRTS1_N IP1SR0(4, 1)
#define FUNC_MSIOF3_SYNC IP1SR0(4, 2)
#define FUNC_TSN1_MDIO_A IP1SR0(4, 5)
#define FUNC_CTS0_N IP1SR0(8, 0)
#define FUNC_HCTS1_N IP1SR0(8, 1)
#define FUNC_MSIOF1_SYNC IP1SR0(8, 3)
#define FUNC_TSN1_MDC_A IP1SR0(8, 5)
#define FUNC_MSIOF0_SYNC IP1SR0(12, 0)
#define FUNC_HCTS3_N IP1SR0(12, 1)
#define FUNC_CTS1_N IP1SR0(12, 2)
#define FUNC_IRQ4 IP1SR0(12, 3)
#define FUNC_TSN0_LINK_A IP1SR0(12, 5)
#define FUNC_MSIOF0_RXD IP1SR0(16, 0)
#define FUNC_HRX3 IP1SR0(16, 1)
#define FUNC_RX1 IP1SR0(16, 2)
#define FUNC_MSIOF0_TXD IP1SR0(20, 0)
#define FUNC_HTX3 IP1SR0(20, 1)
#define FUNC_TX1 IP1SR0(20, 2)
#define FUNC_MSIOF0_SCK IP1SR0(24, 0)
#define FUNC_HSCK3 IP1SR0(24, 1)
#define FUNC_SCK1 IP1SR0(24, 2)
#define FUNC_MSIOF0_SS1 IP1SR0(28, 0)
#define FUNC_HRTS3_N IP1SR0(28, 1)
#define FUNC_RTS1_N IP1SR0(28, 2)
#define FUNC_IRQ5 IP1SR0(28, 3)
#define FUNC_TSN1_LINK_A IP1SR0(28, 5)
#define FUNC_MSIOF0_SS2 IP2SR0(0, 0)
#define FUNC_TSN2_LINK_A IP2SR0(0, 5)
#define FUNC_IRQ0 IP2SR0(4, 0)
#define FUNC_MSIOF1_SS1 IP2SR0(4, 3)
#define FUNC_TSN0_MAGIC_A IP2SR0(4, 5)
#define FUNC_IRQ1 IP2SR0(8, 0)
#define FUNC_MSIOF1_SS2 IP2SR0(8, 3)
#define FUNC_TSN0_PHY_INT_A IP2SR0(8, 5)
#define FUNC_IRQ2 IP2SR0(12, 0)
#define FUNC_TSN1_PHY_INT_A IP2SR0(12, 5)
#define FUNC_IRQ3 IP2SR0(16, 0)
#define FUNC_TSN2_PHY_INT_A IP2SR0(16, 5)
#define FUNC_GP1_00 IP0SR1(0, 0)
#define FUNC_TCLK1 IP0SR1(0, 1)
#define FUNC_HSCK2 IP0SR1(0, 2)
#define FUNC_GP1_01 IP0SR1(4, 0)
#define FUNC_MMC_SD_CLK IPSR_DUMMY
#define FUNC_MMC_SD_D0 IPSR_DUMMY
#define FUNC_MMC_SD_D1 IPSR_DUMMY
#define FUNC_MMC_SD_D2 IPSR_DUMMY
#define FUNC_MMC_SD_D3 IPSR_DUMMY
#define FUNC_MMC_D4 IPSR_DUMMY
#define FUNC_MMC_D5 IPSR_DUMMY
#define FUNC_MMC_D6 IPSR_DUMMY
#define FUNC_MMC_D7 IPSR_DUMMY
#define FUNC_MMC_DS IPSR_DUMMY
#define FUNC_MMC_SD_CMD IPSR_DUMMY
#define FUNC_SD_CD IPSR_DUMMY
#define FUNC_SD_WP IPSR_DUMMY
#define FUNC_TCLK4 IP0SR1(4, 1)
#define FUNC_HRX2 IP0SR1(4, 2)
#define FUNC_GP1_02 IP0SR1(8, 0)
#define FUNC_HTX2 IP0SR1(8, 2)
#define FUNC_MSIOF2_SS1 IP0SR1(8, 3)
#define FUNC_TSN2_MDC_A IP0SR1(8, 5)
#define FUNC_GP1_03 IP0SR1(12, 0)
#define FUNC_TCLK2 IP0SR1(12, 1)
#define FUNC_HCTS2_N IP0SR1(12, 2)
#define FUNC_MSIOF2_SS2 IP0SR1(12, 3)
#define FUNC_CTS4_N IP0SR1(12, 4)
#define FUNC_TSN2_MDIO_A IP0SR1(12, 5)
#define FUNC_GP1_04 IP0SR1(16, 0)
#define FUNC_TCLK3 IP0SR1(16, 1)
#define FUNC_HRTS2_N IP0SR1(16, 2)
#define FUNC_MSIOF2_SYNC IP0SR1(16, 3)
#define FUNC_RTS4_N IP0SR1(16, 4)
#define FUNC_GP1_05 IP0SR1(20, 0)
#define FUNC_MSIOF2_SCK IP0SR1(20, 1)
#define FUNC_SCK4 IP0SR1(20, 2)
#define FUNC_GP1_06 IP0SR1(24, 0)
#define FUNC_MSIOF2_RXD IP0SR1(24, 1)
#define FUNC_RX4 IP0SR1(24, 2)
#define FUNC_GP1_07 IP0SR1(28, 0)
#define FUNC_MSIOF2_TXD IP0SR1(28, 1)
#define FUNC_TX4 IP0SR1(28, 2)
#define FUNC_GP4_00 IP0SR4(0, 0)
#define FUNC_MSPI4SC IP0SR4(0, 1)
#define FUNC_TAUD0I2 IP0SR4(0, 3)
#define FUNC_TAUD0O2 IP0SR4(0, 4)
#define FUNC_GP4_01 IP0SR4(4, 0)
#define FUNC_MSPI4SI IP0SR4(4, 1)
#define FUNC_TAUD0I4 IP0SR4(4, 3)
#define FUNC_TAUD0O4 IP0SR4(4, 4)
#define FUNC_GP4_02 IP0SR4(8, 0)
#define FUNC_MSPI4SO_MSPI4DCS IP0SR4(8, 1)
#define FUNC_TAUD0I3 IP0SR4(8, 3)
#define FUNC_TAUD0O3 IP0SR4(8, 4)
#define FUNC_GP4_03 IP0SR4(12, 0)
#define FUNC_MSPI4CSS1 IP0SR4(12, 1)
#define FUNC_TAUD0I6 IP0SR4(12, 3)
#define FUNC_TAUD0O6 IP0SR4(12, 4)
#define FUNC_GP4_04 IP0SR4(16, 0)
#define FUNC_MSPI4CSS0 IP0SR4(16, 1)
#define FUNC_MSPI4SSI_N IP0SR4(16, 2)
#define FUNC_TAUD0I5 IP0SR4(16, 3)
#define FUNC_TAUD0O5 IP0SR4(16, 4)
#define FUNC_GP4_05 IP0SR4(20, 0)
#define FUNC_MSPI4CSS3 IP0SR4(20, 1)
#define FUNC_TAUD0I8 IP0SR4(20, 3)
#define FUNC_TAUD0O8 IP0SR4(20, 4)
#define FUNC_GP4_06 IP0SR4(24, 0)
#define FUNC_MSPI4CSS2 IP0SR4(24, 1)
#define FUNC_TAUD0I7 IP0SR4(24, 3)
#define FUNC_TAUD0O7 IP0SR4(24, 4)
#define FUNC_GP4_07 IP0SR4(28, 0)
#define FUNC_MSPI4CSS5 IP0SR4(28, 1)
#define FUNC_TAUD0I10 IP0SR4(28, 3)
#define FUNC_TAUD0O10 IP0SR4(28, 4)
#define FUNC_GP4_08 IP1SR4(0, 0)
#define FUNC_MSPI4CSS4 IP1SR4(0, 1)
#define FUNC_TAUD0I9 IP1SR4(0, 3)
#define FUNC_TAUD0O9 IP1SR4(0, 4)
#define FUNC_GP4_09 IP1SR4(4, 0)
#define FUNC_MSPI4CSS7 IP1SR4(4, 1)
#define FUNC_TAUD0I12 IP1SR4(4, 3)
#define FUNC_TAUD0O12 IP1SR4(4, 4)
#define FUNC_GP4_10 IP1SR4(8, 0)
#define FUNC_MSPI4CSS6 IP1SR4(8, 1)
#define FUNC_TAUD0I11 IP1SR4(8, 3)
#define FUNC_TAUD0O11 IP1SR4(8, 4)
#define FUNC_GP4_11 IP1SR4(12, 0)
#define FUNC_ERRORIN0_N IP1SR4(12, 1)
#define FUNC_TAUD0I14 IP1SR4(12, 3)
#define FUNC_TAUD0O14 IP1SR4(12, 4)
#define FUNC_GP4_12 IP1SR4(16, 0)
#define FUNC_ERROROUT_C_N IP1SR4(16, 1)
#define FUNC_TAUD0I13 IP1SR4(16, 3)
#define FUNC_TAUD0O13 IP1SR4(16, 4)
#define FUNC_GP4_13 IP1SR4(20, 0)
#define FUNC_GP4_14 IP1SR4(24, 0)
#define FUNC_ERRORIN1_N IP1SR4(24, 1)
#define FUNC_TAUD0I15 IP1SR4(24, 3)
#define FUNC_TAUD0O15 IP1SR4(24, 4)
#define FUNC_GP4_15 IP1SR4(28, 0)
#define FUNC_MSPI1CSS3 IP1SR4(28, 1)
#define FUNC_TAUD1I1 IP1SR4(28, 3)
#define FUNC_TAUD1O1 IP1SR4(28, 4)
#define FUNC_GP4_16 IP2SR4(0, 0)
#define FUNC_TAUD1I0 IP2SR4(0, 3)
#define FUNC_TAUD1O0 IP2SR4(0, 4)
#define FUNC_GP4_17 IP2SR4(4, 0)
#define FUNC_MSPI1CSS5 IP2SR4(4, 1)
#define FUNC_TAUD1I3 IP2SR4(4, 3)
#define FUNC_TAUD1O3 IP2SR4(4, 4)
#define FUNC_GP4_18 IP2SR4(8, 0)
#define FUNC_MSPI1CSS4 IP2SR4(8, 1)
#define FUNC_TAUD1I2 IP2SR4(8, 3)
#define FUNC_TAUD1O2 IP2SR4(8, 4)
#define FUNC_GP4_19 IP2SR4(12, 0)
#define FUNC_MSPI1CSS6 IP2SR4(12, 1)
#define FUNC_TAUD1I4 IP2SR4(12, 3)
#define FUNC_TAUD1O4 IP2SR4(12, 4)
#define FUNC_MSPI0SC IP2SR4(16, 0)
#define FUNC_MSPI1CSS7 IP2SR4(16, 1)
#define FUNC_TAUD1I5 IP2SR4(16, 3)
#define FUNC_TAUD1O5 IP2SR4(16, 4)
#define FUNC_MSPI0SI IP2SR4(20, 0)
#define FUNC_TAUD1I7 IP2SR4(20, 3)
#define FUNC_TAUD1O7 IP2SR4(20, 4)
#define FUNC_MSPI0SO_MSPI0DCS IP2SR4(24, 0)
#define FUNC_TAUD1I6 IP2SR4(24, 3)
#define FUNC_TAUD1O6 IP2SR4(24, 4)
#define FUNC_MSPI0CSS1 IP2SR4(28, 0)
#define FUNC_TAUD1I9 IP2SR4(28, 3)
#define FUNC_TAUD1O9 IP2SR4(28, 4)
#define FUNC_MSPI0CSS0 IP3SR4(0, 0)
#define FUNC_MSPI0SSI_N IP3SR4(0, 1)
#define FUNC_TAUD1I8 IP3SR4(0, 3)
#define FUNC_TAUD1O8 IP3SR4(0, 4)
#define FUNC_MSPI1SO_MSPI1DCS IP3SR4(8, 0)
#define FUNC_MSPI0CSS3 IP3SR4(8, 2)
#define FUNC_TAUD1I11 IP3SR4(8, 3)
#define FUNC_TAUD1O11 IP3SR4(8, 4)
#define FUNC_MSPI1SC IP3SR4(16, 0)
#define FUNC_MSPI0CSS2 IP3SR4(16, 2)
#define FUNC_TAUD1I10 IP3SR4(16, 3)
#define FUNC_TAUD1O10 IP3SR4(16, 4)
#define FUNC_RIIC0SCL IP0SR5(0, 0)
#define FUNC_TAUD0I0 IP0SR5(0, 3)
#define FUNC_TAUD0O0 IP0SR5(0, 4)
#define FUNC_RIIC0SDA IP0SR5(4, 0)
#define FUNC_TAUD0I1 IP0SR5(4, 3)
#define FUNC_TAUD0O1 IP0SR5(4, 4)
#define FUNC_ETNB0MD IP0SR5(8, 0)
#define FUNC_ETNB0WOL IP0SR5(12, 0)
#define FUNC_ETNB0LINKSTA IP0SR5(16, 0)
#define FUNC_ETNB0MDC IP0SR5(20, 0)
#define FUNC_ETNB0RXCLK IP0SR5(24, 0)
#define FUNC_ETNB0CRS_DV IP0SR5(24, 1)
#define FUNC_ETNB0TXCLK IP0SR5(28, 0)
#define FUNC_ETNB0REFCLK IP0SR5(28, 1)
#define FUNC_RLIN33TX IP1SR6(0, 0)
#define FUNC_TAUJ3O3 IP1SR6(0, 3)
#define FUNC_TAUJ3I3 IP1SR6(0, 4)
#define FUNC_NMI1 IP1SR6(0, 5)
#define FUNC_RLIN33RX_INTP19 IP1SR6(4, 0)
#define FUNC_TAUJ3O2 IP1SR6(4, 3)
#define FUNC_TAUJ3I2 IP1SR6(4, 4)
#define FUNC_RLIN32TX IP1SR6(8, 0)
#define FUNC_TAUJ3O1 IP1SR6(8, 3)
#define FUNC_TAUJ3I1 IP1SR6(8, 4)
#define FUNC_RLIN32RX_INTP18 IP1SR6(12, 0)
#define FUNC_TAUJ3O0 IP1SR6(12, 3)
#define FUNC_TAUJ3I0 IP1SR6(12, 4)
#define FUNC_INTP35 IP1SR6(12, 5)
#define FUNC_RLIN31TX IP1SR6(16, 0)
#define FUNC_TAUJ1I3 IP1SR6(16, 3)
#define FUNC_TAUJ1O3 IP1SR6(16, 4)
#define FUNC_INTP34 IP1SR6(16, 5)
#define FUNC_RLIN31RX_INTP17 IP1SR6(20, 0)
#define FUNC_TAUJ1I2 IP1SR6(20, 3)
#define FUNC_TAUJ1O2 IP1SR6(20, 4)
#define FUNC_INTP33 IP1SR6(20, 5)
#define FUNC_RLIN30TX IP1SR6(24, 0)
#define FUNC_TAUJ1I1 IP1SR6(24, 3)
#define FUNC_TAUJ1O1 IP1SR6(24, 4)
#define FUNC_RLIN30RX_INTP16 IP1SR6(28, 0)
#define FUNC_TAUJ1I0 IP1SR6(28, 3)
#define FUNC_TAUJ1O0 IP1SR6(28, 4)
#define FUNC_FLXA0STPWT IP2SR6(8, 2)
#define FUNC_CAN0TX IP0SR7(0, 0)
#define FUNC_RSENT0SPCO IP0SR7(0, 1)
#define FUNC_MSPI2SO_MSPI2DCS IP0SR7(0, 3)
#define FUNC_CAN0RX_INTP0 IP0SR7(4, 0)
#define FUNC_RSENT0RX IP0SR7(4, 1)
#define FUNC_RSENT0RX_RSENT0SPCO IP0SR7(4, 2)
#define FUNC_MSPI2SC IP0SR7(4, 3)
#define FUNC_CAN1TX IP0SR7(8, 0)
#define FUNC_RSENT1SPCO IP0SR7(8, 1)
#define FUNC_MSPI2SSI_N IP0SR7(8, 3)
#define FUNC_MSPI2CSS0 IP0SR7(8, 4)
#define FUNC_CAN1RX_INTP1 IP0SR7(12, 0)
#define FUNC_RSENT1RX IP0SR7(12, 1)
#define FUNC_RSENT1RX_RSENT1SPCO IP0SR7(12, 2)
#define FUNC_MSPI2SI IP0SR7(12, 3)
#define FUNC_CAN2TX IP0SR7(16, 0)
#define FUNC_RSENT2SPCO IP0SR7(16, 1)
#define FUNC_MSPI2CSS2 IP0SR7(16, 4)
#define FUNC_CAN2RX_INTP2 IP0SR7(20, 0)
#define FUNC_RSENT2RX IP0SR7(20, 1)
#define FUNC_RSENT2RX_RSENT2SPCO IP0SR7(20, 2)
#define FUNC_MSPI2CSS1 IP0SR7(20, 4)
#define FUNC_CAN3TX IP0SR7(24, 0)
#define FUNC_RSENT3SPCO IP0SR7(24, 1)
#define FUNC_MSPI2CSS4 IP0SR7(24, 4)
#define FUNC_CAN3RX_INTP3 IP0SR7(28, 0)
#define FUNC_RSENT3RX IP0SR7(28, 1)
#define FUNC_RSENT3RX_RSENT3SPCO IP0SR7(28, 2)
#define FUNC_MSPI2CSS3 IP0SR7(28, 4)
#define FUNC_CAN4TX IP1SR7(0, 0)
#define FUNC_RSENT4SPCO IP1SR7(0, 1)
#define FUNC_MSPI2CSS6 IP1SR7(0, 4)
#define FUNC_CAN4RX_INTP4 IP1SR7(4, 0)
#define FUNC_RSENT4RX IP1SR7(4, 1)
#define FUNC_RSENT4RX_RSENT4SPCO IP1SR7(4, 2)
#define FUNC_MSPI2CSS5 IP1SR7(4, 4)
#define FUNC_CAN5TX IP1SR7(8, 0)
#define FUNC_RSENT5SPCO IP1SR7(8, 1)
#define FUNC_CAN5RX_INTP5 IP1SR7(12, 0)
#define FUNC_RSENT5RX IP1SR7(12, 1)
#define FUNC_RSENT5RX_RSENT5SPCO IP1SR7(12, 2)
#define FUNC_MSPI2CSS7 IP1SR7(12, 4)
#define FUNC_CAN6TX IP1SR7(16, 0)
#define FUNC_RSENT6SPCO IP1SR7(16, 1)
#define FUNC_MSPI3SO_MSPI3DCS IP1SR7(16, 3)
#define FUNC_CAN6RX_INTP6 IP1SR7(20, 0)
#define FUNC_RSENT6RX IP1SR7(20, 1)
#define FUNC_RSENT6RX_RSENT6SPCO IP1SR7(20, 2)
#define FUNC_MSPI3SC IP1SR7(20, 3)
#define FUNC_CAN7TX IP1SR7(24, 0)
#define FUNC_RSENT7SPCO IP1SR7(24, 1)
#define FUNC_MSPI3SSI_N IP1SR7(24, 3)
#define FUNC_CAN7RX_INTP7 IP1SR7(28, 0)
#define FUNC_RSENT7RX IP1SR7(28, 1)
#define FUNC_RSENT7RX_RSENT7SPCO IP1SR7(28, 2)
#define FUNC_MSPI3SI IP1SR7(28, 3)
#define FUNC_CAN8TX IP2SR7(0, 0)
#define FUNC_RLIN38TX IP2SR7(0, 1)
#define FUNC_MSPI3CSS1 IP2SR7(0, 3)
#define FUNC_CAN8RX_INTP8 IP2SR7(4, 0)
#define FUNC_RLIN38RX_INTP24 IP2SR7(4, 1)
#define FUNC_MSPI3CSS0 IP2SR7(4, 3)
#define FUNC_CAN9TX IP2SR7(8, 0)
#define FUNC_RLIN39TX IP2SR7(8, 1)
#define FUNC_MSPI3CSS3 IP2SR7(8, 3)
#define FUNC_CAN9RX_INTP9 IP2SR7(12, 0)
#define FUNC_RLIN39RX_INTP25 IP2SR7(12, 1)
#define FUNC_MSPI3CSS2 IP2SR7(12, 3)
#define FUNC_CAN10TX IP2SR7(16, 0)
#define FUNC_RLIN310TX IP2SR7(16, 1)
#define FUNC_MSPI3CSS5 IP2SR7(16, 3)
#define FUNC_CAN10RX_INTP10 IP2SR7(20, 0)
#define FUNC_RLIN310RX_INTP26 IP2SR7(20, 1)
#define FUNC_MSPI3CSS4 IP2SR7(20, 3)
#define FUNC_CAN11TX IP2SR7(24, 0)
#define FUNC_RLIN311TX IP2SR7(24, 1)
#define FUNC_MSPI3CSS7 IP2SR7(24, 3)
#define FUNC_CAN11RX_INTP11 IP2SR7(28, 0)
#define FUNC_RLIN311RX_INTP27 IP2SR7(28, 1)
#define FUNC_MSPI3CSS6 IP2SR7(28, 3)
#define FUNC_FLXA0RXDB IP3SR7(8, 2)
#define FUNC_FLXA0RXDA IP3SR7(12, 2)
#define FUNC_FLXA0TXDB IP3SR7(16, 2)
#define FUNC_FLXA0TXDA IP3SR7(20, 2)
#define FUNC_FLXA0TXENB IP3SR7(24, 2)
#define FUNC_FLXA0TXENA IP3SR7(28, 2)
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_RENESAS_PINCTRL_R8A779F0_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/renesas/pinctrl-r8a779f0.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 9,500 |
```objective-c
/*
*
*/
#ifndef your_sha256_hash_
#define your_sha256_hash_
/**
* @brief Utility macro to build IPSR property entry.
* IPSR: Peripheral Function Select Register
* Each IPSR bank can hold 8 cellules of 4 bits coded function.
*
* @param bank the IPSR register bank.
* @param shift the bit shift for this alternate function.
* @param func the 4 bits encoded alternate function.
*
* Function code [ 0 : 3 ]
* Function shift [ 4 : 8 ]
* Empty [ 9 ]
* IPSR bank [ 10 : 14 ]
* Register index [ 15 : 17 ] (S4 only)
*/
#define IPSR(bank, shift, func) (((bank) << 10U) | ((shift) << 4U) | (func))
/* Arbitrary number to encode non capable gpio pin */
#define PIN_NOGPSR_START 1024U
/**
* @brief Utility macro to encode a GPIO capable pin
*
* @param bank the GPIO bank
* @param pin the pin within the GPIO bank (0..31)
*/
#define RCAR_GP_PIN(bank, pin) (((bank) * 32U) + (pin))
/**
* @brief Utility macro to encode a non capable GPIO pin
*
* @param pin the encoded pin number
*/
#define RCAR_NOGP_PIN(pin) (PIN_NOGPSR_START + pin)
/* Renesas Gen4 has IPSR registers at different base address
* reg is here an index for the base address.
* Each base address has 4 IPSR banks.
*/
#define IPnSR(bank, reg, shift, func) \
IPSR(((reg) << 5U) | (bank), shift, func)
#define IP0SR0(shift, func) IPnSR(0, 0, shift, func)
#define IP1SR0(shift, func) IPnSR(1, 0, shift, func)
#define IP2SR0(shift, func) IPnSR(2, 0, shift, func)
#define IP3SR0(shift, func) IPnSR(3, 0, shift, func)
#define IP0SR1(shift, func) IPnSR(0, 1, shift, func)
#define IP1SR1(shift, func) IPnSR(1, 1, shift, func)
#define IP2SR1(shift, func) IPnSR(2, 1, shift, func)
#define IP3SR1(shift, func) IPnSR(3, 1, shift, func)
#define IP0SR2(shift, func) IPnSR(0, 2, shift, func)
#define IP1SR2(shift, func) IPnSR(1, 2, shift, func)
#define IP2SR2(shift, func) IPnSR(2, 2, shift, func)
#define IP3SR2(shift, func) IPnSR(3, 2, shift, func)
#define IP0SR3(shift, func) IPnSR(0, 3, shift, func)
#define IP1SR3(shift, func) IPnSR(1, 3, shift, func)
#define IP2SR3(shift, func) IPnSR(2, 3, shift, func)
#define IP3SR3(shift, func) IPnSR(3, 3, shift, func)
#define IP0SR4(shift, func) IPnSR(0, 4, shift, func)
#define IP1SR4(shift, func) IPnSR(1, 4, shift, func)
#define IP2SR4(shift, func) IPnSR(2, 4, shift, func)
#define IP3SR4(shift, func) IPnSR(3, 4, shift, func)
#define IP0SR5(shift, func) IPnSR(0, 5, shift, func)
#define IP1SR5(shift, func) IPnSR(1, 5, shift, func)
#define IP2SR5(shift, func) IPnSR(2, 5, shift, func)
#define IP3SR5(shift, func) IPnSR(3, 5, shift, func)
#define IP0SR6(shift, func) IPnSR(0, 6, shift, func)
#define IP1SR6(shift, func) IPnSR(1, 6, shift, func)
#define IP2SR6(shift, func) IPnSR(2, 6, shift, func)
#define IP3SR6(shift, func) IPnSR(3, 6, shift, func)
#define IP0SR7(shift, func) IPnSR(0, 7, shift, func)
#define IP1SR7(shift, func) IPnSR(1, 7, shift, func)
#define IP2SR7(shift, func) IPnSR(2, 7, shift, func)
#define IP3SR7(shift, func) IPnSR(3, 7, shift, func)
/**
* @brief Macro to define a dummy IPSR flag for a pin
*
* This macro is used to define a dummy IPSR flag for a pin in the R-Car PFC
* driver. It is intended for pins that do not have a specific function
* defined in IPSR but always act as a peripheral. The dummy IPSR flag ensures
* that the driver sets the 'peripheral' bit for such pins.
*
* @see RCAR_PIN_FLAGS_FUNC_DUMMY
*/
#define IPSR_DUMMY IPnSR(0x1f, 7, 0x1f, 0xf)
#define PIN_VOLTAGE_NONE 0
#define PIN_VOLTAGE_1P8V 1
#define PIN_VOLTAGE_3P3V 2
#endif /* your_sha256_hash_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/pinctrl/renesas/pinctrl-rcar-common.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,251 |
```objective-c
/*
*/
/**
* @file
* @brief Values used to define the sink overvoltage and source overcurrent protections thresholds.
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_USBC_NXP_NX20P3483_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_USBC_NXP_NX20P3483_H_
/** Voltage limit of 6.0V */
#define NX20P3483_U_THRESHOLD_6_0 0
/** Voltage limit of 6.8V */
#define NX20P3483_U_THRESHOLD_6_8 1 /* <-- default */
/** Voltage limit of 10.0V */
#define NX20P3483_U_THRESHOLD_10_0 2
/** Voltage limit of 11.5V */
#define NX20P3483_U_THRESHOLD_11_5 3
/** Voltage limit of 14.0V */
#define NX20P3483_U_THRESHOLD_14_0 4
/** Voltage limit of 17.0V */
#define NX20P3483_U_THRESHOLD_17_0 5
/** Voltage limit of 23.0V */
#define NX20P3483_U_THRESHOLD_23_0 6
/** Current limit of 400mA */
#define NX20P3483_I_THRESHOLD_0_400 0
/** Current limit of 600mA */
#define NX20P3483_I_THRESHOLD_0_600 1
/** Current limit of 800mA */
#define NX20P3483_I_THRESHOLD_0_800 2
/** Current limit of 1000mA */
#define NX20P3483_I_THRESHOLD_1_000 3
/** Current limit of 1200mA */
#define NX20P3483_I_THRESHOLD_1_200 4
/** Current limit of 1400mA */
#define NX20P3483_I_THRESHOLD_1_400 5
/** Current limit of 1600mA */
#define NX20P3483_I_THRESHOLD_1_600 6 /* <-- default */
/** Current limit of 1800mA */
#define NX20P3483_I_THRESHOLD_1_800 7
/** Current limit of 2000mA */
#define NX20P3483_I_THRESHOLD_2_000 8
/** Current limit of 2200mA */
#define NX20P3483_I_THRESHOLD_2_200 9
/** Current limit of 2400mA */
#define NX20P3483_I_THRESHOLD_2_400 10
/** Current limit of 2600mA */
#define NX20P3483_I_THRESHOLD_2_600 11
/** Current limit of 2800mA */
#define NX20P3483_I_THRESHOLD_2_800 12
/** Current limit of 3000mA */
#define NX20P3483_I_THRESHOLD_3_000 13
/** Current limit of 3200mA */
#define NX20P3483_I_THRESHOLD_3_200 14
/** Current limit of 3400mA */
#define NX20P3483_I_THRESHOLD_3_400 15
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_USBC_NXP_NX20P3483_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/usb-c/nxp_nx20p3483.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 655 |
```objective-c
/*
*
* This is based on Linux, documentation:
* path_to_url
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_USBC_PD_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_USBC_PD_H_
/* Power delivery Power Data Object definitions */
#define PDO_TYPE_FIXED 0
#define PDO_TYPE_BATT 1
#define PDO_TYPE_VAR 2
#define PDO_TYPE_APDO 3
#define PDO_TYPE_SHIFT 30
#define PDO_TYPE_MASK 0x3
#define PDO_TYPE(t) ((t) << PDO_TYPE_SHIFT)
#define PDO_VOLT_MASK 0x3ff
#define PDO_CURR_MASK 0x3ff
#define PDO_PWR_MASK 0x3ff
#define PDO_FIXED_DUAL_ROLE (1 << 29) /* Power role swap supported */
#define PDO_FIXED_SUSPEND (1 << 28) /* USB Suspend supported (Source) */
#define PDO_FIXED_HIGHER_CAP (1 << 28) /* Requires more than vSafe5V (Sink) */
#define PDO_FIXED_EXTPOWER (1 << 27) /* Externally powered */
#define PDO_FIXED_USB_COMM (1 << 26) /* USB communications capable */
#define PDO_FIXED_DATA_SWAP (1 << 25) /* Data role swap supported */
#define PDO_FIXED_VOLT_SHIFT 10 /* 50mV units */
#define PDO_FIXED_CURR_SHIFT 0 /* 10mA units */
#define PDO_FIXED_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_FIXED_VOLT_SHIFT)
#define PDO_FIXED_CURR(ma) ((((ma) / 10) & PDO_CURR_MASK) << PDO_FIXED_CURR_SHIFT)
#define PDO_FIXED(mv, ma, flags) \
(PDO_TYPE(PDO_TYPE_FIXED) | (flags) | \
PDO_FIXED_VOLT(mv) | PDO_FIXED_CURR(ma))
#define VSAFE5V 5000 /* mv units */
#define PDO_BATT_MAX_VOLT_SHIFT 20 /* 50mV units */
#define PDO_BATT_MIN_VOLT_SHIFT 10 /* 50mV units */
#define PDO_BATT_MAX_PWR_SHIFT 0 /* 250mW units */
#define PDO_BATT_MIN_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_BATT_MIN_VOLT_SHIFT)
#define PDO_BATT_MAX_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_BATT_MAX_VOLT_SHIFT)
#define PDO_BATT_MAX_POWER(mw) ((((mw) / 250) & PDO_PWR_MASK) << PDO_BATT_MAX_PWR_SHIFT)
#define PDO_BATT(min_mv, max_mv, max_mw) \
(PDO_TYPE(PDO_TYPE_BATT) | PDO_BATT_MIN_VOLT(min_mv) | \
PDO_BATT_MAX_VOLT(max_mv) | PDO_BATT_MAX_POWER(max_mw))
#define PDO_VAR_MAX_VOLT_SHIFT 20 /* 50mV units */
#define PDO_VAR_MIN_VOLT_SHIFT 10 /* 50mV units */
#define PDO_VAR_MAX_CURR_SHIFT 0 /* 10mA units */
#define PDO_VAR_MIN_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_VAR_MIN_VOLT_SHIFT)
#define PDO_VAR_MAX_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_VAR_MAX_VOLT_SHIFT)
#define PDO_VAR_MAX_CURR(ma) ((((ma) / 10) & PDO_CURR_MASK) << PDO_VAR_MAX_CURR_SHIFT)
#define PDO_VAR(min_mv, max_mv, max_ma) \
(PDO_TYPE(PDO_TYPE_VAR) | PDO_VAR_MIN_VOLT(min_mv) | \
PDO_VAR_MAX_VOLT(max_mv) | PDO_VAR_MAX_CURR(max_ma))
#define APDO_TYPE_PPS 0
#define PDO_APDO_TYPE_SHIFT 28 /* Only valid value currently is 0x0 - PPS */
#define PDO_APDO_TYPE_MASK 0x3
#define PDO_APDO_TYPE(t) ((t) << PDO_APDO_TYPE_SHIFT)
#define PDO_PPS_APDO_MAX_VOLT_SHIFT 17 /* 100mV units */
#define PDO_PPS_APDO_MIN_VOLT_SHIFT 8 /* 100mV units */
#define PDO_PPS_APDO_MAX_CURR_SHIFT 0 /* 50mA units */
#define PDO_PPS_APDO_VOLT_MASK 0xff
#define PDO_PPS_APDO_CURR_MASK 0x7f
#define PDO_PPS_APDO_MIN_VOLT(mv) \
((((mv) / 100) & PDO_PPS_APDO_VOLT_MASK) << PDO_PPS_APDO_MIN_VOLT_SHIFT)
#define PDO_PPS_APDO_MAX_VOLT(mv) \
((((mv) / 100) & PDO_PPS_APDO_VOLT_MASK) << PDO_PPS_APDO_MAX_VOLT_SHIFT)
#define PDO_PPS_APDO_MAX_CURR(ma) \
((((ma) / 50) & PDO_PPS_APDO_CURR_MASK) << PDO_PPS_APDO_MAX_CURR_SHIFT)
#define PDO_PPS_APDO(min_mv, max_mv, max_ma) \
(PDO_TYPE(PDO_TYPE_APDO) | PDO_APDO_TYPE(APDO_TYPE_PPS) | \
PDO_PPS_APDO_MIN_VOLT(min_mv) | PDO_PPS_APDO_MAX_VOLT(max_mv) | \
PDO_PPS_APDO_MAX_CURR(max_ma))
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_USBC_PD_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/usb-c/pd.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,153 |
```objective-c
/*
*
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_MEM_ATTR_ARM_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_MEM_ATTR_ARM_H_
#include <zephyr/sys/util_macro.h>
#include <zephyr/dt-bindings/memory-attr/memory-attr.h>
/*
* Architecture specific ARM MPU related attributes.
*
* This list is to seamlessly support the MPU regions configuration using DT and
* the `zephyr,memory-attr` property.
*
* This is legacy and it should NOT be extended further. If new MPU region
* types must be added, these must rely on the generic memory attributes.
*/
#define DT_MEM_ARM_MASK DT_MEM_ARCH_ATTR_MASK
#define DT_MEM_ARM_GET(x) ((x) & DT_MEM_ARM_MASK)
#define DT_MEM_ARM(x) ((x) << DT_MEM_ARCH_ATTR_SHIFT)
#define ATTR_MPU_RAM BIT(0)
#define ATTR_MPU_RAM_NOCACHE BIT(1)
#define ATTR_MPU_FLASH BIT(2)
#define ATTR_MPU_PPB BIT(3)
#define ATTR_MPU_IO BIT(4)
#define ATTR_MPU_EXTMEM BIT(5)
#define DT_MEM_ARM_MPU_RAM DT_MEM_ARM(ATTR_MPU_RAM)
#define DT_MEM_ARM_MPU_RAM_NOCACHE DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE)
#define DT_MEM_ARM_MPU_FLASH DT_MEM_ARM(ATTR_MPU_FLASH)
#define DT_MEM_ARM_MPU_PPB DT_MEM_ARM(ATTR_MPU_PPB)
#define DT_MEM_ARM_MPU_IO DT_MEM_ARM(ATTR_MPU_IO)
#define DT_MEM_ARM_MPU_EXTMEM DT_MEM_ARM(ATTR_MPU_EXTMEM)
#define DT_MEM_ARM_MPU_UNKNOWN DT_MEM_ARCH_ATTR_UNKNOWN
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_MEM_ATTR_ARM_H_ */
``` | /content/code_sandbox/include/zephyr/dt-bindings/memory-attr/memory-attr-arm.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 399 |
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