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drm/dp_helper: add helpers for frl link training support for dp-hdmi2.1 pcon
|
this patch adds support for configuring a pcon device, connected as a dp branched device to enable frl link training with a hdmi2.1 + sink.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add support for dp-hdmi2.1 pcon
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['intel ']
|
['h', 'c']
| 2
| 333
| 0
|
-changed the commit message for better clarity (uma shankar) -removed unnecessary argument supplied to a drm helper function. -fixed return value for max frl read from pcon. --- diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c --- a/drivers/gpu/drm/drm_dp_helper.c +++ b/drivers/gpu/drm/drm_dp_helper.c + +/** + * drm_dp_get_pcon_max_frl_bw() - maximum frl supported by pcon + * @dpcd: displayport configuration data + * @port_cap: port capabilities + * + * returns maximum frl bandwidth supported by pcon in gbps, + * returns 0 if not supported. + */ +int drm_dp_get_pcon_max_frl_bw(const u8 dpcd[dp_receiver_cap_size], + const u8 port_cap[4]) +{ + int bw; + u8 buf; + + buf = port_cap[2]; + bw = buf & dp_pcon_max_frl_bw; + + switch (bw) { + case dp_pcon_max_9gbps: + return 9; + case dp_pcon_max_18gbps: + return 18; + case dp_pcon_max_24gbps: + return 24; + case dp_pcon_max_32gbps: + return 32; + case dp_pcon_max_40gbps: + return 40; + case dp_pcon_max_48gbps: + return 48; + case dp_pcon_max_0gbps: + default: + return 0; + } + + return 0; +} +export_symbol(drm_dp_get_pcon_max_frl_bw); + +/** + * drm_dp_pcon_frl_prepare() - prepare pcon for frl. + * @aux: displayport aux channel + * + * returns 0 if success, else returns negative error code. + */ +int drm_dp_pcon_frl_prepare(struct drm_dp_aux *aux, bool enable_frl_ready_hpd) +{ + int ret; + u8 buf = dp_pcon_enable_source_ctl_mode | + dp_pcon_enable_link_frl_mode; + + if (enable_frl_ready_hpd) + buf |= dp_pcon_enable_hpd_ready; + + ret = drm_dp_dpcd_writeb(aux, dp_pcon_hdmi_link_config_1, buf); + + return ret; +} +export_symbol(drm_dp_pcon_frl_prepare); + +/** + * drm_dp_pcon_is_frl_ready() - is pcon ready for frl + * @aux: displayport aux channel + * + * returns true if success, else returns false. + */ +bool drm_dp_pcon_is_frl_ready(struct drm_dp_aux *aux) +{ + int ret; + u8 buf; + + ret = drm_dp_dpcd_readb(aux, dp_pcon_hdmi_tx_link_status, &buf); + if (ret < 0) + return false; + + if (buf & dp_pcon_frl_ready) + return true; + + return false; +} +export_symbol(drm_dp_pcon_is_frl_ready); + +/** + * drm_dp_pcon_frl_configure_1() - set hdmi link configuration-step1 + * @aux: displayport aux channel + * @max_frl_gbps: maximum frl bw to be configured between pcon and hdmi sink + * @concurrent_mode: true if concurrent mode or operation is required, + * false otherwise. + * + * returns 0 if success, else returns negative error code. + */ + +int drm_dp_pcon_frl_configure_1(struct drm_dp_aux *aux, int max_frl_gbps, + bool concurrent_mode) +{ + int ret; + u8 buf; + + ret = drm_dp_dpcd_readb(aux, dp_pcon_hdmi_link_config_1, &buf); + if (ret < 0) + return ret; + + if (concurrent_mode) + buf |= dp_pcon_enable_concurrent_link; + else + buf &= ~dp_pcon_enable_concurrent_link; + + switch (max_frl_gbps) { + case 9: + buf |= dp_pcon_enable_max_bw_9gbps; + break; + case 18: + buf |= dp_pcon_enable_max_bw_18gbps; + break; + case 24: + buf |= dp_pcon_enable_max_bw_24gbps; + break; + case 32: + buf |= dp_pcon_enable_max_bw_32gbps; + break; + case 40: + buf |= dp_pcon_enable_max_bw_40gbps; + break; + case 48: + buf |= dp_pcon_enable_max_bw_48gbps; + break; + case 0: + buf |= dp_pcon_enable_max_bw_0gbps; + break; + default: + return -einval; + } + + ret = drm_dp_dpcd_writeb(aux, dp_pcon_hdmi_link_config_1, buf); + if (ret < 0) + return ret; + + return 0; +} +export_symbol(drm_dp_pcon_frl_configure_1); + +/** + * drm_dp_pcon_frl_configure_2() - set hdmi link configuration step-2 + * @aux: displayport aux channel + * @max_frl_mask : max frl bw to be tried by the pcon with hdmi sink + * @extended_train_mode : true for extended mode, false for normal mode. + * in normal mode, the pcon tries each frl bw from the max_frl_mask starting + * from min, and stops when link training is successful. in extended mode, all + * frl bw selected in the mask are trained by the pcon. + * + * returns 0 if success, else returns negative error code. + */ +int drm_dp_pcon_frl_configure_2(struct drm_dp_aux *aux, int max_frl_mask, + bool extended_train_mode) +{ + int ret; + u8 buf = max_frl_mask; + + if (extended_train_mode) + buf |= dp_pcon_frl_link_train_extended; + + ret = drm_dp_dpcd_writeb(aux, dp_pcon_hdmi_link_config_2, buf); + if (ret < 0) + return ret; + + return 0; +} +export_symbol(drm_dp_pcon_frl_configure_2); + +/** + * drm_dp_pcon_reset_frl_config() - re-set hdmi link configuration. + * @aux: displayport aux channel + * + * returns 0 if success, else returns negative error code. + */ +int drm_dp_pcon_reset_frl_config(struct drm_dp_aux *aux) +{ + int ret; + + ret = drm_dp_dpcd_writeb(aux, dp_pcon_hdmi_link_config_1, 0x0); + if (ret < 0) + return ret; + + return 0; +} +export_symbol(drm_dp_pcon_reset_frl_config); + +/** + * drm_dp_pcon_frl_enable() - enable hdmi link through frl + * @aux: displayport aux channel + * + * returns 0 if success, else returns negative error code. + */ +int drm_dp_pcon_frl_enable(struct drm_dp_aux *aux) +{ + int ret; + u8 buf = 0; + + ret = drm_dp_dpcd_readb(aux, dp_pcon_hdmi_link_config_1, &buf); + if (ret < 0) + return ret; + if (!(buf & dp_pcon_enable_source_ctl_mode)) { + drm_debug_kms("pcon in autonomous mode, can't enable frl "); + return -einval; + } + buf |= dp_pcon_enable_hdmi_link; + ret = drm_dp_dpcd_writeb(aux, dp_pcon_hdmi_link_config_1, buf); + if (ret < 0) + return ret; + + return 0; +} +export_symbol(drm_dp_pcon_frl_enable); + +/** + * drm_dp_pcon_hdmi_link_active() - check if the pcon hdmi link status is active. + * @aux: displayport aux channel + * + * returns true if link is active else returns false. + */ +bool drm_dp_pcon_hdmi_link_active(struct drm_dp_aux *aux) +{ + u8 buf; + int ret; + + ret = drm_dp_dpcd_readb(aux, dp_pcon_hdmi_tx_link_status, &buf); + if (ret < 0) + return false; + + return buf & dp_pcon_hdmi_tx_link_active; +} +export_symbol(drm_dp_pcon_hdmi_link_active); + +/** + * drm_dp_pcon_hdmi_link_mode() - get the pcon hdmi link mode + * @aux: displayport aux channel + * @frl_trained_mask: pointer to store bitmask of the trained bw configuration. + * valid only if the mode returned is frl. for normal link training mode + * only 1 of the bits will be set, but in case of extended mode, more than + * one bits can be set. + * + * returns the link mode : tmds or frl on success, else returns negative error + * code. + */ +int drm_dp_pcon_hdmi_link_mode(struct drm_dp_aux *aux, u8 *frl_trained_mask) +{ + u8 buf; + int mode; + int ret; + + ret = drm_dp_dpcd_readb(aux, dp_pcon_hdmi_post_frl_status, &buf); + if (ret < 0) + return ret; + + mode = buf & dp_pcon_hdmi_link_mode; + + if (frl_trained_mask && dp_pcon_hdmi_mode_frl == mode) + *frl_trained_mask = (buf & dp_pcon_hdmi_frl_trained_bw) >> 1; + + return mode; +} +export_symbol(drm_dp_pcon_hdmi_link_mode); diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h +/* hdmi2.1 pcon frl configuration */ +# define dp_pcon_max_frl_bw (7 << 2) +# define dp_pcon_max_0gbps (0 << 2) +# define dp_pcon_max_9gbps (1 << 2) +# define dp_pcon_max_18gbps (2 << 2) +# define dp_pcon_max_24gbps (3 << 2) +# define dp_pcon_max_32gbps (4 << 2) +# define dp_pcon_max_40gbps (5 << 2) +# define dp_pcon_max_48gbps (6 << 2) +# define dp_pcon_source_ctl_mode (1 << 5) + +/* pcon configure-1 frl for hdmi sink */ +#define dp_pcon_hdmi_link_config_1 0x305a +# define dp_pcon_enable_max_frl_bw (7 << 0) +# define dp_pcon_enable_max_bw_0gbps 0 +# define dp_pcon_enable_max_bw_9gbps 1 +# define dp_pcon_enable_max_bw_18gbps 2 +# define dp_pcon_enable_max_bw_24gbps 3 +# define dp_pcon_enable_max_bw_32gbps 4 +# define dp_pcon_enable_max_bw_40gbps 5 +# define dp_pcon_enable_max_bw_48gbps 6 +# define dp_pcon_enable_source_ctl_mode (1 << 3) +# define dp_pcon_enable_concurrent_link (1 << 4) +# define dp_pcon_enable_link_frl_mode (1 << 5) +# define dp_pcon_enable_hpd_ready (1 << 6) +# define dp_pcon_enable_hdmi_link (1 << 7) + +/* pcon configure-2 frl for hdmi sink */ +#define dp_pcon_hdmi_link_config_2 0x305b +# define dp_pcon_max_link_bw_mask (0x3f << 0) +# define dp_pcon_frl_bw_mask_9gbps (1 << 0) +# define dp_pcon_frl_bw_mask_18gbps (1 << 1) +# define dp_pcon_frl_bw_mask_24gbps (1 << 2) +# define dp_pcon_frl_bw_mask_32gbps (1 << 3) +# define dp_pcon_frl_bw_mask_40gbps (1 << 4) +# define dp_pcon_frl_bw_mask_48gbps (1 << 5) +# define dp_pcon_frl_link_train_extended (1 << 6) + +/* pcon hdmi link status */ +#define dp_pcon_hdmi_tx_link_status 0x303b +# define dp_pcon_hdmi_tx_link_active (1 << 0) +# define dp_pcon_frl_ready (1 << 1) + +/* pcon hdmi post frl status */ +#define dp_pcon_hdmi_post_frl_status 0x3036 +# define dp_pcon_hdmi_link_mode (1 << 0) +# define dp_pcon_hdmi_mode_tmds 0 +# define dp_pcon_hdmi_mode_frl 1 +# define dp_pcon_hdmi_frl_trained_bw (0x3f << 1) +# define dp_pcon_frl_trained_bw_9gbps (1 << 1) +# define dp_pcon_frl_trained_bw_18gbps (1 << 2) +# define dp_pcon_frl_trained_bw_24gbps (1 << 3) +# define dp_pcon_frl_trained_bw_32gbps (1 << 4) +# define dp_pcon_frl_trained_bw_40gbps (1 << 5) +# define dp_pcon_frl_trained_bw_48gbps (1 << 6) + +int drm_dp_get_pcon_max_frl_bw(const u8 dpcd[dp_receiver_cap_size], + const u8 port_cap[4]); +int drm_dp_pcon_frl_prepare(struct drm_dp_aux *aux, bool enable_frl_ready_hpd); +bool drm_dp_pcon_is_frl_ready(struct drm_dp_aux *aux); +int drm_dp_pcon_frl_configure_1(struct drm_dp_aux *aux, int max_frl_gbps, + bool concurrent_mode); +int drm_dp_pcon_frl_configure_2(struct drm_dp_aux *aux, int max_frl_mask, + bool extended_train_mode); +int drm_dp_pcon_reset_frl_config(struct drm_dp_aux *aux); +int drm_dp_pcon_frl_enable(struct drm_dp_aux *aux); + +bool drm_dp_pcon_hdmi_link_active(struct drm_dp_aux *aux); +int drm_dp_pcon_hdmi_link_mode(struct drm_dp_aux *aux, u8 *frl_trained_mask); +
|
Graphics
|
ce32a6239de6480fa535c1409de98e24dd5ec721
|
ankit nautiyal
|
drivers
|
gpu
|
drm
|
drm/dp_helper: add support for link failure detection
|
there are specific dpcds defined for detecting link failures between the pcon and hdmi sink and check the link status. in case of link failure, pcon will communicate the same using an irq_hpd to source. hdmi sink would have indicated the same to pcon using scdc interrupt mechanism. while source can always read final hdmi sink's status using i2c over aux, it is easier and faster to read the pcons already read hdmi sink status registers.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add support for dp-hdmi2.1 pcon
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['intel ']
|
['h', 'c']
| 2
| 56
| 0
|
-rephrased the commit message, as per the code. -fixed styling issues -added documentation for the helper function. --- diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c --- a/drivers/gpu/drm/drm_dp_helper.c +++ b/drivers/gpu/drm/drm_dp_helper.c + +/** + * drm_dp_pcon_hdmi_frl_link_error_count() - print the error count per lane + * during link failure between pcon and hdmi sink + * @aux: displayport aux channel + * @connector: drm connector + * code. + **/ + +void drm_dp_pcon_hdmi_frl_link_error_count(struct drm_dp_aux *aux, + struct drm_connector *connector) +{ + u8 buf, error_count; + int i, num_error; + struct drm_hdmi_info *hdmi = &connector->display_info.hdmi; + + for (i = 0; i < hdmi->max_lanes; i++) { + if (drm_dp_dpcd_readb(aux, dp_pcon_hdmi_error_status_ln0 + i, &buf) < 0) + return; + + error_count = buf & dp_pcon_hdmi_error_count_mask; + switch (error_count) { + case dp_pcon_hdmi_error_count_hundred_plus: + num_error = 100; + break; + case dp_pcon_hdmi_error_count_ten_plus: + num_error = 10; + break; + case dp_pcon_hdmi_error_count_three_plus: + num_error = 3; + break; + default: + num_error = 0; + } + + drm_error("more than %d errors since the last read for lane %d", num_error, i); + } +} +export_symbol(drm_dp_pcon_hdmi_frl_link_error_count); diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h +# define rx_cap_changed (1 << 0) +# define link_status_changed (1 << 1) +# define stream_status_changed (1 << 2) +# define hdmi_link_status_changed (1 << 3) +# define connected_off_entry_requested (1 << 4) +/* pcon downstream hdmi error status per lane */ +#define dp_pcon_hdmi_error_status_ln0 0x3037 +#define dp_pcon_hdmi_error_status_ln1 0x3038 +#define dp_pcon_hdmi_error_status_ln2 0x3039 +#define dp_pcon_hdmi_error_status_ln3 0x303a +# define dp_pcon_hdmi_error_count_mask (0x7 << 0) +# define dp_pcon_hdmi_error_count_three_plus (1 << 0) +# define dp_pcon_hdmi_error_count_ten_plus (1 << 1) +# define dp_pcon_hdmi_error_count_hundred_plus (1 << 2) + +void drm_dp_pcon_hdmi_frl_link_error_count(struct drm_dp_aux *aux, + struct drm_connector *connector);
|
Graphics
|
3ce98018c8f9a5de857a9f4bcd300ecf9fc8280b
|
swati sharma
|
drivers
|
gpu
|
drm
|
drm/dp_helper: add support for configuring dsc for hdmi2.1 pcon
|
this patch adds registers for getting dsc encoder capability for a hdmi2.1 pcon. it also addes helper functions to configure dsc between the pcon and hdmi2.1 sink.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add support for dp-hdmi2.1 pcon
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['intel ']
|
['h', 'c']
| 2
| 317
| 0
|
--- diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c --- a/drivers/gpu/drm/drm_dp_helper.c +++ b/drivers/gpu/drm/drm_dp_helper.c + +/* + * drm_dp_pcon_enc_is_dsc_1_2 - does pcon encoder supports dsc 1.2 + * @pcon_dsc_dpcd: dsc capabilities of the pcon dsc encoder + * + * returns true is pcon encoder is dsc 1.2 else returns false. + */ +bool drm_dp_pcon_enc_is_dsc_1_2(const u8 pcon_dsc_dpcd[dp_pcon_dsc_encoder_cap_size]) +{ + u8 buf; + u8 major_v, minor_v; + + buf = pcon_dsc_dpcd[dp_pcon_dsc_version - dp_pcon_dsc_encoder]; + major_v = (buf & dp_pcon_dsc_major_mask) >> dp_pcon_dsc_major_shift; + minor_v = (buf & dp_pcon_dsc_minor_mask) >> dp_pcon_dsc_minor_shift; + + if (major_v == 1 && minor_v == 2) + return true; + + return false; +} +export_symbol(drm_dp_pcon_enc_is_dsc_1_2); + +/* + * drm_dp_pcon_dsc_max_slices - get max slices supported by pcon dsc encoder + * @pcon_dsc_dpcd: dsc capabilities of the pcon dsc encoder + * + * returns maximum no. of slices supported by the pcon dsc encoder. + */ +int drm_dp_pcon_dsc_max_slices(const u8 pcon_dsc_dpcd[dp_pcon_dsc_encoder_cap_size]) +{ + u8 slice_cap1, slice_cap2; + + slice_cap1 = pcon_dsc_dpcd[dp_pcon_dsc_slice_cap_1 - dp_pcon_dsc_encoder]; + slice_cap2 = pcon_dsc_dpcd[dp_pcon_dsc_slice_cap_2 - dp_pcon_dsc_encoder]; + + if (slice_cap2 & dp_pcon_dsc_24_per_dsc_enc) + return 24; + if (slice_cap2 & dp_pcon_dsc_20_per_dsc_enc) + return 20; + if (slice_cap2 & dp_pcon_dsc_16_per_dsc_enc) + return 16; + if (slice_cap1 & dp_pcon_dsc_12_per_dsc_enc) + return 12; + if (slice_cap1 & dp_pcon_dsc_10_per_dsc_enc) + return 10; + if (slice_cap1 & dp_pcon_dsc_8_per_dsc_enc) + return 8; + if (slice_cap1 & dp_pcon_dsc_6_per_dsc_enc) + return 6; + if (slice_cap1 & dp_pcon_dsc_4_per_dsc_enc) + return 4; + if (slice_cap1 & dp_pcon_dsc_2_per_dsc_enc) + return 2; + if (slice_cap1 & dp_pcon_dsc_1_per_dsc_enc) + return 1; + + return 0; +} +export_symbol(drm_dp_pcon_dsc_max_slices); + +/* + * drm_dp_pcon_dsc_max_slice_width() - get max slice width for pcon dsc encoder + * @pcon_dsc_dpcd: dsc capabilities of the pcon dsc encoder + * + * returns maximum width of the slices in pixel width i.e. no. of pixels x 320. + */ +int drm_dp_pcon_dsc_max_slice_width(const u8 pcon_dsc_dpcd[dp_pcon_dsc_encoder_cap_size]) +{ + u8 buf; + + buf = pcon_dsc_dpcd[dp_pcon_dsc_max_slice_width - dp_pcon_dsc_encoder]; + + return buf * dp_dsc_slice_width_multiplier; +} +export_symbol(drm_dp_pcon_dsc_max_slice_width); + +/* + * drm_dp_pcon_dsc_bpp_incr() - get bits per pixel increment for pcon dsc encoder + * @pcon_dsc_dpcd: dsc capabilities of the pcon dsc encoder + * + * returns the bpp precision supported by the pcon encoder. + */ +int drm_dp_pcon_dsc_bpp_incr(const u8 pcon_dsc_dpcd[dp_pcon_dsc_encoder_cap_size]) +{ + u8 buf; + + buf = pcon_dsc_dpcd[dp_pcon_dsc_bpp_incr - dp_pcon_dsc_encoder]; + + switch (buf & dp_pcon_dsc_bpp_incr_mask) { + case dp_pcon_dsc_one_16th_bpp: + return 16; + case dp_pcon_dsc_one_8th_bpp: + return 8; + case dp_pcon_dsc_one_4th_bpp: + return 4; + case dp_pcon_dsc_one_half_bpp: + return 2; + case dp_pcon_dsc_one_bpp: + return 1; + } + + return 0; +} +export_symbol(drm_dp_pcon_dsc_bpp_incr); + +static +int drm_dp_pcon_configure_dsc_enc(struct drm_dp_aux *aux, u8 pps_buf_config) +{ + u8 buf; + int ret; + + ret = drm_dp_dpcd_readb(aux, dp_protocol_converter_control_2, &buf); + if (ret < 0) + return ret; + + buf |= dp_pcon_enable_dsc_encoder; + + if (pps_buf_config <= dp_pcon_enc_pps_override_en_buffer) { + buf &= ~dp_pcon_encoder_pps_override_mask; + buf |= pps_buf_config << 2; + } + + ret = drm_dp_dpcd_writeb(aux, dp_protocol_converter_control_2, buf); + if (ret < 0) + return ret; + + return 0; +} + +/** + * drm_dp_pcon_pps_default() - let pcon fill the default pps parameters + * for dsc1.2 between pcon & hdmi2.1 sink + * @aux: displayport aux channel + * + * returns 0 on success, else returns negative error code. + */ +int drm_dp_pcon_pps_default(struct drm_dp_aux *aux) +{ + int ret; + + ret = drm_dp_pcon_configure_dsc_enc(aux, dp_pcon_enc_pps_override_disabled); + if (ret < 0) + return ret; + + return 0; +} +export_symbol(drm_dp_pcon_pps_default); + +/** + * drm_dp_pcon_pps_override_buf() - configure pps encoder override buffer for + * hdmi sink + * @aux: displayport aux channel + * @pps_buf: 128 bytes to be written into pps buffer for hdmi sink by pcon. + * + * returns 0 on success, else returns negative error code. + */ +int drm_dp_pcon_pps_override_buf(struct drm_dp_aux *aux, u8 pps_buf[128]) +{ + int ret; + + ret = drm_dp_dpcd_write(aux, dp_pcon_hdmi_pps_override_base, &pps_buf, 128); + if (ret < 0) + return ret; + + ret = drm_dp_pcon_configure_dsc_enc(aux, dp_pcon_enc_pps_override_en_buffer); + if (ret < 0) + return ret; + + return 0; +} +export_symbol(drm_dp_pcon_pps_override_buf); + +/* + * drm_dp_pcon_pps_override_param() - write pps parameters to dsc encoder + * override registers + * @aux: displayport aux channel + * @pps_param: 3 parameters (2 bytes each) : slice width, slice height, + * bits_per_pixel. + * + * returns 0 on success, else returns negative error code. + */ +int drm_dp_pcon_pps_override_param(struct drm_dp_aux *aux, u8 pps_param[6]) +{ + int ret; + + ret = drm_dp_dpcd_write(aux, dp_pcon_hdmi_pps_ovrd_slice_height, &pps_param[0], 2); + if (ret < 0) + return ret; + ret = drm_dp_dpcd_write(aux, dp_pcon_hdmi_pps_ovrd_slice_width, &pps_param[2], 2); + if (ret < 0) + return ret; + ret = drm_dp_dpcd_write(aux, dp_pcon_hdmi_pps_ovrd_bpp, &pps_param[4], 2); + if (ret < 0) + return ret; + + ret = drm_dp_pcon_configure_dsc_enc(aux, dp_pcon_enc_pps_override_en_buffer); + if (ret < 0) + return ret; + + return 0; +} +export_symbol(drm_dp_pcon_pps_override_param); diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h +/* dp-hdmi2.1 pcon dsc encoder support */ +#define dp_pcon_dsc_encoder_cap_size 0xc /* 0x9e - 0x92 */ +#define dp_pcon_dsc_encoder 0x092 +# define dp_pcon_dsc_encoder_supported (1 << 0) +# define dp_pcon_dsc_pps_enc_override (1 << 1) + +/* dp-hdmi2.1 pcon dsc version */ +#define dp_pcon_dsc_version 0x093 +# define dp_pcon_dsc_major_mask (0xf << 0) +# define dp_pcon_dsc_minor_mask (0xf << 4) +# define dp_pcon_dsc_major_shift 0 +# define dp_pcon_dsc_minor_shift 4 + +/* dp-hdmi2.1 pcon dsc rc buffer block size */ +#define dp_pcon_dsc_rc_buf_blk_info 0x094 +# define dp_pcon_dsc_rc_buf_blk_size (0x3 << 0) +# define dp_pcon_dsc_rc_buf_blk_1kb 0 +# define dp_pcon_dsc_rc_buf_blk_4kb 1 +# define dp_pcon_dsc_rc_buf_blk_16kb 2 +# define dp_pcon_dsc_rc_buf_blk_64kb 3 + +/* dp-hdmi2.1 pcon dsc rc buffer size */ +#define dp_pcon_dsc_rc_buf_size 0x095 + +/* dp-hdmi2.1 pcon dsc slice capabilities-1 */ +#define dp_pcon_dsc_slice_cap_1 0x096 +# define dp_pcon_dsc_1_per_dsc_enc (0x1 << 0) +# define dp_pcon_dsc_2_per_dsc_enc (0x1 << 1) +# define dp_pcon_dsc_4_per_dsc_enc (0x1 << 3) +# define dp_pcon_dsc_6_per_dsc_enc (0x1 << 4) +# define dp_pcon_dsc_8_per_dsc_enc (0x1 << 5) +# define dp_pcon_dsc_10_per_dsc_enc (0x1 << 6) +# define dp_pcon_dsc_12_per_dsc_enc (0x1 << 7) + +#define dp_pcon_dsc_buf_bit_depth 0x097 +# define dp_pcon_dsc_bit_depth_mask (0xf << 0) +# define dp_pcon_dsc_depth_9_bits 0 +# define dp_pcon_dsc_depth_10_bits 1 +# define dp_pcon_dsc_depth_11_bits 2 +# define dp_pcon_dsc_depth_12_bits 3 +# define dp_pcon_dsc_depth_13_bits 4 +# define dp_pcon_dsc_depth_14_bits 5 +# define dp_pcon_dsc_depth_15_bits 6 +# define dp_pcon_dsc_depth_16_bits 7 +# define dp_pcon_dsc_depth_8_bits 8 + +#define dp_pcon_dsc_block_prediction 0x098 +# define dp_pcon_dsc_block_pred_support (0x1 << 0) + +#define dp_pcon_dsc_enc_color_fmt_cap 0x099 +# define dp_pcon_dsc_enc_rgb (0x1 << 0) +# define dp_pcon_dsc_enc_yuv444 (0x1 << 1) +# define dp_pcon_dsc_enc_yuv422_s (0x1 << 2) +# define dp_pcon_dsc_enc_yuv422_n (0x1 << 3) +# define dp_pcon_dsc_enc_yuv420_n (0x1 << 4) + +#define dp_pcon_dsc_enc_color_depth_cap 0x09a +# define dp_pcon_dsc_enc_8bpc (0x1 << 1) +# define dp_pcon_dsc_enc_10bpc (0x1 << 2) +# define dp_pcon_dsc_enc_12bpc (0x1 << 3) + +#define dp_pcon_dsc_max_slice_width 0x09b + +/* dp-hdmi2.1 pcon dsc slice capabilities-2 */ +#define dp_pcon_dsc_slice_cap_2 0x09c +# define dp_pcon_dsc_16_per_dsc_enc (0x1 << 0) +# define dp_pcon_dsc_20_per_dsc_enc (0x1 << 1) +# define dp_pcon_dsc_24_per_dsc_enc (0x1 << 2) + +/* dp-hdmi2.1 pcon hdmi tx encoder bits/pixel increment */ +#define dp_pcon_dsc_bpp_incr 0x09e +# define dp_pcon_dsc_bpp_incr_mask (0x7 << 0) +# define dp_pcon_dsc_one_16th_bpp 0 +# define dp_pcon_dsc_one_8th_bpp 1 +# define dp_pcon_dsc_one_4th_bpp 2 +# define dp_pcon_dsc_one_half_bpp 3 +# define dp_pcon_dsc_one_bpp 4 + +# define dp_pcon_enable_dsc_encoder (1 << 1) +# define dp_pcon_encoder_pps_override_mask (0x3 << 2) +# define dp_pcon_enc_pps_override_disabled 0 +# define dp_pcon_enc_pps_override_en_params 1 +# define dp_pcon_enc_pps_override_en_buffer 2 + +/* pcon hdmi config pps override buffer + * valid offsets to be added to base : 0-127 + */ +#define dp_pcon_hdmi_pps_override_base 0x3100 + +/* pcon hdmi config pps override parameter: slice height + * offset-0 8lsbs of the slice height. + * offset-1 8msbs of the slice height. + */ +#define dp_pcon_hdmi_pps_ovrd_slice_height 0x3180 + +/* pcon hdmi config pps override parameter: slice width + * offset-0 8lsbs of the slice width. + * offset-1 8msbs of the slice width. + */ +#define dp_pcon_hdmi_pps_ovrd_slice_width 0x3182 + +/* pcon hdmi config pps override parameter: bits_per_pixel + * offset-0 8lsbs of the bits_per_pixel. + * offset-1 2msbs of the bits_per_pixel. + */ +#define dp_pcon_hdmi_pps_ovrd_bpp 0x3184 + +bool drm_dp_pcon_enc_is_dsc_1_2(const u8 pcon_dsc_dpcd[dp_pcon_dsc_encoder_cap_size]); +int drm_dp_pcon_dsc_max_slices(const u8 pcon_dsc_dpcd[dp_pcon_dsc_encoder_cap_size]); +int drm_dp_pcon_dsc_max_slice_width(const u8 pcon_dsc_dpcd[dp_pcon_dsc_encoder_cap_size]); +int drm_dp_pcon_dsc_bpp_incr(const u8 pcon_dsc_dpcd[dp_pcon_dsc_encoder_cap_size]); +int drm_dp_pcon_pps_default(struct drm_dp_aux *aux); +int drm_dp_pcon_pps_override_buf(struct drm_dp_aux *aux, u8 pps_buf[128]); +int drm_dp_pcon_pps_override_param(struct drm_dp_aux *aux, u8 pps_param[6]);
|
Graphics
|
e2e16da398d9149ede0162a55f44537582aed2e7
|
ankit nautiyal
|
drivers
|
gpu
|
drm
|
drm/dp_helper: add helpers to configure pcons rgb-ycbcr conversion
|
dp specification for dp2.0 to hdmi2.1 pcon specifies support for conversion of colorspace from rgb to ycbcr. https://groups.vesa.org/wg/dp/document/previewpdf/15651
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add support for dp-hdmi2.1 pcon
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['intel ']
|
['h', 'c']
| 2
| 79
| 1
|
-fixed bug in the check condition in a drm_helper as reported by -modified the color-conversion cap helper function, to accommodate -added spec details for the new cap for color conversion. (uma shankar) --- diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c --- a/drivers/gpu/drm/drm_dp_helper.c +++ b/drivers/gpu/drm/drm_dp_helper.c +/** + * drm_dp_downstream_rgb_to_ycbcr_conversion() - determine downstream facing port + * rgb->ycbcr conversion capability + * @dpcd: displayport configuration data + * @port_cap: downstream facing port capabilities + * @colorspc: colorspace for which conversion cap is sought + * + * returns: whether the downstream facing port can convert rgb->ycbcr for a given + * colorspace. + */ +bool drm_dp_downstream_rgb_to_ycbcr_conversion(const u8 dpcd[dp_receiver_cap_size], + const u8 port_cap[4], + u8 color_spc) +{ + if (!drm_dp_is_branch(dpcd)) + return false; + + if (dpcd[dp_dpcd_rev] < 0x13) + return false; + + switch (port_cap[0] & dp_ds_port_type_mask) { + case dp_ds_port_type_hdmi: + if ((dpcd[dp_downstreamport_present] & dp_detailed_cap_info_available) == 0) + return false; + + return port_cap[3] & color_spc; + default: + return false; + } +} +export_symbol(drm_dp_downstream_rgb_to_ycbcr_conversion); + + +/* + * drm_dp_pcon_convert_rgb_to_ycbcr() - configure the pcon to convert rgb to ycbcr + * @aux: displayport aux channel + * @color_spc: color-space/s for which conversion is to be enabled, 0 for disable. + * + * returns 0 on success, else returns negative error code. + */ +int drm_dp_pcon_convert_rgb_to_ycbcr(struct drm_dp_aux *aux, u8 color_spc) +{ + int ret; + u8 buf; + + ret = drm_dp_dpcd_readb(aux, dp_protocol_converter_control_2, &buf); + if (ret < 0) + return ret; + + if (color_spc & dp_conversion_rgb_ycbcr_mask) + buf |= (color_spc & dp_conversion_rgb_ycbcr_mask); + else + buf &= ~dp_conversion_rgb_ycbcr_mask; + + ret = drm_dp_dpcd_writeb(aux, dp_protocol_converter_control_2, buf); + if (ret < 0) + return ret; + + return 0; +} +export_symbol(drm_dp_pcon_convert_rgb_to_ycbcr); diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h +/* + * vesa dp-to-hdmi pcon specification adds caps for colorspace + * conversion in dfp cap dpcd 83h. sec6.1 table-3. + * based on the available support the source can enable + * color conversion by writing into protocol_coverter_control_2 + * dpcd 3052h. + */ +# define dp_ds_hdmi_bt601_rgb_ycbcr_conv (1 << 5) +# define dp_ds_hdmi_bt709_rgb_ycbcr_conv (1 << 6) +# define dp_ds_hdmi_bt2020_rgb_ycbcr_conv (1 << 7) + - +# define dp_conversion_rgb_ycbcr_mask (7 << 4) +# define dp_conversion_bt601_rgb_ycbcr_enable (1 << 4) +# define dp_conversion_bt709_rgb_ycbcr_enable (1 << 5) +# define dp_conversion_bt2020_rgb_ycbcr_enable (1 << 6) +bool drm_dp_downstream_rgb_to_ycbcr_conversion(const u8 dpcd[dp_receiver_cap_size], + const u8 port_cap[4], u8 color_spc); +int drm_dp_pcon_convert_rgb_to_ycbcr(struct drm_dp_aux *aux, u8 color_spc);
|
Graphics
|
07c9b8634fb6c5c3fd4cdf363bdf472a365789d0
|
ankit nautiyal
|
drivers
|
gpu
|
drm
|
drm/i915: capture max frl rate for pcon in dfp cap structure
|
hdmi2.1 pcon advertises max frl bandwidth supported by the pcon.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add support for dp-hdmi2.1 pcon
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['intel ']
|
['h', 'c']
| 2
| 29
| 2
|
-tweaked the comparison of target bw and pcon frl bw to avoid roundup errors. -minor modification of field names and comments. --- diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h + int pcon_max_frl_bw; diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c + /* if pcon supports frl mode, check frl bandwidth constraints */ + if (intel_dp->dfp.pcon_max_frl_bw) { + int target_bw; + int max_frl_bw; + int bpp = intel_dp_mode_min_output_bpp(&connector->base, mode); + + target_bw = bpp * target_clock; + + max_frl_bw = intel_dp->dfp.pcon_max_frl_bw; + + /* converting bw from gbps to kbps*/ + max_frl_bw = max_frl_bw * 1000000; + + if (target_bw > max_frl_bw) + return mode_clock_high; + + return mode_ok; + } + + intel_dp->dfp.pcon_max_frl_bw = + drm_dp_get_pcon_max_frl_bw(intel_dp->dpcd, + intel_dp->downstream_ports); + - "[connector:%d:%s] dfp max bpc %d, max dotclock %d, tmds clock %d-%d ", + "[connector:%d:%s] dfp max bpc %d, max dotclock %d, tmds clock %d-%d, pcon max frl bw %dgbps ", - intel_dp->dfp.max_tmds_clock); + intel_dp->dfp.max_tmds_clock, + intel_dp->dfp.pcon_max_frl_bw); + intel_dp->dfp.pcon_max_frl_bw = 0; +
|
Graphics
|
2f78347e36348ea95e9ac403a9ab4d5eb784087e
|
ankit nautiyal
|
drivers
|
gpu
|
display, drm, i915
|
drm/i915: add support for starting frl training for hdmi2.1 via pcon
|
this patch adds functions to start frl training for an hdmi2.1 sink, connected via a pcon as a dp branch device. this patch also adds a new structure for storing frl training related data, when frl training is completed.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add support for dp-hdmi2.1 pcon
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['intel ']
|
['h', 'c']
| 3
| 160
| 0
|
-renamed couple of variables for better clarity -tweaked the macros used for correct semantics for true/false -fixed other styling issues. --- diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h +struct intel_dp_pcon_frl { + bool is_trained; + int trained_rate_gbps; +}; + + + struct intel_dp_pcon_frl frl; diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c + intel_dp->frl.is_trained = false; + intel_dp->frl.trained_rate_gbps = 0; +static int intel_dp_pcon_get_frl_mask(u8 frl_bw_mask) +{ + int bw_gbps[] = {9, 18, 24, 32, 40, 48}; + int i; + + for (i = array_size(bw_gbps) - 1; i >= 0; i--) { + if (frl_bw_mask & (1 << i)) + return bw_gbps[i]; + } + return 0; +} + +static int intel_dp_pcon_set_frl_mask(int max_frl) +{ + switch (max_frl) { + case 48: + return dp_pcon_frl_bw_mask_48gbps; + case 40: + return dp_pcon_frl_bw_mask_40gbps; + case 32: + return dp_pcon_frl_bw_mask_32gbps; + case 24: + return dp_pcon_frl_bw_mask_24gbps; + case 18: + return dp_pcon_frl_bw_mask_18gbps; + case 9: + return dp_pcon_frl_bw_mask_9gbps; + } + + return 0; +} + +static int intel_dp_hdmi_sink_max_frl(struct intel_dp *intel_dp) +{ + struct intel_connector *intel_connector = intel_dp->attached_connector; + struct drm_connector *connector = &intel_connector->base; + + return (connector->display_info.hdmi.max_frl_rate_per_lane * + connector->display_info.hdmi.max_lanes); +} + +static int intel_dp_pcon_start_frl_training(struct intel_dp *intel_dp) +{ +#define pcon_extended_train_mode (1 > 0) +#define pcon_concurrent_mode (1 > 0) +#define pcon_sequential_mode !pcon_concurrent_mode +#define pcon_normal_train_mode !pcon_extended_train_mode +#define timeout_frl_ready_ms 500 +#define timeout_hdmi_link_active_ms 1000 + + struct drm_i915_private *i915 = dp_to_i915(intel_dp); + int max_frl_bw, max_pcon_frl_bw, max_edid_frl_bw, ret; + u8 max_frl_bw_mask = 0, frl_trained_mask; + bool is_active; + + ret = drm_dp_pcon_reset_frl_config(&intel_dp->aux); + if (ret < 0) + return ret; + + max_pcon_frl_bw = intel_dp->dfp.pcon_max_frl_bw; + drm_dbg(&i915->drm, "pcon max rate = %d gbps ", max_pcon_frl_bw); + + max_edid_frl_bw = intel_dp_hdmi_sink_max_frl(intel_dp); + drm_dbg(&i915->drm, "sink max rate from edid = %d gbps ", max_edid_frl_bw); + + max_frl_bw = min(max_edid_frl_bw, max_pcon_frl_bw); + + if (max_frl_bw <= 0) + return -einval; + + ret = drm_dp_pcon_frl_prepare(&intel_dp->aux, false); + if (ret < 0) + return ret; + /* wait for pcon to be frl ready */ + wait_for(is_active = drm_dp_pcon_is_frl_ready(&intel_dp->aux) == true, timeout_frl_ready_ms); + + if (!is_active) + return -etimedout; + + max_frl_bw_mask = intel_dp_pcon_set_frl_mask(max_frl_bw); + ret = drm_dp_pcon_frl_configure_1(&intel_dp->aux, max_frl_bw, pcon_sequential_mode); + if (ret < 0) + return ret; + ret = drm_dp_pcon_frl_configure_2(&intel_dp->aux, max_frl_bw_mask, pcon_normal_train_mode); + if (ret < 0) + return ret; + ret = drm_dp_pcon_frl_enable(&intel_dp->aux); + if (ret < 0) + return ret; + /* + * wait for frl to be completed + * check if the hdmi link is up and active. + */ + wait_for(is_active = drm_dp_pcon_hdmi_link_active(&intel_dp->aux) == true, timeout_hdmi_link_active_ms); + + if (!is_active) + return -etimedout; + + /* verify hdmi link configuration shows frl mode */ + if (drm_dp_pcon_hdmi_link_mode(&intel_dp->aux, &frl_trained_mask) != + dp_pcon_hdmi_mode_frl) { + drm_dbg(&i915->drm, "hdmi couldn't be trained in frl mode "); + return -einval; + } + drm_dbg(&i915->drm, "max_frl_mask = %u, frl_trained_mask = %u ", max_frl_bw_mask, frl_trained_mask); + + intel_dp->frl.trained_rate_gbps = intel_dp_pcon_get_frl_mask(frl_trained_mask); + intel_dp->frl.is_trained = true; + drm_dbg(&i915->drm, "frl trained with : %d gbps ", intel_dp->frl.trained_rate_gbps); + + return 0; +} + +static bool intel_dp_is_hdmi_2_1_sink(struct intel_dp *intel_dp) +{ + if (drm_dp_is_branch(intel_dp->dpcd) && + intel_dp->has_hdmi_sink && + intel_dp_hdmi_sink_max_frl(intel_dp) > 0) + return true; + + return false; +} + +void intel_dp_check_frl_training(struct intel_dp *intel_dp) +{ + struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); + + /* always go for frl training if supported */ + if (!intel_dp_is_hdmi_2_1_sink(intel_dp) || + intel_dp->frl.is_trained) + return; + + if (intel_dp_pcon_start_frl_training(intel_dp) < 0) { + int ret, mode; + + drm_dbg(&dev_priv->drm, "couldnt set frl mode, continuing with tmds mode "); + ret = drm_dp_pcon_reset_frl_config(&intel_dp->aux); + mode = drm_dp_pcon_hdmi_link_mode(&intel_dp->aux, null); + + if (ret < 0 || mode != dp_pcon_hdmi_mode_tmds) + drm_dbg(&dev_priv->drm, "issue with pcon, cannot set tmds mode "); + } else { + drm_dbg(&dev_priv->drm, "frl training completed "); + } +} + + intel_dp->frl.is_trained = false; + intel_dp->frl.trained_rate_gbps = 0; + diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h +void intel_dp_check_frl_training(struct intel_dp *intel_dp); +
|
Graphics
|
ced42f2df5fd8621c896faeafe7ecc0ea8b2ea81
|
ankit nautiyal
|
drivers
|
gpu
|
display, drm, i915
|
drm/i915: check for frl training before dp link training
|
this patch calls functions to check frl training requirements for an hdmi2.1 sink, when connected through pcon. the call is made before the dp link training. in case frl is not required or failure during frl training, the tmds mode is selected for the pcon.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add support for dp-hdmi2.1 pcon
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['intel ']
|
['c']
| 2
| 4
| 0
|
--- diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c + intel_dp_check_frl_training(intel_dp); + diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c + intel_dp_check_frl_training(intel_dp); + intel_dp_check_frl_training(intel_dp);
|
Graphics
|
4f3dd47acbed7dd50f9add02b204db14e4af967f
|
ankit nautiyal
|
drivers
|
gpu
|
display, drm, i915
|
drm/i915: add support for enabling link status and recovery
|
in this patch enables support for detecting link failures between pcon and hdmi sink in i915 driver. hdmi link loss indication to upstream dp source is indicated via irq_hpd. this is followed by reading of hdmi link configuration status (hdmi_tx_link_active_status). if the pcon hdmi 2.1 link status is off; reinitiate frl link training to recover. also, report hdmi frl link error count range for each individual frl active lane is indicated by downstream_hdmi_error_status_ln registers.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add support for dp-hdmi2.1 pcon
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['intel ']
|
['c']
| 1
| 50
| 3
|
--- diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c +static void +intel_dp_handle_hdmi_link_status_change(struct intel_dp *intel_dp) +{ + bool is_active; + u8 buf = 0; + + is_active = drm_dp_pcon_hdmi_link_active(&intel_dp->aux); + if (intel_dp->frl.is_trained && !is_active) { + if (drm_dp_dpcd_readb(&intel_dp->aux, dp_pcon_hdmi_link_config_1, &buf) < 0) + return; + + buf &= ~dp_pcon_enable_hdmi_link; + if (drm_dp_dpcd_writeb(&intel_dp->aux, dp_pcon_hdmi_link_config_1, buf) < 0) + return; + + drm_dp_pcon_hdmi_frl_link_error_count(&intel_dp->aux, &intel_dp->attached_connector->base); + + /* restart frl training or fall back to tmds mode */ + intel_dp_check_frl_training(intel_dp); + } +} + -static void intel_dp_check_service_irq(struct intel_dp *intel_dp) +static void intel_dp_check_device_service_irq(struct intel_dp *intel_dp) +static void intel_dp_check_link_service_irq(struct intel_dp *intel_dp) +{ + struct drm_i915_private *i915 = dp_to_i915(intel_dp); + u8 val; + + if (intel_dp->dpcd[dp_dpcd_rev] < 0x11) + return; + + if (drm_dp_dpcd_readb(&intel_dp->aux, + dp_link_service_irq_vector_esi0, &val) != 1 || !val) { + drm_dbg_kms(&i915->drm, "error in reading link service irq vector "); + return; + } + + if (drm_dp_dpcd_writeb(&intel_dp->aux, + dp_link_service_irq_vector_esi0, val) != 1) { + drm_dbg_kms(&i915->drm, "error in writing link service irq vector "); + return; + } + + if (val & hdmi_link_status_changed) + intel_dp_handle_hdmi_link_status_change(intel_dp); +} + - intel_dp_check_service_irq(intel_dp); + intel_dp_check_device_service_irq(intel_dp); + intel_dp_check_link_service_irq(intel_dp); - intel_dp_check_service_irq(intel_dp); + intel_dp_check_device_service_irq(intel_dp);
|
Graphics
|
9488a030ac91447ea186ca3b7ec5c72ff03bc202
|
swati sharma
|
drivers
|
gpu
|
display, drm, i915
|
drm/i915: read dsc capabilities of the hdmi2.1 pcon encoder
|
this patch adds support to read and store the dsc capabilities of the hdmi2.1 pcon encoder. it also adds a new field to store these caps, the caps are read during dfp update and can later be used to get the pps parameters for pcon-hdmi2.1 sink pair. which inturn will be used to take a call to override the existing pps-metadata, by either writing the entire new pps metadata, or by writing only the pps override parameters.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add support for dp-hdmi2.1 pcon
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['intel ']
|
['h', 'c']
| 2
| 21
| 0
|
--- diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h + u8 pcon_dsc_dpcd[dp_pcon_dsc_encoder_cap_size]; diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c +static void intel_dp_get_pcon_dsc_cap(struct intel_dp *intel_dp) +{ + struct drm_i915_private *i915 = dp_to_i915(intel_dp); + + /* clear the cached register set to avoid using stale values */ + + memset(intel_dp->pcon_dsc_dpcd, 0, sizeof(intel_dp->pcon_dsc_dpcd)); + + if (drm_dp_dpcd_read(&intel_dp->aux, dp_pcon_dsc_encoder, + intel_dp->pcon_dsc_dpcd, + sizeof(intel_dp->pcon_dsc_dpcd)) < 0) + drm_err(&i915->drm, "failed to read dpcd register 0x%x ", + dp_pcon_dsc_encoder); + + drm_dbg_kms(&i915->drm, "pcon encoder dsc dpcd: %*ph ", + (int)sizeof(intel_dp->pcon_dsc_dpcd), intel_dp->pcon_dsc_dpcd); +} + + + intel_dp_get_pcon_dsc_cap(intel_dp);
|
Graphics
|
b9d96dacdc3d983eae234b52401edb56dbceb764
|
ankit nautiyal
|
drivers
|
gpu
|
display, drm, i915
|
drm/i915: add helper functions for calculating dsc parameters for hdmi2.1
|
the dp-hdmi2.1 pcon spec provides way for a source to set pps parameters: slice height, slice width and bits_per_pixel, based on the hdmi2.1 sink capabilities. the dsc encoder of the pcon will respect these parameters, while preparing the 128 byte pps.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add support for dp-hdmi2.1 pcon
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['intel ']
|
['h', 'c']
| 2
| 240
| 0
|
-added documentation for functions -fixed typos and errors --- diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c --- a/drivers/gpu/drm/i915/display/intel_hdmi.c +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c + +/* + * intel_hdmi_dsc_get_slice_height - get the dsc slice_height + * @vactive: vactive of a display mode + * + * @return: appropriate dsc slice height for a given mode. + */ +int intel_hdmi_dsc_get_slice_height(int vactive) +{ + int slice_height; + + /* + * slice height determination : hdmi2.1 section 7.7.5.2 + * select smallest slice height >=96, that results in a valid pps and + * requires minimum padding lines required for final slice. + * + * assumption : vactive is even. + */ + for (slice_height = 96; slice_height <= vactive; slice_height += 2) + if (vactive % slice_height == 0) + return slice_height; + + return 0; +} + +/* + * intel_hdmi_dsc_get_num_slices - get no. of dsc slices based on dsc encoder + * and dsc decoder capabilities + * + * @crtc_state: intel crtc_state + * @src_max_slices: maximum slices supported by the dsc encoder + * @src_max_slice_width: maximum slice width supported by dsc encoder + * @hdmi_max_slices: maximum slices supported by sink dsc decoder + * @hdmi_throughput: maximum clock per slice (mhz) supported by hdmi sink + * + * @return: num of dsc slices that can be supported by the dsc encoder + * and decoder. + */ +int +intel_hdmi_dsc_get_num_slices(const struct intel_crtc_state *crtc_state, + int src_max_slices, int src_max_slice_width, + int hdmi_max_slices, int hdmi_throughput) +{ +/* pixel rates in kpixels/sec */ +#define hdmi_dsc_peak_pixel_rate 2720000 +/* + * rates at which the source and sink are required to process pixels in each + * slice, can be two levels: either atleast 340000khz or atleast 40000khz. + */ +#define hdmi_dsc_max_enc_throughput_0 340000 +#define hdmi_dsc_max_enc_throughput_1 400000 + +/* spec limits the slice width to 2720 pixels */ +#define max_hdmi_slice_width 2720 + int kslice_adjust; + int adjusted_clk_khz; + int min_slices; + int target_slices; + int max_throughput; /* max clock freq. in khz per slice */ + int max_slice_width; + int slice_width; + int pixel_clock = crtc_state->hw.adjusted_mode.crtc_clock; + + if (!hdmi_throughput) + return 0; + + /* + * slice width determination : hdmi2.1 section 7.7.5.1 + * kslice_adjust factor for 4:2:0, and 4:2:2 formats is 0.5, where as + * for 4:4:4 is 1.0. multiplying these factors by 10 and later + * dividing adjusted clock value by 10. + */ + if (crtc_state->output_format == intel_output_format_ycbcr444 || + crtc_state->output_format == intel_output_format_rgb) + kslice_adjust = 10; + else + kslice_adjust = 5; + + /* + * as per spec, the rate at which the source and the sink process + * the pixels per slice are at two levels: atleast 340mhz or 400mhz. + * this depends upon the pixel clock rate and output formats + * (kslice adjust). + * if pixel clock * kslice adjust >= 2720mhz slices can be processed + * at max 340mhz, otherwise they can be processed at max 400mhz. + */ + + adjusted_clk_khz = div_round_up(kslice_adjust * pixel_clock, 10); + + if (adjusted_clk_khz <= hdmi_dsc_peak_pixel_rate) + max_throughput = hdmi_dsc_max_enc_throughput_0; + else + max_throughput = hdmi_dsc_max_enc_throughput_1; + + /* + * taking into account the sink's capability for maximum + * clock per slice (in mhz) as read from hf-vsdb. + */ + max_throughput = min(max_throughput, hdmi_throughput * 1000); + + min_slices = div_round_up(adjusted_clk_khz, max_throughput); + max_slice_width = min(max_hdmi_slice_width, src_max_slice_width); + + /* + * keep on increasing the num of slices/line, starting from min_slices + * per line till we get such a number, for which the slice_width is + * just less than max_slice_width. the slices/line selected should be + * less than or equal to the max horizontal slices that the combination + * of pcon encoder and hdmi decoder can support. + */ + slice_width = max_slice_width; + + do { + if (min_slices <= 1 && src_max_slices >= 1 && hdmi_max_slices >= 1) + target_slices = 1; + else if (min_slices <= 2 && src_max_slices >= 2 && hdmi_max_slices >= 2) + target_slices = 2; + else if (min_slices <= 4 && src_max_slices >= 4 && hdmi_max_slices >= 4) + target_slices = 4; + else if (min_slices <= 8 && src_max_slices >= 8 && hdmi_max_slices >= 8) + target_slices = 8; + else if (min_slices <= 12 && src_max_slices >= 12 && hdmi_max_slices >= 12) + target_slices = 12; + else if (min_slices <= 16 && src_max_slices >= 16 && hdmi_max_slices >= 16) + target_slices = 16; + else + return 0; + + slice_width = div_round_up(crtc_state->hw.adjusted_mode.hdisplay, target_slices); + if (slice_width >= max_slice_width) + min_slices = target_slices + 1; + } while (slice_width >= max_slice_width); + + return target_slices; +} + +/* + * intel_hdmi_dsc_get_bpp - get the appropriate compressed bits_per_pixel based on + * source and sink capabilities. + * + * @src_fraction_bpp: fractional bpp supported by the source + * @slice_width: dsc slice width supported by the source and sink + * @num_slices: num of slices supported by the source and sink + * @output_format: video output format + * @hdmi_all_bpp: sink supports decoding of 1/16th bpp setting + * @hdmi_max_chunk_bytes: max bytes in a line of chunks supported by sink + * + * @return: compressed bits_per_pixel in step of 1/16 of bits_per_pixel + */ +int +intel_hdmi_dsc_get_bpp(int src_fractional_bpp, int slice_width, int num_slices, + int output_format, bool hdmi_all_bpp, + int hdmi_max_chunk_bytes) +{ + int max_dsc_bpp, min_dsc_bpp; + int target_bytes; + bool bpp_found = false; + int bpp_decrement_x16; + int bpp_target; + int bpp_target_x16; + + /* + * get min bpp and max bpp as per table 7.23, in hdmi2.1 spec + * start with the max bpp and keep on decrementing with + * fractional bpp, if supported by pcon dsc encoder + * + * for each bpp we check if no of bytes can be supported by hdmi sink + */ + + /* assuming: bpc as 8*/ + if (output_format == intel_output_format_ycbcr420) { + min_dsc_bpp = 6; + max_dsc_bpp = 3 * 4; /* 3*bpc/2 */ + } else if (output_format == intel_output_format_ycbcr444 || + output_format == intel_output_format_rgb) { + min_dsc_bpp = 8; + max_dsc_bpp = 3 * 8; /* 3*bpc */ + } else { + /* assuming 4:2:2 encoding */ + min_dsc_bpp = 7; + max_dsc_bpp = 2 * 8; /* 2*bpc */ + } + + /* + * taking into account if all dsc_all_bpp supported by hdmi2.1 sink + * section 7.7.34 : source shall not enable compressed video + * transport with bpp_target settings above 12 bpp unless + * dsc_all_bpp is set to 1. + */ + if (!hdmi_all_bpp) + max_dsc_bpp = min(max_dsc_bpp, 12); + + /* + * the sink has a limit of compressed data in bytes for a scanline, + * as described in max_chunk_bytes field in hfvsdb block of edid. + * the no. of bytes depend on the target bits per pixel that the + * source configures. so we start with the max_bpp and calculate + * the target_chunk_bytes. we keep on decrementing the target_bpp, + * till we get the target_chunk_bytes just less than what the sink's + * max_chunk_bytes, or else till we reach the min_dsc_bpp. + * + * the decrement is according to the fractional support from pcon dsc + * encoder. for fractional bpp we use bpp_target as a multiple of 16. + * + * bpp_target_x16 = bpp_target * 16 + * so we need to decrement by {1, 2, 4, 8, 16} for fractional bpps + * {1/16, 1/8, 1/4, 1/2, 1} respectively. + */ + + bpp_target = max_dsc_bpp; + + /* src does not support fractional bpp implies decrement by 16 for bppx16 */ + if (!src_fractional_bpp) + src_fractional_bpp = 1; + bpp_decrement_x16 = div_round_up(16, src_fractional_bpp); + bpp_target_x16 = (bpp_target * 16) - bpp_decrement_x16; + + while (bpp_target_x16 > (min_dsc_bpp * 16)) { + int bpp; + + bpp = div_round_up(bpp_target_x16, 16); + target_bytes = div_round_up((num_slices * slice_width * bpp), 8); + if (target_bytes <= hdmi_max_chunk_bytes) { + bpp_found = true; + break; + } + bpp_target_x16 -= bpp_decrement_x16; + } + if (bpp_found) + return bpp_target_x16; + + return 0; +} diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.h b/drivers/gpu/drm/i915/display/intel_hdmi.h --- a/drivers/gpu/drm/i915/display/intel_hdmi.h +++ b/drivers/gpu/drm/i915/display/intel_hdmi.h +int intel_hdmi_dsc_get_bpp(int src_fractional_bpp, int slice_width, + int num_slices, int output_format, bool hdmi_all_bpp, + int hdmi_max_chunk_bytes); +int intel_hdmi_dsc_get_num_slices(const struct intel_crtc_state *crtc_state, + int src_max_slices, int src_max_slice_width, + int hdmi_max_slices, int hdmi_throughput); +int intel_hdmi_dsc_get_slice_height(int vactive);
|
Graphics
|
6e6cb758e0356032599fb5155e9261be72e629df
|
ankit nautiyal
|
drivers
|
gpu
|
display, drm, i915
|
drm/i915/display: configure pcon for dsc1.1 to dsc1.2 encoding
|
when a source supporting dsc1.1 is connected to dsc1.2 hdmi2.1 sink via dp hdmi2.1 pcon, the pcon can be configured to decode the dsc1.1 compressed stream and encode to dsc1.2. it then sends the dsc1.2 compressed stream to the hdmi2.1 sink.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add support for dp-hdmi2.1 pcon
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['intel ']
|
['h', 'c']
| 3
| 117
| 2
|
-fixed the error in packing pps parameter values -added check for pcon in the pcon related function -appended display in commit message --- diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c + intel_dp_pcon_dsc_configure(intel_dp, crtc_state); diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c + int max_frl_rate; + int max_lanes, rate_per_lane; + int max_dsc_lanes, dsc_rate_per_lane; - return (connector->display_info.hdmi.max_frl_rate_per_lane * - connector->display_info.hdmi.max_lanes); + max_lanes = connector->display_info.hdmi.max_lanes; + rate_per_lane = connector->display_info.hdmi.max_frl_rate_per_lane; + max_frl_rate = max_lanes * rate_per_lane; + + if (connector->display_info.hdmi.dsc_cap.v_1p2) { + max_dsc_lanes = connector->display_info.hdmi.dsc_cap.max_lanes; + dsc_rate_per_lane = connector->display_info.hdmi.dsc_cap.max_frl_rate_per_lane; + if (max_dsc_lanes && dsc_rate_per_lane) + max_frl_rate = min(max_frl_rate, max_dsc_lanes * dsc_rate_per_lane); + } + + return max_frl_rate; +static int +intel_dp_pcon_dsc_enc_slice_height(const struct intel_crtc_state *crtc_state) +{ + int vactive = crtc_state->hw.adjusted_mode.vdisplay; + + return intel_hdmi_dsc_get_slice_height(vactive); +} + +static int +intel_dp_pcon_dsc_enc_slices(struct intel_dp *intel_dp, + const struct intel_crtc_state *crtc_state) +{ + struct intel_connector *intel_connector = intel_dp->attached_connector; + struct drm_connector *connector = &intel_connector->base; + int hdmi_throughput = connector->display_info.hdmi.dsc_cap.clk_per_slice; + int hdmi_max_slices = connector->display_info.hdmi.dsc_cap.max_slices; + int pcon_max_slices = drm_dp_pcon_dsc_max_slices(intel_dp->pcon_dsc_dpcd); + int pcon_max_slice_width = drm_dp_pcon_dsc_max_slice_width(intel_dp->pcon_dsc_dpcd); + + return intel_hdmi_dsc_get_num_slices(crtc_state, pcon_max_slices, + pcon_max_slice_width, + hdmi_max_slices, hdmi_throughput); +} + +static int +intel_dp_pcon_dsc_enc_bpp(struct intel_dp *intel_dp, + const struct intel_crtc_state *crtc_state, + int num_slices, int slice_width) +{ + struct intel_connector *intel_connector = intel_dp->attached_connector; + struct drm_connector *connector = &intel_connector->base; + int output_format = crtc_state->output_format; + bool hdmi_all_bpp = connector->display_info.hdmi.dsc_cap.all_bpp; + int pcon_fractional_bpp = drm_dp_pcon_dsc_bpp_incr(intel_dp->pcon_dsc_dpcd); + int hdmi_max_chunk_bytes = + connector->display_info.hdmi.dsc_cap.total_chunk_kbytes * 1024; + + return intel_hdmi_dsc_get_bpp(pcon_fractional_bpp, slice_width, + num_slices, output_format, hdmi_all_bpp, + hdmi_max_chunk_bytes); +} + +void +intel_dp_pcon_dsc_configure(struct intel_dp *intel_dp, + const struct intel_crtc_state *crtc_state) +{ + u8 pps_param[6]; + int slice_height; + int slice_width; + int num_slices; + int bits_per_pixel; + int ret; + struct intel_connector *intel_connector = intel_dp->attached_connector; + struct drm_i915_private *i915 = dp_to_i915(intel_dp); + struct drm_connector *connector; + bool hdmi_is_dsc_1_2; + + if (!intel_dp_is_hdmi_2_1_sink(intel_dp)) + return; + + if (!intel_connector) + return; + connector = &intel_connector->base; + hdmi_is_dsc_1_2 = connector->display_info.hdmi.dsc_cap.v_1p2; + + if (!drm_dp_pcon_enc_is_dsc_1_2(intel_dp->pcon_dsc_dpcd) || + !hdmi_is_dsc_1_2) + return; + + slice_height = intel_dp_pcon_dsc_enc_slice_height(crtc_state); + if (!slice_height) + return; + + num_slices = intel_dp_pcon_dsc_enc_slices(intel_dp, crtc_state); + if (!num_slices) + return; + + slice_width = div_round_up(crtc_state->hw.adjusted_mode.hdisplay, + num_slices); + + bits_per_pixel = intel_dp_pcon_dsc_enc_bpp(intel_dp, crtc_state, + num_slices, slice_width); + if (!bits_per_pixel) + return; + + pps_param[0] = slice_height & 0xff; + pps_param[1] = slice_height >> 8; + pps_param[2] = slice_width & 0xff; + pps_param[3] = slice_width >> 8; + pps_param[4] = bits_per_pixel & 0xff; + pps_param[5] = (bits_per_pixel >> 8) & 0x3; + + ret = drm_dp_pcon_pps_override_param(&intel_dp->aux, pps_param); + if (ret < 0) + drm_dbg_kms(&i915->drm, "failed to set pcon dsc "); +} + + intel_dp_pcon_dsc_configure(intel_dp, pipe_config); + intel_dp_pcon_dsc_configure(intel_dp, crtc_state); diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h +void intel_dp_pcon_dsc_configure(struct intel_dp *intel_dp, + const struct intel_crtc_state *crtc_state);
|
Graphics
|
10fec80b48c5bf5abb45d142b9aca59ec174e3fd
|
ankit nautiyal
|
drivers
|
gpu
|
display, drm, i915
|
drm/i915/display: let pcon convert from rgb to ycbcr if it can
|
if pcon has capability to convert rgb->ycbcr colorspace and also to 444->420 downsampling then for any yuv420 only mode, we can let the pcon do all the conversion. if the pcon supports rgb->ycbcr conversion for all bt2020, bt709, bt601, choose the one that is selected by userspace via connector colorspace property, otherwise default to bt601.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add support for dp-hdmi2.1 pcon
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['intel ']
|
['h', 'c']
| 4
| 65
| 14
|
-fixed bug in determining the colorspace for rgb->ycbcr conversion. -fixed minor formatting issues --- diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c + intel_dp_configure_protocol_converter(intel_dp, crtc_state); - intel_dp_configure_protocol_converter(intel_dp); + intel_dp_configure_protocol_converter(intel_dp, crtc_state); diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h + bool rgb_to_ycbcr; diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c + if (intel_dp->dfp.rgb_to_ycbcr && + intel_dp->dfp.ycbcr_444_to_420) + return intel_output_format_rgb; + -void intel_dp_configure_protocol_converter(struct intel_dp *intel_dp) +void intel_dp_configure_protocol_converter(struct intel_dp *intel_dp, + const struct intel_crtc_state *crtc_state) + if (intel_dp->dfp.rgb_to_ycbcr) { + bool bt2020, bt709; - if (drm_dp_dpcd_writeb(&intel_dp->aux, - dp_protocol_converter_control_2, tmp) <= 0) + /* + * fixme: currently if userspace selects bt2020 or bt709, but pcon supports only + * rgb->ycbcr for bt601 colorspace, we go ahead with bt601, as default. + * + */ + tmp = dp_conversion_bt601_rgb_ycbcr_enable; + + bt2020 = drm_dp_downstream_rgb_to_ycbcr_conversion(intel_dp->dpcd, + intel_dp->downstream_ports, + dp_ds_hdmi_bt2020_rgb_ycbcr_conv); + bt709 = drm_dp_downstream_rgb_to_ycbcr_conversion(intel_dp->dpcd, + intel_dp->downstream_ports, + dp_ds_hdmi_bt709_rgb_ycbcr_conv); + switch (crtc_state->infoframes.vsc.colorimetry) { + case dp_colorimetry_bt2020_rgb: + case dp_colorimetry_bt2020_ycc: + if (bt2020) + tmp = dp_conversion_bt2020_rgb_ycbcr_enable; + break; + case dp_colorimetry_bt709_ycc: + case dp_colorimetry_xvycc_709: + if (bt709) + tmp = dp_conversion_bt709_rgb_ycbcr_enable; + break; + default: + break; + } + } + + if (drm_dp_pcon_convert_rgb_to_ycbcr(&intel_dp->aux, tmp) < 0) - "failed to set protocol converter ycbcr 4:2:2 conversion mode to %s ", - enableddisabled(false)); + "failed to set protocol converter rgb->ycbcr conversion mode to %s ", + enableddisabled(tmp ? true : false)); - intel_dp_configure_protocol_converter(intel_dp); + intel_dp_configure_protocol_converter(intel_dp, pipe_config); - bool is_branch, ycbcr_420_passthrough, ycbcr_444_to_420; + bool is_branch, ycbcr_420_passthrough, ycbcr_444_to_420, rgb_to_ycbcr; + rgb_to_ycbcr = drm_dp_downstream_rgb_to_ycbcr_conversion(intel_dp->dpcd, + intel_dp->downstream_ports, + dp_ds_hdmi_bt601_rgb_ycbcr_conv || + dp_ds_hdmi_bt709_rgb_ycbcr_conv || + dp_ds_hdmi_bt2020_rgb_ycbcr_conv); + /* let pcon convert from rgb->ycbcr if possible */ + if (is_branch && rgb_to_ycbcr && ycbcr_444_to_420) { + intel_dp->dfp.rgb_to_ycbcr = true; + intel_dp->dfp.ycbcr_444_to_420 = true; + connector->base.ycbcr_420_allowed = true; + } else { - intel_dp->dfp.ycbcr_444_to_420 = - ycbcr_444_to_420 && !ycbcr_420_passthrough; + intel_dp->dfp.ycbcr_444_to_420 = + ycbcr_444_to_420 && !ycbcr_420_passthrough; - connector->base.ycbcr_420_allowed = - !is_branch || ycbcr_444_to_420 || ycbcr_420_passthrough; + connector->base.ycbcr_420_allowed = + !is_branch || ycbcr_444_to_420 || ycbcr_420_passthrough; + } - "[connector:%d:%s] ycbcr 4:2:0 allowed? %s, ycbcr 4:4:4->4:2:0 conversion? %s ", + "[connector:%d:%s] rgb->ycbcr conversion? %s, ycbcr 4:2:0 allowed? %s, ycbcr 4:4:4->4:2:0 conversion? %s ", + yesno(intel_dp->dfp.rgb_to_ycbcr), diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h -void intel_dp_configure_protocol_converter(struct intel_dp *intel_dp); +void intel_dp_configure_protocol_converter(struct intel_dp *intel_dp, + const struct intel_crtc_state *crtc_state);
|
Graphics
|
522508b665df3bbfdf40381d4e61777844b1703f
|
ankit nautiyal
|
drivers
|
gpu
|
display, drm, i915
|
drm/i915: make gem errors non-fatal by default
|
while immensely convenient for developing to only tackle the first error, and not be flooded by repeated or secondiary issues, many more casual testers are not setup to remotely capture debug traces. for those testers, it is more beneficial to keep the system running in the remote chance that they are able to extract the original debug logs.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
make gem errors non-fatal by default
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['intel ']
|
['h', 'debug']
| 2
| 24
| 1
|
--- diff --git a/drivers/gpu/drm/i915/kconfig.debug b/drivers/gpu/drm/i915/kconfig.debug --- a/drivers/gpu/drm/i915/kconfig.debug +++ b/drivers/gpu/drm/i915/kconfig.debug + select drm_i915_debug_gem_once +config drm_i915_debug_gem_once + bool "make a gem debug failure fatal" + default n + depends on drm_i915_debug_gem + help + during development, we often only want the very first failure + as that would otherwise be lost in the deluge of subsequent + failures. however, more casual testers may not want to trigger + a hard bug_on and hope that the system remains sufficiently usable + to capture a bug report in situ. + + recommended for driver developers only. + + if in doubt, say "n". + diff --git a/drivers/gpu/drm/i915/i915_gem.h b/drivers/gpu/drm/i915/i915_gem.h --- a/drivers/gpu/drm/i915/i915_gem.h +++ b/drivers/gpu/drm/i915/i915_gem.h +#ifdef config_drm_i915_debug_gem_once +#define __gem_bug(cond) bug() +#else +#define __gem_bug(cond) \ + warn(1, "%s:%d gem_bug_on(%s)\n", __func__, __line__, __stringify(cond)) +#endif + - bug(); \ + __gem_bug(condition); \
|
Graphics
|
03c62d886dd6d3dfebf59d385a37245fe667fe90
|
chris wilson mika kuoppala mika kuoppala linux intel com
|
drivers
|
gpu
|
drm, i915
|
drm/i915: show timeline dependencies for debug
|
include the signalers each request in the timeline is waiting on, as a means to try and identify the cause of a stall. this can be quite verbose, even as for now we only show each request in the timeline and its immediate antecedents.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
show timeline dependencies for debug
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['intel ']
|
['h', 'c']
| 3
| 37
| 1
|
--- diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c +#include "i915_scheduler.h" - intel_gt_show_timelines(&i915->gt, &p, null); + intel_gt_show_timelines(&i915->gt, &p, i915_request_show_with_schedule); diff --git a/drivers/gpu/drm/i915/i915_scheduler.c b/drivers/gpu/drm/i915/i915_scheduler.c --- a/drivers/gpu/drm/i915/i915_scheduler.c +++ b/drivers/gpu/drm/i915/i915_scheduler.c +void i915_request_show_with_schedule(struct drm_printer *m, + const struct i915_request *rq, + const char *prefix, + int indent) +{ + struct i915_dependency *dep; + + i915_request_show(m, rq, prefix, indent); + if (i915_request_completed(rq)) + return; + + rcu_read_lock(); + for_each_signaler(dep, rq) { + const struct i915_request *signaler = + node_to_request(dep->signaler); + + /* dependencies along the same timeline are expected. */ + if (signaler->timeline == rq->timeline) + continue; + + if (i915_request_completed(signaler)) + continue; + + i915_request_show(m, signaler, prefix, indent + 2); + } + rcu_read_unlock(); +} + diff --git a/drivers/gpu/drm/i915/i915_scheduler.h b/drivers/gpu/drm/i915/i915_scheduler.h --- a/drivers/gpu/drm/i915/i915_scheduler.h +++ b/drivers/gpu/drm/i915/i915_scheduler.h +struct drm_printer; + +void i915_request_show_with_schedule(struct drm_printer *m, + const struct i915_request *rq, + const char *prefix, + int indent); +
|
Graphics
|
da7ac715d339d53dfb4e6ce325de842e80897814
|
tvrtko ursulin
|
drivers
|
gpu
|
drm, i915
|
drm/i915/gem: spring clean debugfs
|
throw away all the debugfs entries that are not being actively used for debugging/developing igt. note that a couple of these are already and will remain available under the gt/
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
spring clean debugfs
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['intel ']
|
['c']
| 1
| 0
| 435
|
--- diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c -static void gen8_display_interrupt_info(struct seq_file *m) -{ - struct drm_i915_private *dev_priv = node_to_i915(m->private); - enum pipe pipe; - - for_each_pipe(dev_priv, pipe) { - enum intel_display_power_domain power_domain; - intel_wakeref_t wakeref; - - power_domain = power_domain_pipe(pipe); - wakeref = intel_display_power_get_if_enabled(dev_priv, - power_domain); - if (!wakeref) { - seq_printf(m, "pipe %c power disabled ", - pipe_name(pipe)); - continue; - } - seq_printf(m, "pipe %c imr: %08x ", - pipe_name(pipe), - intel_uncore_read(&dev_priv->uncore, gen8_de_pipe_imr(pipe))); - seq_printf(m, "pipe %c iir: %08x ", - pipe_name(pipe), - intel_uncore_read(&dev_priv->uncore, gen8_de_pipe_iir(pipe))); - seq_printf(m, "pipe %c ier: %08x ", - pipe_name(pipe), - intel_uncore_read(&dev_priv->uncore, gen8_de_pipe_ier(pipe))); - - intel_display_power_put(dev_priv, power_domain, wakeref); - } - - seq_printf(m, "display engine port interrupt mask: %08x ", - intel_uncore_read(&dev_priv->uncore, gen8_de_port_imr)); - seq_printf(m, "display engine port interrupt identity: %08x ", - intel_uncore_read(&dev_priv->uncore, gen8_de_port_iir)); - seq_printf(m, "display engine port interrupt enable: %08x ", - intel_uncore_read(&dev_priv->uncore, gen8_de_port_ier)); - - seq_printf(m, "display engine misc interrupt mask: %08x ", - intel_uncore_read(&dev_priv->uncore, gen8_de_misc_imr)); - seq_printf(m, "display engine misc interrupt identity: %08x ", - intel_uncore_read(&dev_priv->uncore, gen8_de_misc_iir)); - seq_printf(m, "display engine misc interrupt enable: %08x ", - intel_uncore_read(&dev_priv->uncore, gen8_de_misc_ier)); - - seq_printf(m, "pcu interrupt mask: %08x ", - intel_uncore_read(&dev_priv->uncore, gen8_pcu_imr)); - seq_printf(m, "pcu interrupt identity: %08x ", - intel_uncore_read(&dev_priv->uncore, gen8_pcu_iir)); - seq_printf(m, "pcu interrupt enable: %08x ", - intel_uncore_read(&dev_priv->uncore, gen8_pcu_ier)); -} - -static int i915_interrupt_info(struct seq_file *m, void *data) -{ - struct drm_i915_private *dev_priv = node_to_i915(m->private); - struct intel_engine_cs *engine; - intel_wakeref_t wakeref; - int i, pipe; - - wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm); - - if (is_cherryview(dev_priv)) { - intel_wakeref_t pref; - - seq_printf(m, "master interrupt control: %08x ", - intel_uncore_read(&dev_priv->uncore, gen8_master_irq)); - - seq_printf(m, "display ier: %08x ", - intel_uncore_read(&dev_priv->uncore, vlv_ier)); - seq_printf(m, "display iir: %08x ", - intel_uncore_read(&dev_priv->uncore, vlv_iir)); - seq_printf(m, "display iir_rw: %08x ", - intel_uncore_read(&dev_priv->uncore, vlv_iir_rw)); - seq_printf(m, "display imr: %08x ", - intel_uncore_read(&dev_priv->uncore, vlv_imr)); - for_each_pipe(dev_priv, pipe) { - enum intel_display_power_domain power_domain; - - power_domain = power_domain_pipe(pipe); - pref = intel_display_power_get_if_enabled(dev_priv, - power_domain); - if (!pref) { - seq_printf(m, "pipe %c power disabled ", - pipe_name(pipe)); - continue; - } - - seq_printf(m, "pipe %c stat: %08x ", - pipe_name(pipe), - intel_uncore_read(&dev_priv->uncore, pipestat(pipe))); - - intel_display_power_put(dev_priv, power_domain, pref); - } - - pref = intel_display_power_get(dev_priv, power_domain_init); - seq_printf(m, "port hotplug: %08x ", - intel_uncore_read(&dev_priv->uncore, port_hotplug_en)); - seq_printf(m, "dpflipstat: %08x ", - intel_uncore_read(&dev_priv->uncore, vlv_dpflipstat)); - seq_printf(m, "dpinvgtt: %08x ", - intel_uncore_read(&dev_priv->uncore, dpinvgtt)); - intel_display_power_put(dev_priv, power_domain_init, pref); - - for (i = 0; i < 4; i++) { - seq_printf(m, "gt interrupt imr %d: %08x ", - i, intel_uncore_read(&dev_priv->uncore, gen8_gt_imr(i))); - seq_printf(m, "gt interrupt iir %d: %08x ", - i, intel_uncore_read(&dev_priv->uncore, gen8_gt_iir(i))); - seq_printf(m, "gt interrupt ier %d: %08x ", - i, intel_uncore_read(&dev_priv->uncore, gen8_gt_ier(i))); - } - - seq_printf(m, "pcu interrupt mask: %08x ", - intel_uncore_read(&dev_priv->uncore, gen8_pcu_imr)); - seq_printf(m, "pcu interrupt identity: %08x ", - intel_uncore_read(&dev_priv->uncore, gen8_pcu_iir)); - seq_printf(m, "pcu interrupt enable: %08x ", - intel_uncore_read(&dev_priv->uncore, gen8_pcu_ier)); - } else if (intel_gen(dev_priv) >= 11) { - if (has_master_unit_irq(dev_priv)) - seq_printf(m, "master unit interrupt control: %08x ", - intel_uncore_read(&dev_priv->uncore, dg1_mstr_unit_intr)); - - seq_printf(m, "master interrupt control: %08x ", - intel_uncore_read(&dev_priv->uncore, gen11_gfx_mstr_irq)); - - seq_printf(m, "render/copy intr enable: %08x ", - intel_uncore_read(&dev_priv->uncore, gen11_render_copy_intr_enable)); - seq_printf(m, "vcs/vecs intr enable: %08x ", - intel_uncore_read(&dev_priv->uncore, gen11_vcs_vecs_intr_enable)); - seq_printf(m, "guc/sg intr enable: %08x ", - intel_uncore_read(&dev_priv->uncore, gen11_guc_sg_intr_enable)); - seq_printf(m, "gpm/wgboxperf intr enable: %08x ", - intel_uncore_read(&dev_priv->uncore, gen11_gpm_wgboxperf_intr_enable)); - seq_printf(m, "crypto intr enable: %08x ", - intel_uncore_read(&dev_priv->uncore, gen11_crypto_rsvd_intr_enable)); - seq_printf(m, "gunit/csme intr enable: %08x ", - intel_uncore_read(&dev_priv->uncore, gen11_gunit_csme_intr_enable)); - - seq_printf(m, "display interrupt control: %08x ", - intel_uncore_read(&dev_priv->uncore, gen11_display_int_ctl)); - - gen8_display_interrupt_info(m); - } else if (intel_gen(dev_priv) >= 8) { - seq_printf(m, "master interrupt control: %08x ", - intel_uncore_read(&dev_priv->uncore, gen8_master_irq)); - - for (i = 0; i < 4; i++) { - seq_printf(m, "gt interrupt imr %d: %08x ", - i, intel_uncore_read(&dev_priv->uncore, gen8_gt_imr(i))); - seq_printf(m, "gt interrupt iir %d: %08x ", - i, intel_uncore_read(&dev_priv->uncore, gen8_gt_iir(i))); - seq_printf(m, "gt interrupt ier %d: %08x ", - i, intel_uncore_read(&dev_priv->uncore, gen8_gt_ier(i))); - } - - gen8_display_interrupt_info(m); - } else if (is_valleyview(dev_priv)) { - intel_wakeref_t pref; - - seq_printf(m, "display ier: %08x ", - intel_uncore_read(&dev_priv->uncore, vlv_ier)); - seq_printf(m, "display iir: %08x ", - intel_uncore_read(&dev_priv->uncore, vlv_iir)); - seq_printf(m, "display iir_rw: %08x ", - intel_uncore_read(&dev_priv->uncore, vlv_iir_rw)); - seq_printf(m, "display imr: %08x ", - intel_uncore_read(&dev_priv->uncore, vlv_imr)); - for_each_pipe(dev_priv, pipe) { - enum intel_display_power_domain power_domain; - - power_domain = power_domain_pipe(pipe); - pref = intel_display_power_get_if_enabled(dev_priv, - power_domain); - if (!pref) { - seq_printf(m, "pipe %c power disabled ", - pipe_name(pipe)); - continue; - } - - seq_printf(m, "pipe %c stat: %08x ", - pipe_name(pipe), - intel_uncore_read(&dev_priv->uncore, pipestat(pipe))); - intel_display_power_put(dev_priv, power_domain, pref); - } - - seq_printf(m, "master ier: %08x ", - intel_uncore_read(&dev_priv->uncore, vlv_master_ier)); - - seq_printf(m, "render ier: %08x ", - intel_uncore_read(&dev_priv->uncore, gtier)); - seq_printf(m, "render iir: %08x ", - intel_uncore_read(&dev_priv->uncore, gtiir)); - seq_printf(m, "render imr: %08x ", - intel_uncore_read(&dev_priv->uncore, gtimr)); - - seq_printf(m, "pm ier: %08x ", - intel_uncore_read(&dev_priv->uncore, gen6_pmier)); - seq_printf(m, "pm iir: %08x ", - intel_uncore_read(&dev_priv->uncore, gen6_pmiir)); - seq_printf(m, "pm imr: %08x ", - intel_uncore_read(&dev_priv->uncore, gen6_pmimr)); - - pref = intel_display_power_get(dev_priv, power_domain_init); - seq_printf(m, "port hotplug: %08x ", - intel_uncore_read(&dev_priv->uncore, port_hotplug_en)); - seq_printf(m, "dpflipstat: %08x ", - intel_uncore_read(&dev_priv->uncore, vlv_dpflipstat)); - seq_printf(m, "dpinvgtt: %08x ", - intel_uncore_read(&dev_priv->uncore, dpinvgtt)); - intel_display_power_put(dev_priv, power_domain_init, pref); - - } else if (!has_pch_split(dev_priv)) { - seq_printf(m, "interrupt enable: %08x ", - intel_uncore_read(&dev_priv->uncore, gen2_ier)); - seq_printf(m, "interrupt identity: %08x ", - intel_uncore_read(&dev_priv->uncore, gen2_iir)); - seq_printf(m, "interrupt mask: %08x ", - intel_uncore_read(&dev_priv->uncore, gen2_imr)); - for_each_pipe(dev_priv, pipe) - seq_printf(m, "pipe %c stat: %08x ", - pipe_name(pipe), - intel_uncore_read(&dev_priv->uncore, pipestat(pipe))); - } else { - seq_printf(m, "north display interrupt enable: %08x ", - intel_uncore_read(&dev_priv->uncore, deier)); - seq_printf(m, "north display interrupt identity: %08x ", - intel_uncore_read(&dev_priv->uncore, deiir)); - seq_printf(m, "north display interrupt mask: %08x ", - intel_uncore_read(&dev_priv->uncore, deimr)); - seq_printf(m, "south display interrupt enable: %08x ", - intel_uncore_read(&dev_priv->uncore, sdeier)); - seq_printf(m, "south display interrupt identity: %08x ", - intel_uncore_read(&dev_priv->uncore, sdeiir)); - seq_printf(m, "south display interrupt mask: %08x ", - intel_uncore_read(&dev_priv->uncore, sdeimr)); - seq_printf(m, "graphics interrupt enable: %08x ", - intel_uncore_read(&dev_priv->uncore, gtier)); - seq_printf(m, "graphics interrupt identity: %08x ", - intel_uncore_read(&dev_priv->uncore, gtiir)); - seq_printf(m, "graphics interrupt mask: %08x ", - intel_uncore_read(&dev_priv->uncore, gtimr)); - } - - if (intel_gen(dev_priv) >= 11) { - seq_printf(m, "rcs intr mask: %08x ", - intel_uncore_read(&dev_priv->uncore, gen11_rcs0_rsvd_intr_mask)); - seq_printf(m, "bcs intr mask: %08x ", - intel_uncore_read(&dev_priv->uncore, gen11_bcs_rsvd_intr_mask)); - seq_printf(m, "vcs0/vcs1 intr mask: %08x ", - intel_uncore_read(&dev_priv->uncore, gen11_vcs0_vcs1_intr_mask)); - seq_printf(m, "vcs2/vcs3 intr mask: %08x ", - intel_uncore_read(&dev_priv->uncore, gen11_vcs2_vcs3_intr_mask)); - seq_printf(m, "vecs0/vecs1 intr mask: %08x ", - intel_uncore_read(&dev_priv->uncore, gen11_vecs0_vecs1_intr_mask)); - seq_printf(m, "guc/sg intr mask: %08x ", - intel_uncore_read(&dev_priv->uncore, gen11_guc_sg_intr_mask)); - seq_printf(m, "gpm/wgboxperf intr mask: %08x ", - intel_uncore_read(&dev_priv->uncore, gen11_gpm_wgboxperf_intr_mask)); - seq_printf(m, "crypto intr mask: %08x ", - intel_uncore_read(&dev_priv->uncore, gen11_crypto_rsvd_intr_mask)); - seq_printf(m, "gunit/csme intr mask: %08x ", - intel_uncore_read(&dev_priv->uncore, gen11_gunit_csme_intr_mask)); - - } else if (intel_gen(dev_priv) >= 6) { - for_each_uabi_engine(engine, dev_priv) { - seq_printf(m, - "graphics interrupt mask (%s): %08x ", - engine->name, engine_read(engine, ring_imr)); - } - } - - intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref); - - return 0; -} - -static int i915_gem_fence_regs_info(struct seq_file *m, void *data) -{ - struct drm_i915_private *i915 = node_to_i915(m->private); - unsigned int i; - - seq_printf(m, "total fences = %d ", i915->ggtt.num_fences); - - rcu_read_lock(); - for (i = 0; i < i915->ggtt.num_fences; i++) { - struct i915_fence_reg *reg = &i915->ggtt.fence_regs[i]; - struct i915_vma *vma = reg->vma; - - seq_printf(m, "fence %d, pin count = %d, object = ", - i, atomic_read(®->pin_count)); - if (!vma) - seq_puts(m, "unused"); - else - i915_debugfs_describe_obj(m, vma->obj); - seq_putc(m, ' '); - } - rcu_read_unlock(); - - return 0; -} - -static int i915_ring_freq_table(struct seq_file *m, void *unused) -{ - struct drm_i915_private *dev_priv = node_to_i915(m->private); - struct intel_rps *rps = &dev_priv->gt.rps; - unsigned int max_gpu_freq, min_gpu_freq; - intel_wakeref_t wakeref; - int gpu_freq, ia_freq; - - if (!has_llc(dev_priv)) - return -enodev; - - min_gpu_freq = rps->min_freq; - max_gpu_freq = rps->max_freq; - if (is_gen9_bc(dev_priv) || intel_gen(dev_priv) >= 10) { - /* convert gt frequency to 50 hz units */ - min_gpu_freq /= gen9_freq_scaler; - max_gpu_freq /= gen9_freq_scaler; - } - - seq_puts(m, "gpu freq (mhz) effective cpu freq (mhz) effective ring freq (mhz) "); - - wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm); - for (gpu_freq = min_gpu_freq; gpu_freq <= max_gpu_freq; gpu_freq++) { - ia_freq = gpu_freq; - sandybridge_pcode_read(dev_priv, - gen6_pcode_read_min_freq_table, - &ia_freq, null); - seq_printf(m, "%d %d %d ", - intel_gpu_freq(rps, - (gpu_freq * - (is_gen9_bc(dev_priv) || - intel_gen(dev_priv) >= 10 ? - gen9_freq_scaler : 1))), - ((ia_freq >> 0) & 0xff) * 100, - ((ia_freq >> 8) & 0xff) * 100); - } - intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref); - - return 0; -} - -static void describe_ctx_ring(struct seq_file *m, struct intel_ring *ring) -{ - seq_printf(m, " (ringbuffer, space: %d, head: %u, tail: %u, emit: %u)", - ring->space, ring->head, ring->tail, ring->emit); -} - -static int i915_context_status(struct seq_file *m, void *unused) -{ - struct drm_i915_private *i915 = node_to_i915(m->private); - struct i915_gem_context *ctx, *cn; - - spin_lock(&i915->gem.contexts.lock); - list_for_each_entry_safe(ctx, cn, &i915->gem.contexts.list, link) { - struct i915_gem_engines_iter it; - struct intel_context *ce; - - if (!kref_get_unless_zero(&ctx->ref)) - continue; - - spin_unlock(&i915->gem.contexts.lock); - - seq_puts(m, "hw context "); - if (ctx->pid) { - struct task_struct *task; - - task = get_pid_task(ctx->pid, pidtype_pid); - if (task) { - seq_printf(m, "(%s [%d]) ", - task->comm, task->pid); - put_task_struct(task); - } - } else if (is_err(ctx->file_priv)) { - seq_puts(m, "(deleted) "); - } else { - seq_puts(m, "(kernel) "); - } - - seq_putc(m, ctx->remap_slice ? 'r' : 'r'); - seq_putc(m, ' '); - - for_each_gem_engine(ce, - i915_gem_context_lock_engines(ctx), it) { - if (intel_context_pin_if_active(ce)) { - seq_printf(m, "%s: ", ce->engine->name); - if (ce->state) - i915_debugfs_describe_obj(m, ce->state->obj); - describe_ctx_ring(m, ce->ring); - seq_putc(m, ' '); - intel_context_unpin(ce); - } - } - i915_gem_context_unlock_engines(ctx); - - seq_putc(m, ' '); - - spin_lock(&i915->gem.contexts.lock); - list_safe_reset_next(ctx, cn, link); - i915_gem_context_put(ctx); - } - spin_unlock(&i915->gem.contexts.lock); - - return 0; -} - -static int i915_llc(struct seq_file *m, void *data) -{ - struct drm_i915_private *dev_priv = node_to_i915(m->private); - const bool edram = intel_gen(dev_priv) > 8; - - seq_printf(m, "llc: %s ", yesno(has_llc(dev_priv))); - seq_printf(m, "%s: %umb ", edram ? "edram" : "ellc", - dev_priv->edram_size_mb); - - return 0; -} - -static int i915_shrinker_info(struct seq_file *m, void *unused) -{ - struct drm_i915_private *i915 = node_to_i915(m->private); - - seq_printf(m, "seeks = %d ", i915->mm.shrinker.seeks); - seq_printf(m, "batch = %lu ", i915->mm.shrinker.batch); - - return 0; -} - - {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0}, - {"i915_gem_interrupt", i915_interrupt_info, 0}, - {"i915_ring_freq_table", i915_ring_freq_table, 0}, - {"i915_context_status", i915_context_status, 0}, - {"i915_llc", i915_llc, 0}, - {"i915_shrinker_info", i915_shrinker_info, 0},
|
Graphics
|
cf977e18610e66e48c31619e7e0cfa871be9eada
|
chris wilson
|
drivers
|
gpu
|
drm, i915
|
drm/i915/gt: show all active timelines for debugging
|
include the active timelines for debugfs/i915_engine_info, so that we can see which have unready requests inflight which are not shown otherwise.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
show all active timelines for debugging
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['intel ']
|
['h', 'c']
| 3
| 98
| 7
|
--- diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.c b/drivers/gpu/drm/i915/gt/intel_timeline.c --- a/drivers/gpu/drm/i915/gt/intel_timeline.c +++ b/drivers/gpu/drm/i915/gt/intel_timeline.c +void intel_gt_show_timelines(struct intel_gt *gt, + struct drm_printer *m, + void (*show_request)(struct drm_printer *m, + const struct i915_request *rq, + const char *prefix, + int indent)) +{ + struct intel_gt_timelines *timelines = >->timelines; + struct intel_timeline *tl, *tn; + list_head(free); + + spin_lock(&timelines->lock); + list_for_each_entry_safe(tl, tn, &timelines->active_list, link) { + unsigned long count, ready, inflight; + struct i915_request *rq, *rn; + struct dma_fence *fence; + + if (!mutex_trylock(&tl->mutex)) { + drm_printf(m, "timeline %llx: busy; skipping ", + tl->fence_context); + continue; + } + + intel_timeline_get(tl); + gem_bug_on(!atomic_read(&tl->active_count)); + atomic_inc(&tl->active_count); /* pin the list element */ + spin_unlock(&timelines->lock); + + count = 0; + ready = 0; + inflight = 0; + list_for_each_entry_safe(rq, rn, &tl->requests, link) { + if (i915_request_completed(rq)) + continue; + + count++; + if (i915_request_is_ready(rq)) + ready++; + if (i915_request_is_active(rq)) + inflight++; + } + + drm_printf(m, "timeline %llx: { ", tl->fence_context); + drm_printf(m, "count: %lu, ready: %lu, inflight: %lu", + count, ready, inflight); + drm_printf(m, ", seqno: { current: %d, last: %d }", + *tl->hwsp_seqno, tl->seqno); + fence = i915_active_fence_get(&tl->last_request); + if (fence) { + drm_printf(m, ", engine: %s", + to_request(fence)->engine->name); + dma_fence_put(fence); + } + drm_printf(m, " } "); + + if (show_request) { + list_for_each_entry_safe(rq, rn, &tl->requests, link) + show_request(m, rq, "", 2); + } + + mutex_unlock(&tl->mutex); + spin_lock(&timelines->lock); + + /* resume list iteration after reacquiring spinlock */ + list_safe_reset_next(tl, tn, link); + if (atomic_dec_and_test(&tl->active_count)) + list_del(&tl->link); + + /* defer the final release to after the spinlock */ + if (refcount_dec_and_test(&tl->kref.refcount)) { + gem_bug_on(atomic_read(&tl->active_count)); + list_add(&tl->link, &free); + } + } + spin_unlock(&timelines->lock); + + list_for_each_entry_safe(tl, tn, &free, link) + __intel_timeline_free(&tl->kref); +} + diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.h b/drivers/gpu/drm/i915/gt/intel_timeline.h --- a/drivers/gpu/drm/i915/gt/intel_timeline.h +++ b/drivers/gpu/drm/i915/gt/intel_timeline.h +struct drm_printer; + +void intel_gt_show_timelines(struct intel_gt *gt, + struct drm_printer *m, + void (*show_request)(struct drm_printer *m, + const struct i915_request *rq, + const char *prefix, + int indent)); + diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c - struct drm_i915_private *dev_priv = node_to_i915(m->private); + struct drm_i915_private *i915 = node_to_i915(m->private); - wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm); + wakeref = intel_runtime_pm_get(&i915->runtime_pm); - yesno(dev_priv->gt.awake), - atomic_read(&dev_priv->gt.wakeref.count)); + yesno(i915->gt.awake), + atomic_read(&i915->gt.wakeref.count)); - runtime_info(dev_priv)->cs_timestamp_frequency_hz); + runtime_info(i915)->cs_timestamp_frequency_hz); - for_each_uabi_engine(engine, dev_priv) + for_each_uabi_engine(engine, i915) - intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref); + intel_gt_show_timelines(&i915->gt, &p, null); + + intel_runtime_pm_put(&i915->runtime_pm, wakeref);
|
Graphics
|
0986317a45df7ff380f1512b53a2f94ab16922b8
|
chris wilson tvrtko ursulin tvrtko ursulin intel com tvrtko ursulin tvrtko ursulin intel com
|
drivers
|
gpu
|
drm, gt, i915
|
drm/i915/display: record the plane update times for debugging
|
since we try and estimate how long we require to update the registers to perform a plane update, it is of vital importance that we measure the distribution of plane updates to better guide our estimate. if we underestimate how long it takes to perform the plane update, we may slip into the next scanout frame causing a tear. if we overestimate, we may unnecessarily delay the update to the next frame, causing visible jitter.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
record the plane update times for debugging
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['intel ', 'debugfs']
|
['h', 'c']
| 6
| 187
| 18
|
--- diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c +#include "display/intel_display_debugfs.h" +static int intel_crtc_late_register(struct drm_crtc *crtc) +{ + intel_crtc_debugfs_add(crtc); + return 0; +} + - .get_crc_sources = intel_crtc_get_crc_sources + .get_crc_sources = intel_crtc_get_crc_sources, \ + .late_register = intel_crtc_late_register diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c +#include "intel_sprite.h" +#if is_enabled(config_drm_i915_debug_vblank_evade) +static void crtc_updates_info(struct seq_file *m, + struct intel_crtc *crtc, + const char *hdr) +{ + u64 count; + int row; + + count = 0; + for (row = 0; row < array_size(crtc->debug.vbl.times); row++) + count += crtc->debug.vbl.times[row]; + seq_printf(m, "%supdates: %llu ", hdr, count); + if (!count) + return; + + for (row = 0; row < array_size(crtc->debug.vbl.times); row++) { + char columns[80] = " |"; + unsigned int x; + + if (row & 1) { + const char *units; + + if (row > 10) { + x = 1000000; + units = "ms"; + } else { + x = 1000; + units = "us"; + } + + snprintf(columns, sizeof(columns), "%4ld%s |", + div_round_closest(bit(row + 9), x), units); + } + + if (crtc->debug.vbl.times[row]) { + x = ilog2(crtc->debug.vbl.times[row]); + memset(columns + 8, '*', x); + columns[8 + x] = ''; + } + + seq_printf(m, "%s%s ", hdr, columns); + } + + seq_printf(m, "%smin update: %lluns ", + hdr, crtc->debug.vbl.min); + seq_printf(m, "%smax update: %lluns ", + hdr, crtc->debug.vbl.max); + seq_printf(m, "%saverage update: %lluns ", + hdr, div64_u64(crtc->debug.vbl.sum, count)); + seq_printf(m, "%soverruns > %uus: %u ", + hdr, vblank_evasion_time_us, crtc->debug.vbl.over); +} + +static int crtc_updates_show(struct seq_file *m, void *data) +{ + crtc_updates_info(m, m->private, ""); + return 0; +} + +static int crtc_updates_open(struct inode *inode, struct file *file) +{ + return single_open(file, crtc_updates_show, inode->i_private); +} + +static ssize_t crtc_updates_write(struct file *file, + const char __user *ubuf, + size_t len, loff_t *offp) +{ + struct seq_file *m = file->private_data; + struct intel_crtc *crtc = m->private; + + /* may race with an update. meh. */ + memset(&crtc->debug.vbl, 0, sizeof(crtc->debug.vbl)); + + return len; +} + +static const struct file_operations crtc_updates_fops = { + .owner = this_module, + .open = crtc_updates_open, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, + .write = crtc_updates_write +}; + +static void crtc_updates_add(struct drm_crtc *crtc) +{ + debugfs_create_file("i915_update_info", 0644, crtc->debugfs_entry, + to_intel_crtc(crtc), &crtc_updates_fops); +} + +#else +static void crtc_updates_info(struct seq_file *m, + struct intel_crtc *crtc, + const char *hdr) +{ +} + +static void crtc_updates_add(struct drm_crtc *crtc) +{ +} +#endif + + + crtc_updates_info(m, crtc, " "); + +/** + * intel_crtc_debugfs_add - add i915 specific crtc debugfs files + * @crtc: pointer to a drm_crtc + * + * returns 0 on success, negative error codes on error. + * + * failure to add debugfs entries should generally be ignored. + */ +int intel_crtc_debugfs_add(struct drm_crtc *crtc) +{ + if (!crtc->debugfs_entry) + return -enodev; + + crtc_updates_add(crtc); + return 0; +} diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.h b/drivers/gpu/drm/i915/display/intel_display_debugfs.h --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.h +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.h +struct drm_crtc; +int intel_crtc_debugfs_add(struct drm_crtc *crtc); +static inline int intel_crtc_debugfs_add(struct drm_crtc *crtc) { return 0; } diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h +#ifdef config_drm_i915_debug_vblank_evade + struct { + u64 min; + u64 max; + u64 sum; + unsigned int over; + unsigned int times[17]; /* [1us, 16ms] */ + } vbl; +#endif diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c --- a/drivers/gpu/drm/i915/display/intel_sprite.c +++ b/drivers/gpu/drm/i915/display/intel_sprite.c -/* fixme: we should instead only take spinlocks once for the entire update - * instead of once per mmio. */ -#if is_enabled(config_prove_locking) -#define vblank_evasion_time_us 250 -#else -#define vblank_evasion_time_us 100 -#endif - +#if is_enabled(config_drm_i915_debug_vblank_evade) +static void dbg_vblank_evade(struct intel_crtc *crtc, ktime_t end) +{ + u64 delta = ktime_to_ns(ktime_sub(end, crtc->debug.start_vbl_time)); + unsigned int h; + + h = ilog2(delta >> 9); + if (h >= array_size(crtc->debug.vbl.times)) + h = array_size(crtc->debug.vbl.times) - 1; + crtc->debug.vbl.times[h]++; + + crtc->debug.vbl.sum += delta; + if (!crtc->debug.vbl.min || delta < crtc->debug.vbl.min) + crtc->debug.vbl.min = delta; + if (delta > crtc->debug.vbl.max) + crtc->debug.vbl.max = delta; + + if (delta > 1000 * vblank_evasion_time_us) { + drm_dbg_kms(crtc->base.dev, + "atomic update on pipe (%c) took %lld us, max time under evasion is %u us ", + pipe_name(crtc->pipe), + div_u64(delta, 1000), + vblank_evasion_time_us); + crtc->debug.vbl.over++; + } +} +#else +static void dbg_vblank_evade(struct intel_crtc *crtc, ktime_t end) {} +#endif + -#ifdef config_drm_i915_debug_vblank_evade - else if (ktime_us_delta(end_vbl_time, crtc->debug.start_vbl_time) > - vblank_evasion_time_us) - drm_warn(&dev_priv->drm, - "atomic update on pipe (%c) took %lld us, max time under evasion is %u us ", - pipe_name(pipe), - ktime_us_delta(end_vbl_time, crtc->debug.start_vbl_time), - vblank_evasion_time_us); -#endif + + dbg_vblank_evade(crtc, end_vbl_time); diff --git a/drivers/gpu/drm/i915/display/intel_sprite.h b/drivers/gpu/drm/i915/display/intel_sprite.h --- a/drivers/gpu/drm/i915/display/intel_sprite.h +++ b/drivers/gpu/drm/i915/display/intel_sprite.h +/* + * fixme: we should instead only take spinlocks once for the entire update + * instead of once per mmio. + */ +#if is_enabled(config_prove_locking) +#define vblank_evasion_time_us 250 +#else +#define vblank_evasion_time_us 100 +#endif +
|
Graphics
|
829270e4552e9e6a0534d4d195f671363cb39e3e
|
chris wilson
|
drivers
|
gpu
|
display, drm, i915
|
drm/i915/debugfs: remove the i915_cache_sharing debugfs file
|
the i915_cache_sharing file is a debugfs interface for gen 6-7 with no validation or user. remove it.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
remove the i915_cache_sharing debugfs file
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['intel ', 'debugfs']
|
['c']
| 1
| 0
| 50
|
--- diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c -static int -i915_cache_sharing_get(void *data, u64 *val) -{ - struct drm_i915_private *dev_priv = data; - intel_wakeref_t wakeref; - u32 snpcr = 0; - - if (!(is_gen_range(dev_priv, 6, 7))) - return -enodev; - - with_intel_runtime_pm(&dev_priv->runtime_pm, wakeref) - snpcr = i915_read(gen6_mbcunit_snpcr); - - *val = (snpcr & gen6_mbc_snpcr_mask) >> gen6_mbc_snpcr_shift; - - return 0; -} - -static int -i915_cache_sharing_set(void *data, u64 val) -{ - struct drm_i915_private *dev_priv = data; - intel_wakeref_t wakeref; - - if (!(is_gen_range(dev_priv, 6, 7))) - return -enodev; - - if (val > 3) - return -einval; - - drm_dbg(&dev_priv->drm, - "manually setting uncore sharing to %llu ", val); - with_intel_runtime_pm(&dev_priv->runtime_pm, wakeref) { - u32 snpcr; - - /* update the cache sharing policy here as well */ - snpcr = i915_read(gen6_mbcunit_snpcr); - snpcr &= ~gen6_mbc_snpcr_mask; - snpcr |= val << gen6_mbc_snpcr_shift; - i915_write(gen6_mbcunit_snpcr, snpcr); - } - - return 0; -} - -define_simple_attribute(i915_cache_sharing_fops, - i915_cache_sharing_get, i915_cache_sharing_set, - "%llu "); - - {"i915_cache_sharing", &i915_cache_sharing_fops},
|
Graphics
|
88d570e030dddb6bd80b61bd6380fe106e11815b
|
jani nikula
|
drivers
|
gpu
|
drm, i915
|
drm/gma500: remove medfield support
|
medfield is an outdated mobile platform with apparently no users left. remove it from gma500.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
remove moorestown/medfield
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['gma500 ']
|
['h', 'kconfig', 'c', 'makefile']
| 23
| 2
| 5,835
|
--- diff --git a/drivers/gpu/drm/gma500/kconfig b/drivers/gpu/drm/gma500/kconfig --- a/drivers/gpu/drm/gma500/kconfig +++ b/drivers/gpu/drm/gma500/kconfig - -config drm_medfield - bool "intel medfield support (experimental)" - depends on drm_gma500 && x86_intel_mid - help - say yes to include support for the intel medfield platform. - diff --git a/drivers/gpu/drm/gma500/makefile b/drivers/gpu/drm/gma500/makefile --- a/drivers/gpu/drm/gma500/makefile +++ b/drivers/gpu/drm/gma500/makefile -gma500_gfx-$(config_drm_medfield) += mdfld_device.o \ - mdfld_output.o \ - mdfld_intel_display.o \ - mdfld_dsi_output.o \ - mdfld_dsi_dpi.o \ - mdfld_dsi_pkg_sender.o \ - mdfld_tpo_vid.o \ - mdfld_tmd_vid.o \ - tc35876x-dsi-lvds.o - diff --git a/drivers/gpu/drm/gma500/cdv_intel_hdmi.c b/drivers/gpu/drm/gma500/cdv_intel_hdmi.c --- a/drivers/gpu/drm/gma500/cdv_intel_hdmi.c +++ b/drivers/gpu/drm/gma500/cdv_intel_hdmi.c - * - * fixme: - * we should probably make this generic and share it with medfield - struct mdfld_hdmi_i2c *i2c_bus; diff --git a/drivers/gpu/drm/gma500/mdfld_device.c b/drivers/gpu/drm/gma500/mdfld_device.c --- a/drivers/gpu/drm/gma500/mdfld_device.c +++ /dev/null -// spdx-license-identifier: gpl-2.0-only -/************************************************************************** - * copyright (c) 2011, intel corporation. - * all rights reserved. - * - **************************************************************************/ - -#include <linux/delay.h> -#include <linux/gpio/machine.h> - -#include <asm/intel_scu_ipc.h> - -#include "mdfld_dsi_output.h" -#include "mdfld_output.h" -#include "mid_bios.h" -#include "psb_drv.h" -#include "tc35876x-dsi-lvds.h" - -#ifdef config_backlight_class_device - -#define mrst_blc_max_pwm_reg_freq 0xffff -#define blc_pwm_precision_factor 100 /* 10000000 */ -#define blc_pwm_freq_calc_constant 32 -#define mhz 1000000 -#define brightness_min_level 1 -#define brightness_max_level 100 -#define brightness_mask 0xff -#define blc_polarity_normal 0 -#define blc_polarity_inverse 1 -#define blc_adjustment_max 100 - -#define mdfld_blc_pwm_precision_factor 10 -#define mdfld_blc_max_pwm_reg_freq 0xfffe -#define mdfld_blc_min_pwm_reg_freq 0x2 - -#define mdfld_backlight_pwm_polarity_bit_clear (0xfffe) -#define mdfld_backlight_pwm_ctl_shift (16) - -static struct backlight_device *mdfld_backlight_device; - -int mdfld_set_brightness(struct backlight_device *bd) -{ - struct drm_device *dev = - (struct drm_device *)bl_get_data(mdfld_backlight_device); - struct drm_psb_private *dev_priv = dev->dev_private; - int level = bd->props.brightness; - - drm_debug_driver("backlight level set to %d ", level); - - /* perform value bounds checking */ - if (level < brightness_min_level) - level = brightness_min_level; - - if (gma_power_begin(dev, false)) { - u32 adjusted_level = 0; - - /* - * adjust the backlight level with the percent in - * dev_priv->blc_adj2 - */ - adjusted_level = level * dev_priv->blc_adj2; - adjusted_level = adjusted_level / blc_adjustment_max; - dev_priv->brightness_adjusted = adjusted_level; - - if (mdfld_get_panel_type(dev, 0) == tc35876x) { - if (dev_priv->dpi_panel_on[0] || - dev_priv->dpi_panel_on[2]) - tc35876x_brightness_control(dev, - dev_priv->brightness_adjusted); - } else { - if (dev_priv->dpi_panel_on[0]) - mdfld_dsi_brightness_control(dev, 0, - dev_priv->brightness_adjusted); - } - - if (dev_priv->dpi_panel_on[2]) - mdfld_dsi_brightness_control(dev, 2, - dev_priv->brightness_adjusted); - gma_power_end(dev); - } - - /* cache the brightness for later use */ - dev_priv->brightness = level; - return 0; -} - -static int mdfld_get_brightness(struct backlight_device *bd) -{ - struct drm_device *dev = - (struct drm_device *)bl_get_data(mdfld_backlight_device); - struct drm_psb_private *dev_priv = dev->dev_private; - - drm_debug_driver("brightness = 0x%x ", dev_priv->brightness); - - /* return locally cached var instead of hw read (due to dpst etc.) */ - return dev_priv->brightness; -} - -static const struct backlight_ops mdfld_ops = { - .get_brightness = mdfld_get_brightness, - .update_status = mdfld_set_brightness, -}; - -static int device_backlight_init(struct drm_device *dev) -{ - struct drm_psb_private *dev_priv = (struct drm_psb_private *) - dev->dev_private; - - dev_priv->blc_adj1 = blc_adjustment_max; - dev_priv->blc_adj2 = blc_adjustment_max; - - return 0; -} - -static int mdfld_backlight_init(struct drm_device *dev) -{ - struct backlight_properties props; - int ret = 0; - - memset(&props, 0, sizeof(struct backlight_properties)); - props.max_brightness = brightness_max_level; - props.type = backlight_platform; - mdfld_backlight_device = backlight_device_register("mdfld-bl", - null, (void *)dev, &mdfld_ops, &props); - - if (is_err(mdfld_backlight_device)) - return ptr_err(mdfld_backlight_device); - - ret = device_backlight_init(dev); - if (ret) - return ret; - - mdfld_backlight_device->props.brightness = brightness_max_level; - mdfld_backlight_device->props.max_brightness = brightness_max_level; - backlight_update_status(mdfld_backlight_device); - return 0; -} -#endif - -struct backlight_device *mdfld_get_backlight_device(void) -{ -#ifdef config_backlight_class_device - return mdfld_backlight_device; -#else - return null; -#endif -} - -/* - * mdfld_save_display_registers - * - * description: we are going to suspend so save current display - * register state. - * - * notes: fixme_jliu7 need to add the support for dpi mipi & hdmi audio - */ -static int mdfld_save_display_registers(struct drm_device *dev, int pipenum) -{ - struct drm_psb_private *dev_priv = dev->dev_private; - struct medfield_state *regs = &dev_priv->regs.mdfld; - struct psb_pipe *pipe = &dev_priv->regs.pipe[pipenum]; - const struct psb_offset *map = &dev_priv->regmap[pipenum]; - int i; - u32 *mipi_val; - - /* register */ - u32 mipi_reg = mipi; - - switch (pipenum) { - case 0: - mipi_val = ®s->savemipi; - break; - case 1: - mipi_val = ®s->savemipi; - break; - case 2: - /* register */ - mipi_reg = mipi_c; - /* pointer to values */ - mipi_val = ®s->savemipi_c; - break; - default: - drm_error("%s, invalid pipe number. ", __func__); - return -einval; - } - - /* pipe & plane a info */ - pipe->dpll = psb_rvdc32(map->dpll); - pipe->fp0 = psb_rvdc32(map->fp0); - pipe->conf = psb_rvdc32(map->conf); - pipe->htotal = psb_rvdc32(map->htotal); - pipe->hblank = psb_rvdc32(map->hblank); - pipe->hsync = psb_rvdc32(map->hsync); - pipe->vtotal = psb_rvdc32(map->vtotal); - pipe->vblank = psb_rvdc32(map->vblank); - pipe->vsync = psb_rvdc32(map->vsync); - pipe->src = psb_rvdc32(map->src); - pipe->stride = psb_rvdc32(map->stride); - pipe->linoff = psb_rvdc32(map->linoff); - pipe->tileoff = psb_rvdc32(map->tileoff); - pipe->size = psb_rvdc32(map->size); - pipe->pos = psb_rvdc32(map->pos); - pipe->surf = psb_rvdc32(map->surf); - pipe->cntr = psb_rvdc32(map->cntr); - pipe->status = psb_rvdc32(map->status); - - /*save palette (gamma) */ - for (i = 0; i < 256; i++) - pipe->palette[i] = psb_rvdc32(map->palette + (i << 2)); - - if (pipenum == 1) { - regs->savepfit_control = psb_rvdc32(pfit_control); - regs->savepfit_pgm_ratios = psb_rvdc32(pfit_pgm_ratios); - - regs->savehdmiphymiscctl = psb_rvdc32(hdmiphymiscctl); - regs->savehdmib_control = psb_rvdc32(hdmib_control); - return 0; - } - - *mipi_val = psb_rvdc32(mipi_reg); - return 0; -} - -/* - * mdfld_restore_display_registers - * - * description: we are going to resume so restore display register state. - * - * notes: fixme_jliu7 need to add the support for dpi mipi & hdmi audio - */ -static int mdfld_restore_display_registers(struct drm_device *dev, int pipenum) -{ - /* to get panel out of ulps mode. */ - u32 temp = 0; - u32 device_ready_reg = device_ready_reg; - struct drm_psb_private *dev_priv = dev->dev_private; - struct mdfld_dsi_config *dsi_config = null; - struct medfield_state *regs = &dev_priv->regs.mdfld; - struct psb_pipe *pipe = &dev_priv->regs.pipe[pipenum]; - const struct psb_offset *map = &dev_priv->regmap[pipenum]; - u32 i; - u32 dpll; - u32 timeout = 0; - - /* register */ - u32 mipi_reg = mipi; - - /* values */ - u32 dpll_val = pipe->dpll; - u32 mipi_val = regs->savemipi; - - switch (pipenum) { - case 0: - dpll_val &= ~dpll_vco_enable; - dsi_config = dev_priv->dsi_configs[0]; - break; - case 1: - dpll_val &= ~dpll_vco_enable; - break; - case 2: - mipi_reg = mipi_c; - mipi_val = regs->savemipi_c; - dsi_config = dev_priv->dsi_configs[1]; - break; - default: - drm_error("%s, invalid pipe number. ", __func__); - return -einval; - } - - /*make sure vga plane is off. it initializes to on after reset!*/ - psb_wvdc32(0x80000000, vgacntrl); - - if (pipenum == 1) { - psb_wvdc32(dpll_val & ~dpll_vco_enable, map->dpll); - psb_rvdc32(map->dpll); - - psb_wvdc32(pipe->fp0, map->fp0); - } else { - - dpll = psb_rvdc32(map->dpll); - - if (!(dpll & dpll_vco_enable)) { - - /* when ungating power of dpll, needs to wait 0.5us - before enable the vco */ - if (dpll & mdfld_pwr_gate_en) { - dpll &= ~mdfld_pwr_gate_en; - psb_wvdc32(dpll, map->dpll); - /* fixme_mdfld po - change 500 to 1 after po */ - udelay(500); - } - - psb_wvdc32(pipe->fp0, map->fp0); - psb_wvdc32(dpll_val, map->dpll); - /* fixme_mdfld po - change 500 to 1 after po */ - udelay(500); - - dpll_val |= dpll_vco_enable; - psb_wvdc32(dpll_val, map->dpll); - psb_rvdc32(map->dpll); - - /* wait for dsi pll to lock */ - while (timeout < 20000 && - !(psb_rvdc32(map->conf) & pipeconf_dsipll_lock)) { - udelay(150); - timeout++; - } - - if (timeout == 20000) { - drm_error("%s, can't lock dsipll. ", - __func__); - return -einval; - } - } - } - /* restore mode */ - psb_wvdc32(pipe->htotal, map->htotal); - psb_wvdc32(pipe->hblank, map->hblank); - psb_wvdc32(pipe->hsync, map->hsync); - psb_wvdc32(pipe->vtotal, map->vtotal); - psb_wvdc32(pipe->vblank, map->vblank); - psb_wvdc32(pipe->vsync, map->vsync); - psb_wvdc32(pipe->src, map->src); - psb_wvdc32(pipe->status, map->status); - - /*set up the plane*/ - psb_wvdc32(pipe->stride, map->stride); - psb_wvdc32(pipe->linoff, map->linoff); - psb_wvdc32(pipe->tileoff, map->tileoff); - psb_wvdc32(pipe->size, map->size); - psb_wvdc32(pipe->pos, map->pos); - psb_wvdc32(pipe->surf, map->surf); - - if (pipenum == 1) { - /* restore palette (gamma) */ - /* udelay(50000); */ - for (i = 0; i < 256; i++) - psb_wvdc32(pipe->palette[i], map->palette + (i << 2)); - - psb_wvdc32(regs->savepfit_control, pfit_control); - psb_wvdc32(regs->savepfit_pgm_ratios, pfit_pgm_ratios); - - /*todo: resume hdmi port */ - - /*todo: resume pipe*/ - - /*enable the plane*/ - psb_wvdc32(pipe->cntr & ~display_plane_enable, map->cntr); - - return 0; - } - - /*set up pipe related registers*/ - psb_wvdc32(mipi_val, mipi_reg); - - /*setup mipi adapter + mipi ip registers*/ - if (dsi_config) - mdfld_dsi_controller_init(dsi_config, pipenum); - - if (in_atomic() || in_interrupt()) - mdelay(20); - else - msleep(20); - - /*enable the plane*/ - psb_wvdc32(pipe->cntr, map->cntr); - - if (in_atomic() || in_interrupt()) - mdelay(20); - else - msleep(20); - - /* lp hold release */ - temp = reg_read(mipi_reg); - temp |= lp_output_hold_release; - reg_write(mipi_reg, temp); - mdelay(1); - - - /* set dsi host to exit from utra low power state */ - temp = reg_read(device_ready_reg); - temp &= ~ulps_mask; - temp |= 0x3; - temp |= exit_ulps_dev_ready; - reg_write(device_ready_reg, temp); - mdelay(1); - - temp = reg_read(device_ready_reg); - temp &= ~ulps_mask; - temp |= exiting_ulps; - reg_write(device_ready_reg, temp); - mdelay(1); - - /*enable the pipe*/ - psb_wvdc32(pipe->conf, map->conf); - - /* restore palette (gamma) */ - /* udelay(50000); */ - for (i = 0; i < 256; i++) - psb_wvdc32(pipe->palette[i], map->palette + (i << 2)); - - return 0; -} - -static int mdfld_save_registers(struct drm_device *dev) -{ - /* mdfld_save_cursor_overlay_registers(dev); */ - mdfld_save_display_registers(dev, 0); - mdfld_save_display_registers(dev, 2); - mdfld_disable_crtc(dev, 0); - mdfld_disable_crtc(dev, 2); - - return 0; -} - -static int mdfld_restore_registers(struct drm_device *dev) -{ - mdfld_restore_display_registers(dev, 2); - mdfld_restore_display_registers(dev, 0); - /* mdfld_restore_cursor_overlay_registers(dev); */ - - return 0; -} - -static int mdfld_power_down(struct drm_device *dev) -{ - /* fixme */ - return 0; -} - -static int mdfld_power_up(struct drm_device *dev) -{ - /* fixme */ - return 0; -} - -/* medfield */ -static const struct psb_offset mdfld_regmap[3] = { - { - .fp0 = mrst_fpa0, - .fp1 = mrst_fpa1, - .cntr = dspacntr, - .conf = pipeaconf, - .src = pipeasrc, - .dpll = mrst_dpll_a, - .htotal = htotal_a, - .hblank = hblank_a, - .hsync = hsync_a, - .vtotal = vtotal_a, - .vblank = vblank_a, - .vsync = vsync_a, - .stride = dspastride, - .size = dspasize, - .pos = dspapos, - .surf = dspasurf, - .addr = mrst_dspabase, - .status = pipeastat, - .linoff = dspalinoff, - .tileoff = dspatileoff, - .palette = palette_a, - }, - { - .fp0 = mdfld_dpll_div0, - .cntr = dspbcntr, - .conf = pipebconf, - .src = pipebsrc, - .dpll = mdfld_dpll_b, - .htotal = htotal_b, - .hblank = hblank_b, - .hsync = hsync_b, - .vtotal = vtotal_b, - .vblank = vblank_b, - .vsync = vsync_b, - .stride = dspbstride, - .size = dspbsize, - .pos = dspbpos, - .surf = dspbsurf, - .addr = mrst_dspbbase, - .status = pipebstat, - .linoff = dspblinoff, - .tileoff = dspbtileoff, - .palette = palette_b, - }, - { - .fp0 = mrst_fpa0, /* this is what the old code did ?? */ - .cntr = dspccntr, - .conf = pipecconf, - .src = pipecsrc, - /* no dpll_c */ - .dpll = mrst_dpll_a, - .htotal = htotal_c, - .hblank = hblank_c, - .hsync = hsync_c, - .vtotal = vtotal_c, - .vblank = vblank_c, - .vsync = vsync_c, - .stride = dspcstride, - .size = dspbsize, - .pos = dspcpos, - .surf = dspcsurf, - .addr = mdfld_dspcbase, - .status = pipecstat, - .linoff = dspclinoff, - .tileoff = dspctileoff, - .palette = palette_c, - }, -}; - -/* - * the gpio lines for resetting dsi pipe 0 and 2 are available in the - * pci device 0000:00:0c.0 on the medfield. - */ -static struct gpiod_lookup_table mdfld_dsi_pipe_gpio_table = { - .table = { - gpio_lookup("0000:00:0c.0", 128, "dsi-pipe0-reset", - gpio_active_high), - gpio_lookup("0000:00:0c.0", 34, "dsi-pipe2-reset", - gpio_active_high), - { }, - }, -}; - -static int mdfld_chip_setup(struct drm_device *dev) -{ - struct drm_psb_private *dev_priv = dev->dev_private; - struct pci_dev *pdev = to_pci_dev(dev->dev); - - if (pci_enable_msi(pdev)) - dev_warn(dev->dev, "enabling msi failed! "); - dev_priv->regmap = mdfld_regmap; - - /* associate the gpio lines with the drm device */ - mdfld_dsi_pipe_gpio_table.dev_id = dev_name(dev->dev); - gpiod_add_lookup_table(&mdfld_dsi_pipe_gpio_table); - - return mid_chip_setup(dev); -} - -const struct psb_ops mdfld_chip_ops = { - .name = "mdfld", - .pipes = 3, - .crtcs = 3, - .lvds_mask = (1 << 1), - .hdmi_mask = (1 << 1), - .cursor_needs_phys = 0, - .sgx_offset = mrst_sgx_offset, - - .chip_setup = mdfld_chip_setup, - .crtc_helper = &mdfld_helper_funcs, - .crtc_funcs = &psb_intel_crtc_funcs, - - .output_init = mdfld_output_init, - -#ifdef config_backlight_class_device - .backlight_init = mdfld_backlight_init, -#endif - - .save_regs = mdfld_save_registers, - .restore_regs = mdfld_restore_registers, - .save_crtc = gma_crtc_save, - .restore_crtc = gma_crtc_restore, - .power_down = mdfld_power_down, - .power_up = mdfld_power_up, -}; diff --git a/drivers/gpu/drm/gma500/mdfld_dsi_dpi.c b/drivers/gpu/drm/gma500/mdfld_dsi_dpi.c --- a/drivers/gpu/drm/gma500/mdfld_dsi_dpi.c +++ /dev/null -/* - * copyright ©️ 2010 intel corporation - * - * permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "software"), - * to deal in the software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the software, and to permit persons to whom the - * software is furnished to do so, subject to the following conditions: - * - * the above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * software. - * - * the software is provided "as is", without warranty of any kind, express or - * implied, including but not limited to the warranties of merchantability, - * fitness for a particular purpose and noninfringement. in no event shall - * the authors or copyright holders be liable for any claim, damages or other - * liability, whether in an action of contract, tort or otherwise, arising - * from, out of or in connection with the software or the use or other - * dealings in the software. - * - * authors: - * jim liu <jim.liu@intel.com> - * jackie li<yaodong.li@intel.com> - */ - -#include <linux/delay.h> - -#include <drm/drm_simple_kms_helper.h> - -#include "mdfld_dsi_dpi.h" -#include "mdfld_dsi_pkg_sender.h" -#include "mdfld_output.h" -#include "psb_drv.h" -#include "tc35876x-dsi-lvds.h" - -static void mdfld_dsi_dpi_shut_down(struct mdfld_dsi_dpi_output *output, - int pipe); - -static void mdfld_wait_for_hs_data_fifo(struct drm_device *dev, u32 pipe) -{ - u32 gen_fifo_stat_reg = mipi_gen_fifo_stat_reg(pipe); - int timeout = 0; - - udelay(500); - - /* this will time out after approximately 2+ seconds */ - while ((timeout < 20000) && - (reg_read(gen_fifo_stat_reg) & dsi_fifo_gen_hs_data_full)) { - udelay(100); - timeout++; - } - - if (timeout == 20000) - drm_info("mipi: hs data fifo was never cleared! "); -} - -static void mdfld_wait_for_hs_ctrl_fifo(struct drm_device *dev, u32 pipe) -{ - u32 gen_fifo_stat_reg = mipi_gen_fifo_stat_reg(pipe); - int timeout = 0; - - udelay(500); - - /* this will time out after approximately 2+ seconds */ - while ((timeout < 20000) && (reg_read(gen_fifo_stat_reg) - & dsi_fifo_gen_hs_ctrl_full)) { - udelay(100); - timeout++; - } - if (timeout == 20000) - drm_info("mipi: hs cmd fifo was never cleared! "); -} - -static void mdfld_wait_for_dpi_ctrl_fifo(struct drm_device *dev, u32 pipe) -{ - u32 gen_fifo_stat_reg = mipi_gen_fifo_stat_reg(pipe); - int timeout = 0; - - udelay(500); - - /* this will time out after approximately 2+ seconds */ - while ((timeout < 20000) && ((reg_read(gen_fifo_stat_reg) & - dpi_fifo_empty) != dpi_fifo_empty)) { - udelay(100); - timeout++; - } - - if (timeout == 20000) - drm_error("mipi: dpi fifo was never cleared "); -} - -static void mdfld_wait_for_spl_pkg_sent(struct drm_device *dev, u32 pipe) -{ - u32 intr_stat_reg = mipi_intr_stat_reg(pipe); - int timeout = 0; - - udelay(500); - - /* this will time out after approximately 2+ seconds */ - while ((timeout < 20000) && (!(reg_read(intr_stat_reg) - & dsi_intr_state_spl_pkg_sent))) { - udelay(100); - timeout++; - } - - if (timeout == 20000) - drm_error("mipi: spl_pkt_sent_interrupt was not sent successfully! "); -} - -/* for tc35876x */ - -static void dsi_set_device_ready_state(struct drm_device *dev, int state, - int pipe) -{ - reg_fld_mod(mipi_device_ready_reg(pipe), !!state, 0, 0); -} - -static void dsi_set_pipe_plane_enable_state(struct drm_device *dev, - int state, int pipe) -{ - struct drm_psb_private *dev_priv = dev->dev_private; - u32 pipeconf_reg = pipeaconf; - u32 dspcntr_reg = dspacntr; - - u32 dspcntr = dev_priv->dspcntr[pipe]; - u32 mipi = mipi_port_en | pass_from_sphy_to_afe | sel_flopped_hstx; - - if (pipe) { - pipeconf_reg = pipecconf; - dspcntr_reg = dspccntr; - } else - mipi &= (~0x03); - - if (state) { - /*set up pipe */ - reg_write(pipeconf_reg, bit(31)); - - if (reg_bit_wait(pipeconf_reg, 1, 30)) - dev_err(dev->dev, "%s: pipe enable timeout ", - __func__); - - /*set up display plane */ - reg_write(dspcntr_reg, dspcntr); - } else { - u32 dspbase_reg = pipe ? mdfld_dspcbase : mrst_dspabase; - - /* put dsi lanes to ulps to disable pipe */ - reg_fld_mod(mipi_device_ready_reg(pipe), 2, 2, 1); - reg_read(mipi_device_ready_reg(pipe)); /* posted write? */ - - /* lp hold */ - reg_fld_mod(mipi_port_control(pipe), 0, 16, 16); - reg_read(mipi_port_control(pipe)); /* posted write? */ - - /* disable display plane */ - reg_fld_mod(dspcntr_reg, 0, 31, 31); - - /* flush the plane changes ??? posted write? */ - reg_write(dspbase_reg, reg_read(dspbase_reg)); - reg_read(dspbase_reg); - - /* disable pipe */ - reg_fld_mod(pipeconf_reg, 0, 31, 31); - - if (reg_bit_wait(pipeconf_reg, 0, 30)) - dev_err(dev->dev, "%s: pipe disable timeout ", - __func__); - - if (reg_bit_wait(mipi_gen_fifo_stat_reg(pipe), 1, 28)) - dev_err(dev->dev, "%s: fifo not empty ", - __func__); - } -} - -static void mdfld_dsi_configure_down(struct mdfld_dsi_encoder *dsi_encoder, - int pipe) -{ - struct mdfld_dsi_dpi_output *dpi_output = - mdfld_dsi_dpi_output(dsi_encoder); - struct mdfld_dsi_config *dsi_config = - mdfld_dsi_encoder_get_config(dsi_encoder); - struct drm_device *dev = dsi_config->dev; - struct drm_psb_private *dev_priv = dev->dev_private; - - if (!dev_priv->dpi_panel_on[pipe]) { - dev_err(dev->dev, "dpi panel is already off "); - return; - } - tc35876x_toshiba_bridge_panel_off(dev); - tc35876x_set_bridge_reset_state(dev, 1); - dsi_set_pipe_plane_enable_state(dev, 0, pipe); - mdfld_dsi_dpi_shut_down(dpi_output, pipe); - dsi_set_device_ready_state(dev, 0, pipe); -} - -static void mdfld_dsi_configure_up(struct mdfld_dsi_encoder *dsi_encoder, - int pipe) -{ - struct mdfld_dsi_dpi_output *dpi_output = - mdfld_dsi_dpi_output(dsi_encoder); - struct mdfld_dsi_config *dsi_config = - mdfld_dsi_encoder_get_config(dsi_encoder); - struct drm_device *dev = dsi_config->dev; - struct drm_psb_private *dev_priv = dev->dev_private; - - if (dev_priv->dpi_panel_on[pipe]) { - dev_err(dev->dev, "dpi panel is already on "); - return; - } - - /* for resume path sequence */ - mdfld_dsi_dpi_shut_down(dpi_output, pipe); - dsi_set_device_ready_state(dev, 0, pipe); - - dsi_set_device_ready_state(dev, 1, pipe); - tc35876x_set_bridge_reset_state(dev, 0); - tc35876x_configure_lvds_bridge(dev); - mdfld_dsi_dpi_turn_on(dpi_output, pipe); /* send turn on command */ - dsi_set_pipe_plane_enable_state(dev, 1, pipe); -} -/* end for tc35876x */ - -/* ************************************************************************* *\ - * function: mdfld_dsi_tpo_ic_init - * - * description: this function is called only by mrst_dsi_mode_set and - * restore_display_registers. since this function does not - * acquire the mutex, it is important that the calling function - * does! -\* ************************************************************************* */ -static void mdfld_dsi_tpo_ic_init(struct mdfld_dsi_config *dsi_config, u32 pipe) -{ - struct drm_device *dev = dsi_config->dev; - u32 dcschannelnumber = dsi_config->channel_num; - u32 gen_data_reg = mipi_hs_gen_data_reg(pipe); - u32 gen_ctrl_reg = mipi_hs_gen_ctrl_reg(pipe); - u32 gen_ctrl_val = gen_long_write; - - drm_info("enter mrst init tpo mipi display. "); - - gen_ctrl_val |= dcschannelnumber << dcs_channel_number_pos; - - /* flip page order */ - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x00008036); - mdfld_wait_for_hs_ctrl_fifo(dev, pipe); - reg_write(gen_ctrl_reg, gen_ctrl_val | (0x02 << word_counts_pos)); - - /* 0xf0 */ - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x005a5af0); - mdfld_wait_for_hs_ctrl_fifo(dev, pipe); - reg_write(gen_ctrl_reg, gen_ctrl_val | (0x03 << word_counts_pos)); - - /* write protection key */ - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x005a5af1); - mdfld_wait_for_hs_ctrl_fifo(dev, pipe); - reg_write(gen_ctrl_reg, gen_ctrl_val | (0x03 << word_counts_pos)); - - /* 0xfc */ - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x005a5afc); - mdfld_wait_for_hs_ctrl_fifo(dev, pipe); - reg_write(gen_ctrl_reg, gen_ctrl_val | (0x03 << word_counts_pos)); - - /* 0xb7 */ - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x770000b7); - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x00000044); - mdfld_wait_for_hs_ctrl_fifo(dev, pipe); - reg_write(gen_ctrl_reg, gen_ctrl_val | (0x05 << word_counts_pos)); - - /* 0xb6 */ - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x000a0ab6); - mdfld_wait_for_hs_ctrl_fifo(dev, pipe); - reg_write(gen_ctrl_reg, gen_ctrl_val | (0x03 << word_counts_pos)); - - /* 0xf2 */ - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x081010f2); - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x4a070708); - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x000000c5); - mdfld_wait_for_hs_ctrl_fifo(dev, pipe); - reg_write(gen_ctrl_reg, gen_ctrl_val | (0x09 << word_counts_pos)); - - /* 0xf8 */ - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x024003f8); - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x01030a04); - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x0e020220); - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x00000004); - mdfld_wait_for_hs_ctrl_fifo(dev, pipe); - reg_write(gen_ctrl_reg, gen_ctrl_val | (0x0d << word_counts_pos)); - - /* 0xe2 */ - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x398fc3e2); - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x0000916f); - mdfld_wait_for_hs_ctrl_fifo(dev, pipe); - reg_write(gen_ctrl_reg, gen_ctrl_val | (0x06 << word_counts_pos)); - - /* 0xb0 */ - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x000000b0); - mdfld_wait_for_hs_ctrl_fifo(dev, pipe); - reg_write(gen_ctrl_reg, gen_ctrl_val | (0x02 << word_counts_pos)); - - /* 0xf4 */ - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x240242f4); - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x78ee2002); - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x2a071050); - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x507fee10); - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x10300710); - mdfld_wait_for_hs_ctrl_fifo(dev, pipe); - reg_write(gen_ctrl_reg, gen_ctrl_val | (0x14 << word_counts_pos)); - - /* 0xba */ - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x19fe07ba); - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x101c0a31); - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x00000010); - mdfld_wait_for_hs_ctrl_fifo(dev, pipe); - reg_write(gen_ctrl_reg, gen_ctrl_val | (0x09 << word_counts_pos)); - - /* 0xbb */ - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x28ff07bb); - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x24280a31); - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x00000034); - mdfld_wait_for_hs_ctrl_fifo(dev, pipe); - reg_write(gen_ctrl_reg, gen_ctrl_val | (0x09 << word_counts_pos)); - - /* 0xfb */ - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x535d05fb); - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x1b1a2130); - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x221e180e); - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x131d2120); - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x535d0508); - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x1c1a2131); - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x231f160d); - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x111b2220); - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x535c2008); - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x1f1d2433); - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x2c251a10); - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x2c34372d); - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x00000023); - mdfld_wait_for_hs_ctrl_fifo(dev, pipe); - reg_write(gen_ctrl_reg, gen_ctrl_val | (0x31 << word_counts_pos)); - - /* 0xfa */ - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x525c0bfa); - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x1c1c232f); - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x2623190e); - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x18212625); - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x545d0d0e); - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x1e1d2333); - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x26231a10); - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x1a222725); - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x545d280f); - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x21202635); - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x31292013); - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x31393d33); - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x00000029); - mdfld_wait_for_hs_ctrl_fifo(dev, pipe); - reg_write(gen_ctrl_reg, gen_ctrl_val | (0x31 << word_counts_pos)); - - /* set dm */ - mdfld_wait_for_hs_data_fifo(dev, pipe); - reg_write(gen_data_reg, 0x000100f7); - mdfld_wait_for_hs_ctrl_fifo(dev, pipe); - reg_write(gen_ctrl_reg, gen_ctrl_val | (0x03 << word_counts_pos)); -} - -static u16 mdfld_dsi_dpi_to_byte_clock_count(int pixel_clock_count, - int num_lane, int bpp) -{ - return (u16)((pixel_clock_count * bpp) / (num_lane * 8)); -} - -/* - * calculate the dpi time basing on a given drm mode @mode - * return 0 on success. - * fixme: i was using proposed mode value for calculation, may need to - * use crtc mode values later - */ -int mdfld_dsi_dpi_timing_calculation(struct drm_display_mode *mode, - struct mdfld_dsi_dpi_timing *dpi_timing, - int num_lane, int bpp) -{ - int pclk_hsync, pclk_hfp, pclk_hbp, pclk_hactive; - int pclk_vsync, pclk_vfp, pclk_vbp; - - pclk_hactive = mode->hdisplay; - pclk_hfp = mode->hsync_start - mode->hdisplay; - pclk_hsync = mode->hsync_end - mode->hsync_start; - pclk_hbp = mode->htotal - mode->hsync_end; - - pclk_vfp = mode->vsync_start - mode->vdisplay; - pclk_vsync = mode->vsync_end - mode->vsync_start; - pclk_vbp = mode->vtotal - mode->vsync_end; - - /* - * byte clock counts were calculated by following formula - * bclock_count = pclk_count * bpp / num_lane / 8 - */ - dpi_timing->hsync_count = mdfld_dsi_dpi_to_byte_clock_count( - pclk_hsync, num_lane, bpp); - dpi_timing->hbp_count = mdfld_dsi_dpi_to_byte_clock_count( - pclk_hbp, num_lane, bpp); - dpi_timing->hfp_count = mdfld_dsi_dpi_to_byte_clock_count( - pclk_hfp, num_lane, bpp); - dpi_timing->hactive_count = mdfld_dsi_dpi_to_byte_clock_count( - pclk_hactive, num_lane, bpp); - dpi_timing->vsync_count = mdfld_dsi_dpi_to_byte_clock_count( - pclk_vsync, num_lane, bpp); - dpi_timing->vbp_count = mdfld_dsi_dpi_to_byte_clock_count( - pclk_vbp, num_lane, bpp); - dpi_timing->vfp_count = mdfld_dsi_dpi_to_byte_clock_count( - pclk_vfp, num_lane, bpp); - - return 0; -} - -void mdfld_dsi_dpi_controller_init(struct mdfld_dsi_config *dsi_config, - int pipe) -{ - struct drm_device *dev = dsi_config->dev; - int lane_count = dsi_config->lane_count; - struct mdfld_dsi_dpi_timing dpi_timing; - struct drm_display_mode *mode = dsi_config->mode; - u32 val; - - /*un-ready device*/ - reg_fld_mod(mipi_device_ready_reg(pipe), 0, 0, 0); - - /*init dsi adapter before kicking off*/ - reg_write(mipi_ctrl_reg(pipe), 0x00000018); - - /*enable all interrupts*/ - reg_write(mipi_intr_en_reg(pipe), 0xffffffff); - - /*set up func_prg*/ - val = lane_count; - val |= dsi_config->channel_num << dsi_dpi_virt_channel_offset; - - switch (dsi_config->bpp) { - case 16: - val |= dsi_dpi_color_format_rgb565; - break; - case 18: - val |= dsi_dpi_color_format_rgb666; - break; - case 24: - val |= dsi_dpi_color_format_rgb888; - break; - default: - drm_error("unsupported color format, bpp = %d ", - dsi_config->bpp); - } - reg_write(mipi_dsi_func_prg_reg(pipe), val); - - reg_write(mipi_hs_tx_timeout_reg(pipe), - (mode->vtotal * mode->htotal * dsi_config->bpp / - (8 * lane_count)) & dsi_hs_tx_timeout_mask); - reg_write(mipi_lp_rx_timeout_reg(pipe), - 0xffff & dsi_lp_rx_timeout_mask); - - /*max value: 20 clock cycles of txclkesc*/ - reg_write(mipi_turn_around_timeout_reg(pipe), - 0x14 & dsi_turn_around_timeout_mask); - - /*min 21 txclkesc, max: ffffh*/ - reg_write(mipi_device_reset_timer_reg(pipe), - 0xffff & dsi_reset_timer_mask); - - reg_write(mipi_dpi_resolution_reg(pipe), - mode->vdisplay << 16 | mode->hdisplay); - - /*set dpi timing registers*/ - mdfld_dsi_dpi_timing_calculation(mode, &dpi_timing, - dsi_config->lane_count, dsi_config->bpp); - - reg_write(mipi_hsync_count_reg(pipe), - dpi_timing.hsync_count & dsi_dpi_timing_mask); - reg_write(mipi_hbp_count_reg(pipe), - dpi_timing.hbp_count & dsi_dpi_timing_mask); - reg_write(mipi_hfp_count_reg(pipe), - dpi_timing.hfp_count & dsi_dpi_timing_mask); - reg_write(mipi_hactive_count_reg(pipe), - dpi_timing.hactive_count & dsi_dpi_timing_mask); - reg_write(mipi_vsync_count_reg(pipe), - dpi_timing.vsync_count & dsi_dpi_timing_mask); - reg_write(mipi_vbp_count_reg(pipe), - dpi_timing.vbp_count & dsi_dpi_timing_mask); - reg_write(mipi_vfp_count_reg(pipe), - dpi_timing.vfp_count & dsi_dpi_timing_mask); - - reg_write(mipi_high_low_switch_count_reg(pipe), 0x46); - - /*min: 7d0 max: 4e20*/ - reg_write(mipi_init_count_reg(pipe), 0x000007d0); - - /*set up video mode*/ - val = dsi_config->video_mode | dsi_dpi_complete_last_line; - reg_write(mipi_video_mode_format_reg(pipe), val); - - reg_write(mipi_eot_disable_reg(pipe), 0x00000000); - - reg_write(mipi_lp_byteclk_reg(pipe), 0x00000004); - - /*todo: figure out how to setup these registers*/ - if (mdfld_get_panel_type(dev, pipe) == tc35876x) - reg_write(mipi_dphy_param_reg(pipe), 0x2a0c6008); - else - reg_write(mipi_dphy_param_reg(pipe), 0x150c3408); - - reg_write(mipi_clk_lane_switch_time_cnt_reg(pipe), (0xa << 16) | 0x14); - - if (mdfld_get_panel_type(dev, pipe) == tc35876x) - tc35876x_set_bridge_reset_state(dev, 0); /*pull high reset */ - - /*set device ready*/ - reg_fld_mod(mipi_device_ready_reg(pipe), 1, 0, 0); -} - -void mdfld_dsi_dpi_turn_on(struct mdfld_dsi_dpi_output *output, int pipe) -{ - struct drm_device *dev = output->dev; - - /* clear special packet sent bit */ - if (reg_read(mipi_intr_stat_reg(pipe)) & dsi_intr_state_spl_pkg_sent) - reg_write(mipi_intr_stat_reg(pipe), - dsi_intr_state_spl_pkg_sent); - - /*send turn on package*/ - reg_write(mipi_dpi_control_reg(pipe), dsi_dpi_ctrl_hs_turn_on); - - /*wait for spl_pkg_sent interrupt*/ - mdfld_wait_for_spl_pkg_sent(dev, pipe); - - if (reg_read(mipi_intr_stat_reg(pipe)) & dsi_intr_state_spl_pkg_sent) - reg_write(mipi_intr_stat_reg(pipe), - dsi_intr_state_spl_pkg_sent); - - output->panel_on = 1; - - /* fixme the following is disabled to wa the x slow start issue - for tmd panel - if (pipe == 2) - dev_priv->dpi_panel_on2 = true; - else if (pipe == 0) - dev_priv->dpi_panel_on = true; */ -} - -static void mdfld_dsi_dpi_shut_down(struct mdfld_dsi_dpi_output *output, - int pipe) -{ - struct drm_device *dev = output->dev; - - /*if output is on, or mode setting didn't happen, ignore this*/ - if ((!output->panel_on) || output->first_boot) { - output->first_boot = 0; - return; - } - - /* wait for dpi fifo to empty */ - mdfld_wait_for_dpi_ctrl_fifo(dev, pipe); - - /* clear the special packet interrupt bit if set */ - if (reg_read(mipi_intr_stat_reg(pipe)) & dsi_intr_state_spl_pkg_sent) - reg_write(mipi_intr_stat_reg(pipe), - dsi_intr_state_spl_pkg_sent); - - if (reg_read(mipi_dpi_control_reg(pipe)) == dsi_dpi_ctrl_hs_shutdown) - goto shutdown_out; - - reg_write(mipi_dpi_control_reg(pipe), dsi_dpi_ctrl_hs_shutdown); - -shutdown_out: - output->panel_on = 0; - output->first_boot = 0; - - /* fixme the following is disabled to wa the x slow start issue - for tmd panel - if (pipe == 2) - dev_priv->dpi_panel_on2 = false; - else if (pipe == 0) - dev_priv->dpi_panel_on = false; */ -} - -static void mdfld_dsi_dpi_set_power(struct drm_encoder *encoder, bool on) -{ - struct mdfld_dsi_encoder *dsi_encoder = mdfld_dsi_encoder(encoder); - struct mdfld_dsi_dpi_output *dpi_output = - mdfld_dsi_dpi_output(dsi_encoder); - struct mdfld_dsi_config *dsi_config = - mdfld_dsi_encoder_get_config(dsi_encoder); - int pipe = mdfld_dsi_encoder_get_pipe(dsi_encoder); - struct drm_device *dev = dsi_config->dev; - struct drm_psb_private *dev_priv = dev->dev_private; - - /*start up display island if it was shutdown*/ - if (!gma_power_begin(dev, true)) - return; - - if (on) { - if (mdfld_get_panel_type(dev, pipe) == tmd_vid) - mdfld_dsi_dpi_turn_on(dpi_output, pipe); - else if (mdfld_get_panel_type(dev, pipe) == tc35876x) - mdfld_dsi_configure_up(dsi_encoder, pipe); - else { - /*enable mipi port*/ - reg_write(mipi_port_control(pipe), - reg_read(mipi_port_control(pipe)) | bit(31)); - reg_read(mipi_port_control(pipe)); - - mdfld_dsi_dpi_turn_on(dpi_output, pipe); - mdfld_dsi_tpo_ic_init(dsi_config, pipe); - } - dev_priv->dpi_panel_on[pipe] = true; - } else { - if (mdfld_get_panel_type(dev, pipe) == tmd_vid) - mdfld_dsi_dpi_shut_down(dpi_output, pipe); - else if (mdfld_get_panel_type(dev, pipe) == tc35876x) - mdfld_dsi_configure_down(dsi_encoder, pipe); - else { - mdfld_dsi_dpi_shut_down(dpi_output, pipe); - - /*disable mipi port*/ - reg_write(mipi_port_control(pipe), - reg_read(mipi_port_control(pipe)) & ~bit(31)); - reg_read(mipi_port_control(pipe)); - } - dev_priv->dpi_panel_on[pipe] = false; - } - gma_power_end(dev); -} - -void mdfld_dsi_dpi_dpms(struct drm_encoder *encoder, int mode) -{ - mdfld_dsi_dpi_set_power(encoder, mode == drm_mode_dpms_on); -} - -bool mdfld_dsi_dpi_mode_fixup(struct drm_encoder *encoder, - const struct drm_display_mode *mode, - struct drm_display_mode *adjusted_mode) -{ - struct mdfld_dsi_encoder *dsi_encoder = mdfld_dsi_encoder(encoder); - struct mdfld_dsi_config *dsi_config = - mdfld_dsi_encoder_get_config(dsi_encoder); - struct drm_display_mode *fixed_mode = dsi_config->fixed_mode; - - if (fixed_mode) { - adjusted_mode->hdisplay = fixed_mode->hdisplay; - adjusted_mode->hsync_start = fixed_mode->hsync_start; - adjusted_mode->hsync_end = fixed_mode->hsync_end; - adjusted_mode->htotal = fixed_mode->htotal; - adjusted_mode->vdisplay = fixed_mode->vdisplay; - adjusted_mode->vsync_start = fixed_mode->vsync_start; - adjusted_mode->vsync_end = fixed_mode->vsync_end; - adjusted_mode->vtotal = fixed_mode->vtotal; - adjusted_mode->clock = fixed_mode->clock; - drm_mode_set_crtcinfo(adjusted_mode, crtc_interlace_halve_v); - } - return true; -} - -void mdfld_dsi_dpi_prepare(struct drm_encoder *encoder) -{ - mdfld_dsi_dpi_set_power(encoder, false); -} - -void mdfld_dsi_dpi_commit(struct drm_encoder *encoder) -{ - mdfld_dsi_dpi_set_power(encoder, true); -} - -/* for tc35876x */ -/* this functionality was implemented in fw in icdk */ -/* but removed in dv0 and later. so need to add here. */ -static void mipi_set_properties(struct mdfld_dsi_config *dsi_config, int pipe) -{ - struct drm_device *dev = dsi_config->dev; - - reg_write(mipi_ctrl_reg(pipe), 0x00000018); - reg_write(mipi_intr_en_reg(pipe), 0xffffffff); - reg_write(mipi_hs_tx_timeout_reg(pipe), 0xffffff); - reg_write(mipi_lp_rx_timeout_reg(pipe), 0xffffff); - reg_write(mipi_turn_around_timeout_reg(pipe), 0x14); - reg_write(mipi_device_reset_timer_reg(pipe), 0xff); - reg_write(mipi_high_low_switch_count_reg(pipe), 0x25); - reg_write(mipi_init_count_reg(pipe), 0xf0); - reg_write(mipi_eot_disable_reg(pipe), 0x00000000); - reg_write(mipi_lp_byteclk_reg(pipe), 0x00000004); - reg_write(mipi_dbi_bw_ctrl_reg(pipe), 0x00000820); - reg_write(mipi_clk_lane_switch_time_cnt_reg(pipe), (0xa << 16) | 0x14); -} - -static void mdfld_mipi_set_video_timing(struct mdfld_dsi_config *dsi_config, - int pipe) -{ - struct drm_device *dev = dsi_config->dev; - struct mdfld_dsi_dpi_timing dpi_timing; - struct drm_display_mode *mode = dsi_config->mode; - - mdfld_dsi_dpi_timing_calculation(mode, &dpi_timing, - dsi_config->lane_count, - dsi_config->bpp); - - reg_write(mipi_dpi_resolution_reg(pipe), - mode->vdisplay << 16 | mode->hdisplay); - reg_write(mipi_hsync_count_reg(pipe), - dpi_timing.hsync_count & dsi_dpi_timing_mask); - reg_write(mipi_hbp_count_reg(pipe), - dpi_timing.hbp_count & dsi_dpi_timing_mask); - reg_write(mipi_hfp_count_reg(pipe), - dpi_timing.hfp_count & dsi_dpi_timing_mask); - reg_write(mipi_hactive_count_reg(pipe), - dpi_timing.hactive_count & dsi_dpi_timing_mask); - reg_write(mipi_vsync_count_reg(pipe), - dpi_timing.vsync_count & dsi_dpi_timing_mask); - reg_write(mipi_vbp_count_reg(pipe), - dpi_timing.vbp_count & dsi_dpi_timing_mask); - reg_write(mipi_vfp_count_reg(pipe), - dpi_timing.vfp_count & dsi_dpi_timing_mask); -} - -static void mdfld_mipi_config(struct mdfld_dsi_config *dsi_config, int pipe) -{ - struct drm_device *dev = dsi_config->dev; - int lane_count = dsi_config->lane_count; - - if (pipe) { - reg_write(mipi_port_control(0), 0x00000002); - reg_write(mipi_port_control(2), 0x80000000); - } else { - reg_write(mipi_port_control(0), 0x80010000); - reg_write(mipi_port_control(2), 0x00); - } - - reg_write(mipi_dphy_param_reg(pipe), 0x150a600f); - reg_write(mipi_video_mode_format_reg(pipe), 0x0000000f); - - /* lane_count = 3 */ - reg_write(mipi_dsi_func_prg_reg(pipe), 0x00000200 | lane_count); - - mdfld_mipi_set_video_timing(dsi_config, pipe); -} - -static void mdfld_set_pipe_timing(struct mdfld_dsi_config *dsi_config, int pipe) -{ - struct drm_device *dev = dsi_config->dev; - struct drm_display_mode *mode = dsi_config->mode; - - reg_write(htotal_a, ((mode->htotal - 1) << 16) | (mode->hdisplay - 1)); - reg_write(hblank_a, ((mode->htotal - 1) << 16) | (mode->hdisplay - 1)); - reg_write(hsync_a, - ((mode->hsync_end - 1) << 16) | (mode->hsync_start - 1)); - - reg_write(vtotal_a, ((mode->vtotal - 1) << 16) | (mode->vdisplay - 1)); - reg_write(vblank_a, ((mode->vtotal - 1) << 16) | (mode->vdisplay - 1)); - reg_write(vsync_a, - ((mode->vsync_end - 1) << 16) | (mode->vsync_start - 1)); - - reg_write(pipeasrc, - ((mode->hdisplay - 1) << 16) | (mode->vdisplay - 1)); -} -/* end for tc35876x */ - -void mdfld_dsi_dpi_mode_set(struct drm_encoder *encoder, - struct drm_display_mode *mode, - struct drm_display_mode *adjusted_mode) -{ - struct mdfld_dsi_encoder *dsi_encoder = mdfld_dsi_encoder(encoder); - struct mdfld_dsi_dpi_output *dpi_output = - mdfld_dsi_dpi_output(dsi_encoder); - struct mdfld_dsi_config *dsi_config = - mdfld_dsi_encoder_get_config(dsi_encoder); - struct drm_device *dev = dsi_config->dev; - struct drm_psb_private *dev_priv = dev->dev_private; - int pipe = mdfld_dsi_encoder_get_pipe(dsi_encoder); - u32 pipeconf_reg = pipeaconf; - u32 dspcntr_reg = dspacntr; - u32 pipeconf, dspcntr; - - u32 mipi = mipi_port_en | pass_from_sphy_to_afe | sel_flopped_hstx; - - if (warn_on(pipe < 0)) - return; - - pipeconf = dev_priv->pipeconf[pipe]; - dspcntr = dev_priv->dspcntr[pipe]; - - if (pipe) { - pipeconf_reg = pipecconf; - dspcntr_reg = dspccntr; - } else { - if (mdfld_get_panel_type(dev, pipe) == tc35876x) - mipi &= (~0x03); /* use all four lanes */ - else - mipi |= 2; - } - - /*start up display island if it was shutdown*/ - if (!gma_power_begin(dev, true)) - return; - - if (mdfld_get_panel_type(dev, pipe) == tc35876x) { - /* - * the following logic is required to reset the bridge and - * configure. this also starts the dsi clock at 200mhz. - */ - tc35876x_set_bridge_reset_state(dev, 0); /*pull high reset */ - tc35876x_toshiba_bridge_panel_on(dev); - udelay(100); - /* now start the dsi clock */ - reg_write(mrst_dpll_a, 0x00); - reg_write(mrst_fpa0, 0xc1); - reg_write(mrst_dpll_a, 0x00800000); - udelay(500); - reg_write(mrst_dpll_a, 0x80800000); - - if (reg_bit_wait(pipeconf_reg, 1, 29)) - dev_err(dev->dev, "%s: dsi pll lock timeout ", - __func__); - - reg_write(mipi_dphy_param_reg(pipe), 0x2a0c6008); - - mipi_set_properties(dsi_config, pipe); - mdfld_mipi_config(dsi_config, pipe); - mdfld_set_pipe_timing(dsi_config, pipe); - - reg_write(dspabase, 0x00); - reg_write(dspasize, - ((mode->vdisplay - 1) << 16) | (mode->hdisplay - 1)); - - reg_write(dspacntr, 0x98000000); - reg_write(dspasurf, 0x00); - - reg_write(vgacntrl, 0x80000000); - reg_write(device_ready_reg, 0x00000001); - - reg_write(mipi_port_control(pipe), 0x80810000); - } else { - /*set up mipi port fixme: do at init time */ - reg_write(mipi_port_control(pipe), mipi); - } - reg_read(mipi_port_control(pipe)); - - if (mdfld_get_panel_type(dev, pipe) == tmd_vid) { - /* nop */ - } else if (mdfld_get_panel_type(dev, pipe) == tc35876x) { - /* set up dsi controller dpi interface */ - mdfld_dsi_dpi_controller_init(dsi_config, pipe); - - /* configure mipi bridge and panel */ - tc35876x_configure_lvds_bridge(dev); - dev_priv->dpi_panel_on[pipe] = true; - } else { - /*turn on dpi interface*/ - mdfld_dsi_dpi_turn_on(dpi_output, pipe); - } - - /*set up pipe*/ - reg_write(pipeconf_reg, pipeconf); - reg_read(pipeconf_reg); - - /*set up display plane*/ - reg_write(dspcntr_reg, dspcntr); - reg_read(dspcntr_reg); - - msleep(20); /* fixme: this should wait for vblank */ - - if (mdfld_get_panel_type(dev, pipe) == tmd_vid) { - /* nop */ - } else if (mdfld_get_panel_type(dev, pipe) == tc35876x) { - mdfld_dsi_dpi_turn_on(dpi_output, pipe); - } else { - /* init driver ic */ - mdfld_dsi_tpo_ic_init(dsi_config, pipe); - /*init backlight*/ - mdfld_dsi_brightness_init(dsi_config, pipe); - } - - gma_power_end(dev); -} - -/* - * init dsi dpi encoder. - * allocate an mdfld_dsi_encoder and attach it to given @dsi_connector - * return pointer of newly allocated dpi encoder, null on error - */ -struct mdfld_dsi_encoder *mdfld_dsi_dpi_init(struct drm_device *dev, - struct mdfld_dsi_connector *dsi_connector, - const struct panel_funcs *p_funcs) -{ - struct mdfld_dsi_dpi_output *dpi_output = null; - struct mdfld_dsi_config *dsi_config; - struct drm_connector *connector = null; - struct drm_encoder *encoder = null; - int pipe; - u32 data; - int ret; - - pipe = dsi_connector->pipe; - - if (mdfld_get_panel_type(dev, pipe) != tc35876x) { - dsi_config = mdfld_dsi_get_config(dsi_connector); - - /* panel hard-reset */ - if (p_funcs->reset) { - ret = p_funcs->reset(dev, pipe); - if (ret) { - drm_error("panel %d hard-reset failed ", pipe); - return null; - } - } - - /* panel drvic init */ - if (p_funcs->drv_ic_init) - p_funcs->drv_ic_init(dsi_config, pipe); - - /* panel power mode detect */ - ret = mdfld_dsi_get_power_mode(dsi_config, &data, false); - if (ret) { - drm_error("panel %d get power mode failed ", pipe); - dsi_connector->status = connector_status_disconnected; - } else { - drm_info("pipe %d power mode 0x%x ", pipe, data); - dsi_connector->status = connector_status_connected; - } - } - - dpi_output = kzalloc(sizeof(struct mdfld_dsi_dpi_output), gfp_kernel); - if (!dpi_output) { - drm_error("no memory "); - return null; - } - - dpi_output->panel_on = 0; - dpi_output->dev = dev; - if (mdfld_get_panel_type(dev, pipe) != tc35876x) - dpi_output->p_funcs = p_funcs; - dpi_output->first_boot = 1; - - /*get fixed mode*/ - dsi_config = mdfld_dsi_get_config(dsi_connector); - - /*create drm encoder object*/ - connector = &dsi_connector->base.base; - encoder = &dpi_output->base.base.base; - drm_simple_encoder_init(dev, encoder, drm_mode_encoder_lvds); - drm_encoder_helper_add(encoder, - p_funcs->encoder_helper_funcs); - - /*attach to given connector*/ - drm_connector_attach_encoder(connector, encoder); - - /*set possible crtcs and clones*/ - if (dsi_connector->pipe) { - encoder->possible_crtcs = (1 << 2); - encoder->possible_clones = 0; - } else { - encoder->possible_crtcs = (1 << 0); - encoder->possible_clones = 0; - } - - dsi_connector->base.encoder = &dpi_output->base.base; - - return &dpi_output->base; -} diff --git a/drivers/gpu/drm/gma500/mdfld_dsi_dpi.h b/drivers/gpu/drm/gma500/mdfld_dsi_dpi.h --- a/drivers/gpu/drm/gma500/mdfld_dsi_dpi.h +++ /dev/null -/* - * copyright ©️ 2010 intel corporation - * - * permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "software"), - * to deal in the software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the software, and to permit persons to whom the - * software is furnished to do so, subject to the following conditions: - * - * the above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * software. - * - * the software is provided "as is", without warranty of any kind, express or - * implied, including but not limited to the warranties of merchantability, - * fitness for a particular purpose and noninfringement. in no event shall - * the authors or copyright holders be liable for any claim, damages or other - * liability, whether in an action of contract, tort or otherwise, arising - * from, out of or in connection with the software or the use or other - * dealings in the software. - * - * authors: - * jim liu <jim.liu@intel.com> - * jackie li<yaodong.li@intel.com> - */ - -#ifndef __mdfld_dsi_dpi_h__ -#define __mdfld_dsi_dpi_h__ - -#include "mdfld_dsi_output.h" -#include "mdfld_output.h" - -struct mdfld_dsi_dpi_timing { - u16 hsync_count; - u16 hbp_count; - u16 hfp_count; - u16 hactive_count; - u16 vsync_count; - u16 vbp_count; - u16 vfp_count; -}; - -struct mdfld_dsi_dpi_output { - struct mdfld_dsi_encoder base; - struct drm_device *dev; - - int panel_on; - int first_boot; - - const struct panel_funcs *p_funcs; -}; - -#define mdfld_dsi_dpi_output(dsi_encoder)\ - container_of(dsi_encoder, struct mdfld_dsi_dpi_output, base) - -/* export functions */ -extern int mdfld_dsi_dpi_timing_calculation(struct drm_display_mode *mode, - struct mdfld_dsi_dpi_timing *dpi_timing, - int num_lane, int bpp); -extern struct mdfld_dsi_encoder *mdfld_dsi_dpi_init(struct drm_device *dev, - struct mdfld_dsi_connector *dsi_connector, - const struct panel_funcs *p_funcs); - -/* mdfld dpi helper functions */ -extern void mdfld_dsi_dpi_dpms(struct drm_encoder *encoder, int mode); -extern bool mdfld_dsi_dpi_mode_fixup(struct drm_encoder *encoder, - const struct drm_display_mode *mode, - struct drm_display_mode *adjusted_mode); -extern void mdfld_dsi_dpi_prepare(struct drm_encoder *encoder); -extern void mdfld_dsi_dpi_commit(struct drm_encoder *encoder); -extern void mdfld_dsi_dpi_mode_set(struct drm_encoder *encoder, - struct drm_display_mode *mode, - struct drm_display_mode *adjusted_mode); -extern void mdfld_dsi_dpi_turn_on(struct mdfld_dsi_dpi_output *output, - int pipe); -extern void mdfld_dsi_dpi_controller_init(struct mdfld_dsi_config *dsi_config, - int pipe); -#endif /*__mdfld_dsi_dpi_h__*/ diff --git a/drivers/gpu/drm/gma500/mdfld_dsi_output.c b/drivers/gpu/drm/gma500/mdfld_dsi_output.c --- a/drivers/gpu/drm/gma500/mdfld_dsi_output.c +++ /dev/null -/* - * copyright ©️ 2010 intel corporation - * - * permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "software"), - * to deal in the software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the software, and to permit persons to whom the - * software is furnished to do so, subject to the following conditions: - * - * the above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * software. - * - * the software is provided "as is", without warranty of any kind, express or - * implied, including but not limited to the warranties of merchantability, - * fitness for a particular purpose and noninfringement. in no event shall - * the authors or copyright holders be liable for any claim, damages or other - * liability, whether in an action of contract, tort or otherwise, arising - * from, out of or in connection with the software or the use or other - * dealings in the software. - * - * authors: - * jim liu <jim.liu@intel.com> - * jackie li<yaodong.li@intel.com> - */ - -#include <linux/delay.h> -#include <linux/moduleparam.h> -#include <linux/pm_runtime.h> -#include <linux/gpio/consumer.h> - -#include <asm/intel_scu_ipc.h> - -#include "mdfld_dsi_dpi.h" -#include "mdfld_dsi_output.h" -#include "mdfld_dsi_pkg_sender.h" -#include "mdfld_output.h" -#include "tc35876x-dsi-lvds.h" - -/* get the labc from command line. */ -static int labc_control = 1; - -#ifdef module -module_param(labc_control, int, 0644); -#else - -static int __init parse_labc_control(char *arg) -{ - /* labc control can be passed in as a cmdline parameter */ - /* to enable this feature add labc=1 to cmdline */ - /* to disable this feature add labc=0 to cmdline */ - if (!arg) - return -einval; - - if (!strcasecmp(arg, "0")) - labc_control = 0; - else if (!strcasecmp(arg, "1")) - labc_control = 1; - - return 0; -} -early_param("labc", parse_labc_control); -#endif - -/* - * check and see if the generic control or data buffer is empty and ready. - */ -void mdfld_dsi_gen_fifo_ready(struct drm_device *dev, u32 gen_fifo_stat_reg, - u32 fifo_stat) -{ - u32 gen_bf_time_out_count; - - /* check mipi adatper command registers */ - for (gen_bf_time_out_count = 0; - gen_bf_time_out_count < gen_fb_time_out; - gen_bf_time_out_count++) { - if ((reg_read(gen_fifo_stat_reg) & fifo_stat) == fifo_stat) - break; - udelay(100); - } - - if (gen_bf_time_out_count == gen_fb_time_out) - drm_error("mdfld_dsi_gen_fifo_ready, timeout. gen_fifo_stat_reg = 0x%x. ", - gen_fifo_stat_reg); -} - -/* - * manage the dsi mipi keyboard and display brightness. - * fixme: this is exported to ospm code. should work out an specific - * display interface to ospm. - */ - -void mdfld_dsi_brightness_init(struct mdfld_dsi_config *dsi_config, int pipe) -{ - struct mdfld_dsi_pkg_sender *sender = - mdfld_dsi_get_pkg_sender(dsi_config); - struct drm_device *dev; - struct drm_psb_private *dev_priv; - u32 gen_ctrl_val; - - if (!sender) { - drm_error("no sender found "); - return; - } - - dev = sender->dev; - dev_priv = dev->dev_private; - - /* set default display backlight value to 85% (0xd8)*/ - mdfld_dsi_send_mcs_short(sender, write_display_brightness, 0xd8, 1, - true); - - /* set minimum brightness setting of cabc function to 20% (0x33)*/ - mdfld_dsi_send_mcs_short(sender, write_cabc_min_bright, 0x33, 1, true); - - /* enable backlight or/and labc */ - gen_ctrl_val = bright_cntl_block_on | display_dimming_on | - backlight_on; - if (labc_control == 1) - gen_ctrl_val |= display_dimming_on | display_brightness_auto - | gamma_auto; - - if (labc_control == 1) - gen_ctrl_val |= ambient_light_sense_on; - - dev_priv->mipi_ctrl_display = gen_ctrl_val; - - mdfld_dsi_send_mcs_short(sender, write_ctrl_display, (u8)gen_ctrl_val, - 1, true); - - mdfld_dsi_send_mcs_short(sender, write_ctrl_cabc, ui_image, 1, true); -} - -void mdfld_dsi_brightness_control(struct drm_device *dev, int pipe, int level) -{ - struct mdfld_dsi_pkg_sender *sender; - struct drm_psb_private *dev_priv; - struct mdfld_dsi_config *dsi_config; - u32 gen_ctrl_val = 0; - int p_type = tmd_vid; - - if (!dev || (pipe != 0 && pipe != 2)) { - drm_error("invalid parameter "); - return; - } - - p_type = mdfld_get_panel_type(dev, 0); - - dev_priv = dev->dev_private; - - if (pipe) - dsi_config = dev_priv->dsi_configs[1]; - else - dsi_config = dev_priv->dsi_configs[0]; - - sender = mdfld_dsi_get_pkg_sender(dsi_config); - - if (!sender) { - drm_error("no sender found "); - return; - } - - gen_ctrl_val = (level * 0xff / mdfld_dsi_brightness_max_level) & 0xff; - - dev_dbg(sender->dev->dev, "pipe = %d, gen_ctrl_val = %d. ", - pipe, gen_ctrl_val); - - if (p_type == tmd_vid) { - /* set display backlight value */ - mdfld_dsi_send_mcs_short(sender, tmd_write_display_brightness, - (u8)gen_ctrl_val, 1, true); - } else { - /* set display backlight value */ - mdfld_dsi_send_mcs_short(sender, write_display_brightness, - (u8)gen_ctrl_val, 1, true); - - /* enable backlight control */ - if (level == 0) - gen_ctrl_val = 0; - else - gen_ctrl_val = dev_priv->mipi_ctrl_display; - - mdfld_dsi_send_mcs_short(sender, write_ctrl_display, - (u8)gen_ctrl_val, 1, true); - } -} - -static int mdfld_dsi_get_panel_status(struct mdfld_dsi_config *dsi_config, - u8 dcs, u32 *data, bool hs) -{ - struct mdfld_dsi_pkg_sender *sender - = mdfld_dsi_get_pkg_sender(dsi_config); - - if (!sender || !data) { - drm_error("invalid parameter "); - return -einval; - } - - return mdfld_dsi_read_mcs(sender, dcs, data, 1, hs); -} - -int mdfld_dsi_get_power_mode(struct mdfld_dsi_config *dsi_config, u32 *mode, - bool hs) -{ - if (!dsi_config || !mode) { - drm_error("invalid parameter "); - return -einval; - } - - return mdfld_dsi_get_panel_status(dsi_config, 0x0a, mode, hs); -} - -/* - * note: this function was used by ospm. - * todo: will be removed later, should work out display interfaces for ospm - */ -void mdfld_dsi_controller_init(struct mdfld_dsi_config *dsi_config, int pipe) -{ - if (!dsi_config || ((pipe != 0) && (pipe != 2))) { - drm_error("invalid parameters "); - return; - } - - mdfld_dsi_dpi_controller_init(dsi_config, pipe); -} - -static void mdfld_dsi_connector_save(struct drm_connector *connector) -{ -} - -static void mdfld_dsi_connector_restore(struct drm_connector *connector) -{ -} - -/* fixme: start using the force parameter */ -static enum drm_connector_status -mdfld_dsi_connector_detect(struct drm_connector *connector, bool force) -{ - struct mdfld_dsi_connector *dsi_connector - = mdfld_dsi_connector(connector); - - dsi_connector->status = connector_status_connected; - - return dsi_connector->status; -} - -static int mdfld_dsi_connector_set_property(struct drm_connector *connector, - struct drm_property *property, - uint64_t value) -{ - struct drm_encoder *encoder = connector->encoder; - - if (!strcmp(property->name, "scaling mode") && encoder) { - struct gma_crtc *gma_crtc = to_gma_crtc(encoder->crtc); - bool centerechange; - uint64_t val; - - if (!gma_crtc) - goto set_prop_error; - - switch (value) { - case drm_mode_scale_fullscreen: - break; - case drm_mode_scale_no_scale: - break; - case drm_mode_scale_aspect: - break; - default: - goto set_prop_error; - } - - if (drm_object_property_get_value(&connector->base, property, &val)) - goto set_prop_error; - - if (val == value) - goto set_prop_done; - - if (drm_object_property_set_value(&connector->base, - property, value)) - goto set_prop_error; - - centerechange = (val == drm_mode_scale_no_scale) || - (value == drm_mode_scale_no_scale); - - if (gma_crtc->saved_mode.hdisplay != 0 && - gma_crtc->saved_mode.vdisplay != 0) { - if (centerechange) { - if (!drm_crtc_helper_set_mode(encoder->crtc, - &gma_crtc->saved_mode, - encoder->crtc->x, - encoder->crtc->y, - encoder->crtc->primary->fb)) - goto set_prop_error; - } else { - const struct drm_encoder_helper_funcs *funcs = - encoder->helper_private; - funcs->mode_set(encoder, - &gma_crtc->saved_mode, - &gma_crtc->saved_adjusted_mode); - } - } - } else if (!strcmp(property->name, "backlight") && encoder) { - if (drm_object_property_set_value(&connector->base, property, - value)) - goto set_prop_error; - else - gma_backlight_set(encoder->dev, value); - } -set_prop_done: - return 0; -set_prop_error: - return -1; -} - -static void mdfld_dsi_connector_destroy(struct drm_connector *connector) -{ - struct mdfld_dsi_connector *dsi_connector = - mdfld_dsi_connector(connector); - struct mdfld_dsi_pkg_sender *sender; - - if (!dsi_connector) - return; - drm_connector_unregister(connector); - drm_connector_cleanup(connector); - sender = dsi_connector->pkg_sender; - mdfld_dsi_pkg_sender_destroy(sender); - kfree(dsi_connector); -} - -static int mdfld_dsi_connector_get_modes(struct drm_connector *connector) -{ - struct mdfld_dsi_connector *dsi_connector = - mdfld_dsi_connector(connector); - struct mdfld_dsi_config *dsi_config = - mdfld_dsi_get_config(dsi_connector); - struct drm_display_mode *fixed_mode = dsi_config->fixed_mode; - struct drm_display_mode *dup_mode = null; - struct drm_device *dev = connector->dev; - - if (fixed_mode) { - dev_dbg(dev->dev, "fixed_mode %dx%d ", - fixed_mode->hdisplay, fixed_mode->vdisplay); - dup_mode = drm_mode_duplicate(dev, fixed_mode); - drm_mode_probed_add(connector, dup_mode); - return 1; - } - drm_error("didn't get any modes! "); - return 0; -} - -static enum drm_mode_status mdfld_dsi_connector_mode_valid(struct drm_connector *connector, - struct drm_display_mode *mode) -{ - struct mdfld_dsi_connector *dsi_connector = - mdfld_dsi_connector(connector); - struct mdfld_dsi_config *dsi_config = - mdfld_dsi_get_config(dsi_connector); - struct drm_display_mode *fixed_mode = dsi_config->fixed_mode; - - if (mode->flags & drm_mode_flag_dblscan) - return mode_no_dblescan; - - if (mode->flags & drm_mode_flag_interlace) - return mode_no_interlace; - - /** - * fixme: current dc has no fitting unit, reject any mode setting - * request - * will figure out a way to do up-scaling(panel fitting) later. - **/ - if (fixed_mode) { - if (mode->hdisplay != fixed_mode->hdisplay) - return mode_panel; - - if (mode->vdisplay != fixed_mode->vdisplay) - return mode_panel; - } - - return mode_ok; -} - -static struct drm_encoder *mdfld_dsi_connector_best_encoder( - struct drm_connector *connector) -{ - struct mdfld_dsi_connector *dsi_connector = - mdfld_dsi_connector(connector); - struct mdfld_dsi_config *dsi_config = - mdfld_dsi_get_config(dsi_connector); - return &dsi_config->encoder->base.base; -} - -/*dsi connector funcs*/ -static const struct drm_connector_funcs mdfld_dsi_connector_funcs = { - .dpms = drm_helper_connector_dpms, - .detect = mdfld_dsi_connector_detect, - .fill_modes = drm_helper_probe_single_connector_modes, - .set_property = mdfld_dsi_connector_set_property, - .destroy = mdfld_dsi_connector_destroy, -}; - -/*dsi connector helper funcs*/ -static const struct drm_connector_helper_funcs - mdfld_dsi_connector_helper_funcs = { - .get_modes = mdfld_dsi_connector_get_modes, - .mode_valid = mdfld_dsi_connector_mode_valid, - .best_encoder = mdfld_dsi_connector_best_encoder, -}; - -static int mdfld_dsi_get_default_config(struct drm_device *dev, - struct mdfld_dsi_config *config, int pipe) -{ - if (!dev || !config) { - drm_error("invalid parameters"); - return -einval; - } - - config->bpp = 24; - if (mdfld_get_panel_type(dev, pipe) == tc35876x) - config->lane_count = 4; - else - config->lane_count = 2; - config->channel_num = 0; - - if (mdfld_get_panel_type(dev, pipe) == tmd_vid) - config->video_mode = mdfld_dsi_video_non_burst_mode_sync_pulse; - else if (mdfld_get_panel_type(dev, pipe) == tc35876x) - config->video_mode = - mdfld_dsi_video_non_burst_mode_sync_events; - else - config->video_mode = mdfld_dsi_video_burst_mode; - - return 0; -} - -int mdfld_dsi_panel_reset(struct drm_device *ddev, int pipe) -{ - struct device *dev = ddev->dev; - struct gpio_desc *gpiod; - - /* - * raise the gpio reset line for the corresponding pipe to high, - * this is probably because it is active low so this takes the - * respective pipe out of reset. (we have no code to put it back - * into reset in this driver.) - */ - switch (pipe) { - case 0: - gpiod = gpiod_get(dev, "dsi-pipe0-reset", gpiod_out_high); - if (is_err(gpiod)) - return ptr_err(gpiod); - break; - case 2: - gpiod = gpiod_get(dev, "dsi-pipe2-reset", gpiod_out_high); - if (is_err(gpiod)) - return ptr_err(gpiod); - break; - default: - drm_dev_error(dev, "invalid output pipe "); - return -einval; - } - gpiod_put(gpiod); - - /* flush posted writes on the device */ - gpiod = gpiod_get(dev, "dsi-pipe0-reset", gpiod_asis); - if (is_err(gpiod)) - return ptr_err(gpiod); - gpiod_get_value(gpiod); - gpiod_put(gpiod); - - return 0; -} - -/* - * mipi output init - * @dev drm device - * @pipe pipe number. 0 or 2 - * @config - * - * do the initialization of a mipi output, including create drm mode objects - * initialization of dsi output on @pipe - */ -void mdfld_dsi_output_init(struct drm_device *dev, - int pipe, - const struct panel_funcs *p_vid_funcs) -{ - struct mdfld_dsi_config *dsi_config; - struct mdfld_dsi_connector *dsi_connector; - struct drm_connector *connector; - struct mdfld_dsi_encoder *encoder; - struct drm_psb_private *dev_priv = dev->dev_private; - struct panel_info dsi_panel_info; - u32 width_mm, height_mm; - - dev_dbg(dev->dev, "init dsi output on pipe %d ", pipe); - - if (pipe != 0 && pipe != 2) { - drm_error("invalid parameter "); - return; - } - - /*create a new connector*/ - dsi_connector = kzalloc(sizeof(struct mdfld_dsi_connector), gfp_kernel); - if (!dsi_connector) { - drm_error("no memory"); - return; - } - - dsi_connector->pipe = pipe; - - dsi_config = kzalloc(sizeof(struct mdfld_dsi_config), - gfp_kernel); - if (!dsi_config) { - drm_error("cannot allocate memory for dsi config "); - goto dsi_init_err0; - } - mdfld_dsi_get_default_config(dev, dsi_config, pipe); - - dsi_connector->private = dsi_config; - - dsi_config->changed = 1; - dsi_config->dev = dev; - - dsi_config->fixed_mode = p_vid_funcs->get_config_mode(dev); - if (p_vid_funcs->get_panel_info(dev, pipe, &dsi_panel_info)) - goto dsi_init_err0; - - width_mm = dsi_panel_info.width_mm; - height_mm = dsi_panel_info.height_mm; - - dsi_config->mode = dsi_config->fixed_mode; - dsi_config->connector = dsi_connector; - - if (!dsi_config->fixed_mode) { - drm_error("no panel fixed mode was found "); - goto dsi_init_err0; - } - - if (pipe && dev_priv->dsi_configs[0]) { - dsi_config->dvr_ic_inited = 0; - dev_priv->dsi_configs[1] = dsi_config; - } else if (pipe == 0) { - dsi_config->dvr_ic_inited = 1; - dev_priv->dsi_configs[0] = dsi_config; - } else { - drm_error("trying to init mipi1 before mipi0 "); - goto dsi_init_err0; - } - - - connector = &dsi_connector->base.base; - dsi_connector->base.save = mdfld_dsi_connector_save; - dsi_connector->base.restore = mdfld_dsi_connector_restore; - - drm_connector_init(dev, connector, &mdfld_dsi_connector_funcs, - drm_mode_connector_lvds); - drm_connector_helper_add(connector, &mdfld_dsi_connector_helper_funcs); - - connector->display_info.subpixel_order = subpixelhorizontalrgb; - connector->display_info.width_mm = width_mm; - connector->display_info.height_mm = height_mm; - connector->interlace_allowed = false; - connector->doublescan_allowed = false; - - /*attach properties*/ - drm_object_attach_property(&connector->base, - dev->mode_config.scaling_mode_property, - drm_mode_scale_fullscreen); - drm_object_attach_property(&connector->base, - dev_priv->backlight_property, - mdfld_dsi_brightness_max_level); - - /*init dsi package sender on this output*/ - if (mdfld_dsi_pkg_sender_init(dsi_connector, pipe)) { - drm_error("package sender initialization failed on pipe %d ", - pipe); - goto dsi_init_err0; - } - - encoder = mdfld_dsi_dpi_init(dev, dsi_connector, p_vid_funcs); - if (!encoder) { - drm_error("create dpi encoder failed "); - goto dsi_init_err1; - } - encoder->private = dsi_config; - dsi_config->encoder = encoder; - encoder->base.type = (pipe == 0) ? intel_output_mipi : - intel_output_mipi2; - drm_connector_register(connector); - return; - - /*todo: add code to destroy outputs on error*/ -dsi_init_err1: - /*destroy sender*/ - mdfld_dsi_pkg_sender_destroy(dsi_connector->pkg_sender); - - drm_connector_cleanup(connector); - - kfree(dsi_config->fixed_mode); - kfree(dsi_config); -dsi_init_err0: - kfree(dsi_connector); -} diff --git a/drivers/gpu/drm/gma500/mdfld_dsi_output.h b/drivers/gpu/drm/gma500/mdfld_dsi_output.h --- a/drivers/gpu/drm/gma500/mdfld_dsi_output.h +++ /dev/null -/* - * copyright ©️ 2010 intel corporation - * - * permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "software"), - * to deal in the software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the software, and to permit persons to whom the - * software is furnished to do so, subject to the following conditions: - * - * the above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * software. - * - * the software is provided "as is", without warranty of any kind, express or - * implied, including but not limited to the warranties of merchantability, - * fitness for a particular purpose and noninfringement. in no event shall - * the authors or copyright holders be liable for any claim, damages or other - * liability, whether in an action of contract, tort or otherwise, arising - * from, out of or in connection with the software or the use or other - * dealings in the software. - * - * authors: - * jim liu <jim.liu@intel.com> - * jackie li<yaodong.li@intel.com> - */ - -#ifndef __mdfld_dsi_output_h__ -#define __mdfld_dsi_output_h__ - -#include <linux/backlight.h> - -#include <asm/intel-mid.h> - -#include <drm/drm.h> -#include <drm/drm_crtc.h> -#include <drm/drm_edid.h> - -#include "mdfld_output.h" -#include "psb_drv.h" -#include "psb_intel_drv.h" -#include "psb_intel_reg.h" - -#define fld_mask(start, end) (((1 << ((start) - (end) + 1)) - 1) << (end)) -#define fld_val(val, start, end) (((val) << (end)) & fld_mask(start, end)) -#define fld_get(val, start, end) (((val) & fld_mask(start, end)) >> (end)) -#define fld_mod(orig, val, start, end) \ - (((orig) & ~fld_mask(start, end)) | fld_val(val, start, end)) - -#define reg_fld_mod(reg, val, start, end) \ - reg_write(reg, fld_mod(reg_read(reg), val, start, end)) - -static inline int register_fld_wait(struct drm_device *dev, u32 reg, - u32 val, int start, int end) -{ - int t = 100000; - - while (fld_get(reg_read(reg), start, end) != val) { - if (--t == 0) - return 1; - } - - return 0; -} - -#define reg_fld_wait(reg, val, start, end) \ - register_fld_wait(dev, reg, val, start, end) - -#define reg_bit_wait(reg, val, bitnum) \ - register_fld_wait(dev, reg, val, bitnum, bitnum) - -#define mdfld_dsi_brightness_max_level 100 - -#ifdef debug -#define check_pipe(pipe) ({ \ - const typeof(pipe) __pipe = (pipe); \ - bug_on(__pipe != 0 && __pipe != 2); \ - __pipe; }) -#else -#define check_pipe(pipe) (pipe) -#endif - -/* - * actual mipia->mipic reg offset is 0x800, value 0x400 is valid for 0 and 2 - */ -#define reg_offset(pipe) (check_pipe(pipe) * 0x400) - -/* mdfld dsi controller registers */ -#define mipi_device_ready_reg(pipe) (0xb000 + reg_offset(pipe)) -#define mipi_intr_stat_reg(pipe) (0xb004 + reg_offset(pipe)) -#define mipi_intr_en_reg(pipe) (0xb008 + reg_offset(pipe)) -#define mipi_dsi_func_prg_reg(pipe) (0xb00c + reg_offset(pipe)) -#define mipi_hs_tx_timeout_reg(pipe) (0xb010 + reg_offset(pipe)) -#define mipi_lp_rx_timeout_reg(pipe) (0xb014 + reg_offset(pipe)) -#define mipi_turn_around_timeout_reg(pipe) (0xb018 + reg_offset(pipe)) -#define mipi_device_reset_timer_reg(pipe) (0xb01c + reg_offset(pipe)) -#define mipi_dpi_resolution_reg(pipe) (0xb020 + reg_offset(pipe)) -#define mipi_dbi_fifo_throttle_reg(pipe) (0xb024 + reg_offset(pipe)) -#define mipi_hsync_count_reg(pipe) (0xb028 + reg_offset(pipe)) -#define mipi_hbp_count_reg(pipe) (0xb02c + reg_offset(pipe)) -#define mipi_hfp_count_reg(pipe) (0xb030 + reg_offset(pipe)) -#define mipi_hactive_count_reg(pipe) (0xb034 + reg_offset(pipe)) -#define mipi_vsync_count_reg(pipe) (0xb038 + reg_offset(pipe)) -#define mipi_vbp_count_reg(pipe) (0xb03c + reg_offset(pipe)) -#define mipi_vfp_count_reg(pipe) (0xb040 + reg_offset(pipe)) -#define mipi_high_low_switch_count_reg(pipe) (0xb044 + reg_offset(pipe)) -#define mipi_dpi_control_reg(pipe) (0xb048 + reg_offset(pipe)) -#define mipi_dpi_data_reg(pipe) (0xb04c + reg_offset(pipe)) -#define mipi_init_count_reg(pipe) (0xb050 + reg_offset(pipe)) -#define mipi_max_return_pack_size_reg(pipe) (0xb054 + reg_offset(pipe)) -#define mipi_video_mode_format_reg(pipe) (0xb058 + reg_offset(pipe)) -#define mipi_eot_disable_reg(pipe) (0xb05c + reg_offset(pipe)) -#define mipi_lp_byteclk_reg(pipe) (0xb060 + reg_offset(pipe)) -#define mipi_lp_gen_data_reg(pipe) (0xb064 + reg_offset(pipe)) -#define mipi_hs_gen_data_reg(pipe) (0xb068 + reg_offset(pipe)) -#define mipi_lp_gen_ctrl_reg(pipe) (0xb06c + reg_offset(pipe)) -#define mipi_hs_gen_ctrl_reg(pipe) (0xb070 + reg_offset(pipe)) -#define mipi_gen_fifo_stat_reg(pipe) (0xb074 + reg_offset(pipe)) -#define mipi_hs_ls_dbi_enable_reg(pipe) (0xb078 + reg_offset(pipe)) -#define mipi_dphy_param_reg(pipe) (0xb080 + reg_offset(pipe)) -#define mipi_dbi_bw_ctrl_reg(pipe) (0xb084 + reg_offset(pipe)) -#define mipi_clk_lane_switch_time_cnt_reg(pipe) (0xb088 + reg_offset(pipe)) - -#define mipi_ctrl_reg(pipe) (0xb104 + reg_offset(pipe)) -#define mipi_data_add_reg(pipe) (0xb108 + reg_offset(pipe)) -#define mipi_data_len_reg(pipe) (0xb10c + reg_offset(pipe)) -#define mipi_cmd_add_reg(pipe) (0xb110 + reg_offset(pipe)) -#define mipi_cmd_len_reg(pipe) (0xb114 + reg_offset(pipe)) - -/* non-uniform reg offset */ -#define mipi_port_control(pipe) (check_pipe(pipe) ? mipi_c : mipi) - -#define dsi_device_ready (0x1) -#define dsi_power_state_ulps_enter (0x2 << 1) -#define dsi_power_state_ulps_exit (0x1 << 1) -#define dsi_power_state_ulps_offset (0x1) - - -#define dsi_one_data_lane (0x1) -#define dsi_two_data_lane (0x2) -#define dsi_three_data_lane (0x3) -#define dsi_four_data_lane (0x4) -#define dsi_dpi_virt_channel_offset (0x3) -#define dsi_dbi_virt_channel_offset (0x5) -#define dsi_dpi_color_format_rgb565 (0x01 << 7) -#define dsi_dpi_color_format_rgb666 (0x02 << 7) -#define dsi_dpi_color_format_rgb666_unpack (0x03 << 7) -#define dsi_dpi_color_format_rgb888 (0x04 << 7) -#define dsi_dbi_color_format_option2 (0x05 << 13) - -#define dsi_intr_state_rxsoterror bit(0) - -#define dsi_intr_state_spl_pkg_sent bit(30) -#define dsi_intr_state_te bit(31) - -#define dsi_hs_tx_timeout_mask (0xffffff) - -#define dsi_lp_rx_timeout_mask (0xffffff) - -#define dsi_turn_around_timeout_mask (0x3f) - -#define dsi_reset_timer_mask (0xffff) - -#define dsi_dbi_fifo_wm_half (0x0) -#define dsi_dbi_fifo_wm_quarter (0x1) -#define dsi_dbi_fifo_wm_low (0x2) - -#define dsi_dpi_timing_mask (0xffff) - -#define dsi_init_timer_mask (0xffff) - -#define dsi_dbi_return_pack_size_mask (0x3ff) - -#define dsi_lp_byteclk_mask (0x0ffff) - -#define dsi_hs_ctrl_gen_short_w0 (0x03) -#define dsi_hs_ctrl_gen_short_w1 (0x13) -#define dsi_hs_ctrl_gen_short_w2 (0x23) -#define dsi_hs_ctrl_gen_r0 (0x04) -#define dsi_hs_ctrl_gen_r1 (0x14) -#define dsi_hs_ctrl_gen_r2 (0x24) -#define dsi_hs_ctrl_gen_long_w (0x29) -#define dsi_hs_ctrl_mcs_short_w0 (0x05) -#define dsi_hs_ctrl_mcs_short_w1 (0x15) -#define dsi_hs_ctrl_mcs_r0 (0x06) -#define dsi_hs_ctrl_mcs_long_w (0x39) -#define dsi_hs_ctrl_vc_offset (0x06) -#define dsi_hs_ctrl_wc_offset (0x08) - -#define dsi_fifo_gen_hs_data_full bit(0) -#define dsi_fifo_gen_hs_data_half_empty bit(1) -#define dsi_fifo_gen_hs_data_empty bit(2) -#define dsi_fifo_gen_lp_data_full bit(8) -#define dsi_fifo_gen_lp_data_half_empty bit(9) -#define dsi_fifo_gen_lp_data_empty bit(10) -#define dsi_fifo_gen_hs_ctrl_full bit(16) -#define dsi_fifo_gen_hs_ctrl_half_empty bit(17) -#define dsi_fifo_gen_hs_ctrl_empty bit(18) -#define dsi_fifo_gen_lp_ctrl_full bit(24) -#define dsi_fifo_gen_lp_ctrl_half_empty bit(25) -#define dsi_fifo_gen_lp_ctrl_empty bit(26) -#define dsi_fifo_dbi_empty bit(27) -#define dsi_fifo_dpi_empty bit(28) - -#define dsi_dbi_hs_lp_switch_mask (0x1) - -#define dsi_hs_lp_switch_counter_offset (0x0) -#define dsi_lp_hs_switch_counter_offset (0x16) - -#define dsi_dpi_ctrl_hs_shutdown (0x00000001) -#define dsi_dpi_ctrl_hs_turn_on (0x00000002) - -/*dsi power modes*/ -#define dsi_power_mode_display_on bit(2) -#define dsi_power_mode_normal_on bit(3) -#define dsi_power_mode_sleep_out bit(4) -#define dsi_power_mode_partial_on bit(5) -#define dsi_power_mode_idle_on bit(6) - -enum { - mdfld_dsi_video_non_burst_mode_sync_pulse = 1, - mdfld_dsi_video_non_burst_mode_sync_events = 2, - mdfld_dsi_video_burst_mode = 3, -}; - -#define dsi_dpi_complete_last_line bit(2) -#define dsi_dpi_disable_bta bit(3) - -struct mdfld_dsi_connector { - struct gma_connector base; - - int pipe; - void *private; - void *pkg_sender; - - /* connection status */ - enum drm_connector_status status; -}; - -struct mdfld_dsi_encoder { - struct gma_encoder base; - void *private; -}; - -/* - * dsi config, consists of one dsi connector, two dsi encoders. - * drm will pick up on dsi encoder basing on differents configs. - */ -struct mdfld_dsi_config { - struct drm_device *dev; - struct drm_display_mode *fixed_mode; - struct drm_display_mode *mode; - - struct mdfld_dsi_connector *connector; - struct mdfld_dsi_encoder *encoder; - - int changed; - - int bpp; - int lane_count; - /*virtual channel number for this encoder*/ - int channel_num; - /*video mode configure*/ - int video_mode; - - int dvr_ic_inited; -}; - -static inline struct mdfld_dsi_connector *mdfld_dsi_connector( - struct drm_connector *connector) -{ - struct gma_connector *gma_connector; - - gma_connector = to_gma_connector(connector); - - return container_of(gma_connector, struct mdfld_dsi_connector, base); -} - -static inline struct mdfld_dsi_encoder *mdfld_dsi_encoder( - struct drm_encoder *encoder) -{ - struct gma_encoder *gma_encoder; - - gma_encoder = to_gma_encoder(encoder); - - return container_of(gma_encoder, struct mdfld_dsi_encoder, base); -} - -static inline struct mdfld_dsi_config * - mdfld_dsi_get_config(struct mdfld_dsi_connector *connector) -{ - if (!connector) - return null; - return (struct mdfld_dsi_config *)connector->private; -} - -static inline void *mdfld_dsi_get_pkg_sender(struct mdfld_dsi_config *config) -{ - struct mdfld_dsi_connector *dsi_connector; - - if (!config) - return null; - - dsi_connector = config->connector; - - if (!dsi_connector) - return null; - - return dsi_connector->pkg_sender; -} - -static inline struct mdfld_dsi_config * - mdfld_dsi_encoder_get_config(struct mdfld_dsi_encoder *encoder) -{ - if (!encoder) - return null; - return (struct mdfld_dsi_config *)encoder->private; -} - -static inline struct mdfld_dsi_connector * - mdfld_dsi_encoder_get_connector(struct mdfld_dsi_encoder *encoder) -{ - struct mdfld_dsi_config *config; - - if (!encoder) - return null; - - config = mdfld_dsi_encoder_get_config(encoder); - if (!config) - return null; - - return config->connector; -} - -static inline void *mdfld_dsi_encoder_get_pkg_sender( - struct mdfld_dsi_encoder *encoder) -{ - struct mdfld_dsi_config *dsi_config; - - dsi_config = mdfld_dsi_encoder_get_config(encoder); - if (!dsi_config) - return null; - - return mdfld_dsi_get_pkg_sender(dsi_config); -} - -static inline int mdfld_dsi_encoder_get_pipe(struct mdfld_dsi_encoder *encoder) -{ - struct mdfld_dsi_connector *connector; - - if (!encoder) - return -1; - - connector = mdfld_dsi_encoder_get_connector(encoder); - if (!connector) - return -1; - return connector->pipe; -} - -/* export functions */ -extern void mdfld_dsi_gen_fifo_ready(struct drm_device *dev, - u32 gen_fifo_stat_reg, u32 fifo_stat); -extern void mdfld_dsi_brightness_init(struct mdfld_dsi_config *dsi_config, - int pipe); -extern void mdfld_dsi_brightness_control(struct drm_device *dev, int pipe, - int level); -extern void mdfld_dsi_output_init(struct drm_device *dev, - int pipe, - const struct panel_funcs *p_vid_funcs); -extern void mdfld_dsi_controller_init(struct mdfld_dsi_config *dsi_config, - int pipe); - -extern int mdfld_dsi_get_power_mode(struct mdfld_dsi_config *dsi_config, - u32 *mode, bool hs); -extern int mdfld_dsi_panel_reset(struct drm_device *dev, int pipe); - -#endif /*__mdfld_dsi_output_h__*/ diff --git a/drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.c b/drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.c --- a/drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.c +++ /dev/null -/* - * copyright ©️ 2010 intel corporation - * - * permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "software"), - * to deal in the software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the software, and to permit persons to whom the - * software is furnished to do so, subject to the following conditions: - * - * the above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * software. - * - * the software is provided "as is", without warranty of any kind, express or - * implied, including but not limited to the warranties of merchantability, - * fitness for a particular purpose and noninfringement. in no event shall - * the authors or copyright holders be liable for any claim, damages or other - * liability, whether in an action of contract, tort or otherwise, arising - * from, out of or in connection with the software or the use or other - * dealings in the software. - * - * authors: - * jackie li<yaodong.li@intel.com> - */ - -#include <linux/delay.h> -#include <linux/freezer.h> - -#include <video/mipi_display.h> - -#include "mdfld_dsi_dpi.h" -#include "mdfld_dsi_output.h" -#include "mdfld_dsi_pkg_sender.h" - -#define mdfld_dsi_read_max_count 5000 - -enum { - mdfld_dsi_panel_mode_sleep = 0x1, -}; - -enum { - mdfld_dsi_pkg_sender_free = 0x0, - mdfld_dsi_pkg_sender_busy = 0x1, -}; - -static const char *const dsi_errors[] = { - "rx sot error", - "rx sot sync error", - "rx eot sync error", - "rx escape mode entry error", - "rx lp tx sync error", - "rx hs receive timeout error", - "rx false control error", - "rx ecc single bit error", - "rx ecc multibit error", - "rx checksum error", - "rx dsi data type not recognised", - "rx dsi vc id invalid", - "tx false control error", - "tx ecc single bit error", - "tx ecc multibit error", - "tx checksum error", - "tx dsi data type not recognised", - "tx dsi vc id invalid", - "high contention", - "low contention", - "dpi fifo under run", - "hs tx timeout", - "lp rx timeout", - "turn around ack timeout", - "ack with no error", - "rx invalid tx length", - "rx prot violation", - "hs generic write fifo full", - "lp generic write fifo full", - "generic read data avail", - "special packet sent", - "tearing effect", -}; - -static inline int wait_for_gen_fifo_empty(struct mdfld_dsi_pkg_sender *sender, - u32 mask) -{ - struct drm_device *dev = sender->dev; - u32 gen_fifo_stat_reg = sender->mipi_gen_fifo_stat_reg; - int retry = 0xffff; - - while (retry--) { - if ((mask & reg_read(gen_fifo_stat_reg)) == mask) - return 0; - udelay(100); - } - drm_error("fifo is not empty 0x%08x ", reg_read(gen_fifo_stat_reg)); - return -eio; -} - -static int wait_for_all_fifos_empty(struct mdfld_dsi_pkg_sender *sender) -{ - return wait_for_gen_fifo_empty(sender, (bit(2) | bit(10) | bit(18) | - bit(26) | bit(27) | bit(28))); -} - -static int wait_for_lp_fifos_empty(struct mdfld_dsi_pkg_sender *sender) -{ - return wait_for_gen_fifo_empty(sender, (bit(10) | bit(26))); -} - -static int wait_for_hs_fifos_empty(struct mdfld_dsi_pkg_sender *sender) -{ - return wait_for_gen_fifo_empty(sender, (bit(2) | bit(18))); -} - -static int handle_dsi_error(struct mdfld_dsi_pkg_sender *sender, u32 mask) -{ - u32 intr_stat_reg = sender->mipi_intr_stat_reg; - struct drm_device *dev = sender->dev; - - dev_dbg(sender->dev->dev, "handling error 0x%08x ", mask); - - switch (mask) { - case bit(0): - case bit(1): - case bit(2): - case bit(3): - case bit(4): - case bit(5): - case bit(6): - case bit(7): - case bit(8): - case bit(9): - case bit(10): - case bit(11): - case bit(12): - case bit(13): - dev_dbg(sender->dev->dev, "no action required "); - break; - case bit(14): - /*wait for all fifo empty*/ - /*wait_for_all_fifos_empty(sender)*/ - break; - case bit(15): - dev_dbg(sender->dev->dev, "no action required "); - break; - case bit(16): - break; - case bit(17): - break; - case bit(18): - case bit(19): - dev_dbg(sender->dev->dev, "high/low contention detected "); - /*wait for contention recovery time*/ - /*mdelay(10);*/ - /*wait for all fifo empty*/ - if (0) - wait_for_all_fifos_empty(sender); - break; - case bit(20): - dev_dbg(sender->dev->dev, "no action required "); - break; - case bit(21): - /*wait for all fifo empty*/ - /*wait_for_all_fifos_empty(sender);*/ - break; - case bit(22): - break; - case bit(23): - case bit(24): - case bit(25): - case bit(26): - case bit(27): - dev_dbg(sender->dev->dev, "hs gen fifo full "); - reg_write(intr_stat_reg, mask); - wait_for_hs_fifos_empty(sender); - break; - case bit(28): - dev_dbg(sender->dev->dev, "lp gen fifo full "); - reg_write(intr_stat_reg, mask); - wait_for_lp_fifos_empty(sender); - break; - case bit(29): - case bit(30): - case bit(31): - dev_dbg(sender->dev->dev, "no action required "); - break; - } - - if (mask & reg_read(intr_stat_reg)) - dev_dbg(sender->dev->dev, - "cannot clean interrupt 0x%08x ", mask); - return 0; -} - -static int dsi_error_handler(struct mdfld_dsi_pkg_sender *sender) -{ - struct drm_device *dev = sender->dev; - u32 intr_stat_reg = sender->mipi_intr_stat_reg; - u32 mask; - u32 intr_stat; - int i; - int err = 0; - - intr_stat = reg_read(intr_stat_reg); - - for (i = 0; i < 32; i++) { - mask = (0x00000001ul) << i; - if (intr_stat & mask) { - dev_dbg(sender->dev->dev, "[dsi]: %s ", dsi_errors[i]); - err = handle_dsi_error(sender, mask); - if (err) - drm_error("cannot handle error "); - } - } - return err; -} - -static int send_short_pkg(struct mdfld_dsi_pkg_sender *sender, u8 data_type, - u8 cmd, u8 param, bool hs) -{ - struct drm_device *dev = sender->dev; - u32 ctrl_reg; - u32 val; - u8 virtual_channel = 0; - - if (hs) { - ctrl_reg = sender->mipi_hs_gen_ctrl_reg; - - /* fixme: wait_for_hs_fifos_empty(sender); */ - } else { - ctrl_reg = sender->mipi_lp_gen_ctrl_reg; - - /* fixme: wait_for_lp_fifos_empty(sender); */ - } - - val = fld_val(param, 23, 16) | fld_val(cmd, 15, 8) | - fld_val(virtual_channel, 7, 6) | fld_val(data_type, 5, 0); - - reg_write(ctrl_reg, val); - - return 0; -} - -static int send_long_pkg(struct mdfld_dsi_pkg_sender *sender, u8 data_type, - u8 *data, int len, bool hs) -{ - struct drm_device *dev = sender->dev; - u32 ctrl_reg; - u32 data_reg; - u32 val; - u8 *p; - u8 b1, b2, b3, b4; - u8 virtual_channel = 0; - int i; - - if (hs) { - ctrl_reg = sender->mipi_hs_gen_ctrl_reg; - data_reg = sender->mipi_hs_gen_data_reg; - - /* fixme: wait_for_hs_fifos_empty(sender); */ - } else { - ctrl_reg = sender->mipi_lp_gen_ctrl_reg; - data_reg = sender->mipi_lp_gen_data_reg; - - /* fixme: wait_for_lp_fifos_empty(sender); */ - } - - p = data; - for (i = 0; i < len / 4; i++) { - b1 = *p++; - b2 = *p++; - b3 = *p++; - b4 = *p++; - - reg_write(data_reg, b4 << 24 | b3 << 16 | b2 << 8 | b1); - } - - i = len % 4; - if (i) { - b1 = 0; b2 = 0; b3 = 0; - - switch (i) { - case 3: - b1 = *p++; - b2 = *p++; - b3 = *p++; - break; - case 2: - b1 = *p++; - b2 = *p++; - break; - case 1: - b1 = *p++; - break; - } - - reg_write(data_reg, b3 << 16 | b2 << 8 | b1); - } - - val = fld_val(len, 23, 8) | fld_val(virtual_channel, 7, 6) | - fld_val(data_type, 5, 0); - - reg_write(ctrl_reg, val); - - return 0; -} - -static int send_pkg_prepare(struct mdfld_dsi_pkg_sender *sender, u8 data_type, - u8 *data, u16 len) -{ - u8 cmd; - - switch (data_type) { - case mipi_dsi_dcs_short_write: - case mipi_dsi_dcs_short_write_param: - case mipi_dsi_dcs_long_write: - cmd = *data; - break; - default: - return 0; - } - - /*this prevents other package sending while doing msleep*/ - sender->status = mdfld_dsi_pkg_sender_busy; - - /*wait for 120 milliseconds in case exit_sleep_mode just be sent*/ - if (unlikely(cmd == mipi_dcs_enter_sleep_mode)) { - /*todo: replace it with msleep later*/ - mdelay(120); - } - - if (unlikely(cmd == mipi_dcs_exit_sleep_mode)) { - /*todo: replace it with msleep later*/ - mdelay(120); - } - return 0; -} - -static int send_pkg_done(struct mdfld_dsi_pkg_sender *sender, u8 data_type, - u8 *data, u16 len) -{ - u8 cmd; - - switch (data_type) { - case mipi_dsi_dcs_short_write: - case mipi_dsi_dcs_short_write_param: - case mipi_dsi_dcs_long_write: - cmd = *data; - break; - default: - return 0; - } - - /*update panel status*/ - if (unlikely(cmd == mipi_dcs_enter_sleep_mode)) { - sender->panel_mode |= mdfld_dsi_panel_mode_sleep; - /*todo: replace it with msleep later*/ - mdelay(120); - } else if (unlikely(cmd == mipi_dcs_exit_sleep_mode)) { - sender->panel_mode &= ~mdfld_dsi_panel_mode_sleep; - /*todo: replace it with msleep later*/ - mdelay(120); - } else if (unlikely(cmd == mipi_dcs_soft_reset)) { - /*todo: replace it with msleep later*/ - mdelay(5); - } - - sender->status = mdfld_dsi_pkg_sender_free; - - return 0; -} - -static int send_pkg(struct mdfld_dsi_pkg_sender *sender, u8 data_type, - u8 *data, u16 len, bool hs) -{ - int ret; - - /*handle dsi error*/ - ret = dsi_error_handler(sender); - if (ret) { - drm_error("error handling failed "); - return -eagain; - } - - /* send pkg */ - if (sender->status == mdfld_dsi_pkg_sender_busy) { - drm_error("sender is busy "); - return -eagain; - } - - ret = send_pkg_prepare(sender, data_type, data, len); - if (ret) { - drm_error("send_pkg_prepare error "); - return ret; - } - - switch (data_type) { - case mipi_dsi_generic_short_write_0_param: - case mipi_dsi_generic_short_write_1_param: - case mipi_dsi_generic_short_write_2_param: - case mipi_dsi_generic_read_request_0_param: - case mipi_dsi_generic_read_request_1_param: - case mipi_dsi_generic_read_request_2_param: - case mipi_dsi_dcs_short_write: - case mipi_dsi_dcs_short_write_param: - case mipi_dsi_dcs_read: - ret = send_short_pkg(sender, data_type, data[0], data[1], hs); - break; - case mipi_dsi_generic_long_write: - case mipi_dsi_dcs_long_write: - ret = send_long_pkg(sender, data_type, data, len, hs); - break; - } - - send_pkg_done(sender, data_type, data, len); - - /*fixme: should i query complete and fifo empty here?*/ - - return ret; -} - -int mdfld_dsi_send_mcs_long(struct mdfld_dsi_pkg_sender *sender, u8 *data, - u32 len, bool hs) -{ - unsigned long flags; - - if (!sender || !data || !len) { - drm_error("invalid parameters "); - return -einval; - } - - spin_lock_irqsave(&sender->lock, flags); - send_pkg(sender, mipi_dsi_dcs_long_write, data, len, hs); - spin_unlock_irqrestore(&sender->lock, flags); - - return 0; -} - -int mdfld_dsi_send_mcs_short(struct mdfld_dsi_pkg_sender *sender, u8 cmd, - u8 param, u8 param_num, bool hs) -{ - u8 data[2]; - unsigned long flags; - u8 data_type; - - if (!sender) { - drm_error("invalid parameter "); - return -einval; - } - - data[0] = cmd; - - if (param_num) { - data_type = mipi_dsi_dcs_short_write_param; - data[1] = param; - } else { - data_type = mipi_dsi_dcs_short_write; - data[1] = 0; - } - - spin_lock_irqsave(&sender->lock, flags); - send_pkg(sender, data_type, data, sizeof(data), hs); - spin_unlock_irqrestore(&sender->lock, flags); - - return 0; -} - -int mdfld_dsi_send_gen_short(struct mdfld_dsi_pkg_sender *sender, u8 param0, - u8 param1, u8 param_num, bool hs) -{ - u8 data[2]; - unsigned long flags; - u8 data_type; - - if (!sender || param_num > 2) { - drm_error("invalid parameter "); - return -einval; - } - - switch (param_num) { - case 0: - data_type = mipi_dsi_generic_short_write_0_param; - data[0] = 0; - data[1] = 0; - break; - case 1: - data_type = mipi_dsi_generic_short_write_1_param; - data[0] = param0; - data[1] = 0; - break; - case 2: - data_type = mipi_dsi_generic_short_write_2_param; - data[0] = param0; - data[1] = param1; - break; - } - - spin_lock_irqsave(&sender->lock, flags); - send_pkg(sender, data_type, data, sizeof(data), hs); - spin_unlock_irqrestore(&sender->lock, flags); - - return 0; -} - -int mdfld_dsi_send_gen_long(struct mdfld_dsi_pkg_sender *sender, u8 *data, - u32 len, bool hs) -{ - unsigned long flags; - - if (!sender || !data || !len) { - drm_error("invalid parameters "); - return -einval; - } - - spin_lock_irqsave(&sender->lock, flags); - send_pkg(sender, mipi_dsi_generic_long_write, data, len, hs); - spin_unlock_irqrestore(&sender->lock, flags); - - return 0; -} - -static int __read_panel_data(struct mdfld_dsi_pkg_sender *sender, u8 data_type, - u8 *data, u16 len, u32 *data_out, u16 len_out, bool hs) -{ - unsigned long flags; - struct drm_device *dev; - int i; - u32 gen_data_reg; - int retry = mdfld_dsi_read_max_count; - - if (!sender || !data_out || !len_out) { - drm_error("invalid parameters "); - return -einval; - } - - dev = sender->dev; - - /** - * do reading. - * 0) send out generic read request - * 1) polling read data avail interrupt - * 2) read data - */ - spin_lock_irqsave(&sender->lock, flags); - - reg_write(sender->mipi_intr_stat_reg, bit(29)); - - if ((reg_read(sender->mipi_intr_stat_reg) & bit(29))) - drm_error("can not clean read data valid interrupt "); - - /*send out read request*/ - send_pkg(sender, data_type, data, len, hs); - - /*polling read data avail interrupt*/ - while (retry && !(reg_read(sender->mipi_intr_stat_reg) & bit(29))) { - udelay(100); - retry--; - } - - if (!retry) { - spin_unlock_irqrestore(&sender->lock, flags); - return -etimedout; - } - - reg_write(sender->mipi_intr_stat_reg, bit(29)); - - /*read data*/ - if (hs) - gen_data_reg = sender->mipi_hs_gen_data_reg; - else - gen_data_reg = sender->mipi_lp_gen_data_reg; - - for (i = 0; i < len_out; i++) - *(data_out + i) = reg_read(gen_data_reg); - - spin_unlock_irqrestore(&sender->lock, flags); - - return 0; -} - -int mdfld_dsi_read_mcs(struct mdfld_dsi_pkg_sender *sender, u8 cmd, - u32 *data, u16 len, bool hs) -{ - if (!sender || !data || !len) { - drm_error("invalid parameters "); - return -einval; - } - - return __read_panel_data(sender, mipi_dsi_dcs_read, &cmd, 1, - data, len, hs); -} - -int mdfld_dsi_pkg_sender_init(struct mdfld_dsi_connector *dsi_connector, - int pipe) -{ - struct mdfld_dsi_pkg_sender *pkg_sender; - struct mdfld_dsi_config *dsi_config = - mdfld_dsi_get_config(dsi_connector); - struct drm_device *dev = dsi_config->dev; - struct drm_psb_private *dev_priv = dev->dev_private; - const struct psb_offset *map = &dev_priv->regmap[pipe]; - u32 mipi_val = 0; - - if (!dsi_connector) { - drm_error("invalid parameter "); - return -einval; - } - - pkg_sender = dsi_connector->pkg_sender; - - if (!pkg_sender || is_err(pkg_sender)) { - pkg_sender = kzalloc(sizeof(struct mdfld_dsi_pkg_sender), - gfp_kernel); - if (!pkg_sender) { - drm_error("create dsi pkg sender failed "); - return -enomem; - } - dsi_connector->pkg_sender = (void *)pkg_sender; - } - - pkg_sender->dev = dev; - pkg_sender->dsi_connector = dsi_connector; - pkg_sender->pipe = pipe; - pkg_sender->pkg_num = 0; - pkg_sender->panel_mode = 0; - pkg_sender->status = mdfld_dsi_pkg_sender_free; - - /*init regs*/ - /* fixme: should just copy the regmap ptr ? */ - pkg_sender->dpll_reg = map->dpll; - pkg_sender->dspcntr_reg = map->cntr; - pkg_sender->pipeconf_reg = map->conf; - pkg_sender->dsplinoff_reg = map->linoff; - pkg_sender->dspsurf_reg = map->surf; - pkg_sender->pipestat_reg = map->status; - - pkg_sender->mipi_intr_stat_reg = mipi_intr_stat_reg(pipe); - pkg_sender->mipi_lp_gen_data_reg = mipi_lp_gen_data_reg(pipe); - pkg_sender->mipi_hs_gen_data_reg = mipi_hs_gen_data_reg(pipe); - pkg_sender->mipi_lp_gen_ctrl_reg = mipi_lp_gen_ctrl_reg(pipe); - pkg_sender->mipi_hs_gen_ctrl_reg = mipi_hs_gen_ctrl_reg(pipe); - pkg_sender->mipi_gen_fifo_stat_reg = mipi_gen_fifo_stat_reg(pipe); - pkg_sender->mipi_data_addr_reg = mipi_data_add_reg(pipe); - pkg_sender->mipi_data_len_reg = mipi_data_len_reg(pipe); - pkg_sender->mipi_cmd_addr_reg = mipi_cmd_add_reg(pipe); - pkg_sender->mipi_cmd_len_reg = mipi_cmd_len_reg(pipe); - - /*init lock*/ - spin_lock_init(&pkg_sender->lock); - - if (mdfld_get_panel_type(dev, pipe) != tc35876x) { - /** - * for video mode, don't enable dpi timing output here, - * will init the dpi timing output during mode setting. - */ - mipi_val = pass_from_sphy_to_afe | sel_flopped_hstx; - - if (pipe == 0) - mipi_val |= 0x2; - - reg_write(mipi_port_control(pipe), mipi_val); - reg_read(mipi_port_control(pipe)); - - /* do dsi controller init */ - mdfld_dsi_controller_init(dsi_config, pipe); - } - - return 0; -} - -void mdfld_dsi_pkg_sender_destroy(struct mdfld_dsi_pkg_sender *sender) -{ - if (!sender || is_err(sender)) - return; - - /*free*/ - kfree(sender); -} - - diff --git a/drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.h b/drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.h --- a/drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.h +++ /dev/null -/* - * copyright ©️ 2010 intel corporation - * - * permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "software"), - * to deal in the software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the software, and to permit persons to whom the - * software is furnished to do so, subject to the following conditions: - * - * the above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * software. - * - * the software is provided "as is", without warranty of any kind, express or - * implied, including but not limited to the warranties of merchantability, - * fitness for a particular purpose and noninfringement. in no event shall - * the authors or copyright holders be liable for any claim, damages or other - * liability, whether in an action of contract, tort or otherwise, arising - * from, out of or in connection with the software or the use or other - * dealings in the software. - * - * authors: - * jackie li<yaodong.li@intel.com> - */ -#ifndef __mdfld_dsi_pkg_sender_h__ -#define __mdfld_dsi_pkg_sender_h__ - -#include <linux/kthread.h> - -#define mdfld_max_dcs_param 8 - -struct mdfld_dsi_pkg_sender { - struct drm_device *dev; - struct mdfld_dsi_connector *dsi_connector; - u32 status; - u32 panel_mode; - - int pipe; - - spinlock_t lock; - - u32 pkg_num; - - /* registers */ - u32 dpll_reg; - u32 dspcntr_reg; - u32 pipeconf_reg; - u32 pipestat_reg; - u32 dsplinoff_reg; - u32 dspsurf_reg; - - u32 mipi_intr_stat_reg; - u32 mipi_lp_gen_data_reg; - u32 mipi_hs_gen_data_reg; - u32 mipi_lp_gen_ctrl_reg; - u32 mipi_hs_gen_ctrl_reg; - u32 mipi_gen_fifo_stat_reg; - u32 mipi_data_addr_reg; - u32 mipi_data_len_reg; - u32 mipi_cmd_addr_reg; - u32 mipi_cmd_len_reg; -}; - -extern int mdfld_dsi_pkg_sender_init(struct mdfld_dsi_connector *dsi_connector, - int pipe); -extern void mdfld_dsi_pkg_sender_destroy(struct mdfld_dsi_pkg_sender *sender); -int mdfld_dsi_send_mcs_short(struct mdfld_dsi_pkg_sender *sender, u8 cmd, - u8 param, u8 param_num, bool hs); -int mdfld_dsi_send_mcs_long(struct mdfld_dsi_pkg_sender *sender, u8 *data, - u32 len, bool hs); -int mdfld_dsi_send_gen_short(struct mdfld_dsi_pkg_sender *sender, u8 param0, - u8 param1, u8 param_num, bool hs); -int mdfld_dsi_send_gen_long(struct mdfld_dsi_pkg_sender *sender, u8 *data, - u32 len, bool hs); -/* read interfaces */ -int mdfld_dsi_read_mcs(struct mdfld_dsi_pkg_sender *sender, u8 cmd, - u32 *data, u16 len, bool hs); - -#endif diff --git a/drivers/gpu/drm/gma500/mdfld_intel_display.c b/drivers/gpu/drm/gma500/mdfld_intel_display.c --- a/drivers/gpu/drm/gma500/mdfld_intel_display.c +++ /dev/null -// spdx-license-identifier: gpl-2.0-only -/* - * copyright ©️ 2006-2007 intel corporation - * - * authors: - * eric anholt <eric@anholt.net> - */ - -#include <linux/delay.h> -#include <linux/i2c.h> -#include <linux/pm_runtime.h> - -#include <drm/drm_crtc.h> -#include <drm/drm_fourcc.h> - -#include "framebuffer.h" -#include "gma_display.h" -#include "mdfld_dsi_output.h" -#include "mdfld_output.h" -#include "psb_intel_reg.h" - -/* hardcoded currently */ -static int ksel = ksel_crystal_19; - -struct psb_intel_range_t { - int min, max; -}; - -struct mrst_limit_t { - struct psb_intel_range_t dot, m, p1; -}; - -struct mrst_clock_t { - /* derived values */ - int dot; - int m; - int p1; -}; - -#define count_max 0x10000000 - -void mdfldwaitforpipedisable(struct drm_device *dev, int pipe) -{ - struct drm_psb_private *dev_priv = dev->dev_private; - const struct psb_offset *map = &dev_priv->regmap[pipe]; - int count, temp; - - switch (pipe) { - case 0: - case 1: - case 2: - break; - default: - drm_error("illegal pipe number. "); - return; - } - - /* fixme jliu7_po */ - gma_wait_for_vblank(dev); - return; - - /* wait for for the pipe disable to take effect. */ - for (count = 0; count < count_max; count++) { - temp = reg_read(map->conf); - if ((temp & pipeaconf_pipe_state) == 0) - break; - } -} - -void mdfldwaitforpipeenable(struct drm_device *dev, int pipe) -{ - struct drm_psb_private *dev_priv = dev->dev_private; - const struct psb_offset *map = &dev_priv->regmap[pipe]; - int count, temp; - - switch (pipe) { - case 0: - case 1: - case 2: - break; - default: - drm_error("illegal pipe number. "); - return; - } - - /* fixme jliu7_po */ - gma_wait_for_vblank(dev); - return; - - /* wait for for the pipe enable to take effect. */ - for (count = 0; count < count_max; count++) { - temp = reg_read(map->conf); - if (temp & pipeaconf_pipe_state) - break; - } -} - -/* - * return the pipe currently connected to the panel fitter, - * or -1 if the panel fitter is not present or not in use - */ -static int psb_intel_panel_fitter_pipe(struct drm_device *dev) -{ - u32 pfit_control; - - pfit_control = reg_read(pfit_control); - - /* see if the panel fitter is in use */ - if ((pfit_control & pfit_enable) == 0) - return -1; - - /* 965 can place panel fitter on either pipe */ - return (pfit_control >> 29) & 0x3; -} - -static int check_fb(struct drm_framebuffer *fb) -{ - if (!fb) - return 0; - - switch (fb->format->cpp[0] * 8) { - case 8: - case 16: - case 24: - case 32: - return 0; - default: - drm_error("unknown color depth "); - return -einval; - } -} - -static int mdfld__intel_pipe_set_base(struct drm_crtc *crtc, int x, int y, - struct drm_framebuffer *old_fb) -{ - struct drm_device *dev = crtc->dev; - struct drm_psb_private *dev_priv = dev->dev_private; - struct drm_framebuffer *fb = crtc->primary->fb; - struct gma_crtc *gma_crtc = to_gma_crtc(crtc); - int pipe = gma_crtc->pipe; - const struct psb_offset *map = &dev_priv->regmap[pipe]; - unsigned long start, offset; - u32 dspcntr; - int ret; - - dev_dbg(dev->dev, "pipe = 0x%x. ", pipe); - - /* no fb bound */ - if (!fb) { - dev_dbg(dev->dev, "no fb bound "); - return 0; - } - - ret = check_fb(fb); - if (ret) - return ret; - - if (pipe > 2) { - drm_error("illegal pipe number. "); - return -einval; - } - - if (!gma_power_begin(dev, true)) - return 0; - - start = to_gtt_range(fb->obj[0])->offset; - offset = y * fb->pitches[0] + x * fb->format->cpp[0]; - - reg_write(map->stride, fb->pitches[0]); - dspcntr = reg_read(map->cntr); - dspcntr &= ~dispplane_pixformat_mask; - - switch (fb->format->cpp[0] * 8) { - case 8: - dspcntr |= dispplane_8bpp; - break; - case 16: - if (fb->format->depth == 15) - dspcntr |= dispplane_15_16bpp; - else - dspcntr |= dispplane_16bpp; - break; - case 24: - case 32: - dspcntr |= dispplane_32bpp_no_alpha; - break; - } - reg_write(map->cntr, dspcntr); - - dev_dbg(dev->dev, "writing base %08lx %08lx %d %d ", - start, offset, x, y); - reg_write(map->linoff, offset); - reg_read(map->linoff); - reg_write(map->surf, start); - reg_read(map->surf); - - gma_power_end(dev); - - return 0; -} - -/* - * disable the pipe, plane and pll. - * - */ -void mdfld_disable_crtc(struct drm_device *dev, int pipe) -{ - struct drm_psb_private *dev_priv = dev->dev_private; - const struct psb_offset *map = &dev_priv->regmap[pipe]; - u32 temp; - - dev_dbg(dev->dev, "pipe = %d ", pipe); - - - if (pipe != 1) - mdfld_dsi_gen_fifo_ready(dev, mipi_gen_fifo_stat_reg(pipe), - hs_ctrl_fifo_empty | hs_data_fifo_empty); - - /* disable display plane */ - temp = reg_read(map->cntr); - if ((temp & display_plane_enable) != 0) { - reg_write(map->cntr, - temp & ~display_plane_enable); - /* flush the plane changes */ - reg_write(map->base, reg_read(map->base)); - reg_read(map->base); - } - - /* fixme_jliu7 mdfld_po revisit */ - - /* next, disable display pipes */ - temp = reg_read(map->conf); - if ((temp & pipeaconf_enable) != 0) { - temp &= ~pipeaconf_enable; - temp |= pipeconf_plane_off | pipeconf_cursor_off; - reg_write(map->conf, temp); - reg_read(map->conf); - - /* wait for for the pipe disable to take effect. */ - mdfldwaitforpipedisable(dev, pipe); - } - - temp = reg_read(map->dpll); - if (temp & dpll_vco_enable) { - if ((pipe != 1 && - !((reg_read(pipeaconf) | reg_read(pipecconf)) - & pipeaconf_enable)) || pipe == 1) { - temp &= ~(dpll_vco_enable); - reg_write(map->dpll, temp); - reg_read(map->dpll); - /* wait for the clocks to turn off. */ - /* fixme_mdfld po may need more delay */ - udelay(500); - - if (!(temp & mdfld_pwr_gate_en)) { - /* gating power of dpll */ - reg_write(map->dpll, temp | mdfld_pwr_gate_en); - /* fixme_mdfld po - change 500 to 1 after po */ - udelay(5000); - } - } - } - -} - -/* - * sets the power management mode of the pipe and plane. - * - * this code should probably grow support for turning the cursor off and back - * on appropriately at the same time as we're turning the pipe off/on. - */ -static void mdfld_crtc_dpms(struct drm_crtc *crtc, int mode) -{ - struct drm_device *dev = crtc->dev; - struct drm_psb_private *dev_priv = dev->dev_private; - struct gma_crtc *gma_crtc = to_gma_crtc(crtc); - int pipe = gma_crtc->pipe; - const struct psb_offset *map = &dev_priv->regmap[pipe]; - u32 pipeconf = dev_priv->pipeconf[pipe]; - u32 temp; - int timeout = 0; - - dev_dbg(dev->dev, "mode = %d, pipe = %d ", mode, pipe); - - /* note: old code uses pipe a stat for pipe b but that appears - to be a bug */ - - if (!gma_power_begin(dev, true)) - return; - - /* xxx: when our outputs are all unaware of dpms modes other than off - * and on, we should map those modes to drm_mode_dpms_off in the crtc. - */ - switch (mode) { - case drm_mode_dpms_on: - case drm_mode_dpms_standby: - case drm_mode_dpms_suspend: - /* enable the dpll */ - temp = reg_read(map->dpll); - - if ((temp & dpll_vco_enable) == 0) { - /* when ungating power of dpll, needs to wait 0.5us - before enable the vco */ - if (temp & mdfld_pwr_gate_en) { - temp &= ~mdfld_pwr_gate_en; - reg_write(map->dpll, temp); - /* fixme_mdfld po - change 500 to 1 after po */ - udelay(500); - } - - reg_write(map->dpll, temp); - reg_read(map->dpll); - /* fixme_mdfld po - change 500 to 1 after po */ - udelay(500); - - reg_write(map->dpll, temp | dpll_vco_enable); - reg_read(map->dpll); - - /** - * wait for dsi pll to lock - * note: only need to poll status of pipe 0 and pipe 1, - * since both mipi pipes share the same pll. - */ - while ((pipe != 2) && (timeout < 20000) && - !(reg_read(map->conf) & pipeconf_dsipll_lock)) { - udelay(150); - timeout++; - } - } - - /* enable the plane */ - temp = reg_read(map->cntr); - if ((temp & display_plane_enable) == 0) { - reg_write(map->cntr, - temp | display_plane_enable); - /* flush the plane changes */ - reg_write(map->base, reg_read(map->base)); - } - - /* enable the pipe */ - temp = reg_read(map->conf); - if ((temp & pipeaconf_enable) == 0) { - reg_write(map->conf, pipeconf); - - /* wait for for the pipe enable to take effect. */ - mdfldwaitforpipeenable(dev, pipe); - } - - /*workaround for sighting 3741701 random x blank display*/ - /*perform w/a in video mode only on pipe a or c*/ - if (pipe == 0 || pipe == 2) { - reg_write(map->status, reg_read(map->status)); - msleep(100); - if (pipe_vblank_status & reg_read(map->status)) - dev_dbg(dev->dev, "ok"); - else { - dev_dbg(dev->dev, "stuck!!!!"); - /*shutdown controller*/ - temp = reg_read(map->cntr); - reg_write(map->cntr, - temp & ~display_plane_enable); - reg_write(map->base, reg_read(map->base)); - /*mdfld_dsi_dpi_shut_down(dev, pipe);*/ - reg_write(0xb048, 1); - msleep(100); - temp = reg_read(map->conf); - temp &= ~pipeaconf_enable; - reg_write(map->conf, temp); - msleep(100); /*wait for pipe disable*/ - reg_write(mipi_device_ready_reg(pipe), 0); - msleep(100); - reg_write(0xb004, reg_read(0xb004)); - /* try to bring the controller back up again*/ - reg_write(mipi_device_ready_reg(pipe), 1); - temp = reg_read(map->cntr); - reg_write(map->cntr, - temp | display_plane_enable); - reg_write(map->base, reg_read(map->base)); - /*mdfld_dsi_dpi_turn_on(dev, pipe);*/ - reg_write(0xb048, 2); - msleep(100); - temp = reg_read(map->conf); - temp |= pipeaconf_enable; - reg_write(map->conf, temp); - } - } - - gma_crtc_load_lut(crtc); - - /* give the overlay scaler a chance to enable - if it's on this pipe */ - /* psb_intel_crtc_dpms_video(crtc, true); todo */ - - break; - case drm_mode_dpms_off: - /* give the overlay scaler a chance to disable - * if it's on this pipe */ - /* psb_intel_crtc_dpms_video(crtc, false); todo */ - if (pipe != 1) - mdfld_dsi_gen_fifo_ready(dev, - mipi_gen_fifo_stat_reg(pipe), - hs_ctrl_fifo_empty | hs_data_fifo_empty); - - /* disable the vga plane that we never use */ - reg_write(vgacntrl, vga_disp_disable); - - /* disable display plane */ - temp = reg_read(map->cntr); - if ((temp & display_plane_enable) != 0) { - reg_write(map->cntr, - temp & ~display_plane_enable); - /* flush the plane changes */ - reg_write(map->base, reg_read(map->base)); - reg_read(map->base); - } - - /* next, disable display pipes */ - temp = reg_read(map->conf); - if ((temp & pipeaconf_enable) != 0) { - temp &= ~pipeaconf_enable; - temp |= pipeconf_plane_off | pipeconf_cursor_off; - reg_write(map->conf, temp); - reg_read(map->conf); - - /* wait for for the pipe disable to take effect. */ - mdfldwaitforpipedisable(dev, pipe); - } - - temp = reg_read(map->dpll); - if (temp & dpll_vco_enable) { - if ((pipe != 1 && !((reg_read(pipeaconf) - | reg_read(pipecconf)) & pipeaconf_enable)) - || pipe == 1) { - temp &= ~(dpll_vco_enable); - reg_write(map->dpll, temp); - reg_read(map->dpll); - /* wait for the clocks to turn off. */ - /* fixme_mdfld po may need more delay */ - udelay(500); - } - } - break; - } - gma_power_end(dev); -} - - -#define mdfld_limt_dpll_19 0 -#define mdfld_limt_dpll_25 1 -#define mdfld_limt_dpll_83 2 -#define mdfld_limt_dpll_100 3 -#define mdfld_limt_dsipll_19 4 -#define mdfld_limt_dsipll_25 5 -#define mdfld_limt_dsipll_83 6 -#define mdfld_limt_dsipll_100 7 - -#define mdfld_dot_min 19750 -#define mdfld_dot_max 120000 -#define mdfld_dpll_m_min_19 113 -#define mdfld_dpll_m_max_19 155 -#define mdfld_dpll_p1_min_19 2 -#define mdfld_dpll_p1_max_19 10 -#define mdfld_dpll_m_min_25 101 -#define mdfld_dpll_m_max_25 130 -#define mdfld_dpll_p1_min_25 2 -#define mdfld_dpll_p1_max_25 10 -#define mdfld_dpll_m_min_83 64 -#define mdfld_dpll_m_max_83 64 -#define mdfld_dpll_p1_min_83 2 -#define mdfld_dpll_p1_max_83 2 -#define mdfld_dpll_m_min_100 64 -#define mdfld_dpll_m_max_100 64 -#define mdfld_dpll_p1_min_100 2 -#define mdfld_dpll_p1_max_100 2 -#define mdfld_dsipll_m_min_19 131 -#define mdfld_dsipll_m_max_19 175 -#define mdfld_dsipll_p1_min_19 3 -#define mdfld_dsipll_p1_max_19 8 -#define mdfld_dsipll_m_min_25 97 -#define mdfld_dsipll_m_max_25 140 -#define mdfld_dsipll_p1_min_25 3 -#define mdfld_dsipll_p1_max_25 9 -#define mdfld_dsipll_m_min_83 33 -#define mdfld_dsipll_m_max_83 92 -#define mdfld_dsipll_p1_min_83 2 -#define mdfld_dsipll_p1_max_83 3 -#define mdfld_dsipll_m_min_100 97 -#define mdfld_dsipll_m_max_100 140 -#define mdfld_dsipll_p1_min_100 3 -#define mdfld_dsipll_p1_max_100 9 - -static const struct mrst_limit_t mdfld_limits[] = { - { /* mdfld_limt_dpll_19 */ - .dot = {.min = mdfld_dot_min, .max = mdfld_dot_max}, - .m = {.min = mdfld_dpll_m_min_19, .max = mdfld_dpll_m_max_19}, - .p1 = {.min = mdfld_dpll_p1_min_19, .max = mdfld_dpll_p1_max_19}, - }, - { /* mdfld_limt_dpll_25 */ - .dot = {.min = mdfld_dot_min, .max = mdfld_dot_max}, - .m = {.min = mdfld_dpll_m_min_25, .max = mdfld_dpll_m_max_25}, - .p1 = {.min = mdfld_dpll_p1_min_25, .max = mdfld_dpll_p1_max_25}, - }, - { /* mdfld_limt_dpll_83 */ - .dot = {.min = mdfld_dot_min, .max = mdfld_dot_max}, - .m = {.min = mdfld_dpll_m_min_83, .max = mdfld_dpll_m_max_83}, - .p1 = {.min = mdfld_dpll_p1_min_83, .max = mdfld_dpll_p1_max_83}, - }, - { /* mdfld_limt_dpll_100 */ - .dot = {.min = mdfld_dot_min, .max = mdfld_dot_max}, - .m = {.min = mdfld_dpll_m_min_100, .max = mdfld_dpll_m_max_100}, - .p1 = {.min = mdfld_dpll_p1_min_100, .max = mdfld_dpll_p1_max_100}, - }, - { /* mdfld_limt_dsipll_19 */ - .dot = {.min = mdfld_dot_min, .max = mdfld_dot_max}, - .m = {.min = mdfld_dsipll_m_min_19, .max = mdfld_dsipll_m_max_19}, - .p1 = {.min = mdfld_dsipll_p1_min_19, .max = mdfld_dsipll_p1_max_19}, - }, - { /* mdfld_limt_dsipll_25 */ - .dot = {.min = mdfld_dot_min, .max = mdfld_dot_max}, - .m = {.min = mdfld_dsipll_m_min_25, .max = mdfld_dsipll_m_max_25}, - .p1 = {.min = mdfld_dsipll_p1_min_25, .max = mdfld_dsipll_p1_max_25}, - }, - { /* mdfld_limt_dsipll_83 */ - .dot = {.min = mdfld_dot_min, .max = mdfld_dot_max}, - .m = {.min = mdfld_dsipll_m_min_83, .max = mdfld_dsipll_m_max_83}, - .p1 = {.min = mdfld_dsipll_p1_min_83, .max = mdfld_dsipll_p1_max_83}, - }, - { /* mdfld_limt_dsipll_100 */ - .dot = {.min = mdfld_dot_min, .max = mdfld_dot_max}, - .m = {.min = mdfld_dsipll_m_min_100, .max = mdfld_dsipll_m_max_100}, - .p1 = {.min = mdfld_dsipll_p1_min_100, .max = mdfld_dsipll_p1_max_100}, - }, -}; - -#define mdfld_m_min 21 -#define mdfld_m_max 180 -static const u32 mdfld_m_converts[] = { -/* m configuration table from 9-bit lfsr table */ - 224, 368, 440, 220, 366, 439, 219, 365, 182, 347, /* 21 - 30 */ - 173, 342, 171, 85, 298, 149, 74, 37, 18, 265, /* 31 - 40 */ - 388, 194, 353, 432, 216, 108, 310, 155, 333, 166, /* 41 - 50 */ - 83, 41, 276, 138, 325, 162, 337, 168, 340, 170, /* 51 - 60 */ - 341, 426, 469, 234, 373, 442, 221, 110, 311, 411, /* 61 - 70 */ - 461, 486, 243, 377, 188, 350, 175, 343, 427, 213, /* 71 - 80 */ - 106, 53, 282, 397, 354, 227, 113, 56, 284, 142, /* 81 - 90 */ - 71, 35, 273, 136, 324, 418, 465, 488, 500, 506, /* 91 - 100 */ - 253, 126, 63, 287, 399, 455, 483, 241, 376, 444, /* 101 - 110 */ - 478, 495, 503, 251, 381, 446, 479, 239, 375, 443, /* 111 - 120 */ - 477, 238, 119, 315, 157, 78, 295, 147, 329, 420, /* 121 - 130 */ - 210, 105, 308, 154, 77, 38, 275, 137, 68, 290, /* 131 - 140 */ - 145, 328, 164, 82, 297, 404, 458, 485, 498, 249, /* 141 - 150 */ - 380, 190, 351, 431, 471, 235, 117, 314, 413, 206, /* 151 - 160 */ - 103, 51, 25, 12, 262, 387, 193, 96, 48, 280, /* 161 - 170 */ - 396, 198, 99, 305, 152, 76, 294, 403, 457, 228, /* 171 - 180 */ -}; - -static const struct mrst_limit_t *mdfld_limit(struct drm_crtc *crtc) -{ - const struct mrst_limit_t *limit = null; - struct drm_device *dev = crtc->dev; - struct drm_psb_private *dev_priv = dev->dev_private; - - if (gma_pipe_has_type(crtc, intel_output_mipi) - || gma_pipe_has_type(crtc, intel_output_mipi2)) { - if ((ksel == ksel_crystal_19) || (ksel == ksel_bypass_19)) - limit = &mdfld_limits[mdfld_limt_dsipll_19]; - else if (ksel == ksel_bypass_25) - limit = &mdfld_limits[mdfld_limt_dsipll_25]; - else if ((ksel == ksel_bypass_83_100) && - (dev_priv->core_freq == 166)) - limit = &mdfld_limits[mdfld_limt_dsipll_83]; - else if ((ksel == ksel_bypass_83_100) && - (dev_priv->core_freq == 100 || - dev_priv->core_freq == 200)) - limit = &mdfld_limits[mdfld_limt_dsipll_100]; - } else if (gma_pipe_has_type(crtc, intel_output_hdmi)) { - if ((ksel == ksel_crystal_19) || (ksel == ksel_bypass_19)) - limit = &mdfld_limits[mdfld_limt_dpll_19]; - else if (ksel == ksel_bypass_25) - limit = &mdfld_limits[mdfld_limt_dpll_25]; - else if ((ksel == ksel_bypass_83_100) && - (dev_priv->core_freq == 166)) - limit = &mdfld_limits[mdfld_limt_dpll_83]; - else if ((ksel == ksel_bypass_83_100) && - (dev_priv->core_freq == 100 || - dev_priv->core_freq == 200)) - limit = &mdfld_limits[mdfld_limt_dpll_100]; - } else { - limit = null; - dev_dbg(dev->dev, "mdfld_limit wrong display type. "); - } - - return limit; -} - -/** derive the pixel clock for the given refclk and divisors for 8xx chips. */ -static void mdfld_clock(int refclk, struct mrst_clock_t *clock) -{ - clock->dot = (refclk * clock->m) / clock->p1; -} - -/* - * returns a set of divisors for the desired target clock with the given refclk, - * or false. divisor values are the actual divisors for - */ -static bool -mdfldfindbestpll(struct drm_crtc *crtc, int target, int refclk, - struct mrst_clock_t *best_clock) -{ - struct mrst_clock_t clock; - const struct mrst_limit_t *limit = mdfld_limit(crtc); - int err = target; - - memset(best_clock, 0, sizeof(*best_clock)); - - for (clock.m = limit->m.min; clock.m <= limit->m.max; clock.m++) { - for (clock.p1 = limit->p1.min; clock.p1 <= limit->p1.max; - clock.p1++) { - int this_err; - - mdfld_clock(refclk, &clock); - - this_err = abs(clock.dot - target); - if (this_err < err) { - *best_clock = clock; - err = this_err; - } - } - } - return err != target; -} - -static int mdfld_crtc_mode_set(struct drm_crtc *crtc, - struct drm_display_mode *mode, - struct drm_display_mode *adjusted_mode, - int x, int y, - struct drm_framebuffer *old_fb) -{ - struct drm_device *dev = crtc->dev; - struct gma_crtc *gma_crtc = to_gma_crtc(crtc); - struct drm_psb_private *dev_priv = dev->dev_private; - int pipe = gma_crtc->pipe; - const struct psb_offset *map = &dev_priv->regmap[pipe]; - int refclk = 0; - int clk_n = 0, clk_p2 = 0, clk_byte = 1, clk = 0, m_conv = 0, - clk_tmp = 0; - struct mrst_clock_t clock; - bool ok; - u32 dpll = 0, fp = 0; - bool is_mipi = false, is_mipi2 = false, is_hdmi = false; - struct drm_mode_config *mode_config = &dev->mode_config; - struct gma_encoder *gma_encoder = null; - uint64_t scalingtype = drm_mode_scale_fullscreen; - struct drm_encoder *encoder; - struct drm_connector *connector; - int timeout = 0; - int ret; - - dev_dbg(dev->dev, "pipe = 0x%x ", pipe); - - ret = check_fb(crtc->primary->fb); - if (ret) - return ret; - - dev_dbg(dev->dev, "adjusted_hdisplay = %d ", - adjusted_mode->hdisplay); - dev_dbg(dev->dev, "adjusted_vdisplay = %d ", - adjusted_mode->vdisplay); - dev_dbg(dev->dev, "adjusted_hsync_start = %d ", - adjusted_mode->hsync_start); - dev_dbg(dev->dev, "adjusted_hsync_end = %d ", - adjusted_mode->hsync_end); - dev_dbg(dev->dev, "adjusted_htotal = %d ", - adjusted_mode->htotal); - dev_dbg(dev->dev, "adjusted_vsync_start = %d ", - adjusted_mode->vsync_start); - dev_dbg(dev->dev, "adjusted_vsync_end = %d ", - adjusted_mode->vsync_end); - dev_dbg(dev->dev, "adjusted_vtotal = %d ", - adjusted_mode->vtotal); - dev_dbg(dev->dev, "adjusted_clock = %d ", - adjusted_mode->clock); - dev_dbg(dev->dev, "hdisplay = %d ", - mode->hdisplay); - dev_dbg(dev->dev, "vdisplay = %d ", - mode->vdisplay); - - if (!gma_power_begin(dev, true)) - return 0; - - memcpy(&gma_crtc->saved_mode, mode, - sizeof(struct drm_display_mode)); - memcpy(&gma_crtc->saved_adjusted_mode, adjusted_mode, - sizeof(struct drm_display_mode)); - - list_for_each_entry(connector, &mode_config->connector_list, head) { - encoder = connector->encoder; - if (!encoder) - continue; - - if (encoder->crtc != crtc) - continue; - - gma_encoder = gma_attached_encoder(connector); - - switch (gma_encoder->type) { - case intel_output_mipi: - is_mipi = true; - break; - case intel_output_mipi2: - is_mipi2 = true; - break; - case intel_output_hdmi: - is_hdmi = true; - break; - } - } - - /* disable the vga plane that we never use */ - reg_write(vgacntrl, vga_disp_disable); - - /* disable the panel fitter if it was on our pipe */ - if (psb_intel_panel_fitter_pipe(dev) == pipe) - reg_write(pfit_control, 0); - - /* pipesrc and dspsize control the size that is scaled from, - * which should always be the user's requested size. - */ - if (pipe == 1) { - /* fixme: to make hdmi display with 864x480 (tpo), 480x864 - * (pyr) or 480x854 (tmd), set the sprite width/height and - * souce image size registers with the adjusted mode for - * pipe b. - */ - - /* - * the defined sprite rectangle must always be completely - * contained within the displayable area of the screen image - * (frame buffer). - */ - reg_write(map->size, ((min(mode->crtc_vdisplay, adjusted_mode->crtc_vdisplay) - 1) << 16) - | (min(mode->crtc_hdisplay, adjusted_mode->crtc_hdisplay) - 1)); - /* set the crtc with encoder mode. */ - reg_write(map->src, ((mode->crtc_hdisplay - 1) << 16) - | (mode->crtc_vdisplay - 1)); - } else { - reg_write(map->size, - ((mode->crtc_vdisplay - 1) << 16) | - (mode->crtc_hdisplay - 1)); - reg_write(map->src, - ((mode->crtc_hdisplay - 1) << 16) | - (mode->crtc_vdisplay - 1)); - } - - reg_write(map->pos, 0); - - if (gma_encoder) - drm_object_property_get_value(&connector->base, - dev->mode_config.scaling_mode_property, &scalingtype); - - if (scalingtype == drm_mode_scale_no_scale) { - /* medfield doesn't have register support for centering so we - * need to mess with the h/vblank and h/vsync start and ends - * to get centering - */ - int offsetx = 0, offsety = 0; - - offsetx = (adjusted_mode->crtc_hdisplay - - mode->crtc_hdisplay) / 2; - offsety = (adjusted_mode->crtc_vdisplay - - mode->crtc_vdisplay) / 2; - - reg_write(map->htotal, (mode->crtc_hdisplay - 1) | - ((adjusted_mode->crtc_htotal - 1) << 16)); - reg_write(map->vtotal, (mode->crtc_vdisplay - 1) | - ((adjusted_mode->crtc_vtotal - 1) << 16)); - reg_write(map->hblank, (adjusted_mode->crtc_hblank_start - - offsetx - 1) | - ((adjusted_mode->crtc_hblank_end - offsetx - 1) << 16)); - reg_write(map->hsync, (adjusted_mode->crtc_hsync_start - - offsetx - 1) | - ((adjusted_mode->crtc_hsync_end - offsetx - 1) << 16)); - reg_write(map->vblank, (adjusted_mode->crtc_vblank_start - - offsety - 1) | - ((adjusted_mode->crtc_vblank_end - offsety - 1) << 16)); - reg_write(map->vsync, (adjusted_mode->crtc_vsync_start - - offsety - 1) | - ((adjusted_mode->crtc_vsync_end - offsety - 1) << 16)); - } else { - reg_write(map->htotal, (adjusted_mode->crtc_hdisplay - 1) | - ((adjusted_mode->crtc_htotal - 1) << 16)); - reg_write(map->vtotal, (adjusted_mode->crtc_vdisplay - 1) | - ((adjusted_mode->crtc_vtotal - 1) << 16)); - reg_write(map->hblank, (adjusted_mode->crtc_hblank_start - 1) | - ((adjusted_mode->crtc_hblank_end - 1) << 16)); - reg_write(map->hsync, (adjusted_mode->crtc_hsync_start - 1) | - ((adjusted_mode->crtc_hsync_end - 1) << 16)); - reg_write(map->vblank, (adjusted_mode->crtc_vblank_start - 1) | - ((adjusted_mode->crtc_vblank_end - 1) << 16)); - reg_write(map->vsync, (adjusted_mode->crtc_vsync_start - 1) | - ((adjusted_mode->crtc_vsync_end - 1) << 16)); - } - - /* flush the plane changes */ - { - const struct drm_crtc_helper_funcs *crtc_funcs = - crtc->helper_private; - crtc_funcs->mode_set_base(crtc, x, y, old_fb); - } - - /* setup pipeconf */ - dev_priv->pipeconf[pipe] = pipeaconf_enable; /* fixme_jliu7 reg_read(pipeconf_reg); */ - - /* set up the display plane register */ - dev_priv->dspcntr[pipe] = reg_read(map->cntr); - dev_priv->dspcntr[pipe] |= pipe << dispplane_sel_pipe_pos; - dev_priv->dspcntr[pipe] |= display_plane_enable; - - if (is_mipi2) - goto mrst_crtc_mode_set_exit; - clk = adjusted_mode->clock; - - if (is_hdmi) { - if ((ksel == ksel_crystal_19) || (ksel == ksel_bypass_19)) { - refclk = 19200; - - if (is_mipi || is_mipi2) - clk_n = 1, clk_p2 = 8; - else if (is_hdmi) - clk_n = 1, clk_p2 = 10; - } else if (ksel == ksel_bypass_25) { - refclk = 25000; - - if (is_mipi || is_mipi2) - clk_n = 1, clk_p2 = 8; - else if (is_hdmi) - clk_n = 1, clk_p2 = 10; - } else if ((ksel == ksel_bypass_83_100) && - dev_priv->core_freq == 166) { - refclk = 83000; - - if (is_mipi || is_mipi2) - clk_n = 4, clk_p2 = 8; - else if (is_hdmi) - clk_n = 4, clk_p2 = 10; - } else if ((ksel == ksel_bypass_83_100) && - (dev_priv->core_freq == 100 || - dev_priv->core_freq == 200)) { - refclk = 100000; - if (is_mipi || is_mipi2) - clk_n = 4, clk_p2 = 8; - else if (is_hdmi) - clk_n = 4, clk_p2 = 10; - } - - if (is_mipi) - clk_byte = dev_priv->bpp / 8; - else if (is_mipi2) - clk_byte = dev_priv->bpp2 / 8; - - clk_tmp = clk * clk_n * clk_p2 * clk_byte; - - dev_dbg(dev->dev, "clk = %d, clk_n = %d, clk_p2 = %d. ", - clk, clk_n, clk_p2); - dev_dbg(dev->dev, "adjusted_mode->clock = %d, clk_tmp = %d. ", - adjusted_mode->clock, clk_tmp); - - ok = mdfldfindbestpll(crtc, clk_tmp, refclk, &clock); - - if (!ok) { - drm_error - ("mdfldfindbestpll fail in mdfld_crtc_mode_set. "); - } else { - m_conv = mdfld_m_converts[(clock.m - mdfld_m_min)]; - - dev_dbg(dev->dev, "dot clock = %d," - "m = %d, p1 = %d, m_conv = %d. ", - clock.dot, clock.m, - clock.p1, m_conv); - } - - dpll = reg_read(map->dpll); - - if (dpll & dpll_vco_enable) { - dpll &= ~dpll_vco_enable; - reg_write(map->dpll, dpll); - reg_read(map->dpll); - - /* fixme jliu7 check the dpll lock bit pipeaconf[29] */ - /* fixme_mdfld po - change 500 to 1 after po */ - udelay(500); - - /* reset m1, n1 & p1 */ - reg_write(map->fp0, 0); - dpll &= ~mdfld_p1_mask; - reg_write(map->dpll, dpll); - /* fixme_mdfld po - change 500 to 1 after po */ - udelay(500); - } - - /* when ungating power of dpll, needs to wait 0.5us before - * enable the vco */ - if (dpll & mdfld_pwr_gate_en) { - dpll &= ~mdfld_pwr_gate_en; - reg_write(map->dpll, dpll); - /* fixme_mdfld po - change 500 to 1 after po */ - udelay(500); - } - dpll = 0; - - if (is_hdmi) - dpll |= mdfld_vco_sel; - - fp = (clk_n / 2) << 16; - fp |= m_conv; - - /* compute bitmask from p1 value */ - dpll |= (1 << (clock.p1 - 2)) << 17; - - } else { - dpll = 0x00800000; - fp = 0x000000c1; - } - - reg_write(map->fp0, fp); - reg_write(map->dpll, dpll); - /* fixme_mdfld po - change 500 to 1 after po */ - udelay(500); - - dpll |= dpll_vco_enable; - reg_write(map->dpll, dpll); - reg_read(map->dpll); - - /* wait for dsi pll to lock */ - while (timeout < 20000 && - !(reg_read(map->conf) & pipeconf_dsipll_lock)) { - udelay(150); - timeout++; - } - - if (is_mipi) - goto mrst_crtc_mode_set_exit; - - dev_dbg(dev->dev, "is_mipi = 0x%x ", is_mipi); - - reg_write(map->conf, dev_priv->pipeconf[pipe]); - reg_read(map->conf); - - /* wait for for the pipe enable to take effect. */ - reg_write(map->cntr, dev_priv->dspcntr[pipe]); - gma_wait_for_vblank(dev); - -mrst_crtc_mode_set_exit: - - gma_power_end(dev); - - return 0; -} - -const struct drm_crtc_helper_funcs mdfld_helper_funcs = { - .dpms = mdfld_crtc_dpms, - .mode_set = mdfld_crtc_mode_set, - .mode_set_base = mdfld__intel_pipe_set_base, - .prepare = gma_crtc_prepare, - .commit = gma_crtc_commit, -}; diff --git a/drivers/gpu/drm/gma500/mdfld_output.c b/drivers/gpu/drm/gma500/mdfld_output.c --- a/drivers/gpu/drm/gma500/mdfld_output.c +++ /dev/null -/* - * copyright (c) 2010 intel corporation - * - * permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "software"), - * to deal in the software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicensen - * and/or sell copies of the software, and to permit persons to whom the - * software is furnished to do so, subject to the following conditions: - * - * the above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * software. - * - * the software is provided "as is", without warranty of any kind, express or - * implied, including but not limited to the warranties of merchantability, - * fitness for a particular purpose and noninfringement. in no event shall - * the authors or copyright holders be liable for any claim, damages or other - * liability, whether in an action of contract, tort or otherwise, arising - * from, out of or in connection with the software or the use or other - * dealings in the software. - * - * authors: - * thomas eaton <thomas.g.eaton@intel.com> - * scott rowe <scott.m.rowe@intel.com> -*/ - -#include "mdfld_output.h" -#include "mdfld_dsi_dpi.h" -#include "mdfld_dsi_output.h" - -#include "tc35876x-dsi-lvds.h" - -int mdfld_get_panel_type(struct drm_device *dev, int pipe) -{ - struct drm_psb_private *dev_priv = dev->dev_private; - return dev_priv->mdfld_panel_id; -} - -static void mdfld_init_panel(struct drm_device *dev, int mipi_pipe, - int p_type) -{ - switch (p_type) { - case tpo_vid: - mdfld_dsi_output_init(dev, mipi_pipe, &mdfld_tpo_vid_funcs); - break; - case tc35876x: - tc35876x_init(dev); - mdfld_dsi_output_init(dev, mipi_pipe, &mdfld_tc35876x_funcs); - break; - case tmd_vid: - mdfld_dsi_output_init(dev, mipi_pipe, &mdfld_tmd_vid_funcs); - break; - case hdmi: -/* if (dev_priv->mdfld_hdmi_present) - mdfld_hdmi_init(dev, &dev_priv->mode_dev); */ - break; - } -} - - -int mdfld_output_init(struct drm_device *dev) -{ - struct drm_psb_private *dev_priv = dev->dev_private; - - /* fixme: hardcoded for now */ - dev_priv->mdfld_panel_id = tc35876x; - /* mipi panel 1 */ - mdfld_init_panel(dev, 0, dev_priv->mdfld_panel_id); - /* hdmi panel */ - mdfld_init_panel(dev, 1, hdmi); - return 0; -} - diff --git a/drivers/gpu/drm/gma500/mdfld_output.h b/drivers/gpu/drm/gma500/mdfld_output.h --- a/drivers/gpu/drm/gma500/mdfld_output.h +++ /dev/null -/* - * copyright (c) 2010 intel corporation - * - * permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "software"), - * to deal in the software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicensen - * and/or sell copies of the software, and to permit persons to whom the - * software is furnished to do so, subject to the following conditions: - * - * the above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * software. - * - * the software is provided "as is", without warranty of any kind, express or - * implied, including but not limited to the warranties of merchantability, - * fitness for a particular purpose and noninfringement. in no event shall - * the authors or copyright holders be liable for any claim, damages or other - * liability, whether in an action of contract, tort or otherwise, arising - * from, out of or in connection with the software or the use or other - * dealings in the software. - * - * authors: - * thomas eaton <thomas.g.eaton@intel.com> - * scott rowe <scott.m.rowe@intel.com> -*/ - -#ifndef mdfld_output_h -#define mdfld_output_h - -#include "psb_drv.h" - -#define tpo_panel_width 84 -#define tpo_panel_height 46 -#define tmd_panel_width 39 -#define tmd_panel_height 71 - -struct mdfld_dsi_config; - -enum panel_type { - tpo_vid, - tmd_vid, - hdmi, - tc35876x, -}; - -struct panel_info { - u32 width_mm; - u32 height_mm; - /* other info */ -}; - -struct panel_funcs { - const struct drm_encoder_helper_funcs *encoder_helper_funcs; - struct drm_display_mode * (*get_config_mode)(struct drm_device *); - int (*get_panel_info)(struct drm_device *, int, struct panel_info *); - int (*reset)(struct drm_device *, int); - void (*drv_ic_init)(struct mdfld_dsi_config *dsi_config, int pipe); -}; - -int mdfld_output_init(struct drm_device *dev); - -struct backlight_device *mdfld_get_backlight_device(void); -int mdfld_set_brightness(struct backlight_device *bd); - -int mdfld_get_panel_type(struct drm_device *dev, int pipe); - -extern const struct drm_crtc_helper_funcs mdfld_helper_funcs; - -extern const struct panel_funcs mdfld_tmd_vid_funcs; -extern const struct panel_funcs mdfld_tpo_vid_funcs; - -extern void mdfld_disable_crtc(struct drm_device *dev, int pipe); -extern void mdfldwaitforpipeenable(struct drm_device *dev, int pipe); -extern void mdfldwaitforpipedisable(struct drm_device *dev, int pipe); -#endif diff --git a/drivers/gpu/drm/gma500/mdfld_tmd_vid.c b/drivers/gpu/drm/gma500/mdfld_tmd_vid.c --- a/drivers/gpu/drm/gma500/mdfld_tmd_vid.c +++ /dev/null -/* - * copyright ©️ 2010 intel corporation - * - * permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "software"), - * to deal in the software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the software, and to permit persons to whom the - * software is furnished to do so, subject to the following conditions: - * - * the above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * software. - * - * the software is provided "as is", without warranty of any kind, express or - * implied, including but not limited to the warranties of merchantability, - * fitness for a particular purpose and noninfringement. in no event shall - * the authors or copyright holders be liable for any claim, damages or other - * liability, whether in an action of contract, tort or otherwise, arising - * from, out of or in connection with the software or the use or other - * dealings in the software. - * - * authors: - * jim liu <jim.liu@intel.com> - * jackie li<yaodong.li@intel.com> - * gideon eaton <eaton. - * scott rowe <scott.m.rowe@intel.com> - */ - -#include <linux/delay.h> - -#include "mdfld_dsi_dpi.h" -#include "mdfld_dsi_pkg_sender.h" - -static struct drm_display_mode *tmd_vid_get_config_mode(struct drm_device *dev) -{ - struct drm_display_mode *mode; - struct drm_psb_private *dev_priv = dev->dev_private; - struct oaktrail_timing_info *ti = &dev_priv->gct_data.dtd; - bool use_gct = false; /*disable gct for now*/ - - mode = kzalloc(sizeof(*mode), gfp_kernel); - if (!mode) - return null; - - if (use_gct) { - mode->hdisplay = (ti->hactive_hi << 8) | ti->hactive_lo; - mode->vdisplay = (ti->vactive_hi << 8) | ti->vactive_lo; - mode->hsync_start = mode->hdisplay + \ - ((ti->hsync_offset_hi << 8) | \ - ti->hsync_offset_lo); - mode->hsync_end = mode->hsync_start + \ - ((ti->hsync_pulse_width_hi << 8) | \ - ti->hsync_pulse_width_lo); - mode->htotal = mode->hdisplay + ((ti->hblank_hi << 8) | \ - ti->hblank_lo); - mode->vsync_start = \ - mode->vdisplay + ((ti->vsync_offset_hi << 8) | \ - ti->vsync_offset_lo); - mode->vsync_end = \ - mode->vsync_start + ((ti->vsync_pulse_width_hi << 8) | \ - ti->vsync_pulse_width_lo); - mode->vtotal = mode->vdisplay + \ - ((ti->vblank_hi << 8) | ti->vblank_lo); - mode->clock = ti->pixel_clock * 10; - - dev_dbg(dev->dev, "hdisplay is %d ", mode->hdisplay); - dev_dbg(dev->dev, "vdisplay is %d ", mode->vdisplay); - dev_dbg(dev->dev, "hss is %d ", mode->hsync_start); - dev_dbg(dev->dev, "hse is %d ", mode->hsync_end); - dev_dbg(dev->dev, "htotal is %d ", mode->htotal); - dev_dbg(dev->dev, "vss is %d ", mode->vsync_start); - dev_dbg(dev->dev, "vse is %d ", mode->vsync_end); - dev_dbg(dev->dev, "vtotal is %d ", mode->vtotal); - dev_dbg(dev->dev, "clock is %d ", mode->clock); - } else { - mode->hdisplay = 480; - mode->vdisplay = 854; - mode->hsync_start = 487; - mode->hsync_end = 490; - mode->htotal = 499; - mode->vsync_start = 861; - mode->vsync_end = 865; - mode->vtotal = 873; - mode->clock = 33264; - } - - drm_mode_set_name(mode); - drm_mode_set_crtcinfo(mode, 0); - - mode->type |= drm_mode_type_preferred; - - return mode; -} - -static int tmd_vid_get_panel_info(struct drm_device *dev, - int pipe, - struct panel_info *pi) -{ - if (!dev || !pi) - return -einval; - - pi->width_mm = tmd_panel_width; - pi->height_mm = tmd_panel_height; - - return 0; -} - -/* ************************************************************************* *\ - * function: mdfld_init_tmd_mipi - * - * description: this function is called only by mrst_dsi_mode_set and - * restore_display_registers. since this function does not - * acquire the mutex, it is important that the calling function - * does! -\* ************************************************************************* */ - -/* fixme: make the below data u8 instead of u32; note byte order! */ -static u32 tmd_cmd_mcap_off[] = {0x000000b2}; -static u32 tmd_cmd_enable_lane_switch[] = {0x000101ef}; -static u32 tmd_cmd_set_lane_num[] = {0x006360ef}; -static u32 tmd_cmd_pushing_clock0[] = {0x00cc2fef}; -static u32 tmd_cmd_pushing_clock1[] = {0x00dd6eef}; -static u32 tmd_cmd_set_mode[] = {0x000000b3}; -static u32 tmd_cmd_set_sync_pulse_mode[] = {0x000961ef}; -static u32 tmd_cmd_set_column[] = {0x0100002a, 0x000000df}; -static u32 tmd_cmd_set_page[] = {0x0300002b, 0x00000055}; -static u32 tmd_cmd_set_video_mode[] = {0x00000153}; -/*no auto_bl,need add in furture*/ -static u32 tmd_cmd_enable_backlight[] = {0x00005ab4}; -static u32 tmd_cmd_set_backlight_dimming[] = {0x00000ebd}; - -static void mdfld_dsi_tmd_drv_ic_init(struct mdfld_dsi_config *dsi_config, - int pipe) -{ - struct mdfld_dsi_pkg_sender *sender - = mdfld_dsi_get_pkg_sender(dsi_config); - - drm_info("enter mdfld init tmd mipi display. "); - - if (!sender) { - drm_error("cannot get sender "); - return; - } - - if (dsi_config->dvr_ic_inited) - return; - - msleep(3); - - /* fixme: make the below data u8 instead of u32; note byte order! */ - - mdfld_dsi_send_gen_long(sender, (u8 *) tmd_cmd_mcap_off, - sizeof(tmd_cmd_mcap_off), false); - mdfld_dsi_send_gen_long(sender, (u8 *) tmd_cmd_enable_lane_switch, - sizeof(tmd_cmd_enable_lane_switch), false); - mdfld_dsi_send_gen_long(sender, (u8 *) tmd_cmd_set_lane_num, - sizeof(tmd_cmd_set_lane_num), false); - mdfld_dsi_send_gen_long(sender, (u8 *) tmd_cmd_pushing_clock0, - sizeof(tmd_cmd_pushing_clock0), false); - mdfld_dsi_send_gen_long(sender, (u8 *) tmd_cmd_pushing_clock1, - sizeof(tmd_cmd_pushing_clock1), false); - mdfld_dsi_send_gen_long(sender, (u8 *) tmd_cmd_set_mode, - sizeof(tmd_cmd_set_mode), false); - mdfld_dsi_send_gen_long(sender, (u8 *) tmd_cmd_set_sync_pulse_mode, - sizeof(tmd_cmd_set_sync_pulse_mode), false); - mdfld_dsi_send_mcs_long(sender, (u8 *) tmd_cmd_set_column, - sizeof(tmd_cmd_set_column), false); - mdfld_dsi_send_mcs_long(sender, (u8 *) tmd_cmd_set_page, - sizeof(tmd_cmd_set_page), false); - mdfld_dsi_send_gen_long(sender, (u8 *) tmd_cmd_set_video_mode, - sizeof(tmd_cmd_set_video_mode), false); - mdfld_dsi_send_gen_long(sender, (u8 *) tmd_cmd_enable_backlight, - sizeof(tmd_cmd_enable_backlight), false); - mdfld_dsi_send_gen_long(sender, (u8 *) tmd_cmd_set_backlight_dimming, - sizeof(tmd_cmd_set_backlight_dimming), false); - - dsi_config->dvr_ic_inited = 1; -} - -/*tpo dpi encoder helper funcs*/ -static const struct drm_encoder_helper_funcs - mdfld_tpo_dpi_encoder_helper_funcs = { - .dpms = mdfld_dsi_dpi_dpms, - .mode_fixup = mdfld_dsi_dpi_mode_fixup, - .prepare = mdfld_dsi_dpi_prepare, - .mode_set = mdfld_dsi_dpi_mode_set, - .commit = mdfld_dsi_dpi_commit, -}; - -const struct panel_funcs mdfld_tmd_vid_funcs = { - .encoder_helper_funcs = &mdfld_tpo_dpi_encoder_helper_funcs, - .get_config_mode = &tmd_vid_get_config_mode, - .get_panel_info = tmd_vid_get_panel_info, - .reset = mdfld_dsi_panel_reset, - .drv_ic_init = mdfld_dsi_tmd_drv_ic_init, -}; diff --git a/drivers/gpu/drm/gma500/mdfld_tpo_vid.c b/drivers/gpu/drm/gma500/mdfld_tpo_vid.c --- a/drivers/gpu/drm/gma500/mdfld_tpo_vid.c +++ /dev/null -/* - * copyright ©️ 2010 intel corporation - * - * permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "software"), - * to deal in the software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the software, and to permit persons to whom the - * software is furnished to do so, subject to the following conditions: - * - * the above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * software. - * - * the software is provided "as is", without warranty of any kind, express or - * implied, including but not limited to the warranties of merchantability, - * fitness for a particular purpose and noninfringement. in no event shall - * the authors or copyright holders be liable for any claim, damages or other - * liability, whether in an action of contract, tort or otherwise, arising - * from, out of or in connection with the software or the use or other - * dealings in the software. - * - * authors: - * jim liu <jim.liu@intel.com> - * jackie li<yaodong.li@intel.com> - */ - -#include "mdfld_dsi_dpi.h" - -static struct drm_display_mode *tpo_vid_get_config_mode(struct drm_device *dev) -{ - struct drm_display_mode *mode; - - mode = kzalloc(sizeof(*mode), gfp_kernel); - if (!mode) - return null; - - mode->hdisplay = 864; - mode->vdisplay = 480; - mode->hsync_start = 873; - mode->hsync_end = 876; - mode->htotal = 887; - mode->vsync_start = 487; - mode->vsync_end = 490; - mode->vtotal = 499; - mode->clock = 33264; - - drm_mode_set_name(mode); - drm_mode_set_crtcinfo(mode, 0); - - mode->type |= drm_mode_type_preferred; - - return mode; -} - -static int tpo_vid_get_panel_info(struct drm_device *dev, - int pipe, - struct panel_info *pi) -{ - if (!dev || !pi) - return -einval; - - pi->width_mm = tpo_panel_width; - pi->height_mm = tpo_panel_height; - - return 0; -} - -/*tpo dpi encoder helper funcs*/ -static const struct drm_encoder_helper_funcs - mdfld_tpo_dpi_encoder_helper_funcs = { - .dpms = mdfld_dsi_dpi_dpms, - .mode_fixup = mdfld_dsi_dpi_mode_fixup, - .prepare = mdfld_dsi_dpi_prepare, - .mode_set = mdfld_dsi_dpi_mode_set, - .commit = mdfld_dsi_dpi_commit, -}; - -const struct panel_funcs mdfld_tpo_vid_funcs = { - .encoder_helper_funcs = &mdfld_tpo_dpi_encoder_helper_funcs, - .get_config_mode = &tpo_vid_get_config_mode, - .get_panel_info = tpo_vid_get_panel_info, -}; diff --git a/drivers/gpu/drm/gma500/psb_drv.c b/drivers/gpu/drm/gma500/psb_drv.c --- a/drivers/gpu/drm/gma500/psb_drv.c +++ b/drivers/gpu/drm/gma500/psb_drv.c - * powervr sgx540 - medfield - intel atom z2460 - * powervr sgx544mp2 - medfield - -#if defined(config_drm_medfield) - { 0x8086, 0x0130, pci_any_id, pci_any_id, 0, 0, (long) &mdfld_chip_ops }, - { 0x8086, 0x0131, pci_any_id, pci_any_id, 0, 0, (long) &mdfld_chip_ops }, - { 0x8086, 0x0132, pci_any_id, pci_any_id, 0, 0, (long) &mdfld_chip_ops }, - { 0x8086, 0x0133, pci_any_id, pci_any_id, 0, 0, (long) &mdfld_chip_ops }, - { 0x8086, 0x0134, pci_any_id, pci_any_id, 0, 0, (long) &mdfld_chip_ops }, - { 0x8086, 0x0135, pci_any_id, pci_any_id, 0, 0, (long) &mdfld_chip_ops }, - { 0x8086, 0x0136, pci_any_id, pci_any_id, 0, 0, (long) &mdfld_chip_ops }, - { 0x8086, 0x0137, pci_any_id, pci_any_id, 0, 0, (long) &mdfld_chip_ops }, -#endif diff --git a/drivers/gpu/drm/gma500/psb_drv.h b/drivers/gpu/drm/gma500/psb_drv.h --- a/drivers/gpu/drm/gma500/psb_drv.h +++ b/drivers/gpu/drm/gma500/psb_drv.h - chip_mfld_0130 = 3, /* medfield */ -#define is_mfld(drm) ((to_pci_dev((drm)->dev)->device & 0xfff8) == 0x0130) -#define mdfld_mmio_size 0x000100000 -#define _mdfld_mipia_flag (1<<16) -#define _mdfld_mipic_flag (1<<17) -/* this flag includes all the display irq bits excepts the vblank irqs. */ -#define _mdfld_disp_all_irq_flag (_mdfld_pipec_event_flag | \ - _mdfld_pipeb_event_flag | \ - _psb_pipea_event_flag | \ - _psb_vsync_pipea_flag | \ - _mdfld_mipia_flag | \ - _mdfld_mipic_flag) -#define mdfld_pnw_b0 0x04 -#define mdfld_pnw_c0 0x08 - -#define mdfld_dsr_2d_3d_0 (1 << 0) -#define mdfld_dsr_2d_3d_2 (1 << 1) -#define mdfld_dsr_cursor_0 (1 << 2) -#define mdfld_dsr_cursor_2 (1 << 3) -#define mdfld_dsr_overlay_0 (1 << 4) -#define mdfld_dsr_overlay_2 (1 << 5) -#define mdfld_dsr_mipi_control (1 << 6) -#define mdfld_dsr_damage_mask_0 ((1 << 0) | (1 << 2) | (1 << 4)) -#define mdfld_dsr_damage_mask_2 ((1 << 1) | (1 << 3) | (1 << 5)) -#define mdfld_dsr_2d_3d (mdfld_dsr_2d_3d_0 | mdfld_dsr_2d_3d_2) - -#define mdfld_dsr_rr 45 -#define mdfld_dpu_enable (1 << 31) -#define mdfld_dsr_fullscreen (1 << 30) -#define mdfld_dsr_delay (hz / mdfld_dsr_rr) - -struct medfield_state { - uint32_t savemipi; - uint32_t savemipi_c; - - uint32_t savepfit_control; - uint32_t savepfit_pgm_ratios; - uint32_t savehdmiphymiscctl; - uint32_t savehdmib_control; -}; - - struct medfield_state mdfld; - int mdfld_panel_id; - -/* mdlfd_device.c */ -extern const struct psb_ops mdfld_chip_ops; - -static inline u32 mdfld_msg_read32(int domain, uint port, uint offset) -{ - int mcr = (0x10<<24) | (port << 16) | (offset << 8); - uint32_t ret_val = 0; - struct pci_dev *pci_root = pci_get_domain_bus_and_slot(domain, 0, 0); - pci_write_config_dword(pci_root, 0xd0, mcr); - pci_read_config_dword(pci_root, 0xd4, &ret_val); - pci_dev_put(pci_root); - return ret_val; -} -static inline void mdfld_msg_write32(int domain, uint port, uint offset, - u32 value) -{ - int mcr = (0x11<<24) | (port << 16) | (offset << 8) | 0xf0; - struct pci_dev *pci_root = pci_get_domain_bus_and_slot(domain, 0, 0); - pci_write_config_dword(pci_root, 0xd4, value); - pci_write_config_dword(pci_root, 0xd0, mcr); - pci_dev_put(pci_root); -} diff --git a/drivers/gpu/drm/gma500/psb_intel_reg.h b/drivers/gpu/drm/gma500/psb_intel_reg.h --- a/drivers/gpu/drm/gma500/psb_intel_reg.h +++ b/drivers/gpu/drm/gma500/psb_intel_reg.h -#define fw_blc_self 0x20e0 +#define fw_blc_self 0x20e0 -#define mdfld_dpll_b 0x0f018 -#define mdfld_input_ref_sel (1 << 14) -#define mdfld_vco_sel (1 << 16) -#define mdfld_pll_latchen (1 << 28) -#define mdfld_pwr_gate_en (1 << 30) -#define mdfld_p1_mask (0x1ff << 17) -#define mdfld_dpll_div0 0x0f048 -#define mdfld_dpll_div1 0x0f04c -#define mdfld_dspcbase 0x7219c -#define dbi_resolution_reg 0xb024 /* reserved for mdfld */ diff --git a/drivers/gpu/drm/gma500/psb_irq.c b/drivers/gpu/drm/gma500/psb_irq.c --- a/drivers/gpu/drm/gma500/psb_irq.c +++ b/drivers/gpu/drm/gma500/psb_irq.c -#include "mdfld_output.h" - if (pipe_stat_val & pipe_vblank_status || - (is_mfld(dev) && pipe_stat_val & pipe_te_status)) { + if (pipe_stat_val & pipe_vblank_status) { - /* fixme: handle medfield - if (vdc_stat & _mdfld_disp_all_irq_flag) - dsp_int = 1; - */ - - /* fixme: handle medfield irq mask - if (dev->vblank[1].enabled) - dev_priv->vdc_irq_mask |= _mdfld_pipeb_event_flag; - if (dev->vblank[2].enabled) - dev_priv->vdc_irq_mask |= _mdfld_pipec_event_flag; - */ - - /* medfield is different - we should perhaps extract out vblank - and blacklight etc ops */ - if (is_mfld(dev)) - return mdfld_enable_te(dev, pipe); - - if (is_mfld(dev)) - mdfld_disable_te(dev, pipe); -/* - * it is used to enable te interrupt - */ -int mdfld_enable_te(struct drm_device *dev, int pipe) -{ - struct drm_psb_private *dev_priv = - (struct drm_psb_private *) dev->dev_private; - unsigned long irqflags; - uint32_t reg_val = 0; - uint32_t pipeconf_reg = mid_pipeconf(pipe); - - if (gma_power_begin(dev, false)) { - reg_val = reg_read(pipeconf_reg); - gma_power_end(dev); - } - - if (!(reg_val & pipeaconf_enable)) - return -einval; - - spin_lock_irqsave(&dev_priv->irqmask_lock, irqflags); - - mid_enable_pipe_event(dev_priv, pipe); - psb_enable_pipestat(dev_priv, pipe, pipe_te_enable); - - spin_unlock_irqrestore(&dev_priv->irqmask_lock, irqflags); - - return 0; -} - -/* - * it is used to disable te interrupt - */ -void mdfld_disable_te(struct drm_device *dev, int pipe) -{ - struct drm_psb_private *dev_priv = - (struct drm_psb_private *) dev->dev_private; - unsigned long irqflags; - - if (!dev_priv->dsr_enable) - return; - - spin_lock_irqsave(&dev_priv->irqmask_lock, irqflags); - - mid_disable_pipe_event(dev_priv, pipe); - psb_disable_pipestat(dev_priv, pipe, pipe_te_enable); - - spin_unlock_irqrestore(&dev_priv->irqmask_lock, irqflags); -} - diff --git a/drivers/gpu/drm/gma500/psb_irq.h b/drivers/gpu/drm/gma500/psb_irq.h --- a/drivers/gpu/drm/gma500/psb_irq.h +++ b/drivers/gpu/drm/gma500/psb_irq.h -int mdfld_enable_te(struct drm_device *dev, int pipe); -void mdfld_disable_te(struct drm_device *dev, int pipe); diff --git a/drivers/gpu/drm/gma500/psb_reg.h b/drivers/gpu/drm/gma500/psb_reg.h --- a/drivers/gpu/drm/gma500/psb_reg.h +++ b/drivers/gpu/drm/gma500/psb_reg.h -#define mdfld_pwrgt_display_a_cntr 0x0000000c -#define mdfld_pwrgt_display_b_cntr 0x0000c000 -#define mdfld_pwrgt_display_c_cntr 0x00030000 -#define mdfld_pwrgt_disp_mipi_cntr 0x000c0000 -#define mdfld_pwrgt_display_cntr (mdfld_pwrgt_display_a_cntr | mdfld_pwrgt_display_b_cntr | mdfld_pwrgt_display_c_cntr | mdfld_pwrgt_disp_mipi_cntr) /* 0x000fc00c */ -#define mdfld_pwrgt_display_a_sts 0x000000c0 -#define mdfld_pwrgt_display_b_sts 0x00000300 -#define mdfld_pwrgt_display_c_sts 0x00000c00 -#define mdfld_pwrgt_display_a_sts_b0 0x0000000c -#define mdfld_pwrgt_display_b_sts_b0 0x0000c000 -#define mdfld_pwrgt_display_c_sts_b0 0x00030000 -#define mdfld_pwrgt_disp_mipi_sts 0x000c0000 -#define mdfld_pwrgt_display_sts_a0 (mdfld_pwrgt_display_a_sts | mdfld_pwrgt_display_b_sts | mdfld_pwrgt_display_c_sts | mdfld_pwrgt_disp_mipi_sts) /* 0x000fc00c */ -#define mdfld_pwrgt_display_sts_b0 (mdfld_pwrgt_display_a_sts_b0 | mdfld_pwrgt_display_b_sts_b0 | mdfld_pwrgt_display_c_sts_b0 | mdfld_pwrgt_disp_mipi_sts) /* 0x000fc00c */ diff --git a/drivers/gpu/drm/gma500/tc35876x-dsi-lvds.c b/drivers/gpu/drm/gma500/tc35876x-dsi-lvds.c --- a/drivers/gpu/drm/gma500/tc35876x-dsi-lvds.c +++ /dev/null -/* - * copyright ©️ 2011 intel corporation - * - * permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "software"), - * to deal in the software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the software, and to permit persons to whom the - * software is furnished to do so, subject to the following conditions: - * - * the above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * software. - * - * the software is provided "as is", without warranty of any kind, express or - * implied, including but not limited to the warranties of merchantability, - * fitness for a particular purpose and noninfringement. in no event shall - * the authors or copyright holders be liable for any claim, damages or other - * liability, whether in an action of contract, tort or otherwise, arising - * from, out of or in connection with the software or the use or other - * dealings in the software. - * - */ - -#include <linux/delay.h> -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/gpio/consumer.h> - -#include <asm/intel_scu_ipc.h> - -#include "mdfld_dsi_dpi.h" -#include "mdfld_dsi_pkg_sender.h" -#include "mdfld_output.h" -#include "tc35876x-dsi-lvds.h" - -static struct i2c_client *tc35876x_client; -static struct i2c_client *cmi_lcd_i2c_client; -/* panel gpios */ -static struct gpio_desc *bridge_reset; -static struct gpio_desc *bridge_bl_enable; -static struct gpio_desc *backlight_voltage; - - -#define fld_mask(start, end) (((1 << ((start) - (end) + 1)) - 1) << (end)) -#define fld_val(val, start, end) (((val) << (end)) & fld_mask(start, end)) - -/* dsi d-phy layer registers */ -#define d0w_dphyconttx 0x0004 -#define clw_dphycontrx 0x0020 -#define d0w_dphycontrx 0x0024 -#define d1w_dphycontrx 0x0028 -#define d2w_dphycontrx 0x002c -#define d3w_dphycontrx 0x0030 -#define com_dphycontrx 0x0038 -#define clw_cntrl 0x0040 -#define d0w_cntrl 0x0044 -#define d1w_cntrl 0x0048 -#define d2w_cntrl 0x004c -#define d3w_cntrl 0x0050 -#define dftmode_cntrl 0x0054 - -/* dsi ppi layer registers */ -#define ppi_startppi 0x0104 -#define ppi_busyppi 0x0108 -#define ppi_lineinitcnt 0x0110 -#define ppi_lptxtimecnt 0x0114 -#define ppi_laneenable 0x0134 -#define ppi_tx_rx_ta 0x013c -#define ppi_cls_atmr 0x0140 -#define ppi_d0s_atmr 0x0144 -#define ppi_d1s_atmr 0x0148 -#define ppi_d2s_atmr 0x014c -#define ppi_d3s_atmr 0x0150 -#define ppi_d0s_clrsipocount 0x0164 -#define ppi_d1s_clrsipocount 0x0168 -#define ppi_d2s_clrsipocount 0x016c -#define ppi_d3s_clrsipocount 0x0170 -#define cls_pre 0x0180 -#define d0s_pre 0x0184 -#define d1s_pre 0x0188 -#define d2s_pre 0x018c -#define d3s_pre 0x0190 -#define cls_prep 0x01a0 -#define d0s_prep 0x01a4 -#define d1s_prep 0x01a8 -#define d2s_prep 0x01ac -#define d3s_prep 0x01b0 -#define cls_zero 0x01c0 -#define d0s_zero 0x01c4 -#define d1s_zero 0x01c8 -#define d2s_zero 0x01cc -#define d3s_zero 0x01d0 -#define ppi_clrflg 0x01e0 -#define ppi_clrsipo 0x01e4 -#define hstimeout 0x01f0 -#define hstimeoutenable 0x01f4 - -/* dsi protocol layer registers */ -#define dsi_startdsi 0x0204 -#define dsi_busydsi 0x0208 -#define dsi_laneenable 0x0210 -#define dsi_lanestatus0 0x0214 -#define dsi_lanestatus1 0x0218 -#define dsi_intstatus 0x0220 -#define dsi_intmask 0x0224 -#define dsi_intclr 0x0228 -#define dsi_lptxto 0x0230 - -/* dsi general registers */ -#define dsierrcnt 0x0300 - -/* dsi application layer registers */ -#define aplctrl 0x0400 -#define rdpktln 0x0404 - -/* video path registers */ -#define vpctrl 0x0450 -#define htim1 0x0454 -#define htim2 0x0458 -#define vtim1 0x045c -#define vtim2 0x0460 -#define vfuen 0x0464 - -/* lvds registers */ -#define lvmx0003 0x0480 -#define lvmx0407 0x0484 -#define lvmx0811 0x0488 -#define lvmx1215 0x048c -#define lvmx1619 0x0490 -#define lvmx2023 0x0494 -#define lvmx2427 0x0498 -#define lvcfg 0x049c -#define lvphy0 0x04a0 -#define lvphy1 0x04a4 - -/* system registers */ -#define sysstat 0x0500 -#define sysrst 0x0504 - -/* gpio registers */ -/*#define gpioc 0x0520*/ -#define gpioo 0x0524 -#define gpioi 0x0528 - -/* i2c registers */ -#define i2ctimctrl 0x0540 -#define i2cmaddr 0x0544 -#define wdataq 0x0548 -#define rdataq 0x054c - -/* chip/rev registers */ -#define idreg 0x0580 - -/* debug registers */ -#define debug00 0x05a0 -#define debug01 0x05a4 - -/* panel cabc registers */ -#define panel_pwm_control 0x90 -#define panel_freq_divider_hi 0x91 -#define panel_freq_divider_lo 0x92 -#define panel_duty_control 0x93 -#define panel_modify_rgb 0x94 -#define panel_framerate_control 0x96 -#define panel_pwm_min 0x97 -#define panel_pwm_ref 0x98 -#define panel_pwm_max 0x99 -#define panel_allow_distort 0x9a -#define panel_bypass_pwmi 0x9b - -/* panel color management registers */ -#define panel_cm_enable 0x700 -#define panel_cm_hue 0x701 -#define panel_cm_saturation 0x702 -#define panel_cm_intensity 0x703 -#define panel_cm_brightness 0x704 -#define panel_cm_ce_enable 0x705 -#define panel_cm_peak_en 0x710 -#define panel_cm_gain 0x711 -#define panel_cm_huetable_start 0x730 -#define panel_cm_huetable_end 0x747 /* inclusive */ - -/* input muxing for registers lvmx0003...lvmx2427 */ -enum { - input_r0, /* 0 */ - input_r1, - input_r2, - input_r3, - input_r4, - input_r5, - input_r6, - input_r7, - input_g0, /* 8 */ - input_g1, - input_g2, - input_g3, - input_g4, - input_g5, - input_g6, - input_g7, - input_b0, /* 16 */ - input_b1, - input_b2, - input_b3, - input_b4, - input_b5, - input_b6, - input_b7, - input_hsync, /* 24 */ - input_vsync, - input_de, - logic_0, - /* 28...31 undefined */ -}; - -#define input_mux(lvmx03, lvmx02, lvmx01, lvmx00) \ - (fld_val(lvmx03, 29, 24) | fld_val(lvmx02, 20, 16) | \ - fld_val(lvmx01, 12, 8) | fld_val(lvmx00, 4, 0)) - -/** - * tc35876x_regw - write dsi-lvds bridge register using i2c - * @client: struct i2c_client to use - * @reg: register address - * @value: value to write - * - * returns 0 on success, or a negative error value. - */ -static int tc35876x_regw(struct i2c_client *client, u16 reg, u32 value) -{ - int r; - u8 tx_data[] = { - /* note: register address big-endian, data little-endian. */ - (reg >> 8) & 0xff, - reg & 0xff, - value & 0xff, - (value >> 8) & 0xff, - (value >> 16) & 0xff, - (value >> 24) & 0xff, - }; - struct i2c_msg msgs[] = { - { - .addr = client->addr, - .flags = 0, - .buf = tx_data, - .len = array_size(tx_data), - }, - }; - - r = i2c_transfer(client->adapter, msgs, array_size(msgs)); - if (r < 0) { - dev_err(&client->dev, "%s: reg 0x%04x val 0x%08x error %d ", - __func__, reg, value, r); - return r; - } - - if (r < array_size(msgs)) { - dev_err(&client->dev, "%s: reg 0x%04x val 0x%08x msgs %d ", - __func__, reg, value, r); - return -eagain; - } - - dev_dbg(&client->dev, "%s: reg 0x%04x val 0x%08x ", - __func__, reg, value); - - return 0; -} - -/** - * tc35876x_regr - read dsi-lvds bridge register using i2c - * @client: struct i2c_client to use - * @reg: register address - * @value: pointer for storing the value - * - * returns 0 on success, or a negative error value. - */ -static int tc35876x_regr(struct i2c_client *client, u16 reg, u32 *value) -{ - int r; - u8 tx_data[] = { - (reg >> 8) & 0xff, - reg & 0xff, - }; - u8 rx_data[4]; - struct i2c_msg msgs[] = { - { - .addr = client->addr, - .flags = 0, - .buf = tx_data, - .len = array_size(tx_data), - }, - { - .addr = client->addr, - .flags = i2c_m_rd, - .buf = rx_data, - .len = array_size(rx_data), - }, - }; - - r = i2c_transfer(client->adapter, msgs, array_size(msgs)); - if (r < 0) { - dev_err(&client->dev, "%s: reg 0x%04x error %d ", __func__, - reg, r); - return r; - } - - if (r < array_size(msgs)) { - dev_err(&client->dev, "%s: reg 0x%04x msgs %d ", __func__, - reg, r); - return -eagain; - } - - *value = rx_data[0] << 24 | rx_data[1] << 16 | - rx_data[2] << 8 | rx_data[3]; - - dev_dbg(&client->dev, "%s: reg 0x%04x value 0x%08x ", __func__, - reg, *value); - - return 0; -} - -void tc35876x_set_bridge_reset_state(struct drm_device *dev, int state) -{ - if (warn(!tc35876x_client, "%s called before probe", __func__)) - return; - - dev_dbg(&tc35876x_client->dev, "%s: state %d ", __func__, state); - - if (!bridge_reset) - return; - - if (state) { - gpiod_set_value_cansleep(bridge_reset, 0); - mdelay(10); - } else { - /* pull mipi bridge reset pin to low */ - gpiod_set_value_cansleep(bridge_reset, 0); - mdelay(20); - /* pull mipi bridge reset pin to high */ - gpiod_set_value_cansleep(bridge_reset, 1); - mdelay(40); - } -} - -void tc35876x_configure_lvds_bridge(struct drm_device *dev) -{ - struct i2c_client *i2c = tc35876x_client; - u32 ppi_lptxtimecnt; - u32 txtagocnt; - u32 txtasurecnt; - u32 id; - - if (warn(!tc35876x_client, "%s called before probe", __func__)) - return; - - dev_dbg(&tc35876x_client->dev, "%s ", __func__); - - if (!tc35876x_regr(i2c, idreg, &id)) - dev_info(&tc35876x_client->dev, "tc35876x id 0x%08x ", id); - else - dev_err(&tc35876x_client->dev, "cannot read id "); - - ppi_lptxtimecnt = 4; - txtagocnt = (5 * ppi_lptxtimecnt - 3) / 4; - txtasurecnt = 3 * ppi_lptxtimecnt / 2; - tc35876x_regw(i2c, ppi_tx_rx_ta, fld_val(txtagocnt, 26, 16) | - fld_val(txtasurecnt, 10, 0)); - tc35876x_regw(i2c, ppi_lptxtimecnt, fld_val(ppi_lptxtimecnt, 10, 0)); - - tc35876x_regw(i2c, ppi_d0s_clrsipocount, fld_val(1, 5, 0)); - tc35876x_regw(i2c, ppi_d1s_clrsipocount, fld_val(1, 5, 0)); - tc35876x_regw(i2c, ppi_d2s_clrsipocount, fld_val(1, 5, 0)); - tc35876x_regw(i2c, ppi_d3s_clrsipocount, fld_val(1, 5, 0)); - - /* enabling mipi & ppi lanes, enable 4 lanes */ - tc35876x_regw(i2c, ppi_laneenable, - bit(4) | bit(3) | bit(2) | bit(1) | bit(0)); - tc35876x_regw(i2c, dsi_laneenable, - bit(4) | bit(3) | bit(2) | bit(1) | bit(0)); - tc35876x_regw(i2c, ppi_startppi, bit(0)); - tc35876x_regw(i2c, dsi_startdsi, bit(0)); - - /* setting lvds output frequency */ - tc35876x_regw(i2c, lvphy0, fld_val(1, 20, 16) | - fld_val(2, 15, 14) | fld_val(6, 4, 0)); /* 0x00048006 */ - - /* setting video panel control register,0x00000120 vtgen=on ?!?!? */ - tc35876x_regw(i2c, vpctrl, bit(8) | bit(5)); - - /* horizontal back porch and horizontal pulse width. 0x00280028 */ - tc35876x_regw(i2c, htim1, fld_val(40, 24, 16) | fld_val(40, 8, 0)); - - /* horizontal front porch and horizontal active video size. 0x00500500*/ - tc35876x_regw(i2c, htim2, fld_val(80, 24, 16) | fld_val(1280, 10, 0)); - - /* vertical back porch and vertical sync pulse width. 0x000e000a */ - tc35876x_regw(i2c, vtim1, fld_val(14, 23, 16) | fld_val(10, 7, 0)); - - /* vertical front porch and vertical display size. 0x000e0320 */ - tc35876x_regw(i2c, vtim2, fld_val(14, 23, 16) | fld_val(800, 10, 0)); - - /* set above htim1, htim2, vtim1, and vtim2 at next vsync. */ - tc35876x_regw(i2c, vfuen, bit(0)); - - /* soft reset lcd controller. */ - tc35876x_regw(i2c, sysrst, bit(2)); - - /* lvds-tx input muxing */ - tc35876x_regw(i2c, lvmx0003, - input_mux(input_r5, input_r4, input_r3, input_r2)); - tc35876x_regw(i2c, lvmx0407, - input_mux(input_g2, input_r7, input_r1, input_r6)); - tc35876x_regw(i2c, lvmx0811, - input_mux(input_g1, input_g0, input_g4, input_g3)); - tc35876x_regw(i2c, lvmx1215, - input_mux(input_b2, input_g7, input_g6, input_g5)); - tc35876x_regw(i2c, lvmx1619, - input_mux(input_b4, input_b3, input_b1, input_b0)); - tc35876x_regw(i2c, lvmx2023, - input_mux(logic_0, input_b7, input_b6, input_b5)); - tc35876x_regw(i2c, lvmx2427, - input_mux(input_r0, input_de, input_vsync, input_hsync)); - - /* enable lvds transmitter. */ - tc35876x_regw(i2c, lvcfg, bit(0)); - - /* clear notifications. don't write reserved bits. was write 0xffffffff - * to 0x0288, must be in error?! */ - tc35876x_regw(i2c, dsi_intclr, fld_mask(31, 30) | fld_mask(22, 0)); -} - -#define gpiopwmctrl 0x38f -#define pwm0clkdiv0 0x62 /* low byte */ -#define pwm0clkdiv1 0x61 /* high byte */ - -#define systemclk 19200000ul /* 19.2 mhz */ -#define pwm_frequency 9600 /* hz */ - -/* f = baseclk / (clkdiv + 1) => clkdiv = (baseclk - f) / f */ -static inline u16 calc_clkdiv(unsigned long baseclk, unsigned int f) -{ - return (baseclk - f) / f; -} - -static void tc35876x_brightness_init(struct drm_device *dev) -{ - int ret; - u8 pwmctrl; - u16 clkdiv; - - /* make sure the pwm reference is the 19.2 mhz system clock. read first - * instead of setting directly to catch potential conflicts between pwm - * users. */ - ret = intel_scu_ipc_ioread8(gpiopwmctrl, &pwmctrl); - if (ret || pwmctrl != 0x01) { - if (ret) - dev_err(dev->dev, "gpiopwmctrl read failed "); - else - dev_warn(dev->dev, "gpiopwmctrl was not set to system clock (pwmctrl = 0x%02x) ", pwmctrl); - - ret = intel_scu_ipc_iowrite8(gpiopwmctrl, 0x01); - if (ret) - dev_err(dev->dev, "gpiopwmctrl set failed "); - } - - clkdiv = calc_clkdiv(systemclk, pwm_frequency); - - ret = intel_scu_ipc_iowrite8(pwm0clkdiv1, (clkdiv >> 8) & 0xff); - if (!ret) - ret = intel_scu_ipc_iowrite8(pwm0clkdiv0, clkdiv & 0xff); - - if (ret) - dev_err(dev->dev, "pwm0clkdiv set failed "); - else - dev_dbg(dev->dev, "pwm0clkdiv set to 0x%04x (%d hz) ", - clkdiv, pwm_frequency); -} - -#define pwm0dutycycle 0x67 - -void tc35876x_brightness_control(struct drm_device *dev, int level) -{ - int ret; - u8 duty_val; - u8 panel_duty_val; - - level = clamp(level, 0, mdfld_dsi_brightness_max_level); - - /* pwm duty cycle 0x00...0x63 corresponds to 0...99% */ - duty_val = level * 0x63 / mdfld_dsi_brightness_max_level; - - /* i won't pretend to understand this formula. the panel spec is quite - * bad engrish. - */ - panel_duty_val = (2 * level - 100) * 0xa9 / - mdfld_dsi_brightness_max_level + 0x56; - - ret = intel_scu_ipc_iowrite8(pwm0dutycycle, duty_val); - if (ret) - dev_err(&tc35876x_client->dev, "%s: ipc write fail ", - __func__); - - if (cmi_lcd_i2c_client) { - ret = i2c_smbus_write_byte_data(cmi_lcd_i2c_client, - panel_pwm_max, panel_duty_val); - if (ret < 0) - dev_err(&cmi_lcd_i2c_client->dev, "%s: i2c write failed ", - __func__); - } -} - -void tc35876x_toshiba_bridge_panel_off(struct drm_device *dev) -{ - if (warn(!tc35876x_client, "%s called before probe", __func__)) - return; - - dev_dbg(&tc35876x_client->dev, "%s ", __func__); - - if (bridge_bl_enable) - gpiod_set_value_cansleep(bridge_bl_enable, 0); - - if (backlight_voltage) - gpiod_set_value_cansleep(backlight_voltage, 0); -} - -void tc35876x_toshiba_bridge_panel_on(struct drm_device *dev) -{ - struct drm_psb_private *dev_priv = dev->dev_private; - - if (warn(!tc35876x_client, "%s called before probe", __func__)) - return; - - dev_dbg(&tc35876x_client->dev, "%s ", __func__); - - if (backlight_voltage) { - gpiod_set_value_cansleep(backlight_voltage, 1); - msleep(260); - } - - if (cmi_lcd_i2c_client) { - int ret; - dev_dbg(&cmi_lcd_i2c_client->dev, "setting tcon "); - /* bit 4 is average_saving. setting it to 1, the brightness is - * referenced to the average of the frame content. 0 means - * reference to the maximum of frame contents. bits 3:0 are - * allow_distort. when set to a nonzero value, all color values - * between 255-allow_distort*2 and 255 are mapped to the - * 255-allow_distort*2 value. - */ - ret = i2c_smbus_write_byte_data(cmi_lcd_i2c_client, - panel_allow_distort, 0x10); - if (ret < 0) - dev_err(&cmi_lcd_i2c_client->dev, - "i2c write failed (%d) ", ret); - ret = i2c_smbus_write_byte_data(cmi_lcd_i2c_client, - panel_bypass_pwmi, 0); - if (ret < 0) - dev_err(&cmi_lcd_i2c_client->dev, - "i2c write failed (%d) ", ret); - /* set minimum brightness value - this is tunable */ - ret = i2c_smbus_write_byte_data(cmi_lcd_i2c_client, - panel_pwm_min, 0x35); - if (ret < 0) - dev_err(&cmi_lcd_i2c_client->dev, - "i2c write failed (%d) ", ret); - } - - if (bridge_bl_enable) - gpiod_set_value_cansleep(bridge_bl_enable, 1); - - tc35876x_brightness_control(dev, dev_priv->brightness_adjusted); -} - -static struct drm_display_mode *tc35876x_get_config_mode(struct drm_device *dev) -{ - struct drm_display_mode *mode; - - dev_dbg(dev->dev, "%s ", __func__); - - mode = kzalloc(sizeof(*mode), gfp_kernel); - if (!mode) - return null; - - /* fixme: do this properly. */ - mode->hdisplay = 1280; - mode->vdisplay = 800; - mode->hsync_start = 1360; - mode->hsync_end = 1400; - mode->htotal = 1440; - mode->vsync_start = 814; - mode->vsync_end = 824; - mode->vtotal = 838; - mode->clock = 33324 << 1; - - dev_info(dev->dev, "hdisplay(w) = %d ", mode->hdisplay); - dev_info(dev->dev, "vdisplay(h) = %d ", mode->vdisplay); - dev_info(dev->dev, "hss = %d ", mode->hsync_start); - dev_info(dev->dev, "hse = %d ", mode->hsync_end); - dev_info(dev->dev, "htotal = %d ", mode->htotal); - dev_info(dev->dev, "vss = %d ", mode->vsync_start); - dev_info(dev->dev, "vse = %d ", mode->vsync_end); - dev_info(dev->dev, "vtotal = %d ", mode->vtotal); - dev_info(dev->dev, "clock = %d ", mode->clock); - - drm_mode_set_name(mode); - drm_mode_set_crtcinfo(mode, 0); - - mode->type |= drm_mode_type_preferred; - - return mode; -} - -/* dv1 active area 216.96 x 135.6 mm */ -#define dv1_panel_width 217 -#define dv1_panel_height 136 - -static int tc35876x_get_panel_info(struct drm_device *dev, int pipe, - struct panel_info *pi) -{ - if (!dev || !pi) - return -einval; - - pi->width_mm = dv1_panel_width; - pi->height_mm = dv1_panel_height; - - return 0; -} - -static int tc35876x_bridge_probe(struct i2c_client *client, - const struct i2c_device_id *id) -{ - dev_info(&client->dev, "%s ", __func__); - - if (!i2c_check_functionality(client->adapter, i2c_func_i2c)) { - dev_err(&client->dev, "%s: i2c_check_functionality() failed ", - __func__); - return -enodev; - } - - bridge_reset = devm_gpiod_get_optional(&client->dev, "bridge-reset", gpiod_out_low); - if (is_err(bridge_reset)) - return ptr_err(bridge_reset); - if (bridge_reset) - gpiod_set_consumer_name(bridge_reset, "tc35876x bridge reset"); - - bridge_bl_enable = devm_gpiod_get_optional(&client->dev, "bl-en", gpiod_out_low); - if (is_err(bridge_bl_enable)) - return ptr_err(bridge_bl_enable); - if (bridge_bl_enable) - gpiod_set_consumer_name(bridge_bl_enable, "tc35876x panel bl en"); - - backlight_voltage = devm_gpiod_get_optional(&client->dev, "vadd", gpiod_out_low); - if (is_err(backlight_voltage)) - return ptr_err(backlight_voltage); - if (backlight_voltage) - gpiod_set_consumer_name(backlight_voltage, "tc35876x panel vadd"); - - tc35876x_client = client; - - return 0; -} - -static int tc35876x_bridge_remove(struct i2c_client *client) -{ - dev_dbg(&client->dev, "%s ", __func__); - - tc35876x_client = null; - - return 0; -} - -static const struct i2c_device_id tc35876x_bridge_id[] = { - { "i2c_disp_brig", 0 }, - { } -}; -module_device_table(i2c, tc35876x_bridge_id); - -static struct i2c_driver tc35876x_bridge_i2c_driver = { - .driver = { - .name = "i2c_disp_brig", - }, - .id_table = tc35876x_bridge_id, - .probe = tc35876x_bridge_probe, - .remove = tc35876x_bridge_remove, -}; - -/* lcd panel i2c */ -static int cmi_lcd_i2c_probe(struct i2c_client *client, - const struct i2c_device_id *id) -{ - dev_info(&client->dev, "%s ", __func__); - - if (!i2c_check_functionality(client->adapter, i2c_func_i2c)) { - dev_err(&client->dev, "%s: i2c_check_functionality() failed ", - __func__); - return -enodev; - } - - cmi_lcd_i2c_client = client; - - return 0; -} - -static int cmi_lcd_i2c_remove(struct i2c_client *client) -{ - dev_dbg(&client->dev, "%s ", __func__); - - cmi_lcd_i2c_client = null; - - return 0; -} - -static const struct i2c_device_id cmi_lcd_i2c_id[] = { - { "cmi-lcd", 0 }, - { } -}; -module_device_table(i2c, cmi_lcd_i2c_id); - -static struct i2c_driver cmi_lcd_i2c_driver = { - .driver = { - .name = "cmi-lcd", - }, - .id_table = cmi_lcd_i2c_id, - .probe = cmi_lcd_i2c_probe, - .remove = cmi_lcd_i2c_remove, -}; - -/* hack to create i2c device while it's not created by platform code */ -#define cmi_lcd_i2c_adapter 2 -#define cmi_lcd_i2c_addr 0x60 - -static int cmi_lcd_hack_create_device(void) -{ - struct i2c_adapter *adapter; - struct i2c_client *client; - struct i2c_board_info info = { - .type = "cmi-lcd", - .addr = cmi_lcd_i2c_addr, - }; - - pr_debug("%s ", __func__); - - adapter = i2c_get_adapter(cmi_lcd_i2c_adapter); - if (!adapter) { - pr_err("%s: i2c_get_adapter(%d) failed ", __func__, - cmi_lcd_i2c_adapter); - return -einval; - } - - client = i2c_new_client_device(adapter, &info); - if (is_err(client)) { - pr_err("%s: creating i2c device failed ", __func__); - i2c_put_adapter(adapter); - return ptr_err(client); - } - - return 0; -} - -static const struct drm_encoder_helper_funcs tc35876x_encoder_helper_funcs = { - .dpms = mdfld_dsi_dpi_dpms, - .mode_fixup = mdfld_dsi_dpi_mode_fixup, - .prepare = mdfld_dsi_dpi_prepare, - .mode_set = mdfld_dsi_dpi_mode_set, - .commit = mdfld_dsi_dpi_commit, -}; - -const struct panel_funcs mdfld_tc35876x_funcs = { - .encoder_helper_funcs = &tc35876x_encoder_helper_funcs, - .get_config_mode = tc35876x_get_config_mode, - .get_panel_info = tc35876x_get_panel_info, -}; - -void tc35876x_init(struct drm_device *dev) -{ - int r; - - dev_dbg(dev->dev, "%s ", __func__); - - cmi_lcd_hack_create_device(); - - r = i2c_add_driver(&cmi_lcd_i2c_driver); - if (r < 0) - dev_err(dev->dev, - "%s: i2c_add_driver() for %s failed (%d) ", - __func__, cmi_lcd_i2c_driver.driver.name, r); - - r = i2c_add_driver(&tc35876x_bridge_i2c_driver); - if (r < 0) - dev_err(dev->dev, - "%s: i2c_add_driver() for %s failed (%d) ", - __func__, tc35876x_bridge_i2c_driver.driver.name, r); - - tc35876x_brightness_init(dev); -} - -void tc35876x_exit(void) -{ - pr_debug("%s ", __func__); - - i2c_del_driver(&tc35876x_bridge_i2c_driver); - - if (cmi_lcd_i2c_client) - i2c_del_driver(&cmi_lcd_i2c_driver); -} diff --git a/drivers/gpu/drm/gma500/tc35876x-dsi-lvds.h b/drivers/gpu/drm/gma500/tc35876x-dsi-lvds.h --- a/drivers/gpu/drm/gma500/tc35876x-dsi-lvds.h +++ /dev/null -/* - * copyright ©️ 2011 intel corporation - * - * permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "software"), - * to deal in the software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the software, and to permit persons to whom the - * software is furnished to do so, subject to the following conditions: - * - * the above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * software. - * - * the software is provided "as is", without warranty of any kind, express or - * implied, including but not limited to the warranties of merchantability, - * fitness for a particular purpose and noninfringement. in no event shall - * the authors or copyright holders be liable for any claim, damages or other - * liability, whether in an action of contract, tort or otherwise, arising - * from, out of or in connection with the software or the use or other - * dealings in the software. - * - */ - -#ifndef __mdfld_dsi_lvds_bridge_h__ -#define __mdfld_dsi_lvds_bridge_h__ - -void tc35876x_set_bridge_reset_state(struct drm_device *dev, int state); -void tc35876x_configure_lvds_bridge(struct drm_device *dev); -void tc35876x_brightness_control(struct drm_device *dev, int level); -void tc35876x_toshiba_bridge_panel_off(struct drm_device *dev); -void tc35876x_toshiba_bridge_panel_on(struct drm_device *dev); -void tc35876x_init(struct drm_device *dev); -void tc35876x_exit(void); - -extern const struct panel_funcs mdfld_tc35876x_funcs; - -#endif /*__mdfld_dsi_lvds_bridge_h__*/
|
Graphics
|
e1da811218d2dc197d06b261f3efd37e74eed87a
|
thomas zimmermann
|
drivers
|
gpu
|
drm, gma500
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drm/gma500: drop drm_gma3600 config option
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with support for the mid-related chips removed, only support for desktop chips is left in the driver. so just build the complete driver if drm_gma500 has been selected. anyone who wants to enable the poulsbo code would probably also want the cedarview code.
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this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
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remove moorestown/medfield
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['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
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['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
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['gma500 ']
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['kconfig', 'c', 'makefile']
| 3
| 16
| 24
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--- diff --git a/drivers/gpu/drm/gma500/kconfig b/drivers/gpu/drm/gma500/kconfig --- a/drivers/gpu/drm/gma500/kconfig +++ b/drivers/gpu/drm/gma500/kconfig - tristate "intel gma5/600 kms framebuffer" + tristate "intel gma500/600/3600/3650 kms framebuffer" - -config drm_gma3600 - bool "intel gma3600/3650 support (experimental)" - depends on drm_gma500 - help - say yes to include basic support for intel gma3600/3650 (intel - cedar trail) platforms. diff --git a/drivers/gpu/drm/gma500/makefile b/drivers/gpu/drm/gma500/makefile --- a/drivers/gpu/drm/gma500/makefile +++ b/drivers/gpu/drm/gma500/makefile + blitter.o \ + cdv_device.o \ + cdv_intel_crt.o \ + cdv_intel_display.o \ + cdv_intel_dp.o \ + cdv_intel_hdmi.o \ + cdv_intel_lvds.o \ + gma_device.o \ + gma_display.o \ - intel_i2c.o \ + intel_i2c.o \ + mid_bios.o \ - blitter.o \ + psb_device.o \ - gma_display.o \ - gma_device.o \ - psb_irq.o \ - psb_device.o \ - mid_bios.o + psb_irq.o -gma500_gfx-$(config_drm_gma3600) += cdv_device.o \ - cdv_intel_crt.o \ - cdv_intel_display.o \ - cdv_intel_hdmi.o \ - cdv_intel_lvds.o \ - cdv_intel_dp.o - diff --git a/drivers/gpu/drm/gma500/psb_drv.c b/drivers/gpu/drm/gma500/psb_drv.c --- a/drivers/gpu/drm/gma500/psb_drv.c +++ b/drivers/gpu/drm/gma500/psb_drv.c + /* poulsbo */ -#if defined(config_drm_gma3600) + /* cedartrail */ -#endif
|
Graphics
|
26499e0518a77de29e7db2c53fb0d0e9e15be8fb
|
thomas zimmermann
|
drivers
|
gpu
|
drm, gma500
|
drm/gma500: remove config_x86 conditionals from source files
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remove the config_x86 conditionals from the source code. the driver already depends on x86 in the kconfig file. also, no one has been trying to build it on a non-x86 platform recently, or they would have noticed that drm_ttm_cache_flush() doesn't exist.
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this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
remove moorestown/medfield
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['gma500 ']
|
['c']
| 1
| 0
| 21
|
--- diff --git a/drivers/gpu/drm/gma500/mmu.c b/drivers/gpu/drm/gma500/mmu.c --- a/drivers/gpu/drm/gma500/mmu.c +++ b/drivers/gpu/drm/gma500/mmu.c -#if defined(config_x86) -#else - -static inline void psb_mmu_clflush(struct psb_mmu_driver *driver, void *addr) -{; -} - -#endif -#if defined(config_x86) -#endif -#if defined(config_x86) -#endif -#if defined(config_x86) -#else -static void psb_mmu_flush_ptes(struct psb_mmu_pd *pd, unsigned long address, - uint32_t num_pages, uint32_t desired_tile_stride, - uint32_t hw_tile_stride) -{ - drm_ttm_cache_flush(); -} -#endif
|
Graphics
|
ac798eb13c7049bec1b8ff7a847dfd45592f555d
|
thomas zimmermann
|
drivers
|
gpu
|
drm, gma500
|
drm/gma500: remove dependency on ttm
|
the gma500 driver does not use ttm.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
remove moorestown/medfield
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['gma500 ']
|
['kconfig']
| 1
| 0
| 1
|
--- diff --git a/drivers/gpu/drm/gma500/kconfig b/drivers/gpu/drm/gma500/kconfig --- a/drivers/gpu/drm/gma500/kconfig +++ b/drivers/gpu/drm/gma500/kconfig - select drm_ttm
|
Graphics
|
0b365a207ec729629f407facdf7ae64c1e3d920a
|
thomas zimmermann
|
drivers
|
gpu
|
drm, gma500
|
drm/ingenic: add basic pm support
|
call drm_mode_config_helper_suspend() and drm_mode_config_helper_resume() on suspend and resume, respectively.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add basic pm support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['ingenic ']
|
['c']
| 1
| 18
| 0
|
--- diff --git a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c --- a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c +++ b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c +#include <linux/pm.h> +static int __maybe_unused ingenic_drm_suspend(struct device *dev) +{ + struct ingenic_drm *priv = dev_get_drvdata(dev); + + return drm_mode_config_helper_suspend(&priv->drm); +} + +static int __maybe_unused ingenic_drm_resume(struct device *dev) +{ + struct ingenic_drm *priv = dev_get_drvdata(dev); + + return drm_mode_config_helper_resume(&priv->drm); +} + +static simple_dev_pm_ops(ingenic_drm_pm_ops, ingenic_drm_suspend, ingenic_drm_resume); + + .pm = pm_ptr(&ingenic_drm_pm_ops),
|
Graphics
|
d6bff5b0bddbf294e2db80f2cccdac7be6d0a4d1
|
paul cercueil
|
drivers
|
gpu
|
drm, ingenic
|
drm/ingenic: compute timings according to adjusted_mode->crtc_*
|
the adjusted_mode->crtc_* fields contain the values adjusted for the hardware, and are the ones that should be written to the registers.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add support for delta-rgb panels
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['ingenic ']
|
['c']
| 1
| 9
| 9
|
--- diff --git a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c --- a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c +++ b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c - vpe = mode->vsync_end - mode->vsync_start; - vds = mode->vtotal - mode->vsync_start; - vde = vds + mode->vdisplay; - vt = vde + mode->vsync_start - mode->vdisplay; + vpe = mode->crtc_vsync_end - mode->crtc_vsync_start; + vds = mode->crtc_vtotal - mode->crtc_vsync_start; + vde = vds + mode->crtc_vdisplay; + vt = vde + mode->crtc_vsync_start - mode->crtc_vdisplay; - hpe = mode->hsync_end - mode->hsync_start; - hds = mode->htotal - mode->hsync_start; - hde = hds + mode->hdisplay; - ht = hde + mode->hsync_start - mode->hdisplay; + hpe = mode->crtc_hsync_end - mode->crtc_hsync_start; + hds = mode->crtc_htotal - mode->crtc_hsync_start; + hde = hds + mode->crtc_hdisplay; + ht = hde + mode->crtc_hsync_start - mode->crtc_hdisplay; - ingenic_drm_crtc_update_timings(priv, &crtc_state->mode); + ingenic_drm_crtc_update_timings(priv, &crtc_state->adjusted_mode);
|
Graphics
|
15b7e07bcb2ef3101dfe8413eb67005dadb2f90f
|
paul cercueil sam ravnborg sam ravnborg org
|
drivers
|
gpu
|
drm, ingenic
|
drm/ingenic: properly compute timings when using a 3x8-bit panel
|
the lcd controller expects timing values in dot-clock ticks, which is 3x the timing values in pixels when using a 3x8-bit display; but it will count the display area size in pixels either way. go figure.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add support for delta-rgb panels
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['ingenic ']
|
['c']
| 1
| 14
| 1
|
--- diff --git a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c --- a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c +++ b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c + struct drm_display_mode *mode = &crtc_state->adjusted_mode; + case media_bus_fmt_rgb888_3x8: + /* + * the lcd controller expects timing values in dot-clock ticks, + * which is 3x the timing values in pixels when using a 3x8-bit + * display; but it will count the display area size in pixels + * either way. go figure. + */ + mode->crtc_clock = mode->clock * 3; + mode->crtc_hsync_start = mode->hsync_start * 3 - mode->hdisplay * 2; + mode->crtc_hsync_end = mode->hsync_end * 3 - mode->hdisplay * 2; + mode->crtc_hdisplay = mode->hdisplay; + mode->crtc_htotal = mode->htotal * 3 - mode->hdisplay * 2; + return 0; - case media_bus_fmt_rgb888_3x8:
|
Graphics
|
28ab7d35b6e0796dd7a9a382473e2b41a68ff906
|
paul cercueil sam ravnborg sam ravnborg org
|
drivers
|
gpu
|
drm, ingenic
|
drm/ingenic: add support for serial 8-bit delta-rgb panels
|
add support for 24-bit panels that are connected through a 8-bit bus and use delta-rgb, which means a rgb pixel ordering on odd lines, and a gbr pixel ordering on even lines.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add support for delta-rgb panels
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['ingenic ']
|
['h', 'c']
| 2
| 20
| 1
|
--- diff --git a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c --- a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c +++ b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c - unsigned int cfg; + unsigned int cfg, rgbcfg = 0; + case media_bus_fmt_rgb888_3x8_delta: + rgbcfg = jz_lcd_rgbc_even_gbr | jz_lcd_rgbc_odd_rgb; + fallthrough; + regmap_write(priv->map, jz_reg_lcd_rgbc, rgbcfg); + case media_bus_fmt_rgb888_3x8_delta: diff --git a/drivers/gpu/drm/ingenic/ingenic-drm.h b/drivers/gpu/drm/ingenic/ingenic-drm.h --- a/drivers/gpu/drm/ingenic/ingenic-drm.h +++ b/drivers/gpu/drm/ingenic/ingenic-drm.h +#define jz_reg_lcd_rgbc 0x90 +#define jz_lcd_rgbc_odd_rgb (0x0 << 4) +#define jz_lcd_rgbc_odd_rbg (0x1 << 4) +#define jz_lcd_rgbc_odd_grb (0x2 << 4) +#define jz_lcd_rgbc_odd_gbr (0x3 << 4) +#define jz_lcd_rgbc_odd_brg (0x4 << 4) +#define jz_lcd_rgbc_odd_bgr (0x5 << 4) +#define jz_lcd_rgbc_even_rgb (0x0 << 0) +#define jz_lcd_rgbc_even_rbg (0x1 << 0) +#define jz_lcd_rgbc_even_grb (0x2 << 0) +#define jz_lcd_rgbc_even_gbr (0x3 << 0) +#define jz_lcd_rgbc_even_brg (0x4 << 0) +#define jz_lcd_rgbc_even_bgr (0x5 << 0) +
|
Graphics
|
ca459a7407a2f5c3bad4eb5656ed654b9d3d3579
|
paul cercueil sam ravnborg sam ravnborg org
|
drivers
|
gpu
|
drm, ingenic
|
drm/mediatek: add support for soc mt8183
|
1. add ovl private data 2. add rdma private data 3. add gamma privte data 4. add main and external path module for crtc create
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add support for soc mt8183
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['mediatek ']
|
['c']
| 4
| 70
| 0
|
--- diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c --- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c + { .compatible = "mediatek,mt8183-disp-gamma"}, diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c +static const struct mtk_disp_ovl_data mt8183_ovl_driver_data = { + .addr = disp_reg_ovl_addr_mt8173, + .gmc_bits = 10, + .layer_nr = 4, + .fmt_rgb565_is_0 = true, +}; + +static const struct mtk_disp_ovl_data mt8183_ovl_2l_driver_data = { + .addr = disp_reg_ovl_addr_mt8173, + .gmc_bits = 10, + .layer_nr = 2, + .fmt_rgb565_is_0 = true, +}; + + { .compatible = "mediatek,mt8183-disp-ovl", + .data = &mt8183_ovl_driver_data}, + { .compatible = "mediatek,mt8183-disp-ovl-2l", + .data = &mt8183_ovl_2l_driver_data}, diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c +static const struct mtk_disp_rdma_data mt8183_rdma_driver_data = { + .fifo_size = 5 * sz_1k, +}; + + { .compatible = "mediatek,mt8183-disp-rdma", + .data = &mt8183_rdma_driver_data}, diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c +static const enum mtk_ddp_comp_id mt8183_mtk_ddp_main[] = { + ddp_component_ovl0, + ddp_component_ovl_2l0, + ddp_component_rdma0, + ddp_component_color0, + ddp_component_ccorr, + ddp_component_aal0, + ddp_component_gamma, + ddp_component_dither, + ddp_component_dsi0, +}; + +static const enum mtk_ddp_comp_id mt8183_mtk_ddp_ext[] = { + ddp_component_ovl_2l1, + ddp_component_rdma1, + ddp_component_dpi0, +}; + +static const struct mtk_mmsys_driver_data mt8183_mmsys_driver_data = { + .main_path = mt8183_mtk_ddp_main, + .main_len = array_size(mt8183_mtk_ddp_main), + .ext_path = mt8183_mtk_ddp_ext, + .ext_len = array_size(mt8183_mtk_ddp_ext), +}; + + { .compatible = "mediatek,mt8183-disp-ovl", + .data = (void *)mtk_disp_ovl }, + { .compatible = "mediatek,mt8183-disp-ovl-2l", + .data = (void *)mtk_disp_ovl_2l }, + { .compatible = "mediatek,mt8183-disp-rdma", + .data = (void *)mtk_disp_rdma }, + { .compatible = "mediatek,mt8183-disp-ccorr", + .data = (void *)mtk_disp_ccorr }, + { .compatible = "mediatek,mt8183-disp-gamma", + .data = (void *)mtk_disp_gamma, }, + { .compatible = "mediatek,mt8183-disp-dither", + .data = (void *)mtk_disp_dither }, + { .compatible = "mediatek,mt8183-dsi", + .data = (void *)mtk_dsi }, + { .compatible = "mediatek,mt8183-dpi", + .data = (void *)mtk_dpi }, + { .compatible = "mediatek,mt8183-disp-mutex", + .data = (void *)mtk_disp_mutex }, + { .compatible = "mediatek,mt8183-mmsys", + .data = &mt8183_mmsys_driver_data},
|
Graphics
|
641ef9e7be588e4262f7ed58abad12d446b41315
|
yongqiang niu ck hu ck hu mediatek com
|
drivers
|
gpu
|
drm, mediatek
|
drm/msm/a5xx: remove overwriting a5xx_pc_dbg_eco_cntl register
|
the pc_dbg_eco_cntl register on the adreno a5xx family gets programmed to some different values on a per-model basis. at least, this is what we intend to do here;
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add support for adreno 508/509/512
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['msm ']
|
['c']
| 1
| 0
| 2
|
--- diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c - gpu_write(gpu, reg_a5xx_pc_dbg_eco_cntl, 0xc0200100); -
|
Graphics
|
8f03c30cb814213e36032084a01f49a9e604a3e3
|
angelogioacchino del regno
|
drivers
|
gpu
|
adreno, drm, msm
|
drm/msm/a5xx: separate a5xx_pc_dbg_eco_cntl write from main branch
|
the "main" if branch where we program the other registers for the adreno 5xx family of gpus should not contain the pc_dbg_eco_cntl register programming because this has logical similarity differences from all the others.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add support for adreno 508/509/512
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['msm ']
|
['c']
| 1
| 6
| 3
|
--- diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c - gpu_write(gpu, reg_a5xx_pc_dbg_eco_cntl, - (0x200 << 11 | 0x200 << 22)); + } + + if (adreno_is_a510(adreno_gpu)) + gpu_write(gpu, reg_a5xx_pc_dbg_eco_cntl, + (0x200 << 11 | 0x200 << 22)); + else - }
|
Graphics
|
4340b46ad1619c9607931a59d98d4d5093415475
|
angelogioacchino del regno
|
drivers
|
gpu
|
adreno, drm, msm
|
drm/msm/a5xx: add support for adreno 508, 509, 512 gpus
|
the adreno 508/509/512 gpus are stripped versions of the adreno 5xx found in the mid-end socs such as sdm630, sdm636, sdm660 and sda variants; these socs are usually provided with zap firmwares, but they have no available gpmu.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add support for adreno 508/509/512
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['msm ']
|
['h', 'c']
| 4
| 223
| 20
|
--- diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c -static const struct { +static const struct adreno_five_hwcg_regs { +}, a50x_hwcg[] = { + {reg_a5xx_rbbm_clock_cntl_sp0, 0x02222222}, + {reg_a5xx_rbbm_clock_cntl2_sp0, 0x02222220}, + {reg_a5xx_rbbm_clock_hyst_sp0, 0x0000f3cf}, + {reg_a5xx_rbbm_clock_delay_sp0, 0x00000080}, + {reg_a5xx_rbbm_clock_cntl_tp0, 0x22222222}, + {reg_a5xx_rbbm_clock_cntl2_tp0, 0x22222222}, + {reg_a5xx_rbbm_clock_cntl3_tp0, 0x00002222}, + {reg_a5xx_rbbm_clock_hyst_tp0, 0x77777777}, + {reg_a5xx_rbbm_clock_hyst2_tp0, 0x77777777}, + {reg_a5xx_rbbm_clock_hyst3_tp0, 0x00007777}, + {reg_a5xx_rbbm_clock_delay_tp0, 0x11111111}, + {reg_a5xx_rbbm_clock_delay2_tp0, 0x11111111}, + {reg_a5xx_rbbm_clock_delay3_tp0, 0x00001111}, + {reg_a5xx_rbbm_clock_cntl2_uche, 0x22222222}, + {reg_a5xx_rbbm_clock_cntl3_uche, 0x22222222}, + {reg_a5xx_rbbm_clock_cntl4_uche, 0x00222222}, + {reg_a5xx_rbbm_clock_cntl_uche, 0x22222222}, + {reg_a5xx_rbbm_clock_hyst_uche, 0x00fffff4}, + {reg_a5xx_rbbm_clock_delay_uche, 0x00000002}, + {reg_a5xx_rbbm_clock_cntl_rb0, 0x22222222}, + {reg_a5xx_rbbm_clock_cntl2_rb0, 0x00222222}, + {reg_a5xx_rbbm_clock_cntl_ccu0, 0x00022220}, + {reg_a5xx_rbbm_clock_cntl_rac, 0x05522222}, + {reg_a5xx_rbbm_clock_cntl2_rac, 0x00505555}, + {reg_a5xx_rbbm_clock_hyst_rb_ccu0, 0x04040404}, + {reg_a5xx_rbbm_clock_hyst_rac, 0x07444044}, + {reg_a5xx_rbbm_clock_delay_rb_ccu_l1_0, 0x00000002}, + {reg_a5xx_rbbm_clock_delay_rac, 0x00010011}, + {reg_a5xx_rbbm_clock_cntl_tse_ras_rbbm, 0x04222222}, + {reg_a5xx_rbbm_clock_mode_gpc, 0x02222222}, + {reg_a5xx_rbbm_clock_mode_vfd, 0x00002222}, + {reg_a5xx_rbbm_clock_hyst_tse_ras_rbbm, 0x00000000}, + {reg_a5xx_rbbm_clock_hyst_gpc, 0x04104004}, + {reg_a5xx_rbbm_clock_hyst_vfd, 0x00000000}, + {reg_a5xx_rbbm_clock_delay_hlsq, 0x00000000}, + {reg_a5xx_rbbm_clock_delay_tse_ras_rbbm, 0x00004000}, + {reg_a5xx_rbbm_clock_delay_gpc, 0x00000200}, + {reg_a5xx_rbbm_clock_delay_vfd, 0x00002222}, +}, a512_hwcg[] = { + {reg_a5xx_rbbm_clock_cntl_sp0, 0x02222222}, + {reg_a5xx_rbbm_clock_cntl_sp1, 0x02222222}, + {reg_a5xx_rbbm_clock_cntl2_sp0, 0x02222220}, + {reg_a5xx_rbbm_clock_cntl2_sp1, 0x02222220}, + {reg_a5xx_rbbm_clock_hyst_sp0, 0x0000f3cf}, + {reg_a5xx_rbbm_clock_hyst_sp1, 0x0000f3cf}, + {reg_a5xx_rbbm_clock_delay_sp0, 0x00000080}, + {reg_a5xx_rbbm_clock_delay_sp1, 0x00000080}, + {reg_a5xx_rbbm_clock_cntl_tp0, 0x22222222}, + {reg_a5xx_rbbm_clock_cntl_tp1, 0x22222222}, + {reg_a5xx_rbbm_clock_cntl2_tp0, 0x22222222}, + {reg_a5xx_rbbm_clock_cntl2_tp1, 0x22222222}, + {reg_a5xx_rbbm_clock_cntl3_tp0, 0x00002222}, + {reg_a5xx_rbbm_clock_cntl3_tp1, 0x00002222}, + {reg_a5xx_rbbm_clock_hyst_tp0, 0x77777777}, + {reg_a5xx_rbbm_clock_hyst_tp1, 0x77777777}, + {reg_a5xx_rbbm_clock_hyst2_tp0, 0x77777777}, + {reg_a5xx_rbbm_clock_hyst2_tp1, 0x77777777}, + {reg_a5xx_rbbm_clock_hyst3_tp0, 0x00007777}, + {reg_a5xx_rbbm_clock_hyst3_tp1, 0x00007777}, + {reg_a5xx_rbbm_clock_delay_tp0, 0x11111111}, + {reg_a5xx_rbbm_clock_delay_tp1, 0x11111111}, + {reg_a5xx_rbbm_clock_delay2_tp0, 0x11111111}, + {reg_a5xx_rbbm_clock_delay2_tp1, 0x11111111}, + {reg_a5xx_rbbm_clock_delay3_tp0, 0x00001111}, + {reg_a5xx_rbbm_clock_delay3_tp1, 0x00001111}, + {reg_a5xx_rbbm_clock_cntl_uche, 0x22222222}, + {reg_a5xx_rbbm_clock_cntl2_uche, 0x22222222}, + {reg_a5xx_rbbm_clock_cntl3_uche, 0x22222222}, + {reg_a5xx_rbbm_clock_cntl4_uche, 0x00222222}, + {reg_a5xx_rbbm_clock_hyst_uche, 0x00444444}, + {reg_a5xx_rbbm_clock_delay_uche, 0x00000002}, + {reg_a5xx_rbbm_clock_cntl_rb0, 0x22222222}, + {reg_a5xx_rbbm_clock_cntl_rb1, 0x22222222}, + {reg_a5xx_rbbm_clock_cntl2_rb0, 0x00222222}, + {reg_a5xx_rbbm_clock_cntl2_rb1, 0x00222222}, + {reg_a5xx_rbbm_clock_cntl_ccu0, 0x00022220}, + {reg_a5xx_rbbm_clock_cntl_ccu1, 0x00022220}, + {reg_a5xx_rbbm_clock_cntl_rac, 0x05522222}, + {reg_a5xx_rbbm_clock_cntl2_rac, 0x00505555}, + {reg_a5xx_rbbm_clock_hyst_rb_ccu0, 0x04040404}, + {reg_a5xx_rbbm_clock_hyst_rb_ccu1, 0x04040404}, + {reg_a5xx_rbbm_clock_hyst_rac, 0x07444044}, + {reg_a5xx_rbbm_clock_delay_rb_ccu_l1_0, 0x00000002}, + {reg_a5xx_rbbm_clock_delay_rb_ccu_l1_1, 0x00000002}, + {reg_a5xx_rbbm_clock_delay_rac, 0x00010011}, + {reg_a5xx_rbbm_clock_cntl_tse_ras_rbbm, 0x04222222}, + {reg_a5xx_rbbm_clock_mode_gpc, 0x02222222}, + {reg_a5xx_rbbm_clock_mode_vfd, 0x00002222}, + {reg_a5xx_rbbm_clock_hyst_tse_ras_rbbm, 0x00000000}, + {reg_a5xx_rbbm_clock_hyst_gpc, 0x04104004}, + {reg_a5xx_rbbm_clock_hyst_vfd, 0x00000000}, + {reg_a5xx_rbbm_clock_delay_hlsq, 0x00000000}, + {reg_a5xx_rbbm_clock_delay_tse_ras_rbbm, 0x00004000}, + {reg_a5xx_rbbm_clock_delay_gpc, 0x00000200}, + {reg_a5xx_rbbm_clock_delay_vfd, 0x00002222}, - unsigned int i; + const struct adreno_five_hwcg_regs *regs; + unsigned int i, sz; + + if (adreno_is_a508(adreno_gpu)) { + regs = a50x_hwcg; + sz = array_size(a50x_hwcg); + } else if (adreno_is_a509(adreno_gpu) || adreno_is_a512(adreno_gpu)) { + regs = a512_hwcg; + sz = array_size(a512_hwcg); + } else { + regs = a5xx_hwcg; + sz = array_size(a5xx_hwcg); + } - for (i = 0; i < array_size(a5xx_hwcg); i++) - gpu_write(gpu, a5xx_hwcg[i].offset, - state ? a5xx_hwcg[i].value : 0); + for (i = 0; i < sz; i++) + gpu_write(gpu, regs[i].offset, + state ? regs[i].value : 0); + u32 regbit; - if (adreno_is_a540(adreno_gpu)) + if (adreno_is_a509(adreno_gpu) || adreno_is_a512(adreno_gpu) || + adreno_is_a540(adreno_gpu)) - if (adreno_is_a510(adreno_gpu)) { + if (adreno_is_a508(adreno_gpu) || adreno_is_a510(adreno_gpu)) { - gpu_write(gpu, reg_a5xx_cp_merciu_size, 0x20); + if (adreno_is_a508(adreno_gpu)) + gpu_write(gpu, reg_a5xx_cp_merciu_size, 0x400); + else + gpu_write(gpu, reg_a5xx_cp_merciu_size, 0x20); - if (adreno_is_a540(adreno_gpu)) + else - if (adreno_is_a510(adreno_gpu)) + if (adreno_is_a508(adreno_gpu)) + gpu_write(gpu, reg_a5xx_pc_dbg_eco_cntl, + (0x100 << 11 | 0x100 << 22)); + else if (adreno_is_a509(adreno_gpu) || adreno_is_a510(adreno_gpu) || + adreno_is_a512(adreno_gpu)) + /* + * disable the rb sampler datapath dp2 clock gating optimization + * for 1-sp gpus, as it is enabled by default. + */ + if (adreno_is_a508(adreno_gpu) || adreno_is_a509(adreno_gpu) || + adreno_is_a512(adreno_gpu)) + gpu_rmw(gpu, reg_a5xx_rb_dbg_eco_cntl, 0, (1 << 9)); + - gpu_write(gpu, reg_a5xx_tpl1_mode_cntl, 2 << 7); - gpu_write(gpu, reg_a5xx_rb_mode_cntl, 2 << 1); - gpu_write(gpu, reg_a5xx_uche_dbg_eco_cntl_2, 2); + regbit = 2; + else + regbit = 1; + + gpu_write(gpu, reg_a5xx_tpl1_mode_cntl, regbit << 7); + gpu_write(gpu, reg_a5xx_rb_mode_cntl, regbit << 1); + + if (adreno_is_a509(adreno_gpu) || adreno_is_a512(adreno_gpu) || + adreno_is_a540(adreno_gpu)) + gpu_write(gpu, reg_a5xx_uche_dbg_eco_cntl_2, regbit); - if (adreno_is_a530(adreno_gpu) || adreno_is_a510(adreno_gpu)) + if (adreno_is_a508(adreno_gpu) || adreno_is_a509(adreno_gpu) || + adreno_is_a510(adreno_gpu) || adreno_is_a512(adreno_gpu) || + adreno_is_a530(adreno_gpu)) - if (!adreno_is_a510(adreno_gpu)) + if (!(adreno_is_a508(adreno_gpu) || adreno_is_a509(adreno_gpu) || + adreno_is_a510(adreno_gpu) || adreno_is_a512(adreno_gpu))) - if (adreno_is_a510(adreno_gpu)) { + /* adreno 508, 509, 510, 512 needs manual rbbm sus/res control */ + if (!(adreno_is_a530(adreno_gpu) || adreno_is_a540(adreno_gpu))) { - /* a510 has 3 xin ports in vbif */ - if (adreno_is_a510(adreno_gpu)) + /* a508, a510 have 3 xin ports in vbif */ + if (adreno_is_a508(adreno_gpu) || adreno_is_a510(adreno_gpu)) diff --git a/drivers/gpu/drm/msm/adreno/a5xx_power.c b/drivers/gpu/drm/msm/adreno/a5xx_power.c --- a/drivers/gpu/drm/msm/adreno/a5xx_power.c +++ b/drivers/gpu/drm/msm/adreno/a5xx_power.c - if (adreno_is_a510(adreno_gpu)) + if (!(adreno_is_a530(adreno_gpu) || adreno_is_a540(adreno_gpu))) - if (adreno_is_a510(adreno_gpu)) + if (!(adreno_is_a530(adreno_gpu) || adreno_is_a540(adreno_gpu))) diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c --- a/drivers/gpu/drm/msm/adreno/adreno_device.c +++ b/drivers/gpu/drm/msm/adreno/adreno_device.c + }, { + .rev = adreno_rev(5, 0, 8, any_id), + .revn = 508, + .name = "a508", + .fw = { + [adreno_fw_pm4] = "a530_pm4.fw", + [adreno_fw_pfp] = "a530_pfp.fw", + }, + .gmem = (sz_128k + sz_8k), + /* + * increase inactive period to 250 to avoid bouncing + * the gdsc which appears to make it grumpy + */ + .inactive_period = 250, + .quirks = adreno_quirk_lmloadkill_disable, + .init = a5xx_gpu_init, + .zapfw = "a508_zap.mdt", + }, { + .rev = adreno_rev(5, 0, 9, any_id), + .revn = 509, + .name = "a509", + .fw = { + [adreno_fw_pm4] = "a530_pm4.fw", + [adreno_fw_pfp] = "a530_pfp.fw", + }, + .gmem = (sz_256k + sz_16k), + /* + * increase inactive period to 250 to avoid bouncing + * the gdsc which appears to make it grumpy + */ + .inactive_period = 250, + .quirks = adreno_quirk_lmloadkill_disable, + .init = a5xx_gpu_init, + /* adreno 509 uses the same zap as 512 */ + .zapfw = "a512_zap.mdt", + }, { + .rev = adreno_rev(5, 1, 2, any_id), + .revn = 512, + .name = "a512", + .fw = { + [adreno_fw_pm4] = "a530_pm4.fw", + [adreno_fw_pfp] = "a530_pfp.fw", + }, + .gmem = (sz_256k + sz_16k), + /* + * increase inactive period to 250 to avoid bouncing + * the gdsc which appears to make it grumpy + */ + .inactive_period = 250, + .quirks = adreno_quirk_lmloadkill_disable, + .init = a5xx_gpu_init, + .zapfw = "a512_zap.mdt", diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h +static inline int adreno_is_a508(struct adreno_gpu *gpu) +{ + return gpu->revn == 508; +} + +static inline int adreno_is_a509(struct adreno_gpu *gpu) +{ + return gpu->revn == 509; +} + +static inline int adreno_is_a512(struct adreno_gpu *gpu) +{ + return gpu->revn == 512; +} +
|
Graphics
|
1d832ab30ce64abe30571bc12931a296a8a27c4d
|
angelogioacchino del regno jordan crouse jcrouse codeaurora org martin botka martin botka gmail com
|
drivers
|
gpu
|
adreno, drm, msm
|
drm/msm/a5xx: reset vbif before pc only on a510 and a530
|
resetting the vbif before power collapse is done to avoid getting bogus fifo entries during the suspend sequence or subsequent resume, but this is doable only on adreno 510 and adreno 530, as the other units will tendentially lock up. especially on adreno 508, the gpu will show lockups and very bad slownesses after processing the first frame.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add support for adreno 508/509/512
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['msm ']
|
['c']
| 1
| 5
| 3
|
--- diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c - * entries + * entries on adreno a510 and a530 (the others will tend to lock up) - gpu_write(gpu, reg_a5xx_rbbm_block_sw_reset_cmd, 0x003c0000); - gpu_write(gpu, reg_a5xx_rbbm_block_sw_reset_cmd, 0x00000000); + if (adreno_is_a510(adreno_gpu) || adreno_is_a530(adreno_gpu)) { + gpu_write(gpu, reg_a5xx_rbbm_block_sw_reset_cmd, 0x003c0000); + gpu_write(gpu, reg_a5xx_rbbm_block_sw_reset_cmd, 0x00000000); + }
|
Graphics
|
9deba2b8a5b5e15e8603a6b06abc0e6493c0f868
|
angelogioacchino del regno
|
drivers
|
gpu
|
adreno, drm, msm
|
drm/msm/a5xx: fix vpc protect value in gpu_write()
|
the upstream api for some reason uses logbase2 instead of just passing the argument as-is, whereas downstream caf kernel does the latter.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add support for adreno 508/509/512
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['msm ']
|
['c']
| 1
| 1
| 1
|
--- diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c - gpu_write(gpu, reg_a5xx_cp_protect(15), adreno_protect_rw(0xe70, 4)); + gpu_write(gpu, reg_a5xx_cp_protect(15), adreno_protect_rw(0xe70, 16));
|
Graphics
|
89c1ab960717fb0e9b61c8cf90316bd41309e90a
|
konrad dybcio
|
drivers
|
gpu
|
adreno, drm, msm
|
drm/msm/a5xx: disable flat shading optimization
|
port over the command from downstream to prevent undefined behaviour.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add support for adreno 508/509/512
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['msm ']
|
['c']
| 1
| 3
| 0
|
--- diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c + /* disable all flat shading optimization (allflatoptdis) */ + gpu_rmw(gpu, reg_a5xx_vpc_dbg_eco_cntl, 0, (1 << 10)); +
|
Graphics
|
cce212d84415635ba9a848afd94e9f61444c9187
|
konrad dybcio jordan crouse jcrouse codeaurora org
|
drivers
|
gpu
|
adreno, drm, msm
|
drm/msm/a5xx: disable uche global filter
|
port over the command from downstream to prevent undefined behaviour.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add support for adreno 508/509/512
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['msm ']
|
['h', 'c']
| 2
| 5
| 0
|
--- diff --git a/drivers/gpu/drm/msm/adreno/a5xx.xml.h b/drivers/gpu/drm/msm/adreno/a5xx.xml.h --- a/drivers/gpu/drm/msm/adreno/a5xx.xml.h +++ b/drivers/gpu/drm/msm/adreno/a5xx.xml.h +#define reg_a5xx_uche_mode_cntl 0x00000e81 + diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c + /* disable uche global filter as sp can invalidate/flush independently */ + gpu_write(gpu, reg_a5xx_uche_mode_cntl, bit(29)); +
|
Graphics
|
3f2bc3856bf175c751736c7323188a401ad10a0d
|
konrad dybcio jordan crouse jcrouse codeaurora org
|
drivers
|
gpu
|
adreno, drm, msm
|
drm/msm/dpu1: add support for qseed3lite used on sm8250
|
sm8250 has quite unique qseed lut type: qseed3lite, which is a lightweight version of qseed3 scaler.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add support for qseed3lite used on sm8250
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['msm ', 'dpu1']
|
['h', 'c']
| 7
| 112
| 7
|
--- diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c +#define vig_sm8250_mask \ + (vig_mask | bit(dpu_sspp_scaler_qseed3lite)) + - .qseed_type = dpu_sspp_scaler_qseed3, /* todo: qseed3 lite */ + .qseed_type = dpu_sspp_scaler_qseed3lite, +static const struct dpu_sspp_sub_blks sm8250_vig_sblk_0 = + _vig_sblk("0", 5, dpu_sspp_scaler_qseed3lite); +static const struct dpu_sspp_sub_blks sm8250_vig_sblk_1 = + _vig_sblk("1", 6, dpu_sspp_scaler_qseed3lite); +static const struct dpu_sspp_sub_blks sm8250_vig_sblk_2 = + _vig_sblk("2", 7, dpu_sspp_scaler_qseed3lite); +static const struct dpu_sspp_sub_blks sm8250_vig_sblk_3 = + _vig_sblk("3", 8, dpu_sspp_scaler_qseed3lite); + +static const struct dpu_sspp_cfg sm8250_sspp[] = { + sspp_blk("sspp_0", sspp_vig0, 0x4000, vig_sm8250_mask, + sm8250_vig_sblk_0, 0, sspp_type_vig, dpu_clk_ctrl_vig0), + sspp_blk("sspp_1", sspp_vig1, 0x6000, vig_sm8250_mask, + sm8250_vig_sblk_1, 4, sspp_type_vig, dpu_clk_ctrl_vig1), + sspp_blk("sspp_2", sspp_vig2, 0x8000, vig_sm8250_mask, + sm8250_vig_sblk_2, 8, sspp_type_vig, dpu_clk_ctrl_vig2), + sspp_blk("sspp_3", sspp_vig3, 0xa000, vig_sm8250_mask, + sm8250_vig_sblk_3, 12, sspp_type_vig, dpu_clk_ctrl_vig3), + sspp_blk("sspp_8", sspp_dma0, 0x24000, dma_sdm845_mask, + sdm845_dma_sblk_0, 1, sspp_type_dma, dpu_clk_ctrl_dma0), + sspp_blk("sspp_9", sspp_dma1, 0x26000, dma_sdm845_mask, + sdm845_dma_sblk_1, 5, sspp_type_dma, dpu_clk_ctrl_dma1), + sspp_blk("sspp_10", sspp_dma2, 0x28000, dma_cursor_sdm845_mask, + sdm845_dma_sblk_2, 9, sspp_type_dma, dpu_clk_ctrl_cursor0), + sspp_blk("sspp_11", sspp_dma3, 0x2a000, dma_cursor_sdm845_mask, + sdm845_dma_sblk_3, 13, sspp_type_dma, dpu_clk_ctrl_cursor1), +}; + - /* todo: sspp qseed version differs from 845 */ - .sspp_count = array_size(sdm845_sspp), - .sspp = sdm845_sspp, + .sspp_count = array_size(sm8250_sspp), + .sspp = sm8250_sspp, diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h + * @dpu_sspp_scaler_qseed3lite, qseed3 lite alogorithm support + dpu_sspp_scaler_qseed3lite, diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c + test_bit(dpu_sspp_scaler_qseed3lite, &features) || diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h + (1ul << dpu_sspp_scaler_qseed3lite) | \ diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c +/* dpu_scaler_qseed3lite */ +#define qseed3lite_coef_lut_y_sep_bit 4 +#define qseed3lite_coef_lut_uv_sep_bit 5 +#define qseed3lite_coef_lut_ctrl 0x4c +#define qseed3lite_coef_lut_swap_bit 0 +#define qseed3lite_dir_filter_weight 0x60 +#define qseed3lite_filters 2 +#define qseed3lite_separable_luts 10 +#define qseed3lite_lut_size 33 +#define qseed3lite_sep_lut_size \ + (qseed3lite_lut_size * qseed3lite_separable_luts * sizeof(u32)) + + +static void _dpu_hw_setup_scaler3lite_lut(struct dpu_hw_blk_reg_map *c, + struct dpu_hw_scaler3_cfg *scaler3_cfg, u32 offset) +{ + int j, filter; + int config_lut = 0x0; + unsigned long lut_flags; + u32 lut_addr, lut_offset; + u32 *lut[qseed3lite_filters] = {null, null}; + static const uint32_t off_tbl[qseed3_filters] = { 0x000, 0x200 }; + + dpu_reg_write(c, qseed3lite_dir_filter_weight + offset, scaler3_cfg->dir_weight); + + if (!scaler3_cfg->sep_lut) + return; + + lut_flags = (unsigned long) scaler3_cfg->lut_flag; + if (test_bit(qseed3_coef_lut_y_sep_bit, &lut_flags) && + (scaler3_cfg->y_rgb_sep_lut_idx < qseed3lite_separable_luts) && + (scaler3_cfg->sep_len == qseed3lite_sep_lut_size)) { + lut[0] = scaler3_cfg->sep_lut + + scaler3_cfg->y_rgb_sep_lut_idx * qseed3lite_lut_size; + config_lut = 1; + } + if (test_bit(qseed3_coef_lut_uv_sep_bit, &lut_flags) && + (scaler3_cfg->uv_sep_lut_idx < qseed3lite_separable_luts) && + (scaler3_cfg->sep_len == qseed3lite_sep_lut_size)) { + lut[1] = scaler3_cfg->sep_lut + + scaler3_cfg->uv_sep_lut_idx * qseed3lite_lut_size; + config_lut = 1; + } + + if (config_lut) { + for (filter = 0; filter < qseed3lite_filters; filter++) { + if (!lut[filter]) + continue; + lut_offset = 0; + lut_addr = qseed3_coef_lut + offset + off_tbl[filter]; + for (j = 0; j < qseed3lite_lut_size; j++) { + dpu_reg_write(c, + lut_addr, + (lut[filter])[lut_offset++]); + lut_addr += 4; + } + } + } + + if (test_bit(qseed3_coef_lut_swap_bit, &lut_flags)) + dpu_reg_write(c, qseed3_coef_lut_ctrl + offset, bit(0)); + +} + - if (scaler3_cfg->lut_flag) - _dpu_hw_setup_scaler3_lut(c, scaler3_cfg, - scaler_offset); + if (scaler3_cfg->lut_flag) { + if (scaler_version < 0x2004) + _dpu_hw_setup_scaler3_lut(c, scaler3_cfg, scaler_offset); + else + _dpu_hw_setup_scaler3lite_lut(c, scaler3_cfg, scaler_offset); + } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h + * @ dir_weight: directional weight + + u32 dir_weight; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c + cfg->features & bit(dpu_sspp_scaler_qseed3lite) ||
|
Graphics
|
d21fc5dfc3dfe51429b7b55f23e79db7815048c7
|
dmitry baryshkov
|
drivers
|
gpu
|
disp, dpu1, drm, msm
|
drm/msm: add speed-bin support to a618 gpu
|
some gpus support different max frequencies depending on the platform. to identify the correct variant, we should check the gpu speedbin fuse value. add support for this speedbin detection to a6xx family along with the required fuse details for a618 gpu.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add speed-bin support to a618 gpu
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['msm ']
|
['h', 'c']
| 2
| 85
| 0
|
--- diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +#include <linux/nvmem-consumer.h> + + if (a6xx_gpu->opp_table) + dev_pm_opp_put_supported_hw(a6xx_gpu->opp_table); + +static u32 a618_get_speed_bin(u32 fuse) +{ + if (fuse == 0) + return 0; + else if (fuse == 169) + return 1; + else if (fuse == 174) + return 2; + + return uint_max; +} + +static u32 fuse_to_supp_hw(struct device *dev, u32 revn, u32 fuse) +{ + u32 val = uint_max; + + if (revn == 618) + val = a618_get_speed_bin(fuse); + + if (val == uint_max) { + drm_dev_error(dev, + "missing support for speed-bin: %u. some opps may not be supported by hardware", + fuse); + return uint_max; + } + + return (1 << val); +} + +static int a6xx_set_supported_hw(struct device *dev, struct a6xx_gpu *a6xx_gpu, + u32 revn) +{ + struct opp_table *opp_table; + struct nvmem_cell *cell; + u32 supp_hw = uint_max; + void *buf; + + cell = nvmem_cell_get(dev, "speed_bin"); + /* + * -enoent means that the platform doesn't support speedbin which is + * fine + */ + if (ptr_err(cell) == -enoent) + return 0; + else if (is_err(cell)) { + drm_dev_error(dev, + "failed to read speed-bin. some opps may not be supported by hardware"); + goto done; + } + + buf = nvmem_cell_read(cell, null); + if (is_err(buf)) { + nvmem_cell_put(cell); + drm_dev_error(dev, + "failed to read speed-bin. some opps may not be supported by hardware"); + goto done; + } + + supp_hw = fuse_to_supp_hw(dev, revn, *((u32 *) buf)); + + kfree(buf); + nvmem_cell_put(cell); + +done: + opp_table = dev_pm_opp_set_supported_hw(dev, &supp_hw, 1); + if (is_err(opp_table)) + return ptr_err(opp_table); + + a6xx_gpu->opp_table = opp_table; + return 0; +} + + ret = a6xx_set_supported_hw(&pdev->dev, a6xx_gpu, info->revn); + if (ret) { + a6xx_destroy(&(a6xx_gpu->base.base)); + return err_ptr(ret); + } + diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.h b/drivers/gpu/drm/msm/adreno/a6xx_gpu.h --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.h +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.h + + struct opp_table *opp_table;
|
Graphics
|
fe7952c629daec6fb71f55376cb2ed543fde3186
|
akhil p oommen jordan crouse jcrouse codeaurora org
|
drivers
|
gpu
|
adreno, drm, msm
|
drm/nouveau/kms/nv50-: add module option to select evo/nvd push buffer location
|
signed-off-by: ben skeggs <bskeggs@redhat.com>
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add module option to select evo/nvd push buffer location
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['nouveau ']
|
['c']
| 1
| 6
| 1
|
--- diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c b/drivers/gpu/drm/nouveau/dispnv50/disp.c --- a/drivers/gpu/drm/nouveau/dispnv50/disp.c +++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c +module_parm_desc(kms_vram_pushbuf, "place evo/nvd push buffers in vram (default: auto)"); +static int nv50_dmac_vram_pushbuf = -1; +module_param_named(kms_vram_pushbuf, nv50_dmac_vram_pushbuf, int, 0400); + - if (device->info.family == nv_device_info_v0_pascal) + if ((nv50_dmac_vram_pushbuf > 0) || + (nv50_dmac_vram_pushbuf < 0 && device->info.family == nv_device_info_v0_pascal))
|
Graphics
|
a708d8a7f6141370436c33690eba86fccb04f2c6
|
ben skeggs
|
drivers
|
gpu
|
dispnv50, drm, nouveau
|
drm/nouveau/top/ga100: initial support
|
signed-off-by: ben skeggs <bskeggs@redhat.com> reviewed-by: lyude paul <lyude@redhat.com>
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
initial support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['nouveau ', 'ga100']
|
['h', 'c', 'kbuild']
| 5
| 116
| 2
|
--- diff --git a/drivers/gpu/drm/nouveau/include/nvkm/core/layout.h b/drivers/gpu/drm/nouveau/include/nvkm/core/layout.h --- a/drivers/gpu/drm/nouveau/include/nvkm/core/layout.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/core/layout.h +nvkm_layout_once(nvkm_subdev_fla , struct nvkm_subdev , fla) -nvkm_layout_inst(nvkm_engine_ce , struct nvkm_engine , ce, 9) +nvkm_layout_inst(nvkm_engine_ce , struct nvkm_engine , ce, 10) -nvkm_layout_inst(nvkm_engine_nvdec , struct nvkm_nvdec , nvdec, 3) +nvkm_layout_inst(nvkm_engine_nvdec , struct nvkm_nvdec , nvdec, 5) +nvkm_layout_once(nvkm_engine_ofa , struct nvkm_engine , ofa) diff --git a/drivers/gpu/drm/nouveau/include/nvkm/subdev/top.h b/drivers/gpu/drm/nouveau/include/nvkm/subdev/top.h --- a/drivers/gpu/drm/nouveau/include/nvkm/subdev/top.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/subdev/top.h +int ga100_top_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_top **); diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c + .top = { 0x00000001, ga100_top_new }, + .top = { 0x00000001, ga100_top_new }, + .top = { 0x00000001, ga100_top_new }, diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/top/kbuild b/drivers/gpu/drm/nouveau/nvkm/subdev/top/kbuild --- a/drivers/gpu/drm/nouveau/nvkm/subdev/top/kbuild +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/top/kbuild +nvkm-y += nvkm/subdev/top/ga100.o diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/top/ga100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/top/ga100.c --- /dev/null +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/top/ga100.c +/* + * copyright 2021 red hat inc. + * + * permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "software"), + * to deal in the software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the software, and to permit persons to whom the + * software is furnished to do so, subject to the following conditions: + * + * the above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the software. + * + * the software is provided "as is", without warranty of any kind, express or + * implied, including but not limited to the warranties of merchantability, + * fitness for a particular purpose and noninfringement. in no event shall + * the copyright holder(s) or author(s) be liable for any claim, damages or + * other liability, whether in an action of contract, tort or otherwise, + * arising from, out of or in connection with the software or the use or + * other dealings in the software. + */ +#include "priv.h" + +static int +ga100_top_oneinit(struct nvkm_top *top) +{ + struct nvkm_subdev *subdev = &top->subdev; + struct nvkm_device *device = subdev->device; + struct nvkm_top_device *info = null; + u32 data, type, inst; + int i, n, size = nvkm_rd32(device, 0x0224fc) >> 20; + + for (i = 0, n = 0; i < size; i++) { + if (!info) { + if (!(info = nvkm_top_device_new(top))) + return -enomem; + type = ~0; + inst = 0; + } + + data = nvkm_rd32(device, 0x022800 + (i * 0x04)); + nvkm_trace(subdev, "%02x: %08x ", i, data); + if (!data && n == 0) + continue; + + switch (n++) { + case 0: + type = (data & 0x3f000000) >> 24; + inst = (data & 0x000f0000) >> 16; + info->fault = (data & 0x0000007f); + break; + case 1: + info->addr = (data & 0x00fff000); + info->reset = (data & 0x0000001f); + break; + case 2: + info->runlist = (data & 0x0000fc00) >> 10; + info->engine = (data & 0x00000003); + break; + default: + break; + } + + if (data & 0x80000000) + continue; + n = 0; + + /* translate engine type to nvkm engine identifier. */ +#define i_(t,i) do { info->type = (t); info->inst = (i); } while(0) +#define o_(t,i) do { warn_on(inst); i_(t, i); } while (0) + switch (type) { + case 0x00000000: o_(nvkm_engine_gr , 0); break; + case 0x0000000d: o_(nvkm_engine_sec2 , 0); break; + case 0x0000000e: i_(nvkm_engine_nvenc , inst); break; + case 0x00000010: i_(nvkm_engine_nvdec , inst); break; + case 0x00000012: i_(nvkm_subdev_ioctrl, inst); break; + case 0x00000013: i_(nvkm_engine_ce , inst); break; + case 0x00000014: o_(nvkm_subdev_gsp , 0); break; + case 0x00000015: o_(nvkm_engine_nvjpg , 0); break; + case 0x00000016: o_(nvkm_engine_ofa , 0); break; + case 0x00000017: o_(nvkm_subdev_fla , 0); break; + break; + default: + break; + } + + nvkm_debug(subdev, "%02x.%d (%8s): addr %06x fault %2d " + "runlist %2d engine %2d reset %2d ", type, inst, + info->type == nvkm_subdev_nr ? "????????" : nvkm_subdev_type[info->type], + info->addr, info->fault, info->runlist, info->engine, info->reset); + info = null; + } + + return 0; +} + +static const struct nvkm_top_func +ga100_top = { + .oneinit = ga100_top_oneinit, +}; + +int +ga100_top_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, + struct nvkm_top **ptop) +{ + return nvkm_top_new_(&ga100_top, device, type, inst, ptop); +}
|
Graphics
|
f6df392dddbb9e637b785e7e3d9337a74923dc10
|
ben skeggs
|
drivers
|
gpu
|
core, device, drm, engine, include, nouveau, nvkm, subdev, top
|
drm/sun4i: add support for bt2020 to de3
|
de3 supports 10-bit formats, so it's only naturally to also support bt2020 encoding.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add support for bt2020 to de3
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['sun4i ']
|
['c']
| 2
| 13
| 1
|
--- diff --git a/drivers/gpu/drm/sun4i/sun8i_csc.c b/drivers/gpu/drm/sun4i/sun8i_csc.c --- a/drivers/gpu/drm/sun4i/sun8i_csc.c +++ b/drivers/gpu/drm/sun4i/sun8i_csc.c -static const u32 yuv2rgb_de3[2][2][12] = { +static const u32 yuv2rgb_de3[2][3][12] = { + }, + [drm_color_ycbcr_bt2020] = { + 0x0002542a, 0x00000000, 0x00035b7b, 0xffc00000, + 0x0002542a, 0xffffa017, 0xfffeb2fc, 0xfe000000, + 0x0002542a, 0x00044896, 0x00000000, 0xfe000000, + }, + [drm_color_ycbcr_bt2020] = { + 0x00020000, 0x00000000, 0x0002f2fe, 0x00000000, + 0x00020000, 0xffffabc0, 0xfffedb78, 0xfe000000, + 0x00020000, 0x0003c346, 0x00000000, 0xfe000000, diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c --- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c + if (mixer->cfg->is_de3) + supported_encodings |= bit(drm_color_ycbcr_bt2020);
|
Graphics
|
0cf1d704048a52ead7366b9e763b1754a9352b56
|
jernej skrabec
|
drivers
|
gpu
|
drm, sun4i
|
drm/tegra: falcon: support newer vic firmware
|
support newer vic firmware by accepting the new magic number 0x10fe, loading the full code segment instead of just the first page at boot time, and skipping fce setup if the firmware header indicates that fce is handled internally by the firmware.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
support newer vic firmware
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['tegra ', 'falcon']
|
['c']
| 2
| 18
| 12
|
--- diff --git a/drivers/gpu/drm/tegra/falcon.c b/drivers/gpu/drm/tegra/falcon.c --- a/drivers/gpu/drm/tegra/falcon.c +++ b/drivers/gpu/drm/tegra/falcon.c - if (bin->magic != pci_vendor_id_nvidia) { + if (bin->magic != pci_vendor_id_nvidia && bin->magic != 0x10fe) { - /* copy the first code segment into falcon internal memory */ - falcon_copy_chunk(falcon, falcon->firmware.code.offset, - 0, falcon_memory_imem); + /* copy the code segment into falcon internal memory */ + for (offset = 0; offset < falcon->firmware.code.size; offset += 256) + falcon_copy_chunk(falcon, falcon->firmware.code.offset + offset, + offset, falcon_memory_imem); diff --git a/drivers/gpu/drm/tegra/vic.c b/drivers/gpu/drm/tegra/vic.c --- a/drivers/gpu/drm/tegra/vic.c +++ b/drivers/gpu/drm/tegra/vic.c - hdr = vic->falcon.firmware.virt + - *(u32 *)(hdr + vic_ucode_fce_header_offset); - fce_ucode_size = *(u32 *)(hdr + fce_ucode_size_offset); - falcon_execute_method(&vic->falcon, vic_set_fce_ucode_size, - fce_ucode_size); - falcon_execute_method(&vic->falcon, vic_set_fce_ucode_offset, - (vic->falcon.firmware.iova + fce_bin_data_offset) - >> 8); + + /* old vic firmware needs kernel help with setting up fce microcode. */ + if (fce_bin_data_offset != 0x0 && fce_bin_data_offset != 0xa5a5a5a5) { + hdr = vic->falcon.firmware.virt + + *(u32 *)(hdr + vic_ucode_fce_header_offset); + fce_ucode_size = *(u32 *)(hdr + fce_ucode_size_offset); + + falcon_execute_method(&vic->falcon, vic_set_fce_ucode_size, + fce_ucode_size); + falcon_execute_method( + &vic->falcon, vic_set_fce_ucode_offset, + (vic->falcon.firmware.iova + fce_bin_data_offset) >> 8); + }
|
Graphics
|
58ef3aeb9ac3b2c542d85a2e6b4af8ff12c09b68
|
mikko perttunen
|
drivers
|
gpu
|
drm, tegra
|
drm/vc4: drv: remove the dsi pointer in vc4_drv
|
that pointer isn't used anywhere, so there's no point in keeping it.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add support for the dsi0 controller in the bcm2835 and the dsi1 controller found in the bcm2711
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['vc4 ']
|
['h', 'c']
| 2
| 0
| 10
|
--- diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h --- a/drivers/gpu/drm/vc4/vc4_drv.h +++ b/drivers/gpu/drm/vc4/vc4_drv.h - struct vc4_dsi *dsi1; diff --git a/drivers/gpu/drm/vc4/vc4_dsi.c b/drivers/gpu/drm/vc4/vc4_dsi.c --- a/drivers/gpu/drm/vc4/vc4_dsi.c +++ b/drivers/gpu/drm/vc4/vc4_dsi.c - struct vc4_dev *vc4 = to_vc4_dev(drm); - if (dsi->port == 1) - vc4->dsi1 = dsi; - - struct drm_device *drm = dev_get_drvdata(master); - struct vc4_dev *vc4 = to_vc4_dev(drm); - - if (dsi->port == 1) - vc4->dsi1 = null;
|
Graphics
|
51f4fcd9c4ea867c3b4fe58111f342ad0e80642a
|
maxime ripard dave stevenson dave stevenson raspberrypi com
|
drivers
|
gpu
|
drm, vc4
|
drm/vc4: dsi: correct dsi register definition
|
the dsi1_phy_afec0_pd_dlane1 and dsi1_phy_afec0_pd_dlane3 register definitions were swapped, so trying to use more than a single data lane failed as lane 1 would get powered down. (in theory a 4 lane device would work as all lanes would remain powered).
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add support for the dsi0 controller in the bcm2835 and the dsi1 controller found in the bcm2711
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['vc4 ']
|
['c']
| 1
| 2
| 2
|
--- diff --git a/drivers/gpu/drm/vc4/vc4_dsi.c b/drivers/gpu/drm/vc4/vc4_dsi.c --- a/drivers/gpu/drm/vc4/vc4_dsi.c +++ b/drivers/gpu/drm/vc4/vc4_dsi.c -# define dsi1_phy_afec0_pd_dlane3 bit(10) +# define dsi1_phy_afec0_pd_dlane1 bit(10) -# define dsi1_phy_afec0_pd_dlane1 bit(8) +# define dsi1_phy_afec0_pd_dlane3 bit(8)
|
Graphics
|
e02d5c43f2fdf7d71935de16e8c91b2cd3139f71
|
dave stevenson
|
drivers
|
gpu
|
drm, vc4
|
drm/vc4: dsi: use snprintf for the phy clocks instead of an array
|
the dsi clocks setup function has been using an array to store the clock name of either the dsi0 or dsi1 blocks, using the port id to choose the proper one.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add support for the dsi0 controller in the bcm2835 and the dsi1 controller found in the bcm2711
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['vc4 ']
|
['c']
| 1
| 9
| 8
|
--- diff --git a/drivers/gpu/drm/vc4/vc4_dsi.c b/drivers/gpu/drm/vc4/vc4_dsi.c --- a/drivers/gpu/drm/vc4/vc4_dsi.c +++ b/drivers/gpu/drm/vc4/vc4_dsi.c - const char *dsi0_name, *dsi1_name; + const char *name; - { "dsi0_byte", "dsi1_byte", 8 }, - { "dsi0_ddr2", "dsi1_ddr2", 4 }, - { "dsi0_ddr", "dsi1_ddr", 2 }, + { "byte", 8 }, + { "ddr2", 4 }, + { "ddr", 2 }, + char clk_name[16]; + snprintf(clk_name, sizeof(clk_name), + "dsi%u_%s", dsi->port, phy_clocks[i].name); + - if (dsi->port == 1) - init.name = phy_clocks[i].dsi1_name; - else - init.name = phy_clocks[i].dsi0_name; + init.name = clk_name;
|
Graphics
|
dc0bf36401e891c853e0a25baeb4e0b4e6f3626d
|
maxime ripard
|
drivers
|
gpu
|
drm, vc4
|
drm/vc4: dsi: introduce a variant structure
|
most of the differences between dsi0 and dsi1 are handled through the id. however, the bcm2711 dsi is going to introduce one more variable to the mix and will break some expectations of the earlier, simpler, test.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add support for the dsi0 controller in the bcm2835 and the dsi1 controller found in the bcm2711
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['vc4 ']
|
['c']
| 1
| 37
| 26
|
--- diff --git a/drivers/gpu/drm/vc4/vc4_dsi.c b/drivers/gpu/drm/vc4/vc4_dsi.c --- a/drivers/gpu/drm/vc4/vc4_dsi.c +++ b/drivers/gpu/drm/vc4/vc4_dsi.c +struct vc4_dsi_variant { + /* whether we're on bcm2835's dsi0 or dsi1. */ + unsigned int port; + + bool broken_axi_workaround; + + const char *debugfs_name; + const struct debugfs_reg32 *regs; + size_t nregs; + +}; + - /* whether we're on bcm2835's dsi0 or dsi1. */ - int port; + const struct vc4_dsi_variant *variant; - dsi_read(dsi->port ? dsi1_##offset : dsi0_##offset) + dsi_read(dsi->variant->port ? dsi1_##offset : dsi0_##offset) - dsi_write(dsi->port ? dsi1_##offset : dsi0_##offset, val) -#define dsi_port_bit(bit) (dsi->port ? dsi1_##bit : dsi0_##bit) + dsi_write(dsi->variant->port ? dsi1_##offset : dsi0_##offset, val) +#define dsi_port_bit(bit) (dsi->variant->port ? dsi1_##bit : dsi0_##bit) - drm_error("failed to runtime pm enable on dsi%d ", dsi->port); + drm_error("failed to runtime pm enable on dsi%d ", dsi->variant->port); - if (dsi->port == 0) { + if (dsi->variant->port == 0) { - (dsi->port == 0 ? + (dsi->variant->port == 0 ? - if (dsi->port == 0) + if (dsi->variant->port == 0) - if (dsi->port == 0) { + if (dsi->variant->port == 0) { +static const struct vc4_dsi_variant bcm2835_dsi1_variant = { + .port = 1, + .broken_axi_workaround = true, + .debugfs_name = "dsi1_regs", + .regs = dsi1_regs, + .nregs = array_size(dsi1_regs), +}; + - { .compatible = "brcm,bcm2835-dsi1", (void *)(uintptr_t)1 }, + { .compatible = "brcm,bcm2835-dsi1", &bcm2835_dsi1_variant }, - drm_error("dsi%d: %s error ", dsi->port, type); + drm_error("dsi%d: %s error ", dsi->variant->port, type); - "dsi%u_%s", dsi->port, phy_clocks[i].name); + "dsi%u_%s", dsi->variant->port, phy_clocks[i].name); - dsi->port = (uintptr_t)match->data; + dsi->variant = match->data; - if (dsi->port == 0) { - dsi->regset.regs = dsi0_regs; - dsi->regset.nregs = array_size(dsi0_regs); - } else { - dsi->regset.regs = dsi1_regs; - dsi->regset.nregs = array_size(dsi1_regs); - } + dsi->regset.regs = dsi->variant->regs; + dsi->regset.nregs = dsi->variant->nregs; - if (dsi->port == 1) { + if (dsi->variant->broken_axi_workaround) { - if (dsi->port == 0) - vc4_debugfs_add_regset32(drm, "dsi0_regs", &dsi->regset); - else - vc4_debugfs_add_regset32(drm, "dsi1_regs", &dsi->regset); + vc4_debugfs_add_regset32(drm, dsi->variant->debugfs_name, &dsi->regset);
|
Graphics
|
d1d195ce26a14ec0a87816c09ae514e1c40e97f7
|
maxime ripard
|
drivers
|
gpu
|
drm, vc4
|
drm/vc4: dsi: add support for dsi0
|
dsi0 was partially supported, but didn't register with the main driver, and the code was inconsistent as to whether it checked port == 0 or port == 1.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add support for the dsi0 controller in the bcm2835 and the dsi1 controller found in the bcm2711
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['vc4 ']
|
['c']
| 1
| 8
| 0
|
--- diff --git a/drivers/gpu/drm/vc4/vc4_dsi.c b/drivers/gpu/drm/vc4/vc4_dsi.c --- a/drivers/gpu/drm/vc4/vc4_dsi.c +++ b/drivers/gpu/drm/vc4/vc4_dsi.c +static const struct vc4_dsi_variant bcm2835_dsi0_variant = { + .port = 0, + .debugfs_name = "dsi0_regs", + .regs = dsi0_regs, + .nregs = array_size(dsi0_regs), +}; + + { .compatible = "brcm,bcm2835-dsi0", &bcm2835_dsi0_variant },
|
Graphics
|
4b265fe11fad4234b12d92dd8091f9aa0c878eea
|
dave stevenson
|
drivers
|
gpu
|
drm, vc4
|
dt-bindings: add compatible for bcm2711 dsi1
|
dsi1 on bcm2711 doesn't require the dma workaround that is used on bcm2835/6/7, therefore it needs a new compatible string.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add support for the dsi0 controller in the bcm2835 and the dsi1 controller found in the bcm2711
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['vc4 ']
|
['yaml']
| 1
| 1
| 0
|
--- diff --git a/documentation/devicetree/bindings/display/brcm,bcm2835-dsi0.yaml b/documentation/devicetree/bindings/display/brcm,bcm2835-dsi0.yaml --- a/documentation/devicetree/bindings/display/brcm,bcm2835-dsi0.yaml +++ b/documentation/devicetree/bindings/display/brcm,bcm2835-dsi0.yaml + - brcm,bcm2711-dsi1 - brcm,bcm2835-dsi0 - brcm,bcm2835-dsi1
|
Graphics
|
00aedfa4592d93ed7a6d54ffa7f5e22efb9d9147
|
dave stevenson
|
documentation
|
devicetree
|
bindings, display
|
drm/vc4: dsi: add configuration for bcm2711 dsi1
|
bcm2711 dsi1 doesn't have the issue with the arm not being able to write to the registers, therefore remove the dma workaround for that compatible string.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add support for the dsi0 controller in the bcm2835 and the dsi1 controller found in the bcm2711
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['vc4 ']
|
['c']
| 1
| 10
| 2
|
--- diff --git a/drivers/gpu/drm/vc4/vc4_dsi.c b/drivers/gpu/drm/vc4/vc4_dsi.c --- a/drivers/gpu/drm/vc4/vc4_dsi.c +++ b/drivers/gpu/drm/vc4/vc4_dsi.c +static const struct vc4_dsi_variant bcm2711_dsi1_variant = { + .port = 1, + .debugfs_name = "dsi1_regs", + .regs = dsi1_regs, + .nregs = array_size(dsi1_regs), +}; + + { .compatible = "brcm,bcm2711-dsi1", &bcm2711_dsi1_variant }, - /* dsi1 has a broken axi slave that doesn't respond to writes - * from the arm. it does handle writes from the dma engine, + /* dsi1 on bcm2835/6/7 has a broken axi slave that doesn't respond to + * writes from the arm. it does handle writes from the dma engine,
|
Graphics
|
d0666be8ef9e8e65d4b7fabc1606ec51f61384c0
|
dave stevenson
|
drivers
|
gpu
|
drm, vc4
|
drm/vc4: hvs: align the hvs atomic hooks to the new api
|
since the crtc setup in vc4 is split between the pixelvalves/txp and the hvs, only the pv/txp atomic hooks were updated in the previous commits, but it makes sense to update the hvs ones too.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
support the 10/12 bit output
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['vc4 ', 'hdmi']
|
['h', 'c']
| 4
| 19
| 24
|
--- diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c --- a/drivers/gpu/drm/vc4/vc4_crtc.c +++ b/drivers/gpu/drm/vc4/vc4_crtc.c - struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state, - crtc); - vc4_hvs_atomic_enable(crtc, old_state); + vc4_hvs_atomic_enable(crtc, state); - ret = vc4_hvs_atomic_check(crtc, crtc_state); + ret = vc4_hvs_atomic_check(crtc, state); diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h --- a/drivers/gpu/drm/vc4/vc4_drv.h +++ b/drivers/gpu/drm/vc4/vc4_drv.h -int vc4_hvs_atomic_check(struct drm_crtc *crtc, struct drm_crtc_state *state); -void vc4_hvs_atomic_enable(struct drm_crtc *crtc, struct drm_crtc_state *old_state); -void vc4_hvs_atomic_disable(struct drm_crtc *crtc, struct drm_crtc_state *old_state); -void vc4_hvs_atomic_flush(struct drm_crtc *crtc, - struct drm_atomic_state *state); +int vc4_hvs_atomic_check(struct drm_crtc *crtc, struct drm_atomic_state *state); +void vc4_hvs_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_state *state); +void vc4_hvs_atomic_disable(struct drm_crtc *crtc, struct drm_atomic_state *state); +void vc4_hvs_atomic_flush(struct drm_crtc *crtc, struct drm_atomic_state *state); diff --git a/drivers/gpu/drm/vc4/vc4_hvs.c b/drivers/gpu/drm/vc4/vc4_hvs.c --- a/drivers/gpu/drm/vc4/vc4_hvs.c +++ b/drivers/gpu/drm/vc4/vc4_hvs.c -int vc4_hvs_atomic_check(struct drm_crtc *crtc, - struct drm_crtc_state *state) +int vc4_hvs_atomic_check(struct drm_crtc *crtc, struct drm_atomic_state *state) - struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(state); + struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc); + struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc_state); - if (hweight32(state->connector_mask) > 1) + if (hweight32(crtc_state->connector_mask) > 1) - drm_atomic_crtc_state_for_each_plane_state(plane, plane_state, state) + drm_atomic_crtc_state_for_each_plane_state(plane, plane_state, crtc_state) - struct drm_crtc_state *old_state) + struct drm_atomic_state *state) - struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state); + struct drm_crtc_state *new_crtc_state = drm_atomic_get_new_crtc_state(state, crtc); + struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(new_crtc_state); - struct drm_crtc_state *old_state) + struct drm_atomic_state *state) + struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state, crtc); diff --git a/drivers/gpu/drm/vc4/vc4_txp.c b/drivers/gpu/drm/vc4/vc4_txp.c --- a/drivers/gpu/drm/vc4/vc4_txp.c +++ b/drivers/gpu/drm/vc4/vc4_txp.c - ret = vc4_hvs_atomic_check(crtc, crtc_state); + ret = vc4_hvs_atomic_check(crtc, state); - struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state, - crtc); - vc4_hvs_atomic_enable(crtc, old_state); + vc4_hvs_atomic_enable(crtc, state); - struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state, - crtc); - vc4_hvs_atomic_disable(crtc, old_state); + vc4_hvs_atomic_disable(crtc, state);
|
Graphics
|
ee6965c864e3f5e05304ea07ede452d13980f754
|
maxime ripard thomas zimmermann tzimmermann suse de
|
drivers
|
gpu
|
drm, vc4
|
drm/vc4: pass the atomic state to encoder hooks
|
we'll need to access the connector state in our encoder setup, so let's just pass the whole drm state to our private encoder hooks.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
support the 10/12 bit output
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['vc4 ', 'hdmi']
|
['h', 'c']
| 3
| 25
| 18
|
--- diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c --- a/drivers/gpu/drm/vc4/vc4_crtc.c +++ b/drivers/gpu/drm/vc4/vc4_crtc.c -static int vc4_crtc_disable(struct drm_crtc *crtc, unsigned int channel) +static int vc4_crtc_disable(struct drm_crtc *crtc, + struct drm_atomic_state *state, + unsigned int channel) - vc4_encoder->post_crtc_disable(encoder); + vc4_encoder->post_crtc_disable(encoder, state); - vc4_encoder->post_crtc_powerdown(encoder); + vc4_encoder->post_crtc_powerdown(encoder, state); - return vc4_crtc_disable(crtc, channel); + return vc4_crtc_disable(crtc, null, channel); - vc4_crtc_disable(crtc, old_vc4_state->assigned_channel); + vc4_crtc_disable(crtc, state, old_vc4_state->assigned_channel); - vc4_encoder->pre_crtc_configure(encoder); + vc4_encoder->pre_crtc_configure(encoder, state); - vc4_encoder->pre_crtc_enable(encoder); + vc4_encoder->pre_crtc_enable(encoder, state); - vc4_encoder->post_crtc_enable(encoder); + vc4_encoder->post_crtc_enable(encoder, state); diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h --- a/drivers/gpu/drm/vc4/vc4_drv.h +++ b/drivers/gpu/drm/vc4/vc4_drv.h - void (*pre_crtc_configure)(struct drm_encoder *encoder); - void (*pre_crtc_enable)(struct drm_encoder *encoder); - void (*post_crtc_enable)(struct drm_encoder *encoder); + void (*pre_crtc_configure)(struct drm_encoder *encoder, struct drm_atomic_state *state); + void (*pre_crtc_enable)(struct drm_encoder *encoder, struct drm_atomic_state *state); + void (*post_crtc_enable)(struct drm_encoder *encoder, struct drm_atomic_state *state); - void (*post_crtc_disable)(struct drm_encoder *encoder); - void (*post_crtc_powerdown)(struct drm_encoder *encoder); + void (*post_crtc_disable)(struct drm_encoder *encoder, struct drm_atomic_state *state); + void (*post_crtc_powerdown)(struct drm_encoder *encoder, struct drm_atomic_state *state); diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c -static void vc4_hdmi_encoder_post_crtc_disable(struct drm_encoder *encoder) +static void vc4_hdmi_encoder_post_crtc_disable(struct drm_encoder *encoder, + struct drm_atomic_state *state) -static void vc4_hdmi_encoder_post_crtc_powerdown(struct drm_encoder *encoder) +static void vc4_hdmi_encoder_post_crtc_powerdown(struct drm_encoder *encoder, + struct drm_atomic_state *state) -static void vc4_hdmi_encoder_pre_crtc_configure(struct drm_encoder *encoder) +static void vc4_hdmi_encoder_pre_crtc_configure(struct drm_encoder *encoder, + struct drm_atomic_state *state) -static void vc4_hdmi_encoder_pre_crtc_enable(struct drm_encoder *encoder) +static void vc4_hdmi_encoder_pre_crtc_enable(struct drm_encoder *encoder, + struct drm_atomic_state *state) -static void vc4_hdmi_encoder_post_crtc_enable(struct drm_encoder *encoder) +static void vc4_hdmi_encoder_post_crtc_enable(struct drm_encoder *encoder, + struct drm_atomic_state *state)
|
Graphics
|
8d9147466776c44b6d259077041fa24dcca63abc
|
maxime ripard thomas zimmermann tzimmermann suse de
|
drivers
|
gpu
|
drm, vc4
|
drm/vc4: hdmi: take into account the clock doubling flag in atomic_check
|
commit 63495f6b4aed ("drm/vc4: hdmi: make sure our clock rate is within limits") was intended to compute the pixel rate to make sure we remain within the boundaries of what the hardware can provide.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
support the 10/12 bit output
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['vc4 ', 'hdmi']
|
['c']
| 1
| 3
| 0
|
--- diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c + if (mode->flags & drm_mode_flag_dblclk) + pixel_rate = pixel_rate * 2; +
|
Graphics
|
320e84dc6111ecc1c957e2b186d4d2bafee6bde2
|
maxime ripard
|
drivers
|
gpu
|
drm, vc4
|
drm/vc4: hdmi: don't access the connector state in reset if kmalloc fails
|
drm_atomic_helper_connector_reset uses kmalloc which, from an api standpoint, can fail, and thus setting connector->state to null. however, our reset hook then calls drm_atomic_helper_connector_tv_reset that will access connector->state without checking if it's a valid pointer or not.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
support the 10/12 bit output
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['vc4 ', 'hdmi']
|
['c']
| 1
| 3
| 1
|
--- diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c - drm_atomic_helper_connector_tv_reset(connector); + + if (connector->state) + drm_atomic_helper_connector_tv_reset(connector);
|
Graphics
|
e55a07751146ef8ebc2c561564437b78f46405d3
|
maxime ripard
|
drivers
|
gpu
|
drm, vc4
|
drm/vc4: hdmi: create a custom connector state
|
when run with a higher bpc than 8, the clock of the hdmi controller needs to be adjusted. let's create a connector state that will be used at atomic_check and atomic_enable to compute and store the clock rate associated to the state.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
support the 10/12 bit output
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['vc4 ', 'hdmi']
|
['h', 'c']
| 2
| 40
| 3
|
--- diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c - drm_atomic_helper_connector_reset(connector); + struct vc4_hdmi_connector_state *old_state = + conn_state_to_vc4_hdmi_conn_state(connector->state); + struct vc4_hdmi_connector_state *new_state = + kzalloc(sizeof(*new_state), gfp_kernel); - drm_atomic_helper_connector_tv_reset(connector); + __drm_atomic_helper_connector_destroy_state(connector->state); + + kfree(old_state); + __drm_atomic_helper_connector_reset(connector, &new_state->base); + + if (!new_state) + return; + + drm_atomic_helper_connector_tv_reset(connector); +} + +static struct drm_connector_state * +vc4_hdmi_connector_duplicate_state(struct drm_connector *connector) +{ + struct drm_connector_state *conn_state = connector->state; + struct vc4_hdmi_connector_state *vc4_state = conn_state_to_vc4_hdmi_conn_state(conn_state); + struct vc4_hdmi_connector_state *new_state; + + new_state = kzalloc(sizeof(*new_state), gfp_kernel); + if (!new_state) + return null; + + __drm_atomic_helper_connector_duplicate_state(connector, &new_state->base); + + return &new_state->base; - .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, + .atomic_duplicate_state = vc4_hdmi_connector_duplicate_state, diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.h b/drivers/gpu/drm/vc4/vc4_hdmi.h --- a/drivers/gpu/drm/vc4/vc4_hdmi.h +++ b/drivers/gpu/drm/vc4/vc4_hdmi.h +struct vc4_hdmi_connector_state { + struct drm_connector_state base; +}; + +static inline struct vc4_hdmi_connector_state * +conn_state_to_vc4_hdmi_conn_state(struct drm_connector_state *conn_state) +{ + return container_of(conn_state, struct vc4_hdmi_connector_state, base); +} +
|
Graphics
|
fbe7271e47bebd7600fec171bce9d5bf066275f8
|
maxime ripard thomas zimmermann tzimmermann suse de dave stevenson dave stevenson raspberrypi com
|
drivers
|
gpu
|
drm, vc4
|
drm/vc4: hdmi: store pixel frequency in the connector state
|
the pixel rate is for now quite simple to compute, but with more features (30 and 36 bits output, yuv output, etc.) will depend on a bunch of connectors properties.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
support the 10/12 bit output
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['vc4 ', 'hdmi']
|
['h', 'c']
| 2
| 26
| 1
|
--- diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c + new_state->pixel_rate = vc4_state->pixel_rate; +static struct drm_connector_state * +vc4_hdmi_encoder_get_connector_state(struct drm_encoder *encoder, + struct drm_atomic_state *state) +{ + struct drm_connector_state *conn_state; + struct drm_connector *connector; + unsigned int i; + + for_each_new_connector_in_state(state, connector, conn_state, i) { + if (conn_state->best_encoder == encoder) + return conn_state; + } + + return null; +} + + struct drm_connector_state *conn_state = + vc4_hdmi_encoder_get_connector_state(encoder, state); + struct vc4_hdmi_connector_state *vc4_conn_state = + conn_state_to_vc4_hdmi_conn_state(conn_state); - pixel_rate = mode->clock * 1000 * ((mode->flags & drm_mode_flag_dblclk) ? 2 : 1); + pixel_rate = vc4_conn_state->pixel_rate; + struct vc4_hdmi_connector_state *vc4_state = conn_state_to_vc4_hdmi_conn_state(conn_state); + vc4_state->pixel_rate = pixel_rate; + diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.h b/drivers/gpu/drm/vc4/vc4_hdmi.h --- a/drivers/gpu/drm/vc4/vc4_hdmi.h +++ b/drivers/gpu/drm/vc4/vc4_hdmi.h + unsigned long long pixel_rate;
|
Graphics
|
f623746f74721be7ac1cf10e0f5e731f30d191b0
|
maxime ripard
|
drivers
|
gpu
|
drm, vc4
|
drm/vc4: hdmi: use the connector state pixel rate for the phy
|
the phy initialisation parameters are not based on the pixel clock but the tmds clock rate which can be the pixel clock in the standard case, but could be adjusted based on some parameters like the bits per color.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
support the 10/12 bit output
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['vc4 ', 'hdmi']
|
['h', 'c']
| 3
| 11
| 10
|
--- diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c - vc4_hdmi->variant->phy_init(vc4_hdmi, mode); + vc4_hdmi->variant->phy_init(vc4_hdmi, vc4_conn_state); diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.h b/drivers/gpu/drm/vc4/vc4_hdmi.h --- a/drivers/gpu/drm/vc4/vc4_hdmi.h +++ b/drivers/gpu/drm/vc4/vc4_hdmi.h -struct drm_display_mode; - +struct vc4_hdmi_connector_state; - /* callback to initialize the phy according to the mode */ + /* callback to initialize the phy according to the connector state */ - struct drm_display_mode *mode); + struct vc4_hdmi_connector_state *vc4_conn_state); - struct drm_display_mode *mode); + struct vc4_hdmi_connector_state *vc4_conn_state); - struct drm_display_mode *mode); + struct vc4_hdmi_connector_state *vc4_conn_state); diff --git a/drivers/gpu/drm/vc4/vc4_hdmi_phy.c b/drivers/gpu/drm/vc4/vc4_hdmi_phy.c --- a/drivers/gpu/drm/vc4/vc4_hdmi_phy.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi_phy.c -void vc4_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi, struct drm_display_mode *mode) +void vc4_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi, + struct vc4_hdmi_connector_state *conn_state) -void vc5_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi, struct drm_display_mode *mode) +void vc5_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi, + struct vc4_hdmi_connector_state *conn_state) - unsigned long long pixel_freq = mode->clock * 1000; + unsigned long long pixel_freq = conn_state->pixel_rate;
|
Graphics
|
d2a7dd004c49e547999d75099218d9d0198030fe
|
maxime ripard
|
drivers
|
gpu
|
drm, vc4
|
drm/vc4: hdmi: limit the bcm2711 to the max without scrambling
|
unlike the previous generations, the hsm clock limitation is way above what we can reach without scrambling, so let's move the maximum frequency we support to the maximum clock frequency without scrambling.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
support the 10/12 bit output
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['vc4 ', 'hdmi']
|
['c']
| 1
| 4
| 2
|
--- diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c +#define hdmi_14_max_tmds_clk (340 * 1000 * 1000) + - .max_pixel_clock = 297000000, + .max_pixel_clock = hdmi_14_max_tmds_clk, - .max_pixel_clock = 297000000, + .max_pixel_clock = hdmi_14_max_tmds_clk,
|
Graphics
|
24169a2b0533a6c4030c91a7a074039e7c98fde6
|
maxime ripard dave stevenson dave stevenson raspberrypi com
|
drivers
|
gpu
|
drm, vc4
|
drm/vc4: hdmi: enable 10/12 bpc output
|
the bcm2711 supports higher bpc count than just 8, so let's support it in our driver.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
support the 10/12 bit output
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['vc4 ', 'hdmi']
|
['h', 'c']
| 3
| 79
| 1
|
--- diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c +#define vc5_hdmi_deep_color_config_1_init_pack_phase_shift 8 +#define vc5_hdmi_deep_color_config_1_init_pack_phase_mask vc4_mask(10, 8) + +#define vc5_hdmi_deep_color_config_1_color_depth_shift 0 +#define vc5_hdmi_deep_color_config_1_color_depth_mask vc4_mask(3, 0) + +#define vc5_hdmi_gcp_config_gcp_enable bit(31) + +#define vc5_hdmi_gcp_word_1_gcp_subpacket_byte_1_shift 8 +#define vc5_hdmi_gcp_word_1_gcp_subpacket_byte_1_mask vc4_mask(15, 8) + + new_state->base.max_bpc = 8; + new_state->base.max_requested_bpc = 8; + /* + * some of the properties below require access to state, like bpc. + * allocate some default initial connector state with our reset helper. + */ + if (connector->funcs->reset) + connector->funcs->reset(connector); + + drm_connector_attach_max_bpc_property(connector, 8, 12); + struct drm_connector_state *state, + + struct drm_connector_state *state, + unsigned char gcp; + bool gcp_en; + u32 reg; + switch (state->max_bpc) { + case 12: + gcp = 6; + gcp_en = true; + break; + case 10: + gcp = 5; + gcp_en = true; + break; + case 8: + default: + gcp = 4; + gcp_en = false; + break; + } + + reg = hdmi_read(hdmi_deep_color_config_1); + reg &= ~(vc5_hdmi_deep_color_config_1_init_pack_phase_mask | + vc5_hdmi_deep_color_config_1_color_depth_mask); + reg |= vc4_set_field(2, vc5_hdmi_deep_color_config_1_init_pack_phase) | + vc4_set_field(gcp, vc5_hdmi_deep_color_config_1_color_depth); + hdmi_write(hdmi_deep_color_config_1, reg); + + reg = hdmi_read(hdmi_gcp_word_1); + reg &= ~vc5_hdmi_gcp_word_1_gcp_subpacket_byte_1_mask; + reg |= vc4_set_field(gcp, vc5_hdmi_gcp_word_1_gcp_subpacket_byte_1); + hdmi_write(hdmi_gcp_word_1, reg); + + reg = hdmi_read(hdmi_gcp_config); + reg &= ~vc5_hdmi_gcp_config_gcp_enable; + reg |= gcp_en ? vc5_hdmi_gcp_config_gcp_enable : 0; + hdmi_write(hdmi_gcp_config, reg); + - vc4_hdmi->variant->set_timings(vc4_hdmi, mode); + vc4_hdmi->variant->set_timings(vc4_hdmi, conn_state, mode); + if (conn_state->max_bpc == 12) { + pixel_rate = pixel_rate * 150; + do_div(pixel_rate, 100); + } else if (conn_state->max_bpc == 10) { + pixel_rate = pixel_rate * 125; + do_div(pixel_rate, 100); + } + diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.h b/drivers/gpu/drm/vc4/vc4_hdmi.h --- a/drivers/gpu/drm/vc4/vc4_hdmi.h +++ b/drivers/gpu/drm/vc4/vc4_hdmi.h + struct drm_connector_state *state, diff --git a/drivers/gpu/drm/vc4/vc4_hdmi_regs.h b/drivers/gpu/drm/vc4/vc4_hdmi_regs.h --- a/drivers/gpu/drm/vc4/vc4_hdmi_regs.h +++ b/drivers/gpu/drm/vc4/vc4_hdmi_regs.h + hdmi_deep_color_config_1, + hdmi_gcp_config, + hdmi_gcp_word_1, + vc4_hdmi_reg(hdmi_deep_color_config_1, 0x170), + vc4_hdmi_reg(hdmi_gcp_config, 0x178), + vc4_hdmi_reg(hdmi_gcp_word_1, 0x17c), + vc4_hdmi_reg(hdmi_deep_color_config_1, 0x170), + vc4_hdmi_reg(hdmi_gcp_config, 0x178), + vc4_hdmi_reg(hdmi_gcp_word_1, 0x17c),
|
Graphics
|
ba8c0faebbb0af3f65495992a6543f9d424fd0a3
|
maxime ripard dave stevenson dave stevenson raspberrypi com
|
drivers
|
gpu
|
drm, vc4
|
drm/vc4: hdmi: move hdmi reset to bind
|
the hdmi reset got moved to a later point in the commit 9045e91a476b ("drm/vc4: hdmi: add reset callback").
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add cec support for the bcm2711
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['vc4 ', 'hdmi']
|
['c']
| 1
| 3
| 3
|
--- diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c - if (vc4_hdmi->variant->reset) - vc4_hdmi->variant->reset(vc4_hdmi); - + if (vc4_hdmi->variant->reset) + vc4_hdmi->variant->reset(vc4_hdmi); +
|
Graphics
|
902dc5c19a8fecd3113dd41cc601b34557bdede9
|
dom cobley
|
drivers
|
gpu
|
drm, vc4
|
drm/vc4: hdmi: fix register offset with longer cec messages
|
the code prior to 311e305fdb4e ("drm/vc4: hdmi: implement a register layout abstraction") was relying on the fact that the register offset was incremented by 4 for each readl call. that worked since the register width is 4 bytes.
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this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add cec support for the bcm2711
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['vc4 ', 'hdmi']
|
['c']
| 1
| 15
| 2
|
--- diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c + struct drm_device *dev = vc4_hdmi->connector.dev; + + if (msg->len > 16) { + drm_err(dev, "attempting to read too much data (%d) ", msg->len); + return; + } + - u32 val = hdmi_read(hdmi_cec_rx_data_1 + i); + u32 val = hdmi_read(hdmi_cec_rx_data_1 + (i >> 2)); + struct drm_device *dev = vc4_hdmi->connector.dev; + if (msg->len > 16) { + drm_err(dev, "attempting to transmit too much data (%d) ", msg->len); + return -enomem; + } + - hdmi_write(hdmi_cec_tx_data_1 + i, + hdmi_write(hdmi_cec_tx_data_1 + (i >> 2),
|
Graphics
|
4a59ed546c0511f01a4bf6b886fe34b6cce2513f
|
dom cobley
|
drivers
|
gpu
|
drm, vc4
|
drm/vc4: hdmi: fix up cec registers
|
the commit 311e305fdb4e ("drm/vc4: hdmi: implement a register layout abstraction") forgot one cec register, and made a copy and paste mistake for another one. fix those mistakes.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add cec support for the bcm2711
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['vc4 ', 'hdmi']
|
['h']
| 1
| 3
| 1
|
--- diff --git a/drivers/gpu/drm/vc4/vc4_hdmi_regs.h b/drivers/gpu/drm/vc4/vc4_hdmi_regs.h --- a/drivers/gpu/drm/vc4/vc4_hdmi_regs.h +++ b/drivers/gpu/drm/vc4/vc4_hdmi_regs.h + hdmi_cec_cpu_set, + vc4_hdmi_reg(hdmi_cec_cpu_set, 0x0344), - vc4_hdmi_reg(hdmi_cec_cpu_mask_set, 0x034c), + vc4_hdmi_reg(hdmi_cec_cpu_mask_set, 0x0350),
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Graphics
|
5a32bfd563e8b5766e57475c2c81c769e5a13f5d
|
dom cobley hans verkuil hverkuil cisco xs all nl dave stevenson dave stevenson raspberrypi com hans verkuil hverkuil cisco xs all nl
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drivers
|
gpu
|
drm, vc4
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drm/vc4: hdmi: restore cec physical address on reconnect
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currently we call cec_phys_addr_invalidate on a hotplug deassert. that may be due to a tv power cycling, or an avr being switched on (and switching edid).
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add cec support for the bcm2711
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['vc4 ', 'hdmi']
|
['c']
| 1
| 18
| 6
|
--- diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c + bool connected = false; - return connector_status_connected; - cec_phys_addr_invalidate(vc4_hdmi->cec_adap); - return connector_status_disconnected; + connected = true; + } else if (drm_probe_ddc(vc4_hdmi->ddc)) { + connected = true; + } else if (hdmi_read(hdmi_hotplug) & vc4_hdmi_hotplug_connected) { + connected = true; - if (drm_probe_ddc(vc4_hdmi->ddc)) - return connector_status_connected; + if (connected) { + if (connector->status != connector_status_connected) { + struct edid *edid = drm_get_edid(connector, vc4_hdmi->ddc); + + if (edid) { + cec_s_phys_addr_from_edid(vc4_hdmi->cec_adap, edid); + vc4_hdmi->encoder.hdmi_monitor = drm_detect_hdmi_monitor(edid); + kfree(edid); + } + } - if (hdmi_read(hdmi_hotplug) & vc4_hdmi_hotplug_connected) + } +
|
Graphics
|
4d8602b8ec16f5721a4d1339c610a81f95df1856
|
dom cobley
|
drivers
|
gpu
|
drm, vc4
|
drm/vc4: hdmi: compute the cec clock divider from the clock rate
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the cec clock divider needs to output a frequency of 40khz from the hsm rate on the bcm2835. the driver used to have a fixed frequency for it, but that changed for the bcm2711 and we now need to compute it dynamically to maintain the proper rate.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add cec support for the bcm2711
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['vc4 ', 'hdmi']
|
['c']
| 1
| 3
| 1
|
--- diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c + u16 clk_cnt; + clk_cnt = clk_get_rate(vc4_hdmi->hsm_clock) / cec_clock_freq; - (4091 << vc4_hdmi_cec_div_clk_cnt_shift); + (clk_cnt << vc4_hdmi_cec_div_clk_cnt_shift);
|
Graphics
|
163a3ef681e5e9d5df558e855d86ccd4708d6200
|
maxime ripard hans verkuil hverkuil cisco xs all nl dave stevenson dave stevenson raspberrypi com hans verkuil hverkuil cisco xs all nl
|
drivers
|
gpu
|
drm, vc4
|
drm/vc4: hdmi: update the cec clock divider on hsm rate change
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as part of the enable sequence we might change the hsm clock rate if the pixel rate is different than the one we were already dealing with.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add cec support for the bcm2711
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['vc4 ', 'hdmi']
|
['c']
| 1
| 29
| 10
|
--- diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c +#ifdef config_drm_vc4_hdmi_cec +static void vc4_hdmi_cec_update_clk_div(struct vc4_hdmi *vc4_hdmi) +{ + u16 clk_cnt; + u32 value; + + value = hdmi_read(hdmi_cec_cntrl_1); + value &= ~vc4_hdmi_cec_div_clk_cnt_mask; + + /* + * set the clock divider: the hsm_clock rate and this divider + * setting will give a 40 khz cec clock. + */ + clk_cnt = clk_get_rate(vc4_hdmi->hsm_clock) / cec_clock_freq; + value |= clk_cnt << vc4_hdmi_cec_div_clk_cnt_shift; + hdmi_write(hdmi_cec_cntrl_1, value); +} +#else +static void vc4_hdmi_cec_update_clk_div(struct vc4_hdmi *vc4_hdmi) {} +#endif + + vc4_hdmi_cec_update_clk_div(vc4_hdmi); + - u16 clk_cnt; + - value &= ~vc4_hdmi_cec_div_clk_cnt_mask; - /* - * set the logical address to unregistered and set the clock - * divider: the hsm_clock rate and this divider setting will - * give a 40 khz cec clock. - */ - clk_cnt = clk_get_rate(vc4_hdmi->hsm_clock) / cec_clock_freq; - value |= vc4_hdmi_cec_addr_mask | - (clk_cnt << vc4_hdmi_cec_div_clk_cnt_shift); + /* set the logical address to unregistered */ + value |= vc4_hdmi_cec_addr_mask; + + vc4_hdmi_cec_update_clk_div(vc4_hdmi); +
|
Graphics
|
47fa9a80270e20a0c4ddaffca1f144d22cc59620
|
maxime ripard
|
drivers
|
gpu
|
drm, vc4
|
drm/vc4: hdmi: introduce a cec clock
|
while the bcm2835 had the cec clock derived from the hsm clock, the bcm2711 has a dedicated parent clock for it.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add cec support for the bcm2711
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['vc4 ', 'hdmi']
|
['h', 'c']
| 2
| 9
| 1
|
--- diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c - clk_cnt = clk_get_rate(vc4_hdmi->hsm_clock) / cec_clock_freq; + clk_cnt = clk_get_rate(vc4_hdmi->cec_clock) / cec_clock_freq; + vc4_hdmi->cec_clock = vc4_hdmi->hsm_clock; + vc4_hdmi->cec_clock = devm_clk_get(dev, "cec"); + if (is_err(vc4_hdmi->cec_clock)) { + drm_error("failed to get cec clock "); + return ptr_err(vc4_hdmi->cec_clock); + } + diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.h b/drivers/gpu/drm/vc4/vc4_hdmi.h --- a/drivers/gpu/drm/vc4/vc4_hdmi.h +++ b/drivers/gpu/drm/vc4/vc4_hdmi.h + struct clk *cec_clock;
|
Graphics
|
23b7eb5c12b35913e61f8f64536b8932bdd17a46
|
maxime ripard
|
drivers
|
gpu
|
drm, vc4
|
drm/vc4: hdmi: split the interrupt handlers
|
the bcm2711 has two different interrupt sources to transmit and receive cec messages, provided through an external interrupt chip shared between the two hdmi interrupt controllers.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add cec support for the bcm2711
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['vc4 ', 'hdmi']
|
['c']
| 1
| 65
| 21
|
--- diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c -static irqreturn_t vc4_cec_irq_handler_thread(int irq, void *priv) +static irqreturn_t vc4_cec_irq_handler_rx_thread(int irq, void *priv) +{ + struct vc4_hdmi *vc4_hdmi = priv; + + if (vc4_hdmi->cec_rx_msg.len) + cec_received_msg(vc4_hdmi->cec_adap, + &vc4_hdmi->cec_rx_msg); + + return irq_handled; +} + +static irqreturn_t vc4_cec_irq_handler_tx_thread(int irq, void *priv) - if (vc4_hdmi->cec_irq_was_rx) { - if (vc4_hdmi->cec_rx_msg.len) - cec_received_msg(vc4_hdmi->cec_adap, - &vc4_hdmi->cec_rx_msg); - } else if (vc4_hdmi->cec_tx_ok) { + if (vc4_hdmi->cec_tx_ok) { +static irqreturn_t vc4_cec_irq_handler_thread(int irq, void *priv) +{ + struct vc4_hdmi *vc4_hdmi = priv; + irqreturn_t ret; + + if (vc4_hdmi->cec_irq_was_rx) + ret = vc4_cec_irq_handler_rx_thread(irq, priv); + else + ret = vc4_cec_irq_handler_tx_thread(irq, priv); + + return ret; +} + +static irqreturn_t vc4_cec_irq_handler_tx_bare(int irq, void *priv) +{ + struct vc4_hdmi *vc4_hdmi = priv; + u32 cntrl1; + + cntrl1 = hdmi_read(hdmi_cec_cntrl_1); + vc4_hdmi->cec_tx_ok = cntrl1 & vc4_hdmi_cec_tx_status_good; + cntrl1 &= ~vc4_hdmi_cec_start_xmit_begin; + hdmi_write(hdmi_cec_cntrl_1, cntrl1); + + return irq_wake_thread; +} + +static irqreturn_t vc4_cec_irq_handler_rx_bare(int irq, void *priv) +{ + struct vc4_hdmi *vc4_hdmi = priv; + u32 cntrl1; + + vc4_hdmi->cec_rx_msg.len = 0; + cntrl1 = hdmi_read(hdmi_cec_cntrl_1); + vc4_cec_read_msg(vc4_hdmi, cntrl1); + cntrl1 |= vc4_hdmi_cec_clear_receive_off; + hdmi_write(hdmi_cec_cntrl_1, cntrl1); + cntrl1 &= ~vc4_hdmi_cec_clear_receive_off; + + hdmi_write(hdmi_cec_cntrl_1, cntrl1); + + return irq_wake_thread; +} + - u32 cntrl1, cntrl5; + irqreturn_t ret; + u32 cntrl5; - vc4_hdmi->cec_rx_msg.len = 0; - cntrl1 = hdmi_read(hdmi_cec_cntrl_1); + - if (vc4_hdmi->cec_irq_was_rx) { - vc4_cec_read_msg(vc4_hdmi, cntrl1); - cntrl1 |= vc4_hdmi_cec_clear_receive_off; - hdmi_write(hdmi_cec_cntrl_1, cntrl1); - cntrl1 &= ~vc4_hdmi_cec_clear_receive_off; - } else { - vc4_hdmi->cec_tx_ok = cntrl1 & vc4_hdmi_cec_tx_status_good; - cntrl1 &= ~vc4_hdmi_cec_start_xmit_begin; - } - hdmi_write(hdmi_cec_cntrl_1, cntrl1); - hdmi_write(hdmi_cec_cpu_clear, vc4_hdmi_cpu_cec); + if (vc4_hdmi->cec_irq_was_rx) + ret = vc4_cec_irq_handler_rx_bare(irq, priv); + else + ret = vc4_cec_irq_handler_tx_bare(irq, priv); - return irq_wake_thread; + hdmi_write(hdmi_cec_cpu_clear, vc4_hdmi_cpu_cec); + return ret;
|
Graphics
|
ed4a6bbd638618b74fdb6d0eb924d8b11f80bdc0
|
maxime ripard
|
drivers
|
gpu
|
drm, vc4
|
drm/vc4: hdmi: support bcm2711 cec interrupt setup
|
the hdmi controller found in the bcm2711 has an external interrupt controller for the cec and hotplug interrupt shared between the two instances.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add cec support for the bcm2711
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['vc4 ', 'hdmi']
|
['h', 'c']
| 2
| 39
| 10
|
--- diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c - hdmi_write(hdmi_cec_cpu_mask_clear, vc4_hdmi_cpu_cec); + if (!vc4_hdmi->variant->external_irq_controller) + hdmi_write(hdmi_cec_cpu_mask_clear, vc4_hdmi_cpu_cec); - hdmi_write(hdmi_cec_cpu_mask_set, vc4_hdmi_cpu_cec); + if (!vc4_hdmi->variant->external_irq_controller) + hdmi_write(hdmi_cec_cpu_mask_set, vc4_hdmi_cpu_cec); - hdmi_write(hdmi_cec_cpu_mask_set, 0xffffffff); - - ret = devm_request_threaded_irq(&pdev->dev, platform_get_irq(pdev, 0), - vc4_cec_irq_handler, - vc4_cec_irq_handler_thread, 0, - "vc4 hdmi cec", vc4_hdmi); - if (ret) - goto err_delete_cec_adap; + if (vc4_hdmi->variant->external_irq_controller) { + ret = devm_request_threaded_irq(&pdev->dev, + platform_get_irq_byname(pdev, "cec-rx"), + vc4_cec_irq_handler_rx_bare, + vc4_cec_irq_handler_rx_thread, 0, + "vc4 hdmi cec rx", vc4_hdmi); + if (ret) + goto err_delete_cec_adap; + + ret = devm_request_threaded_irq(&pdev->dev, + platform_get_irq_byname(pdev, "cec-tx"), + vc4_cec_irq_handler_tx_bare, + vc4_cec_irq_handler_tx_thread, 0, + "vc4 hdmi cec tx", vc4_hdmi); + if (ret) + goto err_delete_cec_adap; + } else { + hdmi_write(hdmi_cec_cpu_mask_set, 0xffffffff); + + ret = devm_request_threaded_irq(&pdev->dev, platform_get_irq(pdev, 0), + vc4_cec_irq_handler, + vc4_cec_irq_handler_thread, 0, + "vc4 hdmi cec", vc4_hdmi); + if (ret) + goto err_delete_cec_adap; + } + .external_irq_controller = true, + .external_irq_controller = true, diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.h b/drivers/gpu/drm/vc4/vc4_hdmi.h --- a/drivers/gpu/drm/vc4/vc4_hdmi.h +++ b/drivers/gpu/drm/vc4/vc4_hdmi.h + /* + * the bcm2711 cec/hotplug irq controller is shared between the + * two hdmi controllers, and we have a proper irqchip driver for + * it. + */ + bool external_irq_controller; +
|
Graphics
|
185e98b3bd93c91828a3b394b0400efff63199bf
|
maxime ripard
|
drivers
|
gpu
|
drm, vc4
|
drm/vc4: hdmi: remove cec_available flag
|
now that our hdmi controller supports cec for the bcm2711, let's remove that flag.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add cec support for the bcm2711
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['vc4 ', 'hdmi']
|
['h', 'c']
| 2
| 0
| 7
|
--- diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c - if (!vc4_hdmi->variant->cec_available) - return 0; - - .cec_available = true, diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.h b/drivers/gpu/drm/vc4/vc4_hdmi.h --- a/drivers/gpu/drm/vc4/vc4_hdmi.h +++ b/drivers/gpu/drm/vc4/vc4_hdmi.h - /* set to true when the cec support is available */ - bool cec_available; -
|
Graphics
|
1e5e4bbdfdd2ac5fef78298458c8b02e2ebb82b3
|
dom cobley hans verkuil hverkuil cisco xs all nl dave stevenson dave stevenson raspberrypi com hans verkuil hverkuil cisco xs all nl
|
drivers
|
gpu
|
drm, vc4
|
drm/vc4: hdmi: don't register the cec adapter if there's no interrupts
|
we introduced the bcm2711 support to the vc4 hdmi controller with 5.10, but this was lacking any of the interrupts of the cec controller so we have to deal with the backward compatibility.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add cec support for the bcm2711
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['vc4 ', 'hdmi']
|
['c']
| 1
| 6
| 0
|
--- diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c + struct device *dev = &pdev->dev; + if (!of_find_property(dev->of_node, "interrupts", null)) { + dev_warn(dev, "'interrupts' dt property is missing, no cec "); + return 0; + } +
|
Graphics
|
ae442bf6d6072f3066040e5760a4f0647972a9ae
|
maxime ripard
|
drivers
|
gpu
|
drm, vc4
|
drm: panel: add khadas ts050 panel driver
|
this add support for the khadas ts050 1080x1920 5" lcd dsi panel designed to work with the khadas edge-v, captain, vim3 and vim3l single board computers. it provides a mipi dsi interface to the host, a built-in led backlight and touch controller.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add khadas ts050 panel driver
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['panel ']
|
['kconfig', 'c', 'makefile']
| 3
| 882
| 0
|
--- diff --git a/drivers/gpu/drm/panel/kconfig b/drivers/gpu/drm/panel/kconfig --- a/drivers/gpu/drm/panel/kconfig +++ b/drivers/gpu/drm/panel/kconfig +config drm_panel_khadas_ts050 + tristate "khadas ts050 panel" + depends on of + depends on drm_mipi_dsi + depends on backlight_class_device + help + say y here if you want to enable support for khadas ts050 tft-lcd + panel module. the panel has a 1080x1920 resolution and uses + 24 bit rgb per pixel. it provides a mipi dsi interface to + the host, a built-in led backlight and touch controller. + diff --git a/drivers/gpu/drm/panel/makefile b/drivers/gpu/drm/panel/makefile --- a/drivers/gpu/drm/panel/makefile +++ b/drivers/gpu/drm/panel/makefile +obj-$(config_drm_panel_khadas_ts050) += panel-khadas-ts050.o diff --git a/drivers/gpu/drm/panel/panel-khadas-ts050.c b/drivers/gpu/drm/panel/panel-khadas-ts050.c --- /dev/null +++ b/drivers/gpu/drm/panel/panel-khadas-ts050.c +// spdx-license-identifier: gpl-2.0 +/* + * copyright (c) 2020 baylibre, sas + * author: neil armstrong <narmstrong@baylibre.com> + */ + +#include <linux/delay.h> +#include <linux/gpio/consumer.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/regulator/consumer.h> + +#include <video/mipi_display.h> + +#include <drm/drm_crtc.h> +#include <drm/drm_device.h> +#include <drm/drm_mipi_dsi.h> +#include <drm/drm_modes.h> +#include <drm/drm_panel.h> + +struct khadas_ts050_panel { + struct drm_panel base; + struct mipi_dsi_device *link; + + struct regulator *supply; + struct gpio_desc *reset_gpio; + struct gpio_desc *enable_gpio; + + bool prepared; + bool enabled; +}; + +struct khadas_ts050_panel_cmd { + u8 cmd; + u8 data; +}; + +/* only the cmd1 user command set is documented */ +static const struct khadas_ts050_panel_cmd init_code[] = { + /* select unknown cmd page (undocumented) */ + {0xff, 0xee}, + /* reload cmd1: don't reload default value to register */ + {0xfb, 0x01}, + {0x1f, 0x45}, + {0x24, 0x4f}, + {0x38, 0xc8}, + {0x39, 0x27}, + {0x1e, 0x77}, + {0x1d, 0x0f}, + {0x7e, 0x71}, + {0x7c, 0x03}, + {0xff, 0x00}, + {0xfb, 0x01}, + {0x35, 0x01}, + /* select cmd2 page0 (undocumented) */ + {0xff, 0x01}, + /* reload cmd1: don't reload default value to register */ + {0xfb, 0x01}, + {0x00, 0x01}, + {0x01, 0x55}, + {0x02, 0x40}, + {0x05, 0x40}, + {0x06, 0x4a}, + {0x07, 0x24}, + {0x08, 0x0c}, + {0x0b, 0x7d}, + {0x0c, 0x7d}, + {0x0e, 0xb0}, + {0x0f, 0xae}, + {0x11, 0x10}, + {0x12, 0x10}, + {0x13, 0x03}, + {0x14, 0x4a}, + {0x15, 0x12}, + {0x16, 0x12}, + {0x18, 0x00}, + {0x19, 0x77}, + {0x1a, 0x55}, + {0x1b, 0x13}, + {0x1c, 0x00}, + {0x1d, 0x00}, + {0x1e, 0x13}, + {0x1f, 0x00}, + {0x23, 0x00}, + {0x24, 0x00}, + {0x25, 0x00}, + {0x26, 0x00}, + {0x27, 0x00}, + {0x28, 0x00}, + {0x35, 0x00}, + {0x66, 0x00}, + {0x58, 0x82}, + {0x59, 0x02}, + {0x5a, 0x02}, + {0x5b, 0x02}, + {0x5c, 0x82}, + {0x5d, 0x82}, + {0x5e, 0x02}, + {0x5f, 0x02}, + {0x72, 0x31}, + /* select cmd2 page4 (undocumented) */ + {0xff, 0x05}, + /* reload cmd1: don't reload default value to register */ + {0xfb, 0x01}, + {0x00, 0x01}, + {0x01, 0x0b}, + {0x02, 0x0c}, + {0x03, 0x09}, + {0x04, 0x0a}, + {0x05, 0x00}, + {0x06, 0x0f}, + {0x07, 0x10}, + {0x08, 0x00}, + {0x09, 0x00}, + {0x0a, 0x00}, + {0x0b, 0x00}, + {0x0c, 0x00}, + {0x0d, 0x13}, + {0x0e, 0x15}, + {0x0f, 0x17}, + {0x10, 0x01}, + {0x11, 0x0b}, + {0x12, 0x0c}, + {0x13, 0x09}, + {0x14, 0x0a}, + {0x15, 0x00}, + {0x16, 0x0f}, + {0x17, 0x10}, + {0x18, 0x00}, + {0x19, 0x00}, + {0x1a, 0x00}, + {0x1b, 0x00}, + {0x1c, 0x00}, + {0x1d, 0x13}, + {0x1e, 0x15}, + {0x1f, 0x17}, + {0x20, 0x00}, + {0x21, 0x03}, + {0x22, 0x01}, + {0x23, 0x40}, + {0x24, 0x40}, + {0x25, 0xed}, + {0x29, 0x58}, + {0x2a, 0x12}, + {0x2b, 0x01}, + {0x4b, 0x06}, + {0x4c, 0x11}, + {0x4d, 0x20}, + {0x4e, 0x02}, + {0x4f, 0x02}, + {0x50, 0x20}, + {0x51, 0x61}, + {0x52, 0x01}, + {0x53, 0x63}, + {0x54, 0x77}, + {0x55, 0xed}, + {0x5b, 0x00}, + {0x5c, 0x00}, + {0x5d, 0x00}, + {0x5e, 0x00}, + {0x5f, 0x15}, + {0x60, 0x75}, + {0x61, 0x00}, + {0x62, 0x00}, + {0x63, 0x00}, + {0x64, 0x00}, + {0x65, 0x00}, + {0x66, 0x00}, + {0x67, 0x00}, + {0x68, 0x04}, + {0x69, 0x00}, + {0x6a, 0x00}, + {0x6c, 0x40}, + {0x75, 0x01}, + {0x76, 0x01}, + {0x7a, 0x80}, + {0x7b, 0xa3}, + {0x7c, 0xd8}, + {0x7d, 0x60}, + {0x7f, 0x15}, + {0x80, 0x81}, + {0x83, 0x05}, + {0x93, 0x08}, + {0x94, 0x10}, + {0x8a, 0x00}, + {0x9b, 0x0f}, + {0xea, 0xff}, + {0xec, 0x00}, + /* select cmd2 page0 (undocumented) */ + {0xff, 0x01}, + /* reload cmd1: don't reload default value to register */ + {0xfb, 0x01}, + {0x75, 0x00}, + {0x76, 0xdf}, + {0x77, 0x00}, + {0x78, 0xe4}, + {0x79, 0x00}, + {0x7a, 0xed}, + {0x7b, 0x00}, + {0x7c, 0xf6}, + {0x7d, 0x00}, + {0x7e, 0xff}, + {0x7f, 0x01}, + {0x80, 0x07}, + {0x81, 0x01}, + {0x82, 0x10}, + {0x83, 0x01}, + {0x84, 0x18}, + {0x85, 0x01}, + {0x86, 0x20}, + {0x87, 0x01}, + {0x88, 0x3d}, + {0x89, 0x01}, + {0x8a, 0x56}, + {0x8b, 0x01}, + {0x8c, 0x84}, + {0x8d, 0x01}, + {0x8e, 0xab}, + {0x8f, 0x01}, + {0x90, 0xec}, + {0x91, 0x02}, + {0x92, 0x22}, + {0x93, 0x02}, + {0x94, 0x23}, + {0x95, 0x02}, + {0x96, 0x55}, + {0x97, 0x02}, + {0x98, 0x8b}, + {0x99, 0x02}, + {0x9a, 0xaf}, + {0x9b, 0x02}, + {0x9c, 0xdf}, + {0x9d, 0x03}, + {0x9e, 0x01}, + {0x9f, 0x03}, + {0xa0, 0x2c}, + {0xa2, 0x03}, + {0xa3, 0x39}, + {0xa4, 0x03}, + {0xa5, 0x47}, + {0xa6, 0x03}, + {0xa7, 0x56}, + {0xa9, 0x03}, + {0xaa, 0x66}, + {0xab, 0x03}, + {0xac, 0x76}, + {0xad, 0x03}, + {0xae, 0x85}, + {0xaf, 0x03}, + {0xb0, 0x90}, + {0xb1, 0x03}, + {0xb2, 0xcb}, + {0xb3, 0x00}, + {0xb4, 0xdf}, + {0xb5, 0x00}, + {0xb6, 0xe4}, + {0xb7, 0x00}, + {0xb8, 0xed}, + {0xb9, 0x00}, + {0xba, 0xf6}, + {0xbb, 0x00}, + {0xbc, 0xff}, + {0xbd, 0x01}, + {0xbe, 0x07}, + {0xbf, 0x01}, + {0xc0, 0x10}, + {0xc1, 0x01}, + {0xc2, 0x18}, + {0xc3, 0x01}, + {0xc4, 0x20}, + {0xc5, 0x01}, + {0xc6, 0x3d}, + {0xc7, 0x01}, + {0xc8, 0x56}, + {0xc9, 0x01}, + {0xca, 0x84}, + {0xcb, 0x01}, + {0xcc, 0xab}, + {0xcd, 0x01}, + {0xce, 0xec}, + {0xcf, 0x02}, + {0xd0, 0x22}, + {0xd1, 0x02}, + {0xd2, 0x23}, + {0xd3, 0x02}, + {0xd4, 0x55}, + {0xd5, 0x02}, + {0xd6, 0x8b}, + {0xd7, 0x02}, + {0xd8, 0xaf}, + {0xd9, 0x02}, + {0xda, 0xdf}, + {0xdb, 0x03}, + {0xdc, 0x01}, + {0xdd, 0x03}, + {0xde, 0x2c}, + {0xdf, 0x03}, + {0xe0, 0x39}, + {0xe1, 0x03}, + {0xe2, 0x47}, + {0xe3, 0x03}, + {0xe4, 0x56}, + {0xe5, 0x03}, + {0xe6, 0x66}, + {0xe7, 0x03}, + {0xe8, 0x76}, + {0xe9, 0x03}, + {0xea, 0x85}, + {0xeb, 0x03}, + {0xec, 0x90}, + {0xed, 0x03}, + {0xee, 0xcb}, + {0xef, 0x00}, + {0xf0, 0xbb}, + {0xf1, 0x00}, + {0xf2, 0xc0}, + {0xf3, 0x00}, + {0xf4, 0xcc}, + {0xf5, 0x00}, + {0xf6, 0xd6}, + {0xf7, 0x00}, + {0xf8, 0xe1}, + {0xf9, 0x00}, + {0xfa, 0xea}, + /* select cmd2 page2 (undocumented) */ + {0xff, 0x02}, + /* reload cmd1: don't reload default value to register */ + {0xfb, 0x01}, + {0x00, 0x00}, + {0x01, 0xf4}, + {0x02, 0x00}, + {0x03, 0xef}, + {0x04, 0x01}, + {0x05, 0x07}, + {0x06, 0x01}, + {0x07, 0x28}, + {0x08, 0x01}, + {0x09, 0x44}, + {0x0a, 0x01}, + {0x0b, 0x76}, + {0x0c, 0x01}, + {0x0d, 0xa0}, + {0x0e, 0x01}, + {0x0f, 0xe7}, + {0x10, 0x02}, + {0x11, 0x1f}, + {0x12, 0x02}, + {0x13, 0x22}, + {0x14, 0x02}, + {0x15, 0x54}, + {0x16, 0x02}, + {0x17, 0x8b}, + {0x18, 0x02}, + {0x19, 0xaf}, + {0x1a, 0x02}, + {0x1b, 0xe0}, + {0x1c, 0x03}, + {0x1d, 0x01}, + {0x1e, 0x03}, + {0x1f, 0x2d}, + {0x20, 0x03}, + {0x21, 0x39}, + {0x22, 0x03}, + {0x23, 0x47}, + {0x24, 0x03}, + {0x25, 0x57}, + {0x26, 0x03}, + {0x27, 0x65}, + {0x28, 0x03}, + {0x29, 0x77}, + {0x2a, 0x03}, + {0x2b, 0x85}, + {0x2d, 0x03}, + {0x2f, 0x8f}, + {0x30, 0x03}, + {0x31, 0xcb}, + {0x32, 0x00}, + {0x33, 0xbb}, + {0x34, 0x00}, + {0x35, 0xc0}, + {0x36, 0x00}, + {0x37, 0xcc}, + {0x38, 0x00}, + {0x39, 0xd6}, + {0x3a, 0x00}, + {0x3b, 0xe1}, + {0x3d, 0x00}, + {0x3f, 0xea}, + {0x40, 0x00}, + {0x41, 0xf4}, + {0x42, 0x00}, + {0x43, 0xfe}, + {0x44, 0x01}, + {0x45, 0x07}, + {0x46, 0x01}, + {0x47, 0x28}, + {0x48, 0x01}, + {0x49, 0x44}, + {0x4a, 0x01}, + {0x4b, 0x76}, + {0x4c, 0x01}, + {0x4d, 0xa0}, + {0x4e, 0x01}, + {0x4f, 0xe7}, + {0x50, 0x02}, + {0x51, 0x1f}, + {0x52, 0x02}, + {0x53, 0x22}, + {0x54, 0x02}, + {0x55, 0x54}, + {0x56, 0x02}, + {0x58, 0x8b}, + {0x59, 0x02}, + {0x5a, 0xaf}, + {0x5b, 0x02}, + {0x5c, 0xe0}, + {0x5d, 0x03}, + {0x5e, 0x01}, + {0x5f, 0x03}, + {0x60, 0x2d}, + {0x61, 0x03}, + {0x62, 0x39}, + {0x63, 0x03}, + {0x64, 0x47}, + {0x65, 0x03}, + {0x66, 0x57}, + {0x67, 0x03}, + {0x68, 0x65}, + {0x69, 0x03}, + {0x6a, 0x77}, + {0x6b, 0x03}, + {0x6c, 0x85}, + {0x6d, 0x03}, + {0x6e, 0x8f}, + {0x6f, 0x03}, + {0x70, 0xcb}, + {0x71, 0x00}, + {0x72, 0x00}, + {0x73, 0x00}, + {0x74, 0x21}, + {0x75, 0x00}, + {0x76, 0x4c}, + {0x77, 0x00}, + {0x78, 0x6b}, + {0x79, 0x00}, + {0x7a, 0x85}, + {0x7b, 0x00}, + {0x7c, 0x9a}, + {0x7d, 0x00}, + {0x7e, 0xad}, + {0x7f, 0x00}, + {0x80, 0xbe}, + {0x81, 0x00}, + {0x82, 0xcd}, + {0x83, 0x01}, + {0x84, 0x01}, + {0x85, 0x01}, + {0x86, 0x29}, + {0x87, 0x01}, + {0x88, 0x68}, + {0x89, 0x01}, + {0x8a, 0x98}, + {0x8b, 0x01}, + {0x8c, 0xe5}, + {0x8d, 0x02}, + {0x8e, 0x1e}, + {0x8f, 0x02}, + {0x90, 0x30}, + {0x91, 0x02}, + {0x92, 0x52}, + {0x93, 0x02}, + {0x94, 0x88}, + {0x95, 0x02}, + {0x96, 0xaa}, + {0x97, 0x02}, + {0x98, 0xd7}, + {0x99, 0x02}, + {0x9a, 0xf7}, + {0x9b, 0x03}, + {0x9c, 0x21}, + {0x9d, 0x03}, + {0x9e, 0x2e}, + {0x9f, 0x03}, + {0xa0, 0x3d}, + {0xa2, 0x03}, + {0xa3, 0x4c}, + {0xa4, 0x03}, + {0xa5, 0x5e}, + {0xa6, 0x03}, + {0xa7, 0x71}, + {0xa9, 0x03}, + {0xaa, 0x86}, + {0xab, 0x03}, + {0xac, 0x94}, + {0xad, 0x03}, + {0xae, 0xfa}, + {0xaf, 0x00}, + {0xb0, 0x00}, + {0xb1, 0x00}, + {0xb2, 0x21}, + {0xb3, 0x00}, + {0xb4, 0x4c}, + {0xb5, 0x00}, + {0xb6, 0x6b}, + {0xb7, 0x00}, + {0xb8, 0x85}, + {0xb9, 0x00}, + {0xba, 0x9a}, + {0xbb, 0x00}, + {0xbc, 0xad}, + {0xbd, 0x00}, + {0xbe, 0xbe}, + {0xbf, 0x00}, + {0xc0, 0xcd}, + {0xc1, 0x01}, + {0xc2, 0x01}, + {0xc3, 0x01}, + {0xc4, 0x29}, + {0xc5, 0x01}, + {0xc6, 0x68}, + {0xc7, 0x01}, + {0xc8, 0x98}, + {0xc9, 0x01}, + {0xca, 0xe5}, + {0xcb, 0x02}, + {0xcc, 0x1e}, + {0xcd, 0x02}, + {0xce, 0x20}, + {0xcf, 0x02}, + {0xd0, 0x52}, + {0xd1, 0x02}, + {0xd2, 0x88}, + {0xd3, 0x02}, + {0xd4, 0xaa}, + {0xd5, 0x02}, + {0xd6, 0xd7}, + {0xd7, 0x02}, + {0xd8, 0xf7}, + {0xd9, 0x03}, + {0xda, 0x21}, + {0xdb, 0x03}, + {0xdc, 0x2e}, + {0xdd, 0x03}, + {0xde, 0x3d}, + {0xdf, 0x03}, + {0xe0, 0x4c}, + {0xe1, 0x03}, + {0xe2, 0x5e}, + {0xe3, 0x03}, + {0xe4, 0x71}, + {0xe5, 0x03}, + {0xe6, 0x86}, + {0xe7, 0x03}, + {0xe8, 0x94}, + {0xe9, 0x03}, + {0xea, 0xfa}, + /* select cmd2 page0 (undocumented) */ + {0xff, 0x01}, + /* reload cmd1: don't reload default value to register */ + {0xfb, 0x01}, + /* select cmd2 page1 (undocumented) */ + {0xff, 0x02}, + /* reload cmd1: don't reload default value to register */ + {0xfb, 0x01}, + /* select cmd2 page3 (undocumented) */ + {0xff, 0x04}, + /* reload cmd1: don't reload default value to register */ + {0xfb, 0x01}, + /* select cmd1 */ + {0xff, 0x00}, + {0xd3, 0x05}, /* rgbmipictrl: vsync back porch = 5 */ + {0xd4, 0x04}, /* rgbmipictrl: vsync front porch = 4 */ +}; + +static inline +struct khadas_ts050_panel *to_khadas_ts050_panel(struct drm_panel *panel) +{ + return container_of(panel, struct khadas_ts050_panel, base); +} + +static int khadas_ts050_panel_prepare(struct drm_panel *panel) +{ + struct khadas_ts050_panel *khadas_ts050 = to_khadas_ts050_panel(panel); + unsigned int i; + int err; + + if (khadas_ts050->prepared) + return 0; + + gpiod_set_value_cansleep(khadas_ts050->enable_gpio, 0); + + err = regulator_enable(khadas_ts050->supply); + if (err < 0) + return err; + + gpiod_set_value_cansleep(khadas_ts050->enable_gpio, 1); + + msleep(60); + + gpiod_set_value_cansleep(khadas_ts050->reset_gpio, 1); + + usleep_range(10000, 11000); + + gpiod_set_value_cansleep(khadas_ts050->reset_gpio, 0); + + /* select cmd2 page 4 (undocumented) */ + mipi_dsi_dcs_write(khadas_ts050->link, 0xff, (u8[]){ 0x05 }, 1); + + /* reload cmd1: don't reload default value to register */ + mipi_dsi_dcs_write(khadas_ts050->link, 0xfb, (u8[]){ 0x01 }, 1); + + mipi_dsi_dcs_write(khadas_ts050->link, 0xc5, (u8[]){ 0x01 }, 1); + + msleep(100); + + for (i = 0; i < array_size(init_code); i++) { + err = mipi_dsi_dcs_write(khadas_ts050->link, + init_code[i].cmd, + &init_code[i].data, 1); + if (err < 0) { + dev_err(panel->dev, "failed write cmds: %d ", err); + goto poweroff; + } + } + + err = mipi_dsi_dcs_exit_sleep_mode(khadas_ts050->link); + if (err < 0) { + dev_err(panel->dev, "failed to exit sleep mode: %d ", err); + goto poweroff; + } + + msleep(120); + + /* select cmd1 */ + mipi_dsi_dcs_write(khadas_ts050->link, 0xff, (u8[]){ 0x00 }, 1); + + err = mipi_dsi_dcs_set_tear_on(khadas_ts050->link, + mipi_dsi_dcs_tear_mode_vblank); + if (err < 0) { + dev_err(panel->dev, "failed to set tear on: %d ", err); + goto poweroff; + } + + err = mipi_dsi_dcs_set_display_on(khadas_ts050->link); + if (err < 0) { + dev_err(panel->dev, "failed to set display on: %d ", err); + goto poweroff; + } + + usleep_range(10000, 11000); + + khadas_ts050->prepared = true; + + return 0; + +poweroff: + gpiod_set_value_cansleep(khadas_ts050->enable_gpio, 0); + gpiod_set_value_cansleep(khadas_ts050->reset_gpio, 1); + + regulator_disable(khadas_ts050->supply); + + return err; +} + +static int khadas_ts050_panel_unprepare(struct drm_panel *panel) +{ + struct khadas_ts050_panel *khadas_ts050 = to_khadas_ts050_panel(panel); + int err; + + if (!khadas_ts050->prepared) + return 0; + + khadas_ts050->prepared = false; + + err = mipi_dsi_dcs_enter_sleep_mode(khadas_ts050->link); + if (err < 0) + dev_err(panel->dev, "failed to enter sleep mode: %d ", err); + + msleep(150); + + gpiod_set_value_cansleep(khadas_ts050->enable_gpio, 0); + gpiod_set_value_cansleep(khadas_ts050->reset_gpio, 1); + + err = regulator_disable(khadas_ts050->supply); + if (err < 0) + return err; + + return 0; +} + +static int khadas_ts050_panel_enable(struct drm_panel *panel) +{ + struct khadas_ts050_panel *khadas_ts050 = to_khadas_ts050_panel(panel); + + khadas_ts050->enabled = true; + + return 0; +} + +static int khadas_ts050_panel_disable(struct drm_panel *panel) +{ + struct khadas_ts050_panel *khadas_ts050 = to_khadas_ts050_panel(panel); + int err; + + if (!khadas_ts050->enabled) + return 0; + + err = mipi_dsi_dcs_set_display_off(khadas_ts050->link); + if (err < 0) + dev_err(panel->dev, "failed to set display off: %d ", err); + + usleep_range(10000, 11000); + + khadas_ts050->enabled = false; + + return 0; +} + +static const struct drm_display_mode default_mode = { + .clock = 120000, + .hdisplay = 1088, + .hsync_start = 1088 + 104, + .hsync_end = 1088 + 104 + 4, + .htotal = 1088 + 104 + 4 + 127, + .vdisplay = 1920, + .vsync_start = 1920 + 4, + .vsync_end = 1920 + 4 + 2, + .vtotal = 1920 + 4 + 2 + 3, + .flags = drm_mode_flag_nhsync | drm_mode_flag_nvsync, +}; + +static int khadas_ts050_panel_get_modes(struct drm_panel *panel, + struct drm_connector *connector) +{ + struct drm_display_mode *mode; + + mode = drm_mode_duplicate(connector->dev, &default_mode); + if (!mode) { + dev_err(panel->dev, "failed to add mode %ux%u@%u ", + default_mode.hdisplay, default_mode.vdisplay, + drm_mode_vrefresh(&default_mode)); + return -enomem; + } + + drm_mode_set_name(mode); + + drm_mode_probed_add(connector, mode); + + connector->display_info.width_mm = 64; + connector->display_info.height_mm = 118; + connector->display_info.bpc = 8; + + return 1; +} + +static const struct drm_panel_funcs khadas_ts050_panel_funcs = { + .prepare = khadas_ts050_panel_prepare, + .unprepare = khadas_ts050_panel_unprepare, + .enable = khadas_ts050_panel_enable, + .disable = khadas_ts050_panel_disable, + .get_modes = khadas_ts050_panel_get_modes, +}; + +static const struct of_device_id khadas_ts050_of_match[] = { + { .compatible = "khadas,ts050", }, + { /* sentinel */ } +}; +module_device_table(of, khadas_ts050_of_match); + +static int khadas_ts050_panel_add(struct khadas_ts050_panel *khadas_ts050) +{ + struct device *dev = &khadas_ts050->link->dev; + int err; + + khadas_ts050->supply = devm_regulator_get(dev, "power"); + if (is_err(khadas_ts050->supply)) + return dev_err_probe(dev, ptr_err(khadas_ts050->supply), + "failed to get power supply"); + + khadas_ts050->reset_gpio = devm_gpiod_get(dev, "reset", + gpiod_out_low); + if (is_err(khadas_ts050->reset_gpio)) + return dev_err_probe(dev, ptr_err(khadas_ts050->reset_gpio), + "failed to get reset gpio"); + + khadas_ts050->enable_gpio = devm_gpiod_get(dev, "enable", + gpiod_out_high); + if (is_err(khadas_ts050->enable_gpio)) + return dev_err_probe(dev, ptr_err(khadas_ts050->reset_gpio), + "failed to get enable gpio"); + + drm_panel_init(&khadas_ts050->base, &khadas_ts050->link->dev, + &khadas_ts050_panel_funcs, drm_mode_connector_dsi); + + err = drm_panel_of_backlight(&khadas_ts050->base); + if (err) + return err; + + drm_panel_add(&khadas_ts050->base); + + return 0; +} + +static int khadas_ts050_panel_probe(struct mipi_dsi_device *dsi) +{ + struct khadas_ts050_panel *khadas_ts050; + int err; + + dsi->lanes = 4; + dsi->format = mipi_dsi_fmt_rgb888; + dsi->mode_flags = mipi_dsi_mode_video | mipi_dsi_mode_video_burst | + mipi_dsi_mode_lpm | mipi_dsi_mode_eot_packet; + + khadas_ts050 = devm_kzalloc(&dsi->dev, sizeof(*khadas_ts050), + gfp_kernel); + if (!khadas_ts050) + return -enomem; + + mipi_dsi_set_drvdata(dsi, khadas_ts050); + khadas_ts050->link = dsi; + + err = khadas_ts050_panel_add(khadas_ts050); + if (err < 0) + return err; + + err = mipi_dsi_attach(dsi); + if (err) + drm_panel_remove(&khadas_ts050->base); + + return err; +} + +static int khadas_ts050_panel_remove(struct mipi_dsi_device *dsi) +{ + struct khadas_ts050_panel *khadas_ts050 = mipi_dsi_get_drvdata(dsi); + int err; + + err = mipi_dsi_detach(dsi); + if (err < 0) + dev_err(&dsi->dev, "failed to detach from dsi host: %d ", err); + + drm_panel_remove(&khadas_ts050->base); + drm_panel_disable(&khadas_ts050->base); + drm_panel_unprepare(&khadas_ts050->base); + + return 0; +} + +static void khadas_ts050_panel_shutdown(struct mipi_dsi_device *dsi) +{ + struct khadas_ts050_panel *khadas_ts050 = mipi_dsi_get_drvdata(dsi); + + drm_panel_disable(&khadas_ts050->base); + drm_panel_unprepare(&khadas_ts050->base); +} + +static struct mipi_dsi_driver khadas_ts050_panel_driver = { + .driver = { + .name = "panel-khadas-ts050", + .of_match_table = khadas_ts050_of_match, + }, + .probe = khadas_ts050_panel_probe, + .remove = khadas_ts050_panel_remove, + .shutdown = khadas_ts050_panel_shutdown, +}; +module_mipi_dsi_driver(khadas_ts050_panel_driver); + +module_author("neil armstrong <narmstrong@baylibre.com>"); +module_description("khadas ts050 panel driver"); +module_license("gpl v2");
|
Graphics
|
b215212117f73bc6426d71ee344ef6cc88947916
|
neil armstrong
|
drivers
|
gpu
|
drm, panel
|
drm/panel: mantix: allow to specify default mode for different panels
|
this can be used to use different modes for differnt panels via of device match.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
allow to specify default mode for different panels
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['panel ', 'mantix']
|
['c']
| 1
| 11
| 7
|
--- diff --git a/drivers/gpu/drm/panel/panel-mantix-mlaf057we51.c b/drivers/gpu/drm/panel/panel-mantix-mlaf057we51.c --- a/drivers/gpu/drm/panel/panel-mantix-mlaf057we51.c +++ b/drivers/gpu/drm/panel/panel-mantix-mlaf057we51.c +#include <linux/of_device.h> + + const struct drm_display_mode *default_mode; -static const struct drm_display_mode default_mode = { +static const struct drm_display_mode default_mode_mantix = { - mode = drm_mode_duplicate(connector->dev, &default_mode); + mode = drm_mode_duplicate(connector->dev, ctx->default_mode); - default_mode.hdisplay, default_mode.vdisplay, - drm_mode_vrefresh(&default_mode)); + ctx->default_mode->hdisplay, ctx->default_mode->vdisplay, + drm_mode_vrefresh(ctx->default_mode)); + ctx->default_mode = of_device_get_match_data(dev); - default_mode.hdisplay, default_mode.vdisplay, - drm_mode_vrefresh(&default_mode), + ctx->default_mode->hdisplay, ctx->default_mode->vdisplay, + drm_mode_vrefresh(ctx->default_mode), - { .compatible = "mantix,mlaf057we51-x" }, + { .compatible = "mantix,mlaf057we51-x", .data = &default_mode_mantix },
|
Graphics
|
6ae5837c18e9a5cb631b8ae5950ea1f8ab02a568
|
guido g nther linus walleij linus walleij linaro org sam ravnborg sam ravnborg org
|
drivers
|
gpu
|
drm, panel
|
drm/panel: mantix: support panel from shenzhen yashi changhua intelligent technology co
|
the panel uses the same driver ic and has the same resolution but a slightly different default mode. it seems it can work with the same init sequence.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
support panel from shenzhen yashi changhua intelligent technology co
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['panel ', 'mantix']
|
['c']
| 1
| 16
| 0
|
--- diff --git a/drivers/gpu/drm/panel/panel-mantix-mlaf057we51.c b/drivers/gpu/drm/panel/panel-mantix-mlaf057we51.c --- a/drivers/gpu/drm/panel/panel-mantix-mlaf057we51.c +++ b/drivers/gpu/drm/panel/panel-mantix-mlaf057we51.c +static const struct drm_display_mode default_mode_ys = { + .hdisplay = 720, + .hsync_start = 720 + 45, + .hsync_end = 720 + 45 + 14, + .htotal = 720 + 45 + 14 + 25, + .vdisplay = 1440, + .vsync_start = 1440 + 175, + .vsync_end = 1440 + 175 + 8, + .vtotal = 1440 + 175 + 8 + 50, + .clock = 85298, + .flags = drm_mode_flag_nhsync | drm_mode_flag_nvsync, + .width_mm = 65, + .height_mm = 130, +}; + + { .compatible = "ys,ys57pss36bh5gq", .data = &default_mode_ys },
|
Graphics
|
4b2b869e8efe906f1d51aae6f8c02bf13fe03028
|
guido g nther linus walleij linus walleij linaro org sam ravnborg sam ravnborg org
|
drivers
|
gpu
|
drm, panel
|
drm/panel: panel-dsi-cm: add panel database to driver
|
add a panel database to the driver instead of reading propertes from dt data. this is similar to panel-simple, and i believe it's more future safe way to handle the panels.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add panel database to driver
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['panel ', 'panel-dsi-cm']
|
['c']
| 1
| 66
| 38
|
--- diff --git a/drivers/gpu/drm/panel/panel-dsi-cm.c b/drivers/gpu/drm/panel/panel-dsi-cm.c --- a/drivers/gpu/drm/panel/panel-dsi-cm.c +++ b/drivers/gpu/drm/panel/panel-dsi-cm.c -#include <video/display_timing.h> -#include <video/of_display_timing.h> -#include <video/videomode.h> +static const struct of_device_id dsicm_of_match[]; + +struct dsic_panel_data { + u32 xres; + u32 yres; + u32 refresh; + u32 width_mm; + u32 height_mm; + u32 max_hs_rate; + u32 max_lp_rate; +}; + - /* panel hw configuration from dt or platform data */ + const struct dsic_panel_data *panel_data; + - int width_mm; - int height_mm; - - drm_mode_set_name(mode); - mode->type = drm_mode_type_driver | drm_mode_type_preferred; - - connector->display_info.width_mm = ddata->width_mm; - connector->display_info.height_mm = ddata->height_mm; + connector->display_info.width_mm = ddata->panel_data->width_mm; + connector->display_info.height_mm = ddata->panel_data->height_mm; - struct device_node *node = dsi->dev.of_node; - struct display_timing timing; - struct videomode vm = { - .hactive = 864, - .vactive = 480, - }; + struct drm_display_mode *mode = &ddata->mode; - err = of_get_display_timing(node, "panel-timing", &timing); - if (!err) { - videomode_from_timing(&timing, &vm); - } else { - dev_warn(&dsi->dev, - "failed to get video timing, using defaults "); - } - - if (!vm.pixelclock) - vm.pixelclock = vm.hactive * vm.vactive * 60; - drm_display_mode_from_videomode(&vm, &ddata->mode); - - ddata->width_mm = 0; - of_property_read_u32(node, "width-mm", &ddata->width_mm); - - ddata->height_mm = 0; - of_property_read_u32(node, "height-mm", &ddata->height_mm); + mode->hdisplay = mode->hsync_start = mode->hsync_end = mode->htotal = + ddata->panel_data->xres; + mode->vdisplay = mode->vsync_start = mode->vsync_end = mode->vtotal = + ddata->panel_data->yres; + mode->clock = ddata->panel_data->xres * ddata->panel_data->yres * + ddata->panel_data->refresh / 1000; + mode->width_mm = ddata->panel_data->width_mm; + mode->height_mm = ddata->panel_data->height_mm; + mode->type = drm_mode_type_driver | drm_mode_type_preferred; + drm_mode_set_name(mode); + ddata->panel_data = of_device_get_match_data(dev); + if (!ddata->panel_data) + return -enodev; + - dsi->hs_rate = 300000000; - dsi->lp_rate = 10000000; + dsi->hs_rate = ddata->panel_data->max_hs_rate; + dsi->lp_rate = ddata->panel_data->max_lp_rate; +static const struct dsic_panel_data taal_data = { + .xres = 864, + .yres = 480, + .refresh = 60, + .width_mm = 0, + .height_mm = 0, + .max_hs_rate = 300000000, + .max_lp_rate = 10000000, +}; + +static const struct dsic_panel_data himalaya_data = { + .xres = 480, + .yres = 864, + .refresh = 60, + .width_mm = 49, + .height_mm = 88, + .max_hs_rate = 300000000, + .max_lp_rate = 10000000, +}; + +static const struct dsic_panel_data droid4_data = { + .xres = 540, + .yres = 960, + .refresh = 60, + .width_mm = 50, + .height_mm = 89, + .max_hs_rate = 300000000, + .max_lp_rate = 10000000, +}; + - { .compatible = "panel-dsi-cm", }, + { .compatible = "tpo,taal", .data = &taal_data }, + { .compatible = "nokia,himalaya", &himalaya_data }, + { .compatible = "motorola,droid4-panel", &droid4_data },
|
Graphics
|
08579473e23161a77b08ff37c3c7cf8d4db22beb
|
tomi valkeinen sam ravnborg sam ravnborg org sebastian reichel sebastian reichel collabora com
|
drivers
|
gpu
|
drm, panel
|
drm: panel: simple: add boe nv110wtm-n61
|
add support for the boe nv110wtm-n61 panel. the edid lists two modes (one for 60 hz refresh rate and one for 40 hz), so we'll list both of them here.
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this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add boe nv110wtm-n61
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['panel ', 'simple']
|
['c']
| 1
| 46
| 0
|
--- diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c +static const struct drm_display_mode boe_nv110wtm_n61_modes[] = { + { + .clock = 207800, + .hdisplay = 2160, + .hsync_start = 2160 + 48, + .hsync_end = 2160 + 48 + 32, + .htotal = 2160 + 48 + 32 + 100, + .vdisplay = 1440, + .vsync_start = 1440 + 3, + .vsync_end = 1440 + 3 + 6, + .vtotal = 1440 + 3 + 6 + 31, + }, + { + .clock = 138500, + .hdisplay = 2160, + .hsync_start = 2160 + 48, + .hsync_end = 2160 + 48 + 32, + .htotal = 2160 + 48 + 32 + 100, + .vdisplay = 1440, + .vsync_start = 1440 + 3, + .vsync_end = 1440 + 3 + 6, + .vtotal = 1440 + 3 + 6 + 31, + }, +}; + +static const struct panel_desc boe_nv110wtm_n61 = { + .modes = boe_nv110wtm_n61_modes, + .num_modes = array_size(boe_nv110wtm_n61_modes), + .bpc = 8, + .size = { + .width = 233, + .height = 155, + }, + .delay = { + .hpd_absent_delay = 200, + .prepare_to_enable = 80, + .unprepare = 500, + }, + .bus_format = media_bus_fmt_rgb888_1x24, + .bus_flags = drm_bus_flag_data_msb_to_lsb, + .connector_type = drm_mode_connector_edp, +}; + + }, { + .compatible = "boe,nv110wtm-n61", + .data = &boe_nv110wtm_n61,
|
Graphics
|
a96ee0f6b58de5c4f627489b2d31a5099a779cb9
|
douglas anderson
|
drivers
|
gpu
|
drm, panel
|
drm: automatic legacy gamma support
|
to support legacy gamma ioctls the drivers need to set drm_crtc_funcs.gamma_set either to a custom implementation or to drm_atomic_helper_legacy_gamma_set. most of the atomic drivers do the latter.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
automatic legacy gamma support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['drm']
|
['h', 'c']
| 19
| 102
| 101
|
--- diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c - .gamma_set = drm_atomic_helper_legacy_gamma_set, diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c b/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c --- a/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c +++ b/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c - .gamma_set = drm_atomic_helper_legacy_gamma_set, diff --git a/drivers/gpu/drm/arm/malidp_crtc.c b/drivers/gpu/drm/arm/malidp_crtc.c --- a/drivers/gpu/drm/arm/malidp_crtc.c +++ b/drivers/gpu/drm/arm/malidp_crtc.c - .gamma_set = drm_atomic_helper_legacy_gamma_set, diff --git a/drivers/gpu/drm/armada/armada_crtc.c b/drivers/gpu/drm/armada/armada_crtc.c --- a/drivers/gpu/drm/armada/armada_crtc.c +++ b/drivers/gpu/drm/armada/armada_crtc.c - .gamma_set = drm_atomic_helper_legacy_gamma_set, diff --git a/drivers/gpu/drm/ast/ast_mode.c b/drivers/gpu/drm/ast/ast_mode.c --- a/drivers/gpu/drm/ast/ast_mode.c +++ b/drivers/gpu/drm/ast/ast_mode.c - .gamma_set = drm_atomic_helper_legacy_gamma_set, diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c - .gamma_set = drm_atomic_helper_legacy_gamma_set, diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c --- a/drivers/gpu/drm/drm_atomic_helper.c +++ b/drivers/gpu/drm/drm_atomic_helper.c -/** - * drm_atomic_helper_legacy_gamma_set - set the legacy gamma correction table - * @crtc: crtc object - * @red: red correction table - * @green: green correction table - * @blue: green correction table - * @size: size of the tables - * @ctx: lock acquire context - * - * implements support for legacy gamma correction table for drivers - * that support color management through the degamma_lut/gamma_lut - * properties. see drm_crtc_enable_color_mgmt() and the containing chapter for - * how the atomic color management and gamma tables work. - */ -int drm_atomic_helper_legacy_gamma_set(struct drm_crtc *crtc, - u16 *red, u16 *green, u16 *blue, - uint32_t size, - struct drm_modeset_acquire_ctx *ctx) -{ - struct drm_device *dev = crtc->dev; - struct drm_atomic_state *state; - struct drm_crtc_state *crtc_state; - struct drm_property_blob *blob = null; - struct drm_color_lut *blob_data; - int i, ret = 0; - bool replaced; - - state = drm_atomic_state_alloc(crtc->dev); - if (!state) - return -enomem; - - blob = drm_property_create_blob(dev, - sizeof(struct drm_color_lut) * size, - null); - if (is_err(blob)) { - ret = ptr_err(blob); - blob = null; - goto fail; - } - - /* prepare gamma_lut with the legacy values. */ - blob_data = blob->data; - for (i = 0; i < size; i++) { - blob_data[i].red = red[i]; - blob_data[i].green = green[i]; - blob_data[i].blue = blue[i]; - } - - state->acquire_ctx = ctx; - crtc_state = drm_atomic_get_crtc_state(state, crtc); - if (is_err(crtc_state)) { - ret = ptr_err(crtc_state); - goto fail; - } - - /* reset degamma_lut and ctm properties. */ - replaced = drm_property_replace_blob(&crtc_state->degamma_lut, null); - replaced |= drm_property_replace_blob(&crtc_state->ctm, null); - replaced |= drm_property_replace_blob(&crtc_state->gamma_lut, blob); - crtc_state->color_mgmt_changed |= replaced; - - ret = drm_atomic_commit(state); - -fail: - drm_atomic_state_put(state); - drm_property_blob_put(blob); - return ret; -} -export_symbol(drm_atomic_helper_legacy_gamma_set); - diff --git a/drivers/gpu/drm/drm_color_mgmt.c b/drivers/gpu/drm/drm_color_mgmt.c --- a/drivers/gpu/drm/drm_color_mgmt.c +++ b/drivers/gpu/drm/drm_color_mgmt.c +#include <drm/drm_atomic.h> - * drm_mode_crtc_set_gamma_size(). drivers which support both should use - * drm_atomic_helper_legacy_gamma_set() to alias the legacy gamma ramp with the - * "gamma_lut" property above. + * drm_mode_crtc_set_gamma_size(). the drm core will then alias the legacy gamma + * ramp with "gamma_lut". - * - * drivers should use drm_atomic_helper_legacy_gamma_set() to implement the - * legacy &drm_crtc_funcs.gamma_set callback. +/** + * drm_crtc_supports_legacy_gamma - does the crtc support legacy gamma correction table + * @crtc: crtc object + * + * returns true/false if the given crtc supports setting the legacy gamma + * correction table. + */ +static bool drm_crtc_supports_legacy_gamma(struct drm_crtc *crtc) +{ + u32 gamma_id = crtc->dev->mode_config.gamma_lut_property->base.id; + + if (!crtc->gamma_size) + return false; + + if (crtc->funcs->gamma_set) + return true; + + return !!drm_mode_obj_find_prop_id(&crtc->base, gamma_id); +} + +/** + * drm_crtc_legacy_gamma_set - set the legacy gamma correction table + * @crtc: crtc object + * @red: red correction table + * @green: green correction table + * @blue: green correction table + * @size: size of the tables + * @ctx: lock acquire context + * + * implements support for legacy gamma correction table for drivers + * that have set drm_crtc_funcs.gamma_set or that support color management + * through the degamma_lut/gamma_lut properties. see + * drm_crtc_enable_color_mgmt() and the containing chapter for + * how the atomic color management and gamma tables work. + * + * this function sets the gamma using drm_crtc_funcs.gamma_set if set, or + * alternatively using crtc color management properties. + */ +static int drm_crtc_legacy_gamma_set(struct drm_crtc *crtc, + u16 *red, u16 *green, u16 *blue, + u32 size, + struct drm_modeset_acquire_ctx *ctx) +{ + struct drm_device *dev = crtc->dev; + struct drm_atomic_state *state; + struct drm_crtc_state *crtc_state; + struct drm_property_blob *blob; + struct drm_color_lut *blob_data; + int i, ret = 0; + bool replaced; + + if (crtc->funcs->gamma_set) + return crtc->funcs->gamma_set(crtc, red, green, blue, size, ctx); + + state = drm_atomic_state_alloc(crtc->dev); + if (!state) + return -enomem; + + blob = drm_property_create_blob(dev, + sizeof(struct drm_color_lut) * size, + null); + if (is_err(blob)) { + ret = ptr_err(blob); + blob = null; + goto fail; + } + + /* prepare gamma_lut with the legacy values. */ + blob_data = blob->data; + for (i = 0; i < size; i++) { + blob_data[i].red = red[i]; + blob_data[i].green = green[i]; + blob_data[i].blue = blue[i]; + } + + state->acquire_ctx = ctx; + crtc_state = drm_atomic_get_crtc_state(state, crtc); + if (is_err(crtc_state)) { + ret = ptr_err(crtc_state); + goto fail; + } + + /* set gamma_lut and reset degamma_lut and ctm */ + replaced = drm_property_replace_blob(&crtc_state->degamma_lut, null); + replaced |= drm_property_replace_blob(&crtc_state->ctm, null); + replaced |= drm_property_replace_blob(&crtc_state->gamma_lut, blob); + crtc_state->color_mgmt_changed |= replaced; + + ret = drm_atomic_commit(state); + +fail: + drm_atomic_state_put(state); + drm_property_blob_put(blob); + return ret; +} + - if (crtc->funcs->gamma_set == null) + if (!drm_crtc_supports_legacy_gamma(crtc)) - ret = crtc->funcs->gamma_set(crtc, r_base, g_base, b_base, - crtc->gamma_size, &ctx); + ret = drm_crtc_legacy_gamma_set(crtc, r_base, g_base, b_base, + crtc->gamma_size, &ctx); diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c - .gamma_set = drm_atomic_helper_legacy_gamma_set, \ diff --git a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c --- a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c +++ b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c - - .gamma_set = drm_atomic_helper_legacy_gamma_set, diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c - .gamma_set = drm_atomic_helper_legacy_gamma_set, diff --git a/drivers/gpu/drm/nouveau/dispnv50/head.c b/drivers/gpu/drm/nouveau/dispnv50/head.c --- a/drivers/gpu/drm/nouveau/dispnv50/head.c +++ b/drivers/gpu/drm/nouveau/dispnv50/head.c - .gamma_set = drm_atomic_helper_legacy_gamma_set, - .gamma_set = drm_atomic_helper_legacy_gamma_set, diff --git a/drivers/gpu/drm/omapdrm/omap_crtc.c b/drivers/gpu/drm/omapdrm/omap_crtc.c --- a/drivers/gpu/drm/omapdrm/omap_crtc.c +++ b/drivers/gpu/drm/omapdrm/omap_crtc.c - .gamma_set = drm_atomic_helper_legacy_gamma_set, diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c --- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c - .gamma_set = drm_atomic_helper_legacy_gamma_set, diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c - .gamma_set = drm_atomic_helper_legacy_gamma_set, diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c --- a/drivers/gpu/drm/stm/ltdc.c +++ b/drivers/gpu/drm/stm/ltdc.c - .gamma_set = drm_atomic_helper_legacy_gamma_set, diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c --- a/drivers/gpu/drm/vc4/vc4_crtc.c +++ b/drivers/gpu/drm/vc4/vc4_crtc.c - .gamma_set = drm_atomic_helper_legacy_gamma_set, diff --git a/drivers/gpu/drm/vc4/vc4_txp.c b/drivers/gpu/drm/vc4/vc4_txp.c --- a/drivers/gpu/drm/vc4/vc4_txp.c +++ b/drivers/gpu/drm/vc4/vc4_txp.c - .gamma_set = drm_atomic_helper_legacy_gamma_set, diff --git a/include/drm/drm_atomic_helper.h b/include/drm/drm_atomic_helper.h --- a/include/drm/drm_atomic_helper.h +++ b/include/drm/drm_atomic_helper.h -int drm_atomic_helper_legacy_gamma_set(struct drm_crtc *crtc, - u16 *red, u16 *green, u16 *blue, - uint32_t size, - struct drm_modeset_acquire_ctx *ctx);
|
Graphics
|
6ca2ab8086af8434a4c0990882321a345c3cc2c6
|
tomi valkeinen
|
drivers
|
gpu
|
amd, amdgpu_dm, arm, armada, ast, atmel-hlcdc, display, dispnv50, drm, i915, ingenic, komeda, mediatek, nouveau, omapdrm, rcar-du, rockchip, stm, vc4
|
drm: add legacy support for using degamma for gamma
|
the drm core handles legacy gamma-set ioctl by setting gamma_lut and clearing ctm and degamma_lut.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
automatic legacy gamma support
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['drm']
|
['c']
| 2
| 23
| 4
|
--- diff --git a/drivers/gpu/drm/drm_color_mgmt.c b/drivers/gpu/drm/drm_color_mgmt.c --- a/drivers/gpu/drm/drm_color_mgmt.c +++ b/drivers/gpu/drm/drm_color_mgmt.c - * ramp with "gamma_lut". + * ramp with "gamma_lut" or, if that is unavailable, "degamma_lut". + u32 degamma_id = crtc->dev->mode_config.degamma_lut_property->base.id; - return !!drm_mode_obj_find_prop_id(&crtc->base, gamma_id); + return !!(drm_mode_obj_find_prop_id(&crtc->base, gamma_id) || + drm_mode_obj_find_prop_id(&crtc->base, degamma_id)); + u32 gamma_id = dev->mode_config.gamma_lut_property->base.id; + u32 degamma_id = dev->mode_config.degamma_lut_property->base.id; + bool use_gamma_lut; + if (drm_mode_obj_find_prop_id(&crtc->base, gamma_id)) + use_gamma_lut = true; + else if (drm_mode_obj_find_prop_id(&crtc->base, degamma_id)) + use_gamma_lut = false; + else + return -enodev; + - replaced = drm_property_replace_blob(&crtc_state->degamma_lut, null); + replaced = drm_property_replace_blob(&crtc_state->degamma_lut, + use_gamma_lut ? null : blob); - replaced |= drm_property_replace_blob(&crtc_state->gamma_lut, blob); + replaced |= drm_property_replace_blob(&crtc_state->gamma_lut, + use_gamma_lut ? blob : null); diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c --- a/drivers/gpu/drm/drm_fb_helper.c +++ b/drivers/gpu/drm/drm_fb_helper.c + /* + * fixme: this always uses gamma_lut. some hw have only + * degamma_lut, in which case we should reset gamma_lut and set + * degamma_lut. see drm_crtc_legacy_gamma_set(). + */
|
Graphics
|
1b8977434606f2dcd8a90ca660eb535b56945662
|
tomi valkeinen
|
drivers
|
gpu
|
drm
|
drm/bridge: display-connector: add dp support
|
add dp support to display-connector driver. the driver will support hpd via a gpio and dp pwr.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add displayport connector
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['drm']
|
['c']
| 1
| 44
| 2
|
--- diff --git a/drivers/gpu/drm/bridge/display-connector.c b/drivers/gpu/drm/bridge/display-connector.c --- a/drivers/gpu/drm/bridge/display-connector.c +++ b/drivers/gpu/drm/bridge/display-connector.c +#include <linux/regulator/consumer.h> + + struct regulator *dp_pwr; - * get the hpd gpio for dvi and hdmi connectors. if the gpio can provide + * get the hpd gpio for dvi, hdmi and dp connectors. if the gpio can provide - type == drm_mode_connector_hdmia) { + type == drm_mode_connector_hdmia || + type == drm_mode_connector_displayport) { + /* get the dp pwr for dp connector. */ + if (type == drm_mode_connector_displayport) { + int ret; + + conn->dp_pwr = devm_regulator_get_optional(&pdev->dev, "dp-pwr"); + + if (is_err(conn->dp_pwr)) { + ret = ptr_err(conn->dp_pwr); + + switch (ret) { + case -enodev: + conn->dp_pwr = null; + break; + + case -eprobe_defer: + return -eprobe_defer; + + default: + dev_err(&pdev->dev, "failed to get dp pwr regulator: %d ", ret); + return ret; + } + } + + if (conn->dp_pwr) { + ret = regulator_enable(conn->dp_pwr); + if (ret) { + dev_err(&pdev->dev, "failed to enable dp pwr regulator: %d ", ret); + return ret; + } + } + } + + if (conn->dp_pwr) + regulator_disable(conn->dp_pwr); + + }, { + .compatible = "dp-connector", + .data = (void *)drm_mode_connector_displayport,
|
Graphics
|
2e2bf3a5584de24fa7b5dd2dbd702385f14aee26
|
tomi valkeinen
|
drivers
|
gpu
|
bridge, drm
|
acpi: platform: add platform profile support
|
this is the initial implementation of the platform-profile feature. it provides the details discussed and outlined in the sysfs-platform_profile document.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
in modern systems the platform performance, temperature, fan and other hardware related characteristics are often dynamically configurable with one of several 'platform-profiles', with either a bias towards low-power consumption or towards performance (and higher power consumption and thermals). this feature introduces a new
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
[]
|
['h', 'kconfig', 'c', 'makefile']
| 4
| 238
| 0
|
--- diff --git a/drivers/acpi/kconfig b/drivers/acpi/kconfig --- a/drivers/acpi/kconfig +++ b/drivers/acpi/kconfig +config acpi_platform_profile + tristate "acpi platform profile driver" + default m + help + this driver adds support for platform-profiles on platforms that + support it. + + platform-profiles can be used to control the platform behaviour. for + example whether to operate in a lower power mode, in a higher + power performance mode or between the two. + + this driver provides the sysfs interface and is used as the registration + point for platform specific drivers. + + which profiles are supported is determined on a per-platform basis and + should be obtained from the platform specific driver. + diff --git a/drivers/acpi/makefile b/drivers/acpi/makefile --- a/drivers/acpi/makefile +++ b/drivers/acpi/makefile +obj-$(config_acpi_platform_profile) += platform_profile.o diff --git a/drivers/acpi/platform_profile.c b/drivers/acpi/platform_profile.c --- /dev/null +++ b/drivers/acpi/platform_profile.c +// spdx-license-identifier: gpl-2.0-or-later + +/* platform profile sysfs interface */ + +#include <linux/acpi.h> +#include <linux/bits.h> +#include <linux/init.h> +#include <linux/mutex.h> +#include <linux/platform_profile.h> +#include <linux/sysfs.h> + +static const struct platform_profile_handler *cur_profile; +static define_mutex(profile_lock); + +static const char * const profile_names[] = { + [platform_profile_low_power] = "low-power", + [platform_profile_cool] = "cool", + [platform_profile_quiet] = "quiet", + [platform_profile_balanced] = "balanced", + [platform_profile_performance] = "performance", +}; +static_assert(array_size(profile_names) == platform_profile_last); + +static ssize_t platform_profile_choices_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + int len = 0; + int err, i; + + err = mutex_lock_interruptible(&profile_lock); + if (err) + return err; + + if (!cur_profile) { + mutex_unlock(&profile_lock); + return -enodev; + } + + for_each_set_bit(i, cur_profile->choices, platform_profile_last) { + if (len == 0) + len += sysfs_emit_at(buf, len, "%s", profile_names[i]); + else + len += sysfs_emit_at(buf, len, " %s", profile_names[i]); + } + len += sysfs_emit_at(buf, len, " "); + mutex_unlock(&profile_lock); + return len; +} + +static ssize_t platform_profile_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + enum platform_profile_option profile = platform_profile_balanced; + int err; + + err = mutex_lock_interruptible(&profile_lock); + if (err) + return err; + + if (!cur_profile) { + mutex_unlock(&profile_lock); + return -enodev; + } + + err = cur_profile->profile_get(&profile); + mutex_unlock(&profile_lock); + if (err) + return err; + + /* check that profile is valid index */ + if (warn_on((profile < 0) || (profile >= array_size(profile_names)))) + return -eio; + + return sysfs_emit(buf, "%s ", profile_names[profile]); +} + +static ssize_t platform_profile_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + int err, i; + + err = mutex_lock_interruptible(&profile_lock); + if (err) + return err; + + if (!cur_profile) { + mutex_unlock(&profile_lock); + return -enodev; + } + + /* scan for a matching profile */ + i = sysfs_match_string(profile_names, buf); + if (i < 0) { + mutex_unlock(&profile_lock); + return -einval; + } + + /* check that platform supports this profile choice */ + if (!test_bit(i, cur_profile->choices)) { + mutex_unlock(&profile_lock); + return -eopnotsupp; + } + + err = cur_profile->profile_set(i); + mutex_unlock(&profile_lock); + if (err) + return err; + return count; +} + +static device_attr_ro(platform_profile_choices); +static device_attr_rw(platform_profile); + +static struct attribute *platform_profile_attrs[] = { + &dev_attr_platform_profile_choices.attr, + &dev_attr_platform_profile.attr, + null +}; + +static const struct attribute_group platform_profile_group = { + .attrs = platform_profile_attrs +}; + +void platform_profile_notify(void) +{ + if (!cur_profile) + return; + sysfs_notify(acpi_kobj, null, "platform_profile"); +} +export_symbol_gpl(platform_profile_notify); + +int platform_profile_register(const struct platform_profile_handler *pprof) +{ + int err; + + mutex_lock(&profile_lock); + /* we can only have one active profile */ + if (cur_profile) { + mutex_unlock(&profile_lock); + return -eexist; + } + + /* sanity check the profile handler field are set */ + if (!pprof || bitmap_empty(pprof->choices, platform_profile_last) || + !pprof->profile_set || !pprof->profile_get) { + mutex_unlock(&profile_lock); + return -einval; + } + + err = sysfs_create_group(acpi_kobj, &platform_profile_group); + if (err) { + mutex_unlock(&profile_lock); + return err; + } + + cur_profile = pprof; + mutex_unlock(&profile_lock); + return 0; +} +export_symbol_gpl(platform_profile_register); + +int platform_profile_remove(void) +{ + mutex_lock(&profile_lock); + if (!cur_profile) { + mutex_unlock(&profile_lock); + return -enodev; + } + + sysfs_remove_group(acpi_kobj, &platform_profile_group); + cur_profile = null; + mutex_unlock(&profile_lock); + return 0; +} +export_symbol_gpl(platform_profile_remove); + +module_author("mark pearson <markpearson@lenovo.com>"); +module_license("gpl"); diff --git a/include/linux/platform_profile.h b/include/linux/platform_profile.h --- /dev/null +++ b/include/linux/platform_profile.h +/* spdx-license-identifier: gpl-2.0-or-later */ +/* + * platform profile sysfs interface + * + * see documentation/abi/testing/sysfs-platform_profile.rst for more + * information. + */ + +#ifndef _platform_profile_h_ +#define _platform_profile_h_ + +#include <linux/bitops.h> + +/* + * if more options are added please update profile_names + * array in platform-profile.c and sysfs-platform-profile.rst + * documentation. + */ + +enum platform_profile_option { + platform_profile_low_power, + platform_profile_cool, + platform_profile_quiet, + platform_profile_balanced, + platform_profile_performance, + platform_profile_last, /*must always be last */ +}; + +struct platform_profile_handler { + unsigned long choices[bits_to_longs(platform_profile_last)]; + int (*profile_get)(enum platform_profile_option *profile); + int (*profile_set)(enum platform_profile_option profile); +}; + +int platform_profile_register(const struct platform_profile_handler *pprof); +int platform_profile_remove(void); +void platform_profile_notify(void); + +#endif /*_platform_profile_h_*/
|
Power Management
|
a2ff95e018f1d2bc816f3078d5110a655e355f18
|
mark pearson
|
drivers
|
acpi
| |
documentation: add documentation for new platform_profile sysfs attribute
|
on modern systems the platform performance, temperature, fan and other hardware related characteristics are often dynamically configurable. the profile is often automatically adjusted to the load by some automatic-mechanism (which may very well live outside the kernel).
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
in modern systems the platform performance, temperature, fan and other hardware related characteristics are often dynamically configurable with one of several 'platform-profiles', with either a bias towards low-power consumption or towards performance (and higher power consumption and thermals). this feature introduces a new
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
[]
|
['sysfs-platform_profile', 'rst']
| 3
| 67
| 0
|
--- diff --git a/documentation/abi/testing/sysfs-platform_profile b/documentation/abi/testing/sysfs-platform_profile --- /dev/null +++ b/documentation/abi/testing/sysfs-platform_profile +what: /sys/firmware/acpi/platform_profile_choices +date: october 2020 +contact: hans de goede <hdegoede@redhat.com> +description: this file contains a space-separated list of profiles supported for this device. + + drivers must use the following standard profile-names: + + ============ ============================================ + low-power low power consumption + cool cooler operation + quiet quieter operation + balanced balance between low power consumption and performance + performance high performance operation + ============ ============================================ + + userspace may expect drivers to offer more than one of these + standard profile names. + +what: /sys/firmware/acpi/platform_profile +date: october 2020 +contact: hans de goede <hdegoede@redhat.com> +description: reading this file gives the current selected profile for this + device. writing this file with one of the strings from + platform_profile_choices changes the profile to the new value. diff --git a/documentation/userspace-api/index.rst b/documentation/userspace-api/index.rst --- a/documentation/userspace-api/index.rst +++ b/documentation/userspace-api/index.rst + sysfs-platform_profile diff --git a/documentation/userspace-api/sysfs-platform_profile.rst b/documentation/userspace-api/sysfs-platform_profile.rst --- /dev/null +++ b/documentation/userspace-api/sysfs-platform_profile.rst +===================================================================== +platform profile selection (e.g. /sys/firmware/acpi/platform_profile) +===================================================================== + +on modern systems the platform performance, temperature, fan and other +hardware related characteristics are often dynamically configurable. the +platform configuration is often automatically adjusted to the current +conditions by some automatic mechanism (which may very well live outside +the kernel). + +these auto platform adjustment mechanisms often can be configured with +one of several platform profiles, with either a bias towards low power +operation or towards performance. + +the purpose of the platform_profile attribute is to offer a generic sysfs +api for selecting the platform profile of these automatic mechanisms. + +note that this api is only for selecting the platform profile, it is +not a goal of this api to allow monitoring the resulting performance +characteristics. monitoring performance is best done with device/vendor +specific tools such as e.g. turbostat. + +specifically when selecting a high performance profile the actual achieved +performance may be limited by various factors such as: the heat generated +by other components, room temperature, free air flow at the bottom of a +laptop, etc. it is explicitly not a goal of this api to let userspace know +about any sub-optimal conditions which are impeding reaching the requested +performance level. + +since numbers on their own cannot represent the multiple variables that a +profile will adjust (power consumption, heat generation, etc) this api +uses strings to describe the various profiles. to make sure that userspace +gets a consistent experience the sysfs-platform_profile abi document defines +a fixed set of profile names. drivers *must* map their internal profile +representation onto this fixed set. + +if there is no good match when mapping then a new profile name may be +added. drivers which wish to introduce new profile names must: + + 1. explain why the existing profile names canot be used. + 2. add the new profile name, along with a clear description of the + expected behaviour, to the sysfs-platform_profile abi documentation.
|
Power Management
|
8e0cbf356377fabac47a027dd176cd1cacc5fc01
|
mark pearson
|
documentation
|
userspace-api
|
testing
|
acpi: tables: introduce support for fpdt table
|
acpi firmware performance data table (fpdt) provides information about firmware performance during system boot, s3 suspend and s3 resume.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
introduce support for firmware performance data table (fpdt), which provides information about firmware performance during system boot, s3 suspend and s3 resume in
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['acpi']
|
['kconfig', 'sysfs-firmware-acpi', 'c', 'makefile']
| 4
| 316
| 0
|
--- diff --git a/documentation/abi/testing/sysfs-firmware-acpi b/documentation/abi/testing/sysfs-firmware-acpi --- a/documentation/abi/testing/sysfs-firmware-acpi +++ b/documentation/abi/testing/sysfs-firmware-acpi +what: /sys/firmware/acpi/fpdt/ +date: jan 2021 +contact: zhang rui <rui.zhang@intel.com> +description: + acpi firmware performance data table (fpdt) provides + information for firmware performance data for system boot, + s3 suspend and s3 resume. this sysfs entry contains the + performance data retrieved from the fpdt. + + boot: + firmware_start_ns: timer value logged at the beginning + of firmware image execution. in nanoseconds. + bootloader_load_ns: timer value logged just prior to + loading the os boot loader into memory. + in nanoseconds. + bootloader_launch_ns: timer value logged just prior to + launching the currently loaded os boot loader + image. in nanoseconds. + exitbootservice_start_ns: timer value logged at the + point when the os loader calls the + exitbootservices function for uefi compatible + firmware. in nanoseconds. + exitbootservice_end_ns: timer value logged at the point + just prior to the os loader gaining control + back from the exitbootservices function for + uefi compatible firmware. in nanoseconds. + suspend: + suspend_start_ns: timer value recorded at the previous + os write to slp_typ upon entry to s3. in + nanoseconds. + suspend_end_ns: timer value recorded at the previous + firmware write to slp_typ used to trigger + hardware entry to s3. in nanoseconds. + resume: + resume_count: a count of the number of s3 resume cycles + since the last full boot sequence. + resume_avg_ns: average timer value of all resume cycles + logged since the last full boot sequence, + including the most recent resume. in nanoseconds. + resume_prev_ns: timer recorded at the end of the previous + platform runtime firmware s3 resume, just prior to + handoff to the os waking vector. in nanoseconds. + diff --git a/drivers/acpi/kconfig b/drivers/acpi/kconfig --- a/drivers/acpi/kconfig +++ b/drivers/acpi/kconfig +config acpi_fpdt + bool "acpi firmware performance data table (fpdt) support" + depends on x86_64 + help + enable support for the firmware performance data table (fpdt). + this table provides information on the timing of the system + boot, s3 suspend and s3 resume firmware code paths. + diff --git a/drivers/acpi/makefile b/drivers/acpi/makefile --- a/drivers/acpi/makefile +++ b/drivers/acpi/makefile +acpi-$(config_acpi_fpdt) += acpi_fpdt.o diff --git a/drivers/acpi/acpi_fpdt.c b/drivers/acpi/acpi_fpdt.c --- /dev/null +++ b/drivers/acpi/acpi_fpdt.c +// spdx-license-identifier: gpl-2.0-only + +/* + * fpdt support for exporting boot and suspend/resume performance data + * + * copyright (c) 2021 intel corporation. all rights reserved. + */ + +#define pr_fmt(fmt) "acpi fpdt: " fmt + +#include <linux/acpi.h> + +/* + * fpdt contains acpi table header and a number of fpdt_subtable_entries. + * each fpdt_subtable_entry points to a subtable: fbpt or s3pt. + * each fpdt subtable (fbpt/s3pt) is composed of a fpdt_subtable_header + * and a number of fpdt performance records. + * each fpdt performance record is composed of a fpdt_record_header and + * performance data fields, for boot or suspend or resume phase. + */ +enum fpdt_subtable_type { + subtable_fbpt, + subtable_s3pt, +}; + +struct fpdt_subtable_entry { + u16 type; /* refer to enum fpdt_subtable_type */ + u8 length; + u8 revision; + u32 reserved; + u64 address; /* physical address of the s3pt/fbpt table */ +}; + +struct fpdt_subtable_header { + u32 signature; + u32 length; +}; + +enum fpdt_record_type { + record_s3_resume, + record_s3_suspend, + record_boot, +}; + +struct fpdt_record_header { + u16 type; /* refer to enum fpdt_record_type */ + u8 length; + u8 revision; +}; + +struct resume_performance_record { + struct fpdt_record_header header; + u32 resume_count; + u64 resume_prev; + u64 resume_avg; +} __attribute__((packed)); + +struct boot_performance_record { + struct fpdt_record_header header; + u32 reserved; + u64 firmware_start; + u64 bootloader_load; + u64 bootloader_launch; + u64 exitbootservice_start; + u64 exitbootservice_end; +} __attribute__((packed)); + +struct suspend_performance_record { + struct fpdt_record_header header; + u64 suspend_start; + u64 suspend_end; +} __attribute__((packed)); + + +static struct resume_performance_record *record_resume; +static struct suspend_performance_record *record_suspend; +static struct boot_performance_record *record_boot; + +#define fpdt_attr(phase, name) \ +static ssize_t name##_show(struct kobject *kobj, \ + struct kobj_attribute *attr, char *buf) \ +{ \ + return sprintf(buf, "%llu ", record_##phase->name); \ +} \ +static struct kobj_attribute name##_attr = \ +__attr(name##_ns, 0444, name##_show, null) + +fpdt_attr(resume, resume_prev); +fpdt_attr(resume, resume_avg); +fpdt_attr(suspend, suspend_start); +fpdt_attr(suspend, suspend_end); +fpdt_attr(boot, firmware_start); +fpdt_attr(boot, bootloader_load); +fpdt_attr(boot, bootloader_launch); +fpdt_attr(boot, exitbootservice_start); +fpdt_attr(boot, exitbootservice_end); + +static ssize_t resume_count_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + return sprintf(buf, "%u ", record_resume->resume_count); +} + +static struct kobj_attribute resume_count_attr = +__attr_ro(resume_count); + +static struct attribute *resume_attrs[] = { + &resume_count_attr.attr, + &resume_prev_attr.attr, + &resume_avg_attr.attr, + null +}; + +static const struct attribute_group resume_attr_group = { + .attrs = resume_attrs, + .name = "resume", +}; + +static struct attribute *suspend_attrs[] = { + &suspend_start_attr.attr, + &suspend_end_attr.attr, + null +}; + +static const struct attribute_group suspend_attr_group = { + .attrs = suspend_attrs, + .name = "suspend", +}; + +static struct attribute *boot_attrs[] = { + &firmware_start_attr.attr, + &bootloader_load_attr.attr, + &bootloader_launch_attr.attr, + &exitbootservice_start_attr.attr, + &exitbootservice_end_attr.attr, + null +}; + +static const struct attribute_group boot_attr_group = { + .attrs = boot_attrs, + .name = "boot", +}; + +static struct kobject *fpdt_kobj; + +static int fpdt_process_subtable(u64 address, u32 subtable_type) +{ + struct fpdt_subtable_header *subtable_header; + struct fpdt_record_header *record_header; + char *signature = (subtable_type == subtable_fbpt ? "fbpt" : "s3pt"); + u32 length, offset; + int result; + + subtable_header = acpi_os_map_memory(address, sizeof(*subtable_header)); + if (!subtable_header) + return -enomem; + + if (strncmp((char *)&subtable_header->signature, signature, 4)) { + pr_info(fw_bug "subtable signature and type mismatch! "); + return -einval; + } + + length = subtable_header->length; + acpi_os_unmap_memory(subtable_header, sizeof(*subtable_header)); + + subtable_header = acpi_os_map_memory(address, length); + if (!subtable_header) + return -enomem; + + offset = sizeof(*subtable_header); + while (offset < length) { + record_header = (void *)subtable_header + offset; + offset += record_header->length; + + switch (record_header->type) { + case record_s3_resume: + if (subtable_type != subtable_s3pt) { + pr_err(fw_bug "invalid record %d for subtable %s ", + record_header->type, signature); + return -einval; + } + if (record_resume) { + pr_err("duplicate resume performance record found. "); + continue; + } + record_resume = (struct resume_performance_record *)record_header; + result = sysfs_create_group(fpdt_kobj, &resume_attr_group); + if (result) + return result; + break; + case record_s3_suspend: + if (subtable_type != subtable_s3pt) { + pr_err(fw_bug "invalid %d for subtable %s ", + record_header->type, signature); + continue; + } + if (record_suspend) { + pr_err("duplicate suspend performance record found. "); + continue; + } + record_suspend = (struct suspend_performance_record *)record_header; + result = sysfs_create_group(fpdt_kobj, &suspend_attr_group); + if (result) + return result; + break; + case record_boot: + if (subtable_type != subtable_fbpt) { + pr_err(fw_bug "invalid %d for subtable %s ", + record_header->type, signature); + return -einval; + } + if (record_boot) { + pr_err("duplicate boot performance record found. "); + continue; + } + record_boot = (struct boot_performance_record *)record_header; + result = sysfs_create_group(fpdt_kobj, &boot_attr_group); + if (result) + return result; + break; + + default: + pr_err(fw_bug "invalid record %d found. ", record_header->type); + return -einval; + } + } + return 0; +} + +static int __init acpi_init_fpdt(void) +{ + acpi_status status; + struct acpi_table_header *header; + struct fpdt_subtable_entry *subtable; + u32 offset = sizeof(*header); + + status = acpi_get_table(acpi_sig_fpdt, 0, &header); + + if (acpi_failure(status)) + return 0; + + fpdt_kobj = kobject_create_and_add("fpdt", acpi_kobj); + if (!fpdt_kobj) + return -enomem; + + while (offset < header->length) { + subtable = (void *)header + offset; + switch (subtable->type) { + case subtable_fbpt: + case subtable_s3pt: + fpdt_process_subtable(subtable->address, + subtable->type); + break; + default: + pr_info(fw_bug "invalid subtable type %d found. ", + subtable->type); + break; + } + offset += sizeof(*subtable); + } + return 0; +} + +fs_initcall(acpi_init_fpdt);
|
Power Management
|
d1eb86e59be09c12447fcb959783cbc70a9bec01
|
zhang rui
|
drivers
|
acpi
|
testing
|
pm: clk: make pm clock layer compatible with clocks that must sleep
|
the clock api splits its interface into sleepable ant atomic contexts:
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
make pm clock layer compatible with clocks that must sleep
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['clk']
|
['h', 'c']
| 4
| 228
| 42
|
- clk_prepare/clk_unprepare for stuff that might sleep - clk_enable_clk_disable for anything that may be done in atomic context --- diff --git a/drivers/base/power/clock_ops.c b/drivers/base/power/clock_ops.c --- a/drivers/base/power/clock_ops.c +++ b/drivers/base/power/clock_ops.c + pce_status_prepared, + bool enabled_when_prepared; +/** + * pm_clk_list_lock - ensure exclusive access for modifying the pm clock + * entry list. + * @psd: pm_subsys_data instance corresponding to the pm clock entry list + * and clk_op_might_sleep count to be modified. + * + * get exclusive access before modifying the pm clock entry list and the + * clock_op_might_sleep count to guard against concurrent modifications. + * this also protects against a concurrent clock_op_might_sleep and pm clock + * entry list usage in pm_clk_suspend()/pm_clk_resume() that may or may not + * happen in atomic context, hence both the mutex and the spinlock must be + * taken here. + */ +static void pm_clk_list_lock(struct pm_subsys_data *psd) + __acquires(&psd->lock) +{ + mutex_lock(&psd->clock_mutex); + spin_lock_irq(&psd->lock); +} + +/** + * pm_clk_list_unlock - counterpart to pm_clk_list_lock(). + * @psd: the same pm_subsys_data instance previously passed to + * pm_clk_list_lock(). + */ +static void pm_clk_list_unlock(struct pm_subsys_data *psd) + __releases(&psd->lock) +{ + spin_unlock_irq(&psd->lock); + mutex_unlock(&psd->clock_mutex); +} + +/** + * pm_clk_op_lock - ensure exclusive access for performing clock operations. + * @psd: pm_subsys_data instance corresponding to the pm clock entry list + * and clk_op_might_sleep count being used. + * @flags: stored irq flags. + * @fn: string for the caller function's name. + * + * this is used by pm_clk_suspend() and pm_clk_resume() to guard + * against concurrent modifications to the clock entry list and the + * clock_op_might_sleep count. if clock_op_might_sleep is != 0 then + * only the mutex can be locked and those functions can only be used in + * non atomic context. if clock_op_might_sleep == 0 then these functions + * may be used in any context and only the spinlock can be locked. + * returns -einval if called in atomic context when clock ops might sleep. + */ +static int pm_clk_op_lock(struct pm_subsys_data *psd, unsigned long *flags, + const char *fn) + /* sparse annotations don't work here as exit state isn't static */ +{ + bool atomic_context = in_atomic() || irqs_disabled(); + +try_again: + spin_lock_irqsave(&psd->lock, *flags); + if (!psd->clock_op_might_sleep) { + /* the __release is there to work around sparse limitations */ + __release(&psd->lock); + return 0; + } + + /* bail out if in atomic context */ + if (atomic_context) { + pr_err("%s: atomic context with clock_ops_might_sleep = %d", + fn, psd->clock_op_might_sleep); + spin_unlock_irqrestore(&psd->lock, *flags); + might_sleep(); + return -eperm; + } + + /* we must switch to the mutex */ + spin_unlock_irqrestore(&psd->lock, *flags); + mutex_lock(&psd->clock_mutex); + + /* + * there was a possibility for psd->clock_op_might_sleep + * to become 0 above. keep the mutex only if not the case. + */ + if (likely(psd->clock_op_might_sleep)) + return 0; + + mutex_unlock(&psd->clock_mutex); + goto try_again; +} + +/** + * pm_clk_op_unlock - counterpart to pm_clk_op_lock(). + * @psd: the same pm_subsys_data instance previously passed to + * pm_clk_op_lock(). + * @flags: irq flags provided by pm_clk_op_lock(). + */ +static void pm_clk_op_unlock(struct pm_subsys_data *psd, unsigned long *flags) + /* sparse annotations don't work here as entry state isn't static */ +{ + if (psd->clock_op_might_sleep) { + mutex_unlock(&psd->clock_mutex); + } else { + /* the __acquire is there to work around sparse limitations */ + __acquire(&psd->lock); + spin_unlock_irqrestore(&psd->lock, *flags); + } +} + - if (ce->status < pce_status_error) { + switch (ce->status) { + case pce_status_acquired: + ret = clk_prepare_enable(ce->clk); + break; + case pce_status_prepared: - if (!ret) - ce->status = pce_status_enabled; - else - dev_err(dev, "%s: failed to enable clk %p, error %d ", - __func__, ce->clk, ret); + break; + default: + return; + if (!ret) + ce->status = pce_status_enabled; + else + dev_err(dev, "%s: failed to enable clk %p, error %d ", + __func__, ce->clk, ret); + return; + } else if (clk_is_enabled_when_prepared(ce->clk)) { + /* we defer preparing the clock in that case */ + ce->status = pce_status_acquired; + ce->enabled_when_prepared = true; + } else if (clk_prepare(ce->clk)) { + ce->status = pce_status_error; + dev_err(dev, "clk_prepare() failed "); + return; - if (clk_prepare(ce->clk)) { - ce->status = pce_status_error; - dev_err(dev, "clk_prepare() failed "); - } else { - ce->status = pce_status_acquired; - dev_dbg(dev, - "clock %pc con_id %s managed by runtime pm. ", - ce->clk, ce->con_id); - } + ce->status = pce_status_prepared; + dev_dbg(dev, "clock %pc con_id %s managed by runtime pm. ", + ce->clk, ce->con_id); - spin_lock_irq(&psd->lock); + pm_clk_list_lock(psd); - spin_unlock_irq(&psd->lock); + if (ce->enabled_when_prepared) + psd->clock_op_might_sleep++; + pm_clk_list_unlock(psd); - if (ce->status < pce_status_error) { - if (ce->status == pce_status_enabled) - clk_disable(ce->clk); - - if (ce->status >= pce_status_acquired) { - clk_unprepare(ce->clk); + switch (ce->status) { + case pce_status_enabled: + clk_disable(ce->clk); + fallthrough; + case pce_status_prepared: + clk_unprepare(ce->clk); + fallthrough; + case pce_status_acquired: + case pce_status_error: + if (!is_err(ce->clk)) - } + break; + default: + break; - spin_lock_irq(&psd->lock); + pm_clk_list_lock(psd); - spin_unlock_irq(&psd->lock); + pm_clk_list_unlock(psd); - spin_unlock_irq(&psd->lock); + if (ce->enabled_when_prepared) + psd->clock_op_might_sleep--; + pm_clk_list_unlock(psd); - spin_lock_irq(&psd->lock); + pm_clk_list_lock(psd); - spin_unlock_irq(&psd->lock); + pm_clk_list_unlock(psd); - spin_unlock_irq(&psd->lock); + if (ce->enabled_when_prepared) + psd->clock_op_might_sleep--; + pm_clk_list_unlock(psd); - * object. + * object, set the count of clocks that might sleep to 0. - if (psd) + if (psd) { + mutex_init(&psd->clock_mutex); + psd->clock_op_might_sleep = 0; + } - spin_lock_irq(&psd->lock); + pm_clk_list_lock(psd); + psd->clock_op_might_sleep = 0; - spin_unlock_irq(&psd->lock); + pm_clk_list_unlock(psd); + int ret; - spin_lock_irqsave(&psd->lock, flags); + ret = pm_clk_op_lock(psd, &flags, __func__); + if (ret) + return ret; - if (ce->status < pce_status_error) { - if (ce->status == pce_status_enabled) + if (ce->status == pce_status_enabled) { + if (ce->enabled_when_prepared) { + clk_disable_unprepare(ce->clk); + ce->status = pce_status_acquired; + } else { - ce->status = pce_status_acquired; + ce->status = pce_status_prepared; + } - spin_unlock_irqrestore(&psd->lock, flags); + pm_clk_op_unlock(psd, &flags); + int ret; - spin_lock_irqsave(&psd->lock, flags); + ret = pm_clk_op_lock(psd, &flags, __func__); + if (ret) + return ret; - spin_unlock_irqrestore(&psd->lock, flags); + pm_clk_op_unlock(psd, &flags); diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c +/** + * clk_is_enabled_when_prepared - indicate if preparing a clock also enables it. + * @clk: clock source + * + * returns true if clk_prepare() implicitly enables the clock, effectively + * making clk_enable()/clk_disable() no-ops, false otherwise. + * + * this is of interest mainly to power management code where actually + * disabling the clock also requires unpreparing it to have any material + * effect. + * + * regardless of the value returned here, the caller must always invoke + * clk_enable() or clk_prepare_enable() and counterparts for usage counts + * to be right. + */ +bool clk_is_enabled_when_prepared(struct clk *clk) +{ + return clk && !(clk->core->ops->enable && clk->core->ops->disable); +} +export_symbol_gpl(clk_is_enabled_when_prepared); + diff --git a/include/linux/clk.h b/include/linux/clk.h --- a/include/linux/clk.h +++ b/include/linux/clk.h +#ifdef config_have_clk_prepare -#ifdef config_have_clk_prepare + +/** + * clk_is_enabled_when_prepared - indicate if preparing a clock also enables it. + * @clk: clock source + * + * returns true if clk_prepare() implicitly enables the clock, effectively + * making clk_enable()/clk_disable() no-ops, false otherwise. + * + * this is of interest mainly to the power management code where actually + * disabling the clock also requires unpreparing it to have any material + * effect. + * + * regardless of the value returned here, the caller must always invoke + * clk_enable() or clk_prepare_enable() and counterparts for usage counts + * to be right. + */ +bool clk_is_enabled_when_prepared(struct clk *clk); + +static inline bool clk_is_enabled_when_prepared(struct clk *clk) +{ + return false; +} diff --git a/include/linux/pm.h b/include/linux/pm.h --- a/include/linux/pm.h +++ b/include/linux/pm.h + unsigned int clock_op_might_sleep; + struct mutex clock_mutex;
|
Power Management
|
0bfa0820c274b019583b3454c6c889c99c24558d
|
nicolas pitre
|
include
|
linux
|
power
|
pm: domains: add "performance" column to debug summary
|
add "performance" column to debug summary which shows performance state of all power domains and theirs devices.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add "performance" column to debug summary
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['domains']
|
['c']
| 1
| 15
| 4
|
--- diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c --- a/drivers/base/power/domain.c +++ b/drivers/base/power/domain.c - seq_puts(s, p); + seq_printf(s, "%-25s ", p); +} + +static void perf_status_str(struct seq_file *s, struct device *dev) +{ + struct generic_pm_domain_data *gpd_data; + + gpd_data = to_gpd_data(dev->power.subsys_data->domain_data); + seq_put_decimal_ull(s, "", gpd_data->performance_state); - seq_printf(s, "%-30s %-15s ", genpd->name, state); + seq_printf(s, "%-30s %-50s %u", genpd->name, state, genpd->performance_state); + if (list_is_first(&link->parent_node, &genpd->parent_links)) + seq_printf(s, " %48s", " "); + perf_status_str(s, pm_data->dev); - seq_puts(s, "domain status children "); + seq_puts(s, "domain status children performance "); - seq_puts(s, "---------------------------------------------------------------------- "); + seq_puts(s, "---------------------------------------------------------------------------------------------- ");
|
Power Management
|
45fbc464b047b3fbd760c9cb460a50a1ef2cf933
|
dmitry osipenko ulf hansson ulf hansson linaro org viresh kumar viresh kumar linaro org peter geis pgwipeout gmail com nicolas chauvet kwizart gmail com matt merhar mattmerhar protonmail com
|
drivers
|
base
|
power
|
pm: domains: inform pm domain of a device's next wakeup
|
some devices may have a predictable interrupt pattern while executing usecases. an example would be the vsync interrupt associated with display devices. a 60 hz display could cause a interrupt every 16 ms. if the device were in a pm domain, the domain would need to be powered up for device to resume and handle the interrupt.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
better domain idle from device wakeup patterns
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
[]
|
['h', 'c']
| 2
| 36
| 0
|
--- diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c --- a/drivers/base/power/domain.c +++ b/drivers/base/power/domain.c +/** + * dev_pm_genpd_set_next_wakeup - notify pm framework of an impending wakeup. + * + * @dev: device to handle + * @next: impending interrupt/wakeup for the device + * + * + * allow devices to inform of the next wakeup. it's assumed that the users + * guarantee that the genpd wouldn't be detached while this routine is getting + * called. additionally, it's also assumed that @dev isn't runtime suspended + * (rpm_suspended)." + * although devices are expected to update the next_wakeup after the end of + * their usecase as well, it is possible the devices themselves may not know + * about that, so stale @next will be ignored when powering off the domain. + */ +void dev_pm_genpd_set_next_wakeup(struct device *dev, ktime_t next) +{ + struct generic_pm_domain_data *gpd_data; + struct generic_pm_domain *genpd; + + genpd = dev_to_genpd_safe(dev); + if (!genpd) + return; + + gpd_data = to_gpd_data(dev->power.subsys_data->domain_data); + gpd_data->next_wakeup = next; +} +export_symbol_gpl(dev_pm_genpd_set_next_wakeup); + + gpd_data->next_wakeup = ktime_max; diff --git a/include/linux/pm_domain.h b/include/linux/pm_domain.h --- a/include/linux/pm_domain.h +++ b/include/linux/pm_domain.h +#include <linux/ktime.h> + ktime_t next_wakeup; +void dev_pm_genpd_set_next_wakeup(struct device *dev, ktime_t next); +static inline void dev_pm_genpd_set_next_wakeup(struct device *dev, ktime_t next) +{ } +
|
Power Management
|
67e3242ee28052daa90e1fa193efc601939fde58
|
lina iyer
|
include
|
linux
|
power
|
pm: domains: use device's next wakeup to determine domain idle state
|
currently, a pm domain's idle state is determined based on whether the qos requirements are met. however, even entering an idle state may waste power if the minimum residency requirements aren't fulfilled.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
better domain idle from device wakeup patterns
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
[]
|
['h', 'c']
| 2
| 99
| 9
|
--- diff --git a/drivers/base/power/domain_governor.c b/drivers/base/power/domain_governor.c --- a/drivers/base/power/domain_governor.c +++ b/drivers/base/power/domain_governor.c +static void update_domain_next_wakeup(struct generic_pm_domain *genpd, ktime_t now) +{ + ktime_t domain_wakeup = ktime_max; + ktime_t next_wakeup; + struct pm_domain_data *pdd; + struct gpd_link *link; + + if (!(genpd->flags & genpd_flag_min_residency)) + return; + + /* + * devices that have a predictable wakeup pattern, may specify + * their next wakeup. let's find the next wakeup from all the + * devices attached to this domain and from all the sub-domains. + * it is possible that component's a next wakeup may have become + * stale when we read that here. we will ignore to ensure the domain + * is able to enter its optimal idle state. + */ + list_for_each_entry(pdd, &genpd->dev_list, list_node) { + next_wakeup = to_gpd_data(pdd)->next_wakeup; + if (next_wakeup != ktime_max && !ktime_before(next_wakeup, now)) + if (ktime_before(next_wakeup, domain_wakeup)) + domain_wakeup = next_wakeup; + } + + list_for_each_entry(link, &genpd->parent_links, parent_node) { + next_wakeup = link->child->next_wakeup; + if (next_wakeup != ktime_max && !ktime_before(next_wakeup, now)) + if (ktime_before(next_wakeup, domain_wakeup)) + domain_wakeup = next_wakeup; + } + + genpd->next_wakeup = domain_wakeup; +} + +static bool next_wakeup_allows_state(struct generic_pm_domain *genpd, + unsigned int state, ktime_t now) +{ + ktime_t domain_wakeup = genpd->next_wakeup; + s64 idle_time_ns, min_sleep_ns; + + min_sleep_ns = genpd->states[state].power_off_latency_ns + + genpd->states[state].residency_ns; + + idle_time_ns = ktime_to_ns(ktime_sub(domain_wakeup, now)); + + return idle_time_ns >= min_sleep_ns; +} + - * default_power_down_ok - default generic pm domain power off governor routine. + * _default_power_down_ok - default generic pm domain power off governor routine. -static bool default_power_down_ok(struct dev_pm_domain *pd) +static bool _default_power_down_ok(struct dev_pm_domain *pd, ktime_t now) + int state_idx = genpd->state_count - 1; + /* + * find the next wakeup from devices that can determine their own wakeup + * to find when the domain would wakeup and do it for every device down + * the hierarchy. it is not worth while to sleep if the state's residency + * cannot be met. + */ + update_domain_next_wakeup(genpd, now); + if ((genpd->flags & genpd_flag_min_residency) && (genpd->next_wakeup != ktime_max)) { + /* let's find out the deepest domain idle state, the devices prefer */ + while (state_idx >= 0) { + if (next_wakeup_allows_state(genpd, state_idx, now)) { + genpd->max_off_time_changed = true; + break; + } + state_idx--; + } + + if (state_idx < 0) { + state_idx = 0; + genpd->cached_power_down_ok = false; + goto done; + } + } + - genpd->state_idx = genpd->state_count - 1; - /* find a state to power down to, starting from the deepest. */ - while (!__default_power_down_ok(pd, genpd->state_idx)) { - if (genpd->state_idx == 0) { + /* + * find a state to power down to, starting from the state + * determined by the next wakeup. + */ + while (!__default_power_down_ok(pd, state_idx)) { + if (state_idx == 0) { - genpd->state_idx--; + state_idx--; +done: + genpd->state_idx = state_idx; +static bool default_power_down_ok(struct dev_pm_domain *pd) +{ + return _default_power_down_ok(pd, ktime_get()); +} + + ktime_t now = ktime_get(); - if (!default_power_down_ok(pd)) + if (!_default_power_down_ok(pd, now)) - idle_duration_ns = ktime_to_ns(ktime_sub(domain_wakeup, ktime_get())); + idle_duration_ns = ktime_to_ns(ktime_sub(domain_wakeup, now)); diff --git a/include/linux/pm_domain.h b/include/linux/pm_domain.h --- a/include/linux/pm_domain.h +++ b/include/linux/pm_domain.h + * + * genpd_flag_min_residency: enable the genpd governor to consider its + * components' next wakeup when determining the + * optimal idle state. +#define genpd_flag_min_residency (1u << 6) + ktime_t next_wakeup; /* maintained by the domain governor */
|
Power Management
|
c79aa080fb0f60a0e24c87014dc9c2f373e1379b
|
lina iyer
|
include
|
linux
|
power
|
cpupower: update msr_pstate union struct naming
|
the msr_pstate union struct named fam17h_bits is misleading since this is the struct to use for all families >= 0x17, not just for family 0x17. rename the bits structs to be 'pstate' (for pre family 17h cpus) and 'pstatedef' (for cpus since fam 17h) to align closer with ppr/bdkg (1) naming.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
support amd family 0x19
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['cpupower']
|
['c']
| 1
| 14
| 12
|
--- diff --git a/tools/power/cpupower/utils/helpers/amd.c b/tools/power/cpupower/utils/helpers/amd.c --- a/tools/power/cpupower/utils/helpers/amd.c +++ b/tools/power/cpupower/utils/helpers/amd.c -union msr_pstate { +union core_pstate { + /* pre fam 17h: */ - } bits; + } pstate; + /* since fam 17h: */ - } fam17h_bits; + } pstatedef; -static int get_did(int family, union msr_pstate pstate) +static int get_did(int family, union core_pstate pstate) - t = pstate.fam17h_bits.did; + t = pstate.pstatedef.did; - t = pstate.bits.did; + t = pstate.pstate.did; -static int get_cof(int family, union msr_pstate pstate) +static int get_cof(int family, union core_pstate pstate) - fid = pstate.fam17h_bits.fid; + fid = pstate.pstatedef.fid; - fid = pstate.bits.fid; + fid = pstate.pstate.fid; - union msr_pstate pstate; + union core_pstate pstate; - if ((cpu_family == 0x17) && (!pstate.fam17h_bits.en)) + if ((cpu_family == 0x17) && (!pstate.pstatedef.en)) - else if (!pstate.bits.en) + else if (!pstate.pstate.en)
|
Power Management
|
629d512d682de2259179046e2364f1f1ff4232e3
|
nathan fontenot
|
tools
|
power
|
cpupower, helpers, utils
|
cpupower: correct macro name for cpb caps flag
|
the name is core performance boost (cpb) for the cpuid flag. correct cpuid caps flag to use this name (instead of cbp).
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
support amd family 0x19
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['cpupower']
|
['h', 'c']
| 3
| 3
| 3
|
--- diff --git a/tools/power/cpupower/utils/helpers/cpuid.c b/tools/power/cpupower/utils/helpers/cpuid.c --- a/tools/power/cpupower/utils/helpers/cpuid.c +++ b/tools/power/cpupower/utils/helpers/cpuid.c - cpu_info->caps |= cpupower_cap_amd_cbp; + cpu_info->caps |= cpupower_cap_amd_cpb; diff --git a/tools/power/cpupower/utils/helpers/helpers.h b/tools/power/cpupower/utils/helpers/helpers.h --- a/tools/power/cpupower/utils/helpers/helpers.h +++ b/tools/power/cpupower/utils/helpers/helpers.h -#define cpupower_cap_amd_cbp 0x00000004 +#define cpupower_cap_amd_cpb 0x00000004 diff --git a/tools/power/cpupower/utils/helpers/misc.c b/tools/power/cpupower/utils/helpers/misc.c --- a/tools/power/cpupower/utils/helpers/misc.c +++ b/tools/power/cpupower/utils/helpers/misc.c - if (cpupower_cpu_info.caps & cpupower_cap_amd_cbp) { + if (cpupower_cpu_info.caps & cpupower_cap_amd_cpb) {
|
Power Management
|
7a136a8fcd7ef14c63d07667e81c4dcac77e0a13
|
robert richter
|
tools
|
power
|
cpupower, helpers, utils
|
cpupower: add cpupower_cap_amd_hw_pstate cpuid caps flag
|
add a check in get_cpu_info() for the ability to read frequencies from hardware and set the cpupower_cap_amd_hw_pstate cpuid flag. the cpuid flag is set when cpuid_80000007_edx[7] is set, which is all families >= 10h. the check excludes family 14h because hw pstate reporting was not implemented on family 14h.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
support amd family 0x19
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['cpupower']
|
['h', 'c']
| 3
| 14
| 8
|
--- diff --git a/tools/power/cpupower/utils/helpers/amd.c b/tools/power/cpupower/utils/helpers/amd.c --- a/tools/power/cpupower/utils/helpers/amd.c +++ b/tools/power/cpupower/utils/helpers/amd.c - /* only read out frequencies from hw when cpu might be boostable - to keep the code as short and clean as possible. - otherwise frequencies are exported via acpi tables. - */ - if (cpu_family < 0x10 || cpu_family == 0x14) + /* only read out frequencies from hw if hw pstate is supported, + * otherwise frequencies are exported via acpi tables. + */ + if (!(cpupower_cpu_info.caps & cpupower_cap_amd_hw_pstate)) diff --git a/tools/power/cpupower/utils/helpers/cpuid.c b/tools/power/cpupower/utils/helpers/cpuid.c --- a/tools/power/cpupower/utils/helpers/cpuid.c +++ b/tools/power/cpupower/utils/helpers/cpuid.c - if (ext_cpuid_level >= 0x80000007 && - (cpuid_edx(0x80000007) & (1 << 9))) - cpu_info->caps |= cpupower_cap_amd_cpb; + if (ext_cpuid_level >= 0x80000007) { + if (cpuid_edx(0x80000007) & (1 << 9)) + cpu_info->caps |= cpupower_cap_amd_cpb; + + if ((cpuid_edx(0x80000007) & (1 << 7)) && + cpu_info->family != 0x14) + /* hw pstate was not implemented in family 0x14 */ + cpu_info->caps |= cpupower_cap_amd_hw_pstate; + } diff --git a/tools/power/cpupower/utils/helpers/helpers.h b/tools/power/cpupower/utils/helpers/helpers.h --- a/tools/power/cpupower/utils/helpers/helpers.h +++ b/tools/power/cpupower/utils/helpers/helpers.h +#define cpupower_cap_amd_hw_pstate 0x00000100
|
Power Management
|
a0255a76bf3a78d322adfe4eb4e73eb83998f61a
|
nathan fontenot
|
tools
|
power
|
cpupower, helpers, utils
|
cpupower: remove unused pscur variable.
|
the pscur variable is set but not uused, just remove it.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
support amd family 0x19
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['cpupower']
|
['c']
| 1
| 1
| 8
|
--- diff --git a/tools/power/cpupower/utils/helpers/amd.c b/tools/power/cpupower/utils/helpers/amd.c --- a/tools/power/cpupower/utils/helpers/amd.c +++ b/tools/power/cpupower/utils/helpers/amd.c - int i, psmax, pscur; + int i, psmax; - - if (read_msr(cpu, msr_amd_pstate_status, &val)) - return -1; - - pscur = val & 0x7; - - pscur += boost_states;
|
Power Management
|
1421de7919cd082bad692626937f055f367586ba
|
nathan fontenot
|
tools
|
power
|
cpupower, helpers, utils
|
cpupower: update family checks when decoding hw pstates
|
the family checks in get_cof() and get_did() need to use the correct msr format depending on the family. add a cpupower capability for using the pstatedef (family 17h and newer) to control this instead of direct family checks.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
support amd family 0x19
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['cpupower']
|
['h', 'c']
| 3
| 10
| 5
|
--- diff --git a/tools/power/cpupower/utils/helpers/amd.c b/tools/power/cpupower/utils/helpers/amd.c --- a/tools/power/cpupower/utils/helpers/amd.c +++ b/tools/power/cpupower/utils/helpers/amd.c - if (family == 0x12) - t = pstate.val & 0xf; - else if (family == 0x17 || family == 0x18) + if (cpupower_cpu_info.caps & cpupower_cap_amd_pstatedef) + else if (family == 0x12) + t = pstate.val & 0xf; - if (family == 0x17 || family == 0x18) { + if (cpupower_cpu_info.caps & cpupower_cap_amd_pstatedef) { diff --git a/tools/power/cpupower/utils/helpers/cpuid.c b/tools/power/cpupower/utils/helpers/cpuid.c --- a/tools/power/cpupower/utils/helpers/cpuid.c +++ b/tools/power/cpupower/utils/helpers/cpuid.c - cpu_info->family != 0x14) + cpu_info->family != 0x14) { + + if (cpu_info->family >= 0x17) + cpu_info->caps |= cpupower_cap_amd_pstatedef; + } diff --git a/tools/power/cpupower/utils/helpers/helpers.h b/tools/power/cpupower/utils/helpers/helpers.h --- a/tools/power/cpupower/utils/helpers/helpers.h +++ b/tools/power/cpupower/utils/helpers/helpers.h +#define cpupower_cap_amd_pstatedef 0x00000200
|
Power Management
|
23765b82a808da416b70b41d711468e723531e6a
|
nathan fontenot robert richter rrichter amd com
|
tools
|
power
|
cpupower, helpers, utils
|
cpupower: condense pstate enabled bit checks in decode_pstates()
|
the enabled bit (bit 63) is common for all families so we can remove the multiple enabled checks based on family and have a common check for hw pstate enabled.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
support amd family 0x19
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['cpupower']
|
['c']
| 1
| 3
| 3
|
--- diff --git a/tools/power/cpupower/utils/helpers/amd.c b/tools/power/cpupower/utils/helpers/amd.c --- a/tools/power/cpupower/utils/helpers/amd.c +++ b/tools/power/cpupower/utils/helpers/amd.c - if ((cpu_family == 0x17) && (!pstate.pstatedef.en)) - continue; - else if (!pstate.pstate.en) + + /* the enabled bit (bit 63) is common for all families */ + if (!pstate.pstatedef.en)
|
Power Management
|
56a85eebebdba62ebf6c46bd957949cc6e926aa0
|
nathan fontenot robert richter rrichter amd com
|
tools
|
power
|
cpupower, helpers, utils
|
cpupower: remove family arg to decode_pstates()
|
the decode_pstates() routine no longer uses the cpu family and the caleed routines (get_cof() and get_did()) can grab the family from the global cpupower_cpu_info struct. these update removes passing the family arg to all these routines.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
support amd family 0x19
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['cpupower']
|
['h', 'c']
| 3
| 14
| 17
|
--- diff --git a/tools/power/cpupower/utils/cpufreq-info.c b/tools/power/cpupower/utils/cpufreq-info.c --- a/tools/power/cpupower/utils/cpufreq-info.c +++ b/tools/power/cpupower/utils/cpufreq-info.c - ret = decode_pstates(cpu, cpupower_cpu_info.family, b_states, - pstates, &pstate_no); + ret = decode_pstates(cpu, b_states, pstates, &pstate_no); diff --git a/tools/power/cpupower/utils/helpers/amd.c b/tools/power/cpupower/utils/helpers/amd.c --- a/tools/power/cpupower/utils/helpers/amd.c +++ b/tools/power/cpupower/utils/helpers/amd.c -static int get_did(int family, union core_pstate pstate) +static int get_did(union core_pstate pstate) - else if (family == 0x12) + else if (cpupower_cpu_info.family == 0x12) -static int get_cof(int family, union core_pstate pstate) +static int get_cof(union core_pstate pstate) - did = get_did(family, pstate); + did = get_did(pstate); - if (family == 0x11) + if (cpupower_cpu_info.family == 0x11) - * cpu_family -> the cpu's family (0x10, 0x12,...) - * boots_states -> how much boost states the machines support + * boost_states -> how much boost states the machines support -int decode_pstates(unsigned int cpu, unsigned int cpu_family, - int boost_states, unsigned long *pstates, int *no) +int decode_pstates(unsigned int cpu, int boost_states, + unsigned long *pstates, int *no) - pstates[i] = get_cof(cpu_family, pstate); + pstates[i] = get_cof(pstate); diff --git a/tools/power/cpupower/utils/helpers/helpers.h b/tools/power/cpupower/utils/helpers/helpers.h --- a/tools/power/cpupower/utils/helpers/helpers.h +++ b/tools/power/cpupower/utils/helpers/helpers.h -extern int decode_pstates(unsigned int cpu, unsigned int cpu_family, - int boost_states, unsigned long *pstates, int *no); +extern int decode_pstates(unsigned int cpu, int boost_states, + unsigned long *pstates, int *no); -static inline int decode_pstates(unsigned int cpu, unsigned int cpu_family, - int boost_states, unsigned long *pstates, - int *no) +static inline int decode_pstates(unsigned int cpu, int boost_states, + unsigned long *pstates, int *no)
|
Power Management
|
d1abc4e996d7784ce4d56749e4b5ca8ff23b1e0f
|
nathan fontenot robert richter rrichter amd com
|
tools
|
power
|
cpupower, helpers, utils
|
cpupower: add cpuid cap flag for msr_amd_hwcr support
|
remove the family check for accessing the msr_amd_hwcr msr and replace it with a cpupower cap flag.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
support amd family 0x19
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['cpupower']
|
['h', 'c']
| 3
| 7
| 7
|
--- diff --git a/tools/power/cpupower/utils/helpers/cpuid.c b/tools/power/cpupower/utils/helpers/cpuid.c --- a/tools/power/cpupower/utils/helpers/cpuid.c +++ b/tools/power/cpupower/utils/helpers/cpuid.c - if (cpuid_edx(0x80000007) & (1 << 9)) + if (cpuid_edx(0x80000007) & (1 << 9)) { + if (cpu_info->family >= 0x17) + cpu_info->caps |= cpupower_cap_amd_cpb_msr; + } + diff --git a/tools/power/cpupower/utils/helpers/helpers.h b/tools/power/cpupower/utils/helpers/helpers.h --- a/tools/power/cpupower/utils/helpers/helpers.h +++ b/tools/power/cpupower/utils/helpers/helpers.h +#define cpupower_cap_amd_cpb_msr 0x00000400 diff --git a/tools/power/cpupower/utils/helpers/misc.c b/tools/power/cpupower/utils/helpers/misc.c --- a/tools/power/cpupower/utils/helpers/misc.c +++ b/tools/power/cpupower/utils/helpers/misc.c - struct cpupower_cpu_info cpu_info; - ret = get_cpu_info(&cpu_info); - if (ret) - return ret; - - if (cpu_info.family == 0x17 || cpu_info.family == 0x18) { + if (cpupower_cpu_info.caps & cpupower_cap_amd_cpb_msr) {
|
Power Management
|
3a3ecfdb605cc8d98988012a4f88c34b4d220c21
|
nathan fontenot
|
tools
|
power
|
cpupower, helpers, utils
|
opp: add function to look up required opp's for a given opp
|
add a function that allows looking up required opps given a source opp table, destination opp table and the source opp.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add required-opps support to devfreq passive gov
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
[]
|
['h', 'c']
| 2
| 62
| 0
|
--- diff --git a/drivers/opp/core.c b/drivers/opp/core.c --- a/drivers/opp/core.c +++ b/drivers/opp/core.c +/** + * dev_pm_opp_xlate_required_opp() - find required opp for @src_table opp. + * @src_table: opp table which has @dst_table as one of its required opp table. + * @dst_table: required opp table of the @src_table. + * @src_opp: opp from the @src_table. + * + * this function returns the opp (present in @dst_table) pointed out by the + * "required-opps" property of the @src_opp (present in @src_table). + * + * the callers are required to call dev_pm_opp_put() for the returned opp after + * use. + * + * return: pointer to 'struct dev_pm_opp' on success and errorno otherwise. + */ +struct dev_pm_opp *dev_pm_opp_xlate_required_opp(struct opp_table *src_table, + struct opp_table *dst_table, + struct dev_pm_opp *src_opp) +{ + struct dev_pm_opp *opp, *dest_opp = err_ptr(-enodev); + int i; + + if (!src_table || !dst_table || !src_opp || + !src_table->required_opp_tables) + return err_ptr(-einval); + + /* required-opps not fully initialized yet */ + if (lazy_linking_pending(src_table)) + return err_ptr(-ebusy); + + for (i = 0; i < src_table->required_opp_count; i++) { + if (src_table->required_opp_tables[i] == dst_table) { + mutex_lock(&src_table->lock); + + list_for_each_entry(opp, &src_table->opp_list, node) { + if (opp == src_opp) { + dest_opp = opp->required_opps[i]; + dev_pm_opp_get(dest_opp); + break; + } + } + + mutex_unlock(&src_table->lock); + break; + } + } + + if (is_err(dest_opp)) { + pr_err("%s: couldn't find matching opp (%p: %p) ", __func__, + src_table, dst_table); + } + + return dest_opp; +} +export_symbol_gpl(dev_pm_opp_xlate_required_opp); + diff --git a/include/linux/pm_opp.h b/include/linux/pm_opp.h --- a/include/linux/pm_opp.h +++ b/include/linux/pm_opp.h +struct dev_pm_opp *dev_pm_opp_xlate_required_opp(struct opp_table *src_table, struct opp_table *dst_table, struct dev_pm_opp *src_opp); +static inline struct dev_pm_opp *dev_pm_opp_xlate_required_opp(struct opp_table *src_table, + struct opp_table *dst_table, struct dev_pm_opp *src_opp) +{ + return err_ptr(-eopnotsupp); +} +
|
Power Management
|
7d8658ef65a4f891d0cff6340fa717b378384642
|
saravana kannan
|
include
|
linux
| |
pm / devfreq: cache opp table reference in devfreq
|
the opp table can be used often in devfreq. trying to get it each time can be expensive, so cache it in the devfreq struct.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add required-opps support to devfreq passive gov
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
[]
|
['h', 'c']
| 2
| 9
| 0
|
--- diff --git a/drivers/devfreq/devfreq.c b/drivers/devfreq/devfreq.c --- a/drivers/devfreq/devfreq.c +++ b/drivers/devfreq/devfreq.c + if (devfreq->opp_table) + dev_pm_opp_put_opp_table(devfreq->opp_table); + + devfreq->opp_table = dev_pm_opp_get_opp_table(dev); + if (is_err(devfreq->opp_table)) + devfreq->opp_table = null; + diff --git a/include/linux/devfreq.h b/include/linux/devfreq.h --- a/include/linux/devfreq.h +++ b/include/linux/devfreq.h + * @opp_table: reference to opp table of dev.parent, if one exists. + struct opp_table *opp_table;
|
Power Management
|
26f9c7cc42a6dc036edf871544fd0e6b3a0601c1
|
saravana kannan myungjoo ham myungjoo ham samsung com chanwoo choi cw choi samsung com
|
include
|
linux
| |
pm / devfreq: add required opps support to passive governor
|
look at the required opps of the "parent" device to determine the opp that is required from the slave device managed by the passive governor. this allows having mappings between a parent device and a slave device even when they don't have the same number of opps.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add required-opps support to devfreq passive gov
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
[]
|
['c']
| 1
| 25
| 19
|
--- diff --git a/drivers/devfreq/governor_passive.c b/drivers/devfreq/governor_passive.c --- a/drivers/devfreq/governor_passive.c +++ b/drivers/devfreq/governor_passive.c - struct dev_pm_opp *opp; - int i, count, ret = 0; + struct dev_pm_opp *opp, *p_opp; + int i, count; - if (p_data->get_target_freq) { - ret = p_data->get_target_freq(devfreq, freq); - goto out; - } + if (p_data->get_target_freq) + return p_data->get_target_freq(devfreq, freq); - opp = devfreq_recommended_opp(parent_devfreq->dev.parent, freq, 0); - if (is_err(opp)) { - ret = ptr_err(opp); - goto out; - } + if (devfreq->opp_table && parent_devfreq->opp_table) { + p_opp = devfreq_recommended_opp(parent_devfreq->dev.parent, + freq, 0); + if (is_err(p_opp)) + return ptr_err(p_opp); + + opp = dev_pm_opp_xlate_required_opp(parent_devfreq->opp_table, + devfreq->opp_table, p_opp); + dev_pm_opp_put(p_opp); - dev_pm_opp_put(opp); + if (is_err(opp)) + return ptr_err(opp); + + *freq = dev_pm_opp_get_freq(opp); + dev_pm_opp_put(opp); + + return 0; + } - * get the opp table's index of decided freqeuncy by governor + * get the opp table's index of decided frequency by governor - if (i == parent_devfreq->profile->max_state) { - ret = -einval; - goto out; - } + if (i == parent_devfreq->profile->max_state) + return -einval; -out: - return ret; + return 0;
|
Power Management
|
86ad9a24f21ea7aac7deed06fe9556392568d88a
|
saravana kannan
|
drivers
|
devfreq
| |
units: add watt units
|
as there are the temperature units, let's add the watt macros definition.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add the dtpm (dynamic thermal power management) framework. it allows to allocate a power budget to the different components where the resulting heating effect will comply with the skin temperature constraint
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['(featured) dtpm']
|
['h']
| 1
| 4
| 0
|
--- diff --git a/include/linux/units.h b/include/linux/units.h --- a/include/linux/units.h +++ b/include/linux/units.h +#define milliwatt_per_watt 1000l +#define microwatt_per_milliwatt 1000l +#define microwatt_per_watt 1000000l +
|
Power Management
|
2ee5f8f05949735fa2f4c463a5e13fcb3660c719
|
daniel lezcano lukasz luba lukasz luba arm com
|
include
|
linux
| |
documentation/powercap/dtpm: add documentation for dtpm
|
the dynamic thermal and power management is a technique to dynamically adjust the power consumption of different devices in order to ensure a global thermal constraint.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add the dtpm (dynamic thermal power management) framework. it allows to allocate a power budget to the different components where the resulting heating effect will comply with the skin temperature constraint
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['(featured) dtpm']
|
['rst']
| 2
| 213
| 0
|
--- diff --git a/documentation/power/index.rst b/documentation/power/index.rst --- a/documentation/power/index.rst +++ b/documentation/power/index.rst + powercap/dtpm diff --git a/documentation/power/powercap/dtpm.rst b/documentation/power/powercap/dtpm.rst --- /dev/null +++ b/documentation/power/powercap/dtpm.rst +.. spdx-license-identifier: gpl-2.0 + +========================================== +dynamic thermal power management framework +========================================== + +on the embedded world, the complexity of the soc leads to an +increasing number of hotspots which need to be monitored and mitigated +as a whole in order to prevent the temperature to go above the +normative and legally stated 'skin temperature'. + +another aspect is to sustain the performance for a given power budget, +for example virtual reality where the user can feel dizziness if the +performance is capped while a big cpu is processing something else. or +reduce the battery charging because the dissipated power is too high +compared with the power consumed by other devices. + +the user space is the most adequate place to dynamically act on the +different devices by limiting their power given an application +profile: it has the knowledge of the platform. + +the dynamic thermal power management (dtpm) is a technique acting on +the device power by limiting and/or balancing a power budget among +different devices. + +the dtpm framework provides an unified interface to act on the +device power. + +overview +======== + +the dtpm framework relies on the powercap framework to create the +powercap entries in the sysfs directory and implement the backend +driver to do the connection with the power manageable device. + +the dtpm is a tree representation describing the power constraints +shared between devices, not their physical positions. + +the nodes of the tree are a virtual description aggregating the power +characteristics of the children nodes and their power limitations. + +the leaves of the tree are the real power manageable devices. + +for instance:: + + soc + | + '-- pkg + | + |-- pd0 (cpu0-3) + | + '-- pd1 (cpu4-5) + +the pkg power will be the sum of pd0 and pd1 power numbers:: + + soc (400mw - 3100mw) + | + '-- pkg (400mw - 3100mw) + | + |-- pd0 (100mw - 700mw) + | + '-- pd1 (300mw - 2400mw) + +when the nodes are inserted in the tree, their power characteristics are propagated to the parents:: + + soc (600mw - 5900mw) + | + |-- pkg (400mw - 3100mw) + | | + | |-- pd0 (100mw - 700mw) + | | + | '-- pd1 (300mw - 2400mw) + | + '-- pd2 (200mw - 2800mw) + +each node have a weight on a 2^10 basis reflecting the percentage of power consumption along the siblings:: + + soc (w=1024) + | + |-- pkg (w=538) + | | + | |-- pd0 (w=231) + | | + | '-- pd1 (w=794) + | + '-- pd2 (w=486) + + note the sum of weights at the same level are equal to 1024. + +when a power limitation is applied to a node, then it is distributed along the children given their weights. for example, if we set a power limitation of 3200mw at the 'soc' root node, the resulting tree will be:: + + soc (w=1024) <--- power_limit = 3200mw + | + |-- pkg (w=538) --> power_limit = 1681mw + | | + | |-- pd0 (w=231) --> power_limit = 378mw + | | + | '-- pd1 (w=794) --> power_limit = 1303mw + | + '-- pd2 (w=486) --> power_limit = 1519mw + + +flat description +---------------- + +a root node is created and it is the parent of all the nodes. this +description is the simplest one and it is supposed to give to user +space a flat representation of all the devices supporting the power +limitation without any power limitation distribution. + +hierarchical description +------------------------ + +the different devices supporting the power limitation are represented +hierarchically. there is one root node, all intermediate nodes are +grouping the child nodes which can be intermediate nodes also or real +devices. + +the intermediate nodes aggregate the power information and allows to +set the power limit given the weight of the nodes. + +user space api +============== + +as stated in the overview, the dtpm framework is built on top of the +powercap framework. thus the sysfs interface is the same, please refer +to the powercap documentation for further details. + + * power_uw: instantaneous power consumption. if the node is an + intermediate node, then the power consumption will be the sum of all + children power consumption. + + * max_power_range_uw: the power range resulting of the maximum power + minus the minimum power. + + * name: the name of the node. this is implementation dependent. even + if it is not recommended for the user space, several nodes can have + the same name. + + * constraint_x_name: the name of the constraint. + + * constraint_x_max_power_uw: the maximum power limit to be applicable + to the node. + + * constraint_x_power_limit_uw: the power limit to be applied to the + node. if the value contained in constraint_x_max_power_uw is set, + the constraint will be removed. + + * constraint_x_time_window_us: the meaning of this file will depend + on the constraint number. + +constraints +----------- + + * constraint 0: the power limitation is immediately applied, without + limitation in time. + +kernel api +========== + +overview +-------- + +the dtpm framework has no power limiting backend support. it is +generic and provides a set of api to let the different drivers to +implement the backend part for the power limitation and create the +power constraints tree. + +it is up to the platform to provide the initialization function to +allocate and link the different nodes of the tree. + +a special macro has the role of declaring a node and the corresponding +initialization function via a description structure. this one contains +an optional parent field allowing to hook different devices to an +already existing tree at boot time. + +for instance:: + + struct dtpm_descr my_descr = { + .name = "my_name", + .init = my_init_func, + }; + + dtpm_declare(my_descr); + +the nodes of the dtpm tree are described with dtpm structure. the +steps to add a new power limitable device is done in three steps: + + * allocate the dtpm node + * set the power number of the dtpm node + * register the dtpm node + +the registration of the dtpm node is done with the powercap +ops. basically, it must implements the callbacks to get and set the +power and the limit. + +alternatively, if the node to be inserted is an intermediate one, then +a simple function to insert it as a future parent is available. + +if a device has its power characteristics changing, then the tree must +be updated with the new power numbers and weights. + +nomenclature +------------ + + * dtpm_alloc() : allocate and initialize a dtpm structure + + * dtpm_register() : add the dtpm node to the tree + + * dtpm_unregister() : remove the dtpm node from the tree + + * dtpm_update_power() : update the power characteristics of the dtpm node
|
Power Management
|
f5ad1c747956d501516610ee7900f4a6d57ee2f5
|
daniel lezcano
|
documentation
|
power
|
powercap
|
powercap/drivers/dtpm: add api for dynamic thermal power management
|
on the embedded world, the complexity of the soc leads to an increasing number of hotspots which need to be monitored and mitigated as a whole in order to prevent the temperature to go above the normative and legally stated 'skin temperature'.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add the dtpm (dynamic thermal power management) framework. it allows to allocate a power budget to the different components where the resulting heating effect will comply with the skin temperature constraint
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['(featured) dtpm']
|
['h', 'kconfig', 'c', 'makefile']
| 5
| 566
| 0
|
--- diff --git a/drivers/powercap/kconfig b/drivers/powercap/kconfig --- a/drivers/powercap/kconfig +++ b/drivers/powercap/kconfig + +config dtpm + bool "power capping for dynamic thermal power management" + help + this enables support for the power capping for the dynamic + thermal power management userspace engine. diff --git a/drivers/powercap/makefile b/drivers/powercap/makefile --- a/drivers/powercap/makefile +++ b/drivers/powercap/makefile +obj-$(config_dtpm) += dtpm.o diff --git a/drivers/powercap/dtpm.c b/drivers/powercap/dtpm.c --- /dev/null +++ b/drivers/powercap/dtpm.c +// spdx-license-identifier: gpl-2.0-only +/* + * copyright 2020 linaro limited + * + * author: daniel lezcano <daniel.lezcano@linaro.org> + * + * the powercap based dynamic thermal power management framework + * provides to the userspace a consistent api to set the power limit + * on some devices. + * + * dtpm defines the functions to create a tree of constraints. each + * parent node is a virtual description of the aggregation of the + * children. it propagates the constraints set at its level to its + * children and collect the children power information. the leaves of + * the tree are the real devices which have the ability to get their + * current power consumption and set their power limit. + */ +#define pr_fmt(fmt) kbuild_modname ": " fmt + +#include <linux/dtpm.h> +#include <linux/init.h> +#include <linux/kernel.h> +#include <linux/powercap.h> +#include <linux/slab.h> +#include <linux/mutex.h> + +#define dtpm_power_limit_flag bit(0) + +static const char *constraint_name[] = { + "instantaneous", +}; + +static define_mutex(dtpm_lock); +static struct powercap_control_type *pct; +static struct dtpm *root; + +static int get_time_window_us(struct powercap_zone *pcz, int cid, u64 *window) +{ + return -enosys; +} + +static int set_time_window_us(struct powercap_zone *pcz, int cid, u64 window) +{ + return -enosys; +} + +static int get_max_power_range_uw(struct powercap_zone *pcz, u64 *max_power_uw) +{ + struct dtpm *dtpm = to_dtpm(pcz); + + mutex_lock(&dtpm_lock); + *max_power_uw = dtpm->power_max - dtpm->power_min; + mutex_unlock(&dtpm_lock); + + return 0; +} + +static int __get_power_uw(struct dtpm *dtpm, u64 *power_uw) +{ + struct dtpm *child; + u64 power; + int ret = 0; + + if (dtpm->ops) { + *power_uw = dtpm->ops->get_power_uw(dtpm); + return 0; + } + + *power_uw = 0; + + list_for_each_entry(child, &dtpm->children, sibling) { + ret = __get_power_uw(child, &power); + if (ret) + break; + *power_uw += power; + } + + return ret; +} + +static int get_power_uw(struct powercap_zone *pcz, u64 *power_uw) +{ + struct dtpm *dtpm = to_dtpm(pcz); + int ret; + + mutex_lock(&dtpm_lock); + ret = __get_power_uw(dtpm, power_uw); + mutex_unlock(&dtpm_lock); + + return ret; +} + +static void __dtpm_rebalance_weight(struct dtpm *dtpm) +{ + struct dtpm *child; + + list_for_each_entry(child, &dtpm->children, sibling) { + + pr_debug("setting weight '%d' for '%s' ", + child->weight, child->zone.name); + + child->weight = div_round_closest(child->power_max * 1024, + dtpm->power_max); + + __dtpm_rebalance_weight(child); + } +} + +static void __dtpm_sub_power(struct dtpm *dtpm) +{ + struct dtpm *parent = dtpm->parent; + + while (parent) { + parent->power_min -= dtpm->power_min; + parent->power_max -= dtpm->power_max; + parent->power_limit -= dtpm->power_limit; + parent = parent->parent; + } + + __dtpm_rebalance_weight(root); +} + +static void __dtpm_add_power(struct dtpm *dtpm) +{ + struct dtpm *parent = dtpm->parent; + + while (parent) { + parent->power_min += dtpm->power_min; + parent->power_max += dtpm->power_max; + parent->power_limit += dtpm->power_limit; + parent = parent->parent; + } + + __dtpm_rebalance_weight(root); +} + +/** + * dtpm_update_power - update the power on the dtpm + * @dtpm: a pointer to a dtpm structure to update + * @power_min: a u64 representing the new power_min value + * @power_max: a u64 representing the new power_max value + * + * function to update the power values of the dtpm node specified in + * parameter. these new values will be propagated to the tree. + * + * return: zero on success, -einval if the values are inconsistent + */ +int dtpm_update_power(struct dtpm *dtpm, u64 power_min, u64 power_max) +{ + mutex_lock(&dtpm_lock); + + if (power_min == dtpm->power_min && power_max == dtpm->power_max) + return 0; + + if (power_max < power_min) + return -einval; + + __dtpm_sub_power(dtpm); + + dtpm->power_min = power_min; + dtpm->power_max = power_max; + if (!test_bit(dtpm_power_limit_flag, &dtpm->flags)) + dtpm->power_limit = power_max; + + __dtpm_add_power(dtpm); + + mutex_unlock(&dtpm_lock); + + return 0; +} + +/** + * dtpm_release_zone - cleanup when the node is released + * @pcz: a pointer to a powercap_zone structure + * + * do some housecleaning and update the weight on the tree. the + * release will be denied if the node has children. this function must + * be called by the specific release callback of the different + * backends. + * + * return: 0 on success, -ebusy if there are children + */ +int dtpm_release_zone(struct powercap_zone *pcz) +{ + struct dtpm *dtpm = to_dtpm(pcz); + struct dtpm *parent = dtpm->parent; + + mutex_lock(&dtpm_lock); + + if (!list_empty(&dtpm->children)) + return -ebusy; + + if (parent) + list_del(&dtpm->sibling); + + __dtpm_sub_power(dtpm); + + mutex_unlock(&dtpm_lock); + + if (dtpm->ops) + dtpm->ops->release(dtpm); + + kfree(dtpm); + + return 0; +} + +static int __get_power_limit_uw(struct dtpm *dtpm, int cid, u64 *power_limit) +{ + *power_limit = dtpm->power_limit; + return 0; +} + +static int get_power_limit_uw(struct powercap_zone *pcz, + int cid, u64 *power_limit) +{ + struct dtpm *dtpm = to_dtpm(pcz); + int ret; + + mutex_lock(&dtpm_lock); + ret = __get_power_limit_uw(dtpm, cid, power_limit); + mutex_unlock(&dtpm_lock); + + return ret; +} + +/* + * set the power limit on the nodes, the power limit is distributed + * given the weight of the children. + * + * the dtpm node lock must be held when calling this function. + */ +static int __set_power_limit_uw(struct dtpm *dtpm, int cid, u64 power_limit) +{ + struct dtpm *child; + int ret = 0; + u64 power; + + /* + * a max power limitation means we remove the power limit, + * otherwise we set a constraint and flag the dtpm node. + */ + if (power_limit == dtpm->power_max) { + clear_bit(dtpm_power_limit_flag, &dtpm->flags); + } else { + set_bit(dtpm_power_limit_flag, &dtpm->flags); + } + + pr_debug("setting power limit for '%s': %llu uw ", + dtpm->zone.name, power_limit); + + /* + * only leaves of the dtpm tree has ops to get/set the power + */ + if (dtpm->ops) { + dtpm->power_limit = dtpm->ops->set_power_uw(dtpm, power_limit); + } else { + dtpm->power_limit = 0; + + list_for_each_entry(child, &dtpm->children, sibling) { + + /* + * integer division rounding will inevitably + * lead to a different min or max value when + * set several times. in order to restore the + * initial value, we force the child's min or + * max power every time if the constraint is + * at the boundaries. + */ + if (power_limit == dtpm->power_max) { + power = child->power_max; + } else if (power_limit == dtpm->power_min) { + power = child->power_min; + } else { + power = div_round_closest( + power_limit * child->weight, 1024); + } + + pr_debug("setting power limit for '%s': %llu uw ", + child->zone.name, power); + + ret = __set_power_limit_uw(child, cid, power); + if (!ret) + ret = __get_power_limit_uw(child, cid, &power); + + if (ret) + break; + + dtpm->power_limit += power; + } + } + + return ret; +} + +static int set_power_limit_uw(struct powercap_zone *pcz, + int cid, u64 power_limit) +{ + struct dtpm *dtpm = to_dtpm(pcz); + int ret; + + mutex_lock(&dtpm_lock); + + /* + * don't allow values outside of the power range previously + * set when initializing the power numbers. + */ + power_limit = clamp_val(power_limit, dtpm->power_min, dtpm->power_max); + + ret = __set_power_limit_uw(dtpm, cid, power_limit); + + pr_debug("%s: power limit: %llu uw, power max: %llu uw ", + dtpm->zone.name, dtpm->power_limit, dtpm->power_max); + + mutex_unlock(&dtpm_lock); + + return ret; +} + +static const char *get_constraint_name(struct powercap_zone *pcz, int cid) +{ + return constraint_name[cid]; +} + +static int get_max_power_uw(struct powercap_zone *pcz, int id, u64 *max_power) +{ + struct dtpm *dtpm = to_dtpm(pcz); + + mutex_lock(&dtpm_lock); + *max_power = dtpm->power_max; + mutex_unlock(&dtpm_lock); + + return 0; +} + +static struct powercap_zone_constraint_ops constraint_ops = { + .set_power_limit_uw = set_power_limit_uw, + .get_power_limit_uw = get_power_limit_uw, + .set_time_window_us = set_time_window_us, + .get_time_window_us = get_time_window_us, + .get_max_power_uw = get_max_power_uw, + .get_name = get_constraint_name, +}; + +static struct powercap_zone_ops zone_ops = { + .get_max_power_range_uw = get_max_power_range_uw, + .get_power_uw = get_power_uw, + .release = dtpm_release_zone, +}; + +/** + * dtpm_alloc - allocate and initialize a dtpm struct + * @name: a string specifying the name of the node + * + * return: a struct dtpm pointer, null in case of error + */ +struct dtpm *dtpm_alloc(struct dtpm_ops *ops) +{ + struct dtpm *dtpm; + + dtpm = kzalloc(sizeof(*dtpm), gfp_kernel); + if (dtpm) { + init_list_head(&dtpm->children); + init_list_head(&dtpm->sibling); + dtpm->weight = 1024; + dtpm->ops = ops; + } + + return dtpm; +} + +/** + * dtpm_unregister - unregister a dtpm node from the hierarchy tree + * @dtpm: a pointer to a dtpm structure corresponding to the node to be removed + * + * call the underlying powercap unregister function. that will call + * the release callback of the powercap zone. + */ +void dtpm_unregister(struct dtpm *dtpm) +{ + powercap_unregister_zone(pct, &dtpm->zone); + + pr_info("unregistered dtpm node '%s' ", dtpm->zone.name); +} + +/** + * dtpm_register - register a dtpm node in the hierarchy tree + * @name: a string specifying the name of the node + * @dtpm: a pointer to a dtpm structure corresponding to the new node + * @parent: a pointer to a dtpm structure corresponding to the parent node + * + * create a dtpm node in the tree. if no parent is specified, the node + * is the root node of the hierarchy. if the root node already exists, + * then the registration will fail. the powercap controller must be + * initialized before calling this function. + * + * the dtpm structure must be initialized with the power numbers + * before calling this function. + * + * return: zero on success, a negative value in case of error: + * -eagain: the function is called before the framework is initialized. + * -ebusy: the root node is already inserted + * -einval: * there is no root node yet and @parent is specified + * * no all ops are defined + * * parent have ops which are reserved for leaves + * other negative values are reported back from the powercap framework + */ +int dtpm_register(const char *name, struct dtpm *dtpm, struct dtpm *parent) +{ + struct powercap_zone *pcz; + + if (!pct) + return -eagain; + + if (root && !parent) + return -ebusy; + + if (!root && parent) + return -einval; + + if (parent && parent->ops) + return -einval; + + if (!dtpm) + return -einval; + + if (dtpm->ops && !(dtpm->ops->set_power_uw && + dtpm->ops->get_power_uw && + dtpm->ops->release)) + return -einval; + + pcz = powercap_register_zone(&dtpm->zone, pct, name, + parent ? &parent->zone : null, + &zone_ops, max_dtpm_constraints, + &constraint_ops); + if (is_err(pcz)) + return ptr_err(pcz); + + mutex_lock(&dtpm_lock); + + if (parent) { + list_add_tail(&dtpm->sibling, &parent->children); + dtpm->parent = parent; + } else { + root = dtpm; + } + + __dtpm_add_power(dtpm); + + pr_info("registered dtpm node '%s' / %llu-%llu uw, ", + dtpm->zone.name, dtpm->power_min, dtpm->power_max); + + mutex_unlock(&dtpm_lock); + + return 0; +} + +static int __init dtpm_init(void) +{ + struct dtpm_descr **dtpm_descr; + + pct = powercap_register_control_type(null, "dtpm", null); + if (!pct) { + pr_err("failed to register control type "); + return -einval; + } + + for_each_dtpm_table(dtpm_descr) + (*dtpm_descr)->init(*dtpm_descr); + + return 0; +} +late_initcall(dtpm_init); diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinux.lds.h --- a/include/asm-generic/vmlinux.lds.h +++ b/include/asm-generic/vmlinux.lds.h +#ifdef config_dtpm +#define dtpm_table() \ + . = align(8); \ + __dtpm_table = .; \ + keep(*(__dtpm_table)) \ + __dtpm_table_end = .; +#else +#define dtpm_table() +#endif + + dtpm_table() \ diff --git a/include/linux/dtpm.h b/include/linux/dtpm.h --- /dev/null +++ b/include/linux/dtpm.h +/* spdx-license-identifier: gpl-2.0-only */ +/* + * copyright (c) 2020 linaro ltd + * + * author: daniel lezcano <daniel.lezcano@linaro.org> + */ +#ifndef ___dtpm_h__ +#define ___dtpm_h__ + +#include <linux/powercap.h> + +#define max_dtpm_descr 8 +#define max_dtpm_constraints 1 + +struct dtpm { + struct powercap_zone zone; + struct dtpm *parent; + struct list_head sibling; + struct list_head children; + struct dtpm_ops *ops; + unsigned long flags; + u64 power_limit; + u64 power_max; + u64 power_min; + int weight; + void *private; +}; + +struct dtpm_ops { + u64 (*set_power_uw)(struct dtpm *, u64); + u64 (*get_power_uw)(struct dtpm *); + void (*release)(struct dtpm *); +}; + +struct dtpm_descr; + +typedef int (*dtpm_init_t)(struct dtpm_descr *); + +struct dtpm_descr { + struct dtpm *parent; + const char *name; + dtpm_init_t init; +}; + +/* init section thermal table */ +extern struct dtpm_descr *__dtpm_table[]; +extern struct dtpm_descr *__dtpm_table_end[]; + +#define dtpm_table_entry(name) \ + static typeof(name) *__dtpm_table_entry_##name \ + __used __section("__dtpm_table") = &name + +#define dtpm_declare(name) dtpm_table_entry(name) + +#define for_each_dtpm_table(__dtpm) \ + for (__dtpm = __dtpm_table; \ + __dtpm < __dtpm_table_end; \ + __dtpm++) + +static inline struct dtpm *to_dtpm(struct powercap_zone *zone) +{ + return container_of(zone, struct dtpm, zone); +} + +int dtpm_update_power(struct dtpm *dtpm, u64 power_min, u64 power_max); + +int dtpm_release_zone(struct powercap_zone *pcz); + +struct dtpm *dtpm_alloc(struct dtpm_ops *ops); + +void dtpm_unregister(struct dtpm *dtpm); + +int dtpm_register(const char *name, struct dtpm *dtpm, struct dtpm *parent); + +#endif
|
Power Management
|
a20d0ef97abf486a917aff066c457bdb930425af
|
daniel lezcano
|
include
|
linux
| |
powercap/drivers/dtpm: add cpu energy model based support
|
with the powercap dtpm controller, we are able to plug devices with power limitation features in the tree.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add the dtpm (dynamic thermal power management) framework. it allows to allocate a power budget to the different components where the resulting heating effect will comply with the skin temperature constraint
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['(featured) dtpm']
|
['h', 'kconfig', 'c', 'makefile']
| 5
| 268
| 0
|
--- diff --git a/drivers/powercap/kconfig b/drivers/powercap/kconfig --- a/drivers/powercap/kconfig +++ b/drivers/powercap/kconfig + +config dtpm_cpu + bool "add cpu power capping based on the energy model" + depends on dtpm && energy_model + help + this enables support for cpu power limitation based on + energy model. diff --git a/drivers/powercap/makefile b/drivers/powercap/makefile --- a/drivers/powercap/makefile +++ b/drivers/powercap/makefile +obj-$(config_dtpm_cpu) += dtpm_cpu.o diff --git a/drivers/powercap/dtpm_cpu.c b/drivers/powercap/dtpm_cpu.c --- /dev/null +++ b/drivers/powercap/dtpm_cpu.c +// spdx-license-identifier: gpl-2.0-only +/* + * copyright 2020 linaro limited + * + * author: daniel lezcano <daniel.lezcano@linaro.org> + * + * the dtpm cpu is based on the energy model. it hooks the cpu in the + * dtpm tree which in turns update the power number by propagating the + * power number from the cpu energy model information to the parents. + * + * the association between the power and the performance state, allows + * to set the power of the cpu at the opp granularity. + * + * the cpu hotplug is supported and the power numbers will be updated + * if a cpu is hot plugged / unplugged. + */ +#include <linux/cpumask.h> +#include <linux/cpufreq.h> +#include <linux/cpuhotplug.h> +#include <linux/dtpm.h> +#include <linux/energy_model.h> +#include <linux/pm_qos.h> +#include <linux/slab.h> +#include <linux/units.h> + +static struct dtpm *__parent; + +static define_per_cpu(struct dtpm *, dtpm_per_cpu); + +struct dtpm_cpu { + struct freq_qos_request qos_req; + int cpu; +}; + +/* + * when a new cpu is inserted at hotplug or boot time, add the power + * contribution and update the dtpm tree. + */ +static int power_add(struct dtpm *dtpm, struct em_perf_domain *em) +{ + u64 power_min, power_max; + + power_min = em->table[0].power; + power_min *= microwatt_per_milliwatt; + power_min += dtpm->power_min; + + power_max = em->table[em->nr_perf_states - 1].power; + power_max *= microwatt_per_milliwatt; + power_max += dtpm->power_max; + + return dtpm_update_power(dtpm, power_min, power_max); +} + +/* + * when a cpu is unplugged, remove its power contribution from the + * dtpm tree. + */ +static int power_sub(struct dtpm *dtpm, struct em_perf_domain *em) +{ + u64 power_min, power_max; + + power_min = em->table[0].power; + power_min *= microwatt_per_milliwatt; + power_min = dtpm->power_min - power_min; + + power_max = em->table[em->nr_perf_states - 1].power; + power_max *= microwatt_per_milliwatt; + power_max = dtpm->power_max - power_max; + + return dtpm_update_power(dtpm, power_min, power_max); +} + +static u64 set_pd_power_limit(struct dtpm *dtpm, u64 power_limit) +{ + struct dtpm_cpu *dtpm_cpu = dtpm->private; + struct em_perf_domain *pd; + struct cpumask cpus; + unsigned long freq; + u64 power; + int i, nr_cpus; + + pd = em_cpu_get(dtpm_cpu->cpu); + + cpumask_and(&cpus, cpu_online_mask, to_cpumask(pd->cpus)); + + nr_cpus = cpumask_weight(&cpus); + + for (i = 0; i < pd->nr_perf_states; i++) { + + power = pd->table[i].power * microwatt_per_milliwatt * nr_cpus; + + if (power > power_limit) + break; + } + + freq = pd->table[i - 1].frequency; + + freq_qos_update_request(&dtpm_cpu->qos_req, freq); + + power_limit = pd->table[i - 1].power * + microwatt_per_milliwatt * nr_cpus; + + return power_limit; +} + +static u64 get_pd_power_uw(struct dtpm *dtpm) +{ + struct dtpm_cpu *dtpm_cpu = dtpm->private; + struct em_perf_domain *pd; + struct cpumask cpus; + unsigned long freq; + int i, nr_cpus; + + pd = em_cpu_get(dtpm_cpu->cpu); + freq = cpufreq_quick_get(dtpm_cpu->cpu); + cpumask_and(&cpus, cpu_online_mask, to_cpumask(pd->cpus)); + nr_cpus = cpumask_weight(&cpus); + + for (i = 0; i < pd->nr_perf_states; i++) { + + if (pd->table[i].frequency < freq) + continue; + + return pd->table[i].power * + microwatt_per_milliwatt * nr_cpus; + } + + return 0; +} + +static void pd_release(struct dtpm *dtpm) +{ + struct dtpm_cpu *dtpm_cpu = dtpm->private; + + if (freq_qos_request_active(&dtpm_cpu->qos_req)) + freq_qos_remove_request(&dtpm_cpu->qos_req); + + kfree(dtpm_cpu); +} + +static struct dtpm_ops dtpm_ops = { + .set_power_uw = set_pd_power_limit, + .get_power_uw = get_pd_power_uw, + .release = pd_release, +}; + +static int cpuhp_dtpm_cpu_offline(unsigned int cpu) +{ + struct cpufreq_policy *policy; + struct em_perf_domain *pd; + struct dtpm *dtpm; + + policy = cpufreq_cpu_get(cpu); + + if (!policy) + return 0; + + pd = em_cpu_get(cpu); + if (!pd) + return -einval; + + dtpm = per_cpu(dtpm_per_cpu, cpu); + + power_sub(dtpm, pd); + + if (cpumask_weight(policy->cpus) != 1) + return 0; + + for_each_cpu(cpu, policy->related_cpus) + per_cpu(dtpm_per_cpu, cpu) = null; + + dtpm_unregister(dtpm); + + return 0; +} + +static int cpuhp_dtpm_cpu_online(unsigned int cpu) +{ + struct dtpm *dtpm; + struct dtpm_cpu *dtpm_cpu; + struct cpufreq_policy *policy; + struct em_perf_domain *pd; + char name[cpufreq_name_len]; + int ret = -enomem; + + policy = cpufreq_cpu_get(cpu); + + if (!policy) + return 0; + + pd = em_cpu_get(cpu); + if (!pd) + return -einval; + + dtpm = per_cpu(dtpm_per_cpu, cpu); + if (dtpm) + return power_add(dtpm, pd); + + dtpm = dtpm_alloc(&dtpm_ops); + if (!dtpm) + return -einval; + + dtpm_cpu = kzalloc(sizeof(dtpm_cpu), gfp_kernel); + if (!dtpm_cpu) + goto out_kfree_dtpm; + + dtpm->private = dtpm_cpu; + dtpm_cpu->cpu = cpu; + + for_each_cpu(cpu, policy->related_cpus) + per_cpu(dtpm_per_cpu, cpu) = dtpm; + + sprintf(name, "cpu%d", dtpm_cpu->cpu); + + ret = dtpm_register(name, dtpm, __parent); + if (ret) + goto out_kfree_dtpm_cpu; + + ret = power_add(dtpm, pd); + if (ret) + goto out_dtpm_unregister; + + ret = freq_qos_add_request(&policy->constraints, + &dtpm_cpu->qos_req, freq_qos_max, + pd->table[pd->nr_perf_states - 1].frequency); + if (ret) + goto out_power_sub; + + return 0; + +out_power_sub: + power_sub(dtpm, pd); + +out_dtpm_unregister: + dtpm_unregister(dtpm); + dtpm_cpu = null; + dtpm = null; + +out_kfree_dtpm_cpu: + for_each_cpu(cpu, policy->related_cpus) + per_cpu(dtpm_per_cpu, cpu) = null; + kfree(dtpm_cpu); + +out_kfree_dtpm: + kfree(dtpm); + return ret; +} + +int dtpm_register_cpu(struct dtpm *parent) +{ + __parent = parent; + + return cpuhp_setup_state(cpuhp_ap_dtpm_cpu_online, + "dtpm_cpu:online", + cpuhp_dtpm_cpu_online, + cpuhp_dtpm_cpu_offline); +} diff --git a/include/linux/cpuhotplug.h b/include/linux/cpuhotplug.h --- a/include/linux/cpuhotplug.h +++ b/include/linux/cpuhotplug.h + cpuhp_ap_dtpm_cpu_online, diff --git a/include/linux/dtpm.h b/include/linux/dtpm.h --- a/include/linux/dtpm.h +++ b/include/linux/dtpm.h +int dtpm_register_cpu(struct dtpm *parent); +
|
Power Management
|
0e8f68d7f04856a9e2ad4817b477fa35124888bd
|
daniel lezcano
|
include
|
linux
| |
powercap/intel_rapl: add support for alderlake mobile
|
add intel_rapl support for the alderlake mobile platform.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
add support for alderlake mobile
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['powercap/intel_rapl']
|
['c']
| 1
| 1
| 0
|
--- diff --git a/drivers/powercap/intel_rapl_common.c b/drivers/powercap/intel_rapl_common.c --- a/drivers/powercap/intel_rapl_common.c +++ b/drivers/powercap/intel_rapl_common.c + x86_match_intel_fam6_model(alderlake_l, &rapl_defaults_core),
|
Power Management
|
cca26b66efc1e92c10701087aca4895530660b85
|
zhang rui
|
drivers
|
powercap
| |
thermal/core: remove the 'forced_passive' option
|
the code was reorganized in 2012 with the commit 0c01ebbfd3caf1.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
remove the 'forced_passive' option
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['thermal']
|
['h', 'c', 'rst']
| 4
| 3
| 108
|
--- diff --git a/documentation/driver-api/thermal/sysfs-api.rst b/documentation/driver-api/thermal/sysfs-api.rst --- a/documentation/driver-api/thermal/sysfs-api.rst +++ b/documentation/driver-api/thermal/sysfs-api.rst -passive - attribute is only present for zones in which the passive cooling - policy is not supported by native thermal driver. default is zero - and can be set to a temperature (in millidegrees) to enable a - passive trip point for the zone. activation is done by polling with - an interval of 1 second. - - unit: millidegrees celsius - - valid values: 0 (disabled) or greater than 1000 - - rw, optional - diff --git a/drivers/thermal/gov_step_wise.c b/drivers/thermal/gov_step_wise.c --- a/drivers/thermal/gov_step_wise.c +++ b/drivers/thermal/gov_step_wise.c - if (type == thermal_trip_passive || type == thermal_trips_none) + if (type == thermal_trip_passive) - if (trip == thermal_trips_none) { - trip_temp = tz->forced_passive; - trip_type = thermal_trips_none; - } else { - tz->ops->get_trip_temp(tz, trip, &trip_temp); - tz->ops->get_trip_type(tz, trip, &trip_type); - } + tz->ops->get_trip_temp(tz, trip, &trip_temp); + tz->ops->get_trip_type(tz, trip, &trip_type); - if (tz->forced_passive) - thermal_zone_trip_update(tz, thermal_trips_none); - diff --git a/drivers/thermal/thermal_sysfs.c b/drivers/thermal/thermal_sysfs.c --- a/drivers/thermal/thermal_sysfs.c +++ b/drivers/thermal/thermal_sysfs.c -static ssize_t -passive_store(struct device *dev, struct device_attribute *attr, - const char *buf, size_t count) -{ - struct thermal_zone_device *tz = to_thermal_zone(dev); - int state; - - if (sscanf(buf, "%d ", &state) != 1) - return -einval; - - /* sanity check: values below 1000 millicelcius don't make sense - * and can cause the system to go into a thermal heart attack - */ - if (state && state < 1000) - return -einval; - - if (state && !tz->forced_passive) { - if (!tz->passive_delay) - tz->passive_delay = 1000; - thermal_zone_device_rebind_exception(tz, "processor", - sizeof("processor")); - } else if (!state && tz->forced_passive) { - tz->passive_delay = 0; - thermal_zone_device_unbind_exception(tz, "processor", - sizeof("processor")); - } - - tz->forced_passive = state; - - thermal_zone_device_update(tz, thermal_event_unspecified); - - return count; -} - -static ssize_t -passive_show(struct device *dev, struct device_attribute *attr, - char *buf) -{ - struct thermal_zone_device *tz = to_thermal_zone(dev); - - return sprintf(buf, "%d ", tz->forced_passive); -} - -static device_attr_rw(passive); -/* we expose passive only if passive trips are present */ -static struct attribute *thermal_zone_passive_attrs[] = { - &dev_attr_passive.attr, - null, -}; - -static umode_t thermal_zone_passive_is_visible(struct kobject *kobj, - struct attribute *attr, - int attrno) -{ - struct device *dev = kobj_to_dev(kobj); - struct thermal_zone_device *tz; - enum thermal_trip_type trip_type; - int count, passive = 0; - - tz = container_of(dev, struct thermal_zone_device, device); - - for (count = 0; count < tz->trips && !passive; count++) { - tz->ops->get_trip_type(tz, count, &trip_type); - - if (trip_type == thermal_trip_passive) - passive = 1; - } - - if (!passive) - return attr->mode; - - return 0; -} - -static const struct attribute_group thermal_zone_passive_attribute_group = { - .attrs = thermal_zone_passive_attrs, - .is_visible = thermal_zone_passive_is_visible, -}; - - &thermal_zone_passive_attribute_group, diff --git a/include/linux/thermal.h b/include/linux/thermal.h --- a/include/linux/thermal.h +++ b/include/linux/thermal.h - * @forced_passive: if > 0, temperature at which to switch on all acpi - * processor cooling devices. currently only used by the - * step-wise governor. - unsigned int forced_passive;
|
Power Management
|
a7d6ba14efb778fc8c65c627a057d5dd29debd04
|
daniel lezcano
|
documentation
|
driver-api
|
thermal
|
sched/core: move schedutil_cpu_util() to core.c
|
there is nothing schedutil specific in schedutil_cpu_util(), move it to core.c and define it only for config_smp.
|
this release allows to map an uid to a different one in a mount; it also adds support for selecting the preemption model at runtime; support for a low-overhead memory error detector designed to be used in production; support for the acrn hypervisor designed for embedded systems; btrfs initial support for zoned devices, subpage blocks sizes and performance improvements; support for eager nfs writes; support for a thermal power management to control the surface temperature of embedded devices in an unified way; the napi polling can be moved to a kernel thread; and support for non-blocking path lookups. as always, there are many other features, new drivers, improvements and fixes.
|
makes the cpufreq_cooling driver reuse the cpu utilization metric provided by the scheduler instead of depending on idle and busy times of a cpu, which aren't that accurate to measure the busyness of a cpu for the next cycle
|
['core (various)', 'file systems', 'memory management', 'block layer', 'tracing, perf and bpf', 'virtualization', 'cryptography', 'security', 'networking', 'architectures x86 arm risc-v powerpc mips csky s390 pa-risc c6x']
|
['graphics', 'power management', 'storage', 'drivers in the staging area', 'networking', 'audio', 'tablets, touch screens, keyboards, mouses', 'tv tuners, webcams, video capturers', 'universal serial bus', 'serial peripheral interface (spi)', 'watchdog', 'serial', 'cpu frequency scaling', 'device voltage and frequency scaling', 'voltage, current regulators, power capping, power supply', 'real time clock (rtc)', 'pin controllers (pinctrl)', 'multi media card (mmc)', 'memory technology devices (mtd)', 'industrial i/o (iio)', 'multi function devices (mfd)', 'pulse-width modulation (pwm)', 'inter-integrated circuit (i2c + i3c)', 'hardware monitoring (hwmon)', 'general purpose i/o (gpio)', 'leds', 'dma engines', 'cryptography hardware acceleration', 'pci', 'non-transparent bridge (ntb)', 'thunderbolt', 'clock', 'phy ("physical layer" framework)', 'cxl (compute express link)', 'various']
|
['cpufreq_cooling', 'get effective cpu utilization from scheduler']
|
['h', 'c']
| 3
| 109
| 117
|
--- diff --git a/kernel/sched/core.c b/kernel/sched/core.c --- a/kernel/sched/core.c +++ b/kernel/sched/core.c +#ifdef config_smp +/* + * this function computes an effective utilization for the given cpu, to be + * used for frequency selection given the linear relation: f = u * f_max. + * + * the scheduler tracks the following metrics: + * + * cpu_util_{cfs,rt,dl,irq}() + * cpu_bw_dl() + * + * where the cfs,rt and dl util numbers are tracked with the same metric and + * synchronized windows and are thus directly comparable. + * + * the cfs,rt,dl utilization are the running times measured with rq->clock_task + * which excludes things like irq and steal-time. these latter are then accrued + * in the irq utilization. + * + * the dl bandwidth number otoh is not a measured metric but a value computed + * based on the task model parameters and gives the minimal utilization + * required to meet deadlines. + */ +unsigned long schedutil_cpu_util(int cpu, unsigned long util_cfs, + unsigned long max, enum schedutil_type type, + struct task_struct *p) +{ + unsigned long dl_util, util, irq; + struct rq *rq = cpu_rq(cpu); + + if (!uclamp_is_used() && + type == frequency_util && rt_rq_is_runnable(&rq->rt)) { + return max; + } + + /* + * early check to see if irq/steal time saturates the cpu, can be + * because of inaccuracies in how we track these -- see + * update_irq_load_avg(). + */ + irq = cpu_util_irq(rq); + if (unlikely(irq >= max)) + return max; + + /* + * because the time spend on rt/dl tasks is visible as 'lost' time to + * cfs tasks and we use the same metric to track the effective + * utilization (pelt windows are synchronized) we can directly add them + * to obtain the cpu's actual utilization. + * + * cfs and rt utilization can be boosted or capped, depending on + * utilization clamp constraints requested by currently runnable + * tasks. + * when there are no cfs runnable tasks, clamps are released and + * frequency will be gracefully reduced with the utilization decay. + */ + util = util_cfs + cpu_util_rt(rq); + if (type == frequency_util) + util = uclamp_rq_util_with(rq, util, p); + + dl_util = cpu_util_dl(rq); + + /* + * for frequency selection we do not make cpu_util_dl() a permanent part + * of this sum because we want to use cpu_bw_dl() later on, but we need + * to check if the cfs+rt+dl sum is saturated (ie. no idle time) such + * that we select f_max when there is no idle time. + * + * note: numerical errors or stop class might cause us to not quite hit + * saturation when we should -- something for later. + */ + if (util + dl_util >= max) + return max; + + /* + * otoh, for energy computation we need the estimated running time, so + * include util_dl and ignore dl_bw. + */ + if (type == energy_util) + util += dl_util; + + /* + * there is still idle time; further improve the number by using the + * irq metric. because irq/steal time is hidden from the task clock we + * need to scale the task numbers: + * + * max - irq + * u' = irq + --------- * u + * max + */ + util = scale_irq_capacity(util, irq, max); + util += irq; + + /* + * bandwidth required by deadline must always be granted while, for + * fair and rt, we use blocked utilization of idle cpus as a mechanism + * to gracefully reduce the frequency when no tasks show up for longer + * periods of time. + * + * ideally we would like to set bw_dl as min/guaranteed freq and util + + * bw_dl as requested freq. however, cpufreq is not yet ready for such + * an interface. so, we only do the latter for now. + */ + if (type == frequency_util) + util += cpu_bw_dl(rq); + + return min(max, util); +} +#endif /* config_smp */ + diff --git a/kernel/sched/cpufreq_schedutil.c b/kernel/sched/cpufreq_schedutil.c --- a/kernel/sched/cpufreq_schedutil.c +++ b/kernel/sched/cpufreq_schedutil.c -/* - * this function computes an effective utilization for the given cpu, to be - * used for frequency selection given the linear relation: f = u * f_max. - * - * the scheduler tracks the following metrics: - * - * cpu_util_{cfs,rt,dl,irq}() - * cpu_bw_dl() - * - * where the cfs,rt and dl util numbers are tracked with the same metric and - * synchronized windows and are thus directly comparable. - * - * the cfs,rt,dl utilization are the running times measured with rq->clock_task - * which excludes things like irq and steal-time. these latter are then accrued - * in the irq utilization. - * - * the dl bandwidth number otoh is not a measured metric but a value computed - * based on the task model parameters and gives the minimal utilization - * required to meet deadlines. - */ -unsigned long schedutil_cpu_util(int cpu, unsigned long util_cfs, - unsigned long max, enum schedutil_type type, - struct task_struct *p) -{ - unsigned long dl_util, util, irq; - struct rq *rq = cpu_rq(cpu); - - if (!uclamp_is_used() && - type == frequency_util && rt_rq_is_runnable(&rq->rt)) { - return max; - } - - /* - * early check to see if irq/steal time saturates the cpu, can be - * because of inaccuracies in how we track these -- see - * update_irq_load_avg(). - */ - irq = cpu_util_irq(rq); - if (unlikely(irq >= max)) - return max; - - /* - * because the time spend on rt/dl tasks is visible as 'lost' time to - * cfs tasks and we use the same metric to track the effective - * utilization (pelt windows are synchronized) we can directly add them - * to obtain the cpu's actual utilization. - * - * cfs and rt utilization can be boosted or capped, depending on - * utilization clamp constraints requested by currently runnable - * tasks. - * when there are no cfs runnable tasks, clamps are released and - * frequency will be gracefully reduced with the utilization decay. - */ - util = util_cfs + cpu_util_rt(rq); - if (type == frequency_util) - util = uclamp_rq_util_with(rq, util, p); - - dl_util = cpu_util_dl(rq); - - /* - * for frequency selection we do not make cpu_util_dl() a permanent part - * of this sum because we want to use cpu_bw_dl() later on, but we need - * to check if the cfs+rt+dl sum is saturated (ie. no idle time) such - * that we select f_max when there is no idle time. - * - * note: numerical errors or stop class might cause us to not quite hit - * saturation when we should -- something for later. - */ - if (util + dl_util >= max) - return max; - - /* - * otoh, for energy computation we need the estimated running time, so - * include util_dl and ignore dl_bw. - */ - if (type == energy_util) - util += dl_util; - - /* - * there is still idle time; further improve the number by using the - * irq metric. because irq/steal time is hidden from the task clock we - * need to scale the task numbers: - * - * max - irq - * u' = irq + --------- * u - * max - */ - util = scale_irq_capacity(util, irq, max); - util += irq; - - /* - * bandwidth required by deadline must always be granted while, for - * fair and rt, we use blocked utilization of idle cpus as a mechanism - * to gracefully reduce the frequency when no tasks show up for longer - * periods of time. - * - * ideally we would like to set bw_dl as min/guaranteed freq and util + - * bw_dl as requested freq. however, cpufreq is not yet ready for such - * an interface. so, we only do the latter for now. - */ - if (type == frequency_util) - util += cpu_bw_dl(rq); - - return min(max, util); -} - diff --git a/kernel/sched/sched.h b/kernel/sched/sched.h --- a/kernel/sched/sched.h +++ b/kernel/sched/sched.h -#endif -#ifdef config_cpu_freq_gov_schedutil - -#else /* config_cpu_freq_gov_schedutil */ -static inline unsigned long schedutil_cpu_util(int cpu, unsigned long util_cfs, - unsigned long max, enum schedutil_type type, - struct task_struct *p) -{ - return 0; -} -#endif /* config_cpu_freq_gov_schedutil */ +#endif
|
Power Management
|
7d6a905f3dd62c4502cdd772c71319de4058ec89
|
viresh kumar rafael j wysocki rafael j wysocki intel com
|
kernel
|
sched
|
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